adf4153.c 31 KB

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  1. /******************************************************************************
  2. * @file ADF4153.c
  3. * @brief Implementation of ADF4153 Driver for Microblaze processor.
  4. * @author Istvan Csomortani (istvan.csomortani@analog.com)
  5. *
  6. *******************************************************************************
  7. * Copyright 2013(c) Analog Devices, Inc.
  8. *
  9. * All rights reserved.
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * - Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions and the following disclaimer.
  15. * - Redistributions in binary form must reproduce the above copyright
  16. * notice, this list of conditions and the following disclaimer in
  17. * the documentation and/or other materials provided with the
  18. * distribution.
  19. * - Neither the name of Analog Devices, Inc. nor the names of its
  20. * contributors may be used to endorse or promote products derived
  21. * from this software without specific prior written permission.
  22. * - The use of this software may or may not infringe the patent rights
  23. * of one or more patent holders. This license does not release you
  24. * from the requirement that you obtain separate licenses from these
  25. * patent holders to use this software.
  26. * - Use of the software either in source or binary form, must be run
  27. * on or directly connected to an Analog Devices Inc. component.
  28. *
  29. * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
  30. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
  31. * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  32. * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  34. * INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  35. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  36. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  38. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39. *
  40. ******************************************************************************/
  41. /*****************************************************************************/
  42. /****************************** Include Files ********************************/
  43. /*****************************************************************************/
  44. #include "adf4153.h"
  45. /* For round up division */
  46. #define CEIL(a, b) (((a) / (b)) + (((a) % (b)) > 0 ? 1 : 0))
  47. #define DATA_MASK_MSB8 0xFF0000
  48. #define DATA_OFFSET_MSB8 16
  49. #define DATA_MASK_MID8 0xFF00
  50. #define DATA_OFFSET_MID8 8
  51. #define DATA_MASK_LSB8 0xFF
  52. #define DATA_OFFSET_LSB8 0
  53. #define ADDRESS_MASK 3
  54. #define FREQ_2_GHZ 2000000000
  55. /*****************************************************************************/
  56. /**************************** Private variables ******************************/
  57. /*****************************************************************************/
  58. /* RF input frequency limits */
  59. long ADF4153_RFIN_MIN_FRQ = 10000000; // 10 Mhz
  60. long ADF4153_RFIN_MAX_FRQ = 250000000; // 250 Mhz
  61. /* Maximum PFD frequency */
  62. long ADF4153_PFD_MAX_FRQ = 32000000; // 32 Mhz
  63. /* VCO out frequency limits */
  64. long ADF4153_VCO_MIN_FRQ = 500000000; // 500 Mhz
  65. long long ADF4153_VCO_MAX_FRQ = 4000000000; // 4 Ghz
  66. /* maximum interpolator modulus value */
  67. short ADF4153_MOD_MAX = 4095; // the MOD is stored in 12 bits
  68. /* Reference input frequency */
  69. unsigned long refIn = 0;
  70. unsigned long channelSpacing = 0;
  71. uint8_t R_Counter = 0;;
  72. /* Internal buffers for each latch */
  73. unsigned long r0 = 0; /* the actual value of N Divider Register */
  74. unsigned long r1 = 0; /* the actual value of R Divider Register */
  75. unsigned long r2 = 0; /* the actual value of Control Register */
  76. unsigned long r3 = 0; /* the actual value of Noise and Spur Reg*/
  77. /*****************************************************************************/
  78. /*************************** Functions definitions ***************************/
  79. /*****************************************************************************/
  80. /**************************************************************************//**
  81. * @brief Initialize SPI and Initial Values for ADF4106 Board.
  82. *
  83. * @param ADF4106_st - the structure with the initial set up values of the
  84. * registers
  85. *
  86. * @return success
  87. ******************************************************************************/
  88. char ADF4153_Init(ADF4153_settings_t ADF4153_st)
  89. {
  90. char status = -1;
  91. /* CPHA = 1; CPOL = 0; */
  92. /* Set up the reference input frequency */
  93. refIn = ADF4153_st.refIn;
  94. channelSpacing = ADF4153_st.channelSpacing;
  95. R_Counter = ADF4153_st.rCounter;
  96. /* Write all zeros to the noise and spur register */
  97. ADF4153_UpdateLatch(ADF4153_CTRL_NOISE_SPUR |
  98. 0x0);
  99. /* selects the lowest noise mode by default */
  100. ADF4153_UpdateLatch(ADF4153_CTRL_NOISE_SPUR |
  101. 0x3C7);
  102. /* Set up the control register and enable the counter reset */
  103. ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
  104. ADF4153_R2_COUNTER_RST(ADF4153_CR_ENABLED) |
  105. ADF4153_R2_CP_3STATE(ADF4153_st.cpThreeState) |
  106. ADF4153_R2_POWER_DOWN(ADF4153_st.powerDown) |
  107. ADF4153_R2_LDP(ADF4153_st.ldp) |
  108. ADF4153_R2_PD_POL(ADF4153_st.pdPolarity) |
  109. ADF4153_R2_CP_CURRENT(ADF4153_st.cpCurrent) |
  110. ADF4153_R2_REF_DOUBLER(ADF4153_st.refDoubler) |
  111. ADF4153_R2_RESYNC(ADF4153_st.resync)
  112. );
  113. /* If resync feature is enabled */
  114. if(ADF4153_st.resync != 0x0)
  115. {
  116. /* Load the R divider register */
  117. ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
  118. ADF4153_R1_MOD(10) | //Resync Delay
  119. ADF4153_R1_RCOUNTER(ADF4153_st.rCounter) |
  120. ADF4153_R1_PRESCALE(ADF4153_st.prescaler) |
  121. ADF4153_R1_MUXOUT(ADF4153_st.muxout) |
  122. ADF4153_R1_LOAD(ADF4153_LOAD_RESYNC)
  123. );
  124. }
  125. /* Load the R divider register */
  126. ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
  127. ADF4153_R1_MOD(ADF4153_st.modValue) |
  128. ADF4153_R1_RCOUNTER(ADF4153_st.rCounter) |
  129. ADF4153_R1_PRESCALE(ADF4153_st.prescaler) |
  130. ADF4153_R1_MUXOUT(ADF4153_st.muxout) |
  131. ADF4153_R1_LOAD(ADF4153_LOAD_NORMAL)
  132. );
  133. /* Load the N divider register */
  134. ADF4153_UpdateLatch(ADF4153_CTRL_N_DIVIDER |
  135. ADF4153_R0_FRAC(ADF4153_st.fracValue) |
  136. ADF4153_R0_INT(ADF4153_st.intValue) |
  137. ADF4153_R0_FASTLOCK(ADF4153_st.fastlock)
  138. );
  139. /* Disable the counter reset in the Control Register */
  140. r2 &= ~ADF4153_R2_COUNTER_RST(ADF4153_R2_COUNTER_RST_MASK);
  141. ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
  142. r2 |
  143. ADF4153_R2_COUNTER_RST(ADF4153_CR_DISABLED)
  144. );
  145. return status;
  146. }
  147. /**************************************************************************//**
  148. * @brief Update one of the latch via the SPI interface
  149. *
  150. * @param latchData - the data which will be written to the latch
  151. *
  152. * @return
  153. ******************************************************************************/
  154. void ADF4153_UpdateLatch(unsigned long latchData)
  155. {
  156. unsigned char dataBuffer[3] = {0,};
  157. unsigned char latchType = latchData & 0x3;
  158. /* Update the internal buffers */
  159. switch(latchType)
  160. {
  161. case ADF4153_CTRL_N_DIVIDER :
  162. r0 = latchData;
  163. break;
  164. case ADF4153_CTRL_R_DIVIDER :
  165. r1 = latchData;
  166. break;
  167. case ADF4153_CTRL_CONTROL :
  168. r2 = latchData;
  169. break;
  170. case ADF4153_CTRL_NOISE_SPUR :
  171. r3 = latchData;
  172. break;
  173. }
  174. dataBuffer[0] = (latchData & DATA_MASK_MSB8) >> DATA_OFFSET_MSB8;
  175. dataBuffer[1] = (latchData & DATA_MASK_MID8) >> DATA_OFFSET_MID8;
  176. dataBuffer[2] = (latchData & DATA_MASK_LSB8) >> DATA_OFFSET_LSB8;
  177. /* Generate a load pulse */
  178. }
  179. /***************************************************************************//**
  180. * @brief Return the value of a desired latch
  181. *
  182. * @param param[0] - the type of the latch:
  183. * 0 - 'ADF4153_CTRL_N_DIVIDER'
  184. * 1 - 'ADF4153_CTRL_R_DIVIDER'
  185. * 2 - 'ADF4153_CTRL_CONTROL'
  186. * 3 - 'ADF4153_CTRL_NOISE_SPUR'
  187. *
  188. * @return latchValue - the value of the desired latch
  189. *******************************************************************************/
  190. unsigned long ADF4153_ReadLatch(unsigned char latchType)
  191. {
  192. switch(latchType)
  193. {
  194. case ADF4153_CTRL_N_DIVIDER :
  195. return r0;
  196. case ADF4153_CTRL_R_DIVIDER :
  197. return r1;
  198. case ADF4153_CTRL_CONTROL :
  199. return r2;
  200. case ADF4153_CTRL_NOISE_SPUR :
  201. return r3;
  202. default :
  203. return -1;
  204. }
  205. }
  206. /***************************************************************************//**
  207. * @brief Increases the R counter value until the ADF4106_PDF_MAX_FREQ is
  208. * greater than PFD frequency.
  209. *
  210. * @param rCounter - pointer of the R counter variable.
  211. *
  212. * @return pfdFrequency - The value of the PFD frequency.
  213. *******************************************************************************/
  214. unsigned long ADF4153_TuneRcounter(unsigned short *rCounter)
  215. {
  216. unsigned long pfdFrequency = 0; // PFD frequency
  217. unsigned char refDoubler = 0; // Reference Doubler
  218. refDoubler = (r2 & ADF4153_R2_REF_DOUBLER(ADF4153_R2_RESYNC_MASK)) >> \
  219. ADF4153_R2_REF_DOUBLER_OFFSET; // the actual reference doubler
  220. do
  221. {
  222. (*rCounter)++;
  223. pfdFrequency = refIn * ((float)(1 + refDoubler) / (*rCounter));
  224. }
  225. while(pfdFrequency > ADF4153_PFD_MAX_FRQ);
  226. return pfdFrequency;
  227. }
  228. /***************************************************************************//**
  229. * @brief Sets the output frequency.
  230. *
  231. * @param frequency - The desired frequency value.
  232. *
  233. * @return calculatedFrequency - The actual frequency value that was set.
  234. *******************************************************************************/
  235. #if 0 // PYJ.2019.07.22_BEGIN --
  236. unsigned long long ADF4153_SetFrequency(uint64_t frequency)
  237. {
  238. uint64_t vcoFrequency = 0; // VCO frequency
  239. unsigned long pfdFrequency = 0; // PFD frequency
  240. unsigned long long calculatedFrequency = 0; // Actual VCO frequency
  241. unsigned long intValue = 0; // INT value
  242. unsigned long fracValue = 0; // FRAC value
  243. unsigned long modValue = 0; // MOD value
  244. unsigned short rCounter = 0; // R Counter
  245. float buffer = 0;
  246. unsigned char devicePrescaler = 0;
  247. unsigned char intMin = 0;
  248. /* validate the given frequency parameter */
  249. /* validate the given frequency parameter */
  250. if(frequency <= ADF4153_VCO_MAX_FRQ)
  251. {
  252. if(frequency >= ADF4153_VCO_MIN_FRQ)
  253. {
  254. vcoFrequency = frequency;
  255. }
  256. else
  257. {
  258. vcoFrequency = ADF4153_VCO_MIN_FRQ;
  259. }
  260. }
  261. else
  262. {
  263. vcoFrequency = ADF4153_VCO_MAX_FRQ;
  264. }
  265. /* define the value of MOD */
  266. modValue = CEIL(refIn, channelSpacing);
  267. /* if the modValue is too high, increase the channel spacing */
  268. if(modValue > ADF4153_MOD_MAX)
  269. {
  270. do{
  271. channelSpacing++;
  272. modValue = CEIL(refIn, channelSpacing);
  273. }while(modValue <= ADF4153_MOD_MAX);
  274. }
  275. #if 0 // PYJ.2019.07.22_BEGIN --
  276. printf("modValue : %d\r\n" ,modValue );
  277. #endif // PYJ.2019.07.22_END --
  278. /* define prescaler */
  279. devicePrescaler = (vcoFrequency <= FREQ_2_GHZ) ? ADF4153_PRESCALER_4_5 : \
  280. ADF4153_PRESCALER_8_9;
  281. intMin = (devicePrescaler == ADF4153_PRESCALER_4_5) ? 31 : 91;
  282. #if 0 // PYJ.2019.07.22_BEGIN --
  283. if(devicePrescaler)
  284. printf("ADF4153_PRESCALER_8_9\r\n");
  285. else
  286. printf("ADF4153_PRESCALER_4_5\r\n");
  287. #endif // PYJ.2019.07.22_END --
  288. /* define the PFD frequency, R counter ant INT value */
  289. #if 0 // PYJ.2019.07.22_BEGIN --
  290. do
  291. {
  292. /* define the PFD frequency and R Counter, using the TuneRCounter() */
  293. pfdFrequency = ADF4153_TuneRcounter(&rCounter);
  294. intValue = vcoFrequency / pfdFrequency;
  295. }while(intValue < intMin);
  296. #endif // PYJ.2019.07.22_END -- ]
  297. pfdFrequency = refIn;
  298. intValue = (vcoFrequency / (pfdFrequency / 1000)) / 1000;
  299. #if 0 // PYJ.2019.07.22_BEGIN --
  300. printf("pfdFrequency : %d\r\n" ,pfdFrequency );
  301. printf("intValue : %d\r\n" ,intValue );
  302. #endif // PYJ.2019.07.22_END --
  303. /*define FRAC value */
  304. do
  305. {
  306. fracValue++;
  307. buffer = intValue + ((float)fracValue/modValue);
  308. calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
  309. }while(calculatedFrequency <= vcoFrequency);
  310. fracValue--;
  311. /* Find the actual VCO frequency. */
  312. buffer = intValue + ((float)fracValue/modValue);
  313. calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
  314. #if 0 // PYJ.2019.07.22_BEGIN --
  315. printf("fracValue : %d\r\n" ,fracValue );
  316. #endif // PYJ.2019.07.22_END --
  317. /* Enable the Counter Reset */
  318. ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
  319. r2 |
  320. ADF4153_R2_COUNTER_RST(ADF4153_CR_ENABLED));
  321. /* Load the R divider with the new values */
  322. r1 &= (~ADF4153_R1_MOD(ADF4153_R1_MOD_MASK) &
  323. ~ADF4153_R1_RCOUNTER(ADF4153_R1_RCOUNTER_MASK) &
  324. ~ADF4153_R1_PRESCALE(ADF4153_R1_PRESCALE_MASK));
  325. ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
  326. r1 |
  327. ADF4153_R1_MOD(modValue) |
  328. ADF4153_R1_RCOUNTER(rCounter) |
  329. ADF4153_R1_PRESCALE(devicePrescaler));
  330. /* Load the N divider with the new values */
  331. r0 &= (~ADF4153_R0_FRAC(ADF4153_R0_FRAC_MASK) &
  332. ~ADF4153_R0_INT(ADF4153_R0_INT_MASK));
  333. ADF4153_UpdateLatch(ADF4153_CTRL_N_DIVIDER |
  334. r0 |
  335. ADF4153_R0_FRAC(fracValue) |
  336. ADF4153_R0_INT(intValue));
  337. /* Disable the Counter Reset */
  338. r2 &= ~ADF4153_R2_COUNTER_RST(ADF4153_R2_COUNTER_RST_MASK);
  339. ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
  340. r2 |
  341. ADF4153_R2_COUNTER_RST(ADF4153_CR_DISABLED));
  342. printf("calculatedFrequency : %d\r\n" ,calculatedFrequency );
  343. return calculatedFrequency;
  344. }
  345. #else
  346. typedef struct _Bluecell_t {
  347. /* R1 */
  348. uint8_t ADF4153_Control0 : 2;
  349. uint16_t ADF4153_FRAC : 12;
  350. uint16_t ADF4153_INT : 9;
  351. uint8_t ADF4153_FASTLOCK : 1;
  352. /* R1 */
  353. uint8_t ADF4153_Control1 : 2;
  354. uint16_t ADF4153_MOD : 12;
  355. uint8_t ADF4153_Rcounter : 4;
  356. uint8_t ADF4153_Prescale : 1;
  357. uint8_t ADF4153_Reserve : 1;
  358. uint8_t ADF4153_Muxout : 3;
  359. uint8_t ADF4153_LoadControl : 1;
  360. } Bluecell_t;
  361. Bluecell_t Curr_val_st = {
  362. 0,// uint8_t ADF4153_Control0 : 2;
  363. 0,// uint16_t ADF4153_FRAC : 12;
  364. 0,//uint16_t ADF4153_INT : 4;
  365. 0,//uint16_t ADF4153_FASTLOCK : 4;
  366. 0,//uint8_t ADF4153_Control1 : 2;
  367. 0,//uint16_t ADF4153_MOD : 12;
  368. 0,//uint8_t ADF4153_Rcounter : 4;
  369. 0,//uint16_t ADF4153_MOD : 12;
  370. 0,//uint8_t ADF4153_Rcounter : 4;
  371. 0,//uint8_t ADF4153_Prescale : 1;
  372. 0,//uint8_t ADF4153_Reserve : 1;
  373. 0,//uint8_t ADF4153_Muxout : 3;
  374. 0,//uint8_t ADF4153_LoadControl : 1;
  375. };
  376. ADF4153_settings_t Curr_set_st;
  377. unsigned long long ADF4153_SetFrequency(unsigned long long frequency)
  378. {
  379. unsigned long long vcoFrequency = 0; // VCO frequency
  380. unsigned long pfdFrequency = 0; // PFD frequency
  381. unsigned long long calculatedFrequency = 0; // Actual VCO frequency
  382. unsigned long intValue = 0; // INT value
  383. unsigned long fracValue = 0; // FRAC value
  384. unsigned long modValue = 0; // MOD value
  385. unsigned short rCounter = ADF4153_GetRcounter(); // R Counter
  386. float buffer = 0;
  387. unsigned char devicePrescaler = 0;
  388. unsigned char intMin = 0;
  389. /* validate the given frequency parameter */
  390. if(frequency <= ADF4153_VCO_MAX_FRQ)
  391. {
  392. if(frequency >= ADF4153_VCO_MIN_FRQ)
  393. {
  394. vcoFrequency = frequency;
  395. }
  396. else
  397. {
  398. vcoFrequency = ADF4153_VCO_MIN_FRQ;
  399. }
  400. }
  401. else
  402. {
  403. vcoFrequency = ADF4153_VCO_MAX_FRQ;
  404. }
  405. #if 0 // PYJ.2019.07.22_BEGIN --
  406. printf("vcoFrequency : %d Mhz\r\n" ,(uint32_t)(vcoFrequency/1000000) );
  407. #endif // PYJ.2019.07.22_END --
  408. /* define the value of MOD */
  409. modValue = CEIL(refIn, channelSpacing);
  410. /* if the modValue is too high, increase the channel spacing */
  411. if(modValue > ADF4153_MOD_MAX)
  412. {
  413. do{
  414. channelSpacing++;
  415. modValue = CEIL(refIn, channelSpacing);
  416. }while(modValue <= ADF4153_MOD_MAX);
  417. }
  418. Curr_val_st.ADF4153_MOD = Curr_set_st.modValue = modValue;
  419. #if 0 // PYJ.2019.07.22_BEGIN --
  420. printf("modValue : %d\r\n" ,modValue );
  421. #endif // PYJ.2019.07.22_END --
  422. /* define prescaler */
  423. devicePrescaler = (vcoFrequency <= FREQ_2_GHZ) ? ADF4153_PRESCALER_4_5 : \
  424. ADF4153_PRESCALER_8_9;
  425. intMin = (devicePrescaler == ADF4153_PRESCALER_4_5) ? 31 : 91;
  426. Curr_val_st.ADF4153_Prescale = Curr_set_st.prescaler = devicePrescaler;
  427. /* define the PFD frequency, R counter ant INT value */
  428. do
  429. {
  430. /* define the PFD frequency and R Counter, using the TuneRCounter() */
  431. pfdFrequency = ADF4153_TuneRcounter(&rCounter);
  432. intValue = vcoFrequency / pfdFrequency;
  433. }while(intValue < intMin);
  434. Curr_set_st.intValue = Curr_val_st.ADF4153_INT = intValue;
  435. #if 0 // PYJ.2019.07.22_BEGIN --
  436. printf("pfdFrequency : %d\r\n" ,pfdFrequency );
  437. printf("intValue : %d\r\n" ,intValue );
  438. #endif // PYJ.2019.07.22_END --
  439. /*define FRAC value */
  440. do
  441. {
  442. fracValue++;
  443. buffer = intValue + ((float)fracValue/modValue);
  444. calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
  445. }while(calculatedFrequency <= vcoFrequency);
  446. fracValue--;
  447. Curr_set_st.fracValue = Curr_val_st.ADF4153_FRAC = fracValue;
  448. #if 0 // PYJ.2019.07.22_BEGIN --
  449. printf("fracValue : %d Mhz\r\n" ,fracValue);
  450. #endif // PYJ.2019.07.22_END --
  451. /* Find the actual VCO frequency. */
  452. buffer = intValue + ((float)fracValue/modValue);
  453. calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
  454. /* Enable the Counter Reset */
  455. ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
  456. r2 |
  457. ADF4153_R2_COUNTER_RST(ADF4153_CR_ENABLED));
  458. /* Load the R divider with the new values */
  459. r1 &= (~ADF4153_R1_MOD(ADF4153_R1_MOD_MASK) &
  460. ~ADF4153_R1_RCOUNTER(ADF4153_R1_RCOUNTER_MASK) &
  461. ~ADF4153_R1_PRESCALE(ADF4153_R1_PRESCALE_MASK));
  462. ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
  463. r1 |
  464. ADF4153_R1_MOD(modValue) |
  465. ADF4153_R1_RCOUNTER(rCounter) |
  466. ADF4153_R1_PRESCALE(devicePrescaler));
  467. /* Load the N divider with the new values */
  468. r0 &= (~ADF4153_R0_FRAC(ADF4153_R0_FRAC_MASK) &
  469. ~ADF4153_R0_INT(ADF4153_R0_INT_MASK));
  470. ADF4153_UpdateLatch(ADF4153_CTRL_N_DIVIDER |
  471. r0 |
  472. ADF4153_R0_FRAC(fracValue) |
  473. ADF4153_R0_INT(intValue));
  474. /* Disable the Counter Reset */
  475. r2 &= ~ADF4153_R2_COUNTER_RST(ADF4153_R2_COUNTER_RST_MASK);
  476. ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
  477. r2 |
  478. ADF4153_R2_COUNTER_RST(ADF4153_CR_DISABLED));
  479. #if 0 // PYJ.2019.07.22_BEGIN --
  480. printf("calculatedFrequency : %d Mhz\r\n" ,(uint32_t)(calculatedFrequency/1000000) );
  481. #endif // PYJ.2019.07.22_END --
  482. return calculatedFrequency;
  483. }
  484. #endif // PYJ.2019.07.22_END --
  485. /***************************************************************************//**
  486. * @brief Return the value of the channel spacing
  487. *
  488. * @param frequency - The desired frequency value.
  489. *
  490. * @return calculatedFrequency - The actual frequency value that was set.
  491. *******************************************************************************/
  492. unsigned long ADF4153_GetChannelSpacing( void )
  493. {
  494. return channelSpacing;
  495. }
  496. void ADF4153_SetChannelSpacing( unsigned long val)
  497. {
  498. channelSpacing = val;
  499. }
  500. uint8_t ADF4153_GetRcounter(void){
  501. return R_Counter;
  502. }
  503. uint8_t ADF4153_SetRcounter(uint8_t val){
  504. R_Counter = val;
  505. }
  506. unsigned long ADF4153_GetRefIn(void){
  507. return refIn;
  508. }
  509. void ADF4153_SetRefIn(unsigned long val){
  510. refIn = val;
  511. }
  512. #if 0 // PYJ.2019.07.22_BEGIN --
  513. void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
  514. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  515. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  516. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  517. R3 = R3 & 0x0007FF;
  518. /* R3 Ctrl */
  519. printf("\r\nR3 : ");
  520. for(int i =0; i < 24; i++){
  521. if(R3 & 0x800000){
  522. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  523. printf("1");
  524. }
  525. else{
  526. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  527. printf("0");
  528. }
  529. HAL_Delay(1);
  530. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  531. HAL_Delay(1);
  532. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  533. R3 = ((R3 << 1) & 0xFFFFFF);
  534. }
  535. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  536. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  537. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  538. HAL_Delay(1);
  539. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  540. R2 = R2 & 0x00FFFF;
  541. /* R2 Ctrl */
  542. printf("\r\nR2 : ");
  543. for(int i =0; i < 24; i++){
  544. if(R2 & 0x800000){
  545. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  546. printf("1");
  547. }
  548. else{
  549. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  550. printf("0");
  551. }
  552. HAL_Delay(1);
  553. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  554. HAL_Delay(1);
  555. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  556. R2 = ((R2 << 1) & 0xFFFFFF);
  557. }
  558. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  559. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  560. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  561. HAL_Delay(1);
  562. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  563. R1 = R1 & 0xFFFFFF;
  564. /* R1 Ctrl */
  565. printf("\r\nR1 : ");
  566. for(int i =0; i < 24; i++){
  567. if(R1 & 0x800000){
  568. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  569. printf("1");
  570. }
  571. else{
  572. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  573. printf("0");
  574. }
  575. HAL_Delay(1);
  576. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  577. HAL_Delay(1);
  578. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  579. R1 = ((R1 << 1) & 0xFFFFFF);
  580. }
  581. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  582. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  583. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  584. HAL_Delay(1);
  585. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  586. /* R0 Ctrl */
  587. printf("\r\nR0 : ");
  588. R0 = R0 & 0xFFFFFF;
  589. for(int i =0; i < 24; i++){
  590. if(R0 & 0x800000){
  591. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  592. printf("1");
  593. }
  594. else{
  595. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  596. printf("0");
  597. }
  598. HAL_Delay(1);
  599. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  600. HAL_Delay(1);
  601. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  602. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  603. R0 = ((R0 << 1) & 0xFFFFFF);
  604. }
  605. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  606. HAL_Delay(1);
  607. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  608. }
  609. #else
  610. #if 0
  611. void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
  612. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  613. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  614. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  615. R3 = R3 & 0x0007FF;
  616. /* R3 Ctrl */
  617. for(int i =0; i < 24; i++){
  618. if(R3 & 0x800000){
  619. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  620. }
  621. else{
  622. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  623. }
  624. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  625. HAL_Delay(1);
  626. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  627. HAL_Delay(1);
  628. R3 = ((R3 << 1) & 0xFFFFFF);
  629. }
  630. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  631. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  632. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  633. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  634. R2 = R2 & 0x00FFFF;
  635. /* R2 Ctrl */
  636. for(int i =0; i < 24; i++){
  637. if(R2 & 0x800000){
  638. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  639. }
  640. else{
  641. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  642. }
  643. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  644. HAL_Delay(1);
  645. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  646. HAL_Delay(1);
  647. R2 = ((R2 << 1) & 0xFFFFFF);
  648. }
  649. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  650. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  651. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  652. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  653. R1 = R1 & 0xFFFFFF;
  654. /* R1 Ctrl */
  655. for(int i =0; i < 24; i++){
  656. if(R1 & 0x800000){
  657. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  658. }
  659. else{
  660. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  661. }
  662. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  663. HAL_Delay(1);
  664. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  665. HAL_Delay(1);
  666. R1 = ((R1 << 1) & 0xFFFFFF);
  667. }
  668. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  669. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  670. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  671. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  672. /* R0 Ctrl */
  673. R0 = R0 & 0xFFFFFF;
  674. for(int i =0; i < 24; i++){
  675. if(R0 & 0x800000){
  676. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  677. }
  678. else{
  679. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  680. }
  681. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  682. HAL_Delay(1);
  683. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  684. HAL_Delay(1);
  685. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  686. R0 = ((R0 << 1) & 0xFFFFFF);
  687. }
  688. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  689. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  690. }
  691. #else
  692. void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
  693. R3 = R3 & 0x0007FF;
  694. R2 = R2 & 0x00FFFF;
  695. R1 = R1 & 0xFFFFFF;
  696. R0 = R0 & 0xFFFFFF;
  697. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  698. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  699. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  700. /* R3 Ctrl */
  701. for(int i =0; i < 11; i++){
  702. if(R3 & 0x000700)
  703. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  704. else
  705. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  706. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  707. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  708. R3 = ((R3 << 1) & 0x00000FFF);
  709. }
  710. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  711. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  712. /* R2 Ctrl */
  713. for(int i =0; i < 16; i++){
  714. if(R2 & 0x008000)
  715. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  716. else
  717. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  718. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  719. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  720. R2 = ((R2 << 1) & 0x00FFFF);
  721. }
  722. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  723. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  724. /* R1 Ctrl */
  725. for(int i =0; i < 24; i++){
  726. if(R1 & 0x800000)
  727. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  728. else
  729. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  730. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  731. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  732. R1 = ((R1 << 1) & 0xFFFFFF);
  733. }
  734. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  735. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  736. /* R0 Ctrl */
  737. for(int i =0; i < 24; i++){
  738. if(R0 & 0x800000)
  739. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
  740. else
  741. HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
  742. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
  743. HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
  744. R0 = ((R0 << 1) & 0xFFFFFF);
  745. }
  746. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
  747. HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
  748. }
  749. #endif
  750. #endif // PYJ.2019.07.22_END --