adf4153 delay 제거 / adf4153 각 비트별로 작동하도록 수정 / ld 체크 부분 제거

인터럽트 핀 추가

.settings/language.settings.xml

@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
 <project>
-	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.463884988" name="Debug">
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.840840702" name="Debug">
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
@@ -12,7 +12,7 @@
 			</provider>
 		</extension>
 	</configuration>
-	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.286009789" name="Release">
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1338815827" name="Release">
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>

Debug/STM32F410RB_PLLCtrl_Test.map

@@ -1012,6 +1012,8 @@ Discarded input sections
                 0x0000000000000000      0x1a4 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .text.HAL_GPIO_ReadPin
                 0x0000000000000000       0x30 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .text.HAL_GPIO_TogglePin
+                0x0000000000000000       0x36 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .text.HAL_GPIO_LockPin
                 0x0000000000000000       0x50 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .text.HAL_GPIO_EXTI_Callback
@@ -2804,7 +2806,7 @@ LOAD c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000000                g_pfnVectors
                 0x00000000080001c8                . = ALIGN (0x4)
 
-.text           0x00000000080001c8     0x2edc
+.text           0x00000000080001c8     0x2e3c
                 0x00000000080001c8                . = ALIGN (0x4)
  *(.text)
  .text          0x00000000080001c8       0x40 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
@@ -2863,364 +2865,362 @@ LOAD c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .text.HAL_GPIO_WritePin
                 0x0000000008000b38       0x32 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
                 0x0000000008000b38                HAL_GPIO_WritePin
- .text.HAL_GPIO_TogglePin
-                0x0000000008000b6a       0x36 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
-                0x0000000008000b6a                HAL_GPIO_TogglePin
+ *fill*         0x0000000008000b6a        0x2 
  .text.HAL_GPIO_EXTI_IRQHandler
-                0x0000000008000ba0       0x30 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
-                0x0000000008000ba0                HAL_GPIO_EXTI_IRQHandler
+                0x0000000008000b6c       0x30 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x0000000008000b6c                HAL_GPIO_EXTI_IRQHandler
  .text.HAL_RCC_ClockConfig
-                0x0000000008000bd0      0x1c4 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x0000000008000bd0                HAL_RCC_ClockConfig
+                0x0000000008000b9c      0x1c4 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x0000000008000b9c                HAL_RCC_ClockConfig
  .text.HAL_RCC_GetSysClockFreq
-                0x0000000008000d94      0x1b0 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x0000000008000d94                HAL_RCC_GetSysClockFreq
+                0x0000000008000d60      0x1b0 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x0000000008000d60                HAL_RCC_GetSysClockFreq
  .text.HAL_RCC_GetHCLKFreq
-                0x0000000008000f44       0x18 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x0000000008000f44                HAL_RCC_GetHCLKFreq
+                0x0000000008000f10       0x18 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x0000000008000f10                HAL_RCC_GetHCLKFreq
  .text.HAL_RCC_GetPCLK1Freq
-                0x0000000008000f5c       0x28 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x0000000008000f5c                HAL_RCC_GetPCLK1Freq
+                0x0000000008000f28       0x28 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x0000000008000f28                HAL_RCC_GetPCLK1Freq
  .text.HAL_RCC_GetPCLK2Freq
-                0x0000000008000f84       0x28 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x0000000008000f84                HAL_RCC_GetPCLK2Freq
+                0x0000000008000f50       0x28 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x0000000008000f50                HAL_RCC_GetPCLK2Freq
  .text.HAL_RCC_OscConfig
-                0x0000000008000fac      0x484 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
-                0x0000000008000fac                HAL_RCC_OscConfig
+                0x0000000008000f78      0x484 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
+                0x0000000008000f78                HAL_RCC_OscConfig
  .text.HAL_UART_Init
-                0x0000000008001430       0x9a Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
-                0x0000000008001430                HAL_UART_Init
+                0x00000000080013fc       0x9a Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+                0x00000000080013fc                HAL_UART_Init
  .text.HAL_UART_Transmit
-                0x00000000080014ca      0x132 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
-                0x00000000080014ca                HAL_UART_Transmit
+                0x0000000008001496      0x132 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+                0x0000000008001496                HAL_UART_Transmit
  .text.UART_WaitOnFlagUntilTimeout
-                0x00000000080015fc       0x94 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+                0x00000000080015c8       0x94 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
  .text.UART_SetConfig
-                0x0000000008001690      0x414 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+                0x000000000800165c      0x414 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
  .text.ADF4153_Init
-                0x0000000008001aa4      0x1c0 Src/adf4153.o
-                0x0000000008001aa4                ADF4153_Init
+                0x0000000008001a70      0x1c0 Src/adf4153.o
+                0x0000000008001a70                ADF4153_Init
  .text.ADF4153_UpdateLatch
-                0x0000000008001c64       0x90 Src/adf4153.o
-                0x0000000008001c64                ADF4153_UpdateLatch
+                0x0000000008001c30       0x90 Src/adf4153.o
+                0x0000000008001c30                ADF4153_UpdateLatch
  .text.ADF_Module_Ctrl
-                0x0000000008001cf4      0x27c Src/adf4153.o
-                0x0000000008001cf4                ADF_Module_Ctrl
- .text._write   0x0000000008001f70       0x28 Src/main.o
-                0x0000000008001f70                _write
+                0x0000000008001cc0      0x200 Src/adf4153.o
+                0x0000000008001cc0                ADF_Module_Ctrl
+ .text._write   0x0000000008001ec0       0x28 Src/main.o
+                0x0000000008001ec0                _write
  .text.HAL_GPIO_EXTI_Callback
-                0x0000000008001f98       0x2c Src/main.o
-                0x0000000008001f98                HAL_GPIO_EXTI_Callback
- .text.main     0x0000000008001fc4       0x90 Src/main.o
-                0x0000000008001fc4                main
+                0x0000000008001ee8       0x50 Src/main.o
+                0x0000000008001ee8                HAL_GPIO_EXTI_Callback
+ .text.main     0x0000000008001f38       0x84 Src/main.o
+                0x0000000008001f38                main
  .text.SystemClock_Config
-                0x0000000008002054       0xd8 Src/main.o
-                0x0000000008002054                SystemClock_Config
+                0x0000000008001fbc       0xd8 Src/main.o
+                0x0000000008001fbc                SystemClock_Config
  .text.MX_NVIC_Init
-                0x000000000800212c       0x18 Src/main.o
+                0x0000000008002094       0x18 Src/main.o
  .text.MX_USART2_UART_Init
-                0x0000000008002144       0x54 Src/main.o
+                0x00000000080020ac       0x54 Src/main.o
  .text.MX_GPIO_Init
-                0x0000000008002198      0x124 Src/main.o
+                0x0000000008002100      0x124 Src/main.o
  .text.Error_Handler
-                0x00000000080022bc        0xe Src/main.o
-                0x00000000080022bc                Error_Handler
- *fill*         0x00000000080022ca        0x2 
+                0x0000000008002224        0xe Src/main.o
+                0x0000000008002224                Error_Handler
+ *fill*         0x0000000008002232        0x2 
  .text.HAL_MspInit
-                0x00000000080022cc       0x50 Src/stm32f4xx_hal_msp.o
-                0x00000000080022cc                HAL_MspInit
+                0x0000000008002234       0x50 Src/stm32f4xx_hal_msp.o
+                0x0000000008002234                HAL_MspInit
  .text.HAL_UART_MspInit
-                0x000000000800231c       0x90 Src/stm32f4xx_hal_msp.o
-                0x000000000800231c                HAL_UART_MspInit
+                0x0000000008002284       0x90 Src/stm32f4xx_hal_msp.o
+                0x0000000008002284                HAL_UART_MspInit
  .text.NMI_Handler
-                0x00000000080023ac        0xe Src/stm32f4xx_it.o
-                0x00000000080023ac                NMI_Handler
+                0x0000000008002314        0xe Src/stm32f4xx_it.o
+                0x0000000008002314                NMI_Handler
  .text.HardFault_Handler
-                0x00000000080023ba        0x6 Src/stm32f4xx_it.o
-                0x00000000080023ba                HardFault_Handler
+                0x0000000008002322        0x6 Src/stm32f4xx_it.o
+                0x0000000008002322                HardFault_Handler
  .text.MemManage_Handler
-                0x00000000080023c0        0x6 Src/stm32f4xx_it.o
-                0x00000000080023c0                MemManage_Handler
+                0x0000000008002328        0x6 Src/stm32f4xx_it.o
+                0x0000000008002328                MemManage_Handler
  .text.BusFault_Handler
-                0x00000000080023c6        0x6 Src/stm32f4xx_it.o
-                0x00000000080023c6                BusFault_Handler
+                0x000000000800232e        0x6 Src/stm32f4xx_it.o
+                0x000000000800232e                BusFault_Handler
  .text.UsageFault_Handler
-                0x00000000080023cc        0x6 Src/stm32f4xx_it.o
-                0x00000000080023cc                UsageFault_Handler
+                0x0000000008002334        0x6 Src/stm32f4xx_it.o
+                0x0000000008002334                UsageFault_Handler
  .text.SVC_Handler
-                0x00000000080023d2        0xe Src/stm32f4xx_it.o
-                0x00000000080023d2                SVC_Handler
+                0x000000000800233a        0xe Src/stm32f4xx_it.o
+                0x000000000800233a                SVC_Handler
  .text.DebugMon_Handler
-                0x00000000080023e0        0xe Src/stm32f4xx_it.o
-                0x00000000080023e0                DebugMon_Handler
+                0x0000000008002348        0xe Src/stm32f4xx_it.o
+                0x0000000008002348                DebugMon_Handler
  .text.PendSV_Handler
-                0x00000000080023ee        0xe Src/stm32f4xx_it.o
-                0x00000000080023ee                PendSV_Handler
+                0x0000000008002356        0xe Src/stm32f4xx_it.o
+                0x0000000008002356                PendSV_Handler
  .text.SysTick_Handler
-                0x00000000080023fc        0xc Src/stm32f4xx_it.o
-                0x00000000080023fc                SysTick_Handler
+                0x0000000008002364        0xc Src/stm32f4xx_it.o
+                0x0000000008002364                SysTick_Handler
  .text.EXTI15_10_IRQHandler
-                0x0000000008002408       0x18 Src/stm32f4xx_it.o
-                0x0000000008002408                EXTI15_10_IRQHandler
- .text._read    0x0000000008002420       0x3a Src/syscalls.o
-                0x0000000008002420                _read
- .text._close   0x000000000800245a       0x18 Src/syscalls.o
-                0x000000000800245a                _close
- .text._fstat   0x0000000008002472       0x20 Src/syscalls.o
-                0x0000000008002472                _fstat
- .text._isatty  0x0000000008002492       0x16 Src/syscalls.o
-                0x0000000008002492                _isatty
- .text._lseek   0x00000000080024a8       0x1a Src/syscalls.o
-                0x00000000080024a8                _lseek
- *fill*         0x00000000080024c2        0x2 
- .text._sbrk    0x00000000080024c4       0x58 Src/sysmem.o
-                0x00000000080024c4                _sbrk
+                0x0000000008002370       0x10 Src/stm32f4xx_it.o
+                0x0000000008002370                EXTI15_10_IRQHandler
+ .text._read    0x0000000008002380       0x3a Src/syscalls.o
+                0x0000000008002380                _read
+ .text._close   0x00000000080023ba       0x18 Src/syscalls.o
+                0x00000000080023ba                _close
+ .text._fstat   0x00000000080023d2       0x20 Src/syscalls.o
+                0x00000000080023d2                _fstat
+ .text._isatty  0x00000000080023f2       0x16 Src/syscalls.o
+                0x00000000080023f2                _isatty
+ .text._lseek   0x0000000008002408       0x1a Src/syscalls.o
+                0x0000000008002408                _lseek
+ *fill*         0x0000000008002422        0x2 
+ .text._sbrk    0x0000000008002424       0x58 Src/sysmem.o
+                0x0000000008002424                _sbrk
  .text.SystemInit
-                0x000000000800251c       0x6c Src/system_stm32f4xx.o
-                0x000000000800251c                SystemInit
+                0x000000000800247c       0x6c Src/system_stm32f4xx.o
+                0x000000000800247c                SystemInit
  .text.Reset_Handler
-                0x0000000008002588       0x50 Startup/startup_stm32f410rbtx.o
-                0x0000000008002588                Reset_Handler
+                0x00000000080024e8       0x50 Startup/startup_stm32f410rbtx.o
+                0x00000000080024e8                Reset_Handler
  .text.Default_Handler
-                0x00000000080025d8        0x2 Startup/startup_stm32f410rbtx.o
-                0x00000000080025d8                RTC_Alarm_IRQHandler
-                0x00000000080025d8                EXTI2_IRQHandler
-                0x00000000080025d8                FMPI2C1_EV_IRQHandler
-                0x00000000080025d8                TIM1_CC_IRQHandler
-                0x00000000080025d8                DMA2_Stream5_IRQHandler
-                0x00000000080025d8                DMA1_Stream5_IRQHandler
-                0x00000000080025d8                PVD_IRQHandler
-                0x00000000080025d8                TAMP_STAMP_IRQHandler
-                0x00000000080025d8                EXTI3_IRQHandler
-                0x00000000080025d8                EXTI0_IRQHandler
-                0x00000000080025d8                I2C2_EV_IRQHandler
-                0x00000000080025d8                DMA1_Stream2_IRQHandler
-                0x00000000080025d8                FPU_IRQHandler
-                0x00000000080025d8                DMA2_Stream2_IRQHandler
-                0x00000000080025d8                SPI1_IRQHandler
-                0x00000000080025d8                TIM6_DAC_IRQHandler
-                0x00000000080025d8                TIM1_BRK_TIM9_IRQHandler
-                0x00000000080025d8                DMA2_Stream3_IRQHandler
-                0x00000000080025d8                USART6_IRQHandler
-                0x00000000080025d8                DMA2_Stream0_IRQHandler
-                0x00000000080025d8                I2C1_EV_IRQHandler
-                0x00000000080025d8                DMA1_Stream6_IRQHandler
-                0x00000000080025d8                DMA1_Stream1_IRQHandler
-                0x00000000080025d8                RCC_IRQHandler
-                0x00000000080025d8                Default_Handler
-                0x00000000080025d8                ADC_IRQHandler
-                0x00000000080025d8                DMA1_Stream7_IRQHandler
-                0x00000000080025d8                SPI5_IRQHandler
-                0x00000000080025d8                TIM5_IRQHandler
-                0x00000000080025d8                DMA2_Stream7_IRQHandler
-                0x00000000080025d8                EXTI9_5_IRQHandler
-                0x00000000080025d8                RTC_WKUP_IRQHandler
-                0x00000000080025d8                SPI2_IRQHandler
-                0x00000000080025d8                DMA1_Stream0_IRQHandler
-                0x00000000080025d8                FMPI2C1_ER_IRQHandler
-                0x00000000080025d8                EXTI4_IRQHandler
-                0x00000000080025d8                RNG_IRQHandler
-                0x00000000080025d8                TIM1_UP_IRQHandler
-                0x00000000080025d8                WWDG_IRQHandler
-                0x00000000080025d8                TIM1_TRG_COM_TIM11_IRQHandler
-                0x00000000080025d8                EXTI1_IRQHandler
-                0x00000000080025d8                USART2_IRQHandler
-                0x00000000080025d8                I2C2_ER_IRQHandler
-                0x00000000080025d8                DMA2_Stream1_IRQHandler
-                0x00000000080025d8                FLASH_IRQHandler
-                0x00000000080025d8                DMA2_Stream4_IRQHandler
-                0x00000000080025d8                USART1_IRQHandler
-                0x00000000080025d8                DMA1_Stream4_IRQHandler
-                0x00000000080025d8                I2C1_ER_IRQHandler
-                0x00000000080025d8                LPTIM1_IRQHandler
-                0x00000000080025d8                DMA2_Stream6_IRQHandler
-                0x00000000080025d8                DMA1_Stream3_IRQHandler
- *fill*         0x00000000080025da        0x2 
- .text.__errno  0x00000000080025dc        0xc c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
-                0x00000000080025dc                __errno
+                0x0000000008002538        0x2 Startup/startup_stm32f410rbtx.o
+                0x0000000008002538                RTC_Alarm_IRQHandler
+                0x0000000008002538                EXTI2_IRQHandler
+                0x0000000008002538                FMPI2C1_EV_IRQHandler
+                0x0000000008002538                TIM1_CC_IRQHandler
+                0x0000000008002538                DMA2_Stream5_IRQHandler
+                0x0000000008002538                DMA1_Stream5_IRQHandler
+                0x0000000008002538                PVD_IRQHandler
+                0x0000000008002538                TAMP_STAMP_IRQHandler
+                0x0000000008002538                EXTI3_IRQHandler
+                0x0000000008002538                EXTI0_IRQHandler
+                0x0000000008002538                I2C2_EV_IRQHandler
+                0x0000000008002538                DMA1_Stream2_IRQHandler
+                0x0000000008002538                FPU_IRQHandler
+                0x0000000008002538                DMA2_Stream2_IRQHandler
+                0x0000000008002538                SPI1_IRQHandler
+                0x0000000008002538                TIM6_DAC_IRQHandler
+                0x0000000008002538                TIM1_BRK_TIM9_IRQHandler
+                0x0000000008002538                DMA2_Stream3_IRQHandler
+                0x0000000008002538                USART6_IRQHandler
+                0x0000000008002538                DMA2_Stream0_IRQHandler
+                0x0000000008002538                I2C1_EV_IRQHandler
+                0x0000000008002538                DMA1_Stream6_IRQHandler
+                0x0000000008002538                DMA1_Stream1_IRQHandler
+                0x0000000008002538                RCC_IRQHandler
+                0x0000000008002538                Default_Handler
+                0x0000000008002538                ADC_IRQHandler
+                0x0000000008002538                DMA1_Stream7_IRQHandler
+                0x0000000008002538                SPI5_IRQHandler
+                0x0000000008002538                TIM5_IRQHandler
+                0x0000000008002538                DMA2_Stream7_IRQHandler
+                0x0000000008002538                EXTI9_5_IRQHandler
+                0x0000000008002538                RTC_WKUP_IRQHandler
+                0x0000000008002538                SPI2_IRQHandler
+                0x0000000008002538                DMA1_Stream0_IRQHandler
+                0x0000000008002538                FMPI2C1_ER_IRQHandler
+                0x0000000008002538                EXTI4_IRQHandler
+                0x0000000008002538                RNG_IRQHandler
+                0x0000000008002538                TIM1_UP_IRQHandler
+                0x0000000008002538                WWDG_IRQHandler
+                0x0000000008002538                TIM1_TRG_COM_TIM11_IRQHandler
+                0x0000000008002538                EXTI1_IRQHandler
+                0x0000000008002538                USART2_IRQHandler
+                0x0000000008002538                I2C2_ER_IRQHandler
+                0x0000000008002538                DMA2_Stream1_IRQHandler
+                0x0000000008002538                FLASH_IRQHandler
+                0x0000000008002538                DMA2_Stream4_IRQHandler
+                0x0000000008002538                USART1_IRQHandler
+                0x0000000008002538                DMA1_Stream4_IRQHandler
+                0x0000000008002538                I2C1_ER_IRQHandler
+                0x0000000008002538                LPTIM1_IRQHandler
+                0x0000000008002538                DMA2_Stream6_IRQHandler
+                0x0000000008002538                DMA1_Stream3_IRQHandler
+ *fill*         0x000000000800253a        0x2 
+ .text.__errno  0x000000000800253c        0xc c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
+                0x000000000800253c                __errno
  .text.__libc_init_array
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+                0x0000000008003070       0x20 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x0000000008003070                __sf_fake_stdout
+                0x0000000008003090                . = ALIGN (0x4)
 
-.ARM.extab      0x0000000008003130        0x0
-                0x0000000008003130                . = ALIGN (0x4)
+.ARM.extab      0x0000000008003090        0x0
+                0x0000000008003090                . = ALIGN (0x4)
  *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x0000000008003130                . = ALIGN (0x4)
+                0x0000000008003090                . = ALIGN (0x4)
 
-.ARM            0x0000000008003130        0x8
-                0x0000000008003130                . = ALIGN (0x4)
-                0x0000000008003130                __exidx_start = .
+.ARM            0x0000000008003090        0x8
+                0x0000000008003090                . = ALIGN (0x4)
+                0x0000000008003090                __exidx_start = .
  *(.ARM.exidx*)
- .ARM.exidx     0x0000000008003130        0x8 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
-                0x0000000008003138                __exidx_end = .
-                0x0000000008003138                . = ALIGN (0x4)
+ .ARM.exidx     0x0000000008003090        0x8 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+                0x0000000008003098                __exidx_end = .
+                0x0000000008003098                . = ALIGN (0x4)
 
-.rel.dyn        0x0000000008003138        0x0
- .rel.iplt      0x0000000008003138        0x0 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+.rel.dyn        0x0000000008003098        0x0
+ .rel.iplt      0x0000000008003098        0x0 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
 
-.preinit_array  0x0000000008003138        0x0
-                0x0000000008003138                . = ALIGN (0x4)
-                0x0000000008003138                PROVIDE (__preinit_array_start = .)
+.preinit_array  0x0000000008003098        0x0
+                0x0000000008003098                . = ALIGN (0x4)
+                0x0000000008003098                PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x0000000008003138                PROVIDE (__preinit_array_end = .)
-                0x0000000008003138                . = ALIGN (0x4)
+                0x0000000008003098                PROVIDE (__preinit_array_end = .)
+                0x0000000008003098                . = ALIGN (0x4)
 
-.init_array     0x0000000008003138        0x4
-                0x0000000008003138                . = ALIGN (0x4)
-                0x0000000008003138                PROVIDE (__init_array_start = .)
+.init_array     0x0000000008003098        0x4
+                0x0000000008003098                . = ALIGN (0x4)
+                0x0000000008003098                PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x0000000008003138        0x4 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-                0x000000000800313c                PROVIDE (__init_array_end = .)
-                0x000000000800313c                . = ALIGN (0x4)
+ .init_array    0x0000000008003098        0x4 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+                0x000000000800309c                PROVIDE (__init_array_end = .)
+                0x000000000800309c                . = ALIGN (0x4)
 
-.fini_array     0x000000000800313c        0x4
-                0x000000000800313c                . = ALIGN (0x4)
+.fini_array     0x000000000800309c        0x4
+                0x000000000800309c                . = ALIGN (0x4)
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x000000000800313c        0x4 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ .fini_array    0x000000000800309c        0x4 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x0000000008003140                . = ALIGN (0x4)
-                0x0000000008003140                _sidata = LOADADDR (.data)
+                0x00000000080030a0                . = ALIGN (0x4)
+                0x00000000080030a0                _sidata = LOADADDR (.data)
 
-.data           0x0000000020000000       0x9c load address 0x0000000008003140
+.data           0x0000000020000000       0x9c load address 0x00000000080030a0
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
@@ -3249,11 +3249,11 @@ LOAD c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x000000002000009c                . = ALIGN (0x4)
                 0x000000002000009c                _edata = .
 
-.igot.plt       0x000000002000009c        0x0 load address 0x00000000080031dc
+.igot.plt       0x000000002000009c        0x0 load address 0x000000000800313c
  .igot.plt      0x000000002000009c        0x0 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
                 0x000000002000009c                . = ALIGN (0x4)
 
-.bss            0x000000002000009c       0x8c load address 0x00000000080031dc
+.bss            0x000000002000009c       0x8c load address 0x000000000800313c
                 0x000000002000009c                _sbss = .
                 0x000000002000009c                __bss_start__ = _sbss
  *(.bss)
@@ -3296,7 +3296,7 @@ LOAD c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000020000128                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020000128      0x600 load address 0x00000000080031dc
+                0x0000000020000128      0x600 load address 0x000000000800313c
                 0x0000000020000128                . = ALIGN (0x8)
                 0x0000000020000128                PROVIDE (end = .)
                 [!provide]                        PROVIDE (_end = .)
@@ -3584,21 +3584,21 @@ OUTPUT(STM32F410RB_PLLCtrl_Test.elf elf32-littlearm)
  .debug_macro   0x0000000000014ad4      0x23b Src/sysmem.o
  .debug_macro   0x0000000000014d0f      0x1c0 Src/system_stm32f4xx.o
 
-.debug_line     0x0000000000000000     0x74b4
+.debug_line     0x0000000000000000     0x7477
  .debug_line    0x0000000000000000      0x88b Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
  .debug_line    0x000000000000088b      0x9b4 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .debug_line    0x000000000000123f      0x80b Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .debug_line    0x0000000000001a4a      0x8d6 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
  .debug_line    0x0000000000002320      0x884 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
  .debug_line    0x0000000000002ba4      0xf87 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
- .debug_line    0x0000000000003b2b      0xae6 Src/adf4153.o
- .debug_line    0x0000000000004611      0x92e Src/main.o
- .debug_line    0x0000000000004f3f      0x898 Src/stm32f4xx_hal_msp.o
- .debug_line    0x00000000000057d7      0x91f Src/stm32f4xx_it.o
- .debug_line    0x00000000000060f6      0x73d Src/syscalls.o
- .debug_line    0x0000000000006833      0x559 Src/sysmem.o
- .debug_line    0x0000000000006d8c      0x6a7 Src/system_stm32f4xx.o
- .debug_line    0x0000000000007433       0x81 Startup/startup_stm32f410rbtx.o
+ .debug_line    0x0000000000003b2b      0xab3 Src/adf4153.o
+ .debug_line    0x00000000000045de      0x925 Src/main.o
+ .debug_line    0x0000000000004f03      0x898 Src/stm32f4xx_hal_msp.o
+ .debug_line    0x000000000000579b      0x91e Src/stm32f4xx_it.o
+ .debug_line    0x00000000000060b9      0x73d Src/syscalls.o
+ .debug_line    0x00000000000067f6      0x559 Src/sysmem.o
+ .debug_line    0x0000000000006d4f      0x6a7 Src/system_stm32f4xx.o
+ .debug_line    0x00000000000073f6       0x81 Startup/startup_stm32f410rbtx.o
 
 .debug_str      0x0000000000000000    0x77d4d
  .debug_str     0x0000000000000000    0x6ff6b Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
@@ -3646,7 +3646,7 @@ OUTPUT(STM32F410RB_PLLCtrl_Test.elf elf32-littlearm)
  .comment       0x000000000000007b       0x7c Src/sysmem.o
  .comment       0x000000000000007b       0x7c Src/system_stm32f4xx.o
 
-.debug_frame    0x0000000000000000     0x2358
+.debug_frame    0x0000000000000000     0x235c
  .debug_frame   0x0000000000000000      0x374 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
  .debug_frame   0x0000000000000374      0x498 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .debug_frame   0x000000000000080c      0x14c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
@@ -3654,36 +3654,36 @@ OUTPUT(STM32F410RB_PLLCtrl_Test.elf elf32-littlearm)
  .debug_frame   0x0000000000000b48      0x120 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
  .debug_frame   0x0000000000000c68      0x83c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
  .debug_frame   0x00000000000014a4      0x1e8 Src/adf4153.o
- .debug_frame   0x000000000000168c      0x118 Src/main.o
- .debug_frame   0x00000000000017a4       0x7c Src/stm32f4xx_hal_msp.o
- .debug_frame   0x0000000000001820      0x128 Src/stm32f4xx_it.o
- .debug_frame   0x0000000000001948      0x2ac Src/syscalls.o
- .debug_frame   0x0000000000001bf4       0x34 Src/sysmem.o
- .debug_frame   0x0000000000001c28       0x58 Src/system_stm32f4xx.o
- .debug_frame   0x0000000000001c80       0x20 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o)
- .debug_frame   0x0000000000001ca0       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
- .debug_frame   0x0000000000001ccc       0x20 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
- .debug_frame   0x0000000000001cec       0x3c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-puts.o)
- .debug_frame   0x0000000000001d28       0x20 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-setbuf.o)
- .debug_frame   0x0000000000001d48       0x38 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-setvbuf.o)
- .debug_frame   0x0000000000001d80       0x40 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
- .debug_frame   0x0000000000001dc0       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
- .debug_frame   0x0000000000001dec       0x68 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
- .debug_frame   0x0000000000001e54      0x11c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
- .debug_frame   0x0000000000001f70       0x54 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
- .debug_frame   0x0000000000001fc4       0x58 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
- .debug_frame   0x000000000000201c       0x30 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
- .debug_frame   0x000000000000204c       0x38 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
- .debug_frame   0x0000000000002084       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
- .debug_frame   0x00000000000020b0       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
- .debug_frame   0x00000000000020dc       0x88 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
- .debug_frame   0x0000000000002164       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
- .debug_frame   0x0000000000002190       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
- .debug_frame   0x00000000000021bc       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
- .debug_frame   0x00000000000021e8       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
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+ .debug_frame   0x000000000000168c      0x11c Src/main.o
+ .debug_frame   0x00000000000017a8       0x7c Src/stm32f4xx_hal_msp.o
+ .debug_frame   0x0000000000001824      0x128 Src/stm32f4xx_it.o
+ .debug_frame   0x000000000000194c      0x2ac Src/syscalls.o
+ .debug_frame   0x0000000000001bf8       0x34 Src/sysmem.o
+ .debug_frame   0x0000000000001c2c       0x58 Src/system_stm32f4xx.o
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+ .debug_frame   0x00000000000021ec       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+ .debug_frame   0x0000000000002218       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+ .debug_frame   0x0000000000002244       0x30 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+ .debug_frame   0x0000000000002274       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+ .debug_frame   0x00000000000022a0       0x5c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-reent.o)
+ .debug_frame   0x00000000000022fc       0x2c c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o)
+ .debug_frame   0x0000000000002328       0x34 c:/st/stm32cubeide_1.0.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.0.0.201904181610/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)

Debug/Src/adf4153.su

@@ -9,4 +9,4 @@ adf4153.c:550:9:ADF4153_GetRcounter	4	static
 adf4153.c:553:9:ADF4153_SetRcounter	16	static
 adf4153.c:557:15:ADF4153_GetRefIn	4	static
 adf4153.c:560:6:ADF4153_SetRefIn	16	static
-adf4153.c:671:6:ADF_Module_Ctrl	24	static
+adf4153.c:760:6:ADF_Module_Ctrl	24	static

Debug/Src/main.su

@@ -1,8 +1,8 @@
 main.c:84:5:_write	24	static
-main.c:97:6:HAL_GPIO_EXTI_Callback	24	static
+main.c:97:6:HAL_GPIO_EXTI_Callback	48	static
 main.c:110:5:main	40	static
-main.c:185:6:SystemClock_Config	88	static
-main.c:229:13:MX_NVIC_Init	8	static
-main.c:241:13:MX_USART2_UART_Init	8	static
-main.c:274:13:MX_GPIO_Init	48	static
-main.c:326:6:Error_Handler	4	static
+main.c:188:6:SystemClock_Config	88	static
+main.c:232:13:MX_NVIC_Init	8	static
+main.c:244:13:MX_USART2_UART_Init	8	static
+main.c:277:13:MX_GPIO_Init	48	static
+main.c:329:6:Error_Handler	4	static

Debug/Startup/subdir.mk

@@ -12,5 +12,5 @@ OBJS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Startup/%.o: ../Startup/%.s
-	arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -x assembler-with-cpp --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
+	arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -I../ -x assembler-with-cpp --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
 

STM32F410RBTX_FLASH.ld

@@ -55,8 +55,8 @@ ENTRY(Reset_Handler)
 /* Highest address of the user mode stack */
 _estack = 0x20008000;	/* end of "RAM" Ram type memory */
 
-_Min_Heap_Size = 0x200 ;	/* required amount of heap  */
-_Min_Stack_Size = 0x400 ;	/* required amount of stack */
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
 
 /* Memories definition */
 MEMORY

STM32F410RB_PLLCtrl_Test.ioc

@@ -43,11 +43,8 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_0
 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
-PA12.GPIOParameters=GPIO_PuPd,GPIO_ModeDefaultEXTI
-PA12.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PA12.GPIO_PuPd=GPIO_PULLUP
 PA12.Locked=true
-PA12.Signal=GPXTI12
+PA12.Signal=GPIO_Input
 PA13.GPIOParameters=GPIO_Label
 PA13.GPIO_Label=TMS
 PA13.Locked=true
@@ -178,8 +175,6 @@ RCC.VCOOutputFreq_Value=336000000
 RCC.VCOQOutputFreq_Value=84000000
 RCC.VCOROutputFreq_Value=168000000
 RCC.VcooutputI2S=96000000
-SH.GPXTI12.0=GPIO_EXTI12
-SH.GPXTI12.ConfNb=1
 SH.GPXTI13.0=GPIO_EXTI13
 SH.GPXTI13.ConfNb=1
 USART2.IPParameters=VirtualMode

Src/adf4153.c

@@ -667,7 +667,7 @@ void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint
 
 }
 #else
-
+#if 0
 void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
 
     HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
@@ -756,5 +756,72 @@ void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint
     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);      
 
 }
+#else
+void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
 
+    R3  = R3  & 0x0007FF;
+    R2 = R2 & 0x00FFFF;
+    R1 = R1 & 0xFFFFFF;
+    R0 = R0 & 0xFFFFFF;
+    
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+    /*   R3 Ctrl    */
+    for(int i =0; i < 11; i++){
+        if(R3 & 0x000700)
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        else
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+        R3 = ((R3 << 1) & 0x00000FFF);
+    }
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+    
+    /*   R2 Ctrl    */
+     for(int i =0; i < 16; i++){
+         if(R2 & 0x008000)
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+         else
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         R2 = ((R2 << 1) & 0x00FFFF);
+     }
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+    
+     /*   R1 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R1 & 0x800000)
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        else
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+        R1 = ((R1 << 1) & 0xFFFFFF);
+    }
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+
+
+        /*   R0 Ctrl    */
+   
+    for(int i =0; i < 24; i++){
+        if(R0 & 0x800000)
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        else
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+        R0 = ((R0 << 1) & 0xFFFFFF);
+    }
+
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+
+}
+#endif
 #endif // PYJ.2019.07.22_END -- 

Src/main.c

@@ -97,7 +97,7 @@ PLL_Setting_st Pll_test = {
 void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
 {
     if(GPIO_Pin == GPIO_PIN_12){
-        ADF4153_Init(ADF4153_st);
+    	 ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
     }
 }
 
@@ -154,9 +154,12 @@ int main(void)
 	  printf("\r\nUART Start \r\n");
 	  HAL_Delay(100000);
 */
+	 // if(HAL_GPIO_ReadPin(GPIOA,GPIO_PIN_12) ==   GPIO_PIN_SET){
 
-	  HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_3);
-	  HAL_Delay(1000);
+//	  }else{
+	//	  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
+  		  HAL_Delay(1);
+	//  }
 //	  HAL_Delay(??1);
 
 //        HAL_GPIO_TogglePin(Pll_test.PLL_DATA_PORT, Pll_test.PLL_DATA_PIN);
@@ -309,8 +312,8 @@ static void MX_GPIO_Init(void)
 
   /*Configure GPIO pin : PA12 */
   GPIO_InitStruct.Pin = GPIO_PIN_12;
-  GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
 }

Src/stm32f4xx_it.c

@@ -205,7 +205,6 @@ void EXTI15_10_IRQHandler(void)
   /* USER CODE BEGIN EXTI15_10_IRQn 0 */
 
   /* USER CODE END EXTI15_10_IRQn 0 */
-  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);
   HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
   /* USER CODE BEGIN EXTI15_10_IRQn 1 */
 

insight/STM32F410RB_PLLCtrl_Test.si4project/Backup/adf4153(4897).c

@@ -0,0 +1,849 @@
+/******************************************************************************
+*   @file   ADF4153.c
+*   @brief  Implementation of ADF4153 Driver for Microblaze processor.
+*   @author Istvan Csomortani (istvan.csomortani@analog.com)
+*
+*******************************************************************************
+* Copyright 2013(c) Analog Devices, Inc.
+*
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*  - Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*  - Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in
+*    the documentation and/or other materials provided with the
+*    distribution.
+*  - Neither the name of Analog Devices, Inc. nor the names of its
+*    contributors may be used to endorse or promote products derived
+*    from this software without specific prior written permission.
+*  - The use of this software may or may not infringe the patent rights
+*    of one or more patent holders.  This license does not release you
+*    from the requirement that you obtain separate licenses from these
+*    patent holders to use this software.
+*  - Use of the software either in source or binary form, must be run
+*    on or directly connected to an Analog Devices Inc. component.
+*
+* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
+* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
+* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+* INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/****************************** Include Files ********************************/
+/*****************************************************************************/
+#include "adf4153.h"
+
+/* For round up division */
+#define CEIL(a, b) (((a) / (b)) + (((a) % (b)) > 0 ? 1 : 0))
+
+#define DATA_MASK_MSB8      0xFF0000
+#define DATA_OFFSET_MSB8    16
+#define DATA_MASK_MID8      0xFF00
+#define DATA_OFFSET_MID8    8
+#define DATA_MASK_LSB8      0xFF
+#define DATA_OFFSET_LSB8    0
+#define ADDRESS_MASK        3
+
+#define FREQ_2_GHZ          2000000000
+
+/*****************************************************************************/
+/**************************** Private variables ******************************/
+/*****************************************************************************/
+
+/* RF input frequency limits */
+long ADF4153_RFIN_MIN_FRQ = 10000000;           // 10 Mhz
+long ADF4153_RFIN_MAX_FRQ = 250000000;          // 250 Mhz
+/* Maximum PFD frequency */
+long ADF4153_PFD_MAX_FRQ = 32000000;            // 32 Mhz
+/* VCO out frequency limits */
+long ADF4153_VCO_MIN_FRQ = 500000000;           // 500 Mhz
+long long ADF4153_VCO_MAX_FRQ = 4000000000;     // 4 Ghz
+
+/* maximum interpolator modulus value */
+short ADF4153_MOD_MAX    = 4095;                // the MOD is stored in 12 bits
+
+/* Reference input frequency */
+unsigned long refIn = 0;
+unsigned long channelSpacing = 0;
+uint8_t R_Counter = 0;;
+
+/* Internal buffers for each latch */
+unsigned long r0 = 0;               /* the actual value of N Divider Register */
+unsigned long r1 = 0;               /* the actual value of R Divider Register */
+unsigned long r2 = 0;               /* the actual value of Control Register */
+unsigned long r3 = 0;               /* the actual value of Noise and Spur Reg*/
+
+/*****************************************************************************/
+/*************************** Functions definitions ***************************/
+/*****************************************************************************/
+
+/**************************************************************************//**
+ * @brief Initialize SPI and Initial Values for ADF4106 Board.
+ *
+ * @param  ADF4106_st    - the structure with the initial set up values of the
+ *                         registers
+ *
+ * @return success
+******************************************************************************/
+char ADF4153_Init(ADF4153_settings_t ADF4153_st)
+{
+    char status = -1;
+
+    /* CPHA = 1; CPOL = 0; */
+    /* Set up the reference input frequency */
+    refIn = ADF4153_st.refIn;
+    channelSpacing = ADF4153_st.channelSpacing;
+    R_Counter = ADF4153_st.rCounter;
+
+    /* Write all zeros to the noise and spur register */
+    ADF4153_UpdateLatch(ADF4153_CTRL_NOISE_SPUR |
+                        0x0);
+    /* selects the lowest noise mode by default */
+    ADF4153_UpdateLatch(ADF4153_CTRL_NOISE_SPUR |
+                        0x3C7);
+    /* Set up the control register and enable the counter reset */
+    ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
+                        ADF4153_R2_COUNTER_RST(ADF4153_CR_ENABLED) |
+                        ADF4153_R2_CP_3STATE(ADF4153_st.cpThreeState) |
+                        ADF4153_R2_POWER_DOWN(ADF4153_st.powerDown) |
+                        ADF4153_R2_LDP(ADF4153_st.ldp) |
+                        ADF4153_R2_PD_POL(ADF4153_st.pdPolarity) |
+                        ADF4153_R2_CP_CURRENT(ADF4153_st.cpCurrent) |
+                        ADF4153_R2_REF_DOUBLER(ADF4153_st.refDoubler) |
+                        ADF4153_R2_RESYNC(ADF4153_st.resync)
+                        );
+    /* If resync feature is enabled */
+    if(ADF4153_st.resync != 0x0)
+    {
+        /* Load the R divider register */
+        ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
+                            ADF4153_R1_MOD(10) |    //Resync Delay
+                            ADF4153_R1_RCOUNTER(ADF4153_st.rCounter) |
+                            ADF4153_R1_PRESCALE(ADF4153_st.prescaler) |
+                            ADF4153_R1_MUXOUT(ADF4153_st.muxout) |
+                            ADF4153_R1_LOAD(ADF4153_LOAD_RESYNC)
+                            );
+    }
+    /* Load the R divider register */
+    ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
+                        ADF4153_R1_MOD(ADF4153_st.modValue) |
+                        ADF4153_R1_RCOUNTER(ADF4153_st.rCounter) |
+                        ADF4153_R1_PRESCALE(ADF4153_st.prescaler) |
+                        ADF4153_R1_MUXOUT(ADF4153_st.muxout) |
+                        ADF4153_R1_LOAD(ADF4153_LOAD_NORMAL)
+                        );
+    /* Load the N divider register */
+    ADF4153_UpdateLatch(ADF4153_CTRL_N_DIVIDER |
+                        ADF4153_R0_FRAC(ADF4153_st.fracValue) |
+                        ADF4153_R0_INT(ADF4153_st.intValue) |
+                        ADF4153_R0_FASTLOCK(ADF4153_st.fastlock)
+                        );
+
+    /* Disable the counter reset in the Control Register */
+    r2 &= ~ADF4153_R2_COUNTER_RST(ADF4153_R2_COUNTER_RST_MASK);
+    ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
+                        r2 |
+                        ADF4153_R2_COUNTER_RST(ADF4153_CR_DISABLED)
+                        );
+return status;
+}
+
+/**************************************************************************//**
+ * @brief Update one of the latch via the SPI interface
+ *
+ * @param   latchData - the data which will be written to the latch
+ *
+ * @return
+******************************************************************************/
+void ADF4153_UpdateLatch(unsigned long latchData)
+{
+    unsigned char dataBuffer[3] = {0,};
+    unsigned char latchType = latchData & 0x3;
+
+    /* Update the internal buffers */
+    switch(latchType)
+    {
+        case ADF4153_CTRL_N_DIVIDER :
+            r0 = latchData;
+            break;
+        case ADF4153_CTRL_R_DIVIDER :
+            r1 = latchData;
+            break;
+        case ADF4153_CTRL_CONTROL :
+            r2 = latchData;
+            break;
+        case ADF4153_CTRL_NOISE_SPUR :
+            r3 = latchData;
+            break;
+    }
+
+    dataBuffer[0] = (latchData & DATA_MASK_MSB8) >> DATA_OFFSET_MSB8;
+    dataBuffer[1] = (latchData & DATA_MASK_MID8) >> DATA_OFFSET_MID8;
+    dataBuffer[2] = (latchData & DATA_MASK_LSB8) >> DATA_OFFSET_LSB8;
+
+
+    /* Generate a load pulse */
+}
+
+/***************************************************************************//**
+ * @brief Return the value of a desired latch
+ *
+ * @param   param[0] - the type of the latch:
+ *                      0 - 'ADF4153_CTRL_N_DIVIDER'
+ *                      1 - 'ADF4153_CTRL_R_DIVIDER'
+ *                      2 - 'ADF4153_CTRL_CONTROL'
+ *                      3 - 'ADF4153_CTRL_NOISE_SPUR'
+ *
+ * @return latchValue - the value of the desired latch
+*******************************************************************************/
+unsigned long ADF4153_ReadLatch(unsigned char latchType)
+{
+    switch(latchType)
+    {
+        case ADF4153_CTRL_N_DIVIDER :
+            return r0;
+
+        case ADF4153_CTRL_R_DIVIDER :
+            return r1;
+
+        case ADF4153_CTRL_CONTROL :
+            return r2;
+
+        case ADF4153_CTRL_NOISE_SPUR :
+            return r3;
+
+        default :
+            return -1;
+    }
+}
+
+/***************************************************************************//**
+ * @brief Increases the R counter value until the ADF4106_PDF_MAX_FREQ is
+ *        greater than PFD frequency.
+ *
+ * @param rCounter - pointer of the R counter variable.
+ *
+ * @return pfdFrequency - The value of the PFD frequency.
+*******************************************************************************/
+unsigned long ADF4153_TuneRcounter(unsigned short *rCounter)
+{
+    unsigned long pfdFrequency = 0;              // PFD frequency
+    unsigned char refDoubler = 0;                // Reference Doubler
+
+    refDoubler = (r2 & ADF4153_R2_REF_DOUBLER(ADF4153_R2_RESYNC_MASK)) >> \
+                  ADF4153_R2_REF_DOUBLER_OFFSET; // the actual reference doubler
+    do
+    {
+        (*rCounter)++;
+        pfdFrequency = refIn * ((float)(1 + refDoubler) / (*rCounter));
+    }
+    while(pfdFrequency > ADF4153_PFD_MAX_FRQ);
+
+return pfdFrequency;
+}
+
+/***************************************************************************//**
+ * @brief Sets the output frequency.
+ *
+ * @param frequency - The desired frequency value.
+ *
+ * @return calculatedFrequency - The actual frequency value that was set.
+*******************************************************************************/
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+unsigned long long ADF4153_SetFrequency(uint64_t frequency)
+{
+    uint64_t vcoFrequency        = 0;     // VCO frequency
+    unsigned long      pfdFrequency        = 0;     // PFD frequency
+    unsigned long long calculatedFrequency = 0;     // Actual VCO frequency
+    unsigned long      intValue            = 0;     // INT value
+    unsigned long      fracValue           = 0;     // FRAC value
+    unsigned long      modValue            = 0;     // MOD value
+    unsigned short     rCounter            = 0;     // R Counter
+    float              buffer              = 0;
+    unsigned char      devicePrescaler     = 0;
+    unsigned char      intMin              = 0;
+    /* validate the given frequency parameter */
+    /* validate the given frequency parameter */
+	if(frequency <= ADF4153_VCO_MAX_FRQ)
+	{
+		if(frequency >= ADF4153_VCO_MIN_FRQ)
+		{
+			vcoFrequency = frequency;
+		}
+		else
+		{
+			vcoFrequency = ADF4153_VCO_MIN_FRQ;
+		}
+	}
+	else
+	{
+		vcoFrequency = ADF4153_VCO_MAX_FRQ;
+	}
+    /* define the value of MOD */
+    modValue = CEIL(refIn, channelSpacing);
+    /* if the modValue is too high, increase the channel spacing */
+    if(modValue > ADF4153_MOD_MAX)
+    {
+        do{
+            channelSpacing++;
+            modValue = CEIL(refIn, channelSpacing);
+        }while(modValue <= ADF4153_MOD_MAX);
+    }
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+        printf("modValue :  %d\r\n" ,modValue );
+#endif // PYJ.2019.07.22_END -- 
+    /* define prescaler */
+    devicePrescaler = (vcoFrequency <= FREQ_2_GHZ) ? ADF4153_PRESCALER_4_5 : \
+                                                     ADF4153_PRESCALER_8_9;
+    intMin = (devicePrescaler == ADF4153_PRESCALER_4_5) ? 31 : 91;
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+    if(devicePrescaler)
+        printf("ADF4153_PRESCALER_8_9\r\n");
+    else
+        printf("ADF4153_PRESCALER_4_5\r\n");
+#endif // PYJ.2019.07.22_END -- 
+    /* define the PFD frequency, R counter ant INT value */
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+    do
+    {
+        /* define the PFD frequency and R Counter, using the TuneRCounter() */
+        pfdFrequency = ADF4153_TuneRcounter(&rCounter);
+        intValue = vcoFrequency / pfdFrequency;
+    }while(intValue < intMin);
+#endif // PYJ.2019.07.22_END -- ]
+    pfdFrequency = refIn;
+    intValue = (vcoFrequency / (pfdFrequency / 1000)) / 1000;
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+    printf("pfdFrequency :  %d\r\n" ,pfdFrequency );
+    printf("intValue :  %d\r\n" ,intValue );
+#endif // PYJ.2019.07.22_END -- 
+    /*define FRAC value */
+    do
+    {
+        fracValue++;
+        buffer = intValue + ((float)fracValue/modValue);
+        calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
+    }while(calculatedFrequency <= vcoFrequency);
+    fracValue--;
+
+    /* Find the actual VCO frequency. */
+    buffer = intValue + ((float)fracValue/modValue);
+    calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+    printf("fracValue :  %d\r\n" ,fracValue );
+#endif // PYJ.2019.07.22_END -- 
+
+    /* Enable the Counter Reset */
+    ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
+                        r2 |
+                        ADF4153_R2_COUNTER_RST(ADF4153_CR_ENABLED));
+
+    /* Load the R divider with the new values */
+    r1 &= (~ADF4153_R1_MOD(ADF4153_R1_MOD_MASK) &
+           ~ADF4153_R1_RCOUNTER(ADF4153_R1_RCOUNTER_MASK) &
+           ~ADF4153_R1_PRESCALE(ADF4153_R1_PRESCALE_MASK));
+    ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
+                        r1 |
+                        ADF4153_R1_MOD(modValue) |
+                        ADF4153_R1_RCOUNTER(rCounter) |
+                        ADF4153_R1_PRESCALE(devicePrescaler));
+
+    /* Load the N divider with the new values */
+    r0 &= (~ADF4153_R0_FRAC(ADF4153_R0_FRAC_MASK) &
+           ~ADF4153_R0_INT(ADF4153_R0_INT_MASK));
+    ADF4153_UpdateLatch(ADF4153_CTRL_N_DIVIDER |
+                        r0 |
+                        ADF4153_R0_FRAC(fracValue) |
+                        ADF4153_R0_INT(intValue));
+    /* Disable the Counter Reset */
+    r2 &= ~ADF4153_R2_COUNTER_RST(ADF4153_R2_COUNTER_RST_MASK);
+    ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
+                        r2 |
+                        ADF4153_R2_COUNTER_RST(ADF4153_CR_DISABLED));
+    printf("calculatedFrequency :  %d\r\n" ,calculatedFrequency );
+
+    return calculatedFrequency;
+}
+#else
+
+typedef struct _Bluecell_t {
+    /* R1 */
+    uint8_t ADF4153_Control0   : 2;
+    uint16_t ADF4153_FRAC      : 12;
+    uint16_t ADF4153_INT       : 9;
+    uint8_t  ADF4153_FASTLOCK   : 1;    
+    /* R1 */
+    uint8_t ADF4153_Control1    : 2;
+    uint16_t ADF4153_MOD        : 12;
+    uint8_t ADF4153_Rcounter    : 4;
+    uint8_t ADF4153_Prescale    : 1;    
+    uint8_t ADF4153_Reserve     : 1;
+    uint8_t ADF4153_Muxout      : 3;
+    uint8_t ADF4153_LoadControl : 1;    
+
+} Bluecell_t;
+Bluecell_t Curr_val_st = {
+    0,//  uint8_t ADF4153_Control0   : 2;
+    0,// uint16_t ADF4153_FRAC      : 12;
+    0,//uint16_t ADF4153_INT       : 4;
+    0,//uint16_t ADF4153_FASTLOCK  : 4;    
+
+    0,//uint8_t ADF4153_Control1    : 2;
+    0,//uint16_t ADF4153_MOD        : 12;
+    0,//uint8_t ADF4153_Rcounter    : 4;
+    0,//uint16_t ADF4153_MOD        : 12;
+    0,//uint8_t ADF4153_Rcounter    : 4;
+    0,//uint8_t ADF4153_Prescale    : 1;   
+    0,//uint8_t ADF4153_Reserve     : 1;
+    0,//uint8_t ADF4153_Muxout      : 3;
+    0,//uint8_t ADF4153_LoadControl : 1;    
+
+};
+ADF4153_settings_t Curr_set_st;
+
+unsigned long long ADF4153_SetFrequency(unsigned long long frequency)
+{
+    unsigned long long vcoFrequency        = 0;     // VCO frequency
+    unsigned long      pfdFrequency        = 0;     // PFD frequency
+    unsigned long long calculatedFrequency = 0;     // Actual VCO frequency
+    unsigned long      intValue            = 0;     // INT value
+    unsigned long      fracValue           = 0;     // FRAC value
+    unsigned long      modValue            = 0;     // MOD value
+    unsigned short     rCounter            = ADF4153_GetRcounter();     // R Counter
+    float              buffer              = 0;
+    unsigned char      devicePrescaler     = 0;
+    unsigned char      intMin              = 0;
+    /* validate the given frequency parameter */
+    if(frequency <= ADF4153_VCO_MAX_FRQ)
+    {
+        if(frequency >= ADF4153_VCO_MIN_FRQ)
+        {
+            vcoFrequency = frequency;
+        }
+        else
+        {
+            vcoFrequency = ADF4153_VCO_MIN_FRQ;
+        }
+    }
+    else
+    {
+        vcoFrequency = ADF4153_VCO_MAX_FRQ;
+    }
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+    printf("vcoFrequency :  %d Mhz\r\n" ,(uint32_t)(vcoFrequency/1000000) );
+#endif // PYJ.2019.07.22_END -- 
+
+    /* define the value of MOD */
+    modValue = CEIL(refIn, channelSpacing);
+    /* if the modValue is too high, increase the channel spacing */
+    if(modValue > ADF4153_MOD_MAX)
+    {
+        do{
+            channelSpacing++;
+            modValue = CEIL(refIn, channelSpacing);
+        }while(modValue <= ADF4153_MOD_MAX);
+    }
+    Curr_val_st.ADF4153_MOD = Curr_set_st.modValue = modValue;
+ 
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+    printf("modValue :  %d\r\n" ,modValue );
+#endif // PYJ.2019.07.22_END -- 
+    /* define prescaler */
+    devicePrescaler = (vcoFrequency <= FREQ_2_GHZ) ? ADF4153_PRESCALER_4_5 : \
+                                                     ADF4153_PRESCALER_8_9;
+    intMin = (devicePrescaler == ADF4153_PRESCALER_4_5) ? 31 : 91;
+    Curr_val_st.ADF4153_Prescale = Curr_set_st.prescaler = devicePrescaler;
+
+    
+    /* define the PFD frequency, R counter ant INT value */
+    do
+    {
+        /* define the PFD frequency and R Counter, using the TuneRCounter() */
+        pfdFrequency = ADF4153_TuneRcounter(&rCounter);
+        intValue = vcoFrequency / pfdFrequency;
+    }while(intValue < intMin);
+    Curr_set_st.intValue = Curr_val_st.ADF4153_INT = intValue;
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+     printf("pfdFrequency :  %d\r\n" ,pfdFrequency );
+    printf("intValue :  %d\r\n" ,intValue );
+#endif // PYJ.2019.07.22_END -- 
+    /*define FRAC value */
+    do
+    {
+        fracValue++;
+        buffer = intValue + ((float)fracValue/modValue);
+        calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
+    }while(calculatedFrequency <= vcoFrequency);
+    fracValue--;
+    Curr_set_st.fracValue = Curr_val_st.ADF4153_FRAC = fracValue;
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+    printf("fracValue :  %d Mhz\r\n" ,fracValue);
+#endif // PYJ.2019.07.22_END -- 
+
+    /* Find the actual VCO frequency. */
+    buffer = intValue + ((float)fracValue/modValue);
+    calculatedFrequency = (unsigned long long)(buffer * pfdFrequency);
+
+    /* Enable the Counter Reset */
+    ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
+                        r2 |
+                        ADF4153_R2_COUNTER_RST(ADF4153_CR_ENABLED));
+
+    /* Load the R divider with the new values */
+    r1 &= (~ADF4153_R1_MOD(ADF4153_R1_MOD_MASK) &
+           ~ADF4153_R1_RCOUNTER(ADF4153_R1_RCOUNTER_MASK) &
+           ~ADF4153_R1_PRESCALE(ADF4153_R1_PRESCALE_MASK));
+    ADF4153_UpdateLatch(ADF4153_CTRL_R_DIVIDER |
+                        r1 |
+                        ADF4153_R1_MOD(modValue) |
+                        ADF4153_R1_RCOUNTER(rCounter) |
+                        ADF4153_R1_PRESCALE(devicePrescaler));
+
+    /* Load the N divider with the new values */
+    r0 &= (~ADF4153_R0_FRAC(ADF4153_R0_FRAC_MASK) &
+           ~ADF4153_R0_INT(ADF4153_R0_INT_MASK));
+    ADF4153_UpdateLatch(ADF4153_CTRL_N_DIVIDER |
+                        r0 |
+                        ADF4153_R0_FRAC(fracValue) |
+                        ADF4153_R0_INT(intValue));
+    /* Disable the Counter Reset */
+    r2 &= ~ADF4153_R2_COUNTER_RST(ADF4153_R2_COUNTER_RST_MASK);
+    ADF4153_UpdateLatch(ADF4153_CTRL_CONTROL |
+                        r2 |
+                        ADF4153_R2_COUNTER_RST(ADF4153_CR_DISABLED));
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+     printf("calculatedFrequency :  %d Mhz\r\n" ,(uint32_t)(calculatedFrequency/1000000) );
+#endif // PYJ.2019.07.22_END -- 
+
+    return calculatedFrequency;
+}
+
+#endif // PYJ.2019.07.22_END -- 
+
+/***************************************************************************//**
+ * @brief Return the value of the channel spacing
+ *
+ * @param frequency - The desired frequency value.
+ *
+ * @return calculatedFrequency - The actual frequency value that was set.
+*******************************************************************************/
+unsigned long ADF4153_GetChannelSpacing( void )
+{
+    return channelSpacing;
+}
+void ADF4153_SetChannelSpacing( unsigned long val)
+{
+    channelSpacing = val;
+}
+
+uint8_t ADF4153_GetRcounter(void){
+    return R_Counter;
+}
+uint8_t ADF4153_SetRcounter(uint8_t val){
+    R_Counter = val;
+}
+
+unsigned long ADF4153_GetRefIn(void){
+    return refIn;
+}
+void ADF4153_SetRefIn(unsigned long val){
+    refIn = val;
+}
+
+
+#if 0 // PYJ.2019.07.22_BEGIN -- 
+void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
+
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);  
+   R3  = R3  & 0x0007FF;
+    /*   R3 Ctrl    */
+   printf("\r\nR3 :  ");
+    for(int i =0; i < 24; i++){
+        if(R3 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+            printf("1");
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+            printf("0");
+        }
+        HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+        HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+        R3 = ((R3 << 1) & 0xFFFFFF);
+    }   
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);    
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+    HAL_Delay(1);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);          
+     R2 = R2 & 0x00FFFF;
+    /*   R2 Ctrl    */
+        printf("\r\nR2 :  ");
+     for(int i =0; i < 24; i++){
+         
+         if(R2 & 0x800000){
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+             printf("1");
+         }
+         else{
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+             printf("0");
+         }
+          HAL_Delay(1);
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_Delay(1);
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         R2 = ((R2 << 1) & 0xFFFFFF);
+     }
+     HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+     HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+     HAL_Delay(1);
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);          
+     R1 = R1 & 0xFFFFFF;
+     /*   R1 Ctrl    */
+        printf("\r\nR1 :  ");
+    for(int i =0; i < 24; i++){
+        if(R1 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+            printf("1");
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+            printf("0");
+        }
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+        HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+        R1 = ((R1 << 1) & 0xFFFFFF);
+    }
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+    HAL_Delay(1);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);          
+
+
+        /*   R0 Ctrl    */
+           printf("\r\nR0 :  ");
+    R0 = R0 & 0xFFFFFF;
+    for(int i =0; i < 24; i++){
+        if(R0 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+            printf("1");
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+            printf("0");
+        }
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+        HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+        HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);    
+        R0 = ((R0 << 1) & 0xFFFFFF);
+    }
+ 
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+    HAL_Delay(1);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);      
+
+}
+#else
+#if 0
+void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
+
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);  
+   R3  = R3  & 0x0007FF;
+    /*   R3 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R3 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        }
+        
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         HAL_Delay(1);
+        R3 = ((R3 << 1) & 0xFFFFFF);
+    }   
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);    
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);          
+     R2 = R2 & 0x00FFFF;
+    /*   R2 Ctrl    */
+     for(int i =0; i < 24; i++){
+         
+         if(R2 & 0x800000){
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+         }
+         else{
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+         }
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+          HAL_Delay(1);
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+          HAL_Delay(1);
+         R2 = ((R2 << 1) & 0xFFFFFF);
+     }
+     HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+     HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);          
+     R1 = R1 & 0xFFFFFF;
+     /*   R1 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R1 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        }
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         HAL_Delay(1);
+        R1 = ((R1 << 1) & 0xFFFFFF);
+    }
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);          
+
+
+        /*   R0 Ctrl    */
+    R0 = R0 & 0xFFFFFF;
+    for(int i =0; i < 24; i++){
+        if(R0 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        }
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);    
+        R0 = ((R0 << 1) & 0xFFFFFF);
+    }
+ 
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);  
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);      
+
+}
+#else
+void ADF_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
+
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+   R3  = R3  & 0x0007FF;
+    /*   R3 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R3 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        }
+
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         HAL_Delay(1);
+        R3 = ((R3 << 1) & 0xFFFFFF);
+    }
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+     R2 = R2 & 0x00FFFF;
+    /*   R2 Ctrl    */
+     for(int i =0; i < 24; i++){
+
+         if(R2 & 0x800000){
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+         }
+         else{
+             HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+         }
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+          HAL_Delay(1);
+         HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+          HAL_Delay(1);
+         R2 = ((R2 << 1) & 0xFFFFFF);
+     }
+     HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+     HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+     HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+     R1 = R1 & 0xFFFFFF;
+     /*   R1 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R1 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        }
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         HAL_Delay(1);
+        R1 = ((R1 << 1) & 0xFFFFFF);
+    }
+    HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+
+
+        /*   R0 Ctrl    */
+    R0 = R0 & 0xFFFFFF;
+    for(int i =0; i < 24; i++){
+        if(R0 & 0x800000){
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_SET);
+        }
+        else{
+            HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        }
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_SET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_CLK_GPIO_Port, PLL_CLK_Pin, GPIO_PIN_RESET);
+         HAL_Delay(1);
+        HAL_GPIO_WritePin(PLL_DATA_GPIO_Port, PLL_DATA_Pin, GPIO_PIN_RESET);
+        R0 = ((R0 << 1) & 0xFFFFFF);
+    }
+
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PLL_EN_GPIO_Port, PLL_EN_Pin, GPIO_PIN_RESET);
+
+}
+#endif
+#endif // PYJ.2019.07.22_END -- 

insight/STM32F410RB_PLLCtrl_Test.si4project/STM32F410RB_PLLCtrl_Test.SearchResults

@@ -0,0 +1,6 @@
+---- ADF4153_settings_t Matches (5 in 3 files) ----
+adf4153.c (D:\STM32_Projects\STM32F410RB_PLLCtrl_Test\Src) line 99 : char ADF4153_Init(ADF4153_settings_t ADF4153_st)
+adf4153.h (D:\STM32_Projects\STM32F410RB_PLLCtrl_Test\Inc) line 266 : typedef struct _ADF4153_settings_t {
+_ADF4153_settings_t in adf4153.h (D:\STM32_Projects\STM32F410RB_PLLCtrl_Test\Inc) : } ADF4153_settings_t;
+adf4153.h (D:\STM32_Projects\STM32F410RB_PLLCtrl_Test\Inc) line 304 : char ADF4153_Init(ADF4153_settings_t ADF4153_st);
+main.c (D:\STM32_Projects\STM32F410RB_PLLCtrl_Test\Src) line 56 : ADF4153_settings_t ADF4153_st =

insight/STM32F410RB_PLLCtrl_Test.si4project/STM32F410RB_PLLCtrl_Test.bookmarks.xml

@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="utf-8"?>
+<SourceInsightBookmarks
+	AppVer="4.00.0084"
+	AppVerMinReader="4.00.0009"
+	>
+	<Bookmarks/>
+</SourceInsightBookmarks>