STM32F207_ChannelCtrlProject/Debug/STM32F207_ChannelCtrl.list

STM32F207_ChannelCtrl.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000184  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00005fe4  08000184  08000184  00010184  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       000001e0  08006168  08006168  00016168  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  08006348  08006348  00016348  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  08006350  08006350  00016350  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .fini_array   00000004  08006354  08006354  00016354  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .data         00000068  20000000  08006358  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          00000c50  20000068  080063c0  00020068  2**2
                  ALLOC
  8 ._user_heap_stack 00000600  20000cb8  080063c0  00020cb8  2**0
                  ALLOC
  9 .ARM.attributes 00000029  00000000  00000000  00020068  2**0
                  CONTENTS, READONLY
 10 .debug_info   0001dc6e  00000000  00000000  00020091  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_abbrev 00003044  00000000  00000000  0003dcff  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_loc    0000b8f0  00000000  00000000  00040d43  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_aranges 00000b38  00000000  00000000  0004c638  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_ranges 00001168  00000000  00000000  0004d170  2**3
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_line   00007811  00000000  00000000  0004e2d8  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .debug_str    0000718a  00000000  00000000  00055ae9  2**0
                  CONTENTS, READONLY, DEBUGGING
 17 .comment      0000007c  00000000  00000000  0005cc73  2**0
                  CONTENTS, READONLY
 18 .debug_frame  00002bc0  00000000  00000000  0005ccf0  2**2
                  CONTENTS, READONLY, DEBUGGING
 19 .stab         00000084  00000000  00000000  0005f8b0  2**2
                  CONTENTS, READONLY, DEBUGGING
 20 .stabstr      00000117  00000000  00000000  0005f934  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

08000184 <__do_global_dtors_aux>:
 8000184:	b510      	push	{r4, lr}
 8000186:	4c05      	ldr	r4, [pc, #20]	; (800019c <__do_global_dtors_aux+0x18>)
 8000188:	7823      	ldrb	r3, [r4, #0]
 800018a:	b933      	cbnz	r3, 800019a <__do_global_dtors_aux+0x16>
 800018c:	4b04      	ldr	r3, [pc, #16]	; (80001a0 <__do_global_dtors_aux+0x1c>)
 800018e:	b113      	cbz	r3, 8000196 <__do_global_dtors_aux+0x12>
 8000190:	4804      	ldr	r0, [pc, #16]	; (80001a4 <__do_global_dtors_aux+0x20>)
 8000192:	f3af 8000 	nop.w
 8000196:	2301      	movs	r3, #1
 8000198:	7023      	strb	r3, [r4, #0]
 800019a:	bd10      	pop	{r4, pc}
 800019c:	20000068 	.word	0x20000068
 80001a0:	00000000 	.word	0x00000000
 80001a4:	08006150 	.word	0x08006150

080001a8 <frame_dummy>:
 80001a8:	b508      	push	{r3, lr}
 80001aa:	4b03      	ldr	r3, [pc, #12]	; (80001b8 <frame_dummy+0x10>)
 80001ac:	b11b      	cbz	r3, 80001b6 <frame_dummy+0xe>
 80001ae:	4903      	ldr	r1, [pc, #12]	; (80001bc <frame_dummy+0x14>)
 80001b0:	4803      	ldr	r0, [pc, #12]	; (80001c0 <frame_dummy+0x18>)
 80001b2:	f3af 8000 	nop.w
 80001b6:	bd08      	pop	{r3, pc}
 80001b8:	00000000 	.word	0x00000000
 80001bc:	2000006c 	.word	0x2000006c
 80001c0:	08006150 	.word	0x08006150

080001c4 <__aeabi_uldivmod>:
 80001c4:	b953      	cbnz	r3, 80001dc <__aeabi_uldivmod+0x18>
 80001c6:	b94a      	cbnz	r2, 80001dc <__aeabi_uldivmod+0x18>
 80001c8:	2900      	cmp	r1, #0
 80001ca:	bf08      	it	eq
 80001cc:	2800      	cmpeq	r0, #0
 80001ce:	bf1c      	itt	ne
 80001d0:	f04f 31ff 	movne.w	r1, #4294967295
 80001d4:	f04f 30ff 	movne.w	r0, #4294967295
 80001d8:	f000 b97a 	b.w	80004d0 <__aeabi_idiv0>
 80001dc:	f1ad 0c08 	sub.w	ip, sp, #8
 80001e0:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 80001e4:	f000 f806 	bl	80001f4 <__udivmoddi4>
 80001e8:	f8dd e004 	ldr.w	lr, [sp, #4]
 80001ec:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 80001f0:	b004      	add	sp, #16
 80001f2:	4770      	bx	lr

080001f4 <__udivmoddi4>:
 80001f4:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80001f8:	468c      	mov	ip, r1
 80001fa:	460e      	mov	r6, r1
 80001fc:	4604      	mov	r4, r0
 80001fe:	9d08      	ldr	r5, [sp, #32]
 8000200:	2b00      	cmp	r3, #0
 8000202:	d150      	bne.n	80002a6 <__udivmoddi4+0xb2>
 8000204:	428a      	cmp	r2, r1
 8000206:	4617      	mov	r7, r2
 8000208:	d96c      	bls.n	80002e4 <__udivmoddi4+0xf0>
 800020a:	fab2 fe82 	clz	lr, r2
 800020e:	f1be 0f00 	cmp.w	lr, #0
 8000212:	d00b      	beq.n	800022c <__udivmoddi4+0x38>
 8000214:	f1ce 0c20 	rsb	ip, lr, #32
 8000218:	fa01 f60e 	lsl.w	r6, r1, lr
 800021c:	fa20 fc0c 	lsr.w	ip, r0, ip
 8000220:	fa02 f70e 	lsl.w	r7, r2, lr
 8000224:	ea4c 0c06 	orr.w	ip, ip, r6
 8000228:	fa00 f40e 	lsl.w	r4, r0, lr
 800022c:	0c3a      	lsrs	r2, r7, #16
 800022e:	fbbc f9f2 	udiv	r9, ip, r2
 8000232:	b2bb      	uxth	r3, r7
 8000234:	fb02 cc19 	mls	ip, r2, r9, ip
 8000238:	fb09 fa03 	mul.w	sl, r9, r3
 800023c:	ea4f 4814 	mov.w	r8, r4, lsr #16
 8000240:	ea48 460c 	orr.w	r6, r8, ip, lsl #16
 8000244:	45b2      	cmp	sl, r6
 8000246:	d90a      	bls.n	800025e <__udivmoddi4+0x6a>
 8000248:	19f6      	adds	r6, r6, r7
 800024a:	f109 31ff 	add.w	r1, r9, #4294967295
 800024e:	f080 8125 	bcs.w	800049c <__udivmoddi4+0x2a8>
 8000252:	45b2      	cmp	sl, r6
 8000254:	f240 8122 	bls.w	800049c <__udivmoddi4+0x2a8>
 8000258:	f1a9 0902 	sub.w	r9, r9, #2
 800025c:	443e      	add	r6, r7
 800025e:	eba6 060a 	sub.w	r6, r6, sl
 8000262:	fbb6 f0f2 	udiv	r0, r6, r2
 8000266:	fb02 6610 	mls	r6, r2, r0, r6
 800026a:	fb00 f303 	mul.w	r3, r0, r3
 800026e:	b2a4      	uxth	r4, r4
 8000270:	ea44 4406 	orr.w	r4, r4, r6, lsl #16
 8000274:	42a3      	cmp	r3, r4
 8000276:	d909      	bls.n	800028c <__udivmoddi4+0x98>
 8000278:	19e4      	adds	r4, r4, r7
 800027a:	f100 32ff 	add.w	r2, r0, #4294967295
 800027e:	f080 810b 	bcs.w	8000498 <__udivmoddi4+0x2a4>
 8000282:	42a3      	cmp	r3, r4
 8000284:	f240 8108 	bls.w	8000498 <__udivmoddi4+0x2a4>
 8000288:	3802      	subs	r0, #2
 800028a:	443c      	add	r4, r7
 800028c:	2100      	movs	r1, #0
 800028e:	1ae4      	subs	r4, r4, r3
 8000290:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
 8000294:	2d00      	cmp	r5, #0
 8000296:	d062      	beq.n	800035e <__udivmoddi4+0x16a>
 8000298:	2300      	movs	r3, #0
 800029a:	fa24 f40e 	lsr.w	r4, r4, lr
 800029e:	602c      	str	r4, [r5, #0]
 80002a0:	606b      	str	r3, [r5, #4]
 80002a2:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80002a6:	428b      	cmp	r3, r1
 80002a8:	d907      	bls.n	80002ba <__udivmoddi4+0xc6>
 80002aa:	2d00      	cmp	r5, #0
 80002ac:	d055      	beq.n	800035a <__udivmoddi4+0x166>
 80002ae:	2100      	movs	r1, #0
 80002b0:	e885 0041 	stmia.w	r5, {r0, r6}
 80002b4:	4608      	mov	r0, r1
 80002b6:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80002ba:	fab3 f183 	clz	r1, r3
 80002be:	2900      	cmp	r1, #0
 80002c0:	f040 808f 	bne.w	80003e2 <__udivmoddi4+0x1ee>
 80002c4:	42b3      	cmp	r3, r6
 80002c6:	d302      	bcc.n	80002ce <__udivmoddi4+0xda>
 80002c8:	4282      	cmp	r2, r0
 80002ca:	f200 80fc 	bhi.w	80004c6 <__udivmoddi4+0x2d2>
 80002ce:	1a84      	subs	r4, r0, r2
 80002d0:	eb66 0603 	sbc.w	r6, r6, r3
 80002d4:	2001      	movs	r0, #1
 80002d6:	46b4      	mov	ip, r6
 80002d8:	2d00      	cmp	r5, #0
 80002da:	d040      	beq.n	800035e <__udivmoddi4+0x16a>
 80002dc:	e885 1010 	stmia.w	r5, {r4, ip}
 80002e0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80002e4:	b912      	cbnz	r2, 80002ec <__udivmoddi4+0xf8>
 80002e6:	2701      	movs	r7, #1
 80002e8:	fbb7 f7f2 	udiv	r7, r7, r2
 80002ec:	fab7 fe87 	clz	lr, r7
 80002f0:	f1be 0f00 	cmp.w	lr, #0
 80002f4:	d135      	bne.n	8000362 <__udivmoddi4+0x16e>
 80002f6:	2101      	movs	r1, #1
 80002f8:	1bf6      	subs	r6, r6, r7
 80002fa:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 80002fe:	fa1f f887 	uxth.w	r8, r7
 8000302:	fbb6 f2fc 	udiv	r2, r6, ip
 8000306:	fb0c 6612 	mls	r6, ip, r2, r6
 800030a:	fb08 f002 	mul.w	r0, r8, r2
 800030e:	0c23      	lsrs	r3, r4, #16
 8000310:	ea43 4606 	orr.w	r6, r3, r6, lsl #16
 8000314:	42b0      	cmp	r0, r6
 8000316:	d907      	bls.n	8000328 <__udivmoddi4+0x134>
 8000318:	19f6      	adds	r6, r6, r7
 800031a:	f102 33ff 	add.w	r3, r2, #4294967295
 800031e:	d202      	bcs.n	8000326 <__udivmoddi4+0x132>
 8000320:	42b0      	cmp	r0, r6
 8000322:	f200 80d2 	bhi.w	80004ca <__udivmoddi4+0x2d6>
 8000326:	461a      	mov	r2, r3
 8000328:	1a36      	subs	r6, r6, r0
 800032a:	fbb6 f0fc 	udiv	r0, r6, ip
 800032e:	fb0c 6610 	mls	r6, ip, r0, r6
 8000332:	fb08 f800 	mul.w	r8, r8, r0
 8000336:	b2a3      	uxth	r3, r4
 8000338:	ea43 4406 	orr.w	r4, r3, r6, lsl #16
 800033c:	45a0      	cmp	r8, r4
 800033e:	d907      	bls.n	8000350 <__udivmoddi4+0x15c>
 8000340:	19e4      	adds	r4, r4, r7
 8000342:	f100 33ff 	add.w	r3, r0, #4294967295
 8000346:	d202      	bcs.n	800034e <__udivmoddi4+0x15a>
 8000348:	45a0      	cmp	r8, r4
 800034a:	f200 80b9 	bhi.w	80004c0 <__udivmoddi4+0x2cc>
 800034e:	4618      	mov	r0, r3
 8000350:	eba4 0408 	sub.w	r4, r4, r8
 8000354:	ea40 4002 	orr.w	r0, r0, r2, lsl #16
 8000358:	e79c      	b.n	8000294 <__udivmoddi4+0xa0>
 800035a:	4629      	mov	r1, r5
 800035c:	4628      	mov	r0, r5
 800035e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000362:	fa07 f70e 	lsl.w	r7, r7, lr
 8000366:	f1ce 0320 	rsb	r3, lr, #32
 800036a:	fa26 f203 	lsr.w	r2, r6, r3
 800036e:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 8000372:	fbb2 f1fc 	udiv	r1, r2, ip
 8000376:	fa1f f887 	uxth.w	r8, r7
 800037a:	fb0c 2211 	mls	r2, ip, r1, r2
 800037e:	fa06 f60e 	lsl.w	r6, r6, lr
 8000382:	fa20 f303 	lsr.w	r3, r0, r3
 8000386:	fb01 f908 	mul.w	r9, r1, r8
 800038a:	4333      	orrs	r3, r6
 800038c:	0c1e      	lsrs	r6, r3, #16
 800038e:	ea46 4602 	orr.w	r6, r6, r2, lsl #16
 8000392:	45b1      	cmp	r9, r6
 8000394:	fa00 f40e 	lsl.w	r4, r0, lr
 8000398:	d909      	bls.n	80003ae <__udivmoddi4+0x1ba>
 800039a:	19f6      	adds	r6, r6, r7
 800039c:	f101 32ff 	add.w	r2, r1, #4294967295
 80003a0:	f080 808c 	bcs.w	80004bc <__udivmoddi4+0x2c8>
 80003a4:	45b1      	cmp	r9, r6
 80003a6:	f240 8089 	bls.w	80004bc <__udivmoddi4+0x2c8>
 80003aa:	3902      	subs	r1, #2
 80003ac:	443e      	add	r6, r7
 80003ae:	eba6 0609 	sub.w	r6, r6, r9
 80003b2:	fbb6 f0fc 	udiv	r0, r6, ip
 80003b6:	fb0c 6210 	mls	r2, ip, r0, r6
 80003ba:	fb00 f908 	mul.w	r9, r0, r8
 80003be:	b29e      	uxth	r6, r3
 80003c0:	ea46 4602 	orr.w	r6, r6, r2, lsl #16
 80003c4:	45b1      	cmp	r9, r6
 80003c6:	d907      	bls.n	80003d8 <__udivmoddi4+0x1e4>
 80003c8:	19f6      	adds	r6, r6, r7
 80003ca:	f100 33ff 	add.w	r3, r0, #4294967295
 80003ce:	d271      	bcs.n	80004b4 <__udivmoddi4+0x2c0>
 80003d0:	45b1      	cmp	r9, r6
 80003d2:	d96f      	bls.n	80004b4 <__udivmoddi4+0x2c0>
 80003d4:	3802      	subs	r0, #2
 80003d6:	443e      	add	r6, r7
 80003d8:	eba6 0609 	sub.w	r6, r6, r9
 80003dc:	ea40 4101 	orr.w	r1, r0, r1, lsl #16
 80003e0:	e78f      	b.n	8000302 <__udivmoddi4+0x10e>
 80003e2:	f1c1 0720 	rsb	r7, r1, #32
 80003e6:	fa22 f807 	lsr.w	r8, r2, r7
 80003ea:	408b      	lsls	r3, r1
 80003ec:	ea48 0303 	orr.w	r3, r8, r3
 80003f0:	fa26 f407 	lsr.w	r4, r6, r7
 80003f4:	ea4f 4e13 	mov.w	lr, r3, lsr #16
 80003f8:	fbb4 f9fe 	udiv	r9, r4, lr
 80003fc:	fa1f fc83 	uxth.w	ip, r3
 8000400:	fb0e 4419 	mls	r4, lr, r9, r4
 8000404:	408e      	lsls	r6, r1
 8000406:	fa20 f807 	lsr.w	r8, r0, r7
 800040a:	fb09 fa0c 	mul.w	sl, r9, ip
 800040e:	ea48 0806 	orr.w	r8, r8, r6
 8000412:	ea4f 4618 	mov.w	r6, r8, lsr #16
 8000416:	ea46 4404 	orr.w	r4, r6, r4, lsl #16
 800041a:	45a2      	cmp	sl, r4
 800041c:	fa02 f201 	lsl.w	r2, r2, r1
 8000420:	fa00 f601 	lsl.w	r6, r0, r1
 8000424:	d908      	bls.n	8000438 <__udivmoddi4+0x244>
 8000426:	18e4      	adds	r4, r4, r3
 8000428:	f109 30ff 	add.w	r0, r9, #4294967295
 800042c:	d244      	bcs.n	80004b8 <__udivmoddi4+0x2c4>
 800042e:	45a2      	cmp	sl, r4
 8000430:	d942      	bls.n	80004b8 <__udivmoddi4+0x2c4>
 8000432:	f1a9 0902 	sub.w	r9, r9, #2
 8000436:	441c      	add	r4, r3
 8000438:	eba4 040a 	sub.w	r4, r4, sl
 800043c:	fbb4 f0fe 	udiv	r0, r4, lr
 8000440:	fb0e 4410 	mls	r4, lr, r0, r4
 8000444:	fb00 fc0c 	mul.w	ip, r0, ip
 8000448:	fa1f f888 	uxth.w	r8, r8
 800044c:	ea48 4404 	orr.w	r4, r8, r4, lsl #16
 8000450:	45a4      	cmp	ip, r4
 8000452:	d907      	bls.n	8000464 <__udivmoddi4+0x270>
 8000454:	18e4      	adds	r4, r4, r3
 8000456:	f100 3eff 	add.w	lr, r0, #4294967295
 800045a:	d229      	bcs.n	80004b0 <__udivmoddi4+0x2bc>
 800045c:	45a4      	cmp	ip, r4
 800045e:	d927      	bls.n	80004b0 <__udivmoddi4+0x2bc>
 8000460:	3802      	subs	r0, #2
 8000462:	441c      	add	r4, r3
 8000464:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
 8000468:	fba0 8902 	umull	r8, r9, r0, r2
 800046c:	eba4 0c0c 	sub.w	ip, r4, ip
 8000470:	45cc      	cmp	ip, r9
 8000472:	46c2      	mov	sl, r8
 8000474:	46ce      	mov	lr, r9
 8000476:	d315      	bcc.n	80004a4 <__udivmoddi4+0x2b0>
 8000478:	d012      	beq.n	80004a0 <__udivmoddi4+0x2ac>
 800047a:	b155      	cbz	r5, 8000492 <__udivmoddi4+0x29e>
 800047c:	ebb6 030a 	subs.w	r3, r6, sl
 8000480:	eb6c 060e 	sbc.w	r6, ip, lr
 8000484:	fa06 f707 	lsl.w	r7, r6, r7
 8000488:	40cb      	lsrs	r3, r1
 800048a:	431f      	orrs	r7, r3
 800048c:	40ce      	lsrs	r6, r1
 800048e:	602f      	str	r7, [r5, #0]
 8000490:	606e      	str	r6, [r5, #4]
 8000492:	2100      	movs	r1, #0
 8000494:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000498:	4610      	mov	r0, r2
 800049a:	e6f7      	b.n	800028c <__udivmoddi4+0x98>
 800049c:	4689      	mov	r9, r1
 800049e:	e6de      	b.n	800025e <__udivmoddi4+0x6a>
 80004a0:	4546      	cmp	r6, r8
 80004a2:	d2ea      	bcs.n	800047a <__udivmoddi4+0x286>
 80004a4:	ebb8 0a02 	subs.w	sl, r8, r2
 80004a8:	eb69 0e03 	sbc.w	lr, r9, r3
 80004ac:	3801      	subs	r0, #1
 80004ae:	e7e4      	b.n	800047a <__udivmoddi4+0x286>
 80004b0:	4670      	mov	r0, lr
 80004b2:	e7d7      	b.n	8000464 <__udivmoddi4+0x270>
 80004b4:	4618      	mov	r0, r3
 80004b6:	e78f      	b.n	80003d8 <__udivmoddi4+0x1e4>
 80004b8:	4681      	mov	r9, r0
 80004ba:	e7bd      	b.n	8000438 <__udivmoddi4+0x244>
 80004bc:	4611      	mov	r1, r2
 80004be:	e776      	b.n	80003ae <__udivmoddi4+0x1ba>
 80004c0:	3802      	subs	r0, #2
 80004c2:	443c      	add	r4, r7
 80004c4:	e744      	b.n	8000350 <__udivmoddi4+0x15c>
 80004c6:	4608      	mov	r0, r1
 80004c8:	e706      	b.n	80002d8 <__udivmoddi4+0xe4>
 80004ca:	3a02      	subs	r2, #2
 80004cc:	443e      	add	r6, r7
 80004ce:	e72b      	b.n	8000328 <__udivmoddi4+0x134>

080004d0 <__aeabi_idiv0>:
 80004d0:	4770      	bx	lr
 80004d2:	bf00      	nop

080004d4 <HAL_InitTick>:
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
  /*Configure the SysTick to have interrupt in 1ms time basis*/
  HAL_SYSTICK_Config(SystemCoreClock/1000U);
 80004d4:	4b08      	ldr	r3, [pc, #32]	; (80004f8 <HAL_InitTick+0x24>)
{
 80004d6:	b510      	push	{r4, lr}
 80004d8:	4604      	mov	r4, r0
  HAL_SYSTICK_Config(SystemCoreClock/1000U);
 80004da:	6818      	ldr	r0, [r3, #0]
 80004dc:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 80004e0:	fbb0 f0f3 	udiv	r0, r0, r3
 80004e4:	f000 f894 	bl	8000610 <HAL_SYSTICK_Config>

  /*Configure the SysTick IRQ priority */
  HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0U);
 80004e8:	2200      	movs	r2, #0
 80004ea:	4621      	mov	r1, r4
 80004ec:	f04f 30ff 	mov.w	r0, #4294967295
 80004f0:	f000 f84e 	bl	8000590 <HAL_NVIC_SetPriority>

  /* Return function status */
  return HAL_OK;
}
 80004f4:	2000      	movs	r0, #0
 80004f6:	bd10      	pop	{r4, pc}
 80004f8:	20000000 	.word	0x20000000

080004fc <HAL_Init>:
{
 80004fc:	b508      	push	{r3, lr}
   __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
 80004fe:	4b0b      	ldr	r3, [pc, #44]	; (800052c <HAL_Init+0x30>)
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8000500:	2003      	movs	r0, #3
   __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
 8000502:	681a      	ldr	r2, [r3, #0]
 8000504:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8000508:	601a      	str	r2, [r3, #0]
   __HAL_FLASH_DATA_CACHE_ENABLE();
 800050a:	681a      	ldr	r2, [r3, #0]
 800050c:	f442 6280 	orr.w	r2, r2, #1024	; 0x400
 8000510:	601a      	str	r2, [r3, #0]
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000512:	681a      	ldr	r2, [r3, #0]
 8000514:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 8000518:	601a      	str	r2, [r3, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800051a:	f000 f827 	bl	800056c <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 800051e:	2000      	movs	r0, #0
 8000520:	f7ff ffd8 	bl	80004d4 <HAL_InitTick>
  HAL_MspInit();
 8000524:	f004 fc68 	bl	8004df8 <HAL_MspInit>
}
 8000528:	2000      	movs	r0, #0
 800052a:	bd08      	pop	{r3, pc}
 800052c:	40023c00 	.word	0x40023c00

08000530 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick++;
 8000530:	4a02      	ldr	r2, [pc, #8]	; (800053c <HAL_IncTick+0xc>)
 8000532:	6813      	ldr	r3, [r2, #0]
 8000534:	3301      	adds	r3, #1
 8000536:	6013      	str	r3, [r2, #0]
 8000538:	4770      	bx	lr
 800053a:	bf00      	nop
 800053c:	200000dc 	.word	0x200000dc

08000540 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 8000540:	4b01      	ldr	r3, [pc, #4]	; (8000548 <HAL_GetTick+0x8>)
 8000542:	6818      	ldr	r0, [r3, #0]
}
 8000544:	4770      	bx	lr
 8000546:	bf00      	nop
 8000548:	200000dc 	.word	0x200000dc

0800054c <HAL_Delay>:
  *       implementations in user file.
  * @param  Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(__IO uint32_t Delay)
{
 800054c:	b537      	push	{r0, r1, r2, r4, r5, lr}
 800054e:	9001      	str	r0, [sp, #4]
  uint32_t tickstart = HAL_GetTick();
 8000550:	f7ff fff6 	bl	8000540 <HAL_GetTick>
 8000554:	4605      	mov	r5, r0
  uint32_t wait = Delay;
 8000556:	9c01      	ldr	r4, [sp, #4]
  
  /* Add a period to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 8000558:	1c63      	adds	r3, r4, #1
  {
     wait++;
 800055a:	bf18      	it	ne
 800055c:	3401      	addne	r4, #1
  }
  
  while((HAL_GetTick() - tickstart) < wait)
 800055e:	f7ff ffef 	bl	8000540 <HAL_GetTick>
 8000562:	1b40      	subs	r0, r0, r5
 8000564:	42a0      	cmp	r0, r4
 8000566:	d3fa      	bcc.n	800055e <HAL_Delay+0x12>
  {
  }
}
 8000568:	b003      	add	sp, #12
 800056a:	bd30      	pop	{r4, r5, pc}

0800056c <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 800056c:	4a07      	ldr	r2, [pc, #28]	; (800058c <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 800056e:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8000570:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 8000572:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 8000576:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 800057a:	041b      	lsls	r3, r3, #16
 800057c:	0c1b      	lsrs	r3, r3, #16
 800057e:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 8000582:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 8000586:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 8000588:	60d3      	str	r3, [r2, #12]
 800058a:	4770      	bx	lr
 800058c:	e000ed00 	.word	0xe000ed00

08000590 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8000590:	4b17      	ldr	r3, [pc, #92]	; (80005f0 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 8000592:	b530      	push	{r4, r5, lr}
 8000594:	68dc      	ldr	r4, [r3, #12]
 8000596:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 800059a:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800059e:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 80005a0:	2b04      	cmp	r3, #4
 80005a2:	bf28      	it	cs
 80005a4:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80005a6:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80005a8:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80005ac:	bf98      	it	ls
 80005ae:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80005b0:	fa05 f303 	lsl.w	r3, r5, r3
 80005b4:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80005b8:	bf88      	it	hi
 80005ba:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80005bc:	4019      	ands	r1, r3
 80005be:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 80005c0:	fa05 f404 	lsl.w	r4, r5, r4
 80005c4:	3c01      	subs	r4, #1
 80005c6:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 80005c8:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80005ca:	ea42 0201 	orr.w	r2, r2, r1
 80005ce:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005d2:	bfaf      	iteee	ge
 80005d4:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005d8:	4b06      	ldrlt	r3, [pc, #24]	; (80005f4 <HAL_NVIC_SetPriority+0x64>)
 80005da:	f000 000f 	andlt.w	r0, r0, #15
 80005de:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005e0:	bfa5      	ittet	ge
 80005e2:	b2d2      	uxtbge	r2, r2
 80005e4:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005e8:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005ea:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 80005ee:	bd30      	pop	{r4, r5, pc}
 80005f0:	e000ed00 	.word	0xe000ed00
 80005f4:	e000ed14 	.word	0xe000ed14

080005f8 <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 80005f8:	2301      	movs	r3, #1
 80005fa:	0942      	lsrs	r2, r0, #5
 80005fc:	f000 001f 	and.w	r0, r0, #31
 8000600:	fa03 f000 	lsl.w	r0, r3, r0
 8000604:	4b01      	ldr	r3, [pc, #4]	; (800060c <HAL_NVIC_EnableIRQ+0x14>)
 8000606:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 800060a:	4770      	bx	lr
 800060c:	e000e100 	.word	0xe000e100

08000610 <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 8000610:	3801      	subs	r0, #1
 8000612:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8000616:	d20a      	bcs.n	800062e <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000618:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800061a:	4b06      	ldr	r3, [pc, #24]	; (8000634 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800061c:	4a06      	ldr	r2, [pc, #24]	; (8000638 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800061e:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000620:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8000624:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8000626:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8000628:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 800062a:	601a      	str	r2, [r3, #0]
 800062c:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 800062e:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 8000630:	4770      	bx	lr
 8000632:	bf00      	nop
 8000634:	e000e010 	.word	0xe000e010
 8000638:	e000ed00 	.word	0xe000ed00

0800063c <HAL_DMA_Abort_IT>:
  *                 the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
  if(hdma->State != HAL_DMA_STATE_BUSY)
 800063c:	f890 3035 	ldrb.w	r3, [r0, #53]	; 0x35
 8000640:	2b02      	cmp	r3, #2
 8000642:	d003      	beq.n	800064c <HAL_DMA_Abort_IT+0x10>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8000644:	2380      	movs	r3, #128	; 0x80
 8000646:	6543      	str	r3, [r0, #84]	; 0x54
    return HAL_ERROR;
 8000648:	2001      	movs	r0, #1
 800064a:	4770      	bx	lr
  }
  else
  {
    /* Set Abort State  */
    hdma->State = HAL_DMA_STATE_ABORT;
 800064c:	2305      	movs	r3, #5
    
    /* Disable the stream */
    __HAL_DMA_DISABLE(hdma);
 800064e:	6802      	ldr	r2, [r0, #0]
    hdma->State = HAL_DMA_STATE_ABORT;
 8000650:	f880 3035 	strb.w	r3, [r0, #53]	; 0x35
    __HAL_DMA_DISABLE(hdma);
 8000654:	6813      	ldr	r3, [r2, #0]
  }

  return HAL_OK;
 8000656:	2000      	movs	r0, #0
    __HAL_DMA_DISABLE(hdma);
 8000658:	f023 0301 	bic.w	r3, r3, #1
 800065c:	6013      	str	r3, [r2, #0]
}
 800065e:	4770      	bx	lr

08000660 <HAL_GPIO_Init>:
  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 8000660:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  for(position = 0U; position < GPIO_NUMBER; position++)
  {
    /* Get the IO position */
    ioposition = 0x01U << position;
    /* Get the current IO position */
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000664:	680b      	ldr	r3, [r1, #0]
{
 8000666:	b085      	sub	sp, #20
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000668:	9301      	str	r3, [sp, #4]
  for(position = 0U; position < GPIO_NUMBER; position++)
 800066a:	2300      	movs	r3, #0
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 800066c:	f8df 81b4 	ldr.w	r8, [pc, #436]	; 8000824 <HAL_GPIO_Init+0x1c4>
        temp &= ~(0x0FU << (4U * (position & 0x03)));
        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
        SYSCFG->EXTICR[position >> 2U] = temp;

        /* Clear EXTI line configuration */
        temp = EXTI->IMR;
 8000670:	4a6a      	ldr	r2, [pc, #424]	; (800081c <HAL_GPIO_Init+0x1bc>)
        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000672:	f8df 91b4 	ldr.w	r9, [pc, #436]	; 8000828 <HAL_GPIO_Init+0x1c8>
    ioposition = 0x01U << position;
 8000676:	f04f 0e01 	mov.w	lr, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 800067a:	9c01      	ldr	r4, [sp, #4]
    ioposition = 0x01U << position;
 800067c:	fa0e fe03 	lsl.w	lr, lr, r3
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000680:	ea0e 0604 	and.w	r6, lr, r4
    if(iocurrent == ioposition)
 8000684:	45b6      	cmp	lr, r6
 8000686:	f040 80b2 	bne.w	80007ee <HAL_GPIO_Init+0x18e>
      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
 800068a:	684c      	ldr	r4, [r1, #4]
 800068c:	f024 0710 	bic.w	r7, r4, #16
 8000690:	2f02      	cmp	r7, #2
 8000692:	d116      	bne.n	80006c2 <HAL_GPIO_Init+0x62>
        temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
 8000694:	f04f 0c0f 	mov.w	ip, #15
        temp = GPIOx->AFR[position >> 3U];
 8000698:	ea4f 0ad3 	mov.w	sl, r3, lsr #3
 800069c:	eb00 0a8a 	add.w	sl, r0, sl, lsl #2
        temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
 80006a0:	f003 0b07 	and.w	fp, r3, #7
        temp = GPIOx->AFR[position >> 3U];
 80006a4:	f8da 5020 	ldr.w	r5, [sl, #32]
        temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
 80006a8:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
 80006ac:	fa0c fc0b 	lsl.w	ip, ip, fp
 80006b0:	ea25 0c0c 	bic.w	ip, r5, ip
        temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
 80006b4:	690d      	ldr	r5, [r1, #16]
 80006b6:	fa05 f50b 	lsl.w	r5, r5, fp
 80006ba:	ea45 050c 	orr.w	r5, r5, ip
        GPIOx->AFR[position >> 3U] = temp;
 80006be:	f8ca 5020 	str.w	r5, [sl, #32]
      temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
 80006c2:	2503      	movs	r5, #3
 80006c4:	ea4f 0a43 	mov.w	sl, r3, lsl #1
 80006c8:	fa05 f50a 	lsl.w	r5, r5, sl
 80006cc:	43ed      	mvns	r5, r5
      temp = GPIOx->MODER;
 80006ce:	f8d0 b000 	ldr.w	fp, [r0]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 80006d2:	f004 0c03 	and.w	ip, r4, #3
      temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
 80006d6:	ea0b 0b05 	and.w	fp, fp, r5
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 80006da:	fa0c fc0a 	lsl.w	ip, ip, sl
      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
 80006de:	3f01      	subs	r7, #1
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 80006e0:	ea4c 0c0b 	orr.w	ip, ip, fp
      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
 80006e4:	2f01      	cmp	r7, #1
      GPIOx->MODER = temp;
 80006e6:	f8c0 c000 	str.w	ip, [r0]
      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
 80006ea:	d811      	bhi.n	8000710 <HAL_GPIO_Init+0xb0>
        temp = GPIOx->OSPEEDR; 
 80006ec:	6887      	ldr	r7, [r0, #8]
        temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
 80006ee:	ea07 0b05 	and.w	fp, r7, r5
        temp |= (GPIO_Init->Speed << (position * 2U));
 80006f2:	68cf      	ldr	r7, [r1, #12]
 80006f4:	fa07 fc0a 	lsl.w	ip, r7, sl
 80006f8:	ea4c 070b 	orr.w	r7, ip, fp
        GPIOx->OSPEEDR = temp;
 80006fc:	6087      	str	r7, [r0, #8]
        temp = GPIOx->OTYPER;
 80006fe:	6847      	ldr	r7, [r0, #4]
        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
 8000700:	ea27 0e0e 	bic.w	lr, r7, lr
        temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
 8000704:	f3c4 1700 	ubfx	r7, r4, #4, #1
 8000708:	409f      	lsls	r7, r3
 800070a:	ea47 070e 	orr.w	r7, r7, lr
        GPIOx->OTYPER = temp;
 800070e:	6047      	str	r7, [r0, #4]
      temp = GPIOx->PUPDR;
 8000710:	68c7      	ldr	r7, [r0, #12]
      temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
 8000712:	403d      	ands	r5, r7
      temp |= ((GPIO_Init->Pull) << (position * 2U));
 8000714:	688f      	ldr	r7, [r1, #8]
 8000716:	fa07 f70a 	lsl.w	r7, r7, sl
 800071a:	433d      	orrs	r5, r7
      GPIOx->PUPDR = temp;
 800071c:	60c5      	str	r5, [r0, #12]
      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 800071e:	00e5      	lsls	r5, r4, #3
 8000720:	d565      	bpl.n	80007ee <HAL_GPIO_Init+0x18e>
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 8000722:	f04f 0b00 	mov.w	fp, #0
        temp &= ~(0x0FU << (4U * (position & 0x03)));
 8000726:	f04f 0e0f 	mov.w	lr, #15
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 800072a:	f8cd b00c 	str.w	fp, [sp, #12]
 800072e:	f8d8 7044 	ldr.w	r7, [r8, #68]	; 0x44
        temp &= ~(0x0FU << (4U * (position & 0x03)));
 8000732:	f003 0c03 	and.w	ip, r3, #3
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 8000736:	f447 4780 	orr.w	r7, r7, #16384	; 0x4000
 800073a:	f8c8 7044 	str.w	r7, [r8, #68]	; 0x44
 800073e:	f8d8 7044 	ldr.w	r7, [r8, #68]	; 0x44
        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000742:	4d37      	ldr	r5, [pc, #220]	; (8000820 <HAL_GPIO_Init+0x1c0>)
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 8000744:	f407 4780 	and.w	r7, r7, #16384	; 0x4000
 8000748:	9703      	str	r7, [sp, #12]
 800074a:	9f03      	ldr	r7, [sp, #12]
 800074c:	f023 0703 	bic.w	r7, r3, #3
 8000750:	f107 4780 	add.w	r7, r7, #1073741824	; 0x40000000
 8000754:	f507 379c 	add.w	r7, r7, #79872	; 0x13800
        temp = SYSCFG->EXTICR[position >> 2U];
 8000758:	f8d7 a008 	ldr.w	sl, [r7, #8]
        temp &= ~(0x0FU << (4U * (position & 0x03)));
 800075c:	ea4f 0c8c 	mov.w	ip, ip, lsl #2
 8000760:	fa0e fe0c 	lsl.w	lr, lr, ip
        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000764:	42a8      	cmp	r0, r5
        temp &= ~(0x0FU << (4U * (position & 0x03)));
 8000766:	ea2a 0e0e 	bic.w	lr, sl, lr
        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 800076a:	d047      	beq.n	80007fc <HAL_GPIO_Init+0x19c>
 800076c:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000770:	42a8      	cmp	r0, r5
 8000772:	d045      	beq.n	8000800 <HAL_GPIO_Init+0x1a0>
 8000774:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000778:	42a8      	cmp	r0, r5
 800077a:	d043      	beq.n	8000804 <HAL_GPIO_Init+0x1a4>
 800077c:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000780:	42a8      	cmp	r0, r5
 8000782:	d041      	beq.n	8000808 <HAL_GPIO_Init+0x1a8>
 8000784:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000788:	42a8      	cmp	r0, r5
 800078a:	d03f      	beq.n	800080c <HAL_GPIO_Init+0x1ac>
 800078c:	4548      	cmp	r0, r9
 800078e:	d03f      	beq.n	8000810 <HAL_GPIO_Init+0x1b0>
 8000790:	f505 6500 	add.w	r5, r5, #2048	; 0x800
 8000794:	42a8      	cmp	r0, r5
 8000796:	d03d      	beq.n	8000814 <HAL_GPIO_Init+0x1b4>
 8000798:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 800079c:	42a8      	cmp	r0, r5
 800079e:	d03b      	beq.n	8000818 <HAL_GPIO_Init+0x1b8>
 80007a0:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80007a4:	42a8      	cmp	r0, r5
 80007a6:	bf14      	ite	ne
 80007a8:	2509      	movne	r5, #9
 80007aa:	2508      	moveq	r5, #8
 80007ac:	fa05 f50c 	lsl.w	r5, r5, ip
 80007b0:	ea45 050e 	orr.w	r5, r5, lr
        SYSCFG->EXTICR[position >> 2U] = temp;
 80007b4:	60bd      	str	r5, [r7, #8]
        temp &= ~((uint32_t)iocurrent);
 80007b6:	43f7      	mvns	r7, r6
        temp = EXTI->IMR;
 80007b8:	6815      	ldr	r5, [r2, #0]
        if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 80007ba:	f414 3f80 	tst.w	r4, #65536	; 0x10000
        temp &= ~((uint32_t)iocurrent);
 80007be:	bf0c      	ite	eq
 80007c0:	403d      	andeq	r5, r7
        {
          temp |= iocurrent;
 80007c2:	4335      	orrne	r5, r6
        }
        EXTI->IMR = temp;
 80007c4:	6015      	str	r5, [r2, #0]

        temp = EXTI->EMR;
 80007c6:	6855      	ldr	r5, [r2, #4]
        temp &= ~((uint32_t)iocurrent);
        if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 80007c8:	f414 3f00 	tst.w	r4, #131072	; 0x20000
        temp &= ~((uint32_t)iocurrent);
 80007cc:	bf0c      	ite	eq
 80007ce:	403d      	andeq	r5, r7
        {
          temp |= iocurrent;
 80007d0:	4335      	orrne	r5, r6
        }
        EXTI->EMR = temp;
 80007d2:	6055      	str	r5, [r2, #4]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR;
 80007d4:	6895      	ldr	r5, [r2, #8]
        temp &= ~((uint32_t)iocurrent);
        if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 80007d6:	f414 1f80 	tst.w	r4, #1048576	; 0x100000
        temp &= ~((uint32_t)iocurrent);
 80007da:	bf0c      	ite	eq
 80007dc:	403d      	andeq	r5, r7
        {
          temp |= iocurrent;
 80007de:	4335      	orrne	r5, r6
        }
        EXTI->RTSR = temp;
 80007e0:	6095      	str	r5, [r2, #8]

        temp = EXTI->FTSR;
 80007e2:	68d5      	ldr	r5, [r2, #12]
        temp &= ~((uint32_t)iocurrent);
        if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 80007e4:	02a4      	lsls	r4, r4, #10
        temp &= ~((uint32_t)iocurrent);
 80007e6:	bf54      	ite	pl
 80007e8:	403d      	andpl	r5, r7
        {
          temp |= iocurrent;
 80007ea:	4335      	orrmi	r5, r6
        }
        EXTI->FTSR = temp;
 80007ec:	60d5      	str	r5, [r2, #12]
  for(position = 0U; position < GPIO_NUMBER; position++)
 80007ee:	3301      	adds	r3, #1
 80007f0:	2b10      	cmp	r3, #16
 80007f2:	f47f af40 	bne.w	8000676 <HAL_GPIO_Init+0x16>
      }
    }
  }
}
 80007f6:	b005      	add	sp, #20
 80007f8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80007fc:	465d      	mov	r5, fp
 80007fe:	e7d5      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 8000800:	2501      	movs	r5, #1
 8000802:	e7d3      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 8000804:	2502      	movs	r5, #2
 8000806:	e7d1      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 8000808:	2503      	movs	r5, #3
 800080a:	e7cf      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 800080c:	2504      	movs	r5, #4
 800080e:	e7cd      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 8000810:	2505      	movs	r5, #5
 8000812:	e7cb      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 8000814:	2506      	movs	r5, #6
 8000816:	e7c9      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 8000818:	2507      	movs	r5, #7
 800081a:	e7c7      	b.n	80007ac <HAL_GPIO_Init+0x14c>
 800081c:	40013c00 	.word	0x40013c00
 8000820:	40020000 	.word	0x40020000
 8000824:	40023800 	.word	0x40023800
 8000828:	40021400 	.word	0x40021400

0800082c <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if(PinState != GPIO_PIN_RESET)
 800082c:	b10a      	cbz	r2, 8000832 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 800082e:	6181      	str	r1, [r0, #24]
 8000830:	4770      	bx	lr
 8000832:	0409      	lsls	r1, r1, #16
 8000834:	e7fb      	b.n	800082e <HAL_GPIO_WritePin+0x2>

08000836 <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 8000836:	6943      	ldr	r3, [r0, #20]
 8000838:	4059      	eors	r1, r3
 800083a:	6141      	str	r1, [r0, #20]
 800083c:	4770      	bx	lr

0800083e <I2C_IsAcknowledgeFailed>:
  *                the configuration information for the specified I2C.
  * @retval HAL status
  */
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
{
  if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
 800083e:	6802      	ldr	r2, [r0, #0]
 8000840:	6953      	ldr	r3, [r2, #20]
 8000842:	f413 6380 	ands.w	r3, r3, #1024	; 0x400
 8000846:	d00d      	beq.n	8000864 <I2C_IsAcknowledgeFailed+0x26>
  {
    /* Clear NACKF Flag */
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
 8000848:	f46f 6380 	mvn.w	r3, #1024	; 0x400
 800084c:	6153      	str	r3, [r2, #20]

    hi2c->ErrorCode = HAL_I2C_ERROR_AF;
 800084e:	2304      	movs	r3, #4
    hi2c->PreviousState = I2C_STATE_NONE;
    hi2c->State= HAL_I2C_STATE_READY;
 8000850:	2220      	movs	r2, #32
    hi2c->ErrorCode = HAL_I2C_ERROR_AF;
 8000852:	6403      	str	r3, [r0, #64]	; 0x40
    hi2c->PreviousState = I2C_STATE_NONE;
 8000854:	2300      	movs	r3, #0
 8000856:	6303      	str	r3, [r0, #48]	; 0x30

    /* Process Unlocked */
    __HAL_UNLOCK(hi2c);
 8000858:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
    hi2c->State= HAL_I2C_STATE_READY;
 800085c:	f880 203d 	strb.w	r2, [r0, #61]	; 0x3d

    return HAL_ERROR;
 8000860:	2001      	movs	r0, #1
 8000862:	4770      	bx	lr
  }
  return HAL_OK;
 8000864:	4618      	mov	r0, r3
}
 8000866:	4770      	bx	lr

08000868 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
{
 8000868:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800086c:	4604      	mov	r4, r0
 800086e:	4617      	mov	r7, r2
 8000870:	4699      	mov	r9, r3
  while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
 8000872:	f3c1 4807 	ubfx	r8, r1, #16, #8
 8000876:	b28e      	uxth	r6, r1
 8000878:	6825      	ldr	r5, [r4, #0]
 800087a:	f1b8 0f01 	cmp.w	r8, #1
 800087e:	bf0c      	ite	eq
 8000880:	696b      	ldreq	r3, [r5, #20]
 8000882:	69ab      	ldrne	r3, [r5, #24]
 8000884:	ea36 0303 	bics.w	r3, r6, r3
 8000888:	bf14      	ite	ne
 800088a:	2001      	movne	r0, #1
 800088c:	2000      	moveq	r0, #0
 800088e:	b908      	cbnz	r0, 8000894 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x2c>
}
 8000890:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
 8000894:	696b      	ldr	r3, [r5, #20]
 8000896:	055a      	lsls	r2, r3, #21
 8000898:	d512      	bpl.n	80008c0 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x58>
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 800089a:	682b      	ldr	r3, [r5, #0]
      hi2c->State= HAL_I2C_STATE_READY;
 800089c:	2220      	movs	r2, #32
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 800089e:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 80008a2:	602b      	str	r3, [r5, #0]
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
 80008a4:	f46f 6380 	mvn.w	r3, #1024	; 0x400
 80008a8:	616b      	str	r3, [r5, #20]
      hi2c->ErrorCode = HAL_I2C_ERROR_AF;
 80008aa:	2304      	movs	r3, #4
 80008ac:	6423      	str	r3, [r4, #64]	; 0x40
      hi2c->PreviousState = I2C_STATE_NONE;
 80008ae:	2300      	movs	r3, #0
      return HAL_ERROR;
 80008b0:	2001      	movs	r0, #1
      hi2c->PreviousState = I2C_STATE_NONE;
 80008b2:	6323      	str	r3, [r4, #48]	; 0x30
      __HAL_UNLOCK(hi2c);
 80008b4:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
      hi2c->State= HAL_I2C_STATE_READY;
 80008b8:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
      return HAL_ERROR;
 80008bc:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    if(Timeout != HAL_MAX_DELAY)
 80008c0:	1c7b      	adds	r3, r7, #1
 80008c2:	d0d9      	beq.n	8000878 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 80008c4:	b94f      	cbnz	r7, 80008da <I2C_WaitOnMasterAddressFlagUntilTimeout+0x72>
        hi2c->PreviousState = I2C_STATE_NONE;
 80008c6:	2300      	movs	r3, #0
        hi2c->State= HAL_I2C_STATE_READY;
 80008c8:	2220      	movs	r2, #32
        hi2c->PreviousState = I2C_STATE_NONE;
 80008ca:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 80008cc:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 80008d0:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
        return HAL_TIMEOUT;
 80008d4:	2003      	movs	r0, #3
 80008d6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 80008da:	f7ff fe31 	bl	8000540 <HAL_GetTick>
 80008de:	eba0 0009 	sub.w	r0, r0, r9
 80008e2:	4287      	cmp	r7, r0
 80008e4:	d2c8      	bcs.n	8000878 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
 80008e6:	e7ee      	b.n	80008c6 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x5e>

080008e8 <I2C_WaitOnFlagUntilTimeout>:
{
 80008e8:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 80008ec:	4604      	mov	r4, r0
 80008ee:	4690      	mov	r8, r2
 80008f0:	461f      	mov	r7, r3
 80008f2:	9e08      	ldr	r6, [sp, #32]
  while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) 
 80008f4:	f3c1 4907 	ubfx	r9, r1, #16, #8
 80008f8:	b28d      	uxth	r5, r1
 80008fa:	6823      	ldr	r3, [r4, #0]
 80008fc:	f1b9 0f01 	cmp.w	r9, #1
 8000900:	bf0c      	ite	eq
 8000902:	695b      	ldreq	r3, [r3, #20]
 8000904:	699b      	ldrne	r3, [r3, #24]
 8000906:	ea35 0303 	bics.w	r3, r5, r3
 800090a:	bf0c      	ite	eq
 800090c:	2301      	moveq	r3, #1
 800090e:	2300      	movne	r3, #0
 8000910:	4543      	cmp	r3, r8
 8000912:	d002      	beq.n	800091a <I2C_WaitOnFlagUntilTimeout+0x32>
  return HAL_OK;
 8000914:	2000      	movs	r0, #0
}
 8000916:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    if(Timeout != HAL_MAX_DELAY)
 800091a:	1c7b      	adds	r3, r7, #1
 800091c:	d0ed      	beq.n	80008fa <I2C_WaitOnFlagUntilTimeout+0x12>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 800091e:	b95f      	cbnz	r7, 8000938 <I2C_WaitOnFlagUntilTimeout+0x50>
        hi2c->PreviousState = I2C_STATE_NONE;
 8000920:	2300      	movs	r3, #0
        hi2c->State= HAL_I2C_STATE_READY;
 8000922:	2220      	movs	r2, #32
        hi2c->PreviousState = I2C_STATE_NONE;
 8000924:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 8000926:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 800092a:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
        __HAL_UNLOCK(hi2c);
 800092e:	2003      	movs	r0, #3
        hi2c->Mode = HAL_I2C_MODE_NONE;
 8000930:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
 8000934:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8000938:	f7ff fe02 	bl	8000540 <HAL_GetTick>
 800093c:	1b80      	subs	r0, r0, r6
 800093e:	4287      	cmp	r7, r0
 8000940:	d2db      	bcs.n	80008fa <I2C_WaitOnFlagUntilTimeout+0x12>
 8000942:	e7ed      	b.n	8000920 <I2C_WaitOnFlagUntilTimeout+0x38>

08000944 <I2C_WaitOnTXEFlagUntilTimeout>:
{    
 8000944:	b570      	push	{r4, r5, r6, lr}
 8000946:	4604      	mov	r4, r0
 8000948:	460d      	mov	r5, r1
 800094a:	4616      	mov	r6, r2
  while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
 800094c:	6823      	ldr	r3, [r4, #0]
 800094e:	695b      	ldr	r3, [r3, #20]
 8000950:	061b      	lsls	r3, r3, #24
 8000952:	d501      	bpl.n	8000958 <I2C_WaitOnTXEFlagUntilTimeout+0x14>
  return HAL_OK;      
 8000954:	2000      	movs	r0, #0
 8000956:	bd70      	pop	{r4, r5, r6, pc}
    if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
 8000958:	4620      	mov	r0, r4
 800095a:	f7ff ff70 	bl	800083e <I2C_IsAcknowledgeFailed>
 800095e:	b9a8      	cbnz	r0, 800098c <I2C_WaitOnTXEFlagUntilTimeout+0x48>
    if(Timeout != HAL_MAX_DELAY)
 8000960:	1c6a      	adds	r2, r5, #1
 8000962:	d0f3      	beq.n	800094c <I2C_WaitOnTXEFlagUntilTimeout+0x8>
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8000964:	b965      	cbnz	r5, 8000980 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8000966:	6c23      	ldr	r3, [r4, #64]	; 0x40
        hi2c->State= HAL_I2C_STATE_READY;
 8000968:	2220      	movs	r2, #32
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 800096a:	f043 0320 	orr.w	r3, r3, #32
 800096e:	6423      	str	r3, [r4, #64]	; 0x40
        hi2c->PreviousState = I2C_STATE_NONE;
 8000970:	2300      	movs	r3, #0
        __HAL_UNLOCK(hi2c);
 8000972:	2003      	movs	r0, #3
        hi2c->PreviousState = I2C_STATE_NONE;
 8000974:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 8000976:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 800097a:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
 800097e:	bd70      	pop	{r4, r5, r6, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8000980:	f7ff fdde 	bl	8000540 <HAL_GetTick>
 8000984:	1b80      	subs	r0, r0, r6
 8000986:	4285      	cmp	r5, r0
 8000988:	d2e0      	bcs.n	800094c <I2C_WaitOnTXEFlagUntilTimeout+0x8>
 800098a:	e7ec      	b.n	8000966 <I2C_WaitOnTXEFlagUntilTimeout+0x22>
      return HAL_ERROR;
 800098c:	2001      	movs	r0, #1
}
 800098e:	bd70      	pop	{r4, r5, r6, pc}

08000990 <I2C_RequestMemoryWrite>:
{
 8000990:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 8000994:	4615      	mov	r5, r2
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8000996:	6802      	ldr	r2, [r0, #0]
{
 8000998:	4698      	mov	r8, r3
  hi2c->Instance->CR1 |= I2C_CR1_START;
 800099a:	6813      	ldr	r3, [r2, #0]
{
 800099c:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
  hi2c->Instance->CR1 |= I2C_CR1_START;
 800099e:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80009a2:	6013      	str	r3, [r2, #0]
{
 80009a4:	460f      	mov	r7, r1
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 80009a6:	9600      	str	r6, [sp, #0]
 80009a8:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 80009aa:	2200      	movs	r2, #0
 80009ac:	f04f 1101 	mov.w	r1, #65537	; 0x10001
{
 80009b0:	4604      	mov	r4, r0
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 80009b2:	f7ff ff99 	bl	80008e8 <I2C_WaitOnFlagUntilTimeout>
 80009b6:	b968      	cbnz	r0, 80009d4 <I2C_RequestMemoryWrite+0x44>
  hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
 80009b8:	6823      	ldr	r3, [r4, #0]
 80009ba:	f007 07fe 	and.w	r7, r7, #254	; 0xfe
 80009be:	611f      	str	r7, [r3, #16]
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
 80009c0:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 80009c2:	4633      	mov	r3, r6
 80009c4:	491a      	ldr	r1, [pc, #104]	; (8000a30 <I2C_RequestMemoryWrite+0xa0>)
 80009c6:	4620      	mov	r0, r4
 80009c8:	f7ff ff4e 	bl	8000868 <I2C_WaitOnMasterAddressFlagUntilTimeout>
 80009cc:	b130      	cbz	r0, 80009dc <I2C_RequestMemoryWrite+0x4c>
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 80009ce:	6c23      	ldr	r3, [r4, #64]	; 0x40
 80009d0:	2b04      	cmp	r3, #4
 80009d2:	d018      	beq.n	8000a06 <I2C_RequestMemoryWrite+0x76>
      return HAL_TIMEOUT;
 80009d4:	2003      	movs	r0, #3
}
 80009d6:	b004      	add	sp, #16
 80009d8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 80009dc:	6823      	ldr	r3, [r4, #0]
 80009de:	9003      	str	r0, [sp, #12]
 80009e0:	695a      	ldr	r2, [r3, #20]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 80009e2:	990a      	ldr	r1, [sp, #40]	; 0x28
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 80009e4:	9203      	str	r2, [sp, #12]
 80009e6:	699b      	ldr	r3, [r3, #24]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 80009e8:	4632      	mov	r2, r6
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 80009ea:	9303      	str	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 80009ec:	4620      	mov	r0, r4
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 80009ee:	9b03      	ldr	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 80009f0:	f7ff ffa8 	bl	8000944 <I2C_WaitOnTXEFlagUntilTimeout>
 80009f4:	b148      	cbz	r0, 8000a0a <I2C_RequestMemoryWrite+0x7a>
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 80009f6:	6c23      	ldr	r3, [r4, #64]	; 0x40
 80009f8:	2b04      	cmp	r3, #4
 80009fa:	d1eb      	bne.n	80009d4 <I2C_RequestMemoryWrite+0x44>
        hi2c->Instance->CR1 |= I2C_CR1_STOP;
 80009fc:	6822      	ldr	r2, [r4, #0]
 80009fe:	6813      	ldr	r3, [r2, #0]
 8000a00:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8000a04:	6013      	str	r3, [r2, #0]
      return HAL_ERROR;
 8000a06:	2001      	movs	r0, #1
 8000a08:	e7e5      	b.n	80009d6 <I2C_RequestMemoryWrite+0x46>
  if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
 8000a0a:	f1b8 0f01 	cmp.w	r8, #1
 8000a0e:	6823      	ldr	r3, [r4, #0]
 8000a10:	d102      	bne.n	8000a18 <I2C_RequestMemoryWrite+0x88>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8000a12:	b2ed      	uxtb	r5, r5
 8000a14:	611d      	str	r5, [r3, #16]
 8000a16:	e7de      	b.n	80009d6 <I2C_RequestMemoryWrite+0x46>
    hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
 8000a18:	0a2a      	lsrs	r2, r5, #8
 8000a1a:	611a      	str	r2, [r3, #16]
    if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8000a1c:	990a      	ldr	r1, [sp, #40]	; 0x28
 8000a1e:	4632      	mov	r2, r6
 8000a20:	4620      	mov	r0, r4
 8000a22:	f7ff ff8f 	bl	8000944 <I2C_WaitOnTXEFlagUntilTimeout>
 8000a26:	2800      	cmp	r0, #0
 8000a28:	d1e5      	bne.n	80009f6 <I2C_RequestMemoryWrite+0x66>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8000a2a:	6823      	ldr	r3, [r4, #0]
 8000a2c:	e7f1      	b.n	8000a12 <I2C_RequestMemoryWrite+0x82>
 8000a2e:	bf00      	nop
 8000a30:	00010002 	.word	0x00010002

08000a34 <I2C_RequestMemoryRead>:
{
 8000a34:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 8000a38:	4698      	mov	r8, r3
  hi2c->Instance->CR1 |= I2C_CR1_ACK;
 8000a3a:	6803      	ldr	r3, [r0, #0]
{
 8000a3c:	4616      	mov	r6, r2
  hi2c->Instance->CR1 |= I2C_CR1_ACK;
 8000a3e:	681a      	ldr	r2, [r3, #0]
{
 8000a40:	9d0b      	ldr	r5, [sp, #44]	; 0x2c
  hi2c->Instance->CR1 |= I2C_CR1_ACK;
 8000a42:	f442 6280 	orr.w	r2, r2, #1024	; 0x400
 8000a46:	601a      	str	r2, [r3, #0]
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8000a48:	681a      	ldr	r2, [r3, #0]
{
 8000a4a:	460f      	mov	r7, r1
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8000a4c:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 8000a50:	601a      	str	r2, [r3, #0]
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8000a52:	f04f 1101 	mov.w	r1, #65537	; 0x10001
 8000a56:	9500      	str	r5, [sp, #0]
 8000a58:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8000a5a:	2200      	movs	r2, #0
{
 8000a5c:	4604      	mov	r4, r0
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8000a5e:	f7ff ff43 	bl	80008e8 <I2C_WaitOnFlagUntilTimeout>
 8000a62:	b980      	cbnz	r0, 8000a86 <I2C_RequestMemoryRead+0x52>
  hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
 8000a64:	6823      	ldr	r3, [r4, #0]
 8000a66:	b2ff      	uxtb	r7, r7
 8000a68:	f007 02fe 	and.w	r2, r7, #254	; 0xfe
 8000a6c:	611a      	str	r2, [r3, #16]
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
 8000a6e:	492d      	ldr	r1, [pc, #180]	; (8000b24 <I2C_RequestMemoryRead+0xf0>)
 8000a70:	462b      	mov	r3, r5
 8000a72:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8000a74:	4620      	mov	r0, r4
 8000a76:	f7ff fef7 	bl	8000868 <I2C_WaitOnMasterAddressFlagUntilTimeout>
 8000a7a:	b140      	cbz	r0, 8000a8e <I2C_RequestMemoryRead+0x5a>
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8000a7c:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8000a7e:	2b04      	cmp	r3, #4
 8000a80:	d101      	bne.n	8000a86 <I2C_RequestMemoryRead+0x52>
      return HAL_ERROR;
 8000a82:	2001      	movs	r0, #1
 8000a84:	e000      	b.n	8000a88 <I2C_RequestMemoryRead+0x54>
      return HAL_TIMEOUT;
 8000a86:	2003      	movs	r0, #3
}
 8000a88:	b004      	add	sp, #16
 8000a8a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000a8e:	6823      	ldr	r3, [r4, #0]
 8000a90:	9003      	str	r0, [sp, #12]
 8000a92:	695a      	ldr	r2, [r3, #20]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8000a94:	990a      	ldr	r1, [sp, #40]	; 0x28
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000a96:	9203      	str	r2, [sp, #12]
 8000a98:	699b      	ldr	r3, [r3, #24]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8000a9a:	462a      	mov	r2, r5
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000a9c:	9303      	str	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8000a9e:	4620      	mov	r0, r4
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000aa0:	9b03      	ldr	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8000aa2:	f7ff ff4f 	bl	8000944 <I2C_WaitOnTXEFlagUntilTimeout>
 8000aa6:	b140      	cbz	r0, 8000aba <I2C_RequestMemoryRead+0x86>
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8000aa8:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8000aaa:	2b04      	cmp	r3, #4
 8000aac:	d1eb      	bne.n	8000a86 <I2C_RequestMemoryRead+0x52>
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8000aae:	6822      	ldr	r2, [r4, #0]
 8000ab0:	6813      	ldr	r3, [r2, #0]
 8000ab2:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8000ab6:	6013      	str	r3, [r2, #0]
 8000ab8:	e7e3      	b.n	8000a82 <I2C_RequestMemoryRead+0x4e>
  if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
 8000aba:	f1b8 0f01 	cmp.w	r8, #1
 8000abe:	6823      	ldr	r3, [r4, #0]
 8000ac0:	d124      	bne.n	8000b0c <I2C_RequestMemoryRead+0xd8>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8000ac2:	b2f6      	uxtb	r6, r6
 8000ac4:	611e      	str	r6, [r3, #16]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8000ac6:	462a      	mov	r2, r5
 8000ac8:	990a      	ldr	r1, [sp, #40]	; 0x28
 8000aca:	4620      	mov	r0, r4
 8000acc:	f7ff ff3a 	bl	8000944 <I2C_WaitOnTXEFlagUntilTimeout>
 8000ad0:	4602      	mov	r2, r0
 8000ad2:	2800      	cmp	r0, #0
 8000ad4:	d1e8      	bne.n	8000aa8 <I2C_RequestMemoryRead+0x74>
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8000ad6:	6821      	ldr	r1, [r4, #0]
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8000ad8:	4620      	mov	r0, r4
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8000ada:	680b      	ldr	r3, [r1, #0]
 8000adc:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8000ae0:	600b      	str	r3, [r1, #0]
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8000ae2:	9500      	str	r5, [sp, #0]
 8000ae4:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8000ae6:	f04f 1101 	mov.w	r1, #65537	; 0x10001
 8000aea:	f7ff fefd 	bl	80008e8 <I2C_WaitOnFlagUntilTimeout>
 8000aee:	2800      	cmp	r0, #0
 8000af0:	d1c9      	bne.n	8000a86 <I2C_RequestMemoryRead+0x52>
  hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
 8000af2:	6823      	ldr	r3, [r4, #0]
 8000af4:	f047 0701 	orr.w	r7, r7, #1
 8000af8:	611f      	str	r7, [r3, #16]
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
 8000afa:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8000afc:	462b      	mov	r3, r5
 8000afe:	4909      	ldr	r1, [pc, #36]	; (8000b24 <I2C_RequestMemoryRead+0xf0>)
 8000b00:	4620      	mov	r0, r4
 8000b02:	f7ff feb1 	bl	8000868 <I2C_WaitOnMasterAddressFlagUntilTimeout>
 8000b06:	2800      	cmp	r0, #0
 8000b08:	d1b8      	bne.n	8000a7c <I2C_RequestMemoryRead+0x48>
 8000b0a:	e7bd      	b.n	8000a88 <I2C_RequestMemoryRead+0x54>
    hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
 8000b0c:	0a32      	lsrs	r2, r6, #8
 8000b0e:	611a      	str	r2, [r3, #16]
    if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8000b10:	990a      	ldr	r1, [sp, #40]	; 0x28
 8000b12:	462a      	mov	r2, r5
 8000b14:	4620      	mov	r0, r4
 8000b16:	f7ff ff15 	bl	8000944 <I2C_WaitOnTXEFlagUntilTimeout>
 8000b1a:	2800      	cmp	r0, #0
 8000b1c:	d1c4      	bne.n	8000aa8 <I2C_RequestMemoryRead+0x74>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8000b1e:	6823      	ldr	r3, [r4, #0]
 8000b20:	e7cf      	b.n	8000ac2 <I2C_RequestMemoryRead+0x8e>
 8000b22:	bf00      	nop
 8000b24:	00010002 	.word	0x00010002

08000b28 <I2C_WaitOnRXNEFlagUntilTimeout>:
{  
 8000b28:	b570      	push	{r4, r5, r6, lr}
 8000b2a:	4604      	mov	r4, r0
 8000b2c:	460d      	mov	r5, r1
 8000b2e:	4616      	mov	r6, r2
  while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
 8000b30:	6820      	ldr	r0, [r4, #0]
 8000b32:	6943      	ldr	r3, [r0, #20]
 8000b34:	f013 0340 	ands.w	r3, r3, #64	; 0x40
 8000b38:	d001      	beq.n	8000b3e <I2C_WaitOnRXNEFlagUntilTimeout+0x16>
  return HAL_OK;
 8000b3a:	2000      	movs	r0, #0
}
 8000b3c:	bd70      	pop	{r4, r5, r6, pc}
    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
 8000b3e:	6942      	ldr	r2, [r0, #20]
 8000b40:	06d2      	lsls	r2, r2, #27
 8000b42:	d50b      	bpl.n	8000b5c <I2C_WaitOnRXNEFlagUntilTimeout+0x34>
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
 8000b44:	f06f 0210 	mvn.w	r2, #16
 8000b48:	6142      	str	r2, [r0, #20]
      hi2c->State= HAL_I2C_STATE_READY;
 8000b4a:	2220      	movs	r2, #32
      hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8000b4c:	6423      	str	r3, [r4, #64]	; 0x40
      __HAL_UNLOCK(hi2c);
 8000b4e:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
      hi2c->PreviousState = I2C_STATE_NONE;
 8000b52:	6323      	str	r3, [r4, #48]	; 0x30
      return HAL_ERROR;
 8000b54:	2001      	movs	r0, #1
      hi2c->State= HAL_I2C_STATE_READY;
 8000b56:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
      return HAL_ERROR;
 8000b5a:	bd70      	pop	{r4, r5, r6, pc}
    if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8000b5c:	b95d      	cbnz	r5, 8000b76 <I2C_WaitOnRXNEFlagUntilTimeout+0x4e>
      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8000b5e:	6c23      	ldr	r3, [r4, #64]	; 0x40
      __HAL_UNLOCK(hi2c);
 8000b60:	2003      	movs	r0, #3
      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8000b62:	f043 0320 	orr.w	r3, r3, #32
 8000b66:	6423      	str	r3, [r4, #64]	; 0x40
      hi2c->State= HAL_I2C_STATE_READY;
 8000b68:	2320      	movs	r3, #32
 8000b6a:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
      __HAL_UNLOCK(hi2c);
 8000b6e:	2300      	movs	r3, #0
 8000b70:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
 8000b74:	bd70      	pop	{r4, r5, r6, pc}
    if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8000b76:	f7ff fce3 	bl	8000540 <HAL_GetTick>
 8000b7a:	1b80      	subs	r0, r0, r6
 8000b7c:	4285      	cmp	r5, r0
 8000b7e:	d2d7      	bcs.n	8000b30 <I2C_WaitOnRXNEFlagUntilTimeout+0x8>
 8000b80:	e7ed      	b.n	8000b5e <I2C_WaitOnRXNEFlagUntilTimeout+0x36>

08000b82 <I2C_WaitOnBTFFlagUntilTimeout>:
{  
 8000b82:	b570      	push	{r4, r5, r6, lr}
 8000b84:	4604      	mov	r4, r0
 8000b86:	460d      	mov	r5, r1
 8000b88:	4616      	mov	r6, r2
  while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
 8000b8a:	6823      	ldr	r3, [r4, #0]
 8000b8c:	695b      	ldr	r3, [r3, #20]
 8000b8e:	075b      	lsls	r3, r3, #29
 8000b90:	d501      	bpl.n	8000b96 <I2C_WaitOnBTFFlagUntilTimeout+0x14>
  return HAL_OK;
 8000b92:	2000      	movs	r0, #0
 8000b94:	bd70      	pop	{r4, r5, r6, pc}
    if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
 8000b96:	4620      	mov	r0, r4
 8000b98:	f7ff fe51 	bl	800083e <I2C_IsAcknowledgeFailed>
 8000b9c:	b9a8      	cbnz	r0, 8000bca <I2C_WaitOnBTFFlagUntilTimeout+0x48>
    if(Timeout != HAL_MAX_DELAY)
 8000b9e:	1c6a      	adds	r2, r5, #1
 8000ba0:	d0f3      	beq.n	8000b8a <I2C_WaitOnBTFFlagUntilTimeout+0x8>
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8000ba2:	b965      	cbnz	r5, 8000bbe <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8000ba4:	6c23      	ldr	r3, [r4, #64]	; 0x40
        hi2c->State= HAL_I2C_STATE_READY;
 8000ba6:	2220      	movs	r2, #32
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8000ba8:	f043 0320 	orr.w	r3, r3, #32
 8000bac:	6423      	str	r3, [r4, #64]	; 0x40
        hi2c->PreviousState = I2C_STATE_NONE;
 8000bae:	2300      	movs	r3, #0
        __HAL_UNLOCK(hi2c);
 8000bb0:	2003      	movs	r0, #3
        hi2c->PreviousState = I2C_STATE_NONE;
 8000bb2:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 8000bb4:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 8000bb8:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
 8000bbc:	bd70      	pop	{r4, r5, r6, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8000bbe:	f7ff fcbf 	bl	8000540 <HAL_GetTick>
 8000bc2:	1b80      	subs	r0, r0, r6
 8000bc4:	4285      	cmp	r5, r0
 8000bc6:	d2e0      	bcs.n	8000b8a <I2C_WaitOnBTFFlagUntilTimeout+0x8>
 8000bc8:	e7ec      	b.n	8000ba4 <I2C_WaitOnBTFFlagUntilTimeout+0x22>
      return HAL_ERROR;
 8000bca:	2001      	movs	r0, #1
}
 8000bcc:	bd70      	pop	{r4, r5, r6, pc}
	...

08000bd0 <HAL_I2C_Init>:
{
 8000bd0:	b570      	push	{r4, r5, r6, lr}
  if(hi2c == NULL)
 8000bd2:	4604      	mov	r4, r0
 8000bd4:	2800      	cmp	r0, #0
 8000bd6:	d063      	beq.n	8000ca0 <HAL_I2C_Init+0xd0>
  if(hi2c->State == HAL_I2C_STATE_RESET)
 8000bd8:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8000bdc:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8000be0:	b91b      	cbnz	r3, 8000bea <HAL_I2C_Init+0x1a>
    hi2c->Lock = HAL_UNLOCKED;
 8000be2:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_I2C_MspInit(hi2c);
 8000be6:	f004 f923 	bl	8004e30 <HAL_I2C_MspInit>
  hi2c->State = HAL_I2C_STATE_BUSY;
 8000bea:	2324      	movs	r3, #36	; 0x24
  __HAL_I2C_DISABLE(hi2c);
 8000bec:	6822      	ldr	r2, [r4, #0]
  hi2c->State = HAL_I2C_STATE_BUSY;
 8000bee:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  __HAL_I2C_DISABLE(hi2c);
 8000bf2:	6813      	ldr	r3, [r2, #0]
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8000bf4:	4e2b      	ldr	r6, [pc, #172]	; (8000ca4 <HAL_I2C_Init+0xd4>)
  __HAL_I2C_DISABLE(hi2c);
 8000bf6:	f023 0301 	bic.w	r3, r3, #1
 8000bfa:	6013      	str	r3, [r2, #0]
  pclk1 = HAL_RCC_GetPCLK1Freq();
 8000bfc:	f000 fc38 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8000c00:	6863      	ldr	r3, [r4, #4]
  freqrange = I2C_FREQRANGE(pclk1);
 8000c02:	4d29      	ldr	r5, [pc, #164]	; (8000ca8 <HAL_I2C_Init+0xd8>)
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8000c04:	42b3      	cmp	r3, r6
  freqrange = I2C_FREQRANGE(pclk1);
 8000c06:	fbb0 f5f5 	udiv	r5, r0, r5
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8000c0a:	bf88      	it	hi
 8000c0c:	f44f 7196 	movhi.w	r1, #300	; 0x12c
  hi2c->Instance->CR2 = freqrange;
 8000c10:	6822      	ldr	r2, [r4, #0]
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8000c12:	bf88      	it	hi
 8000c14:	4369      	mulhi	r1, r5
  hi2c->Instance->CR2 = freqrange;
 8000c16:	6055      	str	r5, [r2, #4]
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8000c18:	bf85      	ittet	hi
 8000c1a:	f44f 757a 	movhi.w	r5, #1000	; 0x3e8
 8000c1e:	fbb1 f1f5 	udivhi	r1, r1, r5
 8000c22:	1c69      	addls	r1, r5, #1
 8000c24:	3101      	addhi	r1, #1
  hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
 8000c26:	42b3      	cmp	r3, r6
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8000c28:	6211      	str	r1, [r2, #32]
  hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
 8000c2a:	d821      	bhi.n	8000c70 <HAL_I2C_Init+0xa0>
 8000c2c:	005b      	lsls	r3, r3, #1
 8000c2e:	fbb0 f0f3 	udiv	r0, r0, r3
 8000c32:	f3c0 030b 	ubfx	r3, r0, #0, #12
 8000c36:	2b03      	cmp	r3, #3
 8000c38:	bf98      	it	ls
 8000c3a:	2004      	movls	r0, #4
  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
 8000c3c:	6a21      	ldr	r1, [r4, #32]
 8000c3e:	69e3      	ldr	r3, [r4, #28]
  hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
 8000c40:	61d0      	str	r0, [r2, #28]
  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
 8000c42:	430b      	orrs	r3, r1
 8000c44:	6013      	str	r3, [r2, #0]
  hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
 8000c46:	68e1      	ldr	r1, [r4, #12]
 8000c48:	6923      	ldr	r3, [r4, #16]
  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8000c4a:	2000      	movs	r0, #0
  hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
 8000c4c:	430b      	orrs	r3, r1
 8000c4e:	6093      	str	r3, [r2, #8]
  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
 8000c50:	69a1      	ldr	r1, [r4, #24]
 8000c52:	6963      	ldr	r3, [r4, #20]
 8000c54:	430b      	orrs	r3, r1
 8000c56:	60d3      	str	r3, [r2, #12]
  __HAL_I2C_ENABLE(hi2c);
 8000c58:	6813      	ldr	r3, [r2, #0]
 8000c5a:	f043 0301 	orr.w	r3, r3, #1
 8000c5e:	6013      	str	r3, [r2, #0]
  hi2c->State = HAL_I2C_STATE_READY;
 8000c60:	2320      	movs	r3, #32
  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8000c62:	6420      	str	r0, [r4, #64]	; 0x40
  hi2c->State = HAL_I2C_STATE_READY;
 8000c64:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  hi2c->PreviousState = I2C_STATE_NONE;
 8000c68:	6320      	str	r0, [r4, #48]	; 0x30
  hi2c->Mode = HAL_I2C_MODE_NONE;
 8000c6a:	f884 003e 	strb.w	r0, [r4, #62]	; 0x3e
  return HAL_OK;
 8000c6e:	bd70      	pop	{r4, r5, r6, pc}
  hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
 8000c70:	68a1      	ldr	r1, [r4, #8]
 8000c72:	b949      	cbnz	r1, 8000c88 <HAL_I2C_Init+0xb8>
 8000c74:	eb03 0343 	add.w	r3, r3, r3, lsl #1
 8000c78:	fbb0 f0f3 	udiv	r0, r0, r3
 8000c7c:	f3c0 030b 	ubfx	r3, r0, #0, #12
 8000c80:	b163      	cbz	r3, 8000c9c <HAL_I2C_Init+0xcc>
 8000c82:	f440 4000 	orr.w	r0, r0, #32768	; 0x8000
 8000c86:	e7d9      	b.n	8000c3c <HAL_I2C_Init+0x6c>
 8000c88:	2119      	movs	r1, #25
 8000c8a:	434b      	muls	r3, r1
 8000c8c:	fbb0 f0f3 	udiv	r0, r0, r3
 8000c90:	f3c0 030b 	ubfx	r3, r0, #0, #12
 8000c94:	b113      	cbz	r3, 8000c9c <HAL_I2C_Init+0xcc>
 8000c96:	f440 4040 	orr.w	r0, r0, #49152	; 0xc000
 8000c9a:	e7cf      	b.n	8000c3c <HAL_I2C_Init+0x6c>
 8000c9c:	2001      	movs	r0, #1
 8000c9e:	e7cd      	b.n	8000c3c <HAL_I2C_Init+0x6c>
    return HAL_ERROR;
 8000ca0:	2001      	movs	r0, #1
}
 8000ca2:	bd70      	pop	{r4, r5, r6, pc}
 8000ca4:	000186a0 	.word	0x000186a0
 8000ca8:	000f4240 	.word	0x000f4240

08000cac <HAL_I2C_Mem_Write>:
{
 8000cac:	e92d 47f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
 8000cb0:	4604      	mov	r4, r0
 8000cb2:	469a      	mov	sl, r3
 8000cb4:	4688      	mov	r8, r1
 8000cb6:	4691      	mov	r9, r2
 8000cb8:	9e0c      	ldr	r6, [sp, #48]	; 0x30
  tickstart = HAL_GetTick();
 8000cba:	f7ff fc41 	bl	8000540 <HAL_GetTick>
  if(hi2c->State == HAL_I2C_STATE_READY)
 8000cbe:	f894 303d 	ldrb.w	r3, [r4, #61]	; 0x3d
  tickstart = HAL_GetTick();
 8000cc2:	4605      	mov	r5, r0
  if(hi2c->State == HAL_I2C_STATE_READY)
 8000cc4:	2b20      	cmp	r3, #32
 8000cc6:	d003      	beq.n	8000cd0 <HAL_I2C_Mem_Write+0x24>
    return HAL_BUSY;
 8000cc8:	2002      	movs	r0, #2
}
 8000cca:	b002      	add	sp, #8
 8000ccc:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
 8000cd0:	9000      	str	r0, [sp, #0]
 8000cd2:	2319      	movs	r3, #25
 8000cd4:	2201      	movs	r2, #1
 8000cd6:	493e      	ldr	r1, [pc, #248]	; (8000dd0 <HAL_I2C_Mem_Write+0x124>)
 8000cd8:	4620      	mov	r0, r4
 8000cda:	f7ff fe05 	bl	80008e8 <I2C_WaitOnFlagUntilTimeout>
 8000cde:	2800      	cmp	r0, #0
 8000ce0:	d1f2      	bne.n	8000cc8 <HAL_I2C_Mem_Write+0x1c>
    __HAL_LOCK(hi2c);
 8000ce2:	f894 303c 	ldrb.w	r3, [r4, #60]	; 0x3c
 8000ce6:	2b01      	cmp	r3, #1
 8000ce8:	d0ee      	beq.n	8000cc8 <HAL_I2C_Mem_Write+0x1c>
 8000cea:	2301      	movs	r3, #1
 8000cec:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8000cf0:	6823      	ldr	r3, [r4, #0]
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8000cf2:	2700      	movs	r7, #0
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8000cf4:	681a      	ldr	r2, [r3, #0]
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000cf6:	4641      	mov	r1, r8
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8000cf8:	07d2      	lsls	r2, r2, #31
      __HAL_I2C_ENABLE(hi2c);
 8000cfa:	bf58      	it	pl
 8000cfc:	681a      	ldrpl	r2, [r3, #0]
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000cfe:	4620      	mov	r0, r4
      __HAL_I2C_ENABLE(hi2c);
 8000d00:	bf5c      	itt	pl
 8000d02:	f042 0201 	orrpl.w	r2, r2, #1
 8000d06:	601a      	strpl	r2, [r3, #0]
    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 8000d08:	681a      	ldr	r2, [r3, #0]
 8000d0a:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
 8000d0e:	601a      	str	r2, [r3, #0]
    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
 8000d10:	2321      	movs	r3, #33	; 0x21
 8000d12:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode      = HAL_I2C_MODE_MEM;
 8000d16:	2340      	movs	r3, #64	; 0x40
 8000d18:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
    hi2c->pBuffPtr    = pData;
 8000d1c:	9b0a      	ldr	r3, [sp, #40]	; 0x28
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8000d1e:	6427      	str	r7, [r4, #64]	; 0x40
    hi2c->pBuffPtr    = pData;
 8000d20:	6263      	str	r3, [r4, #36]	; 0x24
    hi2c->XferCount   = Size;
 8000d22:	f8bd 302c 	ldrh.w	r3, [sp, #44]	; 0x2c
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000d26:	9501      	str	r5, [sp, #4]
    hi2c->XferCount   = Size;
 8000d28:	8563      	strh	r3, [r4, #42]	; 0x2a
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8000d2a:	4b2a      	ldr	r3, [pc, #168]	; (8000dd4 <HAL_I2C_Mem_Write+0x128>)
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000d2c:	9600      	str	r6, [sp, #0]
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8000d2e:	62e3      	str	r3, [r4, #44]	; 0x2c
    hi2c->XferSize    = hi2c->XferCount;
 8000d30:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000d32:	464a      	mov	r2, r9
    hi2c->XferSize    = hi2c->XferCount;
 8000d34:	8523      	strh	r3, [r4, #40]	; 0x28
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000d36:	4653      	mov	r3, sl
 8000d38:	f7ff fe2a 	bl	8000990 <I2C_RequestMemoryWrite>
 8000d3c:	2800      	cmp	r0, #0
 8000d3e:	d02a      	beq.n	8000d96 <HAL_I2C_Mem_Write+0xea>
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8000d40:	6c23      	ldr	r3, [r4, #64]	; 0x40
        __HAL_UNLOCK(hi2c);
 8000d42:	f884 703c 	strb.w	r7, [r4, #60]	; 0x3c
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8000d46:	2b04      	cmp	r3, #4
 8000d48:	d107      	bne.n	8000d5a <HAL_I2C_Mem_Write+0xae>
        return HAL_ERROR;
 8000d4a:	2001      	movs	r0, #1
 8000d4c:	e7bd      	b.n	8000cca <HAL_I2C_Mem_Write+0x1e>
      if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 8000d4e:	f7ff fdf9 	bl	8000944 <I2C_WaitOnTXEFlagUntilTimeout>
 8000d52:	b120      	cbz	r0, 8000d5e <HAL_I2C_Mem_Write+0xb2>
        if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8000d54:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8000d56:	2b04      	cmp	r3, #4
 8000d58:	d034      	beq.n	8000dc4 <HAL_I2C_Mem_Write+0x118>
          return HAL_TIMEOUT;
 8000d5a:	2003      	movs	r0, #3
 8000d5c:	e7b5      	b.n	8000cca <HAL_I2C_Mem_Write+0x1e>
      hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8000d5e:	6a61      	ldr	r1, [r4, #36]	; 0x24
 8000d60:	6827      	ldr	r7, [r4, #0]
 8000d62:	1c4b      	adds	r3, r1, #1
 8000d64:	6263      	str	r3, [r4, #36]	; 0x24
 8000d66:	780b      	ldrb	r3, [r1, #0]
      hi2c->XferSize--;
 8000d68:	8d22      	ldrh	r2, [r4, #40]	; 0x28
      hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8000d6a:	613b      	str	r3, [r7, #16]
      hi2c->XferCount--;
 8000d6c:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
      hi2c->XferSize--;
 8000d6e:	1e50      	subs	r0, r2, #1
      hi2c->XferCount--;
 8000d70:	3b01      	subs	r3, #1
 8000d72:	b29b      	uxth	r3, r3
 8000d74:	8563      	strh	r3, [r4, #42]	; 0x2a
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
 8000d76:	697b      	ldr	r3, [r7, #20]
      hi2c->XferSize--;
 8000d78:	b280      	uxth	r0, r0
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
 8000d7a:	075b      	lsls	r3, r3, #29
      hi2c->XferSize--;
 8000d7c:	8520      	strh	r0, [r4, #40]	; 0x28
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
 8000d7e:	d50a      	bpl.n	8000d96 <HAL_I2C_Mem_Write+0xea>
 8000d80:	b148      	cbz	r0, 8000d96 <HAL_I2C_Mem_Write+0xea>
        hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8000d82:	1c8b      	adds	r3, r1, #2
 8000d84:	6263      	str	r3, [r4, #36]	; 0x24
 8000d86:	784b      	ldrb	r3, [r1, #1]
        hi2c->XferSize--;
 8000d88:	3a02      	subs	r2, #2
        hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8000d8a:	613b      	str	r3, [r7, #16]
        hi2c->XferCount--;
 8000d8c:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
        hi2c->XferSize--;
 8000d8e:	8522      	strh	r2, [r4, #40]	; 0x28
        hi2c->XferCount--;
 8000d90:	3b01      	subs	r3, #1
 8000d92:	b29b      	uxth	r3, r3
 8000d94:	8563      	strh	r3, [r4, #42]	; 0x2a
    while(hi2c->XferSize > 0U)
 8000d96:	8d23      	ldrh	r3, [r4, #40]	; 0x28
      if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 8000d98:	462a      	mov	r2, r5
 8000d9a:	4631      	mov	r1, r6
 8000d9c:	4620      	mov	r0, r4
    while(hi2c->XferSize > 0U)
 8000d9e:	2b00      	cmp	r3, #0
 8000da0:	d1d5      	bne.n	8000d4e <HAL_I2C_Mem_Write+0xa2>
    if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 8000da2:	f7ff feee 	bl	8000b82 <I2C_WaitOnBTFFlagUntilTimeout>
 8000da6:	2800      	cmp	r0, #0
 8000da8:	d1d4      	bne.n	8000d54 <HAL_I2C_Mem_Write+0xa8>
    hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8000daa:	6822      	ldr	r2, [r4, #0]
 8000dac:	6813      	ldr	r3, [r2, #0]
 8000dae:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8000db2:	6013      	str	r3, [r2, #0]
    hi2c->State = HAL_I2C_STATE_READY;
 8000db4:	2320      	movs	r3, #32
    __HAL_UNLOCK(hi2c);
 8000db6:	f884 003c 	strb.w	r0, [r4, #60]	; 0x3c
    hi2c->State = HAL_I2C_STATE_READY;
 8000dba:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode = HAL_I2C_MODE_NONE;
 8000dbe:	f884 003e 	strb.w	r0, [r4, #62]	; 0x3e
    return HAL_OK;
 8000dc2:	e782      	b.n	8000cca <HAL_I2C_Mem_Write+0x1e>
        hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8000dc4:	6822      	ldr	r2, [r4, #0]
 8000dc6:	6813      	ldr	r3, [r2, #0]
 8000dc8:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8000dcc:	6013      	str	r3, [r2, #0]
 8000dce:	e7bc      	b.n	8000d4a <HAL_I2C_Mem_Write+0x9e>
 8000dd0:	00100002 	.word	0x00100002
 8000dd4:	ffff0000 	.word	0xffff0000

08000dd8 <HAL_I2C_Mem_Read>:
{
 8000dd8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8000ddc:	4604      	mov	r4, r0
 8000dde:	b086      	sub	sp, #24
 8000de0:	469a      	mov	sl, r3
 8000de2:	460d      	mov	r5, r1
 8000de4:	4691      	mov	r9, r2
 8000de6:	9f10      	ldr	r7, [sp, #64]	; 0x40
  tickstart = HAL_GetTick();
 8000de8:	f7ff fbaa 	bl	8000540 <HAL_GetTick>
  if(hi2c->State == HAL_I2C_STATE_READY)
 8000dec:	f894 303d 	ldrb.w	r3, [r4, #61]	; 0x3d
  tickstart = HAL_GetTick();
 8000df0:	4606      	mov	r6, r0
  if(hi2c->State == HAL_I2C_STATE_READY)
 8000df2:	2b20      	cmp	r3, #32
 8000df4:	d004      	beq.n	8000e00 <HAL_I2C_Mem_Read+0x28>
    return HAL_BUSY;
 8000df6:	2502      	movs	r5, #2
}
 8000df8:	4628      	mov	r0, r5
 8000dfa:	b006      	add	sp, #24
 8000dfc:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
 8000e00:	9000      	str	r0, [sp, #0]
 8000e02:	2319      	movs	r3, #25
 8000e04:	2201      	movs	r2, #1
 8000e06:	497a      	ldr	r1, [pc, #488]	; (8000ff0 <HAL_I2C_Mem_Read+0x218>)
 8000e08:	4620      	mov	r0, r4
 8000e0a:	f7ff fd6d 	bl	80008e8 <I2C_WaitOnFlagUntilTimeout>
 8000e0e:	2800      	cmp	r0, #0
 8000e10:	d1f1      	bne.n	8000df6 <HAL_I2C_Mem_Read+0x1e>
    __HAL_LOCK(hi2c);
 8000e12:	f894 303c 	ldrb.w	r3, [r4, #60]	; 0x3c
 8000e16:	2b01      	cmp	r3, #1
 8000e18:	d0ed      	beq.n	8000df6 <HAL_I2C_Mem_Read+0x1e>
 8000e1a:	2301      	movs	r3, #1
 8000e1c:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8000e20:	6823      	ldr	r3, [r4, #0]
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8000e22:	f04f 0800 	mov.w	r8, #0
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8000e26:	681a      	ldr	r2, [r3, #0]
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000e28:	4629      	mov	r1, r5
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8000e2a:	07d2      	lsls	r2, r2, #31
      __HAL_I2C_ENABLE(hi2c);
 8000e2c:	bf58      	it	pl
 8000e2e:	681a      	ldrpl	r2, [r3, #0]
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000e30:	4620      	mov	r0, r4
      __HAL_I2C_ENABLE(hi2c);
 8000e32:	bf5c      	itt	pl
 8000e34:	f042 0201 	orrpl.w	r2, r2, #1
 8000e38:	601a      	strpl	r2, [r3, #0]
    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 8000e3a:	681a      	ldr	r2, [r3, #0]
 8000e3c:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
 8000e40:	601a      	str	r2, [r3, #0]
    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
 8000e42:	2322      	movs	r3, #34	; 0x22
 8000e44:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode      = HAL_I2C_MODE_MEM;
 8000e48:	2340      	movs	r3, #64	; 0x40
 8000e4a:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
    hi2c->pBuffPtr    = pData;
 8000e4e:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8000e50:	f8c4 8040 	str.w	r8, [r4, #64]	; 0x40
    hi2c->pBuffPtr    = pData;
 8000e54:	6263      	str	r3, [r4, #36]	; 0x24
    hi2c->XferCount   = Size;
 8000e56:	f8bd 303c 	ldrh.w	r3, [sp, #60]	; 0x3c
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000e5a:	9601      	str	r6, [sp, #4]
    hi2c->XferCount   = Size;
 8000e5c:	8563      	strh	r3, [r4, #42]	; 0x2a
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8000e5e:	4b65      	ldr	r3, [pc, #404]	; (8000ff4 <HAL_I2C_Mem_Read+0x21c>)
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000e60:	9700      	str	r7, [sp, #0]
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8000e62:	62e3      	str	r3, [r4, #44]	; 0x2c
    hi2c->XferSize    = hi2c->XferCount;
 8000e64:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000e66:	464a      	mov	r2, r9
    hi2c->XferSize    = hi2c->XferCount;
 8000e68:	8523      	strh	r3, [r4, #40]	; 0x28
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8000e6a:	4653      	mov	r3, sl
 8000e6c:	f7ff fde2 	bl	8000a34 <I2C_RequestMemoryRead>
 8000e70:	4605      	mov	r5, r0
 8000e72:	b130      	cbz	r0, 8000e82 <HAL_I2C_Mem_Read+0xaa>
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8000e74:	6c23      	ldr	r3, [r4, #64]	; 0x40
        __HAL_UNLOCK(hi2c);
 8000e76:	f884 803c 	strb.w	r8, [r4, #60]	; 0x3c
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8000e7a:	2b04      	cmp	r3, #4
 8000e7c:	d13a      	bne.n	8000ef4 <HAL_I2C_Mem_Read+0x11c>
              return HAL_ERROR;
 8000e7e:	2501      	movs	r5, #1
 8000e80:	e7ba      	b.n	8000df8 <HAL_I2C_Mem_Read+0x20>
    if(hi2c->XferSize == 0U)
 8000e82:	8d22      	ldrh	r2, [r4, #40]	; 0x28
 8000e84:	6823      	ldr	r3, [r4, #0]
 8000e86:	b992      	cbnz	r2, 8000eae <HAL_I2C_Mem_Read+0xd6>
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000e88:	9002      	str	r0, [sp, #8]
 8000e8a:	695a      	ldr	r2, [r3, #20]
 8000e8c:	9202      	str	r2, [sp, #8]
 8000e8e:	699a      	ldr	r2, [r3, #24]
 8000e90:	9202      	str	r2, [sp, #8]
 8000e92:	9a02      	ldr	r2, [sp, #8]
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8000e94:	681a      	ldr	r2, [r3, #0]
 8000e96:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8000e9a:	601a      	str	r2, [r3, #0]
    hi2c->State = HAL_I2C_STATE_READY;
 8000e9c:	2320      	movs	r3, #32
 8000e9e:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode = HAL_I2C_MODE_NONE;
 8000ea2:	2300      	movs	r3, #0
 8000ea4:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
    __HAL_UNLOCK(hi2c);
 8000ea8:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
    return HAL_OK;
 8000eac:	e7a4      	b.n	8000df8 <HAL_I2C_Mem_Read+0x20>
    else if(hi2c->XferSize == 1U)
 8000eae:	2a01      	cmp	r2, #1
 8000eb0:	d122      	bne.n	8000ef8 <HAL_I2C_Mem_Read+0x120>
      hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 8000eb2:	681a      	ldr	r2, [r3, #0]
 8000eb4:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
 8000eb8:	601a      	str	r2, [r3, #0]
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000eba:	9003      	str	r0, [sp, #12]
 8000ebc:	695a      	ldr	r2, [r3, #20]
 8000ebe:	9203      	str	r2, [sp, #12]
 8000ec0:	699a      	ldr	r2, [r3, #24]
 8000ec2:	9203      	str	r2, [sp, #12]
 8000ec4:	9a03      	ldr	r2, [sp, #12]
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8000ec6:	681a      	ldr	r2, [r3, #0]
 8000ec8:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8000ecc:	601a      	str	r2, [r3, #0]
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8000ece:	f8df 8128 	ldr.w	r8, [pc, #296]	; 8000ff8 <HAL_I2C_Mem_Read+0x220>
    while(hi2c->XferSize > 0U)
 8000ed2:	8d23      	ldrh	r3, [r4, #40]	; 0x28
 8000ed4:	2b00      	cmp	r3, #0
 8000ed6:	d0e1      	beq.n	8000e9c <HAL_I2C_Mem_Read+0xc4>
      if(hi2c->XferSize <= 3U)
 8000ed8:	2b03      	cmp	r3, #3
 8000eda:	d86b      	bhi.n	8000fb4 <HAL_I2C_Mem_Read+0x1dc>
        if(hi2c->XferSize== 1U)
 8000edc:	2b01      	cmp	r3, #1
 8000ede:	d123      	bne.n	8000f28 <HAL_I2C_Mem_Read+0x150>
          if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)      
 8000ee0:	4632      	mov	r2, r6
 8000ee2:	4639      	mov	r1, r7
 8000ee4:	4620      	mov	r0, r4
 8000ee6:	f7ff fe1f 	bl	8000b28 <I2C_WaitOnRXNEFlagUntilTimeout>
 8000eea:	2800      	cmp	r0, #0
 8000eec:	d039      	beq.n	8000f62 <HAL_I2C_Mem_Read+0x18a>
            if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
 8000eee:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8000ef0:	2b20      	cmp	r3, #32
 8000ef2:	d1c4      	bne.n	8000e7e <HAL_I2C_Mem_Read+0xa6>
              return HAL_TIMEOUT;
 8000ef4:	2503      	movs	r5, #3
 8000ef6:	e77f      	b.n	8000df8 <HAL_I2C_Mem_Read+0x20>
    else if(hi2c->XferSize == 2U)
 8000ef8:	2a02      	cmp	r2, #2
 8000efa:	d10e      	bne.n	8000f1a <HAL_I2C_Mem_Read+0x142>
      hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 8000efc:	681a      	ldr	r2, [r3, #0]
 8000efe:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
 8000f02:	601a      	str	r2, [r3, #0]
      hi2c->Instance->CR1 |= I2C_CR1_POS;
 8000f04:	681a      	ldr	r2, [r3, #0]
 8000f06:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
 8000f0a:	601a      	str	r2, [r3, #0]
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000f0c:	9004      	str	r0, [sp, #16]
 8000f0e:	695a      	ldr	r2, [r3, #20]
 8000f10:	9204      	str	r2, [sp, #16]
 8000f12:	699b      	ldr	r3, [r3, #24]
 8000f14:	9304      	str	r3, [sp, #16]
 8000f16:	9b04      	ldr	r3, [sp, #16]
 8000f18:	e7d9      	b.n	8000ece <HAL_I2C_Mem_Read+0xf6>
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8000f1a:	9005      	str	r0, [sp, #20]
 8000f1c:	695a      	ldr	r2, [r3, #20]
 8000f1e:	9205      	str	r2, [sp, #20]
 8000f20:	699b      	ldr	r3, [r3, #24]
 8000f22:	9305      	str	r3, [sp, #20]
 8000f24:	9b05      	ldr	r3, [sp, #20]
 8000f26:	e7d2      	b.n	8000ece <HAL_I2C_Mem_Read+0xf6>
        else if(hi2c->XferSize == 2U)
 8000f28:	2b02      	cmp	r3, #2
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8000f2a:	9600      	str	r6, [sp, #0]
 8000f2c:	463b      	mov	r3, r7
 8000f2e:	f04f 0200 	mov.w	r2, #0
 8000f32:	4641      	mov	r1, r8
 8000f34:	4620      	mov	r0, r4
        else if(hi2c->XferSize == 2U)
 8000f36:	d122      	bne.n	8000f7e <HAL_I2C_Mem_Read+0x1a6>
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8000f38:	f7ff fcd6 	bl	80008e8 <I2C_WaitOnFlagUntilTimeout>
 8000f3c:	2800      	cmp	r0, #0
 8000f3e:	d1d9      	bne.n	8000ef4 <HAL_I2C_Mem_Read+0x11c>
          hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8000f40:	6823      	ldr	r3, [r4, #0]
 8000f42:	681a      	ldr	r2, [r3, #0]
 8000f44:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8000f48:	601a      	str	r2, [r3, #0]
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8000f4a:	6a62      	ldr	r2, [r4, #36]	; 0x24
 8000f4c:	691b      	ldr	r3, [r3, #16]
 8000f4e:	1c51      	adds	r1, r2, #1
 8000f50:	6261      	str	r1, [r4, #36]	; 0x24
 8000f52:	7013      	strb	r3, [r2, #0]
          hi2c->XferSize--;
 8000f54:	8d23      	ldrh	r3, [r4, #40]	; 0x28
 8000f56:	3b01      	subs	r3, #1
 8000f58:	8523      	strh	r3, [r4, #40]	; 0x28
          hi2c->XferCount--;
 8000f5a:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
 8000f5c:	3b01      	subs	r3, #1
 8000f5e:	b29b      	uxth	r3, r3
 8000f60:	8563      	strh	r3, [r4, #42]	; 0x2a
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8000f62:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000f64:	1c5a      	adds	r2, r3, #1
 8000f66:	6262      	str	r2, [r4, #36]	; 0x24
 8000f68:	6822      	ldr	r2, [r4, #0]
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8000f6a:	6912      	ldr	r2, [r2, #16]
 8000f6c:	701a      	strb	r2, [r3, #0]
          hi2c->XferSize--;
 8000f6e:	8d23      	ldrh	r3, [r4, #40]	; 0x28
 8000f70:	3b01      	subs	r3, #1
 8000f72:	8523      	strh	r3, [r4, #40]	; 0x28
          hi2c->XferCount--;
 8000f74:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
 8000f76:	3b01      	subs	r3, #1
 8000f78:	b29b      	uxth	r3, r3
 8000f7a:	8563      	strh	r3, [r4, #42]	; 0x2a
 8000f7c:	e7a9      	b.n	8000ed2 <HAL_I2C_Mem_Read+0xfa>
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8000f7e:	f7ff fcb3 	bl	80008e8 <I2C_WaitOnFlagUntilTimeout>
 8000f82:	4602      	mov	r2, r0
 8000f84:	2800      	cmp	r0, #0
 8000f86:	d1b5      	bne.n	8000ef4 <HAL_I2C_Mem_Read+0x11c>
          hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 8000f88:	6823      	ldr	r3, [r4, #0]
 8000f8a:	6819      	ldr	r1, [r3, #0]
 8000f8c:	f421 6180 	bic.w	r1, r1, #1024	; 0x400
 8000f90:	6019      	str	r1, [r3, #0]
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8000f92:	6a61      	ldr	r1, [r4, #36]	; 0x24
 8000f94:	691b      	ldr	r3, [r3, #16]
 8000f96:	1c48      	adds	r0, r1, #1
 8000f98:	6260      	str	r0, [r4, #36]	; 0x24
 8000f9a:	700b      	strb	r3, [r1, #0]
          hi2c->XferSize--;
 8000f9c:	8d23      	ldrh	r3, [r4, #40]	; 0x28
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8000f9e:	9600      	str	r6, [sp, #0]
          hi2c->XferSize--;
 8000fa0:	3b01      	subs	r3, #1
 8000fa2:	8523      	strh	r3, [r4, #40]	; 0x28
          hi2c->XferCount--;
 8000fa4:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8000fa6:	4641      	mov	r1, r8
          hi2c->XferCount--;
 8000fa8:	3b01      	subs	r3, #1
 8000faa:	b29b      	uxth	r3, r3
 8000fac:	8563      	strh	r3, [r4, #42]	; 0x2a
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8000fae:	4620      	mov	r0, r4
 8000fb0:	463b      	mov	r3, r7
 8000fb2:	e7c1      	b.n	8000f38 <HAL_I2C_Mem_Read+0x160>
        if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 8000fb4:	4632      	mov	r2, r6
 8000fb6:	4639      	mov	r1, r7
 8000fb8:	4620      	mov	r0, r4
 8000fba:	f7ff fdb5 	bl	8000b28 <I2C_WaitOnRXNEFlagUntilTimeout>
 8000fbe:	2800      	cmp	r0, #0
 8000fc0:	d195      	bne.n	8000eee <HAL_I2C_Mem_Read+0x116>
        (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8000fc2:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000fc4:	1c5a      	adds	r2, r3, #1
 8000fc6:	6262      	str	r2, [r4, #36]	; 0x24
 8000fc8:	6822      	ldr	r2, [r4, #0]
 8000fca:	6912      	ldr	r2, [r2, #16]
 8000fcc:	701a      	strb	r2, [r3, #0]
        hi2c->XferSize--;
 8000fce:	8d23      	ldrh	r3, [r4, #40]	; 0x28
        if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
 8000fd0:	6822      	ldr	r2, [r4, #0]
        hi2c->XferSize--;
 8000fd2:	3b01      	subs	r3, #1
 8000fd4:	8523      	strh	r3, [r4, #40]	; 0x28
        hi2c->XferCount--;
 8000fd6:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
 8000fd8:	3b01      	subs	r3, #1
 8000fda:	b29b      	uxth	r3, r3
 8000fdc:	8563      	strh	r3, [r4, #42]	; 0x2a
        if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
 8000fde:	6953      	ldr	r3, [r2, #20]
 8000fe0:	075b      	lsls	r3, r3, #29
 8000fe2:	f57f af76 	bpl.w	8000ed2 <HAL_I2C_Mem_Read+0xfa>
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8000fe6:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000fe8:	1c59      	adds	r1, r3, #1
 8000fea:	6261      	str	r1, [r4, #36]	; 0x24
 8000fec:	e7bd      	b.n	8000f6a <HAL_I2C_Mem_Read+0x192>
 8000fee:	bf00      	nop
 8000ff0:	00100002 	.word	0x00100002
 8000ff4:	ffff0000 	.word	0xffff0000
 8000ff8:	00010004 	.word	0x00010004

08000ffc <HAL_RCC_OscConfig>:
  *         supported by this API. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 8000ffc:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
  uint32_t tickstart;

  /* Check Null pointer */
  if(RCC_OscInitStruct == NULL)
 8000ffe:	4604      	mov	r4, r0
 8001000:	b910      	cbnz	r0, 8001008 <HAL_RCC_OscConfig+0xc>
  {
    return HAL_ERROR;
 8001002:	2001      	movs	r0, #1
    {
      return HAL_ERROR;
    }
  }
  return HAL_OK;
}
 8001004:	b003      	add	sp, #12
 8001006:	bdf0      	pop	{r4, r5, r6, r7, pc}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8001008:	6803      	ldr	r3, [r0, #0]
 800100a:	07d8      	lsls	r0, r3, #31
 800100c:	d438      	bmi.n	8001080 <HAL_RCC_OscConfig+0x84>
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 800100e:	6823      	ldr	r3, [r4, #0]
 8001010:	0799      	lsls	r1, r3, #30
 8001012:	d46b      	bmi.n	80010ec <HAL_RCC_OscConfig+0xf0>
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8001014:	6823      	ldr	r3, [r4, #0]
 8001016:	071e      	lsls	r6, r3, #28
 8001018:	f100 80b8 	bmi.w	800118c <HAL_RCC_OscConfig+0x190>
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 800101c:	6823      	ldr	r3, [r4, #0]
 800101e:	075d      	lsls	r5, r3, #29
 8001020:	d528      	bpl.n	8001074 <HAL_RCC_OscConfig+0x78>
    __HAL_RCC_PWR_CLK_ENABLE();
 8001022:	2300      	movs	r3, #0
 8001024:	9301      	str	r3, [sp, #4]
 8001026:	4ba5      	ldr	r3, [pc, #660]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
    PWR->CR |= PWR_CR_DBP;
 8001028:	4da5      	ldr	r5, [pc, #660]	; (80012c0 <HAL_RCC_OscConfig+0x2c4>)
    __HAL_RCC_PWR_CLK_ENABLE();
 800102a:	6c1a      	ldr	r2, [r3, #64]	; 0x40
 800102c:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8001030:	641a      	str	r2, [r3, #64]	; 0x40
 8001032:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001034:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001038:	9301      	str	r3, [sp, #4]
 800103a:	9b01      	ldr	r3, [sp, #4]
    PWR->CR |= PWR_CR_DBP;
 800103c:	682b      	ldr	r3, [r5, #0]
 800103e:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8001042:	602b      	str	r3, [r5, #0]
    tickstart = HAL_GetTick();
 8001044:	f7ff fa7c 	bl	8000540 <HAL_GetTick>
 8001048:	4606      	mov	r6, r0
    while((PWR->CR & PWR_CR_DBP) == RESET)
 800104a:	682b      	ldr	r3, [r5, #0]
 800104c:	05da      	lsls	r2, r3, #23
 800104e:	f140 80bf 	bpl.w	80011d0 <HAL_RCC_OscConfig+0x1d4>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8001052:	4b9c      	ldr	r3, [pc, #624]	; (80012c4 <HAL_RCC_OscConfig+0x2c8>)
 8001054:	7a22      	ldrb	r2, [r4, #8]
 8001056:	701a      	strb	r2, [r3, #0]
    if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 8001058:	68a3      	ldr	r3, [r4, #8]
 800105a:	2b00      	cmp	r3, #0
 800105c:	f000 80c6 	beq.w	80011ec <HAL_RCC_OscConfig+0x1f0>
      tickstart = HAL_GetTick();
 8001060:	f7ff fa6e 	bl	8000540 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8001064:	f241 3788 	movw	r7, #5000	; 0x1388
      tickstart = HAL_GetTick();
 8001068:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 800106a:	4d94      	ldr	r5, [pc, #592]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 800106c:	6f2b      	ldr	r3, [r5, #112]	; 0x70
 800106e:	079b      	lsls	r3, r3, #30
 8001070:	f140 80b5 	bpl.w	80011de <HAL_RCC_OscConfig+0x1e2>
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8001074:	69a2      	ldr	r2, [r4, #24]
 8001076:	2a00      	cmp	r2, #0
 8001078:	f040 80c8 	bne.w	800120c <HAL_RCC_OscConfig+0x210>
  return HAL_OK;
 800107c:	2000      	movs	r0, #0
 800107e:	e7c1      	b.n	8001004 <HAL_RCC_OscConfig+0x8>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
 8001080:	4b8e      	ldr	r3, [pc, #568]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 8001082:	689a      	ldr	r2, [r3, #8]
 8001084:	f002 020c 	and.w	r2, r2, #12
 8001088:	2a04      	cmp	r2, #4
 800108a:	d007      	beq.n	800109c <HAL_RCC_OscConfig+0xa0>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
 800108c:	689a      	ldr	r2, [r3, #8]
 800108e:	f002 020c 	and.w	r2, r2, #12
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
 8001092:	2a08      	cmp	r2, #8
 8001094:	d10a      	bne.n	80010ac <HAL_RCC_OscConfig+0xb0>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
 8001096:	685b      	ldr	r3, [r3, #4]
 8001098:	025a      	lsls	r2, r3, #9
 800109a:	d507      	bpl.n	80010ac <HAL_RCC_OscConfig+0xb0>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800109c:	4b87      	ldr	r3, [pc, #540]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 800109e:	681b      	ldr	r3, [r3, #0]
 80010a0:	039b      	lsls	r3, r3, #14
 80010a2:	d5b4      	bpl.n	800100e <HAL_RCC_OscConfig+0x12>
 80010a4:	6863      	ldr	r3, [r4, #4]
 80010a6:	2b00      	cmp	r3, #0
 80010a8:	d1b1      	bne.n	800100e <HAL_RCC_OscConfig+0x12>
 80010aa:	e7aa      	b.n	8001002 <HAL_RCC_OscConfig+0x6>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80010ac:	4b86      	ldr	r3, [pc, #536]	; (80012c8 <HAL_RCC_OscConfig+0x2cc>)
 80010ae:	7922      	ldrb	r2, [r4, #4]
 80010b0:	701a      	strb	r2, [r3, #0]
      if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
 80010b2:	6863      	ldr	r3, [r4, #4]
 80010b4:	b16b      	cbz	r3, 80010d2 <HAL_RCC_OscConfig+0xd6>
        tickstart = HAL_GetTick();
 80010b6:	f7ff fa43 	bl	8000540 <HAL_GetTick>
 80010ba:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80010bc:	4d7f      	ldr	r5, [pc, #508]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 80010be:	682b      	ldr	r3, [r5, #0]
 80010c0:	039f      	lsls	r7, r3, #14
 80010c2:	d4a4      	bmi.n	800100e <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 80010c4:	f7ff fa3c 	bl	8000540 <HAL_GetTick>
 80010c8:	1b80      	subs	r0, r0, r6
 80010ca:	2864      	cmp	r0, #100	; 0x64
 80010cc:	d9f7      	bls.n	80010be <HAL_RCC_OscConfig+0xc2>
            return HAL_TIMEOUT;
 80010ce:	2003      	movs	r0, #3
 80010d0:	e798      	b.n	8001004 <HAL_RCC_OscConfig+0x8>
        tickstart = HAL_GetTick();
 80010d2:	f7ff fa35 	bl	8000540 <HAL_GetTick>
 80010d6:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 80010d8:	4d78      	ldr	r5, [pc, #480]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 80010da:	682b      	ldr	r3, [r5, #0]
 80010dc:	0398      	lsls	r0, r3, #14
 80010de:	d596      	bpl.n	800100e <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 80010e0:	f7ff fa2e 	bl	8000540 <HAL_GetTick>
 80010e4:	1b80      	subs	r0, r0, r6
 80010e6:	2864      	cmp	r0, #100	; 0x64
 80010e8:	d9f7      	bls.n	80010da <HAL_RCC_OscConfig+0xde>
 80010ea:	e7f0      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
 80010ec:	4b73      	ldr	r3, [pc, #460]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 80010ee:	689a      	ldr	r2, [r3, #8]
 80010f0:	f012 0f0c 	tst.w	r2, #12
 80010f4:	d007      	beq.n	8001106 <HAL_RCC_OscConfig+0x10a>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
 80010f6:	689a      	ldr	r2, [r3, #8]
 80010f8:	f002 020c 	and.w	r2, r2, #12
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
 80010fc:	2a08      	cmp	r2, #8
 80010fe:	d117      	bne.n	8001130 <HAL_RCC_OscConfig+0x134>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
 8001100:	685b      	ldr	r3, [r3, #4]
 8001102:	0259      	lsls	r1, r3, #9
 8001104:	d414      	bmi.n	8001130 <HAL_RCC_OscConfig+0x134>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 8001106:	4b6d      	ldr	r3, [pc, #436]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 8001108:	681a      	ldr	r2, [r3, #0]
 800110a:	0792      	lsls	r2, r2, #30
 800110c:	d503      	bpl.n	8001116 <HAL_RCC_OscConfig+0x11a>
 800110e:	68e2      	ldr	r2, [r4, #12]
 8001110:	2a01      	cmp	r2, #1
 8001112:	f47f af76 	bne.w	8001002 <HAL_RCC_OscConfig+0x6>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8001116:	6818      	ldr	r0, [r3, #0]
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
{
  uint32_t result;

#if       (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
 8001118:	22f8      	movs	r2, #248	; 0xf8
 800111a:	fa92 f2a2 	rbit	r2, r2
 800111e:	fab2 f182 	clz	r1, r2
 8001122:	6922      	ldr	r2, [r4, #16]
 8001124:	408a      	lsls	r2, r1
 8001126:	f020 01f8 	bic.w	r1, r0, #248	; 0xf8
 800112a:	430a      	orrs	r2, r1
 800112c:	601a      	str	r2, [r3, #0]
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 800112e:	e771      	b.n	8001014 <HAL_RCC_OscConfig+0x18>
      if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
 8001130:	68e2      	ldr	r2, [r4, #12]
 8001132:	4b66      	ldr	r3, [pc, #408]	; (80012cc <HAL_RCC_OscConfig+0x2d0>)
 8001134:	b1da      	cbz	r2, 800116e <HAL_RCC_OscConfig+0x172>
        __HAL_RCC_HSI_ENABLE();
 8001136:	2201      	movs	r2, #1
 8001138:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 800113a:	f7ff fa01 	bl	8000540 <HAL_GetTick>
 800113e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8001140:	4d5e      	ldr	r5, [pc, #376]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 8001142:	682b      	ldr	r3, [r5, #0]
 8001144:	079b      	lsls	r3, r3, #30
 8001146:	d50c      	bpl.n	8001162 <HAL_RCC_OscConfig+0x166>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8001148:	6829      	ldr	r1, [r5, #0]
 800114a:	23f8      	movs	r3, #248	; 0xf8
 800114c:	fa93 f3a3 	rbit	r3, r3
 8001150:	fab3 f283 	clz	r2, r3
 8001154:	6923      	ldr	r3, [r4, #16]
 8001156:	4093      	lsls	r3, r2
 8001158:	f021 02f8 	bic.w	r2, r1, #248	; 0xf8
 800115c:	4313      	orrs	r3, r2
 800115e:	602b      	str	r3, [r5, #0]
 8001160:	e758      	b.n	8001014 <HAL_RCC_OscConfig+0x18>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8001162:	f7ff f9ed 	bl	8000540 <HAL_GetTick>
 8001166:	1b80      	subs	r0, r0, r6
 8001168:	2802      	cmp	r0, #2
 800116a:	d9ea      	bls.n	8001142 <HAL_RCC_OscConfig+0x146>
 800116c:	e7af      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
        __HAL_RCC_HSI_DISABLE();
 800116e:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8001170:	f7ff f9e6 	bl	8000540 <HAL_GetTick>
 8001174:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8001176:	4d51      	ldr	r5, [pc, #324]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 8001178:	682b      	ldr	r3, [r5, #0]
 800117a:	079f      	lsls	r7, r3, #30
 800117c:	f57f af4a 	bpl.w	8001014 <HAL_RCC_OscConfig+0x18>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8001180:	f7ff f9de 	bl	8000540 <HAL_GetTick>
 8001184:	1b80      	subs	r0, r0, r6
 8001186:	2802      	cmp	r0, #2
 8001188:	d9f6      	bls.n	8001178 <HAL_RCC_OscConfig+0x17c>
 800118a:	e7a0      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
    if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
 800118c:	6962      	ldr	r2, [r4, #20]
 800118e:	4b50      	ldr	r3, [pc, #320]	; (80012d0 <HAL_RCC_OscConfig+0x2d4>)
 8001190:	b17a      	cbz	r2, 80011b2 <HAL_RCC_OscConfig+0x1b6>
      __HAL_RCC_LSI_ENABLE();
 8001192:	2201      	movs	r2, #1
 8001194:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8001196:	f7ff f9d3 	bl	8000540 <HAL_GetTick>
 800119a:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 800119c:	4d47      	ldr	r5, [pc, #284]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 800119e:	6f6b      	ldr	r3, [r5, #116]	; 0x74
 80011a0:	0798      	lsls	r0, r3, #30
 80011a2:	f53f af3b 	bmi.w	800101c <HAL_RCC_OscConfig+0x20>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 80011a6:	f7ff f9cb 	bl	8000540 <HAL_GetTick>
 80011aa:	1b80      	subs	r0, r0, r6
 80011ac:	2802      	cmp	r0, #2
 80011ae:	d9f6      	bls.n	800119e <HAL_RCC_OscConfig+0x1a2>
 80011b0:	e78d      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
      __HAL_RCC_LSI_DISABLE();
 80011b2:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 80011b4:	f7ff f9c4 	bl	8000540 <HAL_GetTick>
 80011b8:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 80011ba:	4d40      	ldr	r5, [pc, #256]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 80011bc:	6f6b      	ldr	r3, [r5, #116]	; 0x74
 80011be:	0799      	lsls	r1, r3, #30
 80011c0:	f57f af2c 	bpl.w	800101c <HAL_RCC_OscConfig+0x20>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 80011c4:	f7ff f9bc 	bl	8000540 <HAL_GetTick>
 80011c8:	1b80      	subs	r0, r0, r6
 80011ca:	2802      	cmp	r0, #2
 80011cc:	d9f6      	bls.n	80011bc <HAL_RCC_OscConfig+0x1c0>
 80011ce:	e77e      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
      if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
 80011d0:	f7ff f9b6 	bl	8000540 <HAL_GetTick>
 80011d4:	1b80      	subs	r0, r0, r6
 80011d6:	2802      	cmp	r0, #2
 80011d8:	f67f af37 	bls.w	800104a <HAL_RCC_OscConfig+0x4e>
 80011dc:	e777      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80011de:	f7ff f9af 	bl	8000540 <HAL_GetTick>
 80011e2:	1b80      	subs	r0, r0, r6
 80011e4:	42b8      	cmp	r0, r7
 80011e6:	f67f af41 	bls.w	800106c <HAL_RCC_OscConfig+0x70>
 80011ea:	e770      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
      tickstart = HAL_GetTick();
 80011ec:	f7ff f9a8 	bl	8000540 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80011f0:	f241 3788 	movw	r7, #5000	; 0x1388
      tickstart = HAL_GetTick();
 80011f4:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 80011f6:	4d31      	ldr	r5, [pc, #196]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 80011f8:	6f2b      	ldr	r3, [r5, #112]	; 0x70
 80011fa:	0798      	lsls	r0, r3, #30
 80011fc:	f57f af3a 	bpl.w	8001074 <HAL_RCC_OscConfig+0x78>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8001200:	f7ff f99e 	bl	8000540 <HAL_GetTick>
 8001204:	1b80      	subs	r0, r0, r6
 8001206:	42b8      	cmp	r0, r7
 8001208:	d9f6      	bls.n	80011f8 <HAL_RCC_OscConfig+0x1fc>
 800120a:	e760      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
 800120c:	4d2b      	ldr	r5, [pc, #172]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
 800120e:	68ab      	ldr	r3, [r5, #8]
 8001210:	f003 030c 	and.w	r3, r3, #12
 8001214:	2b08      	cmp	r3, #8
 8001216:	f43f aef4 	beq.w	8001002 <HAL_RCC_OscConfig+0x6>
 800121a:	2300      	movs	r3, #0
 800121c:	4e2d      	ldr	r6, [pc, #180]	; (80012d4 <HAL_RCC_OscConfig+0x2d8>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800121e:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8001220:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8001222:	d13e      	bne.n	80012a2 <HAL_RCC_OscConfig+0x2a6>
        tickstart = HAL_GetTick();
 8001224:	f7ff f98c 	bl	8000540 <HAL_GetTick>
 8001228:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 800122a:	682b      	ldr	r3, [r5, #0]
 800122c:	0199      	lsls	r1, r3, #6
 800122e:	d432      	bmi.n	8001296 <HAL_RCC_OscConfig+0x29a>
 8001230:	f647 77c0 	movw	r7, #32704	; 0x7fc0
 8001234:	fa97 f7a7 	rbit	r7, r7
 8001238:	f44f 3240 	mov.w	r2, #196608	; 0x30000
        WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource                                              | \
 800123c:	fab7 f787 	clz	r7, r7
 8001240:	fa92 f2a2 	rbit	r2, r2
 8001244:	f04f 6170 	mov.w	r1, #251658240	; 0xf000000
 8001248:	fab2 f082 	clz	r0, r2
 800124c:	fa91 f1a1 	rbit	r1, r1
 8001250:	fab1 f181 	clz	r1, r1
 8001254:	6a22      	ldr	r2, [r4, #32]
 8001256:	69e3      	ldr	r3, [r4, #28]
 8001258:	4313      	orrs	r3, r2
 800125a:	6a62      	ldr	r2, [r4, #36]	; 0x24
 800125c:	fa02 f707 	lsl.w	r7, r2, r7
 8001260:	6aa2      	ldr	r2, [r4, #40]	; 0x28
 8001262:	433b      	orrs	r3, r7
 8001264:	0852      	lsrs	r2, r2, #1
 8001266:	3a01      	subs	r2, #1
 8001268:	4082      	lsls	r2, r0
 800126a:	4313      	orrs	r3, r2
 800126c:	6ae2      	ldr	r2, [r4, #44]	; 0x2c
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 800126e:	4c13      	ldr	r4, [pc, #76]	; (80012bc <HAL_RCC_OscConfig+0x2c0>)
        WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource                                              | \
 8001270:	fa02 f101 	lsl.w	r1, r2, r1
 8001274:	430b      	orrs	r3, r1
 8001276:	606b      	str	r3, [r5, #4]
        __HAL_RCC_PLL_ENABLE();
 8001278:	2301      	movs	r3, #1
 800127a:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 800127c:	f7ff f960 	bl	8000540 <HAL_GetTick>
 8001280:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8001282:	6823      	ldr	r3, [r4, #0]
 8001284:	019a      	lsls	r2, r3, #6
 8001286:	f53f aef9 	bmi.w	800107c <HAL_RCC_OscConfig+0x80>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 800128a:	f7ff f959 	bl	8000540 <HAL_GetTick>
 800128e:	1b40      	subs	r0, r0, r5
 8001290:	2864      	cmp	r0, #100	; 0x64
 8001292:	d9f6      	bls.n	8001282 <HAL_RCC_OscConfig+0x286>
 8001294:	e71b      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8001296:	f7ff f953 	bl	8000540 <HAL_GetTick>
 800129a:	1bc0      	subs	r0, r0, r7
 800129c:	2864      	cmp	r0, #100	; 0x64
 800129e:	d9c4      	bls.n	800122a <HAL_RCC_OscConfig+0x22e>
 80012a0:	e715      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
        tickstart = HAL_GetTick();
 80012a2:	f7ff f94d 	bl	8000540 <HAL_GetTick>
 80012a6:	4604      	mov	r4, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 80012a8:	682b      	ldr	r3, [r5, #0]
 80012aa:	019b      	lsls	r3, r3, #6
 80012ac:	f57f aee6 	bpl.w	800107c <HAL_RCC_OscConfig+0x80>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80012b0:	f7ff f946 	bl	8000540 <HAL_GetTick>
 80012b4:	1b00      	subs	r0, r0, r4
 80012b6:	2864      	cmp	r0, #100	; 0x64
 80012b8:	d9f6      	bls.n	80012a8 <HAL_RCC_OscConfig+0x2ac>
 80012ba:	e708      	b.n	80010ce <HAL_RCC_OscConfig+0xd2>
 80012bc:	40023800 	.word	0x40023800
 80012c0:	40007000 	.word	0x40007000
 80012c4:	40023870 	.word	0x40023870
 80012c8:	40023802 	.word	0x40023802
 80012cc:	42470000 	.word	0x42470000
 80012d0:	42470e80 	.word	0x42470e80
 80012d4:	42470060 	.word	0x42470060

080012d8 <HAL_RCC_GetSysClockFreq>:
{
  uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
  uint32_t sysclockfreq = 0U;

  /* Get SYSCLK source -------------------------------------------------------*/
  switch (RCC->CFGR & RCC_CFGR_SWS)
 80012d8:	4913      	ldr	r1, [pc, #76]	; (8001328 <HAL_RCC_GetSysClockFreq+0x50>)
{
 80012da:	b508      	push	{r3, lr}
  switch (RCC->CFGR & RCC_CFGR_SWS)
 80012dc:	688b      	ldr	r3, [r1, #8]
 80012de:	f003 030c 	and.w	r3, r3, #12
 80012e2:	2b04      	cmp	r3, #4
 80012e4:	d003      	beq.n	80012ee <HAL_RCC_GetSysClockFreq+0x16>
 80012e6:	2b08      	cmp	r3, #8
 80012e8:	d003      	beq.n	80012f2 <HAL_RCC_GetSysClockFreq+0x1a>
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */
    {
      sysclockfreq = HSI_VALUE;
 80012ea:	4810      	ldr	r0, [pc, #64]	; (800132c <HAL_RCC_GetSysClockFreq+0x54>)
      sysclockfreq = HSI_VALUE;
      break;
    }
  }
  return sysclockfreq;
}
 80012ec:	bd08      	pop	{r3, pc}
      sysclockfreq = HSE_VALUE;
 80012ee:	4810      	ldr	r0, [pc, #64]	; (8001330 <HAL_RCC_GetSysClockFreq+0x58>)
 80012f0:	bd08      	pop	{r3, pc}
      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
 80012f2:	684a      	ldr	r2, [r1, #4]
      if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
 80012f4:	684b      	ldr	r3, [r1, #4]
        pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
 80012f6:	6849      	ldr	r1, [r1, #4]
      if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
 80012f8:	f413 0380 	ands.w	r3, r3, #4194304	; 0x400000
        pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
 80012fc:	bf14      	ite	ne
 80012fe:	480c      	ldrne	r0, [pc, #48]	; (8001330 <HAL_RCC_GetSysClockFreq+0x58>)
        pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
 8001300:	480a      	ldreq	r0, [pc, #40]	; (800132c <HAL_RCC_GetSysClockFreq+0x54>)
        pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
 8001302:	f3c1 1188 	ubfx	r1, r1, #6, #9
 8001306:	bf18      	it	ne
 8001308:	2300      	movne	r3, #0
      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
 800130a:	f002 023f 	and.w	r2, r2, #63	; 0x3f
        pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
 800130e:	fba1 0100 	umull	r0, r1, r1, r0
 8001312:	f7fe ff57 	bl	80001c4 <__aeabi_uldivmod>
      pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
 8001316:	4b04      	ldr	r3, [pc, #16]	; (8001328 <HAL_RCC_GetSysClockFreq+0x50>)
 8001318:	685b      	ldr	r3, [r3, #4]
 800131a:	f3c3 4301 	ubfx	r3, r3, #16, #2
 800131e:	3301      	adds	r3, #1
 8001320:	005b      	lsls	r3, r3, #1
      sysclockfreq = pllvco/pllp;
 8001322:	fbb0 f0f3 	udiv	r0, r0, r3
 8001326:	bd08      	pop	{r3, pc}
 8001328:	40023800 	.word	0x40023800
 800132c:	00f42400 	.word	0x00f42400
 8001330:	017d7840 	.word	0x017d7840

08001334 <HAL_RCC_ClockConfig>:
{
 8001334:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8001338:	460d      	mov	r5, r1
  if(RCC_ClkInitStruct == NULL)
 800133a:	4604      	mov	r4, r0
 800133c:	b910      	cbnz	r0, 8001344 <HAL_RCC_ClockConfig+0x10>
    return HAL_ERROR;
 800133e:	2001      	movs	r0, #1
 8001340:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
  if(FLatency > __HAL_FLASH_GET_LATENCY())
 8001344:	4b46      	ldr	r3, [pc, #280]	; (8001460 <HAL_RCC_ClockConfig+0x12c>)
 8001346:	681a      	ldr	r2, [r3, #0]
 8001348:	f002 020f 	and.w	r2, r2, #15
 800134c:	428a      	cmp	r2, r1
 800134e:	d32e      	bcc.n	80013ae <HAL_RCC_ClockConfig+0x7a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8001350:	6821      	ldr	r1, [r4, #0]
 8001352:	078f      	lsls	r7, r1, #30
 8001354:	d433      	bmi.n	80013be <HAL_RCC_ClockConfig+0x8a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8001356:	07c8      	lsls	r0, r1, #31
 8001358:	d446      	bmi.n	80013e8 <HAL_RCC_ClockConfig+0xb4>
  if(FLatency < __HAL_FLASH_GET_LATENCY())
 800135a:	4b41      	ldr	r3, [pc, #260]	; (8001460 <HAL_RCC_ClockConfig+0x12c>)
 800135c:	681a      	ldr	r2, [r3, #0]
 800135e:	f002 020f 	and.w	r2, r2, #15
 8001362:	4295      	cmp	r5, r2
 8001364:	d36a      	bcc.n	800143c <HAL_RCC_ClockConfig+0x108>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8001366:	6822      	ldr	r2, [r4, #0]
 8001368:	0751      	lsls	r1, r2, #29
 800136a:	d470      	bmi.n	800144e <HAL_RCC_ClockConfig+0x11a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800136c:	0713      	lsls	r3, r2, #28
 800136e:	d507      	bpl.n	8001380 <HAL_RCC_ClockConfig+0x4c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
 8001370:	4a3c      	ldr	r2, [pc, #240]	; (8001464 <HAL_RCC_ClockConfig+0x130>)
 8001372:	6921      	ldr	r1, [r4, #16]
 8001374:	6893      	ldr	r3, [r2, #8]
 8001376:	f423 4360 	bic.w	r3, r3, #57344	; 0xe000
 800137a:	ea43 03c1 	orr.w	r3, r3, r1, lsl #3
 800137e:	6093      	str	r3, [r2, #8]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> POSITION_VAL(RCC_CFGR_HPRE)];
 8001380:	f7ff ffaa 	bl	80012d8 <HAL_RCC_GetSysClockFreq>
 8001384:	4b37      	ldr	r3, [pc, #220]	; (8001464 <HAL_RCC_ClockConfig+0x130>)
 8001386:	22f0      	movs	r2, #240	; 0xf0
 8001388:	689b      	ldr	r3, [r3, #8]
 800138a:	fa92 f2a2 	rbit	r2, r2
 800138e:	fab2 f282 	clz	r2, r2
 8001392:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
 8001396:	40d3      	lsrs	r3, r2
 8001398:	4a33      	ldr	r2, [pc, #204]	; (8001468 <HAL_RCC_ClockConfig+0x134>)
 800139a:	5cd3      	ldrb	r3, [r2, r3]
 800139c:	40d8      	lsrs	r0, r3
 800139e:	4b33      	ldr	r3, [pc, #204]	; (800146c <HAL_RCC_ClockConfig+0x138>)
 80013a0:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 80013a2:	2000      	movs	r0, #0
 80013a4:	f7ff f896 	bl	80004d4 <HAL_InitTick>
  return HAL_OK;
 80013a8:	2000      	movs	r0, #0
 80013aa:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 80013ae:	b2ca      	uxtb	r2, r1
 80013b0:	701a      	strb	r2, [r3, #0]
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
 80013b2:	681b      	ldr	r3, [r3, #0]
 80013b4:	f003 030f 	and.w	r3, r3, #15
 80013b8:	4299      	cmp	r1, r3
 80013ba:	d1c0      	bne.n	800133e <HAL_RCC_ClockConfig+0xa>
 80013bc:	e7c8      	b.n	8001350 <HAL_RCC_ClockConfig+0x1c>
 80013be:	4b29      	ldr	r3, [pc, #164]	; (8001464 <HAL_RCC_ClockConfig+0x130>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 80013c0:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 80013c4:	bf1e      	ittt	ne
 80013c6:	689a      	ldrne	r2, [r3, #8]
 80013c8:	f442 52e0 	orrne.w	r2, r2, #7168	; 0x1c00
 80013cc:	609a      	strne	r2, [r3, #8]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 80013ce:	070e      	lsls	r6, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3U));
 80013d0:	bf42      	ittt	mi
 80013d2:	689a      	ldrmi	r2, [r3, #8]
 80013d4:	f442 4260 	orrmi.w	r2, r2, #57344	; 0xe000
 80013d8:	609a      	strmi	r2, [r3, #8]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 80013da:	689a      	ldr	r2, [r3, #8]
 80013dc:	68a0      	ldr	r0, [r4, #8]
 80013de:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 80013e2:	4302      	orrs	r2, r0
 80013e4:	609a      	str	r2, [r3, #8]
 80013e6:	e7b6      	b.n	8001356 <HAL_RCC_ClockConfig+0x22>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 80013e8:	6861      	ldr	r1, [r4, #4]
 80013ea:	4b1e      	ldr	r3, [pc, #120]	; (8001464 <HAL_RCC_ClockConfig+0x130>)
 80013ec:	2901      	cmp	r1, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80013ee:	681a      	ldr	r2, [r3, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 80013f0:	d11c      	bne.n	800142c <HAL_RCC_ClockConfig+0xf8>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80013f2:	f412 3f00 	tst.w	r2, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80013f6:	d0a2      	beq.n	800133e <HAL_RCC_ClockConfig+0xa>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 80013f8:	689a      	ldr	r2, [r3, #8]
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 80013fa:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 80013fe:	f022 0203 	bic.w	r2, r2, #3
 8001402:	430a      	orrs	r2, r1
 8001404:	609a      	str	r2, [r3, #8]
    tickstart = HAL_GetTick();
 8001406:	f7ff f89b 	bl	8000540 <HAL_GetTick>
 800140a:	4607      	mov	r7, r0
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800140c:	4e15      	ldr	r6, [pc, #84]	; (8001464 <HAL_RCC_ClockConfig+0x130>)
 800140e:	68b3      	ldr	r3, [r6, #8]
 8001410:	6862      	ldr	r2, [r4, #4]
 8001412:	f003 030c 	and.w	r3, r3, #12
 8001416:	ebb3 0f82 	cmp.w	r3, r2, lsl #2
 800141a:	d09e      	beq.n	800135a <HAL_RCC_ClockConfig+0x26>
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 800141c:	f7ff f890 	bl	8000540 <HAL_GetTick>
 8001420:	1bc0      	subs	r0, r0, r7
 8001422:	4540      	cmp	r0, r8
 8001424:	d9f3      	bls.n	800140e <HAL_RCC_ClockConfig+0xda>
        return HAL_TIMEOUT;
 8001426:	2003      	movs	r0, #3
}
 8001428:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800142c:	2902      	cmp	r1, #2
 800142e:	d102      	bne.n	8001436 <HAL_RCC_ClockConfig+0x102>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8001430:	f012 7f00 	tst.w	r2, #33554432	; 0x2000000
 8001434:	e7df      	b.n	80013f6 <HAL_RCC_ClockConfig+0xc2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8001436:	f012 0f02 	tst.w	r2, #2
 800143a:	e7dc      	b.n	80013f6 <HAL_RCC_ClockConfig+0xc2>
    __HAL_FLASH_SET_LATENCY(FLatency);
 800143c:	b2ea      	uxtb	r2, r5
 800143e:	701a      	strb	r2, [r3, #0]
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
 8001440:	681b      	ldr	r3, [r3, #0]
 8001442:	f003 030f 	and.w	r3, r3, #15
 8001446:	429d      	cmp	r5, r3
 8001448:	f47f af79 	bne.w	800133e <HAL_RCC_ClockConfig+0xa>
 800144c:	e78b      	b.n	8001366 <HAL_RCC_ClockConfig+0x32>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 800144e:	4905      	ldr	r1, [pc, #20]	; (8001464 <HAL_RCC_ClockConfig+0x130>)
 8001450:	68e0      	ldr	r0, [r4, #12]
 8001452:	688b      	ldr	r3, [r1, #8]
 8001454:	f423 53e0 	bic.w	r3, r3, #7168	; 0x1c00
 8001458:	4303      	orrs	r3, r0
 800145a:	608b      	str	r3, [r1, #8]
 800145c:	e786      	b.n	800136c <HAL_RCC_ClockConfig+0x38>
 800145e:	bf00      	nop
 8001460:	40023c00 	.word	0x40023c00
 8001464:	40023800 	.word	0x40023800
 8001468:	08006298 	.word	0x08006298
 800146c:	20000000 	.word	0x20000000

08001470 <HAL_RCC_GetPCLK1Freq>:
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> POSITION_VAL(RCC_CFGR_PPRE1)]);
 8001470:	4b08      	ldr	r3, [pc, #32]	; (8001494 <HAL_RCC_GetPCLK1Freq+0x24>)
 8001472:	f44f 52e0 	mov.w	r2, #7168	; 0x1c00
 8001476:	689b      	ldr	r3, [r3, #8]
 8001478:	fa92 f2a2 	rbit	r2, r2
 800147c:	fab2 f282 	clz	r2, r2
 8001480:	f403 53e0 	and.w	r3, r3, #7168	; 0x1c00
 8001484:	40d3      	lsrs	r3, r2
 8001486:	4a04      	ldr	r2, [pc, #16]	; (8001498 <HAL_RCC_GetPCLK1Freq+0x28>)
 8001488:	5cd3      	ldrb	r3, [r2, r3]
 800148a:	4a04      	ldr	r2, [pc, #16]	; (800149c <HAL_RCC_GetPCLK1Freq+0x2c>)
 800148c:	6810      	ldr	r0, [r2, #0]
}
 800148e:	40d8      	lsrs	r0, r3
 8001490:	4770      	bx	lr
 8001492:	bf00      	nop
 8001494:	40023800 	.word	0x40023800
 8001498:	080062a8 	.word	0x080062a8
 800149c:	20000000 	.word	0x20000000

080014a0 <HAL_RCC_GetPCLK2Freq>:
  * @retval PCLK2 frequency
  */
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
  /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]);
 80014a0:	4b08      	ldr	r3, [pc, #32]	; (80014c4 <HAL_RCC_GetPCLK2Freq+0x24>)
 80014a2:	f44f 4260 	mov.w	r2, #57344	; 0xe000
 80014a6:	689b      	ldr	r3, [r3, #8]
 80014a8:	fa92 f2a2 	rbit	r2, r2
 80014ac:	fab2 f282 	clz	r2, r2
 80014b0:	f403 4360 	and.w	r3, r3, #57344	; 0xe000
 80014b4:	40d3      	lsrs	r3, r2
 80014b6:	4a04      	ldr	r2, [pc, #16]	; (80014c8 <HAL_RCC_GetPCLK2Freq+0x28>)
 80014b8:	5cd3      	ldrb	r3, [r2, r3]
 80014ba:	4a04      	ldr	r2, [pc, #16]	; (80014cc <HAL_RCC_GetPCLK2Freq+0x2c>)
 80014bc:	6810      	ldr	r0, [r2, #0]
}
 80014be:	40d8      	lsrs	r0, r3
 80014c0:	4770      	bx	lr
 80014c2:	bf00      	nop
 80014c4:	40023800 	.word	0x40023800
 80014c8:	080062a8 	.word	0x080062a8
 80014cc:	20000000 	.word	0x20000000

080014d0 <HAL_TIM_Base_Start_IT>:
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));
  
  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 80014d0:	6803      	ldr	r3, [r0, #0]
  /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);
      
  /* Return function status */
  return HAL_OK;
}
 80014d2:	2000      	movs	r0, #0
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 80014d4:	68da      	ldr	r2, [r3, #12]
 80014d6:	f042 0201 	orr.w	r2, r2, #1
 80014da:	60da      	str	r2, [r3, #12]
  __HAL_TIM_ENABLE(htim);
 80014dc:	681a      	ldr	r2, [r3, #0]
 80014de:	f042 0201 	orr.w	r2, r2, #1
 80014e2:	601a      	str	r2, [r3, #0]
}
 80014e4:	4770      	bx	lr

080014e6 <HAL_TIM_OC_DelayElapsedCallback>:
 80014e6:	4770      	bx	lr

080014e8 <HAL_TIM_IC_CaptureCallback>:
 80014e8:	4770      	bx	lr

080014ea <HAL_TIM_PWM_PulseFinishedCallback>:
 80014ea:	4770      	bx	lr

080014ec <HAL_TIM_TriggerCallback>:
 80014ec:	4770      	bx	lr

080014ee <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 80014ee:	6803      	ldr	r3, [r0, #0]
{
 80014f0:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 80014f2:	691a      	ldr	r2, [r3, #16]
{
 80014f4:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 80014f6:	0791      	lsls	r1, r2, #30
 80014f8:	d50e      	bpl.n	8001518 <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 80014fa:	68da      	ldr	r2, [r3, #12]
 80014fc:	0792      	lsls	r2, r2, #30
 80014fe:	d50b      	bpl.n	8001518 <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8001500:	f06f 0202 	mvn.w	r2, #2
 8001504:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8001506:	2201      	movs	r2, #1
        
        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8001508:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800150a:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 800150c:	079b      	lsls	r3, r3, #30
 800150e:	d077      	beq.n	8001600 <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 8001510:	f7ff ffea 	bl	80014e8 <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8001514:	2300      	movs	r3, #0
 8001516:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8001518:	6823      	ldr	r3, [r4, #0]
 800151a:	691a      	ldr	r2, [r3, #16]
 800151c:	0750      	lsls	r0, r2, #29
 800151e:	d510      	bpl.n	8001542 <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 8001520:	68da      	ldr	r2, [r3, #12]
 8001522:	0751      	lsls	r1, r2, #29
 8001524:	d50d      	bpl.n	8001542 <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8001526:	f06f 0204 	mvn.w	r2, #4
 800152a:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800152c:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800152e:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8001530:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8001532:	f413 7f40 	tst.w	r3, #768	; 0x300
      {          
        HAL_TIM_IC_CaptureCallback(htim);
 8001536:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8001538:	d068      	beq.n	800160c <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 800153a:	f7ff ffd5 	bl	80014e8 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800153e:	2300      	movs	r3, #0
 8001540:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8001542:	6823      	ldr	r3, [r4, #0]
 8001544:	691a      	ldr	r2, [r3, #16]
 8001546:	0712      	lsls	r2, r2, #28
 8001548:	d50f      	bpl.n	800156a <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 800154a:	68da      	ldr	r2, [r3, #12]
 800154c:	0710      	lsls	r0, r2, #28
 800154e:	d50c      	bpl.n	800156a <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8001550:	f06f 0208 	mvn.w	r2, #8
 8001554:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8001556:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8001558:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 800155a:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800155c:	0799      	lsls	r1, r3, #30
      {          
        HAL_TIM_IC_CaptureCallback(htim);
 800155e:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8001560:	d05a      	beq.n	8001618 <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8001562:	f7ff ffc1 	bl	80014e8 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim); 
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8001566:	2300      	movs	r3, #0
 8001568:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 800156a:	6823      	ldr	r3, [r4, #0]
 800156c:	691a      	ldr	r2, [r3, #16]
 800156e:	06d2      	lsls	r2, r2, #27
 8001570:	d510      	bpl.n	8001594 <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8001572:	68da      	ldr	r2, [r3, #12]
 8001574:	06d0      	lsls	r0, r2, #27
 8001576:	d50d      	bpl.n	8001594 <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8001578:	f06f 0210 	mvn.w	r2, #16
 800157c:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800157e:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8001580:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8001582:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8001584:	f413 7f40 	tst.w	r3, #768	; 0x300
      {          
        HAL_TIM_IC_CaptureCallback(htim);
 8001588:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800158a:	d04b      	beq.n	8001624 <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 800158c:	f7ff ffac 	bl	80014e8 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8001590:	2300      	movs	r3, #0
 8001592:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8001594:	6823      	ldr	r3, [r4, #0]
 8001596:	691a      	ldr	r2, [r3, #16]
 8001598:	07d1      	lsls	r1, r2, #31
 800159a:	d508      	bpl.n	80015ae <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 800159c:	68da      	ldr	r2, [r3, #12]
 800159e:	07d2      	lsls	r2, r2, #31
 80015a0:	d505      	bpl.n	80015ae <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 80015a2:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 80015a6:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 80015a8:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 80015aa:	f003 f9ed 	bl	8004988 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 80015ae:	6823      	ldr	r3, [r4, #0]
 80015b0:	691a      	ldr	r2, [r3, #16]
 80015b2:	0610      	lsls	r0, r2, #24
 80015b4:	d508      	bpl.n	80015c8 <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 80015b6:	68da      	ldr	r2, [r3, #12]
 80015b8:	0611      	lsls	r1, r2, #24
 80015ba:	d505      	bpl.n	80015c8 <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 80015bc:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 80015c0:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 80015c2:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 80015c4:	f000 f8db 	bl	800177e <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 80015c8:	6823      	ldr	r3, [r4, #0]
 80015ca:	691a      	ldr	r2, [r3, #16]
 80015cc:	0652      	lsls	r2, r2, #25
 80015ce:	d508      	bpl.n	80015e2 <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 80015d0:	68da      	ldr	r2, [r3, #12]
 80015d2:	0650      	lsls	r0, r2, #25
 80015d4:	d505      	bpl.n	80015e2 <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 80015d6:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 80015da:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 80015dc:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 80015de:	f7ff ff85 	bl	80014ec <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 80015e2:	6823      	ldr	r3, [r4, #0]
 80015e4:	691a      	ldr	r2, [r3, #16]
 80015e6:	0691      	lsls	r1, r2, #26
 80015e8:	d522      	bpl.n	8001630 <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 80015ea:	68da      	ldr	r2, [r3, #12]
 80015ec:	0692      	lsls	r2, r2, #26
 80015ee:	d51f      	bpl.n	8001630 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 80015f0:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 80015f4:	4620      	mov	r0, r4
    }
  }
}
 80015f6:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 80015fa:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 80015fc:	f000 b8be 	b.w	800177c <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8001600:	f7ff ff71 	bl	80014e6 <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8001604:	4620      	mov	r0, r4
 8001606:	f7ff ff70 	bl	80014ea <HAL_TIM_PWM_PulseFinishedCallback>
 800160a:	e783      	b.n	8001514 <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800160c:	f7ff ff6b 	bl	80014e6 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8001610:	4620      	mov	r0, r4
 8001612:	f7ff ff6a 	bl	80014ea <HAL_TIM_PWM_PulseFinishedCallback>
 8001616:	e792      	b.n	800153e <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8001618:	f7ff ff65 	bl	80014e6 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim); 
 800161c:	4620      	mov	r0, r4
 800161e:	f7ff ff64 	bl	80014ea <HAL_TIM_PWM_PulseFinishedCallback>
 8001622:	e7a0      	b.n	8001566 <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8001624:	f7ff ff5f 	bl	80014e6 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8001628:	4620      	mov	r0, r4
 800162a:	f7ff ff5e 	bl	80014ea <HAL_TIM_PWM_PulseFinishedCallback>
 800162e:	e7af      	b.n	8001590 <HAL_TIM_IRQHandler+0xa2>
 8001630:	bd10      	pop	{r4, pc}
	...

08001634 <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;
  
  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if(IS_TIM_CC3_INSTANCE(TIMx) != RESET)   
 8001634:	4a30      	ldr	r2, [pc, #192]	; (80016f8 <TIM_Base_SetConfig+0xc4>)
  tmpcr1 = TIMx->CR1;
 8001636:	6803      	ldr	r3, [r0, #0]
  if(IS_TIM_CC3_INSTANCE(TIMx) != RESET)   
 8001638:	4290      	cmp	r0, r2
 800163a:	d012      	beq.n	8001662 <TIM_Base_SetConfig+0x2e>
 800163c:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8001640:	d00f      	beq.n	8001662 <TIM_Base_SetConfig+0x2e>
 8001642:	f5a2 427c 	sub.w	r2, r2, #64512	; 0xfc00
 8001646:	4290      	cmp	r0, r2
 8001648:	d00b      	beq.n	8001662 <TIM_Base_SetConfig+0x2e>
 800164a:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 800164e:	4290      	cmp	r0, r2
 8001650:	d007      	beq.n	8001662 <TIM_Base_SetConfig+0x2e>
 8001652:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8001656:	4290      	cmp	r0, r2
 8001658:	d003      	beq.n	8001662 <TIM_Base_SetConfig+0x2e>
 800165a:	f502 4278 	add.w	r2, r2, #63488	; 0xf800
 800165e:	4290      	cmp	r0, r2
 8001660:	d11d      	bne.n	800169e <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8001662:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8001664:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8001668:	4313      	orrs	r3, r2
  }
 
  if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)  
 800166a:	4a23      	ldr	r2, [pc, #140]	; (80016f8 <TIM_Base_SetConfig+0xc4>)
 800166c:	4290      	cmp	r0, r2
 800166e:	d104      	bne.n	800167a <TIM_Base_SetConfig+0x46>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8001670:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8001672:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8001676:	4313      	orrs	r3, r2
 8001678:	e028      	b.n	80016cc <TIM_Base_SetConfig+0x98>
  if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)  
 800167a:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 800167e:	d0f7      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 8001680:	4a1e      	ldr	r2, [pc, #120]	; (80016fc <TIM_Base_SetConfig+0xc8>)
 8001682:	4290      	cmp	r0, r2
 8001684:	d0f4      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 8001686:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 800168a:	4290      	cmp	r0, r2
 800168c:	d0f0      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 800168e:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8001692:	4290      	cmp	r0, r2
 8001694:	d0ec      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 8001696:	f502 4278 	add.w	r2, r2, #63488	; 0xf800
 800169a:	4290      	cmp	r0, r2
 800169c:	d0e8      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 800169e:	4a18      	ldr	r2, [pc, #96]	; (8001700 <TIM_Base_SetConfig+0xcc>)
 80016a0:	4290      	cmp	r0, r2
 80016a2:	d0e5      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 80016a4:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80016a8:	4290      	cmp	r0, r2
 80016aa:	d0e1      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 80016ac:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80016b0:	4290      	cmp	r0, r2
 80016b2:	d0dd      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 80016b4:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 80016b8:	4290      	cmp	r0, r2
 80016ba:	d0d9      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 80016bc:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80016c0:	4290      	cmp	r0, r2
 80016c2:	d0d5      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
 80016c4:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80016c8:	4290      	cmp	r0, r2
 80016ca:	d0d1      	beq.n	8001670 <TIM_Base_SetConfig+0x3c>
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 80016cc:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 80016ce:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 80016d2:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 80016d4:	6003      	str	r3, [r0, #0]

  /* Set the Auto-reload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 80016d6:	688b      	ldr	r3, [r1, #8]
 80016d8:	62c3      	str	r3, [r0, #44]	; 0x2c
 
  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 80016da:	680b      	ldr	r3, [r1, #0]
 80016dc:	6283      	str	r3, [r0, #40]	; 0x28
    
  if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)  
 80016de:	4b06      	ldr	r3, [pc, #24]	; (80016f8 <TIM_Base_SetConfig+0xc4>)
 80016e0:	4298      	cmp	r0, r3
 80016e2:	d006      	beq.n	80016f2 <TIM_Base_SetConfig+0xbe>
 80016e4:	f503 6380 	add.w	r3, r3, #1024	; 0x400
 80016e8:	4298      	cmp	r0, r3
 80016ea:	d002      	beq.n	80016f2 <TIM_Base_SetConfig+0xbe>
    TIMx->RCR = Structure->RepetitionCounter;
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 80016ec:	2301      	movs	r3, #1
 80016ee:	6143      	str	r3, [r0, #20]
}
 80016f0:	4770      	bx	lr
    TIMx->RCR = Structure->RepetitionCounter;
 80016f2:	690b      	ldr	r3, [r1, #16]
 80016f4:	6303      	str	r3, [r0, #48]	; 0x30
 80016f6:	e7f9      	b.n	80016ec <TIM_Base_SetConfig+0xb8>
 80016f8:	40010000 	.word	0x40010000
 80016fc:	40000400 	.word	0x40000400
 8001700:	40014000 	.word	0x40014000

08001704 <HAL_TIM_Base_Init>:
{ 
 8001704:	b510      	push	{r4, lr}
  if(htim == NULL)
 8001706:	4604      	mov	r4, r0
 8001708:	b1a0      	cbz	r0, 8001734 <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 800170a:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 800170e:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8001712:	b91b      	cbnz	r3, 800171c <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 8001714:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8001718:	f003 fbe2 	bl	8004ee0 <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 800171c:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init); 
 800171e:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8001720:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init); 
 8001724:	1d21      	adds	r1, r4, #4
 8001726:	f7ff ff85 	bl	8001634 <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 800172a:	2301      	movs	r3, #1
  return HAL_OK;
 800172c:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 800172e:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 8001732:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8001734:	2001      	movs	r0, #1
}
 8001736:	bd10      	pop	{r4, pc}

08001738 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  
  __HAL_LOCK(htim);
 8001738:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 800173c:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 800173e:	2b01      	cmp	r3, #1
 8001740:	f04f 0302 	mov.w	r3, #2
 8001744:	d018      	beq.n	8001778 <HAL_TIMEx_MasterConfigSynchronization+0x40>
  
  htim->State = HAL_TIM_STATE_BUSY;
 8001746:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 800174a:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
 800174c:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 800174e:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8001750:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8001752:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 8001756:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
 8001758:	685a      	ldr	r2, [r3, #4]
 800175a:	4322      	orrs	r2, r4
 800175c:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 800175e:	689a      	ldr	r2, [r3, #8]
 8001760:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8001764:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8001766:	689a      	ldr	r2, [r3, #8]
 8001768:	430a      	orrs	r2, r1
 800176a:	609a      	str	r2, [r3, #8]
  
  htim->State = HAL_TIM_STATE_READY;
 800176c:	2301      	movs	r3, #1
 800176e:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d
  
  __HAL_UNLOCK(htim);
 8001772:	2300      	movs	r3, #0
 8001774:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8001778:	4618      	mov	r0, r3
  
  return HAL_OK;
} 
 800177a:	bd10      	pop	{r4, pc}

0800177c <HAL_TIMEx_CommutationCallback>:
 800177c:	4770      	bx	lr

0800177e <HAL_TIMEx_BreakCallback>:
  * @param  htim pointer to a TIM_HandleTypeDef structure that contains
  *                the configuration information for TIM module.
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800177e:	4770      	bx	lr

08001780 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8001780:	6803      	ldr	r3, [r0, #0]
 8001782:	68da      	ldr	r2, [r3, #12]
 8001784:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8001788:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800178a:	695a      	ldr	r2, [r3, #20]
 800178c:	f022 0201 	bic.w	r2, r2, #1
 8001790:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8001792:	2320      	movs	r3, #32
 8001794:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8001798:	4770      	bx	lr
	...

0800179c <UART_SetConfig>:
  * @param  huart pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 800179c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80017a0:	4604      	mov	r4, r0
  assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
  assert_param(IS_UART_PARITY(huart->Init.Parity));
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*-------------------------- USART CR2 Configuration -----------------------*/
  tmpreg = huart->Instance->CR2;
 80017a2:	6806      	ldr	r6, [r0, #0]

  /* Clear STOP[13:12] bits */
  tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP);

  /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */
  tmpreg |= (uint32_t)huart->Init.StopBits;
 80017a4:	68c2      	ldr	r2, [r0, #12]
  tmpreg = huart->Instance->CR2;
 80017a6:	6933      	ldr	r3, [r6, #16]
  /* Configure the UART Word Length, Parity and mode: 
     Set the M bits according to huart->Init.WordLength value 
     Set PCE and PS bits according to huart->Init.Parity value
     Set TE and RE bits according to huart->Init.Mode value
     Set OVER8 bit according to huart->Init.OverSampling value */
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 80017a8:	69c1      	ldr	r1, [r0, #28]
  tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP);
 80017aa:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
  tmpreg |= (uint32_t)huart->Init.StopBits;
 80017ae:	4313      	orrs	r3, r2
  WRITE_REG(huart->Instance->CR2, (uint32_t)tmpreg);
 80017b0:	6133      	str	r3, [r6, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 80017b2:	6883      	ldr	r3, [r0, #8]
 80017b4:	6900      	ldr	r0, [r0, #16]
  tmpreg = huart->Instance->CR1;
 80017b6:	68f2      	ldr	r2, [r6, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 80017b8:	4303      	orrs	r3, r0
 80017ba:	6960      	ldr	r0, [r4, #20]
  tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | \
 80017bc:	f422 4216 	bic.w	r2, r2, #38400	; 0x9600
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 80017c0:	4303      	orrs	r3, r0
  tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | \
 80017c2:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 80017c6:	430b      	orrs	r3, r1
 80017c8:	4313      	orrs	r3, r2
  
  /* Write to USART CR1 */
  WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
 80017ca:	60f3      	str	r3, [r6, #12]
  
  /*-------------------------- USART CR3 Configuration -----------------------*/  
  tmpreg = huart->Instance->CR3;
 80017cc:	6973      	ldr	r3, [r6, #20]
  
  /* Clear CTSE and RTSE bits */
  tmpreg &= (uint32_t)~((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
  
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  tmpreg |= huart->Init.HwFlowCtl;
 80017ce:	69a2      	ldr	r2, [r4, #24]
  tmpreg &= (uint32_t)~((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
 80017d0:	f423 7340 	bic.w	r3, r3, #768	; 0x300
  tmpreg |= huart->Init.HwFlowCtl;
 80017d4:	4313      	orrs	r3, r2
  
  /* Write to USART CR3 */
  WRITE_REG(huart->Instance->CR3, (uint32_t)tmpreg);
  
  /* Check the Over Sampling */
  if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
 80017d6:	f5b1 4f00 	cmp.w	r1, #32768	; 0x8000
  WRITE_REG(huart->Instance->CR3, (uint32_t)tmpreg);
 80017da:	6173      	str	r3, [r6, #20]
 80017dc:	4b7a      	ldr	r3, [pc, #488]	; (80019c8 <UART_SetConfig+0x22c>)
  if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
 80017de:	d17c      	bne.n	80018da <UART_SetConfig+0x13e>
  {
    /*-------------------------- USART BRR Configuration ---------------------*/
    if((huart->Instance == USART1) || (huart->Instance == USART6))
 80017e0:	429e      	cmp	r6, r3
 80017e2:	d003      	beq.n	80017ec <UART_SetConfig+0x50>
 80017e4:	f503 6380 	add.w	r3, r3, #1024	; 0x400
 80017e8:	429e      	cmp	r6, r3
 80017ea:	d144      	bne.n	8001876 <UART_SetConfig+0xda>
    {
      huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 80017ec:	f7ff fe58 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 80017f0:	2519      	movs	r5, #25
 80017f2:	fb05 f300 	mul.w	r3, r5, r0
 80017f6:	6860      	ldr	r0, [r4, #4]
 80017f8:	f04f 0964 	mov.w	r9, #100	; 0x64
 80017fc:	0040      	lsls	r0, r0, #1
 80017fe:	fbb3 f3f0 	udiv	r3, r3, r0
 8001802:	fbb3 f3f9 	udiv	r3, r3, r9
 8001806:	ea4f 1803 	mov.w	r8, r3, lsl #4
 800180a:	f7ff fe49 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 800180e:	4368      	muls	r0, r5
 8001810:	6863      	ldr	r3, [r4, #4]
 8001812:	005b      	lsls	r3, r3, #1
 8001814:	fbb0 f7f3 	udiv	r7, r0, r3
 8001818:	f7ff fe42 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 800181c:	4368      	muls	r0, r5
 800181e:	6863      	ldr	r3, [r4, #4]
 8001820:	005b      	lsls	r3, r3, #1
 8001822:	fbb0 f3f3 	udiv	r3, r0, r3
 8001826:	fbb3 f3f9 	udiv	r3, r3, r9
 800182a:	fb09 7313 	mls	r3, r9, r3, r7
 800182e:	00db      	lsls	r3, r3, #3
 8001830:	3332      	adds	r3, #50	; 0x32
 8001832:	fbb3 f3f9 	udiv	r3, r3, r9
 8001836:	005b      	lsls	r3, r3, #1
 8001838:	f403 77f8 	and.w	r7, r3, #496	; 0x1f0
 800183c:	f7ff fe30 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 8001840:	4368      	muls	r0, r5
 8001842:	6862      	ldr	r2, [r4, #4]
 8001844:	0052      	lsls	r2, r2, #1
 8001846:	fbb0 faf2 	udiv	sl, r0, r2
 800184a:	f7ff fe29 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
    }
    else
    {
      huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 800184e:	4368      	muls	r0, r5
 8001850:	6863      	ldr	r3, [r4, #4]
 8001852:	005b      	lsls	r3, r3, #1
 8001854:	fbb0 f3f3 	udiv	r3, r0, r3
 8001858:	fbb3 f3f9 	udiv	r3, r3, r9
 800185c:	fb09 a313 	mls	r3, r9, r3, sl
 8001860:	00db      	lsls	r3, r3, #3
 8001862:	3332      	adds	r3, #50	; 0x32
 8001864:	fbb3 f3f9 	udiv	r3, r3, r9
 8001868:	f003 0307 	and.w	r3, r3, #7
 800186c:	4443      	add	r3, r8
    {
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
    }
    else
    {
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 800186e:	443b      	add	r3, r7
 8001870:	60b3      	str	r3, [r6, #8]
 8001872:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
      huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 8001876:	f7ff fdfb 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 800187a:	2519      	movs	r5, #25
 800187c:	fb05 f300 	mul.w	r3, r5, r0
 8001880:	6860      	ldr	r0, [r4, #4]
 8001882:	f04f 0964 	mov.w	r9, #100	; 0x64
 8001886:	0040      	lsls	r0, r0, #1
 8001888:	fbb3 f3f0 	udiv	r3, r3, r0
 800188c:	fbb3 f3f9 	udiv	r3, r3, r9
 8001890:	ea4f 1803 	mov.w	r8, r3, lsl #4
 8001894:	f7ff fdec 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 8001898:	4368      	muls	r0, r5
 800189a:	6863      	ldr	r3, [r4, #4]
 800189c:	005b      	lsls	r3, r3, #1
 800189e:	fbb0 f7f3 	udiv	r7, r0, r3
 80018a2:	f7ff fde5 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 80018a6:	4368      	muls	r0, r5
 80018a8:	6863      	ldr	r3, [r4, #4]
 80018aa:	005b      	lsls	r3, r3, #1
 80018ac:	fbb0 f3f3 	udiv	r3, r0, r3
 80018b0:	fbb3 f3f9 	udiv	r3, r3, r9
 80018b4:	fb09 7313 	mls	r3, r9, r3, r7
 80018b8:	00db      	lsls	r3, r3, #3
 80018ba:	3332      	adds	r3, #50	; 0x32
 80018bc:	fbb3 f3f9 	udiv	r3, r3, r9
 80018c0:	005b      	lsls	r3, r3, #1
 80018c2:	f403 77f8 	and.w	r7, r3, #496	; 0x1f0
 80018c6:	f7ff fdd3 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 80018ca:	4368      	muls	r0, r5
 80018cc:	6862      	ldr	r2, [r4, #4]
 80018ce:	0052      	lsls	r2, r2, #1
 80018d0:	fbb0 faf2 	udiv	sl, r0, r2
 80018d4:	f7ff fdcc 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 80018d8:	e7b9      	b.n	800184e <UART_SetConfig+0xb2>
    if((huart->Instance == USART1) || (huart->Instance == USART6))
 80018da:	429e      	cmp	r6, r3
 80018dc:	d002      	beq.n	80018e4 <UART_SetConfig+0x148>
 80018de:	4b3b      	ldr	r3, [pc, #236]	; (80019cc <UART_SetConfig+0x230>)
 80018e0:	429e      	cmp	r6, r3
 80018e2:	d140      	bne.n	8001966 <UART_SetConfig+0x1ca>
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 80018e4:	f7ff fddc 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 80018e8:	2519      	movs	r5, #25
 80018ea:	fb05 f300 	mul.w	r3, r5, r0
 80018ee:	6867      	ldr	r7, [r4, #4]
 80018f0:	f04f 0964 	mov.w	r9, #100	; 0x64
 80018f4:	00bf      	lsls	r7, r7, #2
 80018f6:	fbb3 f3f7 	udiv	r3, r3, r7
 80018fa:	fbb3 f3f9 	udiv	r3, r3, r9
 80018fe:	011f      	lsls	r7, r3, #4
 8001900:	f7ff fdce 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 8001904:	4368      	muls	r0, r5
 8001906:	6863      	ldr	r3, [r4, #4]
 8001908:	009b      	lsls	r3, r3, #2
 800190a:	fbb0 f8f3 	udiv	r8, r0, r3
 800190e:	f7ff fdc7 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 8001912:	4368      	muls	r0, r5
 8001914:	6863      	ldr	r3, [r4, #4]
 8001916:	009b      	lsls	r3, r3, #2
 8001918:	fbb0 f3f3 	udiv	r3, r0, r3
 800191c:	fbb3 f3f9 	udiv	r3, r3, r9
 8001920:	fb09 8313 	mls	r3, r9, r3, r8
 8001924:	011b      	lsls	r3, r3, #4
 8001926:	3332      	adds	r3, #50	; 0x32
 8001928:	fbb3 f3f9 	udiv	r3, r3, r9
 800192c:	f003 08f0 	and.w	r8, r3, #240	; 0xf0
 8001930:	f7ff fdb6 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
 8001934:	4368      	muls	r0, r5
 8001936:	6862      	ldr	r2, [r4, #4]
 8001938:	0092      	lsls	r2, r2, #2
 800193a:	fbb0 faf2 	udiv	sl, r0, r2
 800193e:	f7ff fdaf 	bl	80014a0 <HAL_RCC_GetPCLK2Freq>
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 8001942:	4368      	muls	r0, r5
 8001944:	6863      	ldr	r3, [r4, #4]
 8001946:	009b      	lsls	r3, r3, #2
 8001948:	fbb0 f3f3 	udiv	r3, r0, r3
 800194c:	fbb3 f3f9 	udiv	r3, r3, r9
 8001950:	fb09 a313 	mls	r3, r9, r3, sl
 8001954:	011b      	lsls	r3, r3, #4
 8001956:	3332      	adds	r3, #50	; 0x32
 8001958:	fbb3 f3f9 	udiv	r3, r3, r9
 800195c:	f003 030f 	and.w	r3, r3, #15
 8001960:	ea43 0308 	orr.w	r3, r3, r8
 8001964:	e783      	b.n	800186e <UART_SetConfig+0xd2>
 8001966:	f7ff fd83 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 800196a:	2519      	movs	r5, #25
 800196c:	fb05 f300 	mul.w	r3, r5, r0
 8001970:	6867      	ldr	r7, [r4, #4]
 8001972:	f04f 0964 	mov.w	r9, #100	; 0x64
 8001976:	00bf      	lsls	r7, r7, #2
 8001978:	fbb3 f3f7 	udiv	r3, r3, r7
 800197c:	fbb3 f3f9 	udiv	r3, r3, r9
 8001980:	011f      	lsls	r7, r3, #4
 8001982:	f7ff fd75 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 8001986:	4368      	muls	r0, r5
 8001988:	6863      	ldr	r3, [r4, #4]
 800198a:	009b      	lsls	r3, r3, #2
 800198c:	fbb0 f8f3 	udiv	r8, r0, r3
 8001990:	f7ff fd6e 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 8001994:	4368      	muls	r0, r5
 8001996:	6863      	ldr	r3, [r4, #4]
 8001998:	009b      	lsls	r3, r3, #2
 800199a:	fbb0 f3f3 	udiv	r3, r0, r3
 800199e:	fbb3 f3f9 	udiv	r3, r3, r9
 80019a2:	fb09 8313 	mls	r3, r9, r3, r8
 80019a6:	011b      	lsls	r3, r3, #4
 80019a8:	3332      	adds	r3, #50	; 0x32
 80019aa:	fbb3 f3f9 	udiv	r3, r3, r9
 80019ae:	f003 08f0 	and.w	r8, r3, #240	; 0xf0
 80019b2:	f7ff fd5d 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 80019b6:	4368      	muls	r0, r5
 80019b8:	6862      	ldr	r2, [r4, #4]
 80019ba:	0092      	lsls	r2, r2, #2
 80019bc:	fbb0 faf2 	udiv	sl, r0, r2
 80019c0:	f7ff fd56 	bl	8001470 <HAL_RCC_GetPCLK1Freq>
 80019c4:	e7bd      	b.n	8001942 <UART_SetConfig+0x1a6>
 80019c6:	bf00      	nop
 80019c8:	40011000 	.word	0x40011000
 80019cc:	40011400 	.word	0x40011400

080019d0 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 80019d0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80019d2:	4604      	mov	r4, r0
 80019d4:	460e      	mov	r6, r1
 80019d6:	4617      	mov	r7, r2
 80019d8:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 80019da:	6821      	ldr	r1, [r4, #0]
 80019dc:	680b      	ldr	r3, [r1, #0]
 80019de:	ea36 0303 	bics.w	r3, r6, r3
 80019e2:	d101      	bne.n	80019e8 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 80019e4:	2000      	movs	r0, #0
}
 80019e6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 80019e8:	1c6b      	adds	r3, r5, #1
 80019ea:	d0f7      	beq.n	80019dc <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 80019ec:	b995      	cbnz	r5, 8001a14 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 80019ee:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 80019f0:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 80019f2:	68da      	ldr	r2, [r3, #12]
 80019f4:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 80019f8:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 80019fa:	695a      	ldr	r2, [r3, #20]
 80019fc:	f022 0201 	bic.w	r2, r2, #1
 8001a00:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 8001a02:	2320      	movs	r3, #32
 8001a04:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8001a08:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8001a0c:	2300      	movs	r3, #0
 8001a0e:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 8001a12:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8001a14:	f7fe fd94 	bl	8000540 <HAL_GetTick>
 8001a18:	1bc0      	subs	r0, r0, r7
 8001a1a:	4285      	cmp	r5, r0
 8001a1c:	d2dd      	bcs.n	80019da <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 8001a1e:	e7e6      	b.n	80019ee <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08001a20 <HAL_UART_Init>:
{
 8001a20:	b510      	push	{r4, lr}
  if(huart == NULL)
 8001a22:	4604      	mov	r4, r0
 8001a24:	b340      	cbz	r0, 8001a78 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 8001a26:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8001a2a:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8001a2e:	b91b      	cbnz	r3, 8001a38 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8001a30:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8001a34:	f003 fa6c 	bl	8004f10 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8001a38:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8001a3a:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8001a3c:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8001a40:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 8001a42:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8001a44:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8001a48:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8001a4a:	f7ff fea7 	bl	800179c <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8001a4e:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001a50:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8001a52:	691a      	ldr	r2, [r3, #16]
 8001a54:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8001a58:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 8001a5a:	695a      	ldr	r2, [r3, #20]
 8001a5c:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8001a60:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8001a62:	68da      	ldr	r2, [r3, #12]
 8001a64:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8001a68:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 8001a6a:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001a6c:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 8001a6e:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 8001a72:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 8001a76:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8001a78:	2001      	movs	r0, #1
}
 8001a7a:	bd10      	pop	{r4, pc}

08001a7c <HAL_UART_Transmit>:
{
 8001a7c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8001a80:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY) 
 8001a82:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 8001a86:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY) 
 8001a88:	2b20      	cmp	r3, #32
{
 8001a8a:	460d      	mov	r5, r1
 8001a8c:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY) 
 8001a8e:	d14e      	bne.n	8001b2e <HAL_UART_Transmit+0xb2>
    if((pData == NULL ) || (Size == 0)) 
 8001a90:	2900      	cmp	r1, #0
 8001a92:	d049      	beq.n	8001b28 <HAL_UART_Transmit+0xac>
 8001a94:	2a00      	cmp	r2, #0
 8001a96:	d047      	beq.n	8001b28 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 8001a98:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8001a9c:	2b01      	cmp	r3, #1
 8001a9e:	d046      	beq.n	8001b2e <HAL_UART_Transmit+0xb2>
 8001aa0:	2301      	movs	r3, #1
 8001aa2:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001aa6:	2300      	movs	r3, #0
 8001aa8:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8001aaa:	2321      	movs	r3, #33	; 0x21
 8001aac:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 8001ab0:	f7fe fd46 	bl	8000540 <HAL_GetTick>
 8001ab4:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 8001ab6:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 8001aba:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0)
 8001abe:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 8001ac0:	b29b      	uxth	r3, r3
 8001ac2:	b96b      	cbnz	r3, 8001ae0 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8001ac4:	463b      	mov	r3, r7
 8001ac6:	4632      	mov	r2, r6
 8001ac8:	2140      	movs	r1, #64	; 0x40
 8001aca:	4620      	mov	r0, r4
 8001acc:	f7ff ff80 	bl	80019d0 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001ad0:	b9a8      	cbnz	r0, 8001afe <HAL_UART_Transmit+0x82>
      huart->gState = HAL_UART_STATE_READY;
 8001ad2:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 8001ad4:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
      huart->gState = HAL_UART_STATE_READY;
 8001ad8:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 8001adc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 8001ae0:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001ae2:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8001ae4:	3b01      	subs	r3, #1
 8001ae6:	b29b      	uxth	r3, r3
 8001ae8:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001aea:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001aec:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001aee:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001af2:	4620      	mov	r0, r4
 8001af4:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001af6:	d10e      	bne.n	8001b16 <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001af8:	f7ff ff6a 	bl	80019d0 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001afc:	b110      	cbz	r0, 8001b04 <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 8001afe:	2003      	movs	r0, #3
 8001b00:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8001b04:	882b      	ldrh	r3, [r5, #0]
 8001b06:	6822      	ldr	r2, [r4, #0]
 8001b08:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8001b0c:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 8001b0e:	6923      	ldr	r3, [r4, #16]
 8001b10:	b943      	cbnz	r3, 8001b24 <HAL_UART_Transmit+0xa8>
          pData +=2;
 8001b12:	3502      	adds	r5, #2
 8001b14:	e7d3      	b.n	8001abe <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001b16:	f7ff ff5b 	bl	80019d0 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001b1a:	2800      	cmp	r0, #0
 8001b1c:	d1ef      	bne.n	8001afe <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 8001b1e:	6823      	ldr	r3, [r4, #0]
 8001b20:	782a      	ldrb	r2, [r5, #0]
 8001b22:	605a      	str	r2, [r3, #4]
 8001b24:	3501      	adds	r5, #1
 8001b26:	e7ca      	b.n	8001abe <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 8001b28:	2001      	movs	r0, #1
 8001b2a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 8001b2e:	2002      	movs	r0, #2
}
 8001b30:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

08001b34 <HAL_UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_READY)
 8001b34:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
 8001b38:	2b20      	cmp	r3, #32
 8001b3a:	d11c      	bne.n	8001b76 <HAL_UART_Receive_IT+0x42>
    if((pData == NULL ) || (Size == 0)) 
 8001b3c:	b1c9      	cbz	r1, 8001b72 <HAL_UART_Receive_IT+0x3e>
 8001b3e:	b1c2      	cbz	r2, 8001b72 <HAL_UART_Receive_IT+0x3e>
    __HAL_LOCK(huart);
 8001b40:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8001b44:	2b01      	cmp	r3, #1
 8001b46:	d016      	beq.n	8001b76 <HAL_UART_Receive_IT+0x42>
    huart->RxXferCount = Size;
 8001b48:	85c2      	strh	r2, [r0, #46]	; 0x2e
    huart->RxXferSize = Size;
 8001b4a:	8582      	strh	r2, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001b4c:	2300      	movs	r3, #0
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8001b4e:	2222      	movs	r2, #34	; 0x22
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001b50:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8001b52:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8001b56:	6802      	ldr	r2, [r0, #0]
    huart->pRxBuffPtr = pData;
 8001b58:	6281      	str	r1, [r0, #40]	; 0x28
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8001b5a:	6951      	ldr	r1, [r2, #20]
    __HAL_UNLOCK(huart);
 8001b5c:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8001b60:	f041 0101 	orr.w	r1, r1, #1
 8001b64:	6151      	str	r1, [r2, #20]
    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
 8001b66:	68d1      	ldr	r1, [r2, #12]
    return HAL_OK;
 8001b68:	4618      	mov	r0, r3
    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
 8001b6a:	f441 7190 	orr.w	r1, r1, #288	; 0x120
 8001b6e:	60d1      	str	r1, [r2, #12]
    return HAL_OK;
 8001b70:	4770      	bx	lr
      return HAL_ERROR;
 8001b72:	2001      	movs	r0, #1
 8001b74:	4770      	bx	lr
    return HAL_BUSY; 
 8001b76:	2002      	movs	r0, #2
}
 8001b78:	4770      	bx	lr

08001b7a <HAL_UART_TxCpltCallback>:
 8001b7a:	4770      	bx	lr

08001b7c <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8001b7c:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 8001b80:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8001b82:	2b22      	cmp	r3, #34	; 0x22
 8001b84:	d132      	bne.n	8001bec <UART_Receive_IT+0x70>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001b86:	6883      	ldr	r3, [r0, #8]
 8001b88:	6901      	ldr	r1, [r0, #16]
 8001b8a:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 8001b8e:	6802      	ldr	r2, [r0, #0]
 8001b90:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8001b92:	d11f      	bne.n	8001bd4 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8001b94:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001b96:	b9c9      	cbnz	r1, 8001bcc <UART_Receive_IT+0x50>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8001b98:	f3c2 0208 	ubfx	r2, r2, #0, #9
 8001b9c:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1;
 8001ba0:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0)
 8001ba2:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 8001ba4:	3c01      	subs	r4, #1
 8001ba6:	b2a4      	uxth	r4, r4
 8001ba8:	85c4      	strh	r4, [r0, #46]	; 0x2e
 8001baa:	b96c      	cbnz	r4, 8001bc8 <UART_Receive_IT+0x4c>
      CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8001bac:	6803      	ldr	r3, [r0, #0]
 8001bae:	68da      	ldr	r2, [r3, #12]
 8001bb0:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8001bb4:	60da      	str	r2, [r3, #12]
      CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8001bb6:	695a      	ldr	r2, [r3, #20]
 8001bb8:	f022 0201 	bic.w	r2, r2, #1
 8001bbc:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 8001bbe:	2320      	movs	r3, #32
 8001bc0:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 8001bc4:	f002 ff06 	bl	80049d4 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0)
 8001bc8:	2000      	movs	r0, #0
}
 8001bca:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8001bcc:	b2d2      	uxtb	r2, r2
 8001bce:	f823 2b01 	strh.w	r2, [r3], #1
 8001bd2:	e7e5      	b.n	8001ba0 <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001bd4:	b921      	cbnz	r1, 8001be0 <UART_Receive_IT+0x64>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 8001bd6:	1c59      	adds	r1, r3, #1
 8001bd8:	6852      	ldr	r2, [r2, #4]
 8001bda:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8001bdc:	701a      	strb	r2, [r3, #0]
 8001bde:	e7e0      	b.n	8001ba2 <UART_Receive_IT+0x26>
 8001be0:	6852      	ldr	r2, [r2, #4]
 8001be2:	1c59      	adds	r1, r3, #1
 8001be4:	6281      	str	r1, [r0, #40]	; 0x28
 8001be6:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8001bea:	e7f7      	b.n	8001bdc <UART_Receive_IT+0x60>
    return HAL_BUSY; 
 8001bec:	2002      	movs	r0, #2
 8001bee:	bd10      	pop	{r4, pc}

08001bf0 <HAL_UART_ErrorCallback>:
 8001bf0:	4770      	bx	lr
	...

08001bf4 <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8001bf4:	6803      	ldr	r3, [r0, #0]
{
 8001bf6:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8001bf8:	681a      	ldr	r2, [r3, #0]
{
 8001bfa:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8001bfc:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8001bfe:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8001c00:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 8001c02:	d107      	bne.n	8001c14 <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001c04:	0696      	lsls	r6, r2, #26
 8001c06:	d55a      	bpl.n	8001cbe <HAL_UART_IRQHandler+0xca>
 8001c08:	068d      	lsls	r5, r1, #26
 8001c0a:	d558      	bpl.n	8001cbe <HAL_UART_IRQHandler+0xca>
}
 8001c0c:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8001c10:	f7ff bfb4 	b.w	8001b7c <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 8001c14:	f015 0501 	ands.w	r5, r5, #1
 8001c18:	d102      	bne.n	8001c20 <HAL_UART_IRQHandler+0x2c>
 8001c1a:	f411 7f90 	tst.w	r1, #288	; 0x120
 8001c1e:	d04e      	beq.n	8001cbe <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 8001c20:	07d3      	lsls	r3, r2, #31
 8001c22:	d505      	bpl.n	8001c30 <HAL_UART_IRQHandler+0x3c>
 8001c24:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 8001c26:	bf42      	ittt	mi
 8001c28:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 8001c2a:	f043 0301 	orrmi.w	r3, r3, #1
 8001c2e:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001c30:	0750      	lsls	r0, r2, #29
 8001c32:	d504      	bpl.n	8001c3e <HAL_UART_IRQHandler+0x4a>
 8001c34:	b11d      	cbz	r5, 8001c3e <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 8001c36:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001c38:	f043 0302 	orr.w	r3, r3, #2
 8001c3c:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001c3e:	0793      	lsls	r3, r2, #30
 8001c40:	d504      	bpl.n	8001c4c <HAL_UART_IRQHandler+0x58>
 8001c42:	b11d      	cbz	r5, 8001c4c <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 8001c44:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001c46:	f043 0304 	orr.w	r3, r3, #4
 8001c4a:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001c4c:	0716      	lsls	r6, r2, #28
 8001c4e:	d504      	bpl.n	8001c5a <HAL_UART_IRQHandler+0x66>
 8001c50:	b11d      	cbz	r5, 8001c5a <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 8001c52:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001c54:	f043 0308 	orr.w	r3, r3, #8
 8001c58:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 8001c5a:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001c5c:	2b00      	cmp	r3, #0
 8001c5e:	d066      	beq.n	8001d2e <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001c60:	0695      	lsls	r5, r2, #26
 8001c62:	d504      	bpl.n	8001c6e <HAL_UART_IRQHandler+0x7a>
 8001c64:	0688      	lsls	r0, r1, #26
 8001c66:	d502      	bpl.n	8001c6e <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 8001c68:	4620      	mov	r0, r4
 8001c6a:	f7ff ff87 	bl	8001b7c <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8001c6e:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 8001c70:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8001c72:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 8001c74:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 8001c76:	0711      	lsls	r1, r2, #28
 8001c78:	d402      	bmi.n	8001c80 <HAL_UART_IRQHandler+0x8c>
 8001c7a:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 8001c7e:	d01a      	beq.n	8001cb6 <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8001c80:	f7ff fd7e 	bl	8001780 <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 8001c84:	6823      	ldr	r3, [r4, #0]
 8001c86:	695a      	ldr	r2, [r3, #20]
 8001c88:	0652      	lsls	r2, r2, #25
 8001c8a:	d510      	bpl.n	8001cae <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8001c8c:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8001c8e:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8001c90:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8001c94:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8001c96:	b150      	cbz	r0, 8001cae <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 8001c98:	4b25      	ldr	r3, [pc, #148]	; (8001d30 <HAL_UART_IRQHandler+0x13c>)
 8001c9a:	6503      	str	r3, [r0, #80]	; 0x50
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 8001c9c:	f7fe fcce 	bl	800063c <HAL_DMA_Abort_IT>
 8001ca0:	2800      	cmp	r0, #0
 8001ca2:	d044      	beq.n	8001d2e <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8001ca4:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 8001ca6:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8001caa:	6d03      	ldr	r3, [r0, #80]	; 0x50
 8001cac:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 8001cae:	4620      	mov	r0, r4
 8001cb0:	f7ff ff9e 	bl	8001bf0 <HAL_UART_ErrorCallback>
 8001cb4:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 8001cb6:	f7ff ff9b 	bl	8001bf0 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001cba:	63e5      	str	r5, [r4, #60]	; 0x3c
 8001cbc:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 8001cbe:	0616      	lsls	r6, r2, #24
 8001cc0:	d527      	bpl.n	8001d12 <HAL_UART_IRQHandler+0x11e>
 8001cc2:	060d      	lsls	r5, r1, #24
 8001cc4:	d525      	bpl.n	8001d12 <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 8001cc6:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8001cca:	2a21      	cmp	r2, #33	; 0x21
 8001ccc:	d12f      	bne.n	8001d2e <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001cce:	68a2      	ldr	r2, [r4, #8]
 8001cd0:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8001cd4:	6a22      	ldr	r2, [r4, #32]
 8001cd6:	d117      	bne.n	8001d08 <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 8001cd8:	8811      	ldrh	r1, [r2, #0]
 8001cda:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8001cde:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001ce0:	6921      	ldr	r1, [r4, #16]
 8001ce2:	b979      	cbnz	r1, 8001d04 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2;
 8001ce4:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1;
 8001ce6:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0)
 8001ce8:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 8001cea:	3a01      	subs	r2, #1
 8001cec:	b292      	uxth	r2, r2
 8001cee:	84e2      	strh	r2, [r4, #38]	; 0x26
 8001cf0:	b9ea      	cbnz	r2, 8001d2e <HAL_UART_IRQHandler+0x13a>
      CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
 8001cf2:	68da      	ldr	r2, [r3, #12]
 8001cf4:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8001cf8:	60da      	str	r2, [r3, #12]
      SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 8001cfa:	68da      	ldr	r2, [r3, #12]
 8001cfc:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8001d00:	60da      	str	r2, [r3, #12]
 8001d02:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1;
 8001d04:	3201      	adds	r2, #1
 8001d06:	e7ee      	b.n	8001ce6 <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 8001d08:	1c51      	adds	r1, r2, #1
 8001d0a:	6221      	str	r1, [r4, #32]
 8001d0c:	7812      	ldrb	r2, [r2, #0]
 8001d0e:	605a      	str	r2, [r3, #4]
 8001d10:	e7ea      	b.n	8001ce8 <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 8001d12:	0650      	lsls	r0, r2, #25
 8001d14:	d50b      	bpl.n	8001d2e <HAL_UART_IRQHandler+0x13a>
 8001d16:	064a      	lsls	r2, r1, #25
 8001d18:	d509      	bpl.n	8001d2e <HAL_UART_IRQHandler+0x13a>
  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 8001d1a:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8001d1c:	4620      	mov	r0, r4
  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 8001d1e:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8001d22:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8001d24:	2320      	movs	r3, #32
 8001d26:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 8001d2a:	f7ff ff26 	bl	8001b7a <HAL_UART_TxCpltCallback>
 8001d2e:	bd70      	pop	{r4, r5, r6, pc}
 8001d30:	08001d35 	.word	0x08001d35

08001d34 <UART_DMAAbortOnError>:
{
 8001d34:	b508      	push	{r3, lr}
  huart->RxXferCount = 0;
 8001d36:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8001d38:	6b80      	ldr	r0, [r0, #56]	; 0x38
  huart->RxXferCount = 0;
 8001d3a:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0;
 8001d3c:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 8001d3e:	f7ff ff57 	bl	8001bf0 <HAL_UART_ErrorCallback>
 8001d42:	bd08      	pop	{r3, pc}

08001d44 <QPC6614_atten_ctrl>:
     pin.Data_PIN  = GPIO_PIN_1; 
    // pin.LE_PIN    = GPIO_PIN_4;
     if(Ch == 0)       {
         pin.LE_PIN    = GPIO_PIN_4;
     }//LE}
     if (Ch == 1) {
 8001d44:	2901      	cmp	r1, #1
void QPC6614_atten_ctrl(uint8_t data,uint8_t Ch){
 8001d46:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8001d48:	4605      	mov	r5, r0
     if (Ch == 1) {
 8001d4a:	d03e      	beq.n	8001dca <QPC6614_atten_ctrl+0x86>
         pin.LE_PIN         = GPIO_PIN_5;
     }//LE}
     if (Ch == 2) {
 8001d4c:	2902      	cmp	r1, #2
 8001d4e:	d03e      	beq.n	8001dce <QPC6614_atten_ctrl+0x8a>
         pin.LE_PIN         = GPIO_PIN_7;
     }//LE}
     if (Ch == 3) {
         pin.LE_PIN         = GPIO_PIN_6;
 8001d50:	2903      	cmp	r1, #3
 8001d52:	bf14      	ite	ne
 8001d54:	2610      	movne	r6, #16
 8001d56:	2640      	moveq	r6, #64	; 0x40
         pin.LE_PIN         = GPIO_PIN_5;
 8001d58:	2406      	movs	r4, #6
//	HAL_GPIO_WritePin(GPIOA,pin.LE_PIN,GPIO_PIN_RESET);//LE
    for(i = 0; i < 6; i++){
        if(data & 0x20)
           HAL_GPIO_WritePin(GPIOA,pin.Data_PIN,GPIO_PIN_SET);//DATA
        else
           HAL_GPIO_WritePin(GPIOA,pin.Data_PIN,GPIO_PIN_RESET);//DATA
 8001d5a:	4f1e      	ldr	r7, [pc, #120]	; (8001dd4 <QPC6614_atten_ctrl+0x90>)
        if(data & 0x20)
 8001d5c:	f015 0220 	ands.w	r2, r5, #32
           HAL_GPIO_WritePin(GPIOA,pin.Data_PIN,GPIO_PIN_SET);//DATA
 8001d60:	bf18      	it	ne
 8001d62:	2201      	movne	r2, #1
           HAL_GPIO_WritePin(GPIOA,pin.Data_PIN,GPIO_PIN_RESET);//DATA
 8001d64:	2102      	movs	r1, #2
 8001d66:	4638      	mov	r0, r7
 8001d68:	f7fe fd60 	bl	800082c <HAL_GPIO_WritePin>
        data <<= 1;

		HAL_GPIO_WritePin(GPIOA,pin.Clock_PIN,GPIO_PIN_SET);//CLOCK
 8001d6c:	2201      	movs	r2, #1
 8001d6e:	4819      	ldr	r0, [pc, #100]	; (8001dd4 <QPC6614_atten_ctrl+0x90>)
 8001d70:	4611      	mov	r1, r2
 8001d72:	f7fe fd5b 	bl	800082c <HAL_GPIO_WritePin>
		 HAL_Delay(1);
 8001d76:	2001      	movs	r0, #1
 8001d78:	f7fe fbe8 	bl	800054c <HAL_Delay>
		HAL_GPIO_WritePin(GPIOA,pin.Clock_PIN,GPIO_PIN_RESET);//CLOCK
 8001d7c:	2200      	movs	r2, #0
 8001d7e:	2101      	movs	r1, #1
 8001d80:	4814      	ldr	r0, [pc, #80]	; (8001dd4 <QPC6614_atten_ctrl+0x90>)
 8001d82:	f7fe fd53 	bl	800082c <HAL_GPIO_WritePin>
 8001d86:	3c01      	subs	r4, #1
        HAL_Delay(1);
 8001d88:	2001      	movs	r0, #1
        data <<= 1;
 8001d8a:	006d      	lsls	r5, r5, #1
        HAL_Delay(1);
 8001d8c:	f7fe fbde 	bl	800054c <HAL_Delay>
    for(i = 0; i < 6; i++){
 8001d90:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
        data <<= 1;
 8001d94:	b2ed      	uxtb	r5, r5
    for(i = 0; i < 6; i++){
 8001d96:	d1e1      	bne.n	8001d5c <QPC6614_atten_ctrl+0x18>
    }
    HAL_GPIO_WritePin(GPIOA,pin.Clock_PIN,GPIO_PIN_RESET);//CLOCK
 8001d98:	4622      	mov	r2, r4
 8001d9a:	2101      	movs	r1, #1
 8001d9c:	480d      	ldr	r0, [pc, #52]	; (8001dd4 <QPC6614_atten_ctrl+0x90>)
 8001d9e:	f7fe fd45 	bl	800082c <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(GPIOA,pin.Data_PIN,GPIO_PIN_RESET);//DATA
 8001da2:	4622      	mov	r2, r4
 8001da4:	2102      	movs	r1, #2
 8001da6:	480b      	ldr	r0, [pc, #44]	; (8001dd4 <QPC6614_atten_ctrl+0x90>)
 8001da8:	f7fe fd40 	bl	800082c <HAL_GPIO_WritePin>

    HAL_GPIO_WritePin(GPIOA,pin.LE_PIN,GPIO_PIN_SET);//LE
 8001dac:	4631      	mov	r1, r6
 8001dae:	2201      	movs	r2, #1
 8001db0:	4808      	ldr	r0, [pc, #32]	; (8001dd4 <QPC6614_atten_ctrl+0x90>)
 8001db2:	f7fe fd3b 	bl	800082c <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8001db6:	2001      	movs	r0, #1
 8001db8:	f7fe fbc8 	bl	800054c <HAL_Delay>
    HAL_GPIO_WritePin(GPIOA,pin.LE_PIN,GPIO_PIN_RESET);
 8001dbc:	4622      	mov	r2, r4
 8001dbe:	4631      	mov	r1, r6
}
 8001dc0:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
    HAL_GPIO_WritePin(GPIOA,pin.LE_PIN,GPIO_PIN_RESET);
 8001dc4:	4803      	ldr	r0, [pc, #12]	; (8001dd4 <QPC6614_atten_ctrl+0x90>)
 8001dc6:	f7fe bd31 	b.w	800082c <HAL_GPIO_WritePin>
         pin.LE_PIN         = GPIO_PIN_5;
 8001dca:	2620      	movs	r6, #32
 8001dcc:	e7c4      	b.n	8001d58 <QPC6614_atten_ctrl+0x14>
         pin.LE_PIN         = GPIO_PIN_7;
 8001dce:	2680      	movs	r6, #128	; 0x80
 8001dd0:	e7c2      	b.n	8001d58 <QPC6614_atten_ctrl+0x14>
 8001dd2:	bf00      	nop
 8001dd4:	40020000 	.word	0x40020000

08001dd8 <ADRF5720_atten_ctrl>:
void ADRF5720_atten_ctrl(uint8_t data){
 8001dd8:	b570      	push	{r4, r5, r6, lr}

    pin.Clock_PIN = GPIO_PIN_1;
    pin.Data_PIN  = GPIO_PIN_0;
    pin.LE_PIN    = GPIO_PIN_15;

    HAL_GPIO_WritePin(GPIOC,pin.LE_PIN,GPIO_PIN_RESET);//LE
 8001dda:	2200      	movs	r2, #0
 8001ddc:	f44f 4100 	mov.w	r1, #32768	; 0x8000
void ADRF5720_atten_ctrl(uint8_t data){
 8001de0:	4605      	mov	r5, r0
    HAL_GPIO_WritePin(GPIOC,pin.LE_PIN,GPIO_PIN_RESET);//LE
 8001de2:	4824      	ldr	r0, [pc, #144]	; (8001e74 <ADRF5720_atten_ctrl+0x9c>)
 8001de4:	f7fe fd22 	bl	800082c <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(GPIOF,pin.Data_PIN,GPIO_PIN_RESET);//DATA
 8001de8:	2200      	movs	r2, #0
 8001dea:	2101      	movs	r1, #1
 8001dec:	4822      	ldr	r0, [pc, #136]	; (8001e78 <ADRF5720_atten_ctrl+0xa0>)
 8001dee:	f7fe fd1d 	bl	800082c <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(GPIOF,pin.Clock_PIN,GPIO_PIN_RESET);//CLOCK
 8001df2:	2200      	movs	r2, #0
 8001df4:	2102      	movs	r1, #2
 8001df6:	4820      	ldr	r0, [pc, #128]	; (8001e78 <ADRF5720_atten_ctrl+0xa0>)
 8001df8:	f7fe fd18 	bl	800082c <HAL_GPIO_WritePin>
 8001dfc:	2408      	movs	r4, #8

    for(i = 0; i < 8; i++){
            if(data & 0x80)
               HAL_GPIO_WritePin(GPIOF,pin.Data_PIN,GPIO_PIN_SET);//DATA
            else
               HAL_GPIO_WritePin(GPIOF,pin.Data_PIN,GPIO_PIN_RESET);//DATA
 8001dfe:	4e1e      	ldr	r6, [pc, #120]	; (8001e78 <ADRF5720_atten_ctrl+0xa0>)
            if(data & 0x80)
 8001e00:	062b      	lsls	r3, r5, #24
               HAL_GPIO_WritePin(GPIOF,pin.Data_PIN,GPIO_PIN_SET);//DATA
 8001e02:	bf4c      	ite	mi
 8001e04:	2201      	movmi	r2, #1
               HAL_GPIO_WritePin(GPIOF,pin.Data_PIN,GPIO_PIN_RESET);//DATA
 8001e06:	2200      	movpl	r2, #0
 8001e08:	2101      	movs	r1, #1
 8001e0a:	4630      	mov	r0, r6
 8001e0c:	f7fe fd0e 	bl	800082c <HAL_GPIO_WritePin>
            data <<= 1;


        HAL_GPIO_WritePin(GPIOF,pin.Clock_PIN,GPIO_PIN_SET);//CLOCK
 8001e10:	2201      	movs	r2, #1
 8001e12:	2102      	movs	r1, #2
 8001e14:	4818      	ldr	r0, [pc, #96]	; (8001e78 <ADRF5720_atten_ctrl+0xa0>)
 8001e16:	f7fe fd09 	bl	800082c <HAL_GPIO_WritePin>
        HAL_Delay(1);
 8001e1a:	2001      	movs	r0, #1
 8001e1c:	f7fe fb96 	bl	800054c <HAL_Delay>
        HAL_GPIO_WritePin(GPIOF,pin.Clock_PIN,GPIO_PIN_RESET);//CLOCK
 8001e20:	2200      	movs	r2, #0
 8001e22:	2102      	movs	r1, #2
 8001e24:	4814      	ldr	r0, [pc, #80]	; (8001e78 <ADRF5720_atten_ctrl+0xa0>)
 8001e26:	f7fe fd01 	bl	800082c <HAL_GPIO_WritePin>
 8001e2a:	3c01      	subs	r4, #1
        HAL_Delay(1);
 8001e2c:	2001      	movs	r0, #1
            data <<= 1;
 8001e2e:	006d      	lsls	r5, r5, #1
        HAL_Delay(1);
 8001e30:	f7fe fb8c 	bl	800054c <HAL_Delay>
    for(i = 0; i < 8; i++){
 8001e34:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
            data <<= 1;
 8001e38:	b2ed      	uxtb	r5, r5
    for(i = 0; i < 8; i++){
 8001e3a:	d1e1      	bne.n	8001e00 <ADRF5720_atten_ctrl+0x28>
    }
    HAL_GPIO_WritePin(GPIOC,pin.LE_PIN,GPIO_PIN_SET);//LE
 8001e3c:	2201      	movs	r2, #1
 8001e3e:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001e42:	480c      	ldr	r0, [pc, #48]	; (8001e74 <ADRF5720_atten_ctrl+0x9c>)
 8001e44:	f7fe fcf2 	bl	800082c <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8001e48:	2001      	movs	r0, #1
 8001e4a:	f7fe fb7f 	bl	800054c <HAL_Delay>
    HAL_GPIO_WritePin(GPIOC,pin.LE_PIN,GPIO_PIN_RESET);//LE
 8001e4e:	4622      	mov	r2, r4
 8001e50:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001e54:	4807      	ldr	r0, [pc, #28]	; (8001e74 <ADRF5720_atten_ctrl+0x9c>)
 8001e56:	f7fe fce9 	bl	800082c <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(GPIOF,pin.Data_PIN,GPIO_PIN_RESET);//DATA
 8001e5a:	4622      	mov	r2, r4
 8001e5c:	2101      	movs	r1, #1
 8001e5e:	4806      	ldr	r0, [pc, #24]	; (8001e78 <ADRF5720_atten_ctrl+0xa0>)
 8001e60:	f7fe fce4 	bl	800082c <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(GPIOF,pin.Clock_PIN,GPIO_PIN_RESET);//CLOCK
 8001e64:	4622      	mov	r2, r4
}
 8001e66:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    HAL_GPIO_WritePin(GPIOF,pin.Clock_PIN,GPIO_PIN_RESET);//CLOCK
 8001e6a:	2102      	movs	r1, #2
 8001e6c:	4802      	ldr	r0, [pc, #8]	; (8001e78 <ADRF5720_atten_ctrl+0xa0>)
 8001e6e:	f7fe bcdd 	b.w	800082c <HAL_GPIO_WritePin>
 8001e72:	bf00      	nop
 8001e74:	40020800 	.word	0x40020800
 8001e78:	40021400 	.word	0x40021400

08001e7c <HMC939_atten_ctrl>:

void HMC939_atten_ctrl(uint8_t data,uint8_t Ch){
 8001e7c:	b538      	push	{r3, r4, r5, lr}
 8001e7e:	4604      	mov	r4, r0
 8001e80:	460d      	mov	r5, r1
    pin.ATT_P2    = GPIO_PIN_4;
    pin.ATT_P3    = GPIO_PIN_5;
    pin.ATT_P4    = GPIO_PIN_6;    
    pin.ATT_ENABLE = GPIO_PIN_7;

    if(data & 0x10)
 8001e82:	f010 0210 	ands.w	r2, r0, #16
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P0,GPIO_PIN_SET); //data
 8001e86:	bf18      	it	ne
 8001e88:	2201      	movne	r2, #1
    else
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P0,GPIO_PIN_RESET); //data
 8001e8a:	2104      	movs	r1, #4
 8001e8c:	4822      	ldr	r0, [pc, #136]	; (8001f18 <HMC939_atten_ctrl+0x9c>)
 8001e8e:	f7fe fccd 	bl	800082c <HAL_GPIO_WritePin>
    if(data & 0x08)
 8001e92:	f014 0208 	ands.w	r2, r4, #8
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P1,GPIO_PIN_SET); //data
 8001e96:	bf18      	it	ne
 8001e98:	2201      	movne	r2, #1
    else
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P1,GPIO_PIN_RESET); //data
 8001e9a:	2108      	movs	r1, #8
 8001e9c:	481e      	ldr	r0, [pc, #120]	; (8001f18 <HMC939_atten_ctrl+0x9c>)
 8001e9e:	f7fe fcc5 	bl	800082c <HAL_GPIO_WritePin>
    if(data & 0x04)
 8001ea2:	f014 0204 	ands.w	r2, r4, #4
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P2,GPIO_PIN_SET); //data
 8001ea6:	bf18      	it	ne
 8001ea8:	2201      	movne	r2, #1
    else
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P2,GPIO_PIN_RESET); //data
 8001eaa:	2110      	movs	r1, #16
 8001eac:	481a      	ldr	r0, [pc, #104]	; (8001f18 <HMC939_atten_ctrl+0x9c>)
 8001eae:	f7fe fcbd 	bl	800082c <HAL_GPIO_WritePin>
    if(data & 0x02)
 8001eb2:	f014 0202 	ands.w	r2, r4, #2
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P3,GPIO_PIN_SET);    //data
 8001eb6:	bf18      	it	ne
 8001eb8:	2201      	movne	r2, #1
    else
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P3,GPIO_PIN_RESET); //data
 8001eba:	2120      	movs	r1, #32
 8001ebc:	4816      	ldr	r0, [pc, #88]	; (8001f18 <HMC939_atten_ctrl+0x9c>)
 8001ebe:	f7fe fcb5 	bl	800082c <HAL_GPIO_WritePin>
    if(data & 0x01)
 8001ec2:	f014 0201 	ands.w	r2, r4, #1
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P4,GPIO_PIN_SET); //data
 8001ec6:	bf18      	it	ne
 8001ec8:	2201      	movne	r2, #1
    else
        HAL_GPIO_WritePin(GPIOG,pin.ATT_P4,GPIO_PIN_RESET); //data
 8001eca:	2140      	movs	r1, #64	; 0x40
 8001ecc:	4812      	ldr	r0, [pc, #72]	; (8001f18 <HMC939_atten_ctrl+0x9c>)
 8001ece:	f7fe fcad 	bl	800082c <HAL_GPIO_WritePin>

     if(Ch == 0)       {
 8001ed2:	b98d      	cbnz	r5, 8001ef8 <HMC939_atten_ctrl+0x7c>
         pin.ATT_ENABLE    = GPIO_PIN_7;//enable
         HAL_GPIO_WritePin(GPIOG,pin.ATT_ENABLE,GPIO_PIN_SET);//LE
 8001ed4:	2201      	movs	r2, #1
 8001ed6:	2180      	movs	r1, #128	; 0x80
 8001ed8:	480f      	ldr	r0, [pc, #60]	; (8001f18 <HMC939_atten_ctrl+0x9c>)
 8001eda:	f7fe fca7 	bl	800082c <HAL_GPIO_WritePin>
         HAL_Delay(1);
 8001ede:	2001      	movs	r0, #1
 8001ee0:	f7fe fb34 	bl	800054c <HAL_Delay>
         HAL_GPIO_WritePin(GPIOG,pin.ATT_ENABLE,GPIO_PIN_RESET);//LE
 8001ee4:	462a      	mov	r2, r5
 8001ee6:	2180      	movs	r1, #128	; 0x80
 8001ee8:	480b      	ldr	r0, [pc, #44]	; (8001f18 <HMC939_atten_ctrl+0x9c>)
 8001eea:	f7fe fc9f 	bl	800082c <HAL_GPIO_WritePin>
         HAL_GPIO_WritePin(GPIOF,pin.ATT_ENABLE,GPIO_PIN_RESET);//LE       
         HAL_Delay(1);
     }//LE}   


}
 8001eee:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
         HAL_Delay(1);
 8001ef2:	2001      	movs	r0, #1
 8001ef4:	f7fe bb2a 	b.w	800054c <HAL_Delay>
     if (Ch == 1) {
 8001ef8:	2d01      	cmp	r5, #1
 8001efa:	d10b      	bne.n	8001f14 <HMC939_atten_ctrl+0x98>
         HAL_GPIO_WritePin(GPIOF,pin.ATT_ENABLE,GPIO_PIN_SET);//LE
 8001efc:	462a      	mov	r2, r5
 8001efe:	2104      	movs	r1, #4
 8001f00:	4806      	ldr	r0, [pc, #24]	; (8001f1c <HMC939_atten_ctrl+0xa0>)
 8001f02:	f7fe fc93 	bl	800082c <HAL_GPIO_WritePin>
         HAL_Delay(1);
 8001f06:	4628      	mov	r0, r5
 8001f08:	f7fe fb20 	bl	800054c <HAL_Delay>
         HAL_GPIO_WritePin(GPIOF,pin.ATT_ENABLE,GPIO_PIN_RESET);//LE       
 8001f0c:	2200      	movs	r2, #0
 8001f0e:	2104      	movs	r1, #4
 8001f10:	4802      	ldr	r0, [pc, #8]	; (8001f1c <HMC939_atten_ctrl+0xa0>)
 8001f12:	e7ea      	b.n	8001eea <HMC939_atten_ctrl+0x6e>
 8001f14:	bd38      	pop	{r3, r4, r5, pc}
 8001f16:	bf00      	nop
 8001f18:	40021800 	.word	0x40021800
 8001f1c:	40021400 	.word	0x40021400

08001f20 <Uart_Data_Send>:
    
#endif // PYJ.2019.02.21_END -- 

}
void Uart_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart1, data,size, 10); 
 8001f20:	460a      	mov	r2, r1
 8001f22:	230a      	movs	r3, #10
 8001f24:	4601      	mov	r1, r0
 8001f26:	4801      	ldr	r0, [pc, #4]	; (8001f2c <Uart_Data_Send+0xc>)
 8001f28:	f7ff bda8 	b.w	8001a7c <HAL_UART_Transmit>
 8001f2c:	20000bf0 	.word	0x20000bf0

08001f30 <Atten_Table_Read.constprop.0>:
		case ATT_B_EN_30G2_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G2_29_5_30Ghz,ATT_B_EN_30G2_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
		case ATT_B_EN_30G3_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G3_29_5_30Ghz,ATT_B_EN_30G3_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
    }
}

void Atten_Table_Read(uint16_t Address,Atten_Table_Value_t TableName,uint8_t* data){
 8001f30:	b084      	sub	sp, #16
 8001f32:	b538      	push	{r3, r4, r5, lr}
 8001f34:	ac04      	add	r4, sp, #16
 8001f36:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 8001f3a:	9c14      	ldr	r4, [sp, #80]	; 0x50
	memcpy(&data[Bluecell_DATA],&TableName.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));
 8001f3c:	ab04      	add	r3, sp, #16
 8001f3e:	1ce2      	adds	r2, r4, #3
 8001f40:	a914      	add	r1, sp, #80	; 0x50
 8001f42:	f853 0b04 	ldr.w	r0, [r3], #4
 8001f46:	428b      	cmp	r3, r1
 8001f48:	f842 0b04 	str.w	r0, [r2], #4
 8001f4c:	d1f9      	bne.n	8001f42 <Atten_Table_Read.constprop.0+0x12>
	data[data[Bluecell_Length] + 3]  = STH30_CreateCrc(&data[Bluecell_Type],data[Bluecell_Length] + 2);
 8001f4e:	78a1      	ldrb	r1, [r4, #2]
 8001f50:	1c60      	adds	r0, r4, #1
 8001f52:	1ccd      	adds	r5, r1, #3
 8001f54:	3102      	adds	r1, #2
 8001f56:	b2c9      	uxtb	r1, r1
 8001f58:	f002 ff16 	bl	8004d88 <STH30_CreateCrc>
	data[data[Bluecell_Length] + 4]  = 0xeb;
 8001f5c:	22eb      	movs	r2, #235	; 0xeb
	data[data[Bluecell_Length] + 3]  = STH30_CreateCrc(&data[Bluecell_Type],data[Bluecell_Length] + 2);
 8001f5e:	5560      	strb	r0, [r4, r5]
	data[data[Bluecell_Length] + 4]  = 0xeb;
 8001f60:	78a3      	ldrb	r3, [r4, #2]
	Uart_Data_Send(data,data[Bluecell_Length]+5);
 8001f62:	4620      	mov	r0, r4
	data[data[Bluecell_Length] + 4]  = 0xeb;
 8001f64:	4423      	add	r3, r4
 8001f66:	711a      	strb	r2, [r3, #4]
	Uart_Data_Send(data,data[Bluecell_Length]+5);
 8001f68:	78a1      	ldrb	r1, [r4, #2]
 8001f6a:	3105      	adds	r1, #5
 8001f6c:	b2c9      	uxtb	r1, r1
 8001f6e:	f7ff ffd7 	bl	8001f20 <Uart_Data_Send>
}
 8001f72:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 8001f76:	b004      	add	sp, #16
 8001f78:	4770      	bx	lr
	...

08001f7c <Atten_Offset_QPC6614>:
uint8_t Atten_Offset_QPC6614(Atten_Table_Value_t TableName, uint8_t data){
 8001f7c:	b084      	sub	sp, #16
 8001f7e:	b508      	push	{r3, lr}
 8001f80:	f10d 0e08 	add.w	lr, sp, #8
 8001f84:	e88e 000f 	stmia.w	lr, {r0, r1, r2, r3}
 8001f88:	f89d 3048 	ldrb.w	r3, [sp, #72]	; 0x48
    switch(data){
 8001f8c:	2b3f      	cmp	r3, #63	; 0x3f
 8001f8e:	f200 80e5 	bhi.w	800215c <Atten_Offset_QPC6614+0x1e0>
 8001f92:	e8df f003 	tbb	[pc, r3]
 8001f96:	2620      	.short	0x2620
 8001f98:	322f2c29 	.word	0x322f2c29
 8001f9c:	3e3b3835 	.word	0x3e3b3835
 8001fa0:	4a474441 	.word	0x4a474441
 8001fa4:	5653504d 	.word	0x5653504d
 8001fa8:	625f5c59 	.word	0x625f5c59
 8001fac:	6e6b6865 	.word	0x6e6b6865
 8001fb0:	7a777471 	.word	0x7a777471
 8001fb4:	8683807d 	.word	0x8683807d
 8001fb8:	928f8c89 	.word	0x928f8c89
 8001fbc:	9e9b9895 	.word	0x9e9b9895
 8001fc0:	aaa7a4a1 	.word	0xaaa7a4a1
 8001fc4:	b6b3b0ad 	.word	0xb6b3b0ad
 8001fc8:	c2bfbcb9 	.word	0xc2bfbcb9
 8001fcc:	cecbc8c5 	.word	0xcecbc8c5
 8001fd0:	dad7d4d1 	.word	0xdad7d4d1
 8001fd4:	e0dd      	.short	0xe0dd
        case QPC6614_Atten_31_5dB_num : ret = TableName.Atten_Table_31_5dB_Value ;break;
 8001fd6:	f89d 0008 	ldrb.w	r0, [sp, #8]
}
 8001fda:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 8001fde:	b004      	add	sp, #16
 8001fe0:	4770      	bx	lr
        case QPC6614_Atten_31dB_num   : ret = TableName.Atten_Table_31dB_Value   ;break;
 8001fe2:	f89d 0009 	ldrb.w	r0, [sp, #9]
 8001fe6:	e7f8      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_30_5dB_num : ret = TableName.Atten_Table_30_5dB_Value ;break;
 8001fe8:	f89d 000a 	ldrb.w	r0, [sp, #10]
 8001fec:	e7f5      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_30dB_num   : ret = TableName.Atten_Table_30dB_Value   ;break;
 8001fee:	f89d 000b 	ldrb.w	r0, [sp, #11]
 8001ff2:	e7f2      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_29_5dB_num : ret = TableName.Atten_Table_29_5dB_Value ;break;
 8001ff4:	f89d 000c 	ldrb.w	r0, [sp, #12]
 8001ff8:	e7ef      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_29dB_num   : ret = TableName.Atten_Table_29dB_Value   ;break;
 8001ffa:	f89d 000d 	ldrb.w	r0, [sp, #13]
 8001ffe:	e7ec      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_28_5dB_num : ret = TableName.Atten_Table_28_5dB_Value ;break;
 8002000:	f89d 000e 	ldrb.w	r0, [sp, #14]
 8002004:	e7e9      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_28dB_num   : ret = TableName.Atten_Table_28dB_Value   ;break;
 8002006:	f89d 000f 	ldrb.w	r0, [sp, #15]
 800200a:	e7e6      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_27_5dB_num : ret = TableName.Atten_Table_27_5dB_Value ;break;
 800200c:	f89d 0010 	ldrb.w	r0, [sp, #16]
 8002010:	e7e3      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_27dB_num   : ret = TableName.Atten_Table_27dB_Value   ;break;
 8002012:	f89d 0011 	ldrb.w	r0, [sp, #17]
 8002016:	e7e0      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_26_5dB_num : ret = TableName.Atten_Table_26_5dB_Value ;break;
 8002018:	f89d 0012 	ldrb.w	r0, [sp, #18]
 800201c:	e7dd      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_26dB_num   : ret = TableName.Atten_Table_26dB_Value   ;break;
 800201e:	f89d 0013 	ldrb.w	r0, [sp, #19]
 8002022:	e7da      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_25_5dB_num : ret = TableName.Atten_Table_25_5dB_Value ;break;
 8002024:	f89d 0014 	ldrb.w	r0, [sp, #20]
 8002028:	e7d7      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_25dB_num   : ret = TableName.Atten_Table_25dB_Value   ;break;
 800202a:	f89d 0015 	ldrb.w	r0, [sp, #21]
 800202e:	e7d4      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_24_5dB_num : ret = TableName.Atten_Table_24_5dB_Value ;break;
 8002030:	f89d 0016 	ldrb.w	r0, [sp, #22]
 8002034:	e7d1      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_24dB_num   : ret = TableName.Atten_Table_24dB_Value   ;break;
 8002036:	f89d 0017 	ldrb.w	r0, [sp, #23]
 800203a:	e7ce      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_23_5dB_num : ret = TableName.Atten_Table_23_5dB_Value ;break;
 800203c:	f89d 0018 	ldrb.w	r0, [sp, #24]
 8002040:	e7cb      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_23dB_num   : ret = TableName.Atten_Table_23dB_Value   ;break;
 8002042:	f89d 0019 	ldrb.w	r0, [sp, #25]
 8002046:	e7c8      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_22_5dB_num : ret = TableName.Atten_Table_22_5dB_Value ;break;
 8002048:	f89d 001a 	ldrb.w	r0, [sp, #26]
 800204c:	e7c5      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_22dB_num   : ret = TableName.Atten_Table_22dB_Value   ;break;
 800204e:	f89d 001b 	ldrb.w	r0, [sp, #27]
 8002052:	e7c2      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_21_5dB_num : ret = TableName.Atten_Table_21_5dB_Value ;break;
 8002054:	f89d 001c 	ldrb.w	r0, [sp, #28]
 8002058:	e7bf      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_21dB_num   : ret = TableName.Atten_Table_21dB_Value   ;break;
 800205a:	f89d 001d 	ldrb.w	r0, [sp, #29]
 800205e:	e7bc      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_20_5dB_num : ret = TableName.Atten_Table_20_5dB_Value ;break;
 8002060:	f89d 001e 	ldrb.w	r0, [sp, #30]
 8002064:	e7b9      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_20dB_num   : ret = TableName.Atten_Table_20dB_Value   ;break;
 8002066:	f89d 001f 	ldrb.w	r0, [sp, #31]
 800206a:	e7b6      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_19_5dB_num : ret = TableName.Atten_Table_19_5dB_Value ;break;
 800206c:	f89d 0020 	ldrb.w	r0, [sp, #32]
 8002070:	e7b3      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_19dB_num   : ret = TableName.Atten_Table_19dB_Value   ;break;
 8002072:	f89d 0021 	ldrb.w	r0, [sp, #33]	; 0x21
 8002076:	e7b0      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_18_5dB_num : ret = TableName.Atten_Table_18_5dB_Value ;break;
 8002078:	f89d 0022 	ldrb.w	r0, [sp, #34]	; 0x22
 800207c:	e7ad      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_18dB_num   : ret = TableName.Atten_Table_18dB_Value   ;break;
 800207e:	f89d 0023 	ldrb.w	r0, [sp, #35]	; 0x23
 8002082:	e7aa      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_17_5dB_num : ret = TableName.Atten_Table_17_5dB_Value ;break;
 8002084:	f89d 0024 	ldrb.w	r0, [sp, #36]	; 0x24
 8002088:	e7a7      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_17dB_num   : ret = TableName.Atten_Table_17dB_Value   ;break;
 800208a:	f89d 0025 	ldrb.w	r0, [sp, #37]	; 0x25
 800208e:	e7a4      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_16_5dB_num : ret = TableName.Atten_Table_16_5dB_Value ;break;
 8002090:	f89d 0026 	ldrb.w	r0, [sp, #38]	; 0x26
 8002094:	e7a1      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_16dB_num   : ret = TableName.Atten_Table_16dB_Value   ;break;
 8002096:	f89d 0027 	ldrb.w	r0, [sp, #39]	; 0x27
 800209a:	e79e      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_15_5dB_num : ret = TableName.Atten_Table_15_5dB_Value ;break;
 800209c:	f89d 0028 	ldrb.w	r0, [sp, #40]	; 0x28
 80020a0:	e79b      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_15dB_num   : ret = TableName.Atten_Table_15dB_Value   ;break;
 80020a2:	f89d 0029 	ldrb.w	r0, [sp, #41]	; 0x29
 80020a6:	e798      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_14_5dB_num : ret = TableName.Atten_Table_14_5dB_Value ;break;
 80020a8:	f89d 002a 	ldrb.w	r0, [sp, #42]	; 0x2a
 80020ac:	e795      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_14dB_num   : ret = TableName.Atten_Table_14dB_Value   ;break;
 80020ae:	f89d 002b 	ldrb.w	r0, [sp, #43]	; 0x2b
 80020b2:	e792      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_13_5dB_num : ret = TableName.Atten_Table_13_5dB_Value ;break;
 80020b4:	f89d 002c 	ldrb.w	r0, [sp, #44]	; 0x2c
 80020b8:	e78f      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_13dB_num   : ret = TableName.Atten_Table_13dB_Value   ;break;
 80020ba:	f89d 002d 	ldrb.w	r0, [sp, #45]	; 0x2d
 80020be:	e78c      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_12_5dB_num : ret = TableName.Atten_Table_12_5dB_Value ;break;
 80020c0:	f89d 002e 	ldrb.w	r0, [sp, #46]	; 0x2e
 80020c4:	e789      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_12dB_num   : ret = TableName.Atten_Table_12dB_Value   ;break;
 80020c6:	f89d 002f 	ldrb.w	r0, [sp, #47]	; 0x2f
 80020ca:	e786      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_11_5dB_num : ret = TableName.Atten_Table_11_5dB_Value ;break;
 80020cc:	f89d 0030 	ldrb.w	r0, [sp, #48]	; 0x30
 80020d0:	e783      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_11dB_num   : ret = TableName.Atten_Table_11dB_Value   ;break;
 80020d2:	f89d 0031 	ldrb.w	r0, [sp, #49]	; 0x31
 80020d6:	e780      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_10_5dB_num : ret = TableName.Atten_Table_10_5dB_Value ;break;
 80020d8:	f89d 0032 	ldrb.w	r0, [sp, #50]	; 0x32
 80020dc:	e77d      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_10dB_num   : ret = TableName.Atten_Table_10dB_Value   ;break;
 80020de:	f89d 0033 	ldrb.w	r0, [sp, #51]	; 0x33
 80020e2:	e77a      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_9_5dB_num  : ret = TableName.Atten_Table_9_5dB_Value  ;break;
 80020e4:	f89d 0034 	ldrb.w	r0, [sp, #52]	; 0x34
 80020e8:	e777      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_9dB_num    : ret = TableName.Atten_Table_9dB_Value    ;break;
 80020ea:	f89d 0035 	ldrb.w	r0, [sp, #53]	; 0x35
 80020ee:	e774      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_8_5dB_num  : ret = TableName.Atten_Table_8_5dB_Value  ;break;
 80020f0:	f89d 0036 	ldrb.w	r0, [sp, #54]	; 0x36
 80020f4:	e771      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_8dB_num    : ret = TableName.Atten_Table_8dB_Value    ;break;
 80020f6:	f89d 0037 	ldrb.w	r0, [sp, #55]	; 0x37
 80020fa:	e76e      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_7_5dB_num  : ret = TableName.Atten_Table_7_5dB_Value  ;break;
 80020fc:	f89d 0038 	ldrb.w	r0, [sp, #56]	; 0x38
 8002100:	e76b      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_7dB_num    : ret = TableName.Atten_Table_7dB_Value    ;break;
 8002102:	f89d 0039 	ldrb.w	r0, [sp, #57]	; 0x39
 8002106:	e768      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_6_5dB_num  : ret = TableName.Atten_Table_6_5dB_Value  ;break;
 8002108:	f89d 003a 	ldrb.w	r0, [sp, #58]	; 0x3a
 800210c:	e765      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_6dB_num    : ret = TableName.Atten_Table_6dB_Value    ;break;
 800210e:	f89d 003b 	ldrb.w	r0, [sp, #59]	; 0x3b
 8002112:	e762      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_5_5dB_num  : ret = TableName.Atten_Table_5_5dB_Value  ;break;
 8002114:	f89d 003c 	ldrb.w	r0, [sp, #60]	; 0x3c
 8002118:	e75f      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_5dB_num    : ret = TableName.Atten_Table_5dB_Value    ;break;
 800211a:	f89d 003d 	ldrb.w	r0, [sp, #61]	; 0x3d
 800211e:	e75c      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_4_5dB_num  : ret = TableName.Atten_Table_4_5dB_Value  ;break;
 8002120:	f89d 003e 	ldrb.w	r0, [sp, #62]	; 0x3e
 8002124:	e759      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_4dB_num    : ret = TableName.Atten_Table_4dB_Value    ;break;
 8002126:	f89d 003f 	ldrb.w	r0, [sp, #63]	; 0x3f
 800212a:	e756      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_3_5dB_num  : ret = TableName.Atten_Table_3_5dB_Value  ;break;
 800212c:	f89d 0040 	ldrb.w	r0, [sp, #64]	; 0x40
 8002130:	e753      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_3dB_num    : ret = TableName.Atten_Table_3dB_Value    ;break;
 8002132:	f89d 0041 	ldrb.w	r0, [sp, #65]	; 0x41
 8002136:	e750      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_2_5dB_num  : ret = TableName.Atten_Table_2_5dB_Value  ;break;
 8002138:	f89d 0042 	ldrb.w	r0, [sp, #66]	; 0x42
 800213c:	e74d      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_2dB_num    : ret = TableName.Atten_Table_2dB_Value    ;break;
 800213e:	f89d 0043 	ldrb.w	r0, [sp, #67]	; 0x43
 8002142:	e74a      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_1_5dB_num  : ret = TableName.Atten_Table_1_5dB_Value  ;break;
 8002144:	f89d 0044 	ldrb.w	r0, [sp, #68]	; 0x44
 8002148:	e747      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_1dB_num    : ret = TableName.Atten_Table_1dB_Value    ;break;
 800214a:	f89d 0045 	ldrb.w	r0, [sp, #69]	; 0x45
 800214e:	e744      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_0_5dB_num  : ret = TableName.Atten_Table_0_5dB_Value  ;break;
 8002150:	f89d 0046 	ldrb.w	r0, [sp, #70]	; 0x46
 8002154:	e741      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        case QPC6614_Atten_0dB_num    : ret = TableName.Atten_Table_0dB_Value    ;break;\
 8002156:	f89d 0047 	ldrb.w	r0, [sp, #71]	; 0x47
 800215a:	e73e      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
        default : printf("Critical Error\r\n");
 800215c:	4802      	ldr	r0, [pc, #8]	; (8002168 <Atten_Offset_QPC6614+0x1ec>)
 800215e:	f003 f80f 	bl	8005180 <puts>
    uint8_t ret = 0;
 8002162:	2000      	movs	r0, #0
 8002164:	e739      	b.n	8001fda <Atten_Offset_QPC6614+0x5e>
 8002166:	bf00      	nop
 8002168:	08006168 	.word	0x08006168

0800216c <Atten_Offset_ADRF5720>:
uint8_t Atten_Offset_ADRF5720(Atten_Table_Value_t TableName, uint8_t data){
 800216c:	b084      	sub	sp, #16
 800216e:	b508      	push	{r3, lr}
 8002170:	f10d 0e08 	add.w	lr, sp, #8
 8002174:	e88e 000f 	stmia.w	lr, {r0, r1, r2, r3}
 8002178:	f89d 3048 	ldrb.w	r3, [sp, #72]	; 0x48
    switch(data){
 800217c:	2b3f      	cmp	r3, #63	; 0x3f
 800217e:	f200 80e5 	bhi.w	800234c <Atten_Offset_ADRF5720+0x1e0>
 8002182:	e8df f003 	tbb	[pc, r3]
 8002186:	dde0      	.short	0xdde0
 8002188:	d1d4d7da 	.word	0xd1d4d7da
 800218c:	c5c8cbce 	.word	0xc5c8cbce
 8002190:	b9bcbfc2 	.word	0xb9bcbfc2
 8002194:	adb0b3b6 	.word	0xadb0b3b6
 8002198:	a1a4a7aa 	.word	0xa1a4a7aa
 800219c:	95989b9e 	.word	0x95989b9e
 80021a0:	898c8f92 	.word	0x898c8f92
 80021a4:	7d808386 	.word	0x7d808386
 80021a8:	7174777a 	.word	0x7174777a
 80021ac:	65686b6e 	.word	0x65686b6e
 80021b0:	595c5f62 	.word	0x595c5f62
 80021b4:	4d505356 	.word	0x4d505356
 80021b8:	4144474a 	.word	0x4144474a
 80021bc:	35383b3e 	.word	0x35383b3e
 80021c0:	292c2f32 	.word	0x292c2f32
 80021c4:	2026      	.short	0x2026
        case ADRF5720_Atten_31_5dB_num : ret = TableName.Atten_Table_31_5dB_Value ;break;
 80021c6:	f89d 0008 	ldrb.w	r0, [sp, #8]
}
 80021ca:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 80021ce:	b004      	add	sp, #16
 80021d0:	4770      	bx	lr
        case ADRF5720_Atten_31dB_num   : ret = TableName.Atten_Table_31dB_Value   ;break;
 80021d2:	f89d 0009 	ldrb.w	r0, [sp, #9]
 80021d6:	e7f8      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_30_5dB_num : ret = TableName.Atten_Table_30_5dB_Value ;break;
 80021d8:	f89d 000a 	ldrb.w	r0, [sp, #10]
 80021dc:	e7f5      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_30dB_num   : ret = TableName.Atten_Table_30dB_Value   ;break;
 80021de:	f89d 000b 	ldrb.w	r0, [sp, #11]
 80021e2:	e7f2      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_29_5dB_num : ret = TableName.Atten_Table_29_5dB_Value ;break;
 80021e4:	f89d 000c 	ldrb.w	r0, [sp, #12]
 80021e8:	e7ef      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_29dB_num   : ret = TableName.Atten_Table_29dB_Value   ;break;
 80021ea:	f89d 000d 	ldrb.w	r0, [sp, #13]
 80021ee:	e7ec      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_28_5dB_num : ret = TableName.Atten_Table_28_5dB_Value ;break;
 80021f0:	f89d 000e 	ldrb.w	r0, [sp, #14]
 80021f4:	e7e9      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_28dB_num   : ret = TableName.Atten_Table_28dB_Value   ;break;
 80021f6:	f89d 000f 	ldrb.w	r0, [sp, #15]
 80021fa:	e7e6      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_27_5dB_num : ret = TableName.Atten_Table_27_5dB_Value ;break;
 80021fc:	f89d 0010 	ldrb.w	r0, [sp, #16]
 8002200:	e7e3      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_27dB_num   : ret = TableName.Atten_Table_27dB_Value   ;break;
 8002202:	f89d 0011 	ldrb.w	r0, [sp, #17]
 8002206:	e7e0      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_26_5dB_num : ret = TableName.Atten_Table_26_5dB_Value ;break;
 8002208:	f89d 0012 	ldrb.w	r0, [sp, #18]
 800220c:	e7dd      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_26dB_num   : ret = TableName.Atten_Table_26dB_Value   ;break;
 800220e:	f89d 0013 	ldrb.w	r0, [sp, #19]
 8002212:	e7da      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_25_5dB_num : ret = TableName.Atten_Table_25_5dB_Value ;break;
 8002214:	f89d 0014 	ldrb.w	r0, [sp, #20]
 8002218:	e7d7      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_25dB_num   : ret = TableName.Atten_Table_25dB_Value   ;break;
 800221a:	f89d 0015 	ldrb.w	r0, [sp, #21]
 800221e:	e7d4      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_24_5dB_num : ret = TableName.Atten_Table_24_5dB_Value ;break;
 8002220:	f89d 0016 	ldrb.w	r0, [sp, #22]
 8002224:	e7d1      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_24dB_num   : ret = TableName.Atten_Table_24dB_Value   ;break;
 8002226:	f89d 0017 	ldrb.w	r0, [sp, #23]
 800222a:	e7ce      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_23_5dB_num : ret = TableName.Atten_Table_23_5dB_Value ;break;
 800222c:	f89d 0018 	ldrb.w	r0, [sp, #24]
 8002230:	e7cb      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_23dB_num   : ret = TableName.Atten_Table_23dB_Value   ;break;
 8002232:	f89d 0019 	ldrb.w	r0, [sp, #25]
 8002236:	e7c8      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_22_5dB_num : ret = TableName.Atten_Table_22_5dB_Value ;break;
 8002238:	f89d 001a 	ldrb.w	r0, [sp, #26]
 800223c:	e7c5      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_22dB_num   : ret = TableName.Atten_Table_22dB_Value   ;break;
 800223e:	f89d 001b 	ldrb.w	r0, [sp, #27]
 8002242:	e7c2      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_21_5dB_num : ret = TableName.Atten_Table_21_5dB_Value ;break;
 8002244:	f89d 001c 	ldrb.w	r0, [sp, #28]
 8002248:	e7bf      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_21dB_num   : ret = TableName.Atten_Table_21dB_Value   ;break;
 800224a:	f89d 001d 	ldrb.w	r0, [sp, #29]
 800224e:	e7bc      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_20_5dB_num : ret = TableName.Atten_Table_20_5dB_Value ;break;
 8002250:	f89d 001e 	ldrb.w	r0, [sp, #30]
 8002254:	e7b9      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_20dB_num   : ret = TableName.Atten_Table_20dB_Value   ;break;
 8002256:	f89d 001f 	ldrb.w	r0, [sp, #31]
 800225a:	e7b6      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_19_5dB_num : ret = TableName.Atten_Table_19_5dB_Value ;break;
 800225c:	f89d 0020 	ldrb.w	r0, [sp, #32]
 8002260:	e7b3      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_19dB_num   : ret = TableName.Atten_Table_19dB_Value   ;break;
 8002262:	f89d 0021 	ldrb.w	r0, [sp, #33]	; 0x21
 8002266:	e7b0      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_18_5dB_num : ret = TableName.Atten_Table_18_5dB_Value ;break;
 8002268:	f89d 0022 	ldrb.w	r0, [sp, #34]	; 0x22
 800226c:	e7ad      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_18dB_num   : ret = TableName.Atten_Table_18dB_Value   ;break;
 800226e:	f89d 0023 	ldrb.w	r0, [sp, #35]	; 0x23
 8002272:	e7aa      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_17_5dB_num : ret = TableName.Atten_Table_17_5dB_Value ;break;
 8002274:	f89d 0024 	ldrb.w	r0, [sp, #36]	; 0x24
 8002278:	e7a7      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_17dB_num   : ret = TableName.Atten_Table_17dB_Value   ;break;
 800227a:	f89d 0025 	ldrb.w	r0, [sp, #37]	; 0x25
 800227e:	e7a4      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_16_5dB_num : ret = TableName.Atten_Table_16_5dB_Value ;break;
 8002280:	f89d 0026 	ldrb.w	r0, [sp, #38]	; 0x26
 8002284:	e7a1      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_16dB_num   : ret = TableName.Atten_Table_16dB_Value   ;break;
 8002286:	f89d 0027 	ldrb.w	r0, [sp, #39]	; 0x27
 800228a:	e79e      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_15_5dB_num : ret = TableName.Atten_Table_15_5dB_Value ;break;
 800228c:	f89d 0028 	ldrb.w	r0, [sp, #40]	; 0x28
 8002290:	e79b      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_15dB_num   : ret = TableName.Atten_Table_15dB_Value   ;break;
 8002292:	f89d 0029 	ldrb.w	r0, [sp, #41]	; 0x29
 8002296:	e798      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_14_5dB_num : ret = TableName.Atten_Table_14_5dB_Value ;break;
 8002298:	f89d 002a 	ldrb.w	r0, [sp, #42]	; 0x2a
 800229c:	e795      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_14dB_num   : ret = TableName.Atten_Table_14dB_Value   ;break;
 800229e:	f89d 002b 	ldrb.w	r0, [sp, #43]	; 0x2b
 80022a2:	e792      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_13_5dB_num : ret = TableName.Atten_Table_13_5dB_Value ;break;
 80022a4:	f89d 002c 	ldrb.w	r0, [sp, #44]	; 0x2c
 80022a8:	e78f      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_13dB_num   : ret = TableName.Atten_Table_13dB_Value   ;break;
 80022aa:	f89d 002d 	ldrb.w	r0, [sp, #45]	; 0x2d
 80022ae:	e78c      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_12_5dB_num : ret = TableName.Atten_Table_12_5dB_Value ;break;
 80022b0:	f89d 002e 	ldrb.w	r0, [sp, #46]	; 0x2e
 80022b4:	e789      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_12dB_num   : ret = TableName.Atten_Table_12dB_Value   ;break;
 80022b6:	f89d 002f 	ldrb.w	r0, [sp, #47]	; 0x2f
 80022ba:	e786      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_11_5dB_num : ret = TableName.Atten_Table_11_5dB_Value ;break;
 80022bc:	f89d 0030 	ldrb.w	r0, [sp, #48]	; 0x30
 80022c0:	e783      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_11dB_num   : ret = TableName.Atten_Table_11dB_Value   ;break;
 80022c2:	f89d 0031 	ldrb.w	r0, [sp, #49]	; 0x31
 80022c6:	e780      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_10_5dB_num : ret = TableName.Atten_Table_10_5dB_Value ;break;
 80022c8:	f89d 0032 	ldrb.w	r0, [sp, #50]	; 0x32
 80022cc:	e77d      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_10dB_num   : ret = TableName.Atten_Table_10dB_Value   ;break;
 80022ce:	f89d 0033 	ldrb.w	r0, [sp, #51]	; 0x33
 80022d2:	e77a      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_9_5dB_num  : ret = TableName.Atten_Table_9_5dB_Value  ;break;
 80022d4:	f89d 0034 	ldrb.w	r0, [sp, #52]	; 0x34
 80022d8:	e777      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_9dB_num    : ret = TableName.Atten_Table_9dB_Value    ;break;
 80022da:	f89d 0035 	ldrb.w	r0, [sp, #53]	; 0x35
 80022de:	e774      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_8_5dB_num  : ret = TableName.Atten_Table_8_5dB_Value  ;break;
 80022e0:	f89d 0036 	ldrb.w	r0, [sp, #54]	; 0x36
 80022e4:	e771      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_8dB_num    : ret = TableName.Atten_Table_8dB_Value    ;break;
 80022e6:	f89d 0037 	ldrb.w	r0, [sp, #55]	; 0x37
 80022ea:	e76e      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_7_5dB_num  : ret = TableName.Atten_Table_7_5dB_Value  ;break;
 80022ec:	f89d 0038 	ldrb.w	r0, [sp, #56]	; 0x38
 80022f0:	e76b      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_7dB_num    : ret = TableName.Atten_Table_7dB_Value    ;break;
 80022f2:	f89d 0039 	ldrb.w	r0, [sp, #57]	; 0x39
 80022f6:	e768      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_6_5dB_num  : ret = TableName.Atten_Table_6_5dB_Value  ;break;
 80022f8:	f89d 003a 	ldrb.w	r0, [sp, #58]	; 0x3a
 80022fc:	e765      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_6dB_num    : ret = TableName.Atten_Table_6dB_Value    ;break;
 80022fe:	f89d 003b 	ldrb.w	r0, [sp, #59]	; 0x3b
 8002302:	e762      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_5_5dB_num  : ret = TableName.Atten_Table_5_5dB_Value  ;break;
 8002304:	f89d 003c 	ldrb.w	r0, [sp, #60]	; 0x3c
 8002308:	e75f      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_5dB_num    : ret = TableName.Atten_Table_5dB_Value    ;break;
 800230a:	f89d 003d 	ldrb.w	r0, [sp, #61]	; 0x3d
 800230e:	e75c      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_4_5dB_num  : ret = TableName.Atten_Table_4_5dB_Value  ;break;
 8002310:	f89d 003e 	ldrb.w	r0, [sp, #62]	; 0x3e
 8002314:	e759      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_4dB_num    : ret = TableName.Atten_Table_4dB_Value    ;break;
 8002316:	f89d 003f 	ldrb.w	r0, [sp, #63]	; 0x3f
 800231a:	e756      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_3_5dB_num  : ret = TableName.Atten_Table_3_5dB_Value  ;break;
 800231c:	f89d 0040 	ldrb.w	r0, [sp, #64]	; 0x40
 8002320:	e753      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_3dB_num    : ret = TableName.Atten_Table_3dB_Value    ;break;
 8002322:	f89d 0041 	ldrb.w	r0, [sp, #65]	; 0x41
 8002326:	e750      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_2_5dB_num  : ret = TableName.Atten_Table_2_5dB_Value  ;break;
 8002328:	f89d 0042 	ldrb.w	r0, [sp, #66]	; 0x42
 800232c:	e74d      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_2dB_num    : ret = TableName.Atten_Table_2dB_Value    ;break;
 800232e:	f89d 0043 	ldrb.w	r0, [sp, #67]	; 0x43
 8002332:	e74a      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_1_5dB_num  : ret = TableName.Atten_Table_1_5dB_Value  ;break;
 8002334:	f89d 0044 	ldrb.w	r0, [sp, #68]	; 0x44
 8002338:	e747      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_1dB_num    : ret = TableName.Atten_Table_1dB_Value    ;break;
 800233a:	f89d 0045 	ldrb.w	r0, [sp, #69]	; 0x45
 800233e:	e744      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_0_5dB_num  : ret = TableName.Atten_Table_0_5dB_Value  ;break;
 8002340:	f89d 0046 	ldrb.w	r0, [sp, #70]	; 0x46
 8002344:	e741      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        case ADRF5720_Atten_0dB_num    : ret = TableName.Atten_Table_0dB_Value    ;break;
 8002346:	f89d 0047 	ldrb.w	r0, [sp, #71]	; 0x47
 800234a:	e73e      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
        default : printf("Critical Error\r\n");
 800234c:	4802      	ldr	r0, [pc, #8]	; (8002358 <Atten_Offset_ADRF5720+0x1ec>)
 800234e:	f002 ff17 	bl	8005180 <puts>
    uint8_t ret = 0;
 8002352:	2000      	movs	r0, #0
 8002354:	e739      	b.n	80021ca <Atten_Offset_ADRF5720+0x5e>
 8002356:	bf00      	nop
 8002358:	08006168 	.word	0x08006168

0800235c <Atten_Offset_HMC939>:
uint8_t Atten_Offset_HMC939(Atten_Table_Value_t TableName, uint8_t data){
 800235c:	b084      	sub	sp, #16
 800235e:	b508      	push	{r3, lr}
 8002360:	f10d 0e08 	add.w	lr, sp, #8
 8002364:	e88e 000f 	stmia.w	lr, {r0, r1, r2, r3}
 8002368:	f89d 3048 	ldrb.w	r3, [sp, #72]	; 0x48
    switch(data){
 800236c:	2b1f      	cmp	r3, #31
 800236e:	d874      	bhi.n	800245a <Atten_Offset_HMC939+0xfe>
 8002370:	e8df f003 	tbb	[pc, r3]
 8002374:	1c191610 	.word	0x1c191610
 8002378:	2825221f 	.word	0x2825221f
 800237c:	34312e2b 	.word	0x34312e2b
 8002380:	403d3a37 	.word	0x403d3a37
 8002384:	4c494643 	.word	0x4c494643
 8002388:	5855524f 	.word	0x5855524f
 800238c:	64615e5b 	.word	0x64615e5b
 8002390:	706d6a67 	.word	0x706d6a67
        case HMC939_Atten_31dB_num   : ret = TableName.Atten_Table_31dB_Value   ;break;
 8002394:	f89d 0009 	ldrb.w	r0, [sp, #9]
}
 8002398:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 800239c:	b004      	add	sp, #16
 800239e:	4770      	bx	lr
        case HMC939_Atten_30dB_num   : ret = TableName.Atten_Table_30dB_Value   ;break;
 80023a0:	f89d 000b 	ldrb.w	r0, [sp, #11]
 80023a4:	e7f8      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_29dB_num   : ret = TableName.Atten_Table_29dB_Value   ;break;
 80023a6:	f89d 000d 	ldrb.w	r0, [sp, #13]
 80023aa:	e7f5      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_28dB_num   : ret = TableName.Atten_Table_28dB_Value   ;break;
 80023ac:	f89d 000f 	ldrb.w	r0, [sp, #15]
 80023b0:	e7f2      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_27dB_num   : ret = TableName.Atten_Table_27dB_Value   ;break;
 80023b2:	f89d 0011 	ldrb.w	r0, [sp, #17]
 80023b6:	e7ef      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_26dB_num   : ret = TableName.Atten_Table_26dB_Value   ;break;
 80023b8:	f89d 0013 	ldrb.w	r0, [sp, #19]
 80023bc:	e7ec      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_25dB_num   : ret = TableName.Atten_Table_25dB_Value   ;break;
 80023be:	f89d 0015 	ldrb.w	r0, [sp, #21]
 80023c2:	e7e9      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_24dB_num   : ret = TableName.Atten_Table_24dB_Value   ;break;
 80023c4:	f89d 0017 	ldrb.w	r0, [sp, #23]
 80023c8:	e7e6      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_23dB_num   : ret = TableName.Atten_Table_23dB_Value   ;break;
 80023ca:	f89d 0019 	ldrb.w	r0, [sp, #25]
 80023ce:	e7e3      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_22dB_num   : ret = TableName.Atten_Table_22dB_Value   ;break;
 80023d0:	f89d 001b 	ldrb.w	r0, [sp, #27]
 80023d4:	e7e0      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_21dB_num   : ret = TableName.Atten_Table_21dB_Value   ;break;
 80023d6:	f89d 001d 	ldrb.w	r0, [sp, #29]
 80023da:	e7dd      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_20dB_num   : ret = TableName.Atten_Table_20dB_Value   ;break;
 80023dc:	f89d 001f 	ldrb.w	r0, [sp, #31]
 80023e0:	e7da      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_19dB_num   : ret = TableName.Atten_Table_19dB_Value   ;break;
 80023e2:	f89d 0021 	ldrb.w	r0, [sp, #33]	; 0x21
 80023e6:	e7d7      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_18dB_num   : ret = TableName.Atten_Table_18dB_Value   ;break;
 80023e8:	f89d 0023 	ldrb.w	r0, [sp, #35]	; 0x23
 80023ec:	e7d4      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_17dB_num   : ret = TableName.Atten_Table_17dB_Value   ;break;
 80023ee:	f89d 0025 	ldrb.w	r0, [sp, #37]	; 0x25
 80023f2:	e7d1      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_16dB_num   : ret = TableName.Atten_Table_16dB_Value   ;break;
 80023f4:	f89d 0027 	ldrb.w	r0, [sp, #39]	; 0x27
 80023f8:	e7ce      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_15dB_num   : ret = TableName.Atten_Table_15dB_Value   ;break;
 80023fa:	f89d 0029 	ldrb.w	r0, [sp, #41]	; 0x29
 80023fe:	e7cb      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_14dB_num   : ret = TableName.Atten_Table_14dB_Value   ;break;
 8002400:	f89d 002b 	ldrb.w	r0, [sp, #43]	; 0x2b
 8002404:	e7c8      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_13dB_num   : ret = TableName.Atten_Table_13dB_Value   ;break;
 8002406:	f89d 002d 	ldrb.w	r0, [sp, #45]	; 0x2d
 800240a:	e7c5      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_12dB_num   : ret = TableName.Atten_Table_12dB_Value   ;break;
 800240c:	f89d 002f 	ldrb.w	r0, [sp, #47]	; 0x2f
 8002410:	e7c2      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_11dB_num   : ret = TableName.Atten_Table_11dB_Value   ;break;
 8002412:	f89d 0031 	ldrb.w	r0, [sp, #49]	; 0x31
 8002416:	e7bf      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_10dB_num   : ret = TableName.Atten_Table_10dB_Value   ;break;
 8002418:	f89d 0033 	ldrb.w	r0, [sp, #51]	; 0x33
 800241c:	e7bc      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_9dB_num    : ret = TableName.Atten_Table_9dB_Value    ;break;
 800241e:	f89d 0035 	ldrb.w	r0, [sp, #53]	; 0x35
 8002422:	e7b9      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_8dB_num    : ret = TableName.Atten_Table_8dB_Value    ;break;
 8002424:	f89d 0037 	ldrb.w	r0, [sp, #55]	; 0x37
 8002428:	e7b6      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_7dB_num    : ret = TableName.Atten_Table_7dB_Value    ;break;
 800242a:	f89d 0039 	ldrb.w	r0, [sp, #57]	; 0x39
 800242e:	e7b3      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_6dB_num    : ret = TableName.Atten_Table_6dB_Value    ;break;
 8002430:	f89d 003b 	ldrb.w	r0, [sp, #59]	; 0x3b
 8002434:	e7b0      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_5dB_num    : ret = TableName.Atten_Table_5dB_Value    ;break;
 8002436:	f89d 003d 	ldrb.w	r0, [sp, #61]	; 0x3d
 800243a:	e7ad      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_4dB_num    : ret = TableName.Atten_Table_4dB_Value    ;break;
 800243c:	f89d 003f 	ldrb.w	r0, [sp, #63]	; 0x3f
 8002440:	e7aa      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_3dB_num    : ret = TableName.Atten_Table_3dB_Value    ;break;
 8002442:	f89d 0041 	ldrb.w	r0, [sp, #65]	; 0x41
 8002446:	e7a7      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_2dB_num    : ret = TableName.Atten_Table_2dB_Value    ;break;
 8002448:	f89d 0043 	ldrb.w	r0, [sp, #67]	; 0x43
 800244c:	e7a4      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_1dB_num    : ret = TableName.Atten_Table_1dB_Value    ;break;
 800244e:	f89d 0045 	ldrb.w	r0, [sp, #69]	; 0x45
 8002452:	e7a1      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        case HMC939_Atten_0dB_num    : ret = TableName.Atten_Table_0dB_Value    ;break;
 8002454:	f89d 0047 	ldrb.w	r0, [sp, #71]	; 0x47
 8002458:	e79e      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
        default : printf("Critical Error\r\n");
 800245a:	4802      	ldr	r0, [pc, #8]	; (8002464 <Atten_Offset_HMC939+0x108>)
 800245c:	f002 fe90 	bl	8005180 <puts>
    uint8_t ret = 0;
 8002460:	2000      	movs	r0, #0
 8002462:	e799      	b.n	8002398 <Atten_Offset_HMC939+0x3c>
 8002464:	08006168 	.word	0x08006168

08002468 <Atten_Operate>:
void Atten_Operate(uint8_t* data){
 8002468:	b5f0      	push	{r4, r5, r6, r7, lr}
    switch(Temp_Type){
 800246a:	7843      	ldrb	r3, [r0, #1]
void Atten_Operate(uint8_t* data){
 800246c:	b08f      	sub	sp, #60	; 0x3c
 800246e:	4604      	mov	r4, r0
    switch(Temp_Type){
 8002470:	2b6c      	cmp	r3, #108	; 0x6c
 8002472:	f200 8343 	bhi.w	8002afc <Atten_Operate+0x694>
 8002476:	e8df f013 	tbh	[pc, r3, lsl #1]
 800247a:	006d      	.short	0x006d
 800247c:	00920092 	.word	0x00920092
 8002480:	00a50092 	.word	0x00a50092
 8002484:	00a500a5 	.word	0x00a500a5
 8002488:	009200a5 	.word	0x009200a5
 800248c:	00920092 	.word	0x00920092
 8002490:	00a500a5 	.word	0x00a500a5
 8002494:	00a500a5 	.word	0x00a500a5
 8002498:	00b30341 	.word	0x00b30341
 800249c:	00d400c6 	.word	0x00d400c6
 80024a0:	00f000e2 	.word	0x00f000e2
 80024a4:	010e00ff 	.word	0x010e00ff
 80024a8:	012c011d 	.word	0x012c011d
 80024ac:	014a013b 	.word	0x014a013b
 80024b0:	03410341 	.word	0x03410341
 80024b4:	01590341 	.word	0x01590341
 80024b8:	01770168 	.word	0x01770168
 80024bc:	01950186 	.word	0x01950186
 80024c0:	01b301a4 	.word	0x01b301a4
 80024c4:	01d101c2 	.word	0x01d101c2
 80024c8:	01ef01e0 	.word	0x01ef01e0
 80024cc:	021301fe 	.word	0x021301fe
 80024d0:	02310222 	.word	0x02310222
 80024d4:	024f0240 	.word	0x024f0240
 80024d8:	026d025e 	.word	0x026d025e
 80024dc:	028b027c 	.word	0x028b027c
 80024e0:	02a9029a 	.word	0x02a9029a
 80024e4:	02c602b8 	.word	0x02c602b8
 80024e8:	02e202d4 	.word	0x02e202d4
 80024ec:	02fe02f0 	.word	0x02fe02f0
 80024f0:	031a030c 	.word	0x031a030c
 80024f4:	03410341 	.word	0x03410341
 80024f8:	03280341 	.word	0x03280341
 80024fc:	03590343 	.word	0x03590343
 8002500:	0385036f 	.word	0x0385036f
 8002504:	03bf039b 	.word	0x03bf039b
 8002508:	03eb03d5 	.word	0x03eb03d5
 800250c:	04170401 	.word	0x04170401
 8002510:	03410341 	.word	0x03410341
 8002514:	042d0341 	.word	0x042d0341
 8002518:	04590443 	.word	0x04590443
 800251c:	0485046f 	.word	0x0485046f
 8002520:	04b1049b 	.word	0x04b1049b
 8002524:	04dd04c7 	.word	0x04dd04c7
 8002528:	050904f3 	.word	0x050904f3
 800252c:	0535051f 	.word	0x0535051f
 8002530:	0585056f 	.word	0x0585056f
 8002534:	05b1059b 	.word	0x05b1059b
 8002538:	05dd05c7 	.word	0x05dd05c7
 800253c:	060905f3 	.word	0x060905f3
 8002540:	0635061f 	.word	0x0635061f
 8002544:	0661064b 	.word	0x0661064b
 8002548:	068d0677 	.word	0x068d0677
 800254c:	06b906a3 	.word	0x06b906a3
 8002550:	06e506cf 	.word	0x06e506cf
            data[Bluecell_STX] = 0xBE;
 8002554:	23be      	movs	r3, #190	; 0xbe
 8002556:	7003      	strb	r3, [r0, #0]
            data[Bluecell_Type]   = ATT_AB_CH_Read;
 8002558:	2300      	movs	r3, #0
 800255a:	7043      	strb	r3, [r0, #1]
            memcpy(&data[Bluecell_DATA],&Atten_Setting.ATT_A_CH_150M,42);
 800255c:	4bcd      	ldr	r3, [pc, #820]	; (8002894 <Atten_Operate+0x42c>)
 800255e:	1cc2      	adds	r2, r0, #3
 8002560:	f103 0128 	add.w	r1, r3, #40	; 0x28
 8002564:	f853 0b04 	ldr.w	r0, [r3], #4
 8002568:	428b      	cmp	r3, r1
 800256a:	f842 0b04 	str.w	r0, [r2], #4
 800256e:	d1f9      	bne.n	8002564 <Atten_Operate+0xfc>
 8002570:	881b      	ldrh	r3, [r3, #0]
            data[data[Bluecell_Length] + 3] = STH30_CreateCrc(&data[Bluecell_Type],data[Bluecell_Length]+2);
 8002572:	1c60      	adds	r0, r4, #1
            memcpy(&data[Bluecell_DATA],&Atten_Setting.ATT_A_CH_150M,42);
 8002574:	8013      	strh	r3, [r2, #0]
            data[data[Bluecell_Length] + 3] = STH30_CreateCrc(&data[Bluecell_Type],data[Bluecell_Length]+2);
 8002576:	78a1      	ldrb	r1, [r4, #2]
 8002578:	1ccd      	adds	r5, r1, #3
 800257a:	3102      	adds	r1, #2
 800257c:	b2c9      	uxtb	r1, r1
 800257e:	f002 fc03 	bl	8004d88 <STH30_CreateCrc>
            data[data[Bluecell_Length] + 4] = 0xEB;
 8002582:	22eb      	movs	r2, #235	; 0xeb
            data[data[Bluecell_Length] + 3] = STH30_CreateCrc(&data[Bluecell_Type],data[Bluecell_Length]+2);
 8002584:	5560      	strb	r0, [r4, r5]
            Uart_Data_Send(data,data[Bluecell_Length] +5);break;
 8002586:	4620      	mov	r0, r4
            data[data[Bluecell_Length] + 4] = 0xEB;
 8002588:	78a3      	ldrb	r3, [r4, #2]
 800258a:	4423      	add	r3, r4
 800258c:	711a      	strb	r2, [r3, #4]
            Uart_Data_Send(data,data[Bluecell_Length] +5);break;
 800258e:	78a1      	ldrb	r1, [r4, #2]
 8002590:	3105      	adds	r1, #5
 8002592:	b2c9      	uxtb	r1, r1
}
 8002594:	b00f      	add	sp, #60	; 0x3c
 8002596:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
            Uart_Data_Send(data,data[Bluecell_Length] +5);break;
 800259a:	f7ff bcc1 	b.w	8001f20 <Uart_Data_Send>
            QPC6614_atten_ctrl(data[Bluecell_DATA    ],0);
 800259e:	2100      	movs	r1, #0
 80025a0:	78c0      	ldrb	r0, [r0, #3]
 80025a2:	f7ff fbcf 	bl	8001d44 <QPC6614_atten_ctrl>
            QPC6614_atten_ctrl(data[Bluecell_DATA + 1],1);
 80025a6:	7920      	ldrb	r0, [r4, #4]
 80025a8:	2101      	movs	r1, #1
 80025aa:	f7ff fbcb 	bl	8001d44 <QPC6614_atten_ctrl>
            QPC6614_atten_ctrl(data[Bluecell_DATA + 2],2);
 80025ae:	7960      	ldrb	r0, [r4, #5]
 80025b0:	2102      	movs	r1, #2
 80025b2:	f7ff fbc7 	bl	8001d44 <QPC6614_atten_ctrl>
            QPC6614_atten_ctrl(data[Bluecell_DATA + 3],3);
 80025b6:	2103      	movs	r1, #3
 80025b8:	79a0      	ldrb	r0, [r4, #6]
}
 80025ba:	b00f      	add	sp, #60	; 0x3c
 80025bc:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
            QPC6614_atten_ctrl(data[Bluecell_DATA + 3],3);
 80025c0:	f7ff bbc0 	b.w	8001d44 <QPC6614_atten_ctrl>
            HMC939_atten_ctrl(data[Bluecell_DATA      ],0);
 80025c4:	2100      	movs	r1, #0
 80025c6:	78c0      	ldrb	r0, [r0, #3]
 80025c8:	f7ff fc58 	bl	8001e7c <HMC939_atten_ctrl>
            HMC939_atten_ctrl(data[Bluecell_DATA   + 1],1);
 80025cc:	7920      	ldrb	r0, [r4, #4]
 80025ce:	2101      	movs	r1, #1
 80025d0:	f7ff fc54 	bl	8001e7c <HMC939_atten_ctrl>
            ADRF5720_atten_ctrl(data[Bluecell_DATA + 2]);
 80025d4:	7960      	ldrb	r0, [r4, #5]
}
 80025d6:	b00f      	add	sp, #60	; 0x3c
 80025d8:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
            ADRF5720_atten_ctrl(data[Bluecell_DATA + 2]);
 80025dc:	f7ff bbfc 	b.w	8001dd8 <ADRF5720_atten_ctrl>
		case ATT_A_EN_150M			    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_150M			,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__);break;
 80025e0:	2340      	movs	r3, #64	; 0x40
 80025e2:	1cc2      	adds	r2, r0, #3
 80025e4:	2100      	movs	r1, #0
 80025e6:	20a0      	movs	r0, #160	; 0xa0
 80025e8:	f002 f822 	bl	8004630 <EEPROM_IM24CM01P_write>
 80025ec:	4baa      	ldr	r3, [pc, #680]	; (8002898 <Atten_Operate+0x430>)
 80025ee:	781b      	ldrb	r3, [r3, #0]
 80025f0:	2b01      	cmp	r3, #1
 80025f2:	f040 8283 	bne.w	8002afc <Atten_Operate+0x694>
 80025f6:	f240 213e 	movw	r1, #574	; 0x23e
		case ATT_B_EN_30G3_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80025fa:	48a8      	ldr	r0, [pc, #672]	; (800289c <Atten_Operate+0x434>)
}
 80025fc:	b00f      	add	sp, #60	; 0x3c
 80025fe:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
		case ATT_B_EN_30G3_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002602:	f002 bd49 	b.w	8005098 <iprintf>
		case ATT_A_EN_WIFI1_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI1_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002606:	2340      	movs	r3, #64	; 0x40
 8002608:	1cc2      	adds	r2, r0, #3
 800260a:	4619      	mov	r1, r3
 800260c:	20a0      	movs	r0, #160	; 0xa0
 800260e:	f002 f80f 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002612:	4ba1      	ldr	r3, [pc, #644]	; (8002898 <Atten_Operate+0x430>)
 8002614:	781b      	ldrb	r3, [r3, #0]
 8002616:	2b01      	cmp	r3, #1
 8002618:	f040 8270 	bne.w	8002afc <Atten_Operate+0x694>
 800261c:	f240 213f 	movw	r1, #575	; 0x23f
 8002620:	e7eb      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_WIFI2_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI2_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002622:	2340      	movs	r3, #64	; 0x40
 8002624:	1cc2      	adds	r2, r0, #3
 8002626:	2180      	movs	r1, #128	; 0x80
 8002628:	20a0      	movs	r0, #160	; 0xa0
 800262a:	f002 f801 	bl	8004630 <EEPROM_IM24CM01P_write>
 800262e:	4b9a      	ldr	r3, [pc, #616]	; (8002898 <Atten_Operate+0x430>)
 8002630:	781b      	ldrb	r3, [r3, #0]
 8002632:	2b01      	cmp	r3, #1
 8002634:	f040 8262 	bne.w	8002afc <Atten_Operate+0x694>
 8002638:	f44f 7110 	mov.w	r1, #576	; 0x240
 800263c:	e7dd      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_WIFI3_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI3_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 800263e:	2340      	movs	r3, #64	; 0x40
 8002640:	1cc2      	adds	r2, r0, #3
 8002642:	21c0      	movs	r1, #192	; 0xc0
 8002644:	20a0      	movs	r0, #160	; 0xa0
 8002646:	f001 fff3 	bl	8004630 <EEPROM_IM24CM01P_write>
 800264a:	4b93      	ldr	r3, [pc, #588]	; (8002898 <Atten_Operate+0x430>)
 800264c:	781b      	ldrb	r3, [r3, #0]
 800264e:	2b01      	cmp	r3, #1
 8002650:	f040 8254 	bne.w	8002afc <Atten_Operate+0x694>
 8002654:	f240 2141 	movw	r1, #577	; 0x241
 8002658:	e7cf      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_WIFI4_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI4_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 800265a:	2340      	movs	r3, #64	; 0x40
 800265c:	1cc2      	adds	r2, r0, #3
 800265e:	f44f 7180 	mov.w	r1, #256	; 0x100
 8002662:	20a0      	movs	r0, #160	; 0xa0
 8002664:	f001 ffe4 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002668:	4b8b      	ldr	r3, [pc, #556]	; (8002898 <Atten_Operate+0x430>)
 800266a:	781b      	ldrb	r3, [r3, #0]
 800266c:	2b01      	cmp	r3, #1
 800266e:	f040 8245 	bne.w	8002afc <Atten_Operate+0x694>
 8002672:	f240 2142 	movw	r1, #578	; 0x242
 8002676:	e7c0      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_WIFI1_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI1_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002678:	2340      	movs	r3, #64	; 0x40
 800267a:	1cc2      	adds	r2, r0, #3
 800267c:	f44f 71a0 	mov.w	r1, #320	; 0x140
 8002680:	20a0      	movs	r0, #160	; 0xa0
 8002682:	f001 ffd5 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002686:	4b84      	ldr	r3, [pc, #528]	; (8002898 <Atten_Operate+0x430>)
 8002688:	781b      	ldrb	r3, [r3, #0]
 800268a:	2b01      	cmp	r3, #1
 800268c:	f040 8236 	bne.w	8002afc <Atten_Operate+0x694>
 8002690:	f240 2143 	movw	r1, #579	; 0x243
 8002694:	e7b1      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_WIFI2_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI2_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002696:	2340      	movs	r3, #64	; 0x40
 8002698:	1cc2      	adds	r2, r0, #3
 800269a:	f44f 71c0 	mov.w	r1, #384	; 0x180
 800269e:	20a0      	movs	r0, #160	; 0xa0
 80026a0:	f001 ffc6 	bl	8004630 <EEPROM_IM24CM01P_write>
 80026a4:	4b7c      	ldr	r3, [pc, #496]	; (8002898 <Atten_Operate+0x430>)
 80026a6:	781b      	ldrb	r3, [r3, #0]
 80026a8:	2b01      	cmp	r3, #1
 80026aa:	f040 8227 	bne.w	8002afc <Atten_Operate+0x694>
 80026ae:	f44f 7111 	mov.w	r1, #580	; 0x244
 80026b2:	e7a2      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_WIFI3_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI3_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80026b4:	2340      	movs	r3, #64	; 0x40
 80026b6:	1cc2      	adds	r2, r0, #3
 80026b8:	f44f 71e0 	mov.w	r1, #448	; 0x1c0
 80026bc:	20a0      	movs	r0, #160	; 0xa0
 80026be:	f001 ffb7 	bl	8004630 <EEPROM_IM24CM01P_write>
 80026c2:	4b75      	ldr	r3, [pc, #468]	; (8002898 <Atten_Operate+0x430>)
 80026c4:	781b      	ldrb	r3, [r3, #0]
 80026c6:	2b01      	cmp	r3, #1
 80026c8:	f040 8218 	bne.w	8002afc <Atten_Operate+0x694>
 80026cc:	f240 2145 	movw	r1, #581	; 0x245
 80026d0:	e793      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_WIFI4_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI4_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80026d2:	2340      	movs	r3, #64	; 0x40
 80026d4:	1cc2      	adds	r2, r0, #3
 80026d6:	f44f 7100 	mov.w	r1, #512	; 0x200
 80026da:	20a0      	movs	r0, #160	; 0xa0
 80026dc:	f001 ffa8 	bl	8004630 <EEPROM_IM24CM01P_write>
 80026e0:	4b6d      	ldr	r3, [pc, #436]	; (8002898 <Atten_Operate+0x430>)
 80026e2:	781b      	ldrb	r3, [r3, #0]
 80026e4:	2b01      	cmp	r3, #1
 80026e6:	f040 8209 	bne.w	8002afc <Atten_Operate+0x694>
 80026ea:	f240 2146 	movw	r1, #582	; 0x246
 80026ee:	e784      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G1_28_28_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_28_28_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80026f0:	2340      	movs	r3, #64	; 0x40
 80026f2:	1cc2      	adds	r2, r0, #3
 80026f4:	f44f 7110 	mov.w	r1, #576	; 0x240
 80026f8:	20a0      	movs	r0, #160	; 0xa0
 80026fa:	f001 ff99 	bl	8004630 <EEPROM_IM24CM01P_write>
 80026fe:	4b66      	ldr	r3, [pc, #408]	; (8002898 <Atten_Operate+0x430>)
 8002700:	781b      	ldrb	r3, [r3, #0]
 8002702:	2b01      	cmp	r3, #1
 8002704:	f040 81fa 	bne.w	8002afc <Atten_Operate+0x694>
 8002708:	f240 2147 	movw	r1, #583	; 0x247
 800270c:	e775      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G2_28_28_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_28_28_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 800270e:	2340      	movs	r3, #64	; 0x40
 8002710:	1cc2      	adds	r2, r0, #3
 8002712:	f44f 7120 	mov.w	r1, #640	; 0x280
 8002716:	20a0      	movs	r0, #160	; 0xa0
 8002718:	f001 ff8a 	bl	8004630 <EEPROM_IM24CM01P_write>
 800271c:	4b5e      	ldr	r3, [pc, #376]	; (8002898 <Atten_Operate+0x430>)
 800271e:	781b      	ldrb	r3, [r3, #0]
 8002720:	2b01      	cmp	r3, #1
 8002722:	f040 81eb 	bne.w	8002afc <Atten_Operate+0x694>
 8002726:	f44f 7112 	mov.w	r1, #584	; 0x248
 800272a:	e766      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G3_28_28_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_28_28_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 800272c:	2340      	movs	r3, #64	; 0x40
 800272e:	1cc2      	adds	r2, r0, #3
 8002730:	f44f 7130 	mov.w	r1, #704	; 0x2c0
 8002734:	20a0      	movs	r0, #160	; 0xa0
 8002736:	f001 ff7b 	bl	8004630 <EEPROM_IM24CM01P_write>
 800273a:	4b57      	ldr	r3, [pc, #348]	; (8002898 <Atten_Operate+0x430>)
 800273c:	781b      	ldrb	r3, [r3, #0]
 800273e:	2b01      	cmp	r3, #1
 8002740:	f040 81dc 	bne.w	8002afc <Atten_Operate+0x694>
 8002744:	f240 2149 	movw	r1, #585	; 0x249
 8002748:	e757      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G1_28_5_29Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_28_5_29Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 800274a:	2340      	movs	r3, #64	; 0x40
 800274c:	1cc2      	adds	r2, r0, #3
 800274e:	f44f 7140 	mov.w	r1, #768	; 0x300
 8002752:	20a0      	movs	r0, #160	; 0xa0
 8002754:	f001 ff6c 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002758:	4b4f      	ldr	r3, [pc, #316]	; (8002898 <Atten_Operate+0x430>)
 800275a:	781b      	ldrb	r3, [r3, #0]
 800275c:	2b01      	cmp	r3, #1
 800275e:	f040 81cd 	bne.w	8002afc <Atten_Operate+0x694>
 8002762:	f240 214a 	movw	r1, #586	; 0x24a
 8002766:	e748      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G2_28_5_29Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_28_5_29Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002768:	2340      	movs	r3, #64	; 0x40
 800276a:	1cc2      	adds	r2, r0, #3
 800276c:	f44f 7150 	mov.w	r1, #832	; 0x340
 8002770:	20a0      	movs	r0, #160	; 0xa0
 8002772:	f001 ff5d 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002776:	4b48      	ldr	r3, [pc, #288]	; (8002898 <Atten_Operate+0x430>)
 8002778:	781b      	ldrb	r3, [r3, #0]
 800277a:	2b01      	cmp	r3, #1
 800277c:	f040 81be 	bne.w	8002afc <Atten_Operate+0x694>
 8002780:	f240 214b 	movw	r1, #587	; 0x24b
 8002784:	e739      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G3_28_5_29Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_28_5_29Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002786:	2340      	movs	r3, #64	; 0x40
 8002788:	1cc2      	adds	r2, r0, #3
 800278a:	f44f 7160 	mov.w	r1, #896	; 0x380
 800278e:	20a0      	movs	r0, #160	; 0xa0
 8002790:	f001 ff4e 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002794:	4b40      	ldr	r3, [pc, #256]	; (8002898 <Atten_Operate+0x430>)
 8002796:	781b      	ldrb	r3, [r3, #0]
 8002798:	2b01      	cmp	r3, #1
 800279a:	f040 81af 	bne.w	8002afc <Atten_Operate+0x694>
 800279e:	f44f 7113 	mov.w	r1, #588	; 0x24c
 80027a2:	e72a      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G1_29_29_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_29_29_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80027a4:	2340      	movs	r3, #64	; 0x40
 80027a6:	1cc2      	adds	r2, r0, #3
 80027a8:	f44f 7170 	mov.w	r1, #960	; 0x3c0
 80027ac:	20a0      	movs	r0, #160	; 0xa0
 80027ae:	f001 ff3f 	bl	8004630 <EEPROM_IM24CM01P_write>
 80027b2:	4b39      	ldr	r3, [pc, #228]	; (8002898 <Atten_Operate+0x430>)
 80027b4:	781b      	ldrb	r3, [r3, #0]
 80027b6:	2b01      	cmp	r3, #1
 80027b8:	f040 81a0 	bne.w	8002afc <Atten_Operate+0x694>
 80027bc:	f240 214d 	movw	r1, #589	; 0x24d
 80027c0:	e71b      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G2_29_29_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_29_29_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80027c2:	2340      	movs	r3, #64	; 0x40
 80027c4:	1cc2      	adds	r2, r0, #3
 80027c6:	f44f 6180 	mov.w	r1, #1024	; 0x400
 80027ca:	20a0      	movs	r0, #160	; 0xa0
 80027cc:	f001 ff30 	bl	8004630 <EEPROM_IM24CM01P_write>
 80027d0:	4b31      	ldr	r3, [pc, #196]	; (8002898 <Atten_Operate+0x430>)
 80027d2:	781b      	ldrb	r3, [r3, #0]
 80027d4:	2b01      	cmp	r3, #1
 80027d6:	f040 8191 	bne.w	8002afc <Atten_Operate+0x694>
 80027da:	f240 214e 	movw	r1, #590	; 0x24e
 80027de:	e70c      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G3_29_29_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_29_29_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80027e0:	2340      	movs	r3, #64	; 0x40
 80027e2:	1cc2      	adds	r2, r0, #3
 80027e4:	f44f 6188 	mov.w	r1, #1088	; 0x440
 80027e8:	20a0      	movs	r0, #160	; 0xa0
 80027ea:	f001 ff21 	bl	8004630 <EEPROM_IM24CM01P_write>
 80027ee:	4b2a      	ldr	r3, [pc, #168]	; (8002898 <Atten_Operate+0x430>)
 80027f0:	781b      	ldrb	r3, [r3, #0]
 80027f2:	2b01      	cmp	r3, #1
 80027f4:	f040 8182 	bne.w	8002afc <Atten_Operate+0x694>
 80027f8:	f240 214f 	movw	r1, #591	; 0x24f
 80027fc:	e6fd      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G1_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80027fe:	2340      	movs	r3, #64	; 0x40
 8002800:	1cc2      	adds	r2, r0, #3
 8002802:	f44f 6190 	mov.w	r1, #1152	; 0x480
 8002806:	20a0      	movs	r0, #160	; 0xa0
 8002808:	f001 ff12 	bl	8004630 <EEPROM_IM24CM01P_write>
 800280c:	4b22      	ldr	r3, [pc, #136]	; (8002898 <Atten_Operate+0x430>)
 800280e:	781b      	ldrb	r3, [r3, #0]
 8002810:	2b01      	cmp	r3, #1
 8002812:	f040 8173 	bne.w	8002afc <Atten_Operate+0x694>
 8002816:	f44f 7114 	mov.w	r1, #592	; 0x250
 800281a:	e6ee      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G2_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 800281c:	2340      	movs	r3, #64	; 0x40
 800281e:	1cc2      	adds	r2, r0, #3
 8002820:	f44f 6198 	mov.w	r1, #1216	; 0x4c0
 8002824:	20a0      	movs	r0, #160	; 0xa0
 8002826:	f001 ff03 	bl	8004630 <EEPROM_IM24CM01P_write>
 800282a:	4b1b      	ldr	r3, [pc, #108]	; (8002898 <Atten_Operate+0x430>)
 800282c:	781b      	ldrb	r3, [r3, #0]
 800282e:	2b01      	cmp	r3, #1
 8002830:	f040 8164 	bne.w	8002afc <Atten_Operate+0x694>
 8002834:	f240 2151 	movw	r1, #593	; 0x251
 8002838:	e6df      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_30G3_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 800283a:	2340      	movs	r3, #64	; 0x40
 800283c:	1cc2      	adds	r2, r0, #3
 800283e:	f44f 61a0 	mov.w	r1, #1280	; 0x500
 8002842:	20a0      	movs	r0, #160	; 0xa0
 8002844:	f001 fef4 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002848:	4b13      	ldr	r3, [pc, #76]	; (8002898 <Atten_Operate+0x430>)
 800284a:	781b      	ldrb	r3, [r3, #0]
 800284c:	2b01      	cmp	r3, #1
 800284e:	f040 8155 	bne.w	8002afc <Atten_Operate+0x694>
 8002852:	f240 2152 	movw	r1, #594	; 0x252
 8002856:	e6d0      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_150M			    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_150M			,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002858:	2340      	movs	r3, #64	; 0x40
 800285a:	1cc2      	adds	r2, r0, #3
 800285c:	f44f 61a8 	mov.w	r1, #1344	; 0x540
 8002860:	20a0      	movs	r0, #160	; 0xa0
 8002862:	f001 fee5 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002866:	4b0c      	ldr	r3, [pc, #48]	; (8002898 <Atten_Operate+0x430>)
 8002868:	781b      	ldrb	r3, [r3, #0]
 800286a:	2b01      	cmp	r3, #1
 800286c:	f040 8146 	bne.w	8002afc <Atten_Operate+0x694>
 8002870:	f240 2153 	movw	r1, #595	; 0x253
 8002874:	e6c1      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_WIFI1_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI1_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002876:	2340      	movs	r3, #64	; 0x40
 8002878:	1cc2      	adds	r2, r0, #3
 800287a:	f44f 61b0 	mov.w	r1, #1408	; 0x580
 800287e:	20a0      	movs	r0, #160	; 0xa0
 8002880:	f001 fed6 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002884:	4b04      	ldr	r3, [pc, #16]	; (8002898 <Atten_Operate+0x430>)
 8002886:	781b      	ldrb	r3, [r3, #0]
 8002888:	2b01      	cmp	r3, #1
 800288a:	f040 8137 	bne.w	8002afc <Atten_Operate+0x694>
 800288e:	f44f 7115 	mov.w	r1, #596	; 0x254
 8002892:	e6b2      	b.n	80025fa <Atten_Operate+0x192>
 8002894:	20000766 	.word	0x20000766
 8002898:	20000084 	.word	0x20000084
 800289c:	08006178 	.word	0x08006178
		case ATT_B_EN_WIFI2_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI2_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80028a0:	2340      	movs	r3, #64	; 0x40
 80028a2:	1cc2      	adds	r2, r0, #3
 80028a4:	f44f 61b8 	mov.w	r1, #1472	; 0x5c0
 80028a8:	20a0      	movs	r0, #160	; 0xa0
 80028aa:	f001 fec1 	bl	8004630 <EEPROM_IM24CM01P_write>
 80028ae:	4bcb      	ldr	r3, [pc, #812]	; (8002bdc <Atten_Operate+0x774>)
 80028b0:	781b      	ldrb	r3, [r3, #0]
 80028b2:	2b01      	cmp	r3, #1
 80028b4:	f040 8122 	bne.w	8002afc <Atten_Operate+0x694>
 80028b8:	f240 2155 	movw	r1, #597	; 0x255
 80028bc:	e69d      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_WIFI3_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI3_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80028be:	2340      	movs	r3, #64	; 0x40
 80028c0:	1cc2      	adds	r2, r0, #3
 80028c2:	f44f 61c0 	mov.w	r1, #1536	; 0x600
 80028c6:	20a0      	movs	r0, #160	; 0xa0
 80028c8:	f001 feb2 	bl	8004630 <EEPROM_IM24CM01P_write>
 80028cc:	4bc3      	ldr	r3, [pc, #780]	; (8002bdc <Atten_Operate+0x774>)
 80028ce:	781b      	ldrb	r3, [r3, #0]
 80028d0:	2b01      	cmp	r3, #1
 80028d2:	f040 8113 	bne.w	8002afc <Atten_Operate+0x694>
 80028d6:	f240 2156 	movw	r1, #598	; 0x256
 80028da:	e68e      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_WIFI4_2_4Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI4_2_4Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80028dc:	2340      	movs	r3, #64	; 0x40
 80028de:	1cc2      	adds	r2, r0, #3
 80028e0:	f44f 61c8 	mov.w	r1, #1600	; 0x640
 80028e4:	20a0      	movs	r0, #160	; 0xa0
 80028e6:	f001 fea3 	bl	8004630 <EEPROM_IM24CM01P_write>
 80028ea:	4bbc      	ldr	r3, [pc, #752]	; (8002bdc <Atten_Operate+0x774>)
 80028ec:	781b      	ldrb	r3, [r3, #0]
 80028ee:	2b01      	cmp	r3, #1
 80028f0:	f040 8104 	bne.w	8002afc <Atten_Operate+0x694>
 80028f4:	f240 2157 	movw	r1, #599	; 0x257
 80028f8:	e67f      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_WIFI1_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI1_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80028fa:	2340      	movs	r3, #64	; 0x40
 80028fc:	1cc2      	adds	r2, r0, #3
 80028fe:	f44f 61d0 	mov.w	r1, #1664	; 0x680
 8002902:	20a0      	movs	r0, #160	; 0xa0
 8002904:	f001 fe94 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002908:	4bb4      	ldr	r3, [pc, #720]	; (8002bdc <Atten_Operate+0x774>)
 800290a:	781b      	ldrb	r3, [r3, #0]
 800290c:	2b01      	cmp	r3, #1
 800290e:	f040 80f5 	bne.w	8002afc <Atten_Operate+0x694>
 8002912:	f44f 7116 	mov.w	r1, #600	; 0x258
 8002916:	e670      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_WIFI2_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI2_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002918:	2340      	movs	r3, #64	; 0x40
 800291a:	1cc2      	adds	r2, r0, #3
 800291c:	f44f 61d8 	mov.w	r1, #1728	; 0x6c0
 8002920:	20a0      	movs	r0, #160	; 0xa0
 8002922:	f001 fe85 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002926:	4bad      	ldr	r3, [pc, #692]	; (8002bdc <Atten_Operate+0x774>)
 8002928:	781b      	ldrb	r3, [r3, #0]
 800292a:	2b01      	cmp	r3, #1
 800292c:	f040 80e6 	bne.w	8002afc <Atten_Operate+0x694>
 8002930:	f240 2159 	movw	r1, #601	; 0x259
 8002934:	e661      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_WIFI3_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI3_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002936:	2340      	movs	r3, #64	; 0x40
 8002938:	1cc2      	adds	r2, r0, #3
 800293a:	f44f 61e0 	mov.w	r1, #1792	; 0x700
 800293e:	20a0      	movs	r0, #160	; 0xa0
 8002940:	f001 fe76 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002944:	4ba5      	ldr	r3, [pc, #660]	; (8002bdc <Atten_Operate+0x774>)
 8002946:	781b      	ldrb	r3, [r3, #0]
 8002948:	2b01      	cmp	r3, #1
 800294a:	f040 80d7 	bne.w	8002afc <Atten_Operate+0x694>
 800294e:	f240 215a 	movw	r1, #602	; 0x25a
 8002952:	e652      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_WIFI4_5_8Ghz	    :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI4_5_8Ghz	,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002954:	2340      	movs	r3, #64	; 0x40
 8002956:	1cc2      	adds	r2, r0, #3
 8002958:	f44f 61e8 	mov.w	r1, #1856	; 0x740
 800295c:	20a0      	movs	r0, #160	; 0xa0
 800295e:	f001 fe67 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002962:	4b9e      	ldr	r3, [pc, #632]	; (8002bdc <Atten_Operate+0x774>)
 8002964:	781b      	ldrb	r3, [r3, #0]
 8002966:	2b01      	cmp	r3, #1
 8002968:	f040 80c8 	bne.w	8002afc <Atten_Operate+0x694>
 800296c:	f240 215b 	movw	r1, #603	; 0x25b
 8002970:	e643      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G1_28_28_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_28_28_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002972:	2340      	movs	r3, #64	; 0x40
 8002974:	1cc2      	adds	r2, r0, #3
 8002976:	f44f 61f0 	mov.w	r1, #1920	; 0x780
 800297a:	20a0      	movs	r0, #160	; 0xa0
 800297c:	f001 fe58 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002980:	4b96      	ldr	r3, [pc, #600]	; (8002bdc <Atten_Operate+0x774>)
 8002982:	781b      	ldrb	r3, [r3, #0]
 8002984:	2b01      	cmp	r3, #1
 8002986:	f040 80b9 	bne.w	8002afc <Atten_Operate+0x694>
 800298a:	f44f 7117 	mov.w	r1, #604	; 0x25c
 800298e:	e634      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G2_28_28_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_28_28_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002990:	2340      	movs	r3, #64	; 0x40
 8002992:	1cc2      	adds	r2, r0, #3
 8002994:	f44f 61f8 	mov.w	r1, #1984	; 0x7c0
 8002998:	20a0      	movs	r0, #160	; 0xa0
 800299a:	f001 fe49 	bl	8004630 <EEPROM_IM24CM01P_write>
 800299e:	4b8f      	ldr	r3, [pc, #572]	; (8002bdc <Atten_Operate+0x774>)
 80029a0:	781b      	ldrb	r3, [r3, #0]
 80029a2:	2b01      	cmp	r3, #1
 80029a4:	f040 80aa 	bne.w	8002afc <Atten_Operate+0x694>
 80029a8:	f240 215d 	movw	r1, #605	; 0x25d
 80029ac:	e625      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G3_28_28_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_28_28_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80029ae:	2340      	movs	r3, #64	; 0x40
 80029b0:	1cc2      	adds	r2, r0, #3
 80029b2:	f44f 6100 	mov.w	r1, #2048	; 0x800
 80029b6:	20a0      	movs	r0, #160	; 0xa0
 80029b8:	f001 fe3a 	bl	8004630 <EEPROM_IM24CM01P_write>
 80029bc:	4b87      	ldr	r3, [pc, #540]	; (8002bdc <Atten_Operate+0x774>)
 80029be:	781b      	ldrb	r3, [r3, #0]
 80029c0:	2b01      	cmp	r3, #1
 80029c2:	f040 809b 	bne.w	8002afc <Atten_Operate+0x694>
 80029c6:	f240 215e 	movw	r1, #606	; 0x25e
 80029ca:	e616      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G1_28_5_29Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_28_5_29Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80029cc:	2340      	movs	r3, #64	; 0x40
 80029ce:	1cc2      	adds	r2, r0, #3
 80029d0:	f44f 6104 	mov.w	r1, #2112	; 0x840
 80029d4:	20a0      	movs	r0, #160	; 0xa0
 80029d6:	f001 fe2b 	bl	8004630 <EEPROM_IM24CM01P_write>
 80029da:	4b80      	ldr	r3, [pc, #512]	; (8002bdc <Atten_Operate+0x774>)
 80029dc:	781b      	ldrb	r3, [r3, #0]
 80029de:	2b01      	cmp	r3, #1
 80029e0:	f040 808c 	bne.w	8002afc <Atten_Operate+0x694>
 80029e4:	f240 215f 	movw	r1, #607	; 0x25f
 80029e8:	e607      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G2_28_5_29Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_28_5_29Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 80029ea:	2340      	movs	r3, #64	; 0x40
 80029ec:	1cc2      	adds	r2, r0, #3
 80029ee:	f44f 6108 	mov.w	r1, #2176	; 0x880
 80029f2:	20a0      	movs	r0, #160	; 0xa0
 80029f4:	f001 fe1c 	bl	8004630 <EEPROM_IM24CM01P_write>
 80029f8:	4b78      	ldr	r3, [pc, #480]	; (8002bdc <Atten_Operate+0x774>)
 80029fa:	781b      	ldrb	r3, [r3, #0]
 80029fc:	2b01      	cmp	r3, #1
 80029fe:	d17d      	bne.n	8002afc <Atten_Operate+0x694>
 8002a00:	f44f 7118 	mov.w	r1, #608	; 0x260
 8002a04:	e5f9      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G3_28_5_29Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_28_5_29Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002a06:	2340      	movs	r3, #64	; 0x40
 8002a08:	1cc2      	adds	r2, r0, #3
 8002a0a:	f44f 610c 	mov.w	r1, #2240	; 0x8c0
 8002a0e:	20a0      	movs	r0, #160	; 0xa0
 8002a10:	f001 fe0e 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002a14:	4b71      	ldr	r3, [pc, #452]	; (8002bdc <Atten_Operate+0x774>)
 8002a16:	781b      	ldrb	r3, [r3, #0]
 8002a18:	2b01      	cmp	r3, #1
 8002a1a:	d16f      	bne.n	8002afc <Atten_Operate+0x694>
 8002a1c:	f240 2161 	movw	r1, #609	; 0x261
 8002a20:	e5eb      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G1_29_29_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_29_29_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002a22:	2340      	movs	r3, #64	; 0x40
 8002a24:	1cc2      	adds	r2, r0, #3
 8002a26:	f44f 6110 	mov.w	r1, #2304	; 0x900
 8002a2a:	20a0      	movs	r0, #160	; 0xa0
 8002a2c:	f001 fe00 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002a30:	4b6a      	ldr	r3, [pc, #424]	; (8002bdc <Atten_Operate+0x774>)
 8002a32:	781b      	ldrb	r3, [r3, #0]
 8002a34:	2b01      	cmp	r3, #1
 8002a36:	d161      	bne.n	8002afc <Atten_Operate+0x694>
 8002a38:	f240 2162 	movw	r1, #610	; 0x262
 8002a3c:	e5dd      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G2_29_29_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_29_29_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002a3e:	2340      	movs	r3, #64	; 0x40
 8002a40:	1cc2      	adds	r2, r0, #3
 8002a42:	f44f 6114 	mov.w	r1, #2368	; 0x940
 8002a46:	20a0      	movs	r0, #160	; 0xa0
 8002a48:	f001 fdf2 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002a4c:	4b63      	ldr	r3, [pc, #396]	; (8002bdc <Atten_Operate+0x774>)
 8002a4e:	781b      	ldrb	r3, [r3, #0]
 8002a50:	2b01      	cmp	r3, #1
 8002a52:	d153      	bne.n	8002afc <Atten_Operate+0x694>
 8002a54:	f240 2163 	movw	r1, #611	; 0x263
 8002a58:	e5cf      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G3_29_29_5Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_29_29_5Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002a5a:	2340      	movs	r3, #64	; 0x40
 8002a5c:	1cc2      	adds	r2, r0, #3
 8002a5e:	f44f 6118 	mov.w	r1, #2432	; 0x980
 8002a62:	20a0      	movs	r0, #160	; 0xa0
 8002a64:	f001 fde4 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002a68:	4b5c      	ldr	r3, [pc, #368]	; (8002bdc <Atten_Operate+0x774>)
 8002a6a:	781b      	ldrb	r3, [r3, #0]
 8002a6c:	2b01      	cmp	r3, #1
 8002a6e:	d145      	bne.n	8002afc <Atten_Operate+0x694>
 8002a70:	f44f 7119 	mov.w	r1, #612	; 0x264
 8002a74:	e5c1      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G1_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002a76:	2340      	movs	r3, #64	; 0x40
 8002a78:	1cc2      	adds	r2, r0, #3
 8002a7a:	f44f 611c 	mov.w	r1, #2496	; 0x9c0
 8002a7e:	20a0      	movs	r0, #160	; 0xa0
 8002a80:	f001 fdd6 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002a84:	4b55      	ldr	r3, [pc, #340]	; (8002bdc <Atten_Operate+0x774>)
 8002a86:	781b      	ldrb	r3, [r3, #0]
 8002a88:	2b01      	cmp	r3, #1
 8002a8a:	d137      	bne.n	8002afc <Atten_Operate+0x694>
 8002a8c:	f240 2165 	movw	r1, #613	; 0x265
 8002a90:	e5b3      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G2_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002a92:	2340      	movs	r3, #64	; 0x40
 8002a94:	1cc2      	adds	r2, r0, #3
 8002a96:	f44f 6120 	mov.w	r1, #2560	; 0xa00
 8002a9a:	20a0      	movs	r0, #160	; 0xa0
 8002a9c:	f001 fdc8 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002aa0:	4b4e      	ldr	r3, [pc, #312]	; (8002bdc <Atten_Operate+0x774>)
 8002aa2:	781b      	ldrb	r3, [r3, #0]
 8002aa4:	2b01      	cmp	r3, #1
 8002aa6:	d129      	bne.n	8002afc <Atten_Operate+0x694>
 8002aa8:	f240 2166 	movw	r1, #614	; 0x266
 8002aac:	e5a5      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_B_EN_30G3_29_5_30Ghz   :  EEPROM_IM24CM01P_write(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_29_5_30Ghz,&data[Bluecell_DATA] ,sizeof(Atten_Table_Value_t));if(printf_if == 1)printf("Line : %d\r\n",__LINE__); break;
 8002aae:	2340      	movs	r3, #64	; 0x40
 8002ab0:	1cc2      	adds	r2, r0, #3
 8002ab2:	f44f 6124 	mov.w	r1, #2624	; 0xa40
 8002ab6:	20a0      	movs	r0, #160	; 0xa0
 8002ab8:	f001 fdba 	bl	8004630 <EEPROM_IM24CM01P_write>
 8002abc:	4b47      	ldr	r3, [pc, #284]	; (8002bdc <Atten_Operate+0x774>)
 8002abe:	781b      	ldrb	r3, [r3, #0]
 8002ac0:	2b01      	cmp	r3, #1
 8002ac2:	d11b      	bne.n	8002afc <Atten_Operate+0x694>
 8002ac4:	f240 2167 	movw	r1, #615	; 0x267
 8002ac8:	e597      	b.n	80025fa <Atten_Operate+0x192>
		case ATT_A_EN_150M_R		    :   Atten_Table_Read(EEPROM_ATT_A_EN_150M			 ,ATT_A_EN_150M_Table			  ,&data[Bluecell_STX]);	break;
 8002aca:	466f      	mov	r7, sp
 8002acc:	4944      	ldr	r1, [pc, #272]	; (8002be0 <Atten_Operate+0x778>)
 8002ace:	900c      	str	r0, [sp, #48]	; 0x30
 8002ad0:	f8d1 c000 	ldr.w	ip, [r1]
 8002ad4:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002ad8:	688a      	ldr	r2, [r1, #8]
 8002ada:	68cb      	ldr	r3, [r1, #12]
 8002adc:	f101 0510 	add.w	r5, r1, #16
 8002ae0:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002ae4:	463e      	mov	r6, r7
 8002ae6:	6828      	ldr	r0, [r5, #0]
 8002ae8:	6869      	ldr	r1, [r5, #4]
 8002aea:	3508      	adds	r5, #8
 8002aec:	c603      	stmia	r6!, {r0, r1}
 8002aee:	42a5      	cmp	r5, r4
 8002af0:	4637      	mov	r7, r6
 8002af2:	d1f7      	bne.n	8002ae4 <Atten_Operate+0x67c>
		case ATT_B_EN_30G3_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G3_29_5_30Ghz,ATT_B_EN_30G3_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
 8002af4:	4660      	mov	r0, ip
 8002af6:	4671      	mov	r1, lr
 8002af8:	f7ff fa1a 	bl	8001f30 <Atten_Table_Read.constprop.0>
}
 8002afc:	b00f      	add	sp, #60	; 0x3c
 8002afe:	bdf0      	pop	{r4, r5, r6, r7, pc}
		case ATT_A_EN_WIFI1_2_4Ghz_R    :   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI1_2_4Ghz	 ,ATT_A_EN_WIFI1_2_4Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002b00:	466f      	mov	r7, sp
 8002b02:	4938      	ldr	r1, [pc, #224]	; (8002be4 <Atten_Operate+0x77c>)
 8002b04:	900c      	str	r0, [sp, #48]	; 0x30
 8002b06:	f8d1 c000 	ldr.w	ip, [r1]
 8002b0a:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002b0e:	688a      	ldr	r2, [r1, #8]
 8002b10:	68cb      	ldr	r3, [r1, #12]
 8002b12:	f101 0510 	add.w	r5, r1, #16
 8002b16:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002b1a:	463e      	mov	r6, r7
 8002b1c:	6828      	ldr	r0, [r5, #0]
 8002b1e:	6869      	ldr	r1, [r5, #4]
 8002b20:	3508      	adds	r5, #8
 8002b22:	c603      	stmia	r6!, {r0, r1}
 8002b24:	42a5      	cmp	r5, r4
 8002b26:	4637      	mov	r7, r6
 8002b28:	d1f7      	bne.n	8002b1a <Atten_Operate+0x6b2>
 8002b2a:	e7e3      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_WIFI2_2_4Ghz_R    :   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI2_2_4Ghz	 ,ATT_A_EN_WIFI2_2_4Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002b2c:	466f      	mov	r7, sp
 8002b2e:	492e      	ldr	r1, [pc, #184]	; (8002be8 <Atten_Operate+0x780>)
 8002b30:	900c      	str	r0, [sp, #48]	; 0x30
 8002b32:	f8d1 c000 	ldr.w	ip, [r1]
 8002b36:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002b3a:	688a      	ldr	r2, [r1, #8]
 8002b3c:	68cb      	ldr	r3, [r1, #12]
 8002b3e:	f101 0510 	add.w	r5, r1, #16
 8002b42:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002b46:	463e      	mov	r6, r7
 8002b48:	6828      	ldr	r0, [r5, #0]
 8002b4a:	6869      	ldr	r1, [r5, #4]
 8002b4c:	3508      	adds	r5, #8
 8002b4e:	c603      	stmia	r6!, {r0, r1}
 8002b50:	42a5      	cmp	r5, r4
 8002b52:	4637      	mov	r7, r6
 8002b54:	d1f7      	bne.n	8002b46 <Atten_Operate+0x6de>
 8002b56:	e7cd      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_WIFI3_2_4Ghz_R    :   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI3_2_4Ghz	 ,ATT_A_EN_WIFI3_2_4Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002b58:	466f      	mov	r7, sp
 8002b5a:	4924      	ldr	r1, [pc, #144]	; (8002bec <Atten_Operate+0x784>)
 8002b5c:	900c      	str	r0, [sp, #48]	; 0x30
 8002b5e:	f8d1 c000 	ldr.w	ip, [r1]
 8002b62:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002b66:	688a      	ldr	r2, [r1, #8]
 8002b68:	68cb      	ldr	r3, [r1, #12]
 8002b6a:	f101 0510 	add.w	r5, r1, #16
 8002b6e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002b72:	463e      	mov	r6, r7
 8002b74:	6828      	ldr	r0, [r5, #0]
 8002b76:	6869      	ldr	r1, [r5, #4]
 8002b78:	3508      	adds	r5, #8
 8002b7a:	c603      	stmia	r6!, {r0, r1}
 8002b7c:	42a5      	cmp	r5, r4
 8002b7e:	4637      	mov	r7, r6
 8002b80:	d1f7      	bne.n	8002b72 <Atten_Operate+0x70a>
 8002b82:	e7b7      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_WIFI4_2_4Ghz_R    :   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI4_2_4Ghz	 ,ATT_A_EN_WIFI4_2_4Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002b84:	466f      	mov	r7, sp
 8002b86:	491a      	ldr	r1, [pc, #104]	; (8002bf0 <Atten_Operate+0x788>)
 8002b88:	900c      	str	r0, [sp, #48]	; 0x30
 8002b8a:	f8d1 c000 	ldr.w	ip, [r1]
 8002b8e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002b92:	688a      	ldr	r2, [r1, #8]
 8002b94:	68cb      	ldr	r3, [r1, #12]
 8002b96:	f101 0510 	add.w	r5, r1, #16
 8002b9a:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002b9e:	463e      	mov	r6, r7
 8002ba0:	6828      	ldr	r0, [r5, #0]
 8002ba2:	6869      	ldr	r1, [r5, #4]
 8002ba4:	3508      	adds	r5, #8
 8002ba6:	c603      	stmia	r6!, {r0, r1}
 8002ba8:	42a5      	cmp	r5, r4
 8002baa:	4637      	mov	r7, r6
 8002bac:	d1f7      	bne.n	8002b9e <Atten_Operate+0x736>
 8002bae:	e7a1      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_WIFI1_5_8Ghz_R    :   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI1_5_8Ghz	 ,ATT_A_EN_WIFI1_5_8Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002bb0:	466f      	mov	r7, sp
 8002bb2:	4910      	ldr	r1, [pc, #64]	; (8002bf4 <Atten_Operate+0x78c>)
 8002bb4:	900c      	str	r0, [sp, #48]	; 0x30
 8002bb6:	f8d1 c000 	ldr.w	ip, [r1]
 8002bba:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002bbe:	688a      	ldr	r2, [r1, #8]
 8002bc0:	68cb      	ldr	r3, [r1, #12]
 8002bc2:	f101 0510 	add.w	r5, r1, #16
 8002bc6:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002bca:	463e      	mov	r6, r7
 8002bcc:	6828      	ldr	r0, [r5, #0]
 8002bce:	6869      	ldr	r1, [r5, #4]
 8002bd0:	3508      	adds	r5, #8
 8002bd2:	c603      	stmia	r6!, {r0, r1}
 8002bd4:	42a5      	cmp	r5, r4
 8002bd6:	4637      	mov	r7, r6
 8002bd8:	d1f7      	bne.n	8002bca <Atten_Operate+0x762>
 8002bda:	e78b      	b.n	8002af4 <Atten_Operate+0x68c>
 8002bdc:	20000084 	.word	0x20000084
 8002be0:	20000791 	.word	0x20000791
 8002be4:	200002a0 	.word	0x200002a0
 8002be8:	20000ad1 	.word	0x20000ad1
 8002bec:	20000360 	.word	0x20000360
 8002bf0:	200001a0 	.word	0x200001a0
 8002bf4:	200009d1 	.word	0x200009d1
		case ATT_A_EN_WIFI2_5_8Ghz_R	:   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI2_5_8Ghz	 ,ATT_A_EN_WIFI2_5_8Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002bf8:	466f      	mov	r7, sp
 8002bfa:	49c5      	ldr	r1, [pc, #788]	; (8002f10 <Atten_Operate+0xaa8>)
 8002bfc:	900c      	str	r0, [sp, #48]	; 0x30
 8002bfe:	f8d1 c000 	ldr.w	ip, [r1]
 8002c02:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002c06:	688a      	ldr	r2, [r1, #8]
 8002c08:	68cb      	ldr	r3, [r1, #12]
 8002c0a:	f101 0510 	add.w	r5, r1, #16
 8002c0e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002c12:	463e      	mov	r6, r7
 8002c14:	6828      	ldr	r0, [r5, #0]
 8002c16:	6869      	ldr	r1, [r5, #4]
 8002c18:	3508      	adds	r5, #8
 8002c1a:	c603      	stmia	r6!, {r0, r1}
 8002c1c:	42a5      	cmp	r5, r4
 8002c1e:	4637      	mov	r7, r6
 8002c20:	d1f7      	bne.n	8002c12 <Atten_Operate+0x7aa>
 8002c22:	e767      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_WIFI3_5_8Ghz_R	:   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI3_5_8Ghz	 ,ATT_A_EN_WIFI3_5_8Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002c24:	466f      	mov	r7, sp
 8002c26:	49bb      	ldr	r1, [pc, #748]	; (8002f14 <Atten_Operate+0xaac>)
 8002c28:	900c      	str	r0, [sp, #48]	; 0x30
 8002c2a:	f8d1 c000 	ldr.w	ip, [r1]
 8002c2e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002c32:	688a      	ldr	r2, [r1, #8]
 8002c34:	68cb      	ldr	r3, [r1, #12]
 8002c36:	f101 0510 	add.w	r5, r1, #16
 8002c3a:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002c3e:	463e      	mov	r6, r7
 8002c40:	6828      	ldr	r0, [r5, #0]
 8002c42:	6869      	ldr	r1, [r5, #4]
 8002c44:	3508      	adds	r5, #8
 8002c46:	c603      	stmia	r6!, {r0, r1}
 8002c48:	42a5      	cmp	r5, r4
 8002c4a:	4637      	mov	r7, r6
 8002c4c:	d1f7      	bne.n	8002c3e <Atten_Operate+0x7d6>
 8002c4e:	e751      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_WIFI4_5_8Ghz_R	:   Atten_Table_Read(EEPROM_ATT_A_EN_WIFI4_5_8Ghz	 ,ATT_A_EN_WIFI4_5_8Ghz_Table     ,&data[Bluecell_STX]);	break;
 8002c50:	466f      	mov	r7, sp
 8002c52:	49b1      	ldr	r1, [pc, #708]	; (8002f18 <Atten_Operate+0xab0>)
 8002c54:	900c      	str	r0, [sp, #48]	; 0x30
 8002c56:	f8d1 c000 	ldr.w	ip, [r1]
 8002c5a:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002c5e:	688a      	ldr	r2, [r1, #8]
 8002c60:	68cb      	ldr	r3, [r1, #12]
 8002c62:	f101 0510 	add.w	r5, r1, #16
 8002c66:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002c6a:	463e      	mov	r6, r7
 8002c6c:	6828      	ldr	r0, [r5, #0]
 8002c6e:	6869      	ldr	r1, [r5, #4]
 8002c70:	3508      	adds	r5, #8
 8002c72:	c603      	stmia	r6!, {r0, r1}
 8002c74:	42a5      	cmp	r5, r4
 8002c76:	4637      	mov	r7, r6
 8002c78:	d1f7      	bne.n	8002c6a <Atten_Operate+0x802>
 8002c7a:	e73b      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G1_28_28_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G1_28_28_5Ghz,ATT_A_EN_30G1_28_28_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8002c7c:	466f      	mov	r7, sp
 8002c7e:	49a7      	ldr	r1, [pc, #668]	; (8002f1c <Atten_Operate+0xab4>)
 8002c80:	900c      	str	r0, [sp, #48]	; 0x30
 8002c82:	f8d1 c000 	ldr.w	ip, [r1]
 8002c86:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002c8a:	688a      	ldr	r2, [r1, #8]
 8002c8c:	68cb      	ldr	r3, [r1, #12]
 8002c8e:	f101 0510 	add.w	r5, r1, #16
 8002c92:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002c96:	463e      	mov	r6, r7
 8002c98:	6828      	ldr	r0, [r5, #0]
 8002c9a:	6869      	ldr	r1, [r5, #4]
 8002c9c:	3508      	adds	r5, #8
 8002c9e:	c603      	stmia	r6!, {r0, r1}
 8002ca0:	42a5      	cmp	r5, r4
 8002ca2:	4637      	mov	r7, r6
 8002ca4:	d1f7      	bne.n	8002c96 <Atten_Operate+0x82e>
 8002ca6:	e725      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G2_28_28_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G2_28_28_5Ghz,ATT_A_EN_30G2_28_28_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8002ca8:	466f      	mov	r7, sp
 8002caa:	499d      	ldr	r1, [pc, #628]	; (8002f20 <Atten_Operate+0xab8>)
 8002cac:	900c      	str	r0, [sp, #48]	; 0x30
 8002cae:	f8d1 c000 	ldr.w	ip, [r1]
 8002cb2:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002cb6:	688a      	ldr	r2, [r1, #8]
 8002cb8:	68cb      	ldr	r3, [r1, #12]
 8002cba:	f101 0510 	add.w	r5, r1, #16
 8002cbe:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002cc2:	463e      	mov	r6, r7
 8002cc4:	6828      	ldr	r0, [r5, #0]
 8002cc6:	6869      	ldr	r1, [r5, #4]
 8002cc8:	3508      	adds	r5, #8
 8002cca:	c603      	stmia	r6!, {r0, r1}
 8002ccc:	42a5      	cmp	r5, r4
 8002cce:	4637      	mov	r7, r6
 8002cd0:	d1f7      	bne.n	8002cc2 <Atten_Operate+0x85a>
 8002cd2:	e70f      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G3_28_28_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G3_28_28_5Ghz,ATT_A_EN_30G3_28_28_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8002cd4:	466f      	mov	r7, sp
 8002cd6:	4993      	ldr	r1, [pc, #588]	; (8002f24 <Atten_Operate+0xabc>)
 8002cd8:	900c      	str	r0, [sp, #48]	; 0x30
 8002cda:	f8d1 c000 	ldr.w	ip, [r1]
 8002cde:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002ce2:	688a      	ldr	r2, [r1, #8]
 8002ce4:	68cb      	ldr	r3, [r1, #12]
 8002ce6:	f101 0510 	add.w	r5, r1, #16
 8002cea:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002cee:	463e      	mov	r6, r7
 8002cf0:	6828      	ldr	r0, [r5, #0]
 8002cf2:	6869      	ldr	r1, [r5, #4]
 8002cf4:	3508      	adds	r5, #8
 8002cf6:	c603      	stmia	r6!, {r0, r1}
 8002cf8:	42a5      	cmp	r5, r4
 8002cfa:	4637      	mov	r7, r6
 8002cfc:	d1f7      	bne.n	8002cee <Atten_Operate+0x886>
 8002cfe:	e6f9      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G1_28_5_29Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G1_28_5_29Ghz,ATT_A_EN_30G1_28_5_29Ghz_Table ,&data[Bluecell_STX]);	break;
 8002d00:	466f      	mov	r7, sp
 8002d02:	4989      	ldr	r1, [pc, #548]	; (8002f28 <Atten_Operate+0xac0>)
 8002d04:	900c      	str	r0, [sp, #48]	; 0x30
 8002d06:	f8d1 c000 	ldr.w	ip, [r1]
 8002d0a:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002d0e:	688a      	ldr	r2, [r1, #8]
 8002d10:	68cb      	ldr	r3, [r1, #12]
 8002d12:	f101 0510 	add.w	r5, r1, #16
 8002d16:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002d1a:	463e      	mov	r6, r7
 8002d1c:	6828      	ldr	r0, [r5, #0]
 8002d1e:	6869      	ldr	r1, [r5, #4]
 8002d20:	3508      	adds	r5, #8
 8002d22:	c603      	stmia	r6!, {r0, r1}
 8002d24:	42a5      	cmp	r5, r4
 8002d26:	4637      	mov	r7, r6
 8002d28:	d1f7      	bne.n	8002d1a <Atten_Operate+0x8b2>
 8002d2a:	e6e3      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G2_28_5_29Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G2_28_5_29Ghz,ATT_A_EN_30G2_28_5_29Ghz_Table ,&data[Bluecell_STX]);	break;
 8002d2c:	466f      	mov	r7, sp
 8002d2e:	497f      	ldr	r1, [pc, #508]	; (8002f2c <Atten_Operate+0xac4>)
 8002d30:	900c      	str	r0, [sp, #48]	; 0x30
 8002d32:	f8d1 c000 	ldr.w	ip, [r1]
 8002d36:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002d3a:	688a      	ldr	r2, [r1, #8]
 8002d3c:	68cb      	ldr	r3, [r1, #12]
 8002d3e:	f101 0510 	add.w	r5, r1, #16
 8002d42:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002d46:	463e      	mov	r6, r7
 8002d48:	6828      	ldr	r0, [r5, #0]
 8002d4a:	6869      	ldr	r1, [r5, #4]
 8002d4c:	3508      	adds	r5, #8
 8002d4e:	c603      	stmia	r6!, {r0, r1}
 8002d50:	42a5      	cmp	r5, r4
 8002d52:	4637      	mov	r7, r6
 8002d54:	d1f7      	bne.n	8002d46 <Atten_Operate+0x8de>
 8002d56:	e6cd      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G3_28_5_29Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G3_28_5_29Ghz,ATT_A_EN_30G3_28_5_29Ghz_Table ,&data[Bluecell_STX]);	break;
 8002d58:	466f      	mov	r7, sp
 8002d5a:	4975      	ldr	r1, [pc, #468]	; (8002f30 <Atten_Operate+0xac8>)
 8002d5c:	900c      	str	r0, [sp, #48]	; 0x30
 8002d5e:	f8d1 c000 	ldr.w	ip, [r1]
 8002d62:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002d66:	688a      	ldr	r2, [r1, #8]
 8002d68:	68cb      	ldr	r3, [r1, #12]
 8002d6a:	f101 0510 	add.w	r5, r1, #16
 8002d6e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002d72:	463e      	mov	r6, r7
 8002d74:	6828      	ldr	r0, [r5, #0]
 8002d76:	6869      	ldr	r1, [r5, #4]
 8002d78:	3508      	adds	r5, #8
 8002d7a:	c603      	stmia	r6!, {r0, r1}
 8002d7c:	42a5      	cmp	r5, r4
 8002d7e:	4637      	mov	r7, r6
 8002d80:	d1f7      	bne.n	8002d72 <Atten_Operate+0x90a>
 8002d82:	e6b7      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G1_29_29_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G1_29_29_5Ghz,ATT_A_EN_30G1_29_29_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8002d84:	466f      	mov	r7, sp
 8002d86:	496b      	ldr	r1, [pc, #428]	; (8002f34 <Atten_Operate+0xacc>)
 8002d88:	900c      	str	r0, [sp, #48]	; 0x30
 8002d8a:	f8d1 c000 	ldr.w	ip, [r1]
 8002d8e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002d92:	688a      	ldr	r2, [r1, #8]
 8002d94:	68cb      	ldr	r3, [r1, #12]
 8002d96:	f101 0510 	add.w	r5, r1, #16
 8002d9a:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002d9e:	463e      	mov	r6, r7
 8002da0:	6828      	ldr	r0, [r5, #0]
 8002da2:	6869      	ldr	r1, [r5, #4]
 8002da4:	3508      	adds	r5, #8
 8002da6:	c603      	stmia	r6!, {r0, r1}
 8002da8:	42a5      	cmp	r5, r4
 8002daa:	4637      	mov	r7, r6
 8002dac:	d1f7      	bne.n	8002d9e <Atten_Operate+0x936>
 8002dae:	e6a1      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G2_29_29_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G2_29_29_5Ghz,ATT_A_EN_30G2_29_29_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8002db0:	466f      	mov	r7, sp
 8002db2:	4961      	ldr	r1, [pc, #388]	; (8002f38 <Atten_Operate+0xad0>)
 8002db4:	900c      	str	r0, [sp, #48]	; 0x30
 8002db6:	f8d1 c000 	ldr.w	ip, [r1]
 8002dba:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002dbe:	688a      	ldr	r2, [r1, #8]
 8002dc0:	68cb      	ldr	r3, [r1, #12]
 8002dc2:	f101 0510 	add.w	r5, r1, #16
 8002dc6:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002dca:	463e      	mov	r6, r7
 8002dcc:	6828      	ldr	r0, [r5, #0]
 8002dce:	6869      	ldr	r1, [r5, #4]
 8002dd0:	3508      	adds	r5, #8
 8002dd2:	c603      	stmia	r6!, {r0, r1}
 8002dd4:	42a5      	cmp	r5, r4
 8002dd6:	4637      	mov	r7, r6
 8002dd8:	d1f7      	bne.n	8002dca <Atten_Operate+0x962>
 8002dda:	e68b      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G3_29_29_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G3_29_29_5Ghz,ATT_A_EN_30G3_29_29_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8002ddc:	466f      	mov	r7, sp
 8002dde:	4957      	ldr	r1, [pc, #348]	; (8002f3c <Atten_Operate+0xad4>)
 8002de0:	900c      	str	r0, [sp, #48]	; 0x30
 8002de2:	f8d1 c000 	ldr.w	ip, [r1]
 8002de6:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002dea:	688a      	ldr	r2, [r1, #8]
 8002dec:	68cb      	ldr	r3, [r1, #12]
 8002dee:	f101 0510 	add.w	r5, r1, #16
 8002df2:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002df6:	463e      	mov	r6, r7
 8002df8:	6828      	ldr	r0, [r5, #0]
 8002dfa:	6869      	ldr	r1, [r5, #4]
 8002dfc:	3508      	adds	r5, #8
 8002dfe:	c603      	stmia	r6!, {r0, r1}
 8002e00:	42a5      	cmp	r5, r4
 8002e02:	4637      	mov	r7, r6
 8002e04:	d1f7      	bne.n	8002df6 <Atten_Operate+0x98e>
 8002e06:	e675      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G1_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G1_29_5_30Ghz,ATT_A_EN_30G1_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
 8002e08:	466f      	mov	r7, sp
 8002e0a:	494d      	ldr	r1, [pc, #308]	; (8002f40 <Atten_Operate+0xad8>)
 8002e0c:	900c      	str	r0, [sp, #48]	; 0x30
 8002e0e:	f8d1 c000 	ldr.w	ip, [r1]
 8002e12:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002e16:	688a      	ldr	r2, [r1, #8]
 8002e18:	68cb      	ldr	r3, [r1, #12]
 8002e1a:	f101 0510 	add.w	r5, r1, #16
 8002e1e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002e22:	463e      	mov	r6, r7
 8002e24:	6828      	ldr	r0, [r5, #0]
 8002e26:	6869      	ldr	r1, [r5, #4]
 8002e28:	3508      	adds	r5, #8
 8002e2a:	c603      	stmia	r6!, {r0, r1}
 8002e2c:	42a5      	cmp	r5, r4
 8002e2e:	4637      	mov	r7, r6
 8002e30:	d1f7      	bne.n	8002e22 <Atten_Operate+0x9ba>
 8002e32:	e65f      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G2_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G2_29_5_30Ghz,ATT_A_EN_30G2_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
 8002e34:	466f      	mov	r7, sp
 8002e36:	4943      	ldr	r1, [pc, #268]	; (8002f44 <Atten_Operate+0xadc>)
 8002e38:	900c      	str	r0, [sp, #48]	; 0x30
 8002e3a:	f8d1 c000 	ldr.w	ip, [r1]
 8002e3e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002e42:	688a      	ldr	r2, [r1, #8]
 8002e44:	68cb      	ldr	r3, [r1, #12]
 8002e46:	f101 0510 	add.w	r5, r1, #16
 8002e4a:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002e4e:	463e      	mov	r6, r7
 8002e50:	6828      	ldr	r0, [r5, #0]
 8002e52:	6869      	ldr	r1, [r5, #4]
 8002e54:	3508      	adds	r5, #8
 8002e56:	c603      	stmia	r6!, {r0, r1}
 8002e58:	42a5      	cmp	r5, r4
 8002e5a:	4637      	mov	r7, r6
 8002e5c:	d1f7      	bne.n	8002e4e <Atten_Operate+0x9e6>
 8002e5e:	e649      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_A_EN_30G3_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_A_EN_30G3_29_5_30Ghz,ATT_A_EN_30G3_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
 8002e60:	466f      	mov	r7, sp
 8002e62:	4939      	ldr	r1, [pc, #228]	; (8002f48 <Atten_Operate+0xae0>)
 8002e64:	900c      	str	r0, [sp, #48]	; 0x30
 8002e66:	f8d1 c000 	ldr.w	ip, [r1]
 8002e6a:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002e6e:	688a      	ldr	r2, [r1, #8]
 8002e70:	68cb      	ldr	r3, [r1, #12]
 8002e72:	f101 0510 	add.w	r5, r1, #16
 8002e76:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002e7a:	463e      	mov	r6, r7
 8002e7c:	6828      	ldr	r0, [r5, #0]
 8002e7e:	6869      	ldr	r1, [r5, #4]
 8002e80:	3508      	adds	r5, #8
 8002e82:	c603      	stmia	r6!, {r0, r1}
 8002e84:	42a5      	cmp	r5, r4
 8002e86:	4637      	mov	r7, r6
 8002e88:	d1f7      	bne.n	8002e7a <Atten_Operate+0xa12>
 8002e8a:	e633      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_150M_R			:   Atten_Table_Read(EEPROM_ATT_B_EN_150M			  ,ATT_B_EN_150M_Table            ,&data[Bluecell_STX]);	break;
 8002e8c:	466f      	mov	r7, sp
 8002e8e:	492f      	ldr	r1, [pc, #188]	; (8002f4c <Atten_Operate+0xae4>)
 8002e90:	900c      	str	r0, [sp, #48]	; 0x30
 8002e92:	f8d1 c000 	ldr.w	ip, [r1]
 8002e96:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002e9a:	688a      	ldr	r2, [r1, #8]
 8002e9c:	68cb      	ldr	r3, [r1, #12]
 8002e9e:	f101 0510 	add.w	r5, r1, #16
 8002ea2:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002ea6:	463e      	mov	r6, r7
 8002ea8:	6828      	ldr	r0, [r5, #0]
 8002eaa:	6869      	ldr	r1, [r5, #4]
 8002eac:	3508      	adds	r5, #8
 8002eae:	c603      	stmia	r6!, {r0, r1}
 8002eb0:	42a5      	cmp	r5, r4
 8002eb2:	4637      	mov	r7, r6
 8002eb4:	d1f7      	bne.n	8002ea6 <Atten_Operate+0xa3e>
 8002eb6:	e61d      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_WIFI1_2_4Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI1_2_4Ghz	  ,ATT_B_EN_WIFI1_2_4Ghz_Table    ,&data[Bluecell_STX]);	break;
 8002eb8:	466f      	mov	r7, sp
 8002eba:	4925      	ldr	r1, [pc, #148]	; (8002f50 <Atten_Operate+0xae8>)
 8002ebc:	900c      	str	r0, [sp, #48]	; 0x30
 8002ebe:	f8d1 c000 	ldr.w	ip, [r1]
 8002ec2:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002ec6:	688a      	ldr	r2, [r1, #8]
 8002ec8:	68cb      	ldr	r3, [r1, #12]
 8002eca:	f101 0510 	add.w	r5, r1, #16
 8002ece:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002ed2:	463e      	mov	r6, r7
 8002ed4:	6828      	ldr	r0, [r5, #0]
 8002ed6:	6869      	ldr	r1, [r5, #4]
 8002ed8:	3508      	adds	r5, #8
 8002eda:	c603      	stmia	r6!, {r0, r1}
 8002edc:	42a5      	cmp	r5, r4
 8002ede:	4637      	mov	r7, r6
 8002ee0:	d1f7      	bne.n	8002ed2 <Atten_Operate+0xa6a>
 8002ee2:	e607      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_WIFI2_2_4Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI2_2_4Ghz	  ,ATT_B_EN_WIFI2_2_4Ghz_Table    ,&data[Bluecell_STX]);	break;
 8002ee4:	466f      	mov	r7, sp
 8002ee6:	491b      	ldr	r1, [pc, #108]	; (8002f54 <Atten_Operate+0xaec>)
 8002ee8:	900c      	str	r0, [sp, #48]	; 0x30
 8002eea:	f8d1 c000 	ldr.w	ip, [r1]
 8002eee:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002ef2:	688a      	ldr	r2, [r1, #8]
 8002ef4:	68cb      	ldr	r3, [r1, #12]
 8002ef6:	f101 0510 	add.w	r5, r1, #16
 8002efa:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002efe:	463e      	mov	r6, r7
 8002f00:	6828      	ldr	r0, [r5, #0]
 8002f02:	6869      	ldr	r1, [r5, #4]
 8002f04:	3508      	adds	r5, #8
 8002f06:	c603      	stmia	r6!, {r0, r1}
 8002f08:	42a5      	cmp	r5, r4
 8002f0a:	4637      	mov	r7, r6
 8002f0c:	d1f7      	bne.n	8002efe <Atten_Operate+0xa96>
 8002f0e:	e5f1      	b.n	8002af4 <Atten_Operate+0x68c>
 8002f10:	20000b51 	.word	0x20000b51
 8002f14:	200006a0 	.word	0x200006a0
 8002f18:	20000720 	.word	0x20000720
 8002f1c:	200005e0 	.word	0x200005e0
 8002f20:	20000a91 	.word	0x20000a91
 8002f24:	200006e0 	.word	0x200006e0
 8002f28:	200008d1 	.word	0x200008d1
 8002f2c:	20000420 	.word	0x20000420
 8002f30:	20000560 	.word	0x20000560
 8002f34:	20000b11 	.word	0x20000b11
 8002f38:	200004a0 	.word	0x200004a0
 8002f3c:	20000120 	.word	0x20000120
 8002f40:	20000851 	.word	0x20000851
 8002f44:	20000811 	.word	0x20000811
 8002f48:	200001e0 	.word	0x200001e0
 8002f4c:	20000951 	.word	0x20000951
 8002f50:	20000460 	.word	0x20000460
 8002f54:	200003a0 	.word	0x200003a0
		case ATT_B_EN_WIFI3_2_4Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI3_2_4Ghz	  ,ATT_B_EN_WIFI3_2_4Ghz_Table    ,&data[Bluecell_STX]);	break;
 8002f58:	466f      	mov	r7, sp
 8002f5a:	49c5      	ldr	r1, [pc, #788]	; (8003270 <Atten_Operate+0xe08>)
 8002f5c:	900c      	str	r0, [sp, #48]	; 0x30
 8002f5e:	f8d1 c000 	ldr.w	ip, [r1]
 8002f62:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002f66:	688a      	ldr	r2, [r1, #8]
 8002f68:	68cb      	ldr	r3, [r1, #12]
 8002f6a:	f101 0510 	add.w	r5, r1, #16
 8002f6e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002f72:	463e      	mov	r6, r7
 8002f74:	6828      	ldr	r0, [r5, #0]
 8002f76:	6869      	ldr	r1, [r5, #4]
 8002f78:	3508      	adds	r5, #8
 8002f7a:	c603      	stmia	r6!, {r0, r1}
 8002f7c:	42a5      	cmp	r5, r4
 8002f7e:	4637      	mov	r7, r6
 8002f80:	d1f7      	bne.n	8002f72 <Atten_Operate+0xb0a>
 8002f82:	e5b7      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_WIFI4_2_4Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI4_2_4Ghz	  ,ATT_B_EN_WIFI4_2_4Ghz_Table    ,&data[Bluecell_STX]);	break;
 8002f84:	466f      	mov	r7, sp
 8002f86:	49bb      	ldr	r1, [pc, #748]	; (8003274 <Atten_Operate+0xe0c>)
 8002f88:	900c      	str	r0, [sp, #48]	; 0x30
 8002f8a:	f8d1 c000 	ldr.w	ip, [r1]
 8002f8e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002f92:	688a      	ldr	r2, [r1, #8]
 8002f94:	68cb      	ldr	r3, [r1, #12]
 8002f96:	f101 0510 	add.w	r5, r1, #16
 8002f9a:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002f9e:	463e      	mov	r6, r7
 8002fa0:	6828      	ldr	r0, [r5, #0]
 8002fa2:	6869      	ldr	r1, [r5, #4]
 8002fa4:	3508      	adds	r5, #8
 8002fa6:	c603      	stmia	r6!, {r0, r1}
 8002fa8:	42a5      	cmp	r5, r4
 8002faa:	4637      	mov	r7, r6
 8002fac:	d1f7      	bne.n	8002f9e <Atten_Operate+0xb36>
 8002fae:	e5a1      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_WIFI1_5_8Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI1_5_8Ghz	  ,ATT_B_EN_WIFI1_5_8Ghz_Table    ,&data[Bluecell_STX]);	break;
 8002fb0:	466f      	mov	r7, sp
 8002fb2:	49b1      	ldr	r1, [pc, #708]	; (8003278 <Atten_Operate+0xe10>)
 8002fb4:	900c      	str	r0, [sp, #48]	; 0x30
 8002fb6:	f8d1 c000 	ldr.w	ip, [r1]
 8002fba:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002fbe:	688a      	ldr	r2, [r1, #8]
 8002fc0:	68cb      	ldr	r3, [r1, #12]
 8002fc2:	f101 0510 	add.w	r5, r1, #16
 8002fc6:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002fca:	463e      	mov	r6, r7
 8002fcc:	6828      	ldr	r0, [r5, #0]
 8002fce:	6869      	ldr	r1, [r5, #4]
 8002fd0:	3508      	adds	r5, #8
 8002fd2:	c603      	stmia	r6!, {r0, r1}
 8002fd4:	42a5      	cmp	r5, r4
 8002fd6:	4637      	mov	r7, r6
 8002fd8:	d1f7      	bne.n	8002fca <Atten_Operate+0xb62>
 8002fda:	e58b      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_WIFI2_5_8Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI2_5_8Ghz	  ,ATT_B_EN_WIFI2_5_8Ghz_Table    ,&data[Bluecell_STX]);	break;
 8002fdc:	466f      	mov	r7, sp
 8002fde:	49a7      	ldr	r1, [pc, #668]	; (800327c <Atten_Operate+0xe14>)
 8002fe0:	900c      	str	r0, [sp, #48]	; 0x30
 8002fe2:	f8d1 c000 	ldr.w	ip, [r1]
 8002fe6:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8002fea:	688a      	ldr	r2, [r1, #8]
 8002fec:	68cb      	ldr	r3, [r1, #12]
 8002fee:	f101 0510 	add.w	r5, r1, #16
 8002ff2:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8002ff6:	463e      	mov	r6, r7
 8002ff8:	6828      	ldr	r0, [r5, #0]
 8002ffa:	6869      	ldr	r1, [r5, #4]
 8002ffc:	3508      	adds	r5, #8
 8002ffe:	c603      	stmia	r6!, {r0, r1}
 8003000:	42a5      	cmp	r5, r4
 8003002:	4637      	mov	r7, r6
 8003004:	d1f7      	bne.n	8002ff6 <Atten_Operate+0xb8e>
 8003006:	e575      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_WIFI3_5_8Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI3_5_8Ghz	  ,ATT_B_EN_WIFI3_5_8Ghz_Table    ,&data[Bluecell_STX]);	break;
 8003008:	466f      	mov	r7, sp
 800300a:	499d      	ldr	r1, [pc, #628]	; (8003280 <Atten_Operate+0xe18>)
 800300c:	900c      	str	r0, [sp, #48]	; 0x30
 800300e:	f8d1 c000 	ldr.w	ip, [r1]
 8003012:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8003016:	688a      	ldr	r2, [r1, #8]
 8003018:	68cb      	ldr	r3, [r1, #12]
 800301a:	f101 0510 	add.w	r5, r1, #16
 800301e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8003022:	463e      	mov	r6, r7
 8003024:	6828      	ldr	r0, [r5, #0]
 8003026:	6869      	ldr	r1, [r5, #4]
 8003028:	3508      	adds	r5, #8
 800302a:	c603      	stmia	r6!, {r0, r1}
 800302c:	42a5      	cmp	r5, r4
 800302e:	4637      	mov	r7, r6
 8003030:	d1f7      	bne.n	8003022 <Atten_Operate+0xbba>
 8003032:	e55f      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_WIFI4_5_8Ghz_R	:   Atten_Table_Read(EEPROM_ATT_B_EN_WIFI4_5_8Ghz	  ,ATT_B_EN_WIFI4_5_8Ghz_Table    ,&data[Bluecell_STX]);	break;
 8003034:	466f      	mov	r7, sp
 8003036:	4993      	ldr	r1, [pc, #588]	; (8003284 <Atten_Operate+0xe1c>)
 8003038:	900c      	str	r0, [sp, #48]	; 0x30
 800303a:	f8d1 c000 	ldr.w	ip, [r1]
 800303e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8003042:	688a      	ldr	r2, [r1, #8]
 8003044:	68cb      	ldr	r3, [r1, #12]
 8003046:	f101 0510 	add.w	r5, r1, #16
 800304a:	f101 0440 	add.w	r4, r1, #64	; 0x40
 800304e:	463e      	mov	r6, r7
 8003050:	6828      	ldr	r0, [r5, #0]
 8003052:	6869      	ldr	r1, [r5, #4]
 8003054:	3508      	adds	r5, #8
 8003056:	c603      	stmia	r6!, {r0, r1}
 8003058:	42a5      	cmp	r5, r4
 800305a:	4637      	mov	r7, r6
 800305c:	d1f7      	bne.n	800304e <Atten_Operate+0xbe6>
 800305e:	e549      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G1_28_28_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G1_28_28_5Ghz,ATT_B_EN_30G1_28_28_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8003060:	466f      	mov	r7, sp
 8003062:	4989      	ldr	r1, [pc, #548]	; (8003288 <Atten_Operate+0xe20>)
 8003064:	900c      	str	r0, [sp, #48]	; 0x30
 8003066:	f8d1 c000 	ldr.w	ip, [r1]
 800306a:	f8d1 e004 	ldr.w	lr, [r1, #4]
 800306e:	688a      	ldr	r2, [r1, #8]
 8003070:	68cb      	ldr	r3, [r1, #12]
 8003072:	f101 0510 	add.w	r5, r1, #16
 8003076:	f101 0440 	add.w	r4, r1, #64	; 0x40
 800307a:	463e      	mov	r6, r7
 800307c:	6828      	ldr	r0, [r5, #0]
 800307e:	6869      	ldr	r1, [r5, #4]
 8003080:	3508      	adds	r5, #8
 8003082:	c603      	stmia	r6!, {r0, r1}
 8003084:	42a5      	cmp	r5, r4
 8003086:	4637      	mov	r7, r6
 8003088:	d1f7      	bne.n	800307a <Atten_Operate+0xc12>
 800308a:	e533      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G2_28_28_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G2_28_28_5Ghz,ATT_B_EN_30G2_28_28_5Ghz_Table ,&data[Bluecell_STX]);	break;
 800308c:	466f      	mov	r7, sp
 800308e:	497f      	ldr	r1, [pc, #508]	; (800328c <Atten_Operate+0xe24>)
 8003090:	900c      	str	r0, [sp, #48]	; 0x30
 8003092:	f8d1 c000 	ldr.w	ip, [r1]
 8003096:	f8d1 e004 	ldr.w	lr, [r1, #4]
 800309a:	688a      	ldr	r2, [r1, #8]
 800309c:	68cb      	ldr	r3, [r1, #12]
 800309e:	f101 0510 	add.w	r5, r1, #16
 80030a2:	f101 0440 	add.w	r4, r1, #64	; 0x40
 80030a6:	463e      	mov	r6, r7
 80030a8:	6828      	ldr	r0, [r5, #0]
 80030aa:	6869      	ldr	r1, [r5, #4]
 80030ac:	3508      	adds	r5, #8
 80030ae:	c603      	stmia	r6!, {r0, r1}
 80030b0:	42a5      	cmp	r5, r4
 80030b2:	4637      	mov	r7, r6
 80030b4:	d1f7      	bne.n	80030a6 <Atten_Operate+0xc3e>
 80030b6:	e51d      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G3_28_28_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G3_28_28_5Ghz,ATT_B_EN_30G3_28_28_5Ghz_Table ,&data[Bluecell_STX]);	break;
 80030b8:	466f      	mov	r7, sp
 80030ba:	4975      	ldr	r1, [pc, #468]	; (8003290 <Atten_Operate+0xe28>)
 80030bc:	900c      	str	r0, [sp, #48]	; 0x30
 80030be:	f8d1 c000 	ldr.w	ip, [r1]
 80030c2:	f8d1 e004 	ldr.w	lr, [r1, #4]
 80030c6:	688a      	ldr	r2, [r1, #8]
 80030c8:	68cb      	ldr	r3, [r1, #12]
 80030ca:	f101 0510 	add.w	r5, r1, #16
 80030ce:	f101 0440 	add.w	r4, r1, #64	; 0x40
 80030d2:	463e      	mov	r6, r7
 80030d4:	6828      	ldr	r0, [r5, #0]
 80030d6:	6869      	ldr	r1, [r5, #4]
 80030d8:	3508      	adds	r5, #8
 80030da:	c603      	stmia	r6!, {r0, r1}
 80030dc:	42a5      	cmp	r5, r4
 80030de:	4637      	mov	r7, r6
 80030e0:	d1f7      	bne.n	80030d2 <Atten_Operate+0xc6a>
 80030e2:	e507      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G1_28_5_29Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G1_28_5_29Ghz,ATT_B_EN_30G1_28_5_29Ghz_Table ,&data[Bluecell_STX]);	break;
 80030e4:	466f      	mov	r7, sp
 80030e6:	496b      	ldr	r1, [pc, #428]	; (8003294 <Atten_Operate+0xe2c>)
 80030e8:	900c      	str	r0, [sp, #48]	; 0x30
 80030ea:	f8d1 c000 	ldr.w	ip, [r1]
 80030ee:	f8d1 e004 	ldr.w	lr, [r1, #4]
 80030f2:	688a      	ldr	r2, [r1, #8]
 80030f4:	68cb      	ldr	r3, [r1, #12]
 80030f6:	f101 0510 	add.w	r5, r1, #16
 80030fa:	f101 0440 	add.w	r4, r1, #64	; 0x40
 80030fe:	463e      	mov	r6, r7
 8003100:	6828      	ldr	r0, [r5, #0]
 8003102:	6869      	ldr	r1, [r5, #4]
 8003104:	3508      	adds	r5, #8
 8003106:	c603      	stmia	r6!, {r0, r1}
 8003108:	42a5      	cmp	r5, r4
 800310a:	4637      	mov	r7, r6
 800310c:	d1f7      	bne.n	80030fe <Atten_Operate+0xc96>
 800310e:	e4f1      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G2_28_5_29Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G2_28_5_29Ghz,ATT_B_EN_30G2_28_5_29Ghz_Table ,&data[Bluecell_STX]);	break;
 8003110:	466f      	mov	r7, sp
 8003112:	4961      	ldr	r1, [pc, #388]	; (8003298 <Atten_Operate+0xe30>)
 8003114:	900c      	str	r0, [sp, #48]	; 0x30
 8003116:	f8d1 c000 	ldr.w	ip, [r1]
 800311a:	f8d1 e004 	ldr.w	lr, [r1, #4]
 800311e:	688a      	ldr	r2, [r1, #8]
 8003120:	68cb      	ldr	r3, [r1, #12]
 8003122:	f101 0510 	add.w	r5, r1, #16
 8003126:	f101 0440 	add.w	r4, r1, #64	; 0x40
 800312a:	463e      	mov	r6, r7
 800312c:	6828      	ldr	r0, [r5, #0]
 800312e:	6869      	ldr	r1, [r5, #4]
 8003130:	3508      	adds	r5, #8
 8003132:	c603      	stmia	r6!, {r0, r1}
 8003134:	42a5      	cmp	r5, r4
 8003136:	4637      	mov	r7, r6
 8003138:	d1f7      	bne.n	800312a <Atten_Operate+0xcc2>
 800313a:	e4db      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G3_28_5_29Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G3_28_5_29Ghz,ATT_B_EN_30G3_28_5_29Ghz_Table ,&data[Bluecell_STX]);	break;
 800313c:	466f      	mov	r7, sp
 800313e:	4957      	ldr	r1, [pc, #348]	; (800329c <Atten_Operate+0xe34>)
 8003140:	900c      	str	r0, [sp, #48]	; 0x30
 8003142:	f8d1 c000 	ldr.w	ip, [r1]
 8003146:	f8d1 e004 	ldr.w	lr, [r1, #4]
 800314a:	688a      	ldr	r2, [r1, #8]
 800314c:	68cb      	ldr	r3, [r1, #12]
 800314e:	f101 0510 	add.w	r5, r1, #16
 8003152:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8003156:	463e      	mov	r6, r7
 8003158:	6828      	ldr	r0, [r5, #0]
 800315a:	6869      	ldr	r1, [r5, #4]
 800315c:	3508      	adds	r5, #8
 800315e:	c603      	stmia	r6!, {r0, r1}
 8003160:	42a5      	cmp	r5, r4
 8003162:	4637      	mov	r7, r6
 8003164:	d1f7      	bne.n	8003156 <Atten_Operate+0xcee>
 8003166:	e4c5      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G1_29_29_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G1_29_29_5Ghz,ATT_B_EN_30G1_29_29_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8003168:	466f      	mov	r7, sp
 800316a:	494d      	ldr	r1, [pc, #308]	; (80032a0 <Atten_Operate+0xe38>)
 800316c:	900c      	str	r0, [sp, #48]	; 0x30
 800316e:	f8d1 c000 	ldr.w	ip, [r1]
 8003172:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8003176:	688a      	ldr	r2, [r1, #8]
 8003178:	68cb      	ldr	r3, [r1, #12]
 800317a:	f101 0510 	add.w	r5, r1, #16
 800317e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8003182:	463e      	mov	r6, r7
 8003184:	6828      	ldr	r0, [r5, #0]
 8003186:	6869      	ldr	r1, [r5, #4]
 8003188:	3508      	adds	r5, #8
 800318a:	c603      	stmia	r6!, {r0, r1}
 800318c:	42a5      	cmp	r5, r4
 800318e:	4637      	mov	r7, r6
 8003190:	d1f7      	bne.n	8003182 <Atten_Operate+0xd1a>
 8003192:	e4af      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G2_29_29_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G2_29_29_5Ghz,ATT_B_EN_30G2_29_29_5Ghz_Table ,&data[Bluecell_STX]);	break;
 8003194:	466f      	mov	r7, sp
 8003196:	4943      	ldr	r1, [pc, #268]	; (80032a4 <Atten_Operate+0xe3c>)
 8003198:	900c      	str	r0, [sp, #48]	; 0x30
 800319a:	f8d1 c000 	ldr.w	ip, [r1]
 800319e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 80031a2:	688a      	ldr	r2, [r1, #8]
 80031a4:	68cb      	ldr	r3, [r1, #12]
 80031a6:	f101 0510 	add.w	r5, r1, #16
 80031aa:	f101 0440 	add.w	r4, r1, #64	; 0x40
 80031ae:	463e      	mov	r6, r7
 80031b0:	6828      	ldr	r0, [r5, #0]
 80031b2:	6869      	ldr	r1, [r5, #4]
 80031b4:	3508      	adds	r5, #8
 80031b6:	c603      	stmia	r6!, {r0, r1}
 80031b8:	42a5      	cmp	r5, r4
 80031ba:	4637      	mov	r7, r6
 80031bc:	d1f7      	bne.n	80031ae <Atten_Operate+0xd46>
 80031be:	e499      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G3_29_29_5Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G3_29_29_5Ghz,ATT_B_EN_30G3_29_29_5Ghz_Table ,&data[Bluecell_STX]);	break;
 80031c0:	466f      	mov	r7, sp
 80031c2:	4939      	ldr	r1, [pc, #228]	; (80032a8 <Atten_Operate+0xe40>)
 80031c4:	900c      	str	r0, [sp, #48]	; 0x30
 80031c6:	f8d1 c000 	ldr.w	ip, [r1]
 80031ca:	f8d1 e004 	ldr.w	lr, [r1, #4]
 80031ce:	688a      	ldr	r2, [r1, #8]
 80031d0:	68cb      	ldr	r3, [r1, #12]
 80031d2:	f101 0510 	add.w	r5, r1, #16
 80031d6:	f101 0440 	add.w	r4, r1, #64	; 0x40
 80031da:	463e      	mov	r6, r7
 80031dc:	6828      	ldr	r0, [r5, #0]
 80031de:	6869      	ldr	r1, [r5, #4]
 80031e0:	3508      	adds	r5, #8
 80031e2:	c603      	stmia	r6!, {r0, r1}
 80031e4:	42a5      	cmp	r5, r4
 80031e6:	4637      	mov	r7, r6
 80031e8:	d1f7      	bne.n	80031da <Atten_Operate+0xd72>
 80031ea:	e483      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G1_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G1_29_5_30Ghz,ATT_B_EN_30G1_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
 80031ec:	466f      	mov	r7, sp
 80031ee:	492f      	ldr	r1, [pc, #188]	; (80032ac <Atten_Operate+0xe44>)
 80031f0:	900c      	str	r0, [sp, #48]	; 0x30
 80031f2:	f8d1 c000 	ldr.w	ip, [r1]
 80031f6:	f8d1 e004 	ldr.w	lr, [r1, #4]
 80031fa:	688a      	ldr	r2, [r1, #8]
 80031fc:	68cb      	ldr	r3, [r1, #12]
 80031fe:	f101 0510 	add.w	r5, r1, #16
 8003202:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8003206:	463e      	mov	r6, r7
 8003208:	6828      	ldr	r0, [r5, #0]
 800320a:	6869      	ldr	r1, [r5, #4]
 800320c:	3508      	adds	r5, #8
 800320e:	c603      	stmia	r6!, {r0, r1}
 8003210:	42a5      	cmp	r5, r4
 8003212:	4637      	mov	r7, r6
 8003214:	d1f7      	bne.n	8003206 <Atten_Operate+0xd9e>
 8003216:	e46d      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G2_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G2_29_5_30Ghz,ATT_B_EN_30G2_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
 8003218:	466f      	mov	r7, sp
 800321a:	4925      	ldr	r1, [pc, #148]	; (80032b0 <Atten_Operate+0xe48>)
 800321c:	900c      	str	r0, [sp, #48]	; 0x30
 800321e:	f8d1 c000 	ldr.w	ip, [r1]
 8003222:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8003226:	688a      	ldr	r2, [r1, #8]
 8003228:	68cb      	ldr	r3, [r1, #12]
 800322a:	f101 0510 	add.w	r5, r1, #16
 800322e:	f101 0440 	add.w	r4, r1, #64	; 0x40
 8003232:	463e      	mov	r6, r7
 8003234:	6828      	ldr	r0, [r5, #0]
 8003236:	6869      	ldr	r1, [r5, #4]
 8003238:	3508      	adds	r5, #8
 800323a:	c603      	stmia	r6!, {r0, r1}
 800323c:	42a5      	cmp	r5, r4
 800323e:	4637      	mov	r7, r6
 8003240:	d1f7      	bne.n	8003232 <Atten_Operate+0xdca>
 8003242:	e457      	b.n	8002af4 <Atten_Operate+0x68c>
		case ATT_B_EN_30G3_29_5_30Ghz_R :   Atten_Table_Read(EEPROM_ATT_B_EN_30G3_29_5_30Ghz,ATT_B_EN_30G3_29_5_30Ghz_Table ,&data[Bluecell_STX]);	break;
 8003244:	466f      	mov	r7, sp
 8003246:	491b      	ldr	r1, [pc, #108]	; (80032b4 <Atten_Operate+0xe4c>)
 8003248:	900c      	str	r0, [sp, #48]	; 0x30
 800324a:	f8d1 c000 	ldr.w	ip, [r1]
 800324e:	f8d1 e004 	ldr.w	lr, [r1, #4]
 8003252:	688a      	ldr	r2, [r1, #8]
 8003254:	68cb      	ldr	r3, [r1, #12]
 8003256:	f101 0510 	add.w	r5, r1, #16
 800325a:	f101 0440 	add.w	r4, r1, #64	; 0x40
 800325e:	463e      	mov	r6, r7
 8003260:	6828      	ldr	r0, [r5, #0]
 8003262:	6869      	ldr	r1, [r5, #4]
 8003264:	3508      	adds	r5, #8
 8003266:	c603      	stmia	r6!, {r0, r1}
 8003268:	42a5      	cmp	r5, r4
 800326a:	4637      	mov	r7, r6
 800326c:	d1f7      	bne.n	800325e <Atten_Operate+0xdf6>
 800326e:	e441      	b.n	8002af4 <Atten_Operate+0x68c>
 8003270:	200007d1 	.word	0x200007d1
 8003274:	200000e0 	.word	0x200000e0
 8003278:	20000a11 	.word	0x20000a11
 800327c:	200005a0 	.word	0x200005a0
 8003280:	20000220 	.word	0x20000220
 8003284:	20000320 	.word	0x20000320
 8003288:	20000160 	.word	0x20000160
 800328c:	200002e0 	.word	0x200002e0
 8003290:	20000991 	.word	0x20000991
 8003294:	200003e0 	.word	0x200003e0
 8003298:	20000520 	.word	0x20000520
 800329c:	20000260 	.word	0x20000260
 80032a0:	20000620 	.word	0x20000620
 80032a4:	20000660 	.word	0x20000660
 80032a8:	200004e0 	.word	0x200004e0
 80032ac:	20000911 	.word	0x20000911
 80032b0:	20000a51 	.word	0x20000a51
 80032b4:	20000891 	.word	0x20000891

080032b8 <Atten_Operate_Mem_RW>:
#define ATT_AB_DATA_Length 42
void Atten_Operate_Mem_RW(uint8_t* data){
 80032b8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 80032bc:	4604      	mov	r4, r0
 80032be:	b0a8      	sub	sp, #160	; 0xa0
    AttenType_t Temp_Type = data[Bluecell_Type];
 80032c0:	7845      	ldrb	r5, [r0, #1]
    uint8_t ResultBuf[100] ={0,};
 80032c2:	2264      	movs	r2, #100	; 0x64
 80032c4:	2100      	movs	r1, #0
 80032c6:	a80f      	add	r0, sp, #60	; 0x3c
 80032c8:	f001 fede 	bl	8005088 <memset>
    ResultBuf[Bluecell_STX]                   = data[Bluecell_STX];
 80032cc:	7823      	ldrb	r3, [r4, #0]
    ResultBuf[Bluecell_Type]                  = data[Bluecell_Type];
    ResultBuf[Bluecell_Length]                = data[Bluecell_Length];
    ResultBuf[ResultBuf[Bluecell_Length] + 4] = data[data[Bluecell_Length] + 4];
 80032ce:	aa28      	add	r2, sp, #160	; 0xa0
    ResultBuf[Bluecell_STX]                   = data[Bluecell_STX];
 80032d0:	f88d 303c 	strb.w	r3, [sp, #60]	; 0x3c
    ResultBuf[Bluecell_Length]                = data[Bluecell_Length];
 80032d4:	78a3      	ldrb	r3, [r4, #2]
    ResultBuf[Bluecell_Type]                  = data[Bluecell_Type];
 80032d6:	f88d 503d 	strb.w	r5, [sp, #61]	; 0x3d
    ResultBuf[Bluecell_Length]                = data[Bluecell_Length];
 80032da:	f88d 303e 	strb.w	r3, [sp, #62]	; 0x3e
    ResultBuf[ResultBuf[Bluecell_Length] + 4] = data[data[Bluecell_Length] + 4];
 80032de:	441a      	add	r2, r3
 80032e0:	4423      	add	r3, r4
 80032e2:	791b      	ldrb	r3, [r3, #4]
 80032e4:	f802 3c60 	strb.w	r3, [r2, #-96]

    switch(Temp_Type){
 80032e8:	2d6c      	cmp	r5, #108	; 0x6c
 80032ea:	f201 8182 	bhi.w	80045f2 <Atten_Operate_Mem_RW+0x133a>
 80032ee:	e8df f015 	tbh	[pc, r5, lsl #1]
 80032f2:	006d      	.short	0x006d
 80032f4:	009d0080 	.word	0x009d0080
 80032f8:	01840112 	.word	0x01840112
 80032fc:	024d01f7 	.word	0x024d01f7
 8003300:	02f902a3 	.word	0x02f902a3
 8003304:	030702fd 	.word	0x030702fd
 8003308:	03200315 	.word	0x03200315
 800330c:	0336032b 	.word	0x0336032b
 8003310:	03410980 	.word	0x03410980
 8003314:	036b0356 	.word	0x036b0356
 8003318:	03950980 	.word	0x03950980
 800331c:	03bf03aa 	.word	0x03bf03aa
 8003320:	03e903d4 	.word	0x03e903d4
 8003324:	041303fe 	.word	0x041303fe
 8003328:	09800980 	.word	0x09800980
 800332c:	04280980 	.word	0x04280980
 8003330:	0452043d 	.word	0x0452043d
 8003334:	047d0467 	.word	0x047d0467
 8003338:	04a90493 	.word	0x04a90493
 800333c:	04d504bf 	.word	0x04d504bf
 8003340:	050104eb 	.word	0x050104eb
 8003344:	05530517 	.word	0x05530517
 8003348:	057f0569 	.word	0x057f0569
 800334c:	05ab0595 	.word	0x05ab0595
 8003350:	05d705c1 	.word	0x05d705c1
 8003354:	060305ed 	.word	0x060305ed
 8003358:	062f0619 	.word	0x062f0619
 800335c:	065b0645 	.word	0x065b0645
 8003360:	06870671 	.word	0x06870671
 8003364:	06b3069d 	.word	0x06b3069d
 8003368:	06df06c9 	.word	0x06df06c9
 800336c:	09800980 	.word	0x09800980
 8003370:	071b0980 	.word	0x071b0980
 8003374:	07350728 	.word	0x07350728
 8003378:	074f0742 	.word	0x074f0742
 800337c:	0769075c 	.word	0x0769075c
 8003380:	07830776 	.word	0x07830776
 8003384:	079d0790 	.word	0x079d0790
 8003388:	09800980 	.word	0x09800980
 800338c:	07aa0980 	.word	0x07aa0980
 8003390:	07c407b7 	.word	0x07c407b7
 8003394:	07de07d1 	.word	0x07de07d1
 8003398:	07f807eb 	.word	0x07f807eb
 800339c:	08120805 	.word	0x08120805
 80033a0:	082c081f 	.word	0x082c081f
 80033a4:	08460839 	.word	0x08460839
 80033a8:	08600853 	.word	0x08600853
 80033ac:	087a086d 	.word	0x087a086d
 80033b0:	08940887 	.word	0x08940887
 80033b4:	08ae08a1 	.word	0x08ae08a1
 80033b8:	090b08bb 	.word	0x090b08bb
 80033bc:	09250918 	.word	0x09250918
 80033c0:	093f0932 	.word	0x093f0932
 80033c4:	0959094c 	.word	0x0959094c
 80033c8:	09730966 	.word	0x09730966
        case ATT_AB_CH_Read            : 
        memcpy(&ResultBuf[Bluecell_DATA],&Atten_Setting.ATT_A_CH_150M,ATT_AB_DATA_Length); 
 80033cc:	4bb6      	ldr	r3, [pc, #728]	; (80036a8 <Atten_Operate_Mem_RW+0x3f0>)
 80033ce:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80033d2:	f103 0128 	add.w	r1, r3, #40	; 0x28
 80033d6:	f853 0b04 	ldr.w	r0, [r3], #4
 80033da:	428b      	cmp	r3, r1
 80033dc:	f842 0b04 	str.w	r0, [r2], #4
 80033e0:	d1f9      	bne.n	80033d6 <Atten_Operate_Mem_RW+0x11e>
 80033e2:	881b      	ldrh	r3, [r3, #0]
 80033e4:	8013      	strh	r3, [r2, #0]
        break;
#endif

            default:printf("[Error ]Defalut in %s      LINE :%d \r\n",__func__,__LINE__);break;
   }
    Atten_Operate(ResultBuf);
 80033e6:	a80f      	add	r0, sp, #60	; 0x3c
 80033e8:	f7ff f83e 	bl	8002468 <Atten_Operate>
}
 80033ec:	b028      	add	sp, #160	; 0xa0
 80033ee:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        data[Bluecell_DATA] = Atten_Offset_QPC6614(ATT_A_EN_150M_Table,data[Bluecell_DATA]);
 80033f2:	46ee      	mov	lr, sp
 80033f4:	78e3      	ldrb	r3, [r4, #3]
 80033f6:	4dad      	ldr	r5, [pc, #692]	; (80036ac <Atten_Operate_Mem_RW+0x3f4>)
 80033f8:	930c      	str	r3, [sp, #48]	; 0x30
 80033fa:	f8d5 8000 	ldr.w	r8, [r5]
 80033fe:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003402:	68aa      	ldr	r2, [r5, #8]
 8003404:	68eb      	ldr	r3, [r5, #12]
 8003406:	f105 0610 	add.w	r6, r5, #16
 800340a:	3540      	adds	r5, #64	; 0x40
 800340c:	4677      	mov	r7, lr
 800340e:	6830      	ldr	r0, [r6, #0]
 8003410:	6871      	ldr	r1, [r6, #4]
 8003412:	3608      	adds	r6, #8
 8003414:	c703      	stmia	r7!, {r0, r1}
 8003416:	42ae      	cmp	r6, r5
 8003418:	46be      	mov	lr, r7
 800341a:	d1f7      	bne.n	800340c <Atten_Operate_Mem_RW+0x154>
 800341c:	4640      	mov	r0, r8
 800341e:	4661      	mov	r1, ip
 8003420:	f7fe fdac 	bl	8001f7c <Atten_Offset_QPC6614>
        Atten_Setting.ATT_A_CH_150M       = data[Bluecell_DATA];
 8003424:	4ba2      	ldr	r3, [pc, #648]	; (80036b0 <Atten_Operate_Mem_RW+0x3f8>)
        data[Bluecell_DATA] = Atten_Offset_QPC6614(ATT_A_EN_150M_Table,data[Bluecell_DATA]);
 8003426:	70e0      	strb	r0, [r4, #3]
        Atten_Setting.ATT_A_CH_150M       = data[Bluecell_DATA];
 8003428:	7198      	strb	r0, [r3, #6]
        break;
 800342a:	e7dc      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
        data[Bluecell_DATA]     = Atten_Offset_QPC6614(ATT_A_EN_WIFI1_2_4Ghz_Table,data[Bluecell_DATA]);
 800342c:	46ee      	mov	lr, sp
 800342e:	78e3      	ldrb	r3, [r4, #3]
 8003430:	4da0      	ldr	r5, [pc, #640]	; (80036b4 <Atten_Operate_Mem_RW+0x3fc>)
 8003432:	930c      	str	r3, [sp, #48]	; 0x30
 8003434:	f8d5 8000 	ldr.w	r8, [r5]
 8003438:	f8d5 c004 	ldr.w	ip, [r5, #4]
 800343c:	68aa      	ldr	r2, [r5, #8]
 800343e:	68eb      	ldr	r3, [r5, #12]
 8003440:	f105 0610 	add.w	r6, r5, #16
 8003444:	3540      	adds	r5, #64	; 0x40
 8003446:	4677      	mov	r7, lr
 8003448:	6830      	ldr	r0, [r6, #0]
 800344a:	6871      	ldr	r1, [r6, #4]
 800344c:	3608      	adds	r6, #8
 800344e:	c703      	stmia	r7!, {r0, r1}
 8003450:	42ae      	cmp	r6, r5
 8003452:	46be      	mov	lr, r7
 8003454:	d1f7      	bne.n	8003446 <Atten_Operate_Mem_RW+0x18e>
 8003456:	4640      	mov	r0, r8
 8003458:	4661      	mov	r1, ip
 800345a:	f7fe fd8f 	bl	8001f7c <Atten_Offset_QPC6614>
        data[Bluecell_DATA + 1] = Atten_Offset_QPC6614(ATT_A_EN_WIFI2_2_4Ghz_Table,data[Bluecell_DATA + 1]);
 800345e:	46ee      	mov	lr, sp
 8003460:	7923      	ldrb	r3, [r4, #4]
 8003462:	4d95      	ldr	r5, [pc, #596]	; (80036b8 <Atten_Operate_Mem_RW+0x400>)
        data[Bluecell_DATA]     = Atten_Offset_QPC6614(ATT_A_EN_WIFI1_2_4Ghz_Table,data[Bluecell_DATA]);
 8003464:	70e0      	strb	r0, [r4, #3]
        data[Bluecell_DATA + 1] = Atten_Offset_QPC6614(ATT_A_EN_WIFI2_2_4Ghz_Table,data[Bluecell_DATA + 1]);
 8003466:	930c      	str	r3, [sp, #48]	; 0x30
 8003468:	f8d5 8000 	ldr.w	r8, [r5]
 800346c:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003470:	68aa      	ldr	r2, [r5, #8]
 8003472:	68eb      	ldr	r3, [r5, #12]
 8003474:	f105 0610 	add.w	r6, r5, #16
 8003478:	3540      	adds	r5, #64	; 0x40
 800347a:	4677      	mov	r7, lr
 800347c:	6830      	ldr	r0, [r6, #0]
 800347e:	6871      	ldr	r1, [r6, #4]
 8003480:	3608      	adds	r6, #8
 8003482:	c703      	stmia	r7!, {r0, r1}
 8003484:	42ae      	cmp	r6, r5
 8003486:	46be      	mov	lr, r7
 8003488:	d1f7      	bne.n	800347a <Atten_Operate_Mem_RW+0x1c2>
 800348a:	4640      	mov	r0, r8
 800348c:	4661      	mov	r1, ip
 800348e:	f7fe fd75 	bl	8001f7c <Atten_Offset_QPC6614>
        data[Bluecell_DATA + 2] = Atten_Offset_QPC6614(ATT_A_EN_WIFI3_2_4Ghz_Table,data[Bluecell_DATA + 2]);
 8003492:	46ee      	mov	lr, sp
 8003494:	7963      	ldrb	r3, [r4, #5]
 8003496:	4d89      	ldr	r5, [pc, #548]	; (80036bc <Atten_Operate_Mem_RW+0x404>)
        data[Bluecell_DATA + 1] = Atten_Offset_QPC6614(ATT_A_EN_WIFI2_2_4Ghz_Table,data[Bluecell_DATA + 1]);
 8003498:	7120      	strb	r0, [r4, #4]
        data[Bluecell_DATA + 2] = Atten_Offset_QPC6614(ATT_A_EN_WIFI3_2_4Ghz_Table,data[Bluecell_DATA + 2]);
 800349a:	930c      	str	r3, [sp, #48]	; 0x30
 800349c:	f8d5 8000 	ldr.w	r8, [r5]
 80034a0:	f8d5 c004 	ldr.w	ip, [r5, #4]
 80034a4:	68aa      	ldr	r2, [r5, #8]
 80034a6:	68eb      	ldr	r3, [r5, #12]
 80034a8:	f105 0610 	add.w	r6, r5, #16
 80034ac:	3540      	adds	r5, #64	; 0x40
 80034ae:	4677      	mov	r7, lr
 80034b0:	6830      	ldr	r0, [r6, #0]
 80034b2:	6871      	ldr	r1, [r6, #4]
 80034b4:	3608      	adds	r6, #8
 80034b6:	c703      	stmia	r7!, {r0, r1}
 80034b8:	42ae      	cmp	r6, r5
 80034ba:	46be      	mov	lr, r7
 80034bc:	d1f7      	bne.n	80034ae <Atten_Operate_Mem_RW+0x1f6>
 80034be:	4640      	mov	r0, r8
 80034c0:	4661      	mov	r1, ip
 80034c2:	f7fe fd5b 	bl	8001f7c <Atten_Offset_QPC6614>
        data[Bluecell_DATA + 3] = Atten_Offset_QPC6614(ATT_A_EN_WIFI4_2_4Ghz_Table,data[Bluecell_DATA + 3]);
 80034c6:	46ee      	mov	lr, sp
 80034c8:	79a3      	ldrb	r3, [r4, #6]
 80034ca:	4d7d      	ldr	r5, [pc, #500]	; (80036c0 <Atten_Operate_Mem_RW+0x408>)
        data[Bluecell_DATA + 2] = Atten_Offset_QPC6614(ATT_A_EN_WIFI3_2_4Ghz_Table,data[Bluecell_DATA + 2]);
 80034cc:	7160      	strb	r0, [r4, #5]
        data[Bluecell_DATA + 3] = Atten_Offset_QPC6614(ATT_A_EN_WIFI4_2_4Ghz_Table,data[Bluecell_DATA + 3]);
 80034ce:	930c      	str	r3, [sp, #48]	; 0x30
 80034d0:	f8d5 8000 	ldr.w	r8, [r5]
 80034d4:	f8d5 c004 	ldr.w	ip, [r5, #4]
 80034d8:	68aa      	ldr	r2, [r5, #8]
 80034da:	68eb      	ldr	r3, [r5, #12]
 80034dc:	f105 0610 	add.w	r6, r5, #16
 80034e0:	3540      	adds	r5, #64	; 0x40
 80034e2:	4677      	mov	r7, lr
 80034e4:	6830      	ldr	r0, [r6, #0]
 80034e6:	6871      	ldr	r1, [r6, #4]
 80034e8:	3608      	adds	r6, #8
 80034ea:	c703      	stmia	r7!, {r0, r1}
 80034ec:	42ae      	cmp	r6, r5
 80034ee:	46be      	mov	lr, r7
 80034f0:	d1f7      	bne.n	80034e2 <Atten_Operate_Mem_RW+0x22a>
 80034f2:	4640      	mov	r0, r8
 80034f4:	4661      	mov	r1, ip
 80034f6:	f7fe fd41 	bl	8001f7c <Atten_Offset_QPC6614>
        Atten_Setting.ATT_A_CH_WIFI2_4Ghz_QPC6614_1 = data[Bluecell_DATA];
 80034fa:	78e2      	ldrb	r2, [r4, #3]
 80034fc:	4b6c      	ldr	r3, [pc, #432]	; (80036b0 <Atten_Operate_Mem_RW+0x3f8>)
        data[Bluecell_DATA + 3] = Atten_Offset_QPC6614(ATT_A_EN_WIFI4_2_4Ghz_Table,data[Bluecell_DATA + 3]);
 80034fe:	71a0      	strb	r0, [r4, #6]
        Atten_Setting.ATT_A_CH_WIFI2_4Ghz_QPC6614_1 = data[Bluecell_DATA];
 8003500:	71da      	strb	r2, [r3, #7]
        Atten_Setting.ATT_A_CH_WIFI2_4Ghz_QPC6614_2 = data[Bluecell_DATA + 1];
 8003502:	7922      	ldrb	r2, [r4, #4]
 8003504:	721a      	strb	r2, [r3, #8]
        Atten_Setting.ATT_A_CH_WIFI2_4Ghz_QPC6614_3 = data[Bluecell_DATA + 2];
 8003506:	7962      	ldrb	r2, [r4, #5]
 8003508:	725a      	strb	r2, [r3, #9]
        Atten_Setting.ATT_A_CH_WIFI2_4Ghz_QPC6614_4 = data[Bluecell_DATA + 3];
 800350a:	79a2      	ldrb	r2, [r4, #6]
 800350c:	729a      	strb	r2, [r3, #10]
        Atten_Setting.ATT_Ctrl_index                = data[Bluecell_DATA + 4];
 800350e:	79e2      	ldrb	r2, [r4, #7]
 8003510:	f883 2030 	strb.w	r2, [r3, #48]	; 0x30
        break;
 8003514:	e767      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
        data[Bluecell_DATA]     = Atten_Offset_QPC6614(ATT_A_EN_WIFI1_5_8Ghz_Table,data[Bluecell_DATA]);
 8003516:	46ee      	mov	lr, sp
 8003518:	78e3      	ldrb	r3, [r4, #3]
 800351a:	4d6a      	ldr	r5, [pc, #424]	; (80036c4 <Atten_Operate_Mem_RW+0x40c>)
 800351c:	930c      	str	r3, [sp, #48]	; 0x30
 800351e:	f8d5 8000 	ldr.w	r8, [r5]
 8003522:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003526:	68aa      	ldr	r2, [r5, #8]
 8003528:	68eb      	ldr	r3, [r5, #12]
 800352a:	f105 0610 	add.w	r6, r5, #16
 800352e:	3540      	adds	r5, #64	; 0x40
 8003530:	4677      	mov	r7, lr
 8003532:	6830      	ldr	r0, [r6, #0]
 8003534:	6871      	ldr	r1, [r6, #4]
 8003536:	3608      	adds	r6, #8
 8003538:	c703      	stmia	r7!, {r0, r1}
 800353a:	42ae      	cmp	r6, r5
 800353c:	46be      	mov	lr, r7
 800353e:	d1f7      	bne.n	8003530 <Atten_Operate_Mem_RW+0x278>
 8003540:	4640      	mov	r0, r8
 8003542:	4661      	mov	r1, ip
 8003544:	f7fe fd1a 	bl	8001f7c <Atten_Offset_QPC6614>
        data[Bluecell_DATA + 1] = Atten_Offset_QPC6614(ATT_A_EN_WIFI2_5_8Ghz_Table,data[Bluecell_DATA + 1]);
 8003548:	46ee      	mov	lr, sp
 800354a:	7923      	ldrb	r3, [r4, #4]
 800354c:	4d5e      	ldr	r5, [pc, #376]	; (80036c8 <Atten_Operate_Mem_RW+0x410>)
        data[Bluecell_DATA]     = Atten_Offset_QPC6614(ATT_A_EN_WIFI1_5_8Ghz_Table,data[Bluecell_DATA]);
 800354e:	70e0      	strb	r0, [r4, #3]
        data[Bluecell_DATA + 1] = Atten_Offset_QPC6614(ATT_A_EN_WIFI2_5_8Ghz_Table,data[Bluecell_DATA + 1]);
 8003550:	930c      	str	r3, [sp, #48]	; 0x30
 8003552:	f8d5 8000 	ldr.w	r8, [r5]
 8003556:	f8d5 c004 	ldr.w	ip, [r5, #4]
 800355a:	68aa      	ldr	r2, [r5, #8]
 800355c:	68eb      	ldr	r3, [r5, #12]
 800355e:	f105 0610 	add.w	r6, r5, #16
 8003562:	3540      	adds	r5, #64	; 0x40
 8003564:	4677      	mov	r7, lr
 8003566:	6830      	ldr	r0, [r6, #0]
 8003568:	6871      	ldr	r1, [r6, #4]
 800356a:	3608      	adds	r6, #8
 800356c:	c703      	stmia	r7!, {r0, r1}
 800356e:	42ae      	cmp	r6, r5
 8003570:	46be      	mov	lr, r7
 8003572:	d1f7      	bne.n	8003564 <Atten_Operate_Mem_RW+0x2ac>
 8003574:	4640      	mov	r0, r8
 8003576:	4661      	mov	r1, ip
 8003578:	f7fe fd00 	bl	8001f7c <Atten_Offset_QPC6614>
        data[Bluecell_DATA + 2] = Atten_Offset_QPC6614(ATT_A_EN_WIFI3_5_8Ghz_Table,data[Bluecell_DATA + 2]);
 800357c:	46ee      	mov	lr, sp
 800357e:	7963      	ldrb	r3, [r4, #5]
 8003580:	4d52      	ldr	r5, [pc, #328]	; (80036cc <Atten_Operate_Mem_RW+0x414>)
        data[Bluecell_DATA + 1] = Atten_Offset_QPC6614(ATT_A_EN_WIFI2_5_8Ghz_Table,data[Bluecell_DATA + 1]);
 8003582:	7120      	strb	r0, [r4, #4]
        data[Bluecell_DATA + 2] = Atten_Offset_QPC6614(ATT_A_EN_WIFI3_5_8Ghz_Table,data[Bluecell_DATA + 2]);
 8003584:	930c      	str	r3, [sp, #48]	; 0x30
 8003586:	f8d5 8000 	ldr.w	r8, [r5]
 800358a:	f8d5 c004 	ldr.w	ip, [r5, #4]
 800358e:	68aa      	ldr	r2, [r5, #8]
 8003590:	68eb      	ldr	r3, [r5, #12]
 8003592:	f105 0610 	add.w	r6, r5, #16
 8003596:	3540      	adds	r5, #64	; 0x40
 8003598:	4677      	mov	r7, lr
 800359a:	6830      	ldr	r0, [r6, #0]
 800359c:	6871      	ldr	r1, [r6, #4]
 800359e:	3608      	adds	r6, #8
 80035a0:	c703      	stmia	r7!, {r0, r1}
 80035a2:	42ae      	cmp	r6, r5
 80035a4:	46be      	mov	lr, r7
 80035a6:	d1f7      	bne.n	8003598 <Atten_Operate_Mem_RW+0x2e0>
 80035a8:	4640      	mov	r0, r8
 80035aa:	4661      	mov	r1, ip
 80035ac:	f7fe fce6 	bl	8001f7c <Atten_Offset_QPC6614>
        data[Bluecell_DATA + 3] = Atten_Offset_QPC6614(ATT_A_EN_WIFI4_5_8Ghz_Table,data[Bluecell_DATA + 3]);            
 80035b0:	46ee      	mov	lr, sp
 80035b2:	79a3      	ldrb	r3, [r4, #6]
 80035b4:	4d46      	ldr	r5, [pc, #280]	; (80036d0 <Atten_Operate_Mem_RW+0x418>)
        data[Bluecell_DATA + 2] = Atten_Offset_QPC6614(ATT_A_EN_WIFI3_5_8Ghz_Table,data[Bluecell_DATA + 2]);
 80035b6:	7160      	strb	r0, [r4, #5]
        data[Bluecell_DATA + 3] = Atten_Offset_QPC6614(ATT_A_EN_WIFI4_5_8Ghz_Table,data[Bluecell_DATA + 3]);            
 80035b8:	930c      	str	r3, [sp, #48]	; 0x30
 80035ba:	f8d5 8000 	ldr.w	r8, [r5]
 80035be:	f8d5 c004 	ldr.w	ip, [r5, #4]
 80035c2:	68aa      	ldr	r2, [r5, #8]
 80035c4:	68eb      	ldr	r3, [r5, #12]
 80035c6:	f105 0610 	add.w	r6, r5, #16
 80035ca:	3540      	adds	r5, #64	; 0x40
 80035cc:	4677      	mov	r7, lr
 80035ce:	6830      	ldr	r0, [r6, #0]
 80035d0:	6871      	ldr	r1, [r6, #4]
 80035d2:	3608      	adds	r6, #8
 80035d4:	c703      	stmia	r7!, {r0, r1}
 80035d6:	42ae      	cmp	r6, r5
 80035d8:	46be      	mov	lr, r7
 80035da:	d1f7      	bne.n	80035cc <Atten_Operate_Mem_RW+0x314>
 80035dc:	4640      	mov	r0, r8
 80035de:	4661      	mov	r1, ip
 80035e0:	f7fe fccc 	bl	8001f7c <Atten_Offset_QPC6614>
        Atten_Setting.ATT_A_CH_WIFI5_8Ghz_QPC6614_1 = data[Bluecell_DATA    ];
 80035e4:	78e2      	ldrb	r2, [r4, #3]
 80035e6:	4b32      	ldr	r3, [pc, #200]	; (80036b0 <Atten_Operate_Mem_RW+0x3f8>)
        data[Bluecell_DATA + 3] = Atten_Offset_QPC6614(ATT_A_EN_WIFI4_5_8Ghz_Table,data[Bluecell_DATA + 3]);            
 80035e8:	71a0      	strb	r0, [r4, #6]
        Atten_Setting.ATT_A_CH_WIFI5_8Ghz_QPC6614_1 = data[Bluecell_DATA    ];
 80035ea:	72da      	strb	r2, [r3, #11]
        Atten_Setting.ATT_A_CH_WIFI5_8Ghz_QPC6614_2 = data[Bluecell_DATA + 1];
 80035ec:	7922      	ldrb	r2, [r4, #4]
 80035ee:	731a      	strb	r2, [r3, #12]
        Atten_Setting.ATT_A_CH_WIFI5_8Ghz_QPC6614_3 = data[Bluecell_DATA + 2];
 80035f0:	7962      	ldrb	r2, [r4, #5]
 80035f2:	735a      	strb	r2, [r3, #13]
        Atten_Setting.ATT_A_CH_WIFI5_8Ghz_QPC6614_4 = data[Bluecell_DATA + 3];
 80035f4:	79a2      	ldrb	r2, [r4, #6]
 80035f6:	739a      	strb	r2, [r3, #14]
 80035f8:	e789      	b.n	800350e <Atten_Operate_Mem_RW+0x256>
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_28_28_5Ghz_Table,data[Bluecell_DATA]);
 80035fa:	46ee      	mov	lr, sp
 80035fc:	78e3      	ldrb	r3, [r4, #3]
 80035fe:	4d35      	ldr	r5, [pc, #212]	; (80036d4 <Atten_Operate_Mem_RW+0x41c>)
 8003600:	930c      	str	r3, [sp, #48]	; 0x30
 8003602:	f8d5 8000 	ldr.w	r8, [r5]
 8003606:	f8d5 c004 	ldr.w	ip, [r5, #4]
 800360a:	68aa      	ldr	r2, [r5, #8]
 800360c:	68eb      	ldr	r3, [r5, #12]
 800360e:	f105 0610 	add.w	r6, r5, #16
 8003612:	3540      	adds	r5, #64	; 0x40
 8003614:	4677      	mov	r7, lr
 8003616:	6830      	ldr	r0, [r6, #0]
 8003618:	6871      	ldr	r1, [r6, #4]
 800361a:	3608      	adds	r6, #8
 800361c:	c703      	stmia	r7!, {r0, r1}
 800361e:	42ae      	cmp	r6, r5
 8003620:	46be      	mov	lr, r7
 8003622:	d1f7      	bne.n	8003614 <Atten_Operate_Mem_RW+0x35c>
 8003624:	4640      	mov	r0, r8
 8003626:	4661      	mov	r1, ip
 8003628:	f7fe fe98 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_28_28_5Ghz_Table,data[Bluecell_DATA + 1]);
 800362c:	46ee      	mov	lr, sp
 800362e:	7923      	ldrb	r3, [r4, #4]
 8003630:	4d29      	ldr	r5, [pc, #164]	; (80036d8 <Atten_Operate_Mem_RW+0x420>)
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_28_28_5Ghz_Table,data[Bluecell_DATA]);
 8003632:	70e0      	strb	r0, [r4, #3]
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_28_28_5Ghz_Table,data[Bluecell_DATA + 1]);
 8003634:	930c      	str	r3, [sp, #48]	; 0x30
 8003636:	f8d5 8000 	ldr.w	r8, [r5]
 800363a:	f8d5 c004 	ldr.w	ip, [r5, #4]
 800363e:	68aa      	ldr	r2, [r5, #8]
 8003640:	68eb      	ldr	r3, [r5, #12]
 8003642:	f105 0610 	add.w	r6, r5, #16
 8003646:	3540      	adds	r5, #64	; 0x40
 8003648:	4677      	mov	r7, lr
 800364a:	6830      	ldr	r0, [r6, #0]
 800364c:	6871      	ldr	r1, [r6, #4]
 800364e:	3608      	adds	r6, #8
 8003650:	c703      	stmia	r7!, {r0, r1}
 8003652:	42ae      	cmp	r6, r5
 8003654:	46be      	mov	lr, r7
 8003656:	d1f7      	bne.n	8003648 <Atten_Operate_Mem_RW+0x390>
 8003658:	4640      	mov	r0, r8
 800365a:	4661      	mov	r1, ip
 800365c:	f7fe fe7e 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_28_28_5Ghz_Table,data[Bluecell_DATA + 2]);            
 8003660:	46ee      	mov	lr, sp
 8003662:	7963      	ldrb	r3, [r4, #5]
 8003664:	4d1d      	ldr	r5, [pc, #116]	; (80036dc <Atten_Operate_Mem_RW+0x424>)
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_28_28_5Ghz_Table,data[Bluecell_DATA + 1]);
 8003666:	7120      	strb	r0, [r4, #4]
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_28_28_5Ghz_Table,data[Bluecell_DATA + 2]);            
 8003668:	930c      	str	r3, [sp, #48]	; 0x30
 800366a:	f8d5 8000 	ldr.w	r8, [r5]
 800366e:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003672:	68aa      	ldr	r2, [r5, #8]
 8003674:	68eb      	ldr	r3, [r5, #12]
 8003676:	f105 0610 	add.w	r6, r5, #16
 800367a:	3540      	adds	r5, #64	; 0x40
 800367c:	4677      	mov	r7, lr
 800367e:	6830      	ldr	r0, [r6, #0]
 8003680:	6871      	ldr	r1, [r6, #4]
 8003682:	3608      	adds	r6, #8
 8003684:	c703      	stmia	r7!, {r0, r1}
 8003686:	42ae      	cmp	r6, r5
 8003688:	46be      	mov	lr, r7
 800368a:	d1f7      	bne.n	800367c <Atten_Operate_Mem_RW+0x3c4>
 800368c:	4640      	mov	r0, r8
 800368e:	4661      	mov	r1, ip
 8003690:	f7fe fd6c 	bl	800216c <Atten_Offset_ADRF5720>
        Atten_Setting.ATT_A_CH_30G_28_28_5_HMC939_1   = data[Bluecell_DATA];
 8003694:	78e2      	ldrb	r2, [r4, #3]
 8003696:	4b06      	ldr	r3, [pc, #24]	; (80036b0 <Atten_Operate_Mem_RW+0x3f8>)
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_28_28_5Ghz_Table,data[Bluecell_DATA + 2]);            
 8003698:	7160      	strb	r0, [r4, #5]
        Atten_Setting.ATT_A_CH_30G_28_28_5_HMC939_1   = data[Bluecell_DATA];
 800369a:	73da      	strb	r2, [r3, #15]
        Atten_Setting.ATT_A_CH_30G_28_28_5_HMC939_2   = data[Bluecell_DATA + 1];
 800369c:	7922      	ldrb	r2, [r4, #4]
 800369e:	741a      	strb	r2, [r3, #16]
        Atten_Setting.ATT_A_CH_30G_28_28_5_ADRF5720_1 = data[Bluecell_DATA + 2];        
 80036a0:	7962      	ldrb	r2, [r4, #5]
 80036a2:	745a      	strb	r2, [r3, #17]
        Atten_Setting.ATT_Ctrl_index                 = data[Bluecell_DATA + 3];
 80036a4:	79a2      	ldrb	r2, [r4, #6]
 80036a6:	e733      	b.n	8003510 <Atten_Operate_Mem_RW+0x258>
 80036a8:	20000766 	.word	0x20000766
 80036ac:	20000791 	.word	0x20000791
 80036b0:	20000760 	.word	0x20000760
 80036b4:	200002a0 	.word	0x200002a0
 80036b8:	20000ad1 	.word	0x20000ad1
 80036bc:	20000360 	.word	0x20000360
 80036c0:	200001a0 	.word	0x200001a0
 80036c4:	200009d1 	.word	0x200009d1
 80036c8:	20000b51 	.word	0x20000b51
 80036cc:	200006a0 	.word	0x200006a0
 80036d0:	20000720 	.word	0x20000720
 80036d4:	200005e0 	.word	0x200005e0
 80036d8:	20000a91 	.word	0x20000a91
 80036dc:	200006e0 	.word	0x200006e0
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_28_5_29Ghz_Table,data[Bluecell_DATA]);
 80036e0:	46ee      	mov	lr, sp
 80036e2:	78e3      	ldrb	r3, [r4, #3]
 80036e4:	4dc3      	ldr	r5, [pc, #780]	; (80039f4 <Atten_Operate_Mem_RW+0x73c>)
 80036e6:	930c      	str	r3, [sp, #48]	; 0x30
 80036e8:	f8d5 8000 	ldr.w	r8, [r5]
 80036ec:	f8d5 c004 	ldr.w	ip, [r5, #4]
 80036f0:	68aa      	ldr	r2, [r5, #8]
 80036f2:	68eb      	ldr	r3, [r5, #12]
 80036f4:	f105 0610 	add.w	r6, r5, #16
 80036f8:	3540      	adds	r5, #64	; 0x40
 80036fa:	4677      	mov	r7, lr
 80036fc:	6830      	ldr	r0, [r6, #0]
 80036fe:	6871      	ldr	r1, [r6, #4]
 8003700:	3608      	adds	r6, #8
 8003702:	c703      	stmia	r7!, {r0, r1}
 8003704:	42ae      	cmp	r6, r5
 8003706:	46be      	mov	lr, r7
 8003708:	d1f7      	bne.n	80036fa <Atten_Operate_Mem_RW+0x442>
 800370a:	4640      	mov	r0, r8
 800370c:	4661      	mov	r1, ip
 800370e:	f7fe fe25 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_28_5_29Ghz_Table,data[Bluecell_DATA + 1]);
 8003712:	46ee      	mov	lr, sp
 8003714:	7923      	ldrb	r3, [r4, #4]
 8003716:	4db8      	ldr	r5, [pc, #736]	; (80039f8 <Atten_Operate_Mem_RW+0x740>)
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_28_5_29Ghz_Table,data[Bluecell_DATA]);
 8003718:	70e0      	strb	r0, [r4, #3]
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_28_5_29Ghz_Table,data[Bluecell_DATA + 1]);
 800371a:	930c      	str	r3, [sp, #48]	; 0x30
 800371c:	f8d5 8000 	ldr.w	r8, [r5]
 8003720:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003724:	68aa      	ldr	r2, [r5, #8]
 8003726:	68eb      	ldr	r3, [r5, #12]
 8003728:	f105 0610 	add.w	r6, r5, #16
 800372c:	3540      	adds	r5, #64	; 0x40
 800372e:	4677      	mov	r7, lr
 8003730:	6830      	ldr	r0, [r6, #0]
 8003732:	6871      	ldr	r1, [r6, #4]
 8003734:	3608      	adds	r6, #8
 8003736:	c703      	stmia	r7!, {r0, r1}
 8003738:	42ae      	cmp	r6, r5
 800373a:	46be      	mov	lr, r7
 800373c:	d1f7      	bne.n	800372e <Atten_Operate_Mem_RW+0x476>
 800373e:	4640      	mov	r0, r8
 8003740:	4661      	mov	r1, ip
 8003742:	f7fe fe0b 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_28_5_29Ghz_Table,data[Bluecell_DATA + 2]);   
 8003746:	46ee      	mov	lr, sp
 8003748:	7963      	ldrb	r3, [r4, #5]
 800374a:	4dac      	ldr	r5, [pc, #688]	; (80039fc <Atten_Operate_Mem_RW+0x744>)
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_28_5_29Ghz_Table,data[Bluecell_DATA + 1]);
 800374c:	7120      	strb	r0, [r4, #4]
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_28_5_29Ghz_Table,data[Bluecell_DATA + 2]);   
 800374e:	930c      	str	r3, [sp, #48]	; 0x30
 8003750:	f8d5 8000 	ldr.w	r8, [r5]
 8003754:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003758:	68aa      	ldr	r2, [r5, #8]
 800375a:	68eb      	ldr	r3, [r5, #12]
 800375c:	f105 0610 	add.w	r6, r5, #16
 8003760:	3540      	adds	r5, #64	; 0x40
 8003762:	4677      	mov	r7, lr
 8003764:	6830      	ldr	r0, [r6, #0]
 8003766:	6871      	ldr	r1, [r6, #4]
 8003768:	3608      	adds	r6, #8
 800376a:	c703      	stmia	r7!, {r0, r1}
 800376c:	42ae      	cmp	r6, r5
 800376e:	46be      	mov	lr, r7
 8003770:	d1f7      	bne.n	8003762 <Atten_Operate_Mem_RW+0x4aa>
 8003772:	4640      	mov	r0, r8
 8003774:	4661      	mov	r1, ip
 8003776:	f7fe fcf9 	bl	800216c <Atten_Offset_ADRF5720>
        Atten_Setting.ATT_A_CH_30G_28_5_29_HMC939_1  = data[Bluecell_DATA];
 800377a:	78e2      	ldrb	r2, [r4, #3]
 800377c:	4ba0      	ldr	r3, [pc, #640]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_28_5_29Ghz_Table,data[Bluecell_DATA + 2]);   
 800377e:	7160      	strb	r0, [r4, #5]
        Atten_Setting.ATT_A_CH_30G_28_5_29_HMC939_1  = data[Bluecell_DATA];
 8003780:	749a      	strb	r2, [r3, #18]
        Atten_Setting.ATT_A_CH_30G_28_5_29_HMC939_2  = data[Bluecell_DATA + 1];
 8003782:	7922      	ldrb	r2, [r4, #4]
 8003784:	74da      	strb	r2, [r3, #19]
        Atten_Setting.ATT_A_CH_30G_28_5_29_ADRF5720_1= data[Bluecell_DATA + 2]; 
 8003786:	7962      	ldrb	r2, [r4, #5]
 8003788:	751a      	strb	r2, [r3, #20]
 800378a:	e78b      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_29_29_5Ghz_Table,data[Bluecell_DATA]);
 800378c:	46ee      	mov	lr, sp
 800378e:	78e3      	ldrb	r3, [r4, #3]
 8003790:	4d9c      	ldr	r5, [pc, #624]	; (8003a04 <Atten_Operate_Mem_RW+0x74c>)
 8003792:	930c      	str	r3, [sp, #48]	; 0x30
 8003794:	f8d5 8000 	ldr.w	r8, [r5]
 8003798:	f8d5 c004 	ldr.w	ip, [r5, #4]
 800379c:	68aa      	ldr	r2, [r5, #8]
 800379e:	68eb      	ldr	r3, [r5, #12]
 80037a0:	f105 0610 	add.w	r6, r5, #16
 80037a4:	3540      	adds	r5, #64	; 0x40
 80037a6:	4677      	mov	r7, lr
 80037a8:	6830      	ldr	r0, [r6, #0]
 80037aa:	6871      	ldr	r1, [r6, #4]
 80037ac:	3608      	adds	r6, #8
 80037ae:	c703      	stmia	r7!, {r0, r1}
 80037b0:	42ae      	cmp	r6, r5
 80037b2:	46be      	mov	lr, r7
 80037b4:	d1f7      	bne.n	80037a6 <Atten_Operate_Mem_RW+0x4ee>
 80037b6:	4640      	mov	r0, r8
 80037b8:	4661      	mov	r1, ip
 80037ba:	f7fe fdcf 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_29_29_5Ghz_Table,data[Bluecell_DATA + 1]);
 80037be:	46ee      	mov	lr, sp
 80037c0:	7923      	ldrb	r3, [r4, #4]
 80037c2:	4d91      	ldr	r5, [pc, #580]	; (8003a08 <Atten_Operate_Mem_RW+0x750>)
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_29_29_5Ghz_Table,data[Bluecell_DATA]);
 80037c4:	70e0      	strb	r0, [r4, #3]
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_29_29_5Ghz_Table,data[Bluecell_DATA + 1]);
 80037c6:	930c      	str	r3, [sp, #48]	; 0x30
 80037c8:	f8d5 8000 	ldr.w	r8, [r5]
 80037cc:	f8d5 c004 	ldr.w	ip, [r5, #4]
 80037d0:	68aa      	ldr	r2, [r5, #8]
 80037d2:	68eb      	ldr	r3, [r5, #12]
 80037d4:	f105 0610 	add.w	r6, r5, #16
 80037d8:	3540      	adds	r5, #64	; 0x40
 80037da:	4677      	mov	r7, lr
 80037dc:	6830      	ldr	r0, [r6, #0]
 80037de:	6871      	ldr	r1, [r6, #4]
 80037e0:	3608      	adds	r6, #8
 80037e2:	c703      	stmia	r7!, {r0, r1}
 80037e4:	42ae      	cmp	r6, r5
 80037e6:	46be      	mov	lr, r7
 80037e8:	d1f7      	bne.n	80037da <Atten_Operate_Mem_RW+0x522>
 80037ea:	4640      	mov	r0, r8
 80037ec:	4661      	mov	r1, ip
 80037ee:	f7fe fdb5 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_29_29_5Ghz_Table,data[Bluecell_DATA + 2]);
 80037f2:	46ee      	mov	lr, sp
 80037f4:	7963      	ldrb	r3, [r4, #5]
 80037f6:	4d85      	ldr	r5, [pc, #532]	; (8003a0c <Atten_Operate_Mem_RW+0x754>)
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_29_29_5Ghz_Table,data[Bluecell_DATA + 1]);
 80037f8:	7120      	strb	r0, [r4, #4]
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_29_29_5Ghz_Table,data[Bluecell_DATA + 2]);
 80037fa:	930c      	str	r3, [sp, #48]	; 0x30
 80037fc:	f8d5 8000 	ldr.w	r8, [r5]
 8003800:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003804:	68aa      	ldr	r2, [r5, #8]
 8003806:	68eb      	ldr	r3, [r5, #12]
 8003808:	f105 0610 	add.w	r6, r5, #16
 800380c:	3540      	adds	r5, #64	; 0x40
 800380e:	4677      	mov	r7, lr
 8003810:	6830      	ldr	r0, [r6, #0]
 8003812:	6871      	ldr	r1, [r6, #4]
 8003814:	3608      	adds	r6, #8
 8003816:	c703      	stmia	r7!, {r0, r1}
 8003818:	42ae      	cmp	r6, r5
 800381a:	46be      	mov	lr, r7
 800381c:	d1f7      	bne.n	800380e <Atten_Operate_Mem_RW+0x556>
 800381e:	4640      	mov	r0, r8
 8003820:	4661      	mov	r1, ip
 8003822:	f7fe fca3 	bl	800216c <Atten_Offset_ADRF5720>
        Atten_Setting.ATT_A_CH_30G_29_29_5_HMC939_1  = data[Bluecell_DATA ];
 8003826:	78e2      	ldrb	r2, [r4, #3]
 8003828:	4b75      	ldr	r3, [pc, #468]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_29_29_5Ghz_Table,data[Bluecell_DATA + 2]);
 800382a:	7160      	strb	r0, [r4, #5]
        Atten_Setting.ATT_A_CH_30G_29_29_5_HMC939_1  = data[Bluecell_DATA ];
 800382c:	755a      	strb	r2, [r3, #21]
        Atten_Setting.ATT_A_CH_30G_29_29_5_HMC939_2  = data[Bluecell_DATA  + 1];
 800382e:	7922      	ldrb	r2, [r4, #4]
 8003830:	759a      	strb	r2, [r3, #22]
        Atten_Setting.ATT_A_CH_30G_29_29_5_ADRF5720_1= data[Bluecell_DATA  + 2];
 8003832:	7962      	ldrb	r2, [r4, #5]
 8003834:	75da      	strb	r2, [r3, #23]
 8003836:	e735      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_29_29_5Ghz_Table,data[Bluecell_DATA]);
 8003838:	46ee      	mov	lr, sp
 800383a:	78e3      	ldrb	r3, [r4, #3]
 800383c:	4d71      	ldr	r5, [pc, #452]	; (8003a04 <Atten_Operate_Mem_RW+0x74c>)
 800383e:	930c      	str	r3, [sp, #48]	; 0x30
 8003840:	f8d5 8000 	ldr.w	r8, [r5]
 8003844:	f8d5 c004 	ldr.w	ip, [r5, #4]
 8003848:	68aa      	ldr	r2, [r5, #8]
 800384a:	68eb      	ldr	r3, [r5, #12]
 800384c:	f105 0610 	add.w	r6, r5, #16
 8003850:	3540      	adds	r5, #64	; 0x40
 8003852:	4677      	mov	r7, lr
 8003854:	6830      	ldr	r0, [r6, #0]
 8003856:	6871      	ldr	r1, [r6, #4]
 8003858:	3608      	adds	r6, #8
 800385a:	c703      	stmia	r7!, {r0, r1}
 800385c:	42ae      	cmp	r6, r5
 800385e:	46be      	mov	lr, r7
 8003860:	d1f7      	bne.n	8003852 <Atten_Operate_Mem_RW+0x59a>
 8003862:	4640      	mov	r0, r8
 8003864:	4661      	mov	r1, ip
 8003866:	f7fe fd79 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_29_29_5Ghz_Table,data[Bluecell_DATA + 1]);
 800386a:	46ee      	mov	lr, sp
 800386c:	7923      	ldrb	r3, [r4, #4]
 800386e:	4d66      	ldr	r5, [pc, #408]	; (8003a08 <Atten_Operate_Mem_RW+0x750>)
        data[Bluecell_DATA]     = Atten_Offset_HMC939(ATT_A_EN_30G1_29_29_5Ghz_Table,data[Bluecell_DATA]);
 8003870:	70e0      	strb	r0, [r4, #3]
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_29_29_5Ghz_Table,data[Bluecell_DATA + 1]);
 8003872:	930c      	str	r3, [sp, #48]	; 0x30
 8003874:	f8d5 8000 	ldr.w	r8, [r5]
 8003878:	f8d5 c004 	ldr.w	ip, [r5, #4]
 800387c:	68aa      	ldr	r2, [r5, #8]
 800387e:	68eb      	ldr	r3, [r5, #12]
 8003880:	f105 0610 	add.w	r6, r5, #16
 8003884:	3540      	adds	r5, #64	; 0x40
 8003886:	4677      	mov	r7, lr
 8003888:	6830      	ldr	r0, [r6, #0]
 800388a:	6871      	ldr	r1, [r6, #4]
 800388c:	3608      	adds	r6, #8
 800388e:	c703      	stmia	r7!, {r0, r1}
 8003890:	42ae      	cmp	r6, r5
 8003892:	46be      	mov	lr, r7
 8003894:	d1f7      	bne.n	8003886 <Atten_Operate_Mem_RW+0x5ce>
 8003896:	4640      	mov	r0, r8
 8003898:	4661      	mov	r1, ip
 800389a:	f7fe fd5f 	bl	800235c <Atten_Offset_HMC939>
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_29_29_5Ghz_Table,data[Bluecell_DATA + 2]);            
 800389e:	46ee      	mov	lr, sp
 80038a0:	7963      	ldrb	r3, [r4, #5]
 80038a2:	4d5a      	ldr	r5, [pc, #360]	; (8003a0c <Atten_Operate_Mem_RW+0x754>)
        data[Bluecell_DATA + 1] = Atten_Offset_HMC939(ATT_A_EN_30G2_29_29_5Ghz_Table,data[Bluecell_DATA + 1]);
 80038a4:	7120      	strb	r0, [r4, #4]
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_29_29_5Ghz_Table,data[Bluecell_DATA + 2]);            
 80038a6:	930c      	str	r3, [sp, #48]	; 0x30
 80038a8:	f8d5 8000 	ldr.w	r8, [r5]
 80038ac:	f8d5 c004 	ldr.w	ip, [r5, #4]
 80038b0:	68aa      	ldr	r2, [r5, #8]
 80038b2:	68eb      	ldr	r3, [r5, #12]
 80038b4:	f105 0610 	add.w	r6, r5, #16
 80038b8:	3540      	adds	r5, #64	; 0x40
 80038ba:	4677      	mov	r7, lr
 80038bc:	6830      	ldr	r0, [r6, #0]
 80038be:	6871      	ldr	r1, [r6, #4]
 80038c0:	3608      	adds	r6, #8
 80038c2:	c703      	stmia	r7!, {r0, r1}
 80038c4:	42ae      	cmp	r6, r5
 80038c6:	46be      	mov	lr, r7
 80038c8:	d1f7      	bne.n	80038ba <Atten_Operate_Mem_RW+0x602>
 80038ca:	4640      	mov	r0, r8
 80038cc:	4661      	mov	r1, ip
 80038ce:	f7fe fc4d 	bl	800216c <Atten_Offset_ADRF5720>
        Atten_Setting.ATT_A_CH_30G_29_5_30_HMC939_1  = data[Bluecell_DATA];
 80038d2:	78e2      	ldrb	r2, [r4, #3]
 80038d4:	4b4a      	ldr	r3, [pc, #296]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
        data[Bluecell_DATA + 2] = Atten_Offset_ADRF5720(ATT_A_EN_30G3_29_29_5Ghz_Table,data[Bluecell_DATA + 2]);            
 80038d6:	7160      	strb	r0, [r4, #5]
        Atten_Setting.ATT_A_CH_30G_29_5_30_HMC939_1  = data[Bluecell_DATA];
 80038d8:	761a      	strb	r2, [r3, #24]
        Atten_Setting.ATT_A_CH_30G_29_5_30_HMC939_2  = data[Bluecell_DATA + 1];
 80038da:	7922      	ldrb	r2, [r4, #4]
 80038dc:	765a      	strb	r2, [r3, #25]
        Atten_Setting.ATT_A_CH_30G_29_5_30_ADRF5720_1= data[Bluecell_DATA + 2];
 80038de:	7962      	ldrb	r2, [r4, #5]
 80038e0:	769a      	strb	r2, [r3, #26]
 80038e2:	e6df      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
        Atten_Setting.ATT_B_CH_150M       = data[Bluecell_DATA];
 80038e4:	78e2      	ldrb	r2, [r4, #3]
 80038e6:	4b46      	ldr	r3, [pc, #280]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
 80038e8:	76da      	strb	r2, [r3, #27]
        break;
 80038ea:	e57c      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
        Atten_Setting.ATT_B_CH_WIFI2_4Ghz_QPC6614_1 = data[Bluecell_DATA];
 80038ec:	78e2      	ldrb	r2, [r4, #3]
 80038ee:	4b44      	ldr	r3, [pc, #272]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
 80038f0:	771a      	strb	r2, [r3, #28]
        Atten_Setting.ATT_B_CH_WIFI2_4Ghz_QPC6614_2 = data[Bluecell_DATA + 1];
 80038f2:	7922      	ldrb	r2, [r4, #4]
 80038f4:	775a      	strb	r2, [r3, #29]
        Atten_Setting.ATT_B_CH_WIFI2_4Ghz_QPC6614_3 = data[Bluecell_DATA + 2];
 80038f6:	7962      	ldrb	r2, [r4, #5]
 80038f8:	779a      	strb	r2, [r3, #30]
        Atten_Setting.ATT_B_CH_WIFI2_4Ghz_QPC6614_4 = data[Bluecell_DATA + 3];
 80038fa:	79a2      	ldrb	r2, [r4, #6]
 80038fc:	77da      	strb	r2, [r3, #31]
 80038fe:	e606      	b.n	800350e <Atten_Operate_Mem_RW+0x256>
        Atten_Setting.ATT_B_CH_WIFI5_8Ghz_QPC6614_1 = data[Bluecell_DATA    ];
 8003900:	78e2      	ldrb	r2, [r4, #3]
 8003902:	4b3f      	ldr	r3, [pc, #252]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
 8003904:	f883 2020 	strb.w	r2, [r3, #32]
        Atten_Setting.ATT_B_CH_WIFI5_8Ghz_QPC6614_2 = data[Bluecell_DATA + 1];
 8003908:	7922      	ldrb	r2, [r4, #4]
 800390a:	f883 2021 	strb.w	r2, [r3, #33]	; 0x21
        Atten_Setting.ATT_B_CH_WIFI5_8Ghz_QPC6614_3 = data[Bluecell_DATA + 2];
 800390e:	7962      	ldrb	r2, [r4, #5]
 8003910:	f883 2022 	strb.w	r2, [r3, #34]	; 0x22
        Atten_Setting.ATT_B_CH_WIFI5_8Ghz_QPC6614_4 = data[Bluecell_DATA + 3];            
 8003914:	79a2      	ldrb	r2, [r4, #6]
 8003916:	f883 2023 	strb.w	r2, [r3, #35]	; 0x23
 800391a:	e6c3      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
        Atten_Setting.ATT_B_CH_30G_28_28_5_HMC939_1 = data[Bluecell_DATA];
 800391c:	78e2      	ldrb	r2, [r4, #3]
 800391e:	4b38      	ldr	r3, [pc, #224]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
 8003920:	f883 2024 	strb.w	r2, [r3, #36]	; 0x24
        Atten_Setting.ATT_B_CH_30G_28_28_5_HMC939_2 = data[Bluecell_DATA  + 1];
 8003924:	7922      	ldrb	r2, [r4, #4]
 8003926:	f883 2025 	strb.w	r2, [r3, #37]	; 0x25
        Atten_Setting.ATT_B_CH_30G_28_28_5_ADRF5720_1= data[Bluecell_DATA + 2]; 
 800392a:	7962      	ldrb	r2, [r4, #5]
 800392c:	f883 2026 	strb.w	r2, [r3, #38]	; 0x26
 8003930:	e6b8      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
        Atten_Setting.ATT_B_CH_30G_28_5_29_HMC939_1  = data[Bluecell_DATA];
 8003932:	78e2      	ldrb	r2, [r4, #3]
 8003934:	4b32      	ldr	r3, [pc, #200]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
 8003936:	f883 2027 	strb.w	r2, [r3, #39]	; 0x27
        Atten_Setting.ATT_B_CH_30G_28_5_29_HMC939_2  = data[Bluecell_DATA + 1];
 800393a:	7922      	ldrb	r2, [r4, #4]
 800393c:	f883 2028 	strb.w	r2, [r3, #40]	; 0x28
        Atten_Setting.ATT_B_CH_30G_28_5_29_ADRF5720_1= data[Bluecell_DATA + 2];       
 8003940:	7962      	ldrb	r2, [r4, #5]
 8003942:	f883 2029 	strb.w	r2, [r3, #41]	; 0x29
 8003946:	e6ad      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
        Atten_Setting.ATT_B_CH_30G_29_29_5_HMC939_1  = data[Bluecell_DATA ];
 8003948:	78e2      	ldrb	r2, [r4, #3]
 800394a:	4b2d      	ldr	r3, [pc, #180]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
 800394c:	f883 202a 	strb.w	r2, [r3, #42]	; 0x2a
        Atten_Setting.ATT_B_CH_30G_29_29_5_HMC939_2  = data[Bluecell_DATA  + 1];
 8003950:	7922      	ldrb	r2, [r4, #4]
 8003952:	f883 202b 	strb.w	r2, [r3, #43]	; 0x2b
        Atten_Setting.ATT_B_CH_30G_29_29_5_ADRF5720_1= data[Bluecell_DATA  + 2];
 8003956:	7962      	ldrb	r2, [r4, #5]
 8003958:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
 800395c:	e6a2      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
                Atten_Setting.ATT_B_CH_30G_29_5_30_HMC939_1  = data[Bluecell_DATA];
 800395e:	78e2      	ldrb	r2, [r4, #3]
 8003960:	4b27      	ldr	r3, [pc, #156]	; (8003a00 <Atten_Operate_Mem_RW+0x748>)
 8003962:	f883 202d 	strb.w	r2, [r3, #45]	; 0x2d
                Atten_Setting.ATT_B_CH_30G_29_5_30_HMC939_2  = data[Bluecell_DATA + 1];
 8003966:	7922      	ldrb	r2, [r4, #4]
 8003968:	f883 202e 	strb.w	r2, [r3, #46]	; 0x2e
                Atten_Setting.ATT_B_CH_30G_29_5_30_ADRF5720_1= data[Bluecell_DATA + 2];
 800396c:	7962      	ldrb	r2, [r4, #5]
 800396e:	f883 202f 	strb.w	r2, [r3, #47]	; 0x2f
 8003972:	e697      	b.n	80036a4 <Atten_Operate_Mem_RW+0x3ec>
    		 case ATT_A_EN_150M 			: memcpy(&ATT_A_EN_150M_Table.Atten_Table_31_5dB_Value			 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_150M_Table.Atten_Table_31_5dB_Value			 ,sizeof(Atten_Table_Value_t));break;			   
 8003974:	4a26      	ldr	r2, [pc, #152]	; (8003a10 <Atten_Operate_Mem_RW+0x758>)
 8003976:	1ce3      	adds	r3, r4, #3
 8003978:	3443      	adds	r4, #67	; 0x43
 800397a:	f853 1b04 	ldr.w	r1, [r3], #4
 800397e:	42a3      	cmp	r3, r4
 8003980:	f842 1b04 	str.w	r1, [r2], #4
 8003984:	d1f9      	bne.n	800397a <Atten_Operate_Mem_RW+0x6c2>
 8003986:	4b22      	ldr	r3, [pc, #136]	; (8003a10 <Atten_Operate_Mem_RW+0x758>)
 8003988:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800398c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003990:	f853 0b04 	ldr.w	r0, [r3], #4
 8003994:	428b      	cmp	r3, r1
 8003996:	f842 0b04 	str.w	r0, [r2], #4
 800399a:	d1f9      	bne.n	8003990 <Atten_Operate_Mem_RW+0x6d8>
 800399c:	e523      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_WIFI1_2_4Ghz 	: memcpy(&ATT_A_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;			 
 800399e:	4a1d      	ldr	r2, [pc, #116]	; (8003a14 <Atten_Operate_Mem_RW+0x75c>)
 80039a0:	1ce3      	adds	r3, r4, #3
 80039a2:	3443      	adds	r4, #67	; 0x43
 80039a4:	f853 1b04 	ldr.w	r1, [r3], #4
 80039a8:	42a3      	cmp	r3, r4
 80039aa:	f842 1b04 	str.w	r1, [r2], #4
 80039ae:	d1f9      	bne.n	80039a4 <Atten_Operate_Mem_RW+0x6ec>
 80039b0:	4b18      	ldr	r3, [pc, #96]	; (8003a14 <Atten_Operate_Mem_RW+0x75c>)
 80039b2:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80039b6:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80039ba:	f853 0b04 	ldr.w	r0, [r3], #4
 80039be:	428b      	cmp	r3, r1
 80039c0:	f842 0b04 	str.w	r0, [r2], #4
 80039c4:	d1f9      	bne.n	80039ba <Atten_Operate_Mem_RW+0x702>
 80039c6:	e50e      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_WIFI2_2_4Ghz 	: memcpy(&ATT_A_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;			 
 80039c8:	4a13      	ldr	r2, [pc, #76]	; (8003a18 <Atten_Operate_Mem_RW+0x760>)
 80039ca:	1ce3      	adds	r3, r4, #3
 80039cc:	3443      	adds	r4, #67	; 0x43
 80039ce:	f853 1b04 	ldr.w	r1, [r3], #4
 80039d2:	42a3      	cmp	r3, r4
 80039d4:	f842 1b04 	str.w	r1, [r2], #4
 80039d8:	d1f9      	bne.n	80039ce <Atten_Operate_Mem_RW+0x716>
 80039da:	4b0f      	ldr	r3, [pc, #60]	; (8003a18 <Atten_Operate_Mem_RW+0x760>)
 80039dc:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80039e0:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80039e4:	f853 0b04 	ldr.w	r0, [r3], #4
 80039e8:	428b      	cmp	r3, r1
 80039ea:	f842 0b04 	str.w	r0, [r2], #4
 80039ee:	d1f9      	bne.n	80039e4 <Atten_Operate_Mem_RW+0x72c>
 80039f0:	e4f9      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
 80039f2:	bf00      	nop
 80039f4:	200008d1 	.word	0x200008d1
 80039f8:	20000420 	.word	0x20000420
 80039fc:	20000560 	.word	0x20000560
 8003a00:	20000760 	.word	0x20000760
 8003a04:	20000b11 	.word	0x20000b11
 8003a08:	200004a0 	.word	0x200004a0
 8003a0c:	20000120 	.word	0x20000120
 8003a10:	20000791 	.word	0x20000791
 8003a14:	200002a0 	.word	0x200002a0
 8003a18:	20000ad1 	.word	0x20000ad1
    		 case ATT_A_EN_WIFI4_2_4Ghz 	: memcpy(&ATT_A_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;			 
 8003a1c:	4acb      	ldr	r2, [pc, #812]	; (8003d4c <Atten_Operate_Mem_RW+0xa94>)
 8003a1e:	1ce3      	adds	r3, r4, #3
 8003a20:	3443      	adds	r4, #67	; 0x43
 8003a22:	f853 1b04 	ldr.w	r1, [r3], #4
 8003a26:	42a3      	cmp	r3, r4
 8003a28:	f842 1b04 	str.w	r1, [r2], #4
 8003a2c:	d1f9      	bne.n	8003a22 <Atten_Operate_Mem_RW+0x76a>
 8003a2e:	4bc7      	ldr	r3, [pc, #796]	; (8003d4c <Atten_Operate_Mem_RW+0xa94>)
 8003a30:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003a34:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003a38:	f853 0b04 	ldr.w	r0, [r3], #4
 8003a3c:	428b      	cmp	r3, r1
 8003a3e:	f842 0b04 	str.w	r0, [r2], #4
 8003a42:	d1f9      	bne.n	8003a38 <Atten_Operate_Mem_RW+0x780>
 8003a44:	e4cf      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_WIFI1_5_8Ghz 	: memcpy(&ATT_A_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;			 
 8003a46:	4ac2      	ldr	r2, [pc, #776]	; (8003d50 <Atten_Operate_Mem_RW+0xa98>)
 8003a48:	1ce3      	adds	r3, r4, #3
 8003a4a:	3443      	adds	r4, #67	; 0x43
 8003a4c:	f853 1b04 	ldr.w	r1, [r3], #4
 8003a50:	42a3      	cmp	r3, r4
 8003a52:	f842 1b04 	str.w	r1, [r2], #4
 8003a56:	d1f9      	bne.n	8003a4c <Atten_Operate_Mem_RW+0x794>
 8003a58:	4bbd      	ldr	r3, [pc, #756]	; (8003d50 <Atten_Operate_Mem_RW+0xa98>)
 8003a5a:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003a5e:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003a62:	f853 0b04 	ldr.w	r0, [r3], #4
 8003a66:	428b      	cmp	r3, r1
 8003a68:	f842 0b04 	str.w	r0, [r2], #4
 8003a6c:	d1f9      	bne.n	8003a62 <Atten_Operate_Mem_RW+0x7aa>
 8003a6e:	e4ba      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_WIFI2_5_8Ghz 	: memcpy(&ATT_A_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;			 
 8003a70:	4ab8      	ldr	r2, [pc, #736]	; (8003d54 <Atten_Operate_Mem_RW+0xa9c>)
 8003a72:	1ce3      	adds	r3, r4, #3
 8003a74:	3443      	adds	r4, #67	; 0x43
 8003a76:	f853 1b04 	ldr.w	r1, [r3], #4
 8003a7a:	42a3      	cmp	r3, r4
 8003a7c:	f842 1b04 	str.w	r1, [r2], #4
 8003a80:	d1f9      	bne.n	8003a76 <Atten_Operate_Mem_RW+0x7be>
 8003a82:	4bb4      	ldr	r3, [pc, #720]	; (8003d54 <Atten_Operate_Mem_RW+0xa9c>)
 8003a84:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003a88:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003a8c:	f853 0b04 	ldr.w	r0, [r3], #4
 8003a90:	428b      	cmp	r3, r1
 8003a92:	f842 0b04 	str.w	r0, [r2], #4
 8003a96:	d1f9      	bne.n	8003a8c <Atten_Operate_Mem_RW+0x7d4>
 8003a98:	e4a5      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_WIFI3_5_8Ghz 	: memcpy(&ATT_A_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;														  
 8003a9a:	4aaf      	ldr	r2, [pc, #700]	; (8003d58 <Atten_Operate_Mem_RW+0xaa0>)
 8003a9c:	1ce3      	adds	r3, r4, #3
 8003a9e:	3443      	adds	r4, #67	; 0x43
 8003aa0:	f853 1b04 	ldr.w	r1, [r3], #4
 8003aa4:	42a3      	cmp	r3, r4
 8003aa6:	f842 1b04 	str.w	r1, [r2], #4
 8003aaa:	d1f9      	bne.n	8003aa0 <Atten_Operate_Mem_RW+0x7e8>
 8003aac:	4baa      	ldr	r3, [pc, #680]	; (8003d58 <Atten_Operate_Mem_RW+0xaa0>)
 8003aae:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003ab2:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003ab6:	f853 0b04 	ldr.w	r0, [r3], #4
 8003aba:	428b      	cmp	r3, r1
 8003abc:	f842 0b04 	str.w	r0, [r2], #4
 8003ac0:	d1f9      	bne.n	8003ab6 <Atten_Operate_Mem_RW+0x7fe>
 8003ac2:	e490      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_WIFI4_5_8Ghz 	: memcpy(&ATT_A_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003ac4:	4aa5      	ldr	r2, [pc, #660]	; (8003d5c <Atten_Operate_Mem_RW+0xaa4>)
 8003ac6:	1ce3      	adds	r3, r4, #3
 8003ac8:	3443      	adds	r4, #67	; 0x43
 8003aca:	f853 1b04 	ldr.w	r1, [r3], #4
 8003ace:	42a3      	cmp	r3, r4
 8003ad0:	f842 1b04 	str.w	r1, [r2], #4
 8003ad4:	d1f9      	bne.n	8003aca <Atten_Operate_Mem_RW+0x812>
 8003ad6:	4ba1      	ldr	r3, [pc, #644]	; (8003d5c <Atten_Operate_Mem_RW+0xaa4>)
 8003ad8:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003adc:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003ae0:	f853 0b04 	ldr.w	r0, [r3], #4
 8003ae4:	428b      	cmp	r3, r1
 8003ae6:	f842 0b04 	str.w	r0, [r2], #4
 8003aea:	d1f9      	bne.n	8003ae0 <Atten_Operate_Mem_RW+0x828>
 8003aec:	e47b      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G1_28_28_5Ghz	: memcpy(&ATT_A_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003aee:	4a9c      	ldr	r2, [pc, #624]	; (8003d60 <Atten_Operate_Mem_RW+0xaa8>)
 8003af0:	1ce3      	adds	r3, r4, #3
 8003af2:	3443      	adds	r4, #67	; 0x43
 8003af4:	f853 1b04 	ldr.w	r1, [r3], #4
 8003af8:	42a3      	cmp	r3, r4
 8003afa:	f842 1b04 	str.w	r1, [r2], #4
 8003afe:	d1f9      	bne.n	8003af4 <Atten_Operate_Mem_RW+0x83c>
 8003b00:	4b97      	ldr	r3, [pc, #604]	; (8003d60 <Atten_Operate_Mem_RW+0xaa8>)
 8003b02:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003b06:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003b0a:	f853 0b04 	ldr.w	r0, [r3], #4
 8003b0e:	428b      	cmp	r3, r1
 8003b10:	f842 0b04 	str.w	r0, [r2], #4
 8003b14:	d1f9      	bne.n	8003b0a <Atten_Operate_Mem_RW+0x852>
 8003b16:	e466      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G2_28_28_5Ghz	: memcpy(&ATT_A_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003b18:	4a92      	ldr	r2, [pc, #584]	; (8003d64 <Atten_Operate_Mem_RW+0xaac>)
 8003b1a:	1ce3      	adds	r3, r4, #3
 8003b1c:	3443      	adds	r4, #67	; 0x43
 8003b1e:	f853 1b04 	ldr.w	r1, [r3], #4
 8003b22:	42a3      	cmp	r3, r4
 8003b24:	f842 1b04 	str.w	r1, [r2], #4
 8003b28:	d1f9      	bne.n	8003b1e <Atten_Operate_Mem_RW+0x866>
 8003b2a:	4b8e      	ldr	r3, [pc, #568]	; (8003d64 <Atten_Operate_Mem_RW+0xaac>)
 8003b2c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003b30:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003b34:	f853 0b04 	ldr.w	r0, [r3], #4
 8003b38:	428b      	cmp	r3, r1
 8003b3a:	f842 0b04 	str.w	r0, [r2], #4
 8003b3e:	d1f9      	bne.n	8003b34 <Atten_Operate_Mem_RW+0x87c>
 8003b40:	e451      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G3_28_28_5Ghz	: memcpy(&ATT_A_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003b42:	4a89      	ldr	r2, [pc, #548]	; (8003d68 <Atten_Operate_Mem_RW+0xab0>)
 8003b44:	1ce3      	adds	r3, r4, #3
 8003b46:	3443      	adds	r4, #67	; 0x43
 8003b48:	f853 1b04 	ldr.w	r1, [r3], #4
 8003b4c:	42a3      	cmp	r3, r4
 8003b4e:	f842 1b04 	str.w	r1, [r2], #4
 8003b52:	d1f9      	bne.n	8003b48 <Atten_Operate_Mem_RW+0x890>
 8003b54:	4b84      	ldr	r3, [pc, #528]	; (8003d68 <Atten_Operate_Mem_RW+0xab0>)
 8003b56:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003b5a:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003b5e:	f853 0b04 	ldr.w	r0, [r3], #4
 8003b62:	428b      	cmp	r3, r1
 8003b64:	f842 0b04 	str.w	r0, [r2], #4
 8003b68:	d1f9      	bne.n	8003b5e <Atten_Operate_Mem_RW+0x8a6>
 8003b6a:	e43c      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G1_28_5_29Ghz	: memcpy(&ATT_A_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003b6c:	4a7f      	ldr	r2, [pc, #508]	; (8003d6c <Atten_Operate_Mem_RW+0xab4>)
 8003b6e:	1ce3      	adds	r3, r4, #3
 8003b70:	3443      	adds	r4, #67	; 0x43
 8003b72:	f853 1b04 	ldr.w	r1, [r3], #4
 8003b76:	42a3      	cmp	r3, r4
 8003b78:	f842 1b04 	str.w	r1, [r2], #4
 8003b7c:	d1f9      	bne.n	8003b72 <Atten_Operate_Mem_RW+0x8ba>
 8003b7e:	4b7b      	ldr	r3, [pc, #492]	; (8003d6c <Atten_Operate_Mem_RW+0xab4>)
 8003b80:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003b84:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003b88:	f853 0b04 	ldr.w	r0, [r3], #4
 8003b8c:	428b      	cmp	r3, r1
 8003b8e:	f842 0b04 	str.w	r0, [r2], #4
 8003b92:	d1f9      	bne.n	8003b88 <Atten_Operate_Mem_RW+0x8d0>
 8003b94:	e427      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G2_28_5_29Ghz	: memcpy(&ATT_A_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003b96:	4a76      	ldr	r2, [pc, #472]	; (8003d70 <Atten_Operate_Mem_RW+0xab8>)
 8003b98:	1ce3      	adds	r3, r4, #3
 8003b9a:	3443      	adds	r4, #67	; 0x43
 8003b9c:	f853 1b04 	ldr.w	r1, [r3], #4
 8003ba0:	42a3      	cmp	r3, r4
 8003ba2:	f842 1b04 	str.w	r1, [r2], #4
 8003ba6:	d1f9      	bne.n	8003b9c <Atten_Operate_Mem_RW+0x8e4>
 8003ba8:	4b71      	ldr	r3, [pc, #452]	; (8003d70 <Atten_Operate_Mem_RW+0xab8>)
 8003baa:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003bae:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003bb2:	f853 0b04 	ldr.w	r0, [r3], #4
 8003bb6:	428b      	cmp	r3, r1
 8003bb8:	f842 0b04 	str.w	r0, [r2], #4
 8003bbc:	d1f9      	bne.n	8003bb2 <Atten_Operate_Mem_RW+0x8fa>
 8003bbe:	e412      	b.n	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G3_28_5_29Ghz	: memcpy(&ATT_A_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003bc0:	4a6c      	ldr	r2, [pc, #432]	; (8003d74 <Atten_Operate_Mem_RW+0xabc>)
 8003bc2:	1ce3      	adds	r3, r4, #3
 8003bc4:	3443      	adds	r4, #67	; 0x43
 8003bc6:	f853 1b04 	ldr.w	r1, [r3], #4
 8003bca:	42a3      	cmp	r3, r4
 8003bcc:	f842 1b04 	str.w	r1, [r2], #4
 8003bd0:	d1f9      	bne.n	8003bc6 <Atten_Operate_Mem_RW+0x90e>
 8003bd2:	4b68      	ldr	r3, [pc, #416]	; (8003d74 <Atten_Operate_Mem_RW+0xabc>)
 8003bd4:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003bd8:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003bdc:	f853 0b04 	ldr.w	r0, [r3], #4
 8003be0:	428b      	cmp	r3, r1
 8003be2:	f842 0b04 	str.w	r0, [r2], #4
 8003be6:	d1f9      	bne.n	8003bdc <Atten_Operate_Mem_RW+0x924>
 8003be8:	f7ff bbfd 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G1_29_29_5Ghz	: memcpy(&ATT_A_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003bec:	4a62      	ldr	r2, [pc, #392]	; (8003d78 <Atten_Operate_Mem_RW+0xac0>)
 8003bee:	1ce3      	adds	r3, r4, #3
 8003bf0:	3443      	adds	r4, #67	; 0x43
 8003bf2:	f853 1b04 	ldr.w	r1, [r3], #4
 8003bf6:	42a3      	cmp	r3, r4
 8003bf8:	f842 1b04 	str.w	r1, [r2], #4
 8003bfc:	d1f9      	bne.n	8003bf2 <Atten_Operate_Mem_RW+0x93a>
 8003bfe:	4b5e      	ldr	r3, [pc, #376]	; (8003d78 <Atten_Operate_Mem_RW+0xac0>)
 8003c00:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003c04:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003c08:	f853 0b04 	ldr.w	r0, [r3], #4
 8003c0c:	428b      	cmp	r3, r1
 8003c0e:	f842 0b04 	str.w	r0, [r2], #4
 8003c12:	d1f9      	bne.n	8003c08 <Atten_Operate_Mem_RW+0x950>
 8003c14:	f7ff bbe7 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G2_29_29_5Ghz	: memcpy(&ATT_A_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003c18:	4a58      	ldr	r2, [pc, #352]	; (8003d7c <Atten_Operate_Mem_RW+0xac4>)
 8003c1a:	1ce3      	adds	r3, r4, #3
 8003c1c:	3443      	adds	r4, #67	; 0x43
 8003c1e:	f853 1b04 	ldr.w	r1, [r3], #4
 8003c22:	42a3      	cmp	r3, r4
 8003c24:	f842 1b04 	str.w	r1, [r2], #4
 8003c28:	d1f9      	bne.n	8003c1e <Atten_Operate_Mem_RW+0x966>
 8003c2a:	4b54      	ldr	r3, [pc, #336]	; (8003d7c <Atten_Operate_Mem_RW+0xac4>)
 8003c2c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003c30:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003c34:	f853 0b04 	ldr.w	r0, [r3], #4
 8003c38:	428b      	cmp	r3, r1
 8003c3a:	f842 0b04 	str.w	r0, [r2], #4
 8003c3e:	d1f9      	bne.n	8003c34 <Atten_Operate_Mem_RW+0x97c>
 8003c40:	f7ff bbd1 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G3_29_29_5Ghz	: memcpy(&ATT_A_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003c44:	4a4e      	ldr	r2, [pc, #312]	; (8003d80 <Atten_Operate_Mem_RW+0xac8>)
 8003c46:	1ce3      	adds	r3, r4, #3
 8003c48:	3443      	adds	r4, #67	; 0x43
 8003c4a:	f853 1b04 	ldr.w	r1, [r3], #4
 8003c4e:	42a3      	cmp	r3, r4
 8003c50:	f842 1b04 	str.w	r1, [r2], #4
 8003c54:	d1f9      	bne.n	8003c4a <Atten_Operate_Mem_RW+0x992>
 8003c56:	4b4a      	ldr	r3, [pc, #296]	; (8003d80 <Atten_Operate_Mem_RW+0xac8>)
 8003c58:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003c5c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003c60:	f853 0b04 	ldr.w	r0, [r3], #4
 8003c64:	428b      	cmp	r3, r1
 8003c66:	f842 0b04 	str.w	r0, [r2], #4
 8003c6a:	d1f9      	bne.n	8003c60 <Atten_Operate_Mem_RW+0x9a8>
 8003c6c:	f7ff bbbb 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G1_29_5_30Ghz	: memcpy(&ATT_A_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003c70:	4a44      	ldr	r2, [pc, #272]	; (8003d84 <Atten_Operate_Mem_RW+0xacc>)
 8003c72:	1ce3      	adds	r3, r4, #3
 8003c74:	3443      	adds	r4, #67	; 0x43
 8003c76:	f853 1b04 	ldr.w	r1, [r3], #4
 8003c7a:	42a3      	cmp	r3, r4
 8003c7c:	f842 1b04 	str.w	r1, [r2], #4
 8003c80:	d1f9      	bne.n	8003c76 <Atten_Operate_Mem_RW+0x9be>
 8003c82:	4b40      	ldr	r3, [pc, #256]	; (8003d84 <Atten_Operate_Mem_RW+0xacc>)
 8003c84:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003c88:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003c8c:	f853 0b04 	ldr.w	r0, [r3], #4
 8003c90:	428b      	cmp	r3, r1
 8003c92:	f842 0b04 	str.w	r0, [r2], #4
 8003c96:	d1f9      	bne.n	8003c8c <Atten_Operate_Mem_RW+0x9d4>
 8003c98:	f7ff bba5 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G2_29_5_30Ghz	: memcpy(&ATT_A_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003c9c:	4a3a      	ldr	r2, [pc, #232]	; (8003d88 <Atten_Operate_Mem_RW+0xad0>)
 8003c9e:	1ce3      	adds	r3, r4, #3
 8003ca0:	3443      	adds	r4, #67	; 0x43
 8003ca2:	f853 1b04 	ldr.w	r1, [r3], #4
 8003ca6:	42a3      	cmp	r3, r4
 8003ca8:	f842 1b04 	str.w	r1, [r2], #4
 8003cac:	d1f9      	bne.n	8003ca2 <Atten_Operate_Mem_RW+0x9ea>
 8003cae:	4b36      	ldr	r3, [pc, #216]	; (8003d88 <Atten_Operate_Mem_RW+0xad0>)
 8003cb0:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003cb4:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003cb8:	f853 0b04 	ldr.w	r0, [r3], #4
 8003cbc:	428b      	cmp	r3, r1
 8003cbe:	f842 0b04 	str.w	r0, [r2], #4
 8003cc2:	d1f9      	bne.n	8003cb8 <Atten_Operate_Mem_RW+0xa00>
 8003cc4:	f7ff bb8f 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_A_EN_30G3_29_5_30Ghz	: memcpy(&ATT_A_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003cc8:	4a30      	ldr	r2, [pc, #192]	; (8003d8c <Atten_Operate_Mem_RW+0xad4>)
 8003cca:	1ce3      	adds	r3, r4, #3
 8003ccc:	3443      	adds	r4, #67	; 0x43
 8003cce:	f853 1b04 	ldr.w	r1, [r3], #4
 8003cd2:	42a3      	cmp	r3, r4
 8003cd4:	f842 1b04 	str.w	r1, [r2], #4
 8003cd8:	d1f9      	bne.n	8003cce <Atten_Operate_Mem_RW+0xa16>
 8003cda:	4b2c      	ldr	r3, [pc, #176]	; (8003d8c <Atten_Operate_Mem_RW+0xad4>)
 8003cdc:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003ce0:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003ce4:	f853 0b04 	ldr.w	r0, [r3], #4
 8003ce8:	428b      	cmp	r3, r1
 8003cea:	f842 0b04 	str.w	r0, [r2], #4
 8003cee:	d1f9      	bne.n	8003ce4 <Atten_Operate_Mem_RW+0xa2c>
 8003cf0:	f7ff bb79 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_150M 			: memcpy(&ATT_B_EN_150M_Table.Atten_Table_31_5dB_Value			 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_150M_Table.Atten_Table_31_5dB_Value			 ,sizeof(Atten_Table_Value_t));break;	  
 8003cf4:	4a26      	ldr	r2, [pc, #152]	; (8003d90 <Atten_Operate_Mem_RW+0xad8>)
 8003cf6:	1ce3      	adds	r3, r4, #3
 8003cf8:	3443      	adds	r4, #67	; 0x43
 8003cfa:	f853 1b04 	ldr.w	r1, [r3], #4
 8003cfe:	42a3      	cmp	r3, r4
 8003d00:	f842 1b04 	str.w	r1, [r2], #4
 8003d04:	d1f9      	bne.n	8003cfa <Atten_Operate_Mem_RW+0xa42>
 8003d06:	4b22      	ldr	r3, [pc, #136]	; (8003d90 <Atten_Operate_Mem_RW+0xad8>)
 8003d08:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003d0c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003d10:	f853 0b04 	ldr.w	r0, [r3], #4
 8003d14:	428b      	cmp	r3, r1
 8003d16:	f842 0b04 	str.w	r0, [r2], #4
 8003d1a:	d1f9      	bne.n	8003d10 <Atten_Operate_Mem_RW+0xa58>
 8003d1c:	f7ff bb63 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_WIFI1_2_4Ghz 	: memcpy(&ATT_B_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003d20:	4a1c      	ldr	r2, [pc, #112]	; (8003d94 <Atten_Operate_Mem_RW+0xadc>)
 8003d22:	1ce3      	adds	r3, r4, #3
 8003d24:	3443      	adds	r4, #67	; 0x43
 8003d26:	f853 1b04 	ldr.w	r1, [r3], #4
 8003d2a:	42a3      	cmp	r3, r4
 8003d2c:	f842 1b04 	str.w	r1, [r2], #4
 8003d30:	d1f9      	bne.n	8003d26 <Atten_Operate_Mem_RW+0xa6e>
 8003d32:	4b18      	ldr	r3, [pc, #96]	; (8003d94 <Atten_Operate_Mem_RW+0xadc>)
 8003d34:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003d38:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003d3c:	f853 0b04 	ldr.w	r0, [r3], #4
 8003d40:	428b      	cmp	r3, r1
 8003d42:	f842 0b04 	str.w	r0, [r2], #4
 8003d46:	d1f9      	bne.n	8003d3c <Atten_Operate_Mem_RW+0xa84>
 8003d48:	f7ff bb4d 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
 8003d4c:	200001a0 	.word	0x200001a0
 8003d50:	200009d1 	.word	0x200009d1
 8003d54:	20000b51 	.word	0x20000b51
 8003d58:	200006a0 	.word	0x200006a0
 8003d5c:	20000720 	.word	0x20000720
 8003d60:	200005e0 	.word	0x200005e0
 8003d64:	20000a91 	.word	0x20000a91
 8003d68:	200006e0 	.word	0x200006e0
 8003d6c:	200008d1 	.word	0x200008d1
 8003d70:	20000420 	.word	0x20000420
 8003d74:	20000560 	.word	0x20000560
 8003d78:	20000b11 	.word	0x20000b11
 8003d7c:	200004a0 	.word	0x200004a0
 8003d80:	20000120 	.word	0x20000120
 8003d84:	20000851 	.word	0x20000851
 8003d88:	20000811 	.word	0x20000811
 8003d8c:	200001e0 	.word	0x200001e0
 8003d90:	20000951 	.word	0x20000951
 8003d94:	20000460 	.word	0x20000460
    		 case ATT_B_EN_WIFI2_2_4Ghz 	: memcpy(&ATT_B_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003d98:	4ad0      	ldr	r2, [pc, #832]	; (80040dc <Atten_Operate_Mem_RW+0xe24>)
 8003d9a:	1ce3      	adds	r3, r4, #3
 8003d9c:	3443      	adds	r4, #67	; 0x43
 8003d9e:	f853 1b04 	ldr.w	r1, [r3], #4
 8003da2:	42a3      	cmp	r3, r4
 8003da4:	f842 1b04 	str.w	r1, [r2], #4
 8003da8:	d1f9      	bne.n	8003d9e <Atten_Operate_Mem_RW+0xae6>
 8003daa:	4bcc      	ldr	r3, [pc, #816]	; (80040dc <Atten_Operate_Mem_RW+0xe24>)
 8003dac:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003db0:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003db4:	f853 0b04 	ldr.w	r0, [r3], #4
 8003db8:	428b      	cmp	r3, r1
 8003dba:	f842 0b04 	str.w	r0, [r2], #4
 8003dbe:	d1f9      	bne.n	8003db4 <Atten_Operate_Mem_RW+0xafc>
 8003dc0:	f7ff bb11 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_WIFI3_2_4Ghz 	: memcpy(&ATT_B_EN_WIFI3_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI3_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003dc4:	4ac6      	ldr	r2, [pc, #792]	; (80040e0 <Atten_Operate_Mem_RW+0xe28>)
 8003dc6:	1ce3      	adds	r3, r4, #3
 8003dc8:	3443      	adds	r4, #67	; 0x43
 8003dca:	f853 1b04 	ldr.w	r1, [r3], #4
 8003dce:	42a3      	cmp	r3, r4
 8003dd0:	f842 1b04 	str.w	r1, [r2], #4
 8003dd4:	d1f9      	bne.n	8003dca <Atten_Operate_Mem_RW+0xb12>
 8003dd6:	4bc2      	ldr	r3, [pc, #776]	; (80040e0 <Atten_Operate_Mem_RW+0xe28>)
 8003dd8:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003ddc:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003de0:	f853 0b04 	ldr.w	r0, [r3], #4
 8003de4:	428b      	cmp	r3, r1
 8003de6:	f842 0b04 	str.w	r0, [r2], #4
 8003dea:	d1f9      	bne.n	8003de0 <Atten_Operate_Mem_RW+0xb28>
 8003dec:	f7ff bafb 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_WIFI4_2_4Ghz 	: memcpy(&ATT_B_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003df0:	4abc      	ldr	r2, [pc, #752]	; (80040e4 <Atten_Operate_Mem_RW+0xe2c>)
 8003df2:	1ce3      	adds	r3, r4, #3
 8003df4:	3443      	adds	r4, #67	; 0x43
 8003df6:	f853 1b04 	ldr.w	r1, [r3], #4
 8003dfa:	42a3      	cmp	r3, r4
 8003dfc:	f842 1b04 	str.w	r1, [r2], #4
 8003e00:	d1f9      	bne.n	8003df6 <Atten_Operate_Mem_RW+0xb3e>
 8003e02:	4bb8      	ldr	r3, [pc, #736]	; (80040e4 <Atten_Operate_Mem_RW+0xe2c>)
 8003e04:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003e08:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003e0c:	f853 0b04 	ldr.w	r0, [r3], #4
 8003e10:	428b      	cmp	r3, r1
 8003e12:	f842 0b04 	str.w	r0, [r2], #4
 8003e16:	d1f9      	bne.n	8003e0c <Atten_Operate_Mem_RW+0xb54>
 8003e18:	f7ff bae5 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_WIFI1_5_8Ghz 	: memcpy(&ATT_B_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003e1c:	4ab2      	ldr	r2, [pc, #712]	; (80040e8 <Atten_Operate_Mem_RW+0xe30>)
 8003e1e:	1ce3      	adds	r3, r4, #3
 8003e20:	3443      	adds	r4, #67	; 0x43
 8003e22:	f853 1b04 	ldr.w	r1, [r3], #4
 8003e26:	42a3      	cmp	r3, r4
 8003e28:	f842 1b04 	str.w	r1, [r2], #4
 8003e2c:	d1f9      	bne.n	8003e22 <Atten_Operate_Mem_RW+0xb6a>
 8003e2e:	4bae      	ldr	r3, [pc, #696]	; (80040e8 <Atten_Operate_Mem_RW+0xe30>)
 8003e30:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003e34:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003e38:	f853 0b04 	ldr.w	r0, [r3], #4
 8003e3c:	428b      	cmp	r3, r1
 8003e3e:	f842 0b04 	str.w	r0, [r2], #4
 8003e42:	d1f9      	bne.n	8003e38 <Atten_Operate_Mem_RW+0xb80>
 8003e44:	f7ff bacf 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_WIFI2_5_8Ghz 	: memcpy(&ATT_B_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003e48:	4aa8      	ldr	r2, [pc, #672]	; (80040ec <Atten_Operate_Mem_RW+0xe34>)
 8003e4a:	1ce3      	adds	r3, r4, #3
 8003e4c:	3443      	adds	r4, #67	; 0x43
 8003e4e:	f853 1b04 	ldr.w	r1, [r3], #4
 8003e52:	42a3      	cmp	r3, r4
 8003e54:	f842 1b04 	str.w	r1, [r2], #4
 8003e58:	d1f9      	bne.n	8003e4e <Atten_Operate_Mem_RW+0xb96>
 8003e5a:	4ba4      	ldr	r3, [pc, #656]	; (80040ec <Atten_Operate_Mem_RW+0xe34>)
 8003e5c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003e60:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003e64:	f853 0b04 	ldr.w	r0, [r3], #4
 8003e68:	428b      	cmp	r3, r1
 8003e6a:	f842 0b04 	str.w	r0, [r2], #4
 8003e6e:	d1f9      	bne.n	8003e64 <Atten_Operate_Mem_RW+0xbac>
 8003e70:	f7ff bab9 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_WIFI3_5_8Ghz 	: memcpy(&ATT_B_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003e74:	4a9e      	ldr	r2, [pc, #632]	; (80040f0 <Atten_Operate_Mem_RW+0xe38>)
 8003e76:	1ce3      	adds	r3, r4, #3
 8003e78:	3443      	adds	r4, #67	; 0x43
 8003e7a:	f853 1b04 	ldr.w	r1, [r3], #4
 8003e7e:	42a3      	cmp	r3, r4
 8003e80:	f842 1b04 	str.w	r1, [r2], #4
 8003e84:	d1f9      	bne.n	8003e7a <Atten_Operate_Mem_RW+0xbc2>
 8003e86:	4b9a      	ldr	r3, [pc, #616]	; (80040f0 <Atten_Operate_Mem_RW+0xe38>)
 8003e88:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003e8c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003e90:	f853 0b04 	ldr.w	r0, [r3], #4
 8003e94:	428b      	cmp	r3, r1
 8003e96:	f842 0b04 	str.w	r0, [r2], #4
 8003e9a:	d1f9      	bne.n	8003e90 <Atten_Operate_Mem_RW+0xbd8>
 8003e9c:	f7ff baa3 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_WIFI4_5_8Ghz 	: memcpy(&ATT_B_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value	 ,sizeof(Atten_Table_Value_t));break;		
 8003ea0:	4a94      	ldr	r2, [pc, #592]	; (80040f4 <Atten_Operate_Mem_RW+0xe3c>)
 8003ea2:	1ce3      	adds	r3, r4, #3
 8003ea4:	3443      	adds	r4, #67	; 0x43
 8003ea6:	f853 1b04 	ldr.w	r1, [r3], #4
 8003eaa:	42a3      	cmp	r3, r4
 8003eac:	f842 1b04 	str.w	r1, [r2], #4
 8003eb0:	d1f9      	bne.n	8003ea6 <Atten_Operate_Mem_RW+0xbee>
 8003eb2:	4b90      	ldr	r3, [pc, #576]	; (80040f4 <Atten_Operate_Mem_RW+0xe3c>)
 8003eb4:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003eb8:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003ebc:	f853 0b04 	ldr.w	r0, [r3], #4
 8003ec0:	428b      	cmp	r3, r1
 8003ec2:	f842 0b04 	str.w	r0, [r2], #4
 8003ec6:	d1f9      	bne.n	8003ebc <Atten_Operate_Mem_RW+0xc04>
 8003ec8:	f7ff ba8d 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G1_28_28_5Ghz	: memcpy(&ATT_B_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003ecc:	4a8a      	ldr	r2, [pc, #552]	; (80040f8 <Atten_Operate_Mem_RW+0xe40>)
 8003ece:	1ce3      	adds	r3, r4, #3
 8003ed0:	3443      	adds	r4, #67	; 0x43
 8003ed2:	f853 1b04 	ldr.w	r1, [r3], #4
 8003ed6:	42a3      	cmp	r3, r4
 8003ed8:	f842 1b04 	str.w	r1, [r2], #4
 8003edc:	d1f9      	bne.n	8003ed2 <Atten_Operate_Mem_RW+0xc1a>
 8003ede:	4b86      	ldr	r3, [pc, #536]	; (80040f8 <Atten_Operate_Mem_RW+0xe40>)
 8003ee0:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003ee4:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003ee8:	f853 0b04 	ldr.w	r0, [r3], #4
 8003eec:	428b      	cmp	r3, r1
 8003eee:	f842 0b04 	str.w	r0, [r2], #4
 8003ef2:	d1f9      	bne.n	8003ee8 <Atten_Operate_Mem_RW+0xc30>
 8003ef4:	f7ff ba77 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G2_28_28_5Ghz	: memcpy(&ATT_B_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003ef8:	4a80      	ldr	r2, [pc, #512]	; (80040fc <Atten_Operate_Mem_RW+0xe44>)
 8003efa:	1ce3      	adds	r3, r4, #3
 8003efc:	3443      	adds	r4, #67	; 0x43
 8003efe:	f853 1b04 	ldr.w	r1, [r3], #4
 8003f02:	42a3      	cmp	r3, r4
 8003f04:	f842 1b04 	str.w	r1, [r2], #4
 8003f08:	d1f9      	bne.n	8003efe <Atten_Operate_Mem_RW+0xc46>
 8003f0a:	4b7c      	ldr	r3, [pc, #496]	; (80040fc <Atten_Operate_Mem_RW+0xe44>)
 8003f0c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003f10:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003f14:	f853 0b04 	ldr.w	r0, [r3], #4
 8003f18:	428b      	cmp	r3, r1
 8003f1a:	f842 0b04 	str.w	r0, [r2], #4
 8003f1e:	d1f9      	bne.n	8003f14 <Atten_Operate_Mem_RW+0xc5c>
 8003f20:	f7ff ba61 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G3_28_28_5Ghz	: memcpy(&ATT_B_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003f24:	4a76      	ldr	r2, [pc, #472]	; (8004100 <Atten_Operate_Mem_RW+0xe48>)
 8003f26:	1ce3      	adds	r3, r4, #3
 8003f28:	3443      	adds	r4, #67	; 0x43
 8003f2a:	f853 1b04 	ldr.w	r1, [r3], #4
 8003f2e:	42a3      	cmp	r3, r4
 8003f30:	f842 1b04 	str.w	r1, [r2], #4
 8003f34:	d1f9      	bne.n	8003f2a <Atten_Operate_Mem_RW+0xc72>
 8003f36:	4b72      	ldr	r3, [pc, #456]	; (8004100 <Atten_Operate_Mem_RW+0xe48>)
 8003f38:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003f3c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003f40:	f853 0b04 	ldr.w	r0, [r3], #4
 8003f44:	428b      	cmp	r3, r1
 8003f46:	f842 0b04 	str.w	r0, [r2], #4
 8003f4a:	d1f9      	bne.n	8003f40 <Atten_Operate_Mem_RW+0xc88>
 8003f4c:	f7ff ba4b 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G1_28_5_29Ghz	: memcpy(&ATT_B_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003f50:	4a6c      	ldr	r2, [pc, #432]	; (8004104 <Atten_Operate_Mem_RW+0xe4c>)
 8003f52:	1ce3      	adds	r3, r4, #3
 8003f54:	3443      	adds	r4, #67	; 0x43
 8003f56:	f853 1b04 	ldr.w	r1, [r3], #4
 8003f5a:	42a3      	cmp	r3, r4
 8003f5c:	f842 1b04 	str.w	r1, [r2], #4
 8003f60:	d1f9      	bne.n	8003f56 <Atten_Operate_Mem_RW+0xc9e>
 8003f62:	4b68      	ldr	r3, [pc, #416]	; (8004104 <Atten_Operate_Mem_RW+0xe4c>)
 8003f64:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003f68:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003f6c:	f853 0b04 	ldr.w	r0, [r3], #4
 8003f70:	428b      	cmp	r3, r1
 8003f72:	f842 0b04 	str.w	r0, [r2], #4
 8003f76:	d1f9      	bne.n	8003f6c <Atten_Operate_Mem_RW+0xcb4>
 8003f78:	f7ff ba35 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G2_28_5_29Ghz	: memcpy(&ATT_B_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003f7c:	4a62      	ldr	r2, [pc, #392]	; (8004108 <Atten_Operate_Mem_RW+0xe50>)
 8003f7e:	1ce3      	adds	r3, r4, #3
 8003f80:	3443      	adds	r4, #67	; 0x43
 8003f82:	f853 1b04 	ldr.w	r1, [r3], #4
 8003f86:	42a3      	cmp	r3, r4
 8003f88:	f842 1b04 	str.w	r1, [r2], #4
 8003f8c:	d1f9      	bne.n	8003f82 <Atten_Operate_Mem_RW+0xcca>
 8003f8e:	4b5e      	ldr	r3, [pc, #376]	; (8004108 <Atten_Operate_Mem_RW+0xe50>)
 8003f90:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003f94:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003f98:	f853 0b04 	ldr.w	r0, [r3], #4
 8003f9c:	428b      	cmp	r3, r1
 8003f9e:	f842 0b04 	str.w	r0, [r2], #4
 8003fa2:	d1f9      	bne.n	8003f98 <Atten_Operate_Mem_RW+0xce0>
 8003fa4:	f7ff ba1f 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G3_28_5_29Ghz	: memcpy(&ATT_B_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003fa8:	4a58      	ldr	r2, [pc, #352]	; (800410c <Atten_Operate_Mem_RW+0xe54>)
 8003faa:	1ce3      	adds	r3, r4, #3
 8003fac:	3443      	adds	r4, #67	; 0x43
 8003fae:	f853 1b04 	ldr.w	r1, [r3], #4
 8003fb2:	42a3      	cmp	r3, r4
 8003fb4:	f842 1b04 	str.w	r1, [r2], #4
 8003fb8:	d1f9      	bne.n	8003fae <Atten_Operate_Mem_RW+0xcf6>
 8003fba:	4b54      	ldr	r3, [pc, #336]	; (800410c <Atten_Operate_Mem_RW+0xe54>)
 8003fbc:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003fc0:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003fc4:	f853 0b04 	ldr.w	r0, [r3], #4
 8003fc8:	428b      	cmp	r3, r1
 8003fca:	f842 0b04 	str.w	r0, [r2], #4
 8003fce:	d1f9      	bne.n	8003fc4 <Atten_Operate_Mem_RW+0xd0c>
 8003fd0:	f7ff ba09 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G1_29_29_5Ghz	: memcpy(&ATT_B_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8003fd4:	4a4e      	ldr	r2, [pc, #312]	; (8004110 <Atten_Operate_Mem_RW+0xe58>)
 8003fd6:	1ce3      	adds	r3, r4, #3
 8003fd8:	3443      	adds	r4, #67	; 0x43
 8003fda:	f853 1b04 	ldr.w	r1, [r3], #4
 8003fde:	42a3      	cmp	r3, r4
 8003fe0:	f842 1b04 	str.w	r1, [r2], #4
 8003fe4:	d1f9      	bne.n	8003fda <Atten_Operate_Mem_RW+0xd22>
 8003fe6:	4b4a      	ldr	r3, [pc, #296]	; (8004110 <Atten_Operate_Mem_RW+0xe58>)
 8003fe8:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8003fec:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8003ff0:	f853 0b04 	ldr.w	r0, [r3], #4
 8003ff4:	428b      	cmp	r3, r1
 8003ff6:	f842 0b04 	str.w	r0, [r2], #4
 8003ffa:	d1f9      	bne.n	8003ff0 <Atten_Operate_Mem_RW+0xd38>
 8003ffc:	f7ff b9f3 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G2_29_29_5Ghz	: memcpy(&ATT_B_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8004000:	4a44      	ldr	r2, [pc, #272]	; (8004114 <Atten_Operate_Mem_RW+0xe5c>)
 8004002:	1ce3      	adds	r3, r4, #3
 8004004:	3443      	adds	r4, #67	; 0x43
 8004006:	f853 1b04 	ldr.w	r1, [r3], #4
 800400a:	42a3      	cmp	r3, r4
 800400c:	f842 1b04 	str.w	r1, [r2], #4
 8004010:	d1f9      	bne.n	8004006 <Atten_Operate_Mem_RW+0xd4e>
 8004012:	4b40      	ldr	r3, [pc, #256]	; (8004114 <Atten_Operate_Mem_RW+0xe5c>)
 8004014:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004018:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800401c:	f853 0b04 	ldr.w	r0, [r3], #4
 8004020:	428b      	cmp	r3, r1
 8004022:	f842 0b04 	str.w	r0, [r2], #4
 8004026:	d1f9      	bne.n	800401c <Atten_Operate_Mem_RW+0xd64>
 8004028:	f7ff b9dd 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G3_29_29_5Ghz	: memcpy(&ATT_B_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 800402c:	4a3a      	ldr	r2, [pc, #232]	; (8004118 <Atten_Operate_Mem_RW+0xe60>)
 800402e:	1ce3      	adds	r3, r4, #3
 8004030:	3443      	adds	r4, #67	; 0x43
 8004032:	f853 1b04 	ldr.w	r1, [r3], #4
 8004036:	42a3      	cmp	r3, r4
 8004038:	f842 1b04 	str.w	r1, [r2], #4
 800403c:	d1f9      	bne.n	8004032 <Atten_Operate_Mem_RW+0xd7a>
 800403e:	4b36      	ldr	r3, [pc, #216]	; (8004118 <Atten_Operate_Mem_RW+0xe60>)
 8004040:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004044:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004048:	f853 0b04 	ldr.w	r0, [r3], #4
 800404c:	428b      	cmp	r3, r1
 800404e:	f842 0b04 	str.w	r0, [r2], #4
 8004052:	d1f9      	bne.n	8004048 <Atten_Operate_Mem_RW+0xd90>
 8004054:	f7ff b9c7 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G1_29_5_30Ghz	: memcpy(&ATT_B_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8004058:	4a30      	ldr	r2, [pc, #192]	; (800411c <Atten_Operate_Mem_RW+0xe64>)
 800405a:	1ce3      	adds	r3, r4, #3
 800405c:	3443      	adds	r4, #67	; 0x43
 800405e:	f853 1b04 	ldr.w	r1, [r3], #4
 8004062:	42a3      	cmp	r3, r4
 8004064:	f842 1b04 	str.w	r1, [r2], #4
 8004068:	d1f9      	bne.n	800405e <Atten_Operate_Mem_RW+0xda6>
 800406a:	4b2c      	ldr	r3, [pc, #176]	; (800411c <Atten_Operate_Mem_RW+0xe64>)
 800406c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004070:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004074:	f853 0b04 	ldr.w	r0, [r3], #4
 8004078:	428b      	cmp	r3, r1
 800407a:	f842 0b04 	str.w	r0, [r2], #4
 800407e:	d1f9      	bne.n	8004074 <Atten_Operate_Mem_RW+0xdbc>
 8004080:	f7ff b9b1 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G2_29_5_30Ghz	: memcpy(&ATT_B_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 8004084:	4a26      	ldr	r2, [pc, #152]	; (8004120 <Atten_Operate_Mem_RW+0xe68>)
 8004086:	1ce3      	adds	r3, r4, #3
 8004088:	3443      	adds	r4, #67	; 0x43
 800408a:	f853 1b04 	ldr.w	r1, [r3], #4
 800408e:	42a3      	cmp	r3, r4
 8004090:	f842 1b04 	str.w	r1, [r2], #4
 8004094:	d1f9      	bne.n	800408a <Atten_Operate_Mem_RW+0xdd2>
 8004096:	4b22      	ldr	r3, [pc, #136]	; (8004120 <Atten_Operate_Mem_RW+0xe68>)
 8004098:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800409c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80040a0:	f853 0b04 	ldr.w	r0, [r3], #4
 80040a4:	428b      	cmp	r3, r1
 80040a6:	f842 0b04 	str.w	r0, [r2], #4
 80040aa:	d1f9      	bne.n	80040a0 <Atten_Operate_Mem_RW+0xde8>
 80040ac:	f7ff b99b 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
    		 case ATT_B_EN_30G3_29_5_30Ghz	: memcpy(&ATT_B_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,&data[Bluecell_DATA],sizeof(Atten_Table_Value_t));memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));break;	   
 80040b0:	4a1c      	ldr	r2, [pc, #112]	; (8004124 <Atten_Operate_Mem_RW+0xe6c>)
 80040b2:	1ce3      	adds	r3, r4, #3
 80040b4:	3443      	adds	r4, #67	; 0x43
 80040b6:	f853 1b04 	ldr.w	r1, [r3], #4
 80040ba:	42a3      	cmp	r3, r4
 80040bc:	f842 1b04 	str.w	r1, [r2], #4
 80040c0:	d1f9      	bne.n	80040b6 <Atten_Operate_Mem_RW+0xdfe>
 80040c2:	4b18      	ldr	r3, [pc, #96]	; (8004124 <Atten_Operate_Mem_RW+0xe6c>)
 80040c4:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80040c8:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80040cc:	f853 0b04 	ldr.w	r0, [r3], #4
 80040d0:	428b      	cmp	r3, r1
 80040d2:	f842 0b04 	str.w	r0, [r2], #4
 80040d6:	d1f9      	bne.n	80040cc <Atten_Operate_Mem_RW+0xe14>
 80040d8:	f7ff b985 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
 80040dc:	200003a0 	.word	0x200003a0
 80040e0:	200007d1 	.word	0x200007d1
 80040e4:	200000e0 	.word	0x200000e0
 80040e8:	20000a11 	.word	0x20000a11
 80040ec:	200005a0 	.word	0x200005a0
 80040f0:	20000220 	.word	0x20000220
 80040f4:	20000320 	.word	0x20000320
 80040f8:	20000160 	.word	0x20000160
 80040fc:	200002e0 	.word	0x200002e0
 8004100:	20000991 	.word	0x20000991
 8004104:	200003e0 	.word	0x200003e0
 8004108:	20000520 	.word	0x20000520
 800410c:	20000260 	.word	0x20000260
 8004110:	20000620 	.word	0x20000620
 8004114:	20000660 	.word	0x20000660
 8004118:	200004e0 	.word	0x200004e0
 800411c:	20000911 	.word	0x20000911
 8004120:	20000a51 	.word	0x20000a51
 8004124:	20000891 	.word	0x20000891
             case ATT_A_EN_150M_R              : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_150M_Table.Atten_Table_31_5dB_Value            ,sizeof(Atten_Table_Value_t));     
 8004128:	4bd6      	ldr	r3, [pc, #856]	; (8004484 <Atten_Operate_Mem_RW+0x11cc>)
 800412a:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800412e:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004132:	f853 0b04 	ldr.w	r0, [r3], #4
 8004136:	428b      	cmp	r3, r1
 8004138:	f842 0b04 	str.w	r0, [r2], #4
 800413c:	d1f9      	bne.n	8004132 <Atten_Operate_Mem_RW+0xe7a>
 800413e:	f7ff b952 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI1_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 8004142:	4bd1      	ldr	r3, [pc, #836]	; (8004488 <Atten_Operate_Mem_RW+0x11d0>)
 8004144:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004148:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800414c:	f853 0b04 	ldr.w	r0, [r3], #4
 8004150:	428b      	cmp	r3, r1
 8004152:	f842 0b04 	str.w	r0, [r2], #4
 8004156:	d1f9      	bne.n	800414c <Atten_Operate_Mem_RW+0xe94>
 8004158:	f7ff b945 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI2_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 800415c:	4bcb      	ldr	r3, [pc, #812]	; (800448c <Atten_Operate_Mem_RW+0x11d4>)
 800415e:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004162:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004166:	f853 0b04 	ldr.w	r0, [r3], #4
 800416a:	428b      	cmp	r3, r1
 800416c:	f842 0b04 	str.w	r0, [r2], #4
 8004170:	d1f9      	bne.n	8004166 <Atten_Operate_Mem_RW+0xeae>
 8004172:	f7ff b938 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI3_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI3_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 8004176:	4bc6      	ldr	r3, [pc, #792]	; (8004490 <Atten_Operate_Mem_RW+0x11d8>)
 8004178:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800417c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004180:	f853 0b04 	ldr.w	r0, [r3], #4
 8004184:	428b      	cmp	r3, r1
 8004186:	f842 0b04 	str.w	r0, [r2], #4
 800418a:	d1f9      	bne.n	8004180 <Atten_Operate_Mem_RW+0xec8>
 800418c:	f7ff b92b 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI4_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 8004190:	4bc0      	ldr	r3, [pc, #768]	; (8004494 <Atten_Operate_Mem_RW+0x11dc>)
 8004192:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004196:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800419a:	f853 0b04 	ldr.w	r0, [r3], #4
 800419e:	428b      	cmp	r3, r1
 80041a0:	f842 0b04 	str.w	r0, [r2], #4
 80041a4:	d1f9      	bne.n	800419a <Atten_Operate_Mem_RW+0xee2>
 80041a6:	f7ff b91e 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI1_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 80041aa:	4bbb      	ldr	r3, [pc, #748]	; (8004498 <Atten_Operate_Mem_RW+0x11e0>)
 80041ac:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80041b0:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80041b4:	f853 0b04 	ldr.w	r0, [r3], #4
 80041b8:	428b      	cmp	r3, r1
 80041ba:	f842 0b04 	str.w	r0, [r2], #4
 80041be:	d1f9      	bne.n	80041b4 <Atten_Operate_Mem_RW+0xefc>
 80041c0:	f7ff b911 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI2_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 80041c4:	4bb5      	ldr	r3, [pc, #724]	; (800449c <Atten_Operate_Mem_RW+0x11e4>)
 80041c6:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80041ca:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80041ce:	f853 0b04 	ldr.w	r0, [r3], #4
 80041d2:	428b      	cmp	r3, r1
 80041d4:	f842 0b04 	str.w	r0, [r2], #4
 80041d8:	d1f9      	bne.n	80041ce <Atten_Operate_Mem_RW+0xf16>
 80041da:	f7ff b904 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI3_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 80041de:	4bb0      	ldr	r3, [pc, #704]	; (80044a0 <Atten_Operate_Mem_RW+0x11e8>)
 80041e0:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80041e4:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80041e8:	f853 0b04 	ldr.w	r0, [r3], #4
 80041ec:	428b      	cmp	r3, r1
 80041ee:	f842 0b04 	str.w	r0, [r2], #4
 80041f2:	d1f9      	bne.n	80041e8 <Atten_Operate_Mem_RW+0xf30>
 80041f4:	f7ff b8f7 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_WIFI4_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 80041f8:	4baa      	ldr	r3, [pc, #680]	; (80044a4 <Atten_Operate_Mem_RW+0x11ec>)
 80041fa:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80041fe:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004202:	f853 0b04 	ldr.w	r0, [r3], #4
 8004206:	428b      	cmp	r3, r1
 8004208:	f842 0b04 	str.w	r0, [r2], #4
 800420c:	d1f9      	bne.n	8004202 <Atten_Operate_Mem_RW+0xf4a>
 800420e:	f7ff b8ea 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G1_28_28_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004212:	4ba5      	ldr	r3, [pc, #660]	; (80044a8 <Atten_Operate_Mem_RW+0x11f0>)
 8004214:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004218:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800421c:	f853 0b04 	ldr.w	r0, [r3], #4
 8004220:	428b      	cmp	r3, r1
 8004222:	f842 0b04 	str.w	r0, [r2], #4
 8004226:	d1f9      	bne.n	800421c <Atten_Operate_Mem_RW+0xf64>
 8004228:	f7ff b8dd 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G2_28_28_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 800422c:	4b9f      	ldr	r3, [pc, #636]	; (80044ac <Atten_Operate_Mem_RW+0x11f4>)
 800422e:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004232:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004236:	f853 0b04 	ldr.w	r0, [r3], #4
 800423a:	428b      	cmp	r3, r1
 800423c:	f842 0b04 	str.w	r0, [r2], #4
 8004240:	d1f9      	bne.n	8004236 <Atten_Operate_Mem_RW+0xf7e>
 8004242:	f7ff b8d0 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G3_28_28_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004246:	4b9a      	ldr	r3, [pc, #616]	; (80044b0 <Atten_Operate_Mem_RW+0x11f8>)
 8004248:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800424c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004250:	f853 0b04 	ldr.w	r0, [r3], #4
 8004254:	428b      	cmp	r3, r1
 8004256:	f842 0b04 	str.w	r0, [r2], #4
 800425a:	d1f9      	bne.n	8004250 <Atten_Operate_Mem_RW+0xf98>
 800425c:	f7ff b8c3 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G1_28_5_29Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004260:	4b94      	ldr	r3, [pc, #592]	; (80044b4 <Atten_Operate_Mem_RW+0x11fc>)
 8004262:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004266:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800426a:	f853 0b04 	ldr.w	r0, [r3], #4
 800426e:	428b      	cmp	r3, r1
 8004270:	f842 0b04 	str.w	r0, [r2], #4
 8004274:	d1f9      	bne.n	800426a <Atten_Operate_Mem_RW+0xfb2>
 8004276:	f7ff b8b6 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G2_28_5_29Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 800427a:	4b8f      	ldr	r3, [pc, #572]	; (80044b8 <Atten_Operate_Mem_RW+0x1200>)
 800427c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004280:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004284:	f853 0b04 	ldr.w	r0, [r3], #4
 8004288:	428b      	cmp	r3, r1
 800428a:	f842 0b04 	str.w	r0, [r2], #4
 800428e:	d1f9      	bne.n	8004284 <Atten_Operate_Mem_RW+0xfcc>
 8004290:	f7ff b8a9 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G3_28_5_29Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004294:	4b89      	ldr	r3, [pc, #548]	; (80044bc <Atten_Operate_Mem_RW+0x1204>)
 8004296:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800429a:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800429e:	f853 0b04 	ldr.w	r0, [r3], #4
 80042a2:	428b      	cmp	r3, r1
 80042a4:	f842 0b04 	str.w	r0, [r2], #4
 80042a8:	d1f9      	bne.n	800429e <Atten_Operate_Mem_RW+0xfe6>
 80042aa:	f7ff b89c 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G1_29_29_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 80042ae:	4b84      	ldr	r3, [pc, #528]	; (80044c0 <Atten_Operate_Mem_RW+0x1208>)
 80042b0:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80042b4:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80042b8:	f853 0b04 	ldr.w	r0, [r3], #4
 80042bc:	428b      	cmp	r3, r1
 80042be:	f842 0b04 	str.w	r0, [r2], #4
 80042c2:	d1f9      	bne.n	80042b8 <Atten_Operate_Mem_RW+0x1000>
 80042c4:	f7ff b88f 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G2_29_29_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 80042c8:	4b7e      	ldr	r3, [pc, #504]	; (80044c4 <Atten_Operate_Mem_RW+0x120c>)
 80042ca:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80042ce:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80042d2:	f853 0b04 	ldr.w	r0, [r3], #4
 80042d6:	428b      	cmp	r3, r1
 80042d8:	f842 0b04 	str.w	r0, [r2], #4
 80042dc:	d1f9      	bne.n	80042d2 <Atten_Operate_Mem_RW+0x101a>
 80042de:	f7ff b882 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G3_29_29_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 80042e2:	4b79      	ldr	r3, [pc, #484]	; (80044c8 <Atten_Operate_Mem_RW+0x1210>)
 80042e4:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80042e8:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80042ec:	f853 0b04 	ldr.w	r0, [r3], #4
 80042f0:	428b      	cmp	r3, r1
 80042f2:	f842 0b04 	str.w	r0, [r2], #4
 80042f6:	d1f9      	bne.n	80042ec <Atten_Operate_Mem_RW+0x1034>
 80042f8:	f7ff b875 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G1_29_5_30Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 80042fc:	4b73      	ldr	r3, [pc, #460]	; (80044cc <Atten_Operate_Mem_RW+0x1214>)
 80042fe:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004302:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004306:	f853 0b04 	ldr.w	r0, [r3], #4
 800430a:	428b      	cmp	r3, r1
 800430c:	f842 0b04 	str.w	r0, [r2], #4
 8004310:	d1f9      	bne.n	8004306 <Atten_Operate_Mem_RW+0x104e>
 8004312:	f7ff b868 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G2_29_5_30Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004316:	4b6e      	ldr	r3, [pc, #440]	; (80044d0 <Atten_Operate_Mem_RW+0x1218>)
 8004318:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800431c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004320:	f853 0b04 	ldr.w	r0, [r3], #4
 8004324:	428b      	cmp	r3, r1
 8004326:	f842 0b04 	str.w	r0, [r2], #4
 800432a:	d1f9      	bne.n	8004320 <Atten_Operate_Mem_RW+0x1068>
 800432c:	f7ff b85b 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_A_EN_30G3_29_5_30Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_A_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004330:	4b68      	ldr	r3, [pc, #416]	; (80044d4 <Atten_Operate_Mem_RW+0x121c>)
 8004332:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004336:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800433a:	f853 0b04 	ldr.w	r0, [r3], #4
 800433e:	428b      	cmp	r3, r1
 8004340:	f842 0b04 	str.w	r0, [r2], #4
 8004344:	d1f9      	bne.n	800433a <Atten_Operate_Mem_RW+0x1082>
 8004346:	f7ff b84e 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_150M_R              : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_150M_Table.Atten_Table_31_5dB_Value            ,sizeof(Atten_Table_Value_t));     
 800434a:	4b63      	ldr	r3, [pc, #396]	; (80044d8 <Atten_Operate_Mem_RW+0x1220>)
 800434c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004350:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004354:	f853 0b04 	ldr.w	r0, [r3], #4
 8004358:	428b      	cmp	r3, r1
 800435a:	f842 0b04 	str.w	r0, [r2], #4
 800435e:	d1f9      	bne.n	8004354 <Atten_Operate_Mem_RW+0x109c>
 8004360:	f7ff b841 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI1_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 8004364:	4b5d      	ldr	r3, [pc, #372]	; (80044dc <Atten_Operate_Mem_RW+0x1224>)
 8004366:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800436a:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800436e:	f853 0b04 	ldr.w	r0, [r3], #4
 8004372:	428b      	cmp	r3, r1
 8004374:	f842 0b04 	str.w	r0, [r2], #4
 8004378:	d1f9      	bne.n	800436e <Atten_Operate_Mem_RW+0x10b6>
 800437a:	f7ff b834 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI2_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 800437e:	4b58      	ldr	r3, [pc, #352]	; (80044e0 <Atten_Operate_Mem_RW+0x1228>)
 8004380:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004384:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004388:	f853 0b04 	ldr.w	r0, [r3], #4
 800438c:	428b      	cmp	r3, r1
 800438e:	f842 0b04 	str.w	r0, [r2], #4
 8004392:	d1f9      	bne.n	8004388 <Atten_Operate_Mem_RW+0x10d0>
 8004394:	f7ff b827 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI3_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI3_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 8004398:	4b52      	ldr	r3, [pc, #328]	; (80044e4 <Atten_Operate_Mem_RW+0x122c>)
 800439a:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800439e:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80043a2:	f853 0b04 	ldr.w	r0, [r3], #4
 80043a6:	428b      	cmp	r3, r1
 80043a8:	f842 0b04 	str.w	r0, [r2], #4
 80043ac:	d1f9      	bne.n	80043a2 <Atten_Operate_Mem_RW+0x10ea>
 80043ae:	f7ff b81a 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI4_2_4Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 80043b2:	4b4d      	ldr	r3, [pc, #308]	; (80044e8 <Atten_Operate_Mem_RW+0x1230>)
 80043b4:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80043b8:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80043bc:	f853 0b04 	ldr.w	r0, [r3], #4
 80043c0:	428b      	cmp	r3, r1
 80043c2:	f842 0b04 	str.w	r0, [r2], #4
 80043c6:	d1f9      	bne.n	80043bc <Atten_Operate_Mem_RW+0x1104>
 80043c8:	f7ff b80d 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI1_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 80043cc:	4b47      	ldr	r3, [pc, #284]	; (80044ec <Atten_Operate_Mem_RW+0x1234>)
 80043ce:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80043d2:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80043d6:	f853 0b04 	ldr.w	r0, [r3], #4
 80043da:	428b      	cmp	r3, r1
 80043dc:	f842 0b04 	str.w	r0, [r2], #4
 80043e0:	d1f9      	bne.n	80043d6 <Atten_Operate_Mem_RW+0x111e>
 80043e2:	f7ff b800 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI2_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 80043e6:	4b42      	ldr	r3, [pc, #264]	; (80044f0 <Atten_Operate_Mem_RW+0x1238>)
 80043e8:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80043ec:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80043f0:	f853 0b04 	ldr.w	r0, [r3], #4
 80043f4:	428b      	cmp	r3, r1
 80043f6:	f842 0b04 	str.w	r0, [r2], #4
 80043fa:	d1f9      	bne.n	80043f0 <Atten_Operate_Mem_RW+0x1138>
 80043fc:	f7fe bff3 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI3_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 8004400:	4b3c      	ldr	r3, [pc, #240]	; (80044f4 <Atten_Operate_Mem_RW+0x123c>)
 8004402:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004406:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800440a:	f853 0b04 	ldr.w	r0, [r3], #4
 800440e:	428b      	cmp	r3, r1
 8004410:	f842 0b04 	str.w	r0, [r2], #4
 8004414:	d1f9      	bne.n	800440a <Atten_Operate_Mem_RW+0x1152>
 8004416:	f7fe bfe6 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_WIFI4_5_8Ghz_R      : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));   
 800441a:	4b37      	ldr	r3, [pc, #220]	; (80044f8 <Atten_Operate_Mem_RW+0x1240>)
 800441c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004420:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004424:	f853 0b04 	ldr.w	r0, [r3], #4
 8004428:	428b      	cmp	r3, r1
 800442a:	f842 0b04 	str.w	r0, [r2], #4
 800442e:	d1f9      	bne.n	8004424 <Atten_Operate_Mem_RW+0x116c>
 8004430:	f7fe bfd9 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G1_28_28_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004434:	4b31      	ldr	r3, [pc, #196]	; (80044fc <Atten_Operate_Mem_RW+0x1244>)
 8004436:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800443a:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800443e:	f853 0b04 	ldr.w	r0, [r3], #4
 8004442:	428b      	cmp	r3, r1
 8004444:	f842 0b04 	str.w	r0, [r2], #4
 8004448:	d1f9      	bne.n	800443e <Atten_Operate_Mem_RW+0x1186>
 800444a:	f7fe bfcc 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G2_28_28_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 800444e:	4b2c      	ldr	r3, [pc, #176]	; (8004500 <Atten_Operate_Mem_RW+0x1248>)
 8004450:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004454:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004458:	f853 0b04 	ldr.w	r0, [r3], #4
 800445c:	428b      	cmp	r3, r1
 800445e:	f842 0b04 	str.w	r0, [r2], #4
 8004462:	d1f9      	bne.n	8004458 <Atten_Operate_Mem_RW+0x11a0>
 8004464:	f7fe bfbf 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G3_28_28_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004468:	4b26      	ldr	r3, [pc, #152]	; (8004504 <Atten_Operate_Mem_RW+0x124c>)
 800446a:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800446e:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004472:	f853 0b04 	ldr.w	r0, [r3], #4
 8004476:	428b      	cmp	r3, r1
 8004478:	f842 0b04 	str.w	r0, [r2], #4
 800447c:	d1f9      	bne.n	8004472 <Atten_Operate_Mem_RW+0x11ba>
 800447e:	f7fe bfb2 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
 8004482:	bf00      	nop
 8004484:	20000791 	.word	0x20000791
 8004488:	200002a0 	.word	0x200002a0
 800448c:	20000ad1 	.word	0x20000ad1
 8004490:	20000360 	.word	0x20000360
 8004494:	200001a0 	.word	0x200001a0
 8004498:	200009d1 	.word	0x200009d1
 800449c:	20000b51 	.word	0x20000b51
 80044a0:	200006a0 	.word	0x200006a0
 80044a4:	20000720 	.word	0x20000720
 80044a8:	200005e0 	.word	0x200005e0
 80044ac:	20000a91 	.word	0x20000a91
 80044b0:	200006e0 	.word	0x200006e0
 80044b4:	200008d1 	.word	0x200008d1
 80044b8:	20000420 	.word	0x20000420
 80044bc:	20000560 	.word	0x20000560
 80044c0:	20000b11 	.word	0x20000b11
 80044c4:	200004a0 	.word	0x200004a0
 80044c8:	20000120 	.word	0x20000120
 80044cc:	20000851 	.word	0x20000851
 80044d0:	20000811 	.word	0x20000811
 80044d4:	200001e0 	.word	0x200001e0
 80044d8:	20000951 	.word	0x20000951
 80044dc:	20000460 	.word	0x20000460
 80044e0:	200003a0 	.word	0x200003a0
 80044e4:	200007d1 	.word	0x200007d1
 80044e8:	200000e0 	.word	0x200000e0
 80044ec:	20000a11 	.word	0x20000a11
 80044f0:	200005a0 	.word	0x200005a0
 80044f4:	20000220 	.word	0x20000220
 80044f8:	20000320 	.word	0x20000320
 80044fc:	20000160 	.word	0x20000160
 8004500:	200002e0 	.word	0x200002e0
 8004504:	20000991 	.word	0x20000991
             case ATT_B_EN_30G1_28_5_29Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004508:	4b3e      	ldr	r3, [pc, #248]	; (8004604 <Atten_Operate_Mem_RW+0x134c>)
 800450a:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800450e:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004512:	f853 0b04 	ldr.w	r0, [r3], #4
 8004516:	428b      	cmp	r3, r1
 8004518:	f842 0b04 	str.w	r0, [r2], #4
 800451c:	d1f9      	bne.n	8004512 <Atten_Operate_Mem_RW+0x125a>
 800451e:	f7fe bf62 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G2_28_5_29Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004522:	4b39      	ldr	r3, [pc, #228]	; (8004608 <Atten_Operate_Mem_RW+0x1350>)
 8004524:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004528:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800452c:	f853 0b04 	ldr.w	r0, [r3], #4
 8004530:	428b      	cmp	r3, r1
 8004532:	f842 0b04 	str.w	r0, [r2], #4
 8004536:	d1f9      	bne.n	800452c <Atten_Operate_Mem_RW+0x1274>
 8004538:	f7fe bf55 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G3_28_5_29Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 800453c:	4b33      	ldr	r3, [pc, #204]	; (800460c <Atten_Operate_Mem_RW+0x1354>)
 800453e:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004542:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004546:	f853 0b04 	ldr.w	r0, [r3], #4
 800454a:	428b      	cmp	r3, r1
 800454c:	f842 0b04 	str.w	r0, [r2], #4
 8004550:	d1f9      	bne.n	8004546 <Atten_Operate_Mem_RW+0x128e>
 8004552:	f7fe bf48 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G1_29_29_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004556:	4b2e      	ldr	r3, [pc, #184]	; (8004610 <Atten_Operate_Mem_RW+0x1358>)
 8004558:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 800455c:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004560:	f853 0b04 	ldr.w	r0, [r3], #4
 8004564:	428b      	cmp	r3, r1
 8004566:	f842 0b04 	str.w	r0, [r2], #4
 800456a:	d1f9      	bne.n	8004560 <Atten_Operate_Mem_RW+0x12a8>
 800456c:	f7fe bf3b 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G2_29_29_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 8004570:	4b28      	ldr	r3, [pc, #160]	; (8004614 <Atten_Operate_Mem_RW+0x135c>)
 8004572:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004576:	f103 0140 	add.w	r1, r3, #64	; 0x40
 800457a:	f853 0b04 	ldr.w	r0, [r3], #4
 800457e:	428b      	cmp	r3, r1
 8004580:	f842 0b04 	str.w	r0, [r2], #4
 8004584:	d1f9      	bne.n	800457a <Atten_Operate_Mem_RW+0x12c2>
 8004586:	f7fe bf2e 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G3_29_29_5Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 800458a:	4b23      	ldr	r3, [pc, #140]	; (8004618 <Atten_Operate_Mem_RW+0x1360>)
 800458c:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 8004590:	f103 0140 	add.w	r1, r3, #64	; 0x40
 8004594:	f853 0b04 	ldr.w	r0, [r3], #4
 8004598:	428b      	cmp	r3, r1
 800459a:	f842 0b04 	str.w	r0, [r2], #4
 800459e:	d1f9      	bne.n	8004594 <Atten_Operate_Mem_RW+0x12dc>
 80045a0:	f7fe bf21 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G1_29_5_30Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 80045a4:	4b1d      	ldr	r3, [pc, #116]	; (800461c <Atten_Operate_Mem_RW+0x1364>)
 80045a6:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80045aa:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80045ae:	f853 0b04 	ldr.w	r0, [r3], #4
 80045b2:	428b      	cmp	r3, r1
 80045b4:	f842 0b04 	str.w	r0, [r2], #4
 80045b8:	d1f9      	bne.n	80045ae <Atten_Operate_Mem_RW+0x12f6>
 80045ba:	f7fe bf14 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G2_29_5_30Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 80045be:	4b18      	ldr	r3, [pc, #96]	; (8004620 <Atten_Operate_Mem_RW+0x1368>)
 80045c0:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80045c4:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80045c8:	f853 0b04 	ldr.w	r0, [r3], #4
 80045cc:	428b      	cmp	r3, r1
 80045ce:	f842 0b04 	str.w	r0, [r2], #4
 80045d2:	d1f9      	bne.n	80045c8 <Atten_Operate_Mem_RW+0x1310>
 80045d4:	f7fe bf07 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
             case ATT_B_EN_30G3_29_5_30Ghz_R   : memcpy(&ResultBuf[Bluecell_DATA],&ATT_B_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));      
 80045d8:	4b12      	ldr	r3, [pc, #72]	; (8004624 <Atten_Operate_Mem_RW+0x136c>)
 80045da:	f10d 023f 	add.w	r2, sp, #63	; 0x3f
 80045de:	f103 0140 	add.w	r1, r3, #64	; 0x40
 80045e2:	f853 0b04 	ldr.w	r0, [r3], #4
 80045e6:	428b      	cmp	r3, r1
 80045e8:	f842 0b04 	str.w	r0, [r2], #4
 80045ec:	d1f9      	bne.n	80045e2 <Atten_Operate_Mem_RW+0x132a>
 80045ee:	f7fe befa 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
            default:printf("[Error ]Defalut in %s      LINE :%d \r\n",__func__,__LINE__);break;
 80045f2:	f240 427b 	movw	r2, #1147	; 0x47b
 80045f6:	490c      	ldr	r1, [pc, #48]	; (8004628 <Atten_Operate_Mem_RW+0x1370>)
 80045f8:	480c      	ldr	r0, [pc, #48]	; (800462c <Atten_Operate_Mem_RW+0x1374>)
 80045fa:	f000 fd4d 	bl	8005098 <iprintf>
 80045fe:	f7fe bef2 	b.w	80033e6 <Atten_Operate_Mem_RW+0x12e>
 8004602:	bf00      	nop
 8004604:	200003e0 	.word	0x200003e0
 8004608:	20000520 	.word	0x20000520
 800460c:	20000260 	.word	0x20000260
 8004610:	20000620 	.word	0x20000620
 8004614:	20000660 	.word	0x20000660
 8004618:	200004e0 	.word	0x200004e0
 800461c:	20000911 	.word	0x20000911
 8004620:	20000a51 	.word	0x20000a51
 8004624:	20000891 	.word	0x20000891
 8004628:	080061ab 	.word	0x080061ab
 800462c:	08006184 	.word	0x08006184

08004630 <EEPROM_IM24CM01P_write>:
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_29_5_30Ghz,&ATT_B_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_29_5_30Ghz,&ATT_B_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_29_5_30Ghz,&ATT_B_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
}

HAL_StatusTypeDef EEPROM_IM24CM01P_write(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size){
 8004630:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    HAL_StatusTypeDef ret = HAL_ERROR;
    ret = HAL_I2C_Mem_Write(&hi2c3, devid, Address,  I2C_MEMADD_SIZE_16BIT, data, size, 10);
 8004632:	240a      	movs	r4, #10
 8004634:	e88d 001c 	stmia.w	sp, {r2, r3, r4}
 8004638:	460a      	mov	r2, r1
 800463a:	2310      	movs	r3, #16
 800463c:	4601      	mov	r1, r0
 800463e:	4805      	ldr	r0, [pc, #20]	; (8004654 <EEPROM_IM24CM01P_write+0x24>)
 8004640:	f7fc fb34 	bl	8000cac <HAL_I2C_Mem_Write>
 8004644:	4604      	mov	r4, r0
    HAL_Delay(5);
 8004646:	2005      	movs	r0, #5
 8004648:	f7fb ff80 	bl	800054c <HAL_Delay>
    return ret;
}
 800464c:	4620      	mov	r0, r4
 800464e:	b004      	add	sp, #16
 8004650:	bd10      	pop	{r4, pc}
 8004652:	bf00      	nop
 8004654:	20000b94 	.word	0x20000b94

08004658 <EEPROM_IM24CM01P_Read>:

HAL_StatusTypeDef EEPROM_IM24CM01P_Read(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size){
 8004658:	b51f      	push	{r0, r1, r2, r3, r4, lr}
   HAL_StatusTypeDef ret = HAL_ERROR;
   ret = HAL_I2C_Mem_Read(&hi2c3, devid, Address, I2C_MEMADD_SIZE_16BIT, data, size, 10);
 800465a:	240a      	movs	r4, #10
 800465c:	e88d 001c 	stmia.w	sp, {r2, r3, r4}
 8004660:	460a      	mov	r2, r1
 8004662:	2310      	movs	r3, #16
 8004664:	4601      	mov	r1, r0
 8004666:	4805      	ldr	r0, [pc, #20]	; (800467c <EEPROM_IM24CM01P_Read+0x24>)
 8004668:	f7fc fbb6 	bl	8000dd8 <HAL_I2C_Mem_Read>
 800466c:	4604      	mov	r4, r0
   HAL_Delay(5);
 800466e:	2005      	movs	r0, #5
 8004670:	f7fb ff6c 	bl	800054c <HAL_Delay>
    return ret;   
}
 8004674:	4620      	mov	r0, r4
 8004676:	b004      	add	sp, #16
 8004678:	bd10      	pop	{r4, pc}
 800467a:	bf00      	nop
 800467c:	20000b94 	.word	0x20000b94

08004680 <EEPROM_IM24CM01P_Init>:
void EEPROM_IM24CM01P_Init(void){
 8004680:	b510      	push	{r4, lr}
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_150M			 ,&ATT_A_EN_150M_Table.Atten_Table_31_5dB_Value		      ,sizeof(Atten_Table_Value_t));
 8004682:	2340      	movs	r3, #64	; 0x40
 8004684:	4a91      	ldr	r2, [pc, #580]	; (80048cc <EEPROM_IM24CM01P_Init+0x24c>)
 8004686:	2100      	movs	r1, #0
 8004688:	20a0      	movs	r0, #160	; 0xa0
 800468a:	f7ff ffe5 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI1_2_4Ghz	 ,&ATT_A_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 800468e:	2340      	movs	r3, #64	; 0x40
 8004690:	4a8f      	ldr	r2, [pc, #572]	; (80048d0 <EEPROM_IM24CM01P_Init+0x250>)
 8004692:	4619      	mov	r1, r3
 8004694:	20a0      	movs	r0, #160	; 0xa0
 8004696:	f7ff ffdf 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI2_2_4Ghz	 ,&ATT_A_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 800469a:	2340      	movs	r3, #64	; 0x40
 800469c:	4a8d      	ldr	r2, [pc, #564]	; (80048d4 <EEPROM_IM24CM01P_Init+0x254>)
 800469e:	2180      	movs	r1, #128	; 0x80
 80046a0:	20a0      	movs	r0, #160	; 0xa0
 80046a2:	f7ff ffd9 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI3_2_4Ghz	 ,&ATT_A_EN_WIFI3_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80046a6:	2340      	movs	r3, #64	; 0x40
 80046a8:	4a8b      	ldr	r2, [pc, #556]	; (80048d8 <EEPROM_IM24CM01P_Init+0x258>)
 80046aa:	21c0      	movs	r1, #192	; 0xc0
 80046ac:	20a0      	movs	r0, #160	; 0xa0
 80046ae:	f7ff ffd3 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI4_2_4Ghz	 ,&ATT_A_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80046b2:	2340      	movs	r3, #64	; 0x40
 80046b4:	4a89      	ldr	r2, [pc, #548]	; (80048dc <EEPROM_IM24CM01P_Init+0x25c>)
 80046b6:	f44f 7180 	mov.w	r1, #256	; 0x100
 80046ba:	20a0      	movs	r0, #160	; 0xa0
 80046bc:	f7ff ffcc 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI1_5_8Ghz	 ,&ATT_A_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80046c0:	2340      	movs	r3, #64	; 0x40
 80046c2:	4a87      	ldr	r2, [pc, #540]	; (80048e0 <EEPROM_IM24CM01P_Init+0x260>)
 80046c4:	f44f 71a0 	mov.w	r1, #320	; 0x140
 80046c8:	20a0      	movs	r0, #160	; 0xa0
 80046ca:	f7ff ffc5 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI2_5_8Ghz	 ,&ATT_A_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80046ce:	2340      	movs	r3, #64	; 0x40
 80046d0:	4a84      	ldr	r2, [pc, #528]	; (80048e4 <EEPROM_IM24CM01P_Init+0x264>)
 80046d2:	f44f 71c0 	mov.w	r1, #384	; 0x180
 80046d6:	20a0      	movs	r0, #160	; 0xa0
 80046d8:	f7ff ffbe 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI3_5_8Ghz	 ,&ATT_A_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80046dc:	2340      	movs	r3, #64	; 0x40
 80046de:	4a82      	ldr	r2, [pc, #520]	; (80048e8 <EEPROM_IM24CM01P_Init+0x268>)
 80046e0:	f44f 71e0 	mov.w	r1, #448	; 0x1c0
 80046e4:	20a0      	movs	r0, #160	; 0xa0
 80046e6:	f7ff ffb7 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_WIFI4_5_8Ghz	 ,&ATT_A_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80046ea:	2340      	movs	r3, #64	; 0x40
 80046ec:	4a7f      	ldr	r2, [pc, #508]	; (80048ec <EEPROM_IM24CM01P_Init+0x26c>)
 80046ee:	f44f 7100 	mov.w	r1, #512	; 0x200
 80046f2:	20a0      	movs	r0, #160	; 0xa0
 80046f4:	f7ff ffb0 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_28_28_5Ghz,&ATT_A_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 80046f8:	2340      	movs	r3, #64	; 0x40
 80046fa:	4a7d      	ldr	r2, [pc, #500]	; (80048f0 <EEPROM_IM24CM01P_Init+0x270>)
 80046fc:	f44f 7110 	mov.w	r1, #576	; 0x240
 8004700:	20a0      	movs	r0, #160	; 0xa0
 8004702:	f7ff ffa9 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_28_28_5Ghz,&ATT_A_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004706:	2340      	movs	r3, #64	; 0x40
 8004708:	4a7a      	ldr	r2, [pc, #488]	; (80048f4 <EEPROM_IM24CM01P_Init+0x274>)
 800470a:	f44f 7120 	mov.w	r1, #640	; 0x280
 800470e:	20a0      	movs	r0, #160	; 0xa0
 8004710:	f7ff ffa2 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_28_28_5Ghz,&ATT_A_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004714:	2340      	movs	r3, #64	; 0x40
 8004716:	4a78      	ldr	r2, [pc, #480]	; (80048f8 <EEPROM_IM24CM01P_Init+0x278>)
 8004718:	f44f 7130 	mov.w	r1, #704	; 0x2c0
 800471c:	20a0      	movs	r0, #160	; 0xa0
 800471e:	f7ff ff9b 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_28_5_29Ghz,&ATT_A_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004722:	2340      	movs	r3, #64	; 0x40
 8004724:	4a75      	ldr	r2, [pc, #468]	; (80048fc <EEPROM_IM24CM01P_Init+0x27c>)
 8004726:	f44f 7140 	mov.w	r1, #768	; 0x300
 800472a:	20a0      	movs	r0, #160	; 0xa0
 800472c:	f7ff ff94 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_28_5_29Ghz,&ATT_A_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004730:	2340      	movs	r3, #64	; 0x40
 8004732:	4a73      	ldr	r2, [pc, #460]	; (8004900 <EEPROM_IM24CM01P_Init+0x280>)
 8004734:	f44f 7150 	mov.w	r1, #832	; 0x340
 8004738:	20a0      	movs	r0, #160	; 0xa0
 800473a:	f7ff ff8d 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_28_5_29Ghz,&ATT_A_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800473e:	2340      	movs	r3, #64	; 0x40
 8004740:	4a70      	ldr	r2, [pc, #448]	; (8004904 <EEPROM_IM24CM01P_Init+0x284>)
 8004742:	f44f 7160 	mov.w	r1, #896	; 0x380
 8004746:	20a0      	movs	r0, #160	; 0xa0
 8004748:	f7ff ff86 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_29_29_5Ghz,&ATT_A_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800474c:	2340      	movs	r3, #64	; 0x40
 800474e:	4a6e      	ldr	r2, [pc, #440]	; (8004908 <EEPROM_IM24CM01P_Init+0x288>)
 8004750:	f44f 7170 	mov.w	r1, #960	; 0x3c0
 8004754:	20a0      	movs	r0, #160	; 0xa0
 8004756:	f7ff ff7f 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_29_29_5Ghz,&ATT_A_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800475a:	2340      	movs	r3, #64	; 0x40
 800475c:	4a6b      	ldr	r2, [pc, #428]	; (800490c <EEPROM_IM24CM01P_Init+0x28c>)
 800475e:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8004762:	20a0      	movs	r0, #160	; 0xa0
 8004764:	f7ff ff78 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_29_29_5Ghz,&ATT_A_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004768:	2340      	movs	r3, #64	; 0x40
 800476a:	4a69      	ldr	r2, [pc, #420]	; (8004910 <EEPROM_IM24CM01P_Init+0x290>)
 800476c:	f44f 6188 	mov.w	r1, #1088	; 0x440
 8004770:	20a0      	movs	r0, #160	; 0xa0
 8004772:	f7ff ff71 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G1_29_5_30Ghz,&ATT_A_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004776:	2340      	movs	r3, #64	; 0x40
 8004778:	4a66      	ldr	r2, [pc, #408]	; (8004914 <EEPROM_IM24CM01P_Init+0x294>)
 800477a:	f44f 6190 	mov.w	r1, #1152	; 0x480
 800477e:	20a0      	movs	r0, #160	; 0xa0
 8004780:	f7ff ff6a 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G2_29_5_30Ghz,&ATT_A_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004784:	2340      	movs	r3, #64	; 0x40
 8004786:	4a64      	ldr	r2, [pc, #400]	; (8004918 <EEPROM_IM24CM01P_Init+0x298>)
 8004788:	f44f 6198 	mov.w	r1, #1216	; 0x4c0
 800478c:	20a0      	movs	r0, #160	; 0xa0
 800478e:	f7ff ff63 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_A_EN_30G3_29_5_30Ghz,&ATT_A_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004792:	2340      	movs	r3, #64	; 0x40
 8004794:	4a61      	ldr	r2, [pc, #388]	; (800491c <EEPROM_IM24CM01P_Init+0x29c>)
 8004796:	f44f 61a0 	mov.w	r1, #1280	; 0x500
 800479a:	20a0      	movs	r0, #160	; 0xa0
 800479c:	f7ff ff5c 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_150M			 ,&ATT_B_EN_150M_Table.Atten_Table_31_5dB_Value            ,sizeof(Atten_Table_Value_t));
 80047a0:	2340      	movs	r3, #64	; 0x40
 80047a2:	4a5f      	ldr	r2, [pc, #380]	; (8004920 <EEPROM_IM24CM01P_Init+0x2a0>)
 80047a4:	f44f 61a8 	mov.w	r1, #1344	; 0x540
 80047a8:	20a0      	movs	r0, #160	; 0xa0
 80047aa:	f7ff ff55 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI1_2_4Ghz	 ,&ATT_B_EN_WIFI1_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80047ae:	2340      	movs	r3, #64	; 0x40
 80047b0:	4a5c      	ldr	r2, [pc, #368]	; (8004924 <EEPROM_IM24CM01P_Init+0x2a4>)
 80047b2:	f44f 61b0 	mov.w	r1, #1408	; 0x580
 80047b6:	20a0      	movs	r0, #160	; 0xa0
 80047b8:	f7ff ff4e 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI2_2_4Ghz	 ,&ATT_B_EN_WIFI2_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80047bc:	2340      	movs	r3, #64	; 0x40
 80047be:	4a5a      	ldr	r2, [pc, #360]	; (8004928 <EEPROM_IM24CM01P_Init+0x2a8>)
 80047c0:	f44f 61b8 	mov.w	r1, #1472	; 0x5c0
 80047c4:	20a0      	movs	r0, #160	; 0xa0
 80047c6:	f7ff ff47 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI3_2_4Ghz	 ,&ATT_B_EN_WIFI3_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80047ca:	2340      	movs	r3, #64	; 0x40
 80047cc:	4a57      	ldr	r2, [pc, #348]	; (800492c <EEPROM_IM24CM01P_Init+0x2ac>)
 80047ce:	f44f 61c0 	mov.w	r1, #1536	; 0x600
 80047d2:	20a0      	movs	r0, #160	; 0xa0
 80047d4:	f7ff ff40 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI4_2_4Ghz	 ,&ATT_B_EN_WIFI4_2_4Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80047d8:	2340      	movs	r3, #64	; 0x40
 80047da:	4a55      	ldr	r2, [pc, #340]	; (8004930 <EEPROM_IM24CM01P_Init+0x2b0>)
 80047dc:	f44f 61c8 	mov.w	r1, #1600	; 0x640
 80047e0:	20a0      	movs	r0, #160	; 0xa0
 80047e2:	f7ff ff39 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI1_5_8Ghz	 ,&ATT_B_EN_WIFI1_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80047e6:	2340      	movs	r3, #64	; 0x40
 80047e8:	4a52      	ldr	r2, [pc, #328]	; (8004934 <EEPROM_IM24CM01P_Init+0x2b4>)
 80047ea:	f44f 61d0 	mov.w	r1, #1664	; 0x680
 80047ee:	20a0      	movs	r0, #160	; 0xa0
 80047f0:	f7ff ff32 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI2_5_8Ghz	 ,&ATT_B_EN_WIFI2_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 80047f4:	2340      	movs	r3, #64	; 0x40
 80047f6:	4a50      	ldr	r2, [pc, #320]	; (8004938 <EEPROM_IM24CM01P_Init+0x2b8>)
 80047f8:	f44f 61d8 	mov.w	r1, #1728	; 0x6c0
 80047fc:	20a0      	movs	r0, #160	; 0xa0
 80047fe:	f7ff ff2b 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI3_5_8Ghz	 ,&ATT_B_EN_WIFI3_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 8004802:	2340      	movs	r3, #64	; 0x40
 8004804:	4a4d      	ldr	r2, [pc, #308]	; (800493c <EEPROM_IM24CM01P_Init+0x2bc>)
 8004806:	f44f 61e0 	mov.w	r1, #1792	; 0x700
 800480a:	20a0      	movs	r0, #160	; 0xa0
 800480c:	f7ff ff24 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_WIFI4_5_8Ghz	 ,&ATT_B_EN_WIFI4_5_8Ghz_Table.Atten_Table_31_5dB_Value    ,sizeof(Atten_Table_Value_t));
 8004810:	2340      	movs	r3, #64	; 0x40
 8004812:	4a4b      	ldr	r2, [pc, #300]	; (8004940 <EEPROM_IM24CM01P_Init+0x2c0>)
 8004814:	f44f 61e8 	mov.w	r1, #1856	; 0x740
 8004818:	20a0      	movs	r0, #160	; 0xa0
 800481a:	f7ff ff1d 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_28_28_5Ghz,&ATT_B_EN_30G1_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800481e:	2340      	movs	r3, #64	; 0x40
 8004820:	4a48      	ldr	r2, [pc, #288]	; (8004944 <EEPROM_IM24CM01P_Init+0x2c4>)
 8004822:	f44f 61f0 	mov.w	r1, #1920	; 0x780
 8004826:	20a0      	movs	r0, #160	; 0xa0
 8004828:	f7ff ff16 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_28_28_5Ghz,&ATT_B_EN_30G2_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800482c:	2340      	movs	r3, #64	; 0x40
 800482e:	4a46      	ldr	r2, [pc, #280]	; (8004948 <EEPROM_IM24CM01P_Init+0x2c8>)
 8004830:	f44f 61f8 	mov.w	r1, #1984	; 0x7c0
 8004834:	20a0      	movs	r0, #160	; 0xa0
 8004836:	f7ff ff0f 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_28_28_5Ghz,&ATT_B_EN_30G3_28_28_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800483a:	2340      	movs	r3, #64	; 0x40
 800483c:	4a43      	ldr	r2, [pc, #268]	; (800494c <EEPROM_IM24CM01P_Init+0x2cc>)
 800483e:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8004842:	20a0      	movs	r0, #160	; 0xa0
 8004844:	f7ff ff08 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_28_5_29Ghz,&ATT_B_EN_30G1_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004848:	2340      	movs	r3, #64	; 0x40
 800484a:	4a41      	ldr	r2, [pc, #260]	; (8004950 <EEPROM_IM24CM01P_Init+0x2d0>)
 800484c:	f44f 6104 	mov.w	r1, #2112	; 0x840
 8004850:	20a0      	movs	r0, #160	; 0xa0
 8004852:	f7ff ff01 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_28_5_29Ghz,&ATT_B_EN_30G2_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004856:	2340      	movs	r3, #64	; 0x40
 8004858:	4a3e      	ldr	r2, [pc, #248]	; (8004954 <EEPROM_IM24CM01P_Init+0x2d4>)
 800485a:	f44f 6108 	mov.w	r1, #2176	; 0x880
 800485e:	20a0      	movs	r0, #160	; 0xa0
 8004860:	f7ff fefa 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_28_5_29Ghz,&ATT_B_EN_30G3_28_5_29Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004864:	2340      	movs	r3, #64	; 0x40
 8004866:	4a3c      	ldr	r2, [pc, #240]	; (8004958 <EEPROM_IM24CM01P_Init+0x2d8>)
 8004868:	f44f 610c 	mov.w	r1, #2240	; 0x8c0
 800486c:	20a0      	movs	r0, #160	; 0xa0
 800486e:	f7ff fef3 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_29_29_5Ghz,&ATT_B_EN_30G1_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004872:	2340      	movs	r3, #64	; 0x40
 8004874:	4a39      	ldr	r2, [pc, #228]	; (800495c <EEPROM_IM24CM01P_Init+0x2dc>)
 8004876:	f44f 6110 	mov.w	r1, #2304	; 0x900
 800487a:	20a0      	movs	r0, #160	; 0xa0
 800487c:	f7ff feec 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_29_29_5Ghz,&ATT_B_EN_30G2_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 8004880:	2340      	movs	r3, #64	; 0x40
 8004882:	4a37      	ldr	r2, [pc, #220]	; (8004960 <EEPROM_IM24CM01P_Init+0x2e0>)
 8004884:	f44f 6114 	mov.w	r1, #2368	; 0x940
 8004888:	20a0      	movs	r0, #160	; 0xa0
 800488a:	f7ff fee5 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_29_29_5Ghz,&ATT_B_EN_30G3_29_29_5Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800488e:	2340      	movs	r3, #64	; 0x40
 8004890:	4a34      	ldr	r2, [pc, #208]	; (8004964 <EEPROM_IM24CM01P_Init+0x2e4>)
 8004892:	f44f 6118 	mov.w	r1, #2432	; 0x980
 8004896:	20a0      	movs	r0, #160	; 0xa0
 8004898:	f7ff fede 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G1_29_5_30Ghz,&ATT_B_EN_30G1_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 800489c:	2340      	movs	r3, #64	; 0x40
 800489e:	4a32      	ldr	r2, [pc, #200]	; (8004968 <EEPROM_IM24CM01P_Init+0x2e8>)
 80048a0:	f44f 611c 	mov.w	r1, #2496	; 0x9c0
 80048a4:	20a0      	movs	r0, #160	; 0xa0
 80048a6:	f7ff fed7 	bl	8004658 <EEPROM_IM24CM01P_Read>
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G2_29_5_30Ghz,&ATT_B_EN_30G2_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 80048aa:	2340      	movs	r3, #64	; 0x40
 80048ac:	4a2f      	ldr	r2, [pc, #188]	; (800496c <EEPROM_IM24CM01P_Init+0x2ec>)
 80048ae:	f44f 6120 	mov.w	r1, #2560	; 0xa00
 80048b2:	20a0      	movs	r0, #160	; 0xa0
 80048b4:	f7ff fed0 	bl	8004658 <EEPROM_IM24CM01P_Read>
}
 80048b8:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    EEPROM_IM24CM01P_Read(EEPROM_IM24CM01P_ID,EEPROM_ATT_B_EN_30G3_29_5_30Ghz,&ATT_B_EN_30G3_29_5_30Ghz_Table.Atten_Table_31_5dB_Value ,sizeof(Atten_Table_Value_t));
 80048bc:	2340      	movs	r3, #64	; 0x40
 80048be:	4a2c      	ldr	r2, [pc, #176]	; (8004970 <EEPROM_IM24CM01P_Init+0x2f0>)
 80048c0:	f44f 6124 	mov.w	r1, #2624	; 0xa40
 80048c4:	20a0      	movs	r0, #160	; 0xa0
 80048c6:	f7ff bec7 	b.w	8004658 <EEPROM_IM24CM01P_Read>
 80048ca:	bf00      	nop
 80048cc:	20000791 	.word	0x20000791
 80048d0:	200002a0 	.word	0x200002a0
 80048d4:	20000ad1 	.word	0x20000ad1
 80048d8:	20000360 	.word	0x20000360
 80048dc:	200001a0 	.word	0x200001a0
 80048e0:	200009d1 	.word	0x200009d1
 80048e4:	20000b51 	.word	0x20000b51
 80048e8:	200006a0 	.word	0x200006a0
 80048ec:	20000720 	.word	0x20000720
 80048f0:	200005e0 	.word	0x200005e0
 80048f4:	20000a91 	.word	0x20000a91
 80048f8:	200006e0 	.word	0x200006e0
 80048fc:	200008d1 	.word	0x200008d1
 8004900:	20000420 	.word	0x20000420
 8004904:	20000560 	.word	0x20000560
 8004908:	20000b11 	.word	0x20000b11
 800490c:	200004a0 	.word	0x200004a0
 8004910:	20000120 	.word	0x20000120
 8004914:	20000851 	.word	0x20000851
 8004918:	20000811 	.word	0x20000811
 800491c:	200001e0 	.word	0x200001e0
 8004920:	20000951 	.word	0x20000951
 8004924:	20000460 	.word	0x20000460
 8004928:	200003a0 	.word	0x200003a0
 800492c:	200007d1 	.word	0x200007d1
 8004930:	200000e0 	.word	0x200000e0
 8004934:	20000a11 	.word	0x20000a11
 8004938:	200005a0 	.word	0x200005a0
 800493c:	20000220 	.word	0x20000220
 8004940:	20000320 	.word	0x20000320
 8004944:	20000160 	.word	0x20000160
 8004948:	200002e0 	.word	0x200002e0
 800494c:	20000991 	.word	0x20000991
 8004950:	200003e0 	.word	0x200003e0
 8004954:	20000520 	.word	0x20000520
 8004958:	20000260 	.word	0x20000260
 800495c:	20000620 	.word	0x20000620
 8004960:	20000660 	.word	0x20000660
 8004964:	200004e0 	.word	0x200004e0
 8004968:	20000911 	.word	0x20000911
 800496c:	20000a51 	.word	0x20000a51
 8004970:	20000891 	.word	0x20000891

08004974 <_write>:
volatile uint32_t LedTimerCnt = 0;



int _write (int file, uint8_t *ptr, uint16_t len) 
{
 8004974:	b510      	push	{r4, lr}
 8004976:	4614      	mov	r4, r2
    HAL_UART_Transmit (&huart1, ptr, len, 10); 
 8004978:	230a      	movs	r3, #10
 800497a:	4802      	ldr	r0, [pc, #8]	; (8004984 <_write+0x10>)
 800497c:	f7fd f87e 	bl	8001a7c <HAL_UART_Transmit>
    return len;
}
 8004980:	4620      	mov	r0, r4
 8004982:	bd10      	pop	{r4, pc}
 8004984:	20000bf0 	.word	0x20000bf0

08004988 <HAL_TIM_PeriodElapsedCallback>:

void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
    if(htim->Instance == TIM6){
 8004988:	6802      	ldr	r2, [r0, #0]
 800498a:	4b0d      	ldr	r3, [pc, #52]	; (80049c0 <HAL_TIM_PeriodElapsedCallback+0x38>)
{
 800498c:	b510      	push	{r4, lr}
    if(htim->Instance == TIM6){
 800498e:	429a      	cmp	r2, r3
 8004990:	d114      	bne.n	80049bc <HAL_TIM_PeriodElapsedCallback+0x34>
        UartTimerCnt++;
 8004992:	4a0c      	ldr	r2, [pc, #48]	; (80049c4 <HAL_TIM_PeriodElapsedCallback+0x3c>)
		LedTimerCnt++;
 8004994:	4c0c      	ldr	r4, [pc, #48]	; (80049c8 <HAL_TIM_PeriodElapsedCallback+0x40>)
        UartTimerCnt++;
 8004996:	6813      	ldr	r3, [r2, #0]
 8004998:	3301      	adds	r3, #1
 800499a:	6013      	str	r3, [r2, #0]
		LedTimerCnt++;
 800499c:	6823      	ldr	r3, [r4, #0]
 800499e:	3301      	adds	r3, #1
 80049a0:	6023      	str	r3, [r4, #0]
		if(LedTimerCnt > 50){
 80049a2:	6823      	ldr	r3, [r4, #0]
 80049a4:	2b32      	cmp	r3, #50	; 0x32
 80049a6:	d909      	bls.n	80049bc <HAL_TIM_PeriodElapsedCallback+0x34>
	        HAL_GPIO_TogglePin(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2);
 80049a8:	2107      	movs	r1, #7
 80049aa:	4808      	ldr	r0, [pc, #32]	; (80049cc <HAL_TIM_PeriodElapsedCallback+0x44>)
 80049ac:	f7fb ff43 	bl	8000836 <HAL_GPIO_TogglePin>
	        HAL_GPIO_TogglePin(GPIOG, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5 
 80049b0:	21fc      	movs	r1, #252	; 0xfc
 80049b2:	4807      	ldr	r0, [pc, #28]	; (80049d0 <HAL_TIM_PeriodElapsedCallback+0x48>)
 80049b4:	f7fb ff3f 	bl	8000836 <HAL_GPIO_TogglePin>
	          |GPIO_PIN_6|GPIO_PIN_7); 
			LedTimerCnt = 0;
 80049b8:	2300      	movs	r3, #0
 80049ba:	6023      	str	r3, [r4, #0]
 80049bc:	bd10      	pop	{r4, pc}
 80049be:	bf00      	nop
 80049c0:	40001000 	.word	0x40001000
 80049c4:	2000008c 	.word	0x2000008c
 80049c8:	20000088 	.word	0x20000088
 80049cc:	40021400 	.word	0x40021400
 80049d0:	40021800 	.word	0x40021800

080049d4 <HAL_UART_RxCpltCallback>:
uint8_t UartDataisReved;


void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
    if(huart->Instance == USART1){
 80049d4:	6802      	ldr	r2, [r0, #0]
 80049d6:	4b0a      	ldr	r3, [pc, #40]	; (8004a00 <HAL_UART_RxCpltCallback+0x2c>)
 80049d8:	429a      	cmp	r2, r3
 80049da:	d110      	bne.n	80049fe <HAL_UART_RxCpltCallback+0x2a>
        ring_buf[count_in] = rx2_data[0];//(uint8_t)USART2->DR;
 80049dc:	4a09      	ldr	r2, [pc, #36]	; (8004a04 <HAL_UART_RxCpltCallback+0x30>)
 80049de:	490a      	ldr	r1, [pc, #40]	; (8004a08 <HAL_UART_RxCpltCallback+0x34>)
 80049e0:	7813      	ldrb	r3, [r2, #0]
 80049e2:	7808      	ldrb	r0, [r1, #0]
 80049e4:	4909      	ldr	r1, [pc, #36]	; (8004a0c <HAL_UART_RxCpltCallback+0x38>)
 80049e6:	54c8      	strb	r0, [r1, r3]
        if(++count_in>=buf_size) count_in=0;
 80049e8:	3301      	adds	r3, #1
 80049ea:	b2db      	uxtb	r3, r3
 80049ec:	2b3f      	cmp	r3, #63	; 0x3f
 80049ee:	bf88      	it	hi
 80049f0:	2300      	movhi	r3, #0
        HAL_UART_Receive_IT(&huart1,&rx2_data,1);
 80049f2:	4905      	ldr	r1, [pc, #20]	; (8004a08 <HAL_UART_RxCpltCallback+0x34>)
        if(++count_in>=buf_size) count_in=0;
 80049f4:	7013      	strb	r3, [r2, #0]
        HAL_UART_Receive_IT(&huart1,&rx2_data,1);
 80049f6:	4806      	ldr	r0, [pc, #24]	; (8004a10 <HAL_UART_RxCpltCallback+0x3c>)
 80049f8:	2201      	movs	r2, #1
 80049fa:	f7fd b89b 	b.w	8001b34 <HAL_UART_Receive_IT>
 80049fe:	4770      	bx	lr
 8004a00:	40011000 	.word	0x40011000
 8004a04:	20000bec 	.word	0x20000bec
 8004a08:	20000be9 	.word	0x20000be9
 8004a0c:	20000c30 	.word	0x20000c30
 8004a10:	20000bf0 	.word	0x20000bf0

08004a14 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8004a14:	b500      	push	{lr}
 8004a16:	b093      	sub	sp, #76	; 0x4c
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8004a18:	2230      	movs	r2, #48	; 0x30
 8004a1a:	2100      	movs	r1, #0
 8004a1c:	a806      	add	r0, sp, #24
 8004a1e:	f000 fb33 	bl	8005088 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8004a22:	2214      	movs	r2, #20
 8004a24:	2100      	movs	r1, #0
 8004a26:	a801      	add	r0, sp, #4
 8004a28:	f000 fb2e 	bl	8005088 <memset>

  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8004a2c:	2302      	movs	r3, #2
 8004a2e:	9306      	str	r3, [sp, #24]
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8004a30:	2301      	movs	r3, #1
 8004a32:	9309      	str	r3, [sp, #36]	; 0x24
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8004a34:	2310      	movs	r3, #16
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8004a36:	a806      	add	r0, sp, #24
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8004a38:	930a      	str	r3, [sp, #40]	; 0x28
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8004a3a:	f7fc fadf 	bl	8000ffc <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8004a3e:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
 8004a40:	2100      	movs	r1, #0
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8004a42:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8004a44:	f44f 5380 	mov.w	r3, #4096	; 0x1000
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 8004a48:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
 8004a4a:	9102      	str	r1, [sp, #8]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8004a4c:	9103      	str	r1, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8004a4e:	9304      	str	r3, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
 8004a50:	9305      	str	r3, [sp, #20]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 8004a52:	f7fc fc6f 	bl	8001334 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
}
 8004a56:	b013      	add	sp, #76	; 0x4c
 8004a58:	f85d fb04 	ldr.w	pc, [sp], #4

08004a5c <main>:
{
 8004a5c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8004a60:	2400      	movs	r4, #0
{
 8004a62:	b0a4      	sub	sp, #144	; 0x90
  	uint8_t readtemp[100] = {0,};
 8004a64:	f10d 082c 	add.w	r8, sp, #44	; 0x2c
 8004a68:	2264      	movs	r2, #100	; 0x64
 8004a6a:	2100      	movs	r1, #0
 8004a6c:	4640      	mov	r0, r8
 8004a6e:	f000 fb0b 	bl	8005088 <memset>
  HAL_Init();
 8004a72:	f7fb fd43 	bl	80004fc <HAL_Init>
  SystemClock_Config();
 8004a76:	f7ff ffcd 	bl	8004a14 <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8004a7a:	2214      	movs	r2, #20
 8004a7c:	2100      	movs	r1, #0
 8004a7e:	a806      	add	r0, sp, #24
 8004a80:	f000 fb02 	bl	8005088 <memset>
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8004a84:	4ba0      	ldr	r3, [pc, #640]	; (8004d08 <main+0x2ac>)
 8004a86:	9400      	str	r4, [sp, #0]
 8004a88:	6b1a      	ldr	r2, [r3, #48]	; 0x30
  __HAL_RCC_GPIOC_CLK_ENABLE();
  __HAL_RCC_GPIOA_CLK_ENABLE();
  __HAL_RCC_GPIOD_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2, GPIO_PIN_RESET);
 8004a8a:	2107      	movs	r1, #7
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8004a8c:	f042 0220 	orr.w	r2, r2, #32
 8004a90:	631a      	str	r2, [r3, #48]	; 0x30
 8004a92:	6b1a      	ldr	r2, [r3, #48]	; 0x30
  HAL_GPIO_WritePin(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2, GPIO_PIN_RESET);
 8004a94:	489d      	ldr	r0, [pc, #628]	; (8004d0c <main+0x2b0>)
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8004a96:	f002 0220 	and.w	r2, r2, #32
 8004a9a:	9200      	str	r2, [sp, #0]
 8004a9c:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_GPIOH_CLK_ENABLE();
 8004a9e:	9401      	str	r4, [sp, #4]
 8004aa0:	6b1a      	ldr	r2, [r3, #48]	; 0x30
  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_6, GPIO_PIN_RESET);

  /*Configure GPIO pins : PF0 PF1 PF2 */
  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8004aa2:	2701      	movs	r7, #1
  __HAL_RCC_GPIOH_CLK_ENABLE();
 8004aa4:	f042 0280 	orr.w	r2, r2, #128	; 0x80
 8004aa8:	631a      	str	r2, [r3, #48]	; 0x30
 8004aaa:	6b1a      	ldr	r2, [r3, #48]	; 0x30
  huart1.Instance = USART1;
 8004aac:	4d98      	ldr	r5, [pc, #608]	; (8004d10 <main+0x2b4>)
  __HAL_RCC_GPIOH_CLK_ENABLE();
 8004aae:	f002 0280 	and.w	r2, r2, #128	; 0x80
 8004ab2:	9201      	str	r2, [sp, #4]
 8004ab4:	9a01      	ldr	r2, [sp, #4]
  __HAL_RCC_GPIOG_CLK_ENABLE();
 8004ab6:	9402      	str	r4, [sp, #8]
 8004ab8:	6b1a      	ldr	r2, [r3, #48]	; 0x30
  htim6.Instance = TIM6;
 8004aba:	4e96      	ldr	r6, [pc, #600]	; (8004d14 <main+0x2b8>)
  __HAL_RCC_GPIOG_CLK_ENABLE();
 8004abc:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8004ac0:	631a      	str	r2, [r3, #48]	; 0x30
 8004ac2:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8004ac4:	f002 0240 	and.w	r2, r2, #64	; 0x40
 8004ac8:	9202      	str	r2, [sp, #8]
 8004aca:	9a02      	ldr	r2, [sp, #8]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8004acc:	9403      	str	r4, [sp, #12]
 8004ace:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8004ad0:	f042 0204 	orr.w	r2, r2, #4
 8004ad4:	631a      	str	r2, [r3, #48]	; 0x30
 8004ad6:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8004ad8:	f002 0204 	and.w	r2, r2, #4
 8004adc:	9203      	str	r2, [sp, #12]
 8004ade:	9a03      	ldr	r2, [sp, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8004ae0:	9404      	str	r4, [sp, #16]
 8004ae2:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8004ae4:	f042 0201 	orr.w	r2, r2, #1
 8004ae8:	631a      	str	r2, [r3, #48]	; 0x30
 8004aea:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8004aec:	f002 0201 	and.w	r2, r2, #1
 8004af0:	9204      	str	r2, [sp, #16]
 8004af2:	9a04      	ldr	r2, [sp, #16]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8004af4:	9405      	str	r4, [sp, #20]
 8004af6:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8004af8:	f042 0208 	orr.w	r2, r2, #8
 8004afc:	631a      	str	r2, [r3, #48]	; 0x30
 8004afe:	6b1b      	ldr	r3, [r3, #48]	; 0x30
  HAL_GPIO_WritePin(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2, GPIO_PIN_RESET);
 8004b00:	4622      	mov	r2, r4
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8004b02:	f003 0308 	and.w	r3, r3, #8
 8004b06:	9305      	str	r3, [sp, #20]
 8004b08:	9b05      	ldr	r3, [sp, #20]
  HAL_GPIO_WritePin(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2, GPIO_PIN_RESET);
 8004b0a:	f7fb fe8f 	bl	800082c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOG, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5 
 8004b0e:	4622      	mov	r2, r4
 8004b10:	21fc      	movs	r1, #252	; 0xfc
 8004b12:	4881      	ldr	r0, [pc, #516]	; (8004d18 <main+0x2bc>)
 8004b14:	f7fb fe8a 	bl	800082c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_11, GPIO_PIN_RESET);
 8004b18:	4622      	mov	r2, r4
 8004b1a:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8004b1e:	487f      	ldr	r0, [pc, #508]	; (8004d1c <main+0x2c0>)
 8004b20:	f7fb fe84 	bl	800082c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_6, GPIO_PIN_RESET);
 8004b24:	4622      	mov	r2, r4
 8004b26:	2140      	movs	r1, #64	; 0x40
 8004b28:	487d      	ldr	r0, [pc, #500]	; (8004d20 <main+0x2c4>)
 8004b2a:	f7fb fe7f 	bl	800082c <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2;
 8004b2e:	2307      	movs	r3, #7
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8004b30:	a906      	add	r1, sp, #24
 8004b32:	4876      	ldr	r0, [pc, #472]	; (8004d0c <main+0x2b0>)
  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2;
 8004b34:	9306      	str	r3, [sp, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8004b36:	9408      	str	r4, [sp, #32]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8004b38:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8004b3a:	9707      	str	r7, [sp, #28]
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8004b3c:	f7fb fd90 	bl	8000660 <HAL_GPIO_Init>

  /*Configure GPIO pins : PG2 PG3 PG4 PG5 
                           PG6 PG7 */
  GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5 
 8004b40:	23fc      	movs	r3, #252	; 0xfc
                          |GPIO_PIN_6|GPIO_PIN_7;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 8004b42:	a906      	add	r1, sp, #24
 8004b44:	4874      	ldr	r0, [pc, #464]	; (8004d18 <main+0x2bc>)
  GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5 
 8004b46:	9306      	str	r3, [sp, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8004b48:	9408      	str	r4, [sp, #32]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8004b4a:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8004b4c:	9707      	str	r7, [sp, #28]
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 8004b4e:	f7fb fd87 	bl	8000660 <HAL_GPIO_Init>

  /*Configure GPIO pin : PA11 */
  GPIO_InitStruct.Pin = GPIO_PIN_11;
 8004b52:	f44f 6300 	mov.w	r3, #2048	; 0x800
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8004b56:	a906      	add	r1, sp, #24
 8004b58:	4870      	ldr	r0, [pc, #448]	; (8004d1c <main+0x2c0>)
  GPIO_InitStruct.Pin = GPIO_PIN_11;
 8004b5a:	9306      	str	r3, [sp, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8004b5c:	9408      	str	r4, [sp, #32]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8004b5e:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8004b60:	9707      	str	r7, [sp, #28]
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8004b62:	f7fb fd7d 	bl	8000660 <HAL_GPIO_Init>

  /*Configure GPIO pin : PD6 */
  GPIO_InitStruct.Pin = GPIO_PIN_6;
 8004b66:	2340      	movs	r3, #64	; 0x40
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8004b68:	a906      	add	r1, sp, #24
 8004b6a:	486d      	ldr	r0, [pc, #436]	; (8004d20 <main+0x2c4>)
  GPIO_InitStruct.Pin = GPIO_PIN_6;
 8004b6c:	9306      	str	r3, [sp, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8004b6e:	9408      	str	r4, [sp, #32]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8004b70:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8004b72:	9707      	str	r7, [sp, #28]
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8004b74:	f7fb fd74 	bl	8000660 <HAL_GPIO_Init>
  huart1.Init.BaudRate = 115200;
 8004b78:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
 8004b7c:	4a69      	ldr	r2, [pc, #420]	; (8004d24 <main+0x2c8>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8004b7e:	4628      	mov	r0, r5
  huart1.Init.BaudRate = 115200;
 8004b80:	e885 000c 	stmia.w	r5, {r2, r3}
  huart1.Init.Mode = UART_MODE_TX_RX;
 8004b84:	230c      	movs	r3, #12
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8004b86:	60ac      	str	r4, [r5, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8004b88:	60ec      	str	r4, [r5, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 8004b8a:	612c      	str	r4, [r5, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8004b8c:	616b      	str	r3, [r5, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8004b8e:	61ac      	str	r4, [r5, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8004b90:	61ec      	str	r4, [r5, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8004b92:	f7fc ff45 	bl	8001a20 <HAL_UART_Init>
  htim6.Init.Prescaler = 9999;
 8004b96:	f242 730f 	movw	r3, #9999	; 0x270f
 8004b9a:	4963      	ldr	r1, [pc, #396]	; (8004d28 <main+0x2cc>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8004b9c:	4630      	mov	r0, r6
  htim6.Init.Prescaler = 9999;
 8004b9e:	e886 000a 	stmia.w	r6, {r1, r3}
  htim6.Init.Period = 15;
 8004ba2:	230f      	movs	r3, #15
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8004ba4:	9406      	str	r4, [sp, #24]
  htim6.Init.Period = 15;
 8004ba6:	60f3      	str	r3, [r6, #12]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8004ba8:	9407      	str	r4, [sp, #28]
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8004baa:	60b4      	str	r4, [r6, #8]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8004bac:	61b4      	str	r4, [r6, #24]
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8004bae:	f7fc fda9 	bl	8001704 <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8004bb2:	a906      	add	r1, sp, #24
 8004bb4:	4630      	mov	r0, r6
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8004bb6:	9406      	str	r4, [sp, #24]
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 8004bb8:	9407      	str	r4, [sp, #28]
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8004bba:	f7fc fdbd 	bl	8001738 <HAL_TIMEx_MasterConfigSynchronization>
  hi2c3.Init.ClockSpeed = 400000;
 8004bbe:	f8df e1c0 	ldr.w	lr, [pc, #448]	; 8004d80 <main+0x324>
  hi2c3.Instance = I2C3;
 8004bc2:	485a      	ldr	r0, [pc, #360]	; (8004d2c <main+0x2d0>)
  hi2c3.Init.ClockSpeed = 400000;
 8004bc4:	4b5a      	ldr	r3, [pc, #360]	; (8004d30 <main+0x2d4>)
  hi2c3.Init.DutyCycle = I2C_DUTYCYCLE_2;
 8004bc6:	6084      	str	r4, [r0, #8]
  hi2c3.Init.ClockSpeed = 400000;
 8004bc8:	e880 4008 	stmia.w	r0, {r3, lr}
  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 8004bcc:	f44f 4380 	mov.w	r3, #16384	; 0x4000
  hi2c3.Init.OwnAddress1 = 0;
 8004bd0:	60c4      	str	r4, [r0, #12]
  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 8004bd2:	6103      	str	r3, [r0, #16]
  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 8004bd4:	6144      	str	r4, [r0, #20]
  hi2c3.Init.OwnAddress2 = 0;
 8004bd6:	6184      	str	r4, [r0, #24]
  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 8004bd8:	61c4      	str	r4, [r0, #28]
  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 8004bda:	6204      	str	r4, [r0, #32]
  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
 8004bdc:	f7fb fff8 	bl	8000bd0 <HAL_I2C_Init>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 8004be0:	4622      	mov	r2, r4
 8004be2:	4621      	mov	r1, r4
 8004be4:	2025      	movs	r0, #37	; 0x25
 8004be6:	f7fb fcd3 	bl	8000590 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8004bea:	2025      	movs	r0, #37	; 0x25
 8004bec:	f7fb fd04 	bl	80005f8 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
 8004bf0:	4622      	mov	r2, r4
 8004bf2:	4621      	mov	r1, r4
 8004bf4:	2036      	movs	r0, #54	; 0x36
 8004bf6:	f7fb fccb 	bl	8000590 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
 8004bfa:	2036      	movs	r0, #54	; 0x36
 8004bfc:	f7fb fcfc 	bl	80005f8 <HAL_NVIC_EnableIRQ>
    HAL_TIM_Base_Start_IT(&htim6);
 8004c00:	4630      	mov	r0, r6
 8004c02:	f7fc fc65 	bl	80014d0 <HAL_TIM_Base_Start_IT>
    HAL_UART_Receive_IT(&huart1, &rx2_data,1);
 8004c06:	463a      	mov	r2, r7
 8004c08:	494a      	ldr	r1, [pc, #296]	; (8004d34 <main+0x2d8>)
 8004c0a:	4628      	mov	r0, r5
 8004c0c:	f7fc ff92 	bl	8001b34 <HAL_UART_Receive_IT>
    setbuf(stdout, NULL); // \n ?��?��?��, printf �???��?���?? ?��?��?��
 8004c10:	4621      	mov	r1, r4
	memcpy(readtemp,&ATT_A_EN_150M_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));
 8004c12:	4644      	mov	r4, r8
    setbuf(stdout, NULL); // \n ?��?��?��, printf �???��?���?? ?��?��?��
 8004c14:	4b48      	ldr	r3, [pc, #288]	; (8004d38 <main+0x2dc>)
 8004c16:	681b      	ldr	r3, [r3, #0]
 8004c18:	6898      	ldr	r0, [r3, #8]
 8004c1a:	f000 fab9 	bl	8005190 <setbuf>
    printf("****************************************\r\n");
 8004c1e:	4847      	ldr	r0, [pc, #284]	; (8004d3c <main+0x2e0>)
 8004c20:	f000 faae 	bl	8005180 <puts>
    printf("TEST Project\r\n");
 8004c24:	4846      	ldr	r0, [pc, #280]	; (8004d40 <main+0x2e4>)
 8004c26:	f000 faab 	bl	8005180 <puts>
    printf("Build at %s %s\r\n", __DATE__, __TIME__);
 8004c2a:	4a46      	ldr	r2, [pc, #280]	; (8004d44 <main+0x2e8>)
 8004c2c:	4946      	ldr	r1, [pc, #280]	; (8004d48 <main+0x2ec>)
 8004c2e:	4847      	ldr	r0, [pc, #284]	; (8004d4c <main+0x2f0>)
 8004c30:	f000 fa32 	bl	8005098 <iprintf>
    printf("Copyright (c) 2019. BLUECELL\r\n");
 8004c34:	4846      	ldr	r0, [pc, #280]	; (8004d50 <main+0x2f4>)
 8004c36:	f000 faa3 	bl	8005180 <puts>
    printf("****************************************\r\n");
 8004c3a:	4840      	ldr	r0, [pc, #256]	; (8004d3c <main+0x2e0>)
 8004c3c:	f000 faa0 	bl	8005180 <puts>
	EEPROM_IM24CM01P_Init();
 8004c40:	f7ff fd1e 	bl	8004680 <EEPROM_IM24CM01P_Init>
	memcpy(readtemp,&ATT_A_EN_150M_Table.Atten_Table_31_5dB_Value,sizeof(Atten_Table_Value_t));
 8004c44:	4b43      	ldr	r3, [pc, #268]	; (8004d54 <main+0x2f8>)
 8004c46:	f103 0540 	add.w	r5, r3, #64	; 0x40
 8004c4a:	4622      	mov	r2, r4
 8004c4c:	6818      	ldr	r0, [r3, #0]
 8004c4e:	6859      	ldr	r1, [r3, #4]
 8004c50:	3308      	adds	r3, #8
 8004c52:	c203      	stmia	r2!, {r0, r1}
 8004c54:	42ab      	cmp	r3, r5
 8004c56:	4614      	mov	r4, r2
 8004c58:	d1f7      	bne.n	8004c4a <main+0x1ee>
	printf("HAL_I2C_Mem_Read : data : ");
 8004c5a:	483f      	ldr	r0, [pc, #252]	; (8004d58 <main+0x2fc>)
 8004c5c:	f000 fa1c 	bl	8005098 <iprintf>
 8004c60:	2400      	movs	r4, #0
		printf("%02x ",readtemp[i]);
 8004c62:	4d3e      	ldr	r5, [pc, #248]	; (8004d5c <main+0x300>)
 8004c64:	f818 1004 	ldrb.w	r1, [r8, r4]
 8004c68:	4628      	mov	r0, r5
 8004c6a:	3401      	adds	r4, #1
 8004c6c:	f000 fa14 	bl	8005098 <iprintf>
	for(uint8_t i = 0; i < sizeof(Atten_Table_Value_t); i++){
 8004c70:	2c40      	cmp	r4, #64	; 0x40
 8004c72:	d1f7      	bne.n	8004c64 <main+0x208>
	printf("\r\n");
 8004c74:	483a      	ldr	r0, [pc, #232]	; (8004d60 <main+0x304>)
 8004c76:	f000 fa83 	bl	8005180 <puts>
    uint8_t uartindex = 0;
 8004c7a:	2200      	movs	r2, #0
            buf[uartindex++] = ring_buf[count_out];
 8004c7c:	4c39      	ldr	r4, [pc, #228]	; (8004d64 <main+0x308>)
    	if(count_in != count_out){
 8004c7e:	4d3a      	ldr	r5, [pc, #232]	; (8004d68 <main+0x30c>)
            crccheck = STH30_CheckCrc(&buf[Bluecell_Type],buf[Bluecell_Length]+2,buf[3 + buf[Bluecell_Length]]);
 8004c80:	1c66      	adds	r6, r4, #1
    	if(count_in != count_out){
 8004c82:	493a      	ldr	r1, [pc, #232]	; (8004d6c <main+0x310>)
 8004c84:	782b      	ldrb	r3, [r5, #0]
 8004c86:	7809      	ldrb	r1, [r1, #0]
 8004c88:	4839      	ldr	r0, [pc, #228]	; (8004d70 <main+0x314>)
 8004c8a:	4299      	cmp	r1, r3
 8004c8c:	d013      	beq.n	8004cb6 <main+0x25a>
            UartDataisReved = 1;
 8004c8e:	2101      	movs	r1, #1
            UartTimerCnt = 0;
 8004c90:	2700      	movs	r7, #0
            UartDataisReved = 1;
 8004c92:	7001      	strb	r1, [r0, #0]
            buf[uartindex++] = ring_buf[count_out];
 8004c94:	f8df e0ec 	ldr.w	lr, [pc, #236]	; 8004d84 <main+0x328>
            UartTimerCnt = 0;
 8004c98:	4936      	ldr	r1, [pc, #216]	; (8004d74 <main+0x318>)
            buf[uartindex++] = ring_buf[count_out];
 8004c9a:	f81e e003 	ldrb.w	lr, [lr, r3]
            UartTimerCnt = 0;
 8004c9e:	600f      	str	r7, [r1, #0]
            buf[uartindex++] = ring_buf[count_out];
 8004ca0:	1c51      	adds	r1, r2, #1
 8004ca2:	b2c9      	uxtb	r1, r1
 8004ca4:	f804 e002 	strb.w	lr, [r4, r2]
 8004ca8:	460a      	mov	r2, r1
            if(++count_out >= buf_size) count_out=0;
 8004caa:	3301      	adds	r3, #1
 8004cac:	b2db      	uxtb	r3, r3
 8004cae:	2b3f      	cmp	r3, #63	; 0x3f
 8004cb0:	bf94      	ite	ls
 8004cb2:	702b      	strbls	r3, [r5, #0]
 8004cb4:	702f      	strbhi	r7, [r5, #0]
    	if(UartDataisReved == 1 && UartTimerCnt > 10){
 8004cb6:	7803      	ldrb	r3, [r0, #0]
 8004cb8:	2b01      	cmp	r3, #1
 8004cba:	d1e2      	bne.n	8004c82 <main+0x226>
 8004cbc:	4b2d      	ldr	r3, [pc, #180]	; (8004d74 <main+0x318>)
 8004cbe:	681b      	ldr	r3, [r3, #0]
 8004cc0:	2b0a      	cmp	r3, #10
 8004cc2:	d9de      	bls.n	8004c82 <main+0x226>
    		UartDataisReved =0;
 8004cc4:	2300      	movs	r3, #0
            crccheck = STH30_CheckCrc(&buf[Bluecell_Type],buf[Bluecell_Length]+2,buf[3 + buf[Bluecell_Length]]);
 8004cc6:	78a1      	ldrb	r1, [r4, #2]
    		UartDataisReved =0;
 8004cc8:	7003      	strb	r3, [r0, #0]
            crccheck = STH30_CheckCrc(&buf[Bluecell_Type],buf[Bluecell_Length]+2,buf[3 + buf[Bluecell_Length]]);
 8004cca:	1863      	adds	r3, r4, r1
 8004ccc:	3102      	adds	r1, #2
 8004cce:	78da      	ldrb	r2, [r3, #3]
 8004cd0:	b2c9      	uxtb	r1, r1
 8004cd2:	4630      	mov	r0, r6
 8004cd4:	f000 f873 	bl	8004dbe <STH30_CheckCrc>
            if(crccheck == CHECKSUM_ERROR){
 8004cd8:	b960      	cbnz	r0, 8004cf4 <main+0x298>
                printf("CHECKSUM_ERROR  RecvCRC : %02x  , index %d\r\n",buf[3 + buf[Bluecell_Length]],3 + buf[Bluecell_Length]);
 8004cda:	78a2      	ldrb	r2, [r4, #2]
 8004cdc:	4826      	ldr	r0, [pc, #152]	; (8004d78 <main+0x31c>)
 8004cde:	3203      	adds	r2, #3
 8004ce0:	5ca1      	ldrb	r1, [r4, r2]
 8004ce2:	f000 f9d9 	bl	8005098 <iprintf>
            memset(buf,0x00,buf_size);
 8004ce6:	2240      	movs	r2, #64	; 0x40
 8004ce8:	2100      	movs	r1, #0
 8004cea:	4620      	mov	r0, r4
 8004cec:	f000 f9cc 	bl	8005088 <memset>
            uartindex = 0;
 8004cf0:	2200      	movs	r2, #0
 8004cf2:	e7c6      	b.n	8004c82 <main+0x226>
            else if(crccheck == NO_ERROR){
 8004cf4:	2801      	cmp	r0, #1
 8004cf6:	d103      	bne.n	8004d00 <main+0x2a4>
                Atten_Operate_Mem_RW(&buf[Bluecell_STX]);
 8004cf8:	4620      	mov	r0, r4
 8004cfa:	f7fe fadd 	bl	80032b8 <Atten_Operate_Mem_RW>
 8004cfe:	e7f2      	b.n	8004ce6 <main+0x28a>
                 printf("What Happen?\r\n");
 8004d00:	481e      	ldr	r0, [pc, #120]	; (8004d7c <main+0x320>)
 8004d02:	f000 fa3d 	bl	8005180 <puts>
 8004d06:	e7ee      	b.n	8004ce6 <main+0x28a>
 8004d08:	40023800 	.word	0x40023800
 8004d0c:	40021400 	.word	0x40021400
 8004d10:	20000bf0 	.word	0x20000bf0
 8004d14:	20000c70 	.word	0x20000c70
 8004d18:	40021800 	.word	0x40021800
 8004d1c:	40020000 	.word	0x40020000
 8004d20:	40020c00 	.word	0x40020c00
 8004d24:	40011000 	.word	0x40011000
 8004d28:	40001000 	.word	0x40001000
 8004d2c:	20000b94 	.word	0x20000b94
 8004d30:	40005c00 	.word	0x40005c00
 8004d34:	20000be9 	.word	0x20000be9
 8004d38:	20000004 	.word	0x20000004
 8004d3c:	080061c0 	.word	0x080061c0
 8004d40:	080061ea 	.word	0x080061ea
 8004d44:	080061f8 	.word	0x080061f8
 8004d48:	08006201 	.word	0x08006201
 8004d4c:	0800620d 	.word	0x0800620d
 8004d50:	0800621e 	.word	0x0800621e
 8004d54:	20000791 	.word	0x20000791
 8004d58:	0800623c 	.word	0x0800623c
 8004d5c:	08006257 	.word	0x08006257
 8004d60:	080061e8 	.word	0x080061e8
 8004d64:	20000090 	.word	0x20000090
 8004d68:	20000beb 	.word	0x20000beb
 8004d6c:	20000bec 	.word	0x20000bec
 8004d70:	20000be8 	.word	0x20000be8
 8004d74:	2000008c 	.word	0x2000008c
 8004d78:	0800625d 	.word	0x0800625d
 8004d7c:	0800628a 	.word	0x0800628a
 8004d80:	00061a80 	.word	0x00061a80
 8004d84:	20000c30 	.word	0x20000c30

08004d88 <STH30_CreateCrc>:
	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 8004d88:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8004d8a:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8004d8c:	4604      	mov	r4, r0
 8004d8e:	1a22      	subs	r2, r4, r0
 8004d90:	b2d2      	uxtb	r2, r2
 8004d92:	4291      	cmp	r1, r2
 8004d94:	d801      	bhi.n	8004d9a <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 8004d96:	4618      	mov	r0, r3
 8004d98:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 8004d9a:	f814 2b01 	ldrb.w	r2, [r4], #1
 8004d9e:	4053      	eors	r3, r2
 8004da0:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8004da2:	f013 0f80 	tst.w	r3, #128	; 0x80
 8004da6:	f102 32ff 	add.w	r2, r2, #4294967295
 8004daa:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8004dae:	bf18      	it	ne
 8004db0:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8004db4:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 8004db8:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8004dba:	d1f2      	bne.n	8004da2 <STH30_CreateCrc+0x1a>
 8004dbc:	e7e7      	b.n	8004d8e <STH30_CreateCrc+0x6>

08004dbe <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 8004dbe:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8004dc0:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8004dc2:	4605      	mov	r5, r0
 8004dc4:	1a2c      	subs	r4, r5, r0
 8004dc6:	b2e4      	uxtb	r4, r4
 8004dc8:	42a1      	cmp	r1, r4
 8004dca:	d803      	bhi.n	8004dd4 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8004dcc:	1a9b      	subs	r3, r3, r2
 8004dce:	4258      	negs	r0, r3
 8004dd0:	4158      	adcs	r0, r3
 8004dd2:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 8004dd4:	f815 4b01 	ldrb.w	r4, [r5], #1
 8004dd8:	4063      	eors	r3, r4
 8004dda:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8004ddc:	f013 0f80 	tst.w	r3, #128	; 0x80
 8004de0:	f104 34ff 	add.w	r4, r4, #4294967295
 8004de4:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8004de8:	bf18      	it	ne
 8004dea:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8004dee:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8004df2:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8004df4:	d1f2      	bne.n	8004ddc <STH30_CheckCrc+0x1e>
 8004df6:	e7e5      	b.n	8004dc4 <STH30_CheckCrc+0x6>

08004df8 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8004df8:	2100      	movs	r1, #0
{
 8004dfa:	b082      	sub	sp, #8
  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8004dfc:	4b0b      	ldr	r3, [pc, #44]	; (8004e2c <HAL_MspInit+0x34>)
 8004dfe:	9100      	str	r1, [sp, #0]
 8004e00:	6c5a      	ldr	r2, [r3, #68]	; 0x44
 8004e02:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8004e06:	645a      	str	r2, [r3, #68]	; 0x44
 8004e08:	6c5a      	ldr	r2, [r3, #68]	; 0x44
 8004e0a:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 8004e0e:	9200      	str	r2, [sp, #0]
 8004e10:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8004e12:	9101      	str	r1, [sp, #4]
 8004e14:	6c1a      	ldr	r2, [r3, #64]	; 0x40
 8004e16:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8004e1a:	641a      	str	r2, [r3, #64]	; 0x40
 8004e1c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8004e1e:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8004e22:	9301      	str	r3, [sp, #4]
 8004e24:	9b01      	ldr	r3, [sp, #4]
  /* System interrupt init*/

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8004e26:	b002      	add	sp, #8
 8004e28:	4770      	bx	lr
 8004e2a:	bf00      	nop
 8004e2c:	40023800 	.word	0x40023800

08004e30 <HAL_I2C_MspInit>:
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
 8004e30:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 8004e34:	4604      	mov	r4, r0
 8004e36:	b089      	sub	sp, #36	; 0x24

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8004e38:	2214      	movs	r2, #20
 8004e3a:	2100      	movs	r1, #0
 8004e3c:	a803      	add	r0, sp, #12
 8004e3e:	f000 f923 	bl	8005088 <memset>
  if(hi2c->Instance==I2C3)
 8004e42:	6822      	ldr	r2, [r4, #0]
 8004e44:	4b22      	ldr	r3, [pc, #136]	; (8004ed0 <HAL_I2C_MspInit+0xa0>)
 8004e46:	429a      	cmp	r2, r3
 8004e48:	d13f      	bne.n	8004eca <HAL_I2C_MspInit+0x9a>
  {
  /* USER CODE BEGIN I2C3_MspInit 0 */

  /* USER CODE END I2C3_MspInit 0 */
  
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8004e4a:	2500      	movs	r5, #0
 8004e4c:	4c21      	ldr	r4, [pc, #132]	; (8004ed4 <HAL_I2C_MspInit+0xa4>)
 8004e4e:	9500      	str	r5, [sp, #0]
 8004e50:	6b23      	ldr	r3, [r4, #48]	; 0x30
    /**I2C3 GPIO Configuration    
    PC9     ------> I2C3_SDA
    PA8     ------> I2C3_SCL 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
 8004e52:	f04f 0912 	mov.w	r9, #18
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8004e56:	f043 0304 	orr.w	r3, r3, #4
 8004e5a:	6323      	str	r3, [r4, #48]	; 0x30
 8004e5c:	6b23      	ldr	r3, [r4, #48]	; 0x30
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8004e5e:	f04f 0801 	mov.w	r8, #1
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8004e62:	f003 0304 	and.w	r3, r3, #4
 8004e66:	9300      	str	r3, [sp, #0]
 8004e68:	9b00      	ldr	r3, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8004e6a:	9501      	str	r5, [sp, #4]
 8004e6c:	6b23      	ldr	r3, [r4, #48]	; 0x30
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8004e6e:	2703      	movs	r7, #3
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8004e70:	f043 0301 	orr.w	r3, r3, #1
 8004e74:	6323      	str	r3, [r4, #48]	; 0x30
 8004e76:	6b23      	ldr	r3, [r4, #48]	; 0x30
    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
 8004e78:	2604      	movs	r6, #4
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8004e7a:	f003 0301 	and.w	r3, r3, #1
 8004e7e:	9301      	str	r3, [sp, #4]
 8004e80:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8004e82:	f44f 7300 	mov.w	r3, #512	; 0x200
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8004e86:	a903      	add	r1, sp, #12
 8004e88:	4813      	ldr	r0, [pc, #76]	; (8004ed8 <HAL_I2C_MspInit+0xa8>)
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8004e8a:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
 8004e8c:	f8cd 9010 	str.w	r9, [sp, #16]
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8004e90:	f8cd 8014 	str.w	r8, [sp, #20]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8004e94:	9706      	str	r7, [sp, #24]
    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
 8004e96:	9607      	str	r6, [sp, #28]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8004e98:	f7fb fbe2 	bl	8000660 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_8;
 8004e9c:	f44f 7380 	mov.w	r3, #256	; 0x100
    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
    GPIO_InitStruct.Pull = GPIO_PULLUP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8004ea0:	a903      	add	r1, sp, #12
 8004ea2:	480e      	ldr	r0, [pc, #56]	; (8004edc <HAL_I2C_MspInit+0xac>)
    GPIO_InitStruct.Pin = GPIO_PIN_8;
 8004ea4:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
 8004ea6:	f8cd 9010 	str.w	r9, [sp, #16]
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8004eaa:	f8cd 8014 	str.w	r8, [sp, #20]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8004eae:	9706      	str	r7, [sp, #24]
    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
 8004eb0:	9607      	str	r6, [sp, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8004eb2:	f7fb fbd5 	bl	8000660 <HAL_GPIO_Init>

    /* Peripheral clock enable */
    __HAL_RCC_I2C3_CLK_ENABLE();
 8004eb6:	9502      	str	r5, [sp, #8]
 8004eb8:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8004eba:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
 8004ebe:	6423      	str	r3, [r4, #64]	; 0x40
 8004ec0:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8004ec2:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
 8004ec6:	9302      	str	r3, [sp, #8]
 8004ec8:	9b02      	ldr	r3, [sp, #8]
  /* USER CODE BEGIN I2C3_MspInit 1 */

  /* USER CODE END I2C3_MspInit 1 */
  }

}
 8004eca:	b009      	add	sp, #36	; 0x24
 8004ecc:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8004ed0:	40005c00 	.word	0x40005c00
 8004ed4:	40023800 	.word	0x40023800
 8004ed8:	40020800 	.word	0x40020800
 8004edc:	40020000 	.word	0x40020000

08004ee0 <HAL_TIM_Base_MspInit>:
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{

  if(htim_base->Instance==TIM6)
 8004ee0:	6802      	ldr	r2, [r0, #0]
 8004ee2:	4b09      	ldr	r3, [pc, #36]	; (8004f08 <HAL_TIM_Base_MspInit+0x28>)
{
 8004ee4:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 8004ee6:	429a      	cmp	r2, r3
 8004ee8:	d10b      	bne.n	8004f02 <HAL_TIM_Base_MspInit+0x22>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 8004eea:	2300      	movs	r3, #0
 8004eec:	9301      	str	r3, [sp, #4]
 8004eee:	4b07      	ldr	r3, [pc, #28]	; (8004f0c <HAL_TIM_Base_MspInit+0x2c>)
 8004ef0:	6c1a      	ldr	r2, [r3, #64]	; 0x40
 8004ef2:	f042 0210 	orr.w	r2, r2, #16
 8004ef6:	641a      	str	r2, [r3, #64]	; 0x40
 8004ef8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8004efa:	f003 0310 	and.w	r3, r3, #16
 8004efe:	9301      	str	r3, [sp, #4]
 8004f00:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 8004f02:	b002      	add	sp, #8
 8004f04:	4770      	bx	lr
 8004f06:	bf00      	nop
 8004f08:	40001000 	.word	0x40001000
 8004f0c:	40023800 	.word	0x40023800

08004f10 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8004f10:	b510      	push	{r4, lr}
 8004f12:	4604      	mov	r4, r0
 8004f14:	b088      	sub	sp, #32

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8004f16:	2214      	movs	r2, #20
 8004f18:	2100      	movs	r1, #0
 8004f1a:	a803      	add	r0, sp, #12
 8004f1c:	f000 f8b4 	bl	8005088 <memset>
  if(huart->Instance==USART1)
 8004f20:	6822      	ldr	r2, [r4, #0]
 8004f22:	4b15      	ldr	r3, [pc, #84]	; (8004f78 <HAL_UART_MspInit+0x68>)
 8004f24:	429a      	cmp	r2, r3
 8004f26:	d125      	bne.n	8004f74 <HAL_UART_MspInit+0x64>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 8004f28:	2100      	movs	r1, #0
 8004f2a:	f503 3394 	add.w	r3, r3, #75776	; 0x12800
 8004f2e:	9101      	str	r1, [sp, #4]
 8004f30:	6c5a      	ldr	r2, [r3, #68]	; 0x44
    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_PULLUP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8004f32:	4812      	ldr	r0, [pc, #72]	; (8004f7c <HAL_UART_MspInit+0x6c>)
    __HAL_RCC_USART1_CLK_ENABLE();
 8004f34:	f042 0210 	orr.w	r2, r2, #16
 8004f38:	645a      	str	r2, [r3, #68]	; 0x44
 8004f3a:	6c5a      	ldr	r2, [r3, #68]	; 0x44
 8004f3c:	f002 0210 	and.w	r2, r2, #16
 8004f40:	9201      	str	r2, [sp, #4]
 8004f42:	9a01      	ldr	r2, [sp, #4]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8004f44:	9102      	str	r1, [sp, #8]
 8004f46:	6b1a      	ldr	r2, [r3, #48]	; 0x30
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8004f48:	a903      	add	r1, sp, #12
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8004f4a:	f042 0201 	orr.w	r2, r2, #1
 8004f4e:	631a      	str	r2, [r3, #48]	; 0x30
 8004f50:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8004f52:	f003 0301 	and.w	r3, r3, #1
 8004f56:	9302      	str	r3, [sp, #8]
 8004f58:	9b02      	ldr	r3, [sp, #8]
    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
 8004f5a:	f44f 63c0 	mov.w	r3, #1536	; 0x600
 8004f5e:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8004f60:	2302      	movs	r3, #2
 8004f62:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8004f64:	2301      	movs	r3, #1
 8004f66:	9305      	str	r3, [sp, #20]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8004f68:	2303      	movs	r3, #3
 8004f6a:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
 8004f6c:	2307      	movs	r3, #7
 8004f6e:	9307      	str	r3, [sp, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8004f70:	f7fb fb76 	bl	8000660 <HAL_GPIO_Init>
  /* USER CODE BEGIN USART1_MspInit 1 */

  /* USER CODE END USART1_MspInit 1 */
  }

}
 8004f74:	b008      	add	sp, #32
 8004f76:	bd10      	pop	{r4, pc}
 8004f78:	40011000 	.word	0x40011000
 8004f7c:	40020000 	.word	0x40020000

08004f80 <NMI_Handler>:
 8004f80:	4770      	bx	lr

08004f82 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8004f82:	e7fe      	b.n	8004f82 <HardFault_Handler>

08004f84 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8004f84:	e7fe      	b.n	8004f84 <MemManage_Handler>

08004f86 <BusFault_Handler>:

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8004f86:	e7fe      	b.n	8004f86 <BusFault_Handler>

08004f88 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8004f88:	e7fe      	b.n	8004f88 <UsageFault_Handler>

08004f8a <SVC_Handler>:
 8004f8a:	4770      	bx	lr

08004f8c <DebugMon_Handler>:
 8004f8c:	4770      	bx	lr

08004f8e <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 8004f8e:	4770      	bx	lr

08004f90 <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 8004f90:	f7fb bace 	b.w	8000530 <HAL_IncTick>

08004f94 <USART1_IRQHandler>:
  /* USER CODE BEGIN USART1_IRQn 0 */
//  ring_buf[count_in] = rx2_data;//(uint8_t)USART2->DR;
//  if(++count_in>=buf_size) count_in=0;

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8004f94:	4801      	ldr	r0, [pc, #4]	; (8004f9c <USART1_IRQHandler+0x8>)
 8004f96:	f7fc be2d 	b.w	8001bf4 <HAL_UART_IRQHandler>
 8004f9a:	bf00      	nop
 8004f9c:	20000bf0 	.word	0x20000bf0

08004fa0 <TIM6_DAC_IRQHandler>:
void TIM6_DAC_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */

  /* USER CODE END TIM6_DAC_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8004fa0:	4801      	ldr	r0, [pc, #4]	; (8004fa8 <TIM6_DAC_IRQHandler+0x8>)
 8004fa2:	f7fc baa4 	b.w	80014ee <HAL_TIM_IRQHandler>
 8004fa6:	bf00      	nop
 8004fa8:	20000c70 	.word	0x20000c70

08004fac <SystemInit>:
  /* Reset the RCC clock configuration to the default reset state ------------*/
  /* Set HSION bit */
  RCC->CR |= (uint32_t)0x00000001;

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;
 8004fac:	2100      	movs	r1, #0
  RCC->CR |= (uint32_t)0x00000001;
 8004fae:	4b0c      	ldr	r3, [pc, #48]	; (8004fe0 <SystemInit+0x34>)
 8004fb0:	681a      	ldr	r2, [r3, #0]
 8004fb2:	f042 0201 	orr.w	r2, r2, #1
 8004fb6:	601a      	str	r2, [r3, #0]
  RCC->CFGR = 0x00000000;
 8004fb8:	6099      	str	r1, [r3, #8]

  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= (uint32_t)0xFEF6FFFF;
 8004fba:	681a      	ldr	r2, [r3, #0]
 8004fbc:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8004fc0:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8004fc4:	601a      	str	r2, [r3, #0]

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x24003010;
 8004fc6:	4a07      	ldr	r2, [pc, #28]	; (8004fe4 <SystemInit+0x38>)
 8004fc8:	605a      	str	r2, [r3, #4]

  /* Reset HSEBYP bit */
  RCC->CR &= (uint32_t)0xFFFBFFFF;
 8004fca:	681a      	ldr	r2, [r3, #0]
 8004fcc:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8004fd0:	601a      	str	r2, [r3, #0]

  /* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
 8004fd2:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
  RCC->CIR = 0x00000000;
 8004fd6:	60d9      	str	r1, [r3, #12]
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
 8004fd8:	4b03      	ldr	r3, [pc, #12]	; (8004fe8 <SystemInit+0x3c>)
 8004fda:	609a      	str	r2, [r3, #8]
 8004fdc:	4770      	bx	lr
 8004fde:	bf00      	nop
 8004fe0:	40023800 	.word	0x40023800
 8004fe4:	24003010 	.word	0x24003010
 8004fe8:	e000ed00 	.word	0xe000ed00

08004fec <Reset_Handler>:

    .section  .text.Reset_Handler
  .weak  Reset_Handler
  .type  Reset_Handler, %function
Reset_Handler:  
  ldr   sp, =_estack     /* set stack pointer */
 8004fec:	f8df d034 	ldr.w	sp, [pc, #52]	; 8005024 <LoopFillZerobss+0x14>

/* Copy the data segment initializers from flash to SRAM */
  movs  r1, #0
 8004ff0:	2100      	movs	r1, #0
  b  LoopCopyDataInit
 8004ff2:	e003      	b.n	8004ffc <LoopCopyDataInit>

08004ff4 <CopyDataInit>:

CopyDataInit:
  ldr  r3, =_sidata
 8004ff4:	4b0c      	ldr	r3, [pc, #48]	; (8005028 <LoopFillZerobss+0x18>)
  ldr  r3, [r3, r1]
 8004ff6:	585b      	ldr	r3, [r3, r1]
  str  r3, [r0, r1]
 8004ff8:	5043      	str	r3, [r0, r1]
  adds  r1, r1, #4
 8004ffa:	3104      	adds	r1, #4

08004ffc <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr  r0, =_sdata
 8004ffc:	480b      	ldr	r0, [pc, #44]	; (800502c <LoopFillZerobss+0x1c>)
  ldr  r3, =_edata
 8004ffe:	4b0c      	ldr	r3, [pc, #48]	; (8005030 <LoopFillZerobss+0x20>)
  adds  r2, r0, r1
 8005000:	1842      	adds	r2, r0, r1
  cmp  r2, r3
 8005002:	429a      	cmp	r2, r3
  bcc  CopyDataInit
 8005004:	d3f6      	bcc.n	8004ff4 <CopyDataInit>
  ldr  r2, =_sbss
 8005006:	4a0b      	ldr	r2, [pc, #44]	; (8005034 <LoopFillZerobss+0x24>)
  b  LoopFillZerobss
 8005008:	e002      	b.n	8005010 <LoopFillZerobss>

0800500a <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs  r3, #0
 800500a:	2300      	movs	r3, #0
  str  r3, [r2], #4
 800500c:	f842 3b04 	str.w	r3, [r2], #4

08005010 <LoopFillZerobss>:

LoopFillZerobss:
  ldr  r3, = _ebss
 8005010:	4b09      	ldr	r3, [pc, #36]	; (8005038 <LoopFillZerobss+0x28>)
  cmp  r2, r3
 8005012:	429a      	cmp	r2, r3
  bcc  FillZerobss
 8005014:	d3f9      	bcc.n	800500a <FillZerobss>

/* Call the clock system initialization function.*/
  bl  SystemInit
 8005016:	f7ff ffc9 	bl	8004fac <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 800501a:	f000 f811 	bl	8005040 <__libc_init_array>
/* Call the application's entry point.*/
  bl  main
 800501e:	f7ff fd1d 	bl	8004a5c <main>
  bx  lr
 8005022:	4770      	bx	lr
  ldr   sp, =_estack     /* set stack pointer */
 8005024:	20020000 	.word	0x20020000
  ldr  r3, =_sidata
 8005028:	08006358 	.word	0x08006358
  ldr  r0, =_sdata
 800502c:	20000000 	.word	0x20000000
  ldr  r3, =_edata
 8005030:	20000068 	.word	0x20000068
  ldr  r2, =_sbss
 8005034:	20000068 	.word	0x20000068
  ldr  r3, = _ebss
 8005038:	20000cb8 	.word	0x20000cb8

0800503c <ADC_IRQHandler>:
 * @retval None       
*/
    .section  .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b  Infinite_Loop
 800503c:	e7fe      	b.n	800503c <ADC_IRQHandler>
	...

08005040 <__libc_init_array>:
 8005040:	b570      	push	{r4, r5, r6, lr}
 8005042:	2500      	movs	r5, #0
 8005044:	4e0c      	ldr	r6, [pc, #48]	; (8005078 <__libc_init_array+0x38>)
 8005046:	4c0d      	ldr	r4, [pc, #52]	; (800507c <__libc_init_array+0x3c>)
 8005048:	1ba4      	subs	r4, r4, r6
 800504a:	10a4      	asrs	r4, r4, #2
 800504c:	42a5      	cmp	r5, r4
 800504e:	d109      	bne.n	8005064 <__libc_init_array+0x24>
 8005050:	f001 f87e 	bl	8006150 <_init>
 8005054:	2500      	movs	r5, #0
 8005056:	4e0a      	ldr	r6, [pc, #40]	; (8005080 <__libc_init_array+0x40>)
 8005058:	4c0a      	ldr	r4, [pc, #40]	; (8005084 <__libc_init_array+0x44>)
 800505a:	1ba4      	subs	r4, r4, r6
 800505c:	10a4      	asrs	r4, r4, #2
 800505e:	42a5      	cmp	r5, r4
 8005060:	d105      	bne.n	800506e <__libc_init_array+0x2e>
 8005062:	bd70      	pop	{r4, r5, r6, pc}
 8005064:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8005068:	4798      	blx	r3
 800506a:	3501      	adds	r5, #1
 800506c:	e7ee      	b.n	800504c <__libc_init_array+0xc>
 800506e:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8005072:	4798      	blx	r3
 8005074:	3501      	adds	r5, #1
 8005076:	e7f2      	b.n	800505e <__libc_init_array+0x1e>
 8005078:	08006350 	.word	0x08006350
 800507c:	08006350 	.word	0x08006350
 8005080:	08006350 	.word	0x08006350
 8005084:	08006354 	.word	0x08006354

08005088 <memset>:
 8005088:	4603      	mov	r3, r0
 800508a:	4402      	add	r2, r0
 800508c:	4293      	cmp	r3, r2
 800508e:	d100      	bne.n	8005092 <memset+0xa>
 8005090:	4770      	bx	lr
 8005092:	f803 1b01 	strb.w	r1, [r3], #1
 8005096:	e7f9      	b.n	800508c <memset+0x4>

08005098 <iprintf>:
 8005098:	b40f      	push	{r0, r1, r2, r3}
 800509a:	4b0a      	ldr	r3, [pc, #40]	; (80050c4 <iprintf+0x2c>)
 800509c:	b513      	push	{r0, r1, r4, lr}
 800509e:	681c      	ldr	r4, [r3, #0]
 80050a0:	b124      	cbz	r4, 80050ac <iprintf+0x14>
 80050a2:	69a3      	ldr	r3, [r4, #24]
 80050a4:	b913      	cbnz	r3, 80050ac <iprintf+0x14>
 80050a6:	4620      	mov	r0, r4
 80050a8:	f000 fada 	bl	8005660 <__sinit>
 80050ac:	ab05      	add	r3, sp, #20
 80050ae:	9a04      	ldr	r2, [sp, #16]
 80050b0:	68a1      	ldr	r1, [r4, #8]
 80050b2:	4620      	mov	r0, r4
 80050b4:	9301      	str	r3, [sp, #4]
 80050b6:	f000 fc9b 	bl	80059f0 <_vfiprintf_r>
 80050ba:	b002      	add	sp, #8
 80050bc:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 80050c0:	b004      	add	sp, #16
 80050c2:	4770      	bx	lr
 80050c4:	20000004 	.word	0x20000004

080050c8 <_puts_r>:
 80050c8:	b570      	push	{r4, r5, r6, lr}
 80050ca:	460e      	mov	r6, r1
 80050cc:	4605      	mov	r5, r0
 80050ce:	b118      	cbz	r0, 80050d8 <_puts_r+0x10>
 80050d0:	6983      	ldr	r3, [r0, #24]
 80050d2:	b90b      	cbnz	r3, 80050d8 <_puts_r+0x10>
 80050d4:	f000 fac4 	bl	8005660 <__sinit>
 80050d8:	69ab      	ldr	r3, [r5, #24]
 80050da:	68ac      	ldr	r4, [r5, #8]
 80050dc:	b913      	cbnz	r3, 80050e4 <_puts_r+0x1c>
 80050de:	4628      	mov	r0, r5
 80050e0:	f000 fabe 	bl	8005660 <__sinit>
 80050e4:	4b23      	ldr	r3, [pc, #140]	; (8005174 <_puts_r+0xac>)
 80050e6:	429c      	cmp	r4, r3
 80050e8:	d117      	bne.n	800511a <_puts_r+0x52>
 80050ea:	686c      	ldr	r4, [r5, #4]
 80050ec:	89a3      	ldrh	r3, [r4, #12]
 80050ee:	071b      	lsls	r3, r3, #28
 80050f0:	d51d      	bpl.n	800512e <_puts_r+0x66>
 80050f2:	6923      	ldr	r3, [r4, #16]
 80050f4:	b1db      	cbz	r3, 800512e <_puts_r+0x66>
 80050f6:	3e01      	subs	r6, #1
 80050f8:	68a3      	ldr	r3, [r4, #8]
 80050fa:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 80050fe:	3b01      	subs	r3, #1
 8005100:	60a3      	str	r3, [r4, #8]
 8005102:	b9e9      	cbnz	r1, 8005140 <_puts_r+0x78>
 8005104:	2b00      	cmp	r3, #0
 8005106:	da2e      	bge.n	8005166 <_puts_r+0x9e>
 8005108:	4622      	mov	r2, r4
 800510a:	210a      	movs	r1, #10
 800510c:	4628      	mov	r0, r5
 800510e:	f000 f8f5 	bl	80052fc <__swbuf_r>
 8005112:	3001      	adds	r0, #1
 8005114:	d011      	beq.n	800513a <_puts_r+0x72>
 8005116:	200a      	movs	r0, #10
 8005118:	bd70      	pop	{r4, r5, r6, pc}
 800511a:	4b17      	ldr	r3, [pc, #92]	; (8005178 <_puts_r+0xb0>)
 800511c:	429c      	cmp	r4, r3
 800511e:	d101      	bne.n	8005124 <_puts_r+0x5c>
 8005120:	68ac      	ldr	r4, [r5, #8]
 8005122:	e7e3      	b.n	80050ec <_puts_r+0x24>
 8005124:	4b15      	ldr	r3, [pc, #84]	; (800517c <_puts_r+0xb4>)
 8005126:	429c      	cmp	r4, r3
 8005128:	bf08      	it	eq
 800512a:	68ec      	ldreq	r4, [r5, #12]
 800512c:	e7de      	b.n	80050ec <_puts_r+0x24>
 800512e:	4621      	mov	r1, r4
 8005130:	4628      	mov	r0, r5
 8005132:	f000 f935 	bl	80053a0 <__swsetup_r>
 8005136:	2800      	cmp	r0, #0
 8005138:	d0dd      	beq.n	80050f6 <_puts_r+0x2e>
 800513a:	f04f 30ff 	mov.w	r0, #4294967295
 800513e:	bd70      	pop	{r4, r5, r6, pc}
 8005140:	2b00      	cmp	r3, #0
 8005142:	da04      	bge.n	800514e <_puts_r+0x86>
 8005144:	69a2      	ldr	r2, [r4, #24]
 8005146:	4293      	cmp	r3, r2
 8005148:	db06      	blt.n	8005158 <_puts_r+0x90>
 800514a:	290a      	cmp	r1, #10
 800514c:	d004      	beq.n	8005158 <_puts_r+0x90>
 800514e:	6823      	ldr	r3, [r4, #0]
 8005150:	1c5a      	adds	r2, r3, #1
 8005152:	6022      	str	r2, [r4, #0]
 8005154:	7019      	strb	r1, [r3, #0]
 8005156:	e7cf      	b.n	80050f8 <_puts_r+0x30>
 8005158:	4622      	mov	r2, r4
 800515a:	4628      	mov	r0, r5
 800515c:	f000 f8ce 	bl	80052fc <__swbuf_r>
 8005160:	3001      	adds	r0, #1
 8005162:	d1c9      	bne.n	80050f8 <_puts_r+0x30>
 8005164:	e7e9      	b.n	800513a <_puts_r+0x72>
 8005166:	200a      	movs	r0, #10
 8005168:	6823      	ldr	r3, [r4, #0]
 800516a:	1c5a      	adds	r2, r3, #1
 800516c:	6022      	str	r2, [r4, #0]
 800516e:	7018      	strb	r0, [r3, #0]
 8005170:	bd70      	pop	{r4, r5, r6, pc}
 8005172:	bf00      	nop
 8005174:	080062d4 	.word	0x080062d4
 8005178:	080062f4 	.word	0x080062f4
 800517c:	080062b4 	.word	0x080062b4

08005180 <puts>:
 8005180:	4b02      	ldr	r3, [pc, #8]	; (800518c <puts+0xc>)
 8005182:	4601      	mov	r1, r0
 8005184:	6818      	ldr	r0, [r3, #0]
 8005186:	f7ff bf9f 	b.w	80050c8 <_puts_r>
 800518a:	bf00      	nop
 800518c:	20000004 	.word	0x20000004

08005190 <setbuf>:
 8005190:	2900      	cmp	r1, #0
 8005192:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005196:	bf0c      	ite	eq
 8005198:	2202      	moveq	r2, #2
 800519a:	2200      	movne	r2, #0
 800519c:	f000 b800 	b.w	80051a0 <setvbuf>

080051a0 <setvbuf>:
 80051a0:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 80051a4:	461d      	mov	r5, r3
 80051a6:	4b51      	ldr	r3, [pc, #324]	; (80052ec <setvbuf+0x14c>)
 80051a8:	4604      	mov	r4, r0
 80051aa:	681e      	ldr	r6, [r3, #0]
 80051ac:	460f      	mov	r7, r1
 80051ae:	4690      	mov	r8, r2
 80051b0:	b126      	cbz	r6, 80051bc <setvbuf+0x1c>
 80051b2:	69b3      	ldr	r3, [r6, #24]
 80051b4:	b913      	cbnz	r3, 80051bc <setvbuf+0x1c>
 80051b6:	4630      	mov	r0, r6
 80051b8:	f000 fa52 	bl	8005660 <__sinit>
 80051bc:	4b4c      	ldr	r3, [pc, #304]	; (80052f0 <setvbuf+0x150>)
 80051be:	429c      	cmp	r4, r3
 80051c0:	d152      	bne.n	8005268 <setvbuf+0xc8>
 80051c2:	6874      	ldr	r4, [r6, #4]
 80051c4:	f1b8 0f02 	cmp.w	r8, #2
 80051c8:	d006      	beq.n	80051d8 <setvbuf+0x38>
 80051ca:	f1b8 0f01 	cmp.w	r8, #1
 80051ce:	f200 8089 	bhi.w	80052e4 <setvbuf+0x144>
 80051d2:	2d00      	cmp	r5, #0
 80051d4:	f2c0 8086 	blt.w	80052e4 <setvbuf+0x144>
 80051d8:	4621      	mov	r1, r4
 80051da:	4630      	mov	r0, r6
 80051dc:	f000 f9d6 	bl	800558c <_fflush_r>
 80051e0:	6b61      	ldr	r1, [r4, #52]	; 0x34
 80051e2:	b141      	cbz	r1, 80051f6 <setvbuf+0x56>
 80051e4:	f104 0344 	add.w	r3, r4, #68	; 0x44
 80051e8:	4299      	cmp	r1, r3
 80051ea:	d002      	beq.n	80051f2 <setvbuf+0x52>
 80051ec:	4630      	mov	r0, r6
 80051ee:	f000 fb2d 	bl	800584c <_free_r>
 80051f2:	2300      	movs	r3, #0
 80051f4:	6363      	str	r3, [r4, #52]	; 0x34
 80051f6:	2300      	movs	r3, #0
 80051f8:	61a3      	str	r3, [r4, #24]
 80051fa:	6063      	str	r3, [r4, #4]
 80051fc:	89a3      	ldrh	r3, [r4, #12]
 80051fe:	061b      	lsls	r3, r3, #24
 8005200:	d503      	bpl.n	800520a <setvbuf+0x6a>
 8005202:	6921      	ldr	r1, [r4, #16]
 8005204:	4630      	mov	r0, r6
 8005206:	f000 fb21 	bl	800584c <_free_r>
 800520a:	89a3      	ldrh	r3, [r4, #12]
 800520c:	f1b8 0f02 	cmp.w	r8, #2
 8005210:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 8005214:	f023 0303 	bic.w	r3, r3, #3
 8005218:	81a3      	strh	r3, [r4, #12]
 800521a:	d05d      	beq.n	80052d8 <setvbuf+0x138>
 800521c:	ab01      	add	r3, sp, #4
 800521e:	466a      	mov	r2, sp
 8005220:	4621      	mov	r1, r4
 8005222:	4630      	mov	r0, r6
 8005224:	f000 faa6 	bl	8005774 <__swhatbuf_r>
 8005228:	89a3      	ldrh	r3, [r4, #12]
 800522a:	4318      	orrs	r0, r3
 800522c:	81a0      	strh	r0, [r4, #12]
 800522e:	bb2d      	cbnz	r5, 800527c <setvbuf+0xdc>
 8005230:	9d00      	ldr	r5, [sp, #0]
 8005232:	4628      	mov	r0, r5
 8005234:	f000 fb02 	bl	800583c <malloc>
 8005238:	4607      	mov	r7, r0
 800523a:	2800      	cmp	r0, #0
 800523c:	d14e      	bne.n	80052dc <setvbuf+0x13c>
 800523e:	f8dd 9000 	ldr.w	r9, [sp]
 8005242:	45a9      	cmp	r9, r5
 8005244:	d13c      	bne.n	80052c0 <setvbuf+0x120>
 8005246:	f04f 30ff 	mov.w	r0, #4294967295
 800524a:	89a3      	ldrh	r3, [r4, #12]
 800524c:	f043 0302 	orr.w	r3, r3, #2
 8005250:	81a3      	strh	r3, [r4, #12]
 8005252:	2300      	movs	r3, #0
 8005254:	60a3      	str	r3, [r4, #8]
 8005256:	f104 0347 	add.w	r3, r4, #71	; 0x47
 800525a:	6023      	str	r3, [r4, #0]
 800525c:	6123      	str	r3, [r4, #16]
 800525e:	2301      	movs	r3, #1
 8005260:	6163      	str	r3, [r4, #20]
 8005262:	b003      	add	sp, #12
 8005264:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8005268:	4b22      	ldr	r3, [pc, #136]	; (80052f4 <setvbuf+0x154>)
 800526a:	429c      	cmp	r4, r3
 800526c:	d101      	bne.n	8005272 <setvbuf+0xd2>
 800526e:	68b4      	ldr	r4, [r6, #8]
 8005270:	e7a8      	b.n	80051c4 <setvbuf+0x24>
 8005272:	4b21      	ldr	r3, [pc, #132]	; (80052f8 <setvbuf+0x158>)
 8005274:	429c      	cmp	r4, r3
 8005276:	bf08      	it	eq
 8005278:	68f4      	ldreq	r4, [r6, #12]
 800527a:	e7a3      	b.n	80051c4 <setvbuf+0x24>
 800527c:	2f00      	cmp	r7, #0
 800527e:	d0d8      	beq.n	8005232 <setvbuf+0x92>
 8005280:	69b3      	ldr	r3, [r6, #24]
 8005282:	b913      	cbnz	r3, 800528a <setvbuf+0xea>
 8005284:	4630      	mov	r0, r6
 8005286:	f000 f9eb 	bl	8005660 <__sinit>
 800528a:	f1b8 0f01 	cmp.w	r8, #1
 800528e:	bf08      	it	eq
 8005290:	89a3      	ldrheq	r3, [r4, #12]
 8005292:	6027      	str	r7, [r4, #0]
 8005294:	bf04      	itt	eq
 8005296:	f043 0301 	orreq.w	r3, r3, #1
 800529a:	81a3      	strheq	r3, [r4, #12]
 800529c:	89a3      	ldrh	r3, [r4, #12]
 800529e:	6127      	str	r7, [r4, #16]
 80052a0:	f013 0008 	ands.w	r0, r3, #8
 80052a4:	6165      	str	r5, [r4, #20]
 80052a6:	d01b      	beq.n	80052e0 <setvbuf+0x140>
 80052a8:	f013 0001 	ands.w	r0, r3, #1
 80052ac:	f04f 0300 	mov.w	r3, #0
 80052b0:	bf1f      	itttt	ne
 80052b2:	426d      	negne	r5, r5
 80052b4:	60a3      	strne	r3, [r4, #8]
 80052b6:	61a5      	strne	r5, [r4, #24]
 80052b8:	4618      	movne	r0, r3
 80052ba:	bf08      	it	eq
 80052bc:	60a5      	streq	r5, [r4, #8]
 80052be:	e7d0      	b.n	8005262 <setvbuf+0xc2>
 80052c0:	4648      	mov	r0, r9
 80052c2:	f000 fabb 	bl	800583c <malloc>
 80052c6:	4607      	mov	r7, r0
 80052c8:	2800      	cmp	r0, #0
 80052ca:	d0bc      	beq.n	8005246 <setvbuf+0xa6>
 80052cc:	89a3      	ldrh	r3, [r4, #12]
 80052ce:	464d      	mov	r5, r9
 80052d0:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80052d4:	81a3      	strh	r3, [r4, #12]
 80052d6:	e7d3      	b.n	8005280 <setvbuf+0xe0>
 80052d8:	2000      	movs	r0, #0
 80052da:	e7b6      	b.n	800524a <setvbuf+0xaa>
 80052dc:	46a9      	mov	r9, r5
 80052de:	e7f5      	b.n	80052cc <setvbuf+0x12c>
 80052e0:	60a0      	str	r0, [r4, #8]
 80052e2:	e7be      	b.n	8005262 <setvbuf+0xc2>
 80052e4:	f04f 30ff 	mov.w	r0, #4294967295
 80052e8:	e7bb      	b.n	8005262 <setvbuf+0xc2>
 80052ea:	bf00      	nop
 80052ec:	20000004 	.word	0x20000004
 80052f0:	080062d4 	.word	0x080062d4
 80052f4:	080062f4 	.word	0x080062f4
 80052f8:	080062b4 	.word	0x080062b4

080052fc <__swbuf_r>:
 80052fc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80052fe:	460e      	mov	r6, r1
 8005300:	4614      	mov	r4, r2
 8005302:	4605      	mov	r5, r0
 8005304:	b118      	cbz	r0, 800530e <__swbuf_r+0x12>
 8005306:	6983      	ldr	r3, [r0, #24]
 8005308:	b90b      	cbnz	r3, 800530e <__swbuf_r+0x12>
 800530a:	f000 f9a9 	bl	8005660 <__sinit>
 800530e:	4b21      	ldr	r3, [pc, #132]	; (8005394 <__swbuf_r+0x98>)
 8005310:	429c      	cmp	r4, r3
 8005312:	d12a      	bne.n	800536a <__swbuf_r+0x6e>
 8005314:	686c      	ldr	r4, [r5, #4]
 8005316:	69a3      	ldr	r3, [r4, #24]
 8005318:	60a3      	str	r3, [r4, #8]
 800531a:	89a3      	ldrh	r3, [r4, #12]
 800531c:	071a      	lsls	r2, r3, #28
 800531e:	d52e      	bpl.n	800537e <__swbuf_r+0x82>
 8005320:	6923      	ldr	r3, [r4, #16]
 8005322:	b363      	cbz	r3, 800537e <__swbuf_r+0x82>
 8005324:	6923      	ldr	r3, [r4, #16]
 8005326:	6820      	ldr	r0, [r4, #0]
 8005328:	b2f6      	uxtb	r6, r6
 800532a:	1ac0      	subs	r0, r0, r3
 800532c:	6963      	ldr	r3, [r4, #20]
 800532e:	4637      	mov	r7, r6
 8005330:	4298      	cmp	r0, r3
 8005332:	db04      	blt.n	800533e <__swbuf_r+0x42>
 8005334:	4621      	mov	r1, r4
 8005336:	4628      	mov	r0, r5
 8005338:	f000 f928 	bl	800558c <_fflush_r>
 800533c:	bb28      	cbnz	r0, 800538a <__swbuf_r+0x8e>
 800533e:	68a3      	ldr	r3, [r4, #8]
 8005340:	3001      	adds	r0, #1
 8005342:	3b01      	subs	r3, #1
 8005344:	60a3      	str	r3, [r4, #8]
 8005346:	6823      	ldr	r3, [r4, #0]
 8005348:	1c5a      	adds	r2, r3, #1
 800534a:	6022      	str	r2, [r4, #0]
 800534c:	701e      	strb	r6, [r3, #0]
 800534e:	6963      	ldr	r3, [r4, #20]
 8005350:	4298      	cmp	r0, r3
 8005352:	d004      	beq.n	800535e <__swbuf_r+0x62>
 8005354:	89a3      	ldrh	r3, [r4, #12]
 8005356:	07db      	lsls	r3, r3, #31
 8005358:	d519      	bpl.n	800538e <__swbuf_r+0x92>
 800535a:	2e0a      	cmp	r6, #10
 800535c:	d117      	bne.n	800538e <__swbuf_r+0x92>
 800535e:	4621      	mov	r1, r4
 8005360:	4628      	mov	r0, r5
 8005362:	f000 f913 	bl	800558c <_fflush_r>
 8005366:	b190      	cbz	r0, 800538e <__swbuf_r+0x92>
 8005368:	e00f      	b.n	800538a <__swbuf_r+0x8e>
 800536a:	4b0b      	ldr	r3, [pc, #44]	; (8005398 <__swbuf_r+0x9c>)
 800536c:	429c      	cmp	r4, r3
 800536e:	d101      	bne.n	8005374 <__swbuf_r+0x78>
 8005370:	68ac      	ldr	r4, [r5, #8]
 8005372:	e7d0      	b.n	8005316 <__swbuf_r+0x1a>
 8005374:	4b09      	ldr	r3, [pc, #36]	; (800539c <__swbuf_r+0xa0>)
 8005376:	429c      	cmp	r4, r3
 8005378:	bf08      	it	eq
 800537a:	68ec      	ldreq	r4, [r5, #12]
 800537c:	e7cb      	b.n	8005316 <__swbuf_r+0x1a>
 800537e:	4621      	mov	r1, r4
 8005380:	4628      	mov	r0, r5
 8005382:	f000 f80d 	bl	80053a0 <__swsetup_r>
 8005386:	2800      	cmp	r0, #0
 8005388:	d0cc      	beq.n	8005324 <__swbuf_r+0x28>
 800538a:	f04f 37ff 	mov.w	r7, #4294967295
 800538e:	4638      	mov	r0, r7
 8005390:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8005392:	bf00      	nop
 8005394:	080062d4 	.word	0x080062d4
 8005398:	080062f4 	.word	0x080062f4
 800539c:	080062b4 	.word	0x080062b4

080053a0 <__swsetup_r>:
 80053a0:	4b32      	ldr	r3, [pc, #200]	; (800546c <__swsetup_r+0xcc>)
 80053a2:	b570      	push	{r4, r5, r6, lr}
 80053a4:	681d      	ldr	r5, [r3, #0]
 80053a6:	4606      	mov	r6, r0
 80053a8:	460c      	mov	r4, r1
 80053aa:	b125      	cbz	r5, 80053b6 <__swsetup_r+0x16>
 80053ac:	69ab      	ldr	r3, [r5, #24]
 80053ae:	b913      	cbnz	r3, 80053b6 <__swsetup_r+0x16>
 80053b0:	4628      	mov	r0, r5
 80053b2:	f000 f955 	bl	8005660 <__sinit>
 80053b6:	4b2e      	ldr	r3, [pc, #184]	; (8005470 <__swsetup_r+0xd0>)
 80053b8:	429c      	cmp	r4, r3
 80053ba:	d10f      	bne.n	80053dc <__swsetup_r+0x3c>
 80053bc:	686c      	ldr	r4, [r5, #4]
 80053be:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80053c2:	b29a      	uxth	r2, r3
 80053c4:	0715      	lsls	r5, r2, #28
 80053c6:	d42c      	bmi.n	8005422 <__swsetup_r+0x82>
 80053c8:	06d0      	lsls	r0, r2, #27
 80053ca:	d411      	bmi.n	80053f0 <__swsetup_r+0x50>
 80053cc:	2209      	movs	r2, #9
 80053ce:	6032      	str	r2, [r6, #0]
 80053d0:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 80053d4:	81a3      	strh	r3, [r4, #12]
 80053d6:	f04f 30ff 	mov.w	r0, #4294967295
 80053da:	bd70      	pop	{r4, r5, r6, pc}
 80053dc:	4b25      	ldr	r3, [pc, #148]	; (8005474 <__swsetup_r+0xd4>)
 80053de:	429c      	cmp	r4, r3
 80053e0:	d101      	bne.n	80053e6 <__swsetup_r+0x46>
 80053e2:	68ac      	ldr	r4, [r5, #8]
 80053e4:	e7eb      	b.n	80053be <__swsetup_r+0x1e>
 80053e6:	4b24      	ldr	r3, [pc, #144]	; (8005478 <__swsetup_r+0xd8>)
 80053e8:	429c      	cmp	r4, r3
 80053ea:	bf08      	it	eq
 80053ec:	68ec      	ldreq	r4, [r5, #12]
 80053ee:	e7e6      	b.n	80053be <__swsetup_r+0x1e>
 80053f0:	0751      	lsls	r1, r2, #29
 80053f2:	d512      	bpl.n	800541a <__swsetup_r+0x7a>
 80053f4:	6b61      	ldr	r1, [r4, #52]	; 0x34
 80053f6:	b141      	cbz	r1, 800540a <__swsetup_r+0x6a>
 80053f8:	f104 0344 	add.w	r3, r4, #68	; 0x44
 80053fc:	4299      	cmp	r1, r3
 80053fe:	d002      	beq.n	8005406 <__swsetup_r+0x66>
 8005400:	4630      	mov	r0, r6
 8005402:	f000 fa23 	bl	800584c <_free_r>
 8005406:	2300      	movs	r3, #0
 8005408:	6363      	str	r3, [r4, #52]	; 0x34
 800540a:	89a3      	ldrh	r3, [r4, #12]
 800540c:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 8005410:	81a3      	strh	r3, [r4, #12]
 8005412:	2300      	movs	r3, #0
 8005414:	6063      	str	r3, [r4, #4]
 8005416:	6923      	ldr	r3, [r4, #16]
 8005418:	6023      	str	r3, [r4, #0]
 800541a:	89a3      	ldrh	r3, [r4, #12]
 800541c:	f043 0308 	orr.w	r3, r3, #8
 8005420:	81a3      	strh	r3, [r4, #12]
 8005422:	6923      	ldr	r3, [r4, #16]
 8005424:	b94b      	cbnz	r3, 800543a <__swsetup_r+0x9a>
 8005426:	89a3      	ldrh	r3, [r4, #12]
 8005428:	f403 7320 	and.w	r3, r3, #640	; 0x280
 800542c:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 8005430:	d003      	beq.n	800543a <__swsetup_r+0x9a>
 8005432:	4621      	mov	r1, r4
 8005434:	4630      	mov	r0, r6
 8005436:	f000 f9c1 	bl	80057bc <__smakebuf_r>
 800543a:	89a2      	ldrh	r2, [r4, #12]
 800543c:	f012 0301 	ands.w	r3, r2, #1
 8005440:	d00c      	beq.n	800545c <__swsetup_r+0xbc>
 8005442:	2300      	movs	r3, #0
 8005444:	60a3      	str	r3, [r4, #8]
 8005446:	6963      	ldr	r3, [r4, #20]
 8005448:	425b      	negs	r3, r3
 800544a:	61a3      	str	r3, [r4, #24]
 800544c:	6923      	ldr	r3, [r4, #16]
 800544e:	b953      	cbnz	r3, 8005466 <__swsetup_r+0xc6>
 8005450:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8005454:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 8005458:	d1ba      	bne.n	80053d0 <__swsetup_r+0x30>
 800545a:	bd70      	pop	{r4, r5, r6, pc}
 800545c:	0792      	lsls	r2, r2, #30
 800545e:	bf58      	it	pl
 8005460:	6963      	ldrpl	r3, [r4, #20]
 8005462:	60a3      	str	r3, [r4, #8]
 8005464:	e7f2      	b.n	800544c <__swsetup_r+0xac>
 8005466:	2000      	movs	r0, #0
 8005468:	e7f7      	b.n	800545a <__swsetup_r+0xba>
 800546a:	bf00      	nop
 800546c:	20000004 	.word	0x20000004
 8005470:	080062d4 	.word	0x080062d4
 8005474:	080062f4 	.word	0x080062f4
 8005478:	080062b4 	.word	0x080062b4

0800547c <__sflush_r>:
 800547c:	898a      	ldrh	r2, [r1, #12]
 800547e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8005482:	4605      	mov	r5, r0
 8005484:	0710      	lsls	r0, r2, #28
 8005486:	460c      	mov	r4, r1
 8005488:	d45a      	bmi.n	8005540 <__sflush_r+0xc4>
 800548a:	684b      	ldr	r3, [r1, #4]
 800548c:	2b00      	cmp	r3, #0
 800548e:	dc05      	bgt.n	800549c <__sflush_r+0x20>
 8005490:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 8005492:	2b00      	cmp	r3, #0
 8005494:	dc02      	bgt.n	800549c <__sflush_r+0x20>
 8005496:	2000      	movs	r0, #0
 8005498:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800549c:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800549e:	2e00      	cmp	r6, #0
 80054a0:	d0f9      	beq.n	8005496 <__sflush_r+0x1a>
 80054a2:	2300      	movs	r3, #0
 80054a4:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 80054a8:	682f      	ldr	r7, [r5, #0]
 80054aa:	602b      	str	r3, [r5, #0]
 80054ac:	d033      	beq.n	8005516 <__sflush_r+0x9a>
 80054ae:	6d60      	ldr	r0, [r4, #84]	; 0x54
 80054b0:	89a3      	ldrh	r3, [r4, #12]
 80054b2:	075a      	lsls	r2, r3, #29
 80054b4:	d505      	bpl.n	80054c2 <__sflush_r+0x46>
 80054b6:	6863      	ldr	r3, [r4, #4]
 80054b8:	1ac0      	subs	r0, r0, r3
 80054ba:	6b63      	ldr	r3, [r4, #52]	; 0x34
 80054bc:	b10b      	cbz	r3, 80054c2 <__sflush_r+0x46>
 80054be:	6c23      	ldr	r3, [r4, #64]	; 0x40
 80054c0:	1ac0      	subs	r0, r0, r3
 80054c2:	2300      	movs	r3, #0
 80054c4:	4602      	mov	r2, r0
 80054c6:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 80054c8:	6a21      	ldr	r1, [r4, #32]
 80054ca:	4628      	mov	r0, r5
 80054cc:	47b0      	blx	r6
 80054ce:	1c43      	adds	r3, r0, #1
 80054d0:	89a3      	ldrh	r3, [r4, #12]
 80054d2:	d106      	bne.n	80054e2 <__sflush_r+0x66>
 80054d4:	6829      	ldr	r1, [r5, #0]
 80054d6:	291d      	cmp	r1, #29
 80054d8:	d84b      	bhi.n	8005572 <__sflush_r+0xf6>
 80054da:	4a2b      	ldr	r2, [pc, #172]	; (8005588 <__sflush_r+0x10c>)
 80054dc:	40ca      	lsrs	r2, r1
 80054de:	07d6      	lsls	r6, r2, #31
 80054e0:	d547      	bpl.n	8005572 <__sflush_r+0xf6>
 80054e2:	2200      	movs	r2, #0
 80054e4:	6062      	str	r2, [r4, #4]
 80054e6:	6922      	ldr	r2, [r4, #16]
 80054e8:	04d9      	lsls	r1, r3, #19
 80054ea:	6022      	str	r2, [r4, #0]
 80054ec:	d504      	bpl.n	80054f8 <__sflush_r+0x7c>
 80054ee:	1c42      	adds	r2, r0, #1
 80054f0:	d101      	bne.n	80054f6 <__sflush_r+0x7a>
 80054f2:	682b      	ldr	r3, [r5, #0]
 80054f4:	b903      	cbnz	r3, 80054f8 <__sflush_r+0x7c>
 80054f6:	6560      	str	r0, [r4, #84]	; 0x54
 80054f8:	6b61      	ldr	r1, [r4, #52]	; 0x34
 80054fa:	602f      	str	r7, [r5, #0]
 80054fc:	2900      	cmp	r1, #0
 80054fe:	d0ca      	beq.n	8005496 <__sflush_r+0x1a>
 8005500:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8005504:	4299      	cmp	r1, r3
 8005506:	d002      	beq.n	800550e <__sflush_r+0x92>
 8005508:	4628      	mov	r0, r5
 800550a:	f000 f99f 	bl	800584c <_free_r>
 800550e:	2000      	movs	r0, #0
 8005510:	6360      	str	r0, [r4, #52]	; 0x34
 8005512:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8005516:	6a21      	ldr	r1, [r4, #32]
 8005518:	2301      	movs	r3, #1
 800551a:	4628      	mov	r0, r5
 800551c:	47b0      	blx	r6
 800551e:	1c41      	adds	r1, r0, #1
 8005520:	d1c6      	bne.n	80054b0 <__sflush_r+0x34>
 8005522:	682b      	ldr	r3, [r5, #0]
 8005524:	2b00      	cmp	r3, #0
 8005526:	d0c3      	beq.n	80054b0 <__sflush_r+0x34>
 8005528:	2b1d      	cmp	r3, #29
 800552a:	d001      	beq.n	8005530 <__sflush_r+0xb4>
 800552c:	2b16      	cmp	r3, #22
 800552e:	d101      	bne.n	8005534 <__sflush_r+0xb8>
 8005530:	602f      	str	r7, [r5, #0]
 8005532:	e7b0      	b.n	8005496 <__sflush_r+0x1a>
 8005534:	89a3      	ldrh	r3, [r4, #12]
 8005536:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800553a:	81a3      	strh	r3, [r4, #12]
 800553c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8005540:	690f      	ldr	r7, [r1, #16]
 8005542:	2f00      	cmp	r7, #0
 8005544:	d0a7      	beq.n	8005496 <__sflush_r+0x1a>
 8005546:	0793      	lsls	r3, r2, #30
 8005548:	bf18      	it	ne
 800554a:	2300      	movne	r3, #0
 800554c:	680e      	ldr	r6, [r1, #0]
 800554e:	bf08      	it	eq
 8005550:	694b      	ldreq	r3, [r1, #20]
 8005552:	eba6 0807 	sub.w	r8, r6, r7
 8005556:	600f      	str	r7, [r1, #0]
 8005558:	608b      	str	r3, [r1, #8]
 800555a:	f1b8 0f00 	cmp.w	r8, #0
 800555e:	dd9a      	ble.n	8005496 <__sflush_r+0x1a>
 8005560:	4643      	mov	r3, r8
 8005562:	463a      	mov	r2, r7
 8005564:	6a21      	ldr	r1, [r4, #32]
 8005566:	4628      	mov	r0, r5
 8005568:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 800556a:	47b0      	blx	r6
 800556c:	2800      	cmp	r0, #0
 800556e:	dc07      	bgt.n	8005580 <__sflush_r+0x104>
 8005570:	89a3      	ldrh	r3, [r4, #12]
 8005572:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8005576:	81a3      	strh	r3, [r4, #12]
 8005578:	f04f 30ff 	mov.w	r0, #4294967295
 800557c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8005580:	4407      	add	r7, r0
 8005582:	eba8 0800 	sub.w	r8, r8, r0
 8005586:	e7e8      	b.n	800555a <__sflush_r+0xde>
 8005588:	20400001 	.word	0x20400001

0800558c <_fflush_r>:
 800558c:	b538      	push	{r3, r4, r5, lr}
 800558e:	690b      	ldr	r3, [r1, #16]
 8005590:	4605      	mov	r5, r0
 8005592:	460c      	mov	r4, r1
 8005594:	b1db      	cbz	r3, 80055ce <_fflush_r+0x42>
 8005596:	b118      	cbz	r0, 80055a0 <_fflush_r+0x14>
 8005598:	6983      	ldr	r3, [r0, #24]
 800559a:	b90b      	cbnz	r3, 80055a0 <_fflush_r+0x14>
 800559c:	f000 f860 	bl	8005660 <__sinit>
 80055a0:	4b0c      	ldr	r3, [pc, #48]	; (80055d4 <_fflush_r+0x48>)
 80055a2:	429c      	cmp	r4, r3
 80055a4:	d109      	bne.n	80055ba <_fflush_r+0x2e>
 80055a6:	686c      	ldr	r4, [r5, #4]
 80055a8:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80055ac:	b17b      	cbz	r3, 80055ce <_fflush_r+0x42>
 80055ae:	4621      	mov	r1, r4
 80055b0:	4628      	mov	r0, r5
 80055b2:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 80055b6:	f7ff bf61 	b.w	800547c <__sflush_r>
 80055ba:	4b07      	ldr	r3, [pc, #28]	; (80055d8 <_fflush_r+0x4c>)
 80055bc:	429c      	cmp	r4, r3
 80055be:	d101      	bne.n	80055c4 <_fflush_r+0x38>
 80055c0:	68ac      	ldr	r4, [r5, #8]
 80055c2:	e7f1      	b.n	80055a8 <_fflush_r+0x1c>
 80055c4:	4b05      	ldr	r3, [pc, #20]	; (80055dc <_fflush_r+0x50>)
 80055c6:	429c      	cmp	r4, r3
 80055c8:	bf08      	it	eq
 80055ca:	68ec      	ldreq	r4, [r5, #12]
 80055cc:	e7ec      	b.n	80055a8 <_fflush_r+0x1c>
 80055ce:	2000      	movs	r0, #0
 80055d0:	bd38      	pop	{r3, r4, r5, pc}
 80055d2:	bf00      	nop
 80055d4:	080062d4 	.word	0x080062d4
 80055d8:	080062f4 	.word	0x080062f4
 80055dc:	080062b4 	.word	0x080062b4

080055e0 <_cleanup_r>:
 80055e0:	4901      	ldr	r1, [pc, #4]	; (80055e8 <_cleanup_r+0x8>)
 80055e2:	f000 b8a9 	b.w	8005738 <_fwalk_reent>
 80055e6:	bf00      	nop
 80055e8:	0800558d 	.word	0x0800558d

080055ec <std.isra.0>:
 80055ec:	2300      	movs	r3, #0
 80055ee:	b510      	push	{r4, lr}
 80055f0:	4604      	mov	r4, r0
 80055f2:	6003      	str	r3, [r0, #0]
 80055f4:	6043      	str	r3, [r0, #4]
 80055f6:	6083      	str	r3, [r0, #8]
 80055f8:	8181      	strh	r1, [r0, #12]
 80055fa:	6643      	str	r3, [r0, #100]	; 0x64
 80055fc:	81c2      	strh	r2, [r0, #14]
 80055fe:	6103      	str	r3, [r0, #16]
 8005600:	6143      	str	r3, [r0, #20]
 8005602:	6183      	str	r3, [r0, #24]
 8005604:	4619      	mov	r1, r3
 8005606:	2208      	movs	r2, #8
 8005608:	305c      	adds	r0, #92	; 0x5c
 800560a:	f7ff fd3d 	bl	8005088 <memset>
 800560e:	4b05      	ldr	r3, [pc, #20]	; (8005624 <std.isra.0+0x38>)
 8005610:	6224      	str	r4, [r4, #32]
 8005612:	6263      	str	r3, [r4, #36]	; 0x24
 8005614:	4b04      	ldr	r3, [pc, #16]	; (8005628 <std.isra.0+0x3c>)
 8005616:	62a3      	str	r3, [r4, #40]	; 0x28
 8005618:	4b04      	ldr	r3, [pc, #16]	; (800562c <std.isra.0+0x40>)
 800561a:	62e3      	str	r3, [r4, #44]	; 0x2c
 800561c:	4b04      	ldr	r3, [pc, #16]	; (8005630 <std.isra.0+0x44>)
 800561e:	6323      	str	r3, [r4, #48]	; 0x30
 8005620:	bd10      	pop	{r4, pc}
 8005622:	bf00      	nop
 8005624:	08005f6d 	.word	0x08005f6d
 8005628:	08005f8f 	.word	0x08005f8f
 800562c:	08005fc7 	.word	0x08005fc7
 8005630:	08005feb 	.word	0x08005feb

08005634 <__sfmoreglue>:
 8005634:	b570      	push	{r4, r5, r6, lr}
 8005636:	2568      	movs	r5, #104	; 0x68
 8005638:	1e4a      	subs	r2, r1, #1
 800563a:	4355      	muls	r5, r2
 800563c:	460e      	mov	r6, r1
 800563e:	f105 0174 	add.w	r1, r5, #116	; 0x74
 8005642:	f000 f94f 	bl	80058e4 <_malloc_r>
 8005646:	4604      	mov	r4, r0
 8005648:	b140      	cbz	r0, 800565c <__sfmoreglue+0x28>
 800564a:	2100      	movs	r1, #0
 800564c:	e880 0042 	stmia.w	r0, {r1, r6}
 8005650:	300c      	adds	r0, #12
 8005652:	60a0      	str	r0, [r4, #8]
 8005654:	f105 0268 	add.w	r2, r5, #104	; 0x68
 8005658:	f7ff fd16 	bl	8005088 <memset>
 800565c:	4620      	mov	r0, r4
 800565e:	bd70      	pop	{r4, r5, r6, pc}

08005660 <__sinit>:
 8005660:	6983      	ldr	r3, [r0, #24]
 8005662:	b510      	push	{r4, lr}
 8005664:	4604      	mov	r4, r0
 8005666:	bb33      	cbnz	r3, 80056b6 <__sinit+0x56>
 8005668:	6483      	str	r3, [r0, #72]	; 0x48
 800566a:	64c3      	str	r3, [r0, #76]	; 0x4c
 800566c:	6503      	str	r3, [r0, #80]	; 0x50
 800566e:	4b12      	ldr	r3, [pc, #72]	; (80056b8 <__sinit+0x58>)
 8005670:	4a12      	ldr	r2, [pc, #72]	; (80056bc <__sinit+0x5c>)
 8005672:	681b      	ldr	r3, [r3, #0]
 8005674:	6282      	str	r2, [r0, #40]	; 0x28
 8005676:	4298      	cmp	r0, r3
 8005678:	bf04      	itt	eq
 800567a:	2301      	moveq	r3, #1
 800567c:	6183      	streq	r3, [r0, #24]
 800567e:	f000 f81f 	bl	80056c0 <__sfp>
 8005682:	6060      	str	r0, [r4, #4]
 8005684:	4620      	mov	r0, r4
 8005686:	f000 f81b 	bl	80056c0 <__sfp>
 800568a:	60a0      	str	r0, [r4, #8]
 800568c:	4620      	mov	r0, r4
 800568e:	f000 f817 	bl	80056c0 <__sfp>
 8005692:	2200      	movs	r2, #0
 8005694:	60e0      	str	r0, [r4, #12]
 8005696:	2104      	movs	r1, #4
 8005698:	6860      	ldr	r0, [r4, #4]
 800569a:	f7ff ffa7 	bl	80055ec <std.isra.0>
 800569e:	2201      	movs	r2, #1
 80056a0:	2109      	movs	r1, #9
 80056a2:	68a0      	ldr	r0, [r4, #8]
 80056a4:	f7ff ffa2 	bl	80055ec <std.isra.0>
 80056a8:	2202      	movs	r2, #2
 80056aa:	2112      	movs	r1, #18
 80056ac:	68e0      	ldr	r0, [r4, #12]
 80056ae:	f7ff ff9d 	bl	80055ec <std.isra.0>
 80056b2:	2301      	movs	r3, #1
 80056b4:	61a3      	str	r3, [r4, #24]
 80056b6:	bd10      	pop	{r4, pc}
 80056b8:	080062b0 	.word	0x080062b0
 80056bc:	080055e1 	.word	0x080055e1

080056c0 <__sfp>:
 80056c0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80056c2:	4b1c      	ldr	r3, [pc, #112]	; (8005734 <__sfp+0x74>)
 80056c4:	4607      	mov	r7, r0
 80056c6:	681e      	ldr	r6, [r3, #0]
 80056c8:	69b3      	ldr	r3, [r6, #24]
 80056ca:	b913      	cbnz	r3, 80056d2 <__sfp+0x12>
 80056cc:	4630      	mov	r0, r6
 80056ce:	f7ff ffc7 	bl	8005660 <__sinit>
 80056d2:	3648      	adds	r6, #72	; 0x48
 80056d4:	68b4      	ldr	r4, [r6, #8]
 80056d6:	6873      	ldr	r3, [r6, #4]
 80056d8:	3b01      	subs	r3, #1
 80056da:	d503      	bpl.n	80056e4 <__sfp+0x24>
 80056dc:	6833      	ldr	r3, [r6, #0]
 80056de:	b133      	cbz	r3, 80056ee <__sfp+0x2e>
 80056e0:	6836      	ldr	r6, [r6, #0]
 80056e2:	e7f7      	b.n	80056d4 <__sfp+0x14>
 80056e4:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 80056e8:	b16d      	cbz	r5, 8005706 <__sfp+0x46>
 80056ea:	3468      	adds	r4, #104	; 0x68
 80056ec:	e7f4      	b.n	80056d8 <__sfp+0x18>
 80056ee:	2104      	movs	r1, #4
 80056f0:	4638      	mov	r0, r7
 80056f2:	f7ff ff9f 	bl	8005634 <__sfmoreglue>
 80056f6:	6030      	str	r0, [r6, #0]
 80056f8:	2800      	cmp	r0, #0
 80056fa:	d1f1      	bne.n	80056e0 <__sfp+0x20>
 80056fc:	230c      	movs	r3, #12
 80056fe:	4604      	mov	r4, r0
 8005700:	603b      	str	r3, [r7, #0]
 8005702:	4620      	mov	r0, r4
 8005704:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8005706:	f64f 73ff 	movw	r3, #65535	; 0xffff
 800570a:	81e3      	strh	r3, [r4, #14]
 800570c:	2301      	movs	r3, #1
 800570e:	6665      	str	r5, [r4, #100]	; 0x64
 8005710:	81a3      	strh	r3, [r4, #12]
 8005712:	6025      	str	r5, [r4, #0]
 8005714:	60a5      	str	r5, [r4, #8]
 8005716:	6065      	str	r5, [r4, #4]
 8005718:	6125      	str	r5, [r4, #16]
 800571a:	6165      	str	r5, [r4, #20]
 800571c:	61a5      	str	r5, [r4, #24]
 800571e:	2208      	movs	r2, #8
 8005720:	4629      	mov	r1, r5
 8005722:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 8005726:	f7ff fcaf 	bl	8005088 <memset>
 800572a:	6365      	str	r5, [r4, #52]	; 0x34
 800572c:	63a5      	str	r5, [r4, #56]	; 0x38
 800572e:	64a5      	str	r5, [r4, #72]	; 0x48
 8005730:	64e5      	str	r5, [r4, #76]	; 0x4c
 8005732:	e7e6      	b.n	8005702 <__sfp+0x42>
 8005734:	080062b0 	.word	0x080062b0

08005738 <_fwalk_reent>:
 8005738:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800573c:	4680      	mov	r8, r0
 800573e:	4689      	mov	r9, r1
 8005740:	2600      	movs	r6, #0
 8005742:	f100 0448 	add.w	r4, r0, #72	; 0x48
 8005746:	b914      	cbnz	r4, 800574e <_fwalk_reent+0x16>
 8005748:	4630      	mov	r0, r6
 800574a:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800574e:	68a5      	ldr	r5, [r4, #8]
 8005750:	6867      	ldr	r7, [r4, #4]
 8005752:	3f01      	subs	r7, #1
 8005754:	d501      	bpl.n	800575a <_fwalk_reent+0x22>
 8005756:	6824      	ldr	r4, [r4, #0]
 8005758:	e7f5      	b.n	8005746 <_fwalk_reent+0xe>
 800575a:	89ab      	ldrh	r3, [r5, #12]
 800575c:	2b01      	cmp	r3, #1
 800575e:	d907      	bls.n	8005770 <_fwalk_reent+0x38>
 8005760:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 8005764:	3301      	adds	r3, #1
 8005766:	d003      	beq.n	8005770 <_fwalk_reent+0x38>
 8005768:	4629      	mov	r1, r5
 800576a:	4640      	mov	r0, r8
 800576c:	47c8      	blx	r9
 800576e:	4306      	orrs	r6, r0
 8005770:	3568      	adds	r5, #104	; 0x68
 8005772:	e7ee      	b.n	8005752 <_fwalk_reent+0x1a>

08005774 <__swhatbuf_r>:
 8005774:	b570      	push	{r4, r5, r6, lr}
 8005776:	460e      	mov	r6, r1
 8005778:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800577c:	b090      	sub	sp, #64	; 0x40
 800577e:	2900      	cmp	r1, #0
 8005780:	4614      	mov	r4, r2
 8005782:	461d      	mov	r5, r3
 8005784:	da07      	bge.n	8005796 <__swhatbuf_r+0x22>
 8005786:	2300      	movs	r3, #0
 8005788:	602b      	str	r3, [r5, #0]
 800578a:	89b3      	ldrh	r3, [r6, #12]
 800578c:	061a      	lsls	r2, r3, #24
 800578e:	d410      	bmi.n	80057b2 <__swhatbuf_r+0x3e>
 8005790:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005794:	e00e      	b.n	80057b4 <__swhatbuf_r+0x40>
 8005796:	aa01      	add	r2, sp, #4
 8005798:	f000 fc4e 	bl	8006038 <_fstat_r>
 800579c:	2800      	cmp	r0, #0
 800579e:	dbf2      	blt.n	8005786 <__swhatbuf_r+0x12>
 80057a0:	9a02      	ldr	r2, [sp, #8]
 80057a2:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 80057a6:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 80057aa:	425a      	negs	r2, r3
 80057ac:	415a      	adcs	r2, r3
 80057ae:	602a      	str	r2, [r5, #0]
 80057b0:	e7ee      	b.n	8005790 <__swhatbuf_r+0x1c>
 80057b2:	2340      	movs	r3, #64	; 0x40
 80057b4:	2000      	movs	r0, #0
 80057b6:	6023      	str	r3, [r4, #0]
 80057b8:	b010      	add	sp, #64	; 0x40
 80057ba:	bd70      	pop	{r4, r5, r6, pc}

080057bc <__smakebuf_r>:
 80057bc:	898b      	ldrh	r3, [r1, #12]
 80057be:	b573      	push	{r0, r1, r4, r5, r6, lr}
 80057c0:	079d      	lsls	r5, r3, #30
 80057c2:	4606      	mov	r6, r0
 80057c4:	460c      	mov	r4, r1
 80057c6:	d507      	bpl.n	80057d8 <__smakebuf_r+0x1c>
 80057c8:	f104 0347 	add.w	r3, r4, #71	; 0x47
 80057cc:	6023      	str	r3, [r4, #0]
 80057ce:	6123      	str	r3, [r4, #16]
 80057d0:	2301      	movs	r3, #1
 80057d2:	6163      	str	r3, [r4, #20]
 80057d4:	b002      	add	sp, #8
 80057d6:	bd70      	pop	{r4, r5, r6, pc}
 80057d8:	ab01      	add	r3, sp, #4
 80057da:	466a      	mov	r2, sp
 80057dc:	f7ff ffca 	bl	8005774 <__swhatbuf_r>
 80057e0:	9900      	ldr	r1, [sp, #0]
 80057e2:	4605      	mov	r5, r0
 80057e4:	4630      	mov	r0, r6
 80057e6:	f000 f87d 	bl	80058e4 <_malloc_r>
 80057ea:	b948      	cbnz	r0, 8005800 <__smakebuf_r+0x44>
 80057ec:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80057f0:	059a      	lsls	r2, r3, #22
 80057f2:	d4ef      	bmi.n	80057d4 <__smakebuf_r+0x18>
 80057f4:	f023 0303 	bic.w	r3, r3, #3
 80057f8:	f043 0302 	orr.w	r3, r3, #2
 80057fc:	81a3      	strh	r3, [r4, #12]
 80057fe:	e7e3      	b.n	80057c8 <__smakebuf_r+0xc>
 8005800:	4b0d      	ldr	r3, [pc, #52]	; (8005838 <__smakebuf_r+0x7c>)
 8005802:	62b3      	str	r3, [r6, #40]	; 0x28
 8005804:	89a3      	ldrh	r3, [r4, #12]
 8005806:	6020      	str	r0, [r4, #0]
 8005808:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800580c:	81a3      	strh	r3, [r4, #12]
 800580e:	9b00      	ldr	r3, [sp, #0]
 8005810:	6120      	str	r0, [r4, #16]
 8005812:	6163      	str	r3, [r4, #20]
 8005814:	9b01      	ldr	r3, [sp, #4]
 8005816:	b15b      	cbz	r3, 8005830 <__smakebuf_r+0x74>
 8005818:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800581c:	4630      	mov	r0, r6
 800581e:	f000 fc1d 	bl	800605c <_isatty_r>
 8005822:	b128      	cbz	r0, 8005830 <__smakebuf_r+0x74>
 8005824:	89a3      	ldrh	r3, [r4, #12]
 8005826:	f023 0303 	bic.w	r3, r3, #3
 800582a:	f043 0301 	orr.w	r3, r3, #1
 800582e:	81a3      	strh	r3, [r4, #12]
 8005830:	89a3      	ldrh	r3, [r4, #12]
 8005832:	431d      	orrs	r5, r3
 8005834:	81a5      	strh	r5, [r4, #12]
 8005836:	e7cd      	b.n	80057d4 <__smakebuf_r+0x18>
 8005838:	080055e1 	.word	0x080055e1

0800583c <malloc>:
 800583c:	4b02      	ldr	r3, [pc, #8]	; (8005848 <malloc+0xc>)
 800583e:	4601      	mov	r1, r0
 8005840:	6818      	ldr	r0, [r3, #0]
 8005842:	f000 b84f 	b.w	80058e4 <_malloc_r>
 8005846:	bf00      	nop
 8005848:	20000004 	.word	0x20000004

0800584c <_free_r>:
 800584c:	b538      	push	{r3, r4, r5, lr}
 800584e:	4605      	mov	r5, r0
 8005850:	2900      	cmp	r1, #0
 8005852:	d043      	beq.n	80058dc <_free_r+0x90>
 8005854:	f851 3c04 	ldr.w	r3, [r1, #-4]
 8005858:	1f0c      	subs	r4, r1, #4
 800585a:	2b00      	cmp	r3, #0
 800585c:	bfb8      	it	lt
 800585e:	18e4      	addlt	r4, r4, r3
 8005860:	f000 fc2c 	bl	80060bc <__malloc_lock>
 8005864:	4a1e      	ldr	r2, [pc, #120]	; (80058e0 <_free_r+0x94>)
 8005866:	6813      	ldr	r3, [r2, #0]
 8005868:	4610      	mov	r0, r2
 800586a:	b933      	cbnz	r3, 800587a <_free_r+0x2e>
 800586c:	6063      	str	r3, [r4, #4]
 800586e:	6014      	str	r4, [r2, #0]
 8005870:	4628      	mov	r0, r5
 8005872:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 8005876:	f000 bc22 	b.w	80060be <__malloc_unlock>
 800587a:	42a3      	cmp	r3, r4
 800587c:	d90b      	bls.n	8005896 <_free_r+0x4a>
 800587e:	6821      	ldr	r1, [r4, #0]
 8005880:	1862      	adds	r2, r4, r1
 8005882:	4293      	cmp	r3, r2
 8005884:	bf01      	itttt	eq
 8005886:	681a      	ldreq	r2, [r3, #0]
 8005888:	685b      	ldreq	r3, [r3, #4]
 800588a:	1852      	addeq	r2, r2, r1
 800588c:	6022      	streq	r2, [r4, #0]
 800588e:	6063      	str	r3, [r4, #4]
 8005890:	6004      	str	r4, [r0, #0]
 8005892:	e7ed      	b.n	8005870 <_free_r+0x24>
 8005894:	4613      	mov	r3, r2
 8005896:	685a      	ldr	r2, [r3, #4]
 8005898:	b10a      	cbz	r2, 800589e <_free_r+0x52>
 800589a:	42a2      	cmp	r2, r4
 800589c:	d9fa      	bls.n	8005894 <_free_r+0x48>
 800589e:	6819      	ldr	r1, [r3, #0]
 80058a0:	1858      	adds	r0, r3, r1
 80058a2:	42a0      	cmp	r0, r4
 80058a4:	d10b      	bne.n	80058be <_free_r+0x72>
 80058a6:	6820      	ldr	r0, [r4, #0]
 80058a8:	4401      	add	r1, r0
 80058aa:	1858      	adds	r0, r3, r1
 80058ac:	4282      	cmp	r2, r0
 80058ae:	6019      	str	r1, [r3, #0]
 80058b0:	d1de      	bne.n	8005870 <_free_r+0x24>
 80058b2:	6810      	ldr	r0, [r2, #0]
 80058b4:	6852      	ldr	r2, [r2, #4]
 80058b6:	4401      	add	r1, r0
 80058b8:	6019      	str	r1, [r3, #0]
 80058ba:	605a      	str	r2, [r3, #4]
 80058bc:	e7d8      	b.n	8005870 <_free_r+0x24>
 80058be:	d902      	bls.n	80058c6 <_free_r+0x7a>
 80058c0:	230c      	movs	r3, #12
 80058c2:	602b      	str	r3, [r5, #0]
 80058c4:	e7d4      	b.n	8005870 <_free_r+0x24>
 80058c6:	6820      	ldr	r0, [r4, #0]
 80058c8:	1821      	adds	r1, r4, r0
 80058ca:	428a      	cmp	r2, r1
 80058cc:	bf01      	itttt	eq
 80058ce:	6811      	ldreq	r1, [r2, #0]
 80058d0:	6852      	ldreq	r2, [r2, #4]
 80058d2:	1809      	addeq	r1, r1, r0
 80058d4:	6021      	streq	r1, [r4, #0]
 80058d6:	6062      	str	r2, [r4, #4]
 80058d8:	605c      	str	r4, [r3, #4]
 80058da:	e7c9      	b.n	8005870 <_free_r+0x24>
 80058dc:	bd38      	pop	{r3, r4, r5, pc}
 80058de:	bf00      	nop
 80058e0:	200000d0 	.word	0x200000d0

080058e4 <_malloc_r>:
 80058e4:	b570      	push	{r4, r5, r6, lr}
 80058e6:	1ccd      	adds	r5, r1, #3
 80058e8:	f025 0503 	bic.w	r5, r5, #3
 80058ec:	3508      	adds	r5, #8
 80058ee:	2d0c      	cmp	r5, #12
 80058f0:	bf38      	it	cc
 80058f2:	250c      	movcc	r5, #12
 80058f4:	2d00      	cmp	r5, #0
 80058f6:	4606      	mov	r6, r0
 80058f8:	db01      	blt.n	80058fe <_malloc_r+0x1a>
 80058fa:	42a9      	cmp	r1, r5
 80058fc:	d903      	bls.n	8005906 <_malloc_r+0x22>
 80058fe:	230c      	movs	r3, #12
 8005900:	6033      	str	r3, [r6, #0]
 8005902:	2000      	movs	r0, #0
 8005904:	bd70      	pop	{r4, r5, r6, pc}
 8005906:	f000 fbd9 	bl	80060bc <__malloc_lock>
 800590a:	4a23      	ldr	r2, [pc, #140]	; (8005998 <_malloc_r+0xb4>)
 800590c:	6814      	ldr	r4, [r2, #0]
 800590e:	4621      	mov	r1, r4
 8005910:	b991      	cbnz	r1, 8005938 <_malloc_r+0x54>
 8005912:	4c22      	ldr	r4, [pc, #136]	; (800599c <_malloc_r+0xb8>)
 8005914:	6823      	ldr	r3, [r4, #0]
 8005916:	b91b      	cbnz	r3, 8005920 <_malloc_r+0x3c>
 8005918:	4630      	mov	r0, r6
 800591a:	f000 fb17 	bl	8005f4c <_sbrk_r>
 800591e:	6020      	str	r0, [r4, #0]
 8005920:	4629      	mov	r1, r5
 8005922:	4630      	mov	r0, r6
 8005924:	f000 fb12 	bl	8005f4c <_sbrk_r>
 8005928:	1c43      	adds	r3, r0, #1
 800592a:	d126      	bne.n	800597a <_malloc_r+0x96>
 800592c:	230c      	movs	r3, #12
 800592e:	4630      	mov	r0, r6
 8005930:	6033      	str	r3, [r6, #0]
 8005932:	f000 fbc4 	bl	80060be <__malloc_unlock>
 8005936:	e7e4      	b.n	8005902 <_malloc_r+0x1e>
 8005938:	680b      	ldr	r3, [r1, #0]
 800593a:	1b5b      	subs	r3, r3, r5
 800593c:	d41a      	bmi.n	8005974 <_malloc_r+0x90>
 800593e:	2b0b      	cmp	r3, #11
 8005940:	d90f      	bls.n	8005962 <_malloc_r+0x7e>
 8005942:	600b      	str	r3, [r1, #0]
 8005944:	18cc      	adds	r4, r1, r3
 8005946:	50cd      	str	r5, [r1, r3]
 8005948:	4630      	mov	r0, r6
 800594a:	f000 fbb8 	bl	80060be <__malloc_unlock>
 800594e:	f104 000b 	add.w	r0, r4, #11
 8005952:	1d23      	adds	r3, r4, #4
 8005954:	f020 0007 	bic.w	r0, r0, #7
 8005958:	1ac3      	subs	r3, r0, r3
 800595a:	d01b      	beq.n	8005994 <_malloc_r+0xb0>
 800595c:	425a      	negs	r2, r3
 800595e:	50e2      	str	r2, [r4, r3]
 8005960:	bd70      	pop	{r4, r5, r6, pc}
 8005962:	428c      	cmp	r4, r1
 8005964:	bf0b      	itete	eq
 8005966:	6863      	ldreq	r3, [r4, #4]
 8005968:	684b      	ldrne	r3, [r1, #4]
 800596a:	6013      	streq	r3, [r2, #0]
 800596c:	6063      	strne	r3, [r4, #4]
 800596e:	bf18      	it	ne
 8005970:	460c      	movne	r4, r1
 8005972:	e7e9      	b.n	8005948 <_malloc_r+0x64>
 8005974:	460c      	mov	r4, r1
 8005976:	6849      	ldr	r1, [r1, #4]
 8005978:	e7ca      	b.n	8005910 <_malloc_r+0x2c>
 800597a:	1cc4      	adds	r4, r0, #3
 800597c:	f024 0403 	bic.w	r4, r4, #3
 8005980:	42a0      	cmp	r0, r4
 8005982:	d005      	beq.n	8005990 <_malloc_r+0xac>
 8005984:	1a21      	subs	r1, r4, r0
 8005986:	4630      	mov	r0, r6
 8005988:	f000 fae0 	bl	8005f4c <_sbrk_r>
 800598c:	3001      	adds	r0, #1
 800598e:	d0cd      	beq.n	800592c <_malloc_r+0x48>
 8005990:	6025      	str	r5, [r4, #0]
 8005992:	e7d9      	b.n	8005948 <_malloc_r+0x64>
 8005994:	bd70      	pop	{r4, r5, r6, pc}
 8005996:	bf00      	nop
 8005998:	200000d0 	.word	0x200000d0
 800599c:	200000d4 	.word	0x200000d4

080059a0 <__sfputc_r>:
 80059a0:	6893      	ldr	r3, [r2, #8]
 80059a2:	b410      	push	{r4}
 80059a4:	3b01      	subs	r3, #1
 80059a6:	2b00      	cmp	r3, #0
 80059a8:	6093      	str	r3, [r2, #8]
 80059aa:	da08      	bge.n	80059be <__sfputc_r+0x1e>
 80059ac:	6994      	ldr	r4, [r2, #24]
 80059ae:	42a3      	cmp	r3, r4
 80059b0:	db02      	blt.n	80059b8 <__sfputc_r+0x18>
 80059b2:	b2cb      	uxtb	r3, r1
 80059b4:	2b0a      	cmp	r3, #10
 80059b6:	d102      	bne.n	80059be <__sfputc_r+0x1e>
 80059b8:	bc10      	pop	{r4}
 80059ba:	f7ff bc9f 	b.w	80052fc <__swbuf_r>
 80059be:	6813      	ldr	r3, [r2, #0]
 80059c0:	1c58      	adds	r0, r3, #1
 80059c2:	6010      	str	r0, [r2, #0]
 80059c4:	7019      	strb	r1, [r3, #0]
 80059c6:	b2c8      	uxtb	r0, r1
 80059c8:	bc10      	pop	{r4}
 80059ca:	4770      	bx	lr

080059cc <__sfputs_r>:
 80059cc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80059ce:	4606      	mov	r6, r0
 80059d0:	460f      	mov	r7, r1
 80059d2:	4614      	mov	r4, r2
 80059d4:	18d5      	adds	r5, r2, r3
 80059d6:	42ac      	cmp	r4, r5
 80059d8:	d101      	bne.n	80059de <__sfputs_r+0x12>
 80059da:	2000      	movs	r0, #0
 80059dc:	e007      	b.n	80059ee <__sfputs_r+0x22>
 80059de:	463a      	mov	r2, r7
 80059e0:	f814 1b01 	ldrb.w	r1, [r4], #1
 80059e4:	4630      	mov	r0, r6
 80059e6:	f7ff ffdb 	bl	80059a0 <__sfputc_r>
 80059ea:	1c43      	adds	r3, r0, #1
 80059ec:	d1f3      	bne.n	80059d6 <__sfputs_r+0xa>
 80059ee:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

080059f0 <_vfiprintf_r>:
 80059f0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80059f4:	b09d      	sub	sp, #116	; 0x74
 80059f6:	460c      	mov	r4, r1
 80059f8:	4617      	mov	r7, r2
 80059fa:	9303      	str	r3, [sp, #12]
 80059fc:	4606      	mov	r6, r0
 80059fe:	b118      	cbz	r0, 8005a08 <_vfiprintf_r+0x18>
 8005a00:	6983      	ldr	r3, [r0, #24]
 8005a02:	b90b      	cbnz	r3, 8005a08 <_vfiprintf_r+0x18>
 8005a04:	f7ff fe2c 	bl	8005660 <__sinit>
 8005a08:	4b7c      	ldr	r3, [pc, #496]	; (8005bfc <_vfiprintf_r+0x20c>)
 8005a0a:	429c      	cmp	r4, r3
 8005a0c:	d157      	bne.n	8005abe <_vfiprintf_r+0xce>
 8005a0e:	6874      	ldr	r4, [r6, #4]
 8005a10:	89a3      	ldrh	r3, [r4, #12]
 8005a12:	0718      	lsls	r0, r3, #28
 8005a14:	d55d      	bpl.n	8005ad2 <_vfiprintf_r+0xe2>
 8005a16:	6923      	ldr	r3, [r4, #16]
 8005a18:	2b00      	cmp	r3, #0
 8005a1a:	d05a      	beq.n	8005ad2 <_vfiprintf_r+0xe2>
 8005a1c:	2300      	movs	r3, #0
 8005a1e:	9309      	str	r3, [sp, #36]	; 0x24
 8005a20:	2320      	movs	r3, #32
 8005a22:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 8005a26:	2330      	movs	r3, #48	; 0x30
 8005a28:	f04f 0b01 	mov.w	fp, #1
 8005a2c:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 8005a30:	46b8      	mov	r8, r7
 8005a32:	4645      	mov	r5, r8
 8005a34:	f815 3b01 	ldrb.w	r3, [r5], #1
 8005a38:	2b00      	cmp	r3, #0
 8005a3a:	d155      	bne.n	8005ae8 <_vfiprintf_r+0xf8>
 8005a3c:	ebb8 0a07 	subs.w	sl, r8, r7
 8005a40:	d00b      	beq.n	8005a5a <_vfiprintf_r+0x6a>
 8005a42:	4653      	mov	r3, sl
 8005a44:	463a      	mov	r2, r7
 8005a46:	4621      	mov	r1, r4
 8005a48:	4630      	mov	r0, r6
 8005a4a:	f7ff ffbf 	bl	80059cc <__sfputs_r>
 8005a4e:	3001      	adds	r0, #1
 8005a50:	f000 80c4 	beq.w	8005bdc <_vfiprintf_r+0x1ec>
 8005a54:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8005a56:	4453      	add	r3, sl
 8005a58:	9309      	str	r3, [sp, #36]	; 0x24
 8005a5a:	f898 3000 	ldrb.w	r3, [r8]
 8005a5e:	2b00      	cmp	r3, #0
 8005a60:	f000 80bc 	beq.w	8005bdc <_vfiprintf_r+0x1ec>
 8005a64:	2300      	movs	r3, #0
 8005a66:	f04f 32ff 	mov.w	r2, #4294967295
 8005a6a:	9304      	str	r3, [sp, #16]
 8005a6c:	9307      	str	r3, [sp, #28]
 8005a6e:	9205      	str	r2, [sp, #20]
 8005a70:	9306      	str	r3, [sp, #24]
 8005a72:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 8005a76:	931a      	str	r3, [sp, #104]	; 0x68
 8005a78:	2205      	movs	r2, #5
 8005a7a:	7829      	ldrb	r1, [r5, #0]
 8005a7c:	4860      	ldr	r0, [pc, #384]	; (8005c00 <_vfiprintf_r+0x210>)
 8005a7e:	f000 fb0f 	bl	80060a0 <memchr>
 8005a82:	f105 0801 	add.w	r8, r5, #1
 8005a86:	9b04      	ldr	r3, [sp, #16]
 8005a88:	2800      	cmp	r0, #0
 8005a8a:	d131      	bne.n	8005af0 <_vfiprintf_r+0x100>
 8005a8c:	06d9      	lsls	r1, r3, #27
 8005a8e:	bf44      	itt	mi
 8005a90:	2220      	movmi	r2, #32
 8005a92:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8005a96:	071a      	lsls	r2, r3, #28
 8005a98:	bf44      	itt	mi
 8005a9a:	222b      	movmi	r2, #43	; 0x2b
 8005a9c:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8005aa0:	782a      	ldrb	r2, [r5, #0]
 8005aa2:	2a2a      	cmp	r2, #42	; 0x2a
 8005aa4:	d02c      	beq.n	8005b00 <_vfiprintf_r+0x110>
 8005aa6:	2100      	movs	r1, #0
 8005aa8:	200a      	movs	r0, #10
 8005aaa:	9a07      	ldr	r2, [sp, #28]
 8005aac:	46a8      	mov	r8, r5
 8005aae:	f898 3000 	ldrb.w	r3, [r8]
 8005ab2:	3501      	adds	r5, #1
 8005ab4:	3b30      	subs	r3, #48	; 0x30
 8005ab6:	2b09      	cmp	r3, #9
 8005ab8:	d96d      	bls.n	8005b96 <_vfiprintf_r+0x1a6>
 8005aba:	b371      	cbz	r1, 8005b1a <_vfiprintf_r+0x12a>
 8005abc:	e026      	b.n	8005b0c <_vfiprintf_r+0x11c>
 8005abe:	4b51      	ldr	r3, [pc, #324]	; (8005c04 <_vfiprintf_r+0x214>)
 8005ac0:	429c      	cmp	r4, r3
 8005ac2:	d101      	bne.n	8005ac8 <_vfiprintf_r+0xd8>
 8005ac4:	68b4      	ldr	r4, [r6, #8]
 8005ac6:	e7a3      	b.n	8005a10 <_vfiprintf_r+0x20>
 8005ac8:	4b4f      	ldr	r3, [pc, #316]	; (8005c08 <_vfiprintf_r+0x218>)
 8005aca:	429c      	cmp	r4, r3
 8005acc:	bf08      	it	eq
 8005ace:	68f4      	ldreq	r4, [r6, #12]
 8005ad0:	e79e      	b.n	8005a10 <_vfiprintf_r+0x20>
 8005ad2:	4621      	mov	r1, r4
 8005ad4:	4630      	mov	r0, r6
 8005ad6:	f7ff fc63 	bl	80053a0 <__swsetup_r>
 8005ada:	2800      	cmp	r0, #0
 8005adc:	d09e      	beq.n	8005a1c <_vfiprintf_r+0x2c>
 8005ade:	f04f 30ff 	mov.w	r0, #4294967295
 8005ae2:	b01d      	add	sp, #116	; 0x74
 8005ae4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8005ae8:	2b25      	cmp	r3, #37	; 0x25
 8005aea:	d0a7      	beq.n	8005a3c <_vfiprintf_r+0x4c>
 8005aec:	46a8      	mov	r8, r5
 8005aee:	e7a0      	b.n	8005a32 <_vfiprintf_r+0x42>
 8005af0:	4a43      	ldr	r2, [pc, #268]	; (8005c00 <_vfiprintf_r+0x210>)
 8005af2:	4645      	mov	r5, r8
 8005af4:	1a80      	subs	r0, r0, r2
 8005af6:	fa0b f000 	lsl.w	r0, fp, r0
 8005afa:	4318      	orrs	r0, r3
 8005afc:	9004      	str	r0, [sp, #16]
 8005afe:	e7bb      	b.n	8005a78 <_vfiprintf_r+0x88>
 8005b00:	9a03      	ldr	r2, [sp, #12]
 8005b02:	1d11      	adds	r1, r2, #4
 8005b04:	6812      	ldr	r2, [r2, #0]
 8005b06:	9103      	str	r1, [sp, #12]
 8005b08:	2a00      	cmp	r2, #0
 8005b0a:	db01      	blt.n	8005b10 <_vfiprintf_r+0x120>
 8005b0c:	9207      	str	r2, [sp, #28]
 8005b0e:	e004      	b.n	8005b1a <_vfiprintf_r+0x12a>
 8005b10:	4252      	negs	r2, r2
 8005b12:	f043 0302 	orr.w	r3, r3, #2
 8005b16:	9207      	str	r2, [sp, #28]
 8005b18:	9304      	str	r3, [sp, #16]
 8005b1a:	f898 3000 	ldrb.w	r3, [r8]
 8005b1e:	2b2e      	cmp	r3, #46	; 0x2e
 8005b20:	d110      	bne.n	8005b44 <_vfiprintf_r+0x154>
 8005b22:	f898 3001 	ldrb.w	r3, [r8, #1]
 8005b26:	f108 0101 	add.w	r1, r8, #1
 8005b2a:	2b2a      	cmp	r3, #42	; 0x2a
 8005b2c:	d137      	bne.n	8005b9e <_vfiprintf_r+0x1ae>
 8005b2e:	9b03      	ldr	r3, [sp, #12]
 8005b30:	f108 0802 	add.w	r8, r8, #2
 8005b34:	1d1a      	adds	r2, r3, #4
 8005b36:	681b      	ldr	r3, [r3, #0]
 8005b38:	9203      	str	r2, [sp, #12]
 8005b3a:	2b00      	cmp	r3, #0
 8005b3c:	bfb8      	it	lt
 8005b3e:	f04f 33ff 	movlt.w	r3, #4294967295
 8005b42:	9305      	str	r3, [sp, #20]
 8005b44:	4d31      	ldr	r5, [pc, #196]	; (8005c0c <_vfiprintf_r+0x21c>)
 8005b46:	2203      	movs	r2, #3
 8005b48:	f898 1000 	ldrb.w	r1, [r8]
 8005b4c:	4628      	mov	r0, r5
 8005b4e:	f000 faa7 	bl	80060a0 <memchr>
 8005b52:	b140      	cbz	r0, 8005b66 <_vfiprintf_r+0x176>
 8005b54:	2340      	movs	r3, #64	; 0x40
 8005b56:	1b40      	subs	r0, r0, r5
 8005b58:	fa03 f000 	lsl.w	r0, r3, r0
 8005b5c:	9b04      	ldr	r3, [sp, #16]
 8005b5e:	f108 0801 	add.w	r8, r8, #1
 8005b62:	4303      	orrs	r3, r0
 8005b64:	9304      	str	r3, [sp, #16]
 8005b66:	f898 1000 	ldrb.w	r1, [r8]
 8005b6a:	2206      	movs	r2, #6
 8005b6c:	4828      	ldr	r0, [pc, #160]	; (8005c10 <_vfiprintf_r+0x220>)
 8005b6e:	f108 0701 	add.w	r7, r8, #1
 8005b72:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 8005b76:	f000 fa93 	bl	80060a0 <memchr>
 8005b7a:	2800      	cmp	r0, #0
 8005b7c:	d034      	beq.n	8005be8 <_vfiprintf_r+0x1f8>
 8005b7e:	4b25      	ldr	r3, [pc, #148]	; (8005c14 <_vfiprintf_r+0x224>)
 8005b80:	bb03      	cbnz	r3, 8005bc4 <_vfiprintf_r+0x1d4>
 8005b82:	9b03      	ldr	r3, [sp, #12]
 8005b84:	3307      	adds	r3, #7
 8005b86:	f023 0307 	bic.w	r3, r3, #7
 8005b8a:	3308      	adds	r3, #8
 8005b8c:	9303      	str	r3, [sp, #12]
 8005b8e:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8005b90:	444b      	add	r3, r9
 8005b92:	9309      	str	r3, [sp, #36]	; 0x24
 8005b94:	e74c      	b.n	8005a30 <_vfiprintf_r+0x40>
 8005b96:	fb00 3202 	mla	r2, r0, r2, r3
 8005b9a:	2101      	movs	r1, #1
 8005b9c:	e786      	b.n	8005aac <_vfiprintf_r+0xbc>
 8005b9e:	2300      	movs	r3, #0
 8005ba0:	250a      	movs	r5, #10
 8005ba2:	4618      	mov	r0, r3
 8005ba4:	9305      	str	r3, [sp, #20]
 8005ba6:	4688      	mov	r8, r1
 8005ba8:	f898 2000 	ldrb.w	r2, [r8]
 8005bac:	3101      	adds	r1, #1
 8005bae:	3a30      	subs	r2, #48	; 0x30
 8005bb0:	2a09      	cmp	r2, #9
 8005bb2:	d903      	bls.n	8005bbc <_vfiprintf_r+0x1cc>
 8005bb4:	2b00      	cmp	r3, #0
 8005bb6:	d0c5      	beq.n	8005b44 <_vfiprintf_r+0x154>
 8005bb8:	9005      	str	r0, [sp, #20]
 8005bba:	e7c3      	b.n	8005b44 <_vfiprintf_r+0x154>
 8005bbc:	fb05 2000 	mla	r0, r5, r0, r2
 8005bc0:	2301      	movs	r3, #1
 8005bc2:	e7f0      	b.n	8005ba6 <_vfiprintf_r+0x1b6>
 8005bc4:	ab03      	add	r3, sp, #12
 8005bc6:	9300      	str	r3, [sp, #0]
 8005bc8:	4622      	mov	r2, r4
 8005bca:	4b13      	ldr	r3, [pc, #76]	; (8005c18 <_vfiprintf_r+0x228>)
 8005bcc:	a904      	add	r1, sp, #16
 8005bce:	4630      	mov	r0, r6
 8005bd0:	f3af 8000 	nop.w
 8005bd4:	f1b0 3fff 	cmp.w	r0, #4294967295
 8005bd8:	4681      	mov	r9, r0
 8005bda:	d1d8      	bne.n	8005b8e <_vfiprintf_r+0x19e>
 8005bdc:	89a3      	ldrh	r3, [r4, #12]
 8005bde:	065b      	lsls	r3, r3, #25
 8005be0:	f53f af7d 	bmi.w	8005ade <_vfiprintf_r+0xee>
 8005be4:	9809      	ldr	r0, [sp, #36]	; 0x24
 8005be6:	e77c      	b.n	8005ae2 <_vfiprintf_r+0xf2>
 8005be8:	ab03      	add	r3, sp, #12
 8005bea:	9300      	str	r3, [sp, #0]
 8005bec:	4622      	mov	r2, r4
 8005bee:	4b0a      	ldr	r3, [pc, #40]	; (8005c18 <_vfiprintf_r+0x228>)
 8005bf0:	a904      	add	r1, sp, #16
 8005bf2:	4630      	mov	r0, r6
 8005bf4:	f000 f88a 	bl	8005d0c <_printf_i>
 8005bf8:	e7ec      	b.n	8005bd4 <_vfiprintf_r+0x1e4>
 8005bfa:	bf00      	nop
 8005bfc:	080062d4 	.word	0x080062d4
 8005c00:	08006314 	.word	0x08006314
 8005c04:	080062f4 	.word	0x080062f4
 8005c08:	080062b4 	.word	0x080062b4
 8005c0c:	0800631a 	.word	0x0800631a
 8005c10:	0800631e 	.word	0x0800631e
 8005c14:	00000000 	.word	0x00000000
 8005c18:	080059cd 	.word	0x080059cd

08005c1c <_printf_common>:
 8005c1c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8005c20:	4691      	mov	r9, r2
 8005c22:	461f      	mov	r7, r3
 8005c24:	688a      	ldr	r2, [r1, #8]
 8005c26:	690b      	ldr	r3, [r1, #16]
 8005c28:	4606      	mov	r6, r0
 8005c2a:	4293      	cmp	r3, r2
 8005c2c:	bfb8      	it	lt
 8005c2e:	4613      	movlt	r3, r2
 8005c30:	f8c9 3000 	str.w	r3, [r9]
 8005c34:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 8005c38:	460c      	mov	r4, r1
 8005c3a:	f8dd 8020 	ldr.w	r8, [sp, #32]
 8005c3e:	b112      	cbz	r2, 8005c46 <_printf_common+0x2a>
 8005c40:	3301      	adds	r3, #1
 8005c42:	f8c9 3000 	str.w	r3, [r9]
 8005c46:	6823      	ldr	r3, [r4, #0]
 8005c48:	0699      	lsls	r1, r3, #26
 8005c4a:	bf42      	ittt	mi
 8005c4c:	f8d9 3000 	ldrmi.w	r3, [r9]
 8005c50:	3302      	addmi	r3, #2
 8005c52:	f8c9 3000 	strmi.w	r3, [r9]
 8005c56:	6825      	ldr	r5, [r4, #0]
 8005c58:	f015 0506 	ands.w	r5, r5, #6
 8005c5c:	d107      	bne.n	8005c6e <_printf_common+0x52>
 8005c5e:	f104 0a19 	add.w	sl, r4, #25
 8005c62:	68e3      	ldr	r3, [r4, #12]
 8005c64:	f8d9 2000 	ldr.w	r2, [r9]
 8005c68:	1a9b      	subs	r3, r3, r2
 8005c6a:	429d      	cmp	r5, r3
 8005c6c:	db2a      	blt.n	8005cc4 <_printf_common+0xa8>
 8005c6e:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 8005c72:	6822      	ldr	r2, [r4, #0]
 8005c74:	3300      	adds	r3, #0
 8005c76:	bf18      	it	ne
 8005c78:	2301      	movne	r3, #1
 8005c7a:	0692      	lsls	r2, r2, #26
 8005c7c:	d42f      	bmi.n	8005cde <_printf_common+0xc2>
 8005c7e:	f104 0243 	add.w	r2, r4, #67	; 0x43
 8005c82:	4639      	mov	r1, r7
 8005c84:	4630      	mov	r0, r6
 8005c86:	47c0      	blx	r8
 8005c88:	3001      	adds	r0, #1
 8005c8a:	d022      	beq.n	8005cd2 <_printf_common+0xb6>
 8005c8c:	6823      	ldr	r3, [r4, #0]
 8005c8e:	68e5      	ldr	r5, [r4, #12]
 8005c90:	f003 0306 	and.w	r3, r3, #6
 8005c94:	2b04      	cmp	r3, #4
 8005c96:	bf18      	it	ne
 8005c98:	2500      	movne	r5, #0
 8005c9a:	f8d9 2000 	ldr.w	r2, [r9]
 8005c9e:	f04f 0900 	mov.w	r9, #0
 8005ca2:	bf08      	it	eq
 8005ca4:	1aad      	subeq	r5, r5, r2
 8005ca6:	68a3      	ldr	r3, [r4, #8]
 8005ca8:	6922      	ldr	r2, [r4, #16]
 8005caa:	bf08      	it	eq
 8005cac:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8005cb0:	4293      	cmp	r3, r2
 8005cb2:	bfc4      	itt	gt
 8005cb4:	1a9b      	subgt	r3, r3, r2
 8005cb6:	18ed      	addgt	r5, r5, r3
 8005cb8:	341a      	adds	r4, #26
 8005cba:	454d      	cmp	r5, r9
 8005cbc:	d11b      	bne.n	8005cf6 <_printf_common+0xda>
 8005cbe:	2000      	movs	r0, #0
 8005cc0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8005cc4:	2301      	movs	r3, #1
 8005cc6:	4652      	mov	r2, sl
 8005cc8:	4639      	mov	r1, r7
 8005cca:	4630      	mov	r0, r6
 8005ccc:	47c0      	blx	r8
 8005cce:	3001      	adds	r0, #1
 8005cd0:	d103      	bne.n	8005cda <_printf_common+0xbe>
 8005cd2:	f04f 30ff 	mov.w	r0, #4294967295
 8005cd6:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8005cda:	3501      	adds	r5, #1
 8005cdc:	e7c1      	b.n	8005c62 <_printf_common+0x46>
 8005cde:	2030      	movs	r0, #48	; 0x30
 8005ce0:	18e1      	adds	r1, r4, r3
 8005ce2:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 8005ce6:	1c5a      	adds	r2, r3, #1
 8005ce8:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 8005cec:	4422      	add	r2, r4
 8005cee:	3302      	adds	r3, #2
 8005cf0:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 8005cf4:	e7c3      	b.n	8005c7e <_printf_common+0x62>
 8005cf6:	2301      	movs	r3, #1
 8005cf8:	4622      	mov	r2, r4
 8005cfa:	4639      	mov	r1, r7
 8005cfc:	4630      	mov	r0, r6
 8005cfe:	47c0      	blx	r8
 8005d00:	3001      	adds	r0, #1
 8005d02:	d0e6      	beq.n	8005cd2 <_printf_common+0xb6>
 8005d04:	f109 0901 	add.w	r9, r9, #1
 8005d08:	e7d7      	b.n	8005cba <_printf_common+0x9e>
	...

08005d0c <_printf_i>:
 8005d0c:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 8005d10:	4617      	mov	r7, r2
 8005d12:	7e0a      	ldrb	r2, [r1, #24]
 8005d14:	b085      	sub	sp, #20
 8005d16:	2a6e      	cmp	r2, #110	; 0x6e
 8005d18:	4698      	mov	r8, r3
 8005d1a:	4606      	mov	r6, r0
 8005d1c:	460c      	mov	r4, r1
 8005d1e:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 8005d20:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 8005d24:	f000 80bc 	beq.w	8005ea0 <_printf_i+0x194>
 8005d28:	d81a      	bhi.n	8005d60 <_printf_i+0x54>
 8005d2a:	2a63      	cmp	r2, #99	; 0x63
 8005d2c:	d02e      	beq.n	8005d8c <_printf_i+0x80>
 8005d2e:	d80a      	bhi.n	8005d46 <_printf_i+0x3a>
 8005d30:	2a00      	cmp	r2, #0
 8005d32:	f000 80c8 	beq.w	8005ec6 <_printf_i+0x1ba>
 8005d36:	2a58      	cmp	r2, #88	; 0x58
 8005d38:	f000 808a 	beq.w	8005e50 <_printf_i+0x144>
 8005d3c:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8005d40:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 8005d44:	e02a      	b.n	8005d9c <_printf_i+0x90>
 8005d46:	2a64      	cmp	r2, #100	; 0x64
 8005d48:	d001      	beq.n	8005d4e <_printf_i+0x42>
 8005d4a:	2a69      	cmp	r2, #105	; 0x69
 8005d4c:	d1f6      	bne.n	8005d3c <_printf_i+0x30>
 8005d4e:	6821      	ldr	r1, [r4, #0]
 8005d50:	681a      	ldr	r2, [r3, #0]
 8005d52:	f011 0f80 	tst.w	r1, #128	; 0x80
 8005d56:	d023      	beq.n	8005da0 <_printf_i+0x94>
 8005d58:	1d11      	adds	r1, r2, #4
 8005d5a:	6019      	str	r1, [r3, #0]
 8005d5c:	6813      	ldr	r3, [r2, #0]
 8005d5e:	e027      	b.n	8005db0 <_printf_i+0xa4>
 8005d60:	2a73      	cmp	r2, #115	; 0x73
 8005d62:	f000 80b4 	beq.w	8005ece <_printf_i+0x1c2>
 8005d66:	d808      	bhi.n	8005d7a <_printf_i+0x6e>
 8005d68:	2a6f      	cmp	r2, #111	; 0x6f
 8005d6a:	d02a      	beq.n	8005dc2 <_printf_i+0xb6>
 8005d6c:	2a70      	cmp	r2, #112	; 0x70
 8005d6e:	d1e5      	bne.n	8005d3c <_printf_i+0x30>
 8005d70:	680a      	ldr	r2, [r1, #0]
 8005d72:	f042 0220 	orr.w	r2, r2, #32
 8005d76:	600a      	str	r2, [r1, #0]
 8005d78:	e003      	b.n	8005d82 <_printf_i+0x76>
 8005d7a:	2a75      	cmp	r2, #117	; 0x75
 8005d7c:	d021      	beq.n	8005dc2 <_printf_i+0xb6>
 8005d7e:	2a78      	cmp	r2, #120	; 0x78
 8005d80:	d1dc      	bne.n	8005d3c <_printf_i+0x30>
 8005d82:	2278      	movs	r2, #120	; 0x78
 8005d84:	496f      	ldr	r1, [pc, #444]	; (8005f44 <_printf_i+0x238>)
 8005d86:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8005d8a:	e064      	b.n	8005e56 <_printf_i+0x14a>
 8005d8c:	681a      	ldr	r2, [r3, #0]
 8005d8e:	f101 0542 	add.w	r5, r1, #66	; 0x42
 8005d92:	1d11      	adds	r1, r2, #4
 8005d94:	6019      	str	r1, [r3, #0]
 8005d96:	6813      	ldr	r3, [r2, #0]
 8005d98:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8005d9c:	2301      	movs	r3, #1
 8005d9e:	e0a3      	b.n	8005ee8 <_printf_i+0x1dc>
 8005da0:	f011 0f40 	tst.w	r1, #64	; 0x40
 8005da4:	f102 0104 	add.w	r1, r2, #4
 8005da8:	6019      	str	r1, [r3, #0]
 8005daa:	d0d7      	beq.n	8005d5c <_printf_i+0x50>
 8005dac:	f9b2 3000 	ldrsh.w	r3, [r2]
 8005db0:	2b00      	cmp	r3, #0
 8005db2:	da03      	bge.n	8005dbc <_printf_i+0xb0>
 8005db4:	222d      	movs	r2, #45	; 0x2d
 8005db6:	425b      	negs	r3, r3
 8005db8:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8005dbc:	4962      	ldr	r1, [pc, #392]	; (8005f48 <_printf_i+0x23c>)
 8005dbe:	220a      	movs	r2, #10
 8005dc0:	e017      	b.n	8005df2 <_printf_i+0xe6>
 8005dc2:	6820      	ldr	r0, [r4, #0]
 8005dc4:	6819      	ldr	r1, [r3, #0]
 8005dc6:	f010 0f80 	tst.w	r0, #128	; 0x80
 8005dca:	d003      	beq.n	8005dd4 <_printf_i+0xc8>
 8005dcc:	1d08      	adds	r0, r1, #4
 8005dce:	6018      	str	r0, [r3, #0]
 8005dd0:	680b      	ldr	r3, [r1, #0]
 8005dd2:	e006      	b.n	8005de2 <_printf_i+0xd6>
 8005dd4:	f010 0f40 	tst.w	r0, #64	; 0x40
 8005dd8:	f101 0004 	add.w	r0, r1, #4
 8005ddc:	6018      	str	r0, [r3, #0]
 8005dde:	d0f7      	beq.n	8005dd0 <_printf_i+0xc4>
 8005de0:	880b      	ldrh	r3, [r1, #0]
 8005de2:	2a6f      	cmp	r2, #111	; 0x6f
 8005de4:	bf14      	ite	ne
 8005de6:	220a      	movne	r2, #10
 8005de8:	2208      	moveq	r2, #8
 8005dea:	4957      	ldr	r1, [pc, #348]	; (8005f48 <_printf_i+0x23c>)
 8005dec:	2000      	movs	r0, #0
 8005dee:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 8005df2:	6865      	ldr	r5, [r4, #4]
 8005df4:	2d00      	cmp	r5, #0
 8005df6:	60a5      	str	r5, [r4, #8]
 8005df8:	f2c0 809c 	blt.w	8005f34 <_printf_i+0x228>
 8005dfc:	6820      	ldr	r0, [r4, #0]
 8005dfe:	f020 0004 	bic.w	r0, r0, #4
 8005e02:	6020      	str	r0, [r4, #0]
 8005e04:	2b00      	cmp	r3, #0
 8005e06:	d13f      	bne.n	8005e88 <_printf_i+0x17c>
 8005e08:	2d00      	cmp	r5, #0
 8005e0a:	f040 8095 	bne.w	8005f38 <_printf_i+0x22c>
 8005e0e:	4675      	mov	r5, lr
 8005e10:	2a08      	cmp	r2, #8
 8005e12:	d10b      	bne.n	8005e2c <_printf_i+0x120>
 8005e14:	6823      	ldr	r3, [r4, #0]
 8005e16:	07da      	lsls	r2, r3, #31
 8005e18:	d508      	bpl.n	8005e2c <_printf_i+0x120>
 8005e1a:	6923      	ldr	r3, [r4, #16]
 8005e1c:	6862      	ldr	r2, [r4, #4]
 8005e1e:	429a      	cmp	r2, r3
 8005e20:	bfde      	ittt	le
 8005e22:	2330      	movle	r3, #48	; 0x30
 8005e24:	f805 3c01 	strble.w	r3, [r5, #-1]
 8005e28:	f105 35ff 	addle.w	r5, r5, #4294967295
 8005e2c:	ebae 0305 	sub.w	r3, lr, r5
 8005e30:	6123      	str	r3, [r4, #16]
 8005e32:	f8cd 8000 	str.w	r8, [sp]
 8005e36:	463b      	mov	r3, r7
 8005e38:	aa03      	add	r2, sp, #12
 8005e3a:	4621      	mov	r1, r4
 8005e3c:	4630      	mov	r0, r6
 8005e3e:	f7ff feed 	bl	8005c1c <_printf_common>
 8005e42:	3001      	adds	r0, #1
 8005e44:	d155      	bne.n	8005ef2 <_printf_i+0x1e6>
 8005e46:	f04f 30ff 	mov.w	r0, #4294967295
 8005e4a:	b005      	add	sp, #20
 8005e4c:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8005e50:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8005e54:	493c      	ldr	r1, [pc, #240]	; (8005f48 <_printf_i+0x23c>)
 8005e56:	6822      	ldr	r2, [r4, #0]
 8005e58:	6818      	ldr	r0, [r3, #0]
 8005e5a:	f012 0f80 	tst.w	r2, #128	; 0x80
 8005e5e:	f100 0504 	add.w	r5, r0, #4
 8005e62:	601d      	str	r5, [r3, #0]
 8005e64:	d001      	beq.n	8005e6a <_printf_i+0x15e>
 8005e66:	6803      	ldr	r3, [r0, #0]
 8005e68:	e002      	b.n	8005e70 <_printf_i+0x164>
 8005e6a:	0655      	lsls	r5, r2, #25
 8005e6c:	d5fb      	bpl.n	8005e66 <_printf_i+0x15a>
 8005e6e:	8803      	ldrh	r3, [r0, #0]
 8005e70:	07d0      	lsls	r0, r2, #31
 8005e72:	bf44      	itt	mi
 8005e74:	f042 0220 	orrmi.w	r2, r2, #32
 8005e78:	6022      	strmi	r2, [r4, #0]
 8005e7a:	b91b      	cbnz	r3, 8005e84 <_printf_i+0x178>
 8005e7c:	6822      	ldr	r2, [r4, #0]
 8005e7e:	f022 0220 	bic.w	r2, r2, #32
 8005e82:	6022      	str	r2, [r4, #0]
 8005e84:	2210      	movs	r2, #16
 8005e86:	e7b1      	b.n	8005dec <_printf_i+0xe0>
 8005e88:	4675      	mov	r5, lr
 8005e8a:	fbb3 f0f2 	udiv	r0, r3, r2
 8005e8e:	fb02 3310 	mls	r3, r2, r0, r3
 8005e92:	5ccb      	ldrb	r3, [r1, r3]
 8005e94:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8005e98:	4603      	mov	r3, r0
 8005e9a:	2800      	cmp	r0, #0
 8005e9c:	d1f5      	bne.n	8005e8a <_printf_i+0x17e>
 8005e9e:	e7b7      	b.n	8005e10 <_printf_i+0x104>
 8005ea0:	6808      	ldr	r0, [r1, #0]
 8005ea2:	681a      	ldr	r2, [r3, #0]
 8005ea4:	f010 0f80 	tst.w	r0, #128	; 0x80
 8005ea8:	6949      	ldr	r1, [r1, #20]
 8005eaa:	d004      	beq.n	8005eb6 <_printf_i+0x1aa>
 8005eac:	1d10      	adds	r0, r2, #4
 8005eae:	6018      	str	r0, [r3, #0]
 8005eb0:	6813      	ldr	r3, [r2, #0]
 8005eb2:	6019      	str	r1, [r3, #0]
 8005eb4:	e007      	b.n	8005ec6 <_printf_i+0x1ba>
 8005eb6:	f010 0f40 	tst.w	r0, #64	; 0x40
 8005eba:	f102 0004 	add.w	r0, r2, #4
 8005ebe:	6018      	str	r0, [r3, #0]
 8005ec0:	6813      	ldr	r3, [r2, #0]
 8005ec2:	d0f6      	beq.n	8005eb2 <_printf_i+0x1a6>
 8005ec4:	8019      	strh	r1, [r3, #0]
 8005ec6:	2300      	movs	r3, #0
 8005ec8:	4675      	mov	r5, lr
 8005eca:	6123      	str	r3, [r4, #16]
 8005ecc:	e7b1      	b.n	8005e32 <_printf_i+0x126>
 8005ece:	681a      	ldr	r2, [r3, #0]
 8005ed0:	1d11      	adds	r1, r2, #4
 8005ed2:	6019      	str	r1, [r3, #0]
 8005ed4:	6815      	ldr	r5, [r2, #0]
 8005ed6:	2100      	movs	r1, #0
 8005ed8:	6862      	ldr	r2, [r4, #4]
 8005eda:	4628      	mov	r0, r5
 8005edc:	f000 f8e0 	bl	80060a0 <memchr>
 8005ee0:	b108      	cbz	r0, 8005ee6 <_printf_i+0x1da>
 8005ee2:	1b40      	subs	r0, r0, r5
 8005ee4:	6060      	str	r0, [r4, #4]
 8005ee6:	6863      	ldr	r3, [r4, #4]
 8005ee8:	6123      	str	r3, [r4, #16]
 8005eea:	2300      	movs	r3, #0
 8005eec:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8005ef0:	e79f      	b.n	8005e32 <_printf_i+0x126>
 8005ef2:	6923      	ldr	r3, [r4, #16]
 8005ef4:	462a      	mov	r2, r5
 8005ef6:	4639      	mov	r1, r7
 8005ef8:	4630      	mov	r0, r6
 8005efa:	47c0      	blx	r8
 8005efc:	3001      	adds	r0, #1
 8005efe:	d0a2      	beq.n	8005e46 <_printf_i+0x13a>
 8005f00:	6823      	ldr	r3, [r4, #0]
 8005f02:	079b      	lsls	r3, r3, #30
 8005f04:	d507      	bpl.n	8005f16 <_printf_i+0x20a>
 8005f06:	2500      	movs	r5, #0
 8005f08:	f104 0919 	add.w	r9, r4, #25
 8005f0c:	68e3      	ldr	r3, [r4, #12]
 8005f0e:	9a03      	ldr	r2, [sp, #12]
 8005f10:	1a9b      	subs	r3, r3, r2
 8005f12:	429d      	cmp	r5, r3
 8005f14:	db05      	blt.n	8005f22 <_printf_i+0x216>
 8005f16:	68e0      	ldr	r0, [r4, #12]
 8005f18:	9b03      	ldr	r3, [sp, #12]
 8005f1a:	4298      	cmp	r0, r3
 8005f1c:	bfb8      	it	lt
 8005f1e:	4618      	movlt	r0, r3
 8005f20:	e793      	b.n	8005e4a <_printf_i+0x13e>
 8005f22:	2301      	movs	r3, #1
 8005f24:	464a      	mov	r2, r9
 8005f26:	4639      	mov	r1, r7
 8005f28:	4630      	mov	r0, r6
 8005f2a:	47c0      	blx	r8
 8005f2c:	3001      	adds	r0, #1
 8005f2e:	d08a      	beq.n	8005e46 <_printf_i+0x13a>
 8005f30:	3501      	adds	r5, #1
 8005f32:	e7eb      	b.n	8005f0c <_printf_i+0x200>
 8005f34:	2b00      	cmp	r3, #0
 8005f36:	d1a7      	bne.n	8005e88 <_printf_i+0x17c>
 8005f38:	780b      	ldrb	r3, [r1, #0]
 8005f3a:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8005f3e:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8005f42:	e765      	b.n	8005e10 <_printf_i+0x104>
 8005f44:	08006336 	.word	0x08006336
 8005f48:	08006325 	.word	0x08006325

08005f4c <_sbrk_r>:
 8005f4c:	b538      	push	{r3, r4, r5, lr}
 8005f4e:	2300      	movs	r3, #0
 8005f50:	4c05      	ldr	r4, [pc, #20]	; (8005f68 <_sbrk_r+0x1c>)
 8005f52:	4605      	mov	r5, r0
 8005f54:	4608      	mov	r0, r1
 8005f56:	6023      	str	r3, [r4, #0]
 8005f58:	f000 f8ec 	bl	8006134 <_sbrk>
 8005f5c:	1c43      	adds	r3, r0, #1
 8005f5e:	d102      	bne.n	8005f66 <_sbrk_r+0x1a>
 8005f60:	6823      	ldr	r3, [r4, #0]
 8005f62:	b103      	cbz	r3, 8005f66 <_sbrk_r+0x1a>
 8005f64:	602b      	str	r3, [r5, #0]
 8005f66:	bd38      	pop	{r3, r4, r5, pc}
 8005f68:	20000cb4 	.word	0x20000cb4

08005f6c <__sread>:
 8005f6c:	b510      	push	{r4, lr}
 8005f6e:	460c      	mov	r4, r1
 8005f70:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8005f74:	f000 f8a4 	bl	80060c0 <_read_r>
 8005f78:	2800      	cmp	r0, #0
 8005f7a:	bfab      	itete	ge
 8005f7c:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 8005f7e:	89a3      	ldrhlt	r3, [r4, #12]
 8005f80:	181b      	addge	r3, r3, r0
 8005f82:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 8005f86:	bfac      	ite	ge
 8005f88:	6563      	strge	r3, [r4, #84]	; 0x54
 8005f8a:	81a3      	strhlt	r3, [r4, #12]
 8005f8c:	bd10      	pop	{r4, pc}

08005f8e <__swrite>:
 8005f8e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8005f92:	461f      	mov	r7, r3
 8005f94:	898b      	ldrh	r3, [r1, #12]
 8005f96:	4605      	mov	r5, r0
 8005f98:	05db      	lsls	r3, r3, #23
 8005f9a:	460c      	mov	r4, r1
 8005f9c:	4616      	mov	r6, r2
 8005f9e:	d505      	bpl.n	8005fac <__swrite+0x1e>
 8005fa0:	2302      	movs	r3, #2
 8005fa2:	2200      	movs	r2, #0
 8005fa4:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8005fa8:	f000 f868 	bl	800607c <_lseek_r>
 8005fac:	89a3      	ldrh	r3, [r4, #12]
 8005fae:	4632      	mov	r2, r6
 8005fb0:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 8005fb4:	81a3      	strh	r3, [r4, #12]
 8005fb6:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8005fba:	463b      	mov	r3, r7
 8005fbc:	4628      	mov	r0, r5
 8005fbe:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8005fc2:	f000 b817 	b.w	8005ff4 <_write_r>

08005fc6 <__sseek>:
 8005fc6:	b510      	push	{r4, lr}
 8005fc8:	460c      	mov	r4, r1
 8005fca:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8005fce:	f000 f855 	bl	800607c <_lseek_r>
 8005fd2:	1c43      	adds	r3, r0, #1
 8005fd4:	89a3      	ldrh	r3, [r4, #12]
 8005fd6:	bf15      	itete	ne
 8005fd8:	6560      	strne	r0, [r4, #84]	; 0x54
 8005fda:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 8005fde:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 8005fe2:	81a3      	strheq	r3, [r4, #12]
 8005fe4:	bf18      	it	ne
 8005fe6:	81a3      	strhne	r3, [r4, #12]
 8005fe8:	bd10      	pop	{r4, pc}

08005fea <__sclose>:
 8005fea:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8005fee:	f000 b813 	b.w	8006018 <_close_r>
	...

08005ff4 <_write_r>:
 8005ff4:	b538      	push	{r3, r4, r5, lr}
 8005ff6:	4605      	mov	r5, r0
 8005ff8:	4608      	mov	r0, r1
 8005ffa:	4611      	mov	r1, r2
 8005ffc:	2200      	movs	r2, #0
 8005ffe:	4c05      	ldr	r4, [pc, #20]	; (8006014 <_write_r+0x20>)
 8006000:	6022      	str	r2, [r4, #0]
 8006002:	461a      	mov	r2, r3
 8006004:	f7fe fcb6 	bl	8004974 <_write>
 8006008:	1c43      	adds	r3, r0, #1
 800600a:	d102      	bne.n	8006012 <_write_r+0x1e>
 800600c:	6823      	ldr	r3, [r4, #0]
 800600e:	b103      	cbz	r3, 8006012 <_write_r+0x1e>
 8006010:	602b      	str	r3, [r5, #0]
 8006012:	bd38      	pop	{r3, r4, r5, pc}
 8006014:	20000cb4 	.word	0x20000cb4

08006018 <_close_r>:
 8006018:	b538      	push	{r3, r4, r5, lr}
 800601a:	2300      	movs	r3, #0
 800601c:	4c05      	ldr	r4, [pc, #20]	; (8006034 <_close_r+0x1c>)
 800601e:	4605      	mov	r5, r0
 8006020:	4608      	mov	r0, r1
 8006022:	6023      	str	r3, [r4, #0]
 8006024:	f000 f85e 	bl	80060e4 <_close>
 8006028:	1c43      	adds	r3, r0, #1
 800602a:	d102      	bne.n	8006032 <_close_r+0x1a>
 800602c:	6823      	ldr	r3, [r4, #0]
 800602e:	b103      	cbz	r3, 8006032 <_close_r+0x1a>
 8006030:	602b      	str	r3, [r5, #0]
 8006032:	bd38      	pop	{r3, r4, r5, pc}
 8006034:	20000cb4 	.word	0x20000cb4

08006038 <_fstat_r>:
 8006038:	b538      	push	{r3, r4, r5, lr}
 800603a:	2300      	movs	r3, #0
 800603c:	4c06      	ldr	r4, [pc, #24]	; (8006058 <_fstat_r+0x20>)
 800603e:	4605      	mov	r5, r0
 8006040:	4608      	mov	r0, r1
 8006042:	4611      	mov	r1, r2
 8006044:	6023      	str	r3, [r4, #0]
 8006046:	f000 f855 	bl	80060f4 <_fstat>
 800604a:	1c43      	adds	r3, r0, #1
 800604c:	d102      	bne.n	8006054 <_fstat_r+0x1c>
 800604e:	6823      	ldr	r3, [r4, #0]
 8006050:	b103      	cbz	r3, 8006054 <_fstat_r+0x1c>
 8006052:	602b      	str	r3, [r5, #0]
 8006054:	bd38      	pop	{r3, r4, r5, pc}
 8006056:	bf00      	nop
 8006058:	20000cb4 	.word	0x20000cb4

0800605c <_isatty_r>:
 800605c:	b538      	push	{r3, r4, r5, lr}
 800605e:	2300      	movs	r3, #0
 8006060:	4c05      	ldr	r4, [pc, #20]	; (8006078 <_isatty_r+0x1c>)
 8006062:	4605      	mov	r5, r0
 8006064:	4608      	mov	r0, r1
 8006066:	6023      	str	r3, [r4, #0]
 8006068:	f000 f84c 	bl	8006104 <_isatty>
 800606c:	1c43      	adds	r3, r0, #1
 800606e:	d102      	bne.n	8006076 <_isatty_r+0x1a>
 8006070:	6823      	ldr	r3, [r4, #0]
 8006072:	b103      	cbz	r3, 8006076 <_isatty_r+0x1a>
 8006074:	602b      	str	r3, [r5, #0]
 8006076:	bd38      	pop	{r3, r4, r5, pc}
 8006078:	20000cb4 	.word	0x20000cb4

0800607c <_lseek_r>:
 800607c:	b538      	push	{r3, r4, r5, lr}
 800607e:	4605      	mov	r5, r0
 8006080:	4608      	mov	r0, r1
 8006082:	4611      	mov	r1, r2
 8006084:	2200      	movs	r2, #0
 8006086:	4c05      	ldr	r4, [pc, #20]	; (800609c <_lseek_r+0x20>)
 8006088:	6022      	str	r2, [r4, #0]
 800608a:	461a      	mov	r2, r3
 800608c:	f000 f842 	bl	8006114 <_lseek>
 8006090:	1c43      	adds	r3, r0, #1
 8006092:	d102      	bne.n	800609a <_lseek_r+0x1e>
 8006094:	6823      	ldr	r3, [r4, #0]
 8006096:	b103      	cbz	r3, 800609a <_lseek_r+0x1e>
 8006098:	602b      	str	r3, [r5, #0]
 800609a:	bd38      	pop	{r3, r4, r5, pc}
 800609c:	20000cb4 	.word	0x20000cb4

080060a0 <memchr>:
 80060a0:	b510      	push	{r4, lr}
 80060a2:	b2c9      	uxtb	r1, r1
 80060a4:	4402      	add	r2, r0
 80060a6:	4290      	cmp	r0, r2
 80060a8:	4603      	mov	r3, r0
 80060aa:	d101      	bne.n	80060b0 <memchr+0x10>
 80060ac:	2000      	movs	r0, #0
 80060ae:	bd10      	pop	{r4, pc}
 80060b0:	781c      	ldrb	r4, [r3, #0]
 80060b2:	3001      	adds	r0, #1
 80060b4:	428c      	cmp	r4, r1
 80060b6:	d1f6      	bne.n	80060a6 <memchr+0x6>
 80060b8:	4618      	mov	r0, r3
 80060ba:	bd10      	pop	{r4, pc}

080060bc <__malloc_lock>:
 80060bc:	4770      	bx	lr

080060be <__malloc_unlock>:
 80060be:	4770      	bx	lr

080060c0 <_read_r>:
 80060c0:	b538      	push	{r3, r4, r5, lr}
 80060c2:	4605      	mov	r5, r0
 80060c4:	4608      	mov	r0, r1
 80060c6:	4611      	mov	r1, r2
 80060c8:	2200      	movs	r2, #0
 80060ca:	4c05      	ldr	r4, [pc, #20]	; (80060e0 <_read_r+0x20>)
 80060cc:	6022      	str	r2, [r4, #0]
 80060ce:	461a      	mov	r2, r3
 80060d0:	f000 f828 	bl	8006124 <_read>
 80060d4:	1c43      	adds	r3, r0, #1
 80060d6:	d102      	bne.n	80060de <_read_r+0x1e>
 80060d8:	6823      	ldr	r3, [r4, #0]
 80060da:	b103      	cbz	r3, 80060de <_read_r+0x1e>
 80060dc:	602b      	str	r3, [r5, #0]
 80060de:	bd38      	pop	{r3, r4, r5, pc}
 80060e0:	20000cb4 	.word	0x20000cb4

080060e4 <_close>:
 80060e4:	2258      	movs	r2, #88	; 0x58
 80060e6:	4b02      	ldr	r3, [pc, #8]	; (80060f0 <_close+0xc>)
 80060e8:	f04f 30ff 	mov.w	r0, #4294967295
 80060ec:	601a      	str	r2, [r3, #0]
 80060ee:	4770      	bx	lr
 80060f0:	20000cb4 	.word	0x20000cb4

080060f4 <_fstat>:
 80060f4:	2258      	movs	r2, #88	; 0x58
 80060f6:	4b02      	ldr	r3, [pc, #8]	; (8006100 <_fstat+0xc>)
 80060f8:	f04f 30ff 	mov.w	r0, #4294967295
 80060fc:	601a      	str	r2, [r3, #0]
 80060fe:	4770      	bx	lr
 8006100:	20000cb4 	.word	0x20000cb4

08006104 <_isatty>:
 8006104:	2258      	movs	r2, #88	; 0x58
 8006106:	4b02      	ldr	r3, [pc, #8]	; (8006110 <_isatty+0xc>)
 8006108:	2000      	movs	r0, #0
 800610a:	601a      	str	r2, [r3, #0]
 800610c:	4770      	bx	lr
 800610e:	bf00      	nop
 8006110:	20000cb4 	.word	0x20000cb4

08006114 <_lseek>:
 8006114:	2258      	movs	r2, #88	; 0x58
 8006116:	4b02      	ldr	r3, [pc, #8]	; (8006120 <_lseek+0xc>)
 8006118:	f04f 30ff 	mov.w	r0, #4294967295
 800611c:	601a      	str	r2, [r3, #0]
 800611e:	4770      	bx	lr
 8006120:	20000cb4 	.word	0x20000cb4

08006124 <_read>:
 8006124:	2258      	movs	r2, #88	; 0x58
 8006126:	4b02      	ldr	r3, [pc, #8]	; (8006130 <_read+0xc>)
 8006128:	f04f 30ff 	mov.w	r0, #4294967295
 800612c:	601a      	str	r2, [r3, #0]
 800612e:	4770      	bx	lr
 8006130:	20000cb4 	.word	0x20000cb4

08006134 <_sbrk>:
 8006134:	4b04      	ldr	r3, [pc, #16]	; (8006148 <_sbrk+0x14>)
 8006136:	4602      	mov	r2, r0
 8006138:	6819      	ldr	r1, [r3, #0]
 800613a:	b909      	cbnz	r1, 8006140 <_sbrk+0xc>
 800613c:	4903      	ldr	r1, [pc, #12]	; (800614c <_sbrk+0x18>)
 800613e:	6019      	str	r1, [r3, #0]
 8006140:	6818      	ldr	r0, [r3, #0]
 8006142:	4402      	add	r2, r0
 8006144:	601a      	str	r2, [r3, #0]
 8006146:	4770      	bx	lr
 8006148:	200000d8 	.word	0x200000d8
 800614c:	20000cb8 	.word	0x20000cb8

08006150 <_init>:
 8006150:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8006152:	bf00      	nop
 8006154:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8006156:	bc08      	pop	{r3}
 8006158:	469e      	mov	lr, r3
 800615a:	4770      	bx	lr

0800615c <_fini>:
 800615c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800615e:	bf00      	nop
 8006160:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8006162:	bc08      	pop	{r3}
 8006164:	469e      	mov	lr, r3
 8006166:	4770      	bx	lr