STM32F103_WifiAttenCtrlTest/Debug/STM32F103_WifiAttenCtrlTest.list

STM32F103_WifiAttenCtrlTest.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08004000  08004000  00004000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         000059ac  080041e8  080041e8  000041e8  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       000003c8  08009b98  08009b98  00009b98  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  08009f60  08009f60  00009f60  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  08009f64  08009f64  00009f64  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         000003dc  20000000  08009f68  00010000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          00000b78  200003dc  0800a344  000103dc  2**2
                  ALLOC
  7 ._user_heap_stack 00000600  20000f54  0800a344  00010f54  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  000103dc  2**0
                  CONTENTS, READONLY
  9 .debug_info   000143ee  00000000  00000000  00010405  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 00002fe7  00000000  00000000  000247f3  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    00007d9b  00000000  00000000  000277da  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 00000be0  00000000  00000000  0002f578  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00000fd0  00000000  00000000  00030158  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   00006e1b  00000000  00000000  00031128  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    000044ed  00000000  00000000  00037f43  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  0003c430  2**0
                  CONTENTS, READONLY
 17 .debug_frame  00003164  00000000  00000000  0003c4ac  2**2
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080041e8 <__do_global_dtors_aux>:
 80041e8:	b510      	push	{r4, lr}
 80041ea:	4c05      	ldr	r4, [pc, #20]	; (8004200 <__do_global_dtors_aux+0x18>)
 80041ec:	7823      	ldrb	r3, [r4, #0]
 80041ee:	b933      	cbnz	r3, 80041fe <__do_global_dtors_aux+0x16>
 80041f0:	4b04      	ldr	r3, [pc, #16]	; (8004204 <__do_global_dtors_aux+0x1c>)
 80041f2:	b113      	cbz	r3, 80041fa <__do_global_dtors_aux+0x12>
 80041f4:	4804      	ldr	r0, [pc, #16]	; (8004208 <__do_global_dtors_aux+0x20>)
 80041f6:	f3af 8000 	nop.w
 80041fa:	2301      	movs	r3, #1
 80041fc:	7023      	strb	r3, [r4, #0]
 80041fe:	bd10      	pop	{r4, pc}
 8004200:	200003dc 	.word	0x200003dc
 8004204:	00000000 	.word	0x00000000
 8004208:	08009b7c 	.word	0x08009b7c

0800420c <frame_dummy>:
 800420c:	b508      	push	{r3, lr}
 800420e:	4b03      	ldr	r3, [pc, #12]	; (800421c <frame_dummy+0x10>)
 8004210:	b11b      	cbz	r3, 800421a <frame_dummy+0xe>
 8004212:	4903      	ldr	r1, [pc, #12]	; (8004220 <frame_dummy+0x14>)
 8004214:	4803      	ldr	r0, [pc, #12]	; (8004224 <frame_dummy+0x18>)
 8004216:	f3af 8000 	nop.w
 800421a:	bd08      	pop	{r3, pc}
 800421c:	00000000 	.word	0x00000000
 8004220:	200003e0 	.word	0x200003e0
 8004224:	08009b7c 	.word	0x08009b7c

08004228 <strlen>:
 8004228:	4603      	mov	r3, r0
 800422a:	f813 2b01 	ldrb.w	r2, [r3], #1
 800422e:	2a00      	cmp	r2, #0
 8004230:	d1fb      	bne.n	800422a <strlen+0x2>
 8004232:	1a18      	subs	r0, r3, r0
 8004234:	3801      	subs	r0, #1
 8004236:	4770      	bx	lr

08004238 <__aeabi_drsub>:
 8004238:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
 800423c:	e002      	b.n	8004244 <__adddf3>
 800423e:	bf00      	nop

08004240 <__aeabi_dsub>:
 8004240:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000

08004244 <__adddf3>:
 8004244:	b530      	push	{r4, r5, lr}
 8004246:	ea4f 0441 	mov.w	r4, r1, lsl #1
 800424a:	ea4f 0543 	mov.w	r5, r3, lsl #1
 800424e:	ea94 0f05 	teq	r4, r5
 8004252:	bf08      	it	eq
 8004254:	ea90 0f02 	teqeq	r0, r2
 8004258:	bf1f      	itttt	ne
 800425a:	ea54 0c00 	orrsne.w	ip, r4, r0
 800425e:	ea55 0c02 	orrsne.w	ip, r5, r2
 8004262:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 8004266:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 800426a:	f000 80e2 	beq.w	8004432 <__adddf3+0x1ee>
 800426e:	ea4f 5454 	mov.w	r4, r4, lsr #21
 8004272:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 8004276:	bfb8      	it	lt
 8004278:	426d      	neglt	r5, r5
 800427a:	dd0c      	ble.n	8004296 <__adddf3+0x52>
 800427c:	442c      	add	r4, r5
 800427e:	ea80 0202 	eor.w	r2, r0, r2
 8004282:	ea81 0303 	eor.w	r3, r1, r3
 8004286:	ea82 0000 	eor.w	r0, r2, r0
 800428a:	ea83 0101 	eor.w	r1, r3, r1
 800428e:	ea80 0202 	eor.w	r2, r0, r2
 8004292:	ea81 0303 	eor.w	r3, r1, r3
 8004296:	2d36      	cmp	r5, #54	; 0x36
 8004298:	bf88      	it	hi
 800429a:	bd30      	pophi	{r4, r5, pc}
 800429c:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 80042a0:	ea4f 3101 	mov.w	r1, r1, lsl #12
 80042a4:	f44f 1c80 	mov.w	ip, #1048576	; 0x100000
 80042a8:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 80042ac:	d002      	beq.n	80042b4 <__adddf3+0x70>
 80042ae:	4240      	negs	r0, r0
 80042b0:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80042b4:	f013 4f00 	tst.w	r3, #2147483648	; 0x80000000
 80042b8:	ea4f 3303 	mov.w	r3, r3, lsl #12
 80042bc:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 80042c0:	d002      	beq.n	80042c8 <__adddf3+0x84>
 80042c2:	4252      	negs	r2, r2
 80042c4:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 80042c8:	ea94 0f05 	teq	r4, r5
 80042cc:	f000 80a7 	beq.w	800441e <__adddf3+0x1da>
 80042d0:	f1a4 0401 	sub.w	r4, r4, #1
 80042d4:	f1d5 0e20 	rsbs	lr, r5, #32
 80042d8:	db0d      	blt.n	80042f6 <__adddf3+0xb2>
 80042da:	fa02 fc0e 	lsl.w	ip, r2, lr
 80042de:	fa22 f205 	lsr.w	r2, r2, r5
 80042e2:	1880      	adds	r0, r0, r2
 80042e4:	f141 0100 	adc.w	r1, r1, #0
 80042e8:	fa03 f20e 	lsl.w	r2, r3, lr
 80042ec:	1880      	adds	r0, r0, r2
 80042ee:	fa43 f305 	asr.w	r3, r3, r5
 80042f2:	4159      	adcs	r1, r3
 80042f4:	e00e      	b.n	8004314 <__adddf3+0xd0>
 80042f6:	f1a5 0520 	sub.w	r5, r5, #32
 80042fa:	f10e 0e20 	add.w	lr, lr, #32
 80042fe:	2a01      	cmp	r2, #1
 8004300:	fa03 fc0e 	lsl.w	ip, r3, lr
 8004304:	bf28      	it	cs
 8004306:	f04c 0c02 	orrcs.w	ip, ip, #2
 800430a:	fa43 f305 	asr.w	r3, r3, r5
 800430e:	18c0      	adds	r0, r0, r3
 8004310:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 8004314:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004318:	d507      	bpl.n	800432a <__adddf3+0xe6>
 800431a:	f04f 0e00 	mov.w	lr, #0
 800431e:	f1dc 0c00 	rsbs	ip, ip, #0
 8004322:	eb7e 0000 	sbcs.w	r0, lr, r0
 8004326:	eb6e 0101 	sbc.w	r1, lr, r1
 800432a:	f5b1 1f80 	cmp.w	r1, #1048576	; 0x100000
 800432e:	d31b      	bcc.n	8004368 <__adddf3+0x124>
 8004330:	f5b1 1f00 	cmp.w	r1, #2097152	; 0x200000
 8004334:	d30c      	bcc.n	8004350 <__adddf3+0x10c>
 8004336:	0849      	lsrs	r1, r1, #1
 8004338:	ea5f 0030 	movs.w	r0, r0, rrx
 800433c:	ea4f 0c3c 	mov.w	ip, ip, rrx
 8004340:	f104 0401 	add.w	r4, r4, #1
 8004344:	ea4f 5244 	mov.w	r2, r4, lsl #21
 8004348:	f512 0f80 	cmn.w	r2, #4194304	; 0x400000
 800434c:	f080 809a 	bcs.w	8004484 <__adddf3+0x240>
 8004350:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
 8004354:	bf08      	it	eq
 8004356:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 800435a:	f150 0000 	adcs.w	r0, r0, #0
 800435e:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 8004362:	ea41 0105 	orr.w	r1, r1, r5
 8004366:	bd30      	pop	{r4, r5, pc}
 8004368:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 800436c:	4140      	adcs	r0, r0
 800436e:	eb41 0101 	adc.w	r1, r1, r1
 8004372:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004376:	f1a4 0401 	sub.w	r4, r4, #1
 800437a:	d1e9      	bne.n	8004350 <__adddf3+0x10c>
 800437c:	f091 0f00 	teq	r1, #0
 8004380:	bf04      	itt	eq
 8004382:	4601      	moveq	r1, r0
 8004384:	2000      	moveq	r0, #0
 8004386:	fab1 f381 	clz	r3, r1
 800438a:	bf08      	it	eq
 800438c:	3320      	addeq	r3, #32
 800438e:	f1a3 030b 	sub.w	r3, r3, #11
 8004392:	f1b3 0220 	subs.w	r2, r3, #32
 8004396:	da0c      	bge.n	80043b2 <__adddf3+0x16e>
 8004398:	320c      	adds	r2, #12
 800439a:	dd08      	ble.n	80043ae <__adddf3+0x16a>
 800439c:	f102 0c14 	add.w	ip, r2, #20
 80043a0:	f1c2 020c 	rsb	r2, r2, #12
 80043a4:	fa01 f00c 	lsl.w	r0, r1, ip
 80043a8:	fa21 f102 	lsr.w	r1, r1, r2
 80043ac:	e00c      	b.n	80043c8 <__adddf3+0x184>
 80043ae:	f102 0214 	add.w	r2, r2, #20
 80043b2:	bfd8      	it	le
 80043b4:	f1c2 0c20 	rsble	ip, r2, #32
 80043b8:	fa01 f102 	lsl.w	r1, r1, r2
 80043bc:	fa20 fc0c 	lsr.w	ip, r0, ip
 80043c0:	bfdc      	itt	le
 80043c2:	ea41 010c 	orrle.w	r1, r1, ip
 80043c6:	4090      	lslle	r0, r2
 80043c8:	1ae4      	subs	r4, r4, r3
 80043ca:	bfa2      	ittt	ge
 80043cc:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 80043d0:	4329      	orrge	r1, r5
 80043d2:	bd30      	popge	{r4, r5, pc}
 80043d4:	ea6f 0404 	mvn.w	r4, r4
 80043d8:	3c1f      	subs	r4, #31
 80043da:	da1c      	bge.n	8004416 <__adddf3+0x1d2>
 80043dc:	340c      	adds	r4, #12
 80043de:	dc0e      	bgt.n	80043fe <__adddf3+0x1ba>
 80043e0:	f104 0414 	add.w	r4, r4, #20
 80043e4:	f1c4 0220 	rsb	r2, r4, #32
 80043e8:	fa20 f004 	lsr.w	r0, r0, r4
 80043ec:	fa01 f302 	lsl.w	r3, r1, r2
 80043f0:	ea40 0003 	orr.w	r0, r0, r3
 80043f4:	fa21 f304 	lsr.w	r3, r1, r4
 80043f8:	ea45 0103 	orr.w	r1, r5, r3
 80043fc:	bd30      	pop	{r4, r5, pc}
 80043fe:	f1c4 040c 	rsb	r4, r4, #12
 8004402:	f1c4 0220 	rsb	r2, r4, #32
 8004406:	fa20 f002 	lsr.w	r0, r0, r2
 800440a:	fa01 f304 	lsl.w	r3, r1, r4
 800440e:	ea40 0003 	orr.w	r0, r0, r3
 8004412:	4629      	mov	r1, r5
 8004414:	bd30      	pop	{r4, r5, pc}
 8004416:	fa21 f004 	lsr.w	r0, r1, r4
 800441a:	4629      	mov	r1, r5
 800441c:	bd30      	pop	{r4, r5, pc}
 800441e:	f094 0f00 	teq	r4, #0
 8004422:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
 8004426:	bf06      	itte	eq
 8004428:	f481 1180 	eoreq.w	r1, r1, #1048576	; 0x100000
 800442c:	3401      	addeq	r4, #1
 800442e:	3d01      	subne	r5, #1
 8004430:	e74e      	b.n	80042d0 <__adddf3+0x8c>
 8004432:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 8004436:	bf18      	it	ne
 8004438:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 800443c:	d029      	beq.n	8004492 <__adddf3+0x24e>
 800443e:	ea94 0f05 	teq	r4, r5
 8004442:	bf08      	it	eq
 8004444:	ea90 0f02 	teqeq	r0, r2
 8004448:	d005      	beq.n	8004456 <__adddf3+0x212>
 800444a:	ea54 0c00 	orrs.w	ip, r4, r0
 800444e:	bf04      	itt	eq
 8004450:	4619      	moveq	r1, r3
 8004452:	4610      	moveq	r0, r2
 8004454:	bd30      	pop	{r4, r5, pc}
 8004456:	ea91 0f03 	teq	r1, r3
 800445a:	bf1e      	ittt	ne
 800445c:	2100      	movne	r1, #0
 800445e:	2000      	movne	r0, #0
 8004460:	bd30      	popne	{r4, r5, pc}
 8004462:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 8004466:	d105      	bne.n	8004474 <__adddf3+0x230>
 8004468:	0040      	lsls	r0, r0, #1
 800446a:	4149      	adcs	r1, r1
 800446c:	bf28      	it	cs
 800446e:	f041 4100 	orrcs.w	r1, r1, #2147483648	; 0x80000000
 8004472:	bd30      	pop	{r4, r5, pc}
 8004474:	f514 0480 	adds.w	r4, r4, #4194304	; 0x400000
 8004478:	bf3c      	itt	cc
 800447a:	f501 1180 	addcc.w	r1, r1, #1048576	; 0x100000
 800447e:	bd30      	popcc	{r4, r5, pc}
 8004480:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004484:	f045 41fe 	orr.w	r1, r5, #2130706432	; 0x7f000000
 8004488:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 800448c:	f04f 0000 	mov.w	r0, #0
 8004490:	bd30      	pop	{r4, r5, pc}
 8004492:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 8004496:	bf1a      	itte	ne
 8004498:	4619      	movne	r1, r3
 800449a:	4610      	movne	r0, r2
 800449c:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 80044a0:	bf1c      	itt	ne
 80044a2:	460b      	movne	r3, r1
 80044a4:	4602      	movne	r2, r0
 80044a6:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 80044aa:	bf06      	itte	eq
 80044ac:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 80044b0:	ea91 0f03 	teqeq	r1, r3
 80044b4:	f441 2100 	orrne.w	r1, r1, #524288	; 0x80000
 80044b8:	bd30      	pop	{r4, r5, pc}
 80044ba:	bf00      	nop

080044bc <__aeabi_ui2d>:
 80044bc:	f090 0f00 	teq	r0, #0
 80044c0:	bf04      	itt	eq
 80044c2:	2100      	moveq	r1, #0
 80044c4:	4770      	bxeq	lr
 80044c6:	b530      	push	{r4, r5, lr}
 80044c8:	f44f 6480 	mov.w	r4, #1024	; 0x400
 80044cc:	f104 0432 	add.w	r4, r4, #50	; 0x32
 80044d0:	f04f 0500 	mov.w	r5, #0
 80044d4:	f04f 0100 	mov.w	r1, #0
 80044d8:	e750      	b.n	800437c <__adddf3+0x138>
 80044da:	bf00      	nop

080044dc <__aeabi_i2d>:
 80044dc:	f090 0f00 	teq	r0, #0
 80044e0:	bf04      	itt	eq
 80044e2:	2100      	moveq	r1, #0
 80044e4:	4770      	bxeq	lr
 80044e6:	b530      	push	{r4, r5, lr}
 80044e8:	f44f 6480 	mov.w	r4, #1024	; 0x400
 80044ec:	f104 0432 	add.w	r4, r4, #50	; 0x32
 80044f0:	f010 4500 	ands.w	r5, r0, #2147483648	; 0x80000000
 80044f4:	bf48      	it	mi
 80044f6:	4240      	negmi	r0, r0
 80044f8:	f04f 0100 	mov.w	r1, #0
 80044fc:	e73e      	b.n	800437c <__adddf3+0x138>
 80044fe:	bf00      	nop

08004500 <__aeabi_f2d>:
 8004500:	0042      	lsls	r2, r0, #1
 8004502:	ea4f 01e2 	mov.w	r1, r2, asr #3
 8004506:	ea4f 0131 	mov.w	r1, r1, rrx
 800450a:	ea4f 7002 	mov.w	r0, r2, lsl #28
 800450e:	bf1f      	itttt	ne
 8004510:	f012 437f 	andsne.w	r3, r2, #4278190080	; 0xff000000
 8004514:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004518:	f081 5160 	eorne.w	r1, r1, #939524096	; 0x38000000
 800451c:	4770      	bxne	lr
 800451e:	f092 0f00 	teq	r2, #0
 8004522:	bf14      	ite	ne
 8004524:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004528:	4770      	bxeq	lr
 800452a:	b530      	push	{r4, r5, lr}
 800452c:	f44f 7460 	mov.w	r4, #896	; 0x380
 8004530:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004534:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 8004538:	e720      	b.n	800437c <__adddf3+0x138>
 800453a:	bf00      	nop

0800453c <__aeabi_ul2d>:
 800453c:	ea50 0201 	orrs.w	r2, r0, r1
 8004540:	bf08      	it	eq
 8004542:	4770      	bxeq	lr
 8004544:	b530      	push	{r4, r5, lr}
 8004546:	f04f 0500 	mov.w	r5, #0
 800454a:	e00a      	b.n	8004562 <__aeabi_l2d+0x16>

0800454c <__aeabi_l2d>:
 800454c:	ea50 0201 	orrs.w	r2, r0, r1
 8004550:	bf08      	it	eq
 8004552:	4770      	bxeq	lr
 8004554:	b530      	push	{r4, r5, lr}
 8004556:	f011 4500 	ands.w	r5, r1, #2147483648	; 0x80000000
 800455a:	d502      	bpl.n	8004562 <__aeabi_l2d+0x16>
 800455c:	4240      	negs	r0, r0
 800455e:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8004562:	f44f 6480 	mov.w	r4, #1024	; 0x400
 8004566:	f104 0432 	add.w	r4, r4, #50	; 0x32
 800456a:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 800456e:	f43f aedc 	beq.w	800432a <__adddf3+0xe6>
 8004572:	f04f 0203 	mov.w	r2, #3
 8004576:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 800457a:	bf18      	it	ne
 800457c:	3203      	addne	r2, #3
 800457e:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8004582:	bf18      	it	ne
 8004584:	3203      	addne	r2, #3
 8004586:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 800458a:	f1c2 0320 	rsb	r3, r2, #32
 800458e:	fa00 fc03 	lsl.w	ip, r0, r3
 8004592:	fa20 f002 	lsr.w	r0, r0, r2
 8004596:	fa01 fe03 	lsl.w	lr, r1, r3
 800459a:	ea40 000e 	orr.w	r0, r0, lr
 800459e:	fa21 f102 	lsr.w	r1, r1, r2
 80045a2:	4414      	add	r4, r2
 80045a4:	e6c1      	b.n	800432a <__adddf3+0xe6>
 80045a6:	bf00      	nop

080045a8 <__aeabi_dmul>:
 80045a8:	b570      	push	{r4, r5, r6, lr}
 80045aa:	f04f 0cff 	mov.w	ip, #255	; 0xff
 80045ae:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 80045b2:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 80045b6:	bf1d      	ittte	ne
 80045b8:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 80045bc:	ea94 0f0c 	teqne	r4, ip
 80045c0:	ea95 0f0c 	teqne	r5, ip
 80045c4:	f000 f8de 	bleq	8004784 <__aeabi_dmul+0x1dc>
 80045c8:	442c      	add	r4, r5
 80045ca:	ea81 0603 	eor.w	r6, r1, r3
 80045ce:	ea21 514c 	bic.w	r1, r1, ip, lsl #21
 80045d2:	ea23 534c 	bic.w	r3, r3, ip, lsl #21
 80045d6:	ea50 3501 	orrs.w	r5, r0, r1, lsl #12
 80045da:	bf18      	it	ne
 80045dc:	ea52 3503 	orrsne.w	r5, r2, r3, lsl #12
 80045e0:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 80045e4:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
 80045e8:	d038      	beq.n	800465c <__aeabi_dmul+0xb4>
 80045ea:	fba0 ce02 	umull	ip, lr, r0, r2
 80045ee:	f04f 0500 	mov.w	r5, #0
 80045f2:	fbe1 e502 	umlal	lr, r5, r1, r2
 80045f6:	f006 4200 	and.w	r2, r6, #2147483648	; 0x80000000
 80045fa:	fbe0 e503 	umlal	lr, r5, r0, r3
 80045fe:	f04f 0600 	mov.w	r6, #0
 8004602:	fbe1 5603 	umlal	r5, r6, r1, r3
 8004606:	f09c 0f00 	teq	ip, #0
 800460a:	bf18      	it	ne
 800460c:	f04e 0e01 	orrne.w	lr, lr, #1
 8004610:	f1a4 04ff 	sub.w	r4, r4, #255	; 0xff
 8004614:	f5b6 7f00 	cmp.w	r6, #512	; 0x200
 8004618:	f564 7440 	sbc.w	r4, r4, #768	; 0x300
 800461c:	d204      	bcs.n	8004628 <__aeabi_dmul+0x80>
 800461e:	ea5f 0e4e 	movs.w	lr, lr, lsl #1
 8004622:	416d      	adcs	r5, r5
 8004624:	eb46 0606 	adc.w	r6, r6, r6
 8004628:	ea42 21c6 	orr.w	r1, r2, r6, lsl #11
 800462c:	ea41 5155 	orr.w	r1, r1, r5, lsr #21
 8004630:	ea4f 20c5 	mov.w	r0, r5, lsl #11
 8004634:	ea40 505e 	orr.w	r0, r0, lr, lsr #21
 8004638:	ea4f 2ece 	mov.w	lr, lr, lsl #11
 800463c:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 8004640:	bf88      	it	hi
 8004642:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 8004646:	d81e      	bhi.n	8004686 <__aeabi_dmul+0xde>
 8004648:	f1be 4f00 	cmp.w	lr, #2147483648	; 0x80000000
 800464c:	bf08      	it	eq
 800464e:	ea5f 0e50 	movseq.w	lr, r0, lsr #1
 8004652:	f150 0000 	adcs.w	r0, r0, #0
 8004656:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 800465a:	bd70      	pop	{r4, r5, r6, pc}
 800465c:	f006 4600 	and.w	r6, r6, #2147483648	; 0x80000000
 8004660:	ea46 0101 	orr.w	r1, r6, r1
 8004664:	ea40 0002 	orr.w	r0, r0, r2
 8004668:	ea81 0103 	eor.w	r1, r1, r3
 800466c:	ebb4 045c 	subs.w	r4, r4, ip, lsr #1
 8004670:	bfc2      	ittt	gt
 8004672:	ebd4 050c 	rsbsgt	r5, r4, ip
 8004676:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 800467a:	bd70      	popgt	{r4, r5, r6, pc}
 800467c:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004680:	f04f 0e00 	mov.w	lr, #0
 8004684:	3c01      	subs	r4, #1
 8004686:	f300 80ab 	bgt.w	80047e0 <__aeabi_dmul+0x238>
 800468a:	f114 0f36 	cmn.w	r4, #54	; 0x36
 800468e:	bfde      	ittt	le
 8004690:	2000      	movle	r0, #0
 8004692:	f001 4100 	andle.w	r1, r1, #2147483648	; 0x80000000
 8004696:	bd70      	pople	{r4, r5, r6, pc}
 8004698:	f1c4 0400 	rsb	r4, r4, #0
 800469c:	3c20      	subs	r4, #32
 800469e:	da35      	bge.n	800470c <__aeabi_dmul+0x164>
 80046a0:	340c      	adds	r4, #12
 80046a2:	dc1b      	bgt.n	80046dc <__aeabi_dmul+0x134>
 80046a4:	f104 0414 	add.w	r4, r4, #20
 80046a8:	f1c4 0520 	rsb	r5, r4, #32
 80046ac:	fa00 f305 	lsl.w	r3, r0, r5
 80046b0:	fa20 f004 	lsr.w	r0, r0, r4
 80046b4:	fa01 f205 	lsl.w	r2, r1, r5
 80046b8:	ea40 0002 	orr.w	r0, r0, r2
 80046bc:	f001 4200 	and.w	r2, r1, #2147483648	; 0x80000000
 80046c0:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 80046c4:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 80046c8:	fa21 f604 	lsr.w	r6, r1, r4
 80046cc:	eb42 0106 	adc.w	r1, r2, r6
 80046d0:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 80046d4:	bf08      	it	eq
 80046d6:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 80046da:	bd70      	pop	{r4, r5, r6, pc}
 80046dc:	f1c4 040c 	rsb	r4, r4, #12
 80046e0:	f1c4 0520 	rsb	r5, r4, #32
 80046e4:	fa00 f304 	lsl.w	r3, r0, r4
 80046e8:	fa20 f005 	lsr.w	r0, r0, r5
 80046ec:	fa01 f204 	lsl.w	r2, r1, r4
 80046f0:	ea40 0002 	orr.w	r0, r0, r2
 80046f4:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80046f8:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 80046fc:	f141 0100 	adc.w	r1, r1, #0
 8004700:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 8004704:	bf08      	it	eq
 8004706:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 800470a:	bd70      	pop	{r4, r5, r6, pc}
 800470c:	f1c4 0520 	rsb	r5, r4, #32
 8004710:	fa00 f205 	lsl.w	r2, r0, r5
 8004714:	ea4e 0e02 	orr.w	lr, lr, r2
 8004718:	fa20 f304 	lsr.w	r3, r0, r4
 800471c:	fa01 f205 	lsl.w	r2, r1, r5
 8004720:	ea43 0302 	orr.w	r3, r3, r2
 8004724:	fa21 f004 	lsr.w	r0, r1, r4
 8004728:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 800472c:	fa21 f204 	lsr.w	r2, r1, r4
 8004730:	ea20 0002 	bic.w	r0, r0, r2
 8004734:	eb00 70d3 	add.w	r0, r0, r3, lsr #31
 8004738:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 800473c:	bf08      	it	eq
 800473e:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 8004742:	bd70      	pop	{r4, r5, r6, pc}
 8004744:	f094 0f00 	teq	r4, #0
 8004748:	d10f      	bne.n	800476a <__aeabi_dmul+0x1c2>
 800474a:	f001 4600 	and.w	r6, r1, #2147483648	; 0x80000000
 800474e:	0040      	lsls	r0, r0, #1
 8004750:	eb41 0101 	adc.w	r1, r1, r1
 8004754:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004758:	bf08      	it	eq
 800475a:	3c01      	subeq	r4, #1
 800475c:	d0f7      	beq.n	800474e <__aeabi_dmul+0x1a6>
 800475e:	ea41 0106 	orr.w	r1, r1, r6
 8004762:	f095 0f00 	teq	r5, #0
 8004766:	bf18      	it	ne
 8004768:	4770      	bxne	lr
 800476a:	f003 4600 	and.w	r6, r3, #2147483648	; 0x80000000
 800476e:	0052      	lsls	r2, r2, #1
 8004770:	eb43 0303 	adc.w	r3, r3, r3
 8004774:	f413 1f80 	tst.w	r3, #1048576	; 0x100000
 8004778:	bf08      	it	eq
 800477a:	3d01      	subeq	r5, #1
 800477c:	d0f7      	beq.n	800476e <__aeabi_dmul+0x1c6>
 800477e:	ea43 0306 	orr.w	r3, r3, r6
 8004782:	4770      	bx	lr
 8004784:	ea94 0f0c 	teq	r4, ip
 8004788:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 800478c:	bf18      	it	ne
 800478e:	ea95 0f0c 	teqne	r5, ip
 8004792:	d00c      	beq.n	80047ae <__aeabi_dmul+0x206>
 8004794:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 8004798:	bf18      	it	ne
 800479a:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 800479e:	d1d1      	bne.n	8004744 <__aeabi_dmul+0x19c>
 80047a0:	ea81 0103 	eor.w	r1, r1, r3
 80047a4:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047a8:	f04f 0000 	mov.w	r0, #0
 80047ac:	bd70      	pop	{r4, r5, r6, pc}
 80047ae:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80047b2:	bf06      	itte	eq
 80047b4:	4610      	moveq	r0, r2
 80047b6:	4619      	moveq	r1, r3
 80047b8:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80047bc:	d019      	beq.n	80047f2 <__aeabi_dmul+0x24a>
 80047be:	ea94 0f0c 	teq	r4, ip
 80047c2:	d102      	bne.n	80047ca <__aeabi_dmul+0x222>
 80047c4:	ea50 3601 	orrs.w	r6, r0, r1, lsl #12
 80047c8:	d113      	bne.n	80047f2 <__aeabi_dmul+0x24a>
 80047ca:	ea95 0f0c 	teq	r5, ip
 80047ce:	d105      	bne.n	80047dc <__aeabi_dmul+0x234>
 80047d0:	ea52 3603 	orrs.w	r6, r2, r3, lsl #12
 80047d4:	bf1c      	itt	ne
 80047d6:	4610      	movne	r0, r2
 80047d8:	4619      	movne	r1, r3
 80047da:	d10a      	bne.n	80047f2 <__aeabi_dmul+0x24a>
 80047dc:	ea81 0103 	eor.w	r1, r1, r3
 80047e0:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047e4:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 80047e8:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 80047ec:	f04f 0000 	mov.w	r0, #0
 80047f0:	bd70      	pop	{r4, r5, r6, pc}
 80047f2:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 80047f6:	f441 0178 	orr.w	r1, r1, #16252928	; 0xf80000
 80047fa:	bd70      	pop	{r4, r5, r6, pc}

080047fc <__aeabi_ddiv>:
 80047fc:	b570      	push	{r4, r5, r6, lr}
 80047fe:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004802:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 8004806:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 800480a:	bf1d      	ittte	ne
 800480c:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 8004810:	ea94 0f0c 	teqne	r4, ip
 8004814:	ea95 0f0c 	teqne	r5, ip
 8004818:	f000 f8a7 	bleq	800496a <__aeabi_ddiv+0x16e>
 800481c:	eba4 0405 	sub.w	r4, r4, r5
 8004820:	ea81 0e03 	eor.w	lr, r1, r3
 8004824:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 8004828:	ea4f 3101 	mov.w	r1, r1, lsl #12
 800482c:	f000 8088 	beq.w	8004940 <__aeabi_ddiv+0x144>
 8004830:	ea4f 3303 	mov.w	r3, r3, lsl #12
 8004834:	f04f 5580 	mov.w	r5, #268435456	; 0x10000000
 8004838:	ea45 1313 	orr.w	r3, r5, r3, lsr #4
 800483c:	ea43 6312 	orr.w	r3, r3, r2, lsr #24
 8004840:	ea4f 2202 	mov.w	r2, r2, lsl #8
 8004844:	ea45 1511 	orr.w	r5, r5, r1, lsr #4
 8004848:	ea45 6510 	orr.w	r5, r5, r0, lsr #24
 800484c:	ea4f 2600 	mov.w	r6, r0, lsl #8
 8004850:	f00e 4100 	and.w	r1, lr, #2147483648	; 0x80000000
 8004854:	429d      	cmp	r5, r3
 8004856:	bf08      	it	eq
 8004858:	4296      	cmpeq	r6, r2
 800485a:	f144 04fd 	adc.w	r4, r4, #253	; 0xfd
 800485e:	f504 7440 	add.w	r4, r4, #768	; 0x300
 8004862:	d202      	bcs.n	800486a <__aeabi_ddiv+0x6e>
 8004864:	085b      	lsrs	r3, r3, #1
 8004866:	ea4f 0232 	mov.w	r2, r2, rrx
 800486a:	1ab6      	subs	r6, r6, r2
 800486c:	eb65 0503 	sbc.w	r5, r5, r3
 8004870:	085b      	lsrs	r3, r3, #1
 8004872:	ea4f 0232 	mov.w	r2, r2, rrx
 8004876:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
 800487a:	f44f 2c00 	mov.w	ip, #524288	; 0x80000
 800487e:	ebb6 0e02 	subs.w	lr, r6, r2
 8004882:	eb75 0e03 	sbcs.w	lr, r5, r3
 8004886:	bf22      	ittt	cs
 8004888:	1ab6      	subcs	r6, r6, r2
 800488a:	4675      	movcs	r5, lr
 800488c:	ea40 000c 	orrcs.w	r0, r0, ip
 8004890:	085b      	lsrs	r3, r3, #1
 8004892:	ea4f 0232 	mov.w	r2, r2, rrx
 8004896:	ebb6 0e02 	subs.w	lr, r6, r2
 800489a:	eb75 0e03 	sbcs.w	lr, r5, r3
 800489e:	bf22      	ittt	cs
 80048a0:	1ab6      	subcs	r6, r6, r2
 80048a2:	4675      	movcs	r5, lr
 80048a4:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
 80048a8:	085b      	lsrs	r3, r3, #1
 80048aa:	ea4f 0232 	mov.w	r2, r2, rrx
 80048ae:	ebb6 0e02 	subs.w	lr, r6, r2
 80048b2:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048b6:	bf22      	ittt	cs
 80048b8:	1ab6      	subcs	r6, r6, r2
 80048ba:	4675      	movcs	r5, lr
 80048bc:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
 80048c0:	085b      	lsrs	r3, r3, #1
 80048c2:	ea4f 0232 	mov.w	r2, r2, rrx
 80048c6:	ebb6 0e02 	subs.w	lr, r6, r2
 80048ca:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048ce:	bf22      	ittt	cs
 80048d0:	1ab6      	subcs	r6, r6, r2
 80048d2:	4675      	movcs	r5, lr
 80048d4:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
 80048d8:	ea55 0e06 	orrs.w	lr, r5, r6
 80048dc:	d018      	beq.n	8004910 <__aeabi_ddiv+0x114>
 80048de:	ea4f 1505 	mov.w	r5, r5, lsl #4
 80048e2:	ea45 7516 	orr.w	r5, r5, r6, lsr #28
 80048e6:	ea4f 1606 	mov.w	r6, r6, lsl #4
 80048ea:	ea4f 03c3 	mov.w	r3, r3, lsl #3
 80048ee:	ea43 7352 	orr.w	r3, r3, r2, lsr #29
 80048f2:	ea4f 02c2 	mov.w	r2, r2, lsl #3
 80048f6:	ea5f 1c1c 	movs.w	ip, ip, lsr #4
 80048fa:	d1c0      	bne.n	800487e <__aeabi_ddiv+0x82>
 80048fc:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004900:	d10b      	bne.n	800491a <__aeabi_ddiv+0x11e>
 8004902:	ea41 0100 	orr.w	r1, r1, r0
 8004906:	f04f 0000 	mov.w	r0, #0
 800490a:	f04f 4c00 	mov.w	ip, #2147483648	; 0x80000000
 800490e:	e7b6      	b.n	800487e <__aeabi_ddiv+0x82>
 8004910:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004914:	bf04      	itt	eq
 8004916:	4301      	orreq	r1, r0
 8004918:	2000      	moveq	r0, #0
 800491a:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 800491e:	bf88      	it	hi
 8004920:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 8004924:	f63f aeaf 	bhi.w	8004686 <__aeabi_dmul+0xde>
 8004928:	ebb5 0c03 	subs.w	ip, r5, r3
 800492c:	bf04      	itt	eq
 800492e:	ebb6 0c02 	subseq.w	ip, r6, r2
 8004932:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 8004936:	f150 0000 	adcs.w	r0, r0, #0
 800493a:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 800493e:	bd70      	pop	{r4, r5, r6, pc}
 8004940:	f00e 4e00 	and.w	lr, lr, #2147483648	; 0x80000000
 8004944:	ea4e 3111 	orr.w	r1, lr, r1, lsr #12
 8004948:	eb14 045c 	adds.w	r4, r4, ip, lsr #1
 800494c:	bfc2      	ittt	gt
 800494e:	ebd4 050c 	rsbsgt	r5, r4, ip
 8004952:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 8004956:	bd70      	popgt	{r4, r5, r6, pc}
 8004958:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 800495c:	f04f 0e00 	mov.w	lr, #0
 8004960:	3c01      	subs	r4, #1
 8004962:	e690      	b.n	8004686 <__aeabi_dmul+0xde>
 8004964:	ea45 0e06 	orr.w	lr, r5, r6
 8004968:	e68d      	b.n	8004686 <__aeabi_dmul+0xde>
 800496a:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 800496e:	ea94 0f0c 	teq	r4, ip
 8004972:	bf08      	it	eq
 8004974:	ea95 0f0c 	teqeq	r5, ip
 8004978:	f43f af3b 	beq.w	80047f2 <__aeabi_dmul+0x24a>
 800497c:	ea94 0f0c 	teq	r4, ip
 8004980:	d10a      	bne.n	8004998 <__aeabi_ddiv+0x19c>
 8004982:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 8004986:	f47f af34 	bne.w	80047f2 <__aeabi_dmul+0x24a>
 800498a:	ea95 0f0c 	teq	r5, ip
 800498e:	f47f af25 	bne.w	80047dc <__aeabi_dmul+0x234>
 8004992:	4610      	mov	r0, r2
 8004994:	4619      	mov	r1, r3
 8004996:	e72c      	b.n	80047f2 <__aeabi_dmul+0x24a>
 8004998:	ea95 0f0c 	teq	r5, ip
 800499c:	d106      	bne.n	80049ac <__aeabi_ddiv+0x1b0>
 800499e:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 80049a2:	f43f aefd 	beq.w	80047a0 <__aeabi_dmul+0x1f8>
 80049a6:	4610      	mov	r0, r2
 80049a8:	4619      	mov	r1, r3
 80049aa:	e722      	b.n	80047f2 <__aeabi_dmul+0x24a>
 80049ac:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80049b0:	bf18      	it	ne
 80049b2:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80049b6:	f47f aec5 	bne.w	8004744 <__aeabi_dmul+0x19c>
 80049ba:	ea50 0441 	orrs.w	r4, r0, r1, lsl #1
 80049be:	f47f af0d 	bne.w	80047dc <__aeabi_dmul+0x234>
 80049c2:	ea52 0543 	orrs.w	r5, r2, r3, lsl #1
 80049c6:	f47f aeeb 	bne.w	80047a0 <__aeabi_dmul+0x1f8>
 80049ca:	e712      	b.n	80047f2 <__aeabi_dmul+0x24a>

080049cc <__gedf2>:
 80049cc:	f04f 3cff 	mov.w	ip, #4294967295
 80049d0:	e006      	b.n	80049e0 <__cmpdf2+0x4>
 80049d2:	bf00      	nop

080049d4 <__ledf2>:
 80049d4:	f04f 0c01 	mov.w	ip, #1
 80049d8:	e002      	b.n	80049e0 <__cmpdf2+0x4>
 80049da:	bf00      	nop

080049dc <__cmpdf2>:
 80049dc:	f04f 0c01 	mov.w	ip, #1
 80049e0:	f84d cd04 	str.w	ip, [sp, #-4]!
 80049e4:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 80049e8:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 80049ec:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 80049f0:	bf18      	it	ne
 80049f2:	ea7f 5c6c 	mvnsne.w	ip, ip, asr #21
 80049f6:	d01b      	beq.n	8004a30 <__cmpdf2+0x54>
 80049f8:	b001      	add	sp, #4
 80049fa:	ea50 0c41 	orrs.w	ip, r0, r1, lsl #1
 80049fe:	bf0c      	ite	eq
 8004a00:	ea52 0c43 	orrseq.w	ip, r2, r3, lsl #1
 8004a04:	ea91 0f03 	teqne	r1, r3
 8004a08:	bf02      	ittt	eq
 8004a0a:	ea90 0f02 	teqeq	r0, r2
 8004a0e:	2000      	moveq	r0, #0
 8004a10:	4770      	bxeq	lr
 8004a12:	f110 0f00 	cmn.w	r0, #0
 8004a16:	ea91 0f03 	teq	r1, r3
 8004a1a:	bf58      	it	pl
 8004a1c:	4299      	cmppl	r1, r3
 8004a1e:	bf08      	it	eq
 8004a20:	4290      	cmpeq	r0, r2
 8004a22:	bf2c      	ite	cs
 8004a24:	17d8      	asrcs	r0, r3, #31
 8004a26:	ea6f 70e3 	mvncc.w	r0, r3, asr #31
 8004a2a:	f040 0001 	orr.w	r0, r0, #1
 8004a2e:	4770      	bx	lr
 8004a30:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004a34:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a38:	d102      	bne.n	8004a40 <__cmpdf2+0x64>
 8004a3a:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004a3e:	d107      	bne.n	8004a50 <__cmpdf2+0x74>
 8004a40:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004a44:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a48:	d1d6      	bne.n	80049f8 <__cmpdf2+0x1c>
 8004a4a:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004a4e:	d0d3      	beq.n	80049f8 <__cmpdf2+0x1c>
 8004a50:	f85d 0b04 	ldr.w	r0, [sp], #4
 8004a54:	4770      	bx	lr
 8004a56:	bf00      	nop

08004a58 <__aeabi_cdrcmple>:
 8004a58:	4684      	mov	ip, r0
 8004a5a:	4610      	mov	r0, r2
 8004a5c:	4662      	mov	r2, ip
 8004a5e:	468c      	mov	ip, r1
 8004a60:	4619      	mov	r1, r3
 8004a62:	4663      	mov	r3, ip
 8004a64:	e000      	b.n	8004a68 <__aeabi_cdcmpeq>
 8004a66:	bf00      	nop

08004a68 <__aeabi_cdcmpeq>:
 8004a68:	b501      	push	{r0, lr}
 8004a6a:	f7ff ffb7 	bl	80049dc <__cmpdf2>
 8004a6e:	2800      	cmp	r0, #0
 8004a70:	bf48      	it	mi
 8004a72:	f110 0f00 	cmnmi.w	r0, #0
 8004a76:	bd01      	pop	{r0, pc}

08004a78 <__aeabi_dcmpeq>:
 8004a78:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004a7c:	f7ff fff4 	bl	8004a68 <__aeabi_cdcmpeq>
 8004a80:	bf0c      	ite	eq
 8004a82:	2001      	moveq	r0, #1
 8004a84:	2000      	movne	r0, #0
 8004a86:	f85d fb08 	ldr.w	pc, [sp], #8
 8004a8a:	bf00      	nop

08004a8c <__aeabi_dcmplt>:
 8004a8c:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004a90:	f7ff ffea 	bl	8004a68 <__aeabi_cdcmpeq>
 8004a94:	bf34      	ite	cc
 8004a96:	2001      	movcc	r0, #1
 8004a98:	2000      	movcs	r0, #0
 8004a9a:	f85d fb08 	ldr.w	pc, [sp], #8
 8004a9e:	bf00      	nop

08004aa0 <__aeabi_dcmple>:
 8004aa0:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004aa4:	f7ff ffe0 	bl	8004a68 <__aeabi_cdcmpeq>
 8004aa8:	bf94      	ite	ls
 8004aaa:	2001      	movls	r0, #1
 8004aac:	2000      	movhi	r0, #0
 8004aae:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ab2:	bf00      	nop

08004ab4 <__aeabi_dcmpge>:
 8004ab4:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004ab8:	f7ff ffce 	bl	8004a58 <__aeabi_cdrcmple>
 8004abc:	bf94      	ite	ls
 8004abe:	2001      	movls	r0, #1
 8004ac0:	2000      	movhi	r0, #0
 8004ac2:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ac6:	bf00      	nop

08004ac8 <__aeabi_dcmpgt>:
 8004ac8:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004acc:	f7ff ffc4 	bl	8004a58 <__aeabi_cdrcmple>
 8004ad0:	bf34      	ite	cc
 8004ad2:	2001      	movcc	r0, #1
 8004ad4:	2000      	movcs	r0, #0
 8004ad6:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ada:	bf00      	nop

08004adc <__aeabi_dcmpun>:
 8004adc:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004ae0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004ae4:	d102      	bne.n	8004aec <__aeabi_dcmpun+0x10>
 8004ae6:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004aea:	d10a      	bne.n	8004b02 <__aeabi_dcmpun+0x26>
 8004aec:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004af0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004af4:	d102      	bne.n	8004afc <__aeabi_dcmpun+0x20>
 8004af6:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004afa:	d102      	bne.n	8004b02 <__aeabi_dcmpun+0x26>
 8004afc:	f04f 0000 	mov.w	r0, #0
 8004b00:	4770      	bx	lr
 8004b02:	f04f 0001 	mov.w	r0, #1
 8004b06:	4770      	bx	lr

08004b08 <__aeabi_d2iz>:
 8004b08:	ea4f 0241 	mov.w	r2, r1, lsl #1
 8004b0c:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
 8004b10:	d215      	bcs.n	8004b3e <__aeabi_d2iz+0x36>
 8004b12:	d511      	bpl.n	8004b38 <__aeabi_d2iz+0x30>
 8004b14:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
 8004b18:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
 8004b1c:	d912      	bls.n	8004b44 <__aeabi_d2iz+0x3c>
 8004b1e:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004b22:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8004b26:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
 8004b2a:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 8004b2e:	fa23 f002 	lsr.w	r0, r3, r2
 8004b32:	bf18      	it	ne
 8004b34:	4240      	negne	r0, r0
 8004b36:	4770      	bx	lr
 8004b38:	f04f 0000 	mov.w	r0, #0
 8004b3c:	4770      	bx	lr
 8004b3e:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
 8004b42:	d105      	bne.n	8004b50 <__aeabi_d2iz+0x48>
 8004b44:	f011 4000 	ands.w	r0, r1, #2147483648	; 0x80000000
 8004b48:	bf08      	it	eq
 8004b4a:	f06f 4000 	mvneq.w	r0, #2147483648	; 0x80000000
 8004b4e:	4770      	bx	lr
 8004b50:	f04f 0000 	mov.w	r0, #0
 8004b54:	4770      	bx	lr
 8004b56:	bf00      	nop

08004b58 <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8004b58:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8004b5a:	4b0e      	ldr	r3, [pc, #56]	; (8004b94 <HAL_InitTick+0x3c>)
{
 8004b5c:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8004b5e:	7818      	ldrb	r0, [r3, #0]
 8004b60:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8004b64:	fbb3 f3f0 	udiv	r3, r3, r0
 8004b68:	4a0b      	ldr	r2, [pc, #44]	; (8004b98 <HAL_InitTick+0x40>)
 8004b6a:	6810      	ldr	r0, [r2, #0]
 8004b6c:	fbb0 f0f3 	udiv	r0, r0, r3
 8004b70:	f000 fb4c 	bl	800520c <HAL_SYSTICK_Config>
 8004b74:	4604      	mov	r4, r0
 8004b76:	b958      	cbnz	r0, 8004b90 <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8004b78:	2d0f      	cmp	r5, #15
 8004b7a:	d809      	bhi.n	8004b90 <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8004b7c:	4602      	mov	r2, r0
 8004b7e:	4629      	mov	r1, r5
 8004b80:	f04f 30ff 	mov.w	r0, #4294967295
 8004b84:	f000 fb00 	bl	8005188 <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 8004b88:	4b04      	ldr	r3, [pc, #16]	; (8004b9c <HAL_InitTick+0x44>)
 8004b8a:	4620      	mov	r0, r4
 8004b8c:	601d      	str	r5, [r3, #0]
 8004b8e:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 8004b90:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 8004b92:	bd38      	pop	{r3, r4, r5, pc}
 8004b94:	20000000 	.word	0x20000000
 8004b98:	20000208 	.word	0x20000208
 8004b9c:	20000004 	.word	0x20000004

08004ba0 <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8004ba0:	4a07      	ldr	r2, [pc, #28]	; (8004bc0 <HAL_Init+0x20>)
{
 8004ba2:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8004ba4:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8004ba6:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8004ba8:	f043 0310 	orr.w	r3, r3, #16
 8004bac:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8004bae:	f000 fad9 	bl	8005164 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 8004bb2:	2000      	movs	r0, #0
 8004bb4:	f7ff ffd0 	bl	8004b58 <HAL_InitTick>
  HAL_MspInit();
 8004bb8:	f002 f812 	bl	8006be0 <HAL_MspInit>
}
 8004bbc:	2000      	movs	r0, #0
 8004bbe:	bd08      	pop	{r3, pc}
 8004bc0:	40022000 	.word	0x40022000

08004bc4 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 8004bc4:	4a03      	ldr	r2, [pc, #12]	; (8004bd4 <HAL_IncTick+0x10>)
 8004bc6:	4b04      	ldr	r3, [pc, #16]	; (8004bd8 <HAL_IncTick+0x14>)
 8004bc8:	6811      	ldr	r1, [r2, #0]
 8004bca:	781b      	ldrb	r3, [r3, #0]
 8004bcc:	440b      	add	r3, r1
 8004bce:	6013      	str	r3, [r2, #0]
 8004bd0:	4770      	bx	lr
 8004bd2:	bf00      	nop
 8004bd4:	20000418 	.word	0x20000418
 8004bd8:	20000000 	.word	0x20000000

08004bdc <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 8004bdc:	4b01      	ldr	r3, [pc, #4]	; (8004be4 <HAL_GetTick+0x8>)
 8004bde:	6818      	ldr	r0, [r3, #0]
}
 8004be0:	4770      	bx	lr
 8004be2:	bf00      	nop
 8004be4:	20000418 	.word	0x20000418

08004be8 <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 8004be8:	b538      	push	{r3, r4, r5, lr}
 8004bea:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 8004bec:	f7ff fff6 	bl	8004bdc <HAL_GetTick>
 8004bf0:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 8004bf2:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 8004bf4:	bf1e      	ittt	ne
 8004bf6:	4b04      	ldrne	r3, [pc, #16]	; (8004c08 <HAL_Delay+0x20>)
 8004bf8:	781b      	ldrbne	r3, [r3, #0]
 8004bfa:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 8004bfc:	f7ff ffee 	bl	8004bdc <HAL_GetTick>
 8004c00:	1b40      	subs	r0, r0, r5
 8004c02:	4284      	cmp	r4, r0
 8004c04:	d8fa      	bhi.n	8004bfc <HAL_Delay+0x14>
  {
  }
}
 8004c06:	bd38      	pop	{r3, r4, r5, pc}
 8004c08:	20000000 	.word	0x20000000

08004c0c <HAL_ADC_ConvCpltCallback>:
 8004c0c:	4770      	bx	lr

08004c0e <ADC_DMAConvCplt>:
  * @retval None
  */
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8004c0e:	6a43      	ldr	r3, [r0, #36]	; 0x24
{
 8004c10:	b510      	push	{r4, lr}
 
  /* Update state machine on conversion status if not in error state */
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
 8004c12:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004c14:	f012 0f50 	tst.w	r2, #80	; 0x50
 8004c18:	d11b      	bne.n	8004c52 <ADC_DMAConvCplt+0x44>
  {
    /* Update ADC state machine */
    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
 8004c1a:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004c1c:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8004c20:	629a      	str	r2, [r3, #40]	; 0x28
    /* Determine whether any further conversion upcoming on group regular     */
    /* by external trigger, continuous mode or scan sequence on going.        */
    /* Note: On STM32F1 devices, in case of sequencer enabled                 */
    /*       (several ranks selected), end of conversion flag is raised       */
    /*       at the end of the sequence.                                      */
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
 8004c22:	681a      	ldr	r2, [r3, #0]
 8004c24:	6892      	ldr	r2, [r2, #8]
 8004c26:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
 8004c2a:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
 8004c2e:	d10c      	bne.n	8004c4a <ADC_DMAConvCplt+0x3c>
 8004c30:	7b1a      	ldrb	r2, [r3, #12]
 8004c32:	b952      	cbnz	r2, 8004c4a <ADC_DMAConvCplt+0x3c>
       (hadc->Init.ContinuousConvMode == DISABLE)   )
    {
      /* Set ADC state */
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);   
 8004c34:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004c36:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 8004c3a:	629a      	str	r2, [r3, #40]	; 0x28
      
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8004c3c:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004c3e:	04d2      	lsls	r2, r2, #19
      {
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 8004c40:	bf5e      	ittt	pl
 8004c42:	6a9a      	ldrpl	r2, [r3, #40]	; 0x28
 8004c44:	f042 0201 	orrpl.w	r2, r2, #1
 8004c48:	629a      	strpl	r2, [r3, #40]	; 0x28
    
    /* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
    hadc->ConvCpltCallback(hadc);
#else
    HAL_ADC_ConvCpltCallback(hadc);
 8004c4a:	4618      	mov	r0, r3
 8004c4c:	f7ff ffde 	bl	8004c0c <HAL_ADC_ConvCpltCallback>
 8004c50:	bd10      	pop	{r4, pc}
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  }
  else
  {
    /* Call DMA error callback */
    hadc->DMA_Handle->XferErrorCallback(hdma);
 8004c52:	6a1b      	ldr	r3, [r3, #32]
  }
}
 8004c54:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    hadc->DMA_Handle->XferErrorCallback(hdma);
 8004c58:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8004c5a:	4718      	bx	r3

08004c5c <HAL_ADC_ConvHalfCpltCallback>:
 8004c5c:	4770      	bx	lr

08004c5e <ADC_DMAHalfConvCplt>:
  * @brief  DMA half transfer complete callback. 
  * @param  hdma: pointer to DMA handle.
  * @retval None
  */
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)   
{
 8004c5e:	b508      	push	{r3, lr}
  
  /* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
    hadc->ConvHalfCpltCallback(hadc);
#else
  HAL_ADC_ConvHalfCpltCallback(hadc);
 8004c60:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8004c62:	f7ff fffb 	bl	8004c5c <HAL_ADC_ConvHalfCpltCallback>
 8004c66:	bd08      	pop	{r3, pc}

08004c68 <HAL_ADC_LevelOutOfWindowCallback>:
 8004c68:	4770      	bx	lr

08004c6a <HAL_ADC_IRQHandler>:
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
 8004c6a:	6803      	ldr	r3, [r0, #0]
{
 8004c6c:	b510      	push	{r4, lr}
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
 8004c6e:	685a      	ldr	r2, [r3, #4]
{
 8004c70:	4604      	mov	r4, r0
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
 8004c72:	0690      	lsls	r0, r2, #26
 8004c74:	d527      	bpl.n	8004cc6 <HAL_ADC_IRQHandler+0x5c>
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) )
 8004c76:	681a      	ldr	r2, [r3, #0]
 8004c78:	0791      	lsls	r1, r2, #30
 8004c7a:	d524      	bpl.n	8004cc6 <HAL_ADC_IRQHandler+0x5c>
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
 8004c7c:	6aa2      	ldr	r2, [r4, #40]	; 0x28
 8004c7e:	06d2      	lsls	r2, r2, #27
        SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 
 8004c80:	bf5e      	ittt	pl
 8004c82:	6aa2      	ldrpl	r2, [r4, #40]	; 0x28
 8004c84:	f442 7200 	orrpl.w	r2, r2, #512	; 0x200
 8004c88:	62a2      	strpl	r2, [r4, #40]	; 0x28
      if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
 8004c8a:	689a      	ldr	r2, [r3, #8]
 8004c8c:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
 8004c90:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
 8004c94:	d110      	bne.n	8004cb8 <HAL_ADC_IRQHandler+0x4e>
 8004c96:	7b22      	ldrb	r2, [r4, #12]
 8004c98:	b972      	cbnz	r2, 8004cb8 <HAL_ADC_IRQHandler+0x4e>
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
 8004c9a:	685a      	ldr	r2, [r3, #4]
 8004c9c:	f022 0220 	bic.w	r2, r2, #32
 8004ca0:	605a      	str	r2, [r3, #4]
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);   
 8004ca2:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8004ca4:	f423 7380 	bic.w	r3, r3, #256	; 0x100
 8004ca8:	62a3      	str	r3, [r4, #40]	; 0x28
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8004caa:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8004cac:	04db      	lsls	r3, r3, #19
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 8004cae:	bf5e      	ittt	pl
 8004cb0:	6aa3      	ldrpl	r3, [r4, #40]	; 0x28
 8004cb2:	f043 0301 	orrpl.w	r3, r3, #1
 8004cb6:	62a3      	strpl	r3, [r4, #40]	; 0x28
      HAL_ADC_ConvCpltCallback(hadc);
 8004cb8:	4620      	mov	r0, r4
 8004cba:	f7ff ffa7 	bl	8004c0c <HAL_ADC_ConvCpltCallback>
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
 8004cbe:	f06f 0212 	mvn.w	r2, #18
 8004cc2:	6823      	ldr	r3, [r4, #0]
 8004cc4:	601a      	str	r2, [r3, #0]
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC))
 8004cc6:	6823      	ldr	r3, [r4, #0]
 8004cc8:	685a      	ldr	r2, [r3, #4]
 8004cca:	0610      	lsls	r0, r2, #24
 8004ccc:	d530      	bpl.n	8004d30 <HAL_ADC_IRQHandler+0xc6>
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))
 8004cce:	681a      	ldr	r2, [r3, #0]
 8004cd0:	0751      	lsls	r1, r2, #29
 8004cd2:	d52d      	bpl.n	8004d30 <HAL_ADC_IRQHandler+0xc6>
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
 8004cd4:	6aa2      	ldr	r2, [r4, #40]	; 0x28
 8004cd6:	06d2      	lsls	r2, r2, #27
        SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
 8004cd8:	bf5e      	ittt	pl
 8004cda:	6aa2      	ldrpl	r2, [r4, #40]	; 0x28
 8004cdc:	f442 5200 	orrpl.w	r2, r2, #8192	; 0x2000
 8004ce0:	62a2      	strpl	r2, [r4, #40]	; 0x28
      if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                     || 
 8004ce2:	689a      	ldr	r2, [r3, #8]
 8004ce4:	f402 42e0 	and.w	r2, r2, #28672	; 0x7000
 8004ce8:	f5b2 4fe0 	cmp.w	r2, #28672	; 0x7000
 8004cec:	d00a      	beq.n	8004d04 <HAL_ADC_IRQHandler+0x9a>
         (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&     
 8004cee:	685a      	ldr	r2, [r3, #4]
      if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                     || 
 8004cf0:	0550      	lsls	r0, r2, #21
 8004cf2:	d416      	bmi.n	8004d22 <HAL_ADC_IRQHandler+0xb8>
         (ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
 8004cf4:	689a      	ldr	r2, [r3, #8]
 8004cf6:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
         (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&     
 8004cfa:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
 8004cfe:	d110      	bne.n	8004d22 <HAL_ADC_IRQHandler+0xb8>
         (ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
 8004d00:	7b22      	ldrb	r2, [r4, #12]
 8004d02:	b972      	cbnz	r2, 8004d22 <HAL_ADC_IRQHandler+0xb8>
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
 8004d04:	685a      	ldr	r2, [r3, #4]
 8004d06:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8004d0a:	605a      	str	r2, [r3, #4]
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);   
 8004d0c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8004d0e:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 8004d12:	62a3      	str	r3, [r4, #40]	; 0x28
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 8004d14:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8004d16:	05d9      	lsls	r1, r3, #23
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 8004d18:	bf5e      	ittt	pl
 8004d1a:	6aa3      	ldrpl	r3, [r4, #40]	; 0x28
 8004d1c:	f043 0301 	orrpl.w	r3, r3, #1
 8004d20:	62a3      	strpl	r3, [r4, #40]	; 0x28
      HAL_ADCEx_InjectedConvCpltCallback(hadc);
 8004d22:	4620      	mov	r0, r4
 8004d24:	f000 fa1c 	bl	8005160 <HAL_ADCEx_InjectedConvCpltCallback>
      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
 8004d28:	f06f 020c 	mvn.w	r2, #12
 8004d2c:	6823      	ldr	r3, [r4, #0]
 8004d2e:	601a      	str	r2, [r3, #0]
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
 8004d30:	6823      	ldr	r3, [r4, #0]
 8004d32:	685a      	ldr	r2, [r3, #4]
 8004d34:	0652      	lsls	r2, r2, #25
 8004d36:	d50d      	bpl.n	8004d54 <HAL_ADC_IRQHandler+0xea>
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
 8004d38:	681b      	ldr	r3, [r3, #0]
 8004d3a:	07db      	lsls	r3, r3, #31
 8004d3c:	d50a      	bpl.n	8004d54 <HAL_ADC_IRQHandler+0xea>
      SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
 8004d3e:	6aa3      	ldr	r3, [r4, #40]	; 0x28
      HAL_ADC_LevelOutOfWindowCallback(hadc);
 8004d40:	4620      	mov	r0, r4
      SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
 8004d42:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8004d46:	62a3      	str	r3, [r4, #40]	; 0x28
      HAL_ADC_LevelOutOfWindowCallback(hadc);
 8004d48:	f7ff ff8e 	bl	8004c68 <HAL_ADC_LevelOutOfWindowCallback>
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
 8004d4c:	f06f 0201 	mvn.w	r2, #1
 8004d50:	6823      	ldr	r3, [r4, #0]
 8004d52:	601a      	str	r2, [r3, #0]
 8004d54:	bd10      	pop	{r4, pc}

08004d56 <HAL_ADC_ErrorCallback>:
{
 8004d56:	4770      	bx	lr

08004d58 <ADC_DMAError>:
  * @retval None
  */
void ADC_DMAError(DMA_HandleTypeDef *hdma)   
{
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8004d58:	6a40      	ldr	r0, [r0, #36]	; 0x24
{
 8004d5a:	b508      	push	{r3, lr}
  
  /* Set ADC state */
  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
 8004d5c:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8004d5e:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8004d62:	6283      	str	r3, [r0, #40]	; 0x28
  
  /* Set ADC error code to DMA error */
  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
 8004d64:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
 8004d66:	f043 0304 	orr.w	r3, r3, #4
 8004d6a:	62c3      	str	r3, [r0, #44]	; 0x2c
  
  /* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  hadc->ErrorCallback(hadc);
#else
  HAL_ADC_ErrorCallback(hadc);
 8004d6c:	f7ff fff3 	bl	8004d56 <HAL_ADC_ErrorCallback>
 8004d70:	bd08      	pop	{r3, pc}
	...

08004d74 <HAL_ADC_ConfigChannel>:
  __IO uint32_t wait_loop_index = 0U;
 8004d74:	2300      	movs	r3, #0
{ 
 8004d76:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 8004d78:	9301      	str	r3, [sp, #4]
  __HAL_LOCK(hadc);
 8004d7a:	f890 3024 	ldrb.w	r3, [r0, #36]	; 0x24
 8004d7e:	2b01      	cmp	r3, #1
 8004d80:	d074      	beq.n	8004e6c <HAL_ADC_ConfigChannel+0xf8>
 8004d82:	2301      	movs	r3, #1
  if (sConfig->Rank < 7U)
 8004d84:	684d      	ldr	r5, [r1, #4]
  __HAL_LOCK(hadc);
 8004d86:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
  if (sConfig->Rank < 7U)
 8004d8a:	2d06      	cmp	r5, #6
 8004d8c:	6802      	ldr	r2, [r0, #0]
 8004d8e:	ea4f 0385 	mov.w	r3, r5, lsl #2
 8004d92:	680c      	ldr	r4, [r1, #0]
 8004d94:	d825      	bhi.n	8004de2 <HAL_ADC_ConfigChannel+0x6e>
    MODIFY_REG(hadc->Instance->SQR3                        ,
 8004d96:	442b      	add	r3, r5
 8004d98:	251f      	movs	r5, #31
 8004d9a:	6b56      	ldr	r6, [r2, #52]	; 0x34
 8004d9c:	3b05      	subs	r3, #5
 8004d9e:	409d      	lsls	r5, r3
 8004da0:	ea26 0505 	bic.w	r5, r6, r5
 8004da4:	fa04 f303 	lsl.w	r3, r4, r3
 8004da8:	432b      	orrs	r3, r5
 8004daa:	6353      	str	r3, [r2, #52]	; 0x34
  if (sConfig->Channel >= ADC_CHANNEL_10)
 8004dac:	2c09      	cmp	r4, #9
 8004dae:	ea4f 0344 	mov.w	r3, r4, lsl #1
 8004db2:	688d      	ldr	r5, [r1, #8]
 8004db4:	d92f      	bls.n	8004e16 <HAL_ADC_ConfigChannel+0xa2>
    MODIFY_REG(hadc->Instance->SMPR1                             ,
 8004db6:	2607      	movs	r6, #7
 8004db8:	4423      	add	r3, r4
 8004dba:	68d1      	ldr	r1, [r2, #12]
 8004dbc:	3b1e      	subs	r3, #30
 8004dbe:	409e      	lsls	r6, r3
 8004dc0:	ea21 0106 	bic.w	r1, r1, r6
 8004dc4:	fa05 f303 	lsl.w	r3, r5, r3
 8004dc8:	430b      	orrs	r3, r1
 8004dca:	60d3      	str	r3, [r2, #12]
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
 8004dcc:	f1a4 0310 	sub.w	r3, r4, #16
 8004dd0:	2b01      	cmp	r3, #1
 8004dd2:	d92b      	bls.n	8004e2c <HAL_ADC_ConfigChannel+0xb8>
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 8004dd4:	2300      	movs	r3, #0
  __HAL_UNLOCK(hadc);
 8004dd6:	2200      	movs	r2, #0
 8004dd8:	f880 2024 	strb.w	r2, [r0, #36]	; 0x24
}
 8004ddc:	4618      	mov	r0, r3
 8004dde:	b002      	add	sp, #8
 8004de0:	bd70      	pop	{r4, r5, r6, pc}
  else if (sConfig->Rank < 13U)
 8004de2:	2d0c      	cmp	r5, #12
 8004de4:	d80b      	bhi.n	8004dfe <HAL_ADC_ConfigChannel+0x8a>
    MODIFY_REG(hadc->Instance->SQR2                        ,
 8004de6:	442b      	add	r3, r5
 8004de8:	251f      	movs	r5, #31
 8004dea:	6b16      	ldr	r6, [r2, #48]	; 0x30
 8004dec:	3b23      	subs	r3, #35	; 0x23
 8004dee:	409d      	lsls	r5, r3
 8004df0:	ea26 0505 	bic.w	r5, r6, r5
 8004df4:	fa04 f303 	lsl.w	r3, r4, r3
 8004df8:	432b      	orrs	r3, r5
 8004dfa:	6313      	str	r3, [r2, #48]	; 0x30
 8004dfc:	e7d6      	b.n	8004dac <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SQR1                        ,
 8004dfe:	442b      	add	r3, r5
 8004e00:	251f      	movs	r5, #31
 8004e02:	6ad6      	ldr	r6, [r2, #44]	; 0x2c
 8004e04:	3b41      	subs	r3, #65	; 0x41
 8004e06:	409d      	lsls	r5, r3
 8004e08:	ea26 0505 	bic.w	r5, r6, r5
 8004e0c:	fa04 f303 	lsl.w	r3, r4, r3
 8004e10:	432b      	orrs	r3, r5
 8004e12:	62d3      	str	r3, [r2, #44]	; 0x2c
 8004e14:	e7ca      	b.n	8004dac <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SMPR2                             ,
 8004e16:	2607      	movs	r6, #7
 8004e18:	6911      	ldr	r1, [r2, #16]
 8004e1a:	4423      	add	r3, r4
 8004e1c:	409e      	lsls	r6, r3
 8004e1e:	ea21 0106 	bic.w	r1, r1, r6
 8004e22:	fa05 f303 	lsl.w	r3, r5, r3
 8004e26:	430b      	orrs	r3, r1
 8004e28:	6113      	str	r3, [r2, #16]
 8004e2a:	e7cf      	b.n	8004dcc <HAL_ADC_ConfigChannel+0x58>
    if (hadc->Instance == ADC1)
 8004e2c:	4b10      	ldr	r3, [pc, #64]	; (8004e70 <HAL_ADC_ConfigChannel+0xfc>)
 8004e2e:	429a      	cmp	r2, r3
 8004e30:	d116      	bne.n	8004e60 <HAL_ADC_ConfigChannel+0xec>
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
 8004e32:	6893      	ldr	r3, [r2, #8]
 8004e34:	021b      	lsls	r3, r3, #8
 8004e36:	d4cd      	bmi.n	8004dd4 <HAL_ADC_ConfigChannel+0x60>
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 8004e38:	6893      	ldr	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 8004e3a:	2c10      	cmp	r4, #16
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 8004e3c:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
 8004e40:	6093      	str	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 8004e42:	d1c7      	bne.n	8004dd4 <HAL_ADC_ConfigChannel+0x60>
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
 8004e44:	4b0b      	ldr	r3, [pc, #44]	; (8004e74 <HAL_ADC_ConfigChannel+0x100>)
 8004e46:	4a0c      	ldr	r2, [pc, #48]	; (8004e78 <HAL_ADC_ConfigChannel+0x104>)
 8004e48:	681b      	ldr	r3, [r3, #0]
 8004e4a:	fbb3 f2f2 	udiv	r2, r3, r2
 8004e4e:	230a      	movs	r3, #10
 8004e50:	4353      	muls	r3, r2
            wait_loop_index--;
 8004e52:	9301      	str	r3, [sp, #4]
          while(wait_loop_index != 0U)
 8004e54:	9b01      	ldr	r3, [sp, #4]
 8004e56:	2b00      	cmp	r3, #0
 8004e58:	d0bc      	beq.n	8004dd4 <HAL_ADC_ConfigChannel+0x60>
            wait_loop_index--;
 8004e5a:	9b01      	ldr	r3, [sp, #4]
 8004e5c:	3b01      	subs	r3, #1
 8004e5e:	e7f8      	b.n	8004e52 <HAL_ADC_ConfigChannel+0xde>
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 8004e60:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8004e62:	f043 0320 	orr.w	r3, r3, #32
 8004e66:	6283      	str	r3, [r0, #40]	; 0x28
      tmp_hal_status = HAL_ERROR;
 8004e68:	2301      	movs	r3, #1
 8004e6a:	e7b4      	b.n	8004dd6 <HAL_ADC_ConfigChannel+0x62>
  __HAL_LOCK(hadc);
 8004e6c:	2302      	movs	r3, #2
 8004e6e:	e7b5      	b.n	8004ddc <HAL_ADC_ConfigChannel+0x68>
 8004e70:	40012400 	.word	0x40012400
 8004e74:	20000208 	.word	0x20000208
 8004e78:	000f4240 	.word	0x000f4240

08004e7c <ADC_Enable>:
  __IO uint32_t wait_loop_index = 0U;
 8004e7c:	2300      	movs	r3, #0
{
 8004e7e:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 8004e80:	9301      	str	r3, [sp, #4]
  if (ADC_IS_ENABLE(hadc) == RESET)
 8004e82:	6803      	ldr	r3, [r0, #0]
{
 8004e84:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) == RESET)
 8004e86:	689a      	ldr	r2, [r3, #8]
 8004e88:	07d2      	lsls	r2, r2, #31
 8004e8a:	d502      	bpl.n	8004e92 <ADC_Enable+0x16>
  return HAL_OK;
 8004e8c:	2000      	movs	r0, #0
}
 8004e8e:	b002      	add	sp, #8
 8004e90:	bd70      	pop	{r4, r5, r6, pc}
    __HAL_ADC_ENABLE(hadc);
 8004e92:	689a      	ldr	r2, [r3, #8]
 8004e94:	f042 0201 	orr.w	r2, r2, #1
 8004e98:	609a      	str	r2, [r3, #8]
    wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
 8004e9a:	4b12      	ldr	r3, [pc, #72]	; (8004ee4 <ADC_Enable+0x68>)
 8004e9c:	4a12      	ldr	r2, [pc, #72]	; (8004ee8 <ADC_Enable+0x6c>)
 8004e9e:	681b      	ldr	r3, [r3, #0]
 8004ea0:	fbb3 f3f2 	udiv	r3, r3, r2
      wait_loop_index--;
 8004ea4:	9301      	str	r3, [sp, #4]
    while(wait_loop_index != 0U)
 8004ea6:	9b01      	ldr	r3, [sp, #4]
 8004ea8:	b9c3      	cbnz	r3, 8004edc <ADC_Enable+0x60>
    tickstart = HAL_GetTick();
 8004eaa:	f7ff fe97 	bl	8004bdc <HAL_GetTick>
 8004eae:	4606      	mov	r6, r0
    while(ADC_IS_ENABLE(hadc) == RESET)
 8004eb0:	6823      	ldr	r3, [r4, #0]
 8004eb2:	689d      	ldr	r5, [r3, #8]
 8004eb4:	f015 0501 	ands.w	r5, r5, #1
 8004eb8:	d1e8      	bne.n	8004e8c <ADC_Enable+0x10>
      if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
 8004eba:	f7ff fe8f 	bl	8004bdc <HAL_GetTick>
 8004ebe:	1b80      	subs	r0, r0, r6
 8004ec0:	2802      	cmp	r0, #2
 8004ec2:	d9f5      	bls.n	8004eb0 <ADC_Enable+0x34>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8004ec4:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        __HAL_UNLOCK(hadc);
 8004ec6:	f884 5024 	strb.w	r5, [r4, #36]	; 0x24
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8004eca:	f043 0310 	orr.w	r3, r3, #16
 8004ece:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8004ed0:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
        __HAL_UNLOCK(hadc);
 8004ed2:	2001      	movs	r0, #1
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8004ed4:	f043 0301 	orr.w	r3, r3, #1
 8004ed8:	62e3      	str	r3, [r4, #44]	; 0x2c
 8004eda:	e7d8      	b.n	8004e8e <ADC_Enable+0x12>
      wait_loop_index--;
 8004edc:	9b01      	ldr	r3, [sp, #4]
 8004ede:	3b01      	subs	r3, #1
 8004ee0:	e7e0      	b.n	8004ea4 <ADC_Enable+0x28>
 8004ee2:	bf00      	nop
 8004ee4:	20000208 	.word	0x20000208
 8004ee8:	000f4240 	.word	0x000f4240

08004eec <HAL_ADC_Start_DMA>:
{
 8004eec:	e92d 41d8 	stmdb	sp!, {r3, r4, r6, r7, r8, lr}
 8004ef0:	4690      	mov	r8, r2
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 8004ef2:	4b40      	ldr	r3, [pc, #256]	; (8004ff4 <HAL_ADC_Start_DMA+0x108>)
 8004ef4:	6802      	ldr	r2, [r0, #0]
{
 8004ef6:	4604      	mov	r4, r0
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 8004ef8:	429a      	cmp	r2, r3
{
 8004efa:	460f      	mov	r7, r1
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 8004efc:	d002      	beq.n	8004f04 <HAL_ADC_Start_DMA+0x18>
 8004efe:	493e      	ldr	r1, [pc, #248]	; (8004ff8 <HAL_ADC_Start_DMA+0x10c>)
 8004f00:	428a      	cmp	r2, r1
 8004f02:	d103      	bne.n	8004f0c <HAL_ADC_Start_DMA+0x20>
 8004f04:	685b      	ldr	r3, [r3, #4]
 8004f06:	f413 2f70 	tst.w	r3, #983040	; 0xf0000
 8004f0a:	d16e      	bne.n	8004fea <HAL_ADC_Start_DMA+0xfe>
    __HAL_LOCK(hadc);
 8004f0c:	f894 3024 	ldrb.w	r3, [r4, #36]	; 0x24
 8004f10:	2b01      	cmp	r3, #1
 8004f12:	d06c      	beq.n	8004fee <HAL_ADC_Start_DMA+0x102>
 8004f14:	2301      	movs	r3, #1
    tmp_hal_status = ADC_Enable(hadc);
 8004f16:	4620      	mov	r0, r4
    __HAL_LOCK(hadc);
 8004f18:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
    tmp_hal_status = ADC_Enable(hadc);
 8004f1c:	f7ff ffae 	bl	8004e7c <ADC_Enable>
    if (tmp_hal_status == HAL_OK)
 8004f20:	4606      	mov	r6, r0
 8004f22:	2800      	cmp	r0, #0
 8004f24:	d15d      	bne.n	8004fe2 <HAL_ADC_Start_DMA+0xf6>
      ADC_STATE_CLR_SET(hadc->State,
 8004f26:	6aa0      	ldr	r0, [r4, #40]	; 0x28
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8004f28:	6821      	ldr	r1, [r4, #0]
      ADC_STATE_CLR_SET(hadc->State,
 8004f2a:	f420 6070 	bic.w	r0, r0, #3840	; 0xf00
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8004f2e:	4b32      	ldr	r3, [pc, #200]	; (8004ff8 <HAL_ADC_Start_DMA+0x10c>)
      ADC_STATE_CLR_SET(hadc->State,
 8004f30:	f020 0001 	bic.w	r0, r0, #1
 8004f34:	f440 7080 	orr.w	r0, r0, #256	; 0x100
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8004f38:	4299      	cmp	r1, r3
      ADC_STATE_CLR_SET(hadc->State,
 8004f3a:	62a0      	str	r0, [r4, #40]	; 0x28
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8004f3c:	d104      	bne.n	8004f48 <HAL_ADC_Start_DMA+0x5c>
 8004f3e:	4a2d      	ldr	r2, [pc, #180]	; (8004ff4 <HAL_ADC_Start_DMA+0x108>)
 8004f40:	6853      	ldr	r3, [r2, #4]
 8004f42:	f413 2f70 	tst.w	r3, #983040	; 0xf0000
 8004f46:	d13e      	bne.n	8004fc6 <HAL_ADC_Start_DMA+0xda>
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 8004f48:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8004f4a:	f423 1380 	bic.w	r3, r3, #1048576	; 0x100000
 8004f4e:	62a3      	str	r3, [r4, #40]	; 0x28
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
 8004f50:	684b      	ldr	r3, [r1, #4]
 8004f52:	055a      	lsls	r2, r3, #21
 8004f54:	d505      	bpl.n	8004f62 <HAL_ADC_Start_DMA+0x76>
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
 8004f56:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8004f58:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8004f5c:	f443 5380 	orr.w	r3, r3, #4096	; 0x1000
 8004f60:	62a3      	str	r3, [r4, #40]	; 0x28
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8004f62:	6aa3      	ldr	r3, [r4, #40]	; 0x28
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8004f64:	6a20      	ldr	r0, [r4, #32]
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8004f66:	f413 5380 	ands.w	r3, r3, #4096	; 0x1000
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
 8004f6a:	bf18      	it	ne
 8004f6c:	6ae3      	ldrne	r3, [r4, #44]	; 0x2c
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 8004f6e:	463a      	mov	r2, r7
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
 8004f70:	bf18      	it	ne
 8004f72:	f023 0306 	bicne.w	r3, r3, #6
        ADC_CLEAR_ERRORCODE(hadc);
 8004f76:	62e3      	str	r3, [r4, #44]	; 0x2c
      __HAL_UNLOCK(hadc);
 8004f78:	2300      	movs	r3, #0
 8004f7a:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8004f7e:	4b1f      	ldr	r3, [pc, #124]	; (8004ffc <HAL_ADC_Start_DMA+0x110>)
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 8004f80:	314c      	adds	r1, #76	; 0x4c
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8004f82:	6283      	str	r3, [r0, #40]	; 0x28
      hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
 8004f84:	4b1e      	ldr	r3, [pc, #120]	; (8005000 <HAL_ADC_Start_DMA+0x114>)
 8004f86:	62c3      	str	r3, [r0, #44]	; 0x2c
      hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
 8004f88:	4b1e      	ldr	r3, [pc, #120]	; (8005004 <HAL_ADC_Start_DMA+0x118>)
 8004f8a:	6303      	str	r3, [r0, #48]	; 0x30
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
 8004f8c:	f06f 0302 	mvn.w	r3, #2
 8004f90:	f841 3c4c 	str.w	r3, [r1, #-76]
      SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
 8004f94:	f851 3c44 	ldr.w	r3, [r1, #-68]
 8004f98:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8004f9c:	f841 3c44 	str.w	r3, [r1, #-68]
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 8004fa0:	4643      	mov	r3, r8
 8004fa2:	f000 f989 	bl	80052b8 <HAL_DMA_Start_IT>
      if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
 8004fa6:	6823      	ldr	r3, [r4, #0]
 8004fa8:	689a      	ldr	r2, [r3, #8]
 8004faa:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
 8004fae:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
 8004fb2:	689a      	ldr	r2, [r3, #8]
 8004fb4:	bf0c      	ite	eq
 8004fb6:	f442 02a0 	orreq.w	r2, r2, #5242880	; 0x500000
        SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
 8004fba:	f442 1280 	orrne.w	r2, r2, #1048576	; 0x100000
 8004fbe:	609a      	str	r2, [r3, #8]
}
 8004fc0:	4630      	mov	r0, r6
 8004fc2:	e8bd 81d8 	ldmia.w	sp!, {r3, r4, r6, r7, r8, pc}
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 8004fc6:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8004fc8:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
 8004fcc:	62a3      	str	r3, [r4, #40]	; 0x28
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
 8004fce:	6853      	ldr	r3, [r2, #4]
 8004fd0:	055b      	lsls	r3, r3, #21
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
 8004fd2:	bf41      	itttt	mi
 8004fd4:	6aa0      	ldrmi	r0, [r4, #40]	; 0x28
 8004fd6:	f420 5040 	bicmi.w	r0, r0, #12288	; 0x3000
 8004fda:	f440 5080 	orrmi.w	r0, r0, #4096	; 0x1000
 8004fde:	62a0      	strmi	r0, [r4, #40]	; 0x28
 8004fe0:	e7bf      	b.n	8004f62 <HAL_ADC_Start_DMA+0x76>
      __HAL_UNLOCK(hadc);
 8004fe2:	2300      	movs	r3, #0
 8004fe4:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
 8004fe8:	e7ea      	b.n	8004fc0 <HAL_ADC_Start_DMA+0xd4>
    tmp_hal_status = HAL_ERROR;
 8004fea:	2601      	movs	r6, #1
 8004fec:	e7e8      	b.n	8004fc0 <HAL_ADC_Start_DMA+0xd4>
    __HAL_LOCK(hadc);
 8004fee:	2602      	movs	r6, #2
 8004ff0:	e7e6      	b.n	8004fc0 <HAL_ADC_Start_DMA+0xd4>
 8004ff2:	bf00      	nop
 8004ff4:	40012400 	.word	0x40012400
 8004ff8:	40012800 	.word	0x40012800
 8004ffc:	08004c0f 	.word	0x08004c0f
 8005000:	08004c5f 	.word	0x08004c5f
 8005004:	08004d59 	.word	0x08004d59

08005008 <ADC_ConversionStop_Disable>:
{
 8005008:	b538      	push	{r3, r4, r5, lr}
  if (ADC_IS_ENABLE(hadc) != RESET)
 800500a:	6803      	ldr	r3, [r0, #0]
{
 800500c:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) != RESET)
 800500e:	689a      	ldr	r2, [r3, #8]
 8005010:	07d2      	lsls	r2, r2, #31
 8005012:	d401      	bmi.n	8005018 <ADC_ConversionStop_Disable+0x10>
  return HAL_OK;
 8005014:	2000      	movs	r0, #0
 8005016:	bd38      	pop	{r3, r4, r5, pc}
    __HAL_ADC_DISABLE(hadc);
 8005018:	689a      	ldr	r2, [r3, #8]
 800501a:	f022 0201 	bic.w	r2, r2, #1
 800501e:	609a      	str	r2, [r3, #8]
    tickstart = HAL_GetTick();
 8005020:	f7ff fddc 	bl	8004bdc <HAL_GetTick>
 8005024:	4605      	mov	r5, r0
    while(ADC_IS_ENABLE(hadc) != RESET)
 8005026:	6823      	ldr	r3, [r4, #0]
 8005028:	689b      	ldr	r3, [r3, #8]
 800502a:	07db      	lsls	r3, r3, #31
 800502c:	d5f2      	bpl.n	8005014 <ADC_ConversionStop_Disable+0xc>
      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
 800502e:	f7ff fdd5 	bl	8004bdc <HAL_GetTick>
 8005032:	1b40      	subs	r0, r0, r5
 8005034:	2802      	cmp	r0, #2
 8005036:	d9f6      	bls.n	8005026 <ADC_ConversionStop_Disable+0x1e>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8005038:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 800503a:	2001      	movs	r0, #1
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 800503c:	f043 0310 	orr.w	r3, r3, #16
 8005040:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005042:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 8005044:	f043 0301 	orr.w	r3, r3, #1
 8005048:	62e3      	str	r3, [r4, #44]	; 0x2c
 800504a:	bd38      	pop	{r3, r4, r5, pc}

0800504c <HAL_ADC_Init>:
{
 800504c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  if(hadc == NULL)
 800504e:	4604      	mov	r4, r0
 8005050:	2800      	cmp	r0, #0
 8005052:	d077      	beq.n	8005144 <HAL_ADC_Init+0xf8>
  if (hadc->State == HAL_ADC_STATE_RESET)
 8005054:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005056:	b923      	cbnz	r3, 8005062 <HAL_ADC_Init+0x16>
    ADC_CLEAR_ERRORCODE(hadc);
 8005058:	62c3      	str	r3, [r0, #44]	; 0x2c
    hadc->Lock = HAL_UNLOCKED;
 800505a:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
    HAL_ADC_MspInit(hadc);
 800505e:	f001 fde1 	bl	8006c24 <HAL_ADC_MspInit>
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 8005062:	4620      	mov	r0, r4
 8005064:	f7ff ffd0 	bl	8005008 <ADC_ConversionStop_Disable>
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
 8005068:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800506a:	f013 0310 	ands.w	r3, r3, #16
 800506e:	d16b      	bne.n	8005148 <HAL_ADC_Init+0xfc>
 8005070:	2800      	cmp	r0, #0
 8005072:	d169      	bne.n	8005148 <HAL_ADC_Init+0xfc>
    ADC_STATE_CLR_SET(hadc->State,
 8005074:	6aa2      	ldr	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv)            |
 8005076:	4937      	ldr	r1, [pc, #220]	; (8005154 <HAL_ADC_Init+0x108>)
    ADC_STATE_CLR_SET(hadc->State,
 8005078:	f422 5288 	bic.w	r2, r2, #4352	; 0x1100
 800507c:	f022 0202 	bic.w	r2, r2, #2
 8005080:	f042 0202 	orr.w	r2, r2, #2
 8005084:	62a2      	str	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv)            |
 8005086:	e894 0024 	ldmia.w	r4, {r2, r5}
 800508a:	428a      	cmp	r2, r1
 800508c:	69e1      	ldr	r1, [r4, #28]
 800508e:	d104      	bne.n	800509a <HAL_ADC_Init+0x4e>
 8005090:	f5b1 2f40 	cmp.w	r1, #786432	; 0xc0000
 8005094:	bf08      	it	eq
 8005096:	f44f 2100 	moveq.w	r1, #524288	; 0x80000
                ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode)   );
 800509a:	7b26      	ldrb	r6, [r4, #12]
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv)            |
 800509c:	ea45 0546 	orr.w	r5, r5, r6, lsl #1
 80050a0:	4329      	orrs	r1, r5
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 80050a2:	68a5      	ldr	r5, [r4, #8]
 80050a4:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
 80050a8:	d035      	beq.n	8005116 <HAL_ADC_Init+0xca>
 80050aa:	2d01      	cmp	r5, #1
 80050ac:	bf08      	it	eq
 80050ae:	f44f 7380 	moveq.w	r3, #256	; 0x100
    if (hadc->Init.DiscontinuousConvMode == ENABLE)
 80050b2:	7d27      	ldrb	r7, [r4, #20]
 80050b4:	2f01      	cmp	r7, #1
 80050b6:	d106      	bne.n	80050c6 <HAL_ADC_Init+0x7a>
      if (hadc->Init.ContinuousConvMode == DISABLE)
 80050b8:	bb7e      	cbnz	r6, 800511a <HAL_ADC_Init+0xce>
        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
 80050ba:	69a6      	ldr	r6, [r4, #24]
 80050bc:	3e01      	subs	r6, #1
 80050be:	ea43 3346 	orr.w	r3, r3, r6, lsl #13
 80050c2:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
      MODIFY_REG(hadc->Instance->CR1,
 80050c6:	6856      	ldr	r6, [r2, #4]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80050c8:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
      MODIFY_REG(hadc->Instance->CR1,
 80050cc:	f426 4669 	bic.w	r6, r6, #59648	; 0xe900
 80050d0:	ea43 0306 	orr.w	r3, r3, r6
 80050d4:	6053      	str	r3, [r2, #4]
      MODIFY_REG(hadc->Instance->CR2,
 80050d6:	6896      	ldr	r6, [r2, #8]
 80050d8:	4b1f      	ldr	r3, [pc, #124]	; (8005158 <HAL_ADC_Init+0x10c>)
 80050da:	ea03 0306 	and.w	r3, r3, r6
 80050de:	ea43 0301 	orr.w	r3, r3, r1
 80050e2:	6093      	str	r3, [r2, #8]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80050e4:	d001      	beq.n	80050ea <HAL_ADC_Init+0x9e>
 80050e6:	2d01      	cmp	r5, #1
 80050e8:	d120      	bne.n	800512c <HAL_ADC_Init+0xe0>
      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
 80050ea:	6923      	ldr	r3, [r4, #16]
 80050ec:	3b01      	subs	r3, #1
 80050ee:	051b      	lsls	r3, r3, #20
    MODIFY_REG(hadc->Instance->SQR1,
 80050f0:	6ad5      	ldr	r5, [r2, #44]	; 0x2c
 80050f2:	f425 0570 	bic.w	r5, r5, #15728640	; 0xf00000
 80050f6:	432b      	orrs	r3, r5
 80050f8:	62d3      	str	r3, [r2, #44]	; 0x2c
    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
 80050fa:	6892      	ldr	r2, [r2, #8]
 80050fc:	4b17      	ldr	r3, [pc, #92]	; (800515c <HAL_ADC_Init+0x110>)
 80050fe:	4013      	ands	r3, r2
 8005100:	4299      	cmp	r1, r3
 8005102:	d115      	bne.n	8005130 <HAL_ADC_Init+0xe4>
      ADC_CLEAR_ERRORCODE(hadc);
 8005104:	2300      	movs	r3, #0
 8005106:	62e3      	str	r3, [r4, #44]	; 0x2c
      ADC_STATE_CLR_SET(hadc->State,
 8005108:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800510a:	f023 0303 	bic.w	r3, r3, #3
 800510e:	f043 0301 	orr.w	r3, r3, #1
 8005112:	62a3      	str	r3, [r4, #40]	; 0x28
 8005114:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 8005116:	462b      	mov	r3, r5
 8005118:	e7cb      	b.n	80050b2 <HAL_ADC_Init+0x66>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 800511a:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 800511c:	f046 0620 	orr.w	r6, r6, #32
 8005120:	62a6      	str	r6, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005122:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8005124:	f046 0601 	orr.w	r6, r6, #1
 8005128:	62e6      	str	r6, [r4, #44]	; 0x2c
 800512a:	e7cc      	b.n	80050c6 <HAL_ADC_Init+0x7a>
  uint32_t tmp_sqr1 = 0U;
 800512c:	2300      	movs	r3, #0
 800512e:	e7df      	b.n	80050f0 <HAL_ADC_Init+0xa4>
      ADC_STATE_CLR_SET(hadc->State,
 8005130:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8005132:	f023 0312 	bic.w	r3, r3, #18
 8005136:	f043 0310 	orr.w	r3, r3, #16
 800513a:	62a3      	str	r3, [r4, #40]	; 0x28
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 800513c:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 800513e:	f043 0301 	orr.w	r3, r3, #1
 8005142:	62e3      	str	r3, [r4, #44]	; 0x2c
    return HAL_ERROR;
 8005144:	2001      	movs	r0, #1
}
 8005146:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8005148:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800514a:	f043 0310 	orr.w	r3, r3, #16
 800514e:	62a3      	str	r3, [r4, #40]	; 0x28
 8005150:	e7f8      	b.n	8005144 <HAL_ADC_Init+0xf8>
 8005152:	bf00      	nop
 8005154:	40013c00 	.word	0x40013c00
 8005158:	ffe1f7fd 	.word	0xffe1f7fd
 800515c:	ff1f0efe 	.word	0xff1f0efe

08005160 <HAL_ADCEx_InjectedConvCpltCallback>:
  * @brief  Injected conversion complete callback in non blocking mode 
  * @param  hadc: ADC handle
  * @retval None
  */
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
{
 8005160:	4770      	bx	lr
	...

08005164 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005164:	4a07      	ldr	r2, [pc, #28]	; (8005184 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) );               /* Insert write key and priority group */
 8005166:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005168:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) );               /* Insert write key and priority group */
 800516a:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 800516e:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8005172:	041b      	lsls	r3, r3, #16
 8005174:	0c1b      	lsrs	r3, r3, #16
 8005176:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 800517a:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 800517e:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 8005180:	60d3      	str	r3, [r2, #12]
 8005182:	4770      	bx	lr
 8005184:	e000ed00 	.word	0xe000ed00

08005188 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8005188:	4b17      	ldr	r3, [pc, #92]	; (80051e8 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 800518a:	b530      	push	{r4, r5, lr}
 800518c:	68dc      	ldr	r4, [r3, #12]
 800518e:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005192:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005196:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005198:	2b04      	cmp	r3, #4
 800519a:	bf28      	it	cs
 800519c:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800519e:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80051a0:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80051a4:	bf98      	it	ls
 80051a6:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80051a8:	fa05 f303 	lsl.w	r3, r5, r3
 80051ac:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80051b0:	bf88      	it	hi
 80051b2:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80051b4:	4019      	ands	r1, r3
 80051b6:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 80051b8:	fa05 f404 	lsl.w	r4, r5, r4
 80051bc:	3c01      	subs	r4, #1
 80051be:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) >= 0)
 80051c0:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80051c2:	ea42 0201 	orr.w	r2, r2, r1
 80051c6:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80051ca:	bfa9      	itett	ge
 80051cc:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80051d0:	4b06      	ldrlt	r3, [pc, #24]	; (80051ec <HAL_NVIC_SetPriority+0x64>)
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80051d2:	b2d2      	uxtbge	r2, r2
 80051d4:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80051d8:	bfbb      	ittet	lt
 80051da:	f000 000f 	andlt.w	r0, r0, #15
 80051de:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80051e0:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80051e4:	541a      	strblt	r2, [r3, r0]
 80051e6:	bd30      	pop	{r4, r5, pc}
 80051e8:	e000ed00 	.word	0xe000ed00
 80051ec:	e000ed14 	.word	0xe000ed14

080051f0 <HAL_NVIC_EnableIRQ>:
  if ((int32_t)(IRQn) >= 0)
 80051f0:	2800      	cmp	r0, #0
 80051f2:	db08      	blt.n	8005206 <HAL_NVIC_EnableIRQ+0x16>
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 80051f4:	2301      	movs	r3, #1
 80051f6:	0942      	lsrs	r2, r0, #5
 80051f8:	f000 001f 	and.w	r0, r0, #31
 80051fc:	fa03 f000 	lsl.w	r0, r3, r0
 8005200:	4b01      	ldr	r3, [pc, #4]	; (8005208 <HAL_NVIC_EnableIRQ+0x18>)
 8005202:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 8005206:	4770      	bx	lr
 8005208:	e000e100 	.word	0xe000e100

0800520c <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 800520c:	3801      	subs	r0, #1
 800520e:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8005212:	d20a      	bcs.n	800522a <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005214:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8005216:	4b06      	ldr	r3, [pc, #24]	; (8005230 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005218:	4a06      	ldr	r2, [pc, #24]	; (8005234 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800521a:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800521c:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8005220:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8005222:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8005224:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8005226:	601a      	str	r2, [r3, #0]
 8005228:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 800522a:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 800522c:	4770      	bx	lr
 800522e:	bf00      	nop
 8005230:	e000e010 	.word	0xe000e010
 8005234:	e000ed00 	.word	0xe000ed00

08005238 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Channel.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 8005238:	b510      	push	{r4, lr}
  uint32_t tmp = 0U;

  /* Check the DMA handle allocation */
  if(hdma == NULL)
 800523a:	2800      	cmp	r0, #0
 800523c:	d032      	beq.n	80052a4 <HAL_DMA_Init+0x6c>
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

#if defined (DMA2)
  /* calculation of the channel index */
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 800523e:	6801      	ldr	r1, [r0, #0]
 8005240:	4b19      	ldr	r3, [pc, #100]	; (80052a8 <HAL_DMA_Init+0x70>)
 8005242:	2414      	movs	r4, #20
 8005244:	4299      	cmp	r1, r3
 8005246:	d825      	bhi.n	8005294 <HAL_DMA_Init+0x5c>
  {
    /* DMA1 */
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 8005248:	4a18      	ldr	r2, [pc, #96]	; (80052ac <HAL_DMA_Init+0x74>)
    hdma->DmaBaseAddress = DMA1;
 800524a:	f2a3 4307 	subw	r3, r3, #1031	; 0x407
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 800524e:	440a      	add	r2, r1
 8005250:	fbb2 f2f4 	udiv	r2, r2, r4
 8005254:	0092      	lsls	r2, r2, #2
 8005256:	6402      	str	r2, [r0, #64]	; 0x40
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
                      DMA_CCR_DIR));

  /* Prepare the DMA Channel configuration */
  tmp |=  hdma->Init.Direction        |
 8005258:	6884      	ldr	r4, [r0, #8]
    hdma->DmaBaseAddress = DMA2;
 800525a:	63c3      	str	r3, [r0, #60]	; 0x3c
  tmp |=  hdma->Init.Direction        |
 800525c:	6843      	ldr	r3, [r0, #4]
  tmp = hdma->Instance->CCR;
 800525e:	680a      	ldr	r2, [r1, #0]
  tmp |=  hdma->Init.Direction        |
 8005260:	4323      	orrs	r3, r4
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005262:	68c4      	ldr	r4, [r0, #12]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8005264:	f422 527f 	bic.w	r2, r2, #16320	; 0x3fc0
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005268:	4323      	orrs	r3, r4
 800526a:	6904      	ldr	r4, [r0, #16]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 800526c:	f022 0230 	bic.w	r2, r2, #48	; 0x30
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005270:	4323      	orrs	r3, r4
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005272:	6944      	ldr	r4, [r0, #20]
 8005274:	4323      	orrs	r3, r4
 8005276:	6984      	ldr	r4, [r0, #24]
 8005278:	4323      	orrs	r3, r4
          hdma->Init.Mode                | hdma->Init.Priority;
 800527a:	69c4      	ldr	r4, [r0, #28]
 800527c:	4323      	orrs	r3, r4
  tmp |=  hdma->Init.Direction        |
 800527e:	4313      	orrs	r3, r2

  /* Write to DMA Channel CR register */
  hdma->Instance->CCR = tmp;
 8005280:	600b      	str	r3, [r1, #0]

  /* Initialise the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;

  /* Initialize the DMA state*/
  hdma->State = HAL_DMA_STATE_READY;
 8005282:	2201      	movs	r2, #1
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005284:	2300      	movs	r3, #0
  hdma->State = HAL_DMA_STATE_READY;
 8005286:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 800528a:	6383      	str	r3, [r0, #56]	; 0x38
  /* Allocate lock resource and initialize it */
  hdma->Lock = HAL_UNLOCKED;
 800528c:	f880 3020 	strb.w	r3, [r0, #32]

  return HAL_OK;
 8005290:	4618      	mov	r0, r3
 8005292:	bd10      	pop	{r4, pc}
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 8005294:	4b06      	ldr	r3, [pc, #24]	; (80052b0 <HAL_DMA_Init+0x78>)
 8005296:	440b      	add	r3, r1
 8005298:	fbb3 f3f4 	udiv	r3, r3, r4
 800529c:	009b      	lsls	r3, r3, #2
 800529e:	6403      	str	r3, [r0, #64]	; 0x40
    hdma->DmaBaseAddress = DMA2;
 80052a0:	4b04      	ldr	r3, [pc, #16]	; (80052b4 <HAL_DMA_Init+0x7c>)
 80052a2:	e7d9      	b.n	8005258 <HAL_DMA_Init+0x20>
    return HAL_ERROR;
 80052a4:	2001      	movs	r0, #1
}
 80052a6:	bd10      	pop	{r4, pc}
 80052a8:	40020407 	.word	0x40020407
 80052ac:	bffdfff8 	.word	0xbffdfff8
 80052b0:	bffdfbf8 	.word	0xbffdfbf8
 80052b4:	40020400 	.word	0x40020400

080052b8 <HAL_DMA_Start_IT>:
  * @param  DstAddress: The destination memory Buffer address
  * @param  DataLength: The length of data to be transferred from source to destination
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
 80052b8:	b5f0      	push	{r4, r5, r6, r7, lr}

  /* Check the parameters */
  assert_param(IS_DMA_BUFFER_SIZE(DataLength));

  /* Process locked */
  __HAL_LOCK(hdma);
 80052ba:	f890 4020 	ldrb.w	r4, [r0, #32]
 80052be:	2c01      	cmp	r4, #1
 80052c0:	d035      	beq.n	800532e <HAL_DMA_Start_IT+0x76>
 80052c2:	2401      	movs	r4, #1
  
  if(HAL_DMA_STATE_READY == hdma->State)
 80052c4:	f890 5021 	ldrb.w	r5, [r0, #33]	; 0x21
  __HAL_LOCK(hdma);
 80052c8:	f880 4020 	strb.w	r4, [r0, #32]
  if(HAL_DMA_STATE_READY == hdma->State)
 80052cc:	42a5      	cmp	r5, r4
 80052ce:	f04f 0600 	mov.w	r6, #0
 80052d2:	f04f 0402 	mov.w	r4, #2
 80052d6:	d128      	bne.n	800532a <HAL_DMA_Start_IT+0x72>
  {
    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 80052d8:	f880 4021 	strb.w	r4, [r0, #33]	; 0x21
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
    
    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 80052dc:	6804      	ldr	r4, [r0, #0]
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 80052de:	6386      	str	r6, [r0, #56]	; 0x38
    __HAL_DMA_DISABLE(hdma);
 80052e0:	6826      	ldr	r6, [r4, #0]
  * @retval HAL status
  */
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
  /* Clear all flags */
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 80052e2:	6c07      	ldr	r7, [r0, #64]	; 0x40
    __HAL_DMA_DISABLE(hdma);
 80052e4:	f026 0601 	bic.w	r6, r6, #1
 80052e8:	6026      	str	r6, [r4, #0]
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 80052ea:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
 80052ec:	40bd      	lsls	r5, r7
 80052ee:	6075      	str	r5, [r6, #4]

  /* Configure DMA Channel data length */
  hdma->Instance->CNDTR = DataLength;
 80052f0:	6063      	str	r3, [r4, #4]

  /* Memory to Peripheral */
  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
 80052f2:	6843      	ldr	r3, [r0, #4]
 80052f4:	6805      	ldr	r5, [r0, #0]
 80052f6:	2b10      	cmp	r3, #16
    if(NULL != hdma->XferHalfCpltCallback)
 80052f8:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
  {
    /* Configure DMA Channel destination address */
    hdma->Instance->CPAR = DstAddress;
 80052fa:	bf0b      	itete	eq
 80052fc:	60a2      	streq	r2, [r4, #8]
  }
  /* Peripheral to Memory */
  else
  {
    /* Configure DMA Channel source address */
    hdma->Instance->CPAR = SrcAddress;
 80052fe:	60a1      	strne	r1, [r4, #8]
    hdma->Instance->CMAR = SrcAddress;
 8005300:	60e1      	streq	r1, [r4, #12]

    /* Configure DMA Channel destination address */
    hdma->Instance->CMAR = DstAddress;
 8005302:	60e2      	strne	r2, [r4, #12]
    if(NULL != hdma->XferHalfCpltCallback)
 8005304:	b14b      	cbz	r3, 800531a <HAL_DMA_Start_IT+0x62>
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005306:	6823      	ldr	r3, [r4, #0]
 8005308:	f043 030e 	orr.w	r3, r3, #14
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 800530c:	6023      	str	r3, [r4, #0]
    __HAL_DMA_ENABLE(hdma);
 800530e:	682b      	ldr	r3, [r5, #0]
  HAL_StatusTypeDef status = HAL_OK;
 8005310:	2000      	movs	r0, #0
    __HAL_DMA_ENABLE(hdma);
 8005312:	f043 0301 	orr.w	r3, r3, #1
 8005316:	602b      	str	r3, [r5, #0]
 8005318:	bdf0      	pop	{r4, r5, r6, r7, pc}
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 800531a:	6823      	ldr	r3, [r4, #0]
 800531c:	f023 0304 	bic.w	r3, r3, #4
 8005320:	6023      	str	r3, [r4, #0]
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 8005322:	6823      	ldr	r3, [r4, #0]
 8005324:	f043 030a 	orr.w	r3, r3, #10
 8005328:	e7f0      	b.n	800530c <HAL_DMA_Start_IT+0x54>
    __HAL_UNLOCK(hdma); 
 800532a:	f880 6020 	strb.w	r6, [r0, #32]
  __HAL_LOCK(hdma);
 800532e:	2002      	movs	r0, #2
}
 8005330:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08005334 <HAL_DMA_Abort_IT>:
  if(HAL_DMA_STATE_BUSY != hdma->State)
 8005334:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 8005338:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 800533a:	2b02      	cmp	r3, #2
 800533c:	d003      	beq.n	8005346 <HAL_DMA_Abort_IT+0x12>
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 800533e:	2304      	movs	r3, #4
 8005340:	6383      	str	r3, [r0, #56]	; 0x38
    status = HAL_ERROR;
 8005342:	2001      	movs	r0, #1
 8005344:	bd10      	pop	{r4, pc}
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005346:	6803      	ldr	r3, [r0, #0]
 8005348:	681a      	ldr	r2, [r3, #0]
 800534a:	f022 020e 	bic.w	r2, r2, #14
 800534e:	601a      	str	r2, [r3, #0]
    __HAL_DMA_DISABLE(hdma);
 8005350:	681a      	ldr	r2, [r3, #0]
 8005352:	f022 0201 	bic.w	r2, r2, #1
 8005356:	601a      	str	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8005358:	4a29      	ldr	r2, [pc, #164]	; (8005400 <HAL_DMA_Abort_IT+0xcc>)
 800535a:	4293      	cmp	r3, r2
 800535c:	d924      	bls.n	80053a8 <HAL_DMA_Abort_IT+0x74>
 800535e:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005362:	4293      	cmp	r3, r2
 8005364:	d019      	beq.n	800539a <HAL_DMA_Abort_IT+0x66>
 8005366:	3214      	adds	r2, #20
 8005368:	4293      	cmp	r3, r2
 800536a:	d018      	beq.n	800539e <HAL_DMA_Abort_IT+0x6a>
 800536c:	3214      	adds	r2, #20
 800536e:	4293      	cmp	r3, r2
 8005370:	d017      	beq.n	80053a2 <HAL_DMA_Abort_IT+0x6e>
 8005372:	3214      	adds	r2, #20
 8005374:	4293      	cmp	r3, r2
 8005376:	bf0c      	ite	eq
 8005378:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 800537c:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8005380:	4a20      	ldr	r2, [pc, #128]	; (8005404 <HAL_DMA_Abort_IT+0xd0>)
 8005382:	6053      	str	r3, [r2, #4]
    hdma->State = HAL_DMA_STATE_READY;
 8005384:	2301      	movs	r3, #1
    __HAL_UNLOCK(hdma);
 8005386:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 8005388:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    if(hdma->XferAbortCallback != NULL)
 800538c:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 800538e:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 8005392:	b39b      	cbz	r3, 80053fc <HAL_DMA_Abort_IT+0xc8>
      hdma->XferAbortCallback(hdma);
 8005394:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8005396:	4620      	mov	r0, r4
 8005398:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 800539a:	2301      	movs	r3, #1
 800539c:	e7f0      	b.n	8005380 <HAL_DMA_Abort_IT+0x4c>
 800539e:	2310      	movs	r3, #16
 80053a0:	e7ee      	b.n	8005380 <HAL_DMA_Abort_IT+0x4c>
 80053a2:	f44f 7380 	mov.w	r3, #256	; 0x100
 80053a6:	e7eb      	b.n	8005380 <HAL_DMA_Abort_IT+0x4c>
 80053a8:	4917      	ldr	r1, [pc, #92]	; (8005408 <HAL_DMA_Abort_IT+0xd4>)
 80053aa:	428b      	cmp	r3, r1
 80053ac:	d016      	beq.n	80053dc <HAL_DMA_Abort_IT+0xa8>
 80053ae:	3114      	adds	r1, #20
 80053b0:	428b      	cmp	r3, r1
 80053b2:	d015      	beq.n	80053e0 <HAL_DMA_Abort_IT+0xac>
 80053b4:	3114      	adds	r1, #20
 80053b6:	428b      	cmp	r3, r1
 80053b8:	d014      	beq.n	80053e4 <HAL_DMA_Abort_IT+0xb0>
 80053ba:	3114      	adds	r1, #20
 80053bc:	428b      	cmp	r3, r1
 80053be:	d014      	beq.n	80053ea <HAL_DMA_Abort_IT+0xb6>
 80053c0:	3114      	adds	r1, #20
 80053c2:	428b      	cmp	r3, r1
 80053c4:	d014      	beq.n	80053f0 <HAL_DMA_Abort_IT+0xbc>
 80053c6:	3114      	adds	r1, #20
 80053c8:	428b      	cmp	r3, r1
 80053ca:	d014      	beq.n	80053f6 <HAL_DMA_Abort_IT+0xc2>
 80053cc:	4293      	cmp	r3, r2
 80053ce:	bf14      	ite	ne
 80053d0:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 80053d4:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 80053d8:	4a0c      	ldr	r2, [pc, #48]	; (800540c <HAL_DMA_Abort_IT+0xd8>)
 80053da:	e7d2      	b.n	8005382 <HAL_DMA_Abort_IT+0x4e>
 80053dc:	2301      	movs	r3, #1
 80053de:	e7fb      	b.n	80053d8 <HAL_DMA_Abort_IT+0xa4>
 80053e0:	2310      	movs	r3, #16
 80053e2:	e7f9      	b.n	80053d8 <HAL_DMA_Abort_IT+0xa4>
 80053e4:	f44f 7380 	mov.w	r3, #256	; 0x100
 80053e8:	e7f6      	b.n	80053d8 <HAL_DMA_Abort_IT+0xa4>
 80053ea:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 80053ee:	e7f3      	b.n	80053d8 <HAL_DMA_Abort_IT+0xa4>
 80053f0:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 80053f4:	e7f0      	b.n	80053d8 <HAL_DMA_Abort_IT+0xa4>
 80053f6:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 80053fa:	e7ed      	b.n	80053d8 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 80053fc:	4618      	mov	r0, r3
}
 80053fe:	bd10      	pop	{r4, pc}
 8005400:	40020080 	.word	0x40020080
 8005404:	40020400 	.word	0x40020400
 8005408:	40020008 	.word	0x40020008
 800540c:	40020000 	.word	0x40020000

08005410 <HAL_DMA_IRQHandler>:
{
 8005410:	b470      	push	{r4, r5, r6}
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005412:	2504      	movs	r5, #4
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8005414:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005416:	6c02      	ldr	r2, [r0, #64]	; 0x40
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8005418:	6834      	ldr	r4, [r6, #0]
  uint32_t source_it = hdma->Instance->CCR;
 800541a:	6803      	ldr	r3, [r0, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 800541c:	4095      	lsls	r5, r2
 800541e:	4225      	tst	r5, r4
  uint32_t source_it = hdma->Instance->CCR;
 8005420:	6819      	ldr	r1, [r3, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005422:	d055      	beq.n	80054d0 <HAL_DMA_IRQHandler+0xc0>
 8005424:	074d      	lsls	r5, r1, #29
 8005426:	d553      	bpl.n	80054d0 <HAL_DMA_IRQHandler+0xc0>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005428:	681a      	ldr	r2, [r3, #0]
 800542a:	0696      	lsls	r6, r2, #26
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 800542c:	bf5e      	ittt	pl
 800542e:	681a      	ldrpl	r2, [r3, #0]
 8005430:	f022 0204 	bicpl.w	r2, r2, #4
 8005434:	601a      	strpl	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8005436:	4a60      	ldr	r2, [pc, #384]	; (80055b8 <HAL_DMA_IRQHandler+0x1a8>)
 8005438:	4293      	cmp	r3, r2
 800543a:	d91f      	bls.n	800547c <HAL_DMA_IRQHandler+0x6c>
 800543c:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005440:	4293      	cmp	r3, r2
 8005442:	d014      	beq.n	800546e <HAL_DMA_IRQHandler+0x5e>
 8005444:	3214      	adds	r2, #20
 8005446:	4293      	cmp	r3, r2
 8005448:	d013      	beq.n	8005472 <HAL_DMA_IRQHandler+0x62>
 800544a:	3214      	adds	r2, #20
 800544c:	4293      	cmp	r3, r2
 800544e:	d012      	beq.n	8005476 <HAL_DMA_IRQHandler+0x66>
 8005450:	3214      	adds	r2, #20
 8005452:	4293      	cmp	r3, r2
 8005454:	bf0c      	ite	eq
 8005456:	f44f 4380 	moveq.w	r3, #16384	; 0x4000
 800545a:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 800545e:	4a57      	ldr	r2, [pc, #348]	; (80055bc <HAL_DMA_IRQHandler+0x1ac>)
 8005460:	6053      	str	r3, [r2, #4]
    if(hdma->XferHalfCpltCallback != NULL)
 8005462:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
    if (hdma->XferErrorCallback != NULL)
 8005464:	2b00      	cmp	r3, #0
 8005466:	f000 80a5 	beq.w	80055b4 <HAL_DMA_IRQHandler+0x1a4>
}
 800546a:	bc70      	pop	{r4, r5, r6}
      hdma->XferErrorCallback(hdma);
 800546c:	4718      	bx	r3
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 800546e:	2304      	movs	r3, #4
 8005470:	e7f5      	b.n	800545e <HAL_DMA_IRQHandler+0x4e>
 8005472:	2340      	movs	r3, #64	; 0x40
 8005474:	e7f3      	b.n	800545e <HAL_DMA_IRQHandler+0x4e>
 8005476:	f44f 6380 	mov.w	r3, #1024	; 0x400
 800547a:	e7f0      	b.n	800545e <HAL_DMA_IRQHandler+0x4e>
 800547c:	4950      	ldr	r1, [pc, #320]	; (80055c0 <HAL_DMA_IRQHandler+0x1b0>)
 800547e:	428b      	cmp	r3, r1
 8005480:	d016      	beq.n	80054b0 <HAL_DMA_IRQHandler+0xa0>
 8005482:	3114      	adds	r1, #20
 8005484:	428b      	cmp	r3, r1
 8005486:	d015      	beq.n	80054b4 <HAL_DMA_IRQHandler+0xa4>
 8005488:	3114      	adds	r1, #20
 800548a:	428b      	cmp	r3, r1
 800548c:	d014      	beq.n	80054b8 <HAL_DMA_IRQHandler+0xa8>
 800548e:	3114      	adds	r1, #20
 8005490:	428b      	cmp	r3, r1
 8005492:	d014      	beq.n	80054be <HAL_DMA_IRQHandler+0xae>
 8005494:	3114      	adds	r1, #20
 8005496:	428b      	cmp	r3, r1
 8005498:	d014      	beq.n	80054c4 <HAL_DMA_IRQHandler+0xb4>
 800549a:	3114      	adds	r1, #20
 800549c:	428b      	cmp	r3, r1
 800549e:	d014      	beq.n	80054ca <HAL_DMA_IRQHandler+0xba>
 80054a0:	4293      	cmp	r3, r2
 80054a2:	bf14      	ite	ne
 80054a4:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 80054a8:	f04f 6380 	moveq.w	r3, #67108864	; 0x4000000
 80054ac:	4a45      	ldr	r2, [pc, #276]	; (80055c4 <HAL_DMA_IRQHandler+0x1b4>)
 80054ae:	e7d7      	b.n	8005460 <HAL_DMA_IRQHandler+0x50>
 80054b0:	2304      	movs	r3, #4
 80054b2:	e7fb      	b.n	80054ac <HAL_DMA_IRQHandler+0x9c>
 80054b4:	2340      	movs	r3, #64	; 0x40
 80054b6:	e7f9      	b.n	80054ac <HAL_DMA_IRQHandler+0x9c>
 80054b8:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80054bc:	e7f6      	b.n	80054ac <HAL_DMA_IRQHandler+0x9c>
 80054be:	f44f 4380 	mov.w	r3, #16384	; 0x4000
 80054c2:	e7f3      	b.n	80054ac <HAL_DMA_IRQHandler+0x9c>
 80054c4:	f44f 2380 	mov.w	r3, #262144	; 0x40000
 80054c8:	e7f0      	b.n	80054ac <HAL_DMA_IRQHandler+0x9c>
 80054ca:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
 80054ce:	e7ed      	b.n	80054ac <HAL_DMA_IRQHandler+0x9c>
  else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
 80054d0:	2502      	movs	r5, #2
 80054d2:	4095      	lsls	r5, r2
 80054d4:	4225      	tst	r5, r4
 80054d6:	d057      	beq.n	8005588 <HAL_DMA_IRQHandler+0x178>
 80054d8:	078d      	lsls	r5, r1, #30
 80054da:	d555      	bpl.n	8005588 <HAL_DMA_IRQHandler+0x178>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 80054dc:	681a      	ldr	r2, [r3, #0]
 80054de:	0694      	lsls	r4, r2, #26
 80054e0:	d406      	bmi.n	80054f0 <HAL_DMA_IRQHandler+0xe0>
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  
 80054e2:	681a      	ldr	r2, [r3, #0]
 80054e4:	f022 020a 	bic.w	r2, r2, #10
 80054e8:	601a      	str	r2, [r3, #0]
      hdma->State = HAL_DMA_STATE_READY;
 80054ea:	2201      	movs	r2, #1
 80054ec:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 80054f0:	4a31      	ldr	r2, [pc, #196]	; (80055b8 <HAL_DMA_IRQHandler+0x1a8>)
 80054f2:	4293      	cmp	r3, r2
 80054f4:	d91e      	bls.n	8005534 <HAL_DMA_IRQHandler+0x124>
 80054f6:	f502 7262 	add.w	r2, r2, #904	; 0x388
 80054fa:	4293      	cmp	r3, r2
 80054fc:	d013      	beq.n	8005526 <HAL_DMA_IRQHandler+0x116>
 80054fe:	3214      	adds	r2, #20
 8005500:	4293      	cmp	r3, r2
 8005502:	d012      	beq.n	800552a <HAL_DMA_IRQHandler+0x11a>
 8005504:	3214      	adds	r2, #20
 8005506:	4293      	cmp	r3, r2
 8005508:	d011      	beq.n	800552e <HAL_DMA_IRQHandler+0x11e>
 800550a:	3214      	adds	r2, #20
 800550c:	4293      	cmp	r3, r2
 800550e:	bf0c      	ite	eq
 8005510:	f44f 5300 	moveq.w	r3, #8192	; 0x2000
 8005514:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005518:	4a28      	ldr	r2, [pc, #160]	; (80055bc <HAL_DMA_IRQHandler+0x1ac>)
 800551a:	6053      	str	r3, [r2, #4]
    __HAL_UNLOCK(hdma);
 800551c:	2300      	movs	r3, #0
 800551e:	f880 3020 	strb.w	r3, [r0, #32]
    if(hdma->XferCpltCallback != NULL)
 8005522:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005524:	e79e      	b.n	8005464 <HAL_DMA_IRQHandler+0x54>
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8005526:	2302      	movs	r3, #2
 8005528:	e7f6      	b.n	8005518 <HAL_DMA_IRQHandler+0x108>
 800552a:	2320      	movs	r3, #32
 800552c:	e7f4      	b.n	8005518 <HAL_DMA_IRQHandler+0x108>
 800552e:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005532:	e7f1      	b.n	8005518 <HAL_DMA_IRQHandler+0x108>
 8005534:	4922      	ldr	r1, [pc, #136]	; (80055c0 <HAL_DMA_IRQHandler+0x1b0>)
 8005536:	428b      	cmp	r3, r1
 8005538:	d016      	beq.n	8005568 <HAL_DMA_IRQHandler+0x158>
 800553a:	3114      	adds	r1, #20
 800553c:	428b      	cmp	r3, r1
 800553e:	d015      	beq.n	800556c <HAL_DMA_IRQHandler+0x15c>
 8005540:	3114      	adds	r1, #20
 8005542:	428b      	cmp	r3, r1
 8005544:	d014      	beq.n	8005570 <HAL_DMA_IRQHandler+0x160>
 8005546:	3114      	adds	r1, #20
 8005548:	428b      	cmp	r3, r1
 800554a:	d014      	beq.n	8005576 <HAL_DMA_IRQHandler+0x166>
 800554c:	3114      	adds	r1, #20
 800554e:	428b      	cmp	r3, r1
 8005550:	d014      	beq.n	800557c <HAL_DMA_IRQHandler+0x16c>
 8005552:	3114      	adds	r1, #20
 8005554:	428b      	cmp	r3, r1
 8005556:	d014      	beq.n	8005582 <HAL_DMA_IRQHandler+0x172>
 8005558:	4293      	cmp	r3, r2
 800555a:	bf14      	ite	ne
 800555c:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005560:	f04f 7300 	moveq.w	r3, #33554432	; 0x2000000
 8005564:	4a17      	ldr	r2, [pc, #92]	; (80055c4 <HAL_DMA_IRQHandler+0x1b4>)
 8005566:	e7d8      	b.n	800551a <HAL_DMA_IRQHandler+0x10a>
 8005568:	2302      	movs	r3, #2
 800556a:	e7fb      	b.n	8005564 <HAL_DMA_IRQHandler+0x154>
 800556c:	2320      	movs	r3, #32
 800556e:	e7f9      	b.n	8005564 <HAL_DMA_IRQHandler+0x154>
 8005570:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005574:	e7f6      	b.n	8005564 <HAL_DMA_IRQHandler+0x154>
 8005576:	f44f 5300 	mov.w	r3, #8192	; 0x2000
 800557a:	e7f3      	b.n	8005564 <HAL_DMA_IRQHandler+0x154>
 800557c:	f44f 3300 	mov.w	r3, #131072	; 0x20000
 8005580:	e7f0      	b.n	8005564 <HAL_DMA_IRQHandler+0x154>
 8005582:	f44f 1300 	mov.w	r3, #2097152	; 0x200000
 8005586:	e7ed      	b.n	8005564 <HAL_DMA_IRQHandler+0x154>
  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
 8005588:	2508      	movs	r5, #8
 800558a:	4095      	lsls	r5, r2
 800558c:	4225      	tst	r5, r4
 800558e:	d011      	beq.n	80055b4 <HAL_DMA_IRQHandler+0x1a4>
 8005590:	0709      	lsls	r1, r1, #28
 8005592:	d50f      	bpl.n	80055b4 <HAL_DMA_IRQHandler+0x1a4>
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005594:	6819      	ldr	r1, [r3, #0]
 8005596:	f021 010e 	bic.w	r1, r1, #14
 800559a:	6019      	str	r1, [r3, #0]
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 800559c:	2301      	movs	r3, #1
 800559e:	fa03 f202 	lsl.w	r2, r3, r2
 80055a2:	6072      	str	r2, [r6, #4]
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
 80055a4:	6383      	str	r3, [r0, #56]	; 0x38
    hdma->State = HAL_DMA_STATE_READY;
 80055a6:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    __HAL_UNLOCK(hdma);
 80055aa:	2300      	movs	r3, #0
 80055ac:	f880 3020 	strb.w	r3, [r0, #32]
    if (hdma->XferErrorCallback != NULL)
 80055b0:	6b03      	ldr	r3, [r0, #48]	; 0x30
 80055b2:	e757      	b.n	8005464 <HAL_DMA_IRQHandler+0x54>
}
 80055b4:	bc70      	pop	{r4, r5, r6}
 80055b6:	4770      	bx	lr
 80055b8:	40020080 	.word	0x40020080
 80055bc:	40020400 	.word	0x40020400
 80055c0:	40020008 	.word	0x40020008
 80055c4:	40020000 	.word	0x40020000

080055c8 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 80055c8:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position = 0x00u;
  uint32_t ioposition;
  uint32_t iocurrent;
  uint32_t temp;
  uint32_t config = 0x00u;
 80055cc:	2400      	movs	r4, #0
  uint32_t position = 0x00u;
 80055ce:	4626      	mov	r6, r4
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 80055d0:	4f6c      	ldr	r7, [pc, #432]	; (8005784 <HAL_GPIO_Init+0x1bc>)
 80055d2:	4b6d      	ldr	r3, [pc, #436]	; (8005788 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2u];
        CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
 80055d4:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 8005790 <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 80055d8:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 8005794 <HAL_GPIO_Init+0x1cc>
  while (((GPIO_Init->Pin) >> position) != 0x00u)
 80055dc:	680a      	ldr	r2, [r1, #0]
 80055de:	fa32 f506 	lsrs.w	r5, r2, r6
 80055e2:	d102      	bne.n	80055ea <HAL_GPIO_Init+0x22>
      }
    }

	position++;
  }
}
 80055e4:	b003      	add	sp, #12
 80055e6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    ioposition = (0x01uL << position);
 80055ea:	f04f 0801 	mov.w	r8, #1
 80055ee:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 80055f2:	ea02 0208 	and.w	r2, r2, r8
    if (iocurrent == ioposition)
 80055f6:	4590      	cmp	r8, r2
 80055f8:	f040 8084 	bne.w	8005704 <HAL_GPIO_Init+0x13c>
      switch (GPIO_Init->Mode)
 80055fc:	684d      	ldr	r5, [r1, #4]
 80055fe:	2d12      	cmp	r5, #18
 8005600:	f000 80b1 	beq.w	8005766 <HAL_GPIO_Init+0x19e>
 8005604:	f200 8087 	bhi.w	8005716 <HAL_GPIO_Init+0x14e>
 8005608:	2d02      	cmp	r5, #2
 800560a:	f000 80a9 	beq.w	8005760 <HAL_GPIO_Init+0x198>
 800560e:	d87b      	bhi.n	8005708 <HAL_GPIO_Init+0x140>
 8005610:	2d00      	cmp	r5, #0
 8005612:	f000 808c 	beq.w	800572e <HAL_GPIO_Init+0x166>
 8005616:	2d01      	cmp	r5, #1
 8005618:	f000 80a0 	beq.w	800575c <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800561c:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8005620:	2aff      	cmp	r2, #255	; 0xff
 8005622:	bf93      	iteet	ls
 8005624:	4682      	movls	sl, r0
 8005626:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 800562a:	3d08      	subhi	r5, #8
 800562c:	f8d0 b000 	ldrls.w	fp, [r0]
 8005630:	bf92      	itee	ls
 8005632:	00b5      	lslls	r5, r6, #2
 8005634:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 8005638:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800563a:	fa09 f805 	lsl.w	r8, r9, r5
 800563e:	ea2b 0808 	bic.w	r8, fp, r8
 8005642:	fa04 f505 	lsl.w	r5, r4, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8005646:	bf88      	it	hi
 8005648:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800564c:	ea48 0505 	orr.w	r5, r8, r5
 8005650:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 8005654:	f8d1 a004 	ldr.w	sl, [r1, #4]
 8005658:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 800565c:	d052      	beq.n	8005704 <HAL_GPIO_Init+0x13c>
        __HAL_RCC_AFIO_CLK_ENABLE();
 800565e:	69bd      	ldr	r5, [r7, #24]
 8005660:	f026 0803 	bic.w	r8, r6, #3
 8005664:	f045 0501 	orr.w	r5, r5, #1
 8005668:	61bd      	str	r5, [r7, #24]
 800566a:	69bd      	ldr	r5, [r7, #24]
 800566c:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 8005670:	f005 0501 	and.w	r5, r5, #1
 8005674:	9501      	str	r5, [sp, #4]
 8005676:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
 800567a:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 800567e:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
 8005680:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2u];
 8005684:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
 8005688:	fa09 f90b 	lsl.w	r9, r9, fp
 800568c:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
 8005690:	4d3e      	ldr	r5, [pc, #248]	; (800578c <HAL_GPIO_Init+0x1c4>)
 8005692:	42a8      	cmp	r0, r5
 8005694:	d06c      	beq.n	8005770 <HAL_GPIO_Init+0x1a8>
 8005696:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 800569a:	42a8      	cmp	r0, r5
 800569c:	d06a      	beq.n	8005774 <HAL_GPIO_Init+0x1ac>
 800569e:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80056a2:	42a8      	cmp	r0, r5
 80056a4:	d068      	beq.n	8005778 <HAL_GPIO_Init+0x1b0>
 80056a6:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80056aa:	42a8      	cmp	r0, r5
 80056ac:	d066      	beq.n	800577c <HAL_GPIO_Init+0x1b4>
 80056ae:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80056b2:	42a8      	cmp	r0, r5
 80056b4:	d064      	beq.n	8005780 <HAL_GPIO_Init+0x1b8>
 80056b6:	4570      	cmp	r0, lr
 80056b8:	bf0c      	ite	eq
 80056ba:	2505      	moveq	r5, #5
 80056bc:	2506      	movne	r5, #6
 80056be:	fa05 f50b 	lsl.w	r5, r5, fp
 80056c2:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2u] = temp;
 80056c6:	f8c8 5008 	str.w	r5, [r8, #8]
          SET_BIT(EXTI->IMR, iocurrent);
 80056ca:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 80056cc:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 80056d0:	bf14      	ite	ne
 80056d2:	4315      	orrne	r5, r2
          CLEAR_BIT(EXTI->IMR, iocurrent);
 80056d4:	4395      	biceq	r5, r2
 80056d6:	601d      	str	r5, [r3, #0]
          SET_BIT(EXTI->EMR, iocurrent);
 80056d8:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 80056da:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 80056de:	bf14      	ite	ne
 80056e0:	4315      	orrne	r5, r2
          CLEAR_BIT(EXTI->EMR, iocurrent);
 80056e2:	4395      	biceq	r5, r2
 80056e4:	605d      	str	r5, [r3, #4]
          SET_BIT(EXTI->RTSR, iocurrent);
 80056e6:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 80056e8:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 80056ec:	bf14      	ite	ne
 80056ee:	4315      	orrne	r5, r2
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 80056f0:	4395      	biceq	r5, r2
 80056f2:	609d      	str	r5, [r3, #8]
          SET_BIT(EXTI->FTSR, iocurrent);
 80056f4:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 80056f6:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 80056fa:	bf14      	ite	ne
 80056fc:	432a      	orrne	r2, r5
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 80056fe:	ea25 0202 	biceq.w	r2, r5, r2
 8005702:	60da      	str	r2, [r3, #12]
	position++;
 8005704:	3601      	adds	r6, #1
 8005706:	e769      	b.n	80055dc <HAL_GPIO_Init+0x14>
      switch (GPIO_Init->Mode)
 8005708:	2d03      	cmp	r5, #3
 800570a:	d025      	beq.n	8005758 <HAL_GPIO_Init+0x190>
 800570c:	2d11      	cmp	r5, #17
 800570e:	d185      	bne.n	800561c <HAL_GPIO_Init+0x54>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 8005710:	68cc      	ldr	r4, [r1, #12]
 8005712:	3404      	adds	r4, #4
          break;
 8005714:	e782      	b.n	800561c <HAL_GPIO_Init+0x54>
      switch (GPIO_Init->Mode)
 8005716:	4565      	cmp	r5, ip
 8005718:	d009      	beq.n	800572e <HAL_GPIO_Init+0x166>
 800571a:	d812      	bhi.n	8005742 <HAL_GPIO_Init+0x17a>
 800571c:	f8df 9078 	ldr.w	r9, [pc, #120]	; 8005798 <HAL_GPIO_Init+0x1d0>
 8005720:	454d      	cmp	r5, r9
 8005722:	d004      	beq.n	800572e <HAL_GPIO_Init+0x166>
 8005724:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8005728:	454d      	cmp	r5, r9
 800572a:	f47f af77 	bne.w	800561c <HAL_GPIO_Init+0x54>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 800572e:	688c      	ldr	r4, [r1, #8]
 8005730:	b1e4      	cbz	r4, 800576c <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 8005732:	2c01      	cmp	r4, #1
            GPIOx->BSRR = ioposition;
 8005734:	bf0c      	ite	eq
 8005736:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 800573a:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 800573e:	2408      	movs	r4, #8
 8005740:	e76c      	b.n	800561c <HAL_GPIO_Init+0x54>
      switch (GPIO_Init->Mode)
 8005742:	f8df 9058 	ldr.w	r9, [pc, #88]	; 800579c <HAL_GPIO_Init+0x1d4>
 8005746:	454d      	cmp	r5, r9
 8005748:	d0f1      	beq.n	800572e <HAL_GPIO_Init+0x166>
 800574a:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 800574e:	454d      	cmp	r5, r9
 8005750:	d0ed      	beq.n	800572e <HAL_GPIO_Init+0x166>
 8005752:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 8005756:	e7e7      	b.n	8005728 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8005758:	2400      	movs	r4, #0
 800575a:	e75f      	b.n	800561c <HAL_GPIO_Init+0x54>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 800575c:	68cc      	ldr	r4, [r1, #12]
          break;
 800575e:	e75d      	b.n	800561c <HAL_GPIO_Init+0x54>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 8005760:	68cc      	ldr	r4, [r1, #12]
 8005762:	3408      	adds	r4, #8
          break;
 8005764:	e75a      	b.n	800561c <HAL_GPIO_Init+0x54>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 8005766:	68cc      	ldr	r4, [r1, #12]
 8005768:	340c      	adds	r4, #12
          break;
 800576a:	e757      	b.n	800561c <HAL_GPIO_Init+0x54>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 800576c:	2404      	movs	r4, #4
 800576e:	e755      	b.n	800561c <HAL_GPIO_Init+0x54>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
 8005770:	2500      	movs	r5, #0
 8005772:	e7a4      	b.n	80056be <HAL_GPIO_Init+0xf6>
 8005774:	2501      	movs	r5, #1
 8005776:	e7a2      	b.n	80056be <HAL_GPIO_Init+0xf6>
 8005778:	2502      	movs	r5, #2
 800577a:	e7a0      	b.n	80056be <HAL_GPIO_Init+0xf6>
 800577c:	2503      	movs	r5, #3
 800577e:	e79e      	b.n	80056be <HAL_GPIO_Init+0xf6>
 8005780:	2504      	movs	r5, #4
 8005782:	e79c      	b.n	80056be <HAL_GPIO_Init+0xf6>
 8005784:	40021000 	.word	0x40021000
 8005788:	40010400 	.word	0x40010400
 800578c:	40010800 	.word	0x40010800
 8005790:	40011c00 	.word	0x40011c00
 8005794:	10210000 	.word	0x10210000
 8005798:	10110000 	.word	0x10110000
 800579c:	10310000 	.word	0x10310000

080057a0 <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 80057a0:	b10a      	cbz	r2, 80057a6 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
 80057a2:	6101      	str	r1, [r0, #16]
 80057a4:	4770      	bx	lr
 80057a6:	0409      	lsls	r1, r1, #16
 80057a8:	e7fb      	b.n	80057a2 <HAL_GPIO_WritePin+0x2>

080057aa <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  if ((GPIOx->ODR & GPIO_Pin) != 0x00u)
 80057aa:	68c3      	ldr	r3, [r0, #12]
 80057ac:	420b      	tst	r3, r1
  {
    GPIOx->BRR = (uint32_t)GPIO_Pin;
 80057ae:	bf14      	ite	ne
 80057b0:	6141      	strne	r1, [r0, #20]
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin;
 80057b2:	6101      	streq	r1, [r0, #16]
 80057b4:	4770      	bx	lr
	...

080057b8 <HAL_RCC_OscConfig>:
  *         supported by this macro. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 80057b8:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  uint32_t tickstart;
  uint32_t pll_config;

  /* Check Null pointer */
  if (RCC_OscInitStruct == NULL)
 80057bc:	4605      	mov	r5, r0
 80057be:	b908      	cbnz	r0, 80057c4 <HAL_RCC_OscConfig+0xc>
    else
    {
      /* Check if there is a request to disable the PLL used as System clock source */
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
      {
        return HAL_ERROR;
 80057c0:	2001      	movs	r0, #1
 80057c2:	e03c      	b.n	800583e <HAL_RCC_OscConfig+0x86>
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80057c4:	6803      	ldr	r3, [r0, #0]
 80057c6:	07db      	lsls	r3, r3, #31
 80057c8:	d410      	bmi.n	80057ec <HAL_RCC_OscConfig+0x34>
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 80057ca:	682b      	ldr	r3, [r5, #0]
 80057cc:	079f      	lsls	r7, r3, #30
 80057ce:	d45d      	bmi.n	800588c <HAL_RCC_OscConfig+0xd4>
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 80057d0:	682b      	ldr	r3, [r5, #0]
 80057d2:	0719      	lsls	r1, r3, #28
 80057d4:	f100 8094 	bmi.w	8005900 <HAL_RCC_OscConfig+0x148>
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 80057d8:	682b      	ldr	r3, [r5, #0]
 80057da:	075a      	lsls	r2, r3, #29
 80057dc:	f100 80be 	bmi.w	800595c <HAL_RCC_OscConfig+0x1a4>
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 80057e0:	69e8      	ldr	r0, [r5, #28]
 80057e2:	2800      	cmp	r0, #0
 80057e4:	f040 812c 	bne.w	8005a40 <HAL_RCC_OscConfig+0x288>
        }
      }
    }
  }

  return HAL_OK;
 80057e8:	2000      	movs	r0, #0
 80057ea:	e028      	b.n	800583e <HAL_RCC_OscConfig+0x86>
    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
 80057ec:	4c8f      	ldr	r4, [pc, #572]	; (8005a2c <HAL_RCC_OscConfig+0x274>)
 80057ee:	6863      	ldr	r3, [r4, #4]
 80057f0:	f003 030c 	and.w	r3, r3, #12
 80057f4:	2b04      	cmp	r3, #4
 80057f6:	d007      	beq.n	8005808 <HAL_RCC_OscConfig+0x50>
        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 80057f8:	6863      	ldr	r3, [r4, #4]
 80057fa:	f003 030c 	and.w	r3, r3, #12
 80057fe:	2b08      	cmp	r3, #8
 8005800:	d109      	bne.n	8005816 <HAL_RCC_OscConfig+0x5e>
 8005802:	6863      	ldr	r3, [r4, #4]
 8005804:	03de      	lsls	r6, r3, #15
 8005806:	d506      	bpl.n	8005816 <HAL_RCC_OscConfig+0x5e>
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8005808:	6823      	ldr	r3, [r4, #0]
 800580a:	039c      	lsls	r4, r3, #14
 800580c:	d5dd      	bpl.n	80057ca <HAL_RCC_OscConfig+0x12>
 800580e:	686b      	ldr	r3, [r5, #4]
 8005810:	2b00      	cmp	r3, #0
 8005812:	d1da      	bne.n	80057ca <HAL_RCC_OscConfig+0x12>
 8005814:	e7d4      	b.n	80057c0 <HAL_RCC_OscConfig+0x8>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8005816:	686b      	ldr	r3, [r5, #4]
 8005818:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 800581c:	d112      	bne.n	8005844 <HAL_RCC_OscConfig+0x8c>
 800581e:	6823      	ldr	r3, [r4, #0]
 8005820:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8005824:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8005826:	f7ff f9d9 	bl	8004bdc <HAL_GetTick>
 800582a:	4606      	mov	r6, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 800582c:	6823      	ldr	r3, [r4, #0]
 800582e:	0398      	lsls	r0, r3, #14
 8005830:	d4cb      	bmi.n	80057ca <HAL_RCC_OscConfig+0x12>
          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 8005832:	f7ff f9d3 	bl	8004bdc <HAL_GetTick>
 8005836:	1b80      	subs	r0, r0, r6
 8005838:	2864      	cmp	r0, #100	; 0x64
 800583a:	d9f7      	bls.n	800582c <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 800583c:	2003      	movs	r0, #3
}
 800583e:	b002      	add	sp, #8
 8005840:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8005844:	b99b      	cbnz	r3, 800586e <HAL_RCC_OscConfig+0xb6>
 8005846:	6823      	ldr	r3, [r4, #0]
 8005848:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 800584c:	6023      	str	r3, [r4, #0]
 800584e:	6823      	ldr	r3, [r4, #0]
 8005850:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8005854:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8005856:	f7ff f9c1 	bl	8004bdc <HAL_GetTick>
 800585a:	4606      	mov	r6, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 800585c:	6823      	ldr	r3, [r4, #0]
 800585e:	0399      	lsls	r1, r3, #14
 8005860:	d5b3      	bpl.n	80057ca <HAL_RCC_OscConfig+0x12>
          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 8005862:	f7ff f9bb 	bl	8004bdc <HAL_GetTick>
 8005866:	1b80      	subs	r0, r0, r6
 8005868:	2864      	cmp	r0, #100	; 0x64
 800586a:	d9f7      	bls.n	800585c <HAL_RCC_OscConfig+0xa4>
 800586c:	e7e6      	b.n	800583c <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800586e:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 8005872:	6823      	ldr	r3, [r4, #0]
 8005874:	d103      	bne.n	800587e <HAL_RCC_OscConfig+0xc6>
 8005876:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 800587a:	6023      	str	r3, [r4, #0]
 800587c:	e7cf      	b.n	800581e <HAL_RCC_OscConfig+0x66>
 800587e:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8005882:	6023      	str	r3, [r4, #0]
 8005884:	6823      	ldr	r3, [r4, #0]
 8005886:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 800588a:	e7cb      	b.n	8005824 <HAL_RCC_OscConfig+0x6c>
    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
 800588c:	4c67      	ldr	r4, [pc, #412]	; (8005a2c <HAL_RCC_OscConfig+0x274>)
 800588e:	6863      	ldr	r3, [r4, #4]
 8005890:	f013 0f0c 	tst.w	r3, #12
 8005894:	d007      	beq.n	80058a6 <HAL_RCC_OscConfig+0xee>
        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 8005896:	6863      	ldr	r3, [r4, #4]
 8005898:	f003 030c 	and.w	r3, r3, #12
 800589c:	2b08      	cmp	r3, #8
 800589e:	d110      	bne.n	80058c2 <HAL_RCC_OscConfig+0x10a>
 80058a0:	6863      	ldr	r3, [r4, #4]
 80058a2:	03da      	lsls	r2, r3, #15
 80058a4:	d40d      	bmi.n	80058c2 <HAL_RCC_OscConfig+0x10a>
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 80058a6:	6823      	ldr	r3, [r4, #0]
 80058a8:	079b      	lsls	r3, r3, #30
 80058aa:	d502      	bpl.n	80058b2 <HAL_RCC_OscConfig+0xfa>
 80058ac:	692b      	ldr	r3, [r5, #16]
 80058ae:	2b01      	cmp	r3, #1
 80058b0:	d186      	bne.n	80057c0 <HAL_RCC_OscConfig+0x8>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80058b2:	6823      	ldr	r3, [r4, #0]
 80058b4:	696a      	ldr	r2, [r5, #20]
 80058b6:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 80058ba:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 80058be:	6023      	str	r3, [r4, #0]
 80058c0:	e786      	b.n	80057d0 <HAL_RCC_OscConfig+0x18>
      if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 80058c2:	692a      	ldr	r2, [r5, #16]
 80058c4:	4b5a      	ldr	r3, [pc, #360]	; (8005a30 <HAL_RCC_OscConfig+0x278>)
 80058c6:	b16a      	cbz	r2, 80058e4 <HAL_RCC_OscConfig+0x12c>
        __HAL_RCC_HSI_ENABLE();
 80058c8:	2201      	movs	r2, #1
 80058ca:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 80058cc:	f7ff f986 	bl	8004bdc <HAL_GetTick>
 80058d0:	4606      	mov	r6, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80058d2:	6823      	ldr	r3, [r4, #0]
 80058d4:	079f      	lsls	r7, r3, #30
 80058d6:	d4ec      	bmi.n	80058b2 <HAL_RCC_OscConfig+0xfa>
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 80058d8:	f7ff f980 	bl	8004bdc <HAL_GetTick>
 80058dc:	1b80      	subs	r0, r0, r6
 80058de:	2802      	cmp	r0, #2
 80058e0:	d9f7      	bls.n	80058d2 <HAL_RCC_OscConfig+0x11a>
 80058e2:	e7ab      	b.n	800583c <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 80058e4:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 80058e6:	f7ff f979 	bl	8004bdc <HAL_GetTick>
 80058ea:	4606      	mov	r6, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 80058ec:	6823      	ldr	r3, [r4, #0]
 80058ee:	0798      	lsls	r0, r3, #30
 80058f0:	f57f af6e 	bpl.w	80057d0 <HAL_RCC_OscConfig+0x18>
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 80058f4:	f7ff f972 	bl	8004bdc <HAL_GetTick>
 80058f8:	1b80      	subs	r0, r0, r6
 80058fa:	2802      	cmp	r0, #2
 80058fc:	d9f6      	bls.n	80058ec <HAL_RCC_OscConfig+0x134>
 80058fe:	e79d      	b.n	800583c <HAL_RCC_OscConfig+0x84>
    if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8005900:	69aa      	ldr	r2, [r5, #24]
 8005902:	4c4a      	ldr	r4, [pc, #296]	; (8005a2c <HAL_RCC_OscConfig+0x274>)
 8005904:	4b4b      	ldr	r3, [pc, #300]	; (8005a34 <HAL_RCC_OscConfig+0x27c>)
 8005906:	b1da      	cbz	r2, 8005940 <HAL_RCC_OscConfig+0x188>
      __HAL_RCC_LSI_ENABLE();
 8005908:	2201      	movs	r2, #1
 800590a:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 800590c:	f7ff f966 	bl	8004bdc <HAL_GetTick>
 8005910:	4606      	mov	r6, r0
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8005912:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8005914:	079b      	lsls	r3, r3, #30
 8005916:	d50d      	bpl.n	8005934 <HAL_RCC_OscConfig+0x17c>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 8005918:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 800591c:	4b46      	ldr	r3, [pc, #280]	; (8005a38 <HAL_RCC_OscConfig+0x280>)
 800591e:	681b      	ldr	r3, [r3, #0]
 8005920:	fbb3 f3f2 	udiv	r3, r3, r2
 8005924:	9301      	str	r3, [sp, #4]
  do
  {
    __NOP();
 8005926:	bf00      	nop
  }
  while (Delay --);
 8005928:	9b01      	ldr	r3, [sp, #4]
 800592a:	1e5a      	subs	r2, r3, #1
 800592c:	9201      	str	r2, [sp, #4]
 800592e:	2b00      	cmp	r3, #0
 8005930:	d1f9      	bne.n	8005926 <HAL_RCC_OscConfig+0x16e>
 8005932:	e751      	b.n	80057d8 <HAL_RCC_OscConfig+0x20>
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 8005934:	f7ff f952 	bl	8004bdc <HAL_GetTick>
 8005938:	1b80      	subs	r0, r0, r6
 800593a:	2802      	cmp	r0, #2
 800593c:	d9e9      	bls.n	8005912 <HAL_RCC_OscConfig+0x15a>
 800593e:	e77d      	b.n	800583c <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 8005940:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8005942:	f7ff f94b 	bl	8004bdc <HAL_GetTick>
 8005946:	4606      	mov	r6, r0
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8005948:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800594a:	079f      	lsls	r7, r3, #30
 800594c:	f57f af44 	bpl.w	80057d8 <HAL_RCC_OscConfig+0x20>
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 8005950:	f7ff f944 	bl	8004bdc <HAL_GetTick>
 8005954:	1b80      	subs	r0, r0, r6
 8005956:	2802      	cmp	r0, #2
 8005958:	d9f6      	bls.n	8005948 <HAL_RCC_OscConfig+0x190>
 800595a:	e76f      	b.n	800583c <HAL_RCC_OscConfig+0x84>
    if (__HAL_RCC_PWR_IS_CLK_DISABLED())
 800595c:	4c33      	ldr	r4, [pc, #204]	; (8005a2c <HAL_RCC_OscConfig+0x274>)
 800595e:	69e3      	ldr	r3, [r4, #28]
 8005960:	00d8      	lsls	r0, r3, #3
 8005962:	d424      	bmi.n	80059ae <HAL_RCC_OscConfig+0x1f6>
      pwrclkchanged = SET;
 8005964:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 8005966:	69e3      	ldr	r3, [r4, #28]
 8005968:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 800596c:	61e3      	str	r3, [r4, #28]
 800596e:	69e3      	ldr	r3, [r4, #28]
 8005970:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8005974:	9300      	str	r3, [sp, #0]
 8005976:	9b00      	ldr	r3, [sp, #0]
    if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8005978:	4e30      	ldr	r6, [pc, #192]	; (8005a3c <HAL_RCC_OscConfig+0x284>)
 800597a:	6833      	ldr	r3, [r6, #0]
 800597c:	05d9      	lsls	r1, r3, #23
 800597e:	d518      	bpl.n	80059b2 <HAL_RCC_OscConfig+0x1fa>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005980:	68eb      	ldr	r3, [r5, #12]
 8005982:	2b01      	cmp	r3, #1
 8005984:	d126      	bne.n	80059d4 <HAL_RCC_OscConfig+0x21c>
 8005986:	6a23      	ldr	r3, [r4, #32]
 8005988:	f043 0301 	orr.w	r3, r3, #1
 800598c:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 800598e:	f7ff f925 	bl	8004bdc <HAL_GetTick>
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 8005992:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 8005996:	4680      	mov	r8, r0
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 8005998:	6a23      	ldr	r3, [r4, #32]
 800599a:	079b      	lsls	r3, r3, #30
 800599c:	d53f      	bpl.n	8005a1e <HAL_RCC_OscConfig+0x266>
    if (pwrclkchanged == SET)
 800599e:	2f00      	cmp	r7, #0
 80059a0:	f43f af1e 	beq.w	80057e0 <HAL_RCC_OscConfig+0x28>
      __HAL_RCC_PWR_CLK_DISABLE();
 80059a4:	69e3      	ldr	r3, [r4, #28]
 80059a6:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 80059aa:	61e3      	str	r3, [r4, #28]
 80059ac:	e718      	b.n	80057e0 <HAL_RCC_OscConfig+0x28>
    FlagStatus       pwrclkchanged = RESET;
 80059ae:	2700      	movs	r7, #0
 80059b0:	e7e2      	b.n	8005978 <HAL_RCC_OscConfig+0x1c0>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 80059b2:	6833      	ldr	r3, [r6, #0]
 80059b4:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80059b8:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 80059ba:	f7ff f90f 	bl	8004bdc <HAL_GetTick>
 80059be:	4680      	mov	r8, r0
      while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80059c0:	6833      	ldr	r3, [r6, #0]
 80059c2:	05da      	lsls	r2, r3, #23
 80059c4:	d4dc      	bmi.n	8005980 <HAL_RCC_OscConfig+0x1c8>
        if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 80059c6:	f7ff f909 	bl	8004bdc <HAL_GetTick>
 80059ca:	eba0 0008 	sub.w	r0, r0, r8
 80059ce:	2864      	cmp	r0, #100	; 0x64
 80059d0:	d9f6      	bls.n	80059c0 <HAL_RCC_OscConfig+0x208>
 80059d2:	e733      	b.n	800583c <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80059d4:	b9ab      	cbnz	r3, 8005a02 <HAL_RCC_OscConfig+0x24a>
 80059d6:	6a23      	ldr	r3, [r4, #32]
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80059d8:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80059dc:	f023 0301 	bic.w	r3, r3, #1
 80059e0:	6223      	str	r3, [r4, #32]
 80059e2:	6a23      	ldr	r3, [r4, #32]
 80059e4:	f023 0304 	bic.w	r3, r3, #4
 80059e8:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 80059ea:	f7ff f8f7 	bl	8004bdc <HAL_GetTick>
 80059ee:	4606      	mov	r6, r0
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 80059f0:	6a23      	ldr	r3, [r4, #32]
 80059f2:	0798      	lsls	r0, r3, #30
 80059f4:	d5d3      	bpl.n	800599e <HAL_RCC_OscConfig+0x1e6>
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80059f6:	f7ff f8f1 	bl	8004bdc <HAL_GetTick>
 80059fa:	1b80      	subs	r0, r0, r6
 80059fc:	4540      	cmp	r0, r8
 80059fe:	d9f7      	bls.n	80059f0 <HAL_RCC_OscConfig+0x238>
 8005a00:	e71c      	b.n	800583c <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005a02:	2b05      	cmp	r3, #5
 8005a04:	6a23      	ldr	r3, [r4, #32]
 8005a06:	d103      	bne.n	8005a10 <HAL_RCC_OscConfig+0x258>
 8005a08:	f043 0304 	orr.w	r3, r3, #4
 8005a0c:	6223      	str	r3, [r4, #32]
 8005a0e:	e7ba      	b.n	8005986 <HAL_RCC_OscConfig+0x1ce>
 8005a10:	f023 0301 	bic.w	r3, r3, #1
 8005a14:	6223      	str	r3, [r4, #32]
 8005a16:	6a23      	ldr	r3, [r4, #32]
 8005a18:	f023 0304 	bic.w	r3, r3, #4
 8005a1c:	e7b6      	b.n	800598c <HAL_RCC_OscConfig+0x1d4>
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 8005a1e:	f7ff f8dd 	bl	8004bdc <HAL_GetTick>
 8005a22:	eba0 0008 	sub.w	r0, r0, r8
 8005a26:	42b0      	cmp	r0, r6
 8005a28:	d9b6      	bls.n	8005998 <HAL_RCC_OscConfig+0x1e0>
 8005a2a:	e707      	b.n	800583c <HAL_RCC_OscConfig+0x84>
 8005a2c:	40021000 	.word	0x40021000
 8005a30:	42420000 	.word	0x42420000
 8005a34:	42420480 	.word	0x42420480
 8005a38:	20000208 	.word	0x20000208
 8005a3c:	40007000 	.word	0x40007000
    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8005a40:	4b2a      	ldr	r3, [pc, #168]	; (8005aec <HAL_RCC_OscConfig+0x334>)
 8005a42:	685a      	ldr	r2, [r3, #4]
 8005a44:	461c      	mov	r4, r3
 8005a46:	f002 020c 	and.w	r2, r2, #12
 8005a4a:	2a08      	cmp	r2, #8
 8005a4c:	d03d      	beq.n	8005aca <HAL_RCC_OscConfig+0x312>
 8005a4e:	2300      	movs	r3, #0
 8005a50:	4e27      	ldr	r6, [pc, #156]	; (8005af0 <HAL_RCC_OscConfig+0x338>)
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8005a52:	2802      	cmp	r0, #2
        __HAL_RCC_PLL_DISABLE();
 8005a54:	6033      	str	r3, [r6, #0]
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8005a56:	d12b      	bne.n	8005ab0 <HAL_RCC_OscConfig+0x2f8>
        tickstart = HAL_GetTick();
 8005a58:	f7ff f8c0 	bl	8004bdc <HAL_GetTick>
 8005a5c:	4607      	mov	r7, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8005a5e:	6823      	ldr	r3, [r4, #0]
 8005a60:	0199      	lsls	r1, r3, #6
 8005a62:	d41f      	bmi.n	8005aa4 <HAL_RCC_OscConfig+0x2ec>
        if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8005a64:	6a2b      	ldr	r3, [r5, #32]
 8005a66:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8005a6a:	d105      	bne.n	8005a78 <HAL_RCC_OscConfig+0x2c0>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8005a6c:	6862      	ldr	r2, [r4, #4]
 8005a6e:	68a9      	ldr	r1, [r5, #8]
 8005a70:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 8005a74:	430a      	orrs	r2, r1
 8005a76:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8005a78:	6a69      	ldr	r1, [r5, #36]	; 0x24
 8005a7a:	6862      	ldr	r2, [r4, #4]
 8005a7c:	430b      	orrs	r3, r1
 8005a7e:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 8005a82:	4313      	orrs	r3, r2
 8005a84:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 8005a86:	2301      	movs	r3, #1
 8005a88:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 8005a8a:	f7ff f8a7 	bl	8004bdc <HAL_GetTick>
 8005a8e:	4605      	mov	r5, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8005a90:	6823      	ldr	r3, [r4, #0]
 8005a92:	019a      	lsls	r2, r3, #6
 8005a94:	f53f aea8 	bmi.w	80057e8 <HAL_RCC_OscConfig+0x30>
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 8005a98:	f7ff f8a0 	bl	8004bdc <HAL_GetTick>
 8005a9c:	1b40      	subs	r0, r0, r5
 8005a9e:	2802      	cmp	r0, #2
 8005aa0:	d9f6      	bls.n	8005a90 <HAL_RCC_OscConfig+0x2d8>
 8005aa2:	e6cb      	b.n	800583c <HAL_RCC_OscConfig+0x84>
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 8005aa4:	f7ff f89a 	bl	8004bdc <HAL_GetTick>
 8005aa8:	1bc0      	subs	r0, r0, r7
 8005aaa:	2802      	cmp	r0, #2
 8005aac:	d9d7      	bls.n	8005a5e <HAL_RCC_OscConfig+0x2a6>
 8005aae:	e6c5      	b.n	800583c <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8005ab0:	f7ff f894 	bl	8004bdc <HAL_GetTick>
 8005ab4:	4605      	mov	r5, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8005ab6:	6823      	ldr	r3, [r4, #0]
 8005ab8:	019b      	lsls	r3, r3, #6
 8005aba:	f57f ae95 	bpl.w	80057e8 <HAL_RCC_OscConfig+0x30>
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 8005abe:	f7ff f88d 	bl	8004bdc <HAL_GetTick>
 8005ac2:	1b40      	subs	r0, r0, r5
 8005ac4:	2802      	cmp	r0, #2
 8005ac6:	d9f6      	bls.n	8005ab6 <HAL_RCC_OscConfig+0x2fe>
 8005ac8:	e6b8      	b.n	800583c <HAL_RCC_OscConfig+0x84>
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
 8005aca:	2801      	cmp	r0, #1
 8005acc:	f43f aeb7 	beq.w	800583e <HAL_RCC_OscConfig+0x86>
        pll_config = RCC->CFGR;
 8005ad0:	6858      	ldr	r0, [r3, #4]
        if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 8005ad2:	6a2b      	ldr	r3, [r5, #32]
 8005ad4:	f400 3280 	and.w	r2, r0, #65536	; 0x10000
 8005ad8:	429a      	cmp	r2, r3
 8005ada:	f47f ae71 	bne.w	80057c0 <HAL_RCC_OscConfig+0x8>
 8005ade:	6a6b      	ldr	r3, [r5, #36]	; 0x24
            (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
 8005ae0:	f400 1070 	and.w	r0, r0, #3932160	; 0x3c0000
    return HAL_ERROR;
 8005ae4:	1ac0      	subs	r0, r0, r3
 8005ae6:	bf18      	it	ne
 8005ae8:	2001      	movne	r0, #1
 8005aea:	e6a8      	b.n	800583e <HAL_RCC_OscConfig+0x86>
 8005aec:	40021000 	.word	0x40021000
 8005af0:	42420060 	.word	0x42420060

08005af4 <HAL_RCC_GetSysClockFreq>:
{
 8005af4:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8005af6:	4b19      	ldr	r3, [pc, #100]	; (8005b5c <HAL_RCC_GetSysClockFreq+0x68>)
{
 8005af8:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8005afa:	ac02      	add	r4, sp, #8
 8005afc:	f103 0510 	add.w	r5, r3, #16
 8005b00:	4622      	mov	r2, r4
 8005b02:	6818      	ldr	r0, [r3, #0]
 8005b04:	6859      	ldr	r1, [r3, #4]
 8005b06:	3308      	adds	r3, #8
 8005b08:	c203      	stmia	r2!, {r0, r1}
 8005b0a:	42ab      	cmp	r3, r5
 8005b0c:	4614      	mov	r4, r2
 8005b0e:	d1f7      	bne.n	8005b00 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8005b10:	2301      	movs	r3, #1
 8005b12:	f88d 3004 	strb.w	r3, [sp, #4]
 8005b16:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 8005b18:	4911      	ldr	r1, [pc, #68]	; (8005b60 <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8005b1a:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 8005b1e:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 8005b20:	f003 020c 	and.w	r2, r3, #12
 8005b24:	2a08      	cmp	r2, #8
 8005b26:	d117      	bne.n	8005b58 <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8005b28:	f3c3 4283 	ubfx	r2, r3, #18, #4
 8005b2c:	a806      	add	r0, sp, #24
 8005b2e:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8005b30:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8005b32:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8005b36:	d50c      	bpl.n	8005b52 <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8005b38:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8005b3a:	480a      	ldr	r0, [pc, #40]	; (8005b64 <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8005b3c:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8005b40:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8005b42:	aa06      	add	r2, sp, #24
 8005b44:	4413      	add	r3, r2
 8005b46:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8005b4a:	fbb0 f0f3 	udiv	r0, r0, r3
}
 8005b4e:	b007      	add	sp, #28
 8005b50:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 8005b52:	4805      	ldr	r0, [pc, #20]	; (8005b68 <HAL_RCC_GetSysClockFreq+0x74>)
 8005b54:	4350      	muls	r0, r2
 8005b56:	e7fa      	b.n	8005b4e <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 8005b58:	4802      	ldr	r0, [pc, #8]	; (8005b64 <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 8005b5a:	e7f8      	b.n	8005b4e <HAL_RCC_GetSysClockFreq+0x5a>
 8005b5c:	08009b98 	.word	0x08009b98
 8005b60:	40021000 	.word	0x40021000
 8005b64:	007a1200 	.word	0x007a1200
 8005b68:	003d0900 	.word	0x003d0900

08005b6c <HAL_RCC_ClockConfig>:
{
 8005b6c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8005b70:	460d      	mov	r5, r1
  if (RCC_ClkInitStruct == NULL)
 8005b72:	4604      	mov	r4, r0
 8005b74:	b910      	cbnz	r0, 8005b7c <HAL_RCC_ClockConfig+0x10>
    return HAL_ERROR;
 8005b76:	2001      	movs	r0, #1
 8005b78:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
  if (FLatency > __HAL_FLASH_GET_LATENCY())
 8005b7c:	4a45      	ldr	r2, [pc, #276]	; (8005c94 <HAL_RCC_ClockConfig+0x128>)
 8005b7e:	6813      	ldr	r3, [r2, #0]
 8005b80:	f003 0307 	and.w	r3, r3, #7
 8005b84:	428b      	cmp	r3, r1
 8005b86:	d329      	bcc.n	8005bdc <HAL_RCC_ClockConfig+0x70>
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8005b88:	6821      	ldr	r1, [r4, #0]
 8005b8a:	078e      	lsls	r6, r1, #30
 8005b8c:	d431      	bmi.n	8005bf2 <HAL_RCC_ClockConfig+0x86>
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8005b8e:	07ca      	lsls	r2, r1, #31
 8005b90:	d444      	bmi.n	8005c1c <HAL_RCC_ClockConfig+0xb0>
  if (FLatency < __HAL_FLASH_GET_LATENCY())
 8005b92:	4a40      	ldr	r2, [pc, #256]	; (8005c94 <HAL_RCC_ClockConfig+0x128>)
 8005b94:	6813      	ldr	r3, [r2, #0]
 8005b96:	f003 0307 	and.w	r3, r3, #7
 8005b9a:	429d      	cmp	r5, r3
 8005b9c:	d367      	bcc.n	8005c6e <HAL_RCC_ClockConfig+0x102>
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8005b9e:	6822      	ldr	r2, [r4, #0]
 8005ba0:	4d3d      	ldr	r5, [pc, #244]	; (8005c98 <HAL_RCC_ClockConfig+0x12c>)
 8005ba2:	f012 0f04 	tst.w	r2, #4
 8005ba6:	d16e      	bne.n	8005c86 <HAL_RCC_ClockConfig+0x11a>
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8005ba8:	0713      	lsls	r3, r2, #28
 8005baa:	d506      	bpl.n	8005bba <HAL_RCC_ClockConfig+0x4e>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 8005bac:	686b      	ldr	r3, [r5, #4]
 8005bae:	6922      	ldr	r2, [r4, #16]
 8005bb0:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8005bb4:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8005bb8:	606b      	str	r3, [r5, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
 8005bba:	f7ff ff9b 	bl	8005af4 <HAL_RCC_GetSysClockFreq>
 8005bbe:	686b      	ldr	r3, [r5, #4]
 8005bc0:	4a36      	ldr	r2, [pc, #216]	; (8005c9c <HAL_RCC_ClockConfig+0x130>)
 8005bc2:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8005bc6:	5cd3      	ldrb	r3, [r2, r3]
 8005bc8:	40d8      	lsrs	r0, r3
 8005bca:	4b35      	ldr	r3, [pc, #212]	; (8005ca0 <HAL_RCC_ClockConfig+0x134>)
 8005bcc:	6018      	str	r0, [r3, #0]
  HAL_InitTick(uwTickPrio);
 8005bce:	4b35      	ldr	r3, [pc, #212]	; (8005ca4 <HAL_RCC_ClockConfig+0x138>)
 8005bd0:	6818      	ldr	r0, [r3, #0]
 8005bd2:	f7fe ffc1 	bl	8004b58 <HAL_InitTick>
  return HAL_OK;
 8005bd6:	2000      	movs	r0, #0
 8005bd8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 8005bdc:	6813      	ldr	r3, [r2, #0]
 8005bde:	f023 0307 	bic.w	r3, r3, #7
 8005be2:	430b      	orrs	r3, r1
 8005be4:	6013      	str	r3, [r2, #0]
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 8005be6:	6813      	ldr	r3, [r2, #0]
 8005be8:	f003 0307 	and.w	r3, r3, #7
 8005bec:	4299      	cmp	r1, r3
 8005bee:	d1c2      	bne.n	8005b76 <HAL_RCC_ClockConfig+0xa>
 8005bf0:	e7ca      	b.n	8005b88 <HAL_RCC_ClockConfig+0x1c>
 8005bf2:	4b29      	ldr	r3, [pc, #164]	; (8005c98 <HAL_RCC_ClockConfig+0x12c>)
    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8005bf4:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8005bf8:	bf1e      	ittt	ne
 8005bfa:	685a      	ldrne	r2, [r3, #4]
 8005bfc:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 8005c00:	605a      	strne	r2, [r3, #4]
    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8005c02:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8005c04:	bf42      	ittt	mi
 8005c06:	685a      	ldrmi	r2, [r3, #4]
 8005c08:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 8005c0c:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8005c0e:	685a      	ldr	r2, [r3, #4]
 8005c10:	68a0      	ldr	r0, [r4, #8]
 8005c12:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8005c16:	4302      	orrs	r2, r0
 8005c18:	605a      	str	r2, [r3, #4]
 8005c1a:	e7b8      	b.n	8005b8e <HAL_RCC_ClockConfig+0x22>
    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8005c1c:	6862      	ldr	r2, [r4, #4]
 8005c1e:	4e1e      	ldr	r6, [pc, #120]	; (8005c98 <HAL_RCC_ClockConfig+0x12c>)
 8005c20:	2a01      	cmp	r2, #1
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8005c22:	6833      	ldr	r3, [r6, #0]
    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8005c24:	d11b      	bne.n	8005c5e <HAL_RCC_ClockConfig+0xf2>
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8005c26:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8005c2a:	d0a4      	beq.n	8005b76 <HAL_RCC_ClockConfig+0xa>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8005c2c:	6873      	ldr	r3, [r6, #4]
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 8005c2e:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8005c32:	f023 0303 	bic.w	r3, r3, #3
 8005c36:	4313      	orrs	r3, r2
 8005c38:	6073      	str	r3, [r6, #4]
    tickstart = HAL_GetTick();
 8005c3a:	f7fe ffcf 	bl	8004bdc <HAL_GetTick>
 8005c3e:	4607      	mov	r7, r0
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 8005c40:	6873      	ldr	r3, [r6, #4]
 8005c42:	6862      	ldr	r2, [r4, #4]
 8005c44:	f003 030c 	and.w	r3, r3, #12
 8005c48:	ebb3 0f82 	cmp.w	r3, r2, lsl #2
 8005c4c:	d0a1      	beq.n	8005b92 <HAL_RCC_ClockConfig+0x26>
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 8005c4e:	f7fe ffc5 	bl	8004bdc <HAL_GetTick>
 8005c52:	1bc0      	subs	r0, r0, r7
 8005c54:	4540      	cmp	r0, r8
 8005c56:	d9f3      	bls.n	8005c40 <HAL_RCC_ClockConfig+0xd4>
        return HAL_TIMEOUT;
 8005c58:	2003      	movs	r0, #3
}
 8005c5a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8005c5e:	2a02      	cmp	r2, #2
 8005c60:	d102      	bne.n	8005c68 <HAL_RCC_ClockConfig+0xfc>
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8005c62:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 8005c66:	e7e0      	b.n	8005c2a <HAL_RCC_ClockConfig+0xbe>
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8005c68:	f013 0f02 	tst.w	r3, #2
 8005c6c:	e7dd      	b.n	8005c2a <HAL_RCC_ClockConfig+0xbe>
    __HAL_FLASH_SET_LATENCY(FLatency);
 8005c6e:	6813      	ldr	r3, [r2, #0]
 8005c70:	f023 0307 	bic.w	r3, r3, #7
 8005c74:	432b      	orrs	r3, r5
 8005c76:	6013      	str	r3, [r2, #0]
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 8005c78:	6813      	ldr	r3, [r2, #0]
 8005c7a:	f003 0307 	and.w	r3, r3, #7
 8005c7e:	429d      	cmp	r5, r3
 8005c80:	f47f af79 	bne.w	8005b76 <HAL_RCC_ClockConfig+0xa>
 8005c84:	e78b      	b.n	8005b9e <HAL_RCC_ClockConfig+0x32>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8005c86:	686b      	ldr	r3, [r5, #4]
 8005c88:	68e1      	ldr	r1, [r4, #12]
 8005c8a:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8005c8e:	430b      	orrs	r3, r1
 8005c90:	606b      	str	r3, [r5, #4]
 8005c92:	e789      	b.n	8005ba8 <HAL_RCC_ClockConfig+0x3c>
 8005c94:	40022000 	.word	0x40022000
 8005c98:	40021000 	.word	0x40021000
 8005c9c:	08009c84 	.word	0x08009c84
 8005ca0:	20000208 	.word	0x20000208
 8005ca4:	20000004 	.word	0x20000004

08005ca8 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8005ca8:	4b04      	ldr	r3, [pc, #16]	; (8005cbc <HAL_RCC_GetPCLK1Freq+0x14>)
 8005caa:	4a05      	ldr	r2, [pc, #20]	; (8005cc0 <HAL_RCC_GetPCLK1Freq+0x18>)
 8005cac:	685b      	ldr	r3, [r3, #4]
 8005cae:	f3c3 2302 	ubfx	r3, r3, #8, #3
 8005cb2:	5cd3      	ldrb	r3, [r2, r3]
 8005cb4:	4a03      	ldr	r2, [pc, #12]	; (8005cc4 <HAL_RCC_GetPCLK1Freq+0x1c>)
 8005cb6:	6810      	ldr	r0, [r2, #0]
}
 8005cb8:	40d8      	lsrs	r0, r3
 8005cba:	4770      	bx	lr
 8005cbc:	40021000 	.word	0x40021000
 8005cc0:	08009c94 	.word	0x08009c94
 8005cc4:	20000208 	.word	0x20000208

08005cc8 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 8005cc8:	4b04      	ldr	r3, [pc, #16]	; (8005cdc <HAL_RCC_GetPCLK2Freq+0x14>)
 8005cca:	4a05      	ldr	r2, [pc, #20]	; (8005ce0 <HAL_RCC_GetPCLK2Freq+0x18>)
 8005ccc:	685b      	ldr	r3, [r3, #4]
 8005cce:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 8005cd2:	5cd3      	ldrb	r3, [r2, r3]
 8005cd4:	4a03      	ldr	r2, [pc, #12]	; (8005ce4 <HAL_RCC_GetPCLK2Freq+0x1c>)
 8005cd6:	6810      	ldr	r0, [r2, #0]
}
 8005cd8:	40d8      	lsrs	r0, r3
 8005cda:	4770      	bx	lr
 8005cdc:	40021000 	.word	0x40021000
 8005ce0:	08009c94 	.word	0x08009c94
 8005ce4:	20000208 	.word	0x20000208

08005ce8 <HAL_RCCEx_PeriphCLKConfig>:

  /* Check the parameters */
  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));

  /*------------------------------- RTC/LCD Configuration ------------------------*/
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8005ce8:	6803      	ldr	r3, [r0, #0]
{
 8005cea:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8005cee:	07d9      	lsls	r1, r3, #31
{
 8005cf0:	4605      	mov	r5, r0
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8005cf2:	d520      	bpl.n	8005d36 <HAL_RCCEx_PeriphCLKConfig+0x4e>
    FlagStatus       pwrclkchanged = RESET;

    /* As soon as function is called to change RTC clock source, activation of the
       power domain is done. */
    /* Requires to enable write access to Backup Domain of necessary */
    if (__HAL_RCC_PWR_IS_CLK_DISABLED())
 8005cf4:	4c35      	ldr	r4, [pc, #212]	; (8005dcc <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8005cf6:	69e3      	ldr	r3, [r4, #28]
 8005cf8:	00da      	lsls	r2, r3, #3
 8005cfa:	d432      	bmi.n	8005d62 <HAL_RCCEx_PeriphCLKConfig+0x7a>
    {
      __HAL_RCC_PWR_CLK_ENABLE();
      pwrclkchanged = SET;
 8005cfc:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 8005cfe:	69e3      	ldr	r3, [r4, #28]
 8005d00:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8005d04:	61e3      	str	r3, [r4, #28]
 8005d06:	69e3      	ldr	r3, [r4, #28]
 8005d08:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8005d0c:	9301      	str	r3, [sp, #4]
 8005d0e:	9b01      	ldr	r3, [sp, #4]
    }

    if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8005d10:	4e2f      	ldr	r6, [pc, #188]	; (8005dd0 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 8005d12:	6833      	ldr	r3, [r6, #0]
 8005d14:	05db      	lsls	r3, r3, #23
 8005d16:	d526      	bpl.n	8005d66 <HAL_RCCEx_PeriphCLKConfig+0x7e>
        }
      }
    }

    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
    temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
 8005d18:	6a23      	ldr	r3, [r4, #32]
    if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 8005d1a:	f413 7340 	ands.w	r3, r3, #768	; 0x300
 8005d1e:	d136      	bne.n	8005d8e <HAL_RCCEx_PeriphCLKConfig+0xa6>
            return HAL_TIMEOUT;
          }
        }
      }
    }
    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
 8005d20:	6a23      	ldr	r3, [r4, #32]
 8005d22:	686a      	ldr	r2, [r5, #4]
 8005d24:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8005d28:	4313      	orrs	r3, r2
 8005d2a:	6223      	str	r3, [r4, #32]

    /* Require to disable power clock if necessary */
    if (pwrclkchanged == SET)
 8005d2c:	b11f      	cbz	r7, 8005d36 <HAL_RCCEx_PeriphCLKConfig+0x4e>
    {
      __HAL_RCC_PWR_CLK_DISABLE();
 8005d2e:	69e3      	ldr	r3, [r4, #28]
 8005d30:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8005d34:	61e3      	str	r3, [r4, #28]
    }
  }

  /*------------------------------ ADC clock Configuration ------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 8005d36:	6828      	ldr	r0, [r5, #0]
 8005d38:	0783      	lsls	r3, r0, #30
 8005d3a:	d506      	bpl.n	8005d4a <HAL_RCCEx_PeriphCLKConfig+0x62>
  {
    /* Check the parameters */
    assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));

    /* Configure the ADC clock source */
    __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 8005d3c:	4a23      	ldr	r2, [pc, #140]	; (8005dcc <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8005d3e:	68a9      	ldr	r1, [r5, #8]
 8005d40:	6853      	ldr	r3, [r2, #4]
 8005d42:	f423 4340 	bic.w	r3, r3, #49152	; 0xc000
 8005d46:	430b      	orrs	r3, r1
 8005d48:	6053      	str	r3, [r2, #4]

#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
 || defined(STM32F105xC) || defined(STM32F107xC)
  /*------------------------------ USB clock Configuration ------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 8005d4a:	f010 0010 	ands.w	r0, r0, #16
 8005d4e:	d01b      	beq.n	8005d88 <HAL_RCCEx_PeriphCLKConfig+0xa0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));

    /* Configure the USB clock source */
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8005d50:	4a1e      	ldr	r2, [pc, #120]	; (8005dcc <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8005d52:	6969      	ldr	r1, [r5, #20]
 8005d54:	6853      	ldr	r3, [r2, #4]
  }
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */

  return HAL_OK;
 8005d56:	2000      	movs	r0, #0
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8005d58:	f423 0380 	bic.w	r3, r3, #4194304	; 0x400000
 8005d5c:	430b      	orrs	r3, r1
 8005d5e:	6053      	str	r3, [r2, #4]
 8005d60:	e012      	b.n	8005d88 <HAL_RCCEx_PeriphCLKConfig+0xa0>
    FlagStatus       pwrclkchanged = RESET;
 8005d62:	2700      	movs	r7, #0
 8005d64:	e7d4      	b.n	8005d10 <HAL_RCCEx_PeriphCLKConfig+0x28>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8005d66:	6833      	ldr	r3, [r6, #0]
 8005d68:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8005d6c:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 8005d6e:	f7fe ff35 	bl	8004bdc <HAL_GetTick>
 8005d72:	4680      	mov	r8, r0
      while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8005d74:	6833      	ldr	r3, [r6, #0]
 8005d76:	05d8      	lsls	r0, r3, #23
 8005d78:	d4ce      	bmi.n	8005d18 <HAL_RCCEx_PeriphCLKConfig+0x30>
        if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8005d7a:	f7fe ff2f 	bl	8004bdc <HAL_GetTick>
 8005d7e:	eba0 0008 	sub.w	r0, r0, r8
 8005d82:	2864      	cmp	r0, #100	; 0x64
 8005d84:	d9f6      	bls.n	8005d74 <HAL_RCCEx_PeriphCLKConfig+0x8c>
          return HAL_TIMEOUT;
 8005d86:	2003      	movs	r0, #3
}
 8005d88:	b002      	add	sp, #8
 8005d8a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 8005d8e:	686a      	ldr	r2, [r5, #4]
 8005d90:	f402 7240 	and.w	r2, r2, #768	; 0x300
 8005d94:	4293      	cmp	r3, r2
 8005d96:	d0c3      	beq.n	8005d20 <HAL_RCCEx_PeriphCLKConfig+0x38>
      __HAL_RCC_BACKUPRESET_FORCE();
 8005d98:	2001      	movs	r0, #1
 8005d9a:	4a0e      	ldr	r2, [pc, #56]	; (8005dd4 <HAL_RCCEx_PeriphCLKConfig+0xec>)
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 8005d9c:	6a23      	ldr	r3, [r4, #32]
      __HAL_RCC_BACKUPRESET_FORCE();
 8005d9e:	6010      	str	r0, [r2, #0]
      __HAL_RCC_BACKUPRESET_RELEASE();
 8005da0:	2000      	movs	r0, #0
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 8005da2:	f423 7140 	bic.w	r1, r3, #768	; 0x300
      __HAL_RCC_BACKUPRESET_RELEASE();
 8005da6:	6010      	str	r0, [r2, #0]
      RCC->BDCR = temp_reg;
 8005da8:	6221      	str	r1, [r4, #32]
      if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
 8005daa:	07d9      	lsls	r1, r3, #31
 8005dac:	d5b8      	bpl.n	8005d20 <HAL_RCCEx_PeriphCLKConfig+0x38>
        tickstart = HAL_GetTick();
 8005dae:	f7fe ff15 	bl	8004bdc <HAL_GetTick>
          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 8005db2:	f241 3888 	movw	r8, #5000	; 0x1388
        tickstart = HAL_GetTick();
 8005db6:	4606      	mov	r6, r0
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 8005db8:	6a23      	ldr	r3, [r4, #32]
 8005dba:	079a      	lsls	r2, r3, #30
 8005dbc:	d4b0      	bmi.n	8005d20 <HAL_RCCEx_PeriphCLKConfig+0x38>
          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 8005dbe:	f7fe ff0d 	bl	8004bdc <HAL_GetTick>
 8005dc2:	1b80      	subs	r0, r0, r6
 8005dc4:	4540      	cmp	r0, r8
 8005dc6:	d9f7      	bls.n	8005db8 <HAL_RCCEx_PeriphCLKConfig+0xd0>
 8005dc8:	e7dd      	b.n	8005d86 <HAL_RCCEx_PeriphCLKConfig+0x9e>
 8005dca:	bf00      	nop
 8005dcc:	40021000 	.word	0x40021000
 8005dd0:	40007000 	.word	0x40007000
 8005dd4:	42420440 	.word	0x42420440

08005dd8 <HAL_TIM_Base_Start_IT>:

  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8005dd8:	6803      	ldr	r3, [r0, #0]
    __HAL_TIM_ENABLE(htim);
  }

  /* Return function status */
  return HAL_OK;
}
 8005dda:	2000      	movs	r0, #0
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8005ddc:	68da      	ldr	r2, [r3, #12]
 8005dde:	f042 0201 	orr.w	r2, r2, #1
 8005de2:	60da      	str	r2, [r3, #12]
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
 8005de4:	689a      	ldr	r2, [r3, #8]
 8005de6:	f002 0207 	and.w	r2, r2, #7
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 8005dea:	2a06      	cmp	r2, #6
    __HAL_TIM_ENABLE(htim);
 8005dec:	bf1e      	ittt	ne
 8005dee:	681a      	ldrne	r2, [r3, #0]
 8005df0:	f042 0201 	orrne.w	r2, r2, #1
 8005df4:	601a      	strne	r2, [r3, #0]
}
 8005df6:	4770      	bx	lr

08005df8 <HAL_TIM_OC_DelayElapsedCallback>:
 8005df8:	4770      	bx	lr

08005dfa <HAL_TIM_IC_CaptureCallback>:
 8005dfa:	4770      	bx	lr

08005dfc <HAL_TIM_PWM_PulseFinishedCallback>:
 8005dfc:	4770      	bx	lr

08005dfe <HAL_TIM_TriggerCallback>:
 8005dfe:	4770      	bx	lr

08005e00 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8005e00:	6803      	ldr	r3, [r0, #0]
{
 8005e02:	b510      	push	{r4, lr}
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8005e04:	691a      	ldr	r2, [r3, #16]
{
 8005e06:	4604      	mov	r4, r0
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8005e08:	0791      	lsls	r1, r2, #30
 8005e0a:	d50e      	bpl.n	8005e2a <HAL_TIM_IRQHandler+0x2a>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
 8005e0c:	68da      	ldr	r2, [r3, #12]
 8005e0e:	0792      	lsls	r2, r2, #30
 8005e10:	d50b      	bpl.n	8005e2a <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8005e12:	f06f 0202 	mvn.w	r2, #2
 8005e16:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8005e18:	2201      	movs	r2, #1

        /* Input capture event */
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8005e1a:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8005e1c:	7702      	strb	r2, [r0, #28]
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8005e1e:	079b      	lsls	r3, r3, #30
 8005e20:	d077      	beq.n	8005f12 <HAL_TIM_IRQHandler+0x112>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->IC_CaptureCallback(htim);
#else
          HAL_TIM_IC_CaptureCallback(htim);
 8005e22:	f7ff ffea 	bl	8005dfa <HAL_TIM_IC_CaptureCallback>
#else
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8005e26:	2300      	movs	r3, #0
 8005e28:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8005e2a:	6823      	ldr	r3, [r4, #0]
 8005e2c:	691a      	ldr	r2, [r3, #16]
 8005e2e:	0750      	lsls	r0, r2, #29
 8005e30:	d510      	bpl.n	8005e54 <HAL_TIM_IRQHandler+0x54>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
 8005e32:	68da      	ldr	r2, [r3, #12]
 8005e34:	0751      	lsls	r1, r2, #29
 8005e36:	d50d      	bpl.n	8005e54 <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8005e38:	f06f 0204 	mvn.w	r2, #4
 8005e3c:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8005e3e:	2202      	movs	r2, #2
      /* Input capture event */
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8005e40:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8005e42:	7722      	strb	r2, [r4, #28]
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8005e44:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 8005e48:	4620      	mov	r0, r4
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8005e4a:	d068      	beq.n	8005f1e <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 8005e4c:	f7ff ffd5 	bl	8005dfa <HAL_TIM_IC_CaptureCallback>
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8005e50:	2300      	movs	r3, #0
 8005e52:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8005e54:	6823      	ldr	r3, [r4, #0]
 8005e56:	691a      	ldr	r2, [r3, #16]
 8005e58:	0712      	lsls	r2, r2, #28
 8005e5a:	d50f      	bpl.n	8005e7c <HAL_TIM_IRQHandler+0x7c>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
 8005e5c:	68da      	ldr	r2, [r3, #12]
 8005e5e:	0710      	lsls	r0, r2, #28
 8005e60:	d50c      	bpl.n	8005e7c <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8005e62:	f06f 0208 	mvn.w	r2, #8
 8005e66:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8005e68:	2204      	movs	r2, #4
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8005e6a:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8005e6c:	7722      	strb	r2, [r4, #28]
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8005e6e:	0799      	lsls	r1, r3, #30
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 8005e70:	4620      	mov	r0, r4
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8005e72:	d05a      	beq.n	8005f2a <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8005e74:	f7ff ffc1 	bl	8005dfa <HAL_TIM_IC_CaptureCallback>
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8005e78:	2300      	movs	r3, #0
 8005e7a:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8005e7c:	6823      	ldr	r3, [r4, #0]
 8005e7e:	691a      	ldr	r2, [r3, #16]
 8005e80:	06d2      	lsls	r2, r2, #27
 8005e82:	d510      	bpl.n	8005ea6 <HAL_TIM_IRQHandler+0xa6>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
 8005e84:	68da      	ldr	r2, [r3, #12]
 8005e86:	06d0      	lsls	r0, r2, #27
 8005e88:	d50d      	bpl.n	8005ea6 <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8005e8a:	f06f 0210 	mvn.w	r2, #16
 8005e8e:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8005e90:	2208      	movs	r2, #8
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8005e92:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8005e94:	7722      	strb	r2, [r4, #28]
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8005e96:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 8005e9a:	4620      	mov	r0, r4
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8005e9c:	d04b      	beq.n	8005f36 <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 8005e9e:	f7ff ffac 	bl	8005dfa <HAL_TIM_IC_CaptureCallback>
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8005ea2:	2300      	movs	r3, #0
 8005ea4:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8005ea6:	6823      	ldr	r3, [r4, #0]
 8005ea8:	691a      	ldr	r2, [r3, #16]
 8005eaa:	07d1      	lsls	r1, r2, #31
 8005eac:	d508      	bpl.n	8005ec0 <HAL_TIM_IRQHandler+0xc0>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
 8005eae:	68da      	ldr	r2, [r3, #12]
 8005eb0:	07d2      	lsls	r2, r2, #31
 8005eb2:	d505      	bpl.n	8005ec0 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8005eb4:	f06f 0201 	mvn.w	r2, #1
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->PeriodElapsedCallback(htim);
#else
      HAL_TIM_PeriodElapsedCallback(htim);
 8005eb8:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8005eba:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 8005ebc:	f000 fc08 	bl	80066d0 <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break input event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 8005ec0:	6823      	ldr	r3, [r4, #0]
 8005ec2:	691a      	ldr	r2, [r3, #16]
 8005ec4:	0610      	lsls	r0, r2, #24
 8005ec6:	d508      	bpl.n	8005eda <HAL_TIM_IRQHandler+0xda>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
 8005ec8:	68da      	ldr	r2, [r3, #12]
 8005eca:	0611      	lsls	r1, r2, #24
 8005ecc:	d505      	bpl.n	8005eda <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8005ece:	f06f 0280 	mvn.w	r2, #128	; 0x80
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->BreakCallback(htim);
#else
      HAL_TIMEx_BreakCallback(htim);
 8005ed2:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8005ed4:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 8005ed6:	f000 f8ba 	bl	800604e <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Trigger detection event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 8005eda:	6823      	ldr	r3, [r4, #0]
 8005edc:	691a      	ldr	r2, [r3, #16]
 8005ede:	0652      	lsls	r2, r2, #25
 8005ee0:	d508      	bpl.n	8005ef4 <HAL_TIM_IRQHandler+0xf4>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
 8005ee2:	68da      	ldr	r2, [r3, #12]
 8005ee4:	0650      	lsls	r0, r2, #25
 8005ee6:	d505      	bpl.n	8005ef4 <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8005ee8:	f06f 0240 	mvn.w	r2, #64	; 0x40
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->TriggerCallback(htim);
#else
      HAL_TIM_TriggerCallback(htim);
 8005eec:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8005eee:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 8005ef0:	f7ff ff85 	bl	8005dfe <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM commutation event */
  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 8005ef4:	6823      	ldr	r3, [r4, #0]
 8005ef6:	691a      	ldr	r2, [r3, #16]
 8005ef8:	0691      	lsls	r1, r2, #26
 8005efa:	d522      	bpl.n	8005f42 <HAL_TIM_IRQHandler+0x142>
  {
    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
 8005efc:	68da      	ldr	r2, [r3, #12]
 8005efe:	0692      	lsls	r2, r2, #26
 8005f00:	d51f      	bpl.n	8005f42 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8005f02:	f06f 0220 	mvn.w	r2, #32
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->CommutationCallback(htim);
#else
      HAL_TIMEx_CommutCallback(htim);
 8005f06:	4620      	mov	r0, r4
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
}
 8005f08:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8005f0c:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutCallback(htim);
 8005f0e:	f000 b89d 	b.w	800604c <HAL_TIMEx_CommutCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8005f12:	f7ff ff71 	bl	8005df8 <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8005f16:	4620      	mov	r0, r4
 8005f18:	f7ff ff70 	bl	8005dfc <HAL_TIM_PWM_PulseFinishedCallback>
 8005f1c:	e783      	b.n	8005e26 <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8005f1e:	f7ff ff6b 	bl	8005df8 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8005f22:	4620      	mov	r0, r4
 8005f24:	f7ff ff6a 	bl	8005dfc <HAL_TIM_PWM_PulseFinishedCallback>
 8005f28:	e792      	b.n	8005e50 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8005f2a:	f7ff ff65 	bl	8005df8 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8005f2e:	4620      	mov	r0, r4
 8005f30:	f7ff ff64 	bl	8005dfc <HAL_TIM_PWM_PulseFinishedCallback>
 8005f34:	e7a0      	b.n	8005e78 <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8005f36:	f7ff ff5f 	bl	8005df8 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8005f3a:	4620      	mov	r0, r4
 8005f3c:	f7ff ff5e 	bl	8005dfc <HAL_TIM_PWM_PulseFinishedCallback>
 8005f40:	e7af      	b.n	8005ea2 <HAL_TIM_IRQHandler+0xa2>
 8005f42:	bd10      	pop	{r4, pc}

08005f44 <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8005f44:	4a24      	ldr	r2, [pc, #144]	; (8005fd8 <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 8005f46:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8005f48:	4290      	cmp	r0, r2
 8005f4a:	d012      	beq.n	8005f72 <TIM_Base_SetConfig+0x2e>
 8005f4c:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8005f50:	4290      	cmp	r0, r2
 8005f52:	d00e      	beq.n	8005f72 <TIM_Base_SetConfig+0x2e>
 8005f54:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8005f58:	d00b      	beq.n	8005f72 <TIM_Base_SetConfig+0x2e>
 8005f5a:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8005f5e:	4290      	cmp	r0, r2
 8005f60:	d007      	beq.n	8005f72 <TIM_Base_SetConfig+0x2e>
 8005f62:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8005f66:	4290      	cmp	r0, r2
 8005f68:	d003      	beq.n	8005f72 <TIM_Base_SetConfig+0x2e>
 8005f6a:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8005f6e:	4290      	cmp	r0, r2
 8005f70:	d11d      	bne.n	8005fae <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8005f72:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8005f74:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8005f78:	4313      	orrs	r3, r2
  }

  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 8005f7a:	4a17      	ldr	r2, [pc, #92]	; (8005fd8 <TIM_Base_SetConfig+0x94>)
 8005f7c:	4290      	cmp	r0, r2
 8005f7e:	d012      	beq.n	8005fa6 <TIM_Base_SetConfig+0x62>
 8005f80:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8005f84:	4290      	cmp	r0, r2
 8005f86:	d00e      	beq.n	8005fa6 <TIM_Base_SetConfig+0x62>
 8005f88:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8005f8c:	d00b      	beq.n	8005fa6 <TIM_Base_SetConfig+0x62>
 8005f8e:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8005f92:	4290      	cmp	r0, r2
 8005f94:	d007      	beq.n	8005fa6 <TIM_Base_SetConfig+0x62>
 8005f96:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8005f9a:	4290      	cmp	r0, r2
 8005f9c:	d003      	beq.n	8005fa6 <TIM_Base_SetConfig+0x62>
 8005f9e:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8005fa2:	4290      	cmp	r0, r2
 8005fa4:	d103      	bne.n	8005fae <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8005fa6:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8005fa8:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8005fac:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
 8005fae:	694a      	ldr	r2, [r1, #20]
 8005fb0:	f023 0380 	bic.w	r3, r3, #128	; 0x80
 8005fb4:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8005fb6:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8005fb8:	688b      	ldr	r3, [r1, #8]
 8005fba:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = Structure->Prescaler;
 8005fbc:	680b      	ldr	r3, [r1, #0]
 8005fbe:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8005fc0:	4b05      	ldr	r3, [pc, #20]	; (8005fd8 <TIM_Base_SetConfig+0x94>)
 8005fc2:	4298      	cmp	r0, r3
 8005fc4:	d003      	beq.n	8005fce <TIM_Base_SetConfig+0x8a>
 8005fc6:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 8005fca:	4298      	cmp	r0, r3
 8005fcc:	d101      	bne.n	8005fd2 <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 8005fce:	690b      	ldr	r3, [r1, #16]
 8005fd0:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 8005fd2:	2301      	movs	r3, #1
 8005fd4:	6143      	str	r3, [r0, #20]
 8005fd6:	4770      	bx	lr
 8005fd8:	40012c00 	.word	0x40012c00

08005fdc <HAL_TIM_Base_Init>:
{
 8005fdc:	b510      	push	{r4, lr}
  if (htim == NULL)
 8005fde:	4604      	mov	r4, r0
 8005fe0:	b1a0      	cbz	r0, 800600c <HAL_TIM_Base_Init+0x30>
  if (htim->State == HAL_TIM_STATE_RESET)
 8005fe2:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8005fe6:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8005fea:	b91b      	cbnz	r3, 8005ff4 <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 8005fec:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8005ff0:	f000 fea2 	bl	8006d38 <HAL_TIM_Base_MspInit>
  htim->State = HAL_TIM_STATE_BUSY;
 8005ff4:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8005ff6:	6820      	ldr	r0, [r4, #0]
  htim->State = HAL_TIM_STATE_BUSY;
 8005ff8:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8005ffc:	1d21      	adds	r1, r4, #4
 8005ffe:	f7ff ffa1 	bl	8005f44 <TIM_Base_SetConfig>
  htim->State = HAL_TIM_STATE_READY;
 8006002:	2301      	movs	r3, #1
  return HAL_OK;
 8006004:	2000      	movs	r0, #0
  htim->State = HAL_TIM_STATE_READY;
 8006006:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 800600a:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 800600c:	2001      	movs	r0, #1
}
 800600e:	bd10      	pop	{r4, pc}

08006010 <HAL_TIMEx_MasterConfigSynchronization>:
  assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  /* Check input state */
  __HAL_LOCK(htim);
 8006010:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 8006014:	b530      	push	{r4, r5, lr}
  __HAL_LOCK(htim);
 8006016:	2b01      	cmp	r3, #1
 8006018:	f04f 0302 	mov.w	r3, #2
 800601c:	d014      	beq.n	8006048 <HAL_TIMEx_MasterConfigSynchronization+0x38>

  /* Change the handler state */
  htim->State = HAL_TIM_STATE_BUSY;

  /* Get the TIMx CR2 register value */
  tmpcr2 = htim->Instance->CR2;
 800601e:	6804      	ldr	r4, [r0, #0]
  htim->State = HAL_TIM_STATE_BUSY;
 8006020:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d
  tmpcr2 = htim->Instance->CR2;
 8006024:	6862      	ldr	r2, [r4, #4]

  /* Get the TIMx SMCR register value */
  tmpsmcr = htim->Instance->SMCR;
 8006026:	68a3      	ldr	r3, [r4, #8]

  /* Reset the MMS Bits */
  tmpcr2 &= ~TIM_CR2_MMS;
  /* Select the TRGO source */
  tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
 8006028:	680d      	ldr	r5, [r1, #0]

  /* Reset the MSM Bit */
  tmpsmcr &= ~TIM_SMCR_MSM;
  /* Set master mode */
  tmpsmcr |= sMasterConfig->MasterSlaveMode;
 800602a:	6849      	ldr	r1, [r1, #4]
  tmpcr2 &= ~TIM_CR2_MMS;
 800602c:	f022 0270 	bic.w	r2, r2, #112	; 0x70
  tmpsmcr &= ~TIM_SMCR_MSM;
 8006030:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpsmcr |= sMasterConfig->MasterSlaveMode;
 8006034:	430b      	orrs	r3, r1
  tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
 8006036:	432a      	orrs	r2, r5

  /* Update TIMx CR2 */
  htim->Instance->CR2 = tmpcr2;
 8006038:	6062      	str	r2, [r4, #4]

  /* Update TIMx SMCR */
  htim->Instance->SMCR = tmpsmcr;
 800603a:	60a3      	str	r3, [r4, #8]

  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;
 800603c:	2301      	movs	r3, #1
 800603e:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 8006042:	2300      	movs	r3, #0
 8006044:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8006048:	4618      	mov	r0, r3

  return HAL_OK;
}
 800604a:	bd30      	pop	{r4, r5, pc}

0800604c <HAL_TIMEx_CommutCallback>:
 800604c:	4770      	bx	lr

0800604e <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800604e:	4770      	bx	lr

08006050 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8006050:	6803      	ldr	r3, [r0, #0]
 8006052:	68da      	ldr	r2, [r3, #12]
 8006054:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8006058:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800605a:	695a      	ldr	r2, [r3, #20]
 800605c:	f022 0201 	bic.w	r2, r2, #1
 8006060:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8006062:	2320      	movs	r3, #32
 8006064:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8006068:	4770      	bx	lr
	...

0800606c <UART_SetConfig>:
  * @param  huart  Pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 800606c:	b538      	push	{r3, r4, r5, lr}
 800606e:	4605      	mov	r5, r0
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*-------------------------- USART CR2 Configuration -----------------------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits
     according to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8006070:	6803      	ldr	r3, [r0, #0]
 8006072:	68c1      	ldr	r1, [r0, #12]
 8006074:	691a      	ldr	r2, [r3, #16]
 8006076:	2419      	movs	r4, #25
 8006078:	f422 5240 	bic.w	r2, r2, #12288	; 0x3000
 800607c:	430a      	orrs	r2, r1
 800607e:	611a      	str	r2, [r3, #16]
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1,
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
             tmpreg);
#else
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006080:	6882      	ldr	r2, [r0, #8]
 8006082:	6900      	ldr	r0, [r0, #16]
  MODIFY_REG(huart->Instance->CR1,
 8006084:	68d9      	ldr	r1, [r3, #12]
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006086:	4302      	orrs	r2, r0
 8006088:	6968      	ldr	r0, [r5, #20]
  MODIFY_REG(huart->Instance->CR1,
 800608a:	f421 51b0 	bic.w	r1, r1, #5632	; 0x1600
 800608e:	f021 010c 	bic.w	r1, r1, #12
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006092:	4302      	orrs	r2, r0
  MODIFY_REG(huart->Instance->CR1,
 8006094:	430a      	orrs	r2, r1
 8006096:	60da      	str	r2, [r3, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*-------------------------- USART CR3 Configuration -----------------------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 8006098:	695a      	ldr	r2, [r3, #20]
 800609a:	69a9      	ldr	r1, [r5, #24]
 800609c:	f422 7240 	bic.w	r2, r2, #768	; 0x300
 80060a0:	430a      	orrs	r2, r1
 80060a2:	615a      	str	r2, [r3, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 80060a4:	4a0d      	ldr	r2, [pc, #52]	; (80060dc <UART_SetConfig+0x70>)
 80060a6:	4293      	cmp	r3, r2
 80060a8:	d114      	bne.n	80060d4 <UART_SetConfig+0x68>
  {
    pclk = HAL_RCC_GetPCLK2Freq();
 80060aa:	f7ff fe0d 	bl	8005cc8 <HAL_RCC_GetPCLK2Freq>
    huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
  }
  else
  {
    pclk = HAL_RCC_GetPCLK1Freq();
    huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
 80060ae:	4360      	muls	r0, r4
 80060b0:	686c      	ldr	r4, [r5, #4]
 80060b2:	2264      	movs	r2, #100	; 0x64
 80060b4:	00a4      	lsls	r4, r4, #2
 80060b6:	fbb0 f0f4 	udiv	r0, r0, r4
 80060ba:	fbb0 f4f2 	udiv	r4, r0, r2
 80060be:	fb02 0314 	mls	r3, r2, r4, r0
 80060c2:	011b      	lsls	r3, r3, #4
 80060c4:	3332      	adds	r3, #50	; 0x32
 80060c6:	fbb3 f3f2 	udiv	r3, r3, r2
 80060ca:	6829      	ldr	r1, [r5, #0]
 80060cc:	eb03 1304 	add.w	r3, r3, r4, lsl #4
 80060d0:	608b      	str	r3, [r1, #8]
 80060d2:	bd38      	pop	{r3, r4, r5, pc}
    pclk = HAL_RCC_GetPCLK1Freq();
 80060d4:	f7ff fde8 	bl	8005ca8 <HAL_RCC_GetPCLK1Freq>
 80060d8:	e7e9      	b.n	80060ae <UART_SetConfig+0x42>
 80060da:	bf00      	nop
 80060dc:	40013800 	.word	0x40013800

080060e0 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 80060e0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80060e2:	4604      	mov	r4, r0
 80060e4:	460e      	mov	r6, r1
 80060e6:	4617      	mov	r7, r2
 80060e8:	461d      	mov	r5, r3
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 80060ea:	6821      	ldr	r1, [r4, #0]
 80060ec:	680b      	ldr	r3, [r1, #0]
 80060ee:	ea36 0303 	bics.w	r3, r6, r3
 80060f2:	d101      	bne.n	80060f8 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 80060f4:	2000      	movs	r0, #0
}
 80060f6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if (Timeout != HAL_MAX_DELAY)
 80060f8:	1c6b      	adds	r3, r5, #1
 80060fa:	d0f7      	beq.n	80060ec <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
 80060fc:	b995      	cbnz	r5, 8006124 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 80060fe:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 8006100:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8006102:	68da      	ldr	r2, [r3, #12]
 8006104:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 8006108:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800610a:	695a      	ldr	r2, [r3, #20]
 800610c:	f022 0201 	bic.w	r2, r2, #1
 8006110:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 8006112:	2320      	movs	r3, #32
 8006114:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8006118:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 800611c:	2300      	movs	r3, #0
 800611e:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 8006122:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
 8006124:	f7fe fd5a 	bl	8004bdc <HAL_GetTick>
 8006128:	1bc0      	subs	r0, r0, r7
 800612a:	4285      	cmp	r5, r0
 800612c:	d2dd      	bcs.n	80060ea <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 800612e:	e7e6      	b.n	80060fe <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08006130 <HAL_UART_Init>:
{
 8006130:	b510      	push	{r4, lr}
  if (huart == NULL)
 8006132:	4604      	mov	r4, r0
 8006134:	b340      	cbz	r0, 8006188 <HAL_UART_Init+0x58>
  if (huart->gState == HAL_UART_STATE_RESET)
 8006136:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 800613a:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 800613e:	b91b      	cbnz	r3, 8006148 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8006140:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8006144:	f000 fe0c 	bl	8006d60 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8006148:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 800614a:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 800614c:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8006150:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 8006152:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8006154:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8006158:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 800615a:	f7ff ff87 	bl	800606c <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800615e:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006160:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8006162:	691a      	ldr	r2, [r3, #16]
 8006164:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8006168:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800616a:	695a      	ldr	r2, [r3, #20]
 800616c:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8006170:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8006172:	68da      	ldr	r2, [r3, #12]
 8006174:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8006178:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 800617a:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800617c:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState = HAL_UART_STATE_READY;
 800617e:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState = HAL_UART_STATE_READY;
 8006182:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 8006186:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8006188:	2001      	movs	r0, #1
}
 800618a:	bd10      	pop	{r4, pc}

0800618c <HAL_UART_Transmit>:
{
 800618c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8006190:	461f      	mov	r7, r3
  if (huart->gState == HAL_UART_STATE_READY)
 8006192:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 8006196:	4604      	mov	r4, r0
  if (huart->gState == HAL_UART_STATE_READY)
 8006198:	2b20      	cmp	r3, #32
{
 800619a:	460d      	mov	r5, r1
 800619c:	4690      	mov	r8, r2
  if (huart->gState == HAL_UART_STATE_READY)
 800619e:	d14e      	bne.n	800623e <HAL_UART_Transmit+0xb2>
    if ((pData == NULL) || (Size == 0U))
 80061a0:	2900      	cmp	r1, #0
 80061a2:	d049      	beq.n	8006238 <HAL_UART_Transmit+0xac>
 80061a4:	2a00      	cmp	r2, #0
 80061a6:	d047      	beq.n	8006238 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 80061a8:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 80061ac:	2b01      	cmp	r3, #1
 80061ae:	d046      	beq.n	800623e <HAL_UART_Transmit+0xb2>
 80061b0:	2301      	movs	r3, #1
 80061b2:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80061b6:	2300      	movs	r3, #0
 80061b8:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 80061ba:	2321      	movs	r3, #33	; 0x21
 80061bc:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 80061c0:	f7fe fd0c 	bl	8004bdc <HAL_GetTick>
 80061c4:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 80061c6:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 80061ca:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while (huart->TxXferCount > 0U)
 80061ce:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 80061d0:	b29b      	uxth	r3, r3
 80061d2:	b96b      	cbnz	r3, 80061f0 <HAL_UART_Transmit+0x64>
    if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 80061d4:	463b      	mov	r3, r7
 80061d6:	4632      	mov	r2, r6
 80061d8:	2140      	movs	r1, #64	; 0x40
 80061da:	4620      	mov	r0, r4
 80061dc:	f7ff ff80 	bl	80060e0 <UART_WaitOnFlagUntilTimeout.constprop.3>
 80061e0:	b9a8      	cbnz	r0, 800620e <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 80061e2:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 80061e4:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 80061e8:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 80061ec:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 80061f0:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80061f2:	4632      	mov	r2, r6
      huart->TxXferCount--;
 80061f4:	3b01      	subs	r3, #1
 80061f6:	b29b      	uxth	r3, r3
 80061f8:	84e3      	strh	r3, [r4, #38]	; 0x26
      if (huart->Init.WordLength == UART_WORDLENGTH_9B)
 80061fa:	68a3      	ldr	r3, [r4, #8]
        if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80061fc:	2180      	movs	r1, #128	; 0x80
      if (huart->Init.WordLength == UART_WORDLENGTH_9B)
 80061fe:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006202:	4620      	mov	r0, r4
 8006204:	463b      	mov	r3, r7
      if (huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006206:	d10e      	bne.n	8006226 <HAL_UART_Transmit+0x9a>
        if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006208:	f7ff ff6a 	bl	80060e0 <UART_WaitOnFlagUntilTimeout.constprop.3>
 800620c:	b110      	cbz	r0, 8006214 <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 800620e:	2003      	movs	r0, #3
 8006210:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8006214:	882b      	ldrh	r3, [r5, #0]
 8006216:	6822      	ldr	r2, [r4, #0]
 8006218:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800621c:	6053      	str	r3, [r2, #4]
        if (huart->Init.Parity == UART_PARITY_NONE)
 800621e:	6923      	ldr	r3, [r4, #16]
 8006220:	b943      	cbnz	r3, 8006234 <HAL_UART_Transmit+0xa8>
          pData += 2U;
 8006222:	3502      	adds	r5, #2
 8006224:	e7d3      	b.n	80061ce <HAL_UART_Transmit+0x42>
        if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006226:	f7ff ff5b 	bl	80060e0 <UART_WaitOnFlagUntilTimeout.constprop.3>
 800622a:	2800      	cmp	r0, #0
 800622c:	d1ef      	bne.n	800620e <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 800622e:	6823      	ldr	r3, [r4, #0]
 8006230:	782a      	ldrb	r2, [r5, #0]
 8006232:	605a      	str	r2, [r3, #4]
 8006234:	3501      	adds	r5, #1
 8006236:	e7ca      	b.n	80061ce <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 8006238:	2001      	movs	r0, #1
 800623a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 800623e:	2002      	movs	r0, #2
}
 8006240:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

08006244 <HAL_UART_Transmit_DMA>:
{
 8006244:	b538      	push	{r3, r4, r5, lr}
 8006246:	4604      	mov	r4, r0
 8006248:	4613      	mov	r3, r2
  if (huart->gState == HAL_UART_STATE_READY)
 800624a:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 800624e:	2a20      	cmp	r2, #32
 8006250:	d12a      	bne.n	80062a8 <HAL_UART_Transmit_DMA+0x64>
    if ((pData == NULL) || (Size == 0U))
 8006252:	b339      	cbz	r1, 80062a4 <HAL_UART_Transmit_DMA+0x60>
 8006254:	b333      	cbz	r3, 80062a4 <HAL_UART_Transmit_DMA+0x60>
    __HAL_LOCK(huart);
 8006256:	f894 2038 	ldrb.w	r2, [r4, #56]	; 0x38
 800625a:	2a01      	cmp	r2, #1
 800625c:	d024      	beq.n	80062a8 <HAL_UART_Transmit_DMA+0x64>
 800625e:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006260:	2500      	movs	r5, #0
    __HAL_LOCK(huart);
 8006262:	f884 2038 	strb.w	r2, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8006266:	2221      	movs	r2, #33	; 0x21
    huart->TxXferCount = Size;
 8006268:	84e3      	strh	r3, [r4, #38]	; 0x26
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 800626a:	6b20      	ldr	r0, [r4, #48]	; 0x30
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800626c:	63e5      	str	r5, [r4, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800626e:	f884 2039 	strb.w	r2, [r4, #57]	; 0x39
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006272:	4a0e      	ldr	r2, [pc, #56]	; (80062ac <HAL_UART_Transmit_DMA+0x68>)
    huart->TxXferSize = Size;
 8006274:	84a3      	strh	r3, [r4, #36]	; 0x24
    huart->pTxBuffPtr = pData;
 8006276:	6221      	str	r1, [r4, #32]
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006278:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
 800627a:	4a0d      	ldr	r2, [pc, #52]	; (80062b0 <HAL_UART_Transmit_DMA+0x6c>)
    huart->hdmatx->XferAbortCallback = NULL;
 800627c:	6345      	str	r5, [r0, #52]	; 0x34
    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
 800627e:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmatx->XferErrorCallback = UART_DMAError;
 8006280:	4a0c      	ldr	r2, [pc, #48]	; (80062b4 <HAL_UART_Transmit_DMA+0x70>)
 8006282:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size);
 8006284:	6822      	ldr	r2, [r4, #0]
 8006286:	3204      	adds	r2, #4
 8006288:	f7ff f816 	bl	80052b8 <HAL_DMA_Start_IT>
    __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
 800628c:	f06f 0240 	mvn.w	r2, #64	; 0x40
 8006290:	6823      	ldr	r3, [r4, #0]
    return HAL_OK;
 8006292:	4628      	mov	r0, r5
    __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
 8006294:	601a      	str	r2, [r3, #0]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 8006296:	695a      	ldr	r2, [r3, #20]
    __HAL_UNLOCK(huart);
 8006298:	f884 5038 	strb.w	r5, [r4, #56]	; 0x38
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 800629c:	f042 0280 	orr.w	r2, r2, #128	; 0x80
 80062a0:	615a      	str	r2, [r3, #20]
    return HAL_OK;
 80062a2:	bd38      	pop	{r3, r4, r5, pc}
      return HAL_ERROR;
 80062a4:	2001      	movs	r0, #1
 80062a6:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_BUSY;
 80062a8:	2002      	movs	r0, #2
}
 80062aa:	bd38      	pop	{r3, r4, r5, pc}
 80062ac:	0800634b 	.word	0x0800634b
 80062b0:	08006379 	.word	0x08006379
 80062b4:	08006445 	.word	0x08006445

080062b8 <HAL_UART_Receive_DMA>:
{
 80062b8:	4613      	mov	r3, r2
  if (huart->RxState == HAL_UART_STATE_READY)
 80062ba:	f890 203a 	ldrb.w	r2, [r0, #58]	; 0x3a
{
 80062be:	b573      	push	{r0, r1, r4, r5, r6, lr}
  if (huart->RxState == HAL_UART_STATE_READY)
 80062c0:	2a20      	cmp	r2, #32
{
 80062c2:	4605      	mov	r5, r0
  if (huart->RxState == HAL_UART_STATE_READY)
 80062c4:	d138      	bne.n	8006338 <HAL_UART_Receive_DMA+0x80>
    if ((pData == NULL) || (Size == 0U))
 80062c6:	2900      	cmp	r1, #0
 80062c8:	d034      	beq.n	8006334 <HAL_UART_Receive_DMA+0x7c>
 80062ca:	2b00      	cmp	r3, #0
 80062cc:	d032      	beq.n	8006334 <HAL_UART_Receive_DMA+0x7c>
    __HAL_LOCK(huart);
 80062ce:	f890 2038 	ldrb.w	r2, [r0, #56]	; 0x38
 80062d2:	2a01      	cmp	r2, #1
 80062d4:	d030      	beq.n	8006338 <HAL_UART_Receive_DMA+0x80>
 80062d6:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80062d8:	2400      	movs	r4, #0
    __HAL_LOCK(huart);
 80062da:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 80062de:	2222      	movs	r2, #34	; 0x22
    huart->pRxBuffPtr = pData;
 80062e0:	6281      	str	r1, [r0, #40]	; 0x28
    huart->RxXferSize = Size;
 80062e2:	8583      	strh	r3, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80062e4:	63c4      	str	r4, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 80062e6:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 80062ea:	6b40      	ldr	r0, [r0, #52]	; 0x34
 80062ec:	4a13      	ldr	r2, [pc, #76]	; (800633c <HAL_UART_Receive_DMA+0x84>)
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size);
 80062ee:	682e      	ldr	r6, [r5, #0]
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 80062f0:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 80062f2:	4a13      	ldr	r2, [pc, #76]	; (8006340 <HAL_UART_Receive_DMA+0x88>)
    huart->hdmarx->XferAbortCallback = NULL;
 80062f4:	6344      	str	r4, [r0, #52]	; 0x34
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 80062f6:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmarx->XferErrorCallback = UART_DMAError;
 80062f8:	4a12      	ldr	r2, [pc, #72]	; (8006344 <HAL_UART_Receive_DMA+0x8c>)
 80062fa:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size);
 80062fc:	460a      	mov	r2, r1
 80062fe:	1d31      	adds	r1, r6, #4
 8006300:	f7fe ffda 	bl	80052b8 <HAL_DMA_Start_IT>
    return HAL_OK;
 8006304:	4620      	mov	r0, r4
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006306:	682b      	ldr	r3, [r5, #0]
 8006308:	9401      	str	r4, [sp, #4]
 800630a:	681a      	ldr	r2, [r3, #0]
 800630c:	9201      	str	r2, [sp, #4]
 800630e:	685a      	ldr	r2, [r3, #4]
    __HAL_UNLOCK(huart);
 8006310:	f885 4038 	strb.w	r4, [r5, #56]	; 0x38
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006314:	9201      	str	r2, [sp, #4]
 8006316:	9a01      	ldr	r2, [sp, #4]
    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8006318:	68da      	ldr	r2, [r3, #12]
 800631a:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 800631e:	60da      	str	r2, [r3, #12]
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006320:	695a      	ldr	r2, [r3, #20]
 8006322:	f042 0201 	orr.w	r2, r2, #1
 8006326:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006328:	695a      	ldr	r2, [r3, #20]
 800632a:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 800632e:	615a      	str	r2, [r3, #20]
}
 8006330:	b002      	add	sp, #8
 8006332:	bd70      	pop	{r4, r5, r6, pc}
      return HAL_ERROR;
 8006334:	2001      	movs	r0, #1
 8006336:	e7fb      	b.n	8006330 <HAL_UART_Receive_DMA+0x78>
    return HAL_BUSY;
 8006338:	2002      	movs	r0, #2
 800633a:	e7f9      	b.n	8006330 <HAL_UART_Receive_DMA+0x78>
 800633c:	08006383 	.word	0x08006383
 8006340:	08006439 	.word	0x08006439
 8006344:	08006445 	.word	0x08006445

08006348 <HAL_UART_TxCpltCallback>:
 8006348:	4770      	bx	lr

0800634a <UART_DMATransmitCplt>:
{
 800634a:	b508      	push	{r3, lr}
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 800634c:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
 800634e:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006350:	681b      	ldr	r3, [r3, #0]
 8006352:	f013 0320 	ands.w	r3, r3, #32
 8006356:	d10a      	bne.n	800636e <UART_DMATransmitCplt+0x24>
    huart->TxXferCount = 0x00U;
 8006358:	84d3      	strh	r3, [r2, #38]	; 0x26
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 800635a:	6813      	ldr	r3, [r2, #0]
 800635c:	695a      	ldr	r2, [r3, #20]
 800635e:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8006362:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 8006364:	68da      	ldr	r2, [r3, #12]
 8006366:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 800636a:	60da      	str	r2, [r3, #12]
 800636c:	bd08      	pop	{r3, pc}
    HAL_UART_TxCpltCallback(huart);
 800636e:	4610      	mov	r0, r2
 8006370:	f7ff ffea 	bl	8006348 <HAL_UART_TxCpltCallback>
 8006374:	bd08      	pop	{r3, pc}

08006376 <HAL_UART_TxHalfCpltCallback>:
 8006376:	4770      	bx	lr

08006378 <UART_DMATxHalfCplt>:
{
 8006378:	b508      	push	{r3, lr}
  HAL_UART_TxHalfCpltCallback(huart);
 800637a:	6a40      	ldr	r0, [r0, #36]	; 0x24
 800637c:	f7ff fffb 	bl	8006376 <HAL_UART_TxHalfCpltCallback>
 8006380:	bd08      	pop	{r3, pc}

08006382 <UART_DMAReceiveCplt>:
{
 8006382:	b508      	push	{r3, lr}
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006384:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
 8006386:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006388:	681b      	ldr	r3, [r3, #0]
 800638a:	f013 0320 	ands.w	r3, r3, #32
 800638e:	d110      	bne.n	80063b2 <UART_DMAReceiveCplt+0x30>
    huart->RxXferCount = 0U;
 8006390:	85d3      	strh	r3, [r2, #46]	; 0x2e
    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8006392:	6813      	ldr	r3, [r2, #0]
 8006394:	68d9      	ldr	r1, [r3, #12]
 8006396:	f421 7180 	bic.w	r1, r1, #256	; 0x100
 800639a:	60d9      	str	r1, [r3, #12]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800639c:	6959      	ldr	r1, [r3, #20]
 800639e:	f021 0101 	bic.w	r1, r1, #1
 80063a2:	6159      	str	r1, [r3, #20]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80063a4:	6959      	ldr	r1, [r3, #20]
 80063a6:	f021 0140 	bic.w	r1, r1, #64	; 0x40
 80063aa:	6159      	str	r1, [r3, #20]
    huart->RxState = HAL_UART_STATE_READY;
 80063ac:	2320      	movs	r3, #32
 80063ae:	f882 303a 	strb.w	r3, [r2, #58]	; 0x3a
  HAL_UART_RxCpltCallback(huart);
 80063b2:	4610      	mov	r0, r2
 80063b4:	f000 fe9e 	bl	80070f4 <HAL_UART_RxCpltCallback>
 80063b8:	bd08      	pop	{r3, pc}

080063ba <UART_Receive_IT>:
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 80063ba:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 80063be:	b510      	push	{r4, lr}
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 80063c0:	2b22      	cmp	r3, #34	; 0x22
 80063c2:	d136      	bne.n	8006432 <UART_Receive_IT+0x78>
    if (huart->Init.WordLength == UART_WORDLENGTH_9B)
 80063c4:	6883      	ldr	r3, [r0, #8]
 80063c6:	6901      	ldr	r1, [r0, #16]
 80063c8:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 80063cc:	6802      	ldr	r2, [r0, #0]
 80063ce:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80063d0:	d123      	bne.n	800641a <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80063d2:	6852      	ldr	r2, [r2, #4]
      if (huart->Init.Parity == UART_PARITY_NONE)
 80063d4:	b9e9      	cbnz	r1, 8006412 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80063d6:	f3c2 0208 	ubfx	r2, r2, #0, #9
 80063da:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 80063de:	6283      	str	r3, [r0, #40]	; 0x28
    if (--huart->RxXferCount == 0U)
 80063e0:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 80063e2:	3c01      	subs	r4, #1
 80063e4:	b2a4      	uxth	r4, r4
 80063e6:	85c4      	strh	r4, [r0, #46]	; 0x2e
 80063e8:	b98c      	cbnz	r4, 800640e <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 80063ea:	6803      	ldr	r3, [r0, #0]
 80063ec:	68da      	ldr	r2, [r3, #12]
 80063ee:	f022 0220 	bic.w	r2, r2, #32
 80063f2:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 80063f4:	68da      	ldr	r2, [r3, #12]
 80063f6:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 80063fa:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 80063fc:	695a      	ldr	r2, [r3, #20]
 80063fe:	f022 0201 	bic.w	r2, r2, #1
 8006402:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 8006404:	2320      	movs	r3, #32
 8006406:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 800640a:	f000 fe73 	bl	80070f4 <HAL_UART_RxCpltCallback>
    if (--huart->RxXferCount == 0U)
 800640e:	2000      	movs	r0, #0
}
 8006410:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8006412:	b2d2      	uxtb	r2, r2
 8006414:	f823 2b01 	strh.w	r2, [r3], #1
 8006418:	e7e1      	b.n	80063de <UART_Receive_IT+0x24>
      if (huart->Init.Parity == UART_PARITY_NONE)
 800641a:	b921      	cbnz	r1, 8006426 <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 800641c:	1c59      	adds	r1, r3, #1
 800641e:	6852      	ldr	r2, [r2, #4]
 8006420:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8006422:	701a      	strb	r2, [r3, #0]
 8006424:	e7dc      	b.n	80063e0 <UART_Receive_IT+0x26>
 8006426:	6852      	ldr	r2, [r2, #4]
 8006428:	1c59      	adds	r1, r3, #1
 800642a:	6281      	str	r1, [r0, #40]	; 0x28
 800642c:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8006430:	e7f7      	b.n	8006422 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8006432:	2002      	movs	r0, #2
 8006434:	bd10      	pop	{r4, pc}

08006436 <HAL_UART_RxHalfCpltCallback>:
 8006436:	4770      	bx	lr

08006438 <UART_DMARxHalfCplt>:
{
 8006438:	b508      	push	{r3, lr}
  HAL_UART_RxHalfCpltCallback(huart);
 800643a:	6a40      	ldr	r0, [r0, #36]	; 0x24
 800643c:	f7ff fffb 	bl	8006436 <HAL_UART_RxHalfCpltCallback>
 8006440:	bd08      	pop	{r3, pc}

08006442 <HAL_UART_ErrorCallback>:
 8006442:	4770      	bx	lr

08006444 <UART_DMAError>:
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
 8006444:	6a41      	ldr	r1, [r0, #36]	; 0x24
{
 8006446:	b508      	push	{r3, lr}
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
 8006448:	680b      	ldr	r3, [r1, #0]
 800644a:	695a      	ldr	r2, [r3, #20]
  if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
 800644c:	f891 0039 	ldrb.w	r0, [r1, #57]	; 0x39
 8006450:	2821      	cmp	r0, #33	; 0x21
 8006452:	d10a      	bne.n	800646a <UART_DMAError+0x26>
 8006454:	0612      	lsls	r2, r2, #24
 8006456:	d508      	bpl.n	800646a <UART_DMAError+0x26>
    huart->TxXferCount = 0x00U;
 8006458:	2200      	movs	r2, #0
 800645a:	84ca      	strh	r2, [r1, #38]	; 0x26
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
 800645c:	68da      	ldr	r2, [r3, #12]
 800645e:	f022 02c0 	bic.w	r2, r2, #192	; 0xc0
 8006462:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8006464:	2220      	movs	r2, #32
 8006466:	f881 2039 	strb.w	r2, [r1, #57]	; 0x39
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 800646a:	695b      	ldr	r3, [r3, #20]
  if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
 800646c:	f891 203a 	ldrb.w	r2, [r1, #58]	; 0x3a
 8006470:	2a22      	cmp	r2, #34	; 0x22
 8006472:	d106      	bne.n	8006482 <UART_DMAError+0x3e>
 8006474:	065b      	lsls	r3, r3, #25
 8006476:	d504      	bpl.n	8006482 <UART_DMAError+0x3e>
    huart->RxXferCount = 0x00U;
 8006478:	2300      	movs	r3, #0
    UART_EndRxTransfer(huart);
 800647a:	4608      	mov	r0, r1
    huart->RxXferCount = 0x00U;
 800647c:	85cb      	strh	r3, [r1, #46]	; 0x2e
    UART_EndRxTransfer(huart);
 800647e:	f7ff fde7 	bl	8006050 <UART_EndRxTransfer>
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8006482:	6bcb      	ldr	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8006484:	4608      	mov	r0, r1
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8006486:	f043 0310 	orr.w	r3, r3, #16
 800648a:	63cb      	str	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 800648c:	f7ff ffd9 	bl	8006442 <HAL_UART_ErrorCallback>
 8006490:	bd08      	pop	{r3, pc}
	...

08006494 <HAL_UART_IRQHandler>:
  uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8006494:	6803      	ldr	r3, [r0, #0]
{
 8006496:	b570      	push	{r4, r5, r6, lr}
  uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8006498:	681a      	ldr	r2, [r3, #0]
{
 800649a:	4604      	mov	r4, r0
  if (errorflags == RESET)
 800649c:	0716      	lsls	r6, r2, #28
  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 800649e:	68d9      	ldr	r1, [r3, #12]
  uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 80064a0:	695d      	ldr	r5, [r3, #20]
  if (errorflags == RESET)
 80064a2:	d107      	bne.n	80064b4 <HAL_UART_IRQHandler+0x20>
    if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 80064a4:	0696      	lsls	r6, r2, #26
 80064a6:	d55a      	bpl.n	800655e <HAL_UART_IRQHandler+0xca>
 80064a8:	068d      	lsls	r5, r1, #26
 80064aa:	d558      	bpl.n	800655e <HAL_UART_IRQHandler+0xca>
}
 80064ac:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 80064b0:	f7ff bf83 	b.w	80063ba <UART_Receive_IT>
  if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 80064b4:	f015 0501 	ands.w	r5, r5, #1
 80064b8:	d102      	bne.n	80064c0 <HAL_UART_IRQHandler+0x2c>
 80064ba:	f411 7f90 	tst.w	r1, #288	; 0x120
 80064be:	d04e      	beq.n	800655e <HAL_UART_IRQHandler+0xca>
    if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 80064c0:	07d3      	lsls	r3, r2, #31
 80064c2:	d505      	bpl.n	80064d0 <HAL_UART_IRQHandler+0x3c>
 80064c4:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 80064c6:	bf42      	ittt	mi
 80064c8:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 80064ca:	f043 0301 	orrmi.w	r3, r3, #1
 80064ce:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80064d0:	0750      	lsls	r0, r2, #29
 80064d2:	d504      	bpl.n	80064de <HAL_UART_IRQHandler+0x4a>
 80064d4:	b11d      	cbz	r5, 80064de <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 80064d6:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80064d8:	f043 0302 	orr.w	r3, r3, #2
 80064dc:	63e3      	str	r3, [r4, #60]	; 0x3c
    if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80064de:	0793      	lsls	r3, r2, #30
 80064e0:	d504      	bpl.n	80064ec <HAL_UART_IRQHandler+0x58>
 80064e2:	b11d      	cbz	r5, 80064ec <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 80064e4:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80064e6:	f043 0304 	orr.w	r3, r3, #4
 80064ea:	63e3      	str	r3, [r4, #60]	; 0x3c
    if (((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80064ec:	0716      	lsls	r6, r2, #28
 80064ee:	d504      	bpl.n	80064fa <HAL_UART_IRQHandler+0x66>
 80064f0:	b11d      	cbz	r5, 80064fa <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 80064f2:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80064f4:	f043 0308 	orr.w	r3, r3, #8
 80064f8:	63e3      	str	r3, [r4, #60]	; 0x3c
    if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 80064fa:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80064fc:	2b00      	cmp	r3, #0
 80064fe:	d066      	beq.n	80065ce <HAL_UART_IRQHandler+0x13a>
      if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8006500:	0695      	lsls	r5, r2, #26
 8006502:	d504      	bpl.n	800650e <HAL_UART_IRQHandler+0x7a>
 8006504:	0688      	lsls	r0, r1, #26
 8006506:	d502      	bpl.n	800650e <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 8006508:	4620      	mov	r0, r4
 800650a:	f7ff ff56 	bl	80063ba <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 800650e:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 8006510:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8006512:	695d      	ldr	r5, [r3, #20]
      if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 8006514:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 8006516:	0711      	lsls	r1, r2, #28
 8006518:	d402      	bmi.n	8006520 <HAL_UART_IRQHandler+0x8c>
 800651a:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 800651e:	d01a      	beq.n	8006556 <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8006520:	f7ff fd96 	bl	8006050 <UART_EndRxTransfer>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 8006524:	6823      	ldr	r3, [r4, #0]
 8006526:	695a      	ldr	r2, [r3, #20]
 8006528:	0652      	lsls	r2, r2, #25
 800652a:	d510      	bpl.n	800654e <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800652c:	695a      	ldr	r2, [r3, #20]
          if (huart->hdmarx != NULL)
 800652e:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006530:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8006534:	615a      	str	r2, [r3, #20]
          if (huart->hdmarx != NULL)
 8006536:	b150      	cbz	r0, 800654e <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 8006538:	4b25      	ldr	r3, [pc, #148]	; (80065d0 <HAL_UART_IRQHandler+0x13c>)
 800653a:	6343      	str	r3, [r0, #52]	; 0x34
            if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 800653c:	f7fe fefa 	bl	8005334 <HAL_DMA_Abort_IT>
 8006540:	2800      	cmp	r0, #0
 8006542:	d044      	beq.n	80065ce <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8006544:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 8006546:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800654a:	6b43      	ldr	r3, [r0, #52]	; 0x34
 800654c:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 800654e:	4620      	mov	r0, r4
 8006550:	f7ff ff77 	bl	8006442 <HAL_UART_ErrorCallback>
 8006554:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 8006556:	f7ff ff74 	bl	8006442 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 800655a:	63e5      	str	r5, [r4, #60]	; 0x3c
 800655c:	bd70      	pop	{r4, r5, r6, pc}
  if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 800655e:	0616      	lsls	r6, r2, #24
 8006560:	d527      	bpl.n	80065b2 <HAL_UART_IRQHandler+0x11e>
 8006562:	060d      	lsls	r5, r1, #24
 8006564:	d525      	bpl.n	80065b2 <HAL_UART_IRQHandler+0x11e>
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 8006566:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 800656a:	2a21      	cmp	r2, #33	; 0x21
 800656c:	d12f      	bne.n	80065ce <HAL_UART_IRQHandler+0x13a>
    if (huart->Init.WordLength == UART_WORDLENGTH_9B)
 800656e:	68a2      	ldr	r2, [r4, #8]
 8006570:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8006574:	6a22      	ldr	r2, [r4, #32]
 8006576:	d117      	bne.n	80065a8 <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 8006578:	8811      	ldrh	r1, [r2, #0]
 800657a:	f3c1 0108 	ubfx	r1, r1, #0, #9
 800657e:	6059      	str	r1, [r3, #4]
      if (huart->Init.Parity == UART_PARITY_NONE)
 8006580:	6921      	ldr	r1, [r4, #16]
 8006582:	b979      	cbnz	r1, 80065a4 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8006584:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 8006586:	6222      	str	r2, [r4, #32]
    if (--huart->TxXferCount == 0U)
 8006588:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 800658a:	3a01      	subs	r2, #1
 800658c:	b292      	uxth	r2, r2
 800658e:	84e2      	strh	r2, [r4, #38]	; 0x26
 8006590:	b9ea      	cbnz	r2, 80065ce <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 8006592:	68da      	ldr	r2, [r3, #12]
 8006594:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8006598:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 800659a:	68da      	ldr	r2, [r3, #12]
 800659c:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 80065a0:	60da      	str	r2, [r3, #12]
 80065a2:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 80065a4:	3201      	adds	r2, #1
 80065a6:	e7ee      	b.n	8006586 <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 80065a8:	1c51      	adds	r1, r2, #1
 80065aa:	6221      	str	r1, [r4, #32]
 80065ac:	7812      	ldrb	r2, [r2, #0]
 80065ae:	605a      	str	r2, [r3, #4]
 80065b0:	e7ea      	b.n	8006588 <HAL_UART_IRQHandler+0xf4>
  if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 80065b2:	0650      	lsls	r0, r2, #25
 80065b4:	d50b      	bpl.n	80065ce <HAL_UART_IRQHandler+0x13a>
 80065b6:	064a      	lsls	r2, r1, #25
 80065b8:	d509      	bpl.n	80065ce <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 80065ba:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 80065bc:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 80065be:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 80065c2:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 80065c4:	2320      	movs	r3, #32
 80065c6:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 80065ca:	f7ff febd 	bl	8006348 <HAL_UART_TxCpltCallback>
 80065ce:	bd70      	pop	{r4, r5, r6, pc}
 80065d0:	080065d5 	.word	0x080065d5

080065d4 <UART_DMAAbortOnError>:
{
 80065d4:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 80065d6:	2300      	movs	r3, #0
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
 80065d8:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 80065da:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 80065dc:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 80065de:	f7ff ff30 	bl	8006442 <HAL_UART_ErrorCallback>
 80065e2:	bd08      	pop	{r3, pc}

080065e4 <CRC16_Generate>:
{
	uint8_t dt = 0U;
	uint16_t crc16 = 0U;

	len *= 8;
	for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++)
 80065e4:	2300      	movs	r3, #0
{
 80065e6:	b510      	push	{r4, lr}
	{
		crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8));
 80065e8:	4c0f      	ldr	r4, [pc, #60]	; (8006628 <CRC16_Generate+0x44>)
	len *= 8;
 80065ea:	00c9      	lsls	r1, r1, #3
	for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++)
 80065ec:	2907      	cmp	r1, #7
 80065ee:	dc0f      	bgt.n	8006610 <CRC16_Generate+0x2c>
	}

	if(len != 0)
 80065f0:	b161      	cbz	r1, 800660c <CRC16_Generate+0x28>
			len--;

			if(((crc16^dt) & ((uint16_t)1 << 15)) != 0)
			{
				crc16 =  (uint16_t)(crc16 << 1);
				crc16 = (uint16_t)(crc16 ^ 0x1021);
 80065f2:	f241 0221 	movw	r2, #4129	; 0x1021
			if(((crc16^dt) & ((uint16_t)1 << 15)) != 0)
 80065f6:	f413 4f00 	tst.w	r3, #32768	; 0x8000
 80065fa:	ea4f 0343 	mov.w	r3, r3, lsl #1
				crc16 =  (uint16_t)(crc16 << 1);
 80065fe:	b29b      	uxth	r3, r3
			len--;
 8006600:	f101 31ff 	add.w	r1, r1, #4294967295
				crc16 = (uint16_t)(crc16 ^ 0x1021);
 8006604:	bf18      	it	ne
 8006606:	4053      	eorne	r3, r2
		while(len != 0)
 8006608:	2900      	cmp	r1, #0
 800660a:	d1f4      	bne.n	80065f6 <CRC16_Generate+0x12>
			}
			dt = (uint8_t)(dt << 1);
		}
	}
	return(crc16);
}
 800660c:	4618      	mov	r0, r3
 800660e:	bd10      	pop	{r4, pc}
		crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8));
 8006610:	f810 2b01 	ldrb.w	r2, [r0], #1
	for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++)
 8006614:	3908      	subs	r1, #8
		crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8));
 8006616:	ea82 2213 	eor.w	r2, r2, r3, lsr #8
 800661a:	f834 2012 	ldrh.w	r2, [r4, r2, lsl #1]
 800661e:	ea82 2303 	eor.w	r3, r2, r3, lsl #8
 8006622:	b29b      	uxth	r3, r3
 8006624:	e7e2      	b.n	80065ec <CRC16_Generate+0x8>
 8006626:	bf00      	nop
 8006628:	20000008 	.word	0x20000008

0800662c <ESP8266_Initialize>:


void ESP8266_Initialize(void){
	  volatile static bool init = false;
	  volatile static uint8_t seq = 0;
	  if(init == false ||  seq < 4){
 800662c:	4b1e      	ldr	r3, [pc, #120]	; (80066a8 <ESP8266_Initialize+0x7c>)
void ESP8266_Initialize(void){
 800662e:	b510      	push	{r4, lr}
	  if(init == false ||  seq < 4){
 8006630:	781a      	ldrb	r2, [r3, #0]
 8006632:	4c1e      	ldr	r4, [pc, #120]	; (80066ac <ESP8266_Initialize+0x80>)
 8006634:	b112      	cbz	r2, 800663c <ESP8266_Initialize+0x10>
 8006636:	7822      	ldrb	r2, [r4, #0]
 8006638:	2a03      	cmp	r2, #3
 800663a:	d808      	bhi.n	800664e <ESP8266_Initialize+0x22>
		  init = true;
 800663c:	2201      	movs	r2, #1
 800663e:	701a      	strb	r2, [r3, #0]
//          Uart2_Data_Send("AT+CIPSEND=1,1\r\n",ESP8266_Strindex("AT+CIPSEND=1,1\r\n"));
//          HAL_Delay(5); 
//          Uart2_Data_Send("1\r\n",ESP8266_Strindex("1\r\n"));              
        return;
	  }
	  switch(seq){
 8006640:	7823      	ldrb	r3, [r4, #0]
 8006642:	2b03      	cmp	r3, #3
 8006644:	d819      	bhi.n	800667a <ESP8266_Initialize+0x4e>
 8006646:	e8df f003 	tbb	[pc, r3]
 800664a:	1910      	.short	0x1910
 800664c:	1f1c      	.short	0x1f1c
          Uart2_Data_Send("AT+CIPSEND=0,9\r\n",ESP8266_Strindex("AT+CIPSEND=0,9\r\n"));
 800664e:	2110      	movs	r1, #16
 8006650:	4817      	ldr	r0, [pc, #92]	; (80066b0 <ESP8266_Initialize+0x84>)
 8006652:	f000 fd7f 	bl	8007154 <Uart2_Data_Send>
          HAL_Delay(1000);
 8006656:	f44f 707a 	mov.w	r0, #1000	; 0x3e8
 800665a:	f7fe fac5 	bl	8004be8 <HAL_Delay>
		  break;
	  default:
		  break;
	  }

}
 800665e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
          Uart2_Data_Send("123456789\r\n",ESP8266_Strindex("123456789\r\n"));
 8006662:	210b      	movs	r1, #11
 8006664:	4813      	ldr	r0, [pc, #76]	; (80066b4 <ESP8266_Initialize+0x88>)
 8006666:	f000 bd75 	b.w	8007154 <Uart2_Data_Send>
          Uart2_Data_Send("AT+CWMODE=3\r\n",ESP8266_Strindex("AT+CWMODE=3\r\n"));
 800666a:	210d      	movs	r1, #13
 800666c:	4812      	ldr	r0, [pc, #72]	; (80066b8 <ESP8266_Initialize+0x8c>)
          Uart2_Data_Send("AT+CWSAP=\"BLUE_TEST\",\"\",5,0\r\n",ESP8266_Strindex("AT+CWSAP=\"BLUE_TEST\",\"\",5,0\r\n"));
 800666e:	f000 fd71 	bl	8007154 <Uart2_Data_Send>
		  seq++;
 8006672:	7823      	ldrb	r3, [r4, #0]
 8006674:	3301      	adds	r3, #1
 8006676:	b2db      	uxtb	r3, r3
 8006678:	7023      	strb	r3, [r4, #0]
 800667a:	bd10      	pop	{r4, pc}
          Uart2_Data_Send("AT+CIPMUX=1\r\n",ESP8266_Strindex("AT+CIPMUX=1\r\n"));
 800667c:	210d      	movs	r1, #13
 800667e:	480f      	ldr	r0, [pc, #60]	; (80066bc <ESP8266_Initialize+0x90>)
 8006680:	e7f5      	b.n	800666e <ESP8266_Initialize+0x42>
          Uart2_Data_Send("AT+CWSAP=\"BLUE_TEST\",\"\",5,0\r\n",ESP8266_Strindex("AT+CWSAP=\"BLUE_TEST\",\"\",5,0\r\n"));
 8006682:	211d      	movs	r1, #29
 8006684:	480e      	ldr	r0, [pc, #56]	; (80066c0 <ESP8266_Initialize+0x94>)
 8006686:	e7f2      	b.n	800666e <ESP8266_Initialize+0x42>
          Uart2_Data_Send("AT+CIPSERVER=1,4000\r\n",ESP8266_Strindex("AT+CIPSERVER=1,4000\r\n"));
 8006688:	2115      	movs	r1, #21
 800668a:	480e      	ldr	r0, [pc, #56]	; (80066c4 <ESP8266_Initialize+0x98>)
 800668c:	f000 fd62 	bl	8007154 <Uart2_Data_Send>
          HAL_Delay(5);
 8006690:	2005      	movs	r0, #5
 8006692:	f7fe faa9 	bl	8004be8 <HAL_Delay>
          Uart2_Data_Send("AT+CIFSR\r\n",ESP8266_Strindex("AT+CIFSR\r\n"));
 8006696:	210a      	movs	r1, #10
 8006698:	480b      	ldr	r0, [pc, #44]	; (80066c8 <ESP8266_Initialize+0x9c>)
 800669a:	f000 fd5b 	bl	8007154 <Uart2_Data_Send>
		  printf("ESP Setting Complete \r\n");
 800669e:	480b      	ldr	r0, [pc, #44]	; (80066cc <ESP8266_Initialize+0xa0>)
 80066a0:	f001 faa2 	bl	8007be8 <puts>
 80066a4:	e7e5      	b.n	8006672 <ESP8266_Initialize+0x46>
 80066a6:	bf00      	nop
 80066a8:	200003f8 	.word	0x200003f8
 80066ac:	200003f9 	.word	0x200003f9
 80066b0:	08009bb3 	.word	0x08009bb3
 80066b4:	08009bc4 	.word	0x08009bc4
 80066b8:	08009bd0 	.word	0x08009bd0
 80066bc:	08009bde 	.word	0x08009bde
 80066c0:	08009bec 	.word	0x08009bec
 80066c4:	08009c0a 	.word	0x08009c0a
 80066c8:	08009c20 	.word	0x08009c20
 80066cc:	08009c2b 	.word	0x08009c2b

080066d0 <HAL_TIM_PeriodElapsedCallback>:
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{

    if(htim->Instance == TIM6){
 80066d0:	6802      	ldr	r2, [r0, #0]
 80066d2:	4b0a      	ldr	r3, [pc, #40]	; (80066fc <HAL_TIM_PeriodElapsedCallback+0x2c>)
 80066d4:	429a      	cmp	r2, r3
 80066d6:	d10f      	bne.n	80066f8 <HAL_TIM_PeriodElapsedCallback+0x28>
        UartTimerCnt++;
 80066d8:	4a09      	ldr	r2, [pc, #36]	; (8006700 <HAL_TIM_PeriodElapsedCallback+0x30>)
 80066da:	6813      	ldr	r3, [r2, #0]
 80066dc:	3301      	adds	r3, #1
 80066de:	6013      	str	r3, [r2, #0]
        LedTimerCnt++;
 80066e0:	4a08      	ldr	r2, [pc, #32]	; (8006704 <HAL_TIM_PeriodElapsedCallback+0x34>)
 80066e2:	6813      	ldr	r3, [r2, #0]
 80066e4:	3301      	adds	r3, #1
 80066e6:	6013      	str	r3, [r2, #0]
        InitTimerCnt++;
 80066e8:	4a07      	ldr	r2, [pc, #28]	; (8006708 <HAL_TIM_PeriodElapsedCallback+0x38>)
 80066ea:	6813      	ldr	r3, [r2, #0]
 80066ec:	3301      	adds	r3, #1
 80066ee:	6013      	str	r3, [r2, #0]
        AdcTimerCnt++;
 80066f0:	4a06      	ldr	r2, [pc, #24]	; (800670c <HAL_TIM_PeriodElapsedCallback+0x3c>)
 80066f2:	6813      	ldr	r3, [r2, #0]
 80066f4:	3301      	adds	r3, #1
 80066f6:	6013      	str	r3, [r2, #0]
 80066f8:	4770      	bx	lr
 80066fa:	bf00      	nop
 80066fc:	40001000 	.word	0x40001000
 8006700:	20000408 	.word	0x20000408
 8006704:	20000404 	.word	0x20000404
 8006708:	20000400 	.word	0x20000400
 800670c:	200003fc 	.word	0x200003fc

08006710 <_write>:
    }
}
int _write (int file, uint8_t *ptr, uint16_t len)
{
 8006710:	b510      	push	{r4, lr}
 8006712:	4614      	mov	r4, r2
    HAL_UART_Transmit (&huart1, ptr, len, 10);
 8006714:	230a      	movs	r3, #10
 8006716:	4802      	ldr	r0, [pc, #8]	; (8006720 <_write+0x10>)
 8006718:	f7ff fd38 	bl	800618c <HAL_UART_Transmit>
    return len;
}
 800671c:	4620      	mov	r0, r4
 800671e:	bd10      	pop	{r4, pc}
 8006720:	200005f4 	.word	0x200005f4

08006724 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8006724:	b510      	push	{r4, lr}
 8006726:	b096      	sub	sp, #88	; 0x58
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8006728:	2228      	movs	r2, #40	; 0x28
 800672a:	2100      	movs	r1, #0
 800672c:	a80c      	add	r0, sp, #48	; 0x30
 800672e:	f000 fd69 	bl	8007204 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8006732:	2214      	movs	r2, #20
 8006734:	2100      	movs	r1, #0
 8006736:	a801      	add	r0, sp, #4
 8006738:	f000 fd64 	bl	8007204 <memset>
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 800673c:	2218      	movs	r2, #24
 800673e:	2100      	movs	r1, #0
 8006740:	eb0d 0002 	add.w	r0, sp, r2
 8006744:	f000 fd5e 	bl	8007204 <memset>

  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8006748:	2301      	movs	r3, #1
 800674a:	9310      	str	r3, [sp, #64]	; 0x40
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 800674c:	2310      	movs	r3, #16
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 800674e:	2402      	movs	r4, #2
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8006750:	9311      	str	r3, [sp, #68]	; 0x44
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
 8006752:	f44f 1360 	mov.w	r3, #3670016	; 0x380000
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8006756:	a80c      	add	r0, sp, #48	; 0x30
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
 8006758:	9315      	str	r3, [sp, #84]	; 0x54
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 800675a:	940c      	str	r4, [sp, #48]	; 0x30
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 800675c:	9413      	str	r4, [sp, #76]	; 0x4c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 800675e:	f7ff f82b 	bl	80057b8 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8006762:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8006764:	f44f 6280 	mov.w	r2, #1024	; 0x400
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8006768:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 800676a:	2300      	movs	r3, #0
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 800676c:	4621      	mov	r1, r4
 800676e:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8006770:	9303      	str	r3, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8006772:	9204      	str	r2, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 8006774:	9305      	str	r3, [sp, #20]
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8006776:	9402      	str	r4, [sp, #8]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8006778:	f7ff f9f8 	bl	8005b6c <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
 800677c:	f44f 4300 	mov.w	r3, #32768	; 0x8000
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 8006780:	a806      	add	r0, sp, #24
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
 8006782:	9406      	str	r4, [sp, #24]
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
 8006784:	9308      	str	r3, [sp, #32]
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 8006786:	f7ff faaf 	bl	8005ce8 <HAL_RCCEx_PeriphCLKConfig>
  {
    Error_Handler();
  }
}
 800678a:	b016      	add	sp, #88	; 0x58
 800678c:	bd10      	pop	{r4, pc}
	...

08006790 <main>:
{
 8006790:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	uint8_t tempdata[] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
 8006794:	4abd      	ldr	r2, [pc, #756]	; (8006a8c <main+0x2fc>)
{
 8006796:	b08d      	sub	sp, #52	; 0x34
	uint8_t tempdata[] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
 8006798:	6851      	ldr	r1, [r2, #4]
 800679a:	6810      	ldr	r0, [r2, #0]
 800679c:	ab05      	add	r3, sp, #20
 800679e:	c303      	stmia	r3!, {r0, r1}
 80067a0:	8911      	ldrh	r1, [r2, #8]
 80067a2:	7a92      	ldrb	r2, [r2, #10]
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80067a4:	4dba      	ldr	r5, [pc, #744]	; (8006a90 <main+0x300>)
	uint8_t tempdata[] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
 80067a6:	8019      	strh	r1, [r3, #0]
 80067a8:	709a      	strb	r2, [r3, #2]
  HAL_Init();
 80067aa:	f7fe f9f9 	bl	8004ba0 <HAL_Init>
  SystemClock_Config();
 80067ae:	f7ff ffb9 	bl	8006724 <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80067b2:	2210      	movs	r2, #16
 80067b4:	2100      	movs	r1, #0
 80067b6:	a808      	add	r0, sp, #32
 80067b8:	f000 fd24 	bl	8007204 <memset>
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80067bc:	69ab      	ldr	r3, [r5, #24]
  __HAL_RCC_GPIOA_CLK_ENABLE();
  __HAL_RCC_GPIOB_CLK_ENABLE();
  __HAL_RCC_GPIOD_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin, GPIO_PIN_RESET);
 80067be:	2200      	movs	r2, #0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80067c0:	f043 0310 	orr.w	r3, r3, #16
 80067c4:	61ab      	str	r3, [r5, #24]
 80067c6:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin, GPIO_PIN_RESET);
 80067c8:	f249 0140 	movw	r1, #36928	; 0x9040
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80067cc:	f003 0310 	and.w	r3, r3, #16
 80067d0:	9301      	str	r3, [sp, #4]
 80067d2:	9b01      	ldr	r3, [sp, #4]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80067d4:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin, GPIO_PIN_RESET);
 80067d6:	48af      	ldr	r0, [pc, #700]	; (8006a94 <main+0x304>)
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80067d8:	f043 0304 	orr.w	r3, r3, #4
 80067dc:	61ab      	str	r3, [r5, #24]
 80067de:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(ATT_CLK_B_GPIO_Port, ATT_CLK_B_Pin, GPIO_PIN_RESET);

  /*Configure GPIO pins : BOOT_LED_Pin PLL_LD_B_Pin PLL_EN_B_Pin */
  GPIO_InitStruct.Pin = BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80067e0:	2400      	movs	r4, #0
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80067e2:	f003 0304 	and.w	r3, r3, #4
 80067e6:	9302      	str	r3, [sp, #8]
 80067e8:	9b02      	ldr	r3, [sp, #8]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80067ea:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80067ec:	2601      	movs	r6, #1
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80067ee:	f043 0308 	orr.w	r3, r3, #8
 80067f2:	61ab      	str	r3, [r5, #24]
 80067f4:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80067f6:	2702      	movs	r7, #2
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80067f8:	f003 0308 	and.w	r3, r3, #8
 80067fc:	9303      	str	r3, [sp, #12]
 80067fe:	9b03      	ldr	r3, [sp, #12]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8006800:	69ab      	ldr	r3, [r5, #24]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 8006802:	f44f 2860 	mov.w	r8, #917504	; 0xe0000
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8006806:	f043 0320 	orr.w	r3, r3, #32
 800680a:	61ab      	str	r3, [r5, #24]
 800680c:	69ab      	ldr	r3, [r5, #24]
  sConfig.Channel = ADC_CHANNEL_9;
 800680e:	f04f 0a09 	mov.w	sl, #9
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8006812:	f003 0320 	and.w	r3, r3, #32
 8006816:	9304      	str	r3, [sp, #16]
 8006818:	9b04      	ldr	r3, [sp, #16]
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin, GPIO_PIN_RESET);
 800681a:	f7fe ffc1 	bl	80057a0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOA, LED_UL_G_B_Pin|LED_SD_R_B_Pin|PWR_LED_B_Pin|LED_DL_G_B_Pin 
 800681e:	2200      	movs	r2, #0
 8006820:	f24e 01f2 	movw	r1, #57586	; 0xe0f2
 8006824:	489c      	ldr	r0, [pc, #624]	; (8006a98 <main+0x308>)
 8006826:	f7fe ffbb 	bl	80057a0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, RST_WIFI_B_Pin|PA_EN_B_Pin|EXT_PA_EN_B_Pin|PLL_CLK_B_Pin 
 800682a:	2200      	movs	r2, #0
 800682c:	f248 01d8 	movw	r1, #32984	; 0x80d8
 8006830:	489a      	ldr	r0, [pc, #616]	; (8006a9c <main+0x30c>)
 8006832:	f7fe ffb5 	bl	80057a0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(ATT_CLK_B_GPIO_Port, ATT_CLK_B_Pin, GPIO_PIN_RESET);
 8006836:	2200      	movs	r2, #0
 8006838:	2104      	movs	r1, #4
 800683a:	4899      	ldr	r0, [pc, #612]	; (8006aa0 <main+0x310>)
 800683c:	f7fe ffb0 	bl	80057a0 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin;
 8006840:	f249 0340 	movw	r3, #36928	; 0x9040
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8006844:	a908      	add	r1, sp, #32
 8006846:	4893      	ldr	r0, [pc, #588]	; (8006a94 <main+0x304>)
  GPIO_InitStruct.Pin = BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin;
 8006848:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800684a:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800684c:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800684e:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8006850:	f7fe feba 	bl	80055c8 <HAL_GPIO_Init>

  /*Configure GPIO pins : LED_UL_G_B_Pin LED_SD_R_B_Pin PWR_LED_B_Pin LED_DL_G_B_Pin 
                           LED_DL_R_B_Pin ATT_DATA_B_Pin ATT_EN1_B_Pin ATT_EN2_B_Pin */
  GPIO_InitStruct.Pin = LED_UL_G_B_Pin|LED_SD_R_B_Pin|PWR_LED_B_Pin|LED_DL_G_B_Pin 
 8006854:	f24e 03f2 	movw	r3, #57586	; 0xe0f2
                          |LED_DL_R_B_Pin|ATT_DATA_B_Pin|ATT_EN1_B_Pin|ATT_EN2_B_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006858:	a908      	add	r1, sp, #32
 800685a:	488f      	ldr	r0, [pc, #572]	; (8006a98 <main+0x308>)
  GPIO_InitStruct.Pin = LED_UL_G_B_Pin|LED_SD_R_B_Pin|PWR_LED_B_Pin|LED_DL_G_B_Pin 
 800685c:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800685e:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8006860:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8006862:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006864:	f7fe feb0 	bl	80055c8 <HAL_GPIO_Init>

  /*Configure GPIO pins : RST_WIFI_B_Pin PA_EN_B_Pin EXT_PA_EN_B_Pin PLL_CLK_B_Pin 
                           PLL_DATA_B_Pin */
  GPIO_InitStruct.Pin = RST_WIFI_B_Pin|PA_EN_B_Pin|EXT_PA_EN_B_Pin|PLL_CLK_B_Pin 
 8006868:	f248 03d8 	movw	r3, #32984	; 0x80d8
                          |PLL_DATA_B_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800686c:	a908      	add	r1, sp, #32
 800686e:	488b      	ldr	r0, [pc, #556]	; (8006a9c <main+0x30c>)
  GPIO_InitStruct.Pin = RST_WIFI_B_Pin|PA_EN_B_Pin|EXT_PA_EN_B_Pin|PLL_CLK_B_Pin 
 8006870:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8006872:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8006874:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8006876:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8006878:	f7fe fea6 	bl	80055c8 <HAL_GPIO_Init>

  /*Configure GPIO pin : ATT_CLK_B_Pin */
  GPIO_InitStruct.Pin = ATT_CLK_B_Pin;
 800687c:	2304      	movs	r3, #4
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(ATT_CLK_B_GPIO_Port, &GPIO_InitStruct);
 800687e:	a908      	add	r1, sp, #32
 8006880:	4887      	ldr	r0, [pc, #540]	; (8006aa0 <main+0x310>)
  GPIO_InitStruct.Pin = ATT_CLK_B_Pin;
 8006882:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8006884:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8006886:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8006888:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(ATT_CLK_B_GPIO_Port, &GPIO_InitStruct);
 800688a:	f7fe fe9d 	bl	80055c8 <HAL_GPIO_Init>
  __HAL_RCC_DMA1_CLK_ENABLE();
 800688e:	696b      	ldr	r3, [r5, #20]
  hadc2.Instance = ADC2;
 8006890:	4f84      	ldr	r7, [pc, #528]	; (8006aa4 <main+0x314>)
  __HAL_RCC_DMA1_CLK_ENABLE();
 8006892:	4333      	orrs	r3, r6
 8006894:	616b      	str	r3, [r5, #20]
 8006896:	696b      	ldr	r3, [r5, #20]
  hadc1.Instance = ADC1;
 8006898:	4d83      	ldr	r5, [pc, #524]	; (8006aa8 <main+0x318>)
  __HAL_RCC_DMA1_CLK_ENABLE();
 800689a:	4033      	ands	r3, r6
 800689c:	9300      	str	r3, [sp, #0]
 800689e:	9b00      	ldr	r3, [sp, #0]
  hadc1.Instance = ADC1;
 80068a0:	4b82      	ldr	r3, [pc, #520]	; (8006aac <main+0x31c>)
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 80068a2:	4628      	mov	r0, r5
  hadc1.Instance = ADC1;
 80068a4:	602b      	str	r3, [r5, #0]
  hadc1.Init.ContinuousConvMode = ENABLE;
 80068a6:	732e      	strb	r6, [r5, #12]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 80068a8:	f8c5 801c 	str.w	r8, [r5, #28]
  hadc1.Init.NbrOfConversion = 1;
 80068ac:	612e      	str	r6, [r5, #16]
  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
 80068ae:	60ac      	str	r4, [r5, #8]
  hadc1.Init.DiscontinuousConvMode = DISABLE;
 80068b0:	752c      	strb	r4, [r5, #20]
  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 80068b2:	606c      	str	r4, [r5, #4]
  ADC_ChannelConfTypeDef sConfig = {0};
 80068b4:	9408      	str	r4, [sp, #32]
 80068b6:	9409      	str	r4, [sp, #36]	; 0x24
 80068b8:	940a      	str	r4, [sp, #40]	; 0x28
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 80068ba:	f7fe fbc7 	bl	800504c <HAL_ADC_Init>
  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
 80068be:	2307      	movs	r3, #7
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80068c0:	a908      	add	r1, sp, #32
 80068c2:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_9;
 80068c4:	f8cd a020 	str.w	sl, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_1;
 80068c8:	9609      	str	r6, [sp, #36]	; 0x24
  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
 80068ca:	930a      	str	r3, [sp, #40]	; 0x28
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80068cc:	f7fe fa52 	bl	8004d74 <HAL_ADC_ConfigChannel>
  hadc2.Instance = ADC2;
 80068d0:	4b77      	ldr	r3, [pc, #476]	; (8006ab0 <main+0x320>)
  if (HAL_ADC_Init(&hadc2) != HAL_OK)
 80068d2:	4638      	mov	r0, r7
  hadc2.Instance = ADC2;
 80068d4:	603b      	str	r3, [r7, #0]
  hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 80068d6:	f8c7 801c 	str.w	r8, [r7, #28]
  hadc2.Init.NbrOfConversion = 1;
 80068da:	613e      	str	r6, [r7, #16]
  hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
 80068dc:	60bc      	str	r4, [r7, #8]
  hadc2.Init.ContinuousConvMode = DISABLE;
 80068de:	733c      	strb	r4, [r7, #12]
  hadc2.Init.DiscontinuousConvMode = DISABLE;
 80068e0:	753c      	strb	r4, [r7, #20]
  hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 80068e2:	607c      	str	r4, [r7, #4]
  ADC_ChannelConfTypeDef sConfig = {0};
 80068e4:	9408      	str	r4, [sp, #32]
 80068e6:	9409      	str	r4, [sp, #36]	; 0x24
 80068e8:	940a      	str	r4, [sp, #40]	; 0x28
  if (HAL_ADC_Init(&hadc2) != HAL_OK)
 80068ea:	f7fe fbaf 	bl	800504c <HAL_ADC_Init>
  sConfig.Channel = ADC_CHANNEL_10;
 80068ee:	230a      	movs	r3, #10
  if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 80068f0:	4638      	mov	r0, r7
  hadc3.Instance = ADC3;
 80068f2:	4f70      	ldr	r7, [pc, #448]	; (8006ab4 <main+0x324>)
  if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 80068f4:	a908      	add	r1, sp, #32
  sConfig.Channel = ADC_CHANNEL_10;
 80068f6:	9308      	str	r3, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_1;
 80068f8:	9609      	str	r6, [sp, #36]	; 0x24
  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
 80068fa:	940a      	str	r4, [sp, #40]	; 0x28
  if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
 80068fc:	f7fe fa3a 	bl	8004d74 <HAL_ADC_ConfigChannel>
  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 8006900:	f8c7 801c 	str.w	r8, [r7, #28]
  sConfig.Channel = ADC_CHANNEL_11;
 8006904:	f04f 080b 	mov.w	r8, #11
  hadc3.Instance = ADC3;
 8006908:	4b6b      	ldr	r3, [pc, #428]	; (8006ab8 <main+0x328>)
  if (HAL_ADC_Init(&hadc3) != HAL_OK)
 800690a:	4638      	mov	r0, r7
  hadc3.Instance = ADC3;
 800690c:	603b      	str	r3, [r7, #0]
  hadc3.Init.NbrOfConversion = 1;
 800690e:	613e      	str	r6, [r7, #16]
  hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
 8006910:	60bc      	str	r4, [r7, #8]
  hadc3.Init.ContinuousConvMode = DISABLE;
 8006912:	733c      	strb	r4, [r7, #12]
  hadc3.Init.DiscontinuousConvMode = DISABLE;
 8006914:	753c      	strb	r4, [r7, #20]
  hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 8006916:	607c      	str	r4, [r7, #4]
  ADC_ChannelConfTypeDef sConfig = {0};
 8006918:	9408      	str	r4, [sp, #32]
 800691a:	9409      	str	r4, [sp, #36]	; 0x24
 800691c:	940a      	str	r4, [sp, #40]	; 0x28
  if (HAL_ADC_Init(&hadc3) != HAL_OK)
 800691e:	f7fe fb95 	bl	800504c <HAL_ADC_Init>
  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
 8006922:	a908      	add	r1, sp, #32
 8006924:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_1;
 8006926:	9609      	str	r6, [sp, #36]	; 0x24
  sConfig.Channel = ADC_CHANNEL_11;
 8006928:	f8cd 8020 	str.w	r8, [sp, #32]
  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
 800692c:	940a      	str	r4, [sp, #40]	; 0x28
  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
 800692e:	f7fe fa21 	bl	8004d74 <HAL_ADC_ConfigChannel>
  htim6.Init.Prescaler = 6400-1;
 8006932:	f641 03ff 	movw	r3, #6399	; 0x18ff
  htim6.Instance = TIM6;
 8006936:	f8df 91a8 	ldr.w	r9, [pc, #424]	; 8006ae0 <main+0x350>
  huart1.Init.BaudRate = 115200;
 800693a:	f44f 3be1 	mov.w	fp, #115200	; 0x1c200
  htim6.Init.Period = 10-1;
 800693e:	f8c9 a00c 	str.w	sl, [r9, #12]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8006942:	f04f 0a0c 	mov.w	sl, #12
  htim6.Init.Prescaler = 6400-1;
 8006946:	4a5d      	ldr	r2, [pc, #372]	; (8006abc <main+0x32c>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8006948:	4648      	mov	r0, r9
  huart1.Instance = USART1;
 800694a:	4f5d      	ldr	r7, [pc, #372]	; (8006ac0 <main+0x330>)
  htim6.Init.Prescaler = 6400-1;
 800694c:	e889 000c 	stmia.w	r9, {r2, r3}
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8006950:	f8c9 4008 	str.w	r4, [r9, #8]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8006954:	f8c9 4018 	str.w	r4, [r9, #24]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8006958:	9408      	str	r4, [sp, #32]
 800695a:	9409      	str	r4, [sp, #36]	; 0x24
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 800695c:	f7ff fb3e 	bl	8005fdc <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8006960:	a908      	add	r1, sp, #32
 8006962:	4648      	mov	r0, r9
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8006964:	9408      	str	r4, [sp, #32]
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 8006966:	9409      	str	r4, [sp, #36]	; 0x24
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8006968:	f7ff fb52 	bl	8006010 <HAL_TIMEx_MasterConfigSynchronization>
  huart1.Init.BaudRate = 115200;
 800696c:	4b55      	ldr	r3, [pc, #340]	; (8006ac4 <main+0x334>)
  huart2.Instance = USART2;
 800696e:	4e56      	ldr	r6, [pc, #344]	; (8006ac8 <main+0x338>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8006970:	4638      	mov	r0, r7
  huart1.Init.BaudRate = 115200;
 8006972:	e887 0808 	stmia.w	r7, {r3, fp}
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8006976:	60bc      	str	r4, [r7, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8006978:	60fc      	str	r4, [r7, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 800697a:	613c      	str	r4, [r7, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 800697c:	f8c7 a014 	str.w	sl, [r7, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8006980:	61bc      	str	r4, [r7, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8006982:	61fc      	str	r4, [r7, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8006984:	f7ff fbd4 	bl	8006130 <HAL_UART_Init>
  huart2.Instance = USART2;
 8006988:	4b50      	ldr	r3, [pc, #320]	; (8006acc <main+0x33c>)
  if (HAL_UART_Init(&huart2) != HAL_OK)
 800698a:	4630      	mov	r0, r6
  huart2.Init.BaudRate = 115200;
 800698c:	e886 0808 	stmia.w	r6, {r3, fp}
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 8006990:	60b4      	str	r4, [r6, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 8006992:	60f4      	str	r4, [r6, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 8006994:	6134      	str	r4, [r6, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 8006996:	f8c6 a014 	str.w	sl, [r6, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 800699a:	61b4      	str	r4, [r6, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 800699c:	61f4      	str	r4, [r6, #28]
  if (HAL_UART_Init(&huart2) != HAL_OK)
 800699e:	f7ff fbc7 	bl	8006130 <HAL_UART_Init>
  huart4.Instance = UART4;
 80069a2:	4b4b      	ldr	r3, [pc, #300]	; (8006ad0 <main+0x340>)
 80069a4:	484b      	ldr	r0, [pc, #300]	; (8006ad4 <main+0x344>)
  huart4.Init.BaudRate = 115200;
 80069a6:	e880 0808 	stmia.w	r0, {r3, fp}
  huart4.Init.WordLength = UART_WORDLENGTH_8B;
 80069aa:	6084      	str	r4, [r0, #8]
  huart4.Init.StopBits = UART_STOPBITS_1;
 80069ac:	60c4      	str	r4, [r0, #12]
  huart4.Init.Parity = UART_PARITY_NONE;
 80069ae:	6104      	str	r4, [r0, #16]
  huart4.Init.Mode = UART_MODE_TX_RX;
 80069b0:	f8c0 a014 	str.w	sl, [r0, #20]
  huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80069b4:	6184      	str	r4, [r0, #24]
  huart4.Init.OverSampling = UART_OVERSAMPLING_16;
 80069b6:	61c4      	str	r4, [r0, #28]
  if (HAL_UART_Init(&huart4) != HAL_OK)
 80069b8:	f7ff fbba 	bl	8006130 <HAL_UART_Init>
  HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0);
 80069bc:	4622      	mov	r2, r4
 80069be:	4621      	mov	r1, r4
 80069c0:	2010      	movs	r0, #16
 80069c2:	f7fe fbe1 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
 80069c6:	2010      	movs	r0, #16
 80069c8:	f7fe fc12 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
 80069cc:	4622      	mov	r2, r4
 80069ce:	4621      	mov	r1, r4
 80069d0:	200f      	movs	r0, #15
 80069d2:	f7fe fbd9 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
 80069d6:	200f      	movs	r0, #15
 80069d8:	f7fe fc0a 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
 80069dc:	4622      	mov	r2, r4
 80069de:	4621      	mov	r1, r4
 80069e0:	200e      	movs	r0, #14
 80069e2:	f7fe fbd1 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
 80069e6:	200e      	movs	r0, #14
 80069e8:	f7fe fc02 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0);
 80069ec:	4622      	mov	r2, r4
 80069ee:	4621      	mov	r1, r4
 80069f0:	2011      	movs	r0, #17
 80069f2:	f7fe fbc9 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
 80069f6:	2011      	movs	r0, #17
 80069f8:	f7fe fbfa 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(ADC3_IRQn, 0, 0);
 80069fc:	4622      	mov	r2, r4
 80069fe:	4621      	mov	r1, r4
 8006a00:	202f      	movs	r0, #47	; 0x2f
 8006a02:	f7fe fbc1 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(ADC3_IRQn);
 8006a06:	202f      	movs	r0, #47	; 0x2f
 8006a08:	f7fe fbf2 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(UART4_IRQn, 0, 0);
 8006a0c:	4622      	mov	r2, r4
 8006a0e:	4621      	mov	r1, r4
 8006a10:	2034      	movs	r0, #52	; 0x34
 8006a12:	f7fe fbb9 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(UART4_IRQn);
 8006a16:	2034      	movs	r0, #52	; 0x34
 8006a18:	f7fe fbea 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 8006a1c:	4622      	mov	r2, r4
 8006a1e:	4621      	mov	r1, r4
 8006a20:	2036      	movs	r0, #54	; 0x36
 8006a22:	f7fe fbb1 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 8006a26:	2036      	movs	r0, #54	; 0x36
 8006a28:	f7fe fbe2 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
 8006a2c:	4622      	mov	r2, r4
 8006a2e:	4621      	mov	r1, r4
 8006a30:	2012      	movs	r0, #18
 8006a32:	f7fe fba9 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
 8006a36:	2012      	movs	r0, #18
 8006a38:	f7fe fbda 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 8006a3c:	4622      	mov	r2, r4
 8006a3e:	4621      	mov	r1, r4
 8006a40:	2025      	movs	r0, #37	; 0x25
 8006a42:	f7fe fba1 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8006a46:	2025      	movs	r0, #37	; 0x25
 8006a48:	f7fe fbd2 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
 8006a4c:	4622      	mov	r2, r4
 8006a4e:	4621      	mov	r1, r4
 8006a50:	2026      	movs	r0, #38	; 0x26
 8006a52:	f7fe fb99 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART2_IRQn);
 8006a56:	2026      	movs	r0, #38	; 0x26
 8006a58:	f7fe fbca 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 8006a5c:	4622      	mov	r2, r4
 8006a5e:	4621      	mov	r1, r4
 8006a60:	4640      	mov	r0, r8
 8006a62:	f7fe fb91 	bl	8005188 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
 8006a66:	4640      	mov	r0, r8
 8006a68:	f7fe fbc2 	bl	80051f0 <HAL_NVIC_EnableIRQ>
  HAL_TIM_Base_Start_IT(&htim6);
 8006a6c:	4648      	mov	r0, r9
 8006a6e:	f7ff f9b3 	bl	8005dd8 <HAL_TIM_Base_Start_IT>
  setbuf(stdout, NULL);
 8006a72:	4b19      	ldr	r3, [pc, #100]	; (8006ad8 <main+0x348>)
 8006a74:	4621      	mov	r1, r4
 8006a76:	681b      	ldr	r3, [r3, #0]
		  HAL_GPIO_TogglePin(LED_UL_G_B_GPIO_Port,LED_UL_G_B_Pin);
 8006a78:	f8df 901c 	ldr.w	r9, [pc, #28]	; 8006a98 <main+0x308>
  setbuf(stdout, NULL);
 8006a7c:	6898      	ldr	r0, [r3, #8]
 8006a7e:	f001 f8bb 	bl	8007bf8 <setbuf>
  printf("Uart Start \r\n");
 8006a82:	4816      	ldr	r0, [pc, #88]	; (8006adc <main+0x34c>)
 8006a84:	f001 f8b0 	bl	8007be8 <puts>
 8006a88:	e02c      	b.n	8006ae4 <main+0x354>
 8006a8a:	bf00      	nop
 8006a8c:	08009ba8 	.word	0x08009ba8
 8006a90:	40021000 	.word	0x40021000
 8006a94:	40011000 	.word	0x40011000
 8006a98:	40010800 	.word	0x40010800
 8006a9c:	40010c00 	.word	0x40010c00
 8006aa0:	40011400 	.word	0x40011400
 8006aa4:	20000498 	.word	0x20000498
 8006aa8:	2000050c 	.word	0x2000050c
 8006aac:	40012400 	.word	0x40012400
 8006ab0:	40012800 	.word	0x40012800
 8006ab4:	2000053c 	.word	0x2000053c
 8006ab8:	40013c00 	.word	0x40013c00
 8006abc:	40001000 	.word	0x40001000
 8006ac0:	200005f4 	.word	0x200005f4
 8006ac4:	40013800 	.word	0x40013800
 8006ac8:	200006f8 	.word	0x200006f8
 8006acc:	40004400 	.word	0x40004400
 8006ad0:	40004c00 	.word	0x40004c00
 8006ad4:	200006b8 	.word	0x200006b8
 8006ad8:	2000020c 	.word	0x2000020c
 8006adc:	08009c42 	.word	0x08009c42
 8006ae0:	20000678 	.word	0x20000678
  printf("Crc generate %x \r\n",CRC16_Generate(tempdata,11));
 8006ae4:	4641      	mov	r1, r8
 8006ae6:	a805      	add	r0, sp, #20
 8006ae8:	f7ff fd7c 	bl	80065e4 <CRC16_Generate>
 8006aec:	4601      	mov	r1, r0
 8006aee:	4830      	ldr	r0, [pc, #192]	; (8006bb0 <main+0x420>)
 8006af0:	f000 fff2 	bl	8007ad8 <iprintf>
  InitUartQueue(&hTerminal,&TerminalQueue);
 8006af4:	4638      	mov	r0, r7
 8006af6:	492f      	ldr	r1, [pc, #188]	; (8006bb4 <main+0x424>)
 8006af8:	f000 fac6 	bl	8007088 <InitUartQueue>
  InitUartQueue(&hWifi,&WifiQueue);
 8006afc:	4630      	mov	r0, r6
          printf("ADC Vale : %f \r\n",temp_tmp * temp_val);
 8006afe:	a72a      	add	r7, pc, #168	; (adr r7, 8006ba8 <main+0x418>)
 8006b00:	e9d7 6700 	ldrd	r6, r7, [r7]
  InitUartQueue(&hWifi,&WifiQueue);
 8006b04:	492c      	ldr	r1, [pc, #176]	; (8006bb8 <main+0x428>)
 8006b06:	f000 fabf 	bl	8007088 <InitUartQueue>
HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
 8006b0a:	4628      	mov	r0, r5
 8006b0c:	220e      	movs	r2, #14
 8006b0e:	492b      	ldr	r1, [pc, #172]	; (8006bbc <main+0x42c>)
 8006b10:	f7fe f9ec 	bl	8004eec <HAL_ADC_Start_DMA>
	  if(LedTimerCnt > 100){
 8006b14:	4d2a      	ldr	r5, [pc, #168]	; (8006bc0 <main+0x430>)
 8006b16:	682b      	ldr	r3, [r5, #0]
 8006b18:	2b64      	cmp	r3, #100	; 0x64
 8006b1a:	d905      	bls.n	8006b28 <main+0x398>
		  HAL_GPIO_TogglePin(LED_UL_G_B_GPIO_Port,LED_UL_G_B_Pin);
 8006b1c:	2102      	movs	r1, #2
 8006b1e:	4648      	mov	r0, r9
 8006b20:	f7fe fe43 	bl	80057aa <HAL_GPIO_TogglePin>
		  LedTimerCnt = 0;
 8006b24:	2300      	movs	r3, #0
 8006b26:	602b      	str	r3, [r5, #0]
	  if(InitTimerCnt >1000){
 8006b28:	4c26      	ldr	r4, [pc, #152]	; (8006bc4 <main+0x434>)
 8006b2a:	6823      	ldr	r3, [r4, #0]
 8006b2c:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
 8006b30:	d903      	bls.n	8006b3a <main+0x3aa>
		  ESP8266_Initialize();
 8006b32:	f7ff fd7b 	bl	800662c <ESP8266_Initialize>
		  InitTimerCnt = 0;
 8006b36:	2300      	movs	r3, #0
 8006b38:	6023      	str	r3, [r4, #0]
	  if(AdcTimerCnt > 3000){
 8006b3a:	f640 33b8 	movw	r3, #3000	; 0xbb8
 8006b3e:	f8df 8090 	ldr.w	r8, [pc, #144]	; 8006bd0 <main+0x440>
 8006b42:	f8d8 2000 	ldr.w	r2, [r8]
 8006b46:	429a      	cmp	r2, r3
 8006b48:	d917      	bls.n	8006b7a <main+0x3ea>
		  temp_val = ((ADCvalue[0] & 0xFF00) >> 8) | (ADCvalue[0] & 0x00FF);
 8006b4a:	4b1c      	ldr	r3, [pc, #112]	; (8006bbc <main+0x42c>)
		  printf("ADC Vale : %d \r\n",temp_val);
 8006b4c:	481e      	ldr	r0, [pc, #120]	; (8006bc8 <main+0x438>)
		  temp_val = ((ADCvalue[0] & 0xFF00) >> 8) | (ADCvalue[0] & 0x00FF);
 8006b4e:	681c      	ldr	r4, [r3, #0]
 8006b50:	ea44 2414 	orr.w	r4, r4, r4, lsr #8
		  printf("ADC Vale : %d \r\n",temp_val);
 8006b54:	b2e4      	uxtb	r4, r4
 8006b56:	4621      	mov	r1, r4
 8006b58:	f000 ffbe 	bl	8007ad8 <iprintf>
          printf("ADC Vale : %f \r\n",temp_tmp * temp_val);
 8006b5c:	4620      	mov	r0, r4
 8006b5e:	f7fd fcbd 	bl	80044dc <__aeabi_i2d>
 8006b62:	4632      	mov	r2, r6
 8006b64:	463b      	mov	r3, r7
 8006b66:	f7fd fd1f 	bl	80045a8 <__aeabi_dmul>
 8006b6a:	4602      	mov	r2, r0
 8006b6c:	460b      	mov	r3, r1
 8006b6e:	4817      	ldr	r0, [pc, #92]	; (8006bcc <main+0x43c>)
 8006b70:	f000 ffb2 	bl	8007ad8 <iprintf>
		  AdcTimerCnt = 0;
 8006b74:	2300      	movs	r3, #0
 8006b76:	f8c8 3000 	str.w	r3, [r8]
	   while (TerminalQueue.data > 0) GetDataFromUartQueue(&hTerminal);
 8006b7a:	4c0e      	ldr	r4, [pc, #56]	; (8006bb4 <main+0x424>)
 8006b7c:	f8df 8054 	ldr.w	r8, [pc, #84]	; 8006bd4 <main+0x444>
 8006b80:	68a3      	ldr	r3, [r4, #8]
 8006b82:	2b00      	cmp	r3, #0
 8006b84:	dc09      	bgt.n	8006b9a <main+0x40a>
	   while (WifiQueue.data > 0) GetDataFromUartQueue(&hWifi);
 8006b86:	4c0c      	ldr	r4, [pc, #48]	; (8006bb8 <main+0x428>)
 8006b88:	f8df 804c 	ldr.w	r8, [pc, #76]	; 8006bd8 <main+0x448>
 8006b8c:	68a3      	ldr	r3, [r4, #8]
 8006b8e:	2b00      	cmp	r3, #0
 8006b90:	ddc1      	ble.n	8006b16 <main+0x386>
 8006b92:	4640      	mov	r0, r8
 8006b94:	f000 fa90 	bl	80070b8 <GetDataFromUartQueue>
 8006b98:	e7f8      	b.n	8006b8c <main+0x3fc>
	   while (TerminalQueue.data > 0) GetDataFromUartQueue(&hTerminal);
 8006b9a:	4640      	mov	r0, r8
 8006b9c:	f000 fa8c 	bl	80070b8 <GetDataFromUartQueue>
 8006ba0:	e7ee      	b.n	8006b80 <main+0x3f0>
 8006ba2:	bf00      	nop
 8006ba4:	f3af 8000 	nop.w
 8006ba8:	e734d9b4 	.word	0xe734d9b4
 8006bac:	3f4a680c 	.word	0x3f4a680c
 8006bb0:	08009c4f 	.word	0x08009c4f
 8006bb4:	20000738 	.word	0x20000738
 8006bb8:	20000b44 	.word	0x20000b44
 8006bbc:	2000041c 	.word	0x2000041c
 8006bc0:	20000404 	.word	0x20000404
 8006bc4:	20000400 	.word	0x20000400
 8006bc8:	08009c62 	.word	0x08009c62
 8006bcc:	08009c73 	.word	0x08009c73
 8006bd0:	200003fc 	.word	0x200003fc
 8006bd4:	200005f4 	.word	0x200005f4
 8006bd8:	200006f8 	.word	0x200006f8

08006bdc <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8006bdc:	4770      	bx	lr
	...

08006be0 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8006be0:	4b0e      	ldr	r3, [pc, #56]	; (8006c1c <HAL_MspInit+0x3c>)
{
 8006be2:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8006be4:	699a      	ldr	r2, [r3, #24]
 8006be6:	f042 0201 	orr.w	r2, r2, #1
 8006bea:	619a      	str	r2, [r3, #24]
 8006bec:	699a      	ldr	r2, [r3, #24]
 8006bee:	f002 0201 	and.w	r2, r2, #1
 8006bf2:	9200      	str	r2, [sp, #0]
 8006bf4:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8006bf6:	69da      	ldr	r2, [r3, #28]
 8006bf8:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8006bfc:	61da      	str	r2, [r3, #28]
 8006bfe:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /** DISABLE: JTAG-DP Disabled and SW-DP Disabled 
  */
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8006c00:	4a07      	ldr	r2, [pc, #28]	; (8006c20 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 8006c02:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8006c06:	9301      	str	r3, [sp, #4]
 8006c08:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8006c0a:	6853      	ldr	r3, [r2, #4]
 8006c0c:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8006c10:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
 8006c14:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8006c16:	b002      	add	sp, #8
 8006c18:	4770      	bx	lr
 8006c1a:	bf00      	nop
 8006c1c:	40021000 	.word	0x40021000
 8006c20:	40010000 	.word	0x40010000

08006c24 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
 8006c24:	b530      	push	{r4, r5, lr}
 8006c26:	4605      	mov	r5, r0
 8006c28:	b08b      	sub	sp, #44	; 0x2c
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8006c2a:	2210      	movs	r2, #16
 8006c2c:	2100      	movs	r1, #0
 8006c2e:	a806      	add	r0, sp, #24
 8006c30:	f000 fae8 	bl	8007204 <memset>
  if(hadc->Instance==ADC1)
 8006c34:	682b      	ldr	r3, [r5, #0]
 8006c36:	4a38      	ldr	r2, [pc, #224]	; (8006d18 <HAL_ADC_MspInit+0xf4>)
 8006c38:	4293      	cmp	r3, r2
 8006c3a:	d135      	bne.n	8006ca8 <HAL_ADC_MspInit+0x84>
  {
  /* USER CODE BEGIN ADC1_MspInit 0 */

  /* USER CODE END ADC1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_ADC1_CLK_ENABLE();
 8006c3c:	4b37      	ldr	r3, [pc, #220]	; (8006d1c <HAL_ADC_MspInit+0xf8>)
    /**ADC1 GPIO Configuration    
    PB1     ------> ADC1_IN9 
    */
    GPIO_InitStruct.Pin = RFU_TEMP_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(RFU_TEMP_GPIO_Port, &GPIO_InitStruct);
 8006c3e:	4838      	ldr	r0, [pc, #224]	; (8006d20 <HAL_ADC_MspInit+0xfc>)
    __HAL_RCC_ADC1_CLK_ENABLE();
 8006c40:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(RFU_TEMP_GPIO_Port, &GPIO_InitStruct);
 8006c42:	a906      	add	r1, sp, #24
    __HAL_RCC_ADC1_CLK_ENABLE();
 8006c44:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8006c48:	619a      	str	r2, [r3, #24]
 8006c4a:	699a      	ldr	r2, [r3, #24]

    /* ADC1 DMA Init */
    /* ADC1 Init */
    hdma_adc1.Instance = DMA1_Channel1;
 8006c4c:	4c35      	ldr	r4, [pc, #212]	; (8006d24 <HAL_ADC_MspInit+0x100>)
    __HAL_RCC_ADC1_CLK_ENABLE();
 8006c4e:	f402 7200 	and.w	r2, r2, #512	; 0x200
 8006c52:	9200      	str	r2, [sp, #0]
 8006c54:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8006c56:	699a      	ldr	r2, [r3, #24]
 8006c58:	f042 0208 	orr.w	r2, r2, #8
 8006c5c:	619a      	str	r2, [r3, #24]
 8006c5e:	699b      	ldr	r3, [r3, #24]
 8006c60:	f003 0308 	and.w	r3, r3, #8
 8006c64:	9301      	str	r3, [sp, #4]
 8006c66:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = RFU_TEMP_Pin;
 8006c68:	2302      	movs	r3, #2
 8006c6a:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8006c6c:	2303      	movs	r3, #3
 8006c6e:	9307      	str	r3, [sp, #28]
    HAL_GPIO_Init(RFU_TEMP_GPIO_Port, &GPIO_InitStruct);
 8006c70:	f7fe fcaa 	bl	80055c8 <HAL_GPIO_Init>
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 8006c74:	2280      	movs	r2, #128	; 0x80
 8006c76:	60e2      	str	r2, [r4, #12]
    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 8006c78:	f44f 7200 	mov.w	r2, #512	; 0x200
 8006c7c:	6122      	str	r2, [r4, #16]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 8006c7e:	f44f 6200 	mov.w	r2, #2048	; 0x800
    hdma_adc1.Instance = DMA1_Channel1;
 8006c82:	4b29      	ldr	r3, [pc, #164]	; (8006d28 <HAL_ADC_MspInit+0x104>)
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 8006c84:	6162      	str	r2, [r4, #20]
    hdma_adc1.Instance = DMA1_Channel1;
 8006c86:	6023      	str	r3, [r4, #0]
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 8006c88:	2220      	movs	r2, #32
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8006c8a:	2300      	movs	r3, #0
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 8006c8c:	4620      	mov	r0, r4
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8006c8e:	6063      	str	r3, [r4, #4]
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
 8006c90:	60a3      	str	r3, [r4, #8]
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 8006c92:	61a2      	str	r2, [r4, #24]
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 8006c94:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 8006c96:	f7fe facf 	bl	8005238 <HAL_DMA_Init>
 8006c9a:	b108      	cbz	r0, 8006ca0 <HAL_ADC_MspInit+0x7c>
    {
      Error_Handler();
 8006c9c:	f7ff ff9e 	bl	8006bdc <Error_Handler>
    }

    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
 8006ca0:	622c      	str	r4, [r5, #32]
 8006ca2:	6265      	str	r5, [r4, #36]	; 0x24
  /* USER CODE BEGIN ADC3_MspInit 1 */

  /* USER CODE END ADC3_MspInit 1 */
  }

}
 8006ca4:	b00b      	add	sp, #44	; 0x2c
 8006ca6:	bd30      	pop	{r4, r5, pc}
  else if(hadc->Instance==ADC2)
 8006ca8:	4a20      	ldr	r2, [pc, #128]	; (8006d2c <HAL_ADC_MspInit+0x108>)
 8006caa:	4293      	cmp	r3, r2
 8006cac:	d11b      	bne.n	8006ce6 <HAL_ADC_MspInit+0xc2>
    __HAL_RCC_ADC2_CLK_ENABLE();
 8006cae:	4b1b      	ldr	r3, [pc, #108]	; (8006d1c <HAL_ADC_MspInit+0xf8>)
 8006cb0:	699a      	ldr	r2, [r3, #24]
 8006cb2:	f442 6280 	orr.w	r2, r2, #1024	; 0x400
 8006cb6:	619a      	str	r2, [r3, #24]
 8006cb8:	699a      	ldr	r2, [r3, #24]
 8006cba:	f402 6280 	and.w	r2, r2, #1024	; 0x400
 8006cbe:	9202      	str	r2, [sp, #8]
 8006cc0:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8006cc2:	699a      	ldr	r2, [r3, #24]
 8006cc4:	f042 0210 	orr.w	r2, r2, #16
 8006cc8:	619a      	str	r2, [r3, #24]
 8006cca:	699b      	ldr	r3, [r3, #24]
 8006ccc:	f003 0310 	and.w	r3, r3, #16
 8006cd0:	9303      	str	r3, [sp, #12]
 8006cd2:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = DET_OUT_B_Pin;
 8006cd4:	2301      	movs	r3, #1
    GPIO_InitStruct.Pin = EXT_DET_B_Pin;
 8006cd6:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8006cd8:	2303      	movs	r3, #3
    HAL_GPIO_Init(EXT_DET_B_GPIO_Port, &GPIO_InitStruct);
 8006cda:	a906      	add	r1, sp, #24
 8006cdc:	4814      	ldr	r0, [pc, #80]	; (8006d30 <HAL_ADC_MspInit+0x10c>)
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8006cde:	9307      	str	r3, [sp, #28]
    HAL_GPIO_Init(EXT_DET_B_GPIO_Port, &GPIO_InitStruct);
 8006ce0:	f7fe fc72 	bl	80055c8 <HAL_GPIO_Init>
}
 8006ce4:	e7de      	b.n	8006ca4 <HAL_ADC_MspInit+0x80>
  else if(hadc->Instance==ADC3)
 8006ce6:	4a13      	ldr	r2, [pc, #76]	; (8006d34 <HAL_ADC_MspInit+0x110>)
 8006ce8:	4293      	cmp	r3, r2
 8006cea:	d1db      	bne.n	8006ca4 <HAL_ADC_MspInit+0x80>
    __HAL_RCC_ADC3_CLK_ENABLE();
 8006cec:	4b0b      	ldr	r3, [pc, #44]	; (8006d1c <HAL_ADC_MspInit+0xf8>)
 8006cee:	699a      	ldr	r2, [r3, #24]
 8006cf0:	f442 4200 	orr.w	r2, r2, #32768	; 0x8000
 8006cf4:	619a      	str	r2, [r3, #24]
 8006cf6:	699a      	ldr	r2, [r3, #24]
 8006cf8:	f402 4200 	and.w	r2, r2, #32768	; 0x8000
 8006cfc:	9204      	str	r2, [sp, #16]
 8006cfe:	9a04      	ldr	r2, [sp, #16]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8006d00:	699a      	ldr	r2, [r3, #24]
 8006d02:	f042 0210 	orr.w	r2, r2, #16
 8006d06:	619a      	str	r2, [r3, #24]
 8006d08:	699b      	ldr	r3, [r3, #24]
 8006d0a:	f003 0310 	and.w	r3, r3, #16
 8006d0e:	9305      	str	r3, [sp, #20]
 8006d10:	9b05      	ldr	r3, [sp, #20]
    GPIO_InitStruct.Pin = EXT_DET_B_Pin;
 8006d12:	2302      	movs	r3, #2
 8006d14:	e7df      	b.n	8006cd6 <HAL_ADC_MspInit+0xb2>
 8006d16:	bf00      	nop
 8006d18:	40012400 	.word	0x40012400
 8006d1c:	40021000 	.word	0x40021000
 8006d20:	40010c00 	.word	0x40010c00
 8006d24:	20000634 	.word	0x20000634
 8006d28:	40020008 	.word	0x40020008
 8006d2c:	40012800 	.word	0x40012800
 8006d30:	40011000 	.word	0x40011000
 8006d34:	40013c00 	.word	0x40013c00

08006d38 <HAL_TIM_Base_MspInit>:
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
  if(htim_base->Instance==TIM6)
 8006d38:	6802      	ldr	r2, [r0, #0]
 8006d3a:	4b08      	ldr	r3, [pc, #32]	; (8006d5c <HAL_TIM_Base_MspInit+0x24>)
{
 8006d3c:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 8006d3e:	429a      	cmp	r2, r3
 8006d40:	d10a      	bne.n	8006d58 <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 8006d42:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 8006d46:	69da      	ldr	r2, [r3, #28]
 8006d48:	f042 0210 	orr.w	r2, r2, #16
 8006d4c:	61da      	str	r2, [r3, #28]
 8006d4e:	69db      	ldr	r3, [r3, #28]
 8006d50:	f003 0310 	and.w	r3, r3, #16
 8006d54:	9301      	str	r3, [sp, #4]
 8006d56:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 8006d58:	b002      	add	sp, #8
 8006d5a:	4770      	bx	lr
 8006d5c:	40001000 	.word	0x40001000

08006d60 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8006d60:	b570      	push	{r4, r5, r6, lr}
 8006d62:	4605      	mov	r5, r0
 8006d64:	b08a      	sub	sp, #40	; 0x28
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8006d66:	2210      	movs	r2, #16
 8006d68:	2100      	movs	r1, #0
 8006d6a:	a806      	add	r0, sp, #24
 8006d6c:	f000 fa4a 	bl	8007204 <memset>
  if(huart->Instance==UART4)
 8006d70:	682b      	ldr	r3, [r5, #0]
 8006d72:	4a60      	ldr	r2, [pc, #384]	; (8006ef4 <HAL_UART_MspInit+0x194>)
 8006d74:	4293      	cmp	r3, r2
 8006d76:	d129      	bne.n	8006dcc <HAL_UART_MspInit+0x6c>
  {
  /* USER CODE BEGIN UART4_MspInit 0 */

  /* USER CODE END UART4_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_UART4_CLK_ENABLE();
 8006d78:	4b5f      	ldr	r3, [pc, #380]	; (8006ef8 <HAL_UART_MspInit+0x198>)
    PC11     ------> UART4_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_10;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8006d7a:	a906      	add	r1, sp, #24
    __HAL_RCC_UART4_CLK_ENABLE();
 8006d7c:	69da      	ldr	r2, [r3, #28]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8006d7e:	485f      	ldr	r0, [pc, #380]	; (8006efc <HAL_UART_MspInit+0x19c>)
    __HAL_RCC_UART4_CLK_ENABLE();
 8006d80:	f442 2200 	orr.w	r2, r2, #524288	; 0x80000
 8006d84:	61da      	str	r2, [r3, #28]
 8006d86:	69da      	ldr	r2, [r3, #28]
 8006d88:	f402 2200 	and.w	r2, r2, #524288	; 0x80000
 8006d8c:	9200      	str	r2, [sp, #0]
 8006d8e:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8006d90:	699a      	ldr	r2, [r3, #24]
 8006d92:	f042 0210 	orr.w	r2, r2, #16
 8006d96:	619a      	str	r2, [r3, #24]
 8006d98:	699b      	ldr	r3, [r3, #24]
 8006d9a:	f003 0310 	and.w	r3, r3, #16
 8006d9e:	9301      	str	r3, [sp, #4]
 8006da0:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8006da2:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8006da6:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8006da8:	2302      	movs	r3, #2
 8006daa:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8006dac:	2303      	movs	r3, #3
 8006dae:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8006db0:	f7fe fc0a 	bl	80055c8 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_11;
 8006db4:	f44f 6300 	mov.w	r3, #2048	; 0x800
 8006db8:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8006dba:	2300      	movs	r3, #0
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8006dbc:	a906      	add	r1, sp, #24
 8006dbe:	484f      	ldr	r0, [pc, #316]	; (8006efc <HAL_UART_MspInit+0x19c>)
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8006dc0:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8006dc2:	9308      	str	r3, [sp, #32]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8006dc4:	f7fe fc00 	bl	80055c8 <HAL_GPIO_Init>
  /* USER CODE BEGIN USART2_MspInit 1 */

  /* USER CODE END USART2_MspInit 1 */
  }

}
 8006dc8:	b00a      	add	sp, #40	; 0x28
 8006dca:	bd70      	pop	{r4, r5, r6, pc}
  else if(huart->Instance==USART1)
 8006dcc:	4a4c      	ldr	r2, [pc, #304]	; (8006f00 <HAL_UART_MspInit+0x1a0>)
 8006dce:	4293      	cmp	r3, r2
 8006dd0:	d150      	bne.n	8006e74 <HAL_UART_MspInit+0x114>
    __HAL_RCC_USART1_CLK_ENABLE();
 8006dd2:	4b49      	ldr	r3, [pc, #292]	; (8006ef8 <HAL_UART_MspInit+0x198>)
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006dd4:	a906      	add	r1, sp, #24
    __HAL_RCC_USART1_CLK_ENABLE();
 8006dd6:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006dd8:	484a      	ldr	r0, [pc, #296]	; (8006f04 <HAL_UART_MspInit+0x1a4>)
    __HAL_RCC_USART1_CLK_ENABLE();
 8006dda:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8006dde:	619a      	str	r2, [r3, #24]
 8006de0:	699a      	ldr	r2, [r3, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8006de2:	2600      	movs	r6, #0
    __HAL_RCC_USART1_CLK_ENABLE();
 8006de4:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 8006de8:	9202      	str	r2, [sp, #8]
 8006dea:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8006dec:	699a      	ldr	r2, [r3, #24]
    hdma_usart1_rx.Instance = DMA1_Channel5;
 8006dee:	4c46      	ldr	r4, [pc, #280]	; (8006f08 <HAL_UART_MspInit+0x1a8>)
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8006df0:	f042 0204 	orr.w	r2, r2, #4
 8006df4:	619a      	str	r2, [r3, #24]
 8006df6:	699b      	ldr	r3, [r3, #24]
 8006df8:	f003 0304 	and.w	r3, r3, #4
 8006dfc:	9303      	str	r3, [sp, #12]
 8006dfe:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8006e00:	f44f 7300 	mov.w	r3, #512	; 0x200
 8006e04:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8006e06:	2302      	movs	r3, #2
 8006e08:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8006e0a:	2303      	movs	r3, #3
 8006e0c:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006e0e:	f7fe fbdb 	bl	80055c8 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8006e12:	f44f 6380 	mov.w	r3, #1024	; 0x400
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006e16:	483b      	ldr	r0, [pc, #236]	; (8006f04 <HAL_UART_MspInit+0x1a4>)
 8006e18:	a906      	add	r1, sp, #24
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8006e1a:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8006e1c:	9607      	str	r6, [sp, #28]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8006e1e:	9608      	str	r6, [sp, #32]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006e20:	f7fe fbd2 	bl	80055c8 <HAL_GPIO_Init>
    hdma_usart1_rx.Instance = DMA1_Channel5;
 8006e24:	4b39      	ldr	r3, [pc, #228]	; (8006f0c <HAL_UART_MspInit+0x1ac>)
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 8006e26:	4620      	mov	r0, r4
    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8006e28:	e884 0048 	stmia.w	r4, {r3, r6}
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 8006e2c:	2380      	movs	r3, #128	; 0x80
    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8006e2e:	60a6      	str	r6, [r4, #8]
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 8006e30:	60e3      	str	r3, [r4, #12]
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8006e32:	6126      	str	r6, [r4, #16]
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8006e34:	6166      	str	r6, [r4, #20]
    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
 8006e36:	61a6      	str	r6, [r4, #24]
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
 8006e38:	61e6      	str	r6, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 8006e3a:	f7fe f9fd 	bl	8005238 <HAL_DMA_Init>
 8006e3e:	b108      	cbz	r0, 8006e44 <HAL_UART_MspInit+0xe4>
      Error_Handler();
 8006e40:	f7ff fecc 	bl	8006bdc <Error_Handler>
    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
 8006e44:	636c      	str	r4, [r5, #52]	; 0x34
 8006e46:	6265      	str	r5, [r4, #36]	; 0x24
    hdma_usart1_tx.Instance = DMA1_Channel4;
 8006e48:	4b31      	ldr	r3, [pc, #196]	; (8006f10 <HAL_UART_MspInit+0x1b0>)
 8006e4a:	4c32      	ldr	r4, [pc, #200]	; (8006f14 <HAL_UART_MspInit+0x1b4>)
    hdma_usart2_tx.Instance = DMA1_Channel7;
 8006e4c:	6023      	str	r3, [r4, #0]
    hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8006e4e:	2310      	movs	r3, #16
    hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
 8006e50:	2280      	movs	r2, #128	; 0x80
    hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8006e52:	6063      	str	r3, [r4, #4]
    hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 8006e54:	2300      	movs	r3, #0
    hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
 8006e56:	60e2      	str	r2, [r4, #12]
    hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 8006e58:	60a3      	str	r3, [r4, #8]
    hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8006e5a:	6123      	str	r3, [r4, #16]
    hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8006e5c:	6163      	str	r3, [r4, #20]
    hdma_usart2_tx.Init.Mode = DMA_NORMAL;
 8006e5e:	61a3      	str	r3, [r4, #24]
    hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
 8006e60:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
 8006e62:	4620      	mov	r0, r4
 8006e64:	f7fe f9e8 	bl	8005238 <HAL_DMA_Init>
 8006e68:	b108      	cbz	r0, 8006e6e <HAL_UART_MspInit+0x10e>
      Error_Handler();
 8006e6a:	f7ff feb7 	bl	8006bdc <Error_Handler>
    __HAL_LINKDMA(huart,hdmatx,hdma_usart2_tx);
 8006e6e:	632c      	str	r4, [r5, #48]	; 0x30
 8006e70:	6265      	str	r5, [r4, #36]	; 0x24
}
 8006e72:	e7a9      	b.n	8006dc8 <HAL_UART_MspInit+0x68>
  else if(huart->Instance==USART2)
 8006e74:	4a28      	ldr	r2, [pc, #160]	; (8006f18 <HAL_UART_MspInit+0x1b8>)
 8006e76:	4293      	cmp	r3, r2
 8006e78:	d1a6      	bne.n	8006dc8 <HAL_UART_MspInit+0x68>
    __HAL_RCC_USART2_CLK_ENABLE();
 8006e7a:	4b1f      	ldr	r3, [pc, #124]	; (8006ef8 <HAL_UART_MspInit+0x198>)
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006e7c:	a906      	add	r1, sp, #24
    __HAL_RCC_USART2_CLK_ENABLE();
 8006e7e:	69da      	ldr	r2, [r3, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006e80:	4820      	ldr	r0, [pc, #128]	; (8006f04 <HAL_UART_MspInit+0x1a4>)
    __HAL_RCC_USART2_CLK_ENABLE();
 8006e82:	f442 3200 	orr.w	r2, r2, #131072	; 0x20000
 8006e86:	61da      	str	r2, [r3, #28]
 8006e88:	69da      	ldr	r2, [r3, #28]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8006e8a:	2600      	movs	r6, #0
    __HAL_RCC_USART2_CLK_ENABLE();
 8006e8c:	f402 3200 	and.w	r2, r2, #131072	; 0x20000
 8006e90:	9204      	str	r2, [sp, #16]
 8006e92:	9a04      	ldr	r2, [sp, #16]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8006e94:	699a      	ldr	r2, [r3, #24]
    hdma_usart2_rx.Instance = DMA1_Channel6;
 8006e96:	4c21      	ldr	r4, [pc, #132]	; (8006f1c <HAL_UART_MspInit+0x1bc>)
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8006e98:	f042 0204 	orr.w	r2, r2, #4
 8006e9c:	619a      	str	r2, [r3, #24]
 8006e9e:	699b      	ldr	r3, [r3, #24]
 8006ea0:	f003 0304 	and.w	r3, r3, #4
 8006ea4:	9305      	str	r3, [sp, #20]
 8006ea6:	9b05      	ldr	r3, [sp, #20]
    GPIO_InitStruct.Pin = GPIO_PIN_2;
 8006ea8:	2304      	movs	r3, #4
 8006eaa:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8006eac:	2302      	movs	r3, #2
 8006eae:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8006eb0:	2303      	movs	r3, #3
 8006eb2:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006eb4:	f7fe fb88 	bl	80055c8 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_3;
 8006eb8:	2308      	movs	r3, #8
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006eba:	4812      	ldr	r0, [pc, #72]	; (8006f04 <HAL_UART_MspInit+0x1a4>)
 8006ebc:	a906      	add	r1, sp, #24
    GPIO_InitStruct.Pin = GPIO_PIN_3;
 8006ebe:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8006ec0:	9607      	str	r6, [sp, #28]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8006ec2:	9608      	str	r6, [sp, #32]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8006ec4:	f7fe fb80 	bl	80055c8 <HAL_GPIO_Init>
    hdma_usart2_rx.Instance = DMA1_Channel6;
 8006ec8:	4b15      	ldr	r3, [pc, #84]	; (8006f20 <HAL_UART_MspInit+0x1c0>)
    if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
 8006eca:	4620      	mov	r0, r4
    hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8006ecc:	e884 0048 	stmia.w	r4, {r3, r6}
    hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
 8006ed0:	2380      	movs	r3, #128	; 0x80
    hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8006ed2:	60a6      	str	r6, [r4, #8]
    hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
 8006ed4:	60e3      	str	r3, [r4, #12]
    hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8006ed6:	6126      	str	r6, [r4, #16]
    hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8006ed8:	6166      	str	r6, [r4, #20]
    hdma_usart2_rx.Init.Mode = DMA_NORMAL;
 8006eda:	61a6      	str	r6, [r4, #24]
    hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW;
 8006edc:	61e6      	str	r6, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
 8006ede:	f7fe f9ab 	bl	8005238 <HAL_DMA_Init>
 8006ee2:	b108      	cbz	r0, 8006ee8 <HAL_UART_MspInit+0x188>
      Error_Handler();
 8006ee4:	f7ff fe7a 	bl	8006bdc <Error_Handler>
    __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx);
 8006ee8:	636c      	str	r4, [r5, #52]	; 0x34
 8006eea:	6265      	str	r5, [r4, #36]	; 0x24
    hdma_usart2_tx.Instance = DMA1_Channel7;
 8006eec:	4b0d      	ldr	r3, [pc, #52]	; (8006f24 <HAL_UART_MspInit+0x1c4>)
 8006eee:	4c0e      	ldr	r4, [pc, #56]	; (8006f28 <HAL_UART_MspInit+0x1c8>)
 8006ef0:	e7ac      	b.n	8006e4c <HAL_UART_MspInit+0xec>
 8006ef2:	bf00      	nop
 8006ef4:	40004c00 	.word	0x40004c00
 8006ef8:	40021000 	.word	0x40021000
 8006efc:	40011000 	.word	0x40011000
 8006f00:	40013800 	.word	0x40013800
 8006f04:	40010800 	.word	0x40010800
 8006f08:	2000056c 	.word	0x2000056c
 8006f0c:	40020058 	.word	0x40020058
 8006f10:	40020044 	.word	0x40020044
 8006f14:	200004c8 	.word	0x200004c8
 8006f18:	40004400 	.word	0x40004400
 8006f1c:	20000454 	.word	0x20000454
 8006f20:	4002006c 	.word	0x4002006c
 8006f24:	40020080 	.word	0x40020080
 8006f28:	200005b0 	.word	0x200005b0

08006f2c <NMI_Handler>:
 8006f2c:	4770      	bx	lr

08006f2e <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8006f2e:	e7fe      	b.n	8006f2e <HardFault_Handler>

08006f30 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8006f30:	e7fe      	b.n	8006f30 <MemManage_Handler>

08006f32 <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8006f32:	e7fe      	b.n	8006f32 <BusFault_Handler>

08006f34 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8006f34:	e7fe      	b.n	8006f34 <UsageFault_Handler>

08006f36 <SVC_Handler>:
 8006f36:	4770      	bx	lr

08006f38 <DebugMon_Handler>:
 8006f38:	4770      	bx	lr

08006f3a <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 8006f3a:	4770      	bx	lr

08006f3c <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 8006f3c:	f7fd be42 	b.w	8004bc4 <HAL_IncTick>

08006f40 <DMA1_Channel1_IRQHandler>:
void DMA1_Channel1_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */

  /* USER CODE END DMA1_Channel1_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_adc1);
 8006f40:	4801      	ldr	r0, [pc, #4]	; (8006f48 <DMA1_Channel1_IRQHandler+0x8>)
 8006f42:	f7fe ba65 	b.w	8005410 <HAL_DMA_IRQHandler>
 8006f46:	bf00      	nop
 8006f48:	20000634 	.word	0x20000634

08006f4c <DMA1_Channel4_IRQHandler>:
void DMA1_Channel4_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */

  /* USER CODE END DMA1_Channel4_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_tx);
 8006f4c:	4801      	ldr	r0, [pc, #4]	; (8006f54 <DMA1_Channel4_IRQHandler+0x8>)
 8006f4e:	f7fe ba5f 	b.w	8005410 <HAL_DMA_IRQHandler>
 8006f52:	bf00      	nop
 8006f54:	200004c8 	.word	0x200004c8

08006f58 <DMA1_Channel5_IRQHandler>:
void DMA1_Channel5_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */

  /* USER CODE END DMA1_Channel5_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_rx);
 8006f58:	4801      	ldr	r0, [pc, #4]	; (8006f60 <DMA1_Channel5_IRQHandler+0x8>)
 8006f5a:	f7fe ba59 	b.w	8005410 <HAL_DMA_IRQHandler>
 8006f5e:	bf00      	nop
 8006f60:	2000056c 	.word	0x2000056c

08006f64 <DMA1_Channel6_IRQHandler>:
void DMA1_Channel6_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */

  /* USER CODE END DMA1_Channel6_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart2_rx);
 8006f64:	4801      	ldr	r0, [pc, #4]	; (8006f6c <DMA1_Channel6_IRQHandler+0x8>)
 8006f66:	f7fe ba53 	b.w	8005410 <HAL_DMA_IRQHandler>
 8006f6a:	bf00      	nop
 8006f6c:	20000454 	.word	0x20000454

08006f70 <DMA1_Channel7_IRQHandler>:
void DMA1_Channel7_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */

  /* USER CODE END DMA1_Channel7_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart2_tx);
 8006f70:	4801      	ldr	r0, [pc, #4]	; (8006f78 <DMA1_Channel7_IRQHandler+0x8>)
 8006f72:	f7fe ba4d 	b.w	8005410 <HAL_DMA_IRQHandler>
 8006f76:	bf00      	nop
 8006f78:	200005b0 	.word	0x200005b0

08006f7c <ADC1_2_IRQHandler>:

/**
  * @brief This function handles ADC1 and ADC2 global interrupts.
  */
void ADC1_2_IRQHandler(void)
{
 8006f7c:	b508      	push	{r3, lr}
  /* USER CODE BEGIN ADC1_2_IRQn 0 */

  /* USER CODE END ADC1_2_IRQn 0 */
  HAL_ADC_IRQHandler(&hadc1);
 8006f7e:	4804      	ldr	r0, [pc, #16]	; (8006f90 <ADC1_2_IRQHandler+0x14>)
 8006f80:	f7fd fe73 	bl	8004c6a <HAL_ADC_IRQHandler>
  HAL_ADC_IRQHandler(&hadc2);
  /* USER CODE BEGIN ADC1_2_IRQn 1 */

  /* USER CODE END ADC1_2_IRQn 1 */
}
 8006f84:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
  HAL_ADC_IRQHandler(&hadc2);
 8006f88:	4802      	ldr	r0, [pc, #8]	; (8006f94 <ADC1_2_IRQHandler+0x18>)
 8006f8a:	f7fd be6e 	b.w	8004c6a <HAL_ADC_IRQHandler>
 8006f8e:	bf00      	nop
 8006f90:	2000050c 	.word	0x2000050c
 8006f94:	20000498 	.word	0x20000498

08006f98 <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8006f98:	4801      	ldr	r0, [pc, #4]	; (8006fa0 <USART1_IRQHandler+0x8>)
 8006f9a:	f7ff ba7b 	b.w	8006494 <HAL_UART_IRQHandler>
 8006f9e:	bf00      	nop
 8006fa0:	200005f4 	.word	0x200005f4

08006fa4 <USART2_IRQHandler>:
void USART2_IRQHandler(void)
{
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 8006fa4:	4801      	ldr	r0, [pc, #4]	; (8006fac <USART2_IRQHandler+0x8>)
 8006fa6:	f7ff ba75 	b.w	8006494 <HAL_UART_IRQHandler>
 8006faa:	bf00      	nop
 8006fac:	200006f8 	.word	0x200006f8

08006fb0 <ADC3_IRQHandler>:
void ADC3_IRQHandler(void)
{
  /* USER CODE BEGIN ADC3_IRQn 0 */

  /* USER CODE END ADC3_IRQn 0 */
  HAL_ADC_IRQHandler(&hadc3);
 8006fb0:	4801      	ldr	r0, [pc, #4]	; (8006fb8 <ADC3_IRQHandler+0x8>)
 8006fb2:	f7fd be5a 	b.w	8004c6a <HAL_ADC_IRQHandler>
 8006fb6:	bf00      	nop
 8006fb8:	2000053c 	.word	0x2000053c

08006fbc <UART4_IRQHandler>:
void UART4_IRQHandler(void)
{
  /* USER CODE BEGIN UART4_IRQn 0 */

  /* USER CODE END UART4_IRQn 0 */
  HAL_UART_IRQHandler(&huart4);
 8006fbc:	4801      	ldr	r0, [pc, #4]	; (8006fc4 <UART4_IRQHandler+0x8>)
 8006fbe:	f7ff ba69 	b.w	8006494 <HAL_UART_IRQHandler>
 8006fc2:	bf00      	nop
 8006fc4:	200006b8 	.word	0x200006b8

08006fc8 <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8006fc8:	4801      	ldr	r0, [pc, #4]	; (8006fd0 <TIM6_IRQHandler+0x8>)
 8006fca:	f7fe bf19 	b.w	8005e00 <HAL_TIM_IRQHandler>
 8006fce:	bf00      	nop
 8006fd0:	20000678 	.word	0x20000678

08006fd4 <_read>:
	_kill(status, -1);
	while (1) {}		/* Make sure we hang here */
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 8006fd4:	b570      	push	{r4, r5, r6, lr}
 8006fd6:	460e      	mov	r6, r1
 8006fd8:	4615      	mov	r5, r2
	int DataIdx;

	for (DataIdx = 0; DataIdx < len; DataIdx++)
 8006fda:	460c      	mov	r4, r1
 8006fdc:	1ba3      	subs	r3, r4, r6
 8006fde:	429d      	cmp	r5, r3
 8006fe0:	dc01      	bgt.n	8006fe6 <_read+0x12>
	{
		*ptr++ = __io_getchar();
	}

return len;
}
 8006fe2:	4628      	mov	r0, r5
 8006fe4:	bd70      	pop	{r4, r5, r6, pc}
		*ptr++ = __io_getchar();
 8006fe6:	f3af 8000 	nop.w
 8006fea:	f804 0b01 	strb.w	r0, [r4], #1
 8006fee:	e7f5      	b.n	8006fdc <_read+0x8>

08006ff0 <_sbrk>:
	}
	return len;
}

caddr_t _sbrk(int incr)
{
 8006ff0:	b508      	push	{r3, lr}
	extern char end asm("end");
	static char *heap_end;
	char *prev_heap_end;

	if (heap_end == 0)
 8006ff2:	4b0a      	ldr	r3, [pc, #40]	; (800701c <_sbrk+0x2c>)
{
 8006ff4:	4602      	mov	r2, r0
	if (heap_end == 0)
 8006ff6:	6819      	ldr	r1, [r3, #0]
 8006ff8:	b909      	cbnz	r1, 8006ffe <_sbrk+0xe>
		heap_end = &end;
 8006ffa:	4909      	ldr	r1, [pc, #36]	; (8007020 <_sbrk+0x30>)
 8006ffc:	6019      	str	r1, [r3, #0]

	prev_heap_end = heap_end;
	if (heap_end + incr > stack_ptr)
 8006ffe:	4669      	mov	r1, sp
	prev_heap_end = heap_end;
 8007000:	6818      	ldr	r0, [r3, #0]
	if (heap_end + incr > stack_ptr)
 8007002:	4402      	add	r2, r0
 8007004:	428a      	cmp	r2, r1
 8007006:	d906      	bls.n	8007016 <_sbrk+0x26>
	{
//		write(1, "Heap and stack collision\n", 25);
//		abort();
		errno = ENOMEM;
 8007008:	f000 f8d2 	bl	80071b0 <__errno>
 800700c:	230c      	movs	r3, #12
 800700e:	6003      	str	r3, [r0, #0]
		return (caddr_t) -1;
 8007010:	f04f 30ff 	mov.w	r0, #4294967295
 8007014:	bd08      	pop	{r3, pc}
	}

	heap_end += incr;
 8007016:	601a      	str	r2, [r3, #0]

	return (caddr_t) prev_heap_end;
}
 8007018:	bd08      	pop	{r3, pc}
 800701a:	bf00      	nop
 800701c:	2000040c 	.word	0x2000040c
 8007020:	20000f54 	.word	0x20000f54

08007024 <_close>:

int _close(int file)
{
	return -1;
}
 8007024:	f04f 30ff 	mov.w	r0, #4294967295
 8007028:	4770      	bx	lr

0800702a <_fstat>:


int _fstat(int file, struct stat *st)
{
	st->st_mode = S_IFCHR;
 800702a:	f44f 5300 	mov.w	r3, #8192	; 0x2000
	return 0;
}
 800702e:	2000      	movs	r0, #0
	st->st_mode = S_IFCHR;
 8007030:	604b      	str	r3, [r1, #4]
}
 8007032:	4770      	bx	lr

08007034 <_isatty>:

int _isatty(int file)
{
	return 1;
}
 8007034:	2001      	movs	r0, #1
 8007036:	4770      	bx	lr

08007038 <_lseek>:

int _lseek(int file, int ptr, int dir)
{
	return 0;
}
 8007038:	2000      	movs	r0, #0
 800703a:	4770      	bx	lr

0800703c <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 800703c:	4b0e      	ldr	r3, [pc, #56]	; (8007078 <SystemInit+0x3c>)
 800703e:	681a      	ldr	r2, [r3, #0]
 8007040:	f042 0201 	orr.w	r2, r2, #1
 8007044:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8007046:	6859      	ldr	r1, [r3, #4]
 8007048:	4a0c      	ldr	r2, [pc, #48]	; (800707c <SystemInit+0x40>)
 800704a:	400a      	ands	r2, r1
 800704c:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 800704e:	681a      	ldr	r2, [r3, #0]
 8007050:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8007054:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8007058:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 800705a:	681a      	ldr	r2, [r3, #0]
 800705c:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8007060:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 8007062:	685a      	ldr	r2, [r3, #4]
 8007064:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8007068:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 800706a:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 800706e:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 8007070:	4a03      	ldr	r2, [pc, #12]	; (8007080 <SystemInit+0x44>)
 8007072:	4b04      	ldr	r3, [pc, #16]	; (8007084 <SystemInit+0x48>)
 8007074:	609a      	str	r2, [r3, #8]
 8007076:	4770      	bx	lr
 8007078:	40021000 	.word	0x40021000
 800707c:	f8ff0000 	.word	0xf8ff0000
 8007080:	08004000 	.word	0x08004000
 8007084:	e000ed00 	.word	0xe000ed00

08007088 <InitUartQueue>:
UARTQUEUE TerminalQueue;
UARTQUEUE WifiQueue;
void InitUartQueue(UART_HandleTypeDef *huart,pUARTQUEUE pQueue)
{
    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
    pQueue->data = pQueue->head = pQueue->tail = 0;
 8007088:	2300      	movs	r3, #0
{
 800708a:	b430      	push	{r4, r5}
    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
 800708c:	6805      	ldr	r5, [r0, #0]

    if (HAL_UART_Receive_DMA(dst, pQueue->Buffer, 1) != HAL_OK)
 800708e:	4c07      	ldr	r4, [pc, #28]	; (80070ac <InitUartQueue+0x24>)
    pQueue->data = pQueue->head = pQueue->tail = 0;
 8007090:	604b      	str	r3, [r1, #4]
 8007092:	600b      	str	r3, [r1, #0]
 8007094:	608b      	str	r3, [r1, #8]
    if (HAL_UART_Receive_DMA(dst, pQueue->Buffer, 1) != HAL_OK)
 8007096:	4806      	ldr	r0, [pc, #24]	; (80070b0 <InitUartQueue+0x28>)
 8007098:	4b06      	ldr	r3, [pc, #24]	; (80070b4 <InitUartQueue+0x2c>)
 800709a:	2201      	movs	r2, #1
 800709c:	4285      	cmp	r5, r0
 800709e:	bf0c      	ite	eq
 80070a0:	4620      	moveq	r0, r4
 80070a2:	4618      	movne	r0, r3
    {
//      _Error_Handler(__FILE__, __LINE__);
    }
    //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
    //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
}
 80070a4:	bc30      	pop	{r4, r5}
    if (HAL_UART_Receive_DMA(dst, pQueue->Buffer, 1) != HAL_OK)
 80070a6:	310c      	adds	r1, #12
 80070a8:	f7ff b906 	b.w	80062b8 <HAL_UART_Receive_DMA>
 80070ac:	200006f8 	.word	0x200006f8
 80070b0:	40004400 	.word	0x40004400
 80070b4:	200005f4 	.word	0x200005f4

080070b8 <GetDataFromUartQueue>:
    if (pQueue->head == QUEUE_BUFFER_LENGTH) pQueue->head = 0;
    pQueue->data++;
   // HAL_UART_Receive_DMA(&hTerminal,  pQueue->Buffer + pQueue->head, 10);
}
void GetDataFromUartQueue(UART_HandleTypeDef *huart)
{
 80070b8:	b510      	push	{r4, lr}
    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
    pUARTQUEUE pQueue = (huart->Instance == USART2 ? &WifiQueue:&TerminalQueue);
 80070ba:	6801      	ldr	r1, [r0, #0]
 80070bc:	4b0a      	ldr	r3, [pc, #40]	; (80070e8 <GetDataFromUartQueue+0x30>)
 80070be:	4a0b      	ldr	r2, [pc, #44]	; (80070ec <GetDataFromUartQueue+0x34>)
 80070c0:	4c0b      	ldr	r4, [pc, #44]	; (80070f0 <GetDataFromUartQueue+0x38>)
 80070c2:	4291      	cmp	r1, r2
 80070c4:	bf18      	it	ne
 80070c6:	461c      	movne	r4, r3
//    printf("Function : %s : ",__func__);
//    if (HAL_UART_Transmit_DMA(dst, pQueue->Buffer + pQueue->tail, 1) != HAL_OK)
    printf("%c",*(pQueue->Buffer + pQueue->tail));
 80070c8:	6863      	ldr	r3, [r4, #4]
 80070ca:	4423      	add	r3, r4
 80070cc:	7b18      	ldrb	r0, [r3, #12]
 80070ce:	f000 fd1b 	bl	8007b08 <putchar>
    //if (HAL_UART_Transmit_DMA(&hTerminal, pQueue->Buffer + pQueue->tail, 1) != HAL_OK)
    //{
//       _Error_Handler(__FILE__, __LINE__);
    //}
//    printf("\r\n");
    pQueue->tail++;
 80070d2:	6863      	ldr	r3, [r4, #4]
 80070d4:	3301      	adds	r3, #1
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 80070d6:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
 80070da:	bfa8      	it	ge
 80070dc:	2300      	movge	r3, #0
 80070de:	6063      	str	r3, [r4, #4]
    pQueue->data--;
 80070e0:	68a3      	ldr	r3, [r4, #8]
 80070e2:	3b01      	subs	r3, #1
 80070e4:	60a3      	str	r3, [r4, #8]
 80070e6:	bd10      	pop	{r4, pc}
 80070e8:	20000738 	.word	0x20000738
 80070ec:	40004400 	.word	0x40004400
 80070f0:	20000b44 	.word	0x20000b44

080070f4 <HAL_UART_RxCpltCallback>:
{
 80070f4:	b538      	push	{r3, r4, r5, lr}
    pUARTQUEUE pQueue = (huart->Instance == USART2 ? &WifiQueue:&TerminalQueue);
 80070f6:	6802      	ldr	r2, [r0, #0]
 80070f8:	4b11      	ldr	r3, [pc, #68]	; (8007140 <HAL_UART_RxCpltCallback+0x4c>)
 80070fa:	4c12      	ldr	r4, [pc, #72]	; (8007144 <HAL_UART_RxCpltCallback+0x50>)
 80070fc:	429a      	cmp	r2, r3
 80070fe:	4b12      	ldr	r3, [pc, #72]	; (8007148 <HAL_UART_RxCpltCallback+0x54>)
 8007100:	4d12      	ldr	r5, [pc, #72]	; (800714c <HAL_UART_RxCpltCallback+0x58>)
 8007102:	bf08      	it	eq
 8007104:	461c      	moveq	r4, r3
 8007106:	4b12      	ldr	r3, [pc, #72]	; (8007150 <HAL_UART_RxCpltCallback+0x5c>)
 8007108:	bf08      	it	eq
 800710a:	461d      	moveq	r5, r3
    pQueue->head++;
 800710c:	6823      	ldr	r3, [r4, #0]
 800710e:	3301      	adds	r3, #1
    if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0;
 8007110:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
 8007114:	bfa8      	it	ge
 8007116:	2300      	movge	r3, #0
 8007118:	6023      	str	r3, [r4, #0]
    pQueue->data++;
 800711a:	68a3      	ldr	r3, [r4, #8]
 800711c:	3301      	adds	r3, #1
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 800711e:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
    pQueue->data++;
 8007122:	60a3      	str	r3, [r4, #8]
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 8007124:	db01      	blt.n	800712a <HAL_UART_RxCpltCallback+0x36>
        GetDataFromUartQueue(huart);
 8007126:	f7ff ffc7 	bl	80070b8 <GetDataFromUartQueue>
    HAL_UART_Receive_DMA(dst, pQueue->Buffer + pQueue->head, 1);
 800712a:	6823      	ldr	r3, [r4, #0]
 800712c:	f104 010c 	add.w	r1, r4, #12
 8007130:	4419      	add	r1, r3
 8007132:	4628      	mov	r0, r5
}
 8007134:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
    HAL_UART_Receive_DMA(dst, pQueue->Buffer + pQueue->head, 1);
 8007138:	2201      	movs	r2, #1
 800713a:	f7ff b8bd 	b.w	80062b8 <HAL_UART_Receive_DMA>
 800713e:	bf00      	nop
 8007140:	40004400 	.word	0x40004400
 8007144:	20000738 	.word	0x20000738
 8007148:	20000b44 	.word	0x20000b44
 800714c:	200005f4 	.word	0x200005f4
 8007150:	200006f8 	.word	0x200006f8

08007154 <Uart2_Data_Send>:
}
void Uart1_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit_DMA(&huart1, data,size); 
}
void Uart2_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit_DMA(&huart2, data,size); 
 8007154:	460a      	mov	r2, r1
 8007156:	4601      	mov	r1, r0
 8007158:	4801      	ldr	r0, [pc, #4]	; (8007160 <Uart2_Data_Send+0xc>)
 800715a:	f7ff b873 	b.w	8006244 <HAL_UART_Transmit_DMA>
 800715e:	bf00      	nop
 8007160:	200006f8 	.word	0x200006f8

08007164 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8007164:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8007166:	e003      	b.n	8007170 <LoopCopyDataInit>

08007168 <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8007168:	4b0b      	ldr	r3, [pc, #44]	; (8007198 <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 800716a:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 800716c:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 800716e:	3104      	adds	r1, #4

08007170 <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 8007170:	480a      	ldr	r0, [pc, #40]	; (800719c <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 8007172:	4b0b      	ldr	r3, [pc, #44]	; (80071a0 <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8007174:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8007176:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8007178:	d3f6      	bcc.n	8007168 <CopyDataInit>
  ldr r2, =_sbss
 800717a:	4a0a      	ldr	r2, [pc, #40]	; (80071a4 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 800717c:	e002      	b.n	8007184 <LoopFillZerobss>

0800717e <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 800717e:	2300      	movs	r3, #0
  str r3, [r2], #4
 8007180:	f842 3b04 	str.w	r3, [r2], #4

08007184 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8007184:	4b08      	ldr	r3, [pc, #32]	; (80071a8 <LoopFillZerobss+0x24>)
  cmp r2, r3
 8007186:	429a      	cmp	r2, r3
  bcc FillZerobss
 8007188:	d3f9      	bcc.n	800717e <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 800718a:	f7ff ff57 	bl	800703c <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 800718e:	f000 f815 	bl	80071bc <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 8007192:	f7ff fafd 	bl	8006790 <main>
  bx lr
 8007196:	4770      	bx	lr
  ldr r3, =_sidata
 8007198:	08009f68 	.word	0x08009f68
  ldr r0, =_sdata
 800719c:	20000000 	.word	0x20000000
  ldr r3, =_edata
 80071a0:	200003dc 	.word	0x200003dc
  ldr r2, =_sbss
 80071a4:	200003dc 	.word	0x200003dc
  ldr r3, = _ebss
 80071a8:	20000f54 	.word	0x20000f54

080071ac <CAN1_RX1_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 80071ac:	e7fe      	b.n	80071ac <CAN1_RX1_IRQHandler>
	...

080071b0 <__errno>:
 80071b0:	4b01      	ldr	r3, [pc, #4]	; (80071b8 <__errno+0x8>)
 80071b2:	6818      	ldr	r0, [r3, #0]
 80071b4:	4770      	bx	lr
 80071b6:	bf00      	nop
 80071b8:	2000020c 	.word	0x2000020c

080071bc <__libc_init_array>:
 80071bc:	b570      	push	{r4, r5, r6, lr}
 80071be:	2500      	movs	r5, #0
 80071c0:	4e0c      	ldr	r6, [pc, #48]	; (80071f4 <__libc_init_array+0x38>)
 80071c2:	4c0d      	ldr	r4, [pc, #52]	; (80071f8 <__libc_init_array+0x3c>)
 80071c4:	1ba4      	subs	r4, r4, r6
 80071c6:	10a4      	asrs	r4, r4, #2
 80071c8:	42a5      	cmp	r5, r4
 80071ca:	d109      	bne.n	80071e0 <__libc_init_array+0x24>
 80071cc:	f002 fcd6 	bl	8009b7c <_init>
 80071d0:	2500      	movs	r5, #0
 80071d2:	4e0a      	ldr	r6, [pc, #40]	; (80071fc <__libc_init_array+0x40>)
 80071d4:	4c0a      	ldr	r4, [pc, #40]	; (8007200 <__libc_init_array+0x44>)
 80071d6:	1ba4      	subs	r4, r4, r6
 80071d8:	10a4      	asrs	r4, r4, #2
 80071da:	42a5      	cmp	r5, r4
 80071dc:	d105      	bne.n	80071ea <__libc_init_array+0x2e>
 80071de:	bd70      	pop	{r4, r5, r6, pc}
 80071e0:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 80071e4:	4798      	blx	r3
 80071e6:	3501      	adds	r5, #1
 80071e8:	e7ee      	b.n	80071c8 <__libc_init_array+0xc>
 80071ea:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 80071ee:	4798      	blx	r3
 80071f0:	3501      	adds	r5, #1
 80071f2:	e7f2      	b.n	80071da <__libc_init_array+0x1e>
 80071f4:	08009f60 	.word	0x08009f60
 80071f8:	08009f60 	.word	0x08009f60
 80071fc:	08009f60 	.word	0x08009f60
 8007200:	08009f64 	.word	0x08009f64

08007204 <memset>:
 8007204:	4603      	mov	r3, r0
 8007206:	4402      	add	r2, r0
 8007208:	4293      	cmp	r3, r2
 800720a:	d100      	bne.n	800720e <memset+0xa>
 800720c:	4770      	bx	lr
 800720e:	f803 1b01 	strb.w	r1, [r3], #1
 8007212:	e7f9      	b.n	8007208 <memset+0x4>

08007214 <__cvt>:
 8007214:	2b00      	cmp	r3, #0
 8007216:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800721a:	461e      	mov	r6, r3
 800721c:	bfbb      	ittet	lt
 800721e:	f103 4300 	addlt.w	r3, r3, #2147483648	; 0x80000000
 8007222:	461e      	movlt	r6, r3
 8007224:	2300      	movge	r3, #0
 8007226:	232d      	movlt	r3, #45	; 0x2d
 8007228:	b088      	sub	sp, #32
 800722a:	9f14      	ldr	r7, [sp, #80]	; 0x50
 800722c:	9912      	ldr	r1, [sp, #72]	; 0x48
 800722e:	f027 0720 	bic.w	r7, r7, #32
 8007232:	2f46      	cmp	r7, #70	; 0x46
 8007234:	4614      	mov	r4, r2
 8007236:	9d10      	ldr	r5, [sp, #64]	; 0x40
 8007238:	f8dd a04c 	ldr.w	sl, [sp, #76]	; 0x4c
 800723c:	700b      	strb	r3, [r1, #0]
 800723e:	d004      	beq.n	800724a <__cvt+0x36>
 8007240:	2f45      	cmp	r7, #69	; 0x45
 8007242:	d100      	bne.n	8007246 <__cvt+0x32>
 8007244:	3501      	adds	r5, #1
 8007246:	2302      	movs	r3, #2
 8007248:	e000      	b.n	800724c <__cvt+0x38>
 800724a:	2303      	movs	r3, #3
 800724c:	aa07      	add	r2, sp, #28
 800724e:	9204      	str	r2, [sp, #16]
 8007250:	aa06      	add	r2, sp, #24
 8007252:	9203      	str	r2, [sp, #12]
 8007254:	e88d 0428 	stmia.w	sp, {r3, r5, sl}
 8007258:	4622      	mov	r2, r4
 800725a:	4633      	mov	r3, r6
 800725c:	f000 fed0 	bl	8008000 <_dtoa_r>
 8007260:	2f47      	cmp	r7, #71	; 0x47
 8007262:	4680      	mov	r8, r0
 8007264:	d102      	bne.n	800726c <__cvt+0x58>
 8007266:	9b11      	ldr	r3, [sp, #68]	; 0x44
 8007268:	07db      	lsls	r3, r3, #31
 800726a:	d526      	bpl.n	80072ba <__cvt+0xa6>
 800726c:	2f46      	cmp	r7, #70	; 0x46
 800726e:	eb08 0905 	add.w	r9, r8, r5
 8007272:	d111      	bne.n	8007298 <__cvt+0x84>
 8007274:	f898 3000 	ldrb.w	r3, [r8]
 8007278:	2b30      	cmp	r3, #48	; 0x30
 800727a:	d10a      	bne.n	8007292 <__cvt+0x7e>
 800727c:	2200      	movs	r2, #0
 800727e:	2300      	movs	r3, #0
 8007280:	4620      	mov	r0, r4
 8007282:	4631      	mov	r1, r6
 8007284:	f7fd fbf8 	bl	8004a78 <__aeabi_dcmpeq>
 8007288:	b918      	cbnz	r0, 8007292 <__cvt+0x7e>
 800728a:	f1c5 0501 	rsb	r5, r5, #1
 800728e:	f8ca 5000 	str.w	r5, [sl]
 8007292:	f8da 3000 	ldr.w	r3, [sl]
 8007296:	4499      	add	r9, r3
 8007298:	2200      	movs	r2, #0
 800729a:	2300      	movs	r3, #0
 800729c:	4620      	mov	r0, r4
 800729e:	4631      	mov	r1, r6
 80072a0:	f7fd fbea 	bl	8004a78 <__aeabi_dcmpeq>
 80072a4:	b938      	cbnz	r0, 80072b6 <__cvt+0xa2>
 80072a6:	2230      	movs	r2, #48	; 0x30
 80072a8:	9b07      	ldr	r3, [sp, #28]
 80072aa:	4599      	cmp	r9, r3
 80072ac:	d905      	bls.n	80072ba <__cvt+0xa6>
 80072ae:	1c59      	adds	r1, r3, #1
 80072b0:	9107      	str	r1, [sp, #28]
 80072b2:	701a      	strb	r2, [r3, #0]
 80072b4:	e7f8      	b.n	80072a8 <__cvt+0x94>
 80072b6:	f8cd 901c 	str.w	r9, [sp, #28]
 80072ba:	4640      	mov	r0, r8
 80072bc:	9b07      	ldr	r3, [sp, #28]
 80072be:	9a15      	ldr	r2, [sp, #84]	; 0x54
 80072c0:	eba3 0308 	sub.w	r3, r3, r8
 80072c4:	6013      	str	r3, [r2, #0]
 80072c6:	b008      	add	sp, #32
 80072c8:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}

080072cc <__exponent>:
 80072cc:	4603      	mov	r3, r0
 80072ce:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 80072d0:	2900      	cmp	r1, #0
 80072d2:	f803 2b02 	strb.w	r2, [r3], #2
 80072d6:	bfb6      	itet	lt
 80072d8:	222d      	movlt	r2, #45	; 0x2d
 80072da:	222b      	movge	r2, #43	; 0x2b
 80072dc:	4249      	neglt	r1, r1
 80072de:	2909      	cmp	r1, #9
 80072e0:	7042      	strb	r2, [r0, #1]
 80072e2:	dd21      	ble.n	8007328 <__exponent+0x5c>
 80072e4:	f10d 0207 	add.w	r2, sp, #7
 80072e8:	4617      	mov	r7, r2
 80072ea:	260a      	movs	r6, #10
 80072ec:	fb91 f5f6 	sdiv	r5, r1, r6
 80072f0:	fb06 1115 	mls	r1, r6, r5, r1
 80072f4:	2d09      	cmp	r5, #9
 80072f6:	f101 0130 	add.w	r1, r1, #48	; 0x30
 80072fa:	f802 1c01 	strb.w	r1, [r2, #-1]
 80072fe:	f102 34ff 	add.w	r4, r2, #4294967295
 8007302:	4629      	mov	r1, r5
 8007304:	dc09      	bgt.n	800731a <__exponent+0x4e>
 8007306:	3130      	adds	r1, #48	; 0x30
 8007308:	3a02      	subs	r2, #2
 800730a:	f804 1c01 	strb.w	r1, [r4, #-1]
 800730e:	42ba      	cmp	r2, r7
 8007310:	461c      	mov	r4, r3
 8007312:	d304      	bcc.n	800731e <__exponent+0x52>
 8007314:	1a20      	subs	r0, r4, r0
 8007316:	b003      	add	sp, #12
 8007318:	bdf0      	pop	{r4, r5, r6, r7, pc}
 800731a:	4622      	mov	r2, r4
 800731c:	e7e6      	b.n	80072ec <__exponent+0x20>
 800731e:	f812 1b01 	ldrb.w	r1, [r2], #1
 8007322:	f803 1b01 	strb.w	r1, [r3], #1
 8007326:	e7f2      	b.n	800730e <__exponent+0x42>
 8007328:	2230      	movs	r2, #48	; 0x30
 800732a:	461c      	mov	r4, r3
 800732c:	4411      	add	r1, r2
 800732e:	f804 2b02 	strb.w	r2, [r4], #2
 8007332:	7059      	strb	r1, [r3, #1]
 8007334:	e7ee      	b.n	8007314 <__exponent+0x48>
	...

08007338 <_printf_float>:
 8007338:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800733c:	b091      	sub	sp, #68	; 0x44
 800733e:	460c      	mov	r4, r1
 8007340:	9f1a      	ldr	r7, [sp, #104]	; 0x68
 8007342:	4693      	mov	fp, r2
 8007344:	461e      	mov	r6, r3
 8007346:	4605      	mov	r5, r0
 8007348:	f001 fdaa 	bl	8008ea0 <_localeconv_r>
 800734c:	6803      	ldr	r3, [r0, #0]
 800734e:	4618      	mov	r0, r3
 8007350:	9309      	str	r3, [sp, #36]	; 0x24
 8007352:	f7fc ff69 	bl	8004228 <strlen>
 8007356:	2300      	movs	r3, #0
 8007358:	930e      	str	r3, [sp, #56]	; 0x38
 800735a:	683b      	ldr	r3, [r7, #0]
 800735c:	900a      	str	r0, [sp, #40]	; 0x28
 800735e:	3307      	adds	r3, #7
 8007360:	f023 0307 	bic.w	r3, r3, #7
 8007364:	f103 0208 	add.w	r2, r3, #8
 8007368:	f894 8018 	ldrb.w	r8, [r4, #24]
 800736c:	f8d4 a000 	ldr.w	sl, [r4]
 8007370:	603a      	str	r2, [r7, #0]
 8007372:	e9d3 2300 	ldrd	r2, r3, [r3]
 8007376:	e9c4 2312 	strd	r2, r3, [r4, #72]	; 0x48
 800737a:	f8d4 904c 	ldr.w	r9, [r4, #76]	; 0x4c
 800737e:	6ca7      	ldr	r7, [r4, #72]	; 0x48
 8007380:	f029 4300 	bic.w	r3, r9, #2147483648	; 0x80000000
 8007384:	930b      	str	r3, [sp, #44]	; 0x2c
 8007386:	f04f 32ff 	mov.w	r2, #4294967295
 800738a:	4ba6      	ldr	r3, [pc, #664]	; (8007624 <_printf_float+0x2ec>)
 800738c:	4638      	mov	r0, r7
 800738e:	990b      	ldr	r1, [sp, #44]	; 0x2c
 8007390:	f7fd fba4 	bl	8004adc <__aeabi_dcmpun>
 8007394:	2800      	cmp	r0, #0
 8007396:	f040 81f7 	bne.w	8007788 <_printf_float+0x450>
 800739a:	f04f 32ff 	mov.w	r2, #4294967295
 800739e:	4ba1      	ldr	r3, [pc, #644]	; (8007624 <_printf_float+0x2ec>)
 80073a0:	4638      	mov	r0, r7
 80073a2:	990b      	ldr	r1, [sp, #44]	; 0x2c
 80073a4:	f7fd fb7c 	bl	8004aa0 <__aeabi_dcmple>
 80073a8:	2800      	cmp	r0, #0
 80073aa:	f040 81ed 	bne.w	8007788 <_printf_float+0x450>
 80073ae:	2200      	movs	r2, #0
 80073b0:	2300      	movs	r3, #0
 80073b2:	4638      	mov	r0, r7
 80073b4:	4649      	mov	r1, r9
 80073b6:	f7fd fb69 	bl	8004a8c <__aeabi_dcmplt>
 80073ba:	b110      	cbz	r0, 80073c2 <_printf_float+0x8a>
 80073bc:	232d      	movs	r3, #45	; 0x2d
 80073be:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 80073c2:	4b99      	ldr	r3, [pc, #612]	; (8007628 <_printf_float+0x2f0>)
 80073c4:	4f99      	ldr	r7, [pc, #612]	; (800762c <_printf_float+0x2f4>)
 80073c6:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 80073ca:	bf98      	it	ls
 80073cc:	461f      	movls	r7, r3
 80073ce:	2303      	movs	r3, #3
 80073d0:	f04f 0900 	mov.w	r9, #0
 80073d4:	6123      	str	r3, [r4, #16]
 80073d6:	f02a 0304 	bic.w	r3, sl, #4
 80073da:	6023      	str	r3, [r4, #0]
 80073dc:	9600      	str	r6, [sp, #0]
 80073de:	465b      	mov	r3, fp
 80073e0:	aa0f      	add	r2, sp, #60	; 0x3c
 80073e2:	4621      	mov	r1, r4
 80073e4:	4628      	mov	r0, r5
 80073e6:	f000 f9df 	bl	80077a8 <_printf_common>
 80073ea:	3001      	adds	r0, #1
 80073ec:	f040 809a 	bne.w	8007524 <_printf_float+0x1ec>
 80073f0:	f04f 30ff 	mov.w	r0, #4294967295
 80073f4:	b011      	add	sp, #68	; 0x44
 80073f6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80073fa:	6862      	ldr	r2, [r4, #4]
 80073fc:	a80e      	add	r0, sp, #56	; 0x38
 80073fe:	1c53      	adds	r3, r2, #1
 8007400:	f10d 0e34 	add.w	lr, sp, #52	; 0x34
 8007404:	f44a 6380 	orr.w	r3, sl, #1024	; 0x400
 8007408:	d141      	bne.n	800748e <_printf_float+0x156>
 800740a:	2206      	movs	r2, #6
 800740c:	6062      	str	r2, [r4, #4]
 800740e:	2100      	movs	r1, #0
 8007410:	6023      	str	r3, [r4, #0]
 8007412:	9301      	str	r3, [sp, #4]
 8007414:	6863      	ldr	r3, [r4, #4]
 8007416:	f10d 0233 	add.w	r2, sp, #51	; 0x33
 800741a:	9005      	str	r0, [sp, #20]
 800741c:	9202      	str	r2, [sp, #8]
 800741e:	9300      	str	r3, [sp, #0]
 8007420:	463a      	mov	r2, r7
 8007422:	464b      	mov	r3, r9
 8007424:	9106      	str	r1, [sp, #24]
 8007426:	f8cd 8010 	str.w	r8, [sp, #16]
 800742a:	f8cd e00c 	str.w	lr, [sp, #12]
 800742e:	4628      	mov	r0, r5
 8007430:	f7ff fef0 	bl	8007214 <__cvt>
 8007434:	f008 03df 	and.w	r3, r8, #223	; 0xdf
 8007438:	2b47      	cmp	r3, #71	; 0x47
 800743a:	4607      	mov	r7, r0
 800743c:	d109      	bne.n	8007452 <_printf_float+0x11a>
 800743e:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8007440:	1cd8      	adds	r0, r3, #3
 8007442:	db02      	blt.n	800744a <_printf_float+0x112>
 8007444:	6862      	ldr	r2, [r4, #4]
 8007446:	4293      	cmp	r3, r2
 8007448:	dd59      	ble.n	80074fe <_printf_float+0x1c6>
 800744a:	f1a8 0802 	sub.w	r8, r8, #2
 800744e:	fa5f f888 	uxtb.w	r8, r8
 8007452:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 8007456:	990d      	ldr	r1, [sp, #52]	; 0x34
 8007458:	d836      	bhi.n	80074c8 <_printf_float+0x190>
 800745a:	3901      	subs	r1, #1
 800745c:	4642      	mov	r2, r8
 800745e:	f104 0050 	add.w	r0, r4, #80	; 0x50
 8007462:	910d      	str	r1, [sp, #52]	; 0x34
 8007464:	f7ff ff32 	bl	80072cc <__exponent>
 8007468:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 800746a:	4681      	mov	r9, r0
 800746c:	1883      	adds	r3, r0, r2
 800746e:	2a01      	cmp	r2, #1
 8007470:	6123      	str	r3, [r4, #16]
 8007472:	dc02      	bgt.n	800747a <_printf_float+0x142>
 8007474:	6822      	ldr	r2, [r4, #0]
 8007476:	07d1      	lsls	r1, r2, #31
 8007478:	d501      	bpl.n	800747e <_printf_float+0x146>
 800747a:	3301      	adds	r3, #1
 800747c:	6123      	str	r3, [r4, #16]
 800747e:	f89d 3033 	ldrb.w	r3, [sp, #51]	; 0x33
 8007482:	2b00      	cmp	r3, #0
 8007484:	d0aa      	beq.n	80073dc <_printf_float+0xa4>
 8007486:	232d      	movs	r3, #45	; 0x2d
 8007488:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 800748c:	e7a6      	b.n	80073dc <_printf_float+0xa4>
 800748e:	f1b8 0f67 	cmp.w	r8, #103	; 0x67
 8007492:	d002      	beq.n	800749a <_printf_float+0x162>
 8007494:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 8007498:	d1b9      	bne.n	800740e <_printf_float+0xd6>
 800749a:	b19a      	cbz	r2, 80074c4 <_printf_float+0x18c>
 800749c:	2100      	movs	r1, #0
 800749e:	9106      	str	r1, [sp, #24]
 80074a0:	f10d 0133 	add.w	r1, sp, #51	; 0x33
 80074a4:	e88d 000c 	stmia.w	sp, {r2, r3}
 80074a8:	6023      	str	r3, [r4, #0]
 80074aa:	9005      	str	r0, [sp, #20]
 80074ac:	463a      	mov	r2, r7
 80074ae:	f8cd 8010 	str.w	r8, [sp, #16]
 80074b2:	f8cd e00c 	str.w	lr, [sp, #12]
 80074b6:	9102      	str	r1, [sp, #8]
 80074b8:	464b      	mov	r3, r9
 80074ba:	4628      	mov	r0, r5
 80074bc:	f7ff feaa 	bl	8007214 <__cvt>
 80074c0:	4607      	mov	r7, r0
 80074c2:	e7bc      	b.n	800743e <_printf_float+0x106>
 80074c4:	2201      	movs	r2, #1
 80074c6:	e7a1      	b.n	800740c <_printf_float+0xd4>
 80074c8:	f1b8 0f66 	cmp.w	r8, #102	; 0x66
 80074cc:	d119      	bne.n	8007502 <_printf_float+0x1ca>
 80074ce:	2900      	cmp	r1, #0
 80074d0:	6863      	ldr	r3, [r4, #4]
 80074d2:	dd0c      	ble.n	80074ee <_printf_float+0x1b6>
 80074d4:	6121      	str	r1, [r4, #16]
 80074d6:	b913      	cbnz	r3, 80074de <_printf_float+0x1a6>
 80074d8:	6822      	ldr	r2, [r4, #0]
 80074da:	07d2      	lsls	r2, r2, #31
 80074dc:	d502      	bpl.n	80074e4 <_printf_float+0x1ac>
 80074de:	3301      	adds	r3, #1
 80074e0:	440b      	add	r3, r1
 80074e2:	6123      	str	r3, [r4, #16]
 80074e4:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 80074e6:	f04f 0900 	mov.w	r9, #0
 80074ea:	65a3      	str	r3, [r4, #88]	; 0x58
 80074ec:	e7c7      	b.n	800747e <_printf_float+0x146>
 80074ee:	b913      	cbnz	r3, 80074f6 <_printf_float+0x1be>
 80074f0:	6822      	ldr	r2, [r4, #0]
 80074f2:	07d0      	lsls	r0, r2, #31
 80074f4:	d501      	bpl.n	80074fa <_printf_float+0x1c2>
 80074f6:	3302      	adds	r3, #2
 80074f8:	e7f3      	b.n	80074e2 <_printf_float+0x1aa>
 80074fa:	2301      	movs	r3, #1
 80074fc:	e7f1      	b.n	80074e2 <_printf_float+0x1aa>
 80074fe:	f04f 0867 	mov.w	r8, #103	; 0x67
 8007502:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8007504:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8007506:	4293      	cmp	r3, r2
 8007508:	db05      	blt.n	8007516 <_printf_float+0x1de>
 800750a:	6822      	ldr	r2, [r4, #0]
 800750c:	6123      	str	r3, [r4, #16]
 800750e:	07d1      	lsls	r1, r2, #31
 8007510:	d5e8      	bpl.n	80074e4 <_printf_float+0x1ac>
 8007512:	3301      	adds	r3, #1
 8007514:	e7e5      	b.n	80074e2 <_printf_float+0x1aa>
 8007516:	2b00      	cmp	r3, #0
 8007518:	bfcc      	ite	gt
 800751a:	2301      	movgt	r3, #1
 800751c:	f1c3 0302 	rsble	r3, r3, #2
 8007520:	4413      	add	r3, r2
 8007522:	e7de      	b.n	80074e2 <_printf_float+0x1aa>
 8007524:	6823      	ldr	r3, [r4, #0]
 8007526:	055a      	lsls	r2, r3, #21
 8007528:	d407      	bmi.n	800753a <_printf_float+0x202>
 800752a:	6923      	ldr	r3, [r4, #16]
 800752c:	463a      	mov	r2, r7
 800752e:	4659      	mov	r1, fp
 8007530:	4628      	mov	r0, r5
 8007532:	47b0      	blx	r6
 8007534:	3001      	adds	r0, #1
 8007536:	d12a      	bne.n	800758e <_printf_float+0x256>
 8007538:	e75a      	b.n	80073f0 <_printf_float+0xb8>
 800753a:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 800753e:	f240 80dc 	bls.w	80076fa <_printf_float+0x3c2>
 8007542:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 8007546:	2200      	movs	r2, #0
 8007548:	2300      	movs	r3, #0
 800754a:	f7fd fa95 	bl	8004a78 <__aeabi_dcmpeq>
 800754e:	2800      	cmp	r0, #0
 8007550:	d039      	beq.n	80075c6 <_printf_float+0x28e>
 8007552:	2301      	movs	r3, #1
 8007554:	4a36      	ldr	r2, [pc, #216]	; (8007630 <_printf_float+0x2f8>)
 8007556:	4659      	mov	r1, fp
 8007558:	4628      	mov	r0, r5
 800755a:	47b0      	blx	r6
 800755c:	3001      	adds	r0, #1
 800755e:	f43f af47 	beq.w	80073f0 <_printf_float+0xb8>
 8007562:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8007564:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8007566:	429a      	cmp	r2, r3
 8007568:	db02      	blt.n	8007570 <_printf_float+0x238>
 800756a:	6823      	ldr	r3, [r4, #0]
 800756c:	07d8      	lsls	r0, r3, #31
 800756e:	d50e      	bpl.n	800758e <_printf_float+0x256>
 8007570:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8007572:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8007574:	4659      	mov	r1, fp
 8007576:	4628      	mov	r0, r5
 8007578:	47b0      	blx	r6
 800757a:	3001      	adds	r0, #1
 800757c:	f43f af38 	beq.w	80073f0 <_printf_float+0xb8>
 8007580:	2700      	movs	r7, #0
 8007582:	f104 081a 	add.w	r8, r4, #26
 8007586:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8007588:	3b01      	subs	r3, #1
 800758a:	429f      	cmp	r7, r3
 800758c:	db11      	blt.n	80075b2 <_printf_float+0x27a>
 800758e:	6823      	ldr	r3, [r4, #0]
 8007590:	079f      	lsls	r7, r3, #30
 8007592:	d508      	bpl.n	80075a6 <_printf_float+0x26e>
 8007594:	2700      	movs	r7, #0
 8007596:	f104 0819 	add.w	r8, r4, #25
 800759a:	68e3      	ldr	r3, [r4, #12]
 800759c:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
 800759e:	1a9b      	subs	r3, r3, r2
 80075a0:	429f      	cmp	r7, r3
 80075a2:	f2c0 80e7 	blt.w	8007774 <_printf_float+0x43c>
 80075a6:	68e0      	ldr	r0, [r4, #12]
 80075a8:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
 80075aa:	4298      	cmp	r0, r3
 80075ac:	bfb8      	it	lt
 80075ae:	4618      	movlt	r0, r3
 80075b0:	e720      	b.n	80073f4 <_printf_float+0xbc>
 80075b2:	2301      	movs	r3, #1
 80075b4:	4642      	mov	r2, r8
 80075b6:	4659      	mov	r1, fp
 80075b8:	4628      	mov	r0, r5
 80075ba:	47b0      	blx	r6
 80075bc:	3001      	adds	r0, #1
 80075be:	f43f af17 	beq.w	80073f0 <_printf_float+0xb8>
 80075c2:	3701      	adds	r7, #1
 80075c4:	e7df      	b.n	8007586 <_printf_float+0x24e>
 80075c6:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 80075c8:	2b00      	cmp	r3, #0
 80075ca:	dc33      	bgt.n	8007634 <_printf_float+0x2fc>
 80075cc:	2301      	movs	r3, #1
 80075ce:	4a18      	ldr	r2, [pc, #96]	; (8007630 <_printf_float+0x2f8>)
 80075d0:	4659      	mov	r1, fp
 80075d2:	4628      	mov	r0, r5
 80075d4:	47b0      	blx	r6
 80075d6:	3001      	adds	r0, #1
 80075d8:	f43f af0a 	beq.w	80073f0 <_printf_float+0xb8>
 80075dc:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 80075de:	b923      	cbnz	r3, 80075ea <_printf_float+0x2b2>
 80075e0:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 80075e2:	b913      	cbnz	r3, 80075ea <_printf_float+0x2b2>
 80075e4:	6823      	ldr	r3, [r4, #0]
 80075e6:	07d9      	lsls	r1, r3, #31
 80075e8:	d5d1      	bpl.n	800758e <_printf_float+0x256>
 80075ea:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 80075ec:	9a09      	ldr	r2, [sp, #36]	; 0x24
 80075ee:	4659      	mov	r1, fp
 80075f0:	4628      	mov	r0, r5
 80075f2:	47b0      	blx	r6
 80075f4:	3001      	adds	r0, #1
 80075f6:	f43f aefb 	beq.w	80073f0 <_printf_float+0xb8>
 80075fa:	f04f 0800 	mov.w	r8, #0
 80075fe:	f104 091a 	add.w	r9, r4, #26
 8007602:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8007604:	425b      	negs	r3, r3
 8007606:	4598      	cmp	r8, r3
 8007608:	db01      	blt.n	800760e <_printf_float+0x2d6>
 800760a:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800760c:	e78e      	b.n	800752c <_printf_float+0x1f4>
 800760e:	2301      	movs	r3, #1
 8007610:	464a      	mov	r2, r9
 8007612:	4659      	mov	r1, fp
 8007614:	4628      	mov	r0, r5
 8007616:	47b0      	blx	r6
 8007618:	3001      	adds	r0, #1
 800761a:	f43f aee9 	beq.w	80073f0 <_printf_float+0xb8>
 800761e:	f108 0801 	add.w	r8, r8, #1
 8007622:	e7ee      	b.n	8007602 <_printf_float+0x2ca>
 8007624:	7fefffff 	.word	0x7fefffff
 8007628:	08009ca0 	.word	0x08009ca0
 800762c:	08009ca4 	.word	0x08009ca4
 8007630:	08009cb0 	.word	0x08009cb0
 8007634:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8007636:	6da3      	ldr	r3, [r4, #88]	; 0x58
 8007638:	429a      	cmp	r2, r3
 800763a:	bfa8      	it	ge
 800763c:	461a      	movge	r2, r3
 800763e:	2a00      	cmp	r2, #0
 8007640:	4690      	mov	r8, r2
 8007642:	dc36      	bgt.n	80076b2 <_printf_float+0x37a>
 8007644:	f04f 0a00 	mov.w	sl, #0
 8007648:	f104 031a 	add.w	r3, r4, #26
 800764c:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 8007650:	930b      	str	r3, [sp, #44]	; 0x2c
 8007652:	f8d4 9058 	ldr.w	r9, [r4, #88]	; 0x58
 8007656:	eba9 0308 	sub.w	r3, r9, r8
 800765a:	459a      	cmp	sl, r3
 800765c:	db31      	blt.n	80076c2 <_printf_float+0x38a>
 800765e:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8007660:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8007662:	429a      	cmp	r2, r3
 8007664:	db38      	blt.n	80076d8 <_printf_float+0x3a0>
 8007666:	6823      	ldr	r3, [r4, #0]
 8007668:	07da      	lsls	r2, r3, #31
 800766a:	d435      	bmi.n	80076d8 <_printf_float+0x3a0>
 800766c:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800766e:	990d      	ldr	r1, [sp, #52]	; 0x34
 8007670:	eba3 0209 	sub.w	r2, r3, r9
 8007674:	eba3 0801 	sub.w	r8, r3, r1
 8007678:	4590      	cmp	r8, r2
 800767a:	bfa8      	it	ge
 800767c:	4690      	movge	r8, r2
 800767e:	f1b8 0f00 	cmp.w	r8, #0
 8007682:	dc31      	bgt.n	80076e8 <_printf_float+0x3b0>
 8007684:	2700      	movs	r7, #0
 8007686:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 800768a:	f104 091a 	add.w	r9, r4, #26
 800768e:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8007690:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8007692:	1a9b      	subs	r3, r3, r2
 8007694:	eba3 0308 	sub.w	r3, r3, r8
 8007698:	429f      	cmp	r7, r3
 800769a:	f6bf af78 	bge.w	800758e <_printf_float+0x256>
 800769e:	2301      	movs	r3, #1
 80076a0:	464a      	mov	r2, r9
 80076a2:	4659      	mov	r1, fp
 80076a4:	4628      	mov	r0, r5
 80076a6:	47b0      	blx	r6
 80076a8:	3001      	adds	r0, #1
 80076aa:	f43f aea1 	beq.w	80073f0 <_printf_float+0xb8>
 80076ae:	3701      	adds	r7, #1
 80076b0:	e7ed      	b.n	800768e <_printf_float+0x356>
 80076b2:	4613      	mov	r3, r2
 80076b4:	4659      	mov	r1, fp
 80076b6:	463a      	mov	r2, r7
 80076b8:	4628      	mov	r0, r5
 80076ba:	47b0      	blx	r6
 80076bc:	3001      	adds	r0, #1
 80076be:	d1c1      	bne.n	8007644 <_printf_float+0x30c>
 80076c0:	e696      	b.n	80073f0 <_printf_float+0xb8>
 80076c2:	2301      	movs	r3, #1
 80076c4:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
 80076c6:	4659      	mov	r1, fp
 80076c8:	4628      	mov	r0, r5
 80076ca:	47b0      	blx	r6
 80076cc:	3001      	adds	r0, #1
 80076ce:	f43f ae8f 	beq.w	80073f0 <_printf_float+0xb8>
 80076d2:	f10a 0a01 	add.w	sl, sl, #1
 80076d6:	e7bc      	b.n	8007652 <_printf_float+0x31a>
 80076d8:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 80076da:	9a09      	ldr	r2, [sp, #36]	; 0x24
 80076dc:	4659      	mov	r1, fp
 80076de:	4628      	mov	r0, r5
 80076e0:	47b0      	blx	r6
 80076e2:	3001      	adds	r0, #1
 80076e4:	d1c2      	bne.n	800766c <_printf_float+0x334>
 80076e6:	e683      	b.n	80073f0 <_printf_float+0xb8>
 80076e8:	4643      	mov	r3, r8
 80076ea:	eb07 0209 	add.w	r2, r7, r9
 80076ee:	4659      	mov	r1, fp
 80076f0:	4628      	mov	r0, r5
 80076f2:	47b0      	blx	r6
 80076f4:	3001      	adds	r0, #1
 80076f6:	d1c5      	bne.n	8007684 <_printf_float+0x34c>
 80076f8:	e67a      	b.n	80073f0 <_printf_float+0xb8>
 80076fa:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 80076fc:	2a01      	cmp	r2, #1
 80076fe:	dc01      	bgt.n	8007704 <_printf_float+0x3cc>
 8007700:	07db      	lsls	r3, r3, #31
 8007702:	d534      	bpl.n	800776e <_printf_float+0x436>
 8007704:	2301      	movs	r3, #1
 8007706:	463a      	mov	r2, r7
 8007708:	4659      	mov	r1, fp
 800770a:	4628      	mov	r0, r5
 800770c:	47b0      	blx	r6
 800770e:	3001      	adds	r0, #1
 8007710:	f43f ae6e 	beq.w	80073f0 <_printf_float+0xb8>
 8007714:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8007716:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8007718:	4659      	mov	r1, fp
 800771a:	4628      	mov	r0, r5
 800771c:	47b0      	blx	r6
 800771e:	3001      	adds	r0, #1
 8007720:	f43f ae66 	beq.w	80073f0 <_printf_float+0xb8>
 8007724:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 8007728:	2200      	movs	r2, #0
 800772a:	2300      	movs	r3, #0
 800772c:	f7fd f9a4 	bl	8004a78 <__aeabi_dcmpeq>
 8007730:	b150      	cbz	r0, 8007748 <_printf_float+0x410>
 8007732:	2700      	movs	r7, #0
 8007734:	f104 081a 	add.w	r8, r4, #26
 8007738:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800773a:	3b01      	subs	r3, #1
 800773c:	429f      	cmp	r7, r3
 800773e:	db0c      	blt.n	800775a <_printf_float+0x422>
 8007740:	464b      	mov	r3, r9
 8007742:	f104 0250 	add.w	r2, r4, #80	; 0x50
 8007746:	e6f2      	b.n	800752e <_printf_float+0x1f6>
 8007748:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800774a:	1c7a      	adds	r2, r7, #1
 800774c:	3b01      	subs	r3, #1
 800774e:	4659      	mov	r1, fp
 8007750:	4628      	mov	r0, r5
 8007752:	47b0      	blx	r6
 8007754:	3001      	adds	r0, #1
 8007756:	d1f3      	bne.n	8007740 <_printf_float+0x408>
 8007758:	e64a      	b.n	80073f0 <_printf_float+0xb8>
 800775a:	2301      	movs	r3, #1
 800775c:	4642      	mov	r2, r8
 800775e:	4659      	mov	r1, fp
 8007760:	4628      	mov	r0, r5
 8007762:	47b0      	blx	r6
 8007764:	3001      	adds	r0, #1
 8007766:	f43f ae43 	beq.w	80073f0 <_printf_float+0xb8>
 800776a:	3701      	adds	r7, #1
 800776c:	e7e4      	b.n	8007738 <_printf_float+0x400>
 800776e:	2301      	movs	r3, #1
 8007770:	463a      	mov	r2, r7
 8007772:	e7ec      	b.n	800774e <_printf_float+0x416>
 8007774:	2301      	movs	r3, #1
 8007776:	4642      	mov	r2, r8
 8007778:	4659      	mov	r1, fp
 800777a:	4628      	mov	r0, r5
 800777c:	47b0      	blx	r6
 800777e:	3001      	adds	r0, #1
 8007780:	f43f ae36 	beq.w	80073f0 <_printf_float+0xb8>
 8007784:	3701      	adds	r7, #1
 8007786:	e708      	b.n	800759a <_printf_float+0x262>
 8007788:	463a      	mov	r2, r7
 800778a:	464b      	mov	r3, r9
 800778c:	4638      	mov	r0, r7
 800778e:	4649      	mov	r1, r9
 8007790:	f7fd f9a4 	bl	8004adc <__aeabi_dcmpun>
 8007794:	2800      	cmp	r0, #0
 8007796:	f43f ae30 	beq.w	80073fa <_printf_float+0xc2>
 800779a:	4b01      	ldr	r3, [pc, #4]	; (80077a0 <_printf_float+0x468>)
 800779c:	4f01      	ldr	r7, [pc, #4]	; (80077a4 <_printf_float+0x46c>)
 800779e:	e612      	b.n	80073c6 <_printf_float+0x8e>
 80077a0:	08009ca8 	.word	0x08009ca8
 80077a4:	08009cac 	.word	0x08009cac

080077a8 <_printf_common>:
 80077a8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80077ac:	4691      	mov	r9, r2
 80077ae:	461f      	mov	r7, r3
 80077b0:	688a      	ldr	r2, [r1, #8]
 80077b2:	690b      	ldr	r3, [r1, #16]
 80077b4:	4606      	mov	r6, r0
 80077b6:	4293      	cmp	r3, r2
 80077b8:	bfb8      	it	lt
 80077ba:	4613      	movlt	r3, r2
 80077bc:	f8c9 3000 	str.w	r3, [r9]
 80077c0:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 80077c4:	460c      	mov	r4, r1
 80077c6:	f8dd 8020 	ldr.w	r8, [sp, #32]
 80077ca:	b112      	cbz	r2, 80077d2 <_printf_common+0x2a>
 80077cc:	3301      	adds	r3, #1
 80077ce:	f8c9 3000 	str.w	r3, [r9]
 80077d2:	6823      	ldr	r3, [r4, #0]
 80077d4:	0699      	lsls	r1, r3, #26
 80077d6:	bf42      	ittt	mi
 80077d8:	f8d9 3000 	ldrmi.w	r3, [r9]
 80077dc:	3302      	addmi	r3, #2
 80077de:	f8c9 3000 	strmi.w	r3, [r9]
 80077e2:	6825      	ldr	r5, [r4, #0]
 80077e4:	f015 0506 	ands.w	r5, r5, #6
 80077e8:	d107      	bne.n	80077fa <_printf_common+0x52>
 80077ea:	f104 0a19 	add.w	sl, r4, #25
 80077ee:	68e3      	ldr	r3, [r4, #12]
 80077f0:	f8d9 2000 	ldr.w	r2, [r9]
 80077f4:	1a9b      	subs	r3, r3, r2
 80077f6:	429d      	cmp	r5, r3
 80077f8:	db2a      	blt.n	8007850 <_printf_common+0xa8>
 80077fa:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 80077fe:	6822      	ldr	r2, [r4, #0]
 8007800:	3300      	adds	r3, #0
 8007802:	bf18      	it	ne
 8007804:	2301      	movne	r3, #1
 8007806:	0692      	lsls	r2, r2, #26
 8007808:	d42f      	bmi.n	800786a <_printf_common+0xc2>
 800780a:	f104 0243 	add.w	r2, r4, #67	; 0x43
 800780e:	4639      	mov	r1, r7
 8007810:	4630      	mov	r0, r6
 8007812:	47c0      	blx	r8
 8007814:	3001      	adds	r0, #1
 8007816:	d022      	beq.n	800785e <_printf_common+0xb6>
 8007818:	6823      	ldr	r3, [r4, #0]
 800781a:	68e5      	ldr	r5, [r4, #12]
 800781c:	f003 0306 	and.w	r3, r3, #6
 8007820:	2b04      	cmp	r3, #4
 8007822:	bf18      	it	ne
 8007824:	2500      	movne	r5, #0
 8007826:	f8d9 2000 	ldr.w	r2, [r9]
 800782a:	f04f 0900 	mov.w	r9, #0
 800782e:	bf08      	it	eq
 8007830:	1aad      	subeq	r5, r5, r2
 8007832:	68a3      	ldr	r3, [r4, #8]
 8007834:	6922      	ldr	r2, [r4, #16]
 8007836:	bf08      	it	eq
 8007838:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 800783c:	4293      	cmp	r3, r2
 800783e:	bfc4      	itt	gt
 8007840:	1a9b      	subgt	r3, r3, r2
 8007842:	18ed      	addgt	r5, r5, r3
 8007844:	341a      	adds	r4, #26
 8007846:	454d      	cmp	r5, r9
 8007848:	d11b      	bne.n	8007882 <_printf_common+0xda>
 800784a:	2000      	movs	r0, #0
 800784c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8007850:	2301      	movs	r3, #1
 8007852:	4652      	mov	r2, sl
 8007854:	4639      	mov	r1, r7
 8007856:	4630      	mov	r0, r6
 8007858:	47c0      	blx	r8
 800785a:	3001      	adds	r0, #1
 800785c:	d103      	bne.n	8007866 <_printf_common+0xbe>
 800785e:	f04f 30ff 	mov.w	r0, #4294967295
 8007862:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8007866:	3501      	adds	r5, #1
 8007868:	e7c1      	b.n	80077ee <_printf_common+0x46>
 800786a:	2030      	movs	r0, #48	; 0x30
 800786c:	18e1      	adds	r1, r4, r3
 800786e:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 8007872:	1c5a      	adds	r2, r3, #1
 8007874:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 8007878:	4422      	add	r2, r4
 800787a:	3302      	adds	r3, #2
 800787c:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 8007880:	e7c3      	b.n	800780a <_printf_common+0x62>
 8007882:	2301      	movs	r3, #1
 8007884:	4622      	mov	r2, r4
 8007886:	4639      	mov	r1, r7
 8007888:	4630      	mov	r0, r6
 800788a:	47c0      	blx	r8
 800788c:	3001      	adds	r0, #1
 800788e:	d0e6      	beq.n	800785e <_printf_common+0xb6>
 8007890:	f109 0901 	add.w	r9, r9, #1
 8007894:	e7d7      	b.n	8007846 <_printf_common+0x9e>
	...

08007898 <_printf_i>:
 8007898:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 800789c:	4617      	mov	r7, r2
 800789e:	7e0a      	ldrb	r2, [r1, #24]
 80078a0:	b085      	sub	sp, #20
 80078a2:	2a6e      	cmp	r2, #110	; 0x6e
 80078a4:	4698      	mov	r8, r3
 80078a6:	4606      	mov	r6, r0
 80078a8:	460c      	mov	r4, r1
 80078aa:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 80078ac:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 80078b0:	f000 80bc 	beq.w	8007a2c <_printf_i+0x194>
 80078b4:	d81a      	bhi.n	80078ec <_printf_i+0x54>
 80078b6:	2a63      	cmp	r2, #99	; 0x63
 80078b8:	d02e      	beq.n	8007918 <_printf_i+0x80>
 80078ba:	d80a      	bhi.n	80078d2 <_printf_i+0x3a>
 80078bc:	2a00      	cmp	r2, #0
 80078be:	f000 80c8 	beq.w	8007a52 <_printf_i+0x1ba>
 80078c2:	2a58      	cmp	r2, #88	; 0x58
 80078c4:	f000 808a 	beq.w	80079dc <_printf_i+0x144>
 80078c8:	f104 0542 	add.w	r5, r4, #66	; 0x42
 80078cc:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 80078d0:	e02a      	b.n	8007928 <_printf_i+0x90>
 80078d2:	2a64      	cmp	r2, #100	; 0x64
 80078d4:	d001      	beq.n	80078da <_printf_i+0x42>
 80078d6:	2a69      	cmp	r2, #105	; 0x69
 80078d8:	d1f6      	bne.n	80078c8 <_printf_i+0x30>
 80078da:	6821      	ldr	r1, [r4, #0]
 80078dc:	681a      	ldr	r2, [r3, #0]
 80078de:	f011 0f80 	tst.w	r1, #128	; 0x80
 80078e2:	d023      	beq.n	800792c <_printf_i+0x94>
 80078e4:	1d11      	adds	r1, r2, #4
 80078e6:	6019      	str	r1, [r3, #0]
 80078e8:	6813      	ldr	r3, [r2, #0]
 80078ea:	e027      	b.n	800793c <_printf_i+0xa4>
 80078ec:	2a73      	cmp	r2, #115	; 0x73
 80078ee:	f000 80b4 	beq.w	8007a5a <_printf_i+0x1c2>
 80078f2:	d808      	bhi.n	8007906 <_printf_i+0x6e>
 80078f4:	2a6f      	cmp	r2, #111	; 0x6f
 80078f6:	d02a      	beq.n	800794e <_printf_i+0xb6>
 80078f8:	2a70      	cmp	r2, #112	; 0x70
 80078fa:	d1e5      	bne.n	80078c8 <_printf_i+0x30>
 80078fc:	680a      	ldr	r2, [r1, #0]
 80078fe:	f042 0220 	orr.w	r2, r2, #32
 8007902:	600a      	str	r2, [r1, #0]
 8007904:	e003      	b.n	800790e <_printf_i+0x76>
 8007906:	2a75      	cmp	r2, #117	; 0x75
 8007908:	d021      	beq.n	800794e <_printf_i+0xb6>
 800790a:	2a78      	cmp	r2, #120	; 0x78
 800790c:	d1dc      	bne.n	80078c8 <_printf_i+0x30>
 800790e:	2278      	movs	r2, #120	; 0x78
 8007910:	496f      	ldr	r1, [pc, #444]	; (8007ad0 <_printf_i+0x238>)
 8007912:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8007916:	e064      	b.n	80079e2 <_printf_i+0x14a>
 8007918:	681a      	ldr	r2, [r3, #0]
 800791a:	f101 0542 	add.w	r5, r1, #66	; 0x42
 800791e:	1d11      	adds	r1, r2, #4
 8007920:	6019      	str	r1, [r3, #0]
 8007922:	6813      	ldr	r3, [r2, #0]
 8007924:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8007928:	2301      	movs	r3, #1
 800792a:	e0a3      	b.n	8007a74 <_printf_i+0x1dc>
 800792c:	f011 0f40 	tst.w	r1, #64	; 0x40
 8007930:	f102 0104 	add.w	r1, r2, #4
 8007934:	6019      	str	r1, [r3, #0]
 8007936:	d0d7      	beq.n	80078e8 <_printf_i+0x50>
 8007938:	f9b2 3000 	ldrsh.w	r3, [r2]
 800793c:	2b00      	cmp	r3, #0
 800793e:	da03      	bge.n	8007948 <_printf_i+0xb0>
 8007940:	222d      	movs	r2, #45	; 0x2d
 8007942:	425b      	negs	r3, r3
 8007944:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8007948:	4962      	ldr	r1, [pc, #392]	; (8007ad4 <_printf_i+0x23c>)
 800794a:	220a      	movs	r2, #10
 800794c:	e017      	b.n	800797e <_printf_i+0xe6>
 800794e:	6820      	ldr	r0, [r4, #0]
 8007950:	6819      	ldr	r1, [r3, #0]
 8007952:	f010 0f80 	tst.w	r0, #128	; 0x80
 8007956:	d003      	beq.n	8007960 <_printf_i+0xc8>
 8007958:	1d08      	adds	r0, r1, #4
 800795a:	6018      	str	r0, [r3, #0]
 800795c:	680b      	ldr	r3, [r1, #0]
 800795e:	e006      	b.n	800796e <_printf_i+0xd6>
 8007960:	f010 0f40 	tst.w	r0, #64	; 0x40
 8007964:	f101 0004 	add.w	r0, r1, #4
 8007968:	6018      	str	r0, [r3, #0]
 800796a:	d0f7      	beq.n	800795c <_printf_i+0xc4>
 800796c:	880b      	ldrh	r3, [r1, #0]
 800796e:	2a6f      	cmp	r2, #111	; 0x6f
 8007970:	bf14      	ite	ne
 8007972:	220a      	movne	r2, #10
 8007974:	2208      	moveq	r2, #8
 8007976:	4957      	ldr	r1, [pc, #348]	; (8007ad4 <_printf_i+0x23c>)
 8007978:	2000      	movs	r0, #0
 800797a:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 800797e:	6865      	ldr	r5, [r4, #4]
 8007980:	2d00      	cmp	r5, #0
 8007982:	60a5      	str	r5, [r4, #8]
 8007984:	f2c0 809c 	blt.w	8007ac0 <_printf_i+0x228>
 8007988:	6820      	ldr	r0, [r4, #0]
 800798a:	f020 0004 	bic.w	r0, r0, #4
 800798e:	6020      	str	r0, [r4, #0]
 8007990:	2b00      	cmp	r3, #0
 8007992:	d13f      	bne.n	8007a14 <_printf_i+0x17c>
 8007994:	2d00      	cmp	r5, #0
 8007996:	f040 8095 	bne.w	8007ac4 <_printf_i+0x22c>
 800799a:	4675      	mov	r5, lr
 800799c:	2a08      	cmp	r2, #8
 800799e:	d10b      	bne.n	80079b8 <_printf_i+0x120>
 80079a0:	6823      	ldr	r3, [r4, #0]
 80079a2:	07da      	lsls	r2, r3, #31
 80079a4:	d508      	bpl.n	80079b8 <_printf_i+0x120>
 80079a6:	6923      	ldr	r3, [r4, #16]
 80079a8:	6862      	ldr	r2, [r4, #4]
 80079aa:	429a      	cmp	r2, r3
 80079ac:	bfde      	ittt	le
 80079ae:	2330      	movle	r3, #48	; 0x30
 80079b0:	f805 3c01 	strble.w	r3, [r5, #-1]
 80079b4:	f105 35ff 	addle.w	r5, r5, #4294967295
 80079b8:	ebae 0305 	sub.w	r3, lr, r5
 80079bc:	6123      	str	r3, [r4, #16]
 80079be:	f8cd 8000 	str.w	r8, [sp]
 80079c2:	463b      	mov	r3, r7
 80079c4:	aa03      	add	r2, sp, #12
 80079c6:	4621      	mov	r1, r4
 80079c8:	4630      	mov	r0, r6
 80079ca:	f7ff feed 	bl	80077a8 <_printf_common>
 80079ce:	3001      	adds	r0, #1
 80079d0:	d155      	bne.n	8007a7e <_printf_i+0x1e6>
 80079d2:	f04f 30ff 	mov.w	r0, #4294967295
 80079d6:	b005      	add	sp, #20
 80079d8:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 80079dc:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 80079e0:	493c      	ldr	r1, [pc, #240]	; (8007ad4 <_printf_i+0x23c>)
 80079e2:	6822      	ldr	r2, [r4, #0]
 80079e4:	6818      	ldr	r0, [r3, #0]
 80079e6:	f012 0f80 	tst.w	r2, #128	; 0x80
 80079ea:	f100 0504 	add.w	r5, r0, #4
 80079ee:	601d      	str	r5, [r3, #0]
 80079f0:	d001      	beq.n	80079f6 <_printf_i+0x15e>
 80079f2:	6803      	ldr	r3, [r0, #0]
 80079f4:	e002      	b.n	80079fc <_printf_i+0x164>
 80079f6:	0655      	lsls	r5, r2, #25
 80079f8:	d5fb      	bpl.n	80079f2 <_printf_i+0x15a>
 80079fa:	8803      	ldrh	r3, [r0, #0]
 80079fc:	07d0      	lsls	r0, r2, #31
 80079fe:	bf44      	itt	mi
 8007a00:	f042 0220 	orrmi.w	r2, r2, #32
 8007a04:	6022      	strmi	r2, [r4, #0]
 8007a06:	b91b      	cbnz	r3, 8007a10 <_printf_i+0x178>
 8007a08:	6822      	ldr	r2, [r4, #0]
 8007a0a:	f022 0220 	bic.w	r2, r2, #32
 8007a0e:	6022      	str	r2, [r4, #0]
 8007a10:	2210      	movs	r2, #16
 8007a12:	e7b1      	b.n	8007978 <_printf_i+0xe0>
 8007a14:	4675      	mov	r5, lr
 8007a16:	fbb3 f0f2 	udiv	r0, r3, r2
 8007a1a:	fb02 3310 	mls	r3, r2, r0, r3
 8007a1e:	5ccb      	ldrb	r3, [r1, r3]
 8007a20:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8007a24:	4603      	mov	r3, r0
 8007a26:	2800      	cmp	r0, #0
 8007a28:	d1f5      	bne.n	8007a16 <_printf_i+0x17e>
 8007a2a:	e7b7      	b.n	800799c <_printf_i+0x104>
 8007a2c:	6808      	ldr	r0, [r1, #0]
 8007a2e:	681a      	ldr	r2, [r3, #0]
 8007a30:	f010 0f80 	tst.w	r0, #128	; 0x80
 8007a34:	6949      	ldr	r1, [r1, #20]
 8007a36:	d004      	beq.n	8007a42 <_printf_i+0x1aa>
 8007a38:	1d10      	adds	r0, r2, #4
 8007a3a:	6018      	str	r0, [r3, #0]
 8007a3c:	6813      	ldr	r3, [r2, #0]
 8007a3e:	6019      	str	r1, [r3, #0]
 8007a40:	e007      	b.n	8007a52 <_printf_i+0x1ba>
 8007a42:	f010 0f40 	tst.w	r0, #64	; 0x40
 8007a46:	f102 0004 	add.w	r0, r2, #4
 8007a4a:	6018      	str	r0, [r3, #0]
 8007a4c:	6813      	ldr	r3, [r2, #0]
 8007a4e:	d0f6      	beq.n	8007a3e <_printf_i+0x1a6>
 8007a50:	8019      	strh	r1, [r3, #0]
 8007a52:	2300      	movs	r3, #0
 8007a54:	4675      	mov	r5, lr
 8007a56:	6123      	str	r3, [r4, #16]
 8007a58:	e7b1      	b.n	80079be <_printf_i+0x126>
 8007a5a:	681a      	ldr	r2, [r3, #0]
 8007a5c:	1d11      	adds	r1, r2, #4
 8007a5e:	6019      	str	r1, [r3, #0]
 8007a60:	6815      	ldr	r5, [r2, #0]
 8007a62:	2100      	movs	r1, #0
 8007a64:	6862      	ldr	r2, [r4, #4]
 8007a66:	4628      	mov	r0, r5
 8007a68:	f001 fa94 	bl	8008f94 <memchr>
 8007a6c:	b108      	cbz	r0, 8007a72 <_printf_i+0x1da>
 8007a6e:	1b40      	subs	r0, r0, r5
 8007a70:	6060      	str	r0, [r4, #4]
 8007a72:	6863      	ldr	r3, [r4, #4]
 8007a74:	6123      	str	r3, [r4, #16]
 8007a76:	2300      	movs	r3, #0
 8007a78:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8007a7c:	e79f      	b.n	80079be <_printf_i+0x126>
 8007a7e:	6923      	ldr	r3, [r4, #16]
 8007a80:	462a      	mov	r2, r5
 8007a82:	4639      	mov	r1, r7
 8007a84:	4630      	mov	r0, r6
 8007a86:	47c0      	blx	r8
 8007a88:	3001      	adds	r0, #1
 8007a8a:	d0a2      	beq.n	80079d2 <_printf_i+0x13a>
 8007a8c:	6823      	ldr	r3, [r4, #0]
 8007a8e:	079b      	lsls	r3, r3, #30
 8007a90:	d507      	bpl.n	8007aa2 <_printf_i+0x20a>
 8007a92:	2500      	movs	r5, #0
 8007a94:	f104 0919 	add.w	r9, r4, #25
 8007a98:	68e3      	ldr	r3, [r4, #12]
 8007a9a:	9a03      	ldr	r2, [sp, #12]
 8007a9c:	1a9b      	subs	r3, r3, r2
 8007a9e:	429d      	cmp	r5, r3
 8007aa0:	db05      	blt.n	8007aae <_printf_i+0x216>
 8007aa2:	68e0      	ldr	r0, [r4, #12]
 8007aa4:	9b03      	ldr	r3, [sp, #12]
 8007aa6:	4298      	cmp	r0, r3
 8007aa8:	bfb8      	it	lt
 8007aaa:	4618      	movlt	r0, r3
 8007aac:	e793      	b.n	80079d6 <_printf_i+0x13e>
 8007aae:	2301      	movs	r3, #1
 8007ab0:	464a      	mov	r2, r9
 8007ab2:	4639      	mov	r1, r7
 8007ab4:	4630      	mov	r0, r6
 8007ab6:	47c0      	blx	r8
 8007ab8:	3001      	adds	r0, #1
 8007aba:	d08a      	beq.n	80079d2 <_printf_i+0x13a>
 8007abc:	3501      	adds	r5, #1
 8007abe:	e7eb      	b.n	8007a98 <_printf_i+0x200>
 8007ac0:	2b00      	cmp	r3, #0
 8007ac2:	d1a7      	bne.n	8007a14 <_printf_i+0x17c>
 8007ac4:	780b      	ldrb	r3, [r1, #0]
 8007ac6:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8007aca:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8007ace:	e765      	b.n	800799c <_printf_i+0x104>
 8007ad0:	08009cc3 	.word	0x08009cc3
 8007ad4:	08009cb2 	.word	0x08009cb2

08007ad8 <iprintf>:
 8007ad8:	b40f      	push	{r0, r1, r2, r3}
 8007ada:	4b0a      	ldr	r3, [pc, #40]	; (8007b04 <iprintf+0x2c>)
 8007adc:	b513      	push	{r0, r1, r4, lr}
 8007ade:	681c      	ldr	r4, [r3, #0]
 8007ae0:	b124      	cbz	r4, 8007aec <iprintf+0x14>
 8007ae2:	69a3      	ldr	r3, [r4, #24]
 8007ae4:	b913      	cbnz	r3, 8007aec <iprintf+0x14>
 8007ae6:	4620      	mov	r0, r4
 8007ae8:	f001 f950 	bl	8008d8c <__sinit>
 8007aec:	ab05      	add	r3, sp, #20
 8007aee:	9a04      	ldr	r2, [sp, #16]
 8007af0:	68a1      	ldr	r1, [r4, #8]
 8007af2:	4620      	mov	r0, r4
 8007af4:	9301      	str	r3, [sp, #4]
 8007af6:	f001 fe17 	bl	8009728 <_vfiprintf_r>
 8007afa:	b002      	add	sp, #8
 8007afc:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8007b00:	b004      	add	sp, #16
 8007b02:	4770      	bx	lr
 8007b04:	2000020c 	.word	0x2000020c

08007b08 <putchar>:
 8007b08:	b538      	push	{r3, r4, r5, lr}
 8007b0a:	4b08      	ldr	r3, [pc, #32]	; (8007b2c <putchar+0x24>)
 8007b0c:	4605      	mov	r5, r0
 8007b0e:	681c      	ldr	r4, [r3, #0]
 8007b10:	b124      	cbz	r4, 8007b1c <putchar+0x14>
 8007b12:	69a3      	ldr	r3, [r4, #24]
 8007b14:	b913      	cbnz	r3, 8007b1c <putchar+0x14>
 8007b16:	4620      	mov	r0, r4
 8007b18:	f001 f938 	bl	8008d8c <__sinit>
 8007b1c:	68a2      	ldr	r2, [r4, #8]
 8007b1e:	4629      	mov	r1, r5
 8007b20:	4620      	mov	r0, r4
 8007b22:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 8007b26:	f001 bf15 	b.w	8009954 <_putc_r>
 8007b2a:	bf00      	nop
 8007b2c:	2000020c 	.word	0x2000020c

08007b30 <_puts_r>:
 8007b30:	b570      	push	{r4, r5, r6, lr}
 8007b32:	460e      	mov	r6, r1
 8007b34:	4605      	mov	r5, r0
 8007b36:	b118      	cbz	r0, 8007b40 <_puts_r+0x10>
 8007b38:	6983      	ldr	r3, [r0, #24]
 8007b3a:	b90b      	cbnz	r3, 8007b40 <_puts_r+0x10>
 8007b3c:	f001 f926 	bl	8008d8c <__sinit>
 8007b40:	69ab      	ldr	r3, [r5, #24]
 8007b42:	68ac      	ldr	r4, [r5, #8]
 8007b44:	b913      	cbnz	r3, 8007b4c <_puts_r+0x1c>
 8007b46:	4628      	mov	r0, r5
 8007b48:	f001 f920 	bl	8008d8c <__sinit>
 8007b4c:	4b23      	ldr	r3, [pc, #140]	; (8007bdc <_puts_r+0xac>)
 8007b4e:	429c      	cmp	r4, r3
 8007b50:	d117      	bne.n	8007b82 <_puts_r+0x52>
 8007b52:	686c      	ldr	r4, [r5, #4]
 8007b54:	89a3      	ldrh	r3, [r4, #12]
 8007b56:	071b      	lsls	r3, r3, #28
 8007b58:	d51d      	bpl.n	8007b96 <_puts_r+0x66>
 8007b5a:	6923      	ldr	r3, [r4, #16]
 8007b5c:	b1db      	cbz	r3, 8007b96 <_puts_r+0x66>
 8007b5e:	3e01      	subs	r6, #1
 8007b60:	68a3      	ldr	r3, [r4, #8]
 8007b62:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8007b66:	3b01      	subs	r3, #1
 8007b68:	60a3      	str	r3, [r4, #8]
 8007b6a:	b9e9      	cbnz	r1, 8007ba8 <_puts_r+0x78>
 8007b6c:	2b00      	cmp	r3, #0
 8007b6e:	da2e      	bge.n	8007bce <_puts_r+0x9e>
 8007b70:	4622      	mov	r2, r4
 8007b72:	210a      	movs	r1, #10
 8007b74:	4628      	mov	r0, r5
 8007b76:	f000 f8f5 	bl	8007d64 <__swbuf_r>
 8007b7a:	3001      	adds	r0, #1
 8007b7c:	d011      	beq.n	8007ba2 <_puts_r+0x72>
 8007b7e:	200a      	movs	r0, #10
 8007b80:	bd70      	pop	{r4, r5, r6, pc}
 8007b82:	4b17      	ldr	r3, [pc, #92]	; (8007be0 <_puts_r+0xb0>)
 8007b84:	429c      	cmp	r4, r3
 8007b86:	d101      	bne.n	8007b8c <_puts_r+0x5c>
 8007b88:	68ac      	ldr	r4, [r5, #8]
 8007b8a:	e7e3      	b.n	8007b54 <_puts_r+0x24>
 8007b8c:	4b15      	ldr	r3, [pc, #84]	; (8007be4 <_puts_r+0xb4>)
 8007b8e:	429c      	cmp	r4, r3
 8007b90:	bf08      	it	eq
 8007b92:	68ec      	ldreq	r4, [r5, #12]
 8007b94:	e7de      	b.n	8007b54 <_puts_r+0x24>
 8007b96:	4621      	mov	r1, r4
 8007b98:	4628      	mov	r0, r5
 8007b9a:	f000 f935 	bl	8007e08 <__swsetup_r>
 8007b9e:	2800      	cmp	r0, #0
 8007ba0:	d0dd      	beq.n	8007b5e <_puts_r+0x2e>
 8007ba2:	f04f 30ff 	mov.w	r0, #4294967295
 8007ba6:	bd70      	pop	{r4, r5, r6, pc}
 8007ba8:	2b00      	cmp	r3, #0
 8007baa:	da04      	bge.n	8007bb6 <_puts_r+0x86>
 8007bac:	69a2      	ldr	r2, [r4, #24]
 8007bae:	4293      	cmp	r3, r2
 8007bb0:	db06      	blt.n	8007bc0 <_puts_r+0x90>
 8007bb2:	290a      	cmp	r1, #10
 8007bb4:	d004      	beq.n	8007bc0 <_puts_r+0x90>
 8007bb6:	6823      	ldr	r3, [r4, #0]
 8007bb8:	1c5a      	adds	r2, r3, #1
 8007bba:	6022      	str	r2, [r4, #0]
 8007bbc:	7019      	strb	r1, [r3, #0]
 8007bbe:	e7cf      	b.n	8007b60 <_puts_r+0x30>
 8007bc0:	4622      	mov	r2, r4
 8007bc2:	4628      	mov	r0, r5
 8007bc4:	f000 f8ce 	bl	8007d64 <__swbuf_r>
 8007bc8:	3001      	adds	r0, #1
 8007bca:	d1c9      	bne.n	8007b60 <_puts_r+0x30>
 8007bcc:	e7e9      	b.n	8007ba2 <_puts_r+0x72>
 8007bce:	200a      	movs	r0, #10
 8007bd0:	6823      	ldr	r3, [r4, #0]
 8007bd2:	1c5a      	adds	r2, r3, #1
 8007bd4:	6022      	str	r2, [r4, #0]
 8007bd6:	7018      	strb	r0, [r3, #0]
 8007bd8:	bd70      	pop	{r4, r5, r6, pc}
 8007bda:	bf00      	nop
 8007bdc:	08009d04 	.word	0x08009d04
 8007be0:	08009d24 	.word	0x08009d24
 8007be4:	08009ce4 	.word	0x08009ce4

08007be8 <puts>:
 8007be8:	4b02      	ldr	r3, [pc, #8]	; (8007bf4 <puts+0xc>)
 8007bea:	4601      	mov	r1, r0
 8007bec:	6818      	ldr	r0, [r3, #0]
 8007bee:	f7ff bf9f 	b.w	8007b30 <_puts_r>
 8007bf2:	bf00      	nop
 8007bf4:	2000020c 	.word	0x2000020c

08007bf8 <setbuf>:
 8007bf8:	2900      	cmp	r1, #0
 8007bfa:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8007bfe:	bf0c      	ite	eq
 8007c00:	2202      	moveq	r2, #2
 8007c02:	2200      	movne	r2, #0
 8007c04:	f000 b800 	b.w	8007c08 <setvbuf>

08007c08 <setvbuf>:
 8007c08:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 8007c0c:	461d      	mov	r5, r3
 8007c0e:	4b51      	ldr	r3, [pc, #324]	; (8007d54 <setvbuf+0x14c>)
 8007c10:	4604      	mov	r4, r0
 8007c12:	681e      	ldr	r6, [r3, #0]
 8007c14:	460f      	mov	r7, r1
 8007c16:	4690      	mov	r8, r2
 8007c18:	b126      	cbz	r6, 8007c24 <setvbuf+0x1c>
 8007c1a:	69b3      	ldr	r3, [r6, #24]
 8007c1c:	b913      	cbnz	r3, 8007c24 <setvbuf+0x1c>
 8007c1e:	4630      	mov	r0, r6
 8007c20:	f001 f8b4 	bl	8008d8c <__sinit>
 8007c24:	4b4c      	ldr	r3, [pc, #304]	; (8007d58 <setvbuf+0x150>)
 8007c26:	429c      	cmp	r4, r3
 8007c28:	d152      	bne.n	8007cd0 <setvbuf+0xc8>
 8007c2a:	6874      	ldr	r4, [r6, #4]
 8007c2c:	f1b8 0f02 	cmp.w	r8, #2
 8007c30:	d006      	beq.n	8007c40 <setvbuf+0x38>
 8007c32:	f1b8 0f01 	cmp.w	r8, #1
 8007c36:	f200 8089 	bhi.w	8007d4c <setvbuf+0x144>
 8007c3a:	2d00      	cmp	r5, #0
 8007c3c:	f2c0 8086 	blt.w	8007d4c <setvbuf+0x144>
 8007c40:	4621      	mov	r1, r4
 8007c42:	4630      	mov	r0, r6
 8007c44:	f001 f838 	bl	8008cb8 <_fflush_r>
 8007c48:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8007c4a:	b141      	cbz	r1, 8007c5e <setvbuf+0x56>
 8007c4c:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8007c50:	4299      	cmp	r1, r3
 8007c52:	d002      	beq.n	8007c5a <setvbuf+0x52>
 8007c54:	4630      	mov	r0, r6
 8007c56:	f001 fc95 	bl	8009584 <_free_r>
 8007c5a:	2300      	movs	r3, #0
 8007c5c:	6363      	str	r3, [r4, #52]	; 0x34
 8007c5e:	2300      	movs	r3, #0
 8007c60:	61a3      	str	r3, [r4, #24]
 8007c62:	6063      	str	r3, [r4, #4]
 8007c64:	89a3      	ldrh	r3, [r4, #12]
 8007c66:	061b      	lsls	r3, r3, #24
 8007c68:	d503      	bpl.n	8007c72 <setvbuf+0x6a>
 8007c6a:	6921      	ldr	r1, [r4, #16]
 8007c6c:	4630      	mov	r0, r6
 8007c6e:	f001 fc89 	bl	8009584 <_free_r>
 8007c72:	89a3      	ldrh	r3, [r4, #12]
 8007c74:	f1b8 0f02 	cmp.w	r8, #2
 8007c78:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 8007c7c:	f023 0303 	bic.w	r3, r3, #3
 8007c80:	81a3      	strh	r3, [r4, #12]
 8007c82:	d05d      	beq.n	8007d40 <setvbuf+0x138>
 8007c84:	ab01      	add	r3, sp, #4
 8007c86:	466a      	mov	r2, sp
 8007c88:	4621      	mov	r1, r4
 8007c8a:	4630      	mov	r0, r6
 8007c8c:	f001 f916 	bl	8008ebc <__swhatbuf_r>
 8007c90:	89a3      	ldrh	r3, [r4, #12]
 8007c92:	4318      	orrs	r0, r3
 8007c94:	81a0      	strh	r0, [r4, #12]
 8007c96:	bb2d      	cbnz	r5, 8007ce4 <setvbuf+0xdc>
 8007c98:	9d00      	ldr	r5, [sp, #0]
 8007c9a:	4628      	mov	r0, r5
 8007c9c:	f001 f972 	bl	8008f84 <malloc>
 8007ca0:	4607      	mov	r7, r0
 8007ca2:	2800      	cmp	r0, #0
 8007ca4:	d14e      	bne.n	8007d44 <setvbuf+0x13c>
 8007ca6:	f8dd 9000 	ldr.w	r9, [sp]
 8007caa:	45a9      	cmp	r9, r5
 8007cac:	d13c      	bne.n	8007d28 <setvbuf+0x120>
 8007cae:	f04f 30ff 	mov.w	r0, #4294967295
 8007cb2:	89a3      	ldrh	r3, [r4, #12]
 8007cb4:	f043 0302 	orr.w	r3, r3, #2
 8007cb8:	81a3      	strh	r3, [r4, #12]
 8007cba:	2300      	movs	r3, #0
 8007cbc:	60a3      	str	r3, [r4, #8]
 8007cbe:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8007cc2:	6023      	str	r3, [r4, #0]
 8007cc4:	6123      	str	r3, [r4, #16]
 8007cc6:	2301      	movs	r3, #1
 8007cc8:	6163      	str	r3, [r4, #20]
 8007cca:	b003      	add	sp, #12
 8007ccc:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8007cd0:	4b22      	ldr	r3, [pc, #136]	; (8007d5c <setvbuf+0x154>)
 8007cd2:	429c      	cmp	r4, r3
 8007cd4:	d101      	bne.n	8007cda <setvbuf+0xd2>
 8007cd6:	68b4      	ldr	r4, [r6, #8]
 8007cd8:	e7a8      	b.n	8007c2c <setvbuf+0x24>
 8007cda:	4b21      	ldr	r3, [pc, #132]	; (8007d60 <setvbuf+0x158>)
 8007cdc:	429c      	cmp	r4, r3
 8007cde:	bf08      	it	eq
 8007ce0:	68f4      	ldreq	r4, [r6, #12]
 8007ce2:	e7a3      	b.n	8007c2c <setvbuf+0x24>
 8007ce4:	2f00      	cmp	r7, #0
 8007ce6:	d0d8      	beq.n	8007c9a <setvbuf+0x92>
 8007ce8:	69b3      	ldr	r3, [r6, #24]
 8007cea:	b913      	cbnz	r3, 8007cf2 <setvbuf+0xea>
 8007cec:	4630      	mov	r0, r6
 8007cee:	f001 f84d 	bl	8008d8c <__sinit>
 8007cf2:	f1b8 0f01 	cmp.w	r8, #1
 8007cf6:	bf08      	it	eq
 8007cf8:	89a3      	ldrheq	r3, [r4, #12]
 8007cfa:	6027      	str	r7, [r4, #0]
 8007cfc:	bf04      	itt	eq
 8007cfe:	f043 0301 	orreq.w	r3, r3, #1
 8007d02:	81a3      	strheq	r3, [r4, #12]
 8007d04:	89a3      	ldrh	r3, [r4, #12]
 8007d06:	6127      	str	r7, [r4, #16]
 8007d08:	f013 0008 	ands.w	r0, r3, #8
 8007d0c:	6165      	str	r5, [r4, #20]
 8007d0e:	d01b      	beq.n	8007d48 <setvbuf+0x140>
 8007d10:	f013 0001 	ands.w	r0, r3, #1
 8007d14:	f04f 0300 	mov.w	r3, #0
 8007d18:	bf1f      	itttt	ne
 8007d1a:	426d      	negne	r5, r5
 8007d1c:	60a3      	strne	r3, [r4, #8]
 8007d1e:	61a5      	strne	r5, [r4, #24]
 8007d20:	4618      	movne	r0, r3
 8007d22:	bf08      	it	eq
 8007d24:	60a5      	streq	r5, [r4, #8]
 8007d26:	e7d0      	b.n	8007cca <setvbuf+0xc2>
 8007d28:	4648      	mov	r0, r9
 8007d2a:	f001 f92b 	bl	8008f84 <malloc>
 8007d2e:	4607      	mov	r7, r0
 8007d30:	2800      	cmp	r0, #0
 8007d32:	d0bc      	beq.n	8007cae <setvbuf+0xa6>
 8007d34:	89a3      	ldrh	r3, [r4, #12]
 8007d36:	464d      	mov	r5, r9
 8007d38:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8007d3c:	81a3      	strh	r3, [r4, #12]
 8007d3e:	e7d3      	b.n	8007ce8 <setvbuf+0xe0>
 8007d40:	2000      	movs	r0, #0
 8007d42:	e7b6      	b.n	8007cb2 <setvbuf+0xaa>
 8007d44:	46a9      	mov	r9, r5
 8007d46:	e7f5      	b.n	8007d34 <setvbuf+0x12c>
 8007d48:	60a0      	str	r0, [r4, #8]
 8007d4a:	e7be      	b.n	8007cca <setvbuf+0xc2>
 8007d4c:	f04f 30ff 	mov.w	r0, #4294967295
 8007d50:	e7bb      	b.n	8007cca <setvbuf+0xc2>
 8007d52:	bf00      	nop
 8007d54:	2000020c 	.word	0x2000020c
 8007d58:	08009d04 	.word	0x08009d04
 8007d5c:	08009d24 	.word	0x08009d24
 8007d60:	08009ce4 	.word	0x08009ce4

08007d64 <__swbuf_r>:
 8007d64:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8007d66:	460e      	mov	r6, r1
 8007d68:	4614      	mov	r4, r2
 8007d6a:	4605      	mov	r5, r0
 8007d6c:	b118      	cbz	r0, 8007d76 <__swbuf_r+0x12>
 8007d6e:	6983      	ldr	r3, [r0, #24]
 8007d70:	b90b      	cbnz	r3, 8007d76 <__swbuf_r+0x12>
 8007d72:	f001 f80b 	bl	8008d8c <__sinit>
 8007d76:	4b21      	ldr	r3, [pc, #132]	; (8007dfc <__swbuf_r+0x98>)
 8007d78:	429c      	cmp	r4, r3
 8007d7a:	d12a      	bne.n	8007dd2 <__swbuf_r+0x6e>
 8007d7c:	686c      	ldr	r4, [r5, #4]
 8007d7e:	69a3      	ldr	r3, [r4, #24]
 8007d80:	60a3      	str	r3, [r4, #8]
 8007d82:	89a3      	ldrh	r3, [r4, #12]
 8007d84:	071a      	lsls	r2, r3, #28
 8007d86:	d52e      	bpl.n	8007de6 <__swbuf_r+0x82>
 8007d88:	6923      	ldr	r3, [r4, #16]
 8007d8a:	b363      	cbz	r3, 8007de6 <__swbuf_r+0x82>
 8007d8c:	6923      	ldr	r3, [r4, #16]
 8007d8e:	6820      	ldr	r0, [r4, #0]
 8007d90:	b2f6      	uxtb	r6, r6
 8007d92:	1ac0      	subs	r0, r0, r3
 8007d94:	6963      	ldr	r3, [r4, #20]
 8007d96:	4637      	mov	r7, r6
 8007d98:	4298      	cmp	r0, r3
 8007d9a:	db04      	blt.n	8007da6 <__swbuf_r+0x42>
 8007d9c:	4621      	mov	r1, r4
 8007d9e:	4628      	mov	r0, r5
 8007da0:	f000 ff8a 	bl	8008cb8 <_fflush_r>
 8007da4:	bb28      	cbnz	r0, 8007df2 <__swbuf_r+0x8e>
 8007da6:	68a3      	ldr	r3, [r4, #8]
 8007da8:	3001      	adds	r0, #1
 8007daa:	3b01      	subs	r3, #1
 8007dac:	60a3      	str	r3, [r4, #8]
 8007dae:	6823      	ldr	r3, [r4, #0]
 8007db0:	1c5a      	adds	r2, r3, #1
 8007db2:	6022      	str	r2, [r4, #0]
 8007db4:	701e      	strb	r6, [r3, #0]
 8007db6:	6963      	ldr	r3, [r4, #20]
 8007db8:	4298      	cmp	r0, r3
 8007dba:	d004      	beq.n	8007dc6 <__swbuf_r+0x62>
 8007dbc:	89a3      	ldrh	r3, [r4, #12]
 8007dbe:	07db      	lsls	r3, r3, #31
 8007dc0:	d519      	bpl.n	8007df6 <__swbuf_r+0x92>
 8007dc2:	2e0a      	cmp	r6, #10
 8007dc4:	d117      	bne.n	8007df6 <__swbuf_r+0x92>
 8007dc6:	4621      	mov	r1, r4
 8007dc8:	4628      	mov	r0, r5
 8007dca:	f000 ff75 	bl	8008cb8 <_fflush_r>
 8007dce:	b190      	cbz	r0, 8007df6 <__swbuf_r+0x92>
 8007dd0:	e00f      	b.n	8007df2 <__swbuf_r+0x8e>
 8007dd2:	4b0b      	ldr	r3, [pc, #44]	; (8007e00 <__swbuf_r+0x9c>)
 8007dd4:	429c      	cmp	r4, r3
 8007dd6:	d101      	bne.n	8007ddc <__swbuf_r+0x78>
 8007dd8:	68ac      	ldr	r4, [r5, #8]
 8007dda:	e7d0      	b.n	8007d7e <__swbuf_r+0x1a>
 8007ddc:	4b09      	ldr	r3, [pc, #36]	; (8007e04 <__swbuf_r+0xa0>)
 8007dde:	429c      	cmp	r4, r3
 8007de0:	bf08      	it	eq
 8007de2:	68ec      	ldreq	r4, [r5, #12]
 8007de4:	e7cb      	b.n	8007d7e <__swbuf_r+0x1a>
 8007de6:	4621      	mov	r1, r4
 8007de8:	4628      	mov	r0, r5
 8007dea:	f000 f80d 	bl	8007e08 <__swsetup_r>
 8007dee:	2800      	cmp	r0, #0
 8007df0:	d0cc      	beq.n	8007d8c <__swbuf_r+0x28>
 8007df2:	f04f 37ff 	mov.w	r7, #4294967295
 8007df6:	4638      	mov	r0, r7
 8007df8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8007dfa:	bf00      	nop
 8007dfc:	08009d04 	.word	0x08009d04
 8007e00:	08009d24 	.word	0x08009d24
 8007e04:	08009ce4 	.word	0x08009ce4

08007e08 <__swsetup_r>:
 8007e08:	4b32      	ldr	r3, [pc, #200]	; (8007ed4 <__swsetup_r+0xcc>)
 8007e0a:	b570      	push	{r4, r5, r6, lr}
 8007e0c:	681d      	ldr	r5, [r3, #0]
 8007e0e:	4606      	mov	r6, r0
 8007e10:	460c      	mov	r4, r1
 8007e12:	b125      	cbz	r5, 8007e1e <__swsetup_r+0x16>
 8007e14:	69ab      	ldr	r3, [r5, #24]
 8007e16:	b913      	cbnz	r3, 8007e1e <__swsetup_r+0x16>
 8007e18:	4628      	mov	r0, r5
 8007e1a:	f000 ffb7 	bl	8008d8c <__sinit>
 8007e1e:	4b2e      	ldr	r3, [pc, #184]	; (8007ed8 <__swsetup_r+0xd0>)
 8007e20:	429c      	cmp	r4, r3
 8007e22:	d10f      	bne.n	8007e44 <__swsetup_r+0x3c>
 8007e24:	686c      	ldr	r4, [r5, #4]
 8007e26:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8007e2a:	b29a      	uxth	r2, r3
 8007e2c:	0715      	lsls	r5, r2, #28
 8007e2e:	d42c      	bmi.n	8007e8a <__swsetup_r+0x82>
 8007e30:	06d0      	lsls	r0, r2, #27
 8007e32:	d411      	bmi.n	8007e58 <__swsetup_r+0x50>
 8007e34:	2209      	movs	r2, #9
 8007e36:	6032      	str	r2, [r6, #0]
 8007e38:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8007e3c:	81a3      	strh	r3, [r4, #12]
 8007e3e:	f04f 30ff 	mov.w	r0, #4294967295
 8007e42:	bd70      	pop	{r4, r5, r6, pc}
 8007e44:	4b25      	ldr	r3, [pc, #148]	; (8007edc <__swsetup_r+0xd4>)
 8007e46:	429c      	cmp	r4, r3
 8007e48:	d101      	bne.n	8007e4e <__swsetup_r+0x46>
 8007e4a:	68ac      	ldr	r4, [r5, #8]
 8007e4c:	e7eb      	b.n	8007e26 <__swsetup_r+0x1e>
 8007e4e:	4b24      	ldr	r3, [pc, #144]	; (8007ee0 <__swsetup_r+0xd8>)
 8007e50:	429c      	cmp	r4, r3
 8007e52:	bf08      	it	eq
 8007e54:	68ec      	ldreq	r4, [r5, #12]
 8007e56:	e7e6      	b.n	8007e26 <__swsetup_r+0x1e>
 8007e58:	0751      	lsls	r1, r2, #29
 8007e5a:	d512      	bpl.n	8007e82 <__swsetup_r+0x7a>
 8007e5c:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8007e5e:	b141      	cbz	r1, 8007e72 <__swsetup_r+0x6a>
 8007e60:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8007e64:	4299      	cmp	r1, r3
 8007e66:	d002      	beq.n	8007e6e <__swsetup_r+0x66>
 8007e68:	4630      	mov	r0, r6
 8007e6a:	f001 fb8b 	bl	8009584 <_free_r>
 8007e6e:	2300      	movs	r3, #0
 8007e70:	6363      	str	r3, [r4, #52]	; 0x34
 8007e72:	89a3      	ldrh	r3, [r4, #12]
 8007e74:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 8007e78:	81a3      	strh	r3, [r4, #12]
 8007e7a:	2300      	movs	r3, #0
 8007e7c:	6063      	str	r3, [r4, #4]
 8007e7e:	6923      	ldr	r3, [r4, #16]
 8007e80:	6023      	str	r3, [r4, #0]
 8007e82:	89a3      	ldrh	r3, [r4, #12]
 8007e84:	f043 0308 	orr.w	r3, r3, #8
 8007e88:	81a3      	strh	r3, [r4, #12]
 8007e8a:	6923      	ldr	r3, [r4, #16]
 8007e8c:	b94b      	cbnz	r3, 8007ea2 <__swsetup_r+0x9a>
 8007e8e:	89a3      	ldrh	r3, [r4, #12]
 8007e90:	f403 7320 	and.w	r3, r3, #640	; 0x280
 8007e94:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 8007e98:	d003      	beq.n	8007ea2 <__swsetup_r+0x9a>
 8007e9a:	4621      	mov	r1, r4
 8007e9c:	4630      	mov	r0, r6
 8007e9e:	f001 f831 	bl	8008f04 <__smakebuf_r>
 8007ea2:	89a2      	ldrh	r2, [r4, #12]
 8007ea4:	f012 0301 	ands.w	r3, r2, #1
 8007ea8:	d00c      	beq.n	8007ec4 <__swsetup_r+0xbc>
 8007eaa:	2300      	movs	r3, #0
 8007eac:	60a3      	str	r3, [r4, #8]
 8007eae:	6963      	ldr	r3, [r4, #20]
 8007eb0:	425b      	negs	r3, r3
 8007eb2:	61a3      	str	r3, [r4, #24]
 8007eb4:	6923      	ldr	r3, [r4, #16]
 8007eb6:	b953      	cbnz	r3, 8007ece <__swsetup_r+0xc6>
 8007eb8:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8007ebc:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 8007ec0:	d1ba      	bne.n	8007e38 <__swsetup_r+0x30>
 8007ec2:	bd70      	pop	{r4, r5, r6, pc}
 8007ec4:	0792      	lsls	r2, r2, #30
 8007ec6:	bf58      	it	pl
 8007ec8:	6963      	ldrpl	r3, [r4, #20]
 8007eca:	60a3      	str	r3, [r4, #8]
 8007ecc:	e7f2      	b.n	8007eb4 <__swsetup_r+0xac>
 8007ece:	2000      	movs	r0, #0
 8007ed0:	e7f7      	b.n	8007ec2 <__swsetup_r+0xba>
 8007ed2:	bf00      	nop
 8007ed4:	2000020c 	.word	0x2000020c
 8007ed8:	08009d04 	.word	0x08009d04
 8007edc:	08009d24 	.word	0x08009d24
 8007ee0:	08009ce4 	.word	0x08009ce4

08007ee4 <quorem>:
 8007ee4:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007ee8:	6903      	ldr	r3, [r0, #16]
 8007eea:	690c      	ldr	r4, [r1, #16]
 8007eec:	4680      	mov	r8, r0
 8007eee:	429c      	cmp	r4, r3
 8007ef0:	f300 8082 	bgt.w	8007ff8 <quorem+0x114>
 8007ef4:	3c01      	subs	r4, #1
 8007ef6:	f101 0714 	add.w	r7, r1, #20
 8007efa:	f100 0614 	add.w	r6, r0, #20
 8007efe:	f857 5024 	ldr.w	r5, [r7, r4, lsl #2]
 8007f02:	f856 0024 	ldr.w	r0, [r6, r4, lsl #2]
 8007f06:	3501      	adds	r5, #1
 8007f08:	fbb0 f5f5 	udiv	r5, r0, r5
 8007f0c:	ea4f 0e84 	mov.w	lr, r4, lsl #2
 8007f10:	eb06 030e 	add.w	r3, r6, lr
 8007f14:	eb07 090e 	add.w	r9, r7, lr
 8007f18:	9301      	str	r3, [sp, #4]
 8007f1a:	b38d      	cbz	r5, 8007f80 <quorem+0x9c>
 8007f1c:	f04f 0a00 	mov.w	sl, #0
 8007f20:	4638      	mov	r0, r7
 8007f22:	46b4      	mov	ip, r6
 8007f24:	46d3      	mov	fp, sl
 8007f26:	f850 2b04 	ldr.w	r2, [r0], #4
 8007f2a:	b293      	uxth	r3, r2
 8007f2c:	fb05 a303 	mla	r3, r5, r3, sl
 8007f30:	0c12      	lsrs	r2, r2, #16
 8007f32:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 8007f36:	fb05 a202 	mla	r2, r5, r2, sl
 8007f3a:	b29b      	uxth	r3, r3
 8007f3c:	ebab 0303 	sub.w	r3, fp, r3
 8007f40:	f8bc b000 	ldrh.w	fp, [ip]
 8007f44:	ea4f 4a12 	mov.w	sl, r2, lsr #16
 8007f48:	445b      	add	r3, fp
 8007f4a:	fa1f fb82 	uxth.w	fp, r2
 8007f4e:	f8dc 2000 	ldr.w	r2, [ip]
 8007f52:	4581      	cmp	r9, r0
 8007f54:	ebcb 4212 	rsb	r2, fp, r2, lsr #16
 8007f58:	eb02 4223 	add.w	r2, r2, r3, asr #16
 8007f5c:	b29b      	uxth	r3, r3
 8007f5e:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 8007f62:	ea4f 4b22 	mov.w	fp, r2, asr #16
 8007f66:	f84c 3b04 	str.w	r3, [ip], #4
 8007f6a:	d2dc      	bcs.n	8007f26 <quorem+0x42>
 8007f6c:	f856 300e 	ldr.w	r3, [r6, lr]
 8007f70:	b933      	cbnz	r3, 8007f80 <quorem+0x9c>
 8007f72:	9b01      	ldr	r3, [sp, #4]
 8007f74:	3b04      	subs	r3, #4
 8007f76:	429e      	cmp	r6, r3
 8007f78:	461a      	mov	r2, r3
 8007f7a:	d331      	bcc.n	8007fe0 <quorem+0xfc>
 8007f7c:	f8c8 4010 	str.w	r4, [r8, #16]
 8007f80:	4640      	mov	r0, r8
 8007f82:	f001 fa28 	bl	80093d6 <__mcmp>
 8007f86:	2800      	cmp	r0, #0
 8007f88:	db26      	blt.n	8007fd8 <quorem+0xf4>
 8007f8a:	4630      	mov	r0, r6
 8007f8c:	f04f 0e00 	mov.w	lr, #0
 8007f90:	3501      	adds	r5, #1
 8007f92:	f857 1b04 	ldr.w	r1, [r7], #4
 8007f96:	f8d0 c000 	ldr.w	ip, [r0]
 8007f9a:	b28b      	uxth	r3, r1
 8007f9c:	ebae 0303 	sub.w	r3, lr, r3
 8007fa0:	fa1f f28c 	uxth.w	r2, ip
 8007fa4:	4413      	add	r3, r2
 8007fa6:	0c0a      	lsrs	r2, r1, #16
 8007fa8:	ebc2 421c 	rsb	r2, r2, ip, lsr #16
 8007fac:	eb02 4223 	add.w	r2, r2, r3, asr #16
 8007fb0:	b29b      	uxth	r3, r3
 8007fb2:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 8007fb6:	45b9      	cmp	r9, r7
 8007fb8:	ea4f 4e22 	mov.w	lr, r2, asr #16
 8007fbc:	f840 3b04 	str.w	r3, [r0], #4
 8007fc0:	d2e7      	bcs.n	8007f92 <quorem+0xae>
 8007fc2:	f856 2024 	ldr.w	r2, [r6, r4, lsl #2]
 8007fc6:	eb06 0384 	add.w	r3, r6, r4, lsl #2
 8007fca:	b92a      	cbnz	r2, 8007fd8 <quorem+0xf4>
 8007fcc:	3b04      	subs	r3, #4
 8007fce:	429e      	cmp	r6, r3
 8007fd0:	461a      	mov	r2, r3
 8007fd2:	d30b      	bcc.n	8007fec <quorem+0x108>
 8007fd4:	f8c8 4010 	str.w	r4, [r8, #16]
 8007fd8:	4628      	mov	r0, r5
 8007fda:	b003      	add	sp, #12
 8007fdc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8007fe0:	6812      	ldr	r2, [r2, #0]
 8007fe2:	3b04      	subs	r3, #4
 8007fe4:	2a00      	cmp	r2, #0
 8007fe6:	d1c9      	bne.n	8007f7c <quorem+0x98>
 8007fe8:	3c01      	subs	r4, #1
 8007fea:	e7c4      	b.n	8007f76 <quorem+0x92>
 8007fec:	6812      	ldr	r2, [r2, #0]
 8007fee:	3b04      	subs	r3, #4
 8007ff0:	2a00      	cmp	r2, #0
 8007ff2:	d1ef      	bne.n	8007fd4 <quorem+0xf0>
 8007ff4:	3c01      	subs	r4, #1
 8007ff6:	e7ea      	b.n	8007fce <quorem+0xea>
 8007ff8:	2000      	movs	r0, #0
 8007ffa:	e7ee      	b.n	8007fda <quorem+0xf6>
 8007ffc:	0000      	movs	r0, r0
	...

08008000 <_dtoa_r>:
 8008000:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8008004:	6a46      	ldr	r6, [r0, #36]	; 0x24
 8008006:	b095      	sub	sp, #84	; 0x54
 8008008:	4604      	mov	r4, r0
 800800a:	9d21      	ldr	r5, [sp, #132]	; 0x84
 800800c:	e9cd 2302 	strd	r2, r3, [sp, #8]
 8008010:	b93e      	cbnz	r6, 8008022 <_dtoa_r+0x22>
 8008012:	2010      	movs	r0, #16
 8008014:	f000 ffb6 	bl	8008f84 <malloc>
 8008018:	6260      	str	r0, [r4, #36]	; 0x24
 800801a:	6046      	str	r6, [r0, #4]
 800801c:	6086      	str	r6, [r0, #8]
 800801e:	6006      	str	r6, [r0, #0]
 8008020:	60c6      	str	r6, [r0, #12]
 8008022:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8008024:	6819      	ldr	r1, [r3, #0]
 8008026:	b151      	cbz	r1, 800803e <_dtoa_r+0x3e>
 8008028:	685a      	ldr	r2, [r3, #4]
 800802a:	2301      	movs	r3, #1
 800802c:	4093      	lsls	r3, r2
 800802e:	604a      	str	r2, [r1, #4]
 8008030:	608b      	str	r3, [r1, #8]
 8008032:	4620      	mov	r0, r4
 8008034:	f000 fffb 	bl	800902e <_Bfree>
 8008038:	2200      	movs	r2, #0
 800803a:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800803c:	601a      	str	r2, [r3, #0]
 800803e:	9b03      	ldr	r3, [sp, #12]
 8008040:	2b00      	cmp	r3, #0
 8008042:	bfb7      	itett	lt
 8008044:	2301      	movlt	r3, #1
 8008046:	2300      	movge	r3, #0
 8008048:	602b      	strlt	r3, [r5, #0]
 800804a:	9b03      	ldrlt	r3, [sp, #12]
 800804c:	bfae      	itee	ge
 800804e:	602b      	strge	r3, [r5, #0]
 8008050:	f023 4300 	biclt.w	r3, r3, #2147483648	; 0x80000000
 8008054:	9303      	strlt	r3, [sp, #12]
 8008056:	f8dd 900c 	ldr.w	r9, [sp, #12]
 800805a:	4bab      	ldr	r3, [pc, #684]	; (8008308 <_dtoa_r+0x308>)
 800805c:	ea33 0309 	bics.w	r3, r3, r9
 8008060:	d11b      	bne.n	800809a <_dtoa_r+0x9a>
 8008062:	f242 730f 	movw	r3, #9999	; 0x270f
 8008066:	9a20      	ldr	r2, [sp, #128]	; 0x80
 8008068:	6013      	str	r3, [r2, #0]
 800806a:	9b02      	ldr	r3, [sp, #8]
 800806c:	b923      	cbnz	r3, 8008078 <_dtoa_r+0x78>
 800806e:	f3c9 0013 	ubfx	r0, r9, #0, #20
 8008072:	2800      	cmp	r0, #0
 8008074:	f000 8583 	beq.w	8008b7e <_dtoa_r+0xb7e>
 8008078:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800807a:	b953      	cbnz	r3, 8008092 <_dtoa_r+0x92>
 800807c:	4ba3      	ldr	r3, [pc, #652]	; (800830c <_dtoa_r+0x30c>)
 800807e:	e021      	b.n	80080c4 <_dtoa_r+0xc4>
 8008080:	4ba3      	ldr	r3, [pc, #652]	; (8008310 <_dtoa_r+0x310>)
 8008082:	9306      	str	r3, [sp, #24]
 8008084:	3308      	adds	r3, #8
 8008086:	9a22      	ldr	r2, [sp, #136]	; 0x88
 8008088:	6013      	str	r3, [r2, #0]
 800808a:	9806      	ldr	r0, [sp, #24]
 800808c:	b015      	add	sp, #84	; 0x54
 800808e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8008092:	4b9e      	ldr	r3, [pc, #632]	; (800830c <_dtoa_r+0x30c>)
 8008094:	9306      	str	r3, [sp, #24]
 8008096:	3303      	adds	r3, #3
 8008098:	e7f5      	b.n	8008086 <_dtoa_r+0x86>
 800809a:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 800809e:	2200      	movs	r2, #0
 80080a0:	2300      	movs	r3, #0
 80080a2:	4630      	mov	r0, r6
 80080a4:	4639      	mov	r1, r7
 80080a6:	f7fc fce7 	bl	8004a78 <__aeabi_dcmpeq>
 80080aa:	4680      	mov	r8, r0
 80080ac:	b160      	cbz	r0, 80080c8 <_dtoa_r+0xc8>
 80080ae:	2301      	movs	r3, #1
 80080b0:	9a20      	ldr	r2, [sp, #128]	; 0x80
 80080b2:	6013      	str	r3, [r2, #0]
 80080b4:	9b22      	ldr	r3, [sp, #136]	; 0x88
 80080b6:	2b00      	cmp	r3, #0
 80080b8:	f000 855e 	beq.w	8008b78 <_dtoa_r+0xb78>
 80080bc:	4b95      	ldr	r3, [pc, #596]	; (8008314 <_dtoa_r+0x314>)
 80080be:	9a22      	ldr	r2, [sp, #136]	; 0x88
 80080c0:	6013      	str	r3, [r2, #0]
 80080c2:	3b01      	subs	r3, #1
 80080c4:	9306      	str	r3, [sp, #24]
 80080c6:	e7e0      	b.n	800808a <_dtoa_r+0x8a>
 80080c8:	ab12      	add	r3, sp, #72	; 0x48
 80080ca:	9301      	str	r3, [sp, #4]
 80080cc:	ab13      	add	r3, sp, #76	; 0x4c
 80080ce:	9300      	str	r3, [sp, #0]
 80080d0:	4632      	mov	r2, r6
 80080d2:	463b      	mov	r3, r7
 80080d4:	4620      	mov	r0, r4
 80080d6:	f001 f9f7 	bl	80094c8 <__d2b>
 80080da:	f3c9 550a 	ubfx	r5, r9, #20, #11
 80080de:	4682      	mov	sl, r0
 80080e0:	2d00      	cmp	r5, #0
 80080e2:	d07d      	beq.n	80081e0 <_dtoa_r+0x1e0>
 80080e4:	4630      	mov	r0, r6
 80080e6:	f3c7 0313 	ubfx	r3, r7, #0, #20
 80080ea:	f043 517f 	orr.w	r1, r3, #1069547520	; 0x3fc00000
 80080ee:	f441 1140 	orr.w	r1, r1, #3145728	; 0x300000
 80080f2:	f2a5 35ff 	subw	r5, r5, #1023	; 0x3ff
 80080f6:	f8cd 8040 	str.w	r8, [sp, #64]	; 0x40
 80080fa:	2200      	movs	r2, #0
 80080fc:	4b86      	ldr	r3, [pc, #536]	; (8008318 <_dtoa_r+0x318>)
 80080fe:	f7fc f89f 	bl	8004240 <__aeabi_dsub>
 8008102:	a37b      	add	r3, pc, #492	; (adr r3, 80082f0 <_dtoa_r+0x2f0>)
 8008104:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008108:	f7fc fa4e 	bl	80045a8 <__aeabi_dmul>
 800810c:	a37a      	add	r3, pc, #488	; (adr r3, 80082f8 <_dtoa_r+0x2f8>)
 800810e:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008112:	f7fc f897 	bl	8004244 <__adddf3>
 8008116:	4606      	mov	r6, r0
 8008118:	4628      	mov	r0, r5
 800811a:	460f      	mov	r7, r1
 800811c:	f7fc f9de 	bl	80044dc <__aeabi_i2d>
 8008120:	a377      	add	r3, pc, #476	; (adr r3, 8008300 <_dtoa_r+0x300>)
 8008122:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008126:	f7fc fa3f 	bl	80045a8 <__aeabi_dmul>
 800812a:	4602      	mov	r2, r0
 800812c:	460b      	mov	r3, r1
 800812e:	4630      	mov	r0, r6
 8008130:	4639      	mov	r1, r7
 8008132:	f7fc f887 	bl	8004244 <__adddf3>
 8008136:	4606      	mov	r6, r0
 8008138:	460f      	mov	r7, r1
 800813a:	f7fc fce5 	bl	8004b08 <__aeabi_d2iz>
 800813e:	2200      	movs	r2, #0
 8008140:	4683      	mov	fp, r0
 8008142:	2300      	movs	r3, #0
 8008144:	4630      	mov	r0, r6
 8008146:	4639      	mov	r1, r7
 8008148:	f7fc fca0 	bl	8004a8c <__aeabi_dcmplt>
 800814c:	b158      	cbz	r0, 8008166 <_dtoa_r+0x166>
 800814e:	4658      	mov	r0, fp
 8008150:	f7fc f9c4 	bl	80044dc <__aeabi_i2d>
 8008154:	4602      	mov	r2, r0
 8008156:	460b      	mov	r3, r1
 8008158:	4630      	mov	r0, r6
 800815a:	4639      	mov	r1, r7
 800815c:	f7fc fc8c 	bl	8004a78 <__aeabi_dcmpeq>
 8008160:	b908      	cbnz	r0, 8008166 <_dtoa_r+0x166>
 8008162:	f10b 3bff 	add.w	fp, fp, #4294967295
 8008166:	f1bb 0f16 	cmp.w	fp, #22
 800816a:	d858      	bhi.n	800821e <_dtoa_r+0x21e>
 800816c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8008170:	496a      	ldr	r1, [pc, #424]	; (800831c <_dtoa_r+0x31c>)
 8008172:	eb01 01cb 	add.w	r1, r1, fp, lsl #3
 8008176:	e9d1 0100 	ldrd	r0, r1, [r1]
 800817a:	f7fc fca5 	bl	8004ac8 <__aeabi_dcmpgt>
 800817e:	2800      	cmp	r0, #0
 8008180:	d04f      	beq.n	8008222 <_dtoa_r+0x222>
 8008182:	2300      	movs	r3, #0
 8008184:	f10b 3bff 	add.w	fp, fp, #4294967295
 8008188:	930d      	str	r3, [sp, #52]	; 0x34
 800818a:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800818c:	1b5d      	subs	r5, r3, r5
 800818e:	1e6b      	subs	r3, r5, #1
 8008190:	9307      	str	r3, [sp, #28]
 8008192:	bf43      	ittte	mi
 8008194:	2300      	movmi	r3, #0
 8008196:	f1c5 0801 	rsbmi	r8, r5, #1
 800819a:	9307      	strmi	r3, [sp, #28]
 800819c:	f04f 0800 	movpl.w	r8, #0
 80081a0:	f1bb 0f00 	cmp.w	fp, #0
 80081a4:	db3f      	blt.n	8008226 <_dtoa_r+0x226>
 80081a6:	9b07      	ldr	r3, [sp, #28]
 80081a8:	f8cd b030 	str.w	fp, [sp, #48]	; 0x30
 80081ac:	445b      	add	r3, fp
 80081ae:	9307      	str	r3, [sp, #28]
 80081b0:	2300      	movs	r3, #0
 80081b2:	9308      	str	r3, [sp, #32]
 80081b4:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 80081b6:	2b09      	cmp	r3, #9
 80081b8:	f200 80b4 	bhi.w	8008324 <_dtoa_r+0x324>
 80081bc:	2b05      	cmp	r3, #5
 80081be:	bfc4      	itt	gt
 80081c0:	3b04      	subgt	r3, #4
 80081c2:	931e      	strgt	r3, [sp, #120]	; 0x78
 80081c4:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 80081c6:	bfc8      	it	gt
 80081c8:	2600      	movgt	r6, #0
 80081ca:	f1a3 0302 	sub.w	r3, r3, #2
 80081ce:	bfd8      	it	le
 80081d0:	2601      	movle	r6, #1
 80081d2:	2b03      	cmp	r3, #3
 80081d4:	f200 80b2 	bhi.w	800833c <_dtoa_r+0x33c>
 80081d8:	e8df f003 	tbb	[pc, r3]
 80081dc:	782d8684 	.word	0x782d8684
 80081e0:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 80081e2:	9d12      	ldr	r5, [sp, #72]	; 0x48
 80081e4:	441d      	add	r5, r3
 80081e6:	f205 4332 	addw	r3, r5, #1074	; 0x432
 80081ea:	2b20      	cmp	r3, #32
 80081ec:	dd11      	ble.n	8008212 <_dtoa_r+0x212>
 80081ee:	9a02      	ldr	r2, [sp, #8]
 80081f0:	f205 4012 	addw	r0, r5, #1042	; 0x412
 80081f4:	f1c3 0340 	rsb	r3, r3, #64	; 0x40
 80081f8:	fa22 f000 	lsr.w	r0, r2, r0
 80081fc:	fa09 f303 	lsl.w	r3, r9, r3
 8008200:	4318      	orrs	r0, r3
 8008202:	f7fc f95b 	bl	80044bc <__aeabi_ui2d>
 8008206:	2301      	movs	r3, #1
 8008208:	f1a1 71f8 	sub.w	r1, r1, #32505856	; 0x1f00000
 800820c:	3d01      	subs	r5, #1
 800820e:	9310      	str	r3, [sp, #64]	; 0x40
 8008210:	e773      	b.n	80080fa <_dtoa_r+0xfa>
 8008212:	f1c3 0020 	rsb	r0, r3, #32
 8008216:	9b02      	ldr	r3, [sp, #8]
 8008218:	fa03 f000 	lsl.w	r0, r3, r0
 800821c:	e7f1      	b.n	8008202 <_dtoa_r+0x202>
 800821e:	2301      	movs	r3, #1
 8008220:	e7b2      	b.n	8008188 <_dtoa_r+0x188>
 8008222:	900d      	str	r0, [sp, #52]	; 0x34
 8008224:	e7b1      	b.n	800818a <_dtoa_r+0x18a>
 8008226:	f1cb 0300 	rsb	r3, fp, #0
 800822a:	9308      	str	r3, [sp, #32]
 800822c:	2300      	movs	r3, #0
 800822e:	eba8 080b 	sub.w	r8, r8, fp
 8008232:	930c      	str	r3, [sp, #48]	; 0x30
 8008234:	e7be      	b.n	80081b4 <_dtoa_r+0x1b4>
 8008236:	2301      	movs	r3, #1
 8008238:	9309      	str	r3, [sp, #36]	; 0x24
 800823a:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800823c:	2b00      	cmp	r3, #0
 800823e:	f340 8080 	ble.w	8008342 <_dtoa_r+0x342>
 8008242:	4699      	mov	r9, r3
 8008244:	9304      	str	r3, [sp, #16]
 8008246:	2200      	movs	r2, #0
 8008248:	2104      	movs	r1, #4
 800824a:	6a65      	ldr	r5, [r4, #36]	; 0x24
 800824c:	606a      	str	r2, [r5, #4]
 800824e:	f101 0214 	add.w	r2, r1, #20
 8008252:	429a      	cmp	r2, r3
 8008254:	d97a      	bls.n	800834c <_dtoa_r+0x34c>
 8008256:	6869      	ldr	r1, [r5, #4]
 8008258:	4620      	mov	r0, r4
 800825a:	f000 feb4 	bl	8008fc6 <_Balloc>
 800825e:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8008260:	6028      	str	r0, [r5, #0]
 8008262:	681b      	ldr	r3, [r3, #0]
 8008264:	f1b9 0f0e 	cmp.w	r9, #14
 8008268:	9306      	str	r3, [sp, #24]
 800826a:	f200 80f0 	bhi.w	800844e <_dtoa_r+0x44e>
 800826e:	2e00      	cmp	r6, #0
 8008270:	f000 80ed 	beq.w	800844e <_dtoa_r+0x44e>
 8008274:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8008278:	f1bb 0f00 	cmp.w	fp, #0
 800827c:	e9cd 230e 	strd	r2, r3, [sp, #56]	; 0x38
 8008280:	dd79      	ble.n	8008376 <_dtoa_r+0x376>
 8008282:	4a26      	ldr	r2, [pc, #152]	; (800831c <_dtoa_r+0x31c>)
 8008284:	f00b 030f 	and.w	r3, fp, #15
 8008288:	ea4f 162b 	mov.w	r6, fp, asr #4
 800828c:	eb02 03c3 	add.w	r3, r2, r3, lsl #3
 8008290:	06f0      	lsls	r0, r6, #27
 8008292:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008296:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 800829a:	d55c      	bpl.n	8008356 <_dtoa_r+0x356>
 800829c:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 80082a0:	4b1f      	ldr	r3, [pc, #124]	; (8008320 <_dtoa_r+0x320>)
 80082a2:	2503      	movs	r5, #3
 80082a4:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
 80082a8:	f7fc faa8 	bl	80047fc <__aeabi_ddiv>
 80082ac:	e9cd 0102 	strd	r0, r1, [sp, #8]
 80082b0:	f006 060f 	and.w	r6, r6, #15
 80082b4:	4f1a      	ldr	r7, [pc, #104]	; (8008320 <_dtoa_r+0x320>)
 80082b6:	2e00      	cmp	r6, #0
 80082b8:	d14f      	bne.n	800835a <_dtoa_r+0x35a>
 80082ba:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 80082be:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 80082c2:	f7fc fa9b 	bl	80047fc <__aeabi_ddiv>
 80082c6:	e9cd 0102 	strd	r0, r1, [sp, #8]
 80082ca:	e06e      	b.n	80083aa <_dtoa_r+0x3aa>
 80082cc:	2301      	movs	r3, #1
 80082ce:	9309      	str	r3, [sp, #36]	; 0x24
 80082d0:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 80082d2:	445b      	add	r3, fp
 80082d4:	f103 0901 	add.w	r9, r3, #1
 80082d8:	9304      	str	r3, [sp, #16]
 80082da:	464b      	mov	r3, r9
 80082dc:	2b01      	cmp	r3, #1
 80082de:	bfb8      	it	lt
 80082e0:	2301      	movlt	r3, #1
 80082e2:	e7b0      	b.n	8008246 <_dtoa_r+0x246>
 80082e4:	2300      	movs	r3, #0
 80082e6:	e7a7      	b.n	8008238 <_dtoa_r+0x238>
 80082e8:	2300      	movs	r3, #0
 80082ea:	e7f0      	b.n	80082ce <_dtoa_r+0x2ce>
 80082ec:	f3af 8000 	nop.w
 80082f0:	636f4361 	.word	0x636f4361
 80082f4:	3fd287a7 	.word	0x3fd287a7
 80082f8:	8b60c8b3 	.word	0x8b60c8b3
 80082fc:	3fc68a28 	.word	0x3fc68a28
 8008300:	509f79fb 	.word	0x509f79fb
 8008304:	3fd34413 	.word	0x3fd34413
 8008308:	7ff00000 	.word	0x7ff00000
 800830c:	08009cdd 	.word	0x08009cdd
 8008310:	08009cd4 	.word	0x08009cd4
 8008314:	08009cb1 	.word	0x08009cb1
 8008318:	3ff80000 	.word	0x3ff80000
 800831c:	08009d70 	.word	0x08009d70
 8008320:	08009d48 	.word	0x08009d48
 8008324:	2601      	movs	r6, #1
 8008326:	2300      	movs	r3, #0
 8008328:	9609      	str	r6, [sp, #36]	; 0x24
 800832a:	931e      	str	r3, [sp, #120]	; 0x78
 800832c:	f04f 33ff 	mov.w	r3, #4294967295
 8008330:	2200      	movs	r2, #0
 8008332:	9304      	str	r3, [sp, #16]
 8008334:	4699      	mov	r9, r3
 8008336:	2312      	movs	r3, #18
 8008338:	921f      	str	r2, [sp, #124]	; 0x7c
 800833a:	e784      	b.n	8008246 <_dtoa_r+0x246>
 800833c:	2301      	movs	r3, #1
 800833e:	9309      	str	r3, [sp, #36]	; 0x24
 8008340:	e7f4      	b.n	800832c <_dtoa_r+0x32c>
 8008342:	2301      	movs	r3, #1
 8008344:	9304      	str	r3, [sp, #16]
 8008346:	4699      	mov	r9, r3
 8008348:	461a      	mov	r2, r3
 800834a:	e7f5      	b.n	8008338 <_dtoa_r+0x338>
 800834c:	686a      	ldr	r2, [r5, #4]
 800834e:	0049      	lsls	r1, r1, #1
 8008350:	3201      	adds	r2, #1
 8008352:	606a      	str	r2, [r5, #4]
 8008354:	e77b      	b.n	800824e <_dtoa_r+0x24e>
 8008356:	2502      	movs	r5, #2
 8008358:	e7ac      	b.n	80082b4 <_dtoa_r+0x2b4>
 800835a:	07f1      	lsls	r1, r6, #31
 800835c:	d508      	bpl.n	8008370 <_dtoa_r+0x370>
 800835e:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 8008362:	e9d7 2300 	ldrd	r2, r3, [r7]
 8008366:	f7fc f91f 	bl	80045a8 <__aeabi_dmul>
 800836a:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800836e:	3501      	adds	r5, #1
 8008370:	1076      	asrs	r6, r6, #1
 8008372:	3708      	adds	r7, #8
 8008374:	e79f      	b.n	80082b6 <_dtoa_r+0x2b6>
 8008376:	f000 80a5 	beq.w	80084c4 <_dtoa_r+0x4c4>
 800837a:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 800837e:	f1cb 0600 	rsb	r6, fp, #0
 8008382:	4ba2      	ldr	r3, [pc, #648]	; (800860c <_dtoa_r+0x60c>)
 8008384:	f006 020f 	and.w	r2, r6, #15
 8008388:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 800838c:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008390:	f7fc f90a 	bl	80045a8 <__aeabi_dmul>
 8008394:	2502      	movs	r5, #2
 8008396:	2300      	movs	r3, #0
 8008398:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800839c:	4f9c      	ldr	r7, [pc, #624]	; (8008610 <_dtoa_r+0x610>)
 800839e:	1136      	asrs	r6, r6, #4
 80083a0:	2e00      	cmp	r6, #0
 80083a2:	f040 8084 	bne.w	80084ae <_dtoa_r+0x4ae>
 80083a6:	2b00      	cmp	r3, #0
 80083a8:	d18d      	bne.n	80082c6 <_dtoa_r+0x2c6>
 80083aa:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 80083ac:	2b00      	cmp	r3, #0
 80083ae:	f000 808b 	beq.w	80084c8 <_dtoa_r+0x4c8>
 80083b2:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 80083b6:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 80083ba:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 80083be:	2200      	movs	r2, #0
 80083c0:	4b94      	ldr	r3, [pc, #592]	; (8008614 <_dtoa_r+0x614>)
 80083c2:	f7fc fb63 	bl	8004a8c <__aeabi_dcmplt>
 80083c6:	2800      	cmp	r0, #0
 80083c8:	d07e      	beq.n	80084c8 <_dtoa_r+0x4c8>
 80083ca:	f1b9 0f00 	cmp.w	r9, #0
 80083ce:	d07b      	beq.n	80084c8 <_dtoa_r+0x4c8>
 80083d0:	9b04      	ldr	r3, [sp, #16]
 80083d2:	2b00      	cmp	r3, #0
 80083d4:	dd37      	ble.n	8008446 <_dtoa_r+0x446>
 80083d6:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 80083da:	2200      	movs	r2, #0
 80083dc:	4b8e      	ldr	r3, [pc, #568]	; (8008618 <_dtoa_r+0x618>)
 80083de:	f7fc f8e3 	bl	80045a8 <__aeabi_dmul>
 80083e2:	e9cd 0102 	strd	r0, r1, [sp, #8]
 80083e6:	9e04      	ldr	r6, [sp, #16]
 80083e8:	f10b 37ff 	add.w	r7, fp, #4294967295
 80083ec:	3501      	adds	r5, #1
 80083ee:	4628      	mov	r0, r5
 80083f0:	f7fc f874 	bl	80044dc <__aeabi_i2d>
 80083f4:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 80083f8:	f7fc f8d6 	bl	80045a8 <__aeabi_dmul>
 80083fc:	4b87      	ldr	r3, [pc, #540]	; (800861c <_dtoa_r+0x61c>)
 80083fe:	2200      	movs	r2, #0
 8008400:	f7fb ff20 	bl	8004244 <__adddf3>
 8008404:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8008408:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
 800840a:	f1a3 7550 	sub.w	r5, r3, #54525952	; 0x3400000
 800840e:	950b      	str	r5, [sp, #44]	; 0x2c
 8008410:	2e00      	cmp	r6, #0
 8008412:	d15c      	bne.n	80084ce <_dtoa_r+0x4ce>
 8008414:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8008418:	2200      	movs	r2, #0
 800841a:	4b81      	ldr	r3, [pc, #516]	; (8008620 <_dtoa_r+0x620>)
 800841c:	f7fb ff10 	bl	8004240 <__aeabi_dsub>
 8008420:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8008422:	462b      	mov	r3, r5
 8008424:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8008428:	f7fc fb4e 	bl	8004ac8 <__aeabi_dcmpgt>
 800842c:	2800      	cmp	r0, #0
 800842e:	f040 82f7 	bne.w	8008a20 <_dtoa_r+0xa20>
 8008432:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8008436:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8008438:	f105 4300 	add.w	r3, r5, #2147483648	; 0x80000000
 800843c:	f7fc fb26 	bl	8004a8c <__aeabi_dcmplt>
 8008440:	2800      	cmp	r0, #0
 8008442:	f040 82eb 	bne.w	8008a1c <_dtoa_r+0xa1c>
 8008446:	e9dd 230e 	ldrd	r2, r3, [sp, #56]	; 0x38
 800844a:	e9cd 2302 	strd	r2, r3, [sp, #8]
 800844e:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 8008450:	2b00      	cmp	r3, #0
 8008452:	f2c0 8150 	blt.w	80086f6 <_dtoa_r+0x6f6>
 8008456:	f1bb 0f0e 	cmp.w	fp, #14
 800845a:	f300 814c 	bgt.w	80086f6 <_dtoa_r+0x6f6>
 800845e:	4b6b      	ldr	r3, [pc, #428]	; (800860c <_dtoa_r+0x60c>)
 8008460:	eb03 03cb 	add.w	r3, r3, fp, lsl #3
 8008464:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008468:	e9cd 2304 	strd	r2, r3, [sp, #16]
 800846c:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800846e:	2b00      	cmp	r3, #0
 8008470:	f280 80da 	bge.w	8008628 <_dtoa_r+0x628>
 8008474:	f1b9 0f00 	cmp.w	r9, #0
 8008478:	f300 80d6 	bgt.w	8008628 <_dtoa_r+0x628>
 800847c:	f040 82cd 	bne.w	8008a1a <_dtoa_r+0xa1a>
 8008480:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 8008484:	2200      	movs	r2, #0
 8008486:	4b66      	ldr	r3, [pc, #408]	; (8008620 <_dtoa_r+0x620>)
 8008488:	f7fc f88e 	bl	80045a8 <__aeabi_dmul>
 800848c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8008490:	f7fc fb10 	bl	8004ab4 <__aeabi_dcmpge>
 8008494:	464e      	mov	r6, r9
 8008496:	464f      	mov	r7, r9
 8008498:	2800      	cmp	r0, #0
 800849a:	f040 82a4 	bne.w	80089e6 <_dtoa_r+0x9e6>
 800849e:	9b06      	ldr	r3, [sp, #24]
 80084a0:	9a06      	ldr	r2, [sp, #24]
 80084a2:	1c5d      	adds	r5, r3, #1
 80084a4:	2331      	movs	r3, #49	; 0x31
 80084a6:	f10b 0b01 	add.w	fp, fp, #1
 80084aa:	7013      	strb	r3, [r2, #0]
 80084ac:	e29f      	b.n	80089ee <_dtoa_r+0x9ee>
 80084ae:	07f2      	lsls	r2, r6, #31
 80084b0:	d505      	bpl.n	80084be <_dtoa_r+0x4be>
 80084b2:	e9d7 2300 	ldrd	r2, r3, [r7]
 80084b6:	f7fc f877 	bl	80045a8 <__aeabi_dmul>
 80084ba:	2301      	movs	r3, #1
 80084bc:	3501      	adds	r5, #1
 80084be:	1076      	asrs	r6, r6, #1
 80084c0:	3708      	adds	r7, #8
 80084c2:	e76d      	b.n	80083a0 <_dtoa_r+0x3a0>
 80084c4:	2502      	movs	r5, #2
 80084c6:	e770      	b.n	80083aa <_dtoa_r+0x3aa>
 80084c8:	465f      	mov	r7, fp
 80084ca:	464e      	mov	r6, r9
 80084cc:	e78f      	b.n	80083ee <_dtoa_r+0x3ee>
 80084ce:	9a06      	ldr	r2, [sp, #24]
 80084d0:	4b4e      	ldr	r3, [pc, #312]	; (800860c <_dtoa_r+0x60c>)
 80084d2:	4432      	add	r2, r6
 80084d4:	9211      	str	r2, [sp, #68]	; 0x44
 80084d6:	9a09      	ldr	r2, [sp, #36]	; 0x24
 80084d8:	1e71      	subs	r1, r6, #1
 80084da:	2a00      	cmp	r2, #0
 80084dc:	d048      	beq.n	8008570 <_dtoa_r+0x570>
 80084de:	eb03 03c1 	add.w	r3, r3, r1, lsl #3
 80084e2:	e9d3 2300 	ldrd	r2, r3, [r3]
 80084e6:	2000      	movs	r0, #0
 80084e8:	494e      	ldr	r1, [pc, #312]	; (8008624 <_dtoa_r+0x624>)
 80084ea:	f7fc f987 	bl	80047fc <__aeabi_ddiv>
 80084ee:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 80084f2:	f7fb fea5 	bl	8004240 <__aeabi_dsub>
 80084f6:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 80084fa:	9d06      	ldr	r5, [sp, #24]
 80084fc:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8008500:	f7fc fb02 	bl	8004b08 <__aeabi_d2iz>
 8008504:	4606      	mov	r6, r0
 8008506:	f7fb ffe9 	bl	80044dc <__aeabi_i2d>
 800850a:	4602      	mov	r2, r0
 800850c:	460b      	mov	r3, r1
 800850e:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8008512:	f7fb fe95 	bl	8004240 <__aeabi_dsub>
 8008516:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800851a:	3630      	adds	r6, #48	; 0x30
 800851c:	f805 6b01 	strb.w	r6, [r5], #1
 8008520:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8008524:	f7fc fab2 	bl	8004a8c <__aeabi_dcmplt>
 8008528:	2800      	cmp	r0, #0
 800852a:	d164      	bne.n	80085f6 <_dtoa_r+0x5f6>
 800852c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8008530:	2000      	movs	r0, #0
 8008532:	4938      	ldr	r1, [pc, #224]	; (8008614 <_dtoa_r+0x614>)
 8008534:	f7fb fe84 	bl	8004240 <__aeabi_dsub>
 8008538:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800853c:	f7fc faa6 	bl	8004a8c <__aeabi_dcmplt>
 8008540:	2800      	cmp	r0, #0
 8008542:	f040 80b9 	bne.w	80086b8 <_dtoa_r+0x6b8>
 8008546:	9b11      	ldr	r3, [sp, #68]	; 0x44
 8008548:	429d      	cmp	r5, r3
 800854a:	f43f af7c 	beq.w	8008446 <_dtoa_r+0x446>
 800854e:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 8008552:	2200      	movs	r2, #0
 8008554:	4b30      	ldr	r3, [pc, #192]	; (8008618 <_dtoa_r+0x618>)
 8008556:	f7fc f827 	bl	80045a8 <__aeabi_dmul>
 800855a:	2200      	movs	r2, #0
 800855c:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8008560:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8008564:	4b2c      	ldr	r3, [pc, #176]	; (8008618 <_dtoa_r+0x618>)
 8008566:	f7fc f81f 	bl	80045a8 <__aeabi_dmul>
 800856a:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800856e:	e7c5      	b.n	80084fc <_dtoa_r+0x4fc>
 8008570:	eb03 01c1 	add.w	r1, r3, r1, lsl #3
 8008574:	e9d1 0100 	ldrd	r0, r1, [r1]
 8008578:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800857c:	f7fc f814 	bl	80045a8 <__aeabi_dmul>
 8008580:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8008584:	9d06      	ldr	r5, [sp, #24]
 8008586:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800858a:	f7fc fabd 	bl	8004b08 <__aeabi_d2iz>
 800858e:	4606      	mov	r6, r0
 8008590:	f7fb ffa4 	bl	80044dc <__aeabi_i2d>
 8008594:	4602      	mov	r2, r0
 8008596:	460b      	mov	r3, r1
 8008598:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800859c:	f7fb fe50 	bl	8004240 <__aeabi_dsub>
 80085a0:	3630      	adds	r6, #48	; 0x30
 80085a2:	9b11      	ldr	r3, [sp, #68]	; 0x44
 80085a4:	f805 6b01 	strb.w	r6, [r5], #1
 80085a8:	42ab      	cmp	r3, r5
 80085aa:	e9cd 0102 	strd	r0, r1, [sp, #8]
 80085ae:	f04f 0200 	mov.w	r2, #0
 80085b2:	d124      	bne.n	80085fe <_dtoa_r+0x5fe>
 80085b4:	4b1b      	ldr	r3, [pc, #108]	; (8008624 <_dtoa_r+0x624>)
 80085b6:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 80085ba:	f7fb fe43 	bl	8004244 <__adddf3>
 80085be:	4602      	mov	r2, r0
 80085c0:	460b      	mov	r3, r1
 80085c2:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 80085c6:	f7fc fa7f 	bl	8004ac8 <__aeabi_dcmpgt>
 80085ca:	2800      	cmp	r0, #0
 80085cc:	d174      	bne.n	80086b8 <_dtoa_r+0x6b8>
 80085ce:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 80085d2:	2000      	movs	r0, #0
 80085d4:	4913      	ldr	r1, [pc, #76]	; (8008624 <_dtoa_r+0x624>)
 80085d6:	f7fb fe33 	bl	8004240 <__aeabi_dsub>
 80085da:	4602      	mov	r2, r0
 80085dc:	460b      	mov	r3, r1
 80085de:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 80085e2:	f7fc fa53 	bl	8004a8c <__aeabi_dcmplt>
 80085e6:	2800      	cmp	r0, #0
 80085e8:	f43f af2d 	beq.w	8008446 <_dtoa_r+0x446>
 80085ec:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 80085f0:	1e6a      	subs	r2, r5, #1
 80085f2:	2b30      	cmp	r3, #48	; 0x30
 80085f4:	d001      	beq.n	80085fa <_dtoa_r+0x5fa>
 80085f6:	46bb      	mov	fp, r7
 80085f8:	e04d      	b.n	8008696 <_dtoa_r+0x696>
 80085fa:	4615      	mov	r5, r2
 80085fc:	e7f6      	b.n	80085ec <_dtoa_r+0x5ec>
 80085fe:	4b06      	ldr	r3, [pc, #24]	; (8008618 <_dtoa_r+0x618>)
 8008600:	f7fb ffd2 	bl	80045a8 <__aeabi_dmul>
 8008604:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8008608:	e7bd      	b.n	8008586 <_dtoa_r+0x586>
 800860a:	bf00      	nop
 800860c:	08009d70 	.word	0x08009d70
 8008610:	08009d48 	.word	0x08009d48
 8008614:	3ff00000 	.word	0x3ff00000
 8008618:	40240000 	.word	0x40240000
 800861c:	401c0000 	.word	0x401c0000
 8008620:	40140000 	.word	0x40140000
 8008624:	3fe00000 	.word	0x3fe00000
 8008628:	9d06      	ldr	r5, [sp, #24]
 800862a:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 800862e:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 8008632:	4630      	mov	r0, r6
 8008634:	4639      	mov	r1, r7
 8008636:	f7fc f8e1 	bl	80047fc <__aeabi_ddiv>
 800863a:	f7fc fa65 	bl	8004b08 <__aeabi_d2iz>
 800863e:	4680      	mov	r8, r0
 8008640:	f7fb ff4c 	bl	80044dc <__aeabi_i2d>
 8008644:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 8008648:	f7fb ffae 	bl	80045a8 <__aeabi_dmul>
 800864c:	4602      	mov	r2, r0
 800864e:	460b      	mov	r3, r1
 8008650:	4630      	mov	r0, r6
 8008652:	4639      	mov	r1, r7
 8008654:	f7fb fdf4 	bl	8004240 <__aeabi_dsub>
 8008658:	f108 0630 	add.w	r6, r8, #48	; 0x30
 800865c:	f805 6b01 	strb.w	r6, [r5], #1
 8008660:	9e06      	ldr	r6, [sp, #24]
 8008662:	4602      	mov	r2, r0
 8008664:	1bae      	subs	r6, r5, r6
 8008666:	45b1      	cmp	r9, r6
 8008668:	460b      	mov	r3, r1
 800866a:	d137      	bne.n	80086dc <_dtoa_r+0x6dc>
 800866c:	f7fb fdea 	bl	8004244 <__adddf3>
 8008670:	4606      	mov	r6, r0
 8008672:	460f      	mov	r7, r1
 8008674:	4602      	mov	r2, r0
 8008676:	460b      	mov	r3, r1
 8008678:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800867c:	f7fc fa06 	bl	8004a8c <__aeabi_dcmplt>
 8008680:	b9c8      	cbnz	r0, 80086b6 <_dtoa_r+0x6b6>
 8008682:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 8008686:	4632      	mov	r2, r6
 8008688:	463b      	mov	r3, r7
 800868a:	f7fc f9f5 	bl	8004a78 <__aeabi_dcmpeq>
 800868e:	b110      	cbz	r0, 8008696 <_dtoa_r+0x696>
 8008690:	f018 0f01 	tst.w	r8, #1
 8008694:	d10f      	bne.n	80086b6 <_dtoa_r+0x6b6>
 8008696:	4651      	mov	r1, sl
 8008698:	4620      	mov	r0, r4
 800869a:	f000 fcc8 	bl	800902e <_Bfree>
 800869e:	2300      	movs	r3, #0
 80086a0:	9a20      	ldr	r2, [sp, #128]	; 0x80
 80086a2:	702b      	strb	r3, [r5, #0]
 80086a4:	f10b 0301 	add.w	r3, fp, #1
 80086a8:	6013      	str	r3, [r2, #0]
 80086aa:	9b22      	ldr	r3, [sp, #136]	; 0x88
 80086ac:	2b00      	cmp	r3, #0
 80086ae:	f43f acec 	beq.w	800808a <_dtoa_r+0x8a>
 80086b2:	601d      	str	r5, [r3, #0]
 80086b4:	e4e9      	b.n	800808a <_dtoa_r+0x8a>
 80086b6:	465f      	mov	r7, fp
 80086b8:	f815 2c01 	ldrb.w	r2, [r5, #-1]
 80086bc:	1e6b      	subs	r3, r5, #1
 80086be:	2a39      	cmp	r2, #57	; 0x39
 80086c0:	d106      	bne.n	80086d0 <_dtoa_r+0x6d0>
 80086c2:	9a06      	ldr	r2, [sp, #24]
 80086c4:	429a      	cmp	r2, r3
 80086c6:	d107      	bne.n	80086d8 <_dtoa_r+0x6d8>
 80086c8:	2330      	movs	r3, #48	; 0x30
 80086ca:	7013      	strb	r3, [r2, #0]
 80086cc:	4613      	mov	r3, r2
 80086ce:	3701      	adds	r7, #1
 80086d0:	781a      	ldrb	r2, [r3, #0]
 80086d2:	3201      	adds	r2, #1
 80086d4:	701a      	strb	r2, [r3, #0]
 80086d6:	e78e      	b.n	80085f6 <_dtoa_r+0x5f6>
 80086d8:	461d      	mov	r5, r3
 80086da:	e7ed      	b.n	80086b8 <_dtoa_r+0x6b8>
 80086dc:	2200      	movs	r2, #0
 80086de:	4bb5      	ldr	r3, [pc, #724]	; (80089b4 <_dtoa_r+0x9b4>)
 80086e0:	f7fb ff62 	bl	80045a8 <__aeabi_dmul>
 80086e4:	2200      	movs	r2, #0
 80086e6:	2300      	movs	r3, #0
 80086e8:	4606      	mov	r6, r0
 80086ea:	460f      	mov	r7, r1
 80086ec:	f7fc f9c4 	bl	8004a78 <__aeabi_dcmpeq>
 80086f0:	2800      	cmp	r0, #0
 80086f2:	d09c      	beq.n	800862e <_dtoa_r+0x62e>
 80086f4:	e7cf      	b.n	8008696 <_dtoa_r+0x696>
 80086f6:	9a09      	ldr	r2, [sp, #36]	; 0x24
 80086f8:	2a00      	cmp	r2, #0
 80086fa:	f000 8129 	beq.w	8008950 <_dtoa_r+0x950>
 80086fe:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 8008700:	2a01      	cmp	r2, #1
 8008702:	f300 810e 	bgt.w	8008922 <_dtoa_r+0x922>
 8008706:	9a10      	ldr	r2, [sp, #64]	; 0x40
 8008708:	2a00      	cmp	r2, #0
 800870a:	f000 8106 	beq.w	800891a <_dtoa_r+0x91a>
 800870e:	f203 4333 	addw	r3, r3, #1075	; 0x433
 8008712:	4645      	mov	r5, r8
 8008714:	9e08      	ldr	r6, [sp, #32]
 8008716:	9a07      	ldr	r2, [sp, #28]
 8008718:	2101      	movs	r1, #1
 800871a:	441a      	add	r2, r3
 800871c:	4620      	mov	r0, r4
 800871e:	4498      	add	r8, r3
 8008720:	9207      	str	r2, [sp, #28]
 8008722:	f000 fd24 	bl	800916e <__i2b>
 8008726:	4607      	mov	r7, r0
 8008728:	2d00      	cmp	r5, #0
 800872a:	dd0b      	ble.n	8008744 <_dtoa_r+0x744>
 800872c:	9b07      	ldr	r3, [sp, #28]
 800872e:	2b00      	cmp	r3, #0
 8008730:	dd08      	ble.n	8008744 <_dtoa_r+0x744>
 8008732:	42ab      	cmp	r3, r5
 8008734:	bfa8      	it	ge
 8008736:	462b      	movge	r3, r5
 8008738:	9a07      	ldr	r2, [sp, #28]
 800873a:	eba8 0803 	sub.w	r8, r8, r3
 800873e:	1aed      	subs	r5, r5, r3
 8008740:	1ad3      	subs	r3, r2, r3
 8008742:	9307      	str	r3, [sp, #28]
 8008744:	9b08      	ldr	r3, [sp, #32]
 8008746:	b1fb      	cbz	r3, 8008788 <_dtoa_r+0x788>
 8008748:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800874a:	2b00      	cmp	r3, #0
 800874c:	f000 8104 	beq.w	8008958 <_dtoa_r+0x958>
 8008750:	2e00      	cmp	r6, #0
 8008752:	dd11      	ble.n	8008778 <_dtoa_r+0x778>
 8008754:	4639      	mov	r1, r7
 8008756:	4632      	mov	r2, r6
 8008758:	4620      	mov	r0, r4
 800875a:	f000 fd9d 	bl	8009298 <__pow5mult>
 800875e:	4652      	mov	r2, sl
 8008760:	4601      	mov	r1, r0
 8008762:	4607      	mov	r7, r0
 8008764:	4620      	mov	r0, r4
 8008766:	f000 fd0b 	bl	8009180 <__multiply>
 800876a:	4651      	mov	r1, sl
 800876c:	900a      	str	r0, [sp, #40]	; 0x28
 800876e:	4620      	mov	r0, r4
 8008770:	f000 fc5d 	bl	800902e <_Bfree>
 8008774:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8008776:	469a      	mov	sl, r3
 8008778:	9b08      	ldr	r3, [sp, #32]
 800877a:	1b9a      	subs	r2, r3, r6
 800877c:	d004      	beq.n	8008788 <_dtoa_r+0x788>
 800877e:	4651      	mov	r1, sl
 8008780:	4620      	mov	r0, r4
 8008782:	f000 fd89 	bl	8009298 <__pow5mult>
 8008786:	4682      	mov	sl, r0
 8008788:	2101      	movs	r1, #1
 800878a:	4620      	mov	r0, r4
 800878c:	f000 fcef 	bl	800916e <__i2b>
 8008790:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 8008792:	4606      	mov	r6, r0
 8008794:	2b00      	cmp	r3, #0
 8008796:	f340 80e1 	ble.w	800895c <_dtoa_r+0x95c>
 800879a:	461a      	mov	r2, r3
 800879c:	4601      	mov	r1, r0
 800879e:	4620      	mov	r0, r4
 80087a0:	f000 fd7a 	bl	8009298 <__pow5mult>
 80087a4:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 80087a6:	4606      	mov	r6, r0
 80087a8:	2b01      	cmp	r3, #1
 80087aa:	f340 80da 	ble.w	8008962 <_dtoa_r+0x962>
 80087ae:	2300      	movs	r3, #0
 80087b0:	9308      	str	r3, [sp, #32]
 80087b2:	6933      	ldr	r3, [r6, #16]
 80087b4:	eb06 0383 	add.w	r3, r6, r3, lsl #2
 80087b8:	6918      	ldr	r0, [r3, #16]
 80087ba:	f000 fc8a 	bl	80090d2 <__hi0bits>
 80087be:	f1c0 0020 	rsb	r0, r0, #32
 80087c2:	9b07      	ldr	r3, [sp, #28]
 80087c4:	4418      	add	r0, r3
 80087c6:	f010 001f 	ands.w	r0, r0, #31
 80087ca:	f000 80f0 	beq.w	80089ae <_dtoa_r+0x9ae>
 80087ce:	f1c0 0320 	rsb	r3, r0, #32
 80087d2:	2b04      	cmp	r3, #4
 80087d4:	f340 80e2 	ble.w	800899c <_dtoa_r+0x99c>
 80087d8:	9b07      	ldr	r3, [sp, #28]
 80087da:	f1c0 001c 	rsb	r0, r0, #28
 80087de:	4480      	add	r8, r0
 80087e0:	4405      	add	r5, r0
 80087e2:	4403      	add	r3, r0
 80087e4:	9307      	str	r3, [sp, #28]
 80087e6:	f1b8 0f00 	cmp.w	r8, #0
 80087ea:	dd05      	ble.n	80087f8 <_dtoa_r+0x7f8>
 80087ec:	4651      	mov	r1, sl
 80087ee:	4642      	mov	r2, r8
 80087f0:	4620      	mov	r0, r4
 80087f2:	f000 fd9f 	bl	8009334 <__lshift>
 80087f6:	4682      	mov	sl, r0
 80087f8:	9b07      	ldr	r3, [sp, #28]
 80087fa:	2b00      	cmp	r3, #0
 80087fc:	dd05      	ble.n	800880a <_dtoa_r+0x80a>
 80087fe:	4631      	mov	r1, r6
 8008800:	461a      	mov	r2, r3
 8008802:	4620      	mov	r0, r4
 8008804:	f000 fd96 	bl	8009334 <__lshift>
 8008808:	4606      	mov	r6, r0
 800880a:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800880c:	2b00      	cmp	r3, #0
 800880e:	f000 80d3 	beq.w	80089b8 <_dtoa_r+0x9b8>
 8008812:	4631      	mov	r1, r6
 8008814:	4650      	mov	r0, sl
 8008816:	f000 fdde 	bl	80093d6 <__mcmp>
 800881a:	2800      	cmp	r0, #0
 800881c:	f280 80cc 	bge.w	80089b8 <_dtoa_r+0x9b8>
 8008820:	2300      	movs	r3, #0
 8008822:	4651      	mov	r1, sl
 8008824:	220a      	movs	r2, #10
 8008826:	4620      	mov	r0, r4
 8008828:	f000 fc18 	bl	800905c <__multadd>
 800882c:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800882e:	f10b 3bff 	add.w	fp, fp, #4294967295
 8008832:	4682      	mov	sl, r0
 8008834:	2b00      	cmp	r3, #0
 8008836:	f000 81a9 	beq.w	8008b8c <_dtoa_r+0xb8c>
 800883a:	2300      	movs	r3, #0
 800883c:	4639      	mov	r1, r7
 800883e:	220a      	movs	r2, #10
 8008840:	4620      	mov	r0, r4
 8008842:	f000 fc0b 	bl	800905c <__multadd>
 8008846:	9b04      	ldr	r3, [sp, #16]
 8008848:	4607      	mov	r7, r0
 800884a:	2b00      	cmp	r3, #0
 800884c:	dc03      	bgt.n	8008856 <_dtoa_r+0x856>
 800884e:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 8008850:	2b02      	cmp	r3, #2
 8008852:	f300 80b9 	bgt.w	80089c8 <_dtoa_r+0x9c8>
 8008856:	2d00      	cmp	r5, #0
 8008858:	dd05      	ble.n	8008866 <_dtoa_r+0x866>
 800885a:	4639      	mov	r1, r7
 800885c:	462a      	mov	r2, r5
 800885e:	4620      	mov	r0, r4
 8008860:	f000 fd68 	bl	8009334 <__lshift>
 8008864:	4607      	mov	r7, r0
 8008866:	9b08      	ldr	r3, [sp, #32]
 8008868:	2b00      	cmp	r3, #0
 800886a:	f000 8110 	beq.w	8008a8e <_dtoa_r+0xa8e>
 800886e:	6879      	ldr	r1, [r7, #4]
 8008870:	4620      	mov	r0, r4
 8008872:	f000 fba8 	bl	8008fc6 <_Balloc>
 8008876:	4605      	mov	r5, r0
 8008878:	693a      	ldr	r2, [r7, #16]
 800887a:	f107 010c 	add.w	r1, r7, #12
 800887e:	3202      	adds	r2, #2
 8008880:	0092      	lsls	r2, r2, #2
 8008882:	300c      	adds	r0, #12
 8008884:	f000 fb94 	bl	8008fb0 <memcpy>
 8008888:	2201      	movs	r2, #1
 800888a:	4629      	mov	r1, r5
 800888c:	4620      	mov	r0, r4
 800888e:	f000 fd51 	bl	8009334 <__lshift>
 8008892:	9707      	str	r7, [sp, #28]
 8008894:	4607      	mov	r7, r0
 8008896:	9b02      	ldr	r3, [sp, #8]
 8008898:	f8dd 8018 	ldr.w	r8, [sp, #24]
 800889c:	f003 0301 	and.w	r3, r3, #1
 80088a0:	9308      	str	r3, [sp, #32]
 80088a2:	4631      	mov	r1, r6
 80088a4:	4650      	mov	r0, sl
 80088a6:	f7ff fb1d 	bl	8007ee4 <quorem>
 80088aa:	9907      	ldr	r1, [sp, #28]
 80088ac:	4605      	mov	r5, r0
 80088ae:	f100 0930 	add.w	r9, r0, #48	; 0x30
 80088b2:	4650      	mov	r0, sl
 80088b4:	f000 fd8f 	bl	80093d6 <__mcmp>
 80088b8:	463a      	mov	r2, r7
 80088ba:	9002      	str	r0, [sp, #8]
 80088bc:	4631      	mov	r1, r6
 80088be:	4620      	mov	r0, r4
 80088c0:	f000 fda3 	bl	800940a <__mdiff>
 80088c4:	68c3      	ldr	r3, [r0, #12]
 80088c6:	4602      	mov	r2, r0
 80088c8:	2b00      	cmp	r3, #0
 80088ca:	f040 80e2 	bne.w	8008a92 <_dtoa_r+0xa92>
 80088ce:	4601      	mov	r1, r0
 80088d0:	9009      	str	r0, [sp, #36]	; 0x24
 80088d2:	4650      	mov	r0, sl
 80088d4:	f000 fd7f 	bl	80093d6 <__mcmp>
 80088d8:	4603      	mov	r3, r0
 80088da:	9a09      	ldr	r2, [sp, #36]	; 0x24
 80088dc:	4611      	mov	r1, r2
 80088de:	4620      	mov	r0, r4
 80088e0:	9309      	str	r3, [sp, #36]	; 0x24
 80088e2:	f000 fba4 	bl	800902e <_Bfree>
 80088e6:	9b09      	ldr	r3, [sp, #36]	; 0x24
 80088e8:	2b00      	cmp	r3, #0
 80088ea:	f040 80d4 	bne.w	8008a96 <_dtoa_r+0xa96>
 80088ee:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 80088f0:	2a00      	cmp	r2, #0
 80088f2:	f040 80d0 	bne.w	8008a96 <_dtoa_r+0xa96>
 80088f6:	9a08      	ldr	r2, [sp, #32]
 80088f8:	2a00      	cmp	r2, #0
 80088fa:	f040 80cc 	bne.w	8008a96 <_dtoa_r+0xa96>
 80088fe:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 8008902:	f000 80e8 	beq.w	8008ad6 <_dtoa_r+0xad6>
 8008906:	9b02      	ldr	r3, [sp, #8]
 8008908:	2b00      	cmp	r3, #0
 800890a:	dd01      	ble.n	8008910 <_dtoa_r+0x910>
 800890c:	f105 0931 	add.w	r9, r5, #49	; 0x31
 8008910:	f108 0501 	add.w	r5, r8, #1
 8008914:	f888 9000 	strb.w	r9, [r8]
 8008918:	e06b      	b.n	80089f2 <_dtoa_r+0x9f2>
 800891a:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800891c:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
 8008920:	e6f7      	b.n	8008712 <_dtoa_r+0x712>
 8008922:	9b08      	ldr	r3, [sp, #32]
 8008924:	f109 36ff 	add.w	r6, r9, #4294967295
 8008928:	42b3      	cmp	r3, r6
 800892a:	bfb7      	itett	lt
 800892c:	9b08      	ldrlt	r3, [sp, #32]
 800892e:	1b9e      	subge	r6, r3, r6
 8008930:	1af2      	sublt	r2, r6, r3
 8008932:	9b0c      	ldrlt	r3, [sp, #48]	; 0x30
 8008934:	bfbf      	itttt	lt
 8008936:	9608      	strlt	r6, [sp, #32]
 8008938:	189b      	addlt	r3, r3, r2
 800893a:	930c      	strlt	r3, [sp, #48]	; 0x30
 800893c:	2600      	movlt	r6, #0
 800893e:	f1b9 0f00 	cmp.w	r9, #0
 8008942:	bfb9      	ittee	lt
 8008944:	eba8 0509 	sublt.w	r5, r8, r9
 8008948:	2300      	movlt	r3, #0
 800894a:	4645      	movge	r5, r8
 800894c:	464b      	movge	r3, r9
 800894e:	e6e2      	b.n	8008716 <_dtoa_r+0x716>
 8008950:	9e08      	ldr	r6, [sp, #32]
 8008952:	4645      	mov	r5, r8
 8008954:	9f09      	ldr	r7, [sp, #36]	; 0x24
 8008956:	e6e7      	b.n	8008728 <_dtoa_r+0x728>
 8008958:	9a08      	ldr	r2, [sp, #32]
 800895a:	e710      	b.n	800877e <_dtoa_r+0x77e>
 800895c:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800895e:	2b01      	cmp	r3, #1
 8008960:	dc18      	bgt.n	8008994 <_dtoa_r+0x994>
 8008962:	9b02      	ldr	r3, [sp, #8]
 8008964:	b9b3      	cbnz	r3, 8008994 <_dtoa_r+0x994>
 8008966:	9b03      	ldr	r3, [sp, #12]
 8008968:	f3c3 0313 	ubfx	r3, r3, #0, #20
 800896c:	b9a3      	cbnz	r3, 8008998 <_dtoa_r+0x998>
 800896e:	9b03      	ldr	r3, [sp, #12]
 8008970:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 8008974:	0d1b      	lsrs	r3, r3, #20
 8008976:	051b      	lsls	r3, r3, #20
 8008978:	b12b      	cbz	r3, 8008986 <_dtoa_r+0x986>
 800897a:	9b07      	ldr	r3, [sp, #28]
 800897c:	f108 0801 	add.w	r8, r8, #1
 8008980:	3301      	adds	r3, #1
 8008982:	9307      	str	r3, [sp, #28]
 8008984:	2301      	movs	r3, #1
 8008986:	9308      	str	r3, [sp, #32]
 8008988:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800898a:	2b00      	cmp	r3, #0
 800898c:	f47f af11 	bne.w	80087b2 <_dtoa_r+0x7b2>
 8008990:	2001      	movs	r0, #1
 8008992:	e716      	b.n	80087c2 <_dtoa_r+0x7c2>
 8008994:	2300      	movs	r3, #0
 8008996:	e7f6      	b.n	8008986 <_dtoa_r+0x986>
 8008998:	9b02      	ldr	r3, [sp, #8]
 800899a:	e7f4      	b.n	8008986 <_dtoa_r+0x986>
 800899c:	f43f af23 	beq.w	80087e6 <_dtoa_r+0x7e6>
 80089a0:	9a07      	ldr	r2, [sp, #28]
 80089a2:	331c      	adds	r3, #28
 80089a4:	441a      	add	r2, r3
 80089a6:	4498      	add	r8, r3
 80089a8:	441d      	add	r5, r3
 80089aa:	4613      	mov	r3, r2
 80089ac:	e71a      	b.n	80087e4 <_dtoa_r+0x7e4>
 80089ae:	4603      	mov	r3, r0
 80089b0:	e7f6      	b.n	80089a0 <_dtoa_r+0x9a0>
 80089b2:	bf00      	nop
 80089b4:	40240000 	.word	0x40240000
 80089b8:	f1b9 0f00 	cmp.w	r9, #0
 80089bc:	dc33      	bgt.n	8008a26 <_dtoa_r+0xa26>
 80089be:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 80089c0:	2b02      	cmp	r3, #2
 80089c2:	dd30      	ble.n	8008a26 <_dtoa_r+0xa26>
 80089c4:	f8cd 9010 	str.w	r9, [sp, #16]
 80089c8:	9b04      	ldr	r3, [sp, #16]
 80089ca:	b963      	cbnz	r3, 80089e6 <_dtoa_r+0x9e6>
 80089cc:	4631      	mov	r1, r6
 80089ce:	2205      	movs	r2, #5
 80089d0:	4620      	mov	r0, r4
 80089d2:	f000 fb43 	bl	800905c <__multadd>
 80089d6:	4601      	mov	r1, r0
 80089d8:	4606      	mov	r6, r0
 80089da:	4650      	mov	r0, sl
 80089dc:	f000 fcfb 	bl	80093d6 <__mcmp>
 80089e0:	2800      	cmp	r0, #0
 80089e2:	f73f ad5c 	bgt.w	800849e <_dtoa_r+0x49e>
 80089e6:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 80089e8:	9d06      	ldr	r5, [sp, #24]
 80089ea:	ea6f 0b03 	mvn.w	fp, r3
 80089ee:	2300      	movs	r3, #0
 80089f0:	9307      	str	r3, [sp, #28]
 80089f2:	4631      	mov	r1, r6
 80089f4:	4620      	mov	r0, r4
 80089f6:	f000 fb1a 	bl	800902e <_Bfree>
 80089fa:	2f00      	cmp	r7, #0
 80089fc:	f43f ae4b 	beq.w	8008696 <_dtoa_r+0x696>
 8008a00:	9b07      	ldr	r3, [sp, #28]
 8008a02:	b12b      	cbz	r3, 8008a10 <_dtoa_r+0xa10>
 8008a04:	42bb      	cmp	r3, r7
 8008a06:	d003      	beq.n	8008a10 <_dtoa_r+0xa10>
 8008a08:	4619      	mov	r1, r3
 8008a0a:	4620      	mov	r0, r4
 8008a0c:	f000 fb0f 	bl	800902e <_Bfree>
 8008a10:	4639      	mov	r1, r7
 8008a12:	4620      	mov	r0, r4
 8008a14:	f000 fb0b 	bl	800902e <_Bfree>
 8008a18:	e63d      	b.n	8008696 <_dtoa_r+0x696>
 8008a1a:	2600      	movs	r6, #0
 8008a1c:	4637      	mov	r7, r6
 8008a1e:	e7e2      	b.n	80089e6 <_dtoa_r+0x9e6>
 8008a20:	46bb      	mov	fp, r7
 8008a22:	4637      	mov	r7, r6
 8008a24:	e53b      	b.n	800849e <_dtoa_r+0x49e>
 8008a26:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8008a28:	f8cd 9010 	str.w	r9, [sp, #16]
 8008a2c:	2b00      	cmp	r3, #0
 8008a2e:	f47f af12 	bne.w	8008856 <_dtoa_r+0x856>
 8008a32:	9d06      	ldr	r5, [sp, #24]
 8008a34:	4631      	mov	r1, r6
 8008a36:	4650      	mov	r0, sl
 8008a38:	f7ff fa54 	bl	8007ee4 <quorem>
 8008a3c:	9b06      	ldr	r3, [sp, #24]
 8008a3e:	f100 0930 	add.w	r9, r0, #48	; 0x30
 8008a42:	f805 9b01 	strb.w	r9, [r5], #1
 8008a46:	9a04      	ldr	r2, [sp, #16]
 8008a48:	1aeb      	subs	r3, r5, r3
 8008a4a:	429a      	cmp	r2, r3
 8008a4c:	f300 8081 	bgt.w	8008b52 <_dtoa_r+0xb52>
 8008a50:	9b06      	ldr	r3, [sp, #24]
 8008a52:	2a01      	cmp	r2, #1
 8008a54:	bfac      	ite	ge
 8008a56:	189b      	addge	r3, r3, r2
 8008a58:	3301      	addlt	r3, #1
 8008a5a:	4698      	mov	r8, r3
 8008a5c:	2300      	movs	r3, #0
 8008a5e:	9307      	str	r3, [sp, #28]
 8008a60:	4651      	mov	r1, sl
 8008a62:	2201      	movs	r2, #1
 8008a64:	4620      	mov	r0, r4
 8008a66:	f000 fc65 	bl	8009334 <__lshift>
 8008a6a:	4631      	mov	r1, r6
 8008a6c:	4682      	mov	sl, r0
 8008a6e:	f000 fcb2 	bl	80093d6 <__mcmp>
 8008a72:	2800      	cmp	r0, #0
 8008a74:	dc34      	bgt.n	8008ae0 <_dtoa_r+0xae0>
 8008a76:	d102      	bne.n	8008a7e <_dtoa_r+0xa7e>
 8008a78:	f019 0f01 	tst.w	r9, #1
 8008a7c:	d130      	bne.n	8008ae0 <_dtoa_r+0xae0>
 8008a7e:	4645      	mov	r5, r8
 8008a80:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 8008a84:	1e6a      	subs	r2, r5, #1
 8008a86:	2b30      	cmp	r3, #48	; 0x30
 8008a88:	d1b3      	bne.n	80089f2 <_dtoa_r+0x9f2>
 8008a8a:	4615      	mov	r5, r2
 8008a8c:	e7f8      	b.n	8008a80 <_dtoa_r+0xa80>
 8008a8e:	4638      	mov	r0, r7
 8008a90:	e6ff      	b.n	8008892 <_dtoa_r+0x892>
 8008a92:	2301      	movs	r3, #1
 8008a94:	e722      	b.n	80088dc <_dtoa_r+0x8dc>
 8008a96:	9a02      	ldr	r2, [sp, #8]
 8008a98:	2a00      	cmp	r2, #0
 8008a9a:	db04      	blt.n	8008aa6 <_dtoa_r+0xaa6>
 8008a9c:	d128      	bne.n	8008af0 <_dtoa_r+0xaf0>
 8008a9e:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 8008aa0:	bb32      	cbnz	r2, 8008af0 <_dtoa_r+0xaf0>
 8008aa2:	9a08      	ldr	r2, [sp, #32]
 8008aa4:	bb22      	cbnz	r2, 8008af0 <_dtoa_r+0xaf0>
 8008aa6:	2b00      	cmp	r3, #0
 8008aa8:	f77f af32 	ble.w	8008910 <_dtoa_r+0x910>
 8008aac:	4651      	mov	r1, sl
 8008aae:	2201      	movs	r2, #1
 8008ab0:	4620      	mov	r0, r4
 8008ab2:	f000 fc3f 	bl	8009334 <__lshift>
 8008ab6:	4631      	mov	r1, r6
 8008ab8:	4682      	mov	sl, r0
 8008aba:	f000 fc8c 	bl	80093d6 <__mcmp>
 8008abe:	2800      	cmp	r0, #0
 8008ac0:	dc05      	bgt.n	8008ace <_dtoa_r+0xace>
 8008ac2:	f47f af25 	bne.w	8008910 <_dtoa_r+0x910>
 8008ac6:	f019 0f01 	tst.w	r9, #1
 8008aca:	f43f af21 	beq.w	8008910 <_dtoa_r+0x910>
 8008ace:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 8008ad2:	f47f af1b 	bne.w	800890c <_dtoa_r+0x90c>
 8008ad6:	2339      	movs	r3, #57	; 0x39
 8008ad8:	f108 0801 	add.w	r8, r8, #1
 8008adc:	f808 3c01 	strb.w	r3, [r8, #-1]
 8008ae0:	4645      	mov	r5, r8
 8008ae2:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 8008ae6:	1e6a      	subs	r2, r5, #1
 8008ae8:	2b39      	cmp	r3, #57	; 0x39
 8008aea:	d03a      	beq.n	8008b62 <_dtoa_r+0xb62>
 8008aec:	3301      	adds	r3, #1
 8008aee:	e03f      	b.n	8008b70 <_dtoa_r+0xb70>
 8008af0:	2b00      	cmp	r3, #0
 8008af2:	f108 0501 	add.w	r5, r8, #1
 8008af6:	dd05      	ble.n	8008b04 <_dtoa_r+0xb04>
 8008af8:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 8008afc:	d0eb      	beq.n	8008ad6 <_dtoa_r+0xad6>
 8008afe:	f109 0901 	add.w	r9, r9, #1
 8008b02:	e707      	b.n	8008914 <_dtoa_r+0x914>
 8008b04:	9b06      	ldr	r3, [sp, #24]
 8008b06:	9a04      	ldr	r2, [sp, #16]
 8008b08:	1aeb      	subs	r3, r5, r3
 8008b0a:	4293      	cmp	r3, r2
 8008b0c:	46a8      	mov	r8, r5
 8008b0e:	f805 9c01 	strb.w	r9, [r5, #-1]
 8008b12:	d0a5      	beq.n	8008a60 <_dtoa_r+0xa60>
 8008b14:	4651      	mov	r1, sl
 8008b16:	2300      	movs	r3, #0
 8008b18:	220a      	movs	r2, #10
 8008b1a:	4620      	mov	r0, r4
 8008b1c:	f000 fa9e 	bl	800905c <__multadd>
 8008b20:	9b07      	ldr	r3, [sp, #28]
 8008b22:	4682      	mov	sl, r0
 8008b24:	42bb      	cmp	r3, r7
 8008b26:	f04f 020a 	mov.w	r2, #10
 8008b2a:	f04f 0300 	mov.w	r3, #0
 8008b2e:	9907      	ldr	r1, [sp, #28]
 8008b30:	4620      	mov	r0, r4
 8008b32:	d104      	bne.n	8008b3e <_dtoa_r+0xb3e>
 8008b34:	f000 fa92 	bl	800905c <__multadd>
 8008b38:	9007      	str	r0, [sp, #28]
 8008b3a:	4607      	mov	r7, r0
 8008b3c:	e6b1      	b.n	80088a2 <_dtoa_r+0x8a2>
 8008b3e:	f000 fa8d 	bl	800905c <__multadd>
 8008b42:	2300      	movs	r3, #0
 8008b44:	9007      	str	r0, [sp, #28]
 8008b46:	220a      	movs	r2, #10
 8008b48:	4639      	mov	r1, r7
 8008b4a:	4620      	mov	r0, r4
 8008b4c:	f000 fa86 	bl	800905c <__multadd>
 8008b50:	e7f3      	b.n	8008b3a <_dtoa_r+0xb3a>
 8008b52:	4651      	mov	r1, sl
 8008b54:	2300      	movs	r3, #0
 8008b56:	220a      	movs	r2, #10
 8008b58:	4620      	mov	r0, r4
 8008b5a:	f000 fa7f 	bl	800905c <__multadd>
 8008b5e:	4682      	mov	sl, r0
 8008b60:	e768      	b.n	8008a34 <_dtoa_r+0xa34>
 8008b62:	9b06      	ldr	r3, [sp, #24]
 8008b64:	4293      	cmp	r3, r2
 8008b66:	d105      	bne.n	8008b74 <_dtoa_r+0xb74>
 8008b68:	2331      	movs	r3, #49	; 0x31
 8008b6a:	9a06      	ldr	r2, [sp, #24]
 8008b6c:	f10b 0b01 	add.w	fp, fp, #1
 8008b70:	7013      	strb	r3, [r2, #0]
 8008b72:	e73e      	b.n	80089f2 <_dtoa_r+0x9f2>
 8008b74:	4615      	mov	r5, r2
 8008b76:	e7b4      	b.n	8008ae2 <_dtoa_r+0xae2>
 8008b78:	4b09      	ldr	r3, [pc, #36]	; (8008ba0 <_dtoa_r+0xba0>)
 8008b7a:	f7ff baa3 	b.w	80080c4 <_dtoa_r+0xc4>
 8008b7e:	9b22      	ldr	r3, [sp, #136]	; 0x88
 8008b80:	2b00      	cmp	r3, #0
 8008b82:	f47f aa7d 	bne.w	8008080 <_dtoa_r+0x80>
 8008b86:	4b07      	ldr	r3, [pc, #28]	; (8008ba4 <_dtoa_r+0xba4>)
 8008b88:	f7ff ba9c 	b.w	80080c4 <_dtoa_r+0xc4>
 8008b8c:	9b04      	ldr	r3, [sp, #16]
 8008b8e:	2b00      	cmp	r3, #0
 8008b90:	f73f af4f 	bgt.w	8008a32 <_dtoa_r+0xa32>
 8008b94:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 8008b96:	2b02      	cmp	r3, #2
 8008b98:	f77f af4b 	ble.w	8008a32 <_dtoa_r+0xa32>
 8008b9c:	e714      	b.n	80089c8 <_dtoa_r+0x9c8>
 8008b9e:	bf00      	nop
 8008ba0:	08009cb0 	.word	0x08009cb0
 8008ba4:	08009cd4 	.word	0x08009cd4

08008ba8 <__sflush_r>:
 8008ba8:	898a      	ldrh	r2, [r1, #12]
 8008baa:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8008bae:	4605      	mov	r5, r0
 8008bb0:	0710      	lsls	r0, r2, #28
 8008bb2:	460c      	mov	r4, r1
 8008bb4:	d45a      	bmi.n	8008c6c <__sflush_r+0xc4>
 8008bb6:	684b      	ldr	r3, [r1, #4]
 8008bb8:	2b00      	cmp	r3, #0
 8008bba:	dc05      	bgt.n	8008bc8 <__sflush_r+0x20>
 8008bbc:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 8008bbe:	2b00      	cmp	r3, #0
 8008bc0:	dc02      	bgt.n	8008bc8 <__sflush_r+0x20>
 8008bc2:	2000      	movs	r0, #0
 8008bc4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8008bc8:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8008bca:	2e00      	cmp	r6, #0
 8008bcc:	d0f9      	beq.n	8008bc2 <__sflush_r+0x1a>
 8008bce:	2300      	movs	r3, #0
 8008bd0:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 8008bd4:	682f      	ldr	r7, [r5, #0]
 8008bd6:	602b      	str	r3, [r5, #0]
 8008bd8:	d033      	beq.n	8008c42 <__sflush_r+0x9a>
 8008bda:	6d60      	ldr	r0, [r4, #84]	; 0x54
 8008bdc:	89a3      	ldrh	r3, [r4, #12]
 8008bde:	075a      	lsls	r2, r3, #29
 8008be0:	d505      	bpl.n	8008bee <__sflush_r+0x46>
 8008be2:	6863      	ldr	r3, [r4, #4]
 8008be4:	1ac0      	subs	r0, r0, r3
 8008be6:	6b63      	ldr	r3, [r4, #52]	; 0x34
 8008be8:	b10b      	cbz	r3, 8008bee <__sflush_r+0x46>
 8008bea:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8008bec:	1ac0      	subs	r0, r0, r3
 8008bee:	2300      	movs	r3, #0
 8008bf0:	4602      	mov	r2, r0
 8008bf2:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8008bf4:	6a21      	ldr	r1, [r4, #32]
 8008bf6:	4628      	mov	r0, r5
 8008bf8:	47b0      	blx	r6
 8008bfa:	1c43      	adds	r3, r0, #1
 8008bfc:	89a3      	ldrh	r3, [r4, #12]
 8008bfe:	d106      	bne.n	8008c0e <__sflush_r+0x66>
 8008c00:	6829      	ldr	r1, [r5, #0]
 8008c02:	291d      	cmp	r1, #29
 8008c04:	d84b      	bhi.n	8008c9e <__sflush_r+0xf6>
 8008c06:	4a2b      	ldr	r2, [pc, #172]	; (8008cb4 <__sflush_r+0x10c>)
 8008c08:	40ca      	lsrs	r2, r1
 8008c0a:	07d6      	lsls	r6, r2, #31
 8008c0c:	d547      	bpl.n	8008c9e <__sflush_r+0xf6>
 8008c0e:	2200      	movs	r2, #0
 8008c10:	6062      	str	r2, [r4, #4]
 8008c12:	6922      	ldr	r2, [r4, #16]
 8008c14:	04d9      	lsls	r1, r3, #19
 8008c16:	6022      	str	r2, [r4, #0]
 8008c18:	d504      	bpl.n	8008c24 <__sflush_r+0x7c>
 8008c1a:	1c42      	adds	r2, r0, #1
 8008c1c:	d101      	bne.n	8008c22 <__sflush_r+0x7a>
 8008c1e:	682b      	ldr	r3, [r5, #0]
 8008c20:	b903      	cbnz	r3, 8008c24 <__sflush_r+0x7c>
 8008c22:	6560      	str	r0, [r4, #84]	; 0x54
 8008c24:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8008c26:	602f      	str	r7, [r5, #0]
 8008c28:	2900      	cmp	r1, #0
 8008c2a:	d0ca      	beq.n	8008bc2 <__sflush_r+0x1a>
 8008c2c:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8008c30:	4299      	cmp	r1, r3
 8008c32:	d002      	beq.n	8008c3a <__sflush_r+0x92>
 8008c34:	4628      	mov	r0, r5
 8008c36:	f000 fca5 	bl	8009584 <_free_r>
 8008c3a:	2000      	movs	r0, #0
 8008c3c:	6360      	str	r0, [r4, #52]	; 0x34
 8008c3e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8008c42:	6a21      	ldr	r1, [r4, #32]
 8008c44:	2301      	movs	r3, #1
 8008c46:	4628      	mov	r0, r5
 8008c48:	47b0      	blx	r6
 8008c4a:	1c41      	adds	r1, r0, #1
 8008c4c:	d1c6      	bne.n	8008bdc <__sflush_r+0x34>
 8008c4e:	682b      	ldr	r3, [r5, #0]
 8008c50:	2b00      	cmp	r3, #0
 8008c52:	d0c3      	beq.n	8008bdc <__sflush_r+0x34>
 8008c54:	2b1d      	cmp	r3, #29
 8008c56:	d001      	beq.n	8008c5c <__sflush_r+0xb4>
 8008c58:	2b16      	cmp	r3, #22
 8008c5a:	d101      	bne.n	8008c60 <__sflush_r+0xb8>
 8008c5c:	602f      	str	r7, [r5, #0]
 8008c5e:	e7b0      	b.n	8008bc2 <__sflush_r+0x1a>
 8008c60:	89a3      	ldrh	r3, [r4, #12]
 8008c62:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8008c66:	81a3      	strh	r3, [r4, #12]
 8008c68:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8008c6c:	690f      	ldr	r7, [r1, #16]
 8008c6e:	2f00      	cmp	r7, #0
 8008c70:	d0a7      	beq.n	8008bc2 <__sflush_r+0x1a>
 8008c72:	0793      	lsls	r3, r2, #30
 8008c74:	bf18      	it	ne
 8008c76:	2300      	movne	r3, #0
 8008c78:	680e      	ldr	r6, [r1, #0]
 8008c7a:	bf08      	it	eq
 8008c7c:	694b      	ldreq	r3, [r1, #20]
 8008c7e:	eba6 0807 	sub.w	r8, r6, r7
 8008c82:	600f      	str	r7, [r1, #0]
 8008c84:	608b      	str	r3, [r1, #8]
 8008c86:	f1b8 0f00 	cmp.w	r8, #0
 8008c8a:	dd9a      	ble.n	8008bc2 <__sflush_r+0x1a>
 8008c8c:	4643      	mov	r3, r8
 8008c8e:	463a      	mov	r2, r7
 8008c90:	6a21      	ldr	r1, [r4, #32]
 8008c92:	4628      	mov	r0, r5
 8008c94:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 8008c96:	47b0      	blx	r6
 8008c98:	2800      	cmp	r0, #0
 8008c9a:	dc07      	bgt.n	8008cac <__sflush_r+0x104>
 8008c9c:	89a3      	ldrh	r3, [r4, #12]
 8008c9e:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8008ca2:	81a3      	strh	r3, [r4, #12]
 8008ca4:	f04f 30ff 	mov.w	r0, #4294967295
 8008ca8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8008cac:	4407      	add	r7, r0
 8008cae:	eba8 0800 	sub.w	r8, r8, r0
 8008cb2:	e7e8      	b.n	8008c86 <__sflush_r+0xde>
 8008cb4:	20400001 	.word	0x20400001

08008cb8 <_fflush_r>:
 8008cb8:	b538      	push	{r3, r4, r5, lr}
 8008cba:	690b      	ldr	r3, [r1, #16]
 8008cbc:	4605      	mov	r5, r0
 8008cbe:	460c      	mov	r4, r1
 8008cc0:	b1db      	cbz	r3, 8008cfa <_fflush_r+0x42>
 8008cc2:	b118      	cbz	r0, 8008ccc <_fflush_r+0x14>
 8008cc4:	6983      	ldr	r3, [r0, #24]
 8008cc6:	b90b      	cbnz	r3, 8008ccc <_fflush_r+0x14>
 8008cc8:	f000 f860 	bl	8008d8c <__sinit>
 8008ccc:	4b0c      	ldr	r3, [pc, #48]	; (8008d00 <_fflush_r+0x48>)
 8008cce:	429c      	cmp	r4, r3
 8008cd0:	d109      	bne.n	8008ce6 <_fflush_r+0x2e>
 8008cd2:	686c      	ldr	r4, [r5, #4]
 8008cd4:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8008cd8:	b17b      	cbz	r3, 8008cfa <_fflush_r+0x42>
 8008cda:	4621      	mov	r1, r4
 8008cdc:	4628      	mov	r0, r5
 8008cde:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 8008ce2:	f7ff bf61 	b.w	8008ba8 <__sflush_r>
 8008ce6:	4b07      	ldr	r3, [pc, #28]	; (8008d04 <_fflush_r+0x4c>)
 8008ce8:	429c      	cmp	r4, r3
 8008cea:	d101      	bne.n	8008cf0 <_fflush_r+0x38>
 8008cec:	68ac      	ldr	r4, [r5, #8]
 8008cee:	e7f1      	b.n	8008cd4 <_fflush_r+0x1c>
 8008cf0:	4b05      	ldr	r3, [pc, #20]	; (8008d08 <_fflush_r+0x50>)
 8008cf2:	429c      	cmp	r4, r3
 8008cf4:	bf08      	it	eq
 8008cf6:	68ec      	ldreq	r4, [r5, #12]
 8008cf8:	e7ec      	b.n	8008cd4 <_fflush_r+0x1c>
 8008cfa:	2000      	movs	r0, #0
 8008cfc:	bd38      	pop	{r3, r4, r5, pc}
 8008cfe:	bf00      	nop
 8008d00:	08009d04 	.word	0x08009d04
 8008d04:	08009d24 	.word	0x08009d24
 8008d08:	08009ce4 	.word	0x08009ce4

08008d0c <_cleanup_r>:
 8008d0c:	4901      	ldr	r1, [pc, #4]	; (8008d14 <_cleanup_r+0x8>)
 8008d0e:	f000 b8a9 	b.w	8008e64 <_fwalk_reent>
 8008d12:	bf00      	nop
 8008d14:	08008cb9 	.word	0x08008cb9

08008d18 <std.isra.0>:
 8008d18:	2300      	movs	r3, #0
 8008d1a:	b510      	push	{r4, lr}
 8008d1c:	4604      	mov	r4, r0
 8008d1e:	6003      	str	r3, [r0, #0]
 8008d20:	6043      	str	r3, [r0, #4]
 8008d22:	6083      	str	r3, [r0, #8]
 8008d24:	8181      	strh	r1, [r0, #12]
 8008d26:	6643      	str	r3, [r0, #100]	; 0x64
 8008d28:	81c2      	strh	r2, [r0, #14]
 8008d2a:	6103      	str	r3, [r0, #16]
 8008d2c:	6143      	str	r3, [r0, #20]
 8008d2e:	6183      	str	r3, [r0, #24]
 8008d30:	4619      	mov	r1, r3
 8008d32:	2208      	movs	r2, #8
 8008d34:	305c      	adds	r0, #92	; 0x5c
 8008d36:	f7fe fa65 	bl	8007204 <memset>
 8008d3a:	4b05      	ldr	r3, [pc, #20]	; (8008d50 <std.isra.0+0x38>)
 8008d3c:	6224      	str	r4, [r4, #32]
 8008d3e:	6263      	str	r3, [r4, #36]	; 0x24
 8008d40:	4b04      	ldr	r3, [pc, #16]	; (8008d54 <std.isra.0+0x3c>)
 8008d42:	62a3      	str	r3, [r4, #40]	; 0x28
 8008d44:	4b04      	ldr	r3, [pc, #16]	; (8008d58 <std.isra.0+0x40>)
 8008d46:	62e3      	str	r3, [r4, #44]	; 0x2c
 8008d48:	4b04      	ldr	r3, [pc, #16]	; (8008d5c <std.isra.0+0x44>)
 8008d4a:	6323      	str	r3, [r4, #48]	; 0x30
 8008d4c:	bd10      	pop	{r4, pc}
 8008d4e:	bf00      	nop
 8008d50:	080099e1 	.word	0x080099e1
 8008d54:	08009a03 	.word	0x08009a03
 8008d58:	08009a3b 	.word	0x08009a3b
 8008d5c:	08009a5f 	.word	0x08009a5f

08008d60 <__sfmoreglue>:
 8008d60:	b570      	push	{r4, r5, r6, lr}
 8008d62:	2568      	movs	r5, #104	; 0x68
 8008d64:	1e4a      	subs	r2, r1, #1
 8008d66:	4355      	muls	r5, r2
 8008d68:	460e      	mov	r6, r1
 8008d6a:	f105 0174 	add.w	r1, r5, #116	; 0x74
 8008d6e:	f000 fc55 	bl	800961c <_malloc_r>
 8008d72:	4604      	mov	r4, r0
 8008d74:	b140      	cbz	r0, 8008d88 <__sfmoreglue+0x28>
 8008d76:	2100      	movs	r1, #0
 8008d78:	e880 0042 	stmia.w	r0, {r1, r6}
 8008d7c:	300c      	adds	r0, #12
 8008d7e:	60a0      	str	r0, [r4, #8]
 8008d80:	f105 0268 	add.w	r2, r5, #104	; 0x68
 8008d84:	f7fe fa3e 	bl	8007204 <memset>
 8008d88:	4620      	mov	r0, r4
 8008d8a:	bd70      	pop	{r4, r5, r6, pc}

08008d8c <__sinit>:
 8008d8c:	6983      	ldr	r3, [r0, #24]
 8008d8e:	b510      	push	{r4, lr}
 8008d90:	4604      	mov	r4, r0
 8008d92:	bb33      	cbnz	r3, 8008de2 <__sinit+0x56>
 8008d94:	6483      	str	r3, [r0, #72]	; 0x48
 8008d96:	64c3      	str	r3, [r0, #76]	; 0x4c
 8008d98:	6503      	str	r3, [r0, #80]	; 0x50
 8008d9a:	4b12      	ldr	r3, [pc, #72]	; (8008de4 <__sinit+0x58>)
 8008d9c:	4a12      	ldr	r2, [pc, #72]	; (8008de8 <__sinit+0x5c>)
 8008d9e:	681b      	ldr	r3, [r3, #0]
 8008da0:	6282      	str	r2, [r0, #40]	; 0x28
 8008da2:	4298      	cmp	r0, r3
 8008da4:	bf04      	itt	eq
 8008da6:	2301      	moveq	r3, #1
 8008da8:	6183      	streq	r3, [r0, #24]
 8008daa:	f000 f81f 	bl	8008dec <__sfp>
 8008dae:	6060      	str	r0, [r4, #4]
 8008db0:	4620      	mov	r0, r4
 8008db2:	f000 f81b 	bl	8008dec <__sfp>
 8008db6:	60a0      	str	r0, [r4, #8]
 8008db8:	4620      	mov	r0, r4
 8008dba:	f000 f817 	bl	8008dec <__sfp>
 8008dbe:	2200      	movs	r2, #0
 8008dc0:	60e0      	str	r0, [r4, #12]
 8008dc2:	2104      	movs	r1, #4
 8008dc4:	6860      	ldr	r0, [r4, #4]
 8008dc6:	f7ff ffa7 	bl	8008d18 <std.isra.0>
 8008dca:	2201      	movs	r2, #1
 8008dcc:	2109      	movs	r1, #9
 8008dce:	68a0      	ldr	r0, [r4, #8]
 8008dd0:	f7ff ffa2 	bl	8008d18 <std.isra.0>
 8008dd4:	2202      	movs	r2, #2
 8008dd6:	2112      	movs	r1, #18
 8008dd8:	68e0      	ldr	r0, [r4, #12]
 8008dda:	f7ff ff9d 	bl	8008d18 <std.isra.0>
 8008dde:	2301      	movs	r3, #1
 8008de0:	61a3      	str	r3, [r4, #24]
 8008de2:	bd10      	pop	{r4, pc}
 8008de4:	08009c9c 	.word	0x08009c9c
 8008de8:	08008d0d 	.word	0x08008d0d

08008dec <__sfp>:
 8008dec:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8008dee:	4b1c      	ldr	r3, [pc, #112]	; (8008e60 <__sfp+0x74>)
 8008df0:	4607      	mov	r7, r0
 8008df2:	681e      	ldr	r6, [r3, #0]
 8008df4:	69b3      	ldr	r3, [r6, #24]
 8008df6:	b913      	cbnz	r3, 8008dfe <__sfp+0x12>
 8008df8:	4630      	mov	r0, r6
 8008dfa:	f7ff ffc7 	bl	8008d8c <__sinit>
 8008dfe:	3648      	adds	r6, #72	; 0x48
 8008e00:	68b4      	ldr	r4, [r6, #8]
 8008e02:	6873      	ldr	r3, [r6, #4]
 8008e04:	3b01      	subs	r3, #1
 8008e06:	d503      	bpl.n	8008e10 <__sfp+0x24>
 8008e08:	6833      	ldr	r3, [r6, #0]
 8008e0a:	b133      	cbz	r3, 8008e1a <__sfp+0x2e>
 8008e0c:	6836      	ldr	r6, [r6, #0]
 8008e0e:	e7f7      	b.n	8008e00 <__sfp+0x14>
 8008e10:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 8008e14:	b16d      	cbz	r5, 8008e32 <__sfp+0x46>
 8008e16:	3468      	adds	r4, #104	; 0x68
 8008e18:	e7f4      	b.n	8008e04 <__sfp+0x18>
 8008e1a:	2104      	movs	r1, #4
 8008e1c:	4638      	mov	r0, r7
 8008e1e:	f7ff ff9f 	bl	8008d60 <__sfmoreglue>
 8008e22:	6030      	str	r0, [r6, #0]
 8008e24:	2800      	cmp	r0, #0
 8008e26:	d1f1      	bne.n	8008e0c <__sfp+0x20>
 8008e28:	230c      	movs	r3, #12
 8008e2a:	4604      	mov	r4, r0
 8008e2c:	603b      	str	r3, [r7, #0]
 8008e2e:	4620      	mov	r0, r4
 8008e30:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8008e32:	f64f 73ff 	movw	r3, #65535	; 0xffff
 8008e36:	81e3      	strh	r3, [r4, #14]
 8008e38:	2301      	movs	r3, #1
 8008e3a:	6665      	str	r5, [r4, #100]	; 0x64
 8008e3c:	81a3      	strh	r3, [r4, #12]
 8008e3e:	6025      	str	r5, [r4, #0]
 8008e40:	60a5      	str	r5, [r4, #8]
 8008e42:	6065      	str	r5, [r4, #4]
 8008e44:	6125      	str	r5, [r4, #16]
 8008e46:	6165      	str	r5, [r4, #20]
 8008e48:	61a5      	str	r5, [r4, #24]
 8008e4a:	2208      	movs	r2, #8
 8008e4c:	4629      	mov	r1, r5
 8008e4e:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 8008e52:	f7fe f9d7 	bl	8007204 <memset>
 8008e56:	6365      	str	r5, [r4, #52]	; 0x34
 8008e58:	63a5      	str	r5, [r4, #56]	; 0x38
 8008e5a:	64a5      	str	r5, [r4, #72]	; 0x48
 8008e5c:	64e5      	str	r5, [r4, #76]	; 0x4c
 8008e5e:	e7e6      	b.n	8008e2e <__sfp+0x42>
 8008e60:	08009c9c 	.word	0x08009c9c

08008e64 <_fwalk_reent>:
 8008e64:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8008e68:	4680      	mov	r8, r0
 8008e6a:	4689      	mov	r9, r1
 8008e6c:	2600      	movs	r6, #0
 8008e6e:	f100 0448 	add.w	r4, r0, #72	; 0x48
 8008e72:	b914      	cbnz	r4, 8008e7a <_fwalk_reent+0x16>
 8008e74:	4630      	mov	r0, r6
 8008e76:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8008e7a:	68a5      	ldr	r5, [r4, #8]
 8008e7c:	6867      	ldr	r7, [r4, #4]
 8008e7e:	3f01      	subs	r7, #1
 8008e80:	d501      	bpl.n	8008e86 <_fwalk_reent+0x22>
 8008e82:	6824      	ldr	r4, [r4, #0]
 8008e84:	e7f5      	b.n	8008e72 <_fwalk_reent+0xe>
 8008e86:	89ab      	ldrh	r3, [r5, #12]
 8008e88:	2b01      	cmp	r3, #1
 8008e8a:	d907      	bls.n	8008e9c <_fwalk_reent+0x38>
 8008e8c:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 8008e90:	3301      	adds	r3, #1
 8008e92:	d003      	beq.n	8008e9c <_fwalk_reent+0x38>
 8008e94:	4629      	mov	r1, r5
 8008e96:	4640      	mov	r0, r8
 8008e98:	47c8      	blx	r9
 8008e9a:	4306      	orrs	r6, r0
 8008e9c:	3568      	adds	r5, #104	; 0x68
 8008e9e:	e7ee      	b.n	8008e7e <_fwalk_reent+0x1a>

08008ea0 <_localeconv_r>:
 8008ea0:	4b04      	ldr	r3, [pc, #16]	; (8008eb4 <_localeconv_r+0x14>)
 8008ea2:	681b      	ldr	r3, [r3, #0]
 8008ea4:	6a18      	ldr	r0, [r3, #32]
 8008ea6:	4b04      	ldr	r3, [pc, #16]	; (8008eb8 <_localeconv_r+0x18>)
 8008ea8:	2800      	cmp	r0, #0
 8008eaa:	bf08      	it	eq
 8008eac:	4618      	moveq	r0, r3
 8008eae:	30f0      	adds	r0, #240	; 0xf0
 8008eb0:	4770      	bx	lr
 8008eb2:	bf00      	nop
 8008eb4:	2000020c 	.word	0x2000020c
 8008eb8:	20000270 	.word	0x20000270

08008ebc <__swhatbuf_r>:
 8008ebc:	b570      	push	{r4, r5, r6, lr}
 8008ebe:	460e      	mov	r6, r1
 8008ec0:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8008ec4:	b090      	sub	sp, #64	; 0x40
 8008ec6:	2900      	cmp	r1, #0
 8008ec8:	4614      	mov	r4, r2
 8008eca:	461d      	mov	r5, r3
 8008ecc:	da07      	bge.n	8008ede <__swhatbuf_r+0x22>
 8008ece:	2300      	movs	r3, #0
 8008ed0:	602b      	str	r3, [r5, #0]
 8008ed2:	89b3      	ldrh	r3, [r6, #12]
 8008ed4:	061a      	lsls	r2, r3, #24
 8008ed6:	d410      	bmi.n	8008efa <__swhatbuf_r+0x3e>
 8008ed8:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8008edc:	e00e      	b.n	8008efc <__swhatbuf_r+0x40>
 8008ede:	aa01      	add	r2, sp, #4
 8008ee0:	f000 fde4 	bl	8009aac <_fstat_r>
 8008ee4:	2800      	cmp	r0, #0
 8008ee6:	dbf2      	blt.n	8008ece <__swhatbuf_r+0x12>
 8008ee8:	9a02      	ldr	r2, [sp, #8]
 8008eea:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 8008eee:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 8008ef2:	425a      	negs	r2, r3
 8008ef4:	415a      	adcs	r2, r3
 8008ef6:	602a      	str	r2, [r5, #0]
 8008ef8:	e7ee      	b.n	8008ed8 <__swhatbuf_r+0x1c>
 8008efa:	2340      	movs	r3, #64	; 0x40
 8008efc:	2000      	movs	r0, #0
 8008efe:	6023      	str	r3, [r4, #0]
 8008f00:	b010      	add	sp, #64	; 0x40
 8008f02:	bd70      	pop	{r4, r5, r6, pc}

08008f04 <__smakebuf_r>:
 8008f04:	898b      	ldrh	r3, [r1, #12]
 8008f06:	b573      	push	{r0, r1, r4, r5, r6, lr}
 8008f08:	079d      	lsls	r5, r3, #30
 8008f0a:	4606      	mov	r6, r0
 8008f0c:	460c      	mov	r4, r1
 8008f0e:	d507      	bpl.n	8008f20 <__smakebuf_r+0x1c>
 8008f10:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8008f14:	6023      	str	r3, [r4, #0]
 8008f16:	6123      	str	r3, [r4, #16]
 8008f18:	2301      	movs	r3, #1
 8008f1a:	6163      	str	r3, [r4, #20]
 8008f1c:	b002      	add	sp, #8
 8008f1e:	bd70      	pop	{r4, r5, r6, pc}
 8008f20:	ab01      	add	r3, sp, #4
 8008f22:	466a      	mov	r2, sp
 8008f24:	f7ff ffca 	bl	8008ebc <__swhatbuf_r>
 8008f28:	9900      	ldr	r1, [sp, #0]
 8008f2a:	4605      	mov	r5, r0
 8008f2c:	4630      	mov	r0, r6
 8008f2e:	f000 fb75 	bl	800961c <_malloc_r>
 8008f32:	b948      	cbnz	r0, 8008f48 <__smakebuf_r+0x44>
 8008f34:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8008f38:	059a      	lsls	r2, r3, #22
 8008f3a:	d4ef      	bmi.n	8008f1c <__smakebuf_r+0x18>
 8008f3c:	f023 0303 	bic.w	r3, r3, #3
 8008f40:	f043 0302 	orr.w	r3, r3, #2
 8008f44:	81a3      	strh	r3, [r4, #12]
 8008f46:	e7e3      	b.n	8008f10 <__smakebuf_r+0xc>
 8008f48:	4b0d      	ldr	r3, [pc, #52]	; (8008f80 <__smakebuf_r+0x7c>)
 8008f4a:	62b3      	str	r3, [r6, #40]	; 0x28
 8008f4c:	89a3      	ldrh	r3, [r4, #12]
 8008f4e:	6020      	str	r0, [r4, #0]
 8008f50:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8008f54:	81a3      	strh	r3, [r4, #12]
 8008f56:	9b00      	ldr	r3, [sp, #0]
 8008f58:	6120      	str	r0, [r4, #16]
 8008f5a:	6163      	str	r3, [r4, #20]
 8008f5c:	9b01      	ldr	r3, [sp, #4]
 8008f5e:	b15b      	cbz	r3, 8008f78 <__smakebuf_r+0x74>
 8008f60:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8008f64:	4630      	mov	r0, r6
 8008f66:	f000 fdb3 	bl	8009ad0 <_isatty_r>
 8008f6a:	b128      	cbz	r0, 8008f78 <__smakebuf_r+0x74>
 8008f6c:	89a3      	ldrh	r3, [r4, #12]
 8008f6e:	f023 0303 	bic.w	r3, r3, #3
 8008f72:	f043 0301 	orr.w	r3, r3, #1
 8008f76:	81a3      	strh	r3, [r4, #12]
 8008f78:	89a3      	ldrh	r3, [r4, #12]
 8008f7a:	431d      	orrs	r5, r3
 8008f7c:	81a5      	strh	r5, [r4, #12]
 8008f7e:	e7cd      	b.n	8008f1c <__smakebuf_r+0x18>
 8008f80:	08008d0d 	.word	0x08008d0d

08008f84 <malloc>:
 8008f84:	4b02      	ldr	r3, [pc, #8]	; (8008f90 <malloc+0xc>)
 8008f86:	4601      	mov	r1, r0
 8008f88:	6818      	ldr	r0, [r3, #0]
 8008f8a:	f000 bb47 	b.w	800961c <_malloc_r>
 8008f8e:	bf00      	nop
 8008f90:	2000020c 	.word	0x2000020c

08008f94 <memchr>:
 8008f94:	b510      	push	{r4, lr}
 8008f96:	b2c9      	uxtb	r1, r1
 8008f98:	4402      	add	r2, r0
 8008f9a:	4290      	cmp	r0, r2
 8008f9c:	4603      	mov	r3, r0
 8008f9e:	d101      	bne.n	8008fa4 <memchr+0x10>
 8008fa0:	2000      	movs	r0, #0
 8008fa2:	bd10      	pop	{r4, pc}
 8008fa4:	781c      	ldrb	r4, [r3, #0]
 8008fa6:	3001      	adds	r0, #1
 8008fa8:	428c      	cmp	r4, r1
 8008faa:	d1f6      	bne.n	8008f9a <memchr+0x6>
 8008fac:	4618      	mov	r0, r3
 8008fae:	bd10      	pop	{r4, pc}

08008fb0 <memcpy>:
 8008fb0:	b510      	push	{r4, lr}
 8008fb2:	1e43      	subs	r3, r0, #1
 8008fb4:	440a      	add	r2, r1
 8008fb6:	4291      	cmp	r1, r2
 8008fb8:	d100      	bne.n	8008fbc <memcpy+0xc>
 8008fba:	bd10      	pop	{r4, pc}
 8008fbc:	f811 4b01 	ldrb.w	r4, [r1], #1
 8008fc0:	f803 4f01 	strb.w	r4, [r3, #1]!
 8008fc4:	e7f7      	b.n	8008fb6 <memcpy+0x6>

08008fc6 <_Balloc>:
 8008fc6:	b570      	push	{r4, r5, r6, lr}
 8008fc8:	6a45      	ldr	r5, [r0, #36]	; 0x24
 8008fca:	4604      	mov	r4, r0
 8008fcc:	460e      	mov	r6, r1
 8008fce:	b93d      	cbnz	r5, 8008fe0 <_Balloc+0x1a>
 8008fd0:	2010      	movs	r0, #16
 8008fd2:	f7ff ffd7 	bl	8008f84 <malloc>
 8008fd6:	6260      	str	r0, [r4, #36]	; 0x24
 8008fd8:	6045      	str	r5, [r0, #4]
 8008fda:	6085      	str	r5, [r0, #8]
 8008fdc:	6005      	str	r5, [r0, #0]
 8008fde:	60c5      	str	r5, [r0, #12]
 8008fe0:	6a65      	ldr	r5, [r4, #36]	; 0x24
 8008fe2:	68eb      	ldr	r3, [r5, #12]
 8008fe4:	b183      	cbz	r3, 8009008 <_Balloc+0x42>
 8008fe6:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8008fe8:	68db      	ldr	r3, [r3, #12]
 8008fea:	f853 0026 	ldr.w	r0, [r3, r6, lsl #2]
 8008fee:	b9b8      	cbnz	r0, 8009020 <_Balloc+0x5a>
 8008ff0:	2101      	movs	r1, #1
 8008ff2:	fa01 f506 	lsl.w	r5, r1, r6
 8008ff6:	1d6a      	adds	r2, r5, #5
 8008ff8:	0092      	lsls	r2, r2, #2
 8008ffa:	4620      	mov	r0, r4
 8008ffc:	f000 fab3 	bl	8009566 <_calloc_r>
 8009000:	b160      	cbz	r0, 800901c <_Balloc+0x56>
 8009002:	6046      	str	r6, [r0, #4]
 8009004:	6085      	str	r5, [r0, #8]
 8009006:	e00e      	b.n	8009026 <_Balloc+0x60>
 8009008:	2221      	movs	r2, #33	; 0x21
 800900a:	2104      	movs	r1, #4
 800900c:	4620      	mov	r0, r4
 800900e:	f000 faaa 	bl	8009566 <_calloc_r>
 8009012:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8009014:	60e8      	str	r0, [r5, #12]
 8009016:	68db      	ldr	r3, [r3, #12]
 8009018:	2b00      	cmp	r3, #0
 800901a:	d1e4      	bne.n	8008fe6 <_Balloc+0x20>
 800901c:	2000      	movs	r0, #0
 800901e:	bd70      	pop	{r4, r5, r6, pc}
 8009020:	6802      	ldr	r2, [r0, #0]
 8009022:	f843 2026 	str.w	r2, [r3, r6, lsl #2]
 8009026:	2300      	movs	r3, #0
 8009028:	6103      	str	r3, [r0, #16]
 800902a:	60c3      	str	r3, [r0, #12]
 800902c:	bd70      	pop	{r4, r5, r6, pc}

0800902e <_Bfree>:
 800902e:	b570      	push	{r4, r5, r6, lr}
 8009030:	6a44      	ldr	r4, [r0, #36]	; 0x24
 8009032:	4606      	mov	r6, r0
 8009034:	460d      	mov	r5, r1
 8009036:	b93c      	cbnz	r4, 8009048 <_Bfree+0x1a>
 8009038:	2010      	movs	r0, #16
 800903a:	f7ff ffa3 	bl	8008f84 <malloc>
 800903e:	6270      	str	r0, [r6, #36]	; 0x24
 8009040:	6044      	str	r4, [r0, #4]
 8009042:	6084      	str	r4, [r0, #8]
 8009044:	6004      	str	r4, [r0, #0]
 8009046:	60c4      	str	r4, [r0, #12]
 8009048:	b13d      	cbz	r5, 800905a <_Bfree+0x2c>
 800904a:	6a73      	ldr	r3, [r6, #36]	; 0x24
 800904c:	686a      	ldr	r2, [r5, #4]
 800904e:	68db      	ldr	r3, [r3, #12]
 8009050:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 8009054:	6029      	str	r1, [r5, #0]
 8009056:	f843 5022 	str.w	r5, [r3, r2, lsl #2]
 800905a:	bd70      	pop	{r4, r5, r6, pc}

0800905c <__multadd>:
 800905c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8009060:	461f      	mov	r7, r3
 8009062:	4606      	mov	r6, r0
 8009064:	460c      	mov	r4, r1
 8009066:	2300      	movs	r3, #0
 8009068:	690d      	ldr	r5, [r1, #16]
 800906a:	f101 0e14 	add.w	lr, r1, #20
 800906e:	f8de 0000 	ldr.w	r0, [lr]
 8009072:	3301      	adds	r3, #1
 8009074:	b281      	uxth	r1, r0
 8009076:	fb02 7101 	mla	r1, r2, r1, r7
 800907a:	0c00      	lsrs	r0, r0, #16
 800907c:	0c0f      	lsrs	r7, r1, #16
 800907e:	fb02 7000 	mla	r0, r2, r0, r7
 8009082:	b289      	uxth	r1, r1
 8009084:	eb01 4100 	add.w	r1, r1, r0, lsl #16
 8009088:	429d      	cmp	r5, r3
 800908a:	ea4f 4710 	mov.w	r7, r0, lsr #16
 800908e:	f84e 1b04 	str.w	r1, [lr], #4
 8009092:	dcec      	bgt.n	800906e <__multadd+0x12>
 8009094:	b1d7      	cbz	r7, 80090cc <__multadd+0x70>
 8009096:	68a3      	ldr	r3, [r4, #8]
 8009098:	429d      	cmp	r5, r3
 800909a:	db12      	blt.n	80090c2 <__multadd+0x66>
 800909c:	6861      	ldr	r1, [r4, #4]
 800909e:	4630      	mov	r0, r6
 80090a0:	3101      	adds	r1, #1
 80090a2:	f7ff ff90 	bl	8008fc6 <_Balloc>
 80090a6:	4680      	mov	r8, r0
 80090a8:	6922      	ldr	r2, [r4, #16]
 80090aa:	f104 010c 	add.w	r1, r4, #12
 80090ae:	3202      	adds	r2, #2
 80090b0:	0092      	lsls	r2, r2, #2
 80090b2:	300c      	adds	r0, #12
 80090b4:	f7ff ff7c 	bl	8008fb0 <memcpy>
 80090b8:	4621      	mov	r1, r4
 80090ba:	4630      	mov	r0, r6
 80090bc:	f7ff ffb7 	bl	800902e <_Bfree>
 80090c0:	4644      	mov	r4, r8
 80090c2:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 80090c6:	3501      	adds	r5, #1
 80090c8:	615f      	str	r7, [r3, #20]
 80090ca:	6125      	str	r5, [r4, #16]
 80090cc:	4620      	mov	r0, r4
 80090ce:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

080090d2 <__hi0bits>:
 80090d2:	0c02      	lsrs	r2, r0, #16
 80090d4:	0412      	lsls	r2, r2, #16
 80090d6:	4603      	mov	r3, r0
 80090d8:	b9b2      	cbnz	r2, 8009108 <__hi0bits+0x36>
 80090da:	0403      	lsls	r3, r0, #16
 80090dc:	2010      	movs	r0, #16
 80090de:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
 80090e2:	bf04      	itt	eq
 80090e4:	021b      	lsleq	r3, r3, #8
 80090e6:	3008      	addeq	r0, #8
 80090e8:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
 80090ec:	bf04      	itt	eq
 80090ee:	011b      	lsleq	r3, r3, #4
 80090f0:	3004      	addeq	r0, #4
 80090f2:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
 80090f6:	bf04      	itt	eq
 80090f8:	009b      	lsleq	r3, r3, #2
 80090fa:	3002      	addeq	r0, #2
 80090fc:	2b00      	cmp	r3, #0
 80090fe:	db06      	blt.n	800910e <__hi0bits+0x3c>
 8009100:	005b      	lsls	r3, r3, #1
 8009102:	d503      	bpl.n	800910c <__hi0bits+0x3a>
 8009104:	3001      	adds	r0, #1
 8009106:	4770      	bx	lr
 8009108:	2000      	movs	r0, #0
 800910a:	e7e8      	b.n	80090de <__hi0bits+0xc>
 800910c:	2020      	movs	r0, #32
 800910e:	4770      	bx	lr

08009110 <__lo0bits>:
 8009110:	6803      	ldr	r3, [r0, #0]
 8009112:	4601      	mov	r1, r0
 8009114:	f013 0207 	ands.w	r2, r3, #7
 8009118:	d00b      	beq.n	8009132 <__lo0bits+0x22>
 800911a:	07da      	lsls	r2, r3, #31
 800911c:	d423      	bmi.n	8009166 <__lo0bits+0x56>
 800911e:	0798      	lsls	r0, r3, #30
 8009120:	bf49      	itett	mi
 8009122:	085b      	lsrmi	r3, r3, #1
 8009124:	089b      	lsrpl	r3, r3, #2
 8009126:	2001      	movmi	r0, #1
 8009128:	600b      	strmi	r3, [r1, #0]
 800912a:	bf5c      	itt	pl
 800912c:	600b      	strpl	r3, [r1, #0]
 800912e:	2002      	movpl	r0, #2
 8009130:	4770      	bx	lr
 8009132:	b298      	uxth	r0, r3
 8009134:	b9a8      	cbnz	r0, 8009162 <__lo0bits+0x52>
 8009136:	2010      	movs	r0, #16
 8009138:	0c1b      	lsrs	r3, r3, #16
 800913a:	f013 0fff 	tst.w	r3, #255	; 0xff
 800913e:	bf04      	itt	eq
 8009140:	0a1b      	lsreq	r3, r3, #8
 8009142:	3008      	addeq	r0, #8
 8009144:	071a      	lsls	r2, r3, #28
 8009146:	bf04      	itt	eq
 8009148:	091b      	lsreq	r3, r3, #4
 800914a:	3004      	addeq	r0, #4
 800914c:	079a      	lsls	r2, r3, #30
 800914e:	bf04      	itt	eq
 8009150:	089b      	lsreq	r3, r3, #2
 8009152:	3002      	addeq	r0, #2
 8009154:	07da      	lsls	r2, r3, #31
 8009156:	d402      	bmi.n	800915e <__lo0bits+0x4e>
 8009158:	085b      	lsrs	r3, r3, #1
 800915a:	d006      	beq.n	800916a <__lo0bits+0x5a>
 800915c:	3001      	adds	r0, #1
 800915e:	600b      	str	r3, [r1, #0]
 8009160:	4770      	bx	lr
 8009162:	4610      	mov	r0, r2
 8009164:	e7e9      	b.n	800913a <__lo0bits+0x2a>
 8009166:	2000      	movs	r0, #0
 8009168:	4770      	bx	lr
 800916a:	2020      	movs	r0, #32
 800916c:	4770      	bx	lr

0800916e <__i2b>:
 800916e:	b510      	push	{r4, lr}
 8009170:	460c      	mov	r4, r1
 8009172:	2101      	movs	r1, #1
 8009174:	f7ff ff27 	bl	8008fc6 <_Balloc>
 8009178:	2201      	movs	r2, #1
 800917a:	6144      	str	r4, [r0, #20]
 800917c:	6102      	str	r2, [r0, #16]
 800917e:	bd10      	pop	{r4, pc}

08009180 <__multiply>:
 8009180:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8009184:	4614      	mov	r4, r2
 8009186:	690a      	ldr	r2, [r1, #16]
 8009188:	6923      	ldr	r3, [r4, #16]
 800918a:	4689      	mov	r9, r1
 800918c:	429a      	cmp	r2, r3
 800918e:	bfbe      	ittt	lt
 8009190:	460b      	movlt	r3, r1
 8009192:	46a1      	movlt	r9, r4
 8009194:	461c      	movlt	r4, r3
 8009196:	f8d9 7010 	ldr.w	r7, [r9, #16]
 800919a:	f8d4 a010 	ldr.w	sl, [r4, #16]
 800919e:	f8d9 3008 	ldr.w	r3, [r9, #8]
 80091a2:	f8d9 1004 	ldr.w	r1, [r9, #4]
 80091a6:	eb07 060a 	add.w	r6, r7, sl
 80091aa:	429e      	cmp	r6, r3
 80091ac:	bfc8      	it	gt
 80091ae:	3101      	addgt	r1, #1
 80091b0:	f7ff ff09 	bl	8008fc6 <_Balloc>
 80091b4:	f100 0514 	add.w	r5, r0, #20
 80091b8:	462b      	mov	r3, r5
 80091ba:	2200      	movs	r2, #0
 80091bc:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 80091c0:	4543      	cmp	r3, r8
 80091c2:	d316      	bcc.n	80091f2 <__multiply+0x72>
 80091c4:	f104 0214 	add.w	r2, r4, #20
 80091c8:	f109 0114 	add.w	r1, r9, #20
 80091cc:	eb02 038a 	add.w	r3, r2, sl, lsl #2
 80091d0:	eb01 0787 	add.w	r7, r1, r7, lsl #2
 80091d4:	9301      	str	r3, [sp, #4]
 80091d6:	9c01      	ldr	r4, [sp, #4]
 80091d8:	4613      	mov	r3, r2
 80091da:	4294      	cmp	r4, r2
 80091dc:	d80c      	bhi.n	80091f8 <__multiply+0x78>
 80091de:	2e00      	cmp	r6, #0
 80091e0:	dd03      	ble.n	80091ea <__multiply+0x6a>
 80091e2:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 80091e6:	2b00      	cmp	r3, #0
 80091e8:	d054      	beq.n	8009294 <__multiply+0x114>
 80091ea:	6106      	str	r6, [r0, #16]
 80091ec:	b003      	add	sp, #12
 80091ee:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80091f2:	f843 2b04 	str.w	r2, [r3], #4
 80091f6:	e7e3      	b.n	80091c0 <__multiply+0x40>
 80091f8:	f8b3 a000 	ldrh.w	sl, [r3]
 80091fc:	3204      	adds	r2, #4
 80091fe:	f1ba 0f00 	cmp.w	sl, #0
 8009202:	d020      	beq.n	8009246 <__multiply+0xc6>
 8009204:	46ae      	mov	lr, r5
 8009206:	4689      	mov	r9, r1
 8009208:	f04f 0c00 	mov.w	ip, #0
 800920c:	f859 4b04 	ldr.w	r4, [r9], #4
 8009210:	f8be b000 	ldrh.w	fp, [lr]
 8009214:	b2a3      	uxth	r3, r4
 8009216:	fb0a b303 	mla	r3, sl, r3, fp
 800921a:	ea4f 4b14 	mov.w	fp, r4, lsr #16
 800921e:	f8de 4000 	ldr.w	r4, [lr]
 8009222:	4463      	add	r3, ip
 8009224:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 8009228:	fb0a c40b 	mla	r4, sl, fp, ip
 800922c:	eb04 4413 	add.w	r4, r4, r3, lsr #16
 8009230:	b29b      	uxth	r3, r3
 8009232:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 8009236:	454f      	cmp	r7, r9
 8009238:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 800923c:	f84e 3b04 	str.w	r3, [lr], #4
 8009240:	d8e4      	bhi.n	800920c <__multiply+0x8c>
 8009242:	f8ce c000 	str.w	ip, [lr]
 8009246:	f832 9c02 	ldrh.w	r9, [r2, #-2]
 800924a:	f1b9 0f00 	cmp.w	r9, #0
 800924e:	d01f      	beq.n	8009290 <__multiply+0x110>
 8009250:	46ae      	mov	lr, r5
 8009252:	468c      	mov	ip, r1
 8009254:	f04f 0a00 	mov.w	sl, #0
 8009258:	682b      	ldr	r3, [r5, #0]
 800925a:	f8bc 4000 	ldrh.w	r4, [ip]
 800925e:	f8be b002 	ldrh.w	fp, [lr, #2]
 8009262:	b29b      	uxth	r3, r3
 8009264:	fb09 b404 	mla	r4, r9, r4, fp
 8009268:	44a2      	add	sl, r4
 800926a:	ea43 430a 	orr.w	r3, r3, sl, lsl #16
 800926e:	f84e 3b04 	str.w	r3, [lr], #4
 8009272:	f85c 3b04 	ldr.w	r3, [ip], #4
 8009276:	f8be 4000 	ldrh.w	r4, [lr]
 800927a:	0c1b      	lsrs	r3, r3, #16
 800927c:	fb09 4303 	mla	r3, r9, r3, r4
 8009280:	4567      	cmp	r7, ip
 8009282:	eb03 431a 	add.w	r3, r3, sl, lsr #16
 8009286:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 800928a:	d8e6      	bhi.n	800925a <__multiply+0xda>
 800928c:	f8ce 3000 	str.w	r3, [lr]
 8009290:	3504      	adds	r5, #4
 8009292:	e7a0      	b.n	80091d6 <__multiply+0x56>
 8009294:	3e01      	subs	r6, #1
 8009296:	e7a2      	b.n	80091de <__multiply+0x5e>

08009298 <__pow5mult>:
 8009298:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800929c:	4615      	mov	r5, r2
 800929e:	f012 0203 	ands.w	r2, r2, #3
 80092a2:	4606      	mov	r6, r0
 80092a4:	460f      	mov	r7, r1
 80092a6:	d007      	beq.n	80092b8 <__pow5mult+0x20>
 80092a8:	4c21      	ldr	r4, [pc, #132]	; (8009330 <__pow5mult+0x98>)
 80092aa:	3a01      	subs	r2, #1
 80092ac:	2300      	movs	r3, #0
 80092ae:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 80092b2:	f7ff fed3 	bl	800905c <__multadd>
 80092b6:	4607      	mov	r7, r0
 80092b8:	10ad      	asrs	r5, r5, #2
 80092ba:	d035      	beq.n	8009328 <__pow5mult+0x90>
 80092bc:	6a74      	ldr	r4, [r6, #36]	; 0x24
 80092be:	b93c      	cbnz	r4, 80092d0 <__pow5mult+0x38>
 80092c0:	2010      	movs	r0, #16
 80092c2:	f7ff fe5f 	bl	8008f84 <malloc>
 80092c6:	6270      	str	r0, [r6, #36]	; 0x24
 80092c8:	6044      	str	r4, [r0, #4]
 80092ca:	6084      	str	r4, [r0, #8]
 80092cc:	6004      	str	r4, [r0, #0]
 80092ce:	60c4      	str	r4, [r0, #12]
 80092d0:	f8d6 8024 	ldr.w	r8, [r6, #36]	; 0x24
 80092d4:	f8d8 4008 	ldr.w	r4, [r8, #8]
 80092d8:	b94c      	cbnz	r4, 80092ee <__pow5mult+0x56>
 80092da:	f240 2171 	movw	r1, #625	; 0x271
 80092de:	4630      	mov	r0, r6
 80092e0:	f7ff ff45 	bl	800916e <__i2b>
 80092e4:	2300      	movs	r3, #0
 80092e6:	4604      	mov	r4, r0
 80092e8:	f8c8 0008 	str.w	r0, [r8, #8]
 80092ec:	6003      	str	r3, [r0, #0]
 80092ee:	f04f 0800 	mov.w	r8, #0
 80092f2:	07eb      	lsls	r3, r5, #31
 80092f4:	d50a      	bpl.n	800930c <__pow5mult+0x74>
 80092f6:	4639      	mov	r1, r7
 80092f8:	4622      	mov	r2, r4
 80092fa:	4630      	mov	r0, r6
 80092fc:	f7ff ff40 	bl	8009180 <__multiply>
 8009300:	4681      	mov	r9, r0
 8009302:	4639      	mov	r1, r7
 8009304:	4630      	mov	r0, r6
 8009306:	f7ff fe92 	bl	800902e <_Bfree>
 800930a:	464f      	mov	r7, r9
 800930c:	106d      	asrs	r5, r5, #1
 800930e:	d00b      	beq.n	8009328 <__pow5mult+0x90>
 8009310:	6820      	ldr	r0, [r4, #0]
 8009312:	b938      	cbnz	r0, 8009324 <__pow5mult+0x8c>
 8009314:	4622      	mov	r2, r4
 8009316:	4621      	mov	r1, r4
 8009318:	4630      	mov	r0, r6
 800931a:	f7ff ff31 	bl	8009180 <__multiply>
 800931e:	6020      	str	r0, [r4, #0]
 8009320:	f8c0 8000 	str.w	r8, [r0]
 8009324:	4604      	mov	r4, r0
 8009326:	e7e4      	b.n	80092f2 <__pow5mult+0x5a>
 8009328:	4638      	mov	r0, r7
 800932a:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800932e:	bf00      	nop
 8009330:	08009e38 	.word	0x08009e38

08009334 <__lshift>:
 8009334:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8009338:	460c      	mov	r4, r1
 800933a:	4607      	mov	r7, r0
 800933c:	4616      	mov	r6, r2
 800933e:	6923      	ldr	r3, [r4, #16]
 8009340:	ea4f 1a62 	mov.w	sl, r2, asr #5
 8009344:	eb0a 0903 	add.w	r9, sl, r3
 8009348:	6849      	ldr	r1, [r1, #4]
 800934a:	68a3      	ldr	r3, [r4, #8]
 800934c:	f109 0501 	add.w	r5, r9, #1
 8009350:	42ab      	cmp	r3, r5
 8009352:	db31      	blt.n	80093b8 <__lshift+0x84>
 8009354:	4638      	mov	r0, r7
 8009356:	f7ff fe36 	bl	8008fc6 <_Balloc>
 800935a:	2200      	movs	r2, #0
 800935c:	4680      	mov	r8, r0
 800935e:	4611      	mov	r1, r2
 8009360:	f100 0314 	add.w	r3, r0, #20
 8009364:	4552      	cmp	r2, sl
 8009366:	db2a      	blt.n	80093be <__lshift+0x8a>
 8009368:	6920      	ldr	r0, [r4, #16]
 800936a:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 800936e:	f104 0114 	add.w	r1, r4, #20
 8009372:	f016 021f 	ands.w	r2, r6, #31
 8009376:	eb03 038a 	add.w	r3, r3, sl, lsl #2
 800937a:	eb01 0e80 	add.w	lr, r1, r0, lsl #2
 800937e:	d022      	beq.n	80093c6 <__lshift+0x92>
 8009380:	2000      	movs	r0, #0
 8009382:	f1c2 0c20 	rsb	ip, r2, #32
 8009386:	680e      	ldr	r6, [r1, #0]
 8009388:	4096      	lsls	r6, r2
 800938a:	4330      	orrs	r0, r6
 800938c:	f843 0b04 	str.w	r0, [r3], #4
 8009390:	f851 0b04 	ldr.w	r0, [r1], #4
 8009394:	458e      	cmp	lr, r1
 8009396:	fa20 f00c 	lsr.w	r0, r0, ip
 800939a:	d8f4      	bhi.n	8009386 <__lshift+0x52>
 800939c:	6018      	str	r0, [r3, #0]
 800939e:	b108      	cbz	r0, 80093a4 <__lshift+0x70>
 80093a0:	f109 0502 	add.w	r5, r9, #2
 80093a4:	3d01      	subs	r5, #1
 80093a6:	4638      	mov	r0, r7
 80093a8:	f8c8 5010 	str.w	r5, [r8, #16]
 80093ac:	4621      	mov	r1, r4
 80093ae:	f7ff fe3e 	bl	800902e <_Bfree>
 80093b2:	4640      	mov	r0, r8
 80093b4:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80093b8:	3101      	adds	r1, #1
 80093ba:	005b      	lsls	r3, r3, #1
 80093bc:	e7c8      	b.n	8009350 <__lshift+0x1c>
 80093be:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
 80093c2:	3201      	adds	r2, #1
 80093c4:	e7ce      	b.n	8009364 <__lshift+0x30>
 80093c6:	3b04      	subs	r3, #4
 80093c8:	f851 2b04 	ldr.w	r2, [r1], #4
 80093cc:	458e      	cmp	lr, r1
 80093ce:	f843 2f04 	str.w	r2, [r3, #4]!
 80093d2:	d8f9      	bhi.n	80093c8 <__lshift+0x94>
 80093d4:	e7e6      	b.n	80093a4 <__lshift+0x70>

080093d6 <__mcmp>:
 80093d6:	6903      	ldr	r3, [r0, #16]
 80093d8:	690a      	ldr	r2, [r1, #16]
 80093da:	b530      	push	{r4, r5, lr}
 80093dc:	1a9b      	subs	r3, r3, r2
 80093de:	d10c      	bne.n	80093fa <__mcmp+0x24>
 80093e0:	0092      	lsls	r2, r2, #2
 80093e2:	3014      	adds	r0, #20
 80093e4:	3114      	adds	r1, #20
 80093e6:	1884      	adds	r4, r0, r2
 80093e8:	4411      	add	r1, r2
 80093ea:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 80093ee:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 80093f2:	4295      	cmp	r5, r2
 80093f4:	d003      	beq.n	80093fe <__mcmp+0x28>
 80093f6:	d305      	bcc.n	8009404 <__mcmp+0x2e>
 80093f8:	2301      	movs	r3, #1
 80093fa:	4618      	mov	r0, r3
 80093fc:	bd30      	pop	{r4, r5, pc}
 80093fe:	42a0      	cmp	r0, r4
 8009400:	d3f3      	bcc.n	80093ea <__mcmp+0x14>
 8009402:	e7fa      	b.n	80093fa <__mcmp+0x24>
 8009404:	f04f 33ff 	mov.w	r3, #4294967295
 8009408:	e7f7      	b.n	80093fa <__mcmp+0x24>

0800940a <__mdiff>:
 800940a:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800940e:	460d      	mov	r5, r1
 8009410:	4607      	mov	r7, r0
 8009412:	4611      	mov	r1, r2
 8009414:	4628      	mov	r0, r5
 8009416:	4614      	mov	r4, r2
 8009418:	f7ff ffdd 	bl	80093d6 <__mcmp>
 800941c:	1e06      	subs	r6, r0, #0
 800941e:	d108      	bne.n	8009432 <__mdiff+0x28>
 8009420:	4631      	mov	r1, r6
 8009422:	4638      	mov	r0, r7
 8009424:	f7ff fdcf 	bl	8008fc6 <_Balloc>
 8009428:	2301      	movs	r3, #1
 800942a:	6146      	str	r6, [r0, #20]
 800942c:	6103      	str	r3, [r0, #16]
 800942e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8009432:	bfa4      	itt	ge
 8009434:	4623      	movge	r3, r4
 8009436:	462c      	movge	r4, r5
 8009438:	4638      	mov	r0, r7
 800943a:	6861      	ldr	r1, [r4, #4]
 800943c:	bfa6      	itte	ge
 800943e:	461d      	movge	r5, r3
 8009440:	2600      	movge	r6, #0
 8009442:	2601      	movlt	r6, #1
 8009444:	f7ff fdbf 	bl	8008fc6 <_Balloc>
 8009448:	f04f 0c00 	mov.w	ip, #0
 800944c:	60c6      	str	r6, [r0, #12]
 800944e:	692b      	ldr	r3, [r5, #16]
 8009450:	6926      	ldr	r6, [r4, #16]
 8009452:	f104 0214 	add.w	r2, r4, #20
 8009456:	f105 0914 	add.w	r9, r5, #20
 800945a:	eb02 0786 	add.w	r7, r2, r6, lsl #2
 800945e:	eb09 0883 	add.w	r8, r9, r3, lsl #2
 8009462:	f100 0114 	add.w	r1, r0, #20
 8009466:	f852 ab04 	ldr.w	sl, [r2], #4
 800946a:	f859 5b04 	ldr.w	r5, [r9], #4
 800946e:	fa1f f38a 	uxth.w	r3, sl
 8009472:	4463      	add	r3, ip
 8009474:	b2ac      	uxth	r4, r5
 8009476:	1b1b      	subs	r3, r3, r4
 8009478:	0c2c      	lsrs	r4, r5, #16
 800947a:	ebc4 441a 	rsb	r4, r4, sl, lsr #16
 800947e:	eb04 4423 	add.w	r4, r4, r3, asr #16
 8009482:	b29b      	uxth	r3, r3
 8009484:	ea4f 4c24 	mov.w	ip, r4, asr #16
 8009488:	45c8      	cmp	r8, r9
 800948a:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
 800948e:	4696      	mov	lr, r2
 8009490:	f841 4b04 	str.w	r4, [r1], #4
 8009494:	d8e7      	bhi.n	8009466 <__mdiff+0x5c>
 8009496:	45be      	cmp	lr, r7
 8009498:	d305      	bcc.n	80094a6 <__mdiff+0x9c>
 800949a:	f851 3d04 	ldr.w	r3, [r1, #-4]!
 800949e:	b18b      	cbz	r3, 80094c4 <__mdiff+0xba>
 80094a0:	6106      	str	r6, [r0, #16]
 80094a2:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80094a6:	f85e 4b04 	ldr.w	r4, [lr], #4
 80094aa:	b2a2      	uxth	r2, r4
 80094ac:	4462      	add	r2, ip
 80094ae:	1413      	asrs	r3, r2, #16
 80094b0:	eb03 4314 	add.w	r3, r3, r4, lsr #16
 80094b4:	b292      	uxth	r2, r2
 80094b6:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 80094ba:	ea4f 4c23 	mov.w	ip, r3, asr #16
 80094be:	f841 2b04 	str.w	r2, [r1], #4
 80094c2:	e7e8      	b.n	8009496 <__mdiff+0x8c>
 80094c4:	3e01      	subs	r6, #1
 80094c6:	e7e8      	b.n	800949a <__mdiff+0x90>

080094c8 <__d2b>:
 80094c8:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
 80094cc:	461c      	mov	r4, r3
 80094ce:	2101      	movs	r1, #1
 80094d0:	4690      	mov	r8, r2
 80094d2:	9e08      	ldr	r6, [sp, #32]
 80094d4:	9d09      	ldr	r5, [sp, #36]	; 0x24
 80094d6:	f7ff fd76 	bl	8008fc6 <_Balloc>
 80094da:	f3c4 0213 	ubfx	r2, r4, #0, #20
 80094de:	f3c4 540a 	ubfx	r4, r4, #20, #11
 80094e2:	4607      	mov	r7, r0
 80094e4:	bb34      	cbnz	r4, 8009534 <__d2b+0x6c>
 80094e6:	9201      	str	r2, [sp, #4]
 80094e8:	f1b8 0f00 	cmp.w	r8, #0
 80094ec:	d027      	beq.n	800953e <__d2b+0x76>
 80094ee:	a802      	add	r0, sp, #8
 80094f0:	f840 8d08 	str.w	r8, [r0, #-8]!
 80094f4:	f7ff fe0c 	bl	8009110 <__lo0bits>
 80094f8:	9900      	ldr	r1, [sp, #0]
 80094fa:	b1f0      	cbz	r0, 800953a <__d2b+0x72>
 80094fc:	9a01      	ldr	r2, [sp, #4]
 80094fe:	f1c0 0320 	rsb	r3, r0, #32
 8009502:	fa02 f303 	lsl.w	r3, r2, r3
 8009506:	430b      	orrs	r3, r1
 8009508:	40c2      	lsrs	r2, r0
 800950a:	617b      	str	r3, [r7, #20]
 800950c:	9201      	str	r2, [sp, #4]
 800950e:	9b01      	ldr	r3, [sp, #4]
 8009510:	2b00      	cmp	r3, #0
 8009512:	bf14      	ite	ne
 8009514:	2102      	movne	r1, #2
 8009516:	2101      	moveq	r1, #1
 8009518:	61bb      	str	r3, [r7, #24]
 800951a:	6139      	str	r1, [r7, #16]
 800951c:	b1c4      	cbz	r4, 8009550 <__d2b+0x88>
 800951e:	f2a4 4433 	subw	r4, r4, #1075	; 0x433
 8009522:	4404      	add	r4, r0
 8009524:	6034      	str	r4, [r6, #0]
 8009526:	f1c0 0035 	rsb	r0, r0, #53	; 0x35
 800952a:	6028      	str	r0, [r5, #0]
 800952c:	4638      	mov	r0, r7
 800952e:	b002      	add	sp, #8
 8009530:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8009534:	f442 1280 	orr.w	r2, r2, #1048576	; 0x100000
 8009538:	e7d5      	b.n	80094e6 <__d2b+0x1e>
 800953a:	6179      	str	r1, [r7, #20]
 800953c:	e7e7      	b.n	800950e <__d2b+0x46>
 800953e:	a801      	add	r0, sp, #4
 8009540:	f7ff fde6 	bl	8009110 <__lo0bits>
 8009544:	2101      	movs	r1, #1
 8009546:	9b01      	ldr	r3, [sp, #4]
 8009548:	6139      	str	r1, [r7, #16]
 800954a:	617b      	str	r3, [r7, #20]
 800954c:	3020      	adds	r0, #32
 800954e:	e7e5      	b.n	800951c <__d2b+0x54>
 8009550:	f2a0 4032 	subw	r0, r0, #1074	; 0x432
 8009554:	eb07 0381 	add.w	r3, r7, r1, lsl #2
 8009558:	6030      	str	r0, [r6, #0]
 800955a:	6918      	ldr	r0, [r3, #16]
 800955c:	f7ff fdb9 	bl	80090d2 <__hi0bits>
 8009560:	ebc0 1041 	rsb	r0, r0, r1, lsl #5
 8009564:	e7e1      	b.n	800952a <__d2b+0x62>

08009566 <_calloc_r>:
 8009566:	b538      	push	{r3, r4, r5, lr}
 8009568:	fb02 f401 	mul.w	r4, r2, r1
 800956c:	4621      	mov	r1, r4
 800956e:	f000 f855 	bl	800961c <_malloc_r>
 8009572:	4605      	mov	r5, r0
 8009574:	b118      	cbz	r0, 800957e <_calloc_r+0x18>
 8009576:	4622      	mov	r2, r4
 8009578:	2100      	movs	r1, #0
 800957a:	f7fd fe43 	bl	8007204 <memset>
 800957e:	4628      	mov	r0, r5
 8009580:	bd38      	pop	{r3, r4, r5, pc}
	...

08009584 <_free_r>:
 8009584:	b538      	push	{r3, r4, r5, lr}
 8009586:	4605      	mov	r5, r0
 8009588:	2900      	cmp	r1, #0
 800958a:	d043      	beq.n	8009614 <_free_r+0x90>
 800958c:	f851 3c04 	ldr.w	r3, [r1, #-4]
 8009590:	1f0c      	subs	r4, r1, #4
 8009592:	2b00      	cmp	r3, #0
 8009594:	bfb8      	it	lt
 8009596:	18e4      	addlt	r4, r4, r3
 8009598:	f000 face 	bl	8009b38 <__malloc_lock>
 800959c:	4a1e      	ldr	r2, [pc, #120]	; (8009618 <_free_r+0x94>)
 800959e:	6813      	ldr	r3, [r2, #0]
 80095a0:	4610      	mov	r0, r2
 80095a2:	b933      	cbnz	r3, 80095b2 <_free_r+0x2e>
 80095a4:	6063      	str	r3, [r4, #4]
 80095a6:	6014      	str	r4, [r2, #0]
 80095a8:	4628      	mov	r0, r5
 80095aa:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 80095ae:	f000 bac4 	b.w	8009b3a <__malloc_unlock>
 80095b2:	42a3      	cmp	r3, r4
 80095b4:	d90b      	bls.n	80095ce <_free_r+0x4a>
 80095b6:	6821      	ldr	r1, [r4, #0]
 80095b8:	1862      	adds	r2, r4, r1
 80095ba:	4293      	cmp	r3, r2
 80095bc:	bf01      	itttt	eq
 80095be:	681a      	ldreq	r2, [r3, #0]
 80095c0:	685b      	ldreq	r3, [r3, #4]
 80095c2:	1852      	addeq	r2, r2, r1
 80095c4:	6022      	streq	r2, [r4, #0]
 80095c6:	6063      	str	r3, [r4, #4]
 80095c8:	6004      	str	r4, [r0, #0]
 80095ca:	e7ed      	b.n	80095a8 <_free_r+0x24>
 80095cc:	4613      	mov	r3, r2
 80095ce:	685a      	ldr	r2, [r3, #4]
 80095d0:	b10a      	cbz	r2, 80095d6 <_free_r+0x52>
 80095d2:	42a2      	cmp	r2, r4
 80095d4:	d9fa      	bls.n	80095cc <_free_r+0x48>
 80095d6:	6819      	ldr	r1, [r3, #0]
 80095d8:	1858      	adds	r0, r3, r1
 80095da:	42a0      	cmp	r0, r4
 80095dc:	d10b      	bne.n	80095f6 <_free_r+0x72>
 80095de:	6820      	ldr	r0, [r4, #0]
 80095e0:	4401      	add	r1, r0
 80095e2:	1858      	adds	r0, r3, r1
 80095e4:	4282      	cmp	r2, r0
 80095e6:	6019      	str	r1, [r3, #0]
 80095e8:	d1de      	bne.n	80095a8 <_free_r+0x24>
 80095ea:	6810      	ldr	r0, [r2, #0]
 80095ec:	6852      	ldr	r2, [r2, #4]
 80095ee:	4401      	add	r1, r0
 80095f0:	6019      	str	r1, [r3, #0]
 80095f2:	605a      	str	r2, [r3, #4]
 80095f4:	e7d8      	b.n	80095a8 <_free_r+0x24>
 80095f6:	d902      	bls.n	80095fe <_free_r+0x7a>
 80095f8:	230c      	movs	r3, #12
 80095fa:	602b      	str	r3, [r5, #0]
 80095fc:	e7d4      	b.n	80095a8 <_free_r+0x24>
 80095fe:	6820      	ldr	r0, [r4, #0]
 8009600:	1821      	adds	r1, r4, r0
 8009602:	428a      	cmp	r2, r1
 8009604:	bf01      	itttt	eq
 8009606:	6811      	ldreq	r1, [r2, #0]
 8009608:	6852      	ldreq	r2, [r2, #4]
 800960a:	1809      	addeq	r1, r1, r0
 800960c:	6021      	streq	r1, [r4, #0]
 800960e:	6062      	str	r2, [r4, #4]
 8009610:	605c      	str	r4, [r3, #4]
 8009612:	e7c9      	b.n	80095a8 <_free_r+0x24>
 8009614:	bd38      	pop	{r3, r4, r5, pc}
 8009616:	bf00      	nop
 8009618:	20000410 	.word	0x20000410

0800961c <_malloc_r>:
 800961c:	b570      	push	{r4, r5, r6, lr}
 800961e:	1ccd      	adds	r5, r1, #3
 8009620:	f025 0503 	bic.w	r5, r5, #3
 8009624:	3508      	adds	r5, #8
 8009626:	2d0c      	cmp	r5, #12
 8009628:	bf38      	it	cc
 800962a:	250c      	movcc	r5, #12
 800962c:	2d00      	cmp	r5, #0
 800962e:	4606      	mov	r6, r0
 8009630:	db01      	blt.n	8009636 <_malloc_r+0x1a>
 8009632:	42a9      	cmp	r1, r5
 8009634:	d903      	bls.n	800963e <_malloc_r+0x22>
 8009636:	230c      	movs	r3, #12
 8009638:	6033      	str	r3, [r6, #0]
 800963a:	2000      	movs	r0, #0
 800963c:	bd70      	pop	{r4, r5, r6, pc}
 800963e:	f000 fa7b 	bl	8009b38 <__malloc_lock>
 8009642:	4a23      	ldr	r2, [pc, #140]	; (80096d0 <_malloc_r+0xb4>)
 8009644:	6814      	ldr	r4, [r2, #0]
 8009646:	4621      	mov	r1, r4
 8009648:	b991      	cbnz	r1, 8009670 <_malloc_r+0x54>
 800964a:	4c22      	ldr	r4, [pc, #136]	; (80096d4 <_malloc_r+0xb8>)
 800964c:	6823      	ldr	r3, [r4, #0]
 800964e:	b91b      	cbnz	r3, 8009658 <_malloc_r+0x3c>
 8009650:	4630      	mov	r0, r6
 8009652:	f000 f9b5 	bl	80099c0 <_sbrk_r>
 8009656:	6020      	str	r0, [r4, #0]
 8009658:	4629      	mov	r1, r5
 800965a:	4630      	mov	r0, r6
 800965c:	f000 f9b0 	bl	80099c0 <_sbrk_r>
 8009660:	1c43      	adds	r3, r0, #1
 8009662:	d126      	bne.n	80096b2 <_malloc_r+0x96>
 8009664:	230c      	movs	r3, #12
 8009666:	4630      	mov	r0, r6
 8009668:	6033      	str	r3, [r6, #0]
 800966a:	f000 fa66 	bl	8009b3a <__malloc_unlock>
 800966e:	e7e4      	b.n	800963a <_malloc_r+0x1e>
 8009670:	680b      	ldr	r3, [r1, #0]
 8009672:	1b5b      	subs	r3, r3, r5
 8009674:	d41a      	bmi.n	80096ac <_malloc_r+0x90>
 8009676:	2b0b      	cmp	r3, #11
 8009678:	d90f      	bls.n	800969a <_malloc_r+0x7e>
 800967a:	600b      	str	r3, [r1, #0]
 800967c:	18cc      	adds	r4, r1, r3
 800967e:	50cd      	str	r5, [r1, r3]
 8009680:	4630      	mov	r0, r6
 8009682:	f000 fa5a 	bl	8009b3a <__malloc_unlock>
 8009686:	f104 000b 	add.w	r0, r4, #11
 800968a:	1d23      	adds	r3, r4, #4
 800968c:	f020 0007 	bic.w	r0, r0, #7
 8009690:	1ac3      	subs	r3, r0, r3
 8009692:	d01b      	beq.n	80096cc <_malloc_r+0xb0>
 8009694:	425a      	negs	r2, r3
 8009696:	50e2      	str	r2, [r4, r3]
 8009698:	bd70      	pop	{r4, r5, r6, pc}
 800969a:	428c      	cmp	r4, r1
 800969c:	bf0b      	itete	eq
 800969e:	6863      	ldreq	r3, [r4, #4]
 80096a0:	684b      	ldrne	r3, [r1, #4]
 80096a2:	6013      	streq	r3, [r2, #0]
 80096a4:	6063      	strne	r3, [r4, #4]
 80096a6:	bf18      	it	ne
 80096a8:	460c      	movne	r4, r1
 80096aa:	e7e9      	b.n	8009680 <_malloc_r+0x64>
 80096ac:	460c      	mov	r4, r1
 80096ae:	6849      	ldr	r1, [r1, #4]
 80096b0:	e7ca      	b.n	8009648 <_malloc_r+0x2c>
 80096b2:	1cc4      	adds	r4, r0, #3
 80096b4:	f024 0403 	bic.w	r4, r4, #3
 80096b8:	42a0      	cmp	r0, r4
 80096ba:	d005      	beq.n	80096c8 <_malloc_r+0xac>
 80096bc:	1a21      	subs	r1, r4, r0
 80096be:	4630      	mov	r0, r6
 80096c0:	f000 f97e 	bl	80099c0 <_sbrk_r>
 80096c4:	3001      	adds	r0, #1
 80096c6:	d0cd      	beq.n	8009664 <_malloc_r+0x48>
 80096c8:	6025      	str	r5, [r4, #0]
 80096ca:	e7d9      	b.n	8009680 <_malloc_r+0x64>
 80096cc:	bd70      	pop	{r4, r5, r6, pc}
 80096ce:	bf00      	nop
 80096d0:	20000410 	.word	0x20000410
 80096d4:	20000414 	.word	0x20000414

080096d8 <__sfputc_r>:
 80096d8:	6893      	ldr	r3, [r2, #8]
 80096da:	b410      	push	{r4}
 80096dc:	3b01      	subs	r3, #1
 80096de:	2b00      	cmp	r3, #0
 80096e0:	6093      	str	r3, [r2, #8]
 80096e2:	da08      	bge.n	80096f6 <__sfputc_r+0x1e>
 80096e4:	6994      	ldr	r4, [r2, #24]
 80096e6:	42a3      	cmp	r3, r4
 80096e8:	db02      	blt.n	80096f0 <__sfputc_r+0x18>
 80096ea:	b2cb      	uxtb	r3, r1
 80096ec:	2b0a      	cmp	r3, #10
 80096ee:	d102      	bne.n	80096f6 <__sfputc_r+0x1e>
 80096f0:	bc10      	pop	{r4}
 80096f2:	f7fe bb37 	b.w	8007d64 <__swbuf_r>
 80096f6:	6813      	ldr	r3, [r2, #0]
 80096f8:	1c58      	adds	r0, r3, #1
 80096fa:	6010      	str	r0, [r2, #0]
 80096fc:	7019      	strb	r1, [r3, #0]
 80096fe:	b2c8      	uxtb	r0, r1
 8009700:	bc10      	pop	{r4}
 8009702:	4770      	bx	lr

08009704 <__sfputs_r>:
 8009704:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8009706:	4606      	mov	r6, r0
 8009708:	460f      	mov	r7, r1
 800970a:	4614      	mov	r4, r2
 800970c:	18d5      	adds	r5, r2, r3
 800970e:	42ac      	cmp	r4, r5
 8009710:	d101      	bne.n	8009716 <__sfputs_r+0x12>
 8009712:	2000      	movs	r0, #0
 8009714:	e007      	b.n	8009726 <__sfputs_r+0x22>
 8009716:	463a      	mov	r2, r7
 8009718:	f814 1b01 	ldrb.w	r1, [r4], #1
 800971c:	4630      	mov	r0, r6
 800971e:	f7ff ffdb 	bl	80096d8 <__sfputc_r>
 8009722:	1c43      	adds	r3, r0, #1
 8009724:	d1f3      	bne.n	800970e <__sfputs_r+0xa>
 8009726:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

08009728 <_vfiprintf_r>:
 8009728:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800972c:	b09d      	sub	sp, #116	; 0x74
 800972e:	460c      	mov	r4, r1
 8009730:	4617      	mov	r7, r2
 8009732:	9303      	str	r3, [sp, #12]
 8009734:	4606      	mov	r6, r0
 8009736:	b118      	cbz	r0, 8009740 <_vfiprintf_r+0x18>
 8009738:	6983      	ldr	r3, [r0, #24]
 800973a:	b90b      	cbnz	r3, 8009740 <_vfiprintf_r+0x18>
 800973c:	f7ff fb26 	bl	8008d8c <__sinit>
 8009740:	4b7c      	ldr	r3, [pc, #496]	; (8009934 <_vfiprintf_r+0x20c>)
 8009742:	429c      	cmp	r4, r3
 8009744:	d157      	bne.n	80097f6 <_vfiprintf_r+0xce>
 8009746:	6874      	ldr	r4, [r6, #4]
 8009748:	89a3      	ldrh	r3, [r4, #12]
 800974a:	0718      	lsls	r0, r3, #28
 800974c:	d55d      	bpl.n	800980a <_vfiprintf_r+0xe2>
 800974e:	6923      	ldr	r3, [r4, #16]
 8009750:	2b00      	cmp	r3, #0
 8009752:	d05a      	beq.n	800980a <_vfiprintf_r+0xe2>
 8009754:	2300      	movs	r3, #0
 8009756:	9309      	str	r3, [sp, #36]	; 0x24
 8009758:	2320      	movs	r3, #32
 800975a:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 800975e:	2330      	movs	r3, #48	; 0x30
 8009760:	f04f 0b01 	mov.w	fp, #1
 8009764:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 8009768:	46b8      	mov	r8, r7
 800976a:	4645      	mov	r5, r8
 800976c:	f815 3b01 	ldrb.w	r3, [r5], #1
 8009770:	2b00      	cmp	r3, #0
 8009772:	d155      	bne.n	8009820 <_vfiprintf_r+0xf8>
 8009774:	ebb8 0a07 	subs.w	sl, r8, r7
 8009778:	d00b      	beq.n	8009792 <_vfiprintf_r+0x6a>
 800977a:	4653      	mov	r3, sl
 800977c:	463a      	mov	r2, r7
 800977e:	4621      	mov	r1, r4
 8009780:	4630      	mov	r0, r6
 8009782:	f7ff ffbf 	bl	8009704 <__sfputs_r>
 8009786:	3001      	adds	r0, #1
 8009788:	f000 80c4 	beq.w	8009914 <_vfiprintf_r+0x1ec>
 800978c:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800978e:	4453      	add	r3, sl
 8009790:	9309      	str	r3, [sp, #36]	; 0x24
 8009792:	f898 3000 	ldrb.w	r3, [r8]
 8009796:	2b00      	cmp	r3, #0
 8009798:	f000 80bc 	beq.w	8009914 <_vfiprintf_r+0x1ec>
 800979c:	2300      	movs	r3, #0
 800979e:	f04f 32ff 	mov.w	r2, #4294967295
 80097a2:	9304      	str	r3, [sp, #16]
 80097a4:	9307      	str	r3, [sp, #28]
 80097a6:	9205      	str	r2, [sp, #20]
 80097a8:	9306      	str	r3, [sp, #24]
 80097aa:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 80097ae:	931a      	str	r3, [sp, #104]	; 0x68
 80097b0:	2205      	movs	r2, #5
 80097b2:	7829      	ldrb	r1, [r5, #0]
 80097b4:	4860      	ldr	r0, [pc, #384]	; (8009938 <_vfiprintf_r+0x210>)
 80097b6:	f7ff fbed 	bl	8008f94 <memchr>
 80097ba:	f105 0801 	add.w	r8, r5, #1
 80097be:	9b04      	ldr	r3, [sp, #16]
 80097c0:	2800      	cmp	r0, #0
 80097c2:	d131      	bne.n	8009828 <_vfiprintf_r+0x100>
 80097c4:	06d9      	lsls	r1, r3, #27
 80097c6:	bf44      	itt	mi
 80097c8:	2220      	movmi	r2, #32
 80097ca:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 80097ce:	071a      	lsls	r2, r3, #28
 80097d0:	bf44      	itt	mi
 80097d2:	222b      	movmi	r2, #43	; 0x2b
 80097d4:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 80097d8:	782a      	ldrb	r2, [r5, #0]
 80097da:	2a2a      	cmp	r2, #42	; 0x2a
 80097dc:	d02c      	beq.n	8009838 <_vfiprintf_r+0x110>
 80097de:	2100      	movs	r1, #0
 80097e0:	200a      	movs	r0, #10
 80097e2:	9a07      	ldr	r2, [sp, #28]
 80097e4:	46a8      	mov	r8, r5
 80097e6:	f898 3000 	ldrb.w	r3, [r8]
 80097ea:	3501      	adds	r5, #1
 80097ec:	3b30      	subs	r3, #48	; 0x30
 80097ee:	2b09      	cmp	r3, #9
 80097f0:	d96d      	bls.n	80098ce <_vfiprintf_r+0x1a6>
 80097f2:	b371      	cbz	r1, 8009852 <_vfiprintf_r+0x12a>
 80097f4:	e026      	b.n	8009844 <_vfiprintf_r+0x11c>
 80097f6:	4b51      	ldr	r3, [pc, #324]	; (800993c <_vfiprintf_r+0x214>)
 80097f8:	429c      	cmp	r4, r3
 80097fa:	d101      	bne.n	8009800 <_vfiprintf_r+0xd8>
 80097fc:	68b4      	ldr	r4, [r6, #8]
 80097fe:	e7a3      	b.n	8009748 <_vfiprintf_r+0x20>
 8009800:	4b4f      	ldr	r3, [pc, #316]	; (8009940 <_vfiprintf_r+0x218>)
 8009802:	429c      	cmp	r4, r3
 8009804:	bf08      	it	eq
 8009806:	68f4      	ldreq	r4, [r6, #12]
 8009808:	e79e      	b.n	8009748 <_vfiprintf_r+0x20>
 800980a:	4621      	mov	r1, r4
 800980c:	4630      	mov	r0, r6
 800980e:	f7fe fafb 	bl	8007e08 <__swsetup_r>
 8009812:	2800      	cmp	r0, #0
 8009814:	d09e      	beq.n	8009754 <_vfiprintf_r+0x2c>
 8009816:	f04f 30ff 	mov.w	r0, #4294967295
 800981a:	b01d      	add	sp, #116	; 0x74
 800981c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8009820:	2b25      	cmp	r3, #37	; 0x25
 8009822:	d0a7      	beq.n	8009774 <_vfiprintf_r+0x4c>
 8009824:	46a8      	mov	r8, r5
 8009826:	e7a0      	b.n	800976a <_vfiprintf_r+0x42>
 8009828:	4a43      	ldr	r2, [pc, #268]	; (8009938 <_vfiprintf_r+0x210>)
 800982a:	4645      	mov	r5, r8
 800982c:	1a80      	subs	r0, r0, r2
 800982e:	fa0b f000 	lsl.w	r0, fp, r0
 8009832:	4318      	orrs	r0, r3
 8009834:	9004      	str	r0, [sp, #16]
 8009836:	e7bb      	b.n	80097b0 <_vfiprintf_r+0x88>
 8009838:	9a03      	ldr	r2, [sp, #12]
 800983a:	1d11      	adds	r1, r2, #4
 800983c:	6812      	ldr	r2, [r2, #0]
 800983e:	9103      	str	r1, [sp, #12]
 8009840:	2a00      	cmp	r2, #0
 8009842:	db01      	blt.n	8009848 <_vfiprintf_r+0x120>
 8009844:	9207      	str	r2, [sp, #28]
 8009846:	e004      	b.n	8009852 <_vfiprintf_r+0x12a>
 8009848:	4252      	negs	r2, r2
 800984a:	f043 0302 	orr.w	r3, r3, #2
 800984e:	9207      	str	r2, [sp, #28]
 8009850:	9304      	str	r3, [sp, #16]
 8009852:	f898 3000 	ldrb.w	r3, [r8]
 8009856:	2b2e      	cmp	r3, #46	; 0x2e
 8009858:	d110      	bne.n	800987c <_vfiprintf_r+0x154>
 800985a:	f898 3001 	ldrb.w	r3, [r8, #1]
 800985e:	f108 0101 	add.w	r1, r8, #1
 8009862:	2b2a      	cmp	r3, #42	; 0x2a
 8009864:	d137      	bne.n	80098d6 <_vfiprintf_r+0x1ae>
 8009866:	9b03      	ldr	r3, [sp, #12]
 8009868:	f108 0802 	add.w	r8, r8, #2
 800986c:	1d1a      	adds	r2, r3, #4
 800986e:	681b      	ldr	r3, [r3, #0]
 8009870:	9203      	str	r2, [sp, #12]
 8009872:	2b00      	cmp	r3, #0
 8009874:	bfb8      	it	lt
 8009876:	f04f 33ff 	movlt.w	r3, #4294967295
 800987a:	9305      	str	r3, [sp, #20]
 800987c:	4d31      	ldr	r5, [pc, #196]	; (8009944 <_vfiprintf_r+0x21c>)
 800987e:	2203      	movs	r2, #3
 8009880:	f898 1000 	ldrb.w	r1, [r8]
 8009884:	4628      	mov	r0, r5
 8009886:	f7ff fb85 	bl	8008f94 <memchr>
 800988a:	b140      	cbz	r0, 800989e <_vfiprintf_r+0x176>
 800988c:	2340      	movs	r3, #64	; 0x40
 800988e:	1b40      	subs	r0, r0, r5
 8009890:	fa03 f000 	lsl.w	r0, r3, r0
 8009894:	9b04      	ldr	r3, [sp, #16]
 8009896:	f108 0801 	add.w	r8, r8, #1
 800989a:	4303      	orrs	r3, r0
 800989c:	9304      	str	r3, [sp, #16]
 800989e:	f898 1000 	ldrb.w	r1, [r8]
 80098a2:	2206      	movs	r2, #6
 80098a4:	4828      	ldr	r0, [pc, #160]	; (8009948 <_vfiprintf_r+0x220>)
 80098a6:	f108 0701 	add.w	r7, r8, #1
 80098aa:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 80098ae:	f7ff fb71 	bl	8008f94 <memchr>
 80098b2:	2800      	cmp	r0, #0
 80098b4:	d034      	beq.n	8009920 <_vfiprintf_r+0x1f8>
 80098b6:	4b25      	ldr	r3, [pc, #148]	; (800994c <_vfiprintf_r+0x224>)
 80098b8:	bb03      	cbnz	r3, 80098fc <_vfiprintf_r+0x1d4>
 80098ba:	9b03      	ldr	r3, [sp, #12]
 80098bc:	3307      	adds	r3, #7
 80098be:	f023 0307 	bic.w	r3, r3, #7
 80098c2:	3308      	adds	r3, #8
 80098c4:	9303      	str	r3, [sp, #12]
 80098c6:	9b09      	ldr	r3, [sp, #36]	; 0x24
 80098c8:	444b      	add	r3, r9
 80098ca:	9309      	str	r3, [sp, #36]	; 0x24
 80098cc:	e74c      	b.n	8009768 <_vfiprintf_r+0x40>
 80098ce:	fb00 3202 	mla	r2, r0, r2, r3
 80098d2:	2101      	movs	r1, #1
 80098d4:	e786      	b.n	80097e4 <_vfiprintf_r+0xbc>
 80098d6:	2300      	movs	r3, #0
 80098d8:	250a      	movs	r5, #10
 80098da:	4618      	mov	r0, r3
 80098dc:	9305      	str	r3, [sp, #20]
 80098de:	4688      	mov	r8, r1
 80098e0:	f898 2000 	ldrb.w	r2, [r8]
 80098e4:	3101      	adds	r1, #1
 80098e6:	3a30      	subs	r2, #48	; 0x30
 80098e8:	2a09      	cmp	r2, #9
 80098ea:	d903      	bls.n	80098f4 <_vfiprintf_r+0x1cc>
 80098ec:	2b00      	cmp	r3, #0
 80098ee:	d0c5      	beq.n	800987c <_vfiprintf_r+0x154>
 80098f0:	9005      	str	r0, [sp, #20]
 80098f2:	e7c3      	b.n	800987c <_vfiprintf_r+0x154>
 80098f4:	fb05 2000 	mla	r0, r5, r0, r2
 80098f8:	2301      	movs	r3, #1
 80098fa:	e7f0      	b.n	80098de <_vfiprintf_r+0x1b6>
 80098fc:	ab03      	add	r3, sp, #12
 80098fe:	9300      	str	r3, [sp, #0]
 8009900:	4622      	mov	r2, r4
 8009902:	4b13      	ldr	r3, [pc, #76]	; (8009950 <_vfiprintf_r+0x228>)
 8009904:	a904      	add	r1, sp, #16
 8009906:	4630      	mov	r0, r6
 8009908:	f7fd fd16 	bl	8007338 <_printf_float>
 800990c:	f1b0 3fff 	cmp.w	r0, #4294967295
 8009910:	4681      	mov	r9, r0
 8009912:	d1d8      	bne.n	80098c6 <_vfiprintf_r+0x19e>
 8009914:	89a3      	ldrh	r3, [r4, #12]
 8009916:	065b      	lsls	r3, r3, #25
 8009918:	f53f af7d 	bmi.w	8009816 <_vfiprintf_r+0xee>
 800991c:	9809      	ldr	r0, [sp, #36]	; 0x24
 800991e:	e77c      	b.n	800981a <_vfiprintf_r+0xf2>
 8009920:	ab03      	add	r3, sp, #12
 8009922:	9300      	str	r3, [sp, #0]
 8009924:	4622      	mov	r2, r4
 8009926:	4b0a      	ldr	r3, [pc, #40]	; (8009950 <_vfiprintf_r+0x228>)
 8009928:	a904      	add	r1, sp, #16
 800992a:	4630      	mov	r0, r6
 800992c:	f7fd ffb4 	bl	8007898 <_printf_i>
 8009930:	e7ec      	b.n	800990c <_vfiprintf_r+0x1e4>
 8009932:	bf00      	nop
 8009934:	08009d04 	.word	0x08009d04
 8009938:	08009e44 	.word	0x08009e44
 800993c:	08009d24 	.word	0x08009d24
 8009940:	08009ce4 	.word	0x08009ce4
 8009944:	08009e4a 	.word	0x08009e4a
 8009948:	08009e4e 	.word	0x08009e4e
 800994c:	08007339 	.word	0x08007339
 8009950:	08009705 	.word	0x08009705

08009954 <_putc_r>:
 8009954:	b570      	push	{r4, r5, r6, lr}
 8009956:	460d      	mov	r5, r1
 8009958:	4614      	mov	r4, r2
 800995a:	4606      	mov	r6, r0
 800995c:	b118      	cbz	r0, 8009966 <_putc_r+0x12>
 800995e:	6983      	ldr	r3, [r0, #24]
 8009960:	b90b      	cbnz	r3, 8009966 <_putc_r+0x12>
 8009962:	f7ff fa13 	bl	8008d8c <__sinit>
 8009966:	4b13      	ldr	r3, [pc, #76]	; (80099b4 <_putc_r+0x60>)
 8009968:	429c      	cmp	r4, r3
 800996a:	d112      	bne.n	8009992 <_putc_r+0x3e>
 800996c:	6874      	ldr	r4, [r6, #4]
 800996e:	68a3      	ldr	r3, [r4, #8]
 8009970:	3b01      	subs	r3, #1
 8009972:	2b00      	cmp	r3, #0
 8009974:	60a3      	str	r3, [r4, #8]
 8009976:	da16      	bge.n	80099a6 <_putc_r+0x52>
 8009978:	69a2      	ldr	r2, [r4, #24]
 800997a:	4293      	cmp	r3, r2
 800997c:	db02      	blt.n	8009984 <_putc_r+0x30>
 800997e:	b2eb      	uxtb	r3, r5
 8009980:	2b0a      	cmp	r3, #10
 8009982:	d110      	bne.n	80099a6 <_putc_r+0x52>
 8009984:	4622      	mov	r2, r4
 8009986:	4629      	mov	r1, r5
 8009988:	4630      	mov	r0, r6
 800998a:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 800998e:	f7fe b9e9 	b.w	8007d64 <__swbuf_r>
 8009992:	4b09      	ldr	r3, [pc, #36]	; (80099b8 <_putc_r+0x64>)
 8009994:	429c      	cmp	r4, r3
 8009996:	d101      	bne.n	800999c <_putc_r+0x48>
 8009998:	68b4      	ldr	r4, [r6, #8]
 800999a:	e7e8      	b.n	800996e <_putc_r+0x1a>
 800999c:	4b07      	ldr	r3, [pc, #28]	; (80099bc <_putc_r+0x68>)
 800999e:	429c      	cmp	r4, r3
 80099a0:	bf08      	it	eq
 80099a2:	68f4      	ldreq	r4, [r6, #12]
 80099a4:	e7e3      	b.n	800996e <_putc_r+0x1a>
 80099a6:	6823      	ldr	r3, [r4, #0]
 80099a8:	b2e8      	uxtb	r0, r5
 80099aa:	1c5a      	adds	r2, r3, #1
 80099ac:	6022      	str	r2, [r4, #0]
 80099ae:	701d      	strb	r5, [r3, #0]
 80099b0:	bd70      	pop	{r4, r5, r6, pc}
 80099b2:	bf00      	nop
 80099b4:	08009d04 	.word	0x08009d04
 80099b8:	08009d24 	.word	0x08009d24
 80099bc:	08009ce4 	.word	0x08009ce4

080099c0 <_sbrk_r>:
 80099c0:	b538      	push	{r3, r4, r5, lr}
 80099c2:	2300      	movs	r3, #0
 80099c4:	4c05      	ldr	r4, [pc, #20]	; (80099dc <_sbrk_r+0x1c>)
 80099c6:	4605      	mov	r5, r0
 80099c8:	4608      	mov	r0, r1
 80099ca:	6023      	str	r3, [r4, #0]
 80099cc:	f7fd fb10 	bl	8006ff0 <_sbrk>
 80099d0:	1c43      	adds	r3, r0, #1
 80099d2:	d102      	bne.n	80099da <_sbrk_r+0x1a>
 80099d4:	6823      	ldr	r3, [r4, #0]
 80099d6:	b103      	cbz	r3, 80099da <_sbrk_r+0x1a>
 80099d8:	602b      	str	r3, [r5, #0]
 80099da:	bd38      	pop	{r3, r4, r5, pc}
 80099dc:	20000f50 	.word	0x20000f50

080099e0 <__sread>:
 80099e0:	b510      	push	{r4, lr}
 80099e2:	460c      	mov	r4, r1
 80099e4:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 80099e8:	f000 f8a8 	bl	8009b3c <_read_r>
 80099ec:	2800      	cmp	r0, #0
 80099ee:	bfab      	itete	ge
 80099f0:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 80099f2:	89a3      	ldrhlt	r3, [r4, #12]
 80099f4:	181b      	addge	r3, r3, r0
 80099f6:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 80099fa:	bfac      	ite	ge
 80099fc:	6563      	strge	r3, [r4, #84]	; 0x54
 80099fe:	81a3      	strhlt	r3, [r4, #12]
 8009a00:	bd10      	pop	{r4, pc}

08009a02 <__swrite>:
 8009a02:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8009a06:	461f      	mov	r7, r3
 8009a08:	898b      	ldrh	r3, [r1, #12]
 8009a0a:	4605      	mov	r5, r0
 8009a0c:	05db      	lsls	r3, r3, #23
 8009a0e:	460c      	mov	r4, r1
 8009a10:	4616      	mov	r6, r2
 8009a12:	d505      	bpl.n	8009a20 <__swrite+0x1e>
 8009a14:	2302      	movs	r3, #2
 8009a16:	2200      	movs	r2, #0
 8009a18:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8009a1c:	f000 f868 	bl	8009af0 <_lseek_r>
 8009a20:	89a3      	ldrh	r3, [r4, #12]
 8009a22:	4632      	mov	r2, r6
 8009a24:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 8009a28:	81a3      	strh	r3, [r4, #12]
 8009a2a:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8009a2e:	463b      	mov	r3, r7
 8009a30:	4628      	mov	r0, r5
 8009a32:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8009a36:	f000 b817 	b.w	8009a68 <_write_r>

08009a3a <__sseek>:
 8009a3a:	b510      	push	{r4, lr}
 8009a3c:	460c      	mov	r4, r1
 8009a3e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8009a42:	f000 f855 	bl	8009af0 <_lseek_r>
 8009a46:	1c43      	adds	r3, r0, #1
 8009a48:	89a3      	ldrh	r3, [r4, #12]
 8009a4a:	bf15      	itete	ne
 8009a4c:	6560      	strne	r0, [r4, #84]	; 0x54
 8009a4e:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 8009a52:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 8009a56:	81a3      	strheq	r3, [r4, #12]
 8009a58:	bf18      	it	ne
 8009a5a:	81a3      	strhne	r3, [r4, #12]
 8009a5c:	bd10      	pop	{r4, pc}

08009a5e <__sclose>:
 8009a5e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8009a62:	f000 b813 	b.w	8009a8c <_close_r>
	...

08009a68 <_write_r>:
 8009a68:	b538      	push	{r3, r4, r5, lr}
 8009a6a:	4605      	mov	r5, r0
 8009a6c:	4608      	mov	r0, r1
 8009a6e:	4611      	mov	r1, r2
 8009a70:	2200      	movs	r2, #0
 8009a72:	4c05      	ldr	r4, [pc, #20]	; (8009a88 <_write_r+0x20>)
 8009a74:	6022      	str	r2, [r4, #0]
 8009a76:	461a      	mov	r2, r3
 8009a78:	f7fc fe4a 	bl	8006710 <_write>
 8009a7c:	1c43      	adds	r3, r0, #1
 8009a7e:	d102      	bne.n	8009a86 <_write_r+0x1e>
 8009a80:	6823      	ldr	r3, [r4, #0]
 8009a82:	b103      	cbz	r3, 8009a86 <_write_r+0x1e>
 8009a84:	602b      	str	r3, [r5, #0]
 8009a86:	bd38      	pop	{r3, r4, r5, pc}
 8009a88:	20000f50 	.word	0x20000f50

08009a8c <_close_r>:
 8009a8c:	b538      	push	{r3, r4, r5, lr}
 8009a8e:	2300      	movs	r3, #0
 8009a90:	4c05      	ldr	r4, [pc, #20]	; (8009aa8 <_close_r+0x1c>)
 8009a92:	4605      	mov	r5, r0
 8009a94:	4608      	mov	r0, r1
 8009a96:	6023      	str	r3, [r4, #0]
 8009a98:	f7fd fac4 	bl	8007024 <_close>
 8009a9c:	1c43      	adds	r3, r0, #1
 8009a9e:	d102      	bne.n	8009aa6 <_close_r+0x1a>
 8009aa0:	6823      	ldr	r3, [r4, #0]
 8009aa2:	b103      	cbz	r3, 8009aa6 <_close_r+0x1a>
 8009aa4:	602b      	str	r3, [r5, #0]
 8009aa6:	bd38      	pop	{r3, r4, r5, pc}
 8009aa8:	20000f50 	.word	0x20000f50

08009aac <_fstat_r>:
 8009aac:	b538      	push	{r3, r4, r5, lr}
 8009aae:	2300      	movs	r3, #0
 8009ab0:	4c06      	ldr	r4, [pc, #24]	; (8009acc <_fstat_r+0x20>)
 8009ab2:	4605      	mov	r5, r0
 8009ab4:	4608      	mov	r0, r1
 8009ab6:	4611      	mov	r1, r2
 8009ab8:	6023      	str	r3, [r4, #0]
 8009aba:	f7fd fab6 	bl	800702a <_fstat>
 8009abe:	1c43      	adds	r3, r0, #1
 8009ac0:	d102      	bne.n	8009ac8 <_fstat_r+0x1c>
 8009ac2:	6823      	ldr	r3, [r4, #0]
 8009ac4:	b103      	cbz	r3, 8009ac8 <_fstat_r+0x1c>
 8009ac6:	602b      	str	r3, [r5, #0]
 8009ac8:	bd38      	pop	{r3, r4, r5, pc}
 8009aca:	bf00      	nop
 8009acc:	20000f50 	.word	0x20000f50

08009ad0 <_isatty_r>:
 8009ad0:	b538      	push	{r3, r4, r5, lr}
 8009ad2:	2300      	movs	r3, #0
 8009ad4:	4c05      	ldr	r4, [pc, #20]	; (8009aec <_isatty_r+0x1c>)
 8009ad6:	4605      	mov	r5, r0
 8009ad8:	4608      	mov	r0, r1
 8009ada:	6023      	str	r3, [r4, #0]
 8009adc:	f7fd faaa 	bl	8007034 <_isatty>
 8009ae0:	1c43      	adds	r3, r0, #1
 8009ae2:	d102      	bne.n	8009aea <_isatty_r+0x1a>
 8009ae4:	6823      	ldr	r3, [r4, #0]
 8009ae6:	b103      	cbz	r3, 8009aea <_isatty_r+0x1a>
 8009ae8:	602b      	str	r3, [r5, #0]
 8009aea:	bd38      	pop	{r3, r4, r5, pc}
 8009aec:	20000f50 	.word	0x20000f50

08009af0 <_lseek_r>:
 8009af0:	b538      	push	{r3, r4, r5, lr}
 8009af2:	4605      	mov	r5, r0
 8009af4:	4608      	mov	r0, r1
 8009af6:	4611      	mov	r1, r2
 8009af8:	2200      	movs	r2, #0
 8009afa:	4c05      	ldr	r4, [pc, #20]	; (8009b10 <_lseek_r+0x20>)
 8009afc:	6022      	str	r2, [r4, #0]
 8009afe:	461a      	mov	r2, r3
 8009b00:	f7fd fa9a 	bl	8007038 <_lseek>
 8009b04:	1c43      	adds	r3, r0, #1
 8009b06:	d102      	bne.n	8009b0e <_lseek_r+0x1e>
 8009b08:	6823      	ldr	r3, [r4, #0]
 8009b0a:	b103      	cbz	r3, 8009b0e <_lseek_r+0x1e>
 8009b0c:	602b      	str	r3, [r5, #0]
 8009b0e:	bd38      	pop	{r3, r4, r5, pc}
 8009b10:	20000f50 	.word	0x20000f50

08009b14 <__ascii_mbtowc>:
 8009b14:	b082      	sub	sp, #8
 8009b16:	b901      	cbnz	r1, 8009b1a <__ascii_mbtowc+0x6>
 8009b18:	a901      	add	r1, sp, #4
 8009b1a:	b142      	cbz	r2, 8009b2e <__ascii_mbtowc+0x1a>
 8009b1c:	b14b      	cbz	r3, 8009b32 <__ascii_mbtowc+0x1e>
 8009b1e:	7813      	ldrb	r3, [r2, #0]
 8009b20:	600b      	str	r3, [r1, #0]
 8009b22:	7812      	ldrb	r2, [r2, #0]
 8009b24:	1c10      	adds	r0, r2, #0
 8009b26:	bf18      	it	ne
 8009b28:	2001      	movne	r0, #1
 8009b2a:	b002      	add	sp, #8
 8009b2c:	4770      	bx	lr
 8009b2e:	4610      	mov	r0, r2
 8009b30:	e7fb      	b.n	8009b2a <__ascii_mbtowc+0x16>
 8009b32:	f06f 0001 	mvn.w	r0, #1
 8009b36:	e7f8      	b.n	8009b2a <__ascii_mbtowc+0x16>

08009b38 <__malloc_lock>:
 8009b38:	4770      	bx	lr

08009b3a <__malloc_unlock>:
 8009b3a:	4770      	bx	lr

08009b3c <_read_r>:
 8009b3c:	b538      	push	{r3, r4, r5, lr}
 8009b3e:	4605      	mov	r5, r0
 8009b40:	4608      	mov	r0, r1
 8009b42:	4611      	mov	r1, r2
 8009b44:	2200      	movs	r2, #0
 8009b46:	4c05      	ldr	r4, [pc, #20]	; (8009b5c <_read_r+0x20>)
 8009b48:	6022      	str	r2, [r4, #0]
 8009b4a:	461a      	mov	r2, r3
 8009b4c:	f7fd fa42 	bl	8006fd4 <_read>
 8009b50:	1c43      	adds	r3, r0, #1
 8009b52:	d102      	bne.n	8009b5a <_read_r+0x1e>
 8009b54:	6823      	ldr	r3, [r4, #0]
 8009b56:	b103      	cbz	r3, 8009b5a <_read_r+0x1e>
 8009b58:	602b      	str	r3, [r5, #0]
 8009b5a:	bd38      	pop	{r3, r4, r5, pc}
 8009b5c:	20000f50 	.word	0x20000f50

08009b60 <__ascii_wctomb>:
 8009b60:	b149      	cbz	r1, 8009b76 <__ascii_wctomb+0x16>
 8009b62:	2aff      	cmp	r2, #255	; 0xff
 8009b64:	bf8b      	itete	hi
 8009b66:	238a      	movhi	r3, #138	; 0x8a
 8009b68:	700a      	strbls	r2, [r1, #0]
 8009b6a:	6003      	strhi	r3, [r0, #0]
 8009b6c:	2001      	movls	r0, #1
 8009b6e:	bf88      	it	hi
 8009b70:	f04f 30ff 	movhi.w	r0, #4294967295
 8009b74:	4770      	bx	lr
 8009b76:	4608      	mov	r0, r1
 8009b78:	4770      	bx	lr
	...

08009b7c <_init>:
 8009b7c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8009b7e:	bf00      	nop
 8009b80:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8009b82:	bc08      	pop	{r3}
 8009b84:	469e      	mov	lr, r3
 8009b86:	4770      	bx	lr

08009b88 <_fini>:
 8009b88:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8009b8a:	bf00      	nop
 8009b8c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8009b8e:	bc08      	pop	{r3}
 8009b90:	469e      	mov	lr, r3
 8009b92:	4770      	bx	lr