STM32F103_WifiAttenCtrlTest.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00002f74 080001e4 080001e4 000101e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 0000011c 08003158 08003158 00013158 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08003274 08003274 00013274 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08003278 08003278 00013278 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000080 20000000 0800327c 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00000998 20000080 080032fc 00020080 2**3 ALLOC 7 ._user_heap_stack 00000600 20000a18 080032fc 00020a18 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00020080 2**0 CONTENTS, READONLY 9 .debug_info 00013b77 00000000 00000000 000200a9 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 0000315b 00000000 00000000 00033c20 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 000076fe 00000000 00000000 00036d7b 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000b48 00000000 00000000 0003e480 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00000e78 00000000 00000000 0003efc8 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 000067e5 00000000 00000000 0003fe40 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004250 00000000 00000000 00046625 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0004a875 2**0 CONTENTS, READONLY 17 .debug_frame 00002780 00000000 00000000 0004a8f4 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001e4 <__do_global_dtors_aux>: 80001e4: b510 push {r4, lr} 80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>) 80001e8: 7823 ldrb r3, [r4, #0] 80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16> 80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>) 80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12> 80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>) 80001f2: f3af 8000 nop.w 80001f6: 2301 movs r3, #1 80001f8: 7023 strb r3, [r4, #0] 80001fa: bd10 pop {r4, pc} 80001fc: 20000080 .word 0x20000080 8000200: 00000000 .word 0x00000000 8000204: 08003140 .word 0x08003140 08000208 : 8000208: b508 push {r3, lr} 800020a: 4b03 ldr r3, [pc, #12] ; (8000218 ) 800020c: b11b cbz r3, 8000216 800020e: 4903 ldr r1, [pc, #12] ; (800021c ) 8000210: 4803 ldr r0, [pc, #12] ; (8000220 ) 8000212: f3af 8000 nop.w 8000216: bd08 pop {r3, pc} 8000218: 00000000 .word 0x00000000 800021c: 20000084 .word 0x20000084 8000220: 08003140 .word 0x08003140 08000224 <__aeabi_llsr>: 8000224: 40d0 lsrs r0, r2 8000226: 1c0b adds r3, r1, #0 8000228: 40d1 lsrs r1, r2 800022a: 469c mov ip, r3 800022c: 3a20 subs r2, #32 800022e: 40d3 lsrs r3, r2 8000230: 4318 orrs r0, r3 8000232: 4252 negs r2, r2 8000234: 4663 mov r3, ip 8000236: 4093 lsls r3, r2 8000238: 4318 orrs r0, r3 800023a: 4770 bx lr 0800023c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800023c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800023e: 4b0e ldr r3, [pc, #56] ; (8000278 ) { 8000240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000242: 7818 ldrb r0, [r3, #0] 8000244: f44f 737a mov.w r3, #1000 ; 0x3e8 8000248: fbb3 f3f0 udiv r3, r3, r0 800024c: 4a0b ldr r2, [pc, #44] ; (800027c ) 800024e: 6810 ldr r0, [r2, #0] 8000250: fbb0 f0f3 udiv r0, r0, r3 8000254: f000 f88e bl 8000374 8000258: 4604 mov r4, r0 800025a: b958 cbnz r0, 8000274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800025c: 2d0f cmp r5, #15 800025e: d809 bhi.n 8000274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000260: 4602 mov r2, r0 8000262: 4629 mov r1, r5 8000264: f04f 30ff mov.w r0, #4294967295 8000268: f000 f842 bl 80002f0 uwTickPrio = TickPriority; 800026c: 4b04 ldr r3, [pc, #16] ; (8000280 ) 800026e: 4620 mov r0, r4 8000270: 601d str r5, [r3, #0] 8000272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000276: bd38 pop {r3, r4, r5, pc} 8000278: 20000000 .word 0x20000000 800027c: 20000018 .word 0x20000018 8000280: 20000004 .word 0x20000004 08000284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000284: 4a07 ldr r2, [pc, #28] ; (80002a4 ) { 8000286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800028a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800028c: f043 0310 orr.w r3, r3, #16 8000290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8000292: f000 f81b bl 80002cc HAL_InitTick(TICK_INT_PRIORITY); 8000296: 2000 movs r0, #0 8000298: f7ff ffd0 bl 800023c HAL_MspInit(); 800029c: f001 fd4c bl 8001d38 } 80002a0: 2000 movs r0, #0 80002a2: bd08 pop {r3, pc} 80002a4: 40022000 .word 0x40022000 080002a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80002a8: 4a03 ldr r2, [pc, #12] ; (80002b8 ) 80002aa: 4b04 ldr r3, [pc, #16] ; (80002bc ) 80002ac: 6811 ldr r1, [r2, #0] 80002ae: 781b ldrb r3, [r3, #0] 80002b0: 440b add r3, r1 80002b2: 6013 str r3, [r2, #0] 80002b4: 4770 bx lr 80002b6: bf00 nop 80002b8: 200004d0 .word 0x200004d0 80002bc: 20000000 .word 0x20000000 080002c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80002c0: 4b01 ldr r3, [pc, #4] ; (80002c8 ) 80002c2: 6818 ldr r0, [r3, #0] } 80002c4: 4770 bx lr 80002c6: bf00 nop 80002c8: 200004d0 .word 0x200004d0 080002cc : __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80002cc: 4a07 ldr r2, [pc, #28] ; (80002ec ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80002ce: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80002d0: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80002d2: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80002d6: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80002da: 041b lsls r3, r3, #16 80002dc: 0c1b lsrs r3, r3, #16 80002de: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80002e2: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 80002e6: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 80002e8: 60d3 str r3, [r2, #12] 80002ea: 4770 bx lr 80002ec: e000ed00 .word 0xe000ed00 080002f0 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80002f0: 4b17 ldr r3, [pc, #92] ; (8000350 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 80002f2: b530 push {r4, r5, lr} 80002f4: 68dc ldr r4, [r3, #12] 80002f6: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80002fa: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80002fe: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000300: 2b04 cmp r3, #4 8000302: bf28 it cs 8000304: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000306: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000308: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800030c: bf98 it ls 800030e: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000310: fa05 f303 lsl.w r3, r5, r3 8000314: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000318: bf88 it hi 800031a: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800031c: 4019 ands r1, r3 800031e: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000320: fa05 f404 lsl.w r4, r5, r4 8000324: 3c01 subs r4, #1 8000326: 4022 ands r2, r4 if ((int32_t)(IRQn) >= 0) 8000328: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800032a: ea42 0201 orr.w r2, r2, r1 800032e: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000332: bfa9 itett ge 8000334: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000338: 4b06 ldrlt r3, [pc, #24] ; (8000354 ) NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800033a: b2d2 uxtbge r2, r2 800033c: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000340: bfbb ittet lt 8000342: f000 000f andlt.w r0, r0, #15 8000346: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000348: f880 2300 strbge.w r2, [r0, #768] ; 0x300 SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800034c: 541a strblt r2, [r3, r0] 800034e: bd30 pop {r4, r5, pc} 8000350: e000ed00 .word 0xe000ed00 8000354: e000ed14 .word 0xe000ed14 08000358 : if ((int32_t)(IRQn) >= 0) 8000358: 2800 cmp r0, #0 800035a: db08 blt.n 800036e NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 800035c: 2301 movs r3, #1 800035e: 0942 lsrs r2, r0, #5 8000360: f000 001f and.w r0, r0, #31 8000364: fa03 f000 lsl.w r0, r3, r0 8000368: 4b01 ldr r3, [pc, #4] ; (8000370 ) 800036a: f843 0022 str.w r0, [r3, r2, lsl #2] 800036e: 4770 bx lr 8000370: e000e100 .word 0xe000e100 08000374 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000374: 3801 subs r0, #1 8000376: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 800037a: d20a bcs.n 8000392 SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800037c: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800037e: 4b06 ldr r3, [pc, #24] ; (8000398 ) SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000380: 4a06 ldr r2, [pc, #24] ; (800039c ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8000382: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000384: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000388: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 800038a: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 800038c: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 800038e: 601a str r2, [r3, #0] 8000390: 4770 bx lr return (1UL); /* Reload value impossible */ 8000392: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 8000394: 4770 bx lr 8000396: bf00 nop 8000398: e000e010 .word 0xe000e010 800039c: e000ed00 .word 0xe000ed00 080003a0 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 80003a0: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 80003a2: 2800 cmp r0, #0 80003a4: d032 beq.n 800040c assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (DMA2) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80003a6: 6801 ldr r1, [r0, #0] 80003a8: 4b19 ldr r3, [pc, #100] ; (8000410 ) 80003aa: 2414 movs r4, #20 80003ac: 4299 cmp r1, r3 80003ae: d825 bhi.n 80003fc { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003b0: 4a18 ldr r2, [pc, #96] ; (8000414 ) hdma->DmaBaseAddress = DMA1; 80003b2: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003b6: 440a add r2, r1 80003b8: fbb2 f2f4 udiv r2, r2, r4 80003bc: 0092 lsls r2, r2, #2 80003be: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80003c0: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80003c2: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80003c4: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80003c6: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80003c8: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003ca: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003cc: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003d0: 4323 orrs r3, r4 80003d2: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003d4: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003d8: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80003da: 6944 ldr r4, [r0, #20] 80003dc: 4323 orrs r3, r4 80003de: 6984 ldr r4, [r0, #24] 80003e0: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 80003e2: 69c4 ldr r4, [r0, #28] 80003e4: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 80003e6: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 80003e8: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 80003ea: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003ec: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 80003ee: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003f2: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 80003f4: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 80003f8: 4618 mov r0, r3 80003fa: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 80003fc: 4b06 ldr r3, [pc, #24] ; (8000418 ) 80003fe: 440b add r3, r1 8000400: fbb3 f3f4 udiv r3, r3, r4 8000404: 009b lsls r3, r3, #2 8000406: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8000408: 4b04 ldr r3, [pc, #16] ; (800041c ) 800040a: e7d9 b.n 80003c0 return HAL_ERROR; 800040c: 2001 movs r0, #1 } 800040e: bd10 pop {r4, pc} 8000410: 40020407 .word 0x40020407 8000414: bffdfff8 .word 0xbffdfff8 8000418: bffdfbf8 .word 0xbffdfbf8 800041c: 40020400 .word 0x40020400 08000420 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8000420: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8000422: f890 4020 ldrb.w r4, [r0, #32] 8000426: 2c01 cmp r4, #1 8000428: d035 beq.n 8000496 800042a: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 800042c: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 8000430: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8000434: 42a5 cmp r5, r4 8000436: f04f 0600 mov.w r6, #0 800043a: f04f 0402 mov.w r4, #2 800043e: d128 bne.n 8000492 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8000440: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8000444: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000446: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8000448: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800044a: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 800044c: f026 0601 bic.w r6, r6, #1 8000450: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000452: 6bc6 ldr r6, [r0, #60] ; 0x3c 8000454: 40bd lsls r5, r7 8000456: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8000458: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 800045a: 6843 ldr r3, [r0, #4] 800045c: 6805 ldr r5, [r0, #0] 800045e: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 8000460: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8000462: bf0b itete eq 8000464: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 8000466: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8000468: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 800046a: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 800046c: b14b cbz r3, 8000482 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800046e: 6823 ldr r3, [r4, #0] 8000470: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000474: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 8000476: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8000478: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 800047a: f043 0301 orr.w r3, r3, #1 800047e: 602b str r3, [r5, #0] 8000480: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8000482: 6823 ldr r3, [r4, #0] 8000484: f023 0304 bic.w r3, r3, #4 8000488: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 800048a: 6823 ldr r3, [r4, #0] 800048c: f043 030a orr.w r3, r3, #10 8000490: e7f0 b.n 8000474 __HAL_UNLOCK(hdma); 8000492: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 8000496: 2002 movs r0, #2 } 8000498: bdf0 pop {r4, r5, r6, r7, pc} ... 0800049c : if(HAL_DMA_STATE_BUSY != hdma->State) 800049c: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80004a0: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80004a2: 2b02 cmp r3, #2 80004a4: d003 beq.n 80004ae hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80004a6: 2304 movs r3, #4 80004a8: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80004aa: 2001 movs r0, #1 80004ac: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80004ae: 6803 ldr r3, [r0, #0] 80004b0: 681a ldr r2, [r3, #0] 80004b2: f022 020e bic.w r2, r2, #14 80004b6: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80004b8: 681a ldr r2, [r3, #0] 80004ba: f022 0201 bic.w r2, r2, #1 80004be: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004c0: 4a29 ldr r2, [pc, #164] ; (8000568 ) 80004c2: 4293 cmp r3, r2 80004c4: d924 bls.n 8000510 80004c6: f502 7262 add.w r2, r2, #904 ; 0x388 80004ca: 4293 cmp r3, r2 80004cc: d019 beq.n 8000502 80004ce: 3214 adds r2, #20 80004d0: 4293 cmp r3, r2 80004d2: d018 beq.n 8000506 80004d4: 3214 adds r2, #20 80004d6: 4293 cmp r3, r2 80004d8: d017 beq.n 800050a 80004da: 3214 adds r2, #20 80004dc: 4293 cmp r3, r2 80004de: bf0c ite eq 80004e0: f44f 5380 moveq.w r3, #4096 ; 0x1000 80004e4: f44f 3380 movne.w r3, #65536 ; 0x10000 80004e8: 4a20 ldr r2, [pc, #128] ; (800056c ) 80004ea: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 80004ec: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 80004ee: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 80004f0: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 80004f4: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 80004f6: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 80004fa: b39b cbz r3, 8000564 hdma->XferAbortCallback(hdma); 80004fc: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 80004fe: 4620 mov r0, r4 8000500: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8000502: 2301 movs r3, #1 8000504: e7f0 b.n 80004e8 8000506: 2310 movs r3, #16 8000508: e7ee b.n 80004e8 800050a: f44f 7380 mov.w r3, #256 ; 0x100 800050e: e7eb b.n 80004e8 8000510: 4917 ldr r1, [pc, #92] ; (8000570 ) 8000512: 428b cmp r3, r1 8000514: d016 beq.n 8000544 8000516: 3114 adds r1, #20 8000518: 428b cmp r3, r1 800051a: d015 beq.n 8000548 800051c: 3114 adds r1, #20 800051e: 428b cmp r3, r1 8000520: d014 beq.n 800054c 8000522: 3114 adds r1, #20 8000524: 428b cmp r3, r1 8000526: d014 beq.n 8000552 8000528: 3114 adds r1, #20 800052a: 428b cmp r3, r1 800052c: d014 beq.n 8000558 800052e: 3114 adds r1, #20 8000530: 428b cmp r3, r1 8000532: d014 beq.n 800055e 8000534: 4293 cmp r3, r2 8000536: bf14 ite ne 8000538: f44f 3380 movne.w r3, #65536 ; 0x10000 800053c: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8000540: 4a0c ldr r2, [pc, #48] ; (8000574 ) 8000542: e7d2 b.n 80004ea 8000544: 2301 movs r3, #1 8000546: e7fb b.n 8000540 8000548: 2310 movs r3, #16 800054a: e7f9 b.n 8000540 800054c: f44f 7380 mov.w r3, #256 ; 0x100 8000550: e7f6 b.n 8000540 8000552: f44f 5380 mov.w r3, #4096 ; 0x1000 8000556: e7f3 b.n 8000540 8000558: f44f 3380 mov.w r3, #65536 ; 0x10000 800055c: e7f0 b.n 8000540 800055e: f44f 1380 mov.w r3, #1048576 ; 0x100000 8000562: e7ed b.n 8000540 HAL_StatusTypeDef status = HAL_OK; 8000564: 4618 mov r0, r3 } 8000566: bd10 pop {r4, pc} 8000568: 40020080 .word 0x40020080 800056c: 40020400 .word 0x40020400 8000570: 40020008 .word 0x40020008 8000574: 40020000 .word 0x40020000 08000578 : { 8000578: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800057a: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 800057c: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800057e: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8000580: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 8000582: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000584: 4095 lsls r5, r2 8000586: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 8000588: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800058a: d055 beq.n 8000638 800058c: 074d lsls r5, r1, #29 800058e: d553 bpl.n 8000638 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000590: 681a ldr r2, [r3, #0] 8000592: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8000594: bf5e ittt pl 8000596: 681a ldrpl r2, [r3, #0] 8000598: f022 0204 bicpl.w r2, r2, #4 800059c: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 800059e: 4a60 ldr r2, [pc, #384] ; (8000720 ) 80005a0: 4293 cmp r3, r2 80005a2: d91f bls.n 80005e4 80005a4: f502 7262 add.w r2, r2, #904 ; 0x388 80005a8: 4293 cmp r3, r2 80005aa: d014 beq.n 80005d6 80005ac: 3214 adds r2, #20 80005ae: 4293 cmp r3, r2 80005b0: d013 beq.n 80005da 80005b2: 3214 adds r2, #20 80005b4: 4293 cmp r3, r2 80005b6: d012 beq.n 80005de 80005b8: 3214 adds r2, #20 80005ba: 4293 cmp r3, r2 80005bc: bf0c ite eq 80005be: f44f 4380 moveq.w r3, #16384 ; 0x4000 80005c2: f44f 2380 movne.w r3, #262144 ; 0x40000 80005c6: 4a57 ldr r2, [pc, #348] ; (8000724 ) 80005c8: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80005ca: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80005cc: 2b00 cmp r3, #0 80005ce: f000 80a5 beq.w 800071c } 80005d2: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80005d4: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005d6: 2304 movs r3, #4 80005d8: e7f5 b.n 80005c6 80005da: 2340 movs r3, #64 ; 0x40 80005dc: e7f3 b.n 80005c6 80005de: f44f 6380 mov.w r3, #1024 ; 0x400 80005e2: e7f0 b.n 80005c6 80005e4: 4950 ldr r1, [pc, #320] ; (8000728 ) 80005e6: 428b cmp r3, r1 80005e8: d016 beq.n 8000618 80005ea: 3114 adds r1, #20 80005ec: 428b cmp r3, r1 80005ee: d015 beq.n 800061c 80005f0: 3114 adds r1, #20 80005f2: 428b cmp r3, r1 80005f4: d014 beq.n 8000620 80005f6: 3114 adds r1, #20 80005f8: 428b cmp r3, r1 80005fa: d014 beq.n 8000626 80005fc: 3114 adds r1, #20 80005fe: 428b cmp r3, r1 8000600: d014 beq.n 800062c 8000602: 3114 adds r1, #20 8000604: 428b cmp r3, r1 8000606: d014 beq.n 8000632 8000608: 4293 cmp r3, r2 800060a: bf14 ite ne 800060c: f44f 2380 movne.w r3, #262144 ; 0x40000 8000610: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8000614: 4a45 ldr r2, [pc, #276] ; (800072c ) 8000616: e7d7 b.n 80005c8 8000618: 2304 movs r3, #4 800061a: e7fb b.n 8000614 800061c: 2340 movs r3, #64 ; 0x40 800061e: e7f9 b.n 8000614 8000620: f44f 6380 mov.w r3, #1024 ; 0x400 8000624: e7f6 b.n 8000614 8000626: f44f 4380 mov.w r3, #16384 ; 0x4000 800062a: e7f3 b.n 8000614 800062c: f44f 2380 mov.w r3, #262144 ; 0x40000 8000630: e7f0 b.n 8000614 8000632: f44f 0380 mov.w r3, #4194304 ; 0x400000 8000636: e7ed b.n 8000614 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8000638: 2502 movs r5, #2 800063a: 4095 lsls r5, r2 800063c: 4225 tst r5, r4 800063e: d057 beq.n 80006f0 8000640: 078d lsls r5, r1, #30 8000642: d555 bpl.n 80006f0 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000644: 681a ldr r2, [r3, #0] 8000646: 0694 lsls r4, r2, #26 8000648: d406 bmi.n 8000658 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 800064a: 681a ldr r2, [r3, #0] 800064c: f022 020a bic.w r2, r2, #10 8000650: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 8000652: 2201 movs r2, #1 8000654: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8000658: 4a31 ldr r2, [pc, #196] ; (8000720 ) 800065a: 4293 cmp r3, r2 800065c: d91e bls.n 800069c 800065e: f502 7262 add.w r2, r2, #904 ; 0x388 8000662: 4293 cmp r3, r2 8000664: d013 beq.n 800068e 8000666: 3214 adds r2, #20 8000668: 4293 cmp r3, r2 800066a: d012 beq.n 8000692 800066c: 3214 adds r2, #20 800066e: 4293 cmp r3, r2 8000670: d011 beq.n 8000696 8000672: 3214 adds r2, #20 8000674: 4293 cmp r3, r2 8000676: bf0c ite eq 8000678: f44f 5300 moveq.w r3, #8192 ; 0x2000 800067c: f44f 3300 movne.w r3, #131072 ; 0x20000 8000680: 4a28 ldr r2, [pc, #160] ; (8000724 ) 8000682: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 8000684: 2300 movs r3, #0 8000686: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 800068a: 6a83 ldr r3, [r0, #40] ; 0x28 800068c: e79e b.n 80005cc __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 800068e: 2302 movs r3, #2 8000690: e7f6 b.n 8000680 8000692: 2320 movs r3, #32 8000694: e7f4 b.n 8000680 8000696: f44f 7300 mov.w r3, #512 ; 0x200 800069a: e7f1 b.n 8000680 800069c: 4922 ldr r1, [pc, #136] ; (8000728 ) 800069e: 428b cmp r3, r1 80006a0: d016 beq.n 80006d0 80006a2: 3114 adds r1, #20 80006a4: 428b cmp r3, r1 80006a6: d015 beq.n 80006d4 80006a8: 3114 adds r1, #20 80006aa: 428b cmp r3, r1 80006ac: d014 beq.n 80006d8 80006ae: 3114 adds r1, #20 80006b0: 428b cmp r3, r1 80006b2: d014 beq.n 80006de 80006b4: 3114 adds r1, #20 80006b6: 428b cmp r3, r1 80006b8: d014 beq.n 80006e4 80006ba: 3114 adds r1, #20 80006bc: 428b cmp r3, r1 80006be: d014 beq.n 80006ea 80006c0: 4293 cmp r3, r2 80006c2: bf14 ite ne 80006c4: f44f 3300 movne.w r3, #131072 ; 0x20000 80006c8: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80006cc: 4a17 ldr r2, [pc, #92] ; (800072c ) 80006ce: e7d8 b.n 8000682 80006d0: 2302 movs r3, #2 80006d2: e7fb b.n 80006cc 80006d4: 2320 movs r3, #32 80006d6: e7f9 b.n 80006cc 80006d8: f44f 7300 mov.w r3, #512 ; 0x200 80006dc: e7f6 b.n 80006cc 80006de: f44f 5300 mov.w r3, #8192 ; 0x2000 80006e2: e7f3 b.n 80006cc 80006e4: f44f 3300 mov.w r3, #131072 ; 0x20000 80006e8: e7f0 b.n 80006cc 80006ea: f44f 1300 mov.w r3, #2097152 ; 0x200000 80006ee: e7ed b.n 80006cc else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 80006f0: 2508 movs r5, #8 80006f2: 4095 lsls r5, r2 80006f4: 4225 tst r5, r4 80006f6: d011 beq.n 800071c 80006f8: 0709 lsls r1, r1, #28 80006fa: d50f bpl.n 800071c __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80006fc: 6819 ldr r1, [r3, #0] 80006fe: f021 010e bic.w r1, r1, #14 8000702: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000704: 2301 movs r3, #1 8000706: fa03 f202 lsl.w r2, r3, r2 800070a: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 800070c: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 800070e: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 8000712: 2300 movs r3, #0 8000714: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8000718: 6b03 ldr r3, [r0, #48] ; 0x30 800071a: e757 b.n 80005cc } 800071c: bc70 pop {r4, r5, r6} 800071e: 4770 bx lr 8000720: 40020080 .word 0x40020080 8000724: 40020400 .word 0x40020400 8000728: 40020008 .word 0x40020008 800072c: 40020000 .word 0x40020000 08000730 : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 8000730: 4a11 ldr r2, [pc, #68] ; (8000778 ) 8000732: 68d3 ldr r3, [r2, #12] 8000734: f013 0310 ands.w r3, r3, #16 8000738: d005 beq.n 8000746 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 800073a: 4910 ldr r1, [pc, #64] ; (800077c ) 800073c: 69cb ldr r3, [r1, #28] 800073e: f043 0302 orr.w r3, r3, #2 8000742: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8000744: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000746: 68d2 ldr r2, [r2, #12] 8000748: 0750 lsls r0, r2, #29 800074a: d506 bpl.n 800075a #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800074c: 490b ldr r1, [pc, #44] ; (800077c ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 800074e: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000752: 69ca ldr r2, [r1, #28] 8000754: f042 0201 orr.w r2, r2, #1 8000758: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 800075a: 4a07 ldr r2, [pc, #28] ; (8000778 ) 800075c: 69d1 ldr r1, [r2, #28] 800075e: 07c9 lsls r1, r1, #31 8000760: d508 bpl.n 8000774 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 8000762: 4806 ldr r0, [pc, #24] ; (800077c ) 8000764: 69c1 ldr r1, [r0, #28] 8000766: f041 0104 orr.w r1, r1, #4 800076a: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 800076c: 69d1 ldr r1, [r2, #28] 800076e: f021 0101 bic.w r1, r1, #1 8000772: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8000774: 60d3 str r3, [r2, #12] 8000776: 4770 bx lr 8000778: 40022000 .word 0x40022000 800077c: 200004d8 .word 0x200004d8 08000780 : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000780: 4b06 ldr r3, [pc, #24] ; (800079c ) 8000782: 6918 ldr r0, [r3, #16] 8000784: f010 0080 ands.w r0, r0, #128 ; 0x80 8000788: d007 beq.n 800079a WRITE_REG(FLASH->KEYR, FLASH_KEY1); 800078a: 4a05 ldr r2, [pc, #20] ; (80007a0 ) 800078c: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 800078e: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 8000792: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000794: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8000796: f3c0 10c0 ubfx r0, r0, #7, #1 } 800079a: 4770 bx lr 800079c: 40022000 .word 0x40022000 80007a0: 45670123 .word 0x45670123 080007a4 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a4: 4a03 ldr r2, [pc, #12] ; (80007b4 ) } 80007a6: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a8: 6913 ldr r3, [r2, #16] 80007aa: f043 0380 orr.w r3, r3, #128 ; 0x80 80007ae: 6113 str r3, [r2, #16] } 80007b0: 4770 bx lr 80007b2: bf00 nop 80007b4: 40022000 .word 0x40022000 080007b8 : { 80007b8: b5f8 push {r3, r4, r5, r6, r7, lr} 80007ba: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 80007bc: f7ff fd80 bl 80002c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007c0: 4c11 ldr r4, [pc, #68] ; (8000808 ) uint32_t tickstart = HAL_GetTick(); 80007c2: 4607 mov r7, r0 80007c4: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007c6: 68e3 ldr r3, [r4, #12] 80007c8: 07d8 lsls r0, r3, #31 80007ca: d412 bmi.n 80007f2 if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 80007cc: 68e3 ldr r3, [r4, #12] 80007ce: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 80007d0: bf44 itt mi 80007d2: 2320 movmi r3, #32 80007d4: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007d6: 68eb ldr r3, [r5, #12] 80007d8: 06da lsls r2, r3, #27 80007da: d406 bmi.n 80007ea __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007dc: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007de: 07db lsls r3, r3, #31 80007e0: d403 bmi.n 80007ea __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80007e2: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007e4: f010 0004 ands.w r0, r0, #4 80007e8: d002 beq.n 80007f0 FLASH_SetErrorCode(); 80007ea: f7ff ffa1 bl 8000730 return HAL_ERROR; 80007ee: 2001 movs r0, #1 } 80007f0: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 80007f2: 1c73 adds r3, r6, #1 80007f4: d0e7 beq.n 80007c6 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80007f6: b90e cbnz r6, 80007fc return HAL_TIMEOUT; 80007f8: 2003 movs r0, #3 80007fa: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80007fc: f7ff fd60 bl 80002c0 8000800: 1bc0 subs r0, r0, r7 8000802: 4286 cmp r6, r0 8000804: d2df bcs.n 80007c6 8000806: e7f7 b.n 80007f8 8000808: 40022000 .word 0x40022000 0800080c : { 800080c: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 8000810: 4c1f ldr r4, [pc, #124] ; (8000890 ) { 8000812: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8000814: 7e23 ldrb r3, [r4, #24] { 8000816: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8000818: 2b01 cmp r3, #1 { 800081a: 460f mov r7, r1 800081c: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800081e: d033 beq.n 8000888 8000820: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000822: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8000826: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000828: f7ff ffc6 bl 80007b8 if(status == HAL_OK) 800082c: bb40 cbnz r0, 8000880 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800082e: 2d01 cmp r5, #1 8000830: d003 beq.n 800083a nbiterations = 4U; 8000832: 2d02 cmp r5, #2 8000834: bf0c ite eq 8000836: 2502 moveq r5, #2 8000838: 2504 movne r5, #4 800083a: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 800083c: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 800083e: f8df b054 ldr.w fp, [pc, #84] ; 8000894 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000842: 0132 lsls r2, r6, #4 8000844: 4640 mov r0, r8 8000846: 4649 mov r1, r9 8000848: f7ff fcec bl 8000224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 800084c: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 8000850: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000854: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 8000856: f043 0301 orr.w r3, r3, #1 800085a: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 800085e: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000862: f24c 3050 movw r0, #50000 ; 0xc350 8000866: f7ff ffa7 bl 80007b8 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 800086a: f8db 3010 ldr.w r3, [fp, #16] 800086e: f023 0301 bic.w r3, r3, #1 8000872: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 8000876: b918 cbnz r0, 8000880 8000878: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 800087a: b2f3 uxtb r3, r6 800087c: 429d cmp r5, r3 800087e: d8e0 bhi.n 8000842 __HAL_UNLOCK(&pFlash); 8000880: 2300 movs r3, #0 8000882: 7623 strb r3, [r4, #24] return status; 8000884: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 8000888: 2002 movs r0, #2 } 800088a: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 800088e: bf00 nop 8000890: 200004d8 .word 0x200004d8 8000894: 40022000 .word 0x40022000 08000898 : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000898: 2200 movs r2, #0 800089a: 4b06 ldr r3, [pc, #24] ; (80008b4 ) 800089c: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 800089e: 4b06 ldr r3, [pc, #24] ; (80008b8 ) 80008a0: 691a ldr r2, [r3, #16] 80008a2: f042 0204 orr.w r2, r2, #4 80008a6: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008a8: 691a ldr r2, [r3, #16] 80008aa: f042 0240 orr.w r2, r2, #64 ; 0x40 80008ae: 611a str r2, [r3, #16] 80008b0: 4770 bx lr 80008b2: bf00 nop 80008b4: 200004d8 .word 0x200004d8 80008b8: 40022000 .word 0x40022000 080008bc : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008bc: 2200 movs r2, #0 80008be: 4b06 ldr r3, [pc, #24] ; (80008d8 ) 80008c0: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 80008c2: 4b06 ldr r3, [pc, #24] ; (80008dc ) 80008c4: 691a ldr r2, [r3, #16] 80008c6: f042 0202 orr.w r2, r2, #2 80008ca: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 80008cc: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008ce: 691a ldr r2, [r3, #16] 80008d0: f042 0240 orr.w r2, r2, #64 ; 0x40 80008d4: 611a str r2, [r3, #16] 80008d6: 4770 bx lr 80008d8: 200004d8 .word 0x200004d8 80008dc: 40022000 .word 0x40022000 080008e0 : { 80008e0: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 80008e4: 4d23 ldr r5, [pc, #140] ; (8000974 ) { 80008e6: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 80008e8: 7e2b ldrb r3, [r5, #24] { 80008ea: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 80008ec: 2b01 cmp r3, #1 80008ee: d03d beq.n 800096c 80008f0: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008f2: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 80008f4: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008f6: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80008f8: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008fc: d113 bne.n 8000926 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80008fe: f7ff ff5b bl 80007b8 8000902: b120 cbz r0, 800090e HAL_StatusTypeDef status = HAL_ERROR; 8000904: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8000906: 2300 movs r3, #0 8000908: 762b strb r3, [r5, #24] return status; 800090a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 800090e: f7ff ffc3 bl 8000898 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8000912: f24c 3050 movw r0, #50000 ; 0xc350 8000916: f7ff ff4f bl 80007b8 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 800091a: 4a17 ldr r2, [pc, #92] ; (8000978 ) 800091c: 6913 ldr r3, [r2, #16] 800091e: f023 0304 bic.w r3, r3, #4 8000922: 6113 str r3, [r2, #16] 8000924: e7ef b.n 8000906 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000926: f7ff ff47 bl 80007b8 800092a: 2800 cmp r0, #0 800092c: d1ea bne.n 8000904 *PageError = 0xFFFFFFFFU; 800092e: f04f 33ff mov.w r3, #4294967295 8000932: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 8000936: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 8000938: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 800093a: 4c0f ldr r4, [pc, #60] ; (8000978 ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 800093c: 68fa ldr r2, [r7, #12] 800093e: 68bb ldr r3, [r7, #8] 8000940: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 8000944: 429e cmp r6, r3 8000946: d2de bcs.n 8000906 FLASH_PageErase(address); 8000948: 4630 mov r0, r6 800094a: f7ff ffb7 bl 80008bc status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800094e: f24c 3050 movw r0, #50000 ; 0xc350 8000952: f7ff ff31 bl 80007b8 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000956: 6923 ldr r3, [r4, #16] 8000958: f023 0302 bic.w r3, r3, #2 800095c: 6123 str r3, [r4, #16] if (status != HAL_OK) 800095e: b110 cbz r0, 8000966 *PageError = address; 8000960: f8c8 6000 str.w r6, [r8] break; 8000964: e7cf b.n 8000906 address += FLASH_PAGE_SIZE) 8000966: f506 6600 add.w r6, r6, #2048 ; 0x800 800096a: e7e7 b.n 800093c __HAL_LOCK(&pFlash); 800096c: 2002 movs r0, #2 } 800096e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8000972: bf00 nop 8000974: 200004d8 .word 0x200004d8 8000978: 40022000 .word 0x40022000 0800097c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 800097c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position = 0x00u; uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 8000980: 2400 movs r4, #0 uint32_t position = 0x00u; 8000982: 4626 mov r6, r4 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8000984: 4f6c ldr r7, [pc, #432] ; (8000b38 ) 8000986: 4b6d ldr r3, [pc, #436] ; (8000b3c ) temp = AFIO->EXTICR[position >> 2u]; CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8000988: f8df e1b8 ldr.w lr, [pc, #440] ; 8000b44 switch (GPIO_Init->Mode) 800098c: f8df c1b8 ldr.w ip, [pc, #440] ; 8000b48 while (((GPIO_Init->Pin) >> position) != 0x00u) 8000990: 680a ldr r2, [r1, #0] 8000992: fa32 f506 lsrs.w r5, r2, r6 8000996: d102 bne.n 800099e } } position++; } } 8000998: b003 add sp, #12 800099a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} ioposition = (0x01uL << position); 800099e: f04f 0801 mov.w r8, #1 80009a2: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80009a6: ea02 0208 and.w r2, r2, r8 if (iocurrent == ioposition) 80009aa: 4590 cmp r8, r2 80009ac: f040 8084 bne.w 8000ab8 switch (GPIO_Init->Mode) 80009b0: 684d ldr r5, [r1, #4] 80009b2: 2d12 cmp r5, #18 80009b4: f000 80b1 beq.w 8000b1a 80009b8: f200 8087 bhi.w 8000aca 80009bc: 2d02 cmp r5, #2 80009be: f000 80a9 beq.w 8000b14 80009c2: d87b bhi.n 8000abc 80009c4: 2d00 cmp r5, #0 80009c6: f000 808c beq.w 8000ae2 80009ca: 2d01 cmp r5, #1 80009cc: f000 80a0 beq.w 8000b10 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009d0: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009d4: 2aff cmp r2, #255 ; 0xff 80009d6: bf93 iteet ls 80009d8: 4682 movls sl, r0 80009da: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 80009de: 3d08 subhi r5, #8 80009e0: f8d0 b000 ldrls.w fp, [r0] 80009e4: bf92 itee ls 80009e6: 00b5 lslls r5, r6, #2 80009e8: f8d0 b004 ldrhi.w fp, [r0, #4] 80009ec: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009ee: fa09 f805 lsl.w r8, r9, r5 80009f2: ea2b 0808 bic.w r8, fp, r8 80009f6: fa04 f505 lsl.w r5, r4, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009fa: bf88 it hi 80009fc: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000a00: ea48 0505 orr.w r5, r8, r5 8000a04: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8000a08: f8d1 a004 ldr.w sl, [r1, #4] 8000a0c: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8000a10: d052 beq.n 8000ab8 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a12: 69bd ldr r5, [r7, #24] 8000a14: f026 0803 bic.w r8, r6, #3 8000a18: f045 0501 orr.w r5, r5, #1 8000a1c: 61bd str r5, [r7, #24] 8000a1e: 69bd ldr r5, [r7, #24] 8000a20: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000a24: f005 0501 and.w r5, r5, #1 8000a28: 9501 str r5, [sp, #4] 8000a2a: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8000a2e: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a32: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8000a34: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2u]; 8000a38: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8000a3c: fa09 f90b lsl.w r9, r9, fp 8000a40: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8000a44: 4d3e ldr r5, [pc, #248] ; (8000b40 ) 8000a46: 42a8 cmp r0, r5 8000a48: d06c beq.n 8000b24 8000a4a: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a4e: 42a8 cmp r0, r5 8000a50: d06a beq.n 8000b28 8000a52: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a56: 42a8 cmp r0, r5 8000a58: d068 beq.n 8000b2c 8000a5a: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a5e: 42a8 cmp r0, r5 8000a60: d066 beq.n 8000b30 8000a62: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a66: 42a8 cmp r0, r5 8000a68: d064 beq.n 8000b34 8000a6a: 4570 cmp r0, lr 8000a6c: bf0c ite eq 8000a6e: 2505 moveq r5, #5 8000a70: 2506 movne r5, #6 8000a72: fa05 f50b lsl.w r5, r5, fp 8000a76: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2u] = temp; 8000a7a: f8c8 5008 str.w r5, [r8, #8] SET_BIT(EXTI->IMR, iocurrent); 8000a7e: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8000a80: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8000a84: bf14 ite ne 8000a86: 4315 orrne r5, r2 CLEAR_BIT(EXTI->IMR, iocurrent); 8000a88: 4395 biceq r5, r2 8000a8a: 601d str r5, [r3, #0] SET_BIT(EXTI->EMR, iocurrent); 8000a8c: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8000a8e: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8000a92: bf14 ite ne 8000a94: 4315 orrne r5, r2 CLEAR_BIT(EXTI->EMR, iocurrent); 8000a96: 4395 biceq r5, r2 8000a98: 605d str r5, [r3, #4] SET_BIT(EXTI->RTSR, iocurrent); 8000a9a: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8000a9c: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000aa0: bf14 ite ne 8000aa2: 4315 orrne r5, r2 CLEAR_BIT(EXTI->RTSR, iocurrent); 8000aa4: 4395 biceq r5, r2 8000aa6: 609d str r5, [r3, #8] SET_BIT(EXTI->FTSR, iocurrent); 8000aa8: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8000aaa: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8000aae: bf14 ite ne 8000ab0: 432a orrne r2, r5 CLEAR_BIT(EXTI->FTSR, iocurrent); 8000ab2: ea25 0202 biceq.w r2, r5, r2 8000ab6: 60da str r2, [r3, #12] position++; 8000ab8: 3601 adds r6, #1 8000aba: e769 b.n 8000990 switch (GPIO_Init->Mode) 8000abc: 2d03 cmp r5, #3 8000abe: d025 beq.n 8000b0c 8000ac0: 2d11 cmp r5, #17 8000ac2: d185 bne.n 80009d0 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8000ac4: 68cc ldr r4, [r1, #12] 8000ac6: 3404 adds r4, #4 break; 8000ac8: e782 b.n 80009d0 switch (GPIO_Init->Mode) 8000aca: 4565 cmp r5, ip 8000acc: d009 beq.n 8000ae2 8000ace: d812 bhi.n 8000af6 8000ad0: f8df 9078 ldr.w r9, [pc, #120] ; 8000b4c 8000ad4: 454d cmp r5, r9 8000ad6: d004 beq.n 8000ae2 8000ad8: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000adc: 454d cmp r5, r9 8000ade: f47f af77 bne.w 80009d0 if (GPIO_Init->Pull == GPIO_NOPULL) 8000ae2: 688c ldr r4, [r1, #8] 8000ae4: b1e4 cbz r4, 8000b20 else if (GPIO_Init->Pull == GPIO_PULLUP) 8000ae6: 2c01 cmp r4, #1 GPIOx->BSRR = ioposition; 8000ae8: bf0c ite eq 8000aea: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8000aee: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8000af2: 2408 movs r4, #8 8000af4: e76c b.n 80009d0 switch (GPIO_Init->Mode) 8000af6: f8df 9058 ldr.w r9, [pc, #88] ; 8000b50 8000afa: 454d cmp r5, r9 8000afc: d0f1 beq.n 8000ae2 8000afe: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000b02: 454d cmp r5, r9 8000b04: d0ed beq.n 8000ae2 8000b06: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8000b0a: e7e7 b.n 8000adc config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8000b0c: 2400 movs r4, #0 8000b0e: e75f b.n 80009d0 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8000b10: 68cc ldr r4, [r1, #12] break; 8000b12: e75d b.n 80009d0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8000b14: 68cc ldr r4, [r1, #12] 8000b16: 3408 adds r4, #8 break; 8000b18: e75a b.n 80009d0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8000b1a: 68cc ldr r4, [r1, #12] 8000b1c: 340c adds r4, #12 break; 8000b1e: e757 b.n 80009d0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8000b20: 2404 movs r4, #4 8000b22: e755 b.n 80009d0 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8000b24: 2500 movs r5, #0 8000b26: e7a4 b.n 8000a72 8000b28: 2501 movs r5, #1 8000b2a: e7a2 b.n 8000a72 8000b2c: 2502 movs r5, #2 8000b2e: e7a0 b.n 8000a72 8000b30: 2503 movs r5, #3 8000b32: e79e b.n 8000a72 8000b34: 2504 movs r5, #4 8000b36: e79c b.n 8000a72 8000b38: 40021000 .word 0x40021000 8000b3c: 40010400 .word 0x40010400 8000b40: 40010800 .word 0x40010800 8000b44: 40011c00 .word 0x40011c00 8000b48: 10210000 .word 0x10210000 8000b4c: 10110000 .word 0x10110000 8000b50: 10310000 .word 0x10310000 08000b54 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8000b54: b10a cbz r2, 8000b5a { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8000b56: 6101 str r1, [r0, #16] 8000b58: 4770 bx lr 8000b5a: 0409 lsls r1, r1, #16 8000b5c: e7fb b.n 8000b56 08000b5e : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->ODR & GPIO_Pin) != 0x00u) 8000b5e: 68c3 ldr r3, [r0, #12] 8000b60: 420b tst r3, r1 { GPIOx->BRR = (uint32_t)GPIO_Pin; 8000b62: bf14 ite ne 8000b64: 6141 strne r1, [r0, #20] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin; 8000b66: 6101 streq r1, [r0, #16] 8000b68: 4770 bx lr ... 08000b6c : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8000b6c: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8000b70: 4605 mov r5, r0 8000b72: b908 cbnz r0, 8000b78 else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) { return HAL_ERROR; 8000b74: 2001 movs r0, #1 8000b76: e03c b.n 8000bf2 if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000b78: 6803 ldr r3, [r0, #0] 8000b7a: 07db lsls r3, r3, #31 8000b7c: d410 bmi.n 8000ba0 if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8000b7e: 682b ldr r3, [r5, #0] 8000b80: 079f lsls r7, r3, #30 8000b82: d45d bmi.n 8000c40 if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8000b84: 682b ldr r3, [r5, #0] 8000b86: 0719 lsls r1, r3, #28 8000b88: f100 8094 bmi.w 8000cb4 if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8000b8c: 682b ldr r3, [r5, #0] 8000b8e: 075a lsls r2, r3, #29 8000b90: f100 80be bmi.w 8000d10 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8000b94: 69e8 ldr r0, [r5, #28] 8000b96: 2800 cmp r0, #0 8000b98: f040 812c bne.w 8000df4 } } } } return HAL_OK; 8000b9c: 2000 movs r0, #0 8000b9e: e028 b.n 8000bf2 if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8000ba0: 4c8f ldr r4, [pc, #572] ; (8000de0 ) 8000ba2: 6863 ldr r3, [r4, #4] 8000ba4: f003 030c and.w r3, r3, #12 8000ba8: 2b04 cmp r3, #4 8000baa: d007 beq.n 8000bbc || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8000bac: 6863 ldr r3, [r4, #4] 8000bae: f003 030c and.w r3, r3, #12 8000bb2: 2b08 cmp r3, #8 8000bb4: d109 bne.n 8000bca 8000bb6: 6863 ldr r3, [r4, #4] 8000bb8: 03de lsls r6, r3, #15 8000bba: d506 bpl.n 8000bca if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8000bbc: 6823 ldr r3, [r4, #0] 8000bbe: 039c lsls r4, r3, #14 8000bc0: d5dd bpl.n 8000b7e 8000bc2: 686b ldr r3, [r5, #4] 8000bc4: 2b00 cmp r3, #0 8000bc6: d1da bne.n 8000b7e 8000bc8: e7d4 b.n 8000b74 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000bca: 686b ldr r3, [r5, #4] 8000bcc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000bd0: d112 bne.n 8000bf8 8000bd2: 6823 ldr r3, [r4, #0] 8000bd4: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8000bd8: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000bda: f7ff fb71 bl 80002c0 8000bde: 4606 mov r6, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000be0: 6823 ldr r3, [r4, #0] 8000be2: 0398 lsls r0, r3, #14 8000be4: d4cb bmi.n 8000b7e if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8000be6: f7ff fb6b bl 80002c0 8000bea: 1b80 subs r0, r0, r6 8000bec: 2864 cmp r0, #100 ; 0x64 8000bee: d9f7 bls.n 8000be0 return HAL_TIMEOUT; 8000bf0: 2003 movs r0, #3 } 8000bf2: b002 add sp, #8 8000bf4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000bf8: b99b cbnz r3, 8000c22 8000bfa: 6823 ldr r3, [r4, #0] 8000bfc: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000c00: 6023 str r3, [r4, #0] 8000c02: 6823 ldr r3, [r4, #0] 8000c04: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000c08: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000c0a: f7ff fb59 bl 80002c0 8000c0e: 4606 mov r6, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8000c10: 6823 ldr r3, [r4, #0] 8000c12: 0399 lsls r1, r3, #14 8000c14: d5b3 bpl.n 8000b7e if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8000c16: f7ff fb53 bl 80002c0 8000c1a: 1b80 subs r0, r0, r6 8000c1c: 2864 cmp r0, #100 ; 0x64 8000c1e: d9f7 bls.n 8000c10 8000c20: e7e6 b.n 8000bf0 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000c22: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8000c26: 6823 ldr r3, [r4, #0] 8000c28: d103 bne.n 8000c32 8000c2a: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8000c2e: 6023 str r3, [r4, #0] 8000c30: e7cf b.n 8000bd2 8000c32: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000c36: 6023 str r3, [r4, #0] 8000c38: 6823 ldr r3, [r4, #0] 8000c3a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000c3e: e7cb b.n 8000bd8 if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8000c40: 4c67 ldr r4, [pc, #412] ; (8000de0 ) 8000c42: 6863 ldr r3, [r4, #4] 8000c44: f013 0f0c tst.w r3, #12 8000c48: d007 beq.n 8000c5a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8000c4a: 6863 ldr r3, [r4, #4] 8000c4c: f003 030c and.w r3, r3, #12 8000c50: 2b08 cmp r3, #8 8000c52: d110 bne.n 8000c76 8000c54: 6863 ldr r3, [r4, #4] 8000c56: 03da lsls r2, r3, #15 8000c58: d40d bmi.n 8000c76 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8000c5a: 6823 ldr r3, [r4, #0] 8000c5c: 079b lsls r3, r3, #30 8000c5e: d502 bpl.n 8000c66 8000c60: 692b ldr r3, [r5, #16] 8000c62: 2b01 cmp r3, #1 8000c64: d186 bne.n 8000b74 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8000c66: 6823 ldr r3, [r4, #0] 8000c68: 696a ldr r2, [r5, #20] 8000c6a: f023 03f8 bic.w r3, r3, #248 ; 0xf8 8000c6e: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000c72: 6023 str r3, [r4, #0] 8000c74: e786 b.n 8000b84 if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8000c76: 692a ldr r2, [r5, #16] 8000c78: 4b5a ldr r3, [pc, #360] ; (8000de4 ) 8000c7a: b16a cbz r2, 8000c98 __HAL_RCC_HSI_ENABLE(); 8000c7c: 2201 movs r2, #1 8000c7e: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000c80: f7ff fb1e bl 80002c0 8000c84: 4606 mov r6, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000c86: 6823 ldr r3, [r4, #0] 8000c88: 079f lsls r7, r3, #30 8000c8a: d4ec bmi.n 8000c66 if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8000c8c: f7ff fb18 bl 80002c0 8000c90: 1b80 subs r0, r0, r6 8000c92: 2802 cmp r0, #2 8000c94: d9f7 bls.n 8000c86 8000c96: e7ab b.n 8000bf0 __HAL_RCC_HSI_DISABLE(); 8000c98: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000c9a: f7ff fb11 bl 80002c0 8000c9e: 4606 mov r6, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8000ca0: 6823 ldr r3, [r4, #0] 8000ca2: 0798 lsls r0, r3, #30 8000ca4: f57f af6e bpl.w 8000b84 if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8000ca8: f7ff fb0a bl 80002c0 8000cac: 1b80 subs r0, r0, r6 8000cae: 2802 cmp r0, #2 8000cb0: d9f6 bls.n 8000ca0 8000cb2: e79d b.n 8000bf0 if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8000cb4: 69aa ldr r2, [r5, #24] 8000cb6: 4c4a ldr r4, [pc, #296] ; (8000de0 ) 8000cb8: 4b4b ldr r3, [pc, #300] ; (8000de8 ) 8000cba: b1da cbz r2, 8000cf4 __HAL_RCC_LSI_ENABLE(); 8000cbc: 2201 movs r2, #1 8000cbe: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000cc0: f7ff fafe bl 80002c0 8000cc4: 4606 mov r6, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8000cc6: 6a63 ldr r3, [r4, #36] ; 0x24 8000cc8: 079b lsls r3, r3, #30 8000cca: d50d bpl.n 8000ce8 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8000ccc: f44f 52fa mov.w r2, #8000 ; 0x1f40 8000cd0: 4b46 ldr r3, [pc, #280] ; (8000dec ) 8000cd2: 681b ldr r3, [r3, #0] 8000cd4: fbb3 f3f2 udiv r3, r3, r2 8000cd8: 9301 str r3, [sp, #4] do { __NOP(); 8000cda: bf00 nop } while (Delay --); 8000cdc: 9b01 ldr r3, [sp, #4] 8000cde: 1e5a subs r2, r3, #1 8000ce0: 9201 str r2, [sp, #4] 8000ce2: 2b00 cmp r3, #0 8000ce4: d1f9 bne.n 8000cda 8000ce6: e751 b.n 8000b8c if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8000ce8: f7ff faea bl 80002c0 8000cec: 1b80 subs r0, r0, r6 8000cee: 2802 cmp r0, #2 8000cf0: d9e9 bls.n 8000cc6 8000cf2: e77d b.n 8000bf0 __HAL_RCC_LSI_DISABLE(); 8000cf4: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000cf6: f7ff fae3 bl 80002c0 8000cfa: 4606 mov r6, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8000cfc: 6a63 ldr r3, [r4, #36] ; 0x24 8000cfe: 079f lsls r7, r3, #30 8000d00: f57f af44 bpl.w 8000b8c if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8000d04: f7ff fadc bl 80002c0 8000d08: 1b80 subs r0, r0, r6 8000d0a: 2802 cmp r0, #2 8000d0c: d9f6 bls.n 8000cfc 8000d0e: e76f b.n 8000bf0 if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8000d10: 4c33 ldr r4, [pc, #204] ; (8000de0 ) 8000d12: 69e3 ldr r3, [r4, #28] 8000d14: 00d8 lsls r0, r3, #3 8000d16: d424 bmi.n 8000d62 pwrclkchanged = SET; 8000d18: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8000d1a: 69e3 ldr r3, [r4, #28] 8000d1c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8000d20: 61e3 str r3, [r4, #28] 8000d22: 69e3 ldr r3, [r4, #28] 8000d24: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8000d28: 9300 str r3, [sp, #0] 8000d2a: 9b00 ldr r3, [sp, #0] if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000d2c: 4e30 ldr r6, [pc, #192] ; (8000df0 ) 8000d2e: 6833 ldr r3, [r6, #0] 8000d30: 05d9 lsls r1, r3, #23 8000d32: d518 bpl.n 8000d66 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d34: 68eb ldr r3, [r5, #12] 8000d36: 2b01 cmp r3, #1 8000d38: d126 bne.n 8000d88 8000d3a: 6a23 ldr r3, [r4, #32] 8000d3c: f043 0301 orr.w r3, r3, #1 8000d40: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000d42: f7ff fabd bl 80002c0 if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8000d46: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8000d4a: 4680 mov r8, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8000d4c: 6a23 ldr r3, [r4, #32] 8000d4e: 079b lsls r3, r3, #30 8000d50: d53f bpl.n 8000dd2 if (pwrclkchanged == SET) 8000d52: 2f00 cmp r7, #0 8000d54: f43f af1e beq.w 8000b94 __HAL_RCC_PWR_CLK_DISABLE(); 8000d58: 69e3 ldr r3, [r4, #28] 8000d5a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8000d5e: 61e3 str r3, [r4, #28] 8000d60: e718 b.n 8000b94 FlagStatus pwrclkchanged = RESET; 8000d62: 2700 movs r7, #0 8000d64: e7e2 b.n 8000d2c SET_BIT(PWR->CR, PWR_CR_DBP); 8000d66: 6833 ldr r3, [r6, #0] 8000d68: f443 7380 orr.w r3, r3, #256 ; 0x100 8000d6c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000d6e: f7ff faa7 bl 80002c0 8000d72: 4680 mov r8, r0 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000d74: 6833 ldr r3, [r6, #0] 8000d76: 05da lsls r2, r3, #23 8000d78: d4dc bmi.n 8000d34 if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8000d7a: f7ff faa1 bl 80002c0 8000d7e: eba0 0008 sub.w r0, r0, r8 8000d82: 2864 cmp r0, #100 ; 0x64 8000d84: d9f6 bls.n 8000d74 8000d86: e733 b.n 8000bf0 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d88: b9ab cbnz r3, 8000db6 8000d8a: 6a23 ldr r3, [r4, #32] if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8000d8c: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d90: f023 0301 bic.w r3, r3, #1 8000d94: 6223 str r3, [r4, #32] 8000d96: 6a23 ldr r3, [r4, #32] 8000d98: f023 0304 bic.w r3, r3, #4 8000d9c: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000d9e: f7ff fa8f bl 80002c0 8000da2: 4606 mov r6, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8000da4: 6a23 ldr r3, [r4, #32] 8000da6: 0798 lsls r0, r3, #30 8000da8: d5d3 bpl.n 8000d52 if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8000daa: f7ff fa89 bl 80002c0 8000dae: 1b80 subs r0, r0, r6 8000db0: 4540 cmp r0, r8 8000db2: d9f7 bls.n 8000da4 8000db4: e71c b.n 8000bf0 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000db6: 2b05 cmp r3, #5 8000db8: 6a23 ldr r3, [r4, #32] 8000dba: d103 bne.n 8000dc4 8000dbc: f043 0304 orr.w r3, r3, #4 8000dc0: 6223 str r3, [r4, #32] 8000dc2: e7ba b.n 8000d3a 8000dc4: f023 0301 bic.w r3, r3, #1 8000dc8: 6223 str r3, [r4, #32] 8000dca: 6a23 ldr r3, [r4, #32] 8000dcc: f023 0304 bic.w r3, r3, #4 8000dd0: e7b6 b.n 8000d40 if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8000dd2: f7ff fa75 bl 80002c0 8000dd6: eba0 0008 sub.w r0, r0, r8 8000dda: 42b0 cmp r0, r6 8000ddc: d9b6 bls.n 8000d4c 8000dde: e707 b.n 8000bf0 8000de0: 40021000 .word 0x40021000 8000de4: 42420000 .word 0x42420000 8000de8: 42420480 .word 0x42420480 8000dec: 20000018 .word 0x20000018 8000df0: 40007000 .word 0x40007000 if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000df4: 4b2a ldr r3, [pc, #168] ; (8000ea0 ) 8000df6: 685a ldr r2, [r3, #4] 8000df8: 461c mov r4, r3 8000dfa: f002 020c and.w r2, r2, #12 8000dfe: 2a08 cmp r2, #8 8000e00: d03d beq.n 8000e7e 8000e02: 2300 movs r3, #0 8000e04: 4e27 ldr r6, [pc, #156] ; (8000ea4 ) if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000e06: 2802 cmp r0, #2 __HAL_RCC_PLL_DISABLE(); 8000e08: 6033 str r3, [r6, #0] if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000e0a: d12b bne.n 8000e64 tickstart = HAL_GetTick(); 8000e0c: f7ff fa58 bl 80002c0 8000e10: 4607 mov r7, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000e12: 6823 ldr r3, [r4, #0] 8000e14: 0199 lsls r1, r3, #6 8000e16: d41f bmi.n 8000e58 if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8000e18: 6a2b ldr r3, [r5, #32] 8000e1a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000e1e: d105 bne.n 8000e2c __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8000e20: 6862 ldr r2, [r4, #4] 8000e22: 68a9 ldr r1, [r5, #8] 8000e24: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8000e28: 430a orrs r2, r1 8000e2a: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8000e2c: 6a69 ldr r1, [r5, #36] ; 0x24 8000e2e: 6862 ldr r2, [r4, #4] 8000e30: 430b orrs r3, r1 8000e32: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8000e36: 4313 orrs r3, r2 8000e38: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8000e3a: 2301 movs r3, #1 8000e3c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000e3e: f7ff fa3f bl 80002c0 8000e42: 4605 mov r5, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000e44: 6823 ldr r3, [r4, #0] 8000e46: 019a lsls r2, r3, #6 8000e48: f53f aea8 bmi.w 8000b9c if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8000e4c: f7ff fa38 bl 80002c0 8000e50: 1b40 subs r0, r0, r5 8000e52: 2802 cmp r0, #2 8000e54: d9f6 bls.n 8000e44 8000e56: e6cb b.n 8000bf0 if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8000e58: f7ff fa32 bl 80002c0 8000e5c: 1bc0 subs r0, r0, r7 8000e5e: 2802 cmp r0, #2 8000e60: d9d7 bls.n 8000e12 8000e62: e6c5 b.n 8000bf0 tickstart = HAL_GetTick(); 8000e64: f7ff fa2c bl 80002c0 8000e68: 4605 mov r5, r0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000e6a: 6823 ldr r3, [r4, #0] 8000e6c: 019b lsls r3, r3, #6 8000e6e: f57f ae95 bpl.w 8000b9c if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8000e72: f7ff fa25 bl 80002c0 8000e76: 1b40 subs r0, r0, r5 8000e78: 2802 cmp r0, #2 8000e7a: d9f6 bls.n 8000e6a 8000e7c: e6b8 b.n 8000bf0 if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8000e7e: 2801 cmp r0, #1 8000e80: f43f aeb7 beq.w 8000bf2 pll_config = RCC->CFGR; 8000e84: 6858 ldr r0, [r3, #4] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8000e86: 6a2b ldr r3, [r5, #32] 8000e88: f400 3280 and.w r2, r0, #65536 ; 0x10000 8000e8c: 429a cmp r2, r3 8000e8e: f47f ae71 bne.w 8000b74 8000e92: 6a6b ldr r3, [r5, #36] ; 0x24 (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8000e94: f400 1070 and.w r0, r0, #3932160 ; 0x3c0000 return HAL_ERROR; 8000e98: 1ac0 subs r0, r0, r3 8000e9a: bf18 it ne 8000e9c: 2001 movne r0, #1 8000e9e: e6a8 b.n 8000bf2 8000ea0: 40021000 .word 0x40021000 8000ea4: 42420060 .word 0x42420060 08000ea8 : { 8000ea8: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000eaa: 4b19 ldr r3, [pc, #100] ; (8000f10 ) { 8000eac: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000eae: ac02 add r4, sp, #8 8000eb0: f103 0510 add.w r5, r3, #16 8000eb4: 4622 mov r2, r4 8000eb6: 6818 ldr r0, [r3, #0] 8000eb8: 6859 ldr r1, [r3, #4] 8000eba: 3308 adds r3, #8 8000ebc: c203 stmia r2!, {r0, r1} 8000ebe: 42ab cmp r3, r5 8000ec0: 4614 mov r4, r2 8000ec2: d1f7 bne.n 8000eb4 const uint8_t aPredivFactorTable[2] = {1, 2}; 8000ec4: 2301 movs r3, #1 8000ec6: f88d 3004 strb.w r3, [sp, #4] 8000eca: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8000ecc: 4911 ldr r1, [pc, #68] ; (8000f14 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8000ece: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8000ed2: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8000ed4: f003 020c and.w r2, r3, #12 8000ed8: 2a08 cmp r2, #8 8000eda: d117 bne.n 8000f0c pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000edc: f3c3 4283 ubfx r2, r3, #18, #4 8000ee0: a806 add r0, sp, #24 8000ee2: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000ee4: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000ee6: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000eea: d50c bpl.n 8000f06 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000eec: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000eee: 480a ldr r0, [pc, #40] ; (8000f18 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000ef0: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000ef4: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000ef6: aa06 add r2, sp, #24 8000ef8: 4413 add r3, r2 8000efa: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000efe: fbb0 f0f3 udiv r0, r0, r3 } 8000f02: b007 add sp, #28 8000f04: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8000f06: 4805 ldr r0, [pc, #20] ; (8000f1c ) 8000f08: 4350 muls r0, r2 8000f0a: e7fa b.n 8000f02 sysclockfreq = HSE_VALUE; 8000f0c: 4802 ldr r0, [pc, #8] ; (8000f18 ) return sysclockfreq; 8000f0e: e7f8 b.n 8000f02 8000f10: 08003158 .word 0x08003158 8000f14: 40021000 .word 0x40021000 8000f18: 007a1200 .word 0x007a1200 8000f1c: 003d0900 .word 0x003d0900 08000f20 : { 8000f20: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8000f24: 460d mov r5, r1 if (RCC_ClkInitStruct == NULL) 8000f26: 4604 mov r4, r0 8000f28: b910 cbnz r0, 8000f30 return HAL_ERROR; 8000f2a: 2001 movs r0, #1 8000f2c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} if (FLatency > __HAL_FLASH_GET_LATENCY()) 8000f30: 4a45 ldr r2, [pc, #276] ; (8001048 ) 8000f32: 6813 ldr r3, [r2, #0] 8000f34: f003 0307 and.w r3, r3, #7 8000f38: 428b cmp r3, r1 8000f3a: d329 bcc.n 8000f90 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8000f3c: 6821 ldr r1, [r4, #0] 8000f3e: 078e lsls r6, r1, #30 8000f40: d431 bmi.n 8000fa6 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8000f42: 07ca lsls r2, r1, #31 8000f44: d444 bmi.n 8000fd0 if (FLatency < __HAL_FLASH_GET_LATENCY()) 8000f46: 4a40 ldr r2, [pc, #256] ; (8001048 ) 8000f48: 6813 ldr r3, [r2, #0] 8000f4a: f003 0307 and.w r3, r3, #7 8000f4e: 429d cmp r5, r3 8000f50: d367 bcc.n 8001022 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000f52: 6822 ldr r2, [r4, #0] 8000f54: 4d3d ldr r5, [pc, #244] ; (800104c ) 8000f56: f012 0f04 tst.w r2, #4 8000f5a: d16e bne.n 800103a if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000f5c: 0713 lsls r3, r2, #28 8000f5e: d506 bpl.n 8000f6e MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8000f60: 686b ldr r3, [r5, #4] 8000f62: 6922 ldr r2, [r4, #16] 8000f64: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8000f68: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000f6c: 606b str r3, [r5, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 8000f6e: f7ff ff9b bl 8000ea8 8000f72: 686b ldr r3, [r5, #4] 8000f74: 4a36 ldr r2, [pc, #216] ; (8001050 ) 8000f76: f3c3 1303 ubfx r3, r3, #4, #4 8000f7a: 5cd3 ldrb r3, [r2, r3] 8000f7c: 40d8 lsrs r0, r3 8000f7e: 4b35 ldr r3, [pc, #212] ; (8001054 ) 8000f80: 6018 str r0, [r3, #0] HAL_InitTick(uwTickPrio); 8000f82: 4b35 ldr r3, [pc, #212] ; (8001058 ) 8000f84: 6818 ldr r0, [r3, #0] 8000f86: f7ff f959 bl 800023c return HAL_OK; 8000f8a: 2000 movs r0, #0 8000f8c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8000f90: 6813 ldr r3, [r2, #0] 8000f92: f023 0307 bic.w r3, r3, #7 8000f96: 430b orrs r3, r1 8000f98: 6013 str r3, [r2, #0] if (__HAL_FLASH_GET_LATENCY() != FLatency) 8000f9a: 6813 ldr r3, [r2, #0] 8000f9c: f003 0307 and.w r3, r3, #7 8000fa0: 4299 cmp r1, r3 8000fa2: d1c2 bne.n 8000f2a 8000fa4: e7ca b.n 8000f3c 8000fa6: 4b29 ldr r3, [pc, #164] ; (800104c ) if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000fa8: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8000fac: bf1e ittt ne 8000fae: 685a ldrne r2, [r3, #4] 8000fb0: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8000fb4: 605a strne r2, [r3, #4] if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000fb6: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8000fb8: bf42 ittt mi 8000fba: 685a ldrmi r2, [r3, #4] 8000fbc: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8000fc0: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8000fc2: 685a ldr r2, [r3, #4] 8000fc4: 68a0 ldr r0, [r4, #8] 8000fc6: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8000fca: 4302 orrs r2, r0 8000fcc: 605a str r2, [r3, #4] 8000fce: e7b8 b.n 8000f42 if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fd0: 6862 ldr r2, [r4, #4] 8000fd2: 4e1e ldr r6, [pc, #120] ; (800104c ) 8000fd4: 2a01 cmp r2, #1 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000fd6: 6833 ldr r3, [r6, #0] if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fd8: d11b bne.n 8001012 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000fda: f413 3f00 tst.w r3, #131072 ; 0x20000 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000fde: d0a4 beq.n 8000f2a __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000fe0: 6873 ldr r3, [r6, #4] if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8000fe2: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000fe6: f023 0303 bic.w r3, r3, #3 8000fea: 4313 orrs r3, r2 8000fec: 6073 str r3, [r6, #4] tickstart = HAL_GetTick(); 8000fee: f7ff f967 bl 80002c0 8000ff2: 4607 mov r7, r0 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8000ff4: 6873 ldr r3, [r6, #4] 8000ff6: 6862 ldr r2, [r4, #4] 8000ff8: f003 030c and.w r3, r3, #12 8000ffc: ebb3 0f82 cmp.w r3, r2, lsl #2 8001000: d0a1 beq.n 8000f46 if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8001002: f7ff f95d bl 80002c0 8001006: 1bc0 subs r0, r0, r7 8001008: 4540 cmp r0, r8 800100a: d9f3 bls.n 8000ff4 return HAL_TIMEOUT; 800100c: 2003 movs r0, #3 } 800100e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8001012: 2a02 cmp r2, #2 8001014: d102 bne.n 800101c if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001016: f013 7f00 tst.w r3, #33554432 ; 0x2000000 800101a: e7e0 b.n 8000fde if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800101c: f013 0f02 tst.w r3, #2 8001020: e7dd b.n 8000fde __HAL_FLASH_SET_LATENCY(FLatency); 8001022: 6813 ldr r3, [r2, #0] 8001024: f023 0307 bic.w r3, r3, #7 8001028: 432b orrs r3, r5 800102a: 6013 str r3, [r2, #0] if (__HAL_FLASH_GET_LATENCY() != FLatency) 800102c: 6813 ldr r3, [r2, #0] 800102e: f003 0307 and.w r3, r3, #7 8001032: 429d cmp r5, r3 8001034: f47f af79 bne.w 8000f2a 8001038: e78b b.n 8000f52 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800103a: 686b ldr r3, [r5, #4] 800103c: 68e1 ldr r1, [r4, #12] 800103e: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8001042: 430b orrs r3, r1 8001044: 606b str r3, [r5, #4] 8001046: e789 b.n 8000f5c 8001048: 40022000 .word 0x40022000 800104c: 40021000 .word 0x40021000 8001050: 080031c3 .word 0x080031c3 8001054: 20000018 .word 0x20000018 8001058: 20000004 .word 0x20000004 0800105c : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 800105c: 4b04 ldr r3, [pc, #16] ; (8001070 ) 800105e: 4a05 ldr r2, [pc, #20] ; (8001074 ) 8001060: 685b ldr r3, [r3, #4] 8001062: f3c3 2302 ubfx r3, r3, #8, #3 8001066: 5cd3 ldrb r3, [r2, r3] 8001068: 4a03 ldr r2, [pc, #12] ; (8001078 ) 800106a: 6810 ldr r0, [r2, #0] } 800106c: 40d8 lsrs r0, r3 800106e: 4770 bx lr 8001070: 40021000 .word 0x40021000 8001074: 080031d3 .word 0x080031d3 8001078: 20000018 .word 0x20000018 0800107c : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 800107c: 4b04 ldr r3, [pc, #16] ; (8001090 ) 800107e: 4a05 ldr r2, [pc, #20] ; (8001094 ) 8001080: 685b ldr r3, [r3, #4] 8001082: f3c3 23c2 ubfx r3, r3, #11, #3 8001086: 5cd3 ldrb r3, [r2, r3] 8001088: 4a03 ldr r2, [pc, #12] ; (8001098 ) 800108a: 6810 ldr r0, [r2, #0] } 800108c: 40d8 lsrs r0, r3 800108e: 4770 bx lr 8001090: 40021000 .word 0x40021000 8001094: 080031d3 .word 0x080031d3 8001098: 20000018 .word 0x20000018 0800109c : /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 800109c: 6803 ldr r3, [r0, #0] __HAL_TIM_ENABLE(htim); } /* Return function status */ return HAL_OK; } 800109e: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80010a0: 68da ldr r2, [r3, #12] 80010a2: f042 0201 orr.w r2, r2, #1 80010a6: 60da str r2, [r3, #12] tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 80010a8: 689a ldr r2, [r3, #8] 80010aa: f002 0207 and.w r2, r2, #7 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80010ae: 2a06 cmp r2, #6 __HAL_TIM_ENABLE(htim); 80010b0: bf1e ittt ne 80010b2: 681a ldrne r2, [r3, #0] 80010b4: f042 0201 orrne.w r2, r2, #1 80010b8: 601a strne r2, [r3, #0] } 80010ba: 4770 bx lr 080010bc : 80010bc: 4770 bx lr 080010be : 80010be: 4770 bx lr 080010c0 : 80010c0: 4770 bx lr 080010c2 : 80010c2: 4770 bx lr 080010c4 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010c4: 6803 ldr r3, [r0, #0] { 80010c6: b510 push {r4, lr} if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010c8: 691a ldr r2, [r3, #16] { 80010ca: 4604 mov r4, r0 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010cc: 0791 lsls r1, r2, #30 80010ce: d50e bpl.n 80010ee { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) 80010d0: 68da ldr r2, [r3, #12] 80010d2: 0792 lsls r2, r2, #30 80010d4: d50b bpl.n 80010ee { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80010d6: f06f 0202 mvn.w r2, #2 80010da: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80010dc: 2201 movs r2, #1 /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80010de: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80010e0: 7702 strb r2, [r0, #28] if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80010e2: 079b lsls r3, r3, #30 80010e4: d077 beq.n 80011d6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80010e6: f7ff ffea bl 80010be #else HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80010ea: 2300 movs r3, #0 80010ec: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80010ee: 6823 ldr r3, [r4, #0] 80010f0: 691a ldr r2, [r3, #16] 80010f2: 0750 lsls r0, r2, #29 80010f4: d510 bpl.n 8001118 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) 80010f6: 68da ldr r2, [r3, #12] 80010f8: 0751 lsls r1, r2, #29 80010fa: d50d bpl.n 8001118 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 80010fc: f06f 0204 mvn.w r2, #4 8001100: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001102: 2202 movs r2, #2 /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001104: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001106: 7722 strb r2, [r4, #28] if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001108: f413 7f40 tst.w r3, #768 ; 0x300 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800110c: 4620 mov r0, r4 if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 800110e: d068 beq.n 80011e2 HAL_TIM_IC_CaptureCallback(htim); 8001110: f7ff ffd5 bl 80010be #else HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001114: 2300 movs r3, #0 8001116: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8001118: 6823 ldr r3, [r4, #0] 800111a: 691a ldr r2, [r3, #16] 800111c: 0712 lsls r2, r2, #28 800111e: d50f bpl.n 8001140 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) 8001120: 68da ldr r2, [r3, #12] 8001122: 0710 lsls r0, r2, #28 8001124: d50c bpl.n 8001140 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8001126: f06f 0208 mvn.w r2, #8 800112a: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800112c: 2204 movs r2, #4 /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800112e: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8001130: 7722 strb r2, [r4, #28] if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001132: 0799 lsls r1, r3, #30 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8001134: 4620 mov r0, r4 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001136: d05a beq.n 80011ee HAL_TIM_IC_CaptureCallback(htim); 8001138: f7ff ffc1 bl 80010be #else HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800113c: 2300 movs r3, #0 800113e: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8001140: 6823 ldr r3, [r4, #0] 8001142: 691a ldr r2, [r3, #16] 8001144: 06d2 lsls r2, r2, #27 8001146: d510 bpl.n 800116a { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) 8001148: 68da ldr r2, [r3, #12] 800114a: 06d0 lsls r0, r2, #27 800114c: d50d bpl.n 800116a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 800114e: f06f 0210 mvn.w r2, #16 8001152: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001154: 2208 movs r2, #8 /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001156: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001158: 7722 strb r2, [r4, #28] if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800115a: f413 7f40 tst.w r3, #768 ; 0x300 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800115e: 4620 mov r0, r4 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001160: d04b beq.n 80011fa HAL_TIM_IC_CaptureCallback(htim); 8001162: f7ff ffac bl 80010be #else HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001166: 2300 movs r3, #0 8001168: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 800116a: 6823 ldr r3, [r4, #0] 800116c: 691a ldr r2, [r3, #16] 800116e: 07d1 lsls r1, r2, #31 8001170: d508 bpl.n 8001184 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) 8001172: 68da ldr r2, [r3, #12] 8001174: 07d2 lsls r2, r2, #31 8001176: d505 bpl.n 8001184 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001178: f06f 0201 mvn.w r2, #1 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 800117c: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 800117e: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8001180: f000 fcba bl 8001af8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8001184: 6823 ldr r3, [r4, #0] 8001186: 691a ldr r2, [r3, #16] 8001188: 0610 lsls r0, r2, #24 800118a: d508 bpl.n 800119e { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) 800118c: 68da ldr r2, [r3, #12] 800118e: 0611 lsls r1, r2, #24 8001190: d505 bpl.n 800119e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001192: f06f 0280 mvn.w r2, #128 ; 0x80 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 8001196: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001198: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 800119a: f000 f8ba bl 8001312 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 800119e: 6823 ldr r3, [r4, #0] 80011a0: 691a ldr r2, [r3, #16] 80011a2: 0652 lsls r2, r2, #25 80011a4: d508 bpl.n 80011b8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) 80011a6: 68da ldr r2, [r3, #12] 80011a8: 0650 lsls r0, r2, #25 80011aa: d505 bpl.n 80011b8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80011ac: f06f 0240 mvn.w r2, #64 ; 0x40 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 80011b0: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80011b2: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80011b4: f7ff ff85 bl 80010c2 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80011b8: 6823 ldr r3, [r4, #0] 80011ba: 691a ldr r2, [r3, #16] 80011bc: 0691 lsls r1, r2, #26 80011be: d522 bpl.n 8001206 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) 80011c0: 68da ldr r2, [r3, #12] 80011c2: 0692 lsls r2, r2, #26 80011c4: d51f bpl.n 8001206 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80011c6: f06f 0220 mvn.w r2, #32 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 80011ca: 4620 mov r0, r4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 80011cc: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80011d0: 611a str r2, [r3, #16] HAL_TIMEx_CommutCallback(htim); 80011d2: f000 b89d b.w 8001310 HAL_TIM_OC_DelayElapsedCallback(htim); 80011d6: f7ff ff71 bl 80010bc HAL_TIM_PWM_PulseFinishedCallback(htim); 80011da: 4620 mov r0, r4 80011dc: f7ff ff70 bl 80010c0 80011e0: e783 b.n 80010ea HAL_TIM_OC_DelayElapsedCallback(htim); 80011e2: f7ff ff6b bl 80010bc HAL_TIM_PWM_PulseFinishedCallback(htim); 80011e6: 4620 mov r0, r4 80011e8: f7ff ff6a bl 80010c0 80011ec: e792 b.n 8001114 HAL_TIM_OC_DelayElapsedCallback(htim); 80011ee: f7ff ff65 bl 80010bc HAL_TIM_PWM_PulseFinishedCallback(htim); 80011f2: 4620 mov r0, r4 80011f4: f7ff ff64 bl 80010c0 80011f8: e7a0 b.n 800113c HAL_TIM_OC_DelayElapsedCallback(htim); 80011fa: f7ff ff5f bl 80010bc HAL_TIM_PWM_PulseFinishedCallback(htim); 80011fe: 4620 mov r0, r4 8001200: f7ff ff5e bl 80010c0 8001204: e7af b.n 8001166 8001206: bd10 pop {r4, pc} 08001208 : { uint32_t tmpcr1; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001208: 4a24 ldr r2, [pc, #144] ; (800129c ) tmpcr1 = TIMx->CR1; 800120a: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 800120c: 4290 cmp r0, r2 800120e: d012 beq.n 8001236 8001210: f502 6200 add.w r2, r2, #2048 ; 0x800 8001214: 4290 cmp r0, r2 8001216: d00e beq.n 8001236 8001218: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 800121c: d00b beq.n 8001236 800121e: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001222: 4290 cmp r0, r2 8001224: d007 beq.n 8001236 8001226: f502 6280 add.w r2, r2, #1024 ; 0x400 800122a: 4290 cmp r0, r2 800122c: d003 beq.n 8001236 800122e: f502 6280 add.w r2, r2, #1024 ; 0x400 8001232: 4290 cmp r0, r2 8001234: d11d bne.n 8001272 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8001236: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8001238: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 800123c: 4313 orrs r3, r2 } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800123e: 4a17 ldr r2, [pc, #92] ; (800129c ) 8001240: 4290 cmp r0, r2 8001242: d012 beq.n 800126a 8001244: f502 6200 add.w r2, r2, #2048 ; 0x800 8001248: 4290 cmp r0, r2 800124a: d00e beq.n 800126a 800124c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001250: d00b beq.n 800126a 8001252: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001256: 4290 cmp r0, r2 8001258: d007 beq.n 800126a 800125a: f502 6280 add.w r2, r2, #1024 ; 0x400 800125e: 4290 cmp r0, r2 8001260: d003 beq.n 800126a 8001262: f502 6280 add.w r2, r2, #1024 ; 0x400 8001266: 4290 cmp r0, r2 8001268: d103 bne.n 8001272 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 800126a: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 800126c: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8001270: 4313 orrs r3, r2 } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8001272: 694a ldr r2, [r1, #20] 8001274: f023 0380 bic.w r3, r3, #128 ; 0x80 8001278: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 800127a: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 800127c: 688b ldr r3, [r1, #8] 800127e: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8001280: 680b ldr r3, [r1, #0] 8001282: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8001284: 4b05 ldr r3, [pc, #20] ; (800129c ) 8001286: 4298 cmp r0, r3 8001288: d003 beq.n 8001292 800128a: f503 6300 add.w r3, r3, #2048 ; 0x800 800128e: 4298 cmp r0, r3 8001290: d101 bne.n 8001296 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8001292: 690b ldr r3, [r1, #16] 8001294: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8001296: 2301 movs r3, #1 8001298: 6143 str r3, [r0, #20] 800129a: 4770 bx lr 800129c: 40012c00 .word 0x40012c00 080012a0 : { 80012a0: b510 push {r4, lr} if (htim == NULL) 80012a2: 4604 mov r4, r0 80012a4: b1a0 cbz r0, 80012d0 if (htim->State == HAL_TIM_STATE_RESET) 80012a6: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 80012aa: f003 02ff and.w r2, r3, #255 ; 0xff 80012ae: b91b cbnz r3, 80012b8 htim->Lock = HAL_UNLOCKED; 80012b0: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80012b4: f000 fd62 bl 8001d7c htim->State = HAL_TIM_STATE_BUSY; 80012b8: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80012ba: 6820 ldr r0, [r4, #0] htim->State = HAL_TIM_STATE_BUSY; 80012bc: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80012c0: 1d21 adds r1, r4, #4 80012c2: f7ff ffa1 bl 8001208 htim->State = HAL_TIM_STATE_READY; 80012c6: 2301 movs r3, #1 return HAL_OK; 80012c8: 2000 movs r0, #0 htim->State = HAL_TIM_STATE_READY; 80012ca: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80012ce: bd10 pop {r4, pc} return HAL_ERROR; 80012d0: 2001 movs r0, #1 } 80012d2: bd10 pop {r4, pc} 080012d4 : assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 80012d4: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80012d8: b530 push {r4, r5, lr} __HAL_LOCK(htim); 80012da: 2b01 cmp r3, #1 80012dc: f04f 0302 mov.w r3, #2 80012e0: d014 beq.n 800130c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 80012e2: 6804 ldr r4, [r0, #0] htim->State = HAL_TIM_STATE_BUSY; 80012e4: f880 303d strb.w r3, [r0, #61] ; 0x3d tmpcr2 = htim->Instance->CR2; 80012e8: 6862 ldr r2, [r4, #4] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 80012ea: 68a3 ldr r3, [r4, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 80012ec: 680d ldr r5, [r1, #0] /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 80012ee: 6849 ldr r1, [r1, #4] tmpcr2 &= ~TIM_CR2_MMS; 80012f0: f022 0270 bic.w r2, r2, #112 ; 0x70 tmpsmcr &= ~TIM_SMCR_MSM; 80012f4: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpsmcr |= sMasterConfig->MasterSlaveMode; 80012f8: 430b orrs r3, r1 tmpcr2 |= sMasterConfig->MasterOutputTrigger; 80012fa: 432a orrs r2, r5 /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 80012fc: 6062 str r2, [r4, #4] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80012fe: 60a3 str r3, [r4, #8] /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8001300: 2301 movs r3, #1 8001302: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 8001306: 2300 movs r3, #0 8001308: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 800130c: 4618 mov r0, r3 return HAL_OK; } 800130e: bd30 pop {r4, r5, pc} 08001310 : 8001310: 4770 bx lr 08001312 : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8001312: 4770 bx lr 08001314 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8001314: 6803 ldr r3, [r0, #0] 8001316: 68da ldr r2, [r3, #12] 8001318: f422 7290 bic.w r2, r2, #288 ; 0x120 800131c: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800131e: 695a ldr r2, [r3, #20] 8001320: f022 0201 bic.w r2, r2, #1 8001324: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8001326: 2320 movs r3, #32 8001328: f880 303a strb.w r3, [r0, #58] ; 0x3a 800132c: 4770 bx lr ... 08001330 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8001330: b538 push {r3, r4, r5, lr} 8001332: 4605 mov r5, r0 assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001334: 6803 ldr r3, [r0, #0] 8001336: 68c1 ldr r1, [r0, #12] 8001338: 691a ldr r2, [r3, #16] 800133a: 2419 movs r4, #25 800133c: f422 5240 bic.w r2, r2, #12288 ; 0x3000 8001340: 430a orrs r2, r1 8001342: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001344: 6882 ldr r2, [r0, #8] 8001346: 6900 ldr r0, [r0, #16] MODIFY_REG(huart->Instance->CR1, 8001348: 68d9 ldr r1, [r3, #12] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800134a: 4302 orrs r2, r0 800134c: 6968 ldr r0, [r5, #20] MODIFY_REG(huart->Instance->CR1, 800134e: f421 51b0 bic.w r1, r1, #5632 ; 0x1600 8001352: f021 010c bic.w r1, r1, #12 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001356: 4302 orrs r2, r0 MODIFY_REG(huart->Instance->CR1, 8001358: 430a orrs r2, r1 800135a: 60da str r2, [r3, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 800135c: 695a ldr r2, [r3, #20] 800135e: 69a9 ldr r1, [r5, #24] 8001360: f422 7240 bic.w r2, r2, #768 ; 0x300 8001364: 430a orrs r2, r1 8001366: 615a str r2, [r3, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 8001368: 4a0d ldr r2, [pc, #52] ; (80013a0 ) 800136a: 4293 cmp r3, r2 800136c: d114 bne.n 8001398 { pclk = HAL_RCC_GetPCLK2Freq(); 800136e: f7ff fe85 bl 800107c huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } else { pclk = HAL_RCC_GetPCLK1Freq(); huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8001372: 4360 muls r0, r4 8001374: 686c ldr r4, [r5, #4] 8001376: 2264 movs r2, #100 ; 0x64 8001378: 00a4 lsls r4, r4, #2 800137a: fbb0 f0f4 udiv r0, r0, r4 800137e: fbb0 f4f2 udiv r4, r0, r2 8001382: fb02 0314 mls r3, r2, r4, r0 8001386: 011b lsls r3, r3, #4 8001388: 3332 adds r3, #50 ; 0x32 800138a: fbb3 f3f2 udiv r3, r3, r2 800138e: 6829 ldr r1, [r5, #0] 8001390: eb03 1304 add.w r3, r3, r4, lsl #4 8001394: 608b str r3, [r1, #8] 8001396: bd38 pop {r3, r4, r5, pc} pclk = HAL_RCC_GetPCLK1Freq(); 8001398: f7ff fe60 bl 800105c 800139c: e7e9 b.n 8001372 800139e: bf00 nop 80013a0: 40013800 .word 0x40013800 080013a4 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 80013a4: b5f8 push {r3, r4, r5, r6, r7, lr} 80013a6: 4604 mov r4, r0 80013a8: 460e mov r6, r1 80013aa: 4617 mov r7, r2 80013ac: 461d mov r5, r3 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 80013ae: 6821 ldr r1, [r4, #0] 80013b0: 680b ldr r3, [r1, #0] 80013b2: ea36 0303 bics.w r3, r6, r3 80013b6: d101 bne.n 80013bc return HAL_OK; 80013b8: 2000 movs r0, #0 } 80013ba: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 80013bc: 1c6b adds r3, r5, #1 80013be: d0f7 beq.n 80013b0 if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) 80013c0: b995 cbnz r5, 80013e8 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 80013c2: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 80013c4: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 80013c6: 68da ldr r2, [r3, #12] 80013c8: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 80013cc: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80013ce: 695a ldr r2, [r3, #20] 80013d0: f022 0201 bic.w r2, r2, #1 80013d4: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 80013d6: 2320 movs r3, #32 80013d8: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 80013dc: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 80013e0: 2300 movs r3, #0 80013e2: f884 3038 strb.w r3, [r4, #56] ; 0x38 80013e6: bdf8 pop {r3, r4, r5, r6, r7, pc} if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) 80013e8: f7fe ff6a bl 80002c0 80013ec: 1bc0 subs r0, r0, r7 80013ee: 4285 cmp r5, r0 80013f0: d2dd bcs.n 80013ae 80013f2: e7e6 b.n 80013c2 080013f4 : { 80013f4: b510 push {r4, lr} if (huart == NULL) 80013f6: 4604 mov r4, r0 80013f8: b340 cbz r0, 800144c if (huart->gState == HAL_UART_STATE_RESET) 80013fa: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 80013fe: f003 02ff and.w r2, r3, #255 ; 0xff 8001402: b91b cbnz r3, 800140c huart->Lock = HAL_UNLOCKED; 8001404: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8001408: f000 fccc bl 8001da4 huart->gState = HAL_UART_STATE_BUSY; 800140c: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 800140e: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8001410: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8001414: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8001416: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8001418: f423 5300 bic.w r3, r3, #8192 ; 0x2000 800141c: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 800141e: f7ff ff87 bl 8001330 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8001422: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8001424: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8001426: 691a ldr r2, [r3, #16] 8001428: f422 4290 bic.w r2, r2, #18432 ; 0x4800 800142c: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 800142e: 695a ldr r2, [r3, #20] 8001430: f022 022a bic.w r2, r2, #42 ; 0x2a 8001434: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8001436: 68da ldr r2, [r3, #12] 8001438: f442 5200 orr.w r2, r2, #8192 ; 0x2000 800143c: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 800143e: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001440: 63e0 str r0, [r4, #60] ; 0x3c huart->gState = HAL_UART_STATE_READY; 8001442: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8001446: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 800144a: bd10 pop {r4, pc} return HAL_ERROR; 800144c: 2001 movs r0, #1 } 800144e: bd10 pop {r4, pc} 08001450 : { 8001450: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001454: 461f mov r7, r3 if (huart->gState == HAL_UART_STATE_READY) 8001456: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 800145a: 4604 mov r4, r0 if (huart->gState == HAL_UART_STATE_READY) 800145c: 2b20 cmp r3, #32 { 800145e: 460d mov r5, r1 8001460: 4690 mov r8, r2 if (huart->gState == HAL_UART_STATE_READY) 8001462: d14e bne.n 8001502 if ((pData == NULL) || (Size == 0U)) 8001464: 2900 cmp r1, #0 8001466: d049 beq.n 80014fc 8001468: 2a00 cmp r2, #0 800146a: d047 beq.n 80014fc __HAL_LOCK(huart); 800146c: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8001470: 2b01 cmp r3, #1 8001472: d046 beq.n 8001502 8001474: 2301 movs r3, #1 8001476: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 800147a: 2300 movs r3, #0 800147c: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 800147e: 2321 movs r3, #33 ; 0x21 8001480: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8001484: f7fe ff1c bl 80002c0 8001488: 4606 mov r6, r0 huart->TxXferSize = Size; 800148a: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 800148e: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while (huart->TxXferCount > 0U) 8001492: 8ce3 ldrh r3, [r4, #38] ; 0x26 8001494: b29b uxth r3, r3 8001496: b96b cbnz r3, 80014b4 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8001498: 463b mov r3, r7 800149a: 4632 mov r2, r6 800149c: 2140 movs r1, #64 ; 0x40 800149e: 4620 mov r0, r4 80014a0: f7ff ff80 bl 80013a4 80014a4: b9a8 cbnz r0, 80014d2 huart->gState = HAL_UART_STATE_READY; 80014a6: 2320 movs r3, #32 __HAL_UNLOCK(huart); 80014a8: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 80014ac: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 80014b0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 80014b4: 8ce3 ldrh r3, [r4, #38] ; 0x26 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80014b6: 4632 mov r2, r6 huart->TxXferCount--; 80014b8: 3b01 subs r3, #1 80014ba: b29b uxth r3, r3 80014bc: 84e3 strh r3, [r4, #38] ; 0x26 if (huart->Init.WordLength == UART_WORDLENGTH_9B) 80014be: 68a3 ldr r3, [r4, #8] if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80014c0: 2180 movs r1, #128 ; 0x80 if (huart->Init.WordLength == UART_WORDLENGTH_9B) 80014c2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80014c6: 4620 mov r0, r4 80014c8: 463b mov r3, r7 if (huart->Init.WordLength == UART_WORDLENGTH_9B) 80014ca: d10e bne.n 80014ea if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80014cc: f7ff ff6a bl 80013a4 80014d0: b110 cbz r0, 80014d8 return HAL_TIMEOUT; 80014d2: 2003 movs r0, #3 80014d4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 80014d8: 882b ldrh r3, [r5, #0] 80014da: 6822 ldr r2, [r4, #0] 80014dc: f3c3 0308 ubfx r3, r3, #0, #9 80014e0: 6053 str r3, [r2, #4] if (huart->Init.Parity == UART_PARITY_NONE) 80014e2: 6923 ldr r3, [r4, #16] 80014e4: b943 cbnz r3, 80014f8 pData += 2U; 80014e6: 3502 adds r5, #2 80014e8: e7d3 b.n 8001492 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80014ea: f7ff ff5b bl 80013a4 80014ee: 2800 cmp r0, #0 80014f0: d1ef bne.n 80014d2 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 80014f2: 6823 ldr r3, [r4, #0] 80014f4: 782a ldrb r2, [r5, #0] 80014f6: 605a str r2, [r3, #4] 80014f8: 3501 adds r5, #1 80014fa: e7ca b.n 8001492 return HAL_ERROR; 80014fc: 2001 movs r0, #1 80014fe: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8001502: 2002 movs r0, #2 } 8001504: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08001508 : { 8001508: b538 push {r3, r4, r5, lr} 800150a: 4604 mov r4, r0 800150c: 4613 mov r3, r2 if (huart->gState == HAL_UART_STATE_READY) 800150e: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8001512: 2a20 cmp r2, #32 8001514: d12a bne.n 800156c if ((pData == NULL) || (Size == 0U)) 8001516: b339 cbz r1, 8001568 8001518: b333 cbz r3, 8001568 __HAL_LOCK(huart); 800151a: f894 2038 ldrb.w r2, [r4, #56] ; 0x38 800151e: 2a01 cmp r2, #1 8001520: d024 beq.n 800156c 8001522: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001524: 2500 movs r5, #0 __HAL_LOCK(huart); 8001526: f884 2038 strb.w r2, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_BUSY_TX; 800152a: 2221 movs r2, #33 ; 0x21 huart->TxXferCount = Size; 800152c: 84e3 strh r3, [r4, #38] ; 0x26 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 800152e: 6b20 ldr r0, [r4, #48] ; 0x30 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001530: 63e5 str r5, [r4, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8001532: f884 2039 strb.w r2, [r4, #57] ; 0x39 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8001536: 4a0e ldr r2, [pc, #56] ; (8001570 ) huart->TxXferSize = Size; 8001538: 84a3 strh r3, [r4, #36] ; 0x24 huart->pTxBuffPtr = pData; 800153a: 6221 str r1, [r4, #32] huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 800153c: 6282 str r2, [r0, #40] ; 0x28 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 800153e: 4a0d ldr r2, [pc, #52] ; (8001574 ) huart->hdmatx->XferAbortCallback = NULL; 8001540: 6345 str r5, [r0, #52] ; 0x34 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8001542: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmatx->XferErrorCallback = UART_DMAError; 8001544: 4a0c ldr r2, [pc, #48] ; (8001578 ) 8001546: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size); 8001548: 6822 ldr r2, [r4, #0] 800154a: 3204 adds r2, #4 800154c: f7fe ff68 bl 8000420 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8001550: f06f 0240 mvn.w r2, #64 ; 0x40 8001554: 6823 ldr r3, [r4, #0] return HAL_OK; 8001556: 4628 mov r0, r5 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8001558: 601a str r2, [r3, #0] SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 800155a: 695a ldr r2, [r3, #20] __HAL_UNLOCK(huart); 800155c: f884 5038 strb.w r5, [r4, #56] ; 0x38 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8001560: f042 0280 orr.w r2, r2, #128 ; 0x80 8001564: 615a str r2, [r3, #20] return HAL_OK; 8001566: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8001568: 2001 movs r0, #1 800156a: bd38 pop {r3, r4, r5, pc} return HAL_BUSY; 800156c: 2002 movs r0, #2 } 800156e: bd38 pop {r3, r4, r5, pc} 8001570: 0800160f .word 0x0800160f 8001574: 0800163d .word 0x0800163d 8001578: 08001709 .word 0x08001709 0800157c : { 800157c: 4613 mov r3, r2 if (huart->RxState == HAL_UART_STATE_READY) 800157e: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 8001582: b573 push {r0, r1, r4, r5, r6, lr} if (huart->RxState == HAL_UART_STATE_READY) 8001584: 2a20 cmp r2, #32 { 8001586: 4605 mov r5, r0 if (huart->RxState == HAL_UART_STATE_READY) 8001588: d138 bne.n 80015fc if ((pData == NULL) || (Size == 0U)) 800158a: 2900 cmp r1, #0 800158c: d034 beq.n 80015f8 800158e: 2b00 cmp r3, #0 8001590: d032 beq.n 80015f8 __HAL_LOCK(huart); 8001592: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 8001596: 2a01 cmp r2, #1 8001598: d030 beq.n 80015fc 800159a: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 800159c: 2400 movs r4, #0 __HAL_LOCK(huart); 800159e: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 80015a2: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 80015a4: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 80015a6: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 80015a8: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 80015aa: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 80015ae: 6b40 ldr r0, [r0, #52] ; 0x34 80015b0: 4a13 ldr r2, [pc, #76] ; (8001600 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size); 80015b2: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 80015b4: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 80015b6: 4a13 ldr r2, [pc, #76] ; (8001604 ) huart->hdmarx->XferAbortCallback = NULL; 80015b8: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 80015ba: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 80015bc: 4a12 ldr r2, [pc, #72] ; (8001608 ) 80015be: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size); 80015c0: 460a mov r2, r1 80015c2: 1d31 adds r1, r6, #4 80015c4: f7fe ff2c bl 8000420 return HAL_OK; 80015c8: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 80015ca: 682b ldr r3, [r5, #0] 80015cc: 9401 str r4, [sp, #4] 80015ce: 681a ldr r2, [r3, #0] 80015d0: 9201 str r2, [sp, #4] 80015d2: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 80015d4: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 80015d8: 9201 str r2, [sp, #4] 80015da: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 80015dc: 68da ldr r2, [r3, #12] 80015de: f442 7280 orr.w r2, r2, #256 ; 0x100 80015e2: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 80015e4: 695a ldr r2, [r3, #20] 80015e6: f042 0201 orr.w r2, r2, #1 80015ea: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80015ec: 695a ldr r2, [r3, #20] 80015ee: f042 0240 orr.w r2, r2, #64 ; 0x40 80015f2: 615a str r2, [r3, #20] } 80015f4: b002 add sp, #8 80015f6: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 80015f8: 2001 movs r0, #1 80015fa: e7fb b.n 80015f4 return HAL_BUSY; 80015fc: 2002 movs r0, #2 80015fe: e7f9 b.n 80015f4 8001600: 08001647 .word 0x08001647 8001604: 080016fd .word 0x080016fd 8001608: 08001709 .word 0x08001709 0800160c : 800160c: 4770 bx lr 0800160e : { 800160e: b508 push {r3, lr} if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001610: 6803 ldr r3, [r0, #0] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8001612: 6a42 ldr r2, [r0, #36] ; 0x24 if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001614: 681b ldr r3, [r3, #0] 8001616: f013 0320 ands.w r3, r3, #32 800161a: d10a bne.n 8001632 huart->TxXferCount = 0x00U; 800161c: 84d3 strh r3, [r2, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 800161e: 6813 ldr r3, [r2, #0] 8001620: 695a ldr r2, [r3, #20] 8001622: f022 0280 bic.w r2, r2, #128 ; 0x80 8001626: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8001628: 68da ldr r2, [r3, #12] 800162a: f042 0240 orr.w r2, r2, #64 ; 0x40 800162e: 60da str r2, [r3, #12] 8001630: bd08 pop {r3, pc} HAL_UART_TxCpltCallback(huart); 8001632: 4610 mov r0, r2 8001634: f7ff ffea bl 800160c 8001638: bd08 pop {r3, pc} 0800163a : 800163a: 4770 bx lr 0800163c : { 800163c: b508 push {r3, lr} HAL_UART_TxHalfCpltCallback(huart); 800163e: 6a40 ldr r0, [r0, #36] ; 0x24 8001640: f7ff fffb bl 800163a 8001644: bd08 pop {r3, pc} 08001646 : { 8001646: b508 push {r3, lr} if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001648: 6803 ldr r3, [r0, #0] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 800164a: 6a42 ldr r2, [r0, #36] ; 0x24 if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800164c: 681b ldr r3, [r3, #0] 800164e: f013 0320 ands.w r3, r3, #32 8001652: d110 bne.n 8001676 huart->RxXferCount = 0U; 8001654: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8001656: 6813 ldr r3, [r2, #0] 8001658: 68d9 ldr r1, [r3, #12] 800165a: f421 7180 bic.w r1, r1, #256 ; 0x100 800165e: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001660: 6959 ldr r1, [r3, #20] 8001662: f021 0101 bic.w r1, r1, #1 8001666: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001668: 6959 ldr r1, [r3, #20] 800166a: f021 0140 bic.w r1, r1, #64 ; 0x40 800166e: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8001670: 2320 movs r3, #32 8001672: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8001676: 4610 mov r0, r2 8001678: f000 fcb6 bl 8001fe8 800167c: bd08 pop {r3, pc} 0800167e : if (huart->RxState == HAL_UART_STATE_BUSY_RX) 800167e: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8001682: b510 push {r4, lr} if (huart->RxState == HAL_UART_STATE_BUSY_RX) 8001684: 2b22 cmp r3, #34 ; 0x22 8001686: d136 bne.n 80016f6 if (huart->Init.WordLength == UART_WORDLENGTH_9B) 8001688: 6883 ldr r3, [r0, #8] 800168a: 6901 ldr r1, [r0, #16] 800168c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8001690: 6802 ldr r2, [r0, #0] 8001692: 6a83 ldr r3, [r0, #40] ; 0x28 8001694: d123 bne.n 80016de *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8001696: 6852 ldr r2, [r2, #4] if (huart->Init.Parity == UART_PARITY_NONE) 8001698: b9e9 cbnz r1, 80016d6 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 800169a: f3c2 0208 ubfx r2, r2, #0, #9 800169e: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 80016a2: 6283 str r3, [r0, #40] ; 0x28 if (--huart->RxXferCount == 0U) 80016a4: 8dc4 ldrh r4, [r0, #46] ; 0x2e 80016a6: 3c01 subs r4, #1 80016a8: b2a4 uxth r4, r4 80016aa: 85c4 strh r4, [r0, #46] ; 0x2e 80016ac: b98c cbnz r4, 80016d2 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80016ae: 6803 ldr r3, [r0, #0] 80016b0: 68da ldr r2, [r3, #12] 80016b2: f022 0220 bic.w r2, r2, #32 80016b6: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80016b8: 68da ldr r2, [r3, #12] 80016ba: f422 7280 bic.w r2, r2, #256 ; 0x100 80016be: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80016c0: 695a ldr r2, [r3, #20] 80016c2: f022 0201 bic.w r2, r2, #1 80016c6: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80016c8: 2320 movs r3, #32 80016ca: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 80016ce: f000 fc8b bl 8001fe8 if (--huart->RxXferCount == 0U) 80016d2: 2000 movs r0, #0 } 80016d4: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 80016d6: b2d2 uxtb r2, r2 80016d8: f823 2b01 strh.w r2, [r3], #1 80016dc: e7e1 b.n 80016a2 if (huart->Init.Parity == UART_PARITY_NONE) 80016de: b921 cbnz r1, 80016ea *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 80016e0: 1c59 adds r1, r3, #1 80016e2: 6852 ldr r2, [r2, #4] 80016e4: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 80016e6: 701a strb r2, [r3, #0] 80016e8: e7dc b.n 80016a4 80016ea: 6852 ldr r2, [r2, #4] 80016ec: 1c59 adds r1, r3, #1 80016ee: 6281 str r1, [r0, #40] ; 0x28 80016f0: f002 027f and.w r2, r2, #127 ; 0x7f 80016f4: e7f7 b.n 80016e6 return HAL_BUSY; 80016f6: 2002 movs r0, #2 80016f8: bd10 pop {r4, pc} 080016fa : 80016fa: 4770 bx lr 080016fc : { 80016fc: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 80016fe: 6a40 ldr r0, [r0, #36] ; 0x24 8001700: f7ff fffb bl 80016fa 8001704: bd08 pop {r3, pc} 08001706 : 8001706: 4770 bx lr 08001708 : UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8001708: 6a41 ldr r1, [r0, #36] ; 0x24 { 800170a: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 800170c: 680b ldr r3, [r1, #0] 800170e: 695a ldr r2, [r3, #20] if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8001710: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8001714: 2821 cmp r0, #33 ; 0x21 8001716: d10a bne.n 800172e 8001718: 0612 lsls r2, r2, #24 800171a: d508 bpl.n 800172e huart->TxXferCount = 0x00U; 800171c: 2200 movs r2, #0 800171e: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8001720: 68da ldr r2, [r3, #12] 8001722: f022 02c0 bic.w r2, r2, #192 ; 0xc0 8001726: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8001728: 2220 movs r2, #32 800172a: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 800172e: 695b ldr r3, [r3, #20] if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8001730: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8001734: 2a22 cmp r2, #34 ; 0x22 8001736: d106 bne.n 8001746 8001738: 065b lsls r3, r3, #25 800173a: d504 bpl.n 8001746 huart->RxXferCount = 0x00U; 800173c: 2300 movs r3, #0 UART_EndRxTransfer(huart); 800173e: 4608 mov r0, r1 huart->RxXferCount = 0x00U; 8001740: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8001742: f7ff fde7 bl 8001314 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8001746: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001748: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 800174a: f043 0310 orr.w r3, r3, #16 800174e: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001750: f7ff ffd9 bl 8001706 8001754: bd08 pop {r3, pc} ... 08001758 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8001758: 6803 ldr r3, [r0, #0] { 800175a: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 800175c: 681a ldr r2, [r3, #0] { 800175e: 4604 mov r4, r0 if (errorflags == RESET) 8001760: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8001762: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8001764: 695d ldr r5, [r3, #20] if (errorflags == RESET) 8001766: d107 bne.n 8001778 if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8001768: 0696 lsls r6, r2, #26 800176a: d55a bpl.n 8001822 800176c: 068d lsls r5, r1, #26 800176e: d558 bpl.n 8001822 } 8001770: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8001774: f7ff bf83 b.w 800167e if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8001778: f015 0501 ands.w r5, r5, #1 800177c: d102 bne.n 8001784 800177e: f411 7f90 tst.w r1, #288 ; 0x120 8001782: d04e beq.n 8001822 if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8001784: 07d3 lsls r3, r2, #31 8001786: d505 bpl.n 8001794 8001788: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 800178a: bf42 ittt mi 800178c: 6be3 ldrmi r3, [r4, #60] ; 0x3c 800178e: f043 0301 orrmi.w r3, r3, #1 8001792: 63e3 strmi r3, [r4, #60] ; 0x3c if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001794: 0750 lsls r0, r2, #29 8001796: d504 bpl.n 80017a2 8001798: b11d cbz r5, 80017a2 huart->ErrorCode |= HAL_UART_ERROR_NE; 800179a: 6be3 ldr r3, [r4, #60] ; 0x3c 800179c: f043 0302 orr.w r3, r3, #2 80017a0: 63e3 str r3, [r4, #60] ; 0x3c if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80017a2: 0793 lsls r3, r2, #30 80017a4: d504 bpl.n 80017b0 80017a6: b11d cbz r5, 80017b0 huart->ErrorCode |= HAL_UART_ERROR_FE; 80017a8: 6be3 ldr r3, [r4, #60] ; 0x3c 80017aa: f043 0304 orr.w r3, r3, #4 80017ae: 63e3 str r3, [r4, #60] ; 0x3c if (((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80017b0: 0716 lsls r6, r2, #28 80017b2: d504 bpl.n 80017be 80017b4: b11d cbz r5, 80017be huart->ErrorCode |= HAL_UART_ERROR_ORE; 80017b6: 6be3 ldr r3, [r4, #60] ; 0x3c 80017b8: f043 0308 orr.w r3, r3, #8 80017bc: 63e3 str r3, [r4, #60] ; 0x3c if (huart->ErrorCode != HAL_UART_ERROR_NONE) 80017be: 6be3 ldr r3, [r4, #60] ; 0x3c 80017c0: 2b00 cmp r3, #0 80017c2: d066 beq.n 8001892 if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80017c4: 0695 lsls r5, r2, #26 80017c6: d504 bpl.n 80017d2 80017c8: 0688 lsls r0, r1, #26 80017ca: d502 bpl.n 80017d2 UART_Receive_IT(huart); 80017cc: 4620 mov r0, r4 80017ce: f7ff ff56 bl 800167e dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80017d2: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 80017d4: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80017d6: 695d ldr r5, [r3, #20] if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 80017d8: 6be2 ldr r2, [r4, #60] ; 0x3c 80017da: 0711 lsls r1, r2, #28 80017dc: d402 bmi.n 80017e4 80017de: f015 0540 ands.w r5, r5, #64 ; 0x40 80017e2: d01a beq.n 800181a UART_EndRxTransfer(huart); 80017e4: f7ff fd96 bl 8001314 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80017e8: 6823 ldr r3, [r4, #0] 80017ea: 695a ldr r2, [r3, #20] 80017ec: 0652 lsls r2, r2, #25 80017ee: d510 bpl.n 8001812 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80017f0: 695a ldr r2, [r3, #20] if (huart->hdmarx != NULL) 80017f2: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80017f4: f022 0240 bic.w r2, r2, #64 ; 0x40 80017f8: 615a str r2, [r3, #20] if (huart->hdmarx != NULL) 80017fa: b150 cbz r0, 8001812 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 80017fc: 4b25 ldr r3, [pc, #148] ; (8001894 ) 80017fe: 6343 str r3, [r0, #52] ; 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8001800: f7fe fe4c bl 800049c 8001804: 2800 cmp r0, #0 8001806: d044 beq.n 8001892 huart->hdmarx->XferAbortCallback(huart->hdmarx); 8001808: 6b60 ldr r0, [r4, #52] ; 0x34 } 800180a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 800180e: 6b43 ldr r3, [r0, #52] ; 0x34 8001810: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8001812: 4620 mov r0, r4 8001814: f7ff ff77 bl 8001706 8001818: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 800181a: f7ff ff74 bl 8001706 huart->ErrorCode = HAL_UART_ERROR_NONE; 800181e: 63e5 str r5, [r4, #60] ; 0x3c 8001820: bd70 pop {r4, r5, r6, pc} if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8001822: 0616 lsls r6, r2, #24 8001824: d527 bpl.n 8001876 8001826: 060d lsls r5, r1, #24 8001828: d525 bpl.n 8001876 if (huart->gState == HAL_UART_STATE_BUSY_TX) 800182a: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 800182e: 2a21 cmp r2, #33 ; 0x21 8001830: d12f bne.n 8001892 if (huart->Init.WordLength == UART_WORDLENGTH_9B) 8001832: 68a2 ldr r2, [r4, #8] 8001834: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8001838: 6a22 ldr r2, [r4, #32] 800183a: d117 bne.n 800186c huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 800183c: 8811 ldrh r1, [r2, #0] 800183e: f3c1 0108 ubfx r1, r1, #0, #9 8001842: 6059 str r1, [r3, #4] if (huart->Init.Parity == UART_PARITY_NONE) 8001844: 6921 ldr r1, [r4, #16] 8001846: b979 cbnz r1, 8001868 huart->pTxBuffPtr += 2U; 8001848: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800184a: 6222 str r2, [r4, #32] if (--huart->TxXferCount == 0U) 800184c: 8ce2 ldrh r2, [r4, #38] ; 0x26 800184e: 3a01 subs r2, #1 8001850: b292 uxth r2, r2 8001852: 84e2 strh r2, [r4, #38] ; 0x26 8001854: b9ea cbnz r2, 8001892 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8001856: 68da ldr r2, [r3, #12] 8001858: f022 0280 bic.w r2, r2, #128 ; 0x80 800185c: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 800185e: 68da ldr r2, [r3, #12] 8001860: f042 0240 orr.w r2, r2, #64 ; 0x40 8001864: 60da str r2, [r3, #12] 8001866: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8001868: 3201 adds r2, #1 800186a: e7ee b.n 800184a huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 800186c: 1c51 adds r1, r2, #1 800186e: 6221 str r1, [r4, #32] 8001870: 7812 ldrb r2, [r2, #0] 8001872: 605a str r2, [r3, #4] 8001874: e7ea b.n 800184c if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8001876: 0650 lsls r0, r2, #25 8001878: d50b bpl.n 8001892 800187a: 064a lsls r2, r1, #25 800187c: d509 bpl.n 8001892 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 800187e: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8001880: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8001882: f022 0240 bic.w r2, r2, #64 ; 0x40 8001886: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8001888: 2320 movs r3, #32 800188a: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 800188e: f7ff febd bl 800160c 8001892: bd70 pop {r4, r5, r6, pc} 8001894: 08001899 .word 0x08001899 08001898 : { 8001898: b508 push {r3, lr} huart->RxXferCount = 0x00U; 800189a: 2300 movs r3, #0 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 800189c: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 800189e: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 80018a0: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 80018a2: f7ff ff30 bl 8001706 80018a6: bd08 pop {r3, pc} 080018a8 : * ***/ #define Bluecell_BootStart 0x0b uint8_t BootStartdata[6] = {0xbe,Bluecell_BootStart,0x03,4,0,0xeb}; void Firmware_BootStart_Signal(){ 80018a8: b510 push {r4, lr} BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 80018aa: 4c06 ldr r4, [pc, #24] ; (80018c4 ) 80018ac: 78a1 ldrb r1, [r4, #2] 80018ae: 1c60 adds r0, r4, #1 80018b0: f000 f85c bl 800196c Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80018b4: 78a1 ldrb r1, [r4, #2] BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 80018b6: 7120 strb r0, [r4, #4] Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80018b8: 3103 adds r1, #3 80018ba: 4620 mov r0, r4 } 80018bc: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80018c0: f000 bbb8 b.w 8002034 80018c4: 2000000e .word 0x2000000e 080018c8 : uint8_t AckData_Buf[6] = {0xbe,FirmwareUpdataAck,0x03,5,0,0xbe}; void FirmwareUpdateStart(uint8_t* data){ 80018c8: b570 push {r4, r5, r6, lr} uint8_t ret = 0,crccheck = 0; crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80018ca: 7881 ldrb r1, [r0, #2] void FirmwareUpdateStart(uint8_t* data){ 80018cc: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80018ce: 1843 adds r3, r0, r1 80018d0: 785a ldrb r2, [r3, #1] 80018d2: 3001 adds r0, #1 80018d4: f000 f865 bl 80019a2 if(crccheck == NO_ERROR){ 80018d8: b2c0 uxtb r0, r0 80018da: 2801 cmp r0, #1 80018dc: d00e beq.n 80018fc 80018de: 2300 movs r3, #0 ret = Flash_write(&data[0]); if(ret == 1) AckData_Buf[bluecell_type] = FirmwareUpdataNak; }else{ for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) printf("%02x ",data[i]); 80018e0: 4e1e ldr r6, [pc, #120] ; (800195c ) for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) 80018e2: 78a2 ldrb r2, [r4, #2] 80018e4: 1c5d adds r5, r3, #1 80018e6: 3202 adds r2, #2 80018e8: b2db uxtb r3, r3 80018ea: 429a cmp r2, r3 80018ec: da2e bge.n 800194c printf("Check Sum error \n"); 80018ee: 481c ldr r0, [pc, #112] ; (8001960 ) 80018f0: f000 fc74 bl 80021dc AckData_Buf[bluecell_type] = FirmwareUpdataNak; 80018f4: 2222 movs r2, #34 ; 0x22 80018f6: 4b1b ldr r3, [pc, #108] ; (8001964 ) 80018f8: 705a strb r2, [r3, #1] 80018fa: e00f b.n 800191c AckData_Buf[bluecell_type] = FirmwareUpdataAck; 80018fc: 2211 movs r2, #17 80018fe: 4d19 ldr r5, [pc, #100] ; (8001964 ) 8001900: 706a strb r2, [r5, #1] if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte 8001902: 7862 ldrb r2, [r4, #1] 8001904: 2add cmp r2, #221 ; 0xdd 8001906: d001 beq.n 800190c 8001908: 2aee cmp r2, #238 ; 0xee 800190a: d107 bne.n 800191c ret = Flash_write(&data[0]); 800190c: 4620 mov r0, r4 800190e: f000 f8b7 bl 8001a80 if(ret == 1) 8001912: b2c0 uxtb r0, r0 8001914: 2801 cmp r0, #1 8001916: d101 bne.n 800191c AckData_Buf[bluecell_type] = FirmwareUpdataNak; 8001918: 2322 movs r3, #34 ; 0x22 800191a: 706b strb r3, [r5, #1] } AckData_Buf[bluecell_crc] = STH30_CreateCrc(&AckData_Buf[bluecell_type],AckData_Buf[bluecell_length]); 800191c: 4d11 ldr r5, [pc, #68] ; (8001964 ) 800191e: 78a9 ldrb r1, [r5, #2] 8001920: 1c68 adds r0, r5, #1 8001922: f000 f823 bl 800196c 8001926: 7128 strb r0, [r5, #4] if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){ 8001928: 7863 ldrb r3, [r4, #1] 800192a: 2bee cmp r3, #238 ; 0xee 800192c: d006 beq.n 800193c 800192e: 2b0a cmp r3, #10 8001930: d004 beq.n 800193c Uart1_Data_Send(&AckData_Buf[bluecell_stx],AckData_Buf[bluecell_length] + 3); 8001932: 78a9 ldrb r1, [r5, #2] 8001934: 4628 mov r0, r5 8001936: 3103 adds r1, #3 8001938: f000 fb7c bl 8002034 } if(data[bluecell_type] == 0xEE) 800193c: 7863 ldrb r3, [r4, #1] 800193e: 2bee cmp r3, #238 ; 0xee 8001940: d10a bne.n 8001958 printf("update Complete \n"); } 8001942: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} printf("update Complete \n"); 8001946: 4808 ldr r0, [pc, #32] ; (8001968 ) 8001948: f000 bc48 b.w 80021dc printf("%02x ",data[i]); 800194c: 5ce1 ldrb r1, [r4, r3] 800194e: 4630 mov r0, r6 8001950: f000 fbd0 bl 80020f4 8001954: 462b mov r3, r5 8001956: e7c4 b.n 80018e2 8001958: bd70 pop {r4, r5, r6, pc} 800195a: bf00 nop 800195c: 08003168 .word 0x08003168 8001960: 0800316e .word 0x0800316e 8001964: 20000008 .word 0x20000008 8001968: 0800317f .word 0x0800317f 0800196c : } return(crc16 == checksum ? CHECKSUM_ERROR : NO_ERROR ); } uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 800196c: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 800196e: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001970: 4604 mov r4, r0 8001972: 1a22 subs r2, r4, r0 8001974: b2d2 uxtb r2, r2 8001976: 4291 cmp r1, r2 8001978: d801 bhi.n 800197e if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 800197a: 4618 mov r0, r3 800197c: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 800197e: f814 2b01 ldrb.w r2, [r4], #1 8001982: 4053 eors r3, r2 8001984: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001986: f013 0f80 tst.w r3, #128 ; 0x80 800198a: f102 32ff add.w r2, r2, #4294967295 800198e: ea4f 0343 mov.w r3, r3, lsl #1 8001992: bf18 it ne 8001994: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001998: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 800199c: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 800199e: d1f2 bne.n 8001986 80019a0: e7e7 b.n 8001972 080019a2 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 80019a2: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80019a4: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80019a6: 4605 mov r5, r0 80019a8: 1a2c subs r4, r5, r0 80019aa: b2e4 uxtb r4, r4 80019ac: 42a1 cmp r1, r4 80019ae: d803 bhi.n 80019b8 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 80019b0: 1a9b subs r3, r3, r2 80019b2: 4258 negs r0, r3 80019b4: 4158 adcs r0, r3 80019b6: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 80019b8: f815 4b01 ldrb.w r4, [r5], #1 80019bc: 4063 eors r3, r4 80019be: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 80019c0: f013 0f80 tst.w r3, #128 ; 0x80 80019c4: f104 34ff add.w r4, r4, #4294967295 80019c8: ea4f 0343 mov.w r3, r3, lsl #1 80019cc: bf18 it ne 80019ce: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 80019d2: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 80019d6: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 80019d8: d1f2 bne.n 80019c0 80019da: e7e5 b.n 80019a8 080019dc : typedef void (*fptr)(void); fptr jump_to_app; uint32_t jump_addr; void Jump_App(void){ __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 80019dc: 4a0c ldr r2, [pc, #48] ; (8001a10 ) void Jump_App(void){ 80019de: b510 push {r4, lr} __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 80019e0: 69d3 ldr r3, [r2, #28] printf("boot loader start\n"); //메세�? 출력 80019e2: 480c ldr r0, [pc, #48] ; (8001a14 ) __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 80019e4: f023 0310 bic.w r3, r3, #16 80019e8: 61d3 str r3, [r2, #28] printf("boot loader start\n"); //메세�? 출력 80019ea: f000 fbf7 bl 80021dc jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 80019ee: 4b0a ldr r3, [pc, #40] ; (8001a18 ) 80019f0: 4a0a ldr r2, [pc, #40] ; (8001a1c ) 80019f2: 681b ldr r3, [r3, #0] jump_to_app = (fptr) jump_addr; 80019f4: 4c0a ldr r4, [pc, #40] ; (8001a20 ) /* init user app's sp */ printf("jump!\n"); 80019f6: 480b ldr r0, [pc, #44] ; (8001a24 ) jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 80019f8: 6013 str r3, [r2, #0] jump_to_app = (fptr) jump_addr; 80019fa: 6023 str r3, [r4, #0] printf("jump!\n"); 80019fc: f000 fbee bl 80021dc __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); 8001a00: 4b09 ldr r3, [pc, #36] ; (8001a28 ) 8001a02: 681b ldr r3, [r3, #0] \details Assigns the given value to the Main Stack Pointer (MSP). \param [in] topOfMainStack Main Stack Pointer value to set */ __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) { __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 8001a04: f383 8808 msr MSP, r3 jump_to_app(); 8001a08: 6823 ldr r3, [r4, #0] } 8001a0a: e8bd 4010 ldmia.w sp!, {r4, lr} jump_to_app(); 8001a0e: 4718 bx r3 8001a10: 40021000 .word 0x40021000 8001a14: 080031ab .word 0x080031ab 8001a18: 08004004 .word 0x08004004 8001a1c: 200004f8 .word 0x200004f8 8001a20: 200004fc .word 0x200004fc 8001a24: 080031bd .word 0x080031bd 8001a28: 08004000 .word 0x08004000 08001a2c : } #endif // PYJ.2019.03.27_END -- } uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001a2c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint16_t Firmdata = 0; uint8_t ret = 0; for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001a30: 2400 movs r4, #0 uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001a32: 4607 mov r7, r0 uint8_t ret = 0; 8001a34: 4626 mov r6, r4 Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001a36: 4d10 ldr r5, [pc, #64] ; (8001a78 ) printf("HAL NOT OK \n"); 8001a38: f8df 8040 ldr.w r8, [pc, #64] ; 8001a7c for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001a3c: 78bb ldrb r3, [r7, #2] 8001a3e: 3b02 subs r3, #2 8001a40: 429c cmp r4, r3 8001a42: db02 blt.n 8001a4a Address += 2; //if(!(i%FirmwareUpdateDelay)) // HAL_Delay(1); } return ret; } 8001a44: 4630 mov r0, r6 8001a46: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); 8001a4a: 193b adds r3, r7, r4 8001a4c: 78da ldrb r2, [r3, #3] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001a4e: 791b ldrb r3, [r3, #4] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001a50: 6829 ldr r1, [r5, #0] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001a52: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001a56: b292 uxth r2, r2 8001a58: 2300 movs r3, #0 8001a5a: 2001 movs r0, #1 8001a5c: f7fe fed6 bl 800080c 8001a60: b118 cbz r0, 8001a6a printf("HAL NOT OK \n"); 8001a62: 4640 mov r0, r8 8001a64: f000 fbba bl 80021dc ret = 1; 8001a68: 2601 movs r6, #1 Address += 2; 8001a6a: 682b ldr r3, [r5, #0] for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001a6c: 3402 adds r4, #2 Address += 2; 8001a6e: 3302 adds r3, #2 8001a70: 602b str r3, [r5, #0] for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001a72: b2e4 uxtb r4, r4 8001a74: e7e2 b.n 8001a3c 8001a76: bf00 nop 8001a78: 20000014 .word 0x20000014 8001a7c: 08003190 .word 0x08003190 08001a80 : /*Variable used for Erase procedure*/ static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; /* Fill EraseInit structure*/ EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001a80: 2300 movs r3, #0 { 8001a82: b573 push {r0, r1, r4, r5, r6, lr} EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001a84: 4d16 ldr r5, [pc, #88] ; (8001ae0 ) EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 8001a86: 4c17 ldr r4, [pc, #92] ; (8001ae4 ) EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001a88: 602b str r3, [r5, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001a8a: 4b17 ldr r3, [pc, #92] ; (8001ae8 ) { 8001a8c: 4606 mov r6, r0 EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001a8e: 60ab str r3, [r5, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8001a90: 231f movs r3, #31 8001a92: 60eb str r3, [r5, #12] __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 8001a94: 69e3 ldr r3, [r4, #28] 8001a96: f023 0310 bic.w r3, r3, #16 8001a9a: 61e3 str r3, [r4, #28] HAL_FLASH_Unlock(); // lock ??�? 8001a9c: f7fe fe70 bl 8000780 if(flashinit == 0){ 8001aa0: 4b12 ldr r3, [pc, #72] ; (8001aec ) 8001aa2: 781a ldrb r2, [r3, #0] 8001aa4: b94a cbnz r2, 8001aba flashinit= 1; 8001aa6: 2201 movs r2, #1 //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001aa8: 4911 ldr r1, [pc, #68] ; (8001af0 ) 8001aaa: 4628 mov r0, r5 flashinit= 1; 8001aac: 701a strb r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001aae: f7fe ff17 bl 80008e0 8001ab2: b110 cbz r0, 8001aba printf("Erase Failed \r\n"); 8001ab4: 480f ldr r0, [pc, #60] ; (8001af4 ) 8001ab6: f000 fb91 bl 80021dc } } // FLASH_If_Erase(); ret = Flash_RGB_Data_Write(&data[bluecell_stx]); 8001aba: 4630 mov r0, r6 8001abc: f7ff ffb6 bl 8001a2c 8001ac0: 4605 mov r5, r0 HAL_FLASH_Lock(); // lock ?��그기 8001ac2: f7fe fe6f bl 80007a4 __HAL_RCC_TIM6_CLK_ENABLE(); // 매인???��머�?? ?��?��?��?��?��?�� return ret; } 8001ac6: 4628 mov r0, r5 __HAL_RCC_TIM6_CLK_ENABLE(); // 매인???��머�?? ?��?��?��?��?��?�� 8001ac8: 69e3 ldr r3, [r4, #28] 8001aca: f043 0310 orr.w r3, r3, #16 8001ace: 61e3 str r3, [r4, #28] 8001ad0: 69e3 ldr r3, [r4, #28] 8001ad2: f003 0310 and.w r3, r3, #16 8001ad6: 9301 str r3, [sp, #4] 8001ad8: 9b01 ldr r3, [sp, #4] } 8001ada: b002 add sp, #8 8001adc: bd70 pop {r4, r5, r6, pc} 8001ade: bf00 nop 8001ae0: 2000009c .word 0x2000009c 8001ae4: 40021000 .word 0x40021000 8001ae8: 08004000 .word 0x08004000 8001aec: 200000b0 .word 0x200000b0 8001af0: 200000ac .word 0x200000ac 8001af4: 0800319c .word 0x0800319c 08001af8 : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8001af8: 6802 ldr r2, [r0, #0] 8001afa: 4b08 ldr r3, [pc, #32] ; (8001b1c ) 8001afc: 429a cmp r2, r3 8001afe: d10b bne.n 8001b18 UartTimerCnt++; 8001b00: 4a07 ldr r2, [pc, #28] ; (8001b20 ) 8001b02: 6813 ldr r3, [r2, #0] 8001b04: 3301 adds r3, #1 8001b06: 6013 str r3, [r2, #0] LedTimerCnt++; 8001b08: 4a06 ldr r2, [pc, #24] ; (8001b24 ) 8001b0a: 6813 ldr r3, [r2, #0] 8001b0c: 3301 adds r3, #1 8001b0e: 6013 str r3, [r2, #0] FirmwareTimerCnt++; 8001b10: 4a05 ldr r2, [pc, #20] ; (8001b28 ) 8001b12: 6813 ldr r3, [r2, #0] 8001b14: 3301 adds r3, #1 8001b16: 6013 str r3, [r2, #0] 8001b18: 4770 bx lr 8001b1a: bf00 nop 8001b1c: 40001000 .word 0x40001000 8001b20: 200000bc .word 0x200000bc 8001b24: 200000b8 .word 0x200000b8 8001b28: 200000b4 .word 0x200000b4 08001b2c <_write>: } } int _write (int file, uint8_t *ptr, uint16_t len) { 8001b2c: b510 push {r4, lr} 8001b2e: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8001b30: 230a movs r3, #10 8001b32: 4802 ldr r0, [pc, #8] ; (8001b3c <_write+0x10>) 8001b34: f7ff fc8c bl 8001450 return len; } 8001b38: 4620 mov r0, r4 8001b3a: bd10 pop {r4, pc} 8001b3c: 20000588 .word 0x20000588 08001b40 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001b40: b510 push {r4, lr} 8001b42: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001b44: 2228 movs r2, #40 ; 0x28 8001b46: 2100 movs r1, #0 8001b48: a806 add r0, sp, #24 8001b4a: f000 facb bl 80020e4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001b4e: 2214 movs r2, #20 8001b50: 2100 movs r1, #0 8001b52: a801 add r0, sp, #4 8001b54: f000 fac6 bl 80020e4 /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001b58: 2301 movs r3, #1 8001b5a: 930a str r3, [sp, #40] ; 0x28 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001b5c: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001b5e: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001b60: 930b str r3, [sp, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; 8001b62: f44f 1360 mov.w r3, #3670016 ; 0x380000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001b66: a806 add r0, sp, #24 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001b68: 9406 str r4, [sp, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001b6a: 940d str r4, [sp, #52] ; 0x34 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; 8001b6c: 930f str r3, [sp, #60] ; 0x3c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001b6e: f7fe fffd bl 8000b6c 8001b72: b100 cbz r0, 8001b76 8001b74: e7fe b.n 8001b74 { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001b76: 230f movs r3, #15 8001b78: 9301 str r3, [sp, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001b7a: f44f 6380 mov.w r3, #1024 ; 0x400 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001b7e: 9003 str r0, [sp, #12] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001b80: 9005 str r0, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001b82: 4621 mov r1, r4 8001b84: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001b86: 9402 str r4, [sp, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001b88: 9304 str r3, [sp, #16] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001b8a: f7ff f9c9 bl 8000f20 8001b8e: b100 cbz r0, 8001b92 8001b90: e7fe b.n 8001b90 { Error_Handler(); } } 8001b92: b010 add sp, #64 ; 0x40 8001b94: bd10 pop {r4, pc} ... 08001b98
: { 8001b98: b580 push {r7, lr} 8001b9a: b088 sub sp, #32 HAL_Init(); 8001b9c: f7fe fb72 bl 8000284 SystemClock_Config(); 8001ba0: f7ff ffce bl 8001b40 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001ba4: 2210 movs r2, #16 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8001ba6: 4c58 ldr r4, [pc, #352] ; (8001d08 ) GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001ba8: 2100 movs r1, #0 8001baa: eb0d 0002 add.w r0, sp, r2 8001bae: f000 fa99 bl 80020e4 __HAL_RCC_GPIOC_CLK_ENABLE(); 8001bb2: 69a3 ldr r3, [r4, #24] __HAL_RCC_GPIOA_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001bb4: 2200 movs r2, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8001bb6: f043 0310 orr.w r3, r3, #16 8001bba: 61a3 str r3, [r4, #24] 8001bbc: 69a3 ldr r3, [r4, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001bbe: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOC_CLK_ENABLE(); 8001bc2: f003 0310 and.w r3, r3, #16 8001bc6: 9302 str r3, [sp, #8] 8001bc8: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001bca: 69a3 ldr r3, [r4, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001bcc: 484f ldr r0, [pc, #316] ; (8001d0c ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8001bce: f043 0304 orr.w r3, r3, #4 8001bd2: 61a3 str r3, [r4, #24] 8001bd4: 69a3 ldr r3, [r4, #24] /*Configure GPIO pin : BOOT_LED_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8001bd6: 2600 movs r6, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001bd8: f003 0304 and.w r3, r3, #4 8001bdc: 9303 str r3, [sp, #12] 8001bde: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001be0: f7fe ffb8 bl 8000b54 GPIO_InitStruct.Pin = BOOT_LED_Pin; 8001be4: f44f 4300 mov.w r3, #32768 ; 0x8000 8001be8: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001bea: 2301 movs r3, #1 8001bec: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001bee: 2302 movs r3, #2 HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8001bf0: 4846 ldr r0, [pc, #280] ; (8001d0c ) 8001bf2: a904 add r1, sp, #16 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001bf4: 9307 str r3, [sp, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001bf6: 9606 str r6, [sp, #24] HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8001bf8: f7fe fec0 bl 800097c __HAL_RCC_DMA1_CLK_ENABLE(); 8001bfc: 6963 ldr r3, [r4, #20] htim6.Instance = TIM6; 8001bfe: 4d44 ldr r5, [pc, #272] ; (8001d10 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001c00: f043 0301 orr.w r3, r3, #1 8001c04: 6163 str r3, [r4, #20] 8001c06: 6963 ldr r3, [r4, #20] htim6.Init.Prescaler = 6400-1; 8001c08: 4842 ldr r0, [pc, #264] ; (8001d14 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001c0a: f003 0301 and.w r3, r3, #1 8001c0e: 9301 str r3, [sp, #4] 8001c10: 9b01 ldr r3, [sp, #4] htim6.Init.Prescaler = 6400-1; 8001c12: f641 03ff movw r3, #6399 ; 0x18ff 8001c16: e885 0009 stmia.w r5, {r0, r3} htim6.Init.Period = 10-1; 8001c1a: 2309 movs r3, #9 if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001c1c: 4628 mov r0, r5 TIM_MasterConfigTypeDef sMasterConfig = {0}; 8001c1e: 9604 str r6, [sp, #16] 8001c20: 9605 str r6, [sp, #20] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8001c22: 60ae str r6, [r5, #8] htim6.Init.Period = 10-1; 8001c24: 60eb str r3, [r5, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001c26: 61ae str r6, [r5, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001c28: f7ff fb3a bl 80012a0 8001c2c: b100 cbz r0, 8001c30 8001c2e: e7fe b.n 8001c2e sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001c30: 9004 str r0, [sp, #16] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001c32: 9005 str r0, [sp, #20] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001c34: a904 add r1, sp, #16 8001c36: 4628 mov r0, r5 8001c38: f7ff fb4c bl 80012d4 8001c3c: b100 cbz r0, 8001c40 8001c3e: e7fe b.n 8001c3e huart1.Init.BaudRate = 115200; 8001c40: f44f 32e1 mov.w r2, #115200 ; 0x1c200 huart1.Instance = USART1; 8001c44: 4b34 ldr r3, [pc, #208] ; (8001d18 ) huart1.Init.BaudRate = 115200; 8001c46: 4935 ldr r1, [pc, #212] ; (8001d1c ) huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001c48: 6098 str r0, [r3, #8] huart1.Init.BaudRate = 115200; 8001c4a: e883 0006 stmia.w r3, {r1, r2} huart1.Init.Mode = UART_MODE_TX_RX; 8001c4e: 220c movs r2, #12 huart1.Init.StopBits = UART_STOPBITS_1; 8001c50: 60d8 str r0, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8001c52: 6118 str r0, [r3, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001c54: 6198 str r0, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001c56: 61d8 str r0, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8001c58: 4618 mov r0, r3 huart1.Init.Mode = UART_MODE_TX_RX; 8001c5a: 615a str r2, [r3, #20] if (HAL_UART_Init(&huart1) != HAL_OK) 8001c5c: f7ff fbca bl 80013f4 8001c60: 4604 mov r4, r0 8001c62: b100 cbz r0, 8001c66 8001c64: e7fe b.n 8001c64 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8001c66: 4602 mov r2, r0 8001c68: 4601 mov r1, r0 8001c6a: 2036 movs r0, #54 ; 0x36 8001c6c: f7fe fb40 bl 80002f0 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001c70: 2036 movs r0, #54 ; 0x36 8001c72: f7fe fb71 bl 8000358 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8001c76: 4622 mov r2, r4 8001c78: 4621 mov r1, r4 8001c7a: 2025 movs r0, #37 ; 0x25 8001c7c: f7fe fb38 bl 80002f0 HAL_NVIC_EnableIRQ(USART1_IRQn); 8001c80: 2025 movs r0, #37 ; 0x25 8001c82: f7fe fb69 bl 8000358 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8001c86: 4622 mov r2, r4 8001c88: 4621 mov r1, r4 8001c8a: 200f movs r0, #15 8001c8c: f7fe fb30 bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 8001c90: 200f movs r0, #15 8001c92: f7fe fb61 bl 8000358 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 8001c96: 4622 mov r2, r4 8001c98: 4621 mov r1, r4 8001c9a: 200e movs r0, #14 8001c9c: f7fe fb28 bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 8001ca0: 200e movs r0, #14 8001ca2: f7fe fb59 bl 8000358 HAL_TIM_Base_Start_IT(&htim6); 8001ca6: 4628 mov r0, r5 8001ca8: f7ff f9f8 bl 800109c setbuf(stdout, NULL); 8001cac: 4b1c ldr r3, [pc, #112] ; (8001d20 ) 8001cae: 4621 mov r1, r4 8001cb0: 681b ldr r3, [r3, #0] if(LedTimerCnt > 100){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin); LedTimerCnt = 0;} 8001cb2: 4e16 ldr r6, [pc, #88] ; (8001d0c ) setbuf(stdout, NULL); 8001cb4: 6898 ldr r0, [r3, #8] 8001cb6: f000 fa99 bl 80021ec Firmware_BootStart_Signal(); 8001cba: f7ff fdf5 bl 80018a8 InitUartQueue(&TerminalQueue); 8001cbe: 4819 ldr r0, [pc, #100] ; (8001d24 ) 8001cc0: f000 f958 bl 8001f74 while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8001cc4: 4d18 ldr r5, [pc, #96] ; (8001d28 ) if(LedTimerCnt > 100){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin); LedTimerCnt = 0;} 8001cc6: 4c19 ldr r4, [pc, #100] ; (8001d2c ) 8001cc8: 6823 ldr r3, [r4, #0] 8001cca: 2b64 cmp r3, #100 ; 0x64 8001ccc: d906 bls.n 8001cdc 8001cce: f44f 4100 mov.w r1, #32768 ; 0x8000 8001cd2: 4630 mov r0, r6 8001cd4: f7fe ff43 bl 8000b5e 8001cd8: 2300 movs r3, #0 8001cda: 6023 str r3, [r4, #0] while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8001cdc: 4c11 ldr r4, [pc, #68] ; (8001d24 ) 8001cde: 4f0e ldr r7, [pc, #56] ; (8001d18 ) 8001ce0: 68a3 ldr r3, [r4, #8] 8001ce2: 2b00 cmp r3, #0 8001ce4: dd02 ble.n 8001cec 8001ce6: 682b ldr r3, [r5, #0] 8001ce8: 2b1e cmp r3, #30 8001cea: d803 bhi.n 8001cf4 while(FirmwareTimerCnt > 3000) Jump_App(); 8001cec: 4f10 ldr r7, [pc, #64] ; (8001d30 ) 8001cee: f640 34b8 movw r4, #3000 ; 0xbb8 8001cf2: e005 b.n 8001d00 while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8001cf4: 4638 mov r0, r7 8001cf6: f000 f94b bl 8001f90 8001cfa: e7f1 b.n 8001ce0 while(FirmwareTimerCnt > 3000) Jump_App(); 8001cfc: f7ff fe6e bl 80019dc 8001d00: 683b ldr r3, [r7, #0] 8001d02: 42a3 cmp r3, r4 8001d04: d8fa bhi.n 8001cfc 8001d06: e7de b.n 8001cc6 8001d08: 40021000 .word 0x40021000 8001d0c: 40011000 .word 0x40011000 8001d10: 200005c8 .word 0x200005c8 8001d14: 40001000 .word 0x40001000 8001d18: 20000588 .word 0x20000588 8001d1c: 40013800 .word 0x40013800 8001d20: 2000001c .word 0x2000001c 8001d24: 20000608 .word 0x20000608 8001d28: 200000bc .word 0x200000bc 8001d2c: 200000b8 .word 0x200000b8 8001d30: 200000b4 .word 0x200000b4 08001d34 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001d34: e7fe b.n 8001d34 ... 08001d38 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001d38: 4b0e ldr r3, [pc, #56] ; (8001d74 ) { 8001d3a: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8001d3c: 699a ldr r2, [r3, #24] 8001d3e: f042 0201 orr.w r2, r2, #1 8001d42: 619a str r2, [r3, #24] 8001d44: 699a ldr r2, [r3, #24] 8001d46: f002 0201 and.w r2, r2, #1 8001d4a: 9200 str r2, [sp, #0] 8001d4c: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8001d4e: 69da ldr r2, [r3, #28] 8001d50: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8001d54: 61da str r2, [r3, #28] 8001d56: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001d58: 4a07 ldr r2, [pc, #28] ; (8001d78 ) __HAL_RCC_PWR_CLK_ENABLE(); 8001d5a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001d5e: 9301 str r3, [sp, #4] 8001d60: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001d62: 6853 ldr r3, [r2, #4] 8001d64: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8001d68: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8001d6c: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001d6e: b002 add sp, #8 8001d70: 4770 bx lr 8001d72: bf00 nop 8001d74: 40021000 .word 0x40021000 8001d78: 40010000 .word 0x40010000 08001d7c : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8001d7c: 6802 ldr r2, [r0, #0] 8001d7e: 4b08 ldr r3, [pc, #32] ; (8001da0 ) { 8001d80: b082 sub sp, #8 if(htim_base->Instance==TIM6) 8001d82: 429a cmp r2, r3 8001d84: d10a bne.n 8001d9c { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8001d86: f503 3300 add.w r3, r3, #131072 ; 0x20000 8001d8a: 69da ldr r2, [r3, #28] 8001d8c: f042 0210 orr.w r2, r2, #16 8001d90: 61da str r2, [r3, #28] 8001d92: 69db ldr r3, [r3, #28] 8001d94: f003 0310 and.w r3, r3, #16 8001d98: 9301 str r3, [sp, #4] 8001d9a: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8001d9c: b002 add sp, #8 8001d9e: 4770 bx lr 8001da0: 40001000 .word 0x40001000 08001da4 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001da4: b570 push {r4, r5, r6, lr} 8001da6: 4606 mov r6, r0 8001da8: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001daa: 2210 movs r2, #16 8001dac: 2100 movs r1, #0 8001dae: a802 add r0, sp, #8 8001db0: f000 f998 bl 80020e4 if(huart->Instance==USART1) 8001db4: 6832 ldr r2, [r6, #0] 8001db6: 4b2b ldr r3, [pc, #172] ; (8001e64 ) 8001db8: 429a cmp r2, r3 8001dba: d151 bne.n 8001e60 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8001dbc: f503 4358 add.w r3, r3, #55296 ; 0xd800 8001dc0: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001dc2: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8001dc4: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8001dc8: 619a str r2, [r3, #24] 8001dca: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001dcc: 4826 ldr r0, [pc, #152] ; (8001e68 ) __HAL_RCC_USART1_CLK_ENABLE(); 8001dce: f402 4280 and.w r2, r2, #16384 ; 0x4000 8001dd2: 9200 str r2, [sp, #0] 8001dd4: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001dd6: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001dd8: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001dda: f042 0204 orr.w r2, r2, #4 8001dde: 619a str r2, [r3, #24] 8001de0: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 8001de2: 4c22 ldr r4, [pc, #136] ; (8001e6c ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8001de4: f003 0304 and.w r3, r3, #4 8001de8: 9301 str r3, [sp, #4] 8001dea: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8001dec: f44f 7300 mov.w r3, #512 ; 0x200 8001df0: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001df2: 2302 movs r3, #2 8001df4: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001df6: 2303 movs r3, #3 8001df8: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001dfa: f7fe fdbf bl 800097c GPIO_InitStruct.Pin = GPIO_PIN_10; 8001dfe: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001e02: 4819 ldr r0, [pc, #100] ; (8001e68 ) 8001e04: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8001e06: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001e08: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001e0a: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001e0c: f7fe fdb6 bl 800097c hdma_usart1_rx.Instance = DMA1_Channel5; 8001e10: 4b17 ldr r3, [pc, #92] ; (8001e70 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8001e12: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8001e14: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8001e18: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 8001e1a: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8001e1c: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8001e1e: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8001e20: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 8001e22: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 8001e24: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8001e26: f7fe fabb bl 80003a0 8001e2a: b108 cbz r0, 8001e30 { Error_Handler(); 8001e2c: f7ff ff82 bl 8001d34 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8001e30: f04f 0c10 mov.w ip, #16 8001e34: 4b0f ldr r3, [pc, #60] ; (8001e74 ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 8001e36: 6374 str r4, [r6, #52] ; 0x34 8001e38: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 8001e3a: 4c0f ldr r4, [pc, #60] ; (8001e78 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8001e3c: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8001e3e: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8001e42: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8001e44: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8001e46: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8001e48: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8001e4a: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8001e4c: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 8001e4e: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8001e50: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8001e52: f7fe faa5 bl 80003a0 8001e56: b108 cbz r0, 8001e5c { Error_Handler(); 8001e58: f7ff ff6c bl 8001d34 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 8001e5c: 6334 str r4, [r6, #48] ; 0x30 8001e5e: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8001e60: b006 add sp, #24 8001e62: bd70 pop {r4, r5, r6, pc} 8001e64: 40013800 .word 0x40013800 8001e68: 40010800 .word 0x40010800 8001e6c: 20000544 .word 0x20000544 8001e70: 40020058 .word 0x40020058 8001e74: 40020044 .word 0x40020044 8001e78: 20000500 .word 0x20000500 08001e7c : 8001e7c: 4770 bx lr 08001e7e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001e7e: e7fe b.n 8001e7e 08001e80 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001e80: e7fe b.n 8001e80 08001e82 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8001e82: e7fe b.n 8001e82 08001e84 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001e84: e7fe b.n 8001e84 08001e86 : 8001e86: 4770 bx lr 08001e88 : 8001e88: 4770 bx lr 08001e8a : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8001e8a: 4770 bx lr 08001e8c : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001e8c: f7fe ba0c b.w 80002a8 08001e90 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8001e90: 4801 ldr r0, [pc, #4] ; (8001e98 ) 8001e92: f7fe bb71 b.w 8000578 8001e96: bf00 nop 8001e98: 20000500 .word 0x20000500 08001e9c : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8001e9c: 4801 ldr r0, [pc, #4] ; (8001ea4 ) 8001e9e: f7fe bb6b b.w 8000578 8001ea2: bf00 nop 8001ea4: 20000544 .word 0x20000544 08001ea8 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8001ea8: 4801 ldr r0, [pc, #4] ; (8001eb0 ) 8001eaa: f7ff bc55 b.w 8001758 8001eae: bf00 nop 8001eb0: 20000588 .word 0x20000588 08001eb4 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8001eb4: 4801 ldr r0, [pc, #4] ; (8001ebc ) 8001eb6: f7ff b905 b.w 80010c4 8001eba: bf00 nop 8001ebc: 200005c8 .word 0x200005c8 08001ec0 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8001ec0: b570 push {r4, r5, r6, lr} 8001ec2: 460e mov r6, r1 8001ec4: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8001ec6: 460c mov r4, r1 8001ec8: 1ba3 subs r3, r4, r6 8001eca: 429d cmp r5, r3 8001ecc: dc01 bgt.n 8001ed2 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8001ece: 4628 mov r0, r5 8001ed0: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 8001ed2: f3af 8000 nop.w 8001ed6: f804 0b01 strb.w r0, [r4], #1 8001eda: e7f5 b.n 8001ec8 <_read+0x8> 08001edc <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8001edc: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8001ede: 4b0a ldr r3, [pc, #40] ; (8001f08 <_sbrk+0x2c>) { 8001ee0: 4602 mov r2, r0 if (heap_end == 0) 8001ee2: 6819 ldr r1, [r3, #0] 8001ee4: b909 cbnz r1, 8001eea <_sbrk+0xe> heap_end = &end; 8001ee6: 4909 ldr r1, [pc, #36] ; (8001f0c <_sbrk+0x30>) 8001ee8: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8001eea: 4669 mov r1, sp prev_heap_end = heap_end; 8001eec: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8001eee: 4402 add r2, r0 8001ef0: 428a cmp r2, r1 8001ef2: d906 bls.n 8001f02 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8001ef4: f000 f8cc bl 8002090 <__errno> 8001ef8: 230c movs r3, #12 8001efa: 6003 str r3, [r0, #0] return (caddr_t) -1; 8001efc: f04f 30ff mov.w r0, #4294967295 8001f00: bd08 pop {r3, pc} } heap_end += incr; 8001f02: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8001f04: bd08 pop {r3, pc} 8001f06: bf00 nop 8001f08: 200000c0 .word 0x200000c0 8001f0c: 20000a18 .word 0x20000a18 08001f10 <_close>: int _close(int file) { return -1; } 8001f10: f04f 30ff mov.w r0, #4294967295 8001f14: 4770 bx lr 08001f16 <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 8001f16: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 8001f1a: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8001f1c: 604b str r3, [r1, #4] } 8001f1e: 4770 bx lr 08001f20 <_isatty>: int _isatty(int file) { return 1; } 8001f20: 2001 movs r0, #1 8001f22: 4770 bx lr 08001f24 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 8001f24: 2000 movs r0, #0 8001f26: 4770 bx lr 08001f28 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8001f28: 4b0f ldr r3, [pc, #60] ; (8001f68 ) 8001f2a: 681a ldr r2, [r3, #0] 8001f2c: f042 0201 orr.w r2, r2, #1 8001f30: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8001f32: 6859 ldr r1, [r3, #4] 8001f34: 4a0d ldr r2, [pc, #52] ; (8001f6c ) 8001f36: 400a ands r2, r1 8001f38: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8001f3a: 681a ldr r2, [r3, #0] 8001f3c: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8001f40: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8001f44: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8001f46: 681a ldr r2, [r3, #0] 8001f48: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8001f4c: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8001f4e: 685a ldr r2, [r3, #4] 8001f50: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8001f54: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8001f56: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8001f5a: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8001f5c: f04f 6200 mov.w r2, #134217728 ; 0x8000000 8001f60: 4b03 ldr r3, [pc, #12] ; (8001f70 ) 8001f62: 609a str r2, [r3, #8] 8001f64: 4770 bx lr 8001f66: bf00 nop 8001f68: 40021000 .word 0x40021000 8001f6c: f8ff0000 .word 0xf8ff0000 8001f70: e000ed00 .word 0xe000ed00 08001f74 : UARTQUEUE TerminalQueue; void InitUartQueue(pUARTQUEUE pQueue) { pQueue->data = pQueue->head = pQueue->tail = 0; 8001f74: 2300 movs r3, #0 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8001f76: 2201 movs r2, #1 pQueue->data = pQueue->head = pQueue->tail = 0; 8001f78: 6043 str r3, [r0, #4] 8001f7a: 6003 str r3, [r0, #0] 8001f7c: 6083 str r3, [r0, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8001f7e: 4902 ldr r1, [pc, #8] ; (8001f88 ) 8001f80: 4802 ldr r0, [pc, #8] ; (8001f8c ) 8001f82: f7ff bafb b.w 800157c 8001f86: bf00 nop 8001f88: 20000614 .word 0x20000614 8001f8c: 20000588 .word 0x20000588 08001f90 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8001f90: 4a11 ldr r2, [pc, #68] ; (8001fd8 ) { 8001f92: b538 push {r3, r4, r5, lr} update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8001f94: 6814 ldr r4, [r2, #0] 8001f96: 1c63 adds r3, r4, #1 8001f98: 6013 str r3, [r2, #0] 8001f9a: 4b10 ldr r3, [pc, #64] ; (8001fdc ) 8001f9c: 6859 ldr r1, [r3, #4] 8001f9e: f103 000c add.w r0, r3, #12 8001fa2: 5c0d ldrb r5, [r1, r0] pQueue->tail++; 8001fa4: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8001fa6: f5b1 6f80 cmp.w r1, #1024 ; 0x400 8001faa: bfa8 it ge 8001fac: 2100 movge r1, #0 update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8001fae: 480c ldr r0, [pc, #48] ; (8001fe0 ) if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8001fb0: 6059 str r1, [r3, #4] update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8001fb2: 5505 strb r5, [r0, r4] pQueue->data--; 8001fb4: 689c ldr r4, [r3, #8] 8001fb6: 4605 mov r5, r0 8001fb8: 3c01 subs r4, #1 8001fba: 609c str r4, [r3, #8] if(pQueue->data == 0){ 8001fbc: b95c cbnz r4, 8001fd6 #if 0 // PYJ.2019.07.15_BEGIN -- #endif // PYJ.2019.07.15_END -- cnt = 0; FirmwareUpdateStart(&update_data_buf[0]); 8001fbe: 4808 ldr r0, [pc, #32] ; (8001fe0 ) cnt = 0; 8001fc0: 6014 str r4, [r2, #0] FirmwareUpdateStart(&update_data_buf[0]); 8001fc2: f7ff fc81 bl 80018c8 for(int i = 0; i < 1024; i++) update_data_buf[i] = 0; 8001fc6: 4623 mov r3, r4 8001fc8: 552b strb r3, [r5, r4] for(int i = 0; i < 1024; i++) 8001fca: 3401 adds r4, #1 8001fcc: f5b4 6f80 cmp.w r4, #1024 ; 0x400 8001fd0: d1fa bne.n 8001fc8 FirmwareTimerCnt = 0; 8001fd2: 4a04 ldr r2, [pc, #16] ; (8001fe4 ) 8001fd4: 6013 str r3, [r2, #0] 8001fd6: bd38 pop {r3, r4, r5, pc} 8001fd8: 200000c4 .word 0x200000c4 8001fdc: 20000608 .word 0x20000608 8001fe0: 200000c8 .word 0x200000c8 8001fe4: 200000b4 .word 0x200000b4 08001fe8 : UartTimerCnt = 0; 8001fe8: 2300 movs r3, #0 { 8001fea: b510 push {r4, lr} UartTimerCnt = 0; 8001fec: 4a0d ldr r2, [pc, #52] ; (8002024 ) pQueue->head++; 8001fee: 4c0e ldr r4, [pc, #56] ; (8002028 ) UartTimerCnt = 0; 8001ff0: 6013 str r3, [r2, #0] pQueue->head++; 8001ff2: 6822 ldr r2, [r4, #0] 8001ff4: 3201 adds r2, #1 8001ff6: f5b2 6f80 cmp.w r2, #1024 ; 0x400 8001ffa: bfb8 it lt 8001ffc: 4613 movlt r3, r2 8001ffe: 6023 str r3, [r4, #0] pQueue->data++; 8002000: 68a3 ldr r3, [r4, #8] 8002002: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8002004: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 8002008: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 800200a: db01 blt.n 8002010 GetDataFromUartQueue(huart); 800200c: f7ff ffc0 bl 8001f90 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8002010: 6823 ldr r3, [r4, #0] 8002012: 4906 ldr r1, [pc, #24] ; (800202c ) 8002014: 2201 movs r2, #1 } 8002016: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800201a: 4419 add r1, r3 800201c: 4804 ldr r0, [pc, #16] ; (8002030 ) 800201e: f7ff baad b.w 800157c 8002022: bf00 nop 8002024: 200000bc .word 0x200000bc 8002028: 20000608 .word 0x20000608 800202c: 20000614 .word 0x20000614 8002030: 20000588 .word 0x20000588 08002034 : // HAL_Delay(1); } } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit_DMA(&huart1, data,size); 8002034: 460a mov r2, r1 8002036: 4601 mov r1, r0 8002038: 4801 ldr r0, [pc, #4] ; (8002040 ) 800203a: f7ff ba65 b.w 8001508 800203e: bf00 nop 8002040: 20000588 .word 0x20000588 08002044 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8002044: 2100 movs r1, #0 b LoopCopyDataInit 8002046: e003 b.n 8002050 08002048 : CopyDataInit: ldr r3, =_sidata 8002048: 4b0b ldr r3, [pc, #44] ; (8002078 ) ldr r3, [r3, r1] 800204a: 585b ldr r3, [r3, r1] str r3, [r0, r1] 800204c: 5043 str r3, [r0, r1] adds r1, r1, #4 800204e: 3104 adds r1, #4 08002050 : LoopCopyDataInit: ldr r0, =_sdata 8002050: 480a ldr r0, [pc, #40] ; (800207c ) ldr r3, =_edata 8002052: 4b0b ldr r3, [pc, #44] ; (8002080 ) adds r2, r0, r1 8002054: 1842 adds r2, r0, r1 cmp r2, r3 8002056: 429a cmp r2, r3 bcc CopyDataInit 8002058: d3f6 bcc.n 8002048 ldr r2, =_sbss 800205a: 4a0a ldr r2, [pc, #40] ; (8002084 ) b LoopFillZerobss 800205c: e002 b.n 8002064 0800205e : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 800205e: 2300 movs r3, #0 str r3, [r2], #4 8002060: f842 3b04 str.w r3, [r2], #4 08002064 : LoopFillZerobss: ldr r3, = _ebss 8002064: 4b08 ldr r3, [pc, #32] ; (8002088 ) cmp r2, r3 8002066: 429a cmp r2, r3 bcc FillZerobss 8002068: d3f9 bcc.n 800205e /* Call the clock system intitialization function.*/ bl SystemInit 800206a: f7ff ff5d bl 8001f28 /* Call static constructors */ bl __libc_init_array 800206e: f000 f815 bl 800209c <__libc_init_array> /* Call the application's entry point.*/ bl main 8002072: f7ff fd91 bl 8001b98
bx lr 8002076: 4770 bx lr ldr r3, =_sidata 8002078: 0800327c .word 0x0800327c ldr r0, =_sdata 800207c: 20000000 .word 0x20000000 ldr r3, =_edata 8002080: 20000080 .word 0x20000080 ldr r2, =_sbss 8002084: 20000080 .word 0x20000080 ldr r3, = _ebss 8002088: 20000a18 .word 0x20000a18 0800208c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800208c: e7fe b.n 800208c ... 08002090 <__errno>: 8002090: 4b01 ldr r3, [pc, #4] ; (8002098 <__errno+0x8>) 8002092: 6818 ldr r0, [r3, #0] 8002094: 4770 bx lr 8002096: bf00 nop 8002098: 2000001c .word 0x2000001c 0800209c <__libc_init_array>: 800209c: b570 push {r4, r5, r6, lr} 800209e: 2500 movs r5, #0 80020a0: 4e0c ldr r6, [pc, #48] ; (80020d4 <__libc_init_array+0x38>) 80020a2: 4c0d ldr r4, [pc, #52] ; (80020d8 <__libc_init_array+0x3c>) 80020a4: 1ba4 subs r4, r4, r6 80020a6: 10a4 asrs r4, r4, #2 80020a8: 42a5 cmp r5, r4 80020aa: d109 bne.n 80020c0 <__libc_init_array+0x24> 80020ac: f001 f848 bl 8003140 <_init> 80020b0: 2500 movs r5, #0 80020b2: 4e0a ldr r6, [pc, #40] ; (80020dc <__libc_init_array+0x40>) 80020b4: 4c0a ldr r4, [pc, #40] ; (80020e0 <__libc_init_array+0x44>) 80020b6: 1ba4 subs r4, r4, r6 80020b8: 10a4 asrs r4, r4, #2 80020ba: 42a5 cmp r5, r4 80020bc: d105 bne.n 80020ca <__libc_init_array+0x2e> 80020be: bd70 pop {r4, r5, r6, pc} 80020c0: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80020c4: 4798 blx r3 80020c6: 3501 adds r5, #1 80020c8: e7ee b.n 80020a8 <__libc_init_array+0xc> 80020ca: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80020ce: 4798 blx r3 80020d0: 3501 adds r5, #1 80020d2: e7f2 b.n 80020ba <__libc_init_array+0x1e> 80020d4: 08003274 .word 0x08003274 80020d8: 08003274 .word 0x08003274 80020dc: 08003274 .word 0x08003274 80020e0: 08003278 .word 0x08003278 080020e4 : 80020e4: 4603 mov r3, r0 80020e6: 4402 add r2, r0 80020e8: 4293 cmp r3, r2 80020ea: d100 bne.n 80020ee 80020ec: 4770 bx lr 80020ee: f803 1b01 strb.w r1, [r3], #1 80020f2: e7f9 b.n 80020e8 080020f4 : 80020f4: b40f push {r0, r1, r2, r3} 80020f6: 4b0a ldr r3, [pc, #40] ; (8002120 ) 80020f8: b513 push {r0, r1, r4, lr} 80020fa: 681c ldr r4, [r3, #0] 80020fc: b124 cbz r4, 8002108 80020fe: 69a3 ldr r3, [r4, #24] 8002100: b913 cbnz r3, 8002108 8002102: 4620 mov r0, r4 8002104: f000 fada bl 80026bc <__sinit> 8002108: ab05 add r3, sp, #20 800210a: 9a04 ldr r2, [sp, #16] 800210c: 68a1 ldr r1, [r4, #8] 800210e: 4620 mov r0, r4 8002110: 9301 str r3, [sp, #4] 8002112: f000 fc9b bl 8002a4c <_vfiprintf_r> 8002116: b002 add sp, #8 8002118: e8bd 4010 ldmia.w sp!, {r4, lr} 800211c: b004 add sp, #16 800211e: 4770 bx lr 8002120: 2000001c .word 0x2000001c 08002124 <_puts_r>: 8002124: b570 push {r4, r5, r6, lr} 8002126: 460e mov r6, r1 8002128: 4605 mov r5, r0 800212a: b118 cbz r0, 8002134 <_puts_r+0x10> 800212c: 6983 ldr r3, [r0, #24] 800212e: b90b cbnz r3, 8002134 <_puts_r+0x10> 8002130: f000 fac4 bl 80026bc <__sinit> 8002134: 69ab ldr r3, [r5, #24] 8002136: 68ac ldr r4, [r5, #8] 8002138: b913 cbnz r3, 8002140 <_puts_r+0x1c> 800213a: 4628 mov r0, r5 800213c: f000 fabe bl 80026bc <__sinit> 8002140: 4b23 ldr r3, [pc, #140] ; (80021d0 <_puts_r+0xac>) 8002142: 429c cmp r4, r3 8002144: d117 bne.n 8002176 <_puts_r+0x52> 8002146: 686c ldr r4, [r5, #4] 8002148: 89a3 ldrh r3, [r4, #12] 800214a: 071b lsls r3, r3, #28 800214c: d51d bpl.n 800218a <_puts_r+0x66> 800214e: 6923 ldr r3, [r4, #16] 8002150: b1db cbz r3, 800218a <_puts_r+0x66> 8002152: 3e01 subs r6, #1 8002154: 68a3 ldr r3, [r4, #8] 8002156: f816 1f01 ldrb.w r1, [r6, #1]! 800215a: 3b01 subs r3, #1 800215c: 60a3 str r3, [r4, #8] 800215e: b9e9 cbnz r1, 800219c <_puts_r+0x78> 8002160: 2b00 cmp r3, #0 8002162: da2e bge.n 80021c2 <_puts_r+0x9e> 8002164: 4622 mov r2, r4 8002166: 210a movs r1, #10 8002168: 4628 mov r0, r5 800216a: f000 f8f5 bl 8002358 <__swbuf_r> 800216e: 3001 adds r0, #1 8002170: d011 beq.n 8002196 <_puts_r+0x72> 8002172: 200a movs r0, #10 8002174: bd70 pop {r4, r5, r6, pc} 8002176: 4b17 ldr r3, [pc, #92] ; (80021d4 <_puts_r+0xb0>) 8002178: 429c cmp r4, r3 800217a: d101 bne.n 8002180 <_puts_r+0x5c> 800217c: 68ac ldr r4, [r5, #8] 800217e: e7e3 b.n 8002148 <_puts_r+0x24> 8002180: 4b15 ldr r3, [pc, #84] ; (80021d8 <_puts_r+0xb4>) 8002182: 429c cmp r4, r3 8002184: bf08 it eq 8002186: 68ec ldreq r4, [r5, #12] 8002188: e7de b.n 8002148 <_puts_r+0x24> 800218a: 4621 mov r1, r4 800218c: 4628 mov r0, r5 800218e: f000 f935 bl 80023fc <__swsetup_r> 8002192: 2800 cmp r0, #0 8002194: d0dd beq.n 8002152 <_puts_r+0x2e> 8002196: f04f 30ff mov.w r0, #4294967295 800219a: bd70 pop {r4, r5, r6, pc} 800219c: 2b00 cmp r3, #0 800219e: da04 bge.n 80021aa <_puts_r+0x86> 80021a0: 69a2 ldr r2, [r4, #24] 80021a2: 4293 cmp r3, r2 80021a4: db06 blt.n 80021b4 <_puts_r+0x90> 80021a6: 290a cmp r1, #10 80021a8: d004 beq.n 80021b4 <_puts_r+0x90> 80021aa: 6823 ldr r3, [r4, #0] 80021ac: 1c5a adds r2, r3, #1 80021ae: 6022 str r2, [r4, #0] 80021b0: 7019 strb r1, [r3, #0] 80021b2: e7cf b.n 8002154 <_puts_r+0x30> 80021b4: 4622 mov r2, r4 80021b6: 4628 mov r0, r5 80021b8: f000 f8ce bl 8002358 <__swbuf_r> 80021bc: 3001 adds r0, #1 80021be: d1c9 bne.n 8002154 <_puts_r+0x30> 80021c0: e7e9 b.n 8002196 <_puts_r+0x72> 80021c2: 200a movs r0, #10 80021c4: 6823 ldr r3, [r4, #0] 80021c6: 1c5a adds r2, r3, #1 80021c8: 6022 str r2, [r4, #0] 80021ca: 7018 strb r0, [r3, #0] 80021cc: bd70 pop {r4, r5, r6, pc} 80021ce: bf00 nop 80021d0: 08003200 .word 0x08003200 80021d4: 08003220 .word 0x08003220 80021d8: 080031e0 .word 0x080031e0 080021dc : 80021dc: 4b02 ldr r3, [pc, #8] ; (80021e8 ) 80021de: 4601 mov r1, r0 80021e0: 6818 ldr r0, [r3, #0] 80021e2: f7ff bf9f b.w 8002124 <_puts_r> 80021e6: bf00 nop 80021e8: 2000001c .word 0x2000001c 080021ec : 80021ec: 2900 cmp r1, #0 80021ee: f44f 6380 mov.w r3, #1024 ; 0x400 80021f2: bf0c ite eq 80021f4: 2202 moveq r2, #2 80021f6: 2200 movne r2, #0 80021f8: f000 b800 b.w 80021fc 080021fc : 80021fc: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8002200: 461d mov r5, r3 8002202: 4b51 ldr r3, [pc, #324] ; (8002348 ) 8002204: 4604 mov r4, r0 8002206: 681e ldr r6, [r3, #0] 8002208: 460f mov r7, r1 800220a: 4690 mov r8, r2 800220c: b126 cbz r6, 8002218 800220e: 69b3 ldr r3, [r6, #24] 8002210: b913 cbnz r3, 8002218 8002212: 4630 mov r0, r6 8002214: f000 fa52 bl 80026bc <__sinit> 8002218: 4b4c ldr r3, [pc, #304] ; (800234c ) 800221a: 429c cmp r4, r3 800221c: d152 bne.n 80022c4 800221e: 6874 ldr r4, [r6, #4] 8002220: f1b8 0f02 cmp.w r8, #2 8002224: d006 beq.n 8002234 8002226: f1b8 0f01 cmp.w r8, #1 800222a: f200 8089 bhi.w 8002340 800222e: 2d00 cmp r5, #0 8002230: f2c0 8086 blt.w 8002340 8002234: 4621 mov r1, r4 8002236: 4630 mov r0, r6 8002238: f000 f9d6 bl 80025e8 <_fflush_r> 800223c: 6b61 ldr r1, [r4, #52] ; 0x34 800223e: b141 cbz r1, 8002252 8002240: f104 0344 add.w r3, r4, #68 ; 0x44 8002244: 4299 cmp r1, r3 8002246: d002 beq.n 800224e 8002248: 4630 mov r0, r6 800224a: f000 fb2d bl 80028a8 <_free_r> 800224e: 2300 movs r3, #0 8002250: 6363 str r3, [r4, #52] ; 0x34 8002252: 2300 movs r3, #0 8002254: 61a3 str r3, [r4, #24] 8002256: 6063 str r3, [r4, #4] 8002258: 89a3 ldrh r3, [r4, #12] 800225a: 061b lsls r3, r3, #24 800225c: d503 bpl.n 8002266 800225e: 6921 ldr r1, [r4, #16] 8002260: 4630 mov r0, r6 8002262: f000 fb21 bl 80028a8 <_free_r> 8002266: 89a3 ldrh r3, [r4, #12] 8002268: f1b8 0f02 cmp.w r8, #2 800226c: f423 634a bic.w r3, r3, #3232 ; 0xca0 8002270: f023 0303 bic.w r3, r3, #3 8002274: 81a3 strh r3, [r4, #12] 8002276: d05d beq.n 8002334 8002278: ab01 add r3, sp, #4 800227a: 466a mov r2, sp 800227c: 4621 mov r1, r4 800227e: 4630 mov r0, r6 8002280: f000 faa6 bl 80027d0 <__swhatbuf_r> 8002284: 89a3 ldrh r3, [r4, #12] 8002286: 4318 orrs r0, r3 8002288: 81a0 strh r0, [r4, #12] 800228a: bb2d cbnz r5, 80022d8 800228c: 9d00 ldr r5, [sp, #0] 800228e: 4628 mov r0, r5 8002290: f000 fb02 bl 8002898 8002294: 4607 mov r7, r0 8002296: 2800 cmp r0, #0 8002298: d14e bne.n 8002338 800229a: f8dd 9000 ldr.w r9, [sp] 800229e: 45a9 cmp r9, r5 80022a0: d13c bne.n 800231c 80022a2: f04f 30ff mov.w r0, #4294967295 80022a6: 89a3 ldrh r3, [r4, #12] 80022a8: f043 0302 orr.w r3, r3, #2 80022ac: 81a3 strh r3, [r4, #12] 80022ae: 2300 movs r3, #0 80022b0: 60a3 str r3, [r4, #8] 80022b2: f104 0347 add.w r3, r4, #71 ; 0x47 80022b6: 6023 str r3, [r4, #0] 80022b8: 6123 str r3, [r4, #16] 80022ba: 2301 movs r3, #1 80022bc: 6163 str r3, [r4, #20] 80022be: b003 add sp, #12 80022c0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80022c4: 4b22 ldr r3, [pc, #136] ; (8002350 ) 80022c6: 429c cmp r4, r3 80022c8: d101 bne.n 80022ce 80022ca: 68b4 ldr r4, [r6, #8] 80022cc: e7a8 b.n 8002220 80022ce: 4b21 ldr r3, [pc, #132] ; (8002354 ) 80022d0: 429c cmp r4, r3 80022d2: bf08 it eq 80022d4: 68f4 ldreq r4, [r6, #12] 80022d6: e7a3 b.n 8002220 80022d8: 2f00 cmp r7, #0 80022da: d0d8 beq.n 800228e 80022dc: 69b3 ldr r3, [r6, #24] 80022de: b913 cbnz r3, 80022e6 80022e0: 4630 mov r0, r6 80022e2: f000 f9eb bl 80026bc <__sinit> 80022e6: f1b8 0f01 cmp.w r8, #1 80022ea: bf08 it eq 80022ec: 89a3 ldrheq r3, [r4, #12] 80022ee: 6027 str r7, [r4, #0] 80022f0: bf04 itt eq 80022f2: f043 0301 orreq.w r3, r3, #1 80022f6: 81a3 strheq r3, [r4, #12] 80022f8: 89a3 ldrh r3, [r4, #12] 80022fa: 6127 str r7, [r4, #16] 80022fc: f013 0008 ands.w r0, r3, #8 8002300: 6165 str r5, [r4, #20] 8002302: d01b beq.n 800233c 8002304: f013 0001 ands.w r0, r3, #1 8002308: f04f 0300 mov.w r3, #0 800230c: bf1f itttt ne 800230e: 426d negne r5, r5 8002310: 60a3 strne r3, [r4, #8] 8002312: 61a5 strne r5, [r4, #24] 8002314: 4618 movne r0, r3 8002316: bf08 it eq 8002318: 60a5 streq r5, [r4, #8] 800231a: e7d0 b.n 80022be 800231c: 4648 mov r0, r9 800231e: f000 fabb bl 8002898 8002322: 4607 mov r7, r0 8002324: 2800 cmp r0, #0 8002326: d0bc beq.n 80022a2 8002328: 89a3 ldrh r3, [r4, #12] 800232a: 464d mov r5, r9 800232c: f043 0380 orr.w r3, r3, #128 ; 0x80 8002330: 81a3 strh r3, [r4, #12] 8002332: e7d3 b.n 80022dc 8002334: 2000 movs r0, #0 8002336: e7b6 b.n 80022a6 8002338: 46a9 mov r9, r5 800233a: e7f5 b.n 8002328 800233c: 60a0 str r0, [r4, #8] 800233e: e7be b.n 80022be 8002340: f04f 30ff mov.w r0, #4294967295 8002344: e7bb b.n 80022be 8002346: bf00 nop 8002348: 2000001c .word 0x2000001c 800234c: 08003200 .word 0x08003200 8002350: 08003220 .word 0x08003220 8002354: 080031e0 .word 0x080031e0 08002358 <__swbuf_r>: 8002358: b5f8 push {r3, r4, r5, r6, r7, lr} 800235a: 460e mov r6, r1 800235c: 4614 mov r4, r2 800235e: 4605 mov r5, r0 8002360: b118 cbz r0, 800236a <__swbuf_r+0x12> 8002362: 6983 ldr r3, [r0, #24] 8002364: b90b cbnz r3, 800236a <__swbuf_r+0x12> 8002366: f000 f9a9 bl 80026bc <__sinit> 800236a: 4b21 ldr r3, [pc, #132] ; (80023f0 <__swbuf_r+0x98>) 800236c: 429c cmp r4, r3 800236e: d12a bne.n 80023c6 <__swbuf_r+0x6e> 8002370: 686c ldr r4, [r5, #4] 8002372: 69a3 ldr r3, [r4, #24] 8002374: 60a3 str r3, [r4, #8] 8002376: 89a3 ldrh r3, [r4, #12] 8002378: 071a lsls r2, r3, #28 800237a: d52e bpl.n 80023da <__swbuf_r+0x82> 800237c: 6923 ldr r3, [r4, #16] 800237e: b363 cbz r3, 80023da <__swbuf_r+0x82> 8002380: 6923 ldr r3, [r4, #16] 8002382: 6820 ldr r0, [r4, #0] 8002384: b2f6 uxtb r6, r6 8002386: 1ac0 subs r0, r0, r3 8002388: 6963 ldr r3, [r4, #20] 800238a: 4637 mov r7, r6 800238c: 4298 cmp r0, r3 800238e: db04 blt.n 800239a <__swbuf_r+0x42> 8002390: 4621 mov r1, r4 8002392: 4628 mov r0, r5 8002394: f000 f928 bl 80025e8 <_fflush_r> 8002398: bb28 cbnz r0, 80023e6 <__swbuf_r+0x8e> 800239a: 68a3 ldr r3, [r4, #8] 800239c: 3001 adds r0, #1 800239e: 3b01 subs r3, #1 80023a0: 60a3 str r3, [r4, #8] 80023a2: 6823 ldr r3, [r4, #0] 80023a4: 1c5a adds r2, r3, #1 80023a6: 6022 str r2, [r4, #0] 80023a8: 701e strb r6, [r3, #0] 80023aa: 6963 ldr r3, [r4, #20] 80023ac: 4298 cmp r0, r3 80023ae: d004 beq.n 80023ba <__swbuf_r+0x62> 80023b0: 89a3 ldrh r3, [r4, #12] 80023b2: 07db lsls r3, r3, #31 80023b4: d519 bpl.n 80023ea <__swbuf_r+0x92> 80023b6: 2e0a cmp r6, #10 80023b8: d117 bne.n 80023ea <__swbuf_r+0x92> 80023ba: 4621 mov r1, r4 80023bc: 4628 mov r0, r5 80023be: f000 f913 bl 80025e8 <_fflush_r> 80023c2: b190 cbz r0, 80023ea <__swbuf_r+0x92> 80023c4: e00f b.n 80023e6 <__swbuf_r+0x8e> 80023c6: 4b0b ldr r3, [pc, #44] ; (80023f4 <__swbuf_r+0x9c>) 80023c8: 429c cmp r4, r3 80023ca: d101 bne.n 80023d0 <__swbuf_r+0x78> 80023cc: 68ac ldr r4, [r5, #8] 80023ce: e7d0 b.n 8002372 <__swbuf_r+0x1a> 80023d0: 4b09 ldr r3, [pc, #36] ; (80023f8 <__swbuf_r+0xa0>) 80023d2: 429c cmp r4, r3 80023d4: bf08 it eq 80023d6: 68ec ldreq r4, [r5, #12] 80023d8: e7cb b.n 8002372 <__swbuf_r+0x1a> 80023da: 4621 mov r1, r4 80023dc: 4628 mov r0, r5 80023de: f000 f80d bl 80023fc <__swsetup_r> 80023e2: 2800 cmp r0, #0 80023e4: d0cc beq.n 8002380 <__swbuf_r+0x28> 80023e6: f04f 37ff mov.w r7, #4294967295 80023ea: 4638 mov r0, r7 80023ec: bdf8 pop {r3, r4, r5, r6, r7, pc} 80023ee: bf00 nop 80023f0: 08003200 .word 0x08003200 80023f4: 08003220 .word 0x08003220 80023f8: 080031e0 .word 0x080031e0 080023fc <__swsetup_r>: 80023fc: 4b32 ldr r3, [pc, #200] ; (80024c8 <__swsetup_r+0xcc>) 80023fe: b570 push {r4, r5, r6, lr} 8002400: 681d ldr r5, [r3, #0] 8002402: 4606 mov r6, r0 8002404: 460c mov r4, r1 8002406: b125 cbz r5, 8002412 <__swsetup_r+0x16> 8002408: 69ab ldr r3, [r5, #24] 800240a: b913 cbnz r3, 8002412 <__swsetup_r+0x16> 800240c: 4628 mov r0, r5 800240e: f000 f955 bl 80026bc <__sinit> 8002412: 4b2e ldr r3, [pc, #184] ; (80024cc <__swsetup_r+0xd0>) 8002414: 429c cmp r4, r3 8002416: d10f bne.n 8002438 <__swsetup_r+0x3c> 8002418: 686c ldr r4, [r5, #4] 800241a: f9b4 300c ldrsh.w r3, [r4, #12] 800241e: b29a uxth r2, r3 8002420: 0715 lsls r5, r2, #28 8002422: d42c bmi.n 800247e <__swsetup_r+0x82> 8002424: 06d0 lsls r0, r2, #27 8002426: d411 bmi.n 800244c <__swsetup_r+0x50> 8002428: 2209 movs r2, #9 800242a: 6032 str r2, [r6, #0] 800242c: f043 0340 orr.w r3, r3, #64 ; 0x40 8002430: 81a3 strh r3, [r4, #12] 8002432: f04f 30ff mov.w r0, #4294967295 8002436: bd70 pop {r4, r5, r6, pc} 8002438: 4b25 ldr r3, [pc, #148] ; (80024d0 <__swsetup_r+0xd4>) 800243a: 429c cmp r4, r3 800243c: d101 bne.n 8002442 <__swsetup_r+0x46> 800243e: 68ac ldr r4, [r5, #8] 8002440: e7eb b.n 800241a <__swsetup_r+0x1e> 8002442: 4b24 ldr r3, [pc, #144] ; (80024d4 <__swsetup_r+0xd8>) 8002444: 429c cmp r4, r3 8002446: bf08 it eq 8002448: 68ec ldreq r4, [r5, #12] 800244a: e7e6 b.n 800241a <__swsetup_r+0x1e> 800244c: 0751 lsls r1, r2, #29 800244e: d512 bpl.n 8002476 <__swsetup_r+0x7a> 8002450: 6b61 ldr r1, [r4, #52] ; 0x34 8002452: b141 cbz r1, 8002466 <__swsetup_r+0x6a> 8002454: f104 0344 add.w r3, r4, #68 ; 0x44 8002458: 4299 cmp r1, r3 800245a: d002 beq.n 8002462 <__swsetup_r+0x66> 800245c: 4630 mov r0, r6 800245e: f000 fa23 bl 80028a8 <_free_r> 8002462: 2300 movs r3, #0 8002464: 6363 str r3, [r4, #52] ; 0x34 8002466: 89a3 ldrh r3, [r4, #12] 8002468: f023 0324 bic.w r3, r3, #36 ; 0x24 800246c: 81a3 strh r3, [r4, #12] 800246e: 2300 movs r3, #0 8002470: 6063 str r3, [r4, #4] 8002472: 6923 ldr r3, [r4, #16] 8002474: 6023 str r3, [r4, #0] 8002476: 89a3 ldrh r3, [r4, #12] 8002478: f043 0308 orr.w r3, r3, #8 800247c: 81a3 strh r3, [r4, #12] 800247e: 6923 ldr r3, [r4, #16] 8002480: b94b cbnz r3, 8002496 <__swsetup_r+0x9a> 8002482: 89a3 ldrh r3, [r4, #12] 8002484: f403 7320 and.w r3, r3, #640 ; 0x280 8002488: f5b3 7f00 cmp.w r3, #512 ; 0x200 800248c: d003 beq.n 8002496 <__swsetup_r+0x9a> 800248e: 4621 mov r1, r4 8002490: 4630 mov r0, r6 8002492: f000 f9c1 bl 8002818 <__smakebuf_r> 8002496: 89a2 ldrh r2, [r4, #12] 8002498: f012 0301 ands.w r3, r2, #1 800249c: d00c beq.n 80024b8 <__swsetup_r+0xbc> 800249e: 2300 movs r3, #0 80024a0: 60a3 str r3, [r4, #8] 80024a2: 6963 ldr r3, [r4, #20] 80024a4: 425b negs r3, r3 80024a6: 61a3 str r3, [r4, #24] 80024a8: 6923 ldr r3, [r4, #16] 80024aa: b953 cbnz r3, 80024c2 <__swsetup_r+0xc6> 80024ac: f9b4 300c ldrsh.w r3, [r4, #12] 80024b0: f013 0080 ands.w r0, r3, #128 ; 0x80 80024b4: d1ba bne.n 800242c <__swsetup_r+0x30> 80024b6: bd70 pop {r4, r5, r6, pc} 80024b8: 0792 lsls r2, r2, #30 80024ba: bf58 it pl 80024bc: 6963 ldrpl r3, [r4, #20] 80024be: 60a3 str r3, [r4, #8] 80024c0: e7f2 b.n 80024a8 <__swsetup_r+0xac> 80024c2: 2000 movs r0, #0 80024c4: e7f7 b.n 80024b6 <__swsetup_r+0xba> 80024c6: bf00 nop 80024c8: 2000001c .word 0x2000001c 80024cc: 08003200 .word 0x08003200 80024d0: 08003220 .word 0x08003220 80024d4: 080031e0 .word 0x080031e0 080024d8 <__sflush_r>: 80024d8: 898a ldrh r2, [r1, #12] 80024da: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80024de: 4605 mov r5, r0 80024e0: 0710 lsls r0, r2, #28 80024e2: 460c mov r4, r1 80024e4: d45a bmi.n 800259c <__sflush_r+0xc4> 80024e6: 684b ldr r3, [r1, #4] 80024e8: 2b00 cmp r3, #0 80024ea: dc05 bgt.n 80024f8 <__sflush_r+0x20> 80024ec: 6c0b ldr r3, [r1, #64] ; 0x40 80024ee: 2b00 cmp r3, #0 80024f0: dc02 bgt.n 80024f8 <__sflush_r+0x20> 80024f2: 2000 movs r0, #0 80024f4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80024f8: 6ae6 ldr r6, [r4, #44] ; 0x2c 80024fa: 2e00 cmp r6, #0 80024fc: d0f9 beq.n 80024f2 <__sflush_r+0x1a> 80024fe: 2300 movs r3, #0 8002500: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8002504: 682f ldr r7, [r5, #0] 8002506: 602b str r3, [r5, #0] 8002508: d033 beq.n 8002572 <__sflush_r+0x9a> 800250a: 6d60 ldr r0, [r4, #84] ; 0x54 800250c: 89a3 ldrh r3, [r4, #12] 800250e: 075a lsls r2, r3, #29 8002510: d505 bpl.n 800251e <__sflush_r+0x46> 8002512: 6863 ldr r3, [r4, #4] 8002514: 1ac0 subs r0, r0, r3 8002516: 6b63 ldr r3, [r4, #52] ; 0x34 8002518: b10b cbz r3, 800251e <__sflush_r+0x46> 800251a: 6c23 ldr r3, [r4, #64] ; 0x40 800251c: 1ac0 subs r0, r0, r3 800251e: 2300 movs r3, #0 8002520: 4602 mov r2, r0 8002522: 6ae6 ldr r6, [r4, #44] ; 0x2c 8002524: 6a21 ldr r1, [r4, #32] 8002526: 4628 mov r0, r5 8002528: 47b0 blx r6 800252a: 1c43 adds r3, r0, #1 800252c: 89a3 ldrh r3, [r4, #12] 800252e: d106 bne.n 800253e <__sflush_r+0x66> 8002530: 6829 ldr r1, [r5, #0] 8002532: 291d cmp r1, #29 8002534: d84b bhi.n 80025ce <__sflush_r+0xf6> 8002536: 4a2b ldr r2, [pc, #172] ; (80025e4 <__sflush_r+0x10c>) 8002538: 40ca lsrs r2, r1 800253a: 07d6 lsls r6, r2, #31 800253c: d547 bpl.n 80025ce <__sflush_r+0xf6> 800253e: 2200 movs r2, #0 8002540: 6062 str r2, [r4, #4] 8002542: 6922 ldr r2, [r4, #16] 8002544: 04d9 lsls r1, r3, #19 8002546: 6022 str r2, [r4, #0] 8002548: d504 bpl.n 8002554 <__sflush_r+0x7c> 800254a: 1c42 adds r2, r0, #1 800254c: d101 bne.n 8002552 <__sflush_r+0x7a> 800254e: 682b ldr r3, [r5, #0] 8002550: b903 cbnz r3, 8002554 <__sflush_r+0x7c> 8002552: 6560 str r0, [r4, #84] ; 0x54 8002554: 6b61 ldr r1, [r4, #52] ; 0x34 8002556: 602f str r7, [r5, #0] 8002558: 2900 cmp r1, #0 800255a: d0ca beq.n 80024f2 <__sflush_r+0x1a> 800255c: f104 0344 add.w r3, r4, #68 ; 0x44 8002560: 4299 cmp r1, r3 8002562: d002 beq.n 800256a <__sflush_r+0x92> 8002564: 4628 mov r0, r5 8002566: f000 f99f bl 80028a8 <_free_r> 800256a: 2000 movs r0, #0 800256c: 6360 str r0, [r4, #52] ; 0x34 800256e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002572: 6a21 ldr r1, [r4, #32] 8002574: 2301 movs r3, #1 8002576: 4628 mov r0, r5 8002578: 47b0 blx r6 800257a: 1c41 adds r1, r0, #1 800257c: d1c6 bne.n 800250c <__sflush_r+0x34> 800257e: 682b ldr r3, [r5, #0] 8002580: 2b00 cmp r3, #0 8002582: d0c3 beq.n 800250c <__sflush_r+0x34> 8002584: 2b1d cmp r3, #29 8002586: d001 beq.n 800258c <__sflush_r+0xb4> 8002588: 2b16 cmp r3, #22 800258a: d101 bne.n 8002590 <__sflush_r+0xb8> 800258c: 602f str r7, [r5, #0] 800258e: e7b0 b.n 80024f2 <__sflush_r+0x1a> 8002590: 89a3 ldrh r3, [r4, #12] 8002592: f043 0340 orr.w r3, r3, #64 ; 0x40 8002596: 81a3 strh r3, [r4, #12] 8002598: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800259c: 690f ldr r7, [r1, #16] 800259e: 2f00 cmp r7, #0 80025a0: d0a7 beq.n 80024f2 <__sflush_r+0x1a> 80025a2: 0793 lsls r3, r2, #30 80025a4: bf18 it ne 80025a6: 2300 movne r3, #0 80025a8: 680e ldr r6, [r1, #0] 80025aa: bf08 it eq 80025ac: 694b ldreq r3, [r1, #20] 80025ae: eba6 0807 sub.w r8, r6, r7 80025b2: 600f str r7, [r1, #0] 80025b4: 608b str r3, [r1, #8] 80025b6: f1b8 0f00 cmp.w r8, #0 80025ba: dd9a ble.n 80024f2 <__sflush_r+0x1a> 80025bc: 4643 mov r3, r8 80025be: 463a mov r2, r7 80025c0: 6a21 ldr r1, [r4, #32] 80025c2: 4628 mov r0, r5 80025c4: 6aa6 ldr r6, [r4, #40] ; 0x28 80025c6: 47b0 blx r6 80025c8: 2800 cmp r0, #0 80025ca: dc07 bgt.n 80025dc <__sflush_r+0x104> 80025cc: 89a3 ldrh r3, [r4, #12] 80025ce: f043 0340 orr.w r3, r3, #64 ; 0x40 80025d2: 81a3 strh r3, [r4, #12] 80025d4: f04f 30ff mov.w r0, #4294967295 80025d8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80025dc: 4407 add r7, r0 80025de: eba8 0800 sub.w r8, r8, r0 80025e2: e7e8 b.n 80025b6 <__sflush_r+0xde> 80025e4: 20400001 .word 0x20400001 080025e8 <_fflush_r>: 80025e8: b538 push {r3, r4, r5, lr} 80025ea: 690b ldr r3, [r1, #16] 80025ec: 4605 mov r5, r0 80025ee: 460c mov r4, r1 80025f0: b1db cbz r3, 800262a <_fflush_r+0x42> 80025f2: b118 cbz r0, 80025fc <_fflush_r+0x14> 80025f4: 6983 ldr r3, [r0, #24] 80025f6: b90b cbnz r3, 80025fc <_fflush_r+0x14> 80025f8: f000 f860 bl 80026bc <__sinit> 80025fc: 4b0c ldr r3, [pc, #48] ; (8002630 <_fflush_r+0x48>) 80025fe: 429c cmp r4, r3 8002600: d109 bne.n 8002616 <_fflush_r+0x2e> 8002602: 686c ldr r4, [r5, #4] 8002604: f9b4 300c ldrsh.w r3, [r4, #12] 8002608: b17b cbz r3, 800262a <_fflush_r+0x42> 800260a: 4621 mov r1, r4 800260c: 4628 mov r0, r5 800260e: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8002612: f7ff bf61 b.w 80024d8 <__sflush_r> 8002616: 4b07 ldr r3, [pc, #28] ; (8002634 <_fflush_r+0x4c>) 8002618: 429c cmp r4, r3 800261a: d101 bne.n 8002620 <_fflush_r+0x38> 800261c: 68ac ldr r4, [r5, #8] 800261e: e7f1 b.n 8002604 <_fflush_r+0x1c> 8002620: 4b05 ldr r3, [pc, #20] ; (8002638 <_fflush_r+0x50>) 8002622: 429c cmp r4, r3 8002624: bf08 it eq 8002626: 68ec ldreq r4, [r5, #12] 8002628: e7ec b.n 8002604 <_fflush_r+0x1c> 800262a: 2000 movs r0, #0 800262c: bd38 pop {r3, r4, r5, pc} 800262e: bf00 nop 8002630: 08003200 .word 0x08003200 8002634: 08003220 .word 0x08003220 8002638: 080031e0 .word 0x080031e0 0800263c <_cleanup_r>: 800263c: 4901 ldr r1, [pc, #4] ; (8002644 <_cleanup_r+0x8>) 800263e: f000 b8a9 b.w 8002794 <_fwalk_reent> 8002642: bf00 nop 8002644: 080025e9 .word 0x080025e9 08002648 : 8002648: 2300 movs r3, #0 800264a: b510 push {r4, lr} 800264c: 4604 mov r4, r0 800264e: 6003 str r3, [r0, #0] 8002650: 6043 str r3, [r0, #4] 8002652: 6083 str r3, [r0, #8] 8002654: 8181 strh r1, [r0, #12] 8002656: 6643 str r3, [r0, #100] ; 0x64 8002658: 81c2 strh r2, [r0, #14] 800265a: 6103 str r3, [r0, #16] 800265c: 6143 str r3, [r0, #20] 800265e: 6183 str r3, [r0, #24] 8002660: 4619 mov r1, r3 8002662: 2208 movs r2, #8 8002664: 305c adds r0, #92 ; 0x5c 8002666: f7ff fd3d bl 80020e4 800266a: 4b05 ldr r3, [pc, #20] ; (8002680 ) 800266c: 6224 str r4, [r4, #32] 800266e: 6263 str r3, [r4, #36] ; 0x24 8002670: 4b04 ldr r3, [pc, #16] ; (8002684 ) 8002672: 62a3 str r3, [r4, #40] ; 0x28 8002674: 4b04 ldr r3, [pc, #16] ; (8002688 ) 8002676: 62e3 str r3, [r4, #44] ; 0x2c 8002678: 4b04 ldr r3, [pc, #16] ; (800268c ) 800267a: 6323 str r3, [r4, #48] ; 0x30 800267c: bd10 pop {r4, pc} 800267e: bf00 nop 8002680: 08002fc9 .word 0x08002fc9 8002684: 08002feb .word 0x08002feb 8002688: 08003023 .word 0x08003023 800268c: 08003047 .word 0x08003047 08002690 <__sfmoreglue>: 8002690: b570 push {r4, r5, r6, lr} 8002692: 2568 movs r5, #104 ; 0x68 8002694: 1e4a subs r2, r1, #1 8002696: 4355 muls r5, r2 8002698: 460e mov r6, r1 800269a: f105 0174 add.w r1, r5, #116 ; 0x74 800269e: f000 f94f bl 8002940 <_malloc_r> 80026a2: 4604 mov r4, r0 80026a4: b140 cbz r0, 80026b8 <__sfmoreglue+0x28> 80026a6: 2100 movs r1, #0 80026a8: e880 0042 stmia.w r0, {r1, r6} 80026ac: 300c adds r0, #12 80026ae: 60a0 str r0, [r4, #8] 80026b0: f105 0268 add.w r2, r5, #104 ; 0x68 80026b4: f7ff fd16 bl 80020e4 80026b8: 4620 mov r0, r4 80026ba: bd70 pop {r4, r5, r6, pc} 080026bc <__sinit>: 80026bc: 6983 ldr r3, [r0, #24] 80026be: b510 push {r4, lr} 80026c0: 4604 mov r4, r0 80026c2: bb33 cbnz r3, 8002712 <__sinit+0x56> 80026c4: 6483 str r3, [r0, #72] ; 0x48 80026c6: 64c3 str r3, [r0, #76] ; 0x4c 80026c8: 6503 str r3, [r0, #80] ; 0x50 80026ca: 4b12 ldr r3, [pc, #72] ; (8002714 <__sinit+0x58>) 80026cc: 4a12 ldr r2, [pc, #72] ; (8002718 <__sinit+0x5c>) 80026ce: 681b ldr r3, [r3, #0] 80026d0: 6282 str r2, [r0, #40] ; 0x28 80026d2: 4298 cmp r0, r3 80026d4: bf04 itt eq 80026d6: 2301 moveq r3, #1 80026d8: 6183 streq r3, [r0, #24] 80026da: f000 f81f bl 800271c <__sfp> 80026de: 6060 str r0, [r4, #4] 80026e0: 4620 mov r0, r4 80026e2: f000 f81b bl 800271c <__sfp> 80026e6: 60a0 str r0, [r4, #8] 80026e8: 4620 mov r0, r4 80026ea: f000 f817 bl 800271c <__sfp> 80026ee: 2200 movs r2, #0 80026f0: 60e0 str r0, [r4, #12] 80026f2: 2104 movs r1, #4 80026f4: 6860 ldr r0, [r4, #4] 80026f6: f7ff ffa7 bl 8002648 80026fa: 2201 movs r2, #1 80026fc: 2109 movs r1, #9 80026fe: 68a0 ldr r0, [r4, #8] 8002700: f7ff ffa2 bl 8002648 8002704: 2202 movs r2, #2 8002706: 2112 movs r1, #18 8002708: 68e0 ldr r0, [r4, #12] 800270a: f7ff ff9d bl 8002648 800270e: 2301 movs r3, #1 8002710: 61a3 str r3, [r4, #24] 8002712: bd10 pop {r4, pc} 8002714: 080031dc .word 0x080031dc 8002718: 0800263d .word 0x0800263d 0800271c <__sfp>: 800271c: b5f8 push {r3, r4, r5, r6, r7, lr} 800271e: 4b1c ldr r3, [pc, #112] ; (8002790 <__sfp+0x74>) 8002720: 4607 mov r7, r0 8002722: 681e ldr r6, [r3, #0] 8002724: 69b3 ldr r3, [r6, #24] 8002726: b913 cbnz r3, 800272e <__sfp+0x12> 8002728: 4630 mov r0, r6 800272a: f7ff ffc7 bl 80026bc <__sinit> 800272e: 3648 adds r6, #72 ; 0x48 8002730: 68b4 ldr r4, [r6, #8] 8002732: 6873 ldr r3, [r6, #4] 8002734: 3b01 subs r3, #1 8002736: d503 bpl.n 8002740 <__sfp+0x24> 8002738: 6833 ldr r3, [r6, #0] 800273a: b133 cbz r3, 800274a <__sfp+0x2e> 800273c: 6836 ldr r6, [r6, #0] 800273e: e7f7 b.n 8002730 <__sfp+0x14> 8002740: f9b4 500c ldrsh.w r5, [r4, #12] 8002744: b16d cbz r5, 8002762 <__sfp+0x46> 8002746: 3468 adds r4, #104 ; 0x68 8002748: e7f4 b.n 8002734 <__sfp+0x18> 800274a: 2104 movs r1, #4 800274c: 4638 mov r0, r7 800274e: f7ff ff9f bl 8002690 <__sfmoreglue> 8002752: 6030 str r0, [r6, #0] 8002754: 2800 cmp r0, #0 8002756: d1f1 bne.n 800273c <__sfp+0x20> 8002758: 230c movs r3, #12 800275a: 4604 mov r4, r0 800275c: 603b str r3, [r7, #0] 800275e: 4620 mov r0, r4 8002760: bdf8 pop {r3, r4, r5, r6, r7, pc} 8002762: f64f 73ff movw r3, #65535 ; 0xffff 8002766: 81e3 strh r3, [r4, #14] 8002768: 2301 movs r3, #1 800276a: 6665 str r5, [r4, #100] ; 0x64 800276c: 81a3 strh r3, [r4, #12] 800276e: 6025 str r5, [r4, #0] 8002770: 60a5 str r5, [r4, #8] 8002772: 6065 str r5, [r4, #4] 8002774: 6125 str r5, [r4, #16] 8002776: 6165 str r5, [r4, #20] 8002778: 61a5 str r5, [r4, #24] 800277a: 2208 movs r2, #8 800277c: 4629 mov r1, r5 800277e: f104 005c add.w r0, r4, #92 ; 0x5c 8002782: f7ff fcaf bl 80020e4 8002786: 6365 str r5, [r4, #52] ; 0x34 8002788: 63a5 str r5, [r4, #56] ; 0x38 800278a: 64a5 str r5, [r4, #72] ; 0x48 800278c: 64e5 str r5, [r4, #76] ; 0x4c 800278e: e7e6 b.n 800275e <__sfp+0x42> 8002790: 080031dc .word 0x080031dc 08002794 <_fwalk_reent>: 8002794: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8002798: 4680 mov r8, r0 800279a: 4689 mov r9, r1 800279c: 2600 movs r6, #0 800279e: f100 0448 add.w r4, r0, #72 ; 0x48 80027a2: b914 cbnz r4, 80027aa <_fwalk_reent+0x16> 80027a4: 4630 mov r0, r6 80027a6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 80027aa: 68a5 ldr r5, [r4, #8] 80027ac: 6867 ldr r7, [r4, #4] 80027ae: 3f01 subs r7, #1 80027b0: d501 bpl.n 80027b6 <_fwalk_reent+0x22> 80027b2: 6824 ldr r4, [r4, #0] 80027b4: e7f5 b.n 80027a2 <_fwalk_reent+0xe> 80027b6: 89ab ldrh r3, [r5, #12] 80027b8: 2b01 cmp r3, #1 80027ba: d907 bls.n 80027cc <_fwalk_reent+0x38> 80027bc: f9b5 300e ldrsh.w r3, [r5, #14] 80027c0: 3301 adds r3, #1 80027c2: d003 beq.n 80027cc <_fwalk_reent+0x38> 80027c4: 4629 mov r1, r5 80027c6: 4640 mov r0, r8 80027c8: 47c8 blx r9 80027ca: 4306 orrs r6, r0 80027cc: 3568 adds r5, #104 ; 0x68 80027ce: e7ee b.n 80027ae <_fwalk_reent+0x1a> 080027d0 <__swhatbuf_r>: 80027d0: b570 push {r4, r5, r6, lr} 80027d2: 460e mov r6, r1 80027d4: f9b1 100e ldrsh.w r1, [r1, #14] 80027d8: b090 sub sp, #64 ; 0x40 80027da: 2900 cmp r1, #0 80027dc: 4614 mov r4, r2 80027de: 461d mov r5, r3 80027e0: da07 bge.n 80027f2 <__swhatbuf_r+0x22> 80027e2: 2300 movs r3, #0 80027e4: 602b str r3, [r5, #0] 80027e6: 89b3 ldrh r3, [r6, #12] 80027e8: 061a lsls r2, r3, #24 80027ea: d410 bmi.n 800280e <__swhatbuf_r+0x3e> 80027ec: f44f 6380 mov.w r3, #1024 ; 0x400 80027f0: e00e b.n 8002810 <__swhatbuf_r+0x40> 80027f2: aa01 add r2, sp, #4 80027f4: f000 fc4e bl 8003094 <_fstat_r> 80027f8: 2800 cmp r0, #0 80027fa: dbf2 blt.n 80027e2 <__swhatbuf_r+0x12> 80027fc: 9a02 ldr r2, [sp, #8] 80027fe: f402 4270 and.w r2, r2, #61440 ; 0xf000 8002802: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8002806: 425a negs r2, r3 8002808: 415a adcs r2, r3 800280a: 602a str r2, [r5, #0] 800280c: e7ee b.n 80027ec <__swhatbuf_r+0x1c> 800280e: 2340 movs r3, #64 ; 0x40 8002810: 2000 movs r0, #0 8002812: 6023 str r3, [r4, #0] 8002814: b010 add sp, #64 ; 0x40 8002816: bd70 pop {r4, r5, r6, pc} 08002818 <__smakebuf_r>: 8002818: 898b ldrh r3, [r1, #12] 800281a: b573 push {r0, r1, r4, r5, r6, lr} 800281c: 079d lsls r5, r3, #30 800281e: 4606 mov r6, r0 8002820: 460c mov r4, r1 8002822: d507 bpl.n 8002834 <__smakebuf_r+0x1c> 8002824: f104 0347 add.w r3, r4, #71 ; 0x47 8002828: 6023 str r3, [r4, #0] 800282a: 6123 str r3, [r4, #16] 800282c: 2301 movs r3, #1 800282e: 6163 str r3, [r4, #20] 8002830: b002 add sp, #8 8002832: bd70 pop {r4, r5, r6, pc} 8002834: ab01 add r3, sp, #4 8002836: 466a mov r2, sp 8002838: f7ff ffca bl 80027d0 <__swhatbuf_r> 800283c: 9900 ldr r1, [sp, #0] 800283e: 4605 mov r5, r0 8002840: 4630 mov r0, r6 8002842: f000 f87d bl 8002940 <_malloc_r> 8002846: b948 cbnz r0, 800285c <__smakebuf_r+0x44> 8002848: f9b4 300c ldrsh.w r3, [r4, #12] 800284c: 059a lsls r2, r3, #22 800284e: d4ef bmi.n 8002830 <__smakebuf_r+0x18> 8002850: f023 0303 bic.w r3, r3, #3 8002854: f043 0302 orr.w r3, r3, #2 8002858: 81a3 strh r3, [r4, #12] 800285a: e7e3 b.n 8002824 <__smakebuf_r+0xc> 800285c: 4b0d ldr r3, [pc, #52] ; (8002894 <__smakebuf_r+0x7c>) 800285e: 62b3 str r3, [r6, #40] ; 0x28 8002860: 89a3 ldrh r3, [r4, #12] 8002862: 6020 str r0, [r4, #0] 8002864: f043 0380 orr.w r3, r3, #128 ; 0x80 8002868: 81a3 strh r3, [r4, #12] 800286a: 9b00 ldr r3, [sp, #0] 800286c: 6120 str r0, [r4, #16] 800286e: 6163 str r3, [r4, #20] 8002870: 9b01 ldr r3, [sp, #4] 8002872: b15b cbz r3, 800288c <__smakebuf_r+0x74> 8002874: f9b4 100e ldrsh.w r1, [r4, #14] 8002878: 4630 mov r0, r6 800287a: f000 fc1d bl 80030b8 <_isatty_r> 800287e: b128 cbz r0, 800288c <__smakebuf_r+0x74> 8002880: 89a3 ldrh r3, [r4, #12] 8002882: f023 0303 bic.w r3, r3, #3 8002886: f043 0301 orr.w r3, r3, #1 800288a: 81a3 strh r3, [r4, #12] 800288c: 89a3 ldrh r3, [r4, #12] 800288e: 431d orrs r5, r3 8002890: 81a5 strh r5, [r4, #12] 8002892: e7cd b.n 8002830 <__smakebuf_r+0x18> 8002894: 0800263d .word 0x0800263d 08002898 : 8002898: 4b02 ldr r3, [pc, #8] ; (80028a4 ) 800289a: 4601 mov r1, r0 800289c: 6818 ldr r0, [r3, #0] 800289e: f000 b84f b.w 8002940 <_malloc_r> 80028a2: bf00 nop 80028a4: 2000001c .word 0x2000001c 080028a8 <_free_r>: 80028a8: b538 push {r3, r4, r5, lr} 80028aa: 4605 mov r5, r0 80028ac: 2900 cmp r1, #0 80028ae: d043 beq.n 8002938 <_free_r+0x90> 80028b0: f851 3c04 ldr.w r3, [r1, #-4] 80028b4: 1f0c subs r4, r1, #4 80028b6: 2b00 cmp r3, #0 80028b8: bfb8 it lt 80028ba: 18e4 addlt r4, r4, r3 80028bc: f000 fc2c bl 8003118 <__malloc_lock> 80028c0: 4a1e ldr r2, [pc, #120] ; (800293c <_free_r+0x94>) 80028c2: 6813 ldr r3, [r2, #0] 80028c4: 4610 mov r0, r2 80028c6: b933 cbnz r3, 80028d6 <_free_r+0x2e> 80028c8: 6063 str r3, [r4, #4] 80028ca: 6014 str r4, [r2, #0] 80028cc: 4628 mov r0, r5 80028ce: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80028d2: f000 bc22 b.w 800311a <__malloc_unlock> 80028d6: 42a3 cmp r3, r4 80028d8: d90b bls.n 80028f2 <_free_r+0x4a> 80028da: 6821 ldr r1, [r4, #0] 80028dc: 1862 adds r2, r4, r1 80028de: 4293 cmp r3, r2 80028e0: bf01 itttt eq 80028e2: 681a ldreq r2, [r3, #0] 80028e4: 685b ldreq r3, [r3, #4] 80028e6: 1852 addeq r2, r2, r1 80028e8: 6022 streq r2, [r4, #0] 80028ea: 6063 str r3, [r4, #4] 80028ec: 6004 str r4, [r0, #0] 80028ee: e7ed b.n 80028cc <_free_r+0x24> 80028f0: 4613 mov r3, r2 80028f2: 685a ldr r2, [r3, #4] 80028f4: b10a cbz r2, 80028fa <_free_r+0x52> 80028f6: 42a2 cmp r2, r4 80028f8: d9fa bls.n 80028f0 <_free_r+0x48> 80028fa: 6819 ldr r1, [r3, #0] 80028fc: 1858 adds r0, r3, r1 80028fe: 42a0 cmp r0, r4 8002900: d10b bne.n 800291a <_free_r+0x72> 8002902: 6820 ldr r0, [r4, #0] 8002904: 4401 add r1, r0 8002906: 1858 adds r0, r3, r1 8002908: 4282 cmp r2, r0 800290a: 6019 str r1, [r3, #0] 800290c: d1de bne.n 80028cc <_free_r+0x24> 800290e: 6810 ldr r0, [r2, #0] 8002910: 6852 ldr r2, [r2, #4] 8002912: 4401 add r1, r0 8002914: 6019 str r1, [r3, #0] 8002916: 605a str r2, [r3, #4] 8002918: e7d8 b.n 80028cc <_free_r+0x24> 800291a: d902 bls.n 8002922 <_free_r+0x7a> 800291c: 230c movs r3, #12 800291e: 602b str r3, [r5, #0] 8002920: e7d4 b.n 80028cc <_free_r+0x24> 8002922: 6820 ldr r0, [r4, #0] 8002924: 1821 adds r1, r4, r0 8002926: 428a cmp r2, r1 8002928: bf01 itttt eq 800292a: 6811 ldreq r1, [r2, #0] 800292c: 6852 ldreq r2, [r2, #4] 800292e: 1809 addeq r1, r1, r0 8002930: 6021 streq r1, [r4, #0] 8002932: 6062 str r2, [r4, #4] 8002934: 605c str r4, [r3, #4] 8002936: e7c9 b.n 80028cc <_free_r+0x24> 8002938: bd38 pop {r3, r4, r5, pc} 800293a: bf00 nop 800293c: 200004c8 .word 0x200004c8 08002940 <_malloc_r>: 8002940: b570 push {r4, r5, r6, lr} 8002942: 1ccd adds r5, r1, #3 8002944: f025 0503 bic.w r5, r5, #3 8002948: 3508 adds r5, #8 800294a: 2d0c cmp r5, #12 800294c: bf38 it cc 800294e: 250c movcc r5, #12 8002950: 2d00 cmp r5, #0 8002952: 4606 mov r6, r0 8002954: db01 blt.n 800295a <_malloc_r+0x1a> 8002956: 42a9 cmp r1, r5 8002958: d903 bls.n 8002962 <_malloc_r+0x22> 800295a: 230c movs r3, #12 800295c: 6033 str r3, [r6, #0] 800295e: 2000 movs r0, #0 8002960: bd70 pop {r4, r5, r6, pc} 8002962: f000 fbd9 bl 8003118 <__malloc_lock> 8002966: 4a23 ldr r2, [pc, #140] ; (80029f4 <_malloc_r+0xb4>) 8002968: 6814 ldr r4, [r2, #0] 800296a: 4621 mov r1, r4 800296c: b991 cbnz r1, 8002994 <_malloc_r+0x54> 800296e: 4c22 ldr r4, [pc, #136] ; (80029f8 <_malloc_r+0xb8>) 8002970: 6823 ldr r3, [r4, #0] 8002972: b91b cbnz r3, 800297c <_malloc_r+0x3c> 8002974: 4630 mov r0, r6 8002976: f000 fb17 bl 8002fa8 <_sbrk_r> 800297a: 6020 str r0, [r4, #0] 800297c: 4629 mov r1, r5 800297e: 4630 mov r0, r6 8002980: f000 fb12 bl 8002fa8 <_sbrk_r> 8002984: 1c43 adds r3, r0, #1 8002986: d126 bne.n 80029d6 <_malloc_r+0x96> 8002988: 230c movs r3, #12 800298a: 4630 mov r0, r6 800298c: 6033 str r3, [r6, #0] 800298e: f000 fbc4 bl 800311a <__malloc_unlock> 8002992: e7e4 b.n 800295e <_malloc_r+0x1e> 8002994: 680b ldr r3, [r1, #0] 8002996: 1b5b subs r3, r3, r5 8002998: d41a bmi.n 80029d0 <_malloc_r+0x90> 800299a: 2b0b cmp r3, #11 800299c: d90f bls.n 80029be <_malloc_r+0x7e> 800299e: 600b str r3, [r1, #0] 80029a0: 18cc adds r4, r1, r3 80029a2: 50cd str r5, [r1, r3] 80029a4: 4630 mov r0, r6 80029a6: f000 fbb8 bl 800311a <__malloc_unlock> 80029aa: f104 000b add.w r0, r4, #11 80029ae: 1d23 adds r3, r4, #4 80029b0: f020 0007 bic.w r0, r0, #7 80029b4: 1ac3 subs r3, r0, r3 80029b6: d01b beq.n 80029f0 <_malloc_r+0xb0> 80029b8: 425a negs r2, r3 80029ba: 50e2 str r2, [r4, r3] 80029bc: bd70 pop {r4, r5, r6, pc} 80029be: 428c cmp r4, r1 80029c0: bf0b itete eq 80029c2: 6863 ldreq r3, [r4, #4] 80029c4: 684b ldrne r3, [r1, #4] 80029c6: 6013 streq r3, [r2, #0] 80029c8: 6063 strne r3, [r4, #4] 80029ca: bf18 it ne 80029cc: 460c movne r4, r1 80029ce: e7e9 b.n 80029a4 <_malloc_r+0x64> 80029d0: 460c mov r4, r1 80029d2: 6849 ldr r1, [r1, #4] 80029d4: e7ca b.n 800296c <_malloc_r+0x2c> 80029d6: 1cc4 adds r4, r0, #3 80029d8: f024 0403 bic.w r4, r4, #3 80029dc: 42a0 cmp r0, r4 80029de: d005 beq.n 80029ec <_malloc_r+0xac> 80029e0: 1a21 subs r1, r4, r0 80029e2: 4630 mov r0, r6 80029e4: f000 fae0 bl 8002fa8 <_sbrk_r> 80029e8: 3001 adds r0, #1 80029ea: d0cd beq.n 8002988 <_malloc_r+0x48> 80029ec: 6025 str r5, [r4, #0] 80029ee: e7d9 b.n 80029a4 <_malloc_r+0x64> 80029f0: bd70 pop {r4, r5, r6, pc} 80029f2: bf00 nop 80029f4: 200004c8 .word 0x200004c8 80029f8: 200004cc .word 0x200004cc 080029fc <__sfputc_r>: 80029fc: 6893 ldr r3, [r2, #8] 80029fe: b410 push {r4} 8002a00: 3b01 subs r3, #1 8002a02: 2b00 cmp r3, #0 8002a04: 6093 str r3, [r2, #8] 8002a06: da08 bge.n 8002a1a <__sfputc_r+0x1e> 8002a08: 6994 ldr r4, [r2, #24] 8002a0a: 42a3 cmp r3, r4 8002a0c: db02 blt.n 8002a14 <__sfputc_r+0x18> 8002a0e: b2cb uxtb r3, r1 8002a10: 2b0a cmp r3, #10 8002a12: d102 bne.n 8002a1a <__sfputc_r+0x1e> 8002a14: bc10 pop {r4} 8002a16: f7ff bc9f b.w 8002358 <__swbuf_r> 8002a1a: 6813 ldr r3, [r2, #0] 8002a1c: 1c58 adds r0, r3, #1 8002a1e: 6010 str r0, [r2, #0] 8002a20: 7019 strb r1, [r3, #0] 8002a22: b2c8 uxtb r0, r1 8002a24: bc10 pop {r4} 8002a26: 4770 bx lr 08002a28 <__sfputs_r>: 8002a28: b5f8 push {r3, r4, r5, r6, r7, lr} 8002a2a: 4606 mov r6, r0 8002a2c: 460f mov r7, r1 8002a2e: 4614 mov r4, r2 8002a30: 18d5 adds r5, r2, r3 8002a32: 42ac cmp r4, r5 8002a34: d101 bne.n 8002a3a <__sfputs_r+0x12> 8002a36: 2000 movs r0, #0 8002a38: e007 b.n 8002a4a <__sfputs_r+0x22> 8002a3a: 463a mov r2, r7 8002a3c: f814 1b01 ldrb.w r1, [r4], #1 8002a40: 4630 mov r0, r6 8002a42: f7ff ffdb bl 80029fc <__sfputc_r> 8002a46: 1c43 adds r3, r0, #1 8002a48: d1f3 bne.n 8002a32 <__sfputs_r+0xa> 8002a4a: bdf8 pop {r3, r4, r5, r6, r7, pc} 08002a4c <_vfiprintf_r>: 8002a4c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8002a50: b09d sub sp, #116 ; 0x74 8002a52: 460c mov r4, r1 8002a54: 4617 mov r7, r2 8002a56: 9303 str r3, [sp, #12] 8002a58: 4606 mov r6, r0 8002a5a: b118 cbz r0, 8002a64 <_vfiprintf_r+0x18> 8002a5c: 6983 ldr r3, [r0, #24] 8002a5e: b90b cbnz r3, 8002a64 <_vfiprintf_r+0x18> 8002a60: f7ff fe2c bl 80026bc <__sinit> 8002a64: 4b7c ldr r3, [pc, #496] ; (8002c58 <_vfiprintf_r+0x20c>) 8002a66: 429c cmp r4, r3 8002a68: d157 bne.n 8002b1a <_vfiprintf_r+0xce> 8002a6a: 6874 ldr r4, [r6, #4] 8002a6c: 89a3 ldrh r3, [r4, #12] 8002a6e: 0718 lsls r0, r3, #28 8002a70: d55d bpl.n 8002b2e <_vfiprintf_r+0xe2> 8002a72: 6923 ldr r3, [r4, #16] 8002a74: 2b00 cmp r3, #0 8002a76: d05a beq.n 8002b2e <_vfiprintf_r+0xe2> 8002a78: 2300 movs r3, #0 8002a7a: 9309 str r3, [sp, #36] ; 0x24 8002a7c: 2320 movs r3, #32 8002a7e: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8002a82: 2330 movs r3, #48 ; 0x30 8002a84: f04f 0b01 mov.w fp, #1 8002a88: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8002a8c: 46b8 mov r8, r7 8002a8e: 4645 mov r5, r8 8002a90: f815 3b01 ldrb.w r3, [r5], #1 8002a94: 2b00 cmp r3, #0 8002a96: d155 bne.n 8002b44 <_vfiprintf_r+0xf8> 8002a98: ebb8 0a07 subs.w sl, r8, r7 8002a9c: d00b beq.n 8002ab6 <_vfiprintf_r+0x6a> 8002a9e: 4653 mov r3, sl 8002aa0: 463a mov r2, r7 8002aa2: 4621 mov r1, r4 8002aa4: 4630 mov r0, r6 8002aa6: f7ff ffbf bl 8002a28 <__sfputs_r> 8002aaa: 3001 adds r0, #1 8002aac: f000 80c4 beq.w 8002c38 <_vfiprintf_r+0x1ec> 8002ab0: 9b09 ldr r3, [sp, #36] ; 0x24 8002ab2: 4453 add r3, sl 8002ab4: 9309 str r3, [sp, #36] ; 0x24 8002ab6: f898 3000 ldrb.w r3, [r8] 8002aba: 2b00 cmp r3, #0 8002abc: f000 80bc beq.w 8002c38 <_vfiprintf_r+0x1ec> 8002ac0: 2300 movs r3, #0 8002ac2: f04f 32ff mov.w r2, #4294967295 8002ac6: 9304 str r3, [sp, #16] 8002ac8: 9307 str r3, [sp, #28] 8002aca: 9205 str r2, [sp, #20] 8002acc: 9306 str r3, [sp, #24] 8002ace: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8002ad2: 931a str r3, [sp, #104] ; 0x68 8002ad4: 2205 movs r2, #5 8002ad6: 7829 ldrb r1, [r5, #0] 8002ad8: 4860 ldr r0, [pc, #384] ; (8002c5c <_vfiprintf_r+0x210>) 8002ada: f000 fb0f bl 80030fc 8002ade: f105 0801 add.w r8, r5, #1 8002ae2: 9b04 ldr r3, [sp, #16] 8002ae4: 2800 cmp r0, #0 8002ae6: d131 bne.n 8002b4c <_vfiprintf_r+0x100> 8002ae8: 06d9 lsls r1, r3, #27 8002aea: bf44 itt mi 8002aec: 2220 movmi r2, #32 8002aee: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002af2: 071a lsls r2, r3, #28 8002af4: bf44 itt mi 8002af6: 222b movmi r2, #43 ; 0x2b 8002af8: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002afc: 782a ldrb r2, [r5, #0] 8002afe: 2a2a cmp r2, #42 ; 0x2a 8002b00: d02c beq.n 8002b5c <_vfiprintf_r+0x110> 8002b02: 2100 movs r1, #0 8002b04: 200a movs r0, #10 8002b06: 9a07 ldr r2, [sp, #28] 8002b08: 46a8 mov r8, r5 8002b0a: f898 3000 ldrb.w r3, [r8] 8002b0e: 3501 adds r5, #1 8002b10: 3b30 subs r3, #48 ; 0x30 8002b12: 2b09 cmp r3, #9 8002b14: d96d bls.n 8002bf2 <_vfiprintf_r+0x1a6> 8002b16: b371 cbz r1, 8002b76 <_vfiprintf_r+0x12a> 8002b18: e026 b.n 8002b68 <_vfiprintf_r+0x11c> 8002b1a: 4b51 ldr r3, [pc, #324] ; (8002c60 <_vfiprintf_r+0x214>) 8002b1c: 429c cmp r4, r3 8002b1e: d101 bne.n 8002b24 <_vfiprintf_r+0xd8> 8002b20: 68b4 ldr r4, [r6, #8] 8002b22: e7a3 b.n 8002a6c <_vfiprintf_r+0x20> 8002b24: 4b4f ldr r3, [pc, #316] ; (8002c64 <_vfiprintf_r+0x218>) 8002b26: 429c cmp r4, r3 8002b28: bf08 it eq 8002b2a: 68f4 ldreq r4, [r6, #12] 8002b2c: e79e b.n 8002a6c <_vfiprintf_r+0x20> 8002b2e: 4621 mov r1, r4 8002b30: 4630 mov r0, r6 8002b32: f7ff fc63 bl 80023fc <__swsetup_r> 8002b36: 2800 cmp r0, #0 8002b38: d09e beq.n 8002a78 <_vfiprintf_r+0x2c> 8002b3a: f04f 30ff mov.w r0, #4294967295 8002b3e: b01d add sp, #116 ; 0x74 8002b40: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002b44: 2b25 cmp r3, #37 ; 0x25 8002b46: d0a7 beq.n 8002a98 <_vfiprintf_r+0x4c> 8002b48: 46a8 mov r8, r5 8002b4a: e7a0 b.n 8002a8e <_vfiprintf_r+0x42> 8002b4c: 4a43 ldr r2, [pc, #268] ; (8002c5c <_vfiprintf_r+0x210>) 8002b4e: 4645 mov r5, r8 8002b50: 1a80 subs r0, r0, r2 8002b52: fa0b f000 lsl.w r0, fp, r0 8002b56: 4318 orrs r0, r3 8002b58: 9004 str r0, [sp, #16] 8002b5a: e7bb b.n 8002ad4 <_vfiprintf_r+0x88> 8002b5c: 9a03 ldr r2, [sp, #12] 8002b5e: 1d11 adds r1, r2, #4 8002b60: 6812 ldr r2, [r2, #0] 8002b62: 9103 str r1, [sp, #12] 8002b64: 2a00 cmp r2, #0 8002b66: db01 blt.n 8002b6c <_vfiprintf_r+0x120> 8002b68: 9207 str r2, [sp, #28] 8002b6a: e004 b.n 8002b76 <_vfiprintf_r+0x12a> 8002b6c: 4252 negs r2, r2 8002b6e: f043 0302 orr.w r3, r3, #2 8002b72: 9207 str r2, [sp, #28] 8002b74: 9304 str r3, [sp, #16] 8002b76: f898 3000 ldrb.w r3, [r8] 8002b7a: 2b2e cmp r3, #46 ; 0x2e 8002b7c: d110 bne.n 8002ba0 <_vfiprintf_r+0x154> 8002b7e: f898 3001 ldrb.w r3, [r8, #1] 8002b82: f108 0101 add.w r1, r8, #1 8002b86: 2b2a cmp r3, #42 ; 0x2a 8002b88: d137 bne.n 8002bfa <_vfiprintf_r+0x1ae> 8002b8a: 9b03 ldr r3, [sp, #12] 8002b8c: f108 0802 add.w r8, r8, #2 8002b90: 1d1a adds r2, r3, #4 8002b92: 681b ldr r3, [r3, #0] 8002b94: 9203 str r2, [sp, #12] 8002b96: 2b00 cmp r3, #0 8002b98: bfb8 it lt 8002b9a: f04f 33ff movlt.w r3, #4294967295 8002b9e: 9305 str r3, [sp, #20] 8002ba0: 4d31 ldr r5, [pc, #196] ; (8002c68 <_vfiprintf_r+0x21c>) 8002ba2: 2203 movs r2, #3 8002ba4: f898 1000 ldrb.w r1, [r8] 8002ba8: 4628 mov r0, r5 8002baa: f000 faa7 bl 80030fc 8002bae: b140 cbz r0, 8002bc2 <_vfiprintf_r+0x176> 8002bb0: 2340 movs r3, #64 ; 0x40 8002bb2: 1b40 subs r0, r0, r5 8002bb4: fa03 f000 lsl.w r0, r3, r0 8002bb8: 9b04 ldr r3, [sp, #16] 8002bba: f108 0801 add.w r8, r8, #1 8002bbe: 4303 orrs r3, r0 8002bc0: 9304 str r3, [sp, #16] 8002bc2: f898 1000 ldrb.w r1, [r8] 8002bc6: 2206 movs r2, #6 8002bc8: 4828 ldr r0, [pc, #160] ; (8002c6c <_vfiprintf_r+0x220>) 8002bca: f108 0701 add.w r7, r8, #1 8002bce: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8002bd2: f000 fa93 bl 80030fc 8002bd6: 2800 cmp r0, #0 8002bd8: d034 beq.n 8002c44 <_vfiprintf_r+0x1f8> 8002bda: 4b25 ldr r3, [pc, #148] ; (8002c70 <_vfiprintf_r+0x224>) 8002bdc: bb03 cbnz r3, 8002c20 <_vfiprintf_r+0x1d4> 8002bde: 9b03 ldr r3, [sp, #12] 8002be0: 3307 adds r3, #7 8002be2: f023 0307 bic.w r3, r3, #7 8002be6: 3308 adds r3, #8 8002be8: 9303 str r3, [sp, #12] 8002bea: 9b09 ldr r3, [sp, #36] ; 0x24 8002bec: 444b add r3, r9 8002bee: 9309 str r3, [sp, #36] ; 0x24 8002bf0: e74c b.n 8002a8c <_vfiprintf_r+0x40> 8002bf2: fb00 3202 mla r2, r0, r2, r3 8002bf6: 2101 movs r1, #1 8002bf8: e786 b.n 8002b08 <_vfiprintf_r+0xbc> 8002bfa: 2300 movs r3, #0 8002bfc: 250a movs r5, #10 8002bfe: 4618 mov r0, r3 8002c00: 9305 str r3, [sp, #20] 8002c02: 4688 mov r8, r1 8002c04: f898 2000 ldrb.w r2, [r8] 8002c08: 3101 adds r1, #1 8002c0a: 3a30 subs r2, #48 ; 0x30 8002c0c: 2a09 cmp r2, #9 8002c0e: d903 bls.n 8002c18 <_vfiprintf_r+0x1cc> 8002c10: 2b00 cmp r3, #0 8002c12: d0c5 beq.n 8002ba0 <_vfiprintf_r+0x154> 8002c14: 9005 str r0, [sp, #20] 8002c16: e7c3 b.n 8002ba0 <_vfiprintf_r+0x154> 8002c18: fb05 2000 mla r0, r5, r0, r2 8002c1c: 2301 movs r3, #1 8002c1e: e7f0 b.n 8002c02 <_vfiprintf_r+0x1b6> 8002c20: ab03 add r3, sp, #12 8002c22: 9300 str r3, [sp, #0] 8002c24: 4622 mov r2, r4 8002c26: 4b13 ldr r3, [pc, #76] ; (8002c74 <_vfiprintf_r+0x228>) 8002c28: a904 add r1, sp, #16 8002c2a: 4630 mov r0, r6 8002c2c: f3af 8000 nop.w 8002c30: f1b0 3fff cmp.w r0, #4294967295 8002c34: 4681 mov r9, r0 8002c36: d1d8 bne.n 8002bea <_vfiprintf_r+0x19e> 8002c38: 89a3 ldrh r3, [r4, #12] 8002c3a: 065b lsls r3, r3, #25 8002c3c: f53f af7d bmi.w 8002b3a <_vfiprintf_r+0xee> 8002c40: 9809 ldr r0, [sp, #36] ; 0x24 8002c42: e77c b.n 8002b3e <_vfiprintf_r+0xf2> 8002c44: ab03 add r3, sp, #12 8002c46: 9300 str r3, [sp, #0] 8002c48: 4622 mov r2, r4 8002c4a: 4b0a ldr r3, [pc, #40] ; (8002c74 <_vfiprintf_r+0x228>) 8002c4c: a904 add r1, sp, #16 8002c4e: 4630 mov r0, r6 8002c50: f000 f88a bl 8002d68 <_printf_i> 8002c54: e7ec b.n 8002c30 <_vfiprintf_r+0x1e4> 8002c56: bf00 nop 8002c58: 08003200 .word 0x08003200 8002c5c: 08003240 .word 0x08003240 8002c60: 08003220 .word 0x08003220 8002c64: 080031e0 .word 0x080031e0 8002c68: 08003246 .word 0x08003246 8002c6c: 0800324a .word 0x0800324a 8002c70: 00000000 .word 0x00000000 8002c74: 08002a29 .word 0x08002a29 08002c78 <_printf_common>: 8002c78: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8002c7c: 4691 mov r9, r2 8002c7e: 461f mov r7, r3 8002c80: 688a ldr r2, [r1, #8] 8002c82: 690b ldr r3, [r1, #16] 8002c84: 4606 mov r6, r0 8002c86: 4293 cmp r3, r2 8002c88: bfb8 it lt 8002c8a: 4613 movlt r3, r2 8002c8c: f8c9 3000 str.w r3, [r9] 8002c90: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8002c94: 460c mov r4, r1 8002c96: f8dd 8020 ldr.w r8, [sp, #32] 8002c9a: b112 cbz r2, 8002ca2 <_printf_common+0x2a> 8002c9c: 3301 adds r3, #1 8002c9e: f8c9 3000 str.w r3, [r9] 8002ca2: 6823 ldr r3, [r4, #0] 8002ca4: 0699 lsls r1, r3, #26 8002ca6: bf42 ittt mi 8002ca8: f8d9 3000 ldrmi.w r3, [r9] 8002cac: 3302 addmi r3, #2 8002cae: f8c9 3000 strmi.w r3, [r9] 8002cb2: 6825 ldr r5, [r4, #0] 8002cb4: f015 0506 ands.w r5, r5, #6 8002cb8: d107 bne.n 8002cca <_printf_common+0x52> 8002cba: f104 0a19 add.w sl, r4, #25 8002cbe: 68e3 ldr r3, [r4, #12] 8002cc0: f8d9 2000 ldr.w r2, [r9] 8002cc4: 1a9b subs r3, r3, r2 8002cc6: 429d cmp r5, r3 8002cc8: db2a blt.n 8002d20 <_printf_common+0xa8> 8002cca: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8002cce: 6822 ldr r2, [r4, #0] 8002cd0: 3300 adds r3, #0 8002cd2: bf18 it ne 8002cd4: 2301 movne r3, #1 8002cd6: 0692 lsls r2, r2, #26 8002cd8: d42f bmi.n 8002d3a <_printf_common+0xc2> 8002cda: f104 0243 add.w r2, r4, #67 ; 0x43 8002cde: 4639 mov r1, r7 8002ce0: 4630 mov r0, r6 8002ce2: 47c0 blx r8 8002ce4: 3001 adds r0, #1 8002ce6: d022 beq.n 8002d2e <_printf_common+0xb6> 8002ce8: 6823 ldr r3, [r4, #0] 8002cea: 68e5 ldr r5, [r4, #12] 8002cec: f003 0306 and.w r3, r3, #6 8002cf0: 2b04 cmp r3, #4 8002cf2: bf18 it ne 8002cf4: 2500 movne r5, #0 8002cf6: f8d9 2000 ldr.w r2, [r9] 8002cfa: f04f 0900 mov.w r9, #0 8002cfe: bf08 it eq 8002d00: 1aad subeq r5, r5, r2 8002d02: 68a3 ldr r3, [r4, #8] 8002d04: 6922 ldr r2, [r4, #16] 8002d06: bf08 it eq 8002d08: ea25 75e5 biceq.w r5, r5, r5, asr #31 8002d0c: 4293 cmp r3, r2 8002d0e: bfc4 itt gt 8002d10: 1a9b subgt r3, r3, r2 8002d12: 18ed addgt r5, r5, r3 8002d14: 341a adds r4, #26 8002d16: 454d cmp r5, r9 8002d18: d11b bne.n 8002d52 <_printf_common+0xda> 8002d1a: 2000 movs r0, #0 8002d1c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002d20: 2301 movs r3, #1 8002d22: 4652 mov r2, sl 8002d24: 4639 mov r1, r7 8002d26: 4630 mov r0, r6 8002d28: 47c0 blx r8 8002d2a: 3001 adds r0, #1 8002d2c: d103 bne.n 8002d36 <_printf_common+0xbe> 8002d2e: f04f 30ff mov.w r0, #4294967295 8002d32: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002d36: 3501 adds r5, #1 8002d38: e7c1 b.n 8002cbe <_printf_common+0x46> 8002d3a: 2030 movs r0, #48 ; 0x30 8002d3c: 18e1 adds r1, r4, r3 8002d3e: f881 0043 strb.w r0, [r1, #67] ; 0x43 8002d42: 1c5a adds r2, r3, #1 8002d44: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8002d48: 4422 add r2, r4 8002d4a: 3302 adds r3, #2 8002d4c: f882 1043 strb.w r1, [r2, #67] ; 0x43 8002d50: e7c3 b.n 8002cda <_printf_common+0x62> 8002d52: 2301 movs r3, #1 8002d54: 4622 mov r2, r4 8002d56: 4639 mov r1, r7 8002d58: 4630 mov r0, r6 8002d5a: 47c0 blx r8 8002d5c: 3001 adds r0, #1 8002d5e: d0e6 beq.n 8002d2e <_printf_common+0xb6> 8002d60: f109 0901 add.w r9, r9, #1 8002d64: e7d7 b.n 8002d16 <_printf_common+0x9e> ... 08002d68 <_printf_i>: 8002d68: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8002d6c: 4617 mov r7, r2 8002d6e: 7e0a ldrb r2, [r1, #24] 8002d70: b085 sub sp, #20 8002d72: 2a6e cmp r2, #110 ; 0x6e 8002d74: 4698 mov r8, r3 8002d76: 4606 mov r6, r0 8002d78: 460c mov r4, r1 8002d7a: 9b0c ldr r3, [sp, #48] ; 0x30 8002d7c: f101 0e43 add.w lr, r1, #67 ; 0x43 8002d80: f000 80bc beq.w 8002efc <_printf_i+0x194> 8002d84: d81a bhi.n 8002dbc <_printf_i+0x54> 8002d86: 2a63 cmp r2, #99 ; 0x63 8002d88: d02e beq.n 8002de8 <_printf_i+0x80> 8002d8a: d80a bhi.n 8002da2 <_printf_i+0x3a> 8002d8c: 2a00 cmp r2, #0 8002d8e: f000 80c8 beq.w 8002f22 <_printf_i+0x1ba> 8002d92: 2a58 cmp r2, #88 ; 0x58 8002d94: f000 808a beq.w 8002eac <_printf_i+0x144> 8002d98: f104 0542 add.w r5, r4, #66 ; 0x42 8002d9c: f884 2042 strb.w r2, [r4, #66] ; 0x42 8002da0: e02a b.n 8002df8 <_printf_i+0x90> 8002da2: 2a64 cmp r2, #100 ; 0x64 8002da4: d001 beq.n 8002daa <_printf_i+0x42> 8002da6: 2a69 cmp r2, #105 ; 0x69 8002da8: d1f6 bne.n 8002d98 <_printf_i+0x30> 8002daa: 6821 ldr r1, [r4, #0] 8002dac: 681a ldr r2, [r3, #0] 8002dae: f011 0f80 tst.w r1, #128 ; 0x80 8002db2: d023 beq.n 8002dfc <_printf_i+0x94> 8002db4: 1d11 adds r1, r2, #4 8002db6: 6019 str r1, [r3, #0] 8002db8: 6813 ldr r3, [r2, #0] 8002dba: e027 b.n 8002e0c <_printf_i+0xa4> 8002dbc: 2a73 cmp r2, #115 ; 0x73 8002dbe: f000 80b4 beq.w 8002f2a <_printf_i+0x1c2> 8002dc2: d808 bhi.n 8002dd6 <_printf_i+0x6e> 8002dc4: 2a6f cmp r2, #111 ; 0x6f 8002dc6: d02a beq.n 8002e1e <_printf_i+0xb6> 8002dc8: 2a70 cmp r2, #112 ; 0x70 8002dca: d1e5 bne.n 8002d98 <_printf_i+0x30> 8002dcc: 680a ldr r2, [r1, #0] 8002dce: f042 0220 orr.w r2, r2, #32 8002dd2: 600a str r2, [r1, #0] 8002dd4: e003 b.n 8002dde <_printf_i+0x76> 8002dd6: 2a75 cmp r2, #117 ; 0x75 8002dd8: d021 beq.n 8002e1e <_printf_i+0xb6> 8002dda: 2a78 cmp r2, #120 ; 0x78 8002ddc: d1dc bne.n 8002d98 <_printf_i+0x30> 8002dde: 2278 movs r2, #120 ; 0x78 8002de0: 496f ldr r1, [pc, #444] ; (8002fa0 <_printf_i+0x238>) 8002de2: f884 2045 strb.w r2, [r4, #69] ; 0x45 8002de6: e064 b.n 8002eb2 <_printf_i+0x14a> 8002de8: 681a ldr r2, [r3, #0] 8002dea: f101 0542 add.w r5, r1, #66 ; 0x42 8002dee: 1d11 adds r1, r2, #4 8002df0: 6019 str r1, [r3, #0] 8002df2: 6813 ldr r3, [r2, #0] 8002df4: f884 3042 strb.w r3, [r4, #66] ; 0x42 8002df8: 2301 movs r3, #1 8002dfa: e0a3 b.n 8002f44 <_printf_i+0x1dc> 8002dfc: f011 0f40 tst.w r1, #64 ; 0x40 8002e00: f102 0104 add.w r1, r2, #4 8002e04: 6019 str r1, [r3, #0] 8002e06: d0d7 beq.n 8002db8 <_printf_i+0x50> 8002e08: f9b2 3000 ldrsh.w r3, [r2] 8002e0c: 2b00 cmp r3, #0 8002e0e: da03 bge.n 8002e18 <_printf_i+0xb0> 8002e10: 222d movs r2, #45 ; 0x2d 8002e12: 425b negs r3, r3 8002e14: f884 2043 strb.w r2, [r4, #67] ; 0x43 8002e18: 4962 ldr r1, [pc, #392] ; (8002fa4 <_printf_i+0x23c>) 8002e1a: 220a movs r2, #10 8002e1c: e017 b.n 8002e4e <_printf_i+0xe6> 8002e1e: 6820 ldr r0, [r4, #0] 8002e20: 6819 ldr r1, [r3, #0] 8002e22: f010 0f80 tst.w r0, #128 ; 0x80 8002e26: d003 beq.n 8002e30 <_printf_i+0xc8> 8002e28: 1d08 adds r0, r1, #4 8002e2a: 6018 str r0, [r3, #0] 8002e2c: 680b ldr r3, [r1, #0] 8002e2e: e006 b.n 8002e3e <_printf_i+0xd6> 8002e30: f010 0f40 tst.w r0, #64 ; 0x40 8002e34: f101 0004 add.w r0, r1, #4 8002e38: 6018 str r0, [r3, #0] 8002e3a: d0f7 beq.n 8002e2c <_printf_i+0xc4> 8002e3c: 880b ldrh r3, [r1, #0] 8002e3e: 2a6f cmp r2, #111 ; 0x6f 8002e40: bf14 ite ne 8002e42: 220a movne r2, #10 8002e44: 2208 moveq r2, #8 8002e46: 4957 ldr r1, [pc, #348] ; (8002fa4 <_printf_i+0x23c>) 8002e48: 2000 movs r0, #0 8002e4a: f884 0043 strb.w r0, [r4, #67] ; 0x43 8002e4e: 6865 ldr r5, [r4, #4] 8002e50: 2d00 cmp r5, #0 8002e52: 60a5 str r5, [r4, #8] 8002e54: f2c0 809c blt.w 8002f90 <_printf_i+0x228> 8002e58: 6820 ldr r0, [r4, #0] 8002e5a: f020 0004 bic.w r0, r0, #4 8002e5e: 6020 str r0, [r4, #0] 8002e60: 2b00 cmp r3, #0 8002e62: d13f bne.n 8002ee4 <_printf_i+0x17c> 8002e64: 2d00 cmp r5, #0 8002e66: f040 8095 bne.w 8002f94 <_printf_i+0x22c> 8002e6a: 4675 mov r5, lr 8002e6c: 2a08 cmp r2, #8 8002e6e: d10b bne.n 8002e88 <_printf_i+0x120> 8002e70: 6823 ldr r3, [r4, #0] 8002e72: 07da lsls r2, r3, #31 8002e74: d508 bpl.n 8002e88 <_printf_i+0x120> 8002e76: 6923 ldr r3, [r4, #16] 8002e78: 6862 ldr r2, [r4, #4] 8002e7a: 429a cmp r2, r3 8002e7c: bfde ittt le 8002e7e: 2330 movle r3, #48 ; 0x30 8002e80: f805 3c01 strble.w r3, [r5, #-1] 8002e84: f105 35ff addle.w r5, r5, #4294967295 8002e88: ebae 0305 sub.w r3, lr, r5 8002e8c: 6123 str r3, [r4, #16] 8002e8e: f8cd 8000 str.w r8, [sp] 8002e92: 463b mov r3, r7 8002e94: aa03 add r2, sp, #12 8002e96: 4621 mov r1, r4 8002e98: 4630 mov r0, r6 8002e9a: f7ff feed bl 8002c78 <_printf_common> 8002e9e: 3001 adds r0, #1 8002ea0: d155 bne.n 8002f4e <_printf_i+0x1e6> 8002ea2: f04f 30ff mov.w r0, #4294967295 8002ea6: b005 add sp, #20 8002ea8: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8002eac: f881 2045 strb.w r2, [r1, #69] ; 0x45 8002eb0: 493c ldr r1, [pc, #240] ; (8002fa4 <_printf_i+0x23c>) 8002eb2: 6822 ldr r2, [r4, #0] 8002eb4: 6818 ldr r0, [r3, #0] 8002eb6: f012 0f80 tst.w r2, #128 ; 0x80 8002eba: f100 0504 add.w r5, r0, #4 8002ebe: 601d str r5, [r3, #0] 8002ec0: d001 beq.n 8002ec6 <_printf_i+0x15e> 8002ec2: 6803 ldr r3, [r0, #0] 8002ec4: e002 b.n 8002ecc <_printf_i+0x164> 8002ec6: 0655 lsls r5, r2, #25 8002ec8: d5fb bpl.n 8002ec2 <_printf_i+0x15a> 8002eca: 8803 ldrh r3, [r0, #0] 8002ecc: 07d0 lsls r0, r2, #31 8002ece: bf44 itt mi 8002ed0: f042 0220 orrmi.w r2, r2, #32 8002ed4: 6022 strmi r2, [r4, #0] 8002ed6: b91b cbnz r3, 8002ee0 <_printf_i+0x178> 8002ed8: 6822 ldr r2, [r4, #0] 8002eda: f022 0220 bic.w r2, r2, #32 8002ede: 6022 str r2, [r4, #0] 8002ee0: 2210 movs r2, #16 8002ee2: e7b1 b.n 8002e48 <_printf_i+0xe0> 8002ee4: 4675 mov r5, lr 8002ee6: fbb3 f0f2 udiv r0, r3, r2 8002eea: fb02 3310 mls r3, r2, r0, r3 8002eee: 5ccb ldrb r3, [r1, r3] 8002ef0: f805 3d01 strb.w r3, [r5, #-1]! 8002ef4: 4603 mov r3, r0 8002ef6: 2800 cmp r0, #0 8002ef8: d1f5 bne.n 8002ee6 <_printf_i+0x17e> 8002efa: e7b7 b.n 8002e6c <_printf_i+0x104> 8002efc: 6808 ldr r0, [r1, #0] 8002efe: 681a ldr r2, [r3, #0] 8002f00: f010 0f80 tst.w r0, #128 ; 0x80 8002f04: 6949 ldr r1, [r1, #20] 8002f06: d004 beq.n 8002f12 <_printf_i+0x1aa> 8002f08: 1d10 adds r0, r2, #4 8002f0a: 6018 str r0, [r3, #0] 8002f0c: 6813 ldr r3, [r2, #0] 8002f0e: 6019 str r1, [r3, #0] 8002f10: e007 b.n 8002f22 <_printf_i+0x1ba> 8002f12: f010 0f40 tst.w r0, #64 ; 0x40 8002f16: f102 0004 add.w r0, r2, #4 8002f1a: 6018 str r0, [r3, #0] 8002f1c: 6813 ldr r3, [r2, #0] 8002f1e: d0f6 beq.n 8002f0e <_printf_i+0x1a6> 8002f20: 8019 strh r1, [r3, #0] 8002f22: 2300 movs r3, #0 8002f24: 4675 mov r5, lr 8002f26: 6123 str r3, [r4, #16] 8002f28: e7b1 b.n 8002e8e <_printf_i+0x126> 8002f2a: 681a ldr r2, [r3, #0] 8002f2c: 1d11 adds r1, r2, #4 8002f2e: 6019 str r1, [r3, #0] 8002f30: 6815 ldr r5, [r2, #0] 8002f32: 2100 movs r1, #0 8002f34: 6862 ldr r2, [r4, #4] 8002f36: 4628 mov r0, r5 8002f38: f000 f8e0 bl 80030fc 8002f3c: b108 cbz r0, 8002f42 <_printf_i+0x1da> 8002f3e: 1b40 subs r0, r0, r5 8002f40: 6060 str r0, [r4, #4] 8002f42: 6863 ldr r3, [r4, #4] 8002f44: 6123 str r3, [r4, #16] 8002f46: 2300 movs r3, #0 8002f48: f884 3043 strb.w r3, [r4, #67] ; 0x43 8002f4c: e79f b.n 8002e8e <_printf_i+0x126> 8002f4e: 6923 ldr r3, [r4, #16] 8002f50: 462a mov r2, r5 8002f52: 4639 mov r1, r7 8002f54: 4630 mov r0, r6 8002f56: 47c0 blx r8 8002f58: 3001 adds r0, #1 8002f5a: d0a2 beq.n 8002ea2 <_printf_i+0x13a> 8002f5c: 6823 ldr r3, [r4, #0] 8002f5e: 079b lsls r3, r3, #30 8002f60: d507 bpl.n 8002f72 <_printf_i+0x20a> 8002f62: 2500 movs r5, #0 8002f64: f104 0919 add.w r9, r4, #25 8002f68: 68e3 ldr r3, [r4, #12] 8002f6a: 9a03 ldr r2, [sp, #12] 8002f6c: 1a9b subs r3, r3, r2 8002f6e: 429d cmp r5, r3 8002f70: db05 blt.n 8002f7e <_printf_i+0x216> 8002f72: 68e0 ldr r0, [r4, #12] 8002f74: 9b03 ldr r3, [sp, #12] 8002f76: 4298 cmp r0, r3 8002f78: bfb8 it lt 8002f7a: 4618 movlt r0, r3 8002f7c: e793 b.n 8002ea6 <_printf_i+0x13e> 8002f7e: 2301 movs r3, #1 8002f80: 464a mov r2, r9 8002f82: 4639 mov r1, r7 8002f84: 4630 mov r0, r6 8002f86: 47c0 blx r8 8002f88: 3001 adds r0, #1 8002f8a: d08a beq.n 8002ea2 <_printf_i+0x13a> 8002f8c: 3501 adds r5, #1 8002f8e: e7eb b.n 8002f68 <_printf_i+0x200> 8002f90: 2b00 cmp r3, #0 8002f92: d1a7 bne.n 8002ee4 <_printf_i+0x17c> 8002f94: 780b ldrb r3, [r1, #0] 8002f96: f104 0542 add.w r5, r4, #66 ; 0x42 8002f9a: f884 3042 strb.w r3, [r4, #66] ; 0x42 8002f9e: e765 b.n 8002e6c <_printf_i+0x104> 8002fa0: 08003262 .word 0x08003262 8002fa4: 08003251 .word 0x08003251 08002fa8 <_sbrk_r>: 8002fa8: b538 push {r3, r4, r5, lr} 8002faa: 2300 movs r3, #0 8002fac: 4c05 ldr r4, [pc, #20] ; (8002fc4 <_sbrk_r+0x1c>) 8002fae: 4605 mov r5, r0 8002fb0: 4608 mov r0, r1 8002fb2: 6023 str r3, [r4, #0] 8002fb4: f7fe ff92 bl 8001edc <_sbrk> 8002fb8: 1c43 adds r3, r0, #1 8002fba: d102 bne.n 8002fc2 <_sbrk_r+0x1a> 8002fbc: 6823 ldr r3, [r4, #0] 8002fbe: b103 cbz r3, 8002fc2 <_sbrk_r+0x1a> 8002fc0: 602b str r3, [r5, #0] 8002fc2: bd38 pop {r3, r4, r5, pc} 8002fc4: 20000a14 .word 0x20000a14 08002fc8 <__sread>: 8002fc8: b510 push {r4, lr} 8002fca: 460c mov r4, r1 8002fcc: f9b1 100e ldrsh.w r1, [r1, #14] 8002fd0: f000 f8a4 bl 800311c <_read_r> 8002fd4: 2800 cmp r0, #0 8002fd6: bfab itete ge 8002fd8: 6d63 ldrge r3, [r4, #84] ; 0x54 8002fda: 89a3 ldrhlt r3, [r4, #12] 8002fdc: 181b addge r3, r3, r0 8002fde: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 8002fe2: bfac ite ge 8002fe4: 6563 strge r3, [r4, #84] ; 0x54 8002fe6: 81a3 strhlt r3, [r4, #12] 8002fe8: bd10 pop {r4, pc} 08002fea <__swrite>: 8002fea: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8002fee: 461f mov r7, r3 8002ff0: 898b ldrh r3, [r1, #12] 8002ff2: 4605 mov r5, r0 8002ff4: 05db lsls r3, r3, #23 8002ff6: 460c mov r4, r1 8002ff8: 4616 mov r6, r2 8002ffa: d505 bpl.n 8003008 <__swrite+0x1e> 8002ffc: 2302 movs r3, #2 8002ffe: 2200 movs r2, #0 8003000: f9b1 100e ldrsh.w r1, [r1, #14] 8003004: f000 f868 bl 80030d8 <_lseek_r> 8003008: 89a3 ldrh r3, [r4, #12] 800300a: 4632 mov r2, r6 800300c: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8003010: 81a3 strh r3, [r4, #12] 8003012: f9b4 100e ldrsh.w r1, [r4, #14] 8003016: 463b mov r3, r7 8003018: 4628 mov r0, r5 800301a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800301e: f000 b817 b.w 8003050 <_write_r> 08003022 <__sseek>: 8003022: b510 push {r4, lr} 8003024: 460c mov r4, r1 8003026: f9b1 100e ldrsh.w r1, [r1, #14] 800302a: f000 f855 bl 80030d8 <_lseek_r> 800302e: 1c43 adds r3, r0, #1 8003030: 89a3 ldrh r3, [r4, #12] 8003032: bf15 itete ne 8003034: 6560 strne r0, [r4, #84] ; 0x54 8003036: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800303a: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800303e: 81a3 strheq r3, [r4, #12] 8003040: bf18 it ne 8003042: 81a3 strhne r3, [r4, #12] 8003044: bd10 pop {r4, pc} 08003046 <__sclose>: 8003046: f9b1 100e ldrsh.w r1, [r1, #14] 800304a: f000 b813 b.w 8003074 <_close_r> ... 08003050 <_write_r>: 8003050: b538 push {r3, r4, r5, lr} 8003052: 4605 mov r5, r0 8003054: 4608 mov r0, r1 8003056: 4611 mov r1, r2 8003058: 2200 movs r2, #0 800305a: 4c05 ldr r4, [pc, #20] ; (8003070 <_write_r+0x20>) 800305c: 6022 str r2, [r4, #0] 800305e: 461a mov r2, r3 8003060: f7fe fd64 bl 8001b2c <_write> 8003064: 1c43 adds r3, r0, #1 8003066: d102 bne.n 800306e <_write_r+0x1e> 8003068: 6823 ldr r3, [r4, #0] 800306a: b103 cbz r3, 800306e <_write_r+0x1e> 800306c: 602b str r3, [r5, #0] 800306e: bd38 pop {r3, r4, r5, pc} 8003070: 20000a14 .word 0x20000a14 08003074 <_close_r>: 8003074: b538 push {r3, r4, r5, lr} 8003076: 2300 movs r3, #0 8003078: 4c05 ldr r4, [pc, #20] ; (8003090 <_close_r+0x1c>) 800307a: 4605 mov r5, r0 800307c: 4608 mov r0, r1 800307e: 6023 str r3, [r4, #0] 8003080: f7fe ff46 bl 8001f10 <_close> 8003084: 1c43 adds r3, r0, #1 8003086: d102 bne.n 800308e <_close_r+0x1a> 8003088: 6823 ldr r3, [r4, #0] 800308a: b103 cbz r3, 800308e <_close_r+0x1a> 800308c: 602b str r3, [r5, #0] 800308e: bd38 pop {r3, r4, r5, pc} 8003090: 20000a14 .word 0x20000a14 08003094 <_fstat_r>: 8003094: b538 push {r3, r4, r5, lr} 8003096: 2300 movs r3, #0 8003098: 4c06 ldr r4, [pc, #24] ; (80030b4 <_fstat_r+0x20>) 800309a: 4605 mov r5, r0 800309c: 4608 mov r0, r1 800309e: 4611 mov r1, r2 80030a0: 6023 str r3, [r4, #0] 80030a2: f7fe ff38 bl 8001f16 <_fstat> 80030a6: 1c43 adds r3, r0, #1 80030a8: d102 bne.n 80030b0 <_fstat_r+0x1c> 80030aa: 6823 ldr r3, [r4, #0] 80030ac: b103 cbz r3, 80030b0 <_fstat_r+0x1c> 80030ae: 602b str r3, [r5, #0] 80030b0: bd38 pop {r3, r4, r5, pc} 80030b2: bf00 nop 80030b4: 20000a14 .word 0x20000a14 080030b8 <_isatty_r>: 80030b8: b538 push {r3, r4, r5, lr} 80030ba: 2300 movs r3, #0 80030bc: 4c05 ldr r4, [pc, #20] ; (80030d4 <_isatty_r+0x1c>) 80030be: 4605 mov r5, r0 80030c0: 4608 mov r0, r1 80030c2: 6023 str r3, [r4, #0] 80030c4: f7fe ff2c bl 8001f20 <_isatty> 80030c8: 1c43 adds r3, r0, #1 80030ca: d102 bne.n 80030d2 <_isatty_r+0x1a> 80030cc: 6823 ldr r3, [r4, #0] 80030ce: b103 cbz r3, 80030d2 <_isatty_r+0x1a> 80030d0: 602b str r3, [r5, #0] 80030d2: bd38 pop {r3, r4, r5, pc} 80030d4: 20000a14 .word 0x20000a14 080030d8 <_lseek_r>: 80030d8: b538 push {r3, r4, r5, lr} 80030da: 4605 mov r5, r0 80030dc: 4608 mov r0, r1 80030de: 4611 mov r1, r2 80030e0: 2200 movs r2, #0 80030e2: 4c05 ldr r4, [pc, #20] ; (80030f8 <_lseek_r+0x20>) 80030e4: 6022 str r2, [r4, #0] 80030e6: 461a mov r2, r3 80030e8: f7fe ff1c bl 8001f24 <_lseek> 80030ec: 1c43 adds r3, r0, #1 80030ee: d102 bne.n 80030f6 <_lseek_r+0x1e> 80030f0: 6823 ldr r3, [r4, #0] 80030f2: b103 cbz r3, 80030f6 <_lseek_r+0x1e> 80030f4: 602b str r3, [r5, #0] 80030f6: bd38 pop {r3, r4, r5, pc} 80030f8: 20000a14 .word 0x20000a14 080030fc : 80030fc: b510 push {r4, lr} 80030fe: b2c9 uxtb r1, r1 8003100: 4402 add r2, r0 8003102: 4290 cmp r0, r2 8003104: 4603 mov r3, r0 8003106: d101 bne.n 800310c 8003108: 2000 movs r0, #0 800310a: bd10 pop {r4, pc} 800310c: 781c ldrb r4, [r3, #0] 800310e: 3001 adds r0, #1 8003110: 428c cmp r4, r1 8003112: d1f6 bne.n 8003102 8003114: 4618 mov r0, r3 8003116: bd10 pop {r4, pc} 08003118 <__malloc_lock>: 8003118: 4770 bx lr 0800311a <__malloc_unlock>: 800311a: 4770 bx lr 0800311c <_read_r>: 800311c: b538 push {r3, r4, r5, lr} 800311e: 4605 mov r5, r0 8003120: 4608 mov r0, r1 8003122: 4611 mov r1, r2 8003124: 2200 movs r2, #0 8003126: 4c05 ldr r4, [pc, #20] ; (800313c <_read_r+0x20>) 8003128: 6022 str r2, [r4, #0] 800312a: 461a mov r2, r3 800312c: f7fe fec8 bl 8001ec0 <_read> 8003130: 1c43 adds r3, r0, #1 8003132: d102 bne.n 800313a <_read_r+0x1e> 8003134: 6823 ldr r3, [r4, #0] 8003136: b103 cbz r3, 800313a <_read_r+0x1e> 8003138: 602b str r3, [r5, #0] 800313a: bd38 pop {r3, r4, r5, pc} 800313c: 20000a14 .word 0x20000a14 08003140 <_init>: 8003140: b5f8 push {r3, r4, r5, r6, r7, lr} 8003142: bf00 nop 8003144: bcf8 pop {r3, r4, r5, r6, r7} 8003146: bc08 pop {r3} 8003148: 469e mov lr, r3 800314a: 4770 bx lr 0800314c <_fini>: 800314c: b5f8 push {r3, r4, r5, r6, r7, lr} 800314e: bf00 nop 8003150: bcf8 pop {r3, r4, r5, r6, r7} 8003152: bc08 pop {r3} 8003154: 469e mov lr, r3 8003156: 4770 bx lr