|
@@ -1,710 +0,0 @@
|
1
|
|
-/**
|
2
|
|
- ******************************************************************************
|
3
|
|
- * @file stm32f1xx_hal_adc_ex.h
|
4
|
|
- * @author MCD Application Team
|
5
|
|
- * @brief Header file of ADC HAL extension module.
|
6
|
|
- ******************************************************************************
|
7
|
|
- * @attention
|
8
|
|
- *
|
9
|
|
- * <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
10
|
|
- * All rights reserved.</center></h2>
|
11
|
|
- *
|
12
|
|
- * This software component is licensed by ST under BSD 3-Clause license,
|
13
|
|
- * the "License"; You may not use this file except in compliance with the
|
14
|
|
- * License. You may obtain a copy of the License at:
|
15
|
|
- * opensource.org/licenses/BSD-3-Clause
|
16
|
|
- *
|
17
|
|
- ******************************************************************************
|
18
|
|
- */
|
19
|
|
-
|
20
|
|
-/* Define to prevent recursive inclusion -------------------------------------*/
|
21
|
|
-#ifndef __STM32F1xx_HAL_ADC_EX_H
|
22
|
|
-#define __STM32F1xx_HAL_ADC_EX_H
|
23
|
|
-
|
24
|
|
-#ifdef __cplusplus
|
25
|
|
- extern "C" {
|
26
|
|
-#endif
|
27
|
|
-
|
28
|
|
-/* Includes ------------------------------------------------------------------*/
|
29
|
|
-#include "stm32f1xx_hal_def.h"
|
30
|
|
-
|
31
|
|
-/** @addtogroup STM32F1xx_HAL_Driver
|
32
|
|
- * @{
|
33
|
|
- */
|
34
|
|
-
|
35
|
|
-/** @addtogroup ADCEx
|
36
|
|
- * @{
|
37
|
|
- */
|
38
|
|
-
|
39
|
|
-/* Exported types ------------------------------------------------------------*/
|
40
|
|
-/** @defgroup ADCEx_Exported_Types ADCEx Exported Types
|
41
|
|
- * @{
|
42
|
|
- */
|
43
|
|
-
|
44
|
|
-/**
|
45
|
|
- * @brief ADC Configuration injected Channel structure definition
|
46
|
|
- * @note Parameters of this structure are shared within 2 scopes:
|
47
|
|
- * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
|
48
|
|
- * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
|
49
|
|
- * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
|
50
|
|
- * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
|
51
|
|
- * ADC state can be either:
|
52
|
|
- * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
|
53
|
|
- * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
|
54
|
|
- */
|
55
|
|
-typedef struct
|
56
|
|
-{
|
57
|
|
- uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
|
58
|
|
- This parameter can be a value of @ref ADC_channels
|
59
|
|
- Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
|
60
|
|
- Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
|
61
|
|
- Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
|
62
|
|
- It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
|
63
|
|
- Refer to errata sheet of these devices for more details. */
|
64
|
|
- uint32_t InjectedRank; /*!< Rank in the injected group sequencer
|
65
|
|
- This parameter must be a value of @ref ADCEx_injected_rank
|
66
|
|
- Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
|
67
|
|
- uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
|
68
|
|
- Unit: ADC clock cycles
|
69
|
|
- Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
|
70
|
|
- This parameter can be a value of @ref ADC_sampling_times
|
71
|
|
- Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
|
72
|
|
- If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
|
73
|
|
- Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
|
74
|
|
- sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
|
75
|
|
- Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
|
76
|
|
- uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
|
77
|
|
- Offset value must be a positive number.
|
78
|
|
- Depending of ADC resolution selected (12, 10, 8 or 6 bits),
|
79
|
|
- this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
|
80
|
|
- uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
|
81
|
|
- To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
82
|
|
- This parameter must be a number between Min_Data = 1 and Max_Data = 4.
|
83
|
|
- Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
84
|
|
- configure a channel on injected group can impact the configuration of other channels previously set. */
|
85
|
|
- FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
86
|
|
- Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
87
|
|
- Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
88
|
|
- This parameter can be set to ENABLE or DISABLE.
|
89
|
|
- Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
|
90
|
|
- Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
91
|
|
- configure a channel on injected group can impact the configuration of other channels previously set. */
|
92
|
|
- FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
|
93
|
|
- This parameter can be set to ENABLE or DISABLE.
|
94
|
|
- Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
|
95
|
|
- Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
|
96
|
|
- Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
|
97
|
|
- To maintain JAUTO always enabled, DMA must be configured in circular mode.
|
98
|
|
- Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
99
|
|
- configure a channel on injected group can impact the configuration of other channels previously set. */
|
100
|
|
- uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
|
101
|
|
- If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
|
102
|
|
- If set to external trigger source, triggering is on event rising edge.
|
103
|
|
- This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
|
104
|
|
- Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
|
105
|
|
- If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
|
106
|
|
- Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
107
|
|
- configure a channel on injected group can impact the configuration of other channels previously set. */
|
108
|
|
-}ADC_InjectionConfTypeDef;
|
109
|
|
-
|
110
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
111
|
|
-/**
|
112
|
|
- * @brief Structure definition of ADC multimode
|
113
|
|
- * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
|
114
|
|
- * State of ADCs of the common group must be: disabled.
|
115
|
|
- */
|
116
|
|
-typedef struct
|
117
|
|
-{
|
118
|
|
- uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
|
119
|
|
- This parameter can be a value of @ref ADCEx_Common_mode
|
120
|
|
- Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
|
121
|
|
- Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
|
122
|
|
- Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
|
123
|
|
- Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
|
124
|
|
- The equivalences are:
|
125
|
|
- - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
|
126
|
|
- - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
|
127
|
|
-
|
128
|
|
-
|
129
|
|
-}ADC_MultiModeTypeDef;
|
130
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
131
|
|
-
|
132
|
|
-/**
|
133
|
|
- * @}
|
134
|
|
- */
|
135
|
|
-
|
136
|
|
-
|
137
|
|
-/* Exported constants --------------------------------------------------------*/
|
138
|
|
-
|
139
|
|
-/** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
|
140
|
|
- * @{
|
141
|
|
- */
|
142
|
|
-
|
143
|
|
-/** @defgroup ADCEx_injected_rank ADCEx rank into injected group
|
144
|
|
- * @{
|
145
|
|
- */
|
146
|
|
-#define ADC_INJECTED_RANK_1 0x00000001U
|
147
|
|
-#define ADC_INJECTED_RANK_2 0x00000002U
|
148
|
|
-#define ADC_INJECTED_RANK_3 0x00000003U
|
149
|
|
-#define ADC_INJECTED_RANK_4 0x00000004U
|
150
|
|
-/**
|
151
|
|
- * @}
|
152
|
|
- */
|
153
|
|
-
|
154
|
|
-/** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
|
155
|
|
- * @{
|
156
|
|
- */
|
157
|
|
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE 0x00000000U
|
158
|
|
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG)
|
159
|
|
-/**
|
160
|
|
- * @}
|
161
|
|
- */
|
162
|
|
-
|
163
|
|
-/** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
|
164
|
|
- * @{
|
165
|
|
- */
|
166
|
|
-/*!< List of external triggers with generic trigger name, independently of */
|
167
|
|
-/* ADC target, sorted by trigger name: */
|
168
|
|
-
|
169
|
|
-/*!< External triggers of regular group for ADC1&ADC2 only */
|
170
|
|
-#define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
|
171
|
|
-#define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2
|
172
|
|
-#define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2
|
173
|
|
-#define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
|
174
|
|
-#define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4
|
175
|
|
-#define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11
|
176
|
|
-
|
177
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
178
|
|
-/*!< External triggers of regular group for ADC3 only */
|
179
|
|
-#define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3
|
180
|
|
-#define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1
|
181
|
|
-#define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1
|
182
|
|
-#define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3
|
183
|
|
-#define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1
|
184
|
|
-#endif /* STM32F103xE || defined STM32F103xG */
|
185
|
|
-
|
186
|
|
-/*!< External triggers of regular group for all ADC instances */
|
187
|
|
-#define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3
|
188
|
|
-
|
189
|
|
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
|
190
|
|
-/*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
|
191
|
|
-/* XL-density devices. */
|
192
|
|
-/* To use it on ADC or ADC2, a remap of trigger must be done from */
|
193
|
|
-/* EXTI line 11 to TIM8_TRGO with macro: */
|
194
|
|
-/* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */
|
195
|
|
-/* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */
|
196
|
|
-
|
197
|
|
-/* Note for internal constant value management: If TIM8_TRGO is available, */
|
198
|
|
-/* its definition is set to value for ADC1&ADC2 by default and changed to */
|
199
|
|
-/* value for ADC3 by HAL ADC driver if ADC3 is selected. */
|
200
|
|
-#define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO
|
201
|
|
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
|
202
|
|
-
|
203
|
|
-#define ADC_SOFTWARE_START ADC1_2_3_SWSTART
|
204
|
|
-/**
|
205
|
|
- * @}
|
206
|
|
- */
|
207
|
|
-
|
208
|
|
-/** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
|
209
|
|
- * @{
|
210
|
|
- */
|
211
|
|
-/*!< List of external triggers with generic trigger name, independently of */
|
212
|
|
-/* ADC target, sorted by trigger name: */
|
213
|
|
-
|
214
|
|
-/*!< External triggers of injected group for ADC1&ADC2 only */
|
215
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
|
216
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
|
217
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
|
218
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
|
219
|
|
-#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
|
220
|
|
-
|
221
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
222
|
|
-/*!< External triggers of injected group for ADC3 only */
|
223
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3
|
224
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2
|
225
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO
|
226
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4
|
227
|
|
-#endif /* STM32F103xE || defined STM32F103xG */
|
228
|
|
-
|
229
|
|
-/*!< External triggers of injected group for all ADC instances */
|
230
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
|
231
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
|
232
|
|
-
|
233
|
|
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
|
234
|
|
-/*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
|
235
|
|
-/* XL-density devices. */
|
236
|
|
-/* To use it on ADC1 or ADC2, a remap of trigger must be done from */
|
237
|
|
-/* EXTI line 11 to TIM8_CC4 with macro: */
|
238
|
|
-/* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */
|
239
|
|
-/* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */
|
240
|
|
-
|
241
|
|
-/* Note for internal constant value management: If TIM8_CC4 is available, */
|
242
|
|
-/* its definition is set to value for ADC1&ADC2 by default and changed to */
|
243
|
|
-/* value for ADC3 by HAL ADC driver if ADC3 is selected. */
|
244
|
|
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4
|
245
|
|
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
|
246
|
|
-
|
247
|
|
-#define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART
|
248
|
|
-/**
|
249
|
|
- * @}
|
250
|
|
- */
|
251
|
|
-
|
252
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
253
|
|
-/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
|
254
|
|
- * @{
|
255
|
|
- */
|
256
|
|
-#define ADC_MODE_INDEPENDENT 0x00000000U /*!< ADC dual mode disabled (ADC independent mode) */
|
257
|
|
-#define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
|
258
|
|
-#define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
|
259
|
|
-#define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
|
260
|
|
-#define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
|
261
|
|
-#define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
|
262
|
|
-#define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
|
263
|
|
-#define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
|
264
|
|
-#define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
|
265
|
|
-#define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
|
266
|
|
-/**
|
267
|
|
- * @}
|
268
|
|
- */
|
269
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
270
|
|
-
|
271
|
|
-/**
|
272
|
|
- * @}
|
273
|
|
- */
|
274
|
|
-
|
275
|
|
-
|
276
|
|
-/* Private constants ---------------------------------------------------------*/
|
277
|
|
-
|
278
|
|
-/** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
|
279
|
|
- * @{
|
280
|
|
- */
|
281
|
|
-
|
282
|
|
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
|
283
|
|
- * @{
|
284
|
|
- */
|
285
|
|
-/* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */
|
286
|
|
-/* instance is available on the selected device). */
|
287
|
|
-/* (used internally by HAL driver. To not use into HAL structure parameters) */
|
288
|
|
-
|
289
|
|
-/* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
|
290
|
|
-#define ADC1_2_EXTERNALTRIG_T1_CC1 0x00000000U
|
291
|
|
-#define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0))
|
292
|
|
-#define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
|
293
|
|
-#define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 ))
|
294
|
|
-#define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
|
295
|
|
-#define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 ))
|
296
|
|
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
|
297
|
|
-/* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
|
298
|
|
-/* XL-density devices. */
|
299
|
|
-#define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11
|
300
|
|
-#endif
|
301
|
|
-
|
302
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
303
|
|
-/* External triggers of regular group for ADC3 */
|
304
|
|
-#define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
|
305
|
|
-#define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2
|
306
|
|
-#define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2
|
307
|
|
-#define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
|
308
|
|
-#define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4
|
309
|
|
-#define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11
|
310
|
|
-#endif
|
311
|
|
-
|
312
|
|
-/* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
|
313
|
|
-#define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 ))
|
314
|
|
-#define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
|
315
|
|
-/**
|
316
|
|
- * @}
|
317
|
|
- */
|
318
|
|
-
|
319
|
|
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
|
320
|
|
- * @{
|
321
|
|
- */
|
322
|
|
-/* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */
|
323
|
|
-/* instance is available on the selected device). */
|
324
|
|
-/* (used internally by HAL driver. To not use into HAL structure parameters) */
|
325
|
|
-
|
326
|
|
-/* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
|
327
|
|
-#define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 ))
|
328
|
|
-#define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
|
329
|
|
-#define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 ))
|
330
|
|
-#define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
|
331
|
|
-#define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 ))
|
332
|
|
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
|
333
|
|
-/* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
|
334
|
|
-/* XL-density devices. */
|
335
|
|
-#define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
|
336
|
|
-#endif
|
337
|
|
-
|
338
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
339
|
|
-/* External triggers of injected group for ADC3 */
|
340
|
|
-#define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
|
341
|
|
-#define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
|
342
|
|
-#define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
|
343
|
|
-#define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
|
344
|
|
-#define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
|
345
|
|
-#endif /* STM32F103xE || defined STM32F103xG */
|
346
|
|
-
|
347
|
|
-/* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
|
348
|
|
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO 0x00000000U
|
349
|
|
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0))
|
350
|
|
-#define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
|
351
|
|
-/**
|
352
|
|
- * @}
|
353
|
|
- */
|
354
|
|
-
|
355
|
|
-/**
|
356
|
|
- * @}
|
357
|
|
- */
|
358
|
|
-
|
359
|
|
-
|
360
|
|
-/* Exported macro ------------------------------------------------------------*/
|
361
|
|
-
|
362
|
|
-/* Private macro -------------------------------------------------------------*/
|
363
|
|
-
|
364
|
|
-/** @defgroup ADCEx_Private_Macro ADCEx Private Macro
|
365
|
|
- * @{
|
366
|
|
- */
|
367
|
|
-/* Macro reserved for internal HAL driver usage, not intended to be used in */
|
368
|
|
-/* code of final user. */
|
369
|
|
-
|
370
|
|
-
|
371
|
|
-/**
|
372
|
|
- * @brief For devices with 3 ADCs: Defines the external trigger source
|
373
|
|
- * for regular group according to ADC into common group ADC1&ADC2 or
|
374
|
|
- * ADC3 (some triggers with same source have different value to
|
375
|
|
- * be programmed into ADC EXTSEL bits of CR2 register).
|
376
|
|
- * For devices with 2 ADCs or less: this macro makes no change.
|
377
|
|
- * @param __HANDLE__: ADC handle
|
378
|
|
- * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
|
379
|
|
- * @retval External trigger to be programmed into EXTSEL bits of CR2 register
|
380
|
|
- */
|
381
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
382
|
|
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
|
383
|
|
- (( (((__HANDLE__)->Instance) == ADC3) \
|
384
|
|
- )? \
|
385
|
|
- ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \
|
386
|
|
- )? \
|
387
|
|
- (ADC3_EXTERNALTRIG_T8_TRGO) \
|
388
|
|
- : \
|
389
|
|
- (__EXT_TRIG_CONV__) \
|
390
|
|
- ) \
|
391
|
|
- : \
|
392
|
|
- (__EXT_TRIG_CONV__) \
|
393
|
|
- )
|
394
|
|
-#else
|
395
|
|
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
|
396
|
|
- (__EXT_TRIG_CONV__)
|
397
|
|
-#endif /* STM32F103xE || STM32F103xG */
|
398
|
|
-
|
399
|
|
-/**
|
400
|
|
- * @brief For devices with 3 ADCs: Defines the external trigger source
|
401
|
|
- * for injected group according to ADC into common group ADC1&ADC2 or
|
402
|
|
- * ADC3 (some triggers with same source have different value to
|
403
|
|
- * be programmed into ADC JEXTSEL bits of CR2 register).
|
404
|
|
- * For devices with 2 ADCs or less: this macro makes no change.
|
405
|
|
- * @param __HANDLE__: ADC handle
|
406
|
|
- * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
|
407
|
|
- * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
|
408
|
|
- */
|
409
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
410
|
|
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
|
411
|
|
- (( (((__HANDLE__)->Instance) == ADC3) \
|
412
|
|
- )? \
|
413
|
|
- ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \
|
414
|
|
- )? \
|
415
|
|
- (ADC3_EXTERNALTRIGINJEC_T8_CC4) \
|
416
|
|
- : \
|
417
|
|
- (__EXT_TRIG_INJECTCONV__) \
|
418
|
|
- ) \
|
419
|
|
- : \
|
420
|
|
- (__EXT_TRIG_INJECTCONV__) \
|
421
|
|
- )
|
422
|
|
-#else
|
423
|
|
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
|
424
|
|
- (__EXT_TRIG_INJECTCONV__)
|
425
|
|
-#endif /* STM32F103xE || STM32F103xG */
|
426
|
|
-
|
427
|
|
-
|
428
|
|
-/**
|
429
|
|
- * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
|
430
|
|
- * @param __HANDLE__: ADC handle
|
431
|
|
- * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
|
432
|
|
- */
|
433
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
434
|
|
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
|
435
|
|
- (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \
|
436
|
|
- )? \
|
437
|
|
- (ADC1->CR1 & ADC_CR1_DUALMOD) \
|
438
|
|
- : \
|
439
|
|
- (RESET) \
|
440
|
|
- )
|
441
|
|
-#else
|
442
|
|
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
|
443
|
|
- (RESET)
|
444
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
445
|
|
-
|
446
|
|
-/**
|
447
|
|
- * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
|
448
|
|
- * @param __HANDLE__: ADC handle
|
449
|
|
- * @retval None
|
450
|
|
- */
|
451
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
452
|
|
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
|
453
|
|
- (( (((__HANDLE__)->Instance) == ADC2) \
|
454
|
|
- )? \
|
455
|
|
- ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \
|
456
|
|
- : \
|
457
|
|
- (!RESET) \
|
458
|
|
- )
|
459
|
|
-#else
|
460
|
|
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
|
461
|
|
- (!RESET)
|
462
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
463
|
|
-
|
464
|
|
-/**
|
465
|
|
- * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
|
466
|
|
- * @param __HANDLE__: ADC handle
|
467
|
|
- * @retval None
|
468
|
|
- */
|
469
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
470
|
|
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \
|
471
|
|
- (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \
|
472
|
|
- )? \
|
473
|
|
- (ADC1->CR1 & ADC_CR1_JAUTO) \
|
474
|
|
- : \
|
475
|
|
- (RESET) \
|
476
|
|
- )
|
477
|
|
-#else
|
478
|
|
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \
|
479
|
|
- (RESET)
|
480
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
481
|
|
-
|
482
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
483
|
|
-/**
|
484
|
|
- * @brief Set handle of the other ADC sharing the common multimode settings
|
485
|
|
- * @param __HANDLE__: ADC handle
|
486
|
|
- * @param __HANDLE_OTHER_ADC__: other ADC handle
|
487
|
|
- * @retval None
|
488
|
|
- */
|
489
|
|
-#define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \
|
490
|
|
- ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
|
491
|
|
-
|
492
|
|
-/**
|
493
|
|
- * @brief Set handle of the ADC slave associated to the ADC master
|
494
|
|
- * On STM32F1 devices, ADC slave is always ADC2 (this can be different
|
495
|
|
- * on other STM32 devices)
|
496
|
|
- * @param __HANDLE_MASTER__: ADC master handle
|
497
|
|
- * @param __HANDLE_SLAVE__: ADC slave handle
|
498
|
|
- * @retval None
|
499
|
|
- */
|
500
|
|
-#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \
|
501
|
|
- ((__HANDLE_SLAVE__)->Instance = ADC2)
|
502
|
|
-
|
503
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
504
|
|
-
|
505
|
|
-#define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
|
506
|
|
- ((CHANNEL) == ADC_INJECTED_RANK_2) || \
|
507
|
|
- ((CHANNEL) == ADC_INJECTED_RANK_3) || \
|
508
|
|
- ((CHANNEL) == ADC_INJECTED_RANK_4))
|
509
|
|
-
|
510
|
|
-#define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \
|
511
|
|
- ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
|
512
|
|
-
|
513
|
|
-/** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
|
514
|
|
- * @{
|
515
|
|
- */
|
516
|
|
-#define IS_ADC_INJECTED_NB_CONV(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
|
517
|
|
-/**
|
518
|
|
- * @}
|
519
|
|
- */
|
520
|
|
-
|
521
|
|
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
|
522
|
|
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
|
523
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
|
524
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
|
525
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
|
526
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
|
527
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
|
528
|
|
- ((REGTRIG) == ADC_SOFTWARE_START))
|
529
|
|
-#endif
|
530
|
|
-#if defined (STM32F101xE)
|
531
|
|
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
|
532
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
|
533
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
|
534
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
|
535
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
|
536
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
|
537
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
|
538
|
|
- ((REGTRIG) == ADC_SOFTWARE_START))
|
539
|
|
-#endif
|
540
|
|
-#if defined (STM32F101xG)
|
541
|
|
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
|
542
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
|
543
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
|
544
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
|
545
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
|
546
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
|
547
|
|
- ((REGTRIG) == ADC_SOFTWARE_START))
|
548
|
|
-#endif
|
549
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
550
|
|
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
|
551
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
|
552
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
|
553
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
|
554
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
|
555
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
|
556
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \
|
557
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \
|
558
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \
|
559
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \
|
560
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \
|
561
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \
|
562
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
|
563
|
|
- ((REGTRIG) == ADC_SOFTWARE_START))
|
564
|
|
-#endif
|
565
|
|
-
|
566
|
|
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
|
567
|
|
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
|
568
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
|
569
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
|
570
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
|
571
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
|
572
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
|
573
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
|
574
|
|
- ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
|
575
|
|
-#endif
|
576
|
|
-#if defined (STM32F101xE)
|
577
|
|
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
|
578
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
|
579
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
|
580
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
|
581
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
|
582
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
|
583
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
|
584
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
|
585
|
|
- ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
|
586
|
|
-#endif
|
587
|
|
-#if defined (STM32F101xG)
|
588
|
|
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
|
589
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
|
590
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
|
591
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
|
592
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
|
593
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
|
594
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
|
595
|
|
- ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
|
596
|
|
-#endif
|
597
|
|
-#if defined (STM32F103xE) || defined (STM32F103xG)
|
598
|
|
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
|
599
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
|
600
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
|
601
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
|
602
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
|
603
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
|
604
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
|
605
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
|
606
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
|
607
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
|
608
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
|
609
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
|
610
|
|
- ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
|
611
|
|
- ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
|
612
|
|
-#endif
|
613
|
|
-
|
614
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
615
|
|
-#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
|
616
|
|
- ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
|
617
|
|
- ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
|
618
|
|
- ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
|
619
|
|
- ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
|
620
|
|
- ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
|
621
|
|
- ((MODE) == ADC_DUALMODE_REGSIMULT) || \
|
622
|
|
- ((MODE) == ADC_DUALMODE_INTERLFAST) || \
|
623
|
|
- ((MODE) == ADC_DUALMODE_INTERLSLOW) || \
|
624
|
|
- ((MODE) == ADC_DUALMODE_ALTERTRIG) )
|
625
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
626
|
|
-
|
627
|
|
-/**
|
628
|
|
- * @}
|
629
|
|
- */
|
630
|
|
-
|
631
|
|
-
|
632
|
|
-
|
633
|
|
-
|
634
|
|
-
|
635
|
|
-
|
636
|
|
-/* Exported functions --------------------------------------------------------*/
|
637
|
|
-/** @addtogroup ADCEx_Exported_Functions
|
638
|
|
- * @{
|
639
|
|
- */
|
640
|
|
-
|
641
|
|
-/* IO operation functions *****************************************************/
|
642
|
|
-/** @addtogroup ADCEx_Exported_Functions_Group1
|
643
|
|
- * @{
|
644
|
|
- */
|
645
|
|
-
|
646
|
|
-/* ADC calibration */
|
647
|
|
-HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
|
648
|
|
-
|
649
|
|
-/* Blocking mode: Polling */
|
650
|
|
-HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
|
651
|
|
-HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
|
652
|
|
-HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
|
653
|
|
-
|
654
|
|
-/* Non-blocking mode: Interruption */
|
655
|
|
-HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
|
656
|
|
-HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
|
657
|
|
-
|
658
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
659
|
|
-/* ADC multimode */
|
660
|
|
-HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
|
661
|
|
-HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
|
662
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
663
|
|
-
|
664
|
|
-/* ADC retrieve conversion value intended to be used with polling or interruption */
|
665
|
|
-uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
|
666
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
667
|
|
-uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
|
668
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
669
|
|
-
|
670
|
|
-/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
|
671
|
|
-void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
|
672
|
|
-/**
|
673
|
|
- * @}
|
674
|
|
- */
|
675
|
|
-
|
676
|
|
-
|
677
|
|
-/* Peripheral Control functions ***********************************************/
|
678
|
|
-/** @addtogroup ADCEx_Exported_Functions_Group2
|
679
|
|
- * @{
|
680
|
|
- */
|
681
|
|
-HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
|
682
|
|
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
|
683
|
|
-HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
|
684
|
|
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
|
685
|
|
-/**
|
686
|
|
- * @}
|
687
|
|
- */
|
688
|
|
-
|
689
|
|
-
|
690
|
|
-/**
|
691
|
|
- * @}
|
692
|
|
- */
|
693
|
|
-
|
694
|
|
-
|
695
|
|
-/**
|
696
|
|
- * @}
|
697
|
|
- */
|
698
|
|
-
|
699
|
|
-/**
|
700
|
|
- * @}
|
701
|
|
- */
|
702
|
|
-
|
703
|
|
-#ifdef __cplusplus
|
704
|
|
-}
|
705
|
|
-#endif
|
706
|
|
-
|
707
|
|
-#endif /* __STM32F1xx_HAL_ADC_EX_H */
|
708
|
|
-
|
709
|
|
-
|
710
|
|
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|