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Bootloader 관련 LIB 추가 / Size 16K로 수정

YJ лет назад: 6
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82fbb60cef
56 измененных файлов с 7610 добавлено и 14621 удалено
  1. 2 2
      .mxproject
  2. BIN
      Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o
  3. BIN
      Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o
  4. BIN
      Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
  5. BIN
      Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
  6. BIN
      Debug/STM32F103_WifiAttenCtrlTest.binary
  7. BIN
      Debug/STM32F103_WifiAttenCtrlTest.elf
  8. 820 930
      Debug/STM32F103_WifiAttenCtrlTest.hex
  9. 5620 6430
      Debug/STM32F103_WifiAttenCtrlTest.list
  10. 763 823
      Debug/STM32F103_WifiAttenCtrlTest.map
  11. BIN
      Debug/Src/Bootloader.o
  12. 2 0
      Debug/Src/Bootloader.su
  13. BIN
      Debug/Src/CRC16.o
  14. 2 0
      Debug/Src/CRC16.su
  15. BIN
      Debug/Src/esp8266.o
  16. BIN
      Debug/Src/flash.o
  17. 5 0
      Debug/Src/flash.su
  18. BIN
      Debug/Src/main.o
  19. 6 5
      Debug/Src/main.su
  20. BIN
      Debug/Src/stm32f1xx_hal_msp.o
  21. 5 7
      Debug/Src/stm32f1xx_hal_msp.su
  22. BIN
      Debug/Src/stm32f1xx_it.o
  23. 13 19
      Debug/Src/stm32f1xx_it.su
  24. BIN
      Debug/Src/system_stm32f1xx.o
  25. BIN
      Debug/Src/uart.o
  26. 3 3
      Debug/Src/uart.su
  27. 0 1003
      Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h
  28. 0 710
      Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h
  29. 0 2414
      Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c
  30. 0 1323
      Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c
  31. 78 0
      Inc/Bootloader.h
  32. 2 8
      Inc/flash.h
  33. 3 40
      Inc/main.h
  34. 1 1
      Inc/stm32f1xx_hal_conf.h
  35. 0 6
      Inc/stm32f1xx_it.h
  36. 1 1
      STM32F103RC_FLASH.ld
  37. 29 193
      STM32F103_WifiAttenCtrlTest.ioc
  38. 45 0
      Src/Bootloader.c
  39. 34 1
      Src/CRC16.c
  40. 105 0
      Src/flash.c
  41. 23 309
      Src/main.c
  42. 2 291
      Src/stm32f1xx_hal_msp.c
  43. 0 92
      Src/stm32f1xx_it.c
  44. 1 1
      Src/system_stm32f1xx.c
  45. 23 9
      Src/uart.c
  46. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_sym
  47. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xab
  48. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xad
  49. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xc
  50. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xf
  51. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xm
  52. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xr
  53. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xsb
  54. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xsd
  55. BIN
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.siproj
  56. 22 0
      insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.siproj_settings.xml

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+ 2 - 2
.mxproject


BIN
Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o


BIN
Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o


BIN
Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o


BIN
Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o


BIN
Debug/STM32F103_WifiAttenCtrlTest.binary


BIN
Debug/STM32F103_WifiAttenCtrlTest.elf


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+ 820 - 930
Debug/STM32F103_WifiAttenCtrlTest.hex


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+ 5620 - 6430
Debug/STM32F103_WifiAttenCtrlTest.list


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+ 763 - 823
Debug/STM32F103_WifiAttenCtrlTest.map


BIN
Debug/Src/Bootloader.o


+ 2 - 0
Debug/Src/Bootloader.su

@@ -0,0 +1,2 @@
1
+Bootloader.c:17:6:Firmware_BootStart_Signal	8	static
2
+Bootloader.c:23:6:FirmwareUpdateStart	16	static

BIN
Debug/Src/CRC16.o


+ 2 - 0
Debug/Src/CRC16.su

@@ -1,2 +1,4 @@
1 1
 CRC16.c:50:10:CRC16_Generate	8	static
2 2
 CRC16.c:84:9:CRC16_Check	12	static
3
+CRC16.c:119:9:STH30_CreateCrc	8	static
4
+CRC16.c:136:9:STH30_CheckCrc	12	static

BIN
Debug/Src/esp8266.o


BIN
Debug/Src/flash.o


+ 5 - 0
Debug/Src/flash.su

@@ -0,0 +1,5 @@
1
+flash.c:14:6:Jump_App	8	static
2
+flash.c:27:6:FLASH_If_Init	8	static
3
+flash.c:38:6:Flash_InitRead	16	static
4
+flash.c:60:9:Flash_RGB_Data_Write	24	static
5
+flash.c:77:9:Flash_write	24	static

BIN
Debug/Src/main.o


+ 6 - 5
Debug/Src/main.su

@@ -1,5 +1,6 @@
1
-main.c:83:6:HAL_TIM_PeriodElapsedCallback	0	static
2
-main.c:92:5:_write	8	static
3
-main.c:179:6:SystemClock_Config	96	static
4
-main.c:104:5:main	56	static
5
-main.c:612:6:Error_Handler	0	static
1
+main.c:71:6:HAL_TIM_PeriodElapsedCallback	0	static
2
+main.c:80:5:_write	8	static
3
+main.c:152:6:SystemClock_Config	72	static
4
+main.c:92:5:main	40	static
5
+main.c:312:6:_Error_Handler	0	static
6
+main.c:324:6:Error_Handler	0	static

BIN
Debug/Src/stm32f1xx_hal_msp.o


+ 5 - 7
Debug/Src/stm32f1xx_hal_msp.su

@@ -1,7 +1,5 @@
1
-stm32f1xx_hal_msp.c:71:6:HAL_MspInit	8	static
2
-stm32f1xx_hal_msp.c:97:6:HAL_ADC_MspInit	48	static
3
-stm32f1xx_hal_msp.c:169:6:HAL_ADC_MspDeInit	8	static
4
-stm32f1xx_hal_msp.c:251:6:HAL_TIM_Base_MspInit	8	static
5
-stm32f1xx_hal_msp.c:273:6:HAL_TIM_Base_MspDeInit	0	static
6
-stm32f1xx_hal_msp.c:298:6:HAL_UART_MspInit	56	static
7
-stm32f1xx_hal_msp.c:457:6:HAL_UART_MspDeInit	8	static
1
+stm32f1xx_hal_msp.c:67:6:HAL_MspInit	8	static
2
+stm32f1xx_hal_msp.c:93:6:HAL_TIM_Base_MspInit	8	static
3
+stm32f1xx_hal_msp.c:115:6:HAL_TIM_Base_MspDeInit	0	static
4
+stm32f1xx_hal_msp.c:140:6:HAL_UART_MspInit	40	static
5
+stm32f1xx_hal_msp.c:212:6:HAL_UART_MspDeInit	8	static

BIN
Debug/Src/stm32f1xx_it.o


+ 13 - 19
Debug/Src/stm32f1xx_it.su

@@ -1,19 +1,13 @@
1
-stm32f1xx_it.c:80:6:NMI_Handler	0	static
2
-stm32f1xx_it.c:93:6:HardFault_Handler	0	static
3
-stm32f1xx_it.c:108:6:MemManage_Handler	0	static
4
-stm32f1xx_it.c:123:6:BusFault_Handler	0	static
5
-stm32f1xx_it.c:138:6:UsageFault_Handler	0	static
6
-stm32f1xx_it.c:153:6:SVC_Handler	0	static
7
-stm32f1xx_it.c:166:6:DebugMon_Handler	0	static
8
-stm32f1xx_it.c:179:6:PendSV_Handler	0	static
9
-stm32f1xx_it.c:192:6:SysTick_Handler	0	static
10
-stm32f1xx_it.c:213:6:DMA1_Channel4_IRQHandler	0	static
11
-stm32f1xx_it.c:227:6:DMA1_Channel5_IRQHandler	0	static
12
-stm32f1xx_it.c:241:6:DMA1_Channel6_IRQHandler	0	static
13
-stm32f1xx_it.c:255:6:DMA1_Channel7_IRQHandler	0	static
14
-stm32f1xx_it.c:269:6:ADC1_2_IRQHandler	8	static
15
-stm32f1xx_it.c:284:6:USART1_IRQHandler	0	static
16
-stm32f1xx_it.c:298:6:USART2_IRQHandler	0	static
17
-stm32f1xx_it.c:312:6:ADC3_IRQHandler	0	static
18
-stm32f1xx_it.c:326:6:UART4_IRQHandler	0	static
19
-stm32f1xx_it.c:340:6:TIM6_IRQHandler	0	static
1
+stm32f1xx_it.c:73:6:NMI_Handler	0	static
2
+stm32f1xx_it.c:86:6:HardFault_Handler	0	static
3
+stm32f1xx_it.c:101:6:MemManage_Handler	0	static
4
+stm32f1xx_it.c:116:6:BusFault_Handler	0	static
5
+stm32f1xx_it.c:131:6:UsageFault_Handler	0	static
6
+stm32f1xx_it.c:146:6:SVC_Handler	0	static
7
+stm32f1xx_it.c:159:6:DebugMon_Handler	0	static
8
+stm32f1xx_it.c:172:6:PendSV_Handler	0	static
9
+stm32f1xx_it.c:185:6:SysTick_Handler	0	static
10
+stm32f1xx_it.c:206:6:DMA1_Channel4_IRQHandler	0	static
11
+stm32f1xx_it.c:220:6:DMA1_Channel5_IRQHandler	0	static
12
+stm32f1xx_it.c:234:6:USART1_IRQHandler	0	static
13
+stm32f1xx_it.c:248:6:TIM6_IRQHandler	0	static

BIN
Debug/Src/system_stm32f1xx.o


BIN
Debug/Src/uart.o


+ 3 - 3
Debug/Src/uart.su

@@ -1,5 +1,5 @@
1 1
 uart.c:12:6:InitUartQueue	0	static
2
-uart.c:46:6:GetDataFromUartQueue	16	static
2
+uart.c:47:6:GetDataFromUartQueue	16	static
3 3
 uart.c:23:6:HAL_UART_RxCpltCallback	8	static
4
-uart.c:36:6:PutDataToUartQueue	16	static
5
-uart.c:61:6:Uart1_Data_Send	0	static
4
+uart.c:37:6:PutDataToUartQueue	16	static
5
+uart.c:75:6:Uart1_Data_Send	0	static

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+ 0 - 1003
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h


+ 0 - 710
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h

@@ -1,710 +0,0 @@
1
-/**
2
-  ******************************************************************************
3
-  * @file    stm32f1xx_hal_adc_ex.h
4
-  * @author  MCD Application Team
5
-  * @brief   Header file of ADC HAL extension module.
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-  ******************************************************************************
7
-  * @attention
8
-  *
9
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
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-  * All rights reserved.</center></h2>
11
-  *
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-  * This software component is licensed by ST under BSD 3-Clause license,
13
-  * the "License"; You may not use this file except in compliance with the
14
-  * License. You may obtain a copy of the License at:
15
-  *                        opensource.org/licenses/BSD-3-Clause
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-  *
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-  ******************************************************************************
18
-  */
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-
20
-/* Define to prevent recursive inclusion -------------------------------------*/
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-#ifndef __STM32F1xx_HAL_ADC_EX_H
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-#define __STM32F1xx_HAL_ADC_EX_H
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-
24
-#ifdef __cplusplus
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- extern "C" {
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-#endif
27
-
28
-/* Includes ------------------------------------------------------------------*/
29
-#include "stm32f1xx_hal_def.h"  
30
-
31
-/** @addtogroup STM32F1xx_HAL_Driver
32
-  * @{
33
-  */
34
-
35
-/** @addtogroup ADCEx
36
-  * @{
37
-  */ 
38
-
39
-/* Exported types ------------------------------------------------------------*/ 
40
-/** @defgroup ADCEx_Exported_Types ADCEx Exported Types
41
-  * @{
42
-  */
43
-
44
-/** 
45
-  * @brief  ADC Configuration injected Channel structure definition
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-  * @note   Parameters of this structure are shared within 2 scopes:
47
-  *          - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
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-  *          - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
49
-  *            AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
50
-  * @note   The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
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-  *         ADC state can be either:
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-  *          - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
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-  *          - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
54
-  */
55
-typedef struct 
56
-{
57
-  uint32_t InjectedChannel;                       /*!< Selection of ADC channel to configure
58
-                                                       This parameter can be a value of @ref ADC_channels
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-                                                       Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
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-                                                       Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
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-                                                       Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
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-                                                             It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
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-                                                             Refer to errata sheet of these devices for more details. */
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-  uint32_t InjectedRank;                          /*!< Rank in the injected group sequencer
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-                                                       This parameter must be a value of @ref ADCEx_injected_rank
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-                                                       Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
67
-  uint32_t InjectedSamplingTime;                  /*!< Sampling time value to be set for the selected channel.
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-                                                       Unit: ADC clock cycles
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-                                                       Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
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-                                                       This parameter can be a value of @ref ADC_sampling_times
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-                                                       Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
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-                                                                If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
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-                                                       Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
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-                                                             sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
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-                                                             Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
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-  uint32_t InjectedOffset;                        /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
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-                                                       Offset value must be a positive number.
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-                                                       Depending of ADC resolution selected (12, 10, 8 or 6 bits),
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-                                                       this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
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-  uint32_t InjectedNbrOfConversion;               /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
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-                                                       To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
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-                                                       This parameter must be a number between Min_Data = 1 and Max_Data = 4.
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-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
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-  FunctionalState InjectedDiscontinuousConvMode;  /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
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-                                                       Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
87
-                                                       Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
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-                                                       This parameter can be set to ENABLE or DISABLE.
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-                                                       Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
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-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
91
-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
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-  FunctionalState AutoInjectedConv;               /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
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-                                                       This parameter can be set to ENABLE or DISABLE.
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-                                                       Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
95
-                                                       Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
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-                                                       Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
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-                                                             To maintain JAUTO always enabled, DMA must be configured in circular mode.
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-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
100
-  uint32_t ExternalTrigInjecConv;                 /*!< Selects the external event used to trigger the conversion start of injected group.
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-                                                       If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
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-                                                       If set to external trigger source, triggering is on event rising edge.
103
-                                                       This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
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-                                                       Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
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-                                                             If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
106
-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
107
-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
108
-}ADC_InjectionConfTypeDef;
109
-
110
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
111
-/** 
112
-  * @brief  Structure definition of ADC multimode
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-  * @note   The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
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-  *         State of ADCs of the common group must be: disabled.
115
-  */
116
-typedef struct
117
-{
118
-  uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode. 
119
-                                   This parameter can be a value of @ref ADCEx_Common_mode
120
-                                   Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
121
-                                   Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
122
-                                   Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
123
-                                   Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
124
-                                         The equivalences are:
125
-                                           - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
126
-                                           - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
127
-
128
-  
129
-}ADC_MultiModeTypeDef;                                                          
130
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
131
-
132
-/**
133
-  * @}
134
-  */
135
-
136
-
137
-/* Exported constants --------------------------------------------------------*/
138
-   
139
-/** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
140
-  * @{
141
-  */
142
-
143
-/** @defgroup ADCEx_injected_rank ADCEx rank into injected group
144
-  * @{
145
-  */
146
-#define ADC_INJECTED_RANK_1                           0x00000001U
147
-#define ADC_INJECTED_RANK_2                           0x00000002U
148
-#define ADC_INJECTED_RANK_3                           0x00000003U
149
-#define ADC_INJECTED_RANK_4                           0x00000004U
150
-/**
151
-  * @}
152
-  */
153
-
154
-/** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
155
-  * @{
156
-  */
157
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE           0x00000000U
158
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING         ((uint32_t)ADC_CR2_JEXTTRIG)
159
-/**
160
-  * @}
161
-  */
162
-    
163
-/** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
164
-  * @{
165
-  */
166
-/*!< List of external triggers with generic trigger name, independently of    */
167
-/* ADC target, sorted by trigger name:                                        */
168
-
169
-/*!< External triggers of regular group for ADC1&ADC2 only */
170
-#define ADC_EXTERNALTRIGCONV_T1_CC1         ADC1_2_EXTERNALTRIG_T1_CC1
171
-#define ADC_EXTERNALTRIGCONV_T1_CC2         ADC1_2_EXTERNALTRIG_T1_CC2
172
-#define ADC_EXTERNALTRIGCONV_T2_CC2         ADC1_2_EXTERNALTRIG_T2_CC2
173
-#define ADC_EXTERNALTRIGCONV_T3_TRGO        ADC1_2_EXTERNALTRIG_T3_TRGO
174
-#define ADC_EXTERNALTRIGCONV_T4_CC4         ADC1_2_EXTERNALTRIG_T4_CC4
175
-#define ADC_EXTERNALTRIGCONV_EXT_IT11       ADC1_2_EXTERNALTRIG_EXT_IT11
176
-
177
-#if defined (STM32F103xE) || defined (STM32F103xG)
178
-/*!< External triggers of regular group for ADC3 only */
179
-#define ADC_EXTERNALTRIGCONV_T2_CC3         ADC3_EXTERNALTRIG_T2_CC3
180
-#define ADC_EXTERNALTRIGCONV_T3_CC1         ADC3_EXTERNALTRIG_T3_CC1
181
-#define ADC_EXTERNALTRIGCONV_T5_CC1         ADC3_EXTERNALTRIG_T5_CC1
182
-#define ADC_EXTERNALTRIGCONV_T5_CC3         ADC3_EXTERNALTRIG_T5_CC3
183
-#define ADC_EXTERNALTRIGCONV_T8_CC1         ADC3_EXTERNALTRIG_T8_CC1
184
-#endif /* STM32F103xE || defined STM32F103xG */
185
-
186
-/*!< External triggers of regular group for all ADC instances */
187
-#define ADC_EXTERNALTRIGCONV_T1_CC3         ADC1_2_3_EXTERNALTRIG_T1_CC3
188
-
189
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
190
-/*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and   */
191
-/*         XL-density devices.                                                */
192
-/*         To use it on ADC or ADC2, a remap of trigger must be done from     */
193
-/*         EXTI line 11 to TIM8_TRGO with macro:                              */
194
-/*           __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE()                           */
195
-/*           __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE()                           */
196
-
197
-/* Note for internal constant value management: If TIM8_TRGO is available,    */
198
-/* its definition is set to value for ADC1&ADC2 by default and changed to     */
199
-/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
200
-#define ADC_EXTERNALTRIGCONV_T8_TRGO        ADC1_2_EXTERNALTRIG_T8_TRGO
201
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
202
-
203
-#define ADC_SOFTWARE_START                  ADC1_2_3_SWSTART
204
-/**
205
-  * @}
206
-  */
207
-
208
-/** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
209
-  * @{
210
-  */
211
-/*!< List of external triggers with generic trigger name, independently of    */
212
-/* ADC target, sorted by trigger name:                                        */
213
-
214
-/*!< External triggers of injected group for ADC1&ADC2 only */
215
-#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO        ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
216
-#define ADC_EXTERNALTRIGINJECCONV_T2_CC1         ADC1_2_EXTERNALTRIGINJEC_T2_CC1
217
-#define ADC_EXTERNALTRIGINJECCONV_T3_CC4         ADC1_2_EXTERNALTRIGINJEC_T3_CC4
218
-#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO        ADC1_2_EXTERNALTRIGINJEC_T4_TRGO 
219
-#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15       ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
220
-
221
-#if defined (STM32F103xE) || defined (STM32F103xG)
222
-/*!< External triggers of injected group for ADC3 only */
223
-#define ADC_EXTERNALTRIGINJECCONV_T4_CC3         ADC3_EXTERNALTRIGINJEC_T4_CC3
224
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC2         ADC3_EXTERNALTRIGINJEC_T8_CC2
225
-#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO        ADC3_EXTERNALTRIGINJEC_T5_TRGO
226
-#define ADC_EXTERNALTRIGINJECCONV_T5_CC4         ADC3_EXTERNALTRIGINJEC_T5_CC4
227
-#endif /* STM32F103xE || defined STM32F103xG */
228
-
229
-/*!< External triggers of injected group for all ADC instances */
230
-#define ADC_EXTERNALTRIGINJECCONV_T1_CC4         ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
231
-#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO        ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
232
-
233
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
234
-/*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and    */
235
-/*         XL-density devices.                                                */
236
-/*         To use it on ADC1 or ADC2, a remap of trigger must be done from    */
237
-/*         EXTI line 11 to TIM8_CC4 with macro:                               */
238
-/*           __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE()                           */
239
-/*           __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE()                           */
240
-
241
-/* Note for internal constant value management: If TIM8_CC4 is available,     */
242
-/* its definition is set to value for ADC1&ADC2 by default and changed to     */
243
-/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
244
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC4         ADC1_2_EXTERNALTRIGINJEC_T8_CC4
245
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
246
-
247
-#define ADC_INJECTED_SOFTWARE_START              ADC1_2_3_JSWSTART
248
-/**
249
-  * @}
250
-  */
251
-
252
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
253
-/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
254
-  * @{
255
-  */
256
-#define ADC_MODE_INDEPENDENT                              0x00000000U                                                                     /*!< ADC dual mode disabled (ADC independent mode) */
257
-#define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)(                                                            ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
258
-#define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)(                                        ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
259
-#define ADC_DUALMODE_INJECSIMULT_INTERLFAST   ((uint32_t)(                                        ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
260
-#define ADC_DUALMODE_INJECSIMULT_INTERLSLOW   ((uint32_t)(                    ADC_CR1_DUALMOD_2                                        )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
261
-#define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(                    ADC_CR1_DUALMOD_2 |                     ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
262
-#define ADC_DUALMODE_REGSIMULT                ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
263
-#define ADC_DUALMODE_INTERLFAST               ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
264
-#define ADC_DUALMODE_INTERLSLOW               ((uint32_t)(ADC_CR1_DUALMOD_3                                                            )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
265
-#define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CR1_DUALMOD_3 |                                         ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
266
-/**
267
-  * @}
268
-  */
269
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
270
-
271
-/**
272
-  * @}
273
-  */
274
-
275
-
276
-/* Private constants ---------------------------------------------------------*/
277
-
278
-/** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
279
-  * @{
280
-  */
281
-
282
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
283
-  * @{
284
-  */
285
-/* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC    */
286
-/* instance is available on the selected device).                             */
287
-/* (used internally by HAL driver. To not use into HAL structure parameters)  */
288
-
289
-/* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
290
-#define ADC1_2_EXTERNALTRIG_T1_CC1                       0x00000000U
291
-#define ADC1_2_EXTERNALTRIG_T1_CC2           ((uint32_t)(                                      ADC_CR2_EXTSEL_0))
292
-#define ADC1_2_EXTERNALTRIG_T2_CC2           ((uint32_t)(                   ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
293
-#define ADC1_2_EXTERNALTRIG_T3_TRGO          ((uint32_t)(ADC_CR2_EXTSEL_2                                      ))
294
-#define ADC1_2_EXTERNALTRIG_T4_CC4           ((uint32_t)(ADC_CR2_EXTSEL_2 |                    ADC_CR2_EXTSEL_0))
295
-#define ADC1_2_EXTERNALTRIG_EXT_IT11         ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1                   ))
296
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
297
-/* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and     */
298
-/* XL-density devices.                                                        */
299
-#define ADC1_2_EXTERNALTRIG_T8_TRGO          ADC1_2_EXTERNALTRIG_EXT_IT11
300
-#endif
301
-
302
-#if defined (STM32F103xE) || defined (STM32F103xG)
303
-/* External triggers of regular group for ADC3 */
304
-#define ADC3_EXTERNALTRIG_T3_CC1             ADC1_2_EXTERNALTRIG_T1_CC1
305
-#define ADC3_EXTERNALTRIG_T2_CC3             ADC1_2_EXTERNALTRIG_T1_CC2
306
-#define ADC3_EXTERNALTRIG_T8_CC1             ADC1_2_EXTERNALTRIG_T2_CC2
307
-#define ADC3_EXTERNALTRIG_T8_TRGO            ADC1_2_EXTERNALTRIG_T3_TRGO
308
-#define ADC3_EXTERNALTRIG_T5_CC1             ADC1_2_EXTERNALTRIG_T4_CC4
309
-#define ADC3_EXTERNALTRIG_T5_CC3             ADC1_2_EXTERNALTRIG_EXT_IT11
310
-#endif
311
-
312
-/* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
313
-#define ADC1_2_3_EXTERNALTRIG_T1_CC3         ((uint32_t)(                   ADC_CR2_EXTSEL_1                   ))
314
-#define ADC1_2_3_SWSTART                     ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
315
-/**
316
-  * @}
317
-  */
318
-
319
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
320
-  * @{
321
-  */
322
-/* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC    */
323
-/* instance is available on the selected device).                             */
324
-/* (used internally by HAL driver. To not use into HAL structure parameters)  */
325
-
326
-/* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
327
-#define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO          ((uint32_t)(                    ADC_CR2_JEXTSEL_1                    ))
328
-#define ADC1_2_EXTERNALTRIGINJEC_T2_CC1           ((uint32_t)(                    ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
329
-#define ADC1_2_EXTERNALTRIGINJEC_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2                                        ))
330
-#define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_2 |                     ADC_CR2_JEXTSEL_0))
331
-#define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1                    ))
332
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
333
-/* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and      */
334
-/* XL-density devices.                                                        */
335
-#define ADC1_2_EXTERNALTRIGINJEC_T8_CC4           ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
336
-#endif
337
-
338
-#if defined (STM32F103xE) || defined (STM32F103xG)
339
-/* External triggers of injected group for ADC3 */
340
-#define ADC3_EXTERNALTRIGINJEC_T4_CC3             ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
341
-#define ADC3_EXTERNALTRIGINJEC_T8_CC2             ADC1_2_EXTERNALTRIGINJEC_T2_CC1
342
-#define ADC3_EXTERNALTRIGINJEC_T8_CC4             ADC1_2_EXTERNALTRIGINJEC_T3_CC4
343
-#define ADC3_EXTERNALTRIGINJEC_T5_TRGO            ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
344
-#define ADC3_EXTERNALTRIGINJEC_T5_CC4             ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
345
-#endif /* STM32F103xE || defined STM32F103xG */
346
-
347
-/* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
348
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO                    0x00000000U
349
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4         ((uint32_t)(                                        ADC_CR2_JEXTSEL_0))
350
-#define ADC1_2_3_JSWSTART                         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
351
-/**
352
-  * @}
353
-  */
354
-
355
-/**
356
-  * @}
357
-  */
358
-
359
-
360
-/* Exported macro ------------------------------------------------------------*/
361
-
362
-/* Private macro -------------------------------------------------------------*/
363
-
364
-/** @defgroup ADCEx_Private_Macro ADCEx Private Macro
365
-  * @{
366
-  */
367
-/* Macro reserved for internal HAL driver usage, not intended to be used in   */
368
-/* code of final user.                                                        */
369
-
370
-    
371
-/**
372
-  * @brief For devices with 3 ADCs: Defines the external trigger source 
373
-  *        for regular group according to ADC into common group ADC1&ADC2 or 
374
-  *        ADC3 (some triggers with same source have different value to
375
-  *        be programmed into ADC EXTSEL bits of CR2 register).
376
-  *        For devices with 2 ADCs or less: this macro makes no change.
377
-  * @param __HANDLE__: ADC handle
378
-  * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
379
-  * @retval External trigger to be programmed into EXTSEL bits of CR2 register
380
-  */
381
-#if defined (STM32F103xE) || defined (STM32F103xG)
382
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
383
- (( (((__HANDLE__)->Instance) == ADC3)                                         \
384
-  )?                                                                           \
385
-   ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO                     \
386
-     )?                                                                        \
387
-      (ADC3_EXTERNALTRIG_T8_TRGO)                                              \
388
-      :                                                                        \
389
-      (__EXT_TRIG_CONV__)                                                      \
390
-   )                                                                           \
391
-   :                                                                           \
392
-   (__EXT_TRIG_CONV__)                                                         \
393
- )
394
-#else
395
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
396
-  (__EXT_TRIG_CONV__)
397
-#endif /* STM32F103xE || STM32F103xG */
398
-
399
-/**
400
-  * @brief For devices with 3 ADCs: Defines the external trigger source 
401
-  *        for injected group according to ADC into common group ADC1&ADC2 or 
402
-  *        ADC3 (some triggers with same source have different value to
403
-  *        be programmed into ADC JEXTSEL bits of CR2 register).
404
-  *        For devices with 2 ADCs or less: this macro makes no change.
405
-  * @param __HANDLE__: ADC handle
406
-  * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
407
-  * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
408
-  */
409
-#if defined (STM32F103xE) || defined (STM32F103xG)
410
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
411
- (( (((__HANDLE__)->Instance) == ADC3)                                         \
412
-  )?                                                                           \
413
-   ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4           \
414
-     )?                                                                        \
415
-      (ADC3_EXTERNALTRIGINJEC_T8_CC4)                                          \
416
-      :                                                                        \
417
-      (__EXT_TRIG_INJECTCONV__)                                                \
418
-   )                                                                           \
419
-   :                                                                           \
420
-   (__EXT_TRIG_INJECTCONV__)                                                   \
421
- )
422
-#else
423
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
424
-   (__EXT_TRIG_INJECTCONV__)
425
-#endif /* STM32F103xE || STM32F103xG */
426
-
427
-
428
-/**
429
-  * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
430
-  * @param __HANDLE__: ADC handle
431
-  * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
432
-  */
433
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
434
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
435
- (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)   \
436
-  )?                                                                           \
437
-   (ADC1->CR1 & ADC_CR1_DUALMOD)                                               \
438
-   :                                                                           \
439
-   (RESET)                                                                     \
440
- )
441
-#else
442
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
443
-  (RESET)
444
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
445
-
446
-/**
447
-  * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
448
-  * @param __HANDLE__: ADC handle
449
-  * @retval None
450
-  */
451
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
452
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
453
-  (( (((__HANDLE__)->Instance) == ADC2)                                        \
454
-   )?                                                                          \
455
-    ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET)                                   \
456
-    :                                                                          \
457
-    (!RESET)                                                                   \
458
-  )
459
-#else
460
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
461
-  (!RESET)
462
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
463
-
464
-/**
465
-  * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
466
-  * @param __HANDLE__: ADC handle
467
-  * @retval None
468
-  */
469
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
470
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
471
-  (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)  \
472
-   )?                                                                          \
473
-    (ADC1->CR1 & ADC_CR1_JAUTO)                                                \
474
-    :                                                                          \
475
-    (RESET)                                                                    \
476
-  )
477
-#else
478
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
479
-  (RESET)
480
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
481
-
482
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
483
-/**
484
-  * @brief Set handle of the other ADC sharing the common multimode settings
485
-  * @param __HANDLE__: ADC handle
486
-  * @param __HANDLE_OTHER_ADC__: other ADC handle
487
-  * @retval None
488
-  */
489
-#define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__)                 \
490
-  ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
491
-
492
-/**
493
-  * @brief Set handle of the ADC slave associated to the ADC master
494
-  * On STM32F1 devices, ADC slave is always ADC2 (this can be different
495
-  * on other STM32 devices)
496
-  * @param __HANDLE_MASTER__: ADC master handle
497
-  * @param __HANDLE_SLAVE__: ADC slave handle
498
-  * @retval None
499
-  */
500
-#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)                   \
501
-  ((__HANDLE_SLAVE__)->Instance = ADC2)
502
-       
503
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
504
-
505
-#define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
506
-                                       ((CHANNEL) == ADC_INJECTED_RANK_2) || \
507
-                                       ((CHANNEL) == ADC_INJECTED_RANK_3) || \
508
-                                       ((CHANNEL) == ADC_INJECTED_RANK_4))
509
-
510
-#define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)  || \
511
-                                        ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
512
-
513
-/** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
514
-  * @{
515
-  */
516
-#define IS_ADC_INJECTED_NB_CONV(LENGTH)  (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
517
-/**
518
-  * @}
519
-  */
520
-
521
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
522
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
523
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
524
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
525
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
526
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
527
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
528
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
529
-#endif
530
-#if defined (STM32F101xE)
531
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
532
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
533
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
534
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
535
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
536
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
537
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
538
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
539
-#endif
540
-#if defined (STM32F101xG)
541
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
542
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
543
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
544
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
545
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
546
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
547
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
548
-#endif
549
-#if defined (STM32F103xE) || defined (STM32F103xG)
550
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
551
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
552
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
553
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
554
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
555
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
556
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)    || \
557
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)    || \
558
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)    || \
559
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)    || \
560
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)    || \
561
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)    || \
562
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
563
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
564
-#endif
565
-
566
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
567
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
568
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
569
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
570
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
571
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
572
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
573
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
574
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
575
-#endif
576
-#if defined (STM32F101xE)
577
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
578
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
579
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
580
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
581
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
582
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
583
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
584
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
585
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
586
-#endif
587
-#if defined (STM32F101xG)
588
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
589
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
590
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
591
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
592
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
593
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
594
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
595
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
596
-#endif
597
-#if defined (STM32F103xE) || defined (STM32F103xG)
598
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
599
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
600
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
601
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
602
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
603
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
604
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)   || \
605
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)   || \
606
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO)  || \
607
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
608
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
609
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
610
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
611
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
612
-#endif
613
-
614
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
615
-#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                || \
616
-                           ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)  || \
617
-                           ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)    || \
618
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
619
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
620
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT)            || \
621
-                           ((MODE) == ADC_DUALMODE_REGSIMULT)              || \
622
-                           ((MODE) == ADC_DUALMODE_INTERLFAST)             || \
623
-                           ((MODE) == ADC_DUALMODE_INTERLSLOW)             || \
624
-                           ((MODE) == ADC_DUALMODE_ALTERTRIG) )
625
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
626
-
627
-/**
628
-  * @}
629
-  */      
630
-   
631
-    
632
-
633
-    
634
-    
635
-   
636
-/* Exported functions --------------------------------------------------------*/
637
-/** @addtogroup ADCEx_Exported_Functions
638
-  * @{
639
-  */
640
-
641
-/* IO operation functions  *****************************************************/
642
-/** @addtogroup ADCEx_Exported_Functions_Group1
643
-  * @{
644
-  */
645
-
646
-/* ADC calibration */
647
-HAL_StatusTypeDef       HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
648
-
649
-/* Blocking mode: Polling */
650
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
651
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
652
-HAL_StatusTypeDef       HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
653
-
654
-/* Non-blocking mode: Interruption */
655
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
656
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
657
-
658
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
659
-/* ADC multimode */
660
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
661
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); 
662
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
663
-
664
-/* ADC retrieve conversion value intended to be used with polling or interruption */
665
-uint32_t                HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
666
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
667
-uint32_t                HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
668
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
669
-
670
-/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
671
-void                    HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
672
-/**
673
-  * @}
674
-  */
675
-
676
-
677
-/* Peripheral Control functions ***********************************************/
678
-/** @addtogroup ADCEx_Exported_Functions_Group2
679
-  * @{
680
-  */
681
-HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
682
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
683
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
684
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
685
-/**
686
-  * @}
687
-  */
688
-
689
-
690
-/**
691
-  * @}
692
-  */
693
-
694
-
695
-/**
696
-  * @}
697
-  */ 
698
-
699
-/**
700
-  * @}
701
-  */
702
-  
703
-#ifdef __cplusplus
704
-}
705
-#endif
706
-
707
-#endif /* __STM32F1xx_HAL_ADC_EX_H */
708
-
709
-
710
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Разница между файлами не показана из-за своего большого размера
+ 0 - 2414
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c


Разница между файлами не показана из-за своего большого размера
+ 0 - 1323
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c


+ 78 - 0
Inc/Bootloader.h

@@ -0,0 +1,78 @@
1
+/*
2
+ * Bootloader.h
3
+ *
4
+ *  Created on: Jul 10, 2019
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef BOOTLOADER_H_
9
+#define BOOTLOADER_H_
10
+#include "main.h"
11
+
12
+extern uint8_t * UpdateFiledata;
13
+
14
+typedef struct{
15
+	uint8_t bluecell_header01;
16
+	uint8_t bluecell_header02;
17
+	uint8_t bluecell_header03;
18
+	uint8_t bluecell_header04;
19
+	uint8_t bluecell_type;
20
+	uint8_t bluecell_length_h;
21
+	uint8_t bluecell_length_l;
22
+	uint8_t bluecell_data[2048];
23
+}Blueprotocol_t;
24
+typedef enum {
25
+	BLUECELL_HEADER00 = 0,
26
+	BLUECELL_HEADER01,
27
+	BLUECELL_HEADER02,
28
+	BLUECELL_HEADER03,
29
+	BLUECELL_TYPE,
30
+	BLUECELL_LENGTH_H,
31
+	BLUECELL_LENGTH_L,
32
+	BLUECELL_UPDATACNT_H,
33
+	BLUECELL_UPDATACNT_L,
34
+	BLUECELL_DATA,
35
+}Bluenum;
36
+typedef enum {
37
+	BLUECELL_RESET = 0,
38
+	BLUECELL_START,
39
+	BLUECELL_SENDING,
40
+	BLUECELL_END,
41
+}updateseq;
42
+typedef enum updateseqok
43
+{
44
+    UpdateResetOK = 0,
45
+    UpdateStartOK,
46
+    UpdateSendingOK,
47
+    UpdateEndOK,
48
+};
49
+typedef enum{
50
+    bluecell_stx = 0,
51
+    bluecell_type = 1,
52
+    bluecell_length,
53
+	bluecell_CrcIndex,
54
+    bluecell_crc,
55
+    bluecell_ext,   
56
+}FirmwareUpdate_t;
57
+
58
+/*bluecell Header*/
59
+#define Bluecell_Header0  0x42//ASCII : B
60
+#define Bluecell_Header1  0x4C//ASCII : L
61
+#define Bluecell_Header2  0x55//ASCII : U
62
+#define Bluecell_Header3  0x45//ASCII : E
63
+/*bluecell type*/
64
+#define Bluecell_Reset  0x0A//ASCII : R
65
+#define Bluecell_Firmupdate_start     0x55//ASCII : U
66
+#define Bluecell_Firmupdate_sending   0x53//ASCII : S
67
+#define Bluecell_Firmupdate_end       0x65//ASCII : e
68
+#define Bluecell_Endbyte 0xED
69
+
70
+#define bluecell_Firmupdate_sendlength  1024
71
+
72
+#define bluecell_Firmupdate_Ackbytelength 12
73
+
74
+extern void FirmwareUpdate_Boot(void);
75
+
76
+
77
+extern void Firmware_BootStart_Signal();
78
+#endif /* BOOTLOADER_H_ */

+ 2 - 8
Inc/flash.h

@@ -19,13 +19,7 @@
19 19
 #define FirmwareUpdataAck  0x11
20 20
 #define FirmwareUpdataNak  0x22
21 21
 
22
-typedef enum{
23
-    bluecell_stx = 0,
24
-    bluecell_type = 1,
25
-    bluecell_length_H,
26
-    bluecell_length_L,
27
-    bluecell_crc,
28
-    bluecell_ext,   
29
-}FirmwareUpdate_t;
22
+#define FirmwareUpdateDelay 50
30 23
 
24
+void Jump_App(void);
31 25
 #endif /* FLASH_H_ */

+ 3 - 40
Inc/main.h

@@ -37,7 +37,7 @@ extern "C" {
37 37
 #include "uart.h"
38 38
 #include "CRC16.h"
39 39
 #include "flash.h"
40
-#include "esp8266.h"
40
+#include "bootloader.h"
41 41
 /* USER CODE END Includes */
42 42
 
43 43
 /* Exported types ------------------------------------------------------------*/
@@ -52,7 +52,8 @@ extern "C" {
52 52
 
53 53
 /* Exported macro ------------------------------------------------------------*/
54 54
 /* USER CODE BEGIN EM */
55
-
55
+extern volatile uint32_t UartTimerCnt;
56
+extern volatile uint32_t FirmwareTimerCnt;
56 57
 /* USER CODE END EM */
57 58
 
58 59
 /* Exported functions prototypes ---------------------------------------------*/
@@ -65,44 +66,6 @@ void Error_Handler(void);
65 66
 /* Private defines -----------------------------------------------------------*/
66 67
 #define BOOT_LED_Pin GPIO_PIN_15
67 68
 #define BOOT_LED_GPIO_Port GPIOC
68
-#define DET_OUT_B_Pin GPIO_PIN_0
69
-#define DET_OUT_B_GPIO_Port GPIOC
70
-#define EXT_DET_B_Pin GPIO_PIN_1
71
-#define EXT_DET_B_GPIO_Port GPIOC
72
-#define LED_UL_G_B_Pin GPIO_PIN_1
73
-#define LED_UL_G_B_GPIO_Port GPIOA
74
-#define LED_SD_R_B_Pin GPIO_PIN_4
75
-#define LED_SD_R_B_GPIO_Port GPIOA
76
-#define PWR_LED_B_Pin GPIO_PIN_5
77
-#define PWR_LED_B_GPIO_Port GPIOA
78
-#define LED_DL_G_B_Pin GPIO_PIN_6
79
-#define LED_DL_G_B_GPIO_Port GPIOA
80
-#define LED_DL_R_B_Pin GPIO_PIN_7
81
-#define LED_DL_R_B_GPIO_Port GPIOA
82
-#define RFU_TEMP_Pin GPIO_PIN_1
83
-#define RFU_TEMP_GPIO_Port GPIOB
84
-#define RST_WIFI_B_Pin GPIO_PIN_15
85
-#define RST_WIFI_B_GPIO_Port GPIOB
86
-#define PLL_LD_B_Pin GPIO_PIN_6
87
-#define PLL_LD_B_GPIO_Port GPIOC
88
-#define ATT_DATA_B_Pin GPIO_PIN_13
89
-#define ATT_DATA_B_GPIO_Port GPIOA
90
-#define ATT_EN1_B_Pin GPIO_PIN_14
91
-#define ATT_EN1_B_GPIO_Port GPIOA
92
-#define ATT_EN2_B_Pin GPIO_PIN_15
93
-#define ATT_EN2_B_GPIO_Port GPIOA
94
-#define PLL_EN_B_Pin GPIO_PIN_12
95
-#define PLL_EN_B_GPIO_Port GPIOC
96
-#define ATT_CLK_B_Pin GPIO_PIN_2
97
-#define ATT_CLK_B_GPIO_Port GPIOD
98
-#define PA_EN_B_Pin GPIO_PIN_3
99
-#define PA_EN_B_GPIO_Port GPIOB
100
-#define EXT_PA_EN_B_Pin GPIO_PIN_4
101
-#define EXT_PA_EN_B_GPIO_Port GPIOB
102
-#define PLL_CLK_B_Pin GPIO_PIN_6
103
-#define PLL_CLK_B_GPIO_Port GPIOB
104
-#define PLL_DATA_B_Pin GPIO_PIN_7
105
-#define PLL_DATA_B_GPIO_Port GPIOB
106 69
 /* USER CODE BEGIN Private defines */
107 70
 
108 71
 /* USER CODE END Private defines */

+ 1 - 1
Inc/stm32f1xx_hal_conf.h

@@ -33,7 +33,7 @@
33 33
   */
34 34
   
35 35
 #define HAL_MODULE_ENABLED  
36
-  #define HAL_ADC_MODULE_ENABLED
36
+  /*#define HAL_ADC_MODULE_ENABLED   */
37 37
 /*#define HAL_CRYP_MODULE_ENABLED   */
38 38
 /*#define HAL_CAN_MODULE_ENABLED   */
39 39
 /*#define HAL_CAN_LEGACY_MODULE_ENABLED   */

+ 0 - 6
Inc/stm32f1xx_it.h

@@ -58,13 +58,7 @@ void PendSV_Handler(void);
58 58
 void SysTick_Handler(void);
59 59
 void DMA1_Channel4_IRQHandler(void);
60 60
 void DMA1_Channel5_IRQHandler(void);
61
-void DMA1_Channel6_IRQHandler(void);
62
-void DMA1_Channel7_IRQHandler(void);
63
-void ADC1_2_IRQHandler(void);
64 61
 void USART1_IRQHandler(void);
65
-void USART2_IRQHandler(void);
66
-void ADC3_IRQHandler(void);
67
-void UART4_IRQHandler(void);
68 62
 void TIM6_IRQHandler(void);
69 63
 /* USER CODE BEGIN EFP */
70 64
 

+ 1 - 1
STM32F103RC_FLASH.ld

@@ -41,7 +41,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
41 41
 MEMORY
42 42
 {
43 43
 RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 48K
44
-FLASH (rx)      : ORIGIN = 0x8008000, LENGTH = 256K - 32K
44
+    FLASH	(rx)	: ORIGIN = 0x8000000,	LENGTH = 16K
45 45
 }
46 46
 
47 47
 /* Define output sections */

+ 29 - 193
STM32F103_WifiAttenCtrlTest.ioc

@@ -1,25 +1,7 @@
1 1
 #MicroXplorer Configuration settings - do not modify
2
-ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_9
3
-ADC1.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,NbrOfConversionFlag,master
4
-ADC1.NbrOfConversionFlag=1
5
-ADC1.Rank-2\#ChannelRegularConversion=1
6
-ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
7
-ADC1.master=1
8
-ADC2.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_10
9
-ADC2.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag
10
-ADC2.NbrOfConversionFlag=1
11
-ADC2.Rank-0\#ChannelRegularConversion=1
12
-ADC2.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
13
-ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_11
14
-ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag
15
-ADC3.NbrOfConversionFlag=1
16
-ADC3.Rank-0\#ChannelRegularConversion=1
17
-ADC3.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
18 2
 Dma.Request0=USART1_RX
19
-Dma.Request1=USART2_RX
20
-Dma.Request2=USART1_TX
21
-Dma.Request3=USART2_TX
22
-Dma.RequestsNb=4
3
+Dma.Request1=USART1_TX
4
+Dma.RequestsNb=2
23 5
 Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
24 6
 Dma.USART1_RX.0.Instance=DMA1_Channel5
25 7
 Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
@@ -29,92 +11,42 @@ Dma.USART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
29 11
 Dma.USART1_RX.0.PeriphInc=DMA_PINC_DISABLE
30 12
 Dma.USART1_RX.0.Priority=DMA_PRIORITY_LOW
31 13
 Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
32
-Dma.USART1_TX.2.Direction=DMA_MEMORY_TO_PERIPH
33
-Dma.USART1_TX.2.Instance=DMA1_Channel4
34
-Dma.USART1_TX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
35
-Dma.USART1_TX.2.MemInc=DMA_MINC_ENABLE
36
-Dma.USART1_TX.2.Mode=DMA_NORMAL
37
-Dma.USART1_TX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
38
-Dma.USART1_TX.2.PeriphInc=DMA_PINC_DISABLE
39
-Dma.USART1_TX.2.Priority=DMA_PRIORITY_LOW
40
-Dma.USART1_TX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
41
-Dma.USART2_RX.1.Direction=DMA_PERIPH_TO_MEMORY
42
-Dma.USART2_RX.1.Instance=DMA1_Channel6
43
-Dma.USART2_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
44
-Dma.USART2_RX.1.MemInc=DMA_MINC_ENABLE
45
-Dma.USART2_RX.1.Mode=DMA_NORMAL
46
-Dma.USART2_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
47
-Dma.USART2_RX.1.PeriphInc=DMA_PINC_DISABLE
48
-Dma.USART2_RX.1.Priority=DMA_PRIORITY_LOW
49
-Dma.USART2_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
50
-Dma.USART2_TX.3.Direction=DMA_MEMORY_TO_PERIPH
51
-Dma.USART2_TX.3.Instance=DMA1_Channel7
52
-Dma.USART2_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
53
-Dma.USART2_TX.3.MemInc=DMA_MINC_ENABLE
54
-Dma.USART2_TX.3.Mode=DMA_NORMAL
55
-Dma.USART2_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
56
-Dma.USART2_TX.3.PeriphInc=DMA_PINC_DISABLE
57
-Dma.USART2_TX.3.Priority=DMA_PRIORITY_LOW
58
-Dma.USART2_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
14
+Dma.USART1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
15
+Dma.USART1_TX.1.Instance=DMA1_Channel4
16
+Dma.USART1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
17
+Dma.USART1_TX.1.MemInc=DMA_MINC_ENABLE
18
+Dma.USART1_TX.1.Mode=DMA_NORMAL
19
+Dma.USART1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
20
+Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE
21
+Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW
22
+Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
59 23
 File.Version=6
60 24
 KeepUserPlacement=false
61 25
 Mcu.Family=STM32F1
62
-Mcu.IP0=ADC1
63
-Mcu.IP1=ADC2
64
-Mcu.IP10=USART2
65
-Mcu.IP2=ADC3
66
-Mcu.IP3=DMA
67
-Mcu.IP4=NVIC
68
-Mcu.IP5=RCC
69
-Mcu.IP6=SYS
70
-Mcu.IP7=TIM6
71
-Mcu.IP8=UART4
72
-Mcu.IP9=USART1
73
-Mcu.IPNb=11
26
+Mcu.IP0=DMA
27
+Mcu.IP1=NVIC
28
+Mcu.IP2=RCC
29
+Mcu.IP3=SYS
30
+Mcu.IP4=TIM6
31
+Mcu.IP5=USART1
32
+Mcu.IPNb=6
74 33
 Mcu.Name=STM32F103R(C-D-E)Tx
75 34
 Mcu.Package=LQFP64
76 35
 Mcu.Pin0=PC15-OSC32_OUT
77
-Mcu.Pin1=PC0
78
-Mcu.Pin10=PB1
79
-Mcu.Pin11=PB15
80
-Mcu.Pin12=PC6
81
-Mcu.Pin13=PA9
82
-Mcu.Pin14=PA10
83
-Mcu.Pin15=PA13
84
-Mcu.Pin16=PA14
85
-Mcu.Pin17=PA15
86
-Mcu.Pin18=PC10
87
-Mcu.Pin19=PC11
88
-Mcu.Pin2=PC1
89
-Mcu.Pin20=PC12
90
-Mcu.Pin21=PD2
91
-Mcu.Pin22=PB3
92
-Mcu.Pin23=PB4
93
-Mcu.Pin24=PB6
94
-Mcu.Pin25=PB7
95
-Mcu.Pin26=VP_SYS_VS_ND
96
-Mcu.Pin27=VP_SYS_VS_Systick
97
-Mcu.Pin28=VP_TIM6_VS_ClockSourceINT
98
-Mcu.Pin3=PA1
99
-Mcu.Pin4=PA2
100
-Mcu.Pin5=PA3
101
-Mcu.Pin6=PA4
102
-Mcu.Pin7=PA5
103
-Mcu.Pin8=PA6
104
-Mcu.Pin9=PA7
105
-Mcu.PinsNb=29
36
+Mcu.Pin1=PA9
37
+Mcu.Pin2=PA10
38
+Mcu.Pin3=VP_SYS_VS_ND
39
+Mcu.Pin4=VP_SYS_VS_Systick
40
+Mcu.Pin5=VP_TIM6_VS_ClockSourceINT
41
+Mcu.PinsNb=6
106 42
 Mcu.ThirdPartyNb=0
107 43
 Mcu.UserConstants=
108 44
 Mcu.UserName=STM32F103RCTx
109 45
 MxCube.Version=5.3.0
110 46
 MxDb.Version=DB.5.0.30
111
-NVIC.ADC1_2_IRQn=true\:0\:0\:false\:true\:true\:4\:true\:true
112
-NVIC.ADC3_IRQn=true\:0\:0\:false\:true\:true\:1\:true\:true
113 47
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
114
-NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:true\:true\:9\:false\:true
115
-NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:true\:true\:8\:false\:true
116
-NVIC.DMA1_Channel6_IRQn=true\:0\:0\:false\:true\:true\:7\:false\:true
117
-NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
48
+NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:true\:true\:4\:false\:true
49
+NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:true\:true\:3\:false\:true
118 50
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
119 51
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
120 52
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
@@ -123,99 +55,17 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
123 55
 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
124 56
 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
125 57
 NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
126
-NVIC.TIM6_IRQn=true\:0\:0\:false\:true\:true\:3\:true\:true
127
-NVIC.UART4_IRQn=true\:0\:0\:false\:true\:true\:2\:true\:true
128
-NVIC.USART1_IRQn=true\:0\:0\:false\:true\:true\:5\:true\:true
129
-NVIC.USART2_IRQn=true\:0\:0\:false\:true\:true\:6\:true\:true
58
+NVIC.TIM6_IRQn=true\:0\:0\:false\:true\:true\:1\:true\:true
59
+NVIC.USART1_IRQn=true\:0\:0\:false\:true\:true\:2\:true\:true
130 60
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
131
-PA1.GPIOParameters=GPIO_Label
132
-PA1.GPIO_Label=LED_UL_G_B
133
-PA1.Locked=true
134
-PA1.Signal=GPIO_Output
135 61
 PA10.Mode=Asynchronous
136 62
 PA10.Signal=USART1_RX
137
-PA13.GPIOParameters=GPIO_Label
138
-PA13.GPIO_Label=ATT_DATA_B
139
-PA13.Locked=true
140
-PA13.Signal=GPIO_Output
141
-PA14.GPIOParameters=GPIO_Label
142
-PA14.GPIO_Label=ATT_EN1_B
143
-PA14.Locked=true
144
-PA14.Signal=GPIO_Output
145
-PA15.GPIOParameters=GPIO_Label
146
-PA15.GPIO_Label=ATT_EN2_B
147
-PA15.Locked=true
148
-PA15.Signal=GPIO_Output
149
-PA2.Mode=Asynchronous
150
-PA2.Signal=USART2_TX
151
-PA3.Mode=Asynchronous
152
-PA3.Signal=USART2_RX
153
-PA4.GPIOParameters=GPIO_Label
154
-PA4.GPIO_Label=LED_SD_R_B
155
-PA4.Locked=true
156
-PA4.Signal=GPIO_Output
157
-PA5.GPIOParameters=GPIO_Label
158
-PA5.GPIO_Label=PWR_LED_B
159
-PA5.Locked=true
160
-PA5.Signal=GPIO_Output
161
-PA6.GPIOParameters=GPIO_Label
162
-PA6.GPIO_Label=LED_DL_G_B
163
-PA6.Locked=true
164
-PA6.Signal=GPIO_Output
165
-PA7.GPIOParameters=GPIO_Label
166
-PA7.GPIO_Label=LED_DL_R_B
167
-PA7.Locked=true
168
-PA7.Signal=GPIO_Output
169 63
 PA9.Mode=Asynchronous
170 64
 PA9.Signal=USART1_TX
171
-PB1.GPIOParameters=GPIO_Label
172
-PB1.GPIO_Label=RFU_TEMP
173
-PB1.Locked=true
174
-PB1.Signal=ADCx_IN9
175
-PB15.GPIOParameters=GPIO_Label
176
-PB15.GPIO_Label=RST_WIFI_B
177
-PB15.Locked=true
178
-PB15.Signal=GPIO_Output
179
-PB3.GPIOParameters=GPIO_Label
180
-PB3.GPIO_Label=PA_EN_B
181
-PB3.Locked=true
182
-PB3.Signal=GPIO_Output
183
-PB4.GPIOParameters=GPIO_Label
184
-PB4.GPIO_Label=EXT_PA_EN_B
185
-PB4.Locked=true
186
-PB4.Signal=GPIO_Output
187
-PB6.GPIOParameters=GPIO_Label
188
-PB6.GPIO_Label=PLL_CLK_B
189
-PB6.Locked=true
190
-PB6.Signal=GPIO_Output
191
-PB7.GPIOParameters=GPIO_Label
192
-PB7.GPIO_Label=PLL_DATA_B
193
-PB7.Locked=true
194
-PB7.Signal=GPIO_Output
195
-PC0.GPIOParameters=GPIO_Label
196
-PC0.GPIO_Label=DET_OUT_B
197
-PC0.Locked=true
198
-PC0.Signal=ADCx_IN10
199
-PC1.GPIOParameters=GPIO_Label
200
-PC1.GPIO_Label=EXT_DET_B
201
-PC1.Locked=true
202
-PC1.Signal=ADCx_IN11
203
-PC10.Mode=Asynchronous
204
-PC10.Signal=UART4_TX
205
-PC11.Mode=Asynchronous
206
-PC11.Signal=UART4_RX
207
-PC12.GPIOParameters=GPIO_Label
208
-PC12.GPIO_Label=PLL_EN_B
209
-PC12.Locked=true
210
-PC12.Signal=GPIO_Output
211 65
 PC15-OSC32_OUT.GPIOParameters=GPIO_Label
212 66
 PC15-OSC32_OUT.GPIO_Label=BOOT_LED
213 67
 PC15-OSC32_OUT.Locked=true
214 68
 PC15-OSC32_OUT.Signal=GPIO_Output
215
-PC6.GPIOParameters=GPIO_Label
216
-PC6.GPIO_Label=PLL_LD_B
217
-PC6.Locked=true
218
-PC6.Signal=GPIO_Output
219 69
 PCC.Checker=false
220 70
 PCC.Line=STM32F103
221 71
 PCC.MCU=STM32F103R(C-D-E)Tx
@@ -224,10 +74,6 @@ PCC.Seq0=0
224 74
 PCC.Series=STM32F1
225 75
 PCC.Temperature=25
226 76
 PCC.Vdd=3.3
227
-PD2.GPIOParameters=GPIO_Label
228
-PD2.GPIO_Label=ATT_CLK_B
229
-PD2.Locked=true
230
-PD2.Signal=GPIO_Output
231 77
 PinOutPanel.RotationAngle=0
232 78
 ProjectManager.AskForMigrate=true
233 79
 ProjectManager.BackupPrevious=false
@@ -255,7 +101,7 @@ ProjectManager.StackSize=0x400
255 101
 ProjectManager.TargetToolchain=TrueSTUDIO
256 102
 ProjectManager.ToolChainLocation=
257 103
 ProjectManager.UnderRoot=true
258
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_ADC2_Init-ADC2-false-HAL-true,6-MX_ADC3_Init-ADC3-false-HAL-true,7-MX_TIM6_Init-TIM6-false-HAL-true,8-MX_USART1_UART_Init-USART1-false-HAL-true,9-MX_USART2_UART_Init-USART2-false-HAL-true,10-MX_UART4_Init-UART4-false-HAL-true
104
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_TIM6_Init-TIM6-false-HAL-true,5-MX_USART1_UART_Init-USART1-false-HAL-true
259 105
 RCC.ADCFreqValue=10666666.666666666
260 106
 RCC.ADCPresc=RCC_ADCPCLK2_DIV6
261 107
 RCC.AHBFreq_Value=64000000
@@ -281,21 +127,11 @@ RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
281 127
 RCC.TimSysFreq_Value=64000000
282 128
 RCC.USBFreq_Value=64000000
283 129
 RCC.VCOOutput2Freq_Value=4000000
284
-SH.ADCx_IN10.0=ADC2_IN10,IN10
285
-SH.ADCx_IN10.ConfNb=1
286
-SH.ADCx_IN11.0=ADC3_IN11,IN11
287
-SH.ADCx_IN11.ConfNb=1
288
-SH.ADCx_IN9.0=ADC1_IN9,IN9
289
-SH.ADCx_IN9.ConfNb=1
290 130
 TIM6.IPParameters=Prescaler,Period
291 131
 TIM6.Period=10-1
292 132
 TIM6.Prescaler=6400-1
293
-UART4.IPParameters=VirtualMode
294
-UART4.VirtualMode=Asynchronous
295 133
 USART1.IPParameters=VirtualMode
296 134
 USART1.VirtualMode=VM_ASYNC
297
-USART2.IPParameters=VirtualMode
298
-USART2.VirtualMode=VM_ASYNC
299 135
 VP_SYS_VS_ND.Mode=No_Debug
300 136
 VP_SYS_VS_ND.Signal=SYS_VS_ND
301 137
 VP_SYS_VS_Systick.Mode=SysTick

+ 45 - 0
Src/Bootloader.c

@@ -0,0 +1,45 @@
1
+/*
2
+ * Bootloader.c
3
+ *
4
+ *  Created on: Jul 10, 2019
5
+ *      Author: parkyj
6
+ */
7
+#include "Bootloader.h"
8
+//Blueprotocol_t * UpdateFiledata;
9
+uint16_t updatecnt = 0;
10
+/***
11
+ * Header Check Function
12
+ * ***/
13
+#define Bluecell_BootStart 0x0b
14
+
15
+
16
+uint8_t BootStartdata[6] = {0xbe,Bluecell_BootStart,0x03,4,0,0xeb};
17
+void Firmware_BootStart_Signal(){
18
+	BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]);
19
+    Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3);
20
+}
21
+
22
+    uint8_t AckData_Buf[6] = {0xbe,FirmwareUpdataAck,0x03,5,0,0xbe};
23
+void FirmwareUpdateStart(uint8_t* data){
24
+    uint8_t ret = 0,crccheck = 0;
25
+    crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]);
26
+    if(crccheck == NO_ERROR){
27
+        AckData_Buf[bluecell_type] = FirmwareUpdataAck;
28
+        if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte
29
+            ret = Flash_write(&data[0]);
30
+        if(ret == 1)
31
+            AckData_Buf[bluecell_type] = FirmwareUpdataNak;
32
+    }else{
33
+        for(uint8_t i = 0; i < data[bluecell_length] + 3; i++)
34
+            printf("%02x ",data[i]);
35
+        printf("Check Sum error \n");
36
+        AckData_Buf[bluecell_type] = FirmwareUpdataNak;
37
+    }
38
+    AckData_Buf[bluecell_crc] = STH30_CreateCrc(&AckData_Buf[bluecell_type],AckData_Buf[bluecell_length]);
39
+    if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){
40
+        Uart1_Data_Send(&AckData_Buf[bluecell_stx],AckData_Buf[bluecell_length] + 3);
41
+    }
42
+    if(data[bluecell_type] == 0xEE)
43
+        printf("update Complete \n");
44
+}
45
+

+ 34 - 1
Src/CRC16.c

@@ -43,7 +43,7 @@ uint16_t Table_CRC16[]  = {
43 43
 	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
44 44
 	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
45 45
 };
46
-
46
+#define POLYNOMIAL 0x131 // P(x) = x^8 + x^5 + x^4 + 1 = 100110001
47 47
 //-----------------------------------------------
48 48
 //UART CRC üũ �Լ�
49 49
 //-----------------------------------------------
@@ -116,4 +116,37 @@ etError CRC16_Check(uint8_t *buf_ptr, int32_t len,uint16_t checksum)
116 116
 	return(crc16 == checksum ? CHECKSUM_ERROR : NO_ERROR );
117 117
 }
118 118
 
119
+uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
120
+{
121
+  uint8_t bit;        // bit mask
122
+  uint8_t crc = 0xFF; // calculated checksum
123
+  uint8_t byteCtr;    // byte counter
119 124
 
125
+  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
126
+  {
127
+    crc ^= (data[byteCtr]);
128
+    for(bit = 8; bit > 0; --bit)
129
+    {
130
+      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
131
+      else           crc = (crc << 1);
132
+    }
133
+  }
134
+  return crc;
135
+}
136
+etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
137
+{
138
+  uint8_t bit;        // bit mask
139
+  uint8_t crc = 0xFF; // calculated checksum
140
+  uint8_t byteCtr;    // byte counter
141
+  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
142
+  {
143
+    crc ^= (data[byteCtr]);
144
+    for(bit = 8; bit > 0; --bit)
145
+    {
146
+      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
147
+      else           crc = (crc << 1);
148
+    }
149
+  }
150
+  if(crc != checksum) return CHECKSUM_ERROR;
151
+  else                return NO_ERROR;
152
+}

+ 105 - 0
Src/flash.c

@@ -0,0 +1,105 @@
1
+/*
2
+ * flash.c
3
+ *
4
+ *  Created on: 2019. 7. 15.
5
+ *      Author: parkyj
6
+ */
7
+#include "flash.h"
8
+uint8_t flashinit = 0;
9
+uint32_t Address = FLASH_USER_START_ADDR;
10
+
11
+typedef void (*fptr)(void);
12
+fptr jump_to_app;
13
+uint32_t jump_addr;
14
+void Jump_App(void){
15
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?��
16
+    printf("boot loader start\n");               //메세�? 출력
17
+    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
18
+    jump_to_app = (fptr) jump_addr;
19
+    
20
+    /* init user app's sp */
21
+    printf("jump!\n");
22
+    __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
23
+    jump_to_app();
24
+}
25
+
26
+
27
+void FLASH_If_Init(void)
28
+{
29
+  /* Unlock the Program memory */
30
+  HAL_FLASH_Unlock();
31
+
32
+  /* Clear all FLASH flags */
33
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
34
+  /* Unlock the Program memory */
35
+  HAL_FLASH_Lock();
36
+}
37
+
38
+void Flash_InitRead(void) // ?��기함?��
39
+{
40
+    uint32_t  Address = 0;
41
+    Address = FLASH_USER_START_ADDR;
42
+    for(uint32_t i = 0; i < 16; i++ ){
43
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
44
+        Address++;
45
+    }
46
+#if 0 // PYJ.2019.03.27_BEGIN -- 
47
+    for(uint32_t i = 0; i < 13848; i++ ){
48
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
49
+        Address++;
50
+    }
51
+    Address = StartAddr;
52
+    for(uint32_t i = 0; i < 13848; i++ ){
53
+        printf("%02X ",*(uint8_t*)Address);
54
+        Address++;
55
+    }
56
+#endif // PYJ.2019.03.27_END -- 
57
+
58
+}
59
+
60
+uint8_t Flash_RGB_Data_Write(uint8_t* data){
61
+    uint16_t Firmdata = 0;
62
+    uint8_t ret = 0;
63
+    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
64
+        Firmdata  = ((data[(bluecell_length + 1) + i]) & 0x00FF);
65
+        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
66
+        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
67
+            printf("HAL NOT OK \n");
68
+            ret = 1;
69
+        }
70
+        Address += 2;
71
+        //if(!(i%FirmwareUpdateDelay))
72
+      //  HAL_Delay(1);
73
+    }
74
+    return ret;
75
+}
76
+
77
+uint8_t Flash_write(uint8_t* data) // ?��기함?��
78
+{
79
+
80
+    /*Variable used for Erase procedure*/
81
+    static FLASH_EraseInitTypeDef EraseInitStruct;
82
+    static uint32_t PAGEError = 0;
83
+    uint8_t ret = 0;
84
+    /* Fill EraseInit structure*/
85
+    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
86
+    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
87
+    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
88
+
89
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?��
90
+    HAL_FLASH_Unlock(); // lock ??�?
91
+    if(flashinit == 0){
92
+        flashinit= 1;
93
+        //FLASH_PageErase(StartAddr);
94
+        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
95
+            printf("Erase Failed \r\n");
96
+        }
97
+    }
98
+//    FLASH_If_Erase();
99
+    ret = Flash_RGB_Data_Write(&data[bluecell_stx]);
100
+    HAL_FLASH_Lock(); // lock ?��그기
101
+    __HAL_RCC_TIM6_CLK_ENABLE(); // 매인???��머�?? ?��?��?��?��?��?��
102
+
103
+    return ret;
104
+
105
+}

+ 23 - 309
Src/main.c

@@ -42,37 +42,25 @@
42 42
 /* USER CODE END PM */
43 43
 
44 44
 /* Private variables ---------------------------------------------------------*/
45
-ADC_HandleTypeDef hadc1;
46
-ADC_HandleTypeDef hadc2;
47
-ADC_HandleTypeDef hadc3;
48
-
49 45
 TIM_HandleTypeDef htim6;
50 46
 
51
-UART_HandleTypeDef huart4;
52 47
 UART_HandleTypeDef huart1;
53
-UART_HandleTypeDef huart2;
54 48
 DMA_HandleTypeDef hdma_usart1_rx;
55 49
 DMA_HandleTypeDef hdma_usart1_tx;
56
-DMA_HandleTypeDef hdma_usart2_rx;
57
-DMA_HandleTypeDef hdma_usart2_tx;
58 50
 
59 51
 /* USER CODE BEGIN PV */
60
-volatile uint32_t UartTimerCnt = 0;
52
+
61 53
 volatile uint32_t LedTimerCnt = 0;
62 54
 volatile uint32_t FirmwareTimerCnt = 0;
55
+volatile uint32_t UartTimerCnt = 0;
63 56
 /* USER CODE END PV */
64 57
 
65 58
 /* Private function prototypes -----------------------------------------------*/
66 59
 void SystemClock_Config(void);
67 60
 static void MX_GPIO_Init(void);
68 61
 static void MX_DMA_Init(void);
69
-static void MX_ADC1_Init(void);
70
-static void MX_ADC2_Init(void);
71
-static void MX_ADC3_Init(void);
72 62
 static void MX_TIM6_Init(void);
73 63
 static void MX_USART1_UART_Init(void);
74
-static void MX_USART2_UART_Init(void);
75
-static void MX_UART4_Init(void);
76 64
 static void MX_NVIC_Init(void);
77 65
 /* USER CODE BEGIN PFP */
78 66
 
@@ -127,44 +115,29 @@ int main(void)
127 115
   /* Initialize all configured peripherals */
128 116
   MX_GPIO_Init();
129 117
   MX_DMA_Init();
130
-  MX_ADC1_Init();
131
-  MX_ADC2_Init();
132
-  MX_ADC3_Init();
133 118
   MX_TIM6_Init();
134 119
   MX_USART1_UART_Init();
135
-  MX_USART2_UART_Init();
136
-  MX_UART4_Init();
137 120
 
138 121
   /* Initialize interrupts */
139 122
   MX_NVIC_Init();
140 123
   /* USER CODE BEGIN 2 */
141 124
   HAL_TIM_Base_Start_IT(&htim6);
142 125
   setbuf(stdout, NULL);
143
-  printf("Uart Start \r\n");
144
-  printf("Crc generate %x \r\n",CRC16_Generate(tempdata,11));
126
+  /*printf("Uart Start \r\n");
127
+  printf("Crc generate %x \r\n",CRC16_Generate(tempdata,11));*/
128
+  Firmware_BootStart_Signal ();
145 129
   InitUartQueue(&TerminalQueue);
146
-  InitUartQueue(&WifiQueue);
147
-  HAL_UART_Transmit_DMA(&huart2, "AT+CWMODE=3\r\n", ESP8266_Strindex("AT+CWMODE=3\r\n"));
148
-  HAL_Delay(5);
149
-  HAL_UART_Transmit_DMA(&huart2, "AT+CIPMUX=1\r\n", ESP8266_Strindex("AT+CIPMUX=1\r\n"));
150
-  HAL_Delay(5);
151
-  HAL_UART_Transmit_DMA(&huart2, "AT+CWSAP=\"YJ_TEST\",\"\",5,0\r\n", ESP8266_Strindex("AT+CWSAP=\"YJ_TEST\",\"\",5,0\r\n"));
152
-  HAL_Delay(5);
153
-  HAL_UART_Transmit_DMA(&huart2, "AT+CIPSERVER=1,4000\r\n", ESP8266_Strindex("AT+CIPSERVER=1,4000\r\n"));
154
-
155
-  printf("ESP Setting Complete \r\n");
130
+
156 131
   /* USER CODE END 2 */
157 132
 
158 133
   /* Infinite loop */
159 134
   /* USER CODE BEGIN WHILE */
160 135
   while (1)
161 136
   {
162
-	  if(LedTimerCnt > 100){
163
-		  HAL_GPIO_TogglePin(LED_UL_G_B_GPIO_Port,LED_UL_G_B_Pin);
164
-		  LedTimerCnt = 0;
165
-	  }
166
-	   while (TerminalQueue.data > 0) GetDataFromUartQueue(&hTerminal);
167
-	   while (WifiQueue.data > 0) GetDataFromUartQueue(&hWifi);
137
+	 // printf("Uart Start \r\n");
138
+      if(LedTimerCnt > 100){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin); LedTimerCnt = 0;}
139
+	  while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal);
140
+      while(FirmwareTimerCnt > 3000)  Jump_App();
168 141
     /* USER CODE END WHILE */
169 142
 
170 143
     /* USER CODE BEGIN 3 */
@@ -180,7 +153,6 @@ void SystemClock_Config(void)
180 153
 {
181 154
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
182 155
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
183
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
184 156
 
185 157
   /** Initializes the CPU, AHB and APB busses clocks 
186 158
   */
@@ -207,12 +179,6 @@ void SystemClock_Config(void)
207 179
   {
208 180
     Error_Handler();
209 181
   }
210
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
211
-  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
212
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
213
-  {
214
-    Error_Handler();
215
-  }
216 182
 }
217 183
 
218 184
 /**
@@ -221,27 +187,12 @@ void SystemClock_Config(void)
221 187
   */
222 188
 static void MX_NVIC_Init(void)
223 189
 {
224
-  /* ADC3_IRQn interrupt configuration */
225
-  HAL_NVIC_SetPriority(ADC3_IRQn, 0, 0);
226
-  HAL_NVIC_EnableIRQ(ADC3_IRQn);
227
-  /* UART4_IRQn interrupt configuration */
228
-  HAL_NVIC_SetPriority(UART4_IRQn, 0, 0);
229
-  HAL_NVIC_EnableIRQ(UART4_IRQn);
230 190
   /* TIM6_IRQn interrupt configuration */
231 191
   HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
232 192
   HAL_NVIC_EnableIRQ(TIM6_IRQn);
233
-  /* ADC1_2_IRQn interrupt configuration */
234
-  HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
235
-  HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
236 193
   /* USART1_IRQn interrupt configuration */
237 194
   HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
238 195
   HAL_NVIC_EnableIRQ(USART1_IRQn);
239
-  /* USART2_IRQn interrupt configuration */
240
-  HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
241
-  HAL_NVIC_EnableIRQ(USART2_IRQn);
242
-  /* DMA1_Channel6_IRQn interrupt configuration */
243
-  HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0);
244
-  HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
245 196
   /* DMA1_Channel5_IRQn interrupt configuration */
246 197
   HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
247 198
   HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
@@ -250,141 +201,6 @@ static void MX_NVIC_Init(void)
250 201
   HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
251 202
 }
252 203
 
253
-/**
254
-  * @brief ADC1 Initialization Function
255
-  * @param None
256
-  * @retval None
257
-  */
258
-static void MX_ADC1_Init(void)
259
-{
260
-
261
-  /* USER CODE BEGIN ADC1_Init 0 */
262
-
263
-  /* USER CODE END ADC1_Init 0 */
264
-
265
-  ADC_ChannelConfTypeDef sConfig = {0};
266
-
267
-  /* USER CODE BEGIN ADC1_Init 1 */
268
-
269
-  /* USER CODE END ADC1_Init 1 */
270
-  /** Common config 
271
-  */
272
-  hadc1.Instance = ADC1;
273
-  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
274
-  hadc1.Init.ContinuousConvMode = DISABLE;
275
-  hadc1.Init.DiscontinuousConvMode = DISABLE;
276
-  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
277
-  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
278
-  hadc1.Init.NbrOfConversion = 1;
279
-  if (HAL_ADC_Init(&hadc1) != HAL_OK)
280
-  {
281
-    Error_Handler();
282
-  }
283
-  /** Configure Regular Channel 
284
-  */
285
-  sConfig.Channel = ADC_CHANNEL_9;
286
-  sConfig.Rank = ADC_REGULAR_RANK_1;
287
-  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
288
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
289
-  {
290
-    Error_Handler();
291
-  }
292
-  /* USER CODE BEGIN ADC1_Init 2 */
293
-
294
-  /* USER CODE END ADC1_Init 2 */
295
-
296
-}
297
-
298
-/**
299
-  * @brief ADC2 Initialization Function
300
-  * @param None
301
-  * @retval None
302
-  */
303
-static void MX_ADC2_Init(void)
304
-{
305
-
306
-  /* USER CODE BEGIN ADC2_Init 0 */
307
-
308
-  /* USER CODE END ADC2_Init 0 */
309
-
310
-  ADC_ChannelConfTypeDef sConfig = {0};
311
-
312
-  /* USER CODE BEGIN ADC2_Init 1 */
313
-
314
-  /* USER CODE END ADC2_Init 1 */
315
-  /** Common config 
316
-  */
317
-  hadc2.Instance = ADC2;
318
-  hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
319
-  hadc2.Init.ContinuousConvMode = DISABLE;
320
-  hadc2.Init.DiscontinuousConvMode = DISABLE;
321
-  hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
322
-  hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
323
-  hadc2.Init.NbrOfConversion = 1;
324
-  if (HAL_ADC_Init(&hadc2) != HAL_OK)
325
-  {
326
-    Error_Handler();
327
-  }
328
-  /** Configure Regular Channel 
329
-  */
330
-  sConfig.Channel = ADC_CHANNEL_10;
331
-  sConfig.Rank = ADC_REGULAR_RANK_1;
332
-  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
333
-  if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
334
-  {
335
-    Error_Handler();
336
-  }
337
-  /* USER CODE BEGIN ADC2_Init 2 */
338
-
339
-  /* USER CODE END ADC2_Init 2 */
340
-
341
-}
342
-
343
-/**
344
-  * @brief ADC3 Initialization Function
345
-  * @param None
346
-  * @retval None
347
-  */
348
-static void MX_ADC3_Init(void)
349
-{
350
-
351
-  /* USER CODE BEGIN ADC3_Init 0 */
352
-
353
-  /* USER CODE END ADC3_Init 0 */
354
-
355
-  ADC_ChannelConfTypeDef sConfig = {0};
356
-
357
-  /* USER CODE BEGIN ADC3_Init 1 */
358
-
359
-  /* USER CODE END ADC3_Init 1 */
360
-  /** Common config 
361
-  */
362
-  hadc3.Instance = ADC3;
363
-  hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
364
-  hadc3.Init.ContinuousConvMode = DISABLE;
365
-  hadc3.Init.DiscontinuousConvMode = DISABLE;
366
-  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
367
-  hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
368
-  hadc3.Init.NbrOfConversion = 1;
369
-  if (HAL_ADC_Init(&hadc3) != HAL_OK)
370
-  {
371
-    Error_Handler();
372
-  }
373
-  /** Configure Regular Channel 
374
-  */
375
-  sConfig.Channel = ADC_CHANNEL_11;
376
-  sConfig.Rank = ADC_REGULAR_RANK_1;
377
-  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
378
-  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
379
-  {
380
-    Error_Handler();
381
-  }
382
-  /* USER CODE BEGIN ADC3_Init 2 */
383
-
384
-  /* USER CODE END ADC3_Init 2 */
385
-
386
-}
387
-
388 204
 /**
389 205
   * @brief TIM6 Initialization Function
390 206
   * @param None
@@ -423,39 +239,6 @@ static void MX_TIM6_Init(void)
423 239
 
424 240
 }
425 241
 
426
-/**
427
-  * @brief UART4 Initialization Function
428
-  * @param None
429
-  * @retval None
430
-  */
431
-static void MX_UART4_Init(void)
432
-{
433
-
434
-  /* USER CODE BEGIN UART4_Init 0 */
435
-
436
-  /* USER CODE END UART4_Init 0 */
437
-
438
-  /* USER CODE BEGIN UART4_Init 1 */
439
-
440
-  /* USER CODE END UART4_Init 1 */
441
-  huart4.Instance = UART4;
442
-  huart4.Init.BaudRate = 115200;
443
-  huart4.Init.WordLength = UART_WORDLENGTH_8B;
444
-  huart4.Init.StopBits = UART_STOPBITS_1;
445
-  huart4.Init.Parity = UART_PARITY_NONE;
446
-  huart4.Init.Mode = UART_MODE_TX_RX;
447
-  huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
448
-  huart4.Init.OverSampling = UART_OVERSAMPLING_16;
449
-  if (HAL_UART_Init(&huart4) != HAL_OK)
450
-  {
451
-    Error_Handler();
452
-  }
453
-  /* USER CODE BEGIN UART4_Init 2 */
454
-
455
-  /* USER CODE END UART4_Init 2 */
456
-
457
-}
458
-
459 242
 /**
460 243
   * @brief USART1 Initialization Function
461 244
   * @param None
@@ -489,39 +272,6 @@ static void MX_USART1_UART_Init(void)
489 272
 
490 273
 }
491 274
 
492
-/**
493
-  * @brief USART2 Initialization Function
494
-  * @param None
495
-  * @retval None
496
-  */
497
-static void MX_USART2_UART_Init(void)
498
-{
499
-
500
-  /* USER CODE BEGIN USART2_Init 0 */
501
-
502
-  /* USER CODE END USART2_Init 0 */
503
-
504
-  /* USER CODE BEGIN USART2_Init 1 */
505
-
506
-  /* USER CODE END USART2_Init 1 */
507
-  huart2.Instance = USART2;
508
-  huart2.Init.BaudRate = 115200;
509
-  huart2.Init.WordLength = UART_WORDLENGTH_8B;
510
-  huart2.Init.StopBits = UART_STOPBITS_1;
511
-  huart2.Init.Parity = UART_PARITY_NONE;
512
-  huart2.Init.Mode = UART_MODE_TX_RX;
513
-  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
514
-  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
515
-  if (HAL_UART_Init(&huart2) != HAL_OK)
516
-  {
517
-    Error_Handler();
518
-  }
519
-  /* USER CODE BEGIN USART2_Init 2 */
520
-
521
-  /* USER CODE END USART2_Init 2 */
522
-
523
-}
524
-
525 275
 /** 
526 276
   * Enable DMA controller clock
527 277
   */
@@ -531,11 +281,6 @@ static void MX_DMA_Init(void)
531 281
   /* DMA controller clock enable */
532 282
   __HAL_RCC_DMA1_CLK_ENABLE();
533 283
 
534
-  /* DMA interrupt init */
535
-  /* DMA1_Channel7_IRQn interrupt configuration */
536
-  HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0);
537
-  HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
538
-
539 284
 }
540 285
 
541 286
 /**
@@ -550,59 +295,26 @@ static void MX_GPIO_Init(void)
550 295
   /* GPIO Ports Clock Enable */
551 296
   __HAL_RCC_GPIOC_CLK_ENABLE();
552 297
   __HAL_RCC_GPIOA_CLK_ENABLE();
553
-  __HAL_RCC_GPIOB_CLK_ENABLE();
554
-  __HAL_RCC_GPIOD_CLK_ENABLE();
555
-
556
-  /*Configure GPIO pin Output Level */
557
-  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin, GPIO_PIN_RESET);
558 298
 
559 299
   /*Configure GPIO pin Output Level */
560
-  HAL_GPIO_WritePin(GPIOA, LED_UL_G_B_Pin|LED_SD_R_B_Pin|PWR_LED_B_Pin|LED_DL_G_B_Pin 
561
-                          |LED_DL_R_B_Pin|ATT_DATA_B_Pin|ATT_EN1_B_Pin|ATT_EN2_B_Pin, GPIO_PIN_RESET);
562
-
563
-  /*Configure GPIO pin Output Level */
564
-  HAL_GPIO_WritePin(GPIOB, RST_WIFI_B_Pin|PA_EN_B_Pin|EXT_PA_EN_B_Pin|PLL_CLK_B_Pin 
565
-                          |PLL_DATA_B_Pin, GPIO_PIN_RESET);
566
-
567
-  /*Configure GPIO pin Output Level */
568
-  HAL_GPIO_WritePin(ATT_CLK_B_GPIO_Port, ATT_CLK_B_Pin, GPIO_PIN_RESET);
569
-
570
-  /*Configure GPIO pins : BOOT_LED_Pin PLL_LD_B_Pin PLL_EN_B_Pin */
571
-  GPIO_InitStruct.Pin = BOOT_LED_Pin|PLL_LD_B_Pin|PLL_EN_B_Pin;
572
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
573
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
574
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
575
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
300
+  HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET);
576 301
 
577
-  /*Configure GPIO pins : LED_UL_G_B_Pin LED_SD_R_B_Pin PWR_LED_B_Pin LED_DL_G_B_Pin 
578
-                           LED_DL_R_B_Pin ATT_DATA_B_Pin ATT_EN1_B_Pin ATT_EN2_B_Pin */
579
-  GPIO_InitStruct.Pin = LED_UL_G_B_Pin|LED_SD_R_B_Pin|PWR_LED_B_Pin|LED_DL_G_B_Pin 
580
-                          |LED_DL_R_B_Pin|ATT_DATA_B_Pin|ATT_EN1_B_Pin|ATT_EN2_B_Pin;
302
+  /*Configure GPIO pin : BOOT_LED_Pin */
303
+  GPIO_InitStruct.Pin = BOOT_LED_Pin;
581 304
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
582 305
   GPIO_InitStruct.Pull = GPIO_NOPULL;
583 306
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
584
-  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
585
-
586
-  /*Configure GPIO pins : RST_WIFI_B_Pin PA_EN_B_Pin EXT_PA_EN_B_Pin PLL_CLK_B_Pin 
587
-                           PLL_DATA_B_Pin */
588
-  GPIO_InitStruct.Pin = RST_WIFI_B_Pin|PA_EN_B_Pin|EXT_PA_EN_B_Pin|PLL_CLK_B_Pin 
589
-                          |PLL_DATA_B_Pin;
590
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
591
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
592
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
593
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
594
-
595
-  /*Configure GPIO pin : ATT_CLK_B_Pin */
596
-  GPIO_InitStruct.Pin = ATT_CLK_B_Pin;
597
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
598
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
599
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
600
-  HAL_GPIO_Init(ATT_CLK_B_GPIO_Port, &GPIO_InitStruct);
307
+  HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct);
601 308
 
602 309
 }
603 310
 
604 311
 /* USER CODE BEGIN 4 */
605
-
312
+void _Error_Handler(char *file, int line)
313
+{
314
+  while(1)
315
+  {
316
+  }
317
+}
606 318
 /* USER CODE END 4 */
607 319
 
608 320
 /**
@@ -613,7 +325,9 @@ void Error_Handler(void)
613 325
 {
614 326
   /* USER CODE BEGIN Error_Handler_Debug */
615 327
   /* User can add his own implementation to report the HAL error return state */
616
-
328
+  while(1)
329
+  {
330
+  }
617 331
   /* USER CODE END Error_Handler_Debug */
618 332
 }
619 333
 

+ 2 - 291
Src/stm32f1xx_hal_msp.c

@@ -28,10 +28,6 @@ extern DMA_HandleTypeDef hdma_usart1_rx;
28 28
 
29 29
 extern DMA_HandleTypeDef hdma_usart1_tx;
30 30
 
31
-extern DMA_HandleTypeDef hdma_usart2_rx;
32
-
33
-extern DMA_HandleTypeDef hdma_usart2_tx;
34
-
35 31
 /* Private typedef -----------------------------------------------------------*/
36 32
 /* USER CODE BEGIN TD */
37 33
 
@@ -88,160 +84,6 @@ void HAL_MspInit(void)
88 84
   /* USER CODE END MspInit 1 */
89 85
 }
90 86
 
91
-/**
92
-* @brief ADC MSP Initialization
93
-* This function configures the hardware resources used in this example
94
-* @param hadc: ADC handle pointer
95
-* @retval None
96
-*/
97
-void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
98
-{
99
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
100
-  if(hadc->Instance==ADC1)
101
-  {
102
-  /* USER CODE BEGIN ADC1_MspInit 0 */
103
-
104
-  /* USER CODE END ADC1_MspInit 0 */
105
-    /* Peripheral clock enable */
106
-    __HAL_RCC_ADC1_CLK_ENABLE();
107
-  
108
-    __HAL_RCC_GPIOB_CLK_ENABLE();
109
-    /**ADC1 GPIO Configuration    
110
-    PB1     ------> ADC1_IN9 
111
-    */
112
-    GPIO_InitStruct.Pin = RFU_TEMP_Pin;
113
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
114
-    HAL_GPIO_Init(RFU_TEMP_GPIO_Port, &GPIO_InitStruct);
115
-
116
-  /* USER CODE BEGIN ADC1_MspInit 1 */
117
-
118
-  /* USER CODE END ADC1_MspInit 1 */
119
-  }
120
-  else if(hadc->Instance==ADC2)
121
-  {
122
-  /* USER CODE BEGIN ADC2_MspInit 0 */
123
-
124
-  /* USER CODE END ADC2_MspInit 0 */
125
-    /* Peripheral clock enable */
126
-    __HAL_RCC_ADC2_CLK_ENABLE();
127
-  
128
-    __HAL_RCC_GPIOC_CLK_ENABLE();
129
-    /**ADC2 GPIO Configuration    
130
-    PC0     ------> ADC2_IN10 
131
-    */
132
-    GPIO_InitStruct.Pin = DET_OUT_B_Pin;
133
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
134
-    HAL_GPIO_Init(DET_OUT_B_GPIO_Port, &GPIO_InitStruct);
135
-
136
-  /* USER CODE BEGIN ADC2_MspInit 1 */
137
-
138
-  /* USER CODE END ADC2_MspInit 1 */
139
-  }
140
-  else if(hadc->Instance==ADC3)
141
-  {
142
-  /* USER CODE BEGIN ADC3_MspInit 0 */
143
-
144
-  /* USER CODE END ADC3_MspInit 0 */
145
-    /* Peripheral clock enable */
146
-    __HAL_RCC_ADC3_CLK_ENABLE();
147
-  
148
-    __HAL_RCC_GPIOC_CLK_ENABLE();
149
-    /**ADC3 GPIO Configuration    
150
-    PC1     ------> ADC3_IN11 
151
-    */
152
-    GPIO_InitStruct.Pin = EXT_DET_B_Pin;
153
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
154
-    HAL_GPIO_Init(EXT_DET_B_GPIO_Port, &GPIO_InitStruct);
155
-
156
-  /* USER CODE BEGIN ADC3_MspInit 1 */
157
-
158
-  /* USER CODE END ADC3_MspInit 1 */
159
-  }
160
-
161
-}
162
-
163
-/**
164
-* @brief ADC MSP De-Initialization
165
-* This function freeze the hardware resources used in this example
166
-* @param hadc: ADC handle pointer
167
-* @retval None
168
-*/
169
-void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
170
-{
171
-  if(hadc->Instance==ADC1)
172
-  {
173
-  /* USER CODE BEGIN ADC1_MspDeInit 0 */
174
-
175
-  /* USER CODE END ADC1_MspDeInit 0 */
176
-    /* Peripheral clock disable */
177
-    __HAL_RCC_ADC1_CLK_DISABLE();
178
-  
179
-    /**ADC1 GPIO Configuration    
180
-    PB1     ------> ADC1_IN9 
181
-    */
182
-    HAL_GPIO_DeInit(RFU_TEMP_GPIO_Port, RFU_TEMP_Pin);
183
-
184
-    /* ADC1 interrupt DeInit */
185
-  /* USER CODE BEGIN ADC1:ADC1_2_IRQn disable */
186
-    /**
187
-    * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
188
-    * Be aware, disabling shared interrupt may affect other IPs
189
-    */
190
-    /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
191
-  /* USER CODE END ADC1:ADC1_2_IRQn disable */
192
-
193
-  /* USER CODE BEGIN ADC1_MspDeInit 1 */
194
-
195
-  /* USER CODE END ADC1_MspDeInit 1 */
196
-  }
197
-  else if(hadc->Instance==ADC2)
198
-  {
199
-  /* USER CODE BEGIN ADC2_MspDeInit 0 */
200
-
201
-  /* USER CODE END ADC2_MspDeInit 0 */
202
-    /* Peripheral clock disable */
203
-    __HAL_RCC_ADC2_CLK_DISABLE();
204
-  
205
-    /**ADC2 GPIO Configuration    
206
-    PC0     ------> ADC2_IN10 
207
-    */
208
-    HAL_GPIO_DeInit(DET_OUT_B_GPIO_Port, DET_OUT_B_Pin);
209
-
210
-    /* ADC2 interrupt DeInit */
211
-  /* USER CODE BEGIN ADC2:ADC1_2_IRQn disable */
212
-    /**
213
-    * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
214
-    * Be aware, disabling shared interrupt may affect other IPs
215
-    */
216
-    /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
217
-  /* USER CODE END ADC2:ADC1_2_IRQn disable */
218
-
219
-  /* USER CODE BEGIN ADC2_MspDeInit 1 */
220
-
221
-  /* USER CODE END ADC2_MspDeInit 1 */
222
-  }
223
-  else if(hadc->Instance==ADC3)
224
-  {
225
-  /* USER CODE BEGIN ADC3_MspDeInit 0 */
226
-
227
-  /* USER CODE END ADC3_MspDeInit 0 */
228
-    /* Peripheral clock disable */
229
-    __HAL_RCC_ADC3_CLK_DISABLE();
230
-  
231
-    /**ADC3 GPIO Configuration    
232
-    PC1     ------> ADC3_IN11 
233
-    */
234
-    HAL_GPIO_DeInit(EXT_DET_B_GPIO_Port, EXT_DET_B_Pin);
235
-
236
-    /* ADC3 interrupt DeInit */
237
-    HAL_NVIC_DisableIRQ(ADC3_IRQn);
238
-  /* USER CODE BEGIN ADC3_MspDeInit 1 */
239
-
240
-  /* USER CODE END ADC3_MspDeInit 1 */
241
-  }
242
-
243
-}
244
-
245 87
 /**
246 88
 * @brief TIM_Base MSP Initialization
247 89
 * This function configures the hardware resources used in this example
@@ -298,34 +140,7 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
298 140
 void HAL_UART_MspInit(UART_HandleTypeDef* huart)
299 141
 {
300 142
   GPIO_InitTypeDef GPIO_InitStruct = {0};
301
-  if(huart->Instance==UART4)
302
-  {
303
-  /* USER CODE BEGIN UART4_MspInit 0 */
304
-
305
-  /* USER CODE END UART4_MspInit 0 */
306
-    /* Peripheral clock enable */
307
-    __HAL_RCC_UART4_CLK_ENABLE();
308
-  
309
-    __HAL_RCC_GPIOC_CLK_ENABLE();
310
-    /**UART4 GPIO Configuration    
311
-    PC10     ------> UART4_TX
312
-    PC11     ------> UART4_RX 
313
-    */
314
-    GPIO_InitStruct.Pin = GPIO_PIN_10;
315
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
316
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
317
-    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
318
-
319
-    GPIO_InitStruct.Pin = GPIO_PIN_11;
320
-    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
321
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
322
-    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
323
-
324
-  /* USER CODE BEGIN UART4_MspInit 1 */
325
-
326
-  /* USER CODE END UART4_MspInit 1 */
327
-  }
328
-  else if(huart->Instance==USART1)
143
+  if(huart->Instance==USART1)
329 144
   {
330 145
   /* USER CODE BEGIN USART1_MspInit 0 */
331 146
 
@@ -385,66 +200,6 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
385 200
 
386 201
   /* USER CODE END USART1_MspInit 1 */
387 202
   }
388
-  else if(huart->Instance==USART2)
389
-  {
390
-  /* USER CODE BEGIN USART2_MspInit 0 */
391
-
392
-  /* USER CODE END USART2_MspInit 0 */
393
-    /* Peripheral clock enable */
394
-    __HAL_RCC_USART2_CLK_ENABLE();
395
-  
396
-    __HAL_RCC_GPIOA_CLK_ENABLE();
397
-    /**USART2 GPIO Configuration    
398
-    PA2     ------> USART2_TX
399
-    PA3     ------> USART2_RX 
400
-    */
401
-    GPIO_InitStruct.Pin = GPIO_PIN_2;
402
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
403
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
404
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
405
-
406
-    GPIO_InitStruct.Pin = GPIO_PIN_3;
407
-    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
408
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
409
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
410
-
411
-    /* USART2 DMA Init */
412
-    /* USART2_RX Init */
413
-    hdma_usart2_rx.Instance = DMA1_Channel6;
414
-    hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
415
-    hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
416
-    hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
417
-    hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
418
-    hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
419
-    hdma_usart2_rx.Init.Mode = DMA_NORMAL;
420
-    hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW;
421
-    if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
422
-    {
423
-      Error_Handler();
424
-    }
425
-
426
-    __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx);
427
-
428
-    /* USART2_TX Init */
429
-    hdma_usart2_tx.Instance = DMA1_Channel7;
430
-    hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
431
-    hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
432
-    hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
433
-    hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
434
-    hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
435
-    hdma_usart2_tx.Init.Mode = DMA_NORMAL;
436
-    hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
437
-    if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
438
-    {
439
-      Error_Handler();
440
-    }
441
-
442
-    __HAL_LINKDMA(huart,hdmatx,hdma_usart2_tx);
443
-
444
-  /* USER CODE BEGIN USART2_MspInit 1 */
445
-
446
-  /* USER CODE END USART2_MspInit 1 */
447
-  }
448 203
 
449 204
 }
450 205
 
@@ -456,27 +211,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
456 211
 */
457 212
 void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
458 213
 {
459
-  if(huart->Instance==UART4)
460
-  {
461
-  /* USER CODE BEGIN UART4_MspDeInit 0 */
462
-
463
-  /* USER CODE END UART4_MspDeInit 0 */
464
-    /* Peripheral clock disable */
465
-    __HAL_RCC_UART4_CLK_DISABLE();
466
-  
467
-    /**UART4 GPIO Configuration    
468
-    PC10     ------> UART4_TX
469
-    PC11     ------> UART4_RX 
470
-    */
471
-    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
472
-
473
-    /* UART4 interrupt DeInit */
474
-    HAL_NVIC_DisableIRQ(UART4_IRQn);
475
-  /* USER CODE BEGIN UART4_MspDeInit 1 */
476
-
477
-  /* USER CODE END UART4_MspDeInit 1 */
478
-  }
479
-  else if(huart->Instance==USART1)
214
+  if(huart->Instance==USART1)
480 215
   {
481 216
   /* USER CODE BEGIN USART1_MspDeInit 0 */
482 217
 
@@ -500,30 +235,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
500 235
 
501 236
   /* USER CODE END USART1_MspDeInit 1 */
502 237
   }
503
-  else if(huart->Instance==USART2)
504
-  {
505
-  /* USER CODE BEGIN USART2_MspDeInit 0 */
506
-
507
-  /* USER CODE END USART2_MspDeInit 0 */
508
-    /* Peripheral clock disable */
509
-    __HAL_RCC_USART2_CLK_DISABLE();
510
-  
511
-    /**USART2 GPIO Configuration    
512
-    PA2     ------> USART2_TX
513
-    PA3     ------> USART2_RX 
514
-    */
515
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
516
-
517
-    /* USART2 DMA DeInit */
518
-    HAL_DMA_DeInit(huart->hdmarx);
519
-    HAL_DMA_DeInit(huart->hdmatx);
520
-
521
-    /* USART2 interrupt DeInit */
522
-    HAL_NVIC_DisableIRQ(USART2_IRQn);
523
-  /* USER CODE BEGIN USART2_MspDeInit 1 */
524
-
525
-  /* USER CODE END USART2_MspDeInit 1 */
526
-  }
527 238
 
528 239
 }
529 240
 

+ 0 - 92
Src/stm32f1xx_it.c

@@ -56,17 +56,10 @@
56 56
 /* USER CODE END 0 */
57 57
 
58 58
 /* External variables --------------------------------------------------------*/
59
-extern ADC_HandleTypeDef hadc1;
60
-extern ADC_HandleTypeDef hadc2;
61
-extern ADC_HandleTypeDef hadc3;
62 59
 extern TIM_HandleTypeDef htim6;
63 60
 extern DMA_HandleTypeDef hdma_usart1_rx;
64 61
 extern DMA_HandleTypeDef hdma_usart1_tx;
65
-extern DMA_HandleTypeDef hdma_usart2_rx;
66
-extern DMA_HandleTypeDef hdma_usart2_tx;
67
-extern UART_HandleTypeDef huart4;
68 62
 extern UART_HandleTypeDef huart1;
69
-extern UART_HandleTypeDef huart2;
70 63
 /* USER CODE BEGIN EV */
71 64
 
72 65
 /* USER CODE END EV */
@@ -235,49 +228,6 @@ void DMA1_Channel5_IRQHandler(void)
235 228
   /* USER CODE END DMA1_Channel5_IRQn 1 */
236 229
 }
237 230
 
238
-/**
239
-  * @brief This function handles DMA1 channel6 global interrupt.
240
-  */
241
-void DMA1_Channel6_IRQHandler(void)
242
-{
243
-  /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */
244
-
245
-  /* USER CODE END DMA1_Channel6_IRQn 0 */
246
-  HAL_DMA_IRQHandler(&hdma_usart2_rx);
247
-  /* USER CODE BEGIN DMA1_Channel6_IRQn 1 */
248
-
249
-  /* USER CODE END DMA1_Channel6_IRQn 1 */
250
-}
251
-
252
-/**
253
-  * @brief This function handles DMA1 channel7 global interrupt.
254
-  */
255
-void DMA1_Channel7_IRQHandler(void)
256
-{
257
-  /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */
258
-
259
-  /* USER CODE END DMA1_Channel7_IRQn 0 */
260
-  HAL_DMA_IRQHandler(&hdma_usart2_tx);
261
-  /* USER CODE BEGIN DMA1_Channel7_IRQn 1 */
262
-
263
-  /* USER CODE END DMA1_Channel7_IRQn 1 */
264
-}
265
-
266
-/**
267
-  * @brief This function handles ADC1 and ADC2 global interrupts.
268
-  */
269
-void ADC1_2_IRQHandler(void)
270
-{
271
-  /* USER CODE BEGIN ADC1_2_IRQn 0 */
272
-
273
-  /* USER CODE END ADC1_2_IRQn 0 */
274
-  HAL_ADC_IRQHandler(&hadc1);
275
-  HAL_ADC_IRQHandler(&hadc2);
276
-  /* USER CODE BEGIN ADC1_2_IRQn 1 */
277
-
278
-  /* USER CODE END ADC1_2_IRQn 1 */
279
-}
280
-
281 231
 /**
282 232
   * @brief This function handles USART1 global interrupt.
283 233
   */
@@ -292,48 +242,6 @@ void USART1_IRQHandler(void)
292 242
   /* USER CODE END USART1_IRQn 1 */
293 243
 }
294 244
 
295
-/**
296
-  * @brief This function handles USART2 global interrupt.
297
-  */
298
-void USART2_IRQHandler(void)
299
-{
300
-  /* USER CODE BEGIN USART2_IRQn 0 */
301
-
302
-  /* USER CODE END USART2_IRQn 0 */
303
-  HAL_UART_IRQHandler(&huart2);
304
-  /* USER CODE BEGIN USART2_IRQn 1 */
305
-
306
-  /* USER CODE END USART2_IRQn 1 */
307
-}
308
-
309
-/**
310
-  * @brief This function handles ADC3 global interrupt.
311
-  */
312
-void ADC3_IRQHandler(void)
313
-{
314
-  /* USER CODE BEGIN ADC3_IRQn 0 */
315
-
316
-  /* USER CODE END ADC3_IRQn 0 */
317
-  HAL_ADC_IRQHandler(&hadc3);
318
-  /* USER CODE BEGIN ADC3_IRQn 1 */
319
-
320
-  /* USER CODE END ADC3_IRQn 1 */
321
-}
322
-
323
-/**
324
-  * @brief This function handles UART4 global interrupt.
325
-  */
326
-void UART4_IRQHandler(void)
327
-{
328
-  /* USER CODE BEGIN UART4_IRQn 0 */
329
-
330
-  /* USER CODE END UART4_IRQn 0 */
331
-  HAL_UART_IRQHandler(&huart4);
332
-  /* USER CODE BEGIN UART4_IRQn 1 */
333
-
334
-  /* USER CODE END UART4_IRQn 1 */
335
-}
336
-
337 245
 /**
338 246
   * @brief This function handles TIM6 global interrupt.
339 247
   */

+ 1 - 1
Src/system_stm32f1xx.c

@@ -92,7 +92,7 @@
92 92
 /*!< Uncomment the following line if you need to relocate your vector Table in
93 93
      Internal SRAM. */ 
94 94
 /* #define VECT_TAB_SRAM */
95
-#define VECT_TAB_OFFSET  0x00008000U /*!< Vector Table base offset field.
95
+#define VECT_TAB_OFFSET  0x00000000U /*!< Vector Table base offset field. 
96 96
                                   This value must be a multiple of 0x200. */
97 97
 
98 98
 

+ 23 - 9
Src/uart.c

@@ -8,7 +8,7 @@
8 8
 #include "uart.h"
9 9
 
10 10
 UARTQUEUE TerminalQueue;
11
-UARTQUEUE WifiQueue;
11
+
12 12
 void InitUartQueue(pUARTQUEUE pQueue)
13 13
 {
14 14
     pQueue->data = pQueue->head = pQueue->tail = 0;
@@ -24,6 +24,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
24 24
 {
25 25
     pUARTQUEUE pQueue;
26 26
 
27
+    UartTimerCnt = 0;
27 28
     pQueue = &TerminalQueue;
28 29
     pQueue->head++;
29 30
     if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0;
@@ -45,20 +46,33 @@ void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data)
45 46
 }
46 47
 void GetDataFromUartQueue(UART_HandleTypeDef *huart)
47 48
 {
48
-    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
49
+    volatile static uint8_t update_data_buf[1024];
50
+    volatile static int cnt;
51
+    uint8_t temp_buf[11];
52
+//    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
53
+    UART_HandleTypeDef *dst = &hTerminal;
49 54
     pUARTQUEUE pQueue = &TerminalQueue;
50
-    printf("Function : %s : ",__func__);
51
-    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
52
-    {
55
+//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
56
+//    {
53 57
      //  _Error_Handler(__FILE__, __LINE__);
54
-    }
55
-    printf("\r\n");
58
+//    }
59
+    update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail);        
60
+
56 61
     pQueue->tail++;
57 62
     if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
58 63
     pQueue->data--;
59
-    HAL_Delay(1);
64
+    if(pQueue->data == 0){
65
+#if 0 // PYJ.2019.07.15_BEGIN -- 
66
+#endif // PYJ.2019.07.15_END -- 
67
+        cnt = 0;
68
+        FirmwareUpdateStart(&update_data_buf[0]);
69
+        for(int i  = 0; i < 1024; i++)
70
+            update_data_buf[i] = 0;
71
+        FirmwareTimerCnt = 0;
72
+       // HAL_Delay(1);
73
+    }
60 74
 }
61 75
 void Uart1_Data_Send(uint8_t* data,uint8_t size){
62
-    HAL_UART_Transmit(&huart1, data,size, 10); 
76
+	HAL_UART_Transmit_DMA(&huart1, data,size);
63 77
 }
64 78
 

BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_sym


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xab


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xad


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xc


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xf


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xm


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xr


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xsb


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.sip_xsd


BIN
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.siproj


+ 22 - 0
insight/STM32F103_WifiAttenCtrlTest.si4project/STM32F103_WifiAttenCtrlTest.siproj_settings.xml

@@ -0,0 +1,22 @@
1
+<?xml version="1.0" encoding="utf-8"?>
2
+<ProjectSettings
3
+	AppVer="4.00.0098"
4
+	AppVerMinReader="4.00.0034"
5
+	GlobalConfiguration="1"
6
+	GlobalWorkspace="0"
7
+	LocalsInDb="0"
8
+	IndexMembers="1"
9
+	IndexFragments="1"
10
+	UseMasterFileList="0"
11
+	SourceDir="..\"
12
+	BackupDir="%PROJECT_DATA_DIR%\Backup"
13
+	MasterFileList="%PROJECT_SOURCE_DIR%\%PROJECT_NAME%_filelist.txt"
14
+	IsImportProject="0"
15
+	>
16
+	<Imports>
17
+		<ImportedLibs/>
18
+	</Imports>
19
+	<ParseConditions>
20
+		<Defines/>
21
+	</ParseConditions>
22
+</ProjectSettings>