june9152
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STM32F103_RGB_Controller_Bootloader


			
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STM32F103_RGB_Controller.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         0000322c  080001e4  080001e4  000101e4  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00000198  08003410  08003410  00013410  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  080035a8  080035a8  000135a8  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  080035ac  080035ac  000135ac  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         00000074  20000000  080035b0  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          000002ac  20000078  08003624  00020078  2**3
                  ALLOC
  7 ._user_heap_stack 00000600  20000324  08003624  00020324  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  00020074  2**0
                  CONTENTS, READONLY
  9 .debug_info   00015213  00000000  00000000  0002009d  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 00002d01  00000000  00000000  000352b0  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    00006e44  00000000  00000000  00037fb1  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 000009d8  00000000  00000000  0003edf8  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00000e50  00000000  00000000  0003f7d0  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   00005d92  00000000  00000000  00040620  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    00003d1b  00000000  00000000  000463b2  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  0004a0cd  2**0
                  CONTENTS, READONLY
 17 .debug_frame  00002574  00000000  00000000  0004a14c  2**2
                  CONTENTS, READONLY, DEBUGGING
 18 .stab         00000084  00000000  00000000  0004c6c0  2**2
                  CONTENTS, READONLY, DEBUGGING
 19 .stabstr      00000117  00000000  00000000  0004c744  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080001e4 <__do_global_dtors_aux>:
 80001e4:	b510      	push	{r4, lr}
 80001e6:	4c05      	ldr	r4, [pc, #20]	; (80001fc <__do_global_dtors_aux+0x18>)
 80001e8:	7823      	ldrb	r3, [r4, #0]
 80001ea:	b933      	cbnz	r3, 80001fa <__do_global_dtors_aux+0x16>
 80001ec:	4b04      	ldr	r3, [pc, #16]	; (8000200 <__do_global_dtors_aux+0x1c>)
 80001ee:	b113      	cbz	r3, 80001f6 <__do_global_dtors_aux+0x12>
 80001f0:	4804      	ldr	r0, [pc, #16]	; (8000204 <__do_global_dtors_aux+0x20>)
 80001f2:	f3af 8000 	nop.w
 80001f6:	2301      	movs	r3, #1
 80001f8:	7023      	strb	r3, [r4, #0]
 80001fa:	bd10      	pop	{r4, pc}
 80001fc:	20000078 	.word	0x20000078
 8000200:	00000000 	.word	0x00000000
 8000204:	080033f8 	.word	0x080033f8

08000208 <frame_dummy>:
 8000208:	b508      	push	{r3, lr}
 800020a:	4b03      	ldr	r3, [pc, #12]	; (8000218 <frame_dummy+0x10>)
 800020c:	b11b      	cbz	r3, 8000216 <frame_dummy+0xe>
 800020e:	4903      	ldr	r1, [pc, #12]	; (800021c <frame_dummy+0x14>)
 8000210:	4803      	ldr	r0, [pc, #12]	; (8000220 <frame_dummy+0x18>)
 8000212:	f3af 8000 	nop.w
 8000216:	bd08      	pop	{r3, pc}
 8000218:	00000000 	.word	0x00000000
 800021c:	2000007c 	.word	0x2000007c
 8000220:	080033f8 	.word	0x080033f8

08000224 <__aeabi_llsr>:
 8000224:	40d0      	lsrs	r0, r2
 8000226:	1c0b      	adds	r3, r1, #0
 8000228:	40d1      	lsrs	r1, r2
 800022a:	469c      	mov	ip, r3
 800022c:	3a20      	subs	r2, #32
 800022e:	40d3      	lsrs	r3, r2
 8000230:	4318      	orrs	r0, r3
 8000232:	4252      	negs	r2, r2
 8000234:	4663      	mov	r3, ip
 8000236:	4093      	lsls	r3, r2
 8000238:	4318      	orrs	r0, r3
 800023a:	4770      	bx	lr

0800023c <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 800023c:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800023e:	4b0e      	ldr	r3, [pc, #56]	; (8000278 <HAL_InitTick+0x3c>)
{
 8000240:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8000242:	7818      	ldrb	r0, [r3, #0]
 8000244:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8000248:	fbb3 f3f0 	udiv	r3, r3, r0
 800024c:	4a0b      	ldr	r2, [pc, #44]	; (800027c <HAL_InitTick+0x40>)
 800024e:	6810      	ldr	r0, [r2, #0]
 8000250:	fbb0 f0f3 	udiv	r0, r0, r3
 8000254:	f000 f89e 	bl	8000394 <HAL_SYSTICK_Config>
 8000258:	4604      	mov	r4, r0
 800025a:	b958      	cbnz	r0, 8000274 <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 800025c:	2d0f      	cmp	r5, #15
 800025e:	d809      	bhi.n	8000274 <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8000260:	4602      	mov	r2, r0
 8000262:	4629      	mov	r1, r5
 8000264:	f04f 30ff 	mov.w	r0, #4294967295
 8000268:	f000 f854 	bl	8000314 <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 800026c:	4b04      	ldr	r3, [pc, #16]	; (8000280 <HAL_InitTick+0x44>)
 800026e:	4620      	mov	r0, r4
 8000270:	601d      	str	r5, [r3, #0]
 8000272:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 8000274:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 8000276:	bd38      	pop	{r3, r4, r5, pc}
 8000278:	20000000 	.word	0x20000000
 800027c:	2000000c 	.word	0x2000000c
 8000280:	20000004 	.word	0x20000004

08000284 <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000284:	4a07      	ldr	r2, [pc, #28]	; (80002a4 <HAL_Init+0x20>)
{
 8000286:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000288:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800028a:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 800028c:	f043 0310 	orr.w	r3, r3, #16
 8000290:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8000292:	f000 f82d 	bl	80002f0 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 8000296:	2000      	movs	r0, #0
 8000298:	f7ff ffd0 	bl	800023c <HAL_InitTick>
  HAL_MspInit();
 800029c:	f001 fe9a 	bl	8001fd4 <HAL_MspInit>
}
 80002a0:	2000      	movs	r0, #0
 80002a2:	bd08      	pop	{r3, pc}
 80002a4:	40022000 	.word	0x40022000

080002a8 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 80002a8:	4a03      	ldr	r2, [pc, #12]	; (80002b8 <HAL_IncTick+0x10>)
 80002aa:	4b04      	ldr	r3, [pc, #16]	; (80002bc <HAL_IncTick+0x14>)
 80002ac:	6811      	ldr	r1, [r2, #0]
 80002ae:	781b      	ldrb	r3, [r3, #0]
 80002b0:	440b      	add	r3, r1
 80002b2:	6013      	str	r3, [r2, #0]
 80002b4:	4770      	bx	lr
 80002b6:	bf00      	nop
 80002b8:	20000188 	.word	0x20000188
 80002bc:	20000000 	.word	0x20000000

080002c0 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80002c0:	4b01      	ldr	r3, [pc, #4]	; (80002c8 <HAL_GetTick+0x8>)
 80002c2:	6818      	ldr	r0, [r3, #0]
}
 80002c4:	4770      	bx	lr
 80002c6:	bf00      	nop
 80002c8:	20000188 	.word	0x20000188

080002cc <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80002cc:	b538      	push	{r3, r4, r5, lr}
 80002ce:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80002d0:	f7ff fff6 	bl	80002c0 <HAL_GetTick>
 80002d4:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80002d6:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80002d8:	bf1e      	ittt	ne
 80002da:	4b04      	ldrne	r3, [pc, #16]	; (80002ec <HAL_Delay+0x20>)
 80002dc:	781b      	ldrbne	r3, [r3, #0]
 80002de:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80002e0:	f7ff ffee 	bl	80002c0 <HAL_GetTick>
 80002e4:	1b40      	subs	r0, r0, r5
 80002e6:	4284      	cmp	r4, r0
 80002e8:	d8fa      	bhi.n	80002e0 <HAL_Delay+0x14>
  {
  }
}
 80002ea:	bd38      	pop	{r3, r4, r5, pc}
 80002ec:	20000000 	.word	0x20000000

080002f0 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002f0:	4a07      	ldr	r2, [pc, #28]	; (8000310 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002f2:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002f4:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002f6:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 80002fa:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 80002fe:	041b      	lsls	r3, r3, #16
 8000300:	0c1b      	lsrs	r3, r3, #16
 8000302:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 8000306:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 800030a:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 800030c:	60d3      	str	r3, [r2, #12]
 800030e:	4770      	bx	lr
 8000310:	e000ed00 	.word	0xe000ed00

08000314 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8000314:	4b17      	ldr	r3, [pc, #92]	; (8000374 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 8000316:	b530      	push	{r4, r5, lr}
 8000318:	68dc      	ldr	r4, [r3, #12]
 800031a:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 800031e:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000322:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8000324:	2b04      	cmp	r3, #4
 8000326:	bf28      	it	cs
 8000328:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800032a:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800032c:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000330:	bf98      	it	ls
 8000332:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000334:	fa05 f303 	lsl.w	r3, r5, r3
 8000338:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800033c:	bf88      	it	hi
 800033e:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000340:	4019      	ands	r1, r3
 8000342:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8000344:	fa05 f404 	lsl.w	r4, r5, r4
 8000348:	3c01      	subs	r4, #1
 800034a:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 800034c:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800034e:	ea42 0201 	orr.w	r2, r2, r1
 8000352:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000356:	bfaf      	iteee	ge
 8000358:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800035c:	4b06      	ldrlt	r3, [pc, #24]	; (8000378 <HAL_NVIC_SetPriority+0x64>)
 800035e:	f000 000f 	andlt.w	r0, r0, #15
 8000362:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000364:	bfa5      	ittet	ge
 8000366:	b2d2      	uxtbge	r2, r2
 8000368:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800036c:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800036e:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 8000372:	bd30      	pop	{r4, r5, pc}
 8000374:	e000ed00 	.word	0xe000ed00
 8000378:	e000ed14 	.word	0xe000ed14

0800037c <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 800037c:	2301      	movs	r3, #1
 800037e:	0942      	lsrs	r2, r0, #5
 8000380:	f000 001f 	and.w	r0, r0, #31
 8000384:	fa03 f000 	lsl.w	r0, r3, r0
 8000388:	4b01      	ldr	r3, [pc, #4]	; (8000390 <HAL_NVIC_EnableIRQ+0x14>)
 800038a:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 800038e:	4770      	bx	lr
 8000390:	e000e100 	.word	0xe000e100

08000394 <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 8000394:	3801      	subs	r0, #1
 8000396:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 800039a:	d20a      	bcs.n	80003b2 <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800039c:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800039e:	4b06      	ldr	r3, [pc, #24]	; (80003b8 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80003a0:	4a06      	ldr	r2, [pc, #24]	; (80003bc <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 80003a2:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80003a4:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80003a8:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80003aa:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80003ac:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80003ae:	601a      	str	r2, [r3, #0]
 80003b0:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 80003b2:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 80003b4:	4770      	bx	lr
 80003b6:	bf00      	nop
 80003b8:	e000e010 	.word	0xe000e010
 80003bc:	e000ed00 	.word	0xe000ed00

080003c0 <HAL_DMA_Abort_IT>:
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{  
  HAL_StatusTypeDef status = HAL_OK;
  
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003c0:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 80003c4:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003c6:	2b02      	cmp	r3, #2
 80003c8:	d003      	beq.n	80003d2 <HAL_DMA_Abort_IT+0x12>
  {
    /* no transfer ongoing */
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80003ca:	2304      	movs	r3, #4
 80003cc:	6383      	str	r3, [r0, #56]	; 0x38
        
    status = HAL_ERROR;
 80003ce:	2001      	movs	r0, #1
 80003d0:	bd10      	pop	{r4, pc}
  }
  else
  { 
    /* Disable DMA IT */
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80003d2:	6803      	ldr	r3, [r0, #0]
 80003d4:	681a      	ldr	r2, [r3, #0]
 80003d6:	f022 020e 	bic.w	r2, r2, #14
 80003da:	601a      	str	r2, [r3, #0]

    /* Disable the channel */
    __HAL_DMA_DISABLE(hdma);
 80003dc:	681a      	ldr	r2, [r3, #0]
 80003de:	f022 0201 	bic.w	r2, r2, #1
 80003e2:	601a      	str	r2, [r3, #0]

    /* Clear all flags */
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 80003e4:	4a29      	ldr	r2, [pc, #164]	; (800048c <HAL_DMA_Abort_IT+0xcc>)
 80003e6:	4293      	cmp	r3, r2
 80003e8:	d924      	bls.n	8000434 <HAL_DMA_Abort_IT+0x74>
 80003ea:	f502 7262 	add.w	r2, r2, #904	; 0x388
 80003ee:	4293      	cmp	r3, r2
 80003f0:	d019      	beq.n	8000426 <HAL_DMA_Abort_IT+0x66>
 80003f2:	3214      	adds	r2, #20
 80003f4:	4293      	cmp	r3, r2
 80003f6:	d018      	beq.n	800042a <HAL_DMA_Abort_IT+0x6a>
 80003f8:	3214      	adds	r2, #20
 80003fa:	4293      	cmp	r3, r2
 80003fc:	d017      	beq.n	800042e <HAL_DMA_Abort_IT+0x6e>
 80003fe:	3214      	adds	r2, #20
 8000400:	4293      	cmp	r3, r2
 8000402:	bf0c      	ite	eq
 8000404:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 8000408:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 800040c:	4a20      	ldr	r2, [pc, #128]	; (8000490 <HAL_DMA_Abort_IT+0xd0>)
 800040e:	6053      	str	r3, [r2, #4]

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 8000410:	2301      	movs	r3, #1

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8000412:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 8000414:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21

    /* Call User Abort callback */
    if(hdma->XferAbortCallback != NULL)
 8000418:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 800041a:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 800041e:	b39b      	cbz	r3, 8000488 <HAL_DMA_Abort_IT+0xc8>
    {
      hdma->XferAbortCallback(hdma);
 8000420:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8000422:	4620      	mov	r0, r4
 8000424:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8000426:	2301      	movs	r3, #1
 8000428:	e7f0      	b.n	800040c <HAL_DMA_Abort_IT+0x4c>
 800042a:	2310      	movs	r3, #16
 800042c:	e7ee      	b.n	800040c <HAL_DMA_Abort_IT+0x4c>
 800042e:	f44f 7380 	mov.w	r3, #256	; 0x100
 8000432:	e7eb      	b.n	800040c <HAL_DMA_Abort_IT+0x4c>
 8000434:	4917      	ldr	r1, [pc, #92]	; (8000494 <HAL_DMA_Abort_IT+0xd4>)
 8000436:	428b      	cmp	r3, r1
 8000438:	d016      	beq.n	8000468 <HAL_DMA_Abort_IT+0xa8>
 800043a:	3114      	adds	r1, #20
 800043c:	428b      	cmp	r3, r1
 800043e:	d015      	beq.n	800046c <HAL_DMA_Abort_IT+0xac>
 8000440:	3114      	adds	r1, #20
 8000442:	428b      	cmp	r3, r1
 8000444:	d014      	beq.n	8000470 <HAL_DMA_Abort_IT+0xb0>
 8000446:	3114      	adds	r1, #20
 8000448:	428b      	cmp	r3, r1
 800044a:	d014      	beq.n	8000476 <HAL_DMA_Abort_IT+0xb6>
 800044c:	3114      	adds	r1, #20
 800044e:	428b      	cmp	r3, r1
 8000450:	d014      	beq.n	800047c <HAL_DMA_Abort_IT+0xbc>
 8000452:	3114      	adds	r1, #20
 8000454:	428b      	cmp	r3, r1
 8000456:	d014      	beq.n	8000482 <HAL_DMA_Abort_IT+0xc2>
 8000458:	4293      	cmp	r3, r2
 800045a:	bf14      	ite	ne
 800045c:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8000460:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 8000464:	4a0c      	ldr	r2, [pc, #48]	; (8000498 <HAL_DMA_Abort_IT+0xd8>)
 8000466:	e7d2      	b.n	800040e <HAL_DMA_Abort_IT+0x4e>
 8000468:	2301      	movs	r3, #1
 800046a:	e7fb      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 800046c:	2310      	movs	r3, #16
 800046e:	e7f9      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 8000470:	f44f 7380 	mov.w	r3, #256	; 0x100
 8000474:	e7f6      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 8000476:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 800047a:	e7f3      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 800047c:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 8000480:	e7f0      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 8000482:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 8000486:	e7ed      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 8000488:	4618      	mov	r0, r3
    } 
  }
  return status;
}
 800048a:	bd10      	pop	{r4, pc}
 800048c:	40020080 	.word	0x40020080
 8000490:	40020400 	.word	0x40020400
 8000494:	40020008 	.word	0x40020008
 8000498:	40020000 	.word	0x40020000

0800049c <FLASH_SetErrorCode>:
  uint32_t flags = 0U;
  
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
 800049c:	4a11      	ldr	r2, [pc, #68]	; (80004e4 <FLASH_SetErrorCode+0x48>)
 800049e:	68d3      	ldr	r3, [r2, #12]
 80004a0:	f013 0310 	ands.w	r3, r3, #16
 80004a4:	d005      	beq.n	80004b2 <FLASH_SetErrorCode+0x16>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
 80004a6:	4910      	ldr	r1, [pc, #64]	; (80004e8 <FLASH_SetErrorCode+0x4c>)
 80004a8:	69cb      	ldr	r3, [r1, #28]
 80004aa:	f043 0302 	orr.w	r3, r3, #2
 80004ae:	61cb      	str	r3, [r1, #28]
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
    flags |= FLASH_FLAG_WRPERR;
 80004b0:	2310      	movs	r3, #16
#endif /* FLASH_BANK2_END */
  }
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 80004b2:	68d2      	ldr	r2, [r2, #12]
 80004b4:	0750      	lsls	r0, r2, #29
 80004b6:	d506      	bpl.n	80004c6 <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 80004b8:	490b      	ldr	r1, [pc, #44]	; (80004e8 <FLASH_SetErrorCode+0x4c>)
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
    flags |= FLASH_FLAG_PGERR;
 80004ba:	f043 0304 	orr.w	r3, r3, #4
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 80004be:	69ca      	ldr	r2, [r1, #28]
 80004c0:	f042 0201 	orr.w	r2, r2, #1
 80004c4:	61ca      	str	r2, [r1, #28]
#endif /* FLASH_BANK2_END */
  }
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
 80004c6:	4a07      	ldr	r2, [pc, #28]	; (80004e4 <FLASH_SetErrorCode+0x48>)
 80004c8:	69d1      	ldr	r1, [r2, #28]
 80004ca:	07c9      	lsls	r1, r1, #31
 80004cc:	d508      	bpl.n	80004e0 <FLASH_SetErrorCode+0x44>
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
 80004ce:	4806      	ldr	r0, [pc, #24]	; (80004e8 <FLASH_SetErrorCode+0x4c>)
 80004d0:	69c1      	ldr	r1, [r0, #28]
 80004d2:	f041 0104 	orr.w	r1, r1, #4
 80004d6:	61c1      	str	r1, [r0, #28]
  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
 80004d8:	69d1      	ldr	r1, [r2, #28]
 80004da:	f021 0101 	bic.w	r1, r1, #1
 80004de:	61d1      	str	r1, [r2, #28]
  }

  /* Clear FLASH error pending bits */
  __HAL_FLASH_CLEAR_FLAG(flags);
 80004e0:	60d3      	str	r3, [r2, #12]
 80004e2:	4770      	bx	lr
 80004e4:	40022000 	.word	0x40022000
 80004e8:	20000190 	.word	0x20000190

080004ec <HAL_FLASH_Unlock>:
  if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 80004ec:	4b06      	ldr	r3, [pc, #24]	; (8000508 <HAL_FLASH_Unlock+0x1c>)
 80004ee:	6918      	ldr	r0, [r3, #16]
 80004f0:	f010 0080 	ands.w	r0, r0, #128	; 0x80
 80004f4:	d007      	beq.n	8000506 <HAL_FLASH_Unlock+0x1a>
    WRITE_REG(FLASH->KEYR, FLASH_KEY1);
 80004f6:	4a05      	ldr	r2, [pc, #20]	; (800050c <HAL_FLASH_Unlock+0x20>)
 80004f8:	605a      	str	r2, [r3, #4]
    WRITE_REG(FLASH->KEYR, FLASH_KEY2);
 80004fa:	f102 3288 	add.w	r2, r2, #2290649224	; 0x88888888
 80004fe:	605a      	str	r2, [r3, #4]
    if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8000500:	6918      	ldr	r0, [r3, #16]
  HAL_StatusTypeDef status = HAL_OK;
 8000502:	f3c0 10c0 	ubfx	r0, r0, #7, #1
}
 8000506:	4770      	bx	lr
 8000508:	40022000 	.word	0x40022000
 800050c:	45670123 	.word	0x45670123

08000510 <HAL_FLASH_Lock>:
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8000510:	4a03      	ldr	r2, [pc, #12]	; (8000520 <HAL_FLASH_Lock+0x10>)
}
 8000512:	2000      	movs	r0, #0
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8000514:	6913      	ldr	r3, [r2, #16]
 8000516:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800051a:	6113      	str	r3, [r2, #16]
}
 800051c:	4770      	bx	lr
 800051e:	bf00      	nop
 8000520:	40022000 	.word	0x40022000

08000524 <FLASH_WaitForLastOperation>:
{
 8000524:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8000526:	4606      	mov	r6, r0
  uint32_t tickstart = HAL_GetTick();
 8000528:	f7ff feca 	bl	80002c0 <HAL_GetTick>
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 800052c:	4c11      	ldr	r4, [pc, #68]	; (8000574 <FLASH_WaitForLastOperation+0x50>)
  uint32_t tickstart = HAL_GetTick();
 800052e:	4607      	mov	r7, r0
 8000530:	4625      	mov	r5, r4
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 8000532:	68e3      	ldr	r3, [r4, #12]
 8000534:	07d8      	lsls	r0, r3, #31
 8000536:	d412      	bmi.n	800055e <FLASH_WaitForLastOperation+0x3a>
  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
 8000538:	68e3      	ldr	r3, [r4, #12]
 800053a:	0699      	lsls	r1, r3, #26
    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
 800053c:	bf44      	itt	mi
 800053e:	2320      	movmi	r3, #32
 8000540:	60e3      	strmi	r3, [r4, #12]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 8000542:	68eb      	ldr	r3, [r5, #12]
 8000544:	06da      	lsls	r2, r3, #27
 8000546:	d406      	bmi.n	8000556 <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8000548:	69eb      	ldr	r3, [r5, #28]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 800054a:	07db      	lsls	r3, r3, #31
 800054c:	d403      	bmi.n	8000556 <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 800054e:	68e8      	ldr	r0, [r5, #12]
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8000550:	f010 0004 	ands.w	r0, r0, #4
 8000554:	d002      	beq.n	800055c <FLASH_WaitForLastOperation+0x38>
    FLASH_SetErrorCode();
 8000556:	f7ff ffa1 	bl	800049c <FLASH_SetErrorCode>
    return HAL_ERROR;
 800055a:	2001      	movs	r0, #1
}
 800055c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if (Timeout != HAL_MAX_DELAY)
 800055e:	1c73      	adds	r3, r6, #1
 8000560:	d0e7      	beq.n	8000532 <FLASH_WaitForLastOperation+0xe>
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8000562:	b90e      	cbnz	r6, 8000568 <FLASH_WaitForLastOperation+0x44>
        return HAL_TIMEOUT;
 8000564:	2003      	movs	r0, #3
 8000566:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8000568:	f7ff feaa 	bl	80002c0 <HAL_GetTick>
 800056c:	1bc0      	subs	r0, r0, r7
 800056e:	4286      	cmp	r6, r0
 8000570:	d2df      	bcs.n	8000532 <FLASH_WaitForLastOperation+0xe>
 8000572:	e7f7      	b.n	8000564 <FLASH_WaitForLastOperation+0x40>
 8000574:	40022000 	.word	0x40022000

08000578 <HAL_FLASH_Program>:
{
 8000578:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  __HAL_LOCK(&pFlash);
 800057c:	4c1f      	ldr	r4, [pc, #124]	; (80005fc <HAL_FLASH_Program+0x84>)
{
 800057e:	4699      	mov	r9, r3
  __HAL_LOCK(&pFlash);
 8000580:	7e23      	ldrb	r3, [r4, #24]
{
 8000582:	4605      	mov	r5, r0
  __HAL_LOCK(&pFlash);
 8000584:	2b01      	cmp	r3, #1
{
 8000586:	460f      	mov	r7, r1
 8000588:	4690      	mov	r8, r2
  __HAL_LOCK(&pFlash);
 800058a:	d033      	beq.n	80005f4 <HAL_FLASH_Program+0x7c>
 800058c:	2301      	movs	r3, #1
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 800058e:	f24c 3050 	movw	r0, #50000	; 0xc350
  __HAL_LOCK(&pFlash);
 8000592:	7623      	strb	r3, [r4, #24]
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8000594:	f7ff ffc6 	bl	8000524 <FLASH_WaitForLastOperation>
  if(status == HAL_OK)
 8000598:	bb40      	cbnz	r0, 80005ec <HAL_FLASH_Program+0x74>
    if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
 800059a:	2d01      	cmp	r5, #1
 800059c:	d003      	beq.n	80005a6 <HAL_FLASH_Program+0x2e>
      nbiterations = 4U;
 800059e:	2d02      	cmp	r5, #2
 80005a0:	bf0c      	ite	eq
 80005a2:	2502      	moveq	r5, #2
 80005a4:	2504      	movne	r5, #4
 80005a6:	2600      	movs	r6, #0
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 80005a8:	46b2      	mov	sl, r6
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 80005aa:	f8df b054 	ldr.w	fp, [pc, #84]	; 8000600 <HAL_FLASH_Program+0x88>
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 80005ae:	0132      	lsls	r2, r6, #4
 80005b0:	4640      	mov	r0, r8
 80005b2:	4649      	mov	r1, r9
 80005b4:	f7ff fe36 	bl	8000224 <__aeabi_llsr>
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 80005b8:	f8c4 a01c 	str.w	sl, [r4, #28]
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 80005bc:	f8db 3010 	ldr.w	r3, [fp, #16]
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 80005c0:	b280      	uxth	r0, r0
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 80005c2:	f043 0301 	orr.w	r3, r3, #1
 80005c6:	f8cb 3010 	str.w	r3, [fp, #16]
  *(__IO uint16_t*)Address = Data;
 80005ca:	f827 0016 	strh.w	r0, [r7, r6, lsl #1]
        status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 80005ce:	f24c 3050 	movw	r0, #50000	; 0xc350
 80005d2:	f7ff ffa7 	bl	8000524 <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
 80005d6:	f8db 3010 	ldr.w	r3, [fp, #16]
 80005da:	f023 0301 	bic.w	r3, r3, #1
 80005de:	f8cb 3010 	str.w	r3, [fp, #16]
      if (status != HAL_OK)
 80005e2:	b918      	cbnz	r0, 80005ec <HAL_FLASH_Program+0x74>
 80005e4:	3601      	adds	r6, #1
    for (index = 0U; index < nbiterations; index++)
 80005e6:	b2f3      	uxtb	r3, r6
 80005e8:	429d      	cmp	r5, r3
 80005ea:	d8e0      	bhi.n	80005ae <HAL_FLASH_Program+0x36>
  __HAL_UNLOCK(&pFlash);
 80005ec:	2300      	movs	r3, #0
 80005ee:	7623      	strb	r3, [r4, #24]
  return status;
 80005f0:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
  __HAL_LOCK(&pFlash);
 80005f4:	2002      	movs	r0, #2
}
 80005f6:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80005fa:	bf00      	nop
 80005fc:	20000190 	.word	0x20000190
 8000600:	40022000 	.word	0x40022000

08000604 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 8000604:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 8000608:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 800060a:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 800060c:	4f6c      	ldr	r7, [pc, #432]	; (80007c0 <HAL_GPIO_Init+0x1bc>)
 800060e:	4b6d      	ldr	r3, [pc, #436]	; (80007c4 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000610:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 80007cc <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 8000614:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 80007d0 <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 8000618:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 800061c:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 800061e:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000622:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 8000626:	45a0      	cmp	r8, r4
 8000628:	f040 8085 	bne.w	8000736 <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 800062c:	684d      	ldr	r5, [r1, #4]
 800062e:	2d12      	cmp	r5, #18
 8000630:	f000 80b7 	beq.w	80007a2 <HAL_GPIO_Init+0x19e>
 8000634:	f200 808d 	bhi.w	8000752 <HAL_GPIO_Init+0x14e>
 8000638:	2d02      	cmp	r5, #2
 800063a:	f000 80af 	beq.w	800079c <HAL_GPIO_Init+0x198>
 800063e:	f200 8081 	bhi.w	8000744 <HAL_GPIO_Init+0x140>
 8000642:	2d00      	cmp	r5, #0
 8000644:	f000 8091 	beq.w	800076a <HAL_GPIO_Init+0x166>
 8000648:	2d01      	cmp	r5, #1
 800064a:	f000 80a5 	beq.w	8000798 <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800064e:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8000652:	2cff      	cmp	r4, #255	; 0xff
 8000654:	bf93      	iteet	ls
 8000656:	4682      	movls	sl, r0
 8000658:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 800065c:	3d08      	subhi	r5, #8
 800065e:	f8d0 b000 	ldrls.w	fp, [r0]
 8000662:	bf92      	itee	ls
 8000664:	00b5      	lslls	r5, r6, #2
 8000666:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 800066a:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800066c:	fa09 f805 	lsl.w	r8, r9, r5
 8000670:	ea2b 0808 	bic.w	r8, fp, r8
 8000674:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8000678:	bf88      	it	hi
 800067a:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800067e:	ea48 0505 	orr.w	r5, r8, r5
 8000682:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 8000686:	f8d1 a004 	ldr.w	sl, [r1, #4]
 800068a:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 800068e:	d052      	beq.n	8000736 <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000690:	69bd      	ldr	r5, [r7, #24]
 8000692:	f026 0803 	bic.w	r8, r6, #3
 8000696:	f045 0501 	orr.w	r5, r5, #1
 800069a:	61bd      	str	r5, [r7, #24]
 800069c:	69bd      	ldr	r5, [r7, #24]
 800069e:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 80006a2:	f005 0501 	and.w	r5, r5, #1
 80006a6:	9501      	str	r5, [sp, #4]
 80006a8:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80006ac:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 80006b0:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80006b2:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 80006b6:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80006ba:	fa09 f90b 	lsl.w	r9, r9, fp
 80006be:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80006c2:	4d41      	ldr	r5, [pc, #260]	; (80007c8 <HAL_GPIO_Init+0x1c4>)
 80006c4:	42a8      	cmp	r0, r5
 80006c6:	d071      	beq.n	80007ac <HAL_GPIO_Init+0x1a8>
 80006c8:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80006cc:	42a8      	cmp	r0, r5
 80006ce:	d06f      	beq.n	80007b0 <HAL_GPIO_Init+0x1ac>
 80006d0:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80006d4:	42a8      	cmp	r0, r5
 80006d6:	d06d      	beq.n	80007b4 <HAL_GPIO_Init+0x1b0>
 80006d8:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80006dc:	42a8      	cmp	r0, r5
 80006de:	d06b      	beq.n	80007b8 <HAL_GPIO_Init+0x1b4>
 80006e0:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80006e4:	42a8      	cmp	r0, r5
 80006e6:	d069      	beq.n	80007bc <HAL_GPIO_Init+0x1b8>
 80006e8:	4570      	cmp	r0, lr
 80006ea:	bf0c      	ite	eq
 80006ec:	2505      	moveq	r5, #5
 80006ee:	2506      	movne	r5, #6
 80006f0:	fa05 f50b 	lsl.w	r5, r5, fp
 80006f4:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 80006f8:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 80006fc:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 80006fe:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 8000702:	bf14      	ite	ne
 8000704:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 8000706:	43a5      	biceq	r5, r4
 8000708:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 800070a:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 800070c:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 8000710:	bf14      	ite	ne
 8000712:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 8000714:	43a5      	biceq	r5, r4
 8000716:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 8000718:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 800071a:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 800071e:	bf14      	ite	ne
 8000720:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 8000722:	43a5      	biceq	r5, r4
 8000724:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 8000726:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 8000728:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 800072c:	bf14      	ite	ne
 800072e:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 8000730:	ea25 0404 	biceq.w	r4, r5, r4
 8000734:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 8000736:	3601      	adds	r6, #1
 8000738:	2e10      	cmp	r6, #16
 800073a:	f47f af6d 	bne.w	8000618 <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 800073e:	b003      	add	sp, #12
 8000740:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 8000744:	2d03      	cmp	r5, #3
 8000746:	d025      	beq.n	8000794 <HAL_GPIO_Init+0x190>
 8000748:	2d11      	cmp	r5, #17
 800074a:	d180      	bne.n	800064e <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 800074c:	68ca      	ldr	r2, [r1, #12]
 800074e:	3204      	adds	r2, #4
          break;
 8000750:	e77d      	b.n	800064e <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8000752:	4565      	cmp	r5, ip
 8000754:	d009      	beq.n	800076a <HAL_GPIO_Init+0x166>
 8000756:	d812      	bhi.n	800077e <HAL_GPIO_Init+0x17a>
 8000758:	f8df 9078 	ldr.w	r9, [pc, #120]	; 80007d4 <HAL_GPIO_Init+0x1d0>
 800075c:	454d      	cmp	r5, r9
 800075e:	d004      	beq.n	800076a <HAL_GPIO_Init+0x166>
 8000760:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8000764:	454d      	cmp	r5, r9
 8000766:	f47f af72 	bne.w	800064e <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 800076a:	688a      	ldr	r2, [r1, #8]
 800076c:	b1e2      	cbz	r2, 80007a8 <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 800076e:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 8000770:	bf0c      	ite	eq
 8000772:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 8000776:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 800077a:	2208      	movs	r2, #8
 800077c:	e767      	b.n	800064e <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 800077e:	f8df 9058 	ldr.w	r9, [pc, #88]	; 80007d8 <HAL_GPIO_Init+0x1d4>
 8000782:	454d      	cmp	r5, r9
 8000784:	d0f1      	beq.n	800076a <HAL_GPIO_Init+0x166>
 8000786:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 800078a:	454d      	cmp	r5, r9
 800078c:	d0ed      	beq.n	800076a <HAL_GPIO_Init+0x166>
 800078e:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 8000792:	e7e7      	b.n	8000764 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8000794:	2200      	movs	r2, #0
 8000796:	e75a      	b.n	800064e <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 8000798:	68ca      	ldr	r2, [r1, #12]
          break;
 800079a:	e758      	b.n	800064e <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 800079c:	68ca      	ldr	r2, [r1, #12]
 800079e:	3208      	adds	r2, #8
          break;
 80007a0:	e755      	b.n	800064e <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 80007a2:	68ca      	ldr	r2, [r1, #12]
 80007a4:	320c      	adds	r2, #12
          break;
 80007a6:	e752      	b.n	800064e <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 80007a8:	2204      	movs	r2, #4
 80007aa:	e750      	b.n	800064e <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80007ac:	2500      	movs	r5, #0
 80007ae:	e79f      	b.n	80006f0 <HAL_GPIO_Init+0xec>
 80007b0:	2501      	movs	r5, #1
 80007b2:	e79d      	b.n	80006f0 <HAL_GPIO_Init+0xec>
 80007b4:	2502      	movs	r5, #2
 80007b6:	e79b      	b.n	80006f0 <HAL_GPIO_Init+0xec>
 80007b8:	2503      	movs	r5, #3
 80007ba:	e799      	b.n	80006f0 <HAL_GPIO_Init+0xec>
 80007bc:	2504      	movs	r5, #4
 80007be:	e797      	b.n	80006f0 <HAL_GPIO_Init+0xec>
 80007c0:	40021000 	.word	0x40021000
 80007c4:	40010400 	.word	0x40010400
 80007c8:	40010800 	.word	0x40010800
 80007cc:	40011c00 	.word	0x40011c00
 80007d0:	10210000 	.word	0x10210000
 80007d4:	10110000 	.word	0x10110000
 80007d8:	10310000 	.word	0x10310000

080007dc <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 80007dc:	b10a      	cbz	r2, 80007e2 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 80007de:	6101      	str	r1, [r0, #16]
 80007e0:	4770      	bx	lr
 80007e2:	0409      	lsls	r1, r1, #16
 80007e4:	e7fb      	b.n	80007de <HAL_GPIO_WritePin+0x2>

080007e6 <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 80007e6:	68c3      	ldr	r3, [r0, #12]
 80007e8:	4059      	eors	r1, r3
 80007ea:	60c1      	str	r1, [r0, #12]
 80007ec:	4770      	bx	lr
	...

080007f0 <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80007f0:	6803      	ldr	r3, [r0, #0]
{
 80007f2:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80007f6:	07db      	lsls	r3, r3, #31
{
 80007f8:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80007fa:	d410      	bmi.n	800081e <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 80007fc:	682b      	ldr	r3, [r5, #0]
 80007fe:	079f      	lsls	r7, r3, #30
 8000800:	d45e      	bmi.n	80008c0 <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8000802:	682b      	ldr	r3, [r5, #0]
 8000804:	0719      	lsls	r1, r3, #28
 8000806:	f100 8095 	bmi.w	8000934 <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 800080a:	682b      	ldr	r3, [r5, #0]
 800080c:	075a      	lsls	r2, r3, #29
 800080e:	f100 80bf 	bmi.w	8000990 <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8000812:	69ea      	ldr	r2, [r5, #28]
 8000814:	2a00      	cmp	r2, #0
 8000816:	f040 812d 	bne.w	8000a74 <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 800081a:	2000      	movs	r0, #0
 800081c:	e014      	b.n	8000848 <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 800081e:	4c90      	ldr	r4, [pc, #576]	; (8000a60 <HAL_RCC_OscConfig+0x270>)
 8000820:	6863      	ldr	r3, [r4, #4]
 8000822:	f003 030c 	and.w	r3, r3, #12
 8000826:	2b04      	cmp	r3, #4
 8000828:	d007      	beq.n	800083a <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 800082a:	6863      	ldr	r3, [r4, #4]
 800082c:	f003 030c 	and.w	r3, r3, #12
 8000830:	2b08      	cmp	r3, #8
 8000832:	d10c      	bne.n	800084e <HAL_RCC_OscConfig+0x5e>
 8000834:	6863      	ldr	r3, [r4, #4]
 8000836:	03de      	lsls	r6, r3, #15
 8000838:	d509      	bpl.n	800084e <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800083a:	6823      	ldr	r3, [r4, #0]
 800083c:	039c      	lsls	r4, r3, #14
 800083e:	d5dd      	bpl.n	80007fc <HAL_RCC_OscConfig+0xc>
 8000840:	686b      	ldr	r3, [r5, #4]
 8000842:	2b00      	cmp	r3, #0
 8000844:	d1da      	bne.n	80007fc <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 8000846:	2001      	movs	r0, #1
}
 8000848:	b002      	add	sp, #8
 800084a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800084e:	686b      	ldr	r3, [r5, #4]
 8000850:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8000854:	d110      	bne.n	8000878 <HAL_RCC_OscConfig+0x88>
 8000856:	6823      	ldr	r3, [r4, #0]
 8000858:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 800085c:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 800085e:	f7ff fd2f 	bl	80002c0 <HAL_GetTick>
 8000862:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000864:	6823      	ldr	r3, [r4, #0]
 8000866:	0398      	lsls	r0, r3, #14
 8000868:	d4c8      	bmi.n	80007fc <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 800086a:	f7ff fd29 	bl	80002c0 <HAL_GetTick>
 800086e:	1b80      	subs	r0, r0, r6
 8000870:	2864      	cmp	r0, #100	; 0x64
 8000872:	d9f7      	bls.n	8000864 <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 8000874:	2003      	movs	r0, #3
 8000876:	e7e7      	b.n	8000848 <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000878:	b99b      	cbnz	r3, 80008a2 <HAL_RCC_OscConfig+0xb2>
 800087a:	6823      	ldr	r3, [r4, #0]
 800087c:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8000880:	6023      	str	r3, [r4, #0]
 8000882:	6823      	ldr	r3, [r4, #0]
 8000884:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8000888:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 800088a:	f7ff fd19 	bl	80002c0 <HAL_GetTick>
 800088e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8000890:	6823      	ldr	r3, [r4, #0]
 8000892:	0399      	lsls	r1, r3, #14
 8000894:	d5b2      	bpl.n	80007fc <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8000896:	f7ff fd13 	bl	80002c0 <HAL_GetTick>
 800089a:	1b80      	subs	r0, r0, r6
 800089c:	2864      	cmp	r0, #100	; 0x64
 800089e:	d9f7      	bls.n	8000890 <HAL_RCC_OscConfig+0xa0>
 80008a0:	e7e8      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80008a2:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 80008a6:	6823      	ldr	r3, [r4, #0]
 80008a8:	d103      	bne.n	80008b2 <HAL_RCC_OscConfig+0xc2>
 80008aa:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 80008ae:	6023      	str	r3, [r4, #0]
 80008b0:	e7d1      	b.n	8000856 <HAL_RCC_OscConfig+0x66>
 80008b2:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 80008b6:	6023      	str	r3, [r4, #0]
 80008b8:	6823      	ldr	r3, [r4, #0]
 80008ba:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 80008be:	e7cd      	b.n	800085c <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 80008c0:	4c67      	ldr	r4, [pc, #412]	; (8000a60 <HAL_RCC_OscConfig+0x270>)
 80008c2:	6863      	ldr	r3, [r4, #4]
 80008c4:	f013 0f0c 	tst.w	r3, #12
 80008c8:	d007      	beq.n	80008da <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 80008ca:	6863      	ldr	r3, [r4, #4]
 80008cc:	f003 030c 	and.w	r3, r3, #12
 80008d0:	2b08      	cmp	r3, #8
 80008d2:	d110      	bne.n	80008f6 <HAL_RCC_OscConfig+0x106>
 80008d4:	6863      	ldr	r3, [r4, #4]
 80008d6:	03da      	lsls	r2, r3, #15
 80008d8:	d40d      	bmi.n	80008f6 <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 80008da:	6823      	ldr	r3, [r4, #0]
 80008dc:	079b      	lsls	r3, r3, #30
 80008de:	d502      	bpl.n	80008e6 <HAL_RCC_OscConfig+0xf6>
 80008e0:	692b      	ldr	r3, [r5, #16]
 80008e2:	2b01      	cmp	r3, #1
 80008e4:	d1af      	bne.n	8000846 <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80008e6:	6823      	ldr	r3, [r4, #0]
 80008e8:	696a      	ldr	r2, [r5, #20]
 80008ea:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 80008ee:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 80008f2:	6023      	str	r3, [r4, #0]
 80008f4:	e785      	b.n	8000802 <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 80008f6:	692a      	ldr	r2, [r5, #16]
 80008f8:	4b5a      	ldr	r3, [pc, #360]	; (8000a64 <HAL_RCC_OscConfig+0x274>)
 80008fa:	b16a      	cbz	r2, 8000918 <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 80008fc:	2201      	movs	r2, #1
 80008fe:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8000900:	f7ff fcde 	bl	80002c0 <HAL_GetTick>
 8000904:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000906:	6823      	ldr	r3, [r4, #0]
 8000908:	079f      	lsls	r7, r3, #30
 800090a:	d4ec      	bmi.n	80008e6 <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 800090c:	f7ff fcd8 	bl	80002c0 <HAL_GetTick>
 8000910:	1b80      	subs	r0, r0, r6
 8000912:	2802      	cmp	r0, #2
 8000914:	d9f7      	bls.n	8000906 <HAL_RCC_OscConfig+0x116>
 8000916:	e7ad      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8000918:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 800091a:	f7ff fcd1 	bl	80002c0 <HAL_GetTick>
 800091e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8000920:	6823      	ldr	r3, [r4, #0]
 8000922:	0798      	lsls	r0, r3, #30
 8000924:	f57f af6d 	bpl.w	8000802 <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8000928:	f7ff fcca 	bl	80002c0 <HAL_GetTick>
 800092c:	1b80      	subs	r0, r0, r6
 800092e:	2802      	cmp	r0, #2
 8000930:	d9f6      	bls.n	8000920 <HAL_RCC_OscConfig+0x130>
 8000932:	e79f      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8000934:	69aa      	ldr	r2, [r5, #24]
 8000936:	4c4a      	ldr	r4, [pc, #296]	; (8000a60 <HAL_RCC_OscConfig+0x270>)
 8000938:	4b4b      	ldr	r3, [pc, #300]	; (8000a68 <HAL_RCC_OscConfig+0x278>)
 800093a:	b1da      	cbz	r2, 8000974 <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 800093c:	2201      	movs	r2, #1
 800093e:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8000940:	f7ff fcbe 	bl	80002c0 <HAL_GetTick>
 8000944:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8000946:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000948:	079b      	lsls	r3, r3, #30
 800094a:	d50d      	bpl.n	8000968 <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 800094c:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 8000950:	4b46      	ldr	r3, [pc, #280]	; (8000a6c <HAL_RCC_OscConfig+0x27c>)
 8000952:	681b      	ldr	r3, [r3, #0]
 8000954:	fbb3 f3f2 	udiv	r3, r3, r2
 8000958:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 800095a:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 800095c:	9b01      	ldr	r3, [sp, #4]
 800095e:	1e5a      	subs	r2, r3, #1
 8000960:	9201      	str	r2, [sp, #4]
 8000962:	2b00      	cmp	r3, #0
 8000964:	d1f9      	bne.n	800095a <HAL_RCC_OscConfig+0x16a>
 8000966:	e750      	b.n	800080a <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000968:	f7ff fcaa 	bl	80002c0 <HAL_GetTick>
 800096c:	1b80      	subs	r0, r0, r6
 800096e:	2802      	cmp	r0, #2
 8000970:	d9e9      	bls.n	8000946 <HAL_RCC_OscConfig+0x156>
 8000972:	e77f      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 8000974:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8000976:	f7ff fca3 	bl	80002c0 <HAL_GetTick>
 800097a:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 800097c:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800097e:	079f      	lsls	r7, r3, #30
 8000980:	f57f af43 	bpl.w	800080a <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000984:	f7ff fc9c 	bl	80002c0 <HAL_GetTick>
 8000988:	1b80      	subs	r0, r0, r6
 800098a:	2802      	cmp	r0, #2
 800098c:	d9f6      	bls.n	800097c <HAL_RCC_OscConfig+0x18c>
 800098e:	e771      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8000990:	4c33      	ldr	r4, [pc, #204]	; (8000a60 <HAL_RCC_OscConfig+0x270>)
 8000992:	69e3      	ldr	r3, [r4, #28]
 8000994:	00d8      	lsls	r0, r3, #3
 8000996:	d424      	bmi.n	80009e2 <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 8000998:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 800099a:	69e3      	ldr	r3, [r4, #28]
 800099c:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 80009a0:	61e3      	str	r3, [r4, #28]
 80009a2:	69e3      	ldr	r3, [r4, #28]
 80009a4:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80009a8:	9300      	str	r3, [sp, #0]
 80009aa:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80009ac:	4e30      	ldr	r6, [pc, #192]	; (8000a70 <HAL_RCC_OscConfig+0x280>)
 80009ae:	6833      	ldr	r3, [r6, #0]
 80009b0:	05d9      	lsls	r1, r3, #23
 80009b2:	d518      	bpl.n	80009e6 <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80009b4:	68eb      	ldr	r3, [r5, #12]
 80009b6:	2b01      	cmp	r3, #1
 80009b8:	d126      	bne.n	8000a08 <HAL_RCC_OscConfig+0x218>
 80009ba:	6a23      	ldr	r3, [r4, #32]
 80009bc:	f043 0301 	orr.w	r3, r3, #1
 80009c0:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 80009c2:	f7ff fc7d 	bl	80002c0 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80009c6:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 80009ca:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80009cc:	6a23      	ldr	r3, [r4, #32]
 80009ce:	079b      	lsls	r3, r3, #30
 80009d0:	d53f      	bpl.n	8000a52 <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 80009d2:	2f00      	cmp	r7, #0
 80009d4:	f43f af1d 	beq.w	8000812 <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 80009d8:	69e3      	ldr	r3, [r4, #28]
 80009da:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 80009de:	61e3      	str	r3, [r4, #28]
 80009e0:	e717      	b.n	8000812 <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 80009e2:	2700      	movs	r7, #0
 80009e4:	e7e2      	b.n	80009ac <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 80009e6:	6833      	ldr	r3, [r6, #0]
 80009e8:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80009ec:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 80009ee:	f7ff fc67 	bl	80002c0 <HAL_GetTick>
 80009f2:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80009f4:	6833      	ldr	r3, [r6, #0]
 80009f6:	05da      	lsls	r2, r3, #23
 80009f8:	d4dc      	bmi.n	80009b4 <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 80009fa:	f7ff fc61 	bl	80002c0 <HAL_GetTick>
 80009fe:	eba0 0008 	sub.w	r0, r0, r8
 8000a02:	2864      	cmp	r0, #100	; 0x64
 8000a04:	d9f6      	bls.n	80009f4 <HAL_RCC_OscConfig+0x204>
 8000a06:	e735      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a08:	b9ab      	cbnz	r3, 8000a36 <HAL_RCC_OscConfig+0x246>
 8000a0a:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000a0c:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a10:	f023 0301 	bic.w	r3, r3, #1
 8000a14:	6223      	str	r3, [r4, #32]
 8000a16:	6a23      	ldr	r3, [r4, #32]
 8000a18:	f023 0304 	bic.w	r3, r3, #4
 8000a1c:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000a1e:	f7ff fc4f 	bl	80002c0 <HAL_GetTick>
 8000a22:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 8000a24:	6a23      	ldr	r3, [r4, #32]
 8000a26:	0798      	lsls	r0, r3, #30
 8000a28:	d5d3      	bpl.n	80009d2 <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000a2a:	f7ff fc49 	bl	80002c0 <HAL_GetTick>
 8000a2e:	1b80      	subs	r0, r0, r6
 8000a30:	4540      	cmp	r0, r8
 8000a32:	d9f7      	bls.n	8000a24 <HAL_RCC_OscConfig+0x234>
 8000a34:	e71e      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a36:	2b05      	cmp	r3, #5
 8000a38:	6a23      	ldr	r3, [r4, #32]
 8000a3a:	d103      	bne.n	8000a44 <HAL_RCC_OscConfig+0x254>
 8000a3c:	f043 0304 	orr.w	r3, r3, #4
 8000a40:	6223      	str	r3, [r4, #32]
 8000a42:	e7ba      	b.n	80009ba <HAL_RCC_OscConfig+0x1ca>
 8000a44:	f023 0301 	bic.w	r3, r3, #1
 8000a48:	6223      	str	r3, [r4, #32]
 8000a4a:	6a23      	ldr	r3, [r4, #32]
 8000a4c:	f023 0304 	bic.w	r3, r3, #4
 8000a50:	e7b6      	b.n	80009c0 <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000a52:	f7ff fc35 	bl	80002c0 <HAL_GetTick>
 8000a56:	eba0 0008 	sub.w	r0, r0, r8
 8000a5a:	42b0      	cmp	r0, r6
 8000a5c:	d9b6      	bls.n	80009cc <HAL_RCC_OscConfig+0x1dc>
 8000a5e:	e709      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
 8000a60:	40021000 	.word	0x40021000
 8000a64:	42420000 	.word	0x42420000
 8000a68:	42420480 	.word	0x42420480
 8000a6c:	2000000c 	.word	0x2000000c
 8000a70:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000a74:	4c22      	ldr	r4, [pc, #136]	; (8000b00 <HAL_RCC_OscConfig+0x310>)
 8000a76:	6863      	ldr	r3, [r4, #4]
 8000a78:	f003 030c 	and.w	r3, r3, #12
 8000a7c:	2b08      	cmp	r3, #8
 8000a7e:	f43f aee2 	beq.w	8000846 <HAL_RCC_OscConfig+0x56>
 8000a82:	2300      	movs	r3, #0
 8000a84:	4e1f      	ldr	r6, [pc, #124]	; (8000b04 <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000a86:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8000a88:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000a8a:	d12b      	bne.n	8000ae4 <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 8000a8c:	f7ff fc18 	bl	80002c0 <HAL_GetTick>
 8000a90:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000a92:	6823      	ldr	r3, [r4, #0]
 8000a94:	0199      	lsls	r1, r3, #6
 8000a96:	d41f      	bmi.n	8000ad8 <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8000a98:	6a2b      	ldr	r3, [r5, #32]
 8000a9a:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8000a9e:	d105      	bne.n	8000aac <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8000aa0:	6862      	ldr	r2, [r4, #4]
 8000aa2:	68a9      	ldr	r1, [r5, #8]
 8000aa4:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 8000aa8:	430a      	orrs	r2, r1
 8000aaa:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8000aac:	6a69      	ldr	r1, [r5, #36]	; 0x24
 8000aae:	6862      	ldr	r2, [r4, #4]
 8000ab0:	430b      	orrs	r3, r1
 8000ab2:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 8000ab6:	4313      	orrs	r3, r2
 8000ab8:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 8000aba:	2301      	movs	r3, #1
 8000abc:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 8000abe:	f7ff fbff 	bl	80002c0 <HAL_GetTick>
 8000ac2:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8000ac4:	6823      	ldr	r3, [r4, #0]
 8000ac6:	019a      	lsls	r2, r3, #6
 8000ac8:	f53f aea7 	bmi.w	800081a <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000acc:	f7ff fbf8 	bl	80002c0 <HAL_GetTick>
 8000ad0:	1b40      	subs	r0, r0, r5
 8000ad2:	2802      	cmp	r0, #2
 8000ad4:	d9f6      	bls.n	8000ac4 <HAL_RCC_OscConfig+0x2d4>
 8000ad6:	e6cd      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000ad8:	f7ff fbf2 	bl	80002c0 <HAL_GetTick>
 8000adc:	1bc0      	subs	r0, r0, r7
 8000ade:	2802      	cmp	r0, #2
 8000ae0:	d9d7      	bls.n	8000a92 <HAL_RCC_OscConfig+0x2a2>
 8000ae2:	e6c7      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8000ae4:	f7ff fbec 	bl	80002c0 <HAL_GetTick>
 8000ae8:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000aea:	6823      	ldr	r3, [r4, #0]
 8000aec:	019b      	lsls	r3, r3, #6
 8000aee:	f57f ae94 	bpl.w	800081a <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000af2:	f7ff fbe5 	bl	80002c0 <HAL_GetTick>
 8000af6:	1b40      	subs	r0, r0, r5
 8000af8:	2802      	cmp	r0, #2
 8000afa:	d9f6      	bls.n	8000aea <HAL_RCC_OscConfig+0x2fa>
 8000afc:	e6ba      	b.n	8000874 <HAL_RCC_OscConfig+0x84>
 8000afe:	bf00      	nop
 8000b00:	40021000 	.word	0x40021000
 8000b04:	42420060 	.word	0x42420060

08000b08 <HAL_RCC_GetSysClockFreq>:
{
 8000b08:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8000b0a:	4b19      	ldr	r3, [pc, #100]	; (8000b70 <HAL_RCC_GetSysClockFreq+0x68>)
{
 8000b0c:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8000b0e:	ac02      	add	r4, sp, #8
 8000b10:	f103 0510 	add.w	r5, r3, #16
 8000b14:	4622      	mov	r2, r4
 8000b16:	6818      	ldr	r0, [r3, #0]
 8000b18:	6859      	ldr	r1, [r3, #4]
 8000b1a:	3308      	adds	r3, #8
 8000b1c:	c203      	stmia	r2!, {r0, r1}
 8000b1e:	42ab      	cmp	r3, r5
 8000b20:	4614      	mov	r4, r2
 8000b22:	d1f7      	bne.n	8000b14 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8000b24:	2301      	movs	r3, #1
 8000b26:	f88d 3004 	strb.w	r3, [sp, #4]
 8000b2a:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 8000b2c:	4911      	ldr	r1, [pc, #68]	; (8000b74 <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8000b2e:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 8000b32:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 8000b34:	f003 020c 	and.w	r2, r3, #12
 8000b38:	2a08      	cmp	r2, #8
 8000b3a:	d117      	bne.n	8000b6c <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000b3c:	f3c3 4283 	ubfx	r2, r3, #18, #4
 8000b40:	a806      	add	r0, sp, #24
 8000b42:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000b44:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000b46:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000b4a:	d50c      	bpl.n	8000b66 <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000b4c:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000b4e:	480a      	ldr	r0, [pc, #40]	; (8000b78 <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000b50:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000b54:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000b56:	aa06      	add	r2, sp, #24
 8000b58:	4413      	add	r3, r2
 8000b5a:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000b5e:	fbb0 f0f3 	udiv	r0, r0, r3
}
 8000b62:	b007      	add	sp, #28
 8000b64:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 8000b66:	4805      	ldr	r0, [pc, #20]	; (8000b7c <HAL_RCC_GetSysClockFreq+0x74>)
 8000b68:	4350      	muls	r0, r2
 8000b6a:	e7fa      	b.n	8000b62 <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 8000b6c:	4802      	ldr	r0, [pc, #8]	; (8000b78 <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 8000b6e:	e7f8      	b.n	8000b62 <HAL_RCC_GetSysClockFreq+0x5a>
 8000b70:	08003410 	.word	0x08003410
 8000b74:	40021000 	.word	0x40021000
 8000b78:	007a1200 	.word	0x007a1200
 8000b7c:	003d0900 	.word	0x003d0900

08000b80 <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000b80:	4a54      	ldr	r2, [pc, #336]	; (8000cd4 <HAL_RCC_ClockConfig+0x154>)
{
 8000b82:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000b86:	6813      	ldr	r3, [r2, #0]
{
 8000b88:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000b8a:	f003 0307 	and.w	r3, r3, #7
 8000b8e:	428b      	cmp	r3, r1
{
 8000b90:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000b92:	d32a      	bcc.n	8000bea <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8000b94:	6829      	ldr	r1, [r5, #0]
 8000b96:	078c      	lsls	r4, r1, #30
 8000b98:	d434      	bmi.n	8000c04 <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8000b9a:	07ca      	lsls	r2, r1, #31
 8000b9c:	d447      	bmi.n	8000c2e <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 8000b9e:	4a4d      	ldr	r2, [pc, #308]	; (8000cd4 <HAL_RCC_ClockConfig+0x154>)
 8000ba0:	6813      	ldr	r3, [r2, #0]
 8000ba2:	f003 0307 	and.w	r3, r3, #7
 8000ba6:	429e      	cmp	r6, r3
 8000ba8:	f0c0 8082 	bcc.w	8000cb0 <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000bac:	682a      	ldr	r2, [r5, #0]
 8000bae:	4c4a      	ldr	r4, [pc, #296]	; (8000cd8 <HAL_RCC_ClockConfig+0x158>)
 8000bb0:	f012 0f04 	tst.w	r2, #4
 8000bb4:	f040 8087 	bne.w	8000cc6 <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000bb8:	0713      	lsls	r3, r2, #28
 8000bba:	d506      	bpl.n	8000bca <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 8000bbc:	6863      	ldr	r3, [r4, #4]
 8000bbe:	692a      	ldr	r2, [r5, #16]
 8000bc0:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8000bc4:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000bc8:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 8000bca:	f7ff ff9d 	bl	8000b08 <HAL_RCC_GetSysClockFreq>
 8000bce:	6863      	ldr	r3, [r4, #4]
 8000bd0:	4a42      	ldr	r2, [pc, #264]	; (8000cdc <HAL_RCC_ClockConfig+0x15c>)
 8000bd2:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8000bd6:	5cd3      	ldrb	r3, [r2, r3]
 8000bd8:	40d8      	lsrs	r0, r3
 8000bda:	4b41      	ldr	r3, [pc, #260]	; (8000ce0 <HAL_RCC_ClockConfig+0x160>)
 8000bdc:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 8000bde:	2000      	movs	r0, #0
 8000be0:	f7ff fb2c 	bl	800023c <HAL_InitTick>
  return HAL_OK;
 8000be4:	2000      	movs	r0, #0
}
 8000be6:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000bea:	6813      	ldr	r3, [r2, #0]
 8000bec:	f023 0307 	bic.w	r3, r3, #7
 8000bf0:	430b      	orrs	r3, r1
 8000bf2:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000bf4:	6813      	ldr	r3, [r2, #0]
 8000bf6:	f003 0307 	and.w	r3, r3, #7
 8000bfa:	4299      	cmp	r1, r3
 8000bfc:	d0ca      	beq.n	8000b94 <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 8000bfe:	2001      	movs	r0, #1
 8000c00:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8000c04:	4b34      	ldr	r3, [pc, #208]	; (8000cd8 <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000c06:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8000c0a:	bf1e      	ittt	ne
 8000c0c:	685a      	ldrne	r2, [r3, #4]
 8000c0e:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 8000c12:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000c14:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8000c16:	bf42      	ittt	mi
 8000c18:	685a      	ldrmi	r2, [r3, #4]
 8000c1a:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 8000c1e:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8000c20:	685a      	ldr	r2, [r3, #4]
 8000c22:	68a8      	ldr	r0, [r5, #8]
 8000c24:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8000c28:	4302      	orrs	r2, r0
 8000c2a:	605a      	str	r2, [r3, #4]
 8000c2c:	e7b5      	b.n	8000b9a <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c2e:	686a      	ldr	r2, [r5, #4]
 8000c30:	4c29      	ldr	r4, [pc, #164]	; (8000cd8 <HAL_RCC_ClockConfig+0x158>)
 8000c32:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000c34:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c36:	d11c      	bne.n	8000c72 <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000c38:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000c3c:	d0df      	beq.n	8000bfe <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000c3e:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000c40:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000c44:	f023 0303 	bic.w	r3, r3, #3
 8000c48:	4313      	orrs	r3, r2
 8000c4a:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8000c4c:	f7ff fb38 	bl	80002c0 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c50:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 8000c52:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c54:	2b01      	cmp	r3, #1
 8000c56:	d114      	bne.n	8000c82 <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8000c58:	6863      	ldr	r3, [r4, #4]
 8000c5a:	f003 030c 	and.w	r3, r3, #12
 8000c5e:	2b04      	cmp	r3, #4
 8000c60:	d09d      	beq.n	8000b9e <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000c62:	f7ff fb2d 	bl	80002c0 <HAL_GetTick>
 8000c66:	1bc0      	subs	r0, r0, r7
 8000c68:	4540      	cmp	r0, r8
 8000c6a:	d9f5      	bls.n	8000c58 <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 8000c6c:	2003      	movs	r0, #3
 8000c6e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000c72:	2a02      	cmp	r2, #2
 8000c74:	d102      	bne.n	8000c7c <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8000c76:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 8000c7a:	e7df      	b.n	8000c3c <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000c7c:	f013 0f02 	tst.w	r3, #2
 8000c80:	e7dc      	b.n	8000c3c <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000c82:	2b02      	cmp	r3, #2
 8000c84:	d10f      	bne.n	8000ca6 <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000c86:	6863      	ldr	r3, [r4, #4]
 8000c88:	f003 030c 	and.w	r3, r3, #12
 8000c8c:	2b08      	cmp	r3, #8
 8000c8e:	d086      	beq.n	8000b9e <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000c90:	f7ff fb16 	bl	80002c0 <HAL_GetTick>
 8000c94:	1bc0      	subs	r0, r0, r7
 8000c96:	4540      	cmp	r0, r8
 8000c98:	d9f5      	bls.n	8000c86 <HAL_RCC_ClockConfig+0x106>
 8000c9a:	e7e7      	b.n	8000c6c <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000c9c:	f7ff fb10 	bl	80002c0 <HAL_GetTick>
 8000ca0:	1bc0      	subs	r0, r0, r7
 8000ca2:	4540      	cmp	r0, r8
 8000ca4:	d8e2      	bhi.n	8000c6c <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 8000ca6:	6863      	ldr	r3, [r4, #4]
 8000ca8:	f013 0f0c 	tst.w	r3, #12
 8000cac:	d1f6      	bne.n	8000c9c <HAL_RCC_ClockConfig+0x11c>
 8000cae:	e776      	b.n	8000b9e <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000cb0:	6813      	ldr	r3, [r2, #0]
 8000cb2:	f023 0307 	bic.w	r3, r3, #7
 8000cb6:	4333      	orrs	r3, r6
 8000cb8:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000cba:	6813      	ldr	r3, [r2, #0]
 8000cbc:	f003 0307 	and.w	r3, r3, #7
 8000cc0:	429e      	cmp	r6, r3
 8000cc2:	d19c      	bne.n	8000bfe <HAL_RCC_ClockConfig+0x7e>
 8000cc4:	e772      	b.n	8000bac <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8000cc6:	6863      	ldr	r3, [r4, #4]
 8000cc8:	68e9      	ldr	r1, [r5, #12]
 8000cca:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8000cce:	430b      	orrs	r3, r1
 8000cd0:	6063      	str	r3, [r4, #4]
 8000cd2:	e771      	b.n	8000bb8 <HAL_RCC_ClockConfig+0x38>
 8000cd4:	40022000 	.word	0x40022000
 8000cd8:	40021000 	.word	0x40021000
 8000cdc:	080034f7 	.word	0x080034f7
 8000ce0:	2000000c 	.word	0x2000000c

08000ce4 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8000ce4:	4b04      	ldr	r3, [pc, #16]	; (8000cf8 <HAL_RCC_GetPCLK1Freq+0x14>)
 8000ce6:	4a05      	ldr	r2, [pc, #20]	; (8000cfc <HAL_RCC_GetPCLK1Freq+0x18>)
 8000ce8:	685b      	ldr	r3, [r3, #4]
 8000cea:	f3c3 2302 	ubfx	r3, r3, #8, #3
 8000cee:	5cd3      	ldrb	r3, [r2, r3]
 8000cf0:	4a03      	ldr	r2, [pc, #12]	; (8000d00 <HAL_RCC_GetPCLK1Freq+0x1c>)
 8000cf2:	6810      	ldr	r0, [r2, #0]
}    
 8000cf4:	40d8      	lsrs	r0, r3
 8000cf6:	4770      	bx	lr
 8000cf8:	40021000 	.word	0x40021000
 8000cfc:	08003507 	.word	0x08003507
 8000d00:	2000000c 	.word	0x2000000c

08000d04 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 8000d04:	4b04      	ldr	r3, [pc, #16]	; (8000d18 <HAL_RCC_GetPCLK2Freq+0x14>)
 8000d06:	4a05      	ldr	r2, [pc, #20]	; (8000d1c <HAL_RCC_GetPCLK2Freq+0x18>)
 8000d08:	685b      	ldr	r3, [r3, #4]
 8000d0a:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 8000d0e:	5cd3      	ldrb	r3, [r2, r3]
 8000d10:	4a03      	ldr	r2, [pc, #12]	; (8000d20 <HAL_RCC_GetPCLK2Freq+0x1c>)
 8000d12:	6810      	ldr	r0, [r2, #0]
} 
 8000d14:	40d8      	lsrs	r0, r3
 8000d16:	4770      	bx	lr
 8000d18:	40021000 	.word	0x40021000
 8000d1c:	08003507 	.word	0x08003507
 8000d20:	2000000c 	.word	0x2000000c

08000d24 <HAL_TIM_Base_Start_IT>:
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

   /* Enable the TIM Update interrupt */
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000d24:	6803      	ldr	r3, [r0, #0]
   /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}
 8000d26:	2000      	movs	r0, #0
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000d28:	68da      	ldr	r2, [r3, #12]
 8000d2a:	f042 0201 	orr.w	r2, r2, #1
 8000d2e:	60da      	str	r2, [r3, #12]
  __HAL_TIM_ENABLE(htim);
 8000d30:	681a      	ldr	r2, [r3, #0]
 8000d32:	f042 0201 	orr.w	r2, r2, #1
 8000d36:	601a      	str	r2, [r3, #0]
}
 8000d38:	4770      	bx	lr

08000d3a <HAL_TIM_OC_DelayElapsedCallback>:
 8000d3a:	4770      	bx	lr

08000d3c <HAL_TIM_IC_CaptureCallback>:
 8000d3c:	4770      	bx	lr

08000d3e <HAL_TIM_PWM_PulseFinishedCallback>:
 8000d3e:	4770      	bx	lr

08000d40 <HAL_TIM_TriggerCallback>:
 8000d40:	4770      	bx	lr

08000d42 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000d42:	6803      	ldr	r3, [r0, #0]
{
 8000d44:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000d46:	691a      	ldr	r2, [r3, #16]
{
 8000d48:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000d4a:	0791      	lsls	r1, r2, #30
 8000d4c:	d50e      	bpl.n	8000d6c <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 8000d4e:	68da      	ldr	r2, [r3, #12]
 8000d50:	0792      	lsls	r2, r2, #30
 8000d52:	d50b      	bpl.n	8000d6c <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8000d54:	f06f 0202 	mvn.w	r2, #2
 8000d58:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000d5a:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000d5c:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000d5e:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000d60:	079b      	lsls	r3, r3, #30
 8000d62:	d077      	beq.n	8000e54 <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 8000d64:	f7ff ffea 	bl	8000d3c <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000d68:	2300      	movs	r3, #0
 8000d6a:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8000d6c:	6823      	ldr	r3, [r4, #0]
 8000d6e:	691a      	ldr	r2, [r3, #16]
 8000d70:	0750      	lsls	r0, r2, #29
 8000d72:	d510      	bpl.n	8000d96 <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 8000d74:	68da      	ldr	r2, [r3, #12]
 8000d76:	0751      	lsls	r1, r2, #29
 8000d78:	d50d      	bpl.n	8000d96 <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8000d7a:	f06f 0204 	mvn.w	r2, #4
 8000d7e:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000d80:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000d82:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000d84:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000d86:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000d8a:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000d8c:	d068      	beq.n	8000e60 <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 8000d8e:	f7ff ffd5 	bl	8000d3c <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000d92:	2300      	movs	r3, #0
 8000d94:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8000d96:	6823      	ldr	r3, [r4, #0]
 8000d98:	691a      	ldr	r2, [r3, #16]
 8000d9a:	0712      	lsls	r2, r2, #28
 8000d9c:	d50f      	bpl.n	8000dbe <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 8000d9e:	68da      	ldr	r2, [r3, #12]
 8000da0:	0710      	lsls	r0, r2, #28
 8000da2:	d50c      	bpl.n	8000dbe <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8000da4:	f06f 0208 	mvn.w	r2, #8
 8000da8:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000daa:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000dac:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000dae:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000db0:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000db2:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000db4:	d05a      	beq.n	8000e6c <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8000db6:	f7ff ffc1 	bl	8000d3c <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000dba:	2300      	movs	r3, #0
 8000dbc:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8000dbe:	6823      	ldr	r3, [r4, #0]
 8000dc0:	691a      	ldr	r2, [r3, #16]
 8000dc2:	06d2      	lsls	r2, r2, #27
 8000dc4:	d510      	bpl.n	8000de8 <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8000dc6:	68da      	ldr	r2, [r3, #12]
 8000dc8:	06d0      	lsls	r0, r2, #27
 8000dca:	d50d      	bpl.n	8000de8 <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8000dcc:	f06f 0210 	mvn.w	r2, #16
 8000dd0:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000dd2:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000dd4:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000dd6:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000dd8:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000ddc:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000dde:	d04b      	beq.n	8000e78 <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 8000de0:	f7ff ffac 	bl	8000d3c <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000de4:	2300      	movs	r3, #0
 8000de6:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8000de8:	6823      	ldr	r3, [r4, #0]
 8000dea:	691a      	ldr	r2, [r3, #16]
 8000dec:	07d1      	lsls	r1, r2, #31
 8000dee:	d508      	bpl.n	8000e02 <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 8000df0:	68da      	ldr	r2, [r3, #12]
 8000df2:	07d2      	lsls	r2, r2, #31
 8000df4:	d505      	bpl.n	8000e02 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000df6:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 8000dfa:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000dfc:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 8000dfe:	f000 fcc9 	bl	8001794 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 8000e02:	6823      	ldr	r3, [r4, #0]
 8000e04:	691a      	ldr	r2, [r3, #16]
 8000e06:	0610      	lsls	r0, r2, #24
 8000e08:	d508      	bpl.n	8000e1c <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 8000e0a:	68da      	ldr	r2, [r3, #12]
 8000e0c:	0611      	lsls	r1, r2, #24
 8000e0e:	d505      	bpl.n	8000e1c <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000e10:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 8000e14:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000e16:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 8000e18:	f000 f8bf 	bl	8000f9a <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 8000e1c:	6823      	ldr	r3, [r4, #0]
 8000e1e:	691a      	ldr	r2, [r3, #16]
 8000e20:	0652      	lsls	r2, r2, #25
 8000e22:	d508      	bpl.n	8000e36 <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 8000e24:	68da      	ldr	r2, [r3, #12]
 8000e26:	0650      	lsls	r0, r2, #25
 8000e28:	d505      	bpl.n	8000e36 <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000e2a:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 8000e2e:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000e30:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 8000e32:	f7ff ff85 	bl	8000d40 <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 8000e36:	6823      	ldr	r3, [r4, #0]
 8000e38:	691a      	ldr	r2, [r3, #16]
 8000e3a:	0691      	lsls	r1, r2, #26
 8000e3c:	d522      	bpl.n	8000e84 <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 8000e3e:	68da      	ldr	r2, [r3, #12]
 8000e40:	0692      	lsls	r2, r2, #26
 8000e42:	d51f      	bpl.n	8000e84 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000e44:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 8000e48:	4620      	mov	r0, r4
    }
  }
}
 8000e4a:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000e4e:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 8000e50:	f000 b8a2 	b.w	8000f98 <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e54:	f7ff ff71 	bl	8000d3a <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e58:	4620      	mov	r0, r4
 8000e5a:	f7ff ff70 	bl	8000d3e <HAL_TIM_PWM_PulseFinishedCallback>
 8000e5e:	e783      	b.n	8000d68 <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e60:	f7ff ff6b 	bl	8000d3a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e64:	4620      	mov	r0, r4
 8000e66:	f7ff ff6a 	bl	8000d3e <HAL_TIM_PWM_PulseFinishedCallback>
 8000e6a:	e792      	b.n	8000d92 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e6c:	f7ff ff65 	bl	8000d3a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e70:	4620      	mov	r0, r4
 8000e72:	f7ff ff64 	bl	8000d3e <HAL_TIM_PWM_PulseFinishedCallback>
 8000e76:	e7a0      	b.n	8000dba <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e78:	f7ff ff5f 	bl	8000d3a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e7c:	4620      	mov	r0, r4
 8000e7e:	f7ff ff5e 	bl	8000d3e <HAL_TIM_PWM_PulseFinishedCallback>
 8000e82:	e7af      	b.n	8000de4 <HAL_TIM_IRQHandler+0xa2>
 8000e84:	bd10      	pop	{r4, pc}
	...

08000e88 <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000e88:	4a24      	ldr	r2, [pc, #144]	; (8000f1c <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 8000e8a:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000e8c:	4290      	cmp	r0, r2
 8000e8e:	d012      	beq.n	8000eb6 <TIM_Base_SetConfig+0x2e>
 8000e90:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8000e94:	4290      	cmp	r0, r2
 8000e96:	d00e      	beq.n	8000eb6 <TIM_Base_SetConfig+0x2e>
 8000e98:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000e9c:	d00b      	beq.n	8000eb6 <TIM_Base_SetConfig+0x2e>
 8000e9e:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8000ea2:	4290      	cmp	r0, r2
 8000ea4:	d007      	beq.n	8000eb6 <TIM_Base_SetConfig+0x2e>
 8000ea6:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000eaa:	4290      	cmp	r0, r2
 8000eac:	d003      	beq.n	8000eb6 <TIM_Base_SetConfig+0x2e>
 8000eae:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000eb2:	4290      	cmp	r0, r2
 8000eb4:	d11d      	bne.n	8000ef2 <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8000eb6:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8000eb8:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8000ebc:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 8000ebe:	4a17      	ldr	r2, [pc, #92]	; (8000f1c <TIM_Base_SetConfig+0x94>)
 8000ec0:	4290      	cmp	r0, r2
 8000ec2:	d012      	beq.n	8000eea <TIM_Base_SetConfig+0x62>
 8000ec4:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8000ec8:	4290      	cmp	r0, r2
 8000eca:	d00e      	beq.n	8000eea <TIM_Base_SetConfig+0x62>
 8000ecc:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000ed0:	d00b      	beq.n	8000eea <TIM_Base_SetConfig+0x62>
 8000ed2:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8000ed6:	4290      	cmp	r0, r2
 8000ed8:	d007      	beq.n	8000eea <TIM_Base_SetConfig+0x62>
 8000eda:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000ede:	4290      	cmp	r0, r2
 8000ee0:	d003      	beq.n	8000eea <TIM_Base_SetConfig+0x62>
 8000ee2:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000ee6:	4290      	cmp	r0, r2
 8000ee8:	d103      	bne.n	8000ef2 <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000eea:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8000eec:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000ef0:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000ef2:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 8000ef4:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000ef8:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8000efa:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8000efc:	688b      	ldr	r3, [r1, #8]
 8000efe:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 8000f00:	680b      	ldr	r3, [r1, #0]
 8000f02:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8000f04:	4b05      	ldr	r3, [pc, #20]	; (8000f1c <TIM_Base_SetConfig+0x94>)
 8000f06:	4298      	cmp	r0, r3
 8000f08:	d003      	beq.n	8000f12 <TIM_Base_SetConfig+0x8a>
 8000f0a:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 8000f0e:	4298      	cmp	r0, r3
 8000f10:	d101      	bne.n	8000f16 <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 8000f12:	690b      	ldr	r3, [r1, #16]
 8000f14:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 8000f16:	2301      	movs	r3, #1
 8000f18:	6143      	str	r3, [r0, #20]
 8000f1a:	4770      	bx	lr
 8000f1c:	40012c00 	.word	0x40012c00

08000f20 <HAL_TIM_Base_Init>:
{
 8000f20:	b510      	push	{r4, lr}
  if(htim == NULL)
 8000f22:	4604      	mov	r4, r0
 8000f24:	b1a0      	cbz	r0, 8000f50 <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 8000f26:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8000f2a:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8000f2e:	b91b      	cbnz	r3, 8000f38 <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 8000f30:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8000f34:	f001 f870 	bl	8002018 <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 8000f38:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8000f3a:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8000f3c:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8000f40:	1d21      	adds	r1, r4, #4
 8000f42:	f7ff ffa1 	bl	8000e88 <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 8000f46:	2301      	movs	r3, #1
  return HAL_OK;
 8000f48:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 8000f4a:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 8000f4e:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8000f50:	2001      	movs	r0, #1
}
 8000f52:	bd10      	pop	{r4, pc}

08000f54 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 8000f54:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 8000f58:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 8000f5a:	2b01      	cmp	r3, #1
 8000f5c:	f04f 0302 	mov.w	r3, #2
 8000f60:	d018      	beq.n	8000f94 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 8000f62:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000f66:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8000f68:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000f6a:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8000f6c:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000f6e:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 8000f72:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8000f74:	685a      	ldr	r2, [r3, #4]
 8000f76:	4322      	orrs	r2, r4
 8000f78:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 8000f7a:	689a      	ldr	r2, [r3, #8]
 8000f7c:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8000f80:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8000f82:	689a      	ldr	r2, [r3, #8]
 8000f84:	430a      	orrs	r2, r1
 8000f86:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 8000f88:	2301      	movs	r3, #1
 8000f8a:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 8000f8e:	2300      	movs	r3, #0
 8000f90:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8000f94:	4618      	mov	r0, r3

  return HAL_OK;
}
 8000f96:	bd10      	pop	{r4, pc}

08000f98 <HAL_TIMEx_CommutationCallback>:
 8000f98:	4770      	bx	lr

08000f9a <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 8000f9a:	4770      	bx	lr

08000f9c <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8000f9c:	6803      	ldr	r3, [r0, #0]
 8000f9e:	68da      	ldr	r2, [r3, #12]
 8000fa0:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8000fa4:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8000fa6:	695a      	ldr	r2, [r3, #20]
 8000fa8:	f022 0201 	bic.w	r2, r2, #1
 8000fac:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8000fae:	2320      	movs	r3, #32
 8000fb0:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8000fb4:	4770      	bx	lr
	...

08000fb8 <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 8000fb8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8000fbc:	6805      	ldr	r5, [r0, #0]
 8000fbe:	68c2      	ldr	r2, [r0, #12]
 8000fc0:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000fc2:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8000fc4:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8000fc8:	4313      	orrs	r3, r2
 8000fca:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000fcc:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 8000fce:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000fd0:	430b      	orrs	r3, r1
 8000fd2:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8000fd4:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 8000fd8:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000fdc:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 8000fde:	4313      	orrs	r3, r2
 8000fe0:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 8000fe2:	696b      	ldr	r3, [r5, #20]
 8000fe4:	6982      	ldr	r2, [r0, #24]
 8000fe6:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8000fea:	4313      	orrs	r3, r2
 8000fec:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 8000fee:	4b40      	ldr	r3, [pc, #256]	; (80010f0 <UART_SetConfig+0x138>)
{
 8000ff0:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 8000ff2:	429d      	cmp	r5, r3
 8000ff4:	f04f 0419 	mov.w	r4, #25
 8000ff8:	d146      	bne.n	8001088 <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 8000ffa:	f7ff fe83 	bl	8000d04 <HAL_RCC_GetPCLK2Freq>
 8000ffe:	fb04 f300 	mul.w	r3, r4, r0
 8001002:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8001006:	f04f 0864 	mov.w	r8, #100	; 0x64
 800100a:	00b6      	lsls	r6, r6, #2
 800100c:	fbb3 f3f6 	udiv	r3, r3, r6
 8001010:	fbb3 f3f8 	udiv	r3, r3, r8
 8001014:	011e      	lsls	r6, r3, #4
 8001016:	f7ff fe75 	bl	8000d04 <HAL_RCC_GetPCLK2Freq>
 800101a:	4360      	muls	r0, r4
 800101c:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001020:	009b      	lsls	r3, r3, #2
 8001022:	fbb0 f7f3 	udiv	r7, r0, r3
 8001026:	f7ff fe6d 	bl	8000d04 <HAL_RCC_GetPCLK2Freq>
 800102a:	4360      	muls	r0, r4
 800102c:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001030:	009b      	lsls	r3, r3, #2
 8001032:	fbb0 f3f3 	udiv	r3, r0, r3
 8001036:	fbb3 f3f8 	udiv	r3, r3, r8
 800103a:	fb08 7313 	mls	r3, r8, r3, r7
 800103e:	011b      	lsls	r3, r3, #4
 8001040:	3332      	adds	r3, #50	; 0x32
 8001042:	fbb3 f3f8 	udiv	r3, r3, r8
 8001046:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 800104a:	f7ff fe5b 	bl	8000d04 <HAL_RCC_GetPCLK2Freq>
 800104e:	4360      	muls	r0, r4
 8001050:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8001054:	0092      	lsls	r2, r2, #2
 8001056:	fbb0 faf2 	udiv	sl, r0, r2
 800105a:	f7ff fe53 	bl	8000d04 <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 800105e:	4360      	muls	r0, r4
 8001060:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001064:	009b      	lsls	r3, r3, #2
 8001066:	fbb0 f3f3 	udiv	r3, r0, r3
 800106a:	fbb3 f3f8 	udiv	r3, r3, r8
 800106e:	fb08 a313 	mls	r3, r8, r3, sl
 8001072:	011b      	lsls	r3, r3, #4
 8001074:	3332      	adds	r3, #50	; 0x32
 8001076:	fbb3 f3f8 	udiv	r3, r3, r8
 800107a:	f003 030f 	and.w	r3, r3, #15
 800107e:	433b      	orrs	r3, r7
 8001080:	4433      	add	r3, r6
 8001082:	60ab      	str	r3, [r5, #8]
 8001084:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8001088:	f7ff fe2c 	bl	8000ce4 <HAL_RCC_GetPCLK1Freq>
 800108c:	fb04 f300 	mul.w	r3, r4, r0
 8001090:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8001094:	f04f 0864 	mov.w	r8, #100	; 0x64
 8001098:	00b6      	lsls	r6, r6, #2
 800109a:	fbb3 f3f6 	udiv	r3, r3, r6
 800109e:	fbb3 f3f8 	udiv	r3, r3, r8
 80010a2:	011e      	lsls	r6, r3, #4
 80010a4:	f7ff fe1e 	bl	8000ce4 <HAL_RCC_GetPCLK1Freq>
 80010a8:	4360      	muls	r0, r4
 80010aa:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80010ae:	009b      	lsls	r3, r3, #2
 80010b0:	fbb0 f7f3 	udiv	r7, r0, r3
 80010b4:	f7ff fe16 	bl	8000ce4 <HAL_RCC_GetPCLK1Freq>
 80010b8:	4360      	muls	r0, r4
 80010ba:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80010be:	009b      	lsls	r3, r3, #2
 80010c0:	fbb0 f3f3 	udiv	r3, r0, r3
 80010c4:	fbb3 f3f8 	udiv	r3, r3, r8
 80010c8:	fb08 7313 	mls	r3, r8, r3, r7
 80010cc:	011b      	lsls	r3, r3, #4
 80010ce:	3332      	adds	r3, #50	; 0x32
 80010d0:	fbb3 f3f8 	udiv	r3, r3, r8
 80010d4:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 80010d8:	f7ff fe04 	bl	8000ce4 <HAL_RCC_GetPCLK1Freq>
 80010dc:	4360      	muls	r0, r4
 80010de:	f8d9 2004 	ldr.w	r2, [r9, #4]
 80010e2:	0092      	lsls	r2, r2, #2
 80010e4:	fbb0 faf2 	udiv	sl, r0, r2
 80010e8:	f7ff fdfc 	bl	8000ce4 <HAL_RCC_GetPCLK1Freq>
 80010ec:	e7b7      	b.n	800105e <UART_SetConfig+0xa6>
 80010ee:	bf00      	nop
 80010f0:	40013800 	.word	0x40013800

080010f4 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 80010f4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80010f6:	4604      	mov	r4, r0
 80010f8:	460e      	mov	r6, r1
 80010fa:	4617      	mov	r7, r2
 80010fc:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 80010fe:	6821      	ldr	r1, [r4, #0]
 8001100:	680b      	ldr	r3, [r1, #0]
 8001102:	ea36 0303 	bics.w	r3, r6, r3
 8001106:	d101      	bne.n	800110c <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 8001108:	2000      	movs	r0, #0
}
 800110a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 800110c:	1c6b      	adds	r3, r5, #1
 800110e:	d0f7      	beq.n	8001100 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8001110:	b995      	cbnz	r5, 8001138 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8001112:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 8001114:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8001116:	68da      	ldr	r2, [r3, #12]
 8001118:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 800111c:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800111e:	695a      	ldr	r2, [r3, #20]
 8001120:	f022 0201 	bic.w	r2, r2, #1
 8001124:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 8001126:	2320      	movs	r3, #32
 8001128:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 800112c:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8001130:	2300      	movs	r3, #0
 8001132:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 8001136:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8001138:	f7ff f8c2 	bl	80002c0 <HAL_GetTick>
 800113c:	1bc0      	subs	r0, r0, r7
 800113e:	4285      	cmp	r5, r0
 8001140:	d2dd      	bcs.n	80010fe <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 8001142:	e7e6      	b.n	8001112 <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08001144 <HAL_UART_Init>:
{
 8001144:	b510      	push	{r4, lr}
  if(huart == NULL)
 8001146:	4604      	mov	r4, r0
 8001148:	b340      	cbz	r0, 800119c <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 800114a:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 800114e:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8001152:	b91b      	cbnz	r3, 800115c <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8001154:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8001158:	f000 ff72 	bl	8002040 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 800115c:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 800115e:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8001160:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8001164:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 8001166:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8001168:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 800116c:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 800116e:	f7ff ff23 	bl	8000fb8 <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8001172:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001174:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8001176:	691a      	ldr	r2, [r3, #16]
 8001178:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 800117c:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800117e:	695a      	ldr	r2, [r3, #20]
 8001180:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8001184:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8001186:	68da      	ldr	r2, [r3, #12]
 8001188:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 800118c:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 800118e:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001190:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 8001192:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 8001196:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 800119a:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 800119c:	2001      	movs	r0, #1
}
 800119e:	bd10      	pop	{r4, pc}

080011a0 <HAL_UART_Transmit>:
{
 80011a0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 80011a4:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 80011a6:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 80011aa:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 80011ac:	2b20      	cmp	r3, #32
{
 80011ae:	460d      	mov	r5, r1
 80011b0:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 80011b2:	d14e      	bne.n	8001252 <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 80011b4:	2900      	cmp	r1, #0
 80011b6:	d049      	beq.n	800124c <HAL_UART_Transmit+0xac>
 80011b8:	2a00      	cmp	r2, #0
 80011ba:	d047      	beq.n	800124c <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 80011bc:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 80011c0:	2b01      	cmp	r3, #1
 80011c2:	d046      	beq.n	8001252 <HAL_UART_Transmit+0xb2>
 80011c4:	2301      	movs	r3, #1
 80011c6:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80011ca:	2300      	movs	r3, #0
 80011cc:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 80011ce:	2321      	movs	r3, #33	; 0x21
 80011d0:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 80011d4:	f7ff f874 	bl	80002c0 <HAL_GetTick>
 80011d8:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 80011da:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 80011de:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 80011e2:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 80011e4:	b29b      	uxth	r3, r3
 80011e6:	b96b      	cbnz	r3, 8001204 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 80011e8:	463b      	mov	r3, r7
 80011ea:	4632      	mov	r2, r6
 80011ec:	2140      	movs	r1, #64	; 0x40
 80011ee:	4620      	mov	r0, r4
 80011f0:	f7ff ff80 	bl	80010f4 <UART_WaitOnFlagUntilTimeout.constprop.3>
 80011f4:	b9a8      	cbnz	r0, 8001222 <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 80011f6:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 80011f8:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 80011fc:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 8001200:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 8001204:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001206:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8001208:	3b01      	subs	r3, #1
 800120a:	b29b      	uxth	r3, r3
 800120c:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800120e:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001210:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001212:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001216:	4620      	mov	r0, r4
 8001218:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800121a:	d10e      	bne.n	800123a <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800121c:	f7ff ff6a 	bl	80010f4 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001220:	b110      	cbz	r0, 8001228 <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 8001222:	2003      	movs	r0, #3
 8001224:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8001228:	882b      	ldrh	r3, [r5, #0]
 800122a:	6822      	ldr	r2, [r4, #0]
 800122c:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8001230:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 8001232:	6923      	ldr	r3, [r4, #16]
 8001234:	b943      	cbnz	r3, 8001248 <HAL_UART_Transmit+0xa8>
          pData +=2U;
 8001236:	3502      	adds	r5, #2
 8001238:	e7d3      	b.n	80011e2 <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800123a:	f7ff ff5b 	bl	80010f4 <UART_WaitOnFlagUntilTimeout.constprop.3>
 800123e:	2800      	cmp	r0, #0
 8001240:	d1ef      	bne.n	8001222 <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 8001242:	6823      	ldr	r3, [r4, #0]
 8001244:	782a      	ldrb	r2, [r5, #0]
 8001246:	605a      	str	r2, [r3, #4]
 8001248:	3501      	adds	r5, #1
 800124a:	e7ca      	b.n	80011e2 <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 800124c:	2001      	movs	r0, #1
 800124e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 8001252:	2002      	movs	r0, #2
}
 8001254:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

08001258 <HAL_UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_READY)
 8001258:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
 800125c:	2b20      	cmp	r3, #32
 800125e:	d120      	bne.n	80012a2 <HAL_UART_Receive_IT+0x4a>
    if((pData == NULL) || (Size == 0U))
 8001260:	b1e9      	cbz	r1, 800129e <HAL_UART_Receive_IT+0x46>
 8001262:	b1e2      	cbz	r2, 800129e <HAL_UART_Receive_IT+0x46>
    __HAL_LOCK(huart);
 8001264:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8001268:	2b01      	cmp	r3, #1
 800126a:	d01a      	beq.n	80012a2 <HAL_UART_Receive_IT+0x4a>
    huart->RxXferCount = Size;
 800126c:	85c2      	strh	r2, [r0, #46]	; 0x2e
    huart->RxXferSize = Size;
 800126e:	8582      	strh	r2, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001270:	2300      	movs	r3, #0
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8001272:	2222      	movs	r2, #34	; 0x22
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001274:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8001276:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 800127a:	6802      	ldr	r2, [r0, #0]
    huart->pRxBuffPtr = pData;
 800127c:	6281      	str	r1, [r0, #40]	; 0x28
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 800127e:	68d1      	ldr	r1, [r2, #12]
    __HAL_UNLOCK(huart);
 8001280:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 8001284:	f441 7180 	orr.w	r1, r1, #256	; 0x100
 8001288:	60d1      	str	r1, [r2, #12]
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 800128a:	6951      	ldr	r1, [r2, #20]
    return HAL_OK;
 800128c:	4618      	mov	r0, r3
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 800128e:	f041 0101 	orr.w	r1, r1, #1
 8001292:	6151      	str	r1, [r2, #20]
    __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
 8001294:	68d1      	ldr	r1, [r2, #12]
 8001296:	f041 0120 	orr.w	r1, r1, #32
 800129a:	60d1      	str	r1, [r2, #12]
    return HAL_OK;
 800129c:	4770      	bx	lr
      return HAL_ERROR;
 800129e:	2001      	movs	r0, #1
 80012a0:	4770      	bx	lr
    return HAL_BUSY;
 80012a2:	2002      	movs	r0, #2
}
 80012a4:	4770      	bx	lr

080012a6 <HAL_UART_TxCpltCallback>:
 80012a6:	4770      	bx	lr

080012a8 <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80012a8:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 80012ac:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80012ae:	2b22      	cmp	r3, #34	; 0x22
 80012b0:	d136      	bne.n	8001320 <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80012b2:	6883      	ldr	r3, [r0, #8]
 80012b4:	6901      	ldr	r1, [r0, #16]
 80012b6:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 80012ba:	6802      	ldr	r2, [r0, #0]
 80012bc:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80012be:	d123      	bne.n	8001308 <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80012c0:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 80012c2:	b9e9      	cbnz	r1, 8001300 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80012c4:	f3c2 0208 	ubfx	r2, r2, #0, #9
 80012c8:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 80012cc:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 80012ce:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 80012d0:	3c01      	subs	r4, #1
 80012d2:	b2a4      	uxth	r4, r4
 80012d4:	85c4      	strh	r4, [r0, #46]	; 0x2e
 80012d6:	b98c      	cbnz	r4, 80012fc <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 80012d8:	6803      	ldr	r3, [r0, #0]
 80012da:	68da      	ldr	r2, [r3, #12]
 80012dc:	f022 0220 	bic.w	r2, r2, #32
 80012e0:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 80012e2:	68da      	ldr	r2, [r3, #12]
 80012e4:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 80012e8:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 80012ea:	695a      	ldr	r2, [r3, #20]
 80012ec:	f022 0201 	bic.w	r2, r2, #1
 80012f0:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 80012f2:	2320      	movs	r3, #32
 80012f4:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 80012f8:	f000 f9d4 	bl	80016a4 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 80012fc:	2000      	movs	r0, #0
}
 80012fe:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8001300:	b2d2      	uxtb	r2, r2
 8001302:	f823 2b01 	strh.w	r2, [r3], #1
 8001306:	e7e1      	b.n	80012cc <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001308:	b921      	cbnz	r1, 8001314 <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 800130a:	1c59      	adds	r1, r3, #1
 800130c:	6852      	ldr	r2, [r2, #4]
 800130e:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8001310:	701a      	strb	r2, [r3, #0]
 8001312:	e7dc      	b.n	80012ce <UART_Receive_IT+0x26>
 8001314:	6852      	ldr	r2, [r2, #4]
 8001316:	1c59      	adds	r1, r3, #1
 8001318:	6281      	str	r1, [r0, #40]	; 0x28
 800131a:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 800131e:	e7f7      	b.n	8001310 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8001320:	2002      	movs	r0, #2
 8001322:	bd10      	pop	{r4, pc}

08001324 <HAL_UART_ErrorCallback>:
 8001324:	4770      	bx	lr
	...

08001328 <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8001328:	6803      	ldr	r3, [r0, #0]
{
 800132a:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 800132c:	681a      	ldr	r2, [r3, #0]
{
 800132e:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8001330:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8001332:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8001334:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 8001336:	d107      	bne.n	8001348 <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001338:	0696      	lsls	r6, r2, #26
 800133a:	d55a      	bpl.n	80013f2 <HAL_UART_IRQHandler+0xca>
 800133c:	068d      	lsls	r5, r1, #26
 800133e:	d558      	bpl.n	80013f2 <HAL_UART_IRQHandler+0xca>
}
 8001340:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8001344:	f7ff bfb0 	b.w	80012a8 <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 8001348:	f015 0501 	ands.w	r5, r5, #1
 800134c:	d102      	bne.n	8001354 <HAL_UART_IRQHandler+0x2c>
 800134e:	f411 7f90 	tst.w	r1, #288	; 0x120
 8001352:	d04e      	beq.n	80013f2 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 8001354:	07d3      	lsls	r3, r2, #31
 8001356:	d505      	bpl.n	8001364 <HAL_UART_IRQHandler+0x3c>
 8001358:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800135a:	bf42      	ittt	mi
 800135c:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 800135e:	f043 0301 	orrmi.w	r3, r3, #1
 8001362:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001364:	0750      	lsls	r0, r2, #29
 8001366:	d504      	bpl.n	8001372 <HAL_UART_IRQHandler+0x4a>
 8001368:	b11d      	cbz	r5, 8001372 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800136a:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 800136c:	f043 0302 	orr.w	r3, r3, #2
 8001370:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001372:	0793      	lsls	r3, r2, #30
 8001374:	d504      	bpl.n	8001380 <HAL_UART_IRQHandler+0x58>
 8001376:	b11d      	cbz	r5, 8001380 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 8001378:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 800137a:	f043 0304 	orr.w	r3, r3, #4
 800137e:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001380:	0716      	lsls	r6, r2, #28
 8001382:	d504      	bpl.n	800138e <HAL_UART_IRQHandler+0x66>
 8001384:	b11d      	cbz	r5, 800138e <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 8001386:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001388:	f043 0308 	orr.w	r3, r3, #8
 800138c:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 800138e:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001390:	2b00      	cmp	r3, #0
 8001392:	d066      	beq.n	8001462 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001394:	0695      	lsls	r5, r2, #26
 8001396:	d504      	bpl.n	80013a2 <HAL_UART_IRQHandler+0x7a>
 8001398:	0688      	lsls	r0, r1, #26
 800139a:	d502      	bpl.n	80013a2 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 800139c:	4620      	mov	r0, r4
 800139e:	f7ff ff83 	bl	80012a8 <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80013a2:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 80013a4:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80013a6:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 80013a8:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 80013aa:	0711      	lsls	r1, r2, #28
 80013ac:	d402      	bmi.n	80013b4 <HAL_UART_IRQHandler+0x8c>
 80013ae:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 80013b2:	d01a      	beq.n	80013ea <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 80013b4:	f7ff fdf2 	bl	8000f9c <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 80013b8:	6823      	ldr	r3, [r4, #0]
 80013ba:	695a      	ldr	r2, [r3, #20]
 80013bc:	0652      	lsls	r2, r2, #25
 80013be:	d510      	bpl.n	80013e2 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80013c0:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80013c2:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80013c4:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 80013c8:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80013ca:	b150      	cbz	r0, 80013e2 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 80013cc:	4b25      	ldr	r3, [pc, #148]	; (8001464 <HAL_UART_IRQHandler+0x13c>)
 80013ce:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 80013d0:	f7fe fff6 	bl	80003c0 <HAL_DMA_Abort_IT>
 80013d4:	2800      	cmp	r0, #0
 80013d6:	d044      	beq.n	8001462 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 80013d8:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 80013da:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 80013de:	6b43      	ldr	r3, [r0, #52]	; 0x34
 80013e0:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 80013e2:	4620      	mov	r0, r4
 80013e4:	f7ff ff9e 	bl	8001324 <HAL_UART_ErrorCallback>
 80013e8:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 80013ea:	f7ff ff9b 	bl	8001324 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 80013ee:	63e5      	str	r5, [r4, #60]	; 0x3c
 80013f0:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 80013f2:	0616      	lsls	r6, r2, #24
 80013f4:	d527      	bpl.n	8001446 <HAL_UART_IRQHandler+0x11e>
 80013f6:	060d      	lsls	r5, r1, #24
 80013f8:	d525      	bpl.n	8001446 <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 80013fa:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 80013fe:	2a21      	cmp	r2, #33	; 0x21
 8001400:	d12f      	bne.n	8001462 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001402:	68a2      	ldr	r2, [r4, #8]
 8001404:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8001408:	6a22      	ldr	r2, [r4, #32]
 800140a:	d117      	bne.n	800143c <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 800140c:	8811      	ldrh	r1, [r2, #0]
 800140e:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8001412:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001414:	6921      	ldr	r1, [r4, #16]
 8001416:	b979      	cbnz	r1, 8001438 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8001418:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 800141a:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 800141c:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 800141e:	3a01      	subs	r2, #1
 8001420:	b292      	uxth	r2, r2
 8001422:	84e2      	strh	r2, [r4, #38]	; 0x26
 8001424:	b9ea      	cbnz	r2, 8001462 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 8001426:	68da      	ldr	r2, [r3, #12]
 8001428:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 800142c:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 800142e:	68da      	ldr	r2, [r3, #12]
 8001430:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8001434:	60da      	str	r2, [r3, #12]
 8001436:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 8001438:	3201      	adds	r2, #1
 800143a:	e7ee      	b.n	800141a <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 800143c:	1c51      	adds	r1, r2, #1
 800143e:	6221      	str	r1, [r4, #32]
 8001440:	7812      	ldrb	r2, [r2, #0]
 8001442:	605a      	str	r2, [r3, #4]
 8001444:	e7ea      	b.n	800141c <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 8001446:	0650      	lsls	r0, r2, #25
 8001448:	d50b      	bpl.n	8001462 <HAL_UART_IRQHandler+0x13a>
 800144a:	064a      	lsls	r2, r1, #25
 800144c:	d509      	bpl.n	8001462 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 800144e:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8001450:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8001452:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8001456:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8001458:	2320      	movs	r3, #32
 800145a:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 800145e:	f7ff ff22 	bl	80012a6 <HAL_UART_TxCpltCallback>
 8001462:	bd70      	pop	{r4, r5, r6, pc}
 8001464:	08001469 	.word	0x08001469

08001468 <UART_DMAAbortOnError>:
{
 8001468:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 800146a:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 800146c:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 800146e:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 8001470:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 8001472:	f7ff ff57 	bl	8001324 <HAL_UART_ErrorCallback>
 8001476:	bd08      	pop	{r3, pc}

08001478 <RGB_Response_Func>:

void RGB_Response_Func(uint8_t* data);


void RGB_Response_Func(uint8_t* data){
 8001478:	b510      	push	{r4, lr}
#if 0
for(uint8_t i = 0; i < 10; i++){
            printf("%02x ",data[i]);
        }
#endif
    switch(type){
 800147a:	7843      	ldrb	r3, [r0, #1]
void RGB_Response_Func(uint8_t* data){
 800147c:	4604      	mov	r4, r0
    switch(type){
 800147e:	3b01      	subs	r3, #1
 8001480:	2b05      	cmp	r3, #5
 8001482:	d81b      	bhi.n	80014bc <RGB_Response_Func+0x44>
 8001484:	e8df f003 	tbb	[pc, r3]
 8001488:	1a090309 	.word	0x1a090309
 800148c:	100e      	.short	0x100e
        case RGB_Status_Data_Request: 
            Uart1_Data_Send(data,RGB_SensorDataRequest_Length);
            break;
        case RGB_ControllerID_SET: 
            Uart3_Data_Send(data,RGB_ControllerID_SET_Length);
 800148e:	210a      	movs	r1, #10
            break;
        case RGB_SensorID_SET:  
            Uart1_Data_Send(data,RGB_SensorIDAutoSetRequest_Length);
            break;        
        case RGB_Status_Data_Response:
            Uart3_Data_Send(data,RGB_SensorDataResponse_Length);
 8001490:	4620      	mov	r0, r4
            Flash_write(&data[0]);
            break;
            
    }

}
 8001492:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
            Uart3_Data_Send(data,RGB_SensorDataResponse_Length);
 8001496:	f000 b991 	b.w	80017bc <Uart3_Data_Send>
            Uart1_Data_Send(data,RGB_SensorIDAutoSetRequest_Length);
 800149a:	2107      	movs	r1, #7
}
 800149c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
            Uart1_Data_Send(data,RGB_SensorIDAutoSetRequest_Length);
 80014a0:	f000 b994 	b.w	80017cc <Uart1_Data_Send>
            Uart3_Data_Send(data,RGB_SensorDataResponse_Length);
 80014a4:	210f      	movs	r1, #15
 80014a6:	e7f3      	b.n	8001490 <RGB_Response_Func+0x18>
            Uart3_Data_Send(data,data[blucell_length] + 3);
 80014a8:	7881      	ldrb	r1, [r0, #2]
 80014aa:	3103      	adds	r1, #3
 80014ac:	b2c9      	uxtb	r1, r1
 80014ae:	f000 f985 	bl	80017bc <Uart3_Data_Send>
            Flash_write(&data[0]);
 80014b2:	4620      	mov	r0, r4
}
 80014b4:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
            Flash_write(&data[0]);
 80014b8:	f000 bb3c 	b.w	8001b34 <Flash_write>
 80014bc:	bd10      	pop	{r4, pc}
	...

080014c0 <RGB_Alarm_Check>:


uint16_t Sensor_red[9] = {0,};
uint16_t Sensor_green[9] = {0,};
uint16_t Sensor_blue[9] = {0,};    
void RGB_Alarm_Check(uint8_t* data){
 80014c0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
   
    Sensor_red[data[blucell_srcid]] = ((data[blucell_red_H + 2] << 8)| data[blucell_red_L + 2]);
 80014c4:	7981      	ldrb	r1, [r0, #6]
 80014c6:	79c3      	ldrb	r3, [r0, #7]
 80014c8:	78c2      	ldrb	r2, [r0, #3]
 80014ca:	4d25      	ldr	r5, [pc, #148]	; (8001560 <RGB_Alarm_Check+0xa0>)
 80014cc:	ea43 2301 	orr.w	r3, r3, r1, lsl #8
 80014d0:	f825 3012 	strh.w	r3, [r5, r2, lsl #1]
    Sensor_green[data[blucell_srcid]] = ((data[blucell_green_H + 2] << 8)| data[blucell_green_L + 2]);
 80014d4:	7a01      	ldrb	r1, [r0, #8]
 80014d6:	7a43      	ldrb	r3, [r0, #9]
 80014d8:	78c2      	ldrb	r2, [r0, #3]
 80014da:	4c22      	ldr	r4, [pc, #136]	; (8001564 <RGB_Alarm_Check+0xa4>)
 80014dc:	ea43 2301 	orr.w	r3, r3, r1, lsl #8
 80014e0:	f824 3012 	strh.w	r3, [r4, r2, lsl #1]
    Sensor_blue[data[blucell_srcid]] = ((data[blucell_blue_H + 2] << 8)| data[blucell_blue_L + 2]);  
 80014e4:	7a86      	ldrb	r6, [r0, #10]
 80014e6:	7ac3      	ldrb	r3, [r0, #11]
 80014e8:	78c2      	ldrb	r2, [r0, #3]
 80014ea:	491f      	ldr	r1, [pc, #124]	; (8001568 <RGB_Alarm_Check+0xa8>)
 80014ec:	ea43 2306 	orr.w	r3, r3, r6, lsl #8
 80014f0:	f821 3012 	strh.w	r3, [r1, r2, lsl #1]

#endif     

#if 1 // PYJ.2019.03.18_BEGIN -- 
    uint8_t LED_Alarm = 0;
    for(uint8_t i = 0; i < (SensorID_Cnt); i++){
 80014f4:	2200      	movs	r2, #0
 80014f6:	4b1d      	ldr	r3, [pc, #116]	; (800156c <RGB_Alarm_Check+0xac>)
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 80014f8:	4e1d      	ldr	r6, [pc, #116]	; (8001570 <RGB_Alarm_Check+0xb0>)
    for(uint8_t i = 0; i < (SensorID_Cnt); i++){
 80014fa:	7818      	ldrb	r0, [r3, #0]
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 80014fc:	4f1d      	ldr	r7, [pc, #116]	; (8001574 <RGB_Alarm_Check+0xb4>)
            || RGB_SensorGreenLimit_Buf[SensorID_buf[i]]  >= Sensor_green[SensorID_buf[i]]
 80014fe:	f8df e080 	ldr.w	lr, [pc, #128]	; 8001580 <RGB_Alarm_Check+0xc0>
            || RGB_SensorBlueLimit_Buf[SensorID_buf[i]]  >= Sensor_blue[SensorID_buf[i]]) {
 8001502:	f8df c080 	ldr.w	ip, [pc, #128]	; 8001584 <RGB_Alarm_Check+0xc4>
    for(uint8_t i = 0; i < (SensorID_Cnt); i++){
 8001506:	b2d3      	uxtb	r3, r2
 8001508:	4283      	cmp	r3, r0
 800150a:	d307      	bcc.n	800151c <RGB_Alarm_Check+0x5c>
    if(LED_Alarm == 1){
        HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET);
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET);       
//        printf("LED : 1\r\n");
    }else{
        HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET);
 800150c:	2200      	movs	r2, #0
 800150e:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8001512:	4819      	ldr	r0, [pc, #100]	; (8001578 <RGB_Alarm_Check+0xb8>)
 8001514:	f7ff f962 	bl	80007dc <HAL_GPIO_WritePin>
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_SET);   
 8001518:	2201      	movs	r2, #1
 800151a:	e01a      	b.n	8001552 <RGB_Alarm_Check+0x92>
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 800151c:	5d93      	ldrb	r3, [r2, r6]
 800151e:	f837 9013 	ldrh.w	r9, [r7, r3, lsl #1]
 8001522:	f835 8013 	ldrh.w	r8, [r5, r3, lsl #1]
 8001526:	45c1      	cmp	r9, r8
 8001528:	d20c      	bcs.n	8001544 <RGB_Alarm_Check+0x84>
            || RGB_SensorGreenLimit_Buf[SensorID_buf[i]]  >= Sensor_green[SensorID_buf[i]]
 800152a:	f83e 9013 	ldrh.w	r9, [lr, r3, lsl #1]
 800152e:	f834 8013 	ldrh.w	r8, [r4, r3, lsl #1]
 8001532:	45c1      	cmp	r9, r8
 8001534:	d206      	bcs.n	8001544 <RGB_Alarm_Check+0x84>
            || RGB_SensorBlueLimit_Buf[SensorID_buf[i]]  >= Sensor_blue[SensorID_buf[i]]) {
 8001536:	f83c 8013 	ldrh.w	r8, [ip, r3, lsl #1]
 800153a:	f831 3013 	ldrh.w	r3, [r1, r3, lsl #1]
 800153e:	3201      	adds	r2, #1
 8001540:	4598      	cmp	r8, r3
 8001542:	d3e0      	bcc.n	8001506 <RGB_Alarm_Check+0x46>
        HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET);
 8001544:	2201      	movs	r2, #1
 8001546:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 800154a:	480b      	ldr	r0, [pc, #44]	; (8001578 <RGB_Alarm_Check+0xb8>)
 800154c:	f7ff f946 	bl	80007dc <HAL_GPIO_WritePin>
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET);       
 8001550:	2200      	movs	r2, #0
        printf("Sensor_blue  %04x\r\n",Sensor_blue);        
#endif // PYJ.2019.03.18_END -- 
    }
#endif // PYJ.2019.03.18_END -- 

}
 8001552:	e8bd 43f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_SET);   
 8001556:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 800155a:	4808      	ldr	r0, [pc, #32]	; (800157c <RGB_Alarm_Check+0xbc>)
 800155c:	f7ff b93e 	b.w	80007dc <HAL_GPIO_WritePin>
 8001560:	200000f8 	.word	0x200000f8
 8001564:	200000e6 	.word	0x200000e6
 8001568:	200000d4 	.word	0x200000d4
 800156c:	200000ca 	.word	0x200000ca
 8001570:	200000cb 	.word	0x200000cb
 8001574:	200000b8 	.word	0x200000b8
 8001578:	40010c00 	.word	0x40010c00
 800157c:	40010800 	.word	0x40010800
 8001580:	200000a6 	.word	0x200000a6
 8001584:	20000094 	.word	0x20000094

08001588 <RGB_Controller_Func>:
void RGB_Controller_Func(uint8_t* data){
 8001588:	b530      	push	{r4, r5, lr}
	RGB_CMD_T type = data[blucell_type];
 800158a:	7845      	ldrb	r5, [r0, #1]
void RGB_Controller_Func(uint8_t* data){
 800158c:	b09b      	sub	sp, #108	; 0x6c
 800158e:	4604      	mov	r4, r0
    uint8_t Result_buf[100] = {0,};
 8001590:	2264      	movs	r2, #100	; 0x64
 8001592:	2100      	movs	r1, #0
 8001594:	a801      	add	r0, sp, #4
 8001596:	f000 fe80 	bl	800229a <memset>
    switch(type){
 800159a:	1e6b      	subs	r3, r5, #1
 800159c:	2b05      	cmp	r3, #5
 800159e:	d811      	bhi.n	80015c4 <RGB_Controller_Func+0x3c>
 80015a0:	e8df f003 	tbb	[pc, r3]
 80015a4:	33211503 	.word	0x33211503
 80015a8:	4c3a      	.short	0x4c3a
        case RGB_Status_Data_Request:           
//             printf("=====RGB_Status_Data_Request=====\r\n");
            data[5]   = STH30_CreateCrc(&data[blucell_type],data[blucell_length]);
 80015aa:	78a1      	ldrb	r1, [r4, #2]
 80015ac:	1c60      	adds	r0, r4, #1
 80015ae:	f000 fcd9 	bl	8001f64 <STH30_CreateCrc>
 80015b2:	7160      	strb	r0, [r4, #5]
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],RGB_SensorDataRequest_Length);
 80015b4:	88a2      	ldrh	r2, [r4, #4]
 80015b6:	6820      	ldr	r0, [r4, #0]
 80015b8:	79a3      	ldrb	r3, [r4, #6]
 80015ba:	9001      	str	r0, [sp, #4]
 80015bc:	f8ad 2008 	strh.w	r2, [sp, #8]
 80015c0:	f88d 300a 	strb.w	r3, [sp, #10]
            break;
        default:
        break;
    }
  
    RGB_Response_Func(&Result_buf[blucell_stx]);
 80015c4:	a801      	add	r0, sp, #4
 80015c6:	f7ff ff57 	bl	8001478 <RGB_Response_Func>
    return;
}
 80015ca:	b01b      	add	sp, #108	; 0x6c
 80015cc:	bd30      	pop	{r4, r5, pc}
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 80015ce:	78a2      	ldrb	r2, [r4, #2]
 80015d0:	4621      	mov	r1, r4
 80015d2:	3203      	adds	r2, #3
 80015d4:	a801      	add	r0, sp, #4
 80015d6:	f000 fe55 	bl	8002284 <memcpy>
            MyControllerID = Result_buf[7] = data[7];//�긽��諛⑹쓽 DST ID �뒗 �굹�쓽 ID �씠�떎.
 80015da:	79e3      	ldrb	r3, [r4, #7]
 80015dc:	4a2b      	ldr	r2, [pc, #172]	; (800168c <RGB_Controller_Func+0x104>)
 80015de:	f88d 300b 	strb.w	r3, [sp, #11]
            SensorID_Cnt++;
 80015e2:	7013      	strb	r3, [r2, #0]
            break;
 80015e4:	e7ee      	b.n	80015c4 <RGB_Controller_Func+0x3c>
            RGB_SensorIDAutoSet(1);
 80015e6:	2001      	movs	r0, #1
 80015e8:	f000 f8e2 	bl	80017b0 <RGB_SensorIDAutoSet>
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 80015ec:	78a2      	ldrb	r2, [r4, #2]
 80015ee:	4621      	mov	r1, r4
 80015f0:	3203      	adds	r2, #3
 80015f2:	a801      	add	r0, sp, #4
 80015f4:	f000 fe46 	bl	8002284 <memcpy>
            Result_buf[5]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 80015f8:	f89d 1006 	ldrb.w	r1, [sp, #6]
 80015fc:	f10d 0005 	add.w	r0, sp, #5
 8001600:	f000 fcb0 	bl	8001f64 <STH30_CreateCrc>
 8001604:	f88d 0009 	strb.w	r0, [sp, #9]
            break;
 8001608:	e7dc      	b.n	80015c4 <RGB_Controller_Func+0x3c>
            SensorID_buf[SensorID_Cnt] = data[blucell_length + 1];
 800160a:	4a21      	ldr	r2, [pc, #132]	; (8001690 <RGB_Controller_Func+0x108>)
 800160c:	78e0      	ldrb	r0, [r4, #3]
 800160e:	7813      	ldrb	r3, [r2, #0]
 8001610:	4920      	ldr	r1, [pc, #128]	; (8001694 <RGB_Controller_Func+0x10c>)
 8001612:	54c8      	strb	r0, [r1, r3]
            SensorID_Cnt++;
 8001614:	3301      	adds	r3, #1
 8001616:	e7e4      	b.n	80015e2 <RGB_Controller_Func+0x5a>
             memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 8001618:	78a2      	ldrb	r2, [r4, #2]
 800161a:	4621      	mov	r1, r4
 800161c:	3203      	adds	r2, #3
 800161e:	a801      	add	r0, sp, #4
 8001620:	f000 fe30 	bl	8002284 <memcpy>
             Result_buf[5]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 8001624:	f89d 1006 	ldrb.w	r1, [sp, #6]
 8001628:	f10d 0005 	add.w	r0, sp, #5
 800162c:	f000 fc9a 	bl	8001f64 <STH30_CreateCrc>
 8001630:	f88d 0009 	strb.w	r0, [sp, #9]
            RGB_Alarm_Check(&data[blucell_stx]);
 8001634:	4620      	mov	r0, r4
 8001636:	f7ff ff43 	bl	80014c0 <RGB_Alarm_Check>
            break;
 800163a:	e7c3      	b.n	80015c4 <RGB_Controller_Func+0x3c>
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 800163c:	78a2      	ldrb	r2, [r4, #2]
 800163e:	4621      	mov	r1, r4
 8001640:	3203      	adds	r2, #3
 8001642:	a801      	add	r0, sp, #4
 8001644:	f000 fe1e 	bl	8002284 <memcpy>
            RGB_SensorRedLimit_Buf[data[blucell_dstid]]   = ((data[blucell_red_H] << 8) |data[blucell_red_L]);
 8001648:	7922      	ldrb	r2, [r4, #4]
 800164a:	7963      	ldrb	r3, [r4, #5]
 800164c:	7aa1      	ldrb	r1, [r4, #10]
 800164e:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 8001652:	4a11      	ldr	r2, [pc, #68]	; (8001698 <RGB_Controller_Func+0x110>)
            Result_buf[blucell_crc]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 8001654:	f10d 0005 	add.w	r0, sp, #5
            RGB_SensorRedLimit_Buf[data[blucell_dstid]]   = ((data[blucell_red_H] << 8) |data[blucell_red_L]);
 8001658:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            RGB_SensorGreenLimit_Buf[data[blucell_dstid]] = ((data[blucell_green_H] << 8) |data[blucell_green_L]);
 800165c:	79a2      	ldrb	r2, [r4, #6]
 800165e:	79e3      	ldrb	r3, [r4, #7]
 8001660:	7aa1      	ldrb	r1, [r4, #10]
 8001662:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 8001666:	4a0d      	ldr	r2, [pc, #52]	; (800169c <RGB_Controller_Func+0x114>)
 8001668:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            RGB_SensorBlueLimit_Buf[data[blucell_dstid]]  = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]);        
 800166c:	7a22      	ldrb	r2, [r4, #8]
 800166e:	7a63      	ldrb	r3, [r4, #9]
 8001670:	7aa1      	ldrb	r1, [r4, #10]
 8001672:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 8001676:	4a0a      	ldr	r2, [pc, #40]	; (80016a0 <RGB_Controller_Func+0x118>)
 8001678:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            Result_buf[blucell_crc]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 800167c:	f89d 1006 	ldrb.w	r1, [sp, #6]
 8001680:	f000 fc70 	bl	8001f64 <STH30_CreateCrc>
 8001684:	f88d 000f 	strb.w	r0, [sp, #15]
            break;
 8001688:	e79c      	b.n	80015c4 <RGB_Controller_Func+0x3c>
 800168a:	bf00      	nop
 800168c:	20000110 	.word	0x20000110
 8001690:	200000ca 	.word	0x200000ca
 8001694:	200000cb 	.word	0x200000cb
 8001698:	200000b8 	.word	0x200000b8
 800169c:	200000a6 	.word	0x200000a6
 80016a0:	20000094 	.word	0x20000094

080016a4 <HAL_UART_RxCpltCallback>:


void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
    if(huart->Instance == USART1)//RGB Comunication 
 80016a4:	6802      	ldr	r2, [r0, #0]
 80016a6:	4b2d      	ldr	r3, [pc, #180]	; (800175c <HAL_UART_RxCpltCallback+0xb8>)
{
 80016a8:	b510      	push	{r4, lr}
    if(huart->Instance == USART1)//RGB Comunication 
 80016aa:	429a      	cmp	r2, r3
{
 80016ac:	4604      	mov	r4, r0
    if(huart->Instance == USART1)//RGB Comunication 
 80016ae:	d11a      	bne.n	80016e6 <HAL_UART_RxCpltCallback+0x42>
    {
        buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR;
 80016b0:	4a2b      	ldr	r2, [pc, #172]	; (8001760 <HAL_UART_RxCpltCallback+0xbc>)
 80016b2:	492c      	ldr	r1, [pc, #176]	; (8001764 <HAL_UART_RxCpltCallback+0xc0>)
 80016b4:	7813      	ldrb	r3, [r2, #0]
 80016b6:	7808      	ldrb	r0, [r1, #0]
 80016b8:	492b      	ldr	r1, [pc, #172]	; (8001768 <HAL_UART_RxCpltCallback+0xc4>)
//        printf("data %02x \r\n",rx1_data[0]);
        if(buf[count_in1++] == 0xEB){
 80016ba:	28eb      	cmp	r0, #235	; 0xeb
        buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR;
 80016bc:	54c8      	strb	r0, [r1, r3]
        if(buf[count_in1++] == 0xEB){
 80016be:	f103 0301 	add.w	r3, r3, #1
 80016c2:	b2db      	uxtb	r3, r3
 80016c4:	7013      	strb	r3, [r2, #0]
 80016c6:	d109      	bne.n	80016dc <HAL_UART_RxCpltCallback+0x38>
            if(buf[blucell_length] == (count_in1 - 3))
 80016c8:	7889      	ldrb	r1, [r1, #2]
 80016ca:	3b03      	subs	r3, #3
 80016cc:	4299      	cmp	r1, r3
        
    }
}

void UartDataRecvSet(uint8_t val){
    UartDataisReved = val;
 80016ce:	bf0b      	itete	eq
 80016d0:	2201      	moveq	r2, #1
                count_in1 = 0;
 80016d2:	2300      	movne	r3, #0
    UartDataisReved = val;
 80016d4:	4b25      	ldreq	r3, [pc, #148]	; (800176c <HAL_UART_RxCpltCallback+0xc8>)
                count_in1 = 0;
 80016d6:	7013      	strbne	r3, [r2, #0]
    UartDataisReved = val;
 80016d8:	bf08      	it	eq
 80016da:	701a      	strbeq	r2, [r3, #0]
        HAL_UART_Receive_IT(&huart1,&rx1_data[0],1);
 80016dc:	2201      	movs	r2, #1
 80016de:	4921      	ldr	r1, [pc, #132]	; (8001764 <HAL_UART_RxCpltCallback+0xc0>)
 80016e0:	4823      	ldr	r0, [pc, #140]	; (8001770 <HAL_UART_RxCpltCallback+0xcc>)
 80016e2:	f7ff fdb9 	bl	8001258 <HAL_UART_Receive_IT>
    if(huart->Instance == USART2) // Lora?? ?��?��?��?�� ?��?��
 80016e6:	6822      	ldr	r2, [r4, #0]
 80016e8:	4b22      	ldr	r3, [pc, #136]	; (8001774 <HAL_UART_RxCpltCallback+0xd0>)
 80016ea:	429a      	cmp	r2, r3
 80016ec:	d119      	bne.n	8001722 <HAL_UART_RxCpltCallback+0x7e>
        buf[count_in2] = rx2_data[0];//(uint8_t)USART2->DR;
 80016ee:	4822      	ldr	r0, [pc, #136]	; (8001778 <HAL_UART_RxCpltCallback+0xd4>)
 80016f0:	4a22      	ldr	r2, [pc, #136]	; (800177c <HAL_UART_RxCpltCallback+0xd8>)
 80016f2:	7803      	ldrb	r3, [r0, #0]
 80016f4:	7811      	ldrb	r1, [r2, #0]
 80016f6:	4a1c      	ldr	r2, [pc, #112]	; (8001768 <HAL_UART_RxCpltCallback+0xc4>)
        if(buf[count_in2++] == 0xEB){
 80016f8:	29eb      	cmp	r1, #235	; 0xeb
        buf[count_in2] = rx2_data[0];//(uint8_t)USART2->DR;
 80016fa:	54d1      	strb	r1, [r2, r3]
        if(buf[count_in2++] == 0xEB){
 80016fc:	f103 0301 	add.w	r3, r3, #1
 8001700:	b2db      	uxtb	r3, r3
 8001702:	7003      	strb	r3, [r0, #0]
 8001704:	d108      	bne.n	8001718 <HAL_UART_RxCpltCallback+0x74>
            if(buf[blucell_length] == (count_in2 - 3))
 8001706:	7892      	ldrb	r2, [r2, #2]
 8001708:	3b03      	subs	r3, #3
 800170a:	429a      	cmp	r2, r3
    UartDataisReved = val;
 800170c:	bf0b      	itete	eq
 800170e:	2202      	moveq	r2, #2
                count_in1 = 0;
 8001710:	2200      	movne	r2, #0
    UartDataisReved = val;
 8001712:	4b16      	ldreq	r3, [pc, #88]	; (800176c <HAL_UART_RxCpltCallback+0xc8>)
                count_in1 = 0;
 8001714:	4b12      	ldrne	r3, [pc, #72]	; (8001760 <HAL_UART_RxCpltCallback+0xbc>)
 8001716:	701a      	strb	r2, [r3, #0]
        HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
 8001718:	2201      	movs	r2, #1
 800171a:	4918      	ldr	r1, [pc, #96]	; (800177c <HAL_UART_RxCpltCallback+0xd8>)
 800171c:	4818      	ldr	r0, [pc, #96]	; (8001780 <HAL_UART_RxCpltCallback+0xdc>)
 800171e:	f7ff fd9b 	bl	8001258 <HAL_UART_Receive_IT>
    if(huart->Instance == USART3) //GUI ?? ?��?��?��?�� Port
 8001722:	6822      	ldr	r2, [r4, #0]
 8001724:	4b17      	ldr	r3, [pc, #92]	; (8001784 <HAL_UART_RxCpltCallback+0xe0>)
 8001726:	429a      	cmp	r2, r3
 8001728:	d116      	bne.n	8001758 <HAL_UART_RxCpltCallback+0xb4>
        buf[count_in3] = rx3_data[0];//(uint8_t)USART2->DR;
 800172a:	4a17      	ldr	r2, [pc, #92]	; (8001788 <HAL_UART_RxCpltCallback+0xe4>)
 800172c:	4917      	ldr	r1, [pc, #92]	; (800178c <HAL_UART_RxCpltCallback+0xe8>)
 800172e:	7812      	ldrb	r2, [r2, #0]
 8001730:	780b      	ldrb	r3, [r1, #0]
 8001732:	480d      	ldr	r0, [pc, #52]	; (8001768 <HAL_UART_RxCpltCallback+0xc4>)
        if(buf[count_in3++] == 0xEB)UartDataRecvSet(3);
 8001734:	2aeb      	cmp	r2, #235	; 0xeb
        buf[count_in3] = rx3_data[0];//(uint8_t)USART2->DR;
 8001736:	54c2      	strb	r2, [r0, r3]
    UartDataisReved = val;
 8001738:	bf08      	it	eq
 800173a:	2203      	moveq	r2, #3
        if(buf[count_in3++] == 0xEB)UartDataRecvSet(3);
 800173c:	f103 0301 	add.w	r3, r3, #1
 8001740:	700b      	strb	r3, [r1, #0]
    UartDataisReved = val;
 8001742:	bf08      	it	eq
 8001744:	4b09      	ldreq	r3, [pc, #36]	; (800176c <HAL_UART_RxCpltCallback+0xc8>)
        HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
 8001746:	4910      	ldr	r1, [pc, #64]	; (8001788 <HAL_UART_RxCpltCallback+0xe4>)
    UartDataisReved = val;
 8001748:	bf08      	it	eq
 800174a:	701a      	strbeq	r2, [r3, #0]
        HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
 800174c:	4810      	ldr	r0, [pc, #64]	; (8001790 <HAL_UART_RxCpltCallback+0xec>)
 800174e:	2201      	movs	r2, #1
}
 8001750:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
        HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
 8001754:	f7ff bd80 	b.w	8001258 <HAL_UART_Receive_IT>
 8001758:	bd10      	pop	{r4, pc}
 800175a:	bf00      	nop
 800175c:	40013800 	.word	0x40013800
 8001760:	20000176 	.word	0x20000176
 8001764:	2000029c 	.word	0x2000029c
 8001768:	20000112 	.word	0x20000112
 800176c:	200001b0 	.word	0x200001b0
 8001770:	200001f8 	.word	0x200001f8
 8001774:	40004400 	.word	0x40004400
 8001778:	20000177 	.word	0x20000177
 800177c:	200001f5 	.word	0x200001f5
 8001780:	200002e0 	.word	0x200002e0
 8001784:	40004800 	.word	0x40004800
 8001788:	200001f4 	.word	0x200001f4
 800178c:	20000178 	.word	0x20000178
 8001790:	200001b4 	.word	0x200001b4

08001794 <HAL_TIM_PeriodElapsedCallback>:
    if(htim->Instance == TIM6){
 8001794:	6802      	ldr	r2, [r0, #0]
 8001796:	4b04      	ldr	r3, [pc, #16]	; (80017a8 <HAL_TIM_PeriodElapsedCallback+0x14>)
 8001798:	429a      	cmp	r2, r3
        LedTimerCnt++;
 800179a:	bf01      	itttt	eq
 800179c:	4a03      	ldreq	r2, [pc, #12]	; (80017ac <HAL_TIM_PeriodElapsedCallback+0x18>)
 800179e:	6813      	ldreq	r3, [r2, #0]
 80017a0:	3301      	addeq	r3, #1
 80017a2:	6013      	streq	r3, [r2, #0]
 80017a4:	4770      	bx	lr
 80017a6:	bf00      	nop
 80017a8:	40001000 	.word	0x40001000
 80017ac:	2000010c 	.word	0x2000010c

080017b0 <RGB_SensorIDAutoSet>:
}
uint8_t UartDataRecvGet(void){
    return UartDataisReved;
}
void RGB_SensorIDAutoSet(uint8_t set){
    RGB_SensorIDAutoset = set;
 80017b0:	4b01      	ldr	r3, [pc, #4]	; (80017b8 <RGB_SensorIDAutoSet+0x8>)
 80017b2:	7018      	strb	r0, [r3, #0]
 80017b4:	4770      	bx	lr
 80017b6:	bf00      	nop
 80017b8:	20000111 	.word	0x20000111

080017bc <Uart3_Data_Send>:
uint8_t RGB_SensorIDAutoGet(void){
    return RGB_SensorIDAutoset;
}

void Uart3_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart3, data,size, 10); 
 80017bc:	460a      	mov	r2, r1
 80017be:	230a      	movs	r3, #10
 80017c0:	4601      	mov	r1, r0
 80017c2:	4801      	ldr	r0, [pc, #4]	; (80017c8 <Uart3_Data_Send+0xc>)
 80017c4:	f7ff bcec 	b.w	80011a0 <HAL_UART_Transmit>
 80017c8:	200001b4 	.word	0x200001b4

080017cc <Uart1_Data_Send>:
}
void Uart2_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart2, data,size, 10); 
}
void Uart1_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart1, data,size, 10); 
 80017cc:	460a      	mov	r2, r1
 80017ce:	230a      	movs	r3, #10
 80017d0:	4601      	mov	r1, r0
 80017d2:	4801      	ldr	r0, [pc, #4]	; (80017d8 <Uart1_Data_Send+0xc>)
 80017d4:	f7ff bce4 	b.w	80011a0 <HAL_UART_Transmit>
 80017d8:	200001f8 	.word	0x200001f8

080017dc <_write>:
}

int _write (int file, uint8_t *ptr, uint16_t len) 
{
 80017dc:	b510      	push	{r4, lr}
 80017de:	4614      	mov	r4, r2
    HAL_UART_Transmit (&huart3, ptr, len, 10); 
 80017e0:	230a      	movs	r3, #10
 80017e2:	4802      	ldr	r0, [pc, #8]	; (80017ec <_write+0x10>)
 80017e4:	f7ff fcdc 	bl	80011a0 <HAL_UART_Transmit>
    return len;
}
 80017e8:	4620      	mov	r0, r4
 80017ea:	bd10      	pop	{r4, pc}
 80017ec:	200001b4 	.word	0x200001b4

080017f0 <Uart_dataCheck>:
void Uart_dataCheck(uint8_t* cnt){
 80017f0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
        printf("%02x ",buf[i]);
    }
        printf("\r\n");
#endif  

    crccheck = STH30_CheckCrc(&buf[blucell_type],buf[blucell_length],buf[buf[blucell_length] + 1]);
 80017f2:	4c17      	ldr	r4, [pc, #92]	; (8001850 <Uart_dataCheck+0x60>)
void Uart_dataCheck(uint8_t* cnt){
 80017f4:	4606      	mov	r6, r0
    crccheck = STH30_CheckCrc(&buf[blucell_type],buf[blucell_length],buf[buf[blucell_length] + 1]);
 80017f6:	78a1      	ldrb	r1, [r4, #2]
 80017f8:	1c60      	adds	r0, r4, #1
 80017fa:	1863      	adds	r3, r4, r1
 80017fc:	785a      	ldrb	r2, [r3, #1]
 80017fe:	f000 fbcc 	bl	8001f9a <STH30_CheckCrc>
 8001802:	4625      	mov	r5, r4
    if(crccheck == CHECKSUM_ERROR){
 8001804:	b9d0      	cbnz	r0, 800183c <Uart_dataCheck+0x4c>
        for(uint8_t i = 0; i < (*cnt); i++){
            printf("%02x ",buf[i]);
 8001806:	4f13      	ldr	r7, [pc, #76]	; (8001854 <Uart_dataCheck+0x64>)
        for(uint8_t i = 0; i < (*cnt); i++){
 8001808:	7833      	ldrb	r3, [r6, #0]
 800180a:	1c44      	adds	r4, r0, #1
 800180c:	b2c0      	uxtb	r0, r0
 800180e:	4283      	cmp	r3, r0
 8001810:	d80e      	bhi.n	8001830 <Uart_dataCheck+0x40>
        }
        printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,buf[buf[blucell_length] + 1]);
 8001812:	78ab      	ldrb	r3, [r5, #2]
 8001814:	2100      	movs	r1, #0
 8001816:	441d      	add	r5, r3
 8001818:	786a      	ldrb	r2, [r5, #1]
 800181a:	480f      	ldr	r0, [pc, #60]	; (8001858 <Uart_dataCheck+0x68>)
 800181c:	f000 fd46 	bl	80022ac <iprintf>
    else{
         printf("What Happen?\r\n");
        /*NOP*/
    }

    *cnt = 0;
 8001820:	2100      	movs	r1, #0
    
    memset(buf,0x00,buf_size);
 8001822:	2264      	movs	r2, #100	; 0x64
    *cnt = 0;
 8001824:	7031      	strb	r1, [r6, #0]
    memset(buf,0x00,buf_size);
 8001826:	480a      	ldr	r0, [pc, #40]	; (8001850 <Uart_dataCheck+0x60>)
}
 8001828:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
    memset(buf,0x00,buf_size);
 800182c:	f000 bd35 	b.w	800229a <memset>
            printf("%02x ",buf[i]);
 8001830:	5c29      	ldrb	r1, [r5, r0]
 8001832:	4638      	mov	r0, r7
 8001834:	f000 fd3a 	bl	80022ac <iprintf>
 8001838:	4620      	mov	r0, r4
 800183a:	e7e5      	b.n	8001808 <Uart_dataCheck+0x18>
    else if(crccheck == NO_ERROR){
 800183c:	2801      	cmp	r0, #1
 800183e:	d103      	bne.n	8001848 <Uart_dataCheck+0x58>
        RGB_Controller_Func(&buf[blucell_stx]);
 8001840:	4620      	mov	r0, r4
 8001842:	f7ff fea1 	bl	8001588 <RGB_Controller_Func>
 8001846:	e7eb      	b.n	8001820 <Uart_dataCheck+0x30>
         printf("What Happen?\r\n");
 8001848:	4804      	ldr	r0, [pc, #16]	; (800185c <Uart_dataCheck+0x6c>)
 800184a:	f000 fdb7 	bl	80023bc <puts>
 800184e:	e7e7      	b.n	8001820 <Uart_dataCheck+0x30>
 8001850:	20000112 	.word	0x20000112
 8001854:	0800343c 	.word	0x0800343c
 8001858:	08003442 	.word	0x08003442
 800185c:	08003468 	.word	0x08003468

08001860 <RGB_Sensor_PowerOnOff>:
void RGB_Sensor_PowerOnOff(uint8_t id){
 8001860:	b508      	push	{r3, lr}

    switch(id){
 8001862:	2808      	cmp	r0, #8
 8001864:	f200 8122 	bhi.w	8001aac <RGB_Sensor_PowerOnOff+0x24c>
 8001868:	e8df f010 	tbh	[pc, r0, lsl #1]
 800186c:	00390009 	.word	0x00390009
 8001870:	006d0063 	.word	0x006d0063
 8001874:	0093007d 	.word	0x0093007d
 8001878:	00cd00ad 	.word	0x00cd00ad
 800187c:	00f3      	.short	0x00f3
        case 0:
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 800187e:	2201      	movs	r2, #1
 8001880:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001884:	488a      	ldr	r0, [pc, #552]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001886:	f7fe ffa9 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);            
 800188a:	2201      	movs	r2, #1
 800188c:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001890:	4887      	ldr	r0, [pc, #540]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001892:	f7fe ffa3 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);            
 8001896:	2201      	movs	r2, #1
 8001898:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 800189c:	4884      	ldr	r0, [pc, #528]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 800189e:	f7fe ff9d 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 80018a2:	2201      	movs	r2, #1
 80018a4:	2140      	movs	r1, #64	; 0x40
 80018a6:	4883      	ldr	r0, [pc, #524]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 80018a8:	f7fe ff98 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
 80018ac:	2201      	movs	r2, #1
 80018ae:	2180      	movs	r1, #128	; 0x80
 80018b0:	4880      	ldr	r0, [pc, #512]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 80018b2:	f7fe ff93 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET);
 80018b6:	2201      	movs	r2, #1
 80018b8:	f44f 7180 	mov.w	r1, #256	; 0x100
 80018bc:	487d      	ldr	r0, [pc, #500]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 80018be:	f7fe ff8d 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_SET);
 80018c2:	2201      	movs	r2, #1
 80018c4:	f44f 7100 	mov.w	r1, #512	; 0x200
 80018c8:	487a      	ldr	r0, [pc, #488]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 80018ca:	f7fe ff87 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);   
 80018ce:	2201      	movs	r2, #1
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_RESET);
 80018d0:	f44f 7180 	mov.w	r1, #256	; 0x100
 80018d4:	4878      	ldr	r0, [pc, #480]	; (8001ab8 <RGB_Sensor_PowerOnOff+0x258>)
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_RESET);           
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET);
            break;
    }
}
 80018d6:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET);
 80018da:	f7fe bf7f 	b.w	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 80018de:	2201      	movs	r2, #1
 80018e0:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80018e4:	4872      	ldr	r0, [pc, #456]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80018e6:	f7fe ff79 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET);            
 80018ea:	2200      	movs	r2, #0
 80018ec:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80018f0:	486f      	ldr	r0, [pc, #444]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80018f2:	f7fe ff73 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
 80018f6:	2200      	movs	r2, #0
 80018f8:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80018fc:	486c      	ldr	r0, [pc, #432]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80018fe:	f7fe ff6d 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
 8001902:	2200      	movs	r2, #0
 8001904:	2140      	movs	r1, #64	; 0x40
 8001906:	486b      	ldr	r0, [pc, #428]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001908:	f7fe ff68 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
 800190c:	2200      	movs	r2, #0
 800190e:	2180      	movs	r1, #128	; 0x80
 8001910:	4868      	ldr	r0, [pc, #416]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001912:	f7fe ff63 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET);
 8001916:	2200      	movs	r2, #0
 8001918:	f44f 7180 	mov.w	r1, #256	; 0x100
 800191c:	4865      	ldr	r0, [pc, #404]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 800191e:	f7fe ff5d 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_RESET);
 8001922:	2200      	movs	r2, #0
 8001924:	f44f 7100 	mov.w	r1, #512	; 0x200
 8001928:	4862      	ldr	r0, [pc, #392]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 800192a:	f7fe ff57 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_RESET);
 800192e:	2200      	movs	r2, #0
 8001930:	e7ce      	b.n	80018d0 <RGB_Sensor_PowerOnOff+0x70>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);        
 8001932:	2201      	movs	r2, #1
 8001934:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001938:	485d      	ldr	r0, [pc, #372]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 800193a:	f7fe ff4f 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_RESET);
 800193e:	2200      	movs	r2, #0
 8001940:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001944:	e7d4      	b.n	80018f0 <RGB_Sensor_PowerOnOff+0x90>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);     
 8001946:	2201      	movs	r2, #1
 8001948:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 800194c:	4858      	ldr	r0, [pc, #352]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 800194e:	f7fe ff45 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET); 
 8001952:	2200      	movs	r2, #0
 8001954:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001958:	4855      	ldr	r0, [pc, #340]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 800195a:	f7fe ff3f 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_RESET);
 800195e:	2200      	movs	r2, #0
 8001960:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001964:	e7ca      	b.n	80018fc <RGB_Sensor_PowerOnOff+0x9c>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 8001966:	2201      	movs	r2, #1
 8001968:	2140      	movs	r1, #64	; 0x40
 800196a:	4852      	ldr	r0, [pc, #328]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 800196c:	f7fe ff36 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET);    
 8001970:	2200      	movs	r2, #0
 8001972:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001976:	484e      	ldr	r0, [pc, #312]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001978:	f7fe ff30 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_RESET);
 800197c:	2200      	movs	r2, #0
 800197e:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001982:	484b      	ldr	r0, [pc, #300]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001984:	f7fe ff2a 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
 8001988:	2200      	movs	r2, #0
 800198a:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 800198e:	4848      	ldr	r0, [pc, #288]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001990:	e7ba      	b.n	8001908 <RGB_Sensor_PowerOnOff+0xa8>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
 8001992:	2201      	movs	r2, #1
 8001994:	2180      	movs	r1, #128	; 0x80
 8001996:	4847      	ldr	r0, [pc, #284]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001998:	f7fe ff20 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET);    
 800199c:	2200      	movs	r2, #0
 800199e:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80019a2:	4843      	ldr	r0, [pc, #268]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80019a4:	f7fe ff1a 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_RESET);
 80019a8:	2200      	movs	r2, #0
 80019aa:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80019ae:	4840      	ldr	r0, [pc, #256]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80019b0:	f7fe ff14 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
 80019b4:	2200      	movs	r2, #0
 80019b6:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80019ba:	483d      	ldr	r0, [pc, #244]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80019bc:	f7fe ff0e 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
 80019c0:	2200      	movs	r2, #0
 80019c2:	2140      	movs	r1, #64	; 0x40
 80019c4:	e7a4      	b.n	8001910 <RGB_Sensor_PowerOnOff+0xb0>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET);
 80019c6:	2201      	movs	r2, #1
 80019c8:	f44f 7180 	mov.w	r1, #256	; 0x100
 80019cc:	4839      	ldr	r0, [pc, #228]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 80019ce:	f7fe ff05 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET);    
 80019d2:	2200      	movs	r2, #0
 80019d4:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80019d8:	4835      	ldr	r0, [pc, #212]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80019da:	f7fe feff 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_RESET);
 80019de:	2200      	movs	r2, #0
 80019e0:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80019e4:	4832      	ldr	r0, [pc, #200]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80019e6:	f7fe fef9 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
 80019ea:	2200      	movs	r2, #0
 80019ec:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80019f0:	482f      	ldr	r0, [pc, #188]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 80019f2:	f7fe fef3 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
 80019f6:	2200      	movs	r2, #0
 80019f8:	2140      	movs	r1, #64	; 0x40
 80019fa:	482e      	ldr	r0, [pc, #184]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 80019fc:	f7fe feee 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
 8001a00:	2200      	movs	r2, #0
 8001a02:	2180      	movs	r1, #128	; 0x80
 8001a04:	e78a      	b.n	800191c <RGB_Sensor_PowerOnOff+0xbc>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_SET);
 8001a06:	2201      	movs	r2, #1
 8001a08:	f44f 7100 	mov.w	r1, #512	; 0x200
 8001a0c:	4829      	ldr	r0, [pc, #164]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001a0e:	f7fe fee5 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET);    
 8001a12:	2200      	movs	r2, #0
 8001a14:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001a18:	4825      	ldr	r0, [pc, #148]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001a1a:	f7fe fedf 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_RESET);
 8001a1e:	2200      	movs	r2, #0
 8001a20:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001a24:	4822      	ldr	r0, [pc, #136]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001a26:	f7fe fed9 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
 8001a2a:	2200      	movs	r2, #0
 8001a2c:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001a30:	481f      	ldr	r0, [pc, #124]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001a32:	f7fe fed3 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
 8001a36:	2200      	movs	r2, #0
 8001a38:	2140      	movs	r1, #64	; 0x40
 8001a3a:	481e      	ldr	r0, [pc, #120]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001a3c:	f7fe fece 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
 8001a40:	2200      	movs	r2, #0
 8001a42:	2180      	movs	r1, #128	; 0x80
 8001a44:	481b      	ldr	r0, [pc, #108]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001a46:	f7fe fec9 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET); 
 8001a4a:	2200      	movs	r2, #0
 8001a4c:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001a50:	e76a      	b.n	8001928 <RGB_Sensor_PowerOnOff+0xc8>
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);
 8001a52:	2201      	movs	r2, #1
 8001a54:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001a58:	4817      	ldr	r0, [pc, #92]	; (8001ab8 <RGB_Sensor_PowerOnOff+0x258>)
 8001a5a:	f7fe febf 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET);    
 8001a5e:	2200      	movs	r2, #0
 8001a60:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001a64:	4812      	ldr	r0, [pc, #72]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001a66:	f7fe feb9 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_RESET);
 8001a6a:	2200      	movs	r2, #0
 8001a6c:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001a70:	480f      	ldr	r0, [pc, #60]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001a72:	f7fe feb3 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
 8001a76:	2200      	movs	r2, #0
 8001a78:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001a7c:	480c      	ldr	r0, [pc, #48]	; (8001ab0 <RGB_Sensor_PowerOnOff+0x250>)
 8001a7e:	f7fe fead 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
 8001a82:	2200      	movs	r2, #0
 8001a84:	2140      	movs	r1, #64	; 0x40
 8001a86:	480b      	ldr	r0, [pc, #44]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001a88:	f7fe fea8 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
 8001a8c:	2200      	movs	r2, #0
 8001a8e:	2180      	movs	r1, #128	; 0x80
 8001a90:	4808      	ldr	r0, [pc, #32]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001a92:	f7fe fea3 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_RESET);           
 8001a96:	2200      	movs	r2, #0
 8001a98:	f44f 7100 	mov.w	r1, #512	; 0x200
 8001a9c:	4805      	ldr	r0, [pc, #20]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001a9e:	f7fe fe9d 	bl	80007dc <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET);
 8001aa2:	2200      	movs	r2, #0
 8001aa4:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001aa8:	4802      	ldr	r0, [pc, #8]	; (8001ab4 <RGB_Sensor_PowerOnOff+0x254>)
 8001aaa:	e714      	b.n	80018d6 <RGB_Sensor_PowerOnOff+0x76>
 8001aac:	bd08      	pop	{r3, pc}
 8001aae:	bf00      	nop
 8001ab0:	40010c00 	.word	0x40010c00
 8001ab4:	40011000 	.word	0x40011000
 8001ab8:	40010800 	.word	0x40010800

08001abc <test_read>:
#define DATA_16_2                 ((uint32_t)0x5678)


#if 1 // PYJ.2019.03.20_BEGIN -- 
void test_read(void) // 쓰기함수
{
 8001abc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8001abe:	f06f 4578 	mvn.w	r5, #4160749568	; 0xf8000000
    uint32_t Address = 0x08000000;
    uint8_t aa = 0;
 8001ac2:	2400      	movs	r4, #0
    for(uint32_t i = Address; i <= Address + 0x35d8; i++ ){
        printf("%02X ",*(uint8_t*)i);
 8001ac4:	4f08      	ldr	r7, [pc, #32]	; (8001ae8 <test_read+0x2c>)
    for(uint32_t i = Address; i <= Address + 0x35d8; i++ ){
 8001ac6:	4e09      	ldr	r6, [pc, #36]	; (8001aec <test_read+0x30>)
        aa++;
 8001ac8:	3401      	adds	r4, #1
        printf("%02X ",*(uint8_t*)i);
 8001aca:	f815 1f01 	ldrb.w	r1, [r5, #1]!
 8001ace:	4638      	mov	r0, r7
        aa++;
 8001ad0:	b2e4      	uxtb	r4, r4
        printf("%02X ",*(uint8_t*)i);
 8001ad2:	f000 fbeb 	bl	80022ac <iprintf>
        if(aa > 15){
 8001ad6:	2c0f      	cmp	r4, #15
 8001ad8:	d903      	bls.n	8001ae2 <test_read+0x26>
            printf("\n");
 8001ada:	200a      	movs	r0, #10
 8001adc:	f000 fbfe 	bl	80022dc <putchar>
            aa= 0;
 8001ae0:	2400      	movs	r4, #0
    for(uint32_t i = Address; i <= Address + 0x35d8; i++ ){
 8001ae2:	42b5      	cmp	r5, r6
 8001ae4:	d1f0      	bne.n	8001ac8 <test_read+0xc>
        }
    }
        
}
 8001ae6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8001ae8:	080034f1 	.word	0x080034f1
 8001aec:	080035d8 	.word	0x080035d8

08001af0 <Flash_RGB_Data_Write>:
#endif // PYJ.2019.03.20_END -- 
#define ADDR_FLASH_PAGE_TEST   ((uint32_t)0x08030000) /* Base @ of Page 127, 1 Kbytes */

#define FLASH_USER_START_ADDR   ADDR_FLASH_PAGE_TEST   /* Start @ of user Flash area */
#define FLASH_USER_END_ADDR     ADDR_FLASH_PAGE_TEST + ((uint32_t)0x0000FFFF)   /* End @ of user Flash area */
void Flash_RGB_Data_Write(uint32_t Addr,uint8_t* data){
 8001af0:	b570      	push	{r4, r5, r6, lr}
 8001af2:	4604      	mov	r4, r0

    uint16_t temp_Red = 0,temp_Green = 0,temp_Blue = 0,temp_ret1 = 0,temp_ret2 = 0;

    temp_Red  = ((data[blucell_red_H] << 8)   |data[blucell_red_L]);     //R
    temp_Green= ((data[blucell_green_H] << 8) |data[blucell_green_L]);  //G
 8001af4:	798b      	ldrb	r3, [r1, #6]
 8001af6:	79ce      	ldrb	r6, [r1, #7]
    temp_Blue = ((data[blucell_blue_H] << 8)  |data[blucell_blue_L]);   //B
 8001af8:	7a4d      	ldrb	r5, [r1, #9]
    temp_Green= ((data[blucell_green_H] << 8) |data[blucell_green_L]);  //G
 8001afa:	ea46 2603 	orr.w	r6, r6, r3, lsl #8
    temp_Blue = ((data[blucell_blue_H] << 8)  |data[blucell_blue_L]);   //B
 8001afe:	7a0b      	ldrb	r3, [r1, #8]
    temp_Red  = ((data[blucell_red_H] << 8)   |data[blucell_red_L]);     //R
 8001b00:	794a      	ldrb	r2, [r1, #5]
    temp_Blue = ((data[blucell_blue_H] << 8)  |data[blucell_blue_L]);   //B
 8001b02:	ea45 2503 	orr.w	r5, r5, r3, lsl #8
    temp_Red  = ((data[blucell_red_H] << 8)   |data[blucell_red_L]);     //R
 8001b06:	790b      	ldrb	r3, [r1, #4]

    HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 ,   (uint16_t)temp_Red);
 8001b08:	4601      	mov	r1, r0
    temp_Red  = ((data[blucell_red_H] << 8)   |data[blucell_red_L]);     //R
 8001b0a:	ea42 2203 	orr.w	r2, r2, r3, lsl #8
    HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 ,   (uint16_t)temp_Red);
 8001b0e:	2001      	movs	r0, #1
 8001b10:	2300      	movs	r3, #0
 8001b12:	f7fe fd31 	bl	8000578 <HAL_FLASH_Program>
    HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 2 ,   (uint16_t)temp_Green);
 8001b16:	4632      	mov	r2, r6
 8001b18:	1ca1      	adds	r1, r4, #2
 8001b1a:	2300      	movs	r3, #0
 8001b1c:	2001      	movs	r0, #1
 8001b1e:	f7fe fd2b 	bl	8000578 <HAL_FLASH_Program>
    HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 ,   (uint16_t)temp_Blue);
 8001b22:	462a      	mov	r2, r5
 8001b24:	1d21      	adds	r1, r4, #4
 8001b26:	2300      	movs	r3, #0

}
 8001b28:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 ,   (uint16_t)temp_Blue);
 8001b2c:	2001      	movs	r0, #1
 8001b2e:	f7fe bd23 	b.w	8000578 <HAL_FLASH_Program>
	...

08001b34 <Flash_write>:
void Flash_write(uint8_t* data) // 쓰기함수
{
 8001b34:	b537      	push	{r0, r1, r2, r4, r5, lr}
 8001b36:	4605      	mov	r5, r0
//    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
//    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
//    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
     Address = START_ADDR;

    __HAL_RCC_TIM7_CLK_DISABLE(); // 매인타이머를 정지합니다
 8001b38:	4c0f      	ldr	r4, [pc, #60]	; (8001b78 <Flash_write+0x44>)
 8001b3a:	69e3      	ldr	r3, [r4, #28]
 8001b3c:	f023 0320 	bic.w	r3, r3, #32
 8001b40:	61e3      	str	r3, [r4, #28]
    HAL_FLASH_Unlock(); // lock 풀기
 8001b42:	f7fe fcd3 	bl	80004ec <HAL_FLASH_Unlock>
 8001b46:	7aab      	ldrb	r3, [r5, #10]
        case 8:
            Address += 42;    
            break;            

    }
    Flash_RGB_Data_Write(Address,&data[blucell_stx]);
 8001b48:	4629      	mov	r1, r5
 8001b4a:	3b02      	subs	r3, #2
 8001b4c:	b2db      	uxtb	r3, r3
 8001b4e:	2b06      	cmp	r3, #6
 8001b50:	bf96      	itet	ls
 8001b52:	4a0a      	ldrls	r2, [pc, #40]	; (8001b7c <Flash_write+0x48>)
    switch(data[blucell_dstid]){
 8001b54:	480a      	ldrhi	r0, [pc, #40]	; (8001b80 <Flash_write+0x4c>)
 8001b56:	f852 0023 	ldrls.w	r0, [r2, r3, lsl #2]
    Flash_RGB_Data_Write(Address,&data[blucell_stx]);
 8001b5a:	f7ff ffc9 	bl	8001af0 <Flash_RGB_Data_Write>
    HAL_FLASH_Lock(); // lock 잠그기
 8001b5e:	f7fe fcd7 	bl	8000510 <HAL_FLASH_Lock>
    __HAL_RCC_TIM7_CLK_ENABLE(); // 매인타이머를 재시작합니다
 8001b62:	69e3      	ldr	r3, [r4, #28]
 8001b64:	f043 0320 	orr.w	r3, r3, #32
 8001b68:	61e3      	str	r3, [r4, #28]
 8001b6a:	69e3      	ldr	r3, [r4, #28]
 8001b6c:	f003 0320 	and.w	r3, r3, #32
 8001b70:	9301      	str	r3, [sp, #4]
 8001b72:	9b01      	ldr	r3, [sp, #4]

}
 8001b74:	b003      	add	sp, #12
 8001b76:	bd30      	pop	{r4, r5, pc}
 8001b78:	40021000 	.word	0x40021000
 8001b7c:	08003420 	.word	0x08003420
 8001b80:	08030000 	.word	0x08030000

08001b84 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001b84:	b510      	push	{r4, lr}
 8001b86:	b090      	sub	sp, #64	; 0x40
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001b88:	2228      	movs	r2, #40	; 0x28
 8001b8a:	2100      	movs	r1, #0
 8001b8c:	a806      	add	r0, sp, #24
 8001b8e:	f000 fb84 	bl	800229a <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001b92:	2100      	movs	r1, #0
 8001b94:	2214      	movs	r2, #20
 8001b96:	a801      	add	r0, sp, #4
 8001b98:	f000 fb7f 	bl	800229a <memset>
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001b9c:	2402      	movs	r4, #2
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 8001b9e:	2201      	movs	r2, #1
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001ba0:	f44f 3380 	mov.w	r3, #65536	; 0x10000
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001ba4:	a806      	add	r0, sp, #24
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 8001ba6:	9206      	str	r2, [sp, #24]
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001ba8:	9307      	str	r3, [sp, #28]
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8001baa:	920a      	str	r2, [sp, #40]	; 0x28
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001bac:	930e      	str	r3, [sp, #56]	; 0x38
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001bae:	940d      	str	r4, [sp, #52]	; 0x34
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001bb0:	f7fe fe1e 	bl	80007f0 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001bb4:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8001bb6:	2100      	movs	r1, #0
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001bb8:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8001bba:	f44f 6380 	mov.w	r3, #1024	; 0x400
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 8001bbe:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001bc0:	9402      	str	r4, [sp, #8]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8001bc2:	9103      	str	r1, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8001bc4:	9304      	str	r3, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 8001bc6:	9105      	str	r1, [sp, #20]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 8001bc8:	f7fe ffda 	bl	8000b80 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
}
 8001bcc:	b010      	add	sp, #64	; 0x40
 8001bce:	bd10      	pop	{r4, pc}

08001bd0 <main>:
{
 8001bd0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 8001bd4:	2404      	movs	r4, #4
 8001bd6:	f04f 0801 	mov.w	r8, #1
 8001bda:	27be      	movs	r7, #190	; 0xbe
 8001bdc:	4eb9      	ldr	r6, [pc, #740]	; (8001ec4 <main+0x2f4>)
 8001bde:	f8df a350 	ldr.w	sl, [pc, #848]	; 8001f30 <main+0x360>
 8001be2:	7833      	ldrb	r3, [r6, #0]
{
 8001be4:	b08f      	sub	sp, #60	; 0x3c
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 8001be6:	f88d 301b 	strb.w	r3, [sp, #27]
 8001bea:	f89a 3000 	ldrb.w	r3, [sl]
 8001bee:	4621      	mov	r1, r4
 8001bf0:	f10d 0019 	add.w	r0, sp, #25
 8001bf4:	f88d 7018 	strb.w	r7, [sp, #24]
 8001bf8:	f88d 8019 	strb.w	r8, [sp, #25]
 8001bfc:	f88d 401a 	strb.w	r4, [sp, #26]
 8001c00:	f88d 301c 	strb.w	r3, [sp, #28]
 8001c04:	f000 f9ae 	bl	8001f64 <STH30_CreateCrc>
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 8001c08:	2303      	movs	r3, #3
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 8001c0a:	25eb      	movs	r5, #235	; 0xeb
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 8001c0c:	f88d 3021 	strb.w	r3, [sp, #33]	; 0x21
 8001c10:	7833      	ldrb	r3, [r6, #0]
 8001c12:	4621      	mov	r1, r4
 8001c14:	f88d 3023 	strb.w	r3, [sp, #35]	; 0x23
 8001c18:	f89a 3000 	ldrb.w	r3, [sl]
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 8001c1c:	f88d 001d 	strb.w	r0, [sp, #29]
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 8001c20:	f10d 0021 	add.w	r0, sp, #33	; 0x21
 8001c24:	f88d 3024 	strb.w	r3, [sp, #36]	; 0x24
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 8001c28:	f88d 501e 	strb.w	r5, [sp, #30]
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 8001c2c:	f88d 7020 	strb.w	r7, [sp, #32]
 8001c30:	f88d 4022 	strb.w	r4, [sp, #34]	; 0x22
 8001c34:	f000 f996 	bl	8001f64 <STH30_CreateCrc>
 8001c38:	f88d 5026 	strb.w	r5, [sp, #38]	; 0x26
 8001c3c:	f88d 0025 	strb.w	r0, [sp, #37]	; 0x25
  HAL_Init();
 8001c40:	f7fe fb20 	bl	8000284 <HAL_Init>
  SystemClock_Config();
 8001c44:	f7ff ff9e 	bl	8001b84 <SystemClock_Config>
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001c48:	2210      	movs	r2, #16
 8001c4a:	2100      	movs	r1, #0
 8001c4c:	a80a      	add	r0, sp, #40	; 0x28
 8001c4e:	f000 fb24 	bl	800229a <memset>

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001c52:	4b9d      	ldr	r3, [pc, #628]	; (8001ec8 <main+0x2f8>)
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOA_CLK_ENABLE();
  __HAL_RCC_GPIOB_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001c54:	f64b 71d8 	movw	r1, #49112	; 0xbfd8
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001c58:	699a      	ldr	r2, [r3, #24]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001c5a:	489c      	ldr	r0, [pc, #624]	; (8001ecc <main+0x2fc>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001c5c:	f042 0210 	orr.w	r2, r2, #16
 8001c60:	619a      	str	r2, [r3, #24]
 8001c62:	699a      	ldr	r2, [r3, #24]
  GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
                          |GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9 
                          |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001c64:	2502      	movs	r5, #2
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001c66:	f002 0210 	and.w	r2, r2, #16
 8001c6a:	9202      	str	r2, [sp, #8]
 8001c6c:	9a02      	ldr	r2, [sp, #8]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8001c6e:	699a      	ldr	r2, [r3, #24]
  htim6.Instance = TIM6;
 8001c70:	f8df 92c0 	ldr.w	r9, [pc, #704]	; 8001f34 <main+0x364>
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8001c74:	f042 0220 	orr.w	r2, r2, #32
 8001c78:	619a      	str	r2, [r3, #24]
 8001c7a:	699a      	ldr	r2, [r3, #24]
  huart1.Instance = USART1;
 8001c7c:	4f94      	ldr	r7, [pc, #592]	; (8001ed0 <main+0x300>)
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8001c7e:	f002 0220 	and.w	r2, r2, #32
 8001c82:	9203      	str	r2, [sp, #12]
 8001c84:	9a03      	ldr	r2, [sp, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8001c86:	699a      	ldr	r2, [r3, #24]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8001c88:	f04f 0b0c 	mov.w	fp, #12
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8001c8c:	4322      	orrs	r2, r4
 8001c8e:	619a      	str	r2, [r3, #24]
 8001c90:	699a      	ldr	r2, [r3, #24]
  huart2.Instance = USART2;
 8001c92:	4e90      	ldr	r6, [pc, #576]	; (8001ed4 <main+0x304>)
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8001c94:	4022      	ands	r2, r4
 8001c96:	9204      	str	r2, [sp, #16]
 8001c98:	9a04      	ldr	r2, [sp, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8001c9a:	699a      	ldr	r2, [r3, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001c9c:	2400      	movs	r4, #0
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8001c9e:	f042 0208 	orr.w	r2, r2, #8
 8001ca2:	619a      	str	r2, [r3, #24]
 8001ca4:	699b      	ldr	r3, [r3, #24]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001ca6:	2200      	movs	r2, #0
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8001ca8:	f003 0308 	and.w	r3, r3, #8
 8001cac:	9305      	str	r3, [sp, #20]
 8001cae:	9b05      	ldr	r3, [sp, #20]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001cb0:	f7fe fd94 	bl	80007dc <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7 
 8001cb4:	2200      	movs	r2, #0
 8001cb6:	f242 11f0 	movw	r1, #8688	; 0x21f0
 8001cba:	4887      	ldr	r0, [pc, #540]	; (8001ed8 <main+0x308>)
 8001cbc:	f7fe fd8e 	bl	80007dc <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET);
 8001cc0:	2200      	movs	r2, #0
 8001cc2:	f44f 4170 	mov.w	r1, #61440	; 0xf000
 8001cc6:	4885      	ldr	r0, [pc, #532]	; (8001edc <main+0x30c>)
 8001cc8:	f7fe fd88 	bl	80007dc <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001ccc:	f64b 73d8 	movw	r3, #49112	; 0xbfd8
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8001cd0:	a90a      	add	r1, sp, #40	; 0x28
 8001cd2:	487e      	ldr	r0, [pc, #504]	; (8001ecc <main+0x2fc>)
  GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001cd4:	930a      	str	r3, [sp, #40]	; 0x28
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001cd6:	f8cd 802c 	str.w	r8, [sp, #44]	; 0x2c
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001cda:	950d      	str	r5, [sp, #52]	; 0x34
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001cdc:	940c      	str	r4, [sp, #48]	; 0x30
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8001cde:	f7fe fc91 	bl	8000604 <HAL_GPIO_Init>

  /*Configure GPIO pins : PA4 PA5 PA6 PA7 
                           PA8 PA13 */
  GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7 
 8001ce2:	f242 13f0 	movw	r3, #8688	; 0x21f0
                          |GPIO_PIN_8|GPIO_PIN_13;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001ce6:	a90a      	add	r1, sp, #40	; 0x28
 8001ce8:	487b      	ldr	r0, [pc, #492]	; (8001ed8 <main+0x308>)
  GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7 
 8001cea:	930a      	str	r3, [sp, #40]	; 0x28
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001cec:	f8cd 802c 	str.w	r8, [sp, #44]	; 0x2c
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001cf0:	950d      	str	r5, [sp, #52]	; 0x34
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001cf2:	940c      	str	r4, [sp, #48]	; 0x30
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001cf4:	f7fe fc86 	bl	8000604 <HAL_GPIO_Init>

  /*Configure GPIO pins : PB12 PB13 PB14 PB15 */
  GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
 8001cf8:	f44f 4370 	mov.w	r3, #61440	; 0xf000
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001cfc:	a90a      	add	r1, sp, #40	; 0x28
 8001cfe:	4877      	ldr	r0, [pc, #476]	; (8001edc <main+0x30c>)
  GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
 8001d00:	930a      	str	r3, [sp, #40]	; 0x28
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001d02:	f8cd 802c 	str.w	r8, [sp, #44]	; 0x2c
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001d06:	950d      	str	r5, [sp, #52]	; 0x34
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001d08:	940c      	str	r4, [sp, #48]	; 0x30
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001d0a:	f7fe fc7b 	bl	8000604 <HAL_GPIO_Init>
  htim6.Init.Prescaler = 1600-1;
 8001d0e:	f240 633f 	movw	r3, #1599	; 0x63f
 8001d12:	4a73      	ldr	r2, [pc, #460]	; (8001ee0 <main+0x310>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8001d14:	4648      	mov	r0, r9
  htim6.Init.Prescaler = 1600-1;
 8001d16:	e889 000c 	stmia.w	r9, {r2, r3}
  htim6.Init.Period = 10-1;
 8001d1a:	2309      	movs	r3, #9
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8001d1c:	f8c9 4008 	str.w	r4, [r9, #8]
  htim6.Init.Period = 10-1;
 8001d20:	f8c9 300c 	str.w	r3, [r9, #12]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8001d24:	f8c9 4018 	str.w	r4, [r9, #24]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8001d28:	940a      	str	r4, [sp, #40]	; 0x28
 8001d2a:	940b      	str	r4, [sp, #44]	; 0x2c
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8001d2c:	f7ff f8f8 	bl	8000f20 <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8001d30:	a90a      	add	r1, sp, #40	; 0x28
 8001d32:	4648      	mov	r0, r9
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8001d34:	940a      	str	r4, [sp, #40]	; 0x28
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 8001d36:	940b      	str	r4, [sp, #44]	; 0x2c
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8001d38:	f7ff f90c 	bl	8000f54 <HAL_TIMEx_MasterConfigSynchronization>
  huart1.Instance = USART1;
 8001d3c:	4b69      	ldr	r3, [pc, #420]	; (8001ee4 <main+0x314>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001d3e:	4638      	mov	r0, r7
  huart1.Instance = USART1;
 8001d40:	603b      	str	r3, [r7, #0]
  huart1.Init.BaudRate = 115200;
 8001d42:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8001d46:	60bc      	str	r4, [r7, #8]
  huart1.Init.BaudRate = 115200;
 8001d48:	607b      	str	r3, [r7, #4]
 8001d4a:	9301      	str	r3, [sp, #4]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8001d4c:	60fc      	str	r4, [r7, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 8001d4e:	613c      	str	r4, [r7, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8001d50:	f8c7 b014 	str.w	fp, [r7, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001d54:	61bc      	str	r4, [r7, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8001d56:	61fc      	str	r4, [r7, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001d58:	f7ff f9f4 	bl	8001144 <HAL_UART_Init>
  huart2.Instance = USART2;
 8001d5c:	4a62      	ldr	r2, [pc, #392]	; (8001ee8 <main+0x318>)
  huart2.Init.BaudRate = 115200;
 8001d5e:	9b01      	ldr	r3, [sp, #4]
  huart3.Instance = USART3;
 8001d60:	4d62      	ldr	r5, [pc, #392]	; (8001eec <main+0x31c>)
  if (HAL_UART_Init(&huart2) != HAL_OK)
 8001d62:	4630      	mov	r0, r6
  huart2.Instance = USART2;
 8001d64:	6032      	str	r2, [r6, #0]
  huart2.Init.BaudRate = 115200;
 8001d66:	6073      	str	r3, [r6, #4]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 8001d68:	60b4      	str	r4, [r6, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 8001d6a:	60f4      	str	r4, [r6, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 8001d6c:	6134      	str	r4, [r6, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 8001d6e:	f8c6 b014 	str.w	fp, [r6, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001d72:	61b4      	str	r4, [r6, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 8001d74:	61f4      	str	r4, [r6, #28]
  if (HAL_UART_Init(&huart2) != HAL_OK)
 8001d76:	f7ff f9e5 	bl	8001144 <HAL_UART_Init>
  huart3.Init.BaudRate = 115200;
 8001d7a:	9b01      	ldr	r3, [sp, #4]
  huart3.Instance = USART3;
 8001d7c:	4a5c      	ldr	r2, [pc, #368]	; (8001ef0 <main+0x320>)
  if (HAL_UART_Init(&huart3) != HAL_OK)
 8001d7e:	4628      	mov	r0, r5
  huart3.Init.BaudRate = 115200;
 8001d80:	606b      	str	r3, [r5, #4]
  huart3.Instance = USART3;
 8001d82:	602a      	str	r2, [r5, #0]
  huart3.Init.WordLength = UART_WORDLENGTH_8B;
 8001d84:	60ac      	str	r4, [r5, #8]
  huart3.Init.StopBits = UART_STOPBITS_1;
 8001d86:	60ec      	str	r4, [r5, #12]
  huart3.Init.Parity = UART_PARITY_NONE;
 8001d88:	612c      	str	r4, [r5, #16]
  huart3.Init.Mode = UART_MODE_TX_RX;
 8001d8a:	f8c5 b014 	str.w	fp, [r5, #20]
  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001d8e:	61ac      	str	r4, [r5, #24]
  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
 8001d90:	61ec      	str	r4, [r5, #28]
  if (HAL_UART_Init(&huart3) != HAL_OK)
 8001d92:	f7ff f9d7 	bl	8001144 <HAL_UART_Init>
  HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
 8001d96:	4622      	mov	r2, r4
 8001d98:	4621      	mov	r1, r4
 8001d9a:	2027      	movs	r0, #39	; 0x27
 8001d9c:	f7fe faba 	bl	8000314 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART3_IRQn);
 8001da0:	2027      	movs	r0, #39	; 0x27
 8001da2:	f7fe faeb 	bl	800037c <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 8001da6:	4622      	mov	r2, r4
 8001da8:	4621      	mov	r1, r4
 8001daa:	2025      	movs	r0, #37	; 0x25
 8001dac:	f7fe fab2 	bl	8000314 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8001db0:	2025      	movs	r0, #37	; 0x25
 8001db2:	f7fe fae3 	bl	800037c <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
 8001db6:	4622      	mov	r2, r4
 8001db8:	4621      	mov	r1, r4
 8001dba:	2026      	movs	r0, #38	; 0x26
 8001dbc:	f7fe faaa 	bl	8000314 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART2_IRQn);
 8001dc0:	2026      	movs	r0, #38	; 0x26
 8001dc2:	f7fe fadb 	bl	800037c <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 8001dc6:	4622      	mov	r2, r4
 8001dc8:	4621      	mov	r1, r4
 8001dca:	2036      	movs	r0, #54	; 0x36
 8001dcc:	f7fe faa2 	bl	8000314 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 8001dd0:	2036      	movs	r0, #54	; 0x36
 8001dd2:	f7fe fad3 	bl	800037c <HAL_NVIC_EnableIRQ>
  HAL_TIM_Base_Start_IT(&htim6);
 8001dd6:	4648      	mov	r0, r9
 8001dd8:	f7fe ffa4 	bl	8000d24 <HAL_TIM_Base_Start_IT>
  HAL_UART_Receive_IT(&huart1, &rx1_data[0],1);
 8001ddc:	4642      	mov	r2, r8
 8001dde:	4945      	ldr	r1, [pc, #276]	; (8001ef4 <main+0x324>)
 8001de0:	4638      	mov	r0, r7
 8001de2:	f7ff fa39 	bl	8001258 <HAL_UART_Receive_IT>
  HAL_UART_Receive_IT(&huart2, &rx2_data[0],1);
 8001de6:	4642      	mov	r2, r8
 8001de8:	4943      	ldr	r1, [pc, #268]	; (8001ef8 <main+0x328>)
 8001dea:	4630      	mov	r0, r6
 8001dec:	f7ff fa34 	bl	8001258 <HAL_UART_Receive_IT>
  HAL_UART_Receive_IT(&huart3, &rx3_data[0],1);
 8001df0:	4642      	mov	r2, r8
 8001df2:	4942      	ldr	r1, [pc, #264]	; (8001efc <main+0x32c>)
 8001df4:	4628      	mov	r0, r5
 8001df6:	f7ff fa2f 	bl	8001258 <HAL_UART_Receive_IT>
  setbuf(stdout, NULL); // \n ?��?��?��, printf �???????��?���?????? ?��?��?��  
 8001dfa:	4b41      	ldr	r3, [pc, #260]	; (8001f00 <main+0x330>)
 8001dfc:	4621      	mov	r1, r4
 8001dfe:	681b      	ldr	r3, [r3, #0]
    RGB_SensorIDAutoset = set;
 8001e00:	4e40      	ldr	r6, [pc, #256]	; (8001f04 <main+0x334>)
  setbuf(stdout, NULL); // \n ?��?��?��, printf �???????��?���?????? ?��?��?��  
 8001e02:	6898      	ldr	r0, [r3, #8]
 8001e04:	f000 fae2 	bl	80023cc <setbuf>
      printf("****************************************\r\n");
 8001e08:	483f      	ldr	r0, [pc, #252]	; (8001f08 <main+0x338>)
 8001e0a:	f000 fad7 	bl	80023bc <puts>
      printf("RGB Project\r\n");
 8001e0e:	483f      	ldr	r0, [pc, #252]	; (8001f0c <main+0x33c>)
 8001e10:	f000 fad4 	bl	80023bc <puts>
      printf("Build at %s %s\r\n", __DATE__, __TIME__);
 8001e14:	4a3e      	ldr	r2, [pc, #248]	; (8001f10 <main+0x340>)
 8001e16:	493f      	ldr	r1, [pc, #252]	; (8001f14 <main+0x344>)
 8001e18:	483f      	ldr	r0, [pc, #252]	; (8001f18 <main+0x348>)
 8001e1a:	f000 fa47 	bl	80022ac <iprintf>
      printf("Copyright (c) 2019. BLUECELL\r\n");
 8001e1e:	483f      	ldr	r0, [pc, #252]	; (8001f1c <main+0x34c>)
 8001e20:	f000 facc 	bl	80023bc <puts>
      printf("****************************************\r\n");
 8001e24:	4838      	ldr	r0, [pc, #224]	; (8001f08 <main+0x338>)
 8001e26:	f000 fac9 	bl	80023bc <puts>
    RGB_SensorIDAutoset = set;
 8001e2a:	f886 8000 	strb.w	r8, [r6]
    return UartDataisReved;
 8001e2e:	f8df 8108 	ldr.w	r8, [pc, #264]	; 8001f38 <main+0x368>
 8001e32:	4655      	mov	r5, sl
  test_read();
 8001e34:	f7ff fe42 	bl	8001abc <test_read>
 8001e38:	46c2      	mov	sl, r8
            HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 8001e3a:	f8df 9090 	ldr.w	r9, [pc, #144]	; 8001ecc <main+0x2fc>
    return UartDataisReved;
 8001e3e:	f898 3000 	ldrb.w	r3, [r8]
    if(uartdatarecv != 0){
 8001e42:	b183      	cbz	r3, 8001e66 <main+0x296>
        if(uartdatarecv == 1){
 8001e44:	2b01      	cmp	r3, #1
 8001e46:	d106      	bne.n	8001e56 <main+0x286>
            Uart_dataCheck(&count_in1);
 8001e48:	4835      	ldr	r0, [pc, #212]	; (8001f20 <main+0x350>)
            Uart_dataCheck(&count_in3);
 8001e4a:	f7ff fcd1 	bl	80017f0 <Uart_dataCheck>
    UartDataisReved = val;
 8001e4e:	2300      	movs	r3, #0
 8001e50:	f88a 3000 	strb.w	r3, [sl]
 8001e54:	e7f3      	b.n	8001e3e <main+0x26e>
        }else if(uartdatarecv == 2){
 8001e56:	2b02      	cmp	r3, #2
 8001e58:	d101      	bne.n	8001e5e <main+0x28e>
            Uart_dataCheck(&count_in2);
 8001e5a:	4832      	ldr	r0, [pc, #200]	; (8001f24 <main+0x354>)
 8001e5c:	e7f5      	b.n	8001e4a <main+0x27a>
        }else if(uartdatarecv == 3){
 8001e5e:	2b03      	cmp	r3, #3
 8001e60:	d1f5      	bne.n	8001e4e <main+0x27e>
            Uart_dataCheck(&count_in3);
 8001e62:	4831      	ldr	r0, [pc, #196]	; (8001f28 <main+0x358>)
 8001e64:	e7f1      	b.n	8001e4a <main+0x27a>
        if(LedTimerCnt > 500){
 8001e66:	4f31      	ldr	r7, [pc, #196]	; (8001f2c <main+0x35c>)
 8001e68:	683a      	ldr	r2, [r7, #0]
 8001e6a:	f5b2 7ffa 	cmp.w	r2, #500	; 0x1f4
 8001e6e:	d9e6      	bls.n	8001e3e <main+0x26e>
            if(RGB_SensorIDAutoGet() == 1){
 8001e70:	f896 b000 	ldrb.w	fp, [r6]
 8001e74:	f1bb 0f01 	cmp.w	fp, #1
 8001e78:	d160      	bne.n	8001f3c <main+0x36c>
                if(SensorID > 8){
 8001e7a:	7828      	ldrb	r0, [r5, #0]
 8001e7c:	2808      	cmp	r0, #8
 8001e7e:	d90d      	bls.n	8001e9c <main+0x2cc>
                    RGB_Sensor_PowerOnOff(0);
 8001e80:	4618      	mov	r0, r3
    RGB_SensorIDAutoset = set;
 8001e82:	7033      	strb	r3, [r6, #0]
                    RGB_Sensor_PowerOnOff(0);
 8001e84:	f7ff fcec 	bl	8001860 <RGB_Sensor_PowerOnOff>
                    SensorID = 1;
 8001e88:	f885 b000 	strb.w	fp, [r5]
            HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 8001e8c:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001e90:	4648      	mov	r0, r9
 8001e92:	f7fe fca8 	bl	80007e6 <HAL_GPIO_TogglePin>
            LedTimerCnt = 0;
 8001e96:	2300      	movs	r3, #0
 8001e98:	603b      	str	r3, [r7, #0]
 8001e9a:	e7d0      	b.n	8001e3e <main+0x26e>
                    RGB_Sensor_PowerOnOff(SensorID);
 8001e9c:	f7ff fce0 	bl	8001860 <RGB_Sensor_PowerOnOff>
                    HAL_Delay(500);
 8001ea0:	f44f 70fa 	mov.w	r0, #500	; 0x1f4
 8001ea4:	f7fe fa12 	bl	80002cc <HAL_Delay>
                    RGB_Controller_Func(&IDAutoSetRequest_data[blucell_stx]);
 8001ea8:	a808      	add	r0, sp, #32
 8001eaa:	f7ff fb6d 	bl	8001588 <RGB_Controller_Func>
                    HAL_Delay(500);
 8001eae:	f44f 70fa 	mov.w	r0, #500	; 0x1f4
 8001eb2:	f7fe fa0b 	bl	80002cc <HAL_Delay>
                    IDAutoSetRequest_data[4] = SensorID++;//DST ID
 8001eb6:	782b      	ldrb	r3, [r5, #0]
 8001eb8:	1c5a      	adds	r2, r3, #1
 8001eba:	702a      	strb	r2, [r5, #0]
 8001ebc:	f88d 3024 	strb.w	r3, [sp, #36]	; 0x24
 8001ec0:	e7e4      	b.n	8001e8c <main+0x2bc>
 8001ec2:	bf00      	nop
 8001ec4:	20000110 	.word	0x20000110
 8001ec8:	40021000 	.word	0x40021000
 8001ecc:	40011000 	.word	0x40011000
 8001ed0:	200001f8 	.word	0x200001f8
 8001ed4:	200002e0 	.word	0x200002e0
 8001ed8:	40010800 	.word	0x40010800
 8001edc:	40010c00 	.word	0x40010c00
 8001ee0:	40001000 	.word	0x40001000
 8001ee4:	40013800 	.word	0x40013800
 8001ee8:	40004400 	.word	0x40004400
 8001eec:	200001b4 	.word	0x200001b4
 8001ef0:	40004800 	.word	0x40004800
 8001ef4:	2000029c 	.word	0x2000029c
 8001ef8:	200001f5 	.word	0x200001f5
 8001efc:	200001f4 	.word	0x200001f4
 8001f00:	20000010 	.word	0x20000010
 8001f04:	20000111 	.word	0x20000111
 8001f08:	08003476 	.word	0x08003476
 8001f0c:	080034a0 	.word	0x080034a0
 8001f10:	080034ad 	.word	0x080034ad
 8001f14:	080034b6 	.word	0x080034b6
 8001f18:	080034c2 	.word	0x080034c2
 8001f1c:	080034d3 	.word	0x080034d3
 8001f20:	20000176 	.word	0x20000176
 8001f24:	20000177 	.word	0x20000177
 8001f28:	20000178 	.word	0x20000178
 8001f2c:	2000010c 	.word	0x2000010c
 8001f30:	20000008 	.word	0x20000008
 8001f34:	200002a0 	.word	0x200002a0
 8001f38:	200001b0 	.word	0x200001b0
                RGB_Controller_Func(&StatusRequest_data[0]);
 8001f3c:	a806      	add	r0, sp, #24
 8001f3e:	f7ff fb23 	bl	8001588 <RGB_Controller_Func>
                StatusRequest_data[4] = SensorID_buf[temp_sensorid++];
 8001f42:	4a06      	ldr	r2, [pc, #24]	; (8001f5c <main+0x38c>)
 8001f44:	1c63      	adds	r3, r4, #1
 8001f46:	5d12      	ldrb	r2, [r2, r4]
 8001f48:	b2db      	uxtb	r3, r3
 8001f4a:	f88d 201c 	strb.w	r2, [sp, #28]
                 if(temp_sensorid > (SensorID_Cnt - 1)){
 8001f4e:	4a04      	ldr	r2, [pc, #16]	; (8001f60 <main+0x390>)
 8001f50:	7814      	ldrb	r4, [r2, #0]
                     temp_sensorid = 0;
 8001f52:	429c      	cmp	r4, r3
 8001f54:	bfcc      	ite	gt
 8001f56:	461c      	movgt	r4, r3
 8001f58:	2400      	movle	r4, #0
 8001f5a:	e797      	b.n	8001e8c <main+0x2bc>
 8001f5c:	200000cb 	.word	0x200000cb
 8001f60:	200000ca 	.word	0x200000ca

08001f64 <STH30_CreateCrc>:
	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 8001f64:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001f66:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001f68:	4604      	mov	r4, r0
 8001f6a:	1a22      	subs	r2, r4, r0
 8001f6c:	b2d2      	uxtb	r2, r2
 8001f6e:	4291      	cmp	r1, r2
 8001f70:	d801      	bhi.n	8001f76 <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 8001f72:	4618      	mov	r0, r3
 8001f74:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 8001f76:	f814 2b01 	ldrb.w	r2, [r4], #1
 8001f7a:	4053      	eors	r3, r2
 8001f7c:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001f7e:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001f82:	f102 32ff 	add.w	r2, r2, #4294967295
 8001f86:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001f8a:	bf18      	it	ne
 8001f8c:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001f90:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 8001f94:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001f96:	d1f2      	bne.n	8001f7e <STH30_CreateCrc+0x1a>
 8001f98:	e7e7      	b.n	8001f6a <STH30_CreateCrc+0x6>

08001f9a <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 8001f9a:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001f9c:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001f9e:	4605      	mov	r5, r0
 8001fa0:	1a2c      	subs	r4, r5, r0
 8001fa2:	b2e4      	uxtb	r4, r4
 8001fa4:	42a1      	cmp	r1, r4
 8001fa6:	d803      	bhi.n	8001fb0 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8001fa8:	1a9b      	subs	r3, r3, r2
 8001faa:	4258      	negs	r0, r3
 8001fac:	4158      	adcs	r0, r3
 8001fae:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 8001fb0:	f815 4b01 	ldrb.w	r4, [r5], #1
 8001fb4:	4063      	eors	r3, r4
 8001fb6:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001fb8:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001fbc:	f104 34ff 	add.w	r4, r4, #4294967295
 8001fc0:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001fc4:	bf18      	it	ne
 8001fc6:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001fca:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8001fce:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001fd0:	d1f2      	bne.n	8001fb8 <STH30_CheckCrc+0x1e>
 8001fd2:	e7e5      	b.n	8001fa0 <STH30_CheckCrc+0x6>

08001fd4 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8001fd4:	4b0e      	ldr	r3, [pc, #56]	; (8002010 <HAL_MspInit+0x3c>)
{
 8001fd6:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8001fd8:	699a      	ldr	r2, [r3, #24]
 8001fda:	f042 0201 	orr.w	r2, r2, #1
 8001fde:	619a      	str	r2, [r3, #24]
 8001fe0:	699a      	ldr	r2, [r3, #24]
 8001fe2:	f002 0201 	and.w	r2, r2, #1
 8001fe6:	9200      	str	r2, [sp, #0]
 8001fe8:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8001fea:	69da      	ldr	r2, [r3, #28]
 8001fec:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8001ff0:	61da      	str	r2, [r3, #28]
 8001ff2:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /**DISABLE: JTAG-DP Disabled and SW-DP Disabled 
  */
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8001ff4:	4a07      	ldr	r2, [pc, #28]	; (8002014 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 8001ff6:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001ffa:	9301      	str	r3, [sp, #4]
 8001ffc:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8001ffe:	6853      	ldr	r3, [r2, #4]
 8002000:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8002004:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
 8002008:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 800200a:	b002      	add	sp, #8
 800200c:	4770      	bx	lr
 800200e:	bf00      	nop
 8002010:	40021000 	.word	0x40021000
 8002014:	40010000 	.word	0x40010000

08002018 <HAL_TIM_Base_MspInit>:
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{

  if(htim_base->Instance==TIM6)
 8002018:	6802      	ldr	r2, [r0, #0]
 800201a:	4b08      	ldr	r3, [pc, #32]	; (800203c <HAL_TIM_Base_MspInit+0x24>)
{
 800201c:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 800201e:	429a      	cmp	r2, r3
 8002020:	d10a      	bne.n	8002038 <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 8002022:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 8002026:	69da      	ldr	r2, [r3, #28]
 8002028:	f042 0210 	orr.w	r2, r2, #16
 800202c:	61da      	str	r2, [r3, #28]
 800202e:	69db      	ldr	r3, [r3, #28]
 8002030:	f003 0310 	and.w	r3, r3, #16
 8002034:	9301      	str	r3, [sp, #4]
 8002036:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 8002038:	b002      	add	sp, #8
 800203a:	4770      	bx	lr
 800203c:	40001000 	.word	0x40001000

08002040 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8002040:	b510      	push	{r4, lr}
 8002042:	4604      	mov	r4, r0
 8002044:	b08a      	sub	sp, #40	; 0x28

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8002046:	2210      	movs	r2, #16
 8002048:	2100      	movs	r1, #0
 800204a:	a806      	add	r0, sp, #24
 800204c:	f000 f925 	bl	800229a <memset>
  if(huart->Instance==USART1)
 8002050:	6823      	ldr	r3, [r4, #0]
 8002052:	4a3d      	ldr	r2, [pc, #244]	; (8002148 <HAL_UART_MspInit+0x108>)
 8002054:	4293      	cmp	r3, r2
 8002056:	d12a      	bne.n	80020ae <HAL_UART_MspInit+0x6e>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 8002058:	4b3c      	ldr	r3, [pc, #240]	; (800214c <HAL_UART_MspInit+0x10c>)
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800205a:	a906      	add	r1, sp, #24
    __HAL_RCC_USART1_CLK_ENABLE();
 800205c:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800205e:	483c      	ldr	r0, [pc, #240]	; (8002150 <HAL_UART_MspInit+0x110>)
    __HAL_RCC_USART1_CLK_ENABLE();
 8002060:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8002064:	619a      	str	r2, [r3, #24]
 8002066:	699a      	ldr	r2, [r3, #24]
 8002068:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 800206c:	9200      	str	r2, [sp, #0]
 800206e:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8002070:	699a      	ldr	r2, [r3, #24]
 8002072:	f042 0204 	orr.w	r2, r2, #4
 8002076:	619a      	str	r2, [r3, #24]
 8002078:	699b      	ldr	r3, [r3, #24]
 800207a:	f003 0304 	and.w	r3, r3, #4
 800207e:	9301      	str	r3, [sp, #4]
 8002080:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8002082:	f44f 7300 	mov.w	r3, #512	; 0x200
 8002086:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8002088:	2302      	movs	r3, #2
 800208a:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800208c:	2303      	movs	r3, #3
 800208e:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8002090:	f7fe fab8 	bl	8000604 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8002094:	f44f 6380 	mov.w	r3, #1024	; 0x400
    GPIO_InitStruct.Pin = GPIO_PIN_2;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

    GPIO_InitStruct.Pin = GPIO_PIN_3;
 8002098:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 800209a:	2300      	movs	r3, #0
 800209c:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 800209e:	2301      	movs	r3, #1
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80020a0:	482b      	ldr	r0, [pc, #172]	; (8002150 <HAL_UART_MspInit+0x110>)
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 80020a2:	9308      	str	r3, [sp, #32]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80020a4:	a906      	add	r1, sp, #24
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

    GPIO_InitStruct.Pin = GPIO_PIN_11;
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
    GPIO_InitStruct.Pull = GPIO_PULLUP;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80020a6:	f7fe faad 	bl	8000604 <HAL_GPIO_Init>
  /* USER CODE BEGIN USART3_MspInit 1 */

  /* USER CODE END USART3_MspInit 1 */
  }

}
 80020aa:	b00a      	add	sp, #40	; 0x28
 80020ac:	bd10      	pop	{r4, pc}
  else if(huart->Instance==USART2)
 80020ae:	4a29      	ldr	r2, [pc, #164]	; (8002154 <HAL_UART_MspInit+0x114>)
 80020b0:	4293      	cmp	r3, r2
 80020b2:	d11e      	bne.n	80020f2 <HAL_UART_MspInit+0xb2>
    __HAL_RCC_USART2_CLK_ENABLE();
 80020b4:	4b25      	ldr	r3, [pc, #148]	; (800214c <HAL_UART_MspInit+0x10c>)
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80020b6:	a906      	add	r1, sp, #24
    __HAL_RCC_USART2_CLK_ENABLE();
 80020b8:	69da      	ldr	r2, [r3, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80020ba:	4825      	ldr	r0, [pc, #148]	; (8002150 <HAL_UART_MspInit+0x110>)
    __HAL_RCC_USART2_CLK_ENABLE();
 80020bc:	f442 3200 	orr.w	r2, r2, #131072	; 0x20000
 80020c0:	61da      	str	r2, [r3, #28]
 80020c2:	69da      	ldr	r2, [r3, #28]
 80020c4:	f402 3200 	and.w	r2, r2, #131072	; 0x20000
 80020c8:	9202      	str	r2, [sp, #8]
 80020ca:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 80020cc:	699a      	ldr	r2, [r3, #24]
 80020ce:	f042 0204 	orr.w	r2, r2, #4
 80020d2:	619a      	str	r2, [r3, #24]
 80020d4:	699b      	ldr	r3, [r3, #24]
 80020d6:	f003 0304 	and.w	r3, r3, #4
 80020da:	9303      	str	r3, [sp, #12]
 80020dc:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = GPIO_PIN_2;
 80020de:	2304      	movs	r3, #4
 80020e0:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80020e2:	2302      	movs	r3, #2
 80020e4:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 80020e6:	2303      	movs	r3, #3
 80020e8:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80020ea:	f7fe fa8b 	bl	8000604 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_3;
 80020ee:	2308      	movs	r3, #8
 80020f0:	e7d2      	b.n	8002098 <HAL_UART_MspInit+0x58>
  else if(huart->Instance==USART3)
 80020f2:	4a19      	ldr	r2, [pc, #100]	; (8002158 <HAL_UART_MspInit+0x118>)
 80020f4:	4293      	cmp	r3, r2
 80020f6:	d1d8      	bne.n	80020aa <HAL_UART_MspInit+0x6a>
    __HAL_RCC_USART3_CLK_ENABLE();
 80020f8:	4b14      	ldr	r3, [pc, #80]	; (800214c <HAL_UART_MspInit+0x10c>)
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80020fa:	a906      	add	r1, sp, #24
    __HAL_RCC_USART3_CLK_ENABLE();
 80020fc:	69da      	ldr	r2, [r3, #28]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80020fe:	4817      	ldr	r0, [pc, #92]	; (800215c <HAL_UART_MspInit+0x11c>)
    __HAL_RCC_USART3_CLK_ENABLE();
 8002100:	f442 2280 	orr.w	r2, r2, #262144	; 0x40000
 8002104:	61da      	str	r2, [r3, #28]
 8002106:	69da      	ldr	r2, [r3, #28]
 8002108:	f402 2280 	and.w	r2, r2, #262144	; 0x40000
 800210c:	9204      	str	r2, [sp, #16]
 800210e:	9a04      	ldr	r2, [sp, #16]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8002110:	699a      	ldr	r2, [r3, #24]
 8002112:	f042 0208 	orr.w	r2, r2, #8
 8002116:	619a      	str	r2, [r3, #24]
 8002118:	699b      	ldr	r3, [r3, #24]
 800211a:	f003 0308 	and.w	r3, r3, #8
 800211e:	9305      	str	r3, [sp, #20]
 8002120:	9b05      	ldr	r3, [sp, #20]
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8002122:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8002126:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8002128:	2302      	movs	r3, #2
 800212a:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800212c:	2303      	movs	r3, #3
 800212e:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8002130:	f7fe fa68 	bl	8000604 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_11;
 8002134:	f44f 6300 	mov.w	r3, #2048	; 0x800
 8002138:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 800213a:	2300      	movs	r3, #0
 800213c:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 800213e:	2301      	movs	r3, #1
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8002140:	a906      	add	r1, sp, #24
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8002142:	9308      	str	r3, [sp, #32]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8002144:	4805      	ldr	r0, [pc, #20]	; (800215c <HAL_UART_MspInit+0x11c>)
 8002146:	e7ae      	b.n	80020a6 <HAL_UART_MspInit+0x66>
 8002148:	40013800 	.word	0x40013800
 800214c:	40021000 	.word	0x40021000
 8002150:	40010800 	.word	0x40010800
 8002154:	40004400 	.word	0x40004400
 8002158:	40004800 	.word	0x40004800
 800215c:	40010c00 	.word	0x40010c00

08002160 <NMI_Handler>:
 8002160:	4770      	bx	lr

08002162 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8002162:	e7fe      	b.n	8002162 <HardFault_Handler>

08002164 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8002164:	e7fe      	b.n	8002164 <MemManage_Handler>

08002166 <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8002166:	e7fe      	b.n	8002166 <BusFault_Handler>

08002168 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8002168:	e7fe      	b.n	8002168 <UsageFault_Handler>

0800216a <SVC_Handler>:
 800216a:	4770      	bx	lr

0800216c <DebugMon_Handler>:
 800216c:	4770      	bx	lr

0800216e <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 800216e:	4770      	bx	lr

08002170 <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 8002170:	f7fe b89a 	b.w	80002a8 <HAL_IncTick>

08002174 <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8002174:	4801      	ldr	r0, [pc, #4]	; (800217c <USART1_IRQHandler+0x8>)
 8002176:	f7ff b8d7 	b.w	8001328 <HAL_UART_IRQHandler>
 800217a:	bf00      	nop
 800217c:	200001f8 	.word	0x200001f8

08002180 <USART2_IRQHandler>:
void USART2_IRQHandler(void)
{
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 8002180:	4801      	ldr	r0, [pc, #4]	; (8002188 <USART2_IRQHandler+0x8>)
 8002182:	f7ff b8d1 	b.w	8001328 <HAL_UART_IRQHandler>
 8002186:	bf00      	nop
 8002188:	200002e0 	.word	0x200002e0

0800218c <USART3_IRQHandler>:
void USART3_IRQHandler(void)
{
  /* USER CODE BEGIN USART3_IRQn 0 */

  /* USER CODE END USART3_IRQn 0 */
  HAL_UART_IRQHandler(&huart3);
 800218c:	4801      	ldr	r0, [pc, #4]	; (8002194 <USART3_IRQHandler+0x8>)
 800218e:	f7ff b8cb 	b.w	8001328 <HAL_UART_IRQHandler>
 8002192:	bf00      	nop
 8002194:	200001b4 	.word	0x200001b4

08002198 <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8002198:	4801      	ldr	r0, [pc, #4]	; (80021a0 <TIM6_IRQHandler+0x8>)
 800219a:	f7fe bdd2 	b.w	8000d42 <HAL_TIM_IRQHandler>
 800219e:	bf00      	nop
 80021a0:	200002a0 	.word	0x200002a0

080021a4 <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 80021a4:	4b0f      	ldr	r3, [pc, #60]	; (80021e4 <SystemInit+0x40>)
 80021a6:	681a      	ldr	r2, [r3, #0]
 80021a8:	f042 0201 	orr.w	r2, r2, #1
 80021ac:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 80021ae:	6859      	ldr	r1, [r3, #4]
 80021b0:	4a0d      	ldr	r2, [pc, #52]	; (80021e8 <SystemInit+0x44>)
 80021b2:	400a      	ands	r2, r1
 80021b4:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 80021b6:	681a      	ldr	r2, [r3, #0]
 80021b8:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 80021bc:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 80021c0:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 80021c2:	681a      	ldr	r2, [r3, #0]
 80021c4:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 80021c8:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 80021ca:	685a      	ldr	r2, [r3, #4]
 80021cc:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 80021d0:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 80021d2:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 80021d6:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 80021d8:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
 80021dc:	4b03      	ldr	r3, [pc, #12]	; (80021ec <SystemInit+0x48>)
 80021de:	609a      	str	r2, [r3, #8]
 80021e0:	4770      	bx	lr
 80021e2:	bf00      	nop
 80021e4:	40021000 	.word	0x40021000
 80021e8:	f8ff0000 	.word	0xf8ff0000
 80021ec:	e000ed00 	.word	0xe000ed00

080021f0 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 80021f0:	2100      	movs	r1, #0
  b LoopCopyDataInit
 80021f2:	e003      	b.n	80021fc <LoopCopyDataInit>

080021f4 <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 80021f4:	4b0b      	ldr	r3, [pc, #44]	; (8002224 <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 80021f6:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 80021f8:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 80021fa:	3104      	adds	r1, #4

080021fc <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 80021fc:	480a      	ldr	r0, [pc, #40]	; (8002228 <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 80021fe:	4b0b      	ldr	r3, [pc, #44]	; (800222c <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8002200:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8002202:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8002204:	d3f6      	bcc.n	80021f4 <CopyDataInit>
  ldr r2, =_sbss
 8002206:	4a0a      	ldr	r2, [pc, #40]	; (8002230 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 8002208:	e002      	b.n	8002210 <LoopFillZerobss>

0800220a <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 800220a:	2300      	movs	r3, #0
  str r3, [r2], #4
 800220c:	f842 3b04 	str.w	r3, [r2], #4

08002210 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8002210:	4b08      	ldr	r3, [pc, #32]	; (8002234 <LoopFillZerobss+0x24>)
  cmp r2, r3
 8002212:	429a      	cmp	r2, r3
  bcc FillZerobss
 8002214:	d3f9      	bcc.n	800220a <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 8002216:	f7ff ffc5 	bl	80021a4 <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 800221a:	f000 f80f 	bl	800223c <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 800221e:	f7ff fcd7 	bl	8001bd0 <main>
  bx lr
 8002222:	4770      	bx	lr
  ldr r3, =_sidata
 8002224:	080035b0 	.word	0x080035b0
  ldr r0, =_sdata
 8002228:	20000000 	.word	0x20000000
  ldr r3, =_edata
 800222c:	20000074 	.word	0x20000074
  ldr r2, =_sbss
 8002230:	20000078 	.word	0x20000078
  ldr r3, = _ebss
 8002234:	20000324 	.word	0x20000324

08002238 <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 8002238:	e7fe      	b.n	8002238 <ADC1_2_IRQHandler>
	...

0800223c <__libc_init_array>:
 800223c:	b570      	push	{r4, r5, r6, lr}
 800223e:	2500      	movs	r5, #0
 8002240:	4e0c      	ldr	r6, [pc, #48]	; (8002274 <__libc_init_array+0x38>)
 8002242:	4c0d      	ldr	r4, [pc, #52]	; (8002278 <__libc_init_array+0x3c>)
 8002244:	1ba4      	subs	r4, r4, r6
 8002246:	10a4      	asrs	r4, r4, #2
 8002248:	42a5      	cmp	r5, r4
 800224a:	d109      	bne.n	8002260 <__libc_init_array+0x24>
 800224c:	f001 f8d4 	bl	80033f8 <_init>
 8002250:	2500      	movs	r5, #0
 8002252:	4e0a      	ldr	r6, [pc, #40]	; (800227c <__libc_init_array+0x40>)
 8002254:	4c0a      	ldr	r4, [pc, #40]	; (8002280 <__libc_init_array+0x44>)
 8002256:	1ba4      	subs	r4, r4, r6
 8002258:	10a4      	asrs	r4, r4, #2
 800225a:	42a5      	cmp	r5, r4
 800225c:	d105      	bne.n	800226a <__libc_init_array+0x2e>
 800225e:	bd70      	pop	{r4, r5, r6, pc}
 8002260:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8002264:	4798      	blx	r3
 8002266:	3501      	adds	r5, #1
 8002268:	e7ee      	b.n	8002248 <__libc_init_array+0xc>
 800226a:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 800226e:	4798      	blx	r3
 8002270:	3501      	adds	r5, #1
 8002272:	e7f2      	b.n	800225a <__libc_init_array+0x1e>
 8002274:	080035a8 	.word	0x080035a8
 8002278:	080035a8 	.word	0x080035a8
 800227c:	080035a8 	.word	0x080035a8
 8002280:	080035ac 	.word	0x080035ac

08002284 <memcpy>:
 8002284:	b510      	push	{r4, lr}
 8002286:	1e43      	subs	r3, r0, #1
 8002288:	440a      	add	r2, r1
 800228a:	4291      	cmp	r1, r2
 800228c:	d100      	bne.n	8002290 <memcpy+0xc>
 800228e:	bd10      	pop	{r4, pc}
 8002290:	f811 4b01 	ldrb.w	r4, [r1], #1
 8002294:	f803 4f01 	strb.w	r4, [r3, #1]!
 8002298:	e7f7      	b.n	800228a <memcpy+0x6>

0800229a <memset>:
 800229a:	4603      	mov	r3, r0
 800229c:	4402      	add	r2, r0
 800229e:	4293      	cmp	r3, r2
 80022a0:	d100      	bne.n	80022a4 <memset+0xa>
 80022a2:	4770      	bx	lr
 80022a4:	f803 1b01 	strb.w	r1, [r3], #1
 80022a8:	e7f9      	b.n	800229e <memset+0x4>
	...

080022ac <iprintf>:
 80022ac:	b40f      	push	{r0, r1, r2, r3}
 80022ae:	4b0a      	ldr	r3, [pc, #40]	; (80022d8 <iprintf+0x2c>)
 80022b0:	b513      	push	{r0, r1, r4, lr}
 80022b2:	681c      	ldr	r4, [r3, #0]
 80022b4:	b124      	cbz	r4, 80022c0 <iprintf+0x14>
 80022b6:	69a3      	ldr	r3, [r4, #24]
 80022b8:	b913      	cbnz	r3, 80022c0 <iprintf+0x14>
 80022ba:	4620      	mov	r0, r4
 80022bc:	f000 faee 	bl	800289c <__sinit>
 80022c0:	ab05      	add	r3, sp, #20
 80022c2:	9a04      	ldr	r2, [sp, #16]
 80022c4:	68a1      	ldr	r1, [r4, #8]
 80022c6:	4620      	mov	r0, r4
 80022c8:	9301      	str	r3, [sp, #4]
 80022ca:	f000 fcaf 	bl	8002c2c <_vfiprintf_r>
 80022ce:	b002      	add	sp, #8
 80022d0:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 80022d4:	b004      	add	sp, #16
 80022d6:	4770      	bx	lr
 80022d8:	20000010 	.word	0x20000010

080022dc <putchar>:
 80022dc:	b538      	push	{r3, r4, r5, lr}
 80022de:	4b08      	ldr	r3, [pc, #32]	; (8002300 <putchar+0x24>)
 80022e0:	4605      	mov	r5, r0
 80022e2:	681c      	ldr	r4, [r3, #0]
 80022e4:	b124      	cbz	r4, 80022f0 <putchar+0x14>
 80022e6:	69a3      	ldr	r3, [r4, #24]
 80022e8:	b913      	cbnz	r3, 80022f0 <putchar+0x14>
 80022ea:	4620      	mov	r0, r4
 80022ec:	f000 fad6 	bl	800289c <__sinit>
 80022f0:	68a2      	ldr	r2, [r4, #8]
 80022f2:	4629      	mov	r1, r5
 80022f4:	4620      	mov	r0, r4
 80022f6:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 80022fa:	f000 bf45 	b.w	8003188 <_putc_r>
 80022fe:	bf00      	nop
 8002300:	20000010 	.word	0x20000010

08002304 <_puts_r>:
 8002304:	b570      	push	{r4, r5, r6, lr}
 8002306:	460e      	mov	r6, r1
 8002308:	4605      	mov	r5, r0
 800230a:	b118      	cbz	r0, 8002314 <_puts_r+0x10>
 800230c:	6983      	ldr	r3, [r0, #24]
 800230e:	b90b      	cbnz	r3, 8002314 <_puts_r+0x10>
 8002310:	f000 fac4 	bl	800289c <__sinit>
 8002314:	69ab      	ldr	r3, [r5, #24]
 8002316:	68ac      	ldr	r4, [r5, #8]
 8002318:	b913      	cbnz	r3, 8002320 <_puts_r+0x1c>
 800231a:	4628      	mov	r0, r5
 800231c:	f000 fabe 	bl	800289c <__sinit>
 8002320:	4b23      	ldr	r3, [pc, #140]	; (80023b0 <_puts_r+0xac>)
 8002322:	429c      	cmp	r4, r3
 8002324:	d117      	bne.n	8002356 <_puts_r+0x52>
 8002326:	686c      	ldr	r4, [r5, #4]
 8002328:	89a3      	ldrh	r3, [r4, #12]
 800232a:	071b      	lsls	r3, r3, #28
 800232c:	d51d      	bpl.n	800236a <_puts_r+0x66>
 800232e:	6923      	ldr	r3, [r4, #16]
 8002330:	b1db      	cbz	r3, 800236a <_puts_r+0x66>
 8002332:	3e01      	subs	r6, #1
 8002334:	68a3      	ldr	r3, [r4, #8]
 8002336:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 800233a:	3b01      	subs	r3, #1
 800233c:	60a3      	str	r3, [r4, #8]
 800233e:	b9e9      	cbnz	r1, 800237c <_puts_r+0x78>
 8002340:	2b00      	cmp	r3, #0
 8002342:	da2e      	bge.n	80023a2 <_puts_r+0x9e>
 8002344:	4622      	mov	r2, r4
 8002346:	210a      	movs	r1, #10
 8002348:	4628      	mov	r0, r5
 800234a:	f000 f8f5 	bl	8002538 <__swbuf_r>
 800234e:	3001      	adds	r0, #1
 8002350:	d011      	beq.n	8002376 <_puts_r+0x72>
 8002352:	200a      	movs	r0, #10
 8002354:	bd70      	pop	{r4, r5, r6, pc}
 8002356:	4b17      	ldr	r3, [pc, #92]	; (80023b4 <_puts_r+0xb0>)
 8002358:	429c      	cmp	r4, r3
 800235a:	d101      	bne.n	8002360 <_puts_r+0x5c>
 800235c:	68ac      	ldr	r4, [r5, #8]
 800235e:	e7e3      	b.n	8002328 <_puts_r+0x24>
 8002360:	4b15      	ldr	r3, [pc, #84]	; (80023b8 <_puts_r+0xb4>)
 8002362:	429c      	cmp	r4, r3
 8002364:	bf08      	it	eq
 8002366:	68ec      	ldreq	r4, [r5, #12]
 8002368:	e7de      	b.n	8002328 <_puts_r+0x24>
 800236a:	4621      	mov	r1, r4
 800236c:	4628      	mov	r0, r5
 800236e:	f000 f935 	bl	80025dc <__swsetup_r>
 8002372:	2800      	cmp	r0, #0
 8002374:	d0dd      	beq.n	8002332 <_puts_r+0x2e>
 8002376:	f04f 30ff 	mov.w	r0, #4294967295
 800237a:	bd70      	pop	{r4, r5, r6, pc}
 800237c:	2b00      	cmp	r3, #0
 800237e:	da04      	bge.n	800238a <_puts_r+0x86>
 8002380:	69a2      	ldr	r2, [r4, #24]
 8002382:	4293      	cmp	r3, r2
 8002384:	db06      	blt.n	8002394 <_puts_r+0x90>
 8002386:	290a      	cmp	r1, #10
 8002388:	d004      	beq.n	8002394 <_puts_r+0x90>
 800238a:	6823      	ldr	r3, [r4, #0]
 800238c:	1c5a      	adds	r2, r3, #1
 800238e:	6022      	str	r2, [r4, #0]
 8002390:	7019      	strb	r1, [r3, #0]
 8002392:	e7cf      	b.n	8002334 <_puts_r+0x30>
 8002394:	4622      	mov	r2, r4
 8002396:	4628      	mov	r0, r5
 8002398:	f000 f8ce 	bl	8002538 <__swbuf_r>
 800239c:	3001      	adds	r0, #1
 800239e:	d1c9      	bne.n	8002334 <_puts_r+0x30>
 80023a0:	e7e9      	b.n	8002376 <_puts_r+0x72>
 80023a2:	200a      	movs	r0, #10
 80023a4:	6823      	ldr	r3, [r4, #0]
 80023a6:	1c5a      	adds	r2, r3, #1
 80023a8:	6022      	str	r2, [r4, #0]
 80023aa:	7018      	strb	r0, [r3, #0]
 80023ac:	bd70      	pop	{r4, r5, r6, pc}
 80023ae:	bf00      	nop
 80023b0:	08003534 	.word	0x08003534
 80023b4:	08003554 	.word	0x08003554
 80023b8:	08003514 	.word	0x08003514

080023bc <puts>:
 80023bc:	4b02      	ldr	r3, [pc, #8]	; (80023c8 <puts+0xc>)
 80023be:	4601      	mov	r1, r0
 80023c0:	6818      	ldr	r0, [r3, #0]
 80023c2:	f7ff bf9f 	b.w	8002304 <_puts_r>
 80023c6:	bf00      	nop
 80023c8:	20000010 	.word	0x20000010

080023cc <setbuf>:
 80023cc:	2900      	cmp	r1, #0
 80023ce:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80023d2:	bf0c      	ite	eq
 80023d4:	2202      	moveq	r2, #2
 80023d6:	2200      	movne	r2, #0
 80023d8:	f000 b800 	b.w	80023dc <setvbuf>

080023dc <setvbuf>:
 80023dc:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 80023e0:	461d      	mov	r5, r3
 80023e2:	4b51      	ldr	r3, [pc, #324]	; (8002528 <setvbuf+0x14c>)
 80023e4:	4604      	mov	r4, r0
 80023e6:	681e      	ldr	r6, [r3, #0]
 80023e8:	460f      	mov	r7, r1
 80023ea:	4690      	mov	r8, r2
 80023ec:	b126      	cbz	r6, 80023f8 <setvbuf+0x1c>
 80023ee:	69b3      	ldr	r3, [r6, #24]
 80023f0:	b913      	cbnz	r3, 80023f8 <setvbuf+0x1c>
 80023f2:	4630      	mov	r0, r6
 80023f4:	f000 fa52 	bl	800289c <__sinit>
 80023f8:	4b4c      	ldr	r3, [pc, #304]	; (800252c <setvbuf+0x150>)
 80023fa:	429c      	cmp	r4, r3
 80023fc:	d152      	bne.n	80024a4 <setvbuf+0xc8>
 80023fe:	6874      	ldr	r4, [r6, #4]
 8002400:	f1b8 0f02 	cmp.w	r8, #2
 8002404:	d006      	beq.n	8002414 <setvbuf+0x38>
 8002406:	f1b8 0f01 	cmp.w	r8, #1
 800240a:	f200 8089 	bhi.w	8002520 <setvbuf+0x144>
 800240e:	2d00      	cmp	r5, #0
 8002410:	f2c0 8086 	blt.w	8002520 <setvbuf+0x144>
 8002414:	4621      	mov	r1, r4
 8002416:	4630      	mov	r0, r6
 8002418:	f000 f9d6 	bl	80027c8 <_fflush_r>
 800241c:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800241e:	b141      	cbz	r1, 8002432 <setvbuf+0x56>
 8002420:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8002424:	4299      	cmp	r1, r3
 8002426:	d002      	beq.n	800242e <setvbuf+0x52>
 8002428:	4630      	mov	r0, r6
 800242a:	f000 fb2d 	bl	8002a88 <_free_r>
 800242e:	2300      	movs	r3, #0
 8002430:	6363      	str	r3, [r4, #52]	; 0x34
 8002432:	2300      	movs	r3, #0
 8002434:	61a3      	str	r3, [r4, #24]
 8002436:	6063      	str	r3, [r4, #4]
 8002438:	89a3      	ldrh	r3, [r4, #12]
 800243a:	061b      	lsls	r3, r3, #24
 800243c:	d503      	bpl.n	8002446 <setvbuf+0x6a>
 800243e:	6921      	ldr	r1, [r4, #16]
 8002440:	4630      	mov	r0, r6
 8002442:	f000 fb21 	bl	8002a88 <_free_r>
 8002446:	89a3      	ldrh	r3, [r4, #12]
 8002448:	f1b8 0f02 	cmp.w	r8, #2
 800244c:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 8002450:	f023 0303 	bic.w	r3, r3, #3
 8002454:	81a3      	strh	r3, [r4, #12]
 8002456:	d05d      	beq.n	8002514 <setvbuf+0x138>
 8002458:	ab01      	add	r3, sp, #4
 800245a:	466a      	mov	r2, sp
 800245c:	4621      	mov	r1, r4
 800245e:	4630      	mov	r0, r6
 8002460:	f000 faa6 	bl	80029b0 <__swhatbuf_r>
 8002464:	89a3      	ldrh	r3, [r4, #12]
 8002466:	4318      	orrs	r0, r3
 8002468:	81a0      	strh	r0, [r4, #12]
 800246a:	bb2d      	cbnz	r5, 80024b8 <setvbuf+0xdc>
 800246c:	9d00      	ldr	r5, [sp, #0]
 800246e:	4628      	mov	r0, r5
 8002470:	f000 fb02 	bl	8002a78 <malloc>
 8002474:	4607      	mov	r7, r0
 8002476:	2800      	cmp	r0, #0
 8002478:	d14e      	bne.n	8002518 <setvbuf+0x13c>
 800247a:	f8dd 9000 	ldr.w	r9, [sp]
 800247e:	45a9      	cmp	r9, r5
 8002480:	d13c      	bne.n	80024fc <setvbuf+0x120>
 8002482:	f04f 30ff 	mov.w	r0, #4294967295
 8002486:	89a3      	ldrh	r3, [r4, #12]
 8002488:	f043 0302 	orr.w	r3, r3, #2
 800248c:	81a3      	strh	r3, [r4, #12]
 800248e:	2300      	movs	r3, #0
 8002490:	60a3      	str	r3, [r4, #8]
 8002492:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8002496:	6023      	str	r3, [r4, #0]
 8002498:	6123      	str	r3, [r4, #16]
 800249a:	2301      	movs	r3, #1
 800249c:	6163      	str	r3, [r4, #20]
 800249e:	b003      	add	sp, #12
 80024a0:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 80024a4:	4b22      	ldr	r3, [pc, #136]	; (8002530 <setvbuf+0x154>)
 80024a6:	429c      	cmp	r4, r3
 80024a8:	d101      	bne.n	80024ae <setvbuf+0xd2>
 80024aa:	68b4      	ldr	r4, [r6, #8]
 80024ac:	e7a8      	b.n	8002400 <setvbuf+0x24>
 80024ae:	4b21      	ldr	r3, [pc, #132]	; (8002534 <setvbuf+0x158>)
 80024b0:	429c      	cmp	r4, r3
 80024b2:	bf08      	it	eq
 80024b4:	68f4      	ldreq	r4, [r6, #12]
 80024b6:	e7a3      	b.n	8002400 <setvbuf+0x24>
 80024b8:	2f00      	cmp	r7, #0
 80024ba:	d0d8      	beq.n	800246e <setvbuf+0x92>
 80024bc:	69b3      	ldr	r3, [r6, #24]
 80024be:	b913      	cbnz	r3, 80024c6 <setvbuf+0xea>
 80024c0:	4630      	mov	r0, r6
 80024c2:	f000 f9eb 	bl	800289c <__sinit>
 80024c6:	f1b8 0f01 	cmp.w	r8, #1
 80024ca:	bf08      	it	eq
 80024cc:	89a3      	ldrheq	r3, [r4, #12]
 80024ce:	6027      	str	r7, [r4, #0]
 80024d0:	bf04      	itt	eq
 80024d2:	f043 0301 	orreq.w	r3, r3, #1
 80024d6:	81a3      	strheq	r3, [r4, #12]
 80024d8:	89a3      	ldrh	r3, [r4, #12]
 80024da:	6127      	str	r7, [r4, #16]
 80024dc:	f013 0008 	ands.w	r0, r3, #8
 80024e0:	6165      	str	r5, [r4, #20]
 80024e2:	d01b      	beq.n	800251c <setvbuf+0x140>
 80024e4:	f013 0001 	ands.w	r0, r3, #1
 80024e8:	f04f 0300 	mov.w	r3, #0
 80024ec:	bf1f      	itttt	ne
 80024ee:	426d      	negne	r5, r5
 80024f0:	60a3      	strne	r3, [r4, #8]
 80024f2:	61a5      	strne	r5, [r4, #24]
 80024f4:	4618      	movne	r0, r3
 80024f6:	bf08      	it	eq
 80024f8:	60a5      	streq	r5, [r4, #8]
 80024fa:	e7d0      	b.n	800249e <setvbuf+0xc2>
 80024fc:	4648      	mov	r0, r9
 80024fe:	f000 fabb 	bl	8002a78 <malloc>
 8002502:	4607      	mov	r7, r0
 8002504:	2800      	cmp	r0, #0
 8002506:	d0bc      	beq.n	8002482 <setvbuf+0xa6>
 8002508:	89a3      	ldrh	r3, [r4, #12]
 800250a:	464d      	mov	r5, r9
 800250c:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8002510:	81a3      	strh	r3, [r4, #12]
 8002512:	e7d3      	b.n	80024bc <setvbuf+0xe0>
 8002514:	2000      	movs	r0, #0
 8002516:	e7b6      	b.n	8002486 <setvbuf+0xaa>
 8002518:	46a9      	mov	r9, r5
 800251a:	e7f5      	b.n	8002508 <setvbuf+0x12c>
 800251c:	60a0      	str	r0, [r4, #8]
 800251e:	e7be      	b.n	800249e <setvbuf+0xc2>
 8002520:	f04f 30ff 	mov.w	r0, #4294967295
 8002524:	e7bb      	b.n	800249e <setvbuf+0xc2>
 8002526:	bf00      	nop
 8002528:	20000010 	.word	0x20000010
 800252c:	08003534 	.word	0x08003534
 8002530:	08003554 	.word	0x08003554
 8002534:	08003514 	.word	0x08003514

08002538 <__swbuf_r>:
 8002538:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800253a:	460e      	mov	r6, r1
 800253c:	4614      	mov	r4, r2
 800253e:	4605      	mov	r5, r0
 8002540:	b118      	cbz	r0, 800254a <__swbuf_r+0x12>
 8002542:	6983      	ldr	r3, [r0, #24]
 8002544:	b90b      	cbnz	r3, 800254a <__swbuf_r+0x12>
 8002546:	f000 f9a9 	bl	800289c <__sinit>
 800254a:	4b21      	ldr	r3, [pc, #132]	; (80025d0 <__swbuf_r+0x98>)
 800254c:	429c      	cmp	r4, r3
 800254e:	d12a      	bne.n	80025a6 <__swbuf_r+0x6e>
 8002550:	686c      	ldr	r4, [r5, #4]
 8002552:	69a3      	ldr	r3, [r4, #24]
 8002554:	60a3      	str	r3, [r4, #8]
 8002556:	89a3      	ldrh	r3, [r4, #12]
 8002558:	071a      	lsls	r2, r3, #28
 800255a:	d52e      	bpl.n	80025ba <__swbuf_r+0x82>
 800255c:	6923      	ldr	r3, [r4, #16]
 800255e:	b363      	cbz	r3, 80025ba <__swbuf_r+0x82>
 8002560:	6923      	ldr	r3, [r4, #16]
 8002562:	6820      	ldr	r0, [r4, #0]
 8002564:	b2f6      	uxtb	r6, r6
 8002566:	1ac0      	subs	r0, r0, r3
 8002568:	6963      	ldr	r3, [r4, #20]
 800256a:	4637      	mov	r7, r6
 800256c:	4298      	cmp	r0, r3
 800256e:	db04      	blt.n	800257a <__swbuf_r+0x42>
 8002570:	4621      	mov	r1, r4
 8002572:	4628      	mov	r0, r5
 8002574:	f000 f928 	bl	80027c8 <_fflush_r>
 8002578:	bb28      	cbnz	r0, 80025c6 <__swbuf_r+0x8e>
 800257a:	68a3      	ldr	r3, [r4, #8]
 800257c:	3001      	adds	r0, #1
 800257e:	3b01      	subs	r3, #1
 8002580:	60a3      	str	r3, [r4, #8]
 8002582:	6823      	ldr	r3, [r4, #0]
 8002584:	1c5a      	adds	r2, r3, #1
 8002586:	6022      	str	r2, [r4, #0]
 8002588:	701e      	strb	r6, [r3, #0]
 800258a:	6963      	ldr	r3, [r4, #20]
 800258c:	4298      	cmp	r0, r3
 800258e:	d004      	beq.n	800259a <__swbuf_r+0x62>
 8002590:	89a3      	ldrh	r3, [r4, #12]
 8002592:	07db      	lsls	r3, r3, #31
 8002594:	d519      	bpl.n	80025ca <__swbuf_r+0x92>
 8002596:	2e0a      	cmp	r6, #10
 8002598:	d117      	bne.n	80025ca <__swbuf_r+0x92>
 800259a:	4621      	mov	r1, r4
 800259c:	4628      	mov	r0, r5
 800259e:	f000 f913 	bl	80027c8 <_fflush_r>
 80025a2:	b190      	cbz	r0, 80025ca <__swbuf_r+0x92>
 80025a4:	e00f      	b.n	80025c6 <__swbuf_r+0x8e>
 80025a6:	4b0b      	ldr	r3, [pc, #44]	; (80025d4 <__swbuf_r+0x9c>)
 80025a8:	429c      	cmp	r4, r3
 80025aa:	d101      	bne.n	80025b0 <__swbuf_r+0x78>
 80025ac:	68ac      	ldr	r4, [r5, #8]
 80025ae:	e7d0      	b.n	8002552 <__swbuf_r+0x1a>
 80025b0:	4b09      	ldr	r3, [pc, #36]	; (80025d8 <__swbuf_r+0xa0>)
 80025b2:	429c      	cmp	r4, r3
 80025b4:	bf08      	it	eq
 80025b6:	68ec      	ldreq	r4, [r5, #12]
 80025b8:	e7cb      	b.n	8002552 <__swbuf_r+0x1a>
 80025ba:	4621      	mov	r1, r4
 80025bc:	4628      	mov	r0, r5
 80025be:	f000 f80d 	bl	80025dc <__swsetup_r>
 80025c2:	2800      	cmp	r0, #0
 80025c4:	d0cc      	beq.n	8002560 <__swbuf_r+0x28>
 80025c6:	f04f 37ff 	mov.w	r7, #4294967295
 80025ca:	4638      	mov	r0, r7
 80025cc:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 80025ce:	bf00      	nop
 80025d0:	08003534 	.word	0x08003534
 80025d4:	08003554 	.word	0x08003554
 80025d8:	08003514 	.word	0x08003514

080025dc <__swsetup_r>:
 80025dc:	4b32      	ldr	r3, [pc, #200]	; (80026a8 <__swsetup_r+0xcc>)
 80025de:	b570      	push	{r4, r5, r6, lr}
 80025e0:	681d      	ldr	r5, [r3, #0]
 80025e2:	4606      	mov	r6, r0
 80025e4:	460c      	mov	r4, r1
 80025e6:	b125      	cbz	r5, 80025f2 <__swsetup_r+0x16>
 80025e8:	69ab      	ldr	r3, [r5, #24]
 80025ea:	b913      	cbnz	r3, 80025f2 <__swsetup_r+0x16>
 80025ec:	4628      	mov	r0, r5
 80025ee:	f000 f955 	bl	800289c <__sinit>
 80025f2:	4b2e      	ldr	r3, [pc, #184]	; (80026ac <__swsetup_r+0xd0>)
 80025f4:	429c      	cmp	r4, r3
 80025f6:	d10f      	bne.n	8002618 <__swsetup_r+0x3c>
 80025f8:	686c      	ldr	r4, [r5, #4]
 80025fa:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80025fe:	b29a      	uxth	r2, r3
 8002600:	0715      	lsls	r5, r2, #28
 8002602:	d42c      	bmi.n	800265e <__swsetup_r+0x82>
 8002604:	06d0      	lsls	r0, r2, #27
 8002606:	d411      	bmi.n	800262c <__swsetup_r+0x50>
 8002608:	2209      	movs	r2, #9
 800260a:	6032      	str	r2, [r6, #0]
 800260c:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8002610:	81a3      	strh	r3, [r4, #12]
 8002612:	f04f 30ff 	mov.w	r0, #4294967295
 8002616:	bd70      	pop	{r4, r5, r6, pc}
 8002618:	4b25      	ldr	r3, [pc, #148]	; (80026b0 <__swsetup_r+0xd4>)
 800261a:	429c      	cmp	r4, r3
 800261c:	d101      	bne.n	8002622 <__swsetup_r+0x46>
 800261e:	68ac      	ldr	r4, [r5, #8]
 8002620:	e7eb      	b.n	80025fa <__swsetup_r+0x1e>
 8002622:	4b24      	ldr	r3, [pc, #144]	; (80026b4 <__swsetup_r+0xd8>)
 8002624:	429c      	cmp	r4, r3
 8002626:	bf08      	it	eq
 8002628:	68ec      	ldreq	r4, [r5, #12]
 800262a:	e7e6      	b.n	80025fa <__swsetup_r+0x1e>
 800262c:	0751      	lsls	r1, r2, #29
 800262e:	d512      	bpl.n	8002656 <__swsetup_r+0x7a>
 8002630:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8002632:	b141      	cbz	r1, 8002646 <__swsetup_r+0x6a>
 8002634:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8002638:	4299      	cmp	r1, r3
 800263a:	d002      	beq.n	8002642 <__swsetup_r+0x66>
 800263c:	4630      	mov	r0, r6
 800263e:	f000 fa23 	bl	8002a88 <_free_r>
 8002642:	2300      	movs	r3, #0
 8002644:	6363      	str	r3, [r4, #52]	; 0x34
 8002646:	89a3      	ldrh	r3, [r4, #12]
 8002648:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 800264c:	81a3      	strh	r3, [r4, #12]
 800264e:	2300      	movs	r3, #0
 8002650:	6063      	str	r3, [r4, #4]
 8002652:	6923      	ldr	r3, [r4, #16]
 8002654:	6023      	str	r3, [r4, #0]
 8002656:	89a3      	ldrh	r3, [r4, #12]
 8002658:	f043 0308 	orr.w	r3, r3, #8
 800265c:	81a3      	strh	r3, [r4, #12]
 800265e:	6923      	ldr	r3, [r4, #16]
 8002660:	b94b      	cbnz	r3, 8002676 <__swsetup_r+0x9a>
 8002662:	89a3      	ldrh	r3, [r4, #12]
 8002664:	f403 7320 	and.w	r3, r3, #640	; 0x280
 8002668:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 800266c:	d003      	beq.n	8002676 <__swsetup_r+0x9a>
 800266e:	4621      	mov	r1, r4
 8002670:	4630      	mov	r0, r6
 8002672:	f000 f9c1 	bl	80029f8 <__smakebuf_r>
 8002676:	89a2      	ldrh	r2, [r4, #12]
 8002678:	f012 0301 	ands.w	r3, r2, #1
 800267c:	d00c      	beq.n	8002698 <__swsetup_r+0xbc>
 800267e:	2300      	movs	r3, #0
 8002680:	60a3      	str	r3, [r4, #8]
 8002682:	6963      	ldr	r3, [r4, #20]
 8002684:	425b      	negs	r3, r3
 8002686:	61a3      	str	r3, [r4, #24]
 8002688:	6923      	ldr	r3, [r4, #16]
 800268a:	b953      	cbnz	r3, 80026a2 <__swsetup_r+0xc6>
 800268c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002690:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 8002694:	d1ba      	bne.n	800260c <__swsetup_r+0x30>
 8002696:	bd70      	pop	{r4, r5, r6, pc}
 8002698:	0792      	lsls	r2, r2, #30
 800269a:	bf58      	it	pl
 800269c:	6963      	ldrpl	r3, [r4, #20]
 800269e:	60a3      	str	r3, [r4, #8]
 80026a0:	e7f2      	b.n	8002688 <__swsetup_r+0xac>
 80026a2:	2000      	movs	r0, #0
 80026a4:	e7f7      	b.n	8002696 <__swsetup_r+0xba>
 80026a6:	bf00      	nop
 80026a8:	20000010 	.word	0x20000010
 80026ac:	08003534 	.word	0x08003534
 80026b0:	08003554 	.word	0x08003554
 80026b4:	08003514 	.word	0x08003514

080026b8 <__sflush_r>:
 80026b8:	898a      	ldrh	r2, [r1, #12]
 80026ba:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 80026be:	4605      	mov	r5, r0
 80026c0:	0710      	lsls	r0, r2, #28
 80026c2:	460c      	mov	r4, r1
 80026c4:	d45a      	bmi.n	800277c <__sflush_r+0xc4>
 80026c6:	684b      	ldr	r3, [r1, #4]
 80026c8:	2b00      	cmp	r3, #0
 80026ca:	dc05      	bgt.n	80026d8 <__sflush_r+0x20>
 80026cc:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 80026ce:	2b00      	cmp	r3, #0
 80026d0:	dc02      	bgt.n	80026d8 <__sflush_r+0x20>
 80026d2:	2000      	movs	r0, #0
 80026d4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80026d8:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 80026da:	2e00      	cmp	r6, #0
 80026dc:	d0f9      	beq.n	80026d2 <__sflush_r+0x1a>
 80026de:	2300      	movs	r3, #0
 80026e0:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 80026e4:	682f      	ldr	r7, [r5, #0]
 80026e6:	602b      	str	r3, [r5, #0]
 80026e8:	d033      	beq.n	8002752 <__sflush_r+0x9a>
 80026ea:	6d60      	ldr	r0, [r4, #84]	; 0x54
 80026ec:	89a3      	ldrh	r3, [r4, #12]
 80026ee:	075a      	lsls	r2, r3, #29
 80026f0:	d505      	bpl.n	80026fe <__sflush_r+0x46>
 80026f2:	6863      	ldr	r3, [r4, #4]
 80026f4:	1ac0      	subs	r0, r0, r3
 80026f6:	6b63      	ldr	r3, [r4, #52]	; 0x34
 80026f8:	b10b      	cbz	r3, 80026fe <__sflush_r+0x46>
 80026fa:	6c23      	ldr	r3, [r4, #64]	; 0x40
 80026fc:	1ac0      	subs	r0, r0, r3
 80026fe:	2300      	movs	r3, #0
 8002700:	4602      	mov	r2, r0
 8002702:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8002704:	6a21      	ldr	r1, [r4, #32]
 8002706:	4628      	mov	r0, r5
 8002708:	47b0      	blx	r6
 800270a:	1c43      	adds	r3, r0, #1
 800270c:	89a3      	ldrh	r3, [r4, #12]
 800270e:	d106      	bne.n	800271e <__sflush_r+0x66>
 8002710:	6829      	ldr	r1, [r5, #0]
 8002712:	291d      	cmp	r1, #29
 8002714:	d84b      	bhi.n	80027ae <__sflush_r+0xf6>
 8002716:	4a2b      	ldr	r2, [pc, #172]	; (80027c4 <__sflush_r+0x10c>)
 8002718:	40ca      	lsrs	r2, r1
 800271a:	07d6      	lsls	r6, r2, #31
 800271c:	d547      	bpl.n	80027ae <__sflush_r+0xf6>
 800271e:	2200      	movs	r2, #0
 8002720:	6062      	str	r2, [r4, #4]
 8002722:	6922      	ldr	r2, [r4, #16]
 8002724:	04d9      	lsls	r1, r3, #19
 8002726:	6022      	str	r2, [r4, #0]
 8002728:	d504      	bpl.n	8002734 <__sflush_r+0x7c>
 800272a:	1c42      	adds	r2, r0, #1
 800272c:	d101      	bne.n	8002732 <__sflush_r+0x7a>
 800272e:	682b      	ldr	r3, [r5, #0]
 8002730:	b903      	cbnz	r3, 8002734 <__sflush_r+0x7c>
 8002732:	6560      	str	r0, [r4, #84]	; 0x54
 8002734:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8002736:	602f      	str	r7, [r5, #0]
 8002738:	2900      	cmp	r1, #0
 800273a:	d0ca      	beq.n	80026d2 <__sflush_r+0x1a>
 800273c:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8002740:	4299      	cmp	r1, r3
 8002742:	d002      	beq.n	800274a <__sflush_r+0x92>
 8002744:	4628      	mov	r0, r5
 8002746:	f000 f99f 	bl	8002a88 <_free_r>
 800274a:	2000      	movs	r0, #0
 800274c:	6360      	str	r0, [r4, #52]	; 0x34
 800274e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8002752:	6a21      	ldr	r1, [r4, #32]
 8002754:	2301      	movs	r3, #1
 8002756:	4628      	mov	r0, r5
 8002758:	47b0      	blx	r6
 800275a:	1c41      	adds	r1, r0, #1
 800275c:	d1c6      	bne.n	80026ec <__sflush_r+0x34>
 800275e:	682b      	ldr	r3, [r5, #0]
 8002760:	2b00      	cmp	r3, #0
 8002762:	d0c3      	beq.n	80026ec <__sflush_r+0x34>
 8002764:	2b1d      	cmp	r3, #29
 8002766:	d001      	beq.n	800276c <__sflush_r+0xb4>
 8002768:	2b16      	cmp	r3, #22
 800276a:	d101      	bne.n	8002770 <__sflush_r+0xb8>
 800276c:	602f      	str	r7, [r5, #0]
 800276e:	e7b0      	b.n	80026d2 <__sflush_r+0x1a>
 8002770:	89a3      	ldrh	r3, [r4, #12]
 8002772:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8002776:	81a3      	strh	r3, [r4, #12]
 8002778:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800277c:	690f      	ldr	r7, [r1, #16]
 800277e:	2f00      	cmp	r7, #0
 8002780:	d0a7      	beq.n	80026d2 <__sflush_r+0x1a>
 8002782:	0793      	lsls	r3, r2, #30
 8002784:	bf18      	it	ne
 8002786:	2300      	movne	r3, #0
 8002788:	680e      	ldr	r6, [r1, #0]
 800278a:	bf08      	it	eq
 800278c:	694b      	ldreq	r3, [r1, #20]
 800278e:	eba6 0807 	sub.w	r8, r6, r7
 8002792:	600f      	str	r7, [r1, #0]
 8002794:	608b      	str	r3, [r1, #8]
 8002796:	f1b8 0f00 	cmp.w	r8, #0
 800279a:	dd9a      	ble.n	80026d2 <__sflush_r+0x1a>
 800279c:	4643      	mov	r3, r8
 800279e:	463a      	mov	r2, r7
 80027a0:	6a21      	ldr	r1, [r4, #32]
 80027a2:	4628      	mov	r0, r5
 80027a4:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 80027a6:	47b0      	blx	r6
 80027a8:	2800      	cmp	r0, #0
 80027aa:	dc07      	bgt.n	80027bc <__sflush_r+0x104>
 80027ac:	89a3      	ldrh	r3, [r4, #12]
 80027ae:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 80027b2:	81a3      	strh	r3, [r4, #12]
 80027b4:	f04f 30ff 	mov.w	r0, #4294967295
 80027b8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80027bc:	4407      	add	r7, r0
 80027be:	eba8 0800 	sub.w	r8, r8, r0
 80027c2:	e7e8      	b.n	8002796 <__sflush_r+0xde>
 80027c4:	20400001 	.word	0x20400001

080027c8 <_fflush_r>:
 80027c8:	b538      	push	{r3, r4, r5, lr}
 80027ca:	690b      	ldr	r3, [r1, #16]
 80027cc:	4605      	mov	r5, r0
 80027ce:	460c      	mov	r4, r1
 80027d0:	b1db      	cbz	r3, 800280a <_fflush_r+0x42>
 80027d2:	b118      	cbz	r0, 80027dc <_fflush_r+0x14>
 80027d4:	6983      	ldr	r3, [r0, #24]
 80027d6:	b90b      	cbnz	r3, 80027dc <_fflush_r+0x14>
 80027d8:	f000 f860 	bl	800289c <__sinit>
 80027dc:	4b0c      	ldr	r3, [pc, #48]	; (8002810 <_fflush_r+0x48>)
 80027de:	429c      	cmp	r4, r3
 80027e0:	d109      	bne.n	80027f6 <_fflush_r+0x2e>
 80027e2:	686c      	ldr	r4, [r5, #4]
 80027e4:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80027e8:	b17b      	cbz	r3, 800280a <_fflush_r+0x42>
 80027ea:	4621      	mov	r1, r4
 80027ec:	4628      	mov	r0, r5
 80027ee:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 80027f2:	f7ff bf61 	b.w	80026b8 <__sflush_r>
 80027f6:	4b07      	ldr	r3, [pc, #28]	; (8002814 <_fflush_r+0x4c>)
 80027f8:	429c      	cmp	r4, r3
 80027fa:	d101      	bne.n	8002800 <_fflush_r+0x38>
 80027fc:	68ac      	ldr	r4, [r5, #8]
 80027fe:	e7f1      	b.n	80027e4 <_fflush_r+0x1c>
 8002800:	4b05      	ldr	r3, [pc, #20]	; (8002818 <_fflush_r+0x50>)
 8002802:	429c      	cmp	r4, r3
 8002804:	bf08      	it	eq
 8002806:	68ec      	ldreq	r4, [r5, #12]
 8002808:	e7ec      	b.n	80027e4 <_fflush_r+0x1c>
 800280a:	2000      	movs	r0, #0
 800280c:	bd38      	pop	{r3, r4, r5, pc}
 800280e:	bf00      	nop
 8002810:	08003534 	.word	0x08003534
 8002814:	08003554 	.word	0x08003554
 8002818:	08003514 	.word	0x08003514

0800281c <_cleanup_r>:
 800281c:	4901      	ldr	r1, [pc, #4]	; (8002824 <_cleanup_r+0x8>)
 800281e:	f000 b8a9 	b.w	8002974 <_fwalk_reent>
 8002822:	bf00      	nop
 8002824:	080027c9 	.word	0x080027c9

08002828 <std.isra.0>:
 8002828:	2300      	movs	r3, #0
 800282a:	b510      	push	{r4, lr}
 800282c:	4604      	mov	r4, r0
 800282e:	6003      	str	r3, [r0, #0]
 8002830:	6043      	str	r3, [r0, #4]
 8002832:	6083      	str	r3, [r0, #8]
 8002834:	8181      	strh	r1, [r0, #12]
 8002836:	6643      	str	r3, [r0, #100]	; 0x64
 8002838:	81c2      	strh	r2, [r0, #14]
 800283a:	6103      	str	r3, [r0, #16]
 800283c:	6143      	str	r3, [r0, #20]
 800283e:	6183      	str	r3, [r0, #24]
 8002840:	4619      	mov	r1, r3
 8002842:	2208      	movs	r2, #8
 8002844:	305c      	adds	r0, #92	; 0x5c
 8002846:	f7ff fd28 	bl	800229a <memset>
 800284a:	4b05      	ldr	r3, [pc, #20]	; (8002860 <std.isra.0+0x38>)
 800284c:	6224      	str	r4, [r4, #32]
 800284e:	6263      	str	r3, [r4, #36]	; 0x24
 8002850:	4b04      	ldr	r3, [pc, #16]	; (8002864 <std.isra.0+0x3c>)
 8002852:	62a3      	str	r3, [r4, #40]	; 0x28
 8002854:	4b04      	ldr	r3, [pc, #16]	; (8002868 <std.isra.0+0x40>)
 8002856:	62e3      	str	r3, [r4, #44]	; 0x2c
 8002858:	4b04      	ldr	r3, [pc, #16]	; (800286c <std.isra.0+0x44>)
 800285a:	6323      	str	r3, [r4, #48]	; 0x30
 800285c:	bd10      	pop	{r4, pc}
 800285e:	bf00      	nop
 8002860:	08003215 	.word	0x08003215
 8002864:	08003237 	.word	0x08003237
 8002868:	0800326f 	.word	0x0800326f
 800286c:	08003293 	.word	0x08003293

08002870 <__sfmoreglue>:
 8002870:	b570      	push	{r4, r5, r6, lr}
 8002872:	2568      	movs	r5, #104	; 0x68
 8002874:	1e4a      	subs	r2, r1, #1
 8002876:	4355      	muls	r5, r2
 8002878:	460e      	mov	r6, r1
 800287a:	f105 0174 	add.w	r1, r5, #116	; 0x74
 800287e:	f000 f94f 	bl	8002b20 <_malloc_r>
 8002882:	4604      	mov	r4, r0
 8002884:	b140      	cbz	r0, 8002898 <__sfmoreglue+0x28>
 8002886:	2100      	movs	r1, #0
 8002888:	e880 0042 	stmia.w	r0, {r1, r6}
 800288c:	300c      	adds	r0, #12
 800288e:	60a0      	str	r0, [r4, #8]
 8002890:	f105 0268 	add.w	r2, r5, #104	; 0x68
 8002894:	f7ff fd01 	bl	800229a <memset>
 8002898:	4620      	mov	r0, r4
 800289a:	bd70      	pop	{r4, r5, r6, pc}

0800289c <__sinit>:
 800289c:	6983      	ldr	r3, [r0, #24]
 800289e:	b510      	push	{r4, lr}
 80028a0:	4604      	mov	r4, r0
 80028a2:	bb33      	cbnz	r3, 80028f2 <__sinit+0x56>
 80028a4:	6483      	str	r3, [r0, #72]	; 0x48
 80028a6:	64c3      	str	r3, [r0, #76]	; 0x4c
 80028a8:	6503      	str	r3, [r0, #80]	; 0x50
 80028aa:	4b12      	ldr	r3, [pc, #72]	; (80028f4 <__sinit+0x58>)
 80028ac:	4a12      	ldr	r2, [pc, #72]	; (80028f8 <__sinit+0x5c>)
 80028ae:	681b      	ldr	r3, [r3, #0]
 80028b0:	6282      	str	r2, [r0, #40]	; 0x28
 80028b2:	4298      	cmp	r0, r3
 80028b4:	bf04      	itt	eq
 80028b6:	2301      	moveq	r3, #1
 80028b8:	6183      	streq	r3, [r0, #24]
 80028ba:	f000 f81f 	bl	80028fc <__sfp>
 80028be:	6060      	str	r0, [r4, #4]
 80028c0:	4620      	mov	r0, r4
 80028c2:	f000 f81b 	bl	80028fc <__sfp>
 80028c6:	60a0      	str	r0, [r4, #8]
 80028c8:	4620      	mov	r0, r4
 80028ca:	f000 f817 	bl	80028fc <__sfp>
 80028ce:	2200      	movs	r2, #0
 80028d0:	60e0      	str	r0, [r4, #12]
 80028d2:	2104      	movs	r1, #4
 80028d4:	6860      	ldr	r0, [r4, #4]
 80028d6:	f7ff ffa7 	bl	8002828 <std.isra.0>
 80028da:	2201      	movs	r2, #1
 80028dc:	2109      	movs	r1, #9
 80028de:	68a0      	ldr	r0, [r4, #8]
 80028e0:	f7ff ffa2 	bl	8002828 <std.isra.0>
 80028e4:	2202      	movs	r2, #2
 80028e6:	2112      	movs	r1, #18
 80028e8:	68e0      	ldr	r0, [r4, #12]
 80028ea:	f7ff ff9d 	bl	8002828 <std.isra.0>
 80028ee:	2301      	movs	r3, #1
 80028f0:	61a3      	str	r3, [r4, #24]
 80028f2:	bd10      	pop	{r4, pc}
 80028f4:	08003510 	.word	0x08003510
 80028f8:	0800281d 	.word	0x0800281d

080028fc <__sfp>:
 80028fc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80028fe:	4b1c      	ldr	r3, [pc, #112]	; (8002970 <__sfp+0x74>)
 8002900:	4607      	mov	r7, r0
 8002902:	681e      	ldr	r6, [r3, #0]
 8002904:	69b3      	ldr	r3, [r6, #24]
 8002906:	b913      	cbnz	r3, 800290e <__sfp+0x12>
 8002908:	4630      	mov	r0, r6
 800290a:	f7ff ffc7 	bl	800289c <__sinit>
 800290e:	3648      	adds	r6, #72	; 0x48
 8002910:	68b4      	ldr	r4, [r6, #8]
 8002912:	6873      	ldr	r3, [r6, #4]
 8002914:	3b01      	subs	r3, #1
 8002916:	d503      	bpl.n	8002920 <__sfp+0x24>
 8002918:	6833      	ldr	r3, [r6, #0]
 800291a:	b133      	cbz	r3, 800292a <__sfp+0x2e>
 800291c:	6836      	ldr	r6, [r6, #0]
 800291e:	e7f7      	b.n	8002910 <__sfp+0x14>
 8002920:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 8002924:	b16d      	cbz	r5, 8002942 <__sfp+0x46>
 8002926:	3468      	adds	r4, #104	; 0x68
 8002928:	e7f4      	b.n	8002914 <__sfp+0x18>
 800292a:	2104      	movs	r1, #4
 800292c:	4638      	mov	r0, r7
 800292e:	f7ff ff9f 	bl	8002870 <__sfmoreglue>
 8002932:	6030      	str	r0, [r6, #0]
 8002934:	2800      	cmp	r0, #0
 8002936:	d1f1      	bne.n	800291c <__sfp+0x20>
 8002938:	230c      	movs	r3, #12
 800293a:	4604      	mov	r4, r0
 800293c:	603b      	str	r3, [r7, #0]
 800293e:	4620      	mov	r0, r4
 8002940:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8002942:	f64f 73ff 	movw	r3, #65535	; 0xffff
 8002946:	81e3      	strh	r3, [r4, #14]
 8002948:	2301      	movs	r3, #1
 800294a:	6665      	str	r5, [r4, #100]	; 0x64
 800294c:	81a3      	strh	r3, [r4, #12]
 800294e:	6025      	str	r5, [r4, #0]
 8002950:	60a5      	str	r5, [r4, #8]
 8002952:	6065      	str	r5, [r4, #4]
 8002954:	6125      	str	r5, [r4, #16]
 8002956:	6165      	str	r5, [r4, #20]
 8002958:	61a5      	str	r5, [r4, #24]
 800295a:	2208      	movs	r2, #8
 800295c:	4629      	mov	r1, r5
 800295e:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 8002962:	f7ff fc9a 	bl	800229a <memset>
 8002966:	6365      	str	r5, [r4, #52]	; 0x34
 8002968:	63a5      	str	r5, [r4, #56]	; 0x38
 800296a:	64a5      	str	r5, [r4, #72]	; 0x48
 800296c:	64e5      	str	r5, [r4, #76]	; 0x4c
 800296e:	e7e6      	b.n	800293e <__sfp+0x42>
 8002970:	08003510 	.word	0x08003510

08002974 <_fwalk_reent>:
 8002974:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8002978:	4680      	mov	r8, r0
 800297a:	4689      	mov	r9, r1
 800297c:	2600      	movs	r6, #0
 800297e:	f100 0448 	add.w	r4, r0, #72	; 0x48
 8002982:	b914      	cbnz	r4, 800298a <_fwalk_reent+0x16>
 8002984:	4630      	mov	r0, r6
 8002986:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800298a:	68a5      	ldr	r5, [r4, #8]
 800298c:	6867      	ldr	r7, [r4, #4]
 800298e:	3f01      	subs	r7, #1
 8002990:	d501      	bpl.n	8002996 <_fwalk_reent+0x22>
 8002992:	6824      	ldr	r4, [r4, #0]
 8002994:	e7f5      	b.n	8002982 <_fwalk_reent+0xe>
 8002996:	89ab      	ldrh	r3, [r5, #12]
 8002998:	2b01      	cmp	r3, #1
 800299a:	d907      	bls.n	80029ac <_fwalk_reent+0x38>
 800299c:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 80029a0:	3301      	adds	r3, #1
 80029a2:	d003      	beq.n	80029ac <_fwalk_reent+0x38>
 80029a4:	4629      	mov	r1, r5
 80029a6:	4640      	mov	r0, r8
 80029a8:	47c8      	blx	r9
 80029aa:	4306      	orrs	r6, r0
 80029ac:	3568      	adds	r5, #104	; 0x68
 80029ae:	e7ee      	b.n	800298e <_fwalk_reent+0x1a>

080029b0 <__swhatbuf_r>:
 80029b0:	b570      	push	{r4, r5, r6, lr}
 80029b2:	460e      	mov	r6, r1
 80029b4:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 80029b8:	b090      	sub	sp, #64	; 0x40
 80029ba:	2900      	cmp	r1, #0
 80029bc:	4614      	mov	r4, r2
 80029be:	461d      	mov	r5, r3
 80029c0:	da07      	bge.n	80029d2 <__swhatbuf_r+0x22>
 80029c2:	2300      	movs	r3, #0
 80029c4:	602b      	str	r3, [r5, #0]
 80029c6:	89b3      	ldrh	r3, [r6, #12]
 80029c8:	061a      	lsls	r2, r3, #24
 80029ca:	d410      	bmi.n	80029ee <__swhatbuf_r+0x3e>
 80029cc:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80029d0:	e00e      	b.n	80029f0 <__swhatbuf_r+0x40>
 80029d2:	aa01      	add	r2, sp, #4
 80029d4:	f000 fc84 	bl	80032e0 <_fstat_r>
 80029d8:	2800      	cmp	r0, #0
 80029da:	dbf2      	blt.n	80029c2 <__swhatbuf_r+0x12>
 80029dc:	9a02      	ldr	r2, [sp, #8]
 80029de:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 80029e2:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 80029e6:	425a      	negs	r2, r3
 80029e8:	415a      	adcs	r2, r3
 80029ea:	602a      	str	r2, [r5, #0]
 80029ec:	e7ee      	b.n	80029cc <__swhatbuf_r+0x1c>
 80029ee:	2340      	movs	r3, #64	; 0x40
 80029f0:	2000      	movs	r0, #0
 80029f2:	6023      	str	r3, [r4, #0]
 80029f4:	b010      	add	sp, #64	; 0x40
 80029f6:	bd70      	pop	{r4, r5, r6, pc}

080029f8 <__smakebuf_r>:
 80029f8:	898b      	ldrh	r3, [r1, #12]
 80029fa:	b573      	push	{r0, r1, r4, r5, r6, lr}
 80029fc:	079d      	lsls	r5, r3, #30
 80029fe:	4606      	mov	r6, r0
 8002a00:	460c      	mov	r4, r1
 8002a02:	d507      	bpl.n	8002a14 <__smakebuf_r+0x1c>
 8002a04:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8002a08:	6023      	str	r3, [r4, #0]
 8002a0a:	6123      	str	r3, [r4, #16]
 8002a0c:	2301      	movs	r3, #1
 8002a0e:	6163      	str	r3, [r4, #20]
 8002a10:	b002      	add	sp, #8
 8002a12:	bd70      	pop	{r4, r5, r6, pc}
 8002a14:	ab01      	add	r3, sp, #4
 8002a16:	466a      	mov	r2, sp
 8002a18:	f7ff ffca 	bl	80029b0 <__swhatbuf_r>
 8002a1c:	9900      	ldr	r1, [sp, #0]
 8002a1e:	4605      	mov	r5, r0
 8002a20:	4630      	mov	r0, r6
 8002a22:	f000 f87d 	bl	8002b20 <_malloc_r>
 8002a26:	b948      	cbnz	r0, 8002a3c <__smakebuf_r+0x44>
 8002a28:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002a2c:	059a      	lsls	r2, r3, #22
 8002a2e:	d4ef      	bmi.n	8002a10 <__smakebuf_r+0x18>
 8002a30:	f023 0303 	bic.w	r3, r3, #3
 8002a34:	f043 0302 	orr.w	r3, r3, #2
 8002a38:	81a3      	strh	r3, [r4, #12]
 8002a3a:	e7e3      	b.n	8002a04 <__smakebuf_r+0xc>
 8002a3c:	4b0d      	ldr	r3, [pc, #52]	; (8002a74 <__smakebuf_r+0x7c>)
 8002a3e:	62b3      	str	r3, [r6, #40]	; 0x28
 8002a40:	89a3      	ldrh	r3, [r4, #12]
 8002a42:	6020      	str	r0, [r4, #0]
 8002a44:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8002a48:	81a3      	strh	r3, [r4, #12]
 8002a4a:	9b00      	ldr	r3, [sp, #0]
 8002a4c:	6120      	str	r0, [r4, #16]
 8002a4e:	6163      	str	r3, [r4, #20]
 8002a50:	9b01      	ldr	r3, [sp, #4]
 8002a52:	b15b      	cbz	r3, 8002a6c <__smakebuf_r+0x74>
 8002a54:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8002a58:	4630      	mov	r0, r6
 8002a5a:	f000 fc53 	bl	8003304 <_isatty_r>
 8002a5e:	b128      	cbz	r0, 8002a6c <__smakebuf_r+0x74>
 8002a60:	89a3      	ldrh	r3, [r4, #12]
 8002a62:	f023 0303 	bic.w	r3, r3, #3
 8002a66:	f043 0301 	orr.w	r3, r3, #1
 8002a6a:	81a3      	strh	r3, [r4, #12]
 8002a6c:	89a3      	ldrh	r3, [r4, #12]
 8002a6e:	431d      	orrs	r5, r3
 8002a70:	81a5      	strh	r5, [r4, #12]
 8002a72:	e7cd      	b.n	8002a10 <__smakebuf_r+0x18>
 8002a74:	0800281d 	.word	0x0800281d

08002a78 <malloc>:
 8002a78:	4b02      	ldr	r3, [pc, #8]	; (8002a84 <malloc+0xc>)
 8002a7a:	4601      	mov	r1, r0
 8002a7c:	6818      	ldr	r0, [r3, #0]
 8002a7e:	f000 b84f 	b.w	8002b20 <_malloc_r>
 8002a82:	bf00      	nop
 8002a84:	20000010 	.word	0x20000010

08002a88 <_free_r>:
 8002a88:	b538      	push	{r3, r4, r5, lr}
 8002a8a:	4605      	mov	r5, r0
 8002a8c:	2900      	cmp	r1, #0
 8002a8e:	d043      	beq.n	8002b18 <_free_r+0x90>
 8002a90:	f851 3c04 	ldr.w	r3, [r1, #-4]
 8002a94:	1f0c      	subs	r4, r1, #4
 8002a96:	2b00      	cmp	r3, #0
 8002a98:	bfb8      	it	lt
 8002a9a:	18e4      	addlt	r4, r4, r3
 8002a9c:	f000 fc62 	bl	8003364 <__malloc_lock>
 8002aa0:	4a1e      	ldr	r2, [pc, #120]	; (8002b1c <_free_r+0x94>)
 8002aa2:	6813      	ldr	r3, [r2, #0]
 8002aa4:	4610      	mov	r0, r2
 8002aa6:	b933      	cbnz	r3, 8002ab6 <_free_r+0x2e>
 8002aa8:	6063      	str	r3, [r4, #4]
 8002aaa:	6014      	str	r4, [r2, #0]
 8002aac:	4628      	mov	r0, r5
 8002aae:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 8002ab2:	f000 bc58 	b.w	8003366 <__malloc_unlock>
 8002ab6:	42a3      	cmp	r3, r4
 8002ab8:	d90b      	bls.n	8002ad2 <_free_r+0x4a>
 8002aba:	6821      	ldr	r1, [r4, #0]
 8002abc:	1862      	adds	r2, r4, r1
 8002abe:	4293      	cmp	r3, r2
 8002ac0:	bf01      	itttt	eq
 8002ac2:	681a      	ldreq	r2, [r3, #0]
 8002ac4:	685b      	ldreq	r3, [r3, #4]
 8002ac6:	1852      	addeq	r2, r2, r1
 8002ac8:	6022      	streq	r2, [r4, #0]
 8002aca:	6063      	str	r3, [r4, #4]
 8002acc:	6004      	str	r4, [r0, #0]
 8002ace:	e7ed      	b.n	8002aac <_free_r+0x24>
 8002ad0:	4613      	mov	r3, r2
 8002ad2:	685a      	ldr	r2, [r3, #4]
 8002ad4:	b10a      	cbz	r2, 8002ada <_free_r+0x52>
 8002ad6:	42a2      	cmp	r2, r4
 8002ad8:	d9fa      	bls.n	8002ad0 <_free_r+0x48>
 8002ada:	6819      	ldr	r1, [r3, #0]
 8002adc:	1858      	adds	r0, r3, r1
 8002ade:	42a0      	cmp	r0, r4
 8002ae0:	d10b      	bne.n	8002afa <_free_r+0x72>
 8002ae2:	6820      	ldr	r0, [r4, #0]
 8002ae4:	4401      	add	r1, r0
 8002ae6:	1858      	adds	r0, r3, r1
 8002ae8:	4282      	cmp	r2, r0
 8002aea:	6019      	str	r1, [r3, #0]
 8002aec:	d1de      	bne.n	8002aac <_free_r+0x24>
 8002aee:	6810      	ldr	r0, [r2, #0]
 8002af0:	6852      	ldr	r2, [r2, #4]
 8002af2:	4401      	add	r1, r0
 8002af4:	6019      	str	r1, [r3, #0]
 8002af6:	605a      	str	r2, [r3, #4]
 8002af8:	e7d8      	b.n	8002aac <_free_r+0x24>
 8002afa:	d902      	bls.n	8002b02 <_free_r+0x7a>
 8002afc:	230c      	movs	r3, #12
 8002afe:	602b      	str	r3, [r5, #0]
 8002b00:	e7d4      	b.n	8002aac <_free_r+0x24>
 8002b02:	6820      	ldr	r0, [r4, #0]
 8002b04:	1821      	adds	r1, r4, r0
 8002b06:	428a      	cmp	r2, r1
 8002b08:	bf01      	itttt	eq
 8002b0a:	6811      	ldreq	r1, [r2, #0]
 8002b0c:	6852      	ldreq	r2, [r2, #4]
 8002b0e:	1809      	addeq	r1, r1, r0
 8002b10:	6021      	streq	r1, [r4, #0]
 8002b12:	6062      	str	r2, [r4, #4]
 8002b14:	605c      	str	r4, [r3, #4]
 8002b16:	e7c9      	b.n	8002aac <_free_r+0x24>
 8002b18:	bd38      	pop	{r3, r4, r5, pc}
 8002b1a:	bf00      	nop
 8002b1c:	2000017c 	.word	0x2000017c

08002b20 <_malloc_r>:
 8002b20:	b570      	push	{r4, r5, r6, lr}
 8002b22:	1ccd      	adds	r5, r1, #3
 8002b24:	f025 0503 	bic.w	r5, r5, #3
 8002b28:	3508      	adds	r5, #8
 8002b2a:	2d0c      	cmp	r5, #12
 8002b2c:	bf38      	it	cc
 8002b2e:	250c      	movcc	r5, #12
 8002b30:	2d00      	cmp	r5, #0
 8002b32:	4606      	mov	r6, r0
 8002b34:	db01      	blt.n	8002b3a <_malloc_r+0x1a>
 8002b36:	42a9      	cmp	r1, r5
 8002b38:	d903      	bls.n	8002b42 <_malloc_r+0x22>
 8002b3a:	230c      	movs	r3, #12
 8002b3c:	6033      	str	r3, [r6, #0]
 8002b3e:	2000      	movs	r0, #0
 8002b40:	bd70      	pop	{r4, r5, r6, pc}
 8002b42:	f000 fc0f 	bl	8003364 <__malloc_lock>
 8002b46:	4a23      	ldr	r2, [pc, #140]	; (8002bd4 <_malloc_r+0xb4>)
 8002b48:	6814      	ldr	r4, [r2, #0]
 8002b4a:	4621      	mov	r1, r4
 8002b4c:	b991      	cbnz	r1, 8002b74 <_malloc_r+0x54>
 8002b4e:	4c22      	ldr	r4, [pc, #136]	; (8002bd8 <_malloc_r+0xb8>)
 8002b50:	6823      	ldr	r3, [r4, #0]
 8002b52:	b91b      	cbnz	r3, 8002b5c <_malloc_r+0x3c>
 8002b54:	4630      	mov	r0, r6
 8002b56:	f000 fb4d 	bl	80031f4 <_sbrk_r>
 8002b5a:	6020      	str	r0, [r4, #0]
 8002b5c:	4629      	mov	r1, r5
 8002b5e:	4630      	mov	r0, r6
 8002b60:	f000 fb48 	bl	80031f4 <_sbrk_r>
 8002b64:	1c43      	adds	r3, r0, #1
 8002b66:	d126      	bne.n	8002bb6 <_malloc_r+0x96>
 8002b68:	230c      	movs	r3, #12
 8002b6a:	4630      	mov	r0, r6
 8002b6c:	6033      	str	r3, [r6, #0]
 8002b6e:	f000 fbfa 	bl	8003366 <__malloc_unlock>
 8002b72:	e7e4      	b.n	8002b3e <_malloc_r+0x1e>
 8002b74:	680b      	ldr	r3, [r1, #0]
 8002b76:	1b5b      	subs	r3, r3, r5
 8002b78:	d41a      	bmi.n	8002bb0 <_malloc_r+0x90>
 8002b7a:	2b0b      	cmp	r3, #11
 8002b7c:	d90f      	bls.n	8002b9e <_malloc_r+0x7e>
 8002b7e:	600b      	str	r3, [r1, #0]
 8002b80:	18cc      	adds	r4, r1, r3
 8002b82:	50cd      	str	r5, [r1, r3]
 8002b84:	4630      	mov	r0, r6
 8002b86:	f000 fbee 	bl	8003366 <__malloc_unlock>
 8002b8a:	f104 000b 	add.w	r0, r4, #11
 8002b8e:	1d23      	adds	r3, r4, #4
 8002b90:	f020 0007 	bic.w	r0, r0, #7
 8002b94:	1ac3      	subs	r3, r0, r3
 8002b96:	d01b      	beq.n	8002bd0 <_malloc_r+0xb0>
 8002b98:	425a      	negs	r2, r3
 8002b9a:	50e2      	str	r2, [r4, r3]
 8002b9c:	bd70      	pop	{r4, r5, r6, pc}
 8002b9e:	428c      	cmp	r4, r1
 8002ba0:	bf0b      	itete	eq
 8002ba2:	6863      	ldreq	r3, [r4, #4]
 8002ba4:	684b      	ldrne	r3, [r1, #4]
 8002ba6:	6013      	streq	r3, [r2, #0]
 8002ba8:	6063      	strne	r3, [r4, #4]
 8002baa:	bf18      	it	ne
 8002bac:	460c      	movne	r4, r1
 8002bae:	e7e9      	b.n	8002b84 <_malloc_r+0x64>
 8002bb0:	460c      	mov	r4, r1
 8002bb2:	6849      	ldr	r1, [r1, #4]
 8002bb4:	e7ca      	b.n	8002b4c <_malloc_r+0x2c>
 8002bb6:	1cc4      	adds	r4, r0, #3
 8002bb8:	f024 0403 	bic.w	r4, r4, #3
 8002bbc:	42a0      	cmp	r0, r4
 8002bbe:	d005      	beq.n	8002bcc <_malloc_r+0xac>
 8002bc0:	1a21      	subs	r1, r4, r0
 8002bc2:	4630      	mov	r0, r6
 8002bc4:	f000 fb16 	bl	80031f4 <_sbrk_r>
 8002bc8:	3001      	adds	r0, #1
 8002bca:	d0cd      	beq.n	8002b68 <_malloc_r+0x48>
 8002bcc:	6025      	str	r5, [r4, #0]
 8002bce:	e7d9      	b.n	8002b84 <_malloc_r+0x64>
 8002bd0:	bd70      	pop	{r4, r5, r6, pc}
 8002bd2:	bf00      	nop
 8002bd4:	2000017c 	.word	0x2000017c
 8002bd8:	20000180 	.word	0x20000180

08002bdc <__sfputc_r>:
 8002bdc:	6893      	ldr	r3, [r2, #8]
 8002bde:	b410      	push	{r4}
 8002be0:	3b01      	subs	r3, #1
 8002be2:	2b00      	cmp	r3, #0
 8002be4:	6093      	str	r3, [r2, #8]
 8002be6:	da08      	bge.n	8002bfa <__sfputc_r+0x1e>
 8002be8:	6994      	ldr	r4, [r2, #24]
 8002bea:	42a3      	cmp	r3, r4
 8002bec:	db02      	blt.n	8002bf4 <__sfputc_r+0x18>
 8002bee:	b2cb      	uxtb	r3, r1
 8002bf0:	2b0a      	cmp	r3, #10
 8002bf2:	d102      	bne.n	8002bfa <__sfputc_r+0x1e>
 8002bf4:	bc10      	pop	{r4}
 8002bf6:	f7ff bc9f 	b.w	8002538 <__swbuf_r>
 8002bfa:	6813      	ldr	r3, [r2, #0]
 8002bfc:	1c58      	adds	r0, r3, #1
 8002bfe:	6010      	str	r0, [r2, #0]
 8002c00:	7019      	strb	r1, [r3, #0]
 8002c02:	b2c8      	uxtb	r0, r1
 8002c04:	bc10      	pop	{r4}
 8002c06:	4770      	bx	lr

08002c08 <__sfputs_r>:
 8002c08:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002c0a:	4606      	mov	r6, r0
 8002c0c:	460f      	mov	r7, r1
 8002c0e:	4614      	mov	r4, r2
 8002c10:	18d5      	adds	r5, r2, r3
 8002c12:	42ac      	cmp	r4, r5
 8002c14:	d101      	bne.n	8002c1a <__sfputs_r+0x12>
 8002c16:	2000      	movs	r0, #0
 8002c18:	e007      	b.n	8002c2a <__sfputs_r+0x22>
 8002c1a:	463a      	mov	r2, r7
 8002c1c:	f814 1b01 	ldrb.w	r1, [r4], #1
 8002c20:	4630      	mov	r0, r6
 8002c22:	f7ff ffdb 	bl	8002bdc <__sfputc_r>
 8002c26:	1c43      	adds	r3, r0, #1
 8002c28:	d1f3      	bne.n	8002c12 <__sfputs_r+0xa>
 8002c2a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

08002c2c <_vfiprintf_r>:
 8002c2c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8002c30:	b09d      	sub	sp, #116	; 0x74
 8002c32:	460c      	mov	r4, r1
 8002c34:	4617      	mov	r7, r2
 8002c36:	9303      	str	r3, [sp, #12]
 8002c38:	4606      	mov	r6, r0
 8002c3a:	b118      	cbz	r0, 8002c44 <_vfiprintf_r+0x18>
 8002c3c:	6983      	ldr	r3, [r0, #24]
 8002c3e:	b90b      	cbnz	r3, 8002c44 <_vfiprintf_r+0x18>
 8002c40:	f7ff fe2c 	bl	800289c <__sinit>
 8002c44:	4b7c      	ldr	r3, [pc, #496]	; (8002e38 <_vfiprintf_r+0x20c>)
 8002c46:	429c      	cmp	r4, r3
 8002c48:	d157      	bne.n	8002cfa <_vfiprintf_r+0xce>
 8002c4a:	6874      	ldr	r4, [r6, #4]
 8002c4c:	89a3      	ldrh	r3, [r4, #12]
 8002c4e:	0718      	lsls	r0, r3, #28
 8002c50:	d55d      	bpl.n	8002d0e <_vfiprintf_r+0xe2>
 8002c52:	6923      	ldr	r3, [r4, #16]
 8002c54:	2b00      	cmp	r3, #0
 8002c56:	d05a      	beq.n	8002d0e <_vfiprintf_r+0xe2>
 8002c58:	2300      	movs	r3, #0
 8002c5a:	9309      	str	r3, [sp, #36]	; 0x24
 8002c5c:	2320      	movs	r3, #32
 8002c5e:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 8002c62:	2330      	movs	r3, #48	; 0x30
 8002c64:	f04f 0b01 	mov.w	fp, #1
 8002c68:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 8002c6c:	46b8      	mov	r8, r7
 8002c6e:	4645      	mov	r5, r8
 8002c70:	f815 3b01 	ldrb.w	r3, [r5], #1
 8002c74:	2b00      	cmp	r3, #0
 8002c76:	d155      	bne.n	8002d24 <_vfiprintf_r+0xf8>
 8002c78:	ebb8 0a07 	subs.w	sl, r8, r7
 8002c7c:	d00b      	beq.n	8002c96 <_vfiprintf_r+0x6a>
 8002c7e:	4653      	mov	r3, sl
 8002c80:	463a      	mov	r2, r7
 8002c82:	4621      	mov	r1, r4
 8002c84:	4630      	mov	r0, r6
 8002c86:	f7ff ffbf 	bl	8002c08 <__sfputs_r>
 8002c8a:	3001      	adds	r0, #1
 8002c8c:	f000 80c4 	beq.w	8002e18 <_vfiprintf_r+0x1ec>
 8002c90:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8002c92:	4453      	add	r3, sl
 8002c94:	9309      	str	r3, [sp, #36]	; 0x24
 8002c96:	f898 3000 	ldrb.w	r3, [r8]
 8002c9a:	2b00      	cmp	r3, #0
 8002c9c:	f000 80bc 	beq.w	8002e18 <_vfiprintf_r+0x1ec>
 8002ca0:	2300      	movs	r3, #0
 8002ca2:	f04f 32ff 	mov.w	r2, #4294967295
 8002ca6:	9304      	str	r3, [sp, #16]
 8002ca8:	9307      	str	r3, [sp, #28]
 8002caa:	9205      	str	r2, [sp, #20]
 8002cac:	9306      	str	r3, [sp, #24]
 8002cae:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 8002cb2:	931a      	str	r3, [sp, #104]	; 0x68
 8002cb4:	2205      	movs	r2, #5
 8002cb6:	7829      	ldrb	r1, [r5, #0]
 8002cb8:	4860      	ldr	r0, [pc, #384]	; (8002e3c <_vfiprintf_r+0x210>)
 8002cba:	f000 fb45 	bl	8003348 <memchr>
 8002cbe:	f105 0801 	add.w	r8, r5, #1
 8002cc2:	9b04      	ldr	r3, [sp, #16]
 8002cc4:	2800      	cmp	r0, #0
 8002cc6:	d131      	bne.n	8002d2c <_vfiprintf_r+0x100>
 8002cc8:	06d9      	lsls	r1, r3, #27
 8002cca:	bf44      	itt	mi
 8002ccc:	2220      	movmi	r2, #32
 8002cce:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8002cd2:	071a      	lsls	r2, r3, #28
 8002cd4:	bf44      	itt	mi
 8002cd6:	222b      	movmi	r2, #43	; 0x2b
 8002cd8:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8002cdc:	782a      	ldrb	r2, [r5, #0]
 8002cde:	2a2a      	cmp	r2, #42	; 0x2a
 8002ce0:	d02c      	beq.n	8002d3c <_vfiprintf_r+0x110>
 8002ce2:	2100      	movs	r1, #0
 8002ce4:	200a      	movs	r0, #10
 8002ce6:	9a07      	ldr	r2, [sp, #28]
 8002ce8:	46a8      	mov	r8, r5
 8002cea:	f898 3000 	ldrb.w	r3, [r8]
 8002cee:	3501      	adds	r5, #1
 8002cf0:	3b30      	subs	r3, #48	; 0x30
 8002cf2:	2b09      	cmp	r3, #9
 8002cf4:	d96d      	bls.n	8002dd2 <_vfiprintf_r+0x1a6>
 8002cf6:	b371      	cbz	r1, 8002d56 <_vfiprintf_r+0x12a>
 8002cf8:	e026      	b.n	8002d48 <_vfiprintf_r+0x11c>
 8002cfa:	4b51      	ldr	r3, [pc, #324]	; (8002e40 <_vfiprintf_r+0x214>)
 8002cfc:	429c      	cmp	r4, r3
 8002cfe:	d101      	bne.n	8002d04 <_vfiprintf_r+0xd8>
 8002d00:	68b4      	ldr	r4, [r6, #8]
 8002d02:	e7a3      	b.n	8002c4c <_vfiprintf_r+0x20>
 8002d04:	4b4f      	ldr	r3, [pc, #316]	; (8002e44 <_vfiprintf_r+0x218>)
 8002d06:	429c      	cmp	r4, r3
 8002d08:	bf08      	it	eq
 8002d0a:	68f4      	ldreq	r4, [r6, #12]
 8002d0c:	e79e      	b.n	8002c4c <_vfiprintf_r+0x20>
 8002d0e:	4621      	mov	r1, r4
 8002d10:	4630      	mov	r0, r6
 8002d12:	f7ff fc63 	bl	80025dc <__swsetup_r>
 8002d16:	2800      	cmp	r0, #0
 8002d18:	d09e      	beq.n	8002c58 <_vfiprintf_r+0x2c>
 8002d1a:	f04f 30ff 	mov.w	r0, #4294967295
 8002d1e:	b01d      	add	sp, #116	; 0x74
 8002d20:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8002d24:	2b25      	cmp	r3, #37	; 0x25
 8002d26:	d0a7      	beq.n	8002c78 <_vfiprintf_r+0x4c>
 8002d28:	46a8      	mov	r8, r5
 8002d2a:	e7a0      	b.n	8002c6e <_vfiprintf_r+0x42>
 8002d2c:	4a43      	ldr	r2, [pc, #268]	; (8002e3c <_vfiprintf_r+0x210>)
 8002d2e:	4645      	mov	r5, r8
 8002d30:	1a80      	subs	r0, r0, r2
 8002d32:	fa0b f000 	lsl.w	r0, fp, r0
 8002d36:	4318      	orrs	r0, r3
 8002d38:	9004      	str	r0, [sp, #16]
 8002d3a:	e7bb      	b.n	8002cb4 <_vfiprintf_r+0x88>
 8002d3c:	9a03      	ldr	r2, [sp, #12]
 8002d3e:	1d11      	adds	r1, r2, #4
 8002d40:	6812      	ldr	r2, [r2, #0]
 8002d42:	9103      	str	r1, [sp, #12]
 8002d44:	2a00      	cmp	r2, #0
 8002d46:	db01      	blt.n	8002d4c <_vfiprintf_r+0x120>
 8002d48:	9207      	str	r2, [sp, #28]
 8002d4a:	e004      	b.n	8002d56 <_vfiprintf_r+0x12a>
 8002d4c:	4252      	negs	r2, r2
 8002d4e:	f043 0302 	orr.w	r3, r3, #2
 8002d52:	9207      	str	r2, [sp, #28]
 8002d54:	9304      	str	r3, [sp, #16]
 8002d56:	f898 3000 	ldrb.w	r3, [r8]
 8002d5a:	2b2e      	cmp	r3, #46	; 0x2e
 8002d5c:	d110      	bne.n	8002d80 <_vfiprintf_r+0x154>
 8002d5e:	f898 3001 	ldrb.w	r3, [r8, #1]
 8002d62:	f108 0101 	add.w	r1, r8, #1
 8002d66:	2b2a      	cmp	r3, #42	; 0x2a
 8002d68:	d137      	bne.n	8002dda <_vfiprintf_r+0x1ae>
 8002d6a:	9b03      	ldr	r3, [sp, #12]
 8002d6c:	f108 0802 	add.w	r8, r8, #2
 8002d70:	1d1a      	adds	r2, r3, #4
 8002d72:	681b      	ldr	r3, [r3, #0]
 8002d74:	9203      	str	r2, [sp, #12]
 8002d76:	2b00      	cmp	r3, #0
 8002d78:	bfb8      	it	lt
 8002d7a:	f04f 33ff 	movlt.w	r3, #4294967295
 8002d7e:	9305      	str	r3, [sp, #20]
 8002d80:	4d31      	ldr	r5, [pc, #196]	; (8002e48 <_vfiprintf_r+0x21c>)
 8002d82:	2203      	movs	r2, #3
 8002d84:	f898 1000 	ldrb.w	r1, [r8]
 8002d88:	4628      	mov	r0, r5
 8002d8a:	f000 fadd 	bl	8003348 <memchr>
 8002d8e:	b140      	cbz	r0, 8002da2 <_vfiprintf_r+0x176>
 8002d90:	2340      	movs	r3, #64	; 0x40
 8002d92:	1b40      	subs	r0, r0, r5
 8002d94:	fa03 f000 	lsl.w	r0, r3, r0
 8002d98:	9b04      	ldr	r3, [sp, #16]
 8002d9a:	f108 0801 	add.w	r8, r8, #1
 8002d9e:	4303      	orrs	r3, r0
 8002da0:	9304      	str	r3, [sp, #16]
 8002da2:	f898 1000 	ldrb.w	r1, [r8]
 8002da6:	2206      	movs	r2, #6
 8002da8:	4828      	ldr	r0, [pc, #160]	; (8002e4c <_vfiprintf_r+0x220>)
 8002daa:	f108 0701 	add.w	r7, r8, #1
 8002dae:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 8002db2:	f000 fac9 	bl	8003348 <memchr>
 8002db6:	2800      	cmp	r0, #0
 8002db8:	d034      	beq.n	8002e24 <_vfiprintf_r+0x1f8>
 8002dba:	4b25      	ldr	r3, [pc, #148]	; (8002e50 <_vfiprintf_r+0x224>)
 8002dbc:	bb03      	cbnz	r3, 8002e00 <_vfiprintf_r+0x1d4>
 8002dbe:	9b03      	ldr	r3, [sp, #12]
 8002dc0:	3307      	adds	r3, #7
 8002dc2:	f023 0307 	bic.w	r3, r3, #7
 8002dc6:	3308      	adds	r3, #8
 8002dc8:	9303      	str	r3, [sp, #12]
 8002dca:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8002dcc:	444b      	add	r3, r9
 8002dce:	9309      	str	r3, [sp, #36]	; 0x24
 8002dd0:	e74c      	b.n	8002c6c <_vfiprintf_r+0x40>
 8002dd2:	fb00 3202 	mla	r2, r0, r2, r3
 8002dd6:	2101      	movs	r1, #1
 8002dd8:	e786      	b.n	8002ce8 <_vfiprintf_r+0xbc>
 8002dda:	2300      	movs	r3, #0
 8002ddc:	250a      	movs	r5, #10
 8002dde:	4618      	mov	r0, r3
 8002de0:	9305      	str	r3, [sp, #20]
 8002de2:	4688      	mov	r8, r1
 8002de4:	f898 2000 	ldrb.w	r2, [r8]
 8002de8:	3101      	adds	r1, #1
 8002dea:	3a30      	subs	r2, #48	; 0x30
 8002dec:	2a09      	cmp	r2, #9
 8002dee:	d903      	bls.n	8002df8 <_vfiprintf_r+0x1cc>
 8002df0:	2b00      	cmp	r3, #0
 8002df2:	d0c5      	beq.n	8002d80 <_vfiprintf_r+0x154>
 8002df4:	9005      	str	r0, [sp, #20]
 8002df6:	e7c3      	b.n	8002d80 <_vfiprintf_r+0x154>
 8002df8:	fb05 2000 	mla	r0, r5, r0, r2
 8002dfc:	2301      	movs	r3, #1
 8002dfe:	e7f0      	b.n	8002de2 <_vfiprintf_r+0x1b6>
 8002e00:	ab03      	add	r3, sp, #12
 8002e02:	9300      	str	r3, [sp, #0]
 8002e04:	4622      	mov	r2, r4
 8002e06:	4b13      	ldr	r3, [pc, #76]	; (8002e54 <_vfiprintf_r+0x228>)
 8002e08:	a904      	add	r1, sp, #16
 8002e0a:	4630      	mov	r0, r6
 8002e0c:	f3af 8000 	nop.w
 8002e10:	f1b0 3fff 	cmp.w	r0, #4294967295
 8002e14:	4681      	mov	r9, r0
 8002e16:	d1d8      	bne.n	8002dca <_vfiprintf_r+0x19e>
 8002e18:	89a3      	ldrh	r3, [r4, #12]
 8002e1a:	065b      	lsls	r3, r3, #25
 8002e1c:	f53f af7d 	bmi.w	8002d1a <_vfiprintf_r+0xee>
 8002e20:	9809      	ldr	r0, [sp, #36]	; 0x24
 8002e22:	e77c      	b.n	8002d1e <_vfiprintf_r+0xf2>
 8002e24:	ab03      	add	r3, sp, #12
 8002e26:	9300      	str	r3, [sp, #0]
 8002e28:	4622      	mov	r2, r4
 8002e2a:	4b0a      	ldr	r3, [pc, #40]	; (8002e54 <_vfiprintf_r+0x228>)
 8002e2c:	a904      	add	r1, sp, #16
 8002e2e:	4630      	mov	r0, r6
 8002e30:	f000 f88a 	bl	8002f48 <_printf_i>
 8002e34:	e7ec      	b.n	8002e10 <_vfiprintf_r+0x1e4>
 8002e36:	bf00      	nop
 8002e38:	08003534 	.word	0x08003534
 8002e3c:	08003574 	.word	0x08003574
 8002e40:	08003554 	.word	0x08003554
 8002e44:	08003514 	.word	0x08003514
 8002e48:	0800357a 	.word	0x0800357a
 8002e4c:	0800357e 	.word	0x0800357e
 8002e50:	00000000 	.word	0x00000000
 8002e54:	08002c09 	.word	0x08002c09

08002e58 <_printf_common>:
 8002e58:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8002e5c:	4691      	mov	r9, r2
 8002e5e:	461f      	mov	r7, r3
 8002e60:	688a      	ldr	r2, [r1, #8]
 8002e62:	690b      	ldr	r3, [r1, #16]
 8002e64:	4606      	mov	r6, r0
 8002e66:	4293      	cmp	r3, r2
 8002e68:	bfb8      	it	lt
 8002e6a:	4613      	movlt	r3, r2
 8002e6c:	f8c9 3000 	str.w	r3, [r9]
 8002e70:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 8002e74:	460c      	mov	r4, r1
 8002e76:	f8dd 8020 	ldr.w	r8, [sp, #32]
 8002e7a:	b112      	cbz	r2, 8002e82 <_printf_common+0x2a>
 8002e7c:	3301      	adds	r3, #1
 8002e7e:	f8c9 3000 	str.w	r3, [r9]
 8002e82:	6823      	ldr	r3, [r4, #0]
 8002e84:	0699      	lsls	r1, r3, #26
 8002e86:	bf42      	ittt	mi
 8002e88:	f8d9 3000 	ldrmi.w	r3, [r9]
 8002e8c:	3302      	addmi	r3, #2
 8002e8e:	f8c9 3000 	strmi.w	r3, [r9]
 8002e92:	6825      	ldr	r5, [r4, #0]
 8002e94:	f015 0506 	ands.w	r5, r5, #6
 8002e98:	d107      	bne.n	8002eaa <_printf_common+0x52>
 8002e9a:	f104 0a19 	add.w	sl, r4, #25
 8002e9e:	68e3      	ldr	r3, [r4, #12]
 8002ea0:	f8d9 2000 	ldr.w	r2, [r9]
 8002ea4:	1a9b      	subs	r3, r3, r2
 8002ea6:	429d      	cmp	r5, r3
 8002ea8:	db2a      	blt.n	8002f00 <_printf_common+0xa8>
 8002eaa:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 8002eae:	6822      	ldr	r2, [r4, #0]
 8002eb0:	3300      	adds	r3, #0
 8002eb2:	bf18      	it	ne
 8002eb4:	2301      	movne	r3, #1
 8002eb6:	0692      	lsls	r2, r2, #26
 8002eb8:	d42f      	bmi.n	8002f1a <_printf_common+0xc2>
 8002eba:	f104 0243 	add.w	r2, r4, #67	; 0x43
 8002ebe:	4639      	mov	r1, r7
 8002ec0:	4630      	mov	r0, r6
 8002ec2:	47c0      	blx	r8
 8002ec4:	3001      	adds	r0, #1
 8002ec6:	d022      	beq.n	8002f0e <_printf_common+0xb6>
 8002ec8:	6823      	ldr	r3, [r4, #0]
 8002eca:	68e5      	ldr	r5, [r4, #12]
 8002ecc:	f003 0306 	and.w	r3, r3, #6
 8002ed0:	2b04      	cmp	r3, #4
 8002ed2:	bf18      	it	ne
 8002ed4:	2500      	movne	r5, #0
 8002ed6:	f8d9 2000 	ldr.w	r2, [r9]
 8002eda:	f04f 0900 	mov.w	r9, #0
 8002ede:	bf08      	it	eq
 8002ee0:	1aad      	subeq	r5, r5, r2
 8002ee2:	68a3      	ldr	r3, [r4, #8]
 8002ee4:	6922      	ldr	r2, [r4, #16]
 8002ee6:	bf08      	it	eq
 8002ee8:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8002eec:	4293      	cmp	r3, r2
 8002eee:	bfc4      	itt	gt
 8002ef0:	1a9b      	subgt	r3, r3, r2
 8002ef2:	18ed      	addgt	r5, r5, r3
 8002ef4:	341a      	adds	r4, #26
 8002ef6:	454d      	cmp	r5, r9
 8002ef8:	d11b      	bne.n	8002f32 <_printf_common+0xda>
 8002efa:	2000      	movs	r0, #0
 8002efc:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8002f00:	2301      	movs	r3, #1
 8002f02:	4652      	mov	r2, sl
 8002f04:	4639      	mov	r1, r7
 8002f06:	4630      	mov	r0, r6
 8002f08:	47c0      	blx	r8
 8002f0a:	3001      	adds	r0, #1
 8002f0c:	d103      	bne.n	8002f16 <_printf_common+0xbe>
 8002f0e:	f04f 30ff 	mov.w	r0, #4294967295
 8002f12:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8002f16:	3501      	adds	r5, #1
 8002f18:	e7c1      	b.n	8002e9e <_printf_common+0x46>
 8002f1a:	2030      	movs	r0, #48	; 0x30
 8002f1c:	18e1      	adds	r1, r4, r3
 8002f1e:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 8002f22:	1c5a      	adds	r2, r3, #1
 8002f24:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 8002f28:	4422      	add	r2, r4
 8002f2a:	3302      	adds	r3, #2
 8002f2c:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 8002f30:	e7c3      	b.n	8002eba <_printf_common+0x62>
 8002f32:	2301      	movs	r3, #1
 8002f34:	4622      	mov	r2, r4
 8002f36:	4639      	mov	r1, r7
 8002f38:	4630      	mov	r0, r6
 8002f3a:	47c0      	blx	r8
 8002f3c:	3001      	adds	r0, #1
 8002f3e:	d0e6      	beq.n	8002f0e <_printf_common+0xb6>
 8002f40:	f109 0901 	add.w	r9, r9, #1
 8002f44:	e7d7      	b.n	8002ef6 <_printf_common+0x9e>
	...

08002f48 <_printf_i>:
 8002f48:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 8002f4c:	4617      	mov	r7, r2
 8002f4e:	7e0a      	ldrb	r2, [r1, #24]
 8002f50:	b085      	sub	sp, #20
 8002f52:	2a6e      	cmp	r2, #110	; 0x6e
 8002f54:	4698      	mov	r8, r3
 8002f56:	4606      	mov	r6, r0
 8002f58:	460c      	mov	r4, r1
 8002f5a:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 8002f5c:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 8002f60:	f000 80bc 	beq.w	80030dc <_printf_i+0x194>
 8002f64:	d81a      	bhi.n	8002f9c <_printf_i+0x54>
 8002f66:	2a63      	cmp	r2, #99	; 0x63
 8002f68:	d02e      	beq.n	8002fc8 <_printf_i+0x80>
 8002f6a:	d80a      	bhi.n	8002f82 <_printf_i+0x3a>
 8002f6c:	2a00      	cmp	r2, #0
 8002f6e:	f000 80c8 	beq.w	8003102 <_printf_i+0x1ba>
 8002f72:	2a58      	cmp	r2, #88	; 0x58
 8002f74:	f000 808a 	beq.w	800308c <_printf_i+0x144>
 8002f78:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8002f7c:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 8002f80:	e02a      	b.n	8002fd8 <_printf_i+0x90>
 8002f82:	2a64      	cmp	r2, #100	; 0x64
 8002f84:	d001      	beq.n	8002f8a <_printf_i+0x42>
 8002f86:	2a69      	cmp	r2, #105	; 0x69
 8002f88:	d1f6      	bne.n	8002f78 <_printf_i+0x30>
 8002f8a:	6821      	ldr	r1, [r4, #0]
 8002f8c:	681a      	ldr	r2, [r3, #0]
 8002f8e:	f011 0f80 	tst.w	r1, #128	; 0x80
 8002f92:	d023      	beq.n	8002fdc <_printf_i+0x94>
 8002f94:	1d11      	adds	r1, r2, #4
 8002f96:	6019      	str	r1, [r3, #0]
 8002f98:	6813      	ldr	r3, [r2, #0]
 8002f9a:	e027      	b.n	8002fec <_printf_i+0xa4>
 8002f9c:	2a73      	cmp	r2, #115	; 0x73
 8002f9e:	f000 80b4 	beq.w	800310a <_printf_i+0x1c2>
 8002fa2:	d808      	bhi.n	8002fb6 <_printf_i+0x6e>
 8002fa4:	2a6f      	cmp	r2, #111	; 0x6f
 8002fa6:	d02a      	beq.n	8002ffe <_printf_i+0xb6>
 8002fa8:	2a70      	cmp	r2, #112	; 0x70
 8002faa:	d1e5      	bne.n	8002f78 <_printf_i+0x30>
 8002fac:	680a      	ldr	r2, [r1, #0]
 8002fae:	f042 0220 	orr.w	r2, r2, #32
 8002fb2:	600a      	str	r2, [r1, #0]
 8002fb4:	e003      	b.n	8002fbe <_printf_i+0x76>
 8002fb6:	2a75      	cmp	r2, #117	; 0x75
 8002fb8:	d021      	beq.n	8002ffe <_printf_i+0xb6>
 8002fba:	2a78      	cmp	r2, #120	; 0x78
 8002fbc:	d1dc      	bne.n	8002f78 <_printf_i+0x30>
 8002fbe:	2278      	movs	r2, #120	; 0x78
 8002fc0:	496f      	ldr	r1, [pc, #444]	; (8003180 <_printf_i+0x238>)
 8002fc2:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8002fc6:	e064      	b.n	8003092 <_printf_i+0x14a>
 8002fc8:	681a      	ldr	r2, [r3, #0]
 8002fca:	f101 0542 	add.w	r5, r1, #66	; 0x42
 8002fce:	1d11      	adds	r1, r2, #4
 8002fd0:	6019      	str	r1, [r3, #0]
 8002fd2:	6813      	ldr	r3, [r2, #0]
 8002fd4:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8002fd8:	2301      	movs	r3, #1
 8002fda:	e0a3      	b.n	8003124 <_printf_i+0x1dc>
 8002fdc:	f011 0f40 	tst.w	r1, #64	; 0x40
 8002fe0:	f102 0104 	add.w	r1, r2, #4
 8002fe4:	6019      	str	r1, [r3, #0]
 8002fe6:	d0d7      	beq.n	8002f98 <_printf_i+0x50>
 8002fe8:	f9b2 3000 	ldrsh.w	r3, [r2]
 8002fec:	2b00      	cmp	r3, #0
 8002fee:	da03      	bge.n	8002ff8 <_printf_i+0xb0>
 8002ff0:	222d      	movs	r2, #45	; 0x2d
 8002ff2:	425b      	negs	r3, r3
 8002ff4:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8002ff8:	4962      	ldr	r1, [pc, #392]	; (8003184 <_printf_i+0x23c>)
 8002ffa:	220a      	movs	r2, #10
 8002ffc:	e017      	b.n	800302e <_printf_i+0xe6>
 8002ffe:	6820      	ldr	r0, [r4, #0]
 8003000:	6819      	ldr	r1, [r3, #0]
 8003002:	f010 0f80 	tst.w	r0, #128	; 0x80
 8003006:	d003      	beq.n	8003010 <_printf_i+0xc8>
 8003008:	1d08      	adds	r0, r1, #4
 800300a:	6018      	str	r0, [r3, #0]
 800300c:	680b      	ldr	r3, [r1, #0]
 800300e:	e006      	b.n	800301e <_printf_i+0xd6>
 8003010:	f010 0f40 	tst.w	r0, #64	; 0x40
 8003014:	f101 0004 	add.w	r0, r1, #4
 8003018:	6018      	str	r0, [r3, #0]
 800301a:	d0f7      	beq.n	800300c <_printf_i+0xc4>
 800301c:	880b      	ldrh	r3, [r1, #0]
 800301e:	2a6f      	cmp	r2, #111	; 0x6f
 8003020:	bf14      	ite	ne
 8003022:	220a      	movne	r2, #10
 8003024:	2208      	moveq	r2, #8
 8003026:	4957      	ldr	r1, [pc, #348]	; (8003184 <_printf_i+0x23c>)
 8003028:	2000      	movs	r0, #0
 800302a:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 800302e:	6865      	ldr	r5, [r4, #4]
 8003030:	2d00      	cmp	r5, #0
 8003032:	60a5      	str	r5, [r4, #8]
 8003034:	f2c0 809c 	blt.w	8003170 <_printf_i+0x228>
 8003038:	6820      	ldr	r0, [r4, #0]
 800303a:	f020 0004 	bic.w	r0, r0, #4
 800303e:	6020      	str	r0, [r4, #0]
 8003040:	2b00      	cmp	r3, #0
 8003042:	d13f      	bne.n	80030c4 <_printf_i+0x17c>
 8003044:	2d00      	cmp	r5, #0
 8003046:	f040 8095 	bne.w	8003174 <_printf_i+0x22c>
 800304a:	4675      	mov	r5, lr
 800304c:	2a08      	cmp	r2, #8
 800304e:	d10b      	bne.n	8003068 <_printf_i+0x120>
 8003050:	6823      	ldr	r3, [r4, #0]
 8003052:	07da      	lsls	r2, r3, #31
 8003054:	d508      	bpl.n	8003068 <_printf_i+0x120>
 8003056:	6923      	ldr	r3, [r4, #16]
 8003058:	6862      	ldr	r2, [r4, #4]
 800305a:	429a      	cmp	r2, r3
 800305c:	bfde      	ittt	le
 800305e:	2330      	movle	r3, #48	; 0x30
 8003060:	f805 3c01 	strble.w	r3, [r5, #-1]
 8003064:	f105 35ff 	addle.w	r5, r5, #4294967295
 8003068:	ebae 0305 	sub.w	r3, lr, r5
 800306c:	6123      	str	r3, [r4, #16]
 800306e:	f8cd 8000 	str.w	r8, [sp]
 8003072:	463b      	mov	r3, r7
 8003074:	aa03      	add	r2, sp, #12
 8003076:	4621      	mov	r1, r4
 8003078:	4630      	mov	r0, r6
 800307a:	f7ff feed 	bl	8002e58 <_printf_common>
 800307e:	3001      	adds	r0, #1
 8003080:	d155      	bne.n	800312e <_printf_i+0x1e6>
 8003082:	f04f 30ff 	mov.w	r0, #4294967295
 8003086:	b005      	add	sp, #20
 8003088:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 800308c:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8003090:	493c      	ldr	r1, [pc, #240]	; (8003184 <_printf_i+0x23c>)
 8003092:	6822      	ldr	r2, [r4, #0]
 8003094:	6818      	ldr	r0, [r3, #0]
 8003096:	f012 0f80 	tst.w	r2, #128	; 0x80
 800309a:	f100 0504 	add.w	r5, r0, #4
 800309e:	601d      	str	r5, [r3, #0]
 80030a0:	d001      	beq.n	80030a6 <_printf_i+0x15e>
 80030a2:	6803      	ldr	r3, [r0, #0]
 80030a4:	e002      	b.n	80030ac <_printf_i+0x164>
 80030a6:	0655      	lsls	r5, r2, #25
 80030a8:	d5fb      	bpl.n	80030a2 <_printf_i+0x15a>
 80030aa:	8803      	ldrh	r3, [r0, #0]
 80030ac:	07d0      	lsls	r0, r2, #31
 80030ae:	bf44      	itt	mi
 80030b0:	f042 0220 	orrmi.w	r2, r2, #32
 80030b4:	6022      	strmi	r2, [r4, #0]
 80030b6:	b91b      	cbnz	r3, 80030c0 <_printf_i+0x178>
 80030b8:	6822      	ldr	r2, [r4, #0]
 80030ba:	f022 0220 	bic.w	r2, r2, #32
 80030be:	6022      	str	r2, [r4, #0]
 80030c0:	2210      	movs	r2, #16
 80030c2:	e7b1      	b.n	8003028 <_printf_i+0xe0>
 80030c4:	4675      	mov	r5, lr
 80030c6:	fbb3 f0f2 	udiv	r0, r3, r2
 80030ca:	fb02 3310 	mls	r3, r2, r0, r3
 80030ce:	5ccb      	ldrb	r3, [r1, r3]
 80030d0:	f805 3d01 	strb.w	r3, [r5, #-1]!
 80030d4:	4603      	mov	r3, r0
 80030d6:	2800      	cmp	r0, #0
 80030d8:	d1f5      	bne.n	80030c6 <_printf_i+0x17e>
 80030da:	e7b7      	b.n	800304c <_printf_i+0x104>
 80030dc:	6808      	ldr	r0, [r1, #0]
 80030de:	681a      	ldr	r2, [r3, #0]
 80030e0:	f010 0f80 	tst.w	r0, #128	; 0x80
 80030e4:	6949      	ldr	r1, [r1, #20]
 80030e6:	d004      	beq.n	80030f2 <_printf_i+0x1aa>
 80030e8:	1d10      	adds	r0, r2, #4
 80030ea:	6018      	str	r0, [r3, #0]
 80030ec:	6813      	ldr	r3, [r2, #0]
 80030ee:	6019      	str	r1, [r3, #0]
 80030f0:	e007      	b.n	8003102 <_printf_i+0x1ba>
 80030f2:	f010 0f40 	tst.w	r0, #64	; 0x40
 80030f6:	f102 0004 	add.w	r0, r2, #4
 80030fa:	6018      	str	r0, [r3, #0]
 80030fc:	6813      	ldr	r3, [r2, #0]
 80030fe:	d0f6      	beq.n	80030ee <_printf_i+0x1a6>
 8003100:	8019      	strh	r1, [r3, #0]
 8003102:	2300      	movs	r3, #0
 8003104:	4675      	mov	r5, lr
 8003106:	6123      	str	r3, [r4, #16]
 8003108:	e7b1      	b.n	800306e <_printf_i+0x126>
 800310a:	681a      	ldr	r2, [r3, #0]
 800310c:	1d11      	adds	r1, r2, #4
 800310e:	6019      	str	r1, [r3, #0]
 8003110:	6815      	ldr	r5, [r2, #0]
 8003112:	2100      	movs	r1, #0
 8003114:	6862      	ldr	r2, [r4, #4]
 8003116:	4628      	mov	r0, r5
 8003118:	f000 f916 	bl	8003348 <memchr>
 800311c:	b108      	cbz	r0, 8003122 <_printf_i+0x1da>
 800311e:	1b40      	subs	r0, r0, r5
 8003120:	6060      	str	r0, [r4, #4]
 8003122:	6863      	ldr	r3, [r4, #4]
 8003124:	6123      	str	r3, [r4, #16]
 8003126:	2300      	movs	r3, #0
 8003128:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 800312c:	e79f      	b.n	800306e <_printf_i+0x126>
 800312e:	6923      	ldr	r3, [r4, #16]
 8003130:	462a      	mov	r2, r5
 8003132:	4639      	mov	r1, r7
 8003134:	4630      	mov	r0, r6
 8003136:	47c0      	blx	r8
 8003138:	3001      	adds	r0, #1
 800313a:	d0a2      	beq.n	8003082 <_printf_i+0x13a>
 800313c:	6823      	ldr	r3, [r4, #0]
 800313e:	079b      	lsls	r3, r3, #30
 8003140:	d507      	bpl.n	8003152 <_printf_i+0x20a>
 8003142:	2500      	movs	r5, #0
 8003144:	f104 0919 	add.w	r9, r4, #25
 8003148:	68e3      	ldr	r3, [r4, #12]
 800314a:	9a03      	ldr	r2, [sp, #12]
 800314c:	1a9b      	subs	r3, r3, r2
 800314e:	429d      	cmp	r5, r3
 8003150:	db05      	blt.n	800315e <_printf_i+0x216>
 8003152:	68e0      	ldr	r0, [r4, #12]
 8003154:	9b03      	ldr	r3, [sp, #12]
 8003156:	4298      	cmp	r0, r3
 8003158:	bfb8      	it	lt
 800315a:	4618      	movlt	r0, r3
 800315c:	e793      	b.n	8003086 <_printf_i+0x13e>
 800315e:	2301      	movs	r3, #1
 8003160:	464a      	mov	r2, r9
 8003162:	4639      	mov	r1, r7
 8003164:	4630      	mov	r0, r6
 8003166:	47c0      	blx	r8
 8003168:	3001      	adds	r0, #1
 800316a:	d08a      	beq.n	8003082 <_printf_i+0x13a>
 800316c:	3501      	adds	r5, #1
 800316e:	e7eb      	b.n	8003148 <_printf_i+0x200>
 8003170:	2b00      	cmp	r3, #0
 8003172:	d1a7      	bne.n	80030c4 <_printf_i+0x17c>
 8003174:	780b      	ldrb	r3, [r1, #0]
 8003176:	f104 0542 	add.w	r5, r4, #66	; 0x42
 800317a:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 800317e:	e765      	b.n	800304c <_printf_i+0x104>
 8003180:	08003596 	.word	0x08003596
 8003184:	08003585 	.word	0x08003585

08003188 <_putc_r>:
 8003188:	b570      	push	{r4, r5, r6, lr}
 800318a:	460d      	mov	r5, r1
 800318c:	4614      	mov	r4, r2
 800318e:	4606      	mov	r6, r0
 8003190:	b118      	cbz	r0, 800319a <_putc_r+0x12>
 8003192:	6983      	ldr	r3, [r0, #24]
 8003194:	b90b      	cbnz	r3, 800319a <_putc_r+0x12>
 8003196:	f7ff fb81 	bl	800289c <__sinit>
 800319a:	4b13      	ldr	r3, [pc, #76]	; (80031e8 <_putc_r+0x60>)
 800319c:	429c      	cmp	r4, r3
 800319e:	d112      	bne.n	80031c6 <_putc_r+0x3e>
 80031a0:	6874      	ldr	r4, [r6, #4]
 80031a2:	68a3      	ldr	r3, [r4, #8]
 80031a4:	3b01      	subs	r3, #1
 80031a6:	2b00      	cmp	r3, #0
 80031a8:	60a3      	str	r3, [r4, #8]
 80031aa:	da16      	bge.n	80031da <_putc_r+0x52>
 80031ac:	69a2      	ldr	r2, [r4, #24]
 80031ae:	4293      	cmp	r3, r2
 80031b0:	db02      	blt.n	80031b8 <_putc_r+0x30>
 80031b2:	b2eb      	uxtb	r3, r5
 80031b4:	2b0a      	cmp	r3, #10
 80031b6:	d110      	bne.n	80031da <_putc_r+0x52>
 80031b8:	4622      	mov	r2, r4
 80031ba:	4629      	mov	r1, r5
 80031bc:	4630      	mov	r0, r6
 80031be:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 80031c2:	f7ff b9b9 	b.w	8002538 <__swbuf_r>
 80031c6:	4b09      	ldr	r3, [pc, #36]	; (80031ec <_putc_r+0x64>)
 80031c8:	429c      	cmp	r4, r3
 80031ca:	d101      	bne.n	80031d0 <_putc_r+0x48>
 80031cc:	68b4      	ldr	r4, [r6, #8]
 80031ce:	e7e8      	b.n	80031a2 <_putc_r+0x1a>
 80031d0:	4b07      	ldr	r3, [pc, #28]	; (80031f0 <_putc_r+0x68>)
 80031d2:	429c      	cmp	r4, r3
 80031d4:	bf08      	it	eq
 80031d6:	68f4      	ldreq	r4, [r6, #12]
 80031d8:	e7e3      	b.n	80031a2 <_putc_r+0x1a>
 80031da:	6823      	ldr	r3, [r4, #0]
 80031dc:	b2e8      	uxtb	r0, r5
 80031de:	1c5a      	adds	r2, r3, #1
 80031e0:	6022      	str	r2, [r4, #0]
 80031e2:	701d      	strb	r5, [r3, #0]
 80031e4:	bd70      	pop	{r4, r5, r6, pc}
 80031e6:	bf00      	nop
 80031e8:	08003534 	.word	0x08003534
 80031ec:	08003554 	.word	0x08003554
 80031f0:	08003514 	.word	0x08003514

080031f4 <_sbrk_r>:
 80031f4:	b538      	push	{r3, r4, r5, lr}
 80031f6:	2300      	movs	r3, #0
 80031f8:	4c05      	ldr	r4, [pc, #20]	; (8003210 <_sbrk_r+0x1c>)
 80031fa:	4605      	mov	r5, r0
 80031fc:	4608      	mov	r0, r1
 80031fe:	6023      	str	r3, [r4, #0]
 8003200:	f000 f8ec 	bl	80033dc <_sbrk>
 8003204:	1c43      	adds	r3, r0, #1
 8003206:	d102      	bne.n	800320e <_sbrk_r+0x1a>
 8003208:	6823      	ldr	r3, [r4, #0]
 800320a:	b103      	cbz	r3, 800320e <_sbrk_r+0x1a>
 800320c:	602b      	str	r3, [r5, #0]
 800320e:	bd38      	pop	{r3, r4, r5, pc}
 8003210:	20000320 	.word	0x20000320

08003214 <__sread>:
 8003214:	b510      	push	{r4, lr}
 8003216:	460c      	mov	r4, r1
 8003218:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800321c:	f000 f8a4 	bl	8003368 <_read_r>
 8003220:	2800      	cmp	r0, #0
 8003222:	bfab      	itete	ge
 8003224:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 8003226:	89a3      	ldrhlt	r3, [r4, #12]
 8003228:	181b      	addge	r3, r3, r0
 800322a:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 800322e:	bfac      	ite	ge
 8003230:	6563      	strge	r3, [r4, #84]	; 0x54
 8003232:	81a3      	strhlt	r3, [r4, #12]
 8003234:	bd10      	pop	{r4, pc}

08003236 <__swrite>:
 8003236:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800323a:	461f      	mov	r7, r3
 800323c:	898b      	ldrh	r3, [r1, #12]
 800323e:	4605      	mov	r5, r0
 8003240:	05db      	lsls	r3, r3, #23
 8003242:	460c      	mov	r4, r1
 8003244:	4616      	mov	r6, r2
 8003246:	d505      	bpl.n	8003254 <__swrite+0x1e>
 8003248:	2302      	movs	r3, #2
 800324a:	2200      	movs	r2, #0
 800324c:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8003250:	f000 f868 	bl	8003324 <_lseek_r>
 8003254:	89a3      	ldrh	r3, [r4, #12]
 8003256:	4632      	mov	r2, r6
 8003258:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 800325c:	81a3      	strh	r3, [r4, #12]
 800325e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8003262:	463b      	mov	r3, r7
 8003264:	4628      	mov	r0, r5
 8003266:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 800326a:	f000 b817 	b.w	800329c <_write_r>

0800326e <__sseek>:
 800326e:	b510      	push	{r4, lr}
 8003270:	460c      	mov	r4, r1
 8003272:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8003276:	f000 f855 	bl	8003324 <_lseek_r>
 800327a:	1c43      	adds	r3, r0, #1
 800327c:	89a3      	ldrh	r3, [r4, #12]
 800327e:	bf15      	itete	ne
 8003280:	6560      	strne	r0, [r4, #84]	; 0x54
 8003282:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 8003286:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 800328a:	81a3      	strheq	r3, [r4, #12]
 800328c:	bf18      	it	ne
 800328e:	81a3      	strhne	r3, [r4, #12]
 8003290:	bd10      	pop	{r4, pc}

08003292 <__sclose>:
 8003292:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8003296:	f000 b813 	b.w	80032c0 <_close_r>
	...

0800329c <_write_r>:
 800329c:	b538      	push	{r3, r4, r5, lr}
 800329e:	4605      	mov	r5, r0
 80032a0:	4608      	mov	r0, r1
 80032a2:	4611      	mov	r1, r2
 80032a4:	2200      	movs	r2, #0
 80032a6:	4c05      	ldr	r4, [pc, #20]	; (80032bc <_write_r+0x20>)
 80032a8:	6022      	str	r2, [r4, #0]
 80032aa:	461a      	mov	r2, r3
 80032ac:	f7fe fa96 	bl	80017dc <_write>
 80032b0:	1c43      	adds	r3, r0, #1
 80032b2:	d102      	bne.n	80032ba <_write_r+0x1e>
 80032b4:	6823      	ldr	r3, [r4, #0]
 80032b6:	b103      	cbz	r3, 80032ba <_write_r+0x1e>
 80032b8:	602b      	str	r3, [r5, #0]
 80032ba:	bd38      	pop	{r3, r4, r5, pc}
 80032bc:	20000320 	.word	0x20000320

080032c0 <_close_r>:
 80032c0:	b538      	push	{r3, r4, r5, lr}
 80032c2:	2300      	movs	r3, #0
 80032c4:	4c05      	ldr	r4, [pc, #20]	; (80032dc <_close_r+0x1c>)
 80032c6:	4605      	mov	r5, r0
 80032c8:	4608      	mov	r0, r1
 80032ca:	6023      	str	r3, [r4, #0]
 80032cc:	f000 f85e 	bl	800338c <_close>
 80032d0:	1c43      	adds	r3, r0, #1
 80032d2:	d102      	bne.n	80032da <_close_r+0x1a>
 80032d4:	6823      	ldr	r3, [r4, #0]
 80032d6:	b103      	cbz	r3, 80032da <_close_r+0x1a>
 80032d8:	602b      	str	r3, [r5, #0]
 80032da:	bd38      	pop	{r3, r4, r5, pc}
 80032dc:	20000320 	.word	0x20000320

080032e0 <_fstat_r>:
 80032e0:	b538      	push	{r3, r4, r5, lr}
 80032e2:	2300      	movs	r3, #0
 80032e4:	4c06      	ldr	r4, [pc, #24]	; (8003300 <_fstat_r+0x20>)
 80032e6:	4605      	mov	r5, r0
 80032e8:	4608      	mov	r0, r1
 80032ea:	4611      	mov	r1, r2
 80032ec:	6023      	str	r3, [r4, #0]
 80032ee:	f000 f855 	bl	800339c <_fstat>
 80032f2:	1c43      	adds	r3, r0, #1
 80032f4:	d102      	bne.n	80032fc <_fstat_r+0x1c>
 80032f6:	6823      	ldr	r3, [r4, #0]
 80032f8:	b103      	cbz	r3, 80032fc <_fstat_r+0x1c>
 80032fa:	602b      	str	r3, [r5, #0]
 80032fc:	bd38      	pop	{r3, r4, r5, pc}
 80032fe:	bf00      	nop
 8003300:	20000320 	.word	0x20000320

08003304 <_isatty_r>:
 8003304:	b538      	push	{r3, r4, r5, lr}
 8003306:	2300      	movs	r3, #0
 8003308:	4c05      	ldr	r4, [pc, #20]	; (8003320 <_isatty_r+0x1c>)
 800330a:	4605      	mov	r5, r0
 800330c:	4608      	mov	r0, r1
 800330e:	6023      	str	r3, [r4, #0]
 8003310:	f000 f84c 	bl	80033ac <_isatty>
 8003314:	1c43      	adds	r3, r0, #1
 8003316:	d102      	bne.n	800331e <_isatty_r+0x1a>
 8003318:	6823      	ldr	r3, [r4, #0]
 800331a:	b103      	cbz	r3, 800331e <_isatty_r+0x1a>
 800331c:	602b      	str	r3, [r5, #0]
 800331e:	bd38      	pop	{r3, r4, r5, pc}
 8003320:	20000320 	.word	0x20000320

08003324 <_lseek_r>:
 8003324:	b538      	push	{r3, r4, r5, lr}
 8003326:	4605      	mov	r5, r0
 8003328:	4608      	mov	r0, r1
 800332a:	4611      	mov	r1, r2
 800332c:	2200      	movs	r2, #0
 800332e:	4c05      	ldr	r4, [pc, #20]	; (8003344 <_lseek_r+0x20>)
 8003330:	6022      	str	r2, [r4, #0]
 8003332:	461a      	mov	r2, r3
 8003334:	f000 f842 	bl	80033bc <_lseek>
 8003338:	1c43      	adds	r3, r0, #1
 800333a:	d102      	bne.n	8003342 <_lseek_r+0x1e>
 800333c:	6823      	ldr	r3, [r4, #0]
 800333e:	b103      	cbz	r3, 8003342 <_lseek_r+0x1e>
 8003340:	602b      	str	r3, [r5, #0]
 8003342:	bd38      	pop	{r3, r4, r5, pc}
 8003344:	20000320 	.word	0x20000320

08003348 <memchr>:
 8003348:	b510      	push	{r4, lr}
 800334a:	b2c9      	uxtb	r1, r1
 800334c:	4402      	add	r2, r0
 800334e:	4290      	cmp	r0, r2
 8003350:	4603      	mov	r3, r0
 8003352:	d101      	bne.n	8003358 <memchr+0x10>
 8003354:	2000      	movs	r0, #0
 8003356:	bd10      	pop	{r4, pc}
 8003358:	781c      	ldrb	r4, [r3, #0]
 800335a:	3001      	adds	r0, #1
 800335c:	428c      	cmp	r4, r1
 800335e:	d1f6      	bne.n	800334e <memchr+0x6>
 8003360:	4618      	mov	r0, r3
 8003362:	bd10      	pop	{r4, pc}

08003364 <__malloc_lock>:
 8003364:	4770      	bx	lr

08003366 <__malloc_unlock>:
 8003366:	4770      	bx	lr

08003368 <_read_r>:
 8003368:	b538      	push	{r3, r4, r5, lr}
 800336a:	4605      	mov	r5, r0
 800336c:	4608      	mov	r0, r1
 800336e:	4611      	mov	r1, r2
 8003370:	2200      	movs	r2, #0
 8003372:	4c05      	ldr	r4, [pc, #20]	; (8003388 <_read_r+0x20>)
 8003374:	6022      	str	r2, [r4, #0]
 8003376:	461a      	mov	r2, r3
 8003378:	f000 f828 	bl	80033cc <_read>
 800337c:	1c43      	adds	r3, r0, #1
 800337e:	d102      	bne.n	8003386 <_read_r+0x1e>
 8003380:	6823      	ldr	r3, [r4, #0]
 8003382:	b103      	cbz	r3, 8003386 <_read_r+0x1e>
 8003384:	602b      	str	r3, [r5, #0]
 8003386:	bd38      	pop	{r3, r4, r5, pc}
 8003388:	20000320 	.word	0x20000320

0800338c <_close>:
 800338c:	2258      	movs	r2, #88	; 0x58
 800338e:	4b02      	ldr	r3, [pc, #8]	; (8003398 <_close+0xc>)
 8003390:	f04f 30ff 	mov.w	r0, #4294967295
 8003394:	601a      	str	r2, [r3, #0]
 8003396:	4770      	bx	lr
 8003398:	20000320 	.word	0x20000320

0800339c <_fstat>:
 800339c:	2258      	movs	r2, #88	; 0x58
 800339e:	4b02      	ldr	r3, [pc, #8]	; (80033a8 <_fstat+0xc>)
 80033a0:	f04f 30ff 	mov.w	r0, #4294967295
 80033a4:	601a      	str	r2, [r3, #0]
 80033a6:	4770      	bx	lr
 80033a8:	20000320 	.word	0x20000320

080033ac <_isatty>:
 80033ac:	2258      	movs	r2, #88	; 0x58
 80033ae:	4b02      	ldr	r3, [pc, #8]	; (80033b8 <_isatty+0xc>)
 80033b0:	2000      	movs	r0, #0
 80033b2:	601a      	str	r2, [r3, #0]
 80033b4:	4770      	bx	lr
 80033b6:	bf00      	nop
 80033b8:	20000320 	.word	0x20000320

080033bc <_lseek>:
 80033bc:	2258      	movs	r2, #88	; 0x58
 80033be:	4b02      	ldr	r3, [pc, #8]	; (80033c8 <_lseek+0xc>)
 80033c0:	f04f 30ff 	mov.w	r0, #4294967295
 80033c4:	601a      	str	r2, [r3, #0]
 80033c6:	4770      	bx	lr
 80033c8:	20000320 	.word	0x20000320

080033cc <_read>:
 80033cc:	2258      	movs	r2, #88	; 0x58
 80033ce:	4b02      	ldr	r3, [pc, #8]	; (80033d8 <_read+0xc>)
 80033d0:	f04f 30ff 	mov.w	r0, #4294967295
 80033d4:	601a      	str	r2, [r3, #0]
 80033d6:	4770      	bx	lr
 80033d8:	20000320 	.word	0x20000320

080033dc <_sbrk>:
 80033dc:	4b04      	ldr	r3, [pc, #16]	; (80033f0 <_sbrk+0x14>)
 80033de:	4602      	mov	r2, r0
 80033e0:	6819      	ldr	r1, [r3, #0]
 80033e2:	b909      	cbnz	r1, 80033e8 <_sbrk+0xc>
 80033e4:	4903      	ldr	r1, [pc, #12]	; (80033f4 <_sbrk+0x18>)
 80033e6:	6019      	str	r1, [r3, #0]
 80033e8:	6818      	ldr	r0, [r3, #0]
 80033ea:	4402      	add	r2, r0
 80033ec:	601a      	str	r2, [r3, #0]
 80033ee:	4770      	bx	lr
 80033f0:	20000184 	.word	0x20000184
 80033f4:	20000324 	.word	0x20000324

080033f8 <_init>:
 80033f8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80033fa:	bf00      	nop
 80033fc:	bcf8      	pop	{r3, r4, r5, r6, r7}
 80033fe:	bc08      	pop	{r3}
 8003400:	469e      	mov	lr, r3
 8003402:	4770      	bx	lr

08003404 <_fini>:
 8003404:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8003406:	bf00      	nop
 8003408:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800340a:	bc08      	pop	{r3}
 800340c:	469e      	mov	lr, r3
 800340e:	4770      	bx	lr