STM32F103_RGB_Controller_Bootloader/Debug/STM32F103_RGB_Controller_Bootloader.list

STM32F103_RGB_Controller_Bootloader.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00002be4  080001e4  080001e4  000101e4  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00000134  08002dc8  08002dc8  00012dc8  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  08002efc  08002efc  00012efc  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  08002f00  08002f00  00012f00  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         00000074  20000000  08002f04  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          00000214  20000078  08002f78  00020078  2**3
                  ALLOC
  7 ._user_heap_stack 00000600  2000028c  08002f78  0002028c  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  00020074  2**0
                  CONTENTS, READONLY
  9 .debug_info   000158e4  00000000  00000000  0002009d  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 00002f0b  00000000  00000000  00035981  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    00007358  00000000  00000000  0003888c  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 00000a08  00000000  00000000  0003fbe8  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00000d70  00000000  00000000  000405f0  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   00006120  00000000  00000000  00041360  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    00003f81  00000000  00000000  00047480  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  0004b401  2**0
                  CONTENTS, READONLY
 17 .debug_frame  00002518  00000000  00000000  0004b480  2**2
                  CONTENTS, READONLY, DEBUGGING
 18 .stab         00000084  00000000  00000000  0004d998  2**2
                  CONTENTS, READONLY, DEBUGGING
 19 .stabstr      00000117  00000000  00000000  0004da1c  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080001e4 <__do_global_dtors_aux>:
 80001e4:	b510      	push	{r4, lr}
 80001e6:	4c05      	ldr	r4, [pc, #20]	; (80001fc <__do_global_dtors_aux+0x18>)
 80001e8:	7823      	ldrb	r3, [r4, #0]
 80001ea:	b933      	cbnz	r3, 80001fa <__do_global_dtors_aux+0x16>
 80001ec:	4b04      	ldr	r3, [pc, #16]	; (8000200 <__do_global_dtors_aux+0x1c>)
 80001ee:	b113      	cbz	r3, 80001f6 <__do_global_dtors_aux+0x12>
 80001f0:	4804      	ldr	r0, [pc, #16]	; (8000204 <__do_global_dtors_aux+0x20>)
 80001f2:	f3af 8000 	nop.w
 80001f6:	2301      	movs	r3, #1
 80001f8:	7023      	strb	r3, [r4, #0]
 80001fa:	bd10      	pop	{r4, pc}
 80001fc:	20000078 	.word	0x20000078
 8000200:	00000000 	.word	0x00000000
 8000204:	08002db0 	.word	0x08002db0

08000208 <frame_dummy>:
 8000208:	b508      	push	{r3, lr}
 800020a:	4b03      	ldr	r3, [pc, #12]	; (8000218 <frame_dummy+0x10>)
 800020c:	b11b      	cbz	r3, 8000216 <frame_dummy+0xe>
 800020e:	4903      	ldr	r1, [pc, #12]	; (800021c <frame_dummy+0x14>)
 8000210:	4803      	ldr	r0, [pc, #12]	; (8000220 <frame_dummy+0x18>)
 8000212:	f3af 8000 	nop.w
 8000216:	bd08      	pop	{r3, pc}
 8000218:	00000000 	.word	0x00000000
 800021c:	2000007c 	.word	0x2000007c
 8000220:	08002db0 	.word	0x08002db0

08000224 <__aeabi_llsr>:
 8000224:	40d0      	lsrs	r0, r2
 8000226:	1c0b      	adds	r3, r1, #0
 8000228:	40d1      	lsrs	r1, r2
 800022a:	469c      	mov	ip, r3
 800022c:	3a20      	subs	r2, #32
 800022e:	40d3      	lsrs	r3, r2
 8000230:	4318      	orrs	r0, r3
 8000232:	4252      	negs	r2, r2
 8000234:	4663      	mov	r3, ip
 8000236:	4093      	lsls	r3, r2
 8000238:	4318      	orrs	r0, r3
 800023a:	4770      	bx	lr

0800023c <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 800023c:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800023e:	4b0e      	ldr	r3, [pc, #56]	; (8000278 <HAL_InitTick+0x3c>)
{
 8000240:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8000242:	7818      	ldrb	r0, [r3, #0]
 8000244:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8000248:	fbb3 f3f0 	udiv	r3, r3, r0
 800024c:	4a0b      	ldr	r2, [pc, #44]	; (800027c <HAL_InitTick+0x40>)
 800024e:	6810      	ldr	r0, [r2, #0]
 8000250:	fbb0 f0f3 	udiv	r0, r0, r3
 8000254:	f000 f89e 	bl	8000394 <HAL_SYSTICK_Config>
 8000258:	4604      	mov	r4, r0
 800025a:	b958      	cbnz	r0, 8000274 <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 800025c:	2d0f      	cmp	r5, #15
 800025e:	d809      	bhi.n	8000274 <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8000260:	4602      	mov	r2, r0
 8000262:	4629      	mov	r1, r5
 8000264:	f04f 30ff 	mov.w	r0, #4294967295
 8000268:	f000 f854 	bl	8000314 <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 800026c:	4b04      	ldr	r3, [pc, #16]	; (8000280 <HAL_InitTick+0x44>)
 800026e:	4620      	mov	r0, r4
 8000270:	601d      	str	r5, [r3, #0]
 8000272:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 8000274:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 8000276:	bd38      	pop	{r3, r4, r5, pc}
 8000278:	20000000 	.word	0x20000000
 800027c:	2000000c 	.word	0x2000000c
 8000280:	20000004 	.word	0x20000004

08000284 <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000284:	4a07      	ldr	r2, [pc, #28]	; (80002a4 <HAL_Init+0x20>)
{
 8000286:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000288:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800028a:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 800028c:	f043 0310 	orr.w	r3, r3, #16
 8000290:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8000292:	f000 f82d 	bl	80002f0 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 8000296:	2000      	movs	r0, #0
 8000298:	f7ff ffd0 	bl	800023c <HAL_InitTick>
  HAL_MspInit();
 800029c:	f001 fc2c 	bl	8001af8 <HAL_MspInit>
}
 80002a0:	2000      	movs	r0, #0
 80002a2:	bd08      	pop	{r3, pc}
 80002a4:	40022000 	.word	0x40022000

080002a8 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 80002a8:	4a03      	ldr	r2, [pc, #12]	; (80002b8 <HAL_IncTick+0x10>)
 80002aa:	4b04      	ldr	r3, [pc, #16]	; (80002bc <HAL_IncTick+0x14>)
 80002ac:	6811      	ldr	r1, [r2, #0]
 80002ae:	781b      	ldrb	r3, [r3, #0]
 80002b0:	440b      	add	r3, r1
 80002b2:	6013      	str	r3, [r2, #0]
 80002b4:	4770      	bx	lr
 80002b6:	bf00      	nop
 80002b8:	200000d0 	.word	0x200000d0
 80002bc:	20000000 	.word	0x20000000

080002c0 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80002c0:	4b01      	ldr	r3, [pc, #4]	; (80002c8 <HAL_GetTick+0x8>)
 80002c2:	6818      	ldr	r0, [r3, #0]
}
 80002c4:	4770      	bx	lr
 80002c6:	bf00      	nop
 80002c8:	200000d0 	.word	0x200000d0

080002cc <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80002cc:	b538      	push	{r3, r4, r5, lr}
 80002ce:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80002d0:	f7ff fff6 	bl	80002c0 <HAL_GetTick>
 80002d4:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80002d6:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80002d8:	bf1e      	ittt	ne
 80002da:	4b04      	ldrne	r3, [pc, #16]	; (80002ec <HAL_Delay+0x20>)
 80002dc:	781b      	ldrbne	r3, [r3, #0]
 80002de:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80002e0:	f7ff ffee 	bl	80002c0 <HAL_GetTick>
 80002e4:	1b40      	subs	r0, r0, r5
 80002e6:	4284      	cmp	r4, r0
 80002e8:	d8fa      	bhi.n	80002e0 <HAL_Delay+0x14>
  {
  }
}
 80002ea:	bd38      	pop	{r3, r4, r5, pc}
 80002ec:	20000000 	.word	0x20000000

080002f0 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002f0:	4a07      	ldr	r2, [pc, #28]	; (8000310 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002f2:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002f4:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002f6:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 80002fa:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 80002fe:	041b      	lsls	r3, r3, #16
 8000300:	0c1b      	lsrs	r3, r3, #16
 8000302:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 8000306:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 800030a:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 800030c:	60d3      	str	r3, [r2, #12]
 800030e:	4770      	bx	lr
 8000310:	e000ed00 	.word	0xe000ed00

08000314 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8000314:	4b17      	ldr	r3, [pc, #92]	; (8000374 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 8000316:	b530      	push	{r4, r5, lr}
 8000318:	68dc      	ldr	r4, [r3, #12]
 800031a:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 800031e:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000322:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8000324:	2b04      	cmp	r3, #4
 8000326:	bf28      	it	cs
 8000328:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800032a:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800032c:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000330:	bf98      	it	ls
 8000332:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000334:	fa05 f303 	lsl.w	r3, r5, r3
 8000338:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800033c:	bf88      	it	hi
 800033e:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000340:	4019      	ands	r1, r3
 8000342:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8000344:	fa05 f404 	lsl.w	r4, r5, r4
 8000348:	3c01      	subs	r4, #1
 800034a:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 800034c:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800034e:	ea42 0201 	orr.w	r2, r2, r1
 8000352:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000356:	bfaf      	iteee	ge
 8000358:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800035c:	4b06      	ldrlt	r3, [pc, #24]	; (8000378 <HAL_NVIC_SetPriority+0x64>)
 800035e:	f000 000f 	andlt.w	r0, r0, #15
 8000362:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000364:	bfa5      	ittet	ge
 8000366:	b2d2      	uxtbge	r2, r2
 8000368:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800036c:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800036e:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 8000372:	bd30      	pop	{r4, r5, pc}
 8000374:	e000ed00 	.word	0xe000ed00
 8000378:	e000ed14 	.word	0xe000ed14

0800037c <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 800037c:	2301      	movs	r3, #1
 800037e:	0942      	lsrs	r2, r0, #5
 8000380:	f000 001f 	and.w	r0, r0, #31
 8000384:	fa03 f000 	lsl.w	r0, r3, r0
 8000388:	4b01      	ldr	r3, [pc, #4]	; (8000390 <HAL_NVIC_EnableIRQ+0x14>)
 800038a:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 800038e:	4770      	bx	lr
 8000390:	e000e100 	.word	0xe000e100

08000394 <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 8000394:	3801      	subs	r0, #1
 8000396:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 800039a:	d20a      	bcs.n	80003b2 <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800039c:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800039e:	4b06      	ldr	r3, [pc, #24]	; (80003b8 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80003a0:	4a06      	ldr	r2, [pc, #24]	; (80003bc <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 80003a2:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80003a4:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80003a8:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80003aa:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80003ac:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80003ae:	601a      	str	r2, [r3, #0]
 80003b0:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 80003b2:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 80003b4:	4770      	bx	lr
 80003b6:	bf00      	nop
 80003b8:	e000e010 	.word	0xe000e010
 80003bc:	e000ed00 	.word	0xe000ed00

080003c0 <HAL_DMA_Abort_IT>:
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{  
  HAL_StatusTypeDef status = HAL_OK;
  
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003c0:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 80003c4:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003c6:	2b02      	cmp	r3, #2
 80003c8:	d003      	beq.n	80003d2 <HAL_DMA_Abort_IT+0x12>
  {
    /* no transfer ongoing */
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80003ca:	2304      	movs	r3, #4
 80003cc:	6383      	str	r3, [r0, #56]	; 0x38
        
    status = HAL_ERROR;
 80003ce:	2001      	movs	r0, #1
 80003d0:	bd10      	pop	{r4, pc}
  }
  else
  { 
    /* Disable DMA IT */
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80003d2:	6803      	ldr	r3, [r0, #0]
 80003d4:	681a      	ldr	r2, [r3, #0]
 80003d6:	f022 020e 	bic.w	r2, r2, #14
 80003da:	601a      	str	r2, [r3, #0]

    /* Disable the channel */
    __HAL_DMA_DISABLE(hdma);
 80003dc:	681a      	ldr	r2, [r3, #0]
 80003de:	f022 0201 	bic.w	r2, r2, #1
 80003e2:	601a      	str	r2, [r3, #0]

    /* Clear all flags */
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 80003e4:	4a29      	ldr	r2, [pc, #164]	; (800048c <HAL_DMA_Abort_IT+0xcc>)
 80003e6:	4293      	cmp	r3, r2
 80003e8:	d924      	bls.n	8000434 <HAL_DMA_Abort_IT+0x74>
 80003ea:	f502 7262 	add.w	r2, r2, #904	; 0x388
 80003ee:	4293      	cmp	r3, r2
 80003f0:	d019      	beq.n	8000426 <HAL_DMA_Abort_IT+0x66>
 80003f2:	3214      	adds	r2, #20
 80003f4:	4293      	cmp	r3, r2
 80003f6:	d018      	beq.n	800042a <HAL_DMA_Abort_IT+0x6a>
 80003f8:	3214      	adds	r2, #20
 80003fa:	4293      	cmp	r3, r2
 80003fc:	d017      	beq.n	800042e <HAL_DMA_Abort_IT+0x6e>
 80003fe:	3214      	adds	r2, #20
 8000400:	4293      	cmp	r3, r2
 8000402:	bf0c      	ite	eq
 8000404:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 8000408:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 800040c:	4a20      	ldr	r2, [pc, #128]	; (8000490 <HAL_DMA_Abort_IT+0xd0>)
 800040e:	6053      	str	r3, [r2, #4]

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 8000410:	2301      	movs	r3, #1

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8000412:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 8000414:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21

    /* Call User Abort callback */
    if(hdma->XferAbortCallback != NULL)
 8000418:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 800041a:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 800041e:	b39b      	cbz	r3, 8000488 <HAL_DMA_Abort_IT+0xc8>
    {
      hdma->XferAbortCallback(hdma);
 8000420:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8000422:	4620      	mov	r0, r4
 8000424:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8000426:	2301      	movs	r3, #1
 8000428:	e7f0      	b.n	800040c <HAL_DMA_Abort_IT+0x4c>
 800042a:	2310      	movs	r3, #16
 800042c:	e7ee      	b.n	800040c <HAL_DMA_Abort_IT+0x4c>
 800042e:	f44f 7380 	mov.w	r3, #256	; 0x100
 8000432:	e7eb      	b.n	800040c <HAL_DMA_Abort_IT+0x4c>
 8000434:	4917      	ldr	r1, [pc, #92]	; (8000494 <HAL_DMA_Abort_IT+0xd4>)
 8000436:	428b      	cmp	r3, r1
 8000438:	d016      	beq.n	8000468 <HAL_DMA_Abort_IT+0xa8>
 800043a:	3114      	adds	r1, #20
 800043c:	428b      	cmp	r3, r1
 800043e:	d015      	beq.n	800046c <HAL_DMA_Abort_IT+0xac>
 8000440:	3114      	adds	r1, #20
 8000442:	428b      	cmp	r3, r1
 8000444:	d014      	beq.n	8000470 <HAL_DMA_Abort_IT+0xb0>
 8000446:	3114      	adds	r1, #20
 8000448:	428b      	cmp	r3, r1
 800044a:	d014      	beq.n	8000476 <HAL_DMA_Abort_IT+0xb6>
 800044c:	3114      	adds	r1, #20
 800044e:	428b      	cmp	r3, r1
 8000450:	d014      	beq.n	800047c <HAL_DMA_Abort_IT+0xbc>
 8000452:	3114      	adds	r1, #20
 8000454:	428b      	cmp	r3, r1
 8000456:	d014      	beq.n	8000482 <HAL_DMA_Abort_IT+0xc2>
 8000458:	4293      	cmp	r3, r2
 800045a:	bf14      	ite	ne
 800045c:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8000460:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 8000464:	4a0c      	ldr	r2, [pc, #48]	; (8000498 <HAL_DMA_Abort_IT+0xd8>)
 8000466:	e7d2      	b.n	800040e <HAL_DMA_Abort_IT+0x4e>
 8000468:	2301      	movs	r3, #1
 800046a:	e7fb      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 800046c:	2310      	movs	r3, #16
 800046e:	e7f9      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 8000470:	f44f 7380 	mov.w	r3, #256	; 0x100
 8000474:	e7f6      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 8000476:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 800047a:	e7f3      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 800047c:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 8000480:	e7f0      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
 8000482:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 8000486:	e7ed      	b.n	8000464 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 8000488:	4618      	mov	r0, r3
    } 
  }
  return status;
}
 800048a:	bd10      	pop	{r4, pc}
 800048c:	40020080 	.word	0x40020080
 8000490:	40020400 	.word	0x40020400
 8000494:	40020008 	.word	0x40020008
 8000498:	40020000 	.word	0x40020000

0800049c <FLASH_SetErrorCode>:
  uint32_t flags = 0U;
  
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
 800049c:	4a11      	ldr	r2, [pc, #68]	; (80004e4 <FLASH_SetErrorCode+0x48>)
 800049e:	68d3      	ldr	r3, [r2, #12]
 80004a0:	f013 0310 	ands.w	r3, r3, #16
 80004a4:	d005      	beq.n	80004b2 <FLASH_SetErrorCode+0x16>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
 80004a6:	4910      	ldr	r1, [pc, #64]	; (80004e8 <FLASH_SetErrorCode+0x4c>)
 80004a8:	69cb      	ldr	r3, [r1, #28]
 80004aa:	f043 0302 	orr.w	r3, r3, #2
 80004ae:	61cb      	str	r3, [r1, #28]
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
    flags |= FLASH_FLAG_WRPERR;
 80004b0:	2310      	movs	r3, #16
#endif /* FLASH_BANK2_END */
  }
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 80004b2:	68d2      	ldr	r2, [r2, #12]
 80004b4:	0750      	lsls	r0, r2, #29
 80004b6:	d506      	bpl.n	80004c6 <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 80004b8:	490b      	ldr	r1, [pc, #44]	; (80004e8 <FLASH_SetErrorCode+0x4c>)
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
    flags |= FLASH_FLAG_PGERR;
 80004ba:	f043 0304 	orr.w	r3, r3, #4
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 80004be:	69ca      	ldr	r2, [r1, #28]
 80004c0:	f042 0201 	orr.w	r2, r2, #1
 80004c4:	61ca      	str	r2, [r1, #28]
#endif /* FLASH_BANK2_END */
  }
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
 80004c6:	4a07      	ldr	r2, [pc, #28]	; (80004e4 <FLASH_SetErrorCode+0x48>)
 80004c8:	69d1      	ldr	r1, [r2, #28]
 80004ca:	07c9      	lsls	r1, r1, #31
 80004cc:	d508      	bpl.n	80004e0 <FLASH_SetErrorCode+0x44>
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
 80004ce:	4806      	ldr	r0, [pc, #24]	; (80004e8 <FLASH_SetErrorCode+0x4c>)
 80004d0:	69c1      	ldr	r1, [r0, #28]
 80004d2:	f041 0104 	orr.w	r1, r1, #4
 80004d6:	61c1      	str	r1, [r0, #28]
  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
 80004d8:	69d1      	ldr	r1, [r2, #28]
 80004da:	f021 0101 	bic.w	r1, r1, #1
 80004de:	61d1      	str	r1, [r2, #28]
  }

  /* Clear FLASH error pending bits */
  __HAL_FLASH_CLEAR_FLAG(flags);
 80004e0:	60d3      	str	r3, [r2, #12]
 80004e2:	4770      	bx	lr
 80004e4:	40022000 	.word	0x40022000
 80004e8:	200000d8 	.word	0x200000d8

080004ec <HAL_FLASH_Unlock>:
  if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 80004ec:	4b06      	ldr	r3, [pc, #24]	; (8000508 <HAL_FLASH_Unlock+0x1c>)
 80004ee:	6918      	ldr	r0, [r3, #16]
 80004f0:	f010 0080 	ands.w	r0, r0, #128	; 0x80
 80004f4:	d007      	beq.n	8000506 <HAL_FLASH_Unlock+0x1a>
    WRITE_REG(FLASH->KEYR, FLASH_KEY1);
 80004f6:	4a05      	ldr	r2, [pc, #20]	; (800050c <HAL_FLASH_Unlock+0x20>)
 80004f8:	605a      	str	r2, [r3, #4]
    WRITE_REG(FLASH->KEYR, FLASH_KEY2);
 80004fa:	f102 3288 	add.w	r2, r2, #2290649224	; 0x88888888
 80004fe:	605a      	str	r2, [r3, #4]
    if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8000500:	6918      	ldr	r0, [r3, #16]
  HAL_StatusTypeDef status = HAL_OK;
 8000502:	f3c0 10c0 	ubfx	r0, r0, #7, #1
}
 8000506:	4770      	bx	lr
 8000508:	40022000 	.word	0x40022000
 800050c:	45670123 	.word	0x45670123

08000510 <HAL_FLASH_Lock>:
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8000510:	4a03      	ldr	r2, [pc, #12]	; (8000520 <HAL_FLASH_Lock+0x10>)
}
 8000512:	2000      	movs	r0, #0
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8000514:	6913      	ldr	r3, [r2, #16]
 8000516:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800051a:	6113      	str	r3, [r2, #16]
}
 800051c:	4770      	bx	lr
 800051e:	bf00      	nop
 8000520:	40022000 	.word	0x40022000

08000524 <FLASH_WaitForLastOperation>:
{
 8000524:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8000526:	4606      	mov	r6, r0
  uint32_t tickstart = HAL_GetTick();
 8000528:	f7ff feca 	bl	80002c0 <HAL_GetTick>
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 800052c:	4c11      	ldr	r4, [pc, #68]	; (8000574 <FLASH_WaitForLastOperation+0x50>)
  uint32_t tickstart = HAL_GetTick();
 800052e:	4607      	mov	r7, r0
 8000530:	4625      	mov	r5, r4
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 8000532:	68e3      	ldr	r3, [r4, #12]
 8000534:	07d8      	lsls	r0, r3, #31
 8000536:	d412      	bmi.n	800055e <FLASH_WaitForLastOperation+0x3a>
  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
 8000538:	68e3      	ldr	r3, [r4, #12]
 800053a:	0699      	lsls	r1, r3, #26
    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
 800053c:	bf44      	itt	mi
 800053e:	2320      	movmi	r3, #32
 8000540:	60e3      	strmi	r3, [r4, #12]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 8000542:	68eb      	ldr	r3, [r5, #12]
 8000544:	06da      	lsls	r2, r3, #27
 8000546:	d406      	bmi.n	8000556 <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8000548:	69eb      	ldr	r3, [r5, #28]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 800054a:	07db      	lsls	r3, r3, #31
 800054c:	d403      	bmi.n	8000556 <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 800054e:	68e8      	ldr	r0, [r5, #12]
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8000550:	f010 0004 	ands.w	r0, r0, #4
 8000554:	d002      	beq.n	800055c <FLASH_WaitForLastOperation+0x38>
    FLASH_SetErrorCode();
 8000556:	f7ff ffa1 	bl	800049c <FLASH_SetErrorCode>
    return HAL_ERROR;
 800055a:	2001      	movs	r0, #1
}
 800055c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if (Timeout != HAL_MAX_DELAY)
 800055e:	1c73      	adds	r3, r6, #1
 8000560:	d0e7      	beq.n	8000532 <FLASH_WaitForLastOperation+0xe>
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8000562:	b90e      	cbnz	r6, 8000568 <FLASH_WaitForLastOperation+0x44>
        return HAL_TIMEOUT;
 8000564:	2003      	movs	r0, #3
 8000566:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8000568:	f7ff feaa 	bl	80002c0 <HAL_GetTick>
 800056c:	1bc0      	subs	r0, r0, r7
 800056e:	4286      	cmp	r6, r0
 8000570:	d2df      	bcs.n	8000532 <FLASH_WaitForLastOperation+0xe>
 8000572:	e7f7      	b.n	8000564 <FLASH_WaitForLastOperation+0x40>
 8000574:	40022000 	.word	0x40022000

08000578 <HAL_FLASH_Program>:
{
 8000578:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  __HAL_LOCK(&pFlash);
 800057c:	4c1f      	ldr	r4, [pc, #124]	; (80005fc <HAL_FLASH_Program+0x84>)
{
 800057e:	4699      	mov	r9, r3
  __HAL_LOCK(&pFlash);
 8000580:	7e23      	ldrb	r3, [r4, #24]
{
 8000582:	4605      	mov	r5, r0
  __HAL_LOCK(&pFlash);
 8000584:	2b01      	cmp	r3, #1
{
 8000586:	460f      	mov	r7, r1
 8000588:	4690      	mov	r8, r2
  __HAL_LOCK(&pFlash);
 800058a:	d033      	beq.n	80005f4 <HAL_FLASH_Program+0x7c>
 800058c:	2301      	movs	r3, #1
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 800058e:	f24c 3050 	movw	r0, #50000	; 0xc350
  __HAL_LOCK(&pFlash);
 8000592:	7623      	strb	r3, [r4, #24]
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8000594:	f7ff ffc6 	bl	8000524 <FLASH_WaitForLastOperation>
  if(status == HAL_OK)
 8000598:	bb40      	cbnz	r0, 80005ec <HAL_FLASH_Program+0x74>
    if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
 800059a:	2d01      	cmp	r5, #1
 800059c:	d003      	beq.n	80005a6 <HAL_FLASH_Program+0x2e>
      nbiterations = 4U;
 800059e:	2d02      	cmp	r5, #2
 80005a0:	bf0c      	ite	eq
 80005a2:	2502      	moveq	r5, #2
 80005a4:	2504      	movne	r5, #4
 80005a6:	2600      	movs	r6, #0
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 80005a8:	46b2      	mov	sl, r6
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 80005aa:	f8df b054 	ldr.w	fp, [pc, #84]	; 8000600 <HAL_FLASH_Program+0x88>
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 80005ae:	0132      	lsls	r2, r6, #4
 80005b0:	4640      	mov	r0, r8
 80005b2:	4649      	mov	r1, r9
 80005b4:	f7ff fe36 	bl	8000224 <__aeabi_llsr>
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 80005b8:	f8c4 a01c 	str.w	sl, [r4, #28]
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 80005bc:	f8db 3010 	ldr.w	r3, [fp, #16]
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 80005c0:	b280      	uxth	r0, r0
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 80005c2:	f043 0301 	orr.w	r3, r3, #1
 80005c6:	f8cb 3010 	str.w	r3, [fp, #16]
  *(__IO uint16_t*)Address = Data;
 80005ca:	f827 0016 	strh.w	r0, [r7, r6, lsl #1]
        status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 80005ce:	f24c 3050 	movw	r0, #50000	; 0xc350
 80005d2:	f7ff ffa7 	bl	8000524 <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
 80005d6:	f8db 3010 	ldr.w	r3, [fp, #16]
 80005da:	f023 0301 	bic.w	r3, r3, #1
 80005de:	f8cb 3010 	str.w	r3, [fp, #16]
      if (status != HAL_OK)
 80005e2:	b918      	cbnz	r0, 80005ec <HAL_FLASH_Program+0x74>
 80005e4:	3601      	adds	r6, #1
    for (index = 0U; index < nbiterations; index++)
 80005e6:	b2f3      	uxtb	r3, r6
 80005e8:	429d      	cmp	r5, r3
 80005ea:	d8e0      	bhi.n	80005ae <HAL_FLASH_Program+0x36>
  __HAL_UNLOCK(&pFlash);
 80005ec:	2300      	movs	r3, #0
 80005ee:	7623      	strb	r3, [r4, #24]
  return status;
 80005f0:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
  __HAL_LOCK(&pFlash);
 80005f4:	2002      	movs	r0, #2
}
 80005f6:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80005fa:	bf00      	nop
 80005fc:	200000d8 	.word	0x200000d8
 8000600:	40022000 	.word	0x40022000

08000604 <FLASH_MassErase.isra.0>:
{
  /* Check the parameters */
  assert_param(IS_FLASH_BANK(Banks));

  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8000604:	2200      	movs	r2, #0
 8000606:	4b06      	ldr	r3, [pc, #24]	; (8000620 <FLASH_MassErase.isra.0+0x1c>)
 8000608:	61da      	str	r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
  /* Prevent unused argument(s) compilation warning */
  UNUSED(Banks);
#endif /* FLASH_BANK2_END */  
    /* Only bank1 will be erased*/
    SET_BIT(FLASH->CR, FLASH_CR_MER);
 800060a:	4b06      	ldr	r3, [pc, #24]	; (8000624 <FLASH_MassErase.isra.0+0x20>)
 800060c:	691a      	ldr	r2, [r3, #16]
 800060e:	f042 0204 	orr.w	r2, r2, #4
 8000612:	611a      	str	r2, [r3, #16]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 8000614:	691a      	ldr	r2, [r3, #16]
 8000616:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 800061a:	611a      	str	r2, [r3, #16]
 800061c:	4770      	bx	lr
 800061e:	bf00      	nop
 8000620:	200000d8 	.word	0x200000d8
 8000624:	40022000 	.word	0x40022000

08000628 <FLASH_PageErase>:
  * @retval None
  */
void FLASH_PageErase(uint32_t PageAddress)
{
  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8000628:	2200      	movs	r2, #0
 800062a:	4b06      	ldr	r3, [pc, #24]	; (8000644 <FLASH_PageErase+0x1c>)
 800062c:	61da      	str	r2, [r3, #28]
  }
  else
  {
#endif /* FLASH_BANK2_END */
    /* Proceed to erase the page */
    SET_BIT(FLASH->CR, FLASH_CR_PER);
 800062e:	4b06      	ldr	r3, [pc, #24]	; (8000648 <FLASH_PageErase+0x20>)
 8000630:	691a      	ldr	r2, [r3, #16]
 8000632:	f042 0202 	orr.w	r2, r2, #2
 8000636:	611a      	str	r2, [r3, #16]
    WRITE_REG(FLASH->AR, PageAddress);
 8000638:	6158      	str	r0, [r3, #20]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 800063a:	691a      	ldr	r2, [r3, #16]
 800063c:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8000640:	611a      	str	r2, [r3, #16]
 8000642:	4770      	bx	lr
 8000644:	200000d8 	.word	0x200000d8
 8000648:	40022000 	.word	0x40022000

0800064c <HAL_FLASHEx_Erase>:
{
 800064c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  __HAL_LOCK(&pFlash);
 8000650:	4d23      	ldr	r5, [pc, #140]	; (80006e0 <HAL_FLASHEx_Erase+0x94>)
{
 8000652:	4607      	mov	r7, r0
  __HAL_LOCK(&pFlash);
 8000654:	7e2b      	ldrb	r3, [r5, #24]
{
 8000656:	4688      	mov	r8, r1
  __HAL_LOCK(&pFlash);
 8000658:	2b01      	cmp	r3, #1
 800065a:	d03d      	beq.n	80006d8 <HAL_FLASHEx_Erase+0x8c>
 800065c:	2401      	movs	r4, #1
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 800065e:	6803      	ldr	r3, [r0, #0]
  __HAL_LOCK(&pFlash);
 8000660:	762c      	strb	r4, [r5, #24]
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 8000662:	2b02      	cmp	r3, #2
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 8000664:	f24c 3050 	movw	r0, #50000	; 0xc350
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 8000668:	d113      	bne.n	8000692 <HAL_FLASHEx_Erase+0x46>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 800066a:	f7ff ff5b 	bl	8000524 <FLASH_WaitForLastOperation>
 800066e:	b120      	cbz	r0, 800067a <HAL_FLASHEx_Erase+0x2e>
  HAL_StatusTypeDef status = HAL_ERROR;
 8000670:	2001      	movs	r0, #1
  __HAL_UNLOCK(&pFlash);
 8000672:	2300      	movs	r3, #0
 8000674:	762b      	strb	r3, [r5, #24]
  return status;
 8000676:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        FLASH_MassErase(FLASH_BANK_1);
 800067a:	f7ff ffc3 	bl	8000604 <FLASH_MassErase.isra.0>
        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 800067e:	f24c 3050 	movw	r0, #50000	; 0xc350
 8000682:	f7ff ff4f 	bl	8000524 <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
 8000686:	4a17      	ldr	r2, [pc, #92]	; (80006e4 <HAL_FLASHEx_Erase+0x98>)
 8000688:	6913      	ldr	r3, [r2, #16]
 800068a:	f023 0304 	bic.w	r3, r3, #4
 800068e:	6113      	str	r3, [r2, #16]
 8000690:	e7ef      	b.n	8000672 <HAL_FLASHEx_Erase+0x26>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 8000692:	f7ff ff47 	bl	8000524 <FLASH_WaitForLastOperation>
 8000696:	2800      	cmp	r0, #0
 8000698:	d1ea      	bne.n	8000670 <HAL_FLASHEx_Erase+0x24>
        *PageError = 0xFFFFFFFFU;
 800069a:	f04f 33ff 	mov.w	r3, #4294967295
 800069e:	f8c8 3000 	str.w	r3, [r8]
  HAL_StatusTypeDef status = HAL_ERROR;
 80006a2:	4620      	mov	r0, r4
        for(address = pEraseInit->PageAddress;
 80006a4:	68be      	ldr	r6, [r7, #8]
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 80006a6:	4c0f      	ldr	r4, [pc, #60]	; (80006e4 <HAL_FLASHEx_Erase+0x98>)
            address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
 80006a8:	68fa      	ldr	r2, [r7, #12]
 80006aa:	68bb      	ldr	r3, [r7, #8]
 80006ac:	eb03 23c2 	add.w	r3, r3, r2, lsl #11
        for(address = pEraseInit->PageAddress;
 80006b0:	429e      	cmp	r6, r3
 80006b2:	d2de      	bcs.n	8000672 <HAL_FLASHEx_Erase+0x26>
          FLASH_PageErase(address);
 80006b4:	4630      	mov	r0, r6
 80006b6:	f7ff ffb7 	bl	8000628 <FLASH_PageErase>
          status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 80006ba:	f24c 3050 	movw	r0, #50000	; 0xc350
 80006be:	f7ff ff31 	bl	8000524 <FLASH_WaitForLastOperation>
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 80006c2:	6923      	ldr	r3, [r4, #16]
 80006c4:	f023 0302 	bic.w	r3, r3, #2
 80006c8:	6123      	str	r3, [r4, #16]
          if (status != HAL_OK)
 80006ca:	b110      	cbz	r0, 80006d2 <HAL_FLASHEx_Erase+0x86>
            *PageError = address;
 80006cc:	f8c8 6000 	str.w	r6, [r8]
            break;
 80006d0:	e7cf      	b.n	8000672 <HAL_FLASHEx_Erase+0x26>
            address += FLASH_PAGE_SIZE)
 80006d2:	f506 6600 	add.w	r6, r6, #2048	; 0x800
 80006d6:	e7e7      	b.n	80006a8 <HAL_FLASHEx_Erase+0x5c>
  __HAL_LOCK(&pFlash);
 80006d8:	2002      	movs	r0, #2
}
 80006da:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80006de:	bf00      	nop
 80006e0:	200000d8 	.word	0x200000d8
 80006e4:	40022000 	.word	0x40022000

080006e8 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 80006e8:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 80006ec:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 80006ee:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 80006f0:	4f6c      	ldr	r7, [pc, #432]	; (80008a4 <HAL_GPIO_Init+0x1bc>)
 80006f2:	4b6d      	ldr	r3, [pc, #436]	; (80008a8 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80006f4:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 80008b0 <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 80006f8:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 80008b4 <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 80006fc:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000700:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 8000702:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000706:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 800070a:	45a0      	cmp	r8, r4
 800070c:	f040 8085 	bne.w	800081a <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 8000710:	684d      	ldr	r5, [r1, #4]
 8000712:	2d12      	cmp	r5, #18
 8000714:	f000 80b7 	beq.w	8000886 <HAL_GPIO_Init+0x19e>
 8000718:	f200 808d 	bhi.w	8000836 <HAL_GPIO_Init+0x14e>
 800071c:	2d02      	cmp	r5, #2
 800071e:	f000 80af 	beq.w	8000880 <HAL_GPIO_Init+0x198>
 8000722:	f200 8081 	bhi.w	8000828 <HAL_GPIO_Init+0x140>
 8000726:	2d00      	cmp	r5, #0
 8000728:	f000 8091 	beq.w	800084e <HAL_GPIO_Init+0x166>
 800072c:	2d01      	cmp	r5, #1
 800072e:	f000 80a5 	beq.w	800087c <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8000732:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8000736:	2cff      	cmp	r4, #255	; 0xff
 8000738:	bf93      	iteet	ls
 800073a:	4682      	movls	sl, r0
 800073c:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 8000740:	3d08      	subhi	r5, #8
 8000742:	f8d0 b000 	ldrls.w	fp, [r0]
 8000746:	bf92      	itee	ls
 8000748:	00b5      	lslls	r5, r6, #2
 800074a:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 800074e:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8000750:	fa09 f805 	lsl.w	r8, r9, r5
 8000754:	ea2b 0808 	bic.w	r8, fp, r8
 8000758:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 800075c:	bf88      	it	hi
 800075e:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8000762:	ea48 0505 	orr.w	r5, r8, r5
 8000766:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 800076a:	f8d1 a004 	ldr.w	sl, [r1, #4]
 800076e:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 8000772:	d052      	beq.n	800081a <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000774:	69bd      	ldr	r5, [r7, #24]
 8000776:	f026 0803 	bic.w	r8, r6, #3
 800077a:	f045 0501 	orr.w	r5, r5, #1
 800077e:	61bd      	str	r5, [r7, #24]
 8000780:	69bd      	ldr	r5, [r7, #24]
 8000782:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 8000786:	f005 0501 	and.w	r5, r5, #1
 800078a:	9501      	str	r5, [sp, #4]
 800078c:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8000790:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000794:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8000796:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 800079a:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 800079e:	fa09 f90b 	lsl.w	r9, r9, fp
 80007a2:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80007a6:	4d41      	ldr	r5, [pc, #260]	; (80008ac <HAL_GPIO_Init+0x1c4>)
 80007a8:	42a8      	cmp	r0, r5
 80007aa:	d071      	beq.n	8000890 <HAL_GPIO_Init+0x1a8>
 80007ac:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80007b0:	42a8      	cmp	r0, r5
 80007b2:	d06f      	beq.n	8000894 <HAL_GPIO_Init+0x1ac>
 80007b4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80007b8:	42a8      	cmp	r0, r5
 80007ba:	d06d      	beq.n	8000898 <HAL_GPIO_Init+0x1b0>
 80007bc:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80007c0:	42a8      	cmp	r0, r5
 80007c2:	d06b      	beq.n	800089c <HAL_GPIO_Init+0x1b4>
 80007c4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80007c8:	42a8      	cmp	r0, r5
 80007ca:	d069      	beq.n	80008a0 <HAL_GPIO_Init+0x1b8>
 80007cc:	4570      	cmp	r0, lr
 80007ce:	bf0c      	ite	eq
 80007d0:	2505      	moveq	r5, #5
 80007d2:	2506      	movne	r5, #6
 80007d4:	fa05 f50b 	lsl.w	r5, r5, fp
 80007d8:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 80007dc:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 80007e0:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 80007e2:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 80007e6:	bf14      	ite	ne
 80007e8:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 80007ea:	43a5      	biceq	r5, r4
 80007ec:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 80007ee:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 80007f0:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 80007f4:	bf14      	ite	ne
 80007f6:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 80007f8:	43a5      	biceq	r5, r4
 80007fa:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 80007fc:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 80007fe:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 8000802:	bf14      	ite	ne
 8000804:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 8000806:	43a5      	biceq	r5, r4
 8000808:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 800080a:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 800080c:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 8000810:	bf14      	ite	ne
 8000812:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 8000814:	ea25 0404 	biceq.w	r4, r5, r4
 8000818:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 800081a:	3601      	adds	r6, #1
 800081c:	2e10      	cmp	r6, #16
 800081e:	f47f af6d 	bne.w	80006fc <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 8000822:	b003      	add	sp, #12
 8000824:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 8000828:	2d03      	cmp	r5, #3
 800082a:	d025      	beq.n	8000878 <HAL_GPIO_Init+0x190>
 800082c:	2d11      	cmp	r5, #17
 800082e:	d180      	bne.n	8000732 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 8000830:	68ca      	ldr	r2, [r1, #12]
 8000832:	3204      	adds	r2, #4
          break;
 8000834:	e77d      	b.n	8000732 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8000836:	4565      	cmp	r5, ip
 8000838:	d009      	beq.n	800084e <HAL_GPIO_Init+0x166>
 800083a:	d812      	bhi.n	8000862 <HAL_GPIO_Init+0x17a>
 800083c:	f8df 9078 	ldr.w	r9, [pc, #120]	; 80008b8 <HAL_GPIO_Init+0x1d0>
 8000840:	454d      	cmp	r5, r9
 8000842:	d004      	beq.n	800084e <HAL_GPIO_Init+0x166>
 8000844:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8000848:	454d      	cmp	r5, r9
 800084a:	f47f af72 	bne.w	8000732 <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 800084e:	688a      	ldr	r2, [r1, #8]
 8000850:	b1e2      	cbz	r2, 800088c <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 8000852:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 8000854:	bf0c      	ite	eq
 8000856:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 800085a:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 800085e:	2208      	movs	r2, #8
 8000860:	e767      	b.n	8000732 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8000862:	f8df 9058 	ldr.w	r9, [pc, #88]	; 80008bc <HAL_GPIO_Init+0x1d4>
 8000866:	454d      	cmp	r5, r9
 8000868:	d0f1      	beq.n	800084e <HAL_GPIO_Init+0x166>
 800086a:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 800086e:	454d      	cmp	r5, r9
 8000870:	d0ed      	beq.n	800084e <HAL_GPIO_Init+0x166>
 8000872:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 8000876:	e7e7      	b.n	8000848 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8000878:	2200      	movs	r2, #0
 800087a:	e75a      	b.n	8000732 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 800087c:	68ca      	ldr	r2, [r1, #12]
          break;
 800087e:	e758      	b.n	8000732 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 8000880:	68ca      	ldr	r2, [r1, #12]
 8000882:	3208      	adds	r2, #8
          break;
 8000884:	e755      	b.n	8000732 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 8000886:	68ca      	ldr	r2, [r1, #12]
 8000888:	320c      	adds	r2, #12
          break;
 800088a:	e752      	b.n	8000732 <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 800088c:	2204      	movs	r2, #4
 800088e:	e750      	b.n	8000732 <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000890:	2500      	movs	r5, #0
 8000892:	e79f      	b.n	80007d4 <HAL_GPIO_Init+0xec>
 8000894:	2501      	movs	r5, #1
 8000896:	e79d      	b.n	80007d4 <HAL_GPIO_Init+0xec>
 8000898:	2502      	movs	r5, #2
 800089a:	e79b      	b.n	80007d4 <HAL_GPIO_Init+0xec>
 800089c:	2503      	movs	r5, #3
 800089e:	e799      	b.n	80007d4 <HAL_GPIO_Init+0xec>
 80008a0:	2504      	movs	r5, #4
 80008a2:	e797      	b.n	80007d4 <HAL_GPIO_Init+0xec>
 80008a4:	40021000 	.word	0x40021000
 80008a8:	40010400 	.word	0x40010400
 80008ac:	40010800 	.word	0x40010800
 80008b0:	40011c00 	.word	0x40011c00
 80008b4:	10210000 	.word	0x10210000
 80008b8:	10110000 	.word	0x10110000
 80008bc:	10310000 	.word	0x10310000

080008c0 <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 80008c0:	b10a      	cbz	r2, 80008c6 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 80008c2:	6101      	str	r1, [r0, #16]
 80008c4:	4770      	bx	lr
 80008c6:	0409      	lsls	r1, r1, #16
 80008c8:	e7fb      	b.n	80008c2 <HAL_GPIO_WritePin+0x2>

080008ca <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 80008ca:	68c3      	ldr	r3, [r0, #12]
 80008cc:	4059      	eors	r1, r3
 80008ce:	60c1      	str	r1, [r0, #12]
 80008d0:	4770      	bx	lr
	...

080008d4 <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80008d4:	6803      	ldr	r3, [r0, #0]
{
 80008d6:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80008da:	07db      	lsls	r3, r3, #31
{
 80008dc:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80008de:	d410      	bmi.n	8000902 <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 80008e0:	682b      	ldr	r3, [r5, #0]
 80008e2:	079f      	lsls	r7, r3, #30
 80008e4:	d45e      	bmi.n	80009a4 <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 80008e6:	682b      	ldr	r3, [r5, #0]
 80008e8:	0719      	lsls	r1, r3, #28
 80008ea:	f100 8095 	bmi.w	8000a18 <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 80008ee:	682b      	ldr	r3, [r5, #0]
 80008f0:	075a      	lsls	r2, r3, #29
 80008f2:	f100 80bf 	bmi.w	8000a74 <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 80008f6:	69ea      	ldr	r2, [r5, #28]
 80008f8:	2a00      	cmp	r2, #0
 80008fa:	f040 812d 	bne.w	8000b58 <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 80008fe:	2000      	movs	r0, #0
 8000900:	e014      	b.n	800092c <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 8000902:	4c90      	ldr	r4, [pc, #576]	; (8000b44 <HAL_RCC_OscConfig+0x270>)
 8000904:	6863      	ldr	r3, [r4, #4]
 8000906:	f003 030c 	and.w	r3, r3, #12
 800090a:	2b04      	cmp	r3, #4
 800090c:	d007      	beq.n	800091e <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 800090e:	6863      	ldr	r3, [r4, #4]
 8000910:	f003 030c 	and.w	r3, r3, #12
 8000914:	2b08      	cmp	r3, #8
 8000916:	d10c      	bne.n	8000932 <HAL_RCC_OscConfig+0x5e>
 8000918:	6863      	ldr	r3, [r4, #4]
 800091a:	03de      	lsls	r6, r3, #15
 800091c:	d509      	bpl.n	8000932 <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800091e:	6823      	ldr	r3, [r4, #0]
 8000920:	039c      	lsls	r4, r3, #14
 8000922:	d5dd      	bpl.n	80008e0 <HAL_RCC_OscConfig+0xc>
 8000924:	686b      	ldr	r3, [r5, #4]
 8000926:	2b00      	cmp	r3, #0
 8000928:	d1da      	bne.n	80008e0 <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 800092a:	2001      	movs	r0, #1
}
 800092c:	b002      	add	sp, #8
 800092e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000932:	686b      	ldr	r3, [r5, #4]
 8000934:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8000938:	d110      	bne.n	800095c <HAL_RCC_OscConfig+0x88>
 800093a:	6823      	ldr	r3, [r4, #0]
 800093c:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8000940:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8000942:	f7ff fcbd 	bl	80002c0 <HAL_GetTick>
 8000946:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000948:	6823      	ldr	r3, [r4, #0]
 800094a:	0398      	lsls	r0, r3, #14
 800094c:	d4c8      	bmi.n	80008e0 <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 800094e:	f7ff fcb7 	bl	80002c0 <HAL_GetTick>
 8000952:	1b80      	subs	r0, r0, r6
 8000954:	2864      	cmp	r0, #100	; 0x64
 8000956:	d9f7      	bls.n	8000948 <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 8000958:	2003      	movs	r0, #3
 800095a:	e7e7      	b.n	800092c <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800095c:	b99b      	cbnz	r3, 8000986 <HAL_RCC_OscConfig+0xb2>
 800095e:	6823      	ldr	r3, [r4, #0]
 8000960:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8000964:	6023      	str	r3, [r4, #0]
 8000966:	6823      	ldr	r3, [r4, #0]
 8000968:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 800096c:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 800096e:	f7ff fca7 	bl	80002c0 <HAL_GetTick>
 8000972:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8000974:	6823      	ldr	r3, [r4, #0]
 8000976:	0399      	lsls	r1, r3, #14
 8000978:	d5b2      	bpl.n	80008e0 <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 800097a:	f7ff fca1 	bl	80002c0 <HAL_GetTick>
 800097e:	1b80      	subs	r0, r0, r6
 8000980:	2864      	cmp	r0, #100	; 0x64
 8000982:	d9f7      	bls.n	8000974 <HAL_RCC_OscConfig+0xa0>
 8000984:	e7e8      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000986:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 800098a:	6823      	ldr	r3, [r4, #0]
 800098c:	d103      	bne.n	8000996 <HAL_RCC_OscConfig+0xc2>
 800098e:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 8000992:	6023      	str	r3, [r4, #0]
 8000994:	e7d1      	b.n	800093a <HAL_RCC_OscConfig+0x66>
 8000996:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 800099a:	6023      	str	r3, [r4, #0]
 800099c:	6823      	ldr	r3, [r4, #0]
 800099e:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 80009a2:	e7cd      	b.n	8000940 <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 80009a4:	4c67      	ldr	r4, [pc, #412]	; (8000b44 <HAL_RCC_OscConfig+0x270>)
 80009a6:	6863      	ldr	r3, [r4, #4]
 80009a8:	f013 0f0c 	tst.w	r3, #12
 80009ac:	d007      	beq.n	80009be <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 80009ae:	6863      	ldr	r3, [r4, #4]
 80009b0:	f003 030c 	and.w	r3, r3, #12
 80009b4:	2b08      	cmp	r3, #8
 80009b6:	d110      	bne.n	80009da <HAL_RCC_OscConfig+0x106>
 80009b8:	6863      	ldr	r3, [r4, #4]
 80009ba:	03da      	lsls	r2, r3, #15
 80009bc:	d40d      	bmi.n	80009da <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 80009be:	6823      	ldr	r3, [r4, #0]
 80009c0:	079b      	lsls	r3, r3, #30
 80009c2:	d502      	bpl.n	80009ca <HAL_RCC_OscConfig+0xf6>
 80009c4:	692b      	ldr	r3, [r5, #16]
 80009c6:	2b01      	cmp	r3, #1
 80009c8:	d1af      	bne.n	800092a <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80009ca:	6823      	ldr	r3, [r4, #0]
 80009cc:	696a      	ldr	r2, [r5, #20]
 80009ce:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 80009d2:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 80009d6:	6023      	str	r3, [r4, #0]
 80009d8:	e785      	b.n	80008e6 <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 80009da:	692a      	ldr	r2, [r5, #16]
 80009dc:	4b5a      	ldr	r3, [pc, #360]	; (8000b48 <HAL_RCC_OscConfig+0x274>)
 80009de:	b16a      	cbz	r2, 80009fc <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 80009e0:	2201      	movs	r2, #1
 80009e2:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 80009e4:	f7ff fc6c 	bl	80002c0 <HAL_GetTick>
 80009e8:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80009ea:	6823      	ldr	r3, [r4, #0]
 80009ec:	079f      	lsls	r7, r3, #30
 80009ee:	d4ec      	bmi.n	80009ca <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 80009f0:	f7ff fc66 	bl	80002c0 <HAL_GetTick>
 80009f4:	1b80      	subs	r0, r0, r6
 80009f6:	2802      	cmp	r0, #2
 80009f8:	d9f7      	bls.n	80009ea <HAL_RCC_OscConfig+0x116>
 80009fa:	e7ad      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 80009fc:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 80009fe:	f7ff fc5f 	bl	80002c0 <HAL_GetTick>
 8000a02:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8000a04:	6823      	ldr	r3, [r4, #0]
 8000a06:	0798      	lsls	r0, r3, #30
 8000a08:	f57f af6d 	bpl.w	80008e6 <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8000a0c:	f7ff fc58 	bl	80002c0 <HAL_GetTick>
 8000a10:	1b80      	subs	r0, r0, r6
 8000a12:	2802      	cmp	r0, #2
 8000a14:	d9f6      	bls.n	8000a04 <HAL_RCC_OscConfig+0x130>
 8000a16:	e79f      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8000a18:	69aa      	ldr	r2, [r5, #24]
 8000a1a:	4c4a      	ldr	r4, [pc, #296]	; (8000b44 <HAL_RCC_OscConfig+0x270>)
 8000a1c:	4b4b      	ldr	r3, [pc, #300]	; (8000b4c <HAL_RCC_OscConfig+0x278>)
 8000a1e:	b1da      	cbz	r2, 8000a58 <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 8000a20:	2201      	movs	r2, #1
 8000a22:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8000a24:	f7ff fc4c 	bl	80002c0 <HAL_GetTick>
 8000a28:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8000a2a:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000a2c:	079b      	lsls	r3, r3, #30
 8000a2e:	d50d      	bpl.n	8000a4c <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 8000a30:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 8000a34:	4b46      	ldr	r3, [pc, #280]	; (8000b50 <HAL_RCC_OscConfig+0x27c>)
 8000a36:	681b      	ldr	r3, [r3, #0]
 8000a38:	fbb3 f3f2 	udiv	r3, r3, r2
 8000a3c:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 8000a3e:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 8000a40:	9b01      	ldr	r3, [sp, #4]
 8000a42:	1e5a      	subs	r2, r3, #1
 8000a44:	9201      	str	r2, [sp, #4]
 8000a46:	2b00      	cmp	r3, #0
 8000a48:	d1f9      	bne.n	8000a3e <HAL_RCC_OscConfig+0x16a>
 8000a4a:	e750      	b.n	80008ee <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000a4c:	f7ff fc38 	bl	80002c0 <HAL_GetTick>
 8000a50:	1b80      	subs	r0, r0, r6
 8000a52:	2802      	cmp	r0, #2
 8000a54:	d9e9      	bls.n	8000a2a <HAL_RCC_OscConfig+0x156>
 8000a56:	e77f      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 8000a58:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8000a5a:	f7ff fc31 	bl	80002c0 <HAL_GetTick>
 8000a5e:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8000a60:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000a62:	079f      	lsls	r7, r3, #30
 8000a64:	f57f af43 	bpl.w	80008ee <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000a68:	f7ff fc2a 	bl	80002c0 <HAL_GetTick>
 8000a6c:	1b80      	subs	r0, r0, r6
 8000a6e:	2802      	cmp	r0, #2
 8000a70:	d9f6      	bls.n	8000a60 <HAL_RCC_OscConfig+0x18c>
 8000a72:	e771      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8000a74:	4c33      	ldr	r4, [pc, #204]	; (8000b44 <HAL_RCC_OscConfig+0x270>)
 8000a76:	69e3      	ldr	r3, [r4, #28]
 8000a78:	00d8      	lsls	r0, r3, #3
 8000a7a:	d424      	bmi.n	8000ac6 <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 8000a7c:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 8000a7e:	69e3      	ldr	r3, [r4, #28]
 8000a80:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8000a84:	61e3      	str	r3, [r4, #28]
 8000a86:	69e3      	ldr	r3, [r4, #28]
 8000a88:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8000a8c:	9300      	str	r3, [sp, #0]
 8000a8e:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000a90:	4e30      	ldr	r6, [pc, #192]	; (8000b54 <HAL_RCC_OscConfig+0x280>)
 8000a92:	6833      	ldr	r3, [r6, #0]
 8000a94:	05d9      	lsls	r1, r3, #23
 8000a96:	d518      	bpl.n	8000aca <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a98:	68eb      	ldr	r3, [r5, #12]
 8000a9a:	2b01      	cmp	r3, #1
 8000a9c:	d126      	bne.n	8000aec <HAL_RCC_OscConfig+0x218>
 8000a9e:	6a23      	ldr	r3, [r4, #32]
 8000aa0:	f043 0301 	orr.w	r3, r3, #1
 8000aa4:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000aa6:	f7ff fc0b 	bl	80002c0 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000aaa:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 8000aae:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 8000ab0:	6a23      	ldr	r3, [r4, #32]
 8000ab2:	079b      	lsls	r3, r3, #30
 8000ab4:	d53f      	bpl.n	8000b36 <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 8000ab6:	2f00      	cmp	r7, #0
 8000ab8:	f43f af1d 	beq.w	80008f6 <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 8000abc:	69e3      	ldr	r3, [r4, #28]
 8000abe:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8000ac2:	61e3      	str	r3, [r4, #28]
 8000ac4:	e717      	b.n	80008f6 <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 8000ac6:	2700      	movs	r7, #0
 8000ac8:	e7e2      	b.n	8000a90 <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8000aca:	6833      	ldr	r3, [r6, #0]
 8000acc:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8000ad0:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 8000ad2:	f7ff fbf5 	bl	80002c0 <HAL_GetTick>
 8000ad6:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000ad8:	6833      	ldr	r3, [r6, #0]
 8000ada:	05da      	lsls	r2, r3, #23
 8000adc:	d4dc      	bmi.n	8000a98 <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8000ade:	f7ff fbef 	bl	80002c0 <HAL_GetTick>
 8000ae2:	eba0 0008 	sub.w	r0, r0, r8
 8000ae6:	2864      	cmp	r0, #100	; 0x64
 8000ae8:	d9f6      	bls.n	8000ad8 <HAL_RCC_OscConfig+0x204>
 8000aea:	e735      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000aec:	b9ab      	cbnz	r3, 8000b1a <HAL_RCC_OscConfig+0x246>
 8000aee:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000af0:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000af4:	f023 0301 	bic.w	r3, r3, #1
 8000af8:	6223      	str	r3, [r4, #32]
 8000afa:	6a23      	ldr	r3, [r4, #32]
 8000afc:	f023 0304 	bic.w	r3, r3, #4
 8000b00:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000b02:	f7ff fbdd 	bl	80002c0 <HAL_GetTick>
 8000b06:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 8000b08:	6a23      	ldr	r3, [r4, #32]
 8000b0a:	0798      	lsls	r0, r3, #30
 8000b0c:	d5d3      	bpl.n	8000ab6 <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000b0e:	f7ff fbd7 	bl	80002c0 <HAL_GetTick>
 8000b12:	1b80      	subs	r0, r0, r6
 8000b14:	4540      	cmp	r0, r8
 8000b16:	d9f7      	bls.n	8000b08 <HAL_RCC_OscConfig+0x234>
 8000b18:	e71e      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000b1a:	2b05      	cmp	r3, #5
 8000b1c:	6a23      	ldr	r3, [r4, #32]
 8000b1e:	d103      	bne.n	8000b28 <HAL_RCC_OscConfig+0x254>
 8000b20:	f043 0304 	orr.w	r3, r3, #4
 8000b24:	6223      	str	r3, [r4, #32]
 8000b26:	e7ba      	b.n	8000a9e <HAL_RCC_OscConfig+0x1ca>
 8000b28:	f023 0301 	bic.w	r3, r3, #1
 8000b2c:	6223      	str	r3, [r4, #32]
 8000b2e:	6a23      	ldr	r3, [r4, #32]
 8000b30:	f023 0304 	bic.w	r3, r3, #4
 8000b34:	e7b6      	b.n	8000aa4 <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000b36:	f7ff fbc3 	bl	80002c0 <HAL_GetTick>
 8000b3a:	eba0 0008 	sub.w	r0, r0, r8
 8000b3e:	42b0      	cmp	r0, r6
 8000b40:	d9b6      	bls.n	8000ab0 <HAL_RCC_OscConfig+0x1dc>
 8000b42:	e709      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
 8000b44:	40021000 	.word	0x40021000
 8000b48:	42420000 	.word	0x42420000
 8000b4c:	42420480 	.word	0x42420480
 8000b50:	2000000c 	.word	0x2000000c
 8000b54:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000b58:	4c22      	ldr	r4, [pc, #136]	; (8000be4 <HAL_RCC_OscConfig+0x310>)
 8000b5a:	6863      	ldr	r3, [r4, #4]
 8000b5c:	f003 030c 	and.w	r3, r3, #12
 8000b60:	2b08      	cmp	r3, #8
 8000b62:	f43f aee2 	beq.w	800092a <HAL_RCC_OscConfig+0x56>
 8000b66:	2300      	movs	r3, #0
 8000b68:	4e1f      	ldr	r6, [pc, #124]	; (8000be8 <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000b6a:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8000b6c:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000b6e:	d12b      	bne.n	8000bc8 <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 8000b70:	f7ff fba6 	bl	80002c0 <HAL_GetTick>
 8000b74:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000b76:	6823      	ldr	r3, [r4, #0]
 8000b78:	0199      	lsls	r1, r3, #6
 8000b7a:	d41f      	bmi.n	8000bbc <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8000b7c:	6a2b      	ldr	r3, [r5, #32]
 8000b7e:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8000b82:	d105      	bne.n	8000b90 <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8000b84:	6862      	ldr	r2, [r4, #4]
 8000b86:	68a9      	ldr	r1, [r5, #8]
 8000b88:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 8000b8c:	430a      	orrs	r2, r1
 8000b8e:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8000b90:	6a69      	ldr	r1, [r5, #36]	; 0x24
 8000b92:	6862      	ldr	r2, [r4, #4]
 8000b94:	430b      	orrs	r3, r1
 8000b96:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 8000b9a:	4313      	orrs	r3, r2
 8000b9c:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 8000b9e:	2301      	movs	r3, #1
 8000ba0:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 8000ba2:	f7ff fb8d 	bl	80002c0 <HAL_GetTick>
 8000ba6:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8000ba8:	6823      	ldr	r3, [r4, #0]
 8000baa:	019a      	lsls	r2, r3, #6
 8000bac:	f53f aea7 	bmi.w	80008fe <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000bb0:	f7ff fb86 	bl	80002c0 <HAL_GetTick>
 8000bb4:	1b40      	subs	r0, r0, r5
 8000bb6:	2802      	cmp	r0, #2
 8000bb8:	d9f6      	bls.n	8000ba8 <HAL_RCC_OscConfig+0x2d4>
 8000bba:	e6cd      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000bbc:	f7ff fb80 	bl	80002c0 <HAL_GetTick>
 8000bc0:	1bc0      	subs	r0, r0, r7
 8000bc2:	2802      	cmp	r0, #2
 8000bc4:	d9d7      	bls.n	8000b76 <HAL_RCC_OscConfig+0x2a2>
 8000bc6:	e6c7      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8000bc8:	f7ff fb7a 	bl	80002c0 <HAL_GetTick>
 8000bcc:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000bce:	6823      	ldr	r3, [r4, #0]
 8000bd0:	019b      	lsls	r3, r3, #6
 8000bd2:	f57f ae94 	bpl.w	80008fe <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000bd6:	f7ff fb73 	bl	80002c0 <HAL_GetTick>
 8000bda:	1b40      	subs	r0, r0, r5
 8000bdc:	2802      	cmp	r0, #2
 8000bde:	d9f6      	bls.n	8000bce <HAL_RCC_OscConfig+0x2fa>
 8000be0:	e6ba      	b.n	8000958 <HAL_RCC_OscConfig+0x84>
 8000be2:	bf00      	nop
 8000be4:	40021000 	.word	0x40021000
 8000be8:	42420060 	.word	0x42420060

08000bec <HAL_RCC_GetSysClockFreq>:
{
 8000bec:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8000bee:	4b19      	ldr	r3, [pc, #100]	; (8000c54 <HAL_RCC_GetSysClockFreq+0x68>)
{
 8000bf0:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8000bf2:	ac02      	add	r4, sp, #8
 8000bf4:	f103 0510 	add.w	r5, r3, #16
 8000bf8:	4622      	mov	r2, r4
 8000bfa:	6818      	ldr	r0, [r3, #0]
 8000bfc:	6859      	ldr	r1, [r3, #4]
 8000bfe:	3308      	adds	r3, #8
 8000c00:	c203      	stmia	r2!, {r0, r1}
 8000c02:	42ab      	cmp	r3, r5
 8000c04:	4614      	mov	r4, r2
 8000c06:	d1f7      	bne.n	8000bf8 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8000c08:	2301      	movs	r3, #1
 8000c0a:	f88d 3004 	strb.w	r3, [sp, #4]
 8000c0e:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 8000c10:	4911      	ldr	r1, [pc, #68]	; (8000c58 <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8000c12:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 8000c16:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 8000c18:	f003 020c 	and.w	r2, r3, #12
 8000c1c:	2a08      	cmp	r2, #8
 8000c1e:	d117      	bne.n	8000c50 <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000c20:	f3c3 4283 	ubfx	r2, r3, #18, #4
 8000c24:	a806      	add	r0, sp, #24
 8000c26:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000c28:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000c2a:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000c2e:	d50c      	bpl.n	8000c4a <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000c30:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000c32:	480a      	ldr	r0, [pc, #40]	; (8000c5c <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000c34:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000c38:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000c3a:	aa06      	add	r2, sp, #24
 8000c3c:	4413      	add	r3, r2
 8000c3e:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000c42:	fbb0 f0f3 	udiv	r0, r0, r3
}
 8000c46:	b007      	add	sp, #28
 8000c48:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 8000c4a:	4805      	ldr	r0, [pc, #20]	; (8000c60 <HAL_RCC_GetSysClockFreq+0x74>)
 8000c4c:	4350      	muls	r0, r2
 8000c4e:	e7fa      	b.n	8000c46 <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 8000c50:	4802      	ldr	r0, [pc, #8]	; (8000c5c <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 8000c52:	e7f8      	b.n	8000c46 <HAL_RCC_GetSysClockFreq+0x5a>
 8000c54:	08002dc8 	.word	0x08002dc8
 8000c58:	40021000 	.word	0x40021000
 8000c5c:	007a1200 	.word	0x007a1200
 8000c60:	003d0900 	.word	0x003d0900

08000c64 <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000c64:	4a54      	ldr	r2, [pc, #336]	; (8000db8 <HAL_RCC_ClockConfig+0x154>)
{
 8000c66:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000c6a:	6813      	ldr	r3, [r2, #0]
{
 8000c6c:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000c6e:	f003 0307 	and.w	r3, r3, #7
 8000c72:	428b      	cmp	r3, r1
{
 8000c74:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000c76:	d32a      	bcc.n	8000cce <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8000c78:	6829      	ldr	r1, [r5, #0]
 8000c7a:	078c      	lsls	r4, r1, #30
 8000c7c:	d434      	bmi.n	8000ce8 <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8000c7e:	07ca      	lsls	r2, r1, #31
 8000c80:	d447      	bmi.n	8000d12 <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 8000c82:	4a4d      	ldr	r2, [pc, #308]	; (8000db8 <HAL_RCC_ClockConfig+0x154>)
 8000c84:	6813      	ldr	r3, [r2, #0]
 8000c86:	f003 0307 	and.w	r3, r3, #7
 8000c8a:	429e      	cmp	r6, r3
 8000c8c:	f0c0 8082 	bcc.w	8000d94 <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000c90:	682a      	ldr	r2, [r5, #0]
 8000c92:	4c4a      	ldr	r4, [pc, #296]	; (8000dbc <HAL_RCC_ClockConfig+0x158>)
 8000c94:	f012 0f04 	tst.w	r2, #4
 8000c98:	f040 8087 	bne.w	8000daa <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000c9c:	0713      	lsls	r3, r2, #28
 8000c9e:	d506      	bpl.n	8000cae <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 8000ca0:	6863      	ldr	r3, [r4, #4]
 8000ca2:	692a      	ldr	r2, [r5, #16]
 8000ca4:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8000ca8:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000cac:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 8000cae:	f7ff ff9d 	bl	8000bec <HAL_RCC_GetSysClockFreq>
 8000cb2:	6863      	ldr	r3, [r4, #4]
 8000cb4:	4a42      	ldr	r2, [pc, #264]	; (8000dc0 <HAL_RCC_ClockConfig+0x15c>)
 8000cb6:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8000cba:	5cd3      	ldrb	r3, [r2, r3]
 8000cbc:	40d8      	lsrs	r0, r3
 8000cbe:	4b41      	ldr	r3, [pc, #260]	; (8000dc4 <HAL_RCC_ClockConfig+0x160>)
 8000cc0:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 8000cc2:	2000      	movs	r0, #0
 8000cc4:	f7ff faba 	bl	800023c <HAL_InitTick>
  return HAL_OK;
 8000cc8:	2000      	movs	r0, #0
}
 8000cca:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000cce:	6813      	ldr	r3, [r2, #0]
 8000cd0:	f023 0307 	bic.w	r3, r3, #7
 8000cd4:	430b      	orrs	r3, r1
 8000cd6:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000cd8:	6813      	ldr	r3, [r2, #0]
 8000cda:	f003 0307 	and.w	r3, r3, #7
 8000cde:	4299      	cmp	r1, r3
 8000ce0:	d0ca      	beq.n	8000c78 <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 8000ce2:	2001      	movs	r0, #1
 8000ce4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8000ce8:	4b34      	ldr	r3, [pc, #208]	; (8000dbc <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000cea:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8000cee:	bf1e      	ittt	ne
 8000cf0:	685a      	ldrne	r2, [r3, #4]
 8000cf2:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 8000cf6:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000cf8:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8000cfa:	bf42      	ittt	mi
 8000cfc:	685a      	ldrmi	r2, [r3, #4]
 8000cfe:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 8000d02:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8000d04:	685a      	ldr	r2, [r3, #4]
 8000d06:	68a8      	ldr	r0, [r5, #8]
 8000d08:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8000d0c:	4302      	orrs	r2, r0
 8000d0e:	605a      	str	r2, [r3, #4]
 8000d10:	e7b5      	b.n	8000c7e <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000d12:	686a      	ldr	r2, [r5, #4]
 8000d14:	4c29      	ldr	r4, [pc, #164]	; (8000dbc <HAL_RCC_ClockConfig+0x158>)
 8000d16:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000d18:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000d1a:	d11c      	bne.n	8000d56 <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000d1c:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000d20:	d0df      	beq.n	8000ce2 <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000d22:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000d24:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000d28:	f023 0303 	bic.w	r3, r3, #3
 8000d2c:	4313      	orrs	r3, r2
 8000d2e:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8000d30:	f7ff fac6 	bl	80002c0 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000d34:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 8000d36:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000d38:	2b01      	cmp	r3, #1
 8000d3a:	d114      	bne.n	8000d66 <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8000d3c:	6863      	ldr	r3, [r4, #4]
 8000d3e:	f003 030c 	and.w	r3, r3, #12
 8000d42:	2b04      	cmp	r3, #4
 8000d44:	d09d      	beq.n	8000c82 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000d46:	f7ff fabb 	bl	80002c0 <HAL_GetTick>
 8000d4a:	1bc0      	subs	r0, r0, r7
 8000d4c:	4540      	cmp	r0, r8
 8000d4e:	d9f5      	bls.n	8000d3c <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 8000d50:	2003      	movs	r0, #3
 8000d52:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000d56:	2a02      	cmp	r2, #2
 8000d58:	d102      	bne.n	8000d60 <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8000d5a:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 8000d5e:	e7df      	b.n	8000d20 <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000d60:	f013 0f02 	tst.w	r3, #2
 8000d64:	e7dc      	b.n	8000d20 <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000d66:	2b02      	cmp	r3, #2
 8000d68:	d10f      	bne.n	8000d8a <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000d6a:	6863      	ldr	r3, [r4, #4]
 8000d6c:	f003 030c 	and.w	r3, r3, #12
 8000d70:	2b08      	cmp	r3, #8
 8000d72:	d086      	beq.n	8000c82 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000d74:	f7ff faa4 	bl	80002c0 <HAL_GetTick>
 8000d78:	1bc0      	subs	r0, r0, r7
 8000d7a:	4540      	cmp	r0, r8
 8000d7c:	d9f5      	bls.n	8000d6a <HAL_RCC_ClockConfig+0x106>
 8000d7e:	e7e7      	b.n	8000d50 <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000d80:	f7ff fa9e 	bl	80002c0 <HAL_GetTick>
 8000d84:	1bc0      	subs	r0, r0, r7
 8000d86:	4540      	cmp	r0, r8
 8000d88:	d8e2      	bhi.n	8000d50 <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 8000d8a:	6863      	ldr	r3, [r4, #4]
 8000d8c:	f013 0f0c 	tst.w	r3, #12
 8000d90:	d1f6      	bne.n	8000d80 <HAL_RCC_ClockConfig+0x11c>
 8000d92:	e776      	b.n	8000c82 <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000d94:	6813      	ldr	r3, [r2, #0]
 8000d96:	f023 0307 	bic.w	r3, r3, #7
 8000d9a:	4333      	orrs	r3, r6
 8000d9c:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000d9e:	6813      	ldr	r3, [r2, #0]
 8000da0:	f003 0307 	and.w	r3, r3, #7
 8000da4:	429e      	cmp	r6, r3
 8000da6:	d19c      	bne.n	8000ce2 <HAL_RCC_ClockConfig+0x7e>
 8000da8:	e772      	b.n	8000c90 <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8000daa:	6863      	ldr	r3, [r4, #4]
 8000dac:	68e9      	ldr	r1, [r5, #12]
 8000dae:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8000db2:	430b      	orrs	r3, r1
 8000db4:	6063      	str	r3, [r4, #4]
 8000db6:	e771      	b.n	8000c9c <HAL_RCC_ClockConfig+0x38>
 8000db8:	40022000 	.word	0x40022000
 8000dbc:	40021000 	.word	0x40021000
 8000dc0:	08002e4b 	.word	0x08002e4b
 8000dc4:	2000000c 	.word	0x2000000c

08000dc8 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8000dc8:	4b04      	ldr	r3, [pc, #16]	; (8000ddc <HAL_RCC_GetPCLK1Freq+0x14>)
 8000dca:	4a05      	ldr	r2, [pc, #20]	; (8000de0 <HAL_RCC_GetPCLK1Freq+0x18>)
 8000dcc:	685b      	ldr	r3, [r3, #4]
 8000dce:	f3c3 2302 	ubfx	r3, r3, #8, #3
 8000dd2:	5cd3      	ldrb	r3, [r2, r3]
 8000dd4:	4a03      	ldr	r2, [pc, #12]	; (8000de4 <HAL_RCC_GetPCLK1Freq+0x1c>)
 8000dd6:	6810      	ldr	r0, [r2, #0]
}    
 8000dd8:	40d8      	lsrs	r0, r3
 8000dda:	4770      	bx	lr
 8000ddc:	40021000 	.word	0x40021000
 8000de0:	08002e5b 	.word	0x08002e5b
 8000de4:	2000000c 	.word	0x2000000c

08000de8 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 8000de8:	4b04      	ldr	r3, [pc, #16]	; (8000dfc <HAL_RCC_GetPCLK2Freq+0x14>)
 8000dea:	4a05      	ldr	r2, [pc, #20]	; (8000e00 <HAL_RCC_GetPCLK2Freq+0x18>)
 8000dec:	685b      	ldr	r3, [r3, #4]
 8000dee:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 8000df2:	5cd3      	ldrb	r3, [r2, r3]
 8000df4:	4a03      	ldr	r2, [pc, #12]	; (8000e04 <HAL_RCC_GetPCLK2Freq+0x1c>)
 8000df6:	6810      	ldr	r0, [r2, #0]
} 
 8000df8:	40d8      	lsrs	r0, r3
 8000dfa:	4770      	bx	lr
 8000dfc:	40021000 	.word	0x40021000
 8000e00:	08002e5b 	.word	0x08002e5b
 8000e04:	2000000c 	.word	0x2000000c

08000e08 <HAL_TIM_Base_Start_IT>:
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

   /* Enable the TIM Update interrupt */
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000e08:	6803      	ldr	r3, [r0, #0]
   /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}
 8000e0a:	2000      	movs	r0, #0
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000e0c:	68da      	ldr	r2, [r3, #12]
 8000e0e:	f042 0201 	orr.w	r2, r2, #1
 8000e12:	60da      	str	r2, [r3, #12]
  __HAL_TIM_ENABLE(htim);
 8000e14:	681a      	ldr	r2, [r3, #0]
 8000e16:	f042 0201 	orr.w	r2, r2, #1
 8000e1a:	601a      	str	r2, [r3, #0]
}
 8000e1c:	4770      	bx	lr

08000e1e <HAL_TIM_OC_DelayElapsedCallback>:
 8000e1e:	4770      	bx	lr

08000e20 <HAL_TIM_IC_CaptureCallback>:
 8000e20:	4770      	bx	lr

08000e22 <HAL_TIM_PWM_PulseFinishedCallback>:
 8000e22:	4770      	bx	lr

08000e24 <HAL_TIM_TriggerCallback>:
 8000e24:	4770      	bx	lr

08000e26 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000e26:	6803      	ldr	r3, [r0, #0]
{
 8000e28:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000e2a:	691a      	ldr	r2, [r3, #16]
{
 8000e2c:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000e2e:	0791      	lsls	r1, r2, #30
 8000e30:	d50e      	bpl.n	8000e50 <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 8000e32:	68da      	ldr	r2, [r3, #12]
 8000e34:	0792      	lsls	r2, r2, #30
 8000e36:	d50b      	bpl.n	8000e50 <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8000e38:	f06f 0202 	mvn.w	r2, #2
 8000e3c:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000e3e:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000e40:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000e42:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000e44:	079b      	lsls	r3, r3, #30
 8000e46:	d077      	beq.n	8000f38 <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 8000e48:	f7ff ffea 	bl	8000e20 <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000e4c:	2300      	movs	r3, #0
 8000e4e:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8000e50:	6823      	ldr	r3, [r4, #0]
 8000e52:	691a      	ldr	r2, [r3, #16]
 8000e54:	0750      	lsls	r0, r2, #29
 8000e56:	d510      	bpl.n	8000e7a <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 8000e58:	68da      	ldr	r2, [r3, #12]
 8000e5a:	0751      	lsls	r1, r2, #29
 8000e5c:	d50d      	bpl.n	8000e7a <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8000e5e:	f06f 0204 	mvn.w	r2, #4
 8000e62:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000e64:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000e66:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000e68:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000e6a:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000e6e:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000e70:	d068      	beq.n	8000f44 <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 8000e72:	f7ff ffd5 	bl	8000e20 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000e76:	2300      	movs	r3, #0
 8000e78:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8000e7a:	6823      	ldr	r3, [r4, #0]
 8000e7c:	691a      	ldr	r2, [r3, #16]
 8000e7e:	0712      	lsls	r2, r2, #28
 8000e80:	d50f      	bpl.n	8000ea2 <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 8000e82:	68da      	ldr	r2, [r3, #12]
 8000e84:	0710      	lsls	r0, r2, #28
 8000e86:	d50c      	bpl.n	8000ea2 <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8000e88:	f06f 0208 	mvn.w	r2, #8
 8000e8c:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000e8e:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000e90:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000e92:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000e94:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000e96:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000e98:	d05a      	beq.n	8000f50 <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8000e9a:	f7ff ffc1 	bl	8000e20 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000e9e:	2300      	movs	r3, #0
 8000ea0:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8000ea2:	6823      	ldr	r3, [r4, #0]
 8000ea4:	691a      	ldr	r2, [r3, #16]
 8000ea6:	06d2      	lsls	r2, r2, #27
 8000ea8:	d510      	bpl.n	8000ecc <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8000eaa:	68da      	ldr	r2, [r3, #12]
 8000eac:	06d0      	lsls	r0, r2, #27
 8000eae:	d50d      	bpl.n	8000ecc <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8000eb0:	f06f 0210 	mvn.w	r2, #16
 8000eb4:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000eb6:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000eb8:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000eba:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000ebc:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000ec0:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000ec2:	d04b      	beq.n	8000f5c <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 8000ec4:	f7ff ffac 	bl	8000e20 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000ec8:	2300      	movs	r3, #0
 8000eca:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8000ecc:	6823      	ldr	r3, [r4, #0]
 8000ece:	691a      	ldr	r2, [r3, #16]
 8000ed0:	07d1      	lsls	r1, r2, #31
 8000ed2:	d508      	bpl.n	8000ee6 <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 8000ed4:	68da      	ldr	r2, [r3, #12]
 8000ed6:	07d2      	lsls	r2, r2, #31
 8000ed8:	d505      	bpl.n	8000ee6 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000eda:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 8000ede:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000ee0:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 8000ee2:	f000 fb67 	bl	80015b4 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 8000ee6:	6823      	ldr	r3, [r4, #0]
 8000ee8:	691a      	ldr	r2, [r3, #16]
 8000eea:	0610      	lsls	r0, r2, #24
 8000eec:	d508      	bpl.n	8000f00 <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 8000eee:	68da      	ldr	r2, [r3, #12]
 8000ef0:	0611      	lsls	r1, r2, #24
 8000ef2:	d505      	bpl.n	8000f00 <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000ef4:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 8000ef8:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000efa:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 8000efc:	f000 f8bf 	bl	800107e <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 8000f00:	6823      	ldr	r3, [r4, #0]
 8000f02:	691a      	ldr	r2, [r3, #16]
 8000f04:	0652      	lsls	r2, r2, #25
 8000f06:	d508      	bpl.n	8000f1a <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 8000f08:	68da      	ldr	r2, [r3, #12]
 8000f0a:	0650      	lsls	r0, r2, #25
 8000f0c:	d505      	bpl.n	8000f1a <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000f0e:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 8000f12:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000f14:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 8000f16:	f7ff ff85 	bl	8000e24 <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 8000f1a:	6823      	ldr	r3, [r4, #0]
 8000f1c:	691a      	ldr	r2, [r3, #16]
 8000f1e:	0691      	lsls	r1, r2, #26
 8000f20:	d522      	bpl.n	8000f68 <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 8000f22:	68da      	ldr	r2, [r3, #12]
 8000f24:	0692      	lsls	r2, r2, #26
 8000f26:	d51f      	bpl.n	8000f68 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000f28:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 8000f2c:	4620      	mov	r0, r4
    }
  }
}
 8000f2e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000f32:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 8000f34:	f000 b8a2 	b.w	800107c <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8000f38:	f7ff ff71 	bl	8000e1e <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000f3c:	4620      	mov	r0, r4
 8000f3e:	f7ff ff70 	bl	8000e22 <HAL_TIM_PWM_PulseFinishedCallback>
 8000f42:	e783      	b.n	8000e4c <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000f44:	f7ff ff6b 	bl	8000e1e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000f48:	4620      	mov	r0, r4
 8000f4a:	f7ff ff6a 	bl	8000e22 <HAL_TIM_PWM_PulseFinishedCallback>
 8000f4e:	e792      	b.n	8000e76 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000f50:	f7ff ff65 	bl	8000e1e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000f54:	4620      	mov	r0, r4
 8000f56:	f7ff ff64 	bl	8000e22 <HAL_TIM_PWM_PulseFinishedCallback>
 8000f5a:	e7a0      	b.n	8000e9e <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000f5c:	f7ff ff5f 	bl	8000e1e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000f60:	4620      	mov	r0, r4
 8000f62:	f7ff ff5e 	bl	8000e22 <HAL_TIM_PWM_PulseFinishedCallback>
 8000f66:	e7af      	b.n	8000ec8 <HAL_TIM_IRQHandler+0xa2>
 8000f68:	bd10      	pop	{r4, pc}
	...

08000f6c <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000f6c:	4a24      	ldr	r2, [pc, #144]	; (8001000 <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 8000f6e:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000f70:	4290      	cmp	r0, r2
 8000f72:	d012      	beq.n	8000f9a <TIM_Base_SetConfig+0x2e>
 8000f74:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8000f78:	4290      	cmp	r0, r2
 8000f7a:	d00e      	beq.n	8000f9a <TIM_Base_SetConfig+0x2e>
 8000f7c:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000f80:	d00b      	beq.n	8000f9a <TIM_Base_SetConfig+0x2e>
 8000f82:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8000f86:	4290      	cmp	r0, r2
 8000f88:	d007      	beq.n	8000f9a <TIM_Base_SetConfig+0x2e>
 8000f8a:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000f8e:	4290      	cmp	r0, r2
 8000f90:	d003      	beq.n	8000f9a <TIM_Base_SetConfig+0x2e>
 8000f92:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000f96:	4290      	cmp	r0, r2
 8000f98:	d11d      	bne.n	8000fd6 <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8000f9a:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8000f9c:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8000fa0:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 8000fa2:	4a17      	ldr	r2, [pc, #92]	; (8001000 <TIM_Base_SetConfig+0x94>)
 8000fa4:	4290      	cmp	r0, r2
 8000fa6:	d012      	beq.n	8000fce <TIM_Base_SetConfig+0x62>
 8000fa8:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8000fac:	4290      	cmp	r0, r2
 8000fae:	d00e      	beq.n	8000fce <TIM_Base_SetConfig+0x62>
 8000fb0:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000fb4:	d00b      	beq.n	8000fce <TIM_Base_SetConfig+0x62>
 8000fb6:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8000fba:	4290      	cmp	r0, r2
 8000fbc:	d007      	beq.n	8000fce <TIM_Base_SetConfig+0x62>
 8000fbe:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000fc2:	4290      	cmp	r0, r2
 8000fc4:	d003      	beq.n	8000fce <TIM_Base_SetConfig+0x62>
 8000fc6:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000fca:	4290      	cmp	r0, r2
 8000fcc:	d103      	bne.n	8000fd6 <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000fce:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8000fd0:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000fd4:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000fd6:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 8000fd8:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000fdc:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8000fde:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8000fe0:	688b      	ldr	r3, [r1, #8]
 8000fe2:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 8000fe4:	680b      	ldr	r3, [r1, #0]
 8000fe6:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8000fe8:	4b05      	ldr	r3, [pc, #20]	; (8001000 <TIM_Base_SetConfig+0x94>)
 8000fea:	4298      	cmp	r0, r3
 8000fec:	d003      	beq.n	8000ff6 <TIM_Base_SetConfig+0x8a>
 8000fee:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 8000ff2:	4298      	cmp	r0, r3
 8000ff4:	d101      	bne.n	8000ffa <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 8000ff6:	690b      	ldr	r3, [r1, #16]
 8000ff8:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 8000ffa:	2301      	movs	r3, #1
 8000ffc:	6143      	str	r3, [r0, #20]
 8000ffe:	4770      	bx	lr
 8001000:	40012c00 	.word	0x40012c00

08001004 <HAL_TIM_Base_Init>:
{
 8001004:	b510      	push	{r4, lr}
  if(htim == NULL)
 8001006:	4604      	mov	r4, r0
 8001008:	b1a0      	cbz	r0, 8001034 <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 800100a:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 800100e:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8001012:	b91b      	cbnz	r3, 800101c <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 8001014:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8001018:	f000 fd90 	bl	8001b3c <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 800101c:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800101e:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8001020:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8001024:	1d21      	adds	r1, r4, #4
 8001026:	f7ff ffa1 	bl	8000f6c <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 800102a:	2301      	movs	r3, #1
  return HAL_OK;
 800102c:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 800102e:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 8001032:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8001034:	2001      	movs	r0, #1
}
 8001036:	bd10      	pop	{r4, pc}

08001038 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 8001038:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 800103c:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 800103e:	2b01      	cmp	r3, #1
 8001040:	f04f 0302 	mov.w	r3, #2
 8001044:	d018      	beq.n	8001078 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 8001046:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 800104a:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 800104c:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 800104e:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8001050:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8001052:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 8001056:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8001058:	685a      	ldr	r2, [r3, #4]
 800105a:	4322      	orrs	r2, r4
 800105c:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 800105e:	689a      	ldr	r2, [r3, #8]
 8001060:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8001064:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8001066:	689a      	ldr	r2, [r3, #8]
 8001068:	430a      	orrs	r2, r1
 800106a:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 800106c:	2301      	movs	r3, #1
 800106e:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 8001072:	2300      	movs	r3, #0
 8001074:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8001078:	4618      	mov	r0, r3

  return HAL_OK;
}
 800107a:	bd10      	pop	{r4, pc}

0800107c <HAL_TIMEx_CommutationCallback>:
 800107c:	4770      	bx	lr

0800107e <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800107e:	4770      	bx	lr

08001080 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8001080:	6803      	ldr	r3, [r0, #0]
 8001082:	68da      	ldr	r2, [r3, #12]
 8001084:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8001088:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800108a:	695a      	ldr	r2, [r3, #20]
 800108c:	f022 0201 	bic.w	r2, r2, #1
 8001090:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8001092:	2320      	movs	r3, #32
 8001094:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8001098:	4770      	bx	lr
	...

0800109c <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 800109c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 80010a0:	6805      	ldr	r5, [r0, #0]
 80010a2:	68c2      	ldr	r2, [r0, #12]
 80010a4:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 80010a6:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 80010a8:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 80010ac:	4313      	orrs	r3, r2
 80010ae:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 80010b0:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 80010b2:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 80010b4:	430b      	orrs	r3, r1
 80010b6:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 80010b8:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 80010bc:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 80010c0:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 80010c2:	4313      	orrs	r3, r2
 80010c4:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 80010c6:	696b      	ldr	r3, [r5, #20]
 80010c8:	6982      	ldr	r2, [r0, #24]
 80010ca:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 80010ce:	4313      	orrs	r3, r2
 80010d0:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 80010d2:	4b40      	ldr	r3, [pc, #256]	; (80011d4 <UART_SetConfig+0x138>)
{
 80010d4:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 80010d6:	429d      	cmp	r5, r3
 80010d8:	f04f 0419 	mov.w	r4, #25
 80010dc:	d146      	bne.n	800116c <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 80010de:	f7ff fe83 	bl	8000de8 <HAL_RCC_GetPCLK2Freq>
 80010e2:	fb04 f300 	mul.w	r3, r4, r0
 80010e6:	f8d9 6004 	ldr.w	r6, [r9, #4]
 80010ea:	f04f 0864 	mov.w	r8, #100	; 0x64
 80010ee:	00b6      	lsls	r6, r6, #2
 80010f0:	fbb3 f3f6 	udiv	r3, r3, r6
 80010f4:	fbb3 f3f8 	udiv	r3, r3, r8
 80010f8:	011e      	lsls	r6, r3, #4
 80010fa:	f7ff fe75 	bl	8000de8 <HAL_RCC_GetPCLK2Freq>
 80010fe:	4360      	muls	r0, r4
 8001100:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001104:	009b      	lsls	r3, r3, #2
 8001106:	fbb0 f7f3 	udiv	r7, r0, r3
 800110a:	f7ff fe6d 	bl	8000de8 <HAL_RCC_GetPCLK2Freq>
 800110e:	4360      	muls	r0, r4
 8001110:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001114:	009b      	lsls	r3, r3, #2
 8001116:	fbb0 f3f3 	udiv	r3, r0, r3
 800111a:	fbb3 f3f8 	udiv	r3, r3, r8
 800111e:	fb08 7313 	mls	r3, r8, r3, r7
 8001122:	011b      	lsls	r3, r3, #4
 8001124:	3332      	adds	r3, #50	; 0x32
 8001126:	fbb3 f3f8 	udiv	r3, r3, r8
 800112a:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 800112e:	f7ff fe5b 	bl	8000de8 <HAL_RCC_GetPCLK2Freq>
 8001132:	4360      	muls	r0, r4
 8001134:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8001138:	0092      	lsls	r2, r2, #2
 800113a:	fbb0 faf2 	udiv	sl, r0, r2
 800113e:	f7ff fe53 	bl	8000de8 <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 8001142:	4360      	muls	r0, r4
 8001144:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001148:	009b      	lsls	r3, r3, #2
 800114a:	fbb0 f3f3 	udiv	r3, r0, r3
 800114e:	fbb3 f3f8 	udiv	r3, r3, r8
 8001152:	fb08 a313 	mls	r3, r8, r3, sl
 8001156:	011b      	lsls	r3, r3, #4
 8001158:	3332      	adds	r3, #50	; 0x32
 800115a:	fbb3 f3f8 	udiv	r3, r3, r8
 800115e:	f003 030f 	and.w	r3, r3, #15
 8001162:	433b      	orrs	r3, r7
 8001164:	4433      	add	r3, r6
 8001166:	60ab      	str	r3, [r5, #8]
 8001168:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800116c:	f7ff fe2c 	bl	8000dc8 <HAL_RCC_GetPCLK1Freq>
 8001170:	fb04 f300 	mul.w	r3, r4, r0
 8001174:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8001178:	f04f 0864 	mov.w	r8, #100	; 0x64
 800117c:	00b6      	lsls	r6, r6, #2
 800117e:	fbb3 f3f6 	udiv	r3, r3, r6
 8001182:	fbb3 f3f8 	udiv	r3, r3, r8
 8001186:	011e      	lsls	r6, r3, #4
 8001188:	f7ff fe1e 	bl	8000dc8 <HAL_RCC_GetPCLK1Freq>
 800118c:	4360      	muls	r0, r4
 800118e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001192:	009b      	lsls	r3, r3, #2
 8001194:	fbb0 f7f3 	udiv	r7, r0, r3
 8001198:	f7ff fe16 	bl	8000dc8 <HAL_RCC_GetPCLK1Freq>
 800119c:	4360      	muls	r0, r4
 800119e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80011a2:	009b      	lsls	r3, r3, #2
 80011a4:	fbb0 f3f3 	udiv	r3, r0, r3
 80011a8:	fbb3 f3f8 	udiv	r3, r3, r8
 80011ac:	fb08 7313 	mls	r3, r8, r3, r7
 80011b0:	011b      	lsls	r3, r3, #4
 80011b2:	3332      	adds	r3, #50	; 0x32
 80011b4:	fbb3 f3f8 	udiv	r3, r3, r8
 80011b8:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 80011bc:	f7ff fe04 	bl	8000dc8 <HAL_RCC_GetPCLK1Freq>
 80011c0:	4360      	muls	r0, r4
 80011c2:	f8d9 2004 	ldr.w	r2, [r9, #4]
 80011c6:	0092      	lsls	r2, r2, #2
 80011c8:	fbb0 faf2 	udiv	sl, r0, r2
 80011cc:	f7ff fdfc 	bl	8000dc8 <HAL_RCC_GetPCLK1Freq>
 80011d0:	e7b7      	b.n	8001142 <UART_SetConfig+0xa6>
 80011d2:	bf00      	nop
 80011d4:	40013800 	.word	0x40013800

080011d8 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 80011d8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80011da:	4604      	mov	r4, r0
 80011dc:	460e      	mov	r6, r1
 80011de:	4617      	mov	r7, r2
 80011e0:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 80011e2:	6821      	ldr	r1, [r4, #0]
 80011e4:	680b      	ldr	r3, [r1, #0]
 80011e6:	ea36 0303 	bics.w	r3, r6, r3
 80011ea:	d101      	bne.n	80011f0 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 80011ec:	2000      	movs	r0, #0
}
 80011ee:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 80011f0:	1c6b      	adds	r3, r5, #1
 80011f2:	d0f7      	beq.n	80011e4 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 80011f4:	b995      	cbnz	r5, 800121c <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 80011f6:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 80011f8:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 80011fa:	68da      	ldr	r2, [r3, #12]
 80011fc:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 8001200:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8001202:	695a      	ldr	r2, [r3, #20]
 8001204:	f022 0201 	bic.w	r2, r2, #1
 8001208:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 800120a:	2320      	movs	r3, #32
 800120c:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8001210:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8001214:	2300      	movs	r3, #0
 8001216:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 800121a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 800121c:	f7ff f850 	bl	80002c0 <HAL_GetTick>
 8001220:	1bc0      	subs	r0, r0, r7
 8001222:	4285      	cmp	r5, r0
 8001224:	d2dd      	bcs.n	80011e2 <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 8001226:	e7e6      	b.n	80011f6 <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08001228 <HAL_UART_Init>:
{
 8001228:	b510      	push	{r4, lr}
  if(huart == NULL)
 800122a:	4604      	mov	r4, r0
 800122c:	b340      	cbz	r0, 8001280 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 800122e:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8001232:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8001236:	b91b      	cbnz	r3, 8001240 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8001238:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 800123c:	f000 fc92 	bl	8001b64 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8001240:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8001242:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8001244:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8001248:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 800124a:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 800124c:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8001250:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8001252:	f7ff ff23 	bl	800109c <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8001256:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001258:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800125a:	691a      	ldr	r2, [r3, #16]
 800125c:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8001260:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 8001262:	695a      	ldr	r2, [r3, #20]
 8001264:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8001268:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 800126a:	68da      	ldr	r2, [r3, #12]
 800126c:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8001270:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 8001272:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001274:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 8001276:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 800127a:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 800127e:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8001280:	2001      	movs	r0, #1
}
 8001282:	bd10      	pop	{r4, pc}

08001284 <HAL_UART_Transmit>:
{
 8001284:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8001288:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 800128a:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 800128e:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 8001290:	2b20      	cmp	r3, #32
{
 8001292:	460d      	mov	r5, r1
 8001294:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 8001296:	d14e      	bne.n	8001336 <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 8001298:	2900      	cmp	r1, #0
 800129a:	d049      	beq.n	8001330 <HAL_UART_Transmit+0xac>
 800129c:	2a00      	cmp	r2, #0
 800129e:	d047      	beq.n	8001330 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 80012a0:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 80012a4:	2b01      	cmp	r3, #1
 80012a6:	d046      	beq.n	8001336 <HAL_UART_Transmit+0xb2>
 80012a8:	2301      	movs	r3, #1
 80012aa:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80012ae:	2300      	movs	r3, #0
 80012b0:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 80012b2:	2321      	movs	r3, #33	; 0x21
 80012b4:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 80012b8:	f7ff f802 	bl	80002c0 <HAL_GetTick>
 80012bc:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 80012be:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 80012c2:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 80012c6:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 80012c8:	b29b      	uxth	r3, r3
 80012ca:	b96b      	cbnz	r3, 80012e8 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 80012cc:	463b      	mov	r3, r7
 80012ce:	4632      	mov	r2, r6
 80012d0:	2140      	movs	r1, #64	; 0x40
 80012d2:	4620      	mov	r0, r4
 80012d4:	f7ff ff80 	bl	80011d8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 80012d8:	b9a8      	cbnz	r0, 8001306 <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 80012da:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 80012dc:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 80012e0:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 80012e4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 80012e8:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80012ea:	4632      	mov	r2, r6
      huart->TxXferCount--;
 80012ec:	3b01      	subs	r3, #1
 80012ee:	b29b      	uxth	r3, r3
 80012f0:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80012f2:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80012f4:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80012f6:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80012fa:	4620      	mov	r0, r4
 80012fc:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80012fe:	d10e      	bne.n	800131e <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001300:	f7ff ff6a 	bl	80011d8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001304:	b110      	cbz	r0, 800130c <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 8001306:	2003      	movs	r0, #3
 8001308:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 800130c:	882b      	ldrh	r3, [r5, #0]
 800130e:	6822      	ldr	r2, [r4, #0]
 8001310:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8001314:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 8001316:	6923      	ldr	r3, [r4, #16]
 8001318:	b943      	cbnz	r3, 800132c <HAL_UART_Transmit+0xa8>
          pData +=2U;
 800131a:	3502      	adds	r5, #2
 800131c:	e7d3      	b.n	80012c6 <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800131e:	f7ff ff5b 	bl	80011d8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001322:	2800      	cmp	r0, #0
 8001324:	d1ef      	bne.n	8001306 <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 8001326:	6823      	ldr	r3, [r4, #0]
 8001328:	782a      	ldrb	r2, [r5, #0]
 800132a:	605a      	str	r2, [r3, #4]
 800132c:	3501      	adds	r5, #1
 800132e:	e7ca      	b.n	80012c6 <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 8001330:	2001      	movs	r0, #1
 8001332:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 8001336:	2002      	movs	r0, #2
}
 8001338:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

0800133c <HAL_UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_READY)
 800133c:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
 8001340:	2b20      	cmp	r3, #32
 8001342:	d120      	bne.n	8001386 <HAL_UART_Receive_IT+0x4a>
    if((pData == NULL) || (Size == 0U))
 8001344:	b1e9      	cbz	r1, 8001382 <HAL_UART_Receive_IT+0x46>
 8001346:	b1e2      	cbz	r2, 8001382 <HAL_UART_Receive_IT+0x46>
    __HAL_LOCK(huart);
 8001348:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 800134c:	2b01      	cmp	r3, #1
 800134e:	d01a      	beq.n	8001386 <HAL_UART_Receive_IT+0x4a>
    huart->RxXferCount = Size;
 8001350:	85c2      	strh	r2, [r0, #46]	; 0x2e
    huart->RxXferSize = Size;
 8001352:	8582      	strh	r2, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001354:	2300      	movs	r3, #0
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8001356:	2222      	movs	r2, #34	; 0x22
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001358:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 800135a:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 800135e:	6802      	ldr	r2, [r0, #0]
    huart->pRxBuffPtr = pData;
 8001360:	6281      	str	r1, [r0, #40]	; 0x28
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 8001362:	68d1      	ldr	r1, [r2, #12]
    __HAL_UNLOCK(huart);
 8001364:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 8001368:	f441 7180 	orr.w	r1, r1, #256	; 0x100
 800136c:	60d1      	str	r1, [r2, #12]
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 800136e:	6951      	ldr	r1, [r2, #20]
    return HAL_OK;
 8001370:	4618      	mov	r0, r3
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 8001372:	f041 0101 	orr.w	r1, r1, #1
 8001376:	6151      	str	r1, [r2, #20]
    __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
 8001378:	68d1      	ldr	r1, [r2, #12]
 800137a:	f041 0120 	orr.w	r1, r1, #32
 800137e:	60d1      	str	r1, [r2, #12]
    return HAL_OK;
 8001380:	4770      	bx	lr
      return HAL_ERROR;
 8001382:	2001      	movs	r0, #1
 8001384:	4770      	bx	lr
    return HAL_BUSY;
 8001386:	2002      	movs	r0, #2
}
 8001388:	4770      	bx	lr

0800138a <HAL_UART_TxCpltCallback>:
 800138a:	4770      	bx	lr

0800138c <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 800138c:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 8001390:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8001392:	2b22      	cmp	r3, #34	; 0x22
 8001394:	d136      	bne.n	8001404 <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001396:	6883      	ldr	r3, [r0, #8]
 8001398:	6901      	ldr	r1, [r0, #16]
 800139a:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 800139e:	6802      	ldr	r2, [r0, #0]
 80013a0:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80013a2:	d123      	bne.n	80013ec <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80013a4:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 80013a6:	b9e9      	cbnz	r1, 80013e4 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80013a8:	f3c2 0208 	ubfx	r2, r2, #0, #9
 80013ac:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 80013b0:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 80013b2:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 80013b4:	3c01      	subs	r4, #1
 80013b6:	b2a4      	uxth	r4, r4
 80013b8:	85c4      	strh	r4, [r0, #46]	; 0x2e
 80013ba:	b98c      	cbnz	r4, 80013e0 <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 80013bc:	6803      	ldr	r3, [r0, #0]
 80013be:	68da      	ldr	r2, [r3, #12]
 80013c0:	f022 0220 	bic.w	r2, r2, #32
 80013c4:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 80013c6:	68da      	ldr	r2, [r3, #12]
 80013c8:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 80013cc:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 80013ce:	695a      	ldr	r2, [r3, #20]
 80013d0:	f022 0201 	bic.w	r2, r2, #1
 80013d4:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 80013d6:	2320      	movs	r3, #32
 80013d8:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 80013dc:	f000 f8ca 	bl	8001574 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 80013e0:	2000      	movs	r0, #0
}
 80013e2:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 80013e4:	b2d2      	uxtb	r2, r2
 80013e6:	f823 2b01 	strh.w	r2, [r3], #1
 80013ea:	e7e1      	b.n	80013b0 <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 80013ec:	b921      	cbnz	r1, 80013f8 <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 80013ee:	1c59      	adds	r1, r3, #1
 80013f0:	6852      	ldr	r2, [r2, #4]
 80013f2:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 80013f4:	701a      	strb	r2, [r3, #0]
 80013f6:	e7dc      	b.n	80013b2 <UART_Receive_IT+0x26>
 80013f8:	6852      	ldr	r2, [r2, #4]
 80013fa:	1c59      	adds	r1, r3, #1
 80013fc:	6281      	str	r1, [r0, #40]	; 0x28
 80013fe:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8001402:	e7f7      	b.n	80013f4 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8001404:	2002      	movs	r0, #2
 8001406:	bd10      	pop	{r4, pc}

08001408 <HAL_UART_ErrorCallback>:
 8001408:	4770      	bx	lr
	...

0800140c <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 800140c:	6803      	ldr	r3, [r0, #0]
{
 800140e:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8001410:	681a      	ldr	r2, [r3, #0]
{
 8001412:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8001414:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8001416:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8001418:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 800141a:	d107      	bne.n	800142c <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 800141c:	0696      	lsls	r6, r2, #26
 800141e:	d55a      	bpl.n	80014d6 <HAL_UART_IRQHandler+0xca>
 8001420:	068d      	lsls	r5, r1, #26
 8001422:	d558      	bpl.n	80014d6 <HAL_UART_IRQHandler+0xca>
}
 8001424:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8001428:	f7ff bfb0 	b.w	800138c <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 800142c:	f015 0501 	ands.w	r5, r5, #1
 8001430:	d102      	bne.n	8001438 <HAL_UART_IRQHandler+0x2c>
 8001432:	f411 7f90 	tst.w	r1, #288	; 0x120
 8001436:	d04e      	beq.n	80014d6 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 8001438:	07d3      	lsls	r3, r2, #31
 800143a:	d505      	bpl.n	8001448 <HAL_UART_IRQHandler+0x3c>
 800143c:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800143e:	bf42      	ittt	mi
 8001440:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 8001442:	f043 0301 	orrmi.w	r3, r3, #1
 8001446:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001448:	0750      	lsls	r0, r2, #29
 800144a:	d504      	bpl.n	8001456 <HAL_UART_IRQHandler+0x4a>
 800144c:	b11d      	cbz	r5, 8001456 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800144e:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001450:	f043 0302 	orr.w	r3, r3, #2
 8001454:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001456:	0793      	lsls	r3, r2, #30
 8001458:	d504      	bpl.n	8001464 <HAL_UART_IRQHandler+0x58>
 800145a:	b11d      	cbz	r5, 8001464 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 800145c:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 800145e:	f043 0304 	orr.w	r3, r3, #4
 8001462:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001464:	0716      	lsls	r6, r2, #28
 8001466:	d504      	bpl.n	8001472 <HAL_UART_IRQHandler+0x66>
 8001468:	b11d      	cbz	r5, 8001472 <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 800146a:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 800146c:	f043 0308 	orr.w	r3, r3, #8
 8001470:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 8001472:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001474:	2b00      	cmp	r3, #0
 8001476:	d066      	beq.n	8001546 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001478:	0695      	lsls	r5, r2, #26
 800147a:	d504      	bpl.n	8001486 <HAL_UART_IRQHandler+0x7a>
 800147c:	0688      	lsls	r0, r1, #26
 800147e:	d502      	bpl.n	8001486 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 8001480:	4620      	mov	r0, r4
 8001482:	f7ff ff83 	bl	800138c <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8001486:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 8001488:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 800148a:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 800148c:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 800148e:	0711      	lsls	r1, r2, #28
 8001490:	d402      	bmi.n	8001498 <HAL_UART_IRQHandler+0x8c>
 8001492:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 8001496:	d01a      	beq.n	80014ce <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8001498:	f7ff fdf2 	bl	8001080 <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800149c:	6823      	ldr	r3, [r4, #0]
 800149e:	695a      	ldr	r2, [r3, #20]
 80014a0:	0652      	lsls	r2, r2, #25
 80014a2:	d510      	bpl.n	80014c6 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80014a4:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80014a6:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80014a8:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 80014ac:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80014ae:	b150      	cbz	r0, 80014c6 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 80014b0:	4b25      	ldr	r3, [pc, #148]	; (8001548 <HAL_UART_IRQHandler+0x13c>)
 80014b2:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 80014b4:	f7fe ff84 	bl	80003c0 <HAL_DMA_Abort_IT>
 80014b8:	2800      	cmp	r0, #0
 80014ba:	d044      	beq.n	8001546 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 80014bc:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 80014be:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 80014c2:	6b43      	ldr	r3, [r0, #52]	; 0x34
 80014c4:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 80014c6:	4620      	mov	r0, r4
 80014c8:	f7ff ff9e 	bl	8001408 <HAL_UART_ErrorCallback>
 80014cc:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 80014ce:	f7ff ff9b 	bl	8001408 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 80014d2:	63e5      	str	r5, [r4, #60]	; 0x3c
 80014d4:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 80014d6:	0616      	lsls	r6, r2, #24
 80014d8:	d527      	bpl.n	800152a <HAL_UART_IRQHandler+0x11e>
 80014da:	060d      	lsls	r5, r1, #24
 80014dc:	d525      	bpl.n	800152a <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 80014de:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 80014e2:	2a21      	cmp	r2, #33	; 0x21
 80014e4:	d12f      	bne.n	8001546 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80014e6:	68a2      	ldr	r2, [r4, #8]
 80014e8:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 80014ec:	6a22      	ldr	r2, [r4, #32]
 80014ee:	d117      	bne.n	8001520 <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 80014f0:	8811      	ldrh	r1, [r2, #0]
 80014f2:	f3c1 0108 	ubfx	r1, r1, #0, #9
 80014f6:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 80014f8:	6921      	ldr	r1, [r4, #16]
 80014fa:	b979      	cbnz	r1, 800151c <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 80014fc:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 80014fe:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 8001500:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 8001502:	3a01      	subs	r2, #1
 8001504:	b292      	uxth	r2, r2
 8001506:	84e2      	strh	r2, [r4, #38]	; 0x26
 8001508:	b9ea      	cbnz	r2, 8001546 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 800150a:	68da      	ldr	r2, [r3, #12]
 800150c:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8001510:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 8001512:	68da      	ldr	r2, [r3, #12]
 8001514:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8001518:	60da      	str	r2, [r3, #12]
 800151a:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 800151c:	3201      	adds	r2, #1
 800151e:	e7ee      	b.n	80014fe <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 8001520:	1c51      	adds	r1, r2, #1
 8001522:	6221      	str	r1, [r4, #32]
 8001524:	7812      	ldrb	r2, [r2, #0]
 8001526:	605a      	str	r2, [r3, #4]
 8001528:	e7ea      	b.n	8001500 <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 800152a:	0650      	lsls	r0, r2, #25
 800152c:	d50b      	bpl.n	8001546 <HAL_UART_IRQHandler+0x13a>
 800152e:	064a      	lsls	r2, r1, #25
 8001530:	d509      	bpl.n	8001546 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8001532:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8001534:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8001536:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 800153a:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 800153c:	2320      	movs	r3, #32
 800153e:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 8001542:	f7ff ff22 	bl	800138a <HAL_UART_TxCpltCallback>
 8001546:	bd70      	pop	{r4, r5, r6, pc}
 8001548:	0800154d 	.word	0x0800154d

0800154c <UART_DMAAbortOnError>:
{
 800154c:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 800154e:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8001550:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 8001552:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 8001554:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 8001556:	f7ff ff57 	bl	8001408 <HAL_UART_ErrorCallback>
 800155a:	bd08      	pop	{r3, pc}

0800155c <FLASH_If_Init>:
  * @brief  Unlocks Flash for write access
  * @param  None
  * @retval None
  */
void FLASH_If_Init(void)
{
 800155c:	b508      	push	{r3, lr}
  /* Unlock the Program memory */
  HAL_FLASH_Unlock();
 800155e:	f7fe ffc5 	bl	80004ec <HAL_FLASH_Unlock>

  /* Clear all FLASH flags */
  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
 8001562:	2234      	movs	r2, #52	; 0x34
 8001564:	4b02      	ldr	r3, [pc, #8]	; (8001570 <FLASH_If_Init+0x14>)
 8001566:	60da      	str	r2, [r3, #12]
  /* Unlock the Program memory */
  HAL_FLASH_Lock();
}
 8001568:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
  HAL_FLASH_Lock();
 800156c:	f7fe bfd0 	b.w	8000510 <HAL_FLASH_Lock>
 8001570:	40022000 	.word	0x40022000

08001574 <HAL_UART_RxCpltCallback>:



void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
    if(huart->Instance == USART1)//RGB Comunication
 8001574:	6802      	ldr	r2, [r0, #0]
 8001576:	4b0a      	ldr	r3, [pc, #40]	; (80015a0 <HAL_UART_RxCpltCallback+0x2c>)
 8001578:	429a      	cmp	r2, r3
 800157a:	d10f      	bne.n	800159c <HAL_UART_RxCpltCallback+0x28>
    {
        ring_buffer[ring_header] = rx3_data[0];
 800157c:	4a09      	ldr	r2, [pc, #36]	; (80015a4 <HAL_UART_RxCpltCallback+0x30>)
 800157e:	490a      	ldr	r1, [pc, #40]	; (80015a8 <HAL_UART_RxCpltCallback+0x34>)
 8001580:	6813      	ldr	r3, [r2, #0]
 8001582:	7808      	ldrb	r0, [r1, #0]
 8001584:	4909      	ldr	r1, [pc, #36]	; (80015ac <HAL_UART_RxCpltCallback+0x38>)
 8001586:	54c8      	strb	r0, [r1, r3]
        if(++ring_header>=100){ ring_header = 0; }
 8001588:	3301      	adds	r3, #1
 800158a:	2b63      	cmp	r3, #99	; 0x63
 800158c:	bf88      	it	hi
 800158e:	2300      	movhi	r3, #0

        HAL_UART_Receive_IT(&huart1,&rx3_data[0],1);
 8001590:	4905      	ldr	r1, [pc, #20]	; (80015a8 <HAL_UART_RxCpltCallback+0x34>)
        if(++ring_header>=100){ ring_header = 0; }
 8001592:	6013      	str	r3, [r2, #0]
        HAL_UART_Receive_IT(&huart1,&rx3_data[0],1);
 8001594:	4806      	ldr	r0, [pc, #24]	; (80015b0 <HAL_UART_RxCpltCallback+0x3c>)
 8001596:	2201      	movs	r2, #1
 8001598:	f7ff bed0 	b.w	800133c <HAL_UART_Receive_IT>
 800159c:	4770      	bx	lr
 800159e:	bf00      	nop
 80015a0:	40013800 	.word	0x40013800
 80015a4:	200000b8 	.word	0x200000b8
 80015a8:	200000c0 	.word	0x200000c0
 80015ac:	20000188 	.word	0x20000188
 80015b0:	200000fc 	.word	0x200000fc

080015b4 <HAL_TIM_PeriodElapsedCallback>:
    
}
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{

    if(htim->Instance == TIM6){
 80015b4:	6802      	ldr	r2, [r0, #0]
 80015b6:	4b08      	ldr	r3, [pc, #32]	; (80015d8 <HAL_TIM_PeriodElapsedCallback+0x24>)
 80015b8:	429a      	cmp	r2, r3
 80015ba:	d10b      	bne.n	80015d4 <HAL_TIM_PeriodElapsedCallback+0x20>
        UartTimerCnt++;
 80015bc:	4a07      	ldr	r2, [pc, #28]	; (80015dc <HAL_TIM_PeriodElapsedCallback+0x28>)
 80015be:	6813      	ldr	r3, [r2, #0]
 80015c0:	3301      	adds	r3, #1
 80015c2:	6013      	str	r3, [r2, #0]
        LedTimerCnt++;
 80015c4:	4a06      	ldr	r2, [pc, #24]	; (80015e0 <HAL_TIM_PeriodElapsedCallback+0x2c>)
 80015c6:	6813      	ldr	r3, [r2, #0]
 80015c8:	3301      	adds	r3, #1
 80015ca:	6013      	str	r3, [r2, #0]
        FirmwareTimerCnt++;
 80015cc:	4a05      	ldr	r2, [pc, #20]	; (80015e4 <HAL_TIM_PeriodElapsedCallback+0x30>)
 80015ce:	6813      	ldr	r3, [r2, #0]
 80015d0:	3301      	adds	r3, #1
 80015d2:	6013      	str	r3, [r2, #0]
 80015d4:	4770      	bx	lr
 80015d6:	bf00      	nop
 80015d8:	40001000 	.word	0x40001000
 80015dc:	200000b0 	.word	0x200000b0
 80015e0:	200000a8 	.word	0x200000a8
 80015e4:	200000a4 	.word	0x200000a4

080015e8 <Uart1_Data_Send>:
    }
}


void Uart1_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart1, data,size, 10); 
 80015e8:	460a      	mov	r2, r1
 80015ea:	230a      	movs	r3, #10
 80015ec:	4601      	mov	r1, r0
 80015ee:	4801      	ldr	r0, [pc, #4]	; (80015f4 <Uart1_Data_Send+0xc>)
 80015f0:	f7ff be48 	b.w	8001284 <HAL_UART_Transmit>
 80015f4:	200000fc 	.word	0x200000fc

080015f8 <_write>:
}

int _write (int file, uint8_t *ptr, uint16_t len) 
{
 80015f8:	b510      	push	{r4, lr}
 80015fa:	4614      	mov	r4, r2
    HAL_UART_Transmit (&huart1, ptr, len, 10); 
 80015fc:	230a      	movs	r3, #10
 80015fe:	4802      	ldr	r0, [pc, #8]	; (8001608 <_write+0x10>)
 8001600:	f7ff fe40 	bl	8001284 <HAL_UART_Transmit>
    return len;
}
 8001604:	4620      	mov	r0, r4
 8001606:	bd10      	pop	{r4, pc}
 8001608:	200000fc 	.word	0x200000fc

0800160c <Flash_RGB_Data_Write>:
#endif // PYJ.2019.03.20_END -- 
#define FLASH_USER_START_ADDR   StartAddr   /* Start @ of user Flash area */
#define FLASH_USER_END_ADDR     StartAddr + ((uint32_t)0x000FFFF)   /* End @ of user Flash area */
uint32_t Address = StartAddr;

uint8_t Flash_RGB_Data_Write(uint8_t* data){
 800160c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    uint16_t Firmdata = 0;
    uint8_t ret = 0;
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 8001610:	2400      	movs	r4, #0
uint8_t Flash_RGB_Data_Write(uint8_t* data){
 8001612:	4607      	mov	r7, r0
    uint8_t ret = 0;
 8001614:	4626      	mov	r6, r4
        Firmdata  = ((data[(bluecell_length + 1) + i]) & 0x00FF);
        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
 8001616:	4d10      	ldr	r5, [pc, #64]	; (8001658 <Flash_RGB_Data_Write+0x4c>)
            printf("HAL NOT OK \n");
 8001618:	f8df 8040 	ldr.w	r8, [pc, #64]	; 800165c <Flash_RGB_Data_Write+0x50>
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 800161c:	78bb      	ldrb	r3, [r7, #2]
 800161e:	3b02      	subs	r3, #2
 8001620:	429c      	cmp	r4, r3
 8001622:	db02      	blt.n	800162a <Flash_RGB_Data_Write+0x1e>
        }
        Address += 2;
//        HAL_Delay(5);
    }
    return ret;
}
 8001624:	4630      	mov	r0, r6
 8001626:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        Firmdata  = ((data[(bluecell_length + 1) + i]) & 0x00FF);
 800162a:	193b      	adds	r3, r7, r4
 800162c:	78da      	ldrb	r2, [r3, #3]
        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
 800162e:	791b      	ldrb	r3, [r3, #4]
        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
 8001630:	6829      	ldr	r1, [r5, #0]
        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
 8001632:	eb02 2203 	add.w	r2, r2, r3, lsl #8
        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
 8001636:	b292      	uxth	r2, r2
 8001638:	2300      	movs	r3, #0
 800163a:	2001      	movs	r0, #1
 800163c:	f7fe ff9c 	bl	8000578 <HAL_FLASH_Program>
 8001640:	b118      	cbz	r0, 800164a <Flash_RGB_Data_Write+0x3e>
            printf("HAL NOT OK \n");
 8001642:	4640      	mov	r0, r8
 8001644:	f000 fbcc 	bl	8001de0 <puts>
            ret = 1;
 8001648:	2601      	movs	r6, #1
        Address += 2;
 800164a:	682b      	ldr	r3, [r5, #0]
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 800164c:	3402      	adds	r4, #2
        Address += 2;
 800164e:	3302      	adds	r3, #2
 8001650:	602b      	str	r3, [r5, #0]
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 8001652:	b2e4      	uxtb	r4, r4
 8001654:	e7e2      	b.n	800161c <Flash_RGB_Data_Write+0x10>
 8001656:	bf00      	nop
 8001658:	20000008 	.word	0x20000008
 800165c:	08002e18 	.word	0x08002e18

08001660 <Flash_write>:
    /*Variable used for Erase procedure*/
    static FLASH_EraseInitTypeDef EraseInitStruct;
    static uint32_t PAGEError = 0;
    uint8_t ret = 0;
    /* Fill EraseInit structure*/
    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
 8001660:	2300      	movs	r3, #0
{
 8001662:	b573      	push	{r0, r1, r4, r5, r6, lr}
    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
 8001664:	4d16      	ldr	r5, [pc, #88]	; (80016c0 <Flash_write+0x60>)
    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;

    __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì�¸???�´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤
 8001666:	4c17      	ldr	r4, [pc, #92]	; (80016c4 <Flash_write+0x64>)
    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
 8001668:	602b      	str	r3, [r5, #0]
    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
 800166a:	4b17      	ldr	r3, [pc, #92]	; (80016c8 <Flash_write+0x68>)
{
 800166c:	4606      	mov	r6, r0
    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
 800166e:	60ab      	str	r3, [r5, #8]
    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
 8001670:	231f      	movs	r3, #31
 8001672:	60eb      	str	r3, [r5, #12]
    __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì�¸???�´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤
 8001674:	69e3      	ldr	r3, [r4, #28]
 8001676:	f023 0310 	bic.w	r3, r3, #16
 800167a:	61e3      	str	r3, [r4, #28]
    HAL_FLASH_Unlock(); // lock ??�
 800167c:	f7fe ff36 	bl	80004ec <HAL_FLASH_Unlock>
    if(flashinit == 0){
 8001680:	4b12      	ldr	r3, [pc, #72]	; (80016cc <Flash_write+0x6c>)
 8001682:	781a      	ldrb	r2, [r3, #0]
 8001684:	b94a      	cbnz	r2, 800169a <Flash_write+0x3a>
        flashinit= 1;
 8001686:	2201      	movs	r2, #1
        //FLASH_PageErase(StartAddr);
        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
 8001688:	4911      	ldr	r1, [pc, #68]	; (80016d0 <Flash_write+0x70>)
 800168a:	4628      	mov	r0, r5
        flashinit= 1;
 800168c:	701a      	strb	r2, [r3, #0]
        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
 800168e:	f7fe ffdd 	bl	800064c <HAL_FLASHEx_Erase>
 8001692:	b110      	cbz	r0, 800169a <Flash_write+0x3a>
            printf("Erase Failed \r\n");
 8001694:	480f      	ldr	r0, [pc, #60]	; (80016d4 <Flash_write+0x74>)
 8001696:	f000 fba3 	bl	8001de0 <puts>
        }
    }
//    FLASH_If_Erase();
    ret = Flash_RGB_Data_Write(&data[bluecell_stx]);
 800169a:	4630      	mov	r0, r6
 800169c:	f7ff ffb6 	bl	800160c <Flash_RGB_Data_Write>
 80016a0:	4605      	mov	r5, r0
    HAL_FLASH_Lock(); // lock ?ž ê·¸ê¸°
 80016a2:	f7fe ff35 	bl	8000510 <HAL_FLASH_Lock>
    __HAL_RCC_TIM6_CLK_ENABLE(); // 매ì�¸???�´ë¨¸ë?? ?ž¬?‹œ?ž‘?•©?‹ˆ?‹¤
    return ret;

}
 80016a6:	4628      	mov	r0, r5
    __HAL_RCC_TIM6_CLK_ENABLE(); // 매ì�¸???�´ë¨¸ë?? ?ž¬?‹œ?ž‘?•©?‹ˆ?‹¤
 80016a8:	69e3      	ldr	r3, [r4, #28]
 80016aa:	f043 0310 	orr.w	r3, r3, #16
 80016ae:	61e3      	str	r3, [r4, #28]
 80016b0:	69e3      	ldr	r3, [r4, #28]
 80016b2:	f003 0310 	and.w	r3, r3, #16
 80016b6:	9301      	str	r3, [sp, #4]
 80016b8:	9b01      	ldr	r3, [sp, #4]
}
 80016ba:	b002      	add	sp, #8
 80016bc:	bd70      	pop	{r4, r5, r6, pc}
 80016be:	bf00      	nop
 80016c0:	20000094 	.word	0x20000094
 80016c4:	40021000 	.word	0x40021000
 80016c8:	08004000 	.word	0x08004000
 80016cc:	200000b4 	.word	0x200000b4
 80016d0:	200000ac 	.word	0x200000ac
 80016d4:	08002e24 	.word	0x08002e24

080016d8 <Flash_InitRead>:
void Flash_InitRead(void) // ?“°ê¸°í•¨?ˆ˜
{
 80016d8:	b570      	push	{r4, r5, r6, lr}
    uint32_t  Address = 0;
    Address = StartAddr;
 80016da:	4c06      	ldr	r4, [pc, #24]	; (80016f4 <Flash_InitRead+0x1c>)
    for(uint32_t i = 0; i < 16; i++ ){
        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
 80016dc:	4e06      	ldr	r6, [pc, #24]	; (80016f8 <Flash_InitRead+0x20>)
    for(uint32_t i = 0; i < 16; i++ ){
 80016de:	4d07      	ldr	r5, [pc, #28]	; (80016fc <Flash_InitRead+0x24>)
        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
 80016e0:	7822      	ldrb	r2, [r4, #0]
 80016e2:	4621      	mov	r1, r4
 80016e4:	4630      	mov	r0, r6
        Address++;
 80016e6:	3401      	adds	r4, #1
        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
 80016e8:	f000 fb06 	bl	8001cf8 <iprintf>
    for(uint32_t i = 0; i < 16; i++ ){
 80016ec:	42ac      	cmp	r4, r5
 80016ee:	d1f7      	bne.n	80016e0 <Flash_InitRead+0x8>
        printf("%02X ",*(uint8_t*)Address);
        Address++;
    }
#endif // PYJ.2019.03.27_END -- 

}
 80016f0:	bd70      	pop	{r4, r5, r6, pc}
 80016f2:	bf00      	nop
 80016f4:	08004000 	.word	0x08004000
 80016f8:	08002e0a 	.word	0x08002e0a
 80016fc:	08004010 	.word	0x08004010

08001700 <Jump_App>:
typedef void (*fptr)(void);
fptr jump_to_app;
uint32_t jump_addr;
void Jump_App(void){
 8001700:	b5b0      	push	{r4, r5, r7, lr}
    __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì�¸???�´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤
 8001702:	4a0d      	ldr	r2, [pc, #52]	; (8001738 <Jump_App+0x38>)
void Jump_App(void){
 8001704:	af00      	add	r7, sp, #0
    __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì�¸???�´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤
 8001706:	69d3      	ldr	r3, [r2, #28]
    printf("boot loader start\n");               //메세� 출력
 8001708:	480c      	ldr	r0, [pc, #48]	; (800173c <Jump_App+0x3c>)
    __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì�¸???�´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤
 800170a:	f023 0310 	bic.w	r3, r3, #16
 800170e:	61d3      	str	r3, [r2, #28]
    printf("boot loader start\n");               //메세� 출력
 8001710:	f000 fb66 	bl	8001de0 <puts>
    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
 8001714:	4b0a      	ldr	r3, [pc, #40]	; (8001740 <Jump_App+0x40>)
 8001716:	4a0b      	ldr	r2, [pc, #44]	; (8001744 <Jump_App+0x44>)
 8001718:	681b      	ldr	r3, [r3, #0]
    jump_to_app = (fptr) jump_addr;
 800171a:	4c0b      	ldr	r4, [pc, #44]	; (8001748 <Jump_App+0x48>)
    
    /* init user app's sp */
    printf("jump!\n");
 800171c:	480b      	ldr	r0, [pc, #44]	; (800174c <Jump_App+0x4c>)
    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
 800171e:	6013      	str	r3, [r2, #0]
    jump_to_app = (fptr) jump_addr;
 8001720:	6023      	str	r3, [r4, #0]
    printf("jump!\n");
 8001722:	f000 fb5d 	bl	8001de0 <puts>
    __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
 8001726:	4b0a      	ldr	r3, [pc, #40]	; (8001750 <Jump_App+0x50>)
 8001728:	681b      	ldr	r3, [r3, #0]
  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
 800172a:	f383 8808 	msr	MSP, r3
    jump_to_app();
 800172e:	6823      	ldr	r3, [r4, #0]
}
 8001730:	46bd      	mov	sp, r7
 8001732:	e8bd 40b0 	ldmia.w	sp!, {r4, r5, r7, lr}
    jump_to_app();
 8001736:	4718      	bx	r3
 8001738:	40021000 	.word	0x40021000
 800173c:	08002e33 	.word	0x08002e33
 8001740:	08004004 	.word	0x08004004
 8001744:	2000013c 	.word	0x2000013c
 8001748:	20000184 	.word	0x20000184
 800174c:	08002e45 	.word	0x08002e45
 8001750:	08004000 	.word	0x08004000

08001754 <FirmwareUpdateStart>:
void FirmwareUpdateStart(uint8_t* data){
 8001754:	b573      	push	{r0, r1, r4, r5, r6, lr}
 8001756:	4604      	mov	r4, r0
    uint8_t ret = 0,crccheck = 0;
    uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe};
 8001758:	4b25      	ldr	r3, [pc, #148]	; (80017f0 <FirmwareUpdateStart+0x9c>)
    crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]);
 800175a:	78a1      	ldrb	r1, [r4, #2]
    uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe};
 800175c:	6818      	ldr	r0, [r3, #0]
 800175e:	791b      	ldrb	r3, [r3, #4]
 8001760:	9000      	str	r0, [sp, #0]
 8001762:	f88d 3004 	strb.w	r3, [sp, #4]
    crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]);
 8001766:	1863      	adds	r3, r4, r1
 8001768:	785a      	ldrb	r2, [r3, #1]
 800176a:	1c60      	adds	r0, r4, #1
 800176c:	f000 f9a7 	bl	8001abe <STH30_CheckCrc>
    if(crccheck == NO_ERROR){
 8001770:	2801      	cmp	r0, #1
 8001772:	d00b      	beq.n	800178c <FirmwareUpdateStart+0x38>
 8001774:	2300      	movs	r3, #0
            ret = Flash_write(&data[0]);
        if(ret == 1)
            tempdata[bluecell_type] = FirmwareUpdataNak;
    }else{
        for(uint8_t i = 0; i < data[bluecell_length] + 3; i++)
            printf("%02x ",data[i]);
 8001776:	4e1f      	ldr	r6, [pc, #124]	; (80017f4 <FirmwareUpdateStart+0xa0>)
        for(uint8_t i = 0; i < data[bluecell_length] + 3; i++)
 8001778:	78a2      	ldrb	r2, [r4, #2]
 800177a:	1c5d      	adds	r5, r3, #1
 800177c:	3202      	adds	r2, #2
 800177e:	b2db      	uxtb	r3, r3
 8001780:	429a      	cmp	r2, r3
 8001782:	da2f      	bge.n	80017e4 <FirmwareUpdateStart+0x90>
        printf("Check Sum error \n");
 8001784:	481c      	ldr	r0, [pc, #112]	; (80017f8 <FirmwareUpdateStart+0xa4>)
 8001786:	f000 fb2b 	bl	8001de0 <puts>
 800178a:	e00c      	b.n	80017a6 <FirmwareUpdateStart+0x52>
        tempdata[bluecell_type] = FirmwareUpdataAck;
 800178c:	2311      	movs	r3, #17
 800178e:	f88d 3001 	strb.w	r3, [sp, #1]
        if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte
 8001792:	7863      	ldrb	r3, [r4, #1]
 8001794:	2bdd      	cmp	r3, #221	; 0xdd
 8001796:	d001      	beq.n	800179c <FirmwareUpdateStart+0x48>
 8001798:	2bee      	cmp	r3, #238	; 0xee
 800179a:	d107      	bne.n	80017ac <FirmwareUpdateStart+0x58>
            ret = Flash_write(&data[0]);
 800179c:	4620      	mov	r0, r4
 800179e:	f7ff ff5f 	bl	8001660 <Flash_write>
        if(ret == 1)
 80017a2:	2801      	cmp	r0, #1
 80017a4:	d102      	bne.n	80017ac <FirmwareUpdateStart+0x58>
        tempdata[bluecell_type] = FirmwareUpdataNak;
 80017a6:	2322      	movs	r3, #34	; 0x22
 80017a8:	f88d 3001 	strb.w	r3, [sp, #1]
    }
    tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]);
 80017ac:	f89d 1002 	ldrb.w	r1, [sp, #2]
 80017b0:	f10d 0001 	add.w	r0, sp, #1
 80017b4:	f000 f968 	bl	8001a88 <STH30_CreateCrc>
    if(data[bluecell_type] != 0xEE && data[bluecell_type] != RGB_Reset){
 80017b8:	7863      	ldrb	r3, [r4, #1]
    tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]);
 80017ba:	f88d 0003 	strb.w	r0, [sp, #3]
    if(data[bluecell_type] != 0xEE && data[bluecell_type] != RGB_Reset){
 80017be:	2bee      	cmp	r3, #238	; 0xee
 80017c0:	d008      	beq.n	80017d4 <FirmwareUpdateStart+0x80>
 80017c2:	2b0a      	cmp	r3, #10
 80017c4:	d006      	beq.n	80017d4 <FirmwareUpdateStart+0x80>
        Uart1_Data_Send(&tempdata[bluecell_stx],tempdata[bluecell_length] + 3); 
 80017c6:	f89d 1002 	ldrb.w	r1, [sp, #2]
 80017ca:	4668      	mov	r0, sp
 80017cc:	3103      	adds	r1, #3
 80017ce:	b2c9      	uxtb	r1, r1
 80017d0:	f7ff ff0a 	bl	80015e8 <Uart1_Data_Send>
    }
    if(data[bluecell_type] == 0xEE)
 80017d4:	7863      	ldrb	r3, [r4, #1]
 80017d6:	2bee      	cmp	r3, #238	; 0xee
 80017d8:	d102      	bne.n	80017e0 <FirmwareUpdateStart+0x8c>
        printf("update Complete \n");
 80017da:	4808      	ldr	r0, [pc, #32]	; (80017fc <FirmwareUpdateStart+0xa8>)
 80017dc:	f000 fb00 	bl	8001de0 <puts>
}
 80017e0:	b002      	add	sp, #8
 80017e2:	bd70      	pop	{r4, r5, r6, pc}
            printf("%02x ",data[i]);
 80017e4:	5ce1      	ldrb	r1, [r4, r3]
 80017e6:	4630      	mov	r0, r6
 80017e8:	f000 fa86 	bl	8001cf8 <iprintf>
 80017ec:	462b      	mov	r3, r5
 80017ee:	e7c3      	b.n	8001778 <FirmwareUpdateStart+0x24>
 80017f0:	08002dd8 	.word	0x08002dd8
 80017f4:	08002de2 	.word	0x08002de2
 80017f8:	08002de8 	.word	0x08002de8
 80017fc:	08002df9 	.word	0x08002df9

08001800 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001800:	b510      	push	{r4, lr}
 8001802:	b090      	sub	sp, #64	; 0x40
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001804:	2228      	movs	r2, #40	; 0x28
 8001806:	2100      	movs	r1, #0
 8001808:	a806      	add	r0, sp, #24
 800180a:	f000 fa6d 	bl	8001ce8 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 800180e:	2100      	movs	r1, #0
 8001810:	2214      	movs	r2, #20
 8001812:	a801      	add	r0, sp, #4
 8001814:	f000 fa68 	bl	8001ce8 <memset>
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001818:	2402      	movs	r4, #2
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 800181a:	2201      	movs	r2, #1
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 800181c:	f44f 3380 	mov.w	r3, #65536	; 0x10000
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001820:	a806      	add	r0, sp, #24
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 8001822:	9206      	str	r2, [sp, #24]
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001824:	9307      	str	r3, [sp, #28]
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8001826:	920a      	str	r2, [sp, #40]	; 0x28
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001828:	930e      	str	r3, [sp, #56]	; 0x38
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 800182a:	940d      	str	r4, [sp, #52]	; 0x34
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 800182c:	f7ff f852 	bl	80008d4 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001830:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8001832:	2100      	movs	r1, #0
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001834:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8001836:	f44f 6380 	mov.w	r3, #1024	; 0x400
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 800183a:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 800183c:	9402      	str	r4, [sp, #8]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 800183e:	9103      	str	r1, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8001840:	9304      	str	r3, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 8001842:	9105      	str	r1, [sp, #20]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 8001844:	f7ff fa0e 	bl	8000c64 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
}
 8001848:	b010      	add	sp, #64	; 0x40
 800184a:	bd10      	pop	{r4, pc}

0800184c <main>:
{
 800184c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8001850:	b0cc      	sub	sp, #304	; 0x130
  uint8_t data[255] = {0,};
 8001852:	af0c      	add	r7, sp, #48	; 0x30
 8001854:	22ff      	movs	r2, #255	; 0xff
 8001856:	2100      	movs	r1, #0
 8001858:	4638      	mov	r0, r7
 800185a:	f000 fa45 	bl	8001ce8 <memset>
  uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb};
 800185e:	4b7b      	ldr	r3, [pc, #492]	; (8001a4c <main+0x200>)
  uint8_t SensorSerchStart_cmd[5] = {0xbe,25,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 8001860:	2502      	movs	r5, #2
  uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb};
 8001862:	6818      	ldr	r0, [r3, #0]
 8001864:	791b      	ldrb	r3, [r3, #4]
  uint8_t SensorSerchStart_cmd[5] = {0xbe,25,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 8001866:	4629      	mov	r1, r5
  uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb};
 8001868:	f88d 3014 	strb.w	r3, [sp, #20]
  uint8_t SensorSerchStart_cmd[5] = {0xbe,25,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 800186c:	23be      	movs	r3, #190	; 0xbe
 800186e:	f88d 3018 	strb.w	r3, [sp, #24]
 8001872:	2319      	movs	r3, #25
  uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb};
 8001874:	9004      	str	r0, [sp, #16]
  uint8_t SensorSerchStart_cmd[5] = {0xbe,25,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 8001876:	eb0d 0003 	add.w	r0, sp, r3
 800187a:	f88d 3019 	strb.w	r3, [sp, #25]
 800187e:	f88d 501a 	strb.w	r5, [sp, #26]
 8001882:	f000 f901 	bl	8001a88 <STH30_CreateCrc>
 8001886:	23eb      	movs	r3, #235	; 0xeb
 8001888:	f88d 001b 	strb.w	r0, [sp, #27]
 800188c:	f88d 301c 	strb.w	r3, [sp, #28]
  HAL_Init();
 8001890:	f7fe fcf8 	bl	8000284 <HAL_Init>
  SystemClock_Config();
 8001894:	f7ff ffb4 	bl	8001800 <SystemClock_Config>
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001898:	2210      	movs	r2, #16
 800189a:	2100      	movs	r1, #0
 800189c:	a808      	add	r0, sp, #32
 800189e:	f000 fa23 	bl	8001ce8 <memset>

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018a2:	4b6b      	ldr	r3, [pc, #428]	; (8001a50 <main+0x204>)
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOA_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
 80018a4:	f44f 4100 	mov.w	r1, #32768	; 0x8000
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018a8:	699a      	ldr	r2, [r3, #24]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
 80018aa:	486a      	ldr	r0, [pc, #424]	; (8001a54 <main+0x208>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018ac:	f042 0210 	orr.w	r2, r2, #16
 80018b0:	619a      	str	r2, [r3, #24]
 80018b2:	699a      	ldr	r2, [r3, #24]

  /*Configure GPIO pin : PC15 */
  GPIO_InitStruct.Pin = GPIO_PIN_15;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80018b4:	2400      	movs	r4, #0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018b6:	f002 0210 	and.w	r2, r2, #16
 80018ba:	9201      	str	r2, [sp, #4]
 80018bc:	9a01      	ldr	r2, [sp, #4]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 80018be:	699a      	ldr	r2, [r3, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80018c0:	f04f 0801 	mov.w	r8, #1
  __HAL_RCC_GPIOD_CLK_ENABLE();
 80018c4:	f042 0220 	orr.w	r2, r2, #32
 80018c8:	619a      	str	r2, [r3, #24]
 80018ca:	699a      	ldr	r2, [r3, #24]
  htim6.Instance = TIM6;
 80018cc:	4e62      	ldr	r6, [pc, #392]	; (8001a58 <main+0x20c>)
  __HAL_RCC_GPIOD_CLK_ENABLE();
 80018ce:	f002 0220 	and.w	r2, r2, #32
 80018d2:	9202      	str	r2, [sp, #8]
 80018d4:	9a02      	ldr	r2, [sp, #8]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80018d6:	699a      	ldr	r2, [r3, #24]
 80018d8:	f042 0204 	orr.w	r2, r2, #4
 80018dc:	619a      	str	r2, [r3, #24]
 80018de:	699b      	ldr	r3, [r3, #24]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
 80018e0:	2200      	movs	r2, #0
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80018e2:	f003 0304 	and.w	r3, r3, #4
 80018e6:	9303      	str	r3, [sp, #12]
 80018e8:	9b03      	ldr	r3, [sp, #12]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
 80018ea:	f7fe ffe9 	bl	80008c0 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = GPIO_PIN_15;
 80018ee:	f44f 4300 	mov.w	r3, #32768	; 0x8000
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80018f2:	a908      	add	r1, sp, #32
 80018f4:	4857      	ldr	r0, [pc, #348]	; (8001a54 <main+0x208>)
  GPIO_InitStruct.Pin = GPIO_PIN_15;
 80018f6:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80018f8:	f8cd 8024 	str.w	r8, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80018fc:	950b      	str	r5, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80018fe:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8001900:	f7fe fef2 	bl	80006e8 <HAL_GPIO_Init>
  htim6.Init.Prescaler = 1600-1;
 8001904:	f240 633f 	movw	r3, #1599	; 0x63f
 8001908:	4a54      	ldr	r2, [pc, #336]	; (8001a5c <main+0x210>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 800190a:	4630      	mov	r0, r6
  htim6.Init.Prescaler = 1600-1;
 800190c:	e886 000c 	stmia.w	r6, {r2, r3}
  htim6.Init.Period = 10-1;
 8001910:	2309      	movs	r3, #9
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8001912:	60b4      	str	r4, [r6, #8]
  htim6.Init.Period = 10-1;
 8001914:	60f3      	str	r3, [r6, #12]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8001916:	61b4      	str	r4, [r6, #24]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8001918:	9408      	str	r4, [sp, #32]
 800191a:	9409      	str	r4, [sp, #36]	; 0x24
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 800191c:	f7ff fb72 	bl	8001004 <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8001920:	a908      	add	r1, sp, #32
 8001922:	4630      	mov	r0, r6
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8001924:	9408      	str	r4, [sp, #32]
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 8001926:	9409      	str	r4, [sp, #36]	; 0x24
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8001928:	f7ff fb86 	bl	8001038 <HAL_TIMEx_MasterConfigSynchronization>
  huart1.Init.BaudRate = 115200;
 800192c:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
  huart1.Instance = USART1;
 8001930:	4d4b      	ldr	r5, [pc, #300]	; (8001a60 <main+0x214>)
  huart1.Init.BaudRate = 115200;
 8001932:	494c      	ldr	r1, [pc, #304]	; (8001a64 <main+0x218>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001934:	4628      	mov	r0, r5
  huart1.Init.BaudRate = 115200;
 8001936:	e885 000a 	stmia.w	r5, {r1, r3}
  huart1.Init.Mode = UART_MODE_TX_RX;
 800193a:	230c      	movs	r3, #12
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 800193c:	60ac      	str	r4, [r5, #8]
  huart1.Init.Mode = UART_MODE_TX_RX;
 800193e:	616b      	str	r3, [r5, #20]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8001940:	60ec      	str	r4, [r5, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 8001942:	612c      	str	r4, [r5, #16]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001944:	61ac      	str	r4, [r5, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8001946:	61ec      	str	r4, [r5, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001948:	f7ff fc6e 	bl	8001228 <HAL_UART_Init>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 800194c:	4622      	mov	r2, r4
 800194e:	4621      	mov	r1, r4
 8001950:	2036      	movs	r0, #54	; 0x36
 8001952:	f7fe fcdf 	bl	8000314 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 8001956:	2036      	movs	r0, #54	; 0x36
 8001958:	f7fe fd10 	bl	800037c <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 800195c:	4622      	mov	r2, r4
 800195e:	4621      	mov	r1, r4
 8001960:	2025      	movs	r0, #37	; 0x25
 8001962:	f7fe fcd7 	bl	8000314 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8001966:	2025      	movs	r0, #37	; 0x25
 8001968:	f7fe fd08 	bl	800037c <HAL_NVIC_EnableIRQ>
  HAL_TIM_Base_Start_IT(&htim6);
 800196c:	4630      	mov	r0, r6
 800196e:	f7ff fa4b 	bl	8000e08 <HAL_TIM_Base_Start_IT>
  HAL_UART_Receive_IT(&huart1, &rx3_data[0],1);
 8001972:	4642      	mov	r2, r8
 8001974:	493c      	ldr	r1, [pc, #240]	; (8001a68 <main+0x21c>)
 8001976:	4628      	mov	r0, r5
 8001978:	f7ff fce0 	bl	800133c <HAL_UART_Receive_IT>
  setbuf(stdout, NULL); // \n ?��?��?��, printf �??????��?���????? ?��?��?��
 800197c:	4b3b      	ldr	r3, [pc, #236]	; (8001a6c <main+0x220>)
 800197e:	4621      	mov	r1, r4
 8001980:	681b      	ldr	r3, [r3, #0]
      if(FirmwareTimerCnt > 3000){
 8001982:	4e3b      	ldr	r6, [pc, #236]	; (8001a70 <main+0x224>)
  setbuf(stdout, NULL); // \n ?��?��?��, printf �??????��?���????? ?��?��?��
 8001984:	6898      	ldr	r0, [r3, #8]
 8001986:	f000 fa33 	bl	8001df0 <setbuf>
  Uart1_Data_Send(&SensorSerchStart_cmd[bluecell_stx], SensorSerchStart_cmd[bluecell_length] + 3);
 800198a:	f89d 101a 	ldrb.w	r1, [sp, #26]
 800198e:	a806      	add	r0, sp, #24
 8001990:	3103      	adds	r1, #3
 8001992:	b2c9      	uxtb	r1, r1
 8001994:	f7ff fe28 	bl	80015e8 <Uart1_Data_Send>
  FLASH_If_Init();
 8001998:	f7ff fde0 	bl	800155c <FLASH_If_Init>
  Flash_InitRead();
 800199c:	f7ff fe9c 	bl	80016d8 <Flash_InitRead>
  bootdata[bluecell_crc] = STH30_CreateCrc(&bootdata[bluecell_type],bootdata[bluecell_length]);
 80019a0:	f89d 1012 	ldrb.w	r1, [sp, #18]
 80019a4:	f10d 0011 	add.w	r0, sp, #17
 80019a8:	f000 f86e 	bl	8001a88 <STH30_CreateCrc>
 80019ac:	f88d 0013 	strb.w	r0, [sp, #19]
  HAL_Delay(100);
 80019b0:	2064      	movs	r0, #100	; 0x64
 80019b2:	f7fe fc8b 	bl	80002cc <HAL_Delay>
  Uart1_Data_Send(&bootdata[bluecell_stx],bootdata[bluecell_length] + 3); 
 80019b6:	f89d 1012 	ldrb.w	r1, [sp, #18]
 80019ba:	a804      	add	r0, sp, #16
 80019bc:	3103      	adds	r1, #3
 80019be:	b2c9      	uxtb	r1, r1
 80019c0:	f7ff fe12 	bl	80015e8 <Uart1_Data_Send>
  uint8_t cnt = 0;
 80019c4:	4625      	mov	r5, r4
 80019c6:	46b1      	mov	r9, r6
        HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 80019c8:	f8df 8088 	ldr.w	r8, [pc, #136]	; 8001a54 <main+0x208>
      if(FirmwareTimerCnt > 3000){
 80019cc:	f640 33b8 	movw	r3, #3000	; 0xbb8
 80019d0:	6832      	ldr	r2, [r6, #0]
 80019d2:	429a      	cmp	r2, r3
 80019d4:	d901      	bls.n	80019da <main+0x18e>
          Jump_App();
 80019d6:	f7ff fe93 	bl	8001700 <Jump_App>
     if(ring_tail != ring_header){ // <------- 
 80019da:	4a26      	ldr	r2, [pc, #152]	; (8001a74 <main+0x228>)
 80019dc:	4b26      	ldr	r3, [pc, #152]	; (8001a78 <main+0x22c>)
 80019de:	6811      	ldr	r1, [r2, #0]
 80019e0:	681b      	ldr	r3, [r3, #0]
 80019e2:	4299      	cmp	r1, r3
 80019e4:	d01e      	beq.n	8001a24 <main+0x1d8>
        data[cnt++] = ring_buffer[ring_tail++];
 80019e6:	4c25      	ldr	r4, [pc, #148]	; (8001a7c <main+0x230>)
 80019e8:	1c48      	adds	r0, r1, #1
 80019ea:	5c61      	ldrb	r1, [r4, r1]
 80019ec:	1c6b      	adds	r3, r5, #1
 80019ee:	5579      	strb	r1, [r7, r5]
 80019f0:	2100      	movs	r1, #0
 80019f2:	b2db      	uxtb	r3, r3
 80019f4:	461d      	mov	r5, r3
        if(ring_tail >= 100){ ring_tail = 0; }
 80019f6:	2863      	cmp	r0, #99	; 0x63
        data[cnt++] = ring_buffer[ring_tail++];
 80019f8:	6010      	str	r0, [r2, #0]
        if(ring_tail >= 100){ ring_tail = 0; }
 80019fa:	bf88      	it	hi
 80019fc:	6011      	strhi	r1, [r2, #0]
        UartTimerCnt = 0;
 80019fe:	4a20      	ldr	r2, [pc, #128]	; (8001a80 <main+0x234>)
 8001a00:	6011      	str	r1, [r2, #0]
    if(uartrecv == 1 && UartTimerCnt > 100){
 8001a02:	4b1f      	ldr	r3, [pc, #124]	; (8001a80 <main+0x234>)
 8001a04:	681b      	ldr	r3, [r3, #0]
 8001a06:	2b64      	cmp	r3, #100	; 0x64
 8001a08:	d91e      	bls.n	8001a48 <main+0x1fc>
        FirmwareTimerCnt = 0;
 8001a0a:	2500      	movs	r5, #0
        FirmwareUpdateStart(&data[0]);
 8001a0c:	4638      	mov	r0, r7
 8001a0e:	f7ff fea1 	bl	8001754 <FirmwareUpdateStart>
        memset(&data[0],0,100);
 8001a12:	2264      	movs	r2, #100	; 0x64
 8001a14:	2100      	movs	r1, #0
 8001a16:	4638      	mov	r0, r7
 8001a18:	f000 f966 	bl	8001ce8 <memset>
        cnt = 0;
 8001a1c:	462c      	mov	r4, r5
        FirmwareTimerCnt = 0;
 8001a1e:	f8c9 5000 	str.w	r5, [r9]
 8001a22:	e001      	b.n	8001a28 <main+0x1dc>
    if(uartrecv == 1 && UartTimerCnt > 100){
 8001a24:	2c00      	cmp	r4, #0
 8001a26:	d1ec      	bne.n	8001a02 <main+0x1b6>
    if(LedTimerCnt > 500){
 8001a28:	f8df a058 	ldr.w	sl, [pc, #88]	; 8001a84 <main+0x238>
 8001a2c:	f8da 3000 	ldr.w	r3, [sl]
 8001a30:	f5b3 7ffa 	cmp.w	r3, #500	; 0x1f4
 8001a34:	d9ca      	bls.n	80019cc <main+0x180>
        HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 8001a36:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001a3a:	4640      	mov	r0, r8
 8001a3c:	f7fe ff45 	bl	80008ca <HAL_GPIO_TogglePin>
        LedTimerCnt = 0;
 8001a40:	2300      	movs	r3, #0
 8001a42:	f8ca 3000 	str.w	r3, [sl]
 8001a46:	e7c1      	b.n	80019cc <main+0x180>
 8001a48:	2401      	movs	r4, #1
 8001a4a:	e7ed      	b.n	8001a28 <main+0x1dc>
 8001a4c:	08002ddd 	.word	0x08002ddd
 8001a50:	40021000 	.word	0x40021000
 8001a54:	40011000 	.word	0x40011000
 8001a58:	20000140 	.word	0x20000140
 8001a5c:	40001000 	.word	0x40001000
 8001a60:	200000fc 	.word	0x200000fc
 8001a64:	40013800 	.word	0x40013800
 8001a68:	200000c0 	.word	0x200000c0
 8001a6c:	20000010 	.word	0x20000010
 8001a70:	200000a4 	.word	0x200000a4
 8001a74:	200000bc 	.word	0x200000bc
 8001a78:	200000b8 	.word	0x200000b8
 8001a7c:	20000188 	.word	0x20000188
 8001a80:	200000b0 	.word	0x200000b0
 8001a84:	200000a8 	.word	0x200000a8

08001a88 <STH30_CreateCrc>:
	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 8001a88:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001a8a:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001a8c:	4604      	mov	r4, r0
 8001a8e:	1a22      	subs	r2, r4, r0
 8001a90:	b2d2      	uxtb	r2, r2
 8001a92:	4291      	cmp	r1, r2
 8001a94:	d801      	bhi.n	8001a9a <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 8001a96:	4618      	mov	r0, r3
 8001a98:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 8001a9a:	f814 2b01 	ldrb.w	r2, [r4], #1
 8001a9e:	4053      	eors	r3, r2
 8001aa0:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001aa2:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001aa6:	f102 32ff 	add.w	r2, r2, #4294967295
 8001aaa:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001aae:	bf18      	it	ne
 8001ab0:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001ab4:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 8001ab8:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001aba:	d1f2      	bne.n	8001aa2 <STH30_CreateCrc+0x1a>
 8001abc:	e7e7      	b.n	8001a8e <STH30_CreateCrc+0x6>

08001abe <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 8001abe:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001ac0:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001ac2:	4605      	mov	r5, r0
 8001ac4:	1a2c      	subs	r4, r5, r0
 8001ac6:	b2e4      	uxtb	r4, r4
 8001ac8:	42a1      	cmp	r1, r4
 8001aca:	d803      	bhi.n	8001ad4 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8001acc:	1a9b      	subs	r3, r3, r2
 8001ace:	4258      	negs	r0, r3
 8001ad0:	4158      	adcs	r0, r3
 8001ad2:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 8001ad4:	f815 4b01 	ldrb.w	r4, [r5], #1
 8001ad8:	4063      	eors	r3, r4
 8001ada:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001adc:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001ae0:	f104 34ff 	add.w	r4, r4, #4294967295
 8001ae4:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001ae8:	bf18      	it	ne
 8001aea:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001aee:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8001af2:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001af4:	d1f2      	bne.n	8001adc <STH30_CheckCrc+0x1e>
 8001af6:	e7e5      	b.n	8001ac4 <STH30_CheckCrc+0x6>

08001af8 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8001af8:	4b0e      	ldr	r3, [pc, #56]	; (8001b34 <HAL_MspInit+0x3c>)
{
 8001afa:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8001afc:	699a      	ldr	r2, [r3, #24]
 8001afe:	f042 0201 	orr.w	r2, r2, #1
 8001b02:	619a      	str	r2, [r3, #24]
 8001b04:	699a      	ldr	r2, [r3, #24]
 8001b06:	f002 0201 	and.w	r2, r2, #1
 8001b0a:	9200      	str	r2, [sp, #0]
 8001b0c:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8001b0e:	69da      	ldr	r2, [r3, #28]
 8001b10:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8001b14:	61da      	str	r2, [r3, #28]
 8001b16:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /**NOJTAG: JTAG-DP Disabled and SW-DP Enabled 
  */
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 8001b18:	4a07      	ldr	r2, [pc, #28]	; (8001b38 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 8001b1a:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001b1e:	9301      	str	r3, [sp, #4]
 8001b20:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 8001b22:	6853      	ldr	r3, [r2, #4]
 8001b24:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8001b28:	f043 7300 	orr.w	r3, r3, #33554432	; 0x2000000
 8001b2c:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8001b2e:	b002      	add	sp, #8
 8001b30:	4770      	bx	lr
 8001b32:	bf00      	nop
 8001b34:	40021000 	.word	0x40021000
 8001b38:	40010000 	.word	0x40010000

08001b3c <HAL_TIM_Base_MspInit>:
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{

  if(htim_base->Instance==TIM6)
 8001b3c:	6802      	ldr	r2, [r0, #0]
 8001b3e:	4b08      	ldr	r3, [pc, #32]	; (8001b60 <HAL_TIM_Base_MspInit+0x24>)
{
 8001b40:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 8001b42:	429a      	cmp	r2, r3
 8001b44:	d10a      	bne.n	8001b5c <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 8001b46:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 8001b4a:	69da      	ldr	r2, [r3, #28]
 8001b4c:	f042 0210 	orr.w	r2, r2, #16
 8001b50:	61da      	str	r2, [r3, #28]
 8001b52:	69db      	ldr	r3, [r3, #28]
 8001b54:	f003 0310 	and.w	r3, r3, #16
 8001b58:	9301      	str	r3, [sp, #4]
 8001b5a:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 8001b5c:	b002      	add	sp, #8
 8001b5e:	4770      	bx	lr
 8001b60:	40001000 	.word	0x40001000

08001b64 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8001b64:	b510      	push	{r4, lr}
 8001b66:	4604      	mov	r4, r0
 8001b68:	b086      	sub	sp, #24

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001b6a:	2210      	movs	r2, #16
 8001b6c:	2100      	movs	r1, #0
 8001b6e:	a802      	add	r0, sp, #8
 8001b70:	f000 f8ba 	bl	8001ce8 <memset>
  if(huart->Instance==USART1)
 8001b74:	6822      	ldr	r2, [r4, #0]
 8001b76:	4b17      	ldr	r3, [pc, #92]	; (8001bd4 <HAL_UART_MspInit+0x70>)
 8001b78:	429a      	cmp	r2, r3
 8001b7a:	d128      	bne.n	8001bce <HAL_UART_MspInit+0x6a>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 8001b7c:	f503 4358 	add.w	r3, r3, #55296	; 0xd800
 8001b80:	699a      	ldr	r2, [r3, #24]
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001b82:	a902      	add	r1, sp, #8
    __HAL_RCC_USART1_CLK_ENABLE();
 8001b84:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8001b88:	619a      	str	r2, [r3, #24]
 8001b8a:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001b8c:	4812      	ldr	r0, [pc, #72]	; (8001bd8 <HAL_UART_MspInit+0x74>)
    __HAL_RCC_USART1_CLK_ENABLE();
 8001b8e:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 8001b92:	9200      	str	r2, [sp, #0]
 8001b94:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8001b96:	699a      	ldr	r2, [r3, #24]
 8001b98:	f042 0204 	orr.w	r2, r2, #4
 8001b9c:	619a      	str	r2, [r3, #24]
 8001b9e:	699b      	ldr	r3, [r3, #24]
 8001ba0:	f003 0304 	and.w	r3, r3, #4
 8001ba4:	9301      	str	r3, [sp, #4]
 8001ba6:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8001ba8:	f44f 7300 	mov.w	r3, #512	; 0x200
 8001bac:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8001bae:	2302      	movs	r3, #2
 8001bb0:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8001bb2:	2303      	movs	r3, #3
 8001bb4:	9305      	str	r3, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001bb6:	f7fe fd97 	bl	80006e8 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8001bba:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8001bbe:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001bc0:	2300      	movs	r3, #0
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001bc2:	a902      	add	r1, sp, #8
 8001bc4:	4804      	ldr	r0, [pc, #16]	; (8001bd8 <HAL_UART_MspInit+0x74>)
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001bc6:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001bc8:	9304      	str	r3, [sp, #16]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001bca:	f7fe fd8d 	bl	80006e8 <HAL_GPIO_Init>
  /* USER CODE BEGIN USART1_MspInit 1 */

  /* USER CODE END USART1_MspInit 1 */
  }

}
 8001bce:	b006      	add	sp, #24
 8001bd0:	bd10      	pop	{r4, pc}
 8001bd2:	bf00      	nop
 8001bd4:	40013800 	.word	0x40013800
 8001bd8:	40010800 	.word	0x40010800

08001bdc <NMI_Handler>:
 8001bdc:	4770      	bx	lr

08001bde <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8001bde:	e7fe      	b.n	8001bde <HardFault_Handler>

08001be0 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8001be0:	e7fe      	b.n	8001be0 <MemManage_Handler>

08001be2 <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8001be2:	e7fe      	b.n	8001be2 <BusFault_Handler>

08001be4 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8001be4:	e7fe      	b.n	8001be4 <UsageFault_Handler>

08001be6 <SVC_Handler>:
 8001be6:	4770      	bx	lr

08001be8 <DebugMon_Handler>:
 8001be8:	4770      	bx	lr

08001bea <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 8001bea:	4770      	bx	lr

08001bec <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 8001bec:	f7fe bb5c 	b.w	80002a8 <HAL_IncTick>

08001bf0 <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8001bf0:	4801      	ldr	r0, [pc, #4]	; (8001bf8 <USART1_IRQHandler+0x8>)
 8001bf2:	f7ff bc0b 	b.w	800140c <HAL_UART_IRQHandler>
 8001bf6:	bf00      	nop
 8001bf8:	200000fc 	.word	0x200000fc

08001bfc <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8001bfc:	4801      	ldr	r0, [pc, #4]	; (8001c04 <TIM6_IRQHandler+0x8>)
 8001bfe:	f7ff b912 	b.w	8000e26 <HAL_TIM_IRQHandler>
 8001c02:	bf00      	nop
 8001c04:	20000140 	.word	0x20000140

08001c08 <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 8001c08:	4b0f      	ldr	r3, [pc, #60]	; (8001c48 <SystemInit+0x40>)
 8001c0a:	681a      	ldr	r2, [r3, #0]
 8001c0c:	f042 0201 	orr.w	r2, r2, #1
 8001c10:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8001c12:	6859      	ldr	r1, [r3, #4]
 8001c14:	4a0d      	ldr	r2, [pc, #52]	; (8001c4c <SystemInit+0x44>)
 8001c16:	400a      	ands	r2, r1
 8001c18:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 8001c1a:	681a      	ldr	r2, [r3, #0]
 8001c1c:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8001c20:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8001c24:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8001c26:	681a      	ldr	r2, [r3, #0]
 8001c28:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8001c2c:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 8001c2e:	685a      	ldr	r2, [r3, #4]
 8001c30:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8001c34:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 8001c36:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 8001c3a:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 8001c3c:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
 8001c40:	4b03      	ldr	r3, [pc, #12]	; (8001c50 <SystemInit+0x48>)
 8001c42:	609a      	str	r2, [r3, #8]
 8001c44:	4770      	bx	lr
 8001c46:	bf00      	nop
 8001c48:	40021000 	.word	0x40021000
 8001c4c:	f8ff0000 	.word	0xf8ff0000
 8001c50:	e000ed00 	.word	0xe000ed00

08001c54 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8001c54:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8001c56:	e003      	b.n	8001c60 <LoopCopyDataInit>

08001c58 <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8001c58:	4b0b      	ldr	r3, [pc, #44]	; (8001c88 <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 8001c5a:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 8001c5c:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 8001c5e:	3104      	adds	r1, #4

08001c60 <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 8001c60:	480a      	ldr	r0, [pc, #40]	; (8001c8c <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 8001c62:	4b0b      	ldr	r3, [pc, #44]	; (8001c90 <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8001c64:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8001c66:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8001c68:	d3f6      	bcc.n	8001c58 <CopyDataInit>
  ldr r2, =_sbss
 8001c6a:	4a0a      	ldr	r2, [pc, #40]	; (8001c94 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 8001c6c:	e002      	b.n	8001c74 <LoopFillZerobss>

08001c6e <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 8001c6e:	2300      	movs	r3, #0
  str r3, [r2], #4
 8001c70:	f842 3b04 	str.w	r3, [r2], #4

08001c74 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8001c74:	4b08      	ldr	r3, [pc, #32]	; (8001c98 <LoopFillZerobss+0x24>)
  cmp r2, r3
 8001c76:	429a      	cmp	r2, r3
  bcc FillZerobss
 8001c78:	d3f9      	bcc.n	8001c6e <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 8001c7a:	f7ff ffc5 	bl	8001c08 <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 8001c7e:	f000 f80f 	bl	8001ca0 <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 8001c82:	f7ff fde3 	bl	800184c <main>
  bx lr
 8001c86:	4770      	bx	lr
  ldr r3, =_sidata
 8001c88:	08002f04 	.word	0x08002f04
  ldr r0, =_sdata
 8001c8c:	20000000 	.word	0x20000000
  ldr r3, =_edata
 8001c90:	20000074 	.word	0x20000074
  ldr r2, =_sbss
 8001c94:	20000078 	.word	0x20000078
  ldr r3, = _ebss
 8001c98:	2000028c 	.word	0x2000028c

08001c9c <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 8001c9c:	e7fe      	b.n	8001c9c <ADC1_2_IRQHandler>
	...

08001ca0 <__libc_init_array>:
 8001ca0:	b570      	push	{r4, r5, r6, lr}
 8001ca2:	2500      	movs	r5, #0
 8001ca4:	4e0c      	ldr	r6, [pc, #48]	; (8001cd8 <__libc_init_array+0x38>)
 8001ca6:	4c0d      	ldr	r4, [pc, #52]	; (8001cdc <__libc_init_array+0x3c>)
 8001ca8:	1ba4      	subs	r4, r4, r6
 8001caa:	10a4      	asrs	r4, r4, #2
 8001cac:	42a5      	cmp	r5, r4
 8001cae:	d109      	bne.n	8001cc4 <__libc_init_array+0x24>
 8001cb0:	f001 f87e 	bl	8002db0 <_init>
 8001cb4:	2500      	movs	r5, #0
 8001cb6:	4e0a      	ldr	r6, [pc, #40]	; (8001ce0 <__libc_init_array+0x40>)
 8001cb8:	4c0a      	ldr	r4, [pc, #40]	; (8001ce4 <__libc_init_array+0x44>)
 8001cba:	1ba4      	subs	r4, r4, r6
 8001cbc:	10a4      	asrs	r4, r4, #2
 8001cbe:	42a5      	cmp	r5, r4
 8001cc0:	d105      	bne.n	8001cce <__libc_init_array+0x2e>
 8001cc2:	bd70      	pop	{r4, r5, r6, pc}
 8001cc4:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8001cc8:	4798      	blx	r3
 8001cca:	3501      	adds	r5, #1
 8001ccc:	e7ee      	b.n	8001cac <__libc_init_array+0xc>
 8001cce:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8001cd2:	4798      	blx	r3
 8001cd4:	3501      	adds	r5, #1
 8001cd6:	e7f2      	b.n	8001cbe <__libc_init_array+0x1e>
 8001cd8:	08002efc 	.word	0x08002efc
 8001cdc:	08002efc 	.word	0x08002efc
 8001ce0:	08002efc 	.word	0x08002efc
 8001ce4:	08002f00 	.word	0x08002f00

08001ce8 <memset>:
 8001ce8:	4603      	mov	r3, r0
 8001cea:	4402      	add	r2, r0
 8001cec:	4293      	cmp	r3, r2
 8001cee:	d100      	bne.n	8001cf2 <memset+0xa>
 8001cf0:	4770      	bx	lr
 8001cf2:	f803 1b01 	strb.w	r1, [r3], #1
 8001cf6:	e7f9      	b.n	8001cec <memset+0x4>

08001cf8 <iprintf>:
 8001cf8:	b40f      	push	{r0, r1, r2, r3}
 8001cfa:	4b0a      	ldr	r3, [pc, #40]	; (8001d24 <iprintf+0x2c>)
 8001cfc:	b513      	push	{r0, r1, r4, lr}
 8001cfe:	681c      	ldr	r4, [r3, #0]
 8001d00:	b124      	cbz	r4, 8001d0c <iprintf+0x14>
 8001d02:	69a3      	ldr	r3, [r4, #24]
 8001d04:	b913      	cbnz	r3, 8001d0c <iprintf+0x14>
 8001d06:	4620      	mov	r0, r4
 8001d08:	f000 fada 	bl	80022c0 <__sinit>
 8001d0c:	ab05      	add	r3, sp, #20
 8001d0e:	9a04      	ldr	r2, [sp, #16]
 8001d10:	68a1      	ldr	r1, [r4, #8]
 8001d12:	4620      	mov	r0, r4
 8001d14:	9301      	str	r3, [sp, #4]
 8001d16:	f000 fc9b 	bl	8002650 <_vfiprintf_r>
 8001d1a:	b002      	add	sp, #8
 8001d1c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8001d20:	b004      	add	sp, #16
 8001d22:	4770      	bx	lr
 8001d24:	20000010 	.word	0x20000010

08001d28 <_puts_r>:
 8001d28:	b570      	push	{r4, r5, r6, lr}
 8001d2a:	460e      	mov	r6, r1
 8001d2c:	4605      	mov	r5, r0
 8001d2e:	b118      	cbz	r0, 8001d38 <_puts_r+0x10>
 8001d30:	6983      	ldr	r3, [r0, #24]
 8001d32:	b90b      	cbnz	r3, 8001d38 <_puts_r+0x10>
 8001d34:	f000 fac4 	bl	80022c0 <__sinit>
 8001d38:	69ab      	ldr	r3, [r5, #24]
 8001d3a:	68ac      	ldr	r4, [r5, #8]
 8001d3c:	b913      	cbnz	r3, 8001d44 <_puts_r+0x1c>
 8001d3e:	4628      	mov	r0, r5
 8001d40:	f000 fabe 	bl	80022c0 <__sinit>
 8001d44:	4b23      	ldr	r3, [pc, #140]	; (8001dd4 <_puts_r+0xac>)
 8001d46:	429c      	cmp	r4, r3
 8001d48:	d117      	bne.n	8001d7a <_puts_r+0x52>
 8001d4a:	686c      	ldr	r4, [r5, #4]
 8001d4c:	89a3      	ldrh	r3, [r4, #12]
 8001d4e:	071b      	lsls	r3, r3, #28
 8001d50:	d51d      	bpl.n	8001d8e <_puts_r+0x66>
 8001d52:	6923      	ldr	r3, [r4, #16]
 8001d54:	b1db      	cbz	r3, 8001d8e <_puts_r+0x66>
 8001d56:	3e01      	subs	r6, #1
 8001d58:	68a3      	ldr	r3, [r4, #8]
 8001d5a:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8001d5e:	3b01      	subs	r3, #1
 8001d60:	60a3      	str	r3, [r4, #8]
 8001d62:	b9e9      	cbnz	r1, 8001da0 <_puts_r+0x78>
 8001d64:	2b00      	cmp	r3, #0
 8001d66:	da2e      	bge.n	8001dc6 <_puts_r+0x9e>
 8001d68:	4622      	mov	r2, r4
 8001d6a:	210a      	movs	r1, #10
 8001d6c:	4628      	mov	r0, r5
 8001d6e:	f000 f8f5 	bl	8001f5c <__swbuf_r>
 8001d72:	3001      	adds	r0, #1
 8001d74:	d011      	beq.n	8001d9a <_puts_r+0x72>
 8001d76:	200a      	movs	r0, #10
 8001d78:	bd70      	pop	{r4, r5, r6, pc}
 8001d7a:	4b17      	ldr	r3, [pc, #92]	; (8001dd8 <_puts_r+0xb0>)
 8001d7c:	429c      	cmp	r4, r3
 8001d7e:	d101      	bne.n	8001d84 <_puts_r+0x5c>
 8001d80:	68ac      	ldr	r4, [r5, #8]
 8001d82:	e7e3      	b.n	8001d4c <_puts_r+0x24>
 8001d84:	4b15      	ldr	r3, [pc, #84]	; (8001ddc <_puts_r+0xb4>)
 8001d86:	429c      	cmp	r4, r3
 8001d88:	bf08      	it	eq
 8001d8a:	68ec      	ldreq	r4, [r5, #12]
 8001d8c:	e7de      	b.n	8001d4c <_puts_r+0x24>
 8001d8e:	4621      	mov	r1, r4
 8001d90:	4628      	mov	r0, r5
 8001d92:	f000 f935 	bl	8002000 <__swsetup_r>
 8001d96:	2800      	cmp	r0, #0
 8001d98:	d0dd      	beq.n	8001d56 <_puts_r+0x2e>
 8001d9a:	f04f 30ff 	mov.w	r0, #4294967295
 8001d9e:	bd70      	pop	{r4, r5, r6, pc}
 8001da0:	2b00      	cmp	r3, #0
 8001da2:	da04      	bge.n	8001dae <_puts_r+0x86>
 8001da4:	69a2      	ldr	r2, [r4, #24]
 8001da6:	4293      	cmp	r3, r2
 8001da8:	db06      	blt.n	8001db8 <_puts_r+0x90>
 8001daa:	290a      	cmp	r1, #10
 8001dac:	d004      	beq.n	8001db8 <_puts_r+0x90>
 8001dae:	6823      	ldr	r3, [r4, #0]
 8001db0:	1c5a      	adds	r2, r3, #1
 8001db2:	6022      	str	r2, [r4, #0]
 8001db4:	7019      	strb	r1, [r3, #0]
 8001db6:	e7cf      	b.n	8001d58 <_puts_r+0x30>
 8001db8:	4622      	mov	r2, r4
 8001dba:	4628      	mov	r0, r5
 8001dbc:	f000 f8ce 	bl	8001f5c <__swbuf_r>
 8001dc0:	3001      	adds	r0, #1
 8001dc2:	d1c9      	bne.n	8001d58 <_puts_r+0x30>
 8001dc4:	e7e9      	b.n	8001d9a <_puts_r+0x72>
 8001dc6:	200a      	movs	r0, #10
 8001dc8:	6823      	ldr	r3, [r4, #0]
 8001dca:	1c5a      	adds	r2, r3, #1
 8001dcc:	6022      	str	r2, [r4, #0]
 8001dce:	7018      	strb	r0, [r3, #0]
 8001dd0:	bd70      	pop	{r4, r5, r6, pc}
 8001dd2:	bf00      	nop
 8001dd4:	08002e88 	.word	0x08002e88
 8001dd8:	08002ea8 	.word	0x08002ea8
 8001ddc:	08002e68 	.word	0x08002e68

08001de0 <puts>:
 8001de0:	4b02      	ldr	r3, [pc, #8]	; (8001dec <puts+0xc>)
 8001de2:	4601      	mov	r1, r0
 8001de4:	6818      	ldr	r0, [r3, #0]
 8001de6:	f7ff bf9f 	b.w	8001d28 <_puts_r>
 8001dea:	bf00      	nop
 8001dec:	20000010 	.word	0x20000010

08001df0 <setbuf>:
 8001df0:	2900      	cmp	r1, #0
 8001df2:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8001df6:	bf0c      	ite	eq
 8001df8:	2202      	moveq	r2, #2
 8001dfa:	2200      	movne	r2, #0
 8001dfc:	f000 b800 	b.w	8001e00 <setvbuf>

08001e00 <setvbuf>:
 8001e00:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 8001e04:	461d      	mov	r5, r3
 8001e06:	4b51      	ldr	r3, [pc, #324]	; (8001f4c <setvbuf+0x14c>)
 8001e08:	4604      	mov	r4, r0
 8001e0a:	681e      	ldr	r6, [r3, #0]
 8001e0c:	460f      	mov	r7, r1
 8001e0e:	4690      	mov	r8, r2
 8001e10:	b126      	cbz	r6, 8001e1c <setvbuf+0x1c>
 8001e12:	69b3      	ldr	r3, [r6, #24]
 8001e14:	b913      	cbnz	r3, 8001e1c <setvbuf+0x1c>
 8001e16:	4630      	mov	r0, r6
 8001e18:	f000 fa52 	bl	80022c0 <__sinit>
 8001e1c:	4b4c      	ldr	r3, [pc, #304]	; (8001f50 <setvbuf+0x150>)
 8001e1e:	429c      	cmp	r4, r3
 8001e20:	d152      	bne.n	8001ec8 <setvbuf+0xc8>
 8001e22:	6874      	ldr	r4, [r6, #4]
 8001e24:	f1b8 0f02 	cmp.w	r8, #2
 8001e28:	d006      	beq.n	8001e38 <setvbuf+0x38>
 8001e2a:	f1b8 0f01 	cmp.w	r8, #1
 8001e2e:	f200 8089 	bhi.w	8001f44 <setvbuf+0x144>
 8001e32:	2d00      	cmp	r5, #0
 8001e34:	f2c0 8086 	blt.w	8001f44 <setvbuf+0x144>
 8001e38:	4621      	mov	r1, r4
 8001e3a:	4630      	mov	r0, r6
 8001e3c:	f000 f9d6 	bl	80021ec <_fflush_r>
 8001e40:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8001e42:	b141      	cbz	r1, 8001e56 <setvbuf+0x56>
 8001e44:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8001e48:	4299      	cmp	r1, r3
 8001e4a:	d002      	beq.n	8001e52 <setvbuf+0x52>
 8001e4c:	4630      	mov	r0, r6
 8001e4e:	f000 fb2d 	bl	80024ac <_free_r>
 8001e52:	2300      	movs	r3, #0
 8001e54:	6363      	str	r3, [r4, #52]	; 0x34
 8001e56:	2300      	movs	r3, #0
 8001e58:	61a3      	str	r3, [r4, #24]
 8001e5a:	6063      	str	r3, [r4, #4]
 8001e5c:	89a3      	ldrh	r3, [r4, #12]
 8001e5e:	061b      	lsls	r3, r3, #24
 8001e60:	d503      	bpl.n	8001e6a <setvbuf+0x6a>
 8001e62:	6921      	ldr	r1, [r4, #16]
 8001e64:	4630      	mov	r0, r6
 8001e66:	f000 fb21 	bl	80024ac <_free_r>
 8001e6a:	89a3      	ldrh	r3, [r4, #12]
 8001e6c:	f1b8 0f02 	cmp.w	r8, #2
 8001e70:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 8001e74:	f023 0303 	bic.w	r3, r3, #3
 8001e78:	81a3      	strh	r3, [r4, #12]
 8001e7a:	d05d      	beq.n	8001f38 <setvbuf+0x138>
 8001e7c:	ab01      	add	r3, sp, #4
 8001e7e:	466a      	mov	r2, sp
 8001e80:	4621      	mov	r1, r4
 8001e82:	4630      	mov	r0, r6
 8001e84:	f000 faa6 	bl	80023d4 <__swhatbuf_r>
 8001e88:	89a3      	ldrh	r3, [r4, #12]
 8001e8a:	4318      	orrs	r0, r3
 8001e8c:	81a0      	strh	r0, [r4, #12]
 8001e8e:	bb2d      	cbnz	r5, 8001edc <setvbuf+0xdc>
 8001e90:	9d00      	ldr	r5, [sp, #0]
 8001e92:	4628      	mov	r0, r5
 8001e94:	f000 fb02 	bl	800249c <malloc>
 8001e98:	4607      	mov	r7, r0
 8001e9a:	2800      	cmp	r0, #0
 8001e9c:	d14e      	bne.n	8001f3c <setvbuf+0x13c>
 8001e9e:	f8dd 9000 	ldr.w	r9, [sp]
 8001ea2:	45a9      	cmp	r9, r5
 8001ea4:	d13c      	bne.n	8001f20 <setvbuf+0x120>
 8001ea6:	f04f 30ff 	mov.w	r0, #4294967295
 8001eaa:	89a3      	ldrh	r3, [r4, #12]
 8001eac:	f043 0302 	orr.w	r3, r3, #2
 8001eb0:	81a3      	strh	r3, [r4, #12]
 8001eb2:	2300      	movs	r3, #0
 8001eb4:	60a3      	str	r3, [r4, #8]
 8001eb6:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8001eba:	6023      	str	r3, [r4, #0]
 8001ebc:	6123      	str	r3, [r4, #16]
 8001ebe:	2301      	movs	r3, #1
 8001ec0:	6163      	str	r3, [r4, #20]
 8001ec2:	b003      	add	sp, #12
 8001ec4:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8001ec8:	4b22      	ldr	r3, [pc, #136]	; (8001f54 <setvbuf+0x154>)
 8001eca:	429c      	cmp	r4, r3
 8001ecc:	d101      	bne.n	8001ed2 <setvbuf+0xd2>
 8001ece:	68b4      	ldr	r4, [r6, #8]
 8001ed0:	e7a8      	b.n	8001e24 <setvbuf+0x24>
 8001ed2:	4b21      	ldr	r3, [pc, #132]	; (8001f58 <setvbuf+0x158>)
 8001ed4:	429c      	cmp	r4, r3
 8001ed6:	bf08      	it	eq
 8001ed8:	68f4      	ldreq	r4, [r6, #12]
 8001eda:	e7a3      	b.n	8001e24 <setvbuf+0x24>
 8001edc:	2f00      	cmp	r7, #0
 8001ede:	d0d8      	beq.n	8001e92 <setvbuf+0x92>
 8001ee0:	69b3      	ldr	r3, [r6, #24]
 8001ee2:	b913      	cbnz	r3, 8001eea <setvbuf+0xea>
 8001ee4:	4630      	mov	r0, r6
 8001ee6:	f000 f9eb 	bl	80022c0 <__sinit>
 8001eea:	f1b8 0f01 	cmp.w	r8, #1
 8001eee:	bf08      	it	eq
 8001ef0:	89a3      	ldrheq	r3, [r4, #12]
 8001ef2:	6027      	str	r7, [r4, #0]
 8001ef4:	bf04      	itt	eq
 8001ef6:	f043 0301 	orreq.w	r3, r3, #1
 8001efa:	81a3      	strheq	r3, [r4, #12]
 8001efc:	89a3      	ldrh	r3, [r4, #12]
 8001efe:	6127      	str	r7, [r4, #16]
 8001f00:	f013 0008 	ands.w	r0, r3, #8
 8001f04:	6165      	str	r5, [r4, #20]
 8001f06:	d01b      	beq.n	8001f40 <setvbuf+0x140>
 8001f08:	f013 0001 	ands.w	r0, r3, #1
 8001f0c:	f04f 0300 	mov.w	r3, #0
 8001f10:	bf1f      	itttt	ne
 8001f12:	426d      	negne	r5, r5
 8001f14:	60a3      	strne	r3, [r4, #8]
 8001f16:	61a5      	strne	r5, [r4, #24]
 8001f18:	4618      	movne	r0, r3
 8001f1a:	bf08      	it	eq
 8001f1c:	60a5      	streq	r5, [r4, #8]
 8001f1e:	e7d0      	b.n	8001ec2 <setvbuf+0xc2>
 8001f20:	4648      	mov	r0, r9
 8001f22:	f000 fabb 	bl	800249c <malloc>
 8001f26:	4607      	mov	r7, r0
 8001f28:	2800      	cmp	r0, #0
 8001f2a:	d0bc      	beq.n	8001ea6 <setvbuf+0xa6>
 8001f2c:	89a3      	ldrh	r3, [r4, #12]
 8001f2e:	464d      	mov	r5, r9
 8001f30:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8001f34:	81a3      	strh	r3, [r4, #12]
 8001f36:	e7d3      	b.n	8001ee0 <setvbuf+0xe0>
 8001f38:	2000      	movs	r0, #0
 8001f3a:	e7b6      	b.n	8001eaa <setvbuf+0xaa>
 8001f3c:	46a9      	mov	r9, r5
 8001f3e:	e7f5      	b.n	8001f2c <setvbuf+0x12c>
 8001f40:	60a0      	str	r0, [r4, #8]
 8001f42:	e7be      	b.n	8001ec2 <setvbuf+0xc2>
 8001f44:	f04f 30ff 	mov.w	r0, #4294967295
 8001f48:	e7bb      	b.n	8001ec2 <setvbuf+0xc2>
 8001f4a:	bf00      	nop
 8001f4c:	20000010 	.word	0x20000010
 8001f50:	08002e88 	.word	0x08002e88
 8001f54:	08002ea8 	.word	0x08002ea8
 8001f58:	08002e68 	.word	0x08002e68

08001f5c <__swbuf_r>:
 8001f5c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8001f5e:	460e      	mov	r6, r1
 8001f60:	4614      	mov	r4, r2
 8001f62:	4605      	mov	r5, r0
 8001f64:	b118      	cbz	r0, 8001f6e <__swbuf_r+0x12>
 8001f66:	6983      	ldr	r3, [r0, #24]
 8001f68:	b90b      	cbnz	r3, 8001f6e <__swbuf_r+0x12>
 8001f6a:	f000 f9a9 	bl	80022c0 <__sinit>
 8001f6e:	4b21      	ldr	r3, [pc, #132]	; (8001ff4 <__swbuf_r+0x98>)
 8001f70:	429c      	cmp	r4, r3
 8001f72:	d12a      	bne.n	8001fca <__swbuf_r+0x6e>
 8001f74:	686c      	ldr	r4, [r5, #4]
 8001f76:	69a3      	ldr	r3, [r4, #24]
 8001f78:	60a3      	str	r3, [r4, #8]
 8001f7a:	89a3      	ldrh	r3, [r4, #12]
 8001f7c:	071a      	lsls	r2, r3, #28
 8001f7e:	d52e      	bpl.n	8001fde <__swbuf_r+0x82>
 8001f80:	6923      	ldr	r3, [r4, #16]
 8001f82:	b363      	cbz	r3, 8001fde <__swbuf_r+0x82>
 8001f84:	6923      	ldr	r3, [r4, #16]
 8001f86:	6820      	ldr	r0, [r4, #0]
 8001f88:	b2f6      	uxtb	r6, r6
 8001f8a:	1ac0      	subs	r0, r0, r3
 8001f8c:	6963      	ldr	r3, [r4, #20]
 8001f8e:	4637      	mov	r7, r6
 8001f90:	4298      	cmp	r0, r3
 8001f92:	db04      	blt.n	8001f9e <__swbuf_r+0x42>
 8001f94:	4621      	mov	r1, r4
 8001f96:	4628      	mov	r0, r5
 8001f98:	f000 f928 	bl	80021ec <_fflush_r>
 8001f9c:	bb28      	cbnz	r0, 8001fea <__swbuf_r+0x8e>
 8001f9e:	68a3      	ldr	r3, [r4, #8]
 8001fa0:	3001      	adds	r0, #1
 8001fa2:	3b01      	subs	r3, #1
 8001fa4:	60a3      	str	r3, [r4, #8]
 8001fa6:	6823      	ldr	r3, [r4, #0]
 8001fa8:	1c5a      	adds	r2, r3, #1
 8001faa:	6022      	str	r2, [r4, #0]
 8001fac:	701e      	strb	r6, [r3, #0]
 8001fae:	6963      	ldr	r3, [r4, #20]
 8001fb0:	4298      	cmp	r0, r3
 8001fb2:	d004      	beq.n	8001fbe <__swbuf_r+0x62>
 8001fb4:	89a3      	ldrh	r3, [r4, #12]
 8001fb6:	07db      	lsls	r3, r3, #31
 8001fb8:	d519      	bpl.n	8001fee <__swbuf_r+0x92>
 8001fba:	2e0a      	cmp	r6, #10
 8001fbc:	d117      	bne.n	8001fee <__swbuf_r+0x92>
 8001fbe:	4621      	mov	r1, r4
 8001fc0:	4628      	mov	r0, r5
 8001fc2:	f000 f913 	bl	80021ec <_fflush_r>
 8001fc6:	b190      	cbz	r0, 8001fee <__swbuf_r+0x92>
 8001fc8:	e00f      	b.n	8001fea <__swbuf_r+0x8e>
 8001fca:	4b0b      	ldr	r3, [pc, #44]	; (8001ff8 <__swbuf_r+0x9c>)
 8001fcc:	429c      	cmp	r4, r3
 8001fce:	d101      	bne.n	8001fd4 <__swbuf_r+0x78>
 8001fd0:	68ac      	ldr	r4, [r5, #8]
 8001fd2:	e7d0      	b.n	8001f76 <__swbuf_r+0x1a>
 8001fd4:	4b09      	ldr	r3, [pc, #36]	; (8001ffc <__swbuf_r+0xa0>)
 8001fd6:	429c      	cmp	r4, r3
 8001fd8:	bf08      	it	eq
 8001fda:	68ec      	ldreq	r4, [r5, #12]
 8001fdc:	e7cb      	b.n	8001f76 <__swbuf_r+0x1a>
 8001fde:	4621      	mov	r1, r4
 8001fe0:	4628      	mov	r0, r5
 8001fe2:	f000 f80d 	bl	8002000 <__swsetup_r>
 8001fe6:	2800      	cmp	r0, #0
 8001fe8:	d0cc      	beq.n	8001f84 <__swbuf_r+0x28>
 8001fea:	f04f 37ff 	mov.w	r7, #4294967295
 8001fee:	4638      	mov	r0, r7
 8001ff0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8001ff2:	bf00      	nop
 8001ff4:	08002e88 	.word	0x08002e88
 8001ff8:	08002ea8 	.word	0x08002ea8
 8001ffc:	08002e68 	.word	0x08002e68

08002000 <__swsetup_r>:
 8002000:	4b32      	ldr	r3, [pc, #200]	; (80020cc <__swsetup_r+0xcc>)
 8002002:	b570      	push	{r4, r5, r6, lr}
 8002004:	681d      	ldr	r5, [r3, #0]
 8002006:	4606      	mov	r6, r0
 8002008:	460c      	mov	r4, r1
 800200a:	b125      	cbz	r5, 8002016 <__swsetup_r+0x16>
 800200c:	69ab      	ldr	r3, [r5, #24]
 800200e:	b913      	cbnz	r3, 8002016 <__swsetup_r+0x16>
 8002010:	4628      	mov	r0, r5
 8002012:	f000 f955 	bl	80022c0 <__sinit>
 8002016:	4b2e      	ldr	r3, [pc, #184]	; (80020d0 <__swsetup_r+0xd0>)
 8002018:	429c      	cmp	r4, r3
 800201a:	d10f      	bne.n	800203c <__swsetup_r+0x3c>
 800201c:	686c      	ldr	r4, [r5, #4]
 800201e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002022:	b29a      	uxth	r2, r3
 8002024:	0715      	lsls	r5, r2, #28
 8002026:	d42c      	bmi.n	8002082 <__swsetup_r+0x82>
 8002028:	06d0      	lsls	r0, r2, #27
 800202a:	d411      	bmi.n	8002050 <__swsetup_r+0x50>
 800202c:	2209      	movs	r2, #9
 800202e:	6032      	str	r2, [r6, #0]
 8002030:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8002034:	81a3      	strh	r3, [r4, #12]
 8002036:	f04f 30ff 	mov.w	r0, #4294967295
 800203a:	bd70      	pop	{r4, r5, r6, pc}
 800203c:	4b25      	ldr	r3, [pc, #148]	; (80020d4 <__swsetup_r+0xd4>)
 800203e:	429c      	cmp	r4, r3
 8002040:	d101      	bne.n	8002046 <__swsetup_r+0x46>
 8002042:	68ac      	ldr	r4, [r5, #8]
 8002044:	e7eb      	b.n	800201e <__swsetup_r+0x1e>
 8002046:	4b24      	ldr	r3, [pc, #144]	; (80020d8 <__swsetup_r+0xd8>)
 8002048:	429c      	cmp	r4, r3
 800204a:	bf08      	it	eq
 800204c:	68ec      	ldreq	r4, [r5, #12]
 800204e:	e7e6      	b.n	800201e <__swsetup_r+0x1e>
 8002050:	0751      	lsls	r1, r2, #29
 8002052:	d512      	bpl.n	800207a <__swsetup_r+0x7a>
 8002054:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8002056:	b141      	cbz	r1, 800206a <__swsetup_r+0x6a>
 8002058:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800205c:	4299      	cmp	r1, r3
 800205e:	d002      	beq.n	8002066 <__swsetup_r+0x66>
 8002060:	4630      	mov	r0, r6
 8002062:	f000 fa23 	bl	80024ac <_free_r>
 8002066:	2300      	movs	r3, #0
 8002068:	6363      	str	r3, [r4, #52]	; 0x34
 800206a:	89a3      	ldrh	r3, [r4, #12]
 800206c:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 8002070:	81a3      	strh	r3, [r4, #12]
 8002072:	2300      	movs	r3, #0
 8002074:	6063      	str	r3, [r4, #4]
 8002076:	6923      	ldr	r3, [r4, #16]
 8002078:	6023      	str	r3, [r4, #0]
 800207a:	89a3      	ldrh	r3, [r4, #12]
 800207c:	f043 0308 	orr.w	r3, r3, #8
 8002080:	81a3      	strh	r3, [r4, #12]
 8002082:	6923      	ldr	r3, [r4, #16]
 8002084:	b94b      	cbnz	r3, 800209a <__swsetup_r+0x9a>
 8002086:	89a3      	ldrh	r3, [r4, #12]
 8002088:	f403 7320 	and.w	r3, r3, #640	; 0x280
 800208c:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 8002090:	d003      	beq.n	800209a <__swsetup_r+0x9a>
 8002092:	4621      	mov	r1, r4
 8002094:	4630      	mov	r0, r6
 8002096:	f000 f9c1 	bl	800241c <__smakebuf_r>
 800209a:	89a2      	ldrh	r2, [r4, #12]
 800209c:	f012 0301 	ands.w	r3, r2, #1
 80020a0:	d00c      	beq.n	80020bc <__swsetup_r+0xbc>
 80020a2:	2300      	movs	r3, #0
 80020a4:	60a3      	str	r3, [r4, #8]
 80020a6:	6963      	ldr	r3, [r4, #20]
 80020a8:	425b      	negs	r3, r3
 80020aa:	61a3      	str	r3, [r4, #24]
 80020ac:	6923      	ldr	r3, [r4, #16]
 80020ae:	b953      	cbnz	r3, 80020c6 <__swsetup_r+0xc6>
 80020b0:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80020b4:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 80020b8:	d1ba      	bne.n	8002030 <__swsetup_r+0x30>
 80020ba:	bd70      	pop	{r4, r5, r6, pc}
 80020bc:	0792      	lsls	r2, r2, #30
 80020be:	bf58      	it	pl
 80020c0:	6963      	ldrpl	r3, [r4, #20]
 80020c2:	60a3      	str	r3, [r4, #8]
 80020c4:	e7f2      	b.n	80020ac <__swsetup_r+0xac>
 80020c6:	2000      	movs	r0, #0
 80020c8:	e7f7      	b.n	80020ba <__swsetup_r+0xba>
 80020ca:	bf00      	nop
 80020cc:	20000010 	.word	0x20000010
 80020d0:	08002e88 	.word	0x08002e88
 80020d4:	08002ea8 	.word	0x08002ea8
 80020d8:	08002e68 	.word	0x08002e68

080020dc <__sflush_r>:
 80020dc:	898a      	ldrh	r2, [r1, #12]
 80020de:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 80020e2:	4605      	mov	r5, r0
 80020e4:	0710      	lsls	r0, r2, #28
 80020e6:	460c      	mov	r4, r1
 80020e8:	d45a      	bmi.n	80021a0 <__sflush_r+0xc4>
 80020ea:	684b      	ldr	r3, [r1, #4]
 80020ec:	2b00      	cmp	r3, #0
 80020ee:	dc05      	bgt.n	80020fc <__sflush_r+0x20>
 80020f0:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 80020f2:	2b00      	cmp	r3, #0
 80020f4:	dc02      	bgt.n	80020fc <__sflush_r+0x20>
 80020f6:	2000      	movs	r0, #0
 80020f8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80020fc:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 80020fe:	2e00      	cmp	r6, #0
 8002100:	d0f9      	beq.n	80020f6 <__sflush_r+0x1a>
 8002102:	2300      	movs	r3, #0
 8002104:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 8002108:	682f      	ldr	r7, [r5, #0]
 800210a:	602b      	str	r3, [r5, #0]
 800210c:	d033      	beq.n	8002176 <__sflush_r+0x9a>
 800210e:	6d60      	ldr	r0, [r4, #84]	; 0x54
 8002110:	89a3      	ldrh	r3, [r4, #12]
 8002112:	075a      	lsls	r2, r3, #29
 8002114:	d505      	bpl.n	8002122 <__sflush_r+0x46>
 8002116:	6863      	ldr	r3, [r4, #4]
 8002118:	1ac0      	subs	r0, r0, r3
 800211a:	6b63      	ldr	r3, [r4, #52]	; 0x34
 800211c:	b10b      	cbz	r3, 8002122 <__sflush_r+0x46>
 800211e:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8002120:	1ac0      	subs	r0, r0, r3
 8002122:	2300      	movs	r3, #0
 8002124:	4602      	mov	r2, r0
 8002126:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8002128:	6a21      	ldr	r1, [r4, #32]
 800212a:	4628      	mov	r0, r5
 800212c:	47b0      	blx	r6
 800212e:	1c43      	adds	r3, r0, #1
 8002130:	89a3      	ldrh	r3, [r4, #12]
 8002132:	d106      	bne.n	8002142 <__sflush_r+0x66>
 8002134:	6829      	ldr	r1, [r5, #0]
 8002136:	291d      	cmp	r1, #29
 8002138:	d84b      	bhi.n	80021d2 <__sflush_r+0xf6>
 800213a:	4a2b      	ldr	r2, [pc, #172]	; (80021e8 <__sflush_r+0x10c>)
 800213c:	40ca      	lsrs	r2, r1
 800213e:	07d6      	lsls	r6, r2, #31
 8002140:	d547      	bpl.n	80021d2 <__sflush_r+0xf6>
 8002142:	2200      	movs	r2, #0
 8002144:	6062      	str	r2, [r4, #4]
 8002146:	6922      	ldr	r2, [r4, #16]
 8002148:	04d9      	lsls	r1, r3, #19
 800214a:	6022      	str	r2, [r4, #0]
 800214c:	d504      	bpl.n	8002158 <__sflush_r+0x7c>
 800214e:	1c42      	adds	r2, r0, #1
 8002150:	d101      	bne.n	8002156 <__sflush_r+0x7a>
 8002152:	682b      	ldr	r3, [r5, #0]
 8002154:	b903      	cbnz	r3, 8002158 <__sflush_r+0x7c>
 8002156:	6560      	str	r0, [r4, #84]	; 0x54
 8002158:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800215a:	602f      	str	r7, [r5, #0]
 800215c:	2900      	cmp	r1, #0
 800215e:	d0ca      	beq.n	80020f6 <__sflush_r+0x1a>
 8002160:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8002164:	4299      	cmp	r1, r3
 8002166:	d002      	beq.n	800216e <__sflush_r+0x92>
 8002168:	4628      	mov	r0, r5
 800216a:	f000 f99f 	bl	80024ac <_free_r>
 800216e:	2000      	movs	r0, #0
 8002170:	6360      	str	r0, [r4, #52]	; 0x34
 8002172:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8002176:	6a21      	ldr	r1, [r4, #32]
 8002178:	2301      	movs	r3, #1
 800217a:	4628      	mov	r0, r5
 800217c:	47b0      	blx	r6
 800217e:	1c41      	adds	r1, r0, #1
 8002180:	d1c6      	bne.n	8002110 <__sflush_r+0x34>
 8002182:	682b      	ldr	r3, [r5, #0]
 8002184:	2b00      	cmp	r3, #0
 8002186:	d0c3      	beq.n	8002110 <__sflush_r+0x34>
 8002188:	2b1d      	cmp	r3, #29
 800218a:	d001      	beq.n	8002190 <__sflush_r+0xb4>
 800218c:	2b16      	cmp	r3, #22
 800218e:	d101      	bne.n	8002194 <__sflush_r+0xb8>
 8002190:	602f      	str	r7, [r5, #0]
 8002192:	e7b0      	b.n	80020f6 <__sflush_r+0x1a>
 8002194:	89a3      	ldrh	r3, [r4, #12]
 8002196:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800219a:	81a3      	strh	r3, [r4, #12]
 800219c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80021a0:	690f      	ldr	r7, [r1, #16]
 80021a2:	2f00      	cmp	r7, #0
 80021a4:	d0a7      	beq.n	80020f6 <__sflush_r+0x1a>
 80021a6:	0793      	lsls	r3, r2, #30
 80021a8:	bf18      	it	ne
 80021aa:	2300      	movne	r3, #0
 80021ac:	680e      	ldr	r6, [r1, #0]
 80021ae:	bf08      	it	eq
 80021b0:	694b      	ldreq	r3, [r1, #20]
 80021b2:	eba6 0807 	sub.w	r8, r6, r7
 80021b6:	600f      	str	r7, [r1, #0]
 80021b8:	608b      	str	r3, [r1, #8]
 80021ba:	f1b8 0f00 	cmp.w	r8, #0
 80021be:	dd9a      	ble.n	80020f6 <__sflush_r+0x1a>
 80021c0:	4643      	mov	r3, r8
 80021c2:	463a      	mov	r2, r7
 80021c4:	6a21      	ldr	r1, [r4, #32]
 80021c6:	4628      	mov	r0, r5
 80021c8:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 80021ca:	47b0      	blx	r6
 80021cc:	2800      	cmp	r0, #0
 80021ce:	dc07      	bgt.n	80021e0 <__sflush_r+0x104>
 80021d0:	89a3      	ldrh	r3, [r4, #12]
 80021d2:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 80021d6:	81a3      	strh	r3, [r4, #12]
 80021d8:	f04f 30ff 	mov.w	r0, #4294967295
 80021dc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80021e0:	4407      	add	r7, r0
 80021e2:	eba8 0800 	sub.w	r8, r8, r0
 80021e6:	e7e8      	b.n	80021ba <__sflush_r+0xde>
 80021e8:	20400001 	.word	0x20400001

080021ec <_fflush_r>:
 80021ec:	b538      	push	{r3, r4, r5, lr}
 80021ee:	690b      	ldr	r3, [r1, #16]
 80021f0:	4605      	mov	r5, r0
 80021f2:	460c      	mov	r4, r1
 80021f4:	b1db      	cbz	r3, 800222e <_fflush_r+0x42>
 80021f6:	b118      	cbz	r0, 8002200 <_fflush_r+0x14>
 80021f8:	6983      	ldr	r3, [r0, #24]
 80021fa:	b90b      	cbnz	r3, 8002200 <_fflush_r+0x14>
 80021fc:	f000 f860 	bl	80022c0 <__sinit>
 8002200:	4b0c      	ldr	r3, [pc, #48]	; (8002234 <_fflush_r+0x48>)
 8002202:	429c      	cmp	r4, r3
 8002204:	d109      	bne.n	800221a <_fflush_r+0x2e>
 8002206:	686c      	ldr	r4, [r5, #4]
 8002208:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800220c:	b17b      	cbz	r3, 800222e <_fflush_r+0x42>
 800220e:	4621      	mov	r1, r4
 8002210:	4628      	mov	r0, r5
 8002212:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 8002216:	f7ff bf61 	b.w	80020dc <__sflush_r>
 800221a:	4b07      	ldr	r3, [pc, #28]	; (8002238 <_fflush_r+0x4c>)
 800221c:	429c      	cmp	r4, r3
 800221e:	d101      	bne.n	8002224 <_fflush_r+0x38>
 8002220:	68ac      	ldr	r4, [r5, #8]
 8002222:	e7f1      	b.n	8002208 <_fflush_r+0x1c>
 8002224:	4b05      	ldr	r3, [pc, #20]	; (800223c <_fflush_r+0x50>)
 8002226:	429c      	cmp	r4, r3
 8002228:	bf08      	it	eq
 800222a:	68ec      	ldreq	r4, [r5, #12]
 800222c:	e7ec      	b.n	8002208 <_fflush_r+0x1c>
 800222e:	2000      	movs	r0, #0
 8002230:	bd38      	pop	{r3, r4, r5, pc}
 8002232:	bf00      	nop
 8002234:	08002e88 	.word	0x08002e88
 8002238:	08002ea8 	.word	0x08002ea8
 800223c:	08002e68 	.word	0x08002e68

08002240 <_cleanup_r>:
 8002240:	4901      	ldr	r1, [pc, #4]	; (8002248 <_cleanup_r+0x8>)
 8002242:	f000 b8a9 	b.w	8002398 <_fwalk_reent>
 8002246:	bf00      	nop
 8002248:	080021ed 	.word	0x080021ed

0800224c <std.isra.0>:
 800224c:	2300      	movs	r3, #0
 800224e:	b510      	push	{r4, lr}
 8002250:	4604      	mov	r4, r0
 8002252:	6003      	str	r3, [r0, #0]
 8002254:	6043      	str	r3, [r0, #4]
 8002256:	6083      	str	r3, [r0, #8]
 8002258:	8181      	strh	r1, [r0, #12]
 800225a:	6643      	str	r3, [r0, #100]	; 0x64
 800225c:	81c2      	strh	r2, [r0, #14]
 800225e:	6103      	str	r3, [r0, #16]
 8002260:	6143      	str	r3, [r0, #20]
 8002262:	6183      	str	r3, [r0, #24]
 8002264:	4619      	mov	r1, r3
 8002266:	2208      	movs	r2, #8
 8002268:	305c      	adds	r0, #92	; 0x5c
 800226a:	f7ff fd3d 	bl	8001ce8 <memset>
 800226e:	4b05      	ldr	r3, [pc, #20]	; (8002284 <std.isra.0+0x38>)
 8002270:	6224      	str	r4, [r4, #32]
 8002272:	6263      	str	r3, [r4, #36]	; 0x24
 8002274:	4b04      	ldr	r3, [pc, #16]	; (8002288 <std.isra.0+0x3c>)
 8002276:	62a3      	str	r3, [r4, #40]	; 0x28
 8002278:	4b04      	ldr	r3, [pc, #16]	; (800228c <std.isra.0+0x40>)
 800227a:	62e3      	str	r3, [r4, #44]	; 0x2c
 800227c:	4b04      	ldr	r3, [pc, #16]	; (8002290 <std.isra.0+0x44>)
 800227e:	6323      	str	r3, [r4, #48]	; 0x30
 8002280:	bd10      	pop	{r4, pc}
 8002282:	bf00      	nop
 8002284:	08002bcd 	.word	0x08002bcd
 8002288:	08002bef 	.word	0x08002bef
 800228c:	08002c27 	.word	0x08002c27
 8002290:	08002c4b 	.word	0x08002c4b

08002294 <__sfmoreglue>:
 8002294:	b570      	push	{r4, r5, r6, lr}
 8002296:	2568      	movs	r5, #104	; 0x68
 8002298:	1e4a      	subs	r2, r1, #1
 800229a:	4355      	muls	r5, r2
 800229c:	460e      	mov	r6, r1
 800229e:	f105 0174 	add.w	r1, r5, #116	; 0x74
 80022a2:	f000 f94f 	bl	8002544 <_malloc_r>
 80022a6:	4604      	mov	r4, r0
 80022a8:	b140      	cbz	r0, 80022bc <__sfmoreglue+0x28>
 80022aa:	2100      	movs	r1, #0
 80022ac:	e880 0042 	stmia.w	r0, {r1, r6}
 80022b0:	300c      	adds	r0, #12
 80022b2:	60a0      	str	r0, [r4, #8]
 80022b4:	f105 0268 	add.w	r2, r5, #104	; 0x68
 80022b8:	f7ff fd16 	bl	8001ce8 <memset>
 80022bc:	4620      	mov	r0, r4
 80022be:	bd70      	pop	{r4, r5, r6, pc}

080022c0 <__sinit>:
 80022c0:	6983      	ldr	r3, [r0, #24]
 80022c2:	b510      	push	{r4, lr}
 80022c4:	4604      	mov	r4, r0
 80022c6:	bb33      	cbnz	r3, 8002316 <__sinit+0x56>
 80022c8:	6483      	str	r3, [r0, #72]	; 0x48
 80022ca:	64c3      	str	r3, [r0, #76]	; 0x4c
 80022cc:	6503      	str	r3, [r0, #80]	; 0x50
 80022ce:	4b12      	ldr	r3, [pc, #72]	; (8002318 <__sinit+0x58>)
 80022d0:	4a12      	ldr	r2, [pc, #72]	; (800231c <__sinit+0x5c>)
 80022d2:	681b      	ldr	r3, [r3, #0]
 80022d4:	6282      	str	r2, [r0, #40]	; 0x28
 80022d6:	4298      	cmp	r0, r3
 80022d8:	bf04      	itt	eq
 80022da:	2301      	moveq	r3, #1
 80022dc:	6183      	streq	r3, [r0, #24]
 80022de:	f000 f81f 	bl	8002320 <__sfp>
 80022e2:	6060      	str	r0, [r4, #4]
 80022e4:	4620      	mov	r0, r4
 80022e6:	f000 f81b 	bl	8002320 <__sfp>
 80022ea:	60a0      	str	r0, [r4, #8]
 80022ec:	4620      	mov	r0, r4
 80022ee:	f000 f817 	bl	8002320 <__sfp>
 80022f2:	2200      	movs	r2, #0
 80022f4:	60e0      	str	r0, [r4, #12]
 80022f6:	2104      	movs	r1, #4
 80022f8:	6860      	ldr	r0, [r4, #4]
 80022fa:	f7ff ffa7 	bl	800224c <std.isra.0>
 80022fe:	2201      	movs	r2, #1
 8002300:	2109      	movs	r1, #9
 8002302:	68a0      	ldr	r0, [r4, #8]
 8002304:	f7ff ffa2 	bl	800224c <std.isra.0>
 8002308:	2202      	movs	r2, #2
 800230a:	2112      	movs	r1, #18
 800230c:	68e0      	ldr	r0, [r4, #12]
 800230e:	f7ff ff9d 	bl	800224c <std.isra.0>
 8002312:	2301      	movs	r3, #1
 8002314:	61a3      	str	r3, [r4, #24]
 8002316:	bd10      	pop	{r4, pc}
 8002318:	08002e64 	.word	0x08002e64
 800231c:	08002241 	.word	0x08002241

08002320 <__sfp>:
 8002320:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002322:	4b1c      	ldr	r3, [pc, #112]	; (8002394 <__sfp+0x74>)
 8002324:	4607      	mov	r7, r0
 8002326:	681e      	ldr	r6, [r3, #0]
 8002328:	69b3      	ldr	r3, [r6, #24]
 800232a:	b913      	cbnz	r3, 8002332 <__sfp+0x12>
 800232c:	4630      	mov	r0, r6
 800232e:	f7ff ffc7 	bl	80022c0 <__sinit>
 8002332:	3648      	adds	r6, #72	; 0x48
 8002334:	68b4      	ldr	r4, [r6, #8]
 8002336:	6873      	ldr	r3, [r6, #4]
 8002338:	3b01      	subs	r3, #1
 800233a:	d503      	bpl.n	8002344 <__sfp+0x24>
 800233c:	6833      	ldr	r3, [r6, #0]
 800233e:	b133      	cbz	r3, 800234e <__sfp+0x2e>
 8002340:	6836      	ldr	r6, [r6, #0]
 8002342:	e7f7      	b.n	8002334 <__sfp+0x14>
 8002344:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 8002348:	b16d      	cbz	r5, 8002366 <__sfp+0x46>
 800234a:	3468      	adds	r4, #104	; 0x68
 800234c:	e7f4      	b.n	8002338 <__sfp+0x18>
 800234e:	2104      	movs	r1, #4
 8002350:	4638      	mov	r0, r7
 8002352:	f7ff ff9f 	bl	8002294 <__sfmoreglue>
 8002356:	6030      	str	r0, [r6, #0]
 8002358:	2800      	cmp	r0, #0
 800235a:	d1f1      	bne.n	8002340 <__sfp+0x20>
 800235c:	230c      	movs	r3, #12
 800235e:	4604      	mov	r4, r0
 8002360:	603b      	str	r3, [r7, #0]
 8002362:	4620      	mov	r0, r4
 8002364:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8002366:	f64f 73ff 	movw	r3, #65535	; 0xffff
 800236a:	81e3      	strh	r3, [r4, #14]
 800236c:	2301      	movs	r3, #1
 800236e:	6665      	str	r5, [r4, #100]	; 0x64
 8002370:	81a3      	strh	r3, [r4, #12]
 8002372:	6025      	str	r5, [r4, #0]
 8002374:	60a5      	str	r5, [r4, #8]
 8002376:	6065      	str	r5, [r4, #4]
 8002378:	6125      	str	r5, [r4, #16]
 800237a:	6165      	str	r5, [r4, #20]
 800237c:	61a5      	str	r5, [r4, #24]
 800237e:	2208      	movs	r2, #8
 8002380:	4629      	mov	r1, r5
 8002382:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 8002386:	f7ff fcaf 	bl	8001ce8 <memset>
 800238a:	6365      	str	r5, [r4, #52]	; 0x34
 800238c:	63a5      	str	r5, [r4, #56]	; 0x38
 800238e:	64a5      	str	r5, [r4, #72]	; 0x48
 8002390:	64e5      	str	r5, [r4, #76]	; 0x4c
 8002392:	e7e6      	b.n	8002362 <__sfp+0x42>
 8002394:	08002e64 	.word	0x08002e64

08002398 <_fwalk_reent>:
 8002398:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800239c:	4680      	mov	r8, r0
 800239e:	4689      	mov	r9, r1
 80023a0:	2600      	movs	r6, #0
 80023a2:	f100 0448 	add.w	r4, r0, #72	; 0x48
 80023a6:	b914      	cbnz	r4, 80023ae <_fwalk_reent+0x16>
 80023a8:	4630      	mov	r0, r6
 80023aa:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 80023ae:	68a5      	ldr	r5, [r4, #8]
 80023b0:	6867      	ldr	r7, [r4, #4]
 80023b2:	3f01      	subs	r7, #1
 80023b4:	d501      	bpl.n	80023ba <_fwalk_reent+0x22>
 80023b6:	6824      	ldr	r4, [r4, #0]
 80023b8:	e7f5      	b.n	80023a6 <_fwalk_reent+0xe>
 80023ba:	89ab      	ldrh	r3, [r5, #12]
 80023bc:	2b01      	cmp	r3, #1
 80023be:	d907      	bls.n	80023d0 <_fwalk_reent+0x38>
 80023c0:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 80023c4:	3301      	adds	r3, #1
 80023c6:	d003      	beq.n	80023d0 <_fwalk_reent+0x38>
 80023c8:	4629      	mov	r1, r5
 80023ca:	4640      	mov	r0, r8
 80023cc:	47c8      	blx	r9
 80023ce:	4306      	orrs	r6, r0
 80023d0:	3568      	adds	r5, #104	; 0x68
 80023d2:	e7ee      	b.n	80023b2 <_fwalk_reent+0x1a>

080023d4 <__swhatbuf_r>:
 80023d4:	b570      	push	{r4, r5, r6, lr}
 80023d6:	460e      	mov	r6, r1
 80023d8:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 80023dc:	b090      	sub	sp, #64	; 0x40
 80023de:	2900      	cmp	r1, #0
 80023e0:	4614      	mov	r4, r2
 80023e2:	461d      	mov	r5, r3
 80023e4:	da07      	bge.n	80023f6 <__swhatbuf_r+0x22>
 80023e6:	2300      	movs	r3, #0
 80023e8:	602b      	str	r3, [r5, #0]
 80023ea:	89b3      	ldrh	r3, [r6, #12]
 80023ec:	061a      	lsls	r2, r3, #24
 80023ee:	d410      	bmi.n	8002412 <__swhatbuf_r+0x3e>
 80023f0:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80023f4:	e00e      	b.n	8002414 <__swhatbuf_r+0x40>
 80023f6:	aa01      	add	r2, sp, #4
 80023f8:	f000 fc4e 	bl	8002c98 <_fstat_r>
 80023fc:	2800      	cmp	r0, #0
 80023fe:	dbf2      	blt.n	80023e6 <__swhatbuf_r+0x12>
 8002400:	9a02      	ldr	r2, [sp, #8]
 8002402:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 8002406:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 800240a:	425a      	negs	r2, r3
 800240c:	415a      	adcs	r2, r3
 800240e:	602a      	str	r2, [r5, #0]
 8002410:	e7ee      	b.n	80023f0 <__swhatbuf_r+0x1c>
 8002412:	2340      	movs	r3, #64	; 0x40
 8002414:	2000      	movs	r0, #0
 8002416:	6023      	str	r3, [r4, #0]
 8002418:	b010      	add	sp, #64	; 0x40
 800241a:	bd70      	pop	{r4, r5, r6, pc}

0800241c <__smakebuf_r>:
 800241c:	898b      	ldrh	r3, [r1, #12]
 800241e:	b573      	push	{r0, r1, r4, r5, r6, lr}
 8002420:	079d      	lsls	r5, r3, #30
 8002422:	4606      	mov	r6, r0
 8002424:	460c      	mov	r4, r1
 8002426:	d507      	bpl.n	8002438 <__smakebuf_r+0x1c>
 8002428:	f104 0347 	add.w	r3, r4, #71	; 0x47
 800242c:	6023      	str	r3, [r4, #0]
 800242e:	6123      	str	r3, [r4, #16]
 8002430:	2301      	movs	r3, #1
 8002432:	6163      	str	r3, [r4, #20]
 8002434:	b002      	add	sp, #8
 8002436:	bd70      	pop	{r4, r5, r6, pc}
 8002438:	ab01      	add	r3, sp, #4
 800243a:	466a      	mov	r2, sp
 800243c:	f7ff ffca 	bl	80023d4 <__swhatbuf_r>
 8002440:	9900      	ldr	r1, [sp, #0]
 8002442:	4605      	mov	r5, r0
 8002444:	4630      	mov	r0, r6
 8002446:	f000 f87d 	bl	8002544 <_malloc_r>
 800244a:	b948      	cbnz	r0, 8002460 <__smakebuf_r+0x44>
 800244c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002450:	059a      	lsls	r2, r3, #22
 8002452:	d4ef      	bmi.n	8002434 <__smakebuf_r+0x18>
 8002454:	f023 0303 	bic.w	r3, r3, #3
 8002458:	f043 0302 	orr.w	r3, r3, #2
 800245c:	81a3      	strh	r3, [r4, #12]
 800245e:	e7e3      	b.n	8002428 <__smakebuf_r+0xc>
 8002460:	4b0d      	ldr	r3, [pc, #52]	; (8002498 <__smakebuf_r+0x7c>)
 8002462:	62b3      	str	r3, [r6, #40]	; 0x28
 8002464:	89a3      	ldrh	r3, [r4, #12]
 8002466:	6020      	str	r0, [r4, #0]
 8002468:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800246c:	81a3      	strh	r3, [r4, #12]
 800246e:	9b00      	ldr	r3, [sp, #0]
 8002470:	6120      	str	r0, [r4, #16]
 8002472:	6163      	str	r3, [r4, #20]
 8002474:	9b01      	ldr	r3, [sp, #4]
 8002476:	b15b      	cbz	r3, 8002490 <__smakebuf_r+0x74>
 8002478:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800247c:	4630      	mov	r0, r6
 800247e:	f000 fc1d 	bl	8002cbc <_isatty_r>
 8002482:	b128      	cbz	r0, 8002490 <__smakebuf_r+0x74>
 8002484:	89a3      	ldrh	r3, [r4, #12]
 8002486:	f023 0303 	bic.w	r3, r3, #3
 800248a:	f043 0301 	orr.w	r3, r3, #1
 800248e:	81a3      	strh	r3, [r4, #12]
 8002490:	89a3      	ldrh	r3, [r4, #12]
 8002492:	431d      	orrs	r5, r3
 8002494:	81a5      	strh	r5, [r4, #12]
 8002496:	e7cd      	b.n	8002434 <__smakebuf_r+0x18>
 8002498:	08002241 	.word	0x08002241

0800249c <malloc>:
 800249c:	4b02      	ldr	r3, [pc, #8]	; (80024a8 <malloc+0xc>)
 800249e:	4601      	mov	r1, r0
 80024a0:	6818      	ldr	r0, [r3, #0]
 80024a2:	f000 b84f 	b.w	8002544 <_malloc_r>
 80024a6:	bf00      	nop
 80024a8:	20000010 	.word	0x20000010

080024ac <_free_r>:
 80024ac:	b538      	push	{r3, r4, r5, lr}
 80024ae:	4605      	mov	r5, r0
 80024b0:	2900      	cmp	r1, #0
 80024b2:	d043      	beq.n	800253c <_free_r+0x90>
 80024b4:	f851 3c04 	ldr.w	r3, [r1, #-4]
 80024b8:	1f0c      	subs	r4, r1, #4
 80024ba:	2b00      	cmp	r3, #0
 80024bc:	bfb8      	it	lt
 80024be:	18e4      	addlt	r4, r4, r3
 80024c0:	f000 fc2c 	bl	8002d1c <__malloc_lock>
 80024c4:	4a1e      	ldr	r2, [pc, #120]	; (8002540 <_free_r+0x94>)
 80024c6:	6813      	ldr	r3, [r2, #0]
 80024c8:	4610      	mov	r0, r2
 80024ca:	b933      	cbnz	r3, 80024da <_free_r+0x2e>
 80024cc:	6063      	str	r3, [r4, #4]
 80024ce:	6014      	str	r4, [r2, #0]
 80024d0:	4628      	mov	r0, r5
 80024d2:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 80024d6:	f000 bc22 	b.w	8002d1e <__malloc_unlock>
 80024da:	42a3      	cmp	r3, r4
 80024dc:	d90b      	bls.n	80024f6 <_free_r+0x4a>
 80024de:	6821      	ldr	r1, [r4, #0]
 80024e0:	1862      	adds	r2, r4, r1
 80024e2:	4293      	cmp	r3, r2
 80024e4:	bf01      	itttt	eq
 80024e6:	681a      	ldreq	r2, [r3, #0]
 80024e8:	685b      	ldreq	r3, [r3, #4]
 80024ea:	1852      	addeq	r2, r2, r1
 80024ec:	6022      	streq	r2, [r4, #0]
 80024ee:	6063      	str	r3, [r4, #4]
 80024f0:	6004      	str	r4, [r0, #0]
 80024f2:	e7ed      	b.n	80024d0 <_free_r+0x24>
 80024f4:	4613      	mov	r3, r2
 80024f6:	685a      	ldr	r2, [r3, #4]
 80024f8:	b10a      	cbz	r2, 80024fe <_free_r+0x52>
 80024fa:	42a2      	cmp	r2, r4
 80024fc:	d9fa      	bls.n	80024f4 <_free_r+0x48>
 80024fe:	6819      	ldr	r1, [r3, #0]
 8002500:	1858      	adds	r0, r3, r1
 8002502:	42a0      	cmp	r0, r4
 8002504:	d10b      	bne.n	800251e <_free_r+0x72>
 8002506:	6820      	ldr	r0, [r4, #0]
 8002508:	4401      	add	r1, r0
 800250a:	1858      	adds	r0, r3, r1
 800250c:	4282      	cmp	r2, r0
 800250e:	6019      	str	r1, [r3, #0]
 8002510:	d1de      	bne.n	80024d0 <_free_r+0x24>
 8002512:	6810      	ldr	r0, [r2, #0]
 8002514:	6852      	ldr	r2, [r2, #4]
 8002516:	4401      	add	r1, r0
 8002518:	6019      	str	r1, [r3, #0]
 800251a:	605a      	str	r2, [r3, #4]
 800251c:	e7d8      	b.n	80024d0 <_free_r+0x24>
 800251e:	d902      	bls.n	8002526 <_free_r+0x7a>
 8002520:	230c      	movs	r3, #12
 8002522:	602b      	str	r3, [r5, #0]
 8002524:	e7d4      	b.n	80024d0 <_free_r+0x24>
 8002526:	6820      	ldr	r0, [r4, #0]
 8002528:	1821      	adds	r1, r4, r0
 800252a:	428a      	cmp	r2, r1
 800252c:	bf01      	itttt	eq
 800252e:	6811      	ldreq	r1, [r2, #0]
 8002530:	6852      	ldreq	r2, [r2, #4]
 8002532:	1809      	addeq	r1, r1, r0
 8002534:	6021      	streq	r1, [r4, #0]
 8002536:	6062      	str	r2, [r4, #4]
 8002538:	605c      	str	r4, [r3, #4]
 800253a:	e7c9      	b.n	80024d0 <_free_r+0x24>
 800253c:	bd38      	pop	{r3, r4, r5, pc}
 800253e:	bf00      	nop
 8002540:	200000c4 	.word	0x200000c4

08002544 <_malloc_r>:
 8002544:	b570      	push	{r4, r5, r6, lr}
 8002546:	1ccd      	adds	r5, r1, #3
 8002548:	f025 0503 	bic.w	r5, r5, #3
 800254c:	3508      	adds	r5, #8
 800254e:	2d0c      	cmp	r5, #12
 8002550:	bf38      	it	cc
 8002552:	250c      	movcc	r5, #12
 8002554:	2d00      	cmp	r5, #0
 8002556:	4606      	mov	r6, r0
 8002558:	db01      	blt.n	800255e <_malloc_r+0x1a>
 800255a:	42a9      	cmp	r1, r5
 800255c:	d903      	bls.n	8002566 <_malloc_r+0x22>
 800255e:	230c      	movs	r3, #12
 8002560:	6033      	str	r3, [r6, #0]
 8002562:	2000      	movs	r0, #0
 8002564:	bd70      	pop	{r4, r5, r6, pc}
 8002566:	f000 fbd9 	bl	8002d1c <__malloc_lock>
 800256a:	4a23      	ldr	r2, [pc, #140]	; (80025f8 <_malloc_r+0xb4>)
 800256c:	6814      	ldr	r4, [r2, #0]
 800256e:	4621      	mov	r1, r4
 8002570:	b991      	cbnz	r1, 8002598 <_malloc_r+0x54>
 8002572:	4c22      	ldr	r4, [pc, #136]	; (80025fc <_malloc_r+0xb8>)
 8002574:	6823      	ldr	r3, [r4, #0]
 8002576:	b91b      	cbnz	r3, 8002580 <_malloc_r+0x3c>
 8002578:	4630      	mov	r0, r6
 800257a:	f000 fb17 	bl	8002bac <_sbrk_r>
 800257e:	6020      	str	r0, [r4, #0]
 8002580:	4629      	mov	r1, r5
 8002582:	4630      	mov	r0, r6
 8002584:	f000 fb12 	bl	8002bac <_sbrk_r>
 8002588:	1c43      	adds	r3, r0, #1
 800258a:	d126      	bne.n	80025da <_malloc_r+0x96>
 800258c:	230c      	movs	r3, #12
 800258e:	4630      	mov	r0, r6
 8002590:	6033      	str	r3, [r6, #0]
 8002592:	f000 fbc4 	bl	8002d1e <__malloc_unlock>
 8002596:	e7e4      	b.n	8002562 <_malloc_r+0x1e>
 8002598:	680b      	ldr	r3, [r1, #0]
 800259a:	1b5b      	subs	r3, r3, r5
 800259c:	d41a      	bmi.n	80025d4 <_malloc_r+0x90>
 800259e:	2b0b      	cmp	r3, #11
 80025a0:	d90f      	bls.n	80025c2 <_malloc_r+0x7e>
 80025a2:	600b      	str	r3, [r1, #0]
 80025a4:	18cc      	adds	r4, r1, r3
 80025a6:	50cd      	str	r5, [r1, r3]
 80025a8:	4630      	mov	r0, r6
 80025aa:	f000 fbb8 	bl	8002d1e <__malloc_unlock>
 80025ae:	f104 000b 	add.w	r0, r4, #11
 80025b2:	1d23      	adds	r3, r4, #4
 80025b4:	f020 0007 	bic.w	r0, r0, #7
 80025b8:	1ac3      	subs	r3, r0, r3
 80025ba:	d01b      	beq.n	80025f4 <_malloc_r+0xb0>
 80025bc:	425a      	negs	r2, r3
 80025be:	50e2      	str	r2, [r4, r3]
 80025c0:	bd70      	pop	{r4, r5, r6, pc}
 80025c2:	428c      	cmp	r4, r1
 80025c4:	bf0b      	itete	eq
 80025c6:	6863      	ldreq	r3, [r4, #4]
 80025c8:	684b      	ldrne	r3, [r1, #4]
 80025ca:	6013      	streq	r3, [r2, #0]
 80025cc:	6063      	strne	r3, [r4, #4]
 80025ce:	bf18      	it	ne
 80025d0:	460c      	movne	r4, r1
 80025d2:	e7e9      	b.n	80025a8 <_malloc_r+0x64>
 80025d4:	460c      	mov	r4, r1
 80025d6:	6849      	ldr	r1, [r1, #4]
 80025d8:	e7ca      	b.n	8002570 <_malloc_r+0x2c>
 80025da:	1cc4      	adds	r4, r0, #3
 80025dc:	f024 0403 	bic.w	r4, r4, #3
 80025e0:	42a0      	cmp	r0, r4
 80025e2:	d005      	beq.n	80025f0 <_malloc_r+0xac>
 80025e4:	1a21      	subs	r1, r4, r0
 80025e6:	4630      	mov	r0, r6
 80025e8:	f000 fae0 	bl	8002bac <_sbrk_r>
 80025ec:	3001      	adds	r0, #1
 80025ee:	d0cd      	beq.n	800258c <_malloc_r+0x48>
 80025f0:	6025      	str	r5, [r4, #0]
 80025f2:	e7d9      	b.n	80025a8 <_malloc_r+0x64>
 80025f4:	bd70      	pop	{r4, r5, r6, pc}
 80025f6:	bf00      	nop
 80025f8:	200000c4 	.word	0x200000c4
 80025fc:	200000c8 	.word	0x200000c8

08002600 <__sfputc_r>:
 8002600:	6893      	ldr	r3, [r2, #8]
 8002602:	b410      	push	{r4}
 8002604:	3b01      	subs	r3, #1
 8002606:	2b00      	cmp	r3, #0
 8002608:	6093      	str	r3, [r2, #8]
 800260a:	da08      	bge.n	800261e <__sfputc_r+0x1e>
 800260c:	6994      	ldr	r4, [r2, #24]
 800260e:	42a3      	cmp	r3, r4
 8002610:	db02      	blt.n	8002618 <__sfputc_r+0x18>
 8002612:	b2cb      	uxtb	r3, r1
 8002614:	2b0a      	cmp	r3, #10
 8002616:	d102      	bne.n	800261e <__sfputc_r+0x1e>
 8002618:	bc10      	pop	{r4}
 800261a:	f7ff bc9f 	b.w	8001f5c <__swbuf_r>
 800261e:	6813      	ldr	r3, [r2, #0]
 8002620:	1c58      	adds	r0, r3, #1
 8002622:	6010      	str	r0, [r2, #0]
 8002624:	7019      	strb	r1, [r3, #0]
 8002626:	b2c8      	uxtb	r0, r1
 8002628:	bc10      	pop	{r4}
 800262a:	4770      	bx	lr

0800262c <__sfputs_r>:
 800262c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800262e:	4606      	mov	r6, r0
 8002630:	460f      	mov	r7, r1
 8002632:	4614      	mov	r4, r2
 8002634:	18d5      	adds	r5, r2, r3
 8002636:	42ac      	cmp	r4, r5
 8002638:	d101      	bne.n	800263e <__sfputs_r+0x12>
 800263a:	2000      	movs	r0, #0
 800263c:	e007      	b.n	800264e <__sfputs_r+0x22>
 800263e:	463a      	mov	r2, r7
 8002640:	f814 1b01 	ldrb.w	r1, [r4], #1
 8002644:	4630      	mov	r0, r6
 8002646:	f7ff ffdb 	bl	8002600 <__sfputc_r>
 800264a:	1c43      	adds	r3, r0, #1
 800264c:	d1f3      	bne.n	8002636 <__sfputs_r+0xa>
 800264e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

08002650 <_vfiprintf_r>:
 8002650:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8002654:	b09d      	sub	sp, #116	; 0x74
 8002656:	460c      	mov	r4, r1
 8002658:	4617      	mov	r7, r2
 800265a:	9303      	str	r3, [sp, #12]
 800265c:	4606      	mov	r6, r0
 800265e:	b118      	cbz	r0, 8002668 <_vfiprintf_r+0x18>
 8002660:	6983      	ldr	r3, [r0, #24]
 8002662:	b90b      	cbnz	r3, 8002668 <_vfiprintf_r+0x18>
 8002664:	f7ff fe2c 	bl	80022c0 <__sinit>
 8002668:	4b7c      	ldr	r3, [pc, #496]	; (800285c <_vfiprintf_r+0x20c>)
 800266a:	429c      	cmp	r4, r3
 800266c:	d157      	bne.n	800271e <_vfiprintf_r+0xce>
 800266e:	6874      	ldr	r4, [r6, #4]
 8002670:	89a3      	ldrh	r3, [r4, #12]
 8002672:	0718      	lsls	r0, r3, #28
 8002674:	d55d      	bpl.n	8002732 <_vfiprintf_r+0xe2>
 8002676:	6923      	ldr	r3, [r4, #16]
 8002678:	2b00      	cmp	r3, #0
 800267a:	d05a      	beq.n	8002732 <_vfiprintf_r+0xe2>
 800267c:	2300      	movs	r3, #0
 800267e:	9309      	str	r3, [sp, #36]	; 0x24
 8002680:	2320      	movs	r3, #32
 8002682:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 8002686:	2330      	movs	r3, #48	; 0x30
 8002688:	f04f 0b01 	mov.w	fp, #1
 800268c:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 8002690:	46b8      	mov	r8, r7
 8002692:	4645      	mov	r5, r8
 8002694:	f815 3b01 	ldrb.w	r3, [r5], #1
 8002698:	2b00      	cmp	r3, #0
 800269a:	d155      	bne.n	8002748 <_vfiprintf_r+0xf8>
 800269c:	ebb8 0a07 	subs.w	sl, r8, r7
 80026a0:	d00b      	beq.n	80026ba <_vfiprintf_r+0x6a>
 80026a2:	4653      	mov	r3, sl
 80026a4:	463a      	mov	r2, r7
 80026a6:	4621      	mov	r1, r4
 80026a8:	4630      	mov	r0, r6
 80026aa:	f7ff ffbf 	bl	800262c <__sfputs_r>
 80026ae:	3001      	adds	r0, #1
 80026b0:	f000 80c4 	beq.w	800283c <_vfiprintf_r+0x1ec>
 80026b4:	9b09      	ldr	r3, [sp, #36]	; 0x24
 80026b6:	4453      	add	r3, sl
 80026b8:	9309      	str	r3, [sp, #36]	; 0x24
 80026ba:	f898 3000 	ldrb.w	r3, [r8]
 80026be:	2b00      	cmp	r3, #0
 80026c0:	f000 80bc 	beq.w	800283c <_vfiprintf_r+0x1ec>
 80026c4:	2300      	movs	r3, #0
 80026c6:	f04f 32ff 	mov.w	r2, #4294967295
 80026ca:	9304      	str	r3, [sp, #16]
 80026cc:	9307      	str	r3, [sp, #28]
 80026ce:	9205      	str	r2, [sp, #20]
 80026d0:	9306      	str	r3, [sp, #24]
 80026d2:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 80026d6:	931a      	str	r3, [sp, #104]	; 0x68
 80026d8:	2205      	movs	r2, #5
 80026da:	7829      	ldrb	r1, [r5, #0]
 80026dc:	4860      	ldr	r0, [pc, #384]	; (8002860 <_vfiprintf_r+0x210>)
 80026de:	f000 fb0f 	bl	8002d00 <memchr>
 80026e2:	f105 0801 	add.w	r8, r5, #1
 80026e6:	9b04      	ldr	r3, [sp, #16]
 80026e8:	2800      	cmp	r0, #0
 80026ea:	d131      	bne.n	8002750 <_vfiprintf_r+0x100>
 80026ec:	06d9      	lsls	r1, r3, #27
 80026ee:	bf44      	itt	mi
 80026f0:	2220      	movmi	r2, #32
 80026f2:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 80026f6:	071a      	lsls	r2, r3, #28
 80026f8:	bf44      	itt	mi
 80026fa:	222b      	movmi	r2, #43	; 0x2b
 80026fc:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8002700:	782a      	ldrb	r2, [r5, #0]
 8002702:	2a2a      	cmp	r2, #42	; 0x2a
 8002704:	d02c      	beq.n	8002760 <_vfiprintf_r+0x110>
 8002706:	2100      	movs	r1, #0
 8002708:	200a      	movs	r0, #10
 800270a:	9a07      	ldr	r2, [sp, #28]
 800270c:	46a8      	mov	r8, r5
 800270e:	f898 3000 	ldrb.w	r3, [r8]
 8002712:	3501      	adds	r5, #1
 8002714:	3b30      	subs	r3, #48	; 0x30
 8002716:	2b09      	cmp	r3, #9
 8002718:	d96d      	bls.n	80027f6 <_vfiprintf_r+0x1a6>
 800271a:	b371      	cbz	r1, 800277a <_vfiprintf_r+0x12a>
 800271c:	e026      	b.n	800276c <_vfiprintf_r+0x11c>
 800271e:	4b51      	ldr	r3, [pc, #324]	; (8002864 <_vfiprintf_r+0x214>)
 8002720:	429c      	cmp	r4, r3
 8002722:	d101      	bne.n	8002728 <_vfiprintf_r+0xd8>
 8002724:	68b4      	ldr	r4, [r6, #8]
 8002726:	e7a3      	b.n	8002670 <_vfiprintf_r+0x20>
 8002728:	4b4f      	ldr	r3, [pc, #316]	; (8002868 <_vfiprintf_r+0x218>)
 800272a:	429c      	cmp	r4, r3
 800272c:	bf08      	it	eq
 800272e:	68f4      	ldreq	r4, [r6, #12]
 8002730:	e79e      	b.n	8002670 <_vfiprintf_r+0x20>
 8002732:	4621      	mov	r1, r4
 8002734:	4630      	mov	r0, r6
 8002736:	f7ff fc63 	bl	8002000 <__swsetup_r>
 800273a:	2800      	cmp	r0, #0
 800273c:	d09e      	beq.n	800267c <_vfiprintf_r+0x2c>
 800273e:	f04f 30ff 	mov.w	r0, #4294967295
 8002742:	b01d      	add	sp, #116	; 0x74
 8002744:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8002748:	2b25      	cmp	r3, #37	; 0x25
 800274a:	d0a7      	beq.n	800269c <_vfiprintf_r+0x4c>
 800274c:	46a8      	mov	r8, r5
 800274e:	e7a0      	b.n	8002692 <_vfiprintf_r+0x42>
 8002750:	4a43      	ldr	r2, [pc, #268]	; (8002860 <_vfiprintf_r+0x210>)
 8002752:	4645      	mov	r5, r8
 8002754:	1a80      	subs	r0, r0, r2
 8002756:	fa0b f000 	lsl.w	r0, fp, r0
 800275a:	4318      	orrs	r0, r3
 800275c:	9004      	str	r0, [sp, #16]
 800275e:	e7bb      	b.n	80026d8 <_vfiprintf_r+0x88>
 8002760:	9a03      	ldr	r2, [sp, #12]
 8002762:	1d11      	adds	r1, r2, #4
 8002764:	6812      	ldr	r2, [r2, #0]
 8002766:	9103      	str	r1, [sp, #12]
 8002768:	2a00      	cmp	r2, #0
 800276a:	db01      	blt.n	8002770 <_vfiprintf_r+0x120>
 800276c:	9207      	str	r2, [sp, #28]
 800276e:	e004      	b.n	800277a <_vfiprintf_r+0x12a>
 8002770:	4252      	negs	r2, r2
 8002772:	f043 0302 	orr.w	r3, r3, #2
 8002776:	9207      	str	r2, [sp, #28]
 8002778:	9304      	str	r3, [sp, #16]
 800277a:	f898 3000 	ldrb.w	r3, [r8]
 800277e:	2b2e      	cmp	r3, #46	; 0x2e
 8002780:	d110      	bne.n	80027a4 <_vfiprintf_r+0x154>
 8002782:	f898 3001 	ldrb.w	r3, [r8, #1]
 8002786:	f108 0101 	add.w	r1, r8, #1
 800278a:	2b2a      	cmp	r3, #42	; 0x2a
 800278c:	d137      	bne.n	80027fe <_vfiprintf_r+0x1ae>
 800278e:	9b03      	ldr	r3, [sp, #12]
 8002790:	f108 0802 	add.w	r8, r8, #2
 8002794:	1d1a      	adds	r2, r3, #4
 8002796:	681b      	ldr	r3, [r3, #0]
 8002798:	9203      	str	r2, [sp, #12]
 800279a:	2b00      	cmp	r3, #0
 800279c:	bfb8      	it	lt
 800279e:	f04f 33ff 	movlt.w	r3, #4294967295
 80027a2:	9305      	str	r3, [sp, #20]
 80027a4:	4d31      	ldr	r5, [pc, #196]	; (800286c <_vfiprintf_r+0x21c>)
 80027a6:	2203      	movs	r2, #3
 80027a8:	f898 1000 	ldrb.w	r1, [r8]
 80027ac:	4628      	mov	r0, r5
 80027ae:	f000 faa7 	bl	8002d00 <memchr>
 80027b2:	b140      	cbz	r0, 80027c6 <_vfiprintf_r+0x176>
 80027b4:	2340      	movs	r3, #64	; 0x40
 80027b6:	1b40      	subs	r0, r0, r5
 80027b8:	fa03 f000 	lsl.w	r0, r3, r0
 80027bc:	9b04      	ldr	r3, [sp, #16]
 80027be:	f108 0801 	add.w	r8, r8, #1
 80027c2:	4303      	orrs	r3, r0
 80027c4:	9304      	str	r3, [sp, #16]
 80027c6:	f898 1000 	ldrb.w	r1, [r8]
 80027ca:	2206      	movs	r2, #6
 80027cc:	4828      	ldr	r0, [pc, #160]	; (8002870 <_vfiprintf_r+0x220>)
 80027ce:	f108 0701 	add.w	r7, r8, #1
 80027d2:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 80027d6:	f000 fa93 	bl	8002d00 <memchr>
 80027da:	2800      	cmp	r0, #0
 80027dc:	d034      	beq.n	8002848 <_vfiprintf_r+0x1f8>
 80027de:	4b25      	ldr	r3, [pc, #148]	; (8002874 <_vfiprintf_r+0x224>)
 80027e0:	bb03      	cbnz	r3, 8002824 <_vfiprintf_r+0x1d4>
 80027e2:	9b03      	ldr	r3, [sp, #12]
 80027e4:	3307      	adds	r3, #7
 80027e6:	f023 0307 	bic.w	r3, r3, #7
 80027ea:	3308      	adds	r3, #8
 80027ec:	9303      	str	r3, [sp, #12]
 80027ee:	9b09      	ldr	r3, [sp, #36]	; 0x24
 80027f0:	444b      	add	r3, r9
 80027f2:	9309      	str	r3, [sp, #36]	; 0x24
 80027f4:	e74c      	b.n	8002690 <_vfiprintf_r+0x40>
 80027f6:	fb00 3202 	mla	r2, r0, r2, r3
 80027fa:	2101      	movs	r1, #1
 80027fc:	e786      	b.n	800270c <_vfiprintf_r+0xbc>
 80027fe:	2300      	movs	r3, #0
 8002800:	250a      	movs	r5, #10
 8002802:	4618      	mov	r0, r3
 8002804:	9305      	str	r3, [sp, #20]
 8002806:	4688      	mov	r8, r1
 8002808:	f898 2000 	ldrb.w	r2, [r8]
 800280c:	3101      	adds	r1, #1
 800280e:	3a30      	subs	r2, #48	; 0x30
 8002810:	2a09      	cmp	r2, #9
 8002812:	d903      	bls.n	800281c <_vfiprintf_r+0x1cc>
 8002814:	2b00      	cmp	r3, #0
 8002816:	d0c5      	beq.n	80027a4 <_vfiprintf_r+0x154>
 8002818:	9005      	str	r0, [sp, #20]
 800281a:	e7c3      	b.n	80027a4 <_vfiprintf_r+0x154>
 800281c:	fb05 2000 	mla	r0, r5, r0, r2
 8002820:	2301      	movs	r3, #1
 8002822:	e7f0      	b.n	8002806 <_vfiprintf_r+0x1b6>
 8002824:	ab03      	add	r3, sp, #12
 8002826:	9300      	str	r3, [sp, #0]
 8002828:	4622      	mov	r2, r4
 800282a:	4b13      	ldr	r3, [pc, #76]	; (8002878 <_vfiprintf_r+0x228>)
 800282c:	a904      	add	r1, sp, #16
 800282e:	4630      	mov	r0, r6
 8002830:	f3af 8000 	nop.w
 8002834:	f1b0 3fff 	cmp.w	r0, #4294967295
 8002838:	4681      	mov	r9, r0
 800283a:	d1d8      	bne.n	80027ee <_vfiprintf_r+0x19e>
 800283c:	89a3      	ldrh	r3, [r4, #12]
 800283e:	065b      	lsls	r3, r3, #25
 8002840:	f53f af7d 	bmi.w	800273e <_vfiprintf_r+0xee>
 8002844:	9809      	ldr	r0, [sp, #36]	; 0x24
 8002846:	e77c      	b.n	8002742 <_vfiprintf_r+0xf2>
 8002848:	ab03      	add	r3, sp, #12
 800284a:	9300      	str	r3, [sp, #0]
 800284c:	4622      	mov	r2, r4
 800284e:	4b0a      	ldr	r3, [pc, #40]	; (8002878 <_vfiprintf_r+0x228>)
 8002850:	a904      	add	r1, sp, #16
 8002852:	4630      	mov	r0, r6
 8002854:	f000 f88a 	bl	800296c <_printf_i>
 8002858:	e7ec      	b.n	8002834 <_vfiprintf_r+0x1e4>
 800285a:	bf00      	nop
 800285c:	08002e88 	.word	0x08002e88
 8002860:	08002ec8 	.word	0x08002ec8
 8002864:	08002ea8 	.word	0x08002ea8
 8002868:	08002e68 	.word	0x08002e68
 800286c:	08002ece 	.word	0x08002ece
 8002870:	08002ed2 	.word	0x08002ed2
 8002874:	00000000 	.word	0x00000000
 8002878:	0800262d 	.word	0x0800262d

0800287c <_printf_common>:
 800287c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8002880:	4691      	mov	r9, r2
 8002882:	461f      	mov	r7, r3
 8002884:	688a      	ldr	r2, [r1, #8]
 8002886:	690b      	ldr	r3, [r1, #16]
 8002888:	4606      	mov	r6, r0
 800288a:	4293      	cmp	r3, r2
 800288c:	bfb8      	it	lt
 800288e:	4613      	movlt	r3, r2
 8002890:	f8c9 3000 	str.w	r3, [r9]
 8002894:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 8002898:	460c      	mov	r4, r1
 800289a:	f8dd 8020 	ldr.w	r8, [sp, #32]
 800289e:	b112      	cbz	r2, 80028a6 <_printf_common+0x2a>
 80028a0:	3301      	adds	r3, #1
 80028a2:	f8c9 3000 	str.w	r3, [r9]
 80028a6:	6823      	ldr	r3, [r4, #0]
 80028a8:	0699      	lsls	r1, r3, #26
 80028aa:	bf42      	ittt	mi
 80028ac:	f8d9 3000 	ldrmi.w	r3, [r9]
 80028b0:	3302      	addmi	r3, #2
 80028b2:	f8c9 3000 	strmi.w	r3, [r9]
 80028b6:	6825      	ldr	r5, [r4, #0]
 80028b8:	f015 0506 	ands.w	r5, r5, #6
 80028bc:	d107      	bne.n	80028ce <_printf_common+0x52>
 80028be:	f104 0a19 	add.w	sl, r4, #25
 80028c2:	68e3      	ldr	r3, [r4, #12]
 80028c4:	f8d9 2000 	ldr.w	r2, [r9]
 80028c8:	1a9b      	subs	r3, r3, r2
 80028ca:	429d      	cmp	r5, r3
 80028cc:	db2a      	blt.n	8002924 <_printf_common+0xa8>
 80028ce:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 80028d2:	6822      	ldr	r2, [r4, #0]
 80028d4:	3300      	adds	r3, #0
 80028d6:	bf18      	it	ne
 80028d8:	2301      	movne	r3, #1
 80028da:	0692      	lsls	r2, r2, #26
 80028dc:	d42f      	bmi.n	800293e <_printf_common+0xc2>
 80028de:	f104 0243 	add.w	r2, r4, #67	; 0x43
 80028e2:	4639      	mov	r1, r7
 80028e4:	4630      	mov	r0, r6
 80028e6:	47c0      	blx	r8
 80028e8:	3001      	adds	r0, #1
 80028ea:	d022      	beq.n	8002932 <_printf_common+0xb6>
 80028ec:	6823      	ldr	r3, [r4, #0]
 80028ee:	68e5      	ldr	r5, [r4, #12]
 80028f0:	f003 0306 	and.w	r3, r3, #6
 80028f4:	2b04      	cmp	r3, #4
 80028f6:	bf18      	it	ne
 80028f8:	2500      	movne	r5, #0
 80028fa:	f8d9 2000 	ldr.w	r2, [r9]
 80028fe:	f04f 0900 	mov.w	r9, #0
 8002902:	bf08      	it	eq
 8002904:	1aad      	subeq	r5, r5, r2
 8002906:	68a3      	ldr	r3, [r4, #8]
 8002908:	6922      	ldr	r2, [r4, #16]
 800290a:	bf08      	it	eq
 800290c:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8002910:	4293      	cmp	r3, r2
 8002912:	bfc4      	itt	gt
 8002914:	1a9b      	subgt	r3, r3, r2
 8002916:	18ed      	addgt	r5, r5, r3
 8002918:	341a      	adds	r4, #26
 800291a:	454d      	cmp	r5, r9
 800291c:	d11b      	bne.n	8002956 <_printf_common+0xda>
 800291e:	2000      	movs	r0, #0
 8002920:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8002924:	2301      	movs	r3, #1
 8002926:	4652      	mov	r2, sl
 8002928:	4639      	mov	r1, r7
 800292a:	4630      	mov	r0, r6
 800292c:	47c0      	blx	r8
 800292e:	3001      	adds	r0, #1
 8002930:	d103      	bne.n	800293a <_printf_common+0xbe>
 8002932:	f04f 30ff 	mov.w	r0, #4294967295
 8002936:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800293a:	3501      	adds	r5, #1
 800293c:	e7c1      	b.n	80028c2 <_printf_common+0x46>
 800293e:	2030      	movs	r0, #48	; 0x30
 8002940:	18e1      	adds	r1, r4, r3
 8002942:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 8002946:	1c5a      	adds	r2, r3, #1
 8002948:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 800294c:	4422      	add	r2, r4
 800294e:	3302      	adds	r3, #2
 8002950:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 8002954:	e7c3      	b.n	80028de <_printf_common+0x62>
 8002956:	2301      	movs	r3, #1
 8002958:	4622      	mov	r2, r4
 800295a:	4639      	mov	r1, r7
 800295c:	4630      	mov	r0, r6
 800295e:	47c0      	blx	r8
 8002960:	3001      	adds	r0, #1
 8002962:	d0e6      	beq.n	8002932 <_printf_common+0xb6>
 8002964:	f109 0901 	add.w	r9, r9, #1
 8002968:	e7d7      	b.n	800291a <_printf_common+0x9e>
	...

0800296c <_printf_i>:
 800296c:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 8002970:	4617      	mov	r7, r2
 8002972:	7e0a      	ldrb	r2, [r1, #24]
 8002974:	b085      	sub	sp, #20
 8002976:	2a6e      	cmp	r2, #110	; 0x6e
 8002978:	4698      	mov	r8, r3
 800297a:	4606      	mov	r6, r0
 800297c:	460c      	mov	r4, r1
 800297e:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 8002980:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 8002984:	f000 80bc 	beq.w	8002b00 <_printf_i+0x194>
 8002988:	d81a      	bhi.n	80029c0 <_printf_i+0x54>
 800298a:	2a63      	cmp	r2, #99	; 0x63
 800298c:	d02e      	beq.n	80029ec <_printf_i+0x80>
 800298e:	d80a      	bhi.n	80029a6 <_printf_i+0x3a>
 8002990:	2a00      	cmp	r2, #0
 8002992:	f000 80c8 	beq.w	8002b26 <_printf_i+0x1ba>
 8002996:	2a58      	cmp	r2, #88	; 0x58
 8002998:	f000 808a 	beq.w	8002ab0 <_printf_i+0x144>
 800299c:	f104 0542 	add.w	r5, r4, #66	; 0x42
 80029a0:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 80029a4:	e02a      	b.n	80029fc <_printf_i+0x90>
 80029a6:	2a64      	cmp	r2, #100	; 0x64
 80029a8:	d001      	beq.n	80029ae <_printf_i+0x42>
 80029aa:	2a69      	cmp	r2, #105	; 0x69
 80029ac:	d1f6      	bne.n	800299c <_printf_i+0x30>
 80029ae:	6821      	ldr	r1, [r4, #0]
 80029b0:	681a      	ldr	r2, [r3, #0]
 80029b2:	f011 0f80 	tst.w	r1, #128	; 0x80
 80029b6:	d023      	beq.n	8002a00 <_printf_i+0x94>
 80029b8:	1d11      	adds	r1, r2, #4
 80029ba:	6019      	str	r1, [r3, #0]
 80029bc:	6813      	ldr	r3, [r2, #0]
 80029be:	e027      	b.n	8002a10 <_printf_i+0xa4>
 80029c0:	2a73      	cmp	r2, #115	; 0x73
 80029c2:	f000 80b4 	beq.w	8002b2e <_printf_i+0x1c2>
 80029c6:	d808      	bhi.n	80029da <_printf_i+0x6e>
 80029c8:	2a6f      	cmp	r2, #111	; 0x6f
 80029ca:	d02a      	beq.n	8002a22 <_printf_i+0xb6>
 80029cc:	2a70      	cmp	r2, #112	; 0x70
 80029ce:	d1e5      	bne.n	800299c <_printf_i+0x30>
 80029d0:	680a      	ldr	r2, [r1, #0]
 80029d2:	f042 0220 	orr.w	r2, r2, #32
 80029d6:	600a      	str	r2, [r1, #0]
 80029d8:	e003      	b.n	80029e2 <_printf_i+0x76>
 80029da:	2a75      	cmp	r2, #117	; 0x75
 80029dc:	d021      	beq.n	8002a22 <_printf_i+0xb6>
 80029de:	2a78      	cmp	r2, #120	; 0x78
 80029e0:	d1dc      	bne.n	800299c <_printf_i+0x30>
 80029e2:	2278      	movs	r2, #120	; 0x78
 80029e4:	496f      	ldr	r1, [pc, #444]	; (8002ba4 <_printf_i+0x238>)
 80029e6:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 80029ea:	e064      	b.n	8002ab6 <_printf_i+0x14a>
 80029ec:	681a      	ldr	r2, [r3, #0]
 80029ee:	f101 0542 	add.w	r5, r1, #66	; 0x42
 80029f2:	1d11      	adds	r1, r2, #4
 80029f4:	6019      	str	r1, [r3, #0]
 80029f6:	6813      	ldr	r3, [r2, #0]
 80029f8:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 80029fc:	2301      	movs	r3, #1
 80029fe:	e0a3      	b.n	8002b48 <_printf_i+0x1dc>
 8002a00:	f011 0f40 	tst.w	r1, #64	; 0x40
 8002a04:	f102 0104 	add.w	r1, r2, #4
 8002a08:	6019      	str	r1, [r3, #0]
 8002a0a:	d0d7      	beq.n	80029bc <_printf_i+0x50>
 8002a0c:	f9b2 3000 	ldrsh.w	r3, [r2]
 8002a10:	2b00      	cmp	r3, #0
 8002a12:	da03      	bge.n	8002a1c <_printf_i+0xb0>
 8002a14:	222d      	movs	r2, #45	; 0x2d
 8002a16:	425b      	negs	r3, r3
 8002a18:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8002a1c:	4962      	ldr	r1, [pc, #392]	; (8002ba8 <_printf_i+0x23c>)
 8002a1e:	220a      	movs	r2, #10
 8002a20:	e017      	b.n	8002a52 <_printf_i+0xe6>
 8002a22:	6820      	ldr	r0, [r4, #0]
 8002a24:	6819      	ldr	r1, [r3, #0]
 8002a26:	f010 0f80 	tst.w	r0, #128	; 0x80
 8002a2a:	d003      	beq.n	8002a34 <_printf_i+0xc8>
 8002a2c:	1d08      	adds	r0, r1, #4
 8002a2e:	6018      	str	r0, [r3, #0]
 8002a30:	680b      	ldr	r3, [r1, #0]
 8002a32:	e006      	b.n	8002a42 <_printf_i+0xd6>
 8002a34:	f010 0f40 	tst.w	r0, #64	; 0x40
 8002a38:	f101 0004 	add.w	r0, r1, #4
 8002a3c:	6018      	str	r0, [r3, #0]
 8002a3e:	d0f7      	beq.n	8002a30 <_printf_i+0xc4>
 8002a40:	880b      	ldrh	r3, [r1, #0]
 8002a42:	2a6f      	cmp	r2, #111	; 0x6f
 8002a44:	bf14      	ite	ne
 8002a46:	220a      	movne	r2, #10
 8002a48:	2208      	moveq	r2, #8
 8002a4a:	4957      	ldr	r1, [pc, #348]	; (8002ba8 <_printf_i+0x23c>)
 8002a4c:	2000      	movs	r0, #0
 8002a4e:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 8002a52:	6865      	ldr	r5, [r4, #4]
 8002a54:	2d00      	cmp	r5, #0
 8002a56:	60a5      	str	r5, [r4, #8]
 8002a58:	f2c0 809c 	blt.w	8002b94 <_printf_i+0x228>
 8002a5c:	6820      	ldr	r0, [r4, #0]
 8002a5e:	f020 0004 	bic.w	r0, r0, #4
 8002a62:	6020      	str	r0, [r4, #0]
 8002a64:	2b00      	cmp	r3, #0
 8002a66:	d13f      	bne.n	8002ae8 <_printf_i+0x17c>
 8002a68:	2d00      	cmp	r5, #0
 8002a6a:	f040 8095 	bne.w	8002b98 <_printf_i+0x22c>
 8002a6e:	4675      	mov	r5, lr
 8002a70:	2a08      	cmp	r2, #8
 8002a72:	d10b      	bne.n	8002a8c <_printf_i+0x120>
 8002a74:	6823      	ldr	r3, [r4, #0]
 8002a76:	07da      	lsls	r2, r3, #31
 8002a78:	d508      	bpl.n	8002a8c <_printf_i+0x120>
 8002a7a:	6923      	ldr	r3, [r4, #16]
 8002a7c:	6862      	ldr	r2, [r4, #4]
 8002a7e:	429a      	cmp	r2, r3
 8002a80:	bfde      	ittt	le
 8002a82:	2330      	movle	r3, #48	; 0x30
 8002a84:	f805 3c01 	strble.w	r3, [r5, #-1]
 8002a88:	f105 35ff 	addle.w	r5, r5, #4294967295
 8002a8c:	ebae 0305 	sub.w	r3, lr, r5
 8002a90:	6123      	str	r3, [r4, #16]
 8002a92:	f8cd 8000 	str.w	r8, [sp]
 8002a96:	463b      	mov	r3, r7
 8002a98:	aa03      	add	r2, sp, #12
 8002a9a:	4621      	mov	r1, r4
 8002a9c:	4630      	mov	r0, r6
 8002a9e:	f7ff feed 	bl	800287c <_printf_common>
 8002aa2:	3001      	adds	r0, #1
 8002aa4:	d155      	bne.n	8002b52 <_printf_i+0x1e6>
 8002aa6:	f04f 30ff 	mov.w	r0, #4294967295
 8002aaa:	b005      	add	sp, #20
 8002aac:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8002ab0:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8002ab4:	493c      	ldr	r1, [pc, #240]	; (8002ba8 <_printf_i+0x23c>)
 8002ab6:	6822      	ldr	r2, [r4, #0]
 8002ab8:	6818      	ldr	r0, [r3, #0]
 8002aba:	f012 0f80 	tst.w	r2, #128	; 0x80
 8002abe:	f100 0504 	add.w	r5, r0, #4
 8002ac2:	601d      	str	r5, [r3, #0]
 8002ac4:	d001      	beq.n	8002aca <_printf_i+0x15e>
 8002ac6:	6803      	ldr	r3, [r0, #0]
 8002ac8:	e002      	b.n	8002ad0 <_printf_i+0x164>
 8002aca:	0655      	lsls	r5, r2, #25
 8002acc:	d5fb      	bpl.n	8002ac6 <_printf_i+0x15a>
 8002ace:	8803      	ldrh	r3, [r0, #0]
 8002ad0:	07d0      	lsls	r0, r2, #31
 8002ad2:	bf44      	itt	mi
 8002ad4:	f042 0220 	orrmi.w	r2, r2, #32
 8002ad8:	6022      	strmi	r2, [r4, #0]
 8002ada:	b91b      	cbnz	r3, 8002ae4 <_printf_i+0x178>
 8002adc:	6822      	ldr	r2, [r4, #0]
 8002ade:	f022 0220 	bic.w	r2, r2, #32
 8002ae2:	6022      	str	r2, [r4, #0]
 8002ae4:	2210      	movs	r2, #16
 8002ae6:	e7b1      	b.n	8002a4c <_printf_i+0xe0>
 8002ae8:	4675      	mov	r5, lr
 8002aea:	fbb3 f0f2 	udiv	r0, r3, r2
 8002aee:	fb02 3310 	mls	r3, r2, r0, r3
 8002af2:	5ccb      	ldrb	r3, [r1, r3]
 8002af4:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8002af8:	4603      	mov	r3, r0
 8002afa:	2800      	cmp	r0, #0
 8002afc:	d1f5      	bne.n	8002aea <_printf_i+0x17e>
 8002afe:	e7b7      	b.n	8002a70 <_printf_i+0x104>
 8002b00:	6808      	ldr	r0, [r1, #0]
 8002b02:	681a      	ldr	r2, [r3, #0]
 8002b04:	f010 0f80 	tst.w	r0, #128	; 0x80
 8002b08:	6949      	ldr	r1, [r1, #20]
 8002b0a:	d004      	beq.n	8002b16 <_printf_i+0x1aa>
 8002b0c:	1d10      	adds	r0, r2, #4
 8002b0e:	6018      	str	r0, [r3, #0]
 8002b10:	6813      	ldr	r3, [r2, #0]
 8002b12:	6019      	str	r1, [r3, #0]
 8002b14:	e007      	b.n	8002b26 <_printf_i+0x1ba>
 8002b16:	f010 0f40 	tst.w	r0, #64	; 0x40
 8002b1a:	f102 0004 	add.w	r0, r2, #4
 8002b1e:	6018      	str	r0, [r3, #0]
 8002b20:	6813      	ldr	r3, [r2, #0]
 8002b22:	d0f6      	beq.n	8002b12 <_printf_i+0x1a6>
 8002b24:	8019      	strh	r1, [r3, #0]
 8002b26:	2300      	movs	r3, #0
 8002b28:	4675      	mov	r5, lr
 8002b2a:	6123      	str	r3, [r4, #16]
 8002b2c:	e7b1      	b.n	8002a92 <_printf_i+0x126>
 8002b2e:	681a      	ldr	r2, [r3, #0]
 8002b30:	1d11      	adds	r1, r2, #4
 8002b32:	6019      	str	r1, [r3, #0]
 8002b34:	6815      	ldr	r5, [r2, #0]
 8002b36:	2100      	movs	r1, #0
 8002b38:	6862      	ldr	r2, [r4, #4]
 8002b3a:	4628      	mov	r0, r5
 8002b3c:	f000 f8e0 	bl	8002d00 <memchr>
 8002b40:	b108      	cbz	r0, 8002b46 <_printf_i+0x1da>
 8002b42:	1b40      	subs	r0, r0, r5
 8002b44:	6060      	str	r0, [r4, #4]
 8002b46:	6863      	ldr	r3, [r4, #4]
 8002b48:	6123      	str	r3, [r4, #16]
 8002b4a:	2300      	movs	r3, #0
 8002b4c:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8002b50:	e79f      	b.n	8002a92 <_printf_i+0x126>
 8002b52:	6923      	ldr	r3, [r4, #16]
 8002b54:	462a      	mov	r2, r5
 8002b56:	4639      	mov	r1, r7
 8002b58:	4630      	mov	r0, r6
 8002b5a:	47c0      	blx	r8
 8002b5c:	3001      	adds	r0, #1
 8002b5e:	d0a2      	beq.n	8002aa6 <_printf_i+0x13a>
 8002b60:	6823      	ldr	r3, [r4, #0]
 8002b62:	079b      	lsls	r3, r3, #30
 8002b64:	d507      	bpl.n	8002b76 <_printf_i+0x20a>
 8002b66:	2500      	movs	r5, #0
 8002b68:	f104 0919 	add.w	r9, r4, #25
 8002b6c:	68e3      	ldr	r3, [r4, #12]
 8002b6e:	9a03      	ldr	r2, [sp, #12]
 8002b70:	1a9b      	subs	r3, r3, r2
 8002b72:	429d      	cmp	r5, r3
 8002b74:	db05      	blt.n	8002b82 <_printf_i+0x216>
 8002b76:	68e0      	ldr	r0, [r4, #12]
 8002b78:	9b03      	ldr	r3, [sp, #12]
 8002b7a:	4298      	cmp	r0, r3
 8002b7c:	bfb8      	it	lt
 8002b7e:	4618      	movlt	r0, r3
 8002b80:	e793      	b.n	8002aaa <_printf_i+0x13e>
 8002b82:	2301      	movs	r3, #1
 8002b84:	464a      	mov	r2, r9
 8002b86:	4639      	mov	r1, r7
 8002b88:	4630      	mov	r0, r6
 8002b8a:	47c0      	blx	r8
 8002b8c:	3001      	adds	r0, #1
 8002b8e:	d08a      	beq.n	8002aa6 <_printf_i+0x13a>
 8002b90:	3501      	adds	r5, #1
 8002b92:	e7eb      	b.n	8002b6c <_printf_i+0x200>
 8002b94:	2b00      	cmp	r3, #0
 8002b96:	d1a7      	bne.n	8002ae8 <_printf_i+0x17c>
 8002b98:	780b      	ldrb	r3, [r1, #0]
 8002b9a:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8002b9e:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8002ba2:	e765      	b.n	8002a70 <_printf_i+0x104>
 8002ba4:	08002eea 	.word	0x08002eea
 8002ba8:	08002ed9 	.word	0x08002ed9

08002bac <_sbrk_r>:
 8002bac:	b538      	push	{r3, r4, r5, lr}
 8002bae:	2300      	movs	r3, #0
 8002bb0:	4c05      	ldr	r4, [pc, #20]	; (8002bc8 <_sbrk_r+0x1c>)
 8002bb2:	4605      	mov	r5, r0
 8002bb4:	4608      	mov	r0, r1
 8002bb6:	6023      	str	r3, [r4, #0]
 8002bb8:	f000 f8ec 	bl	8002d94 <_sbrk>
 8002bbc:	1c43      	adds	r3, r0, #1
 8002bbe:	d102      	bne.n	8002bc6 <_sbrk_r+0x1a>
 8002bc0:	6823      	ldr	r3, [r4, #0]
 8002bc2:	b103      	cbz	r3, 8002bc6 <_sbrk_r+0x1a>
 8002bc4:	602b      	str	r3, [r5, #0]
 8002bc6:	bd38      	pop	{r3, r4, r5, pc}
 8002bc8:	20000288 	.word	0x20000288

08002bcc <__sread>:
 8002bcc:	b510      	push	{r4, lr}
 8002bce:	460c      	mov	r4, r1
 8002bd0:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002bd4:	f000 f8a4 	bl	8002d20 <_read_r>
 8002bd8:	2800      	cmp	r0, #0
 8002bda:	bfab      	itete	ge
 8002bdc:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 8002bde:	89a3      	ldrhlt	r3, [r4, #12]
 8002be0:	181b      	addge	r3, r3, r0
 8002be2:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 8002be6:	bfac      	ite	ge
 8002be8:	6563      	strge	r3, [r4, #84]	; 0x54
 8002bea:	81a3      	strhlt	r3, [r4, #12]
 8002bec:	bd10      	pop	{r4, pc}

08002bee <__swrite>:
 8002bee:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8002bf2:	461f      	mov	r7, r3
 8002bf4:	898b      	ldrh	r3, [r1, #12]
 8002bf6:	4605      	mov	r5, r0
 8002bf8:	05db      	lsls	r3, r3, #23
 8002bfa:	460c      	mov	r4, r1
 8002bfc:	4616      	mov	r6, r2
 8002bfe:	d505      	bpl.n	8002c0c <__swrite+0x1e>
 8002c00:	2302      	movs	r3, #2
 8002c02:	2200      	movs	r2, #0
 8002c04:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002c08:	f000 f868 	bl	8002cdc <_lseek_r>
 8002c0c:	89a3      	ldrh	r3, [r4, #12]
 8002c0e:	4632      	mov	r2, r6
 8002c10:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 8002c14:	81a3      	strh	r3, [r4, #12]
 8002c16:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8002c1a:	463b      	mov	r3, r7
 8002c1c:	4628      	mov	r0, r5
 8002c1e:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8002c22:	f000 b817 	b.w	8002c54 <_write_r>

08002c26 <__sseek>:
 8002c26:	b510      	push	{r4, lr}
 8002c28:	460c      	mov	r4, r1
 8002c2a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002c2e:	f000 f855 	bl	8002cdc <_lseek_r>
 8002c32:	1c43      	adds	r3, r0, #1
 8002c34:	89a3      	ldrh	r3, [r4, #12]
 8002c36:	bf15      	itete	ne
 8002c38:	6560      	strne	r0, [r4, #84]	; 0x54
 8002c3a:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 8002c3e:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 8002c42:	81a3      	strheq	r3, [r4, #12]
 8002c44:	bf18      	it	ne
 8002c46:	81a3      	strhne	r3, [r4, #12]
 8002c48:	bd10      	pop	{r4, pc}

08002c4a <__sclose>:
 8002c4a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002c4e:	f000 b813 	b.w	8002c78 <_close_r>
	...

08002c54 <_write_r>:
 8002c54:	b538      	push	{r3, r4, r5, lr}
 8002c56:	4605      	mov	r5, r0
 8002c58:	4608      	mov	r0, r1
 8002c5a:	4611      	mov	r1, r2
 8002c5c:	2200      	movs	r2, #0
 8002c5e:	4c05      	ldr	r4, [pc, #20]	; (8002c74 <_write_r+0x20>)
 8002c60:	6022      	str	r2, [r4, #0]
 8002c62:	461a      	mov	r2, r3
 8002c64:	f7fe fcc8 	bl	80015f8 <_write>
 8002c68:	1c43      	adds	r3, r0, #1
 8002c6a:	d102      	bne.n	8002c72 <_write_r+0x1e>
 8002c6c:	6823      	ldr	r3, [r4, #0]
 8002c6e:	b103      	cbz	r3, 8002c72 <_write_r+0x1e>
 8002c70:	602b      	str	r3, [r5, #0]
 8002c72:	bd38      	pop	{r3, r4, r5, pc}
 8002c74:	20000288 	.word	0x20000288

08002c78 <_close_r>:
 8002c78:	b538      	push	{r3, r4, r5, lr}
 8002c7a:	2300      	movs	r3, #0
 8002c7c:	4c05      	ldr	r4, [pc, #20]	; (8002c94 <_close_r+0x1c>)
 8002c7e:	4605      	mov	r5, r0
 8002c80:	4608      	mov	r0, r1
 8002c82:	6023      	str	r3, [r4, #0]
 8002c84:	f000 f85e 	bl	8002d44 <_close>
 8002c88:	1c43      	adds	r3, r0, #1
 8002c8a:	d102      	bne.n	8002c92 <_close_r+0x1a>
 8002c8c:	6823      	ldr	r3, [r4, #0]
 8002c8e:	b103      	cbz	r3, 8002c92 <_close_r+0x1a>
 8002c90:	602b      	str	r3, [r5, #0]
 8002c92:	bd38      	pop	{r3, r4, r5, pc}
 8002c94:	20000288 	.word	0x20000288

08002c98 <_fstat_r>:
 8002c98:	b538      	push	{r3, r4, r5, lr}
 8002c9a:	2300      	movs	r3, #0
 8002c9c:	4c06      	ldr	r4, [pc, #24]	; (8002cb8 <_fstat_r+0x20>)
 8002c9e:	4605      	mov	r5, r0
 8002ca0:	4608      	mov	r0, r1
 8002ca2:	4611      	mov	r1, r2
 8002ca4:	6023      	str	r3, [r4, #0]
 8002ca6:	f000 f855 	bl	8002d54 <_fstat>
 8002caa:	1c43      	adds	r3, r0, #1
 8002cac:	d102      	bne.n	8002cb4 <_fstat_r+0x1c>
 8002cae:	6823      	ldr	r3, [r4, #0]
 8002cb0:	b103      	cbz	r3, 8002cb4 <_fstat_r+0x1c>
 8002cb2:	602b      	str	r3, [r5, #0]
 8002cb4:	bd38      	pop	{r3, r4, r5, pc}
 8002cb6:	bf00      	nop
 8002cb8:	20000288 	.word	0x20000288

08002cbc <_isatty_r>:
 8002cbc:	b538      	push	{r3, r4, r5, lr}
 8002cbe:	2300      	movs	r3, #0
 8002cc0:	4c05      	ldr	r4, [pc, #20]	; (8002cd8 <_isatty_r+0x1c>)
 8002cc2:	4605      	mov	r5, r0
 8002cc4:	4608      	mov	r0, r1
 8002cc6:	6023      	str	r3, [r4, #0]
 8002cc8:	f000 f84c 	bl	8002d64 <_isatty>
 8002ccc:	1c43      	adds	r3, r0, #1
 8002cce:	d102      	bne.n	8002cd6 <_isatty_r+0x1a>
 8002cd0:	6823      	ldr	r3, [r4, #0]
 8002cd2:	b103      	cbz	r3, 8002cd6 <_isatty_r+0x1a>
 8002cd4:	602b      	str	r3, [r5, #0]
 8002cd6:	bd38      	pop	{r3, r4, r5, pc}
 8002cd8:	20000288 	.word	0x20000288

08002cdc <_lseek_r>:
 8002cdc:	b538      	push	{r3, r4, r5, lr}
 8002cde:	4605      	mov	r5, r0
 8002ce0:	4608      	mov	r0, r1
 8002ce2:	4611      	mov	r1, r2
 8002ce4:	2200      	movs	r2, #0
 8002ce6:	4c05      	ldr	r4, [pc, #20]	; (8002cfc <_lseek_r+0x20>)
 8002ce8:	6022      	str	r2, [r4, #0]
 8002cea:	461a      	mov	r2, r3
 8002cec:	f000 f842 	bl	8002d74 <_lseek>
 8002cf0:	1c43      	adds	r3, r0, #1
 8002cf2:	d102      	bne.n	8002cfa <_lseek_r+0x1e>
 8002cf4:	6823      	ldr	r3, [r4, #0]
 8002cf6:	b103      	cbz	r3, 8002cfa <_lseek_r+0x1e>
 8002cf8:	602b      	str	r3, [r5, #0]
 8002cfa:	bd38      	pop	{r3, r4, r5, pc}
 8002cfc:	20000288 	.word	0x20000288

08002d00 <memchr>:
 8002d00:	b510      	push	{r4, lr}
 8002d02:	b2c9      	uxtb	r1, r1
 8002d04:	4402      	add	r2, r0
 8002d06:	4290      	cmp	r0, r2
 8002d08:	4603      	mov	r3, r0
 8002d0a:	d101      	bne.n	8002d10 <memchr+0x10>
 8002d0c:	2000      	movs	r0, #0
 8002d0e:	bd10      	pop	{r4, pc}
 8002d10:	781c      	ldrb	r4, [r3, #0]
 8002d12:	3001      	adds	r0, #1
 8002d14:	428c      	cmp	r4, r1
 8002d16:	d1f6      	bne.n	8002d06 <memchr+0x6>
 8002d18:	4618      	mov	r0, r3
 8002d1a:	bd10      	pop	{r4, pc}

08002d1c <__malloc_lock>:
 8002d1c:	4770      	bx	lr

08002d1e <__malloc_unlock>:
 8002d1e:	4770      	bx	lr

08002d20 <_read_r>:
 8002d20:	b538      	push	{r3, r4, r5, lr}
 8002d22:	4605      	mov	r5, r0
 8002d24:	4608      	mov	r0, r1
 8002d26:	4611      	mov	r1, r2
 8002d28:	2200      	movs	r2, #0
 8002d2a:	4c05      	ldr	r4, [pc, #20]	; (8002d40 <_read_r+0x20>)
 8002d2c:	6022      	str	r2, [r4, #0]
 8002d2e:	461a      	mov	r2, r3
 8002d30:	f000 f828 	bl	8002d84 <_read>
 8002d34:	1c43      	adds	r3, r0, #1
 8002d36:	d102      	bne.n	8002d3e <_read_r+0x1e>
 8002d38:	6823      	ldr	r3, [r4, #0]
 8002d3a:	b103      	cbz	r3, 8002d3e <_read_r+0x1e>
 8002d3c:	602b      	str	r3, [r5, #0]
 8002d3e:	bd38      	pop	{r3, r4, r5, pc}
 8002d40:	20000288 	.word	0x20000288

08002d44 <_close>:
 8002d44:	2258      	movs	r2, #88	; 0x58
 8002d46:	4b02      	ldr	r3, [pc, #8]	; (8002d50 <_close+0xc>)
 8002d48:	f04f 30ff 	mov.w	r0, #4294967295
 8002d4c:	601a      	str	r2, [r3, #0]
 8002d4e:	4770      	bx	lr
 8002d50:	20000288 	.word	0x20000288

08002d54 <_fstat>:
 8002d54:	2258      	movs	r2, #88	; 0x58
 8002d56:	4b02      	ldr	r3, [pc, #8]	; (8002d60 <_fstat+0xc>)
 8002d58:	f04f 30ff 	mov.w	r0, #4294967295
 8002d5c:	601a      	str	r2, [r3, #0]
 8002d5e:	4770      	bx	lr
 8002d60:	20000288 	.word	0x20000288

08002d64 <_isatty>:
 8002d64:	2258      	movs	r2, #88	; 0x58
 8002d66:	4b02      	ldr	r3, [pc, #8]	; (8002d70 <_isatty+0xc>)
 8002d68:	2000      	movs	r0, #0
 8002d6a:	601a      	str	r2, [r3, #0]
 8002d6c:	4770      	bx	lr
 8002d6e:	bf00      	nop
 8002d70:	20000288 	.word	0x20000288

08002d74 <_lseek>:
 8002d74:	2258      	movs	r2, #88	; 0x58
 8002d76:	4b02      	ldr	r3, [pc, #8]	; (8002d80 <_lseek+0xc>)
 8002d78:	f04f 30ff 	mov.w	r0, #4294967295
 8002d7c:	601a      	str	r2, [r3, #0]
 8002d7e:	4770      	bx	lr
 8002d80:	20000288 	.word	0x20000288

08002d84 <_read>:
 8002d84:	2258      	movs	r2, #88	; 0x58
 8002d86:	4b02      	ldr	r3, [pc, #8]	; (8002d90 <_read+0xc>)
 8002d88:	f04f 30ff 	mov.w	r0, #4294967295
 8002d8c:	601a      	str	r2, [r3, #0]
 8002d8e:	4770      	bx	lr
 8002d90:	20000288 	.word	0x20000288

08002d94 <_sbrk>:
 8002d94:	4b04      	ldr	r3, [pc, #16]	; (8002da8 <_sbrk+0x14>)
 8002d96:	4602      	mov	r2, r0
 8002d98:	6819      	ldr	r1, [r3, #0]
 8002d9a:	b909      	cbnz	r1, 8002da0 <_sbrk+0xc>
 8002d9c:	4903      	ldr	r1, [pc, #12]	; (8002dac <_sbrk+0x18>)
 8002d9e:	6019      	str	r1, [r3, #0]
 8002da0:	6818      	ldr	r0, [r3, #0]
 8002da2:	4402      	add	r2, r0
 8002da4:	601a      	str	r2, [r3, #0]
 8002da6:	4770      	bx	lr
 8002da8:	200000cc 	.word	0x200000cc
 8002dac:	2000028c 	.word	0x2000028c

08002db0 <_init>:
 8002db0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002db2:	bf00      	nop
 8002db4:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8002db6:	bc08      	pop	{r3}
 8002db8:	469e      	mov	lr, r3
 8002dba:	4770      	bx	lr

08002dbc <_fini>:
 8002dbc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002dbe:	bf00      	nop
 8002dc0:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8002dc2:	bc08      	pop	{r3}
 8002dc4:	469e      	mov	lr, r3
 8002dc6:	4770      	bx	lr