STM32F103_RGB_Controller_Bootloader.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00002bec 080001e4 080001e4 000101e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000001b0 08002dd0 08002dd0 00012dd0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08002f80 08002f80 00012f80 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08002f84 08002f84 00012f84 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000074 20000000 08002f88 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00000214 20000078 08002ffc 00020078 2**3 ALLOC 7 ._user_heap_stack 00000600 2000028c 08002ffc 0002028c 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00020074 2**0 CONTENTS, READONLY 9 .debug_info 0001592a 00000000 00000000 0002009d 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00002f0b 00000000 00000000 000359c7 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 00007358 00000000 00000000 000388d2 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000a08 00000000 00000000 0003fc30 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00000d98 00000000 00000000 00040638 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00006123 00000000 00000000 000413d0 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00003f6c 00000000 00000000 000474f3 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0004b45f 2**0 CONTENTS, READONLY 17 .debug_frame 00002518 00000000 00000000 0004b4dc 2**2 CONTENTS, READONLY, DEBUGGING 18 .stab 00000084 00000000 00000000 0004d9f4 2**2 CONTENTS, READONLY, DEBUGGING 19 .stabstr 00000117 00000000 00000000 0004da78 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001e4 <__do_global_dtors_aux>: 80001e4: b510 push {r4, lr} 80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>) 80001e8: 7823 ldrb r3, [r4, #0] 80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16> 80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>) 80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12> 80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>) 80001f2: f3af 8000 nop.w 80001f6: 2301 movs r3, #1 80001f8: 7023 strb r3, [r4, #0] 80001fa: bd10 pop {r4, pc} 80001fc: 20000078 .word 0x20000078 8000200: 00000000 .word 0x00000000 8000204: 08002db8 .word 0x08002db8 08000208 : 8000208: b508 push {r3, lr} 800020a: 4b03 ldr r3, [pc, #12] ; (8000218 ) 800020c: b11b cbz r3, 8000216 800020e: 4903 ldr r1, [pc, #12] ; (800021c ) 8000210: 4803 ldr r0, [pc, #12] ; (8000220 ) 8000212: f3af 8000 nop.w 8000216: bd08 pop {r3, pc} 8000218: 00000000 .word 0x00000000 800021c: 2000007c .word 0x2000007c 8000220: 08002db8 .word 0x08002db8 08000224 <__aeabi_llsr>: 8000224: 40d0 lsrs r0, r2 8000226: 1c0b adds r3, r1, #0 8000228: 40d1 lsrs r1, r2 800022a: 469c mov ip, r3 800022c: 3a20 subs r2, #32 800022e: 40d3 lsrs r3, r2 8000230: 4318 orrs r0, r3 8000232: 4252 negs r2, r2 8000234: 4663 mov r3, ip 8000236: 4093 lsls r3, r2 8000238: 4318 orrs r0, r3 800023a: 4770 bx lr 0800023c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800023c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800023e: 4b0e ldr r3, [pc, #56] ; (8000278 ) { 8000240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000242: 7818 ldrb r0, [r3, #0] 8000244: f44f 737a mov.w r3, #1000 ; 0x3e8 8000248: fbb3 f3f0 udiv r3, r3, r0 800024c: 4a0b ldr r2, [pc, #44] ; (800027c ) 800024e: 6810 ldr r0, [r2, #0] 8000250: fbb0 f0f3 udiv r0, r0, r3 8000254: f000 f89e bl 8000394 8000258: 4604 mov r4, r0 800025a: b958 cbnz r0, 8000274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800025c: 2d0f cmp r5, #15 800025e: d809 bhi.n 8000274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000260: 4602 mov r2, r0 8000262: 4629 mov r1, r5 8000264: f04f 30ff mov.w r0, #4294967295 8000268: f000 f854 bl 8000314 uwTickPrio = TickPriority; 800026c: 4b04 ldr r3, [pc, #16] ; (8000280 ) 800026e: 4620 mov r0, r4 8000270: 601d str r5, [r3, #0] 8000272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000276: bd38 pop {r3, r4, r5, pc} 8000278: 20000000 .word 0x20000000 800027c: 2000000c .word 0x2000000c 8000280: 20000004 .word 0x20000004 08000284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000284: 4a07 ldr r2, [pc, #28] ; (80002a4 ) { 8000286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800028a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800028c: f043 0310 orr.w r3, r3, #16 8000290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8000292: f000 f82d bl 80002f0 HAL_InitTick(TICK_INT_PRIORITY); 8000296: 2000 movs r0, #0 8000298: f7ff ffd0 bl 800023c HAL_MspInit(); 800029c: f001 fc30 bl 8001b00 } 80002a0: 2000 movs r0, #0 80002a2: bd08 pop {r3, pc} 80002a4: 40022000 .word 0x40022000 080002a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80002a8: 4a03 ldr r2, [pc, #12] ; (80002b8 ) 80002aa: 4b04 ldr r3, [pc, #16] ; (80002bc ) 80002ac: 6811 ldr r1, [r2, #0] 80002ae: 781b ldrb r3, [r3, #0] 80002b0: 440b add r3, r1 80002b2: 6013 str r3, [r2, #0] 80002b4: 4770 bx lr 80002b6: bf00 nop 80002b8: 200000d0 .word 0x200000d0 80002bc: 20000000 .word 0x20000000 080002c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80002c0: 4b01 ldr r3, [pc, #4] ; (80002c8 ) 80002c2: 6818 ldr r0, [r3, #0] } 80002c4: 4770 bx lr 80002c6: bf00 nop 80002c8: 200000d0 .word 0x200000d0 080002cc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80002cc: b538 push {r3, r4, r5, lr} 80002ce: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80002d0: f7ff fff6 bl 80002c0 80002d4: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80002d6: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80002d8: bf1e ittt ne 80002da: 4b04 ldrne r3, [pc, #16] ; (80002ec ) 80002dc: 781b ldrbne r3, [r3, #0] 80002de: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80002e0: f7ff ffee bl 80002c0 80002e4: 1b40 subs r0, r0, r5 80002e6: 4284 cmp r4, r0 80002e8: d8fa bhi.n 80002e0 { } } 80002ea: bd38 pop {r3, r4, r5, pc} 80002ec: 20000000 .word 0x20000000 080002f0 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80002f0: 4a07 ldr r2, [pc, #28] ; (8000310 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002f2: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80002f4: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002f6: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80002fa: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80002fe: 041b lsls r3, r3, #16 8000300: 0c1b lsrs r3, r3, #16 8000302: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8000306: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800030a: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 800030c: 60d3 str r3, [r2, #12] 800030e: 4770 bx lr 8000310: e000ed00 .word 0xe000ed00 08000314 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8000314: 4b17 ldr r3, [pc, #92] ; (8000374 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8000316: b530 push {r4, r5, lr} 8000318: 68dc ldr r4, [r3, #12] 800031a: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800031e: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000322: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000324: 2b04 cmp r3, #4 8000326: bf28 it cs 8000328: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800032a: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800032c: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000330: bf98 it ls 8000332: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000334: fa05 f303 lsl.w r3, r5, r3 8000338: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800033c: bf88 it hi 800033e: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000340: 4019 ands r1, r3 8000342: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000344: fa05 f404 lsl.w r4, r5, r4 8000348: 3c01 subs r4, #1 800034a: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 800034c: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800034e: ea42 0201 orr.w r2, r2, r1 8000352: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000356: bfaf iteee ge 8000358: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800035c: 4b06 ldrlt r3, [pc, #24] ; (8000378 ) 800035e: f000 000f andlt.w r0, r0, #15 8000362: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000364: bfa5 ittet ge 8000366: b2d2 uxtbge r2, r2 8000368: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800036c: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800036e: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8000372: bd30 pop {r4, r5, pc} 8000374: e000ed00 .word 0xe000ed00 8000378: e000ed14 .word 0xe000ed14 0800037c : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 800037c: 2301 movs r3, #1 800037e: 0942 lsrs r2, r0, #5 8000380: f000 001f and.w r0, r0, #31 8000384: fa03 f000 lsl.w r0, r3, r0 8000388: 4b01 ldr r3, [pc, #4] ; (8000390 ) 800038a: f843 0022 str.w r0, [r3, r2, lsl #2] 800038e: 4770 bx lr 8000390: e000e100 .word 0xe000e100 08000394 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000394: 3801 subs r0, #1 8000396: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 800039a: d20a bcs.n 80003b2 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800039c: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800039e: 4b06 ldr r3, [pc, #24] ; (80003b8 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80003a0: 4a06 ldr r2, [pc, #24] ; (80003bc ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80003a2: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80003a4: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80003a8: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80003aa: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80003ac: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80003ae: 601a str r2, [r3, #0] 80003b0: 4770 bx lr return (1UL); /* Reload value impossible */ 80003b2: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80003b4: 4770 bx lr 80003b6: bf00 nop 80003b8: e000e010 .word 0xe000e010 80003bc: e000ed00 .word 0xe000ed00 080003c0 : */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { HAL_StatusTypeDef status = HAL_OK; if(HAL_DMA_STATE_BUSY != hdma->State) 80003c0: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80003c4: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80003c6: 2b02 cmp r3, #2 80003c8: d003 beq.n 80003d2 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80003ca: 2304 movs r3, #4 80003cc: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80003ce: 2001 movs r0, #1 80003d0: bd10 pop {r4, pc} } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80003d2: 6803 ldr r3, [r0, #0] 80003d4: 681a ldr r2, [r3, #0] 80003d6: f022 020e bic.w r2, r2, #14 80003da: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80003dc: 681a ldr r2, [r3, #0] 80003de: f022 0201 bic.w r2, r2, #1 80003e2: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80003e4: 4a29 ldr r2, [pc, #164] ; (800048c ) 80003e6: 4293 cmp r3, r2 80003e8: d924 bls.n 8000434 80003ea: f502 7262 add.w r2, r2, #904 ; 0x388 80003ee: 4293 cmp r3, r2 80003f0: d019 beq.n 8000426 80003f2: 3214 adds r2, #20 80003f4: 4293 cmp r3, r2 80003f6: d018 beq.n 800042a 80003f8: 3214 adds r2, #20 80003fa: 4293 cmp r3, r2 80003fc: d017 beq.n 800042e 80003fe: 3214 adds r2, #20 8000400: 4293 cmp r3, r2 8000402: bf0c ite eq 8000404: f44f 5380 moveq.w r3, #4096 ; 0x1000 8000408: f44f 3380 movne.w r3, #65536 ; 0x10000 800040c: 4a20 ldr r2, [pc, #128] ; (8000490 ) 800040e: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8000410: 2301 movs r3, #1 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8000412: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8000414: f880 3021 strb.w r3, [r0, #33] ; 0x21 /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8000418: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 800041a: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 800041e: b39b cbz r3, 8000488 { hdma->XferAbortCallback(hdma); 8000420: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8000422: 4620 mov r0, r4 8000424: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8000426: 2301 movs r3, #1 8000428: e7f0 b.n 800040c 800042a: 2310 movs r3, #16 800042c: e7ee b.n 800040c 800042e: f44f 7380 mov.w r3, #256 ; 0x100 8000432: e7eb b.n 800040c 8000434: 4917 ldr r1, [pc, #92] ; (8000494 ) 8000436: 428b cmp r3, r1 8000438: d016 beq.n 8000468 800043a: 3114 adds r1, #20 800043c: 428b cmp r3, r1 800043e: d015 beq.n 800046c 8000440: 3114 adds r1, #20 8000442: 428b cmp r3, r1 8000444: d014 beq.n 8000470 8000446: 3114 adds r1, #20 8000448: 428b cmp r3, r1 800044a: d014 beq.n 8000476 800044c: 3114 adds r1, #20 800044e: 428b cmp r3, r1 8000450: d014 beq.n 800047c 8000452: 3114 adds r1, #20 8000454: 428b cmp r3, r1 8000456: d014 beq.n 8000482 8000458: 4293 cmp r3, r2 800045a: bf14 ite ne 800045c: f44f 3380 movne.w r3, #65536 ; 0x10000 8000460: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8000464: 4a0c ldr r2, [pc, #48] ; (8000498 ) 8000466: e7d2 b.n 800040e 8000468: 2301 movs r3, #1 800046a: e7fb b.n 8000464 800046c: 2310 movs r3, #16 800046e: e7f9 b.n 8000464 8000470: f44f 7380 mov.w r3, #256 ; 0x100 8000474: e7f6 b.n 8000464 8000476: f44f 5380 mov.w r3, #4096 ; 0x1000 800047a: e7f3 b.n 8000464 800047c: f44f 3380 mov.w r3, #65536 ; 0x10000 8000480: e7f0 b.n 8000464 8000482: f44f 1380 mov.w r3, #1048576 ; 0x100000 8000486: e7ed b.n 8000464 HAL_StatusTypeDef status = HAL_OK; 8000488: 4618 mov r0, r3 } } return status; } 800048a: bd10 pop {r4, pc} 800048c: 40020080 .word 0x40020080 8000490: 40020400 .word 0x40020400 8000494: 40020008 .word 0x40020008 8000498: 40020000 .word 0x40020000 0800049c : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800049c: 4a11 ldr r2, [pc, #68] ; (80004e4 ) 800049e: 68d3 ldr r3, [r2, #12] 80004a0: f013 0310 ands.w r3, r3, #16 80004a4: d005 beq.n 80004b2 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 80004a6: 4910 ldr r1, [pc, #64] ; (80004e8 ) 80004a8: 69cb ldr r3, [r1, #28] 80004aa: f043 0302 orr.w r3, r3, #2 80004ae: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 80004b0: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80004b2: 68d2 ldr r2, [r2, #12] 80004b4: 0750 lsls r0, r2, #29 80004b6: d506 bpl.n 80004c6 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80004b8: 490b ldr r1, [pc, #44] ; (80004e8 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 80004ba: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80004be: 69ca ldr r2, [r1, #28] 80004c0: f042 0201 orr.w r2, r2, #1 80004c4: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 80004c6: 4a07 ldr r2, [pc, #28] ; (80004e4 ) 80004c8: 69d1 ldr r1, [r2, #28] 80004ca: 07c9 lsls r1, r1, #31 80004cc: d508 bpl.n 80004e0 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 80004ce: 4806 ldr r0, [pc, #24] ; (80004e8 ) 80004d0: 69c1 ldr r1, [r0, #28] 80004d2: f041 0104 orr.w r1, r1, #4 80004d6: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 80004d8: 69d1 ldr r1, [r2, #28] 80004da: f021 0101 bic.w r1, r1, #1 80004de: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 80004e0: 60d3 str r3, [r2, #12] 80004e2: 4770 bx lr 80004e4: 40022000 .word 0x40022000 80004e8: 200000d8 .word 0x200000d8 080004ec : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80004ec: 4b06 ldr r3, [pc, #24] ; (8000508 ) 80004ee: 6918 ldr r0, [r3, #16] 80004f0: f010 0080 ands.w r0, r0, #128 ; 0x80 80004f4: d007 beq.n 8000506 WRITE_REG(FLASH->KEYR, FLASH_KEY1); 80004f6: 4a05 ldr r2, [pc, #20] ; (800050c ) 80004f8: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 80004fa: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 80004fe: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000500: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8000502: f3c0 10c0 ubfx r0, r0, #7, #1 } 8000506: 4770 bx lr 8000508: 40022000 .word 0x40022000 800050c: 45670123 .word 0x45670123 08000510 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8000510: 4a03 ldr r2, [pc, #12] ; (8000520 ) } 8000512: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8000514: 6913 ldr r3, [r2, #16] 8000516: f043 0380 orr.w r3, r3, #128 ; 0x80 800051a: 6113 str r3, [r2, #16] } 800051c: 4770 bx lr 800051e: bf00 nop 8000520: 40022000 .word 0x40022000 08000524 : { 8000524: b5f8 push {r3, r4, r5, r6, r7, lr} 8000526: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 8000528: f7ff feca bl 80002c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 800052c: 4c11 ldr r4, [pc, #68] ; (8000574 ) uint32_t tickstart = HAL_GetTick(); 800052e: 4607 mov r7, r0 8000530: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8000532: 68e3 ldr r3, [r4, #12] 8000534: 07d8 lsls r0, r3, #31 8000536: d412 bmi.n 800055e if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8000538: 68e3 ldr r3, [r4, #12] 800053a: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 800053c: bf44 itt mi 800053e: 2320 movmi r3, #32 8000540: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8000542: 68eb ldr r3, [r5, #12] 8000544: 06da lsls r2, r3, #27 8000546: d406 bmi.n 8000556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8000548: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 800054a: 07db lsls r3, r3, #31 800054c: d403 bmi.n 8000556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800054e: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8000550: f010 0004 ands.w r0, r0, #4 8000554: d002 beq.n 800055c FLASH_SetErrorCode(); 8000556: f7ff ffa1 bl 800049c return HAL_ERROR; 800055a: 2001 movs r0, #1 } 800055c: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 800055e: 1c73 adds r3, r6, #1 8000560: d0e7 beq.n 8000532 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8000562: b90e cbnz r6, 8000568 return HAL_TIMEOUT; 8000564: 2003 movs r0, #3 8000566: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8000568: f7ff feaa bl 80002c0 800056c: 1bc0 subs r0, r0, r7 800056e: 4286 cmp r6, r0 8000570: d2df bcs.n 8000532 8000572: e7f7 b.n 8000564 8000574: 40022000 .word 0x40022000 08000578 : { 8000578: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 800057c: 4c1f ldr r4, [pc, #124] ; (80005fc ) { 800057e: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8000580: 7e23 ldrb r3, [r4, #24] { 8000582: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8000584: 2b01 cmp r3, #1 { 8000586: 460f mov r7, r1 8000588: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800058a: d033 beq.n 80005f4 800058c: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800058e: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8000592: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000594: f7ff ffc6 bl 8000524 if(status == HAL_OK) 8000598: bb40 cbnz r0, 80005ec if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800059a: 2d01 cmp r5, #1 800059c: d003 beq.n 80005a6 nbiterations = 4U; 800059e: 2d02 cmp r5, #2 80005a0: bf0c ite eq 80005a2: 2502 moveq r5, #2 80005a4: 2504 movne r5, #4 80005a6: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80005a8: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 80005aa: f8df b054 ldr.w fp, [pc, #84] ; 8000600 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80005ae: 0132 lsls r2, r6, #4 80005b0: 4640 mov r0, r8 80005b2: 4649 mov r1, r9 80005b4: f7ff fe36 bl 8000224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80005b8: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 80005bc: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80005c0: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 80005c2: f043 0301 orr.w r3, r3, #1 80005c6: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 80005ca: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 80005ce: f24c 3050 movw r0, #50000 ; 0xc350 80005d2: f7ff ffa7 bl 8000524 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 80005d6: f8db 3010 ldr.w r3, [fp, #16] 80005da: f023 0301 bic.w r3, r3, #1 80005de: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 80005e2: b918 cbnz r0, 80005ec 80005e4: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 80005e6: b2f3 uxtb r3, r6 80005e8: 429d cmp r5, r3 80005ea: d8e0 bhi.n 80005ae __HAL_UNLOCK(&pFlash); 80005ec: 2300 movs r3, #0 80005ee: 7623 strb r3, [r4, #24] return status; 80005f0: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 80005f4: 2002 movs r0, #2 } 80005f6: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80005fa: bf00 nop 80005fc: 200000d8 .word 0x200000d8 8000600: 40022000 .word 0x40022000 08000604 : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000604: 2200 movs r2, #0 8000606: 4b06 ldr r3, [pc, #24] ; (8000620 ) 8000608: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 800060a: 4b06 ldr r3, [pc, #24] ; (8000624 ) 800060c: 691a ldr r2, [r3, #16] 800060e: f042 0204 orr.w r2, r2, #4 8000612: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8000614: 691a ldr r2, [r3, #16] 8000616: f042 0240 orr.w r2, r2, #64 ; 0x40 800061a: 611a str r2, [r3, #16] 800061c: 4770 bx lr 800061e: bf00 nop 8000620: 200000d8 .word 0x200000d8 8000624: 40022000 .word 0x40022000 08000628 : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000628: 2200 movs r2, #0 800062a: 4b06 ldr r3, [pc, #24] ; (8000644 ) 800062c: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 800062e: 4b06 ldr r3, [pc, #24] ; (8000648 ) 8000630: 691a ldr r2, [r3, #16] 8000632: f042 0202 orr.w r2, r2, #2 8000636: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 8000638: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 800063a: 691a ldr r2, [r3, #16] 800063c: f042 0240 orr.w r2, r2, #64 ; 0x40 8000640: 611a str r2, [r3, #16] 8000642: 4770 bx lr 8000644: 200000d8 .word 0x200000d8 8000648: 40022000 .word 0x40022000 0800064c : { 800064c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 8000650: 4d23 ldr r5, [pc, #140] ; (80006e0 ) { 8000652: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 8000654: 7e2b ldrb r3, [r5, #24] { 8000656: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 8000658: 2b01 cmp r3, #1 800065a: d03d beq.n 80006d8 800065c: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 800065e: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 8000660: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000662: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000664: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000668: d113 bne.n 8000692 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800066a: f7ff ff5b bl 8000524 800066e: b120 cbz r0, 800067a HAL_StatusTypeDef status = HAL_ERROR; 8000670: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8000672: 2300 movs r3, #0 8000674: 762b strb r3, [r5, #24] return status; 8000676: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 800067a: f7ff ffc3 bl 8000604 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800067e: f24c 3050 movw r0, #50000 ; 0xc350 8000682: f7ff ff4f bl 8000524 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 8000686: 4a17 ldr r2, [pc, #92] ; (80006e4 ) 8000688: 6913 ldr r3, [r2, #16] 800068a: f023 0304 bic.w r3, r3, #4 800068e: 6113 str r3, [r2, #16] 8000690: e7ef b.n 8000672 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000692: f7ff ff47 bl 8000524 8000696: 2800 cmp r0, #0 8000698: d1ea bne.n 8000670 *PageError = 0xFFFFFFFFU; 800069a: f04f 33ff mov.w r3, #4294967295 800069e: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 80006a2: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 80006a4: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 80006a6: 4c0f ldr r4, [pc, #60] ; (80006e4 ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 80006a8: 68fa ldr r2, [r7, #12] 80006aa: 68bb ldr r3, [r7, #8] 80006ac: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 80006b0: 429e cmp r6, r3 80006b2: d2de bcs.n 8000672 FLASH_PageErase(address); 80006b4: 4630 mov r0, r6 80006b6: f7ff ffb7 bl 8000628 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80006ba: f24c 3050 movw r0, #50000 ; 0xc350 80006be: f7ff ff31 bl 8000524 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 80006c2: 6923 ldr r3, [r4, #16] 80006c4: f023 0302 bic.w r3, r3, #2 80006c8: 6123 str r3, [r4, #16] if (status != HAL_OK) 80006ca: b110 cbz r0, 80006d2 *PageError = address; 80006cc: f8c8 6000 str.w r6, [r8] break; 80006d0: e7cf b.n 8000672 address += FLASH_PAGE_SIZE) 80006d2: f506 6600 add.w r6, r6, #2048 ; 0x800 80006d6: e7e7 b.n 80006a8 __HAL_LOCK(&pFlash); 80006d8: 2002 movs r0, #2 } 80006da: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80006de: bf00 nop 80006e0: 200000d8 .word 0x200000d8 80006e4: 40022000 .word 0x40022000 080006e8 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80006e8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 80006ec: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 80006ee: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 80006f0: 4f6c ldr r7, [pc, #432] ; (80008a4 ) 80006f2: 4b6d ldr r3, [pc, #436] ; (80008a8 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80006f4: f8df e1b8 ldr.w lr, [pc, #440] ; 80008b0 switch (GPIO_Init->Mode) 80006f8: f8df c1b8 ldr.w ip, [pc, #440] ; 80008b4 ioposition = (0x01U << position); 80006fc: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8000700: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 8000702: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8000706: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 800070a: 45a0 cmp r8, r4 800070c: f040 8085 bne.w 800081a switch (GPIO_Init->Mode) 8000710: 684d ldr r5, [r1, #4] 8000712: 2d12 cmp r5, #18 8000714: f000 80b7 beq.w 8000886 8000718: f200 808d bhi.w 8000836 800071c: 2d02 cmp r5, #2 800071e: f000 80af beq.w 8000880 8000722: f200 8081 bhi.w 8000828 8000726: 2d00 cmp r5, #0 8000728: f000 8091 beq.w 800084e 800072c: 2d01 cmp r5, #1 800072e: f000 80a5 beq.w 800087c MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000732: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8000736: 2cff cmp r4, #255 ; 0xff 8000738: bf93 iteet ls 800073a: 4682 movls sl, r0 800073c: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 8000740: 3d08 subhi r5, #8 8000742: f8d0 b000 ldrls.w fp, [r0] 8000746: bf92 itee ls 8000748: 00b5 lslls r5, r6, #2 800074a: f8d0 b004 ldrhi.w fp, [r0, #4] 800074e: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000750: fa09 f805 lsl.w r8, r9, r5 8000754: ea2b 0808 bic.w r8, fp, r8 8000758: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 800075c: bf88 it hi 800075e: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000762: ea48 0505 orr.w r5, r8, r5 8000766: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 800076a: f8d1 a004 ldr.w sl, [r1, #4] 800076e: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8000772: d052 beq.n 800081a __HAL_RCC_AFIO_CLK_ENABLE(); 8000774: 69bd ldr r5, [r7, #24] 8000776: f026 0803 bic.w r8, r6, #3 800077a: f045 0501 orr.w r5, r5, #1 800077e: 61bd str r5, [r7, #24] 8000780: 69bd ldr r5, [r7, #24] 8000782: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000786: f005 0501 and.w r5, r5, #1 800078a: 9501 str r5, [sp, #4] 800078c: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000790: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8000794: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000796: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 800079a: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 800079e: fa09 f90b lsl.w r9, r9, fp 80007a2: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80007a6: 4d41 ldr r5, [pc, #260] ; (80008ac ) 80007a8: 42a8 cmp r0, r5 80007aa: d071 beq.n 8000890 80007ac: f505 6580 add.w r5, r5, #1024 ; 0x400 80007b0: 42a8 cmp r0, r5 80007b2: d06f beq.n 8000894 80007b4: f505 6580 add.w r5, r5, #1024 ; 0x400 80007b8: 42a8 cmp r0, r5 80007ba: d06d beq.n 8000898 80007bc: f505 6580 add.w r5, r5, #1024 ; 0x400 80007c0: 42a8 cmp r0, r5 80007c2: d06b beq.n 800089c 80007c4: f505 6580 add.w r5, r5, #1024 ; 0x400 80007c8: 42a8 cmp r0, r5 80007ca: d069 beq.n 80008a0 80007cc: 4570 cmp r0, lr 80007ce: bf0c ite eq 80007d0: 2505 moveq r5, #5 80007d2: 2506 movne r5, #6 80007d4: fa05 f50b lsl.w r5, r5, fp 80007d8: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 80007dc: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 80007e0: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80007e2: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 80007e6: bf14 ite ne 80007e8: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 80007ea: 43a5 biceq r5, r4 80007ec: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 80007ee: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 80007f0: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 80007f4: bf14 ite ne 80007f6: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 80007f8: 43a5 biceq r5, r4 80007fa: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 80007fc: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 80007fe: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000802: bf14 ite ne 8000804: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8000806: 43a5 biceq r5, r4 8000808: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 800080a: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 800080c: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8000810: bf14 ite ne 8000812: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8000814: ea25 0404 biceq.w r4, r5, r4 8000818: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 800081a: 3601 adds r6, #1 800081c: 2e10 cmp r6, #16 800081e: f47f af6d bne.w 80006fc } } } } } 8000822: b003 add sp, #12 8000824: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8000828: 2d03 cmp r5, #3 800082a: d025 beq.n 8000878 800082c: 2d11 cmp r5, #17 800082e: d180 bne.n 8000732 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8000830: 68ca ldr r2, [r1, #12] 8000832: 3204 adds r2, #4 break; 8000834: e77d b.n 8000732 switch (GPIO_Init->Mode) 8000836: 4565 cmp r5, ip 8000838: d009 beq.n 800084e 800083a: d812 bhi.n 8000862 800083c: f8df 9078 ldr.w r9, [pc, #120] ; 80008b8 8000840: 454d cmp r5, r9 8000842: d004 beq.n 800084e 8000844: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000848: 454d cmp r5, r9 800084a: f47f af72 bne.w 8000732 if (GPIO_Init->Pull == GPIO_NOPULL) 800084e: 688a ldr r2, [r1, #8] 8000850: b1e2 cbz r2, 800088c else if (GPIO_Init->Pull == GPIO_PULLUP) 8000852: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8000854: bf0c ite eq 8000856: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 800085a: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 800085e: 2208 movs r2, #8 8000860: e767 b.n 8000732 switch (GPIO_Init->Mode) 8000862: f8df 9058 ldr.w r9, [pc, #88] ; 80008bc 8000866: 454d cmp r5, r9 8000868: d0f1 beq.n 800084e 800086a: f509 3980 add.w r9, r9, #65536 ; 0x10000 800086e: 454d cmp r5, r9 8000870: d0ed beq.n 800084e 8000872: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8000876: e7e7 b.n 8000848 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8000878: 2200 movs r2, #0 800087a: e75a b.n 8000732 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 800087c: 68ca ldr r2, [r1, #12] break; 800087e: e758 b.n 8000732 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8000880: 68ca ldr r2, [r1, #12] 8000882: 3208 adds r2, #8 break; 8000884: e755 b.n 8000732 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8000886: 68ca ldr r2, [r1, #12] 8000888: 320c adds r2, #12 break; 800088a: e752 b.n 8000732 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 800088c: 2204 movs r2, #4 800088e: e750 b.n 8000732 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000890: 2500 movs r5, #0 8000892: e79f b.n 80007d4 8000894: 2501 movs r5, #1 8000896: e79d b.n 80007d4 8000898: 2502 movs r5, #2 800089a: e79b b.n 80007d4 800089c: 2503 movs r5, #3 800089e: e799 b.n 80007d4 80008a0: 2504 movs r5, #4 80008a2: e797 b.n 80007d4 80008a4: 40021000 .word 0x40021000 80008a8: 40010400 .word 0x40010400 80008ac: 40010800 .word 0x40010800 80008b0: 40011c00 .word 0x40011c00 80008b4: 10210000 .word 0x10210000 80008b8: 10110000 .word 0x10110000 80008bc: 10310000 .word 0x10310000 080008c0 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80008c0: b10a cbz r2, 80008c6 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 80008c2: 6101 str r1, [r0, #16] 80008c4: 4770 bx lr 80008c6: 0409 lsls r1, r1, #16 80008c8: e7fb b.n 80008c2 080008ca : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 80008ca: 68c3 ldr r3, [r0, #12] 80008cc: 4059 eors r1, r3 80008ce: 60c1 str r1, [r0, #12] 80008d0: 4770 bx lr ... 080008d4 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80008d4: 6803 ldr r3, [r0, #0] { 80008d6: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80008da: 07db lsls r3, r3, #31 { 80008dc: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80008de: d410 bmi.n 8000902 } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 80008e0: 682b ldr r3, [r5, #0] 80008e2: 079f lsls r7, r3, #30 80008e4: d45e bmi.n 80009a4 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 80008e6: 682b ldr r3, [r5, #0] 80008e8: 0719 lsls r1, r3, #28 80008ea: f100 8095 bmi.w 8000a18 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80008ee: 682b ldr r3, [r5, #0] 80008f0: 075a lsls r2, r3, #29 80008f2: f100 80bf bmi.w 8000a74 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80008f6: 69ea ldr r2, [r5, #28] 80008f8: 2a00 cmp r2, #0 80008fa: f040 812d bne.w 8000b58 { return HAL_ERROR; } } return HAL_OK; 80008fe: 2000 movs r0, #0 8000900: e014 b.n 800092c if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8000902: 4c90 ldr r4, [pc, #576] ; (8000b44 ) 8000904: 6863 ldr r3, [r4, #4] 8000906: f003 030c and.w r3, r3, #12 800090a: 2b04 cmp r3, #4 800090c: d007 beq.n 800091e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 800090e: 6863 ldr r3, [r4, #4] 8000910: f003 030c and.w r3, r3, #12 8000914: 2b08 cmp r3, #8 8000916: d10c bne.n 8000932 8000918: 6863 ldr r3, [r4, #4] 800091a: 03de lsls r6, r3, #15 800091c: d509 bpl.n 8000932 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800091e: 6823 ldr r3, [r4, #0] 8000920: 039c lsls r4, r3, #14 8000922: d5dd bpl.n 80008e0 8000924: 686b ldr r3, [r5, #4] 8000926: 2b00 cmp r3, #0 8000928: d1da bne.n 80008e0 return HAL_ERROR; 800092a: 2001 movs r0, #1 } 800092c: b002 add sp, #8 800092e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000932: 686b ldr r3, [r5, #4] 8000934: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000938: d110 bne.n 800095c 800093a: 6823 ldr r3, [r4, #0] 800093c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8000940: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000942: f7ff fcbd bl 80002c0 8000946: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000948: 6823 ldr r3, [r4, #0] 800094a: 0398 lsls r0, r3, #14 800094c: d4c8 bmi.n 80008e0 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800094e: f7ff fcb7 bl 80002c0 8000952: 1b80 subs r0, r0, r6 8000954: 2864 cmp r0, #100 ; 0x64 8000956: d9f7 bls.n 8000948 return HAL_TIMEOUT; 8000958: 2003 movs r0, #3 800095a: e7e7 b.n 800092c __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800095c: b99b cbnz r3, 8000986 800095e: 6823 ldr r3, [r4, #0] 8000960: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000964: 6023 str r3, [r4, #0] 8000966: 6823 ldr r3, [r4, #0] 8000968: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800096c: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800096e: f7ff fca7 bl 80002c0 8000972: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8000974: 6823 ldr r3, [r4, #0] 8000976: 0399 lsls r1, r3, #14 8000978: d5b2 bpl.n 80008e0 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800097a: f7ff fca1 bl 80002c0 800097e: 1b80 subs r0, r0, r6 8000980: 2864 cmp r0, #100 ; 0x64 8000982: d9f7 bls.n 8000974 8000984: e7e8 b.n 8000958 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000986: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 800098a: 6823 ldr r3, [r4, #0] 800098c: d103 bne.n 8000996 800098e: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8000992: 6023 str r3, [r4, #0] 8000994: e7d1 b.n 800093a 8000996: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800099a: 6023 str r3, [r4, #0] 800099c: 6823 ldr r3, [r4, #0] 800099e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80009a2: e7cd b.n 8000940 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80009a4: 4c67 ldr r4, [pc, #412] ; (8000b44 ) 80009a6: 6863 ldr r3, [r4, #4] 80009a8: f013 0f0c tst.w r3, #12 80009ac: d007 beq.n 80009be || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80009ae: 6863 ldr r3, [r4, #4] 80009b0: f003 030c and.w r3, r3, #12 80009b4: 2b08 cmp r3, #8 80009b6: d110 bne.n 80009da 80009b8: 6863 ldr r3, [r4, #4] 80009ba: 03da lsls r2, r3, #15 80009bc: d40d bmi.n 80009da if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80009be: 6823 ldr r3, [r4, #0] 80009c0: 079b lsls r3, r3, #30 80009c2: d502 bpl.n 80009ca 80009c4: 692b ldr r3, [r5, #16] 80009c6: 2b01 cmp r3, #1 80009c8: d1af bne.n 800092a __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80009ca: 6823 ldr r3, [r4, #0] 80009cc: 696a ldr r2, [r5, #20] 80009ce: f023 03f8 bic.w r3, r3, #248 ; 0xf8 80009d2: ea43 03c2 orr.w r3, r3, r2, lsl #3 80009d6: 6023 str r3, [r4, #0] 80009d8: e785 b.n 80008e6 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80009da: 692a ldr r2, [r5, #16] 80009dc: 4b5a ldr r3, [pc, #360] ; (8000b48 ) 80009de: b16a cbz r2, 80009fc __HAL_RCC_HSI_ENABLE(); 80009e0: 2201 movs r2, #1 80009e2: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80009e4: f7ff fc6c bl 80002c0 80009e8: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80009ea: 6823 ldr r3, [r4, #0] 80009ec: 079f lsls r7, r3, #30 80009ee: d4ec bmi.n 80009ca if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80009f0: f7ff fc66 bl 80002c0 80009f4: 1b80 subs r0, r0, r6 80009f6: 2802 cmp r0, #2 80009f8: d9f7 bls.n 80009ea 80009fa: e7ad b.n 8000958 __HAL_RCC_HSI_DISABLE(); 80009fc: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80009fe: f7ff fc5f bl 80002c0 8000a02: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8000a04: 6823 ldr r3, [r4, #0] 8000a06: 0798 lsls r0, r3, #30 8000a08: f57f af6d bpl.w 80008e6 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000a0c: f7ff fc58 bl 80002c0 8000a10: 1b80 subs r0, r0, r6 8000a12: 2802 cmp r0, #2 8000a14: d9f6 bls.n 8000a04 8000a16: e79f b.n 8000958 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8000a18: 69aa ldr r2, [r5, #24] 8000a1a: 4c4a ldr r4, [pc, #296] ; (8000b44 ) 8000a1c: 4b4b ldr r3, [pc, #300] ; (8000b4c ) 8000a1e: b1da cbz r2, 8000a58 __HAL_RCC_LSI_ENABLE(); 8000a20: 2201 movs r2, #1 8000a22: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000a24: f7ff fc4c bl 80002c0 8000a28: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8000a2a: 6a63 ldr r3, [r4, #36] ; 0x24 8000a2c: 079b lsls r3, r3, #30 8000a2e: d50d bpl.n 8000a4c * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8000a30: f44f 52fa mov.w r2, #8000 ; 0x1f40 8000a34: 4b46 ldr r3, [pc, #280] ; (8000b50 ) 8000a36: 681b ldr r3, [r3, #0] 8000a38: fbb3 f3f2 udiv r3, r3, r2 8000a3c: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8000a3e: bf00 nop do { __NOP(); } while (Delay --); 8000a40: 9b01 ldr r3, [sp, #4] 8000a42: 1e5a subs r2, r3, #1 8000a44: 9201 str r2, [sp, #4] 8000a46: 2b00 cmp r3, #0 8000a48: d1f9 bne.n 8000a3e 8000a4a: e750 b.n 80008ee if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000a4c: f7ff fc38 bl 80002c0 8000a50: 1b80 subs r0, r0, r6 8000a52: 2802 cmp r0, #2 8000a54: d9e9 bls.n 8000a2a 8000a56: e77f b.n 8000958 __HAL_RCC_LSI_DISABLE(); 8000a58: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000a5a: f7ff fc31 bl 80002c0 8000a5e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8000a60: 6a63 ldr r3, [r4, #36] ; 0x24 8000a62: 079f lsls r7, r3, #30 8000a64: f57f af43 bpl.w 80008ee if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000a68: f7ff fc2a bl 80002c0 8000a6c: 1b80 subs r0, r0, r6 8000a6e: 2802 cmp r0, #2 8000a70: d9f6 bls.n 8000a60 8000a72: e771 b.n 8000958 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8000a74: 4c33 ldr r4, [pc, #204] ; (8000b44 ) 8000a76: 69e3 ldr r3, [r4, #28] 8000a78: 00d8 lsls r0, r3, #3 8000a7a: d424 bmi.n 8000ac6 pwrclkchanged = SET; 8000a7c: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8000a7e: 69e3 ldr r3, [r4, #28] 8000a80: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8000a84: 61e3 str r3, [r4, #28] 8000a86: 69e3 ldr r3, [r4, #28] 8000a88: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8000a8c: 9300 str r3, [sp, #0] 8000a8e: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000a90: 4e30 ldr r6, [pc, #192] ; (8000b54 ) 8000a92: 6833 ldr r3, [r6, #0] 8000a94: 05d9 lsls r1, r3, #23 8000a96: d518 bpl.n 8000aca __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000a98: 68eb ldr r3, [r5, #12] 8000a9a: 2b01 cmp r3, #1 8000a9c: d126 bne.n 8000aec 8000a9e: 6a23 ldr r3, [r4, #32] 8000aa0: f043 0301 orr.w r3, r3, #1 8000aa4: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000aa6: f7ff fc0b bl 80002c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000aaa: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8000aae: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8000ab0: 6a23 ldr r3, [r4, #32] 8000ab2: 079b lsls r3, r3, #30 8000ab4: d53f bpl.n 8000b36 if(pwrclkchanged == SET) 8000ab6: 2f00 cmp r7, #0 8000ab8: f43f af1d beq.w 80008f6 __HAL_RCC_PWR_CLK_DISABLE(); 8000abc: 69e3 ldr r3, [r4, #28] 8000abe: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8000ac2: 61e3 str r3, [r4, #28] 8000ac4: e717 b.n 80008f6 FlagStatus pwrclkchanged = RESET; 8000ac6: 2700 movs r7, #0 8000ac8: e7e2 b.n 8000a90 SET_BIT(PWR->CR, PWR_CR_DBP); 8000aca: 6833 ldr r3, [r6, #0] 8000acc: f443 7380 orr.w r3, r3, #256 ; 0x100 8000ad0: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000ad2: f7ff fbf5 bl 80002c0 8000ad6: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000ad8: 6833 ldr r3, [r6, #0] 8000ada: 05da lsls r2, r3, #23 8000adc: d4dc bmi.n 8000a98 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8000ade: f7ff fbef bl 80002c0 8000ae2: eba0 0008 sub.w r0, r0, r8 8000ae6: 2864 cmp r0, #100 ; 0x64 8000ae8: d9f6 bls.n 8000ad8 8000aea: e735 b.n 8000958 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000aec: b9ab cbnz r3, 8000b1a 8000aee: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000af0: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000af4: f023 0301 bic.w r3, r3, #1 8000af8: 6223 str r3, [r4, #32] 8000afa: 6a23 ldr r3, [r4, #32] 8000afc: f023 0304 bic.w r3, r3, #4 8000b00: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000b02: f7ff fbdd bl 80002c0 8000b06: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8000b08: 6a23 ldr r3, [r4, #32] 8000b0a: 0798 lsls r0, r3, #30 8000b0c: d5d3 bpl.n 8000ab6 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000b0e: f7ff fbd7 bl 80002c0 8000b12: 1b80 subs r0, r0, r6 8000b14: 4540 cmp r0, r8 8000b16: d9f7 bls.n 8000b08 8000b18: e71e b.n 8000958 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000b1a: 2b05 cmp r3, #5 8000b1c: 6a23 ldr r3, [r4, #32] 8000b1e: d103 bne.n 8000b28 8000b20: f043 0304 orr.w r3, r3, #4 8000b24: 6223 str r3, [r4, #32] 8000b26: e7ba b.n 8000a9e 8000b28: f023 0301 bic.w r3, r3, #1 8000b2c: 6223 str r3, [r4, #32] 8000b2e: 6a23 ldr r3, [r4, #32] 8000b30: f023 0304 bic.w r3, r3, #4 8000b34: e7b6 b.n 8000aa4 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000b36: f7ff fbc3 bl 80002c0 8000b3a: eba0 0008 sub.w r0, r0, r8 8000b3e: 42b0 cmp r0, r6 8000b40: d9b6 bls.n 8000ab0 8000b42: e709 b.n 8000958 8000b44: 40021000 .word 0x40021000 8000b48: 42420000 .word 0x42420000 8000b4c: 42420480 .word 0x42420480 8000b50: 2000000c .word 0x2000000c 8000b54: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000b58: 4c22 ldr r4, [pc, #136] ; (8000be4 ) 8000b5a: 6863 ldr r3, [r4, #4] 8000b5c: f003 030c and.w r3, r3, #12 8000b60: 2b08 cmp r3, #8 8000b62: f43f aee2 beq.w 800092a 8000b66: 2300 movs r3, #0 8000b68: 4e1f ldr r6, [pc, #124] ; (8000be8 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000b6a: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8000b6c: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000b6e: d12b bne.n 8000bc8 tickstart = HAL_GetTick(); 8000b70: f7ff fba6 bl 80002c0 8000b74: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000b76: 6823 ldr r3, [r4, #0] 8000b78: 0199 lsls r1, r3, #6 8000b7a: d41f bmi.n 8000bbc if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8000b7c: 6a2b ldr r3, [r5, #32] 8000b7e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000b82: d105 bne.n 8000b90 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8000b84: 6862 ldr r2, [r4, #4] 8000b86: 68a9 ldr r1, [r5, #8] 8000b88: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8000b8c: 430a orrs r2, r1 8000b8e: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8000b90: 6a69 ldr r1, [r5, #36] ; 0x24 8000b92: 6862 ldr r2, [r4, #4] 8000b94: 430b orrs r3, r1 8000b96: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8000b9a: 4313 orrs r3, r2 8000b9c: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8000b9e: 2301 movs r3, #1 8000ba0: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000ba2: f7ff fb8d bl 80002c0 8000ba6: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000ba8: 6823 ldr r3, [r4, #0] 8000baa: 019a lsls r2, r3, #6 8000bac: f53f aea7 bmi.w 80008fe if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000bb0: f7ff fb86 bl 80002c0 8000bb4: 1b40 subs r0, r0, r5 8000bb6: 2802 cmp r0, #2 8000bb8: d9f6 bls.n 8000ba8 8000bba: e6cd b.n 8000958 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000bbc: f7ff fb80 bl 80002c0 8000bc0: 1bc0 subs r0, r0, r7 8000bc2: 2802 cmp r0, #2 8000bc4: d9d7 bls.n 8000b76 8000bc6: e6c7 b.n 8000958 tickstart = HAL_GetTick(); 8000bc8: f7ff fb7a bl 80002c0 8000bcc: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000bce: 6823 ldr r3, [r4, #0] 8000bd0: 019b lsls r3, r3, #6 8000bd2: f57f ae94 bpl.w 80008fe if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000bd6: f7ff fb73 bl 80002c0 8000bda: 1b40 subs r0, r0, r5 8000bdc: 2802 cmp r0, #2 8000bde: d9f6 bls.n 8000bce 8000be0: e6ba b.n 8000958 8000be2: bf00 nop 8000be4: 40021000 .word 0x40021000 8000be8: 42420060 .word 0x42420060 08000bec : { 8000bec: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000bee: 4b19 ldr r3, [pc, #100] ; (8000c54 ) { 8000bf0: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000bf2: ac02 add r4, sp, #8 8000bf4: f103 0510 add.w r5, r3, #16 8000bf8: 4622 mov r2, r4 8000bfa: 6818 ldr r0, [r3, #0] 8000bfc: 6859 ldr r1, [r3, #4] 8000bfe: 3308 adds r3, #8 8000c00: c203 stmia r2!, {r0, r1} 8000c02: 42ab cmp r3, r5 8000c04: 4614 mov r4, r2 8000c06: d1f7 bne.n 8000bf8 const uint8_t aPredivFactorTable[2] = {1, 2}; 8000c08: 2301 movs r3, #1 8000c0a: f88d 3004 strb.w r3, [sp, #4] 8000c0e: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8000c10: 4911 ldr r1, [pc, #68] ; (8000c58 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8000c12: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8000c16: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8000c18: f003 020c and.w r2, r3, #12 8000c1c: 2a08 cmp r2, #8 8000c1e: d117 bne.n 8000c50 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000c20: f3c3 4283 ubfx r2, r3, #18, #4 8000c24: a806 add r0, sp, #24 8000c26: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000c28: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000c2a: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000c2e: d50c bpl.n 8000c4a prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000c30: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000c32: 480a ldr r0, [pc, #40] ; (8000c5c ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000c34: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000c38: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000c3a: aa06 add r2, sp, #24 8000c3c: 4413 add r3, r2 8000c3e: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000c42: fbb0 f0f3 udiv r0, r0, r3 } 8000c46: b007 add sp, #28 8000c48: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8000c4a: 4805 ldr r0, [pc, #20] ; (8000c60 ) 8000c4c: 4350 muls r0, r2 8000c4e: e7fa b.n 8000c46 sysclockfreq = HSE_VALUE; 8000c50: 4802 ldr r0, [pc, #8] ; (8000c5c ) return sysclockfreq; 8000c52: e7f8 b.n 8000c46 8000c54: 08002dd0 .word 0x08002dd0 8000c58: 40021000 .word 0x40021000 8000c5c: 007a1200 .word 0x007a1200 8000c60: 003d0900 .word 0x003d0900 08000c64 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000c64: 4a54 ldr r2, [pc, #336] ; (8000db8 ) { 8000c66: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000c6a: 6813 ldr r3, [r2, #0] { 8000c6c: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000c6e: f003 0307 and.w r3, r3, #7 8000c72: 428b cmp r3, r1 { 8000c74: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000c76: d32a bcc.n 8000cce if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8000c78: 6829 ldr r1, [r5, #0] 8000c7a: 078c lsls r4, r1, #30 8000c7c: d434 bmi.n 8000ce8 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8000c7e: 07ca lsls r2, r1, #31 8000c80: d447 bmi.n 8000d12 if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8000c82: 4a4d ldr r2, [pc, #308] ; (8000db8 ) 8000c84: 6813 ldr r3, [r2, #0] 8000c86: f003 0307 and.w r3, r3, #7 8000c8a: 429e cmp r6, r3 8000c8c: f0c0 8082 bcc.w 8000d94 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000c90: 682a ldr r2, [r5, #0] 8000c92: 4c4a ldr r4, [pc, #296] ; (8000dbc ) 8000c94: f012 0f04 tst.w r2, #4 8000c98: f040 8087 bne.w 8000daa if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000c9c: 0713 lsls r3, r2, #28 8000c9e: d506 bpl.n 8000cae MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8000ca0: 6863 ldr r3, [r4, #4] 8000ca2: 692a ldr r2, [r5, #16] 8000ca4: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8000ca8: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000cac: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8000cae: f7ff ff9d bl 8000bec 8000cb2: 6863 ldr r3, [r4, #4] 8000cb4: 4a42 ldr r2, [pc, #264] ; (8000dc0 ) 8000cb6: f3c3 1303 ubfx r3, r3, #4, #4 8000cba: 5cd3 ldrb r3, [r2, r3] 8000cbc: 40d8 lsrs r0, r3 8000cbe: 4b41 ldr r3, [pc, #260] ; (8000dc4 ) 8000cc0: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8000cc2: 2000 movs r0, #0 8000cc4: f7ff faba bl 800023c return HAL_OK; 8000cc8: 2000 movs r0, #0 } 8000cca: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8000cce: 6813 ldr r3, [r2, #0] 8000cd0: f023 0307 bic.w r3, r3, #7 8000cd4: 430b orrs r3, r1 8000cd6: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8000cd8: 6813 ldr r3, [r2, #0] 8000cda: f003 0307 and.w r3, r3, #7 8000cde: 4299 cmp r1, r3 8000ce0: d0ca beq.n 8000c78 return HAL_ERROR; 8000ce2: 2001 movs r0, #1 8000ce4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8000ce8: 4b34 ldr r3, [pc, #208] ; (8000dbc ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000cea: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8000cee: bf1e ittt ne 8000cf0: 685a ldrne r2, [r3, #4] 8000cf2: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8000cf6: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000cf8: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8000cfa: bf42 ittt mi 8000cfc: 685a ldrmi r2, [r3, #4] 8000cfe: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8000d02: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8000d04: 685a ldr r2, [r3, #4] 8000d06: 68a8 ldr r0, [r5, #8] 8000d08: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8000d0c: 4302 orrs r2, r0 8000d0e: 605a str r2, [r3, #4] 8000d10: e7b5 b.n 8000c7e if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000d12: 686a ldr r2, [r5, #4] 8000d14: 4c29 ldr r4, [pc, #164] ; (8000dbc ) 8000d16: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000d18: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000d1a: d11c bne.n 8000d56 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000d1c: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000d20: d0df beq.n 8000ce2 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000d22: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000d24: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000d28: f023 0303 bic.w r3, r3, #3 8000d2c: 4313 orrs r3, r2 8000d2e: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8000d30: f7ff fac6 bl 80002c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000d34: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 8000d36: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000d38: 2b01 cmp r3, #1 8000d3a: d114 bne.n 8000d66 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8000d3c: 6863 ldr r3, [r4, #4] 8000d3e: f003 030c and.w r3, r3, #12 8000d42: 2b04 cmp r3, #4 8000d44: d09d beq.n 8000c82 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000d46: f7ff fabb bl 80002c0 8000d4a: 1bc0 subs r0, r0, r7 8000d4c: 4540 cmp r0, r8 8000d4e: d9f5 bls.n 8000d3c return HAL_TIMEOUT; 8000d50: 2003 movs r0, #3 8000d52: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8000d56: 2a02 cmp r2, #2 8000d58: d102 bne.n 8000d60 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000d5a: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8000d5e: e7df b.n 8000d20 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000d60: f013 0f02 tst.w r3, #2 8000d64: e7dc b.n 8000d20 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8000d66: 2b02 cmp r3, #2 8000d68: d10f bne.n 8000d8a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000d6a: 6863 ldr r3, [r4, #4] 8000d6c: f003 030c and.w r3, r3, #12 8000d70: 2b08 cmp r3, #8 8000d72: d086 beq.n 8000c82 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000d74: f7ff faa4 bl 80002c0 8000d78: 1bc0 subs r0, r0, r7 8000d7a: 4540 cmp r0, r8 8000d7c: d9f5 bls.n 8000d6a 8000d7e: e7e7 b.n 8000d50 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000d80: f7ff fa9e bl 80002c0 8000d84: 1bc0 subs r0, r0, r7 8000d86: 4540 cmp r0, r8 8000d88: d8e2 bhi.n 8000d50 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8000d8a: 6863 ldr r3, [r4, #4] 8000d8c: f013 0f0c tst.w r3, #12 8000d90: d1f6 bne.n 8000d80 8000d92: e776 b.n 8000c82 __HAL_FLASH_SET_LATENCY(FLatency); 8000d94: 6813 ldr r3, [r2, #0] 8000d96: f023 0307 bic.w r3, r3, #7 8000d9a: 4333 orrs r3, r6 8000d9c: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8000d9e: 6813 ldr r3, [r2, #0] 8000da0: f003 0307 and.w r3, r3, #7 8000da4: 429e cmp r6, r3 8000da6: d19c bne.n 8000ce2 8000da8: e772 b.n 8000c90 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8000daa: 6863 ldr r3, [r4, #4] 8000dac: 68e9 ldr r1, [r5, #12] 8000dae: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8000db2: 430b orrs r3, r1 8000db4: 6063 str r3, [r4, #4] 8000db6: e771 b.n 8000c9c 8000db8: 40022000 .word 0x40022000 8000dbc: 40021000 .word 0x40021000 8000dc0: 08002ece .word 0x08002ece 8000dc4: 2000000c .word 0x2000000c 08000dc8 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8000dc8: 4b04 ldr r3, [pc, #16] ; (8000ddc ) 8000dca: 4a05 ldr r2, [pc, #20] ; (8000de0 ) 8000dcc: 685b ldr r3, [r3, #4] 8000dce: f3c3 2302 ubfx r3, r3, #8, #3 8000dd2: 5cd3 ldrb r3, [r2, r3] 8000dd4: 4a03 ldr r2, [pc, #12] ; (8000de4 ) 8000dd6: 6810 ldr r0, [r2, #0] } 8000dd8: 40d8 lsrs r0, r3 8000dda: 4770 bx lr 8000ddc: 40021000 .word 0x40021000 8000de0: 08002ede .word 0x08002ede 8000de4: 2000000c .word 0x2000000c 08000de8 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8000de8: 4b04 ldr r3, [pc, #16] ; (8000dfc ) 8000dea: 4a05 ldr r2, [pc, #20] ; (8000e00 ) 8000dec: 685b ldr r3, [r3, #4] 8000dee: f3c3 23c2 ubfx r3, r3, #11, #3 8000df2: 5cd3 ldrb r3, [r2, r3] 8000df4: 4a03 ldr r2, [pc, #12] ; (8000e04 ) 8000df6: 6810 ldr r0, [r2, #0] } 8000df8: 40d8 lsrs r0, r3 8000dfa: 4770 bx lr 8000dfc: 40021000 .word 0x40021000 8000e00: 08002ede .word 0x08002ede 8000e04: 2000000c .word 0x2000000c 08000e08 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8000e08: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 8000e0a: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8000e0c: 68da ldr r2, [r3, #12] 8000e0e: f042 0201 orr.w r2, r2, #1 8000e12: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 8000e14: 681a ldr r2, [r3, #0] 8000e16: f042 0201 orr.w r2, r2, #1 8000e1a: 601a str r2, [r3, #0] } 8000e1c: 4770 bx lr 08000e1e : 8000e1e: 4770 bx lr 08000e20 : 8000e20: 4770 bx lr 08000e22 : 8000e22: 4770 bx lr 08000e24 : 8000e24: 4770 bx lr 08000e26 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8000e26: 6803 ldr r3, [r0, #0] { 8000e28: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8000e2a: 691a ldr r2, [r3, #16] { 8000e2c: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8000e2e: 0791 lsls r1, r2, #30 8000e30: d50e bpl.n 8000e50 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 8000e32: 68da ldr r2, [r3, #12] 8000e34: 0792 lsls r2, r2, #30 8000e36: d50b bpl.n 8000e50 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 8000e38: f06f 0202 mvn.w r2, #2 8000e3c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8000e3e: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8000e40: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8000e42: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8000e44: 079b lsls r3, r3, #30 8000e46: d077 beq.n 8000f38 { HAL_TIM_IC_CaptureCallback(htim); 8000e48: f7ff ffea bl 8000e20 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8000e4c: 2300 movs r3, #0 8000e4e: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8000e50: 6823 ldr r3, [r4, #0] 8000e52: 691a ldr r2, [r3, #16] 8000e54: 0750 lsls r0, r2, #29 8000e56: d510 bpl.n 8000e7a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8000e58: 68da ldr r2, [r3, #12] 8000e5a: 0751 lsls r1, r2, #29 8000e5c: d50d bpl.n 8000e7a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8000e5e: f06f 0204 mvn.w r2, #4 8000e62: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8000e64: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8000e66: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8000e68: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8000e6a: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8000e6e: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8000e70: d068 beq.n 8000f44 HAL_TIM_IC_CaptureCallback(htim); 8000e72: f7ff ffd5 bl 8000e20 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8000e76: 2300 movs r3, #0 8000e78: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8000e7a: 6823 ldr r3, [r4, #0] 8000e7c: 691a ldr r2, [r3, #16] 8000e7e: 0712 lsls r2, r2, #28 8000e80: d50f bpl.n 8000ea2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8000e82: 68da ldr r2, [r3, #12] 8000e84: 0710 lsls r0, r2, #28 8000e86: d50c bpl.n 8000ea2 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8000e88: f06f 0208 mvn.w r2, #8 8000e8c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8000e8e: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8000e90: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8000e92: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8000e94: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8000e96: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8000e98: d05a beq.n 8000f50 HAL_TIM_IC_CaptureCallback(htim); 8000e9a: f7ff ffc1 bl 8000e20 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8000e9e: 2300 movs r3, #0 8000ea0: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8000ea2: 6823 ldr r3, [r4, #0] 8000ea4: 691a ldr r2, [r3, #16] 8000ea6: 06d2 lsls r2, r2, #27 8000ea8: d510 bpl.n 8000ecc { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8000eaa: 68da ldr r2, [r3, #12] 8000eac: 06d0 lsls r0, r2, #27 8000eae: d50d bpl.n 8000ecc { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8000eb0: f06f 0210 mvn.w r2, #16 8000eb4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8000eb6: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8000eb8: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8000eba: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8000ebc: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8000ec0: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8000ec2: d04b beq.n 8000f5c HAL_TIM_IC_CaptureCallback(htim); 8000ec4: f7ff ffac bl 8000e20 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8000ec8: 2300 movs r3, #0 8000eca: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8000ecc: 6823 ldr r3, [r4, #0] 8000ece: 691a ldr r2, [r3, #16] 8000ed0: 07d1 lsls r1, r2, #31 8000ed2: d508 bpl.n 8000ee6 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8000ed4: 68da ldr r2, [r3, #12] 8000ed6: 07d2 lsls r2, r2, #31 8000ed8: d505 bpl.n 8000ee6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8000eda: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8000ede: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8000ee0: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8000ee2: f000 fb67 bl 80015b4 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8000ee6: 6823 ldr r3, [r4, #0] 8000ee8: 691a ldr r2, [r3, #16] 8000eea: 0610 lsls r0, r2, #24 8000eec: d508 bpl.n 8000f00 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 8000eee: 68da ldr r2, [r3, #12] 8000ef0: 0611 lsls r1, r2, #24 8000ef2: d505 bpl.n 8000f00 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8000ef4: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8000ef8: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8000efa: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 8000efc: f000 f8bf bl 800107e } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8000f00: 6823 ldr r3, [r4, #0] 8000f02: 691a ldr r2, [r3, #16] 8000f04: 0652 lsls r2, r2, #25 8000f06: d508 bpl.n 8000f1a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8000f08: 68da ldr r2, [r3, #12] 8000f0a: 0650 lsls r0, r2, #25 8000f0c: d505 bpl.n 8000f1a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8000f0e: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 8000f12: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8000f14: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 8000f16: f7ff ff85 bl 8000e24 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 8000f1a: 6823 ldr r3, [r4, #0] 8000f1c: 691a ldr r2, [r3, #16] 8000f1e: 0691 lsls r1, r2, #26 8000f20: d522 bpl.n 8000f68 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 8000f22: 68da ldr r2, [r3, #12] 8000f24: 0692 lsls r2, r2, #26 8000f26: d51f bpl.n 8000f68 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8000f28: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 8000f2c: 4620 mov r0, r4 } } } 8000f2e: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8000f32: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 8000f34: f000 b8a2 b.w 800107c HAL_TIM_OC_DelayElapsedCallback(htim); 8000f38: f7ff ff71 bl 8000e1e HAL_TIM_PWM_PulseFinishedCallback(htim); 8000f3c: 4620 mov r0, r4 8000f3e: f7ff ff70 bl 8000e22 8000f42: e783 b.n 8000e4c HAL_TIM_OC_DelayElapsedCallback(htim); 8000f44: f7ff ff6b bl 8000e1e HAL_TIM_PWM_PulseFinishedCallback(htim); 8000f48: 4620 mov r0, r4 8000f4a: f7ff ff6a bl 8000e22 8000f4e: e792 b.n 8000e76 HAL_TIM_OC_DelayElapsedCallback(htim); 8000f50: f7ff ff65 bl 8000e1e HAL_TIM_PWM_PulseFinishedCallback(htim); 8000f54: 4620 mov r0, r4 8000f56: f7ff ff64 bl 8000e22 8000f5a: e7a0 b.n 8000e9e HAL_TIM_OC_DelayElapsedCallback(htim); 8000f5c: f7ff ff5f bl 8000e1e HAL_TIM_PWM_PulseFinishedCallback(htim); 8000f60: 4620 mov r0, r4 8000f62: f7ff ff5e bl 8000e22 8000f66: e7af b.n 8000ec8 8000f68: bd10 pop {r4, pc} ... 08000f6c : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8000f6c: 4a24 ldr r2, [pc, #144] ; (8001000 ) tmpcr1 = TIMx->CR1; 8000f6e: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8000f70: 4290 cmp r0, r2 8000f72: d012 beq.n 8000f9a 8000f74: f502 6200 add.w r2, r2, #2048 ; 0x800 8000f78: 4290 cmp r0, r2 8000f7a: d00e beq.n 8000f9a 8000f7c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8000f80: d00b beq.n 8000f9a 8000f82: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8000f86: 4290 cmp r0, r2 8000f88: d007 beq.n 8000f9a 8000f8a: f502 6280 add.w r2, r2, #1024 ; 0x400 8000f8e: 4290 cmp r0, r2 8000f90: d003 beq.n 8000f9a 8000f92: f502 6280 add.w r2, r2, #1024 ; 0x400 8000f96: 4290 cmp r0, r2 8000f98: d11d bne.n 8000fd6 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8000f9a: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8000f9c: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8000fa0: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8000fa2: 4a17 ldr r2, [pc, #92] ; (8001000 ) 8000fa4: 4290 cmp r0, r2 8000fa6: d012 beq.n 8000fce 8000fa8: f502 6200 add.w r2, r2, #2048 ; 0x800 8000fac: 4290 cmp r0, r2 8000fae: d00e beq.n 8000fce 8000fb0: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8000fb4: d00b beq.n 8000fce 8000fb6: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8000fba: 4290 cmp r0, r2 8000fbc: d007 beq.n 8000fce 8000fbe: f502 6280 add.w r2, r2, #1024 ; 0x400 8000fc2: 4290 cmp r0, r2 8000fc4: d003 beq.n 8000fce 8000fc6: f502 6280 add.w r2, r2, #1024 ; 0x400 8000fca: 4290 cmp r0, r2 8000fcc: d103 bne.n 8000fd6 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 8000fce: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8000fd0: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8000fd4: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8000fd6: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8000fd8: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8000fdc: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 8000fde: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8000fe0: 688b ldr r3, [r1, #8] 8000fe2: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8000fe4: 680b ldr r3, [r1, #0] 8000fe6: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8000fe8: 4b05 ldr r3, [pc, #20] ; (8001000 ) 8000fea: 4298 cmp r0, r3 8000fec: d003 beq.n 8000ff6 8000fee: f503 6300 add.w r3, r3, #2048 ; 0x800 8000ff2: 4298 cmp r0, r3 8000ff4: d101 bne.n 8000ffa { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8000ff6: 690b ldr r3, [r1, #16] 8000ff8: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 8000ffa: 2301 movs r3, #1 8000ffc: 6143 str r3, [r0, #20] 8000ffe: 4770 bx lr 8001000: 40012c00 .word 0x40012c00 08001004 : { 8001004: b510 push {r4, lr} if(htim == NULL) 8001006: 4604 mov r4, r0 8001008: b1a0 cbz r0, 8001034 if(htim->State == HAL_TIM_STATE_RESET) 800100a: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 800100e: f003 02ff and.w r2, r3, #255 ; 0xff 8001012: b91b cbnz r3, 800101c htim->Lock = HAL_UNLOCKED; 8001014: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 8001018: f000 fd94 bl 8001b44 htim->State= HAL_TIM_STATE_BUSY; 800101c: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 800101e: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 8001020: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 8001024: 1d21 adds r1, r4, #4 8001026: f7ff ffa1 bl 8000f6c htim->State= HAL_TIM_STATE_READY; 800102a: 2301 movs r3, #1 return HAL_OK; 800102c: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 800102e: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 8001032: bd10 pop {r4, pc} return HAL_ERROR; 8001034: 2001 movs r0, #1 } 8001036: bd10 pop {r4, pc} 08001038 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 8001038: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 800103c: b510 push {r4, lr} __HAL_LOCK(htim); 800103e: 2b01 cmp r3, #1 8001040: f04f 0302 mov.w r3, #2 8001044: d018 beq.n 8001078 htim->State = HAL_TIM_STATE_BUSY; 8001046: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 800104a: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 800104c: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 800104e: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8001050: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 8001052: f022 0270 bic.w r2, r2, #112 ; 0x70 8001056: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8001058: 685a ldr r2, [r3, #4] 800105a: 4322 orrs r2, r4 800105c: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 800105e: 689a ldr r2, [r3, #8] 8001060: f022 0280 bic.w r2, r2, #128 ; 0x80 8001064: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8001066: 689a ldr r2, [r3, #8] 8001068: 430a orrs r2, r1 800106a: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 800106c: 2301 movs r3, #1 800106e: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 8001072: 2300 movs r3, #0 8001074: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8001078: 4618 mov r0, r3 return HAL_OK; } 800107a: bd10 pop {r4, pc} 0800107c : 800107c: 4770 bx lr 0800107e : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 800107e: 4770 bx lr 08001080 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8001080: 6803 ldr r3, [r0, #0] 8001082: 68da ldr r2, [r3, #12] 8001084: f422 7290 bic.w r2, r2, #288 ; 0x120 8001088: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800108a: 695a ldr r2, [r3, #20] 800108c: f022 0201 bic.w r2, r2, #1 8001090: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8001092: 2320 movs r3, #32 8001094: f880 303a strb.w r3, [r0, #58] ; 0x3a 8001098: 4770 bx lr ... 0800109c : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 800109c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80010a0: 6805 ldr r5, [r0, #0] 80010a2: 68c2 ldr r2, [r0, #12] 80010a4: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80010a6: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80010a8: f423 5340 bic.w r3, r3, #12288 ; 0x3000 80010ac: 4313 orrs r3, r2 80010ae: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80010b0: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 80010b2: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80010b4: 430b orrs r3, r1 80010b6: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 80010b8: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 80010bc: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80010c0: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 80010c2: 4313 orrs r3, r2 80010c4: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 80010c6: 696b ldr r3, [r5, #20] 80010c8: 6982 ldr r2, [r0, #24] 80010ca: f423 7340 bic.w r3, r3, #768 ; 0x300 80010ce: 4313 orrs r3, r2 80010d0: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 80010d2: 4b40 ldr r3, [pc, #256] ; (80011d4 ) { 80010d4: 4681 mov r9, r0 if(huart->Instance == USART1) 80010d6: 429d cmp r5, r3 80010d8: f04f 0419 mov.w r4, #25 80010dc: d146 bne.n 800116c { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 80010de: f7ff fe83 bl 8000de8 80010e2: fb04 f300 mul.w r3, r4, r0 80010e6: f8d9 6004 ldr.w r6, [r9, #4] 80010ea: f04f 0864 mov.w r8, #100 ; 0x64 80010ee: 00b6 lsls r6, r6, #2 80010f0: fbb3 f3f6 udiv r3, r3, r6 80010f4: fbb3 f3f8 udiv r3, r3, r8 80010f8: 011e lsls r6, r3, #4 80010fa: f7ff fe75 bl 8000de8 80010fe: 4360 muls r0, r4 8001100: f8d9 3004 ldr.w r3, [r9, #4] 8001104: 009b lsls r3, r3, #2 8001106: fbb0 f7f3 udiv r7, r0, r3 800110a: f7ff fe6d bl 8000de8 800110e: 4360 muls r0, r4 8001110: f8d9 3004 ldr.w r3, [r9, #4] 8001114: 009b lsls r3, r3, #2 8001116: fbb0 f3f3 udiv r3, r0, r3 800111a: fbb3 f3f8 udiv r3, r3, r8 800111e: fb08 7313 mls r3, r8, r3, r7 8001122: 011b lsls r3, r3, #4 8001124: 3332 adds r3, #50 ; 0x32 8001126: fbb3 f3f8 udiv r3, r3, r8 800112a: f003 07f0 and.w r7, r3, #240 ; 0xf0 800112e: f7ff fe5b bl 8000de8 8001132: 4360 muls r0, r4 8001134: f8d9 2004 ldr.w r2, [r9, #4] 8001138: 0092 lsls r2, r2, #2 800113a: fbb0 faf2 udiv sl, r0, r2 800113e: f7ff fe53 bl 8000de8 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 8001142: 4360 muls r0, r4 8001144: f8d9 3004 ldr.w r3, [r9, #4] 8001148: 009b lsls r3, r3, #2 800114a: fbb0 f3f3 udiv r3, r0, r3 800114e: fbb3 f3f8 udiv r3, r3, r8 8001152: fb08 a313 mls r3, r8, r3, sl 8001156: 011b lsls r3, r3, #4 8001158: 3332 adds r3, #50 ; 0x32 800115a: fbb3 f3f8 udiv r3, r3, r8 800115e: f003 030f and.w r3, r3, #15 8001162: 433b orrs r3, r7 8001164: 4433 add r3, r6 8001166: 60ab str r3, [r5, #8] 8001168: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800116c: f7ff fe2c bl 8000dc8 8001170: fb04 f300 mul.w r3, r4, r0 8001174: f8d9 6004 ldr.w r6, [r9, #4] 8001178: f04f 0864 mov.w r8, #100 ; 0x64 800117c: 00b6 lsls r6, r6, #2 800117e: fbb3 f3f6 udiv r3, r3, r6 8001182: fbb3 f3f8 udiv r3, r3, r8 8001186: 011e lsls r6, r3, #4 8001188: f7ff fe1e bl 8000dc8 800118c: 4360 muls r0, r4 800118e: f8d9 3004 ldr.w r3, [r9, #4] 8001192: 009b lsls r3, r3, #2 8001194: fbb0 f7f3 udiv r7, r0, r3 8001198: f7ff fe16 bl 8000dc8 800119c: 4360 muls r0, r4 800119e: f8d9 3004 ldr.w r3, [r9, #4] 80011a2: 009b lsls r3, r3, #2 80011a4: fbb0 f3f3 udiv r3, r0, r3 80011a8: fbb3 f3f8 udiv r3, r3, r8 80011ac: fb08 7313 mls r3, r8, r3, r7 80011b0: 011b lsls r3, r3, #4 80011b2: 3332 adds r3, #50 ; 0x32 80011b4: fbb3 f3f8 udiv r3, r3, r8 80011b8: f003 07f0 and.w r7, r3, #240 ; 0xf0 80011bc: f7ff fe04 bl 8000dc8 80011c0: 4360 muls r0, r4 80011c2: f8d9 2004 ldr.w r2, [r9, #4] 80011c6: 0092 lsls r2, r2, #2 80011c8: fbb0 faf2 udiv sl, r0, r2 80011cc: f7ff fdfc bl 8000dc8 80011d0: e7b7 b.n 8001142 80011d2: bf00 nop 80011d4: 40013800 .word 0x40013800 080011d8 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 80011d8: b5f8 push {r3, r4, r5, r6, r7, lr} 80011da: 4604 mov r4, r0 80011dc: 460e mov r6, r1 80011de: 4617 mov r7, r2 80011e0: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 80011e2: 6821 ldr r1, [r4, #0] 80011e4: 680b ldr r3, [r1, #0] 80011e6: ea36 0303 bics.w r3, r6, r3 80011ea: d101 bne.n 80011f0 return HAL_OK; 80011ec: 2000 movs r0, #0 } 80011ee: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 80011f0: 1c6b adds r3, r5, #1 80011f2: d0f7 beq.n 80011e4 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80011f4: b995 cbnz r5, 800121c CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 80011f6: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 80011f8: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 80011fa: 68da ldr r2, [r3, #12] 80011fc: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8001200: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001202: 695a ldr r2, [r3, #20] 8001204: f022 0201 bic.w r2, r2, #1 8001208: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 800120a: 2320 movs r3, #32 800120c: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8001210: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 8001214: 2300 movs r3, #0 8001216: f884 3038 strb.w r3, [r4, #56] ; 0x38 800121a: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 800121c: f7ff f850 bl 80002c0 8001220: 1bc0 subs r0, r0, r7 8001222: 4285 cmp r5, r0 8001224: d2dd bcs.n 80011e2 8001226: e7e6 b.n 80011f6 08001228 : { 8001228: b510 push {r4, lr} if(huart == NULL) 800122a: 4604 mov r4, r0 800122c: b340 cbz r0, 8001280 if(huart->gState == HAL_UART_STATE_RESET) 800122e: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 8001232: f003 02ff and.w r2, r3, #255 ; 0xff 8001236: b91b cbnz r3, 8001240 huart->Lock = HAL_UNLOCKED; 8001238: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 800123c: f000 fc96 bl 8001b6c huart->gState = HAL_UART_STATE_BUSY; 8001240: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 8001242: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8001244: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8001248: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 800124a: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 800124c: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8001250: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 8001252: f7ff ff23 bl 800109c CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8001256: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8001258: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 800125a: 691a ldr r2, [r3, #16] 800125c: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8001260: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8001262: 695a ldr r2, [r3, #20] 8001264: f022 022a bic.w r2, r2, #42 ; 0x2a 8001268: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 800126a: 68da ldr r2, [r3, #12] 800126c: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8001270: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8001272: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001274: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8001276: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 800127a: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 800127e: bd10 pop {r4, pc} return HAL_ERROR; 8001280: 2001 movs r0, #1 } 8001282: bd10 pop {r4, pc} 08001284 : { 8001284: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001288: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 800128a: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 800128e: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8001290: 2b20 cmp r3, #32 { 8001292: 460d mov r5, r1 8001294: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8001296: d14e bne.n 8001336 if((pData == NULL) || (Size == 0U)) 8001298: 2900 cmp r1, #0 800129a: d049 beq.n 8001330 800129c: 2a00 cmp r2, #0 800129e: d047 beq.n 8001330 __HAL_LOCK(huart); 80012a0: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 80012a4: 2b01 cmp r3, #1 80012a6: d046 beq.n 8001336 80012a8: 2301 movs r3, #1 80012aa: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 80012ae: 2300 movs r3, #0 80012b0: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 80012b2: 2321 movs r3, #33 ; 0x21 80012b4: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 80012b8: f7ff f802 bl 80002c0 80012bc: 4606 mov r6, r0 huart->TxXferSize = Size; 80012be: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 80012c2: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 80012c6: 8ce3 ldrh r3, [r4, #38] ; 0x26 80012c8: b29b uxth r3, r3 80012ca: b96b cbnz r3, 80012e8 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 80012cc: 463b mov r3, r7 80012ce: 4632 mov r2, r6 80012d0: 2140 movs r1, #64 ; 0x40 80012d2: 4620 mov r0, r4 80012d4: f7ff ff80 bl 80011d8 80012d8: b9a8 cbnz r0, 8001306 huart->gState = HAL_UART_STATE_READY; 80012da: 2320 movs r3, #32 __HAL_UNLOCK(huart); 80012dc: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 80012e0: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 80012e4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 80012e8: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80012ea: 4632 mov r2, r6 huart->TxXferCount--; 80012ec: 3b01 subs r3, #1 80012ee: b29b uxth r3, r3 80012f0: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80012f2: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80012f4: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80012f6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80012fa: 4620 mov r0, r4 80012fc: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80012fe: d10e bne.n 800131e if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001300: f7ff ff6a bl 80011d8 8001304: b110 cbz r0, 800130c return HAL_TIMEOUT; 8001306: 2003 movs r0, #3 8001308: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 800130c: 882b ldrh r3, [r5, #0] 800130e: 6822 ldr r2, [r4, #0] 8001310: f3c3 0308 ubfx r3, r3, #0, #9 8001314: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8001316: 6923 ldr r3, [r4, #16] 8001318: b943 cbnz r3, 800132c pData +=2U; 800131a: 3502 adds r5, #2 800131c: e7d3 b.n 80012c6 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800131e: f7ff ff5b bl 80011d8 8001322: 2800 cmp r0, #0 8001324: d1ef bne.n 8001306 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 8001326: 6823 ldr r3, [r4, #0] 8001328: 782a ldrb r2, [r5, #0] 800132a: 605a str r2, [r3, #4] 800132c: 3501 adds r5, #1 800132e: e7ca b.n 80012c6 return HAL_ERROR; 8001330: 2001 movs r0, #1 8001332: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8001336: 2002 movs r0, #2 } 8001338: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 0800133c : if(huart->RxState == HAL_UART_STATE_READY) 800133c: f890 303a ldrb.w r3, [r0, #58] ; 0x3a 8001340: 2b20 cmp r3, #32 8001342: d120 bne.n 8001386 if((pData == NULL) || (Size == 0U)) 8001344: b1e9 cbz r1, 8001382 8001346: b1e2 cbz r2, 8001382 __HAL_LOCK(huart); 8001348: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 800134c: 2b01 cmp r3, #1 800134e: d01a beq.n 8001386 huart->RxXferCount = Size; 8001350: 85c2 strh r2, [r0, #46] ; 0x2e huart->RxXferSize = Size; 8001352: 8582 strh r2, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8001354: 2300 movs r3, #0 huart->RxState = HAL_UART_STATE_BUSY_RX; 8001356: 2222 movs r2, #34 ; 0x22 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001358: 63c3 str r3, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 800135a: f880 203a strb.w r2, [r0, #58] ; 0x3a __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 800135e: 6802 ldr r2, [r0, #0] huart->pRxBuffPtr = pData; 8001360: 6281 str r1, [r0, #40] ; 0x28 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8001362: 68d1 ldr r1, [r2, #12] __HAL_UNLOCK(huart); 8001364: f880 3038 strb.w r3, [r0, #56] ; 0x38 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8001368: f441 7180 orr.w r1, r1, #256 ; 0x100 800136c: 60d1 str r1, [r2, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 800136e: 6951 ldr r1, [r2, #20] return HAL_OK; 8001370: 4618 mov r0, r3 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8001372: f041 0101 orr.w r1, r1, #1 8001376: 6151 str r1, [r2, #20] __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 8001378: 68d1 ldr r1, [r2, #12] 800137a: f041 0120 orr.w r1, r1, #32 800137e: 60d1 str r1, [r2, #12] return HAL_OK; 8001380: 4770 bx lr return HAL_ERROR; 8001382: 2001 movs r0, #1 8001384: 4770 bx lr return HAL_BUSY; 8001386: 2002 movs r0, #2 } 8001388: 4770 bx lr 0800138a : 800138a: 4770 bx lr 0800138c : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 800138c: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8001390: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8001392: 2b22 cmp r3, #34 ; 0x22 8001394: d136 bne.n 8001404 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001396: 6883 ldr r3, [r0, #8] 8001398: 6901 ldr r1, [r0, #16] 800139a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 800139e: 6802 ldr r2, [r0, #0] 80013a0: 6a83 ldr r3, [r0, #40] ; 0x28 80013a2: d123 bne.n 80013ec *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80013a4: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80013a6: b9e9 cbnz r1, 80013e4 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80013a8: f3c2 0208 ubfx r2, r2, #0, #9 80013ac: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 80013b0: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 80013b2: 8dc4 ldrh r4, [r0, #46] ; 0x2e 80013b4: 3c01 subs r4, #1 80013b6: b2a4 uxth r4, r4 80013b8: 85c4 strh r4, [r0, #46] ; 0x2e 80013ba: b98c cbnz r4, 80013e0 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80013bc: 6803 ldr r3, [r0, #0] 80013be: 68da ldr r2, [r3, #12] 80013c0: f022 0220 bic.w r2, r2, #32 80013c4: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80013c6: 68da ldr r2, [r3, #12] 80013c8: f422 7280 bic.w r2, r2, #256 ; 0x100 80013cc: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80013ce: 695a ldr r2, [r3, #20] 80013d0: f022 0201 bic.w r2, r2, #1 80013d4: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80013d6: 2320 movs r3, #32 80013d8: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 80013dc: f000 f8ca bl 8001574 if(--huart->RxXferCount == 0U) 80013e0: 2000 movs r0, #0 } 80013e2: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 80013e4: b2d2 uxtb r2, r2 80013e6: f823 2b01 strh.w r2, [r3], #1 80013ea: e7e1 b.n 80013b0 if(huart->Init.Parity == UART_PARITY_NONE) 80013ec: b921 cbnz r1, 80013f8 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 80013ee: 1c59 adds r1, r3, #1 80013f0: 6852 ldr r2, [r2, #4] 80013f2: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 80013f4: 701a strb r2, [r3, #0] 80013f6: e7dc b.n 80013b2 80013f8: 6852 ldr r2, [r2, #4] 80013fa: 1c59 adds r1, r3, #1 80013fc: 6281 str r1, [r0, #40] ; 0x28 80013fe: f002 027f and.w r2, r2, #127 ; 0x7f 8001402: e7f7 b.n 80013f4 return HAL_BUSY; 8001404: 2002 movs r0, #2 8001406: bd10 pop {r4, pc} 08001408 : 8001408: 4770 bx lr ... 0800140c : uint32_t isrflags = READ_REG(huart->Instance->SR); 800140c: 6803 ldr r3, [r0, #0] { 800140e: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8001410: 681a ldr r2, [r3, #0] { 8001412: 4604 mov r4, r0 if(errorflags == RESET) 8001414: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8001416: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8001418: 695d ldr r5, [r3, #20] if(errorflags == RESET) 800141a: d107 bne.n 800142c if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 800141c: 0696 lsls r6, r2, #26 800141e: d55a bpl.n 80014d6 8001420: 068d lsls r5, r1, #26 8001422: d558 bpl.n 80014d6 } 8001424: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8001428: f7ff bfb0 b.w 800138c if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 800142c: f015 0501 ands.w r5, r5, #1 8001430: d102 bne.n 8001438 8001432: f411 7f90 tst.w r1, #288 ; 0x120 8001436: d04e beq.n 80014d6 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8001438: 07d3 lsls r3, r2, #31 800143a: d505 bpl.n 8001448 800143c: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 800143e: bf42 ittt mi 8001440: 6be3 ldrmi r3, [r4, #60] ; 0x3c 8001442: f043 0301 orrmi.w r3, r3, #1 8001446: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001448: 0750 lsls r0, r2, #29 800144a: d504 bpl.n 8001456 800144c: b11d cbz r5, 8001456 huart->ErrorCode |= HAL_UART_ERROR_NE; 800144e: 6be3 ldr r3, [r4, #60] ; 0x3c 8001450: f043 0302 orr.w r3, r3, #2 8001454: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001456: 0793 lsls r3, r2, #30 8001458: d504 bpl.n 8001464 800145a: b11d cbz r5, 8001464 huart->ErrorCode |= HAL_UART_ERROR_FE; 800145c: 6be3 ldr r3, [r4, #60] ; 0x3c 800145e: f043 0304 orr.w r3, r3, #4 8001462: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001464: 0716 lsls r6, r2, #28 8001466: d504 bpl.n 8001472 8001468: b11d cbz r5, 8001472 huart->ErrorCode |= HAL_UART_ERROR_ORE; 800146a: 6be3 ldr r3, [r4, #60] ; 0x3c 800146c: f043 0308 orr.w r3, r3, #8 8001470: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8001472: 6be3 ldr r3, [r4, #60] ; 0x3c 8001474: 2b00 cmp r3, #0 8001476: d066 beq.n 8001546 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8001478: 0695 lsls r5, r2, #26 800147a: d504 bpl.n 8001486 800147c: 0688 lsls r0, r1, #26 800147e: d502 bpl.n 8001486 UART_Receive_IT(huart); 8001480: 4620 mov r0, r4 8001482: f7ff ff83 bl 800138c dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8001486: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8001488: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 800148a: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 800148c: 6be2 ldr r2, [r4, #60] ; 0x3c 800148e: 0711 lsls r1, r2, #28 8001490: d402 bmi.n 8001498 8001492: f015 0540 ands.w r5, r5, #64 ; 0x40 8001496: d01a beq.n 80014ce UART_EndRxTransfer(huart); 8001498: f7ff fdf2 bl 8001080 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 800149c: 6823 ldr r3, [r4, #0] 800149e: 695a ldr r2, [r3, #20] 80014a0: 0652 lsls r2, r2, #25 80014a2: d510 bpl.n 80014c6 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80014a4: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 80014a6: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80014a8: f022 0240 bic.w r2, r2, #64 ; 0x40 80014ac: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 80014ae: b150 cbz r0, 80014c6 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 80014b0: 4b25 ldr r3, [pc, #148] ; (8001548 ) 80014b2: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 80014b4: f7fe ff84 bl 80003c0 80014b8: 2800 cmp r0, #0 80014ba: d044 beq.n 8001546 huart->hdmarx->XferAbortCallback(huart->hdmarx); 80014bc: 6b60 ldr r0, [r4, #52] ; 0x34 } 80014be: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 80014c2: 6b43 ldr r3, [r0, #52] ; 0x34 80014c4: 4718 bx r3 HAL_UART_ErrorCallback(huart); 80014c6: 4620 mov r0, r4 80014c8: f7ff ff9e bl 8001408 80014cc: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 80014ce: f7ff ff9b bl 8001408 huart->ErrorCode = HAL_UART_ERROR_NONE; 80014d2: 63e5 str r5, [r4, #60] ; 0x3c 80014d4: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 80014d6: 0616 lsls r6, r2, #24 80014d8: d527 bpl.n 800152a 80014da: 060d lsls r5, r1, #24 80014dc: d525 bpl.n 800152a if(huart->gState == HAL_UART_STATE_BUSY_TX) 80014de: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 80014e2: 2a21 cmp r2, #33 ; 0x21 80014e4: d12f bne.n 8001546 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80014e6: 68a2 ldr r2, [r4, #8] 80014e8: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 80014ec: 6a22 ldr r2, [r4, #32] 80014ee: d117 bne.n 8001520 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 80014f0: 8811 ldrh r1, [r2, #0] 80014f2: f3c1 0108 ubfx r1, r1, #0, #9 80014f6: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80014f8: 6921 ldr r1, [r4, #16] 80014fa: b979 cbnz r1, 800151c huart->pTxBuffPtr += 2U; 80014fc: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 80014fe: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8001500: 8ce2 ldrh r2, [r4, #38] ; 0x26 8001502: 3a01 subs r2, #1 8001504: b292 uxth r2, r2 8001506: 84e2 strh r2, [r4, #38] ; 0x26 8001508: b9ea cbnz r2, 8001546 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 800150a: 68da ldr r2, [r3, #12] 800150c: f022 0280 bic.w r2, r2, #128 ; 0x80 8001510: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8001512: 68da ldr r2, [r3, #12] 8001514: f042 0240 orr.w r2, r2, #64 ; 0x40 8001518: 60da str r2, [r3, #12] 800151a: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 800151c: 3201 adds r2, #1 800151e: e7ee b.n 80014fe huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8001520: 1c51 adds r1, r2, #1 8001522: 6221 str r1, [r4, #32] 8001524: 7812 ldrb r2, [r2, #0] 8001526: 605a str r2, [r3, #4] 8001528: e7ea b.n 8001500 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 800152a: 0650 lsls r0, r2, #25 800152c: d50b bpl.n 8001546 800152e: 064a lsls r2, r1, #25 8001530: d509 bpl.n 8001546 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8001532: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8001534: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8001536: f022 0240 bic.w r2, r2, #64 ; 0x40 800153a: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 800153c: 2320 movs r3, #32 800153e: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 8001542: f7ff ff22 bl 800138a 8001546: bd70 pop {r4, r5, r6, pc} 8001548: 0800154d .word 0x0800154d 0800154c : { 800154c: b508 push {r3, lr} huart->RxXferCount = 0x00U; 800154e: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8001550: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 8001552: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 8001554: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 8001556: f7ff ff57 bl 8001408 800155a: bd08 pop {r3, pc} 0800155c : * @brief Unlocks Flash for write access * @param None * @retval None */ void FLASH_If_Init(void) { 800155c: b508 push {r3, lr} /* Unlock the Program memory */ HAL_FLASH_Unlock(); 800155e: f7fe ffc5 bl 80004ec /* Clear all FLASH flags */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR); 8001562: 2234 movs r2, #52 ; 0x34 8001564: 4b02 ldr r3, [pc, #8] ; (8001570 ) 8001566: 60da str r2, [r3, #12] /* Unlock the Program memory */ HAL_FLASH_Lock(); } 8001568: e8bd 4008 ldmia.w sp!, {r3, lr} HAL_FLASH_Lock(); 800156c: f7fe bfd0 b.w 8000510 8001570: 40022000 .word 0x40022000 08001574 : void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART1)//RGB Comunication 8001574: 6802 ldr r2, [r0, #0] 8001576: 4b0a ldr r3, [pc, #40] ; (80015a0 ) 8001578: 429a cmp r2, r3 800157a: d10f bne.n 800159c { ring_buffer[ring_header] = rx3_data[0]; 800157c: 4a09 ldr r2, [pc, #36] ; (80015a4 ) 800157e: 490a ldr r1, [pc, #40] ; (80015a8 ) 8001580: 6813 ldr r3, [r2, #0] 8001582: 7808 ldrb r0, [r1, #0] 8001584: 4909 ldr r1, [pc, #36] ; (80015ac ) 8001586: 54c8 strb r0, [r1, r3] if(++ring_header>=100){ ring_header = 0; } 8001588: 3301 adds r3, #1 800158a: 2b63 cmp r3, #99 ; 0x63 800158c: bf88 it hi 800158e: 2300 movhi r3, #0 HAL_UART_Receive_IT(&huart1,&rx3_data[0],1); 8001590: 4905 ldr r1, [pc, #20] ; (80015a8 ) if(++ring_header>=100){ ring_header = 0; } 8001592: 6013 str r3, [r2, #0] HAL_UART_Receive_IT(&huart1,&rx3_data[0],1); 8001594: 4806 ldr r0, [pc, #24] ; (80015b0 ) 8001596: 2201 movs r2, #1 8001598: f7ff bed0 b.w 800133c 800159c: 4770 bx lr 800159e: bf00 nop 80015a0: 40013800 .word 0x40013800 80015a4: 200000b8 .word 0x200000b8 80015a8: 200000c0 .word 0x200000c0 80015ac: 20000188 .word 0x20000188 80015b0: 200000fc .word 0x200000fc 080015b4 : } void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 80015b4: 6802 ldr r2, [r0, #0] 80015b6: 4b08 ldr r3, [pc, #32] ; (80015d8 ) 80015b8: 429a cmp r2, r3 80015ba: d10b bne.n 80015d4 UartTimerCnt++; 80015bc: 4a07 ldr r2, [pc, #28] ; (80015dc ) 80015be: 6813 ldr r3, [r2, #0] 80015c0: 3301 adds r3, #1 80015c2: 6013 str r3, [r2, #0] LedTimerCnt++; 80015c4: 4a06 ldr r2, [pc, #24] ; (80015e0 ) 80015c6: 6813 ldr r3, [r2, #0] 80015c8: 3301 adds r3, #1 80015ca: 6013 str r3, [r2, #0] FirmwareTimerCnt++; 80015cc: 4a05 ldr r2, [pc, #20] ; (80015e4 ) 80015ce: 6813 ldr r3, [r2, #0] 80015d0: 3301 adds r3, #1 80015d2: 6013 str r3, [r2, #0] 80015d4: 4770 bx lr 80015d6: bf00 nop 80015d8: 40001000 .word 0x40001000 80015dc: 200000b0 .word 0x200000b0 80015e0: 200000a8 .word 0x200000a8 80015e4: 200000a4 .word 0x200000a4 080015e8 : } } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart1, data,size, 10); 80015e8: 460a mov r2, r1 80015ea: 230a movs r3, #10 80015ec: 4601 mov r1, r0 80015ee: 4801 ldr r0, [pc, #4] ; (80015f4 ) 80015f0: f7ff be48 b.w 8001284 80015f4: 200000fc .word 0x200000fc 080015f8 <_write>: } int _write (int file, uint8_t *ptr, uint16_t len) { 80015f8: b510 push {r4, lr} 80015fa: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 80015fc: 230a movs r3, #10 80015fe: 4802 ldr r0, [pc, #8] ; (8001608 <_write+0x10>) 8001600: f7ff fe40 bl 8001284 return len; } 8001604: 4620 mov r0, r4 8001606: bd10 pop {r4, pc} 8001608: 200000fc .word 0x200000fc 0800160c : #endif // PYJ.2019.03.20_END -- #define FLASH_USER_START_ADDR StartAddr /* Start @ of user Flash area */ #define FLASH_USER_END_ADDR StartAddr + ((uint32_t)0x000FFFF) /* End @ of user Flash area */ uint32_t Address = StartAddr; uint8_t Flash_RGB_Data_Write(uint8_t* data){ 800160c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint16_t Firmdata = 0; uint8_t ret = 0; for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001610: 2400 movs r4, #0 uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001612: 4607 mov r7, r0 uint8_t ret = 0; 8001614: 4626 mov r6, r4 Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001616: 4d10 ldr r5, [pc, #64] ; (8001658 ) printf("HAL NOT OK \n"); 8001618: f8df 8040 ldr.w r8, [pc, #64] ; 800165c for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 800161c: 78bb ldrb r3, [r7, #2] 800161e: 3b02 subs r3, #2 8001620: 429c cmp r4, r3 8001622: db02 blt.n 800162a } Address += 2; // HAL_Delay(5); } return ret; } 8001624: 4630 mov r0, r6 8001626: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); 800162a: 193b adds r3, r7, r4 800162c: 78da ldrb r2, [r3, #3] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 800162e: 791b ldrb r3, [r3, #4] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001630: 6829 ldr r1, [r5, #0] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001632: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001636: b292 uxth r2, r2 8001638: 2300 movs r3, #0 800163a: 2001 movs r0, #1 800163c: f7fe ff9c bl 8000578 8001640: b118 cbz r0, 800164a printf("HAL NOT OK \n"); 8001642: 4640 mov r0, r8 8001644: f000 fbd0 bl 8001de8 ret = 1; 8001648: 2601 movs r6, #1 Address += 2; 800164a: 682b ldr r3, [r5, #0] for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 800164c: 3402 adds r4, #2 Address += 2; 800164e: 3302 adds r3, #2 8001650: 602b str r3, [r5, #0] for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001652: b2e4 uxtb r4, r4 8001654: e7e2 b.n 800161c 8001656: bf00 nop 8001658: 20000008 .word 0x20000008 800165c: 08002e20 .word 0x08002e20 08001660 : /*Variable used for Erase procedure*/ static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; /* Fill EraseInit structure*/ EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001660: 2300 movs r3, #0 { 8001662: b573 push {r0, r1, r4, r5, r6, lr} EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001664: 4d16 ldr r5, [pc, #88] ; (80016c0 ) EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì¸???´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤ 8001666: 4c17 ldr r4, [pc, #92] ; (80016c4 ) EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001668: 602b str r3, [r5, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 800166a: 4b17 ldr r3, [pc, #92] ; (80016c8 ) { 800166c: 4606 mov r6, r0 EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 800166e: 60ab str r3, [r5, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8001670: 231f movs r3, #31 8001672: 60eb str r3, [r5, #12] __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì¸???´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤ 8001674: 69e3 ldr r3, [r4, #28] 8001676: f023 0310 bic.w r3, r3, #16 800167a: 61e3 str r3, [r4, #28] HAL_FLASH_Unlock(); // lock ??ê¸? 800167c: f7fe ff36 bl 80004ec if(flashinit == 0){ 8001680: 4b12 ldr r3, [pc, #72] ; (80016cc ) 8001682: 781a ldrb r2, [r3, #0] 8001684: b94a cbnz r2, 800169a flashinit= 1; 8001686: 2201 movs r2, #1 //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001688: 4911 ldr r1, [pc, #68] ; (80016d0 ) 800168a: 4628 mov r0, r5 flashinit= 1; 800168c: 701a strb r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 800168e: f7fe ffdd bl 800064c 8001692: b110 cbz r0, 800169a printf("Erase Failed \r\n"); 8001694: 480f ldr r0, [pc, #60] ; (80016d4 ) 8001696: f000 fba7 bl 8001de8 } } // FLASH_If_Erase(); ret = Flash_RGB_Data_Write(&data[bluecell_stx]); 800169a: 4630 mov r0, r6 800169c: f7ff ffb6 bl 800160c 80016a0: 4605 mov r5, r0 HAL_FLASH_Lock(); // lock ?ž ê·¸ê¸° 80016a2: f7fe ff35 bl 8000510 __HAL_RCC_TIM6_CLK_ENABLE(); // 매ì¸???´ë¨¸ë?? ?ž¬?‹œ?ž‘?•©?‹ˆ?‹¤ return ret; } 80016a6: 4628 mov r0, r5 __HAL_RCC_TIM6_CLK_ENABLE(); // 매ì¸???´ë¨¸ë?? ?ž¬?‹œ?ž‘?•©?‹ˆ?‹¤ 80016a8: 69e3 ldr r3, [r4, #28] 80016aa: f043 0310 orr.w r3, r3, #16 80016ae: 61e3 str r3, [r4, #28] 80016b0: 69e3 ldr r3, [r4, #28] 80016b2: f003 0310 and.w r3, r3, #16 80016b6: 9301 str r3, [sp, #4] 80016b8: 9b01 ldr r3, [sp, #4] } 80016ba: b002 add sp, #8 80016bc: bd70 pop {r4, r5, r6, pc} 80016be: bf00 nop 80016c0: 20000094 .word 0x20000094 80016c4: 40021000 .word 0x40021000 80016c8: 08004000 .word 0x08004000 80016cc: 200000b4 .word 0x200000b4 80016d0: 200000ac .word 0x200000ac 80016d4: 08002e2c .word 0x08002e2c 080016d8 : void Flash_InitRead(void) // ?“°ê¸°í•¨?ˆ˜ { 80016d8: b570 push {r4, r5, r6, lr} uint32_t Address = 0; Address = StartAddr; 80016da: 4c06 ldr r4, [pc, #24] ; (80016f4 ) for(uint32_t i = 0; i < 16; i++ ){ printf("%08x : %02X \n",Address ,*(uint8_t*)Address); 80016dc: 4e06 ldr r6, [pc, #24] ; (80016f8 ) for(uint32_t i = 0; i < 16; i++ ){ 80016de: 4d07 ldr r5, [pc, #28] ; (80016fc ) printf("%08x : %02X \n",Address ,*(uint8_t*)Address); 80016e0: 7822 ldrb r2, [r4, #0] 80016e2: 4621 mov r1, r4 80016e4: 4630 mov r0, r6 Address++; 80016e6: 3401 adds r4, #1 printf("%08x : %02X \n",Address ,*(uint8_t*)Address); 80016e8: f000 fb0a bl 8001d00 for(uint32_t i = 0; i < 16; i++ ){ 80016ec: 42ac cmp r4, r5 80016ee: d1f7 bne.n 80016e0 printf("%02X ",*(uint8_t*)Address); Address++; } #endif // PYJ.2019.03.27_END -- } 80016f0: bd70 pop {r4, r5, r6, pc} 80016f2: bf00 nop 80016f4: 08004000 .word 0x08004000 80016f8: 08002e12 .word 0x08002e12 80016fc: 08004010 .word 0x08004010 08001700 : typedef void (*fptr)(void); fptr jump_to_app; uint32_t jump_addr; void Jump_App(void){ 8001700: b5b0 push {r4, r5, r7, lr} __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì¸???´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤ 8001702: 4a0d ldr r2, [pc, #52] ; (8001738 ) void Jump_App(void){ 8001704: af00 add r7, sp, #0 __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì¸???´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤ 8001706: 69d3 ldr r3, [r2, #28] printf("boot loader start\n"); //메세ì§? 출력 8001708: 480c ldr r0, [pc, #48] ; (800173c ) __HAL_RCC_TIM6_CLK_DISABLE(); // 매ì¸???´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤ 800170a: f023 0310 bic.w r3, r3, #16 800170e: 61d3 str r3, [r2, #28] printf("boot loader start\n"); //메세ì§? 출력 8001710: f000 fb6a bl 8001de8 jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8001714: 4b0a ldr r3, [pc, #40] ; (8001740 ) 8001716: 4a0b ldr r2, [pc, #44] ; (8001744 ) 8001718: 681b ldr r3, [r3, #0] jump_to_app = (fptr) jump_addr; 800171a: 4c0b ldr r4, [pc, #44] ; (8001748 ) /* init user app's sp */ printf("jump!\n"); 800171c: 480b ldr r0, [pc, #44] ; (800174c ) jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 800171e: 6013 str r3, [r2, #0] jump_to_app = (fptr) jump_addr; 8001720: 6023 str r3, [r4, #0] printf("jump!\n"); 8001722: f000 fb61 bl 8001de8 __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); 8001726: 4b0a ldr r3, [pc, #40] ; (8001750 ) 8001728: 681b ldr r3, [r3, #0] __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); 800172a: f383 8808 msr MSP, r3 jump_to_app(); 800172e: 6823 ldr r3, [r4, #0] } 8001730: 46bd mov sp, r7 8001732: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr} jump_to_app(); 8001736: 4718 bx r3 8001738: 40021000 .word 0x40021000 800173c: 08002e3b .word 0x08002e3b 8001740: 08004004 .word 0x08004004 8001744: 2000013c .word 0x2000013c 8001748: 20000184 .word 0x20000184 800174c: 08002e4d .word 0x08002e4d 8001750: 08004000 .word 0x08004000 08001754 : void FirmwareUpdateStart(uint8_t* data){ 8001754: b573 push {r0, r1, r4, r5, r6, lr} 8001756: 4604 mov r4, r0 uint8_t ret = 0,crccheck = 0; uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe}; 8001758: 4b25 ldr r3, [pc, #148] ; (80017f0 ) crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 800175a: 78a1 ldrb r1, [r4, #2] uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe}; 800175c: 6818 ldr r0, [r3, #0] 800175e: 791b ldrb r3, [r3, #4] 8001760: 9000 str r0, [sp, #0] 8001762: f88d 3004 strb.w r3, [sp, #4] crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 8001766: 1863 adds r3, r4, r1 8001768: 785a ldrb r2, [r3, #1] 800176a: 1c60 adds r0, r4, #1 800176c: f000 f9ab bl 8001ac6 if(crccheck == NO_ERROR){ 8001770: 2801 cmp r0, #1 8001772: d00b beq.n 800178c 8001774: 2300 movs r3, #0 ret = Flash_write(&data[0]); if(ret == 1) tempdata[bluecell_type] = FirmwareUpdataNak; }else{ for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) printf("%02x ",data[i]); 8001776: 4e1f ldr r6, [pc, #124] ; (80017f4 ) for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) 8001778: 78a2 ldrb r2, [r4, #2] 800177a: 1c5d adds r5, r3, #1 800177c: 3202 adds r2, #2 800177e: b2db uxtb r3, r3 8001780: 429a cmp r2, r3 8001782: da2f bge.n 80017e4 printf("Check Sum error \n"); 8001784: 481c ldr r0, [pc, #112] ; (80017f8 ) 8001786: f000 fb2f bl 8001de8 800178a: e00c b.n 80017a6 tempdata[bluecell_type] = FirmwareUpdataAck; 800178c: 2311 movs r3, #17 800178e: f88d 3001 strb.w r3, [sp, #1] if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte 8001792: 7863 ldrb r3, [r4, #1] 8001794: 2bdd cmp r3, #221 ; 0xdd 8001796: d001 beq.n 800179c 8001798: 2bee cmp r3, #238 ; 0xee 800179a: d107 bne.n 80017ac ret = Flash_write(&data[0]); 800179c: 4620 mov r0, r4 800179e: f7ff ff5f bl 8001660 if(ret == 1) 80017a2: 2801 cmp r0, #1 80017a4: d102 bne.n 80017ac tempdata[bluecell_type] = FirmwareUpdataNak; 80017a6: 2322 movs r3, #34 ; 0x22 80017a8: f88d 3001 strb.w r3, [sp, #1] } tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]); 80017ac: f89d 1002 ldrb.w r1, [sp, #2] 80017b0: f10d 0001 add.w r0, sp, #1 80017b4: f000 f96c bl 8001a90 if(data[bluecell_type] != 0xEE && data[bluecell_type] != RGB_Reset){ 80017b8: 7863 ldrb r3, [r4, #1] tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]); 80017ba: f88d 0003 strb.w r0, [sp, #3] if(data[bluecell_type] != 0xEE && data[bluecell_type] != RGB_Reset){ 80017be: 2bee cmp r3, #238 ; 0xee 80017c0: d008 beq.n 80017d4 80017c2: 2b0a cmp r3, #10 80017c4: d006 beq.n 80017d4 Uart1_Data_Send(&tempdata[bluecell_stx],tempdata[bluecell_length] + 3); 80017c6: f89d 1002 ldrb.w r1, [sp, #2] 80017ca: 4668 mov r0, sp 80017cc: 3103 adds r1, #3 80017ce: b2c9 uxtb r1, r1 80017d0: f7ff ff0a bl 80015e8 } if(data[bluecell_type] == 0xEE) 80017d4: 7863 ldrb r3, [r4, #1] 80017d6: 2bee cmp r3, #238 ; 0xee 80017d8: d102 bne.n 80017e0 printf("update Complete \n"); 80017da: 4808 ldr r0, [pc, #32] ; (80017fc ) 80017dc: f000 fb04 bl 8001de8 } 80017e0: b002 add sp, #8 80017e2: bd70 pop {r4, r5, r6, pc} printf("%02x ",data[i]); 80017e4: 5ce1 ldrb r1, [r4, r3] 80017e6: 4630 mov r0, r6 80017e8: f000 fa8a bl 8001d00 80017ec: 462b mov r3, r5 80017ee: e7c3 b.n 8001778 80017f0: 08002de0 .word 0x08002de0 80017f4: 08002dea .word 0x08002dea 80017f8: 08002df0 .word 0x08002df0 80017fc: 08002e01 .word 0x08002e01 08001800 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001800: b510 push {r4, lr} 8001802: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001804: 2228 movs r2, #40 ; 0x28 8001806: 2100 movs r1, #0 8001808: a806 add r0, sp, #24 800180a: f000 fa71 bl 8001cf0 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800180e: 2100 movs r1, #0 8001810: 2214 movs r2, #20 8001812: a801 add r0, sp, #4 8001814: f000 fa6c bl 8001cf0 */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001818: 2402 movs r4, #2 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 800181a: 2201 movs r2, #1 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 800181c: f44f 3380 mov.w r3, #65536 ; 0x10000 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001820: a806 add r0, sp, #24 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8001822: 9206 str r2, [sp, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8001824: 9307 str r3, [sp, #28] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001826: 920a str r2, [sp, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8001828: 930e str r3, [sp, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800182a: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800182c: f7ff f852 bl 80008d4 { Error_Handler(); } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001830: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001832: 2100 movs r1, #0 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001834: 9301 str r3, [sp, #4] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001836: f44f 6380 mov.w r3, #1024 ; 0x400 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 800183a: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800183c: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800183e: 9103 str r1, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001840: 9304 str r3, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001842: 9105 str r1, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8001844: f7ff fa0e bl 8000c64 { Error_Handler(); } } 8001848: b010 add sp, #64 ; 0x40 800184a: bd10 pop {r4, pc} 0800184c
: { 800184c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8001850: b0ca sub sp, #296 ; 0x128 uint8_t data[255] = {0,}; 8001852: af0a add r7, sp, #40 ; 0x28 8001854: 22ff movs r2, #255 ; 0xff 8001856: 2100 movs r1, #0 8001858: 4638 mov r0, r7 800185a: f000 fa49 bl 8001cf0 uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb}; 800185e: 4b77 ldr r3, [pc, #476] ; (8001a3c ) HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); /*Configure GPIO pin : PC15 */ GPIO_InitStruct.Pin = GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8001860: 2400 movs r4, #0 uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb}; 8001862: 6818 ldr r0, [r3, #0] 8001864: 791b ldrb r3, [r3, #4] 8001866: 9004 str r0, [sp, #16] 8001868: f88d 3014 strb.w r3, [sp, #20] HAL_Init(); 800186c: f7fe fd0a bl 8000284 SystemClock_Config(); 8001870: f7ff ffc6 bl 8001800 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001874: 2210 movs r2, #16 8001876: 2100 movs r1, #0 8001878: a806 add r0, sp, #24 800187a: f000 fa39 bl 8001cf0 __HAL_RCC_GPIOC_CLK_ENABLE(); 800187e: 4b70 ldr r3, [pc, #448] ; (8001a40 ) HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 8001880: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOC_CLK_ENABLE(); 8001884: 699a ldr r2, [r3, #24] HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 8001886: 486f ldr r0, [pc, #444] ; (8001a44 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8001888: f042 0210 orr.w r2, r2, #16 800188c: 619a str r2, [r3, #24] 800188e: 699a ldr r2, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001890: f04f 0801 mov.w r8, #1 __HAL_RCC_GPIOC_CLK_ENABLE(); 8001894: f002 0210 and.w r2, r2, #16 8001898: 9201 str r2, [sp, #4] 800189a: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 800189c: 699a ldr r2, [r3, #24] htim6.Instance = TIM6; 800189e: 4e6a ldr r6, [pc, #424] ; (8001a48 ) __HAL_RCC_GPIOD_CLK_ENABLE(); 80018a0: f042 0220 orr.w r2, r2, #32 80018a4: 619a str r2, [r3, #24] 80018a6: 699a ldr r2, [r3, #24] huart1.Instance = USART1; 80018a8: 4d68 ldr r5, [pc, #416] ; (8001a4c ) __HAL_RCC_GPIOD_CLK_ENABLE(); 80018aa: f002 0220 and.w r2, r2, #32 80018ae: 9202 str r2, [sp, #8] 80018b0: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 80018b2: 699a ldr r2, [r3, #24] 80018b4: f042 0204 orr.w r2, r2, #4 80018b8: 619a str r2, [r3, #24] 80018ba: 699b ldr r3, [r3, #24] HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 80018bc: 2200 movs r2, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 80018be: f003 0304 and.w r3, r3, #4 80018c2: 9303 str r3, [sp, #12] 80018c4: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 80018c6: f7fe fffb bl 80008c0 GPIO_InitStruct.Pin = GPIO_PIN_15; 80018ca: f44f 4300 mov.w r3, #32768 ; 0x8000 80018ce: 9306 str r3, [sp, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80018d0: 2302 movs r3, #2 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80018d2: a906 add r1, sp, #24 80018d4: 485b ldr r0, [pc, #364] ; (8001a44 ) GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80018d6: f8cd 801c str.w r8, [sp, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80018da: 9309 str r3, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80018dc: 9408 str r4, [sp, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80018de: f7fe ff03 bl 80006e8 htim6.Init.Prescaler = 1600-1; 80018e2: f240 633f movw r3, #1599 ; 0x63f 80018e6: 4a5a ldr r2, [pc, #360] ; (8001a50 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80018e8: 4630 mov r0, r6 htim6.Init.Prescaler = 1600-1; 80018ea: e886 000c stmia.w r6, {r2, r3} htim6.Init.Period = 10-1; 80018ee: 2309 movs r3, #9 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 80018f0: 60b4 str r4, [r6, #8] htim6.Init.Period = 10-1; 80018f2: 60f3 str r3, [r6, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80018f4: 61b4 str r4, [r6, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 80018f6: 9406 str r4, [sp, #24] 80018f8: 9407 str r4, [sp, #28] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80018fa: f7ff fb83 bl 8001004 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80018fe: a906 add r1, sp, #24 8001900: 4630 mov r0, r6 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001902: 9406 str r4, [sp, #24] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001904: 9407 str r4, [sp, #28] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001906: f7ff fb97 bl 8001038 huart1.Init.BaudRate = 115200; 800190a: f44f 33e1 mov.w r3, #115200 ; 0x1c200 800190e: 4951 ldr r1, [pc, #324] ; (8001a54 ) if (HAL_UART_Init(&huart1) != HAL_OK) 8001910: 4628 mov r0, r5 huart1.Init.BaudRate = 115200; 8001912: e885 000a stmia.w r5, {r1, r3} huart1.Init.Mode = UART_MODE_TX_RX; 8001916: 230c movs r3, #12 huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001918: 60ac str r4, [r5, #8] huart1.Init.Mode = UART_MODE_TX_RX; 800191a: 616b str r3, [r5, #20] huart1.Init.StopBits = UART_STOPBITS_1; 800191c: 60ec str r4, [r5, #12] huart1.Init.Parity = UART_PARITY_NONE; 800191e: 612c str r4, [r5, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001920: 61ac str r4, [r5, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001922: 61ec str r4, [r5, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8001924: f7ff fc80 bl 8001228 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8001928: 4622 mov r2, r4 800192a: 4621 mov r1, r4 800192c: 2036 movs r0, #54 ; 0x36 800192e: f7fe fcf1 bl 8000314 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001932: 2036 movs r0, #54 ; 0x36 8001934: f7fe fd22 bl 800037c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8001938: 4622 mov r2, r4 800193a: 4621 mov r1, r4 800193c: 2025 movs r0, #37 ; 0x25 800193e: f7fe fce9 bl 8000314 HAL_NVIC_EnableIRQ(USART1_IRQn); 8001942: 2025 movs r0, #37 ; 0x25 8001944: f7fe fd1a bl 800037c HAL_TIM_Base_Start_IT(&htim6); 8001948: 4630 mov r0, r6 800194a: f7ff fa5d bl 8000e08 HAL_UART_Receive_IT(&huart1, &rx3_data[0],1); 800194e: 4642 mov r2, r8 8001950: 4941 ldr r1, [pc, #260] ; (8001a58 ) 8001952: 4628 mov r0, r5 8001954: f7ff fcf2 bl 800133c setbuf(stdout, NULL); // \n ?��?��?��, printf �??????��?���????? ?��?��?�� 8001958: 4b40 ldr r3, [pc, #256] ; (8001a5c ) 800195a: 4621 mov r1, r4 800195c: 681b ldr r3, [r3, #0] if(FirmwareTimerCnt > 3000){ 800195e: 4e40 ldr r6, [pc, #256] ; (8001a60 ) setbuf(stdout, NULL); // \n ?��?��?��, printf �??????��?���????? ?��?��?�� 8001960: 6898 ldr r0, [r3, #8] 8001962: f000 fa49 bl 8001df8 printf("****************************************\r\n"); 8001966: 483f ldr r0, [pc, #252] ; (8001a64 ) 8001968: f000 fa3e bl 8001de8 printf("RGB Project\r\n"); 800196c: 483e ldr r0, [pc, #248] ; (8001a68 ) 800196e: f000 fa3b bl 8001de8 printf("Build at %s %s\r\n", __DATE__, __TIME__); 8001972: 4a3e ldr r2, [pc, #248] ; (8001a6c ) 8001974: 493e ldr r1, [pc, #248] ; (8001a70 ) 8001976: 483f ldr r0, [pc, #252] ; (8001a74 ) 8001978: f000 f9c2 bl 8001d00 printf("Copyright (c) 2019. BLUECELL\r\n"); 800197c: 483e ldr r0, [pc, #248] ; (8001a78 ) 800197e: f000 fa33 bl 8001de8 printf("****************************************\r\n"); 8001982: 4838 ldr r0, [pc, #224] ; (8001a64 ) 8001984: f000 fa30 bl 8001de8 FLASH_If_Init(); 8001988: f7ff fde8 bl 800155c Flash_InitRead(); 800198c: f7ff fea4 bl 80016d8 bootdata[bluecell_crc] = STH30_CreateCrc(&bootdata[bluecell_type],bootdata[bluecell_length]); 8001990: f89d 1012 ldrb.w r1, [sp, #18] 8001994: f10d 0011 add.w r0, sp, #17 8001998: f000 f87a bl 8001a90 800199c: f88d 0013 strb.w r0, [sp, #19] HAL_Delay(100); 80019a0: 2064 movs r0, #100 ; 0x64 80019a2: f7fe fc93 bl 80002cc Uart1_Data_Send(&bootdata[bluecell_stx],bootdata[bluecell_length] + 3); 80019a6: f89d 1012 ldrb.w r1, [sp, #18] 80019aa: a804 add r0, sp, #16 80019ac: 3103 adds r1, #3 80019ae: b2c9 uxtb r1, r1 80019b0: f7ff fe1a bl 80015e8 uint8_t cnt = 0; 80019b4: 4625 mov r5, r4 80019b6: 46b1 mov r9, r6 HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 80019b8: f8df 8088 ldr.w r8, [pc, #136] ; 8001a44 if(FirmwareTimerCnt > 3000){ 80019bc: f640 33b8 movw r3, #3000 ; 0xbb8 80019c0: 6832 ldr r2, [r6, #0] 80019c2: 429a cmp r2, r3 80019c4: d901 bls.n 80019ca Jump_App(); 80019c6: f7ff fe9b bl 8001700 if(ring_tail != ring_header){ // <------- 80019ca: 4a2c ldr r2, [pc, #176] ; (8001a7c ) 80019cc: 4b2c ldr r3, [pc, #176] ; (8001a80 ) 80019ce: 6811 ldr r1, [r2, #0] 80019d0: 681b ldr r3, [r3, #0] 80019d2: 4299 cmp r1, r3 80019d4: d01e beq.n 8001a14 data[cnt++] = ring_buffer[ring_tail++]; 80019d6: 4c2b ldr r4, [pc, #172] ; (8001a84 ) 80019d8: 1c48 adds r0, r1, #1 80019da: 5c61 ldrb r1, [r4, r1] 80019dc: 1c6b adds r3, r5, #1 80019de: 5579 strb r1, [r7, r5] 80019e0: 2100 movs r1, #0 80019e2: b2db uxtb r3, r3 80019e4: 461d mov r5, r3 if(ring_tail >= 100){ ring_tail = 0; } 80019e6: 2863 cmp r0, #99 ; 0x63 data[cnt++] = ring_buffer[ring_tail++]; 80019e8: 6010 str r0, [r2, #0] if(ring_tail >= 100){ ring_tail = 0; } 80019ea: bf88 it hi 80019ec: 6011 strhi r1, [r2, #0] UartTimerCnt = 0; 80019ee: 4a26 ldr r2, [pc, #152] ; (8001a88 ) 80019f0: 6011 str r1, [r2, #0] if(uartrecv == 1 && UartTimerCnt > 100){ 80019f2: 4b25 ldr r3, [pc, #148] ; (8001a88 ) 80019f4: 681b ldr r3, [r3, #0] 80019f6: 2b64 cmp r3, #100 ; 0x64 80019f8: d91e bls.n 8001a38 FirmwareTimerCnt = 0; 80019fa: 2500 movs r5, #0 FirmwareUpdateStart(&data[0]); 80019fc: 4638 mov r0, r7 80019fe: f7ff fea9 bl 8001754 memset(&data[0],0,100); 8001a02: 2264 movs r2, #100 ; 0x64 8001a04: 2100 movs r1, #0 8001a06: 4638 mov r0, r7 8001a08: f000 f972 bl 8001cf0 cnt = 0; 8001a0c: 462c mov r4, r5 FirmwareTimerCnt = 0; 8001a0e: f8c9 5000 str.w r5, [r9] 8001a12: e001 b.n 8001a18 if(uartrecv == 1 && UartTimerCnt > 100){ 8001a14: 2c00 cmp r4, #0 8001a16: d1ec bne.n 80019f2 if(LedTimerCnt > 500){ 8001a18: f8df a070 ldr.w sl, [pc, #112] ; 8001a8c 8001a1c: f8da 3000 ldr.w r3, [sl] 8001a20: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 8001a24: d9ca bls.n 80019bc HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 8001a26: f44f 4100 mov.w r1, #32768 ; 0x8000 8001a2a: 4640 mov r0, r8 8001a2c: f7fe ff4d bl 80008ca LedTimerCnt = 0; 8001a30: 2300 movs r3, #0 8001a32: f8ca 3000 str.w r3, [sl] 8001a36: e7c1 b.n 80019bc 8001a38: 2401 movs r4, #1 8001a3a: e7ed b.n 8001a18 8001a3c: 08002de5 .word 0x08002de5 8001a40: 40021000 .word 0x40021000 8001a44: 40011000 .word 0x40011000 8001a48: 20000140 .word 0x20000140 8001a4c: 200000fc .word 0x200000fc 8001a50: 40001000 .word 0x40001000 8001a54: 40013800 .word 0x40013800 8001a58: 200000c0 .word 0x200000c0 8001a5c: 20000010 .word 0x20000010 8001a60: 200000a4 .word 0x200000a4 8001a64: 08002e53 .word 0x08002e53 8001a68: 08002e7d .word 0x08002e7d 8001a6c: 08002e8a .word 0x08002e8a 8001a70: 08002e93 .word 0x08002e93 8001a74: 08002e9f .word 0x08002e9f 8001a78: 08002eb0 .word 0x08002eb0 8001a7c: 200000bc .word 0x200000bc 8001a80: 200000b8 .word 0x200000b8 8001a84: 20000188 .word 0x20000188 8001a88: 200000b0 .word 0x200000b0 8001a8c: 200000a8 .word 0x200000a8 08001a90 : 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 8001a90: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001a92: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001a94: 4604 mov r4, r0 8001a96: 1a22 subs r2, r4, r0 8001a98: b2d2 uxtb r2, r2 8001a9a: 4291 cmp r1, r2 8001a9c: d801 bhi.n 8001aa2 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 8001a9e: 4618 mov r0, r3 8001aa0: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 8001aa2: f814 2b01 ldrb.w r2, [r4], #1 8001aa6: 4053 eors r3, r2 8001aa8: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001aaa: f013 0f80 tst.w r3, #128 ; 0x80 8001aae: f102 32ff add.w r2, r2, #4294967295 8001ab2: ea4f 0343 mov.w r3, r3, lsl #1 8001ab6: bf18 it ne 8001ab8: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001abc: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8001ac0: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001ac2: d1f2 bne.n 8001aaa 8001ac4: e7e7 b.n 8001a96 08001ac6 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8001ac6: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001ac8: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001aca: 4605 mov r5, r0 8001acc: 1a2c subs r4, r5, r0 8001ace: b2e4 uxtb r4, r4 8001ad0: 42a1 cmp r1, r4 8001ad2: d803 bhi.n 8001adc else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8001ad4: 1a9b subs r3, r3, r2 8001ad6: 4258 negs r0, r3 8001ad8: 4158 adcs r0, r3 8001ada: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8001adc: f815 4b01 ldrb.w r4, [r5], #1 8001ae0: 4063 eors r3, r4 8001ae2: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001ae4: f013 0f80 tst.w r3, #128 ; 0x80 8001ae8: f104 34ff add.w r4, r4, #4294967295 8001aec: ea4f 0343 mov.w r3, r3, lsl #1 8001af0: bf18 it ne 8001af2: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001af6: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8001afa: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001afc: d1f2 bne.n 8001ae4 8001afe: e7e5 b.n 8001acc 08001b00 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001b00: 4b0e ldr r3, [pc, #56] ; (8001b3c ) { 8001b02: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8001b04: 699a ldr r2, [r3, #24] 8001b06: f042 0201 orr.w r2, r2, #1 8001b0a: 619a str r2, [r3, #24] 8001b0c: 699a ldr r2, [r3, #24] 8001b0e: f002 0201 and.w r2, r2, #1 8001b12: 9200 str r2, [sp, #0] 8001b14: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8001b16: 69da ldr r2, [r3, #28] 8001b18: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8001b1c: 61da str r2, [r3, #28] 8001b1e: 69db ldr r3, [r3, #28] /* System interrupt init*/ /**DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001b20: 4a07 ldr r2, [pc, #28] ; (8001b40 ) __HAL_RCC_PWR_CLK_ENABLE(); 8001b22: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001b26: 9301 str r3, [sp, #4] 8001b28: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001b2a: 6853 ldr r3, [r2, #4] 8001b2c: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8001b30: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8001b34: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001b36: b002 add sp, #8 8001b38: 4770 bx lr 8001b3a: bf00 nop 8001b3c: 40021000 .word 0x40021000 8001b40: 40010000 .word 0x40010000 08001b44 : * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8001b44: 6802 ldr r2, [r0, #0] 8001b46: 4b08 ldr r3, [pc, #32] ; (8001b68 ) { 8001b48: b082 sub sp, #8 if(htim_base->Instance==TIM6) 8001b4a: 429a cmp r2, r3 8001b4c: d10a bne.n 8001b64 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8001b4e: f503 3300 add.w r3, r3, #131072 ; 0x20000 8001b52: 69da ldr r2, [r3, #28] 8001b54: f042 0210 orr.w r2, r2, #16 8001b58: 61da str r2, [r3, #28] 8001b5a: 69db ldr r3, [r3, #28] 8001b5c: f003 0310 and.w r3, r3, #16 8001b60: 9301 str r3, [sp, #4] 8001b62: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8001b64: b002 add sp, #8 8001b66: 4770 bx lr 8001b68: 40001000 .word 0x40001000 08001b6c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001b6c: b510 push {r4, lr} 8001b6e: 4604 mov r4, r0 8001b70: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001b72: 2210 movs r2, #16 8001b74: 2100 movs r1, #0 8001b76: a802 add r0, sp, #8 8001b78: f000 f8ba bl 8001cf0 if(huart->Instance==USART1) 8001b7c: 6822 ldr r2, [r4, #0] 8001b7e: 4b17 ldr r3, [pc, #92] ; (8001bdc ) 8001b80: 429a cmp r2, r3 8001b82: d128 bne.n 8001bd6 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8001b84: f503 4358 add.w r3, r3, #55296 ; 0xd800 8001b88: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001b8a: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8001b8c: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8001b90: 619a str r2, [r3, #24] 8001b92: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001b94: 4812 ldr r0, [pc, #72] ; (8001be0 ) __HAL_RCC_USART1_CLK_ENABLE(); 8001b96: f402 4280 and.w r2, r2, #16384 ; 0x4000 8001b9a: 9200 str r2, [sp, #0] 8001b9c: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001b9e: 699a ldr r2, [r3, #24] 8001ba0: f042 0204 orr.w r2, r2, #4 8001ba4: 619a str r2, [r3, #24] 8001ba6: 699b ldr r3, [r3, #24] 8001ba8: f003 0304 and.w r3, r3, #4 8001bac: 9301 str r3, [sp, #4] 8001bae: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8001bb0: f44f 7300 mov.w r3, #512 ; 0x200 8001bb4: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001bb6: 2302 movs r3, #2 8001bb8: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001bba: 2303 movs r3, #3 8001bbc: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001bbe: f7fe fd93 bl 80006e8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8001bc2: f44f 6380 mov.w r3, #1024 ; 0x400 8001bc6: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001bc8: 2300 movs r3, #0 GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001bca: a902 add r1, sp, #8 8001bcc: 4804 ldr r0, [pc, #16] ; (8001be0 ) GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001bce: 9303 str r3, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001bd0: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001bd2: f7fe fd89 bl 80006e8 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8001bd6: b006 add sp, #24 8001bd8: bd10 pop {r4, pc} 8001bda: bf00 nop 8001bdc: 40013800 .word 0x40013800 8001be0: 40010800 .word 0x40010800 08001be4 : 8001be4: 4770 bx lr 08001be6 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001be6: e7fe b.n 8001be6 08001be8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001be8: e7fe b.n 8001be8 08001bea : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8001bea: e7fe b.n 8001bea 08001bec : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001bec: e7fe b.n 8001bec 08001bee : 8001bee: 4770 bx lr 08001bf0 : 8001bf0: 4770 bx lr 08001bf2 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8001bf2: 4770 bx lr 08001bf4 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001bf4: f7fe bb58 b.w 80002a8 08001bf8 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8001bf8: 4801 ldr r0, [pc, #4] ; (8001c00 ) 8001bfa: f7ff bc07 b.w 800140c 8001bfe: bf00 nop 8001c00: 200000fc .word 0x200000fc 08001c04 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8001c04: 4801 ldr r0, [pc, #4] ; (8001c0c ) 8001c06: f7ff b90e b.w 8000e26 8001c0a: bf00 nop 8001c0c: 20000140 .word 0x20000140 08001c10 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8001c10: 4b0f ldr r3, [pc, #60] ; (8001c50 ) 8001c12: 681a ldr r2, [r3, #0] 8001c14: f042 0201 orr.w r2, r2, #1 8001c18: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8001c1a: 6859 ldr r1, [r3, #4] 8001c1c: 4a0d ldr r2, [pc, #52] ; (8001c54 ) 8001c1e: 400a ands r2, r1 8001c20: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8001c22: 681a ldr r2, [r3, #0] 8001c24: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8001c28: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8001c2c: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8001c2e: 681a ldr r2, [r3, #0] 8001c30: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8001c34: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8001c36: 685a ldr r2, [r3, #4] 8001c38: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8001c3c: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8001c3e: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8001c42: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8001c44: f04f 6200 mov.w r2, #134217728 ; 0x8000000 8001c48: 4b03 ldr r3, [pc, #12] ; (8001c58 ) 8001c4a: 609a str r2, [r3, #8] 8001c4c: 4770 bx lr 8001c4e: bf00 nop 8001c50: 40021000 .word 0x40021000 8001c54: f8ff0000 .word 0xf8ff0000 8001c58: e000ed00 .word 0xe000ed00 08001c5c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8001c5c: 2100 movs r1, #0 b LoopCopyDataInit 8001c5e: e003 b.n 8001c68 08001c60 : CopyDataInit: ldr r3, =_sidata 8001c60: 4b0b ldr r3, [pc, #44] ; (8001c90 ) ldr r3, [r3, r1] 8001c62: 585b ldr r3, [r3, r1] str r3, [r0, r1] 8001c64: 5043 str r3, [r0, r1] adds r1, r1, #4 8001c66: 3104 adds r1, #4 08001c68 : LoopCopyDataInit: ldr r0, =_sdata 8001c68: 480a ldr r0, [pc, #40] ; (8001c94 ) ldr r3, =_edata 8001c6a: 4b0b ldr r3, [pc, #44] ; (8001c98 ) adds r2, r0, r1 8001c6c: 1842 adds r2, r0, r1 cmp r2, r3 8001c6e: 429a cmp r2, r3 bcc CopyDataInit 8001c70: d3f6 bcc.n 8001c60 ldr r2, =_sbss 8001c72: 4a0a ldr r2, [pc, #40] ; (8001c9c ) b LoopFillZerobss 8001c74: e002 b.n 8001c7c 08001c76 : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 8001c76: 2300 movs r3, #0 str r3, [r2], #4 8001c78: f842 3b04 str.w r3, [r2], #4 08001c7c : LoopFillZerobss: ldr r3, = _ebss 8001c7c: 4b08 ldr r3, [pc, #32] ; (8001ca0 ) cmp r2, r3 8001c7e: 429a cmp r2, r3 bcc FillZerobss 8001c80: d3f9 bcc.n 8001c76 /* Call the clock system intitialization function.*/ bl SystemInit 8001c82: f7ff ffc5 bl 8001c10 /* Call static constructors */ bl __libc_init_array 8001c86: f000 f80f bl 8001ca8 <__libc_init_array> /* Call the application's entry point.*/ bl main 8001c8a: f7ff fddf bl 800184c
bx lr 8001c8e: 4770 bx lr ldr r3, =_sidata 8001c90: 08002f88 .word 0x08002f88 ldr r0, =_sdata 8001c94: 20000000 .word 0x20000000 ldr r3, =_edata 8001c98: 20000074 .word 0x20000074 ldr r2, =_sbss 8001c9c: 20000078 .word 0x20000078 ldr r3, = _ebss 8001ca0: 2000028c .word 0x2000028c 08001ca4 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001ca4: e7fe b.n 8001ca4 ... 08001ca8 <__libc_init_array>: 8001ca8: b570 push {r4, r5, r6, lr} 8001caa: 2500 movs r5, #0 8001cac: 4e0c ldr r6, [pc, #48] ; (8001ce0 <__libc_init_array+0x38>) 8001cae: 4c0d ldr r4, [pc, #52] ; (8001ce4 <__libc_init_array+0x3c>) 8001cb0: 1ba4 subs r4, r4, r6 8001cb2: 10a4 asrs r4, r4, #2 8001cb4: 42a5 cmp r5, r4 8001cb6: d109 bne.n 8001ccc <__libc_init_array+0x24> 8001cb8: f001 f87e bl 8002db8 <_init> 8001cbc: 2500 movs r5, #0 8001cbe: 4e0a ldr r6, [pc, #40] ; (8001ce8 <__libc_init_array+0x40>) 8001cc0: 4c0a ldr r4, [pc, #40] ; (8001cec <__libc_init_array+0x44>) 8001cc2: 1ba4 subs r4, r4, r6 8001cc4: 10a4 asrs r4, r4, #2 8001cc6: 42a5 cmp r5, r4 8001cc8: d105 bne.n 8001cd6 <__libc_init_array+0x2e> 8001cca: bd70 pop {r4, r5, r6, pc} 8001ccc: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8001cd0: 4798 blx r3 8001cd2: 3501 adds r5, #1 8001cd4: e7ee b.n 8001cb4 <__libc_init_array+0xc> 8001cd6: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8001cda: 4798 blx r3 8001cdc: 3501 adds r5, #1 8001cde: e7f2 b.n 8001cc6 <__libc_init_array+0x1e> 8001ce0: 08002f80 .word 0x08002f80 8001ce4: 08002f80 .word 0x08002f80 8001ce8: 08002f80 .word 0x08002f80 8001cec: 08002f84 .word 0x08002f84 08001cf0 : 8001cf0: 4603 mov r3, r0 8001cf2: 4402 add r2, r0 8001cf4: 4293 cmp r3, r2 8001cf6: d100 bne.n 8001cfa 8001cf8: 4770 bx lr 8001cfa: f803 1b01 strb.w r1, [r3], #1 8001cfe: e7f9 b.n 8001cf4 08001d00 : 8001d00: b40f push {r0, r1, r2, r3} 8001d02: 4b0a ldr r3, [pc, #40] ; (8001d2c ) 8001d04: b513 push {r0, r1, r4, lr} 8001d06: 681c ldr r4, [r3, #0] 8001d08: b124 cbz r4, 8001d14 8001d0a: 69a3 ldr r3, [r4, #24] 8001d0c: b913 cbnz r3, 8001d14 8001d0e: 4620 mov r0, r4 8001d10: f000 fada bl 80022c8 <__sinit> 8001d14: ab05 add r3, sp, #20 8001d16: 9a04 ldr r2, [sp, #16] 8001d18: 68a1 ldr r1, [r4, #8] 8001d1a: 4620 mov r0, r4 8001d1c: 9301 str r3, [sp, #4] 8001d1e: f000 fc9b bl 8002658 <_vfiprintf_r> 8001d22: b002 add sp, #8 8001d24: e8bd 4010 ldmia.w sp!, {r4, lr} 8001d28: b004 add sp, #16 8001d2a: 4770 bx lr 8001d2c: 20000010 .word 0x20000010 08001d30 <_puts_r>: 8001d30: b570 push {r4, r5, r6, lr} 8001d32: 460e mov r6, r1 8001d34: 4605 mov r5, r0 8001d36: b118 cbz r0, 8001d40 <_puts_r+0x10> 8001d38: 6983 ldr r3, [r0, #24] 8001d3a: b90b cbnz r3, 8001d40 <_puts_r+0x10> 8001d3c: f000 fac4 bl 80022c8 <__sinit> 8001d40: 69ab ldr r3, [r5, #24] 8001d42: 68ac ldr r4, [r5, #8] 8001d44: b913 cbnz r3, 8001d4c <_puts_r+0x1c> 8001d46: 4628 mov r0, r5 8001d48: f000 fabe bl 80022c8 <__sinit> 8001d4c: 4b23 ldr r3, [pc, #140] ; (8001ddc <_puts_r+0xac>) 8001d4e: 429c cmp r4, r3 8001d50: d117 bne.n 8001d82 <_puts_r+0x52> 8001d52: 686c ldr r4, [r5, #4] 8001d54: 89a3 ldrh r3, [r4, #12] 8001d56: 071b lsls r3, r3, #28 8001d58: d51d bpl.n 8001d96 <_puts_r+0x66> 8001d5a: 6923 ldr r3, [r4, #16] 8001d5c: b1db cbz r3, 8001d96 <_puts_r+0x66> 8001d5e: 3e01 subs r6, #1 8001d60: 68a3 ldr r3, [r4, #8] 8001d62: f816 1f01 ldrb.w r1, [r6, #1]! 8001d66: 3b01 subs r3, #1 8001d68: 60a3 str r3, [r4, #8] 8001d6a: b9e9 cbnz r1, 8001da8 <_puts_r+0x78> 8001d6c: 2b00 cmp r3, #0 8001d6e: da2e bge.n 8001dce <_puts_r+0x9e> 8001d70: 4622 mov r2, r4 8001d72: 210a movs r1, #10 8001d74: 4628 mov r0, r5 8001d76: f000 f8f5 bl 8001f64 <__swbuf_r> 8001d7a: 3001 adds r0, #1 8001d7c: d011 beq.n 8001da2 <_puts_r+0x72> 8001d7e: 200a movs r0, #10 8001d80: bd70 pop {r4, r5, r6, pc} 8001d82: 4b17 ldr r3, [pc, #92] ; (8001de0 <_puts_r+0xb0>) 8001d84: 429c cmp r4, r3 8001d86: d101 bne.n 8001d8c <_puts_r+0x5c> 8001d88: 68ac ldr r4, [r5, #8] 8001d8a: e7e3 b.n 8001d54 <_puts_r+0x24> 8001d8c: 4b15 ldr r3, [pc, #84] ; (8001de4 <_puts_r+0xb4>) 8001d8e: 429c cmp r4, r3 8001d90: bf08 it eq 8001d92: 68ec ldreq r4, [r5, #12] 8001d94: e7de b.n 8001d54 <_puts_r+0x24> 8001d96: 4621 mov r1, r4 8001d98: 4628 mov r0, r5 8001d9a: f000 f935 bl 8002008 <__swsetup_r> 8001d9e: 2800 cmp r0, #0 8001da0: d0dd beq.n 8001d5e <_puts_r+0x2e> 8001da2: f04f 30ff mov.w r0, #4294967295 8001da6: bd70 pop {r4, r5, r6, pc} 8001da8: 2b00 cmp r3, #0 8001daa: da04 bge.n 8001db6 <_puts_r+0x86> 8001dac: 69a2 ldr r2, [r4, #24] 8001dae: 4293 cmp r3, r2 8001db0: db06 blt.n 8001dc0 <_puts_r+0x90> 8001db2: 290a cmp r1, #10 8001db4: d004 beq.n 8001dc0 <_puts_r+0x90> 8001db6: 6823 ldr r3, [r4, #0] 8001db8: 1c5a adds r2, r3, #1 8001dba: 6022 str r2, [r4, #0] 8001dbc: 7019 strb r1, [r3, #0] 8001dbe: e7cf b.n 8001d60 <_puts_r+0x30> 8001dc0: 4622 mov r2, r4 8001dc2: 4628 mov r0, r5 8001dc4: f000 f8ce bl 8001f64 <__swbuf_r> 8001dc8: 3001 adds r0, #1 8001dca: d1c9 bne.n 8001d60 <_puts_r+0x30> 8001dcc: e7e9 b.n 8001da2 <_puts_r+0x72> 8001dce: 200a movs r0, #10 8001dd0: 6823 ldr r3, [r4, #0] 8001dd2: 1c5a adds r2, r3, #1 8001dd4: 6022 str r2, [r4, #0] 8001dd6: 7018 strb r0, [r3, #0] 8001dd8: bd70 pop {r4, r5, r6, pc} 8001dda: bf00 nop 8001ddc: 08002f0c .word 0x08002f0c 8001de0: 08002f2c .word 0x08002f2c 8001de4: 08002eec .word 0x08002eec 08001de8 : 8001de8: 4b02 ldr r3, [pc, #8] ; (8001df4 ) 8001dea: 4601 mov r1, r0 8001dec: 6818 ldr r0, [r3, #0] 8001dee: f7ff bf9f b.w 8001d30 <_puts_r> 8001df2: bf00 nop 8001df4: 20000010 .word 0x20000010 08001df8 : 8001df8: 2900 cmp r1, #0 8001dfa: f44f 6380 mov.w r3, #1024 ; 0x400 8001dfe: bf0c ite eq 8001e00: 2202 moveq r2, #2 8001e02: 2200 movne r2, #0 8001e04: f000 b800 b.w 8001e08 08001e08 : 8001e08: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8001e0c: 461d mov r5, r3 8001e0e: 4b51 ldr r3, [pc, #324] ; (8001f54 ) 8001e10: 4604 mov r4, r0 8001e12: 681e ldr r6, [r3, #0] 8001e14: 460f mov r7, r1 8001e16: 4690 mov r8, r2 8001e18: b126 cbz r6, 8001e24 8001e1a: 69b3 ldr r3, [r6, #24] 8001e1c: b913 cbnz r3, 8001e24 8001e1e: 4630 mov r0, r6 8001e20: f000 fa52 bl 80022c8 <__sinit> 8001e24: 4b4c ldr r3, [pc, #304] ; (8001f58 ) 8001e26: 429c cmp r4, r3 8001e28: d152 bne.n 8001ed0 8001e2a: 6874 ldr r4, [r6, #4] 8001e2c: f1b8 0f02 cmp.w r8, #2 8001e30: d006 beq.n 8001e40 8001e32: f1b8 0f01 cmp.w r8, #1 8001e36: f200 8089 bhi.w 8001f4c 8001e3a: 2d00 cmp r5, #0 8001e3c: f2c0 8086 blt.w 8001f4c 8001e40: 4621 mov r1, r4 8001e42: 4630 mov r0, r6 8001e44: f000 f9d6 bl 80021f4 <_fflush_r> 8001e48: 6b61 ldr r1, [r4, #52] ; 0x34 8001e4a: b141 cbz r1, 8001e5e 8001e4c: f104 0344 add.w r3, r4, #68 ; 0x44 8001e50: 4299 cmp r1, r3 8001e52: d002 beq.n 8001e5a 8001e54: 4630 mov r0, r6 8001e56: f000 fb2d bl 80024b4 <_free_r> 8001e5a: 2300 movs r3, #0 8001e5c: 6363 str r3, [r4, #52] ; 0x34 8001e5e: 2300 movs r3, #0 8001e60: 61a3 str r3, [r4, #24] 8001e62: 6063 str r3, [r4, #4] 8001e64: 89a3 ldrh r3, [r4, #12] 8001e66: 061b lsls r3, r3, #24 8001e68: d503 bpl.n 8001e72 8001e6a: 6921 ldr r1, [r4, #16] 8001e6c: 4630 mov r0, r6 8001e6e: f000 fb21 bl 80024b4 <_free_r> 8001e72: 89a3 ldrh r3, [r4, #12] 8001e74: f1b8 0f02 cmp.w r8, #2 8001e78: f423 634a bic.w r3, r3, #3232 ; 0xca0 8001e7c: f023 0303 bic.w r3, r3, #3 8001e80: 81a3 strh r3, [r4, #12] 8001e82: d05d beq.n 8001f40 8001e84: ab01 add r3, sp, #4 8001e86: 466a mov r2, sp 8001e88: 4621 mov r1, r4 8001e8a: 4630 mov r0, r6 8001e8c: f000 faa6 bl 80023dc <__swhatbuf_r> 8001e90: 89a3 ldrh r3, [r4, #12] 8001e92: 4318 orrs r0, r3 8001e94: 81a0 strh r0, [r4, #12] 8001e96: bb2d cbnz r5, 8001ee4 8001e98: 9d00 ldr r5, [sp, #0] 8001e9a: 4628 mov r0, r5 8001e9c: f000 fb02 bl 80024a4 8001ea0: 4607 mov r7, r0 8001ea2: 2800 cmp r0, #0 8001ea4: d14e bne.n 8001f44 8001ea6: f8dd 9000 ldr.w r9, [sp] 8001eaa: 45a9 cmp r9, r5 8001eac: d13c bne.n 8001f28 8001eae: f04f 30ff mov.w r0, #4294967295 8001eb2: 89a3 ldrh r3, [r4, #12] 8001eb4: f043 0302 orr.w r3, r3, #2 8001eb8: 81a3 strh r3, [r4, #12] 8001eba: 2300 movs r3, #0 8001ebc: 60a3 str r3, [r4, #8] 8001ebe: f104 0347 add.w r3, r4, #71 ; 0x47 8001ec2: 6023 str r3, [r4, #0] 8001ec4: 6123 str r3, [r4, #16] 8001ec6: 2301 movs r3, #1 8001ec8: 6163 str r3, [r4, #20] 8001eca: b003 add sp, #12 8001ecc: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8001ed0: 4b22 ldr r3, [pc, #136] ; (8001f5c ) 8001ed2: 429c cmp r4, r3 8001ed4: d101 bne.n 8001eda 8001ed6: 68b4 ldr r4, [r6, #8] 8001ed8: e7a8 b.n 8001e2c 8001eda: 4b21 ldr r3, [pc, #132] ; (8001f60 ) 8001edc: 429c cmp r4, r3 8001ede: bf08 it eq 8001ee0: 68f4 ldreq r4, [r6, #12] 8001ee2: e7a3 b.n 8001e2c 8001ee4: 2f00 cmp r7, #0 8001ee6: d0d8 beq.n 8001e9a 8001ee8: 69b3 ldr r3, [r6, #24] 8001eea: b913 cbnz r3, 8001ef2 8001eec: 4630 mov r0, r6 8001eee: f000 f9eb bl 80022c8 <__sinit> 8001ef2: f1b8 0f01 cmp.w r8, #1 8001ef6: bf08 it eq 8001ef8: 89a3 ldrheq r3, [r4, #12] 8001efa: 6027 str r7, [r4, #0] 8001efc: bf04 itt eq 8001efe: f043 0301 orreq.w r3, r3, #1 8001f02: 81a3 strheq r3, [r4, #12] 8001f04: 89a3 ldrh r3, [r4, #12] 8001f06: 6127 str r7, [r4, #16] 8001f08: f013 0008 ands.w r0, r3, #8 8001f0c: 6165 str r5, [r4, #20] 8001f0e: d01b beq.n 8001f48 8001f10: f013 0001 ands.w r0, r3, #1 8001f14: f04f 0300 mov.w r3, #0 8001f18: bf1f itttt ne 8001f1a: 426d negne r5, r5 8001f1c: 60a3 strne r3, [r4, #8] 8001f1e: 61a5 strne r5, [r4, #24] 8001f20: 4618 movne r0, r3 8001f22: bf08 it eq 8001f24: 60a5 streq r5, [r4, #8] 8001f26: e7d0 b.n 8001eca 8001f28: 4648 mov r0, r9 8001f2a: f000 fabb bl 80024a4 8001f2e: 4607 mov r7, r0 8001f30: 2800 cmp r0, #0 8001f32: d0bc beq.n 8001eae 8001f34: 89a3 ldrh r3, [r4, #12] 8001f36: 464d mov r5, r9 8001f38: f043 0380 orr.w r3, r3, #128 ; 0x80 8001f3c: 81a3 strh r3, [r4, #12] 8001f3e: e7d3 b.n 8001ee8 8001f40: 2000 movs r0, #0 8001f42: e7b6 b.n 8001eb2 8001f44: 46a9 mov r9, r5 8001f46: e7f5 b.n 8001f34 8001f48: 60a0 str r0, [r4, #8] 8001f4a: e7be b.n 8001eca 8001f4c: f04f 30ff mov.w r0, #4294967295 8001f50: e7bb b.n 8001eca 8001f52: bf00 nop 8001f54: 20000010 .word 0x20000010 8001f58: 08002f0c .word 0x08002f0c 8001f5c: 08002f2c .word 0x08002f2c 8001f60: 08002eec .word 0x08002eec 08001f64 <__swbuf_r>: 8001f64: b5f8 push {r3, r4, r5, r6, r7, lr} 8001f66: 460e mov r6, r1 8001f68: 4614 mov r4, r2 8001f6a: 4605 mov r5, r0 8001f6c: b118 cbz r0, 8001f76 <__swbuf_r+0x12> 8001f6e: 6983 ldr r3, [r0, #24] 8001f70: b90b cbnz r3, 8001f76 <__swbuf_r+0x12> 8001f72: f000 f9a9 bl 80022c8 <__sinit> 8001f76: 4b21 ldr r3, [pc, #132] ; (8001ffc <__swbuf_r+0x98>) 8001f78: 429c cmp r4, r3 8001f7a: d12a bne.n 8001fd2 <__swbuf_r+0x6e> 8001f7c: 686c ldr r4, [r5, #4] 8001f7e: 69a3 ldr r3, [r4, #24] 8001f80: 60a3 str r3, [r4, #8] 8001f82: 89a3 ldrh r3, [r4, #12] 8001f84: 071a lsls r2, r3, #28 8001f86: d52e bpl.n 8001fe6 <__swbuf_r+0x82> 8001f88: 6923 ldr r3, [r4, #16] 8001f8a: b363 cbz r3, 8001fe6 <__swbuf_r+0x82> 8001f8c: 6923 ldr r3, [r4, #16] 8001f8e: 6820 ldr r0, [r4, #0] 8001f90: b2f6 uxtb r6, r6 8001f92: 1ac0 subs r0, r0, r3 8001f94: 6963 ldr r3, [r4, #20] 8001f96: 4637 mov r7, r6 8001f98: 4298 cmp r0, r3 8001f9a: db04 blt.n 8001fa6 <__swbuf_r+0x42> 8001f9c: 4621 mov r1, r4 8001f9e: 4628 mov r0, r5 8001fa0: f000 f928 bl 80021f4 <_fflush_r> 8001fa4: bb28 cbnz r0, 8001ff2 <__swbuf_r+0x8e> 8001fa6: 68a3 ldr r3, [r4, #8] 8001fa8: 3001 adds r0, #1 8001faa: 3b01 subs r3, #1 8001fac: 60a3 str r3, [r4, #8] 8001fae: 6823 ldr r3, [r4, #0] 8001fb0: 1c5a adds r2, r3, #1 8001fb2: 6022 str r2, [r4, #0] 8001fb4: 701e strb r6, [r3, #0] 8001fb6: 6963 ldr r3, [r4, #20] 8001fb8: 4298 cmp r0, r3 8001fba: d004 beq.n 8001fc6 <__swbuf_r+0x62> 8001fbc: 89a3 ldrh r3, [r4, #12] 8001fbe: 07db lsls r3, r3, #31 8001fc0: d519 bpl.n 8001ff6 <__swbuf_r+0x92> 8001fc2: 2e0a cmp r6, #10 8001fc4: d117 bne.n 8001ff6 <__swbuf_r+0x92> 8001fc6: 4621 mov r1, r4 8001fc8: 4628 mov r0, r5 8001fca: f000 f913 bl 80021f4 <_fflush_r> 8001fce: b190 cbz r0, 8001ff6 <__swbuf_r+0x92> 8001fd0: e00f b.n 8001ff2 <__swbuf_r+0x8e> 8001fd2: 4b0b ldr r3, [pc, #44] ; (8002000 <__swbuf_r+0x9c>) 8001fd4: 429c cmp r4, r3 8001fd6: d101 bne.n 8001fdc <__swbuf_r+0x78> 8001fd8: 68ac ldr r4, [r5, #8] 8001fda: e7d0 b.n 8001f7e <__swbuf_r+0x1a> 8001fdc: 4b09 ldr r3, [pc, #36] ; (8002004 <__swbuf_r+0xa0>) 8001fde: 429c cmp r4, r3 8001fe0: bf08 it eq 8001fe2: 68ec ldreq r4, [r5, #12] 8001fe4: e7cb b.n 8001f7e <__swbuf_r+0x1a> 8001fe6: 4621 mov r1, r4 8001fe8: 4628 mov r0, r5 8001fea: f000 f80d bl 8002008 <__swsetup_r> 8001fee: 2800 cmp r0, #0 8001ff0: d0cc beq.n 8001f8c <__swbuf_r+0x28> 8001ff2: f04f 37ff mov.w r7, #4294967295 8001ff6: 4638 mov r0, r7 8001ff8: bdf8 pop {r3, r4, r5, r6, r7, pc} 8001ffa: bf00 nop 8001ffc: 08002f0c .word 0x08002f0c 8002000: 08002f2c .word 0x08002f2c 8002004: 08002eec .word 0x08002eec 08002008 <__swsetup_r>: 8002008: 4b32 ldr r3, [pc, #200] ; (80020d4 <__swsetup_r+0xcc>) 800200a: b570 push {r4, r5, r6, lr} 800200c: 681d ldr r5, [r3, #0] 800200e: 4606 mov r6, r0 8002010: 460c mov r4, r1 8002012: b125 cbz r5, 800201e <__swsetup_r+0x16> 8002014: 69ab ldr r3, [r5, #24] 8002016: b913 cbnz r3, 800201e <__swsetup_r+0x16> 8002018: 4628 mov r0, r5 800201a: f000 f955 bl 80022c8 <__sinit> 800201e: 4b2e ldr r3, [pc, #184] ; (80020d8 <__swsetup_r+0xd0>) 8002020: 429c cmp r4, r3 8002022: d10f bne.n 8002044 <__swsetup_r+0x3c> 8002024: 686c ldr r4, [r5, #4] 8002026: f9b4 300c ldrsh.w r3, [r4, #12] 800202a: b29a uxth r2, r3 800202c: 0715 lsls r5, r2, #28 800202e: d42c bmi.n 800208a <__swsetup_r+0x82> 8002030: 06d0 lsls r0, r2, #27 8002032: d411 bmi.n 8002058 <__swsetup_r+0x50> 8002034: 2209 movs r2, #9 8002036: 6032 str r2, [r6, #0] 8002038: f043 0340 orr.w r3, r3, #64 ; 0x40 800203c: 81a3 strh r3, [r4, #12] 800203e: f04f 30ff mov.w r0, #4294967295 8002042: bd70 pop {r4, r5, r6, pc} 8002044: 4b25 ldr r3, [pc, #148] ; (80020dc <__swsetup_r+0xd4>) 8002046: 429c cmp r4, r3 8002048: d101 bne.n 800204e <__swsetup_r+0x46> 800204a: 68ac ldr r4, [r5, #8] 800204c: e7eb b.n 8002026 <__swsetup_r+0x1e> 800204e: 4b24 ldr r3, [pc, #144] ; (80020e0 <__swsetup_r+0xd8>) 8002050: 429c cmp r4, r3 8002052: bf08 it eq 8002054: 68ec ldreq r4, [r5, #12] 8002056: e7e6 b.n 8002026 <__swsetup_r+0x1e> 8002058: 0751 lsls r1, r2, #29 800205a: d512 bpl.n 8002082 <__swsetup_r+0x7a> 800205c: 6b61 ldr r1, [r4, #52] ; 0x34 800205e: b141 cbz r1, 8002072 <__swsetup_r+0x6a> 8002060: f104 0344 add.w r3, r4, #68 ; 0x44 8002064: 4299 cmp r1, r3 8002066: d002 beq.n 800206e <__swsetup_r+0x66> 8002068: 4630 mov r0, r6 800206a: f000 fa23 bl 80024b4 <_free_r> 800206e: 2300 movs r3, #0 8002070: 6363 str r3, [r4, #52] ; 0x34 8002072: 89a3 ldrh r3, [r4, #12] 8002074: f023 0324 bic.w r3, r3, #36 ; 0x24 8002078: 81a3 strh r3, [r4, #12] 800207a: 2300 movs r3, #0 800207c: 6063 str r3, [r4, #4] 800207e: 6923 ldr r3, [r4, #16] 8002080: 6023 str r3, [r4, #0] 8002082: 89a3 ldrh r3, [r4, #12] 8002084: f043 0308 orr.w r3, r3, #8 8002088: 81a3 strh r3, [r4, #12] 800208a: 6923 ldr r3, [r4, #16] 800208c: b94b cbnz r3, 80020a2 <__swsetup_r+0x9a> 800208e: 89a3 ldrh r3, [r4, #12] 8002090: f403 7320 and.w r3, r3, #640 ; 0x280 8002094: f5b3 7f00 cmp.w r3, #512 ; 0x200 8002098: d003 beq.n 80020a2 <__swsetup_r+0x9a> 800209a: 4621 mov r1, r4 800209c: 4630 mov r0, r6 800209e: f000 f9c1 bl 8002424 <__smakebuf_r> 80020a2: 89a2 ldrh r2, [r4, #12] 80020a4: f012 0301 ands.w r3, r2, #1 80020a8: d00c beq.n 80020c4 <__swsetup_r+0xbc> 80020aa: 2300 movs r3, #0 80020ac: 60a3 str r3, [r4, #8] 80020ae: 6963 ldr r3, [r4, #20] 80020b0: 425b negs r3, r3 80020b2: 61a3 str r3, [r4, #24] 80020b4: 6923 ldr r3, [r4, #16] 80020b6: b953 cbnz r3, 80020ce <__swsetup_r+0xc6> 80020b8: f9b4 300c ldrsh.w r3, [r4, #12] 80020bc: f013 0080 ands.w r0, r3, #128 ; 0x80 80020c0: d1ba bne.n 8002038 <__swsetup_r+0x30> 80020c2: bd70 pop {r4, r5, r6, pc} 80020c4: 0792 lsls r2, r2, #30 80020c6: bf58 it pl 80020c8: 6963 ldrpl r3, [r4, #20] 80020ca: 60a3 str r3, [r4, #8] 80020cc: e7f2 b.n 80020b4 <__swsetup_r+0xac> 80020ce: 2000 movs r0, #0 80020d0: e7f7 b.n 80020c2 <__swsetup_r+0xba> 80020d2: bf00 nop 80020d4: 20000010 .word 0x20000010 80020d8: 08002f0c .word 0x08002f0c 80020dc: 08002f2c .word 0x08002f2c 80020e0: 08002eec .word 0x08002eec 080020e4 <__sflush_r>: 80020e4: 898a ldrh r2, [r1, #12] 80020e6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80020ea: 4605 mov r5, r0 80020ec: 0710 lsls r0, r2, #28 80020ee: 460c mov r4, r1 80020f0: d45a bmi.n 80021a8 <__sflush_r+0xc4> 80020f2: 684b ldr r3, [r1, #4] 80020f4: 2b00 cmp r3, #0 80020f6: dc05 bgt.n 8002104 <__sflush_r+0x20> 80020f8: 6c0b ldr r3, [r1, #64] ; 0x40 80020fa: 2b00 cmp r3, #0 80020fc: dc02 bgt.n 8002104 <__sflush_r+0x20> 80020fe: 2000 movs r0, #0 8002100: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002104: 6ae6 ldr r6, [r4, #44] ; 0x2c 8002106: 2e00 cmp r6, #0 8002108: d0f9 beq.n 80020fe <__sflush_r+0x1a> 800210a: 2300 movs r3, #0 800210c: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8002110: 682f ldr r7, [r5, #0] 8002112: 602b str r3, [r5, #0] 8002114: d033 beq.n 800217e <__sflush_r+0x9a> 8002116: 6d60 ldr r0, [r4, #84] ; 0x54 8002118: 89a3 ldrh r3, [r4, #12] 800211a: 075a lsls r2, r3, #29 800211c: d505 bpl.n 800212a <__sflush_r+0x46> 800211e: 6863 ldr r3, [r4, #4] 8002120: 1ac0 subs r0, r0, r3 8002122: 6b63 ldr r3, [r4, #52] ; 0x34 8002124: b10b cbz r3, 800212a <__sflush_r+0x46> 8002126: 6c23 ldr r3, [r4, #64] ; 0x40 8002128: 1ac0 subs r0, r0, r3 800212a: 2300 movs r3, #0 800212c: 4602 mov r2, r0 800212e: 6ae6 ldr r6, [r4, #44] ; 0x2c 8002130: 6a21 ldr r1, [r4, #32] 8002132: 4628 mov r0, r5 8002134: 47b0 blx r6 8002136: 1c43 adds r3, r0, #1 8002138: 89a3 ldrh r3, [r4, #12] 800213a: d106 bne.n 800214a <__sflush_r+0x66> 800213c: 6829 ldr r1, [r5, #0] 800213e: 291d cmp r1, #29 8002140: d84b bhi.n 80021da <__sflush_r+0xf6> 8002142: 4a2b ldr r2, [pc, #172] ; (80021f0 <__sflush_r+0x10c>) 8002144: 40ca lsrs r2, r1 8002146: 07d6 lsls r6, r2, #31 8002148: d547 bpl.n 80021da <__sflush_r+0xf6> 800214a: 2200 movs r2, #0 800214c: 6062 str r2, [r4, #4] 800214e: 6922 ldr r2, [r4, #16] 8002150: 04d9 lsls r1, r3, #19 8002152: 6022 str r2, [r4, #0] 8002154: d504 bpl.n 8002160 <__sflush_r+0x7c> 8002156: 1c42 adds r2, r0, #1 8002158: d101 bne.n 800215e <__sflush_r+0x7a> 800215a: 682b ldr r3, [r5, #0] 800215c: b903 cbnz r3, 8002160 <__sflush_r+0x7c> 800215e: 6560 str r0, [r4, #84] ; 0x54 8002160: 6b61 ldr r1, [r4, #52] ; 0x34 8002162: 602f str r7, [r5, #0] 8002164: 2900 cmp r1, #0 8002166: d0ca beq.n 80020fe <__sflush_r+0x1a> 8002168: f104 0344 add.w r3, r4, #68 ; 0x44 800216c: 4299 cmp r1, r3 800216e: d002 beq.n 8002176 <__sflush_r+0x92> 8002170: 4628 mov r0, r5 8002172: f000 f99f bl 80024b4 <_free_r> 8002176: 2000 movs r0, #0 8002178: 6360 str r0, [r4, #52] ; 0x34 800217a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800217e: 6a21 ldr r1, [r4, #32] 8002180: 2301 movs r3, #1 8002182: 4628 mov r0, r5 8002184: 47b0 blx r6 8002186: 1c41 adds r1, r0, #1 8002188: d1c6 bne.n 8002118 <__sflush_r+0x34> 800218a: 682b ldr r3, [r5, #0] 800218c: 2b00 cmp r3, #0 800218e: d0c3 beq.n 8002118 <__sflush_r+0x34> 8002190: 2b1d cmp r3, #29 8002192: d001 beq.n 8002198 <__sflush_r+0xb4> 8002194: 2b16 cmp r3, #22 8002196: d101 bne.n 800219c <__sflush_r+0xb8> 8002198: 602f str r7, [r5, #0] 800219a: e7b0 b.n 80020fe <__sflush_r+0x1a> 800219c: 89a3 ldrh r3, [r4, #12] 800219e: f043 0340 orr.w r3, r3, #64 ; 0x40 80021a2: 81a3 strh r3, [r4, #12] 80021a4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80021a8: 690f ldr r7, [r1, #16] 80021aa: 2f00 cmp r7, #0 80021ac: d0a7 beq.n 80020fe <__sflush_r+0x1a> 80021ae: 0793 lsls r3, r2, #30 80021b0: bf18 it ne 80021b2: 2300 movne r3, #0 80021b4: 680e ldr r6, [r1, #0] 80021b6: bf08 it eq 80021b8: 694b ldreq r3, [r1, #20] 80021ba: eba6 0807 sub.w r8, r6, r7 80021be: 600f str r7, [r1, #0] 80021c0: 608b str r3, [r1, #8] 80021c2: f1b8 0f00 cmp.w r8, #0 80021c6: dd9a ble.n 80020fe <__sflush_r+0x1a> 80021c8: 4643 mov r3, r8 80021ca: 463a mov r2, r7 80021cc: 6a21 ldr r1, [r4, #32] 80021ce: 4628 mov r0, r5 80021d0: 6aa6 ldr r6, [r4, #40] ; 0x28 80021d2: 47b0 blx r6 80021d4: 2800 cmp r0, #0 80021d6: dc07 bgt.n 80021e8 <__sflush_r+0x104> 80021d8: 89a3 ldrh r3, [r4, #12] 80021da: f043 0340 orr.w r3, r3, #64 ; 0x40 80021de: 81a3 strh r3, [r4, #12] 80021e0: f04f 30ff mov.w r0, #4294967295 80021e4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80021e8: 4407 add r7, r0 80021ea: eba8 0800 sub.w r8, r8, r0 80021ee: e7e8 b.n 80021c2 <__sflush_r+0xde> 80021f0: 20400001 .word 0x20400001 080021f4 <_fflush_r>: 80021f4: b538 push {r3, r4, r5, lr} 80021f6: 690b ldr r3, [r1, #16] 80021f8: 4605 mov r5, r0 80021fa: 460c mov r4, r1 80021fc: b1db cbz r3, 8002236 <_fflush_r+0x42> 80021fe: b118 cbz r0, 8002208 <_fflush_r+0x14> 8002200: 6983 ldr r3, [r0, #24] 8002202: b90b cbnz r3, 8002208 <_fflush_r+0x14> 8002204: f000 f860 bl 80022c8 <__sinit> 8002208: 4b0c ldr r3, [pc, #48] ; (800223c <_fflush_r+0x48>) 800220a: 429c cmp r4, r3 800220c: d109 bne.n 8002222 <_fflush_r+0x2e> 800220e: 686c ldr r4, [r5, #4] 8002210: f9b4 300c ldrsh.w r3, [r4, #12] 8002214: b17b cbz r3, 8002236 <_fflush_r+0x42> 8002216: 4621 mov r1, r4 8002218: 4628 mov r0, r5 800221a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800221e: f7ff bf61 b.w 80020e4 <__sflush_r> 8002222: 4b07 ldr r3, [pc, #28] ; (8002240 <_fflush_r+0x4c>) 8002224: 429c cmp r4, r3 8002226: d101 bne.n 800222c <_fflush_r+0x38> 8002228: 68ac ldr r4, [r5, #8] 800222a: e7f1 b.n 8002210 <_fflush_r+0x1c> 800222c: 4b05 ldr r3, [pc, #20] ; (8002244 <_fflush_r+0x50>) 800222e: 429c cmp r4, r3 8002230: bf08 it eq 8002232: 68ec ldreq r4, [r5, #12] 8002234: e7ec b.n 8002210 <_fflush_r+0x1c> 8002236: 2000 movs r0, #0 8002238: bd38 pop {r3, r4, r5, pc} 800223a: bf00 nop 800223c: 08002f0c .word 0x08002f0c 8002240: 08002f2c .word 0x08002f2c 8002244: 08002eec .word 0x08002eec 08002248 <_cleanup_r>: 8002248: 4901 ldr r1, [pc, #4] ; (8002250 <_cleanup_r+0x8>) 800224a: f000 b8a9 b.w 80023a0 <_fwalk_reent> 800224e: bf00 nop 8002250: 080021f5 .word 0x080021f5 08002254 : 8002254: 2300 movs r3, #0 8002256: b510 push {r4, lr} 8002258: 4604 mov r4, r0 800225a: 6003 str r3, [r0, #0] 800225c: 6043 str r3, [r0, #4] 800225e: 6083 str r3, [r0, #8] 8002260: 8181 strh r1, [r0, #12] 8002262: 6643 str r3, [r0, #100] ; 0x64 8002264: 81c2 strh r2, [r0, #14] 8002266: 6103 str r3, [r0, #16] 8002268: 6143 str r3, [r0, #20] 800226a: 6183 str r3, [r0, #24] 800226c: 4619 mov r1, r3 800226e: 2208 movs r2, #8 8002270: 305c adds r0, #92 ; 0x5c 8002272: f7ff fd3d bl 8001cf0 8002276: 4b05 ldr r3, [pc, #20] ; (800228c ) 8002278: 6224 str r4, [r4, #32] 800227a: 6263 str r3, [r4, #36] ; 0x24 800227c: 4b04 ldr r3, [pc, #16] ; (8002290 ) 800227e: 62a3 str r3, [r4, #40] ; 0x28 8002280: 4b04 ldr r3, [pc, #16] ; (8002294 ) 8002282: 62e3 str r3, [r4, #44] ; 0x2c 8002284: 4b04 ldr r3, [pc, #16] ; (8002298 ) 8002286: 6323 str r3, [r4, #48] ; 0x30 8002288: bd10 pop {r4, pc} 800228a: bf00 nop 800228c: 08002bd5 .word 0x08002bd5 8002290: 08002bf7 .word 0x08002bf7 8002294: 08002c2f .word 0x08002c2f 8002298: 08002c53 .word 0x08002c53 0800229c <__sfmoreglue>: 800229c: b570 push {r4, r5, r6, lr} 800229e: 2568 movs r5, #104 ; 0x68 80022a0: 1e4a subs r2, r1, #1 80022a2: 4355 muls r5, r2 80022a4: 460e mov r6, r1 80022a6: f105 0174 add.w r1, r5, #116 ; 0x74 80022aa: f000 f94f bl 800254c <_malloc_r> 80022ae: 4604 mov r4, r0 80022b0: b140 cbz r0, 80022c4 <__sfmoreglue+0x28> 80022b2: 2100 movs r1, #0 80022b4: e880 0042 stmia.w r0, {r1, r6} 80022b8: 300c adds r0, #12 80022ba: 60a0 str r0, [r4, #8] 80022bc: f105 0268 add.w r2, r5, #104 ; 0x68 80022c0: f7ff fd16 bl 8001cf0 80022c4: 4620 mov r0, r4 80022c6: bd70 pop {r4, r5, r6, pc} 080022c8 <__sinit>: 80022c8: 6983 ldr r3, [r0, #24] 80022ca: b510 push {r4, lr} 80022cc: 4604 mov r4, r0 80022ce: bb33 cbnz r3, 800231e <__sinit+0x56> 80022d0: 6483 str r3, [r0, #72] ; 0x48 80022d2: 64c3 str r3, [r0, #76] ; 0x4c 80022d4: 6503 str r3, [r0, #80] ; 0x50 80022d6: 4b12 ldr r3, [pc, #72] ; (8002320 <__sinit+0x58>) 80022d8: 4a12 ldr r2, [pc, #72] ; (8002324 <__sinit+0x5c>) 80022da: 681b ldr r3, [r3, #0] 80022dc: 6282 str r2, [r0, #40] ; 0x28 80022de: 4298 cmp r0, r3 80022e0: bf04 itt eq 80022e2: 2301 moveq r3, #1 80022e4: 6183 streq r3, [r0, #24] 80022e6: f000 f81f bl 8002328 <__sfp> 80022ea: 6060 str r0, [r4, #4] 80022ec: 4620 mov r0, r4 80022ee: f000 f81b bl 8002328 <__sfp> 80022f2: 60a0 str r0, [r4, #8] 80022f4: 4620 mov r0, r4 80022f6: f000 f817 bl 8002328 <__sfp> 80022fa: 2200 movs r2, #0 80022fc: 60e0 str r0, [r4, #12] 80022fe: 2104 movs r1, #4 8002300: 6860 ldr r0, [r4, #4] 8002302: f7ff ffa7 bl 8002254 8002306: 2201 movs r2, #1 8002308: 2109 movs r1, #9 800230a: 68a0 ldr r0, [r4, #8] 800230c: f7ff ffa2 bl 8002254 8002310: 2202 movs r2, #2 8002312: 2112 movs r1, #18 8002314: 68e0 ldr r0, [r4, #12] 8002316: f7ff ff9d bl 8002254 800231a: 2301 movs r3, #1 800231c: 61a3 str r3, [r4, #24] 800231e: bd10 pop {r4, pc} 8002320: 08002ee8 .word 0x08002ee8 8002324: 08002249 .word 0x08002249 08002328 <__sfp>: 8002328: b5f8 push {r3, r4, r5, r6, r7, lr} 800232a: 4b1c ldr r3, [pc, #112] ; (800239c <__sfp+0x74>) 800232c: 4607 mov r7, r0 800232e: 681e ldr r6, [r3, #0] 8002330: 69b3 ldr r3, [r6, #24] 8002332: b913 cbnz r3, 800233a <__sfp+0x12> 8002334: 4630 mov r0, r6 8002336: f7ff ffc7 bl 80022c8 <__sinit> 800233a: 3648 adds r6, #72 ; 0x48 800233c: 68b4 ldr r4, [r6, #8] 800233e: 6873 ldr r3, [r6, #4] 8002340: 3b01 subs r3, #1 8002342: d503 bpl.n 800234c <__sfp+0x24> 8002344: 6833 ldr r3, [r6, #0] 8002346: b133 cbz r3, 8002356 <__sfp+0x2e> 8002348: 6836 ldr r6, [r6, #0] 800234a: e7f7 b.n 800233c <__sfp+0x14> 800234c: f9b4 500c ldrsh.w r5, [r4, #12] 8002350: b16d cbz r5, 800236e <__sfp+0x46> 8002352: 3468 adds r4, #104 ; 0x68 8002354: e7f4 b.n 8002340 <__sfp+0x18> 8002356: 2104 movs r1, #4 8002358: 4638 mov r0, r7 800235a: f7ff ff9f bl 800229c <__sfmoreglue> 800235e: 6030 str r0, [r6, #0] 8002360: 2800 cmp r0, #0 8002362: d1f1 bne.n 8002348 <__sfp+0x20> 8002364: 230c movs r3, #12 8002366: 4604 mov r4, r0 8002368: 603b str r3, [r7, #0] 800236a: 4620 mov r0, r4 800236c: bdf8 pop {r3, r4, r5, r6, r7, pc} 800236e: f64f 73ff movw r3, #65535 ; 0xffff 8002372: 81e3 strh r3, [r4, #14] 8002374: 2301 movs r3, #1 8002376: 6665 str r5, [r4, #100] ; 0x64 8002378: 81a3 strh r3, [r4, #12] 800237a: 6025 str r5, [r4, #0] 800237c: 60a5 str r5, [r4, #8] 800237e: 6065 str r5, [r4, #4] 8002380: 6125 str r5, [r4, #16] 8002382: 6165 str r5, [r4, #20] 8002384: 61a5 str r5, [r4, #24] 8002386: 2208 movs r2, #8 8002388: 4629 mov r1, r5 800238a: f104 005c add.w r0, r4, #92 ; 0x5c 800238e: f7ff fcaf bl 8001cf0 8002392: 6365 str r5, [r4, #52] ; 0x34 8002394: 63a5 str r5, [r4, #56] ; 0x38 8002396: 64a5 str r5, [r4, #72] ; 0x48 8002398: 64e5 str r5, [r4, #76] ; 0x4c 800239a: e7e6 b.n 800236a <__sfp+0x42> 800239c: 08002ee8 .word 0x08002ee8 080023a0 <_fwalk_reent>: 80023a0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80023a4: 4680 mov r8, r0 80023a6: 4689 mov r9, r1 80023a8: 2600 movs r6, #0 80023aa: f100 0448 add.w r4, r0, #72 ; 0x48 80023ae: b914 cbnz r4, 80023b6 <_fwalk_reent+0x16> 80023b0: 4630 mov r0, r6 80023b2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 80023b6: 68a5 ldr r5, [r4, #8] 80023b8: 6867 ldr r7, [r4, #4] 80023ba: 3f01 subs r7, #1 80023bc: d501 bpl.n 80023c2 <_fwalk_reent+0x22> 80023be: 6824 ldr r4, [r4, #0] 80023c0: e7f5 b.n 80023ae <_fwalk_reent+0xe> 80023c2: 89ab ldrh r3, [r5, #12] 80023c4: 2b01 cmp r3, #1 80023c6: d907 bls.n 80023d8 <_fwalk_reent+0x38> 80023c8: f9b5 300e ldrsh.w r3, [r5, #14] 80023cc: 3301 adds r3, #1 80023ce: d003 beq.n 80023d8 <_fwalk_reent+0x38> 80023d0: 4629 mov r1, r5 80023d2: 4640 mov r0, r8 80023d4: 47c8 blx r9 80023d6: 4306 orrs r6, r0 80023d8: 3568 adds r5, #104 ; 0x68 80023da: e7ee b.n 80023ba <_fwalk_reent+0x1a> 080023dc <__swhatbuf_r>: 80023dc: b570 push {r4, r5, r6, lr} 80023de: 460e mov r6, r1 80023e0: f9b1 100e ldrsh.w r1, [r1, #14] 80023e4: b090 sub sp, #64 ; 0x40 80023e6: 2900 cmp r1, #0 80023e8: 4614 mov r4, r2 80023ea: 461d mov r5, r3 80023ec: da07 bge.n 80023fe <__swhatbuf_r+0x22> 80023ee: 2300 movs r3, #0 80023f0: 602b str r3, [r5, #0] 80023f2: 89b3 ldrh r3, [r6, #12] 80023f4: 061a lsls r2, r3, #24 80023f6: d410 bmi.n 800241a <__swhatbuf_r+0x3e> 80023f8: f44f 6380 mov.w r3, #1024 ; 0x400 80023fc: e00e b.n 800241c <__swhatbuf_r+0x40> 80023fe: aa01 add r2, sp, #4 8002400: f000 fc4e bl 8002ca0 <_fstat_r> 8002404: 2800 cmp r0, #0 8002406: dbf2 blt.n 80023ee <__swhatbuf_r+0x12> 8002408: 9a02 ldr r2, [sp, #8] 800240a: f402 4270 and.w r2, r2, #61440 ; 0xf000 800240e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8002412: 425a negs r2, r3 8002414: 415a adcs r2, r3 8002416: 602a str r2, [r5, #0] 8002418: e7ee b.n 80023f8 <__swhatbuf_r+0x1c> 800241a: 2340 movs r3, #64 ; 0x40 800241c: 2000 movs r0, #0 800241e: 6023 str r3, [r4, #0] 8002420: b010 add sp, #64 ; 0x40 8002422: bd70 pop {r4, r5, r6, pc} 08002424 <__smakebuf_r>: 8002424: 898b ldrh r3, [r1, #12] 8002426: b573 push {r0, r1, r4, r5, r6, lr} 8002428: 079d lsls r5, r3, #30 800242a: 4606 mov r6, r0 800242c: 460c mov r4, r1 800242e: d507 bpl.n 8002440 <__smakebuf_r+0x1c> 8002430: f104 0347 add.w r3, r4, #71 ; 0x47 8002434: 6023 str r3, [r4, #0] 8002436: 6123 str r3, [r4, #16] 8002438: 2301 movs r3, #1 800243a: 6163 str r3, [r4, #20] 800243c: b002 add sp, #8 800243e: bd70 pop {r4, r5, r6, pc} 8002440: ab01 add r3, sp, #4 8002442: 466a mov r2, sp 8002444: f7ff ffca bl 80023dc <__swhatbuf_r> 8002448: 9900 ldr r1, [sp, #0] 800244a: 4605 mov r5, r0 800244c: 4630 mov r0, r6 800244e: f000 f87d bl 800254c <_malloc_r> 8002452: b948 cbnz r0, 8002468 <__smakebuf_r+0x44> 8002454: f9b4 300c ldrsh.w r3, [r4, #12] 8002458: 059a lsls r2, r3, #22 800245a: d4ef bmi.n 800243c <__smakebuf_r+0x18> 800245c: f023 0303 bic.w r3, r3, #3 8002460: f043 0302 orr.w r3, r3, #2 8002464: 81a3 strh r3, [r4, #12] 8002466: e7e3 b.n 8002430 <__smakebuf_r+0xc> 8002468: 4b0d ldr r3, [pc, #52] ; (80024a0 <__smakebuf_r+0x7c>) 800246a: 62b3 str r3, [r6, #40] ; 0x28 800246c: 89a3 ldrh r3, [r4, #12] 800246e: 6020 str r0, [r4, #0] 8002470: f043 0380 orr.w r3, r3, #128 ; 0x80 8002474: 81a3 strh r3, [r4, #12] 8002476: 9b00 ldr r3, [sp, #0] 8002478: 6120 str r0, [r4, #16] 800247a: 6163 str r3, [r4, #20] 800247c: 9b01 ldr r3, [sp, #4] 800247e: b15b cbz r3, 8002498 <__smakebuf_r+0x74> 8002480: f9b4 100e ldrsh.w r1, [r4, #14] 8002484: 4630 mov r0, r6 8002486: f000 fc1d bl 8002cc4 <_isatty_r> 800248a: b128 cbz r0, 8002498 <__smakebuf_r+0x74> 800248c: 89a3 ldrh r3, [r4, #12] 800248e: f023 0303 bic.w r3, r3, #3 8002492: f043 0301 orr.w r3, r3, #1 8002496: 81a3 strh r3, [r4, #12] 8002498: 89a3 ldrh r3, [r4, #12] 800249a: 431d orrs r5, r3 800249c: 81a5 strh r5, [r4, #12] 800249e: e7cd b.n 800243c <__smakebuf_r+0x18> 80024a0: 08002249 .word 0x08002249 080024a4 : 80024a4: 4b02 ldr r3, [pc, #8] ; (80024b0 ) 80024a6: 4601 mov r1, r0 80024a8: 6818 ldr r0, [r3, #0] 80024aa: f000 b84f b.w 800254c <_malloc_r> 80024ae: bf00 nop 80024b0: 20000010 .word 0x20000010 080024b4 <_free_r>: 80024b4: b538 push {r3, r4, r5, lr} 80024b6: 4605 mov r5, r0 80024b8: 2900 cmp r1, #0 80024ba: d043 beq.n 8002544 <_free_r+0x90> 80024bc: f851 3c04 ldr.w r3, [r1, #-4] 80024c0: 1f0c subs r4, r1, #4 80024c2: 2b00 cmp r3, #0 80024c4: bfb8 it lt 80024c6: 18e4 addlt r4, r4, r3 80024c8: f000 fc2c bl 8002d24 <__malloc_lock> 80024cc: 4a1e ldr r2, [pc, #120] ; (8002548 <_free_r+0x94>) 80024ce: 6813 ldr r3, [r2, #0] 80024d0: 4610 mov r0, r2 80024d2: b933 cbnz r3, 80024e2 <_free_r+0x2e> 80024d4: 6063 str r3, [r4, #4] 80024d6: 6014 str r4, [r2, #0] 80024d8: 4628 mov r0, r5 80024da: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80024de: f000 bc22 b.w 8002d26 <__malloc_unlock> 80024e2: 42a3 cmp r3, r4 80024e4: d90b bls.n 80024fe <_free_r+0x4a> 80024e6: 6821 ldr r1, [r4, #0] 80024e8: 1862 adds r2, r4, r1 80024ea: 4293 cmp r3, r2 80024ec: bf01 itttt eq 80024ee: 681a ldreq r2, [r3, #0] 80024f0: 685b ldreq r3, [r3, #4] 80024f2: 1852 addeq r2, r2, r1 80024f4: 6022 streq r2, [r4, #0] 80024f6: 6063 str r3, [r4, #4] 80024f8: 6004 str r4, [r0, #0] 80024fa: e7ed b.n 80024d8 <_free_r+0x24> 80024fc: 4613 mov r3, r2 80024fe: 685a ldr r2, [r3, #4] 8002500: b10a cbz r2, 8002506 <_free_r+0x52> 8002502: 42a2 cmp r2, r4 8002504: d9fa bls.n 80024fc <_free_r+0x48> 8002506: 6819 ldr r1, [r3, #0] 8002508: 1858 adds r0, r3, r1 800250a: 42a0 cmp r0, r4 800250c: d10b bne.n 8002526 <_free_r+0x72> 800250e: 6820 ldr r0, [r4, #0] 8002510: 4401 add r1, r0 8002512: 1858 adds r0, r3, r1 8002514: 4282 cmp r2, r0 8002516: 6019 str r1, [r3, #0] 8002518: d1de bne.n 80024d8 <_free_r+0x24> 800251a: 6810 ldr r0, [r2, #0] 800251c: 6852 ldr r2, [r2, #4] 800251e: 4401 add r1, r0 8002520: 6019 str r1, [r3, #0] 8002522: 605a str r2, [r3, #4] 8002524: e7d8 b.n 80024d8 <_free_r+0x24> 8002526: d902 bls.n 800252e <_free_r+0x7a> 8002528: 230c movs r3, #12 800252a: 602b str r3, [r5, #0] 800252c: e7d4 b.n 80024d8 <_free_r+0x24> 800252e: 6820 ldr r0, [r4, #0] 8002530: 1821 adds r1, r4, r0 8002532: 428a cmp r2, r1 8002534: bf01 itttt eq 8002536: 6811 ldreq r1, [r2, #0] 8002538: 6852 ldreq r2, [r2, #4] 800253a: 1809 addeq r1, r1, r0 800253c: 6021 streq r1, [r4, #0] 800253e: 6062 str r2, [r4, #4] 8002540: 605c str r4, [r3, #4] 8002542: e7c9 b.n 80024d8 <_free_r+0x24> 8002544: bd38 pop {r3, r4, r5, pc} 8002546: bf00 nop 8002548: 200000c4 .word 0x200000c4 0800254c <_malloc_r>: 800254c: b570 push {r4, r5, r6, lr} 800254e: 1ccd adds r5, r1, #3 8002550: f025 0503 bic.w r5, r5, #3 8002554: 3508 adds r5, #8 8002556: 2d0c cmp r5, #12 8002558: bf38 it cc 800255a: 250c movcc r5, #12 800255c: 2d00 cmp r5, #0 800255e: 4606 mov r6, r0 8002560: db01 blt.n 8002566 <_malloc_r+0x1a> 8002562: 42a9 cmp r1, r5 8002564: d903 bls.n 800256e <_malloc_r+0x22> 8002566: 230c movs r3, #12 8002568: 6033 str r3, [r6, #0] 800256a: 2000 movs r0, #0 800256c: bd70 pop {r4, r5, r6, pc} 800256e: f000 fbd9 bl 8002d24 <__malloc_lock> 8002572: 4a23 ldr r2, [pc, #140] ; (8002600 <_malloc_r+0xb4>) 8002574: 6814 ldr r4, [r2, #0] 8002576: 4621 mov r1, r4 8002578: b991 cbnz r1, 80025a0 <_malloc_r+0x54> 800257a: 4c22 ldr r4, [pc, #136] ; (8002604 <_malloc_r+0xb8>) 800257c: 6823 ldr r3, [r4, #0] 800257e: b91b cbnz r3, 8002588 <_malloc_r+0x3c> 8002580: 4630 mov r0, r6 8002582: f000 fb17 bl 8002bb4 <_sbrk_r> 8002586: 6020 str r0, [r4, #0] 8002588: 4629 mov r1, r5 800258a: 4630 mov r0, r6 800258c: f000 fb12 bl 8002bb4 <_sbrk_r> 8002590: 1c43 adds r3, r0, #1 8002592: d126 bne.n 80025e2 <_malloc_r+0x96> 8002594: 230c movs r3, #12 8002596: 4630 mov r0, r6 8002598: 6033 str r3, [r6, #0] 800259a: f000 fbc4 bl 8002d26 <__malloc_unlock> 800259e: e7e4 b.n 800256a <_malloc_r+0x1e> 80025a0: 680b ldr r3, [r1, #0] 80025a2: 1b5b subs r3, r3, r5 80025a4: d41a bmi.n 80025dc <_malloc_r+0x90> 80025a6: 2b0b cmp r3, #11 80025a8: d90f bls.n 80025ca <_malloc_r+0x7e> 80025aa: 600b str r3, [r1, #0] 80025ac: 18cc adds r4, r1, r3 80025ae: 50cd str r5, [r1, r3] 80025b0: 4630 mov r0, r6 80025b2: f000 fbb8 bl 8002d26 <__malloc_unlock> 80025b6: f104 000b add.w r0, r4, #11 80025ba: 1d23 adds r3, r4, #4 80025bc: f020 0007 bic.w r0, r0, #7 80025c0: 1ac3 subs r3, r0, r3 80025c2: d01b beq.n 80025fc <_malloc_r+0xb0> 80025c4: 425a negs r2, r3 80025c6: 50e2 str r2, [r4, r3] 80025c8: bd70 pop {r4, r5, r6, pc} 80025ca: 428c cmp r4, r1 80025cc: bf0b itete eq 80025ce: 6863 ldreq r3, [r4, #4] 80025d0: 684b ldrne r3, [r1, #4] 80025d2: 6013 streq r3, [r2, #0] 80025d4: 6063 strne r3, [r4, #4] 80025d6: bf18 it ne 80025d8: 460c movne r4, r1 80025da: e7e9 b.n 80025b0 <_malloc_r+0x64> 80025dc: 460c mov r4, r1 80025de: 6849 ldr r1, [r1, #4] 80025e0: e7ca b.n 8002578 <_malloc_r+0x2c> 80025e2: 1cc4 adds r4, r0, #3 80025e4: f024 0403 bic.w r4, r4, #3 80025e8: 42a0 cmp r0, r4 80025ea: d005 beq.n 80025f8 <_malloc_r+0xac> 80025ec: 1a21 subs r1, r4, r0 80025ee: 4630 mov r0, r6 80025f0: f000 fae0 bl 8002bb4 <_sbrk_r> 80025f4: 3001 adds r0, #1 80025f6: d0cd beq.n 8002594 <_malloc_r+0x48> 80025f8: 6025 str r5, [r4, #0] 80025fa: e7d9 b.n 80025b0 <_malloc_r+0x64> 80025fc: bd70 pop {r4, r5, r6, pc} 80025fe: bf00 nop 8002600: 200000c4 .word 0x200000c4 8002604: 200000c8 .word 0x200000c8 08002608 <__sfputc_r>: 8002608: 6893 ldr r3, [r2, #8] 800260a: b410 push {r4} 800260c: 3b01 subs r3, #1 800260e: 2b00 cmp r3, #0 8002610: 6093 str r3, [r2, #8] 8002612: da08 bge.n 8002626 <__sfputc_r+0x1e> 8002614: 6994 ldr r4, [r2, #24] 8002616: 42a3 cmp r3, r4 8002618: db02 blt.n 8002620 <__sfputc_r+0x18> 800261a: b2cb uxtb r3, r1 800261c: 2b0a cmp r3, #10 800261e: d102 bne.n 8002626 <__sfputc_r+0x1e> 8002620: bc10 pop {r4} 8002622: f7ff bc9f b.w 8001f64 <__swbuf_r> 8002626: 6813 ldr r3, [r2, #0] 8002628: 1c58 adds r0, r3, #1 800262a: 6010 str r0, [r2, #0] 800262c: 7019 strb r1, [r3, #0] 800262e: b2c8 uxtb r0, r1 8002630: bc10 pop {r4} 8002632: 4770 bx lr 08002634 <__sfputs_r>: 8002634: b5f8 push {r3, r4, r5, r6, r7, lr} 8002636: 4606 mov r6, r0 8002638: 460f mov r7, r1 800263a: 4614 mov r4, r2 800263c: 18d5 adds r5, r2, r3 800263e: 42ac cmp r4, r5 8002640: d101 bne.n 8002646 <__sfputs_r+0x12> 8002642: 2000 movs r0, #0 8002644: e007 b.n 8002656 <__sfputs_r+0x22> 8002646: 463a mov r2, r7 8002648: f814 1b01 ldrb.w r1, [r4], #1 800264c: 4630 mov r0, r6 800264e: f7ff ffdb bl 8002608 <__sfputc_r> 8002652: 1c43 adds r3, r0, #1 8002654: d1f3 bne.n 800263e <__sfputs_r+0xa> 8002656: bdf8 pop {r3, r4, r5, r6, r7, pc} 08002658 <_vfiprintf_r>: 8002658: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800265c: b09d sub sp, #116 ; 0x74 800265e: 460c mov r4, r1 8002660: 4617 mov r7, r2 8002662: 9303 str r3, [sp, #12] 8002664: 4606 mov r6, r0 8002666: b118 cbz r0, 8002670 <_vfiprintf_r+0x18> 8002668: 6983 ldr r3, [r0, #24] 800266a: b90b cbnz r3, 8002670 <_vfiprintf_r+0x18> 800266c: f7ff fe2c bl 80022c8 <__sinit> 8002670: 4b7c ldr r3, [pc, #496] ; (8002864 <_vfiprintf_r+0x20c>) 8002672: 429c cmp r4, r3 8002674: d157 bne.n 8002726 <_vfiprintf_r+0xce> 8002676: 6874 ldr r4, [r6, #4] 8002678: 89a3 ldrh r3, [r4, #12] 800267a: 0718 lsls r0, r3, #28 800267c: d55d bpl.n 800273a <_vfiprintf_r+0xe2> 800267e: 6923 ldr r3, [r4, #16] 8002680: 2b00 cmp r3, #0 8002682: d05a beq.n 800273a <_vfiprintf_r+0xe2> 8002684: 2300 movs r3, #0 8002686: 9309 str r3, [sp, #36] ; 0x24 8002688: 2320 movs r3, #32 800268a: f88d 3029 strb.w r3, [sp, #41] ; 0x29 800268e: 2330 movs r3, #48 ; 0x30 8002690: f04f 0b01 mov.w fp, #1 8002694: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8002698: 46b8 mov r8, r7 800269a: 4645 mov r5, r8 800269c: f815 3b01 ldrb.w r3, [r5], #1 80026a0: 2b00 cmp r3, #0 80026a2: d155 bne.n 8002750 <_vfiprintf_r+0xf8> 80026a4: ebb8 0a07 subs.w sl, r8, r7 80026a8: d00b beq.n 80026c2 <_vfiprintf_r+0x6a> 80026aa: 4653 mov r3, sl 80026ac: 463a mov r2, r7 80026ae: 4621 mov r1, r4 80026b0: 4630 mov r0, r6 80026b2: f7ff ffbf bl 8002634 <__sfputs_r> 80026b6: 3001 adds r0, #1 80026b8: f000 80c4 beq.w 8002844 <_vfiprintf_r+0x1ec> 80026bc: 9b09 ldr r3, [sp, #36] ; 0x24 80026be: 4453 add r3, sl 80026c0: 9309 str r3, [sp, #36] ; 0x24 80026c2: f898 3000 ldrb.w r3, [r8] 80026c6: 2b00 cmp r3, #0 80026c8: f000 80bc beq.w 8002844 <_vfiprintf_r+0x1ec> 80026cc: 2300 movs r3, #0 80026ce: f04f 32ff mov.w r2, #4294967295 80026d2: 9304 str r3, [sp, #16] 80026d4: 9307 str r3, [sp, #28] 80026d6: 9205 str r2, [sp, #20] 80026d8: 9306 str r3, [sp, #24] 80026da: f88d 3053 strb.w r3, [sp, #83] ; 0x53 80026de: 931a str r3, [sp, #104] ; 0x68 80026e0: 2205 movs r2, #5 80026e2: 7829 ldrb r1, [r5, #0] 80026e4: 4860 ldr r0, [pc, #384] ; (8002868 <_vfiprintf_r+0x210>) 80026e6: f000 fb0f bl 8002d08 80026ea: f105 0801 add.w r8, r5, #1 80026ee: 9b04 ldr r3, [sp, #16] 80026f0: 2800 cmp r0, #0 80026f2: d131 bne.n 8002758 <_vfiprintf_r+0x100> 80026f4: 06d9 lsls r1, r3, #27 80026f6: bf44 itt mi 80026f8: 2220 movmi r2, #32 80026fa: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 80026fe: 071a lsls r2, r3, #28 8002700: bf44 itt mi 8002702: 222b movmi r2, #43 ; 0x2b 8002704: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002708: 782a ldrb r2, [r5, #0] 800270a: 2a2a cmp r2, #42 ; 0x2a 800270c: d02c beq.n 8002768 <_vfiprintf_r+0x110> 800270e: 2100 movs r1, #0 8002710: 200a movs r0, #10 8002712: 9a07 ldr r2, [sp, #28] 8002714: 46a8 mov r8, r5 8002716: f898 3000 ldrb.w r3, [r8] 800271a: 3501 adds r5, #1 800271c: 3b30 subs r3, #48 ; 0x30 800271e: 2b09 cmp r3, #9 8002720: d96d bls.n 80027fe <_vfiprintf_r+0x1a6> 8002722: b371 cbz r1, 8002782 <_vfiprintf_r+0x12a> 8002724: e026 b.n 8002774 <_vfiprintf_r+0x11c> 8002726: 4b51 ldr r3, [pc, #324] ; (800286c <_vfiprintf_r+0x214>) 8002728: 429c cmp r4, r3 800272a: d101 bne.n 8002730 <_vfiprintf_r+0xd8> 800272c: 68b4 ldr r4, [r6, #8] 800272e: e7a3 b.n 8002678 <_vfiprintf_r+0x20> 8002730: 4b4f ldr r3, [pc, #316] ; (8002870 <_vfiprintf_r+0x218>) 8002732: 429c cmp r4, r3 8002734: bf08 it eq 8002736: 68f4 ldreq r4, [r6, #12] 8002738: e79e b.n 8002678 <_vfiprintf_r+0x20> 800273a: 4621 mov r1, r4 800273c: 4630 mov r0, r6 800273e: f7ff fc63 bl 8002008 <__swsetup_r> 8002742: 2800 cmp r0, #0 8002744: d09e beq.n 8002684 <_vfiprintf_r+0x2c> 8002746: f04f 30ff mov.w r0, #4294967295 800274a: b01d add sp, #116 ; 0x74 800274c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002750: 2b25 cmp r3, #37 ; 0x25 8002752: d0a7 beq.n 80026a4 <_vfiprintf_r+0x4c> 8002754: 46a8 mov r8, r5 8002756: e7a0 b.n 800269a <_vfiprintf_r+0x42> 8002758: 4a43 ldr r2, [pc, #268] ; (8002868 <_vfiprintf_r+0x210>) 800275a: 4645 mov r5, r8 800275c: 1a80 subs r0, r0, r2 800275e: fa0b f000 lsl.w r0, fp, r0 8002762: 4318 orrs r0, r3 8002764: 9004 str r0, [sp, #16] 8002766: e7bb b.n 80026e0 <_vfiprintf_r+0x88> 8002768: 9a03 ldr r2, [sp, #12] 800276a: 1d11 adds r1, r2, #4 800276c: 6812 ldr r2, [r2, #0] 800276e: 9103 str r1, [sp, #12] 8002770: 2a00 cmp r2, #0 8002772: db01 blt.n 8002778 <_vfiprintf_r+0x120> 8002774: 9207 str r2, [sp, #28] 8002776: e004 b.n 8002782 <_vfiprintf_r+0x12a> 8002778: 4252 negs r2, r2 800277a: f043 0302 orr.w r3, r3, #2 800277e: 9207 str r2, [sp, #28] 8002780: 9304 str r3, [sp, #16] 8002782: f898 3000 ldrb.w r3, [r8] 8002786: 2b2e cmp r3, #46 ; 0x2e 8002788: d110 bne.n 80027ac <_vfiprintf_r+0x154> 800278a: f898 3001 ldrb.w r3, [r8, #1] 800278e: f108 0101 add.w r1, r8, #1 8002792: 2b2a cmp r3, #42 ; 0x2a 8002794: d137 bne.n 8002806 <_vfiprintf_r+0x1ae> 8002796: 9b03 ldr r3, [sp, #12] 8002798: f108 0802 add.w r8, r8, #2 800279c: 1d1a adds r2, r3, #4 800279e: 681b ldr r3, [r3, #0] 80027a0: 9203 str r2, [sp, #12] 80027a2: 2b00 cmp r3, #0 80027a4: bfb8 it lt 80027a6: f04f 33ff movlt.w r3, #4294967295 80027aa: 9305 str r3, [sp, #20] 80027ac: 4d31 ldr r5, [pc, #196] ; (8002874 <_vfiprintf_r+0x21c>) 80027ae: 2203 movs r2, #3 80027b0: f898 1000 ldrb.w r1, [r8] 80027b4: 4628 mov r0, r5 80027b6: f000 faa7 bl 8002d08 80027ba: b140 cbz r0, 80027ce <_vfiprintf_r+0x176> 80027bc: 2340 movs r3, #64 ; 0x40 80027be: 1b40 subs r0, r0, r5 80027c0: fa03 f000 lsl.w r0, r3, r0 80027c4: 9b04 ldr r3, [sp, #16] 80027c6: f108 0801 add.w r8, r8, #1 80027ca: 4303 orrs r3, r0 80027cc: 9304 str r3, [sp, #16] 80027ce: f898 1000 ldrb.w r1, [r8] 80027d2: 2206 movs r2, #6 80027d4: 4828 ldr r0, [pc, #160] ; (8002878 <_vfiprintf_r+0x220>) 80027d6: f108 0701 add.w r7, r8, #1 80027da: f88d 1028 strb.w r1, [sp, #40] ; 0x28 80027de: f000 fa93 bl 8002d08 80027e2: 2800 cmp r0, #0 80027e4: d034 beq.n 8002850 <_vfiprintf_r+0x1f8> 80027e6: 4b25 ldr r3, [pc, #148] ; (800287c <_vfiprintf_r+0x224>) 80027e8: bb03 cbnz r3, 800282c <_vfiprintf_r+0x1d4> 80027ea: 9b03 ldr r3, [sp, #12] 80027ec: 3307 adds r3, #7 80027ee: f023 0307 bic.w r3, r3, #7 80027f2: 3308 adds r3, #8 80027f4: 9303 str r3, [sp, #12] 80027f6: 9b09 ldr r3, [sp, #36] ; 0x24 80027f8: 444b add r3, r9 80027fa: 9309 str r3, [sp, #36] ; 0x24 80027fc: e74c b.n 8002698 <_vfiprintf_r+0x40> 80027fe: fb00 3202 mla r2, r0, r2, r3 8002802: 2101 movs r1, #1 8002804: e786 b.n 8002714 <_vfiprintf_r+0xbc> 8002806: 2300 movs r3, #0 8002808: 250a movs r5, #10 800280a: 4618 mov r0, r3 800280c: 9305 str r3, [sp, #20] 800280e: 4688 mov r8, r1 8002810: f898 2000 ldrb.w r2, [r8] 8002814: 3101 adds r1, #1 8002816: 3a30 subs r2, #48 ; 0x30 8002818: 2a09 cmp r2, #9 800281a: d903 bls.n 8002824 <_vfiprintf_r+0x1cc> 800281c: 2b00 cmp r3, #0 800281e: d0c5 beq.n 80027ac <_vfiprintf_r+0x154> 8002820: 9005 str r0, [sp, #20] 8002822: e7c3 b.n 80027ac <_vfiprintf_r+0x154> 8002824: fb05 2000 mla r0, r5, r0, r2 8002828: 2301 movs r3, #1 800282a: e7f0 b.n 800280e <_vfiprintf_r+0x1b6> 800282c: ab03 add r3, sp, #12 800282e: 9300 str r3, [sp, #0] 8002830: 4622 mov r2, r4 8002832: 4b13 ldr r3, [pc, #76] ; (8002880 <_vfiprintf_r+0x228>) 8002834: a904 add r1, sp, #16 8002836: 4630 mov r0, r6 8002838: f3af 8000 nop.w 800283c: f1b0 3fff cmp.w r0, #4294967295 8002840: 4681 mov r9, r0 8002842: d1d8 bne.n 80027f6 <_vfiprintf_r+0x19e> 8002844: 89a3 ldrh r3, [r4, #12] 8002846: 065b lsls r3, r3, #25 8002848: f53f af7d bmi.w 8002746 <_vfiprintf_r+0xee> 800284c: 9809 ldr r0, [sp, #36] ; 0x24 800284e: e77c b.n 800274a <_vfiprintf_r+0xf2> 8002850: ab03 add r3, sp, #12 8002852: 9300 str r3, [sp, #0] 8002854: 4622 mov r2, r4 8002856: 4b0a ldr r3, [pc, #40] ; (8002880 <_vfiprintf_r+0x228>) 8002858: a904 add r1, sp, #16 800285a: 4630 mov r0, r6 800285c: f000 f88a bl 8002974 <_printf_i> 8002860: e7ec b.n 800283c <_vfiprintf_r+0x1e4> 8002862: bf00 nop 8002864: 08002f0c .word 0x08002f0c 8002868: 08002f4c .word 0x08002f4c 800286c: 08002f2c .word 0x08002f2c 8002870: 08002eec .word 0x08002eec 8002874: 08002f52 .word 0x08002f52 8002878: 08002f56 .word 0x08002f56 800287c: 00000000 .word 0x00000000 8002880: 08002635 .word 0x08002635 08002884 <_printf_common>: 8002884: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8002888: 4691 mov r9, r2 800288a: 461f mov r7, r3 800288c: 688a ldr r2, [r1, #8] 800288e: 690b ldr r3, [r1, #16] 8002890: 4606 mov r6, r0 8002892: 4293 cmp r3, r2 8002894: bfb8 it lt 8002896: 4613 movlt r3, r2 8002898: f8c9 3000 str.w r3, [r9] 800289c: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 80028a0: 460c mov r4, r1 80028a2: f8dd 8020 ldr.w r8, [sp, #32] 80028a6: b112 cbz r2, 80028ae <_printf_common+0x2a> 80028a8: 3301 adds r3, #1 80028aa: f8c9 3000 str.w r3, [r9] 80028ae: 6823 ldr r3, [r4, #0] 80028b0: 0699 lsls r1, r3, #26 80028b2: bf42 ittt mi 80028b4: f8d9 3000 ldrmi.w r3, [r9] 80028b8: 3302 addmi r3, #2 80028ba: f8c9 3000 strmi.w r3, [r9] 80028be: 6825 ldr r5, [r4, #0] 80028c0: f015 0506 ands.w r5, r5, #6 80028c4: d107 bne.n 80028d6 <_printf_common+0x52> 80028c6: f104 0a19 add.w sl, r4, #25 80028ca: 68e3 ldr r3, [r4, #12] 80028cc: f8d9 2000 ldr.w r2, [r9] 80028d0: 1a9b subs r3, r3, r2 80028d2: 429d cmp r5, r3 80028d4: db2a blt.n 800292c <_printf_common+0xa8> 80028d6: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 80028da: 6822 ldr r2, [r4, #0] 80028dc: 3300 adds r3, #0 80028de: bf18 it ne 80028e0: 2301 movne r3, #1 80028e2: 0692 lsls r2, r2, #26 80028e4: d42f bmi.n 8002946 <_printf_common+0xc2> 80028e6: f104 0243 add.w r2, r4, #67 ; 0x43 80028ea: 4639 mov r1, r7 80028ec: 4630 mov r0, r6 80028ee: 47c0 blx r8 80028f0: 3001 adds r0, #1 80028f2: d022 beq.n 800293a <_printf_common+0xb6> 80028f4: 6823 ldr r3, [r4, #0] 80028f6: 68e5 ldr r5, [r4, #12] 80028f8: f003 0306 and.w r3, r3, #6 80028fc: 2b04 cmp r3, #4 80028fe: bf18 it ne 8002900: 2500 movne r5, #0 8002902: f8d9 2000 ldr.w r2, [r9] 8002906: f04f 0900 mov.w r9, #0 800290a: bf08 it eq 800290c: 1aad subeq r5, r5, r2 800290e: 68a3 ldr r3, [r4, #8] 8002910: 6922 ldr r2, [r4, #16] 8002912: bf08 it eq 8002914: ea25 75e5 biceq.w r5, r5, r5, asr #31 8002918: 4293 cmp r3, r2 800291a: bfc4 itt gt 800291c: 1a9b subgt r3, r3, r2 800291e: 18ed addgt r5, r5, r3 8002920: 341a adds r4, #26 8002922: 454d cmp r5, r9 8002924: d11b bne.n 800295e <_printf_common+0xda> 8002926: 2000 movs r0, #0 8002928: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800292c: 2301 movs r3, #1 800292e: 4652 mov r2, sl 8002930: 4639 mov r1, r7 8002932: 4630 mov r0, r6 8002934: 47c0 blx r8 8002936: 3001 adds r0, #1 8002938: d103 bne.n 8002942 <_printf_common+0xbe> 800293a: f04f 30ff mov.w r0, #4294967295 800293e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002942: 3501 adds r5, #1 8002944: e7c1 b.n 80028ca <_printf_common+0x46> 8002946: 2030 movs r0, #48 ; 0x30 8002948: 18e1 adds r1, r4, r3 800294a: f881 0043 strb.w r0, [r1, #67] ; 0x43 800294e: 1c5a adds r2, r3, #1 8002950: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8002954: 4422 add r2, r4 8002956: 3302 adds r3, #2 8002958: f882 1043 strb.w r1, [r2, #67] ; 0x43 800295c: e7c3 b.n 80028e6 <_printf_common+0x62> 800295e: 2301 movs r3, #1 8002960: 4622 mov r2, r4 8002962: 4639 mov r1, r7 8002964: 4630 mov r0, r6 8002966: 47c0 blx r8 8002968: 3001 adds r0, #1 800296a: d0e6 beq.n 800293a <_printf_common+0xb6> 800296c: f109 0901 add.w r9, r9, #1 8002970: e7d7 b.n 8002922 <_printf_common+0x9e> ... 08002974 <_printf_i>: 8002974: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8002978: 4617 mov r7, r2 800297a: 7e0a ldrb r2, [r1, #24] 800297c: b085 sub sp, #20 800297e: 2a6e cmp r2, #110 ; 0x6e 8002980: 4698 mov r8, r3 8002982: 4606 mov r6, r0 8002984: 460c mov r4, r1 8002986: 9b0c ldr r3, [sp, #48] ; 0x30 8002988: f101 0e43 add.w lr, r1, #67 ; 0x43 800298c: f000 80bc beq.w 8002b08 <_printf_i+0x194> 8002990: d81a bhi.n 80029c8 <_printf_i+0x54> 8002992: 2a63 cmp r2, #99 ; 0x63 8002994: d02e beq.n 80029f4 <_printf_i+0x80> 8002996: d80a bhi.n 80029ae <_printf_i+0x3a> 8002998: 2a00 cmp r2, #0 800299a: f000 80c8 beq.w 8002b2e <_printf_i+0x1ba> 800299e: 2a58 cmp r2, #88 ; 0x58 80029a0: f000 808a beq.w 8002ab8 <_printf_i+0x144> 80029a4: f104 0542 add.w r5, r4, #66 ; 0x42 80029a8: f884 2042 strb.w r2, [r4, #66] ; 0x42 80029ac: e02a b.n 8002a04 <_printf_i+0x90> 80029ae: 2a64 cmp r2, #100 ; 0x64 80029b0: d001 beq.n 80029b6 <_printf_i+0x42> 80029b2: 2a69 cmp r2, #105 ; 0x69 80029b4: d1f6 bne.n 80029a4 <_printf_i+0x30> 80029b6: 6821 ldr r1, [r4, #0] 80029b8: 681a ldr r2, [r3, #0] 80029ba: f011 0f80 tst.w r1, #128 ; 0x80 80029be: d023 beq.n 8002a08 <_printf_i+0x94> 80029c0: 1d11 adds r1, r2, #4 80029c2: 6019 str r1, [r3, #0] 80029c4: 6813 ldr r3, [r2, #0] 80029c6: e027 b.n 8002a18 <_printf_i+0xa4> 80029c8: 2a73 cmp r2, #115 ; 0x73 80029ca: f000 80b4 beq.w 8002b36 <_printf_i+0x1c2> 80029ce: d808 bhi.n 80029e2 <_printf_i+0x6e> 80029d0: 2a6f cmp r2, #111 ; 0x6f 80029d2: d02a beq.n 8002a2a <_printf_i+0xb6> 80029d4: 2a70 cmp r2, #112 ; 0x70 80029d6: d1e5 bne.n 80029a4 <_printf_i+0x30> 80029d8: 680a ldr r2, [r1, #0] 80029da: f042 0220 orr.w r2, r2, #32 80029de: 600a str r2, [r1, #0] 80029e0: e003 b.n 80029ea <_printf_i+0x76> 80029e2: 2a75 cmp r2, #117 ; 0x75 80029e4: d021 beq.n 8002a2a <_printf_i+0xb6> 80029e6: 2a78 cmp r2, #120 ; 0x78 80029e8: d1dc bne.n 80029a4 <_printf_i+0x30> 80029ea: 2278 movs r2, #120 ; 0x78 80029ec: 496f ldr r1, [pc, #444] ; (8002bac <_printf_i+0x238>) 80029ee: f884 2045 strb.w r2, [r4, #69] ; 0x45 80029f2: e064 b.n 8002abe <_printf_i+0x14a> 80029f4: 681a ldr r2, [r3, #0] 80029f6: f101 0542 add.w r5, r1, #66 ; 0x42 80029fa: 1d11 adds r1, r2, #4 80029fc: 6019 str r1, [r3, #0] 80029fe: 6813 ldr r3, [r2, #0] 8002a00: f884 3042 strb.w r3, [r4, #66] ; 0x42 8002a04: 2301 movs r3, #1 8002a06: e0a3 b.n 8002b50 <_printf_i+0x1dc> 8002a08: f011 0f40 tst.w r1, #64 ; 0x40 8002a0c: f102 0104 add.w r1, r2, #4 8002a10: 6019 str r1, [r3, #0] 8002a12: d0d7 beq.n 80029c4 <_printf_i+0x50> 8002a14: f9b2 3000 ldrsh.w r3, [r2] 8002a18: 2b00 cmp r3, #0 8002a1a: da03 bge.n 8002a24 <_printf_i+0xb0> 8002a1c: 222d movs r2, #45 ; 0x2d 8002a1e: 425b negs r3, r3 8002a20: f884 2043 strb.w r2, [r4, #67] ; 0x43 8002a24: 4962 ldr r1, [pc, #392] ; (8002bb0 <_printf_i+0x23c>) 8002a26: 220a movs r2, #10 8002a28: e017 b.n 8002a5a <_printf_i+0xe6> 8002a2a: 6820 ldr r0, [r4, #0] 8002a2c: 6819 ldr r1, [r3, #0] 8002a2e: f010 0f80 tst.w r0, #128 ; 0x80 8002a32: d003 beq.n 8002a3c <_printf_i+0xc8> 8002a34: 1d08 adds r0, r1, #4 8002a36: 6018 str r0, [r3, #0] 8002a38: 680b ldr r3, [r1, #0] 8002a3a: e006 b.n 8002a4a <_printf_i+0xd6> 8002a3c: f010 0f40 tst.w r0, #64 ; 0x40 8002a40: f101 0004 add.w r0, r1, #4 8002a44: 6018 str r0, [r3, #0] 8002a46: d0f7 beq.n 8002a38 <_printf_i+0xc4> 8002a48: 880b ldrh r3, [r1, #0] 8002a4a: 2a6f cmp r2, #111 ; 0x6f 8002a4c: bf14 ite ne 8002a4e: 220a movne r2, #10 8002a50: 2208 moveq r2, #8 8002a52: 4957 ldr r1, [pc, #348] ; (8002bb0 <_printf_i+0x23c>) 8002a54: 2000 movs r0, #0 8002a56: f884 0043 strb.w r0, [r4, #67] ; 0x43 8002a5a: 6865 ldr r5, [r4, #4] 8002a5c: 2d00 cmp r5, #0 8002a5e: 60a5 str r5, [r4, #8] 8002a60: f2c0 809c blt.w 8002b9c <_printf_i+0x228> 8002a64: 6820 ldr r0, [r4, #0] 8002a66: f020 0004 bic.w r0, r0, #4 8002a6a: 6020 str r0, [r4, #0] 8002a6c: 2b00 cmp r3, #0 8002a6e: d13f bne.n 8002af0 <_printf_i+0x17c> 8002a70: 2d00 cmp r5, #0 8002a72: f040 8095 bne.w 8002ba0 <_printf_i+0x22c> 8002a76: 4675 mov r5, lr 8002a78: 2a08 cmp r2, #8 8002a7a: d10b bne.n 8002a94 <_printf_i+0x120> 8002a7c: 6823 ldr r3, [r4, #0] 8002a7e: 07da lsls r2, r3, #31 8002a80: d508 bpl.n 8002a94 <_printf_i+0x120> 8002a82: 6923 ldr r3, [r4, #16] 8002a84: 6862 ldr r2, [r4, #4] 8002a86: 429a cmp r2, r3 8002a88: bfde ittt le 8002a8a: 2330 movle r3, #48 ; 0x30 8002a8c: f805 3c01 strble.w r3, [r5, #-1] 8002a90: f105 35ff addle.w r5, r5, #4294967295 8002a94: ebae 0305 sub.w r3, lr, r5 8002a98: 6123 str r3, [r4, #16] 8002a9a: f8cd 8000 str.w r8, [sp] 8002a9e: 463b mov r3, r7 8002aa0: aa03 add r2, sp, #12 8002aa2: 4621 mov r1, r4 8002aa4: 4630 mov r0, r6 8002aa6: f7ff feed bl 8002884 <_printf_common> 8002aaa: 3001 adds r0, #1 8002aac: d155 bne.n 8002b5a <_printf_i+0x1e6> 8002aae: f04f 30ff mov.w r0, #4294967295 8002ab2: b005 add sp, #20 8002ab4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8002ab8: f881 2045 strb.w r2, [r1, #69] ; 0x45 8002abc: 493c ldr r1, [pc, #240] ; (8002bb0 <_printf_i+0x23c>) 8002abe: 6822 ldr r2, [r4, #0] 8002ac0: 6818 ldr r0, [r3, #0] 8002ac2: f012 0f80 tst.w r2, #128 ; 0x80 8002ac6: f100 0504 add.w r5, r0, #4 8002aca: 601d str r5, [r3, #0] 8002acc: d001 beq.n 8002ad2 <_printf_i+0x15e> 8002ace: 6803 ldr r3, [r0, #0] 8002ad0: e002 b.n 8002ad8 <_printf_i+0x164> 8002ad2: 0655 lsls r5, r2, #25 8002ad4: d5fb bpl.n 8002ace <_printf_i+0x15a> 8002ad6: 8803 ldrh r3, [r0, #0] 8002ad8: 07d0 lsls r0, r2, #31 8002ada: bf44 itt mi 8002adc: f042 0220 orrmi.w r2, r2, #32 8002ae0: 6022 strmi r2, [r4, #0] 8002ae2: b91b cbnz r3, 8002aec <_printf_i+0x178> 8002ae4: 6822 ldr r2, [r4, #0] 8002ae6: f022 0220 bic.w r2, r2, #32 8002aea: 6022 str r2, [r4, #0] 8002aec: 2210 movs r2, #16 8002aee: e7b1 b.n 8002a54 <_printf_i+0xe0> 8002af0: 4675 mov r5, lr 8002af2: fbb3 f0f2 udiv r0, r3, r2 8002af6: fb02 3310 mls r3, r2, r0, r3 8002afa: 5ccb ldrb r3, [r1, r3] 8002afc: f805 3d01 strb.w r3, [r5, #-1]! 8002b00: 4603 mov r3, r0 8002b02: 2800 cmp r0, #0 8002b04: d1f5 bne.n 8002af2 <_printf_i+0x17e> 8002b06: e7b7 b.n 8002a78 <_printf_i+0x104> 8002b08: 6808 ldr r0, [r1, #0] 8002b0a: 681a ldr r2, [r3, #0] 8002b0c: f010 0f80 tst.w r0, #128 ; 0x80 8002b10: 6949 ldr r1, [r1, #20] 8002b12: d004 beq.n 8002b1e <_printf_i+0x1aa> 8002b14: 1d10 adds r0, r2, #4 8002b16: 6018 str r0, [r3, #0] 8002b18: 6813 ldr r3, [r2, #0] 8002b1a: 6019 str r1, [r3, #0] 8002b1c: e007 b.n 8002b2e <_printf_i+0x1ba> 8002b1e: f010 0f40 tst.w r0, #64 ; 0x40 8002b22: f102 0004 add.w r0, r2, #4 8002b26: 6018 str r0, [r3, #0] 8002b28: 6813 ldr r3, [r2, #0] 8002b2a: d0f6 beq.n 8002b1a <_printf_i+0x1a6> 8002b2c: 8019 strh r1, [r3, #0] 8002b2e: 2300 movs r3, #0 8002b30: 4675 mov r5, lr 8002b32: 6123 str r3, [r4, #16] 8002b34: e7b1 b.n 8002a9a <_printf_i+0x126> 8002b36: 681a ldr r2, [r3, #0] 8002b38: 1d11 adds r1, r2, #4 8002b3a: 6019 str r1, [r3, #0] 8002b3c: 6815 ldr r5, [r2, #0] 8002b3e: 2100 movs r1, #0 8002b40: 6862 ldr r2, [r4, #4] 8002b42: 4628 mov r0, r5 8002b44: f000 f8e0 bl 8002d08 8002b48: b108 cbz r0, 8002b4e <_printf_i+0x1da> 8002b4a: 1b40 subs r0, r0, r5 8002b4c: 6060 str r0, [r4, #4] 8002b4e: 6863 ldr r3, [r4, #4] 8002b50: 6123 str r3, [r4, #16] 8002b52: 2300 movs r3, #0 8002b54: f884 3043 strb.w r3, [r4, #67] ; 0x43 8002b58: e79f b.n 8002a9a <_printf_i+0x126> 8002b5a: 6923 ldr r3, [r4, #16] 8002b5c: 462a mov r2, r5 8002b5e: 4639 mov r1, r7 8002b60: 4630 mov r0, r6 8002b62: 47c0 blx r8 8002b64: 3001 adds r0, #1 8002b66: d0a2 beq.n 8002aae <_printf_i+0x13a> 8002b68: 6823 ldr r3, [r4, #0] 8002b6a: 079b lsls r3, r3, #30 8002b6c: d507 bpl.n 8002b7e <_printf_i+0x20a> 8002b6e: 2500 movs r5, #0 8002b70: f104 0919 add.w r9, r4, #25 8002b74: 68e3 ldr r3, [r4, #12] 8002b76: 9a03 ldr r2, [sp, #12] 8002b78: 1a9b subs r3, r3, r2 8002b7a: 429d cmp r5, r3 8002b7c: db05 blt.n 8002b8a <_printf_i+0x216> 8002b7e: 68e0 ldr r0, [r4, #12] 8002b80: 9b03 ldr r3, [sp, #12] 8002b82: 4298 cmp r0, r3 8002b84: bfb8 it lt 8002b86: 4618 movlt r0, r3 8002b88: e793 b.n 8002ab2 <_printf_i+0x13e> 8002b8a: 2301 movs r3, #1 8002b8c: 464a mov r2, r9 8002b8e: 4639 mov r1, r7 8002b90: 4630 mov r0, r6 8002b92: 47c0 blx r8 8002b94: 3001 adds r0, #1 8002b96: d08a beq.n 8002aae <_printf_i+0x13a> 8002b98: 3501 adds r5, #1 8002b9a: e7eb b.n 8002b74 <_printf_i+0x200> 8002b9c: 2b00 cmp r3, #0 8002b9e: d1a7 bne.n 8002af0 <_printf_i+0x17c> 8002ba0: 780b ldrb r3, [r1, #0] 8002ba2: f104 0542 add.w r5, r4, #66 ; 0x42 8002ba6: f884 3042 strb.w r3, [r4, #66] ; 0x42 8002baa: e765 b.n 8002a78 <_printf_i+0x104> 8002bac: 08002f6e .word 0x08002f6e 8002bb0: 08002f5d .word 0x08002f5d 08002bb4 <_sbrk_r>: 8002bb4: b538 push {r3, r4, r5, lr} 8002bb6: 2300 movs r3, #0 8002bb8: 4c05 ldr r4, [pc, #20] ; (8002bd0 <_sbrk_r+0x1c>) 8002bba: 4605 mov r5, r0 8002bbc: 4608 mov r0, r1 8002bbe: 6023 str r3, [r4, #0] 8002bc0: f000 f8ec bl 8002d9c <_sbrk> 8002bc4: 1c43 adds r3, r0, #1 8002bc6: d102 bne.n 8002bce <_sbrk_r+0x1a> 8002bc8: 6823 ldr r3, [r4, #0] 8002bca: b103 cbz r3, 8002bce <_sbrk_r+0x1a> 8002bcc: 602b str r3, [r5, #0] 8002bce: bd38 pop {r3, r4, r5, pc} 8002bd0: 20000288 .word 0x20000288 08002bd4 <__sread>: 8002bd4: b510 push {r4, lr} 8002bd6: 460c mov r4, r1 8002bd8: f9b1 100e ldrsh.w r1, [r1, #14] 8002bdc: f000 f8a4 bl 8002d28 <_read_r> 8002be0: 2800 cmp r0, #0 8002be2: bfab itete ge 8002be4: 6d63 ldrge r3, [r4, #84] ; 0x54 8002be6: 89a3 ldrhlt r3, [r4, #12] 8002be8: 181b addge r3, r3, r0 8002bea: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 8002bee: bfac ite ge 8002bf0: 6563 strge r3, [r4, #84] ; 0x54 8002bf2: 81a3 strhlt r3, [r4, #12] 8002bf4: bd10 pop {r4, pc} 08002bf6 <__swrite>: 8002bf6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8002bfa: 461f mov r7, r3 8002bfc: 898b ldrh r3, [r1, #12] 8002bfe: 4605 mov r5, r0 8002c00: 05db lsls r3, r3, #23 8002c02: 460c mov r4, r1 8002c04: 4616 mov r6, r2 8002c06: d505 bpl.n 8002c14 <__swrite+0x1e> 8002c08: 2302 movs r3, #2 8002c0a: 2200 movs r2, #0 8002c0c: f9b1 100e ldrsh.w r1, [r1, #14] 8002c10: f000 f868 bl 8002ce4 <_lseek_r> 8002c14: 89a3 ldrh r3, [r4, #12] 8002c16: 4632 mov r2, r6 8002c18: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8002c1c: 81a3 strh r3, [r4, #12] 8002c1e: f9b4 100e ldrsh.w r1, [r4, #14] 8002c22: 463b mov r3, r7 8002c24: 4628 mov r0, r5 8002c26: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8002c2a: f000 b817 b.w 8002c5c <_write_r> 08002c2e <__sseek>: 8002c2e: b510 push {r4, lr} 8002c30: 460c mov r4, r1 8002c32: f9b1 100e ldrsh.w r1, [r1, #14] 8002c36: f000 f855 bl 8002ce4 <_lseek_r> 8002c3a: 1c43 adds r3, r0, #1 8002c3c: 89a3 ldrh r3, [r4, #12] 8002c3e: bf15 itete ne 8002c40: 6560 strne r0, [r4, #84] ; 0x54 8002c42: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8002c46: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8002c4a: 81a3 strheq r3, [r4, #12] 8002c4c: bf18 it ne 8002c4e: 81a3 strhne r3, [r4, #12] 8002c50: bd10 pop {r4, pc} 08002c52 <__sclose>: 8002c52: f9b1 100e ldrsh.w r1, [r1, #14] 8002c56: f000 b813 b.w 8002c80 <_close_r> ... 08002c5c <_write_r>: 8002c5c: b538 push {r3, r4, r5, lr} 8002c5e: 4605 mov r5, r0 8002c60: 4608 mov r0, r1 8002c62: 4611 mov r1, r2 8002c64: 2200 movs r2, #0 8002c66: 4c05 ldr r4, [pc, #20] ; (8002c7c <_write_r+0x20>) 8002c68: 6022 str r2, [r4, #0] 8002c6a: 461a mov r2, r3 8002c6c: f7fe fcc4 bl 80015f8 <_write> 8002c70: 1c43 adds r3, r0, #1 8002c72: d102 bne.n 8002c7a <_write_r+0x1e> 8002c74: 6823 ldr r3, [r4, #0] 8002c76: b103 cbz r3, 8002c7a <_write_r+0x1e> 8002c78: 602b str r3, [r5, #0] 8002c7a: bd38 pop {r3, r4, r5, pc} 8002c7c: 20000288 .word 0x20000288 08002c80 <_close_r>: 8002c80: b538 push {r3, r4, r5, lr} 8002c82: 2300 movs r3, #0 8002c84: 4c05 ldr r4, [pc, #20] ; (8002c9c <_close_r+0x1c>) 8002c86: 4605 mov r5, r0 8002c88: 4608 mov r0, r1 8002c8a: 6023 str r3, [r4, #0] 8002c8c: f000 f85e bl 8002d4c <_close> 8002c90: 1c43 adds r3, r0, #1 8002c92: d102 bne.n 8002c9a <_close_r+0x1a> 8002c94: 6823 ldr r3, [r4, #0] 8002c96: b103 cbz r3, 8002c9a <_close_r+0x1a> 8002c98: 602b str r3, [r5, #0] 8002c9a: bd38 pop {r3, r4, r5, pc} 8002c9c: 20000288 .word 0x20000288 08002ca0 <_fstat_r>: 8002ca0: b538 push {r3, r4, r5, lr} 8002ca2: 2300 movs r3, #0 8002ca4: 4c06 ldr r4, [pc, #24] ; (8002cc0 <_fstat_r+0x20>) 8002ca6: 4605 mov r5, r0 8002ca8: 4608 mov r0, r1 8002caa: 4611 mov r1, r2 8002cac: 6023 str r3, [r4, #0] 8002cae: f000 f855 bl 8002d5c <_fstat> 8002cb2: 1c43 adds r3, r0, #1 8002cb4: d102 bne.n 8002cbc <_fstat_r+0x1c> 8002cb6: 6823 ldr r3, [r4, #0] 8002cb8: b103 cbz r3, 8002cbc <_fstat_r+0x1c> 8002cba: 602b str r3, [r5, #0] 8002cbc: bd38 pop {r3, r4, r5, pc} 8002cbe: bf00 nop 8002cc0: 20000288 .word 0x20000288 08002cc4 <_isatty_r>: 8002cc4: b538 push {r3, r4, r5, lr} 8002cc6: 2300 movs r3, #0 8002cc8: 4c05 ldr r4, [pc, #20] ; (8002ce0 <_isatty_r+0x1c>) 8002cca: 4605 mov r5, r0 8002ccc: 4608 mov r0, r1 8002cce: 6023 str r3, [r4, #0] 8002cd0: f000 f84c bl 8002d6c <_isatty> 8002cd4: 1c43 adds r3, r0, #1 8002cd6: d102 bne.n 8002cde <_isatty_r+0x1a> 8002cd8: 6823 ldr r3, [r4, #0] 8002cda: b103 cbz r3, 8002cde <_isatty_r+0x1a> 8002cdc: 602b str r3, [r5, #0] 8002cde: bd38 pop {r3, r4, r5, pc} 8002ce0: 20000288 .word 0x20000288 08002ce4 <_lseek_r>: 8002ce4: b538 push {r3, r4, r5, lr} 8002ce6: 4605 mov r5, r0 8002ce8: 4608 mov r0, r1 8002cea: 4611 mov r1, r2 8002cec: 2200 movs r2, #0 8002cee: 4c05 ldr r4, [pc, #20] ; (8002d04 <_lseek_r+0x20>) 8002cf0: 6022 str r2, [r4, #0] 8002cf2: 461a mov r2, r3 8002cf4: f000 f842 bl 8002d7c <_lseek> 8002cf8: 1c43 adds r3, r0, #1 8002cfa: d102 bne.n 8002d02 <_lseek_r+0x1e> 8002cfc: 6823 ldr r3, [r4, #0] 8002cfe: b103 cbz r3, 8002d02 <_lseek_r+0x1e> 8002d00: 602b str r3, [r5, #0] 8002d02: bd38 pop {r3, r4, r5, pc} 8002d04: 20000288 .word 0x20000288 08002d08 : 8002d08: b510 push {r4, lr} 8002d0a: b2c9 uxtb r1, r1 8002d0c: 4402 add r2, r0 8002d0e: 4290 cmp r0, r2 8002d10: 4603 mov r3, r0 8002d12: d101 bne.n 8002d18 8002d14: 2000 movs r0, #0 8002d16: bd10 pop {r4, pc} 8002d18: 781c ldrb r4, [r3, #0] 8002d1a: 3001 adds r0, #1 8002d1c: 428c cmp r4, r1 8002d1e: d1f6 bne.n 8002d0e 8002d20: 4618 mov r0, r3 8002d22: bd10 pop {r4, pc} 08002d24 <__malloc_lock>: 8002d24: 4770 bx lr 08002d26 <__malloc_unlock>: 8002d26: 4770 bx lr 08002d28 <_read_r>: 8002d28: b538 push {r3, r4, r5, lr} 8002d2a: 4605 mov r5, r0 8002d2c: 4608 mov r0, r1 8002d2e: 4611 mov r1, r2 8002d30: 2200 movs r2, #0 8002d32: 4c05 ldr r4, [pc, #20] ; (8002d48 <_read_r+0x20>) 8002d34: 6022 str r2, [r4, #0] 8002d36: 461a mov r2, r3 8002d38: f000 f828 bl 8002d8c <_read> 8002d3c: 1c43 adds r3, r0, #1 8002d3e: d102 bne.n 8002d46 <_read_r+0x1e> 8002d40: 6823 ldr r3, [r4, #0] 8002d42: b103 cbz r3, 8002d46 <_read_r+0x1e> 8002d44: 602b str r3, [r5, #0] 8002d46: bd38 pop {r3, r4, r5, pc} 8002d48: 20000288 .word 0x20000288 08002d4c <_close>: 8002d4c: 2258 movs r2, #88 ; 0x58 8002d4e: 4b02 ldr r3, [pc, #8] ; (8002d58 <_close+0xc>) 8002d50: f04f 30ff mov.w r0, #4294967295 8002d54: 601a str r2, [r3, #0] 8002d56: 4770 bx lr 8002d58: 20000288 .word 0x20000288 08002d5c <_fstat>: 8002d5c: 2258 movs r2, #88 ; 0x58 8002d5e: 4b02 ldr r3, [pc, #8] ; (8002d68 <_fstat+0xc>) 8002d60: f04f 30ff mov.w r0, #4294967295 8002d64: 601a str r2, [r3, #0] 8002d66: 4770 bx lr 8002d68: 20000288 .word 0x20000288 08002d6c <_isatty>: 8002d6c: 2258 movs r2, #88 ; 0x58 8002d6e: 4b02 ldr r3, [pc, #8] ; (8002d78 <_isatty+0xc>) 8002d70: 2000 movs r0, #0 8002d72: 601a str r2, [r3, #0] 8002d74: 4770 bx lr 8002d76: bf00 nop 8002d78: 20000288 .word 0x20000288 08002d7c <_lseek>: 8002d7c: 2258 movs r2, #88 ; 0x58 8002d7e: 4b02 ldr r3, [pc, #8] ; (8002d88 <_lseek+0xc>) 8002d80: f04f 30ff mov.w r0, #4294967295 8002d84: 601a str r2, [r3, #0] 8002d86: 4770 bx lr 8002d88: 20000288 .word 0x20000288 08002d8c <_read>: 8002d8c: 2258 movs r2, #88 ; 0x58 8002d8e: 4b02 ldr r3, [pc, #8] ; (8002d98 <_read+0xc>) 8002d90: f04f 30ff mov.w r0, #4294967295 8002d94: 601a str r2, [r3, #0] 8002d96: 4770 bx lr 8002d98: 20000288 .word 0x20000288 08002d9c <_sbrk>: 8002d9c: 4b04 ldr r3, [pc, #16] ; (8002db0 <_sbrk+0x14>) 8002d9e: 4602 mov r2, r0 8002da0: 6819 ldr r1, [r3, #0] 8002da2: b909 cbnz r1, 8002da8 <_sbrk+0xc> 8002da4: 4903 ldr r1, [pc, #12] ; (8002db4 <_sbrk+0x18>) 8002da6: 6019 str r1, [r3, #0] 8002da8: 6818 ldr r0, [r3, #0] 8002daa: 4402 add r2, r0 8002dac: 601a str r2, [r3, #0] 8002dae: 4770 bx lr 8002db0: 200000cc .word 0x200000cc 8002db4: 2000028c .word 0x2000028c 08002db8 <_init>: 8002db8: b5f8 push {r3, r4, r5, r6, r7, lr} 8002dba: bf00 nop 8002dbc: bcf8 pop {r3, r4, r5, r6, r7} 8002dbe: bc08 pop {r3} 8002dc0: 469e mov lr, r3 8002dc2: 4770 bx lr 08002dc4 <_fini>: 8002dc4: b5f8 push {r3, r4, r5, r6, r7, lr} 8002dc6: bf00 nop 8002dc8: bcf8 pop {r3, r4, r5, r6, r7} 8002dca: bc08 pop {r3} 8002dcc: 469e mov lr, r3 8002dce: 4770 bx lr