STM32F103_RGB_Controller.list 435 KB

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  1. STM32F103_RGB_Controller.elf: file format elf32-littlearm
  2. Sections:
  3. Idx Name Size VMA LMA File off Algn
  4. 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0
  5. CONTENTS, ALLOC, LOAD, READONLY, DATA
  6. 1 .text 00004658 080041e4 080041e4 000041e4 2**2
  7. CONTENTS, ALLOC, LOAD, READONLY, CODE
  8. 2 .rodata 000002b0 0800883c 0800883c 0000883c 2**2
  9. CONTENTS, ALLOC, LOAD, READONLY, DATA
  10. 3 .init_array 00000004 08008aec 08008aec 00008aec 2**2
  11. CONTENTS, ALLOC, LOAD, DATA
  12. 4 .fini_array 00000004 08008af0 08008af0 00008af0 2**2
  13. CONTENTS, ALLOC, LOAD, DATA
  14. 5 .data 00000070 20000000 08008af4 00010000 2**2
  15. CONTENTS, ALLOC, LOAD, DATA
  16. 6 .bss 000006ac 20000070 08008b64 00010070 2**2
  17. ALLOC
  18. 7 ._user_heap_stack 00000600 2000071c 08008b64 0001071c 2**0
  19. ALLOC
  20. 8 .ARM.attributes 00000029 00000000 00000000 00010070 2**0
  21. CONTENTS, READONLY
  22. 9 .debug_info 0001e298 00000000 00000000 00010099 2**0
  23. CONTENTS, READONLY, DEBUGGING
  24. 10 .debug_abbrev 00003797 00000000 00000000 0002e331 2**0
  25. CONTENTS, READONLY, DEBUGGING
  26. 11 .debug_loc 0000aa97 00000000 00000000 00031ac8 2**0
  27. CONTENTS, READONLY, DEBUGGING
  28. 12 .debug_aranges 00000cd0 00000000 00000000 0003c560 2**3
  29. CONTENTS, READONLY, DEBUGGING
  30. 13 .debug_ranges 00001418 00000000 00000000 0003d230 2**3
  31. CONTENTS, READONLY, DEBUGGING
  32. 14 .debug_line 000083bf 00000000 00000000 0003e648 2**0
  33. CONTENTS, READONLY, DEBUGGING
  34. 15 .debug_str 00004bb8 00000000 00000000 00046a07 2**0
  35. CONTENTS, READONLY, DEBUGGING
  36. 16 .comment 0000007c 00000000 00000000 0004b5bf 2**0
  37. CONTENTS, READONLY
  38. 17 .debug_frame 0000308c 00000000 00000000 0004b63c 2**2
  39. CONTENTS, READONLY, DEBUGGING
  40. 18 .stab 00000084 00000000 00000000 0004e6c8 2**2
  41. CONTENTS, READONLY, DEBUGGING
  42. 19 .stabstr 00000117 00000000 00000000 0004e74c 2**0
  43. CONTENTS, READONLY, DEBUGGING
  44. Disassembly of section .text:
  45. 080041e4 <__do_global_dtors_aux>:
  46. 80041e4: b510 push {r4, lr}
  47. 80041e6: 4c05 ldr r4, [pc, #20] ; (80041fc <__do_global_dtors_aux+0x18>)
  48. 80041e8: 7823 ldrb r3, [r4, #0]
  49. 80041ea: b933 cbnz r3, 80041fa <__do_global_dtors_aux+0x16>
  50. 80041ec: 4b04 ldr r3, [pc, #16] ; (8004200 <__do_global_dtors_aux+0x1c>)
  51. 80041ee: b113 cbz r3, 80041f6 <__do_global_dtors_aux+0x12>
  52. 80041f0: 4804 ldr r0, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x20>)
  53. 80041f2: f3af 8000 nop.w
  54. 80041f6: 2301 movs r3, #1
  55. 80041f8: 7023 strb r3, [r4, #0]
  56. 80041fa: bd10 pop {r4, pc}
  57. 80041fc: 20000070 .word 0x20000070
  58. 8004200: 00000000 .word 0x00000000
  59. 8004204: 08008824 .word 0x08008824
  60. 08004208 <frame_dummy>:
  61. 8004208: b508 push {r3, lr}
  62. 800420a: 4b03 ldr r3, [pc, #12] ; (8004218 <frame_dummy+0x10>)
  63. 800420c: b11b cbz r3, 8004216 <frame_dummy+0xe>
  64. 800420e: 4903 ldr r1, [pc, #12] ; (800421c <frame_dummy+0x14>)
  65. 8004210: 4803 ldr r0, [pc, #12] ; (8004220 <frame_dummy+0x18>)
  66. 8004212: f3af 8000 nop.w
  67. 8004216: bd08 pop {r3, pc}
  68. 8004218: 00000000 .word 0x00000000
  69. 800421c: 20000074 .word 0x20000074
  70. 8004220: 08008824 .word 0x08008824
  71. 08004224 <HAL_InitTick>:
  72. * implementation in user file.
  73. * @param TickPriority Tick interrupt priority.
  74. * @retval HAL status
  75. */
  76. __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
  77. {
  78. 8004224: b538 push {r3, r4, r5, lr}
  79. /* Configure the SysTick to have interrupt in 1ms time basis*/
  80. if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
  81. 8004226: 4b0e ldr r3, [pc, #56] ; (8004260 <HAL_InitTick+0x3c>)
  82. {
  83. 8004228: 4605 mov r5, r0
  84. if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
  85. 800422a: 7818 ldrb r0, [r3, #0]
  86. 800422c: f44f 737a mov.w r3, #1000 ; 0x3e8
  87. 8004230: fbb3 f3f0 udiv r3, r3, r0
  88. 8004234: 4a0b ldr r2, [pc, #44] ; (8004264 <HAL_InitTick+0x40>)
  89. 8004236: 6810 ldr r0, [r2, #0]
  90. 8004238: fbb0 f0f3 udiv r0, r0, r3
  91. 800423c: f000 f89e bl 800437c <HAL_SYSTICK_Config>
  92. 8004240: 4604 mov r4, r0
  93. 8004242: b958 cbnz r0, 800425c <HAL_InitTick+0x38>
  94. {
  95. return HAL_ERROR;
  96. }
  97. /* Configure the SysTick IRQ priority */
  98. if (TickPriority < (1UL << __NVIC_PRIO_BITS))
  99. 8004244: 2d0f cmp r5, #15
  100. 8004246: d809 bhi.n 800425c <HAL_InitTick+0x38>
  101. {
  102. HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
  103. 8004248: 4602 mov r2, r0
  104. 800424a: 4629 mov r1, r5
  105. 800424c: f04f 30ff mov.w r0, #4294967295
  106. 8004250: f000 f854 bl 80042fc <HAL_NVIC_SetPriority>
  107. uwTickPrio = TickPriority;
  108. 8004254: 4b04 ldr r3, [pc, #16] ; (8004268 <HAL_InitTick+0x44>)
  109. 8004256: 4620 mov r0, r4
  110. 8004258: 601d str r5, [r3, #0]
  111. 800425a: bd38 pop {r3, r4, r5, pc}
  112. return HAL_ERROR;
  113. 800425c: 2001 movs r0, #1
  114. return HAL_ERROR;
  115. }
  116. /* Return function status */
  117. return HAL_OK;
  118. }
  119. 800425e: bd38 pop {r3, r4, r5, pc}
  120. 8004260: 20000000 .word 0x20000000
  121. 8004264: 20000008 .word 0x20000008
  122. 8004268: 20000004 .word 0x20000004
  123. 0800426c <HAL_Init>:
  124. __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
  125. 800426c: 4a07 ldr r2, [pc, #28] ; (800428c <HAL_Init+0x20>)
  126. {
  127. 800426e: b508 push {r3, lr}
  128. __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
  129. 8004270: 6813 ldr r3, [r2, #0]
  130. HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
  131. 8004272: 2003 movs r0, #3
  132. __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
  133. 8004274: f043 0310 orr.w r3, r3, #16
  134. 8004278: 6013 str r3, [r2, #0]
  135. HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
  136. 800427a: f000 f82d bl 80042d8 <HAL_NVIC_SetPriorityGrouping>
  137. HAL_InitTick(TICK_INT_PRIORITY);
  138. 800427e: 2000 movs r0, #0
  139. 8004280: f7ff ffd0 bl 8004224 <HAL_InitTick>
  140. HAL_MspInit();
  141. 8004284: f003 f8be bl 8007404 <HAL_MspInit>
  142. }
  143. 8004288: 2000 movs r0, #0
  144. 800428a: bd08 pop {r3, pc}
  145. 800428c: 40022000 .word 0x40022000
  146. 08004290 <HAL_IncTick>:
  147. * implementations in user file.
  148. * @retval None
  149. */
  150. __weak void HAL_IncTick(void)
  151. {
  152. uwTick += uwTickFreq;
  153. 8004290: 4a03 ldr r2, [pc, #12] ; (80042a0 <HAL_IncTick+0x10>)
  154. 8004292: 4b04 ldr r3, [pc, #16] ; (80042a4 <HAL_IncTick+0x14>)
  155. 8004294: 6811 ldr r1, [r2, #0]
  156. 8004296: 781b ldrb r3, [r3, #0]
  157. 8004298: 440b add r3, r1
  158. 800429a: 6013 str r3, [r2, #0]
  159. 800429c: 4770 bx lr
  160. 800429e: bf00 nop
  161. 80042a0: 200003f0 .word 0x200003f0
  162. 80042a4: 20000000 .word 0x20000000
  163. 080042a8 <HAL_GetTick>:
  164. * implementations in user file.
  165. * @retval tick value
  166. */
  167. __weak uint32_t HAL_GetTick(void)
  168. {
  169. return uwTick;
  170. 80042a8: 4b01 ldr r3, [pc, #4] ; (80042b0 <HAL_GetTick+0x8>)
  171. 80042aa: 6818 ldr r0, [r3, #0]
  172. }
  173. 80042ac: 4770 bx lr
  174. 80042ae: bf00 nop
  175. 80042b0: 200003f0 .word 0x200003f0
  176. 080042b4 <HAL_Delay>:
  177. * implementations in user file.
  178. * @param Delay specifies the delay time length, in milliseconds.
  179. * @retval None
  180. */
  181. __weak void HAL_Delay(uint32_t Delay)
  182. {
  183. 80042b4: b538 push {r3, r4, r5, lr}
  184. 80042b6: 4604 mov r4, r0
  185. uint32_t tickstart = HAL_GetTick();
  186. 80042b8: f7ff fff6 bl 80042a8 <HAL_GetTick>
  187. 80042bc: 4605 mov r5, r0
  188. uint32_t wait = Delay;
  189. /* Add a freq to guarantee minimum wait */
  190. if (wait < HAL_MAX_DELAY)
  191. 80042be: 1c63 adds r3, r4, #1
  192. {
  193. wait += (uint32_t)(uwTickFreq);
  194. 80042c0: bf1e ittt ne
  195. 80042c2: 4b04 ldrne r3, [pc, #16] ; (80042d4 <HAL_Delay+0x20>)
  196. 80042c4: 781b ldrbne r3, [r3, #0]
  197. 80042c6: 18e4 addne r4, r4, r3
  198. }
  199. while ((HAL_GetTick() - tickstart) < wait)
  200. 80042c8: f7ff ffee bl 80042a8 <HAL_GetTick>
  201. 80042cc: 1b40 subs r0, r0, r5
  202. 80042ce: 4284 cmp r4, r0
  203. 80042d0: d8fa bhi.n 80042c8 <HAL_Delay+0x14>
  204. {
  205. }
  206. }
  207. 80042d2: bd38 pop {r3, r4, r5, pc}
  208. 80042d4: 20000000 .word 0x20000000
  209. 080042d8 <HAL_NVIC_SetPriorityGrouping>:
  210. __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
  211. {
  212. uint32_t reg_value;
  213. uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
  214. reg_value = SCB->AIRCR; /* read old register configuration */
  215. 80042d8: 4a07 ldr r2, [pc, #28] ; (80042f8 <HAL_NVIC_SetPriorityGrouping+0x20>)
  216. reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
  217. reg_value = (reg_value |
  218. ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
  219. (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
  220. 80042da: 0200 lsls r0, r0, #8
  221. reg_value = SCB->AIRCR; /* read old register configuration */
  222. 80042dc: 68d3 ldr r3, [r2, #12]
  223. (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
  224. 80042de: f400 60e0 and.w r0, r0, #1792 ; 0x700
  225. reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
  226. 80042e2: f423 63e0 bic.w r3, r3, #1792 ; 0x700
  227. 80042e6: 041b lsls r3, r3, #16
  228. 80042e8: 0c1b lsrs r3, r3, #16
  229. 80042ea: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
  230. 80042ee: f443 3300 orr.w r3, r3, #131072 ; 0x20000
  231. reg_value = (reg_value |
  232. 80042f2: 4303 orrs r3, r0
  233. SCB->AIRCR = reg_value;
  234. 80042f4: 60d3 str r3, [r2, #12]
  235. 80042f6: 4770 bx lr
  236. 80042f8: e000ed00 .word 0xe000ed00
  237. 080042fc <HAL_NVIC_SetPriority>:
  238. \details Reads the priority grouping field from the NVIC Interrupt Controller.
  239. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  240. */
  241. __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
  242. {
  243. return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
  244. 80042fc: 4b17 ldr r3, [pc, #92] ; (800435c <HAL_NVIC_SetPriority+0x60>)
  245. * This parameter can be a value between 0 and 15
  246. * A lower priority value indicates a higher priority.
  247. * @retval None
  248. */
  249. void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
  250. {
  251. 80042fe: b530 push {r4, r5, lr}
  252. 8004300: 68dc ldr r4, [r3, #12]
  253. 8004302: f3c4 2402 ubfx r4, r4, #8, #3
  254. {
  255. uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
  256. uint32_t PreemptPriorityBits;
  257. uint32_t SubPriorityBits;
  258. PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
  259. 8004306: f1c4 0307 rsb r3, r4, #7
  260. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  261. 800430a: 1d25 adds r5, r4, #4
  262. PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
  263. 800430c: 2b04 cmp r3, #4
  264. 800430e: bf28 it cs
  265. 8004310: 2304 movcs r3, #4
  266. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  267. 8004312: 2d06 cmp r5, #6
  268. return (
  269. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  270. 8004314: f04f 0501 mov.w r5, #1
  271. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  272. 8004318: bf98 it ls
  273. 800431a: 2400 movls r4, #0
  274. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  275. 800431c: fa05 f303 lsl.w r3, r5, r3
  276. 8004320: f103 33ff add.w r3, r3, #4294967295
  277. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  278. 8004324: bf88 it hi
  279. 8004326: 3c03 subhi r4, #3
  280. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  281. 8004328: 4019 ands r1, r3
  282. 800432a: 40a1 lsls r1, r4
  283. ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
  284. 800432c: fa05 f404 lsl.w r4, r5, r4
  285. 8004330: 3c01 subs r4, #1
  286. 8004332: 4022 ands r2, r4
  287. if ((int32_t)(IRQn) < 0)
  288. 8004334: 2800 cmp r0, #0
  289. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  290. 8004336: ea42 0201 orr.w r2, r2, r1
  291. 800433a: ea4f 1202 mov.w r2, r2, lsl #4
  292. NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  293. 800433e: bfaf iteee ge
  294. 8004340: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000
  295. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  296. 8004344: 4b06 ldrlt r3, [pc, #24] ; (8004360 <HAL_NVIC_SetPriority+0x64>)
  297. 8004346: f000 000f andlt.w r0, r0, #15
  298. 800434a: b2d2 uxtblt r2, r2
  299. NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  300. 800434c: bfa5 ittet ge
  301. 800434e: b2d2 uxtbge r2, r2
  302. 8004350: f500 4061 addge.w r0, r0, #57600 ; 0xe100
  303. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  304. 8004354: 541a strblt r2, [r3, r0]
  305. NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  306. 8004356: f880 2300 strbge.w r2, [r0, #768] ; 0x300
  307. 800435a: bd30 pop {r4, r5, pc}
  308. 800435c: e000ed00 .word 0xe000ed00
  309. 8004360: e000ed14 .word 0xe000ed14
  310. 08004364 <HAL_NVIC_EnableIRQ>:
  311. NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
  312. 8004364: 2301 movs r3, #1
  313. 8004366: 0942 lsrs r2, r0, #5
  314. 8004368: f000 001f and.w r0, r0, #31
  315. 800436c: fa03 f000 lsl.w r0, r3, r0
  316. 8004370: 4b01 ldr r3, [pc, #4] ; (8004378 <HAL_NVIC_EnableIRQ+0x14>)
  317. 8004372: f843 0022 str.w r0, [r3, r2, lsl #2]
  318. 8004376: 4770 bx lr
  319. 8004378: e000e100 .word 0xe000e100
  320. 0800437c <HAL_SYSTICK_Config>:
  321. function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
  322. must contain a vendor-specific implementation of this function.
  323. */
  324. __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
  325. {
  326. if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
  327. 800437c: 3801 subs r0, #1
  328. 800437e: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000
  329. 8004382: d20a bcs.n 800439a <HAL_SYSTICK_Config+0x1e>
  330. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  331. 8004384: 21f0 movs r1, #240 ; 0xf0
  332. {
  333. return (1UL); /* Reload value impossible */
  334. }
  335. SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
  336. 8004386: 4b06 ldr r3, [pc, #24] ; (80043a0 <HAL_SYSTICK_Config+0x24>)
  337. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  338. 8004388: 4a06 ldr r2, [pc, #24] ; (80043a4 <HAL_SYSTICK_Config+0x28>)
  339. SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
  340. 800438a: 6058 str r0, [r3, #4]
  341. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  342. 800438c: f882 1023 strb.w r1, [r2, #35] ; 0x23
  343. NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  344. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  345. 8004390: 2000 movs r0, #0
  346. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  347. 8004392: 2207 movs r2, #7
  348. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  349. 8004394: 6098 str r0, [r3, #8]
  350. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  351. 8004396: 601a str r2, [r3, #0]
  352. 8004398: 4770 bx lr
  353. return (1UL); /* Reload value impossible */
  354. 800439a: 2001 movs r0, #1
  355. * - 1 Function failed.
  356. */
  357. uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
  358. {
  359. return SysTick_Config(TicksNumb);
  360. }
  361. 800439c: 4770 bx lr
  362. 800439e: bf00 nop
  363. 80043a0: e000e010 .word 0xe000e010
  364. 80043a4: e000ed00 .word 0xe000ed00
  365. 080043a8 <HAL_DMA_Abort_IT>:
  366. */
  367. HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
  368. {
  369. HAL_StatusTypeDef status = HAL_OK;
  370. if(HAL_DMA_STATE_BUSY != hdma->State)
  371. 80043a8: f890 3021 ldrb.w r3, [r0, #33] ; 0x21
  372. {
  373. 80043ac: b510 push {r4, lr}
  374. if(HAL_DMA_STATE_BUSY != hdma->State)
  375. 80043ae: 2b02 cmp r3, #2
  376. 80043b0: d003 beq.n 80043ba <HAL_DMA_Abort_IT+0x12>
  377. {
  378. /* no transfer ongoing */
  379. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  380. 80043b2: 2304 movs r3, #4
  381. 80043b4: 6383 str r3, [r0, #56] ; 0x38
  382. status = HAL_ERROR;
  383. 80043b6: 2001 movs r0, #1
  384. 80043b8: bd10 pop {r4, pc}
  385. }
  386. else
  387. {
  388. /* Disable DMA IT */
  389. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  390. 80043ba: 6803 ldr r3, [r0, #0]
  391. 80043bc: 681a ldr r2, [r3, #0]
  392. 80043be: f022 020e bic.w r2, r2, #14
  393. 80043c2: 601a str r2, [r3, #0]
  394. /* Disable the channel */
  395. __HAL_DMA_DISABLE(hdma);
  396. 80043c4: 681a ldr r2, [r3, #0]
  397. 80043c6: f022 0201 bic.w r2, r2, #1
  398. 80043ca: 601a str r2, [r3, #0]
  399. /* Clear all flags */
  400. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  401. 80043cc: 4a29 ldr r2, [pc, #164] ; (8004474 <HAL_DMA_Abort_IT+0xcc>)
  402. 80043ce: 4293 cmp r3, r2
  403. 80043d0: d924 bls.n 800441c <HAL_DMA_Abort_IT+0x74>
  404. 80043d2: f502 7262 add.w r2, r2, #904 ; 0x388
  405. 80043d6: 4293 cmp r3, r2
  406. 80043d8: d019 beq.n 800440e <HAL_DMA_Abort_IT+0x66>
  407. 80043da: 3214 adds r2, #20
  408. 80043dc: 4293 cmp r3, r2
  409. 80043de: d018 beq.n 8004412 <HAL_DMA_Abort_IT+0x6a>
  410. 80043e0: 3214 adds r2, #20
  411. 80043e2: 4293 cmp r3, r2
  412. 80043e4: d017 beq.n 8004416 <HAL_DMA_Abort_IT+0x6e>
  413. 80043e6: 3214 adds r2, #20
  414. 80043e8: 4293 cmp r3, r2
  415. 80043ea: bf0c ite eq
  416. 80043ec: f44f 5380 moveq.w r3, #4096 ; 0x1000
  417. 80043f0: f44f 3380 movne.w r3, #65536 ; 0x10000
  418. 80043f4: 4a20 ldr r2, [pc, #128] ; (8004478 <HAL_DMA_Abort_IT+0xd0>)
  419. 80043f6: 6053 str r3, [r2, #4]
  420. /* Change the DMA state */
  421. hdma->State = HAL_DMA_STATE_READY;
  422. 80043f8: 2301 movs r3, #1
  423. /* Process Unlocked */
  424. __HAL_UNLOCK(hdma);
  425. 80043fa: 2400 movs r4, #0
  426. hdma->State = HAL_DMA_STATE_READY;
  427. 80043fc: f880 3021 strb.w r3, [r0, #33] ; 0x21
  428. /* Call User Abort callback */
  429. if(hdma->XferAbortCallback != NULL)
  430. 8004400: 6b43 ldr r3, [r0, #52] ; 0x34
  431. __HAL_UNLOCK(hdma);
  432. 8004402: f880 4020 strb.w r4, [r0, #32]
  433. if(hdma->XferAbortCallback != NULL)
  434. 8004406: b39b cbz r3, 8004470 <HAL_DMA_Abort_IT+0xc8>
  435. {
  436. hdma->XferAbortCallback(hdma);
  437. 8004408: 4798 blx r3
  438. HAL_StatusTypeDef status = HAL_OK;
  439. 800440a: 4620 mov r0, r4
  440. 800440c: bd10 pop {r4, pc}
  441. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  442. 800440e: 2301 movs r3, #1
  443. 8004410: e7f0 b.n 80043f4 <HAL_DMA_Abort_IT+0x4c>
  444. 8004412: 2310 movs r3, #16
  445. 8004414: e7ee b.n 80043f4 <HAL_DMA_Abort_IT+0x4c>
  446. 8004416: f44f 7380 mov.w r3, #256 ; 0x100
  447. 800441a: e7eb b.n 80043f4 <HAL_DMA_Abort_IT+0x4c>
  448. 800441c: 4917 ldr r1, [pc, #92] ; (800447c <HAL_DMA_Abort_IT+0xd4>)
  449. 800441e: 428b cmp r3, r1
  450. 8004420: d016 beq.n 8004450 <HAL_DMA_Abort_IT+0xa8>
  451. 8004422: 3114 adds r1, #20
  452. 8004424: 428b cmp r3, r1
  453. 8004426: d015 beq.n 8004454 <HAL_DMA_Abort_IT+0xac>
  454. 8004428: 3114 adds r1, #20
  455. 800442a: 428b cmp r3, r1
  456. 800442c: d014 beq.n 8004458 <HAL_DMA_Abort_IT+0xb0>
  457. 800442e: 3114 adds r1, #20
  458. 8004430: 428b cmp r3, r1
  459. 8004432: d014 beq.n 800445e <HAL_DMA_Abort_IT+0xb6>
  460. 8004434: 3114 adds r1, #20
  461. 8004436: 428b cmp r3, r1
  462. 8004438: d014 beq.n 8004464 <HAL_DMA_Abort_IT+0xbc>
  463. 800443a: 3114 adds r1, #20
  464. 800443c: 428b cmp r3, r1
  465. 800443e: d014 beq.n 800446a <HAL_DMA_Abort_IT+0xc2>
  466. 8004440: 4293 cmp r3, r2
  467. 8004442: bf14 ite ne
  468. 8004444: f44f 3380 movne.w r3, #65536 ; 0x10000
  469. 8004448: f04f 7380 moveq.w r3, #16777216 ; 0x1000000
  470. 800444c: 4a0c ldr r2, [pc, #48] ; (8004480 <HAL_DMA_Abort_IT+0xd8>)
  471. 800444e: e7d2 b.n 80043f6 <HAL_DMA_Abort_IT+0x4e>
  472. 8004450: 2301 movs r3, #1
  473. 8004452: e7fb b.n 800444c <HAL_DMA_Abort_IT+0xa4>
  474. 8004454: 2310 movs r3, #16
  475. 8004456: e7f9 b.n 800444c <HAL_DMA_Abort_IT+0xa4>
  476. 8004458: f44f 7380 mov.w r3, #256 ; 0x100
  477. 800445c: e7f6 b.n 800444c <HAL_DMA_Abort_IT+0xa4>
  478. 800445e: f44f 5380 mov.w r3, #4096 ; 0x1000
  479. 8004462: e7f3 b.n 800444c <HAL_DMA_Abort_IT+0xa4>
  480. 8004464: f44f 3380 mov.w r3, #65536 ; 0x10000
  481. 8004468: e7f0 b.n 800444c <HAL_DMA_Abort_IT+0xa4>
  482. 800446a: f44f 1380 mov.w r3, #1048576 ; 0x100000
  483. 800446e: e7ed b.n 800444c <HAL_DMA_Abort_IT+0xa4>
  484. HAL_StatusTypeDef status = HAL_OK;
  485. 8004470: 4618 mov r0, r3
  486. }
  487. }
  488. return status;
  489. }
  490. 8004472: bd10 pop {r4, pc}
  491. 8004474: 40020080 .word 0x40020080
  492. 8004478: 40020400 .word 0x40020400
  493. 800447c: 40020008 .word 0x40020008
  494. 8004480: 40020000 .word 0x40020000
  495. 08004484 <HAL_GPIO_Init>:
  496. * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  497. * the configuration information for the specified GPIO peripheral.
  498. * @retval None
  499. */
  500. void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  501. {
  502. 8004484: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  503. uint32_t position;
  504. uint32_t ioposition = 0x00U;
  505. uint32_t iocurrent = 0x00U;
  506. uint32_t temp = 0x00U;
  507. uint32_t config = 0x00U;
  508. 8004488: 2200 movs r2, #0
  509. assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  510. assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  511. assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
  512. /* Configure the port pins */
  513. for (position = 0U; position < GPIO_NUMBER; position++)
  514. 800448a: 4616 mov r6, r2
  515. /*--------------------- EXTI Mode Configuration ------------------------*/
  516. /* Configure the External Interrupt or event for the current IO */
  517. if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
  518. {
  519. /* Enable AFIO Clock */
  520. __HAL_RCC_AFIO_CLK_ENABLE();
  521. 800448c: 4f6c ldr r7, [pc, #432] ; (8004640 <HAL_GPIO_Init+0x1bc>)
  522. 800448e: 4b6d ldr r3, [pc, #436] ; (8004644 <HAL_GPIO_Init+0x1c0>)
  523. temp = AFIO->EXTICR[position >> 2U];
  524. CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
  525. SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
  526. 8004490: f8df e1b8 ldr.w lr, [pc, #440] ; 800464c <HAL_GPIO_Init+0x1c8>
  527. switch (GPIO_Init->Mode)
  528. 8004494: f8df c1b8 ldr.w ip, [pc, #440] ; 8004650 <HAL_GPIO_Init+0x1cc>
  529. ioposition = (0x01U << position);
  530. 8004498: f04f 0801 mov.w r8, #1
  531. iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
  532. 800449c: 680c ldr r4, [r1, #0]
  533. ioposition = (0x01U << position);
  534. 800449e: fa08 f806 lsl.w r8, r8, r6
  535. iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
  536. 80044a2: ea08 0404 and.w r4, r8, r4
  537. if (iocurrent == ioposition)
  538. 80044a6: 45a0 cmp r8, r4
  539. 80044a8: f040 8085 bne.w 80045b6 <HAL_GPIO_Init+0x132>
  540. switch (GPIO_Init->Mode)
  541. 80044ac: 684d ldr r5, [r1, #4]
  542. 80044ae: 2d12 cmp r5, #18
  543. 80044b0: f000 80b7 beq.w 8004622 <HAL_GPIO_Init+0x19e>
  544. 80044b4: f200 808d bhi.w 80045d2 <HAL_GPIO_Init+0x14e>
  545. 80044b8: 2d02 cmp r5, #2
  546. 80044ba: f000 80af beq.w 800461c <HAL_GPIO_Init+0x198>
  547. 80044be: f200 8081 bhi.w 80045c4 <HAL_GPIO_Init+0x140>
  548. 80044c2: 2d00 cmp r5, #0
  549. 80044c4: f000 8091 beq.w 80045ea <HAL_GPIO_Init+0x166>
  550. 80044c8: 2d01 cmp r5, #1
  551. 80044ca: f000 80a5 beq.w 8004618 <HAL_GPIO_Init+0x194>
  552. MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
  553. 80044ce: f04f 090f mov.w r9, #15
  554. configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
  555. 80044d2: 2cff cmp r4, #255 ; 0xff
  556. 80044d4: bf93 iteet ls
  557. 80044d6: 4682 movls sl, r0
  558. 80044d8: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000
  559. 80044dc: 3d08 subhi r5, #8
  560. 80044de: f8d0 b000 ldrls.w fp, [r0]
  561. 80044e2: bf92 itee ls
  562. 80044e4: 00b5 lslls r5, r6, #2
  563. 80044e6: f8d0 b004 ldrhi.w fp, [r0, #4]
  564. 80044ea: 00ad lslhi r5, r5, #2
  565. MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
  566. 80044ec: fa09 f805 lsl.w r8, r9, r5
  567. 80044f0: ea2b 0808 bic.w r8, fp, r8
  568. 80044f4: fa02 f505 lsl.w r5, r2, r5
  569. configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
  570. 80044f8: bf88 it hi
  571. 80044fa: f100 0a04 addhi.w sl, r0, #4
  572. MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
  573. 80044fe: ea48 0505 orr.w r5, r8, r5
  574. 8004502: f8ca 5000 str.w r5, [sl]
  575. if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
  576. 8004506: f8d1 a004 ldr.w sl, [r1, #4]
  577. 800450a: f01a 5f80 tst.w sl, #268435456 ; 0x10000000
  578. 800450e: d052 beq.n 80045b6 <HAL_GPIO_Init+0x132>
  579. __HAL_RCC_AFIO_CLK_ENABLE();
  580. 8004510: 69bd ldr r5, [r7, #24]
  581. 8004512: f026 0803 bic.w r8, r6, #3
  582. 8004516: f045 0501 orr.w r5, r5, #1
  583. 800451a: 61bd str r5, [r7, #24]
  584. 800451c: 69bd ldr r5, [r7, #24]
  585. 800451e: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000
  586. 8004522: f005 0501 and.w r5, r5, #1
  587. 8004526: 9501 str r5, [sp, #4]
  588. 8004528: f508 3880 add.w r8, r8, #65536 ; 0x10000
  589. CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
  590. 800452c: f006 0b03 and.w fp, r6, #3
  591. __HAL_RCC_AFIO_CLK_ENABLE();
  592. 8004530: 9d01 ldr r5, [sp, #4]
  593. CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
  594. 8004532: ea4f 0b8b mov.w fp, fp, lsl #2
  595. temp = AFIO->EXTICR[position >> 2U];
  596. 8004536: f8d8 5008 ldr.w r5, [r8, #8]
  597. CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
  598. 800453a: fa09 f90b lsl.w r9, r9, fp
  599. 800453e: ea25 0909 bic.w r9, r5, r9
  600. SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
  601. 8004542: 4d41 ldr r5, [pc, #260] ; (8004648 <HAL_GPIO_Init+0x1c4>)
  602. 8004544: 42a8 cmp r0, r5
  603. 8004546: d071 beq.n 800462c <HAL_GPIO_Init+0x1a8>
  604. 8004548: f505 6580 add.w r5, r5, #1024 ; 0x400
  605. 800454c: 42a8 cmp r0, r5
  606. 800454e: d06f beq.n 8004630 <HAL_GPIO_Init+0x1ac>
  607. 8004550: f505 6580 add.w r5, r5, #1024 ; 0x400
  608. 8004554: 42a8 cmp r0, r5
  609. 8004556: d06d beq.n 8004634 <HAL_GPIO_Init+0x1b0>
  610. 8004558: f505 6580 add.w r5, r5, #1024 ; 0x400
  611. 800455c: 42a8 cmp r0, r5
  612. 800455e: d06b beq.n 8004638 <HAL_GPIO_Init+0x1b4>
  613. 8004560: f505 6580 add.w r5, r5, #1024 ; 0x400
  614. 8004564: 42a8 cmp r0, r5
  615. 8004566: d069 beq.n 800463c <HAL_GPIO_Init+0x1b8>
  616. 8004568: 4570 cmp r0, lr
  617. 800456a: bf0c ite eq
  618. 800456c: 2505 moveq r5, #5
  619. 800456e: 2506 movne r5, #6
  620. 8004570: fa05 f50b lsl.w r5, r5, fp
  621. 8004574: ea45 0509 orr.w r5, r5, r9
  622. AFIO->EXTICR[position >> 2U] = temp;
  623. 8004578: f8c8 5008 str.w r5, [r8, #8]
  624. /* Configure the interrupt mask */
  625. if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
  626. {
  627. SET_BIT(EXTI->IMR, iocurrent);
  628. 800457c: 681d ldr r5, [r3, #0]
  629. if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
  630. 800457e: f41a 3f80 tst.w sl, #65536 ; 0x10000
  631. SET_BIT(EXTI->IMR, iocurrent);
  632. 8004582: bf14 ite ne
  633. 8004584: 4325 orrne r5, r4
  634. }
  635. else
  636. {
  637. CLEAR_BIT(EXTI->IMR, iocurrent);
  638. 8004586: 43a5 biceq r5, r4
  639. 8004588: 601d str r5, [r3, #0]
  640. }
  641. /* Configure the event mask */
  642. if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
  643. {
  644. SET_BIT(EXTI->EMR, iocurrent);
  645. 800458a: 685d ldr r5, [r3, #4]
  646. if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
  647. 800458c: f41a 3f00 tst.w sl, #131072 ; 0x20000
  648. SET_BIT(EXTI->EMR, iocurrent);
  649. 8004590: bf14 ite ne
  650. 8004592: 4325 orrne r5, r4
  651. }
  652. else
  653. {
  654. CLEAR_BIT(EXTI->EMR, iocurrent);
  655. 8004594: 43a5 biceq r5, r4
  656. 8004596: 605d str r5, [r3, #4]
  657. }
  658. /* Enable or disable the rising trigger */
  659. if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
  660. {
  661. SET_BIT(EXTI->RTSR, iocurrent);
  662. 8004598: 689d ldr r5, [r3, #8]
  663. if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
  664. 800459a: f41a 1f80 tst.w sl, #1048576 ; 0x100000
  665. SET_BIT(EXTI->RTSR, iocurrent);
  666. 800459e: bf14 ite ne
  667. 80045a0: 4325 orrne r5, r4
  668. }
  669. else
  670. {
  671. CLEAR_BIT(EXTI->RTSR, iocurrent);
  672. 80045a2: 43a5 biceq r5, r4
  673. 80045a4: 609d str r5, [r3, #8]
  674. }
  675. /* Enable or disable the falling trigger */
  676. if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
  677. {
  678. SET_BIT(EXTI->FTSR, iocurrent);
  679. 80045a6: 68dd ldr r5, [r3, #12]
  680. if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
  681. 80045a8: f41a 1f00 tst.w sl, #2097152 ; 0x200000
  682. SET_BIT(EXTI->FTSR, iocurrent);
  683. 80045ac: bf14 ite ne
  684. 80045ae: 432c orrne r4, r5
  685. }
  686. else
  687. {
  688. CLEAR_BIT(EXTI->FTSR, iocurrent);
  689. 80045b0: ea25 0404 biceq.w r4, r5, r4
  690. 80045b4: 60dc str r4, [r3, #12]
  691. for (position = 0U; position < GPIO_NUMBER; position++)
  692. 80045b6: 3601 adds r6, #1
  693. 80045b8: 2e10 cmp r6, #16
  694. 80045ba: f47f af6d bne.w 8004498 <HAL_GPIO_Init+0x14>
  695. }
  696. }
  697. }
  698. }
  699. }
  700. 80045be: b003 add sp, #12
  701. 80045c0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  702. switch (GPIO_Init->Mode)
  703. 80045c4: 2d03 cmp r5, #3
  704. 80045c6: d025 beq.n 8004614 <HAL_GPIO_Init+0x190>
  705. 80045c8: 2d11 cmp r5, #17
  706. 80045ca: d180 bne.n 80044ce <HAL_GPIO_Init+0x4a>
  707. config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
  708. 80045cc: 68ca ldr r2, [r1, #12]
  709. 80045ce: 3204 adds r2, #4
  710. break;
  711. 80045d0: e77d b.n 80044ce <HAL_GPIO_Init+0x4a>
  712. switch (GPIO_Init->Mode)
  713. 80045d2: 4565 cmp r5, ip
  714. 80045d4: d009 beq.n 80045ea <HAL_GPIO_Init+0x166>
  715. 80045d6: d812 bhi.n 80045fe <HAL_GPIO_Init+0x17a>
  716. 80045d8: f8df 9078 ldr.w r9, [pc, #120] ; 8004654 <HAL_GPIO_Init+0x1d0>
  717. 80045dc: 454d cmp r5, r9
  718. 80045de: d004 beq.n 80045ea <HAL_GPIO_Init+0x166>
  719. 80045e0: f509 3980 add.w r9, r9, #65536 ; 0x10000
  720. 80045e4: 454d cmp r5, r9
  721. 80045e6: f47f af72 bne.w 80044ce <HAL_GPIO_Init+0x4a>
  722. if (GPIO_Init->Pull == GPIO_NOPULL)
  723. 80045ea: 688a ldr r2, [r1, #8]
  724. 80045ec: b1e2 cbz r2, 8004628 <HAL_GPIO_Init+0x1a4>
  725. else if (GPIO_Init->Pull == GPIO_PULLUP)
  726. 80045ee: 2a01 cmp r2, #1
  727. GPIOx->BSRR = ioposition;
  728. 80045f0: bf0c ite eq
  729. 80045f2: f8c0 8010 streq.w r8, [r0, #16]
  730. GPIOx->BRR = ioposition;
  731. 80045f6: f8c0 8014 strne.w r8, [r0, #20]
  732. config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
  733. 80045fa: 2208 movs r2, #8
  734. 80045fc: e767 b.n 80044ce <HAL_GPIO_Init+0x4a>
  735. switch (GPIO_Init->Mode)
  736. 80045fe: f8df 9058 ldr.w r9, [pc, #88] ; 8004658 <HAL_GPIO_Init+0x1d4>
  737. 8004602: 454d cmp r5, r9
  738. 8004604: d0f1 beq.n 80045ea <HAL_GPIO_Init+0x166>
  739. 8004606: f509 3980 add.w r9, r9, #65536 ; 0x10000
  740. 800460a: 454d cmp r5, r9
  741. 800460c: d0ed beq.n 80045ea <HAL_GPIO_Init+0x166>
  742. 800460e: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000
  743. 8004612: e7e7 b.n 80045e4 <HAL_GPIO_Init+0x160>
  744. config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
  745. 8004614: 2200 movs r2, #0
  746. 8004616: e75a b.n 80044ce <HAL_GPIO_Init+0x4a>
  747. config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
  748. 8004618: 68ca ldr r2, [r1, #12]
  749. break;
  750. 800461a: e758 b.n 80044ce <HAL_GPIO_Init+0x4a>
  751. config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
  752. 800461c: 68ca ldr r2, [r1, #12]
  753. 800461e: 3208 adds r2, #8
  754. break;
  755. 8004620: e755 b.n 80044ce <HAL_GPIO_Init+0x4a>
  756. config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
  757. 8004622: 68ca ldr r2, [r1, #12]
  758. 8004624: 320c adds r2, #12
  759. break;
  760. 8004626: e752 b.n 80044ce <HAL_GPIO_Init+0x4a>
  761. config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
  762. 8004628: 2204 movs r2, #4
  763. 800462a: e750 b.n 80044ce <HAL_GPIO_Init+0x4a>
  764. SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
  765. 800462c: 2500 movs r5, #0
  766. 800462e: e79f b.n 8004570 <HAL_GPIO_Init+0xec>
  767. 8004630: 2501 movs r5, #1
  768. 8004632: e79d b.n 8004570 <HAL_GPIO_Init+0xec>
  769. 8004634: 2502 movs r5, #2
  770. 8004636: e79b b.n 8004570 <HAL_GPIO_Init+0xec>
  771. 8004638: 2503 movs r5, #3
  772. 800463a: e799 b.n 8004570 <HAL_GPIO_Init+0xec>
  773. 800463c: 2504 movs r5, #4
  774. 800463e: e797 b.n 8004570 <HAL_GPIO_Init+0xec>
  775. 8004640: 40021000 .word 0x40021000
  776. 8004644: 40010400 .word 0x40010400
  777. 8004648: 40010800 .word 0x40010800
  778. 800464c: 40011c00 .word 0x40011c00
  779. 8004650: 10210000 .word 0x10210000
  780. 8004654: 10110000 .word 0x10110000
  781. 8004658: 10310000 .word 0x10310000
  782. 0800465c <HAL_GPIO_ReadPin>:
  783. GPIO_PinState bitstatus;
  784. /* Check the parameters */
  785. assert_param(IS_GPIO_PIN(GPIO_Pin));
  786. if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
  787. 800465c: 6883 ldr r3, [r0, #8]
  788. 800465e: 4219 tst r1, r3
  789. else
  790. {
  791. bitstatus = GPIO_PIN_RESET;
  792. }
  793. return bitstatus;
  794. }
  795. 8004660: bf14 ite ne
  796. 8004662: 2001 movne r0, #1
  797. 8004664: 2000 moveq r0, #0
  798. 8004666: 4770 bx lr
  799. 08004668 <HAL_GPIO_WritePin>:
  800. {
  801. /* Check the parameters */
  802. assert_param(IS_GPIO_PIN(GPIO_Pin));
  803. assert_param(IS_GPIO_PIN_ACTION(PinState));
  804. if (PinState != GPIO_PIN_RESET)
  805. 8004668: b10a cbz r2, 800466e <HAL_GPIO_WritePin+0x6>
  806. {
  807. GPIOx->BSRR = GPIO_Pin;
  808. }
  809. else
  810. {
  811. GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
  812. 800466a: 6101 str r1, [r0, #16]
  813. 800466c: 4770 bx lr
  814. 800466e: 0409 lsls r1, r1, #16
  815. 8004670: e7fb b.n 800466a <HAL_GPIO_WritePin+0x2>
  816. 08004672 <HAL_GPIO_TogglePin>:
  817. void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  818. {
  819. /* Check the parameters */
  820. assert_param(IS_GPIO_PIN(GPIO_Pin));
  821. GPIOx->ODR ^= GPIO_Pin;
  822. 8004672: 68c3 ldr r3, [r0, #12]
  823. 8004674: 4059 eors r1, r3
  824. 8004676: 60c1 str r1, [r0, #12]
  825. 8004678: 4770 bx lr
  826. 0800467a <I2C_IsAcknowledgeFailed>:
  827. * the configuration information for the specified I2C.
  828. * @retval HAL status
  829. */
  830. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  831. {
  832. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  833. 800467a: 6802 ldr r2, [r0, #0]
  834. 800467c: 6953 ldr r3, [r2, #20]
  835. 800467e: f413 6380 ands.w r3, r3, #1024 ; 0x400
  836. 8004682: d00d beq.n 80046a0 <I2C_IsAcknowledgeFailed+0x26>
  837. {
  838. /* Clear NACKF Flag */
  839. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  840. 8004684: f46f 6380 mvn.w r3, #1024 ; 0x400
  841. 8004688: 6153 str r3, [r2, #20]
  842. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  843. 800468a: 2304 movs r3, #4
  844. hi2c->PreviousState = I2C_STATE_NONE;
  845. hi2c->State= HAL_I2C_STATE_READY;
  846. 800468c: 2220 movs r2, #32
  847. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  848. 800468e: 6403 str r3, [r0, #64] ; 0x40
  849. hi2c->PreviousState = I2C_STATE_NONE;
  850. 8004690: 2300 movs r3, #0
  851. 8004692: 6303 str r3, [r0, #48] ; 0x30
  852. /* Process Unlocked */
  853. __HAL_UNLOCK(hi2c);
  854. 8004694: f880 303c strb.w r3, [r0, #60] ; 0x3c
  855. hi2c->State= HAL_I2C_STATE_READY;
  856. 8004698: f880 203d strb.w r2, [r0, #61] ; 0x3d
  857. return HAL_ERROR;
  858. 800469c: 2001 movs r0, #1
  859. 800469e: 4770 bx lr
  860. }
  861. return HAL_OK;
  862. 80046a0: 4618 mov r0, r3
  863. }
  864. 80046a2: 4770 bx lr
  865. 080046a4 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
  866. {
  867. 80046a4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  868. 80046a8: 4604 mov r4, r0
  869. 80046aa: 4617 mov r7, r2
  870. 80046ac: 4699 mov r9, r3
  871. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  872. 80046ae: f3c1 4807 ubfx r8, r1, #16, #8
  873. 80046b2: b28e uxth r6, r1
  874. 80046b4: 6825 ldr r5, [r4, #0]
  875. 80046b6: f1b8 0f01 cmp.w r8, #1
  876. 80046ba: bf0c ite eq
  877. 80046bc: 696b ldreq r3, [r5, #20]
  878. 80046be: 69ab ldrne r3, [r5, #24]
  879. 80046c0: ea36 0303 bics.w r3, r6, r3
  880. 80046c4: bf14 ite ne
  881. 80046c6: 2001 movne r0, #1
  882. 80046c8: 2000 moveq r0, #0
  883. 80046ca: b908 cbnz r0, 80046d0 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x2c>
  884. }
  885. 80046cc: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  886. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  887. 80046d0: 696b ldr r3, [r5, #20]
  888. 80046d2: 055a lsls r2, r3, #21
  889. 80046d4: d512 bpl.n 80046fc <I2C_WaitOnMasterAddressFlagUntilTimeout+0x58>
  890. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  891. 80046d6: 682b ldr r3, [r5, #0]
  892. hi2c->State= HAL_I2C_STATE_READY;
  893. 80046d8: 2220 movs r2, #32
  894. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  895. 80046da: f443 7300 orr.w r3, r3, #512 ; 0x200
  896. 80046de: 602b str r3, [r5, #0]
  897. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  898. 80046e0: f46f 6380 mvn.w r3, #1024 ; 0x400
  899. 80046e4: 616b str r3, [r5, #20]
  900. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  901. 80046e6: 2304 movs r3, #4
  902. 80046e8: 6423 str r3, [r4, #64] ; 0x40
  903. hi2c->PreviousState = I2C_STATE_NONE;
  904. 80046ea: 2300 movs r3, #0
  905. return HAL_ERROR;
  906. 80046ec: 2001 movs r0, #1
  907. hi2c->PreviousState = I2C_STATE_NONE;
  908. 80046ee: 6323 str r3, [r4, #48] ; 0x30
  909. __HAL_UNLOCK(hi2c);
  910. 80046f0: f884 303c strb.w r3, [r4, #60] ; 0x3c
  911. hi2c->State= HAL_I2C_STATE_READY;
  912. 80046f4: f884 203d strb.w r2, [r4, #61] ; 0x3d
  913. return HAL_ERROR;
  914. 80046f8: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  915. if(Timeout != HAL_MAX_DELAY)
  916. 80046fc: 1c7b adds r3, r7, #1
  917. 80046fe: d0d9 beq.n 80046b4 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
  918. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  919. 8004700: b94f cbnz r7, 8004716 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x72>
  920. hi2c->PreviousState = I2C_STATE_NONE;
  921. 8004702: 2300 movs r3, #0
  922. hi2c->State= HAL_I2C_STATE_READY;
  923. 8004704: 2220 movs r2, #32
  924. hi2c->PreviousState = I2C_STATE_NONE;
  925. 8004706: 6323 str r3, [r4, #48] ; 0x30
  926. __HAL_UNLOCK(hi2c);
  927. 8004708: f884 303c strb.w r3, [r4, #60] ; 0x3c
  928. hi2c->State= HAL_I2C_STATE_READY;
  929. 800470c: f884 203d strb.w r2, [r4, #61] ; 0x3d
  930. return HAL_TIMEOUT;
  931. 8004710: 2003 movs r0, #3
  932. 8004712: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  933. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  934. 8004716: f7ff fdc7 bl 80042a8 <HAL_GetTick>
  935. 800471a: eba0 0009 sub.w r0, r0, r9
  936. 800471e: 4287 cmp r7, r0
  937. 8004720: d2c8 bcs.n 80046b4 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
  938. 8004722: e7ee b.n 8004702 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x5e>
  939. 08004724 <I2C_WaitOnFlagUntilTimeout>:
  940. {
  941. 8004724: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  942. 8004728: 4604 mov r4, r0
  943. 800472a: 4690 mov r8, r2
  944. 800472c: 461f mov r7, r3
  945. 800472e: 9e08 ldr r6, [sp, #32]
  946. while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
  947. 8004730: f3c1 4907 ubfx r9, r1, #16, #8
  948. 8004734: b28d uxth r5, r1
  949. 8004736: 6823 ldr r3, [r4, #0]
  950. 8004738: f1b9 0f01 cmp.w r9, #1
  951. 800473c: bf0c ite eq
  952. 800473e: 695b ldreq r3, [r3, #20]
  953. 8004740: 699b ldrne r3, [r3, #24]
  954. 8004742: ea35 0303 bics.w r3, r5, r3
  955. 8004746: bf0c ite eq
  956. 8004748: 2301 moveq r3, #1
  957. 800474a: 2300 movne r3, #0
  958. 800474c: 4543 cmp r3, r8
  959. 800474e: d002 beq.n 8004756 <I2C_WaitOnFlagUntilTimeout+0x32>
  960. return HAL_OK;
  961. 8004750: 2000 movs r0, #0
  962. }
  963. 8004752: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  964. if(Timeout != HAL_MAX_DELAY)
  965. 8004756: 1c7b adds r3, r7, #1
  966. 8004758: d0ed beq.n 8004736 <I2C_WaitOnFlagUntilTimeout+0x12>
  967. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  968. 800475a: b95f cbnz r7, 8004774 <I2C_WaitOnFlagUntilTimeout+0x50>
  969. hi2c->PreviousState = I2C_STATE_NONE;
  970. 800475c: 2300 movs r3, #0
  971. hi2c->State= HAL_I2C_STATE_READY;
  972. 800475e: 2220 movs r2, #32
  973. hi2c->PreviousState = I2C_STATE_NONE;
  974. 8004760: 6323 str r3, [r4, #48] ; 0x30
  975. __HAL_UNLOCK(hi2c);
  976. 8004762: f884 303c strb.w r3, [r4, #60] ; 0x3c
  977. hi2c->State= HAL_I2C_STATE_READY;
  978. 8004766: f884 203d strb.w r2, [r4, #61] ; 0x3d
  979. __HAL_UNLOCK(hi2c);
  980. 800476a: 2003 movs r0, #3
  981. hi2c->Mode = HAL_I2C_MODE_NONE;
  982. 800476c: f884 303e strb.w r3, [r4, #62] ; 0x3e
  983. 8004770: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  984. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  985. 8004774: f7ff fd98 bl 80042a8 <HAL_GetTick>
  986. 8004778: 1b80 subs r0, r0, r6
  987. 800477a: 4287 cmp r7, r0
  988. 800477c: d2db bcs.n 8004736 <I2C_WaitOnFlagUntilTimeout+0x12>
  989. 800477e: e7ed b.n 800475c <I2C_WaitOnFlagUntilTimeout+0x38>
  990. 08004780 <I2C_WaitOnTXEFlagUntilTimeout>:
  991. {
  992. 8004780: b570 push {r4, r5, r6, lr}
  993. 8004782: 4604 mov r4, r0
  994. 8004784: 460d mov r5, r1
  995. 8004786: 4616 mov r6, r2
  996. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  997. 8004788: 6823 ldr r3, [r4, #0]
  998. 800478a: 695b ldr r3, [r3, #20]
  999. 800478c: 061b lsls r3, r3, #24
  1000. 800478e: d501 bpl.n 8004794 <I2C_WaitOnTXEFlagUntilTimeout+0x14>
  1001. return HAL_OK;
  1002. 8004790: 2000 movs r0, #0
  1003. 8004792: bd70 pop {r4, r5, r6, pc}
  1004. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  1005. 8004794: 4620 mov r0, r4
  1006. 8004796: f7ff ff70 bl 800467a <I2C_IsAcknowledgeFailed>
  1007. 800479a: b9a8 cbnz r0, 80047c8 <I2C_WaitOnTXEFlagUntilTimeout+0x48>
  1008. if(Timeout != HAL_MAX_DELAY)
  1009. 800479c: 1c6a adds r2, r5, #1
  1010. 800479e: d0f3 beq.n 8004788 <I2C_WaitOnTXEFlagUntilTimeout+0x8>
  1011. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1012. 80047a0: b965 cbnz r5, 80047bc <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
  1013. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1014. 80047a2: 6c23 ldr r3, [r4, #64] ; 0x40
  1015. hi2c->State= HAL_I2C_STATE_READY;
  1016. 80047a4: 2220 movs r2, #32
  1017. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1018. 80047a6: f043 0320 orr.w r3, r3, #32
  1019. 80047aa: 6423 str r3, [r4, #64] ; 0x40
  1020. hi2c->PreviousState = I2C_STATE_NONE;
  1021. 80047ac: 2300 movs r3, #0
  1022. __HAL_UNLOCK(hi2c);
  1023. 80047ae: 2003 movs r0, #3
  1024. hi2c->PreviousState = I2C_STATE_NONE;
  1025. 80047b0: 6323 str r3, [r4, #48] ; 0x30
  1026. __HAL_UNLOCK(hi2c);
  1027. 80047b2: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1028. hi2c->State= HAL_I2C_STATE_READY;
  1029. 80047b6: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1030. 80047ba: bd70 pop {r4, r5, r6, pc}
  1031. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1032. 80047bc: f7ff fd74 bl 80042a8 <HAL_GetTick>
  1033. 80047c0: 1b80 subs r0, r0, r6
  1034. 80047c2: 4285 cmp r5, r0
  1035. 80047c4: d2e0 bcs.n 8004788 <I2C_WaitOnTXEFlagUntilTimeout+0x8>
  1036. 80047c6: e7ec b.n 80047a2 <I2C_WaitOnTXEFlagUntilTimeout+0x22>
  1037. return HAL_ERROR;
  1038. 80047c8: 2001 movs r0, #1
  1039. }
  1040. 80047ca: bd70 pop {r4, r5, r6, pc}
  1041. 080047cc <I2C_RequestMemoryWrite>:
  1042. {
  1043. 80047cc: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
  1044. 80047d0: 4615 mov r5, r2
  1045. hi2c->Instance->CR1 |= I2C_CR1_START;
  1046. 80047d2: 6802 ldr r2, [r0, #0]
  1047. {
  1048. 80047d4: 4698 mov r8, r3
  1049. hi2c->Instance->CR1 |= I2C_CR1_START;
  1050. 80047d6: 6813 ldr r3, [r2, #0]
  1051. {
  1052. 80047d8: 9e0b ldr r6, [sp, #44] ; 0x2c
  1053. hi2c->Instance->CR1 |= I2C_CR1_START;
  1054. 80047da: f443 7380 orr.w r3, r3, #256 ; 0x100
  1055. 80047de: 6013 str r3, [r2, #0]
  1056. {
  1057. 80047e0: 460f mov r7, r1
  1058. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1059. 80047e2: 9600 str r6, [sp, #0]
  1060. 80047e4: 9b0a ldr r3, [sp, #40] ; 0x28
  1061. 80047e6: 2200 movs r2, #0
  1062. 80047e8: f04f 1101 mov.w r1, #65537 ; 0x10001
  1063. {
  1064. 80047ec: 4604 mov r4, r0
  1065. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1066. 80047ee: f7ff ff99 bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  1067. 80047f2: b968 cbnz r0, 8004810 <I2C_RequestMemoryWrite+0x44>
  1068. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  1069. 80047f4: 6823 ldr r3, [r4, #0]
  1070. 80047f6: f007 07fe and.w r7, r7, #254 ; 0xfe
  1071. 80047fa: 611f str r7, [r3, #16]
  1072. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  1073. 80047fc: 9a0a ldr r2, [sp, #40] ; 0x28
  1074. 80047fe: 4633 mov r3, r6
  1075. 8004800: 491a ldr r1, [pc, #104] ; (800486c <I2C_RequestMemoryWrite+0xa0>)
  1076. 8004802: 4620 mov r0, r4
  1077. 8004804: f7ff ff4e bl 80046a4 <I2C_WaitOnMasterAddressFlagUntilTimeout>
  1078. 8004808: b130 cbz r0, 8004818 <I2C_RequestMemoryWrite+0x4c>
  1079. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1080. 800480a: 6c23 ldr r3, [r4, #64] ; 0x40
  1081. 800480c: 2b04 cmp r3, #4
  1082. 800480e: d018 beq.n 8004842 <I2C_RequestMemoryWrite+0x76>
  1083. return HAL_TIMEOUT;
  1084. 8004810: 2003 movs r0, #3
  1085. }
  1086. 8004812: b004 add sp, #16
  1087. 8004814: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  1088. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1089. 8004818: 6823 ldr r3, [r4, #0]
  1090. 800481a: 9003 str r0, [sp, #12]
  1091. 800481c: 695a ldr r2, [r3, #20]
  1092. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1093. 800481e: 990a ldr r1, [sp, #40] ; 0x28
  1094. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1095. 8004820: 9203 str r2, [sp, #12]
  1096. 8004822: 699b ldr r3, [r3, #24]
  1097. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1098. 8004824: 4632 mov r2, r6
  1099. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1100. 8004826: 9303 str r3, [sp, #12]
  1101. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1102. 8004828: 4620 mov r0, r4
  1103. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1104. 800482a: 9b03 ldr r3, [sp, #12]
  1105. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1106. 800482c: f7ff ffa8 bl 8004780 <I2C_WaitOnTXEFlagUntilTimeout>
  1107. 8004830: b148 cbz r0, 8004846 <I2C_RequestMemoryWrite+0x7a>
  1108. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1109. 8004832: 6c23 ldr r3, [r4, #64] ; 0x40
  1110. 8004834: 2b04 cmp r3, #4
  1111. 8004836: d1eb bne.n 8004810 <I2C_RequestMemoryWrite+0x44>
  1112. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1113. 8004838: 6822 ldr r2, [r4, #0]
  1114. 800483a: 6813 ldr r3, [r2, #0]
  1115. 800483c: f443 7300 orr.w r3, r3, #512 ; 0x200
  1116. 8004840: 6013 str r3, [r2, #0]
  1117. return HAL_ERROR;
  1118. 8004842: 2001 movs r0, #1
  1119. 8004844: e7e5 b.n 8004812 <I2C_RequestMemoryWrite+0x46>
  1120. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  1121. 8004846: f1b8 0f01 cmp.w r8, #1
  1122. 800484a: 6823 ldr r3, [r4, #0]
  1123. 800484c: d102 bne.n 8004854 <I2C_RequestMemoryWrite+0x88>
  1124. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1125. 800484e: b2ed uxtb r5, r5
  1126. 8004850: 611d str r5, [r3, #16]
  1127. 8004852: e7de b.n 8004812 <I2C_RequestMemoryWrite+0x46>
  1128. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  1129. 8004854: 0a2a lsrs r2, r5, #8
  1130. 8004856: 611a str r2, [r3, #16]
  1131. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1132. 8004858: 990a ldr r1, [sp, #40] ; 0x28
  1133. 800485a: 4632 mov r2, r6
  1134. 800485c: 4620 mov r0, r4
  1135. 800485e: f7ff ff8f bl 8004780 <I2C_WaitOnTXEFlagUntilTimeout>
  1136. 8004862: 2800 cmp r0, #0
  1137. 8004864: d1e5 bne.n 8004832 <I2C_RequestMemoryWrite+0x66>
  1138. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1139. 8004866: 6823 ldr r3, [r4, #0]
  1140. 8004868: e7f1 b.n 800484e <I2C_RequestMemoryWrite+0x82>
  1141. 800486a: bf00 nop
  1142. 800486c: 00010002 .word 0x00010002
  1143. 08004870 <I2C_RequestMemoryRead>:
  1144. {
  1145. 8004870: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
  1146. 8004874: 4698 mov r8, r3
  1147. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1148. 8004876: 6803 ldr r3, [r0, #0]
  1149. {
  1150. 8004878: 4616 mov r6, r2
  1151. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1152. 800487a: 681a ldr r2, [r3, #0]
  1153. {
  1154. 800487c: 9d0b ldr r5, [sp, #44] ; 0x2c
  1155. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1156. 800487e: f442 6280 orr.w r2, r2, #1024 ; 0x400
  1157. 8004882: 601a str r2, [r3, #0]
  1158. hi2c->Instance->CR1 |= I2C_CR1_START;
  1159. 8004884: 681a ldr r2, [r3, #0]
  1160. {
  1161. 8004886: 460f mov r7, r1
  1162. hi2c->Instance->CR1 |= I2C_CR1_START;
  1163. 8004888: f442 7280 orr.w r2, r2, #256 ; 0x100
  1164. 800488c: 601a str r2, [r3, #0]
  1165. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1166. 800488e: f04f 1101 mov.w r1, #65537 ; 0x10001
  1167. 8004892: 9500 str r5, [sp, #0]
  1168. 8004894: 9b0a ldr r3, [sp, #40] ; 0x28
  1169. 8004896: 2200 movs r2, #0
  1170. {
  1171. 8004898: 4604 mov r4, r0
  1172. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1173. 800489a: f7ff ff43 bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  1174. 800489e: b980 cbnz r0, 80048c2 <I2C_RequestMemoryRead+0x52>
  1175. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  1176. 80048a0: 6823 ldr r3, [r4, #0]
  1177. 80048a2: b2ff uxtb r7, r7
  1178. 80048a4: f007 02fe and.w r2, r7, #254 ; 0xfe
  1179. 80048a8: 611a str r2, [r3, #16]
  1180. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  1181. 80048aa: 492d ldr r1, [pc, #180] ; (8004960 <I2C_RequestMemoryRead+0xf0>)
  1182. 80048ac: 462b mov r3, r5
  1183. 80048ae: 9a0a ldr r2, [sp, #40] ; 0x28
  1184. 80048b0: 4620 mov r0, r4
  1185. 80048b2: f7ff fef7 bl 80046a4 <I2C_WaitOnMasterAddressFlagUntilTimeout>
  1186. 80048b6: b140 cbz r0, 80048ca <I2C_RequestMemoryRead+0x5a>
  1187. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1188. 80048b8: 6c23 ldr r3, [r4, #64] ; 0x40
  1189. 80048ba: 2b04 cmp r3, #4
  1190. 80048bc: d101 bne.n 80048c2 <I2C_RequestMemoryRead+0x52>
  1191. return HAL_ERROR;
  1192. 80048be: 2001 movs r0, #1
  1193. 80048c0: e000 b.n 80048c4 <I2C_RequestMemoryRead+0x54>
  1194. return HAL_TIMEOUT;
  1195. 80048c2: 2003 movs r0, #3
  1196. }
  1197. 80048c4: b004 add sp, #16
  1198. 80048c6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  1199. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1200. 80048ca: 6823 ldr r3, [r4, #0]
  1201. 80048cc: 9003 str r0, [sp, #12]
  1202. 80048ce: 695a ldr r2, [r3, #20]
  1203. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1204. 80048d0: 990a ldr r1, [sp, #40] ; 0x28
  1205. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1206. 80048d2: 9203 str r2, [sp, #12]
  1207. 80048d4: 699b ldr r3, [r3, #24]
  1208. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1209. 80048d6: 462a mov r2, r5
  1210. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1211. 80048d8: 9303 str r3, [sp, #12]
  1212. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1213. 80048da: 4620 mov r0, r4
  1214. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1215. 80048dc: 9b03 ldr r3, [sp, #12]
  1216. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1217. 80048de: f7ff ff4f bl 8004780 <I2C_WaitOnTXEFlagUntilTimeout>
  1218. 80048e2: b140 cbz r0, 80048f6 <I2C_RequestMemoryRead+0x86>
  1219. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1220. 80048e4: 6c23 ldr r3, [r4, #64] ; 0x40
  1221. 80048e6: 2b04 cmp r3, #4
  1222. 80048e8: d1eb bne.n 80048c2 <I2C_RequestMemoryRead+0x52>
  1223. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1224. 80048ea: 6822 ldr r2, [r4, #0]
  1225. 80048ec: 6813 ldr r3, [r2, #0]
  1226. 80048ee: f443 7300 orr.w r3, r3, #512 ; 0x200
  1227. 80048f2: 6013 str r3, [r2, #0]
  1228. 80048f4: e7e3 b.n 80048be <I2C_RequestMemoryRead+0x4e>
  1229. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  1230. 80048f6: f1b8 0f01 cmp.w r8, #1
  1231. 80048fa: 6823 ldr r3, [r4, #0]
  1232. 80048fc: d124 bne.n 8004948 <I2C_RequestMemoryRead+0xd8>
  1233. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1234. 80048fe: b2f6 uxtb r6, r6
  1235. 8004900: 611e str r6, [r3, #16]
  1236. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1237. 8004902: 462a mov r2, r5
  1238. 8004904: 990a ldr r1, [sp, #40] ; 0x28
  1239. 8004906: 4620 mov r0, r4
  1240. 8004908: f7ff ff3a bl 8004780 <I2C_WaitOnTXEFlagUntilTimeout>
  1241. 800490c: 4602 mov r2, r0
  1242. 800490e: 2800 cmp r0, #0
  1243. 8004910: d1e8 bne.n 80048e4 <I2C_RequestMemoryRead+0x74>
  1244. hi2c->Instance->CR1 |= I2C_CR1_START;
  1245. 8004912: 6821 ldr r1, [r4, #0]
  1246. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1247. 8004914: 4620 mov r0, r4
  1248. hi2c->Instance->CR1 |= I2C_CR1_START;
  1249. 8004916: 680b ldr r3, [r1, #0]
  1250. 8004918: f443 7380 orr.w r3, r3, #256 ; 0x100
  1251. 800491c: 600b str r3, [r1, #0]
  1252. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1253. 800491e: 9500 str r5, [sp, #0]
  1254. 8004920: 9b0a ldr r3, [sp, #40] ; 0x28
  1255. 8004922: f04f 1101 mov.w r1, #65537 ; 0x10001
  1256. 8004926: f7ff fefd bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  1257. 800492a: 2800 cmp r0, #0
  1258. 800492c: d1c9 bne.n 80048c2 <I2C_RequestMemoryRead+0x52>
  1259. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  1260. 800492e: 6823 ldr r3, [r4, #0]
  1261. 8004930: f047 0701 orr.w r7, r7, #1
  1262. 8004934: 611f str r7, [r3, #16]
  1263. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  1264. 8004936: 9a0a ldr r2, [sp, #40] ; 0x28
  1265. 8004938: 462b mov r3, r5
  1266. 800493a: 4909 ldr r1, [pc, #36] ; (8004960 <I2C_RequestMemoryRead+0xf0>)
  1267. 800493c: 4620 mov r0, r4
  1268. 800493e: f7ff feb1 bl 80046a4 <I2C_WaitOnMasterAddressFlagUntilTimeout>
  1269. 8004942: 2800 cmp r0, #0
  1270. 8004944: d1b8 bne.n 80048b8 <I2C_RequestMemoryRead+0x48>
  1271. 8004946: e7bd b.n 80048c4 <I2C_RequestMemoryRead+0x54>
  1272. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  1273. 8004948: 0a32 lsrs r2, r6, #8
  1274. 800494a: 611a str r2, [r3, #16]
  1275. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1276. 800494c: 990a ldr r1, [sp, #40] ; 0x28
  1277. 800494e: 462a mov r2, r5
  1278. 8004950: 4620 mov r0, r4
  1279. 8004952: f7ff ff15 bl 8004780 <I2C_WaitOnTXEFlagUntilTimeout>
  1280. 8004956: 2800 cmp r0, #0
  1281. 8004958: d1c4 bne.n 80048e4 <I2C_RequestMemoryRead+0x74>
  1282. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1283. 800495a: 6823 ldr r3, [r4, #0]
  1284. 800495c: e7cf b.n 80048fe <I2C_RequestMemoryRead+0x8e>
  1285. 800495e: bf00 nop
  1286. 8004960: 00010002 .word 0x00010002
  1287. 08004964 <I2C_WaitOnRXNEFlagUntilTimeout>:
  1288. {
  1289. 8004964: b570 push {r4, r5, r6, lr}
  1290. 8004966: 4604 mov r4, r0
  1291. 8004968: 460d mov r5, r1
  1292. 800496a: 4616 mov r6, r2
  1293. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  1294. 800496c: 6820 ldr r0, [r4, #0]
  1295. 800496e: 6943 ldr r3, [r0, #20]
  1296. 8004970: f013 0340 ands.w r3, r3, #64 ; 0x40
  1297. 8004974: d001 beq.n 800497a <I2C_WaitOnRXNEFlagUntilTimeout+0x16>
  1298. return HAL_OK;
  1299. 8004976: 2000 movs r0, #0
  1300. }
  1301. 8004978: bd70 pop {r4, r5, r6, pc}
  1302. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  1303. 800497a: 6942 ldr r2, [r0, #20]
  1304. 800497c: 06d2 lsls r2, r2, #27
  1305. 800497e: d50b bpl.n 8004998 <I2C_WaitOnRXNEFlagUntilTimeout+0x34>
  1306. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  1307. 8004980: f06f 0210 mvn.w r2, #16
  1308. 8004984: 6142 str r2, [r0, #20]
  1309. hi2c->State= HAL_I2C_STATE_READY;
  1310. 8004986: 2220 movs r2, #32
  1311. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1312. 8004988: 6423 str r3, [r4, #64] ; 0x40
  1313. __HAL_UNLOCK(hi2c);
  1314. 800498a: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1315. hi2c->PreviousState = I2C_STATE_NONE;
  1316. 800498e: 6323 str r3, [r4, #48] ; 0x30
  1317. return HAL_ERROR;
  1318. 8004990: 2001 movs r0, #1
  1319. hi2c->State= HAL_I2C_STATE_READY;
  1320. 8004992: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1321. return HAL_ERROR;
  1322. 8004996: bd70 pop {r4, r5, r6, pc}
  1323. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1324. 8004998: b95d cbnz r5, 80049b2 <I2C_WaitOnRXNEFlagUntilTimeout+0x4e>
  1325. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1326. 800499a: 6c23 ldr r3, [r4, #64] ; 0x40
  1327. __HAL_UNLOCK(hi2c);
  1328. 800499c: 2003 movs r0, #3
  1329. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1330. 800499e: f043 0320 orr.w r3, r3, #32
  1331. 80049a2: 6423 str r3, [r4, #64] ; 0x40
  1332. hi2c->State= HAL_I2C_STATE_READY;
  1333. 80049a4: 2320 movs r3, #32
  1334. 80049a6: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1335. __HAL_UNLOCK(hi2c);
  1336. 80049aa: 2300 movs r3, #0
  1337. 80049ac: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1338. 80049b0: bd70 pop {r4, r5, r6, pc}
  1339. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1340. 80049b2: f7ff fc79 bl 80042a8 <HAL_GetTick>
  1341. 80049b6: 1b80 subs r0, r0, r6
  1342. 80049b8: 4285 cmp r5, r0
  1343. 80049ba: d2d7 bcs.n 800496c <I2C_WaitOnRXNEFlagUntilTimeout+0x8>
  1344. 80049bc: e7ed b.n 800499a <I2C_WaitOnRXNEFlagUntilTimeout+0x36>
  1345. 080049be <I2C_WaitOnBTFFlagUntilTimeout>:
  1346. {
  1347. 80049be: b570 push {r4, r5, r6, lr}
  1348. 80049c0: 4604 mov r4, r0
  1349. 80049c2: 460d mov r5, r1
  1350. 80049c4: 4616 mov r6, r2
  1351. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  1352. 80049c6: 6823 ldr r3, [r4, #0]
  1353. 80049c8: 695b ldr r3, [r3, #20]
  1354. 80049ca: 075b lsls r3, r3, #29
  1355. 80049cc: d501 bpl.n 80049d2 <I2C_WaitOnBTFFlagUntilTimeout+0x14>
  1356. return HAL_OK;
  1357. 80049ce: 2000 movs r0, #0
  1358. 80049d0: bd70 pop {r4, r5, r6, pc}
  1359. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  1360. 80049d2: 4620 mov r0, r4
  1361. 80049d4: f7ff fe51 bl 800467a <I2C_IsAcknowledgeFailed>
  1362. 80049d8: b9a8 cbnz r0, 8004a06 <I2C_WaitOnBTFFlagUntilTimeout+0x48>
  1363. if(Timeout != HAL_MAX_DELAY)
  1364. 80049da: 1c6a adds r2, r5, #1
  1365. 80049dc: d0f3 beq.n 80049c6 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
  1366. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1367. 80049de: b965 cbnz r5, 80049fa <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
  1368. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1369. 80049e0: 6c23 ldr r3, [r4, #64] ; 0x40
  1370. hi2c->State= HAL_I2C_STATE_READY;
  1371. 80049e2: 2220 movs r2, #32
  1372. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1373. 80049e4: f043 0320 orr.w r3, r3, #32
  1374. 80049e8: 6423 str r3, [r4, #64] ; 0x40
  1375. hi2c->PreviousState = I2C_STATE_NONE;
  1376. 80049ea: 2300 movs r3, #0
  1377. __HAL_UNLOCK(hi2c);
  1378. 80049ec: 2003 movs r0, #3
  1379. hi2c->PreviousState = I2C_STATE_NONE;
  1380. 80049ee: 6323 str r3, [r4, #48] ; 0x30
  1381. __HAL_UNLOCK(hi2c);
  1382. 80049f0: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1383. hi2c->State= HAL_I2C_STATE_READY;
  1384. 80049f4: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1385. 80049f8: bd70 pop {r4, r5, r6, pc}
  1386. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1387. 80049fa: f7ff fc55 bl 80042a8 <HAL_GetTick>
  1388. 80049fe: 1b80 subs r0, r0, r6
  1389. 8004a00: 4285 cmp r5, r0
  1390. 8004a02: d2e0 bcs.n 80049c6 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
  1391. 8004a04: e7ec b.n 80049e0 <I2C_WaitOnBTFFlagUntilTimeout+0x22>
  1392. return HAL_ERROR;
  1393. 8004a06: 2001 movs r0, #1
  1394. }
  1395. 8004a08: bd70 pop {r4, r5, r6, pc}
  1396. ...
  1397. 08004a0c <HAL_I2C_Init>:
  1398. {
  1399. 8004a0c: b538 push {r3, r4, r5, lr}
  1400. if(hi2c == NULL)
  1401. 8004a0e: 4604 mov r4, r0
  1402. 8004a10: b908 cbnz r0, 8004a16 <HAL_I2C_Init+0xa>
  1403. return HAL_ERROR;
  1404. 8004a12: 2001 movs r0, #1
  1405. 8004a14: bd38 pop {r3, r4, r5, pc}
  1406. if(hi2c->State == HAL_I2C_STATE_RESET)
  1407. 8004a16: f890 303d ldrb.w r3, [r0, #61] ; 0x3d
  1408. 8004a1a: f003 02ff and.w r2, r3, #255 ; 0xff
  1409. 8004a1e: b91b cbnz r3, 8004a28 <HAL_I2C_Init+0x1c>
  1410. hi2c->Lock = HAL_UNLOCKED;
  1411. 8004a20: f880 203c strb.w r2, [r0, #60] ; 0x3c
  1412. HAL_I2C_MspInit(hi2c);
  1413. 8004a24: f002 fd10 bl 8007448 <HAL_I2C_MspInit>
  1414. hi2c->State = HAL_I2C_STATE_BUSY;
  1415. 8004a28: 2324 movs r3, #36 ; 0x24
  1416. __HAL_I2C_DISABLE(hi2c);
  1417. 8004a2a: 6822 ldr r2, [r4, #0]
  1418. hi2c->State = HAL_I2C_STATE_BUSY;
  1419. 8004a2c: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1420. __HAL_I2C_DISABLE(hi2c);
  1421. 8004a30: 6813 ldr r3, [r2, #0]
  1422. 8004a32: f023 0301 bic.w r3, r3, #1
  1423. 8004a36: 6013 str r3, [r2, #0]
  1424. pclk1 = HAL_RCC_GetPCLK1Freq();
  1425. 8004a38: f000 fc98 bl 800536c <HAL_RCC_GetPCLK1Freq>
  1426. if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
  1427. 8004a3c: 6863 ldr r3, [r4, #4]
  1428. 8004a3e: 4a2f ldr r2, [pc, #188] ; (8004afc <HAL_I2C_Init+0xf0>)
  1429. 8004a40: 4293 cmp r3, r2
  1430. 8004a42: d830 bhi.n 8004aa6 <HAL_I2C_Init+0x9a>
  1431. 8004a44: 4a2e ldr r2, [pc, #184] ; (8004b00 <HAL_I2C_Init+0xf4>)
  1432. 8004a46: 4290 cmp r0, r2
  1433. 8004a48: d9e3 bls.n 8004a12 <HAL_I2C_Init+0x6>
  1434. freqrange = I2C_FREQRANGE(pclk1);
  1435. 8004a4a: 4a2e ldr r2, [pc, #184] ; (8004b04 <HAL_I2C_Init+0xf8>)
  1436. hi2c->Instance->CR2 = freqrange;
  1437. 8004a4c: 6821 ldr r1, [r4, #0]
  1438. freqrange = I2C_FREQRANGE(pclk1);
  1439. 8004a4e: fbb0 f2f2 udiv r2, r0, r2
  1440. hi2c->Instance->CR2 = freqrange;
  1441. 8004a52: 604a str r2, [r1, #4]
  1442. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1443. 8004a54: 3201 adds r2, #1
  1444. 8004a56: 620a str r2, [r1, #32]
  1445. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  1446. 8004a58: 4a28 ldr r2, [pc, #160] ; (8004afc <HAL_I2C_Init+0xf0>)
  1447. 8004a5a: 3801 subs r0, #1
  1448. 8004a5c: 4293 cmp r3, r2
  1449. 8004a5e: d832 bhi.n 8004ac6 <HAL_I2C_Init+0xba>
  1450. 8004a60: 005b lsls r3, r3, #1
  1451. 8004a62: fbb0 f0f3 udiv r0, r0, r3
  1452. 8004a66: 1c43 adds r3, r0, #1
  1453. 8004a68: f3c3 030b ubfx r3, r3, #0, #12
  1454. 8004a6c: 2b04 cmp r3, #4
  1455. 8004a6e: bf38 it cc
  1456. 8004a70: 2304 movcc r3, #4
  1457. 8004a72: 61cb str r3, [r1, #28]
  1458. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  1459. 8004a74: 6a22 ldr r2, [r4, #32]
  1460. 8004a76: 69e3 ldr r3, [r4, #28]
  1461. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1462. 8004a78: 2000 movs r0, #0
  1463. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  1464. 8004a7a: 4313 orrs r3, r2
  1465. 8004a7c: 600b str r3, [r1, #0]
  1466. hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
  1467. 8004a7e: 68e2 ldr r2, [r4, #12]
  1468. 8004a80: 6923 ldr r3, [r4, #16]
  1469. 8004a82: 4313 orrs r3, r2
  1470. 8004a84: 608b str r3, [r1, #8]
  1471. hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
  1472. 8004a86: 69a2 ldr r2, [r4, #24]
  1473. 8004a88: 6963 ldr r3, [r4, #20]
  1474. 8004a8a: 4313 orrs r3, r2
  1475. 8004a8c: 60cb str r3, [r1, #12]
  1476. __HAL_I2C_ENABLE(hi2c);
  1477. 8004a8e: 680b ldr r3, [r1, #0]
  1478. 8004a90: f043 0301 orr.w r3, r3, #1
  1479. 8004a94: 600b str r3, [r1, #0]
  1480. hi2c->State = HAL_I2C_STATE_READY;
  1481. 8004a96: 2320 movs r3, #32
  1482. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1483. 8004a98: 6420 str r0, [r4, #64] ; 0x40
  1484. hi2c->State = HAL_I2C_STATE_READY;
  1485. 8004a9a: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1486. hi2c->PreviousState = I2C_STATE_NONE;
  1487. 8004a9e: 6320 str r0, [r4, #48] ; 0x30
  1488. hi2c->Mode = HAL_I2C_MODE_NONE;
  1489. 8004aa0: f884 003e strb.w r0, [r4, #62] ; 0x3e
  1490. return HAL_OK;
  1491. 8004aa4: bd38 pop {r3, r4, r5, pc}
  1492. if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
  1493. 8004aa6: 4a18 ldr r2, [pc, #96] ; (8004b08 <HAL_I2C_Init+0xfc>)
  1494. 8004aa8: 4290 cmp r0, r2
  1495. 8004aaa: d9b2 bls.n 8004a12 <HAL_I2C_Init+0x6>
  1496. freqrange = I2C_FREQRANGE(pclk1);
  1497. 8004aac: 4d15 ldr r5, [pc, #84] ; (8004b04 <HAL_I2C_Init+0xf8>)
  1498. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1499. 8004aae: f44f 7296 mov.w r2, #300 ; 0x12c
  1500. freqrange = I2C_FREQRANGE(pclk1);
  1501. 8004ab2: fbb0 f5f5 udiv r5, r0, r5
  1502. hi2c->Instance->CR2 = freqrange;
  1503. 8004ab6: 6821 ldr r1, [r4, #0]
  1504. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1505. 8004ab8: 436a muls r2, r5
  1506. hi2c->Instance->CR2 = freqrange;
  1507. 8004aba: 604d str r5, [r1, #4]
  1508. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1509. 8004abc: f44f 757a mov.w r5, #1000 ; 0x3e8
  1510. 8004ac0: fbb2 f2f5 udiv r2, r2, r5
  1511. 8004ac4: e7c6 b.n 8004a54 <HAL_I2C_Init+0x48>
  1512. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  1513. 8004ac6: 68a2 ldr r2, [r4, #8]
  1514. 8004ac8: b952 cbnz r2, 8004ae0 <HAL_I2C_Init+0xd4>
  1515. 8004aca: eb03 0343 add.w r3, r3, r3, lsl #1
  1516. 8004ace: fbb0 f0f3 udiv r0, r0, r3
  1517. 8004ad2: 1c43 adds r3, r0, #1
  1518. 8004ad4: f3c3 030b ubfx r3, r3, #0, #12
  1519. 8004ad8: b16b cbz r3, 8004af6 <HAL_I2C_Init+0xea>
  1520. 8004ada: f443 4300 orr.w r3, r3, #32768 ; 0x8000
  1521. 8004ade: e7c8 b.n 8004a72 <HAL_I2C_Init+0x66>
  1522. 8004ae0: 2219 movs r2, #25
  1523. 8004ae2: 4353 muls r3, r2
  1524. 8004ae4: fbb0 f0f3 udiv r0, r0, r3
  1525. 8004ae8: 1c43 adds r3, r0, #1
  1526. 8004aea: f3c3 030b ubfx r3, r3, #0, #12
  1527. 8004aee: b113 cbz r3, 8004af6 <HAL_I2C_Init+0xea>
  1528. 8004af0: f443 4340 orr.w r3, r3, #49152 ; 0xc000
  1529. 8004af4: e7bd b.n 8004a72 <HAL_I2C_Init+0x66>
  1530. 8004af6: 2301 movs r3, #1
  1531. 8004af8: e7bb b.n 8004a72 <HAL_I2C_Init+0x66>
  1532. 8004afa: bf00 nop
  1533. 8004afc: 000186a0 .word 0x000186a0
  1534. 8004b00: 001e847f .word 0x001e847f
  1535. 8004b04: 000f4240 .word 0x000f4240
  1536. 8004b08: 003d08ff .word 0x003d08ff
  1537. 08004b0c <HAL_I2C_Mem_Write>:
  1538. {
  1539. 8004b0c: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
  1540. 8004b10: 4604 mov r4, r0
  1541. 8004b12: 469a mov sl, r3
  1542. 8004b14: 4688 mov r8, r1
  1543. 8004b16: 4691 mov r9, r2
  1544. 8004b18: 9e0c ldr r6, [sp, #48] ; 0x30
  1545. tickstart = HAL_GetTick();
  1546. 8004b1a: f7ff fbc5 bl 80042a8 <HAL_GetTick>
  1547. if(hi2c->State == HAL_I2C_STATE_READY)
  1548. 8004b1e: f894 303d ldrb.w r3, [r4, #61] ; 0x3d
  1549. tickstart = HAL_GetTick();
  1550. 8004b22: 4605 mov r5, r0
  1551. if(hi2c->State == HAL_I2C_STATE_READY)
  1552. 8004b24: 2b20 cmp r3, #32
  1553. 8004b26: d003 beq.n 8004b30 <HAL_I2C_Mem_Write+0x24>
  1554. return HAL_BUSY;
  1555. 8004b28: 2002 movs r0, #2
  1556. }
  1557. 8004b2a: b002 add sp, #8
  1558. 8004b2c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  1559. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1560. 8004b30: 9000 str r0, [sp, #0]
  1561. 8004b32: 2319 movs r3, #25
  1562. 8004b34: 2201 movs r2, #1
  1563. 8004b36: 493e ldr r1, [pc, #248] ; (8004c30 <HAL_I2C_Mem_Write+0x124>)
  1564. 8004b38: 4620 mov r0, r4
  1565. 8004b3a: f7ff fdf3 bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  1566. 8004b3e: 2800 cmp r0, #0
  1567. 8004b40: d1f2 bne.n 8004b28 <HAL_I2C_Mem_Write+0x1c>
  1568. __HAL_LOCK(hi2c);
  1569. 8004b42: f894 303c ldrb.w r3, [r4, #60] ; 0x3c
  1570. 8004b46: 2b01 cmp r3, #1
  1571. 8004b48: d0ee beq.n 8004b28 <HAL_I2C_Mem_Write+0x1c>
  1572. 8004b4a: 2301 movs r3, #1
  1573. 8004b4c: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1574. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1575. 8004b50: 6823 ldr r3, [r4, #0]
  1576. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1577. 8004b52: 2700 movs r7, #0
  1578. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1579. 8004b54: 681a ldr r2, [r3, #0]
  1580. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1581. 8004b56: 4641 mov r1, r8
  1582. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1583. 8004b58: 07d2 lsls r2, r2, #31
  1584. __HAL_I2C_ENABLE(hi2c);
  1585. 8004b5a: bf58 it pl
  1586. 8004b5c: 681a ldrpl r2, [r3, #0]
  1587. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1588. 8004b5e: 4620 mov r0, r4
  1589. __HAL_I2C_ENABLE(hi2c);
  1590. 8004b60: bf5c itt pl
  1591. 8004b62: f042 0201 orrpl.w r2, r2, #1
  1592. 8004b66: 601a strpl r2, [r3, #0]
  1593. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1594. 8004b68: 681a ldr r2, [r3, #0]
  1595. 8004b6a: f422 6200 bic.w r2, r2, #2048 ; 0x800
  1596. 8004b6e: 601a str r2, [r3, #0]
  1597. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1598. 8004b70: 2321 movs r3, #33 ; 0x21
  1599. 8004b72: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1600. hi2c->Mode = HAL_I2C_MODE_MEM;
  1601. 8004b76: 2340 movs r3, #64 ; 0x40
  1602. 8004b78: f884 303e strb.w r3, [r4, #62] ; 0x3e
  1603. hi2c->pBuffPtr = pData;
  1604. 8004b7c: 9b0a ldr r3, [sp, #40] ; 0x28
  1605. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1606. 8004b7e: 6427 str r7, [r4, #64] ; 0x40
  1607. hi2c->pBuffPtr = pData;
  1608. 8004b80: 6263 str r3, [r4, #36] ; 0x24
  1609. hi2c->XferCount = Size;
  1610. 8004b82: f8bd 302c ldrh.w r3, [sp, #44] ; 0x2c
  1611. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1612. 8004b86: 9501 str r5, [sp, #4]
  1613. hi2c->XferCount = Size;
  1614. 8004b88: 8563 strh r3, [r4, #42] ; 0x2a
  1615. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1616. 8004b8a: 4b2a ldr r3, [pc, #168] ; (8004c34 <HAL_I2C_Mem_Write+0x128>)
  1617. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1618. 8004b8c: 9600 str r6, [sp, #0]
  1619. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1620. 8004b8e: 62e3 str r3, [r4, #44] ; 0x2c
  1621. hi2c->XferSize = hi2c->XferCount;
  1622. 8004b90: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1623. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1624. 8004b92: 464a mov r2, r9
  1625. hi2c->XferSize = hi2c->XferCount;
  1626. 8004b94: 8523 strh r3, [r4, #40] ; 0x28
  1627. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1628. 8004b96: 4653 mov r3, sl
  1629. 8004b98: f7ff fe18 bl 80047cc <I2C_RequestMemoryWrite>
  1630. 8004b9c: 2800 cmp r0, #0
  1631. 8004b9e: d02a beq.n 8004bf6 <HAL_I2C_Mem_Write+0xea>
  1632. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1633. 8004ba0: 6c23 ldr r3, [r4, #64] ; 0x40
  1634. __HAL_UNLOCK(hi2c);
  1635. 8004ba2: f884 703c strb.w r7, [r4, #60] ; 0x3c
  1636. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1637. 8004ba6: 2b04 cmp r3, #4
  1638. 8004ba8: d107 bne.n 8004bba <HAL_I2C_Mem_Write+0xae>
  1639. return HAL_ERROR;
  1640. 8004baa: 2001 movs r0, #1
  1641. 8004bac: e7bd b.n 8004b2a <HAL_I2C_Mem_Write+0x1e>
  1642. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1643. 8004bae: f7ff fde7 bl 8004780 <I2C_WaitOnTXEFlagUntilTimeout>
  1644. 8004bb2: b120 cbz r0, 8004bbe <HAL_I2C_Mem_Write+0xb2>
  1645. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1646. 8004bb4: 6c23 ldr r3, [r4, #64] ; 0x40
  1647. 8004bb6: 2b04 cmp r3, #4
  1648. 8004bb8: d034 beq.n 8004c24 <HAL_I2C_Mem_Write+0x118>
  1649. return HAL_TIMEOUT;
  1650. 8004bba: 2003 movs r0, #3
  1651. 8004bbc: e7b5 b.n 8004b2a <HAL_I2C_Mem_Write+0x1e>
  1652. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1653. 8004bbe: 6a61 ldr r1, [r4, #36] ; 0x24
  1654. 8004bc0: 6827 ldr r7, [r4, #0]
  1655. 8004bc2: 1c4b adds r3, r1, #1
  1656. 8004bc4: 6263 str r3, [r4, #36] ; 0x24
  1657. 8004bc6: 780b ldrb r3, [r1, #0]
  1658. hi2c->XferSize--;
  1659. 8004bc8: 8d22 ldrh r2, [r4, #40] ; 0x28
  1660. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1661. 8004bca: 613b str r3, [r7, #16]
  1662. hi2c->XferCount--;
  1663. 8004bcc: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1664. hi2c->XferSize--;
  1665. 8004bce: 1e50 subs r0, r2, #1
  1666. hi2c->XferCount--;
  1667. 8004bd0: 3b01 subs r3, #1
  1668. 8004bd2: b29b uxth r3, r3
  1669. 8004bd4: 8563 strh r3, [r4, #42] ; 0x2a
  1670. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1671. 8004bd6: 697b ldr r3, [r7, #20]
  1672. hi2c->XferSize--;
  1673. 8004bd8: b280 uxth r0, r0
  1674. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1675. 8004bda: 075b lsls r3, r3, #29
  1676. hi2c->XferSize--;
  1677. 8004bdc: 8520 strh r0, [r4, #40] ; 0x28
  1678. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1679. 8004bde: d50a bpl.n 8004bf6 <HAL_I2C_Mem_Write+0xea>
  1680. 8004be0: b148 cbz r0, 8004bf6 <HAL_I2C_Mem_Write+0xea>
  1681. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1682. 8004be2: 1c8b adds r3, r1, #2
  1683. 8004be4: 6263 str r3, [r4, #36] ; 0x24
  1684. 8004be6: 784b ldrb r3, [r1, #1]
  1685. hi2c->XferSize--;
  1686. 8004be8: 3a02 subs r2, #2
  1687. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1688. 8004bea: 613b str r3, [r7, #16]
  1689. hi2c->XferCount--;
  1690. 8004bec: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1691. hi2c->XferSize--;
  1692. 8004bee: 8522 strh r2, [r4, #40] ; 0x28
  1693. hi2c->XferCount--;
  1694. 8004bf0: 3b01 subs r3, #1
  1695. 8004bf2: b29b uxth r3, r3
  1696. 8004bf4: 8563 strh r3, [r4, #42] ; 0x2a
  1697. while(hi2c->XferSize > 0U)
  1698. 8004bf6: 8d23 ldrh r3, [r4, #40] ; 0x28
  1699. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1700. 8004bf8: 462a mov r2, r5
  1701. 8004bfa: 4631 mov r1, r6
  1702. 8004bfc: 4620 mov r0, r4
  1703. while(hi2c->XferSize > 0U)
  1704. 8004bfe: 2b00 cmp r3, #0
  1705. 8004c00: d1d5 bne.n 8004bae <HAL_I2C_Mem_Write+0xa2>
  1706. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1707. 8004c02: f7ff fedc bl 80049be <I2C_WaitOnBTFFlagUntilTimeout>
  1708. 8004c06: 2800 cmp r0, #0
  1709. 8004c08: d1d4 bne.n 8004bb4 <HAL_I2C_Mem_Write+0xa8>
  1710. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1711. 8004c0a: 6822 ldr r2, [r4, #0]
  1712. 8004c0c: 6813 ldr r3, [r2, #0]
  1713. 8004c0e: f443 7300 orr.w r3, r3, #512 ; 0x200
  1714. 8004c12: 6013 str r3, [r2, #0]
  1715. hi2c->State = HAL_I2C_STATE_READY;
  1716. 8004c14: 2320 movs r3, #32
  1717. __HAL_UNLOCK(hi2c);
  1718. 8004c16: f884 003c strb.w r0, [r4, #60] ; 0x3c
  1719. hi2c->State = HAL_I2C_STATE_READY;
  1720. 8004c1a: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1721. hi2c->Mode = HAL_I2C_MODE_NONE;
  1722. 8004c1e: f884 003e strb.w r0, [r4, #62] ; 0x3e
  1723. return HAL_OK;
  1724. 8004c22: e782 b.n 8004b2a <HAL_I2C_Mem_Write+0x1e>
  1725. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1726. 8004c24: 6822 ldr r2, [r4, #0]
  1727. 8004c26: 6813 ldr r3, [r2, #0]
  1728. 8004c28: f443 7300 orr.w r3, r3, #512 ; 0x200
  1729. 8004c2c: 6013 str r3, [r2, #0]
  1730. 8004c2e: e7bc b.n 8004baa <HAL_I2C_Mem_Write+0x9e>
  1731. 8004c30: 00100002 .word 0x00100002
  1732. 8004c34: ffff0000 .word 0xffff0000
  1733. 08004c38 <HAL_I2C_Mem_Read>:
  1734. {
  1735. 8004c38: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  1736. 8004c3c: 4604 mov r4, r0
  1737. 8004c3e: b086 sub sp, #24
  1738. 8004c40: 469a mov sl, r3
  1739. 8004c42: 460d mov r5, r1
  1740. 8004c44: 4691 mov r9, r2
  1741. 8004c46: 9f10 ldr r7, [sp, #64] ; 0x40
  1742. tickstart = HAL_GetTick();
  1743. 8004c48: f7ff fb2e bl 80042a8 <HAL_GetTick>
  1744. if(hi2c->State == HAL_I2C_STATE_READY)
  1745. 8004c4c: f894 303d ldrb.w r3, [r4, #61] ; 0x3d
  1746. tickstart = HAL_GetTick();
  1747. 8004c50: 4606 mov r6, r0
  1748. if(hi2c->State == HAL_I2C_STATE_READY)
  1749. 8004c52: 2b20 cmp r3, #32
  1750. 8004c54: d004 beq.n 8004c60 <HAL_I2C_Mem_Read+0x28>
  1751. return HAL_BUSY;
  1752. 8004c56: 2502 movs r5, #2
  1753. }
  1754. 8004c58: 4628 mov r0, r5
  1755. 8004c5a: b006 add sp, #24
  1756. 8004c5c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  1757. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1758. 8004c60: 9000 str r0, [sp, #0]
  1759. 8004c62: 2319 movs r3, #25
  1760. 8004c64: 2201 movs r2, #1
  1761. 8004c66: 4981 ldr r1, [pc, #516] ; (8004e6c <HAL_I2C_Mem_Read+0x234>)
  1762. 8004c68: 4620 mov r0, r4
  1763. 8004c6a: f7ff fd5b bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  1764. 8004c6e: 2800 cmp r0, #0
  1765. 8004c70: d1f1 bne.n 8004c56 <HAL_I2C_Mem_Read+0x1e>
  1766. __HAL_LOCK(hi2c);
  1767. 8004c72: f894 303c ldrb.w r3, [r4, #60] ; 0x3c
  1768. 8004c76: 2b01 cmp r3, #1
  1769. 8004c78: d0ed beq.n 8004c56 <HAL_I2C_Mem_Read+0x1e>
  1770. 8004c7a: 2301 movs r3, #1
  1771. 8004c7c: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1772. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1773. 8004c80: 6823 ldr r3, [r4, #0]
  1774. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1775. 8004c82: f04f 0800 mov.w r8, #0
  1776. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1777. 8004c86: 681a ldr r2, [r3, #0]
  1778. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1779. 8004c88: 4629 mov r1, r5
  1780. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1781. 8004c8a: 07d2 lsls r2, r2, #31
  1782. __HAL_I2C_ENABLE(hi2c);
  1783. 8004c8c: bf58 it pl
  1784. 8004c8e: 681a ldrpl r2, [r3, #0]
  1785. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1786. 8004c90: 4620 mov r0, r4
  1787. __HAL_I2C_ENABLE(hi2c);
  1788. 8004c92: bf5c itt pl
  1789. 8004c94: f042 0201 orrpl.w r2, r2, #1
  1790. 8004c98: 601a strpl r2, [r3, #0]
  1791. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1792. 8004c9a: 681a ldr r2, [r3, #0]
  1793. 8004c9c: f422 6200 bic.w r2, r2, #2048 ; 0x800
  1794. 8004ca0: 601a str r2, [r3, #0]
  1795. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1796. 8004ca2: 2322 movs r3, #34 ; 0x22
  1797. 8004ca4: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1798. hi2c->Mode = HAL_I2C_MODE_MEM;
  1799. 8004ca8: 2340 movs r3, #64 ; 0x40
  1800. 8004caa: f884 303e strb.w r3, [r4, #62] ; 0x3e
  1801. hi2c->pBuffPtr = pData;
  1802. 8004cae: 9b0e ldr r3, [sp, #56] ; 0x38
  1803. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1804. 8004cb0: f8c4 8040 str.w r8, [r4, #64] ; 0x40
  1805. hi2c->pBuffPtr = pData;
  1806. 8004cb4: 6263 str r3, [r4, #36] ; 0x24
  1807. hi2c->XferCount = Size;
  1808. 8004cb6: f8bd 303c ldrh.w r3, [sp, #60] ; 0x3c
  1809. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1810. 8004cba: 9601 str r6, [sp, #4]
  1811. hi2c->XferCount = Size;
  1812. 8004cbc: 8563 strh r3, [r4, #42] ; 0x2a
  1813. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1814. 8004cbe: 4b6c ldr r3, [pc, #432] ; (8004e70 <HAL_I2C_Mem_Read+0x238>)
  1815. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1816. 8004cc0: 9700 str r7, [sp, #0]
  1817. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1818. 8004cc2: 62e3 str r3, [r4, #44] ; 0x2c
  1819. hi2c->XferSize = hi2c->XferCount;
  1820. 8004cc4: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1821. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1822. 8004cc6: 464a mov r2, r9
  1823. hi2c->XferSize = hi2c->XferCount;
  1824. 8004cc8: 8523 strh r3, [r4, #40] ; 0x28
  1825. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1826. 8004cca: 4653 mov r3, sl
  1827. 8004ccc: f7ff fdd0 bl 8004870 <I2C_RequestMemoryRead>
  1828. 8004cd0: 4605 mov r5, r0
  1829. 8004cd2: b130 cbz r0, 8004ce2 <HAL_I2C_Mem_Read+0xaa>
  1830. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1831. 8004cd4: 6c23 ldr r3, [r4, #64] ; 0x40
  1832. __HAL_UNLOCK(hi2c);
  1833. 8004cd6: f884 803c strb.w r8, [r4, #60] ; 0x3c
  1834. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1835. 8004cda: 2b04 cmp r3, #4
  1836. 8004cdc: d13d bne.n 8004d5a <HAL_I2C_Mem_Read+0x122>
  1837. return HAL_ERROR;
  1838. 8004cde: 2501 movs r5, #1
  1839. 8004ce0: e7ba b.n 8004c58 <HAL_I2C_Mem_Read+0x20>
  1840. if(hi2c->XferSize == 0U)
  1841. 8004ce2: 8d22 ldrh r2, [r4, #40] ; 0x28
  1842. 8004ce4: 6823 ldr r3, [r4, #0]
  1843. 8004ce6: b992 cbnz r2, 8004d0e <HAL_I2C_Mem_Read+0xd6>
  1844. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1845. 8004ce8: 9002 str r0, [sp, #8]
  1846. 8004cea: 695a ldr r2, [r3, #20]
  1847. 8004cec: 9202 str r2, [sp, #8]
  1848. 8004cee: 699a ldr r2, [r3, #24]
  1849. 8004cf0: 9202 str r2, [sp, #8]
  1850. 8004cf2: 9a02 ldr r2, [sp, #8]
  1851. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1852. 8004cf4: 681a ldr r2, [r3, #0]
  1853. 8004cf6: f442 7200 orr.w r2, r2, #512 ; 0x200
  1854. 8004cfa: 601a str r2, [r3, #0]
  1855. hi2c->State = HAL_I2C_STATE_READY;
  1856. 8004cfc: 2320 movs r3, #32
  1857. 8004cfe: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1858. hi2c->Mode = HAL_I2C_MODE_NONE;
  1859. 8004d02: 2300 movs r3, #0
  1860. 8004d04: f884 303e strb.w r3, [r4, #62] ; 0x3e
  1861. __HAL_UNLOCK(hi2c);
  1862. 8004d08: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1863. return HAL_OK;
  1864. 8004d0c: e7a4 b.n 8004c58 <HAL_I2C_Mem_Read+0x20>
  1865. else if(hi2c->XferSize == 1U)
  1866. 8004d0e: 2a01 cmp r2, #1
  1867. 8004d10: d125 bne.n 8004d5e <HAL_I2C_Mem_Read+0x126>
  1868. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1869. 8004d12: 681a ldr r2, [r3, #0]
  1870. 8004d14: f422 6280 bic.w r2, r2, #1024 ; 0x400
  1871. 8004d18: 601a str r2, [r3, #0]
  1872. \details Disables IRQ interrupts by setting the I-bit in the CPSR.
  1873. Can only be executed in Privileged modes.
  1874. */
  1875. __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
  1876. {
  1877. __ASM volatile ("cpsid i" : : : "memory");
  1878. 8004d1a: b672 cpsid i
  1879. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1880. 8004d1c: 6823 ldr r3, [r4, #0]
  1881. 8004d1e: 9003 str r0, [sp, #12]
  1882. 8004d20: 695a ldr r2, [r3, #20]
  1883. 8004d22: 9203 str r2, [sp, #12]
  1884. 8004d24: 699a ldr r2, [r3, #24]
  1885. 8004d26: 9203 str r2, [sp, #12]
  1886. 8004d28: 9a03 ldr r2, [sp, #12]
  1887. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1888. 8004d2a: 681a ldr r2, [r3, #0]
  1889. 8004d2c: f442 7200 orr.w r2, r2, #512 ; 0x200
  1890. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1891. 8004d30: 601a str r2, [r3, #0]
  1892. __ASM volatile ("cpsie i" : : : "memory");
  1893. 8004d32: b662 cpsie i
  1894. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1895. 8004d34: f8df 813c ldr.w r8, [pc, #316] ; 8004e74 <HAL_I2C_Mem_Read+0x23c>
  1896. while(hi2c->XferSize > 0U)
  1897. 8004d38: 8d23 ldrh r3, [r4, #40] ; 0x28
  1898. 8004d3a: 2b00 cmp r3, #0
  1899. 8004d3c: d0de beq.n 8004cfc <HAL_I2C_Mem_Read+0xc4>
  1900. if(hi2c->XferSize <= 3U)
  1901. 8004d3e: 2b03 cmp r3, #3
  1902. 8004d40: d877 bhi.n 8004e32 <HAL_I2C_Mem_Read+0x1fa>
  1903. if(hi2c->XferSize== 1U)
  1904. 8004d42: 2b01 cmp r3, #1
  1905. 8004d44: d127 bne.n 8004d96 <HAL_I2C_Mem_Read+0x15e>
  1906. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1907. 8004d46: 4632 mov r2, r6
  1908. 8004d48: 4639 mov r1, r7
  1909. 8004d4a: 4620 mov r0, r4
  1910. 8004d4c: f7ff fe0a bl 8004964 <I2C_WaitOnRXNEFlagUntilTimeout>
  1911. 8004d50: 2800 cmp r0, #0
  1912. 8004d52: d03f beq.n 8004dd4 <HAL_I2C_Mem_Read+0x19c>
  1913. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  1914. 8004d54: 6c23 ldr r3, [r4, #64] ; 0x40
  1915. 8004d56: 2b20 cmp r3, #32
  1916. 8004d58: d1c1 bne.n 8004cde <HAL_I2C_Mem_Read+0xa6>
  1917. return HAL_TIMEOUT;
  1918. 8004d5a: 2503 movs r5, #3
  1919. 8004d5c: e77c b.n 8004c58 <HAL_I2C_Mem_Read+0x20>
  1920. else if(hi2c->XferSize == 2U)
  1921. 8004d5e: 2a02 cmp r2, #2
  1922. hi2c->Instance->CR1 |= I2C_CR1_POS;
  1923. 8004d60: 681a ldr r2, [r3, #0]
  1924. else if(hi2c->XferSize == 2U)
  1925. 8004d62: d10e bne.n 8004d82 <HAL_I2C_Mem_Read+0x14a>
  1926. hi2c->Instance->CR1 |= I2C_CR1_POS;
  1927. 8004d64: f442 6200 orr.w r2, r2, #2048 ; 0x800
  1928. 8004d68: 601a str r2, [r3, #0]
  1929. __ASM volatile ("cpsid i" : : : "memory");
  1930. 8004d6a: b672 cpsid i
  1931. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1932. 8004d6c: 6823 ldr r3, [r4, #0]
  1933. 8004d6e: 9004 str r0, [sp, #16]
  1934. 8004d70: 695a ldr r2, [r3, #20]
  1935. 8004d72: 9204 str r2, [sp, #16]
  1936. 8004d74: 699a ldr r2, [r3, #24]
  1937. 8004d76: 9204 str r2, [sp, #16]
  1938. 8004d78: 9a04 ldr r2, [sp, #16]
  1939. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1940. 8004d7a: 681a ldr r2, [r3, #0]
  1941. 8004d7c: f422 6280 bic.w r2, r2, #1024 ; 0x400
  1942. 8004d80: e7d6 b.n 8004d30 <HAL_I2C_Mem_Read+0xf8>
  1943. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1944. 8004d82: f442 6280 orr.w r2, r2, #1024 ; 0x400
  1945. 8004d86: 601a str r2, [r3, #0]
  1946. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1947. 8004d88: 9005 str r0, [sp, #20]
  1948. 8004d8a: 695a ldr r2, [r3, #20]
  1949. 8004d8c: 9205 str r2, [sp, #20]
  1950. 8004d8e: 699b ldr r3, [r3, #24]
  1951. 8004d90: 9305 str r3, [sp, #20]
  1952. 8004d92: 9b05 ldr r3, [sp, #20]
  1953. 8004d94: e7ce b.n 8004d34 <HAL_I2C_Mem_Read+0xfc>
  1954. else if(hi2c->XferSize == 2U)
  1955. 8004d96: 2b02 cmp r3, #2
  1956. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1957. 8004d98: 9600 str r6, [sp, #0]
  1958. 8004d9a: 463b mov r3, r7
  1959. 8004d9c: f04f 0200 mov.w r2, #0
  1960. 8004da0: 4641 mov r1, r8
  1961. 8004da2: 4620 mov r0, r4
  1962. else if(hi2c->XferSize == 2U)
  1963. 8004da4: d124 bne.n 8004df0 <HAL_I2C_Mem_Read+0x1b8>
  1964. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1965. 8004da6: f7ff fcbd bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  1966. 8004daa: 2800 cmp r0, #0
  1967. 8004dac: d1d5 bne.n 8004d5a <HAL_I2C_Mem_Read+0x122>
  1968. 8004dae: b672 cpsid i
  1969. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1970. 8004db0: 6823 ldr r3, [r4, #0]
  1971. 8004db2: 681a ldr r2, [r3, #0]
  1972. 8004db4: f442 7200 orr.w r2, r2, #512 ; 0x200
  1973. 8004db8: 601a str r2, [r3, #0]
  1974. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  1975. 8004dba: 6a62 ldr r2, [r4, #36] ; 0x24
  1976. 8004dbc: 691b ldr r3, [r3, #16]
  1977. 8004dbe: 1c51 adds r1, r2, #1
  1978. 8004dc0: 6261 str r1, [r4, #36] ; 0x24
  1979. 8004dc2: 7013 strb r3, [r2, #0]
  1980. hi2c->XferSize--;
  1981. 8004dc4: 8d23 ldrh r3, [r4, #40] ; 0x28
  1982. 8004dc6: 3b01 subs r3, #1
  1983. 8004dc8: 8523 strh r3, [r4, #40] ; 0x28
  1984. hi2c->XferCount--;
  1985. 8004dca: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1986. 8004dcc: 3b01 subs r3, #1
  1987. 8004dce: b29b uxth r3, r3
  1988. 8004dd0: 8563 strh r3, [r4, #42] ; 0x2a
  1989. __ASM volatile ("cpsie i" : : : "memory");
  1990. 8004dd2: b662 cpsie i
  1991. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  1992. 8004dd4: 6a63 ldr r3, [r4, #36] ; 0x24
  1993. 8004dd6: 1c5a adds r2, r3, #1
  1994. 8004dd8: 6262 str r2, [r4, #36] ; 0x24
  1995. 8004dda: 6822 ldr r2, [r4, #0]
  1996. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  1997. 8004ddc: 6912 ldr r2, [r2, #16]
  1998. 8004dde: 701a strb r2, [r3, #0]
  1999. hi2c->XferSize--;
  2000. 8004de0: 8d23 ldrh r3, [r4, #40] ; 0x28
  2001. 8004de2: 3b01 subs r3, #1
  2002. 8004de4: 8523 strh r3, [r4, #40] ; 0x28
  2003. hi2c->XferCount--;
  2004. 8004de6: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2005. 8004de8: 3b01 subs r3, #1
  2006. 8004dea: b29b uxth r3, r3
  2007. 8004dec: 8563 strh r3, [r4, #42] ; 0x2a
  2008. 8004dee: e7a3 b.n 8004d38 <HAL_I2C_Mem_Read+0x100>
  2009. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2010. 8004df0: f7ff fc98 bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  2011. 8004df4: 4602 mov r2, r0
  2012. 8004df6: 2800 cmp r0, #0
  2013. 8004df8: d1af bne.n 8004d5a <HAL_I2C_Mem_Read+0x122>
  2014. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2015. 8004dfa: 6821 ldr r1, [r4, #0]
  2016. 8004dfc: 680b ldr r3, [r1, #0]
  2017. 8004dfe: f423 6380 bic.w r3, r3, #1024 ; 0x400
  2018. 8004e02: 600b str r3, [r1, #0]
  2019. __ASM volatile ("cpsid i" : : : "memory");
  2020. 8004e04: b672 cpsid i
  2021. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2022. 8004e06: 6a63 ldr r3, [r4, #36] ; 0x24
  2023. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2024. 8004e08: 4620 mov r0, r4
  2025. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2026. 8004e0a: 1c59 adds r1, r3, #1
  2027. 8004e0c: 6261 str r1, [r4, #36] ; 0x24
  2028. 8004e0e: 6821 ldr r1, [r4, #0]
  2029. 8004e10: 6909 ldr r1, [r1, #16]
  2030. 8004e12: 7019 strb r1, [r3, #0]
  2031. hi2c->XferSize--;
  2032. 8004e14: 8d23 ldrh r3, [r4, #40] ; 0x28
  2033. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2034. 8004e16: 9600 str r6, [sp, #0]
  2035. hi2c->XferSize--;
  2036. 8004e18: 3b01 subs r3, #1
  2037. 8004e1a: 8523 strh r3, [r4, #40] ; 0x28
  2038. hi2c->XferCount--;
  2039. 8004e1c: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2040. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2041. 8004e1e: 4641 mov r1, r8
  2042. hi2c->XferCount--;
  2043. 8004e20: 3b01 subs r3, #1
  2044. 8004e22: b29b uxth r3, r3
  2045. 8004e24: 8563 strh r3, [r4, #42] ; 0x2a
  2046. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2047. 8004e26: 463b mov r3, r7
  2048. 8004e28: f7ff fc7c bl 8004724 <I2C_WaitOnFlagUntilTimeout>
  2049. 8004e2c: 2800 cmp r0, #0
  2050. 8004e2e: d0bf beq.n 8004db0 <HAL_I2C_Mem_Read+0x178>
  2051. 8004e30: e793 b.n 8004d5a <HAL_I2C_Mem_Read+0x122>
  2052. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2053. 8004e32: 4632 mov r2, r6
  2054. 8004e34: 4639 mov r1, r7
  2055. 8004e36: 4620 mov r0, r4
  2056. 8004e38: f7ff fd94 bl 8004964 <I2C_WaitOnRXNEFlagUntilTimeout>
  2057. 8004e3c: 2800 cmp r0, #0
  2058. 8004e3e: d189 bne.n 8004d54 <HAL_I2C_Mem_Read+0x11c>
  2059. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2060. 8004e40: 6a63 ldr r3, [r4, #36] ; 0x24
  2061. 8004e42: 1c5a adds r2, r3, #1
  2062. 8004e44: 6262 str r2, [r4, #36] ; 0x24
  2063. 8004e46: 6822 ldr r2, [r4, #0]
  2064. 8004e48: 6912 ldr r2, [r2, #16]
  2065. 8004e4a: 701a strb r2, [r3, #0]
  2066. hi2c->XferSize--;
  2067. 8004e4c: 8d23 ldrh r3, [r4, #40] ; 0x28
  2068. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2069. 8004e4e: 6822 ldr r2, [r4, #0]
  2070. hi2c->XferSize--;
  2071. 8004e50: 3b01 subs r3, #1
  2072. 8004e52: 8523 strh r3, [r4, #40] ; 0x28
  2073. hi2c->XferCount--;
  2074. 8004e54: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2075. 8004e56: 3b01 subs r3, #1
  2076. 8004e58: b29b uxth r3, r3
  2077. 8004e5a: 8563 strh r3, [r4, #42] ; 0x2a
  2078. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2079. 8004e5c: 6953 ldr r3, [r2, #20]
  2080. 8004e5e: 075b lsls r3, r3, #29
  2081. 8004e60: f57f af6a bpl.w 8004d38 <HAL_I2C_Mem_Read+0x100>
  2082. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2083. 8004e64: 6a63 ldr r3, [r4, #36] ; 0x24
  2084. 8004e66: 1c59 adds r1, r3, #1
  2085. 8004e68: 6261 str r1, [r4, #36] ; 0x24
  2086. 8004e6a: e7b7 b.n 8004ddc <HAL_I2C_Mem_Read+0x1a4>
  2087. 8004e6c: 00100002 .word 0x00100002
  2088. 8004e70: ffff0000 .word 0xffff0000
  2089. 8004e74: 00010004 .word 0x00010004
  2090. 08004e78 <HAL_RCC_OscConfig>:
  2091. /* Check the parameters */
  2092. assert_param(RCC_OscInitStruct != NULL);
  2093. assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  2094. /*------------------------------- HSE Configuration ------------------------*/
  2095. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  2096. 8004e78: 6803 ldr r3, [r0, #0]
  2097. {
  2098. 8004e7a: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  2099. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  2100. 8004e7e: 07db lsls r3, r3, #31
  2101. {
  2102. 8004e80: 4605 mov r5, r0
  2103. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  2104. 8004e82: d410 bmi.n 8004ea6 <HAL_RCC_OscConfig+0x2e>
  2105. }
  2106. }
  2107. }
  2108. }
  2109. /*----------------------------- HSI Configuration --------------------------*/
  2110. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
  2111. 8004e84: 682b ldr r3, [r5, #0]
  2112. 8004e86: 079f lsls r7, r3, #30
  2113. 8004e88: d45e bmi.n 8004f48 <HAL_RCC_OscConfig+0xd0>
  2114. }
  2115. }
  2116. }
  2117. }
  2118. /*------------------------------ LSI Configuration -------------------------*/
  2119. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
  2120. 8004e8a: 682b ldr r3, [r5, #0]
  2121. 8004e8c: 0719 lsls r1, r3, #28
  2122. 8004e8e: f100 8095 bmi.w 8004fbc <HAL_RCC_OscConfig+0x144>
  2123. }
  2124. }
  2125. }
  2126. }
  2127. /*------------------------------ LSE Configuration -------------------------*/
  2128. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
  2129. 8004e92: 682b ldr r3, [r5, #0]
  2130. 8004e94: 075a lsls r2, r3, #29
  2131. 8004e96: f100 80bf bmi.w 8005018 <HAL_RCC_OscConfig+0x1a0>
  2132. #endif /* RCC_CR_PLL2ON */
  2133. /*-------------------------------- PLL Configuration -----------------------*/
  2134. /* Check the parameters */
  2135. assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  2136. if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
  2137. 8004e9a: 69ea ldr r2, [r5, #28]
  2138. 8004e9c: 2a00 cmp r2, #0
  2139. 8004e9e: f040 812d bne.w 80050fc <HAL_RCC_OscConfig+0x284>
  2140. {
  2141. return HAL_ERROR;
  2142. }
  2143. }
  2144. return HAL_OK;
  2145. 8004ea2: 2000 movs r0, #0
  2146. 8004ea4: e014 b.n 8004ed0 <HAL_RCC_OscConfig+0x58>
  2147. if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
  2148. 8004ea6: 4c90 ldr r4, [pc, #576] ; (80050e8 <HAL_RCC_OscConfig+0x270>)
  2149. 8004ea8: 6863 ldr r3, [r4, #4]
  2150. 8004eaa: f003 030c and.w r3, r3, #12
  2151. 8004eae: 2b04 cmp r3, #4
  2152. 8004eb0: d007 beq.n 8004ec2 <HAL_RCC_OscConfig+0x4a>
  2153. || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
  2154. 8004eb2: 6863 ldr r3, [r4, #4]
  2155. 8004eb4: f003 030c and.w r3, r3, #12
  2156. 8004eb8: 2b08 cmp r3, #8
  2157. 8004eba: d10c bne.n 8004ed6 <HAL_RCC_OscConfig+0x5e>
  2158. 8004ebc: 6863 ldr r3, [r4, #4]
  2159. 8004ebe: 03de lsls r6, r3, #15
  2160. 8004ec0: d509 bpl.n 8004ed6 <HAL_RCC_OscConfig+0x5e>
  2161. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
  2162. 8004ec2: 6823 ldr r3, [r4, #0]
  2163. 8004ec4: 039c lsls r4, r3, #14
  2164. 8004ec6: d5dd bpl.n 8004e84 <HAL_RCC_OscConfig+0xc>
  2165. 8004ec8: 686b ldr r3, [r5, #4]
  2166. 8004eca: 2b00 cmp r3, #0
  2167. 8004ecc: d1da bne.n 8004e84 <HAL_RCC_OscConfig+0xc>
  2168. return HAL_ERROR;
  2169. 8004ece: 2001 movs r0, #1
  2170. }
  2171. 8004ed0: b002 add sp, #8
  2172. 8004ed2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  2173. __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  2174. 8004ed6: 686b ldr r3, [r5, #4]
  2175. 8004ed8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
  2176. 8004edc: d110 bne.n 8004f00 <HAL_RCC_OscConfig+0x88>
  2177. 8004ede: 6823 ldr r3, [r4, #0]
  2178. 8004ee0: f443 3380 orr.w r3, r3, #65536 ; 0x10000
  2179. 8004ee4: 6023 str r3, [r4, #0]
  2180. tickstart = HAL_GetTick();
  2181. 8004ee6: f7ff f9df bl 80042a8 <HAL_GetTick>
  2182. 8004eea: 4606 mov r6, r0
  2183. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  2184. 8004eec: 6823 ldr r3, [r4, #0]
  2185. 8004eee: 0398 lsls r0, r3, #14
  2186. 8004ef0: d4c8 bmi.n 8004e84 <HAL_RCC_OscConfig+0xc>
  2187. if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  2188. 8004ef2: f7ff f9d9 bl 80042a8 <HAL_GetTick>
  2189. 8004ef6: 1b80 subs r0, r0, r6
  2190. 8004ef8: 2864 cmp r0, #100 ; 0x64
  2191. 8004efa: d9f7 bls.n 8004eec <HAL_RCC_OscConfig+0x74>
  2192. return HAL_TIMEOUT;
  2193. 8004efc: 2003 movs r0, #3
  2194. 8004efe: e7e7 b.n 8004ed0 <HAL_RCC_OscConfig+0x58>
  2195. __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  2196. 8004f00: b99b cbnz r3, 8004f2a <HAL_RCC_OscConfig+0xb2>
  2197. 8004f02: 6823 ldr r3, [r4, #0]
  2198. 8004f04: f423 3380 bic.w r3, r3, #65536 ; 0x10000
  2199. 8004f08: 6023 str r3, [r4, #0]
  2200. 8004f0a: 6823 ldr r3, [r4, #0]
  2201. 8004f0c: f423 2380 bic.w r3, r3, #262144 ; 0x40000
  2202. 8004f10: 6023 str r3, [r4, #0]
  2203. tickstart = HAL_GetTick();
  2204. 8004f12: f7ff f9c9 bl 80042a8 <HAL_GetTick>
  2205. 8004f16: 4606 mov r6, r0
  2206. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
  2207. 8004f18: 6823 ldr r3, [r4, #0]
  2208. 8004f1a: 0399 lsls r1, r3, #14
  2209. 8004f1c: d5b2 bpl.n 8004e84 <HAL_RCC_OscConfig+0xc>
  2210. if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  2211. 8004f1e: f7ff f9c3 bl 80042a8 <HAL_GetTick>
  2212. 8004f22: 1b80 subs r0, r0, r6
  2213. 8004f24: 2864 cmp r0, #100 ; 0x64
  2214. 8004f26: d9f7 bls.n 8004f18 <HAL_RCC_OscConfig+0xa0>
  2215. 8004f28: e7e8 b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2216. __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  2217. 8004f2a: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
  2218. 8004f2e: 6823 ldr r3, [r4, #0]
  2219. 8004f30: d103 bne.n 8004f3a <HAL_RCC_OscConfig+0xc2>
  2220. 8004f32: f443 2380 orr.w r3, r3, #262144 ; 0x40000
  2221. 8004f36: 6023 str r3, [r4, #0]
  2222. 8004f38: e7d1 b.n 8004ede <HAL_RCC_OscConfig+0x66>
  2223. 8004f3a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
  2224. 8004f3e: 6023 str r3, [r4, #0]
  2225. 8004f40: 6823 ldr r3, [r4, #0]
  2226. 8004f42: f423 2380 bic.w r3, r3, #262144 ; 0x40000
  2227. 8004f46: e7cd b.n 8004ee4 <HAL_RCC_OscConfig+0x6c>
  2228. if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
  2229. 8004f48: 4c67 ldr r4, [pc, #412] ; (80050e8 <HAL_RCC_OscConfig+0x270>)
  2230. 8004f4a: 6863 ldr r3, [r4, #4]
  2231. 8004f4c: f013 0f0c tst.w r3, #12
  2232. 8004f50: d007 beq.n 8004f62 <HAL_RCC_OscConfig+0xea>
  2233. || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
  2234. 8004f52: 6863 ldr r3, [r4, #4]
  2235. 8004f54: f003 030c and.w r3, r3, #12
  2236. 8004f58: 2b08 cmp r3, #8
  2237. 8004f5a: d110 bne.n 8004f7e <HAL_RCC_OscConfig+0x106>
  2238. 8004f5c: 6863 ldr r3, [r4, #4]
  2239. 8004f5e: 03da lsls r2, r3, #15
  2240. 8004f60: d40d bmi.n 8004f7e <HAL_RCC_OscConfig+0x106>
  2241. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
  2242. 8004f62: 6823 ldr r3, [r4, #0]
  2243. 8004f64: 079b lsls r3, r3, #30
  2244. 8004f66: d502 bpl.n 8004f6e <HAL_RCC_OscConfig+0xf6>
  2245. 8004f68: 692b ldr r3, [r5, #16]
  2246. 8004f6a: 2b01 cmp r3, #1
  2247. 8004f6c: d1af bne.n 8004ece <HAL_RCC_OscConfig+0x56>
  2248. __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
  2249. 8004f6e: 6823 ldr r3, [r4, #0]
  2250. 8004f70: 696a ldr r2, [r5, #20]
  2251. 8004f72: f023 03f8 bic.w r3, r3, #248 ; 0xf8
  2252. 8004f76: ea43 03c2 orr.w r3, r3, r2, lsl #3
  2253. 8004f7a: 6023 str r3, [r4, #0]
  2254. 8004f7c: e785 b.n 8004e8a <HAL_RCC_OscConfig+0x12>
  2255. if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
  2256. 8004f7e: 692a ldr r2, [r5, #16]
  2257. 8004f80: 4b5a ldr r3, [pc, #360] ; (80050ec <HAL_RCC_OscConfig+0x274>)
  2258. 8004f82: b16a cbz r2, 8004fa0 <HAL_RCC_OscConfig+0x128>
  2259. __HAL_RCC_HSI_ENABLE();
  2260. 8004f84: 2201 movs r2, #1
  2261. 8004f86: 601a str r2, [r3, #0]
  2262. tickstart = HAL_GetTick();
  2263. 8004f88: f7ff f98e bl 80042a8 <HAL_GetTick>
  2264. 8004f8c: 4606 mov r6, r0
  2265. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  2266. 8004f8e: 6823 ldr r3, [r4, #0]
  2267. 8004f90: 079f lsls r7, r3, #30
  2268. 8004f92: d4ec bmi.n 8004f6e <HAL_RCC_OscConfig+0xf6>
  2269. if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  2270. 8004f94: f7ff f988 bl 80042a8 <HAL_GetTick>
  2271. 8004f98: 1b80 subs r0, r0, r6
  2272. 8004f9a: 2802 cmp r0, #2
  2273. 8004f9c: d9f7 bls.n 8004f8e <HAL_RCC_OscConfig+0x116>
  2274. 8004f9e: e7ad b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2275. __HAL_RCC_HSI_DISABLE();
  2276. 8004fa0: 601a str r2, [r3, #0]
  2277. tickstart = HAL_GetTick();
  2278. 8004fa2: f7ff f981 bl 80042a8 <HAL_GetTick>
  2279. 8004fa6: 4606 mov r6, r0
  2280. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
  2281. 8004fa8: 6823 ldr r3, [r4, #0]
  2282. 8004faa: 0798 lsls r0, r3, #30
  2283. 8004fac: f57f af6d bpl.w 8004e8a <HAL_RCC_OscConfig+0x12>
  2284. if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  2285. 8004fb0: f7ff f97a bl 80042a8 <HAL_GetTick>
  2286. 8004fb4: 1b80 subs r0, r0, r6
  2287. 8004fb6: 2802 cmp r0, #2
  2288. 8004fb8: d9f6 bls.n 8004fa8 <HAL_RCC_OscConfig+0x130>
  2289. 8004fba: e79f b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2290. if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
  2291. 8004fbc: 69aa ldr r2, [r5, #24]
  2292. 8004fbe: 4c4a ldr r4, [pc, #296] ; (80050e8 <HAL_RCC_OscConfig+0x270>)
  2293. 8004fc0: 4b4b ldr r3, [pc, #300] ; (80050f0 <HAL_RCC_OscConfig+0x278>)
  2294. 8004fc2: b1da cbz r2, 8004ffc <HAL_RCC_OscConfig+0x184>
  2295. __HAL_RCC_LSI_ENABLE();
  2296. 8004fc4: 2201 movs r2, #1
  2297. 8004fc6: 601a str r2, [r3, #0]
  2298. tickstart = HAL_GetTick();
  2299. 8004fc8: f7ff f96e bl 80042a8 <HAL_GetTick>
  2300. 8004fcc: 4606 mov r6, r0
  2301. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
  2302. 8004fce: 6a63 ldr r3, [r4, #36] ; 0x24
  2303. 8004fd0: 079b lsls r3, r3, #30
  2304. 8004fd2: d50d bpl.n 8004ff0 <HAL_RCC_OscConfig+0x178>
  2305. * @param mdelay: specifies the delay time length, in milliseconds.
  2306. * @retval None
  2307. */
  2308. static void RCC_Delay(uint32_t mdelay)
  2309. {
  2310. __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
  2311. 8004fd4: f44f 52fa mov.w r2, #8000 ; 0x1f40
  2312. 8004fd8: 4b46 ldr r3, [pc, #280] ; (80050f4 <HAL_RCC_OscConfig+0x27c>)
  2313. 8004fda: 681b ldr r3, [r3, #0]
  2314. 8004fdc: fbb3 f3f2 udiv r3, r3, r2
  2315. 8004fe0: 9301 str r3, [sp, #4]
  2316. \brief No Operation
  2317. \details No Operation does nothing. This instruction can be used for code alignment purposes.
  2318. */
  2319. __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
  2320. {
  2321. __ASM volatile ("nop");
  2322. 8004fe2: bf00 nop
  2323. do
  2324. {
  2325. __NOP();
  2326. }
  2327. while (Delay --);
  2328. 8004fe4: 9b01 ldr r3, [sp, #4]
  2329. 8004fe6: 1e5a subs r2, r3, #1
  2330. 8004fe8: 9201 str r2, [sp, #4]
  2331. 8004fea: 2b00 cmp r3, #0
  2332. 8004fec: d1f9 bne.n 8004fe2 <HAL_RCC_OscConfig+0x16a>
  2333. 8004fee: e750 b.n 8004e92 <HAL_RCC_OscConfig+0x1a>
  2334. if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  2335. 8004ff0: f7ff f95a bl 80042a8 <HAL_GetTick>
  2336. 8004ff4: 1b80 subs r0, r0, r6
  2337. 8004ff6: 2802 cmp r0, #2
  2338. 8004ff8: d9e9 bls.n 8004fce <HAL_RCC_OscConfig+0x156>
  2339. 8004ffa: e77f b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2340. __HAL_RCC_LSI_DISABLE();
  2341. 8004ffc: 601a str r2, [r3, #0]
  2342. tickstart = HAL_GetTick();
  2343. 8004ffe: f7ff f953 bl 80042a8 <HAL_GetTick>
  2344. 8005002: 4606 mov r6, r0
  2345. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
  2346. 8005004: 6a63 ldr r3, [r4, #36] ; 0x24
  2347. 8005006: 079f lsls r7, r3, #30
  2348. 8005008: f57f af43 bpl.w 8004e92 <HAL_RCC_OscConfig+0x1a>
  2349. if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  2350. 800500c: f7ff f94c bl 80042a8 <HAL_GetTick>
  2351. 8005010: 1b80 subs r0, r0, r6
  2352. 8005012: 2802 cmp r0, #2
  2353. 8005014: d9f6 bls.n 8005004 <HAL_RCC_OscConfig+0x18c>
  2354. 8005016: e771 b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2355. if(__HAL_RCC_PWR_IS_CLK_DISABLED())
  2356. 8005018: 4c33 ldr r4, [pc, #204] ; (80050e8 <HAL_RCC_OscConfig+0x270>)
  2357. 800501a: 69e3 ldr r3, [r4, #28]
  2358. 800501c: 00d8 lsls r0, r3, #3
  2359. 800501e: d424 bmi.n 800506a <HAL_RCC_OscConfig+0x1f2>
  2360. pwrclkchanged = SET;
  2361. 8005020: 2701 movs r7, #1
  2362. __HAL_RCC_PWR_CLK_ENABLE();
  2363. 8005022: 69e3 ldr r3, [r4, #28]
  2364. 8005024: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
  2365. 8005028: 61e3 str r3, [r4, #28]
  2366. 800502a: 69e3 ldr r3, [r4, #28]
  2367. 800502c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  2368. 8005030: 9300 str r3, [sp, #0]
  2369. 8005032: 9b00 ldr r3, [sp, #0]
  2370. if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  2371. 8005034: 4e30 ldr r6, [pc, #192] ; (80050f8 <HAL_RCC_OscConfig+0x280>)
  2372. 8005036: 6833 ldr r3, [r6, #0]
  2373. 8005038: 05d9 lsls r1, r3, #23
  2374. 800503a: d518 bpl.n 800506e <HAL_RCC_OscConfig+0x1f6>
  2375. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  2376. 800503c: 68eb ldr r3, [r5, #12]
  2377. 800503e: 2b01 cmp r3, #1
  2378. 8005040: d126 bne.n 8005090 <HAL_RCC_OscConfig+0x218>
  2379. 8005042: 6a23 ldr r3, [r4, #32]
  2380. 8005044: f043 0301 orr.w r3, r3, #1
  2381. 8005048: 6223 str r3, [r4, #32]
  2382. tickstart = HAL_GetTick();
  2383. 800504a: f7ff f92d bl 80042a8 <HAL_GetTick>
  2384. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  2385. 800504e: f241 3688 movw r6, #5000 ; 0x1388
  2386. tickstart = HAL_GetTick();
  2387. 8005052: 4680 mov r8, r0
  2388. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
  2389. 8005054: 6a23 ldr r3, [r4, #32]
  2390. 8005056: 079b lsls r3, r3, #30
  2391. 8005058: d53f bpl.n 80050da <HAL_RCC_OscConfig+0x262>
  2392. if(pwrclkchanged == SET)
  2393. 800505a: 2f00 cmp r7, #0
  2394. 800505c: f43f af1d beq.w 8004e9a <HAL_RCC_OscConfig+0x22>
  2395. __HAL_RCC_PWR_CLK_DISABLE();
  2396. 8005060: 69e3 ldr r3, [r4, #28]
  2397. 8005062: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
  2398. 8005066: 61e3 str r3, [r4, #28]
  2399. 8005068: e717 b.n 8004e9a <HAL_RCC_OscConfig+0x22>
  2400. FlagStatus pwrclkchanged = RESET;
  2401. 800506a: 2700 movs r7, #0
  2402. 800506c: e7e2 b.n 8005034 <HAL_RCC_OscConfig+0x1bc>
  2403. SET_BIT(PWR->CR, PWR_CR_DBP);
  2404. 800506e: 6833 ldr r3, [r6, #0]
  2405. 8005070: f443 7380 orr.w r3, r3, #256 ; 0x100
  2406. 8005074: 6033 str r3, [r6, #0]
  2407. tickstart = HAL_GetTick();
  2408. 8005076: f7ff f917 bl 80042a8 <HAL_GetTick>
  2409. 800507a: 4680 mov r8, r0
  2410. while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  2411. 800507c: 6833 ldr r3, [r6, #0]
  2412. 800507e: 05da lsls r2, r3, #23
  2413. 8005080: d4dc bmi.n 800503c <HAL_RCC_OscConfig+0x1c4>
  2414. if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
  2415. 8005082: f7ff f911 bl 80042a8 <HAL_GetTick>
  2416. 8005086: eba0 0008 sub.w r0, r0, r8
  2417. 800508a: 2864 cmp r0, #100 ; 0x64
  2418. 800508c: d9f6 bls.n 800507c <HAL_RCC_OscConfig+0x204>
  2419. 800508e: e735 b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2420. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  2421. 8005090: b9ab cbnz r3, 80050be <HAL_RCC_OscConfig+0x246>
  2422. 8005092: 6a23 ldr r3, [r4, #32]
  2423. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  2424. 8005094: f241 3888 movw r8, #5000 ; 0x1388
  2425. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  2426. 8005098: f023 0301 bic.w r3, r3, #1
  2427. 800509c: 6223 str r3, [r4, #32]
  2428. 800509e: 6a23 ldr r3, [r4, #32]
  2429. 80050a0: f023 0304 bic.w r3, r3, #4
  2430. 80050a4: 6223 str r3, [r4, #32]
  2431. tickstart = HAL_GetTick();
  2432. 80050a6: f7ff f8ff bl 80042a8 <HAL_GetTick>
  2433. 80050aa: 4606 mov r6, r0
  2434. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
  2435. 80050ac: 6a23 ldr r3, [r4, #32]
  2436. 80050ae: 0798 lsls r0, r3, #30
  2437. 80050b0: d5d3 bpl.n 800505a <HAL_RCC_OscConfig+0x1e2>
  2438. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  2439. 80050b2: f7ff f8f9 bl 80042a8 <HAL_GetTick>
  2440. 80050b6: 1b80 subs r0, r0, r6
  2441. 80050b8: 4540 cmp r0, r8
  2442. 80050ba: d9f7 bls.n 80050ac <HAL_RCC_OscConfig+0x234>
  2443. 80050bc: e71e b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2444. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  2445. 80050be: 2b05 cmp r3, #5
  2446. 80050c0: 6a23 ldr r3, [r4, #32]
  2447. 80050c2: d103 bne.n 80050cc <HAL_RCC_OscConfig+0x254>
  2448. 80050c4: f043 0304 orr.w r3, r3, #4
  2449. 80050c8: 6223 str r3, [r4, #32]
  2450. 80050ca: e7ba b.n 8005042 <HAL_RCC_OscConfig+0x1ca>
  2451. 80050cc: f023 0301 bic.w r3, r3, #1
  2452. 80050d0: 6223 str r3, [r4, #32]
  2453. 80050d2: 6a23 ldr r3, [r4, #32]
  2454. 80050d4: f023 0304 bic.w r3, r3, #4
  2455. 80050d8: e7b6 b.n 8005048 <HAL_RCC_OscConfig+0x1d0>
  2456. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  2457. 80050da: f7ff f8e5 bl 80042a8 <HAL_GetTick>
  2458. 80050de: eba0 0008 sub.w r0, r0, r8
  2459. 80050e2: 42b0 cmp r0, r6
  2460. 80050e4: d9b6 bls.n 8005054 <HAL_RCC_OscConfig+0x1dc>
  2461. 80050e6: e709 b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2462. 80050e8: 40021000 .word 0x40021000
  2463. 80050ec: 42420000 .word 0x42420000
  2464. 80050f0: 42420480 .word 0x42420480
  2465. 80050f4: 20000008 .word 0x20000008
  2466. 80050f8: 40007000 .word 0x40007000
  2467. if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
  2468. 80050fc: 4c22 ldr r4, [pc, #136] ; (8005188 <HAL_RCC_OscConfig+0x310>)
  2469. 80050fe: 6863 ldr r3, [r4, #4]
  2470. 8005100: f003 030c and.w r3, r3, #12
  2471. 8005104: 2b08 cmp r3, #8
  2472. 8005106: f43f aee2 beq.w 8004ece <HAL_RCC_OscConfig+0x56>
  2473. 800510a: 2300 movs r3, #0
  2474. 800510c: 4e1f ldr r6, [pc, #124] ; (800518c <HAL_RCC_OscConfig+0x314>)
  2475. if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
  2476. 800510e: 2a02 cmp r2, #2
  2477. __HAL_RCC_PLL_DISABLE();
  2478. 8005110: 6033 str r3, [r6, #0]
  2479. if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
  2480. 8005112: d12b bne.n 800516c <HAL_RCC_OscConfig+0x2f4>
  2481. tickstart = HAL_GetTick();
  2482. 8005114: f7ff f8c8 bl 80042a8 <HAL_GetTick>
  2483. 8005118: 4607 mov r7, r0
  2484. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
  2485. 800511a: 6823 ldr r3, [r4, #0]
  2486. 800511c: 0199 lsls r1, r3, #6
  2487. 800511e: d41f bmi.n 8005160 <HAL_RCC_OscConfig+0x2e8>
  2488. if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
  2489. 8005120: 6a2b ldr r3, [r5, #32]
  2490. 8005122: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
  2491. 8005126: d105 bne.n 8005134 <HAL_RCC_OscConfig+0x2bc>
  2492. __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
  2493. 8005128: 6862 ldr r2, [r4, #4]
  2494. 800512a: 68a9 ldr r1, [r5, #8]
  2495. 800512c: f422 3200 bic.w r2, r2, #131072 ; 0x20000
  2496. 8005130: 430a orrs r2, r1
  2497. 8005132: 6062 str r2, [r4, #4]
  2498. __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
  2499. 8005134: 6a69 ldr r1, [r5, #36] ; 0x24
  2500. 8005136: 6862 ldr r2, [r4, #4]
  2501. 8005138: 430b orrs r3, r1
  2502. 800513a: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000
  2503. 800513e: 4313 orrs r3, r2
  2504. 8005140: 6063 str r3, [r4, #4]
  2505. __HAL_RCC_PLL_ENABLE();
  2506. 8005142: 2301 movs r3, #1
  2507. 8005144: 6033 str r3, [r6, #0]
  2508. tickstart = HAL_GetTick();
  2509. 8005146: f7ff f8af bl 80042a8 <HAL_GetTick>
  2510. 800514a: 4605 mov r5, r0
  2511. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
  2512. 800514c: 6823 ldr r3, [r4, #0]
  2513. 800514e: 019a lsls r2, r3, #6
  2514. 8005150: f53f aea7 bmi.w 8004ea2 <HAL_RCC_OscConfig+0x2a>
  2515. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  2516. 8005154: f7ff f8a8 bl 80042a8 <HAL_GetTick>
  2517. 8005158: 1b40 subs r0, r0, r5
  2518. 800515a: 2802 cmp r0, #2
  2519. 800515c: d9f6 bls.n 800514c <HAL_RCC_OscConfig+0x2d4>
  2520. 800515e: e6cd b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2521. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  2522. 8005160: f7ff f8a2 bl 80042a8 <HAL_GetTick>
  2523. 8005164: 1bc0 subs r0, r0, r7
  2524. 8005166: 2802 cmp r0, #2
  2525. 8005168: d9d7 bls.n 800511a <HAL_RCC_OscConfig+0x2a2>
  2526. 800516a: e6c7 b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2527. tickstart = HAL_GetTick();
  2528. 800516c: f7ff f89c bl 80042a8 <HAL_GetTick>
  2529. 8005170: 4605 mov r5, r0
  2530. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
  2531. 8005172: 6823 ldr r3, [r4, #0]
  2532. 8005174: 019b lsls r3, r3, #6
  2533. 8005176: f57f ae94 bpl.w 8004ea2 <HAL_RCC_OscConfig+0x2a>
  2534. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  2535. 800517a: f7ff f895 bl 80042a8 <HAL_GetTick>
  2536. 800517e: 1b40 subs r0, r0, r5
  2537. 8005180: 2802 cmp r0, #2
  2538. 8005182: d9f6 bls.n 8005172 <HAL_RCC_OscConfig+0x2fa>
  2539. 8005184: e6ba b.n 8004efc <HAL_RCC_OscConfig+0x84>
  2540. 8005186: bf00 nop
  2541. 8005188: 40021000 .word 0x40021000
  2542. 800518c: 42420060 .word 0x42420060
  2543. 08005190 <HAL_RCC_GetSysClockFreq>:
  2544. {
  2545. 8005190: b530 push {r4, r5, lr}
  2546. const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
  2547. 8005192: 4b19 ldr r3, [pc, #100] ; (80051f8 <HAL_RCC_GetSysClockFreq+0x68>)
  2548. {
  2549. 8005194: b087 sub sp, #28
  2550. const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
  2551. 8005196: ac02 add r4, sp, #8
  2552. 8005198: f103 0510 add.w r5, r3, #16
  2553. 800519c: 4622 mov r2, r4
  2554. 800519e: 6818 ldr r0, [r3, #0]
  2555. 80051a0: 6859 ldr r1, [r3, #4]
  2556. 80051a2: 3308 adds r3, #8
  2557. 80051a4: c203 stmia r2!, {r0, r1}
  2558. 80051a6: 42ab cmp r3, r5
  2559. 80051a8: 4614 mov r4, r2
  2560. 80051aa: d1f7 bne.n 800519c <HAL_RCC_GetSysClockFreq+0xc>
  2561. const uint8_t aPredivFactorTable[2] = {1, 2};
  2562. 80051ac: 2301 movs r3, #1
  2563. 80051ae: f88d 3004 strb.w r3, [sp, #4]
  2564. 80051b2: 2302 movs r3, #2
  2565. tmpreg = RCC->CFGR;
  2566. 80051b4: 4911 ldr r1, [pc, #68] ; (80051fc <HAL_RCC_GetSysClockFreq+0x6c>)
  2567. const uint8_t aPredivFactorTable[2] = {1, 2};
  2568. 80051b6: f88d 3005 strb.w r3, [sp, #5]
  2569. tmpreg = RCC->CFGR;
  2570. 80051ba: 684b ldr r3, [r1, #4]
  2571. switch (tmpreg & RCC_CFGR_SWS)
  2572. 80051bc: f003 020c and.w r2, r3, #12
  2573. 80051c0: 2a08 cmp r2, #8
  2574. 80051c2: d117 bne.n 80051f4 <HAL_RCC_GetSysClockFreq+0x64>
  2575. pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
  2576. 80051c4: f3c3 4283 ubfx r2, r3, #18, #4
  2577. 80051c8: a806 add r0, sp, #24
  2578. 80051ca: 4402 add r2, r0
  2579. if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
  2580. 80051cc: 03db lsls r3, r3, #15
  2581. pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
  2582. 80051ce: f812 2c10 ldrb.w r2, [r2, #-16]
  2583. if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
  2584. 80051d2: d50c bpl.n 80051ee <HAL_RCC_GetSysClockFreq+0x5e>
  2585. prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
  2586. 80051d4: 684b ldr r3, [r1, #4]
  2587. pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
  2588. 80051d6: 480a ldr r0, [pc, #40] ; (8005200 <HAL_RCC_GetSysClockFreq+0x70>)
  2589. prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
  2590. 80051d8: f3c3 4340 ubfx r3, r3, #17, #1
  2591. pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
  2592. 80051dc: 4350 muls r0, r2
  2593. prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
  2594. 80051de: aa06 add r2, sp, #24
  2595. 80051e0: 4413 add r3, r2
  2596. 80051e2: f813 3c14 ldrb.w r3, [r3, #-20]
  2597. pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
  2598. 80051e6: fbb0 f0f3 udiv r0, r0, r3
  2599. }
  2600. 80051ea: b007 add sp, #28
  2601. 80051ec: bd30 pop {r4, r5, pc}
  2602. pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
  2603. 80051ee: 4805 ldr r0, [pc, #20] ; (8005204 <HAL_RCC_GetSysClockFreq+0x74>)
  2604. 80051f0: 4350 muls r0, r2
  2605. 80051f2: e7fa b.n 80051ea <HAL_RCC_GetSysClockFreq+0x5a>
  2606. sysclockfreq = HSE_VALUE;
  2607. 80051f4: 4802 ldr r0, [pc, #8] ; (8005200 <HAL_RCC_GetSysClockFreq+0x70>)
  2608. return sysclockfreq;
  2609. 80051f6: e7f8 b.n 80051ea <HAL_RCC_GetSysClockFreq+0x5a>
  2610. 80051f8: 0800883c .word 0x0800883c
  2611. 80051fc: 40021000 .word 0x40021000
  2612. 8005200: 007a1200 .word 0x007a1200
  2613. 8005204: 003d0900 .word 0x003d0900
  2614. 08005208 <HAL_RCC_ClockConfig>:
  2615. if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
  2616. 8005208: 4a54 ldr r2, [pc, #336] ; (800535c <HAL_RCC_ClockConfig+0x154>)
  2617. {
  2618. 800520a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  2619. if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
  2620. 800520e: 6813 ldr r3, [r2, #0]
  2621. {
  2622. 8005210: 4605 mov r5, r0
  2623. if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
  2624. 8005212: f003 0307 and.w r3, r3, #7
  2625. 8005216: 428b cmp r3, r1
  2626. {
  2627. 8005218: 460e mov r6, r1
  2628. if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
  2629. 800521a: d32a bcc.n 8005272 <HAL_RCC_ClockConfig+0x6a>
  2630. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
  2631. 800521c: 6829 ldr r1, [r5, #0]
  2632. 800521e: 078c lsls r4, r1, #30
  2633. 8005220: d434 bmi.n 800528c <HAL_RCC_ClockConfig+0x84>
  2634. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
  2635. 8005222: 07ca lsls r2, r1, #31
  2636. 8005224: d447 bmi.n 80052b6 <HAL_RCC_ClockConfig+0xae>
  2637. if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
  2638. 8005226: 4a4d ldr r2, [pc, #308] ; (800535c <HAL_RCC_ClockConfig+0x154>)
  2639. 8005228: 6813 ldr r3, [r2, #0]
  2640. 800522a: f003 0307 and.w r3, r3, #7
  2641. 800522e: 429e cmp r6, r3
  2642. 8005230: f0c0 8082 bcc.w 8005338 <HAL_RCC_ClockConfig+0x130>
  2643. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
  2644. 8005234: 682a ldr r2, [r5, #0]
  2645. 8005236: 4c4a ldr r4, [pc, #296] ; (8005360 <HAL_RCC_ClockConfig+0x158>)
  2646. 8005238: f012 0f04 tst.w r2, #4
  2647. 800523c: f040 8087 bne.w 800534e <HAL_RCC_ClockConfig+0x146>
  2648. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
  2649. 8005240: 0713 lsls r3, r2, #28
  2650. 8005242: d506 bpl.n 8005252 <HAL_RCC_ClockConfig+0x4a>
  2651. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
  2652. 8005244: 6863 ldr r3, [r4, #4]
  2653. 8005246: 692a ldr r2, [r5, #16]
  2654. 8005248: f423 5360 bic.w r3, r3, #14336 ; 0x3800
  2655. 800524c: ea43 03c2 orr.w r3, r3, r2, lsl #3
  2656. 8005250: 6063 str r3, [r4, #4]
  2657. SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
  2658. 8005252: f7ff ff9d bl 8005190 <HAL_RCC_GetSysClockFreq>
  2659. 8005256: 6863 ldr r3, [r4, #4]
  2660. 8005258: 4a42 ldr r2, [pc, #264] ; (8005364 <HAL_RCC_ClockConfig+0x15c>)
  2661. 800525a: f3c3 1303 ubfx r3, r3, #4, #4
  2662. 800525e: 5cd3 ldrb r3, [r2, r3]
  2663. 8005260: 40d8 lsrs r0, r3
  2664. 8005262: 4b41 ldr r3, [pc, #260] ; (8005368 <HAL_RCC_ClockConfig+0x160>)
  2665. 8005264: 6018 str r0, [r3, #0]
  2666. HAL_InitTick (TICK_INT_PRIORITY);
  2667. 8005266: 2000 movs r0, #0
  2668. 8005268: f7fe ffdc bl 8004224 <HAL_InitTick>
  2669. return HAL_OK;
  2670. 800526c: 2000 movs r0, #0
  2671. }
  2672. 800526e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  2673. __HAL_FLASH_SET_LATENCY(FLatency);
  2674. 8005272: 6813 ldr r3, [r2, #0]
  2675. 8005274: f023 0307 bic.w r3, r3, #7
  2676. 8005278: 430b orrs r3, r1
  2677. 800527a: 6013 str r3, [r2, #0]
  2678. if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
  2679. 800527c: 6813 ldr r3, [r2, #0]
  2680. 800527e: f003 0307 and.w r3, r3, #7
  2681. 8005282: 4299 cmp r1, r3
  2682. 8005284: d0ca beq.n 800521c <HAL_RCC_ClockConfig+0x14>
  2683. return HAL_ERROR;
  2684. 8005286: 2001 movs r0, #1
  2685. 8005288: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  2686. 800528c: 4b34 ldr r3, [pc, #208] ; (8005360 <HAL_RCC_ClockConfig+0x158>)
  2687. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
  2688. 800528e: f011 0f04 tst.w r1, #4
  2689. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
  2690. 8005292: bf1e ittt ne
  2691. 8005294: 685a ldrne r2, [r3, #4]
  2692. 8005296: f442 62e0 orrne.w r2, r2, #1792 ; 0x700
  2693. 800529a: 605a strne r2, [r3, #4]
  2694. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
  2695. 800529c: 0708 lsls r0, r1, #28
  2696. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
  2697. 800529e: bf42 ittt mi
  2698. 80052a0: 685a ldrmi r2, [r3, #4]
  2699. 80052a2: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800
  2700. 80052a6: 605a strmi r2, [r3, #4]
  2701. MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
  2702. 80052a8: 685a ldr r2, [r3, #4]
  2703. 80052aa: 68a8 ldr r0, [r5, #8]
  2704. 80052ac: f022 02f0 bic.w r2, r2, #240 ; 0xf0
  2705. 80052b0: 4302 orrs r2, r0
  2706. 80052b2: 605a str r2, [r3, #4]
  2707. 80052b4: e7b5 b.n 8005222 <HAL_RCC_ClockConfig+0x1a>
  2708. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  2709. 80052b6: 686a ldr r2, [r5, #4]
  2710. 80052b8: 4c29 ldr r4, [pc, #164] ; (8005360 <HAL_RCC_ClockConfig+0x158>)
  2711. 80052ba: 2a01 cmp r2, #1
  2712. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  2713. 80052bc: 6823 ldr r3, [r4, #0]
  2714. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  2715. 80052be: d11c bne.n 80052fa <HAL_RCC_ClockConfig+0xf2>
  2716. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  2717. 80052c0: f413 3f00 tst.w r3, #131072 ; 0x20000
  2718. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  2719. 80052c4: d0df beq.n 8005286 <HAL_RCC_ClockConfig+0x7e>
  2720. __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
  2721. 80052c6: 6863 ldr r3, [r4, #4]
  2722. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  2723. 80052c8: f241 3888 movw r8, #5000 ; 0x1388
  2724. __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
  2725. 80052cc: f023 0303 bic.w r3, r3, #3
  2726. 80052d0: 4313 orrs r3, r2
  2727. 80052d2: 6063 str r3, [r4, #4]
  2728. tickstart = HAL_GetTick();
  2729. 80052d4: f7fe ffe8 bl 80042a8 <HAL_GetTick>
  2730. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  2731. 80052d8: 686b ldr r3, [r5, #4]
  2732. tickstart = HAL_GetTick();
  2733. 80052da: 4607 mov r7, r0
  2734. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  2735. 80052dc: 2b01 cmp r3, #1
  2736. 80052de: d114 bne.n 800530a <HAL_RCC_ClockConfig+0x102>
  2737. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
  2738. 80052e0: 6863 ldr r3, [r4, #4]
  2739. 80052e2: f003 030c and.w r3, r3, #12
  2740. 80052e6: 2b04 cmp r3, #4
  2741. 80052e8: d09d beq.n 8005226 <HAL_RCC_ClockConfig+0x1e>
  2742. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  2743. 80052ea: f7fe ffdd bl 80042a8 <HAL_GetTick>
  2744. 80052ee: 1bc0 subs r0, r0, r7
  2745. 80052f0: 4540 cmp r0, r8
  2746. 80052f2: d9f5 bls.n 80052e0 <HAL_RCC_ClockConfig+0xd8>
  2747. return HAL_TIMEOUT;
  2748. 80052f4: 2003 movs r0, #3
  2749. 80052f6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  2750. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
  2751. 80052fa: 2a02 cmp r2, #2
  2752. 80052fc: d102 bne.n 8005304 <HAL_RCC_ClockConfig+0xfc>
  2753. if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
  2754. 80052fe: f013 7f00 tst.w r3, #33554432 ; 0x2000000
  2755. 8005302: e7df b.n 80052c4 <HAL_RCC_ClockConfig+0xbc>
  2756. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  2757. 8005304: f013 0f02 tst.w r3, #2
  2758. 8005308: e7dc b.n 80052c4 <HAL_RCC_ClockConfig+0xbc>
  2759. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
  2760. 800530a: 2b02 cmp r3, #2
  2761. 800530c: d10f bne.n 800532e <HAL_RCC_ClockConfig+0x126>
  2762. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
  2763. 800530e: 6863 ldr r3, [r4, #4]
  2764. 8005310: f003 030c and.w r3, r3, #12
  2765. 8005314: 2b08 cmp r3, #8
  2766. 8005316: d086 beq.n 8005226 <HAL_RCC_ClockConfig+0x1e>
  2767. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  2768. 8005318: f7fe ffc6 bl 80042a8 <HAL_GetTick>
  2769. 800531c: 1bc0 subs r0, r0, r7
  2770. 800531e: 4540 cmp r0, r8
  2771. 8005320: d9f5 bls.n 800530e <HAL_RCC_ClockConfig+0x106>
  2772. 8005322: e7e7 b.n 80052f4 <HAL_RCC_ClockConfig+0xec>
  2773. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  2774. 8005324: f7fe ffc0 bl 80042a8 <HAL_GetTick>
  2775. 8005328: 1bc0 subs r0, r0, r7
  2776. 800532a: 4540 cmp r0, r8
  2777. 800532c: d8e2 bhi.n 80052f4 <HAL_RCC_ClockConfig+0xec>
  2778. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
  2779. 800532e: 6863 ldr r3, [r4, #4]
  2780. 8005330: f013 0f0c tst.w r3, #12
  2781. 8005334: d1f6 bne.n 8005324 <HAL_RCC_ClockConfig+0x11c>
  2782. 8005336: e776 b.n 8005226 <HAL_RCC_ClockConfig+0x1e>
  2783. __HAL_FLASH_SET_LATENCY(FLatency);
  2784. 8005338: 6813 ldr r3, [r2, #0]
  2785. 800533a: f023 0307 bic.w r3, r3, #7
  2786. 800533e: 4333 orrs r3, r6
  2787. 8005340: 6013 str r3, [r2, #0]
  2788. if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
  2789. 8005342: 6813 ldr r3, [r2, #0]
  2790. 8005344: f003 0307 and.w r3, r3, #7
  2791. 8005348: 429e cmp r6, r3
  2792. 800534a: d19c bne.n 8005286 <HAL_RCC_ClockConfig+0x7e>
  2793. 800534c: e772 b.n 8005234 <HAL_RCC_ClockConfig+0x2c>
  2794. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
  2795. 800534e: 6863 ldr r3, [r4, #4]
  2796. 8005350: 68e9 ldr r1, [r5, #12]
  2797. 8005352: f423 63e0 bic.w r3, r3, #1792 ; 0x700
  2798. 8005356: 430b orrs r3, r1
  2799. 8005358: 6063 str r3, [r4, #4]
  2800. 800535a: e771 b.n 8005240 <HAL_RCC_ClockConfig+0x38>
  2801. 800535c: 40022000 .word 0x40022000
  2802. 8005360: 40021000 .word 0x40021000
  2803. 8005364: 08008a3a .word 0x08008a3a
  2804. 8005368: 20000008 .word 0x20000008
  2805. 0800536c <HAL_RCC_GetPCLK1Freq>:
  2806. return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
  2807. 800536c: 4b04 ldr r3, [pc, #16] ; (8005380 <HAL_RCC_GetPCLK1Freq+0x14>)
  2808. 800536e: 4a05 ldr r2, [pc, #20] ; (8005384 <HAL_RCC_GetPCLK1Freq+0x18>)
  2809. 8005370: 685b ldr r3, [r3, #4]
  2810. 8005372: f3c3 2302 ubfx r3, r3, #8, #3
  2811. 8005376: 5cd3 ldrb r3, [r2, r3]
  2812. 8005378: 4a03 ldr r2, [pc, #12] ; (8005388 <HAL_RCC_GetPCLK1Freq+0x1c>)
  2813. 800537a: 6810 ldr r0, [r2, #0]
  2814. }
  2815. 800537c: 40d8 lsrs r0, r3
  2816. 800537e: 4770 bx lr
  2817. 8005380: 40021000 .word 0x40021000
  2818. 8005384: 08008a4a .word 0x08008a4a
  2819. 8005388: 20000008 .word 0x20000008
  2820. 0800538c <HAL_RCC_GetPCLK2Freq>:
  2821. return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
  2822. 800538c: 4b04 ldr r3, [pc, #16] ; (80053a0 <HAL_RCC_GetPCLK2Freq+0x14>)
  2823. 800538e: 4a05 ldr r2, [pc, #20] ; (80053a4 <HAL_RCC_GetPCLK2Freq+0x18>)
  2824. 8005390: 685b ldr r3, [r3, #4]
  2825. 8005392: f3c3 23c2 ubfx r3, r3, #11, #3
  2826. 8005396: 5cd3 ldrb r3, [r2, r3]
  2827. 8005398: 4a03 ldr r2, [pc, #12] ; (80053a8 <HAL_RCC_GetPCLK2Freq+0x1c>)
  2828. 800539a: 6810 ldr r0, [r2, #0]
  2829. }
  2830. 800539c: 40d8 lsrs r0, r3
  2831. 800539e: 4770 bx lr
  2832. 80053a0: 40021000 .word 0x40021000
  2833. 80053a4: 08008a4a .word 0x08008a4a
  2834. 80053a8: 20000008 .word 0x20000008
  2835. 080053ac <HAL_TIM_Base_Start_IT>:
  2836. {
  2837. /* Check the parameters */
  2838. assert_param(IS_TIM_INSTANCE(htim->Instance));
  2839. /* Enable the TIM Update interrupt */
  2840. __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
  2841. 80053ac: 6803 ldr r3, [r0, #0]
  2842. /* Enable the Peripheral */
  2843. __HAL_TIM_ENABLE(htim);
  2844. /* Return function status */
  2845. return HAL_OK;
  2846. }
  2847. 80053ae: 2000 movs r0, #0
  2848. __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
  2849. 80053b0: 68da ldr r2, [r3, #12]
  2850. 80053b2: f042 0201 orr.w r2, r2, #1
  2851. 80053b6: 60da str r2, [r3, #12]
  2852. __HAL_TIM_ENABLE(htim);
  2853. 80053b8: 681a ldr r2, [r3, #0]
  2854. 80053ba: f042 0201 orr.w r2, r2, #1
  2855. 80053be: 601a str r2, [r3, #0]
  2856. }
  2857. 80053c0: 4770 bx lr
  2858. 080053c2 <HAL_TIM_OC_DelayElapsedCallback>:
  2859. 80053c2: 4770 bx lr
  2860. 080053c4 <HAL_TIM_IC_CaptureCallback>:
  2861. 80053c4: 4770 bx lr
  2862. 080053c6 <HAL_TIM_PWM_PulseFinishedCallback>:
  2863. 80053c6: 4770 bx lr
  2864. 080053c8 <HAL_TIM_TriggerCallback>:
  2865. 80053c8: 4770 bx lr
  2866. 080053ca <HAL_TIM_IRQHandler>:
  2867. * @retval None
  2868. */
  2869. void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
  2870. {
  2871. /* Capture compare 1 event */
  2872. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
  2873. 80053ca: 6803 ldr r3, [r0, #0]
  2874. {
  2875. 80053cc: b510 push {r4, lr}
  2876. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
  2877. 80053ce: 691a ldr r2, [r3, #16]
  2878. {
  2879. 80053d0: 4604 mov r4, r0
  2880. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
  2881. 80053d2: 0791 lsls r1, r2, #30
  2882. 80053d4: d50e bpl.n 80053f4 <HAL_TIM_IRQHandler+0x2a>
  2883. {
  2884. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
  2885. 80053d6: 68da ldr r2, [r3, #12]
  2886. 80053d8: 0792 lsls r2, r2, #30
  2887. 80053da: d50b bpl.n 80053f4 <HAL_TIM_IRQHandler+0x2a>
  2888. {
  2889. {
  2890. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
  2891. 80053dc: f06f 0202 mvn.w r2, #2
  2892. 80053e0: 611a str r2, [r3, #16]
  2893. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  2894. 80053e2: 2201 movs r2, #1
  2895. /* Input capture event */
  2896. if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
  2897. 80053e4: 699b ldr r3, [r3, #24]
  2898. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  2899. 80053e6: 7702 strb r2, [r0, #28]
  2900. if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
  2901. 80053e8: 079b lsls r3, r3, #30
  2902. 80053ea: d077 beq.n 80054dc <HAL_TIM_IRQHandler+0x112>
  2903. {
  2904. HAL_TIM_IC_CaptureCallback(htim);
  2905. 80053ec: f7ff ffea bl 80053c4 <HAL_TIM_IC_CaptureCallback>
  2906. else
  2907. {
  2908. HAL_TIM_OC_DelayElapsedCallback(htim);
  2909. HAL_TIM_PWM_PulseFinishedCallback(htim);
  2910. }
  2911. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  2912. 80053f0: 2300 movs r3, #0
  2913. 80053f2: 7723 strb r3, [r4, #28]
  2914. }
  2915. }
  2916. }
  2917. /* Capture compare 2 event */
  2918. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
  2919. 80053f4: 6823 ldr r3, [r4, #0]
  2920. 80053f6: 691a ldr r2, [r3, #16]
  2921. 80053f8: 0750 lsls r0, r2, #29
  2922. 80053fa: d510 bpl.n 800541e <HAL_TIM_IRQHandler+0x54>
  2923. {
  2924. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
  2925. 80053fc: 68da ldr r2, [r3, #12]
  2926. 80053fe: 0751 lsls r1, r2, #29
  2927. 8005400: d50d bpl.n 800541e <HAL_TIM_IRQHandler+0x54>
  2928. {
  2929. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
  2930. 8005402: f06f 0204 mvn.w r2, #4
  2931. 8005406: 611a str r2, [r3, #16]
  2932. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  2933. 8005408: 2202 movs r2, #2
  2934. /* Input capture event */
  2935. if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
  2936. 800540a: 699b ldr r3, [r3, #24]
  2937. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  2938. 800540c: 7722 strb r2, [r4, #28]
  2939. if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
  2940. 800540e: f413 7f40 tst.w r3, #768 ; 0x300
  2941. {
  2942. HAL_TIM_IC_CaptureCallback(htim);
  2943. 8005412: 4620 mov r0, r4
  2944. if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
  2945. 8005414: d068 beq.n 80054e8 <HAL_TIM_IRQHandler+0x11e>
  2946. HAL_TIM_IC_CaptureCallback(htim);
  2947. 8005416: f7ff ffd5 bl 80053c4 <HAL_TIM_IC_CaptureCallback>
  2948. else
  2949. {
  2950. HAL_TIM_OC_DelayElapsedCallback(htim);
  2951. HAL_TIM_PWM_PulseFinishedCallback(htim);
  2952. }
  2953. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  2954. 800541a: 2300 movs r3, #0
  2955. 800541c: 7723 strb r3, [r4, #28]
  2956. }
  2957. }
  2958. /* Capture compare 3 event */
  2959. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
  2960. 800541e: 6823 ldr r3, [r4, #0]
  2961. 8005420: 691a ldr r2, [r3, #16]
  2962. 8005422: 0712 lsls r2, r2, #28
  2963. 8005424: d50f bpl.n 8005446 <HAL_TIM_IRQHandler+0x7c>
  2964. {
  2965. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
  2966. 8005426: 68da ldr r2, [r3, #12]
  2967. 8005428: 0710 lsls r0, r2, #28
  2968. 800542a: d50c bpl.n 8005446 <HAL_TIM_IRQHandler+0x7c>
  2969. {
  2970. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
  2971. 800542c: f06f 0208 mvn.w r2, #8
  2972. 8005430: 611a str r2, [r3, #16]
  2973. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  2974. 8005432: 2204 movs r2, #4
  2975. /* Input capture event */
  2976. if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
  2977. 8005434: 69db ldr r3, [r3, #28]
  2978. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  2979. 8005436: 7722 strb r2, [r4, #28]
  2980. if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
  2981. 8005438: 0799 lsls r1, r3, #30
  2982. {
  2983. HAL_TIM_IC_CaptureCallback(htim);
  2984. 800543a: 4620 mov r0, r4
  2985. if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
  2986. 800543c: d05a beq.n 80054f4 <HAL_TIM_IRQHandler+0x12a>
  2987. HAL_TIM_IC_CaptureCallback(htim);
  2988. 800543e: f7ff ffc1 bl 80053c4 <HAL_TIM_IC_CaptureCallback>
  2989. else
  2990. {
  2991. HAL_TIM_OC_DelayElapsedCallback(htim);
  2992. HAL_TIM_PWM_PulseFinishedCallback(htim);
  2993. }
  2994. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  2995. 8005442: 2300 movs r3, #0
  2996. 8005444: 7723 strb r3, [r4, #28]
  2997. }
  2998. }
  2999. /* Capture compare 4 event */
  3000. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
  3001. 8005446: 6823 ldr r3, [r4, #0]
  3002. 8005448: 691a ldr r2, [r3, #16]
  3003. 800544a: 06d2 lsls r2, r2, #27
  3004. 800544c: d510 bpl.n 8005470 <HAL_TIM_IRQHandler+0xa6>
  3005. {
  3006. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
  3007. 800544e: 68da ldr r2, [r3, #12]
  3008. 8005450: 06d0 lsls r0, r2, #27
  3009. 8005452: d50d bpl.n 8005470 <HAL_TIM_IRQHandler+0xa6>
  3010. {
  3011. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
  3012. 8005454: f06f 0210 mvn.w r2, #16
  3013. 8005458: 611a str r2, [r3, #16]
  3014. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  3015. 800545a: 2208 movs r2, #8
  3016. /* Input capture event */
  3017. if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
  3018. 800545c: 69db ldr r3, [r3, #28]
  3019. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  3020. 800545e: 7722 strb r2, [r4, #28]
  3021. if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
  3022. 8005460: f413 7f40 tst.w r3, #768 ; 0x300
  3023. {
  3024. HAL_TIM_IC_CaptureCallback(htim);
  3025. 8005464: 4620 mov r0, r4
  3026. if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
  3027. 8005466: d04b beq.n 8005500 <HAL_TIM_IRQHandler+0x136>
  3028. HAL_TIM_IC_CaptureCallback(htim);
  3029. 8005468: f7ff ffac bl 80053c4 <HAL_TIM_IC_CaptureCallback>
  3030. else
  3031. {
  3032. HAL_TIM_OC_DelayElapsedCallback(htim);
  3033. HAL_TIM_PWM_PulseFinishedCallback(htim);
  3034. }
  3035. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  3036. 800546c: 2300 movs r3, #0
  3037. 800546e: 7723 strb r3, [r4, #28]
  3038. }
  3039. }
  3040. /* TIM Update event */
  3041. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
  3042. 8005470: 6823 ldr r3, [r4, #0]
  3043. 8005472: 691a ldr r2, [r3, #16]
  3044. 8005474: 07d1 lsls r1, r2, #31
  3045. 8005476: d508 bpl.n 800548a <HAL_TIM_IRQHandler+0xc0>
  3046. {
  3047. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
  3048. 8005478: 68da ldr r2, [r3, #12]
  3049. 800547a: 07d2 lsls r2, r2, #31
  3050. 800547c: d505 bpl.n 800548a <HAL_TIM_IRQHandler+0xc0>
  3051. {
  3052. __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
  3053. 800547e: f06f 0201 mvn.w r2, #1
  3054. HAL_TIM_PeriodElapsedCallback(htim);
  3055. 8005482: 4620 mov r0, r4
  3056. __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
  3057. 8005484: 611a str r2, [r3, #16]
  3058. HAL_TIM_PeriodElapsedCallback(htim);
  3059. 8005486: f001 fac3 bl 8006a10 <HAL_TIM_PeriodElapsedCallback>
  3060. }
  3061. }
  3062. /* TIM Break input event */
  3063. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
  3064. 800548a: 6823 ldr r3, [r4, #0]
  3065. 800548c: 691a ldr r2, [r3, #16]
  3066. 800548e: 0610 lsls r0, r2, #24
  3067. 8005490: d508 bpl.n 80054a4 <HAL_TIM_IRQHandler+0xda>
  3068. {
  3069. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
  3070. 8005492: 68da ldr r2, [r3, #12]
  3071. 8005494: 0611 lsls r1, r2, #24
  3072. 8005496: d505 bpl.n 80054a4 <HAL_TIM_IRQHandler+0xda>
  3073. {
  3074. __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
  3075. 8005498: f06f 0280 mvn.w r2, #128 ; 0x80
  3076. HAL_TIMEx_BreakCallback(htim);
  3077. 800549c: 4620 mov r0, r4
  3078. __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
  3079. 800549e: 611a str r2, [r3, #16]
  3080. HAL_TIMEx_BreakCallback(htim);
  3081. 80054a0: f000 f8bf bl 8005622 <HAL_TIMEx_BreakCallback>
  3082. }
  3083. }
  3084. /* TIM Trigger detection event */
  3085. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
  3086. 80054a4: 6823 ldr r3, [r4, #0]
  3087. 80054a6: 691a ldr r2, [r3, #16]
  3088. 80054a8: 0652 lsls r2, r2, #25
  3089. 80054aa: d508 bpl.n 80054be <HAL_TIM_IRQHandler+0xf4>
  3090. {
  3091. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
  3092. 80054ac: 68da ldr r2, [r3, #12]
  3093. 80054ae: 0650 lsls r0, r2, #25
  3094. 80054b0: d505 bpl.n 80054be <HAL_TIM_IRQHandler+0xf4>
  3095. {
  3096. __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
  3097. 80054b2: f06f 0240 mvn.w r2, #64 ; 0x40
  3098. HAL_TIM_TriggerCallback(htim);
  3099. 80054b6: 4620 mov r0, r4
  3100. __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
  3101. 80054b8: 611a str r2, [r3, #16]
  3102. HAL_TIM_TriggerCallback(htim);
  3103. 80054ba: f7ff ff85 bl 80053c8 <HAL_TIM_TriggerCallback>
  3104. }
  3105. }
  3106. /* TIM commutation event */
  3107. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
  3108. 80054be: 6823 ldr r3, [r4, #0]
  3109. 80054c0: 691a ldr r2, [r3, #16]
  3110. 80054c2: 0691 lsls r1, r2, #26
  3111. 80054c4: d522 bpl.n 800550c <HAL_TIM_IRQHandler+0x142>
  3112. {
  3113. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
  3114. 80054c6: 68da ldr r2, [r3, #12]
  3115. 80054c8: 0692 lsls r2, r2, #26
  3116. 80054ca: d51f bpl.n 800550c <HAL_TIM_IRQHandler+0x142>
  3117. {
  3118. __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
  3119. 80054cc: f06f 0220 mvn.w r2, #32
  3120. HAL_TIMEx_CommutationCallback(htim);
  3121. 80054d0: 4620 mov r0, r4
  3122. }
  3123. }
  3124. }
  3125. 80054d2: e8bd 4010 ldmia.w sp!, {r4, lr}
  3126. __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
  3127. 80054d6: 611a str r2, [r3, #16]
  3128. HAL_TIMEx_CommutationCallback(htim);
  3129. 80054d8: f000 b8a2 b.w 8005620 <HAL_TIMEx_CommutationCallback>
  3130. HAL_TIM_OC_DelayElapsedCallback(htim);
  3131. 80054dc: f7ff ff71 bl 80053c2 <HAL_TIM_OC_DelayElapsedCallback>
  3132. HAL_TIM_PWM_PulseFinishedCallback(htim);
  3133. 80054e0: 4620 mov r0, r4
  3134. 80054e2: f7ff ff70 bl 80053c6 <HAL_TIM_PWM_PulseFinishedCallback>
  3135. 80054e6: e783 b.n 80053f0 <HAL_TIM_IRQHandler+0x26>
  3136. HAL_TIM_OC_DelayElapsedCallback(htim);
  3137. 80054e8: f7ff ff6b bl 80053c2 <HAL_TIM_OC_DelayElapsedCallback>
  3138. HAL_TIM_PWM_PulseFinishedCallback(htim);
  3139. 80054ec: 4620 mov r0, r4
  3140. 80054ee: f7ff ff6a bl 80053c6 <HAL_TIM_PWM_PulseFinishedCallback>
  3141. 80054f2: e792 b.n 800541a <HAL_TIM_IRQHandler+0x50>
  3142. HAL_TIM_OC_DelayElapsedCallback(htim);
  3143. 80054f4: f7ff ff65 bl 80053c2 <HAL_TIM_OC_DelayElapsedCallback>
  3144. HAL_TIM_PWM_PulseFinishedCallback(htim);
  3145. 80054f8: 4620 mov r0, r4
  3146. 80054fa: f7ff ff64 bl 80053c6 <HAL_TIM_PWM_PulseFinishedCallback>
  3147. 80054fe: e7a0 b.n 8005442 <HAL_TIM_IRQHandler+0x78>
  3148. HAL_TIM_OC_DelayElapsedCallback(htim);
  3149. 8005500: f7ff ff5f bl 80053c2 <HAL_TIM_OC_DelayElapsedCallback>
  3150. HAL_TIM_PWM_PulseFinishedCallback(htim);
  3151. 8005504: 4620 mov r0, r4
  3152. 8005506: f7ff ff5e bl 80053c6 <HAL_TIM_PWM_PulseFinishedCallback>
  3153. 800550a: e7af b.n 800546c <HAL_TIM_IRQHandler+0xa2>
  3154. 800550c: bd10 pop {r4, pc}
  3155. ...
  3156. 08005510 <TIM_Base_SetConfig>:
  3157. {
  3158. uint32_t tmpcr1 = 0U;
  3159. tmpcr1 = TIMx->CR1;
  3160. /* Set TIM Time Base Unit parameters ---------------------------------------*/
  3161. if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
  3162. 8005510: 4a24 ldr r2, [pc, #144] ; (80055a4 <TIM_Base_SetConfig+0x94>)
  3163. tmpcr1 = TIMx->CR1;
  3164. 8005512: 6803 ldr r3, [r0, #0]
  3165. if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
  3166. 8005514: 4290 cmp r0, r2
  3167. 8005516: d012 beq.n 800553e <TIM_Base_SetConfig+0x2e>
  3168. 8005518: f502 6200 add.w r2, r2, #2048 ; 0x800
  3169. 800551c: 4290 cmp r0, r2
  3170. 800551e: d00e beq.n 800553e <TIM_Base_SetConfig+0x2e>
  3171. 8005520: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000
  3172. 8005524: d00b beq.n 800553e <TIM_Base_SetConfig+0x2e>
  3173. 8005526: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000
  3174. 800552a: 4290 cmp r0, r2
  3175. 800552c: d007 beq.n 800553e <TIM_Base_SetConfig+0x2e>
  3176. 800552e: f502 6280 add.w r2, r2, #1024 ; 0x400
  3177. 8005532: 4290 cmp r0, r2
  3178. 8005534: d003 beq.n 800553e <TIM_Base_SetConfig+0x2e>
  3179. 8005536: f502 6280 add.w r2, r2, #1024 ; 0x400
  3180. 800553a: 4290 cmp r0, r2
  3181. 800553c: d11d bne.n 800557a <TIM_Base_SetConfig+0x6a>
  3182. {
  3183. /* Select the Counter Mode */
  3184. tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
  3185. tmpcr1 |= Structure->CounterMode;
  3186. 800553e: 684a ldr r2, [r1, #4]
  3187. tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
  3188. 8005540: f023 0370 bic.w r3, r3, #112 ; 0x70
  3189. tmpcr1 |= Structure->CounterMode;
  3190. 8005544: 4313 orrs r3, r2
  3191. }
  3192. if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
  3193. 8005546: 4a17 ldr r2, [pc, #92] ; (80055a4 <TIM_Base_SetConfig+0x94>)
  3194. 8005548: 4290 cmp r0, r2
  3195. 800554a: d012 beq.n 8005572 <TIM_Base_SetConfig+0x62>
  3196. 800554c: f502 6200 add.w r2, r2, #2048 ; 0x800
  3197. 8005550: 4290 cmp r0, r2
  3198. 8005552: d00e beq.n 8005572 <TIM_Base_SetConfig+0x62>
  3199. 8005554: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000
  3200. 8005558: d00b beq.n 8005572 <TIM_Base_SetConfig+0x62>
  3201. 800555a: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000
  3202. 800555e: 4290 cmp r0, r2
  3203. 8005560: d007 beq.n 8005572 <TIM_Base_SetConfig+0x62>
  3204. 8005562: f502 6280 add.w r2, r2, #1024 ; 0x400
  3205. 8005566: 4290 cmp r0, r2
  3206. 8005568: d003 beq.n 8005572 <TIM_Base_SetConfig+0x62>
  3207. 800556a: f502 6280 add.w r2, r2, #1024 ; 0x400
  3208. 800556e: 4290 cmp r0, r2
  3209. 8005570: d103 bne.n 800557a <TIM_Base_SetConfig+0x6a>
  3210. {
  3211. /* Set the clock division */
  3212. tmpcr1 &= ~TIM_CR1_CKD;
  3213. tmpcr1 |= (uint32_t)Structure->ClockDivision;
  3214. 8005572: 68ca ldr r2, [r1, #12]
  3215. tmpcr1 &= ~TIM_CR1_CKD;
  3216. 8005574: f423 7340 bic.w r3, r3, #768 ; 0x300
  3217. tmpcr1 |= (uint32_t)Structure->ClockDivision;
  3218. 8005578: 4313 orrs r3, r2
  3219. }
  3220. /* Set the auto-reload preload */
  3221. tmpcr1 &= ~TIM_CR1_ARPE;
  3222. tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
  3223. 800557a: 694a ldr r2, [r1, #20]
  3224. tmpcr1 &= ~TIM_CR1_ARPE;
  3225. 800557c: f023 0380 bic.w r3, r3, #128 ; 0x80
  3226. tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
  3227. 8005580: 4313 orrs r3, r2
  3228. TIMx->CR1 = tmpcr1;
  3229. 8005582: 6003 str r3, [r0, #0]
  3230. /* Set the Autoreload value */
  3231. TIMx->ARR = (uint32_t)Structure->Period ;
  3232. 8005584: 688b ldr r3, [r1, #8]
  3233. 8005586: 62c3 str r3, [r0, #44] ; 0x2c
  3234. /* Set the Prescaler value */
  3235. TIMx->PSC = (uint32_t)Structure->Prescaler;
  3236. 8005588: 680b ldr r3, [r1, #0]
  3237. 800558a: 6283 str r3, [r0, #40] ; 0x28
  3238. if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
  3239. 800558c: 4b05 ldr r3, [pc, #20] ; (80055a4 <TIM_Base_SetConfig+0x94>)
  3240. 800558e: 4298 cmp r0, r3
  3241. 8005590: d003 beq.n 800559a <TIM_Base_SetConfig+0x8a>
  3242. 8005592: f503 6300 add.w r3, r3, #2048 ; 0x800
  3243. 8005596: 4298 cmp r0, r3
  3244. 8005598: d101 bne.n 800559e <TIM_Base_SetConfig+0x8e>
  3245. {
  3246. /* Set the Repetition Counter value */
  3247. TIMx->RCR = Structure->RepetitionCounter;
  3248. 800559a: 690b ldr r3, [r1, #16]
  3249. 800559c: 6303 str r3, [r0, #48] ; 0x30
  3250. }
  3251. /* Generate an update event to reload the Prescaler
  3252. and the repetition counter(only for TIM1 and TIM8) value immediatly */
  3253. TIMx->EGR = TIM_EGR_UG;
  3254. 800559e: 2301 movs r3, #1
  3255. 80055a0: 6143 str r3, [r0, #20]
  3256. 80055a2: 4770 bx lr
  3257. 80055a4: 40012c00 .word 0x40012c00
  3258. 080055a8 <HAL_TIM_Base_Init>:
  3259. {
  3260. 80055a8: b510 push {r4, lr}
  3261. if(htim == NULL)
  3262. 80055aa: 4604 mov r4, r0
  3263. 80055ac: b1a0 cbz r0, 80055d8 <HAL_TIM_Base_Init+0x30>
  3264. if(htim->State == HAL_TIM_STATE_RESET)
  3265. 80055ae: f890 303d ldrb.w r3, [r0, #61] ; 0x3d
  3266. 80055b2: f003 02ff and.w r2, r3, #255 ; 0xff
  3267. 80055b6: b91b cbnz r3, 80055c0 <HAL_TIM_Base_Init+0x18>
  3268. htim->Lock = HAL_UNLOCKED;
  3269. 80055b8: f880 203c strb.w r2, [r0, #60] ; 0x3c
  3270. HAL_TIM_Base_MspInit(htim);
  3271. 80055bc: f001 ff76 bl 80074ac <HAL_TIM_Base_MspInit>
  3272. htim->State= HAL_TIM_STATE_BUSY;
  3273. 80055c0: 2302 movs r3, #2
  3274. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  3275. 80055c2: 6820 ldr r0, [r4, #0]
  3276. htim->State= HAL_TIM_STATE_BUSY;
  3277. 80055c4: f884 303d strb.w r3, [r4, #61] ; 0x3d
  3278. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  3279. 80055c8: 1d21 adds r1, r4, #4
  3280. 80055ca: f7ff ffa1 bl 8005510 <TIM_Base_SetConfig>
  3281. htim->State= HAL_TIM_STATE_READY;
  3282. 80055ce: 2301 movs r3, #1
  3283. return HAL_OK;
  3284. 80055d0: 2000 movs r0, #0
  3285. htim->State= HAL_TIM_STATE_READY;
  3286. 80055d2: f884 303d strb.w r3, [r4, #61] ; 0x3d
  3287. return HAL_OK;
  3288. 80055d6: bd10 pop {r4, pc}
  3289. return HAL_ERROR;
  3290. 80055d8: 2001 movs r0, #1
  3291. }
  3292. 80055da: bd10 pop {r4, pc}
  3293. 080055dc <HAL_TIMEx_MasterConfigSynchronization>:
  3294. /* Check the parameters */
  3295. assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  3296. assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  3297. assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  3298. __HAL_LOCK(htim);
  3299. 80055dc: f890 303c ldrb.w r3, [r0, #60] ; 0x3c
  3300. {
  3301. 80055e0: b510 push {r4, lr}
  3302. __HAL_LOCK(htim);
  3303. 80055e2: 2b01 cmp r3, #1
  3304. 80055e4: f04f 0302 mov.w r3, #2
  3305. 80055e8: d018 beq.n 800561c <HAL_TIMEx_MasterConfigSynchronization+0x40>
  3306. htim->State = HAL_TIM_STATE_BUSY;
  3307. 80055ea: f880 303d strb.w r3, [r0, #61] ; 0x3d
  3308. /* Reset the MMS Bits */
  3309. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  3310. 80055ee: 6803 ldr r3, [r0, #0]
  3311. /* Select the TRGO source */
  3312. htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
  3313. 80055f0: 680c ldr r4, [r1, #0]
  3314. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  3315. 80055f2: 685a ldr r2, [r3, #4]
  3316. /* Reset the MSM Bit */
  3317. htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  3318. /* Set or Reset the MSM Bit */
  3319. htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
  3320. 80055f4: 6849 ldr r1, [r1, #4]
  3321. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  3322. 80055f6: f022 0270 bic.w r2, r2, #112 ; 0x70
  3323. 80055fa: 605a str r2, [r3, #4]
  3324. htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
  3325. 80055fc: 685a ldr r2, [r3, #4]
  3326. 80055fe: 4322 orrs r2, r4
  3327. 8005600: 605a str r2, [r3, #4]
  3328. htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  3329. 8005602: 689a ldr r2, [r3, #8]
  3330. 8005604: f022 0280 bic.w r2, r2, #128 ; 0x80
  3331. 8005608: 609a str r2, [r3, #8]
  3332. htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
  3333. 800560a: 689a ldr r2, [r3, #8]
  3334. 800560c: 430a orrs r2, r1
  3335. 800560e: 609a str r2, [r3, #8]
  3336. htim->State = HAL_TIM_STATE_READY;
  3337. 8005610: 2301 movs r3, #1
  3338. 8005612: f880 303d strb.w r3, [r0, #61] ; 0x3d
  3339. __HAL_UNLOCK(htim);
  3340. 8005616: 2300 movs r3, #0
  3341. 8005618: f880 303c strb.w r3, [r0, #60] ; 0x3c
  3342. __HAL_LOCK(htim);
  3343. 800561c: 4618 mov r0, r3
  3344. return HAL_OK;
  3345. }
  3346. 800561e: bd10 pop {r4, pc}
  3347. 08005620 <HAL_TIMEx_CommutationCallback>:
  3348. 8005620: 4770 bx lr
  3349. 08005622 <HAL_TIMEx_BreakCallback>:
  3350. * @brief Hall Break detection callback in non blocking mode
  3351. * @param htim : TIM handle
  3352. * @retval None
  3353. */
  3354. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  3355. {
  3356. 8005622: 4770 bx lr
  3357. 08005624 <UART_EndRxTransfer>:
  3358. * @retval None
  3359. */
  3360. static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
  3361. {
  3362. /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  3363. CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
  3364. 8005624: 6803 ldr r3, [r0, #0]
  3365. 8005626: 68da ldr r2, [r3, #12]
  3366. 8005628: f422 7290 bic.w r2, r2, #288 ; 0x120
  3367. 800562c: 60da str r2, [r3, #12]
  3368. CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
  3369. 800562e: 695a ldr r2, [r3, #20]
  3370. 8005630: f022 0201 bic.w r2, r2, #1
  3371. 8005634: 615a str r2, [r3, #20]
  3372. /* At end of Rx process, restore huart->RxState to Ready */
  3373. huart->RxState = HAL_UART_STATE_READY;
  3374. 8005636: 2320 movs r3, #32
  3375. 8005638: f880 303a strb.w r3, [r0, #58] ; 0x3a
  3376. 800563c: 4770 bx lr
  3377. ...
  3378. 08005640 <UART_SetConfig>:
  3379. * @param huart: pointer to a UART_HandleTypeDef structure that contains
  3380. * the configuration information for the specified UART module.
  3381. * @retval None
  3382. */
  3383. static void UART_SetConfig(UART_HandleTypeDef *huart)
  3384. {
  3385. 8005640: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  3386. assert_param(IS_UART_MODE(huart->Init.Mode));
  3387. /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  3388. /* Configure the UART Stop Bits: Set STOP[13:12] bits according
  3389. * to huart->Init.StopBits value */
  3390. MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
  3391. 8005644: 6805 ldr r5, [r0, #0]
  3392. 8005646: 68c2 ldr r2, [r0, #12]
  3393. 8005648: 692b ldr r3, [r5, #16]
  3394. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  3395. MODIFY_REG(huart->Instance->CR1,
  3396. (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
  3397. tmpreg);
  3398. #else
  3399. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
  3400. 800564a: 6901 ldr r1, [r0, #16]
  3401. MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
  3402. 800564c: f423 5340 bic.w r3, r3, #12288 ; 0x3000
  3403. 8005650: 4313 orrs r3, r2
  3404. 8005652: 612b str r3, [r5, #16]
  3405. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
  3406. 8005654: 6883 ldr r3, [r0, #8]
  3407. MODIFY_REG(huart->Instance->CR1,
  3408. 8005656: 68ea ldr r2, [r5, #12]
  3409. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
  3410. 8005658: 430b orrs r3, r1
  3411. 800565a: 6941 ldr r1, [r0, #20]
  3412. MODIFY_REG(huart->Instance->CR1,
  3413. 800565c: f422 52b0 bic.w r2, r2, #5632 ; 0x1600
  3414. 8005660: f022 020c bic.w r2, r2, #12
  3415. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
  3416. 8005664: 430b orrs r3, r1
  3417. MODIFY_REG(huart->Instance->CR1,
  3418. 8005666: 4313 orrs r3, r2
  3419. 8005668: 60eb str r3, [r5, #12]
  3420. tmpreg);
  3421. #endif /* USART_CR1_OVER8 */
  3422. /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  3423. /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  3424. MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
  3425. 800566a: 696b ldr r3, [r5, #20]
  3426. 800566c: 6982 ldr r2, [r0, #24]
  3427. 800566e: f423 7340 bic.w r3, r3, #768 ; 0x300
  3428. 8005672: 4313 orrs r3, r2
  3429. 8005674: 616b str r3, [r5, #20]
  3430. huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
  3431. }
  3432. }
  3433. #else
  3434. /*-------------------------- USART BRR Configuration ---------------------*/
  3435. if(huart->Instance == USART1)
  3436. 8005676: 4b40 ldr r3, [pc, #256] ; (8005778 <UART_SetConfig+0x138>)
  3437. {
  3438. 8005678: 4681 mov r9, r0
  3439. if(huart->Instance == USART1)
  3440. 800567a: 429d cmp r5, r3
  3441. 800567c: f04f 0419 mov.w r4, #25
  3442. 8005680: d146 bne.n 8005710 <UART_SetConfig+0xd0>
  3443. {
  3444. huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
  3445. 8005682: f7ff fe83 bl 800538c <HAL_RCC_GetPCLK2Freq>
  3446. 8005686: fb04 f300 mul.w r3, r4, r0
  3447. 800568a: f8d9 6004 ldr.w r6, [r9, #4]
  3448. 800568e: f04f 0864 mov.w r8, #100 ; 0x64
  3449. 8005692: 00b6 lsls r6, r6, #2
  3450. 8005694: fbb3 f3f6 udiv r3, r3, r6
  3451. 8005698: fbb3 f3f8 udiv r3, r3, r8
  3452. 800569c: 011e lsls r6, r3, #4
  3453. 800569e: f7ff fe75 bl 800538c <HAL_RCC_GetPCLK2Freq>
  3454. 80056a2: 4360 muls r0, r4
  3455. 80056a4: f8d9 3004 ldr.w r3, [r9, #4]
  3456. 80056a8: 009b lsls r3, r3, #2
  3457. 80056aa: fbb0 f7f3 udiv r7, r0, r3
  3458. 80056ae: f7ff fe6d bl 800538c <HAL_RCC_GetPCLK2Freq>
  3459. 80056b2: 4360 muls r0, r4
  3460. 80056b4: f8d9 3004 ldr.w r3, [r9, #4]
  3461. 80056b8: 009b lsls r3, r3, #2
  3462. 80056ba: fbb0 f3f3 udiv r3, r0, r3
  3463. 80056be: fbb3 f3f8 udiv r3, r3, r8
  3464. 80056c2: fb08 7313 mls r3, r8, r3, r7
  3465. 80056c6: 011b lsls r3, r3, #4
  3466. 80056c8: 3332 adds r3, #50 ; 0x32
  3467. 80056ca: fbb3 f3f8 udiv r3, r3, r8
  3468. 80056ce: f003 07f0 and.w r7, r3, #240 ; 0xf0
  3469. 80056d2: f7ff fe5b bl 800538c <HAL_RCC_GetPCLK2Freq>
  3470. 80056d6: 4360 muls r0, r4
  3471. 80056d8: f8d9 2004 ldr.w r2, [r9, #4]
  3472. 80056dc: 0092 lsls r2, r2, #2
  3473. 80056de: fbb0 faf2 udiv sl, r0, r2
  3474. 80056e2: f7ff fe53 bl 800538c <HAL_RCC_GetPCLK2Freq>
  3475. }
  3476. else
  3477. {
  3478. huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
  3479. 80056e6: 4360 muls r0, r4
  3480. 80056e8: f8d9 3004 ldr.w r3, [r9, #4]
  3481. 80056ec: 009b lsls r3, r3, #2
  3482. 80056ee: fbb0 f3f3 udiv r3, r0, r3
  3483. 80056f2: fbb3 f3f8 udiv r3, r3, r8
  3484. 80056f6: fb08 a313 mls r3, r8, r3, sl
  3485. 80056fa: 011b lsls r3, r3, #4
  3486. 80056fc: 3332 adds r3, #50 ; 0x32
  3487. 80056fe: fbb3 f3f8 udiv r3, r3, r8
  3488. 8005702: f003 030f and.w r3, r3, #15
  3489. 8005706: 433b orrs r3, r7
  3490. 8005708: 4433 add r3, r6
  3491. 800570a: 60ab str r3, [r5, #8]
  3492. 800570c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  3493. 8005710: f7ff fe2c bl 800536c <HAL_RCC_GetPCLK1Freq>
  3494. 8005714: fb04 f300 mul.w r3, r4, r0
  3495. 8005718: f8d9 6004 ldr.w r6, [r9, #4]
  3496. 800571c: f04f 0864 mov.w r8, #100 ; 0x64
  3497. 8005720: 00b6 lsls r6, r6, #2
  3498. 8005722: fbb3 f3f6 udiv r3, r3, r6
  3499. 8005726: fbb3 f3f8 udiv r3, r3, r8
  3500. 800572a: 011e lsls r6, r3, #4
  3501. 800572c: f7ff fe1e bl 800536c <HAL_RCC_GetPCLK1Freq>
  3502. 8005730: 4360 muls r0, r4
  3503. 8005732: f8d9 3004 ldr.w r3, [r9, #4]
  3504. 8005736: 009b lsls r3, r3, #2
  3505. 8005738: fbb0 f7f3 udiv r7, r0, r3
  3506. 800573c: f7ff fe16 bl 800536c <HAL_RCC_GetPCLK1Freq>
  3507. 8005740: 4360 muls r0, r4
  3508. 8005742: f8d9 3004 ldr.w r3, [r9, #4]
  3509. 8005746: 009b lsls r3, r3, #2
  3510. 8005748: fbb0 f3f3 udiv r3, r0, r3
  3511. 800574c: fbb3 f3f8 udiv r3, r3, r8
  3512. 8005750: fb08 7313 mls r3, r8, r3, r7
  3513. 8005754: 011b lsls r3, r3, #4
  3514. 8005756: 3332 adds r3, #50 ; 0x32
  3515. 8005758: fbb3 f3f8 udiv r3, r3, r8
  3516. 800575c: f003 07f0 and.w r7, r3, #240 ; 0xf0
  3517. 8005760: f7ff fe04 bl 800536c <HAL_RCC_GetPCLK1Freq>
  3518. 8005764: 4360 muls r0, r4
  3519. 8005766: f8d9 2004 ldr.w r2, [r9, #4]
  3520. 800576a: 0092 lsls r2, r2, #2
  3521. 800576c: fbb0 faf2 udiv sl, r0, r2
  3522. 8005770: f7ff fdfc bl 800536c <HAL_RCC_GetPCLK1Freq>
  3523. 8005774: e7b7 b.n 80056e6 <UART_SetConfig+0xa6>
  3524. 8005776: bf00 nop
  3525. 8005778: 40013800 .word 0x40013800
  3526. 0800577c <UART_WaitOnFlagUntilTimeout.constprop.3>:
  3527. static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
  3528. 800577c: b5f8 push {r3, r4, r5, r6, r7, lr}
  3529. 800577e: 4604 mov r4, r0
  3530. 8005780: 460e mov r6, r1
  3531. 8005782: 4617 mov r7, r2
  3532. 8005784: 461d mov r5, r3
  3533. while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
  3534. 8005786: 6821 ldr r1, [r4, #0]
  3535. 8005788: 680b ldr r3, [r1, #0]
  3536. 800578a: ea36 0303 bics.w r3, r6, r3
  3537. 800578e: d101 bne.n 8005794 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  3538. return HAL_OK;
  3539. 8005790: 2000 movs r0, #0
  3540. }
  3541. 8005792: bdf8 pop {r3, r4, r5, r6, r7, pc}
  3542. if(Timeout != HAL_MAX_DELAY)
  3543. 8005794: 1c6b adds r3, r5, #1
  3544. 8005796: d0f7 beq.n 8005788 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
  3545. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  3546. 8005798: b995 cbnz r5, 80057c0 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
  3547. CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
  3548. 800579a: 6823 ldr r3, [r4, #0]
  3549. __HAL_UNLOCK(huart);
  3550. 800579c: 2003 movs r0, #3
  3551. CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
  3552. 800579e: 68da ldr r2, [r3, #12]
  3553. 80057a0: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
  3554. 80057a4: 60da str r2, [r3, #12]
  3555. CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
  3556. 80057a6: 695a ldr r2, [r3, #20]
  3557. 80057a8: f022 0201 bic.w r2, r2, #1
  3558. 80057ac: 615a str r2, [r3, #20]
  3559. huart->gState = HAL_UART_STATE_READY;
  3560. 80057ae: 2320 movs r3, #32
  3561. 80057b0: f884 3039 strb.w r3, [r4, #57] ; 0x39
  3562. huart->RxState = HAL_UART_STATE_READY;
  3563. 80057b4: f884 303a strb.w r3, [r4, #58] ; 0x3a
  3564. __HAL_UNLOCK(huart);
  3565. 80057b8: 2300 movs r3, #0
  3566. 80057ba: f884 3038 strb.w r3, [r4, #56] ; 0x38
  3567. 80057be: bdf8 pop {r3, r4, r5, r6, r7, pc}
  3568. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  3569. 80057c0: f7fe fd72 bl 80042a8 <HAL_GetTick>
  3570. 80057c4: 1bc0 subs r0, r0, r7
  3571. 80057c6: 4285 cmp r5, r0
  3572. 80057c8: d2dd bcs.n 8005786 <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
  3573. 80057ca: e7e6 b.n 800579a <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>
  3574. 080057cc <HAL_UART_Init>:
  3575. {
  3576. 80057cc: b510 push {r4, lr}
  3577. if(huart == NULL)
  3578. 80057ce: 4604 mov r4, r0
  3579. 80057d0: b340 cbz r0, 8005824 <HAL_UART_Init+0x58>
  3580. if(huart->gState == HAL_UART_STATE_RESET)
  3581. 80057d2: f890 3039 ldrb.w r3, [r0, #57] ; 0x39
  3582. 80057d6: f003 02ff and.w r2, r3, #255 ; 0xff
  3583. 80057da: b91b cbnz r3, 80057e4 <HAL_UART_Init+0x18>
  3584. huart->Lock = HAL_UNLOCKED;
  3585. 80057dc: f880 2038 strb.w r2, [r0, #56] ; 0x38
  3586. HAL_UART_MspInit(huart);
  3587. 80057e0: f001 fe78 bl 80074d4 <HAL_UART_MspInit>
  3588. huart->gState = HAL_UART_STATE_BUSY;
  3589. 80057e4: 2324 movs r3, #36 ; 0x24
  3590. __HAL_UART_DISABLE(huart);
  3591. 80057e6: 6822 ldr r2, [r4, #0]
  3592. huart->gState = HAL_UART_STATE_BUSY;
  3593. 80057e8: f884 3039 strb.w r3, [r4, #57] ; 0x39
  3594. __HAL_UART_DISABLE(huart);
  3595. 80057ec: 68d3 ldr r3, [r2, #12]
  3596. UART_SetConfig(huart);
  3597. 80057ee: 4620 mov r0, r4
  3598. __HAL_UART_DISABLE(huart);
  3599. 80057f0: f423 5300 bic.w r3, r3, #8192 ; 0x2000
  3600. 80057f4: 60d3 str r3, [r2, #12]
  3601. UART_SetConfig(huart);
  3602. 80057f6: f7ff ff23 bl 8005640 <UART_SetConfig>
  3603. CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
  3604. 80057fa: 6823 ldr r3, [r4, #0]
  3605. huart->ErrorCode = HAL_UART_ERROR_NONE;
  3606. 80057fc: 2000 movs r0, #0
  3607. CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
  3608. 80057fe: 691a ldr r2, [r3, #16]
  3609. 8005800: f422 4290 bic.w r2, r2, #18432 ; 0x4800
  3610. 8005804: 611a str r2, [r3, #16]
  3611. CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
  3612. 8005806: 695a ldr r2, [r3, #20]
  3613. 8005808: f022 022a bic.w r2, r2, #42 ; 0x2a
  3614. 800580c: 615a str r2, [r3, #20]
  3615. __HAL_UART_ENABLE(huart);
  3616. 800580e: 68da ldr r2, [r3, #12]
  3617. 8005810: f442 5200 orr.w r2, r2, #8192 ; 0x2000
  3618. 8005814: 60da str r2, [r3, #12]
  3619. huart->gState= HAL_UART_STATE_READY;
  3620. 8005816: 2320 movs r3, #32
  3621. huart->ErrorCode = HAL_UART_ERROR_NONE;
  3622. 8005818: 63e0 str r0, [r4, #60] ; 0x3c
  3623. huart->gState= HAL_UART_STATE_READY;
  3624. 800581a: f884 3039 strb.w r3, [r4, #57] ; 0x39
  3625. huart->RxState= HAL_UART_STATE_READY;
  3626. 800581e: f884 303a strb.w r3, [r4, #58] ; 0x3a
  3627. return HAL_OK;
  3628. 8005822: bd10 pop {r4, pc}
  3629. return HAL_ERROR;
  3630. 8005824: 2001 movs r0, #1
  3631. }
  3632. 8005826: bd10 pop {r4, pc}
  3633. 08005828 <HAL_UART_Transmit>:
  3634. {
  3635. 8005828: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  3636. 800582c: 461f mov r7, r3
  3637. if(huart->gState == HAL_UART_STATE_READY)
  3638. 800582e: f890 3039 ldrb.w r3, [r0, #57] ; 0x39
  3639. {
  3640. 8005832: 4604 mov r4, r0
  3641. if(huart->gState == HAL_UART_STATE_READY)
  3642. 8005834: 2b20 cmp r3, #32
  3643. {
  3644. 8005836: 460d mov r5, r1
  3645. 8005838: 4690 mov r8, r2
  3646. if(huart->gState == HAL_UART_STATE_READY)
  3647. 800583a: d14e bne.n 80058da <HAL_UART_Transmit+0xb2>
  3648. if((pData == NULL) || (Size == 0U))
  3649. 800583c: 2900 cmp r1, #0
  3650. 800583e: d049 beq.n 80058d4 <HAL_UART_Transmit+0xac>
  3651. 8005840: 2a00 cmp r2, #0
  3652. 8005842: d047 beq.n 80058d4 <HAL_UART_Transmit+0xac>
  3653. __HAL_LOCK(huart);
  3654. 8005844: f890 3038 ldrb.w r3, [r0, #56] ; 0x38
  3655. 8005848: 2b01 cmp r3, #1
  3656. 800584a: d046 beq.n 80058da <HAL_UART_Transmit+0xb2>
  3657. 800584c: 2301 movs r3, #1
  3658. 800584e: f880 3038 strb.w r3, [r0, #56] ; 0x38
  3659. huart->ErrorCode = HAL_UART_ERROR_NONE;
  3660. 8005852: 2300 movs r3, #0
  3661. 8005854: 63c3 str r3, [r0, #60] ; 0x3c
  3662. huart->gState = HAL_UART_STATE_BUSY_TX;
  3663. 8005856: 2321 movs r3, #33 ; 0x21
  3664. 8005858: f880 3039 strb.w r3, [r0, #57] ; 0x39
  3665. tickstart = HAL_GetTick();
  3666. 800585c: f7fe fd24 bl 80042a8 <HAL_GetTick>
  3667. 8005860: 4606 mov r6, r0
  3668. huart->TxXferSize = Size;
  3669. 8005862: f8a4 8024 strh.w r8, [r4, #36] ; 0x24
  3670. huart->TxXferCount = Size;
  3671. 8005866: f8a4 8026 strh.w r8, [r4, #38] ; 0x26
  3672. while(huart->TxXferCount > 0U)
  3673. 800586a: 8ce3 ldrh r3, [r4, #38] ; 0x26
  3674. 800586c: b29b uxth r3, r3
  3675. 800586e: b96b cbnz r3, 800588c <HAL_UART_Transmit+0x64>
  3676. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
  3677. 8005870: 463b mov r3, r7
  3678. 8005872: 4632 mov r2, r6
  3679. 8005874: 2140 movs r1, #64 ; 0x40
  3680. 8005876: 4620 mov r0, r4
  3681. 8005878: f7ff ff80 bl 800577c <UART_WaitOnFlagUntilTimeout.constprop.3>
  3682. 800587c: b9a8 cbnz r0, 80058aa <HAL_UART_Transmit+0x82>
  3683. huart->gState = HAL_UART_STATE_READY;
  3684. 800587e: 2320 movs r3, #32
  3685. __HAL_UNLOCK(huart);
  3686. 8005880: f884 0038 strb.w r0, [r4, #56] ; 0x38
  3687. huart->gState = HAL_UART_STATE_READY;
  3688. 8005884: f884 3039 strb.w r3, [r4, #57] ; 0x39
  3689. return HAL_OK;
  3690. 8005888: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  3691. huart->TxXferCount--;
  3692. 800588c: 8ce3 ldrh r3, [r4, #38] ; 0x26
  3693. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  3694. 800588e: 4632 mov r2, r6
  3695. huart->TxXferCount--;
  3696. 8005890: 3b01 subs r3, #1
  3697. 8005892: b29b uxth r3, r3
  3698. 8005894: 84e3 strh r3, [r4, #38] ; 0x26
  3699. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  3700. 8005896: 68a3 ldr r3, [r4, #8]
  3701. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  3702. 8005898: 2180 movs r1, #128 ; 0x80
  3703. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  3704. 800589a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
  3705. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  3706. 800589e: 4620 mov r0, r4
  3707. 80058a0: 463b mov r3, r7
  3708. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  3709. 80058a2: d10e bne.n 80058c2 <HAL_UART_Transmit+0x9a>
  3710. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  3711. 80058a4: f7ff ff6a bl 800577c <UART_WaitOnFlagUntilTimeout.constprop.3>
  3712. 80058a8: b110 cbz r0, 80058b0 <HAL_UART_Transmit+0x88>
  3713. return HAL_TIMEOUT;
  3714. 80058aa: 2003 movs r0, #3
  3715. 80058ac: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  3716. huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
  3717. 80058b0: 882b ldrh r3, [r5, #0]
  3718. 80058b2: 6822 ldr r2, [r4, #0]
  3719. 80058b4: f3c3 0308 ubfx r3, r3, #0, #9
  3720. 80058b8: 6053 str r3, [r2, #4]
  3721. if(huart->Init.Parity == UART_PARITY_NONE)
  3722. 80058ba: 6923 ldr r3, [r4, #16]
  3723. 80058bc: b943 cbnz r3, 80058d0 <HAL_UART_Transmit+0xa8>
  3724. pData +=2U;
  3725. 80058be: 3502 adds r5, #2
  3726. 80058c0: e7d3 b.n 800586a <HAL_UART_Transmit+0x42>
  3727. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  3728. 80058c2: f7ff ff5b bl 800577c <UART_WaitOnFlagUntilTimeout.constprop.3>
  3729. 80058c6: 2800 cmp r0, #0
  3730. 80058c8: d1ef bne.n 80058aa <HAL_UART_Transmit+0x82>
  3731. huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
  3732. 80058ca: 6823 ldr r3, [r4, #0]
  3733. 80058cc: 782a ldrb r2, [r5, #0]
  3734. 80058ce: 605a str r2, [r3, #4]
  3735. 80058d0: 3501 adds r5, #1
  3736. 80058d2: e7ca b.n 800586a <HAL_UART_Transmit+0x42>
  3737. return HAL_ERROR;
  3738. 80058d4: 2001 movs r0, #1
  3739. 80058d6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  3740. return HAL_BUSY;
  3741. 80058da: 2002 movs r0, #2
  3742. }
  3743. 80058dc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  3744. 080058e0 <HAL_UART_Receive_IT>:
  3745. if(huart->RxState == HAL_UART_STATE_READY)
  3746. 80058e0: f890 303a ldrb.w r3, [r0, #58] ; 0x3a
  3747. 80058e4: 2b20 cmp r3, #32
  3748. 80058e6: d120 bne.n 800592a <HAL_UART_Receive_IT+0x4a>
  3749. if((pData == NULL) || (Size == 0U))
  3750. 80058e8: b1e9 cbz r1, 8005926 <HAL_UART_Receive_IT+0x46>
  3751. 80058ea: b1e2 cbz r2, 8005926 <HAL_UART_Receive_IT+0x46>
  3752. __HAL_LOCK(huart);
  3753. 80058ec: f890 3038 ldrb.w r3, [r0, #56] ; 0x38
  3754. 80058f0: 2b01 cmp r3, #1
  3755. 80058f2: d01a beq.n 800592a <HAL_UART_Receive_IT+0x4a>
  3756. huart->RxXferCount = Size;
  3757. 80058f4: 85c2 strh r2, [r0, #46] ; 0x2e
  3758. huart->RxXferSize = Size;
  3759. 80058f6: 8582 strh r2, [r0, #44] ; 0x2c
  3760. huart->ErrorCode = HAL_UART_ERROR_NONE;
  3761. 80058f8: 2300 movs r3, #0
  3762. huart->RxState = HAL_UART_STATE_BUSY_RX;
  3763. 80058fa: 2222 movs r2, #34 ; 0x22
  3764. huart->ErrorCode = HAL_UART_ERROR_NONE;
  3765. 80058fc: 63c3 str r3, [r0, #60] ; 0x3c
  3766. huart->RxState = HAL_UART_STATE_BUSY_RX;
  3767. 80058fe: f880 203a strb.w r2, [r0, #58] ; 0x3a
  3768. __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
  3769. 8005902: 6802 ldr r2, [r0, #0]
  3770. huart->pRxBuffPtr = pData;
  3771. 8005904: 6281 str r1, [r0, #40] ; 0x28
  3772. __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
  3773. 8005906: 68d1 ldr r1, [r2, #12]
  3774. __HAL_UNLOCK(huart);
  3775. 8005908: f880 3038 strb.w r3, [r0, #56] ; 0x38
  3776. __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
  3777. 800590c: f441 7180 orr.w r1, r1, #256 ; 0x100
  3778. 8005910: 60d1 str r1, [r2, #12]
  3779. __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
  3780. 8005912: 6951 ldr r1, [r2, #20]
  3781. return HAL_OK;
  3782. 8005914: 4618 mov r0, r3
  3783. __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
  3784. 8005916: f041 0101 orr.w r1, r1, #1
  3785. 800591a: 6151 str r1, [r2, #20]
  3786. __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
  3787. 800591c: 68d1 ldr r1, [r2, #12]
  3788. 800591e: f041 0120 orr.w r1, r1, #32
  3789. 8005922: 60d1 str r1, [r2, #12]
  3790. return HAL_OK;
  3791. 8005924: 4770 bx lr
  3792. return HAL_ERROR;
  3793. 8005926: 2001 movs r0, #1
  3794. 8005928: 4770 bx lr
  3795. return HAL_BUSY;
  3796. 800592a: 2002 movs r0, #2
  3797. }
  3798. 800592c: 4770 bx lr
  3799. 0800592e <HAL_UART_TxCpltCallback>:
  3800. 800592e: 4770 bx lr
  3801. 08005930 <UART_Receive_IT>:
  3802. if(huart->RxState == HAL_UART_STATE_BUSY_RX)
  3803. 8005930: f890 303a ldrb.w r3, [r0, #58] ; 0x3a
  3804. {
  3805. 8005934: b510 push {r4, lr}
  3806. if(huart->RxState == HAL_UART_STATE_BUSY_RX)
  3807. 8005936: 2b22 cmp r3, #34 ; 0x22
  3808. 8005938: d136 bne.n 80059a8 <UART_Receive_IT+0x78>
  3809. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  3810. 800593a: 6883 ldr r3, [r0, #8]
  3811. 800593c: 6901 ldr r1, [r0, #16]
  3812. 800593e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
  3813. 8005942: 6802 ldr r2, [r0, #0]
  3814. 8005944: 6a83 ldr r3, [r0, #40] ; 0x28
  3815. 8005946: d123 bne.n 8005990 <UART_Receive_IT+0x60>
  3816. *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
  3817. 8005948: 6852 ldr r2, [r2, #4]
  3818. if(huart->Init.Parity == UART_PARITY_NONE)
  3819. 800594a: b9e9 cbnz r1, 8005988 <UART_Receive_IT+0x58>
  3820. *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
  3821. 800594c: f3c2 0208 ubfx r2, r2, #0, #9
  3822. 8005950: f823 2b02 strh.w r2, [r3], #2
  3823. huart->pRxBuffPtr += 1U;
  3824. 8005954: 6283 str r3, [r0, #40] ; 0x28
  3825. if(--huart->RxXferCount == 0U)
  3826. 8005956: 8dc4 ldrh r4, [r0, #46] ; 0x2e
  3827. 8005958: 3c01 subs r4, #1
  3828. 800595a: b2a4 uxth r4, r4
  3829. 800595c: 85c4 strh r4, [r0, #46] ; 0x2e
  3830. 800595e: b98c cbnz r4, 8005984 <UART_Receive_IT+0x54>
  3831. __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
  3832. 8005960: 6803 ldr r3, [r0, #0]
  3833. 8005962: 68da ldr r2, [r3, #12]
  3834. 8005964: f022 0220 bic.w r2, r2, #32
  3835. 8005968: 60da str r2, [r3, #12]
  3836. __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
  3837. 800596a: 68da ldr r2, [r3, #12]
  3838. 800596c: f422 7280 bic.w r2, r2, #256 ; 0x100
  3839. 8005970: 60da str r2, [r3, #12]
  3840. __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
  3841. 8005972: 695a ldr r2, [r3, #20]
  3842. 8005974: f022 0201 bic.w r2, r2, #1
  3843. 8005978: 615a str r2, [r3, #20]
  3844. huart->RxState = HAL_UART_STATE_READY;
  3845. 800597a: 2320 movs r3, #32
  3846. 800597c: f880 303a strb.w r3, [r0, #58] ; 0x3a
  3847. HAL_UART_RxCpltCallback(huart);
  3848. 8005980: f001 f802 bl 8006988 <HAL_UART_RxCpltCallback>
  3849. if(--huart->RxXferCount == 0U)
  3850. 8005984: 2000 movs r0, #0
  3851. }
  3852. 8005986: bd10 pop {r4, pc}
  3853. *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
  3854. 8005988: b2d2 uxtb r2, r2
  3855. 800598a: f823 2b01 strh.w r2, [r3], #1
  3856. 800598e: e7e1 b.n 8005954 <UART_Receive_IT+0x24>
  3857. if(huart->Init.Parity == UART_PARITY_NONE)
  3858. 8005990: b921 cbnz r1, 800599c <UART_Receive_IT+0x6c>
  3859. *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
  3860. 8005992: 1c59 adds r1, r3, #1
  3861. 8005994: 6852 ldr r2, [r2, #4]
  3862. 8005996: 6281 str r1, [r0, #40] ; 0x28
  3863. *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
  3864. 8005998: 701a strb r2, [r3, #0]
  3865. 800599a: e7dc b.n 8005956 <UART_Receive_IT+0x26>
  3866. 800599c: 6852 ldr r2, [r2, #4]
  3867. 800599e: 1c59 adds r1, r3, #1
  3868. 80059a0: 6281 str r1, [r0, #40] ; 0x28
  3869. 80059a2: f002 027f and.w r2, r2, #127 ; 0x7f
  3870. 80059a6: e7f7 b.n 8005998 <UART_Receive_IT+0x68>
  3871. return HAL_BUSY;
  3872. 80059a8: 2002 movs r0, #2
  3873. 80059aa: bd10 pop {r4, pc}
  3874. 080059ac <HAL_UART_ErrorCallback>:
  3875. 80059ac: 4770 bx lr
  3876. ...
  3877. 080059b0 <HAL_UART_IRQHandler>:
  3878. uint32_t isrflags = READ_REG(huart->Instance->SR);
  3879. 80059b0: 6803 ldr r3, [r0, #0]
  3880. {
  3881. 80059b2: b570 push {r4, r5, r6, lr}
  3882. uint32_t isrflags = READ_REG(huart->Instance->SR);
  3883. 80059b4: 681a ldr r2, [r3, #0]
  3884. {
  3885. 80059b6: 4604 mov r4, r0
  3886. if(errorflags == RESET)
  3887. 80059b8: 0716 lsls r6, r2, #28
  3888. uint32_t cr1its = READ_REG(huart->Instance->CR1);
  3889. 80059ba: 68d9 ldr r1, [r3, #12]
  3890. uint32_t cr3its = READ_REG(huart->Instance->CR3);
  3891. 80059bc: 695d ldr r5, [r3, #20]
  3892. if(errorflags == RESET)
  3893. 80059be: d107 bne.n 80059d0 <HAL_UART_IRQHandler+0x20>
  3894. if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
  3895. 80059c0: 0696 lsls r6, r2, #26
  3896. 80059c2: d55a bpl.n 8005a7a <HAL_UART_IRQHandler+0xca>
  3897. 80059c4: 068d lsls r5, r1, #26
  3898. 80059c6: d558 bpl.n 8005a7a <HAL_UART_IRQHandler+0xca>
  3899. }
  3900. 80059c8: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  3901. UART_Receive_IT(huart);
  3902. 80059cc: f7ff bfb0 b.w 8005930 <UART_Receive_IT>
  3903. if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
  3904. 80059d0: f015 0501 ands.w r5, r5, #1
  3905. 80059d4: d102 bne.n 80059dc <HAL_UART_IRQHandler+0x2c>
  3906. 80059d6: f411 7f90 tst.w r1, #288 ; 0x120
  3907. 80059da: d04e beq.n 8005a7a <HAL_UART_IRQHandler+0xca>
  3908. if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
  3909. 80059dc: 07d3 lsls r3, r2, #31
  3910. 80059de: d505 bpl.n 80059ec <HAL_UART_IRQHandler+0x3c>
  3911. 80059e0: 05ce lsls r6, r1, #23
  3912. huart->ErrorCode |= HAL_UART_ERROR_PE;
  3913. 80059e2: bf42 ittt mi
  3914. 80059e4: 6be3 ldrmi r3, [r4, #60] ; 0x3c
  3915. 80059e6: f043 0301 orrmi.w r3, r3, #1
  3916. 80059ea: 63e3 strmi r3, [r4, #60] ; 0x3c
  3917. if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
  3918. 80059ec: 0750 lsls r0, r2, #29
  3919. 80059ee: d504 bpl.n 80059fa <HAL_UART_IRQHandler+0x4a>
  3920. 80059f0: b11d cbz r5, 80059fa <HAL_UART_IRQHandler+0x4a>
  3921. huart->ErrorCode |= HAL_UART_ERROR_NE;
  3922. 80059f2: 6be3 ldr r3, [r4, #60] ; 0x3c
  3923. 80059f4: f043 0302 orr.w r3, r3, #2
  3924. 80059f8: 63e3 str r3, [r4, #60] ; 0x3c
  3925. if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
  3926. 80059fa: 0793 lsls r3, r2, #30
  3927. 80059fc: d504 bpl.n 8005a08 <HAL_UART_IRQHandler+0x58>
  3928. 80059fe: b11d cbz r5, 8005a08 <HAL_UART_IRQHandler+0x58>
  3929. huart->ErrorCode |= HAL_UART_ERROR_FE;
  3930. 8005a00: 6be3 ldr r3, [r4, #60] ; 0x3c
  3931. 8005a02: f043 0304 orr.w r3, r3, #4
  3932. 8005a06: 63e3 str r3, [r4, #60] ; 0x3c
  3933. if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
  3934. 8005a08: 0716 lsls r6, r2, #28
  3935. 8005a0a: d504 bpl.n 8005a16 <HAL_UART_IRQHandler+0x66>
  3936. 8005a0c: b11d cbz r5, 8005a16 <HAL_UART_IRQHandler+0x66>
  3937. huart->ErrorCode |= HAL_UART_ERROR_ORE;
  3938. 8005a0e: 6be3 ldr r3, [r4, #60] ; 0x3c
  3939. 8005a10: f043 0308 orr.w r3, r3, #8
  3940. 8005a14: 63e3 str r3, [r4, #60] ; 0x3c
  3941. if(huart->ErrorCode != HAL_UART_ERROR_NONE)
  3942. 8005a16: 6be3 ldr r3, [r4, #60] ; 0x3c
  3943. 8005a18: 2b00 cmp r3, #0
  3944. 8005a1a: d066 beq.n 8005aea <HAL_UART_IRQHandler+0x13a>
  3945. if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
  3946. 8005a1c: 0695 lsls r5, r2, #26
  3947. 8005a1e: d504 bpl.n 8005a2a <HAL_UART_IRQHandler+0x7a>
  3948. 8005a20: 0688 lsls r0, r1, #26
  3949. 8005a22: d502 bpl.n 8005a2a <HAL_UART_IRQHandler+0x7a>
  3950. UART_Receive_IT(huart);
  3951. 8005a24: 4620 mov r0, r4
  3952. 8005a26: f7ff ff83 bl 8005930 <UART_Receive_IT>
  3953. dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
  3954. 8005a2a: 6823 ldr r3, [r4, #0]
  3955. UART_EndRxTransfer(huart);
  3956. 8005a2c: 4620 mov r0, r4
  3957. dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
  3958. 8005a2e: 695d ldr r5, [r3, #20]
  3959. if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
  3960. 8005a30: 6be2 ldr r2, [r4, #60] ; 0x3c
  3961. 8005a32: 0711 lsls r1, r2, #28
  3962. 8005a34: d402 bmi.n 8005a3c <HAL_UART_IRQHandler+0x8c>
  3963. 8005a36: f015 0540 ands.w r5, r5, #64 ; 0x40
  3964. 8005a3a: d01a beq.n 8005a72 <HAL_UART_IRQHandler+0xc2>
  3965. UART_EndRxTransfer(huart);
  3966. 8005a3c: f7ff fdf2 bl 8005624 <UART_EndRxTransfer>
  3967. if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
  3968. 8005a40: 6823 ldr r3, [r4, #0]
  3969. 8005a42: 695a ldr r2, [r3, #20]
  3970. 8005a44: 0652 lsls r2, r2, #25
  3971. 8005a46: d510 bpl.n 8005a6a <HAL_UART_IRQHandler+0xba>
  3972. CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
  3973. 8005a48: 695a ldr r2, [r3, #20]
  3974. if(huart->hdmarx != NULL)
  3975. 8005a4a: 6b60 ldr r0, [r4, #52] ; 0x34
  3976. CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
  3977. 8005a4c: f022 0240 bic.w r2, r2, #64 ; 0x40
  3978. 8005a50: 615a str r2, [r3, #20]
  3979. if(huart->hdmarx != NULL)
  3980. 8005a52: b150 cbz r0, 8005a6a <HAL_UART_IRQHandler+0xba>
  3981. huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
  3982. 8005a54: 4b25 ldr r3, [pc, #148] ; (8005aec <HAL_UART_IRQHandler+0x13c>)
  3983. 8005a56: 6343 str r3, [r0, #52] ; 0x34
  3984. if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
  3985. 8005a58: f7fe fca6 bl 80043a8 <HAL_DMA_Abort_IT>
  3986. 8005a5c: 2800 cmp r0, #0
  3987. 8005a5e: d044 beq.n 8005aea <HAL_UART_IRQHandler+0x13a>
  3988. huart->hdmarx->XferAbortCallback(huart->hdmarx);
  3989. 8005a60: 6b60 ldr r0, [r4, #52] ; 0x34
  3990. }
  3991. 8005a62: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  3992. huart->hdmarx->XferAbortCallback(huart->hdmarx);
  3993. 8005a66: 6b43 ldr r3, [r0, #52] ; 0x34
  3994. 8005a68: 4718 bx r3
  3995. HAL_UART_ErrorCallback(huart);
  3996. 8005a6a: 4620 mov r0, r4
  3997. 8005a6c: f7ff ff9e bl 80059ac <HAL_UART_ErrorCallback>
  3998. 8005a70: bd70 pop {r4, r5, r6, pc}
  3999. HAL_UART_ErrorCallback(huart);
  4000. 8005a72: f7ff ff9b bl 80059ac <HAL_UART_ErrorCallback>
  4001. huart->ErrorCode = HAL_UART_ERROR_NONE;
  4002. 8005a76: 63e5 str r5, [r4, #60] ; 0x3c
  4003. 8005a78: bd70 pop {r4, r5, r6, pc}
  4004. if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
  4005. 8005a7a: 0616 lsls r6, r2, #24
  4006. 8005a7c: d527 bpl.n 8005ace <HAL_UART_IRQHandler+0x11e>
  4007. 8005a7e: 060d lsls r5, r1, #24
  4008. 8005a80: d525 bpl.n 8005ace <HAL_UART_IRQHandler+0x11e>
  4009. if(huart->gState == HAL_UART_STATE_BUSY_TX)
  4010. 8005a82: f894 2039 ldrb.w r2, [r4, #57] ; 0x39
  4011. 8005a86: 2a21 cmp r2, #33 ; 0x21
  4012. 8005a88: d12f bne.n 8005aea <HAL_UART_IRQHandler+0x13a>
  4013. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  4014. 8005a8a: 68a2 ldr r2, [r4, #8]
  4015. 8005a8c: f5b2 5f80 cmp.w r2, #4096 ; 0x1000
  4016. 8005a90: 6a22 ldr r2, [r4, #32]
  4017. 8005a92: d117 bne.n 8005ac4 <HAL_UART_IRQHandler+0x114>
  4018. huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
  4019. 8005a94: 8811 ldrh r1, [r2, #0]
  4020. 8005a96: f3c1 0108 ubfx r1, r1, #0, #9
  4021. 8005a9a: 6059 str r1, [r3, #4]
  4022. if(huart->Init.Parity == UART_PARITY_NONE)
  4023. 8005a9c: 6921 ldr r1, [r4, #16]
  4024. 8005a9e: b979 cbnz r1, 8005ac0 <HAL_UART_IRQHandler+0x110>
  4025. huart->pTxBuffPtr += 2U;
  4026. 8005aa0: 3202 adds r2, #2
  4027. huart->pTxBuffPtr += 1U;
  4028. 8005aa2: 6222 str r2, [r4, #32]
  4029. if(--huart->TxXferCount == 0U)
  4030. 8005aa4: 8ce2 ldrh r2, [r4, #38] ; 0x26
  4031. 8005aa6: 3a01 subs r2, #1
  4032. 8005aa8: b292 uxth r2, r2
  4033. 8005aaa: 84e2 strh r2, [r4, #38] ; 0x26
  4034. 8005aac: b9ea cbnz r2, 8005aea <HAL_UART_IRQHandler+0x13a>
  4035. __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
  4036. 8005aae: 68da ldr r2, [r3, #12]
  4037. 8005ab0: f022 0280 bic.w r2, r2, #128 ; 0x80
  4038. 8005ab4: 60da str r2, [r3, #12]
  4039. __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
  4040. 8005ab6: 68da ldr r2, [r3, #12]
  4041. 8005ab8: f042 0240 orr.w r2, r2, #64 ; 0x40
  4042. 8005abc: 60da str r2, [r3, #12]
  4043. 8005abe: bd70 pop {r4, r5, r6, pc}
  4044. huart->pTxBuffPtr += 1U;
  4045. 8005ac0: 3201 adds r2, #1
  4046. 8005ac2: e7ee b.n 8005aa2 <HAL_UART_IRQHandler+0xf2>
  4047. huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
  4048. 8005ac4: 1c51 adds r1, r2, #1
  4049. 8005ac6: 6221 str r1, [r4, #32]
  4050. 8005ac8: 7812 ldrb r2, [r2, #0]
  4051. 8005aca: 605a str r2, [r3, #4]
  4052. 8005acc: e7ea b.n 8005aa4 <HAL_UART_IRQHandler+0xf4>
  4053. if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
  4054. 8005ace: 0650 lsls r0, r2, #25
  4055. 8005ad0: d50b bpl.n 8005aea <HAL_UART_IRQHandler+0x13a>
  4056. 8005ad2: 064a lsls r2, r1, #25
  4057. 8005ad4: d509 bpl.n 8005aea <HAL_UART_IRQHandler+0x13a>
  4058. __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
  4059. 8005ad6: 68da ldr r2, [r3, #12]
  4060. HAL_UART_TxCpltCallback(huart);
  4061. 8005ad8: 4620 mov r0, r4
  4062. __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
  4063. 8005ada: f022 0240 bic.w r2, r2, #64 ; 0x40
  4064. 8005ade: 60da str r2, [r3, #12]
  4065. huart->gState = HAL_UART_STATE_READY;
  4066. 8005ae0: 2320 movs r3, #32
  4067. 8005ae2: f884 3039 strb.w r3, [r4, #57] ; 0x39
  4068. HAL_UART_TxCpltCallback(huart);
  4069. 8005ae6: f7ff ff22 bl 800592e <HAL_UART_TxCpltCallback>
  4070. 8005aea: bd70 pop {r4, r5, r6, pc}
  4071. 8005aec: 08005af1 .word 0x08005af1
  4072. 08005af0 <UART_DMAAbortOnError>:
  4073. {
  4074. 8005af0: b508 push {r3, lr}
  4075. huart->RxXferCount = 0x00U;
  4076. 8005af2: 2300 movs r3, #0
  4077. UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  4078. 8005af4: 6a40 ldr r0, [r0, #36] ; 0x24
  4079. huart->RxXferCount = 0x00U;
  4080. 8005af6: 85c3 strh r3, [r0, #46] ; 0x2e
  4081. huart->TxXferCount = 0x00U;
  4082. 8005af8: 84c3 strh r3, [r0, #38] ; 0x26
  4083. HAL_UART_ErrorCallback(huart);
  4084. 8005afa: f7ff ff57 bl 80059ac <HAL_UART_ErrorCallback>
  4085. 8005afe: bd08 pop {r3, pc}
  4086. 08005b00 <SPI_Delay>:
  4087. void SPI_Delay(int ustime)
  4088. {
  4089. volatile int i;
  4090. volatile int k;
  4091. for(i = 0; i < ustime; i++)
  4092. 8005b00: 2300 movs r3, #0
  4093. {
  4094. 8005b02: b082 sub sp, #8
  4095. for(i = 0; i < ustime; i++)
  4096. 8005b04: 9300 str r3, [sp, #0]
  4097. 8005b06: 9b00 ldr r3, [sp, #0]
  4098. 8005b08: 4283 cmp r3, r0
  4099. 8005b0a: db01 blt.n 8005b10 <SPI_Delay+0x10>
  4100. {
  4101. k++;
  4102. }
  4103. }
  4104. 8005b0c: b002 add sp, #8
  4105. 8005b0e: 4770 bx lr
  4106. k++;
  4107. 8005b10: 9b01 ldr r3, [sp, #4]
  4108. 8005b12: 3301 adds r3, #1
  4109. 8005b14: 9301 str r3, [sp, #4]
  4110. for(i = 0; i < ustime; i++)
  4111. 8005b16: 9b00 ldr r3, [sp, #0]
  4112. 8005b18: 3301 adds r3, #1
  4113. 8005b1a: e7f3 b.n 8005b04 <SPI_Delay+0x4>
  4114. 08005b1c <SpiInOut>:
  4115. #if 1 // PYJ.2019.04.02_BEGIN --
  4116. #ifdef STM32F1
  4117. void SpiInOut(uint8_t addr_write)
  4118. {
  4119. 8005b1c: b570 push {r4, r5, r6, lr}
  4120. 8005b1e: 4605 mov r5, r0
  4121. 8005b20: 2408 movs r4, #8
  4122. for (i = 0; i < 8; i++)
  4123. {
  4124. SPI_Delay(SDA_SETUP_TIME);
  4125. Clr_SX1278_SCK();
  4126. 8005b22: 4e14 ldr r6, [pc, #80] ; (8005b74 <SpiInOut+0x58>)
  4127. SPI_Delay(SDA_SETUP_TIME);
  4128. 8005b24: 2004 movs r0, #4
  4129. 8005b26: f7ff ffeb bl 8005b00 <SPI_Delay>
  4130. Clr_SX1278_SCK();
  4131. 8005b2a: 2200 movs r2, #0
  4132. 8005b2c: 2108 movs r1, #8
  4133. 8005b2e: 4630 mov r0, r6
  4134. 8005b30: f7fe fd9a bl 8004668 <HAL_GPIO_WritePin>
  4135. if (addr_write & 0x80)
  4136. 8005b34: 062b lsls r3, r5, #24
  4137. {
  4138. Set_SX1278_SDI();
  4139. 8005b36: bf4c ite mi
  4140. 8005b38: 2201 movmi r2, #1
  4141. }
  4142. else
  4143. {
  4144. Clr_SX1278_SDI();
  4145. 8005b3a: 2200 movpl r2, #0
  4146. 8005b3c: 2120 movs r1, #32
  4147. 8005b3e: 4630 mov r0, r6
  4148. 8005b40: f7fe fd92 bl 8004668 <HAL_GPIO_WritePin>
  4149. }
  4150. SPI_Delay(SDA_SETUP_TIME);
  4151. 8005b44: 2004 movs r0, #4
  4152. 8005b46: f7ff ffdb bl 8005b00 <SPI_Delay>
  4153. Set_SX1278_SCK();
  4154. 8005b4a: 2201 movs r2, #1
  4155. 8005b4c: 2108 movs r1, #8
  4156. 8005b4e: 4630 mov r0, r6
  4157. 8005b50: f7fe fd8a bl 8004668 <HAL_GPIO_WritePin>
  4158. 8005b54: 3c01 subs r4, #1
  4159. addr_write = addr_write << 1;
  4160. SPI_Delay(SDA_SETUP_TIME);
  4161. 8005b56: 2004 movs r0, #4
  4162. addr_write = addr_write << 1;
  4163. 8005b58: 006d lsls r5, r5, #1
  4164. SPI_Delay(SDA_SETUP_TIME);
  4165. 8005b5a: f7ff ffd1 bl 8005b00 <SPI_Delay>
  4166. for (i = 0; i < 8; i++)
  4167. 8005b5e: f014 04ff ands.w r4, r4, #255 ; 0xff
  4168. addr_write = addr_write << 1;
  4169. 8005b62: b2ed uxtb r5, r5
  4170. for (i = 0; i < 8; i++)
  4171. 8005b64: d1de bne.n 8005b24 <SpiInOut+0x8>
  4172. }
  4173. Clr_SX1278_SCK();
  4174. 8005b66: 4622 mov r2, r4
  4175. }
  4176. 8005b68: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  4177. Clr_SX1278_SCK();
  4178. 8005b6c: 2108 movs r1, #8
  4179. 8005b6e: 4801 ldr r0, [pc, #4] ; (8005b74 <SpiInOut+0x58>)
  4180. 8005b70: f7fe bd7a b.w 8004668 <HAL_GPIO_WritePin>
  4181. 8005b74: 40010c00 .word 0x40010c00
  4182. 08005b78 <SpiRead>:
  4183. uint8_t SpiRead(void)
  4184. {
  4185. 8005b78: b570 push {r4, r5, r6, lr}
  4186. 8005b7a: 2508 movs r5, #8
  4187. uint8_t i = 0,Readdata = 0;
  4188. 8005b7c: 2400 movs r4, #0
  4189. for (i = 0; i < 8; i++)
  4190. {
  4191. Readdata <<= 1;
  4192. SPI_Delay(SDA_SETUP_TIME);
  4193. Set_SX1278_SCK();
  4194. 8005b7e: 4e10 ldr r6, [pc, #64] ; (8005bc0 <SpiRead+0x48>)
  4195. SPI_Delay(SDA_SETUP_TIME);
  4196. 8005b80: 2004 movs r0, #4
  4197. 8005b82: f7ff ffbd bl 8005b00 <SPI_Delay>
  4198. Set_SX1278_SCK();
  4199. 8005b86: 2108 movs r1, #8
  4200. 8005b88: 4630 mov r0, r6
  4201. 8005b8a: 2201 movs r2, #1
  4202. 8005b8c: f7fe fd6c bl 8004668 <HAL_GPIO_WritePin>
  4203. Readdata <<= 1;
  4204. 8005b90: 0064 lsls r4, r4, #1
  4205. if (Read_SX1278_SDO())
  4206. 8005b92: 2110 movs r1, #16
  4207. 8005b94: 4630 mov r0, r6
  4208. Readdata <<= 1;
  4209. 8005b96: b2e4 uxtb r4, r4
  4210. if (Read_SX1278_SDO())
  4211. 8005b98: f7fe fd60 bl 800465c <HAL_GPIO_ReadPin>
  4212. 8005b9c: b108 cbz r0, 8005ba2 <SpiRead+0x2a>
  4213. Readdata |= 0x01;
  4214. 8005b9e: f044 0401 orr.w r4, r4, #1
  4215. else
  4216. Readdata &= 0xfe;
  4217. SPI_Delay(SDA_SETUP_TIME);
  4218. 8005ba2: 2004 movs r0, #4
  4219. 8005ba4: f7ff ffac bl 8005b00 <SPI_Delay>
  4220. 8005ba8: 3d01 subs r5, #1
  4221. Clr_SX1278_SCK();
  4222. 8005baa: 2200 movs r2, #0
  4223. 8005bac: 2108 movs r1, #8
  4224. 8005bae: 4630 mov r0, r6
  4225. 8005bb0: f7fe fd5a bl 8004668 <HAL_GPIO_WritePin>
  4226. for (i = 0; i < 8; i++)
  4227. 8005bb4: f015 05ff ands.w r5, r5, #255 ; 0xff
  4228. 8005bb8: d1e2 bne.n 8005b80 <SpiRead+0x8>
  4229. }
  4230. return Readdata;
  4231. }
  4232. 8005bba: 4620 mov r0, r4
  4233. 8005bbc: bd70 pop {r4, r5, r6, pc}
  4234. 8005bbe: bf00 nop
  4235. 8005bc0: 40010c00 .word 0x40010c00
  4236. 08005bc4 <BLUECELL_SPI_Transmit>:
  4237. // Lora_MOSI_SET;
  4238. // SPI_Delay(SDA_SETUP_TIME);
  4239. }
  4240. #else
  4241. void BLUECELL_SPI_Transmit(uint8_t data) {
  4242. SpiInOut(data);
  4243. 8005bc4: f7ff bfaa b.w 8005b1c <SpiInOut>
  4244. 08005bc8 <M24C32_Data_Write>:
  4245. }
  4246. }
  4247. void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){
  4248. 8005bc8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  4249. 8005bcc: 4606 mov r6, r0
  4250. 8005bce: 460f mov r7, r1
  4251. 8005bd0: 4690 mov r8, r2
  4252. 8005bd2: 461d mov r5, r3
  4253. HAL_StatusTypeDef status = HAL_ERROR;
  4254. for(uint8_t i = 0; i < size; i++){
  4255. 8005bd4: 2400 movs r4, #0
  4256. status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000);
  4257. 8005bd6: f44f 69fa mov.w r9, #2000 ; 0x7d0
  4258. 8005bda: f04f 0a01 mov.w sl, #1
  4259. HAL_Delay(5);
  4260. if(status > HAL_OK)
  4261. printf("EEPROM SAVE ERROR!!! \n");
  4262. 8005bde: f8df b040 ldr.w fp, [pc, #64] ; 8005c20 <M24C32_Data_Write+0x58>
  4263. void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){
  4264. 8005be2: b087 sub sp, #28
  4265. for(uint8_t i = 0; i < size; i++){
  4266. 8005be4: 42ac cmp r4, r5
  4267. 8005be6: d102 bne.n 8005bee <M24C32_Data_Write+0x26>
  4268. }
  4269. // I2c_Status_Check(status);
  4270. }
  4271. 8005be8: b007 add sp, #28
  4272. 8005bea: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  4273. status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000);
  4274. 8005bee: 193b adds r3, r7, r4
  4275. 8005bf0: eb08 0204 add.w r2, r8, r4
  4276. 8005bf4: 9300 str r3, [sp, #0]
  4277. 8005bf6: b292 uxth r2, r2
  4278. 8005bf8: 2310 movs r3, #16
  4279. 8005bfa: 21a0 movs r1, #160 ; 0xa0
  4280. 8005bfc: f8cd 9008 str.w r9, [sp, #8]
  4281. 8005c00: f8cd a004 str.w sl, [sp, #4]
  4282. 8005c04: 4630 mov r0, r6
  4283. 8005c06: f7fe ff81 bl 8004b0c <HAL_I2C_Mem_Write>
  4284. 8005c0a: 9005 str r0, [sp, #20]
  4285. HAL_Delay(5);
  4286. 8005c0c: 2005 movs r0, #5
  4287. 8005c0e: f7fe fb51 bl 80042b4 <HAL_Delay>
  4288. if(status > HAL_OK)
  4289. 8005c12: 9b05 ldr r3, [sp, #20]
  4290. 8005c14: b113 cbz r3, 8005c1c <M24C32_Data_Write+0x54>
  4291. printf("EEPROM SAVE ERROR!!! \n");
  4292. 8005c16: 4658 mov r0, fp
  4293. 8005c18: f001 fde6 bl 80077e8 <puts>
  4294. 8005c1c: 3401 adds r4, #1
  4295. 8005c1e: e7e1 b.n 8005be4 <M24C32_Data_Write+0x1c>
  4296. 8005c20: 0800884c .word 0x0800884c
  4297. 08005c24 <M24C32_Data_Read>:
  4298. uint8_t M24C32_Data_Read(I2C_HandleTypeDef* hi2cx,uint16_t address){
  4299. 8005c24: b57f push {r0, r1, r2, r3, r4, r5, r6, lr}
  4300. uint8_t data[1] = {0};
  4301. 8005c26: 2200 movs r2, #0
  4302. 8005c28: ab06 add r3, sp, #24
  4303. 8005c2a: f803 2d04 strb.w r2, [r3, #-4]!
  4304. HAL_StatusTypeDef status = HAL_ERROR;
  4305. status = HAL_I2C_Mem_Read(hi2cx,0xA1, address,I2C_MEMADD_SIZE_16BIT, &data[0],1, 2000);
  4306. 8005c2e: f44f 62fa mov.w r2, #2000 ; 0x7d0
  4307. 8005c32: 9202 str r2, [sp, #8]
  4308. 8005c34: 2201 movs r2, #1
  4309. 8005c36: 9300 str r3, [sp, #0]
  4310. 8005c38: 9201 str r2, [sp, #4]
  4311. 8005c3a: 2310 movs r3, #16
  4312. 8005c3c: 460a mov r2, r1
  4313. 8005c3e: 21a1 movs r1, #161 ; 0xa1
  4314. 8005c40: f7fe fffa bl 8004c38 <HAL_I2C_Mem_Read>
  4315. // I2c_Status_Check(status);
  4316. // printf("Readdata[0] : %02x\n",data);
  4317. return data[0];
  4318. }
  4319. 8005c44: f89d 0014 ldrb.w r0, [sp, #20]
  4320. 8005c48: b007 add sp, #28
  4321. 8005c4a: f85d fb04 ldr.w pc, [sp], #4
  4322. ...
  4323. 08005c50 <RGB_Limit_Address_Check>:
  4324. printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]);
  4325. printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]);
  4326. }
  4327. }
  4328. uint16_t RGB_Limit_Address_Check(uint8_t id){
  4329. 8005c50: 3801 subs r0, #1
  4330. 8005c52: b2c0 uxtb r0, r0
  4331. 8005c54: 2807 cmp r0, #7
  4332. 8005c56: bf9a itte ls
  4333. 8005c58: 4b01 ldrls r3, [pc, #4] ; (8005c60 <RGB_Limit_Address_Check+0x10>)
  4334. 8005c5a: 5c18 ldrbls r0, [r3, r0]
  4335. 8005c5c: 2000 movhi r0, #0
  4336. case 6: ret = RGB6_LIMIT_RED_H_ADDRESS;break;
  4337. case 7: ret = RGB7_LIMIT_RED_H_ADDRESS;break;
  4338. case 8: ret = RGB8_LIMIT_RED_H_ADDRESS;break;
  4339. }
  4340. return ret;
  4341. }
  4342. 8005c5e: 4770 bx lr
  4343. 8005c60: 08008862 .word 0x08008862
  4344. 08005c64 <RGB_Location_Address_Check>:
  4345. uint16_t RGB_Location_Address_Check(uint8_t id){
  4346. 8005c64: 3801 subs r0, #1
  4347. 8005c66: b2c0 uxtb r0, r0
  4348. 8005c68: 2807 cmp r0, #7
  4349. 8005c6a: bf9a itte ls
  4350. 8005c6c: 4b02 ldrls r3, [pc, #8] ; (8005c78 <RGB_Location_Address_Check+0x14>)
  4351. 8005c6e: f833 0010 ldrhls.w r0, [r3, r0, lsl #1]
  4352. 8005c72: 2000 movhi r0, #0
  4353. case 6: ret = RGB6_LOCATION_ADDRESS;break;
  4354. case 7: ret = RGB7_LOCATION_ADDRESS;break;
  4355. case 8: ret = RGB8_LOCATION_ADDRESS;break;
  4356. }
  4357. return ret;
  4358. }
  4359. 8005c74: 4770 bx lr
  4360. 8005c76: bf00 nop
  4361. 8005c78: 0800886a .word 0x0800886a
  4362. 08005c7c <RGB_Data_Init>:
  4363. void RGB_Data_Init(void){
  4364. 8005c7c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  4365. MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS);
  4366. 8005c80: 2100 movs r1, #0
  4367. 8005c82: 4849 ldr r0, [pc, #292] ; (8005da8 <RGB_Data_Init+0x12c>)
  4368. 8005c84: 4e49 ldr r6, [pc, #292] ; (8005dac <RGB_Data_Init+0x130>)
  4369. 8005c86: f7ff ffcd bl 8005c24 <M24C32_Data_Read>
  4370. 8005c8a: 2401 movs r4, #1
  4371. 8005c8c: 46b0 mov r8, r6
  4372. 8005c8e: 4d48 ldr r5, [pc, #288] ; (8005db0 <RGB_Data_Init+0x134>)
  4373. RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8);
  4374. 8005c90: 4f45 ldr r7, [pc, #276] ; (8005da8 <RGB_Data_Init+0x12c>)
  4375. MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS);
  4376. 8005c92: 7028 strb r0, [r5, #0]
  4377. RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8);
  4378. 8005c94: 4621 mov r1, r4
  4379. 8005c96: 4638 mov r0, r7
  4380. 8005c98: f7ff ffc4 bl 8005c24 <M24C32_Data_Read>
  4381. RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i));
  4382. 8005c9c: 1c61 adds r1, r4, #1
  4383. RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8);
  4384. 8005c9e: 0200 lsls r0, r0, #8
  4385. 8005ca0: 8070 strh r0, [r6, #2]
  4386. RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i));
  4387. 8005ca2: b289 uxth r1, r1
  4388. 8005ca4: 4638 mov r0, r7
  4389. 8005ca6: f7ff ffbd bl 8005c24 <M24C32_Data_Read>
  4390. 8005caa: 3406 adds r4, #6
  4391. 8005cac: 8873 ldrh r3, [r6, #2]
  4392. 8005cae: b2a4 uxth r4, r4
  4393. 8005cb0: 4318 orrs r0, r3
  4394. for(uint8_t i = 0; i < 8; i++){
  4395. 8005cb2: 2c31 cmp r4, #49 ; 0x31
  4396. RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i));
  4397. 8005cb4: f826 0f02 strh.w r0, [r6, #2]!
  4398. for(uint8_t i = 0; i < 8; i++){
  4399. 8005cb8: d1ec bne.n 8005c94 <RGB_Data_Init+0x18>
  4400. 8005cba: f8df 9108 ldr.w r9, [pc, #264] ; 8005dc4 <RGB_Data_Init+0x148>
  4401. 8005cbe: 2403 movs r4, #3
  4402. 8005cc0: 464f mov r7, r9
  4403. RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8);
  4404. 8005cc2: 4e39 ldr r6, [pc, #228] ; (8005da8 <RGB_Data_Init+0x12c>)
  4405. 8005cc4: 4621 mov r1, r4
  4406. 8005cc6: 4630 mov r0, r6
  4407. 8005cc8: f7ff ffac bl 8005c24 <M24C32_Data_Read>
  4408. RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i));
  4409. 8005ccc: 1c61 adds r1, r4, #1
  4410. RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8);
  4411. 8005cce: 0200 lsls r0, r0, #8
  4412. 8005cd0: f8a9 0002 strh.w r0, [r9, #2]
  4413. RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i));
  4414. 8005cd4: b289 uxth r1, r1
  4415. 8005cd6: 4630 mov r0, r6
  4416. 8005cd8: f7ff ffa4 bl 8005c24 <M24C32_Data_Read>
  4417. 8005cdc: 3406 adds r4, #6
  4418. 8005cde: f8b9 3002 ldrh.w r3, [r9, #2]
  4419. 8005ce2: b2a4 uxth r4, r4
  4420. 8005ce4: 4318 orrs r0, r3
  4421. for(uint8_t i = 0; i < 8; i++){
  4422. 8005ce6: 2c33 cmp r4, #51 ; 0x33
  4423. RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i));
  4424. 8005ce8: f829 0f02 strh.w r0, [r9, #2]!
  4425. for(uint8_t i = 0; i < 8; i++){
  4426. 8005cec: d1ea bne.n 8005cc4 <RGB_Data_Init+0x48>
  4427. 8005cee: f8df 90d8 ldr.w r9, [pc, #216] ; 8005dc8 <RGB_Data_Init+0x14c>
  4428. 8005cf2: 2405 movs r4, #5
  4429. 8005cf4: 46cb mov fp, r9
  4430. RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8);
  4431. 8005cf6: 4e2c ldr r6, [pc, #176] ; (8005da8 <RGB_Data_Init+0x12c>)
  4432. 8005cf8: 4621 mov r1, r4
  4433. 8005cfa: 4630 mov r0, r6
  4434. 8005cfc: f7ff ff92 bl 8005c24 <M24C32_Data_Read>
  4435. RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i));
  4436. 8005d00: 1c61 adds r1, r4, #1
  4437. RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8);
  4438. 8005d02: 0200 lsls r0, r0, #8
  4439. 8005d04: f8a9 0002 strh.w r0, [r9, #2]
  4440. RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i));
  4441. 8005d08: b289 uxth r1, r1
  4442. 8005d0a: 4630 mov r0, r6
  4443. 8005d0c: f7ff ff8a bl 8005c24 <M24C32_Data_Read>
  4444. 8005d10: 3406 adds r4, #6
  4445. 8005d12: f8b9 3002 ldrh.w r3, [r9, #2]
  4446. 8005d16: b2a4 uxth r4, r4
  4447. 8005d18: 4318 orrs r0, r3
  4448. for(uint8_t i = 0; i < 8; i++){
  4449. 8005d1a: 2c35 cmp r4, #53 ; 0x35
  4450. RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i));
  4451. 8005d1c: f829 0f02 strh.w r0, [r9, #2]!
  4452. for(uint8_t i = 0; i < 8; i++){
  4453. 8005d20: d1ea bne.n 8005cf8 <RGB_Data_Init+0x7c>
  4454. 8005d22: 2400 movs r4, #0
  4455. 8005d24: f04f 0932 mov.w r9, #50 ; 0x32
  4456. RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa);
  4457. 8005d28: 1c66 adds r6, r4, #1
  4458. 8005d2a: b2f0 uxtb r0, r6
  4459. 8005d2c: f7ff ff9a bl 8005c64 <RGB_Location_Address_Check>
  4460. 8005d30: f04f 0a00 mov.w sl, #0
  4461. 8005d34: 4602 mov r2, r0
  4462. 8005d36: fb09 f404 mul.w r4, r9, r4
  4463. 8005d3a: eb02 010a add.w r1, r2, sl
  4464. 8005d3e: b289 uxth r1, r1
  4465. 8005d40: 4819 ldr r0, [pc, #100] ; (8005da8 <RGB_Data_Init+0x12c>)
  4466. 8005d42: 9201 str r2, [sp, #4]
  4467. 8005d44: f7ff ff6e bl 8005c24 <M24C32_Data_Read>
  4468. 8005d48: 4b1a ldr r3, [pc, #104] ; (8005db4 <RGB_Data_Init+0x138>)
  4469. 8005d4a: eb0a 0104 add.w r1, sl, r4
  4470. 8005d4e: f10a 0a01 add.w sl, sl, #1
  4471. 8005d52: 4419 add r1, r3
  4472. for(uint8_t aa= 0; aa < 50; aa++)
  4473. 8005d54: f1ba 0f32 cmp.w sl, #50 ; 0x32
  4474. RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa);
  4475. 8005d58: f881 0032 strb.w r0, [r1, #50] ; 0x32
  4476. for(uint8_t aa= 0; aa < 50; aa++)
  4477. 8005d5c: 9a01 ldr r2, [sp, #4]
  4478. 8005d5e: d1ec bne.n 8005d3a <RGB_Data_Init+0xbe>
  4479. for(uint8_t i = 0; i < 8; i++){
  4480. 8005d60: 2e08 cmp r6, #8
  4481. 8005d62: 4634 mov r4, r6
  4482. 8005d64: d1e0 bne.n 8005d28 <RGB_Data_Init+0xac>
  4483. printf("MY id is %d \n",MyControllerID);
  4484. 8005d66: 7829 ldrb r1, [r5, #0]
  4485. 8005d68: 4813 ldr r0, [pc, #76] ; (8005db8 <RGB_Data_Init+0x13c>)
  4486. 8005d6a: f001 fcb5 bl 80076d8 <iprintf>
  4487. 8005d6e: 2401 movs r4, #1
  4488. printf("RGB_SensorRedLimit_Buf[%d] : %04x\n",i,RGB_SensorRedLimit_Buf[i]);
  4489. 8005d70: f8df 9058 ldr.w r9, [pc, #88] ; 8005dcc <RGB_Data_Init+0x150>
  4490. printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]);
  4491. 8005d74: 4e11 ldr r6, [pc, #68] ; (8005dbc <RGB_Data_Init+0x140>)
  4492. printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]);
  4493. 8005d76: 4d12 ldr r5, [pc, #72] ; (8005dc0 <RGB_Data_Init+0x144>)
  4494. printf("RGB_SensorRedLimit_Buf[%d] : %04x\n",i,RGB_SensorRedLimit_Buf[i]);
  4495. 8005d78: f838 2014 ldrh.w r2, [r8, r4, lsl #1]
  4496. 8005d7c: 4621 mov r1, r4
  4497. 8005d7e: 4648 mov r0, r9
  4498. 8005d80: f001 fcaa bl 80076d8 <iprintf>
  4499. printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]);
  4500. 8005d84: f837 2014 ldrh.w r2, [r7, r4, lsl #1]
  4501. 8005d88: 4621 mov r1, r4
  4502. 8005d8a: 4630 mov r0, r6
  4503. 8005d8c: f001 fca4 bl 80076d8 <iprintf>
  4504. printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]);
  4505. 8005d90: f83b 2014 ldrh.w r2, [fp, r4, lsl #1]
  4506. 8005d94: 4621 mov r1, r4
  4507. 8005d96: 4628 mov r0, r5
  4508. 8005d98: 3401 adds r4, #1
  4509. 8005d9a: f001 fc9d bl 80076d8 <iprintf>
  4510. for(uint8_t i = 1; i <= 8; i++){
  4511. 8005d9e: 2c09 cmp r4, #9
  4512. 8005da0: d1ea bne.n 8005d78 <RGB_Data_Init+0xfc>
  4513. }
  4514. 8005da2: b003 add sp, #12
  4515. 8005da4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  4516. 8005da8: 200003fc .word 0x200003fc
  4517. 8005dac: 200002e0 .word 0x200002e0
  4518. 8005db0: 20000310 .word 0x20000310
  4519. 8005db4: 200000fa .word 0x200000fa
  4520. 8005db8: 08008882 .word 0x08008882
  4521. 8005dbc: 080088b7 .word 0x080088b7
  4522. 8005dc0: 080088de .word 0x080088de
  4523. 8005dc4: 200002ce .word 0x200002ce
  4524. 8005dc8: 200002bc .word 0x200002bc
  4525. 8005dcc: 08008890 .word 0x08008890
  4526. 08005dd0 <RGB_Response_Func>:
  4527. void RGB_Response_Func(uint8_t* data){
  4528. 8005dd0: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  4529. #if 0
  4530. for(uint8_t i = 0; i < 10; i++){
  4531. printf("%02x ",data[i]);
  4532. }
  4533. #endif
  4534. switch(type){
  4535. 8005dd4: 7843 ldrb r3, [r0, #1]
  4536. void RGB_Response_Func(uint8_t* data){
  4537. 8005dd6: 4604 mov r4, r0
  4538. switch(type){
  4539. 8005dd8: 3b01 subs r3, #1
  4540. 8005dda: 2b11 cmp r3, #17
  4541. 8005ddc: d862 bhi.n 8005ea4 <RGB_Response_Func+0xd4>
  4542. 8005dde: e8df f003 tbb [pc, r3]
  4543. 8005de2: 0920 .short 0x0920
  4544. 8005de4: 14516120 .word 0x14516120
  4545. 8005de8: 61262020 .word 0x61262020
  4546. 8005dec: 2a616161 .word 0x2a616161
  4547. 8005df0: 51615133 .word 0x51615133
  4548. case RGB_Status_Data_Request:
  4549. Uart2_Data_Send(data,RGB_SensorDataRequest_Length);
  4550. break;
  4551. case RGB_ControllerID_SET:
  4552. Uart1_Data_Send(data,RGB_ControllerID_SET_Length);
  4553. 8005df4: 210a movs r1, #10
  4554. 8005df6: f000 fe3f bl 8006a78 <Uart1_Data_Send>
  4555. M24C32_Data_Write(&hi2c2,&MyControllerID,MY_ID_ADDRESS,1); // EEPROM Controller ID Save
  4556. 8005dfa: 2301 movs r3, #1
  4557. 8005dfc: 2200 movs r2, #0
  4558. 8005dfe: 492a ldr r1, [pc, #168] ; (8005ea8 <RGB_Response_Func+0xd8>)
  4559. case RGB_Status_Data_Response:
  4560. Uart1_Data_Send(data,data[bluecell_length] + 3);
  4561. break;
  4562. case RGB_ControllerLimitSet:
  4563. Uart1_Data_Send(data,data[bluecell_length] + 3);
  4564. M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save
  4565. 8005e00: 482a ldr r0, [pc, #168] ; (8005eac <RGB_Response_Func+0xdc>)
  4566. break;
  4567. case RGB_ControllerLimitGet:
  4568. Uart1_Data_Send(data,data[bluecell_length] + 3);
  4569. break;
  4570. }
  4571. }
  4572. 8005e02: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
  4573. M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save
  4574. 8005e06: f7ff bedf b.w 8005bc8 <M24C32_Data_Write>
  4575. Uart1_Data_Send(data,data[bluecell_length] + 3);
  4576. 8005e0a: 7881 ldrb r1, [r0, #2]
  4577. 8005e0c: 3103 adds r1, #3
  4578. 8005e0e: b2c9 uxtb r1, r1
  4579. 8005e10: f000 fe32 bl 8006a78 <Uart1_Data_Send>
  4580. M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save
  4581. 8005e14: 7aa0 ldrb r0, [r4, #10]
  4582. 8005e16: f7ff ff1b bl 8005c50 <RGB_Limit_Address_Check>
  4583. 8005e1a: 2306 movs r3, #6
  4584. 8005e1c: 4602 mov r2, r0
  4585. 8005e1e: 1d21 adds r1, r4, #4
  4586. 8005e20: e7ee b.n 8005e00 <RGB_Response_Func+0x30>
  4587. Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length);
  4588. 8005e22: 2107 movs r1, #7
  4589. Uart2_Data_Send(data,data[bluecell_length] + 3);
  4590. 8005e24: 4620 mov r0, r4
  4591. }
  4592. 8005e26: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
  4593. Uart2_Data_Send(data,data[bluecell_length] + 3);
  4594. 8005e2a: f000 be1d b.w 8006a68 <Uart2_Data_Send>
  4595. 8005e2e: 7881 ldrb r1, [r0, #2]
  4596. 8005e30: 3103 adds r1, #3
  4597. 8005e32: b2c9 uxtb r1, r1
  4598. 8005e34: e7f6 b.n 8005e24 <RGB_Response_Func+0x54>
  4599. M24C32_Data_Write(&hi2c2,&data[Location_stx],RGB_Location_Address_Check(data[bluecell_srcid]),data[bluecell_length] + 3); // EEPROM Controller ID Save
  4600. 8005e36: 78c0 ldrb r0, [r0, #3]
  4601. 8005e38: f7ff ff14 bl 8005c64 <RGB_Location_Address_Check>
  4602. 8005e3c: 78a3 ldrb r3, [r4, #2]
  4603. 8005e3e: 4602 mov r2, r0
  4604. 8005e40: 3303 adds r3, #3
  4605. 8005e42: b2db uxtb r3, r3
  4606. 8005e44: 4621 mov r1, r4
  4607. 8005e46: e7db b.n 8005e00 <RGB_Response_Func+0x30>
  4608. data[bluecell_length] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(data[bluecell_dstid]) + 2); // EEPROM Controller ID Save
  4609. 8005e48: 7a80 ldrb r0, [r0, #10]
  4610. 8005e4a: f7ff ff0b bl 8005c64 <RGB_Location_Address_Check>
  4611. 8005e4e: 1c81 adds r1, r0, #2
  4612. 8005e50: b289 uxth r1, r1
  4613. 8005e52: 4816 ldr r0, [pc, #88] ; (8005eac <RGB_Response_Func+0xdc>)
  4614. 8005e54: f7ff fee6 bl 8005c24 <M24C32_Data_Read>
  4615. 8005e58: 70a0 strb r0, [r4, #2]
  4616. temp = RGB_Location_Address_Check(data[bluecell_srcid]);
  4617. 8005e5a: 78e0 ldrb r0, [r4, #3]
  4618. 8005e5c: f7ff ff02 bl 8005c64 <RGB_Location_Address_Check>
  4619. for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){
  4620. 8005e60: 2300 movs r3, #0
  4621. temp = RGB_Location_Address_Check(data[bluecell_srcid]);
  4622. 8005e62: 4607 mov r7, r0
  4623. data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save
  4624. 8005e64: f8df 8044 ldr.w r8, [pc, #68] ; 8005eac <RGB_Response_Func+0xdc>
  4625. for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){
  4626. 8005e68: 78a1 ldrb r1, [r4, #2]
  4627. 8005e6a: b2de uxtb r6, r3
  4628. 8005e6c: 1c5d adds r5, r3, #1
  4629. 8005e6e: 1c8b adds r3, r1, #2
  4630. 8005e70: 42b3 cmp r3, r6
  4631. 8005e72: da0f bge.n 8005e94 <RGB_Response_Func+0xc4>
  4632. data[bluecell_type] = RGB_Location_Response;
  4633. 8005e74: 4620 mov r0, r4
  4634. 8005e76: 230f movs r3, #15
  4635. 8005e78: f800 3f01 strb.w r3, [r0, #1]!
  4636. data[data[bluecell_length] + 1] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  4637. 8005e7c: 1c4d adds r5, r1, #1
  4638. 8005e7e: f001 fa89 bl 8007394 <STH30_CreateCrc>
  4639. 8005e82: 5560 strb r0, [r4, r5]
  4640. Uart1_Data_Send(data,data[bluecell_length] + 3);
  4641. 8005e84: 78a1 ldrb r1, [r4, #2]
  4642. 8005e86: 4620 mov r0, r4
  4643. }
  4644. 8005e88: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
  4645. Uart1_Data_Send(data,data[bluecell_length] + 3);
  4646. 8005e8c: 3103 adds r1, #3
  4647. 8005e8e: b2c9 uxtb r1, r1
  4648. 8005e90: f000 bdf2 b.w 8006a78 <Uart1_Data_Send>
  4649. data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save
  4650. 8005e94: 19b9 adds r1, r7, r6
  4651. 8005e96: b289 uxth r1, r1
  4652. 8005e98: 4640 mov r0, r8
  4653. 8005e9a: f7ff fec3 bl 8005c24 <M24C32_Data_Read>
  4654. 8005e9e: 462b mov r3, r5
  4655. 8005ea0: 55a0 strb r0, [r4, r6]
  4656. 8005ea2: e7e1 b.n 8005e68 <RGB_Response_Func+0x98>
  4657. 8005ea4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  4658. 8005ea8: 20000310 .word 0x20000310
  4659. 8005eac: 200003fc .word 0x200003fc
  4660. 08005eb0 <RGB_Sensor_LED_Alarm_ON>:
  4661. void RGB_Sensor_LED_Alarm_ON(uint8_t id ){
  4662. 8005eb0: b508 push {r3, lr}
  4663. switch(id){
  4664. 8005eb2: 2808 cmp r0, #8
  4665. 8005eb4: d850 bhi.n 8005f58 <RGB_Sensor_LED_Alarm_ON+0xa8>
  4666. 8005eb6: e8df f000 tbb [pc, r0]
  4667. 8005eba: 3005 .short 0x3005
  4668. 8005ebc: 44403c38 .word 0x44403c38
  4669. 8005ec0: 4b48 .short 0x4b48
  4670. 8005ec2: 2c .byte 0x2c
  4671. 8005ec3: 00 .byte 0x00
  4672. case 0:// 모든 LED의 전원을 ON
  4673. HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET);
  4674. 8005ec4: 2200 movs r2, #0
  4675. 8005ec6: f44f 6180 mov.w r1, #1024 ; 0x400
  4676. 8005eca: 4824 ldr r0, [pc, #144] ; (8005f5c <RGB_Sensor_LED_Alarm_ON+0xac>)
  4677. 8005ecc: f7fe fbcc bl 8004668 <HAL_GPIO_WritePin>
  4678. HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET);
  4679. 8005ed0: 2200 movs r2, #0
  4680. 8005ed2: f44f 6100 mov.w r1, #2048 ; 0x800
  4681. 8005ed6: 4821 ldr r0, [pc, #132] ; (8005f5c <RGB_Sensor_LED_Alarm_ON+0xac>)
  4682. 8005ed8: f7fe fbc6 bl 8004668 <HAL_GPIO_WritePin>
  4683. HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET);
  4684. 8005edc: 2200 movs r2, #0
  4685. 8005ede: f44f 5180 mov.w r1, #4096 ; 0x1000
  4686. 8005ee2: 481e ldr r0, [pc, #120] ; (8005f5c <RGB_Sensor_LED_Alarm_ON+0xac>)
  4687. 8005ee4: f7fe fbc0 bl 8004668 <HAL_GPIO_WritePin>
  4688. HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET);
  4689. 8005ee8: 2200 movs r2, #0
  4690. 8005eea: 2104 movs r1, #4
  4691. 8005eec: 481c ldr r0, [pc, #112] ; (8005f60 <RGB_Sensor_LED_Alarm_ON+0xb0>)
  4692. 8005eee: f7fe fbbb bl 8004668 <HAL_GPIO_WritePin>
  4693. HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET);
  4694. 8005ef2: 2200 movs r2, #0
  4695. 8005ef4: 2140 movs r1, #64 ; 0x40
  4696. 8005ef6: 481b ldr r0, [pc, #108] ; (8005f64 <RGB_Sensor_LED_Alarm_ON+0xb4>)
  4697. 8005ef8: f7fe fbb6 bl 8004668 <HAL_GPIO_WritePin>
  4698. HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET);
  4699. 8005efc: 2200 movs r2, #0
  4700. 8005efe: 2180 movs r1, #128 ; 0x80
  4701. 8005f00: 4818 ldr r0, [pc, #96] ; (8005f64 <RGB_Sensor_LED_Alarm_ON+0xb4>)
  4702. 8005f02: f7fe fbb1 bl 8004668 <HAL_GPIO_WritePin>
  4703. HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET);
  4704. 8005f06: 2200 movs r2, #0
  4705. 8005f08: f44f 7180 mov.w r1, #256 ; 0x100
  4706. 8005f0c: 4815 ldr r0, [pc, #84] ; (8005f64 <RGB_Sensor_LED_Alarm_ON+0xb4>)
  4707. 8005f0e: f7fe fbab bl 8004668 <HAL_GPIO_WritePin>
  4708. break;
  4709. case 7:
  4710. HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET);
  4711. break;
  4712. case 8:
  4713. HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET);
  4714. 8005f12: 2200 movs r2, #0
  4715. 8005f14: f44f 7100 mov.w r1, #512 ; 0x200
  4716. 8005f18: e015 b.n 8005f46 <RGB_Sensor_LED_Alarm_ON+0x96>
  4717. HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET);
  4718. 8005f1a: 2200 movs r2, #0
  4719. 8005f1c: f44f 6180 mov.w r1, #1024 ; 0x400
  4720. HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET);
  4721. 8005f20: 480e ldr r0, [pc, #56] ; (8005f5c <RGB_Sensor_LED_Alarm_ON+0xac>)
  4722. break;
  4723. }
  4724. }
  4725. 8005f22: e8bd 4008 ldmia.w sp!, {r3, lr}
  4726. HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET);
  4727. 8005f26: f7fe bb9f b.w 8004668 <HAL_GPIO_WritePin>
  4728. HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET);
  4729. 8005f2a: 2200 movs r2, #0
  4730. 8005f2c: f44f 6100 mov.w r1, #2048 ; 0x800
  4731. 8005f30: e7f6 b.n 8005f20 <RGB_Sensor_LED_Alarm_ON+0x70>
  4732. HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET);
  4733. 8005f32: 2200 movs r2, #0
  4734. 8005f34: f44f 5180 mov.w r1, #4096 ; 0x1000
  4735. 8005f38: e7f2 b.n 8005f20 <RGB_Sensor_LED_Alarm_ON+0x70>
  4736. HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET);
  4737. 8005f3a: 2200 movs r2, #0
  4738. 8005f3c: 2104 movs r1, #4
  4739. 8005f3e: 4808 ldr r0, [pc, #32] ; (8005f60 <RGB_Sensor_LED_Alarm_ON+0xb0>)
  4740. 8005f40: e7ef b.n 8005f22 <RGB_Sensor_LED_Alarm_ON+0x72>
  4741. HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET);
  4742. 8005f42: 2200 movs r2, #0
  4743. 8005f44: 2140 movs r1, #64 ; 0x40
  4744. HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET);
  4745. 8005f46: 4807 ldr r0, [pc, #28] ; (8005f64 <RGB_Sensor_LED_Alarm_ON+0xb4>)
  4746. 8005f48: e7eb b.n 8005f22 <RGB_Sensor_LED_Alarm_ON+0x72>
  4747. HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET);
  4748. 8005f4a: 2200 movs r2, #0
  4749. 8005f4c: 2180 movs r1, #128 ; 0x80
  4750. 8005f4e: e7fa b.n 8005f46 <RGB_Sensor_LED_Alarm_ON+0x96>
  4751. HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET);
  4752. 8005f50: 2200 movs r2, #0
  4753. 8005f52: f44f 7180 mov.w r1, #256 ; 0x100
  4754. 8005f56: e7f6 b.n 8005f46 <RGB_Sensor_LED_Alarm_ON+0x96>
  4755. 8005f58: bd08 pop {r3, pc}
  4756. 8005f5a: bf00 nop
  4757. 8005f5c: 40011000 .word 0x40011000
  4758. 8005f60: 40011400 .word 0x40011400
  4759. 8005f64: 40010c00 .word 0x40010c00
  4760. 08005f68 <RGB_Sensor_LED_Alarm_OFF>:
  4761. void RGB_Sensor_LED_Alarm_OFF(uint8_t id ){
  4762. 8005f68: b508 push {r3, lr}
  4763. switch(id){
  4764. 8005f6a: 2808 cmp r0, #8
  4765. 8005f6c: d850 bhi.n 8006010 <RGB_Sensor_LED_Alarm_OFF+0xa8>
  4766. 8005f6e: e8df f000 tbb [pc, r0]
  4767. 8005f72: 3005 .short 0x3005
  4768. 8005f74: 44403c38 .word 0x44403c38
  4769. 8005f78: 4b48 .short 0x4b48
  4770. 8005f7a: 2c .byte 0x2c
  4771. 8005f7b: 00 .byte 0x00
  4772. case 0:// 모든 LED의 전원을 OFF
  4773. HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET);
  4774. 8005f7c: 2201 movs r2, #1
  4775. 8005f7e: f44f 6180 mov.w r1, #1024 ; 0x400
  4776. 8005f82: 4824 ldr r0, [pc, #144] ; (8006014 <RGB_Sensor_LED_Alarm_OFF+0xac>)
  4777. 8005f84: f7fe fb70 bl 8004668 <HAL_GPIO_WritePin>
  4778. HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET);
  4779. 8005f88: 2201 movs r2, #1
  4780. 8005f8a: f44f 6100 mov.w r1, #2048 ; 0x800
  4781. 8005f8e: 4821 ldr r0, [pc, #132] ; (8006014 <RGB_Sensor_LED_Alarm_OFF+0xac>)
  4782. 8005f90: f7fe fb6a bl 8004668 <HAL_GPIO_WritePin>
  4783. HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET);
  4784. 8005f94: 2201 movs r2, #1
  4785. 8005f96: f44f 5180 mov.w r1, #4096 ; 0x1000
  4786. 8005f9a: 481e ldr r0, [pc, #120] ; (8006014 <RGB_Sensor_LED_Alarm_OFF+0xac>)
  4787. 8005f9c: f7fe fb64 bl 8004668 <HAL_GPIO_WritePin>
  4788. HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET);
  4789. 8005fa0: 2201 movs r2, #1
  4790. 8005fa2: 2104 movs r1, #4
  4791. 8005fa4: 481c ldr r0, [pc, #112] ; (8006018 <RGB_Sensor_LED_Alarm_OFF+0xb0>)
  4792. 8005fa6: f7fe fb5f bl 8004668 <HAL_GPIO_WritePin>
  4793. HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET);
  4794. 8005faa: 2201 movs r2, #1
  4795. 8005fac: 2140 movs r1, #64 ; 0x40
  4796. 8005fae: 481b ldr r0, [pc, #108] ; (800601c <RGB_Sensor_LED_Alarm_OFF+0xb4>)
  4797. 8005fb0: f7fe fb5a bl 8004668 <HAL_GPIO_WritePin>
  4798. HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET);
  4799. 8005fb4: 2201 movs r2, #1
  4800. 8005fb6: 2180 movs r1, #128 ; 0x80
  4801. 8005fb8: 4818 ldr r0, [pc, #96] ; (800601c <RGB_Sensor_LED_Alarm_OFF+0xb4>)
  4802. 8005fba: f7fe fb55 bl 8004668 <HAL_GPIO_WritePin>
  4803. HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET);
  4804. 8005fbe: 2201 movs r2, #1
  4805. 8005fc0: f44f 7180 mov.w r1, #256 ; 0x100
  4806. 8005fc4: 4815 ldr r0, [pc, #84] ; (800601c <RGB_Sensor_LED_Alarm_OFF+0xb4>)
  4807. 8005fc6: f7fe fb4f bl 8004668 <HAL_GPIO_WritePin>
  4808. break;
  4809. case 7:
  4810. HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET);
  4811. break;
  4812. case 8:
  4813. HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET);
  4814. 8005fca: 2201 movs r2, #1
  4815. 8005fcc: f44f 7100 mov.w r1, #512 ; 0x200
  4816. 8005fd0: e015 b.n 8005ffe <RGB_Sensor_LED_Alarm_OFF+0x96>
  4817. HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET);
  4818. 8005fd2: 2201 movs r2, #1
  4819. 8005fd4: f44f 6180 mov.w r1, #1024 ; 0x400
  4820. HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET);
  4821. 8005fd8: 480e ldr r0, [pc, #56] ; (8006014 <RGB_Sensor_LED_Alarm_OFF+0xac>)
  4822. break;
  4823. }
  4824. }
  4825. 8005fda: e8bd 4008 ldmia.w sp!, {r3, lr}
  4826. HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET);
  4827. 8005fde: f7fe bb43 b.w 8004668 <HAL_GPIO_WritePin>
  4828. HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET);
  4829. 8005fe2: 2201 movs r2, #1
  4830. 8005fe4: f44f 6100 mov.w r1, #2048 ; 0x800
  4831. 8005fe8: e7f6 b.n 8005fd8 <RGB_Sensor_LED_Alarm_OFF+0x70>
  4832. HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET);
  4833. 8005fea: 2201 movs r2, #1
  4834. 8005fec: f44f 5180 mov.w r1, #4096 ; 0x1000
  4835. 8005ff0: e7f2 b.n 8005fd8 <RGB_Sensor_LED_Alarm_OFF+0x70>
  4836. HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET);
  4837. 8005ff2: 2201 movs r2, #1
  4838. 8005ff4: 2104 movs r1, #4
  4839. 8005ff6: 4808 ldr r0, [pc, #32] ; (8006018 <RGB_Sensor_LED_Alarm_OFF+0xb0>)
  4840. 8005ff8: e7ef b.n 8005fda <RGB_Sensor_LED_Alarm_OFF+0x72>
  4841. HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET);
  4842. 8005ffa: 2201 movs r2, #1
  4843. 8005ffc: 2140 movs r1, #64 ; 0x40
  4844. HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET);
  4845. 8005ffe: 4807 ldr r0, [pc, #28] ; (800601c <RGB_Sensor_LED_Alarm_OFF+0xb4>)
  4846. 8006000: e7eb b.n 8005fda <RGB_Sensor_LED_Alarm_OFF+0x72>
  4847. HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET);
  4848. 8006002: 2201 movs r2, #1
  4849. 8006004: 2180 movs r1, #128 ; 0x80
  4850. 8006006: e7fa b.n 8005ffe <RGB_Sensor_LED_Alarm_OFF+0x96>
  4851. HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET);
  4852. 8006008: 2201 movs r2, #1
  4853. 800600a: f44f 7180 mov.w r1, #256 ; 0x100
  4854. 800600e: e7f6 b.n 8005ffe <RGB_Sensor_LED_Alarm_OFF+0x96>
  4855. 8006010: bd08 pop {r3, pc}
  4856. 8006012: bf00 nop
  4857. 8006014: 40011000 .word 0x40011000
  4858. 8006018: 40011400 .word 0x40011400
  4859. 800601c: 40010c00 .word 0x40010c00
  4860. 08006020 <RGB_Alarm_Operate>:
  4861. void RGB_Alarm_Operate(void){
  4862. 8006020: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  4863. uint8_t temp_warning = 0;
  4864. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  4865. 8006024: 2401 movs r4, #1
  4866. uint8_t temp_warning = 0;
  4867. 8006026: 2500 movs r5, #0
  4868. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  4869. 8006028: f8df 8060 ldr.w r8, [pc, #96] ; 800608c <RGB_Alarm_Operate+0x6c>
  4870. if(LED_Alarm[SensorID_buf[i]] == 1){
  4871. 800602c: 4f15 ldr r7, [pc, #84] ; (8006084 <RGB_Alarm_Operate+0x64>)
  4872. 800602e: f8df 9060 ldr.w r9, [pc, #96] ; 8006090 <RGB_Alarm_Operate+0x70>
  4873. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  4874. 8006032: f898 3000 ldrb.w r3, [r8]
  4875. 8006036: 42a3 cmp r3, r4
  4876. 8006038: d20b bcs.n 8006052 <RGB_Alarm_Operate+0x32>
  4877. temp_warning = 1;
  4878. }else{
  4879. RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]);
  4880. }
  4881. }
  4882. if(temp_warning == 0){ // 8개의 Sensor가 전부 정상일 때 만 동작
  4883. 800603a: bb05 cbnz r5, 800607e <RGB_Alarm_Operate+0x5e>
  4884. HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_RESET); //표지 LED
  4885. 800603c: 462a mov r2, r5
  4886. 800603e: 4812 ldr r0, [pc, #72] ; (8006088 <RGB_Alarm_Operate+0x68>)
  4887. 8006040: f44f 5180 mov.w r1, #4096 ; 0x1000
  4888. 8006044: f7fe fb10 bl 8004668 <HAL_GPIO_WritePin>
  4889. RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensor가 정상일 때는 LED 가 켜지지 않는다.
  4890. 8006048: 4628 mov r0, r5
  4891. }
  4892. }
  4893. 800604a: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  4894. RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensor가 정상일 때는 LED 가 켜지지 않는다.
  4895. 800604e: f7ff bf8b b.w 8005f68 <RGB_Sensor_LED_Alarm_OFF>
  4896. if(LED_Alarm[SensorID_buf[i]] == 1){
  4897. 8006052: 5d38 ldrb r0, [r7, r4]
  4898. 8006054: f819 6000 ldrb.w r6, [r9, r0]
  4899. 8006058: 2e01 cmp r6, #1
  4900. 800605a: d10c bne.n 8006076 <RGB_Alarm_Operate+0x56>
  4901. HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_SET); //표지 LED
  4902. 800605c: 480a ldr r0, [pc, #40] ; (8006088 <RGB_Alarm_Operate+0x68>)
  4903. 800605e: 4632 mov r2, r6
  4904. 8006060: f44f 5180 mov.w r1, #4096 ; 0x1000
  4905. 8006064: f7fe fb00 bl 8004668 <HAL_GPIO_WritePin>
  4906. RGB_Sensor_LED_Alarm_ON(SensorID_buf[i]);
  4907. 8006068: 5d38 ldrb r0, [r7, r4]
  4908. 800606a: f7ff ff21 bl 8005eb0 <RGB_Sensor_LED_Alarm_ON>
  4909. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  4910. 800606e: 3401 adds r4, #1
  4911. 8006070: b2e4 uxtb r4, r4
  4912. 8006072: 4635 mov r5, r6
  4913. 8006074: e7dd b.n 8006032 <RGB_Alarm_Operate+0x12>
  4914. RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]);
  4915. 8006076: f7ff ff77 bl 8005f68 <RGB_Sensor_LED_Alarm_OFF>
  4916. 800607a: 462e mov r6, r5
  4917. 800607c: e7f7 b.n 800606e <RGB_Alarm_Operate+0x4e>
  4918. 800607e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  4919. 8006082: bf00 nop
  4920. 8006084: 200002f3 .word 0x200002f3
  4921. 8006088: 40010c00 .word 0x40010c00
  4922. 800608c: 200002f2 .word 0x200002f2
  4923. 8006090: 2000008c .word 0x2000008c
  4924. 08006094 <RGB_DeviceStatusCheck>:
  4925. // LoraDataSendSet(1);
  4926. Prev_Alarm_occur = Alarm_occur;
  4927. }
  4928. }
  4929. uint8_t RGB_DeviceStatusCheck(void){
  4930. 8006094: b530 push {r4, r5, lr}
  4931. uint8_t ret = 0;
  4932. for(uint8_t i = 1; i <= SensorID_Cnt; i++){
  4933. 8006096: 4b09 ldr r3, [pc, #36] ; (80060bc <RGB_DeviceStatusCheck+0x28>)
  4934. uint8_t ret = 0;
  4935. 8006098: 2000 movs r0, #0
  4936. for(uint8_t i = 1; i <= SensorID_Cnt; i++){
  4937. 800609a: 7819 ldrb r1, [r3, #0]
  4938. 800609c: 2301 movs r3, #1
  4939. if(SensorID_buf[i] > 0){
  4940. ret += 0x01 << (SensorID_buf[i] - 1);
  4941. 800609e: 461d mov r5, r3
  4942. if(SensorID_buf[i] > 0){
  4943. 80060a0: 4c07 ldr r4, [pc, #28] ; (80060c0 <RGB_DeviceStatusCheck+0x2c>)
  4944. for(uint8_t i = 1; i <= SensorID_Cnt; i++){
  4945. 80060a2: 428b cmp r3, r1
  4946. 80060a4: d900 bls.n 80060a8 <RGB_DeviceStatusCheck+0x14>
  4947. }
  4948. }
  4949. return ret;
  4950. }
  4951. 80060a6: bd30 pop {r4, r5, pc}
  4952. if(SensorID_buf[i] > 0){
  4953. 80060a8: 5ce2 ldrb r2, [r4, r3]
  4954. 80060aa: b122 cbz r2, 80060b6 <RGB_DeviceStatusCheck+0x22>
  4955. ret += 0x01 << (SensorID_buf[i] - 1);
  4956. 80060ac: 3a01 subs r2, #1
  4957. 80060ae: fa05 f202 lsl.w r2, r5, r2
  4958. 80060b2: 4410 add r0, r2
  4959. 80060b4: b2c0 uxtb r0, r0
  4960. for(uint8_t i = 1; i <= SensorID_Cnt; i++){
  4961. 80060b6: 3301 adds r3, #1
  4962. 80060b8: b2db uxtb r3, r3
  4963. 80060ba: e7f2 b.n 80060a2 <RGB_DeviceStatusCheck+0xe>
  4964. 80060bc: 200002f2 .word 0x200002f2
  4965. 80060c0: 200002f3 .word 0x200002f3
  4966. 080060c4 <RGB_BufCal>:
  4967. }
  4968. /*
  4969. RGB_Data_Stack에 Lora에 Data를 보내기 위해 Buffer에 Data를 쌓을 때
  4970. ID 마다 Location Cnt
  4971. */
  4972. uint8_t RGB_BufCal(uint8_t srcid){
  4973. 80060c4: 3801 subs r0, #1
  4974. 80060c6: b2c0 uxtb r0, r0
  4975. 80060c8: 2807 cmp r0, #7
  4976. 80060ca: bf9a itte ls
  4977. 80060cc: 4b01 ldrls r3, [pc, #4] ; (80060d4 <RGB_BufCal+0x10>)
  4978. 80060ce: 5c18 ldrbls r0, [r3, r0]
  4979. 80060d0: 2000 movhi r0, #0
  4980. case 6:ret = 29;break;
  4981. case 7:ret = 32;break;
  4982. case 8:ret = 35;break;
  4983. }
  4984. return ret;
  4985. }
  4986. 80060d2: 4770 bx lr
  4987. 80060d4: 0800887a .word 0x0800887a
  4988. 080060d8 <RGB_Data_Stack>:
  4989. void RGB_Data_Stack(uint8_t* rgb_buf){
  4990. 80060d8: b5f8 push {r3, r4, r5, r6, r7, lr}
  4991. Lora_Buf[bluecell_stx] = 0xbe;
  4992. 80060da: 23be movs r3, #190 ; 0xbe
  4993. memset(&Lora_Buf[0],0x00,8);
  4994. 80060dc: 4c1c ldr r4, [pc, #112] ; (8006150 <RGB_Data_Stack+0x78>)
  4995. 80060de: 2500 movs r5, #0
  4996. Lora_Buf[bluecell_stx] = 0xbe;
  4997. 80060e0: 7023 strb r3, [r4, #0]
  4998. Lora_Buf[bluecell_srcid + 4] = 0xeb;
  4999. 80060e2: 23eb movs r3, #235 ; 0xeb
  5000. memset(&Lora_Buf[0],0x00,8);
  5001. 80060e4: 6065 str r5, [r4, #4]
  5002. Lora_Buf[bluecell_srcid + 4] = 0xeb;
  5003. 80060e6: 71e3 strb r3, [r4, #7]
  5004. Lora_Buf[bluecell_type] = RGB_Lora_Data_Report;
  5005. 80060e8: 230d movs r3, #13
  5006. 80060ea: 7063 strb r3, [r4, #1]
  5007. Lora_Buf[bluecell_length] = Lora_Max_Amount;// RGB Data 5byte
  5008. 80060ec: 2305 movs r3, #5
  5009. 80060ee: 70a3 strb r3, [r4, #2]
  5010. Lora_Buf[bluecell_srcid] = MyControllerID;
  5011. 80060f0: 4b18 ldr r3, [pc, #96] ; (8006154 <RGB_Data_Stack+0x7c>)
  5012. if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Device가 존재 하지않을 때
  5013. 80060f2: 4e19 ldr r6, [pc, #100] ; (8006158 <RGB_Data_Stack+0x80>)
  5014. Lora_Buf[bluecell_srcid] = MyControllerID;
  5015. 80060f4: 781b ldrb r3, [r3, #0]
  5016. void RGB_Data_Stack(uint8_t* rgb_buf){
  5017. 80060f6: 4601 mov r1, r0
  5018. if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Device가 존재 하지않을 때
  5019. 80060f8: 7870 ldrb r0, [r6, #1]
  5020. Lora_Buf[bluecell_srcid] = MyControllerID;
  5021. 80060fa: 70e3 strb r3, [r4, #3]
  5022. if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Device가 존재 하지않을 때
  5023. 80060fc: f7ff ffe2 bl 80060c4 <RGB_BufCal>
  5024. 8006100: b1b8 cbz r0, 8006132 <RGB_Data_Stack+0x5a>
  5025. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5026. 8006102: 4b16 ldr r3, [pc, #88] ; (800615c <RGB_Data_Stack+0x84>)
  5027. 8006104: 7922 ldrb r2, [r4, #4]
  5028. 8006106: 781f ldrb r7, [r3, #0]
  5029. 8006108: 2301 movs r3, #1
  5030. Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1);
  5031. 800610a: 469e mov lr, r3
  5032. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5033. 800610c: 42bb cmp r3, r7
  5034. 800610e: d915 bls.n 800613c <RGB_Data_Stack+0x64>
  5035. 8006110: b105 cbz r5, 8006114 <RGB_Data_Stack+0x3c>
  5036. 8006112: 7122 strb r2, [r4, #4]
  5037. 8006114: 2300 movs r3, #0
  5038. Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ;
  5039. 8006116: 5cca ldrb r2, [r1, r3]
  5040. 8006118: 7960 ldrb r0, [r4, #5]
  5041. 800611a: 409a lsls r2, r3
  5042. 800611c: 3301 adds r3, #1
  5043. 800611e: 4302 orrs r2, r0
  5044. for(uint8_t i = 0; i < 8; i++){
  5045. 8006120: 2b08 cmp r3, #8
  5046. Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ;
  5047. 8006122: 7162 strb r2, [r4, #5]
  5048. for(uint8_t i = 0; i < 8; i++){
  5049. 8006124: d1f7 bne.n 8006116 <RGB_Data_Stack+0x3e>
  5050. Lora_Buf[bluecell_srcid + 3]= STH30_CreateCrc(&Lora_Buf[bluecell_type],Lora_Buf[bluecell_length]);
  5051. 8006126: 2105 movs r1, #5
  5052. 8006128: 480d ldr r0, [pc, #52] ; (8006160 <RGB_Data_Stack+0x88>)
  5053. 800612a: f001 f933 bl 8007394 <STH30_CreateCrc>
  5054. 800612e: 71a0 strb r0, [r4, #6]
  5055. 8006130: bdf8 pop {r3, r4, r5, r6, r7, pc}
  5056. printf("Not Exist Device \n");
  5057. 8006132: 480c ldr r0, [pc, #48] ; (8006164 <RGB_Data_Stack+0x8c>)
  5058. }
  5059. 8006134: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
  5060. printf("Not Exist Device \n");
  5061. 8006138: f001 bb56 b.w 80077e8 <puts>
  5062. Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1);
  5063. 800613c: 5cf0 ldrb r0, [r6, r3]
  5064. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5065. 800613e: 3301 adds r3, #1
  5066. Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1);
  5067. 8006140: 3801 subs r0, #1
  5068. 8006142: fa0e f000 lsl.w r0, lr, r0
  5069. 8006146: 4302 orrs r2, r0
  5070. 8006148: b2d2 uxtb r2, r2
  5071. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5072. 800614a: b2db uxtb r3, r3
  5073. 800614c: 2501 movs r5, #1
  5074. 800614e: e7dd b.n 800610c <RGB_Data_Stack+0x34>
  5075. 8006150: 20000095 .word 0x20000095
  5076. 8006154: 20000310 .word 0x20000310
  5077. 8006158: 200002f3 .word 0x200002f3
  5078. 800615c: 200002f2 .word 0x200002f2
  5079. 8006160: 20000096 .word 0x20000096
  5080. 8006164: 08008905 .word 0x08008905
  5081. 08006168 <RGB_Alarm_Check>:
  5082. void RGB_Alarm_Check(uint8_t* data){
  5083. 8006168: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  5084. 800616c: 4604 mov r4, r0
  5085. 800616e: b091 sub sp, #68 ; 0x44
  5086. uint16_t Sensor_red[9] = {0,};
  5087. 8006170: 2212 movs r2, #18
  5088. 8006172: 2100 movs r1, #0
  5089. 8006174: a801 add r0, sp, #4
  5090. 8006176: f001 faa6 bl 80076c6 <memset>
  5091. uint16_t Sensor_green[9] = {0,};
  5092. 800617a: 2212 movs r2, #18
  5093. 800617c: 2100 movs r1, #0
  5094. 800617e: a806 add r0, sp, #24
  5095. 8006180: f001 faa1 bl 80076c6 <memset>
  5096. uint16_t Sensor_blue[9] = {0,};
  5097. 8006184: 2212 movs r2, #18
  5098. 8006186: 2100 movs r1, #0
  5099. 8006188: a80b add r0, sp, #44 ; 0x2c
  5100. 800618a: f001 fa9c bl 80076c6 <memset>
  5101. Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]);
  5102. 800618e: 78e3 ldrb r3, [r4, #3]
  5103. 8006190: aa10 add r2, sp, #64 ; 0x40
  5104. 8006192: eb02 0343 add.w r3, r2, r3, lsl #1
  5105. 8006196: 79a1 ldrb r1, [r4, #6]
  5106. 8006198: 79e2 ldrb r2, [r4, #7]
  5107. if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]]
  5108. 800619a: 4e24 ldr r6, [pc, #144] ; (800622c <RGB_Alarm_Check+0xc4>)
  5109. Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]);
  5110. 800619c: ea42 2201 orr.w r2, r2, r1, lsl #8
  5111. 80061a0: f823 2c3c strh.w r2, [r3, #-60]
  5112. Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]);
  5113. 80061a4: 7a21 ldrb r1, [r4, #8]
  5114. 80061a6: 7a62 ldrb r2, [r4, #9]
  5115. if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]]
  5116. 80061a8: 4f21 ldr r7, [pc, #132] ; (8006230 <RGB_Alarm_Check+0xc8>)
  5117. Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]);
  5118. 80061aa: ea42 2201 orr.w r2, r2, r1, lsl #8
  5119. 80061ae: f823 2c28 strh.w r2, [r3, #-40]
  5120. Sensor_blue[data[bluecell_srcid]] = ((data[bluecell_blue_H + 2] << 8)| data[bluecell_blue_L + 2]);
  5121. 80061b2: 7aa1 ldrb r1, [r4, #10]
  5122. 80061b4: 7ae2 ldrb r2, [r4, #11]
  5123. uint8_t Alarm_occur = 0;
  5124. 80061b6: 2400 movs r4, #0
  5125. Sensor_blue[data[bluecell_srcid]] = ((data[bluecell_blue_H + 2] << 8)| data[bluecell_blue_L + 2]);
  5126. 80061b8: ea42 2201 orr.w r2, r2, r1, lsl #8
  5127. 80061bc: f823 2c14 strh.w r2, [r3, #-20]
  5128. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5129. 80061c0: 4b1c ldr r3, [pc, #112] ; (8006234 <RGB_Alarm_Check+0xcc>)
  5130. LED_Alarm[SensorID_buf[i]] = 0;
  5131. 80061c2: 46a1 mov r9, r4
  5132. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5133. 80061c4: 781d ldrb r5, [r3, #0]
  5134. 80061c6: 2301 movs r3, #1
  5135. LED_Alarm[SensorID_buf[i]] = 1;
  5136. 80061c8: 469e mov lr, r3
  5137. 80061ca: 481b ldr r0, [pc, #108] ; (8006238 <RGB_Alarm_Check+0xd0>)
  5138. || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]]
  5139. 80061cc: f8df c074 ldr.w ip, [pc, #116] ; 8006244 <RGB_Alarm_Check+0xdc>
  5140. || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) {
  5141. 80061d0: f8df 8074 ldr.w r8, [pc, #116] ; 8006248 <RGB_Alarm_Check+0xe0>
  5142. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5143. 80061d4: 42ab cmp r3, r5
  5144. 80061d6: d90a bls.n 80061ee <RGB_Alarm_Check+0x86>
  5145. RGB_Data_Stack(&LED_Alarm[1]);
  5146. 80061d8: 4818 ldr r0, [pc, #96] ; (800623c <RGB_Alarm_Check+0xd4>)
  5147. 80061da: f7ff ff7d bl 80060d8 <RGB_Data_Stack>
  5148. if(Prev_Alarm_occur != Alarm_occur){
  5149. 80061de: 4b18 ldr r3, [pc, #96] ; (8006240 <RGB_Alarm_Check+0xd8>)
  5150. 80061e0: 781a ldrb r2, [r3, #0]
  5151. 80061e2: 42a2 cmp r2, r4
  5152. Prev_Alarm_occur = Alarm_occur;
  5153. 80061e4: bf18 it ne
  5154. 80061e6: 701c strbne r4, [r3, #0]
  5155. }
  5156. 80061e8: b011 add sp, #68 ; 0x44
  5157. 80061ea: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  5158. if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]]
  5159. 80061ee: 5cf1 ldrb r1, [r6, r3]
  5160. 80061f0: aa10 add r2, sp, #64 ; 0x40
  5161. 80061f2: eb02 0241 add.w r2, r2, r1, lsl #1
  5162. 80061f6: f837 b011 ldrh.w fp, [r7, r1, lsl #1]
  5163. 80061fa: f832 ac3c ldrh.w sl, [r2, #-60]
  5164. 80061fe: 45d3 cmp fp, sl
  5165. 8006200: d20b bcs.n 800621a <RGB_Alarm_Check+0xb2>
  5166. || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]]
  5167. 8006202: f83c b011 ldrh.w fp, [ip, r1, lsl #1]
  5168. 8006206: f832 ac28 ldrh.w sl, [r2, #-40]
  5169. 800620a: 45d3 cmp fp, sl
  5170. 800620c: d205 bcs.n 800621a <RGB_Alarm_Check+0xb2>
  5171. || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) {
  5172. 800620e: f838 a011 ldrh.w sl, [r8, r1, lsl #1]
  5173. 8006212: f832 2c14 ldrh.w r2, [r2, #-20]
  5174. 8006216: 4592 cmp sl, r2
  5175. 8006218: d305 bcc.n 8006226 <RGB_Alarm_Check+0xbe>
  5176. Alarm_occur = 1;
  5177. 800621a: 2401 movs r4, #1
  5178. LED_Alarm[SensorID_buf[i]] = 1;
  5179. 800621c: f800 e001 strb.w lr, [r0, r1]
  5180. for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
  5181. 8006220: 3301 adds r3, #1
  5182. 8006222: b2db uxtb r3, r3
  5183. 8006224: e7d6 b.n 80061d4 <RGB_Alarm_Check+0x6c>
  5184. LED_Alarm[SensorID_buf[i]] = 0;
  5185. 8006226: f800 9001 strb.w r9, [r0, r1]
  5186. 800622a: e7f9 b.n 8006220 <RGB_Alarm_Check+0xb8>
  5187. 800622c: 200002f3 .word 0x200002f3
  5188. 8006230: 200002e0 .word 0x200002e0
  5189. 8006234: 200002f2 .word 0x200002f2
  5190. 8006238: 2000008c .word 0x2000008c
  5191. 800623c: 2000008d .word 0x2000008d
  5192. 8006240: 200000f9 .word 0x200000f9
  5193. 8006244: 200002ce .word 0x200002ce
  5194. 8006248: 200002bc .word 0x200002bc
  5195. 0800624c <RGB_Controller_Func>:
  5196. }
  5197. #endif // PYJ.2019.04.14_END --
  5198. uint8_t datalosscnt[9] = {0,};
  5199. void RGB_Controller_Func(uint8_t* data){
  5200. 800624c: b530 push {r4, r5, lr}
  5201. RGB_CMD_T type = data[bluecell_type];
  5202. 800624e: 7845 ldrb r5, [r0, #1]
  5203. void RGB_Controller_Func(uint8_t* data){
  5204. 8006250: b09b sub sp, #108 ; 0x6c
  5205. 8006252: 4604 mov r4, r0
  5206. // static uint8_t temp_sensorid;
  5207. uint8_t Result_buf[100] = {0,};
  5208. 8006254: 2264 movs r2, #100 ; 0x64
  5209. 8006256: 2100 movs r1, #0
  5210. 8006258: a801 add r0, sp, #4
  5211. 800625a: f001 fa34 bl 80076c6 <memset>
  5212. uint8_t i = 0;
  5213. switch(type){
  5214. 800625e: 1e6b subs r3, r5, #1
  5215. 8006260: 2b14 cmp r3, #20
  5216. 8006262: d834 bhi.n 80062ce <RGB_Controller_Func+0x82>
  5217. 8006264: e8df f013 tbh [pc, r3, lsl #1]
  5218. 8006268: 00380015 .word 0x00380015
  5219. 800626c: 00540042 .word 0x00540042
  5220. 8006270: 008f005d .word 0x008f005d
  5221. 8006274: 00330033 .word 0x00330033
  5222. 8006278: 00b60033 .word 0x00b60033
  5223. 800627c: 00330033 .word 0x00330033
  5224. 8006280: 00c30033 .word 0x00c30033
  5225. 8006284: 00d100ca .word 0x00d100ca
  5226. 8006288: 00e80033 .word 0x00e80033
  5227. 800628c: 00330033 .word 0x00330033
  5228. 8006290: 0117 .short 0x0117
  5229. case RGB_Status_Data_Request:
  5230. datalosscnt[data[bluecell_srcid + 1]]++;
  5231. 8006292: 4b83 ldr r3, [pc, #524] ; (80064a0 <RGB_Controller_Func+0x254>)
  5232. 8006294: 7921 ldrb r1, [r4, #4]
  5233. 8006296: 5c5a ldrb r2, [r3, r1]
  5234. 8006298: 3201 adds r2, #1
  5235. 800629a: 545a strb r2, [r3, r1]
  5236. if(datalosscnt[data[bluecell_srcid + 1]] > 3 && data[bluecell_srcid + 1] != 0){
  5237. 800629c: 7922 ldrb r2, [r4, #4]
  5238. 800629e: 5c9b ldrb r3, [r3, r2]
  5239. 80062a0: 2b03 cmp r3, #3
  5240. 80062a2: d907 bls.n 80062b4 <RGB_Controller_Func+0x68>
  5241. 80062a4: b132 cbz r2, 80062b4 <RGB_Controller_Func+0x68>
  5242. RGB_SensorIDAutoSet(1);
  5243. 80062a6: 2001 movs r0, #1
  5244. 80062a8: f000 fbd8 bl 8006a5c <RGB_SensorIDAutoSet>
  5245. memset(&SensorID_buf[0],0x00,8);
  5246. 80062ac: 2200 movs r2, #0
  5247. 80062ae: 4b7d ldr r3, [pc, #500] ; (80064a4 <RGB_Controller_Func+0x258>)
  5248. 80062b0: 601a str r2, [r3, #0]
  5249. 80062b2: 605a str r2, [r3, #4]
  5250. }
  5251. data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  5252. 80062b4: 78a1 ldrb r1, [r4, #2]
  5253. 80062b6: 1c60 adds r0, r4, #1
  5254. 80062b8: f001 f86c bl 8007394 <STH30_CreateCrc>
  5255. 80062bc: 7160 strb r0, [r4, #5]
  5256. memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],RGB_SensorDataRequest_Length);
  5257. 80062be: 88a2 ldrh r2, [r4, #4]
  5258. 80062c0: 6820 ldr r0, [r4, #0]
  5259. 80062c2: 79a3 ldrb r3, [r4, #6]
  5260. 80062c4: 9001 str r0, [sp, #4]
  5261. 80062c6: f8ad 2008 strh.w r2, [sp, #8]
  5262. 80062ca: f88d 300a strb.w r3, [sp, #10]
  5263. break;
  5264. default:
  5265. break;
  5266. }
  5267. RGB_Response_Func(&Result_buf[bluecell_stx]);
  5268. 80062ce: a801 add r0, sp, #4
  5269. 80062d0: f7ff fd7e bl 8005dd0 <RGB_Response_Func>
  5270. return;
  5271. }
  5272. 80062d4: b01b add sp, #108 ; 0x6c
  5273. 80062d6: bd30 pop {r4, r5, pc}
  5274. memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
  5275. 80062d8: 78a2 ldrb r2, [r4, #2]
  5276. 80062da: 4621 mov r1, r4
  5277. 80062dc: 3203 adds r2, #3
  5278. 80062de: a801 add r0, sp, #4
  5279. 80062e0: f001 f9e6 bl 80076b0 <memcpy>
  5280. MyControllerID = data[bluecell_srcid]; // �긽��諛⑹쓽 SRC ID�뒗 �굹�쓽 DST ID�씠�떎.
  5281. 80062e4: 78e2 ldrb r2, [r4, #3]
  5282. 80062e6: 4b70 ldr r3, [pc, #448] ; (80064a8 <RGB_Controller_Func+0x25c>)
  5283. 80062e8: 701a strb r2, [r3, #0]
  5284. break;
  5285. 80062ea: e7f0 b.n 80062ce <RGB_Controller_Func+0x82>
  5286. RGB_SensorIDAutoSet(1);
  5287. 80062ec: 2001 movs r0, #1
  5288. 80062ee: f000 fbb5 bl 8006a5c <RGB_SensorIDAutoSet>
  5289. memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
  5290. 80062f2: 78a2 ldrb r2, [r4, #2]
  5291. 80062f4: 4621 mov r1, r4
  5292. 80062f6: 3203 adds r2, #3
  5293. 80062f8: a801 add r0, sp, #4
  5294. 80062fa: f001 f9d9 bl 80076b0 <memcpy>
  5295. Result_buf[5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5296. 80062fe: f89d 1006 ldrb.w r1, [sp, #6]
  5297. 8006302: f10d 0005 add.w r0, sp, #5
  5298. 8006306: f001 f845 bl 8007394 <STH30_CreateCrc>
  5299. 800630a: f88d 0009 strb.w r0, [sp, #9]
  5300. break;
  5301. 800630e: e7de b.n 80062ce <RGB_Controller_Func+0x82>
  5302. SensorID_Cnt++;
  5303. 8006310: 4a66 ldr r2, [pc, #408] ; (80064ac <RGB_Controller_Func+0x260>)
  5304. SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1];
  5305. 8006312: 78e1 ldrb r1, [r4, #3]
  5306. SensorID_Cnt++;
  5307. 8006314: 7813 ldrb r3, [r2, #0]
  5308. 8006316: 3301 adds r3, #1
  5309. 8006318: b2db uxtb r3, r3
  5310. 800631a: 7013 strb r3, [r2, #0]
  5311. SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1];
  5312. 800631c: 4a61 ldr r2, [pc, #388] ; (80064a4 <RGB_Controller_Func+0x258>)
  5313. 800631e: 54d1 strb r1, [r2, r3]
  5314. break;
  5315. 8006320: e7d5 b.n 80062ce <RGB_Controller_Func+0x82>
  5316. datalosscnt[data[bluecell_srcid]] = 0;
  5317. 8006322: 2100 movs r1, #0
  5318. 8006324: 78e3 ldrb r3, [r4, #3]
  5319. 8006326: 4a5e ldr r2, [pc, #376] ; (80064a0 <RGB_Controller_Func+0x254>)
  5320. RGB_Alarm_Check(&data[bluecell_stx]);
  5321. 8006328: 4620 mov r0, r4
  5322. datalosscnt[data[bluecell_srcid]] = 0;
  5323. 800632a: 54d1 strb r1, [r2, r3]
  5324. data[bluecell_length] += 1;
  5325. 800632c: 78a3 ldrb r3, [r4, #2]
  5326. 800632e: 3301 adds r3, #1
  5327. 8006330: 70a3 strb r3, [r4, #2]
  5328. RGB_Alarm_Check(&data[bluecell_stx]);
  5329. 8006332: f7ff ff19 bl 8006168 <RGB_Alarm_Check>
  5330. memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
  5331. 8006336: 78a2 ldrb r2, [r4, #2]
  5332. 8006338: 4621 mov r1, r4
  5333. 800633a: 3203 adds r2, #3
  5334. 800633c: a801 add r0, sp, #4
  5335. 800633e: f001 f9b7 bl 80076b0 <memcpy>
  5336. Result_buf[Result_buf[bluecell_length] - 1] = RGB_DeviceStatusCheck();// Device On OFF status Send byte
  5337. 8006342: f7ff fea7 bl 8006094 <RGB_DeviceStatusCheck>
  5338. 8006346: f89d 3006 ldrb.w r3, [sp, #6]
  5339. 800634a: aa1a add r2, sp, #104 ; 0x68
  5340. 800634c: 4413 add r3, r2
  5341. 800634e: f803 0c65 strb.w r0, [r3, #-101]
  5342. Result_buf[Result_buf[bluecell_length] + 0] = Lora_Buf[bluecell_srcid + 2];
  5343. 8006352: f89d 3006 ldrb.w r3, [sp, #6]
  5344. Result_buf[Result_buf[bluecell_length] + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5345. 8006356: f10d 0005 add.w r0, sp, #5
  5346. Result_buf[Result_buf[bluecell_length] + 0] = Lora_Buf[bluecell_srcid + 2];
  5347. 800635a: 4413 add r3, r2
  5348. 800635c: 4a54 ldr r2, [pc, #336] ; (80064b0 <RGB_Controller_Func+0x264>)
  5349. 800635e: 7952 ldrb r2, [r2, #5]
  5350. 8006360: f803 2c64 strb.w r2, [r3, #-100]
  5351. Result_buf[Result_buf[bluecell_length] + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5352. 8006364: f89d 4006 ldrb.w r4, [sp, #6]
  5353. 8006368: 4621 mov r1, r4
  5354. 800636a: f001 f813 bl 8007394 <STH30_CreateCrc>
  5355. 800636e: ab1a add r3, sp, #104 ; 0x68
  5356. 8006370: 441c add r4, r3
  5357. 8006372: f804 0c63 strb.w r0, [r4, #-99]
  5358. Result_buf[Result_buf[bluecell_length] + 2] = 0xeb;
  5359. 8006376: f89d 3006 ldrb.w r3, [sp, #6]
  5360. 800637a: aa1a add r2, sp, #104 ; 0x68
  5361. 800637c: 4413 add r3, r2
  5362. 800637e: 22eb movs r2, #235 ; 0xeb
  5363. 8006380: f803 2c62 strb.w r2, [r3, #-98]
  5364. break;
  5365. 8006384: e7a3 b.n 80062ce <RGB_Controller_Func+0x82>
  5366. memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
  5367. 8006386: 78a2 ldrb r2, [r4, #2]
  5368. 8006388: 4621 mov r1, r4
  5369. 800638a: 3203 adds r2, #3
  5370. 800638c: a801 add r0, sp, #4
  5371. 800638e: f001 f98f bl 80076b0 <memcpy>
  5372. RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]);
  5373. 8006392: 7922 ldrb r2, [r4, #4]
  5374. 8006394: 7963 ldrb r3, [r4, #5]
  5375. 8006396: 7aa1 ldrb r1, [r4, #10]
  5376. 8006398: ea43 2302 orr.w r3, r3, r2, lsl #8
  5377. 800639c: 4a45 ldr r2, [pc, #276] ; (80064b4 <RGB_Controller_Func+0x268>)
  5378. Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5379. 800639e: f10d 0005 add.w r0, sp, #5
  5380. RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]);
  5381. 80063a2: f822 3011 strh.w r3, [r2, r1, lsl #1]
  5382. RGB_SensorGreenLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_green_H] << 8) |data[bluecell_green_L]);
  5383. 80063a6: 79a2 ldrb r2, [r4, #6]
  5384. 80063a8: 79e3 ldrb r3, [r4, #7]
  5385. 80063aa: 7aa1 ldrb r1, [r4, #10]
  5386. 80063ac: ea43 2302 orr.w r3, r3, r2, lsl #8
  5387. 80063b0: 4a41 ldr r2, [pc, #260] ; (80064b8 <RGB_Controller_Func+0x26c>)
  5388. 80063b2: f822 3011 strh.w r3, [r2, r1, lsl #1]
  5389. RGB_SensorBlueLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]);
  5390. 80063b6: 7a22 ldrb r2, [r4, #8]
  5391. 80063b8: 7a63 ldrb r3, [r4, #9]
  5392. 80063ba: 7aa1 ldrb r1, [r4, #10]
  5393. 80063bc: ea43 2302 orr.w r3, r3, r2, lsl #8
  5394. 80063c0: 4a3e ldr r2, [pc, #248] ; (80064bc <RGB_Controller_Func+0x270>)
  5395. 80063c2: f822 3011 strh.w r3, [r2, r1, lsl #1]
  5396. Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5397. 80063c6: f89d 1006 ldrb.w r1, [sp, #6]
  5398. 80063ca: f000 ffe3 bl 8007394 <STH30_CreateCrc>
  5399. 80063ce: f88d 000f strb.w r0, [sp, #15]
  5400. break;
  5401. 80063d2: e77c b.n 80062ce <RGB_Controller_Func+0x82>
  5402. \details Acts as a special kind of Data Memory Barrier.
  5403. It completes when all explicit memory accesses before this instruction complete.
  5404. */
  5405. __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
  5406. {
  5407. __ASM volatile ("dsb 0xF":::"memory");
  5408. 80063d4: f3bf 8f4f dsb sy
  5409. (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
  5410. 80063d8: 4939 ldr r1, [pc, #228] ; (80064c0 <RGB_Controller_Func+0x274>)
  5411. SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
  5412. 80063da: 4b3a ldr r3, [pc, #232] ; (80064c4 <RGB_Controller_Func+0x278>)
  5413. (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
  5414. 80063dc: 68ca ldr r2, [r1, #12]
  5415. 80063de: f402 62e0 and.w r2, r2, #1792 ; 0x700
  5416. SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
  5417. 80063e2: 4313 orrs r3, r2
  5418. 80063e4: 60cb str r3, [r1, #12]
  5419. 80063e6: f3bf 8f4f dsb sy
  5420. __ASM volatile ("nop");
  5421. 80063ea: bf00 nop
  5422. 80063ec: e7fd b.n 80063ea <RGB_Controller_Func+0x19e>
  5423. memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
  5424. 80063ee: 78a2 ldrb r2, [r4, #2]
  5425. 80063f0: 4621 mov r1, r4
  5426. 80063f2: 3203 adds r2, #3
  5427. 80063f4: a801 add r0, sp, #4
  5428. 80063f6: f001 f95b bl 80076b0 <memcpy>
  5429. break;
  5430. 80063fa: e768 b.n 80062ce <RGB_Controller_Func+0x82>
  5431. Result_buf[bluecell_type] = RGB_Location_Response;
  5432. 80063fc: 230f movs r3, #15
  5433. 80063fe: f88d 3005 strb.w r3, [sp, #5]
  5434. Result_buf[bluecell_srcid] = data[bluecell_srcid];
  5435. 8006402: 78e3 ldrb r3, [r4, #3]
  5436. 8006404: f88d 3007 strb.w r3, [sp, #7]
  5437. break;
  5438. 8006408: e761 b.n 80062ce <RGB_Controller_Func+0x82>
  5439. Result_buf[bluecell_stx] = 0xbe;
  5440. 800640a: 23be movs r3, #190 ; 0xbe
  5441. 800640c: f88d 3004 strb.w r3, [sp, #4]
  5442. Result_buf[bluecell_type] = RGB_ControllerID_GET;
  5443. 8006410: 2310 movs r3, #16
  5444. Result_buf[bluecell_length] = 3;
  5445. 8006412: 2103 movs r1, #3
  5446. Result_buf[bluecell_type] = RGB_ControllerID_GET;
  5447. 8006414: f88d 3005 strb.w r3, [sp, #5]
  5448. Result_buf[bluecell_srcid] = MyControllerID;
  5449. 8006418: 4b23 ldr r3, [pc, #140] ; (80064a8 <RGB_Controller_Func+0x25c>)
  5450. Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5451. 800641a: f10d 0005 add.w r0, sp, #5
  5452. Result_buf[bluecell_srcid] = MyControllerID;
  5453. 800641e: 781b ldrb r3, [r3, #0]
  5454. Result_buf[bluecell_length] = 3;
  5455. 8006420: f88d 1006 strb.w r1, [sp, #6]
  5456. Result_buf[bluecell_srcid] = MyControllerID;
  5457. 8006424: f88d 3007 strb.w r3, [sp, #7]
  5458. Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5459. 8006428: f000 ffb4 bl 8007394 <STH30_CreateCrc>
  5460. Result_buf[bluecell_srcid + 2] = 0xeb;
  5461. 800642c: 23eb movs r3, #235 ; 0xeb
  5462. Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5463. 800642e: f88d 0008 strb.w r0, [sp, #8]
  5464. Result_buf[bluecell_srcid + 2] = 0xeb;
  5465. 8006432: f88d 3009 strb.w r3, [sp, #9]
  5466. break;
  5467. 8006436: e74a b.n 80062ce <RGB_Controller_Func+0x82>
  5468. Result_buf[bluecell_stx] = 0xbe;
  5469. 8006438: 23be movs r3, #190 ; 0xbe
  5470. 800643a: f88d 3004 strb.w r3, [sp, #4]
  5471. Result_buf[bluecell_type] = RGB_ControllerLimitGet;
  5472. 800643e: 2312 movs r3, #18
  5473. Result_buf[bluecell_length] = 8;
  5474. 8006440: 2108 movs r1, #8
  5475. Result_buf[bluecell_type] = RGB_ControllerLimitGet;
  5476. 8006442: f88d 3005 strb.w r3, [sp, #5]
  5477. Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5478. 8006446: 4a1b ldr r2, [pc, #108] ; (80064b4 <RGB_Controller_Func+0x268>)
  5479. 8006448: 78e3 ldrb r3, [r4, #3]
  5480. Result_buf[bluecell_length] = 8;
  5481. 800644a: f88d 1006 strb.w r1, [sp, #6]
  5482. Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5483. 800644e: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
  5484. 8006452: fa22 f001 lsr.w r0, r2, r1
  5485. Result_buf[bluecell_srcid + 1] = RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0x00FF;
  5486. 8006456: f88d 2008 strb.w r2, [sp, #8]
  5487. Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5488. 800645a: 4a17 ldr r2, [pc, #92] ; (80064b8 <RGB_Controller_Func+0x26c>)
  5489. Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5490. 800645c: f88d 0007 strb.w r0, [sp, #7]
  5491. Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5492. 8006460: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
  5493. 8006464: fa22 f001 lsr.w r0, r2, r1
  5494. Result_buf[bluecell_srcid + 3] = RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0x00FF;
  5495. 8006468: f88d 200a strb.w r2, [sp, #10]
  5496. Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5497. 800646c: 4a13 ldr r2, [pc, #76] ; (80064bc <RGB_Controller_Func+0x270>)
  5498. Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5499. 800646e: f88d 0009 strb.w r0, [sp, #9]
  5500. Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5501. 8006472: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
  5502. Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5503. 8006476: f10d 0005 add.w r0, sp, #5
  5504. Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5505. 800647a: fa23 f201 lsr.w r2, r3, r1
  5506. Result_buf[bluecell_srcid + 5] = RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0x00FF;
  5507. 800647e: f88d 300c strb.w r3, [sp, #12]
  5508. Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;
  5509. 8006482: f88d 200b strb.w r2, [sp, #11]
  5510. Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5511. 8006486: f000 ff85 bl 8007394 <STH30_CreateCrc>
  5512. Result_buf[bluecell_srcid + 7] = 0xeb;
  5513. 800648a: 23eb movs r3, #235 ; 0xeb
  5514. Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
  5515. 800648c: f88d 000d strb.w r0, [sp, #13]
  5516. Result_buf[bluecell_srcid + 7] = 0xeb;
  5517. 8006490: f88d 300e strb.w r3, [sp, #14]
  5518. break;
  5519. 8006494: e71b b.n 80062ce <RGB_Controller_Func+0x82>
  5520. LoraDataSendSet(1);
  5521. 8006496: 2001 movs r0, #1
  5522. 8006498: f000 fada bl 8006a50 <LoraDataSendSet>
  5523. break;
  5524. 800649c: e717 b.n 80062ce <RGB_Controller_Func+0x82>
  5525. 800649e: bf00 nop
  5526. 80064a0: 200002fb .word 0x200002fb
  5527. 80064a4: 200002f3 .word 0x200002f3
  5528. 80064a8: 20000310 .word 0x20000310
  5529. 80064ac: 200002f2 .word 0x200002f2
  5530. 80064b0: 20000095 .word 0x20000095
  5531. 80064b4: 200002e0 .word 0x200002e0
  5532. 80064b8: 200002ce .word 0x200002ce
  5533. 80064bc: 200002bc .word 0x200002bc
  5534. 80064c0: e000ed00 .word 0xe000ed00
  5535. 80064c4: 05fa0004 .word 0x05fa0004
  5536. 080064c8 <SX1276_hw_SetNSS>:
  5537. SX1276_hw_SetNSS(hw, 1);
  5538. HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
  5539. }
  5540. __weak void SX1276_hw_SetNSS(SX1276_hw_t * hw, int value) {
  5541. HAL_GPIO_WritePin(hw->nss.port, hw->nss.pin,
  5542. 80064c8: 1e4b subs r3, r1, #1
  5543. 80064ca: 425a negs r2, r3
  5544. 80064cc: 8a01 ldrh r1, [r0, #16]
  5545. 80064ce: 415a adcs r2, r3
  5546. 80064d0: 6940 ldr r0, [r0, #20]
  5547. 80064d2: f7fe b8c9 b.w 8004668 <HAL_GPIO_WritePin>
  5548. 080064d6 <SX1276_hw_init>:
  5549. __weak void SX1276_hw_init(SX1276_hw_t * hw) {
  5550. 80064d6: b510 push {r4, lr}
  5551. 80064d8: 4604 mov r4, r0
  5552. SX1276_hw_SetNSS(hw, 1);
  5553. 80064da: 2101 movs r1, #1
  5554. 80064dc: f7ff fff4 bl 80064c8 <SX1276_hw_SetNSS>
  5555. HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
  5556. 80064e0: 8821 ldrh r1, [r4, #0]
  5557. 80064e2: 6860 ldr r0, [r4, #4]
  5558. 80064e4: 2201 movs r2, #1
  5559. }
  5560. 80064e6: e8bd 4010 ldmia.w sp!, {r4, lr}
  5561. HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
  5562. 80064ea: f7fe b8bd b.w 8004668 <HAL_GPIO_WritePin>
  5563. 080064ee <SX1276_hw_SPICommand>:
  5564. HAL_SPI_Transmit(hw->spi, &cmd, 1, 1000);
  5565. while (HAL_SPI_GetState(hw->spi) != HAL_SPI_STATE_READY)
  5566. ;
  5567. }
  5568. #endif // PYJ.2019.04.01_END --
  5569. void SX1276_hw_SPICommand(SX1276_hw_t * hw, uint8_t cmd) {
  5570. 80064ee: b510 push {r4, lr}
  5571. 80064f0: 460c mov r4, r1
  5572. SX1276_hw_SetNSS(hw, 0);
  5573. 80064f2: 2100 movs r1, #0
  5574. 80064f4: f7ff ffe8 bl 80064c8 <SX1276_hw_SetNSS>
  5575. BLUECELL_SPI_Transmit(cmd);
  5576. 80064f8: 4620 mov r0, r4
  5577. }
  5578. 80064fa: e8bd 4010 ldmia.w sp!, {r4, lr}
  5579. BLUECELL_SPI_Transmit(cmd);
  5580. 80064fe: f7ff bb61 b.w 8005bc4 <BLUECELL_SPI_Transmit>
  5581. 08006502 <SX1276_SPIBurstWrite.part.1>:
  5582. //printf("\n");
  5583. SX1276_hw_SetNSS(module->hw, 1);
  5584. }
  5585. }
  5586. void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf,
  5587. 8006502: b5f8 push {r3, r4, r5, r6, r7, lr}
  5588. 8006504: 460e mov r6, r1
  5589. 8006506: 4604 mov r4, r0
  5590. 8006508: 461f mov r7, r3
  5591. uint8_t length) {
  5592. uint8_t i;
  5593. if (length <= 1) {
  5594. return;
  5595. } else {
  5596. SX1276_hw_SetNSS(module->hw, 0);
  5597. 800650a: 2100 movs r1, #0
  5598. 800650c: 6800 ldr r0, [r0, #0]
  5599. void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf,
  5600. 800650e: 4615 mov r5, r2
  5601. SX1276_hw_SetNSS(module->hw, 0);
  5602. 8006510: f7ff ffda bl 80064c8 <SX1276_hw_SetNSS>
  5603. SX1276_hw_SPICommand(module->hw, addr | 0x80);
  5604. 8006514: f046 0180 orr.w r1, r6, #128 ; 0x80
  5605. 8006518: 6820 ldr r0, [r4, #0]
  5606. 800651a: f7ff ffe8 bl 80064ee <SX1276_hw_SPICommand>
  5607. 800651e: 3f01 subs r7, #1
  5608. 8006520: 1e6e subs r6, r5, #1
  5609. 8006522: 443d add r5, r7
  5610. // printf("Test Data:");
  5611. for (i = 0; i < length; i++) {
  5612. 8006524: 42ae cmp r6, r5
  5613. 8006526: d104 bne.n 8006532 <SX1276_SPIBurstWrite.part.1+0x30>
  5614. SX1276_hw_SPICommand(module->hw, txBuf[i]);
  5615. // printf("%02x ",txBuf[i]);
  5616. }
  5617. // printf("\n");
  5618. SX1276_hw_SetNSS(module->hw, 1);
  5619. 8006528: 2101 movs r1, #1
  5620. 800652a: 6820 ldr r0, [r4, #0]
  5621. 800652c: f7ff ffcc bl 80064c8 <SX1276_hw_SetNSS>
  5622. 8006530: bdf8 pop {r3, r4, r5, r6, r7, pc}
  5623. SX1276_hw_SPICommand(module->hw, txBuf[i]);
  5624. 8006532: f816 1f01 ldrb.w r1, [r6, #1]!
  5625. 8006536: 6820 ldr r0, [r4, #0]
  5626. 8006538: f7ff ffd9 bl 80064ee <SX1276_hw_SPICommand>
  5627. 800653c: e7f2 b.n 8006524 <SX1276_SPIBurstWrite.part.1+0x22>
  5628. 0800653e <SX1276_hw_SPIReadByte>:
  5629. uint8_t SX1276_hw_SPIReadByte(SX1276_hw_t * hw) {
  5630. 800653e: b508 push {r3, lr}
  5631. SX1276_hw_SetNSS(hw, 0);
  5632. 8006540: 2100 movs r1, #0
  5633. 8006542: f7ff ffc1 bl 80064c8 <SX1276_hw_SetNSS>
  5634. rxByte = SpiRead();
  5635. 8006546: f7ff fb17 bl 8005b78 <SpiRead>
  5636. }
  5637. 800654a: b2c0 uxtb r0, r0
  5638. 800654c: bd08 pop {r3, pc}
  5639. 0800654e <SX1276_hw_DelayMs>:
  5640. HAL_Delay(msec);
  5641. 800654e: f7fd beb1 b.w 80042b4 <HAL_Delay>
  5642. 08006552 <SX1276_hw_Reset>:
  5643. __weak void SX1276_hw_Reset(SX1276_hw_t * hw) {
  5644. 8006552: b510 push {r4, lr}
  5645. 8006554: 4604 mov r4, r0
  5646. SX1276_hw_SetNSS(hw, 1);
  5647. 8006556: 2101 movs r1, #1
  5648. 8006558: f7ff ffb6 bl 80064c8 <SX1276_hw_SetNSS>
  5649. HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_RESET);
  5650. 800655c: 8821 ldrh r1, [r4, #0]
  5651. 800655e: 2200 movs r2, #0
  5652. 8006560: 6860 ldr r0, [r4, #4]
  5653. 8006562: f7fe f881 bl 8004668 <HAL_GPIO_WritePin>
  5654. SX1276_hw_DelayMs(1);
  5655. 8006566: 2001 movs r0, #1
  5656. 8006568: f7ff fff1 bl 800654e <SX1276_hw_DelayMs>
  5657. HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
  5658. 800656c: 6860 ldr r0, [r4, #4]
  5659. 800656e: 2201 movs r2, #1
  5660. 8006570: 8821 ldrh r1, [r4, #0]
  5661. 8006572: f7fe f879 bl 8004668 <HAL_GPIO_WritePin>
  5662. SX1276_hw_DelayMs(100);
  5663. 8006576: 2064 movs r0, #100 ; 0x64
  5664. 8006578: f7ff ffe9 bl 800654e <SX1276_hw_DelayMs>
  5665. 800657c: bd10 pop {r4, pc}
  5666. 0800657e <SX1276_hw_GetDIO0>:
  5667. __weak int SX1276_hw_GetDIO0(SX1276_hw_t * hw) {
  5668. 800657e: b508 push {r3, lr}
  5669. return (HAL_GPIO_ReadPin(hw->dio0.port, hw->dio0.pin) == GPIO_PIN_SET);
  5670. 8006580: 8901 ldrh r1, [r0, #8]
  5671. 8006582: 68c0 ldr r0, [r0, #12]
  5672. 8006584: f7fe f86a bl 800465c <HAL_GPIO_ReadPin>
  5673. }
  5674. 8006588: 1e43 subs r3, r0, #1
  5675. 800658a: 4258 negs r0, r3
  5676. 800658c: 4158 adcs r0, r3
  5677. 800658e: bd08 pop {r3, pc}
  5678. 08006590 <SX1276_SPIIDRead>:
  5679. uint8_t SX1276_SPIIDRead(SX1276_t * module, uint8_t addr) {
  5680. 8006590: b538 push {r3, r4, r5, lr}
  5681. 8006592: 4604 mov r4, r0
  5682. SX1276_hw_SPICommand(module->hw, addr);
  5683. 8006594: 6800 ldr r0, [r0, #0]
  5684. 8006596: f7ff ffaa bl 80064ee <SX1276_hw_SPICommand>
  5685. tmp = SX1276_hw_SPIReadByte(module->hw);
  5686. 800659a: 6820 ldr r0, [r4, #0]
  5687. 800659c: f7ff ffcf bl 800653e <SX1276_hw_SPIReadByte>
  5688. 80065a0: 4605 mov r5, r0
  5689. SX1276_hw_SetNSS(module->hw, 1);
  5690. 80065a2: 2101 movs r1, #1
  5691. 80065a4: 6820 ldr r0, [r4, #0]
  5692. 80065a6: f7ff ff8f bl 80064c8 <SX1276_hw_SetNSS>
  5693. }
  5694. 80065aa: 4628 mov r0, r5
  5695. 80065ac: bd38 pop {r3, r4, r5, pc}
  5696. 080065ae <SX1276_SPIWrite>:
  5697. void SX1276_SPIWrite(SX1276_t * module, uint8_t addr, uint8_t cmd) {
  5698. 80065ae: b570 push {r4, r5, r6, lr}
  5699. 80065b0: 4604 mov r4, r0
  5700. 80065b2: 460e mov r6, r1
  5701. 80065b4: 4615 mov r5, r2
  5702. SX1276_hw_SetNSS(module->hw, 0);
  5703. 80065b6: 2100 movs r1, #0
  5704. 80065b8: 6800 ldr r0, [r0, #0]
  5705. 80065ba: f7ff ff85 bl 80064c8 <SX1276_hw_SetNSS>
  5706. SX1276_hw_SPICommand(module->hw, addr | 0x80);
  5707. 80065be: f046 0180 orr.w r1, r6, #128 ; 0x80
  5708. 80065c2: 6820 ldr r0, [r4, #0]
  5709. 80065c4: f7ff ff93 bl 80064ee <SX1276_hw_SPICommand>
  5710. SX1276_hw_SPICommand(module->hw, cmd);
  5711. 80065c8: 4629 mov r1, r5
  5712. 80065ca: 6820 ldr r0, [r4, #0]
  5713. 80065cc: f7ff ff8f bl 80064ee <SX1276_hw_SPICommand>
  5714. SX1276_hw_SetNSS(module->hw, 1);
  5715. 80065d0: 2101 movs r1, #1
  5716. 80065d2: 6820 ldr r0, [r4, #0]
  5717. 80065d4: f7ff ff78 bl 80064c8 <SX1276_hw_SetNSS>
  5718. 80065d8: bd70 pop {r4, r5, r6, pc}
  5719. 080065da <SX1276_SPIBurstRead>:
  5720. if (length <= 1) {
  5721. 80065da: 2b01 cmp r3, #1
  5722. uint8_t length) {
  5723. 80065dc: b5f8 push {r3, r4, r5, r6, r7, lr}
  5724. 80065de: 4605 mov r5, r0
  5725. 80065e0: 460f mov r7, r1
  5726. 80065e2: 4616 mov r6, r2
  5727. 80065e4: 461c mov r4, r3
  5728. if (length <= 1) {
  5729. 80065e6: d916 bls.n 8006616 <SX1276_SPIBurstRead+0x3c>
  5730. SX1276_hw_SetNSS(module->hw, 0);
  5731. 80065e8: 2100 movs r1, #0
  5732. 80065ea: 6800 ldr r0, [r0, #0]
  5733. 80065ec: f7ff ff6c bl 80064c8 <SX1276_hw_SetNSS>
  5734. SX1276_hw_SPICommand(module->hw, addr);
  5735. 80065f0: 4639 mov r1, r7
  5736. 80065f2: 6828 ldr r0, [r5, #0]
  5737. 80065f4: f7ff ff7b bl 80064ee <SX1276_hw_SPICommand>
  5738. 80065f8: 3c01 subs r4, #1
  5739. 80065fa: b2e4 uxtb r4, r4
  5740. 80065fc: 1e77 subs r7, r6, #1
  5741. 80065fe: 4434 add r4, r6
  5742. rxBuf[i] = SX1276_hw_SPIReadByte(module->hw);
  5743. 8006600: 6828 ldr r0, [r5, #0]
  5744. 8006602: f7ff ff9c bl 800653e <SX1276_hw_SPIReadByte>
  5745. 8006606: f807 0f01 strb.w r0, [r7, #1]!
  5746. for (i = 0; i < length; i++) {
  5747. 800660a: 42a7 cmp r7, r4
  5748. 800660c: d1f8 bne.n 8006600 <SX1276_SPIBurstRead+0x26>
  5749. SX1276_hw_SetNSS(module->hw, 1);
  5750. 800660e: 2101 movs r1, #1
  5751. 8006610: 6828 ldr r0, [r5, #0]
  5752. 8006612: f7ff ff59 bl 80064c8 <SX1276_hw_SetNSS>
  5753. 8006616: bdf8 pop {r3, r4, r5, r6, r7, pc}
  5754. 08006618 <SX1276_SPIBurstWrite>:
  5755. if (length <= 1) {
  5756. 8006618: 2b01 cmp r3, #1
  5757. 800661a: d901 bls.n 8006620 <SX1276_SPIBurstWrite+0x8>
  5758. 800661c: f7ff bf71 b.w 8006502 <SX1276_SPIBurstWrite.part.1>
  5759. 8006620: 4770 bx lr
  5760. 08006622 <SX1276_standby>:
  5761. SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01
  5762. module->readBytes = 0;
  5763. SX1276_standby(module); //Entry standby mode
  5764. }
  5765. void SX1276_standby(SX1276_t * module) {
  5766. 8006622: b510 push {r4, lr}
  5767. SX1276_SPIWrite(module, LR_RegOpMode, 0x09);
  5768. 8006624: 2209 movs r2, #9
  5769. 8006626: 2101 movs r1, #1
  5770. void SX1276_standby(SX1276_t * module) {
  5771. 8006628: 4604 mov r4, r0
  5772. SX1276_SPIWrite(module, LR_RegOpMode, 0x09);
  5773. 800662a: f7ff ffc0 bl 80065ae <SX1276_SPIWrite>
  5774. module->status = STANDBY;
  5775. 800662e: 2301 movs r3, #1
  5776. 8006630: 7263 strb r3, [r4, #9]
  5777. 8006632: bd10 pop {r4, pc}
  5778. 08006634 <SX1276_sleep>:
  5779. }
  5780. void SX1276_sleep(SX1276_t * module) {
  5781. 8006634: b510 push {r4, lr}
  5782. SX1276_SPIWrite(module, LR_RegOpMode, 0x08);
  5783. 8006636: 2208 movs r2, #8
  5784. 8006638: 2101 movs r1, #1
  5785. void SX1276_sleep(SX1276_t * module) {
  5786. 800663a: 4604 mov r4, r0
  5787. SX1276_SPIWrite(module, LR_RegOpMode, 0x08);
  5788. 800663c: f7ff ffb7 bl 80065ae <SX1276_SPIWrite>
  5789. module->status = SLEEP;
  5790. 8006640: 2300 movs r3, #0
  5791. 8006642: 7263 strb r3, [r4, #9]
  5792. 8006644: bd10 pop {r4, pc}
  5793. 08006646 <SX1276_entryLoRa>:
  5794. }
  5795. void SX1276_entryLoRa(SX1276_t * module) {
  5796. SX1276_SPIWrite(module, LR_RegOpMode, 0x88);
  5797. 8006646: 2288 movs r2, #136 ; 0x88
  5798. 8006648: 2101 movs r1, #1
  5799. 800664a: f7ff bfb0 b.w 80065ae <SX1276_SPIWrite>
  5800. ...
  5801. 08006650 <SX1276_config>:
  5802. uint8_t LoRa_Rate, uint8_t LoRa_BW) {
  5803. 8006650: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  5804. 8006654: 4604 mov r4, r0
  5805. 8006656: 460d mov r5, r1
  5806. 8006658: 4690 mov r8, r2
  5807. 800665a: 461f mov r7, r3
  5808. 800665c: f89d 6018 ldrb.w r6, [sp, #24]
  5809. SX1276_sleep(module); //Change modem mode Must in Sleep mode
  5810. 8006660: f7ff ffe8 bl 8006634 <SX1276_sleep>
  5811. SX1276_hw_DelayMs(15);
  5812. 8006664: 200f movs r0, #15
  5813. 8006666: f7ff ff72 bl 800654e <SX1276_hw_DelayMs>
  5814. SX1276_entryLoRa(module);
  5815. 800666a: 4620 mov r0, r4
  5816. 800666c: f7ff ffeb bl 8006646 <SX1276_entryLoRa>
  5817. 8006670: 4a32 ldr r2, [pc, #200] ; (800673c <SX1276_config+0xec>)
  5818. (uint8_t*) SX1276_Frequency[frequency], 3); //setting frequency parameter
  5819. 8006672: eb05 0545 add.w r5, r5, r5, lsl #1
  5820. 8006676: 442a add r2, r5
  5821. 8006678: 2303 movs r3, #3
  5822. 800667a: 2106 movs r1, #6
  5823. 800667c: 4620 mov r0, r4
  5824. 800667e: f7ff ff40 bl 8006502 <SX1276_SPIBurstWrite.part.1>
  5825. SX1276_SPIWrite(module, LR_RegPaConfig, SX1276_Power[power]); //Setting output power parameter
  5826. 8006682: 4b2f ldr r3, [pc, #188] ; (8006740 <SX1276_config+0xf0>)
  5827. 8006684: 2109 movs r1, #9
  5828. 8006686: f813 2008 ldrb.w r2, [r3, r8]
  5829. 800668a: 4620 mov r0, r4
  5830. 800668c: f7ff ff8f bl 80065ae <SX1276_SPIWrite>
  5831. SX1276_SPIWrite(module, LR_RegOcp, 0x0B); //RegOcp,Close Ocp
  5832. 8006690: 220b movs r2, #11
  5833. 8006692: 4620 mov r0, r4
  5834. 8006694: 4611 mov r1, r2
  5835. 8006696: f7ff ff8a bl 80065ae <SX1276_SPIWrite>
  5836. SX1276_SPIWrite(module, LR_RegLna, 0x23); //RegLNA,High & LNA Enable
  5837. 800669a: 2223 movs r2, #35 ; 0x23
  5838. 800669c: 210c movs r1, #12
  5839. 800669e: 4620 mov r0, r4
  5840. 80066a0: f7ff ff85 bl 80065ae <SX1276_SPIWrite>
  5841. if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6
  5842. 80066a4: 4b27 ldr r3, [pc, #156] ; (8006744 <SX1276_config+0xf4>)
  5843. 80066a6: 5ddd ldrb r5, [r3, r7]
  5844. 80066a8: 4b27 ldr r3, [pc, #156] ; (8006748 <SX1276_config+0xf8>)
  5845. 80066aa: 2d06 cmp r5, #6
  5846. ((SX1276_LoRaBandwidth[LoRa_BW] << 4) + (SX1276_CR << 1) + 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04)
  5847. 80066ac: 5d9a ldrb r2, [r3, r6]
  5848. 80066ae: ea4f 1202 mov.w r2, r2, lsl #4
  5849. if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6
  5850. 80066b2: d137 bne.n 8006724 <SX1276_config+0xd4>
  5851. SX1276_SPIWrite(module,
  5852. 80066b4: 3203 adds r2, #3
  5853. 80066b6: b2d2 uxtb r2, r2
  5854. 80066b8: 211d movs r1, #29
  5855. 80066ba: 4620 mov r0, r4
  5856. 80066bc: f7ff ff77 bl 80065ae <SX1276_SPIWrite>
  5857. SX1276_SPIWrite(module,
  5858. 80066c0: 2267 movs r2, #103 ; 0x67
  5859. 80066c2: 211e movs r1, #30
  5860. 80066c4: 4620 mov r0, r4
  5861. 80066c6: f7ff ff72 bl 80065ae <SX1276_SPIWrite>
  5862. tmp = SX1276_SPIRead(module, 0x31);
  5863. 80066ca: 2131 movs r1, #49 ; 0x31
  5864. 80066cc: 4620 mov r0, r4
  5865. 80066ce: f7ff ff5f bl 8006590 <SX1276_SPIIDRead>
  5866. tmp &= 0xF8;
  5867. 80066d2: f000 02f8 and.w r2, r0, #248 ; 0xf8
  5868. SX1276_SPIWrite(module, 0x31, tmp);
  5869. 80066d6: f042 0205 orr.w r2, r2, #5
  5870. 80066da: 2131 movs r1, #49 ; 0x31
  5871. 80066dc: 4620 mov r0, r4
  5872. 80066de: f7ff ff66 bl 80065ae <SX1276_SPIWrite>
  5873. SX1276_SPIWrite(module, 0x37, 0x0C);
  5874. 80066e2: 220c movs r2, #12
  5875. 80066e4: 2137 movs r1, #55 ; 0x37
  5876. SX1276_SPIWrite(module,
  5877. 80066e6: 4620 mov r0, r4
  5878. 80066e8: f7ff ff61 bl 80065ae <SX1276_SPIWrite>
  5879. SX1276_SPIWrite(module, LR_RegSymbTimeoutLsb, 0xFF); //RegSymbTimeoutLsb Timeout = 0x3FF(Max)
  5880. 80066ec: 4620 mov r0, r4
  5881. 80066ee: 22ff movs r2, #255 ; 0xff
  5882. 80066f0: 211f movs r1, #31
  5883. 80066f2: f7ff ff5c bl 80065ae <SX1276_SPIWrite>
  5884. SX1276_SPIWrite(module, LR_RegPreambleMsb, 0x00); //RegPreambleMsb
  5885. 80066f6: 4620 mov r0, r4
  5886. 80066f8: 2200 movs r2, #0
  5887. 80066fa: 2120 movs r1, #32
  5888. 80066fc: f7ff ff57 bl 80065ae <SX1276_SPIWrite>
  5889. SX1276_SPIWrite(module, LR_RegPreambleLsb, 12); //RegPreambleLsb 8+4=12byte Preamble
  5890. 8006700: 4620 mov r0, r4
  5891. 8006702: 220c movs r2, #12
  5892. 8006704: 2121 movs r1, #33 ; 0x21
  5893. 8006706: f7ff ff52 bl 80065ae <SX1276_SPIWrite>
  5894. SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01
  5895. 800670a: 4620 mov r0, r4
  5896. 800670c: 2201 movs r2, #1
  5897. 800670e: 2141 movs r1, #65 ; 0x41
  5898. 8006710: f7ff ff4d bl 80065ae <SX1276_SPIWrite>
  5899. module->readBytes = 0;
  5900. 8006714: 2300 movs r3, #0
  5901. SX1276_standby(module); //Entry standby mode
  5902. 8006716: 4620 mov r0, r4
  5903. module->readBytes = 0;
  5904. 8006718: f884 310a strb.w r3, [r4, #266] ; 0x10a
  5905. }
  5906. 800671c: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
  5907. SX1276_standby(module); //Entry standby mode
  5908. 8006720: f7ff bf7f b.w 8006622 <SX1276_standby>
  5909. SX1276_SPIWrite(module,
  5910. 8006724: 3202 adds r2, #2
  5911. 8006726: f002 02fe and.w r2, r2, #254 ; 0xfe
  5912. 800672a: 211d movs r1, #29
  5913. 800672c: 4620 mov r0, r4
  5914. 800672e: f7ff ff3e bl 80065ae <SX1276_SPIWrite>
  5915. ((SX1276_SpreadFactor[LoRa_Rate] << 4) + (SX1276_CRC << 2)
  5916. 8006732: 012a lsls r2, r5, #4
  5917. SX1276_SPIWrite(module,
  5918. 8006734: 3207 adds r2, #7
  5919. 8006736: b2d2 uxtb r2, r2
  5920. 8006738: 211e movs r1, #30
  5921. 800673a: e7d4 b.n 80066e6 <SX1276_config+0x96>
  5922. 800673c: 08008917 .word 0x08008917
  5923. 8006740: 08008924 .word 0x08008924
  5924. 8006744: 08008928 .word 0x08008928
  5925. 8006748: 0800891a .word 0x0800891a
  5926. 0800674c <SX1276_defaultConfig>:
  5927. void SX1276_defaultConfig(SX1276_t * module) {
  5928. 800674c: b513 push {r0, r1, r4, lr}
  5929. SX1276_config(module, module->frequency, module->power, module->LoRa_Rate,
  5930. 800674e: 79c4 ldrb r4, [r0, #7]
  5931. 8006750: 7983 ldrb r3, [r0, #6]
  5932. 8006752: 7942 ldrb r2, [r0, #5]
  5933. 8006754: 7901 ldrb r1, [r0, #4]
  5934. 8006756: 9400 str r4, [sp, #0]
  5935. 8006758: f7ff ff7a bl 8006650 <SX1276_config>
  5936. }
  5937. 800675c: b002 add sp, #8
  5938. 800675e: bd10 pop {r4, pc}
  5939. 08006760 <SX1276_clearLoRaIrq>:
  5940. }
  5941. void SX1276_clearLoRaIrq(SX1276_t * module) {
  5942. SX1276_SPIWrite(module, LR_RegIrqFlags, 0xFF);
  5943. 8006760: 22ff movs r2, #255 ; 0xff
  5944. 8006762: 2112 movs r1, #18
  5945. 8006764: f7ff bf23 b.w 80065ae <SX1276_SPIWrite>
  5946. 08006768 <SX1276_LoRaEntryRx>:
  5947. }
  5948. int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) {
  5949. 8006768: b570 push {r4, r5, r6, lr}
  5950. 800676a: 4604 mov r4, r0
  5951. 800676c: 460e mov r6, r1
  5952. uint8_t addr;
  5953. module->packetLength = length;
  5954. 800676e: 7221 strb r1, [r4, #8]
  5955. int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) {
  5956. 8006770: 4615 mov r5, r2
  5957. SX1276_defaultConfig(module); //Setting base parameter
  5958. 8006772: f7ff ffeb bl 800674c <SX1276_defaultConfig>
  5959. SX1276_SPIWrite(module, REG_LR_PADAC, 0x84); //Normal and RX
  5960. 8006776: 2284 movs r2, #132 ; 0x84
  5961. 8006778: 214d movs r1, #77 ; 0x4d
  5962. 800677a: 4620 mov r0, r4
  5963. 800677c: f7ff ff17 bl 80065ae <SX1276_SPIWrite>
  5964. SX1276_SPIWrite(module, LR_RegHopPeriod, 0xFF); //No FHSS
  5965. 8006780: 22ff movs r2, #255 ; 0xff
  5966. 8006782: 2124 movs r1, #36 ; 0x24
  5967. 8006784: 4620 mov r0, r4
  5968. 8006786: f7ff ff12 bl 80065ae <SX1276_SPIWrite>
  5969. SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x01);//DIO=00,DIO1=00,DIO2=00, DIO3=01
  5970. 800678a: 2201 movs r2, #1
  5971. 800678c: 2140 movs r1, #64 ; 0x40
  5972. 800678e: 4620 mov r0, r4
  5973. 8006790: f7ff ff0d bl 80065ae <SX1276_SPIWrite>
  5974. SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0x3F);//Open RxDone interrupt & Timeout
  5975. 8006794: 223f movs r2, #63 ; 0x3f
  5976. 8006796: 2111 movs r1, #17
  5977. 8006798: 4620 mov r0, r4
  5978. 800679a: f7ff ff08 bl 80065ae <SX1276_SPIWrite>
  5979. SX1276_clearLoRaIrq(module);
  5980. 800679e: 4620 mov r0, r4
  5981. 80067a0: f7ff ffde bl 8006760 <SX1276_clearLoRaIrq>
  5982. SX1276_SPIWrite(module, LR_RegPayloadLength, length);//Payload Length 21byte(this register must difine when the data long of one byte in SF is 6)
  5983. 80067a4: 4632 mov r2, r6
  5984. 80067a6: 2122 movs r1, #34 ; 0x22
  5985. 80067a8: 4620 mov r0, r4
  5986. 80067aa: f7ff ff00 bl 80065ae <SX1276_SPIWrite>
  5987. addr = SX1276_SPIRead(module, LR_RegFifoRxBaseAddr); //Read RxBaseAddr
  5988. 80067ae: 210f movs r1, #15
  5989. 80067b0: 4620 mov r0, r4
  5990. 80067b2: f7ff feed bl 8006590 <SX1276_SPIIDRead>
  5991. SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr->FiFoAddrPtr
  5992. 80067b6: 210d movs r1, #13
  5993. 80067b8: 4602 mov r2, r0
  5994. 80067ba: 4620 mov r0, r4
  5995. 80067bc: f7ff fef7 bl 80065ae <SX1276_SPIWrite>
  5996. SX1276_SPIWrite(module, LR_RegOpMode, 0x85); //Mode//Low Frequency Mode
  5997. 80067c0: 2285 movs r2, #133 ; 0x85
  5998. 80067c2: 2101 movs r1, #1
  5999. 80067c4: 4620 mov r0, r4
  6000. 80067c6: f7ff fef2 bl 80065ae <SX1276_SPIWrite>
  6001. //SX1276_SPIWrite(module, LR_RegOpMode,0x05); //Continuous Rx Mode //High Frequency Mode
  6002. module->readBytes = 0;
  6003. 80067ca: 2300 movs r3, #0
  6004. 80067cc: f884 310a strb.w r3, [r4, #266] ; 0x10a
  6005. while (1) {
  6006. if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat
  6007. 80067d0: 2118 movs r1, #24
  6008. 80067d2: 4620 mov r0, r4
  6009. 80067d4: f7ff fedc bl 8006590 <SX1276_SPIIDRead>
  6010. 80067d8: 0743 lsls r3, r0, #29
  6011. 80067da: d503 bpl.n 80067e4 <SX1276_LoRaEntryRx+0x7c>
  6012. module->status = RX;
  6013. 80067dc: 2303 movs r3, #3
  6014. return 1;
  6015. 80067de: 2001 movs r0, #1
  6016. module->status = RX;
  6017. 80067e0: 7263 strb r3, [r4, #9]
  6018. return 1;
  6019. 80067e2: bd70 pop {r4, r5, r6, pc}
  6020. }
  6021. if (--timeout == 0) {
  6022. 80067e4: 3d01 subs r5, #1
  6023. 80067e6: d107 bne.n 80067f8 <SX1276_LoRaEntryRx+0x90>
  6024. SX1276_hw_Reset(module->hw);
  6025. 80067e8: 6820 ldr r0, [r4, #0]
  6026. 80067ea: f7ff feb2 bl 8006552 <SX1276_hw_Reset>
  6027. SX1276_defaultConfig(module);
  6028. 80067ee: 4620 mov r0, r4
  6029. 80067f0: f7ff ffac bl 800674c <SX1276_defaultConfig>
  6030. return 0;
  6031. 80067f4: 4628 mov r0, r5
  6032. 80067f6: bd70 pop {r4, r5, r6, pc}
  6033. }
  6034. SX1276_hw_DelayMs(1);
  6035. 80067f8: 2001 movs r0, #1
  6036. 80067fa: f7ff fea8 bl 800654e <SX1276_hw_DelayMs>
  6037. if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat
  6038. 80067fe: e7e7 b.n 80067d0 <SX1276_LoRaEntryRx+0x68>
  6039. 08006800 <SX1276_LoRaRxPacket>:
  6040. }
  6041. }
  6042. uint8_t SX1276_LoRaRxPacket(SX1276_t * module) {
  6043. 8006800: b570 push {r4, r5, r6, lr}
  6044. 8006802: 4604 mov r4, r0
  6045. unsigned char addr;
  6046. unsigned char packet_size;
  6047. if (SX1276_hw_GetDIO0(module->hw)) {
  6048. 8006804: 6800 ldr r0, [r0, #0]
  6049. 8006806: f7ff feba bl 800657e <SX1276_hw_GetDIO0>
  6050. 800680a: b1f0 cbz r0, 800684a <SX1276_LoRaRxPacket+0x4a>
  6051. memset(module->rxBuffer, 0x00, SX1276_MAX_PACKET);
  6052. 800680c: f104 060a add.w r6, r4, #10
  6053. 8006810: f44f 7280 mov.w r2, #256 ; 0x100
  6054. 8006814: 2100 movs r1, #0
  6055. 8006816: 4630 mov r0, r6
  6056. 8006818: f000 ff55 bl 80076c6 <memset>
  6057. addr = SX1276_SPIRead(module, LR_RegFifoRxCurrentaddr); //last packet addr
  6058. 800681c: 2110 movs r1, #16
  6059. 800681e: 4620 mov r0, r4
  6060. 8006820: f7ff feb6 bl 8006590 <SX1276_SPIIDRead>
  6061. SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr -> FiFoAddrPtr
  6062. 8006824: 210d movs r1, #13
  6063. 8006826: 4602 mov r2, r0
  6064. 8006828: 4620 mov r0, r4
  6065. 800682a: f7ff fec0 bl 80065ae <SX1276_SPIWrite>
  6066. if (module->LoRa_Rate == SX1276_LORA_SF_6) { //When SpreadFactor is six,will used Implicit Header mode(Excluding internal packet length)
  6067. 800682e: 79a3 ldrb r3, [r4, #6]
  6068. 8006830: b973 cbnz r3, 8006850 <SX1276_LoRaRxPacket+0x50>
  6069. packet_size = module->packetLength;
  6070. 8006832: 7a25 ldrb r5, [r4, #8]
  6071. } else {
  6072. packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes
  6073. }
  6074. SX1276_SPIBurstRead(module, 0x00, module->rxBuffer, packet_size);
  6075. 8006834: 4620 mov r0, r4
  6076. 8006836: 462b mov r3, r5
  6077. 8006838: 4632 mov r2, r6
  6078. 800683a: 2100 movs r1, #0
  6079. 800683c: f7ff fecd bl 80065da <SX1276_SPIBurstRead>
  6080. module->readBytes = packet_size;
  6081. 8006840: f884 510a strb.w r5, [r4, #266] ; 0x10a
  6082. SX1276_clearLoRaIrq(module);
  6083. 8006844: 4620 mov r0, r4
  6084. 8006846: f7ff ff8b bl 8006760 <SX1276_clearLoRaIrq>
  6085. }
  6086. return module->readBytes;
  6087. }
  6088. 800684a: f894 010a ldrb.w r0, [r4, #266] ; 0x10a
  6089. 800684e: bd70 pop {r4, r5, r6, pc}
  6090. packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes
  6091. 8006850: 2113 movs r1, #19
  6092. 8006852: 4620 mov r0, r4
  6093. 8006854: f7ff fe9c bl 8006590 <SX1276_SPIIDRead>
  6094. 8006858: 4605 mov r5, r0
  6095. 800685a: e7eb b.n 8006834 <SX1276_LoRaRxPacket+0x34>
  6096. 0800685c <SX1276_LoRaEntryTx>:
  6097. int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) {
  6098. 800685c: b570 push {r4, r5, r6, lr}
  6099. 800685e: 4604 mov r4, r0
  6100. 8006860: 460e mov r6, r1
  6101. uint8_t addr;
  6102. uint8_t temp;
  6103. module->packetLength = length;
  6104. 8006862: 7221 strb r1, [r4, #8]
  6105. int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) {
  6106. 8006864: 4615 mov r5, r2
  6107. SX1276_defaultConfig(module); //setting base parameter
  6108. 8006866: f7ff ff71 bl 800674c <SX1276_defaultConfig>
  6109. SX1276_SPIWrite(module, REG_LR_PADAC, 0x87); //Tx for 20dBm
  6110. 800686a: 2287 movs r2, #135 ; 0x87
  6111. 800686c: 214d movs r1, #77 ; 0x4d
  6112. 800686e: 4620 mov r0, r4
  6113. 8006870: f7ff fe9d bl 80065ae <SX1276_SPIWrite>
  6114. SX1276_SPIWrite(module, LR_RegHopPeriod, 0x00); //RegHopPeriod NO FHSS
  6115. 8006874: 2200 movs r2, #0
  6116. 8006876: 2124 movs r1, #36 ; 0x24
  6117. 8006878: 4620 mov r0, r4
  6118. 800687a: f7ff fe98 bl 80065ae <SX1276_SPIWrite>
  6119. SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01
  6120. 800687e: 2241 movs r2, #65 ; 0x41
  6121. 8006880: 2140 movs r1, #64 ; 0x40
  6122. 8006882: 4620 mov r0, r4
  6123. 8006884: f7ff fe93 bl 80065ae <SX1276_SPIWrite>
  6124. SX1276_clearLoRaIrq(module);
  6125. 8006888: 4620 mov r0, r4
  6126. 800688a: f7ff ff69 bl 8006760 <SX1276_clearLoRaIrq>
  6127. SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0xF7); //Open TxDone interrupt
  6128. 800688e: 22f7 movs r2, #247 ; 0xf7
  6129. 8006890: 2111 movs r1, #17
  6130. 8006892: 4620 mov r0, r4
  6131. 8006894: f7ff fe8b bl 80065ae <SX1276_SPIWrite>
  6132. SX1276_SPIWrite(module, LR_RegPayloadLength, length); //RegPayloadLength 21byte
  6133. 8006898: 4632 mov r2, r6
  6134. 800689a: 2122 movs r1, #34 ; 0x22
  6135. 800689c: 4620 mov r0, r4
  6136. 800689e: f7ff fe86 bl 80065ae <SX1276_SPIWrite>
  6137. addr = SX1276_SPIRead(module, LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr
  6138. 80068a2: 210e movs r1, #14
  6139. 80068a4: 4620 mov r0, r4
  6140. 80068a6: f7ff fe73 bl 8006590 <SX1276_SPIIDRead>
  6141. SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RegFifoAddrPtr
  6142. 80068aa: 210d movs r1, #13
  6143. 80068ac: 4602 mov r2, r0
  6144. 80068ae: 4620 mov r0, r4
  6145. 80068b0: f7ff fe7d bl 80065ae <SX1276_SPIWrite>
  6146. while (1) {
  6147. temp = SX1276_SPIRead(module, LR_RegPayloadLength);
  6148. 80068b4: 2122 movs r1, #34 ; 0x22
  6149. 80068b6: 4620 mov r0, r4
  6150. 80068b8: f7ff fe6a bl 8006590 <SX1276_SPIIDRead>
  6151. if (temp == length) {
  6152. 80068bc: 4286 cmp r6, r0
  6153. 80068be: d103 bne.n 80068c8 <SX1276_LoRaEntryTx+0x6c>
  6154. module->status = TX;
  6155. 80068c0: 2302 movs r3, #2
  6156. return 1;
  6157. 80068c2: 2001 movs r0, #1
  6158. module->status = TX;
  6159. 80068c4: 7263 strb r3, [r4, #9]
  6160. return 1;
  6161. 80068c6: bd70 pop {r4, r5, r6, pc}
  6162. }
  6163. if (--timeout == 0) {
  6164. 80068c8: 3d01 subs r5, #1
  6165. 80068ca: d1f3 bne.n 80068b4 <SX1276_LoRaEntryTx+0x58>
  6166. SX1276_hw_Reset(module->hw);
  6167. 80068cc: 6820 ldr r0, [r4, #0]
  6168. 80068ce: f7ff fe40 bl 8006552 <SX1276_hw_Reset>
  6169. SX1276_defaultConfig(module);
  6170. 80068d2: 4620 mov r0, r4
  6171. 80068d4: f7ff ff3a bl 800674c <SX1276_defaultConfig>
  6172. return 0;
  6173. 80068d8: 4628 mov r0, r5
  6174. }
  6175. }
  6176. }
  6177. 80068da: bd70 pop {r4, r5, r6, pc}
  6178. 080068dc <SX1276_LoRaTxPacket>:
  6179. int SX1276_LoRaTxPacket(SX1276_t * module, uint8_t* txBuffer, uint8_t length,
  6180. uint32_t timeout) {
  6181. 80068dc: b570 push {r4, r5, r6, lr}
  6182. 80068de: 4604 mov r4, r0
  6183. 80068e0: 461e mov r6, r3
  6184. SX1276_SPIBurstWrite(module, 0x00, txBuffer, length);
  6185. 80068e2: 4613 mov r3, r2
  6186. 80068e4: 460a mov r2, r1
  6187. 80068e6: 2100 movs r1, #0
  6188. 80068e8: f7ff fe96 bl 8006618 <SX1276_SPIBurstWrite>
  6189. SX1276_SPIWrite(module, LR_RegOpMode, 0x8b); //Tx Mode
  6190. 80068ec: 228b movs r2, #139 ; 0x8b
  6191. 80068ee: 2101 movs r1, #1
  6192. 80068f0: 4620 mov r0, r4
  6193. 80068f2: f7ff fe5c bl 80065ae <SX1276_SPIWrite>
  6194. while (1) {
  6195. if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over
  6196. 80068f6: 6820 ldr r0, [r4, #0]
  6197. 80068f8: f7ff fe41 bl 800657e <SX1276_hw_GetDIO0>
  6198. 80068fc: 4605 mov r5, r0
  6199. 80068fe: b160 cbz r0, 800691a <SX1276_LoRaTxPacket+0x3e>
  6200. SX1276_SPIRead(module, LR_RegIrqFlags);
  6201. 8006900: 2112 movs r1, #18
  6202. 8006902: 4620 mov r0, r4
  6203. 8006904: f7ff fe44 bl 8006590 <SX1276_SPIIDRead>
  6204. SX1276_clearLoRaIrq(module); //Clear irq
  6205. 8006908: 4620 mov r0, r4
  6206. 800690a: f7ff ff29 bl 8006760 <SX1276_clearLoRaIrq>
  6207. SX1276_standby(module); //Entry Standby mode
  6208. 800690e: 4620 mov r0, r4
  6209. 8006910: f7ff fe87 bl 8006622 <SX1276_standby>
  6210. return 1;
  6211. 8006914: 2501 movs r5, #1
  6212. SX1276_defaultConfig(module);
  6213. return 0;
  6214. }
  6215. SX1276_hw_DelayMs(1);
  6216. }
  6217. }
  6218. 8006916: 4628 mov r0, r5
  6219. 8006918: bd70 pop {r4, r5, r6, pc}
  6220. if (--timeout == 0) {
  6221. 800691a: 3e01 subs r6, #1
  6222. 800691c: d106 bne.n 800692c <SX1276_LoRaTxPacket+0x50>
  6223. SX1276_hw_Reset(module->hw);
  6224. 800691e: 6820 ldr r0, [r4, #0]
  6225. 8006920: f7ff fe17 bl 8006552 <SX1276_hw_Reset>
  6226. SX1276_defaultConfig(module);
  6227. 8006924: 4620 mov r0, r4
  6228. 8006926: f7ff ff11 bl 800674c <SX1276_defaultConfig>
  6229. 800692a: e7f4 b.n 8006916 <SX1276_LoRaTxPacket+0x3a>
  6230. SX1276_hw_DelayMs(1);
  6231. 800692c: 2001 movs r0, #1
  6232. 800692e: f7ff fe0e bl 800654e <SX1276_hw_DelayMs>
  6233. if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over
  6234. 8006932: e7e0 b.n 80068f6 <SX1276_LoRaTxPacket+0x1a>
  6235. 08006934 <SX1276_begin>:
  6236. void SX1276_begin(SX1276_t * module, uint8_t frequency, uint8_t power,
  6237. uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength) {
  6238. 8006934: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  6239. 8006938: 4604 mov r4, r0
  6240. 800693a: 4689 mov r9, r1
  6241. 800693c: 4690 mov r8, r2
  6242. 800693e: 461f mov r7, r3
  6243. 8006940: f89d 6020 ldrb.w r6, [sp, #32]
  6244. 8006944: f89d 5024 ldrb.w r5, [sp, #36] ; 0x24
  6245. SX1276_hw_init(module->hw);
  6246. 8006948: 6800 ldr r0, [r0, #0]
  6247. 800694a: f7ff fdc4 bl 80064d6 <SX1276_hw_init>
  6248. module->frequency = frequency;
  6249. 800694e: f884 9004 strb.w r9, [r4, #4]
  6250. module->power = power;
  6251. 8006952: f884 8005 strb.w r8, [r4, #5]
  6252. module->LoRa_Rate = LoRa_Rate;
  6253. 8006956: 71a7 strb r7, [r4, #6]
  6254. module->LoRa_BW = LoRa_BW;
  6255. 8006958: 71e6 strb r6, [r4, #7]
  6256. module->packetLength = packetLength;
  6257. 800695a: 7225 strb r5, [r4, #8]
  6258. SX1276_defaultConfig(module);
  6259. 800695c: 4620 mov r0, r4
  6260. }
  6261. 800695e: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  6262. SX1276_defaultConfig(module);
  6263. 8006962: f7ff bef3 b.w 800674c <SX1276_defaultConfig>
  6264. 08006966 <SX1276_read>:
  6265. uint8_t SX1276_available(SX1276_t * module) {
  6266. return SX1276_LoRaRxPacket(module);
  6267. }
  6268. uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) {
  6269. 8006966: b570 push {r4, r5, r6, lr}
  6270. 8006968: 460e mov r6, r1
  6271. if (length != module->readBytes)
  6272. 800696a: f890 410a ldrb.w r4, [r0, #266] ; 0x10a
  6273. uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) {
  6274. 800696e: 4605 mov r5, r0
  6275. length = module->readBytes;
  6276. memcpy(rxBuf, module->rxBuffer, length);
  6277. 8006970: f100 010a add.w r1, r0, #10
  6278. 8006974: 4622 mov r2, r4
  6279. 8006976: 4630 mov r0, r6
  6280. 8006978: f000 fe9a bl 80076b0 <memcpy>
  6281. rxBuf[length] = '\0';
  6282. 800697c: 2300 movs r3, #0
  6283. 800697e: 5533 strb r3, [r6, r4]
  6284. module->readBytes = 0;
  6285. 8006980: f885 310a strb.w r3, [r5, #266] ; 0x10a
  6286. return length;
  6287. }
  6288. 8006984: 4620 mov r0, r4
  6289. 8006986: bd70 pop {r4, r5, r6, pc}
  6290. 08006988 <HAL_UART_RxCpltCallback>:
  6291. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  6292. {
  6293. if(huart->Instance == USART1)//RGB Comunication
  6294. 8006988: 6802 ldr r2, [r0, #0]
  6295. 800698a: 4b17 ldr r3, [pc, #92] ; (80069e8 <HAL_UART_RxCpltCallback+0x60>)
  6296. {
  6297. 800698c: b510 push {r4, lr}
  6298. if(huart->Instance == USART1)//RGB Comunication
  6299. 800698e: 429a cmp r2, r3
  6300. {
  6301. 8006990: 4604 mov r4, r0
  6302. if(huart->Instance == USART1)//RGB Comunication
  6303. 8006992: d110 bne.n 80069b6 <HAL_UART_RxCpltCallback+0x2e>
  6304. {
  6305. buf1[count_in1] = rx1_data[0];//(uint8_t)USART2->DR;
  6306. 8006994: 4a15 ldr r2, [pc, #84] ; (80069ec <HAL_UART_RxCpltCallback+0x64>)
  6307. 8006996: 4916 ldr r1, [pc, #88] ; (80069f0 <HAL_UART_RxCpltCallback+0x68>)
  6308. 8006998: 7813 ldrb r3, [r2, #0]
  6309. 800699a: 7808 ldrb r0, [r1, #0]
  6310. 800699c: 4915 ldr r1, [pc, #84] ; (80069f4 <HAL_UART_RxCpltCallback+0x6c>)
  6311. 800699e: 54c8 strb r0, [r1, r3]
  6312. if(++count_in1>=buf_size){ count_in1 = 0; }
  6313. 80069a0: 3301 adds r3, #1
  6314. 80069a2: b2db uxtb r3, r3
  6315. 80069a4: 2b63 cmp r3, #99 ; 0x63
  6316. 80069a6: bf88 it hi
  6317. 80069a8: 2300 movhi r3, #0
  6318. UartDataRecvSet(1);
  6319. else
  6320. count_in1 = 0;
  6321. }
  6322. #endif // PYJ.2019.04.19_END --
  6323. HAL_UART_Receive_IT(&huart1,&rx1_data[0],1);
  6324. 80069aa: 4911 ldr r1, [pc, #68] ; (80069f0 <HAL_UART_RxCpltCallback+0x68>)
  6325. if(++count_in1>=buf_size){ count_in1 = 0; }
  6326. 80069ac: 7013 strb r3, [r2, #0]
  6327. HAL_UART_Receive_IT(&huart1,&rx1_data[0],1);
  6328. 80069ae: 4812 ldr r0, [pc, #72] ; (80069f8 <HAL_UART_RxCpltCallback+0x70>)
  6329. 80069b0: 2201 movs r2, #1
  6330. 80069b2: f7fe ff95 bl 80058e0 <HAL_UART_Receive_IT>
  6331. }
  6332. if(huart->Instance == USART2) // Lora?? ?†µ?‹ ?•˜?Š” ?¬?Џ
  6333. 80069b6: 6822 ldr r2, [r4, #0]
  6334. 80069b8: 4b10 ldr r3, [pc, #64] ; (80069fc <HAL_UART_RxCpltCallback+0x74>)
  6335. 80069ba: 429a cmp r2, r3
  6336. 80069bc: d112 bne.n 80069e4 <HAL_UART_RxCpltCallback+0x5c>
  6337. {
  6338. buf2[count_in2] = rx2_data[0];//(uint8_t)USART2->DR;
  6339. 80069be: 4a10 ldr r2, [pc, #64] ; (8006a00 <HAL_UART_RxCpltCallback+0x78>)
  6340. 80069c0: 4910 ldr r1, [pc, #64] ; (8006a04 <HAL_UART_RxCpltCallback+0x7c>)
  6341. 80069c2: 7813 ldrb r3, [r2, #0]
  6342. 80069c4: 7808 ldrb r0, [r1, #0]
  6343. 80069c6: 4910 ldr r1, [pc, #64] ; (8006a08 <HAL_UART_RxCpltCallback+0x80>)
  6344. 80069c8: 54c8 strb r0, [r1, r3]
  6345. if(++count_in2>=buf_size){ count_in2 = 0; }
  6346. 80069ca: 3301 adds r3, #1
  6347. 80069cc: b2db uxtb r3, r3
  6348. 80069ce: 2b63 cmp r3, #99 ; 0x63
  6349. 80069d0: bf88 it hi
  6350. 80069d2: 2300 movhi r3, #0
  6351. 80069d4: 7013 strb r3, [r2, #0]
  6352. else
  6353. count_in1 = 0;
  6354. // printf("UART 2 %d",((count_in2 -1) - 3));
  6355. }
  6356. #endif // PYJ.2019.04.19_END --
  6357. HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
  6358. 80069d6: 490b ldr r1, [pc, #44] ; (8006a04 <HAL_UART_RxCpltCallback+0x7c>)
  6359. 80069d8: 2201 movs r2, #1
  6360. if(++count_in>=buf_size) count_in=0;*/
  6361. HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
  6362. }
  6363. #endif // PYJ.2019.04.13_END --
  6364. }
  6365. 80069da: e8bd 4010 ldmia.w sp!, {r4, lr}
  6366. HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
  6367. 80069de: 480b ldr r0, [pc, #44] ; (8006a0c <HAL_UART_RxCpltCallback+0x84>)
  6368. 80069e0: f7fe bf7e b.w 80058e0 <HAL_UART_Receive_IT>
  6369. 80069e4: bd10 pop {r4, pc}
  6370. 80069e6: bf00 nop
  6371. 80069e8: 40013800 .word 0x40013800
  6372. 80069ec: 200003e0 .word 0x200003e0
  6373. 80069f0: 20000580 .word 0x20000580
  6374. 80069f4: 20000318 .word 0x20000318
  6375. 80069f8: 20000478 .word 0x20000478
  6376. 80069fc: 40004400 .word 0x40004400
  6377. 8006a00: 200003e1 .word 0x200003e1
  6378. 8006a04: 20000450 .word 0x20000450
  6379. 8006a08: 2000037c .word 0x2000037c
  6380. 8006a0c: 200005c4 .word 0x200005c4
  6381. 08006a10 <HAL_TIM_PeriodElapsedCallback>:
  6382. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  6383. {
  6384. if(htim->Instance == TIM6){
  6385. 8006a10: 6802 ldr r2, [r0, #0]
  6386. 8006a12: 4b0a ldr r3, [pc, #40] ; (8006a3c <HAL_TIM_PeriodElapsedCallback+0x2c>)
  6387. 8006a14: 429a cmp r2, r3
  6388. 8006a16: d10f bne.n 8006a38 <HAL_TIM_PeriodElapsedCallback+0x28>
  6389. UartTimerCnt++;
  6390. 8006a18: 4a09 ldr r2, [pc, #36] ; (8006a40 <HAL_TIM_PeriodElapsedCallback+0x30>)
  6391. 8006a1a: 6813 ldr r3, [r2, #0]
  6392. 8006a1c: 3301 adds r3, #1
  6393. 8006a1e: 6013 str r3, [r2, #0]
  6394. LedTimerCnt++;
  6395. 8006a20: 4a08 ldr r2, [pc, #32] ; (8006a44 <HAL_TIM_PeriodElapsedCallback+0x34>)
  6396. 8006a22: 6813 ldr r3, [r2, #0]
  6397. 8006a24: 3301 adds r3, #1
  6398. 8006a26: 6013 str r3, [r2, #0]
  6399. LoraTxTimerCnt++;
  6400. 8006a28: 4a07 ldr r2, [pc, #28] ; (8006a48 <HAL_TIM_PeriodElapsedCallback+0x38>)
  6401. 8006a2a: 6813 ldr r3, [r2, #0]
  6402. 8006a2c: 3301 adds r3, #1
  6403. 8006a2e: 6013 str r3, [r2, #0]
  6404. LoraAckTimerCnt++;
  6405. 8006a30: 4a06 ldr r2, [pc, #24] ; (8006a4c <HAL_TIM_PeriodElapsedCallback+0x3c>)
  6406. 8006a32: 6813 ldr r3, [r2, #0]
  6407. 8006a34: 3301 adds r3, #1
  6408. 8006a36: 6013 str r3, [r2, #0]
  6409. 8006a38: 4770 bx lr
  6410. 8006a3a: bf00 nop
  6411. 8006a3c: 40001000 .word 0x40001000
  6412. 8006a40: 20000314 .word 0x20000314
  6413. 8006a44: 20000304 .word 0x20000304
  6414. 8006a48: 2000030c .word 0x2000030c
  6415. 8006a4c: 20000308 .word 0x20000308
  6416. 08006a50 <LoraDataSendSet>:
  6417. }
  6418. }
  6419. void LoraDataSendSet(uint8_t val){
  6420. LoraDataSend = val;
  6421. 8006a50: 4b01 ldr r3, [pc, #4] ; (8006a58 <LoraDataSendSet+0x8>)
  6422. 8006a52: 7018 strb r0, [r3, #0]
  6423. 8006a54: 4770 bx lr
  6424. 8006a56: bf00 nop
  6425. 8006a58: 20000474 .word 0x20000474
  6426. 08006a5c <RGB_SensorIDAutoSet>:
  6427. }
  6428. uint8_t UartDataRecvGet(void){
  6429. return UartDataisReved;
  6430. }
  6431. void RGB_SensorIDAutoSet(uint8_t set){
  6432. RGB_SensorIDAutoset = set;
  6433. 8006a5c: 4b01 ldr r3, [pc, #4] ; (8006a64 <RGB_SensorIDAutoSet+0x8>)
  6434. 8006a5e: 7018 strb r0, [r3, #0]
  6435. 8006a60: 4770 bx lr
  6436. 8006a62: bf00 nop
  6437. 8006a64: 20000311 .word 0x20000311
  6438. 08006a68 <Uart2_Data_Send>:
  6439. uint8_t RGB_SensorIDAutoGet(void){
  6440. return RGB_SensorIDAutoset;
  6441. }
  6442. void Uart2_Data_Send(uint8_t* data,uint8_t size){
  6443. HAL_UART_Transmit(&huart2, data,size, 10);
  6444. 8006a68: 460a mov r2, r1
  6445. 8006a6a: 230a movs r3, #10
  6446. 8006a6c: 4601 mov r1, r0
  6447. 8006a6e: 4801 ldr r0, [pc, #4] ; (8006a74 <Uart2_Data_Send+0xc>)
  6448. 8006a70: f7fe beda b.w 8005828 <HAL_UART_Transmit>
  6449. 8006a74: 200005c4 .word 0x200005c4
  6450. 08006a78 <Uart1_Data_Send>:
  6451. }
  6452. void Uart1_Data_Send(uint8_t* data,uint8_t size){
  6453. HAL_UART_Transmit(&huart1, data,size, 10);
  6454. 8006a78: 460a mov r2, r1
  6455. 8006a7a: 230a movs r3, #10
  6456. 8006a7c: 4601 mov r1, r0
  6457. 8006a7e: 4801 ldr r0, [pc, #4] ; (8006a84 <Uart1_Data_Send+0xc>)
  6458. 8006a80: f7fe bed2 b.w 8005828 <HAL_UART_Transmit>
  6459. 8006a84: 20000478 .word 0x20000478
  6460. 08006a88 <_write>:
  6461. }
  6462. int _write (int file, uint8_t *ptr, uint16_t len)
  6463. {
  6464. 8006a88: b510 push {r4, lr}
  6465. 8006a8a: 4614 mov r4, r2
  6466. HAL_UART_Transmit (&huart1, ptr, len, 10);
  6467. 8006a8c: 230a movs r3, #10
  6468. 8006a8e: 4802 ldr r0, [pc, #8] ; (8006a98 <_write+0x10>)
  6469. 8006a90: f7fe feca bl 8005828 <HAL_UART_Transmit>
  6470. return len;
  6471. }
  6472. 8006a94: 4620 mov r0, r4
  6473. 8006a96: bd10 pop {r4, pc}
  6474. 8006a98: 20000478 .word 0x20000478
  6475. 08006a9c <Uart_dataCheck>:
  6476. *cnt = 0;
  6477. memset(buf,0x00,buf_size);
  6478. }
  6479. #else
  6480. void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){
  6481. 8006a9c: b5f8 push {r3, r4, r5, r6, r7, lr}
  6482. 8006a9e: 460d mov r5, r1
  6483. printf("%02x ",buf[i]);
  6484. }
  6485. printf("\r\n");
  6486. #endif
  6487. crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]);
  6488. 8006aa0: 7881 ldrb r1, [r0, #2]
  6489. void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){
  6490. 8006aa2: 4604 mov r4, r0
  6491. crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]);
  6492. 8006aa4: 1843 adds r3, r0, r1
  6493. 8006aa6: 785a ldrb r2, [r3, #1]
  6494. 8006aa8: 3001 adds r0, #1
  6495. 8006aaa: f000 fc8e bl 80073ca <STH30_CheckCrc>
  6496. if(crccheck == CHECKSUM_ERROR){
  6497. 8006aae: b9c8 cbnz r0, 8006ae4 <Uart_dataCheck+0x48>
  6498. for(uint8_t i = 0; i < (*cnt); i++){
  6499. printf("%02x ",Que_Buf[i]);
  6500. 8006ab0: 4f11 ldr r7, [pc, #68] ; (8006af8 <Uart_dataCheck+0x5c>)
  6501. for(uint8_t i = 0; i < (*cnt); i++){
  6502. 8006ab2: 782b ldrb r3, [r5, #0]
  6503. 8006ab4: 1c46 adds r6, r0, #1
  6504. 8006ab6: b2c0 uxtb r0, r0
  6505. 8006ab8: 4283 cmp r3, r0
  6506. 8006aba: d80d bhi.n 8006ad8 <Uart_dataCheck+0x3c>
  6507. }
  6508. printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,Que_Buf[Que_Buf[bluecell_length] + 1]);
  6509. 8006abc: 78a3 ldrb r3, [r4, #2]
  6510. 8006abe: 2100 movs r1, #0
  6511. 8006ac0: 4423 add r3, r4
  6512. 8006ac2: 785a ldrb r2, [r3, #1]
  6513. 8006ac4: 480d ldr r0, [pc, #52] ; (8006afc <Uart_dataCheck+0x60>)
  6514. 8006ac6: f000 fe07 bl 80076d8 <iprintf>
  6515. /*NOP*/
  6516. }
  6517. //*cnt = 0;
  6518. memset(Que_Buf,0x00,buf_size);
  6519. 8006aca: 4620 mov r0, r4
  6520. }
  6521. 8006acc: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
  6522. memset(Que_Buf,0x00,buf_size);
  6523. 8006ad0: 2264 movs r2, #100 ; 0x64
  6524. 8006ad2: 2100 movs r1, #0
  6525. 8006ad4: f000 bdf7 b.w 80076c6 <memset>
  6526. printf("%02x ",Que_Buf[i]);
  6527. 8006ad8: 5c21 ldrb r1, [r4, r0]
  6528. 8006ada: 4638 mov r0, r7
  6529. 8006adc: f000 fdfc bl 80076d8 <iprintf>
  6530. 8006ae0: 4630 mov r0, r6
  6531. 8006ae2: e7e6 b.n 8006ab2 <Uart_dataCheck+0x16>
  6532. else if(crccheck == NO_ERROR){
  6533. 8006ae4: 2801 cmp r0, #1
  6534. 8006ae6: d103 bne.n 8006af0 <Uart_dataCheck+0x54>
  6535. RGB_Controller_Func(&Que_Buf[bluecell_stx]);
  6536. 8006ae8: 4620 mov r0, r4
  6537. 8006aea: f7ff fbaf bl 800624c <RGB_Controller_Func>
  6538. 8006aee: e7ec b.n 8006aca <Uart_dataCheck+0x2e>
  6539. printf("What Happen?\r\n");
  6540. 8006af0: 4803 ldr r0, [pc, #12] ; (8006b00 <Uart_dataCheck+0x64>)
  6541. 8006af2: f000 fe79 bl 80077e8 <puts>
  6542. 8006af6: e7e8 b.n 8006aca <Uart_dataCheck+0x2e>
  6543. 8006af8: 0800893e .word 0x0800893e
  6544. 8006afc: 08008944 .word 0x08008944
  6545. 8006b00: 0800896a .word 0x0800896a
  6546. 08006b04 <RGB_Sensor_PowerOnOff>:
  6547. #endif // PYJ.2019.04.19_END --
  6548. void RGB_Sensor_PowerOnOff(uint8_t id){
  6549. 8006b04: b510 push {r4, lr}
  6550. 8006b06: 4604 mov r4, r0
  6551. printf("%d Power ON \r\n",id);
  6552. 8006b08: 4601 mov r1, r0
  6553. 8006b0a: 487b ldr r0, [pc, #492] ; (8006cf8 <RGB_Sensor_PowerOnOff+0x1f4>)
  6554. 8006b0c: f000 fde4 bl 80076d8 <iprintf>
  6555. switch(id){
  6556. 8006b10: 2c08 cmp r4, #8
  6557. 8006b12: f200 80ef bhi.w 8006cf4 <RGB_Sensor_PowerOnOff+0x1f0>
  6558. 8006b16: e8df f004 tbb [pc, r4]
  6559. 8006b1a: 05c3 .short 0x05c3
  6560. 8006b1c: 6854463e .word 0x6854463e
  6561. 8006b20: 9f81 .short 0x9f81
  6562. 8006b22: c3 .byte 0xc3
  6563. 8006b23: 00 .byte 0x00
  6564. HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
  6565. HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
  6566. HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET);
  6567. break;
  6568. case 1:
  6569. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_RESET);
  6570. 8006b24: 2200 movs r2, #0
  6571. 8006b26: f44f 5100 mov.w r1, #8192 ; 0x2000
  6572. 8006b2a: 4874 ldr r0, [pc, #464] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6573. 8006b2c: f7fd fd9c bl 8004668 <HAL_GPIO_WritePin>
  6574. HAL_Delay(50);
  6575. 8006b30: 2032 movs r0, #50 ; 0x32
  6576. 8006b32: f7fd fbbf bl 80042b4 <HAL_Delay>
  6577. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6578. 8006b36: 2201 movs r2, #1
  6579. 8006b38: f44f 5100 mov.w r1, #8192 ; 0x2000
  6580. 8006b3c: 486f ldr r0, [pc, #444] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6581. 8006b3e: f7fd fd93 bl 8004668 <HAL_GPIO_WritePin>
  6582. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_RESET);
  6583. 8006b42: 2200 movs r2, #0
  6584. HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET);
  6585. HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET);
  6586. break;
  6587. case 2:
  6588. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6589. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6590. 8006b44: f44f 4180 mov.w r1, #16384 ; 0x4000
  6591. 8006b48: 486c ldr r0, [pc, #432] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6592. 8006b4a: f7fd fd8d bl 8004668 <HAL_GPIO_WritePin>
  6593. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_RESET);
  6594. 8006b4e: 2200 movs r2, #0
  6595. 8006b50: f44f 4100 mov.w r1, #32768 ; 0x8000
  6596. 8006b54: 4869 ldr r0, [pc, #420] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6597. 8006b56: f7fd fd87 bl 8004668 <HAL_GPIO_WritePin>
  6598. HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_RESET);
  6599. 8006b5a: 2200 movs r2, #0
  6600. 8006b5c: 2140 movs r1, #64 ; 0x40
  6601. 8006b5e: 4868 ldr r0, [pc, #416] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6602. 8006b60: f7fd fd82 bl 8004668 <HAL_GPIO_WritePin>
  6603. HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_RESET);
  6604. 8006b64: 2200 movs r2, #0
  6605. 8006b66: 2180 movs r1, #128 ; 0x80
  6606. 8006b68: 4865 ldr r0, [pc, #404] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6607. 8006b6a: f7fd fd7d bl 8004668 <HAL_GPIO_WritePin>
  6608. HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_RESET);
  6609. 8006b6e: 2200 movs r2, #0
  6610. 8006b70: f44f 7180 mov.w r1, #256 ; 0x100
  6611. 8006b74: 4862 ldr r0, [pc, #392] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6612. 8006b76: f7fd fd77 bl 8004668 <HAL_GPIO_WritePin>
  6613. HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET);
  6614. 8006b7a: 2200 movs r2, #0
  6615. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6616. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);
  6617. HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
  6618. HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
  6619. HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
  6620. HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
  6621. 8006b7c: f44f 7100 mov.w r1, #512 ; 0x200
  6622. 8006b80: 485f ldr r0, [pc, #380] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6623. 8006b82: f7fd fd71 bl 8004668 <HAL_GPIO_WritePin>
  6624. HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET);
  6625. 8006b86: 2200 movs r2, #0
  6626. HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
  6627. HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET);
  6628. break;
  6629. }
  6630. }
  6631. 8006b88: e8bd 4010 ldmia.w sp!, {r4, lr}
  6632. HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET);
  6633. 8006b8c: f44f 7180 mov.w r1, #256 ; 0x100
  6634. 8006b90: 485c ldr r0, [pc, #368] ; (8006d04 <RGB_Sensor_PowerOnOff+0x200>)
  6635. 8006b92: f7fd bd69 b.w 8004668 <HAL_GPIO_WritePin>
  6636. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6637. 8006b96: 2201 movs r2, #1
  6638. 8006b98: f44f 5100 mov.w r1, #8192 ; 0x2000
  6639. 8006b9c: 4857 ldr r0, [pc, #348] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6640. 8006b9e: f7fd fd63 bl 8004668 <HAL_GPIO_WritePin>
  6641. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6642. 8006ba2: 2201 movs r2, #1
  6643. 8006ba4: e7ce b.n 8006b44 <RGB_Sensor_PowerOnOff+0x40>
  6644. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6645. 8006ba6: 2201 movs r2, #1
  6646. 8006ba8: f44f 5100 mov.w r1, #8192 ; 0x2000
  6647. 8006bac: 4853 ldr r0, [pc, #332] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6648. 8006bae: f7fd fd5b bl 8004668 <HAL_GPIO_WritePin>
  6649. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6650. 8006bb2: 2201 movs r2, #1
  6651. 8006bb4: f44f 4180 mov.w r1, #16384 ; 0x4000
  6652. 8006bb8: 4850 ldr r0, [pc, #320] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6653. 8006bba: f7fd fd55 bl 8004668 <HAL_GPIO_WritePin>
  6654. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);
  6655. 8006bbe: 2201 movs r2, #1
  6656. 8006bc0: e7c6 b.n 8006b50 <RGB_Sensor_PowerOnOff+0x4c>
  6657. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6658. 8006bc2: 2201 movs r2, #1
  6659. 8006bc4: f44f 5100 mov.w r1, #8192 ; 0x2000
  6660. 8006bc8: 484c ldr r0, [pc, #304] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6661. 8006bca: f7fd fd4d bl 8004668 <HAL_GPIO_WritePin>
  6662. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6663. 8006bce: 2201 movs r2, #1
  6664. 8006bd0: f44f 4180 mov.w r1, #16384 ; 0x4000
  6665. 8006bd4: 4849 ldr r0, [pc, #292] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6666. 8006bd6: f7fd fd47 bl 8004668 <HAL_GPIO_WritePin>
  6667. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);
  6668. 8006bda: 2201 movs r2, #1
  6669. 8006bdc: f44f 4100 mov.w r1, #32768 ; 0x8000
  6670. 8006be0: 4846 ldr r0, [pc, #280] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6671. 8006be2: f7fd fd41 bl 8004668 <HAL_GPIO_WritePin>
  6672. HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
  6673. 8006be6: 2201 movs r2, #1
  6674. 8006be8: e7b8 b.n 8006b5c <RGB_Sensor_PowerOnOff+0x58>
  6675. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6676. 8006bea: 2201 movs r2, #1
  6677. 8006bec: f44f 5100 mov.w r1, #8192 ; 0x2000
  6678. 8006bf0: 4842 ldr r0, [pc, #264] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6679. 8006bf2: f7fd fd39 bl 8004668 <HAL_GPIO_WritePin>
  6680. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6681. 8006bf6: 2201 movs r2, #1
  6682. 8006bf8: f44f 4180 mov.w r1, #16384 ; 0x4000
  6683. 8006bfc: 483f ldr r0, [pc, #252] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6684. 8006bfe: f7fd fd33 bl 8004668 <HAL_GPIO_WritePin>
  6685. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);
  6686. 8006c02: 2201 movs r2, #1
  6687. 8006c04: f44f 4100 mov.w r1, #32768 ; 0x8000
  6688. 8006c08: 483c ldr r0, [pc, #240] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6689. 8006c0a: f7fd fd2d bl 8004668 <HAL_GPIO_WritePin>
  6690. HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
  6691. 8006c0e: 2201 movs r2, #1
  6692. 8006c10: 2140 movs r1, #64 ; 0x40
  6693. 8006c12: 483b ldr r0, [pc, #236] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6694. 8006c14: f7fd fd28 bl 8004668 <HAL_GPIO_WritePin>
  6695. HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
  6696. 8006c18: 2201 movs r2, #1
  6697. 8006c1a: e7a4 b.n 8006b66 <RGB_Sensor_PowerOnOff+0x62>
  6698. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6699. 8006c1c: 2201 movs r2, #1
  6700. 8006c1e: f44f 5100 mov.w r1, #8192 ; 0x2000
  6701. 8006c22: 4836 ldr r0, [pc, #216] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6702. 8006c24: f7fd fd20 bl 8004668 <HAL_GPIO_WritePin>
  6703. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6704. 8006c28: 2201 movs r2, #1
  6705. 8006c2a: f44f 4180 mov.w r1, #16384 ; 0x4000
  6706. 8006c2e: 4833 ldr r0, [pc, #204] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6707. 8006c30: f7fd fd1a bl 8004668 <HAL_GPIO_WritePin>
  6708. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);
  6709. 8006c34: 2201 movs r2, #1
  6710. 8006c36: f44f 4100 mov.w r1, #32768 ; 0x8000
  6711. 8006c3a: 4830 ldr r0, [pc, #192] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6712. 8006c3c: f7fd fd14 bl 8004668 <HAL_GPIO_WritePin>
  6713. HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
  6714. 8006c40: 2201 movs r2, #1
  6715. 8006c42: 2140 movs r1, #64 ; 0x40
  6716. 8006c44: 482e ldr r0, [pc, #184] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6717. 8006c46: f7fd fd0f bl 8004668 <HAL_GPIO_WritePin>
  6718. HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
  6719. 8006c4a: 2201 movs r2, #1
  6720. 8006c4c: 2180 movs r1, #128 ; 0x80
  6721. 8006c4e: 482c ldr r0, [pc, #176] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6722. 8006c50: f7fd fd0a bl 8004668 <HAL_GPIO_WritePin>
  6723. HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
  6724. 8006c54: 2201 movs r2, #1
  6725. 8006c56: e78b b.n 8006b70 <RGB_Sensor_PowerOnOff+0x6c>
  6726. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6727. 8006c58: 2201 movs r2, #1
  6728. 8006c5a: f44f 5100 mov.w r1, #8192 ; 0x2000
  6729. 8006c5e: 4827 ldr r0, [pc, #156] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6730. 8006c60: f7fd fd02 bl 8004668 <HAL_GPIO_WritePin>
  6731. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6732. 8006c64: 2201 movs r2, #1
  6733. 8006c66: f44f 4180 mov.w r1, #16384 ; 0x4000
  6734. 8006c6a: 4824 ldr r0, [pc, #144] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6735. 8006c6c: f7fd fcfc bl 8004668 <HAL_GPIO_WritePin>
  6736. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);
  6737. 8006c70: 2201 movs r2, #1
  6738. 8006c72: f44f 4100 mov.w r1, #32768 ; 0x8000
  6739. 8006c76: 4821 ldr r0, [pc, #132] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6740. 8006c78: f7fd fcf6 bl 8004668 <HAL_GPIO_WritePin>
  6741. HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
  6742. 8006c7c: 2201 movs r2, #1
  6743. 8006c7e: 2140 movs r1, #64 ; 0x40
  6744. 8006c80: 481f ldr r0, [pc, #124] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6745. 8006c82: f7fd fcf1 bl 8004668 <HAL_GPIO_WritePin>
  6746. HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
  6747. 8006c86: 2201 movs r2, #1
  6748. 8006c88: 2180 movs r1, #128 ; 0x80
  6749. 8006c8a: 481d ldr r0, [pc, #116] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6750. 8006c8c: f7fd fcec bl 8004668 <HAL_GPIO_WritePin>
  6751. HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
  6752. 8006c90: 2201 movs r2, #1
  6753. 8006c92: f44f 7180 mov.w r1, #256 ; 0x100
  6754. 8006c96: 481a ldr r0, [pc, #104] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6755. 8006c98: f7fd fce6 bl 8004668 <HAL_GPIO_WritePin>
  6756. HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
  6757. 8006c9c: 2201 movs r2, #1
  6758. 8006c9e: e76d b.n 8006b7c <RGB_Sensor_PowerOnOff+0x78>
  6759. HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
  6760. 8006ca0: 2201 movs r2, #1
  6761. 8006ca2: f44f 5100 mov.w r1, #8192 ; 0x2000
  6762. 8006ca6: 4815 ldr r0, [pc, #84] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6763. 8006ca8: f7fd fcde bl 8004668 <HAL_GPIO_WritePin>
  6764. HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);
  6765. 8006cac: 2201 movs r2, #1
  6766. 8006cae: f44f 4180 mov.w r1, #16384 ; 0x4000
  6767. 8006cb2: 4812 ldr r0, [pc, #72] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6768. 8006cb4: f7fd fcd8 bl 8004668 <HAL_GPIO_WritePin>
  6769. HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);
  6770. 8006cb8: 2201 movs r2, #1
  6771. 8006cba: f44f 4100 mov.w r1, #32768 ; 0x8000
  6772. 8006cbe: 480f ldr r0, [pc, #60] ; (8006cfc <RGB_Sensor_PowerOnOff+0x1f8>)
  6773. 8006cc0: f7fd fcd2 bl 8004668 <HAL_GPIO_WritePin>
  6774. HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
  6775. 8006cc4: 2201 movs r2, #1
  6776. 8006cc6: 2140 movs r1, #64 ; 0x40
  6777. 8006cc8: 480d ldr r0, [pc, #52] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6778. 8006cca: f7fd fccd bl 8004668 <HAL_GPIO_WritePin>
  6779. HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
  6780. 8006cce: 2201 movs r2, #1
  6781. 8006cd0: 2180 movs r1, #128 ; 0x80
  6782. 8006cd2: 480b ldr r0, [pc, #44] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6783. 8006cd4: f7fd fcc8 bl 8004668 <HAL_GPIO_WritePin>
  6784. HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
  6785. 8006cd8: 2201 movs r2, #1
  6786. 8006cda: f44f 7180 mov.w r1, #256 ; 0x100
  6787. 8006cde: 4808 ldr r0, [pc, #32] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6788. 8006ce0: f7fd fcc2 bl 8004668 <HAL_GPIO_WritePin>
  6789. HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
  6790. 8006ce4: 2201 movs r2, #1
  6791. 8006ce6: f44f 7100 mov.w r1, #512 ; 0x200
  6792. 8006cea: 4805 ldr r0, [pc, #20] ; (8006d00 <RGB_Sensor_PowerOnOff+0x1fc>)
  6793. 8006cec: f7fd fcbc bl 8004668 <HAL_GPIO_WritePin>
  6794. HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET);
  6795. 8006cf0: 2201 movs r2, #1
  6796. 8006cf2: e749 b.n 8006b88 <RGB_Sensor_PowerOnOff+0x84>
  6797. 8006cf4: bd10 pop {r4, pc}
  6798. 8006cf6: bf00 nop
  6799. 8006cf8: 0800892f .word 0x0800892f
  6800. 8006cfc: 40010c00 .word 0x40010c00
  6801. 8006d00: 40011000 .word 0x40011000
  6802. 8006d04: 40010800 .word 0x40010800
  6803. 08006d08 <Flash_InitRead>:
  6804. HAL_FLASH_Lock(); // lock 잠그기
  6805. __HAL_RCC_TIM7_CLK_ENABLE(); // 매인타이머를 재시작합니다
  6806. }
  6807. void Flash_InitRead(void) // 쓰기함수
  6808. {
  6809. 8006d08: b530 push {r4, r5, lr}
  6810. 8006d0a: 480a ldr r0, [pc, #40] ; (8006d34 <Flash_InitRead+0x2c>)
  6811. 8006d0c: 490a ldr r1, [pc, #40] ; (8006d38 <Flash_InitRead+0x30>)
  6812. 8006d0e: 4a0b ldr r2, [pc, #44] ; (8006d3c <Flash_InitRead+0x34>)
  6813. 8006d10: 4b0b ldr r3, [pc, #44] ; (8006d40 <Flash_InitRead+0x38>)
  6814. uint32_t Address = 0;
  6815. Address = StartAddr;
  6816. for(uint8_t i = 1; i <= 8; i++ ){
  6817. 8006d12: 4c0c ldr r4, [pc, #48] ; (8006d44 <Flash_InitRead+0x3c>)
  6818. RGB_SensorRedLimit_Buf[i] = (*(uint16_t*)Address);
  6819. 8006d14: f833 5c06 ldrh.w r5, [r3, #-6]
  6820. 8006d18: 3306 adds r3, #6
  6821. 8006d1a: f820 5f02 strh.w r5, [r0, #2]!
  6822. // printf("%08x : %04X \n",Address ,*(uint16_t*)Address);
  6823. Address += 2;
  6824. RGB_SensorGreenLimit_Buf[i] = (*(uint16_t*)Address);
  6825. 8006d1e: f833 5c0a ldrh.w r5, [r3, #-10]
  6826. 8006d22: f821 5f02 strh.w r5, [r1, #2]!
  6827. // printf("%08x : %04X \n",Address ,*(uint16_t*)Address);
  6828. Address += 2;
  6829. RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address);
  6830. 8006d26: f833 5c08 ldrh.w r5, [r3, #-8]
  6831. for(uint8_t i = 1; i <= 8; i++ ){
  6832. 8006d2a: 42a3 cmp r3, r4
  6833. RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address);
  6834. 8006d2c: f822 5f02 strh.w r5, [r2, #2]!
  6835. for(uint8_t i = 1; i <= 8; i++ ){
  6836. 8006d30: d1f0 bne.n 8006d14 <Flash_InitRead+0xc>
  6837. // printf("%08x : %04X \n",Address ,*(uint16_t*)Address);
  6838. Address += 2;
  6839. }
  6840. }
  6841. 8006d32: bd30 pop {r4, r5, pc}
  6842. 8006d34: 200002e0 .word 0x200002e0
  6843. 8006d38: 200002ce .word 0x200002ce
  6844. 8006d3c: 200002bc .word 0x200002bc
  6845. 8006d40: 08030006 .word 0x08030006
  6846. 8006d44: 08030036 .word 0x08030036
  6847. 08006d48 <SystemClock_Config>:
  6848. /**
  6849. * @brief System Clock Configuration
  6850. * @retval None
  6851. */
  6852. void SystemClock_Config(void)
  6853. {
  6854. 8006d48: b510 push {r4, lr}
  6855. 8006d4a: b090 sub sp, #64 ; 0x40
  6856. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  6857. 8006d4c: 2228 movs r2, #40 ; 0x28
  6858. 8006d4e: 2100 movs r1, #0
  6859. 8006d50: a806 add r0, sp, #24
  6860. 8006d52: f000 fcb8 bl 80076c6 <memset>
  6861. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  6862. 8006d56: 2100 movs r1, #0
  6863. 8006d58: 2214 movs r2, #20
  6864. 8006d5a: a801 add r0, sp, #4
  6865. 8006d5c: f000 fcb3 bl 80076c6 <memset>
  6866. */
  6867. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  6868. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  6869. RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
  6870. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  6871. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  6872. 8006d60: 2402 movs r4, #2
  6873. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  6874. 8006d62: 2201 movs r2, #1
  6875. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  6876. 8006d64: f44f 3380 mov.w r3, #65536 ; 0x10000
  6877. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  6878. RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2;
  6879. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  6880. 8006d68: a806 add r0, sp, #24
  6881. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  6882. 8006d6a: 9206 str r2, [sp, #24]
  6883. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  6884. 8006d6c: 9307 str r3, [sp, #28]
  6885. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  6886. 8006d6e: 920a str r2, [sp, #40] ; 0x28
  6887. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  6888. 8006d70: 930e str r3, [sp, #56] ; 0x38
  6889. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  6890. 8006d72: 940d str r4, [sp, #52] ; 0x34
  6891. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  6892. 8006d74: f7fe f880 bl 8004e78 <HAL_RCC_OscConfig>
  6893. {
  6894. Error_Handler();
  6895. }
  6896. /**Initializes the CPU, AHB and APB busses clocks
  6897. */
  6898. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  6899. 8006d78: 230f movs r3, #15
  6900. |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  6901. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  6902. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  6903. 8006d7a: 2100 movs r1, #0
  6904. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  6905. 8006d7c: 9301 str r3, [sp, #4]
  6906. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  6907. 8006d7e: f44f 6380 mov.w r3, #1024 ; 0x400
  6908. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  6909. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
  6910. 8006d82: a801 add r0, sp, #4
  6911. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  6912. 8006d84: 9402 str r4, [sp, #8]
  6913. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  6914. 8006d86: 9103 str r1, [sp, #12]
  6915. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  6916. 8006d88: 9304 str r3, [sp, #16]
  6917. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  6918. 8006d8a: 9105 str r1, [sp, #20]
  6919. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
  6920. 8006d8c: f7fe fa3c bl 8005208 <HAL_RCC_ClockConfig>
  6921. {
  6922. Error_Handler();
  6923. }
  6924. }
  6925. 8006d90: b010 add sp, #64 ; 0x40
  6926. 8006d92: bd10 pop {r4, pc}
  6927. 08006d94 <main>:
  6928. {
  6929. 8006d94: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  6930. uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
  6931. 8006d98: 2604 movs r6, #4
  6932. 8006d9a: 2501 movs r5, #1
  6933. 8006d9c: f04f 08be mov.w r8, #190 ; 0xbe
  6934. 8006da0: 4fbf ldr r7, [pc, #764] ; (80070a0 <main+0x30c>)
  6935. 8006da2: f8df b370 ldr.w fp, [pc, #880] ; 8007114 <main+0x380>
  6936. 8006da6: 783b ldrb r3, [r7, #0]
  6937. {
  6938. 8006da8: b0c1 sub sp, #260 ; 0x104
  6939. uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
  6940. 8006daa: f88d 302b strb.w r3, [sp, #43] ; 0x2b
  6941. 8006dae: f89b 3000 ldrb.w r3, [fp]
  6942. 8006db2: 4631 mov r1, r6
  6943. 8006db4: f10d 0029 add.w r0, sp, #41 ; 0x29
  6944. 8006db8: f88d 8028 strb.w r8, [sp, #40] ; 0x28
  6945. 8006dbc: f88d 5029 strb.w r5, [sp, #41] ; 0x29
  6946. 8006dc0: f88d 602a strb.w r6, [sp, #42] ; 0x2a
  6947. 8006dc4: f88d 302c strb.w r3, [sp, #44] ; 0x2c
  6948. 8006dc8: f000 fae4 bl 8007394 <STH30_CreateCrc>
  6949. uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};
  6950. 8006dcc: f04f 0303 mov.w r3, #3
  6951. uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
  6952. 8006dd0: 24eb movs r4, #235 ; 0xeb
  6953. uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};
  6954. 8006dd2: f88d 3031 strb.w r3, [sp, #49] ; 0x31
  6955. 8006dd6: 783b ldrb r3, [r7, #0]
  6956. 8006dd8: 4631 mov r1, r6
  6957. 8006dda: f88d 3033 strb.w r3, [sp, #51] ; 0x33
  6958. 8006dde: f89b 3000 ldrb.w r3, [fp]
  6959. uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
  6960. 8006de2: f88d 002d strb.w r0, [sp, #45] ; 0x2d
  6961. uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};
  6962. 8006de6: f10d 0031 add.w r0, sp, #49 ; 0x31
  6963. 8006dea: f88d 3034 strb.w r3, [sp, #52] ; 0x34
  6964. uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
  6965. 8006dee: f88d 402e strb.w r4, [sp, #46] ; 0x2e
  6966. uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};
  6967. 8006df2: f88d 8030 strb.w r8, [sp, #48] ; 0x30
  6968. 8006df6: f88d 6032 strb.w r6, [sp, #50] ; 0x32
  6969. 8006dfa: f000 facb bl 8007394 <STH30_CreateCrc>
  6970. 8006dfe: f88d 4036 strb.w r4, [sp, #54] ; 0x36
  6971. 8006e02: f88d 0035 strb.w r0, [sp, #53] ; 0x35
  6972. HAL_Init();
  6973. 8006e06: f7fd fa31 bl 800426c <HAL_Init>
  6974. SystemClock_Config();
  6975. 8006e0a: f7ff ff9d bl 8006d48 <SystemClock_Config>
  6976. * @param None
  6977. * @retval None
  6978. */
  6979. static void MX_GPIO_Init(void)
  6980. {
  6981. GPIO_InitTypeDef GPIO_InitStruct = {0};
  6982. 8006e0e: 2210 movs r2, #16
  6983. 8006e10: 2100 movs r1, #0
  6984. 8006e12: a827 add r0, sp, #156 ; 0x9c
  6985. 8006e14: f000 fc57 bl 80076c6 <memset>
  6986. /* GPIO Ports Clock Enable */
  6987. __HAL_RCC_GPIOC_CLK_ENABLE();
  6988. 8006e18: 4ba2 ldr r3, [pc, #648] ; (80070a4 <main+0x310>)
  6989. HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  6990. |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin
  6991. |LED_CH2_Pin|LED_CH3_Pin, GPIO_PIN_RESET);
  6992. /*Configure GPIO pin Output Level */
  6993. HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin
  6994. 8006e1a: f8df a2fc ldr.w sl, [pc, #764] ; 8007118 <main+0x384>
  6995. __HAL_RCC_GPIOC_CLK_ENABLE();
  6996. 8006e1e: 699a ldr r2, [r3, #24]
  6997. |SENSOR_EN8_Pin|SX1276_NSS_Pin, GPIO_PIN_RESET);
  6998. /*Configure GPIO pin Output Level */
  6999. HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin
  7000. 8006e20: f8df 92f8 ldr.w r9, [pc, #760] ; 800711c <main+0x388>
  7001. __HAL_RCC_GPIOC_CLK_ENABLE();
  7002. 8006e24: f042 0210 orr.w r2, r2, #16
  7003. 8006e28: 619a str r2, [r3, #24]
  7004. 8006e2a: 699a ldr r2, [r3, #24]
  7005. HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  7006. 8006e2c: f649 71f0 movw r1, #40944 ; 0x9ff0
  7007. __HAL_RCC_GPIOC_CLK_ENABLE();
  7008. 8006e30: f002 0210 and.w r2, r2, #16
  7009. 8006e34: 9206 str r2, [sp, #24]
  7010. 8006e36: 9a06 ldr r2, [sp, #24]
  7011. __HAL_RCC_GPIOD_CLK_ENABLE();
  7012. 8006e38: 699a ldr r2, [r3, #24]
  7013. HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  7014. 8006e3a: 489b ldr r0, [pc, #620] ; (80070a8 <main+0x314>)
  7015. __HAL_RCC_GPIOD_CLK_ENABLE();
  7016. 8006e3c: f042 0220 orr.w r2, r2, #32
  7017. 8006e40: 619a str r2, [r3, #24]
  7018. 8006e42: 699a ldr r2, [r3, #24]
  7019. LED_CH2_Pin LED_CH3_Pin */
  7020. GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  7021. |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin
  7022. |LED_CH2_Pin|LED_CH3_Pin;
  7023. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7024. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7025. 8006e44: 2400 movs r4, #0
  7026. __HAL_RCC_GPIOD_CLK_ENABLE();
  7027. 8006e46: f002 0220 and.w r2, r2, #32
  7028. 8006e4a: 9207 str r2, [sp, #28]
  7029. 8006e4c: 9a07 ldr r2, [sp, #28]
  7030. __HAL_RCC_GPIOA_CLK_ENABLE();
  7031. 8006e4e: 699a ldr r2, [r3, #24]
  7032. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7033. 8006e50: f04f 0802 mov.w r8, #2
  7034. __HAL_RCC_GPIOA_CLK_ENABLE();
  7035. 8006e54: 4332 orrs r2, r6
  7036. 8006e56: 619a str r2, [r3, #24]
  7037. 8006e58: 699a ldr r2, [r3, #24]
  7038. huart1.Instance = USART1;
  7039. 8006e5a: 4f94 ldr r7, [pc, #592] ; (80070ac <main+0x318>)
  7040. __HAL_RCC_GPIOA_CLK_ENABLE();
  7041. 8006e5c: 4032 ands r2, r6
  7042. 8006e5e: 9208 str r2, [sp, #32]
  7043. 8006e60: 9a08 ldr r2, [sp, #32]
  7044. __HAL_RCC_GPIOB_CLK_ENABLE();
  7045. 8006e62: 699a ldr r2, [r3, #24]
  7046. 8006e64: f042 0208 orr.w r2, r2, #8
  7047. 8006e68: 619a str r2, [r3, #24]
  7048. 8006e6a: 699b ldr r3, [r3, #24]
  7049. HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  7050. 8006e6c: 2200 movs r2, #0
  7051. __HAL_RCC_GPIOB_CLK_ENABLE();
  7052. 8006e6e: f003 0308 and.w r3, r3, #8
  7053. 8006e72: 9309 str r3, [sp, #36] ; 0x24
  7054. 8006e74: 9b09 ldr r3, [sp, #36] ; 0x24
  7055. HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  7056. 8006e76: f7fd fbf7 bl 8004668 <HAL_GPIO_WritePin>
  7057. HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin
  7058. 8006e7a: 2200 movs r2, #0
  7059. 8006e7c: f248 11f0 movw r1, #33264 ; 0x81f0
  7060. 8006e80: 4650 mov r0, sl
  7061. 8006e82: f7fd fbf1 bl 8004668 <HAL_GPIO_WritePin>
  7062. HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin
  7063. 8006e86: 4648 mov r0, r9
  7064. 8006e88: 2200 movs r2, #0
  7065. 8006e8a: f24f 31e9 movw r1, #62441 ; 0xf3e9
  7066. 8006e8e: f7fd fbeb bl 8004668 <HAL_GPIO_WritePin>
  7067. HAL_GPIO_WritePin(LED_CH4_GPIO_Port, LED_CH4_Pin, GPIO_PIN_RESET);
  7068. 8006e92: 2200 movs r2, #0
  7069. 8006e94: 4631 mov r1, r6
  7070. 8006e96: 4886 ldr r0, [pc, #536] ; (80070b0 <main+0x31c>)
  7071. 8006e98: f7fd fbe6 bl 8004668 <HAL_GPIO_WritePin>
  7072. GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  7073. 8006e9c: f649 73f0 movw r3, #40944 ; 0x9ff0
  7074. HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  7075. 8006ea0: a927 add r1, sp, #156 ; 0x9c
  7076. 8006ea2: 4881 ldr r0, [pc, #516] ; (80070a8 <main+0x314>)
  7077. GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin
  7078. 8006ea4: 9327 str r3, [sp, #156] ; 0x9c
  7079. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7080. 8006ea6: 9528 str r5, [sp, #160] ; 0xa0
  7081. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7082. 8006ea8: f8cd 80a8 str.w r8, [sp, #168] ; 0xa8
  7083. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7084. 8006eac: 9429 str r4, [sp, #164] ; 0xa4
  7085. HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  7086. 8006eae: f7fd fae9 bl 8004484 <HAL_GPIO_Init>
  7087. /*Configure GPIO pins : SX1276_DIO0_Pin SX1276_DIO1_Pin SX1276_DIO2_Pin SX1276_DIO3_Pin
  7088. SENSOR_EN8_Pin SX1276_NSS_Pin */
  7089. GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin
  7090. 8006eb2: f248 13f0 movw r3, #33264 ; 0x81f0
  7091. |SENSOR_EN8_Pin|SX1276_NSS_Pin;
  7092. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7093. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7094. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7095. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7096. 8006eb6: a927 add r1, sp, #156 ; 0x9c
  7097. 8006eb8: 4650 mov r0, sl
  7098. GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin
  7099. 8006eba: 9327 str r3, [sp, #156] ; 0x9c
  7100. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7101. 8006ebc: 9528 str r5, [sp, #160] ; 0xa0
  7102. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7103. 8006ebe: f8cd 80a8 str.w r8, [sp, #168] ; 0xa8
  7104. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7105. 8006ec2: 9429 str r4, [sp, #164] ; 0xa4
  7106. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7107. 8006ec4: f7fd fade bl 8004484 <HAL_GPIO_Init>
  7108. /*Configure GPIO pins : SX1276_RESET_Pin LED_ALARM_Pin SENSOR_EN1_Pin SENSOR_EN2_Pin
  7109. SENSOR_EN3_Pin SX1276_CLK_Pin SX1276_MOSI_Pin LED_CH5_Pin
  7110. LED_CH6_Pin LED_CH7_Pin LED_CH8_Pin */
  7111. GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin
  7112. 8006ec8: f24f 33e9 movw r3, #62441 ; 0xf3e9
  7113. |SENSOR_EN3_Pin|SX1276_CLK_Pin|SX1276_MOSI_Pin|LED_CH5_Pin
  7114. |LED_CH6_Pin|LED_CH7_Pin|LED_CH8_Pin;
  7115. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7116. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7117. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7118. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7119. 8006ecc: 4648 mov r0, r9
  7120. 8006ece: a927 add r1, sp, #156 ; 0x9c
  7121. GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin
  7122. 8006ed0: 9327 str r3, [sp, #156] ; 0x9c
  7123. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7124. 8006ed2: 9528 str r5, [sp, #160] ; 0xa0
  7125. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7126. 8006ed4: f8cd 80a8 str.w r8, [sp, #168] ; 0xa8
  7127. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7128. 8006ed8: 9429 str r4, [sp, #164] ; 0xa4
  7129. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7130. 8006eda: f7fd fad3 bl 8004484 <HAL_GPIO_Init>
  7131. /*Configure GPIO pin : LED_CH4_Pin */
  7132. GPIO_InitStruct.Pin = LED_CH4_Pin;
  7133. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7134. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7135. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7136. HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct);
  7137. 8006ede: a927 add r1, sp, #156 ; 0x9c
  7138. 8006ee0: 4873 ldr r0, [pc, #460] ; (80070b0 <main+0x31c>)
  7139. GPIO_InitStruct.Pin = LED_CH4_Pin;
  7140. 8006ee2: 9627 str r6, [sp, #156] ; 0x9c
  7141. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7142. 8006ee4: 9528 str r5, [sp, #160] ; 0xa0
  7143. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7144. 8006ee6: f8cd 80a8 str.w r8, [sp, #168] ; 0xa8
  7145. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7146. 8006eea: 9429 str r4, [sp, #164] ; 0xa4
  7147. HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct);
  7148. 8006eec: f7fd faca bl 8004484 <HAL_GPIO_Init>
  7149. /*Configure GPIO pin : SX1276_MISO_Pin */
  7150. GPIO_InitStruct.Pin = SX1276_MISO_Pin;
  7151. 8006ef0: 2310 movs r3, #16
  7152. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  7153. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7154. HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct);
  7155. 8006ef2: 4648 mov r0, r9
  7156. 8006ef4: a927 add r1, sp, #156 ; 0x9c
  7157. GPIO_InitStruct.Pin = SX1276_MISO_Pin;
  7158. 8006ef6: 9327 str r3, [sp, #156] ; 0x9c
  7159. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  7160. 8006ef8: 9428 str r4, [sp, #160] ; 0xa0
  7161. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7162. 8006efa: 9429 str r4, [sp, #164] ; 0xa4
  7163. HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct);
  7164. 8006efc: f7fd fac2 bl 8004484 <HAL_GPIO_Init>
  7165. htim6.Init.Prescaler = 1600-1;
  7166. 8006f00: f240 623f movw r2, #1599 ; 0x63f
  7167. htim6.Instance = TIM6;
  7168. 8006f04: 4b6b ldr r3, [pc, #428] ; (80070b4 <main+0x320>)
  7169. htim6.Init.Prescaler = 1600-1;
  7170. 8006f06: 496c ldr r1, [pc, #432] ; (80070b8 <main+0x324>)
  7171. if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
  7172. 8006f08: 4618 mov r0, r3
  7173. htim6.Init.Prescaler = 1600-1;
  7174. 8006f0a: e883 0006 stmia.w r3, {r1, r2}
  7175. htim6.Init.Period = 10-1;
  7176. 8006f0e: 2209 movs r2, #9
  7177. htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
  7178. 8006f10: 609c str r4, [r3, #8]
  7179. htim6.Init.Period = 10-1;
  7180. 8006f12: 60da str r2, [r3, #12]
  7181. htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  7182. 8006f14: 619c str r4, [r3, #24]
  7183. if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
  7184. 8006f16: 9303 str r3, [sp, #12]
  7185. TIM_MasterConfigTypeDef sMasterConfig = {0};
  7186. 8006f18: 9427 str r4, [sp, #156] ; 0x9c
  7187. 8006f1a: 9428 str r4, [sp, #160] ; 0xa0
  7188. if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
  7189. 8006f1c: f7fe fb44 bl 80055a8 <HAL_TIM_Base_Init>
  7190. if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
  7191. 8006f20: 9b03 ldr r3, [sp, #12]
  7192. 8006f22: a927 add r1, sp, #156 ; 0x9c
  7193. 8006f24: 4618 mov r0, r3
  7194. 8006f26: 9305 str r3, [sp, #20]
  7195. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  7196. 8006f28: 9427 str r4, [sp, #156] ; 0x9c
  7197. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  7198. 8006f2a: 9428 str r4, [sp, #160] ; 0xa0
  7199. if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
  7200. 8006f2c: f7fe fb56 bl 80055dc <HAL_TIMEx_MasterConfigSynchronization>
  7201. huart1.Instance = USART1;
  7202. 8006f30: 4a62 ldr r2, [pc, #392] ; (80070bc <main+0x328>)
  7203. huart1.Init.BaudRate = 115200;
  7204. 8006f32: f44f 31e1 mov.w r1, #115200 ; 0x1c200
  7205. huart1.Instance = USART1;
  7206. 8006f36: 603a str r2, [r7, #0]
  7207. huart1.Init.Mode = UART_MODE_TX_RX;
  7208. 8006f38: 220c movs r2, #12
  7209. if (HAL_UART_Init(&huart1) != HAL_OK)
  7210. 8006f3a: 4638 mov r0, r7
  7211. huart2.Instance = USART2;
  7212. 8006f3c: 4e60 ldr r6, [pc, #384] ; (80070c0 <main+0x32c>)
  7213. huart1.Init.BaudRate = 115200;
  7214. 8006f3e: 6079 str r1, [r7, #4]
  7215. huart1.Init.Mode = UART_MODE_TX_RX;
  7216. 8006f40: 617a str r2, [r7, #20]
  7217. huart1.Init.BaudRate = 115200;
  7218. 8006f42: 9104 str r1, [sp, #16]
  7219. huart1.Init.WordLength = UART_WORDLENGTH_8B;
  7220. 8006f44: 60bc str r4, [r7, #8]
  7221. huart1.Init.StopBits = UART_STOPBITS_1;
  7222. 8006f46: 60fc str r4, [r7, #12]
  7223. huart1.Init.Parity = UART_PARITY_NONE;
  7224. 8006f48: 613c str r4, [r7, #16]
  7225. huart1.Init.Mode = UART_MODE_TX_RX;
  7226. 8006f4a: 9203 str r2, [sp, #12]
  7227. huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  7228. 8006f4c: 61bc str r4, [r7, #24]
  7229. huart1.Init.OverSampling = UART_OVERSAMPLING_16;
  7230. 8006f4e: 61fc str r4, [r7, #28]
  7231. if (HAL_UART_Init(&huart1) != HAL_OK)
  7232. 8006f50: f7fe fc3c bl 80057cc <HAL_UART_Init>
  7233. huart2.Instance = USART2;
  7234. 8006f54: 485b ldr r0, [pc, #364] ; (80070c4 <main+0x330>)
  7235. huart2.Init.BaudRate = 115200;
  7236. 8006f56: 9904 ldr r1, [sp, #16]
  7237. huart2.Init.Mode = UART_MODE_TX_RX;
  7238. 8006f58: 9a03 ldr r2, [sp, #12]
  7239. huart2.Instance = USART2;
  7240. 8006f5a: 6030 str r0, [r6, #0]
  7241. if (HAL_UART_Init(&huart2) != HAL_OK)
  7242. 8006f5c: 4630 mov r0, r6
  7243. huart2.Init.BaudRate = 115200;
  7244. 8006f5e: 6071 str r1, [r6, #4]
  7245. huart2.Init.Mode = UART_MODE_TX_RX;
  7246. 8006f60: 6172 str r2, [r6, #20]
  7247. huart2.Init.WordLength = UART_WORDLENGTH_8B;
  7248. 8006f62: 60b4 str r4, [r6, #8]
  7249. huart2.Init.StopBits = UART_STOPBITS_1;
  7250. 8006f64: 60f4 str r4, [r6, #12]
  7251. huart2.Init.Parity = UART_PARITY_NONE;
  7252. 8006f66: 6134 str r4, [r6, #16]
  7253. huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  7254. 8006f68: 61b4 str r4, [r6, #24]
  7255. huart2.Init.OverSampling = UART_OVERSAMPLING_16;
  7256. 8006f6a: 61f4 str r4, [r6, #28]
  7257. if (HAL_UART_Init(&huart2) != HAL_OK)
  7258. 8006f6c: f7fe fc2e bl 80057cc <HAL_UART_Init>
  7259. hi2c2.Init.ClockSpeed = 100000;
  7260. 8006f70: f8df e1ac ldr.w lr, [pc, #428] ; 8007120 <main+0x38c>
  7261. hi2c2.Instance = I2C2;
  7262. 8006f74: 4854 ldr r0, [pc, #336] ; (80070c8 <main+0x334>)
  7263. hi2c2.Init.ClockSpeed = 100000;
  7264. 8006f76: 4a55 ldr r2, [pc, #340] ; (80070cc <main+0x338>)
  7265. hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
  7266. 8006f78: 6084 str r4, [r0, #8]
  7267. hi2c2.Init.ClockSpeed = 100000;
  7268. 8006f7a: e880 4004 stmia.w r0, {r2, lr}
  7269. hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
  7270. 8006f7e: f44f 4280 mov.w r2, #16384 ; 0x4000
  7271. hi2c2.Init.OwnAddress1 = 0;
  7272. 8006f82: 60c4 str r4, [r0, #12]
  7273. hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
  7274. 8006f84: 6102 str r2, [r0, #16]
  7275. hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
  7276. 8006f86: 6144 str r4, [r0, #20]
  7277. hi2c2.Init.OwnAddress2 = 0;
  7278. 8006f88: 6184 str r4, [r0, #24]
  7279. hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
  7280. 8006f8a: 61c4 str r4, [r0, #28]
  7281. hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
  7282. 8006f8c: 6204 str r4, [r0, #32]
  7283. if (HAL_I2C_Init(&hi2c2) != HAL_OK)
  7284. 8006f8e: f7fd fd3d bl 8004a0c <HAL_I2C_Init>
  7285. HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
  7286. 8006f92: 4622 mov r2, r4
  7287. 8006f94: 4621 mov r1, r4
  7288. 8006f96: 2026 movs r0, #38 ; 0x26
  7289. 8006f98: f7fd f9b0 bl 80042fc <HAL_NVIC_SetPriority>
  7290. HAL_NVIC_EnableIRQ(USART2_IRQn);
  7291. 8006f9c: 2026 movs r0, #38 ; 0x26
  7292. 8006f9e: f7fd f9e1 bl 8004364 <HAL_NVIC_EnableIRQ>
  7293. HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
  7294. 8006fa2: 4622 mov r2, r4
  7295. 8006fa4: 4621 mov r1, r4
  7296. 8006fa6: 2025 movs r0, #37 ; 0x25
  7297. 8006fa8: f7fd f9a8 bl 80042fc <HAL_NVIC_SetPriority>
  7298. HAL_NVIC_EnableIRQ(USART1_IRQn);
  7299. 8006fac: 2025 movs r0, #37 ; 0x25
  7300. 8006fae: f7fd f9d9 bl 8004364 <HAL_NVIC_EnableIRQ>
  7301. HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
  7302. 8006fb2: 4622 mov r2, r4
  7303. 8006fb4: 4621 mov r1, r4
  7304. 8006fb6: 2036 movs r0, #54 ; 0x36
  7305. 8006fb8: f7fd f9a0 bl 80042fc <HAL_NVIC_SetPriority>
  7306. HAL_NVIC_EnableIRQ(TIM6_IRQn);
  7307. 8006fbc: 2036 movs r0, #54 ; 0x36
  7308. 8006fbe: f7fd f9d1 bl 8004364 <HAL_NVIC_EnableIRQ>
  7309. HAL_TIM_Base_Start_IT(&htim6);
  7310. 8006fc2: 9b05 ldr r3, [sp, #20]
  7311. 8006fc4: 4618 mov r0, r3
  7312. 8006fc6: f7fe f9f1 bl 80053ac <HAL_TIM_Base_Start_IT>
  7313. HAL_UART_Receive_IT(&huart1, &rx1_data[0],1);
  7314. 8006fca: 462a mov r2, r5
  7315. 8006fcc: 4940 ldr r1, [pc, #256] ; (80070d0 <main+0x33c>)
  7316. 8006fce: 4638 mov r0, r7
  7317. 8006fd0: f7fe fc86 bl 80058e0 <HAL_UART_Receive_IT>
  7318. HAL_UART_Receive_IT(&huart2, &rx2_data[0],1);
  7319. 8006fd4: 462a mov r2, r5
  7320. 8006fd6: 493f ldr r1, [pc, #252] ; (80070d4 <main+0x340>)
  7321. 8006fd8: 4630 mov r0, r6
  7322. 8006fda: f7fe fc81 bl 80058e0 <HAL_UART_Receive_IT>
  7323. setbuf(stdout, NULL); // \n 을 적을 떄만
  7324. 8006fde: 4b3e ldr r3, [pc, #248] ; (80070d8 <main+0x344>)
  7325. 8006fe0: 4621 mov r1, r4
  7326. 8006fe2: 681b ldr r3, [r3, #0]
  7327. RGB_SensorIDAutoset = set;
  7328. 8006fe4: 4e3d ldr r6, [pc, #244] ; (80070dc <main+0x348>)
  7329. setbuf(stdout, NULL); // \n 을 적을 떄만
  7330. 8006fe6: 6898 ldr r0, [r3, #8]
  7331. 8006fe8: f000 fc06 bl 80077f8 <setbuf>
  7332. printf("****************************************\r\n");
  7333. 8006fec: 483c ldr r0, [pc, #240] ; (80070e0 <main+0x34c>)
  7334. 8006fee: f000 fbfb bl 80077e8 <puts>
  7335. printf("RGB Project\r\n");
  7336. 8006ff2: 483c ldr r0, [pc, #240] ; (80070e4 <main+0x350>)
  7337. 8006ff4: f000 fbf8 bl 80077e8 <puts>
  7338. printf("Build at %s %s\r\n", __DATE__, __TIME__);
  7339. 8006ff8: 493b ldr r1, [pc, #236] ; (80070e8 <main+0x354>)
  7340. 8006ffa: 4a3c ldr r2, [pc, #240] ; (80070ec <main+0x358>)
  7341. 8006ffc: 483c ldr r0, [pc, #240] ; (80070f0 <main+0x35c>)
  7342. 8006ffe: f000 fb6b bl 80076d8 <iprintf>
  7343. printf("Copyright (c) 2019. BLUECELL\r\n");
  7344. 8007002: 483c ldr r0, [pc, #240] ; (80070f4 <main+0x360>)
  7345. 8007004: f000 fbf0 bl 80077e8 <puts>
  7346. printf("****************************************\r\n");
  7347. 8007008: 4835 ldr r0, [pc, #212] ; (80070e0 <main+0x34c>)
  7348. 800700a: f000 fbed bl 80077e8 <puts>
  7349. RGB_SensorIDAutoset = set;
  7350. 800700e: 7035 strb r5, [r6, #0]
  7351. Flash_InitRead();
  7352. 8007010: f7ff fe7a bl 8006d08 <Flash_InitRead>
  7353. RGB_Data_Init();
  7354. 8007014: f7fe fe32 bl 8005c7c <RGB_Data_Init>
  7355. SX1276_hw.dio0.pin = SX1276_DIO0_Pin;
  7356. 8007018: 2210 movs r2, #16
  7357. SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port;
  7358. 800701a: 4b37 ldr r3, [pc, #220] ; (80070f8 <main+0x364>)
  7359. SX1276.hw = &SX1276_hw;
  7360. 800701c: 4f37 ldr r7, [pc, #220] ; (80070fc <main+0x368>)
  7361. SX1276_hw.dio0.pin = SX1276_DIO0_Pin;
  7362. 800701e: 609a str r2, [r3, #8]
  7363. SX1276_hw.nss.pin = GPIO_PIN_15;
  7364. 8007020: f44f 4200 mov.w r2, #32768 ; 0x8000
  7365. printf("Configuring LoRa module\r\n");
  7366. 8007024: 4836 ldr r0, [pc, #216] ; (8007100 <main+0x36c>)
  7367. SX1276_hw.reset.pin = SX1276_RESET_Pin;
  7368. 8007026: e883 0220 stmia.w r3, {r5, r9}
  7369. SX1276_hw.nss.pin = GPIO_PIN_15;
  7370. 800702a: 611a str r2, [r3, #16]
  7371. SX1276.hw = &SX1276_hw;
  7372. 800702c: 603b str r3, [r7, #0]
  7373. SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port;
  7374. 800702e: f8c3 a00c str.w sl, [r3, #12]
  7375. SX1276_hw.nss.port = GPIOA;
  7376. 8007032: f8c3 a014 str.w sl, [r3, #20]
  7377. printf("Configuring LoRa module\r\n");
  7378. 8007036: f000 fbd7 bl 80077e8 <puts>
  7379. SX1276_begin(&SX1276, SX1276_917MHZ, SX1276_POWER_17DBM, SX1276_LORA_SF_8,
  7380. 800703a: f04f 0c0a mov.w ip, #10
  7381. 800703e: 2303 movs r3, #3
  7382. 8007040: 462a mov r2, r5
  7383. 8007042: e88d 1008 stmia.w sp, {r3, ip}
  7384. 8007046: 4621 mov r1, r4
  7385. 8007048: 4643 mov r3, r8
  7386. 800704a: 4638 mov r0, r7
  7387. 800704c: f7ff fc72 bl 8006934 <SX1276_begin>
  7388. printf("Done configuring LoRaModule\r\n");
  7389. 8007050: 482c ldr r0, [pc, #176] ; (8007104 <main+0x370>)
  7390. 8007052: f000 fbc9 bl 80077e8 <puts>
  7391. master = 0;
  7392. 8007056: 4b2c ldr r3, [pc, #176] ; (8007108 <main+0x374>)
  7393. ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
  7394. 8007058: f44f 62fa mov.w r2, #2000 ; 0x7d0
  7395. 800705c: 2108 movs r1, #8
  7396. 800705e: 4638 mov r0, r7
  7397. master = 0;
  7398. 8007060: 601c str r4, [r3, #0]
  7399. ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
  7400. 8007062: f7ff fb81 bl 8006768 <SX1276_LoRaEntryRx>
  7401. uint8_t uartrecv1=0,uartrecv2=0,cnt1 = 0,cnt2=0;
  7402. 8007066: 4625 mov r5, r4
  7403. uint8_t temp_sensorid = 0;
  7404. 8007068: 46a1 mov r9, r4
  7405. 800706a: 465f mov r7, fp
  7406. ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
  7407. 800706c: f8df 80b4 ldr.w r8, [pc, #180] ; 8007124 <main+0x390>
  7408. uint8_t data1[100]= {0,};
  7409. 8007070: 2264 movs r2, #100 ; 0x64
  7410. ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
  7411. 8007072: f8c8 0000 str.w r0, [r8]
  7412. uint8_t data1[100]= {0,};
  7413. 8007076: 4621 mov r1, r4
  7414. 8007078: a80e add r0, sp, #56 ; 0x38
  7415. 800707a: f000 fb24 bl 80076c6 <memset>
  7416. uint8_t data2[100]= {0,};
  7417. 800707e: 2264 movs r2, #100 ; 0x64
  7418. 8007080: 4621 mov r1, r4
  7419. 8007082: a827 add r0, sp, #156 ; 0x9c
  7420. 8007084: f000 fb1f bl 80076c6 <memset>
  7421. 8007088: 9603 str r6, [sp, #12]
  7422. 800708a: 4646 mov r6, r8
  7423. SX1276_read(&SX1276, &buffer[0], ret);
  7424. 800708c: f8df 8098 ldr.w r8, [pc, #152] ; 8007128 <main+0x394>
  7425. if(LoraTxTimerCnt > LORA_TIMER_CNT){
  7426. 8007090: 4b1e ldr r3, [pc, #120] ; (800710c <main+0x378>)
  7427. 8007092: 4a1f ldr r2, [pc, #124] ; (8007110 <main+0x37c>)
  7428. 8007094: 6819 ldr r1, [r3, #0]
  7429. 8007096: 4291 cmp r1, r2
  7430. LoraTxTimerCnt = 0;
  7431. 8007098: bf88 it hi
  7432. 800709a: 2200 movhi r2, #0
  7433. 800709c: e046 b.n 800712c <main+0x398>
  7434. 800709e: bf00 nop
  7435. 80070a0: 20000310 .word 0x20000310
  7436. 80070a4: 40021000 .word 0x40021000
  7437. 80070a8: 40011000 .word 0x40011000
  7438. 80070ac: 20000478 .word 0x20000478
  7439. 80070b0: 40011400 .word 0x40011400
  7440. 80070b4: 20000584 .word 0x20000584
  7441. 80070b8: 40001000 .word 0x40001000
  7442. 80070bc: 40013800 .word 0x40013800
  7443. 80070c0: 200005c4 .word 0x200005c4
  7444. 80070c4: 40004400 .word 0x40004400
  7445. 80070c8: 200003fc .word 0x200003fc
  7446. 80070cc: 40005800 .word 0x40005800
  7447. 80070d0: 20000580 .word 0x20000580
  7448. 80070d4: 20000450 .word 0x20000450
  7449. 80070d8: 2000000c .word 0x2000000c
  7450. 80070dc: 20000311 .word 0x20000311
  7451. 80070e0: 08008978 .word 0x08008978
  7452. 80070e4: 080089a2 .word 0x080089a2
  7453. 80070e8: 080089b8 .word 0x080089b8
  7454. 80070ec: 080089af .word 0x080089af
  7455. 80070f0: 080089c4 .word 0x080089c4
  7456. 80070f4: 080089d5 .word 0x080089d5
  7457. 80070f8: 20000458 .word 0x20000458
  7458. 80070fc: 20000608 .word 0x20000608
  7459. 8007100: 080089f3 .word 0x080089f3
  7460. 8007104: 08008a0c .word 0x08008a0c
  7461. 8007108: 20000714 .word 0x20000714
  7462. 800710c: 2000030c .word 0x2000030c
  7463. 8007110: 000493e0 .word 0x000493e0
  7464. 8007114: 20000312 .word 0x20000312
  7465. 8007118: 40010800 .word 0x40010800
  7466. 800711c: 40010c00 .word 0x40010c00
  7467. 8007120: 000186a0 .word 0x000186a0
  7468. 8007124: 20000604 .word 0x20000604
  7469. 8007128: 200004b8 .word 0x200004b8
  7470. 800712c: bf88 it hi
  7471. 800712e: 601a strhi r2, [r3, #0]
  7472. RGB_Alarm_Operate();//LED ALARM CHECK
  7473. 8007130: f7fe ff76 bl 8006020 <RGB_Alarm_Operate>
  7474. if(LoraDataSendGet() == LoraTx_mode){
  7475. 8007134: 4b84 ldr r3, [pc, #528] ; (8007348 <main+0x5b4>)
  7476. 8007136: 781b ldrb r3, [r3, #0]
  7477. 8007138: 2b01 cmp r3, #1
  7478. 800713a: f040 80a9 bne.w 8007290 <main+0x4fc>
  7479. message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc
  7480. 800713e: f04f 0a08 mov.w sl, #8
  7481. memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT);
  7482. 8007142: 4a82 ldr r2, [pc, #520] ; (800734c <main+0x5b8>)
  7483. message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc
  7484. 8007144: f8df b238 ldr.w fp, [pc, #568] ; 8007380 <main+0x5ec>
  7485. memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT);
  7486. 8007148: 6813 ldr r3, [r2, #0]
  7487. ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
  7488. 800714a: 4651 mov r1, sl
  7489. memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT);
  7490. 800714c: f8c8 3000 str.w r3, [r8]
  7491. 8007150: 6853 ldr r3, [r2, #4]
  7492. ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
  7493. 8007152: 487f ldr r0, [pc, #508] ; (8007350 <main+0x5bc>)
  7494. memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT);
  7495. 8007154: f8c8 3004 str.w r3, [r8, #4]
  7496. ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
  7497. 8007158: f44f 62fa mov.w r2, #2000 ; 0x7d0
  7498. message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc
  7499. 800715c: f8cb a000 str.w sl, [fp]
  7500. ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
  7501. 8007160: f7ff fb7c bl 800685c <SX1276_LoRaEntryTx>
  7502. ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000);
  7503. 8007164: f44f 63fa mov.w r3, #2000 ; 0x7d0
  7504. ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
  7505. 8007168: 6030 str r0, [r6, #0]
  7506. ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000);
  7507. 800716a: f89b 2000 ldrb.w r2, [fp]
  7508. 800716e: 4641 mov r1, r8
  7509. 8007170: 4877 ldr r0, [pc, #476] ; (8007350 <main+0x5bc>)
  7510. 8007172: f7ff fbb3 bl 80068dc <SX1276_LoRaTxPacket>
  7511. LoraDataSend = val;
  7512. 8007176: 2300 movs r3, #0
  7513. 8007178: 4a73 ldr r2, [pc, #460] ; (8007348 <main+0x5b4>)
  7514. ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000);
  7515. 800717a: 6030 str r0, [r6, #0]
  7516. LoraDataSend = val;
  7517. 800717c: 7013 strb r3, [r2, #0]
  7518. ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
  7519. 800717e: 4651 mov r1, sl
  7520. 8007180: f44f 62fa mov.w r2, #2000 ; 0x7d0
  7521. 8007184: 4872 ldr r0, [pc, #456] ; (8007350 <main+0x5bc>)
  7522. 8007186: f7ff faef bl 8006768 <SX1276_LoRaEntryRx>
  7523. 800718a: 6030 str r0, [r6, #0]
  7524. if(count_in1 != count_out1){ // <-------
  7525. 800718c: 4871 ldr r0, [pc, #452] ; (8007354 <main+0x5c0>)
  7526. 800718e: 4b72 ldr r3, [pc, #456] ; (8007358 <main+0x5c4>)
  7527. 8007190: f890 e000 ldrb.w lr, [r0]
  7528. 8007194: 781b ldrb r3, [r3, #0]
  7529. 8007196: 4573 cmp r3, lr
  7530. 8007198: 4b70 ldr r3, [pc, #448] ; (800735c <main+0x5c8>)
  7531. 800719a: d019 beq.n 80071d0 <main+0x43c>
  7532. data1[cnt1++] = buf1[count_out1++];
  7533. 800719c: f10e 0201 add.w r2, lr, #1
  7534. 80071a0: b2d2 uxtb r2, r2
  7535. 80071a2: 7002 strb r2, [r0, #0]
  7536. if(count_out1 >= 100){ count_out1 = 0; }
  7537. 80071a4: 2a63 cmp r2, #99 ; 0x63
  7538. 80071a6: f04f 0200 mov.w r2, #0
  7539. data1[cnt1++] = buf1[count_out1++];
  7540. 80071aa: f50d 7c80 add.w ip, sp, #256 ; 0x100
  7541. 80071ae: f105 0101 add.w r1, r5, #1
  7542. 80071b2: 4465 add r5, ip
  7543. 80071b4: f8df c1cc ldr.w ip, [pc, #460] ; 8007384 <main+0x5f0>
  7544. if(count_out1 >= 100){ count_out1 = 0; }
  7545. 80071b8: bf88 it hi
  7546. 80071ba: 7002 strbhi r2, [r0, #0]
  7547. UartTimerCnt = 0;
  7548. 80071bc: 4868 ldr r0, [pc, #416] ; (8007360 <main+0x5cc>)
  7549. data1[cnt1++] = buf1[count_out1++];
  7550. 80071be: f81c e00e ldrb.w lr, [ip, lr]
  7551. 80071c2: b2c9 uxtb r1, r1
  7552. UartTimerCnt = 0;
  7553. 80071c4: 6002 str r2, [r0, #0]
  7554. UartDataisReved = val;
  7555. 80071c6: 2201 movs r2, #1
  7556. data1[cnt1++] = buf1[count_out1++];
  7557. 80071c8: f805 ecc8 strb.w lr, [r5, #-200]
  7558. 80071cc: 460d mov r5, r1
  7559. UartDataisReved = val;
  7560. 80071ce: 701a strb r2, [r3, #0]
  7561. if(count_in2 != count_out2){ // <-------
  7562. 80071d0: 4864 ldr r0, [pc, #400] ; (8007364 <main+0x5d0>)
  7563. 80071d2: 4a65 ldr r2, [pc, #404] ; (8007368 <main+0x5d4>)
  7564. 80071d4: f890 e000 ldrb.w lr, [r0]
  7565. 80071d8: 7812 ldrb r2, [r2, #0]
  7566. 80071da: 4572 cmp r2, lr
  7567. 80071dc: d019 beq.n 8007212 <main+0x47e>
  7568. data2[cnt2++] = buf2[count_out2++];
  7569. 80071de: f10e 0201 add.w r2, lr, #1
  7570. 80071e2: b2d2 uxtb r2, r2
  7571. 80071e4: 7002 strb r2, [r0, #0]
  7572. if(count_out2 >= 100){ count_out2 = 0; }
  7573. 80071e6: 2a63 cmp r2, #99 ; 0x63
  7574. 80071e8: f04f 0200 mov.w r2, #0
  7575. data2[cnt2++] = buf2[count_out2++];
  7576. 80071ec: f50d 7c80 add.w ip, sp, #256 ; 0x100
  7577. 80071f0: f104 0101 add.w r1, r4, #1
  7578. 80071f4: 4464 add r4, ip
  7579. 80071f6: f8df c190 ldr.w ip, [pc, #400] ; 8007388 <main+0x5f4>
  7580. if(count_out2 >= 100){ count_out2 = 0; }
  7581. 80071fa: bf88 it hi
  7582. 80071fc: 7002 strbhi r2, [r0, #0]
  7583. UartTimerCnt = 0;
  7584. 80071fe: 4858 ldr r0, [pc, #352] ; (8007360 <main+0x5cc>)
  7585. data2[cnt2++] = buf2[count_out2++];
  7586. 8007200: f81c e00e ldrb.w lr, [ip, lr]
  7587. 8007204: b2c9 uxtb r1, r1
  7588. UartTimerCnt = 0;
  7589. 8007206: 6002 str r2, [r0, #0]
  7590. UartDataisReved = val;
  7591. 8007208: 2202 movs r2, #2
  7592. data2[cnt2++] = buf2[count_out2++];
  7593. 800720a: f804 ec64 strb.w lr, [r4, #-100]
  7594. 800720e: 460c mov r4, r1
  7595. UartDataisReved = val;
  7596. 8007210: 701a strb r2, [r3, #0]
  7597. return UartDataisReved;
  7598. 8007212: 781a ldrb r2, [r3, #0]
  7599. if(uartdatarecv == 1 && UartTimerCnt > 100){
  7600. 8007214: 2a01 cmp r2, #1
  7601. 8007216: d163 bne.n 80072e0 <main+0x54c>
  7602. 8007218: 4a51 ldr r2, [pc, #324] ; (8007360 <main+0x5cc>)
  7603. 800721a: 6812 ldr r2, [r2, #0]
  7604. 800721c: 2a64 cmp r2, #100 ; 0x64
  7605. 800721e: d90a bls.n 8007236 <main+0x4a2>
  7606. UartDataisReved = val;
  7607. 8007220: 2500 movs r5, #0
  7608. Uart_dataCheck(&data1[0],&count_in1);
  7609. 8007222: 494d ldr r1, [pc, #308] ; (8007358 <main+0x5c4>)
  7610. 8007224: a80e add r0, sp, #56 ; 0x38
  7611. UartDataisReved = val;
  7612. 8007226: 701d strb r5, [r3, #0]
  7613. Uart_dataCheck(&data1[0],&count_in1);
  7614. 8007228: f7ff fc38 bl 8006a9c <Uart_dataCheck>
  7615. memset(&data1[0],0,100);
  7616. 800722c: 2264 movs r2, #100 ; 0x64
  7617. 800722e: 4629 mov r1, r5
  7618. 8007230: a80e add r0, sp, #56 ; 0x38
  7619. 8007232: f000 fa48 bl 80076c6 <memset>
  7620. if(LedTimerCnt > 500){
  7621. 8007236: f8df a154 ldr.w sl, [pc, #340] ; 800738c <main+0x5f8>
  7622. 800723a: f8da 3000 ldr.w r3, [sl]
  7623. 800723e: f5b3 7ffa cmp.w r3, #500 ; 0x1f4
  7624. 8007242: f67f af25 bls.w 8007090 <main+0x2fc>
  7625. if(RGB_SensorIDAutoGet() == 1){
  7626. 8007246: 9b03 ldr r3, [sp, #12]
  7627. 8007248: 781b ldrb r3, [r3, #0]
  7628. 800724a: 2b01 cmp r3, #1
  7629. 800724c: d168 bne.n 8007320 <main+0x58c>
  7630. if(SensorID == 0){memset(&SensorID_buf[0],0x00,8);SensorID_Cnt = 0;}
  7631. 800724e: 7838 ldrb r0, [r7, #0]
  7632. 8007250: b920 cbnz r0, 800725c <main+0x4c8>
  7633. 8007252: 4b46 ldr r3, [pc, #280] ; (800736c <main+0x5d8>)
  7634. 8007254: 6018 str r0, [r3, #0]
  7635. 8007256: 6058 str r0, [r3, #4]
  7636. 8007258: 4b45 ldr r3, [pc, #276] ; (8007370 <main+0x5dc>)
  7637. 800725a: 7018 strb r0, [r3, #0]
  7638. IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID
  7639. 800725c: 3001 adds r0, #1
  7640. 800725e: b2c0 uxtb r0, r0
  7641. if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){
  7642. 8007260: 2808 cmp r0, #8
  7643. IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID
  7644. 8007262: 7038 strb r0, [r7, #0]
  7645. 8007264: f88d 0034 strb.w r0, [sp, #52] ; 0x34
  7646. if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){
  7647. 8007268: d94c bls.n 8007304 <main+0x570>
  7648. RGB_SensorIDAutoset = set;
  7649. 800726a: f04f 0b00 mov.w fp, #0
  7650. 800726e: 9b03 ldr r3, [sp, #12]
  7651. RGB_Sensor_PowerOnOff(0);
  7652. 8007270: 4658 mov r0, fp
  7653. RGB_SensorIDAutoset = set;
  7654. 8007272: f883 b000 strb.w fp, [r3]
  7655. RGB_Sensor_PowerOnOff(0);
  7656. 8007276: f7ff fc45 bl 8006b04 <RGB_Sensor_PowerOnOff>
  7657. SensorID = 0;
  7658. 800727a: f887 b000 strb.w fp, [r7]
  7659. HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
  7660. 800727e: f44f 4100 mov.w r1, #32768 ; 0x8000
  7661. 8007282: 483c ldr r0, [pc, #240] ; (8007374 <main+0x5e0>)
  7662. 8007284: f7fd f9f5 bl 8004672 <HAL_GPIO_TogglePin>
  7663. LedTimerCnt = 0;
  7664. 8007288: 2300 movs r3, #0
  7665. 800728a: f8ca 3000 str.w r3, [sl]
  7666. 800728e: e6ff b.n 8007090 <main+0x2fc>
  7667. ret = SX1276_LoRaRxPacket(&SX1276);
  7668. 8007290: 482f ldr r0, [pc, #188] ; (8007350 <main+0x5bc>)
  7669. 8007292: f7ff fab5 bl 8006800 <SX1276_LoRaRxPacket>
  7670. 8007296: 4602 mov r2, r0
  7671. 8007298: 6030 str r0, [r6, #0]
  7672. if (ret > 0) {
  7673. 800729a: 2800 cmp r0, #0
  7674. 800729c: f43f af76 beq.w 800718c <main+0x3f8>
  7675. SX1276_read(&SX1276, &buffer[0], ret);
  7676. 80072a0: 4641 mov r1, r8
  7677. 80072a2: 482b ldr r0, [pc, #172] ; (8007350 <main+0x5bc>)
  7678. 80072a4: f7ff fb5f bl 8006966 <SX1276_read>
  7679. printf("Received Data : ");
  7680. 80072a8: 4833 ldr r0, [pc, #204] ; (8007378 <main+0x5e4>)
  7681. 80072aa: f000 fa15 bl 80076d8 <iprintf>
  7682. for(uint8_t i = 0; i < ret; i++)
  7683. 80072ae: f04f 0a00 mov.w sl, #0
  7684. printf("%02x ", buffer[i]);
  7685. 80072b2: f8df b0dc ldr.w fp, [pc, #220] ; 8007390 <main+0x5fc>
  7686. for(uint8_t i = 0; i < ret; i++)
  7687. 80072b6: 6832 ldr r2, [r6, #0]
  7688. 80072b8: fa5f f38a uxtb.w r3, sl
  7689. 80072bc: 4293 cmp r3, r2
  7690. 80072be: f10a 0a01 add.w sl, sl, #1
  7691. 80072c2: db07 blt.n 80072d4 <main+0x540>
  7692. printf("\n");
  7693. 80072c4: 200a movs r0, #10
  7694. 80072c6: f000 fa1f bl 8007708 <putchar>
  7695. Uart_dataCheck(&buffer[bluecell_stx],&ret);
  7696. 80072ca: 492c ldr r1, [pc, #176] ; (800737c <main+0x5e8>)
  7697. 80072cc: 4640 mov r0, r8
  7698. 80072ce: f7ff fbe5 bl 8006a9c <Uart_dataCheck>
  7699. 80072d2: e75b b.n 800718c <main+0x3f8>
  7700. printf("%02x ", buffer[i]);
  7701. 80072d4: f818 1003 ldrb.w r1, [r8, r3]
  7702. 80072d8: 4658 mov r0, fp
  7703. 80072da: f000 f9fd bl 80076d8 <iprintf>
  7704. 80072de: e7ea b.n 80072b6 <main+0x522>
  7705. if(uartdatarecv == 2 && UartTimerCnt > 100){
  7706. 80072e0: 2a02 cmp r2, #2
  7707. 80072e2: d1a8 bne.n 8007236 <main+0x4a2>
  7708. 80072e4: 4a1e ldr r2, [pc, #120] ; (8007360 <main+0x5cc>)
  7709. 80072e6: 6812 ldr r2, [r2, #0]
  7710. 80072e8: 2a64 cmp r2, #100 ; 0x64
  7711. 80072ea: d9a4 bls.n 8007236 <main+0x4a2>
  7712. UartDataisReved = val;
  7713. 80072ec: 2400 movs r4, #0
  7714. Uart_dataCheck(&data2[0],&count_in2);
  7715. 80072ee: a827 add r0, sp, #156 ; 0x9c
  7716. 80072f0: 491d ldr r1, [pc, #116] ; (8007368 <main+0x5d4>)
  7717. UartDataisReved = val;
  7718. 80072f2: 701c strb r4, [r3, #0]
  7719. Uart_dataCheck(&data2[0],&count_in2);
  7720. 80072f4: f7ff fbd2 bl 8006a9c <Uart_dataCheck>
  7721. memset(&data2[0],0,100);
  7722. 80072f8: 2264 movs r2, #100 ; 0x64
  7723. 80072fa: 4621 mov r1, r4
  7724. 80072fc: a827 add r0, sp, #156 ; 0x9c
  7725. 80072fe: f000 f9e2 bl 80076c6 <memset>
  7726. 8007302: e6c5 b.n 8007090 <main+0x2fc>
  7727. RGB_Sensor_PowerOnOff(IDAutoSetRequest_data[4]);
  7728. 8007304: f7ff fbfe bl 8006b04 <RGB_Sensor_PowerOnOff>
  7729. HAL_Delay(500);
  7730. 8007308: f44f 70fa mov.w r0, #500 ; 0x1f4
  7731. 800730c: f7fc ffd2 bl 80042b4 <HAL_Delay>
  7732. RGB_Controller_Func(&IDAutoSetRequest_data[bluecell_stx]);
  7733. 8007310: a80c add r0, sp, #48 ; 0x30
  7734. 8007312: f7fe ff9b bl 800624c <RGB_Controller_Func>
  7735. HAL_Delay(500);
  7736. 8007316: f44f 70fa mov.w r0, #500 ; 0x1f4
  7737. 800731a: f7fc ffcb bl 80042b4 <HAL_Delay>
  7738. 800731e: e7ae b.n 800727e <main+0x4ea>
  7739. StatusRequest_data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
  7740. 8007320: 4b12 ldr r3, [pc, #72] ; (800736c <main+0x5d8>)
  7741. 8007322: f109 0b01 add.w fp, r9, #1
  7742. 8007326: f813 3009 ldrb.w r3, [r3, r9]
  7743. 800732a: fa5f fb8b uxtb.w fp, fp
  7744. 800732e: f88d 302c strb.w r3, [sp, #44] ; 0x2c
  7745. if(temp_sensorid > (SensorID_Cnt)){
  7746. 8007332: 4b0f ldr r3, [pc, #60] ; (8007370 <main+0x5dc>)
  7747. RGB_Controller_Func(&StatusRequest_data[bluecell_stx]);
  7748. 8007334: a80a add r0, sp, #40 ; 0x28
  7749. if(temp_sensorid > (SensorID_Cnt)){
  7750. 8007336: 781b ldrb r3, [r3, #0]
  7751. temp_sensorid = 0;
  7752. 8007338: 455b cmp r3, fp
  7753. 800733a: bf38 it cc
  7754. 800733c: f04f 0b00 movcc.w fp, #0
  7755. RGB_Controller_Func(&StatusRequest_data[bluecell_stx]);
  7756. 8007340: f7fe ff84 bl 800624c <RGB_Controller_Func>
  7757. 8007344: 46d9 mov r9, fp
  7758. 8007346: e79a b.n 800727e <main+0x4ea>
  7759. 8007348: 20000474 .word 0x20000474
  7760. 800734c: 20000095 .word 0x20000095
  7761. 8007350: 20000608 .word 0x20000608
  7762. 8007354: 200003e2 .word 0x200003e2
  7763. 8007358: 200003e0 .word 0x200003e0
  7764. 800735c: 200003f8 .word 0x200003f8
  7765. 8007360: 20000314 .word 0x20000314
  7766. 8007364: 200003e3 .word 0x200003e3
  7767. 8007368: 200003e1 .word 0x200003e1
  7768. 800736c: 200002f3 .word 0x200002f3
  7769. 8007370: 200002f2 .word 0x200002f2
  7770. 8007374: 40011000 .word 0x40011000
  7771. 8007378: 08008a29 .word 0x08008a29
  7772. 800737c: 20000604 .word 0x20000604
  7773. 8007380: 200003f4 .word 0x200003f4
  7774. 8007384: 20000318 .word 0x20000318
  7775. 8007388: 2000037c .word 0x2000037c
  7776. 800738c: 20000304 .word 0x20000304
  7777. 8007390: 0800893e .word 0x0800893e
  7778. 08007394 <STH30_CreateCrc>:
  7779. 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
  7780. 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
  7781. };
  7782. uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
  7783. {
  7784. 8007394: b510 push {r4, lr}
  7785. uint8_t bit; // bit mask
  7786. uint8_t crc = 0xFF; // calculated checksum
  7787. 8007396: 23ff movs r3, #255 ; 0xff
  7788. uint8_t byteCtr; // byte counter
  7789. // calculates 8-Bit checksum with given polynomial
  7790. for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
  7791. 8007398: 4604 mov r4, r0
  7792. 800739a: 1a22 subs r2, r4, r0
  7793. 800739c: b2d2 uxtb r2, r2
  7794. 800739e: 4291 cmp r1, r2
  7795. 80073a0: d801 bhi.n 80073a6 <STH30_CreateCrc+0x12>
  7796. if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
  7797. else crc = (crc << 1);
  7798. }
  7799. }
  7800. return crc;
  7801. }
  7802. 80073a2: 4618 mov r0, r3
  7803. 80073a4: bd10 pop {r4, pc}
  7804. crc ^= (data[byteCtr]);
  7805. 80073a6: f814 2b01 ldrb.w r2, [r4], #1
  7806. 80073aa: 4053 eors r3, r2
  7807. 80073ac: 2208 movs r2, #8
  7808. if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
  7809. 80073ae: f013 0f80 tst.w r3, #128 ; 0x80
  7810. 80073b2: f102 32ff add.w r2, r2, #4294967295
  7811. 80073b6: ea4f 0343 mov.w r3, r3, lsl #1
  7812. 80073ba: bf18 it ne
  7813. 80073bc: f083 0331 eorne.w r3, r3, #49 ; 0x31
  7814. for(bit = 8; bit > 0; --bit)
  7815. 80073c0: f012 02ff ands.w r2, r2, #255 ; 0xff
  7816. else crc = (crc << 1);
  7817. 80073c4: b2db uxtb r3, r3
  7818. for(bit = 8; bit > 0; --bit)
  7819. 80073c6: d1f2 bne.n 80073ae <STH30_CreateCrc+0x1a>
  7820. 80073c8: e7e7 b.n 800739a <STH30_CreateCrc+0x6>
  7821. 080073ca <STH30_CheckCrc>:
  7822. etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
  7823. {
  7824. 80073ca: b530 push {r4, r5, lr}
  7825. uint8_t bit; // bit mask
  7826. uint8_t crc = 0xFF; // calculated checksum
  7827. 80073cc: 23ff movs r3, #255 ; 0xff
  7828. uint8_t byteCtr; // byte counter
  7829. // calculates 8-Bit checksum with given polynomial
  7830. for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
  7831. 80073ce: 4605 mov r5, r0
  7832. 80073d0: 1a2c subs r4, r5, r0
  7833. 80073d2: b2e4 uxtb r4, r4
  7834. 80073d4: 42a1 cmp r1, r4
  7835. 80073d6: d803 bhi.n 80073e0 <STH30_CheckCrc+0x16>
  7836. else crc = (crc << 1);
  7837. }
  7838. }
  7839. if(crc != checksum) return CHECKSUM_ERROR;
  7840. else return NO_ERROR;
  7841. }
  7842. 80073d8: 1a9b subs r3, r3, r2
  7843. 80073da: 4258 negs r0, r3
  7844. 80073dc: 4158 adcs r0, r3
  7845. 80073de: bd30 pop {r4, r5, pc}
  7846. crc ^= (data[byteCtr]);
  7847. 80073e0: f815 4b01 ldrb.w r4, [r5], #1
  7848. 80073e4: 4063 eors r3, r4
  7849. 80073e6: 2408 movs r4, #8
  7850. if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
  7851. 80073e8: f013 0f80 tst.w r3, #128 ; 0x80
  7852. 80073ec: f104 34ff add.w r4, r4, #4294967295
  7853. 80073f0: ea4f 0343 mov.w r3, r3, lsl #1
  7854. 80073f4: bf18 it ne
  7855. 80073f6: f083 0331 eorne.w r3, r3, #49 ; 0x31
  7856. for(bit = 8; bit > 0; --bit)
  7857. 80073fa: f014 04ff ands.w r4, r4, #255 ; 0xff
  7858. else crc = (crc << 1);
  7859. 80073fe: b2db uxtb r3, r3
  7860. for(bit = 8; bit > 0; --bit)
  7861. 8007400: d1f2 bne.n 80073e8 <STH30_CheckCrc+0x1e>
  7862. 8007402: e7e5 b.n 80073d0 <STH30_CheckCrc+0x6>
  7863. 08007404 <HAL_MspInit>:
  7864. {
  7865. /* USER CODE BEGIN MspInit 0 */
  7866. /* USER CODE END MspInit 0 */
  7867. __HAL_RCC_AFIO_CLK_ENABLE();
  7868. 8007404: 4b0e ldr r3, [pc, #56] ; (8007440 <HAL_MspInit+0x3c>)
  7869. {
  7870. 8007406: b082 sub sp, #8
  7871. __HAL_RCC_AFIO_CLK_ENABLE();
  7872. 8007408: 699a ldr r2, [r3, #24]
  7873. 800740a: f042 0201 orr.w r2, r2, #1
  7874. 800740e: 619a str r2, [r3, #24]
  7875. 8007410: 699a ldr r2, [r3, #24]
  7876. 8007412: f002 0201 and.w r2, r2, #1
  7877. 8007416: 9200 str r2, [sp, #0]
  7878. 8007418: 9a00 ldr r2, [sp, #0]
  7879. __HAL_RCC_PWR_CLK_ENABLE();
  7880. 800741a: 69da ldr r2, [r3, #28]
  7881. 800741c: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000
  7882. 8007420: 61da str r2, [r3, #28]
  7883. 8007422: 69db ldr r3, [r3, #28]
  7884. /* System interrupt init*/
  7885. /**DISABLE: JTAG-DP Disabled and SW-DP Disabled
  7886. */
  7887. __HAL_AFIO_REMAP_SWJ_DISABLE();
  7888. 8007424: 4a07 ldr r2, [pc, #28] ; (8007444 <HAL_MspInit+0x40>)
  7889. __HAL_RCC_PWR_CLK_ENABLE();
  7890. 8007426: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  7891. 800742a: 9301 str r3, [sp, #4]
  7892. 800742c: 9b01 ldr r3, [sp, #4]
  7893. __HAL_AFIO_REMAP_SWJ_DISABLE();
  7894. 800742e: 6853 ldr r3, [r2, #4]
  7895. 8007430: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
  7896. 8007434: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
  7897. 8007438: 6053 str r3, [r2, #4]
  7898. /* USER CODE BEGIN MspInit 1 */
  7899. /* USER CODE END MspInit 1 */
  7900. }
  7901. 800743a: b002 add sp, #8
  7902. 800743c: 4770 bx lr
  7903. 800743e: bf00 nop
  7904. 8007440: 40021000 .word 0x40021000
  7905. 8007444: 40010000 .word 0x40010000
  7906. 08007448 <HAL_I2C_MspInit>:
  7907. * This function configures the hardware resources used in this example
  7908. * @param hi2c: I2C handle pointer
  7909. * @retval None
  7910. */
  7911. void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
  7912. {
  7913. 8007448: b510 push {r4, lr}
  7914. 800744a: 4604 mov r4, r0
  7915. 800744c: b086 sub sp, #24
  7916. GPIO_InitTypeDef GPIO_InitStruct = {0};
  7917. 800744e: 2210 movs r2, #16
  7918. 8007450: 2100 movs r1, #0
  7919. 8007452: a802 add r0, sp, #8
  7920. 8007454: f000 f937 bl 80076c6 <memset>
  7921. if(hi2c->Instance==I2C2)
  7922. 8007458: 6822 ldr r2, [r4, #0]
  7923. 800745a: 4b11 ldr r3, [pc, #68] ; (80074a0 <HAL_I2C_MspInit+0x58>)
  7924. 800745c: 429a cmp r2, r3
  7925. 800745e: d11d bne.n 800749c <HAL_I2C_MspInit+0x54>
  7926. {
  7927. /* USER CODE BEGIN I2C2_MspInit 0 */
  7928. /* USER CODE END I2C2_MspInit 0 */
  7929. __HAL_RCC_GPIOB_CLK_ENABLE();
  7930. 8007460: 4c10 ldr r4, [pc, #64] ; (80074a4 <HAL_I2C_MspInit+0x5c>)
  7931. PB11 ------> I2C2_SDA
  7932. */
  7933. GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
  7934. GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
  7935. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7936. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7937. 8007462: a902 add r1, sp, #8
  7938. __HAL_RCC_GPIOB_CLK_ENABLE();
  7939. 8007464: 69a3 ldr r3, [r4, #24]
  7940. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7941. 8007466: 4810 ldr r0, [pc, #64] ; (80074a8 <HAL_I2C_MspInit+0x60>)
  7942. __HAL_RCC_GPIOB_CLK_ENABLE();
  7943. 8007468: f043 0308 orr.w r3, r3, #8
  7944. 800746c: 61a3 str r3, [r4, #24]
  7945. 800746e: 69a3 ldr r3, [r4, #24]
  7946. 8007470: f003 0308 and.w r3, r3, #8
  7947. 8007474: 9300 str r3, [sp, #0]
  7948. 8007476: 9b00 ldr r3, [sp, #0]
  7949. GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
  7950. 8007478: f44f 6340 mov.w r3, #3072 ; 0xc00
  7951. 800747c: 9302 str r3, [sp, #8]
  7952. GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
  7953. 800747e: 2312 movs r3, #18
  7954. 8007480: 9303 str r3, [sp, #12]
  7955. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7956. 8007482: 2303 movs r3, #3
  7957. 8007484: 9305 str r3, [sp, #20]
  7958. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7959. 8007486: f7fc fffd bl 8004484 <HAL_GPIO_Init>
  7960. /* Peripheral clock enable */
  7961. __HAL_RCC_I2C2_CLK_ENABLE();
  7962. 800748a: 69e3 ldr r3, [r4, #28]
  7963. 800748c: f443 0380 orr.w r3, r3, #4194304 ; 0x400000
  7964. 8007490: 61e3 str r3, [r4, #28]
  7965. 8007492: 69e3 ldr r3, [r4, #28]
  7966. 8007494: f403 0380 and.w r3, r3, #4194304 ; 0x400000
  7967. 8007498: 9301 str r3, [sp, #4]
  7968. 800749a: 9b01 ldr r3, [sp, #4]
  7969. /* USER CODE BEGIN I2C2_MspInit 1 */
  7970. /* USER CODE END I2C2_MspInit 1 */
  7971. }
  7972. }
  7973. 800749c: b006 add sp, #24
  7974. 800749e: bd10 pop {r4, pc}
  7975. 80074a0: 40005800 .word 0x40005800
  7976. 80074a4: 40021000 .word 0x40021000
  7977. 80074a8: 40010c00 .word 0x40010c00
  7978. 080074ac <HAL_TIM_Base_MspInit>:
  7979. * @retval None
  7980. */
  7981. void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
  7982. {
  7983. if(htim_base->Instance==TIM6)
  7984. 80074ac: 6802 ldr r2, [r0, #0]
  7985. 80074ae: 4b08 ldr r3, [pc, #32] ; (80074d0 <HAL_TIM_Base_MspInit+0x24>)
  7986. {
  7987. 80074b0: b082 sub sp, #8
  7988. if(htim_base->Instance==TIM6)
  7989. 80074b2: 429a cmp r2, r3
  7990. 80074b4: d10a bne.n 80074cc <HAL_TIM_Base_MspInit+0x20>
  7991. {
  7992. /* USER CODE BEGIN TIM6_MspInit 0 */
  7993. /* USER CODE END TIM6_MspInit 0 */
  7994. /* Peripheral clock enable */
  7995. __HAL_RCC_TIM6_CLK_ENABLE();
  7996. 80074b6: f503 3300 add.w r3, r3, #131072 ; 0x20000
  7997. 80074ba: 69da ldr r2, [r3, #28]
  7998. 80074bc: f042 0210 orr.w r2, r2, #16
  7999. 80074c0: 61da str r2, [r3, #28]
  8000. 80074c2: 69db ldr r3, [r3, #28]
  8001. 80074c4: f003 0310 and.w r3, r3, #16
  8002. 80074c8: 9301 str r3, [sp, #4]
  8003. 80074ca: 9b01 ldr r3, [sp, #4]
  8004. /* USER CODE BEGIN TIM6_MspInit 1 */
  8005. /* USER CODE END TIM6_MspInit 1 */
  8006. }
  8007. }
  8008. 80074cc: b002 add sp, #8
  8009. 80074ce: 4770 bx lr
  8010. 80074d0: 40001000 .word 0x40001000
  8011. 080074d4 <HAL_UART_MspInit>:
  8012. * @retval None
  8013. */
  8014. void HAL_UART_MspInit(UART_HandleTypeDef* huart)
  8015. {
  8016. GPIO_InitTypeDef GPIO_InitStruct = {0};
  8017. 80074d4: 2210 movs r2, #16
  8018. {
  8019. 80074d6: b510 push {r4, lr}
  8020. 80074d8: 4604 mov r4, r0
  8021. 80074da: b088 sub sp, #32
  8022. GPIO_InitTypeDef GPIO_InitStruct = {0};
  8023. 80074dc: eb0d 0002 add.w r0, sp, r2
  8024. 80074e0: 2100 movs r1, #0
  8025. 80074e2: f000 f8f0 bl 80076c6 <memset>
  8026. if(huart->Instance==USART1)
  8027. 80074e6: 6823 ldr r3, [r4, #0]
  8028. 80074e8: 4a27 ldr r2, [pc, #156] ; (8007588 <HAL_UART_MspInit+0xb4>)
  8029. 80074ea: 4293 cmp r3, r2
  8030. 80074ec: d129 bne.n 8007542 <HAL_UART_MspInit+0x6e>
  8031. {
  8032. /* USER CODE BEGIN USART1_MspInit 0 */
  8033. /* USER CODE END USART1_MspInit 0 */
  8034. /* Peripheral clock enable */
  8035. __HAL_RCC_USART1_CLK_ENABLE();
  8036. 80074ee: 4b27 ldr r3, [pc, #156] ; (800758c <HAL_UART_MspInit+0xb8>)
  8037. PA10 ------> USART1_RX
  8038. */
  8039. GPIO_InitStruct.Pin = GPIO_PIN_9;
  8040. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  8041. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  8042. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8043. 80074f0: a904 add r1, sp, #16
  8044. __HAL_RCC_USART1_CLK_ENABLE();
  8045. 80074f2: 699a ldr r2, [r3, #24]
  8046. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8047. 80074f4: 4826 ldr r0, [pc, #152] ; (8007590 <HAL_UART_MspInit+0xbc>)
  8048. __HAL_RCC_USART1_CLK_ENABLE();
  8049. 80074f6: f442 4280 orr.w r2, r2, #16384 ; 0x4000
  8050. 80074fa: 619a str r2, [r3, #24]
  8051. 80074fc: 699a ldr r2, [r3, #24]
  8052. 80074fe: f402 4280 and.w r2, r2, #16384 ; 0x4000
  8053. 8007502: 9200 str r2, [sp, #0]
  8054. 8007504: 9a00 ldr r2, [sp, #0]
  8055. __HAL_RCC_GPIOA_CLK_ENABLE();
  8056. 8007506: 699a ldr r2, [r3, #24]
  8057. 8007508: f042 0204 orr.w r2, r2, #4
  8058. 800750c: 619a str r2, [r3, #24]
  8059. 800750e: 699b ldr r3, [r3, #24]
  8060. 8007510: f003 0304 and.w r3, r3, #4
  8061. 8007514: 9301 str r3, [sp, #4]
  8062. 8007516: 9b01 ldr r3, [sp, #4]
  8063. GPIO_InitStruct.Pin = GPIO_PIN_9;
  8064. 8007518: f44f 7300 mov.w r3, #512 ; 0x200
  8065. 800751c: 9304 str r3, [sp, #16]
  8066. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  8067. 800751e: 2302 movs r3, #2
  8068. 8007520: 9305 str r3, [sp, #20]
  8069. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  8070. 8007522: 2303 movs r3, #3
  8071. 8007524: 9307 str r3, [sp, #28]
  8072. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8073. 8007526: f7fc ffad bl 8004484 <HAL_GPIO_Init>
  8074. GPIO_InitStruct.Pin = GPIO_PIN_10;
  8075. 800752a: f44f 6380 mov.w r3, #1024 ; 0x400
  8076. GPIO_InitStruct.Pin = GPIO_PIN_2;
  8077. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  8078. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  8079. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8080. GPIO_InitStruct.Pin = GPIO_PIN_3;
  8081. 800752e: 9304 str r3, [sp, #16]
  8082. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  8083. 8007530: 2300 movs r3, #0
  8084. GPIO_InitStruct.Pull = GPIO_NOPULL;
  8085. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8086. 8007532: a904 add r1, sp, #16
  8087. 8007534: 4816 ldr r0, [pc, #88] ; (8007590 <HAL_UART_MspInit+0xbc>)
  8088. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  8089. 8007536: 9305 str r3, [sp, #20]
  8090. GPIO_InitStruct.Pull = GPIO_NOPULL;
  8091. 8007538: 9306 str r3, [sp, #24]
  8092. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8093. 800753a: f7fc ffa3 bl 8004484 <HAL_GPIO_Init>
  8094. /* USER CODE BEGIN USART2_MspInit 1 */
  8095. /* USER CODE END USART2_MspInit 1 */
  8096. }
  8097. }
  8098. 800753e: b008 add sp, #32
  8099. 8007540: bd10 pop {r4, pc}
  8100. else if(huart->Instance==USART2)
  8101. 8007542: 4a14 ldr r2, [pc, #80] ; (8007594 <HAL_UART_MspInit+0xc0>)
  8102. 8007544: 4293 cmp r3, r2
  8103. 8007546: d1fa bne.n 800753e <HAL_UART_MspInit+0x6a>
  8104. __HAL_RCC_USART2_CLK_ENABLE();
  8105. 8007548: 4b10 ldr r3, [pc, #64] ; (800758c <HAL_UART_MspInit+0xb8>)
  8106. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8107. 800754a: a904 add r1, sp, #16
  8108. __HAL_RCC_USART2_CLK_ENABLE();
  8109. 800754c: 69da ldr r2, [r3, #28]
  8110. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8111. 800754e: 4810 ldr r0, [pc, #64] ; (8007590 <HAL_UART_MspInit+0xbc>)
  8112. __HAL_RCC_USART2_CLK_ENABLE();
  8113. 8007550: f442 3200 orr.w r2, r2, #131072 ; 0x20000
  8114. 8007554: 61da str r2, [r3, #28]
  8115. 8007556: 69da ldr r2, [r3, #28]
  8116. 8007558: f402 3200 and.w r2, r2, #131072 ; 0x20000
  8117. 800755c: 9202 str r2, [sp, #8]
  8118. 800755e: 9a02 ldr r2, [sp, #8]
  8119. __HAL_RCC_GPIOA_CLK_ENABLE();
  8120. 8007560: 699a ldr r2, [r3, #24]
  8121. 8007562: f042 0204 orr.w r2, r2, #4
  8122. 8007566: 619a str r2, [r3, #24]
  8123. 8007568: 699b ldr r3, [r3, #24]
  8124. 800756a: f003 0304 and.w r3, r3, #4
  8125. 800756e: 9303 str r3, [sp, #12]
  8126. 8007570: 9b03 ldr r3, [sp, #12]
  8127. GPIO_InitStruct.Pin = GPIO_PIN_2;
  8128. 8007572: 2304 movs r3, #4
  8129. 8007574: 9304 str r3, [sp, #16]
  8130. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  8131. 8007576: 2302 movs r3, #2
  8132. 8007578: 9305 str r3, [sp, #20]
  8133. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  8134. 800757a: 2303 movs r3, #3
  8135. 800757c: 9307 str r3, [sp, #28]
  8136. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  8137. 800757e: f7fc ff81 bl 8004484 <HAL_GPIO_Init>
  8138. GPIO_InitStruct.Pin = GPIO_PIN_3;
  8139. 8007582: 2308 movs r3, #8
  8140. 8007584: e7d3 b.n 800752e <HAL_UART_MspInit+0x5a>
  8141. 8007586: bf00 nop
  8142. 8007588: 40013800 .word 0x40013800
  8143. 800758c: 40021000 .word 0x40021000
  8144. 8007590: 40010800 .word 0x40010800
  8145. 8007594: 40004400 .word 0x40004400
  8146. 08007598 <NMI_Handler>:
  8147. 8007598: 4770 bx lr
  8148. 0800759a <HardFault_Handler>:
  8149. /**
  8150. * @brief This function handles Hard fault interrupt.
  8151. */
  8152. void HardFault_Handler(void)
  8153. {
  8154. 800759a: e7fe b.n 800759a <HardFault_Handler>
  8155. 0800759c <MemManage_Handler>:
  8156. /**
  8157. * @brief This function handles Memory management fault.
  8158. */
  8159. void MemManage_Handler(void)
  8160. {
  8161. 800759c: e7fe b.n 800759c <MemManage_Handler>
  8162. 0800759e <BusFault_Handler>:
  8163. /**
  8164. * @brief This function handles Prefetch fault, memory access fault.
  8165. */
  8166. void BusFault_Handler(void)
  8167. {
  8168. 800759e: e7fe b.n 800759e <BusFault_Handler>
  8169. 080075a0 <UsageFault_Handler>:
  8170. /**
  8171. * @brief This function handles Undefined instruction or illegal state.
  8172. */
  8173. void UsageFault_Handler(void)
  8174. {
  8175. 80075a0: e7fe b.n 80075a0 <UsageFault_Handler>
  8176. 080075a2 <SVC_Handler>:
  8177. 80075a2: 4770 bx lr
  8178. 080075a4 <DebugMon_Handler>:
  8179. 80075a4: 4770 bx lr
  8180. 080075a6 <PendSV_Handler>:
  8181. /**
  8182. * @brief This function handles Pendable request for system service.
  8183. */
  8184. void PendSV_Handler(void)
  8185. {
  8186. 80075a6: 4770 bx lr
  8187. 080075a8 <SysTick_Handler>:
  8188. void SysTick_Handler(void)
  8189. {
  8190. /* USER CODE BEGIN SysTick_IRQn 0 */
  8191. /* USER CODE END SysTick_IRQn 0 */
  8192. HAL_IncTick();
  8193. 80075a8: f7fc be72 b.w 8004290 <HAL_IncTick>
  8194. 080075ac <USART1_IRQHandler>:
  8195. void USART1_IRQHandler(void)
  8196. {
  8197. /* USER CODE BEGIN USART1_IRQn 0 */
  8198. /* USER CODE END USART1_IRQn 0 */
  8199. HAL_UART_IRQHandler(&huart1);
  8200. 80075ac: 4801 ldr r0, [pc, #4] ; (80075b4 <USART1_IRQHandler+0x8>)
  8201. 80075ae: f7fe b9ff b.w 80059b0 <HAL_UART_IRQHandler>
  8202. 80075b2: bf00 nop
  8203. 80075b4: 20000478 .word 0x20000478
  8204. 080075b8 <USART2_IRQHandler>:
  8205. void USART2_IRQHandler(void)
  8206. {
  8207. /* USER CODE BEGIN USART2_IRQn 0 */
  8208. /* USER CODE END USART2_IRQn 0 */
  8209. HAL_UART_IRQHandler(&huart2);
  8210. 80075b8: 4801 ldr r0, [pc, #4] ; (80075c0 <USART2_IRQHandler+0x8>)
  8211. 80075ba: f7fe b9f9 b.w 80059b0 <HAL_UART_IRQHandler>
  8212. 80075be: bf00 nop
  8213. 80075c0: 200005c4 .word 0x200005c4
  8214. 080075c4 <TIM6_IRQHandler>:
  8215. void TIM6_IRQHandler(void)
  8216. {
  8217. /* USER CODE BEGIN TIM6_IRQn 0 */
  8218. /* USER CODE END TIM6_IRQn 0 */
  8219. HAL_TIM_IRQHandler(&htim6);
  8220. 80075c4: 4801 ldr r0, [pc, #4] ; (80075cc <TIM6_IRQHandler+0x8>)
  8221. 80075c6: f7fd bf00 b.w 80053ca <HAL_TIM_IRQHandler>
  8222. 80075ca: bf00 nop
  8223. 80075cc: 20000584 .word 0x20000584
  8224. 080075d0 <SystemInit>:
  8225. */
  8226. void SystemInit (void)
  8227. {
  8228. /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  8229. /* Set HSION bit */
  8230. RCC->CR |= 0x00000001U;
  8231. 80075d0: 4b0e ldr r3, [pc, #56] ; (800760c <SystemInit+0x3c>)
  8232. 80075d2: 681a ldr r2, [r3, #0]
  8233. 80075d4: f042 0201 orr.w r2, r2, #1
  8234. 80075d8: 601a str r2, [r3, #0]
  8235. /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
  8236. #if !defined(STM32F105xC) && !defined(STM32F107xC)
  8237. RCC->CFGR &= 0xF8FF0000U;
  8238. 80075da: 6859 ldr r1, [r3, #4]
  8239. 80075dc: 4a0c ldr r2, [pc, #48] ; (8007610 <SystemInit+0x40>)
  8240. 80075de: 400a ands r2, r1
  8241. 80075e0: 605a str r2, [r3, #4]
  8242. #else
  8243. RCC->CFGR &= 0xF0FF0000U;
  8244. #endif /* STM32F105xC */
  8245. /* Reset HSEON, CSSON and PLLON bits */
  8246. RCC->CR &= 0xFEF6FFFFU;
  8247. 80075e2: 681a ldr r2, [r3, #0]
  8248. 80075e4: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000
  8249. 80075e8: f422 3280 bic.w r2, r2, #65536 ; 0x10000
  8250. 80075ec: 601a str r2, [r3, #0]
  8251. /* Reset HSEBYP bit */
  8252. RCC->CR &= 0xFFFBFFFFU;
  8253. 80075ee: 681a ldr r2, [r3, #0]
  8254. 80075f0: f422 2280 bic.w r2, r2, #262144 ; 0x40000
  8255. 80075f4: 601a str r2, [r3, #0]
  8256. /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  8257. RCC->CFGR &= 0xFF80FFFFU;
  8258. 80075f6: 685a ldr r2, [r3, #4]
  8259. 80075f8: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000
  8260. 80075fc: 605a str r2, [r3, #4]
  8261. /* Reset CFGR2 register */
  8262. RCC->CFGR2 = 0x00000000U;
  8263. #else
  8264. /* Disable all interrupts and clear pending bits */
  8265. RCC->CIR = 0x009F0000U;
  8266. 80075fe: f44f 021f mov.w r2, #10420224 ; 0x9f0000
  8267. 8007602: 609a str r2, [r3, #8]
  8268. #endif
  8269. #ifdef VECT_TAB_SRAM
  8270. SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
  8271. #else
  8272. SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
  8273. 8007604: 4a03 ldr r2, [pc, #12] ; (8007614 <SystemInit+0x44>)
  8274. 8007606: 4b04 ldr r3, [pc, #16] ; (8007618 <SystemInit+0x48>)
  8275. 8007608: 609a str r2, [r3, #8]
  8276. 800760a: 4770 bx lr
  8277. 800760c: 40021000 .word 0x40021000
  8278. 8007610: f8ff0000 .word 0xf8ff0000
  8279. 8007614: 08004000 .word 0x08004000
  8280. 8007618: e000ed00 .word 0xe000ed00
  8281. 0800761c <Reset_Handler>:
  8282. .weak Reset_Handler
  8283. .type Reset_Handler, %function
  8284. Reset_Handler:
  8285. /* Copy the data segment initializers from flash to SRAM */
  8286. movs r1, #0
  8287. 800761c: 2100 movs r1, #0
  8288. b LoopCopyDataInit
  8289. 800761e: e003 b.n 8007628 <LoopCopyDataInit>
  8290. 08007620 <CopyDataInit>:
  8291. CopyDataInit:
  8292. ldr r3, =_sidata
  8293. 8007620: 4b0b ldr r3, [pc, #44] ; (8007650 <LoopFillZerobss+0x14>)
  8294. ldr r3, [r3, r1]
  8295. 8007622: 585b ldr r3, [r3, r1]
  8296. str r3, [r0, r1]
  8297. 8007624: 5043 str r3, [r0, r1]
  8298. adds r1, r1, #4
  8299. 8007626: 3104 adds r1, #4
  8300. 08007628 <LoopCopyDataInit>:
  8301. LoopCopyDataInit:
  8302. ldr r0, =_sdata
  8303. 8007628: 480a ldr r0, [pc, #40] ; (8007654 <LoopFillZerobss+0x18>)
  8304. ldr r3, =_edata
  8305. 800762a: 4b0b ldr r3, [pc, #44] ; (8007658 <LoopFillZerobss+0x1c>)
  8306. adds r2, r0, r1
  8307. 800762c: 1842 adds r2, r0, r1
  8308. cmp r2, r3
  8309. 800762e: 429a cmp r2, r3
  8310. bcc CopyDataInit
  8311. 8007630: d3f6 bcc.n 8007620 <CopyDataInit>
  8312. ldr r2, =_sbss
  8313. 8007632: 4a0a ldr r2, [pc, #40] ; (800765c <LoopFillZerobss+0x20>)
  8314. b LoopFillZerobss
  8315. 8007634: e002 b.n 800763c <LoopFillZerobss>
  8316. 08007636 <FillZerobss>:
  8317. /* Zero fill the bss segment. */
  8318. FillZerobss:
  8319. movs r3, #0
  8320. 8007636: 2300 movs r3, #0
  8321. str r3, [r2], #4
  8322. 8007638: f842 3b04 str.w r3, [r2], #4
  8323. 0800763c <LoopFillZerobss>:
  8324. LoopFillZerobss:
  8325. ldr r3, = _ebss
  8326. 800763c: 4b08 ldr r3, [pc, #32] ; (8007660 <LoopFillZerobss+0x24>)
  8327. cmp r2, r3
  8328. 800763e: 429a cmp r2, r3
  8329. bcc FillZerobss
  8330. 8007640: d3f9 bcc.n 8007636 <FillZerobss>
  8331. /* Call the clock system intitialization function.*/
  8332. bl SystemInit
  8333. 8007642: f7ff ffc5 bl 80075d0 <SystemInit>
  8334. /* Call static constructors */
  8335. bl __libc_init_array
  8336. 8007646: f000 f80f bl 8007668 <__libc_init_array>
  8337. /* Call the application's entry point.*/
  8338. bl main
  8339. 800764a: f7ff fba3 bl 8006d94 <main>
  8340. bx lr
  8341. 800764e: 4770 bx lr
  8342. ldr r3, =_sidata
  8343. 8007650: 08008af4 .word 0x08008af4
  8344. ldr r0, =_sdata
  8345. 8007654: 20000000 .word 0x20000000
  8346. ldr r3, =_edata
  8347. 8007658: 20000070 .word 0x20000070
  8348. ldr r2, =_sbss
  8349. 800765c: 20000070 .word 0x20000070
  8350. ldr r3, = _ebss
  8351. 8007660: 2000071c .word 0x2000071c
  8352. 08007664 <ADC1_2_IRQHandler>:
  8353. * @retval : None
  8354. */
  8355. .section .text.Default_Handler,"ax",%progbits
  8356. Default_Handler:
  8357. Infinite_Loop:
  8358. b Infinite_Loop
  8359. 8007664: e7fe b.n 8007664 <ADC1_2_IRQHandler>
  8360. ...
  8361. 08007668 <__libc_init_array>:
  8362. 8007668: b570 push {r4, r5, r6, lr}
  8363. 800766a: 2500 movs r5, #0
  8364. 800766c: 4e0c ldr r6, [pc, #48] ; (80076a0 <__libc_init_array+0x38>)
  8365. 800766e: 4c0d ldr r4, [pc, #52] ; (80076a4 <__libc_init_array+0x3c>)
  8366. 8007670: 1ba4 subs r4, r4, r6
  8367. 8007672: 10a4 asrs r4, r4, #2
  8368. 8007674: 42a5 cmp r5, r4
  8369. 8007676: d109 bne.n 800768c <__libc_init_array+0x24>
  8370. 8007678: f001 f8d4 bl 8008824 <_init>
  8371. 800767c: 2500 movs r5, #0
  8372. 800767e: 4e0a ldr r6, [pc, #40] ; (80076a8 <__libc_init_array+0x40>)
  8373. 8007680: 4c0a ldr r4, [pc, #40] ; (80076ac <__libc_init_array+0x44>)
  8374. 8007682: 1ba4 subs r4, r4, r6
  8375. 8007684: 10a4 asrs r4, r4, #2
  8376. 8007686: 42a5 cmp r5, r4
  8377. 8007688: d105 bne.n 8007696 <__libc_init_array+0x2e>
  8378. 800768a: bd70 pop {r4, r5, r6, pc}
  8379. 800768c: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  8380. 8007690: 4798 blx r3
  8381. 8007692: 3501 adds r5, #1
  8382. 8007694: e7ee b.n 8007674 <__libc_init_array+0xc>
  8383. 8007696: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  8384. 800769a: 4798 blx r3
  8385. 800769c: 3501 adds r5, #1
  8386. 800769e: e7f2 b.n 8007686 <__libc_init_array+0x1e>
  8387. 80076a0: 08008aec .word 0x08008aec
  8388. 80076a4: 08008aec .word 0x08008aec
  8389. 80076a8: 08008aec .word 0x08008aec
  8390. 80076ac: 08008af0 .word 0x08008af0
  8391. 080076b0 <memcpy>:
  8392. 80076b0: b510 push {r4, lr}
  8393. 80076b2: 1e43 subs r3, r0, #1
  8394. 80076b4: 440a add r2, r1
  8395. 80076b6: 4291 cmp r1, r2
  8396. 80076b8: d100 bne.n 80076bc <memcpy+0xc>
  8397. 80076ba: bd10 pop {r4, pc}
  8398. 80076bc: f811 4b01 ldrb.w r4, [r1], #1
  8399. 80076c0: f803 4f01 strb.w r4, [r3, #1]!
  8400. 80076c4: e7f7 b.n 80076b6 <memcpy+0x6>
  8401. 080076c6 <memset>:
  8402. 80076c6: 4603 mov r3, r0
  8403. 80076c8: 4402 add r2, r0
  8404. 80076ca: 4293 cmp r3, r2
  8405. 80076cc: d100 bne.n 80076d0 <memset+0xa>
  8406. 80076ce: 4770 bx lr
  8407. 80076d0: f803 1b01 strb.w r1, [r3], #1
  8408. 80076d4: e7f9 b.n 80076ca <memset+0x4>
  8409. ...
  8410. 080076d8 <iprintf>:
  8411. 80076d8: b40f push {r0, r1, r2, r3}
  8412. 80076da: 4b0a ldr r3, [pc, #40] ; (8007704 <iprintf+0x2c>)
  8413. 80076dc: b513 push {r0, r1, r4, lr}
  8414. 80076de: 681c ldr r4, [r3, #0]
  8415. 80076e0: b124 cbz r4, 80076ec <iprintf+0x14>
  8416. 80076e2: 69a3 ldr r3, [r4, #24]
  8417. 80076e4: b913 cbnz r3, 80076ec <iprintf+0x14>
  8418. 80076e6: 4620 mov r0, r4
  8419. 80076e8: f000 faee bl 8007cc8 <__sinit>
  8420. 80076ec: ab05 add r3, sp, #20
  8421. 80076ee: 9a04 ldr r2, [sp, #16]
  8422. 80076f0: 68a1 ldr r1, [r4, #8]
  8423. 80076f2: 4620 mov r0, r4
  8424. 80076f4: 9301 str r3, [sp, #4]
  8425. 80076f6: f000 fcaf bl 8008058 <_vfiprintf_r>
  8426. 80076fa: b002 add sp, #8
  8427. 80076fc: e8bd 4010 ldmia.w sp!, {r4, lr}
  8428. 8007700: b004 add sp, #16
  8429. 8007702: 4770 bx lr
  8430. 8007704: 2000000c .word 0x2000000c
  8431. 08007708 <putchar>:
  8432. 8007708: b538 push {r3, r4, r5, lr}
  8433. 800770a: 4b08 ldr r3, [pc, #32] ; (800772c <putchar+0x24>)
  8434. 800770c: 4605 mov r5, r0
  8435. 800770e: 681c ldr r4, [r3, #0]
  8436. 8007710: b124 cbz r4, 800771c <putchar+0x14>
  8437. 8007712: 69a3 ldr r3, [r4, #24]
  8438. 8007714: b913 cbnz r3, 800771c <putchar+0x14>
  8439. 8007716: 4620 mov r0, r4
  8440. 8007718: f000 fad6 bl 8007cc8 <__sinit>
  8441. 800771c: 68a2 ldr r2, [r4, #8]
  8442. 800771e: 4629 mov r1, r5
  8443. 8007720: 4620 mov r0, r4
  8444. 8007722: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
  8445. 8007726: f000 bf45 b.w 80085b4 <_putc_r>
  8446. 800772a: bf00 nop
  8447. 800772c: 2000000c .word 0x2000000c
  8448. 08007730 <_puts_r>:
  8449. 8007730: b570 push {r4, r5, r6, lr}
  8450. 8007732: 460e mov r6, r1
  8451. 8007734: 4605 mov r5, r0
  8452. 8007736: b118 cbz r0, 8007740 <_puts_r+0x10>
  8453. 8007738: 6983 ldr r3, [r0, #24]
  8454. 800773a: b90b cbnz r3, 8007740 <_puts_r+0x10>
  8455. 800773c: f000 fac4 bl 8007cc8 <__sinit>
  8456. 8007740: 69ab ldr r3, [r5, #24]
  8457. 8007742: 68ac ldr r4, [r5, #8]
  8458. 8007744: b913 cbnz r3, 800774c <_puts_r+0x1c>
  8459. 8007746: 4628 mov r0, r5
  8460. 8007748: f000 fabe bl 8007cc8 <__sinit>
  8461. 800774c: 4b23 ldr r3, [pc, #140] ; (80077dc <_puts_r+0xac>)
  8462. 800774e: 429c cmp r4, r3
  8463. 8007750: d117 bne.n 8007782 <_puts_r+0x52>
  8464. 8007752: 686c ldr r4, [r5, #4]
  8465. 8007754: 89a3 ldrh r3, [r4, #12]
  8466. 8007756: 071b lsls r3, r3, #28
  8467. 8007758: d51d bpl.n 8007796 <_puts_r+0x66>
  8468. 800775a: 6923 ldr r3, [r4, #16]
  8469. 800775c: b1db cbz r3, 8007796 <_puts_r+0x66>
  8470. 800775e: 3e01 subs r6, #1
  8471. 8007760: 68a3 ldr r3, [r4, #8]
  8472. 8007762: f816 1f01 ldrb.w r1, [r6, #1]!
  8473. 8007766: 3b01 subs r3, #1
  8474. 8007768: 60a3 str r3, [r4, #8]
  8475. 800776a: b9e9 cbnz r1, 80077a8 <_puts_r+0x78>
  8476. 800776c: 2b00 cmp r3, #0
  8477. 800776e: da2e bge.n 80077ce <_puts_r+0x9e>
  8478. 8007770: 4622 mov r2, r4
  8479. 8007772: 210a movs r1, #10
  8480. 8007774: 4628 mov r0, r5
  8481. 8007776: f000 f8f5 bl 8007964 <__swbuf_r>
  8482. 800777a: 3001 adds r0, #1
  8483. 800777c: d011 beq.n 80077a2 <_puts_r+0x72>
  8484. 800777e: 200a movs r0, #10
  8485. 8007780: bd70 pop {r4, r5, r6, pc}
  8486. 8007782: 4b17 ldr r3, [pc, #92] ; (80077e0 <_puts_r+0xb0>)
  8487. 8007784: 429c cmp r4, r3
  8488. 8007786: d101 bne.n 800778c <_puts_r+0x5c>
  8489. 8007788: 68ac ldr r4, [r5, #8]
  8490. 800778a: e7e3 b.n 8007754 <_puts_r+0x24>
  8491. 800778c: 4b15 ldr r3, [pc, #84] ; (80077e4 <_puts_r+0xb4>)
  8492. 800778e: 429c cmp r4, r3
  8493. 8007790: bf08 it eq
  8494. 8007792: 68ec ldreq r4, [r5, #12]
  8495. 8007794: e7de b.n 8007754 <_puts_r+0x24>
  8496. 8007796: 4621 mov r1, r4
  8497. 8007798: 4628 mov r0, r5
  8498. 800779a: f000 f935 bl 8007a08 <__swsetup_r>
  8499. 800779e: 2800 cmp r0, #0
  8500. 80077a0: d0dd beq.n 800775e <_puts_r+0x2e>
  8501. 80077a2: f04f 30ff mov.w r0, #4294967295
  8502. 80077a6: bd70 pop {r4, r5, r6, pc}
  8503. 80077a8: 2b00 cmp r3, #0
  8504. 80077aa: da04 bge.n 80077b6 <_puts_r+0x86>
  8505. 80077ac: 69a2 ldr r2, [r4, #24]
  8506. 80077ae: 4293 cmp r3, r2
  8507. 80077b0: db06 blt.n 80077c0 <_puts_r+0x90>
  8508. 80077b2: 290a cmp r1, #10
  8509. 80077b4: d004 beq.n 80077c0 <_puts_r+0x90>
  8510. 80077b6: 6823 ldr r3, [r4, #0]
  8511. 80077b8: 1c5a adds r2, r3, #1
  8512. 80077ba: 6022 str r2, [r4, #0]
  8513. 80077bc: 7019 strb r1, [r3, #0]
  8514. 80077be: e7cf b.n 8007760 <_puts_r+0x30>
  8515. 80077c0: 4622 mov r2, r4
  8516. 80077c2: 4628 mov r0, r5
  8517. 80077c4: f000 f8ce bl 8007964 <__swbuf_r>
  8518. 80077c8: 3001 adds r0, #1
  8519. 80077ca: d1c9 bne.n 8007760 <_puts_r+0x30>
  8520. 80077cc: e7e9 b.n 80077a2 <_puts_r+0x72>
  8521. 80077ce: 200a movs r0, #10
  8522. 80077d0: 6823 ldr r3, [r4, #0]
  8523. 80077d2: 1c5a adds r2, r3, #1
  8524. 80077d4: 6022 str r2, [r4, #0]
  8525. 80077d6: 7018 strb r0, [r3, #0]
  8526. 80077d8: bd70 pop {r4, r5, r6, pc}
  8527. 80077da: bf00 nop
  8528. 80077dc: 08008a78 .word 0x08008a78
  8529. 80077e0: 08008a98 .word 0x08008a98
  8530. 80077e4: 08008a58 .word 0x08008a58
  8531. 080077e8 <puts>:
  8532. 80077e8: 4b02 ldr r3, [pc, #8] ; (80077f4 <puts+0xc>)
  8533. 80077ea: 4601 mov r1, r0
  8534. 80077ec: 6818 ldr r0, [r3, #0]
  8535. 80077ee: f7ff bf9f b.w 8007730 <_puts_r>
  8536. 80077f2: bf00 nop
  8537. 80077f4: 2000000c .word 0x2000000c
  8538. 080077f8 <setbuf>:
  8539. 80077f8: 2900 cmp r1, #0
  8540. 80077fa: f44f 6380 mov.w r3, #1024 ; 0x400
  8541. 80077fe: bf0c ite eq
  8542. 8007800: 2202 moveq r2, #2
  8543. 8007802: 2200 movne r2, #0
  8544. 8007804: f000 b800 b.w 8007808 <setvbuf>
  8545. 08007808 <setvbuf>:
  8546. 8007808: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
  8547. 800780c: 461d mov r5, r3
  8548. 800780e: 4b51 ldr r3, [pc, #324] ; (8007954 <setvbuf+0x14c>)
  8549. 8007810: 4604 mov r4, r0
  8550. 8007812: 681e ldr r6, [r3, #0]
  8551. 8007814: 460f mov r7, r1
  8552. 8007816: 4690 mov r8, r2
  8553. 8007818: b126 cbz r6, 8007824 <setvbuf+0x1c>
  8554. 800781a: 69b3 ldr r3, [r6, #24]
  8555. 800781c: b913 cbnz r3, 8007824 <setvbuf+0x1c>
  8556. 800781e: 4630 mov r0, r6
  8557. 8007820: f000 fa52 bl 8007cc8 <__sinit>
  8558. 8007824: 4b4c ldr r3, [pc, #304] ; (8007958 <setvbuf+0x150>)
  8559. 8007826: 429c cmp r4, r3
  8560. 8007828: d152 bne.n 80078d0 <setvbuf+0xc8>
  8561. 800782a: 6874 ldr r4, [r6, #4]
  8562. 800782c: f1b8 0f02 cmp.w r8, #2
  8563. 8007830: d006 beq.n 8007840 <setvbuf+0x38>
  8564. 8007832: f1b8 0f01 cmp.w r8, #1
  8565. 8007836: f200 8089 bhi.w 800794c <setvbuf+0x144>
  8566. 800783a: 2d00 cmp r5, #0
  8567. 800783c: f2c0 8086 blt.w 800794c <setvbuf+0x144>
  8568. 8007840: 4621 mov r1, r4
  8569. 8007842: 4630 mov r0, r6
  8570. 8007844: f000 f9d6 bl 8007bf4 <_fflush_r>
  8571. 8007848: 6b61 ldr r1, [r4, #52] ; 0x34
  8572. 800784a: b141 cbz r1, 800785e <setvbuf+0x56>
  8573. 800784c: f104 0344 add.w r3, r4, #68 ; 0x44
  8574. 8007850: 4299 cmp r1, r3
  8575. 8007852: d002 beq.n 800785a <setvbuf+0x52>
  8576. 8007854: 4630 mov r0, r6
  8577. 8007856: f000 fb2d bl 8007eb4 <_free_r>
  8578. 800785a: 2300 movs r3, #0
  8579. 800785c: 6363 str r3, [r4, #52] ; 0x34
  8580. 800785e: 2300 movs r3, #0
  8581. 8007860: 61a3 str r3, [r4, #24]
  8582. 8007862: 6063 str r3, [r4, #4]
  8583. 8007864: 89a3 ldrh r3, [r4, #12]
  8584. 8007866: 061b lsls r3, r3, #24
  8585. 8007868: d503 bpl.n 8007872 <setvbuf+0x6a>
  8586. 800786a: 6921 ldr r1, [r4, #16]
  8587. 800786c: 4630 mov r0, r6
  8588. 800786e: f000 fb21 bl 8007eb4 <_free_r>
  8589. 8007872: 89a3 ldrh r3, [r4, #12]
  8590. 8007874: f1b8 0f02 cmp.w r8, #2
  8591. 8007878: f423 634a bic.w r3, r3, #3232 ; 0xca0
  8592. 800787c: f023 0303 bic.w r3, r3, #3
  8593. 8007880: 81a3 strh r3, [r4, #12]
  8594. 8007882: d05d beq.n 8007940 <setvbuf+0x138>
  8595. 8007884: ab01 add r3, sp, #4
  8596. 8007886: 466a mov r2, sp
  8597. 8007888: 4621 mov r1, r4
  8598. 800788a: 4630 mov r0, r6
  8599. 800788c: f000 faa6 bl 8007ddc <__swhatbuf_r>
  8600. 8007890: 89a3 ldrh r3, [r4, #12]
  8601. 8007892: 4318 orrs r0, r3
  8602. 8007894: 81a0 strh r0, [r4, #12]
  8603. 8007896: bb2d cbnz r5, 80078e4 <setvbuf+0xdc>
  8604. 8007898: 9d00 ldr r5, [sp, #0]
  8605. 800789a: 4628 mov r0, r5
  8606. 800789c: f000 fb02 bl 8007ea4 <malloc>
  8607. 80078a0: 4607 mov r7, r0
  8608. 80078a2: 2800 cmp r0, #0
  8609. 80078a4: d14e bne.n 8007944 <setvbuf+0x13c>
  8610. 80078a6: f8dd 9000 ldr.w r9, [sp]
  8611. 80078aa: 45a9 cmp r9, r5
  8612. 80078ac: d13c bne.n 8007928 <setvbuf+0x120>
  8613. 80078ae: f04f 30ff mov.w r0, #4294967295
  8614. 80078b2: 89a3 ldrh r3, [r4, #12]
  8615. 80078b4: f043 0302 orr.w r3, r3, #2
  8616. 80078b8: 81a3 strh r3, [r4, #12]
  8617. 80078ba: 2300 movs r3, #0
  8618. 80078bc: 60a3 str r3, [r4, #8]
  8619. 80078be: f104 0347 add.w r3, r4, #71 ; 0x47
  8620. 80078c2: 6023 str r3, [r4, #0]
  8621. 80078c4: 6123 str r3, [r4, #16]
  8622. 80078c6: 2301 movs r3, #1
  8623. 80078c8: 6163 str r3, [r4, #20]
  8624. 80078ca: b003 add sp, #12
  8625. 80078cc: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
  8626. 80078d0: 4b22 ldr r3, [pc, #136] ; (800795c <setvbuf+0x154>)
  8627. 80078d2: 429c cmp r4, r3
  8628. 80078d4: d101 bne.n 80078da <setvbuf+0xd2>
  8629. 80078d6: 68b4 ldr r4, [r6, #8]
  8630. 80078d8: e7a8 b.n 800782c <setvbuf+0x24>
  8631. 80078da: 4b21 ldr r3, [pc, #132] ; (8007960 <setvbuf+0x158>)
  8632. 80078dc: 429c cmp r4, r3
  8633. 80078de: bf08 it eq
  8634. 80078e0: 68f4 ldreq r4, [r6, #12]
  8635. 80078e2: e7a3 b.n 800782c <setvbuf+0x24>
  8636. 80078e4: 2f00 cmp r7, #0
  8637. 80078e6: d0d8 beq.n 800789a <setvbuf+0x92>
  8638. 80078e8: 69b3 ldr r3, [r6, #24]
  8639. 80078ea: b913 cbnz r3, 80078f2 <setvbuf+0xea>
  8640. 80078ec: 4630 mov r0, r6
  8641. 80078ee: f000 f9eb bl 8007cc8 <__sinit>
  8642. 80078f2: f1b8 0f01 cmp.w r8, #1
  8643. 80078f6: bf08 it eq
  8644. 80078f8: 89a3 ldrheq r3, [r4, #12]
  8645. 80078fa: 6027 str r7, [r4, #0]
  8646. 80078fc: bf04 itt eq
  8647. 80078fe: f043 0301 orreq.w r3, r3, #1
  8648. 8007902: 81a3 strheq r3, [r4, #12]
  8649. 8007904: 89a3 ldrh r3, [r4, #12]
  8650. 8007906: 6127 str r7, [r4, #16]
  8651. 8007908: f013 0008 ands.w r0, r3, #8
  8652. 800790c: 6165 str r5, [r4, #20]
  8653. 800790e: d01b beq.n 8007948 <setvbuf+0x140>
  8654. 8007910: f013 0001 ands.w r0, r3, #1
  8655. 8007914: f04f 0300 mov.w r3, #0
  8656. 8007918: bf1f itttt ne
  8657. 800791a: 426d negne r5, r5
  8658. 800791c: 60a3 strne r3, [r4, #8]
  8659. 800791e: 61a5 strne r5, [r4, #24]
  8660. 8007920: 4618 movne r0, r3
  8661. 8007922: bf08 it eq
  8662. 8007924: 60a5 streq r5, [r4, #8]
  8663. 8007926: e7d0 b.n 80078ca <setvbuf+0xc2>
  8664. 8007928: 4648 mov r0, r9
  8665. 800792a: f000 fabb bl 8007ea4 <malloc>
  8666. 800792e: 4607 mov r7, r0
  8667. 8007930: 2800 cmp r0, #0
  8668. 8007932: d0bc beq.n 80078ae <setvbuf+0xa6>
  8669. 8007934: 89a3 ldrh r3, [r4, #12]
  8670. 8007936: 464d mov r5, r9
  8671. 8007938: f043 0380 orr.w r3, r3, #128 ; 0x80
  8672. 800793c: 81a3 strh r3, [r4, #12]
  8673. 800793e: e7d3 b.n 80078e8 <setvbuf+0xe0>
  8674. 8007940: 2000 movs r0, #0
  8675. 8007942: e7b6 b.n 80078b2 <setvbuf+0xaa>
  8676. 8007944: 46a9 mov r9, r5
  8677. 8007946: e7f5 b.n 8007934 <setvbuf+0x12c>
  8678. 8007948: 60a0 str r0, [r4, #8]
  8679. 800794a: e7be b.n 80078ca <setvbuf+0xc2>
  8680. 800794c: f04f 30ff mov.w r0, #4294967295
  8681. 8007950: e7bb b.n 80078ca <setvbuf+0xc2>
  8682. 8007952: bf00 nop
  8683. 8007954: 2000000c .word 0x2000000c
  8684. 8007958: 08008a78 .word 0x08008a78
  8685. 800795c: 08008a98 .word 0x08008a98
  8686. 8007960: 08008a58 .word 0x08008a58
  8687. 08007964 <__swbuf_r>:
  8688. 8007964: b5f8 push {r3, r4, r5, r6, r7, lr}
  8689. 8007966: 460e mov r6, r1
  8690. 8007968: 4614 mov r4, r2
  8691. 800796a: 4605 mov r5, r0
  8692. 800796c: b118 cbz r0, 8007976 <__swbuf_r+0x12>
  8693. 800796e: 6983 ldr r3, [r0, #24]
  8694. 8007970: b90b cbnz r3, 8007976 <__swbuf_r+0x12>
  8695. 8007972: f000 f9a9 bl 8007cc8 <__sinit>
  8696. 8007976: 4b21 ldr r3, [pc, #132] ; (80079fc <__swbuf_r+0x98>)
  8697. 8007978: 429c cmp r4, r3
  8698. 800797a: d12a bne.n 80079d2 <__swbuf_r+0x6e>
  8699. 800797c: 686c ldr r4, [r5, #4]
  8700. 800797e: 69a3 ldr r3, [r4, #24]
  8701. 8007980: 60a3 str r3, [r4, #8]
  8702. 8007982: 89a3 ldrh r3, [r4, #12]
  8703. 8007984: 071a lsls r2, r3, #28
  8704. 8007986: d52e bpl.n 80079e6 <__swbuf_r+0x82>
  8705. 8007988: 6923 ldr r3, [r4, #16]
  8706. 800798a: b363 cbz r3, 80079e6 <__swbuf_r+0x82>
  8707. 800798c: 6923 ldr r3, [r4, #16]
  8708. 800798e: 6820 ldr r0, [r4, #0]
  8709. 8007990: b2f6 uxtb r6, r6
  8710. 8007992: 1ac0 subs r0, r0, r3
  8711. 8007994: 6963 ldr r3, [r4, #20]
  8712. 8007996: 4637 mov r7, r6
  8713. 8007998: 4298 cmp r0, r3
  8714. 800799a: db04 blt.n 80079a6 <__swbuf_r+0x42>
  8715. 800799c: 4621 mov r1, r4
  8716. 800799e: 4628 mov r0, r5
  8717. 80079a0: f000 f928 bl 8007bf4 <_fflush_r>
  8718. 80079a4: bb28 cbnz r0, 80079f2 <__swbuf_r+0x8e>
  8719. 80079a6: 68a3 ldr r3, [r4, #8]
  8720. 80079a8: 3001 adds r0, #1
  8721. 80079aa: 3b01 subs r3, #1
  8722. 80079ac: 60a3 str r3, [r4, #8]
  8723. 80079ae: 6823 ldr r3, [r4, #0]
  8724. 80079b0: 1c5a adds r2, r3, #1
  8725. 80079b2: 6022 str r2, [r4, #0]
  8726. 80079b4: 701e strb r6, [r3, #0]
  8727. 80079b6: 6963 ldr r3, [r4, #20]
  8728. 80079b8: 4298 cmp r0, r3
  8729. 80079ba: d004 beq.n 80079c6 <__swbuf_r+0x62>
  8730. 80079bc: 89a3 ldrh r3, [r4, #12]
  8731. 80079be: 07db lsls r3, r3, #31
  8732. 80079c0: d519 bpl.n 80079f6 <__swbuf_r+0x92>
  8733. 80079c2: 2e0a cmp r6, #10
  8734. 80079c4: d117 bne.n 80079f6 <__swbuf_r+0x92>
  8735. 80079c6: 4621 mov r1, r4
  8736. 80079c8: 4628 mov r0, r5
  8737. 80079ca: f000 f913 bl 8007bf4 <_fflush_r>
  8738. 80079ce: b190 cbz r0, 80079f6 <__swbuf_r+0x92>
  8739. 80079d0: e00f b.n 80079f2 <__swbuf_r+0x8e>
  8740. 80079d2: 4b0b ldr r3, [pc, #44] ; (8007a00 <__swbuf_r+0x9c>)
  8741. 80079d4: 429c cmp r4, r3
  8742. 80079d6: d101 bne.n 80079dc <__swbuf_r+0x78>
  8743. 80079d8: 68ac ldr r4, [r5, #8]
  8744. 80079da: e7d0 b.n 800797e <__swbuf_r+0x1a>
  8745. 80079dc: 4b09 ldr r3, [pc, #36] ; (8007a04 <__swbuf_r+0xa0>)
  8746. 80079de: 429c cmp r4, r3
  8747. 80079e0: bf08 it eq
  8748. 80079e2: 68ec ldreq r4, [r5, #12]
  8749. 80079e4: e7cb b.n 800797e <__swbuf_r+0x1a>
  8750. 80079e6: 4621 mov r1, r4
  8751. 80079e8: 4628 mov r0, r5
  8752. 80079ea: f000 f80d bl 8007a08 <__swsetup_r>
  8753. 80079ee: 2800 cmp r0, #0
  8754. 80079f0: d0cc beq.n 800798c <__swbuf_r+0x28>
  8755. 80079f2: f04f 37ff mov.w r7, #4294967295
  8756. 80079f6: 4638 mov r0, r7
  8757. 80079f8: bdf8 pop {r3, r4, r5, r6, r7, pc}
  8758. 80079fa: bf00 nop
  8759. 80079fc: 08008a78 .word 0x08008a78
  8760. 8007a00: 08008a98 .word 0x08008a98
  8761. 8007a04: 08008a58 .word 0x08008a58
  8762. 08007a08 <__swsetup_r>:
  8763. 8007a08: 4b32 ldr r3, [pc, #200] ; (8007ad4 <__swsetup_r+0xcc>)
  8764. 8007a0a: b570 push {r4, r5, r6, lr}
  8765. 8007a0c: 681d ldr r5, [r3, #0]
  8766. 8007a0e: 4606 mov r6, r0
  8767. 8007a10: 460c mov r4, r1
  8768. 8007a12: b125 cbz r5, 8007a1e <__swsetup_r+0x16>
  8769. 8007a14: 69ab ldr r3, [r5, #24]
  8770. 8007a16: b913 cbnz r3, 8007a1e <__swsetup_r+0x16>
  8771. 8007a18: 4628 mov r0, r5
  8772. 8007a1a: f000 f955 bl 8007cc8 <__sinit>
  8773. 8007a1e: 4b2e ldr r3, [pc, #184] ; (8007ad8 <__swsetup_r+0xd0>)
  8774. 8007a20: 429c cmp r4, r3
  8775. 8007a22: d10f bne.n 8007a44 <__swsetup_r+0x3c>
  8776. 8007a24: 686c ldr r4, [r5, #4]
  8777. 8007a26: f9b4 300c ldrsh.w r3, [r4, #12]
  8778. 8007a2a: b29a uxth r2, r3
  8779. 8007a2c: 0715 lsls r5, r2, #28
  8780. 8007a2e: d42c bmi.n 8007a8a <__swsetup_r+0x82>
  8781. 8007a30: 06d0 lsls r0, r2, #27
  8782. 8007a32: d411 bmi.n 8007a58 <__swsetup_r+0x50>
  8783. 8007a34: 2209 movs r2, #9
  8784. 8007a36: 6032 str r2, [r6, #0]
  8785. 8007a38: f043 0340 orr.w r3, r3, #64 ; 0x40
  8786. 8007a3c: 81a3 strh r3, [r4, #12]
  8787. 8007a3e: f04f 30ff mov.w r0, #4294967295
  8788. 8007a42: bd70 pop {r4, r5, r6, pc}
  8789. 8007a44: 4b25 ldr r3, [pc, #148] ; (8007adc <__swsetup_r+0xd4>)
  8790. 8007a46: 429c cmp r4, r3
  8791. 8007a48: d101 bne.n 8007a4e <__swsetup_r+0x46>
  8792. 8007a4a: 68ac ldr r4, [r5, #8]
  8793. 8007a4c: e7eb b.n 8007a26 <__swsetup_r+0x1e>
  8794. 8007a4e: 4b24 ldr r3, [pc, #144] ; (8007ae0 <__swsetup_r+0xd8>)
  8795. 8007a50: 429c cmp r4, r3
  8796. 8007a52: bf08 it eq
  8797. 8007a54: 68ec ldreq r4, [r5, #12]
  8798. 8007a56: e7e6 b.n 8007a26 <__swsetup_r+0x1e>
  8799. 8007a58: 0751 lsls r1, r2, #29
  8800. 8007a5a: d512 bpl.n 8007a82 <__swsetup_r+0x7a>
  8801. 8007a5c: 6b61 ldr r1, [r4, #52] ; 0x34
  8802. 8007a5e: b141 cbz r1, 8007a72 <__swsetup_r+0x6a>
  8803. 8007a60: f104 0344 add.w r3, r4, #68 ; 0x44
  8804. 8007a64: 4299 cmp r1, r3
  8805. 8007a66: d002 beq.n 8007a6e <__swsetup_r+0x66>
  8806. 8007a68: 4630 mov r0, r6
  8807. 8007a6a: f000 fa23 bl 8007eb4 <_free_r>
  8808. 8007a6e: 2300 movs r3, #0
  8809. 8007a70: 6363 str r3, [r4, #52] ; 0x34
  8810. 8007a72: 89a3 ldrh r3, [r4, #12]
  8811. 8007a74: f023 0324 bic.w r3, r3, #36 ; 0x24
  8812. 8007a78: 81a3 strh r3, [r4, #12]
  8813. 8007a7a: 2300 movs r3, #0
  8814. 8007a7c: 6063 str r3, [r4, #4]
  8815. 8007a7e: 6923 ldr r3, [r4, #16]
  8816. 8007a80: 6023 str r3, [r4, #0]
  8817. 8007a82: 89a3 ldrh r3, [r4, #12]
  8818. 8007a84: f043 0308 orr.w r3, r3, #8
  8819. 8007a88: 81a3 strh r3, [r4, #12]
  8820. 8007a8a: 6923 ldr r3, [r4, #16]
  8821. 8007a8c: b94b cbnz r3, 8007aa2 <__swsetup_r+0x9a>
  8822. 8007a8e: 89a3 ldrh r3, [r4, #12]
  8823. 8007a90: f403 7320 and.w r3, r3, #640 ; 0x280
  8824. 8007a94: f5b3 7f00 cmp.w r3, #512 ; 0x200
  8825. 8007a98: d003 beq.n 8007aa2 <__swsetup_r+0x9a>
  8826. 8007a9a: 4621 mov r1, r4
  8827. 8007a9c: 4630 mov r0, r6
  8828. 8007a9e: f000 f9c1 bl 8007e24 <__smakebuf_r>
  8829. 8007aa2: 89a2 ldrh r2, [r4, #12]
  8830. 8007aa4: f012 0301 ands.w r3, r2, #1
  8831. 8007aa8: d00c beq.n 8007ac4 <__swsetup_r+0xbc>
  8832. 8007aaa: 2300 movs r3, #0
  8833. 8007aac: 60a3 str r3, [r4, #8]
  8834. 8007aae: 6963 ldr r3, [r4, #20]
  8835. 8007ab0: 425b negs r3, r3
  8836. 8007ab2: 61a3 str r3, [r4, #24]
  8837. 8007ab4: 6923 ldr r3, [r4, #16]
  8838. 8007ab6: b953 cbnz r3, 8007ace <__swsetup_r+0xc6>
  8839. 8007ab8: f9b4 300c ldrsh.w r3, [r4, #12]
  8840. 8007abc: f013 0080 ands.w r0, r3, #128 ; 0x80
  8841. 8007ac0: d1ba bne.n 8007a38 <__swsetup_r+0x30>
  8842. 8007ac2: bd70 pop {r4, r5, r6, pc}
  8843. 8007ac4: 0792 lsls r2, r2, #30
  8844. 8007ac6: bf58 it pl
  8845. 8007ac8: 6963 ldrpl r3, [r4, #20]
  8846. 8007aca: 60a3 str r3, [r4, #8]
  8847. 8007acc: e7f2 b.n 8007ab4 <__swsetup_r+0xac>
  8848. 8007ace: 2000 movs r0, #0
  8849. 8007ad0: e7f7 b.n 8007ac2 <__swsetup_r+0xba>
  8850. 8007ad2: bf00 nop
  8851. 8007ad4: 2000000c .word 0x2000000c
  8852. 8007ad8: 08008a78 .word 0x08008a78
  8853. 8007adc: 08008a98 .word 0x08008a98
  8854. 8007ae0: 08008a58 .word 0x08008a58
  8855. 08007ae4 <__sflush_r>:
  8856. 8007ae4: 898a ldrh r2, [r1, #12]
  8857. 8007ae6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  8858. 8007aea: 4605 mov r5, r0
  8859. 8007aec: 0710 lsls r0, r2, #28
  8860. 8007aee: 460c mov r4, r1
  8861. 8007af0: d45a bmi.n 8007ba8 <__sflush_r+0xc4>
  8862. 8007af2: 684b ldr r3, [r1, #4]
  8863. 8007af4: 2b00 cmp r3, #0
  8864. 8007af6: dc05 bgt.n 8007b04 <__sflush_r+0x20>
  8865. 8007af8: 6c0b ldr r3, [r1, #64] ; 0x40
  8866. 8007afa: 2b00 cmp r3, #0
  8867. 8007afc: dc02 bgt.n 8007b04 <__sflush_r+0x20>
  8868. 8007afe: 2000 movs r0, #0
  8869. 8007b00: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8870. 8007b04: 6ae6 ldr r6, [r4, #44] ; 0x2c
  8871. 8007b06: 2e00 cmp r6, #0
  8872. 8007b08: d0f9 beq.n 8007afe <__sflush_r+0x1a>
  8873. 8007b0a: 2300 movs r3, #0
  8874. 8007b0c: f412 5280 ands.w r2, r2, #4096 ; 0x1000
  8875. 8007b10: 682f ldr r7, [r5, #0]
  8876. 8007b12: 602b str r3, [r5, #0]
  8877. 8007b14: d033 beq.n 8007b7e <__sflush_r+0x9a>
  8878. 8007b16: 6d60 ldr r0, [r4, #84] ; 0x54
  8879. 8007b18: 89a3 ldrh r3, [r4, #12]
  8880. 8007b1a: 075a lsls r2, r3, #29
  8881. 8007b1c: d505 bpl.n 8007b2a <__sflush_r+0x46>
  8882. 8007b1e: 6863 ldr r3, [r4, #4]
  8883. 8007b20: 1ac0 subs r0, r0, r3
  8884. 8007b22: 6b63 ldr r3, [r4, #52] ; 0x34
  8885. 8007b24: b10b cbz r3, 8007b2a <__sflush_r+0x46>
  8886. 8007b26: 6c23 ldr r3, [r4, #64] ; 0x40
  8887. 8007b28: 1ac0 subs r0, r0, r3
  8888. 8007b2a: 2300 movs r3, #0
  8889. 8007b2c: 4602 mov r2, r0
  8890. 8007b2e: 6ae6 ldr r6, [r4, #44] ; 0x2c
  8891. 8007b30: 6a21 ldr r1, [r4, #32]
  8892. 8007b32: 4628 mov r0, r5
  8893. 8007b34: 47b0 blx r6
  8894. 8007b36: 1c43 adds r3, r0, #1
  8895. 8007b38: 89a3 ldrh r3, [r4, #12]
  8896. 8007b3a: d106 bne.n 8007b4a <__sflush_r+0x66>
  8897. 8007b3c: 6829 ldr r1, [r5, #0]
  8898. 8007b3e: 291d cmp r1, #29
  8899. 8007b40: d84b bhi.n 8007bda <__sflush_r+0xf6>
  8900. 8007b42: 4a2b ldr r2, [pc, #172] ; (8007bf0 <__sflush_r+0x10c>)
  8901. 8007b44: 40ca lsrs r2, r1
  8902. 8007b46: 07d6 lsls r6, r2, #31
  8903. 8007b48: d547 bpl.n 8007bda <__sflush_r+0xf6>
  8904. 8007b4a: 2200 movs r2, #0
  8905. 8007b4c: 6062 str r2, [r4, #4]
  8906. 8007b4e: 6922 ldr r2, [r4, #16]
  8907. 8007b50: 04d9 lsls r1, r3, #19
  8908. 8007b52: 6022 str r2, [r4, #0]
  8909. 8007b54: d504 bpl.n 8007b60 <__sflush_r+0x7c>
  8910. 8007b56: 1c42 adds r2, r0, #1
  8911. 8007b58: d101 bne.n 8007b5e <__sflush_r+0x7a>
  8912. 8007b5a: 682b ldr r3, [r5, #0]
  8913. 8007b5c: b903 cbnz r3, 8007b60 <__sflush_r+0x7c>
  8914. 8007b5e: 6560 str r0, [r4, #84] ; 0x54
  8915. 8007b60: 6b61 ldr r1, [r4, #52] ; 0x34
  8916. 8007b62: 602f str r7, [r5, #0]
  8917. 8007b64: 2900 cmp r1, #0
  8918. 8007b66: d0ca beq.n 8007afe <__sflush_r+0x1a>
  8919. 8007b68: f104 0344 add.w r3, r4, #68 ; 0x44
  8920. 8007b6c: 4299 cmp r1, r3
  8921. 8007b6e: d002 beq.n 8007b76 <__sflush_r+0x92>
  8922. 8007b70: 4628 mov r0, r5
  8923. 8007b72: f000 f99f bl 8007eb4 <_free_r>
  8924. 8007b76: 2000 movs r0, #0
  8925. 8007b78: 6360 str r0, [r4, #52] ; 0x34
  8926. 8007b7a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8927. 8007b7e: 6a21 ldr r1, [r4, #32]
  8928. 8007b80: 2301 movs r3, #1
  8929. 8007b82: 4628 mov r0, r5
  8930. 8007b84: 47b0 blx r6
  8931. 8007b86: 1c41 adds r1, r0, #1
  8932. 8007b88: d1c6 bne.n 8007b18 <__sflush_r+0x34>
  8933. 8007b8a: 682b ldr r3, [r5, #0]
  8934. 8007b8c: 2b00 cmp r3, #0
  8935. 8007b8e: d0c3 beq.n 8007b18 <__sflush_r+0x34>
  8936. 8007b90: 2b1d cmp r3, #29
  8937. 8007b92: d001 beq.n 8007b98 <__sflush_r+0xb4>
  8938. 8007b94: 2b16 cmp r3, #22
  8939. 8007b96: d101 bne.n 8007b9c <__sflush_r+0xb8>
  8940. 8007b98: 602f str r7, [r5, #0]
  8941. 8007b9a: e7b0 b.n 8007afe <__sflush_r+0x1a>
  8942. 8007b9c: 89a3 ldrh r3, [r4, #12]
  8943. 8007b9e: f043 0340 orr.w r3, r3, #64 ; 0x40
  8944. 8007ba2: 81a3 strh r3, [r4, #12]
  8945. 8007ba4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8946. 8007ba8: 690f ldr r7, [r1, #16]
  8947. 8007baa: 2f00 cmp r7, #0
  8948. 8007bac: d0a7 beq.n 8007afe <__sflush_r+0x1a>
  8949. 8007bae: 0793 lsls r3, r2, #30
  8950. 8007bb0: bf18 it ne
  8951. 8007bb2: 2300 movne r3, #0
  8952. 8007bb4: 680e ldr r6, [r1, #0]
  8953. 8007bb6: bf08 it eq
  8954. 8007bb8: 694b ldreq r3, [r1, #20]
  8955. 8007bba: eba6 0807 sub.w r8, r6, r7
  8956. 8007bbe: 600f str r7, [r1, #0]
  8957. 8007bc0: 608b str r3, [r1, #8]
  8958. 8007bc2: f1b8 0f00 cmp.w r8, #0
  8959. 8007bc6: dd9a ble.n 8007afe <__sflush_r+0x1a>
  8960. 8007bc8: 4643 mov r3, r8
  8961. 8007bca: 463a mov r2, r7
  8962. 8007bcc: 6a21 ldr r1, [r4, #32]
  8963. 8007bce: 4628 mov r0, r5
  8964. 8007bd0: 6aa6 ldr r6, [r4, #40] ; 0x28
  8965. 8007bd2: 47b0 blx r6
  8966. 8007bd4: 2800 cmp r0, #0
  8967. 8007bd6: dc07 bgt.n 8007be8 <__sflush_r+0x104>
  8968. 8007bd8: 89a3 ldrh r3, [r4, #12]
  8969. 8007bda: f043 0340 orr.w r3, r3, #64 ; 0x40
  8970. 8007bde: 81a3 strh r3, [r4, #12]
  8971. 8007be0: f04f 30ff mov.w r0, #4294967295
  8972. 8007be4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8973. 8007be8: 4407 add r7, r0
  8974. 8007bea: eba8 0800 sub.w r8, r8, r0
  8975. 8007bee: e7e8 b.n 8007bc2 <__sflush_r+0xde>
  8976. 8007bf0: 20400001 .word 0x20400001
  8977. 08007bf4 <_fflush_r>:
  8978. 8007bf4: b538 push {r3, r4, r5, lr}
  8979. 8007bf6: 690b ldr r3, [r1, #16]
  8980. 8007bf8: 4605 mov r5, r0
  8981. 8007bfa: 460c mov r4, r1
  8982. 8007bfc: b1db cbz r3, 8007c36 <_fflush_r+0x42>
  8983. 8007bfe: b118 cbz r0, 8007c08 <_fflush_r+0x14>
  8984. 8007c00: 6983 ldr r3, [r0, #24]
  8985. 8007c02: b90b cbnz r3, 8007c08 <_fflush_r+0x14>
  8986. 8007c04: f000 f860 bl 8007cc8 <__sinit>
  8987. 8007c08: 4b0c ldr r3, [pc, #48] ; (8007c3c <_fflush_r+0x48>)
  8988. 8007c0a: 429c cmp r4, r3
  8989. 8007c0c: d109 bne.n 8007c22 <_fflush_r+0x2e>
  8990. 8007c0e: 686c ldr r4, [r5, #4]
  8991. 8007c10: f9b4 300c ldrsh.w r3, [r4, #12]
  8992. 8007c14: b17b cbz r3, 8007c36 <_fflush_r+0x42>
  8993. 8007c16: 4621 mov r1, r4
  8994. 8007c18: 4628 mov r0, r5
  8995. 8007c1a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
  8996. 8007c1e: f7ff bf61 b.w 8007ae4 <__sflush_r>
  8997. 8007c22: 4b07 ldr r3, [pc, #28] ; (8007c40 <_fflush_r+0x4c>)
  8998. 8007c24: 429c cmp r4, r3
  8999. 8007c26: d101 bne.n 8007c2c <_fflush_r+0x38>
  9000. 8007c28: 68ac ldr r4, [r5, #8]
  9001. 8007c2a: e7f1 b.n 8007c10 <_fflush_r+0x1c>
  9002. 8007c2c: 4b05 ldr r3, [pc, #20] ; (8007c44 <_fflush_r+0x50>)
  9003. 8007c2e: 429c cmp r4, r3
  9004. 8007c30: bf08 it eq
  9005. 8007c32: 68ec ldreq r4, [r5, #12]
  9006. 8007c34: e7ec b.n 8007c10 <_fflush_r+0x1c>
  9007. 8007c36: 2000 movs r0, #0
  9008. 8007c38: bd38 pop {r3, r4, r5, pc}
  9009. 8007c3a: bf00 nop
  9010. 8007c3c: 08008a78 .word 0x08008a78
  9011. 8007c40: 08008a98 .word 0x08008a98
  9012. 8007c44: 08008a58 .word 0x08008a58
  9013. 08007c48 <_cleanup_r>:
  9014. 8007c48: 4901 ldr r1, [pc, #4] ; (8007c50 <_cleanup_r+0x8>)
  9015. 8007c4a: f000 b8a9 b.w 8007da0 <_fwalk_reent>
  9016. 8007c4e: bf00 nop
  9017. 8007c50: 08007bf5 .word 0x08007bf5
  9018. 08007c54 <std.isra.0>:
  9019. 8007c54: 2300 movs r3, #0
  9020. 8007c56: b510 push {r4, lr}
  9021. 8007c58: 4604 mov r4, r0
  9022. 8007c5a: 6003 str r3, [r0, #0]
  9023. 8007c5c: 6043 str r3, [r0, #4]
  9024. 8007c5e: 6083 str r3, [r0, #8]
  9025. 8007c60: 8181 strh r1, [r0, #12]
  9026. 8007c62: 6643 str r3, [r0, #100] ; 0x64
  9027. 8007c64: 81c2 strh r2, [r0, #14]
  9028. 8007c66: 6103 str r3, [r0, #16]
  9029. 8007c68: 6143 str r3, [r0, #20]
  9030. 8007c6a: 6183 str r3, [r0, #24]
  9031. 8007c6c: 4619 mov r1, r3
  9032. 8007c6e: 2208 movs r2, #8
  9033. 8007c70: 305c adds r0, #92 ; 0x5c
  9034. 8007c72: f7ff fd28 bl 80076c6 <memset>
  9035. 8007c76: 4b05 ldr r3, [pc, #20] ; (8007c8c <std.isra.0+0x38>)
  9036. 8007c78: 6224 str r4, [r4, #32]
  9037. 8007c7a: 6263 str r3, [r4, #36] ; 0x24
  9038. 8007c7c: 4b04 ldr r3, [pc, #16] ; (8007c90 <std.isra.0+0x3c>)
  9039. 8007c7e: 62a3 str r3, [r4, #40] ; 0x28
  9040. 8007c80: 4b04 ldr r3, [pc, #16] ; (8007c94 <std.isra.0+0x40>)
  9041. 8007c82: 62e3 str r3, [r4, #44] ; 0x2c
  9042. 8007c84: 4b04 ldr r3, [pc, #16] ; (8007c98 <std.isra.0+0x44>)
  9043. 8007c86: 6323 str r3, [r4, #48] ; 0x30
  9044. 8007c88: bd10 pop {r4, pc}
  9045. 8007c8a: bf00 nop
  9046. 8007c8c: 08008641 .word 0x08008641
  9047. 8007c90: 08008663 .word 0x08008663
  9048. 8007c94: 0800869b .word 0x0800869b
  9049. 8007c98: 080086bf .word 0x080086bf
  9050. 08007c9c <__sfmoreglue>:
  9051. 8007c9c: b570 push {r4, r5, r6, lr}
  9052. 8007c9e: 2568 movs r5, #104 ; 0x68
  9053. 8007ca0: 1e4a subs r2, r1, #1
  9054. 8007ca2: 4355 muls r5, r2
  9055. 8007ca4: 460e mov r6, r1
  9056. 8007ca6: f105 0174 add.w r1, r5, #116 ; 0x74
  9057. 8007caa: f000 f94f bl 8007f4c <_malloc_r>
  9058. 8007cae: 4604 mov r4, r0
  9059. 8007cb0: b140 cbz r0, 8007cc4 <__sfmoreglue+0x28>
  9060. 8007cb2: 2100 movs r1, #0
  9061. 8007cb4: e880 0042 stmia.w r0, {r1, r6}
  9062. 8007cb8: 300c adds r0, #12
  9063. 8007cba: 60a0 str r0, [r4, #8]
  9064. 8007cbc: f105 0268 add.w r2, r5, #104 ; 0x68
  9065. 8007cc0: f7ff fd01 bl 80076c6 <memset>
  9066. 8007cc4: 4620 mov r0, r4
  9067. 8007cc6: bd70 pop {r4, r5, r6, pc}
  9068. 08007cc8 <__sinit>:
  9069. 8007cc8: 6983 ldr r3, [r0, #24]
  9070. 8007cca: b510 push {r4, lr}
  9071. 8007ccc: 4604 mov r4, r0
  9072. 8007cce: bb33 cbnz r3, 8007d1e <__sinit+0x56>
  9073. 8007cd0: 6483 str r3, [r0, #72] ; 0x48
  9074. 8007cd2: 64c3 str r3, [r0, #76] ; 0x4c
  9075. 8007cd4: 6503 str r3, [r0, #80] ; 0x50
  9076. 8007cd6: 4b12 ldr r3, [pc, #72] ; (8007d20 <__sinit+0x58>)
  9077. 8007cd8: 4a12 ldr r2, [pc, #72] ; (8007d24 <__sinit+0x5c>)
  9078. 8007cda: 681b ldr r3, [r3, #0]
  9079. 8007cdc: 6282 str r2, [r0, #40] ; 0x28
  9080. 8007cde: 4298 cmp r0, r3
  9081. 8007ce0: bf04 itt eq
  9082. 8007ce2: 2301 moveq r3, #1
  9083. 8007ce4: 6183 streq r3, [r0, #24]
  9084. 8007ce6: f000 f81f bl 8007d28 <__sfp>
  9085. 8007cea: 6060 str r0, [r4, #4]
  9086. 8007cec: 4620 mov r0, r4
  9087. 8007cee: f000 f81b bl 8007d28 <__sfp>
  9088. 8007cf2: 60a0 str r0, [r4, #8]
  9089. 8007cf4: 4620 mov r0, r4
  9090. 8007cf6: f000 f817 bl 8007d28 <__sfp>
  9091. 8007cfa: 2200 movs r2, #0
  9092. 8007cfc: 60e0 str r0, [r4, #12]
  9093. 8007cfe: 2104 movs r1, #4
  9094. 8007d00: 6860 ldr r0, [r4, #4]
  9095. 8007d02: f7ff ffa7 bl 8007c54 <std.isra.0>
  9096. 8007d06: 2201 movs r2, #1
  9097. 8007d08: 2109 movs r1, #9
  9098. 8007d0a: 68a0 ldr r0, [r4, #8]
  9099. 8007d0c: f7ff ffa2 bl 8007c54 <std.isra.0>
  9100. 8007d10: 2202 movs r2, #2
  9101. 8007d12: 2112 movs r1, #18
  9102. 8007d14: 68e0 ldr r0, [r4, #12]
  9103. 8007d16: f7ff ff9d bl 8007c54 <std.isra.0>
  9104. 8007d1a: 2301 movs r3, #1
  9105. 8007d1c: 61a3 str r3, [r4, #24]
  9106. 8007d1e: bd10 pop {r4, pc}
  9107. 8007d20: 08008a54 .word 0x08008a54
  9108. 8007d24: 08007c49 .word 0x08007c49
  9109. 08007d28 <__sfp>:
  9110. 8007d28: b5f8 push {r3, r4, r5, r6, r7, lr}
  9111. 8007d2a: 4b1c ldr r3, [pc, #112] ; (8007d9c <__sfp+0x74>)
  9112. 8007d2c: 4607 mov r7, r0
  9113. 8007d2e: 681e ldr r6, [r3, #0]
  9114. 8007d30: 69b3 ldr r3, [r6, #24]
  9115. 8007d32: b913 cbnz r3, 8007d3a <__sfp+0x12>
  9116. 8007d34: 4630 mov r0, r6
  9117. 8007d36: f7ff ffc7 bl 8007cc8 <__sinit>
  9118. 8007d3a: 3648 adds r6, #72 ; 0x48
  9119. 8007d3c: 68b4 ldr r4, [r6, #8]
  9120. 8007d3e: 6873 ldr r3, [r6, #4]
  9121. 8007d40: 3b01 subs r3, #1
  9122. 8007d42: d503 bpl.n 8007d4c <__sfp+0x24>
  9123. 8007d44: 6833 ldr r3, [r6, #0]
  9124. 8007d46: b133 cbz r3, 8007d56 <__sfp+0x2e>
  9125. 8007d48: 6836 ldr r6, [r6, #0]
  9126. 8007d4a: e7f7 b.n 8007d3c <__sfp+0x14>
  9127. 8007d4c: f9b4 500c ldrsh.w r5, [r4, #12]
  9128. 8007d50: b16d cbz r5, 8007d6e <__sfp+0x46>
  9129. 8007d52: 3468 adds r4, #104 ; 0x68
  9130. 8007d54: e7f4 b.n 8007d40 <__sfp+0x18>
  9131. 8007d56: 2104 movs r1, #4
  9132. 8007d58: 4638 mov r0, r7
  9133. 8007d5a: f7ff ff9f bl 8007c9c <__sfmoreglue>
  9134. 8007d5e: 6030 str r0, [r6, #0]
  9135. 8007d60: 2800 cmp r0, #0
  9136. 8007d62: d1f1 bne.n 8007d48 <__sfp+0x20>
  9137. 8007d64: 230c movs r3, #12
  9138. 8007d66: 4604 mov r4, r0
  9139. 8007d68: 603b str r3, [r7, #0]
  9140. 8007d6a: 4620 mov r0, r4
  9141. 8007d6c: bdf8 pop {r3, r4, r5, r6, r7, pc}
  9142. 8007d6e: f64f 73ff movw r3, #65535 ; 0xffff
  9143. 8007d72: 81e3 strh r3, [r4, #14]
  9144. 8007d74: 2301 movs r3, #1
  9145. 8007d76: 6665 str r5, [r4, #100] ; 0x64
  9146. 8007d78: 81a3 strh r3, [r4, #12]
  9147. 8007d7a: 6025 str r5, [r4, #0]
  9148. 8007d7c: 60a5 str r5, [r4, #8]
  9149. 8007d7e: 6065 str r5, [r4, #4]
  9150. 8007d80: 6125 str r5, [r4, #16]
  9151. 8007d82: 6165 str r5, [r4, #20]
  9152. 8007d84: 61a5 str r5, [r4, #24]
  9153. 8007d86: 2208 movs r2, #8
  9154. 8007d88: 4629 mov r1, r5
  9155. 8007d8a: f104 005c add.w r0, r4, #92 ; 0x5c
  9156. 8007d8e: f7ff fc9a bl 80076c6 <memset>
  9157. 8007d92: 6365 str r5, [r4, #52] ; 0x34
  9158. 8007d94: 63a5 str r5, [r4, #56] ; 0x38
  9159. 8007d96: 64a5 str r5, [r4, #72] ; 0x48
  9160. 8007d98: 64e5 str r5, [r4, #76] ; 0x4c
  9161. 8007d9a: e7e6 b.n 8007d6a <__sfp+0x42>
  9162. 8007d9c: 08008a54 .word 0x08008a54
  9163. 08007da0 <_fwalk_reent>:
  9164. 8007da0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  9165. 8007da4: 4680 mov r8, r0
  9166. 8007da6: 4689 mov r9, r1
  9167. 8007da8: 2600 movs r6, #0
  9168. 8007daa: f100 0448 add.w r4, r0, #72 ; 0x48
  9169. 8007dae: b914 cbnz r4, 8007db6 <_fwalk_reent+0x16>
  9170. 8007db0: 4630 mov r0, r6
  9171. 8007db2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  9172. 8007db6: 68a5 ldr r5, [r4, #8]
  9173. 8007db8: 6867 ldr r7, [r4, #4]
  9174. 8007dba: 3f01 subs r7, #1
  9175. 8007dbc: d501 bpl.n 8007dc2 <_fwalk_reent+0x22>
  9176. 8007dbe: 6824 ldr r4, [r4, #0]
  9177. 8007dc0: e7f5 b.n 8007dae <_fwalk_reent+0xe>
  9178. 8007dc2: 89ab ldrh r3, [r5, #12]
  9179. 8007dc4: 2b01 cmp r3, #1
  9180. 8007dc6: d907 bls.n 8007dd8 <_fwalk_reent+0x38>
  9181. 8007dc8: f9b5 300e ldrsh.w r3, [r5, #14]
  9182. 8007dcc: 3301 adds r3, #1
  9183. 8007dce: d003 beq.n 8007dd8 <_fwalk_reent+0x38>
  9184. 8007dd0: 4629 mov r1, r5
  9185. 8007dd2: 4640 mov r0, r8
  9186. 8007dd4: 47c8 blx r9
  9187. 8007dd6: 4306 orrs r6, r0
  9188. 8007dd8: 3568 adds r5, #104 ; 0x68
  9189. 8007dda: e7ee b.n 8007dba <_fwalk_reent+0x1a>
  9190. 08007ddc <__swhatbuf_r>:
  9191. 8007ddc: b570 push {r4, r5, r6, lr}
  9192. 8007dde: 460e mov r6, r1
  9193. 8007de0: f9b1 100e ldrsh.w r1, [r1, #14]
  9194. 8007de4: b090 sub sp, #64 ; 0x40
  9195. 8007de6: 2900 cmp r1, #0
  9196. 8007de8: 4614 mov r4, r2
  9197. 8007dea: 461d mov r5, r3
  9198. 8007dec: da07 bge.n 8007dfe <__swhatbuf_r+0x22>
  9199. 8007dee: 2300 movs r3, #0
  9200. 8007df0: 602b str r3, [r5, #0]
  9201. 8007df2: 89b3 ldrh r3, [r6, #12]
  9202. 8007df4: 061a lsls r2, r3, #24
  9203. 8007df6: d410 bmi.n 8007e1a <__swhatbuf_r+0x3e>
  9204. 8007df8: f44f 6380 mov.w r3, #1024 ; 0x400
  9205. 8007dfc: e00e b.n 8007e1c <__swhatbuf_r+0x40>
  9206. 8007dfe: aa01 add r2, sp, #4
  9207. 8007e00: f000 fc84 bl 800870c <_fstat_r>
  9208. 8007e04: 2800 cmp r0, #0
  9209. 8007e06: dbf2 blt.n 8007dee <__swhatbuf_r+0x12>
  9210. 8007e08: 9a02 ldr r2, [sp, #8]
  9211. 8007e0a: f402 4270 and.w r2, r2, #61440 ; 0xf000
  9212. 8007e0e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
  9213. 8007e12: 425a negs r2, r3
  9214. 8007e14: 415a adcs r2, r3
  9215. 8007e16: 602a str r2, [r5, #0]
  9216. 8007e18: e7ee b.n 8007df8 <__swhatbuf_r+0x1c>
  9217. 8007e1a: 2340 movs r3, #64 ; 0x40
  9218. 8007e1c: 2000 movs r0, #0
  9219. 8007e1e: 6023 str r3, [r4, #0]
  9220. 8007e20: b010 add sp, #64 ; 0x40
  9221. 8007e22: bd70 pop {r4, r5, r6, pc}
  9222. 08007e24 <__smakebuf_r>:
  9223. 8007e24: 898b ldrh r3, [r1, #12]
  9224. 8007e26: b573 push {r0, r1, r4, r5, r6, lr}
  9225. 8007e28: 079d lsls r5, r3, #30
  9226. 8007e2a: 4606 mov r6, r0
  9227. 8007e2c: 460c mov r4, r1
  9228. 8007e2e: d507 bpl.n 8007e40 <__smakebuf_r+0x1c>
  9229. 8007e30: f104 0347 add.w r3, r4, #71 ; 0x47
  9230. 8007e34: 6023 str r3, [r4, #0]
  9231. 8007e36: 6123 str r3, [r4, #16]
  9232. 8007e38: 2301 movs r3, #1
  9233. 8007e3a: 6163 str r3, [r4, #20]
  9234. 8007e3c: b002 add sp, #8
  9235. 8007e3e: bd70 pop {r4, r5, r6, pc}
  9236. 8007e40: ab01 add r3, sp, #4
  9237. 8007e42: 466a mov r2, sp
  9238. 8007e44: f7ff ffca bl 8007ddc <__swhatbuf_r>
  9239. 8007e48: 9900 ldr r1, [sp, #0]
  9240. 8007e4a: 4605 mov r5, r0
  9241. 8007e4c: 4630 mov r0, r6
  9242. 8007e4e: f000 f87d bl 8007f4c <_malloc_r>
  9243. 8007e52: b948 cbnz r0, 8007e68 <__smakebuf_r+0x44>
  9244. 8007e54: f9b4 300c ldrsh.w r3, [r4, #12]
  9245. 8007e58: 059a lsls r2, r3, #22
  9246. 8007e5a: d4ef bmi.n 8007e3c <__smakebuf_r+0x18>
  9247. 8007e5c: f023 0303 bic.w r3, r3, #3
  9248. 8007e60: f043 0302 orr.w r3, r3, #2
  9249. 8007e64: 81a3 strh r3, [r4, #12]
  9250. 8007e66: e7e3 b.n 8007e30 <__smakebuf_r+0xc>
  9251. 8007e68: 4b0d ldr r3, [pc, #52] ; (8007ea0 <__smakebuf_r+0x7c>)
  9252. 8007e6a: 62b3 str r3, [r6, #40] ; 0x28
  9253. 8007e6c: 89a3 ldrh r3, [r4, #12]
  9254. 8007e6e: 6020 str r0, [r4, #0]
  9255. 8007e70: f043 0380 orr.w r3, r3, #128 ; 0x80
  9256. 8007e74: 81a3 strh r3, [r4, #12]
  9257. 8007e76: 9b00 ldr r3, [sp, #0]
  9258. 8007e78: 6120 str r0, [r4, #16]
  9259. 8007e7a: 6163 str r3, [r4, #20]
  9260. 8007e7c: 9b01 ldr r3, [sp, #4]
  9261. 8007e7e: b15b cbz r3, 8007e98 <__smakebuf_r+0x74>
  9262. 8007e80: f9b4 100e ldrsh.w r1, [r4, #14]
  9263. 8007e84: 4630 mov r0, r6
  9264. 8007e86: f000 fc53 bl 8008730 <_isatty_r>
  9265. 8007e8a: b128 cbz r0, 8007e98 <__smakebuf_r+0x74>
  9266. 8007e8c: 89a3 ldrh r3, [r4, #12]
  9267. 8007e8e: f023 0303 bic.w r3, r3, #3
  9268. 8007e92: f043 0301 orr.w r3, r3, #1
  9269. 8007e96: 81a3 strh r3, [r4, #12]
  9270. 8007e98: 89a3 ldrh r3, [r4, #12]
  9271. 8007e9a: 431d orrs r5, r3
  9272. 8007e9c: 81a5 strh r5, [r4, #12]
  9273. 8007e9e: e7cd b.n 8007e3c <__smakebuf_r+0x18>
  9274. 8007ea0: 08007c49 .word 0x08007c49
  9275. 08007ea4 <malloc>:
  9276. 8007ea4: 4b02 ldr r3, [pc, #8] ; (8007eb0 <malloc+0xc>)
  9277. 8007ea6: 4601 mov r1, r0
  9278. 8007ea8: 6818 ldr r0, [r3, #0]
  9279. 8007eaa: f000 b84f b.w 8007f4c <_malloc_r>
  9280. 8007eae: bf00 nop
  9281. 8007eb0: 2000000c .word 0x2000000c
  9282. 08007eb4 <_free_r>:
  9283. 8007eb4: b538 push {r3, r4, r5, lr}
  9284. 8007eb6: 4605 mov r5, r0
  9285. 8007eb8: 2900 cmp r1, #0
  9286. 8007eba: d043 beq.n 8007f44 <_free_r+0x90>
  9287. 8007ebc: f851 3c04 ldr.w r3, [r1, #-4]
  9288. 8007ec0: 1f0c subs r4, r1, #4
  9289. 8007ec2: 2b00 cmp r3, #0
  9290. 8007ec4: bfb8 it lt
  9291. 8007ec6: 18e4 addlt r4, r4, r3
  9292. 8007ec8: f000 fc62 bl 8008790 <__malloc_lock>
  9293. 8007ecc: 4a1e ldr r2, [pc, #120] ; (8007f48 <_free_r+0x94>)
  9294. 8007ece: 6813 ldr r3, [r2, #0]
  9295. 8007ed0: 4610 mov r0, r2
  9296. 8007ed2: b933 cbnz r3, 8007ee2 <_free_r+0x2e>
  9297. 8007ed4: 6063 str r3, [r4, #4]
  9298. 8007ed6: 6014 str r4, [r2, #0]
  9299. 8007ed8: 4628 mov r0, r5
  9300. 8007eda: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
  9301. 8007ede: f000 bc58 b.w 8008792 <__malloc_unlock>
  9302. 8007ee2: 42a3 cmp r3, r4
  9303. 8007ee4: d90b bls.n 8007efe <_free_r+0x4a>
  9304. 8007ee6: 6821 ldr r1, [r4, #0]
  9305. 8007ee8: 1862 adds r2, r4, r1
  9306. 8007eea: 4293 cmp r3, r2
  9307. 8007eec: bf01 itttt eq
  9308. 8007eee: 681a ldreq r2, [r3, #0]
  9309. 8007ef0: 685b ldreq r3, [r3, #4]
  9310. 8007ef2: 1852 addeq r2, r2, r1
  9311. 8007ef4: 6022 streq r2, [r4, #0]
  9312. 8007ef6: 6063 str r3, [r4, #4]
  9313. 8007ef8: 6004 str r4, [r0, #0]
  9314. 8007efa: e7ed b.n 8007ed8 <_free_r+0x24>
  9315. 8007efc: 4613 mov r3, r2
  9316. 8007efe: 685a ldr r2, [r3, #4]
  9317. 8007f00: b10a cbz r2, 8007f06 <_free_r+0x52>
  9318. 8007f02: 42a2 cmp r2, r4
  9319. 8007f04: d9fa bls.n 8007efc <_free_r+0x48>
  9320. 8007f06: 6819 ldr r1, [r3, #0]
  9321. 8007f08: 1858 adds r0, r3, r1
  9322. 8007f0a: 42a0 cmp r0, r4
  9323. 8007f0c: d10b bne.n 8007f26 <_free_r+0x72>
  9324. 8007f0e: 6820 ldr r0, [r4, #0]
  9325. 8007f10: 4401 add r1, r0
  9326. 8007f12: 1858 adds r0, r3, r1
  9327. 8007f14: 4282 cmp r2, r0
  9328. 8007f16: 6019 str r1, [r3, #0]
  9329. 8007f18: d1de bne.n 8007ed8 <_free_r+0x24>
  9330. 8007f1a: 6810 ldr r0, [r2, #0]
  9331. 8007f1c: 6852 ldr r2, [r2, #4]
  9332. 8007f1e: 4401 add r1, r0
  9333. 8007f20: 6019 str r1, [r3, #0]
  9334. 8007f22: 605a str r2, [r3, #4]
  9335. 8007f24: e7d8 b.n 8007ed8 <_free_r+0x24>
  9336. 8007f26: d902 bls.n 8007f2e <_free_r+0x7a>
  9337. 8007f28: 230c movs r3, #12
  9338. 8007f2a: 602b str r3, [r5, #0]
  9339. 8007f2c: e7d4 b.n 8007ed8 <_free_r+0x24>
  9340. 8007f2e: 6820 ldr r0, [r4, #0]
  9341. 8007f30: 1821 adds r1, r4, r0
  9342. 8007f32: 428a cmp r2, r1
  9343. 8007f34: bf01 itttt eq
  9344. 8007f36: 6811 ldreq r1, [r2, #0]
  9345. 8007f38: 6852 ldreq r2, [r2, #4]
  9346. 8007f3a: 1809 addeq r1, r1, r0
  9347. 8007f3c: 6021 streq r1, [r4, #0]
  9348. 8007f3e: 6062 str r2, [r4, #4]
  9349. 8007f40: 605c str r4, [r3, #4]
  9350. 8007f42: e7c9 b.n 8007ed8 <_free_r+0x24>
  9351. 8007f44: bd38 pop {r3, r4, r5, pc}
  9352. 8007f46: bf00 nop
  9353. 8007f48: 200003e4 .word 0x200003e4
  9354. 08007f4c <_malloc_r>:
  9355. 8007f4c: b570 push {r4, r5, r6, lr}
  9356. 8007f4e: 1ccd adds r5, r1, #3
  9357. 8007f50: f025 0503 bic.w r5, r5, #3
  9358. 8007f54: 3508 adds r5, #8
  9359. 8007f56: 2d0c cmp r5, #12
  9360. 8007f58: bf38 it cc
  9361. 8007f5a: 250c movcc r5, #12
  9362. 8007f5c: 2d00 cmp r5, #0
  9363. 8007f5e: 4606 mov r6, r0
  9364. 8007f60: db01 blt.n 8007f66 <_malloc_r+0x1a>
  9365. 8007f62: 42a9 cmp r1, r5
  9366. 8007f64: d903 bls.n 8007f6e <_malloc_r+0x22>
  9367. 8007f66: 230c movs r3, #12
  9368. 8007f68: 6033 str r3, [r6, #0]
  9369. 8007f6a: 2000 movs r0, #0
  9370. 8007f6c: bd70 pop {r4, r5, r6, pc}
  9371. 8007f6e: f000 fc0f bl 8008790 <__malloc_lock>
  9372. 8007f72: 4a23 ldr r2, [pc, #140] ; (8008000 <_malloc_r+0xb4>)
  9373. 8007f74: 6814 ldr r4, [r2, #0]
  9374. 8007f76: 4621 mov r1, r4
  9375. 8007f78: b991 cbnz r1, 8007fa0 <_malloc_r+0x54>
  9376. 8007f7a: 4c22 ldr r4, [pc, #136] ; (8008004 <_malloc_r+0xb8>)
  9377. 8007f7c: 6823 ldr r3, [r4, #0]
  9378. 8007f7e: b91b cbnz r3, 8007f88 <_malloc_r+0x3c>
  9379. 8007f80: 4630 mov r0, r6
  9380. 8007f82: f000 fb4d bl 8008620 <_sbrk_r>
  9381. 8007f86: 6020 str r0, [r4, #0]
  9382. 8007f88: 4629 mov r1, r5
  9383. 8007f8a: 4630 mov r0, r6
  9384. 8007f8c: f000 fb48 bl 8008620 <_sbrk_r>
  9385. 8007f90: 1c43 adds r3, r0, #1
  9386. 8007f92: d126 bne.n 8007fe2 <_malloc_r+0x96>
  9387. 8007f94: 230c movs r3, #12
  9388. 8007f96: 4630 mov r0, r6
  9389. 8007f98: 6033 str r3, [r6, #0]
  9390. 8007f9a: f000 fbfa bl 8008792 <__malloc_unlock>
  9391. 8007f9e: e7e4 b.n 8007f6a <_malloc_r+0x1e>
  9392. 8007fa0: 680b ldr r3, [r1, #0]
  9393. 8007fa2: 1b5b subs r3, r3, r5
  9394. 8007fa4: d41a bmi.n 8007fdc <_malloc_r+0x90>
  9395. 8007fa6: 2b0b cmp r3, #11
  9396. 8007fa8: d90f bls.n 8007fca <_malloc_r+0x7e>
  9397. 8007faa: 600b str r3, [r1, #0]
  9398. 8007fac: 18cc adds r4, r1, r3
  9399. 8007fae: 50cd str r5, [r1, r3]
  9400. 8007fb0: 4630 mov r0, r6
  9401. 8007fb2: f000 fbee bl 8008792 <__malloc_unlock>
  9402. 8007fb6: f104 000b add.w r0, r4, #11
  9403. 8007fba: 1d23 adds r3, r4, #4
  9404. 8007fbc: f020 0007 bic.w r0, r0, #7
  9405. 8007fc0: 1ac3 subs r3, r0, r3
  9406. 8007fc2: d01b beq.n 8007ffc <_malloc_r+0xb0>
  9407. 8007fc4: 425a negs r2, r3
  9408. 8007fc6: 50e2 str r2, [r4, r3]
  9409. 8007fc8: bd70 pop {r4, r5, r6, pc}
  9410. 8007fca: 428c cmp r4, r1
  9411. 8007fcc: bf0b itete eq
  9412. 8007fce: 6863 ldreq r3, [r4, #4]
  9413. 8007fd0: 684b ldrne r3, [r1, #4]
  9414. 8007fd2: 6013 streq r3, [r2, #0]
  9415. 8007fd4: 6063 strne r3, [r4, #4]
  9416. 8007fd6: bf18 it ne
  9417. 8007fd8: 460c movne r4, r1
  9418. 8007fda: e7e9 b.n 8007fb0 <_malloc_r+0x64>
  9419. 8007fdc: 460c mov r4, r1
  9420. 8007fde: 6849 ldr r1, [r1, #4]
  9421. 8007fe0: e7ca b.n 8007f78 <_malloc_r+0x2c>
  9422. 8007fe2: 1cc4 adds r4, r0, #3
  9423. 8007fe4: f024 0403 bic.w r4, r4, #3
  9424. 8007fe8: 42a0 cmp r0, r4
  9425. 8007fea: d005 beq.n 8007ff8 <_malloc_r+0xac>
  9426. 8007fec: 1a21 subs r1, r4, r0
  9427. 8007fee: 4630 mov r0, r6
  9428. 8007ff0: f000 fb16 bl 8008620 <_sbrk_r>
  9429. 8007ff4: 3001 adds r0, #1
  9430. 8007ff6: d0cd beq.n 8007f94 <_malloc_r+0x48>
  9431. 8007ff8: 6025 str r5, [r4, #0]
  9432. 8007ffa: e7d9 b.n 8007fb0 <_malloc_r+0x64>
  9433. 8007ffc: bd70 pop {r4, r5, r6, pc}
  9434. 8007ffe: bf00 nop
  9435. 8008000: 200003e4 .word 0x200003e4
  9436. 8008004: 200003e8 .word 0x200003e8
  9437. 08008008 <__sfputc_r>:
  9438. 8008008: 6893 ldr r3, [r2, #8]
  9439. 800800a: b410 push {r4}
  9440. 800800c: 3b01 subs r3, #1
  9441. 800800e: 2b00 cmp r3, #0
  9442. 8008010: 6093 str r3, [r2, #8]
  9443. 8008012: da08 bge.n 8008026 <__sfputc_r+0x1e>
  9444. 8008014: 6994 ldr r4, [r2, #24]
  9445. 8008016: 42a3 cmp r3, r4
  9446. 8008018: db02 blt.n 8008020 <__sfputc_r+0x18>
  9447. 800801a: b2cb uxtb r3, r1
  9448. 800801c: 2b0a cmp r3, #10
  9449. 800801e: d102 bne.n 8008026 <__sfputc_r+0x1e>
  9450. 8008020: bc10 pop {r4}
  9451. 8008022: f7ff bc9f b.w 8007964 <__swbuf_r>
  9452. 8008026: 6813 ldr r3, [r2, #0]
  9453. 8008028: 1c58 adds r0, r3, #1
  9454. 800802a: 6010 str r0, [r2, #0]
  9455. 800802c: 7019 strb r1, [r3, #0]
  9456. 800802e: b2c8 uxtb r0, r1
  9457. 8008030: bc10 pop {r4}
  9458. 8008032: 4770 bx lr
  9459. 08008034 <__sfputs_r>:
  9460. 8008034: b5f8 push {r3, r4, r5, r6, r7, lr}
  9461. 8008036: 4606 mov r6, r0
  9462. 8008038: 460f mov r7, r1
  9463. 800803a: 4614 mov r4, r2
  9464. 800803c: 18d5 adds r5, r2, r3
  9465. 800803e: 42ac cmp r4, r5
  9466. 8008040: d101 bne.n 8008046 <__sfputs_r+0x12>
  9467. 8008042: 2000 movs r0, #0
  9468. 8008044: e007 b.n 8008056 <__sfputs_r+0x22>
  9469. 8008046: 463a mov r2, r7
  9470. 8008048: f814 1b01 ldrb.w r1, [r4], #1
  9471. 800804c: 4630 mov r0, r6
  9472. 800804e: f7ff ffdb bl 8008008 <__sfputc_r>
  9473. 8008052: 1c43 adds r3, r0, #1
  9474. 8008054: d1f3 bne.n 800803e <__sfputs_r+0xa>
  9475. 8008056: bdf8 pop {r3, r4, r5, r6, r7, pc}
  9476. 08008058 <_vfiprintf_r>:
  9477. 8008058: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  9478. 800805c: b09d sub sp, #116 ; 0x74
  9479. 800805e: 460c mov r4, r1
  9480. 8008060: 4617 mov r7, r2
  9481. 8008062: 9303 str r3, [sp, #12]
  9482. 8008064: 4606 mov r6, r0
  9483. 8008066: b118 cbz r0, 8008070 <_vfiprintf_r+0x18>
  9484. 8008068: 6983 ldr r3, [r0, #24]
  9485. 800806a: b90b cbnz r3, 8008070 <_vfiprintf_r+0x18>
  9486. 800806c: f7ff fe2c bl 8007cc8 <__sinit>
  9487. 8008070: 4b7c ldr r3, [pc, #496] ; (8008264 <_vfiprintf_r+0x20c>)
  9488. 8008072: 429c cmp r4, r3
  9489. 8008074: d157 bne.n 8008126 <_vfiprintf_r+0xce>
  9490. 8008076: 6874 ldr r4, [r6, #4]
  9491. 8008078: 89a3 ldrh r3, [r4, #12]
  9492. 800807a: 0718 lsls r0, r3, #28
  9493. 800807c: d55d bpl.n 800813a <_vfiprintf_r+0xe2>
  9494. 800807e: 6923 ldr r3, [r4, #16]
  9495. 8008080: 2b00 cmp r3, #0
  9496. 8008082: d05a beq.n 800813a <_vfiprintf_r+0xe2>
  9497. 8008084: 2300 movs r3, #0
  9498. 8008086: 9309 str r3, [sp, #36] ; 0x24
  9499. 8008088: 2320 movs r3, #32
  9500. 800808a: f88d 3029 strb.w r3, [sp, #41] ; 0x29
  9501. 800808e: 2330 movs r3, #48 ; 0x30
  9502. 8008090: f04f 0b01 mov.w fp, #1
  9503. 8008094: f88d 302a strb.w r3, [sp, #42] ; 0x2a
  9504. 8008098: 46b8 mov r8, r7
  9505. 800809a: 4645 mov r5, r8
  9506. 800809c: f815 3b01 ldrb.w r3, [r5], #1
  9507. 80080a0: 2b00 cmp r3, #0
  9508. 80080a2: d155 bne.n 8008150 <_vfiprintf_r+0xf8>
  9509. 80080a4: ebb8 0a07 subs.w sl, r8, r7
  9510. 80080a8: d00b beq.n 80080c2 <_vfiprintf_r+0x6a>
  9511. 80080aa: 4653 mov r3, sl
  9512. 80080ac: 463a mov r2, r7
  9513. 80080ae: 4621 mov r1, r4
  9514. 80080b0: 4630 mov r0, r6
  9515. 80080b2: f7ff ffbf bl 8008034 <__sfputs_r>
  9516. 80080b6: 3001 adds r0, #1
  9517. 80080b8: f000 80c4 beq.w 8008244 <_vfiprintf_r+0x1ec>
  9518. 80080bc: 9b09 ldr r3, [sp, #36] ; 0x24
  9519. 80080be: 4453 add r3, sl
  9520. 80080c0: 9309 str r3, [sp, #36] ; 0x24
  9521. 80080c2: f898 3000 ldrb.w r3, [r8]
  9522. 80080c6: 2b00 cmp r3, #0
  9523. 80080c8: f000 80bc beq.w 8008244 <_vfiprintf_r+0x1ec>
  9524. 80080cc: 2300 movs r3, #0
  9525. 80080ce: f04f 32ff mov.w r2, #4294967295
  9526. 80080d2: 9304 str r3, [sp, #16]
  9527. 80080d4: 9307 str r3, [sp, #28]
  9528. 80080d6: 9205 str r2, [sp, #20]
  9529. 80080d8: 9306 str r3, [sp, #24]
  9530. 80080da: f88d 3053 strb.w r3, [sp, #83] ; 0x53
  9531. 80080de: 931a str r3, [sp, #104] ; 0x68
  9532. 80080e0: 2205 movs r2, #5
  9533. 80080e2: 7829 ldrb r1, [r5, #0]
  9534. 80080e4: 4860 ldr r0, [pc, #384] ; (8008268 <_vfiprintf_r+0x210>)
  9535. 80080e6: f000 fb45 bl 8008774 <memchr>
  9536. 80080ea: f105 0801 add.w r8, r5, #1
  9537. 80080ee: 9b04 ldr r3, [sp, #16]
  9538. 80080f0: 2800 cmp r0, #0
  9539. 80080f2: d131 bne.n 8008158 <_vfiprintf_r+0x100>
  9540. 80080f4: 06d9 lsls r1, r3, #27
  9541. 80080f6: bf44 itt mi
  9542. 80080f8: 2220 movmi r2, #32
  9543. 80080fa: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
  9544. 80080fe: 071a lsls r2, r3, #28
  9545. 8008100: bf44 itt mi
  9546. 8008102: 222b movmi r2, #43 ; 0x2b
  9547. 8008104: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
  9548. 8008108: 782a ldrb r2, [r5, #0]
  9549. 800810a: 2a2a cmp r2, #42 ; 0x2a
  9550. 800810c: d02c beq.n 8008168 <_vfiprintf_r+0x110>
  9551. 800810e: 2100 movs r1, #0
  9552. 8008110: 200a movs r0, #10
  9553. 8008112: 9a07 ldr r2, [sp, #28]
  9554. 8008114: 46a8 mov r8, r5
  9555. 8008116: f898 3000 ldrb.w r3, [r8]
  9556. 800811a: 3501 adds r5, #1
  9557. 800811c: 3b30 subs r3, #48 ; 0x30
  9558. 800811e: 2b09 cmp r3, #9
  9559. 8008120: d96d bls.n 80081fe <_vfiprintf_r+0x1a6>
  9560. 8008122: b371 cbz r1, 8008182 <_vfiprintf_r+0x12a>
  9561. 8008124: e026 b.n 8008174 <_vfiprintf_r+0x11c>
  9562. 8008126: 4b51 ldr r3, [pc, #324] ; (800826c <_vfiprintf_r+0x214>)
  9563. 8008128: 429c cmp r4, r3
  9564. 800812a: d101 bne.n 8008130 <_vfiprintf_r+0xd8>
  9565. 800812c: 68b4 ldr r4, [r6, #8]
  9566. 800812e: e7a3 b.n 8008078 <_vfiprintf_r+0x20>
  9567. 8008130: 4b4f ldr r3, [pc, #316] ; (8008270 <_vfiprintf_r+0x218>)
  9568. 8008132: 429c cmp r4, r3
  9569. 8008134: bf08 it eq
  9570. 8008136: 68f4 ldreq r4, [r6, #12]
  9571. 8008138: e79e b.n 8008078 <_vfiprintf_r+0x20>
  9572. 800813a: 4621 mov r1, r4
  9573. 800813c: 4630 mov r0, r6
  9574. 800813e: f7ff fc63 bl 8007a08 <__swsetup_r>
  9575. 8008142: 2800 cmp r0, #0
  9576. 8008144: d09e beq.n 8008084 <_vfiprintf_r+0x2c>
  9577. 8008146: f04f 30ff mov.w r0, #4294967295
  9578. 800814a: b01d add sp, #116 ; 0x74
  9579. 800814c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  9580. 8008150: 2b25 cmp r3, #37 ; 0x25
  9581. 8008152: d0a7 beq.n 80080a4 <_vfiprintf_r+0x4c>
  9582. 8008154: 46a8 mov r8, r5
  9583. 8008156: e7a0 b.n 800809a <_vfiprintf_r+0x42>
  9584. 8008158: 4a43 ldr r2, [pc, #268] ; (8008268 <_vfiprintf_r+0x210>)
  9585. 800815a: 4645 mov r5, r8
  9586. 800815c: 1a80 subs r0, r0, r2
  9587. 800815e: fa0b f000 lsl.w r0, fp, r0
  9588. 8008162: 4318 orrs r0, r3
  9589. 8008164: 9004 str r0, [sp, #16]
  9590. 8008166: e7bb b.n 80080e0 <_vfiprintf_r+0x88>
  9591. 8008168: 9a03 ldr r2, [sp, #12]
  9592. 800816a: 1d11 adds r1, r2, #4
  9593. 800816c: 6812 ldr r2, [r2, #0]
  9594. 800816e: 9103 str r1, [sp, #12]
  9595. 8008170: 2a00 cmp r2, #0
  9596. 8008172: db01 blt.n 8008178 <_vfiprintf_r+0x120>
  9597. 8008174: 9207 str r2, [sp, #28]
  9598. 8008176: e004 b.n 8008182 <_vfiprintf_r+0x12a>
  9599. 8008178: 4252 negs r2, r2
  9600. 800817a: f043 0302 orr.w r3, r3, #2
  9601. 800817e: 9207 str r2, [sp, #28]
  9602. 8008180: 9304 str r3, [sp, #16]
  9603. 8008182: f898 3000 ldrb.w r3, [r8]
  9604. 8008186: 2b2e cmp r3, #46 ; 0x2e
  9605. 8008188: d110 bne.n 80081ac <_vfiprintf_r+0x154>
  9606. 800818a: f898 3001 ldrb.w r3, [r8, #1]
  9607. 800818e: f108 0101 add.w r1, r8, #1
  9608. 8008192: 2b2a cmp r3, #42 ; 0x2a
  9609. 8008194: d137 bne.n 8008206 <_vfiprintf_r+0x1ae>
  9610. 8008196: 9b03 ldr r3, [sp, #12]
  9611. 8008198: f108 0802 add.w r8, r8, #2
  9612. 800819c: 1d1a adds r2, r3, #4
  9613. 800819e: 681b ldr r3, [r3, #0]
  9614. 80081a0: 9203 str r2, [sp, #12]
  9615. 80081a2: 2b00 cmp r3, #0
  9616. 80081a4: bfb8 it lt
  9617. 80081a6: f04f 33ff movlt.w r3, #4294967295
  9618. 80081aa: 9305 str r3, [sp, #20]
  9619. 80081ac: 4d31 ldr r5, [pc, #196] ; (8008274 <_vfiprintf_r+0x21c>)
  9620. 80081ae: 2203 movs r2, #3
  9621. 80081b0: f898 1000 ldrb.w r1, [r8]
  9622. 80081b4: 4628 mov r0, r5
  9623. 80081b6: f000 fadd bl 8008774 <memchr>
  9624. 80081ba: b140 cbz r0, 80081ce <_vfiprintf_r+0x176>
  9625. 80081bc: 2340 movs r3, #64 ; 0x40
  9626. 80081be: 1b40 subs r0, r0, r5
  9627. 80081c0: fa03 f000 lsl.w r0, r3, r0
  9628. 80081c4: 9b04 ldr r3, [sp, #16]
  9629. 80081c6: f108 0801 add.w r8, r8, #1
  9630. 80081ca: 4303 orrs r3, r0
  9631. 80081cc: 9304 str r3, [sp, #16]
  9632. 80081ce: f898 1000 ldrb.w r1, [r8]
  9633. 80081d2: 2206 movs r2, #6
  9634. 80081d4: 4828 ldr r0, [pc, #160] ; (8008278 <_vfiprintf_r+0x220>)
  9635. 80081d6: f108 0701 add.w r7, r8, #1
  9636. 80081da: f88d 1028 strb.w r1, [sp, #40] ; 0x28
  9637. 80081de: f000 fac9 bl 8008774 <memchr>
  9638. 80081e2: 2800 cmp r0, #0
  9639. 80081e4: d034 beq.n 8008250 <_vfiprintf_r+0x1f8>
  9640. 80081e6: 4b25 ldr r3, [pc, #148] ; (800827c <_vfiprintf_r+0x224>)
  9641. 80081e8: bb03 cbnz r3, 800822c <_vfiprintf_r+0x1d4>
  9642. 80081ea: 9b03 ldr r3, [sp, #12]
  9643. 80081ec: 3307 adds r3, #7
  9644. 80081ee: f023 0307 bic.w r3, r3, #7
  9645. 80081f2: 3308 adds r3, #8
  9646. 80081f4: 9303 str r3, [sp, #12]
  9647. 80081f6: 9b09 ldr r3, [sp, #36] ; 0x24
  9648. 80081f8: 444b add r3, r9
  9649. 80081fa: 9309 str r3, [sp, #36] ; 0x24
  9650. 80081fc: e74c b.n 8008098 <_vfiprintf_r+0x40>
  9651. 80081fe: fb00 3202 mla r2, r0, r2, r3
  9652. 8008202: 2101 movs r1, #1
  9653. 8008204: e786 b.n 8008114 <_vfiprintf_r+0xbc>
  9654. 8008206: 2300 movs r3, #0
  9655. 8008208: 250a movs r5, #10
  9656. 800820a: 4618 mov r0, r3
  9657. 800820c: 9305 str r3, [sp, #20]
  9658. 800820e: 4688 mov r8, r1
  9659. 8008210: f898 2000 ldrb.w r2, [r8]
  9660. 8008214: 3101 adds r1, #1
  9661. 8008216: 3a30 subs r2, #48 ; 0x30
  9662. 8008218: 2a09 cmp r2, #9
  9663. 800821a: d903 bls.n 8008224 <_vfiprintf_r+0x1cc>
  9664. 800821c: 2b00 cmp r3, #0
  9665. 800821e: d0c5 beq.n 80081ac <_vfiprintf_r+0x154>
  9666. 8008220: 9005 str r0, [sp, #20]
  9667. 8008222: e7c3 b.n 80081ac <_vfiprintf_r+0x154>
  9668. 8008224: fb05 2000 mla r0, r5, r0, r2
  9669. 8008228: 2301 movs r3, #1
  9670. 800822a: e7f0 b.n 800820e <_vfiprintf_r+0x1b6>
  9671. 800822c: ab03 add r3, sp, #12
  9672. 800822e: 9300 str r3, [sp, #0]
  9673. 8008230: 4622 mov r2, r4
  9674. 8008232: 4b13 ldr r3, [pc, #76] ; (8008280 <_vfiprintf_r+0x228>)
  9675. 8008234: a904 add r1, sp, #16
  9676. 8008236: 4630 mov r0, r6
  9677. 8008238: f3af 8000 nop.w
  9678. 800823c: f1b0 3fff cmp.w r0, #4294967295
  9679. 8008240: 4681 mov r9, r0
  9680. 8008242: d1d8 bne.n 80081f6 <_vfiprintf_r+0x19e>
  9681. 8008244: 89a3 ldrh r3, [r4, #12]
  9682. 8008246: 065b lsls r3, r3, #25
  9683. 8008248: f53f af7d bmi.w 8008146 <_vfiprintf_r+0xee>
  9684. 800824c: 9809 ldr r0, [sp, #36] ; 0x24
  9685. 800824e: e77c b.n 800814a <_vfiprintf_r+0xf2>
  9686. 8008250: ab03 add r3, sp, #12
  9687. 8008252: 9300 str r3, [sp, #0]
  9688. 8008254: 4622 mov r2, r4
  9689. 8008256: 4b0a ldr r3, [pc, #40] ; (8008280 <_vfiprintf_r+0x228>)
  9690. 8008258: a904 add r1, sp, #16
  9691. 800825a: 4630 mov r0, r6
  9692. 800825c: f000 f88a bl 8008374 <_printf_i>
  9693. 8008260: e7ec b.n 800823c <_vfiprintf_r+0x1e4>
  9694. 8008262: bf00 nop
  9695. 8008264: 08008a78 .word 0x08008a78
  9696. 8008268: 08008ab8 .word 0x08008ab8
  9697. 800826c: 08008a98 .word 0x08008a98
  9698. 8008270: 08008a58 .word 0x08008a58
  9699. 8008274: 08008abe .word 0x08008abe
  9700. 8008278: 08008ac2 .word 0x08008ac2
  9701. 800827c: 00000000 .word 0x00000000
  9702. 8008280: 08008035 .word 0x08008035
  9703. 08008284 <_printf_common>:
  9704. 8008284: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  9705. 8008288: 4691 mov r9, r2
  9706. 800828a: 461f mov r7, r3
  9707. 800828c: 688a ldr r2, [r1, #8]
  9708. 800828e: 690b ldr r3, [r1, #16]
  9709. 8008290: 4606 mov r6, r0
  9710. 8008292: 4293 cmp r3, r2
  9711. 8008294: bfb8 it lt
  9712. 8008296: 4613 movlt r3, r2
  9713. 8008298: f8c9 3000 str.w r3, [r9]
  9714. 800829c: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
  9715. 80082a0: 460c mov r4, r1
  9716. 80082a2: f8dd 8020 ldr.w r8, [sp, #32]
  9717. 80082a6: b112 cbz r2, 80082ae <_printf_common+0x2a>
  9718. 80082a8: 3301 adds r3, #1
  9719. 80082aa: f8c9 3000 str.w r3, [r9]
  9720. 80082ae: 6823 ldr r3, [r4, #0]
  9721. 80082b0: 0699 lsls r1, r3, #26
  9722. 80082b2: bf42 ittt mi
  9723. 80082b4: f8d9 3000 ldrmi.w r3, [r9]
  9724. 80082b8: 3302 addmi r3, #2
  9725. 80082ba: f8c9 3000 strmi.w r3, [r9]
  9726. 80082be: 6825 ldr r5, [r4, #0]
  9727. 80082c0: f015 0506 ands.w r5, r5, #6
  9728. 80082c4: d107 bne.n 80082d6 <_printf_common+0x52>
  9729. 80082c6: f104 0a19 add.w sl, r4, #25
  9730. 80082ca: 68e3 ldr r3, [r4, #12]
  9731. 80082cc: f8d9 2000 ldr.w r2, [r9]
  9732. 80082d0: 1a9b subs r3, r3, r2
  9733. 80082d2: 429d cmp r5, r3
  9734. 80082d4: db2a blt.n 800832c <_printf_common+0xa8>
  9735. 80082d6: f894 3043 ldrb.w r3, [r4, #67] ; 0x43
  9736. 80082da: 6822 ldr r2, [r4, #0]
  9737. 80082dc: 3300 adds r3, #0
  9738. 80082de: bf18 it ne
  9739. 80082e0: 2301 movne r3, #1
  9740. 80082e2: 0692 lsls r2, r2, #26
  9741. 80082e4: d42f bmi.n 8008346 <_printf_common+0xc2>
  9742. 80082e6: f104 0243 add.w r2, r4, #67 ; 0x43
  9743. 80082ea: 4639 mov r1, r7
  9744. 80082ec: 4630 mov r0, r6
  9745. 80082ee: 47c0 blx r8
  9746. 80082f0: 3001 adds r0, #1
  9747. 80082f2: d022 beq.n 800833a <_printf_common+0xb6>
  9748. 80082f4: 6823 ldr r3, [r4, #0]
  9749. 80082f6: 68e5 ldr r5, [r4, #12]
  9750. 80082f8: f003 0306 and.w r3, r3, #6
  9751. 80082fc: 2b04 cmp r3, #4
  9752. 80082fe: bf18 it ne
  9753. 8008300: 2500 movne r5, #0
  9754. 8008302: f8d9 2000 ldr.w r2, [r9]
  9755. 8008306: f04f 0900 mov.w r9, #0
  9756. 800830a: bf08 it eq
  9757. 800830c: 1aad subeq r5, r5, r2
  9758. 800830e: 68a3 ldr r3, [r4, #8]
  9759. 8008310: 6922 ldr r2, [r4, #16]
  9760. 8008312: bf08 it eq
  9761. 8008314: ea25 75e5 biceq.w r5, r5, r5, asr #31
  9762. 8008318: 4293 cmp r3, r2
  9763. 800831a: bfc4 itt gt
  9764. 800831c: 1a9b subgt r3, r3, r2
  9765. 800831e: 18ed addgt r5, r5, r3
  9766. 8008320: 341a adds r4, #26
  9767. 8008322: 454d cmp r5, r9
  9768. 8008324: d11b bne.n 800835e <_printf_common+0xda>
  9769. 8008326: 2000 movs r0, #0
  9770. 8008328: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  9771. 800832c: 2301 movs r3, #1
  9772. 800832e: 4652 mov r2, sl
  9773. 8008330: 4639 mov r1, r7
  9774. 8008332: 4630 mov r0, r6
  9775. 8008334: 47c0 blx r8
  9776. 8008336: 3001 adds r0, #1
  9777. 8008338: d103 bne.n 8008342 <_printf_common+0xbe>
  9778. 800833a: f04f 30ff mov.w r0, #4294967295
  9779. 800833e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  9780. 8008342: 3501 adds r5, #1
  9781. 8008344: e7c1 b.n 80082ca <_printf_common+0x46>
  9782. 8008346: 2030 movs r0, #48 ; 0x30
  9783. 8008348: 18e1 adds r1, r4, r3
  9784. 800834a: f881 0043 strb.w r0, [r1, #67] ; 0x43
  9785. 800834e: 1c5a adds r2, r3, #1
  9786. 8008350: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
  9787. 8008354: 4422 add r2, r4
  9788. 8008356: 3302 adds r3, #2
  9789. 8008358: f882 1043 strb.w r1, [r2, #67] ; 0x43
  9790. 800835c: e7c3 b.n 80082e6 <_printf_common+0x62>
  9791. 800835e: 2301 movs r3, #1
  9792. 8008360: 4622 mov r2, r4
  9793. 8008362: 4639 mov r1, r7
  9794. 8008364: 4630 mov r0, r6
  9795. 8008366: 47c0 blx r8
  9796. 8008368: 3001 adds r0, #1
  9797. 800836a: d0e6 beq.n 800833a <_printf_common+0xb6>
  9798. 800836c: f109 0901 add.w r9, r9, #1
  9799. 8008370: e7d7 b.n 8008322 <_printf_common+0x9e>
  9800. ...
  9801. 08008374 <_printf_i>:
  9802. 8008374: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
  9803. 8008378: 4617 mov r7, r2
  9804. 800837a: 7e0a ldrb r2, [r1, #24]
  9805. 800837c: b085 sub sp, #20
  9806. 800837e: 2a6e cmp r2, #110 ; 0x6e
  9807. 8008380: 4698 mov r8, r3
  9808. 8008382: 4606 mov r6, r0
  9809. 8008384: 460c mov r4, r1
  9810. 8008386: 9b0c ldr r3, [sp, #48] ; 0x30
  9811. 8008388: f101 0e43 add.w lr, r1, #67 ; 0x43
  9812. 800838c: f000 80bc beq.w 8008508 <_printf_i+0x194>
  9813. 8008390: d81a bhi.n 80083c8 <_printf_i+0x54>
  9814. 8008392: 2a63 cmp r2, #99 ; 0x63
  9815. 8008394: d02e beq.n 80083f4 <_printf_i+0x80>
  9816. 8008396: d80a bhi.n 80083ae <_printf_i+0x3a>
  9817. 8008398: 2a00 cmp r2, #0
  9818. 800839a: f000 80c8 beq.w 800852e <_printf_i+0x1ba>
  9819. 800839e: 2a58 cmp r2, #88 ; 0x58
  9820. 80083a0: f000 808a beq.w 80084b8 <_printf_i+0x144>
  9821. 80083a4: f104 0542 add.w r5, r4, #66 ; 0x42
  9822. 80083a8: f884 2042 strb.w r2, [r4, #66] ; 0x42
  9823. 80083ac: e02a b.n 8008404 <_printf_i+0x90>
  9824. 80083ae: 2a64 cmp r2, #100 ; 0x64
  9825. 80083b0: d001 beq.n 80083b6 <_printf_i+0x42>
  9826. 80083b2: 2a69 cmp r2, #105 ; 0x69
  9827. 80083b4: d1f6 bne.n 80083a4 <_printf_i+0x30>
  9828. 80083b6: 6821 ldr r1, [r4, #0]
  9829. 80083b8: 681a ldr r2, [r3, #0]
  9830. 80083ba: f011 0f80 tst.w r1, #128 ; 0x80
  9831. 80083be: d023 beq.n 8008408 <_printf_i+0x94>
  9832. 80083c0: 1d11 adds r1, r2, #4
  9833. 80083c2: 6019 str r1, [r3, #0]
  9834. 80083c4: 6813 ldr r3, [r2, #0]
  9835. 80083c6: e027 b.n 8008418 <_printf_i+0xa4>
  9836. 80083c8: 2a73 cmp r2, #115 ; 0x73
  9837. 80083ca: f000 80b4 beq.w 8008536 <_printf_i+0x1c2>
  9838. 80083ce: d808 bhi.n 80083e2 <_printf_i+0x6e>
  9839. 80083d0: 2a6f cmp r2, #111 ; 0x6f
  9840. 80083d2: d02a beq.n 800842a <_printf_i+0xb6>
  9841. 80083d4: 2a70 cmp r2, #112 ; 0x70
  9842. 80083d6: d1e5 bne.n 80083a4 <_printf_i+0x30>
  9843. 80083d8: 680a ldr r2, [r1, #0]
  9844. 80083da: f042 0220 orr.w r2, r2, #32
  9845. 80083de: 600a str r2, [r1, #0]
  9846. 80083e0: e003 b.n 80083ea <_printf_i+0x76>
  9847. 80083e2: 2a75 cmp r2, #117 ; 0x75
  9848. 80083e4: d021 beq.n 800842a <_printf_i+0xb6>
  9849. 80083e6: 2a78 cmp r2, #120 ; 0x78
  9850. 80083e8: d1dc bne.n 80083a4 <_printf_i+0x30>
  9851. 80083ea: 2278 movs r2, #120 ; 0x78
  9852. 80083ec: 496f ldr r1, [pc, #444] ; (80085ac <_printf_i+0x238>)
  9853. 80083ee: f884 2045 strb.w r2, [r4, #69] ; 0x45
  9854. 80083f2: e064 b.n 80084be <_printf_i+0x14a>
  9855. 80083f4: 681a ldr r2, [r3, #0]
  9856. 80083f6: f101 0542 add.w r5, r1, #66 ; 0x42
  9857. 80083fa: 1d11 adds r1, r2, #4
  9858. 80083fc: 6019 str r1, [r3, #0]
  9859. 80083fe: 6813 ldr r3, [r2, #0]
  9860. 8008400: f884 3042 strb.w r3, [r4, #66] ; 0x42
  9861. 8008404: 2301 movs r3, #1
  9862. 8008406: e0a3 b.n 8008550 <_printf_i+0x1dc>
  9863. 8008408: f011 0f40 tst.w r1, #64 ; 0x40
  9864. 800840c: f102 0104 add.w r1, r2, #4
  9865. 8008410: 6019 str r1, [r3, #0]
  9866. 8008412: d0d7 beq.n 80083c4 <_printf_i+0x50>
  9867. 8008414: f9b2 3000 ldrsh.w r3, [r2]
  9868. 8008418: 2b00 cmp r3, #0
  9869. 800841a: da03 bge.n 8008424 <_printf_i+0xb0>
  9870. 800841c: 222d movs r2, #45 ; 0x2d
  9871. 800841e: 425b negs r3, r3
  9872. 8008420: f884 2043 strb.w r2, [r4, #67] ; 0x43
  9873. 8008424: 4962 ldr r1, [pc, #392] ; (80085b0 <_printf_i+0x23c>)
  9874. 8008426: 220a movs r2, #10
  9875. 8008428: e017 b.n 800845a <_printf_i+0xe6>
  9876. 800842a: 6820 ldr r0, [r4, #0]
  9877. 800842c: 6819 ldr r1, [r3, #0]
  9878. 800842e: f010 0f80 tst.w r0, #128 ; 0x80
  9879. 8008432: d003 beq.n 800843c <_printf_i+0xc8>
  9880. 8008434: 1d08 adds r0, r1, #4
  9881. 8008436: 6018 str r0, [r3, #0]
  9882. 8008438: 680b ldr r3, [r1, #0]
  9883. 800843a: e006 b.n 800844a <_printf_i+0xd6>
  9884. 800843c: f010 0f40 tst.w r0, #64 ; 0x40
  9885. 8008440: f101 0004 add.w r0, r1, #4
  9886. 8008444: 6018 str r0, [r3, #0]
  9887. 8008446: d0f7 beq.n 8008438 <_printf_i+0xc4>
  9888. 8008448: 880b ldrh r3, [r1, #0]
  9889. 800844a: 2a6f cmp r2, #111 ; 0x6f
  9890. 800844c: bf14 ite ne
  9891. 800844e: 220a movne r2, #10
  9892. 8008450: 2208 moveq r2, #8
  9893. 8008452: 4957 ldr r1, [pc, #348] ; (80085b0 <_printf_i+0x23c>)
  9894. 8008454: 2000 movs r0, #0
  9895. 8008456: f884 0043 strb.w r0, [r4, #67] ; 0x43
  9896. 800845a: 6865 ldr r5, [r4, #4]
  9897. 800845c: 2d00 cmp r5, #0
  9898. 800845e: 60a5 str r5, [r4, #8]
  9899. 8008460: f2c0 809c blt.w 800859c <_printf_i+0x228>
  9900. 8008464: 6820 ldr r0, [r4, #0]
  9901. 8008466: f020 0004 bic.w r0, r0, #4
  9902. 800846a: 6020 str r0, [r4, #0]
  9903. 800846c: 2b00 cmp r3, #0
  9904. 800846e: d13f bne.n 80084f0 <_printf_i+0x17c>
  9905. 8008470: 2d00 cmp r5, #0
  9906. 8008472: f040 8095 bne.w 80085a0 <_printf_i+0x22c>
  9907. 8008476: 4675 mov r5, lr
  9908. 8008478: 2a08 cmp r2, #8
  9909. 800847a: d10b bne.n 8008494 <_printf_i+0x120>
  9910. 800847c: 6823 ldr r3, [r4, #0]
  9911. 800847e: 07da lsls r2, r3, #31
  9912. 8008480: d508 bpl.n 8008494 <_printf_i+0x120>
  9913. 8008482: 6923 ldr r3, [r4, #16]
  9914. 8008484: 6862 ldr r2, [r4, #4]
  9915. 8008486: 429a cmp r2, r3
  9916. 8008488: bfde ittt le
  9917. 800848a: 2330 movle r3, #48 ; 0x30
  9918. 800848c: f805 3c01 strble.w r3, [r5, #-1]
  9919. 8008490: f105 35ff addle.w r5, r5, #4294967295
  9920. 8008494: ebae 0305 sub.w r3, lr, r5
  9921. 8008498: 6123 str r3, [r4, #16]
  9922. 800849a: f8cd 8000 str.w r8, [sp]
  9923. 800849e: 463b mov r3, r7
  9924. 80084a0: aa03 add r2, sp, #12
  9925. 80084a2: 4621 mov r1, r4
  9926. 80084a4: 4630 mov r0, r6
  9927. 80084a6: f7ff feed bl 8008284 <_printf_common>
  9928. 80084aa: 3001 adds r0, #1
  9929. 80084ac: d155 bne.n 800855a <_printf_i+0x1e6>
  9930. 80084ae: f04f 30ff mov.w r0, #4294967295
  9931. 80084b2: b005 add sp, #20
  9932. 80084b4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
  9933. 80084b8: f881 2045 strb.w r2, [r1, #69] ; 0x45
  9934. 80084bc: 493c ldr r1, [pc, #240] ; (80085b0 <_printf_i+0x23c>)
  9935. 80084be: 6822 ldr r2, [r4, #0]
  9936. 80084c0: 6818 ldr r0, [r3, #0]
  9937. 80084c2: f012 0f80 tst.w r2, #128 ; 0x80
  9938. 80084c6: f100 0504 add.w r5, r0, #4
  9939. 80084ca: 601d str r5, [r3, #0]
  9940. 80084cc: d001 beq.n 80084d2 <_printf_i+0x15e>
  9941. 80084ce: 6803 ldr r3, [r0, #0]
  9942. 80084d0: e002 b.n 80084d8 <_printf_i+0x164>
  9943. 80084d2: 0655 lsls r5, r2, #25
  9944. 80084d4: d5fb bpl.n 80084ce <_printf_i+0x15a>
  9945. 80084d6: 8803 ldrh r3, [r0, #0]
  9946. 80084d8: 07d0 lsls r0, r2, #31
  9947. 80084da: bf44 itt mi
  9948. 80084dc: f042 0220 orrmi.w r2, r2, #32
  9949. 80084e0: 6022 strmi r2, [r4, #0]
  9950. 80084e2: b91b cbnz r3, 80084ec <_printf_i+0x178>
  9951. 80084e4: 6822 ldr r2, [r4, #0]
  9952. 80084e6: f022 0220 bic.w r2, r2, #32
  9953. 80084ea: 6022 str r2, [r4, #0]
  9954. 80084ec: 2210 movs r2, #16
  9955. 80084ee: e7b1 b.n 8008454 <_printf_i+0xe0>
  9956. 80084f0: 4675 mov r5, lr
  9957. 80084f2: fbb3 f0f2 udiv r0, r3, r2
  9958. 80084f6: fb02 3310 mls r3, r2, r0, r3
  9959. 80084fa: 5ccb ldrb r3, [r1, r3]
  9960. 80084fc: f805 3d01 strb.w r3, [r5, #-1]!
  9961. 8008500: 4603 mov r3, r0
  9962. 8008502: 2800 cmp r0, #0
  9963. 8008504: d1f5 bne.n 80084f2 <_printf_i+0x17e>
  9964. 8008506: e7b7 b.n 8008478 <_printf_i+0x104>
  9965. 8008508: 6808 ldr r0, [r1, #0]
  9966. 800850a: 681a ldr r2, [r3, #0]
  9967. 800850c: f010 0f80 tst.w r0, #128 ; 0x80
  9968. 8008510: 6949 ldr r1, [r1, #20]
  9969. 8008512: d004 beq.n 800851e <_printf_i+0x1aa>
  9970. 8008514: 1d10 adds r0, r2, #4
  9971. 8008516: 6018 str r0, [r3, #0]
  9972. 8008518: 6813 ldr r3, [r2, #0]
  9973. 800851a: 6019 str r1, [r3, #0]
  9974. 800851c: e007 b.n 800852e <_printf_i+0x1ba>
  9975. 800851e: f010 0f40 tst.w r0, #64 ; 0x40
  9976. 8008522: f102 0004 add.w r0, r2, #4
  9977. 8008526: 6018 str r0, [r3, #0]
  9978. 8008528: 6813 ldr r3, [r2, #0]
  9979. 800852a: d0f6 beq.n 800851a <_printf_i+0x1a6>
  9980. 800852c: 8019 strh r1, [r3, #0]
  9981. 800852e: 2300 movs r3, #0
  9982. 8008530: 4675 mov r5, lr
  9983. 8008532: 6123 str r3, [r4, #16]
  9984. 8008534: e7b1 b.n 800849a <_printf_i+0x126>
  9985. 8008536: 681a ldr r2, [r3, #0]
  9986. 8008538: 1d11 adds r1, r2, #4
  9987. 800853a: 6019 str r1, [r3, #0]
  9988. 800853c: 6815 ldr r5, [r2, #0]
  9989. 800853e: 2100 movs r1, #0
  9990. 8008540: 6862 ldr r2, [r4, #4]
  9991. 8008542: 4628 mov r0, r5
  9992. 8008544: f000 f916 bl 8008774 <memchr>
  9993. 8008548: b108 cbz r0, 800854e <_printf_i+0x1da>
  9994. 800854a: 1b40 subs r0, r0, r5
  9995. 800854c: 6060 str r0, [r4, #4]
  9996. 800854e: 6863 ldr r3, [r4, #4]
  9997. 8008550: 6123 str r3, [r4, #16]
  9998. 8008552: 2300 movs r3, #0
  9999. 8008554: f884 3043 strb.w r3, [r4, #67] ; 0x43
  10000. 8008558: e79f b.n 800849a <_printf_i+0x126>
  10001. 800855a: 6923 ldr r3, [r4, #16]
  10002. 800855c: 462a mov r2, r5
  10003. 800855e: 4639 mov r1, r7
  10004. 8008560: 4630 mov r0, r6
  10005. 8008562: 47c0 blx r8
  10006. 8008564: 3001 adds r0, #1
  10007. 8008566: d0a2 beq.n 80084ae <_printf_i+0x13a>
  10008. 8008568: 6823 ldr r3, [r4, #0]
  10009. 800856a: 079b lsls r3, r3, #30
  10010. 800856c: d507 bpl.n 800857e <_printf_i+0x20a>
  10011. 800856e: 2500 movs r5, #0
  10012. 8008570: f104 0919 add.w r9, r4, #25
  10013. 8008574: 68e3 ldr r3, [r4, #12]
  10014. 8008576: 9a03 ldr r2, [sp, #12]
  10015. 8008578: 1a9b subs r3, r3, r2
  10016. 800857a: 429d cmp r5, r3
  10017. 800857c: db05 blt.n 800858a <_printf_i+0x216>
  10018. 800857e: 68e0 ldr r0, [r4, #12]
  10019. 8008580: 9b03 ldr r3, [sp, #12]
  10020. 8008582: 4298 cmp r0, r3
  10021. 8008584: bfb8 it lt
  10022. 8008586: 4618 movlt r0, r3
  10023. 8008588: e793 b.n 80084b2 <_printf_i+0x13e>
  10024. 800858a: 2301 movs r3, #1
  10025. 800858c: 464a mov r2, r9
  10026. 800858e: 4639 mov r1, r7
  10027. 8008590: 4630 mov r0, r6
  10028. 8008592: 47c0 blx r8
  10029. 8008594: 3001 adds r0, #1
  10030. 8008596: d08a beq.n 80084ae <_printf_i+0x13a>
  10031. 8008598: 3501 adds r5, #1
  10032. 800859a: e7eb b.n 8008574 <_printf_i+0x200>
  10033. 800859c: 2b00 cmp r3, #0
  10034. 800859e: d1a7 bne.n 80084f0 <_printf_i+0x17c>
  10035. 80085a0: 780b ldrb r3, [r1, #0]
  10036. 80085a2: f104 0542 add.w r5, r4, #66 ; 0x42
  10037. 80085a6: f884 3042 strb.w r3, [r4, #66] ; 0x42
  10038. 80085aa: e765 b.n 8008478 <_printf_i+0x104>
  10039. 80085ac: 08008ada .word 0x08008ada
  10040. 80085b0: 08008ac9 .word 0x08008ac9
  10041. 080085b4 <_putc_r>:
  10042. 80085b4: b570 push {r4, r5, r6, lr}
  10043. 80085b6: 460d mov r5, r1
  10044. 80085b8: 4614 mov r4, r2
  10045. 80085ba: 4606 mov r6, r0
  10046. 80085bc: b118 cbz r0, 80085c6 <_putc_r+0x12>
  10047. 80085be: 6983 ldr r3, [r0, #24]
  10048. 80085c0: b90b cbnz r3, 80085c6 <_putc_r+0x12>
  10049. 80085c2: f7ff fb81 bl 8007cc8 <__sinit>
  10050. 80085c6: 4b13 ldr r3, [pc, #76] ; (8008614 <_putc_r+0x60>)
  10051. 80085c8: 429c cmp r4, r3
  10052. 80085ca: d112 bne.n 80085f2 <_putc_r+0x3e>
  10053. 80085cc: 6874 ldr r4, [r6, #4]
  10054. 80085ce: 68a3 ldr r3, [r4, #8]
  10055. 80085d0: 3b01 subs r3, #1
  10056. 80085d2: 2b00 cmp r3, #0
  10057. 80085d4: 60a3 str r3, [r4, #8]
  10058. 80085d6: da16 bge.n 8008606 <_putc_r+0x52>
  10059. 80085d8: 69a2 ldr r2, [r4, #24]
  10060. 80085da: 4293 cmp r3, r2
  10061. 80085dc: db02 blt.n 80085e4 <_putc_r+0x30>
  10062. 80085de: b2eb uxtb r3, r5
  10063. 80085e0: 2b0a cmp r3, #10
  10064. 80085e2: d110 bne.n 8008606 <_putc_r+0x52>
  10065. 80085e4: 4622 mov r2, r4
  10066. 80085e6: 4629 mov r1, r5
  10067. 80085e8: 4630 mov r0, r6
  10068. 80085ea: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  10069. 80085ee: f7ff b9b9 b.w 8007964 <__swbuf_r>
  10070. 80085f2: 4b09 ldr r3, [pc, #36] ; (8008618 <_putc_r+0x64>)
  10071. 80085f4: 429c cmp r4, r3
  10072. 80085f6: d101 bne.n 80085fc <_putc_r+0x48>
  10073. 80085f8: 68b4 ldr r4, [r6, #8]
  10074. 80085fa: e7e8 b.n 80085ce <_putc_r+0x1a>
  10075. 80085fc: 4b07 ldr r3, [pc, #28] ; (800861c <_putc_r+0x68>)
  10076. 80085fe: 429c cmp r4, r3
  10077. 8008600: bf08 it eq
  10078. 8008602: 68f4 ldreq r4, [r6, #12]
  10079. 8008604: e7e3 b.n 80085ce <_putc_r+0x1a>
  10080. 8008606: 6823 ldr r3, [r4, #0]
  10081. 8008608: b2e8 uxtb r0, r5
  10082. 800860a: 1c5a adds r2, r3, #1
  10083. 800860c: 6022 str r2, [r4, #0]
  10084. 800860e: 701d strb r5, [r3, #0]
  10085. 8008610: bd70 pop {r4, r5, r6, pc}
  10086. 8008612: bf00 nop
  10087. 8008614: 08008a78 .word 0x08008a78
  10088. 8008618: 08008a98 .word 0x08008a98
  10089. 800861c: 08008a58 .word 0x08008a58
  10090. 08008620 <_sbrk_r>:
  10091. 8008620: b538 push {r3, r4, r5, lr}
  10092. 8008622: 2300 movs r3, #0
  10093. 8008624: 4c05 ldr r4, [pc, #20] ; (800863c <_sbrk_r+0x1c>)
  10094. 8008626: 4605 mov r5, r0
  10095. 8008628: 4608 mov r0, r1
  10096. 800862a: 6023 str r3, [r4, #0]
  10097. 800862c: f000 f8ec bl 8008808 <_sbrk>
  10098. 8008630: 1c43 adds r3, r0, #1
  10099. 8008632: d102 bne.n 800863a <_sbrk_r+0x1a>
  10100. 8008634: 6823 ldr r3, [r4, #0]
  10101. 8008636: b103 cbz r3, 800863a <_sbrk_r+0x1a>
  10102. 8008638: 602b str r3, [r5, #0]
  10103. 800863a: bd38 pop {r3, r4, r5, pc}
  10104. 800863c: 20000718 .word 0x20000718
  10105. 08008640 <__sread>:
  10106. 8008640: b510 push {r4, lr}
  10107. 8008642: 460c mov r4, r1
  10108. 8008644: f9b1 100e ldrsh.w r1, [r1, #14]
  10109. 8008648: f000 f8a4 bl 8008794 <_read_r>
  10110. 800864c: 2800 cmp r0, #0
  10111. 800864e: bfab itete ge
  10112. 8008650: 6d63 ldrge r3, [r4, #84] ; 0x54
  10113. 8008652: 89a3 ldrhlt r3, [r4, #12]
  10114. 8008654: 181b addge r3, r3, r0
  10115. 8008656: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
  10116. 800865a: bfac ite ge
  10117. 800865c: 6563 strge r3, [r4, #84] ; 0x54
  10118. 800865e: 81a3 strhlt r3, [r4, #12]
  10119. 8008660: bd10 pop {r4, pc}
  10120. 08008662 <__swrite>:
  10121. 8008662: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  10122. 8008666: 461f mov r7, r3
  10123. 8008668: 898b ldrh r3, [r1, #12]
  10124. 800866a: 4605 mov r5, r0
  10125. 800866c: 05db lsls r3, r3, #23
  10126. 800866e: 460c mov r4, r1
  10127. 8008670: 4616 mov r6, r2
  10128. 8008672: d505 bpl.n 8008680 <__swrite+0x1e>
  10129. 8008674: 2302 movs r3, #2
  10130. 8008676: 2200 movs r2, #0
  10131. 8008678: f9b1 100e ldrsh.w r1, [r1, #14]
  10132. 800867c: f000 f868 bl 8008750 <_lseek_r>
  10133. 8008680: 89a3 ldrh r3, [r4, #12]
  10134. 8008682: 4632 mov r2, r6
  10135. 8008684: f423 5380 bic.w r3, r3, #4096 ; 0x1000
  10136. 8008688: 81a3 strh r3, [r4, #12]
  10137. 800868a: f9b4 100e ldrsh.w r1, [r4, #14]
  10138. 800868e: 463b mov r3, r7
  10139. 8008690: 4628 mov r0, r5
  10140. 8008692: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
  10141. 8008696: f000 b817 b.w 80086c8 <_write_r>
  10142. 0800869a <__sseek>:
  10143. 800869a: b510 push {r4, lr}
  10144. 800869c: 460c mov r4, r1
  10145. 800869e: f9b1 100e ldrsh.w r1, [r1, #14]
  10146. 80086a2: f000 f855 bl 8008750 <_lseek_r>
  10147. 80086a6: 1c43 adds r3, r0, #1
  10148. 80086a8: 89a3 ldrh r3, [r4, #12]
  10149. 80086aa: bf15 itete ne
  10150. 80086ac: 6560 strne r0, [r4, #84] ; 0x54
  10151. 80086ae: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
  10152. 80086b2: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
  10153. 80086b6: 81a3 strheq r3, [r4, #12]
  10154. 80086b8: bf18 it ne
  10155. 80086ba: 81a3 strhne r3, [r4, #12]
  10156. 80086bc: bd10 pop {r4, pc}
  10157. 080086be <__sclose>:
  10158. 80086be: f9b1 100e ldrsh.w r1, [r1, #14]
  10159. 80086c2: f000 b813 b.w 80086ec <_close_r>
  10160. ...
  10161. 080086c8 <_write_r>:
  10162. 80086c8: b538 push {r3, r4, r5, lr}
  10163. 80086ca: 4605 mov r5, r0
  10164. 80086cc: 4608 mov r0, r1
  10165. 80086ce: 4611 mov r1, r2
  10166. 80086d0: 2200 movs r2, #0
  10167. 80086d2: 4c05 ldr r4, [pc, #20] ; (80086e8 <_write_r+0x20>)
  10168. 80086d4: 6022 str r2, [r4, #0]
  10169. 80086d6: 461a mov r2, r3
  10170. 80086d8: f7fe f9d6 bl 8006a88 <_write>
  10171. 80086dc: 1c43 adds r3, r0, #1
  10172. 80086de: d102 bne.n 80086e6 <_write_r+0x1e>
  10173. 80086e0: 6823 ldr r3, [r4, #0]
  10174. 80086e2: b103 cbz r3, 80086e6 <_write_r+0x1e>
  10175. 80086e4: 602b str r3, [r5, #0]
  10176. 80086e6: bd38 pop {r3, r4, r5, pc}
  10177. 80086e8: 20000718 .word 0x20000718
  10178. 080086ec <_close_r>:
  10179. 80086ec: b538 push {r3, r4, r5, lr}
  10180. 80086ee: 2300 movs r3, #0
  10181. 80086f0: 4c05 ldr r4, [pc, #20] ; (8008708 <_close_r+0x1c>)
  10182. 80086f2: 4605 mov r5, r0
  10183. 80086f4: 4608 mov r0, r1
  10184. 80086f6: 6023 str r3, [r4, #0]
  10185. 80086f8: f000 f85e bl 80087b8 <_close>
  10186. 80086fc: 1c43 adds r3, r0, #1
  10187. 80086fe: d102 bne.n 8008706 <_close_r+0x1a>
  10188. 8008700: 6823 ldr r3, [r4, #0]
  10189. 8008702: b103 cbz r3, 8008706 <_close_r+0x1a>
  10190. 8008704: 602b str r3, [r5, #0]
  10191. 8008706: bd38 pop {r3, r4, r5, pc}
  10192. 8008708: 20000718 .word 0x20000718
  10193. 0800870c <_fstat_r>:
  10194. 800870c: b538 push {r3, r4, r5, lr}
  10195. 800870e: 2300 movs r3, #0
  10196. 8008710: 4c06 ldr r4, [pc, #24] ; (800872c <_fstat_r+0x20>)
  10197. 8008712: 4605 mov r5, r0
  10198. 8008714: 4608 mov r0, r1
  10199. 8008716: 4611 mov r1, r2
  10200. 8008718: 6023 str r3, [r4, #0]
  10201. 800871a: f000 f855 bl 80087c8 <_fstat>
  10202. 800871e: 1c43 adds r3, r0, #1
  10203. 8008720: d102 bne.n 8008728 <_fstat_r+0x1c>
  10204. 8008722: 6823 ldr r3, [r4, #0]
  10205. 8008724: b103 cbz r3, 8008728 <_fstat_r+0x1c>
  10206. 8008726: 602b str r3, [r5, #0]
  10207. 8008728: bd38 pop {r3, r4, r5, pc}
  10208. 800872a: bf00 nop
  10209. 800872c: 20000718 .word 0x20000718
  10210. 08008730 <_isatty_r>:
  10211. 8008730: b538 push {r3, r4, r5, lr}
  10212. 8008732: 2300 movs r3, #0
  10213. 8008734: 4c05 ldr r4, [pc, #20] ; (800874c <_isatty_r+0x1c>)
  10214. 8008736: 4605 mov r5, r0
  10215. 8008738: 4608 mov r0, r1
  10216. 800873a: 6023 str r3, [r4, #0]
  10217. 800873c: f000 f84c bl 80087d8 <_isatty>
  10218. 8008740: 1c43 adds r3, r0, #1
  10219. 8008742: d102 bne.n 800874a <_isatty_r+0x1a>
  10220. 8008744: 6823 ldr r3, [r4, #0]
  10221. 8008746: b103 cbz r3, 800874a <_isatty_r+0x1a>
  10222. 8008748: 602b str r3, [r5, #0]
  10223. 800874a: bd38 pop {r3, r4, r5, pc}
  10224. 800874c: 20000718 .word 0x20000718
  10225. 08008750 <_lseek_r>:
  10226. 8008750: b538 push {r3, r4, r5, lr}
  10227. 8008752: 4605 mov r5, r0
  10228. 8008754: 4608 mov r0, r1
  10229. 8008756: 4611 mov r1, r2
  10230. 8008758: 2200 movs r2, #0
  10231. 800875a: 4c05 ldr r4, [pc, #20] ; (8008770 <_lseek_r+0x20>)
  10232. 800875c: 6022 str r2, [r4, #0]
  10233. 800875e: 461a mov r2, r3
  10234. 8008760: f000 f842 bl 80087e8 <_lseek>
  10235. 8008764: 1c43 adds r3, r0, #1
  10236. 8008766: d102 bne.n 800876e <_lseek_r+0x1e>
  10237. 8008768: 6823 ldr r3, [r4, #0]
  10238. 800876a: b103 cbz r3, 800876e <_lseek_r+0x1e>
  10239. 800876c: 602b str r3, [r5, #0]
  10240. 800876e: bd38 pop {r3, r4, r5, pc}
  10241. 8008770: 20000718 .word 0x20000718
  10242. 08008774 <memchr>:
  10243. 8008774: b510 push {r4, lr}
  10244. 8008776: b2c9 uxtb r1, r1
  10245. 8008778: 4402 add r2, r0
  10246. 800877a: 4290 cmp r0, r2
  10247. 800877c: 4603 mov r3, r0
  10248. 800877e: d101 bne.n 8008784 <memchr+0x10>
  10249. 8008780: 2000 movs r0, #0
  10250. 8008782: bd10 pop {r4, pc}
  10251. 8008784: 781c ldrb r4, [r3, #0]
  10252. 8008786: 3001 adds r0, #1
  10253. 8008788: 428c cmp r4, r1
  10254. 800878a: d1f6 bne.n 800877a <memchr+0x6>
  10255. 800878c: 4618 mov r0, r3
  10256. 800878e: bd10 pop {r4, pc}
  10257. 08008790 <__malloc_lock>:
  10258. 8008790: 4770 bx lr
  10259. 08008792 <__malloc_unlock>:
  10260. 8008792: 4770 bx lr
  10261. 08008794 <_read_r>:
  10262. 8008794: b538 push {r3, r4, r5, lr}
  10263. 8008796: 4605 mov r5, r0
  10264. 8008798: 4608 mov r0, r1
  10265. 800879a: 4611 mov r1, r2
  10266. 800879c: 2200 movs r2, #0
  10267. 800879e: 4c05 ldr r4, [pc, #20] ; (80087b4 <_read_r+0x20>)
  10268. 80087a0: 6022 str r2, [r4, #0]
  10269. 80087a2: 461a mov r2, r3
  10270. 80087a4: f000 f828 bl 80087f8 <_read>
  10271. 80087a8: 1c43 adds r3, r0, #1
  10272. 80087aa: d102 bne.n 80087b2 <_read_r+0x1e>
  10273. 80087ac: 6823 ldr r3, [r4, #0]
  10274. 80087ae: b103 cbz r3, 80087b2 <_read_r+0x1e>
  10275. 80087b0: 602b str r3, [r5, #0]
  10276. 80087b2: bd38 pop {r3, r4, r5, pc}
  10277. 80087b4: 20000718 .word 0x20000718
  10278. 080087b8 <_close>:
  10279. 80087b8: 2258 movs r2, #88 ; 0x58
  10280. 80087ba: 4b02 ldr r3, [pc, #8] ; (80087c4 <_close+0xc>)
  10281. 80087bc: f04f 30ff mov.w r0, #4294967295
  10282. 80087c0: 601a str r2, [r3, #0]
  10283. 80087c2: 4770 bx lr
  10284. 80087c4: 20000718 .word 0x20000718
  10285. 080087c8 <_fstat>:
  10286. 80087c8: 2258 movs r2, #88 ; 0x58
  10287. 80087ca: 4b02 ldr r3, [pc, #8] ; (80087d4 <_fstat+0xc>)
  10288. 80087cc: f04f 30ff mov.w r0, #4294967295
  10289. 80087d0: 601a str r2, [r3, #0]
  10290. 80087d2: 4770 bx lr
  10291. 80087d4: 20000718 .word 0x20000718
  10292. 080087d8 <_isatty>:
  10293. 80087d8: 2258 movs r2, #88 ; 0x58
  10294. 80087da: 4b02 ldr r3, [pc, #8] ; (80087e4 <_isatty+0xc>)
  10295. 80087dc: 2000 movs r0, #0
  10296. 80087de: 601a str r2, [r3, #0]
  10297. 80087e0: 4770 bx lr
  10298. 80087e2: bf00 nop
  10299. 80087e4: 20000718 .word 0x20000718
  10300. 080087e8 <_lseek>:
  10301. 80087e8: 2258 movs r2, #88 ; 0x58
  10302. 80087ea: 4b02 ldr r3, [pc, #8] ; (80087f4 <_lseek+0xc>)
  10303. 80087ec: f04f 30ff mov.w r0, #4294967295
  10304. 80087f0: 601a str r2, [r3, #0]
  10305. 80087f2: 4770 bx lr
  10306. 80087f4: 20000718 .word 0x20000718
  10307. 080087f8 <_read>:
  10308. 80087f8: 2258 movs r2, #88 ; 0x58
  10309. 80087fa: 4b02 ldr r3, [pc, #8] ; (8008804 <_read+0xc>)
  10310. 80087fc: f04f 30ff mov.w r0, #4294967295
  10311. 8008800: 601a str r2, [r3, #0]
  10312. 8008802: 4770 bx lr
  10313. 8008804: 20000718 .word 0x20000718
  10314. 08008808 <_sbrk>:
  10315. 8008808: 4b04 ldr r3, [pc, #16] ; (800881c <_sbrk+0x14>)
  10316. 800880a: 4602 mov r2, r0
  10317. 800880c: 6819 ldr r1, [r3, #0]
  10318. 800880e: b909 cbnz r1, 8008814 <_sbrk+0xc>
  10319. 8008810: 4903 ldr r1, [pc, #12] ; (8008820 <_sbrk+0x18>)
  10320. 8008812: 6019 str r1, [r3, #0]
  10321. 8008814: 6818 ldr r0, [r3, #0]
  10322. 8008816: 4402 add r2, r0
  10323. 8008818: 601a str r2, [r3, #0]
  10324. 800881a: 4770 bx lr
  10325. 800881c: 200003ec .word 0x200003ec
  10326. 8008820: 2000071c .word 0x2000071c
  10327. 08008824 <_init>:
  10328. 8008824: b5f8 push {r3, r4, r5, r6, r7, lr}
  10329. 8008826: bf00 nop
  10330. 8008828: bcf8 pop {r3, r4, r5, r6, r7}
  10331. 800882a: bc08 pop {r3}
  10332. 800882c: 469e mov lr, r3
  10333. 800882e: 4770 bx lr
  10334. 08008830 <_fini>:
  10335. 8008830: b5f8 push {r3, r4, r5, r6, r7, lr}
  10336. 8008832: bf00 nop
  10337. 8008834: bcf8 pop {r3, r4, r5, r6, r7}
  10338. 8008836: bc08 pop {r3}
  10339. 8008838: 469e mov lr, r3
  10340. 800883a: 4770 bx lr