STM32F103_RGB_Controller/Debug/STM32F103_RGB_Controller.list

STM32F103_RGB_Controller.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00002f38  080001e4  080001e4  000101e4  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00000180  0800311c  0800311c  0001311c  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  0800329c  0800329c  0001329c  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  080032a0  080032a0  000132a0  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         00000074  20000000  080032a4  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          00000288  20000074  08003318  00020074  2**2
                  ALLOC
  7 ._user_heap_stack 00000600  200002fc  08003318  000202fc  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  00020074  2**0
                  CONTENTS, READONLY
  9 .debug_info   00013f62  00000000  00000000  0002009d  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 0000292b  00000000  00000000  00033fff  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    00006829  00000000  00000000  0003692a  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 00000940  00000000  00000000  0003d158  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00000d58  00000000  00000000  0003da98  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   0000575d  00000000  00000000  0003e7f0  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    000039c9  00000000  00000000  00043f4d  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  00047916  2**0
                  CONTENTS, READONLY
 17 .debug_frame  00002310  00000000  00000000  00047994  2**2
                  CONTENTS, READONLY, DEBUGGING
 18 .stab         00000084  00000000  00000000  00049ca4  2**2
                  CONTENTS, READONLY, DEBUGGING
 19 .stabstr      00000117  00000000  00000000  00049d28  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080001e4 <__do_global_dtors_aux>:
 80001e4:	b510      	push	{r4, lr}
 80001e6:	4c05      	ldr	r4, [pc, #20]	; (80001fc <__do_global_dtors_aux+0x18>)
 80001e8:	7823      	ldrb	r3, [r4, #0]
 80001ea:	b933      	cbnz	r3, 80001fa <__do_global_dtors_aux+0x16>
 80001ec:	4b04      	ldr	r3, [pc, #16]	; (8000200 <__do_global_dtors_aux+0x1c>)
 80001ee:	b113      	cbz	r3, 80001f6 <__do_global_dtors_aux+0x12>
 80001f0:	4804      	ldr	r0, [pc, #16]	; (8000204 <__do_global_dtors_aux+0x20>)
 80001f2:	f3af 8000 	nop.w
 80001f6:	2301      	movs	r3, #1
 80001f8:	7023      	strb	r3, [r4, #0]
 80001fa:	bd10      	pop	{r4, pc}
 80001fc:	20000074 	.word	0x20000074
 8000200:	00000000 	.word	0x00000000
 8000204:	08003104 	.word	0x08003104

08000208 <frame_dummy>:
 8000208:	b508      	push	{r3, lr}
 800020a:	4b03      	ldr	r3, [pc, #12]	; (8000218 <frame_dummy+0x10>)
 800020c:	b11b      	cbz	r3, 8000216 <frame_dummy+0xe>
 800020e:	4903      	ldr	r1, [pc, #12]	; (800021c <frame_dummy+0x14>)
 8000210:	4803      	ldr	r0, [pc, #12]	; (8000220 <frame_dummy+0x18>)
 8000212:	f3af 8000 	nop.w
 8000216:	bd08      	pop	{r3, pc}
 8000218:	00000000 	.word	0x00000000
 800021c:	20000078 	.word	0x20000078
 8000220:	08003104 	.word	0x08003104

08000224 <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8000224:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8000226:	4b0e      	ldr	r3, [pc, #56]	; (8000260 <HAL_InitTick+0x3c>)
{
 8000228:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800022a:	7818      	ldrb	r0, [r3, #0]
 800022c:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8000230:	fbb3 f3f0 	udiv	r3, r3, r0
 8000234:	4a0b      	ldr	r2, [pc, #44]	; (8000264 <HAL_InitTick+0x40>)
 8000236:	6810      	ldr	r0, [r2, #0]
 8000238:	fbb0 f0f3 	udiv	r0, r0, r3
 800023c:	f000 f89e 	bl	800037c <HAL_SYSTICK_Config>
 8000240:	4604      	mov	r4, r0
 8000242:	b958      	cbnz	r0, 800025c <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8000244:	2d0f      	cmp	r5, #15
 8000246:	d809      	bhi.n	800025c <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8000248:	4602      	mov	r2, r0
 800024a:	4629      	mov	r1, r5
 800024c:	f04f 30ff 	mov.w	r0, #4294967295
 8000250:	f000 f854 	bl	80002fc <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 8000254:	4b04      	ldr	r3, [pc, #16]	; (8000268 <HAL_InitTick+0x44>)
 8000256:	4620      	mov	r0, r4
 8000258:	601d      	str	r5, [r3, #0]
 800025a:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 800025c:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 800025e:	bd38      	pop	{r3, r4, r5, pc}
 8000260:	20000000 	.word	0x20000000
 8000264:	2000000c 	.word	0x2000000c
 8000268:	20000004 	.word	0x20000004

0800026c <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 800026c:	4a07      	ldr	r2, [pc, #28]	; (800028c <HAL_Init+0x20>)
{
 800026e:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000270:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8000272:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000274:	f043 0310 	orr.w	r3, r3, #16
 8000278:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800027a:	f000 f82d 	bl	80002d8 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 800027e:	2000      	movs	r0, #0
 8000280:	f7ff ffd0 	bl	8000224 <HAL_InitTick>
  HAL_MspInit();
 8000284:	f001 fd76 	bl	8001d74 <HAL_MspInit>
}
 8000288:	2000      	movs	r0, #0
 800028a:	bd08      	pop	{r3, pc}
 800028c:	40022000 	.word	0x40022000

08000290 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 8000290:	4a03      	ldr	r2, [pc, #12]	; (80002a0 <HAL_IncTick+0x10>)
 8000292:	4b04      	ldr	r3, [pc, #16]	; (80002a4 <HAL_IncTick+0x14>)
 8000294:	6811      	ldr	r1, [r2, #0]
 8000296:	781b      	ldrb	r3, [r3, #0]
 8000298:	440b      	add	r3, r1
 800029a:	6013      	str	r3, [r2, #0]
 800029c:	4770      	bx	lr
 800029e:	bf00      	nop
 80002a0:	20000184 	.word	0x20000184
 80002a4:	20000000 	.word	0x20000000

080002a8 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80002a8:	4b01      	ldr	r3, [pc, #4]	; (80002b0 <HAL_GetTick+0x8>)
 80002aa:	6818      	ldr	r0, [r3, #0]
}
 80002ac:	4770      	bx	lr
 80002ae:	bf00      	nop
 80002b0:	20000184 	.word	0x20000184

080002b4 <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80002b4:	b538      	push	{r3, r4, r5, lr}
 80002b6:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80002b8:	f7ff fff6 	bl	80002a8 <HAL_GetTick>
 80002bc:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80002be:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80002c0:	bf1e      	ittt	ne
 80002c2:	4b04      	ldrne	r3, [pc, #16]	; (80002d4 <HAL_Delay+0x20>)
 80002c4:	781b      	ldrbne	r3, [r3, #0]
 80002c6:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80002c8:	f7ff ffee 	bl	80002a8 <HAL_GetTick>
 80002cc:	1b40      	subs	r0, r0, r5
 80002ce:	4284      	cmp	r4, r0
 80002d0:	d8fa      	bhi.n	80002c8 <HAL_Delay+0x14>
  {
  }
}
 80002d2:	bd38      	pop	{r3, r4, r5, pc}
 80002d4:	20000000 	.word	0x20000000

080002d8 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002d8:	4a07      	ldr	r2, [pc, #28]	; (80002f8 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002da:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002dc:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002de:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 80002e2:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 80002e6:	041b      	lsls	r3, r3, #16
 80002e8:	0c1b      	lsrs	r3, r3, #16
 80002ea:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 80002ee:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 80002f2:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 80002f4:	60d3      	str	r3, [r2, #12]
 80002f6:	4770      	bx	lr
 80002f8:	e000ed00 	.word	0xe000ed00

080002fc <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 80002fc:	4b17      	ldr	r3, [pc, #92]	; (800035c <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 80002fe:	b530      	push	{r4, r5, lr}
 8000300:	68dc      	ldr	r4, [r3, #12]
 8000302:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8000306:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800030a:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 800030c:	2b04      	cmp	r3, #4
 800030e:	bf28      	it	cs
 8000310:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000312:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000314:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000318:	bf98      	it	ls
 800031a:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800031c:	fa05 f303 	lsl.w	r3, r5, r3
 8000320:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000324:	bf88      	it	hi
 8000326:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000328:	4019      	ands	r1, r3
 800032a:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 800032c:	fa05 f404 	lsl.w	r4, r5, r4
 8000330:	3c01      	subs	r4, #1
 8000332:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 8000334:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000336:	ea42 0201 	orr.w	r2, r2, r1
 800033a:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800033e:	bfaf      	iteee	ge
 8000340:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000344:	4b06      	ldrlt	r3, [pc, #24]	; (8000360 <HAL_NVIC_SetPriority+0x64>)
 8000346:	f000 000f 	andlt.w	r0, r0, #15
 800034a:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800034c:	bfa5      	ittet	ge
 800034e:	b2d2      	uxtbge	r2, r2
 8000350:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000354:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000356:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 800035a:	bd30      	pop	{r4, r5, pc}
 800035c:	e000ed00 	.word	0xe000ed00
 8000360:	e000ed14 	.word	0xe000ed14

08000364 <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 8000364:	2301      	movs	r3, #1
 8000366:	0942      	lsrs	r2, r0, #5
 8000368:	f000 001f 	and.w	r0, r0, #31
 800036c:	fa03 f000 	lsl.w	r0, r3, r0
 8000370:	4b01      	ldr	r3, [pc, #4]	; (8000378 <HAL_NVIC_EnableIRQ+0x14>)
 8000372:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 8000376:	4770      	bx	lr
 8000378:	e000e100 	.word	0xe000e100

0800037c <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 800037c:	3801      	subs	r0, #1
 800037e:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8000382:	d20a      	bcs.n	800039a <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000384:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8000386:	4b06      	ldr	r3, [pc, #24]	; (80003a0 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000388:	4a06      	ldr	r2, [pc, #24]	; (80003a4 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800038a:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800038c:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8000390:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8000392:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8000394:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8000396:	601a      	str	r2, [r3, #0]
 8000398:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 800039a:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 800039c:	4770      	bx	lr
 800039e:	bf00      	nop
 80003a0:	e000e010 	.word	0xe000e010
 80003a4:	e000ed00 	.word	0xe000ed00

080003a8 <HAL_DMA_Abort_IT>:
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{  
  HAL_StatusTypeDef status = HAL_OK;
  
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003a8:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 80003ac:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003ae:	2b02      	cmp	r3, #2
 80003b0:	d003      	beq.n	80003ba <HAL_DMA_Abort_IT+0x12>
  {
    /* no transfer ongoing */
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80003b2:	2304      	movs	r3, #4
 80003b4:	6383      	str	r3, [r0, #56]	; 0x38
        
    status = HAL_ERROR;
 80003b6:	2001      	movs	r0, #1
 80003b8:	bd10      	pop	{r4, pc}
  }
  else
  { 
    /* Disable DMA IT */
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80003ba:	6803      	ldr	r3, [r0, #0]
 80003bc:	681a      	ldr	r2, [r3, #0]
 80003be:	f022 020e 	bic.w	r2, r2, #14
 80003c2:	601a      	str	r2, [r3, #0]

    /* Disable the channel */
    __HAL_DMA_DISABLE(hdma);
 80003c4:	681a      	ldr	r2, [r3, #0]
 80003c6:	f022 0201 	bic.w	r2, r2, #1
 80003ca:	601a      	str	r2, [r3, #0]

    /* Clear all flags */
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 80003cc:	4a29      	ldr	r2, [pc, #164]	; (8000474 <HAL_DMA_Abort_IT+0xcc>)
 80003ce:	4293      	cmp	r3, r2
 80003d0:	d924      	bls.n	800041c <HAL_DMA_Abort_IT+0x74>
 80003d2:	f502 7262 	add.w	r2, r2, #904	; 0x388
 80003d6:	4293      	cmp	r3, r2
 80003d8:	d019      	beq.n	800040e <HAL_DMA_Abort_IT+0x66>
 80003da:	3214      	adds	r2, #20
 80003dc:	4293      	cmp	r3, r2
 80003de:	d018      	beq.n	8000412 <HAL_DMA_Abort_IT+0x6a>
 80003e0:	3214      	adds	r2, #20
 80003e2:	4293      	cmp	r3, r2
 80003e4:	d017      	beq.n	8000416 <HAL_DMA_Abort_IT+0x6e>
 80003e6:	3214      	adds	r2, #20
 80003e8:	4293      	cmp	r3, r2
 80003ea:	bf0c      	ite	eq
 80003ec:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 80003f0:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 80003f4:	4a20      	ldr	r2, [pc, #128]	; (8000478 <HAL_DMA_Abort_IT+0xd0>)
 80003f6:	6053      	str	r3, [r2, #4]

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 80003f8:	2301      	movs	r3, #1

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 80003fa:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 80003fc:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21

    /* Call User Abort callback */
    if(hdma->XferAbortCallback != NULL)
 8000400:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 8000402:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 8000406:	b39b      	cbz	r3, 8000470 <HAL_DMA_Abort_IT+0xc8>
    {
      hdma->XferAbortCallback(hdma);
 8000408:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 800040a:	4620      	mov	r0, r4
 800040c:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 800040e:	2301      	movs	r3, #1
 8000410:	e7f0      	b.n	80003f4 <HAL_DMA_Abort_IT+0x4c>
 8000412:	2310      	movs	r3, #16
 8000414:	e7ee      	b.n	80003f4 <HAL_DMA_Abort_IT+0x4c>
 8000416:	f44f 7380 	mov.w	r3, #256	; 0x100
 800041a:	e7eb      	b.n	80003f4 <HAL_DMA_Abort_IT+0x4c>
 800041c:	4917      	ldr	r1, [pc, #92]	; (800047c <HAL_DMA_Abort_IT+0xd4>)
 800041e:	428b      	cmp	r3, r1
 8000420:	d016      	beq.n	8000450 <HAL_DMA_Abort_IT+0xa8>
 8000422:	3114      	adds	r1, #20
 8000424:	428b      	cmp	r3, r1
 8000426:	d015      	beq.n	8000454 <HAL_DMA_Abort_IT+0xac>
 8000428:	3114      	adds	r1, #20
 800042a:	428b      	cmp	r3, r1
 800042c:	d014      	beq.n	8000458 <HAL_DMA_Abort_IT+0xb0>
 800042e:	3114      	adds	r1, #20
 8000430:	428b      	cmp	r3, r1
 8000432:	d014      	beq.n	800045e <HAL_DMA_Abort_IT+0xb6>
 8000434:	3114      	adds	r1, #20
 8000436:	428b      	cmp	r3, r1
 8000438:	d014      	beq.n	8000464 <HAL_DMA_Abort_IT+0xbc>
 800043a:	3114      	adds	r1, #20
 800043c:	428b      	cmp	r3, r1
 800043e:	d014      	beq.n	800046a <HAL_DMA_Abort_IT+0xc2>
 8000440:	4293      	cmp	r3, r2
 8000442:	bf14      	ite	ne
 8000444:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8000448:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 800044c:	4a0c      	ldr	r2, [pc, #48]	; (8000480 <HAL_DMA_Abort_IT+0xd8>)
 800044e:	e7d2      	b.n	80003f6 <HAL_DMA_Abort_IT+0x4e>
 8000450:	2301      	movs	r3, #1
 8000452:	e7fb      	b.n	800044c <HAL_DMA_Abort_IT+0xa4>
 8000454:	2310      	movs	r3, #16
 8000456:	e7f9      	b.n	800044c <HAL_DMA_Abort_IT+0xa4>
 8000458:	f44f 7380 	mov.w	r3, #256	; 0x100
 800045c:	e7f6      	b.n	800044c <HAL_DMA_Abort_IT+0xa4>
 800045e:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 8000462:	e7f3      	b.n	800044c <HAL_DMA_Abort_IT+0xa4>
 8000464:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 8000468:	e7f0      	b.n	800044c <HAL_DMA_Abort_IT+0xa4>
 800046a:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 800046e:	e7ed      	b.n	800044c <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 8000470:	4618      	mov	r0, r3
    } 
  }
  return status;
}
 8000472:	bd10      	pop	{r4, pc}
 8000474:	40020080 	.word	0x40020080
 8000478:	40020400 	.word	0x40020400
 800047c:	40020008 	.word	0x40020008
 8000480:	40020000 	.word	0x40020000

08000484 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 8000484:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 8000488:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 800048a:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 800048c:	4f6c      	ldr	r7, [pc, #432]	; (8000640 <HAL_GPIO_Init+0x1bc>)
 800048e:	4b6d      	ldr	r3, [pc, #436]	; (8000644 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000490:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 800064c <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 8000494:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 8000650 <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 8000498:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 800049c:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 800049e:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 80004a2:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 80004a6:	45a0      	cmp	r8, r4
 80004a8:	f040 8085 	bne.w	80005b6 <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 80004ac:	684d      	ldr	r5, [r1, #4]
 80004ae:	2d12      	cmp	r5, #18
 80004b0:	f000 80b7 	beq.w	8000622 <HAL_GPIO_Init+0x19e>
 80004b4:	f200 808d 	bhi.w	80005d2 <HAL_GPIO_Init+0x14e>
 80004b8:	2d02      	cmp	r5, #2
 80004ba:	f000 80af 	beq.w	800061c <HAL_GPIO_Init+0x198>
 80004be:	f200 8081 	bhi.w	80005c4 <HAL_GPIO_Init+0x140>
 80004c2:	2d00      	cmp	r5, #0
 80004c4:	f000 8091 	beq.w	80005ea <HAL_GPIO_Init+0x166>
 80004c8:	2d01      	cmp	r5, #1
 80004ca:	f000 80a5 	beq.w	8000618 <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80004ce:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 80004d2:	2cff      	cmp	r4, #255	; 0xff
 80004d4:	bf93      	iteet	ls
 80004d6:	4682      	movls	sl, r0
 80004d8:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 80004dc:	3d08      	subhi	r5, #8
 80004de:	f8d0 b000 	ldrls.w	fp, [r0]
 80004e2:	bf92      	itee	ls
 80004e4:	00b5      	lslls	r5, r6, #2
 80004e6:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 80004ea:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80004ec:	fa09 f805 	lsl.w	r8, r9, r5
 80004f0:	ea2b 0808 	bic.w	r8, fp, r8
 80004f4:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 80004f8:	bf88      	it	hi
 80004fa:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80004fe:	ea48 0505 	orr.w	r5, r8, r5
 8000502:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 8000506:	f8d1 a004 	ldr.w	sl, [r1, #4]
 800050a:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 800050e:	d052      	beq.n	80005b6 <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000510:	69bd      	ldr	r5, [r7, #24]
 8000512:	f026 0803 	bic.w	r8, r6, #3
 8000516:	f045 0501 	orr.w	r5, r5, #1
 800051a:	61bd      	str	r5, [r7, #24]
 800051c:	69bd      	ldr	r5, [r7, #24]
 800051e:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 8000522:	f005 0501 	and.w	r5, r5, #1
 8000526:	9501      	str	r5, [sp, #4]
 8000528:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 800052c:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000530:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8000532:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 8000536:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 800053a:	fa09 f90b 	lsl.w	r9, r9, fp
 800053e:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000542:	4d41      	ldr	r5, [pc, #260]	; (8000648 <HAL_GPIO_Init+0x1c4>)
 8000544:	42a8      	cmp	r0, r5
 8000546:	d071      	beq.n	800062c <HAL_GPIO_Init+0x1a8>
 8000548:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 800054c:	42a8      	cmp	r0, r5
 800054e:	d06f      	beq.n	8000630 <HAL_GPIO_Init+0x1ac>
 8000550:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000554:	42a8      	cmp	r0, r5
 8000556:	d06d      	beq.n	8000634 <HAL_GPIO_Init+0x1b0>
 8000558:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 800055c:	42a8      	cmp	r0, r5
 800055e:	d06b      	beq.n	8000638 <HAL_GPIO_Init+0x1b4>
 8000560:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000564:	42a8      	cmp	r0, r5
 8000566:	d069      	beq.n	800063c <HAL_GPIO_Init+0x1b8>
 8000568:	4570      	cmp	r0, lr
 800056a:	bf0c      	ite	eq
 800056c:	2505      	moveq	r5, #5
 800056e:	2506      	movne	r5, #6
 8000570:	fa05 f50b 	lsl.w	r5, r5, fp
 8000574:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 8000578:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 800057c:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 800057e:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 8000582:	bf14      	ite	ne
 8000584:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 8000586:	43a5      	biceq	r5, r4
 8000588:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 800058a:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 800058c:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 8000590:	bf14      	ite	ne
 8000592:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 8000594:	43a5      	biceq	r5, r4
 8000596:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 8000598:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 800059a:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 800059e:	bf14      	ite	ne
 80005a0:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 80005a2:	43a5      	biceq	r5, r4
 80005a4:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 80005a6:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 80005a8:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 80005ac:	bf14      	ite	ne
 80005ae:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 80005b0:	ea25 0404 	biceq.w	r4, r5, r4
 80005b4:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 80005b6:	3601      	adds	r6, #1
 80005b8:	2e10      	cmp	r6, #16
 80005ba:	f47f af6d 	bne.w	8000498 <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 80005be:	b003      	add	sp, #12
 80005c0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 80005c4:	2d03      	cmp	r5, #3
 80005c6:	d025      	beq.n	8000614 <HAL_GPIO_Init+0x190>
 80005c8:	2d11      	cmp	r5, #17
 80005ca:	d180      	bne.n	80004ce <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 80005cc:	68ca      	ldr	r2, [r1, #12]
 80005ce:	3204      	adds	r2, #4
          break;
 80005d0:	e77d      	b.n	80004ce <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 80005d2:	4565      	cmp	r5, ip
 80005d4:	d009      	beq.n	80005ea <HAL_GPIO_Init+0x166>
 80005d6:	d812      	bhi.n	80005fe <HAL_GPIO_Init+0x17a>
 80005d8:	f8df 9078 	ldr.w	r9, [pc, #120]	; 8000654 <HAL_GPIO_Init+0x1d0>
 80005dc:	454d      	cmp	r5, r9
 80005de:	d004      	beq.n	80005ea <HAL_GPIO_Init+0x166>
 80005e0:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 80005e4:	454d      	cmp	r5, r9
 80005e6:	f47f af72 	bne.w	80004ce <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 80005ea:	688a      	ldr	r2, [r1, #8]
 80005ec:	b1e2      	cbz	r2, 8000628 <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 80005ee:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 80005f0:	bf0c      	ite	eq
 80005f2:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 80005f6:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 80005fa:	2208      	movs	r2, #8
 80005fc:	e767      	b.n	80004ce <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 80005fe:	f8df 9058 	ldr.w	r9, [pc, #88]	; 8000658 <HAL_GPIO_Init+0x1d4>
 8000602:	454d      	cmp	r5, r9
 8000604:	d0f1      	beq.n	80005ea <HAL_GPIO_Init+0x166>
 8000606:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 800060a:	454d      	cmp	r5, r9
 800060c:	d0ed      	beq.n	80005ea <HAL_GPIO_Init+0x166>
 800060e:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 8000612:	e7e7      	b.n	80005e4 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8000614:	2200      	movs	r2, #0
 8000616:	e75a      	b.n	80004ce <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 8000618:	68ca      	ldr	r2, [r1, #12]
          break;
 800061a:	e758      	b.n	80004ce <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 800061c:	68ca      	ldr	r2, [r1, #12]
 800061e:	3208      	adds	r2, #8
          break;
 8000620:	e755      	b.n	80004ce <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 8000622:	68ca      	ldr	r2, [r1, #12]
 8000624:	320c      	adds	r2, #12
          break;
 8000626:	e752      	b.n	80004ce <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 8000628:	2204      	movs	r2, #4
 800062a:	e750      	b.n	80004ce <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 800062c:	2500      	movs	r5, #0
 800062e:	e79f      	b.n	8000570 <HAL_GPIO_Init+0xec>
 8000630:	2501      	movs	r5, #1
 8000632:	e79d      	b.n	8000570 <HAL_GPIO_Init+0xec>
 8000634:	2502      	movs	r5, #2
 8000636:	e79b      	b.n	8000570 <HAL_GPIO_Init+0xec>
 8000638:	2503      	movs	r5, #3
 800063a:	e799      	b.n	8000570 <HAL_GPIO_Init+0xec>
 800063c:	2504      	movs	r5, #4
 800063e:	e797      	b.n	8000570 <HAL_GPIO_Init+0xec>
 8000640:	40021000 	.word	0x40021000
 8000644:	40010400 	.word	0x40010400
 8000648:	40010800 	.word	0x40010800
 800064c:	40011c00 	.word	0x40011c00
 8000650:	10210000 	.word	0x10210000
 8000654:	10110000 	.word	0x10110000
 8000658:	10310000 	.word	0x10310000

0800065c <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 800065c:	b10a      	cbz	r2, 8000662 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 800065e:	6101      	str	r1, [r0, #16]
 8000660:	4770      	bx	lr
 8000662:	0409      	lsls	r1, r1, #16
 8000664:	e7fb      	b.n	800065e <HAL_GPIO_WritePin+0x2>

08000666 <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 8000666:	68c3      	ldr	r3, [r0, #12]
 8000668:	4059      	eors	r1, r3
 800066a:	60c1      	str	r1, [r0, #12]
 800066c:	4770      	bx	lr
	...

08000670 <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000670:	6803      	ldr	r3, [r0, #0]
{
 8000672:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000676:	07db      	lsls	r3, r3, #31
{
 8000678:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 800067a:	d410      	bmi.n	800069e <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 800067c:	682b      	ldr	r3, [r5, #0]
 800067e:	079f      	lsls	r7, r3, #30
 8000680:	d45e      	bmi.n	8000740 <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8000682:	682b      	ldr	r3, [r5, #0]
 8000684:	0719      	lsls	r1, r3, #28
 8000686:	f100 8095 	bmi.w	80007b4 <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 800068a:	682b      	ldr	r3, [r5, #0]
 800068c:	075a      	lsls	r2, r3, #29
 800068e:	f100 80bf 	bmi.w	8000810 <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8000692:	69ea      	ldr	r2, [r5, #28]
 8000694:	2a00      	cmp	r2, #0
 8000696:	f040 812d 	bne.w	80008f4 <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 800069a:	2000      	movs	r0, #0
 800069c:	e014      	b.n	80006c8 <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 800069e:	4c90      	ldr	r4, [pc, #576]	; (80008e0 <HAL_RCC_OscConfig+0x270>)
 80006a0:	6863      	ldr	r3, [r4, #4]
 80006a2:	f003 030c 	and.w	r3, r3, #12
 80006a6:	2b04      	cmp	r3, #4
 80006a8:	d007      	beq.n	80006ba <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 80006aa:	6863      	ldr	r3, [r4, #4]
 80006ac:	f003 030c 	and.w	r3, r3, #12
 80006b0:	2b08      	cmp	r3, #8
 80006b2:	d10c      	bne.n	80006ce <HAL_RCC_OscConfig+0x5e>
 80006b4:	6863      	ldr	r3, [r4, #4]
 80006b6:	03de      	lsls	r6, r3, #15
 80006b8:	d509      	bpl.n	80006ce <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 80006ba:	6823      	ldr	r3, [r4, #0]
 80006bc:	039c      	lsls	r4, r3, #14
 80006be:	d5dd      	bpl.n	800067c <HAL_RCC_OscConfig+0xc>
 80006c0:	686b      	ldr	r3, [r5, #4]
 80006c2:	2b00      	cmp	r3, #0
 80006c4:	d1da      	bne.n	800067c <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 80006c6:	2001      	movs	r0, #1
}
 80006c8:	b002      	add	sp, #8
 80006ca:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80006ce:	686b      	ldr	r3, [r5, #4]
 80006d0:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 80006d4:	d110      	bne.n	80006f8 <HAL_RCC_OscConfig+0x88>
 80006d6:	6823      	ldr	r3, [r4, #0]
 80006d8:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 80006dc:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 80006de:	f7ff fde3 	bl	80002a8 <HAL_GetTick>
 80006e2:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80006e4:	6823      	ldr	r3, [r4, #0]
 80006e6:	0398      	lsls	r0, r3, #14
 80006e8:	d4c8      	bmi.n	800067c <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 80006ea:	f7ff fddd 	bl	80002a8 <HAL_GetTick>
 80006ee:	1b80      	subs	r0, r0, r6
 80006f0:	2864      	cmp	r0, #100	; 0x64
 80006f2:	d9f7      	bls.n	80006e4 <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 80006f4:	2003      	movs	r0, #3
 80006f6:	e7e7      	b.n	80006c8 <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80006f8:	b99b      	cbnz	r3, 8000722 <HAL_RCC_OscConfig+0xb2>
 80006fa:	6823      	ldr	r3, [r4, #0]
 80006fc:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8000700:	6023      	str	r3, [r4, #0]
 8000702:	6823      	ldr	r3, [r4, #0]
 8000704:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8000708:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 800070a:	f7ff fdcd 	bl	80002a8 <HAL_GetTick>
 800070e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8000710:	6823      	ldr	r3, [r4, #0]
 8000712:	0399      	lsls	r1, r3, #14
 8000714:	d5b2      	bpl.n	800067c <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8000716:	f7ff fdc7 	bl	80002a8 <HAL_GetTick>
 800071a:	1b80      	subs	r0, r0, r6
 800071c:	2864      	cmp	r0, #100	; 0x64
 800071e:	d9f7      	bls.n	8000710 <HAL_RCC_OscConfig+0xa0>
 8000720:	e7e8      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000722:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 8000726:	6823      	ldr	r3, [r4, #0]
 8000728:	d103      	bne.n	8000732 <HAL_RCC_OscConfig+0xc2>
 800072a:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 800072e:	6023      	str	r3, [r4, #0]
 8000730:	e7d1      	b.n	80006d6 <HAL_RCC_OscConfig+0x66>
 8000732:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8000736:	6023      	str	r3, [r4, #0]
 8000738:	6823      	ldr	r3, [r4, #0]
 800073a:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 800073e:	e7cd      	b.n	80006dc <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 8000740:	4c67      	ldr	r4, [pc, #412]	; (80008e0 <HAL_RCC_OscConfig+0x270>)
 8000742:	6863      	ldr	r3, [r4, #4]
 8000744:	f013 0f0c 	tst.w	r3, #12
 8000748:	d007      	beq.n	800075a <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 800074a:	6863      	ldr	r3, [r4, #4]
 800074c:	f003 030c 	and.w	r3, r3, #12
 8000750:	2b08      	cmp	r3, #8
 8000752:	d110      	bne.n	8000776 <HAL_RCC_OscConfig+0x106>
 8000754:	6863      	ldr	r3, [r4, #4]
 8000756:	03da      	lsls	r2, r3, #15
 8000758:	d40d      	bmi.n	8000776 <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 800075a:	6823      	ldr	r3, [r4, #0]
 800075c:	079b      	lsls	r3, r3, #30
 800075e:	d502      	bpl.n	8000766 <HAL_RCC_OscConfig+0xf6>
 8000760:	692b      	ldr	r3, [r5, #16]
 8000762:	2b01      	cmp	r3, #1
 8000764:	d1af      	bne.n	80006c6 <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8000766:	6823      	ldr	r3, [r4, #0]
 8000768:	696a      	ldr	r2, [r5, #20]
 800076a:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 800076e:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000772:	6023      	str	r3, [r4, #0]
 8000774:	e785      	b.n	8000682 <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 8000776:	692a      	ldr	r2, [r5, #16]
 8000778:	4b5a      	ldr	r3, [pc, #360]	; (80008e4 <HAL_RCC_OscConfig+0x274>)
 800077a:	b16a      	cbz	r2, 8000798 <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 800077c:	2201      	movs	r2, #1
 800077e:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8000780:	f7ff fd92 	bl	80002a8 <HAL_GetTick>
 8000784:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000786:	6823      	ldr	r3, [r4, #0]
 8000788:	079f      	lsls	r7, r3, #30
 800078a:	d4ec      	bmi.n	8000766 <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 800078c:	f7ff fd8c 	bl	80002a8 <HAL_GetTick>
 8000790:	1b80      	subs	r0, r0, r6
 8000792:	2802      	cmp	r0, #2
 8000794:	d9f7      	bls.n	8000786 <HAL_RCC_OscConfig+0x116>
 8000796:	e7ad      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8000798:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 800079a:	f7ff fd85 	bl	80002a8 <HAL_GetTick>
 800079e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 80007a0:	6823      	ldr	r3, [r4, #0]
 80007a2:	0798      	lsls	r0, r3, #30
 80007a4:	f57f af6d 	bpl.w	8000682 <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 80007a8:	f7ff fd7e 	bl	80002a8 <HAL_GetTick>
 80007ac:	1b80      	subs	r0, r0, r6
 80007ae:	2802      	cmp	r0, #2
 80007b0:	d9f6      	bls.n	80007a0 <HAL_RCC_OscConfig+0x130>
 80007b2:	e79f      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 80007b4:	69aa      	ldr	r2, [r5, #24]
 80007b6:	4c4a      	ldr	r4, [pc, #296]	; (80008e0 <HAL_RCC_OscConfig+0x270>)
 80007b8:	4b4b      	ldr	r3, [pc, #300]	; (80008e8 <HAL_RCC_OscConfig+0x278>)
 80007ba:	b1da      	cbz	r2, 80007f4 <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 80007bc:	2201      	movs	r2, #1
 80007be:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 80007c0:	f7ff fd72 	bl	80002a8 <HAL_GetTick>
 80007c4:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 80007c6:	6a63      	ldr	r3, [r4, #36]	; 0x24
 80007c8:	079b      	lsls	r3, r3, #30
 80007ca:	d50d      	bpl.n	80007e8 <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 80007cc:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 80007d0:	4b46      	ldr	r3, [pc, #280]	; (80008ec <HAL_RCC_OscConfig+0x27c>)
 80007d2:	681b      	ldr	r3, [r3, #0]
 80007d4:	fbb3 f3f2 	udiv	r3, r3, r2
 80007d8:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 80007da:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 80007dc:	9b01      	ldr	r3, [sp, #4]
 80007de:	1e5a      	subs	r2, r3, #1
 80007e0:	9201      	str	r2, [sp, #4]
 80007e2:	2b00      	cmp	r3, #0
 80007e4:	d1f9      	bne.n	80007da <HAL_RCC_OscConfig+0x16a>
 80007e6:	e750      	b.n	800068a <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 80007e8:	f7ff fd5e 	bl	80002a8 <HAL_GetTick>
 80007ec:	1b80      	subs	r0, r0, r6
 80007ee:	2802      	cmp	r0, #2
 80007f0:	d9e9      	bls.n	80007c6 <HAL_RCC_OscConfig+0x156>
 80007f2:	e77f      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 80007f4:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 80007f6:	f7ff fd57 	bl	80002a8 <HAL_GetTick>
 80007fa:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 80007fc:	6a63      	ldr	r3, [r4, #36]	; 0x24
 80007fe:	079f      	lsls	r7, r3, #30
 8000800:	f57f af43 	bpl.w	800068a <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000804:	f7ff fd50 	bl	80002a8 <HAL_GetTick>
 8000808:	1b80      	subs	r0, r0, r6
 800080a:	2802      	cmp	r0, #2
 800080c:	d9f6      	bls.n	80007fc <HAL_RCC_OscConfig+0x18c>
 800080e:	e771      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8000810:	4c33      	ldr	r4, [pc, #204]	; (80008e0 <HAL_RCC_OscConfig+0x270>)
 8000812:	69e3      	ldr	r3, [r4, #28]
 8000814:	00d8      	lsls	r0, r3, #3
 8000816:	d424      	bmi.n	8000862 <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 8000818:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 800081a:	69e3      	ldr	r3, [r4, #28]
 800081c:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8000820:	61e3      	str	r3, [r4, #28]
 8000822:	69e3      	ldr	r3, [r4, #28]
 8000824:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8000828:	9300      	str	r3, [sp, #0]
 800082a:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 800082c:	4e30      	ldr	r6, [pc, #192]	; (80008f0 <HAL_RCC_OscConfig+0x280>)
 800082e:	6833      	ldr	r3, [r6, #0]
 8000830:	05d9      	lsls	r1, r3, #23
 8000832:	d518      	bpl.n	8000866 <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000834:	68eb      	ldr	r3, [r5, #12]
 8000836:	2b01      	cmp	r3, #1
 8000838:	d126      	bne.n	8000888 <HAL_RCC_OscConfig+0x218>
 800083a:	6a23      	ldr	r3, [r4, #32]
 800083c:	f043 0301 	orr.w	r3, r3, #1
 8000840:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000842:	f7ff fd31 	bl	80002a8 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000846:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 800084a:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 800084c:	6a23      	ldr	r3, [r4, #32]
 800084e:	079b      	lsls	r3, r3, #30
 8000850:	d53f      	bpl.n	80008d2 <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 8000852:	2f00      	cmp	r7, #0
 8000854:	f43f af1d 	beq.w	8000692 <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 8000858:	69e3      	ldr	r3, [r4, #28]
 800085a:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 800085e:	61e3      	str	r3, [r4, #28]
 8000860:	e717      	b.n	8000692 <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 8000862:	2700      	movs	r7, #0
 8000864:	e7e2      	b.n	800082c <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8000866:	6833      	ldr	r3, [r6, #0]
 8000868:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 800086c:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 800086e:	f7ff fd1b 	bl	80002a8 <HAL_GetTick>
 8000872:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000874:	6833      	ldr	r3, [r6, #0]
 8000876:	05da      	lsls	r2, r3, #23
 8000878:	d4dc      	bmi.n	8000834 <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800087a:	f7ff fd15 	bl	80002a8 <HAL_GetTick>
 800087e:	eba0 0008 	sub.w	r0, r0, r8
 8000882:	2864      	cmp	r0, #100	; 0x64
 8000884:	d9f6      	bls.n	8000874 <HAL_RCC_OscConfig+0x204>
 8000886:	e735      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000888:	b9ab      	cbnz	r3, 80008b6 <HAL_RCC_OscConfig+0x246>
 800088a:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 800088c:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000890:	f023 0301 	bic.w	r3, r3, #1
 8000894:	6223      	str	r3, [r4, #32]
 8000896:	6a23      	ldr	r3, [r4, #32]
 8000898:	f023 0304 	bic.w	r3, r3, #4
 800089c:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 800089e:	f7ff fd03 	bl	80002a8 <HAL_GetTick>
 80008a2:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 80008a4:	6a23      	ldr	r3, [r4, #32]
 80008a6:	0798      	lsls	r0, r3, #30
 80008a8:	d5d3      	bpl.n	8000852 <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80008aa:	f7ff fcfd 	bl	80002a8 <HAL_GetTick>
 80008ae:	1b80      	subs	r0, r0, r6
 80008b0:	4540      	cmp	r0, r8
 80008b2:	d9f7      	bls.n	80008a4 <HAL_RCC_OscConfig+0x234>
 80008b4:	e71e      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80008b6:	2b05      	cmp	r3, #5
 80008b8:	6a23      	ldr	r3, [r4, #32]
 80008ba:	d103      	bne.n	80008c4 <HAL_RCC_OscConfig+0x254>
 80008bc:	f043 0304 	orr.w	r3, r3, #4
 80008c0:	6223      	str	r3, [r4, #32]
 80008c2:	e7ba      	b.n	800083a <HAL_RCC_OscConfig+0x1ca>
 80008c4:	f023 0301 	bic.w	r3, r3, #1
 80008c8:	6223      	str	r3, [r4, #32]
 80008ca:	6a23      	ldr	r3, [r4, #32]
 80008cc:	f023 0304 	bic.w	r3, r3, #4
 80008d0:	e7b6      	b.n	8000840 <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80008d2:	f7ff fce9 	bl	80002a8 <HAL_GetTick>
 80008d6:	eba0 0008 	sub.w	r0, r0, r8
 80008da:	42b0      	cmp	r0, r6
 80008dc:	d9b6      	bls.n	800084c <HAL_RCC_OscConfig+0x1dc>
 80008de:	e709      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
 80008e0:	40021000 	.word	0x40021000
 80008e4:	42420000 	.word	0x42420000
 80008e8:	42420480 	.word	0x42420480
 80008ec:	2000000c 	.word	0x2000000c
 80008f0:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 80008f4:	4c22      	ldr	r4, [pc, #136]	; (8000980 <HAL_RCC_OscConfig+0x310>)
 80008f6:	6863      	ldr	r3, [r4, #4]
 80008f8:	f003 030c 	and.w	r3, r3, #12
 80008fc:	2b08      	cmp	r3, #8
 80008fe:	f43f aee2 	beq.w	80006c6 <HAL_RCC_OscConfig+0x56>
 8000902:	2300      	movs	r3, #0
 8000904:	4e1f      	ldr	r6, [pc, #124]	; (8000984 <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000906:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8000908:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800090a:	d12b      	bne.n	8000964 <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 800090c:	f7ff fccc 	bl	80002a8 <HAL_GetTick>
 8000910:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000912:	6823      	ldr	r3, [r4, #0]
 8000914:	0199      	lsls	r1, r3, #6
 8000916:	d41f      	bmi.n	8000958 <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8000918:	6a2b      	ldr	r3, [r5, #32]
 800091a:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 800091e:	d105      	bne.n	800092c <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8000920:	6862      	ldr	r2, [r4, #4]
 8000922:	68a9      	ldr	r1, [r5, #8]
 8000924:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 8000928:	430a      	orrs	r2, r1
 800092a:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 800092c:	6a69      	ldr	r1, [r5, #36]	; 0x24
 800092e:	6862      	ldr	r2, [r4, #4]
 8000930:	430b      	orrs	r3, r1
 8000932:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 8000936:	4313      	orrs	r3, r2
 8000938:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 800093a:	2301      	movs	r3, #1
 800093c:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 800093e:	f7ff fcb3 	bl	80002a8 <HAL_GetTick>
 8000942:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8000944:	6823      	ldr	r3, [r4, #0]
 8000946:	019a      	lsls	r2, r3, #6
 8000948:	f53f aea7 	bmi.w	800069a <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 800094c:	f7ff fcac 	bl	80002a8 <HAL_GetTick>
 8000950:	1b40      	subs	r0, r0, r5
 8000952:	2802      	cmp	r0, #2
 8000954:	d9f6      	bls.n	8000944 <HAL_RCC_OscConfig+0x2d4>
 8000956:	e6cd      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000958:	f7ff fca6 	bl	80002a8 <HAL_GetTick>
 800095c:	1bc0      	subs	r0, r0, r7
 800095e:	2802      	cmp	r0, #2
 8000960:	d9d7      	bls.n	8000912 <HAL_RCC_OscConfig+0x2a2>
 8000962:	e6c7      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8000964:	f7ff fca0 	bl	80002a8 <HAL_GetTick>
 8000968:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 800096a:	6823      	ldr	r3, [r4, #0]
 800096c:	019b      	lsls	r3, r3, #6
 800096e:	f57f ae94 	bpl.w	800069a <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000972:	f7ff fc99 	bl	80002a8 <HAL_GetTick>
 8000976:	1b40      	subs	r0, r0, r5
 8000978:	2802      	cmp	r0, #2
 800097a:	d9f6      	bls.n	800096a <HAL_RCC_OscConfig+0x2fa>
 800097c:	e6ba      	b.n	80006f4 <HAL_RCC_OscConfig+0x84>
 800097e:	bf00      	nop
 8000980:	40021000 	.word	0x40021000
 8000984:	42420060 	.word	0x42420060

08000988 <HAL_RCC_GetSysClockFreq>:
{
 8000988:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 800098a:	4b19      	ldr	r3, [pc, #100]	; (80009f0 <HAL_RCC_GetSysClockFreq+0x68>)
{
 800098c:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 800098e:	ac02      	add	r4, sp, #8
 8000990:	f103 0510 	add.w	r5, r3, #16
 8000994:	4622      	mov	r2, r4
 8000996:	6818      	ldr	r0, [r3, #0]
 8000998:	6859      	ldr	r1, [r3, #4]
 800099a:	3308      	adds	r3, #8
 800099c:	c203      	stmia	r2!, {r0, r1}
 800099e:	42ab      	cmp	r3, r5
 80009a0:	4614      	mov	r4, r2
 80009a2:	d1f7      	bne.n	8000994 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 80009a4:	2301      	movs	r3, #1
 80009a6:	f88d 3004 	strb.w	r3, [sp, #4]
 80009aa:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 80009ac:	4911      	ldr	r1, [pc, #68]	; (80009f4 <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 80009ae:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 80009b2:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 80009b4:	f003 020c 	and.w	r2, r3, #12
 80009b8:	2a08      	cmp	r2, #8
 80009ba:	d117      	bne.n	80009ec <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 80009bc:	f3c3 4283 	ubfx	r2, r3, #18, #4
 80009c0:	a806      	add	r0, sp, #24
 80009c2:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 80009c4:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 80009c6:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 80009ca:	d50c      	bpl.n	80009e6 <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 80009cc:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 80009ce:	480a      	ldr	r0, [pc, #40]	; (80009f8 <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 80009d0:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 80009d4:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 80009d6:	aa06      	add	r2, sp, #24
 80009d8:	4413      	add	r3, r2
 80009da:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 80009de:	fbb0 f0f3 	udiv	r0, r0, r3
}
 80009e2:	b007      	add	sp, #28
 80009e4:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 80009e6:	4805      	ldr	r0, [pc, #20]	; (80009fc <HAL_RCC_GetSysClockFreq+0x74>)
 80009e8:	4350      	muls	r0, r2
 80009ea:	e7fa      	b.n	80009e2 <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 80009ec:	4802      	ldr	r0, [pc, #8]	; (80009f8 <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 80009ee:	e7f8      	b.n	80009e2 <HAL_RCC_GetSysClockFreq+0x5a>
 80009f0:	0800311c 	.word	0x0800311c
 80009f4:	40021000 	.word	0x40021000
 80009f8:	007a1200 	.word	0x007a1200
 80009fc:	003d0900 	.word	0x003d0900

08000a00 <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000a00:	4a54      	ldr	r2, [pc, #336]	; (8000b54 <HAL_RCC_ClockConfig+0x154>)
{
 8000a02:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000a06:	6813      	ldr	r3, [r2, #0]
{
 8000a08:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000a0a:	f003 0307 	and.w	r3, r3, #7
 8000a0e:	428b      	cmp	r3, r1
{
 8000a10:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000a12:	d32a      	bcc.n	8000a6a <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8000a14:	6829      	ldr	r1, [r5, #0]
 8000a16:	078c      	lsls	r4, r1, #30
 8000a18:	d434      	bmi.n	8000a84 <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8000a1a:	07ca      	lsls	r2, r1, #31
 8000a1c:	d447      	bmi.n	8000aae <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 8000a1e:	4a4d      	ldr	r2, [pc, #308]	; (8000b54 <HAL_RCC_ClockConfig+0x154>)
 8000a20:	6813      	ldr	r3, [r2, #0]
 8000a22:	f003 0307 	and.w	r3, r3, #7
 8000a26:	429e      	cmp	r6, r3
 8000a28:	f0c0 8082 	bcc.w	8000b30 <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000a2c:	682a      	ldr	r2, [r5, #0]
 8000a2e:	4c4a      	ldr	r4, [pc, #296]	; (8000b58 <HAL_RCC_ClockConfig+0x158>)
 8000a30:	f012 0f04 	tst.w	r2, #4
 8000a34:	f040 8087 	bne.w	8000b46 <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000a38:	0713      	lsls	r3, r2, #28
 8000a3a:	d506      	bpl.n	8000a4a <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 8000a3c:	6863      	ldr	r3, [r4, #4]
 8000a3e:	692a      	ldr	r2, [r5, #16]
 8000a40:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8000a44:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000a48:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 8000a4a:	f7ff ff9d 	bl	8000988 <HAL_RCC_GetSysClockFreq>
 8000a4e:	6863      	ldr	r3, [r4, #4]
 8000a50:	4a42      	ldr	r2, [pc, #264]	; (8000b5c <HAL_RCC_ClockConfig+0x15c>)
 8000a52:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8000a56:	5cd3      	ldrb	r3, [r2, r3]
 8000a58:	40d8      	lsrs	r0, r3
 8000a5a:	4b41      	ldr	r3, [pc, #260]	; (8000b60 <HAL_RCC_ClockConfig+0x160>)
 8000a5c:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 8000a5e:	2000      	movs	r0, #0
 8000a60:	f7ff fbe0 	bl	8000224 <HAL_InitTick>
  return HAL_OK;
 8000a64:	2000      	movs	r0, #0
}
 8000a66:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000a6a:	6813      	ldr	r3, [r2, #0]
 8000a6c:	f023 0307 	bic.w	r3, r3, #7
 8000a70:	430b      	orrs	r3, r1
 8000a72:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000a74:	6813      	ldr	r3, [r2, #0]
 8000a76:	f003 0307 	and.w	r3, r3, #7
 8000a7a:	4299      	cmp	r1, r3
 8000a7c:	d0ca      	beq.n	8000a14 <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 8000a7e:	2001      	movs	r0, #1
 8000a80:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8000a84:	4b34      	ldr	r3, [pc, #208]	; (8000b58 <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000a86:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8000a8a:	bf1e      	ittt	ne
 8000a8c:	685a      	ldrne	r2, [r3, #4]
 8000a8e:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 8000a92:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000a94:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8000a96:	bf42      	ittt	mi
 8000a98:	685a      	ldrmi	r2, [r3, #4]
 8000a9a:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 8000a9e:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8000aa0:	685a      	ldr	r2, [r3, #4]
 8000aa2:	68a8      	ldr	r0, [r5, #8]
 8000aa4:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8000aa8:	4302      	orrs	r2, r0
 8000aaa:	605a      	str	r2, [r3, #4]
 8000aac:	e7b5      	b.n	8000a1a <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000aae:	686a      	ldr	r2, [r5, #4]
 8000ab0:	4c29      	ldr	r4, [pc, #164]	; (8000b58 <HAL_RCC_ClockConfig+0x158>)
 8000ab2:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000ab4:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000ab6:	d11c      	bne.n	8000af2 <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000ab8:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000abc:	d0df      	beq.n	8000a7e <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000abe:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000ac0:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000ac4:	f023 0303 	bic.w	r3, r3, #3
 8000ac8:	4313      	orrs	r3, r2
 8000aca:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8000acc:	f7ff fbec 	bl	80002a8 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000ad0:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 8000ad2:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000ad4:	2b01      	cmp	r3, #1
 8000ad6:	d114      	bne.n	8000b02 <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8000ad8:	6863      	ldr	r3, [r4, #4]
 8000ada:	f003 030c 	and.w	r3, r3, #12
 8000ade:	2b04      	cmp	r3, #4
 8000ae0:	d09d      	beq.n	8000a1e <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000ae2:	f7ff fbe1 	bl	80002a8 <HAL_GetTick>
 8000ae6:	1bc0      	subs	r0, r0, r7
 8000ae8:	4540      	cmp	r0, r8
 8000aea:	d9f5      	bls.n	8000ad8 <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 8000aec:	2003      	movs	r0, #3
 8000aee:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000af2:	2a02      	cmp	r2, #2
 8000af4:	d102      	bne.n	8000afc <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8000af6:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 8000afa:	e7df      	b.n	8000abc <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000afc:	f013 0f02 	tst.w	r3, #2
 8000b00:	e7dc      	b.n	8000abc <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000b02:	2b02      	cmp	r3, #2
 8000b04:	d10f      	bne.n	8000b26 <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000b06:	6863      	ldr	r3, [r4, #4]
 8000b08:	f003 030c 	and.w	r3, r3, #12
 8000b0c:	2b08      	cmp	r3, #8
 8000b0e:	d086      	beq.n	8000a1e <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000b10:	f7ff fbca 	bl	80002a8 <HAL_GetTick>
 8000b14:	1bc0      	subs	r0, r0, r7
 8000b16:	4540      	cmp	r0, r8
 8000b18:	d9f5      	bls.n	8000b06 <HAL_RCC_ClockConfig+0x106>
 8000b1a:	e7e7      	b.n	8000aec <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000b1c:	f7ff fbc4 	bl	80002a8 <HAL_GetTick>
 8000b20:	1bc0      	subs	r0, r0, r7
 8000b22:	4540      	cmp	r0, r8
 8000b24:	d8e2      	bhi.n	8000aec <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 8000b26:	6863      	ldr	r3, [r4, #4]
 8000b28:	f013 0f0c 	tst.w	r3, #12
 8000b2c:	d1f6      	bne.n	8000b1c <HAL_RCC_ClockConfig+0x11c>
 8000b2e:	e776      	b.n	8000a1e <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000b30:	6813      	ldr	r3, [r2, #0]
 8000b32:	f023 0307 	bic.w	r3, r3, #7
 8000b36:	4333      	orrs	r3, r6
 8000b38:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000b3a:	6813      	ldr	r3, [r2, #0]
 8000b3c:	f003 0307 	and.w	r3, r3, #7
 8000b40:	429e      	cmp	r6, r3
 8000b42:	d19c      	bne.n	8000a7e <HAL_RCC_ClockConfig+0x7e>
 8000b44:	e772      	b.n	8000a2c <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8000b46:	6863      	ldr	r3, [r4, #4]
 8000b48:	68e9      	ldr	r1, [r5, #12]
 8000b4a:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8000b4e:	430b      	orrs	r3, r1
 8000b50:	6063      	str	r3, [r4, #4]
 8000b52:	e771      	b.n	8000a38 <HAL_RCC_ClockConfig+0x38>
 8000b54:	40022000 	.word	0x40022000
 8000b58:	40021000 	.word	0x40021000
 8000b5c:	080031eb 	.word	0x080031eb
 8000b60:	2000000c 	.word	0x2000000c

08000b64 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8000b64:	4b04      	ldr	r3, [pc, #16]	; (8000b78 <HAL_RCC_GetPCLK1Freq+0x14>)
 8000b66:	4a05      	ldr	r2, [pc, #20]	; (8000b7c <HAL_RCC_GetPCLK1Freq+0x18>)
 8000b68:	685b      	ldr	r3, [r3, #4]
 8000b6a:	f3c3 2302 	ubfx	r3, r3, #8, #3
 8000b6e:	5cd3      	ldrb	r3, [r2, r3]
 8000b70:	4a03      	ldr	r2, [pc, #12]	; (8000b80 <HAL_RCC_GetPCLK1Freq+0x1c>)
 8000b72:	6810      	ldr	r0, [r2, #0]
}    
 8000b74:	40d8      	lsrs	r0, r3
 8000b76:	4770      	bx	lr
 8000b78:	40021000 	.word	0x40021000
 8000b7c:	080031fb 	.word	0x080031fb
 8000b80:	2000000c 	.word	0x2000000c

08000b84 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 8000b84:	4b04      	ldr	r3, [pc, #16]	; (8000b98 <HAL_RCC_GetPCLK2Freq+0x14>)
 8000b86:	4a05      	ldr	r2, [pc, #20]	; (8000b9c <HAL_RCC_GetPCLK2Freq+0x18>)
 8000b88:	685b      	ldr	r3, [r3, #4]
 8000b8a:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 8000b8e:	5cd3      	ldrb	r3, [r2, r3]
 8000b90:	4a03      	ldr	r2, [pc, #12]	; (8000ba0 <HAL_RCC_GetPCLK2Freq+0x1c>)
 8000b92:	6810      	ldr	r0, [r2, #0]
} 
 8000b94:	40d8      	lsrs	r0, r3
 8000b96:	4770      	bx	lr
 8000b98:	40021000 	.word	0x40021000
 8000b9c:	080031fb 	.word	0x080031fb
 8000ba0:	2000000c 	.word	0x2000000c

08000ba4 <HAL_TIM_Base_Start_IT>:
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

   /* Enable the TIM Update interrupt */
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000ba4:	6803      	ldr	r3, [r0, #0]
   /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}
 8000ba6:	2000      	movs	r0, #0
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000ba8:	68da      	ldr	r2, [r3, #12]
 8000baa:	f042 0201 	orr.w	r2, r2, #1
 8000bae:	60da      	str	r2, [r3, #12]
  __HAL_TIM_ENABLE(htim);
 8000bb0:	681a      	ldr	r2, [r3, #0]
 8000bb2:	f042 0201 	orr.w	r2, r2, #1
 8000bb6:	601a      	str	r2, [r3, #0]
}
 8000bb8:	4770      	bx	lr

08000bba <HAL_TIM_OC_DelayElapsedCallback>:
 8000bba:	4770      	bx	lr

08000bbc <HAL_TIM_IC_CaptureCallback>:
 8000bbc:	4770      	bx	lr

08000bbe <HAL_TIM_PWM_PulseFinishedCallback>:
 8000bbe:	4770      	bx	lr

08000bc0 <HAL_TIM_TriggerCallback>:
 8000bc0:	4770      	bx	lr

08000bc2 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000bc2:	6803      	ldr	r3, [r0, #0]
{
 8000bc4:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000bc6:	691a      	ldr	r2, [r3, #16]
{
 8000bc8:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000bca:	0791      	lsls	r1, r2, #30
 8000bcc:	d50e      	bpl.n	8000bec <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 8000bce:	68da      	ldr	r2, [r3, #12]
 8000bd0:	0792      	lsls	r2, r2, #30
 8000bd2:	d50b      	bpl.n	8000bec <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8000bd4:	f06f 0202 	mvn.w	r2, #2
 8000bd8:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000bda:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000bdc:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000bde:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000be0:	079b      	lsls	r3, r3, #30
 8000be2:	d077      	beq.n	8000cd4 <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 8000be4:	f7ff ffea 	bl	8000bbc <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000be8:	2300      	movs	r3, #0
 8000bea:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8000bec:	6823      	ldr	r3, [r4, #0]
 8000bee:	691a      	ldr	r2, [r3, #16]
 8000bf0:	0750      	lsls	r0, r2, #29
 8000bf2:	d510      	bpl.n	8000c16 <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 8000bf4:	68da      	ldr	r2, [r3, #12]
 8000bf6:	0751      	lsls	r1, r2, #29
 8000bf8:	d50d      	bpl.n	8000c16 <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8000bfa:	f06f 0204 	mvn.w	r2, #4
 8000bfe:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000c00:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000c02:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000c04:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000c06:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000c0a:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000c0c:	d068      	beq.n	8000ce0 <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 8000c0e:	f7ff ffd5 	bl	8000bbc <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000c12:	2300      	movs	r3, #0
 8000c14:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8000c16:	6823      	ldr	r3, [r4, #0]
 8000c18:	691a      	ldr	r2, [r3, #16]
 8000c1a:	0712      	lsls	r2, r2, #28
 8000c1c:	d50f      	bpl.n	8000c3e <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 8000c1e:	68da      	ldr	r2, [r3, #12]
 8000c20:	0710      	lsls	r0, r2, #28
 8000c22:	d50c      	bpl.n	8000c3e <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8000c24:	f06f 0208 	mvn.w	r2, #8
 8000c28:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000c2a:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000c2c:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000c2e:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000c30:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000c32:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000c34:	d05a      	beq.n	8000cec <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8000c36:	f7ff ffc1 	bl	8000bbc <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000c3a:	2300      	movs	r3, #0
 8000c3c:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8000c3e:	6823      	ldr	r3, [r4, #0]
 8000c40:	691a      	ldr	r2, [r3, #16]
 8000c42:	06d2      	lsls	r2, r2, #27
 8000c44:	d510      	bpl.n	8000c68 <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8000c46:	68da      	ldr	r2, [r3, #12]
 8000c48:	06d0      	lsls	r0, r2, #27
 8000c4a:	d50d      	bpl.n	8000c68 <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8000c4c:	f06f 0210 	mvn.w	r2, #16
 8000c50:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000c52:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000c54:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000c56:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000c58:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000c5c:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000c5e:	d04b      	beq.n	8000cf8 <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 8000c60:	f7ff ffac 	bl	8000bbc <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000c64:	2300      	movs	r3, #0
 8000c66:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8000c68:	6823      	ldr	r3, [r4, #0]
 8000c6a:	691a      	ldr	r2, [r3, #16]
 8000c6c:	07d1      	lsls	r1, r2, #31
 8000c6e:	d508      	bpl.n	8000c82 <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 8000c70:	68da      	ldr	r2, [r3, #12]
 8000c72:	07d2      	lsls	r2, r2, #31
 8000c74:	d505      	bpl.n	8000c82 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000c76:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 8000c7a:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000c7c:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 8000c7e:	f000 fcbf 	bl	8001600 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 8000c82:	6823      	ldr	r3, [r4, #0]
 8000c84:	691a      	ldr	r2, [r3, #16]
 8000c86:	0610      	lsls	r0, r2, #24
 8000c88:	d508      	bpl.n	8000c9c <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 8000c8a:	68da      	ldr	r2, [r3, #12]
 8000c8c:	0611      	lsls	r1, r2, #24
 8000c8e:	d505      	bpl.n	8000c9c <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000c90:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 8000c94:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000c96:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 8000c98:	f000 f8bf 	bl	8000e1a <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 8000c9c:	6823      	ldr	r3, [r4, #0]
 8000c9e:	691a      	ldr	r2, [r3, #16]
 8000ca0:	0652      	lsls	r2, r2, #25
 8000ca2:	d508      	bpl.n	8000cb6 <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 8000ca4:	68da      	ldr	r2, [r3, #12]
 8000ca6:	0650      	lsls	r0, r2, #25
 8000ca8:	d505      	bpl.n	8000cb6 <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000caa:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 8000cae:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000cb0:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 8000cb2:	f7ff ff85 	bl	8000bc0 <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 8000cb6:	6823      	ldr	r3, [r4, #0]
 8000cb8:	691a      	ldr	r2, [r3, #16]
 8000cba:	0691      	lsls	r1, r2, #26
 8000cbc:	d522      	bpl.n	8000d04 <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 8000cbe:	68da      	ldr	r2, [r3, #12]
 8000cc0:	0692      	lsls	r2, r2, #26
 8000cc2:	d51f      	bpl.n	8000d04 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000cc4:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 8000cc8:	4620      	mov	r0, r4
    }
  }
}
 8000cca:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000cce:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 8000cd0:	f000 b8a2 	b.w	8000e18 <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8000cd4:	f7ff ff71 	bl	8000bba <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000cd8:	4620      	mov	r0, r4
 8000cda:	f7ff ff70 	bl	8000bbe <HAL_TIM_PWM_PulseFinishedCallback>
 8000cde:	e783      	b.n	8000be8 <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000ce0:	f7ff ff6b 	bl	8000bba <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000ce4:	4620      	mov	r0, r4
 8000ce6:	f7ff ff6a 	bl	8000bbe <HAL_TIM_PWM_PulseFinishedCallback>
 8000cea:	e792      	b.n	8000c12 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000cec:	f7ff ff65 	bl	8000bba <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000cf0:	4620      	mov	r0, r4
 8000cf2:	f7ff ff64 	bl	8000bbe <HAL_TIM_PWM_PulseFinishedCallback>
 8000cf6:	e7a0      	b.n	8000c3a <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000cf8:	f7ff ff5f 	bl	8000bba <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000cfc:	4620      	mov	r0, r4
 8000cfe:	f7ff ff5e 	bl	8000bbe <HAL_TIM_PWM_PulseFinishedCallback>
 8000d02:	e7af      	b.n	8000c64 <HAL_TIM_IRQHandler+0xa2>
 8000d04:	bd10      	pop	{r4, pc}
	...

08000d08 <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000d08:	4a24      	ldr	r2, [pc, #144]	; (8000d9c <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 8000d0a:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000d0c:	4290      	cmp	r0, r2
 8000d0e:	d012      	beq.n	8000d36 <TIM_Base_SetConfig+0x2e>
 8000d10:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8000d14:	4290      	cmp	r0, r2
 8000d16:	d00e      	beq.n	8000d36 <TIM_Base_SetConfig+0x2e>
 8000d18:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000d1c:	d00b      	beq.n	8000d36 <TIM_Base_SetConfig+0x2e>
 8000d1e:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8000d22:	4290      	cmp	r0, r2
 8000d24:	d007      	beq.n	8000d36 <TIM_Base_SetConfig+0x2e>
 8000d26:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000d2a:	4290      	cmp	r0, r2
 8000d2c:	d003      	beq.n	8000d36 <TIM_Base_SetConfig+0x2e>
 8000d2e:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000d32:	4290      	cmp	r0, r2
 8000d34:	d11d      	bne.n	8000d72 <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8000d36:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8000d38:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8000d3c:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 8000d3e:	4a17      	ldr	r2, [pc, #92]	; (8000d9c <TIM_Base_SetConfig+0x94>)
 8000d40:	4290      	cmp	r0, r2
 8000d42:	d012      	beq.n	8000d6a <TIM_Base_SetConfig+0x62>
 8000d44:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8000d48:	4290      	cmp	r0, r2
 8000d4a:	d00e      	beq.n	8000d6a <TIM_Base_SetConfig+0x62>
 8000d4c:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000d50:	d00b      	beq.n	8000d6a <TIM_Base_SetConfig+0x62>
 8000d52:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8000d56:	4290      	cmp	r0, r2
 8000d58:	d007      	beq.n	8000d6a <TIM_Base_SetConfig+0x62>
 8000d5a:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000d5e:	4290      	cmp	r0, r2
 8000d60:	d003      	beq.n	8000d6a <TIM_Base_SetConfig+0x62>
 8000d62:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000d66:	4290      	cmp	r0, r2
 8000d68:	d103      	bne.n	8000d72 <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000d6a:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8000d6c:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000d70:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000d72:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 8000d74:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000d78:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8000d7a:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8000d7c:	688b      	ldr	r3, [r1, #8]
 8000d7e:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 8000d80:	680b      	ldr	r3, [r1, #0]
 8000d82:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8000d84:	4b05      	ldr	r3, [pc, #20]	; (8000d9c <TIM_Base_SetConfig+0x94>)
 8000d86:	4298      	cmp	r0, r3
 8000d88:	d003      	beq.n	8000d92 <TIM_Base_SetConfig+0x8a>
 8000d8a:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 8000d8e:	4298      	cmp	r0, r3
 8000d90:	d101      	bne.n	8000d96 <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 8000d92:	690b      	ldr	r3, [r1, #16]
 8000d94:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 8000d96:	2301      	movs	r3, #1
 8000d98:	6143      	str	r3, [r0, #20]
 8000d9a:	4770      	bx	lr
 8000d9c:	40012c00 	.word	0x40012c00

08000da0 <HAL_TIM_Base_Init>:
{
 8000da0:	b510      	push	{r4, lr}
  if(htim == NULL)
 8000da2:	4604      	mov	r4, r0
 8000da4:	b1a0      	cbz	r0, 8000dd0 <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 8000da6:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8000daa:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8000dae:	b91b      	cbnz	r3, 8000db8 <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 8000db0:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8000db4:	f001 f800 	bl	8001db8 <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 8000db8:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8000dba:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8000dbc:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8000dc0:	1d21      	adds	r1, r4, #4
 8000dc2:	f7ff ffa1 	bl	8000d08 <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 8000dc6:	2301      	movs	r3, #1
  return HAL_OK;
 8000dc8:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 8000dca:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 8000dce:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8000dd0:	2001      	movs	r0, #1
}
 8000dd2:	bd10      	pop	{r4, pc}

08000dd4 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 8000dd4:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 8000dd8:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 8000dda:	2b01      	cmp	r3, #1
 8000ddc:	f04f 0302 	mov.w	r3, #2
 8000de0:	d018      	beq.n	8000e14 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 8000de2:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000de6:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8000de8:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000dea:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8000dec:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000dee:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 8000df2:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8000df4:	685a      	ldr	r2, [r3, #4]
 8000df6:	4322      	orrs	r2, r4
 8000df8:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 8000dfa:	689a      	ldr	r2, [r3, #8]
 8000dfc:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8000e00:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8000e02:	689a      	ldr	r2, [r3, #8]
 8000e04:	430a      	orrs	r2, r1
 8000e06:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 8000e08:	2301      	movs	r3, #1
 8000e0a:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 8000e0e:	2300      	movs	r3, #0
 8000e10:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8000e14:	4618      	mov	r0, r3

  return HAL_OK;
}
 8000e16:	bd10      	pop	{r4, pc}

08000e18 <HAL_TIMEx_CommutationCallback>:
 8000e18:	4770      	bx	lr

08000e1a <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 8000e1a:	4770      	bx	lr

08000e1c <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8000e1c:	6803      	ldr	r3, [r0, #0]
 8000e1e:	68da      	ldr	r2, [r3, #12]
 8000e20:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8000e24:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8000e26:	695a      	ldr	r2, [r3, #20]
 8000e28:	f022 0201 	bic.w	r2, r2, #1
 8000e2c:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8000e2e:	2320      	movs	r3, #32
 8000e30:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8000e34:	4770      	bx	lr
	...

08000e38 <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 8000e38:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8000e3c:	6805      	ldr	r5, [r0, #0]
 8000e3e:	68c2      	ldr	r2, [r0, #12]
 8000e40:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000e42:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8000e44:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8000e48:	4313      	orrs	r3, r2
 8000e4a:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000e4c:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 8000e4e:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000e50:	430b      	orrs	r3, r1
 8000e52:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8000e54:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 8000e58:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8000e5c:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 8000e5e:	4313      	orrs	r3, r2
 8000e60:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 8000e62:	696b      	ldr	r3, [r5, #20]
 8000e64:	6982      	ldr	r2, [r0, #24]
 8000e66:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8000e6a:	4313      	orrs	r3, r2
 8000e6c:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 8000e6e:	4b40      	ldr	r3, [pc, #256]	; (8000f70 <UART_SetConfig+0x138>)
{
 8000e70:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 8000e72:	429d      	cmp	r5, r3
 8000e74:	f04f 0419 	mov.w	r4, #25
 8000e78:	d146      	bne.n	8000f08 <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 8000e7a:	f7ff fe83 	bl	8000b84 <HAL_RCC_GetPCLK2Freq>
 8000e7e:	fb04 f300 	mul.w	r3, r4, r0
 8000e82:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8000e86:	f04f 0864 	mov.w	r8, #100	; 0x64
 8000e8a:	00b6      	lsls	r6, r6, #2
 8000e8c:	fbb3 f3f6 	udiv	r3, r3, r6
 8000e90:	fbb3 f3f8 	udiv	r3, r3, r8
 8000e94:	011e      	lsls	r6, r3, #4
 8000e96:	f7ff fe75 	bl	8000b84 <HAL_RCC_GetPCLK2Freq>
 8000e9a:	4360      	muls	r0, r4
 8000e9c:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8000ea0:	009b      	lsls	r3, r3, #2
 8000ea2:	fbb0 f7f3 	udiv	r7, r0, r3
 8000ea6:	f7ff fe6d 	bl	8000b84 <HAL_RCC_GetPCLK2Freq>
 8000eaa:	4360      	muls	r0, r4
 8000eac:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8000eb0:	009b      	lsls	r3, r3, #2
 8000eb2:	fbb0 f3f3 	udiv	r3, r0, r3
 8000eb6:	fbb3 f3f8 	udiv	r3, r3, r8
 8000eba:	fb08 7313 	mls	r3, r8, r3, r7
 8000ebe:	011b      	lsls	r3, r3, #4
 8000ec0:	3332      	adds	r3, #50	; 0x32
 8000ec2:	fbb3 f3f8 	udiv	r3, r3, r8
 8000ec6:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8000eca:	f7ff fe5b 	bl	8000b84 <HAL_RCC_GetPCLK2Freq>
 8000ece:	4360      	muls	r0, r4
 8000ed0:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8000ed4:	0092      	lsls	r2, r2, #2
 8000ed6:	fbb0 faf2 	udiv	sl, r0, r2
 8000eda:	f7ff fe53 	bl	8000b84 <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 8000ede:	4360      	muls	r0, r4
 8000ee0:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8000ee4:	009b      	lsls	r3, r3, #2
 8000ee6:	fbb0 f3f3 	udiv	r3, r0, r3
 8000eea:	fbb3 f3f8 	udiv	r3, r3, r8
 8000eee:	fb08 a313 	mls	r3, r8, r3, sl
 8000ef2:	011b      	lsls	r3, r3, #4
 8000ef4:	3332      	adds	r3, #50	; 0x32
 8000ef6:	fbb3 f3f8 	udiv	r3, r3, r8
 8000efa:	f003 030f 	and.w	r3, r3, #15
 8000efe:	433b      	orrs	r3, r7
 8000f00:	4433      	add	r3, r6
 8000f02:	60ab      	str	r3, [r5, #8]
 8000f04:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000f08:	f7ff fe2c 	bl	8000b64 <HAL_RCC_GetPCLK1Freq>
 8000f0c:	fb04 f300 	mul.w	r3, r4, r0
 8000f10:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8000f14:	f04f 0864 	mov.w	r8, #100	; 0x64
 8000f18:	00b6      	lsls	r6, r6, #2
 8000f1a:	fbb3 f3f6 	udiv	r3, r3, r6
 8000f1e:	fbb3 f3f8 	udiv	r3, r3, r8
 8000f22:	011e      	lsls	r6, r3, #4
 8000f24:	f7ff fe1e 	bl	8000b64 <HAL_RCC_GetPCLK1Freq>
 8000f28:	4360      	muls	r0, r4
 8000f2a:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8000f2e:	009b      	lsls	r3, r3, #2
 8000f30:	fbb0 f7f3 	udiv	r7, r0, r3
 8000f34:	f7ff fe16 	bl	8000b64 <HAL_RCC_GetPCLK1Freq>
 8000f38:	4360      	muls	r0, r4
 8000f3a:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8000f3e:	009b      	lsls	r3, r3, #2
 8000f40:	fbb0 f3f3 	udiv	r3, r0, r3
 8000f44:	fbb3 f3f8 	udiv	r3, r3, r8
 8000f48:	fb08 7313 	mls	r3, r8, r3, r7
 8000f4c:	011b      	lsls	r3, r3, #4
 8000f4e:	3332      	adds	r3, #50	; 0x32
 8000f50:	fbb3 f3f8 	udiv	r3, r3, r8
 8000f54:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8000f58:	f7ff fe04 	bl	8000b64 <HAL_RCC_GetPCLK1Freq>
 8000f5c:	4360      	muls	r0, r4
 8000f5e:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8000f62:	0092      	lsls	r2, r2, #2
 8000f64:	fbb0 faf2 	udiv	sl, r0, r2
 8000f68:	f7ff fdfc 	bl	8000b64 <HAL_RCC_GetPCLK1Freq>
 8000f6c:	e7b7      	b.n	8000ede <UART_SetConfig+0xa6>
 8000f6e:	bf00      	nop
 8000f70:	40013800 	.word	0x40013800

08000f74 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 8000f74:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8000f76:	4604      	mov	r4, r0
 8000f78:	460e      	mov	r6, r1
 8000f7a:	4617      	mov	r7, r2
 8000f7c:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 8000f7e:	6821      	ldr	r1, [r4, #0]
 8000f80:	680b      	ldr	r3, [r1, #0]
 8000f82:	ea36 0303 	bics.w	r3, r6, r3
 8000f86:	d101      	bne.n	8000f8c <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 8000f88:	2000      	movs	r0, #0
}
 8000f8a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 8000f8c:	1c6b      	adds	r3, r5, #1
 8000f8e:	d0f7      	beq.n	8000f80 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8000f90:	b995      	cbnz	r5, 8000fb8 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8000f92:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 8000f94:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8000f96:	68da      	ldr	r2, [r3, #12]
 8000f98:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 8000f9c:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8000f9e:	695a      	ldr	r2, [r3, #20]
 8000fa0:	f022 0201 	bic.w	r2, r2, #1
 8000fa4:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 8000fa6:	2320      	movs	r3, #32
 8000fa8:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8000fac:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8000fb0:	2300      	movs	r3, #0
 8000fb2:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 8000fb6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8000fb8:	f7ff f976 	bl	80002a8 <HAL_GetTick>
 8000fbc:	1bc0      	subs	r0, r0, r7
 8000fbe:	4285      	cmp	r5, r0
 8000fc0:	d2dd      	bcs.n	8000f7e <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 8000fc2:	e7e6      	b.n	8000f92 <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08000fc4 <HAL_UART_Init>:
{
 8000fc4:	b510      	push	{r4, lr}
  if(huart == NULL)
 8000fc6:	4604      	mov	r4, r0
 8000fc8:	b340      	cbz	r0, 800101c <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 8000fca:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8000fce:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8000fd2:	b91b      	cbnz	r3, 8000fdc <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8000fd4:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8000fd8:	f000 ff02 	bl	8001de0 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8000fdc:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8000fde:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8000fe0:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8000fe4:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 8000fe6:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8000fe8:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8000fec:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8000fee:	f7ff ff23 	bl	8000e38 <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8000ff2:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8000ff4:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8000ff6:	691a      	ldr	r2, [r3, #16]
 8000ff8:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8000ffc:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 8000ffe:	695a      	ldr	r2, [r3, #20]
 8001000:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8001004:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8001006:	68da      	ldr	r2, [r3, #12]
 8001008:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 800100c:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 800100e:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001010:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 8001012:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 8001016:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 800101a:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 800101c:	2001      	movs	r0, #1
}
 800101e:	bd10      	pop	{r4, pc}

08001020 <HAL_UART_Transmit>:
{
 8001020:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8001024:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 8001026:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 800102a:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 800102c:	2b20      	cmp	r3, #32
{
 800102e:	460d      	mov	r5, r1
 8001030:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 8001032:	d14e      	bne.n	80010d2 <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 8001034:	2900      	cmp	r1, #0
 8001036:	d049      	beq.n	80010cc <HAL_UART_Transmit+0xac>
 8001038:	2a00      	cmp	r2, #0
 800103a:	d047      	beq.n	80010cc <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 800103c:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8001040:	2b01      	cmp	r3, #1
 8001042:	d046      	beq.n	80010d2 <HAL_UART_Transmit+0xb2>
 8001044:	2301      	movs	r3, #1
 8001046:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800104a:	2300      	movs	r3, #0
 800104c:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800104e:	2321      	movs	r3, #33	; 0x21
 8001050:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 8001054:	f7ff f928 	bl	80002a8 <HAL_GetTick>
 8001058:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 800105a:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 800105e:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 8001062:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 8001064:	b29b      	uxth	r3, r3
 8001066:	b96b      	cbnz	r3, 8001084 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8001068:	463b      	mov	r3, r7
 800106a:	4632      	mov	r2, r6
 800106c:	2140      	movs	r1, #64	; 0x40
 800106e:	4620      	mov	r0, r4
 8001070:	f7ff ff80 	bl	8000f74 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001074:	b9a8      	cbnz	r0, 80010a2 <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 8001076:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 8001078:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 800107c:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 8001080:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 8001084:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001086:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8001088:	3b01      	subs	r3, #1
 800108a:	b29b      	uxth	r3, r3
 800108c:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800108e:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001090:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001092:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001096:	4620      	mov	r0, r4
 8001098:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800109a:	d10e      	bne.n	80010ba <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800109c:	f7ff ff6a 	bl	8000f74 <UART_WaitOnFlagUntilTimeout.constprop.3>
 80010a0:	b110      	cbz	r0, 80010a8 <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 80010a2:	2003      	movs	r0, #3
 80010a4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 80010a8:	882b      	ldrh	r3, [r5, #0]
 80010aa:	6822      	ldr	r2, [r4, #0]
 80010ac:	f3c3 0308 	ubfx	r3, r3, #0, #9
 80010b0:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 80010b2:	6923      	ldr	r3, [r4, #16]
 80010b4:	b943      	cbnz	r3, 80010c8 <HAL_UART_Transmit+0xa8>
          pData +=2U;
 80010b6:	3502      	adds	r5, #2
 80010b8:	e7d3      	b.n	8001062 <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80010ba:	f7ff ff5b 	bl	8000f74 <UART_WaitOnFlagUntilTimeout.constprop.3>
 80010be:	2800      	cmp	r0, #0
 80010c0:	d1ef      	bne.n	80010a2 <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 80010c2:	6823      	ldr	r3, [r4, #0]
 80010c4:	782a      	ldrb	r2, [r5, #0]
 80010c6:	605a      	str	r2, [r3, #4]
 80010c8:	3501      	adds	r5, #1
 80010ca:	e7ca      	b.n	8001062 <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 80010cc:	2001      	movs	r0, #1
 80010ce:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 80010d2:	2002      	movs	r0, #2
}
 80010d4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

080010d8 <HAL_UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_READY)
 80010d8:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
 80010dc:	2b20      	cmp	r3, #32
 80010de:	d120      	bne.n	8001122 <HAL_UART_Receive_IT+0x4a>
    if((pData == NULL) || (Size == 0U))
 80010e0:	b1e9      	cbz	r1, 800111e <HAL_UART_Receive_IT+0x46>
 80010e2:	b1e2      	cbz	r2, 800111e <HAL_UART_Receive_IT+0x46>
    __HAL_LOCK(huart);
 80010e4:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 80010e8:	2b01      	cmp	r3, #1
 80010ea:	d01a      	beq.n	8001122 <HAL_UART_Receive_IT+0x4a>
    huart->RxXferCount = Size;
 80010ec:	85c2      	strh	r2, [r0, #46]	; 0x2e
    huart->RxXferSize = Size;
 80010ee:	8582      	strh	r2, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80010f0:	2300      	movs	r3, #0
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 80010f2:	2222      	movs	r2, #34	; 0x22
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80010f4:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 80010f6:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 80010fa:	6802      	ldr	r2, [r0, #0]
    huart->pRxBuffPtr = pData;
 80010fc:	6281      	str	r1, [r0, #40]	; 0x28
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 80010fe:	68d1      	ldr	r1, [r2, #12]
    __HAL_UNLOCK(huart);
 8001100:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 8001104:	f441 7180 	orr.w	r1, r1, #256	; 0x100
 8001108:	60d1      	str	r1, [r2, #12]
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 800110a:	6951      	ldr	r1, [r2, #20]
    return HAL_OK;
 800110c:	4618      	mov	r0, r3
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 800110e:	f041 0101 	orr.w	r1, r1, #1
 8001112:	6151      	str	r1, [r2, #20]
    __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
 8001114:	68d1      	ldr	r1, [r2, #12]
 8001116:	f041 0120 	orr.w	r1, r1, #32
 800111a:	60d1      	str	r1, [r2, #12]
    return HAL_OK;
 800111c:	4770      	bx	lr
      return HAL_ERROR;
 800111e:	2001      	movs	r0, #1
 8001120:	4770      	bx	lr
    return HAL_BUSY;
 8001122:	2002      	movs	r0, #2
}
 8001124:	4770      	bx	lr

08001126 <HAL_UART_TxCpltCallback>:
 8001126:	4770      	bx	lr

08001128 <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8001128:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 800112c:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 800112e:	2b22      	cmp	r3, #34	; 0x22
 8001130:	d136      	bne.n	80011a0 <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001132:	6883      	ldr	r3, [r0, #8]
 8001134:	6901      	ldr	r1, [r0, #16]
 8001136:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 800113a:	6802      	ldr	r2, [r0, #0]
 800113c:	6a83      	ldr	r3, [r0, #40]	; 0x28
 800113e:	d123      	bne.n	8001188 <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8001140:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001142:	b9e9      	cbnz	r1, 8001180 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8001144:	f3c2 0208 	ubfx	r2, r2, #0, #9
 8001148:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 800114c:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 800114e:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 8001150:	3c01      	subs	r4, #1
 8001152:	b2a4      	uxth	r4, r4
 8001154:	85c4      	strh	r4, [r0, #46]	; 0x2e
 8001156:	b98c      	cbnz	r4, 800117c <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 8001158:	6803      	ldr	r3, [r0, #0]
 800115a:	68da      	ldr	r2, [r3, #12]
 800115c:	f022 0220 	bic.w	r2, r2, #32
 8001160:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 8001162:	68da      	ldr	r2, [r3, #12]
 8001164:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 8001168:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 800116a:	695a      	ldr	r2, [r3, #20]
 800116c:	f022 0201 	bic.w	r2, r2, #1
 8001170:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 8001172:	2320      	movs	r3, #32
 8001174:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 8001178:	f000 f9c6 	bl	8001508 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 800117c:	2000      	movs	r0, #0
}
 800117e:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8001180:	b2d2      	uxtb	r2, r2
 8001182:	f823 2b01 	strh.w	r2, [r3], #1
 8001186:	e7e1      	b.n	800114c <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001188:	b921      	cbnz	r1, 8001194 <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 800118a:	1c59      	adds	r1, r3, #1
 800118c:	6852      	ldr	r2, [r2, #4]
 800118e:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8001190:	701a      	strb	r2, [r3, #0]
 8001192:	e7dc      	b.n	800114e <UART_Receive_IT+0x26>
 8001194:	6852      	ldr	r2, [r2, #4]
 8001196:	1c59      	adds	r1, r3, #1
 8001198:	6281      	str	r1, [r0, #40]	; 0x28
 800119a:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 800119e:	e7f7      	b.n	8001190 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 80011a0:	2002      	movs	r0, #2
 80011a2:	bd10      	pop	{r4, pc}

080011a4 <HAL_UART_ErrorCallback>:
 80011a4:	4770      	bx	lr
	...

080011a8 <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 80011a8:	6803      	ldr	r3, [r0, #0]
{
 80011aa:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 80011ac:	681a      	ldr	r2, [r3, #0]
{
 80011ae:	4604      	mov	r4, r0
  if(errorflags == RESET)
 80011b0:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 80011b2:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 80011b4:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 80011b6:	d107      	bne.n	80011c8 <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 80011b8:	0696      	lsls	r6, r2, #26
 80011ba:	d55a      	bpl.n	8001272 <HAL_UART_IRQHandler+0xca>
 80011bc:	068d      	lsls	r5, r1, #26
 80011be:	d558      	bpl.n	8001272 <HAL_UART_IRQHandler+0xca>
}
 80011c0:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 80011c4:	f7ff bfb0 	b.w	8001128 <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 80011c8:	f015 0501 	ands.w	r5, r5, #1
 80011cc:	d102      	bne.n	80011d4 <HAL_UART_IRQHandler+0x2c>
 80011ce:	f411 7f90 	tst.w	r1, #288	; 0x120
 80011d2:	d04e      	beq.n	8001272 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 80011d4:	07d3      	lsls	r3, r2, #31
 80011d6:	d505      	bpl.n	80011e4 <HAL_UART_IRQHandler+0x3c>
 80011d8:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 80011da:	bf42      	ittt	mi
 80011dc:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 80011de:	f043 0301 	orrmi.w	r3, r3, #1
 80011e2:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80011e4:	0750      	lsls	r0, r2, #29
 80011e6:	d504      	bpl.n	80011f2 <HAL_UART_IRQHandler+0x4a>
 80011e8:	b11d      	cbz	r5, 80011f2 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 80011ea:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80011ec:	f043 0302 	orr.w	r3, r3, #2
 80011f0:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80011f2:	0793      	lsls	r3, r2, #30
 80011f4:	d504      	bpl.n	8001200 <HAL_UART_IRQHandler+0x58>
 80011f6:	b11d      	cbz	r5, 8001200 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 80011f8:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80011fa:	f043 0304 	orr.w	r3, r3, #4
 80011fe:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001200:	0716      	lsls	r6, r2, #28
 8001202:	d504      	bpl.n	800120e <HAL_UART_IRQHandler+0x66>
 8001204:	b11d      	cbz	r5, 800120e <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 8001206:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001208:	f043 0308 	orr.w	r3, r3, #8
 800120c:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 800120e:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001210:	2b00      	cmp	r3, #0
 8001212:	d066      	beq.n	80012e2 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001214:	0695      	lsls	r5, r2, #26
 8001216:	d504      	bpl.n	8001222 <HAL_UART_IRQHandler+0x7a>
 8001218:	0688      	lsls	r0, r1, #26
 800121a:	d502      	bpl.n	8001222 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 800121c:	4620      	mov	r0, r4
 800121e:	f7ff ff83 	bl	8001128 <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8001222:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 8001224:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8001226:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 8001228:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 800122a:	0711      	lsls	r1, r2, #28
 800122c:	d402      	bmi.n	8001234 <HAL_UART_IRQHandler+0x8c>
 800122e:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 8001232:	d01a      	beq.n	800126a <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8001234:	f7ff fdf2 	bl	8000e1c <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 8001238:	6823      	ldr	r3, [r4, #0]
 800123a:	695a      	ldr	r2, [r3, #20]
 800123c:	0652      	lsls	r2, r2, #25
 800123e:	d510      	bpl.n	8001262 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8001240:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8001242:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8001244:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8001248:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 800124a:	b150      	cbz	r0, 8001262 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 800124c:	4b25      	ldr	r3, [pc, #148]	; (80012e4 <HAL_UART_IRQHandler+0x13c>)
 800124e:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 8001250:	f7ff f8aa 	bl	80003a8 <HAL_DMA_Abort_IT>
 8001254:	2800      	cmp	r0, #0
 8001256:	d044      	beq.n	80012e2 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8001258:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 800125a:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800125e:	6b43      	ldr	r3, [r0, #52]	; 0x34
 8001260:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 8001262:	4620      	mov	r0, r4
 8001264:	f7ff ff9e 	bl	80011a4 <HAL_UART_ErrorCallback>
 8001268:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 800126a:	f7ff ff9b 	bl	80011a4 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 800126e:	63e5      	str	r5, [r4, #60]	; 0x3c
 8001270:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 8001272:	0616      	lsls	r6, r2, #24
 8001274:	d527      	bpl.n	80012c6 <HAL_UART_IRQHandler+0x11e>
 8001276:	060d      	lsls	r5, r1, #24
 8001278:	d525      	bpl.n	80012c6 <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 800127a:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 800127e:	2a21      	cmp	r2, #33	; 0x21
 8001280:	d12f      	bne.n	80012e2 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001282:	68a2      	ldr	r2, [r4, #8]
 8001284:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8001288:	6a22      	ldr	r2, [r4, #32]
 800128a:	d117      	bne.n	80012bc <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 800128c:	8811      	ldrh	r1, [r2, #0]
 800128e:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8001292:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001294:	6921      	ldr	r1, [r4, #16]
 8001296:	b979      	cbnz	r1, 80012b8 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8001298:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 800129a:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 800129c:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 800129e:	3a01      	subs	r2, #1
 80012a0:	b292      	uxth	r2, r2
 80012a2:	84e2      	strh	r2, [r4, #38]	; 0x26
 80012a4:	b9ea      	cbnz	r2, 80012e2 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 80012a6:	68da      	ldr	r2, [r3, #12]
 80012a8:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 80012ac:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 80012ae:	68da      	ldr	r2, [r3, #12]
 80012b0:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 80012b4:	60da      	str	r2, [r3, #12]
 80012b6:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 80012b8:	3201      	adds	r2, #1
 80012ba:	e7ee      	b.n	800129a <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 80012bc:	1c51      	adds	r1, r2, #1
 80012be:	6221      	str	r1, [r4, #32]
 80012c0:	7812      	ldrb	r2, [r2, #0]
 80012c2:	605a      	str	r2, [r3, #4]
 80012c4:	e7ea      	b.n	800129c <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 80012c6:	0650      	lsls	r0, r2, #25
 80012c8:	d50b      	bpl.n	80012e2 <HAL_UART_IRQHandler+0x13a>
 80012ca:	064a      	lsls	r2, r1, #25
 80012cc:	d509      	bpl.n	80012e2 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 80012ce:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 80012d0:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 80012d2:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 80012d6:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 80012d8:	2320      	movs	r3, #32
 80012da:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 80012de:	f7ff ff22 	bl	8001126 <HAL_UART_TxCpltCallback>
 80012e2:	bd70      	pop	{r4, r5, r6, pc}
 80012e4:	080012e9 	.word	0x080012e9

080012e8 <UART_DMAAbortOnError>:
{
 80012e8:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 80012ea:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 80012ec:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 80012ee:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 80012f0:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 80012f2:	f7ff ff57 	bl	80011a4 <HAL_UART_ErrorCallback>
 80012f6:	bd08      	pop	{r3, pc}

080012f8 <RGB_Response_Func>:
#if 0
for(uint8_t i = 0; i < 10; i++){
            printf("%02x ",data[i]);
        }
#endif
    switch(type){
 80012f8:	7843      	ldrb	r3, [r0, #1]
 80012fa:	3b01      	subs	r3, #1
 80012fc:	2b05      	cmp	r3, #5
 80012fe:	d810      	bhi.n	8001322 <RGB_Response_Func+0x2a>
 8001300:	e8df f003 	tbb	[pc, r3]
 8001304:	0f060306 	.word	0x0f060306
 8001308:	0b09      	.short	0x0b09
        case RGB_Status_Data_Request: 
            Uart1_Data_Send(data,RGB_SensorDataRequest_Length);
            break;
        case RGB_ControllerID_SET: 
            Uart3_Data_Send(data,RGB_ControllerID_SET_Length);
 800130a:	210a      	movs	r1, #10
            break;        
        case RGB_Status_Data_Response:
            Uart3_Data_Send(data,RGB_SensorDataResponse_Length);
            break;
        case RGB_ControllerLimitSet:
            Uart3_Data_Send(data,data[blucell_length] + 3);
 800130c:	f000 b98c 	b.w	8001628 <Uart3_Data_Send>
            Uart1_Data_Send(data,RGB_SensorIDAutoSetRequest_Length);
 8001310:	2107      	movs	r1, #7
 8001312:	f000 b991 	b.w	8001638 <Uart1_Data_Send>
            Uart3_Data_Send(data,RGB_SensorDataResponse_Length);
 8001316:	210f      	movs	r1, #15
 8001318:	e7f8      	b.n	800130c <RGB_Response_Func+0x14>
            Uart3_Data_Send(data,data[blucell_length] + 3);
 800131a:	7881      	ldrb	r1, [r0, #2]
 800131c:	3103      	adds	r1, #3
 800131e:	b2c9      	uxtb	r1, r1
 8001320:	e7f4      	b.n	800130c <RGB_Response_Func+0x14>
 8001322:	4770      	bx	lr

08001324 <RGB_Alarm_Check>:


uint16_t Sensor_red[9] = {0,};
uint16_t Sensor_green[9] = {0,};
uint16_t Sensor_blue[9] = {0,};    
void RGB_Alarm_Check(uint8_t* data){
 8001324:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
   
    Sensor_red[data[blucell_srcid]] = ((data[blucell_red_H + 2] << 8)| data[blucell_red_L + 2]);
 8001328:	7981      	ldrb	r1, [r0, #6]
 800132a:	79c3      	ldrb	r3, [r0, #7]
 800132c:	78c2      	ldrb	r2, [r0, #3]
 800132e:	4d25      	ldr	r5, [pc, #148]	; (80013c4 <RGB_Alarm_Check+0xa0>)
 8001330:	ea43 2301 	orr.w	r3, r3, r1, lsl #8
 8001334:	f825 3012 	strh.w	r3, [r5, r2, lsl #1]
    Sensor_green[data[blucell_srcid]] = ((data[blucell_green_H + 2] << 8)| data[blucell_green_L + 2]);
 8001338:	7a01      	ldrb	r1, [r0, #8]
 800133a:	7a43      	ldrb	r3, [r0, #9]
 800133c:	78c2      	ldrb	r2, [r0, #3]
 800133e:	4c22      	ldr	r4, [pc, #136]	; (80013c8 <RGB_Alarm_Check+0xa4>)
 8001340:	ea43 2301 	orr.w	r3, r3, r1, lsl #8
 8001344:	f824 3012 	strh.w	r3, [r4, r2, lsl #1]
    Sensor_blue[data[blucell_srcid]] = ((data[blucell_blue_H + 2] << 8)| data[blucell_blue_L + 2]);  
 8001348:	7a86      	ldrb	r6, [r0, #10]
 800134a:	7ac3      	ldrb	r3, [r0, #11]
 800134c:	78c2      	ldrb	r2, [r0, #3]
 800134e:	491f      	ldr	r1, [pc, #124]	; (80013cc <RGB_Alarm_Check+0xa8>)
 8001350:	ea43 2306 	orr.w	r3, r3, r6, lsl #8
 8001354:	f821 3012 	strh.w	r3, [r1, r2, lsl #1]

#endif     

#if 1 // PYJ.2019.03.18_BEGIN -- 
    uint8_t LED_Alarm = 0;
    for(uint8_t i = 0; i < (SensorID_Cnt); i++){
 8001358:	2200      	movs	r2, #0
 800135a:	4b1d      	ldr	r3, [pc, #116]	; (80013d0 <RGB_Alarm_Check+0xac>)
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 800135c:	4e1d      	ldr	r6, [pc, #116]	; (80013d4 <RGB_Alarm_Check+0xb0>)
    for(uint8_t i = 0; i < (SensorID_Cnt); i++){
 800135e:	7818      	ldrb	r0, [r3, #0]
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 8001360:	4f1d      	ldr	r7, [pc, #116]	; (80013d8 <RGB_Alarm_Check+0xb4>)
            || RGB_SensorGreenLimit_Buf[SensorID_buf[i]]  >= Sensor_green[SensorID_buf[i]]
 8001362:	f8df e080 	ldr.w	lr, [pc, #128]	; 80013e4 <RGB_Alarm_Check+0xc0>
            || RGB_SensorBlueLimit_Buf[SensorID_buf[i]]  >= Sensor_blue[SensorID_buf[i]]) {
 8001366:	f8df c080 	ldr.w	ip, [pc, #128]	; 80013e8 <RGB_Alarm_Check+0xc4>
    for(uint8_t i = 0; i < (SensorID_Cnt); i++){
 800136a:	b2d3      	uxtb	r3, r2
 800136c:	4283      	cmp	r3, r0
 800136e:	d307      	bcc.n	8001380 <RGB_Alarm_Check+0x5c>
    if(LED_Alarm == 1){
        HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET);
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET);       
//        printf("LED : 1\r\n");
    }else{
        HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET);
 8001370:	2200      	movs	r2, #0
 8001372:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8001376:	4819      	ldr	r0, [pc, #100]	; (80013dc <RGB_Alarm_Check+0xb8>)
 8001378:	f7ff f970 	bl	800065c <HAL_GPIO_WritePin>
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_SET);   
 800137c:	2201      	movs	r2, #1
 800137e:	e01a      	b.n	80013b6 <RGB_Alarm_Check+0x92>
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 8001380:	5d93      	ldrb	r3, [r2, r6]
 8001382:	f837 9013 	ldrh.w	r9, [r7, r3, lsl #1]
 8001386:	f835 8013 	ldrh.w	r8, [r5, r3, lsl #1]
 800138a:	45c1      	cmp	r9, r8
 800138c:	d20c      	bcs.n	80013a8 <RGB_Alarm_Check+0x84>
            || RGB_SensorGreenLimit_Buf[SensorID_buf[i]]  >= Sensor_green[SensorID_buf[i]]
 800138e:	f83e 9013 	ldrh.w	r9, [lr, r3, lsl #1]
 8001392:	f834 8013 	ldrh.w	r8, [r4, r3, lsl #1]
 8001396:	45c1      	cmp	r9, r8
 8001398:	d206      	bcs.n	80013a8 <RGB_Alarm_Check+0x84>
            || RGB_SensorBlueLimit_Buf[SensorID_buf[i]]  >= Sensor_blue[SensorID_buf[i]]) {
 800139a:	f83c 8013 	ldrh.w	r8, [ip, r3, lsl #1]
 800139e:	f831 3013 	ldrh.w	r3, [r1, r3, lsl #1]
 80013a2:	3201      	adds	r2, #1
 80013a4:	4598      	cmp	r8, r3
 80013a6:	d3e0      	bcc.n	800136a <RGB_Alarm_Check+0x46>
        HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET);
 80013a8:	2201      	movs	r2, #1
 80013aa:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 80013ae:	480b      	ldr	r0, [pc, #44]	; (80013dc <RGB_Alarm_Check+0xb8>)
 80013b0:	f7ff f954 	bl	800065c <HAL_GPIO_WritePin>
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET);       
 80013b4:	2200      	movs	r2, #0
        printf("Sensor_blue  %04x\r\n",Sensor_blue);        
#endif // PYJ.2019.03.18_END -- 
    }
#endif // PYJ.2019.03.18_END -- 

}
 80013b6:	e8bd 43f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
        HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_SET);   
 80013ba:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80013be:	4808      	ldr	r0, [pc, #32]	; (80013e0 <RGB_Alarm_Check+0xbc>)
 80013c0:	f7ff b94c 	b.w	800065c <HAL_GPIO_WritePin>
 80013c4:	200000f4 	.word	0x200000f4
 80013c8:	200000e2 	.word	0x200000e2
 80013cc:	200000d0 	.word	0x200000d0
 80013d0:	200000c6 	.word	0x200000c6
 80013d4:	200000c7 	.word	0x200000c7
 80013d8:	200000b4 	.word	0x200000b4
 80013dc:	40010c00 	.word	0x40010c00
 80013e0:	40010800 	.word	0x40010800
 80013e4:	200000a2 	.word	0x200000a2
 80013e8:	20000090 	.word	0x20000090

080013ec <RGB_Controller_Func>:
void RGB_Controller_Func(uint8_t* data){
 80013ec:	b530      	push	{r4, r5, lr}
	RGB_CMD_T type = data[blucell_type];
 80013ee:	7845      	ldrb	r5, [r0, #1]
void RGB_Controller_Func(uint8_t* data){
 80013f0:	b09b      	sub	sp, #108	; 0x6c
 80013f2:	4604      	mov	r4, r0
    uint8_t Result_buf[100] = {0,};
 80013f4:	2264      	movs	r2, #100	; 0x64
 80013f6:	2100      	movs	r1, #0
 80013f8:	a801      	add	r0, sp, #4
 80013fa:	f000 fe1e 	bl	800203a <memset>
    switch(type){
 80013fe:	1e6b      	subs	r3, r5, #1
 8001400:	2b05      	cmp	r3, #5
 8001402:	d811      	bhi.n	8001428 <RGB_Controller_Func+0x3c>
 8001404:	e8df f003 	tbb	[pc, r3]
 8001408:	33211503 	.word	0x33211503
 800140c:	4c3a      	.short	0x4c3a
        case RGB_Status_Data_Request:           
//             printf("=====RGB_Status_Data_Request=====\r\n");
            data[5]   = STH30_CreateCrc(&data[blucell_type],data[blucell_length]);
 800140e:	78a1      	ldrb	r1, [r4, #2]
 8001410:	1c60      	adds	r0, r4, #1
 8001412:	f000 fc77 	bl	8001d04 <STH30_CreateCrc>
 8001416:	7160      	strb	r0, [r4, #5]
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],RGB_SensorDataRequest_Length);
 8001418:	88a2      	ldrh	r2, [r4, #4]
 800141a:	6820      	ldr	r0, [r4, #0]
 800141c:	79a3      	ldrb	r3, [r4, #6]
 800141e:	9001      	str	r0, [sp, #4]
 8001420:	f8ad 2008 	strh.w	r2, [sp, #8]
 8001424:	f88d 300a 	strb.w	r3, [sp, #10]
            break;
        default:
        break;
    }
  
    RGB_Response_Func(&Result_buf[blucell_stx]);
 8001428:	a801      	add	r0, sp, #4
 800142a:	f7ff ff65 	bl	80012f8 <RGB_Response_Func>
    return;
}
 800142e:	b01b      	add	sp, #108	; 0x6c
 8001430:	bd30      	pop	{r4, r5, pc}
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 8001432:	78a2      	ldrb	r2, [r4, #2]
 8001434:	4621      	mov	r1, r4
 8001436:	3203      	adds	r2, #3
 8001438:	a801      	add	r0, sp, #4
 800143a:	f000 fdf3 	bl	8002024 <memcpy>
            MyControllerID = Result_buf[7] = data[7];//�긽��諛⑹쓽 DST ID �뒗 �굹�쓽 ID �씠�떎.
 800143e:	79e3      	ldrb	r3, [r4, #7]
 8001440:	4a2b      	ldr	r2, [pc, #172]	; (80014f0 <RGB_Controller_Func+0x104>)
 8001442:	f88d 300b 	strb.w	r3, [sp, #11]
            SensorID_Cnt++;
 8001446:	7013      	strb	r3, [r2, #0]
            break;
 8001448:	e7ee      	b.n	8001428 <RGB_Controller_Func+0x3c>
            RGB_SensorIDAutoSet(1);
 800144a:	2001      	movs	r0, #1
 800144c:	f000 f8e6 	bl	800161c <RGB_SensorIDAutoSet>
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 8001450:	78a2      	ldrb	r2, [r4, #2]
 8001452:	4621      	mov	r1, r4
 8001454:	3203      	adds	r2, #3
 8001456:	a801      	add	r0, sp, #4
 8001458:	f000 fde4 	bl	8002024 <memcpy>
            Result_buf[5]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 800145c:	f89d 1006 	ldrb.w	r1, [sp, #6]
 8001460:	f10d 0005 	add.w	r0, sp, #5
 8001464:	f000 fc4e 	bl	8001d04 <STH30_CreateCrc>
 8001468:	f88d 0009 	strb.w	r0, [sp, #9]
            break;
 800146c:	e7dc      	b.n	8001428 <RGB_Controller_Func+0x3c>
            SensorID_buf[SensorID_Cnt] = data[blucell_length + 1];
 800146e:	4a21      	ldr	r2, [pc, #132]	; (80014f4 <RGB_Controller_Func+0x108>)
 8001470:	78e0      	ldrb	r0, [r4, #3]
 8001472:	7813      	ldrb	r3, [r2, #0]
 8001474:	4920      	ldr	r1, [pc, #128]	; (80014f8 <RGB_Controller_Func+0x10c>)
 8001476:	54c8      	strb	r0, [r1, r3]
            SensorID_Cnt++;
 8001478:	3301      	adds	r3, #1
 800147a:	e7e4      	b.n	8001446 <RGB_Controller_Func+0x5a>
             memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 800147c:	78a2      	ldrb	r2, [r4, #2]
 800147e:	4621      	mov	r1, r4
 8001480:	3203      	adds	r2, #3
 8001482:	a801      	add	r0, sp, #4
 8001484:	f000 fdce 	bl	8002024 <memcpy>
             Result_buf[5]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 8001488:	f89d 1006 	ldrb.w	r1, [sp, #6]
 800148c:	f10d 0005 	add.w	r0, sp, #5
 8001490:	f000 fc38 	bl	8001d04 <STH30_CreateCrc>
 8001494:	f88d 0009 	strb.w	r0, [sp, #9]
            RGB_Alarm_Check(&data[blucell_stx]);
 8001498:	4620      	mov	r0, r4
 800149a:	f7ff ff43 	bl	8001324 <RGB_Alarm_Check>
            break;
 800149e:	e7c3      	b.n	8001428 <RGB_Controller_Func+0x3c>
            memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3);
 80014a0:	78a2      	ldrb	r2, [r4, #2]
 80014a2:	4621      	mov	r1, r4
 80014a4:	3203      	adds	r2, #3
 80014a6:	a801      	add	r0, sp, #4
 80014a8:	f000 fdbc 	bl	8002024 <memcpy>
            RGB_SensorRedLimit_Buf[data[blucell_dstid]]   = ((data[blucell_red_H] << 8) |data[blucell_red_L]);
 80014ac:	7922      	ldrb	r2, [r4, #4]
 80014ae:	7963      	ldrb	r3, [r4, #5]
 80014b0:	7aa1      	ldrb	r1, [r4, #10]
 80014b2:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 80014b6:	4a11      	ldr	r2, [pc, #68]	; (80014fc <RGB_Controller_Func+0x110>)
            Result_buf[blucell_crc]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 80014b8:	f10d 0005 	add.w	r0, sp, #5
            RGB_SensorRedLimit_Buf[data[blucell_dstid]]   = ((data[blucell_red_H] << 8) |data[blucell_red_L]);
 80014bc:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            RGB_SensorGreenLimit_Buf[data[blucell_dstid]] = ((data[blucell_green_H] << 8) |data[blucell_green_L]);
 80014c0:	79a2      	ldrb	r2, [r4, #6]
 80014c2:	79e3      	ldrb	r3, [r4, #7]
 80014c4:	7aa1      	ldrb	r1, [r4, #10]
 80014c6:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 80014ca:	4a0d      	ldr	r2, [pc, #52]	; (8001500 <RGB_Controller_Func+0x114>)
 80014cc:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            RGB_SensorBlueLimit_Buf[data[blucell_dstid]]  = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]);        
 80014d0:	7a22      	ldrb	r2, [r4, #8]
 80014d2:	7a63      	ldrb	r3, [r4, #9]
 80014d4:	7aa1      	ldrb	r1, [r4, #10]
 80014d6:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 80014da:	4a0a      	ldr	r2, [pc, #40]	; (8001504 <RGB_Controller_Func+0x118>)
 80014dc:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            Result_buf[blucell_crc]   = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]);
 80014e0:	f89d 1006 	ldrb.w	r1, [sp, #6]
 80014e4:	f000 fc0e 	bl	8001d04 <STH30_CreateCrc>
 80014e8:	f88d 000f 	strb.w	r0, [sp, #15]
            break;
 80014ec:	e79c      	b.n	8001428 <RGB_Controller_Func+0x3c>
 80014ee:	bf00      	nop
 80014f0:	2000010c 	.word	0x2000010c
 80014f4:	200000c6 	.word	0x200000c6
 80014f8:	200000c7 	.word	0x200000c7
 80014fc:	200000b4 	.word	0x200000b4
 8001500:	200000a2 	.word	0x200000a2
 8001504:	20000090 	.word	0x20000090

08001508 <HAL_UART_RxCpltCallback>:



void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
    if(huart->Instance == USART1)//RGB Comunication 
 8001508:	6802      	ldr	r2, [r0, #0]
 800150a:	4b2e      	ldr	r3, [pc, #184]	; (80015c4 <HAL_UART_RxCpltCallback+0xbc>)
{
 800150c:	b510      	push	{r4, lr}
    if(huart->Instance == USART1)//RGB Comunication 
 800150e:	429a      	cmp	r2, r3
{
 8001510:	4604      	mov	r4, r0
    if(huart->Instance == USART1)//RGB Comunication 
 8001512:	d11a      	bne.n	800154a <HAL_UART_RxCpltCallback+0x42>
    {
        buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR;
 8001514:	4a2c      	ldr	r2, [pc, #176]	; (80015c8 <HAL_UART_RxCpltCallback+0xc0>)
 8001516:	492d      	ldr	r1, [pc, #180]	; (80015cc <HAL_UART_RxCpltCallback+0xc4>)
 8001518:	7813      	ldrb	r3, [r2, #0]
 800151a:	7808      	ldrb	r0, [r1, #0]
 800151c:	492c      	ldr	r1, [pc, #176]	; (80015d0 <HAL_UART_RxCpltCallback+0xc8>)
//        printf("data %02x \r\n",rx1_data[0]);
        if(buf[count_in1++] == 0xEB){
 800151e:	28eb      	cmp	r0, #235	; 0xeb
        buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR;
 8001520:	54c8      	strb	r0, [r1, r3]
        if(buf[count_in1++] == 0xEB){
 8001522:	f103 0301 	add.w	r3, r3, #1
 8001526:	b2db      	uxtb	r3, r3
 8001528:	7013      	strb	r3, [r2, #0]
 800152a:	d109      	bne.n	8001540 <HAL_UART_RxCpltCallback+0x38>
            if(buf[blucell_length] == (count_in1 - 3))
 800152c:	7889      	ldrb	r1, [r1, #2]
 800152e:	3b03      	subs	r3, #3
 8001530:	4299      	cmp	r1, r3
        
    }
}

void UartDataRecvSet(uint8_t val){
    UartDataisReved = val;
 8001532:	bf0b      	itete	eq
 8001534:	2201      	moveq	r2, #1
                count_in1 = 0;
 8001536:	2300      	movne	r3, #0
    UartDataisReved = val;
 8001538:	4b26      	ldreq	r3, [pc, #152]	; (80015d4 <HAL_UART_RxCpltCallback+0xcc>)
                count_in1 = 0;
 800153a:	7013      	strbne	r3, [r2, #0]
    UartDataisReved = val;
 800153c:	bf08      	it	eq
 800153e:	701a      	strbeq	r2, [r3, #0]
        HAL_UART_Receive_IT(&huart1,&rx1_data[0],1);
 8001540:	2201      	movs	r2, #1
 8001542:	4922      	ldr	r1, [pc, #136]	; (80015cc <HAL_UART_RxCpltCallback+0xc4>)
 8001544:	4824      	ldr	r0, [pc, #144]	; (80015d8 <HAL_UART_RxCpltCallback+0xd0>)
 8001546:	f7ff fdc7 	bl	80010d8 <HAL_UART_Receive_IT>
    if(huart->Instance == USART2) // Lora?? ?†µ?‹ ?•˜?Š” ?�¬?Š¸
 800154a:	6822      	ldr	r2, [r4, #0]
 800154c:	4b23      	ldr	r3, [pc, #140]	; (80015dc <HAL_UART_RxCpltCallback+0xd4>)
 800154e:	429a      	cmp	r2, r3
 8001550:	d117      	bne.n	8001582 <HAL_UART_RxCpltCallback+0x7a>
        buf[count_in2] = rx2_data[0];//(uint8_t)USART2->DR;
 8001552:	4823      	ldr	r0, [pc, #140]	; (80015e0 <HAL_UART_RxCpltCallback+0xd8>)
 8001554:	4b23      	ldr	r3, [pc, #140]	; (80015e4 <HAL_UART_RxCpltCallback+0xdc>)
 8001556:	7801      	ldrb	r1, [r0, #0]
 8001558:	781a      	ldrb	r2, [r3, #0]
 800155a:	4b1d      	ldr	r3, [pc, #116]	; (80015d0 <HAL_UART_RxCpltCallback+0xc8>)
        if(buf[count_in2++] == 0xEB){
 800155c:	2aeb      	cmp	r2, #235	; 0xeb
        buf[count_in2] = rx2_data[0];//(uint8_t)USART2->DR;
 800155e:	545a      	strb	r2, [r3, r1]
        if(buf[count_in2++] == 0xEB){
 8001560:	f101 0101 	add.w	r1, r1, #1
 8001564:	b2c9      	uxtb	r1, r1
 8001566:	7001      	strb	r1, [r0, #0]
 8001568:	d106      	bne.n	8001578 <HAL_UART_RxCpltCallback+0x70>
            if(buf[blucell_length] == (count_in2 - 3))
 800156a:	789a      	ldrb	r2, [r3, #2]
 800156c:	1ecb      	subs	r3, r1, #3
 800156e:	429a      	cmp	r2, r3
 8001570:	d122      	bne.n	80015b8 <HAL_UART_RxCpltCallback+0xb0>
    UartDataisReved = val;
 8001572:	2202      	movs	r2, #2
 8001574:	4b17      	ldr	r3, [pc, #92]	; (80015d4 <HAL_UART_RxCpltCallback+0xcc>)
 8001576:	701a      	strb	r2, [r3, #0]
        HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
 8001578:	2201      	movs	r2, #1
 800157a:	491a      	ldr	r1, [pc, #104]	; (80015e4 <HAL_UART_RxCpltCallback+0xdc>)
 800157c:	481a      	ldr	r0, [pc, #104]	; (80015e8 <HAL_UART_RxCpltCallback+0xe0>)
 800157e:	f7ff fdab 	bl	80010d8 <HAL_UART_Receive_IT>
    if(huart->Instance == USART3) //GUI ?? ?†µ?‹ ?•˜?Š” Port
 8001582:	6822      	ldr	r2, [r4, #0]
 8001584:	4b19      	ldr	r3, [pc, #100]	; (80015ec <HAL_UART_RxCpltCallback+0xe4>)
 8001586:	429a      	cmp	r2, r3
 8001588:	d11b      	bne.n	80015c2 <HAL_UART_RxCpltCallback+0xba>
        buf[count_in3] = rx3_data[0];//(uint8_t)USART2->DR;
 800158a:	4a19      	ldr	r2, [pc, #100]	; (80015f0 <HAL_UART_RxCpltCallback+0xe8>)
 800158c:	4919      	ldr	r1, [pc, #100]	; (80015f4 <HAL_UART_RxCpltCallback+0xec>)
 800158e:	7812      	ldrb	r2, [r2, #0]
 8001590:	780b      	ldrb	r3, [r1, #0]
 8001592:	480f      	ldr	r0, [pc, #60]	; (80015d0 <HAL_UART_RxCpltCallback+0xc8>)
        if(buf[count_in3++] == 0xEB)UartDataRecvSet(3);
 8001594:	2aeb      	cmp	r2, #235	; 0xeb
        buf[count_in3] = rx3_data[0];//(uint8_t)USART2->DR;
 8001596:	54c2      	strb	r2, [r0, r3]
    UartDataisReved = val;
 8001598:	bf08      	it	eq
 800159a:	2203      	moveq	r2, #3
        if(buf[count_in3++] == 0xEB)UartDataRecvSet(3);
 800159c:	f103 0301 	add.w	r3, r3, #1
 80015a0:	700b      	strb	r3, [r1, #0]
    UartDataisReved = val;
 80015a2:	bf08      	it	eq
 80015a4:	4b0b      	ldreq	r3, [pc, #44]	; (80015d4 <HAL_UART_RxCpltCallback+0xcc>)
        HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
 80015a6:	4912      	ldr	r1, [pc, #72]	; (80015f0 <HAL_UART_RxCpltCallback+0xe8>)
    UartDataisReved = val;
 80015a8:	bf08      	it	eq
 80015aa:	701a      	strbeq	r2, [r3, #0]
        HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
 80015ac:	4812      	ldr	r0, [pc, #72]	; (80015f8 <HAL_UART_RxCpltCallback+0xf0>)
 80015ae:	2201      	movs	r2, #1
}
 80015b0:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
        HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
 80015b4:	f7ff bd90 	b.w	80010d8 <HAL_UART_Receive_IT>
                printf("UART 2 %d",((count_in2 -1) - 3));
 80015b8:	3904      	subs	r1, #4
 80015ba:	4810      	ldr	r0, [pc, #64]	; (80015fc <HAL_UART_RxCpltCallback+0xf4>)
 80015bc:	f000 fd46 	bl	800204c <iprintf>
 80015c0:	e7da      	b.n	8001578 <HAL_UART_RxCpltCallback+0x70>
 80015c2:	bd10      	pop	{r4, pc}
 80015c4:	40013800 	.word	0x40013800
 80015c8:	20000172 	.word	0x20000172
 80015cc:	20000274 	.word	0x20000274
 80015d0:	2000010e 	.word	0x2000010e
 80015d4:	20000188 	.word	0x20000188
 80015d8:	200001d0 	.word	0x200001d0
 80015dc:	40004400 	.word	0x40004400
 80015e0:	20000173 	.word	0x20000173
 80015e4:	200001cd 	.word	0x200001cd
 80015e8:	200002b8 	.word	0x200002b8
 80015ec:	40004800 	.word	0x40004800
 80015f0:	200001cc 	.word	0x200001cc
 80015f4:	20000174 	.word	0x20000174
 80015f8:	2000018c 	.word	0x2000018c
 80015fc:	0800312c 	.word	0x0800312c

08001600 <HAL_TIM_PeriodElapsedCallback>:
    if(htim->Instance == TIM6){
 8001600:	6802      	ldr	r2, [r0, #0]
 8001602:	4b04      	ldr	r3, [pc, #16]	; (8001614 <HAL_TIM_PeriodElapsedCallback+0x14>)
 8001604:	429a      	cmp	r2, r3
        LedTimerCnt++;
 8001606:	bf01      	itttt	eq
 8001608:	4a03      	ldreq	r2, [pc, #12]	; (8001618 <HAL_TIM_PeriodElapsedCallback+0x18>)
 800160a:	6813      	ldreq	r3, [r2, #0]
 800160c:	3301      	addeq	r3, #1
 800160e:	6013      	streq	r3, [r2, #0]
 8001610:	4770      	bx	lr
 8001612:	bf00      	nop
 8001614:	40001000 	.word	0x40001000
 8001618:	20000108 	.word	0x20000108

0800161c <RGB_SensorIDAutoSet>:
}
uint8_t UartDataRecvGet(void){
    return UartDataisReved;
}
void RGB_SensorIDAutoSet(uint8_t set){
    RGB_SensorIDAutoset = set;
 800161c:	4b01      	ldr	r3, [pc, #4]	; (8001624 <RGB_SensorIDAutoSet+0x8>)
 800161e:	7018      	strb	r0, [r3, #0]
 8001620:	4770      	bx	lr
 8001622:	bf00      	nop
 8001624:	2000010d 	.word	0x2000010d

08001628 <Uart3_Data_Send>:
uint8_t RGB_SensorIDAutoGet(void){
    return RGB_SensorIDAutoset;
}

void Uart3_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart3, data,size, 10); 
 8001628:	460a      	mov	r2, r1
 800162a:	230a      	movs	r3, #10
 800162c:	4601      	mov	r1, r0
 800162e:	4801      	ldr	r0, [pc, #4]	; (8001634 <Uart3_Data_Send+0xc>)
 8001630:	f7ff bcf6 	b.w	8001020 <HAL_UART_Transmit>
 8001634:	2000018c 	.word	0x2000018c

08001638 <Uart1_Data_Send>:
}
void Uart2_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart2, data,size, 10); 
}
void Uart1_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart1, data,size, 10); 
 8001638:	460a      	mov	r2, r1
 800163a:	230a      	movs	r3, #10
 800163c:	4601      	mov	r1, r0
 800163e:	4801      	ldr	r0, [pc, #4]	; (8001644 <Uart1_Data_Send+0xc>)
 8001640:	f7ff bcee 	b.w	8001020 <HAL_UART_Transmit>
 8001644:	200001d0 	.word	0x200001d0

08001648 <_write>:
}

int _write (int file, uint8_t *ptr, uint16_t len) 
{
 8001648:	b510      	push	{r4, lr}
 800164a:	4614      	mov	r4, r2
    HAL_UART_Transmit (&huart3, ptr, len, 10); 
 800164c:	230a      	movs	r3, #10
 800164e:	4802      	ldr	r0, [pc, #8]	; (8001658 <_write+0x10>)
 8001650:	f7ff fce6 	bl	8001020 <HAL_UART_Transmit>
    return len;
}
 8001654:	4620      	mov	r0, r4
 8001656:	bd10      	pop	{r4, pc}
 8001658:	2000018c 	.word	0x2000018c

0800165c <Uart_dataCheck>:
void Uart_dataCheck(uint8_t* cnt){
 800165c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
        printf("%02x ",buf[i]);
    }
        printf("\r\n");
#endif  

    crccheck = STH30_CheckCrc(&buf[blucell_type],buf[blucell_length],buf[buf[blucell_length] + 1]);
 800165e:	4c17      	ldr	r4, [pc, #92]	; (80016bc <Uart_dataCheck+0x60>)
void Uart_dataCheck(uint8_t* cnt){
 8001660:	4606      	mov	r6, r0
    crccheck = STH30_CheckCrc(&buf[blucell_type],buf[blucell_length],buf[buf[blucell_length] + 1]);
 8001662:	78a1      	ldrb	r1, [r4, #2]
 8001664:	1c60      	adds	r0, r4, #1
 8001666:	1863      	adds	r3, r4, r1
 8001668:	785a      	ldrb	r2, [r3, #1]
 800166a:	f000 fb66 	bl	8001d3a <STH30_CheckCrc>
 800166e:	4625      	mov	r5, r4
    if(crccheck == CHECKSUM_ERROR){
 8001670:	b9d0      	cbnz	r0, 80016a8 <Uart_dataCheck+0x4c>
        for(uint8_t i = 0; i < (*cnt); i++){
            printf("%02x ",buf[i]);
 8001672:	4f13      	ldr	r7, [pc, #76]	; (80016c0 <Uart_dataCheck+0x64>)
        for(uint8_t i = 0; i < (*cnt); i++){
 8001674:	7833      	ldrb	r3, [r6, #0]
 8001676:	1c44      	adds	r4, r0, #1
 8001678:	b2c0      	uxtb	r0, r0
 800167a:	4283      	cmp	r3, r0
 800167c:	d80e      	bhi.n	800169c <Uart_dataCheck+0x40>
        }
        printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,buf[buf[blucell_length] + 1]);
 800167e:	78ab      	ldrb	r3, [r5, #2]
 8001680:	2100      	movs	r1, #0
 8001682:	441d      	add	r5, r3
 8001684:	786a      	ldrb	r2, [r5, #1]
 8001686:	480f      	ldr	r0, [pc, #60]	; (80016c4 <Uart_dataCheck+0x68>)
 8001688:	f000 fce0 	bl	800204c <iprintf>
    else{
         printf("What Happen?\r\n");
        /*NOP*/
    }

    *cnt = 0;
 800168c:	2100      	movs	r1, #0
    
    memset(buf,0x00,buf_size);
 800168e:	2264      	movs	r2, #100	; 0x64
    *cnt = 0;
 8001690:	7031      	strb	r1, [r6, #0]
    memset(buf,0x00,buf_size);
 8001692:	480a      	ldr	r0, [pc, #40]	; (80016bc <Uart_dataCheck+0x60>)
}
 8001694:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
    memset(buf,0x00,buf_size);
 8001698:	f000 bccf 	b.w	800203a <memset>
            printf("%02x ",buf[i]);
 800169c:	5c29      	ldrb	r1, [r5, r0]
 800169e:	4638      	mov	r0, r7
 80016a0:	f000 fcd4 	bl	800204c <iprintf>
 80016a4:	4620      	mov	r0, r4
 80016a6:	e7e5      	b.n	8001674 <Uart_dataCheck+0x18>
    else if(crccheck == NO_ERROR){
 80016a8:	2801      	cmp	r0, #1
 80016aa:	d103      	bne.n	80016b4 <Uart_dataCheck+0x58>
        RGB_Controller_Func(&buf[blucell_stx]);
 80016ac:	4620      	mov	r0, r4
 80016ae:	f7ff fe9d 	bl	80013ec <RGB_Controller_Func>
 80016b2:	e7eb      	b.n	800168c <Uart_dataCheck+0x30>
         printf("What Happen?\r\n");
 80016b4:	4804      	ldr	r0, [pc, #16]	; (80016c8 <Uart_dataCheck+0x6c>)
 80016b6:	f000 fd3d 	bl	8002134 <puts>
 80016ba:	e7e7      	b.n	800168c <Uart_dataCheck+0x30>
 80016bc:	2000010e 	.word	0x2000010e
 80016c0:	08003136 	.word	0x08003136
 80016c4:	0800313c 	.word	0x0800313c
 80016c8:	08003162 	.word	0x08003162

080016cc <RGB_Sensor_PowerOnOff>:
void RGB_Sensor_PowerOnOff(uint8_t id){
 80016cc:	b508      	push	{r3, lr}

    switch(id){
 80016ce:	2808      	cmp	r0, #8
 80016d0:	f200 8122 	bhi.w	8001918 <RGB_Sensor_PowerOnOff+0x24c>
 80016d4:	e8df f010 	tbh	[pc, r0, lsl #1]
 80016d8:	00390009 	.word	0x00390009
 80016dc:	006d0063 	.word	0x006d0063
 80016e0:	0093007d 	.word	0x0093007d
 80016e4:	00cd00ad 	.word	0x00cd00ad
 80016e8:	00f3      	.short	0x00f3
        case 0:
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 80016ea:	2201      	movs	r2, #1
 80016ec:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80016f0:	488a      	ldr	r0, [pc, #552]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80016f2:	f7fe ffb3 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);            
 80016f6:	2201      	movs	r2, #1
 80016f8:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80016fc:	4887      	ldr	r0, [pc, #540]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80016fe:	f7fe ffad 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);            
 8001702:	2201      	movs	r2, #1
 8001704:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001708:	4884      	ldr	r0, [pc, #528]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 800170a:	f7fe ffa7 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 800170e:	2201      	movs	r2, #1
 8001710:	2140      	movs	r1, #64	; 0x40
 8001712:	4883      	ldr	r0, [pc, #524]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 8001714:	f7fe ffa2 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
 8001718:	2201      	movs	r2, #1
 800171a:	2180      	movs	r1, #128	; 0x80
 800171c:	4880      	ldr	r0, [pc, #512]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 800171e:	f7fe ff9d 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET);
 8001722:	2201      	movs	r2, #1
 8001724:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001728:	487d      	ldr	r0, [pc, #500]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 800172a:	f7fe ff97 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_SET);
 800172e:	2201      	movs	r2, #1
 8001730:	f44f 7100 	mov.w	r1, #512	; 0x200
 8001734:	487a      	ldr	r0, [pc, #488]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 8001736:	f7fe ff91 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);   
 800173a:	2201      	movs	r2, #1
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_RESET);
 800173c:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001740:	4878      	ldr	r0, [pc, #480]	; (8001924 <RGB_Sensor_PowerOnOff+0x258>)
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_SET);           
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET);
            break;
    }
}
 8001742:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET);
 8001746:	f7fe bf89 	b.w	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 800174a:	2201      	movs	r2, #1
 800174c:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001750:	4872      	ldr	r0, [pc, #456]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 8001752:	f7fe ff83 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_RESET);            
 8001756:	2200      	movs	r2, #0
 8001758:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 800175c:	486f      	ldr	r0, [pc, #444]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 800175e:	f7fe ff7d 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);            
 8001762:	2200      	movs	r2, #0
 8001764:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001768:	486c      	ldr	r0, [pc, #432]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 800176a:	f7fe ff77 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_RESET);
 800176e:	2200      	movs	r2, #0
 8001770:	2140      	movs	r1, #64	; 0x40
 8001772:	486b      	ldr	r0, [pc, #428]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 8001774:	f7fe ff72 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_RESET);
 8001778:	2200      	movs	r2, #0
 800177a:	2180      	movs	r1, #128	; 0x80
 800177c:	4868      	ldr	r0, [pc, #416]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 800177e:	f7fe ff6d 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_RESET);
 8001782:	2200      	movs	r2, #0
 8001784:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001788:	4865      	ldr	r0, [pc, #404]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 800178a:	f7fe ff67 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_RESET);
 800178e:	2200      	movs	r2, #0
 8001790:	f44f 7100 	mov.w	r1, #512	; 0x200
 8001794:	4862      	ldr	r0, [pc, #392]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 8001796:	f7fe ff61 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_RESET);
 800179a:	2200      	movs	r2, #0
 800179c:	e7ce      	b.n	800173c <RGB_Sensor_PowerOnOff+0x70>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);        
 800179e:	2201      	movs	r2, #1
 80017a0:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80017a4:	485d      	ldr	r0, [pc, #372]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80017a6:	f7fe ff59 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 80017aa:	2201      	movs	r2, #1
 80017ac:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80017b0:	e7d4      	b.n	800175c <RGB_Sensor_PowerOnOff+0x90>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);     
 80017b2:	2201      	movs	r2, #1
 80017b4:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80017b8:	4858      	ldr	r0, [pc, #352]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80017ba:	f7fe ff4f 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET); 
 80017be:	2201      	movs	r2, #1
 80017c0:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80017c4:	4855      	ldr	r0, [pc, #340]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80017c6:	f7fe ff49 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 80017ca:	2201      	movs	r2, #1
 80017cc:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80017d0:	e7ca      	b.n	8001768 <RGB_Sensor_PowerOnOff+0x9c>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 80017d2:	2201      	movs	r2, #1
 80017d4:	2140      	movs	r1, #64	; 0x40
 80017d6:	4852      	ldr	r0, [pc, #328]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 80017d8:	f7fe ff40 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);    
 80017dc:	2201      	movs	r2, #1
 80017de:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80017e2:	484e      	ldr	r0, [pc, #312]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80017e4:	f7fe ff3a 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 80017e8:	2201      	movs	r2, #1
 80017ea:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80017ee:	484b      	ldr	r0, [pc, #300]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80017f0:	f7fe ff34 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);            
 80017f4:	2201      	movs	r2, #1
 80017f6:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80017fa:	4848      	ldr	r0, [pc, #288]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80017fc:	e7ba      	b.n	8001774 <RGB_Sensor_PowerOnOff+0xa8>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
 80017fe:	2201      	movs	r2, #1
 8001800:	2180      	movs	r1, #128	; 0x80
 8001802:	4847      	ldr	r0, [pc, #284]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 8001804:	f7fe ff2a 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);    
 8001808:	2201      	movs	r2, #1
 800180a:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 800180e:	4843      	ldr	r0, [pc, #268]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 8001810:	f7fe ff24 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 8001814:	2201      	movs	r2, #1
 8001816:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 800181a:	4840      	ldr	r0, [pc, #256]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 800181c:	f7fe ff1e 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);            
 8001820:	2201      	movs	r2, #1
 8001822:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001826:	483d      	ldr	r0, [pc, #244]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 8001828:	f7fe ff18 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 800182c:	2201      	movs	r2, #1
 800182e:	2140      	movs	r1, #64	; 0x40
 8001830:	e7a4      	b.n	800177c <RGB_Sensor_PowerOnOff+0xb0>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET);
 8001832:	2201      	movs	r2, #1
 8001834:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001838:	4839      	ldr	r0, [pc, #228]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 800183a:	f7fe ff0f 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);    
 800183e:	2201      	movs	r2, #1
 8001840:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001844:	4835      	ldr	r0, [pc, #212]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 8001846:	f7fe ff09 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 800184a:	2201      	movs	r2, #1
 800184c:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001850:	4832      	ldr	r0, [pc, #200]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 8001852:	f7fe ff03 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);            
 8001856:	2201      	movs	r2, #1
 8001858:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 800185c:	482f      	ldr	r0, [pc, #188]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 800185e:	f7fe fefd 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 8001862:	2201      	movs	r2, #1
 8001864:	2140      	movs	r1, #64	; 0x40
 8001866:	482e      	ldr	r0, [pc, #184]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 8001868:	f7fe fef8 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
 800186c:	2201      	movs	r2, #1
 800186e:	2180      	movs	r1, #128	; 0x80
 8001870:	e78a      	b.n	8001788 <RGB_Sensor_PowerOnOff+0xbc>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_SET);
 8001872:	2201      	movs	r2, #1
 8001874:	f44f 7100 	mov.w	r1, #512	; 0x200
 8001878:	4829      	ldr	r0, [pc, #164]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 800187a:	f7fe feef 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);    
 800187e:	2201      	movs	r2, #1
 8001880:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8001884:	4825      	ldr	r0, [pc, #148]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 8001886:	f7fe fee9 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 800188a:	2201      	movs	r2, #1
 800188c:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8001890:	4822      	ldr	r0, [pc, #136]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 8001892:	f7fe fee3 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);            
 8001896:	2201      	movs	r2, #1
 8001898:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 800189c:	481f      	ldr	r0, [pc, #124]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 800189e:	f7fe fedd 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 80018a2:	2201      	movs	r2, #1
 80018a4:	2140      	movs	r1, #64	; 0x40
 80018a6:	481e      	ldr	r0, [pc, #120]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 80018a8:	f7fe fed8 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
 80018ac:	2201      	movs	r2, #1
 80018ae:	2180      	movs	r1, #128	; 0x80
 80018b0:	481b      	ldr	r0, [pc, #108]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 80018b2:	f7fe fed3 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET); 
 80018b6:	2201      	movs	r2, #1
 80018b8:	f44f 7180 	mov.w	r1, #256	; 0x100
 80018bc:	e76a      	b.n	8001794 <RGB_Sensor_PowerOnOff+0xc8>
            HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);
 80018be:	2201      	movs	r2, #1
 80018c0:	f44f 7180 	mov.w	r1, #256	; 0x100
 80018c4:	4817      	ldr	r0, [pc, #92]	; (8001924 <RGB_Sensor_PowerOnOff+0x258>)
 80018c6:	f7fe fec9 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_14,GPIO_PIN_SET);    
 80018ca:	2201      	movs	r2, #1
 80018cc:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80018d0:	4812      	ldr	r0, [pc, #72]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80018d2:	f7fe fec3 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,GPIO_PIN_SET);
 80018d6:	2201      	movs	r2, #1
 80018d8:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80018dc:	480f      	ldr	r0, [pc, #60]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80018de:	f7fe febd 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);            
 80018e2:	2201      	movs	r2, #1
 80018e4:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80018e8:	480c      	ldr	r0, [pc, #48]	; (800191c <RGB_Sensor_PowerOnOff+0x250>)
 80018ea:	f7fe feb7 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_6,GPIO_PIN_SET);
 80018ee:	2201      	movs	r2, #1
 80018f0:	2140      	movs	r1, #64	; 0x40
 80018f2:	480b      	ldr	r0, [pc, #44]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 80018f4:	f7fe feb2 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_7,GPIO_PIN_SET);
 80018f8:	2201      	movs	r2, #1
 80018fa:	2180      	movs	r1, #128	; 0x80
 80018fc:	4808      	ldr	r0, [pc, #32]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 80018fe:	f7fe fead 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,GPIO_PIN_SET);           
 8001902:	2201      	movs	r2, #1
 8001904:	f44f 7100 	mov.w	r1, #512	; 0x200
 8001908:	4805      	ldr	r0, [pc, #20]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 800190a:	f7fe fea7 	bl	800065c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(GPIOC,GPIO_PIN_8,GPIO_PIN_SET);
 800190e:	2201      	movs	r2, #1
 8001910:	f44f 7180 	mov.w	r1, #256	; 0x100
 8001914:	4802      	ldr	r0, [pc, #8]	; (8001920 <RGB_Sensor_PowerOnOff+0x254>)
 8001916:	e714      	b.n	8001742 <RGB_Sensor_PowerOnOff+0x76>
 8001918:	bd08      	pop	{r3, pc}
 800191a:	bf00      	nop
 800191c:	40010c00 	.word	0x40010c00
 8001920:	40011000 	.word	0x40011000
 8001924:	40010800 	.word	0x40010800

08001928 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001928:	b510      	push	{r4, lr}
 800192a:	b090      	sub	sp, #64	; 0x40
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 800192c:	2228      	movs	r2, #40	; 0x28
 800192e:	2100      	movs	r1, #0
 8001930:	a806      	add	r0, sp, #24
 8001932:	f000 fb82 	bl	800203a <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001936:	2100      	movs	r1, #0
 8001938:	2214      	movs	r2, #20
 800193a:	a801      	add	r0, sp, #4
 800193c:	f000 fb7d 	bl	800203a <memset>
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001940:	2402      	movs	r4, #2
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 8001942:	2201      	movs	r2, #1
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001944:	f44f 3380 	mov.w	r3, #65536	; 0x10000
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001948:	a806      	add	r0, sp, #24
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 800194a:	9206      	str	r2, [sp, #24]
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 800194c:	9307      	str	r3, [sp, #28]
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 800194e:	920a      	str	r2, [sp, #40]	; 0x28
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001950:	930e      	str	r3, [sp, #56]	; 0x38
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001952:	940d      	str	r4, [sp, #52]	; 0x34
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001954:	f7fe fe8c 	bl	8000670 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001958:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 800195a:	2100      	movs	r1, #0
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 800195c:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 800195e:	f44f 6380 	mov.w	r3, #1024	; 0x400
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 8001962:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001964:	9402      	str	r4, [sp, #8]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8001966:	9103      	str	r1, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8001968:	9304      	str	r3, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 800196a:	9105      	str	r1, [sp, #20]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 800196c:	f7ff f848 	bl	8000a00 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
}
 8001970:	b010      	add	sp, #64	; 0x40
 8001972:	bd10      	pop	{r4, pc}

08001974 <main>:
{
 8001974:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 8001978:	2404      	movs	r4, #4
 800197a:	f04f 0801 	mov.w	r8, #1
 800197e:	27be      	movs	r7, #190	; 0xbe
 8001980:	4eb8      	ldr	r6, [pc, #736]	; (8001c64 <main+0x2f0>)
 8001982:	f8df a34c 	ldr.w	sl, [pc, #844]	; 8001cd0 <main+0x35c>
 8001986:	7833      	ldrb	r3, [r6, #0]
{
 8001988:	b08f      	sub	sp, #60	; 0x3c
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 800198a:	f88d 301b 	strb.w	r3, [sp, #27]
 800198e:	f89a 3000 	ldrb.w	r3, [sl]
 8001992:	4621      	mov	r1, r4
 8001994:	f10d 0019 	add.w	r0, sp, #25
 8001998:	f88d 7018 	strb.w	r7, [sp, #24]
 800199c:	f88d 8019 	strb.w	r8, [sp, #25]
 80019a0:	f88d 401a 	strb.w	r4, [sp, #26]
 80019a4:	f88d 301c 	strb.w	r3, [sp, #28]
 80019a8:	f000 f9ac 	bl	8001d04 <STH30_CreateCrc>
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 80019ac:	2303      	movs	r3, #3
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 80019ae:	25eb      	movs	r5, #235	; 0xeb
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 80019b0:	f88d 3021 	strb.w	r3, [sp, #33]	; 0x21
 80019b4:	7833      	ldrb	r3, [r6, #0]
 80019b6:	4621      	mov	r1, r4
 80019b8:	f88d 3023 	strb.w	r3, [sp, #35]	; 0x23
 80019bc:	f89a 3000 	ldrb.w	r3, [sl]
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 80019c0:	f88d 001d 	strb.w	r0, [sp, #29]
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 80019c4:	f10d 0021 	add.w	r0, sp, #33	; 0x21
 80019c8:	f88d 3024 	strb.w	r3, [sp, #36]	; 0x24
  uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb};
 80019cc:	f88d 501e 	strb.w	r5, [sp, #30]
  uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb};  
 80019d0:	f88d 7020 	strb.w	r7, [sp, #32]
 80019d4:	f88d 4022 	strb.w	r4, [sp, #34]	; 0x22
 80019d8:	f000 f994 	bl	8001d04 <STH30_CreateCrc>
 80019dc:	f88d 5026 	strb.w	r5, [sp, #38]	; 0x26
 80019e0:	f88d 0025 	strb.w	r0, [sp, #37]	; 0x25
  HAL_Init();
 80019e4:	f7fe fc42 	bl	800026c <HAL_Init>
  SystemClock_Config();
 80019e8:	f7ff ff9e 	bl	8001928 <SystemClock_Config>
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80019ec:	2210      	movs	r2, #16
 80019ee:	2100      	movs	r1, #0
 80019f0:	a80a      	add	r0, sp, #40	; 0x28
 80019f2:	f000 fb22 	bl	800203a <memset>

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80019f6:	4b9c      	ldr	r3, [pc, #624]	; (8001c68 <main+0x2f4>)
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOA_CLK_ENABLE();
  __HAL_RCC_GPIOB_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 80019f8:	f64b 71d8 	movw	r1, #49112	; 0xbfd8
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80019fc:	699a      	ldr	r2, [r3, #24]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 80019fe:	489b      	ldr	r0, [pc, #620]	; (8001c6c <main+0x2f8>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001a00:	f042 0210 	orr.w	r2, r2, #16
 8001a04:	619a      	str	r2, [r3, #24]
 8001a06:	699a      	ldr	r2, [r3, #24]
  GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
                          |GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9 
                          |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001a08:	2502      	movs	r5, #2
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001a0a:	f002 0210 	and.w	r2, r2, #16
 8001a0e:	9202      	str	r2, [sp, #8]
 8001a10:	9a02      	ldr	r2, [sp, #8]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8001a12:	699a      	ldr	r2, [r3, #24]
  htim6.Instance = TIM6;
 8001a14:	f8df 92bc 	ldr.w	r9, [pc, #700]	; 8001cd4 <main+0x360>
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8001a18:	f042 0220 	orr.w	r2, r2, #32
 8001a1c:	619a      	str	r2, [r3, #24]
 8001a1e:	699a      	ldr	r2, [r3, #24]
  huart1.Instance = USART1;
 8001a20:	4f93      	ldr	r7, [pc, #588]	; (8001c70 <main+0x2fc>)
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8001a22:	f002 0220 	and.w	r2, r2, #32
 8001a26:	9203      	str	r2, [sp, #12]
 8001a28:	9a03      	ldr	r2, [sp, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8001a2a:	699a      	ldr	r2, [r3, #24]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8001a2c:	f04f 0b0c 	mov.w	fp, #12
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8001a30:	4322      	orrs	r2, r4
 8001a32:	619a      	str	r2, [r3, #24]
 8001a34:	699a      	ldr	r2, [r3, #24]
  huart2.Instance = USART2;
 8001a36:	4e8f      	ldr	r6, [pc, #572]	; (8001c74 <main+0x300>)
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8001a38:	4022      	ands	r2, r4
 8001a3a:	9204      	str	r2, [sp, #16]
 8001a3c:	9a04      	ldr	r2, [sp, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8001a3e:	699a      	ldr	r2, [r3, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001a40:	2400      	movs	r4, #0
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8001a42:	f042 0208 	orr.w	r2, r2, #8
 8001a46:	619a      	str	r2, [r3, #24]
 8001a48:	699b      	ldr	r3, [r3, #24]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001a4a:	2200      	movs	r2, #0
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8001a4c:	f003 0308 	and.w	r3, r3, #8
 8001a50:	9305      	str	r3, [sp, #20]
 8001a52:	9b05      	ldr	r3, [sp, #20]
  HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001a54:	f7fe fe02 	bl	800065c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7 
 8001a58:	2200      	movs	r2, #0
 8001a5a:	f242 11f0 	movw	r1, #8688	; 0x21f0
 8001a5e:	4886      	ldr	r0, [pc, #536]	; (8001c78 <main+0x304>)
 8001a60:	f7fe fdfc 	bl	800065c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET);
 8001a64:	2200      	movs	r2, #0
 8001a66:	f44f 4170 	mov.w	r1, #61440	; 0xf000
 8001a6a:	4884      	ldr	r0, [pc, #528]	; (8001c7c <main+0x308>)
 8001a6c:	f7fe fdf6 	bl	800065c <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001a70:	f64b 73d8 	movw	r3, #49112	; 0xbfd8
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8001a74:	a90a      	add	r1, sp, #40	; 0x28
 8001a76:	487d      	ldr	r0, [pc, #500]	; (8001c6c <main+0x2f8>)
  GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4 
 8001a78:	930a      	str	r3, [sp, #40]	; 0x28
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001a7a:	f8cd 802c 	str.w	r8, [sp, #44]	; 0x2c
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001a7e:	950d      	str	r5, [sp, #52]	; 0x34
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001a80:	940c      	str	r4, [sp, #48]	; 0x30
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8001a82:	f7fe fcff 	bl	8000484 <HAL_GPIO_Init>

  /*Configure GPIO pins : PA4 PA5 PA6 PA7 
                           PA8 PA13 */
  GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7 
 8001a86:	f242 13f0 	movw	r3, #8688	; 0x21f0
                          |GPIO_PIN_8|GPIO_PIN_13;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001a8a:	a90a      	add	r1, sp, #40	; 0x28
 8001a8c:	487a      	ldr	r0, [pc, #488]	; (8001c78 <main+0x304>)
  GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7 
 8001a8e:	930a      	str	r3, [sp, #40]	; 0x28
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001a90:	f8cd 802c 	str.w	r8, [sp, #44]	; 0x2c
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001a94:	950d      	str	r5, [sp, #52]	; 0x34
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001a96:	940c      	str	r4, [sp, #48]	; 0x30
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001a98:	f7fe fcf4 	bl	8000484 <HAL_GPIO_Init>

  /*Configure GPIO pins : PB12 PB13 PB14 PB15 */
  GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
 8001a9c:	f44f 4370 	mov.w	r3, #61440	; 0xf000
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001aa0:	a90a      	add	r1, sp, #40	; 0x28
 8001aa2:	4876      	ldr	r0, [pc, #472]	; (8001c7c <main+0x308>)
  GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
 8001aa4:	930a      	str	r3, [sp, #40]	; 0x28
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001aa6:	f8cd 802c 	str.w	r8, [sp, #44]	; 0x2c
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001aaa:	950d      	str	r5, [sp, #52]	; 0x34
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001aac:	940c      	str	r4, [sp, #48]	; 0x30
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001aae:	f7fe fce9 	bl	8000484 <HAL_GPIO_Init>
  htim6.Init.Prescaler = 1600-1;
 8001ab2:	f240 633f 	movw	r3, #1599	; 0x63f
 8001ab6:	4a72      	ldr	r2, [pc, #456]	; (8001c80 <main+0x30c>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8001ab8:	4648      	mov	r0, r9
  htim6.Init.Prescaler = 1600-1;
 8001aba:	e889 000c 	stmia.w	r9, {r2, r3}
  htim6.Init.Period = 10-1;
 8001abe:	2309      	movs	r3, #9
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8001ac0:	f8c9 4008 	str.w	r4, [r9, #8]
  htim6.Init.Period = 10-1;
 8001ac4:	f8c9 300c 	str.w	r3, [r9, #12]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8001ac8:	f8c9 4018 	str.w	r4, [r9, #24]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8001acc:	940a      	str	r4, [sp, #40]	; 0x28
 8001ace:	940b      	str	r4, [sp, #44]	; 0x2c
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8001ad0:	f7ff f966 	bl	8000da0 <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8001ad4:	a90a      	add	r1, sp, #40	; 0x28
 8001ad6:	4648      	mov	r0, r9
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8001ad8:	940a      	str	r4, [sp, #40]	; 0x28
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 8001ada:	940b      	str	r4, [sp, #44]	; 0x2c
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8001adc:	f7ff f97a 	bl	8000dd4 <HAL_TIMEx_MasterConfigSynchronization>
  huart1.Instance = USART1;
 8001ae0:	4b68      	ldr	r3, [pc, #416]	; (8001c84 <main+0x310>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001ae2:	4638      	mov	r0, r7
  huart1.Instance = USART1;
 8001ae4:	603b      	str	r3, [r7, #0]
  huart1.Init.BaudRate = 115200;
 8001ae6:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8001aea:	60bc      	str	r4, [r7, #8]
  huart1.Init.BaudRate = 115200;
 8001aec:	607b      	str	r3, [r7, #4]
 8001aee:	9301      	str	r3, [sp, #4]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8001af0:	60fc      	str	r4, [r7, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 8001af2:	613c      	str	r4, [r7, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8001af4:	f8c7 b014 	str.w	fp, [r7, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001af8:	61bc      	str	r4, [r7, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8001afa:	61fc      	str	r4, [r7, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001afc:	f7ff fa62 	bl	8000fc4 <HAL_UART_Init>
  huart2.Instance = USART2;
 8001b00:	4a61      	ldr	r2, [pc, #388]	; (8001c88 <main+0x314>)
  huart2.Init.BaudRate = 115200;
 8001b02:	9b01      	ldr	r3, [sp, #4]
  huart3.Instance = USART3;
 8001b04:	4d61      	ldr	r5, [pc, #388]	; (8001c8c <main+0x318>)
  if (HAL_UART_Init(&huart2) != HAL_OK)
 8001b06:	4630      	mov	r0, r6
  huart2.Instance = USART2;
 8001b08:	6032      	str	r2, [r6, #0]
  huart2.Init.BaudRate = 115200;
 8001b0a:	6073      	str	r3, [r6, #4]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 8001b0c:	60b4      	str	r4, [r6, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 8001b0e:	60f4      	str	r4, [r6, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 8001b10:	6134      	str	r4, [r6, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 8001b12:	f8c6 b014 	str.w	fp, [r6, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001b16:	61b4      	str	r4, [r6, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 8001b18:	61f4      	str	r4, [r6, #28]
  if (HAL_UART_Init(&huart2) != HAL_OK)
 8001b1a:	f7ff fa53 	bl	8000fc4 <HAL_UART_Init>
  huart3.Init.BaudRate = 115200;
 8001b1e:	9b01      	ldr	r3, [sp, #4]
  huart3.Instance = USART3;
 8001b20:	4a5b      	ldr	r2, [pc, #364]	; (8001c90 <main+0x31c>)
  if (HAL_UART_Init(&huart3) != HAL_OK)
 8001b22:	4628      	mov	r0, r5
  huart3.Init.BaudRate = 115200;
 8001b24:	606b      	str	r3, [r5, #4]
  huart3.Instance = USART3;
 8001b26:	602a      	str	r2, [r5, #0]
  huart3.Init.WordLength = UART_WORDLENGTH_8B;
 8001b28:	60ac      	str	r4, [r5, #8]
  huart3.Init.StopBits = UART_STOPBITS_1;
 8001b2a:	60ec      	str	r4, [r5, #12]
  huart3.Init.Parity = UART_PARITY_NONE;
 8001b2c:	612c      	str	r4, [r5, #16]
  huart3.Init.Mode = UART_MODE_TX_RX;
 8001b2e:	f8c5 b014 	str.w	fp, [r5, #20]
  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001b32:	61ac      	str	r4, [r5, #24]
  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
 8001b34:	61ec      	str	r4, [r5, #28]
  if (HAL_UART_Init(&huart3) != HAL_OK)
 8001b36:	f7ff fa45 	bl	8000fc4 <HAL_UART_Init>
  HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
 8001b3a:	4622      	mov	r2, r4
 8001b3c:	4621      	mov	r1, r4
 8001b3e:	2027      	movs	r0, #39	; 0x27
 8001b40:	f7fe fbdc 	bl	80002fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART3_IRQn);
 8001b44:	2027      	movs	r0, #39	; 0x27
 8001b46:	f7fe fc0d 	bl	8000364 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 8001b4a:	4622      	mov	r2, r4
 8001b4c:	4621      	mov	r1, r4
 8001b4e:	2025      	movs	r0, #37	; 0x25
 8001b50:	f7fe fbd4 	bl	80002fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8001b54:	2025      	movs	r0, #37	; 0x25
 8001b56:	f7fe fc05 	bl	8000364 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
 8001b5a:	4622      	mov	r2, r4
 8001b5c:	4621      	mov	r1, r4
 8001b5e:	2026      	movs	r0, #38	; 0x26
 8001b60:	f7fe fbcc 	bl	80002fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART2_IRQn);
 8001b64:	2026      	movs	r0, #38	; 0x26
 8001b66:	f7fe fbfd 	bl	8000364 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 8001b6a:	4622      	mov	r2, r4
 8001b6c:	4621      	mov	r1, r4
 8001b6e:	2036      	movs	r0, #54	; 0x36
 8001b70:	f7fe fbc4 	bl	80002fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 8001b74:	2036      	movs	r0, #54	; 0x36
 8001b76:	f7fe fbf5 	bl	8000364 <HAL_NVIC_EnableIRQ>
  HAL_TIM_Base_Start_IT(&htim6);
 8001b7a:	4648      	mov	r0, r9
 8001b7c:	f7ff f812 	bl	8000ba4 <HAL_TIM_Base_Start_IT>
  HAL_UART_Receive_IT(&huart1, &rx1_data[0],1);
 8001b80:	4642      	mov	r2, r8
 8001b82:	4944      	ldr	r1, [pc, #272]	; (8001c94 <main+0x320>)
 8001b84:	4638      	mov	r0, r7
 8001b86:	f7ff faa7 	bl	80010d8 <HAL_UART_Receive_IT>
  HAL_UART_Receive_IT(&huart2, &rx2_data[0],1);
 8001b8a:	4642      	mov	r2, r8
 8001b8c:	4942      	ldr	r1, [pc, #264]	; (8001c98 <main+0x324>)
 8001b8e:	4630      	mov	r0, r6
 8001b90:	f7ff faa2 	bl	80010d8 <HAL_UART_Receive_IT>
  HAL_UART_Receive_IT(&huart3, &rx3_data[0],1);
 8001b94:	4642      	mov	r2, r8
 8001b96:	4941      	ldr	r1, [pc, #260]	; (8001c9c <main+0x328>)
 8001b98:	4628      	mov	r0, r5
 8001b9a:	f7ff fa9d 	bl	80010d8 <HAL_UART_Receive_IT>
  setbuf(stdout, NULL); // \n ?��?��?��, printf �??????��?���????? ?��?��?��  
 8001b9e:	4b40      	ldr	r3, [pc, #256]	; (8001ca0 <main+0x32c>)
 8001ba0:	4621      	mov	r1, r4
 8001ba2:	681b      	ldr	r3, [r3, #0]
    RGB_SensorIDAutoset = set;
 8001ba4:	4e3f      	ldr	r6, [pc, #252]	; (8001ca4 <main+0x330>)
  setbuf(stdout, NULL); // \n ?��?��?��, printf �??????��?���????? ?��?��?��  
 8001ba6:	6898      	ldr	r0, [r3, #8]
 8001ba8:	f000 facc 	bl	8002144 <setbuf>
      printf("****************************************\r\n");
 8001bac:	483e      	ldr	r0, [pc, #248]	; (8001ca8 <main+0x334>)
 8001bae:	f000 fac1 	bl	8002134 <puts>
      printf("RGB Project\r\n");
 8001bb2:	483e      	ldr	r0, [pc, #248]	; (8001cac <main+0x338>)
 8001bb4:	f000 fabe 	bl	8002134 <puts>
      printf("Build at %s %s\r\n", __DATE__, __TIME__);
 8001bb8:	4a3d      	ldr	r2, [pc, #244]	; (8001cb0 <main+0x33c>)
 8001bba:	493e      	ldr	r1, [pc, #248]	; (8001cb4 <main+0x340>)
 8001bbc:	483e      	ldr	r0, [pc, #248]	; (8001cb8 <main+0x344>)
 8001bbe:	f000 fa45 	bl	800204c <iprintf>
      printf("Copyright (c) 2019. BLUECELL\r\n");
 8001bc2:	483e      	ldr	r0, [pc, #248]	; (8001cbc <main+0x348>)
 8001bc4:	f000 fab6 	bl	8002134 <puts>
      printf("****************************************\r\n");
 8001bc8:	4837      	ldr	r0, [pc, #220]	; (8001ca8 <main+0x334>)
 8001bca:	f000 fab3 	bl	8002134 <puts>
    RGB_SensorIDAutoset = set;
 8001bce:	f886 8000 	strb.w	r8, [r6]
    return UartDataisReved;
 8001bd2:	f8df 8104 	ldr.w	r8, [pc, #260]	; 8001cd8 <main+0x364>
 8001bd6:	4655      	mov	r5, sl
 8001bd8:	46c2      	mov	sl, r8
            HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 8001bda:	f8df 9090 	ldr.w	r9, [pc, #144]	; 8001c6c <main+0x2f8>
    return UartDataisReved;
 8001bde:	f898 3000 	ldrb.w	r3, [r8]
    if(uartdatarecv != 0){
 8001be2:	b183      	cbz	r3, 8001c06 <main+0x292>
        if(uartdatarecv == 1){
 8001be4:	2b01      	cmp	r3, #1
 8001be6:	d106      	bne.n	8001bf6 <main+0x282>
            Uart_dataCheck(&count_in1);
 8001be8:	4835      	ldr	r0, [pc, #212]	; (8001cc0 <main+0x34c>)
            Uart_dataCheck(&count_in3);
 8001bea:	f7ff fd37 	bl	800165c <Uart_dataCheck>
    UartDataisReved = val;
 8001bee:	2300      	movs	r3, #0
 8001bf0:	f88a 3000 	strb.w	r3, [sl]
 8001bf4:	e7f3      	b.n	8001bde <main+0x26a>
        }else if(uartdatarecv == 2){
 8001bf6:	2b02      	cmp	r3, #2
 8001bf8:	d101      	bne.n	8001bfe <main+0x28a>
            Uart_dataCheck(&count_in2);
 8001bfa:	4832      	ldr	r0, [pc, #200]	; (8001cc4 <main+0x350>)
 8001bfc:	e7f5      	b.n	8001bea <main+0x276>
        }else if(uartdatarecv == 3){
 8001bfe:	2b03      	cmp	r3, #3
 8001c00:	d1f5      	bne.n	8001bee <main+0x27a>
            Uart_dataCheck(&count_in3);
 8001c02:	4831      	ldr	r0, [pc, #196]	; (8001cc8 <main+0x354>)
 8001c04:	e7f1      	b.n	8001bea <main+0x276>
        if(LedTimerCnt > 500){
 8001c06:	4f31      	ldr	r7, [pc, #196]	; (8001ccc <main+0x358>)
 8001c08:	683a      	ldr	r2, [r7, #0]
 8001c0a:	f5b2 7ffa 	cmp.w	r2, #500	; 0x1f4
 8001c0e:	d9e6      	bls.n	8001bde <main+0x26a>
            if(RGB_SensorIDAutoGet() == 1){
 8001c10:	f896 b000 	ldrb.w	fp, [r6]
 8001c14:	f1bb 0f01 	cmp.w	fp, #1
 8001c18:	d160      	bne.n	8001cdc <main+0x368>
                if(SensorID > 8){
 8001c1a:	7828      	ldrb	r0, [r5, #0]
 8001c1c:	2808      	cmp	r0, #8
 8001c1e:	d90d      	bls.n	8001c3c <main+0x2c8>
                    RGB_Sensor_PowerOnOff(0);
 8001c20:	4618      	mov	r0, r3
    RGB_SensorIDAutoset = set;
 8001c22:	7033      	strb	r3, [r6, #0]
                    RGB_Sensor_PowerOnOff(0);
 8001c24:	f7ff fd52 	bl	80016cc <RGB_Sensor_PowerOnOff>
                    SensorID = 1;
 8001c28:	f885 b000 	strb.w	fp, [r5]
            HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 8001c2c:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001c30:	4648      	mov	r0, r9
 8001c32:	f7fe fd18 	bl	8000666 <HAL_GPIO_TogglePin>
            LedTimerCnt = 0;
 8001c36:	2300      	movs	r3, #0
 8001c38:	603b      	str	r3, [r7, #0]
 8001c3a:	e7d0      	b.n	8001bde <main+0x26a>
                    RGB_Sensor_PowerOnOff(SensorID);
 8001c3c:	f7ff fd46 	bl	80016cc <RGB_Sensor_PowerOnOff>
                    HAL_Delay(500);
 8001c40:	f44f 70fa 	mov.w	r0, #500	; 0x1f4
 8001c44:	f7fe fb36 	bl	80002b4 <HAL_Delay>
                    RGB_Controller_Func(&IDAutoSetRequest_data[blucell_stx]);
 8001c48:	a808      	add	r0, sp, #32
 8001c4a:	f7ff fbcf 	bl	80013ec <RGB_Controller_Func>
                    HAL_Delay(500);
 8001c4e:	f44f 70fa 	mov.w	r0, #500	; 0x1f4
 8001c52:	f7fe fb2f 	bl	80002b4 <HAL_Delay>
                    IDAutoSetRequest_data[4] = SensorID++;//DST ID
 8001c56:	782b      	ldrb	r3, [r5, #0]
 8001c58:	1c5a      	adds	r2, r3, #1
 8001c5a:	702a      	strb	r2, [r5, #0]
 8001c5c:	f88d 3024 	strb.w	r3, [sp, #36]	; 0x24
 8001c60:	e7e4      	b.n	8001c2c <main+0x2b8>
 8001c62:	bf00      	nop
 8001c64:	2000010c 	.word	0x2000010c
 8001c68:	40021000 	.word	0x40021000
 8001c6c:	40011000 	.word	0x40011000
 8001c70:	200001d0 	.word	0x200001d0
 8001c74:	200002b8 	.word	0x200002b8
 8001c78:	40010800 	.word	0x40010800
 8001c7c:	40010c00 	.word	0x40010c00
 8001c80:	40001000 	.word	0x40001000
 8001c84:	40013800 	.word	0x40013800
 8001c88:	40004400 	.word	0x40004400
 8001c8c:	2000018c 	.word	0x2000018c
 8001c90:	40004800 	.word	0x40004800
 8001c94:	20000274 	.word	0x20000274
 8001c98:	200001cd 	.word	0x200001cd
 8001c9c:	200001cc 	.word	0x200001cc
 8001ca0:	20000010 	.word	0x20000010
 8001ca4:	2000010d 	.word	0x2000010d
 8001ca8:	08003170 	.word	0x08003170
 8001cac:	0800319a 	.word	0x0800319a
 8001cb0:	080031a7 	.word	0x080031a7
 8001cb4:	080031b0 	.word	0x080031b0
 8001cb8:	080031bc 	.word	0x080031bc
 8001cbc:	080031cd 	.word	0x080031cd
 8001cc0:	20000172 	.word	0x20000172
 8001cc4:	20000173 	.word	0x20000173
 8001cc8:	20000174 	.word	0x20000174
 8001ccc:	20000108 	.word	0x20000108
 8001cd0:	20000008 	.word	0x20000008
 8001cd4:	20000278 	.word	0x20000278
 8001cd8:	20000188 	.word	0x20000188
                RGB_Controller_Func(&StatusRequest_data[0]);
 8001cdc:	a806      	add	r0, sp, #24
 8001cde:	f7ff fb85 	bl	80013ec <RGB_Controller_Func>
                StatusRequest_data[4] = SensorID_buf[temp_sensorid++];
 8001ce2:	4a06      	ldr	r2, [pc, #24]	; (8001cfc <main+0x388>)
 8001ce4:	1c63      	adds	r3, r4, #1
 8001ce6:	5d12      	ldrb	r2, [r2, r4]
 8001ce8:	b2db      	uxtb	r3, r3
 8001cea:	f88d 201c 	strb.w	r2, [sp, #28]
                 if(temp_sensorid > (SensorID_Cnt - 1)){
 8001cee:	4a04      	ldr	r2, [pc, #16]	; (8001d00 <main+0x38c>)
 8001cf0:	7814      	ldrb	r4, [r2, #0]
                     temp_sensorid = 0;
 8001cf2:	429c      	cmp	r4, r3
 8001cf4:	bfcc      	ite	gt
 8001cf6:	461c      	movgt	r4, r3
 8001cf8:	2400      	movle	r4, #0
 8001cfa:	e797      	b.n	8001c2c <main+0x2b8>
 8001cfc:	200000c7 	.word	0x200000c7
 8001d00:	200000c6 	.word	0x200000c6

08001d04 <STH30_CreateCrc>:
	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 8001d04:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001d06:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001d08:	4604      	mov	r4, r0
 8001d0a:	1a22      	subs	r2, r4, r0
 8001d0c:	b2d2      	uxtb	r2, r2
 8001d0e:	4291      	cmp	r1, r2
 8001d10:	d801      	bhi.n	8001d16 <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 8001d12:	4618      	mov	r0, r3
 8001d14:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 8001d16:	f814 2b01 	ldrb.w	r2, [r4], #1
 8001d1a:	4053      	eors	r3, r2
 8001d1c:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001d1e:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001d22:	f102 32ff 	add.w	r2, r2, #4294967295
 8001d26:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001d2a:	bf18      	it	ne
 8001d2c:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001d30:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 8001d34:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001d36:	d1f2      	bne.n	8001d1e <STH30_CreateCrc+0x1a>
 8001d38:	e7e7      	b.n	8001d0a <STH30_CreateCrc+0x6>

08001d3a <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 8001d3a:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001d3c:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001d3e:	4605      	mov	r5, r0
 8001d40:	1a2c      	subs	r4, r5, r0
 8001d42:	b2e4      	uxtb	r4, r4
 8001d44:	42a1      	cmp	r1, r4
 8001d46:	d803      	bhi.n	8001d50 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8001d48:	1a9b      	subs	r3, r3, r2
 8001d4a:	4258      	negs	r0, r3
 8001d4c:	4158      	adcs	r0, r3
 8001d4e:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 8001d50:	f815 4b01 	ldrb.w	r4, [r5], #1
 8001d54:	4063      	eors	r3, r4
 8001d56:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001d58:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001d5c:	f104 34ff 	add.w	r4, r4, #4294967295
 8001d60:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001d64:	bf18      	it	ne
 8001d66:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001d6a:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8001d6e:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001d70:	d1f2      	bne.n	8001d58 <STH30_CheckCrc+0x1e>
 8001d72:	e7e5      	b.n	8001d40 <STH30_CheckCrc+0x6>

08001d74 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8001d74:	4b0e      	ldr	r3, [pc, #56]	; (8001db0 <HAL_MspInit+0x3c>)
{
 8001d76:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8001d78:	699a      	ldr	r2, [r3, #24]
 8001d7a:	f042 0201 	orr.w	r2, r2, #1
 8001d7e:	619a      	str	r2, [r3, #24]
 8001d80:	699a      	ldr	r2, [r3, #24]
 8001d82:	f002 0201 	and.w	r2, r2, #1
 8001d86:	9200      	str	r2, [sp, #0]
 8001d88:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8001d8a:	69da      	ldr	r2, [r3, #28]
 8001d8c:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8001d90:	61da      	str	r2, [r3, #28]
 8001d92:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /**DISABLE: JTAG-DP Disabled and SW-DP Disabled 
  */
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8001d94:	4a07      	ldr	r2, [pc, #28]	; (8001db4 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 8001d96:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001d9a:	9301      	str	r3, [sp, #4]
 8001d9c:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8001d9e:	6853      	ldr	r3, [r2, #4]
 8001da0:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8001da4:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
 8001da8:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8001daa:	b002      	add	sp, #8
 8001dac:	4770      	bx	lr
 8001dae:	bf00      	nop
 8001db0:	40021000 	.word	0x40021000
 8001db4:	40010000 	.word	0x40010000

08001db8 <HAL_TIM_Base_MspInit>:
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{

  if(htim_base->Instance==TIM6)
 8001db8:	6802      	ldr	r2, [r0, #0]
 8001dba:	4b08      	ldr	r3, [pc, #32]	; (8001ddc <HAL_TIM_Base_MspInit+0x24>)
{
 8001dbc:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 8001dbe:	429a      	cmp	r2, r3
 8001dc0:	d10a      	bne.n	8001dd8 <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 8001dc2:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 8001dc6:	69da      	ldr	r2, [r3, #28]
 8001dc8:	f042 0210 	orr.w	r2, r2, #16
 8001dcc:	61da      	str	r2, [r3, #28]
 8001dce:	69db      	ldr	r3, [r3, #28]
 8001dd0:	f003 0310 	and.w	r3, r3, #16
 8001dd4:	9301      	str	r3, [sp, #4]
 8001dd6:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 8001dd8:	b002      	add	sp, #8
 8001dda:	4770      	bx	lr
 8001ddc:	40001000 	.word	0x40001000

08001de0 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8001de0:	b510      	push	{r4, lr}
 8001de2:	4604      	mov	r4, r0
 8001de4:	b08a      	sub	sp, #40	; 0x28

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001de6:	2210      	movs	r2, #16
 8001de8:	2100      	movs	r1, #0
 8001dea:	a806      	add	r0, sp, #24
 8001dec:	f000 f925 	bl	800203a <memset>
  if(huart->Instance==USART1)
 8001df0:	6823      	ldr	r3, [r4, #0]
 8001df2:	4a3d      	ldr	r2, [pc, #244]	; (8001ee8 <HAL_UART_MspInit+0x108>)
 8001df4:	4293      	cmp	r3, r2
 8001df6:	d12a      	bne.n	8001e4e <HAL_UART_MspInit+0x6e>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 8001df8:	4b3c      	ldr	r3, [pc, #240]	; (8001eec <HAL_UART_MspInit+0x10c>)
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001dfa:	a906      	add	r1, sp, #24
    __HAL_RCC_USART1_CLK_ENABLE();
 8001dfc:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001dfe:	483c      	ldr	r0, [pc, #240]	; (8001ef0 <HAL_UART_MspInit+0x110>)
    __HAL_RCC_USART1_CLK_ENABLE();
 8001e00:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8001e04:	619a      	str	r2, [r3, #24]
 8001e06:	699a      	ldr	r2, [r3, #24]
 8001e08:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 8001e0c:	9200      	str	r2, [sp, #0]
 8001e0e:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8001e10:	699a      	ldr	r2, [r3, #24]
 8001e12:	f042 0204 	orr.w	r2, r2, #4
 8001e16:	619a      	str	r2, [r3, #24]
 8001e18:	699b      	ldr	r3, [r3, #24]
 8001e1a:	f003 0304 	and.w	r3, r3, #4
 8001e1e:	9301      	str	r3, [sp, #4]
 8001e20:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8001e22:	f44f 7300 	mov.w	r3, #512	; 0x200
 8001e26:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8001e28:	2302      	movs	r3, #2
 8001e2a:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8001e2c:	2303      	movs	r3, #3
 8001e2e:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001e30:	f7fe fb28 	bl	8000484 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8001e34:	f44f 6380 	mov.w	r3, #1024	; 0x400
    GPIO_InitStruct.Pin = GPIO_PIN_2;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

    GPIO_InitStruct.Pin = GPIO_PIN_3;
 8001e38:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001e3a:	2300      	movs	r3, #0
 8001e3c:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8001e3e:	2301      	movs	r3, #1
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001e40:	482b      	ldr	r0, [pc, #172]	; (8001ef0 <HAL_UART_MspInit+0x110>)
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8001e42:	9308      	str	r3, [sp, #32]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001e44:	a906      	add	r1, sp, #24
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

    GPIO_InitStruct.Pin = GPIO_PIN_11;
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
    GPIO_InitStruct.Pull = GPIO_PULLUP;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001e46:	f7fe fb1d 	bl	8000484 <HAL_GPIO_Init>
  /* USER CODE BEGIN USART3_MspInit 1 */

  /* USER CODE END USART3_MspInit 1 */
  }

}
 8001e4a:	b00a      	add	sp, #40	; 0x28
 8001e4c:	bd10      	pop	{r4, pc}
  else if(huart->Instance==USART2)
 8001e4e:	4a29      	ldr	r2, [pc, #164]	; (8001ef4 <HAL_UART_MspInit+0x114>)
 8001e50:	4293      	cmp	r3, r2
 8001e52:	d11e      	bne.n	8001e92 <HAL_UART_MspInit+0xb2>
    __HAL_RCC_USART2_CLK_ENABLE();
 8001e54:	4b25      	ldr	r3, [pc, #148]	; (8001eec <HAL_UART_MspInit+0x10c>)
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001e56:	a906      	add	r1, sp, #24
    __HAL_RCC_USART2_CLK_ENABLE();
 8001e58:	69da      	ldr	r2, [r3, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001e5a:	4825      	ldr	r0, [pc, #148]	; (8001ef0 <HAL_UART_MspInit+0x110>)
    __HAL_RCC_USART2_CLK_ENABLE();
 8001e5c:	f442 3200 	orr.w	r2, r2, #131072	; 0x20000
 8001e60:	61da      	str	r2, [r3, #28]
 8001e62:	69da      	ldr	r2, [r3, #28]
 8001e64:	f402 3200 	and.w	r2, r2, #131072	; 0x20000
 8001e68:	9202      	str	r2, [sp, #8]
 8001e6a:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8001e6c:	699a      	ldr	r2, [r3, #24]
 8001e6e:	f042 0204 	orr.w	r2, r2, #4
 8001e72:	619a      	str	r2, [r3, #24]
 8001e74:	699b      	ldr	r3, [r3, #24]
 8001e76:	f003 0304 	and.w	r3, r3, #4
 8001e7a:	9303      	str	r3, [sp, #12]
 8001e7c:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = GPIO_PIN_2;
 8001e7e:	2304      	movs	r3, #4
 8001e80:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8001e82:	2302      	movs	r3, #2
 8001e84:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8001e86:	2303      	movs	r3, #3
 8001e88:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001e8a:	f7fe fafb 	bl	8000484 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_3;
 8001e8e:	2308      	movs	r3, #8
 8001e90:	e7d2      	b.n	8001e38 <HAL_UART_MspInit+0x58>
  else if(huart->Instance==USART3)
 8001e92:	4a19      	ldr	r2, [pc, #100]	; (8001ef8 <HAL_UART_MspInit+0x118>)
 8001e94:	4293      	cmp	r3, r2
 8001e96:	d1d8      	bne.n	8001e4a <HAL_UART_MspInit+0x6a>
    __HAL_RCC_USART3_CLK_ENABLE();
 8001e98:	4b14      	ldr	r3, [pc, #80]	; (8001eec <HAL_UART_MspInit+0x10c>)
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001e9a:	a906      	add	r1, sp, #24
    __HAL_RCC_USART3_CLK_ENABLE();
 8001e9c:	69da      	ldr	r2, [r3, #28]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001e9e:	4817      	ldr	r0, [pc, #92]	; (8001efc <HAL_UART_MspInit+0x11c>)
    __HAL_RCC_USART3_CLK_ENABLE();
 8001ea0:	f442 2280 	orr.w	r2, r2, #262144	; 0x40000
 8001ea4:	61da      	str	r2, [r3, #28]
 8001ea6:	69da      	ldr	r2, [r3, #28]
 8001ea8:	f402 2280 	and.w	r2, r2, #262144	; 0x40000
 8001eac:	9204      	str	r2, [sp, #16]
 8001eae:	9a04      	ldr	r2, [sp, #16]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8001eb0:	699a      	ldr	r2, [r3, #24]
 8001eb2:	f042 0208 	orr.w	r2, r2, #8
 8001eb6:	619a      	str	r2, [r3, #24]
 8001eb8:	699b      	ldr	r3, [r3, #24]
 8001eba:	f003 0308 	and.w	r3, r3, #8
 8001ebe:	9305      	str	r3, [sp, #20]
 8001ec0:	9b05      	ldr	r3, [sp, #20]
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8001ec2:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8001ec6:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8001ec8:	2302      	movs	r3, #2
 8001eca:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8001ecc:	2303      	movs	r3, #3
 8001ece:	9309      	str	r3, [sp, #36]	; 0x24
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001ed0:	f7fe fad8 	bl	8000484 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_11;
 8001ed4:	f44f 6300 	mov.w	r3, #2048	; 0x800
 8001ed8:	9306      	str	r3, [sp, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001eda:	2300      	movs	r3, #0
 8001edc:	9307      	str	r3, [sp, #28]
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8001ede:	2301      	movs	r3, #1
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001ee0:	a906      	add	r1, sp, #24
    GPIO_InitStruct.Pull = GPIO_PULLUP;
 8001ee2:	9308      	str	r3, [sp, #32]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001ee4:	4805      	ldr	r0, [pc, #20]	; (8001efc <HAL_UART_MspInit+0x11c>)
 8001ee6:	e7ae      	b.n	8001e46 <HAL_UART_MspInit+0x66>
 8001ee8:	40013800 	.word	0x40013800
 8001eec:	40021000 	.word	0x40021000
 8001ef0:	40010800 	.word	0x40010800
 8001ef4:	40004400 	.word	0x40004400
 8001ef8:	40004800 	.word	0x40004800
 8001efc:	40010c00 	.word	0x40010c00

08001f00 <NMI_Handler>:
 8001f00:	4770      	bx	lr

08001f02 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8001f02:	e7fe      	b.n	8001f02 <HardFault_Handler>

08001f04 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8001f04:	e7fe      	b.n	8001f04 <MemManage_Handler>

08001f06 <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8001f06:	e7fe      	b.n	8001f06 <BusFault_Handler>

08001f08 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8001f08:	e7fe      	b.n	8001f08 <UsageFault_Handler>

08001f0a <SVC_Handler>:
 8001f0a:	4770      	bx	lr

08001f0c <DebugMon_Handler>:
 8001f0c:	4770      	bx	lr

08001f0e <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 8001f0e:	4770      	bx	lr

08001f10 <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 8001f10:	f7fe b9be 	b.w	8000290 <HAL_IncTick>

08001f14 <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8001f14:	4801      	ldr	r0, [pc, #4]	; (8001f1c <USART1_IRQHandler+0x8>)
 8001f16:	f7ff b947 	b.w	80011a8 <HAL_UART_IRQHandler>
 8001f1a:	bf00      	nop
 8001f1c:	200001d0 	.word	0x200001d0

08001f20 <USART2_IRQHandler>:
void USART2_IRQHandler(void)
{
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 8001f20:	4801      	ldr	r0, [pc, #4]	; (8001f28 <USART2_IRQHandler+0x8>)
 8001f22:	f7ff b941 	b.w	80011a8 <HAL_UART_IRQHandler>
 8001f26:	bf00      	nop
 8001f28:	200002b8 	.word	0x200002b8

08001f2c <USART3_IRQHandler>:
void USART3_IRQHandler(void)
{
  /* USER CODE BEGIN USART3_IRQn 0 */

  /* USER CODE END USART3_IRQn 0 */
  HAL_UART_IRQHandler(&huart3);
 8001f2c:	4801      	ldr	r0, [pc, #4]	; (8001f34 <USART3_IRQHandler+0x8>)
 8001f2e:	f7ff b93b 	b.w	80011a8 <HAL_UART_IRQHandler>
 8001f32:	bf00      	nop
 8001f34:	2000018c 	.word	0x2000018c

08001f38 <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8001f38:	4801      	ldr	r0, [pc, #4]	; (8001f40 <TIM6_IRQHandler+0x8>)
 8001f3a:	f7fe be42 	b.w	8000bc2 <HAL_TIM_IRQHandler>
 8001f3e:	bf00      	nop
 8001f40:	20000278 	.word	0x20000278

08001f44 <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 8001f44:	4b0f      	ldr	r3, [pc, #60]	; (8001f84 <SystemInit+0x40>)
 8001f46:	681a      	ldr	r2, [r3, #0]
 8001f48:	f042 0201 	orr.w	r2, r2, #1
 8001f4c:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8001f4e:	6859      	ldr	r1, [r3, #4]
 8001f50:	4a0d      	ldr	r2, [pc, #52]	; (8001f88 <SystemInit+0x44>)
 8001f52:	400a      	ands	r2, r1
 8001f54:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 8001f56:	681a      	ldr	r2, [r3, #0]
 8001f58:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8001f5c:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8001f60:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8001f62:	681a      	ldr	r2, [r3, #0]
 8001f64:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8001f68:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 8001f6a:	685a      	ldr	r2, [r3, #4]
 8001f6c:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8001f70:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 8001f72:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 8001f76:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 8001f78:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
 8001f7c:	4b03      	ldr	r3, [pc, #12]	; (8001f8c <SystemInit+0x48>)
 8001f7e:	609a      	str	r2, [r3, #8]
 8001f80:	4770      	bx	lr
 8001f82:	bf00      	nop
 8001f84:	40021000 	.word	0x40021000
 8001f88:	f8ff0000 	.word	0xf8ff0000
 8001f8c:	e000ed00 	.word	0xe000ed00

08001f90 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8001f90:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8001f92:	e003      	b.n	8001f9c <LoopCopyDataInit>

08001f94 <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8001f94:	4b0b      	ldr	r3, [pc, #44]	; (8001fc4 <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 8001f96:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 8001f98:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 8001f9a:	3104      	adds	r1, #4

08001f9c <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 8001f9c:	480a      	ldr	r0, [pc, #40]	; (8001fc8 <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 8001f9e:	4b0b      	ldr	r3, [pc, #44]	; (8001fcc <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8001fa0:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8001fa2:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8001fa4:	d3f6      	bcc.n	8001f94 <CopyDataInit>
  ldr r2, =_sbss
 8001fa6:	4a0a      	ldr	r2, [pc, #40]	; (8001fd0 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 8001fa8:	e002      	b.n	8001fb0 <LoopFillZerobss>

08001faa <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 8001faa:	2300      	movs	r3, #0
  str r3, [r2], #4
 8001fac:	f842 3b04 	str.w	r3, [r2], #4

08001fb0 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8001fb0:	4b08      	ldr	r3, [pc, #32]	; (8001fd4 <LoopFillZerobss+0x24>)
  cmp r2, r3
 8001fb2:	429a      	cmp	r2, r3
  bcc FillZerobss
 8001fb4:	d3f9      	bcc.n	8001faa <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 8001fb6:	f7ff ffc5 	bl	8001f44 <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 8001fba:	f000 f80f 	bl	8001fdc <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 8001fbe:	f7ff fcd9 	bl	8001974 <main>
  bx lr
 8001fc2:	4770      	bx	lr
  ldr r3, =_sidata
 8001fc4:	080032a4 	.word	0x080032a4
  ldr r0, =_sdata
 8001fc8:	20000000 	.word	0x20000000
  ldr r3, =_edata
 8001fcc:	20000074 	.word	0x20000074
  ldr r2, =_sbss
 8001fd0:	20000074 	.word	0x20000074
  ldr r3, = _ebss
 8001fd4:	200002fc 	.word	0x200002fc

08001fd8 <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 8001fd8:	e7fe      	b.n	8001fd8 <ADC1_2_IRQHandler>
	...

08001fdc <__libc_init_array>:
 8001fdc:	b570      	push	{r4, r5, r6, lr}
 8001fde:	2500      	movs	r5, #0
 8001fe0:	4e0c      	ldr	r6, [pc, #48]	; (8002014 <__libc_init_array+0x38>)
 8001fe2:	4c0d      	ldr	r4, [pc, #52]	; (8002018 <__libc_init_array+0x3c>)
 8001fe4:	1ba4      	subs	r4, r4, r6
 8001fe6:	10a4      	asrs	r4, r4, #2
 8001fe8:	42a5      	cmp	r5, r4
 8001fea:	d109      	bne.n	8002000 <__libc_init_array+0x24>
 8001fec:	f001 f88a 	bl	8003104 <_init>
 8001ff0:	2500      	movs	r5, #0
 8001ff2:	4e0a      	ldr	r6, [pc, #40]	; (800201c <__libc_init_array+0x40>)
 8001ff4:	4c0a      	ldr	r4, [pc, #40]	; (8002020 <__libc_init_array+0x44>)
 8001ff6:	1ba4      	subs	r4, r4, r6
 8001ff8:	10a4      	asrs	r4, r4, #2
 8001ffa:	42a5      	cmp	r5, r4
 8001ffc:	d105      	bne.n	800200a <__libc_init_array+0x2e>
 8001ffe:	bd70      	pop	{r4, r5, r6, pc}
 8002000:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8002004:	4798      	blx	r3
 8002006:	3501      	adds	r5, #1
 8002008:	e7ee      	b.n	8001fe8 <__libc_init_array+0xc>
 800200a:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 800200e:	4798      	blx	r3
 8002010:	3501      	adds	r5, #1
 8002012:	e7f2      	b.n	8001ffa <__libc_init_array+0x1e>
 8002014:	0800329c 	.word	0x0800329c
 8002018:	0800329c 	.word	0x0800329c
 800201c:	0800329c 	.word	0x0800329c
 8002020:	080032a0 	.word	0x080032a0

08002024 <memcpy>:
 8002024:	b510      	push	{r4, lr}
 8002026:	1e43      	subs	r3, r0, #1
 8002028:	440a      	add	r2, r1
 800202a:	4291      	cmp	r1, r2
 800202c:	d100      	bne.n	8002030 <memcpy+0xc>
 800202e:	bd10      	pop	{r4, pc}
 8002030:	f811 4b01 	ldrb.w	r4, [r1], #1
 8002034:	f803 4f01 	strb.w	r4, [r3, #1]!
 8002038:	e7f7      	b.n	800202a <memcpy+0x6>

0800203a <memset>:
 800203a:	4603      	mov	r3, r0
 800203c:	4402      	add	r2, r0
 800203e:	4293      	cmp	r3, r2
 8002040:	d100      	bne.n	8002044 <memset+0xa>
 8002042:	4770      	bx	lr
 8002044:	f803 1b01 	strb.w	r1, [r3], #1
 8002048:	e7f9      	b.n	800203e <memset+0x4>
	...

0800204c <iprintf>:
 800204c:	b40f      	push	{r0, r1, r2, r3}
 800204e:	4b0a      	ldr	r3, [pc, #40]	; (8002078 <iprintf+0x2c>)
 8002050:	b513      	push	{r0, r1, r4, lr}
 8002052:	681c      	ldr	r4, [r3, #0]
 8002054:	b124      	cbz	r4, 8002060 <iprintf+0x14>
 8002056:	69a3      	ldr	r3, [r4, #24]
 8002058:	b913      	cbnz	r3, 8002060 <iprintf+0x14>
 800205a:	4620      	mov	r0, r4
 800205c:	f000 fada 	bl	8002614 <__sinit>
 8002060:	ab05      	add	r3, sp, #20
 8002062:	9a04      	ldr	r2, [sp, #16]
 8002064:	68a1      	ldr	r1, [r4, #8]
 8002066:	4620      	mov	r0, r4
 8002068:	9301      	str	r3, [sp, #4]
 800206a:	f000 fc9b 	bl	80029a4 <_vfiprintf_r>
 800206e:	b002      	add	sp, #8
 8002070:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8002074:	b004      	add	sp, #16
 8002076:	4770      	bx	lr
 8002078:	20000010 	.word	0x20000010

0800207c <_puts_r>:
 800207c:	b570      	push	{r4, r5, r6, lr}
 800207e:	460e      	mov	r6, r1
 8002080:	4605      	mov	r5, r0
 8002082:	b118      	cbz	r0, 800208c <_puts_r+0x10>
 8002084:	6983      	ldr	r3, [r0, #24]
 8002086:	b90b      	cbnz	r3, 800208c <_puts_r+0x10>
 8002088:	f000 fac4 	bl	8002614 <__sinit>
 800208c:	69ab      	ldr	r3, [r5, #24]
 800208e:	68ac      	ldr	r4, [r5, #8]
 8002090:	b913      	cbnz	r3, 8002098 <_puts_r+0x1c>
 8002092:	4628      	mov	r0, r5
 8002094:	f000 fabe 	bl	8002614 <__sinit>
 8002098:	4b23      	ldr	r3, [pc, #140]	; (8002128 <_puts_r+0xac>)
 800209a:	429c      	cmp	r4, r3
 800209c:	d117      	bne.n	80020ce <_puts_r+0x52>
 800209e:	686c      	ldr	r4, [r5, #4]
 80020a0:	89a3      	ldrh	r3, [r4, #12]
 80020a2:	071b      	lsls	r3, r3, #28
 80020a4:	d51d      	bpl.n	80020e2 <_puts_r+0x66>
 80020a6:	6923      	ldr	r3, [r4, #16]
 80020a8:	b1db      	cbz	r3, 80020e2 <_puts_r+0x66>
 80020aa:	3e01      	subs	r6, #1
 80020ac:	68a3      	ldr	r3, [r4, #8]
 80020ae:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 80020b2:	3b01      	subs	r3, #1
 80020b4:	60a3      	str	r3, [r4, #8]
 80020b6:	b9e9      	cbnz	r1, 80020f4 <_puts_r+0x78>
 80020b8:	2b00      	cmp	r3, #0
 80020ba:	da2e      	bge.n	800211a <_puts_r+0x9e>
 80020bc:	4622      	mov	r2, r4
 80020be:	210a      	movs	r1, #10
 80020c0:	4628      	mov	r0, r5
 80020c2:	f000 f8f5 	bl	80022b0 <__swbuf_r>
 80020c6:	3001      	adds	r0, #1
 80020c8:	d011      	beq.n	80020ee <_puts_r+0x72>
 80020ca:	200a      	movs	r0, #10
 80020cc:	bd70      	pop	{r4, r5, r6, pc}
 80020ce:	4b17      	ldr	r3, [pc, #92]	; (800212c <_puts_r+0xb0>)
 80020d0:	429c      	cmp	r4, r3
 80020d2:	d101      	bne.n	80020d8 <_puts_r+0x5c>
 80020d4:	68ac      	ldr	r4, [r5, #8]
 80020d6:	e7e3      	b.n	80020a0 <_puts_r+0x24>
 80020d8:	4b15      	ldr	r3, [pc, #84]	; (8002130 <_puts_r+0xb4>)
 80020da:	429c      	cmp	r4, r3
 80020dc:	bf08      	it	eq
 80020de:	68ec      	ldreq	r4, [r5, #12]
 80020e0:	e7de      	b.n	80020a0 <_puts_r+0x24>
 80020e2:	4621      	mov	r1, r4
 80020e4:	4628      	mov	r0, r5
 80020e6:	f000 f935 	bl	8002354 <__swsetup_r>
 80020ea:	2800      	cmp	r0, #0
 80020ec:	d0dd      	beq.n	80020aa <_puts_r+0x2e>
 80020ee:	f04f 30ff 	mov.w	r0, #4294967295
 80020f2:	bd70      	pop	{r4, r5, r6, pc}
 80020f4:	2b00      	cmp	r3, #0
 80020f6:	da04      	bge.n	8002102 <_puts_r+0x86>
 80020f8:	69a2      	ldr	r2, [r4, #24]
 80020fa:	4293      	cmp	r3, r2
 80020fc:	db06      	blt.n	800210c <_puts_r+0x90>
 80020fe:	290a      	cmp	r1, #10
 8002100:	d004      	beq.n	800210c <_puts_r+0x90>
 8002102:	6823      	ldr	r3, [r4, #0]
 8002104:	1c5a      	adds	r2, r3, #1
 8002106:	6022      	str	r2, [r4, #0]
 8002108:	7019      	strb	r1, [r3, #0]
 800210a:	e7cf      	b.n	80020ac <_puts_r+0x30>
 800210c:	4622      	mov	r2, r4
 800210e:	4628      	mov	r0, r5
 8002110:	f000 f8ce 	bl	80022b0 <__swbuf_r>
 8002114:	3001      	adds	r0, #1
 8002116:	d1c9      	bne.n	80020ac <_puts_r+0x30>
 8002118:	e7e9      	b.n	80020ee <_puts_r+0x72>
 800211a:	200a      	movs	r0, #10
 800211c:	6823      	ldr	r3, [r4, #0]
 800211e:	1c5a      	adds	r2, r3, #1
 8002120:	6022      	str	r2, [r4, #0]
 8002122:	7018      	strb	r0, [r3, #0]
 8002124:	bd70      	pop	{r4, r5, r6, pc}
 8002126:	bf00      	nop
 8002128:	08003228 	.word	0x08003228
 800212c:	08003248 	.word	0x08003248
 8002130:	08003208 	.word	0x08003208

08002134 <puts>:
 8002134:	4b02      	ldr	r3, [pc, #8]	; (8002140 <puts+0xc>)
 8002136:	4601      	mov	r1, r0
 8002138:	6818      	ldr	r0, [r3, #0]
 800213a:	f7ff bf9f 	b.w	800207c <_puts_r>
 800213e:	bf00      	nop
 8002140:	20000010 	.word	0x20000010

08002144 <setbuf>:
 8002144:	2900      	cmp	r1, #0
 8002146:	f44f 6380 	mov.w	r3, #1024	; 0x400
 800214a:	bf0c      	ite	eq
 800214c:	2202      	moveq	r2, #2
 800214e:	2200      	movne	r2, #0
 8002150:	f000 b800 	b.w	8002154 <setvbuf>

08002154 <setvbuf>:
 8002154:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 8002158:	461d      	mov	r5, r3
 800215a:	4b51      	ldr	r3, [pc, #324]	; (80022a0 <setvbuf+0x14c>)
 800215c:	4604      	mov	r4, r0
 800215e:	681e      	ldr	r6, [r3, #0]
 8002160:	460f      	mov	r7, r1
 8002162:	4690      	mov	r8, r2
 8002164:	b126      	cbz	r6, 8002170 <setvbuf+0x1c>
 8002166:	69b3      	ldr	r3, [r6, #24]
 8002168:	b913      	cbnz	r3, 8002170 <setvbuf+0x1c>
 800216a:	4630      	mov	r0, r6
 800216c:	f000 fa52 	bl	8002614 <__sinit>
 8002170:	4b4c      	ldr	r3, [pc, #304]	; (80022a4 <setvbuf+0x150>)
 8002172:	429c      	cmp	r4, r3
 8002174:	d152      	bne.n	800221c <setvbuf+0xc8>
 8002176:	6874      	ldr	r4, [r6, #4]
 8002178:	f1b8 0f02 	cmp.w	r8, #2
 800217c:	d006      	beq.n	800218c <setvbuf+0x38>
 800217e:	f1b8 0f01 	cmp.w	r8, #1
 8002182:	f200 8089 	bhi.w	8002298 <setvbuf+0x144>
 8002186:	2d00      	cmp	r5, #0
 8002188:	f2c0 8086 	blt.w	8002298 <setvbuf+0x144>
 800218c:	4621      	mov	r1, r4
 800218e:	4630      	mov	r0, r6
 8002190:	f000 f9d6 	bl	8002540 <_fflush_r>
 8002194:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8002196:	b141      	cbz	r1, 80021aa <setvbuf+0x56>
 8002198:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800219c:	4299      	cmp	r1, r3
 800219e:	d002      	beq.n	80021a6 <setvbuf+0x52>
 80021a0:	4630      	mov	r0, r6
 80021a2:	f000 fb2d 	bl	8002800 <_free_r>
 80021a6:	2300      	movs	r3, #0
 80021a8:	6363      	str	r3, [r4, #52]	; 0x34
 80021aa:	2300      	movs	r3, #0
 80021ac:	61a3      	str	r3, [r4, #24]
 80021ae:	6063      	str	r3, [r4, #4]
 80021b0:	89a3      	ldrh	r3, [r4, #12]
 80021b2:	061b      	lsls	r3, r3, #24
 80021b4:	d503      	bpl.n	80021be <setvbuf+0x6a>
 80021b6:	6921      	ldr	r1, [r4, #16]
 80021b8:	4630      	mov	r0, r6
 80021ba:	f000 fb21 	bl	8002800 <_free_r>
 80021be:	89a3      	ldrh	r3, [r4, #12]
 80021c0:	f1b8 0f02 	cmp.w	r8, #2
 80021c4:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 80021c8:	f023 0303 	bic.w	r3, r3, #3
 80021cc:	81a3      	strh	r3, [r4, #12]
 80021ce:	d05d      	beq.n	800228c <setvbuf+0x138>
 80021d0:	ab01      	add	r3, sp, #4
 80021d2:	466a      	mov	r2, sp
 80021d4:	4621      	mov	r1, r4
 80021d6:	4630      	mov	r0, r6
 80021d8:	f000 faa6 	bl	8002728 <__swhatbuf_r>
 80021dc:	89a3      	ldrh	r3, [r4, #12]
 80021de:	4318      	orrs	r0, r3
 80021e0:	81a0      	strh	r0, [r4, #12]
 80021e2:	bb2d      	cbnz	r5, 8002230 <setvbuf+0xdc>
 80021e4:	9d00      	ldr	r5, [sp, #0]
 80021e6:	4628      	mov	r0, r5
 80021e8:	f000 fb02 	bl	80027f0 <malloc>
 80021ec:	4607      	mov	r7, r0
 80021ee:	2800      	cmp	r0, #0
 80021f0:	d14e      	bne.n	8002290 <setvbuf+0x13c>
 80021f2:	f8dd 9000 	ldr.w	r9, [sp]
 80021f6:	45a9      	cmp	r9, r5
 80021f8:	d13c      	bne.n	8002274 <setvbuf+0x120>
 80021fa:	f04f 30ff 	mov.w	r0, #4294967295
 80021fe:	89a3      	ldrh	r3, [r4, #12]
 8002200:	f043 0302 	orr.w	r3, r3, #2
 8002204:	81a3      	strh	r3, [r4, #12]
 8002206:	2300      	movs	r3, #0
 8002208:	60a3      	str	r3, [r4, #8]
 800220a:	f104 0347 	add.w	r3, r4, #71	; 0x47
 800220e:	6023      	str	r3, [r4, #0]
 8002210:	6123      	str	r3, [r4, #16]
 8002212:	2301      	movs	r3, #1
 8002214:	6163      	str	r3, [r4, #20]
 8002216:	b003      	add	sp, #12
 8002218:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 800221c:	4b22      	ldr	r3, [pc, #136]	; (80022a8 <setvbuf+0x154>)
 800221e:	429c      	cmp	r4, r3
 8002220:	d101      	bne.n	8002226 <setvbuf+0xd2>
 8002222:	68b4      	ldr	r4, [r6, #8]
 8002224:	e7a8      	b.n	8002178 <setvbuf+0x24>
 8002226:	4b21      	ldr	r3, [pc, #132]	; (80022ac <setvbuf+0x158>)
 8002228:	429c      	cmp	r4, r3
 800222a:	bf08      	it	eq
 800222c:	68f4      	ldreq	r4, [r6, #12]
 800222e:	e7a3      	b.n	8002178 <setvbuf+0x24>
 8002230:	2f00      	cmp	r7, #0
 8002232:	d0d8      	beq.n	80021e6 <setvbuf+0x92>
 8002234:	69b3      	ldr	r3, [r6, #24]
 8002236:	b913      	cbnz	r3, 800223e <setvbuf+0xea>
 8002238:	4630      	mov	r0, r6
 800223a:	f000 f9eb 	bl	8002614 <__sinit>
 800223e:	f1b8 0f01 	cmp.w	r8, #1
 8002242:	bf08      	it	eq
 8002244:	89a3      	ldrheq	r3, [r4, #12]
 8002246:	6027      	str	r7, [r4, #0]
 8002248:	bf04      	itt	eq
 800224a:	f043 0301 	orreq.w	r3, r3, #1
 800224e:	81a3      	strheq	r3, [r4, #12]
 8002250:	89a3      	ldrh	r3, [r4, #12]
 8002252:	6127      	str	r7, [r4, #16]
 8002254:	f013 0008 	ands.w	r0, r3, #8
 8002258:	6165      	str	r5, [r4, #20]
 800225a:	d01b      	beq.n	8002294 <setvbuf+0x140>
 800225c:	f013 0001 	ands.w	r0, r3, #1
 8002260:	f04f 0300 	mov.w	r3, #0
 8002264:	bf1f      	itttt	ne
 8002266:	426d      	negne	r5, r5
 8002268:	60a3      	strne	r3, [r4, #8]
 800226a:	61a5      	strne	r5, [r4, #24]
 800226c:	4618      	movne	r0, r3
 800226e:	bf08      	it	eq
 8002270:	60a5      	streq	r5, [r4, #8]
 8002272:	e7d0      	b.n	8002216 <setvbuf+0xc2>
 8002274:	4648      	mov	r0, r9
 8002276:	f000 fabb 	bl	80027f0 <malloc>
 800227a:	4607      	mov	r7, r0
 800227c:	2800      	cmp	r0, #0
 800227e:	d0bc      	beq.n	80021fa <setvbuf+0xa6>
 8002280:	89a3      	ldrh	r3, [r4, #12]
 8002282:	464d      	mov	r5, r9
 8002284:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8002288:	81a3      	strh	r3, [r4, #12]
 800228a:	e7d3      	b.n	8002234 <setvbuf+0xe0>
 800228c:	2000      	movs	r0, #0
 800228e:	e7b6      	b.n	80021fe <setvbuf+0xaa>
 8002290:	46a9      	mov	r9, r5
 8002292:	e7f5      	b.n	8002280 <setvbuf+0x12c>
 8002294:	60a0      	str	r0, [r4, #8]
 8002296:	e7be      	b.n	8002216 <setvbuf+0xc2>
 8002298:	f04f 30ff 	mov.w	r0, #4294967295
 800229c:	e7bb      	b.n	8002216 <setvbuf+0xc2>
 800229e:	bf00      	nop
 80022a0:	20000010 	.word	0x20000010
 80022a4:	08003228 	.word	0x08003228
 80022a8:	08003248 	.word	0x08003248
 80022ac:	08003208 	.word	0x08003208

080022b0 <__swbuf_r>:
 80022b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80022b2:	460e      	mov	r6, r1
 80022b4:	4614      	mov	r4, r2
 80022b6:	4605      	mov	r5, r0
 80022b8:	b118      	cbz	r0, 80022c2 <__swbuf_r+0x12>
 80022ba:	6983      	ldr	r3, [r0, #24]
 80022bc:	b90b      	cbnz	r3, 80022c2 <__swbuf_r+0x12>
 80022be:	f000 f9a9 	bl	8002614 <__sinit>
 80022c2:	4b21      	ldr	r3, [pc, #132]	; (8002348 <__swbuf_r+0x98>)
 80022c4:	429c      	cmp	r4, r3
 80022c6:	d12a      	bne.n	800231e <__swbuf_r+0x6e>
 80022c8:	686c      	ldr	r4, [r5, #4]
 80022ca:	69a3      	ldr	r3, [r4, #24]
 80022cc:	60a3      	str	r3, [r4, #8]
 80022ce:	89a3      	ldrh	r3, [r4, #12]
 80022d0:	071a      	lsls	r2, r3, #28
 80022d2:	d52e      	bpl.n	8002332 <__swbuf_r+0x82>
 80022d4:	6923      	ldr	r3, [r4, #16]
 80022d6:	b363      	cbz	r3, 8002332 <__swbuf_r+0x82>
 80022d8:	6923      	ldr	r3, [r4, #16]
 80022da:	6820      	ldr	r0, [r4, #0]
 80022dc:	b2f6      	uxtb	r6, r6
 80022de:	1ac0      	subs	r0, r0, r3
 80022e0:	6963      	ldr	r3, [r4, #20]
 80022e2:	4637      	mov	r7, r6
 80022e4:	4298      	cmp	r0, r3
 80022e6:	db04      	blt.n	80022f2 <__swbuf_r+0x42>
 80022e8:	4621      	mov	r1, r4
 80022ea:	4628      	mov	r0, r5
 80022ec:	f000 f928 	bl	8002540 <_fflush_r>
 80022f0:	bb28      	cbnz	r0, 800233e <__swbuf_r+0x8e>
 80022f2:	68a3      	ldr	r3, [r4, #8]
 80022f4:	3001      	adds	r0, #1
 80022f6:	3b01      	subs	r3, #1
 80022f8:	60a3      	str	r3, [r4, #8]
 80022fa:	6823      	ldr	r3, [r4, #0]
 80022fc:	1c5a      	adds	r2, r3, #1
 80022fe:	6022      	str	r2, [r4, #0]
 8002300:	701e      	strb	r6, [r3, #0]
 8002302:	6963      	ldr	r3, [r4, #20]
 8002304:	4298      	cmp	r0, r3
 8002306:	d004      	beq.n	8002312 <__swbuf_r+0x62>
 8002308:	89a3      	ldrh	r3, [r4, #12]
 800230a:	07db      	lsls	r3, r3, #31
 800230c:	d519      	bpl.n	8002342 <__swbuf_r+0x92>
 800230e:	2e0a      	cmp	r6, #10
 8002310:	d117      	bne.n	8002342 <__swbuf_r+0x92>
 8002312:	4621      	mov	r1, r4
 8002314:	4628      	mov	r0, r5
 8002316:	f000 f913 	bl	8002540 <_fflush_r>
 800231a:	b190      	cbz	r0, 8002342 <__swbuf_r+0x92>
 800231c:	e00f      	b.n	800233e <__swbuf_r+0x8e>
 800231e:	4b0b      	ldr	r3, [pc, #44]	; (800234c <__swbuf_r+0x9c>)
 8002320:	429c      	cmp	r4, r3
 8002322:	d101      	bne.n	8002328 <__swbuf_r+0x78>
 8002324:	68ac      	ldr	r4, [r5, #8]
 8002326:	e7d0      	b.n	80022ca <__swbuf_r+0x1a>
 8002328:	4b09      	ldr	r3, [pc, #36]	; (8002350 <__swbuf_r+0xa0>)
 800232a:	429c      	cmp	r4, r3
 800232c:	bf08      	it	eq
 800232e:	68ec      	ldreq	r4, [r5, #12]
 8002330:	e7cb      	b.n	80022ca <__swbuf_r+0x1a>
 8002332:	4621      	mov	r1, r4
 8002334:	4628      	mov	r0, r5
 8002336:	f000 f80d 	bl	8002354 <__swsetup_r>
 800233a:	2800      	cmp	r0, #0
 800233c:	d0cc      	beq.n	80022d8 <__swbuf_r+0x28>
 800233e:	f04f 37ff 	mov.w	r7, #4294967295
 8002342:	4638      	mov	r0, r7
 8002344:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8002346:	bf00      	nop
 8002348:	08003228 	.word	0x08003228
 800234c:	08003248 	.word	0x08003248
 8002350:	08003208 	.word	0x08003208

08002354 <__swsetup_r>:
 8002354:	4b32      	ldr	r3, [pc, #200]	; (8002420 <__swsetup_r+0xcc>)
 8002356:	b570      	push	{r4, r5, r6, lr}
 8002358:	681d      	ldr	r5, [r3, #0]
 800235a:	4606      	mov	r6, r0
 800235c:	460c      	mov	r4, r1
 800235e:	b125      	cbz	r5, 800236a <__swsetup_r+0x16>
 8002360:	69ab      	ldr	r3, [r5, #24]
 8002362:	b913      	cbnz	r3, 800236a <__swsetup_r+0x16>
 8002364:	4628      	mov	r0, r5
 8002366:	f000 f955 	bl	8002614 <__sinit>
 800236a:	4b2e      	ldr	r3, [pc, #184]	; (8002424 <__swsetup_r+0xd0>)
 800236c:	429c      	cmp	r4, r3
 800236e:	d10f      	bne.n	8002390 <__swsetup_r+0x3c>
 8002370:	686c      	ldr	r4, [r5, #4]
 8002372:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002376:	b29a      	uxth	r2, r3
 8002378:	0715      	lsls	r5, r2, #28
 800237a:	d42c      	bmi.n	80023d6 <__swsetup_r+0x82>
 800237c:	06d0      	lsls	r0, r2, #27
 800237e:	d411      	bmi.n	80023a4 <__swsetup_r+0x50>
 8002380:	2209      	movs	r2, #9
 8002382:	6032      	str	r2, [r6, #0]
 8002384:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8002388:	81a3      	strh	r3, [r4, #12]
 800238a:	f04f 30ff 	mov.w	r0, #4294967295
 800238e:	bd70      	pop	{r4, r5, r6, pc}
 8002390:	4b25      	ldr	r3, [pc, #148]	; (8002428 <__swsetup_r+0xd4>)
 8002392:	429c      	cmp	r4, r3
 8002394:	d101      	bne.n	800239a <__swsetup_r+0x46>
 8002396:	68ac      	ldr	r4, [r5, #8]
 8002398:	e7eb      	b.n	8002372 <__swsetup_r+0x1e>
 800239a:	4b24      	ldr	r3, [pc, #144]	; (800242c <__swsetup_r+0xd8>)
 800239c:	429c      	cmp	r4, r3
 800239e:	bf08      	it	eq
 80023a0:	68ec      	ldreq	r4, [r5, #12]
 80023a2:	e7e6      	b.n	8002372 <__swsetup_r+0x1e>
 80023a4:	0751      	lsls	r1, r2, #29
 80023a6:	d512      	bpl.n	80023ce <__swsetup_r+0x7a>
 80023a8:	6b61      	ldr	r1, [r4, #52]	; 0x34
 80023aa:	b141      	cbz	r1, 80023be <__swsetup_r+0x6a>
 80023ac:	f104 0344 	add.w	r3, r4, #68	; 0x44
 80023b0:	4299      	cmp	r1, r3
 80023b2:	d002      	beq.n	80023ba <__swsetup_r+0x66>
 80023b4:	4630      	mov	r0, r6
 80023b6:	f000 fa23 	bl	8002800 <_free_r>
 80023ba:	2300      	movs	r3, #0
 80023bc:	6363      	str	r3, [r4, #52]	; 0x34
 80023be:	89a3      	ldrh	r3, [r4, #12]
 80023c0:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 80023c4:	81a3      	strh	r3, [r4, #12]
 80023c6:	2300      	movs	r3, #0
 80023c8:	6063      	str	r3, [r4, #4]
 80023ca:	6923      	ldr	r3, [r4, #16]
 80023cc:	6023      	str	r3, [r4, #0]
 80023ce:	89a3      	ldrh	r3, [r4, #12]
 80023d0:	f043 0308 	orr.w	r3, r3, #8
 80023d4:	81a3      	strh	r3, [r4, #12]
 80023d6:	6923      	ldr	r3, [r4, #16]
 80023d8:	b94b      	cbnz	r3, 80023ee <__swsetup_r+0x9a>
 80023da:	89a3      	ldrh	r3, [r4, #12]
 80023dc:	f403 7320 	and.w	r3, r3, #640	; 0x280
 80023e0:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 80023e4:	d003      	beq.n	80023ee <__swsetup_r+0x9a>
 80023e6:	4621      	mov	r1, r4
 80023e8:	4630      	mov	r0, r6
 80023ea:	f000 f9c1 	bl	8002770 <__smakebuf_r>
 80023ee:	89a2      	ldrh	r2, [r4, #12]
 80023f0:	f012 0301 	ands.w	r3, r2, #1
 80023f4:	d00c      	beq.n	8002410 <__swsetup_r+0xbc>
 80023f6:	2300      	movs	r3, #0
 80023f8:	60a3      	str	r3, [r4, #8]
 80023fa:	6963      	ldr	r3, [r4, #20]
 80023fc:	425b      	negs	r3, r3
 80023fe:	61a3      	str	r3, [r4, #24]
 8002400:	6923      	ldr	r3, [r4, #16]
 8002402:	b953      	cbnz	r3, 800241a <__swsetup_r+0xc6>
 8002404:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002408:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 800240c:	d1ba      	bne.n	8002384 <__swsetup_r+0x30>
 800240e:	bd70      	pop	{r4, r5, r6, pc}
 8002410:	0792      	lsls	r2, r2, #30
 8002412:	bf58      	it	pl
 8002414:	6963      	ldrpl	r3, [r4, #20]
 8002416:	60a3      	str	r3, [r4, #8]
 8002418:	e7f2      	b.n	8002400 <__swsetup_r+0xac>
 800241a:	2000      	movs	r0, #0
 800241c:	e7f7      	b.n	800240e <__swsetup_r+0xba>
 800241e:	bf00      	nop
 8002420:	20000010 	.word	0x20000010
 8002424:	08003228 	.word	0x08003228
 8002428:	08003248 	.word	0x08003248
 800242c:	08003208 	.word	0x08003208

08002430 <__sflush_r>:
 8002430:	898a      	ldrh	r2, [r1, #12]
 8002432:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8002436:	4605      	mov	r5, r0
 8002438:	0710      	lsls	r0, r2, #28
 800243a:	460c      	mov	r4, r1
 800243c:	d45a      	bmi.n	80024f4 <__sflush_r+0xc4>
 800243e:	684b      	ldr	r3, [r1, #4]
 8002440:	2b00      	cmp	r3, #0
 8002442:	dc05      	bgt.n	8002450 <__sflush_r+0x20>
 8002444:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 8002446:	2b00      	cmp	r3, #0
 8002448:	dc02      	bgt.n	8002450 <__sflush_r+0x20>
 800244a:	2000      	movs	r0, #0
 800244c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8002450:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8002452:	2e00      	cmp	r6, #0
 8002454:	d0f9      	beq.n	800244a <__sflush_r+0x1a>
 8002456:	2300      	movs	r3, #0
 8002458:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 800245c:	682f      	ldr	r7, [r5, #0]
 800245e:	602b      	str	r3, [r5, #0]
 8002460:	d033      	beq.n	80024ca <__sflush_r+0x9a>
 8002462:	6d60      	ldr	r0, [r4, #84]	; 0x54
 8002464:	89a3      	ldrh	r3, [r4, #12]
 8002466:	075a      	lsls	r2, r3, #29
 8002468:	d505      	bpl.n	8002476 <__sflush_r+0x46>
 800246a:	6863      	ldr	r3, [r4, #4]
 800246c:	1ac0      	subs	r0, r0, r3
 800246e:	6b63      	ldr	r3, [r4, #52]	; 0x34
 8002470:	b10b      	cbz	r3, 8002476 <__sflush_r+0x46>
 8002472:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8002474:	1ac0      	subs	r0, r0, r3
 8002476:	2300      	movs	r3, #0
 8002478:	4602      	mov	r2, r0
 800247a:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800247c:	6a21      	ldr	r1, [r4, #32]
 800247e:	4628      	mov	r0, r5
 8002480:	47b0      	blx	r6
 8002482:	1c43      	adds	r3, r0, #1
 8002484:	89a3      	ldrh	r3, [r4, #12]
 8002486:	d106      	bne.n	8002496 <__sflush_r+0x66>
 8002488:	6829      	ldr	r1, [r5, #0]
 800248a:	291d      	cmp	r1, #29
 800248c:	d84b      	bhi.n	8002526 <__sflush_r+0xf6>
 800248e:	4a2b      	ldr	r2, [pc, #172]	; (800253c <__sflush_r+0x10c>)
 8002490:	40ca      	lsrs	r2, r1
 8002492:	07d6      	lsls	r6, r2, #31
 8002494:	d547      	bpl.n	8002526 <__sflush_r+0xf6>
 8002496:	2200      	movs	r2, #0
 8002498:	6062      	str	r2, [r4, #4]
 800249a:	6922      	ldr	r2, [r4, #16]
 800249c:	04d9      	lsls	r1, r3, #19
 800249e:	6022      	str	r2, [r4, #0]
 80024a0:	d504      	bpl.n	80024ac <__sflush_r+0x7c>
 80024a2:	1c42      	adds	r2, r0, #1
 80024a4:	d101      	bne.n	80024aa <__sflush_r+0x7a>
 80024a6:	682b      	ldr	r3, [r5, #0]
 80024a8:	b903      	cbnz	r3, 80024ac <__sflush_r+0x7c>
 80024aa:	6560      	str	r0, [r4, #84]	; 0x54
 80024ac:	6b61      	ldr	r1, [r4, #52]	; 0x34
 80024ae:	602f      	str	r7, [r5, #0]
 80024b0:	2900      	cmp	r1, #0
 80024b2:	d0ca      	beq.n	800244a <__sflush_r+0x1a>
 80024b4:	f104 0344 	add.w	r3, r4, #68	; 0x44
 80024b8:	4299      	cmp	r1, r3
 80024ba:	d002      	beq.n	80024c2 <__sflush_r+0x92>
 80024bc:	4628      	mov	r0, r5
 80024be:	f000 f99f 	bl	8002800 <_free_r>
 80024c2:	2000      	movs	r0, #0
 80024c4:	6360      	str	r0, [r4, #52]	; 0x34
 80024c6:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80024ca:	6a21      	ldr	r1, [r4, #32]
 80024cc:	2301      	movs	r3, #1
 80024ce:	4628      	mov	r0, r5
 80024d0:	47b0      	blx	r6
 80024d2:	1c41      	adds	r1, r0, #1
 80024d4:	d1c6      	bne.n	8002464 <__sflush_r+0x34>
 80024d6:	682b      	ldr	r3, [r5, #0]
 80024d8:	2b00      	cmp	r3, #0
 80024da:	d0c3      	beq.n	8002464 <__sflush_r+0x34>
 80024dc:	2b1d      	cmp	r3, #29
 80024de:	d001      	beq.n	80024e4 <__sflush_r+0xb4>
 80024e0:	2b16      	cmp	r3, #22
 80024e2:	d101      	bne.n	80024e8 <__sflush_r+0xb8>
 80024e4:	602f      	str	r7, [r5, #0]
 80024e6:	e7b0      	b.n	800244a <__sflush_r+0x1a>
 80024e8:	89a3      	ldrh	r3, [r4, #12]
 80024ea:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 80024ee:	81a3      	strh	r3, [r4, #12]
 80024f0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80024f4:	690f      	ldr	r7, [r1, #16]
 80024f6:	2f00      	cmp	r7, #0
 80024f8:	d0a7      	beq.n	800244a <__sflush_r+0x1a>
 80024fa:	0793      	lsls	r3, r2, #30
 80024fc:	bf18      	it	ne
 80024fe:	2300      	movne	r3, #0
 8002500:	680e      	ldr	r6, [r1, #0]
 8002502:	bf08      	it	eq
 8002504:	694b      	ldreq	r3, [r1, #20]
 8002506:	eba6 0807 	sub.w	r8, r6, r7
 800250a:	600f      	str	r7, [r1, #0]
 800250c:	608b      	str	r3, [r1, #8]
 800250e:	f1b8 0f00 	cmp.w	r8, #0
 8002512:	dd9a      	ble.n	800244a <__sflush_r+0x1a>
 8002514:	4643      	mov	r3, r8
 8002516:	463a      	mov	r2, r7
 8002518:	6a21      	ldr	r1, [r4, #32]
 800251a:	4628      	mov	r0, r5
 800251c:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 800251e:	47b0      	blx	r6
 8002520:	2800      	cmp	r0, #0
 8002522:	dc07      	bgt.n	8002534 <__sflush_r+0x104>
 8002524:	89a3      	ldrh	r3, [r4, #12]
 8002526:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800252a:	81a3      	strh	r3, [r4, #12]
 800252c:	f04f 30ff 	mov.w	r0, #4294967295
 8002530:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8002534:	4407      	add	r7, r0
 8002536:	eba8 0800 	sub.w	r8, r8, r0
 800253a:	e7e8      	b.n	800250e <__sflush_r+0xde>
 800253c:	20400001 	.word	0x20400001

08002540 <_fflush_r>:
 8002540:	b538      	push	{r3, r4, r5, lr}
 8002542:	690b      	ldr	r3, [r1, #16]
 8002544:	4605      	mov	r5, r0
 8002546:	460c      	mov	r4, r1
 8002548:	b1db      	cbz	r3, 8002582 <_fflush_r+0x42>
 800254a:	b118      	cbz	r0, 8002554 <_fflush_r+0x14>
 800254c:	6983      	ldr	r3, [r0, #24]
 800254e:	b90b      	cbnz	r3, 8002554 <_fflush_r+0x14>
 8002550:	f000 f860 	bl	8002614 <__sinit>
 8002554:	4b0c      	ldr	r3, [pc, #48]	; (8002588 <_fflush_r+0x48>)
 8002556:	429c      	cmp	r4, r3
 8002558:	d109      	bne.n	800256e <_fflush_r+0x2e>
 800255a:	686c      	ldr	r4, [r5, #4]
 800255c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002560:	b17b      	cbz	r3, 8002582 <_fflush_r+0x42>
 8002562:	4621      	mov	r1, r4
 8002564:	4628      	mov	r0, r5
 8002566:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800256a:	f7ff bf61 	b.w	8002430 <__sflush_r>
 800256e:	4b07      	ldr	r3, [pc, #28]	; (800258c <_fflush_r+0x4c>)
 8002570:	429c      	cmp	r4, r3
 8002572:	d101      	bne.n	8002578 <_fflush_r+0x38>
 8002574:	68ac      	ldr	r4, [r5, #8]
 8002576:	e7f1      	b.n	800255c <_fflush_r+0x1c>
 8002578:	4b05      	ldr	r3, [pc, #20]	; (8002590 <_fflush_r+0x50>)
 800257a:	429c      	cmp	r4, r3
 800257c:	bf08      	it	eq
 800257e:	68ec      	ldreq	r4, [r5, #12]
 8002580:	e7ec      	b.n	800255c <_fflush_r+0x1c>
 8002582:	2000      	movs	r0, #0
 8002584:	bd38      	pop	{r3, r4, r5, pc}
 8002586:	bf00      	nop
 8002588:	08003228 	.word	0x08003228
 800258c:	08003248 	.word	0x08003248
 8002590:	08003208 	.word	0x08003208

08002594 <_cleanup_r>:
 8002594:	4901      	ldr	r1, [pc, #4]	; (800259c <_cleanup_r+0x8>)
 8002596:	f000 b8a9 	b.w	80026ec <_fwalk_reent>
 800259a:	bf00      	nop
 800259c:	08002541 	.word	0x08002541

080025a0 <std.isra.0>:
 80025a0:	2300      	movs	r3, #0
 80025a2:	b510      	push	{r4, lr}
 80025a4:	4604      	mov	r4, r0
 80025a6:	6003      	str	r3, [r0, #0]
 80025a8:	6043      	str	r3, [r0, #4]
 80025aa:	6083      	str	r3, [r0, #8]
 80025ac:	8181      	strh	r1, [r0, #12]
 80025ae:	6643      	str	r3, [r0, #100]	; 0x64
 80025b0:	81c2      	strh	r2, [r0, #14]
 80025b2:	6103      	str	r3, [r0, #16]
 80025b4:	6143      	str	r3, [r0, #20]
 80025b6:	6183      	str	r3, [r0, #24]
 80025b8:	4619      	mov	r1, r3
 80025ba:	2208      	movs	r2, #8
 80025bc:	305c      	adds	r0, #92	; 0x5c
 80025be:	f7ff fd3c 	bl	800203a <memset>
 80025c2:	4b05      	ldr	r3, [pc, #20]	; (80025d8 <std.isra.0+0x38>)
 80025c4:	6224      	str	r4, [r4, #32]
 80025c6:	6263      	str	r3, [r4, #36]	; 0x24
 80025c8:	4b04      	ldr	r3, [pc, #16]	; (80025dc <std.isra.0+0x3c>)
 80025ca:	62a3      	str	r3, [r4, #40]	; 0x28
 80025cc:	4b04      	ldr	r3, [pc, #16]	; (80025e0 <std.isra.0+0x40>)
 80025ce:	62e3      	str	r3, [r4, #44]	; 0x2c
 80025d0:	4b04      	ldr	r3, [pc, #16]	; (80025e4 <std.isra.0+0x44>)
 80025d2:	6323      	str	r3, [r4, #48]	; 0x30
 80025d4:	bd10      	pop	{r4, pc}
 80025d6:	bf00      	nop
 80025d8:	08002f21 	.word	0x08002f21
 80025dc:	08002f43 	.word	0x08002f43
 80025e0:	08002f7b 	.word	0x08002f7b
 80025e4:	08002f9f 	.word	0x08002f9f

080025e8 <__sfmoreglue>:
 80025e8:	b570      	push	{r4, r5, r6, lr}
 80025ea:	2568      	movs	r5, #104	; 0x68
 80025ec:	1e4a      	subs	r2, r1, #1
 80025ee:	4355      	muls	r5, r2
 80025f0:	460e      	mov	r6, r1
 80025f2:	f105 0174 	add.w	r1, r5, #116	; 0x74
 80025f6:	f000 f94f 	bl	8002898 <_malloc_r>
 80025fa:	4604      	mov	r4, r0
 80025fc:	b140      	cbz	r0, 8002610 <__sfmoreglue+0x28>
 80025fe:	2100      	movs	r1, #0
 8002600:	e880 0042 	stmia.w	r0, {r1, r6}
 8002604:	300c      	adds	r0, #12
 8002606:	60a0      	str	r0, [r4, #8]
 8002608:	f105 0268 	add.w	r2, r5, #104	; 0x68
 800260c:	f7ff fd15 	bl	800203a <memset>
 8002610:	4620      	mov	r0, r4
 8002612:	bd70      	pop	{r4, r5, r6, pc}

08002614 <__sinit>:
 8002614:	6983      	ldr	r3, [r0, #24]
 8002616:	b510      	push	{r4, lr}
 8002618:	4604      	mov	r4, r0
 800261a:	bb33      	cbnz	r3, 800266a <__sinit+0x56>
 800261c:	6483      	str	r3, [r0, #72]	; 0x48
 800261e:	64c3      	str	r3, [r0, #76]	; 0x4c
 8002620:	6503      	str	r3, [r0, #80]	; 0x50
 8002622:	4b12      	ldr	r3, [pc, #72]	; (800266c <__sinit+0x58>)
 8002624:	4a12      	ldr	r2, [pc, #72]	; (8002670 <__sinit+0x5c>)
 8002626:	681b      	ldr	r3, [r3, #0]
 8002628:	6282      	str	r2, [r0, #40]	; 0x28
 800262a:	4298      	cmp	r0, r3
 800262c:	bf04      	itt	eq
 800262e:	2301      	moveq	r3, #1
 8002630:	6183      	streq	r3, [r0, #24]
 8002632:	f000 f81f 	bl	8002674 <__sfp>
 8002636:	6060      	str	r0, [r4, #4]
 8002638:	4620      	mov	r0, r4
 800263a:	f000 f81b 	bl	8002674 <__sfp>
 800263e:	60a0      	str	r0, [r4, #8]
 8002640:	4620      	mov	r0, r4
 8002642:	f000 f817 	bl	8002674 <__sfp>
 8002646:	2200      	movs	r2, #0
 8002648:	60e0      	str	r0, [r4, #12]
 800264a:	2104      	movs	r1, #4
 800264c:	6860      	ldr	r0, [r4, #4]
 800264e:	f7ff ffa7 	bl	80025a0 <std.isra.0>
 8002652:	2201      	movs	r2, #1
 8002654:	2109      	movs	r1, #9
 8002656:	68a0      	ldr	r0, [r4, #8]
 8002658:	f7ff ffa2 	bl	80025a0 <std.isra.0>
 800265c:	2202      	movs	r2, #2
 800265e:	2112      	movs	r1, #18
 8002660:	68e0      	ldr	r0, [r4, #12]
 8002662:	f7ff ff9d 	bl	80025a0 <std.isra.0>
 8002666:	2301      	movs	r3, #1
 8002668:	61a3      	str	r3, [r4, #24]
 800266a:	bd10      	pop	{r4, pc}
 800266c:	08003204 	.word	0x08003204
 8002670:	08002595 	.word	0x08002595

08002674 <__sfp>:
 8002674:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002676:	4b1c      	ldr	r3, [pc, #112]	; (80026e8 <__sfp+0x74>)
 8002678:	4607      	mov	r7, r0
 800267a:	681e      	ldr	r6, [r3, #0]
 800267c:	69b3      	ldr	r3, [r6, #24]
 800267e:	b913      	cbnz	r3, 8002686 <__sfp+0x12>
 8002680:	4630      	mov	r0, r6
 8002682:	f7ff ffc7 	bl	8002614 <__sinit>
 8002686:	3648      	adds	r6, #72	; 0x48
 8002688:	68b4      	ldr	r4, [r6, #8]
 800268a:	6873      	ldr	r3, [r6, #4]
 800268c:	3b01      	subs	r3, #1
 800268e:	d503      	bpl.n	8002698 <__sfp+0x24>
 8002690:	6833      	ldr	r3, [r6, #0]
 8002692:	b133      	cbz	r3, 80026a2 <__sfp+0x2e>
 8002694:	6836      	ldr	r6, [r6, #0]
 8002696:	e7f7      	b.n	8002688 <__sfp+0x14>
 8002698:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 800269c:	b16d      	cbz	r5, 80026ba <__sfp+0x46>
 800269e:	3468      	adds	r4, #104	; 0x68
 80026a0:	e7f4      	b.n	800268c <__sfp+0x18>
 80026a2:	2104      	movs	r1, #4
 80026a4:	4638      	mov	r0, r7
 80026a6:	f7ff ff9f 	bl	80025e8 <__sfmoreglue>
 80026aa:	6030      	str	r0, [r6, #0]
 80026ac:	2800      	cmp	r0, #0
 80026ae:	d1f1      	bne.n	8002694 <__sfp+0x20>
 80026b0:	230c      	movs	r3, #12
 80026b2:	4604      	mov	r4, r0
 80026b4:	603b      	str	r3, [r7, #0]
 80026b6:	4620      	mov	r0, r4
 80026b8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 80026ba:	f64f 73ff 	movw	r3, #65535	; 0xffff
 80026be:	81e3      	strh	r3, [r4, #14]
 80026c0:	2301      	movs	r3, #1
 80026c2:	6665      	str	r5, [r4, #100]	; 0x64
 80026c4:	81a3      	strh	r3, [r4, #12]
 80026c6:	6025      	str	r5, [r4, #0]
 80026c8:	60a5      	str	r5, [r4, #8]
 80026ca:	6065      	str	r5, [r4, #4]
 80026cc:	6125      	str	r5, [r4, #16]
 80026ce:	6165      	str	r5, [r4, #20]
 80026d0:	61a5      	str	r5, [r4, #24]
 80026d2:	2208      	movs	r2, #8
 80026d4:	4629      	mov	r1, r5
 80026d6:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 80026da:	f7ff fcae 	bl	800203a <memset>
 80026de:	6365      	str	r5, [r4, #52]	; 0x34
 80026e0:	63a5      	str	r5, [r4, #56]	; 0x38
 80026e2:	64a5      	str	r5, [r4, #72]	; 0x48
 80026e4:	64e5      	str	r5, [r4, #76]	; 0x4c
 80026e6:	e7e6      	b.n	80026b6 <__sfp+0x42>
 80026e8:	08003204 	.word	0x08003204

080026ec <_fwalk_reent>:
 80026ec:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 80026f0:	4680      	mov	r8, r0
 80026f2:	4689      	mov	r9, r1
 80026f4:	2600      	movs	r6, #0
 80026f6:	f100 0448 	add.w	r4, r0, #72	; 0x48
 80026fa:	b914      	cbnz	r4, 8002702 <_fwalk_reent+0x16>
 80026fc:	4630      	mov	r0, r6
 80026fe:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8002702:	68a5      	ldr	r5, [r4, #8]
 8002704:	6867      	ldr	r7, [r4, #4]
 8002706:	3f01      	subs	r7, #1
 8002708:	d501      	bpl.n	800270e <_fwalk_reent+0x22>
 800270a:	6824      	ldr	r4, [r4, #0]
 800270c:	e7f5      	b.n	80026fa <_fwalk_reent+0xe>
 800270e:	89ab      	ldrh	r3, [r5, #12]
 8002710:	2b01      	cmp	r3, #1
 8002712:	d907      	bls.n	8002724 <_fwalk_reent+0x38>
 8002714:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 8002718:	3301      	adds	r3, #1
 800271a:	d003      	beq.n	8002724 <_fwalk_reent+0x38>
 800271c:	4629      	mov	r1, r5
 800271e:	4640      	mov	r0, r8
 8002720:	47c8      	blx	r9
 8002722:	4306      	orrs	r6, r0
 8002724:	3568      	adds	r5, #104	; 0x68
 8002726:	e7ee      	b.n	8002706 <_fwalk_reent+0x1a>

08002728 <__swhatbuf_r>:
 8002728:	b570      	push	{r4, r5, r6, lr}
 800272a:	460e      	mov	r6, r1
 800272c:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002730:	b090      	sub	sp, #64	; 0x40
 8002732:	2900      	cmp	r1, #0
 8002734:	4614      	mov	r4, r2
 8002736:	461d      	mov	r5, r3
 8002738:	da07      	bge.n	800274a <__swhatbuf_r+0x22>
 800273a:	2300      	movs	r3, #0
 800273c:	602b      	str	r3, [r5, #0]
 800273e:	89b3      	ldrh	r3, [r6, #12]
 8002740:	061a      	lsls	r2, r3, #24
 8002742:	d410      	bmi.n	8002766 <__swhatbuf_r+0x3e>
 8002744:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8002748:	e00e      	b.n	8002768 <__swhatbuf_r+0x40>
 800274a:	aa01      	add	r2, sp, #4
 800274c:	f000 fc4e 	bl	8002fec <_fstat_r>
 8002750:	2800      	cmp	r0, #0
 8002752:	dbf2      	blt.n	800273a <__swhatbuf_r+0x12>
 8002754:	9a02      	ldr	r2, [sp, #8]
 8002756:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 800275a:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 800275e:	425a      	negs	r2, r3
 8002760:	415a      	adcs	r2, r3
 8002762:	602a      	str	r2, [r5, #0]
 8002764:	e7ee      	b.n	8002744 <__swhatbuf_r+0x1c>
 8002766:	2340      	movs	r3, #64	; 0x40
 8002768:	2000      	movs	r0, #0
 800276a:	6023      	str	r3, [r4, #0]
 800276c:	b010      	add	sp, #64	; 0x40
 800276e:	bd70      	pop	{r4, r5, r6, pc}

08002770 <__smakebuf_r>:
 8002770:	898b      	ldrh	r3, [r1, #12]
 8002772:	b573      	push	{r0, r1, r4, r5, r6, lr}
 8002774:	079d      	lsls	r5, r3, #30
 8002776:	4606      	mov	r6, r0
 8002778:	460c      	mov	r4, r1
 800277a:	d507      	bpl.n	800278c <__smakebuf_r+0x1c>
 800277c:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8002780:	6023      	str	r3, [r4, #0]
 8002782:	6123      	str	r3, [r4, #16]
 8002784:	2301      	movs	r3, #1
 8002786:	6163      	str	r3, [r4, #20]
 8002788:	b002      	add	sp, #8
 800278a:	bd70      	pop	{r4, r5, r6, pc}
 800278c:	ab01      	add	r3, sp, #4
 800278e:	466a      	mov	r2, sp
 8002790:	f7ff ffca 	bl	8002728 <__swhatbuf_r>
 8002794:	9900      	ldr	r1, [sp, #0]
 8002796:	4605      	mov	r5, r0
 8002798:	4630      	mov	r0, r6
 800279a:	f000 f87d 	bl	8002898 <_malloc_r>
 800279e:	b948      	cbnz	r0, 80027b4 <__smakebuf_r+0x44>
 80027a0:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80027a4:	059a      	lsls	r2, r3, #22
 80027a6:	d4ef      	bmi.n	8002788 <__smakebuf_r+0x18>
 80027a8:	f023 0303 	bic.w	r3, r3, #3
 80027ac:	f043 0302 	orr.w	r3, r3, #2
 80027b0:	81a3      	strh	r3, [r4, #12]
 80027b2:	e7e3      	b.n	800277c <__smakebuf_r+0xc>
 80027b4:	4b0d      	ldr	r3, [pc, #52]	; (80027ec <__smakebuf_r+0x7c>)
 80027b6:	62b3      	str	r3, [r6, #40]	; 0x28
 80027b8:	89a3      	ldrh	r3, [r4, #12]
 80027ba:	6020      	str	r0, [r4, #0]
 80027bc:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80027c0:	81a3      	strh	r3, [r4, #12]
 80027c2:	9b00      	ldr	r3, [sp, #0]
 80027c4:	6120      	str	r0, [r4, #16]
 80027c6:	6163      	str	r3, [r4, #20]
 80027c8:	9b01      	ldr	r3, [sp, #4]
 80027ca:	b15b      	cbz	r3, 80027e4 <__smakebuf_r+0x74>
 80027cc:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 80027d0:	4630      	mov	r0, r6
 80027d2:	f000 fc1d 	bl	8003010 <_isatty_r>
 80027d6:	b128      	cbz	r0, 80027e4 <__smakebuf_r+0x74>
 80027d8:	89a3      	ldrh	r3, [r4, #12]
 80027da:	f023 0303 	bic.w	r3, r3, #3
 80027de:	f043 0301 	orr.w	r3, r3, #1
 80027e2:	81a3      	strh	r3, [r4, #12]
 80027e4:	89a3      	ldrh	r3, [r4, #12]
 80027e6:	431d      	orrs	r5, r3
 80027e8:	81a5      	strh	r5, [r4, #12]
 80027ea:	e7cd      	b.n	8002788 <__smakebuf_r+0x18>
 80027ec:	08002595 	.word	0x08002595

080027f0 <malloc>:
 80027f0:	4b02      	ldr	r3, [pc, #8]	; (80027fc <malloc+0xc>)
 80027f2:	4601      	mov	r1, r0
 80027f4:	6818      	ldr	r0, [r3, #0]
 80027f6:	f000 b84f 	b.w	8002898 <_malloc_r>
 80027fa:	bf00      	nop
 80027fc:	20000010 	.word	0x20000010

08002800 <_free_r>:
 8002800:	b538      	push	{r3, r4, r5, lr}
 8002802:	4605      	mov	r5, r0
 8002804:	2900      	cmp	r1, #0
 8002806:	d043      	beq.n	8002890 <_free_r+0x90>
 8002808:	f851 3c04 	ldr.w	r3, [r1, #-4]
 800280c:	1f0c      	subs	r4, r1, #4
 800280e:	2b00      	cmp	r3, #0
 8002810:	bfb8      	it	lt
 8002812:	18e4      	addlt	r4, r4, r3
 8002814:	f000 fc2c 	bl	8003070 <__malloc_lock>
 8002818:	4a1e      	ldr	r2, [pc, #120]	; (8002894 <_free_r+0x94>)
 800281a:	6813      	ldr	r3, [r2, #0]
 800281c:	4610      	mov	r0, r2
 800281e:	b933      	cbnz	r3, 800282e <_free_r+0x2e>
 8002820:	6063      	str	r3, [r4, #4]
 8002822:	6014      	str	r4, [r2, #0]
 8002824:	4628      	mov	r0, r5
 8002826:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800282a:	f000 bc22 	b.w	8003072 <__malloc_unlock>
 800282e:	42a3      	cmp	r3, r4
 8002830:	d90b      	bls.n	800284a <_free_r+0x4a>
 8002832:	6821      	ldr	r1, [r4, #0]
 8002834:	1862      	adds	r2, r4, r1
 8002836:	4293      	cmp	r3, r2
 8002838:	bf01      	itttt	eq
 800283a:	681a      	ldreq	r2, [r3, #0]
 800283c:	685b      	ldreq	r3, [r3, #4]
 800283e:	1852      	addeq	r2, r2, r1
 8002840:	6022      	streq	r2, [r4, #0]
 8002842:	6063      	str	r3, [r4, #4]
 8002844:	6004      	str	r4, [r0, #0]
 8002846:	e7ed      	b.n	8002824 <_free_r+0x24>
 8002848:	4613      	mov	r3, r2
 800284a:	685a      	ldr	r2, [r3, #4]
 800284c:	b10a      	cbz	r2, 8002852 <_free_r+0x52>
 800284e:	42a2      	cmp	r2, r4
 8002850:	d9fa      	bls.n	8002848 <_free_r+0x48>
 8002852:	6819      	ldr	r1, [r3, #0]
 8002854:	1858      	adds	r0, r3, r1
 8002856:	42a0      	cmp	r0, r4
 8002858:	d10b      	bne.n	8002872 <_free_r+0x72>
 800285a:	6820      	ldr	r0, [r4, #0]
 800285c:	4401      	add	r1, r0
 800285e:	1858      	adds	r0, r3, r1
 8002860:	4282      	cmp	r2, r0
 8002862:	6019      	str	r1, [r3, #0]
 8002864:	d1de      	bne.n	8002824 <_free_r+0x24>
 8002866:	6810      	ldr	r0, [r2, #0]
 8002868:	6852      	ldr	r2, [r2, #4]
 800286a:	4401      	add	r1, r0
 800286c:	6019      	str	r1, [r3, #0]
 800286e:	605a      	str	r2, [r3, #4]
 8002870:	e7d8      	b.n	8002824 <_free_r+0x24>
 8002872:	d902      	bls.n	800287a <_free_r+0x7a>
 8002874:	230c      	movs	r3, #12
 8002876:	602b      	str	r3, [r5, #0]
 8002878:	e7d4      	b.n	8002824 <_free_r+0x24>
 800287a:	6820      	ldr	r0, [r4, #0]
 800287c:	1821      	adds	r1, r4, r0
 800287e:	428a      	cmp	r2, r1
 8002880:	bf01      	itttt	eq
 8002882:	6811      	ldreq	r1, [r2, #0]
 8002884:	6852      	ldreq	r2, [r2, #4]
 8002886:	1809      	addeq	r1, r1, r0
 8002888:	6021      	streq	r1, [r4, #0]
 800288a:	6062      	str	r2, [r4, #4]
 800288c:	605c      	str	r4, [r3, #4]
 800288e:	e7c9      	b.n	8002824 <_free_r+0x24>
 8002890:	bd38      	pop	{r3, r4, r5, pc}
 8002892:	bf00      	nop
 8002894:	20000178 	.word	0x20000178

08002898 <_malloc_r>:
 8002898:	b570      	push	{r4, r5, r6, lr}
 800289a:	1ccd      	adds	r5, r1, #3
 800289c:	f025 0503 	bic.w	r5, r5, #3
 80028a0:	3508      	adds	r5, #8
 80028a2:	2d0c      	cmp	r5, #12
 80028a4:	bf38      	it	cc
 80028a6:	250c      	movcc	r5, #12
 80028a8:	2d00      	cmp	r5, #0
 80028aa:	4606      	mov	r6, r0
 80028ac:	db01      	blt.n	80028b2 <_malloc_r+0x1a>
 80028ae:	42a9      	cmp	r1, r5
 80028b0:	d903      	bls.n	80028ba <_malloc_r+0x22>
 80028b2:	230c      	movs	r3, #12
 80028b4:	6033      	str	r3, [r6, #0]
 80028b6:	2000      	movs	r0, #0
 80028b8:	bd70      	pop	{r4, r5, r6, pc}
 80028ba:	f000 fbd9 	bl	8003070 <__malloc_lock>
 80028be:	4a23      	ldr	r2, [pc, #140]	; (800294c <_malloc_r+0xb4>)
 80028c0:	6814      	ldr	r4, [r2, #0]
 80028c2:	4621      	mov	r1, r4
 80028c4:	b991      	cbnz	r1, 80028ec <_malloc_r+0x54>
 80028c6:	4c22      	ldr	r4, [pc, #136]	; (8002950 <_malloc_r+0xb8>)
 80028c8:	6823      	ldr	r3, [r4, #0]
 80028ca:	b91b      	cbnz	r3, 80028d4 <_malloc_r+0x3c>
 80028cc:	4630      	mov	r0, r6
 80028ce:	f000 fb17 	bl	8002f00 <_sbrk_r>
 80028d2:	6020      	str	r0, [r4, #0]
 80028d4:	4629      	mov	r1, r5
 80028d6:	4630      	mov	r0, r6
 80028d8:	f000 fb12 	bl	8002f00 <_sbrk_r>
 80028dc:	1c43      	adds	r3, r0, #1
 80028de:	d126      	bne.n	800292e <_malloc_r+0x96>
 80028e0:	230c      	movs	r3, #12
 80028e2:	4630      	mov	r0, r6
 80028e4:	6033      	str	r3, [r6, #0]
 80028e6:	f000 fbc4 	bl	8003072 <__malloc_unlock>
 80028ea:	e7e4      	b.n	80028b6 <_malloc_r+0x1e>
 80028ec:	680b      	ldr	r3, [r1, #0]
 80028ee:	1b5b      	subs	r3, r3, r5
 80028f0:	d41a      	bmi.n	8002928 <_malloc_r+0x90>
 80028f2:	2b0b      	cmp	r3, #11
 80028f4:	d90f      	bls.n	8002916 <_malloc_r+0x7e>
 80028f6:	600b      	str	r3, [r1, #0]
 80028f8:	18cc      	adds	r4, r1, r3
 80028fa:	50cd      	str	r5, [r1, r3]
 80028fc:	4630      	mov	r0, r6
 80028fe:	f000 fbb8 	bl	8003072 <__malloc_unlock>
 8002902:	f104 000b 	add.w	r0, r4, #11
 8002906:	1d23      	adds	r3, r4, #4
 8002908:	f020 0007 	bic.w	r0, r0, #7
 800290c:	1ac3      	subs	r3, r0, r3
 800290e:	d01b      	beq.n	8002948 <_malloc_r+0xb0>
 8002910:	425a      	negs	r2, r3
 8002912:	50e2      	str	r2, [r4, r3]
 8002914:	bd70      	pop	{r4, r5, r6, pc}
 8002916:	428c      	cmp	r4, r1
 8002918:	bf0b      	itete	eq
 800291a:	6863      	ldreq	r3, [r4, #4]
 800291c:	684b      	ldrne	r3, [r1, #4]
 800291e:	6013      	streq	r3, [r2, #0]
 8002920:	6063      	strne	r3, [r4, #4]
 8002922:	bf18      	it	ne
 8002924:	460c      	movne	r4, r1
 8002926:	e7e9      	b.n	80028fc <_malloc_r+0x64>
 8002928:	460c      	mov	r4, r1
 800292a:	6849      	ldr	r1, [r1, #4]
 800292c:	e7ca      	b.n	80028c4 <_malloc_r+0x2c>
 800292e:	1cc4      	adds	r4, r0, #3
 8002930:	f024 0403 	bic.w	r4, r4, #3
 8002934:	42a0      	cmp	r0, r4
 8002936:	d005      	beq.n	8002944 <_malloc_r+0xac>
 8002938:	1a21      	subs	r1, r4, r0
 800293a:	4630      	mov	r0, r6
 800293c:	f000 fae0 	bl	8002f00 <_sbrk_r>
 8002940:	3001      	adds	r0, #1
 8002942:	d0cd      	beq.n	80028e0 <_malloc_r+0x48>
 8002944:	6025      	str	r5, [r4, #0]
 8002946:	e7d9      	b.n	80028fc <_malloc_r+0x64>
 8002948:	bd70      	pop	{r4, r5, r6, pc}
 800294a:	bf00      	nop
 800294c:	20000178 	.word	0x20000178
 8002950:	2000017c 	.word	0x2000017c

08002954 <__sfputc_r>:
 8002954:	6893      	ldr	r3, [r2, #8]
 8002956:	b410      	push	{r4}
 8002958:	3b01      	subs	r3, #1
 800295a:	2b00      	cmp	r3, #0
 800295c:	6093      	str	r3, [r2, #8]
 800295e:	da08      	bge.n	8002972 <__sfputc_r+0x1e>
 8002960:	6994      	ldr	r4, [r2, #24]
 8002962:	42a3      	cmp	r3, r4
 8002964:	db02      	blt.n	800296c <__sfputc_r+0x18>
 8002966:	b2cb      	uxtb	r3, r1
 8002968:	2b0a      	cmp	r3, #10
 800296a:	d102      	bne.n	8002972 <__sfputc_r+0x1e>
 800296c:	bc10      	pop	{r4}
 800296e:	f7ff bc9f 	b.w	80022b0 <__swbuf_r>
 8002972:	6813      	ldr	r3, [r2, #0]
 8002974:	1c58      	adds	r0, r3, #1
 8002976:	6010      	str	r0, [r2, #0]
 8002978:	7019      	strb	r1, [r3, #0]
 800297a:	b2c8      	uxtb	r0, r1
 800297c:	bc10      	pop	{r4}
 800297e:	4770      	bx	lr

08002980 <__sfputs_r>:
 8002980:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002982:	4606      	mov	r6, r0
 8002984:	460f      	mov	r7, r1
 8002986:	4614      	mov	r4, r2
 8002988:	18d5      	adds	r5, r2, r3
 800298a:	42ac      	cmp	r4, r5
 800298c:	d101      	bne.n	8002992 <__sfputs_r+0x12>
 800298e:	2000      	movs	r0, #0
 8002990:	e007      	b.n	80029a2 <__sfputs_r+0x22>
 8002992:	463a      	mov	r2, r7
 8002994:	f814 1b01 	ldrb.w	r1, [r4], #1
 8002998:	4630      	mov	r0, r6
 800299a:	f7ff ffdb 	bl	8002954 <__sfputc_r>
 800299e:	1c43      	adds	r3, r0, #1
 80029a0:	d1f3      	bne.n	800298a <__sfputs_r+0xa>
 80029a2:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

080029a4 <_vfiprintf_r>:
 80029a4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80029a8:	b09d      	sub	sp, #116	; 0x74
 80029aa:	460c      	mov	r4, r1
 80029ac:	4617      	mov	r7, r2
 80029ae:	9303      	str	r3, [sp, #12]
 80029b0:	4606      	mov	r6, r0
 80029b2:	b118      	cbz	r0, 80029bc <_vfiprintf_r+0x18>
 80029b4:	6983      	ldr	r3, [r0, #24]
 80029b6:	b90b      	cbnz	r3, 80029bc <_vfiprintf_r+0x18>
 80029b8:	f7ff fe2c 	bl	8002614 <__sinit>
 80029bc:	4b7c      	ldr	r3, [pc, #496]	; (8002bb0 <_vfiprintf_r+0x20c>)
 80029be:	429c      	cmp	r4, r3
 80029c0:	d157      	bne.n	8002a72 <_vfiprintf_r+0xce>
 80029c2:	6874      	ldr	r4, [r6, #4]
 80029c4:	89a3      	ldrh	r3, [r4, #12]
 80029c6:	0718      	lsls	r0, r3, #28
 80029c8:	d55d      	bpl.n	8002a86 <_vfiprintf_r+0xe2>
 80029ca:	6923      	ldr	r3, [r4, #16]
 80029cc:	2b00      	cmp	r3, #0
 80029ce:	d05a      	beq.n	8002a86 <_vfiprintf_r+0xe2>
 80029d0:	2300      	movs	r3, #0
 80029d2:	9309      	str	r3, [sp, #36]	; 0x24
 80029d4:	2320      	movs	r3, #32
 80029d6:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 80029da:	2330      	movs	r3, #48	; 0x30
 80029dc:	f04f 0b01 	mov.w	fp, #1
 80029e0:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 80029e4:	46b8      	mov	r8, r7
 80029e6:	4645      	mov	r5, r8
 80029e8:	f815 3b01 	ldrb.w	r3, [r5], #1
 80029ec:	2b00      	cmp	r3, #0
 80029ee:	d155      	bne.n	8002a9c <_vfiprintf_r+0xf8>
 80029f0:	ebb8 0a07 	subs.w	sl, r8, r7
 80029f4:	d00b      	beq.n	8002a0e <_vfiprintf_r+0x6a>
 80029f6:	4653      	mov	r3, sl
 80029f8:	463a      	mov	r2, r7
 80029fa:	4621      	mov	r1, r4
 80029fc:	4630      	mov	r0, r6
 80029fe:	f7ff ffbf 	bl	8002980 <__sfputs_r>
 8002a02:	3001      	adds	r0, #1
 8002a04:	f000 80c4 	beq.w	8002b90 <_vfiprintf_r+0x1ec>
 8002a08:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8002a0a:	4453      	add	r3, sl
 8002a0c:	9309      	str	r3, [sp, #36]	; 0x24
 8002a0e:	f898 3000 	ldrb.w	r3, [r8]
 8002a12:	2b00      	cmp	r3, #0
 8002a14:	f000 80bc 	beq.w	8002b90 <_vfiprintf_r+0x1ec>
 8002a18:	2300      	movs	r3, #0
 8002a1a:	f04f 32ff 	mov.w	r2, #4294967295
 8002a1e:	9304      	str	r3, [sp, #16]
 8002a20:	9307      	str	r3, [sp, #28]
 8002a22:	9205      	str	r2, [sp, #20]
 8002a24:	9306      	str	r3, [sp, #24]
 8002a26:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 8002a2a:	931a      	str	r3, [sp, #104]	; 0x68
 8002a2c:	2205      	movs	r2, #5
 8002a2e:	7829      	ldrb	r1, [r5, #0]
 8002a30:	4860      	ldr	r0, [pc, #384]	; (8002bb4 <_vfiprintf_r+0x210>)
 8002a32:	f000 fb0f 	bl	8003054 <memchr>
 8002a36:	f105 0801 	add.w	r8, r5, #1
 8002a3a:	9b04      	ldr	r3, [sp, #16]
 8002a3c:	2800      	cmp	r0, #0
 8002a3e:	d131      	bne.n	8002aa4 <_vfiprintf_r+0x100>
 8002a40:	06d9      	lsls	r1, r3, #27
 8002a42:	bf44      	itt	mi
 8002a44:	2220      	movmi	r2, #32
 8002a46:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8002a4a:	071a      	lsls	r2, r3, #28
 8002a4c:	bf44      	itt	mi
 8002a4e:	222b      	movmi	r2, #43	; 0x2b
 8002a50:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8002a54:	782a      	ldrb	r2, [r5, #0]
 8002a56:	2a2a      	cmp	r2, #42	; 0x2a
 8002a58:	d02c      	beq.n	8002ab4 <_vfiprintf_r+0x110>
 8002a5a:	2100      	movs	r1, #0
 8002a5c:	200a      	movs	r0, #10
 8002a5e:	9a07      	ldr	r2, [sp, #28]
 8002a60:	46a8      	mov	r8, r5
 8002a62:	f898 3000 	ldrb.w	r3, [r8]
 8002a66:	3501      	adds	r5, #1
 8002a68:	3b30      	subs	r3, #48	; 0x30
 8002a6a:	2b09      	cmp	r3, #9
 8002a6c:	d96d      	bls.n	8002b4a <_vfiprintf_r+0x1a6>
 8002a6e:	b371      	cbz	r1, 8002ace <_vfiprintf_r+0x12a>
 8002a70:	e026      	b.n	8002ac0 <_vfiprintf_r+0x11c>
 8002a72:	4b51      	ldr	r3, [pc, #324]	; (8002bb8 <_vfiprintf_r+0x214>)
 8002a74:	429c      	cmp	r4, r3
 8002a76:	d101      	bne.n	8002a7c <_vfiprintf_r+0xd8>
 8002a78:	68b4      	ldr	r4, [r6, #8]
 8002a7a:	e7a3      	b.n	80029c4 <_vfiprintf_r+0x20>
 8002a7c:	4b4f      	ldr	r3, [pc, #316]	; (8002bbc <_vfiprintf_r+0x218>)
 8002a7e:	429c      	cmp	r4, r3
 8002a80:	bf08      	it	eq
 8002a82:	68f4      	ldreq	r4, [r6, #12]
 8002a84:	e79e      	b.n	80029c4 <_vfiprintf_r+0x20>
 8002a86:	4621      	mov	r1, r4
 8002a88:	4630      	mov	r0, r6
 8002a8a:	f7ff fc63 	bl	8002354 <__swsetup_r>
 8002a8e:	2800      	cmp	r0, #0
 8002a90:	d09e      	beq.n	80029d0 <_vfiprintf_r+0x2c>
 8002a92:	f04f 30ff 	mov.w	r0, #4294967295
 8002a96:	b01d      	add	sp, #116	; 0x74
 8002a98:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8002a9c:	2b25      	cmp	r3, #37	; 0x25
 8002a9e:	d0a7      	beq.n	80029f0 <_vfiprintf_r+0x4c>
 8002aa0:	46a8      	mov	r8, r5
 8002aa2:	e7a0      	b.n	80029e6 <_vfiprintf_r+0x42>
 8002aa4:	4a43      	ldr	r2, [pc, #268]	; (8002bb4 <_vfiprintf_r+0x210>)
 8002aa6:	4645      	mov	r5, r8
 8002aa8:	1a80      	subs	r0, r0, r2
 8002aaa:	fa0b f000 	lsl.w	r0, fp, r0
 8002aae:	4318      	orrs	r0, r3
 8002ab0:	9004      	str	r0, [sp, #16]
 8002ab2:	e7bb      	b.n	8002a2c <_vfiprintf_r+0x88>
 8002ab4:	9a03      	ldr	r2, [sp, #12]
 8002ab6:	1d11      	adds	r1, r2, #4
 8002ab8:	6812      	ldr	r2, [r2, #0]
 8002aba:	9103      	str	r1, [sp, #12]
 8002abc:	2a00      	cmp	r2, #0
 8002abe:	db01      	blt.n	8002ac4 <_vfiprintf_r+0x120>
 8002ac0:	9207      	str	r2, [sp, #28]
 8002ac2:	e004      	b.n	8002ace <_vfiprintf_r+0x12a>
 8002ac4:	4252      	negs	r2, r2
 8002ac6:	f043 0302 	orr.w	r3, r3, #2
 8002aca:	9207      	str	r2, [sp, #28]
 8002acc:	9304      	str	r3, [sp, #16]
 8002ace:	f898 3000 	ldrb.w	r3, [r8]
 8002ad2:	2b2e      	cmp	r3, #46	; 0x2e
 8002ad4:	d110      	bne.n	8002af8 <_vfiprintf_r+0x154>
 8002ad6:	f898 3001 	ldrb.w	r3, [r8, #1]
 8002ada:	f108 0101 	add.w	r1, r8, #1
 8002ade:	2b2a      	cmp	r3, #42	; 0x2a
 8002ae0:	d137      	bne.n	8002b52 <_vfiprintf_r+0x1ae>
 8002ae2:	9b03      	ldr	r3, [sp, #12]
 8002ae4:	f108 0802 	add.w	r8, r8, #2
 8002ae8:	1d1a      	adds	r2, r3, #4
 8002aea:	681b      	ldr	r3, [r3, #0]
 8002aec:	9203      	str	r2, [sp, #12]
 8002aee:	2b00      	cmp	r3, #0
 8002af0:	bfb8      	it	lt
 8002af2:	f04f 33ff 	movlt.w	r3, #4294967295
 8002af6:	9305      	str	r3, [sp, #20]
 8002af8:	4d31      	ldr	r5, [pc, #196]	; (8002bc0 <_vfiprintf_r+0x21c>)
 8002afa:	2203      	movs	r2, #3
 8002afc:	f898 1000 	ldrb.w	r1, [r8]
 8002b00:	4628      	mov	r0, r5
 8002b02:	f000 faa7 	bl	8003054 <memchr>
 8002b06:	b140      	cbz	r0, 8002b1a <_vfiprintf_r+0x176>
 8002b08:	2340      	movs	r3, #64	; 0x40
 8002b0a:	1b40      	subs	r0, r0, r5
 8002b0c:	fa03 f000 	lsl.w	r0, r3, r0
 8002b10:	9b04      	ldr	r3, [sp, #16]
 8002b12:	f108 0801 	add.w	r8, r8, #1
 8002b16:	4303      	orrs	r3, r0
 8002b18:	9304      	str	r3, [sp, #16]
 8002b1a:	f898 1000 	ldrb.w	r1, [r8]
 8002b1e:	2206      	movs	r2, #6
 8002b20:	4828      	ldr	r0, [pc, #160]	; (8002bc4 <_vfiprintf_r+0x220>)
 8002b22:	f108 0701 	add.w	r7, r8, #1
 8002b26:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 8002b2a:	f000 fa93 	bl	8003054 <memchr>
 8002b2e:	2800      	cmp	r0, #0
 8002b30:	d034      	beq.n	8002b9c <_vfiprintf_r+0x1f8>
 8002b32:	4b25      	ldr	r3, [pc, #148]	; (8002bc8 <_vfiprintf_r+0x224>)
 8002b34:	bb03      	cbnz	r3, 8002b78 <_vfiprintf_r+0x1d4>
 8002b36:	9b03      	ldr	r3, [sp, #12]
 8002b38:	3307      	adds	r3, #7
 8002b3a:	f023 0307 	bic.w	r3, r3, #7
 8002b3e:	3308      	adds	r3, #8
 8002b40:	9303      	str	r3, [sp, #12]
 8002b42:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8002b44:	444b      	add	r3, r9
 8002b46:	9309      	str	r3, [sp, #36]	; 0x24
 8002b48:	e74c      	b.n	80029e4 <_vfiprintf_r+0x40>
 8002b4a:	fb00 3202 	mla	r2, r0, r2, r3
 8002b4e:	2101      	movs	r1, #1
 8002b50:	e786      	b.n	8002a60 <_vfiprintf_r+0xbc>
 8002b52:	2300      	movs	r3, #0
 8002b54:	250a      	movs	r5, #10
 8002b56:	4618      	mov	r0, r3
 8002b58:	9305      	str	r3, [sp, #20]
 8002b5a:	4688      	mov	r8, r1
 8002b5c:	f898 2000 	ldrb.w	r2, [r8]
 8002b60:	3101      	adds	r1, #1
 8002b62:	3a30      	subs	r2, #48	; 0x30
 8002b64:	2a09      	cmp	r2, #9
 8002b66:	d903      	bls.n	8002b70 <_vfiprintf_r+0x1cc>
 8002b68:	2b00      	cmp	r3, #0
 8002b6a:	d0c5      	beq.n	8002af8 <_vfiprintf_r+0x154>
 8002b6c:	9005      	str	r0, [sp, #20]
 8002b6e:	e7c3      	b.n	8002af8 <_vfiprintf_r+0x154>
 8002b70:	fb05 2000 	mla	r0, r5, r0, r2
 8002b74:	2301      	movs	r3, #1
 8002b76:	e7f0      	b.n	8002b5a <_vfiprintf_r+0x1b6>
 8002b78:	ab03      	add	r3, sp, #12
 8002b7a:	9300      	str	r3, [sp, #0]
 8002b7c:	4622      	mov	r2, r4
 8002b7e:	4b13      	ldr	r3, [pc, #76]	; (8002bcc <_vfiprintf_r+0x228>)
 8002b80:	a904      	add	r1, sp, #16
 8002b82:	4630      	mov	r0, r6
 8002b84:	f3af 8000 	nop.w
 8002b88:	f1b0 3fff 	cmp.w	r0, #4294967295
 8002b8c:	4681      	mov	r9, r0
 8002b8e:	d1d8      	bne.n	8002b42 <_vfiprintf_r+0x19e>
 8002b90:	89a3      	ldrh	r3, [r4, #12]
 8002b92:	065b      	lsls	r3, r3, #25
 8002b94:	f53f af7d 	bmi.w	8002a92 <_vfiprintf_r+0xee>
 8002b98:	9809      	ldr	r0, [sp, #36]	; 0x24
 8002b9a:	e77c      	b.n	8002a96 <_vfiprintf_r+0xf2>
 8002b9c:	ab03      	add	r3, sp, #12
 8002b9e:	9300      	str	r3, [sp, #0]
 8002ba0:	4622      	mov	r2, r4
 8002ba2:	4b0a      	ldr	r3, [pc, #40]	; (8002bcc <_vfiprintf_r+0x228>)
 8002ba4:	a904      	add	r1, sp, #16
 8002ba6:	4630      	mov	r0, r6
 8002ba8:	f000 f88a 	bl	8002cc0 <_printf_i>
 8002bac:	e7ec      	b.n	8002b88 <_vfiprintf_r+0x1e4>
 8002bae:	bf00      	nop
 8002bb0:	08003228 	.word	0x08003228
 8002bb4:	08003268 	.word	0x08003268
 8002bb8:	08003248 	.word	0x08003248
 8002bbc:	08003208 	.word	0x08003208
 8002bc0:	0800326e 	.word	0x0800326e
 8002bc4:	08003272 	.word	0x08003272
 8002bc8:	00000000 	.word	0x00000000
 8002bcc:	08002981 	.word	0x08002981

08002bd0 <_printf_common>:
 8002bd0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8002bd4:	4691      	mov	r9, r2
 8002bd6:	461f      	mov	r7, r3
 8002bd8:	688a      	ldr	r2, [r1, #8]
 8002bda:	690b      	ldr	r3, [r1, #16]
 8002bdc:	4606      	mov	r6, r0
 8002bde:	4293      	cmp	r3, r2
 8002be0:	bfb8      	it	lt
 8002be2:	4613      	movlt	r3, r2
 8002be4:	f8c9 3000 	str.w	r3, [r9]
 8002be8:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 8002bec:	460c      	mov	r4, r1
 8002bee:	f8dd 8020 	ldr.w	r8, [sp, #32]
 8002bf2:	b112      	cbz	r2, 8002bfa <_printf_common+0x2a>
 8002bf4:	3301      	adds	r3, #1
 8002bf6:	f8c9 3000 	str.w	r3, [r9]
 8002bfa:	6823      	ldr	r3, [r4, #0]
 8002bfc:	0699      	lsls	r1, r3, #26
 8002bfe:	bf42      	ittt	mi
 8002c00:	f8d9 3000 	ldrmi.w	r3, [r9]
 8002c04:	3302      	addmi	r3, #2
 8002c06:	f8c9 3000 	strmi.w	r3, [r9]
 8002c0a:	6825      	ldr	r5, [r4, #0]
 8002c0c:	f015 0506 	ands.w	r5, r5, #6
 8002c10:	d107      	bne.n	8002c22 <_printf_common+0x52>
 8002c12:	f104 0a19 	add.w	sl, r4, #25
 8002c16:	68e3      	ldr	r3, [r4, #12]
 8002c18:	f8d9 2000 	ldr.w	r2, [r9]
 8002c1c:	1a9b      	subs	r3, r3, r2
 8002c1e:	429d      	cmp	r5, r3
 8002c20:	db2a      	blt.n	8002c78 <_printf_common+0xa8>
 8002c22:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 8002c26:	6822      	ldr	r2, [r4, #0]
 8002c28:	3300      	adds	r3, #0
 8002c2a:	bf18      	it	ne
 8002c2c:	2301      	movne	r3, #1
 8002c2e:	0692      	lsls	r2, r2, #26
 8002c30:	d42f      	bmi.n	8002c92 <_printf_common+0xc2>
 8002c32:	f104 0243 	add.w	r2, r4, #67	; 0x43
 8002c36:	4639      	mov	r1, r7
 8002c38:	4630      	mov	r0, r6
 8002c3a:	47c0      	blx	r8
 8002c3c:	3001      	adds	r0, #1
 8002c3e:	d022      	beq.n	8002c86 <_printf_common+0xb6>
 8002c40:	6823      	ldr	r3, [r4, #0]
 8002c42:	68e5      	ldr	r5, [r4, #12]
 8002c44:	f003 0306 	and.w	r3, r3, #6
 8002c48:	2b04      	cmp	r3, #4
 8002c4a:	bf18      	it	ne
 8002c4c:	2500      	movne	r5, #0
 8002c4e:	f8d9 2000 	ldr.w	r2, [r9]
 8002c52:	f04f 0900 	mov.w	r9, #0
 8002c56:	bf08      	it	eq
 8002c58:	1aad      	subeq	r5, r5, r2
 8002c5a:	68a3      	ldr	r3, [r4, #8]
 8002c5c:	6922      	ldr	r2, [r4, #16]
 8002c5e:	bf08      	it	eq
 8002c60:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8002c64:	4293      	cmp	r3, r2
 8002c66:	bfc4      	itt	gt
 8002c68:	1a9b      	subgt	r3, r3, r2
 8002c6a:	18ed      	addgt	r5, r5, r3
 8002c6c:	341a      	adds	r4, #26
 8002c6e:	454d      	cmp	r5, r9
 8002c70:	d11b      	bne.n	8002caa <_printf_common+0xda>
 8002c72:	2000      	movs	r0, #0
 8002c74:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8002c78:	2301      	movs	r3, #1
 8002c7a:	4652      	mov	r2, sl
 8002c7c:	4639      	mov	r1, r7
 8002c7e:	4630      	mov	r0, r6
 8002c80:	47c0      	blx	r8
 8002c82:	3001      	adds	r0, #1
 8002c84:	d103      	bne.n	8002c8e <_printf_common+0xbe>
 8002c86:	f04f 30ff 	mov.w	r0, #4294967295
 8002c8a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8002c8e:	3501      	adds	r5, #1
 8002c90:	e7c1      	b.n	8002c16 <_printf_common+0x46>
 8002c92:	2030      	movs	r0, #48	; 0x30
 8002c94:	18e1      	adds	r1, r4, r3
 8002c96:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 8002c9a:	1c5a      	adds	r2, r3, #1
 8002c9c:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 8002ca0:	4422      	add	r2, r4
 8002ca2:	3302      	adds	r3, #2
 8002ca4:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 8002ca8:	e7c3      	b.n	8002c32 <_printf_common+0x62>
 8002caa:	2301      	movs	r3, #1
 8002cac:	4622      	mov	r2, r4
 8002cae:	4639      	mov	r1, r7
 8002cb0:	4630      	mov	r0, r6
 8002cb2:	47c0      	blx	r8
 8002cb4:	3001      	adds	r0, #1
 8002cb6:	d0e6      	beq.n	8002c86 <_printf_common+0xb6>
 8002cb8:	f109 0901 	add.w	r9, r9, #1
 8002cbc:	e7d7      	b.n	8002c6e <_printf_common+0x9e>
	...

08002cc0 <_printf_i>:
 8002cc0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 8002cc4:	4617      	mov	r7, r2
 8002cc6:	7e0a      	ldrb	r2, [r1, #24]
 8002cc8:	b085      	sub	sp, #20
 8002cca:	2a6e      	cmp	r2, #110	; 0x6e
 8002ccc:	4698      	mov	r8, r3
 8002cce:	4606      	mov	r6, r0
 8002cd0:	460c      	mov	r4, r1
 8002cd2:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 8002cd4:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 8002cd8:	f000 80bc 	beq.w	8002e54 <_printf_i+0x194>
 8002cdc:	d81a      	bhi.n	8002d14 <_printf_i+0x54>
 8002cde:	2a63      	cmp	r2, #99	; 0x63
 8002ce0:	d02e      	beq.n	8002d40 <_printf_i+0x80>
 8002ce2:	d80a      	bhi.n	8002cfa <_printf_i+0x3a>
 8002ce4:	2a00      	cmp	r2, #0
 8002ce6:	f000 80c8 	beq.w	8002e7a <_printf_i+0x1ba>
 8002cea:	2a58      	cmp	r2, #88	; 0x58
 8002cec:	f000 808a 	beq.w	8002e04 <_printf_i+0x144>
 8002cf0:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8002cf4:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 8002cf8:	e02a      	b.n	8002d50 <_printf_i+0x90>
 8002cfa:	2a64      	cmp	r2, #100	; 0x64
 8002cfc:	d001      	beq.n	8002d02 <_printf_i+0x42>
 8002cfe:	2a69      	cmp	r2, #105	; 0x69
 8002d00:	d1f6      	bne.n	8002cf0 <_printf_i+0x30>
 8002d02:	6821      	ldr	r1, [r4, #0]
 8002d04:	681a      	ldr	r2, [r3, #0]
 8002d06:	f011 0f80 	tst.w	r1, #128	; 0x80
 8002d0a:	d023      	beq.n	8002d54 <_printf_i+0x94>
 8002d0c:	1d11      	adds	r1, r2, #4
 8002d0e:	6019      	str	r1, [r3, #0]
 8002d10:	6813      	ldr	r3, [r2, #0]
 8002d12:	e027      	b.n	8002d64 <_printf_i+0xa4>
 8002d14:	2a73      	cmp	r2, #115	; 0x73
 8002d16:	f000 80b4 	beq.w	8002e82 <_printf_i+0x1c2>
 8002d1a:	d808      	bhi.n	8002d2e <_printf_i+0x6e>
 8002d1c:	2a6f      	cmp	r2, #111	; 0x6f
 8002d1e:	d02a      	beq.n	8002d76 <_printf_i+0xb6>
 8002d20:	2a70      	cmp	r2, #112	; 0x70
 8002d22:	d1e5      	bne.n	8002cf0 <_printf_i+0x30>
 8002d24:	680a      	ldr	r2, [r1, #0]
 8002d26:	f042 0220 	orr.w	r2, r2, #32
 8002d2a:	600a      	str	r2, [r1, #0]
 8002d2c:	e003      	b.n	8002d36 <_printf_i+0x76>
 8002d2e:	2a75      	cmp	r2, #117	; 0x75
 8002d30:	d021      	beq.n	8002d76 <_printf_i+0xb6>
 8002d32:	2a78      	cmp	r2, #120	; 0x78
 8002d34:	d1dc      	bne.n	8002cf0 <_printf_i+0x30>
 8002d36:	2278      	movs	r2, #120	; 0x78
 8002d38:	496f      	ldr	r1, [pc, #444]	; (8002ef8 <_printf_i+0x238>)
 8002d3a:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8002d3e:	e064      	b.n	8002e0a <_printf_i+0x14a>
 8002d40:	681a      	ldr	r2, [r3, #0]
 8002d42:	f101 0542 	add.w	r5, r1, #66	; 0x42
 8002d46:	1d11      	adds	r1, r2, #4
 8002d48:	6019      	str	r1, [r3, #0]
 8002d4a:	6813      	ldr	r3, [r2, #0]
 8002d4c:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8002d50:	2301      	movs	r3, #1
 8002d52:	e0a3      	b.n	8002e9c <_printf_i+0x1dc>
 8002d54:	f011 0f40 	tst.w	r1, #64	; 0x40
 8002d58:	f102 0104 	add.w	r1, r2, #4
 8002d5c:	6019      	str	r1, [r3, #0]
 8002d5e:	d0d7      	beq.n	8002d10 <_printf_i+0x50>
 8002d60:	f9b2 3000 	ldrsh.w	r3, [r2]
 8002d64:	2b00      	cmp	r3, #0
 8002d66:	da03      	bge.n	8002d70 <_printf_i+0xb0>
 8002d68:	222d      	movs	r2, #45	; 0x2d
 8002d6a:	425b      	negs	r3, r3
 8002d6c:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8002d70:	4962      	ldr	r1, [pc, #392]	; (8002efc <_printf_i+0x23c>)
 8002d72:	220a      	movs	r2, #10
 8002d74:	e017      	b.n	8002da6 <_printf_i+0xe6>
 8002d76:	6820      	ldr	r0, [r4, #0]
 8002d78:	6819      	ldr	r1, [r3, #0]
 8002d7a:	f010 0f80 	tst.w	r0, #128	; 0x80
 8002d7e:	d003      	beq.n	8002d88 <_printf_i+0xc8>
 8002d80:	1d08      	adds	r0, r1, #4
 8002d82:	6018      	str	r0, [r3, #0]
 8002d84:	680b      	ldr	r3, [r1, #0]
 8002d86:	e006      	b.n	8002d96 <_printf_i+0xd6>
 8002d88:	f010 0f40 	tst.w	r0, #64	; 0x40
 8002d8c:	f101 0004 	add.w	r0, r1, #4
 8002d90:	6018      	str	r0, [r3, #0]
 8002d92:	d0f7      	beq.n	8002d84 <_printf_i+0xc4>
 8002d94:	880b      	ldrh	r3, [r1, #0]
 8002d96:	2a6f      	cmp	r2, #111	; 0x6f
 8002d98:	bf14      	ite	ne
 8002d9a:	220a      	movne	r2, #10
 8002d9c:	2208      	moveq	r2, #8
 8002d9e:	4957      	ldr	r1, [pc, #348]	; (8002efc <_printf_i+0x23c>)
 8002da0:	2000      	movs	r0, #0
 8002da2:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 8002da6:	6865      	ldr	r5, [r4, #4]
 8002da8:	2d00      	cmp	r5, #0
 8002daa:	60a5      	str	r5, [r4, #8]
 8002dac:	f2c0 809c 	blt.w	8002ee8 <_printf_i+0x228>
 8002db0:	6820      	ldr	r0, [r4, #0]
 8002db2:	f020 0004 	bic.w	r0, r0, #4
 8002db6:	6020      	str	r0, [r4, #0]
 8002db8:	2b00      	cmp	r3, #0
 8002dba:	d13f      	bne.n	8002e3c <_printf_i+0x17c>
 8002dbc:	2d00      	cmp	r5, #0
 8002dbe:	f040 8095 	bne.w	8002eec <_printf_i+0x22c>
 8002dc2:	4675      	mov	r5, lr
 8002dc4:	2a08      	cmp	r2, #8
 8002dc6:	d10b      	bne.n	8002de0 <_printf_i+0x120>
 8002dc8:	6823      	ldr	r3, [r4, #0]
 8002dca:	07da      	lsls	r2, r3, #31
 8002dcc:	d508      	bpl.n	8002de0 <_printf_i+0x120>
 8002dce:	6923      	ldr	r3, [r4, #16]
 8002dd0:	6862      	ldr	r2, [r4, #4]
 8002dd2:	429a      	cmp	r2, r3
 8002dd4:	bfde      	ittt	le
 8002dd6:	2330      	movle	r3, #48	; 0x30
 8002dd8:	f805 3c01 	strble.w	r3, [r5, #-1]
 8002ddc:	f105 35ff 	addle.w	r5, r5, #4294967295
 8002de0:	ebae 0305 	sub.w	r3, lr, r5
 8002de4:	6123      	str	r3, [r4, #16]
 8002de6:	f8cd 8000 	str.w	r8, [sp]
 8002dea:	463b      	mov	r3, r7
 8002dec:	aa03      	add	r2, sp, #12
 8002dee:	4621      	mov	r1, r4
 8002df0:	4630      	mov	r0, r6
 8002df2:	f7ff feed 	bl	8002bd0 <_printf_common>
 8002df6:	3001      	adds	r0, #1
 8002df8:	d155      	bne.n	8002ea6 <_printf_i+0x1e6>
 8002dfa:	f04f 30ff 	mov.w	r0, #4294967295
 8002dfe:	b005      	add	sp, #20
 8002e00:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8002e04:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8002e08:	493c      	ldr	r1, [pc, #240]	; (8002efc <_printf_i+0x23c>)
 8002e0a:	6822      	ldr	r2, [r4, #0]
 8002e0c:	6818      	ldr	r0, [r3, #0]
 8002e0e:	f012 0f80 	tst.w	r2, #128	; 0x80
 8002e12:	f100 0504 	add.w	r5, r0, #4
 8002e16:	601d      	str	r5, [r3, #0]
 8002e18:	d001      	beq.n	8002e1e <_printf_i+0x15e>
 8002e1a:	6803      	ldr	r3, [r0, #0]
 8002e1c:	e002      	b.n	8002e24 <_printf_i+0x164>
 8002e1e:	0655      	lsls	r5, r2, #25
 8002e20:	d5fb      	bpl.n	8002e1a <_printf_i+0x15a>
 8002e22:	8803      	ldrh	r3, [r0, #0]
 8002e24:	07d0      	lsls	r0, r2, #31
 8002e26:	bf44      	itt	mi
 8002e28:	f042 0220 	orrmi.w	r2, r2, #32
 8002e2c:	6022      	strmi	r2, [r4, #0]
 8002e2e:	b91b      	cbnz	r3, 8002e38 <_printf_i+0x178>
 8002e30:	6822      	ldr	r2, [r4, #0]
 8002e32:	f022 0220 	bic.w	r2, r2, #32
 8002e36:	6022      	str	r2, [r4, #0]
 8002e38:	2210      	movs	r2, #16
 8002e3a:	e7b1      	b.n	8002da0 <_printf_i+0xe0>
 8002e3c:	4675      	mov	r5, lr
 8002e3e:	fbb3 f0f2 	udiv	r0, r3, r2
 8002e42:	fb02 3310 	mls	r3, r2, r0, r3
 8002e46:	5ccb      	ldrb	r3, [r1, r3]
 8002e48:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8002e4c:	4603      	mov	r3, r0
 8002e4e:	2800      	cmp	r0, #0
 8002e50:	d1f5      	bne.n	8002e3e <_printf_i+0x17e>
 8002e52:	e7b7      	b.n	8002dc4 <_printf_i+0x104>
 8002e54:	6808      	ldr	r0, [r1, #0]
 8002e56:	681a      	ldr	r2, [r3, #0]
 8002e58:	f010 0f80 	tst.w	r0, #128	; 0x80
 8002e5c:	6949      	ldr	r1, [r1, #20]
 8002e5e:	d004      	beq.n	8002e6a <_printf_i+0x1aa>
 8002e60:	1d10      	adds	r0, r2, #4
 8002e62:	6018      	str	r0, [r3, #0]
 8002e64:	6813      	ldr	r3, [r2, #0]
 8002e66:	6019      	str	r1, [r3, #0]
 8002e68:	e007      	b.n	8002e7a <_printf_i+0x1ba>
 8002e6a:	f010 0f40 	tst.w	r0, #64	; 0x40
 8002e6e:	f102 0004 	add.w	r0, r2, #4
 8002e72:	6018      	str	r0, [r3, #0]
 8002e74:	6813      	ldr	r3, [r2, #0]
 8002e76:	d0f6      	beq.n	8002e66 <_printf_i+0x1a6>
 8002e78:	8019      	strh	r1, [r3, #0]
 8002e7a:	2300      	movs	r3, #0
 8002e7c:	4675      	mov	r5, lr
 8002e7e:	6123      	str	r3, [r4, #16]
 8002e80:	e7b1      	b.n	8002de6 <_printf_i+0x126>
 8002e82:	681a      	ldr	r2, [r3, #0]
 8002e84:	1d11      	adds	r1, r2, #4
 8002e86:	6019      	str	r1, [r3, #0]
 8002e88:	6815      	ldr	r5, [r2, #0]
 8002e8a:	2100      	movs	r1, #0
 8002e8c:	6862      	ldr	r2, [r4, #4]
 8002e8e:	4628      	mov	r0, r5
 8002e90:	f000 f8e0 	bl	8003054 <memchr>
 8002e94:	b108      	cbz	r0, 8002e9a <_printf_i+0x1da>
 8002e96:	1b40      	subs	r0, r0, r5
 8002e98:	6060      	str	r0, [r4, #4]
 8002e9a:	6863      	ldr	r3, [r4, #4]
 8002e9c:	6123      	str	r3, [r4, #16]
 8002e9e:	2300      	movs	r3, #0
 8002ea0:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8002ea4:	e79f      	b.n	8002de6 <_printf_i+0x126>
 8002ea6:	6923      	ldr	r3, [r4, #16]
 8002ea8:	462a      	mov	r2, r5
 8002eaa:	4639      	mov	r1, r7
 8002eac:	4630      	mov	r0, r6
 8002eae:	47c0      	blx	r8
 8002eb0:	3001      	adds	r0, #1
 8002eb2:	d0a2      	beq.n	8002dfa <_printf_i+0x13a>
 8002eb4:	6823      	ldr	r3, [r4, #0]
 8002eb6:	079b      	lsls	r3, r3, #30
 8002eb8:	d507      	bpl.n	8002eca <_printf_i+0x20a>
 8002eba:	2500      	movs	r5, #0
 8002ebc:	f104 0919 	add.w	r9, r4, #25
 8002ec0:	68e3      	ldr	r3, [r4, #12]
 8002ec2:	9a03      	ldr	r2, [sp, #12]
 8002ec4:	1a9b      	subs	r3, r3, r2
 8002ec6:	429d      	cmp	r5, r3
 8002ec8:	db05      	blt.n	8002ed6 <_printf_i+0x216>
 8002eca:	68e0      	ldr	r0, [r4, #12]
 8002ecc:	9b03      	ldr	r3, [sp, #12]
 8002ece:	4298      	cmp	r0, r3
 8002ed0:	bfb8      	it	lt
 8002ed2:	4618      	movlt	r0, r3
 8002ed4:	e793      	b.n	8002dfe <_printf_i+0x13e>
 8002ed6:	2301      	movs	r3, #1
 8002ed8:	464a      	mov	r2, r9
 8002eda:	4639      	mov	r1, r7
 8002edc:	4630      	mov	r0, r6
 8002ede:	47c0      	blx	r8
 8002ee0:	3001      	adds	r0, #1
 8002ee2:	d08a      	beq.n	8002dfa <_printf_i+0x13a>
 8002ee4:	3501      	adds	r5, #1
 8002ee6:	e7eb      	b.n	8002ec0 <_printf_i+0x200>
 8002ee8:	2b00      	cmp	r3, #0
 8002eea:	d1a7      	bne.n	8002e3c <_printf_i+0x17c>
 8002eec:	780b      	ldrb	r3, [r1, #0]
 8002eee:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8002ef2:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8002ef6:	e765      	b.n	8002dc4 <_printf_i+0x104>
 8002ef8:	0800328a 	.word	0x0800328a
 8002efc:	08003279 	.word	0x08003279

08002f00 <_sbrk_r>:
 8002f00:	b538      	push	{r3, r4, r5, lr}
 8002f02:	2300      	movs	r3, #0
 8002f04:	4c05      	ldr	r4, [pc, #20]	; (8002f1c <_sbrk_r+0x1c>)
 8002f06:	4605      	mov	r5, r0
 8002f08:	4608      	mov	r0, r1
 8002f0a:	6023      	str	r3, [r4, #0]
 8002f0c:	f000 f8ec 	bl	80030e8 <_sbrk>
 8002f10:	1c43      	adds	r3, r0, #1
 8002f12:	d102      	bne.n	8002f1a <_sbrk_r+0x1a>
 8002f14:	6823      	ldr	r3, [r4, #0]
 8002f16:	b103      	cbz	r3, 8002f1a <_sbrk_r+0x1a>
 8002f18:	602b      	str	r3, [r5, #0]
 8002f1a:	bd38      	pop	{r3, r4, r5, pc}
 8002f1c:	200002f8 	.word	0x200002f8

08002f20 <__sread>:
 8002f20:	b510      	push	{r4, lr}
 8002f22:	460c      	mov	r4, r1
 8002f24:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002f28:	f000 f8a4 	bl	8003074 <_read_r>
 8002f2c:	2800      	cmp	r0, #0
 8002f2e:	bfab      	itete	ge
 8002f30:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 8002f32:	89a3      	ldrhlt	r3, [r4, #12]
 8002f34:	181b      	addge	r3, r3, r0
 8002f36:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 8002f3a:	bfac      	ite	ge
 8002f3c:	6563      	strge	r3, [r4, #84]	; 0x54
 8002f3e:	81a3      	strhlt	r3, [r4, #12]
 8002f40:	bd10      	pop	{r4, pc}

08002f42 <__swrite>:
 8002f42:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8002f46:	461f      	mov	r7, r3
 8002f48:	898b      	ldrh	r3, [r1, #12]
 8002f4a:	4605      	mov	r5, r0
 8002f4c:	05db      	lsls	r3, r3, #23
 8002f4e:	460c      	mov	r4, r1
 8002f50:	4616      	mov	r6, r2
 8002f52:	d505      	bpl.n	8002f60 <__swrite+0x1e>
 8002f54:	2302      	movs	r3, #2
 8002f56:	2200      	movs	r2, #0
 8002f58:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002f5c:	f000 f868 	bl	8003030 <_lseek_r>
 8002f60:	89a3      	ldrh	r3, [r4, #12]
 8002f62:	4632      	mov	r2, r6
 8002f64:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 8002f68:	81a3      	strh	r3, [r4, #12]
 8002f6a:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8002f6e:	463b      	mov	r3, r7
 8002f70:	4628      	mov	r0, r5
 8002f72:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8002f76:	f000 b817 	b.w	8002fa8 <_write_r>

08002f7a <__sseek>:
 8002f7a:	b510      	push	{r4, lr}
 8002f7c:	460c      	mov	r4, r1
 8002f7e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002f82:	f000 f855 	bl	8003030 <_lseek_r>
 8002f86:	1c43      	adds	r3, r0, #1
 8002f88:	89a3      	ldrh	r3, [r4, #12]
 8002f8a:	bf15      	itete	ne
 8002f8c:	6560      	strne	r0, [r4, #84]	; 0x54
 8002f8e:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 8002f92:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 8002f96:	81a3      	strheq	r3, [r4, #12]
 8002f98:	bf18      	it	ne
 8002f9a:	81a3      	strhne	r3, [r4, #12]
 8002f9c:	bd10      	pop	{r4, pc}

08002f9e <__sclose>:
 8002f9e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002fa2:	f000 b813 	b.w	8002fcc <_close_r>
	...

08002fa8 <_write_r>:
 8002fa8:	b538      	push	{r3, r4, r5, lr}
 8002faa:	4605      	mov	r5, r0
 8002fac:	4608      	mov	r0, r1
 8002fae:	4611      	mov	r1, r2
 8002fb0:	2200      	movs	r2, #0
 8002fb2:	4c05      	ldr	r4, [pc, #20]	; (8002fc8 <_write_r+0x20>)
 8002fb4:	6022      	str	r2, [r4, #0]
 8002fb6:	461a      	mov	r2, r3
 8002fb8:	f7fe fb46 	bl	8001648 <_write>
 8002fbc:	1c43      	adds	r3, r0, #1
 8002fbe:	d102      	bne.n	8002fc6 <_write_r+0x1e>
 8002fc0:	6823      	ldr	r3, [r4, #0]
 8002fc2:	b103      	cbz	r3, 8002fc6 <_write_r+0x1e>
 8002fc4:	602b      	str	r3, [r5, #0]
 8002fc6:	bd38      	pop	{r3, r4, r5, pc}
 8002fc8:	200002f8 	.word	0x200002f8

08002fcc <_close_r>:
 8002fcc:	b538      	push	{r3, r4, r5, lr}
 8002fce:	2300      	movs	r3, #0
 8002fd0:	4c05      	ldr	r4, [pc, #20]	; (8002fe8 <_close_r+0x1c>)
 8002fd2:	4605      	mov	r5, r0
 8002fd4:	4608      	mov	r0, r1
 8002fd6:	6023      	str	r3, [r4, #0]
 8002fd8:	f000 f85e 	bl	8003098 <_close>
 8002fdc:	1c43      	adds	r3, r0, #1
 8002fde:	d102      	bne.n	8002fe6 <_close_r+0x1a>
 8002fe0:	6823      	ldr	r3, [r4, #0]
 8002fe2:	b103      	cbz	r3, 8002fe6 <_close_r+0x1a>
 8002fe4:	602b      	str	r3, [r5, #0]
 8002fe6:	bd38      	pop	{r3, r4, r5, pc}
 8002fe8:	200002f8 	.word	0x200002f8

08002fec <_fstat_r>:
 8002fec:	b538      	push	{r3, r4, r5, lr}
 8002fee:	2300      	movs	r3, #0
 8002ff0:	4c06      	ldr	r4, [pc, #24]	; (800300c <_fstat_r+0x20>)
 8002ff2:	4605      	mov	r5, r0
 8002ff4:	4608      	mov	r0, r1
 8002ff6:	4611      	mov	r1, r2
 8002ff8:	6023      	str	r3, [r4, #0]
 8002ffa:	f000 f855 	bl	80030a8 <_fstat>
 8002ffe:	1c43      	adds	r3, r0, #1
 8003000:	d102      	bne.n	8003008 <_fstat_r+0x1c>
 8003002:	6823      	ldr	r3, [r4, #0]
 8003004:	b103      	cbz	r3, 8003008 <_fstat_r+0x1c>
 8003006:	602b      	str	r3, [r5, #0]
 8003008:	bd38      	pop	{r3, r4, r5, pc}
 800300a:	bf00      	nop
 800300c:	200002f8 	.word	0x200002f8

08003010 <_isatty_r>:
 8003010:	b538      	push	{r3, r4, r5, lr}
 8003012:	2300      	movs	r3, #0
 8003014:	4c05      	ldr	r4, [pc, #20]	; (800302c <_isatty_r+0x1c>)
 8003016:	4605      	mov	r5, r0
 8003018:	4608      	mov	r0, r1
 800301a:	6023      	str	r3, [r4, #0]
 800301c:	f000 f84c 	bl	80030b8 <_isatty>
 8003020:	1c43      	adds	r3, r0, #1
 8003022:	d102      	bne.n	800302a <_isatty_r+0x1a>
 8003024:	6823      	ldr	r3, [r4, #0]
 8003026:	b103      	cbz	r3, 800302a <_isatty_r+0x1a>
 8003028:	602b      	str	r3, [r5, #0]
 800302a:	bd38      	pop	{r3, r4, r5, pc}
 800302c:	200002f8 	.word	0x200002f8

08003030 <_lseek_r>:
 8003030:	b538      	push	{r3, r4, r5, lr}
 8003032:	4605      	mov	r5, r0
 8003034:	4608      	mov	r0, r1
 8003036:	4611      	mov	r1, r2
 8003038:	2200      	movs	r2, #0
 800303a:	4c05      	ldr	r4, [pc, #20]	; (8003050 <_lseek_r+0x20>)
 800303c:	6022      	str	r2, [r4, #0]
 800303e:	461a      	mov	r2, r3
 8003040:	f000 f842 	bl	80030c8 <_lseek>
 8003044:	1c43      	adds	r3, r0, #1
 8003046:	d102      	bne.n	800304e <_lseek_r+0x1e>
 8003048:	6823      	ldr	r3, [r4, #0]
 800304a:	b103      	cbz	r3, 800304e <_lseek_r+0x1e>
 800304c:	602b      	str	r3, [r5, #0]
 800304e:	bd38      	pop	{r3, r4, r5, pc}
 8003050:	200002f8 	.word	0x200002f8

08003054 <memchr>:
 8003054:	b510      	push	{r4, lr}
 8003056:	b2c9      	uxtb	r1, r1
 8003058:	4402      	add	r2, r0
 800305a:	4290      	cmp	r0, r2
 800305c:	4603      	mov	r3, r0
 800305e:	d101      	bne.n	8003064 <memchr+0x10>
 8003060:	2000      	movs	r0, #0
 8003062:	bd10      	pop	{r4, pc}
 8003064:	781c      	ldrb	r4, [r3, #0]
 8003066:	3001      	adds	r0, #1
 8003068:	428c      	cmp	r4, r1
 800306a:	d1f6      	bne.n	800305a <memchr+0x6>
 800306c:	4618      	mov	r0, r3
 800306e:	bd10      	pop	{r4, pc}

08003070 <__malloc_lock>:
 8003070:	4770      	bx	lr

08003072 <__malloc_unlock>:
 8003072:	4770      	bx	lr

08003074 <_read_r>:
 8003074:	b538      	push	{r3, r4, r5, lr}
 8003076:	4605      	mov	r5, r0
 8003078:	4608      	mov	r0, r1
 800307a:	4611      	mov	r1, r2
 800307c:	2200      	movs	r2, #0
 800307e:	4c05      	ldr	r4, [pc, #20]	; (8003094 <_read_r+0x20>)
 8003080:	6022      	str	r2, [r4, #0]
 8003082:	461a      	mov	r2, r3
 8003084:	f000 f828 	bl	80030d8 <_read>
 8003088:	1c43      	adds	r3, r0, #1
 800308a:	d102      	bne.n	8003092 <_read_r+0x1e>
 800308c:	6823      	ldr	r3, [r4, #0]
 800308e:	b103      	cbz	r3, 8003092 <_read_r+0x1e>
 8003090:	602b      	str	r3, [r5, #0]
 8003092:	bd38      	pop	{r3, r4, r5, pc}
 8003094:	200002f8 	.word	0x200002f8

08003098 <_close>:
 8003098:	2258      	movs	r2, #88	; 0x58
 800309a:	4b02      	ldr	r3, [pc, #8]	; (80030a4 <_close+0xc>)
 800309c:	f04f 30ff 	mov.w	r0, #4294967295
 80030a0:	601a      	str	r2, [r3, #0]
 80030a2:	4770      	bx	lr
 80030a4:	200002f8 	.word	0x200002f8

080030a8 <_fstat>:
 80030a8:	2258      	movs	r2, #88	; 0x58
 80030aa:	4b02      	ldr	r3, [pc, #8]	; (80030b4 <_fstat+0xc>)
 80030ac:	f04f 30ff 	mov.w	r0, #4294967295
 80030b0:	601a      	str	r2, [r3, #0]
 80030b2:	4770      	bx	lr
 80030b4:	200002f8 	.word	0x200002f8

080030b8 <_isatty>:
 80030b8:	2258      	movs	r2, #88	; 0x58
 80030ba:	4b02      	ldr	r3, [pc, #8]	; (80030c4 <_isatty+0xc>)
 80030bc:	2000      	movs	r0, #0
 80030be:	601a      	str	r2, [r3, #0]
 80030c0:	4770      	bx	lr
 80030c2:	bf00      	nop
 80030c4:	200002f8 	.word	0x200002f8

080030c8 <_lseek>:
 80030c8:	2258      	movs	r2, #88	; 0x58
 80030ca:	4b02      	ldr	r3, [pc, #8]	; (80030d4 <_lseek+0xc>)
 80030cc:	f04f 30ff 	mov.w	r0, #4294967295
 80030d0:	601a      	str	r2, [r3, #0]
 80030d2:	4770      	bx	lr
 80030d4:	200002f8 	.word	0x200002f8

080030d8 <_read>:
 80030d8:	2258      	movs	r2, #88	; 0x58
 80030da:	4b02      	ldr	r3, [pc, #8]	; (80030e4 <_read+0xc>)
 80030dc:	f04f 30ff 	mov.w	r0, #4294967295
 80030e0:	601a      	str	r2, [r3, #0]
 80030e2:	4770      	bx	lr
 80030e4:	200002f8 	.word	0x200002f8

080030e8 <_sbrk>:
 80030e8:	4b04      	ldr	r3, [pc, #16]	; (80030fc <_sbrk+0x14>)
 80030ea:	4602      	mov	r2, r0
 80030ec:	6819      	ldr	r1, [r3, #0]
 80030ee:	b909      	cbnz	r1, 80030f4 <_sbrk+0xc>
 80030f0:	4903      	ldr	r1, [pc, #12]	; (8003100 <_sbrk+0x18>)
 80030f2:	6019      	str	r1, [r3, #0]
 80030f4:	6818      	ldr	r0, [r3, #0]
 80030f6:	4402      	add	r2, r0
 80030f8:	601a      	str	r2, [r3, #0]
 80030fa:	4770      	bx	lr
 80030fc:	20000180 	.word	0x20000180
 8003100:	200002fc 	.word	0x200002fc

08003104 <_init>:
 8003104:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8003106:	bf00      	nop
 8003108:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800310a:	bc08      	pop	{r3}
 800310c:	469e      	mov	lr, r3
 800310e:	4770      	bx	lr

08003110 <_fini>:
 8003110:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8003112:	bf00      	nop
 8003114:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8003116:	bc08      	pop	{r3}
 8003118:	469e      	mov	lr, r3
 800311a:	4770      	bx	lr