STM32F103_RGB_Controller/Debug/STM32F103_RGB_Controller.list

STM32F103_RGB_Controller.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08004000  08004000  00004000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00004b70  080041e4  080041e4  000041e4  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       0000021c  08008d54  08008d54  00008d54  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  08008f70  08008f70  00008f70  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  08008f74  08008f74  00008f74  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         00000078  20000000  08008f78  00010000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          000007ec  20000078  08008ff0  00010078  2**2
                  ALLOC
  7 ._user_heap_stack 00000600  20000864  08008ff0  00010864  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  00010078  2**0
                  CONTENTS, READONLY
  9 .debug_info   0001ead1  00000000  00000000  000100a1  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 0000388a  00000000  00000000  0002eb72  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    0000ab53  00000000  00000000  000323fc  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 00000ce8  00000000  00000000  0003cf50  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00001478  00000000  00000000  0003dc38  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   0000845a  00000000  00000000  0003f0b0  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    0000507f  00000000  00000000  0004750a  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  0004c589  2**0
                  CONTENTS, READONLY
 17 .debug_frame  00003064  00000000  00000000  0004c608  2**2
                  CONTENTS, READONLY, DEBUGGING
 18 .stab         00000084  00000000  00000000  0004f66c  2**2
                  CONTENTS, READONLY, DEBUGGING
 19 .stabstr      00000117  00000000  00000000  0004f6f0  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080041e4 <__do_global_dtors_aux>:
 80041e4:	b510      	push	{r4, lr}
 80041e6:	4c05      	ldr	r4, [pc, #20]	; (80041fc <__do_global_dtors_aux+0x18>)
 80041e8:	7823      	ldrb	r3, [r4, #0]
 80041ea:	b933      	cbnz	r3, 80041fa <__do_global_dtors_aux+0x16>
 80041ec:	4b04      	ldr	r3, [pc, #16]	; (8004200 <__do_global_dtors_aux+0x1c>)
 80041ee:	b113      	cbz	r3, 80041f6 <__do_global_dtors_aux+0x12>
 80041f0:	4804      	ldr	r0, [pc, #16]	; (8004204 <__do_global_dtors_aux+0x20>)
 80041f2:	f3af 8000 	nop.w
 80041f6:	2301      	movs	r3, #1
 80041f8:	7023      	strb	r3, [r4, #0]
 80041fa:	bd10      	pop	{r4, pc}
 80041fc:	20000078 	.word	0x20000078
 8004200:	00000000 	.word	0x00000000
 8004204:	08008d3c 	.word	0x08008d3c

08004208 <frame_dummy>:
 8004208:	b508      	push	{r3, lr}
 800420a:	4b03      	ldr	r3, [pc, #12]	; (8004218 <frame_dummy+0x10>)
 800420c:	b11b      	cbz	r3, 8004216 <frame_dummy+0xe>
 800420e:	4903      	ldr	r1, [pc, #12]	; (800421c <frame_dummy+0x14>)
 8004210:	4803      	ldr	r0, [pc, #12]	; (8004220 <frame_dummy+0x18>)
 8004212:	f3af 8000 	nop.w
 8004216:	bd08      	pop	{r3, pc}
 8004218:	00000000 	.word	0x00000000
 800421c:	2000007c 	.word	0x2000007c
 8004220:	08008d3c 	.word	0x08008d3c

08004224 <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8004224:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8004226:	4b0e      	ldr	r3, [pc, #56]	; (8004260 <HAL_InitTick+0x3c>)
{
 8004228:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800422a:	7818      	ldrb	r0, [r3, #0]
 800422c:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8004230:	fbb3 f3f0 	udiv	r3, r3, r0
 8004234:	4a0b      	ldr	r2, [pc, #44]	; (8004264 <HAL_InitTick+0x40>)
 8004236:	6810      	ldr	r0, [r2, #0]
 8004238:	fbb0 f0f3 	udiv	r0, r0, r3
 800423c:	f000 f89e 	bl	800437c <HAL_SYSTICK_Config>
 8004240:	4604      	mov	r4, r0
 8004242:	b958      	cbnz	r0, 800425c <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8004244:	2d0f      	cmp	r5, #15
 8004246:	d809      	bhi.n	800425c <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8004248:	4602      	mov	r2, r0
 800424a:	4629      	mov	r1, r5
 800424c:	f04f 30ff 	mov.w	r0, #4294967295
 8004250:	f000 f854 	bl	80042fc <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 8004254:	4b04      	ldr	r3, [pc, #16]	; (8004268 <HAL_InitTick+0x44>)
 8004256:	4620      	mov	r0, r4
 8004258:	601d      	str	r5, [r3, #0]
 800425a:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 800425c:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 800425e:	bd38      	pop	{r3, r4, r5, pc}
 8004260:	20000000 	.word	0x20000000
 8004264:	20000010 	.word	0x20000010
 8004268:	20000004 	.word	0x20000004

0800426c <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 800426c:	4a07      	ldr	r2, [pc, #28]	; (800428c <HAL_Init+0x20>)
{
 800426e:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8004270:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8004272:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8004274:	f043 0310 	orr.w	r3, r3, #16
 8004278:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800427a:	f000 f82d 	bl	80042d8 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 800427e:	2000      	movs	r0, #0
 8004280:	f7ff ffd0 	bl	8004224 <HAL_InitTick>
  HAL_MspInit();
 8004284:	f003 fb6e 	bl	8007964 <HAL_MspInit>
}
 8004288:	2000      	movs	r0, #0
 800428a:	bd08      	pop	{r3, pc}
 800428c:	40022000 	.word	0x40022000

08004290 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 8004290:	4a03      	ldr	r2, [pc, #12]	; (80042a0 <HAL_IncTick+0x10>)
 8004292:	4b04      	ldr	r3, [pc, #16]	; (80042a4 <HAL_IncTick+0x14>)
 8004294:	6811      	ldr	r1, [r2, #0]
 8004296:	781b      	ldrb	r3, [r3, #0]
 8004298:	440b      	add	r3, r1
 800429a:	6013      	str	r3, [r2, #0]
 800429c:	4770      	bx	lr
 800429e:	bf00      	nop
 80042a0:	20000430 	.word	0x20000430
 80042a4:	20000000 	.word	0x20000000

080042a8 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80042a8:	4b01      	ldr	r3, [pc, #4]	; (80042b0 <HAL_GetTick+0x8>)
 80042aa:	6818      	ldr	r0, [r3, #0]
}
 80042ac:	4770      	bx	lr
 80042ae:	bf00      	nop
 80042b0:	20000430 	.word	0x20000430

080042b4 <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80042b4:	b538      	push	{r3, r4, r5, lr}
 80042b6:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80042b8:	f7ff fff6 	bl	80042a8 <HAL_GetTick>
 80042bc:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80042be:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80042c0:	bf1e      	ittt	ne
 80042c2:	4b04      	ldrne	r3, [pc, #16]	; (80042d4 <HAL_Delay+0x20>)
 80042c4:	781b      	ldrbne	r3, [r3, #0]
 80042c6:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80042c8:	f7ff ffee 	bl	80042a8 <HAL_GetTick>
 80042cc:	1b40      	subs	r0, r0, r5
 80042ce:	4284      	cmp	r4, r0
 80042d0:	d8fa      	bhi.n	80042c8 <HAL_Delay+0x14>
  {
  }
}
 80042d2:	bd38      	pop	{r3, r4, r5, pc}
 80042d4:	20000000 	.word	0x20000000

080042d8 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80042d8:	4a07      	ldr	r2, [pc, #28]	; (80042f8 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80042da:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80042dc:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80042de:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 80042e2:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 80042e6:	041b      	lsls	r3, r3, #16
 80042e8:	0c1b      	lsrs	r3, r3, #16
 80042ea:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 80042ee:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 80042f2:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 80042f4:	60d3      	str	r3, [r2, #12]
 80042f6:	4770      	bx	lr
 80042f8:	e000ed00 	.word	0xe000ed00

080042fc <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 80042fc:	4b17      	ldr	r3, [pc, #92]	; (800435c <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 80042fe:	b530      	push	{r4, r5, lr}
 8004300:	68dc      	ldr	r4, [r3, #12]
 8004302:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8004306:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800430a:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 800430c:	2b04      	cmp	r3, #4
 800430e:	bf28      	it	cs
 8004310:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8004312:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8004314:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8004318:	bf98      	it	ls
 800431a:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800431c:	fa05 f303 	lsl.w	r3, r5, r3
 8004320:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8004324:	bf88      	it	hi
 8004326:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8004328:	4019      	ands	r1, r3
 800432a:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 800432c:	fa05 f404 	lsl.w	r4, r5, r4
 8004330:	3c01      	subs	r4, #1
 8004332:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 8004334:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8004336:	ea42 0201 	orr.w	r2, r2, r1
 800433a:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800433e:	bfaf      	iteee	ge
 8004340:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8004344:	4b06      	ldrlt	r3, [pc, #24]	; (8004360 <HAL_NVIC_SetPriority+0x64>)
 8004346:	f000 000f 	andlt.w	r0, r0, #15
 800434a:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800434c:	bfa5      	ittet	ge
 800434e:	b2d2      	uxtbge	r2, r2
 8004350:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8004354:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8004356:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 800435a:	bd30      	pop	{r4, r5, pc}
 800435c:	e000ed00 	.word	0xe000ed00
 8004360:	e000ed14 	.word	0xe000ed14

08004364 <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 8004364:	2301      	movs	r3, #1
 8004366:	0942      	lsrs	r2, r0, #5
 8004368:	f000 001f 	and.w	r0, r0, #31
 800436c:	fa03 f000 	lsl.w	r0, r3, r0
 8004370:	4b01      	ldr	r3, [pc, #4]	; (8004378 <HAL_NVIC_EnableIRQ+0x14>)
 8004372:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 8004376:	4770      	bx	lr
 8004378:	e000e100 	.word	0xe000e100

0800437c <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 800437c:	3801      	subs	r0, #1
 800437e:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8004382:	d20a      	bcs.n	800439a <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8004384:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8004386:	4b06      	ldr	r3, [pc, #24]	; (80043a0 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8004388:	4a06      	ldr	r2, [pc, #24]	; (80043a4 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800438a:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800438c:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8004390:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8004392:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8004394:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8004396:	601a      	str	r2, [r3, #0]
 8004398:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 800439a:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 800439c:	4770      	bx	lr
 800439e:	bf00      	nop
 80043a0:	e000e010 	.word	0xe000e010
 80043a4:	e000ed00 	.word	0xe000ed00

080043a8 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Channel.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 80043a8:	b510      	push	{r4, lr}
  uint32_t tmp = 0U;

  /* Check the DMA handle allocation */
  if(hdma == NULL)
 80043aa:	2800      	cmp	r0, #0
 80043ac:	d032      	beq.n	8004414 <HAL_DMA_Init+0x6c>
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

#if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC)
  /* calculation of the channel index */
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 80043ae:	6801      	ldr	r1, [r0, #0]
 80043b0:	4b19      	ldr	r3, [pc, #100]	; (8004418 <HAL_DMA_Init+0x70>)
 80043b2:	2414      	movs	r4, #20
 80043b4:	4299      	cmp	r1, r3
 80043b6:	d825      	bhi.n	8004404 <HAL_DMA_Init+0x5c>
  {
    /* DMA1 */
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 80043b8:	4a18      	ldr	r2, [pc, #96]	; (800441c <HAL_DMA_Init+0x74>)
    hdma->DmaBaseAddress = DMA1;
 80043ba:	f2a3 4307 	subw	r3, r3, #1031	; 0x407
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 80043be:	440a      	add	r2, r1
 80043c0:	fbb2 f2f4 	udiv	r2, r2, r4
 80043c4:	0092      	lsls	r2, r2, #2
 80043c6:	6402      	str	r2, [r0, #64]	; 0x40
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
                      DMA_CCR_DIR));

  /* Prepare the DMA Channel configuration */
  tmp |=  hdma->Init.Direction        |
 80043c8:	6884      	ldr	r4, [r0, #8]
    hdma->DmaBaseAddress = DMA2;
 80043ca:	63c3      	str	r3, [r0, #60]	; 0x3c
  tmp |=  hdma->Init.Direction        |
 80043cc:	6843      	ldr	r3, [r0, #4]
  tmp = hdma->Instance->CCR;
 80043ce:	680a      	ldr	r2, [r1, #0]
  tmp |=  hdma->Init.Direction        |
 80043d0:	4323      	orrs	r3, r4
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 80043d2:	68c4      	ldr	r4, [r0, #12]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 80043d4:	f422 527f 	bic.w	r2, r2, #16320	; 0x3fc0
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 80043d8:	4323      	orrs	r3, r4
 80043da:	6904      	ldr	r4, [r0, #16]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 80043dc:	f022 0230 	bic.w	r2, r2, #48	; 0x30
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 80043e0:	4323      	orrs	r3, r4
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 80043e2:	6944      	ldr	r4, [r0, #20]
 80043e4:	4323      	orrs	r3, r4
 80043e6:	6984      	ldr	r4, [r0, #24]
 80043e8:	4323      	orrs	r3, r4
          hdma->Init.Mode                | hdma->Init.Priority;
 80043ea:	69c4      	ldr	r4, [r0, #28]
 80043ec:	4323      	orrs	r3, r4
  tmp |=  hdma->Init.Direction        |
 80043ee:	4313      	orrs	r3, r2

  /* Write to DMA Channel CR register */
  hdma->Instance->CCR = tmp;
 80043f0:	600b      	str	r3, [r1, #0]

  /* Initialise the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;

  /* Initialize the DMA state*/
  hdma->State = HAL_DMA_STATE_READY;
 80043f2:	2201      	movs	r2, #1
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 80043f4:	2300      	movs	r3, #0
  hdma->State = HAL_DMA_STATE_READY;
 80043f6:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 80043fa:	6383      	str	r3, [r0, #56]	; 0x38
  /* Allocate lock resource and initialize it */
  hdma->Lock = HAL_UNLOCKED;
 80043fc:	f880 3020 	strb.w	r3, [r0, #32]

  return HAL_OK;
 8004400:	4618      	mov	r0, r3
 8004402:	bd10      	pop	{r4, pc}
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 8004404:	4b06      	ldr	r3, [pc, #24]	; (8004420 <HAL_DMA_Init+0x78>)
 8004406:	440b      	add	r3, r1
 8004408:	fbb3 f3f4 	udiv	r3, r3, r4
 800440c:	009b      	lsls	r3, r3, #2
 800440e:	6403      	str	r3, [r0, #64]	; 0x40
    hdma->DmaBaseAddress = DMA2;
 8004410:	4b04      	ldr	r3, [pc, #16]	; (8004424 <HAL_DMA_Init+0x7c>)
 8004412:	e7d9      	b.n	80043c8 <HAL_DMA_Init+0x20>
    return HAL_ERROR;
 8004414:	2001      	movs	r0, #1
}
 8004416:	bd10      	pop	{r4, pc}
 8004418:	40020407 	.word	0x40020407
 800441c:	bffdfff8 	.word	0xbffdfff8
 8004420:	bffdfbf8 	.word	0xbffdfbf8
 8004424:	40020400 	.word	0x40020400

08004428 <HAL_DMA_Start_IT>:
  * @param  DstAddress: The destination memory Buffer address
  * @param  DataLength: The length of data to be transferred from source to destination
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
 8004428:	b5f0      	push	{r4, r5, r6, r7, lr}

  /* Check the parameters */
  assert_param(IS_DMA_BUFFER_SIZE(DataLength));

  /* Process locked */
  __HAL_LOCK(hdma);
 800442a:	f890 4020 	ldrb.w	r4, [r0, #32]
 800442e:	2c01      	cmp	r4, #1
 8004430:	d035      	beq.n	800449e <HAL_DMA_Start_IT+0x76>
 8004432:	2401      	movs	r4, #1
  
  if(HAL_DMA_STATE_READY == hdma->State)
 8004434:	f890 5021 	ldrb.w	r5, [r0, #33]	; 0x21
  __HAL_LOCK(hdma);
 8004438:	f880 4020 	strb.w	r4, [r0, #32]
  if(HAL_DMA_STATE_READY == hdma->State)
 800443c:	42a5      	cmp	r5, r4
 800443e:	f04f 0600 	mov.w	r6, #0
 8004442:	f04f 0402 	mov.w	r4, #2
 8004446:	d128      	bne.n	800449a <HAL_DMA_Start_IT+0x72>
  {
    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8004448:	f880 4021 	strb.w	r4, [r0, #33]	; 0x21
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
    
    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 800444c:	6804      	ldr	r4, [r0, #0]
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 800444e:	6386      	str	r6, [r0, #56]	; 0x38
    __HAL_DMA_DISABLE(hdma);
 8004450:	6826      	ldr	r6, [r4, #0]
  * @retval HAL status
  */
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
  /* Clear all flags */
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 8004452:	6c07      	ldr	r7, [r0, #64]	; 0x40
    __HAL_DMA_DISABLE(hdma);
 8004454:	f026 0601 	bic.w	r6, r6, #1
 8004458:	6026      	str	r6, [r4, #0]
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 800445a:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
 800445c:	40bd      	lsls	r5, r7
 800445e:	6075      	str	r5, [r6, #4]

  /* Configure DMA Channel data length */
  hdma->Instance->CNDTR = DataLength;
 8004460:	6063      	str	r3, [r4, #4]

  /* Memory to Peripheral */
  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
 8004462:	6843      	ldr	r3, [r0, #4]
 8004464:	6805      	ldr	r5, [r0, #0]
 8004466:	2b10      	cmp	r3, #16
    if(NULL != hdma->XferHalfCpltCallback)
 8004468:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
  {
    /* Configure DMA Channel destination address */
    hdma->Instance->CPAR = DstAddress;
 800446a:	bf0b      	itete	eq
 800446c:	60a2      	streq	r2, [r4, #8]
  }
  /* Peripheral to Memory */
  else
  {
    /* Configure DMA Channel source address */
    hdma->Instance->CPAR = SrcAddress;
 800446e:	60a1      	strne	r1, [r4, #8]
    hdma->Instance->CMAR = SrcAddress;
 8004470:	60e1      	streq	r1, [r4, #12]

    /* Configure DMA Channel destination address */
    hdma->Instance->CMAR = DstAddress;
 8004472:	60e2      	strne	r2, [r4, #12]
    if(NULL != hdma->XferHalfCpltCallback)
 8004474:	b14b      	cbz	r3, 800448a <HAL_DMA_Start_IT+0x62>
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8004476:	6823      	ldr	r3, [r4, #0]
 8004478:	f043 030e 	orr.w	r3, r3, #14
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 800447c:	6023      	str	r3, [r4, #0]
    __HAL_DMA_ENABLE(hdma);
 800447e:	682b      	ldr	r3, [r5, #0]
  HAL_StatusTypeDef status = HAL_OK;
 8004480:	2000      	movs	r0, #0
    __HAL_DMA_ENABLE(hdma);
 8004482:	f043 0301 	orr.w	r3, r3, #1
 8004486:	602b      	str	r3, [r5, #0]
 8004488:	bdf0      	pop	{r4, r5, r6, r7, pc}
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 800448a:	6823      	ldr	r3, [r4, #0]
 800448c:	f023 0304 	bic.w	r3, r3, #4
 8004490:	6023      	str	r3, [r4, #0]
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 8004492:	6823      	ldr	r3, [r4, #0]
 8004494:	f043 030a 	orr.w	r3, r3, #10
 8004498:	e7f0      	b.n	800447c <HAL_DMA_Start_IT+0x54>
    __HAL_UNLOCK(hdma); 
 800449a:	f880 6020 	strb.w	r6, [r0, #32]
  __HAL_LOCK(hdma);
 800449e:	2002      	movs	r0, #2
}
 80044a0:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

080044a4 <HAL_DMA_Abort_IT>:
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80044a4:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 80044a8:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80044aa:	2b02      	cmp	r3, #2
 80044ac:	d003      	beq.n	80044b6 <HAL_DMA_Abort_IT+0x12>
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80044ae:	2304      	movs	r3, #4
 80044b0:	6383      	str	r3, [r0, #56]	; 0x38
    status = HAL_ERROR;
 80044b2:	2001      	movs	r0, #1
 80044b4:	bd10      	pop	{r4, pc}
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80044b6:	6803      	ldr	r3, [r0, #0]
 80044b8:	681a      	ldr	r2, [r3, #0]
 80044ba:	f022 020e 	bic.w	r2, r2, #14
 80044be:	601a      	str	r2, [r3, #0]
    __HAL_DMA_DISABLE(hdma);
 80044c0:	681a      	ldr	r2, [r3, #0]
 80044c2:	f022 0201 	bic.w	r2, r2, #1
 80044c6:	601a      	str	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 80044c8:	4a29      	ldr	r2, [pc, #164]	; (8004570 <HAL_DMA_Abort_IT+0xcc>)
 80044ca:	4293      	cmp	r3, r2
 80044cc:	d924      	bls.n	8004518 <HAL_DMA_Abort_IT+0x74>
 80044ce:	f502 7262 	add.w	r2, r2, #904	; 0x388
 80044d2:	4293      	cmp	r3, r2
 80044d4:	d019      	beq.n	800450a <HAL_DMA_Abort_IT+0x66>
 80044d6:	3214      	adds	r2, #20
 80044d8:	4293      	cmp	r3, r2
 80044da:	d018      	beq.n	800450e <HAL_DMA_Abort_IT+0x6a>
 80044dc:	3214      	adds	r2, #20
 80044de:	4293      	cmp	r3, r2
 80044e0:	d017      	beq.n	8004512 <HAL_DMA_Abort_IT+0x6e>
 80044e2:	3214      	adds	r2, #20
 80044e4:	4293      	cmp	r3, r2
 80044e6:	bf0c      	ite	eq
 80044e8:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 80044ec:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 80044f0:	4a20      	ldr	r2, [pc, #128]	; (8004574 <HAL_DMA_Abort_IT+0xd0>)
 80044f2:	6053      	str	r3, [r2, #4]
    hdma->State = HAL_DMA_STATE_READY;
 80044f4:	2301      	movs	r3, #1
    __HAL_UNLOCK(hdma);
 80044f6:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 80044f8:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    if(hdma->XferAbortCallback != NULL)
 80044fc:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 80044fe:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 8004502:	b39b      	cbz	r3, 800456c <HAL_DMA_Abort_IT+0xc8>
      hdma->XferAbortCallback(hdma);
 8004504:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8004506:	4620      	mov	r0, r4
 8004508:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 800450a:	2301      	movs	r3, #1
 800450c:	e7f0      	b.n	80044f0 <HAL_DMA_Abort_IT+0x4c>
 800450e:	2310      	movs	r3, #16
 8004510:	e7ee      	b.n	80044f0 <HAL_DMA_Abort_IT+0x4c>
 8004512:	f44f 7380 	mov.w	r3, #256	; 0x100
 8004516:	e7eb      	b.n	80044f0 <HAL_DMA_Abort_IT+0x4c>
 8004518:	4917      	ldr	r1, [pc, #92]	; (8004578 <HAL_DMA_Abort_IT+0xd4>)
 800451a:	428b      	cmp	r3, r1
 800451c:	d016      	beq.n	800454c <HAL_DMA_Abort_IT+0xa8>
 800451e:	3114      	adds	r1, #20
 8004520:	428b      	cmp	r3, r1
 8004522:	d015      	beq.n	8004550 <HAL_DMA_Abort_IT+0xac>
 8004524:	3114      	adds	r1, #20
 8004526:	428b      	cmp	r3, r1
 8004528:	d014      	beq.n	8004554 <HAL_DMA_Abort_IT+0xb0>
 800452a:	3114      	adds	r1, #20
 800452c:	428b      	cmp	r3, r1
 800452e:	d014      	beq.n	800455a <HAL_DMA_Abort_IT+0xb6>
 8004530:	3114      	adds	r1, #20
 8004532:	428b      	cmp	r3, r1
 8004534:	d014      	beq.n	8004560 <HAL_DMA_Abort_IT+0xbc>
 8004536:	3114      	adds	r1, #20
 8004538:	428b      	cmp	r3, r1
 800453a:	d014      	beq.n	8004566 <HAL_DMA_Abort_IT+0xc2>
 800453c:	4293      	cmp	r3, r2
 800453e:	bf14      	ite	ne
 8004540:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8004544:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 8004548:	4a0c      	ldr	r2, [pc, #48]	; (800457c <HAL_DMA_Abort_IT+0xd8>)
 800454a:	e7d2      	b.n	80044f2 <HAL_DMA_Abort_IT+0x4e>
 800454c:	2301      	movs	r3, #1
 800454e:	e7fb      	b.n	8004548 <HAL_DMA_Abort_IT+0xa4>
 8004550:	2310      	movs	r3, #16
 8004552:	e7f9      	b.n	8004548 <HAL_DMA_Abort_IT+0xa4>
 8004554:	f44f 7380 	mov.w	r3, #256	; 0x100
 8004558:	e7f6      	b.n	8004548 <HAL_DMA_Abort_IT+0xa4>
 800455a:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 800455e:	e7f3      	b.n	8004548 <HAL_DMA_Abort_IT+0xa4>
 8004560:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 8004564:	e7f0      	b.n	8004548 <HAL_DMA_Abort_IT+0xa4>
 8004566:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 800456a:	e7ed      	b.n	8004548 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 800456c:	4618      	mov	r0, r3
}
 800456e:	bd10      	pop	{r4, pc}
 8004570:	40020080 	.word	0x40020080
 8004574:	40020400 	.word	0x40020400
 8004578:	40020008 	.word	0x40020008
 800457c:	40020000 	.word	0x40020000

08004580 <HAL_DMA_IRQHandler>:
{
 8004580:	b470      	push	{r4, r5, r6}
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8004582:	2504      	movs	r5, #4
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8004584:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8004586:	6c02      	ldr	r2, [r0, #64]	; 0x40
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8004588:	6834      	ldr	r4, [r6, #0]
  uint32_t source_it = hdma->Instance->CCR;
 800458a:	6803      	ldr	r3, [r0, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 800458c:	4095      	lsls	r5, r2
 800458e:	4225      	tst	r5, r4
  uint32_t source_it = hdma->Instance->CCR;
 8004590:	6819      	ldr	r1, [r3, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8004592:	d055      	beq.n	8004640 <HAL_DMA_IRQHandler+0xc0>
 8004594:	074d      	lsls	r5, r1, #29
 8004596:	d553      	bpl.n	8004640 <HAL_DMA_IRQHandler+0xc0>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8004598:	681a      	ldr	r2, [r3, #0]
 800459a:	0696      	lsls	r6, r2, #26
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 800459c:	bf5e      	ittt	pl
 800459e:	681a      	ldrpl	r2, [r3, #0]
 80045a0:	f022 0204 	bicpl.w	r2, r2, #4
 80045a4:	601a      	strpl	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 80045a6:	4a60      	ldr	r2, [pc, #384]	; (8004728 <HAL_DMA_IRQHandler+0x1a8>)
 80045a8:	4293      	cmp	r3, r2
 80045aa:	d91f      	bls.n	80045ec <HAL_DMA_IRQHandler+0x6c>
 80045ac:	f502 7262 	add.w	r2, r2, #904	; 0x388
 80045b0:	4293      	cmp	r3, r2
 80045b2:	d014      	beq.n	80045de <HAL_DMA_IRQHandler+0x5e>
 80045b4:	3214      	adds	r2, #20
 80045b6:	4293      	cmp	r3, r2
 80045b8:	d013      	beq.n	80045e2 <HAL_DMA_IRQHandler+0x62>
 80045ba:	3214      	adds	r2, #20
 80045bc:	4293      	cmp	r3, r2
 80045be:	d012      	beq.n	80045e6 <HAL_DMA_IRQHandler+0x66>
 80045c0:	3214      	adds	r2, #20
 80045c2:	4293      	cmp	r3, r2
 80045c4:	bf0c      	ite	eq
 80045c6:	f44f 4380 	moveq.w	r3, #16384	; 0x4000
 80045ca:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 80045ce:	4a57      	ldr	r2, [pc, #348]	; (800472c <HAL_DMA_IRQHandler+0x1ac>)
 80045d0:	6053      	str	r3, [r2, #4]
    if(hdma->XferHalfCpltCallback != NULL)
 80045d2:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
    if (hdma->XferErrorCallback != NULL)
 80045d4:	2b00      	cmp	r3, #0
 80045d6:	f000 80a5 	beq.w	8004724 <HAL_DMA_IRQHandler+0x1a4>
}
 80045da:	bc70      	pop	{r4, r5, r6}
      hdma->XferErrorCallback(hdma);
 80045dc:	4718      	bx	r3
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 80045de:	2304      	movs	r3, #4
 80045e0:	e7f5      	b.n	80045ce <HAL_DMA_IRQHandler+0x4e>
 80045e2:	2340      	movs	r3, #64	; 0x40
 80045e4:	e7f3      	b.n	80045ce <HAL_DMA_IRQHandler+0x4e>
 80045e6:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80045ea:	e7f0      	b.n	80045ce <HAL_DMA_IRQHandler+0x4e>
 80045ec:	4950      	ldr	r1, [pc, #320]	; (8004730 <HAL_DMA_IRQHandler+0x1b0>)
 80045ee:	428b      	cmp	r3, r1
 80045f0:	d016      	beq.n	8004620 <HAL_DMA_IRQHandler+0xa0>
 80045f2:	3114      	adds	r1, #20
 80045f4:	428b      	cmp	r3, r1
 80045f6:	d015      	beq.n	8004624 <HAL_DMA_IRQHandler+0xa4>
 80045f8:	3114      	adds	r1, #20
 80045fa:	428b      	cmp	r3, r1
 80045fc:	d014      	beq.n	8004628 <HAL_DMA_IRQHandler+0xa8>
 80045fe:	3114      	adds	r1, #20
 8004600:	428b      	cmp	r3, r1
 8004602:	d014      	beq.n	800462e <HAL_DMA_IRQHandler+0xae>
 8004604:	3114      	adds	r1, #20
 8004606:	428b      	cmp	r3, r1
 8004608:	d014      	beq.n	8004634 <HAL_DMA_IRQHandler+0xb4>
 800460a:	3114      	adds	r1, #20
 800460c:	428b      	cmp	r3, r1
 800460e:	d014      	beq.n	800463a <HAL_DMA_IRQHandler+0xba>
 8004610:	4293      	cmp	r3, r2
 8004612:	bf14      	ite	ne
 8004614:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 8004618:	f04f 6380 	moveq.w	r3, #67108864	; 0x4000000
 800461c:	4a45      	ldr	r2, [pc, #276]	; (8004734 <HAL_DMA_IRQHandler+0x1b4>)
 800461e:	e7d7      	b.n	80045d0 <HAL_DMA_IRQHandler+0x50>
 8004620:	2304      	movs	r3, #4
 8004622:	e7fb      	b.n	800461c <HAL_DMA_IRQHandler+0x9c>
 8004624:	2340      	movs	r3, #64	; 0x40
 8004626:	e7f9      	b.n	800461c <HAL_DMA_IRQHandler+0x9c>
 8004628:	f44f 6380 	mov.w	r3, #1024	; 0x400
 800462c:	e7f6      	b.n	800461c <HAL_DMA_IRQHandler+0x9c>
 800462e:	f44f 4380 	mov.w	r3, #16384	; 0x4000
 8004632:	e7f3      	b.n	800461c <HAL_DMA_IRQHandler+0x9c>
 8004634:	f44f 2380 	mov.w	r3, #262144	; 0x40000
 8004638:	e7f0      	b.n	800461c <HAL_DMA_IRQHandler+0x9c>
 800463a:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
 800463e:	e7ed      	b.n	800461c <HAL_DMA_IRQHandler+0x9c>
  else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
 8004640:	2502      	movs	r5, #2
 8004642:	4095      	lsls	r5, r2
 8004644:	4225      	tst	r5, r4
 8004646:	d057      	beq.n	80046f8 <HAL_DMA_IRQHandler+0x178>
 8004648:	078d      	lsls	r5, r1, #30
 800464a:	d555      	bpl.n	80046f8 <HAL_DMA_IRQHandler+0x178>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 800464c:	681a      	ldr	r2, [r3, #0]
 800464e:	0694      	lsls	r4, r2, #26
 8004650:	d406      	bmi.n	8004660 <HAL_DMA_IRQHandler+0xe0>
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  
 8004652:	681a      	ldr	r2, [r3, #0]
 8004654:	f022 020a 	bic.w	r2, r2, #10
 8004658:	601a      	str	r2, [r3, #0]
      hdma->State = HAL_DMA_STATE_READY;
 800465a:	2201      	movs	r2, #1
 800465c:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8004660:	4a31      	ldr	r2, [pc, #196]	; (8004728 <HAL_DMA_IRQHandler+0x1a8>)
 8004662:	4293      	cmp	r3, r2
 8004664:	d91e      	bls.n	80046a4 <HAL_DMA_IRQHandler+0x124>
 8004666:	f502 7262 	add.w	r2, r2, #904	; 0x388
 800466a:	4293      	cmp	r3, r2
 800466c:	d013      	beq.n	8004696 <HAL_DMA_IRQHandler+0x116>
 800466e:	3214      	adds	r2, #20
 8004670:	4293      	cmp	r3, r2
 8004672:	d012      	beq.n	800469a <HAL_DMA_IRQHandler+0x11a>
 8004674:	3214      	adds	r2, #20
 8004676:	4293      	cmp	r3, r2
 8004678:	d011      	beq.n	800469e <HAL_DMA_IRQHandler+0x11e>
 800467a:	3214      	adds	r2, #20
 800467c:	4293      	cmp	r3, r2
 800467e:	bf0c      	ite	eq
 8004680:	f44f 5300 	moveq.w	r3, #8192	; 0x2000
 8004684:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8004688:	4a28      	ldr	r2, [pc, #160]	; (800472c <HAL_DMA_IRQHandler+0x1ac>)
 800468a:	6053      	str	r3, [r2, #4]
    __HAL_UNLOCK(hdma);
 800468c:	2300      	movs	r3, #0
 800468e:	f880 3020 	strb.w	r3, [r0, #32]
    if(hdma->XferCpltCallback != NULL)
 8004692:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8004694:	e79e      	b.n	80045d4 <HAL_DMA_IRQHandler+0x54>
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8004696:	2302      	movs	r3, #2
 8004698:	e7f6      	b.n	8004688 <HAL_DMA_IRQHandler+0x108>
 800469a:	2320      	movs	r3, #32
 800469c:	e7f4      	b.n	8004688 <HAL_DMA_IRQHandler+0x108>
 800469e:	f44f 7300 	mov.w	r3, #512	; 0x200
 80046a2:	e7f1      	b.n	8004688 <HAL_DMA_IRQHandler+0x108>
 80046a4:	4922      	ldr	r1, [pc, #136]	; (8004730 <HAL_DMA_IRQHandler+0x1b0>)
 80046a6:	428b      	cmp	r3, r1
 80046a8:	d016      	beq.n	80046d8 <HAL_DMA_IRQHandler+0x158>
 80046aa:	3114      	adds	r1, #20
 80046ac:	428b      	cmp	r3, r1
 80046ae:	d015      	beq.n	80046dc <HAL_DMA_IRQHandler+0x15c>
 80046b0:	3114      	adds	r1, #20
 80046b2:	428b      	cmp	r3, r1
 80046b4:	d014      	beq.n	80046e0 <HAL_DMA_IRQHandler+0x160>
 80046b6:	3114      	adds	r1, #20
 80046b8:	428b      	cmp	r3, r1
 80046ba:	d014      	beq.n	80046e6 <HAL_DMA_IRQHandler+0x166>
 80046bc:	3114      	adds	r1, #20
 80046be:	428b      	cmp	r3, r1
 80046c0:	d014      	beq.n	80046ec <HAL_DMA_IRQHandler+0x16c>
 80046c2:	3114      	adds	r1, #20
 80046c4:	428b      	cmp	r3, r1
 80046c6:	d014      	beq.n	80046f2 <HAL_DMA_IRQHandler+0x172>
 80046c8:	4293      	cmp	r3, r2
 80046ca:	bf14      	ite	ne
 80046cc:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 80046d0:	f04f 7300 	moveq.w	r3, #33554432	; 0x2000000
 80046d4:	4a17      	ldr	r2, [pc, #92]	; (8004734 <HAL_DMA_IRQHandler+0x1b4>)
 80046d6:	e7d8      	b.n	800468a <HAL_DMA_IRQHandler+0x10a>
 80046d8:	2302      	movs	r3, #2
 80046da:	e7fb      	b.n	80046d4 <HAL_DMA_IRQHandler+0x154>
 80046dc:	2320      	movs	r3, #32
 80046de:	e7f9      	b.n	80046d4 <HAL_DMA_IRQHandler+0x154>
 80046e0:	f44f 7300 	mov.w	r3, #512	; 0x200
 80046e4:	e7f6      	b.n	80046d4 <HAL_DMA_IRQHandler+0x154>
 80046e6:	f44f 5300 	mov.w	r3, #8192	; 0x2000
 80046ea:	e7f3      	b.n	80046d4 <HAL_DMA_IRQHandler+0x154>
 80046ec:	f44f 3300 	mov.w	r3, #131072	; 0x20000
 80046f0:	e7f0      	b.n	80046d4 <HAL_DMA_IRQHandler+0x154>
 80046f2:	f44f 1300 	mov.w	r3, #2097152	; 0x200000
 80046f6:	e7ed      	b.n	80046d4 <HAL_DMA_IRQHandler+0x154>
  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
 80046f8:	2508      	movs	r5, #8
 80046fa:	4095      	lsls	r5, r2
 80046fc:	4225      	tst	r5, r4
 80046fe:	d011      	beq.n	8004724 <HAL_DMA_IRQHandler+0x1a4>
 8004700:	0709      	lsls	r1, r1, #28
 8004702:	d50f      	bpl.n	8004724 <HAL_DMA_IRQHandler+0x1a4>
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8004704:	6819      	ldr	r1, [r3, #0]
 8004706:	f021 010e 	bic.w	r1, r1, #14
 800470a:	6019      	str	r1, [r3, #0]
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 800470c:	2301      	movs	r3, #1
 800470e:	fa03 f202 	lsl.w	r2, r3, r2
 8004712:	6072      	str	r2, [r6, #4]
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
 8004714:	6383      	str	r3, [r0, #56]	; 0x38
    hdma->State = HAL_DMA_STATE_READY;
 8004716:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    __HAL_UNLOCK(hdma);
 800471a:	2300      	movs	r3, #0
 800471c:	f880 3020 	strb.w	r3, [r0, #32]
    if (hdma->XferErrorCallback != NULL)
 8004720:	6b03      	ldr	r3, [r0, #48]	; 0x30
 8004722:	e757      	b.n	80045d4 <HAL_DMA_IRQHandler+0x54>
}
 8004724:	bc70      	pop	{r4, r5, r6}
 8004726:	4770      	bx	lr
 8004728:	40020080 	.word	0x40020080
 800472c:	40020400 	.word	0x40020400
 8004730:	40020008 	.word	0x40020008
 8004734:	40020000 	.word	0x40020000

08004738 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 8004738:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 800473c:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 800473e:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 8004740:	4f6c      	ldr	r7, [pc, #432]	; (80048f4 <HAL_GPIO_Init+0x1bc>)
 8004742:	4b6d      	ldr	r3, [pc, #436]	; (80048f8 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8004744:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 8004900 <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 8004748:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 8004904 <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 800474c:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8004750:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 8004752:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8004756:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 800475a:	45a0      	cmp	r8, r4
 800475c:	f040 8085 	bne.w	800486a <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 8004760:	684d      	ldr	r5, [r1, #4]
 8004762:	2d12      	cmp	r5, #18
 8004764:	f000 80b7 	beq.w	80048d6 <HAL_GPIO_Init+0x19e>
 8004768:	f200 808d 	bhi.w	8004886 <HAL_GPIO_Init+0x14e>
 800476c:	2d02      	cmp	r5, #2
 800476e:	f000 80af 	beq.w	80048d0 <HAL_GPIO_Init+0x198>
 8004772:	f200 8081 	bhi.w	8004878 <HAL_GPIO_Init+0x140>
 8004776:	2d00      	cmp	r5, #0
 8004778:	f000 8091 	beq.w	800489e <HAL_GPIO_Init+0x166>
 800477c:	2d01      	cmp	r5, #1
 800477e:	f000 80a5 	beq.w	80048cc <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8004782:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8004786:	2cff      	cmp	r4, #255	; 0xff
 8004788:	bf93      	iteet	ls
 800478a:	4682      	movls	sl, r0
 800478c:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 8004790:	3d08      	subhi	r5, #8
 8004792:	f8d0 b000 	ldrls.w	fp, [r0]
 8004796:	bf92      	itee	ls
 8004798:	00b5      	lslls	r5, r6, #2
 800479a:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 800479e:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80047a0:	fa09 f805 	lsl.w	r8, r9, r5
 80047a4:	ea2b 0808 	bic.w	r8, fp, r8
 80047a8:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 80047ac:	bf88      	it	hi
 80047ae:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80047b2:	ea48 0505 	orr.w	r5, r8, r5
 80047b6:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 80047ba:	f8d1 a004 	ldr.w	sl, [r1, #4]
 80047be:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 80047c2:	d052      	beq.n	800486a <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 80047c4:	69bd      	ldr	r5, [r7, #24]
 80047c6:	f026 0803 	bic.w	r8, r6, #3
 80047ca:	f045 0501 	orr.w	r5, r5, #1
 80047ce:	61bd      	str	r5, [r7, #24]
 80047d0:	69bd      	ldr	r5, [r7, #24]
 80047d2:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 80047d6:	f005 0501 	and.w	r5, r5, #1
 80047da:	9501      	str	r5, [sp, #4]
 80047dc:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80047e0:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 80047e4:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80047e6:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 80047ea:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80047ee:	fa09 f90b 	lsl.w	r9, r9, fp
 80047f2:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80047f6:	4d41      	ldr	r5, [pc, #260]	; (80048fc <HAL_GPIO_Init+0x1c4>)
 80047f8:	42a8      	cmp	r0, r5
 80047fa:	d071      	beq.n	80048e0 <HAL_GPIO_Init+0x1a8>
 80047fc:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8004800:	42a8      	cmp	r0, r5
 8004802:	d06f      	beq.n	80048e4 <HAL_GPIO_Init+0x1ac>
 8004804:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8004808:	42a8      	cmp	r0, r5
 800480a:	d06d      	beq.n	80048e8 <HAL_GPIO_Init+0x1b0>
 800480c:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8004810:	42a8      	cmp	r0, r5
 8004812:	d06b      	beq.n	80048ec <HAL_GPIO_Init+0x1b4>
 8004814:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8004818:	42a8      	cmp	r0, r5
 800481a:	d069      	beq.n	80048f0 <HAL_GPIO_Init+0x1b8>
 800481c:	4570      	cmp	r0, lr
 800481e:	bf0c      	ite	eq
 8004820:	2505      	moveq	r5, #5
 8004822:	2506      	movne	r5, #6
 8004824:	fa05 f50b 	lsl.w	r5, r5, fp
 8004828:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 800482c:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 8004830:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 8004832:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 8004836:	bf14      	ite	ne
 8004838:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 800483a:	43a5      	biceq	r5, r4
 800483c:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 800483e:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 8004840:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 8004844:	bf14      	ite	ne
 8004846:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 8004848:	43a5      	biceq	r5, r4
 800484a:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 800484c:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 800484e:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 8004852:	bf14      	ite	ne
 8004854:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 8004856:	43a5      	biceq	r5, r4
 8004858:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 800485a:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 800485c:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 8004860:	bf14      	ite	ne
 8004862:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 8004864:	ea25 0404 	biceq.w	r4, r5, r4
 8004868:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 800486a:	3601      	adds	r6, #1
 800486c:	2e10      	cmp	r6, #16
 800486e:	f47f af6d 	bne.w	800474c <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 8004872:	b003      	add	sp, #12
 8004874:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 8004878:	2d03      	cmp	r5, #3
 800487a:	d025      	beq.n	80048c8 <HAL_GPIO_Init+0x190>
 800487c:	2d11      	cmp	r5, #17
 800487e:	d180      	bne.n	8004782 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 8004880:	68ca      	ldr	r2, [r1, #12]
 8004882:	3204      	adds	r2, #4
          break;
 8004884:	e77d      	b.n	8004782 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8004886:	4565      	cmp	r5, ip
 8004888:	d009      	beq.n	800489e <HAL_GPIO_Init+0x166>
 800488a:	d812      	bhi.n	80048b2 <HAL_GPIO_Init+0x17a>
 800488c:	f8df 9078 	ldr.w	r9, [pc, #120]	; 8004908 <HAL_GPIO_Init+0x1d0>
 8004890:	454d      	cmp	r5, r9
 8004892:	d004      	beq.n	800489e <HAL_GPIO_Init+0x166>
 8004894:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8004898:	454d      	cmp	r5, r9
 800489a:	f47f af72 	bne.w	8004782 <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 800489e:	688a      	ldr	r2, [r1, #8]
 80048a0:	b1e2      	cbz	r2, 80048dc <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 80048a2:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 80048a4:	bf0c      	ite	eq
 80048a6:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 80048aa:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 80048ae:	2208      	movs	r2, #8
 80048b0:	e767      	b.n	8004782 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 80048b2:	f8df 9058 	ldr.w	r9, [pc, #88]	; 800490c <HAL_GPIO_Init+0x1d4>
 80048b6:	454d      	cmp	r5, r9
 80048b8:	d0f1      	beq.n	800489e <HAL_GPIO_Init+0x166>
 80048ba:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 80048be:	454d      	cmp	r5, r9
 80048c0:	d0ed      	beq.n	800489e <HAL_GPIO_Init+0x166>
 80048c2:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 80048c6:	e7e7      	b.n	8004898 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 80048c8:	2200      	movs	r2, #0
 80048ca:	e75a      	b.n	8004782 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 80048cc:	68ca      	ldr	r2, [r1, #12]
          break;
 80048ce:	e758      	b.n	8004782 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 80048d0:	68ca      	ldr	r2, [r1, #12]
 80048d2:	3208      	adds	r2, #8
          break;
 80048d4:	e755      	b.n	8004782 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 80048d6:	68ca      	ldr	r2, [r1, #12]
 80048d8:	320c      	adds	r2, #12
          break;
 80048da:	e752      	b.n	8004782 <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 80048dc:	2204      	movs	r2, #4
 80048de:	e750      	b.n	8004782 <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80048e0:	2500      	movs	r5, #0
 80048e2:	e79f      	b.n	8004824 <HAL_GPIO_Init+0xec>
 80048e4:	2501      	movs	r5, #1
 80048e6:	e79d      	b.n	8004824 <HAL_GPIO_Init+0xec>
 80048e8:	2502      	movs	r5, #2
 80048ea:	e79b      	b.n	8004824 <HAL_GPIO_Init+0xec>
 80048ec:	2503      	movs	r5, #3
 80048ee:	e799      	b.n	8004824 <HAL_GPIO_Init+0xec>
 80048f0:	2504      	movs	r5, #4
 80048f2:	e797      	b.n	8004824 <HAL_GPIO_Init+0xec>
 80048f4:	40021000 	.word	0x40021000
 80048f8:	40010400 	.word	0x40010400
 80048fc:	40010800 	.word	0x40010800
 8004900:	40011c00 	.word	0x40011c00
 8004904:	10210000 	.word	0x10210000
 8004908:	10110000 	.word	0x10110000
 800490c:	10310000 	.word	0x10310000

08004910 <HAL_GPIO_ReadPin>:
  GPIO_PinState bitstatus;

  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
 8004910:	6883      	ldr	r3, [r0, #8]
 8004912:	4219      	tst	r1, r3
  else
  {
    bitstatus = GPIO_PIN_RESET;
  }
  return bitstatus;
}
 8004914:	bf14      	ite	ne
 8004916:	2001      	movne	r0, #1
 8004918:	2000      	moveq	r0, #0
 800491a:	4770      	bx	lr

0800491c <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 800491c:	b10a      	cbz	r2, 8004922 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 800491e:	6101      	str	r1, [r0, #16]
 8004920:	4770      	bx	lr
 8004922:	0409      	lsls	r1, r1, #16
 8004924:	e7fb      	b.n	800491e <HAL_GPIO_WritePin+0x2>

08004926 <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 8004926:	68c3      	ldr	r3, [r0, #12]
 8004928:	4059      	eors	r1, r3
 800492a:	60c1      	str	r1, [r0, #12]
 800492c:	4770      	bx	lr

0800492e <I2C_IsAcknowledgeFailed>:
  *                the configuration information for the specified I2C.
  * @retval HAL status
  */
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
{
  if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
 800492e:	6802      	ldr	r2, [r0, #0]
 8004930:	6953      	ldr	r3, [r2, #20]
 8004932:	f413 6380 	ands.w	r3, r3, #1024	; 0x400
 8004936:	d00d      	beq.n	8004954 <I2C_IsAcknowledgeFailed+0x26>
  {
    /* Clear NACKF Flag */
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
 8004938:	f46f 6380 	mvn.w	r3, #1024	; 0x400
 800493c:	6153      	str	r3, [r2, #20]

    hi2c->ErrorCode = HAL_I2C_ERROR_AF;
 800493e:	2304      	movs	r3, #4
    hi2c->PreviousState = I2C_STATE_NONE;
    hi2c->State= HAL_I2C_STATE_READY;
 8004940:	2220      	movs	r2, #32
    hi2c->ErrorCode = HAL_I2C_ERROR_AF;
 8004942:	6403      	str	r3, [r0, #64]	; 0x40
    hi2c->PreviousState = I2C_STATE_NONE;
 8004944:	2300      	movs	r3, #0
 8004946:	6303      	str	r3, [r0, #48]	; 0x30

    /* Process Unlocked */
    __HAL_UNLOCK(hi2c);
 8004948:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
    hi2c->State= HAL_I2C_STATE_READY;
 800494c:	f880 203d 	strb.w	r2, [r0, #61]	; 0x3d

    return HAL_ERROR;
 8004950:	2001      	movs	r0, #1
 8004952:	4770      	bx	lr
  }
  return HAL_OK;
 8004954:	4618      	mov	r0, r3
}
 8004956:	4770      	bx	lr

08004958 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
{
 8004958:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800495c:	4604      	mov	r4, r0
 800495e:	4617      	mov	r7, r2
 8004960:	4699      	mov	r9, r3
  while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
 8004962:	f3c1 4807 	ubfx	r8, r1, #16, #8
 8004966:	b28e      	uxth	r6, r1
 8004968:	6825      	ldr	r5, [r4, #0]
 800496a:	f1b8 0f01 	cmp.w	r8, #1
 800496e:	bf0c      	ite	eq
 8004970:	696b      	ldreq	r3, [r5, #20]
 8004972:	69ab      	ldrne	r3, [r5, #24]
 8004974:	ea36 0303 	bics.w	r3, r6, r3
 8004978:	bf14      	ite	ne
 800497a:	2001      	movne	r0, #1
 800497c:	2000      	moveq	r0, #0
 800497e:	b908      	cbnz	r0, 8004984 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x2c>
}
 8004980:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
 8004984:	696b      	ldr	r3, [r5, #20]
 8004986:	055a      	lsls	r2, r3, #21
 8004988:	d512      	bpl.n	80049b0 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x58>
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 800498a:	682b      	ldr	r3, [r5, #0]
      hi2c->State= HAL_I2C_STATE_READY;
 800498c:	2220      	movs	r2, #32
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 800498e:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8004992:	602b      	str	r3, [r5, #0]
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
 8004994:	f46f 6380 	mvn.w	r3, #1024	; 0x400
 8004998:	616b      	str	r3, [r5, #20]
      hi2c->ErrorCode = HAL_I2C_ERROR_AF;
 800499a:	2304      	movs	r3, #4
 800499c:	6423      	str	r3, [r4, #64]	; 0x40
      hi2c->PreviousState = I2C_STATE_NONE;
 800499e:	2300      	movs	r3, #0
      return HAL_ERROR;
 80049a0:	2001      	movs	r0, #1
      hi2c->PreviousState = I2C_STATE_NONE;
 80049a2:	6323      	str	r3, [r4, #48]	; 0x30
      __HAL_UNLOCK(hi2c);
 80049a4:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
      hi2c->State= HAL_I2C_STATE_READY;
 80049a8:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
      return HAL_ERROR;
 80049ac:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    if(Timeout != HAL_MAX_DELAY)
 80049b0:	1c7b      	adds	r3, r7, #1
 80049b2:	d0d9      	beq.n	8004968 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 80049b4:	b94f      	cbnz	r7, 80049ca <I2C_WaitOnMasterAddressFlagUntilTimeout+0x72>
        hi2c->PreviousState = I2C_STATE_NONE;
 80049b6:	2300      	movs	r3, #0
        hi2c->State= HAL_I2C_STATE_READY;
 80049b8:	2220      	movs	r2, #32
        hi2c->PreviousState = I2C_STATE_NONE;
 80049ba:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 80049bc:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 80049c0:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
        return HAL_TIMEOUT;
 80049c4:	2003      	movs	r0, #3
 80049c6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 80049ca:	f7ff fc6d 	bl	80042a8 <HAL_GetTick>
 80049ce:	eba0 0009 	sub.w	r0, r0, r9
 80049d2:	4287      	cmp	r7, r0
 80049d4:	d2c8      	bcs.n	8004968 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
 80049d6:	e7ee      	b.n	80049b6 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x5e>

080049d8 <I2C_WaitOnFlagUntilTimeout>:
{
 80049d8:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 80049dc:	4604      	mov	r4, r0
 80049de:	4690      	mov	r8, r2
 80049e0:	461f      	mov	r7, r3
 80049e2:	9e08      	ldr	r6, [sp, #32]
  while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) 
 80049e4:	f3c1 4907 	ubfx	r9, r1, #16, #8
 80049e8:	b28d      	uxth	r5, r1
 80049ea:	6823      	ldr	r3, [r4, #0]
 80049ec:	f1b9 0f01 	cmp.w	r9, #1
 80049f0:	bf0c      	ite	eq
 80049f2:	695b      	ldreq	r3, [r3, #20]
 80049f4:	699b      	ldrne	r3, [r3, #24]
 80049f6:	ea35 0303 	bics.w	r3, r5, r3
 80049fa:	bf0c      	ite	eq
 80049fc:	2301      	moveq	r3, #1
 80049fe:	2300      	movne	r3, #0
 8004a00:	4543      	cmp	r3, r8
 8004a02:	d002      	beq.n	8004a0a <I2C_WaitOnFlagUntilTimeout+0x32>
  return HAL_OK;
 8004a04:	2000      	movs	r0, #0
}
 8004a06:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    if(Timeout != HAL_MAX_DELAY)
 8004a0a:	1c7b      	adds	r3, r7, #1
 8004a0c:	d0ed      	beq.n	80049ea <I2C_WaitOnFlagUntilTimeout+0x12>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8004a0e:	b95f      	cbnz	r7, 8004a28 <I2C_WaitOnFlagUntilTimeout+0x50>
        hi2c->PreviousState = I2C_STATE_NONE;
 8004a10:	2300      	movs	r3, #0
        hi2c->State= HAL_I2C_STATE_READY;
 8004a12:	2220      	movs	r2, #32
        hi2c->PreviousState = I2C_STATE_NONE;
 8004a14:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 8004a16:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 8004a1a:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
        __HAL_UNLOCK(hi2c);
 8004a1e:	2003      	movs	r0, #3
        hi2c->Mode = HAL_I2C_MODE_NONE;
 8004a20:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
 8004a24:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8004a28:	f7ff fc3e 	bl	80042a8 <HAL_GetTick>
 8004a2c:	1b80      	subs	r0, r0, r6
 8004a2e:	4287      	cmp	r7, r0
 8004a30:	d2db      	bcs.n	80049ea <I2C_WaitOnFlagUntilTimeout+0x12>
 8004a32:	e7ed      	b.n	8004a10 <I2C_WaitOnFlagUntilTimeout+0x38>

08004a34 <I2C_WaitOnTXEFlagUntilTimeout>:
{    
 8004a34:	b570      	push	{r4, r5, r6, lr}
 8004a36:	4604      	mov	r4, r0
 8004a38:	460d      	mov	r5, r1
 8004a3a:	4616      	mov	r6, r2
  while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
 8004a3c:	6823      	ldr	r3, [r4, #0]
 8004a3e:	695b      	ldr	r3, [r3, #20]
 8004a40:	061b      	lsls	r3, r3, #24
 8004a42:	d501      	bpl.n	8004a48 <I2C_WaitOnTXEFlagUntilTimeout+0x14>
  return HAL_OK;      
 8004a44:	2000      	movs	r0, #0
 8004a46:	bd70      	pop	{r4, r5, r6, pc}
    if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
 8004a48:	4620      	mov	r0, r4
 8004a4a:	f7ff ff70 	bl	800492e <I2C_IsAcknowledgeFailed>
 8004a4e:	b9a8      	cbnz	r0, 8004a7c <I2C_WaitOnTXEFlagUntilTimeout+0x48>
    if(Timeout != HAL_MAX_DELAY)
 8004a50:	1c6a      	adds	r2, r5, #1
 8004a52:	d0f3      	beq.n	8004a3c <I2C_WaitOnTXEFlagUntilTimeout+0x8>
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8004a54:	b965      	cbnz	r5, 8004a70 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8004a56:	6c23      	ldr	r3, [r4, #64]	; 0x40
        hi2c->State= HAL_I2C_STATE_READY;
 8004a58:	2220      	movs	r2, #32
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8004a5a:	f043 0320 	orr.w	r3, r3, #32
 8004a5e:	6423      	str	r3, [r4, #64]	; 0x40
        hi2c->PreviousState = I2C_STATE_NONE;
 8004a60:	2300      	movs	r3, #0
        __HAL_UNLOCK(hi2c);
 8004a62:	2003      	movs	r0, #3
        hi2c->PreviousState = I2C_STATE_NONE;
 8004a64:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 8004a66:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 8004a6a:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
 8004a6e:	bd70      	pop	{r4, r5, r6, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8004a70:	f7ff fc1a 	bl	80042a8 <HAL_GetTick>
 8004a74:	1b80      	subs	r0, r0, r6
 8004a76:	4285      	cmp	r5, r0
 8004a78:	d2e0      	bcs.n	8004a3c <I2C_WaitOnTXEFlagUntilTimeout+0x8>
 8004a7a:	e7ec      	b.n	8004a56 <I2C_WaitOnTXEFlagUntilTimeout+0x22>
      return HAL_ERROR;
 8004a7c:	2001      	movs	r0, #1
}
 8004a7e:	bd70      	pop	{r4, r5, r6, pc}

08004a80 <I2C_RequestMemoryWrite>:
{
 8004a80:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 8004a84:	4615      	mov	r5, r2
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8004a86:	6802      	ldr	r2, [r0, #0]
{
 8004a88:	4698      	mov	r8, r3
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8004a8a:	6813      	ldr	r3, [r2, #0]
{
 8004a8c:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8004a8e:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8004a92:	6013      	str	r3, [r2, #0]
{
 8004a94:	460f      	mov	r7, r1
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8004a96:	9600      	str	r6, [sp, #0]
 8004a98:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8004a9a:	2200      	movs	r2, #0
 8004a9c:	f04f 1101 	mov.w	r1, #65537	; 0x10001
{
 8004aa0:	4604      	mov	r4, r0
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8004aa2:	f7ff ff99 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 8004aa6:	b968      	cbnz	r0, 8004ac4 <I2C_RequestMemoryWrite+0x44>
  hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
 8004aa8:	6823      	ldr	r3, [r4, #0]
 8004aaa:	f007 07fe 	and.w	r7, r7, #254	; 0xfe
 8004aae:	611f      	str	r7, [r3, #16]
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
 8004ab0:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8004ab2:	4633      	mov	r3, r6
 8004ab4:	491a      	ldr	r1, [pc, #104]	; (8004b20 <I2C_RequestMemoryWrite+0xa0>)
 8004ab6:	4620      	mov	r0, r4
 8004ab8:	f7ff ff4e 	bl	8004958 <I2C_WaitOnMasterAddressFlagUntilTimeout>
 8004abc:	b130      	cbz	r0, 8004acc <I2C_RequestMemoryWrite+0x4c>
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004abe:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8004ac0:	2b04      	cmp	r3, #4
 8004ac2:	d018      	beq.n	8004af6 <I2C_RequestMemoryWrite+0x76>
      return HAL_TIMEOUT;
 8004ac4:	2003      	movs	r0, #3
}
 8004ac6:	b004      	add	sp, #16
 8004ac8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004acc:	6823      	ldr	r3, [r4, #0]
 8004ace:	9003      	str	r0, [sp, #12]
 8004ad0:	695a      	ldr	r2, [r3, #20]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004ad2:	990a      	ldr	r1, [sp, #40]	; 0x28
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004ad4:	9203      	str	r2, [sp, #12]
 8004ad6:	699b      	ldr	r3, [r3, #24]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004ad8:	4632      	mov	r2, r6
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004ada:	9303      	str	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004adc:	4620      	mov	r0, r4
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004ade:	9b03      	ldr	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004ae0:	f7ff ffa8 	bl	8004a34 <I2C_WaitOnTXEFlagUntilTimeout>
 8004ae4:	b148      	cbz	r0, 8004afa <I2C_RequestMemoryWrite+0x7a>
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004ae6:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8004ae8:	2b04      	cmp	r3, #4
 8004aea:	d1eb      	bne.n	8004ac4 <I2C_RequestMemoryWrite+0x44>
        hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8004aec:	6822      	ldr	r2, [r4, #0]
 8004aee:	6813      	ldr	r3, [r2, #0]
 8004af0:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8004af4:	6013      	str	r3, [r2, #0]
      return HAL_ERROR;
 8004af6:	2001      	movs	r0, #1
 8004af8:	e7e5      	b.n	8004ac6 <I2C_RequestMemoryWrite+0x46>
  if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
 8004afa:	f1b8 0f01 	cmp.w	r8, #1
 8004afe:	6823      	ldr	r3, [r4, #0]
 8004b00:	d102      	bne.n	8004b08 <I2C_RequestMemoryWrite+0x88>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8004b02:	b2ed      	uxtb	r5, r5
 8004b04:	611d      	str	r5, [r3, #16]
 8004b06:	e7de      	b.n	8004ac6 <I2C_RequestMemoryWrite+0x46>
    hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
 8004b08:	0a2a      	lsrs	r2, r5, #8
 8004b0a:	611a      	str	r2, [r3, #16]
    if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004b0c:	990a      	ldr	r1, [sp, #40]	; 0x28
 8004b0e:	4632      	mov	r2, r6
 8004b10:	4620      	mov	r0, r4
 8004b12:	f7ff ff8f 	bl	8004a34 <I2C_WaitOnTXEFlagUntilTimeout>
 8004b16:	2800      	cmp	r0, #0
 8004b18:	d1e5      	bne.n	8004ae6 <I2C_RequestMemoryWrite+0x66>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8004b1a:	6823      	ldr	r3, [r4, #0]
 8004b1c:	e7f1      	b.n	8004b02 <I2C_RequestMemoryWrite+0x82>
 8004b1e:	bf00      	nop
 8004b20:	00010002 	.word	0x00010002

08004b24 <I2C_RequestMemoryRead>:
{
 8004b24:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 8004b28:	4698      	mov	r8, r3
  hi2c->Instance->CR1 |= I2C_CR1_ACK;
 8004b2a:	6803      	ldr	r3, [r0, #0]
{
 8004b2c:	4616      	mov	r6, r2
  hi2c->Instance->CR1 |= I2C_CR1_ACK;
 8004b2e:	681a      	ldr	r2, [r3, #0]
{
 8004b30:	9d0b      	ldr	r5, [sp, #44]	; 0x2c
  hi2c->Instance->CR1 |= I2C_CR1_ACK;
 8004b32:	f442 6280 	orr.w	r2, r2, #1024	; 0x400
 8004b36:	601a      	str	r2, [r3, #0]
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8004b38:	681a      	ldr	r2, [r3, #0]
{
 8004b3a:	460f      	mov	r7, r1
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8004b3c:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 8004b40:	601a      	str	r2, [r3, #0]
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8004b42:	f04f 1101 	mov.w	r1, #65537	; 0x10001
 8004b46:	9500      	str	r5, [sp, #0]
 8004b48:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8004b4a:	2200      	movs	r2, #0
{
 8004b4c:	4604      	mov	r4, r0
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8004b4e:	f7ff ff43 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 8004b52:	b980      	cbnz	r0, 8004b76 <I2C_RequestMemoryRead+0x52>
  hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
 8004b54:	6823      	ldr	r3, [r4, #0]
 8004b56:	b2ff      	uxtb	r7, r7
 8004b58:	f007 02fe 	and.w	r2, r7, #254	; 0xfe
 8004b5c:	611a      	str	r2, [r3, #16]
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
 8004b5e:	492d      	ldr	r1, [pc, #180]	; (8004c14 <I2C_RequestMemoryRead+0xf0>)
 8004b60:	462b      	mov	r3, r5
 8004b62:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8004b64:	4620      	mov	r0, r4
 8004b66:	f7ff fef7 	bl	8004958 <I2C_WaitOnMasterAddressFlagUntilTimeout>
 8004b6a:	b140      	cbz	r0, 8004b7e <I2C_RequestMemoryRead+0x5a>
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004b6c:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8004b6e:	2b04      	cmp	r3, #4
 8004b70:	d101      	bne.n	8004b76 <I2C_RequestMemoryRead+0x52>
      return HAL_ERROR;
 8004b72:	2001      	movs	r0, #1
 8004b74:	e000      	b.n	8004b78 <I2C_RequestMemoryRead+0x54>
      return HAL_TIMEOUT;
 8004b76:	2003      	movs	r0, #3
}
 8004b78:	b004      	add	sp, #16
 8004b7a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004b7e:	6823      	ldr	r3, [r4, #0]
 8004b80:	9003      	str	r0, [sp, #12]
 8004b82:	695a      	ldr	r2, [r3, #20]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004b84:	990a      	ldr	r1, [sp, #40]	; 0x28
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004b86:	9203      	str	r2, [sp, #12]
 8004b88:	699b      	ldr	r3, [r3, #24]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004b8a:	462a      	mov	r2, r5
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004b8c:	9303      	str	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004b8e:	4620      	mov	r0, r4
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004b90:	9b03      	ldr	r3, [sp, #12]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004b92:	f7ff ff4f 	bl	8004a34 <I2C_WaitOnTXEFlagUntilTimeout>
 8004b96:	b140      	cbz	r0, 8004baa <I2C_RequestMemoryRead+0x86>
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004b98:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8004b9a:	2b04      	cmp	r3, #4
 8004b9c:	d1eb      	bne.n	8004b76 <I2C_RequestMemoryRead+0x52>
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8004b9e:	6822      	ldr	r2, [r4, #0]
 8004ba0:	6813      	ldr	r3, [r2, #0]
 8004ba2:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8004ba6:	6013      	str	r3, [r2, #0]
 8004ba8:	e7e3      	b.n	8004b72 <I2C_RequestMemoryRead+0x4e>
  if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
 8004baa:	f1b8 0f01 	cmp.w	r8, #1
 8004bae:	6823      	ldr	r3, [r4, #0]
 8004bb0:	d124      	bne.n	8004bfc <I2C_RequestMemoryRead+0xd8>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8004bb2:	b2f6      	uxtb	r6, r6
 8004bb4:	611e      	str	r6, [r3, #16]
  if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004bb6:	462a      	mov	r2, r5
 8004bb8:	990a      	ldr	r1, [sp, #40]	; 0x28
 8004bba:	4620      	mov	r0, r4
 8004bbc:	f7ff ff3a 	bl	8004a34 <I2C_WaitOnTXEFlagUntilTimeout>
 8004bc0:	4602      	mov	r2, r0
 8004bc2:	2800      	cmp	r0, #0
 8004bc4:	d1e8      	bne.n	8004b98 <I2C_RequestMemoryRead+0x74>
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8004bc6:	6821      	ldr	r1, [r4, #0]
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8004bc8:	4620      	mov	r0, r4
  hi2c->Instance->CR1 |= I2C_CR1_START;
 8004bca:	680b      	ldr	r3, [r1, #0]
 8004bcc:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8004bd0:	600b      	str	r3, [r1, #0]
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
 8004bd2:	9500      	str	r5, [sp, #0]
 8004bd4:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8004bd6:	f04f 1101 	mov.w	r1, #65537	; 0x10001
 8004bda:	f7ff fefd 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 8004bde:	2800      	cmp	r0, #0
 8004be0:	d1c9      	bne.n	8004b76 <I2C_RequestMemoryRead+0x52>
  hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
 8004be2:	6823      	ldr	r3, [r4, #0]
 8004be4:	f047 0701 	orr.w	r7, r7, #1
 8004be8:	611f      	str	r7, [r3, #16]
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
 8004bea:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8004bec:	462b      	mov	r3, r5
 8004bee:	4909      	ldr	r1, [pc, #36]	; (8004c14 <I2C_RequestMemoryRead+0xf0>)
 8004bf0:	4620      	mov	r0, r4
 8004bf2:	f7ff feb1 	bl	8004958 <I2C_WaitOnMasterAddressFlagUntilTimeout>
 8004bf6:	2800      	cmp	r0, #0
 8004bf8:	d1b8      	bne.n	8004b6c <I2C_RequestMemoryRead+0x48>
 8004bfa:	e7bd      	b.n	8004b78 <I2C_RequestMemoryRead+0x54>
    hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
 8004bfc:	0a32      	lsrs	r2, r6, #8
 8004bfe:	611a      	str	r2, [r3, #16]
    if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
 8004c00:	990a      	ldr	r1, [sp, #40]	; 0x28
 8004c02:	462a      	mov	r2, r5
 8004c04:	4620      	mov	r0, r4
 8004c06:	f7ff ff15 	bl	8004a34 <I2C_WaitOnTXEFlagUntilTimeout>
 8004c0a:	2800      	cmp	r0, #0
 8004c0c:	d1c4      	bne.n	8004b98 <I2C_RequestMemoryRead+0x74>
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
 8004c0e:	6823      	ldr	r3, [r4, #0]
 8004c10:	e7cf      	b.n	8004bb2 <I2C_RequestMemoryRead+0x8e>
 8004c12:	bf00      	nop
 8004c14:	00010002 	.word	0x00010002

08004c18 <I2C_WaitOnRXNEFlagUntilTimeout>:
{  
 8004c18:	b570      	push	{r4, r5, r6, lr}
 8004c1a:	4604      	mov	r4, r0
 8004c1c:	460d      	mov	r5, r1
 8004c1e:	4616      	mov	r6, r2
  while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
 8004c20:	6820      	ldr	r0, [r4, #0]
 8004c22:	6943      	ldr	r3, [r0, #20]
 8004c24:	f013 0340 	ands.w	r3, r3, #64	; 0x40
 8004c28:	d001      	beq.n	8004c2e <I2C_WaitOnRXNEFlagUntilTimeout+0x16>
  return HAL_OK;
 8004c2a:	2000      	movs	r0, #0
}
 8004c2c:	bd70      	pop	{r4, r5, r6, pc}
    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
 8004c2e:	6942      	ldr	r2, [r0, #20]
 8004c30:	06d2      	lsls	r2, r2, #27
 8004c32:	d50b      	bpl.n	8004c4c <I2C_WaitOnRXNEFlagUntilTimeout+0x34>
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
 8004c34:	f06f 0210 	mvn.w	r2, #16
 8004c38:	6142      	str	r2, [r0, #20]
      hi2c->State= HAL_I2C_STATE_READY;
 8004c3a:	2220      	movs	r2, #32
      hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8004c3c:	6423      	str	r3, [r4, #64]	; 0x40
      __HAL_UNLOCK(hi2c);
 8004c3e:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
      hi2c->PreviousState = I2C_STATE_NONE;
 8004c42:	6323      	str	r3, [r4, #48]	; 0x30
      return HAL_ERROR;
 8004c44:	2001      	movs	r0, #1
      hi2c->State= HAL_I2C_STATE_READY;
 8004c46:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
      return HAL_ERROR;
 8004c4a:	bd70      	pop	{r4, r5, r6, pc}
    if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8004c4c:	b95d      	cbnz	r5, 8004c66 <I2C_WaitOnRXNEFlagUntilTimeout+0x4e>
      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8004c4e:	6c23      	ldr	r3, [r4, #64]	; 0x40
      __HAL_UNLOCK(hi2c);
 8004c50:	2003      	movs	r0, #3
      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8004c52:	f043 0320 	orr.w	r3, r3, #32
 8004c56:	6423      	str	r3, [r4, #64]	; 0x40
      hi2c->State= HAL_I2C_STATE_READY;
 8004c58:	2320      	movs	r3, #32
 8004c5a:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
      __HAL_UNLOCK(hi2c);
 8004c5e:	2300      	movs	r3, #0
 8004c60:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
 8004c64:	bd70      	pop	{r4, r5, r6, pc}
    if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8004c66:	f7ff fb1f 	bl	80042a8 <HAL_GetTick>
 8004c6a:	1b80      	subs	r0, r0, r6
 8004c6c:	4285      	cmp	r5, r0
 8004c6e:	d2d7      	bcs.n	8004c20 <I2C_WaitOnRXNEFlagUntilTimeout+0x8>
 8004c70:	e7ed      	b.n	8004c4e <I2C_WaitOnRXNEFlagUntilTimeout+0x36>

08004c72 <I2C_WaitOnBTFFlagUntilTimeout>:
{  
 8004c72:	b570      	push	{r4, r5, r6, lr}
 8004c74:	4604      	mov	r4, r0
 8004c76:	460d      	mov	r5, r1
 8004c78:	4616      	mov	r6, r2
  while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
 8004c7a:	6823      	ldr	r3, [r4, #0]
 8004c7c:	695b      	ldr	r3, [r3, #20]
 8004c7e:	075b      	lsls	r3, r3, #29
 8004c80:	d501      	bpl.n	8004c86 <I2C_WaitOnBTFFlagUntilTimeout+0x14>
  return HAL_OK;
 8004c82:	2000      	movs	r0, #0
 8004c84:	bd70      	pop	{r4, r5, r6, pc}
    if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
 8004c86:	4620      	mov	r0, r4
 8004c88:	f7ff fe51 	bl	800492e <I2C_IsAcknowledgeFailed>
 8004c8c:	b9a8      	cbnz	r0, 8004cba <I2C_WaitOnBTFFlagUntilTimeout+0x48>
    if(Timeout != HAL_MAX_DELAY)
 8004c8e:	1c6a      	adds	r2, r5, #1
 8004c90:	d0f3      	beq.n	8004c7a <I2C_WaitOnBTFFlagUntilTimeout+0x8>
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8004c92:	b965      	cbnz	r5, 8004cae <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8004c94:	6c23      	ldr	r3, [r4, #64]	; 0x40
        hi2c->State= HAL_I2C_STATE_READY;
 8004c96:	2220      	movs	r2, #32
        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
 8004c98:	f043 0320 	orr.w	r3, r3, #32
 8004c9c:	6423      	str	r3, [r4, #64]	; 0x40
        hi2c->PreviousState = I2C_STATE_NONE;
 8004c9e:	2300      	movs	r3, #0
        __HAL_UNLOCK(hi2c);
 8004ca0:	2003      	movs	r0, #3
        hi2c->PreviousState = I2C_STATE_NONE;
 8004ca2:	6323      	str	r3, [r4, #48]	; 0x30
        __HAL_UNLOCK(hi2c);
 8004ca4:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
        hi2c->State= HAL_I2C_STATE_READY;
 8004ca8:	f884 203d 	strb.w	r2, [r4, #61]	; 0x3d
 8004cac:	bd70      	pop	{r4, r5, r6, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
 8004cae:	f7ff fafb 	bl	80042a8 <HAL_GetTick>
 8004cb2:	1b80      	subs	r0, r0, r6
 8004cb4:	4285      	cmp	r5, r0
 8004cb6:	d2e0      	bcs.n	8004c7a <I2C_WaitOnBTFFlagUntilTimeout+0x8>
 8004cb8:	e7ec      	b.n	8004c94 <I2C_WaitOnBTFFlagUntilTimeout+0x22>
      return HAL_ERROR;
 8004cba:	2001      	movs	r0, #1
}
 8004cbc:	bd70      	pop	{r4, r5, r6, pc}
	...

08004cc0 <HAL_I2C_Init>:
{
 8004cc0:	b538      	push	{r3, r4, r5, lr}
  if(hi2c == NULL)
 8004cc2:	4604      	mov	r4, r0
 8004cc4:	b908      	cbnz	r0, 8004cca <HAL_I2C_Init+0xa>
    return HAL_ERROR;
 8004cc6:	2001      	movs	r0, #1
 8004cc8:	bd38      	pop	{r3, r4, r5, pc}
  if(hi2c->State == HAL_I2C_STATE_RESET)
 8004cca:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8004cce:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8004cd2:	b91b      	cbnz	r3, 8004cdc <HAL_I2C_Init+0x1c>
    hi2c->Lock = HAL_UNLOCKED;
 8004cd4:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_I2C_MspInit(hi2c);
 8004cd8:	f002 fe66 	bl	80079a8 <HAL_I2C_MspInit>
  hi2c->State = HAL_I2C_STATE_BUSY;
 8004cdc:	2324      	movs	r3, #36	; 0x24
  __HAL_I2C_DISABLE(hi2c);
 8004cde:	6822      	ldr	r2, [r4, #0]
  hi2c->State = HAL_I2C_STATE_BUSY;
 8004ce0:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  __HAL_I2C_DISABLE(hi2c);
 8004ce4:	6813      	ldr	r3, [r2, #0]
 8004ce6:	f023 0301 	bic.w	r3, r3, #1
 8004cea:	6013      	str	r3, [r2, #0]
  pclk1 = HAL_RCC_GetPCLK1Freq();
 8004cec:	f000 fc98 	bl	8005620 <HAL_RCC_GetPCLK1Freq>
  if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
 8004cf0:	6863      	ldr	r3, [r4, #4]
 8004cf2:	4a2f      	ldr	r2, [pc, #188]	; (8004db0 <HAL_I2C_Init+0xf0>)
 8004cf4:	4293      	cmp	r3, r2
 8004cf6:	d830      	bhi.n	8004d5a <HAL_I2C_Init+0x9a>
 8004cf8:	4a2e      	ldr	r2, [pc, #184]	; (8004db4 <HAL_I2C_Init+0xf4>)
 8004cfa:	4290      	cmp	r0, r2
 8004cfc:	d9e3      	bls.n	8004cc6 <HAL_I2C_Init+0x6>
  freqrange = I2C_FREQRANGE(pclk1);
 8004cfe:	4a2e      	ldr	r2, [pc, #184]	; (8004db8 <HAL_I2C_Init+0xf8>)
  hi2c->Instance->CR2 = freqrange;
 8004d00:	6821      	ldr	r1, [r4, #0]
  freqrange = I2C_FREQRANGE(pclk1);
 8004d02:	fbb0 f2f2 	udiv	r2, r0, r2
  hi2c->Instance->CR2 = freqrange;
 8004d06:	604a      	str	r2, [r1, #4]
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8004d08:	3201      	adds	r2, #1
 8004d0a:	620a      	str	r2, [r1, #32]
  hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
 8004d0c:	4a28      	ldr	r2, [pc, #160]	; (8004db0 <HAL_I2C_Init+0xf0>)
 8004d0e:	3801      	subs	r0, #1
 8004d10:	4293      	cmp	r3, r2
 8004d12:	d832      	bhi.n	8004d7a <HAL_I2C_Init+0xba>
 8004d14:	005b      	lsls	r3, r3, #1
 8004d16:	fbb0 f0f3 	udiv	r0, r0, r3
 8004d1a:	1c43      	adds	r3, r0, #1
 8004d1c:	f3c3 030b 	ubfx	r3, r3, #0, #12
 8004d20:	2b04      	cmp	r3, #4
 8004d22:	bf38      	it	cc
 8004d24:	2304      	movcc	r3, #4
 8004d26:	61cb      	str	r3, [r1, #28]
  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
 8004d28:	6a22      	ldr	r2, [r4, #32]
 8004d2a:	69e3      	ldr	r3, [r4, #28]
  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8004d2c:	2000      	movs	r0, #0
  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
 8004d2e:	4313      	orrs	r3, r2
 8004d30:	600b      	str	r3, [r1, #0]
  hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
 8004d32:	68e2      	ldr	r2, [r4, #12]
 8004d34:	6923      	ldr	r3, [r4, #16]
 8004d36:	4313      	orrs	r3, r2
 8004d38:	608b      	str	r3, [r1, #8]
  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
 8004d3a:	69a2      	ldr	r2, [r4, #24]
 8004d3c:	6963      	ldr	r3, [r4, #20]
 8004d3e:	4313      	orrs	r3, r2
 8004d40:	60cb      	str	r3, [r1, #12]
  __HAL_I2C_ENABLE(hi2c);
 8004d42:	680b      	ldr	r3, [r1, #0]
 8004d44:	f043 0301 	orr.w	r3, r3, #1
 8004d48:	600b      	str	r3, [r1, #0]
  hi2c->State = HAL_I2C_STATE_READY;
 8004d4a:	2320      	movs	r3, #32
  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8004d4c:	6420      	str	r0, [r4, #64]	; 0x40
  hi2c->State = HAL_I2C_STATE_READY;
 8004d4e:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  hi2c->PreviousState = I2C_STATE_NONE;
 8004d52:	6320      	str	r0, [r4, #48]	; 0x30
  hi2c->Mode = HAL_I2C_MODE_NONE;
 8004d54:	f884 003e 	strb.w	r0, [r4, #62]	; 0x3e
  return HAL_OK;
 8004d58:	bd38      	pop	{r3, r4, r5, pc}
  if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
 8004d5a:	4a18      	ldr	r2, [pc, #96]	; (8004dbc <HAL_I2C_Init+0xfc>)
 8004d5c:	4290      	cmp	r0, r2
 8004d5e:	d9b2      	bls.n	8004cc6 <HAL_I2C_Init+0x6>
  freqrange = I2C_FREQRANGE(pclk1);
 8004d60:	4d15      	ldr	r5, [pc, #84]	; (8004db8 <HAL_I2C_Init+0xf8>)
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8004d62:	f44f 7296 	mov.w	r2, #300	; 0x12c
  freqrange = I2C_FREQRANGE(pclk1);
 8004d66:	fbb0 f5f5 	udiv	r5, r0, r5
  hi2c->Instance->CR2 = freqrange;
 8004d6a:	6821      	ldr	r1, [r4, #0]
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8004d6c:	436a      	muls	r2, r5
  hi2c->Instance->CR2 = freqrange;
 8004d6e:	604d      	str	r5, [r1, #4]
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
 8004d70:	f44f 757a 	mov.w	r5, #1000	; 0x3e8
 8004d74:	fbb2 f2f5 	udiv	r2, r2, r5
 8004d78:	e7c6      	b.n	8004d08 <HAL_I2C_Init+0x48>
  hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
 8004d7a:	68a2      	ldr	r2, [r4, #8]
 8004d7c:	b952      	cbnz	r2, 8004d94 <HAL_I2C_Init+0xd4>
 8004d7e:	eb03 0343 	add.w	r3, r3, r3, lsl #1
 8004d82:	fbb0 f0f3 	udiv	r0, r0, r3
 8004d86:	1c43      	adds	r3, r0, #1
 8004d88:	f3c3 030b 	ubfx	r3, r3, #0, #12
 8004d8c:	b16b      	cbz	r3, 8004daa <HAL_I2C_Init+0xea>
 8004d8e:	f443 4300 	orr.w	r3, r3, #32768	; 0x8000
 8004d92:	e7c8      	b.n	8004d26 <HAL_I2C_Init+0x66>
 8004d94:	2219      	movs	r2, #25
 8004d96:	4353      	muls	r3, r2
 8004d98:	fbb0 f0f3 	udiv	r0, r0, r3
 8004d9c:	1c43      	adds	r3, r0, #1
 8004d9e:	f3c3 030b 	ubfx	r3, r3, #0, #12
 8004da2:	b113      	cbz	r3, 8004daa <HAL_I2C_Init+0xea>
 8004da4:	f443 4340 	orr.w	r3, r3, #49152	; 0xc000
 8004da8:	e7bd      	b.n	8004d26 <HAL_I2C_Init+0x66>
 8004daa:	2301      	movs	r3, #1
 8004dac:	e7bb      	b.n	8004d26 <HAL_I2C_Init+0x66>
 8004dae:	bf00      	nop
 8004db0:	000186a0 	.word	0x000186a0
 8004db4:	001e847f 	.word	0x001e847f
 8004db8:	000f4240 	.word	0x000f4240
 8004dbc:	003d08ff 	.word	0x003d08ff

08004dc0 <HAL_I2C_Mem_Write>:
{
 8004dc0:	e92d 47f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
 8004dc4:	4604      	mov	r4, r0
 8004dc6:	469a      	mov	sl, r3
 8004dc8:	4688      	mov	r8, r1
 8004dca:	4691      	mov	r9, r2
 8004dcc:	9e0c      	ldr	r6, [sp, #48]	; 0x30
  tickstart = HAL_GetTick();
 8004dce:	f7ff fa6b 	bl	80042a8 <HAL_GetTick>
  if(hi2c->State == HAL_I2C_STATE_READY)
 8004dd2:	f894 303d 	ldrb.w	r3, [r4, #61]	; 0x3d
  tickstart = HAL_GetTick();
 8004dd6:	4605      	mov	r5, r0
  if(hi2c->State == HAL_I2C_STATE_READY)
 8004dd8:	2b20      	cmp	r3, #32
 8004dda:	d003      	beq.n	8004de4 <HAL_I2C_Mem_Write+0x24>
    return HAL_BUSY;
 8004ddc:	2002      	movs	r0, #2
}
 8004dde:	b002      	add	sp, #8
 8004de0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
 8004de4:	9000      	str	r0, [sp, #0]
 8004de6:	2319      	movs	r3, #25
 8004de8:	2201      	movs	r2, #1
 8004dea:	493e      	ldr	r1, [pc, #248]	; (8004ee4 <HAL_I2C_Mem_Write+0x124>)
 8004dec:	4620      	mov	r0, r4
 8004dee:	f7ff fdf3 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 8004df2:	2800      	cmp	r0, #0
 8004df4:	d1f2      	bne.n	8004ddc <HAL_I2C_Mem_Write+0x1c>
    __HAL_LOCK(hi2c);
 8004df6:	f894 303c 	ldrb.w	r3, [r4, #60]	; 0x3c
 8004dfa:	2b01      	cmp	r3, #1
 8004dfc:	d0ee      	beq.n	8004ddc <HAL_I2C_Mem_Write+0x1c>
 8004dfe:	2301      	movs	r3, #1
 8004e00:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8004e04:	6823      	ldr	r3, [r4, #0]
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8004e06:	2700      	movs	r7, #0
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8004e08:	681a      	ldr	r2, [r3, #0]
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004e0a:	4641      	mov	r1, r8
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8004e0c:	07d2      	lsls	r2, r2, #31
      __HAL_I2C_ENABLE(hi2c);
 8004e0e:	bf58      	it	pl
 8004e10:	681a      	ldrpl	r2, [r3, #0]
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004e12:	4620      	mov	r0, r4
      __HAL_I2C_ENABLE(hi2c);
 8004e14:	bf5c      	itt	pl
 8004e16:	f042 0201 	orrpl.w	r2, r2, #1
 8004e1a:	601a      	strpl	r2, [r3, #0]
    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 8004e1c:	681a      	ldr	r2, [r3, #0]
 8004e1e:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
 8004e22:	601a      	str	r2, [r3, #0]
    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
 8004e24:	2321      	movs	r3, #33	; 0x21
 8004e26:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode      = HAL_I2C_MODE_MEM;
 8004e2a:	2340      	movs	r3, #64	; 0x40
 8004e2c:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
    hi2c->pBuffPtr    = pData;
 8004e30:	9b0a      	ldr	r3, [sp, #40]	; 0x28
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8004e32:	6427      	str	r7, [r4, #64]	; 0x40
    hi2c->pBuffPtr    = pData;
 8004e34:	6263      	str	r3, [r4, #36]	; 0x24
    hi2c->XferCount   = Size;
 8004e36:	f8bd 302c 	ldrh.w	r3, [sp, #44]	; 0x2c
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004e3a:	9501      	str	r5, [sp, #4]
    hi2c->XferCount   = Size;
 8004e3c:	8563      	strh	r3, [r4, #42]	; 0x2a
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8004e3e:	4b2a      	ldr	r3, [pc, #168]	; (8004ee8 <HAL_I2C_Mem_Write+0x128>)
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004e40:	9600      	str	r6, [sp, #0]
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8004e42:	62e3      	str	r3, [r4, #44]	; 0x2c
    hi2c->XferSize    = hi2c->XferCount;
 8004e44:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004e46:	464a      	mov	r2, r9
    hi2c->XferSize    = hi2c->XferCount;
 8004e48:	8523      	strh	r3, [r4, #40]	; 0x28
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004e4a:	4653      	mov	r3, sl
 8004e4c:	f7ff fe18 	bl	8004a80 <I2C_RequestMemoryWrite>
 8004e50:	2800      	cmp	r0, #0
 8004e52:	d02a      	beq.n	8004eaa <HAL_I2C_Mem_Write+0xea>
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004e54:	6c23      	ldr	r3, [r4, #64]	; 0x40
        __HAL_UNLOCK(hi2c);
 8004e56:	f884 703c 	strb.w	r7, [r4, #60]	; 0x3c
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004e5a:	2b04      	cmp	r3, #4
 8004e5c:	d107      	bne.n	8004e6e <HAL_I2C_Mem_Write+0xae>
        return HAL_ERROR;
 8004e5e:	2001      	movs	r0, #1
 8004e60:	e7bd      	b.n	8004dde <HAL_I2C_Mem_Write+0x1e>
      if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 8004e62:	f7ff fde7 	bl	8004a34 <I2C_WaitOnTXEFlagUntilTimeout>
 8004e66:	b120      	cbz	r0, 8004e72 <HAL_I2C_Mem_Write+0xb2>
        if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004e68:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8004e6a:	2b04      	cmp	r3, #4
 8004e6c:	d034      	beq.n	8004ed8 <HAL_I2C_Mem_Write+0x118>
          return HAL_TIMEOUT;
 8004e6e:	2003      	movs	r0, #3
 8004e70:	e7b5      	b.n	8004dde <HAL_I2C_Mem_Write+0x1e>
      hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8004e72:	6a61      	ldr	r1, [r4, #36]	; 0x24
 8004e74:	6827      	ldr	r7, [r4, #0]
 8004e76:	1c4b      	adds	r3, r1, #1
 8004e78:	6263      	str	r3, [r4, #36]	; 0x24
 8004e7a:	780b      	ldrb	r3, [r1, #0]
      hi2c->XferSize--;
 8004e7c:	8d22      	ldrh	r2, [r4, #40]	; 0x28
      hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8004e7e:	613b      	str	r3, [r7, #16]
      hi2c->XferCount--;
 8004e80:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
      hi2c->XferSize--;
 8004e82:	1e50      	subs	r0, r2, #1
      hi2c->XferCount--;
 8004e84:	3b01      	subs	r3, #1
 8004e86:	b29b      	uxth	r3, r3
 8004e88:	8563      	strh	r3, [r4, #42]	; 0x2a
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
 8004e8a:	697b      	ldr	r3, [r7, #20]
      hi2c->XferSize--;
 8004e8c:	b280      	uxth	r0, r0
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
 8004e8e:	075b      	lsls	r3, r3, #29
      hi2c->XferSize--;
 8004e90:	8520      	strh	r0, [r4, #40]	; 0x28
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
 8004e92:	d50a      	bpl.n	8004eaa <HAL_I2C_Mem_Write+0xea>
 8004e94:	b148      	cbz	r0, 8004eaa <HAL_I2C_Mem_Write+0xea>
        hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8004e96:	1c8b      	adds	r3, r1, #2
 8004e98:	6263      	str	r3, [r4, #36]	; 0x24
 8004e9a:	784b      	ldrb	r3, [r1, #1]
        hi2c->XferSize--;
 8004e9c:	3a02      	subs	r2, #2
        hi2c->Instance->DR = (*hi2c->pBuffPtr++);
 8004e9e:	613b      	str	r3, [r7, #16]
        hi2c->XferCount--;
 8004ea0:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
        hi2c->XferSize--;
 8004ea2:	8522      	strh	r2, [r4, #40]	; 0x28
        hi2c->XferCount--;
 8004ea4:	3b01      	subs	r3, #1
 8004ea6:	b29b      	uxth	r3, r3
 8004ea8:	8563      	strh	r3, [r4, #42]	; 0x2a
    while(hi2c->XferSize > 0U)
 8004eaa:	8d23      	ldrh	r3, [r4, #40]	; 0x28
      if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 8004eac:	462a      	mov	r2, r5
 8004eae:	4631      	mov	r1, r6
 8004eb0:	4620      	mov	r0, r4
    while(hi2c->XferSize > 0U)
 8004eb2:	2b00      	cmp	r3, #0
 8004eb4:	d1d5      	bne.n	8004e62 <HAL_I2C_Mem_Write+0xa2>
    if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 8004eb6:	f7ff fedc 	bl	8004c72 <I2C_WaitOnBTFFlagUntilTimeout>
 8004eba:	2800      	cmp	r0, #0
 8004ebc:	d1d4      	bne.n	8004e68 <HAL_I2C_Mem_Write+0xa8>
    hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8004ebe:	6822      	ldr	r2, [r4, #0]
 8004ec0:	6813      	ldr	r3, [r2, #0]
 8004ec2:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8004ec6:	6013      	str	r3, [r2, #0]
    hi2c->State = HAL_I2C_STATE_READY;
 8004ec8:	2320      	movs	r3, #32
    __HAL_UNLOCK(hi2c);
 8004eca:	f884 003c 	strb.w	r0, [r4, #60]	; 0x3c
    hi2c->State = HAL_I2C_STATE_READY;
 8004ece:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode = HAL_I2C_MODE_NONE;
 8004ed2:	f884 003e 	strb.w	r0, [r4, #62]	; 0x3e
    return HAL_OK;
 8004ed6:	e782      	b.n	8004dde <HAL_I2C_Mem_Write+0x1e>
        hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8004ed8:	6822      	ldr	r2, [r4, #0]
 8004eda:	6813      	ldr	r3, [r2, #0]
 8004edc:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8004ee0:	6013      	str	r3, [r2, #0]
 8004ee2:	e7bc      	b.n	8004e5e <HAL_I2C_Mem_Write+0x9e>
 8004ee4:	00100002 	.word	0x00100002
 8004ee8:	ffff0000 	.word	0xffff0000

08004eec <HAL_I2C_Mem_Read>:
{
 8004eec:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8004ef0:	4604      	mov	r4, r0
 8004ef2:	b086      	sub	sp, #24
 8004ef4:	469a      	mov	sl, r3
 8004ef6:	460d      	mov	r5, r1
 8004ef8:	4691      	mov	r9, r2
 8004efa:	9f10      	ldr	r7, [sp, #64]	; 0x40
  tickstart = HAL_GetTick();
 8004efc:	f7ff f9d4 	bl	80042a8 <HAL_GetTick>
  if(hi2c->State == HAL_I2C_STATE_READY)
 8004f00:	f894 303d 	ldrb.w	r3, [r4, #61]	; 0x3d
  tickstart = HAL_GetTick();
 8004f04:	4606      	mov	r6, r0
  if(hi2c->State == HAL_I2C_STATE_READY)
 8004f06:	2b20      	cmp	r3, #32
 8004f08:	d004      	beq.n	8004f14 <HAL_I2C_Mem_Read+0x28>
    return HAL_BUSY;
 8004f0a:	2502      	movs	r5, #2
}
 8004f0c:	4628      	mov	r0, r5
 8004f0e:	b006      	add	sp, #24
 8004f10:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
 8004f14:	9000      	str	r0, [sp, #0]
 8004f16:	2319      	movs	r3, #25
 8004f18:	2201      	movs	r2, #1
 8004f1a:	4981      	ldr	r1, [pc, #516]	; (8005120 <HAL_I2C_Mem_Read+0x234>)
 8004f1c:	4620      	mov	r0, r4
 8004f1e:	f7ff fd5b 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 8004f22:	2800      	cmp	r0, #0
 8004f24:	d1f1      	bne.n	8004f0a <HAL_I2C_Mem_Read+0x1e>
    __HAL_LOCK(hi2c);
 8004f26:	f894 303c 	ldrb.w	r3, [r4, #60]	; 0x3c
 8004f2a:	2b01      	cmp	r3, #1
 8004f2c:	d0ed      	beq.n	8004f0a <HAL_I2C_Mem_Read+0x1e>
 8004f2e:	2301      	movs	r3, #1
 8004f30:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8004f34:	6823      	ldr	r3, [r4, #0]
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8004f36:	f04f 0800 	mov.w	r8, #0
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8004f3a:	681a      	ldr	r2, [r3, #0]
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004f3c:	4629      	mov	r1, r5
    if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
 8004f3e:	07d2      	lsls	r2, r2, #31
      __HAL_I2C_ENABLE(hi2c);
 8004f40:	bf58      	it	pl
 8004f42:	681a      	ldrpl	r2, [r3, #0]
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004f44:	4620      	mov	r0, r4
      __HAL_I2C_ENABLE(hi2c);
 8004f46:	bf5c      	itt	pl
 8004f48:	f042 0201 	orrpl.w	r2, r2, #1
 8004f4c:	601a      	strpl	r2, [r3, #0]
    hi2c->Instance->CR1 &= ~I2C_CR1_POS;
 8004f4e:	681a      	ldr	r2, [r3, #0]
 8004f50:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
 8004f54:	601a      	str	r2, [r3, #0]
    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
 8004f56:	2322      	movs	r3, #34	; 0x22
 8004f58:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode      = HAL_I2C_MODE_MEM;
 8004f5c:	2340      	movs	r3, #64	; 0x40
 8004f5e:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
    hi2c->pBuffPtr    = pData;
 8004f62:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
 8004f64:	f8c4 8040 	str.w	r8, [r4, #64]	; 0x40
    hi2c->pBuffPtr    = pData;
 8004f68:	6263      	str	r3, [r4, #36]	; 0x24
    hi2c->XferCount   = Size;
 8004f6a:	f8bd 303c 	ldrh.w	r3, [sp, #60]	; 0x3c
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004f6e:	9601      	str	r6, [sp, #4]
    hi2c->XferCount   = Size;
 8004f70:	8563      	strh	r3, [r4, #42]	; 0x2a
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8004f72:	4b6c      	ldr	r3, [pc, #432]	; (8005124 <HAL_I2C_Mem_Read+0x238>)
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004f74:	9700      	str	r7, [sp, #0]
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
 8004f76:	62e3      	str	r3, [r4, #44]	; 0x2c
    hi2c->XferSize    = hi2c->XferCount;
 8004f78:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004f7a:	464a      	mov	r2, r9
    hi2c->XferSize    = hi2c->XferCount;
 8004f7c:	8523      	strh	r3, [r4, #40]	; 0x28
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
 8004f7e:	4653      	mov	r3, sl
 8004f80:	f7ff fdd0 	bl	8004b24 <I2C_RequestMemoryRead>
 8004f84:	4605      	mov	r5, r0
 8004f86:	b130      	cbz	r0, 8004f96 <HAL_I2C_Mem_Read+0xaa>
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004f88:	6c23      	ldr	r3, [r4, #64]	; 0x40
        __HAL_UNLOCK(hi2c);
 8004f8a:	f884 803c 	strb.w	r8, [r4, #60]	; 0x3c
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
 8004f8e:	2b04      	cmp	r3, #4
 8004f90:	d13d      	bne.n	800500e <HAL_I2C_Mem_Read+0x122>
              return HAL_ERROR;
 8004f92:	2501      	movs	r5, #1
 8004f94:	e7ba      	b.n	8004f0c <HAL_I2C_Mem_Read+0x20>
    if(hi2c->XferSize == 0U)
 8004f96:	8d22      	ldrh	r2, [r4, #40]	; 0x28
 8004f98:	6823      	ldr	r3, [r4, #0]
 8004f9a:	b992      	cbnz	r2, 8004fc2 <HAL_I2C_Mem_Read+0xd6>
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004f9c:	9002      	str	r0, [sp, #8]
 8004f9e:	695a      	ldr	r2, [r3, #20]
 8004fa0:	9202      	str	r2, [sp, #8]
 8004fa2:	699a      	ldr	r2, [r3, #24]
 8004fa4:	9202      	str	r2, [sp, #8]
 8004fa6:	9a02      	ldr	r2, [sp, #8]
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8004fa8:	681a      	ldr	r2, [r3, #0]
 8004faa:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8004fae:	601a      	str	r2, [r3, #0]
    hi2c->State = HAL_I2C_STATE_READY;
 8004fb0:	2320      	movs	r3, #32
 8004fb2:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
    hi2c->Mode = HAL_I2C_MODE_NONE;
 8004fb6:	2300      	movs	r3, #0
 8004fb8:	f884 303e 	strb.w	r3, [r4, #62]	; 0x3e
    __HAL_UNLOCK(hi2c);
 8004fbc:	f884 303c 	strb.w	r3, [r4, #60]	; 0x3c
    return HAL_OK;
 8004fc0:	e7a4      	b.n	8004f0c <HAL_I2C_Mem_Read+0x20>
    else if(hi2c->XferSize == 1U)
 8004fc2:	2a01      	cmp	r2, #1
 8004fc4:	d125      	bne.n	8005012 <HAL_I2C_Mem_Read+0x126>
      hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 8004fc6:	681a      	ldr	r2, [r3, #0]
 8004fc8:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
 8004fcc:	601a      	str	r2, [r3, #0]
  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
  Can only be executed in Privileged modes.
 */
__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
{
  __ASM volatile ("cpsid i" : : : "memory");
 8004fce:	b672      	cpsid	i
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8004fd0:	6823      	ldr	r3, [r4, #0]
 8004fd2:	9003      	str	r0, [sp, #12]
 8004fd4:	695a      	ldr	r2, [r3, #20]
 8004fd6:	9203      	str	r2, [sp, #12]
 8004fd8:	699a      	ldr	r2, [r3, #24]
 8004fda:	9203      	str	r2, [sp, #12]
 8004fdc:	9a03      	ldr	r2, [sp, #12]
      hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8004fde:	681a      	ldr	r2, [r3, #0]
 8004fe0:	f442 7200 	orr.w	r2, r2, #512	; 0x200
      hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 8004fe4:	601a      	str	r2, [r3, #0]
  __ASM volatile ("cpsie i" : : : "memory");
 8004fe6:	b662      	cpsie	i
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 8004fe8:	f8df 813c 	ldr.w	r8, [pc, #316]	; 8005128 <HAL_I2C_Mem_Read+0x23c>
    while(hi2c->XferSize > 0U)
 8004fec:	8d23      	ldrh	r3, [r4, #40]	; 0x28
 8004fee:	2b00      	cmp	r3, #0
 8004ff0:	d0de      	beq.n	8004fb0 <HAL_I2C_Mem_Read+0xc4>
      if(hi2c->XferSize <= 3U)
 8004ff2:	2b03      	cmp	r3, #3
 8004ff4:	d877      	bhi.n	80050e6 <HAL_I2C_Mem_Read+0x1fa>
        if(hi2c->XferSize== 1U)
 8004ff6:	2b01      	cmp	r3, #1
 8004ff8:	d127      	bne.n	800504a <HAL_I2C_Mem_Read+0x15e>
          if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)      
 8004ffa:	4632      	mov	r2, r6
 8004ffc:	4639      	mov	r1, r7
 8004ffe:	4620      	mov	r0, r4
 8005000:	f7ff fe0a 	bl	8004c18 <I2C_WaitOnRXNEFlagUntilTimeout>
 8005004:	2800      	cmp	r0, #0
 8005006:	d03f      	beq.n	8005088 <HAL_I2C_Mem_Read+0x19c>
            if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
 8005008:	6c23      	ldr	r3, [r4, #64]	; 0x40
 800500a:	2b20      	cmp	r3, #32
 800500c:	d1c1      	bne.n	8004f92 <HAL_I2C_Mem_Read+0xa6>
              return HAL_TIMEOUT;
 800500e:	2503      	movs	r5, #3
 8005010:	e77c      	b.n	8004f0c <HAL_I2C_Mem_Read+0x20>
    else if(hi2c->XferSize == 2U)
 8005012:	2a02      	cmp	r2, #2
      hi2c->Instance->CR1 |= I2C_CR1_POS;
 8005014:	681a      	ldr	r2, [r3, #0]
    else if(hi2c->XferSize == 2U)
 8005016:	d10e      	bne.n	8005036 <HAL_I2C_Mem_Read+0x14a>
      hi2c->Instance->CR1 |= I2C_CR1_POS;
 8005018:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
 800501c:	601a      	str	r2, [r3, #0]
  __ASM volatile ("cpsid i" : : : "memory");
 800501e:	b672      	cpsid	i
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 8005020:	6823      	ldr	r3, [r4, #0]
 8005022:	9004      	str	r0, [sp, #16]
 8005024:	695a      	ldr	r2, [r3, #20]
 8005026:	9204      	str	r2, [sp, #16]
 8005028:	699a      	ldr	r2, [r3, #24]
 800502a:	9204      	str	r2, [sp, #16]
 800502c:	9a04      	ldr	r2, [sp, #16]
      hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 800502e:	681a      	ldr	r2, [r3, #0]
 8005030:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
 8005034:	e7d6      	b.n	8004fe4 <HAL_I2C_Mem_Read+0xf8>
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
 8005036:	f442 6280 	orr.w	r2, r2, #1024	; 0x400
 800503a:	601a      	str	r2, [r3, #0]
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
 800503c:	9005      	str	r0, [sp, #20]
 800503e:	695a      	ldr	r2, [r3, #20]
 8005040:	9205      	str	r2, [sp, #20]
 8005042:	699b      	ldr	r3, [r3, #24]
 8005044:	9305      	str	r3, [sp, #20]
 8005046:	9b05      	ldr	r3, [sp, #20]
 8005048:	e7ce      	b.n	8004fe8 <HAL_I2C_Mem_Read+0xfc>
        else if(hi2c->XferSize == 2U)
 800504a:	2b02      	cmp	r3, #2
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 800504c:	9600      	str	r6, [sp, #0]
 800504e:	463b      	mov	r3, r7
 8005050:	f04f 0200 	mov.w	r2, #0
 8005054:	4641      	mov	r1, r8
 8005056:	4620      	mov	r0, r4
        else if(hi2c->XferSize == 2U)
 8005058:	d124      	bne.n	80050a4 <HAL_I2C_Mem_Read+0x1b8>
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 800505a:	f7ff fcbd 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 800505e:	2800      	cmp	r0, #0
 8005060:	d1d5      	bne.n	800500e <HAL_I2C_Mem_Read+0x122>
 8005062:	b672      	cpsid	i
          hi2c->Instance->CR1 |= I2C_CR1_STOP;
 8005064:	6823      	ldr	r3, [r4, #0]
 8005066:	681a      	ldr	r2, [r3, #0]
 8005068:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 800506c:	601a      	str	r2, [r3, #0]
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 800506e:	6a62      	ldr	r2, [r4, #36]	; 0x24
 8005070:	691b      	ldr	r3, [r3, #16]
 8005072:	1c51      	adds	r1, r2, #1
 8005074:	6261      	str	r1, [r4, #36]	; 0x24
 8005076:	7013      	strb	r3, [r2, #0]
          hi2c->XferSize--;
 8005078:	8d23      	ldrh	r3, [r4, #40]	; 0x28
 800507a:	3b01      	subs	r3, #1
 800507c:	8523      	strh	r3, [r4, #40]	; 0x28
          hi2c->XferCount--;
 800507e:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
 8005080:	3b01      	subs	r3, #1
 8005082:	b29b      	uxth	r3, r3
 8005084:	8563      	strh	r3, [r4, #42]	; 0x2a
  __ASM volatile ("cpsie i" : : : "memory");
 8005086:	b662      	cpsie	i
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8005088:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800508a:	1c5a      	adds	r2, r3, #1
 800508c:	6262      	str	r2, [r4, #36]	; 0x24
 800508e:	6822      	ldr	r2, [r4, #0]
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8005090:	6912      	ldr	r2, [r2, #16]
 8005092:	701a      	strb	r2, [r3, #0]
          hi2c->XferSize--;
 8005094:	8d23      	ldrh	r3, [r4, #40]	; 0x28
 8005096:	3b01      	subs	r3, #1
 8005098:	8523      	strh	r3, [r4, #40]	; 0x28
          hi2c->XferCount--;
 800509a:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
 800509c:	3b01      	subs	r3, #1
 800509e:	b29b      	uxth	r3, r3
 80050a0:	8563      	strh	r3, [r4, #42]	; 0x2a
 80050a2:	e7a3      	b.n	8004fec <HAL_I2C_Mem_Read+0x100>
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 80050a4:	f7ff fc98 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 80050a8:	4602      	mov	r2, r0
 80050aa:	2800      	cmp	r0, #0
 80050ac:	d1af      	bne.n	800500e <HAL_I2C_Mem_Read+0x122>
          hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
 80050ae:	6821      	ldr	r1, [r4, #0]
 80050b0:	680b      	ldr	r3, [r1, #0]
 80050b2:	f423 6380 	bic.w	r3, r3, #1024	; 0x400
 80050b6:	600b      	str	r3, [r1, #0]
  __ASM volatile ("cpsid i" : : : "memory");
 80050b8:	b672      	cpsid	i
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 80050ba:	6a63      	ldr	r3, [r4, #36]	; 0x24
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 80050bc:	4620      	mov	r0, r4
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 80050be:	1c59      	adds	r1, r3, #1
 80050c0:	6261      	str	r1, [r4, #36]	; 0x24
 80050c2:	6821      	ldr	r1, [r4, #0]
 80050c4:	6909      	ldr	r1, [r1, #16]
 80050c6:	7019      	strb	r1, [r3, #0]
          hi2c->XferSize--;
 80050c8:	8d23      	ldrh	r3, [r4, #40]	; 0x28
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 80050ca:	9600      	str	r6, [sp, #0]
          hi2c->XferSize--;
 80050cc:	3b01      	subs	r3, #1
 80050ce:	8523      	strh	r3, [r4, #40]	; 0x28
          hi2c->XferCount--;
 80050d0:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 80050d2:	4641      	mov	r1, r8
          hi2c->XferCount--;
 80050d4:	3b01      	subs	r3, #1
 80050d6:	b29b      	uxth	r3, r3
 80050d8:	8563      	strh	r3, [r4, #42]	; 0x2a
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
 80050da:	463b      	mov	r3, r7
 80050dc:	f7ff fc7c 	bl	80049d8 <I2C_WaitOnFlagUntilTimeout>
 80050e0:	2800      	cmp	r0, #0
 80050e2:	d0bf      	beq.n	8005064 <HAL_I2C_Mem_Read+0x178>
 80050e4:	e793      	b.n	800500e <HAL_I2C_Mem_Read+0x122>
        if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
 80050e6:	4632      	mov	r2, r6
 80050e8:	4639      	mov	r1, r7
 80050ea:	4620      	mov	r0, r4
 80050ec:	f7ff fd94 	bl	8004c18 <I2C_WaitOnRXNEFlagUntilTimeout>
 80050f0:	2800      	cmp	r0, #0
 80050f2:	d189      	bne.n	8005008 <HAL_I2C_Mem_Read+0x11c>
        (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 80050f4:	6a63      	ldr	r3, [r4, #36]	; 0x24
 80050f6:	1c5a      	adds	r2, r3, #1
 80050f8:	6262      	str	r2, [r4, #36]	; 0x24
 80050fa:	6822      	ldr	r2, [r4, #0]
 80050fc:	6912      	ldr	r2, [r2, #16]
 80050fe:	701a      	strb	r2, [r3, #0]
        hi2c->XferSize--;
 8005100:	8d23      	ldrh	r3, [r4, #40]	; 0x28
        if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
 8005102:	6822      	ldr	r2, [r4, #0]
        hi2c->XferSize--;
 8005104:	3b01      	subs	r3, #1
 8005106:	8523      	strh	r3, [r4, #40]	; 0x28
        hi2c->XferCount--;
 8005108:	8d63      	ldrh	r3, [r4, #42]	; 0x2a
 800510a:	3b01      	subs	r3, #1
 800510c:	b29b      	uxth	r3, r3
 800510e:	8563      	strh	r3, [r4, #42]	; 0x2a
        if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
 8005110:	6953      	ldr	r3, [r2, #20]
 8005112:	075b      	lsls	r3, r3, #29
 8005114:	f57f af6a 	bpl.w	8004fec <HAL_I2C_Mem_Read+0x100>
          (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
 8005118:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800511a:	1c59      	adds	r1, r3, #1
 800511c:	6261      	str	r1, [r4, #36]	; 0x24
 800511e:	e7b7      	b.n	8005090 <HAL_I2C_Mem_Read+0x1a4>
 8005120:	00100002 	.word	0x00100002
 8005124:	ffff0000 	.word	0xffff0000
 8005128:	00010004 	.word	0x00010004

0800512c <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 800512c:	6803      	ldr	r3, [r0, #0]
{
 800512e:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005132:	07db      	lsls	r3, r3, #31
{
 8005134:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005136:	d410      	bmi.n	800515a <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 8005138:	682b      	ldr	r3, [r5, #0]
 800513a:	079f      	lsls	r7, r3, #30
 800513c:	d45e      	bmi.n	80051fc <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 800513e:	682b      	ldr	r3, [r5, #0]
 8005140:	0719      	lsls	r1, r3, #28
 8005142:	f100 8095 	bmi.w	8005270 <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8005146:	682b      	ldr	r3, [r5, #0]
 8005148:	075a      	lsls	r2, r3, #29
 800514a:	f100 80bf 	bmi.w	80052cc <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 800514e:	69ea      	ldr	r2, [r5, #28]
 8005150:	2a00      	cmp	r2, #0
 8005152:	f040 812d 	bne.w	80053b0 <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 8005156:	2000      	movs	r0, #0
 8005158:	e014      	b.n	8005184 <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 800515a:	4c90      	ldr	r4, [pc, #576]	; (800539c <HAL_RCC_OscConfig+0x270>)
 800515c:	6863      	ldr	r3, [r4, #4]
 800515e:	f003 030c 	and.w	r3, r3, #12
 8005162:	2b04      	cmp	r3, #4
 8005164:	d007      	beq.n	8005176 <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 8005166:	6863      	ldr	r3, [r4, #4]
 8005168:	f003 030c 	and.w	r3, r3, #12
 800516c:	2b08      	cmp	r3, #8
 800516e:	d10c      	bne.n	800518a <HAL_RCC_OscConfig+0x5e>
 8005170:	6863      	ldr	r3, [r4, #4]
 8005172:	03de      	lsls	r6, r3, #15
 8005174:	d509      	bpl.n	800518a <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8005176:	6823      	ldr	r3, [r4, #0]
 8005178:	039c      	lsls	r4, r3, #14
 800517a:	d5dd      	bpl.n	8005138 <HAL_RCC_OscConfig+0xc>
 800517c:	686b      	ldr	r3, [r5, #4]
 800517e:	2b00      	cmp	r3, #0
 8005180:	d1da      	bne.n	8005138 <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 8005182:	2001      	movs	r0, #1
}
 8005184:	b002      	add	sp, #8
 8005186:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800518a:	686b      	ldr	r3, [r5, #4]
 800518c:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8005190:	d110      	bne.n	80051b4 <HAL_RCC_OscConfig+0x88>
 8005192:	6823      	ldr	r3, [r4, #0]
 8005194:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8005198:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 800519a:	f7ff f885 	bl	80042a8 <HAL_GetTick>
 800519e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80051a0:	6823      	ldr	r3, [r4, #0]
 80051a2:	0398      	lsls	r0, r3, #14
 80051a4:	d4c8      	bmi.n	8005138 <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 80051a6:	f7ff f87f 	bl	80042a8 <HAL_GetTick>
 80051aa:	1b80      	subs	r0, r0, r6
 80051ac:	2864      	cmp	r0, #100	; 0x64
 80051ae:	d9f7      	bls.n	80051a0 <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 80051b0:	2003      	movs	r0, #3
 80051b2:	e7e7      	b.n	8005184 <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80051b4:	b99b      	cbnz	r3, 80051de <HAL_RCC_OscConfig+0xb2>
 80051b6:	6823      	ldr	r3, [r4, #0]
 80051b8:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 80051bc:	6023      	str	r3, [r4, #0]
 80051be:	6823      	ldr	r3, [r4, #0]
 80051c0:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 80051c4:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 80051c6:	f7ff f86f 	bl	80042a8 <HAL_GetTick>
 80051ca:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 80051cc:	6823      	ldr	r3, [r4, #0]
 80051ce:	0399      	lsls	r1, r3, #14
 80051d0:	d5b2      	bpl.n	8005138 <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 80051d2:	f7ff f869 	bl	80042a8 <HAL_GetTick>
 80051d6:	1b80      	subs	r0, r0, r6
 80051d8:	2864      	cmp	r0, #100	; 0x64
 80051da:	d9f7      	bls.n	80051cc <HAL_RCC_OscConfig+0xa0>
 80051dc:	e7e8      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80051de:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 80051e2:	6823      	ldr	r3, [r4, #0]
 80051e4:	d103      	bne.n	80051ee <HAL_RCC_OscConfig+0xc2>
 80051e6:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 80051ea:	6023      	str	r3, [r4, #0]
 80051ec:	e7d1      	b.n	8005192 <HAL_RCC_OscConfig+0x66>
 80051ee:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 80051f2:	6023      	str	r3, [r4, #0]
 80051f4:	6823      	ldr	r3, [r4, #0]
 80051f6:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 80051fa:	e7cd      	b.n	8005198 <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 80051fc:	4c67      	ldr	r4, [pc, #412]	; (800539c <HAL_RCC_OscConfig+0x270>)
 80051fe:	6863      	ldr	r3, [r4, #4]
 8005200:	f013 0f0c 	tst.w	r3, #12
 8005204:	d007      	beq.n	8005216 <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 8005206:	6863      	ldr	r3, [r4, #4]
 8005208:	f003 030c 	and.w	r3, r3, #12
 800520c:	2b08      	cmp	r3, #8
 800520e:	d110      	bne.n	8005232 <HAL_RCC_OscConfig+0x106>
 8005210:	6863      	ldr	r3, [r4, #4]
 8005212:	03da      	lsls	r2, r3, #15
 8005214:	d40d      	bmi.n	8005232 <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 8005216:	6823      	ldr	r3, [r4, #0]
 8005218:	079b      	lsls	r3, r3, #30
 800521a:	d502      	bpl.n	8005222 <HAL_RCC_OscConfig+0xf6>
 800521c:	692b      	ldr	r3, [r5, #16]
 800521e:	2b01      	cmp	r3, #1
 8005220:	d1af      	bne.n	8005182 <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8005222:	6823      	ldr	r3, [r4, #0]
 8005224:	696a      	ldr	r2, [r5, #20]
 8005226:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 800522a:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 800522e:	6023      	str	r3, [r4, #0]
 8005230:	e785      	b.n	800513e <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 8005232:	692a      	ldr	r2, [r5, #16]
 8005234:	4b5a      	ldr	r3, [pc, #360]	; (80053a0 <HAL_RCC_OscConfig+0x274>)
 8005236:	b16a      	cbz	r2, 8005254 <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 8005238:	2201      	movs	r2, #1
 800523a:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 800523c:	f7ff f834 	bl	80042a8 <HAL_GetTick>
 8005240:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8005242:	6823      	ldr	r3, [r4, #0]
 8005244:	079f      	lsls	r7, r3, #30
 8005246:	d4ec      	bmi.n	8005222 <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8005248:	f7ff f82e 	bl	80042a8 <HAL_GetTick>
 800524c:	1b80      	subs	r0, r0, r6
 800524e:	2802      	cmp	r0, #2
 8005250:	d9f7      	bls.n	8005242 <HAL_RCC_OscConfig+0x116>
 8005252:	e7ad      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8005254:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8005256:	f7ff f827 	bl	80042a8 <HAL_GetTick>
 800525a:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 800525c:	6823      	ldr	r3, [r4, #0]
 800525e:	0798      	lsls	r0, r3, #30
 8005260:	f57f af6d 	bpl.w	800513e <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8005264:	f7ff f820 	bl	80042a8 <HAL_GetTick>
 8005268:	1b80      	subs	r0, r0, r6
 800526a:	2802      	cmp	r0, #2
 800526c:	d9f6      	bls.n	800525c <HAL_RCC_OscConfig+0x130>
 800526e:	e79f      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8005270:	69aa      	ldr	r2, [r5, #24]
 8005272:	4c4a      	ldr	r4, [pc, #296]	; (800539c <HAL_RCC_OscConfig+0x270>)
 8005274:	4b4b      	ldr	r3, [pc, #300]	; (80053a4 <HAL_RCC_OscConfig+0x278>)
 8005276:	b1da      	cbz	r2, 80052b0 <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 8005278:	2201      	movs	r2, #1
 800527a:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 800527c:	f7ff f814 	bl	80042a8 <HAL_GetTick>
 8005280:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8005282:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8005284:	079b      	lsls	r3, r3, #30
 8005286:	d50d      	bpl.n	80052a4 <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 8005288:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 800528c:	4b46      	ldr	r3, [pc, #280]	; (80053a8 <HAL_RCC_OscConfig+0x27c>)
 800528e:	681b      	ldr	r3, [r3, #0]
 8005290:	fbb3 f3f2 	udiv	r3, r3, r2
 8005294:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 8005296:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 8005298:	9b01      	ldr	r3, [sp, #4]
 800529a:	1e5a      	subs	r2, r3, #1
 800529c:	9201      	str	r2, [sp, #4]
 800529e:	2b00      	cmp	r3, #0
 80052a0:	d1f9      	bne.n	8005296 <HAL_RCC_OscConfig+0x16a>
 80052a2:	e750      	b.n	8005146 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 80052a4:	f7ff f800 	bl	80042a8 <HAL_GetTick>
 80052a8:	1b80      	subs	r0, r0, r6
 80052aa:	2802      	cmp	r0, #2
 80052ac:	d9e9      	bls.n	8005282 <HAL_RCC_OscConfig+0x156>
 80052ae:	e77f      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 80052b0:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 80052b2:	f7fe fff9 	bl	80042a8 <HAL_GetTick>
 80052b6:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 80052b8:	6a63      	ldr	r3, [r4, #36]	; 0x24
 80052ba:	079f      	lsls	r7, r3, #30
 80052bc:	f57f af43 	bpl.w	8005146 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 80052c0:	f7fe fff2 	bl	80042a8 <HAL_GetTick>
 80052c4:	1b80      	subs	r0, r0, r6
 80052c6:	2802      	cmp	r0, #2
 80052c8:	d9f6      	bls.n	80052b8 <HAL_RCC_OscConfig+0x18c>
 80052ca:	e771      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 80052cc:	4c33      	ldr	r4, [pc, #204]	; (800539c <HAL_RCC_OscConfig+0x270>)
 80052ce:	69e3      	ldr	r3, [r4, #28]
 80052d0:	00d8      	lsls	r0, r3, #3
 80052d2:	d424      	bmi.n	800531e <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 80052d4:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 80052d6:	69e3      	ldr	r3, [r4, #28]
 80052d8:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 80052dc:	61e3      	str	r3, [r4, #28]
 80052de:	69e3      	ldr	r3, [r4, #28]
 80052e0:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80052e4:	9300      	str	r3, [sp, #0]
 80052e6:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80052e8:	4e30      	ldr	r6, [pc, #192]	; (80053ac <HAL_RCC_OscConfig+0x280>)
 80052ea:	6833      	ldr	r3, [r6, #0]
 80052ec:	05d9      	lsls	r1, r3, #23
 80052ee:	d518      	bpl.n	8005322 <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80052f0:	68eb      	ldr	r3, [r5, #12]
 80052f2:	2b01      	cmp	r3, #1
 80052f4:	d126      	bne.n	8005344 <HAL_RCC_OscConfig+0x218>
 80052f6:	6a23      	ldr	r3, [r4, #32]
 80052f8:	f043 0301 	orr.w	r3, r3, #1
 80052fc:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 80052fe:	f7fe ffd3 	bl	80042a8 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8005302:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 8005306:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 8005308:	6a23      	ldr	r3, [r4, #32]
 800530a:	079b      	lsls	r3, r3, #30
 800530c:	d53f      	bpl.n	800538e <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 800530e:	2f00      	cmp	r7, #0
 8005310:	f43f af1d 	beq.w	800514e <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 8005314:	69e3      	ldr	r3, [r4, #28]
 8005316:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 800531a:	61e3      	str	r3, [r4, #28]
 800531c:	e717      	b.n	800514e <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 800531e:	2700      	movs	r7, #0
 8005320:	e7e2      	b.n	80052e8 <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8005322:	6833      	ldr	r3, [r6, #0]
 8005324:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8005328:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 800532a:	f7fe ffbd 	bl	80042a8 <HAL_GetTick>
 800532e:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8005330:	6833      	ldr	r3, [r6, #0]
 8005332:	05da      	lsls	r2, r3, #23
 8005334:	d4dc      	bmi.n	80052f0 <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8005336:	f7fe ffb7 	bl	80042a8 <HAL_GetTick>
 800533a:	eba0 0008 	sub.w	r0, r0, r8
 800533e:	2864      	cmp	r0, #100	; 0x64
 8005340:	d9f6      	bls.n	8005330 <HAL_RCC_OscConfig+0x204>
 8005342:	e735      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005344:	b9ab      	cbnz	r3, 8005372 <HAL_RCC_OscConfig+0x246>
 8005346:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8005348:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800534c:	f023 0301 	bic.w	r3, r3, #1
 8005350:	6223      	str	r3, [r4, #32]
 8005352:	6a23      	ldr	r3, [r4, #32]
 8005354:	f023 0304 	bic.w	r3, r3, #4
 8005358:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 800535a:	f7fe ffa5 	bl	80042a8 <HAL_GetTick>
 800535e:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 8005360:	6a23      	ldr	r3, [r4, #32]
 8005362:	0798      	lsls	r0, r3, #30
 8005364:	d5d3      	bpl.n	800530e <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8005366:	f7fe ff9f 	bl	80042a8 <HAL_GetTick>
 800536a:	1b80      	subs	r0, r0, r6
 800536c:	4540      	cmp	r0, r8
 800536e:	d9f7      	bls.n	8005360 <HAL_RCC_OscConfig+0x234>
 8005370:	e71e      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005372:	2b05      	cmp	r3, #5
 8005374:	6a23      	ldr	r3, [r4, #32]
 8005376:	d103      	bne.n	8005380 <HAL_RCC_OscConfig+0x254>
 8005378:	f043 0304 	orr.w	r3, r3, #4
 800537c:	6223      	str	r3, [r4, #32]
 800537e:	e7ba      	b.n	80052f6 <HAL_RCC_OscConfig+0x1ca>
 8005380:	f023 0301 	bic.w	r3, r3, #1
 8005384:	6223      	str	r3, [r4, #32]
 8005386:	6a23      	ldr	r3, [r4, #32]
 8005388:	f023 0304 	bic.w	r3, r3, #4
 800538c:	e7b6      	b.n	80052fc <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 800538e:	f7fe ff8b 	bl	80042a8 <HAL_GetTick>
 8005392:	eba0 0008 	sub.w	r0, r0, r8
 8005396:	42b0      	cmp	r0, r6
 8005398:	d9b6      	bls.n	8005308 <HAL_RCC_OscConfig+0x1dc>
 800539a:	e709      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
 800539c:	40021000 	.word	0x40021000
 80053a0:	42420000 	.word	0x42420000
 80053a4:	42420480 	.word	0x42420480
 80053a8:	20000010 	.word	0x20000010
 80053ac:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 80053b0:	4c22      	ldr	r4, [pc, #136]	; (800543c <HAL_RCC_OscConfig+0x310>)
 80053b2:	6863      	ldr	r3, [r4, #4]
 80053b4:	f003 030c 	and.w	r3, r3, #12
 80053b8:	2b08      	cmp	r3, #8
 80053ba:	f43f aee2 	beq.w	8005182 <HAL_RCC_OscConfig+0x56>
 80053be:	2300      	movs	r3, #0
 80053c0:	4e1f      	ldr	r6, [pc, #124]	; (8005440 <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 80053c2:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 80053c4:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 80053c6:	d12b      	bne.n	8005420 <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 80053c8:	f7fe ff6e 	bl	80042a8 <HAL_GetTick>
 80053cc:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 80053ce:	6823      	ldr	r3, [r4, #0]
 80053d0:	0199      	lsls	r1, r3, #6
 80053d2:	d41f      	bmi.n	8005414 <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 80053d4:	6a2b      	ldr	r3, [r5, #32]
 80053d6:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 80053da:	d105      	bne.n	80053e8 <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 80053dc:	6862      	ldr	r2, [r4, #4]
 80053de:	68a9      	ldr	r1, [r5, #8]
 80053e0:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 80053e4:	430a      	orrs	r2, r1
 80053e6:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 80053e8:	6a69      	ldr	r1, [r5, #36]	; 0x24
 80053ea:	6862      	ldr	r2, [r4, #4]
 80053ec:	430b      	orrs	r3, r1
 80053ee:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 80053f2:	4313      	orrs	r3, r2
 80053f4:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 80053f6:	2301      	movs	r3, #1
 80053f8:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 80053fa:	f7fe ff55 	bl	80042a8 <HAL_GetTick>
 80053fe:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8005400:	6823      	ldr	r3, [r4, #0]
 8005402:	019a      	lsls	r2, r3, #6
 8005404:	f53f aea7 	bmi.w	8005156 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8005408:	f7fe ff4e 	bl	80042a8 <HAL_GetTick>
 800540c:	1b40      	subs	r0, r0, r5
 800540e:	2802      	cmp	r0, #2
 8005410:	d9f6      	bls.n	8005400 <HAL_RCC_OscConfig+0x2d4>
 8005412:	e6cd      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8005414:	f7fe ff48 	bl	80042a8 <HAL_GetTick>
 8005418:	1bc0      	subs	r0, r0, r7
 800541a:	2802      	cmp	r0, #2
 800541c:	d9d7      	bls.n	80053ce <HAL_RCC_OscConfig+0x2a2>
 800541e:	e6c7      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8005420:	f7fe ff42 	bl	80042a8 <HAL_GetTick>
 8005424:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8005426:	6823      	ldr	r3, [r4, #0]
 8005428:	019b      	lsls	r3, r3, #6
 800542a:	f57f ae94 	bpl.w	8005156 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 800542e:	f7fe ff3b 	bl	80042a8 <HAL_GetTick>
 8005432:	1b40      	subs	r0, r0, r5
 8005434:	2802      	cmp	r0, #2
 8005436:	d9f6      	bls.n	8005426 <HAL_RCC_OscConfig+0x2fa>
 8005438:	e6ba      	b.n	80051b0 <HAL_RCC_OscConfig+0x84>
 800543a:	bf00      	nop
 800543c:	40021000 	.word	0x40021000
 8005440:	42420060 	.word	0x42420060

08005444 <HAL_RCC_GetSysClockFreq>:
{
 8005444:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8005446:	4b19      	ldr	r3, [pc, #100]	; (80054ac <HAL_RCC_GetSysClockFreq+0x68>)
{
 8005448:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 800544a:	ac02      	add	r4, sp, #8
 800544c:	f103 0510 	add.w	r5, r3, #16
 8005450:	4622      	mov	r2, r4
 8005452:	6818      	ldr	r0, [r3, #0]
 8005454:	6859      	ldr	r1, [r3, #4]
 8005456:	3308      	adds	r3, #8
 8005458:	c203      	stmia	r2!, {r0, r1}
 800545a:	42ab      	cmp	r3, r5
 800545c:	4614      	mov	r4, r2
 800545e:	d1f7      	bne.n	8005450 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8005460:	2301      	movs	r3, #1
 8005462:	f88d 3004 	strb.w	r3, [sp, #4]
 8005466:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 8005468:	4911      	ldr	r1, [pc, #68]	; (80054b0 <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 800546a:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 800546e:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 8005470:	f003 020c 	and.w	r2, r3, #12
 8005474:	2a08      	cmp	r2, #8
 8005476:	d117      	bne.n	80054a8 <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8005478:	f3c3 4283 	ubfx	r2, r3, #18, #4
 800547c:	a806      	add	r0, sp, #24
 800547e:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8005480:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8005482:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8005486:	d50c      	bpl.n	80054a2 <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8005488:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 800548a:	480a      	ldr	r0, [pc, #40]	; (80054b4 <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 800548c:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8005490:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8005492:	aa06      	add	r2, sp, #24
 8005494:	4413      	add	r3, r2
 8005496:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 800549a:	fbb0 f0f3 	udiv	r0, r0, r3
}
 800549e:	b007      	add	sp, #28
 80054a0:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 80054a2:	4805      	ldr	r0, [pc, #20]	; (80054b8 <HAL_RCC_GetSysClockFreq+0x74>)
 80054a4:	4350      	muls	r0, r2
 80054a6:	e7fa      	b.n	800549e <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 80054a8:	4802      	ldr	r0, [pc, #8]	; (80054b4 <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 80054aa:	e7f8      	b.n	800549e <HAL_RCC_GetSysClockFreq+0x5a>
 80054ac:	08008d54 	.word	0x08008d54
 80054b0:	40021000 	.word	0x40021000
 80054b4:	007a1200 	.word	0x007a1200
 80054b8:	003d0900 	.word	0x003d0900

080054bc <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 80054bc:	4a54      	ldr	r2, [pc, #336]	; (8005610 <HAL_RCC_ClockConfig+0x154>)
{
 80054be:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 80054c2:	6813      	ldr	r3, [r2, #0]
{
 80054c4:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 80054c6:	f003 0307 	and.w	r3, r3, #7
 80054ca:	428b      	cmp	r3, r1
{
 80054cc:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 80054ce:	d32a      	bcc.n	8005526 <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 80054d0:	6829      	ldr	r1, [r5, #0]
 80054d2:	078c      	lsls	r4, r1, #30
 80054d4:	d434      	bmi.n	8005540 <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 80054d6:	07ca      	lsls	r2, r1, #31
 80054d8:	d447      	bmi.n	800556a <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 80054da:	4a4d      	ldr	r2, [pc, #308]	; (8005610 <HAL_RCC_ClockConfig+0x154>)
 80054dc:	6813      	ldr	r3, [r2, #0]
 80054de:	f003 0307 	and.w	r3, r3, #7
 80054e2:	429e      	cmp	r6, r3
 80054e4:	f0c0 8082 	bcc.w	80055ec <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 80054e8:	682a      	ldr	r2, [r5, #0]
 80054ea:	4c4a      	ldr	r4, [pc, #296]	; (8005614 <HAL_RCC_ClockConfig+0x158>)
 80054ec:	f012 0f04 	tst.w	r2, #4
 80054f0:	f040 8087 	bne.w	8005602 <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 80054f4:	0713      	lsls	r3, r2, #28
 80054f6:	d506      	bpl.n	8005506 <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 80054f8:	6863      	ldr	r3, [r4, #4]
 80054fa:	692a      	ldr	r2, [r5, #16]
 80054fc:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8005500:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8005504:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 8005506:	f7ff ff9d 	bl	8005444 <HAL_RCC_GetSysClockFreq>
 800550a:	6863      	ldr	r3, [r4, #4]
 800550c:	4a42      	ldr	r2, [pc, #264]	; (8005618 <HAL_RCC_ClockConfig+0x15c>)
 800550e:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8005512:	5cd3      	ldrb	r3, [r2, r3]
 8005514:	40d8      	lsrs	r0, r3
 8005516:	4b41      	ldr	r3, [pc, #260]	; (800561c <HAL_RCC_ClockConfig+0x160>)
 8005518:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 800551a:	2000      	movs	r0, #0
 800551c:	f7fe fe82 	bl	8004224 <HAL_InitTick>
  return HAL_OK;
 8005520:	2000      	movs	r0, #0
}
 8005522:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 8005526:	6813      	ldr	r3, [r2, #0]
 8005528:	f023 0307 	bic.w	r3, r3, #7
 800552c:	430b      	orrs	r3, r1
 800552e:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8005530:	6813      	ldr	r3, [r2, #0]
 8005532:	f003 0307 	and.w	r3, r3, #7
 8005536:	4299      	cmp	r1, r3
 8005538:	d0ca      	beq.n	80054d0 <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 800553a:	2001      	movs	r0, #1
 800553c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8005540:	4b34      	ldr	r3, [pc, #208]	; (8005614 <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8005542:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8005546:	bf1e      	ittt	ne
 8005548:	685a      	ldrne	r2, [r3, #4]
 800554a:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 800554e:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8005550:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8005552:	bf42      	ittt	mi
 8005554:	685a      	ldrmi	r2, [r3, #4]
 8005556:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 800555a:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800555c:	685a      	ldr	r2, [r3, #4]
 800555e:	68a8      	ldr	r0, [r5, #8]
 8005560:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8005564:	4302      	orrs	r2, r0
 8005566:	605a      	str	r2, [r3, #4]
 8005568:	e7b5      	b.n	80054d6 <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800556a:	686a      	ldr	r2, [r5, #4]
 800556c:	4c29      	ldr	r4, [pc, #164]	; (8005614 <HAL_RCC_ClockConfig+0x158>)
 800556e:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8005570:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8005572:	d11c      	bne.n	80055ae <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8005574:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8005578:	d0df      	beq.n	800553a <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 800557a:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 800557c:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8005580:	f023 0303 	bic.w	r3, r3, #3
 8005584:	4313      	orrs	r3, r2
 8005586:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8005588:	f7fe fe8e 	bl	80042a8 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800558c:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 800558e:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8005590:	2b01      	cmp	r3, #1
 8005592:	d114      	bne.n	80055be <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8005594:	6863      	ldr	r3, [r4, #4]
 8005596:	f003 030c 	and.w	r3, r3, #12
 800559a:	2b04      	cmp	r3, #4
 800559c:	d09d      	beq.n	80054da <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 800559e:	f7fe fe83 	bl	80042a8 <HAL_GetTick>
 80055a2:	1bc0      	subs	r0, r0, r7
 80055a4:	4540      	cmp	r0, r8
 80055a6:	d9f5      	bls.n	8005594 <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 80055a8:	2003      	movs	r0, #3
 80055aa:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 80055ae:	2a02      	cmp	r2, #2
 80055b0:	d102      	bne.n	80055b8 <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 80055b2:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 80055b6:	e7df      	b.n	8005578 <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80055b8:	f013 0f02 	tst.w	r3, #2
 80055bc:	e7dc      	b.n	8005578 <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 80055be:	2b02      	cmp	r3, #2
 80055c0:	d10f      	bne.n	80055e2 <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 80055c2:	6863      	ldr	r3, [r4, #4]
 80055c4:	f003 030c 	and.w	r3, r3, #12
 80055c8:	2b08      	cmp	r3, #8
 80055ca:	d086      	beq.n	80054da <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 80055cc:	f7fe fe6c 	bl	80042a8 <HAL_GetTick>
 80055d0:	1bc0      	subs	r0, r0, r7
 80055d2:	4540      	cmp	r0, r8
 80055d4:	d9f5      	bls.n	80055c2 <HAL_RCC_ClockConfig+0x106>
 80055d6:	e7e7      	b.n	80055a8 <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 80055d8:	f7fe fe66 	bl	80042a8 <HAL_GetTick>
 80055dc:	1bc0      	subs	r0, r0, r7
 80055de:	4540      	cmp	r0, r8
 80055e0:	d8e2      	bhi.n	80055a8 <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 80055e2:	6863      	ldr	r3, [r4, #4]
 80055e4:	f013 0f0c 	tst.w	r3, #12
 80055e8:	d1f6      	bne.n	80055d8 <HAL_RCC_ClockConfig+0x11c>
 80055ea:	e776      	b.n	80054da <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 80055ec:	6813      	ldr	r3, [r2, #0]
 80055ee:	f023 0307 	bic.w	r3, r3, #7
 80055f2:	4333      	orrs	r3, r6
 80055f4:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 80055f6:	6813      	ldr	r3, [r2, #0]
 80055f8:	f003 0307 	and.w	r3, r3, #7
 80055fc:	429e      	cmp	r6, r3
 80055fe:	d19c      	bne.n	800553a <HAL_RCC_ClockConfig+0x7e>
 8005600:	e772      	b.n	80054e8 <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8005602:	6863      	ldr	r3, [r4, #4]
 8005604:	68e9      	ldr	r1, [r5, #12]
 8005606:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 800560a:	430b      	orrs	r3, r1
 800560c:	6063      	str	r3, [r4, #4]
 800560e:	e771      	b.n	80054f4 <HAL_RCC_ClockConfig+0x38>
 8005610:	40022000 	.word	0x40022000
 8005614:	40021000 	.word	0x40021000
 8005618:	08008ebd 	.word	0x08008ebd
 800561c:	20000010 	.word	0x20000010

08005620 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8005620:	4b04      	ldr	r3, [pc, #16]	; (8005634 <HAL_RCC_GetPCLK1Freq+0x14>)
 8005622:	4a05      	ldr	r2, [pc, #20]	; (8005638 <HAL_RCC_GetPCLK1Freq+0x18>)
 8005624:	685b      	ldr	r3, [r3, #4]
 8005626:	f3c3 2302 	ubfx	r3, r3, #8, #3
 800562a:	5cd3      	ldrb	r3, [r2, r3]
 800562c:	4a03      	ldr	r2, [pc, #12]	; (800563c <HAL_RCC_GetPCLK1Freq+0x1c>)
 800562e:	6810      	ldr	r0, [r2, #0]
}    
 8005630:	40d8      	lsrs	r0, r3
 8005632:	4770      	bx	lr
 8005634:	40021000 	.word	0x40021000
 8005638:	08008ecd 	.word	0x08008ecd
 800563c:	20000010 	.word	0x20000010

08005640 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 8005640:	4b04      	ldr	r3, [pc, #16]	; (8005654 <HAL_RCC_GetPCLK2Freq+0x14>)
 8005642:	4a05      	ldr	r2, [pc, #20]	; (8005658 <HAL_RCC_GetPCLK2Freq+0x18>)
 8005644:	685b      	ldr	r3, [r3, #4]
 8005646:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 800564a:	5cd3      	ldrb	r3, [r2, r3]
 800564c:	4a03      	ldr	r2, [pc, #12]	; (800565c <HAL_RCC_GetPCLK2Freq+0x1c>)
 800564e:	6810      	ldr	r0, [r2, #0]
} 
 8005650:	40d8      	lsrs	r0, r3
 8005652:	4770      	bx	lr
 8005654:	40021000 	.word	0x40021000
 8005658:	08008ecd 	.word	0x08008ecd
 800565c:	20000010 	.word	0x20000010

08005660 <HAL_TIM_Base_Start_IT>:
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

   /* Enable the TIM Update interrupt */
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8005660:	6803      	ldr	r3, [r0, #0]
   /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}
 8005662:	2000      	movs	r0, #0
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8005664:	68da      	ldr	r2, [r3, #12]
 8005666:	f042 0201 	orr.w	r2, r2, #1
 800566a:	60da      	str	r2, [r3, #12]
  __HAL_TIM_ENABLE(htim);
 800566c:	681a      	ldr	r2, [r3, #0]
 800566e:	f042 0201 	orr.w	r2, r2, #1
 8005672:	601a      	str	r2, [r3, #0]
}
 8005674:	4770      	bx	lr

08005676 <HAL_TIM_OC_DelayElapsedCallback>:
 8005676:	4770      	bx	lr

08005678 <HAL_TIM_IC_CaptureCallback>:
 8005678:	4770      	bx	lr

0800567a <HAL_TIM_PWM_PulseFinishedCallback>:
 800567a:	4770      	bx	lr

0800567c <HAL_TIM_TriggerCallback>:
 800567c:	4770      	bx	lr

0800567e <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 800567e:	6803      	ldr	r3, [r0, #0]
{
 8005680:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8005682:	691a      	ldr	r2, [r3, #16]
{
 8005684:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8005686:	0791      	lsls	r1, r2, #30
 8005688:	d50e      	bpl.n	80056a8 <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 800568a:	68da      	ldr	r2, [r3, #12]
 800568c:	0792      	lsls	r2, r2, #30
 800568e:	d50b      	bpl.n	80056a8 <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8005690:	f06f 0202 	mvn.w	r2, #2
 8005694:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8005696:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8005698:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800569a:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 800569c:	079b      	lsls	r3, r3, #30
 800569e:	d077      	beq.n	8005790 <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 80056a0:	f7ff ffea 	bl	8005678 <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 80056a4:	2300      	movs	r3, #0
 80056a6:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 80056a8:	6823      	ldr	r3, [r4, #0]
 80056aa:	691a      	ldr	r2, [r3, #16]
 80056ac:	0750      	lsls	r0, r2, #29
 80056ae:	d510      	bpl.n	80056d2 <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 80056b0:	68da      	ldr	r2, [r3, #12]
 80056b2:	0751      	lsls	r1, r2, #29
 80056b4:	d50d      	bpl.n	80056d2 <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 80056b6:	f06f 0204 	mvn.w	r2, #4
 80056ba:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 80056bc:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 80056be:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 80056c0:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 80056c2:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 80056c6:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 80056c8:	d068      	beq.n	800579c <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 80056ca:	f7ff ffd5 	bl	8005678 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 80056ce:	2300      	movs	r3, #0
 80056d0:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 80056d2:	6823      	ldr	r3, [r4, #0]
 80056d4:	691a      	ldr	r2, [r3, #16]
 80056d6:	0712      	lsls	r2, r2, #28
 80056d8:	d50f      	bpl.n	80056fa <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 80056da:	68da      	ldr	r2, [r3, #12]
 80056dc:	0710      	lsls	r0, r2, #28
 80056de:	d50c      	bpl.n	80056fa <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 80056e0:	f06f 0208 	mvn.w	r2, #8
 80056e4:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 80056e6:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 80056e8:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 80056ea:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 80056ec:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 80056ee:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 80056f0:	d05a      	beq.n	80057a8 <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 80056f2:	f7ff ffc1 	bl	8005678 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 80056f6:	2300      	movs	r3, #0
 80056f8:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 80056fa:	6823      	ldr	r3, [r4, #0]
 80056fc:	691a      	ldr	r2, [r3, #16]
 80056fe:	06d2      	lsls	r2, r2, #27
 8005700:	d510      	bpl.n	8005724 <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8005702:	68da      	ldr	r2, [r3, #12]
 8005704:	06d0      	lsls	r0, r2, #27
 8005706:	d50d      	bpl.n	8005724 <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8005708:	f06f 0210 	mvn.w	r2, #16
 800570c:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800570e:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8005710:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8005712:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8005714:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8005718:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800571a:	d04b      	beq.n	80057b4 <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 800571c:	f7ff ffac 	bl	8005678 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8005720:	2300      	movs	r3, #0
 8005722:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8005724:	6823      	ldr	r3, [r4, #0]
 8005726:	691a      	ldr	r2, [r3, #16]
 8005728:	07d1      	lsls	r1, r2, #31
 800572a:	d508      	bpl.n	800573e <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 800572c:	68da      	ldr	r2, [r3, #12]
 800572e:	07d2      	lsls	r2, r2, #31
 8005730:	d505      	bpl.n	800573e <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8005732:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 8005736:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8005738:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 800573a:	f001 fc17 	bl	8006f6c <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 800573e:	6823      	ldr	r3, [r4, #0]
 8005740:	691a      	ldr	r2, [r3, #16]
 8005742:	0610      	lsls	r0, r2, #24
 8005744:	d508      	bpl.n	8005758 <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 8005746:	68da      	ldr	r2, [r3, #12]
 8005748:	0611      	lsls	r1, r2, #24
 800574a:	d505      	bpl.n	8005758 <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 800574c:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 8005750:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8005752:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 8005754:	f000 f8bf 	bl	80058d6 <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 8005758:	6823      	ldr	r3, [r4, #0]
 800575a:	691a      	ldr	r2, [r3, #16]
 800575c:	0652      	lsls	r2, r2, #25
 800575e:	d508      	bpl.n	8005772 <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 8005760:	68da      	ldr	r2, [r3, #12]
 8005762:	0650      	lsls	r0, r2, #25
 8005764:	d505      	bpl.n	8005772 <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8005766:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 800576a:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 800576c:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 800576e:	f7ff ff85 	bl	800567c <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 8005772:	6823      	ldr	r3, [r4, #0]
 8005774:	691a      	ldr	r2, [r3, #16]
 8005776:	0691      	lsls	r1, r2, #26
 8005778:	d522      	bpl.n	80057c0 <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 800577a:	68da      	ldr	r2, [r3, #12]
 800577c:	0692      	lsls	r2, r2, #26
 800577e:	d51f      	bpl.n	80057c0 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8005780:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 8005784:	4620      	mov	r0, r4
    }
  }
}
 8005786:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 800578a:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 800578c:	f000 b8a2 	b.w	80058d4 <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8005790:	f7ff ff71 	bl	8005676 <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8005794:	4620      	mov	r0, r4
 8005796:	f7ff ff70 	bl	800567a <HAL_TIM_PWM_PulseFinishedCallback>
 800579a:	e783      	b.n	80056a4 <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800579c:	f7ff ff6b 	bl	8005676 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 80057a0:	4620      	mov	r0, r4
 80057a2:	f7ff ff6a 	bl	800567a <HAL_TIM_PWM_PulseFinishedCallback>
 80057a6:	e792      	b.n	80056ce <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 80057a8:	f7ff ff65 	bl	8005676 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 80057ac:	4620      	mov	r0, r4
 80057ae:	f7ff ff64 	bl	800567a <HAL_TIM_PWM_PulseFinishedCallback>
 80057b2:	e7a0      	b.n	80056f6 <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 80057b4:	f7ff ff5f 	bl	8005676 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 80057b8:	4620      	mov	r0, r4
 80057ba:	f7ff ff5e 	bl	800567a <HAL_TIM_PWM_PulseFinishedCallback>
 80057be:	e7af      	b.n	8005720 <HAL_TIM_IRQHandler+0xa2>
 80057c0:	bd10      	pop	{r4, pc}
	...

080057c4 <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 80057c4:	4a24      	ldr	r2, [pc, #144]	; (8005858 <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 80057c6:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 80057c8:	4290      	cmp	r0, r2
 80057ca:	d012      	beq.n	80057f2 <TIM_Base_SetConfig+0x2e>
 80057cc:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 80057d0:	4290      	cmp	r0, r2
 80057d2:	d00e      	beq.n	80057f2 <TIM_Base_SetConfig+0x2e>
 80057d4:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 80057d8:	d00b      	beq.n	80057f2 <TIM_Base_SetConfig+0x2e>
 80057da:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 80057de:	4290      	cmp	r0, r2
 80057e0:	d007      	beq.n	80057f2 <TIM_Base_SetConfig+0x2e>
 80057e2:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80057e6:	4290      	cmp	r0, r2
 80057e8:	d003      	beq.n	80057f2 <TIM_Base_SetConfig+0x2e>
 80057ea:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80057ee:	4290      	cmp	r0, r2
 80057f0:	d11d      	bne.n	800582e <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 80057f2:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 80057f4:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 80057f8:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 80057fa:	4a17      	ldr	r2, [pc, #92]	; (8005858 <TIM_Base_SetConfig+0x94>)
 80057fc:	4290      	cmp	r0, r2
 80057fe:	d012      	beq.n	8005826 <TIM_Base_SetConfig+0x62>
 8005800:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8005804:	4290      	cmp	r0, r2
 8005806:	d00e      	beq.n	8005826 <TIM_Base_SetConfig+0x62>
 8005808:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 800580c:	d00b      	beq.n	8005826 <TIM_Base_SetConfig+0x62>
 800580e:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8005812:	4290      	cmp	r0, r2
 8005814:	d007      	beq.n	8005826 <TIM_Base_SetConfig+0x62>
 8005816:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 800581a:	4290      	cmp	r0, r2
 800581c:	d003      	beq.n	8005826 <TIM_Base_SetConfig+0x62>
 800581e:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8005822:	4290      	cmp	r0, r2
 8005824:	d103      	bne.n	800582e <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8005826:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8005828:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 800582c:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 800582e:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 8005830:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8005834:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8005836:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8005838:	688b      	ldr	r3, [r1, #8]
 800583a:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 800583c:	680b      	ldr	r3, [r1, #0]
 800583e:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8005840:	4b05      	ldr	r3, [pc, #20]	; (8005858 <TIM_Base_SetConfig+0x94>)
 8005842:	4298      	cmp	r0, r3
 8005844:	d003      	beq.n	800584e <TIM_Base_SetConfig+0x8a>
 8005846:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 800584a:	4298      	cmp	r0, r3
 800584c:	d101      	bne.n	8005852 <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 800584e:	690b      	ldr	r3, [r1, #16]
 8005850:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 8005852:	2301      	movs	r3, #1
 8005854:	6143      	str	r3, [r0, #20]
 8005856:	4770      	bx	lr
 8005858:	40012c00 	.word	0x40012c00

0800585c <HAL_TIM_Base_Init>:
{
 800585c:	b510      	push	{r4, lr}
  if(htim == NULL)
 800585e:	4604      	mov	r4, r0
 8005860:	b1a0      	cbz	r0, 800588c <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 8005862:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8005866:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 800586a:	b91b      	cbnz	r3, 8005874 <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 800586c:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8005870:	f002 f8cc 	bl	8007a0c <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 8005874:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8005876:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8005878:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800587c:	1d21      	adds	r1, r4, #4
 800587e:	f7ff ffa1 	bl	80057c4 <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 8005882:	2301      	movs	r3, #1
  return HAL_OK;
 8005884:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 8005886:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 800588a:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 800588c:	2001      	movs	r0, #1
}
 800588e:	bd10      	pop	{r4, pc}

08005890 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 8005890:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 8005894:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 8005896:	2b01      	cmp	r3, #1
 8005898:	f04f 0302 	mov.w	r3, #2
 800589c:	d018      	beq.n	80058d0 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 800589e:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 80058a2:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 80058a4:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 80058a6:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 80058a8:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 80058aa:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 80058ae:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 80058b0:	685a      	ldr	r2, [r3, #4]
 80058b2:	4322      	orrs	r2, r4
 80058b4:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 80058b6:	689a      	ldr	r2, [r3, #8]
 80058b8:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 80058bc:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 80058be:	689a      	ldr	r2, [r3, #8]
 80058c0:	430a      	orrs	r2, r1
 80058c2:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 80058c4:	2301      	movs	r3, #1
 80058c6:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 80058ca:	2300      	movs	r3, #0
 80058cc:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 80058d0:	4618      	mov	r0, r3

  return HAL_OK;
}
 80058d2:	bd10      	pop	{r4, pc}

080058d4 <HAL_TIMEx_CommutationCallback>:
 80058d4:	4770      	bx	lr

080058d6 <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 80058d6:	4770      	bx	lr

080058d8 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 80058d8:	6803      	ldr	r3, [r0, #0]
 80058da:	68da      	ldr	r2, [r3, #12]
 80058dc:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 80058e0:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 80058e2:	695a      	ldr	r2, [r3, #20]
 80058e4:	f022 0201 	bic.w	r2, r2, #1
 80058e8:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 80058ea:	2320      	movs	r3, #32
 80058ec:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 80058f0:	4770      	bx	lr
	...

080058f4 <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 80058f4:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 80058f8:	6805      	ldr	r5, [r0, #0]
 80058fa:	68c2      	ldr	r2, [r0, #12]
 80058fc:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 80058fe:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8005900:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8005904:	4313      	orrs	r3, r2
 8005906:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8005908:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 800590a:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 800590c:	430b      	orrs	r3, r1
 800590e:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8005910:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 8005914:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8005918:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 800591a:	4313      	orrs	r3, r2
 800591c:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 800591e:	696b      	ldr	r3, [r5, #20]
 8005920:	6982      	ldr	r2, [r0, #24]
 8005922:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8005926:	4313      	orrs	r3, r2
 8005928:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 800592a:	4b40      	ldr	r3, [pc, #256]	; (8005a2c <UART_SetConfig+0x138>)
{
 800592c:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 800592e:	429d      	cmp	r5, r3
 8005930:	f04f 0419 	mov.w	r4, #25
 8005934:	d146      	bne.n	80059c4 <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 8005936:	f7ff fe83 	bl	8005640 <HAL_RCC_GetPCLK2Freq>
 800593a:	fb04 f300 	mul.w	r3, r4, r0
 800593e:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8005942:	f04f 0864 	mov.w	r8, #100	; 0x64
 8005946:	00b6      	lsls	r6, r6, #2
 8005948:	fbb3 f3f6 	udiv	r3, r3, r6
 800594c:	fbb3 f3f8 	udiv	r3, r3, r8
 8005950:	011e      	lsls	r6, r3, #4
 8005952:	f7ff fe75 	bl	8005640 <HAL_RCC_GetPCLK2Freq>
 8005956:	4360      	muls	r0, r4
 8005958:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800595c:	009b      	lsls	r3, r3, #2
 800595e:	fbb0 f7f3 	udiv	r7, r0, r3
 8005962:	f7ff fe6d 	bl	8005640 <HAL_RCC_GetPCLK2Freq>
 8005966:	4360      	muls	r0, r4
 8005968:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800596c:	009b      	lsls	r3, r3, #2
 800596e:	fbb0 f3f3 	udiv	r3, r0, r3
 8005972:	fbb3 f3f8 	udiv	r3, r3, r8
 8005976:	fb08 7313 	mls	r3, r8, r3, r7
 800597a:	011b      	lsls	r3, r3, #4
 800597c:	3332      	adds	r3, #50	; 0x32
 800597e:	fbb3 f3f8 	udiv	r3, r3, r8
 8005982:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8005986:	f7ff fe5b 	bl	8005640 <HAL_RCC_GetPCLK2Freq>
 800598a:	4360      	muls	r0, r4
 800598c:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8005990:	0092      	lsls	r2, r2, #2
 8005992:	fbb0 faf2 	udiv	sl, r0, r2
 8005996:	f7ff fe53 	bl	8005640 <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 800599a:	4360      	muls	r0, r4
 800599c:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80059a0:	009b      	lsls	r3, r3, #2
 80059a2:	fbb0 f3f3 	udiv	r3, r0, r3
 80059a6:	fbb3 f3f8 	udiv	r3, r3, r8
 80059aa:	fb08 a313 	mls	r3, r8, r3, sl
 80059ae:	011b      	lsls	r3, r3, #4
 80059b0:	3332      	adds	r3, #50	; 0x32
 80059b2:	fbb3 f3f8 	udiv	r3, r3, r8
 80059b6:	f003 030f 	and.w	r3, r3, #15
 80059ba:	433b      	orrs	r3, r7
 80059bc:	4433      	add	r3, r6
 80059be:	60ab      	str	r3, [r5, #8]
 80059c0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80059c4:	f7ff fe2c 	bl	8005620 <HAL_RCC_GetPCLK1Freq>
 80059c8:	fb04 f300 	mul.w	r3, r4, r0
 80059cc:	f8d9 6004 	ldr.w	r6, [r9, #4]
 80059d0:	f04f 0864 	mov.w	r8, #100	; 0x64
 80059d4:	00b6      	lsls	r6, r6, #2
 80059d6:	fbb3 f3f6 	udiv	r3, r3, r6
 80059da:	fbb3 f3f8 	udiv	r3, r3, r8
 80059de:	011e      	lsls	r6, r3, #4
 80059e0:	f7ff fe1e 	bl	8005620 <HAL_RCC_GetPCLK1Freq>
 80059e4:	4360      	muls	r0, r4
 80059e6:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80059ea:	009b      	lsls	r3, r3, #2
 80059ec:	fbb0 f7f3 	udiv	r7, r0, r3
 80059f0:	f7ff fe16 	bl	8005620 <HAL_RCC_GetPCLK1Freq>
 80059f4:	4360      	muls	r0, r4
 80059f6:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80059fa:	009b      	lsls	r3, r3, #2
 80059fc:	fbb0 f3f3 	udiv	r3, r0, r3
 8005a00:	fbb3 f3f8 	udiv	r3, r3, r8
 8005a04:	fb08 7313 	mls	r3, r8, r3, r7
 8005a08:	011b      	lsls	r3, r3, #4
 8005a0a:	3332      	adds	r3, #50	; 0x32
 8005a0c:	fbb3 f3f8 	udiv	r3, r3, r8
 8005a10:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8005a14:	f7ff fe04 	bl	8005620 <HAL_RCC_GetPCLK1Freq>
 8005a18:	4360      	muls	r0, r4
 8005a1a:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8005a1e:	0092      	lsls	r2, r2, #2
 8005a20:	fbb0 faf2 	udiv	sl, r0, r2
 8005a24:	f7ff fdfc 	bl	8005620 <HAL_RCC_GetPCLK1Freq>
 8005a28:	e7b7      	b.n	800599a <UART_SetConfig+0xa6>
 8005a2a:	bf00      	nop
 8005a2c:	40013800 	.word	0x40013800

08005a30 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 8005a30:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8005a32:	4604      	mov	r4, r0
 8005a34:	460e      	mov	r6, r1
 8005a36:	4617      	mov	r7, r2
 8005a38:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 8005a3a:	6821      	ldr	r1, [r4, #0]
 8005a3c:	680b      	ldr	r3, [r1, #0]
 8005a3e:	ea36 0303 	bics.w	r3, r6, r3
 8005a42:	d101      	bne.n	8005a48 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 8005a44:	2000      	movs	r0, #0
}
 8005a46:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 8005a48:	1c6b      	adds	r3, r5, #1
 8005a4a:	d0f7      	beq.n	8005a3c <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8005a4c:	b995      	cbnz	r5, 8005a74 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8005a4e:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 8005a50:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8005a52:	68da      	ldr	r2, [r3, #12]
 8005a54:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 8005a58:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8005a5a:	695a      	ldr	r2, [r3, #20]
 8005a5c:	f022 0201 	bic.w	r2, r2, #1
 8005a60:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 8005a62:	2320      	movs	r3, #32
 8005a64:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8005a68:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8005a6c:	2300      	movs	r3, #0
 8005a6e:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 8005a72:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8005a74:	f7fe fc18 	bl	80042a8 <HAL_GetTick>
 8005a78:	1bc0      	subs	r0, r0, r7
 8005a7a:	4285      	cmp	r5, r0
 8005a7c:	d2dd      	bcs.n	8005a3a <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 8005a7e:	e7e6      	b.n	8005a4e <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08005a80 <HAL_UART_Init>:
{
 8005a80:	b510      	push	{r4, lr}
  if(huart == NULL)
 8005a82:	4604      	mov	r4, r0
 8005a84:	b340      	cbz	r0, 8005ad8 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 8005a86:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8005a8a:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8005a8e:	b91b      	cbnz	r3, 8005a98 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8005a90:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8005a94:	f001 ffce 	bl	8007a34 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8005a98:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8005a9a:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8005a9c:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8005aa0:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 8005aa2:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8005aa4:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8005aa8:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8005aaa:	f7ff ff23 	bl	80058f4 <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8005aae:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005ab0:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8005ab2:	691a      	ldr	r2, [r3, #16]
 8005ab4:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8005ab8:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 8005aba:	695a      	ldr	r2, [r3, #20]
 8005abc:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8005ac0:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8005ac2:	68da      	ldr	r2, [r3, #12]
 8005ac4:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8005ac8:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 8005aca:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005acc:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 8005ace:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 8005ad2:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 8005ad6:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8005ad8:	2001      	movs	r0, #1
}
 8005ada:	bd10      	pop	{r4, pc}

08005adc <HAL_UART_Transmit>:
{
 8005adc:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8005ae0:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 8005ae2:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 8005ae6:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 8005ae8:	2b20      	cmp	r3, #32
{
 8005aea:	460d      	mov	r5, r1
 8005aec:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 8005aee:	d14e      	bne.n	8005b8e <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 8005af0:	2900      	cmp	r1, #0
 8005af2:	d049      	beq.n	8005b88 <HAL_UART_Transmit+0xac>
 8005af4:	2a00      	cmp	r2, #0
 8005af6:	d047      	beq.n	8005b88 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 8005af8:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8005afc:	2b01      	cmp	r3, #1
 8005afe:	d046      	beq.n	8005b8e <HAL_UART_Transmit+0xb2>
 8005b00:	2301      	movs	r3, #1
 8005b02:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005b06:	2300      	movs	r3, #0
 8005b08:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8005b0a:	2321      	movs	r3, #33	; 0x21
 8005b0c:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 8005b10:	f7fe fbca 	bl	80042a8 <HAL_GetTick>
 8005b14:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 8005b16:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 8005b1a:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 8005b1e:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 8005b20:	b29b      	uxth	r3, r3
 8005b22:	b96b      	cbnz	r3, 8005b40 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8005b24:	463b      	mov	r3, r7
 8005b26:	4632      	mov	r2, r6
 8005b28:	2140      	movs	r1, #64	; 0x40
 8005b2a:	4620      	mov	r0, r4
 8005b2c:	f7ff ff80 	bl	8005a30 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8005b30:	b9a8      	cbnz	r0, 8005b5e <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 8005b32:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 8005b34:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 8005b38:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 8005b3c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 8005b40:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8005b42:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8005b44:	3b01      	subs	r3, #1
 8005b46:	b29b      	uxth	r3, r3
 8005b48:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8005b4a:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8005b4c:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8005b4e:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8005b52:	4620      	mov	r0, r4
 8005b54:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8005b56:	d10e      	bne.n	8005b76 <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8005b58:	f7ff ff6a 	bl	8005a30 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8005b5c:	b110      	cbz	r0, 8005b64 <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 8005b5e:	2003      	movs	r0, #3
 8005b60:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8005b64:	882b      	ldrh	r3, [r5, #0]
 8005b66:	6822      	ldr	r2, [r4, #0]
 8005b68:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8005b6c:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 8005b6e:	6923      	ldr	r3, [r4, #16]
 8005b70:	b943      	cbnz	r3, 8005b84 <HAL_UART_Transmit+0xa8>
          pData +=2U;
 8005b72:	3502      	adds	r5, #2
 8005b74:	e7d3      	b.n	8005b1e <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8005b76:	f7ff ff5b 	bl	8005a30 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8005b7a:	2800      	cmp	r0, #0
 8005b7c:	d1ef      	bne.n	8005b5e <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 8005b7e:	6823      	ldr	r3, [r4, #0]
 8005b80:	782a      	ldrb	r2, [r5, #0]
 8005b82:	605a      	str	r2, [r3, #4]
 8005b84:	3501      	adds	r5, #1
 8005b86:	e7ca      	b.n	8005b1e <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 8005b88:	2001      	movs	r0, #1
 8005b8a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 8005b8e:	2002      	movs	r0, #2
}
 8005b90:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

08005b94 <HAL_UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_READY)
 8005b94:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
 8005b98:	2b20      	cmp	r3, #32
 8005b9a:	d120      	bne.n	8005bde <HAL_UART_Receive_IT+0x4a>
    if((pData == NULL) || (Size == 0U))
 8005b9c:	b1e9      	cbz	r1, 8005bda <HAL_UART_Receive_IT+0x46>
 8005b9e:	b1e2      	cbz	r2, 8005bda <HAL_UART_Receive_IT+0x46>
    __HAL_LOCK(huart);
 8005ba0:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8005ba4:	2b01      	cmp	r3, #1
 8005ba6:	d01a      	beq.n	8005bde <HAL_UART_Receive_IT+0x4a>
    huart->RxXferCount = Size;
 8005ba8:	85c2      	strh	r2, [r0, #46]	; 0x2e
    huart->RxXferSize = Size;
 8005baa:	8582      	strh	r2, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005bac:	2300      	movs	r3, #0
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8005bae:	2222      	movs	r2, #34	; 0x22
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005bb0:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8005bb2:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 8005bb6:	6802      	ldr	r2, [r0, #0]
    huart->pRxBuffPtr = pData;
 8005bb8:	6281      	str	r1, [r0, #40]	; 0x28
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 8005bba:	68d1      	ldr	r1, [r2, #12]
    __HAL_UNLOCK(huart);
 8005bbc:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 8005bc0:	f441 7180 	orr.w	r1, r1, #256	; 0x100
 8005bc4:	60d1      	str	r1, [r2, #12]
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 8005bc6:	6951      	ldr	r1, [r2, #20]
    return HAL_OK;
 8005bc8:	4618      	mov	r0, r3
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 8005bca:	f041 0101 	orr.w	r1, r1, #1
 8005bce:	6151      	str	r1, [r2, #20]
    __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
 8005bd0:	68d1      	ldr	r1, [r2, #12]
 8005bd2:	f041 0120 	orr.w	r1, r1, #32
 8005bd6:	60d1      	str	r1, [r2, #12]
    return HAL_OK;
 8005bd8:	4770      	bx	lr
      return HAL_ERROR;
 8005bda:	2001      	movs	r0, #1
 8005bdc:	4770      	bx	lr
    return HAL_BUSY;
 8005bde:	2002      	movs	r0, #2
}
 8005be0:	4770      	bx	lr
	...

08005be4 <HAL_UART_Receive_DMA>:
{
 8005be4:	4613      	mov	r3, r2
  if(huart->RxState == HAL_UART_STATE_READY) 
 8005be6:	f890 203a 	ldrb.w	r2, [r0, #58]	; 0x3a
{
 8005bea:	b573      	push	{r0, r1, r4, r5, r6, lr}
  if(huart->RxState == HAL_UART_STATE_READY) 
 8005bec:	2a20      	cmp	r2, #32
{
 8005bee:	4605      	mov	r5, r0
  if(huart->RxState == HAL_UART_STATE_READY) 
 8005bf0:	d138      	bne.n	8005c64 <HAL_UART_Receive_DMA+0x80>
    if((pData == NULL) || (Size == 0U))
 8005bf2:	2900      	cmp	r1, #0
 8005bf4:	d034      	beq.n	8005c60 <HAL_UART_Receive_DMA+0x7c>
 8005bf6:	2b00      	cmp	r3, #0
 8005bf8:	d032      	beq.n	8005c60 <HAL_UART_Receive_DMA+0x7c>
    __HAL_LOCK(huart);
 8005bfa:	f890 2038 	ldrb.w	r2, [r0, #56]	; 0x38
 8005bfe:	2a01      	cmp	r2, #1
 8005c00:	d030      	beq.n	8005c64 <HAL_UART_Receive_DMA+0x80>
 8005c02:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005c04:	2400      	movs	r4, #0
    __HAL_LOCK(huart);
 8005c06:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8005c0a:	2222      	movs	r2, #34	; 0x22
    huart->pRxBuffPtr = pData;
 8005c0c:	6281      	str	r1, [r0, #40]	; 0x28
    huart->RxXferSize = Size;
 8005c0e:	8583      	strh	r3, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005c10:	63c4      	str	r4, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8005c12:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 8005c16:	6b40      	ldr	r0, [r0, #52]	; 0x34
 8005c18:	4a13      	ldr	r2, [pc, #76]	; (8005c68 <HAL_UART_Receive_DMA+0x84>)
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 8005c1a:	682e      	ldr	r6, [r5, #0]
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 8005c1c:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 8005c1e:	4a13      	ldr	r2, [pc, #76]	; (8005c6c <HAL_UART_Receive_DMA+0x88>)
    huart->hdmarx->XferAbortCallback = NULL;
 8005c20:	6344      	str	r4, [r0, #52]	; 0x34
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 8005c22:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmarx->XferErrorCallback = UART_DMAError;
 8005c24:	4a12      	ldr	r2, [pc, #72]	; (8005c70 <HAL_UART_Receive_DMA+0x8c>)
 8005c26:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 8005c28:	460a      	mov	r2, r1
 8005c2a:	1d31      	adds	r1, r6, #4
 8005c2c:	f7fe fbfc 	bl	8004428 <HAL_DMA_Start_IT>
    return HAL_OK;
 8005c30:	4620      	mov	r0, r4
    __HAL_UART_CLEAR_OREFLAG(huart);
 8005c32:	682b      	ldr	r3, [r5, #0]
 8005c34:	9401      	str	r4, [sp, #4]
 8005c36:	681a      	ldr	r2, [r3, #0]
 8005c38:	9201      	str	r2, [sp, #4]
 8005c3a:	685a      	ldr	r2, [r3, #4]
    __HAL_UNLOCK(huart);
 8005c3c:	f885 4038 	strb.w	r4, [r5, #56]	; 0x38
    __HAL_UART_CLEAR_OREFLAG(huart);
 8005c40:	9201      	str	r2, [sp, #4]
 8005c42:	9a01      	ldr	r2, [sp, #4]
    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8005c44:	68da      	ldr	r2, [r3, #12]
 8005c46:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 8005c4a:	60da      	str	r2, [r3, #12]
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8005c4c:	695a      	ldr	r2, [r3, #20]
 8005c4e:	f042 0201 	orr.w	r2, r2, #1
 8005c52:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8005c54:	695a      	ldr	r2, [r3, #20]
 8005c56:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8005c5a:	615a      	str	r2, [r3, #20]
}
 8005c5c:	b002      	add	sp, #8
 8005c5e:	bd70      	pop	{r4, r5, r6, pc}
      return HAL_ERROR;
 8005c60:	2001      	movs	r0, #1
 8005c62:	e7fb      	b.n	8005c5c <HAL_UART_Receive_DMA+0x78>
    return HAL_BUSY;
 8005c64:	2002      	movs	r0, #2
 8005c66:	e7f9      	b.n	8005c5c <HAL_UART_Receive_DMA+0x78>
 8005c68:	08005c77 	.word	0x08005c77
 8005c6c:	08005d2d 	.word	0x08005d2d
 8005c70:	08005d39 	.word	0x08005d39

08005c74 <HAL_UART_TxCpltCallback>:
 8005c74:	4770      	bx	lr

08005c76 <UART_DMAReceiveCplt>:
{
 8005c76:	b508      	push	{r3, lr}
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005c78:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8005c7a:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005c7c:	681b      	ldr	r3, [r3, #0]
 8005c7e:	f013 0320 	ands.w	r3, r3, #32
 8005c82:	d110      	bne.n	8005ca6 <UART_DMAReceiveCplt+0x30>
    huart->RxXferCount = 0U;
 8005c84:	85d3      	strh	r3, [r2, #46]	; 0x2e
    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8005c86:	6813      	ldr	r3, [r2, #0]
 8005c88:	68d9      	ldr	r1, [r3, #12]
 8005c8a:	f421 7180 	bic.w	r1, r1, #256	; 0x100
 8005c8e:	60d9      	str	r1, [r3, #12]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8005c90:	6959      	ldr	r1, [r3, #20]
 8005c92:	f021 0101 	bic.w	r1, r1, #1
 8005c96:	6159      	str	r1, [r3, #20]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8005c98:	6959      	ldr	r1, [r3, #20]
 8005c9a:	f021 0140 	bic.w	r1, r1, #64	; 0x40
 8005c9e:	6159      	str	r1, [r3, #20]
    huart->RxState = HAL_UART_STATE_READY;
 8005ca0:	2320      	movs	r3, #32
 8005ca2:	f882 303a 	strb.w	r3, [r2, #58]	; 0x3a
  HAL_UART_RxCpltCallback(huart);
 8005ca6:	4610      	mov	r0, r2
 8005ca8:	f001 f924 	bl	8006ef4 <HAL_UART_RxCpltCallback>
 8005cac:	bd08      	pop	{r3, pc}

08005cae <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8005cae:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 8005cb2:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8005cb4:	2b22      	cmp	r3, #34	; 0x22
 8005cb6:	d136      	bne.n	8005d26 <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8005cb8:	6883      	ldr	r3, [r0, #8]
 8005cba:	6901      	ldr	r1, [r0, #16]
 8005cbc:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 8005cc0:	6802      	ldr	r2, [r0, #0]
 8005cc2:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005cc4:	d123      	bne.n	8005d0e <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8005cc6:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8005cc8:	b9e9      	cbnz	r1, 8005d06 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8005cca:	f3c2 0208 	ubfx	r2, r2, #0, #9
 8005cce:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 8005cd2:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 8005cd4:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 8005cd6:	3c01      	subs	r4, #1
 8005cd8:	b2a4      	uxth	r4, r4
 8005cda:	85c4      	strh	r4, [r0, #46]	; 0x2e
 8005cdc:	b98c      	cbnz	r4, 8005d02 <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 8005cde:	6803      	ldr	r3, [r0, #0]
 8005ce0:	68da      	ldr	r2, [r3, #12]
 8005ce2:	f022 0220 	bic.w	r2, r2, #32
 8005ce6:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 8005ce8:	68da      	ldr	r2, [r3, #12]
 8005cea:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 8005cee:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 8005cf0:	695a      	ldr	r2, [r3, #20]
 8005cf2:	f022 0201 	bic.w	r2, r2, #1
 8005cf6:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 8005cf8:	2320      	movs	r3, #32
 8005cfa:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 8005cfe:	f001 f8f9 	bl	8006ef4 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 8005d02:	2000      	movs	r0, #0
}
 8005d04:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8005d06:	b2d2      	uxtb	r2, r2
 8005d08:	f823 2b01 	strh.w	r2, [r3], #1
 8005d0c:	e7e1      	b.n	8005cd2 <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8005d0e:	b921      	cbnz	r1, 8005d1a <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 8005d10:	1c59      	adds	r1, r3, #1
 8005d12:	6852      	ldr	r2, [r2, #4]
 8005d14:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8005d16:	701a      	strb	r2, [r3, #0]
 8005d18:	e7dc      	b.n	8005cd4 <UART_Receive_IT+0x26>
 8005d1a:	6852      	ldr	r2, [r2, #4]
 8005d1c:	1c59      	adds	r1, r3, #1
 8005d1e:	6281      	str	r1, [r0, #40]	; 0x28
 8005d20:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8005d24:	e7f7      	b.n	8005d16 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8005d26:	2002      	movs	r0, #2
 8005d28:	bd10      	pop	{r4, pc}

08005d2a <HAL_UART_RxHalfCpltCallback>:
 8005d2a:	4770      	bx	lr

08005d2c <UART_DMARxHalfCplt>:
{
 8005d2c:	b508      	push	{r3, lr}
  HAL_UART_RxHalfCpltCallback(huart); 
 8005d2e:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8005d30:	f7ff fffb 	bl	8005d2a <HAL_UART_RxHalfCpltCallback>
 8005d34:	bd08      	pop	{r3, pc}

08005d36 <HAL_UART_ErrorCallback>:
 8005d36:	4770      	bx	lr

08005d38 <UART_DMAError>:
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8005d38:	6a41      	ldr	r1, [r0, #36]	; 0x24
{
 8005d3a:	b508      	push	{r3, lr}
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
 8005d3c:	680b      	ldr	r3, [r1, #0]
 8005d3e:	695a      	ldr	r2, [r3, #20]
  if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
 8005d40:	f891 0039 	ldrb.w	r0, [r1, #57]	; 0x39
 8005d44:	2821      	cmp	r0, #33	; 0x21
 8005d46:	d10a      	bne.n	8005d5e <UART_DMAError+0x26>
 8005d48:	0612      	lsls	r2, r2, #24
 8005d4a:	d508      	bpl.n	8005d5e <UART_DMAError+0x26>
    huart->TxXferCount = 0U;
 8005d4c:	2200      	movs	r2, #0
 8005d4e:	84ca      	strh	r2, [r1, #38]	; 0x26
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
 8005d50:	68da      	ldr	r2, [r3, #12]
 8005d52:	f022 02c0 	bic.w	r2, r2, #192	; 0xc0
 8005d56:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8005d58:	2220      	movs	r2, #32
 8005d5a:	f881 2039 	strb.w	r2, [r1, #57]	; 0x39
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 
 8005d5e:	695b      	ldr	r3, [r3, #20]
  if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
 8005d60:	f891 203a 	ldrb.w	r2, [r1, #58]	; 0x3a
 8005d64:	2a22      	cmp	r2, #34	; 0x22
 8005d66:	d106      	bne.n	8005d76 <UART_DMAError+0x3e>
 8005d68:	065b      	lsls	r3, r3, #25
 8005d6a:	d504      	bpl.n	8005d76 <UART_DMAError+0x3e>
    huart->RxXferCount = 0U;
 8005d6c:	2300      	movs	r3, #0
    UART_EndRxTransfer(huart);
 8005d6e:	4608      	mov	r0, r1
    huart->RxXferCount = 0U;
 8005d70:	85cb      	strh	r3, [r1, #46]	; 0x2e
    UART_EndRxTransfer(huart);
 8005d72:	f7ff fdb1 	bl	80058d8 <UART_EndRxTransfer>
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8005d76:	6bcb      	ldr	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8005d78:	4608      	mov	r0, r1
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8005d7a:	f043 0310 	orr.w	r3, r3, #16
 8005d7e:	63cb      	str	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8005d80:	f7ff ffd9 	bl	8005d36 <HAL_UART_ErrorCallback>
 8005d84:	bd08      	pop	{r3, pc}
	...

08005d88 <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8005d88:	6803      	ldr	r3, [r0, #0]
{
 8005d8a:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8005d8c:	681a      	ldr	r2, [r3, #0]
{
 8005d8e:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8005d90:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8005d92:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8005d94:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 8005d96:	d107      	bne.n	8005da8 <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8005d98:	0696      	lsls	r6, r2, #26
 8005d9a:	d55a      	bpl.n	8005e52 <HAL_UART_IRQHandler+0xca>
 8005d9c:	068d      	lsls	r5, r1, #26
 8005d9e:	d558      	bpl.n	8005e52 <HAL_UART_IRQHandler+0xca>
}
 8005da0:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8005da4:	f7ff bf83 	b.w	8005cae <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 8005da8:	f015 0501 	ands.w	r5, r5, #1
 8005dac:	d102      	bne.n	8005db4 <HAL_UART_IRQHandler+0x2c>
 8005dae:	f411 7f90 	tst.w	r1, #288	; 0x120
 8005db2:	d04e      	beq.n	8005e52 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 8005db4:	07d3      	lsls	r3, r2, #31
 8005db6:	d505      	bpl.n	8005dc4 <HAL_UART_IRQHandler+0x3c>
 8005db8:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 8005dba:	bf42      	ittt	mi
 8005dbc:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 8005dbe:	f043 0301 	orrmi.w	r3, r3, #1
 8005dc2:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8005dc4:	0750      	lsls	r0, r2, #29
 8005dc6:	d504      	bpl.n	8005dd2 <HAL_UART_IRQHandler+0x4a>
 8005dc8:	b11d      	cbz	r5, 8005dd2 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 8005dca:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8005dcc:	f043 0302 	orr.w	r3, r3, #2
 8005dd0:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8005dd2:	0793      	lsls	r3, r2, #30
 8005dd4:	d504      	bpl.n	8005de0 <HAL_UART_IRQHandler+0x58>
 8005dd6:	b11d      	cbz	r5, 8005de0 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 8005dd8:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8005dda:	f043 0304 	orr.w	r3, r3, #4
 8005dde:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8005de0:	0716      	lsls	r6, r2, #28
 8005de2:	d504      	bpl.n	8005dee <HAL_UART_IRQHandler+0x66>
 8005de4:	b11d      	cbz	r5, 8005dee <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 8005de6:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8005de8:	f043 0308 	orr.w	r3, r3, #8
 8005dec:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 8005dee:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8005df0:	2b00      	cmp	r3, #0
 8005df2:	d066      	beq.n	8005ec2 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8005df4:	0695      	lsls	r5, r2, #26
 8005df6:	d504      	bpl.n	8005e02 <HAL_UART_IRQHandler+0x7a>
 8005df8:	0688      	lsls	r0, r1, #26
 8005dfa:	d502      	bpl.n	8005e02 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 8005dfc:	4620      	mov	r0, r4
 8005dfe:	f7ff ff56 	bl	8005cae <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8005e02:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 8005e04:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8005e06:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 8005e08:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 8005e0a:	0711      	lsls	r1, r2, #28
 8005e0c:	d402      	bmi.n	8005e14 <HAL_UART_IRQHandler+0x8c>
 8005e0e:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 8005e12:	d01a      	beq.n	8005e4a <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8005e14:	f7ff fd60 	bl	80058d8 <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 8005e18:	6823      	ldr	r3, [r4, #0]
 8005e1a:	695a      	ldr	r2, [r3, #20]
 8005e1c:	0652      	lsls	r2, r2, #25
 8005e1e:	d510      	bpl.n	8005e42 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8005e20:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8005e22:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8005e24:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8005e28:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8005e2a:	b150      	cbz	r0, 8005e42 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 8005e2c:	4b25      	ldr	r3, [pc, #148]	; (8005ec4 <HAL_UART_IRQHandler+0x13c>)
 8005e2e:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 8005e30:	f7fe fb38 	bl	80044a4 <HAL_DMA_Abort_IT>
 8005e34:	2800      	cmp	r0, #0
 8005e36:	d044      	beq.n	8005ec2 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8005e38:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 8005e3a:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8005e3e:	6b43      	ldr	r3, [r0, #52]	; 0x34
 8005e40:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 8005e42:	4620      	mov	r0, r4
 8005e44:	f7ff ff77 	bl	8005d36 <HAL_UART_ErrorCallback>
 8005e48:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 8005e4a:	f7ff ff74 	bl	8005d36 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 8005e4e:	63e5      	str	r5, [r4, #60]	; 0x3c
 8005e50:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 8005e52:	0616      	lsls	r6, r2, #24
 8005e54:	d527      	bpl.n	8005ea6 <HAL_UART_IRQHandler+0x11e>
 8005e56:	060d      	lsls	r5, r1, #24
 8005e58:	d525      	bpl.n	8005ea6 <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 8005e5a:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8005e5e:	2a21      	cmp	r2, #33	; 0x21
 8005e60:	d12f      	bne.n	8005ec2 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8005e62:	68a2      	ldr	r2, [r4, #8]
 8005e64:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8005e68:	6a22      	ldr	r2, [r4, #32]
 8005e6a:	d117      	bne.n	8005e9c <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 8005e6c:	8811      	ldrh	r1, [r2, #0]
 8005e6e:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8005e72:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8005e74:	6921      	ldr	r1, [r4, #16]
 8005e76:	b979      	cbnz	r1, 8005e98 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8005e78:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 8005e7a:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 8005e7c:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 8005e7e:	3a01      	subs	r2, #1
 8005e80:	b292      	uxth	r2, r2
 8005e82:	84e2      	strh	r2, [r4, #38]	; 0x26
 8005e84:	b9ea      	cbnz	r2, 8005ec2 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 8005e86:	68da      	ldr	r2, [r3, #12]
 8005e88:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8005e8c:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 8005e8e:	68da      	ldr	r2, [r3, #12]
 8005e90:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8005e94:	60da      	str	r2, [r3, #12]
 8005e96:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 8005e98:	3201      	adds	r2, #1
 8005e9a:	e7ee      	b.n	8005e7a <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 8005e9c:	1c51      	adds	r1, r2, #1
 8005e9e:	6221      	str	r1, [r4, #32]
 8005ea0:	7812      	ldrb	r2, [r2, #0]
 8005ea2:	605a      	str	r2, [r3, #4]
 8005ea4:	e7ea      	b.n	8005e7c <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 8005ea6:	0650      	lsls	r0, r2, #25
 8005ea8:	d50b      	bpl.n	8005ec2 <HAL_UART_IRQHandler+0x13a>
 8005eaa:	064a      	lsls	r2, r1, #25
 8005eac:	d509      	bpl.n	8005ec2 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8005eae:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8005eb0:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8005eb2:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8005eb6:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8005eb8:	2320      	movs	r3, #32
 8005eba:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 8005ebe:	f7ff fed9 	bl	8005c74 <HAL_UART_TxCpltCallback>
 8005ec2:	bd70      	pop	{r4, r5, r6, pc}
 8005ec4:	08005ec9 	.word	0x08005ec9

08005ec8 <UART_DMAAbortOnError>:
{
 8005ec8:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 8005eca:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8005ecc:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 8005ece:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 8005ed0:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 8005ed2:	f7ff ff30 	bl	8005d36 <HAL_UART_ErrorCallback>
 8005ed6:	bd08      	pop	{r3, pc}

08005ed8 <SPI_Delay>:

void SPI_Delay(int ustime)
{
	volatile int i;
	volatile int k;
	for(i = 0; i < ustime; i++)
 8005ed8:	2300      	movs	r3, #0
{
 8005eda:	b082      	sub	sp, #8
	for(i = 0; i < ustime; i++)
 8005edc:	9300      	str	r3, [sp, #0]
 8005ede:	9b00      	ldr	r3, [sp, #0]
 8005ee0:	4283      	cmp	r3, r0
 8005ee2:	db01      	blt.n	8005ee8 <SPI_Delay+0x10>
	{
		k++;
	}
}
 8005ee4:	b002      	add	sp, #8
 8005ee6:	4770      	bx	lr
		k++;
 8005ee8:	9b01      	ldr	r3, [sp, #4]
 8005eea:	3301      	adds	r3, #1
 8005eec:	9301      	str	r3, [sp, #4]
	for(i = 0; i < ustime; i++)
 8005eee:	9b00      	ldr	r3, [sp, #0]
 8005ef0:	3301      	adds	r3, #1
 8005ef2:	e7f3      	b.n	8005edc <SPI_Delay+0x4>

08005ef4 <SpiInOut>:

#if 1 // PYJ.2019.04.02_BEGIN -- 
#ifdef STM32F1
void SpiInOut(uint8_t addr_write)
{
 8005ef4:	b570      	push	{r4, r5, r6, lr}
 8005ef6:	4605      	mov	r5, r0
 8005ef8:	2408      	movs	r4, #8

    for (i = 0; i < 8; i++)
    {
        SPI_Delay(SDA_SETUP_TIME);

        Clr_SX1278_SCK();
 8005efa:	4e14      	ldr	r6, [pc, #80]	; (8005f4c <SpiInOut+0x58>)
        SPI_Delay(SDA_SETUP_TIME);
 8005efc:	2004      	movs	r0, #4
 8005efe:	f7ff ffeb 	bl	8005ed8 <SPI_Delay>
        Clr_SX1278_SCK();
 8005f02:	2200      	movs	r2, #0
 8005f04:	2108      	movs	r1, #8
 8005f06:	4630      	mov	r0, r6
 8005f08:	f7fe fd08 	bl	800491c <HAL_GPIO_WritePin>
        if (addr_write & 0x80)
 8005f0c:	062b      	lsls	r3, r5, #24
        {
            Set_SX1278_SDI();
 8005f0e:	bf4c      	ite	mi
 8005f10:	2201      	movmi	r2, #1
        }
        else
        {
            Clr_SX1278_SDI();
 8005f12:	2200      	movpl	r2, #0
 8005f14:	2120      	movs	r1, #32
 8005f16:	4630      	mov	r0, r6
 8005f18:	f7fe fd00 	bl	800491c <HAL_GPIO_WritePin>
        }
        SPI_Delay(SDA_SETUP_TIME);
 8005f1c:	2004      	movs	r0, #4
 8005f1e:	f7ff ffdb 	bl	8005ed8 <SPI_Delay>

        Set_SX1278_SCK();
 8005f22:	2201      	movs	r2, #1
 8005f24:	2108      	movs	r1, #8
 8005f26:	4630      	mov	r0, r6
 8005f28:	f7fe fcf8 	bl	800491c <HAL_GPIO_WritePin>
 8005f2c:	3c01      	subs	r4, #1
        addr_write = addr_write << 1;
        SPI_Delay(SDA_SETUP_TIME);
 8005f2e:	2004      	movs	r0, #4
        addr_write = addr_write << 1;
 8005f30:	006d      	lsls	r5, r5, #1
        SPI_Delay(SDA_SETUP_TIME);
 8005f32:	f7ff ffd1 	bl	8005ed8 <SPI_Delay>
    for (i = 0; i < 8; i++)
 8005f36:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
        addr_write = addr_write << 1;
 8005f3a:	b2ed      	uxtb	r5, r5
    for (i = 0; i < 8; i++)
 8005f3c:	d1de      	bne.n	8005efc <SpiInOut+0x8>
    }
    Clr_SX1278_SCK();
 8005f3e:	4622      	mov	r2, r4
 
}
 8005f40:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    Clr_SX1278_SCK();
 8005f44:	2108      	movs	r1, #8
 8005f46:	4801      	ldr	r0, [pc, #4]	; (8005f4c <SpiInOut+0x58>)
 8005f48:	f7fe bce8 	b.w	800491c <HAL_GPIO_WritePin>
 8005f4c:	40010c00 	.word	0x40010c00

08005f50 <SpiRead>:
uint8_t SpiRead(void)
{
 8005f50:	b570      	push	{r4, r5, r6, lr}
 8005f52:	2508      	movs	r5, #8
 
    uint8_t i = 0,Readdata = 0;
 8005f54:	2400      	movs	r4, #0
 
    for (i = 0; i < 8; i++)   
    {
        Readdata <<= 1;
        SPI_Delay(SDA_SETUP_TIME);
        Set_SX1278_SCK();
 8005f56:	4e10      	ldr	r6, [pc, #64]	; (8005f98 <SpiRead+0x48>)
        SPI_Delay(SDA_SETUP_TIME);
 8005f58:	2004      	movs	r0, #4
 8005f5a:	f7ff ffbd 	bl	8005ed8 <SPI_Delay>
        Set_SX1278_SCK();
 8005f5e:	2108      	movs	r1, #8
 8005f60:	4630      	mov	r0, r6
 8005f62:	2201      	movs	r2, #1
 8005f64:	f7fe fcda 	bl	800491c <HAL_GPIO_WritePin>
        Readdata <<= 1;
 8005f68:	0064      	lsls	r4, r4, #1
        if (Read_SX1278_SDO())
 8005f6a:	2110      	movs	r1, #16
 8005f6c:	4630      	mov	r0, r6
        Readdata <<= 1;
 8005f6e:	b2e4      	uxtb	r4, r4
        if (Read_SX1278_SDO())
 8005f70:	f7fe fcce 	bl	8004910 <HAL_GPIO_ReadPin>
 8005f74:	b108      	cbz	r0, 8005f7a <SpiRead+0x2a>
            Readdata |= 0x01;
 8005f76:	f044 0401 	orr.w	r4, r4, #1
        else
            Readdata &= 0xfe;
        SPI_Delay(SDA_SETUP_TIME);
 8005f7a:	2004      	movs	r0, #4
 8005f7c:	f7ff ffac 	bl	8005ed8 <SPI_Delay>
 8005f80:	3d01      	subs	r5, #1
        Clr_SX1278_SCK();
 8005f82:	2200      	movs	r2, #0
 8005f84:	2108      	movs	r1, #8
 8005f86:	4630      	mov	r0, r6
 8005f88:	f7fe fcc8 	bl	800491c <HAL_GPIO_WritePin>
    for (i = 0; i < 8; i++)   
 8005f8c:	f015 05ff 	ands.w	r5, r5, #255	; 0xff
 8005f90:	d1e2      	bne.n	8005f58 <SpiRead+0x8>
    }
    
    return Readdata;
}
 8005f92:	4620      	mov	r0, r4
 8005f94:	bd70      	pop	{r4, r5, r6, pc}
 8005f96:	bf00      	nop
 8005f98:	40010c00 	.word	0x40010c00

08005f9c <BLUECELL_SPI_Transmit>:
//	Lora_MOSI_SET;
//	SPI_Delay(SDA_SETUP_TIME);
}
#else
void BLUECELL_SPI_Transmit(uint8_t data) {
    SpiInOut(data);
 8005f9c:	f7ff bfaa 	b.w	8005ef4 <SpiInOut>

08005fa0 <M24C32_Data_Write>:
    }  
}



void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){
 8005fa0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8005fa4:	4606      	mov	r6, r0
 8005fa6:	460f      	mov	r7, r1
 8005fa8:	4690      	mov	r8, r2
 8005faa:	461d      	mov	r5, r3
    HAL_StatusTypeDef status = HAL_ERROR;
    for(uint8_t i = 0; i < size; i++){
 8005fac:	2400      	movs	r4, #0
        status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000);
 8005fae:	f44f 69fa 	mov.w	r9, #2000	; 0x7d0
 8005fb2:	f04f 0a01 	mov.w	sl, #1
        HAL_Delay(5);
        if(status > HAL_OK)
            printf("EEPROM SAVE ERROR!!! \n");
 8005fb6:	f8df b040 	ldr.w	fp, [pc, #64]	; 8005ff8 <M24C32_Data_Write+0x58>
void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){
 8005fba:	b087      	sub	sp, #28
    for(uint8_t i = 0; i < size; i++){
 8005fbc:	42ac      	cmp	r4, r5
 8005fbe:	d102      	bne.n	8005fc6 <M24C32_Data_Write+0x26>
    }
   // I2c_Status_Check(status);
}
 8005fc0:	b007      	add	sp, #28
 8005fc2:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000);
 8005fc6:	193b      	adds	r3, r7, r4
 8005fc8:	eb08 0204 	add.w	r2, r8, r4
 8005fcc:	9300      	str	r3, [sp, #0]
 8005fce:	b292      	uxth	r2, r2
 8005fd0:	2310      	movs	r3, #16
 8005fd2:	21a0      	movs	r1, #160	; 0xa0
 8005fd4:	f8cd 9008 	str.w	r9, [sp, #8]
 8005fd8:	f8cd a004 	str.w	sl, [sp, #4]
 8005fdc:	4630      	mov	r0, r6
 8005fde:	f7fe feef 	bl	8004dc0 <HAL_I2C_Mem_Write>
 8005fe2:	9005      	str	r0, [sp, #20]
        HAL_Delay(5);
 8005fe4:	2005      	movs	r0, #5
 8005fe6:	f7fe f965 	bl	80042b4 <HAL_Delay>
        if(status > HAL_OK)
 8005fea:	9b05      	ldr	r3, [sp, #20]
 8005fec:	b113      	cbz	r3, 8005ff4 <M24C32_Data_Write+0x54>
            printf("EEPROM SAVE ERROR!!! \n");
 8005fee:	4658      	mov	r0, fp
 8005ff0:	f001 febc 	bl	8007d6c <puts>
 8005ff4:	3401      	adds	r4, #1
 8005ff6:	e7e1      	b.n	8005fbc <M24C32_Data_Write+0x1c>
 8005ff8:	08008d64 	.word	0x08008d64

08005ffc <M24C32_Data_Read>:
uint8_t M24C32_Data_Read(I2C_HandleTypeDef* hi2cx,uint16_t address){
 8005ffc:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
    uint8_t data[1] = {0};
 8005ffe:	2200      	movs	r2, #0
 8006000:	ab06      	add	r3, sp, #24
 8006002:	f803 2d04 	strb.w	r2, [r3, #-4]!
    HAL_StatusTypeDef status = HAL_ERROR;
    status = HAL_I2C_Mem_Read(hi2cx,0xA1, address,I2C_MEMADD_SIZE_16BIT, &data[0],1, 2000);
 8006006:	f44f 62fa 	mov.w	r2, #2000	; 0x7d0
 800600a:	9202      	str	r2, [sp, #8]
 800600c:	2201      	movs	r2, #1
 800600e:	9300      	str	r3, [sp, #0]
 8006010:	9201      	str	r2, [sp, #4]
 8006012:	2310      	movs	r3, #16
 8006014:	460a      	mov	r2, r1
 8006016:	21a1      	movs	r1, #161	; 0xa1
 8006018:	f7fe ff68 	bl	8004eec <HAL_I2C_Mem_Read>
  //  I2c_Status_Check(status);
//    printf("Readdata[0] : %02x\n",data);
    return data[0];
}
 800601c:	f89d 0014 	ldrb.w	r0, [sp, #20]
 8006020:	b007      	add	sp, #28
 8006022:	f85d fb04 	ldr.w	pc, [sp], #4
	...

08006028 <RGB_Limit_Address_Check>:
        Default_SX1276.LoRa_BW   = M24C32_Data_Read(&hi2c2,RGB_LORA_BANDWIDTH_ADDRESS);
        Default_SX1276.LoRa_Lna  = M24C32_Data_Read(&hi2c2,RGB_LORA_LNA_ADDRESS);
    }

}
uint16_t RGB_Limit_Address_Check(uint8_t id){
 8006028:	3801      	subs	r0, #1
 800602a:	b2c0      	uxtb	r0, r0
 800602c:	2807      	cmp	r0, #7
 800602e:	bf9a      	itte	ls
 8006030:	4b01      	ldrls	r3, [pc, #4]	; (8006038 <RGB_Limit_Address_Check+0x10>)
 8006032:	5c18      	ldrbls	r0, [r3, r0]
 8006034:	2000      	movhi	r0, #0
        case 6: ret = RGB6_LIMIT_RED_H_ADDRESS;break;
        case 7: ret = RGB7_LIMIT_RED_H_ADDRESS;break;
        case 8: ret = RGB8_LIMIT_RED_H_ADDRESS;break;        
    }
    return ret;
}
 8006036:	4770      	bx	lr
 8006038:	08008d7a 	.word	0x08008d7a

0800603c <RGB_Location_Address_Check>:
uint16_t RGB_Location_Address_Check(uint8_t id){
 800603c:	3801      	subs	r0, #1
 800603e:	b2c0      	uxtb	r0, r0
 8006040:	2807      	cmp	r0, #7
 8006042:	bf9a      	itte	ls
 8006044:	4b02      	ldrls	r3, [pc, #8]	; (8006050 <RGB_Location_Address_Check+0x14>)
 8006046:	f833 0010 	ldrhls.w	r0, [r3, r0, lsl #1]
 800604a:	2000      	movhi	r0, #0
        case 6: ret = RGB6_LOCATION_ADDRESS;break;
        case 7: ret = RGB7_LOCATION_ADDRESS;break;
        case 8: ret = RGB8_LOCATION_ADDRESS;break;        
    }
    return ret;
}
 800604c:	4770      	bx	lr
 800604e:	bf00      	nop
 8006050:	08008d82 	.word	0x08008d82

08006054 <RGB_Data_Init>:
void RGB_Data_Init(void){
 8006054:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS);
 8006058:	2100      	movs	r1, #0
 800605a:	485c      	ldr	r0, [pc, #368]	; (80061cc <RGB_Data_Init+0x178>)
 800605c:	4e5c      	ldr	r6, [pc, #368]	; (80061d0 <RGB_Data_Init+0x17c>)
 800605e:	f7ff ffcd 	bl	8005ffc <M24C32_Data_Read>
 8006062:	2401      	movs	r4, #1
 8006064:	46b0      	mov	r8, r6
 8006066:	4d5b      	ldr	r5, [pc, #364]	; (80061d4 <RGB_Data_Init+0x180>)
        RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8);
 8006068:	4f58      	ldr	r7, [pc, #352]	; (80061cc <RGB_Data_Init+0x178>)
    MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS);
 800606a:	7028      	strb	r0, [r5, #0]
        RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8);
 800606c:	4621      	mov	r1, r4
 800606e:	4638      	mov	r0, r7
 8006070:	f7ff ffc4 	bl	8005ffc <M24C32_Data_Read>
        RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i));
 8006074:	1c61      	adds	r1, r4, #1
        RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8);
 8006076:	0200      	lsls	r0, r0, #8
 8006078:	8070      	strh	r0, [r6, #2]
        RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i));
 800607a:	b289      	uxth	r1, r1
 800607c:	4638      	mov	r0, r7
 800607e:	f7ff ffbd 	bl	8005ffc <M24C32_Data_Read>
 8006082:	3406      	adds	r4, #6
 8006084:	8873      	ldrh	r3, [r6, #2]
 8006086:	b2a4      	uxth	r4, r4
 8006088:	4318      	orrs	r0, r3
    for(uint8_t i = 0; i < 8; i++){
 800608a:	2c31      	cmp	r4, #49	; 0x31
        RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i));
 800608c:	f826 0f02 	strh.w	r0, [r6, #2]!
    for(uint8_t i = 0; i < 8; i++){
 8006090:	d1ec      	bne.n	800606c <RGB_Data_Init+0x18>
 8006092:	f8df 9158 	ldr.w	r9, [pc, #344]	; 80061ec <RGB_Data_Init+0x198>
 8006096:	2403      	movs	r4, #3
 8006098:	464f      	mov	r7, r9
        RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8);
 800609a:	4e4c      	ldr	r6, [pc, #304]	; (80061cc <RGB_Data_Init+0x178>)
 800609c:	4621      	mov	r1, r4
 800609e:	4630      	mov	r0, r6
 80060a0:	f7ff ffac 	bl	8005ffc <M24C32_Data_Read>
        RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i));
 80060a4:	1c61      	adds	r1, r4, #1
        RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8);
 80060a6:	0200      	lsls	r0, r0, #8
 80060a8:	f8a9 0002 	strh.w	r0, [r9, #2]
        RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i));
 80060ac:	b289      	uxth	r1, r1
 80060ae:	4630      	mov	r0, r6
 80060b0:	f7ff ffa4 	bl	8005ffc <M24C32_Data_Read>
 80060b4:	3406      	adds	r4, #6
 80060b6:	f8b9 3002 	ldrh.w	r3, [r9, #2]
 80060ba:	b2a4      	uxth	r4, r4
 80060bc:	4318      	orrs	r0, r3
    for(uint8_t i = 0; i < 8; i++){
 80060be:	2c33      	cmp	r4, #51	; 0x33
        RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i));
 80060c0:	f829 0f02 	strh.w	r0, [r9, #2]!
    for(uint8_t i = 0; i < 8; i++){
 80060c4:	d1ea      	bne.n	800609c <RGB_Data_Init+0x48>
 80060c6:	f8df 9128 	ldr.w	r9, [pc, #296]	; 80061f0 <RGB_Data_Init+0x19c>
 80060ca:	2405      	movs	r4, #5
 80060cc:	46cb      	mov	fp, r9
        RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8);
 80060ce:	4e3f      	ldr	r6, [pc, #252]	; (80061cc <RGB_Data_Init+0x178>)
 80060d0:	4621      	mov	r1, r4
 80060d2:	4630      	mov	r0, r6
 80060d4:	f7ff ff92 	bl	8005ffc <M24C32_Data_Read>
        RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i));
 80060d8:	1c61      	adds	r1, r4, #1
        RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8);
 80060da:	0200      	lsls	r0, r0, #8
 80060dc:	f8a9 0002 	strh.w	r0, [r9, #2]
        RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i));
 80060e0:	b289      	uxth	r1, r1
 80060e2:	4630      	mov	r0, r6
 80060e4:	f7ff ff8a 	bl	8005ffc <M24C32_Data_Read>
 80060e8:	3406      	adds	r4, #6
 80060ea:	f8b9 3002 	ldrh.w	r3, [r9, #2]
 80060ee:	b2a4      	uxth	r4, r4
 80060f0:	4318      	orrs	r0, r3
    for(uint8_t i = 0; i < 8; i++){
 80060f2:	2c35      	cmp	r4, #53	; 0x35
        RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i));
 80060f4:	f829 0f02 	strh.w	r0, [r9, #2]!
    for(uint8_t i = 0; i < 8; i++){
 80060f8:	d1ea      	bne.n	80060d0 <RGB_Data_Init+0x7c>
 80060fa:	2400      	movs	r4, #0
 80060fc:	f04f 0932 	mov.w	r9, #50	; 0x32
            RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa);
 8006100:	1c66      	adds	r6, r4, #1
 8006102:	b2f0      	uxtb	r0, r6
 8006104:	f7ff ff9a 	bl	800603c <RGB_Location_Address_Check>
 8006108:	f04f 0a00 	mov.w	sl, #0
 800610c:	4602      	mov	r2, r0
 800610e:	fb09 f404 	mul.w	r4, r9, r4
 8006112:	eb02 010a 	add.w	r1, r2, sl
 8006116:	b289      	uxth	r1, r1
 8006118:	482c      	ldr	r0, [pc, #176]	; (80061cc <RGB_Data_Init+0x178>)
 800611a:	9201      	str	r2, [sp, #4]
 800611c:	f7ff ff6e 	bl	8005ffc <M24C32_Data_Read>
 8006120:	4b2d      	ldr	r3, [pc, #180]	; (80061d8 <RGB_Data_Init+0x184>)
 8006122:	eb0a 0104 	add.w	r1, sl, r4
 8006126:	f10a 0a01 	add.w	sl, sl, #1
 800612a:	4419      	add	r1, r3
        for(uint8_t aa= 0; aa < 50; aa++)
 800612c:	f1ba 0f32 	cmp.w	sl, #50	; 0x32
            RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa);
 8006130:	f881 0032 	strb.w	r0, [r1, #50]	; 0x32
        for(uint8_t aa= 0; aa < 50; aa++)
 8006134:	9a01      	ldr	r2, [sp, #4]
 8006136:	d1ec      	bne.n	8006112 <RGB_Data_Init+0xbe>
    for(uint8_t i = 0; i < 8; i++){
 8006138:	2e08      	cmp	r6, #8
 800613a:	4634      	mov	r4, r6
 800613c:	d1e0      	bne.n	8006100 <RGB_Data_Init+0xac>
    printf("MY id is %d \n",MyControllerID);
 800613e:	7829      	ldrb	r1, [r5, #0]
 8006140:	4826      	ldr	r0, [pc, #152]	; (80061dc <RGB_Data_Init+0x188>)
 8006142:	f001 fd9f 	bl	8007c84 <iprintf>
 8006146:	2401      	movs	r4, #1
        printf("RGB_SensorRedLimit_Buf[%d]    :  %04x\n",i,RGB_SensorRedLimit_Buf[i]);
 8006148:	f8df 90a8 	ldr.w	r9, [pc, #168]	; 80061f4 <RGB_Data_Init+0x1a0>
        printf("RGB_SensorGreenLimit_Buf[%d]  :  %04x\n",i,RGB_SensorGreenLimit_Buf[i]);
 800614c:	4e24      	ldr	r6, [pc, #144]	; (80061e0 <RGB_Data_Init+0x18c>)
        printf("RGB_SensorBlueLimit_Buf[%d]   :  %04x\n",i,RGB_SensorBlueLimit_Buf[i]);    
 800614e:	4d25      	ldr	r5, [pc, #148]	; (80061e4 <RGB_Data_Init+0x190>)
        printf("RGB_SensorRedLimit_Buf[%d]    :  %04x\n",i,RGB_SensorRedLimit_Buf[i]);
 8006150:	f838 2014 	ldrh.w	r2, [r8, r4, lsl #1]
 8006154:	4621      	mov	r1, r4
 8006156:	4648      	mov	r0, r9
 8006158:	f001 fd94 	bl	8007c84 <iprintf>
        printf("RGB_SensorGreenLimit_Buf[%d]  :  %04x\n",i,RGB_SensorGreenLimit_Buf[i]);
 800615c:	f837 2014 	ldrh.w	r2, [r7, r4, lsl #1]
 8006160:	4621      	mov	r1, r4
 8006162:	4630      	mov	r0, r6
 8006164:	f001 fd8e 	bl	8007c84 <iprintf>
        printf("RGB_SensorBlueLimit_Buf[%d]   :  %04x\n",i,RGB_SensorBlueLimit_Buf[i]);    
 8006168:	f83b 2014 	ldrh.w	r2, [fp, r4, lsl #1]
 800616c:	4621      	mov	r1, r4
 800616e:	4628      	mov	r0, r5
 8006170:	3401      	adds	r4, #1
 8006172:	f001 fd87 	bl	8007c84 <iprintf>
    for(uint8_t i = 1; i <= 8; i++){
 8006176:	2c09      	cmp	r4, #9
 8006178:	d1ea      	bne.n	8006150 <RGB_Data_Init+0xfc>
    if(M24C32_Data_Read(&hi2c2,RGB_LORA_FREQ_ADDRESS) == 0xFF){
 800617a:	f44f 71e1 	mov.w	r1, #450	; 0x1c2
 800617e:	4813      	ldr	r0, [pc, #76]	; (80061cc <RGB_Data_Init+0x178>)
 8006180:	f7ff ff3c 	bl	8005ffc <M24C32_Data_Read>
 8006184:	28ff      	cmp	r0, #255	; 0xff
 8006186:	d01e      	beq.n	80061c6 <RGB_Data_Init+0x172>
        Default_SX1276.frequency = M24C32_Data_Read(&hi2c2,RGB_LORA_FREQ_ADDRESS);
 8006188:	f44f 71e1 	mov.w	r1, #450	; 0x1c2
 800618c:	480f      	ldr	r0, [pc, #60]	; (80061cc <RGB_Data_Init+0x178>)
 800618e:	f7ff ff35 	bl	8005ffc <M24C32_Data_Read>
 8006192:	4c15      	ldr	r4, [pc, #84]	; (80061e8 <RGB_Data_Init+0x194>)
        Default_SX1276.power     = M24C32_Data_Read(&hi2c2,RGB_LORA_PABOOST_ADDRESS);
 8006194:	f240 11c3 	movw	r1, #451	; 0x1c3
        Default_SX1276.frequency = M24C32_Data_Read(&hi2c2,RGB_LORA_FREQ_ADDRESS);
 8006198:	7020      	strb	r0, [r4, #0]
        Default_SX1276.power     = M24C32_Data_Read(&hi2c2,RGB_LORA_PABOOST_ADDRESS);
 800619a:	480c      	ldr	r0, [pc, #48]	; (80061cc <RGB_Data_Init+0x178>)
 800619c:	f7ff ff2e 	bl	8005ffc <M24C32_Data_Read>
        Default_SX1276.LoRa_Rate = M24C32_Data_Read(&hi2c2,RGB_LORA_SF_ADDRESS);
 80061a0:	f44f 71e2 	mov.w	r1, #452	; 0x1c4
        Default_SX1276.power     = M24C32_Data_Read(&hi2c2,RGB_LORA_PABOOST_ADDRESS);
 80061a4:	7060      	strb	r0, [r4, #1]
        Default_SX1276.LoRa_Rate = M24C32_Data_Read(&hi2c2,RGB_LORA_SF_ADDRESS);
 80061a6:	4809      	ldr	r0, [pc, #36]	; (80061cc <RGB_Data_Init+0x178>)
 80061a8:	f7ff ff28 	bl	8005ffc <M24C32_Data_Read>
        Default_SX1276.LoRa_BW   = M24C32_Data_Read(&hi2c2,RGB_LORA_BANDWIDTH_ADDRESS);
 80061ac:	f240 11c5 	movw	r1, #453	; 0x1c5
        Default_SX1276.LoRa_Rate = M24C32_Data_Read(&hi2c2,RGB_LORA_SF_ADDRESS);
 80061b0:	70a0      	strb	r0, [r4, #2]
        Default_SX1276.LoRa_BW   = M24C32_Data_Read(&hi2c2,RGB_LORA_BANDWIDTH_ADDRESS);
 80061b2:	4806      	ldr	r0, [pc, #24]	; (80061cc <RGB_Data_Init+0x178>)
 80061b4:	f7ff ff22 	bl	8005ffc <M24C32_Data_Read>
        Default_SX1276.LoRa_Lna  = M24C32_Data_Read(&hi2c2,RGB_LORA_LNA_ADDRESS);
 80061b8:	f44f 71e3 	mov.w	r1, #454	; 0x1c6
        Default_SX1276.LoRa_BW   = M24C32_Data_Read(&hi2c2,RGB_LORA_BANDWIDTH_ADDRESS);
 80061bc:	70e0      	strb	r0, [r4, #3]
        Default_SX1276.LoRa_Lna  = M24C32_Data_Read(&hi2c2,RGB_LORA_LNA_ADDRESS);
 80061be:	4803      	ldr	r0, [pc, #12]	; (80061cc <RGB_Data_Init+0x178>)
 80061c0:	f7ff ff1c 	bl	8005ffc <M24C32_Data_Read>
 80061c4:	7120      	strb	r0, [r4, #4]
}
 80061c6:	b003      	add	sp, #12
 80061c8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80061cc:	2000043c 	.word	0x2000043c
 80061d0:	200002e8 	.word	0x200002e8
 80061d4:	20000350 	.word	0x20000350
 80061d8:	20000102 	.word	0x20000102
 80061dc:	08008daf 	.word	0x08008daf
 80061e0:	08008de4 	.word	0x08008de4
 80061e4:	08008e0b 	.word	0x08008e0b
 80061e8:	20000008 	.word	0x20000008
 80061ec:	200002d6 	.word	0x200002d6
 80061f0:	200002c4 	.word	0x200002c4
 80061f4:	08008dbd 	.word	0x08008dbd

080061f8 <RGB_Response_Func>:

void RGB_Response_Func(uint8_t* data){
 80061f8:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
#if 0
for(uint8_t i = 0; i < 10; i++){
            printf("%02x ",data[i]);
        }
#endif
    switch(type){
 80061fc:	7843      	ldrb	r3, [r0, #1]
void RGB_Response_Func(uint8_t* data){
 80061fe:	4604      	mov	r4, r0
    switch(type){
 8006200:	3b01      	subs	r3, #1
 8006202:	2b17      	cmp	r3, #23
 8006204:	f200 8094 	bhi.w	8006330 <RGB_Response_Func+0x138>
 8006208:	e8df f003 	tbb	[pc, r3]
 800620c:	92240c24 	.word	0x92240c24
 8006210:	24241856 	.word	0x24241856
 8006214:	9292922b 	.word	0x9292922b
 8006218:	56382f92 	.word	0x56382f92
 800621c:	92925692 	.word	0x92925692
 8006220:	56796792 	.word	0x56796792
        case RGB_Status_Data_Request: 
            Uart2_Data_Send(data,RGB_SensorDataRequest_Length);
            break;
        case RGB_ControllerID_SET: 
            Uart1_Data_Send(data,RGB_ControllerID_SET_Length);
 8006224:	210a      	movs	r1, #10
 8006226:	f000 fed5 	bl	8006fd4 <Uart1_Data_Send>
            M24C32_Data_Write(&hi2c2,&MyControllerID,MY_ID_ADDRESS,1); // EEPROM Controller ID Save 
 800622a:	2301      	movs	r3, #1
 800622c:	2200      	movs	r2, #0
 800622e:	4942      	ldr	r1, [pc, #264]	; (8006338 <RGB_Response_Func+0x140>)
        case RGB_Status_Data_Response:
            Uart1_Data_Send(data,data[bluecell_length] + 3);
            break;
        case RGB_ControllerLimitSet:
            Uart1_Data_Send(data,data[bluecell_length] + 3);
            M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 
 8006230:	4842      	ldr	r0, [pc, #264]	; (800633c <RGB_Response_Func+0x144>)
        case RGB_Lora_ConfigGet:
            Uart1_Data_Send(data,data[bluecell_length] + 3);
            break;             
         default:break;
    }
}
 8006232:	b002      	add	sp, #8
 8006234:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
            M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 
 8006238:	f7ff beb2 	b.w	8005fa0 <M24C32_Data_Write>
            Uart1_Data_Send(data,data[bluecell_length] + 3);
 800623c:	7881      	ldrb	r1, [r0, #2]
 800623e:	3103      	adds	r1, #3
 8006240:	b2c9      	uxtb	r1, r1
 8006242:	f000 fec7 	bl	8006fd4 <Uart1_Data_Send>
            M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 
 8006246:	7aa0      	ldrb	r0, [r4, #10]
 8006248:	f7ff feee 	bl	8006028 <RGB_Limit_Address_Check>
 800624c:	2306      	movs	r3, #6
 800624e:	4602      	mov	r2, r0
 8006250:	1d21      	adds	r1, r4, #4
 8006252:	e7ed      	b.n	8006230 <RGB_Response_Func+0x38>
            Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length);
 8006254:	2107      	movs	r1, #7
            Uart2_Data_Send(data,data[bluecell_length] + 3);
 8006256:	4620      	mov	r0, r4
}
 8006258:	b002      	add	sp, #8
 800625a:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
            Uart2_Data_Send(data,data[bluecell_length] + 3);
 800625e:	f000 beb1 	b.w	8006fc4 <Uart2_Data_Send>
 8006262:	7881      	ldrb	r1, [r0, #2]
 8006264:	3103      	adds	r1, #3
 8006266:	b2c9      	uxtb	r1, r1
 8006268:	e7f5      	b.n	8006256 <RGB_Response_Func+0x5e>
            M24C32_Data_Write(&hi2c2,&data[Location_stx],RGB_Location_Address_Check(data[bluecell_srcid]),data[bluecell_length] + 3); // EEPROM Controller ID Save 
 800626a:	78c0      	ldrb	r0, [r0, #3]
 800626c:	f7ff fee6 	bl	800603c <RGB_Location_Address_Check>
 8006270:	78a3      	ldrb	r3, [r4, #2]
 8006272:	4602      	mov	r2, r0
 8006274:	3303      	adds	r3, #3
 8006276:	b2db      	uxtb	r3, r3
 8006278:	4621      	mov	r1, r4
 800627a:	e7d9      	b.n	8006230 <RGB_Response_Func+0x38>
            data[bluecell_length] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(data[bluecell_dstid]) + 2); // EEPROM Controller ID Save 
 800627c:	7a80      	ldrb	r0, [r0, #10]
 800627e:	f7ff fedd 	bl	800603c <RGB_Location_Address_Check>
 8006282:	1c81      	adds	r1, r0, #2
 8006284:	b289      	uxth	r1, r1
 8006286:	482d      	ldr	r0, [pc, #180]	; (800633c <RGB_Response_Func+0x144>)
 8006288:	f7ff feb8 	bl	8005ffc <M24C32_Data_Read>
 800628c:	70a0      	strb	r0, [r4, #2]
            temp = RGB_Location_Address_Check(data[bluecell_srcid]);
 800628e:	78e0      	ldrb	r0, [r4, #3]
 8006290:	f7ff fed4 	bl	800603c <RGB_Location_Address_Check>
            for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){
 8006294:	2300      	movs	r3, #0
            temp = RGB_Location_Address_Check(data[bluecell_srcid]);
 8006296:	4607      	mov	r7, r0
                data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save 
 8006298:	f8df 80a0 	ldr.w	r8, [pc, #160]	; 800633c <RGB_Response_Func+0x144>
            for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){
 800629c:	78a1      	ldrb	r1, [r4, #2]
 800629e:	b2de      	uxtb	r6, r3
 80062a0:	1c5d      	adds	r5, r3, #1
 80062a2:	1c8b      	adds	r3, r1, #2
 80062a4:	42b3      	cmp	r3, r6
 80062a6:	da10      	bge.n	80062ca <RGB_Response_Func+0xd2>
            data[bluecell_type] = RGB_Location_Response;
 80062a8:	4620      	mov	r0, r4
 80062aa:	230f      	movs	r3, #15
 80062ac:	f800 3f01 	strb.w	r3, [r0, #1]!
            data[data[bluecell_length] + 1] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
 80062b0:	1c4d      	adds	r5, r1, #1
 80062b2:	f001 fb1e 	bl	80078f2 <STH30_CreateCrc>
 80062b6:	5560      	strb	r0, [r4, r5]
            Uart1_Data_Send(data,data[bluecell_length] + 3);
 80062b8:	4620      	mov	r0, r4
 80062ba:	78a1      	ldrb	r1, [r4, #2]
 80062bc:	3103      	adds	r1, #3
 80062be:	b2c9      	uxtb	r1, r1
}
 80062c0:	b002      	add	sp, #8
 80062c2:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
            Uart1_Data_Send(data,data[bluecell_length] + 3);
 80062c6:	f000 be85 	b.w	8006fd4 <Uart1_Data_Send>
                data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save 
 80062ca:	19b9      	adds	r1, r7, r6
 80062cc:	b289      	uxth	r1, r1
 80062ce:	4640      	mov	r0, r8
 80062d0:	f7ff fe94 	bl	8005ffc <M24C32_Data_Read>
 80062d4:	462b      	mov	r3, r5
 80062d6:	55a0      	strb	r0, [r4, r6]
 80062d8:	e7e0      	b.n	800629c <RGB_Response_Func+0xa4>
             memcpy(&Lora_Tempdata.Request_stx,&data[bluecell_stx],data[bluecell_length] + 3);
 80062da:	7882      	ldrb	r2, [r0, #2]
 80062dc:	4601      	mov	r1, r0
 80062de:	3203      	adds	r2, #3
 80062e0:	4668      	mov	r0, sp
 80062e2:	f001 fcbb 	bl	8007c5c <memcpy>
             if(Lora_Tempdata.Request_dstid == MyControllerID)
 80062e6:	4b14      	ldr	r3, [pc, #80]	; (8006338 <RGB_Response_Func+0x140>)
 80062e8:	f89d 2004 	ldrb.w	r2, [sp, #4]
 80062ec:	781b      	ldrb	r3, [r3, #0]
 80062ee:	429a      	cmp	r2, r3
 80062f0:	d11e      	bne.n	8006330 <RGB_Response_Func+0x138>
                 LoraDataSendSet(1);
 80062f2:	2001      	movs	r0, #1
}
 80062f4:	b002      	add	sp, #8
 80062f6:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
                 LoraDataSendSet(1);
 80062fa:	f000 be57 	b.w	8006fac <LoraDataSendSet>
            data[bluecell_type] = RGB_Lora_ConfigGet;
 80062fe:	2318      	movs	r3, #24
            Default_SX1276.frequency     = data[3];
 8006300:	78c2      	ldrb	r2, [r0, #3]
            data[bluecell_type] = RGB_Lora_ConfigGet;
 8006302:	7043      	strb	r3, [r0, #1]
            Default_SX1276.frequency     = data[3];
 8006304:	4b0e      	ldr	r3, [pc, #56]	; (8006340 <RGB_Response_Func+0x148>)
 8006306:	701a      	strb	r2, [r3, #0]
            Default_SX1276.LoRa_Pa_boost = data[4];
 8006308:	7902      	ldrb	r2, [r0, #4]
 800630a:	715a      	strb	r2, [r3, #5]
            Default_SX1276.LoRa_Rate     = data[5];
 800630c:	7942      	ldrb	r2, [r0, #5]
 800630e:	709a      	strb	r2, [r3, #2]
            Default_SX1276.LoRa_BW       = data[6];    
 8006310:	7982      	ldrb	r2, [r0, #6]
 8006312:	70da      	strb	r2, [r3, #3]
            Default_SX1276.LoRa_Lna      = data[7];        
 8006314:	79c2      	ldrb	r2, [r0, #7]
 8006316:	711a      	strb	r2, [r3, #4]
            Lora_Initialize();
 8006318:	f000 ffee 	bl	80072f8 <Lora_Initialize>
            M24C32_Data_Write(&hi2c2,&data[bluecell_srcid],RGB_LORA_FREQ_ADDRESS,data[bluecell_length] - 2); // EEPROM Controller ID Save 
 800631c:	78a3      	ldrb	r3, [r4, #2]
 800631e:	f44f 72e1 	mov.w	r2, #450	; 0x1c2
 8006322:	3b02      	subs	r3, #2
 8006324:	b2db      	uxtb	r3, r3
 8006326:	1ce1      	adds	r1, r4, #3
 8006328:	4804      	ldr	r0, [pc, #16]	; (800633c <RGB_Response_Func+0x144>)
 800632a:	f7ff fe39 	bl	8005fa0 <M24C32_Data_Write>
 800632e:	e7c3      	b.n	80062b8 <RGB_Response_Func+0xc0>
}
 8006330:	b002      	add	sp, #8
 8006332:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8006336:	bf00      	nop
 8006338:	20000350 	.word	0x20000350
 800633c:	2000043c 	.word	0x2000043c
 8006340:	20000008 	.word	0x20000008

08006344 <RGB_Sensor_LED_Alarm_ON>:

void RGB_Sensor_LED_Alarm_ON(uint8_t id ){
 8006344:	b508      	push	{r3, lr}
    switch(id){
 8006346:	2808      	cmp	r0, #8
 8006348:	d850      	bhi.n	80063ec <RGB_Sensor_LED_Alarm_ON+0xa8>
 800634a:	e8df f000 	tbb	[pc, r0]
 800634e:	3005      	.short	0x3005
 8006350:	44403c38 	.word	0x44403c38
 8006354:	4b48      	.short	0x4b48
 8006356:	2c          	.byte	0x2c
 8006357:	00          	.byte	0x00
        case 0:// 모든 LED� 전�� ON
            HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET);
 8006358:	2200      	movs	r2, #0
 800635a:	f44f 6180 	mov.w	r1, #1024	; 0x400
 800635e:	4824      	ldr	r0, [pc, #144]	; (80063f0 <RGB_Sensor_LED_Alarm_ON+0xac>)
 8006360:	f7fe fadc 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET);            
 8006364:	2200      	movs	r2, #0
 8006366:	f44f 6100 	mov.w	r1, #2048	; 0x800
 800636a:	4821      	ldr	r0, [pc, #132]	; (80063f0 <RGB_Sensor_LED_Alarm_ON+0xac>)
 800636c:	f7fe fad6 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET);            
 8006370:	2200      	movs	r2, #0
 8006372:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8006376:	481e      	ldr	r0, [pc, #120]	; (80063f0 <RGB_Sensor_LED_Alarm_ON+0xac>)
 8006378:	f7fe fad0 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET);
 800637c:	2200      	movs	r2, #0
 800637e:	2104      	movs	r1, #4
 8006380:	481c      	ldr	r0, [pc, #112]	; (80063f4 <RGB_Sensor_LED_Alarm_ON+0xb0>)
 8006382:	f7fe facb 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET);
 8006386:	2200      	movs	r2, #0
 8006388:	2140      	movs	r1, #64	; 0x40
 800638a:	481b      	ldr	r0, [pc, #108]	; (80063f8 <RGB_Sensor_LED_Alarm_ON+0xb4>)
 800638c:	f7fe fac6 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET);
 8006390:	2200      	movs	r2, #0
 8006392:	2180      	movs	r1, #128	; 0x80
 8006394:	4818      	ldr	r0, [pc, #96]	; (80063f8 <RGB_Sensor_LED_Alarm_ON+0xb4>)
 8006396:	f7fe fac1 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET);
 800639a:	2200      	movs	r2, #0
 800639c:	f44f 7180 	mov.w	r1, #256	; 0x100
 80063a0:	4815      	ldr	r0, [pc, #84]	; (80063f8 <RGB_Sensor_LED_Alarm_ON+0xb4>)
 80063a2:	f7fe fabb 	bl	800491c <HAL_GPIO_WritePin>
            break;
        case 7:
            HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET);
            break;
        case 8:
            HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET);
 80063a6:	2200      	movs	r2, #0
 80063a8:	f44f 7100 	mov.w	r1, #512	; 0x200
 80063ac:	e015      	b.n	80063da <RGB_Sensor_LED_Alarm_ON+0x96>
            HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET);
 80063ae:	2200      	movs	r2, #0
 80063b0:	f44f 6180 	mov.w	r1, #1024	; 0x400
            HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET);
 80063b4:	480e      	ldr	r0, [pc, #56]	; (80063f0 <RGB_Sensor_LED_Alarm_ON+0xac>)
            break;
    }
}
 80063b6:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
            HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET);
 80063ba:	f7fe baaf 	b.w	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET);
 80063be:	2200      	movs	r2, #0
 80063c0:	f44f 6100 	mov.w	r1, #2048	; 0x800
 80063c4:	e7f6      	b.n	80063b4 <RGB_Sensor_LED_Alarm_ON+0x70>
            HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET);
 80063c6:	2200      	movs	r2, #0
 80063c8:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 80063cc:	e7f2      	b.n	80063b4 <RGB_Sensor_LED_Alarm_ON+0x70>
            HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET);
 80063ce:	2200      	movs	r2, #0
 80063d0:	2104      	movs	r1, #4
 80063d2:	4808      	ldr	r0, [pc, #32]	; (80063f4 <RGB_Sensor_LED_Alarm_ON+0xb0>)
 80063d4:	e7ef      	b.n	80063b6 <RGB_Sensor_LED_Alarm_ON+0x72>
            HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET);
 80063d6:	2200      	movs	r2, #0
 80063d8:	2140      	movs	r1, #64	; 0x40
            HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET);
 80063da:	4807      	ldr	r0, [pc, #28]	; (80063f8 <RGB_Sensor_LED_Alarm_ON+0xb4>)
 80063dc:	e7eb      	b.n	80063b6 <RGB_Sensor_LED_Alarm_ON+0x72>
            HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET);
 80063de:	2200      	movs	r2, #0
 80063e0:	2180      	movs	r1, #128	; 0x80
 80063e2:	e7fa      	b.n	80063da <RGB_Sensor_LED_Alarm_ON+0x96>
            HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET);
 80063e4:	2200      	movs	r2, #0
 80063e6:	f44f 7180 	mov.w	r1, #256	; 0x100
 80063ea:	e7f6      	b.n	80063da <RGB_Sensor_LED_Alarm_ON+0x96>
 80063ec:	bd08      	pop	{r3, pc}
 80063ee:	bf00      	nop
 80063f0:	40011000 	.word	0x40011000
 80063f4:	40011400 	.word	0x40011400
 80063f8:	40010c00 	.word	0x40010c00

080063fc <RGB_Sensor_LED_Alarm_OFF>:
void RGB_Sensor_LED_Alarm_OFF(uint8_t id ){
 80063fc:	b508      	push	{r3, lr}
    switch(id){
 80063fe:	2808      	cmp	r0, #8
 8006400:	d850      	bhi.n	80064a4 <RGB_Sensor_LED_Alarm_OFF+0xa8>
 8006402:	e8df f000 	tbb	[pc, r0]
 8006406:	3005      	.short	0x3005
 8006408:	44403c38 	.word	0x44403c38
 800640c:	4b48      	.short	0x4b48
 800640e:	2c          	.byte	0x2c
 800640f:	00          	.byte	0x00
        case 0:// 모든 LED� 전�� OFF
            HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET);
 8006410:	2201      	movs	r2, #1
 8006412:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8006416:	4824      	ldr	r0, [pc, #144]	; (80064a8 <RGB_Sensor_LED_Alarm_OFF+0xac>)
 8006418:	f7fe fa80 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET);            
 800641c:	2201      	movs	r2, #1
 800641e:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8006422:	4821      	ldr	r0, [pc, #132]	; (80064a8 <RGB_Sensor_LED_Alarm_OFF+0xac>)
 8006424:	f7fe fa7a 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET);            
 8006428:	2201      	movs	r2, #1
 800642a:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 800642e:	481e      	ldr	r0, [pc, #120]	; (80064a8 <RGB_Sensor_LED_Alarm_OFF+0xac>)
 8006430:	f7fe fa74 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET);
 8006434:	2201      	movs	r2, #1
 8006436:	2104      	movs	r1, #4
 8006438:	481c      	ldr	r0, [pc, #112]	; (80064ac <RGB_Sensor_LED_Alarm_OFF+0xb0>)
 800643a:	f7fe fa6f 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET);
 800643e:	2201      	movs	r2, #1
 8006440:	2140      	movs	r1, #64	; 0x40
 8006442:	481b      	ldr	r0, [pc, #108]	; (80064b0 <RGB_Sensor_LED_Alarm_OFF+0xb4>)
 8006444:	f7fe fa6a 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET);
 8006448:	2201      	movs	r2, #1
 800644a:	2180      	movs	r1, #128	; 0x80
 800644c:	4818      	ldr	r0, [pc, #96]	; (80064b0 <RGB_Sensor_LED_Alarm_OFF+0xb4>)
 800644e:	f7fe fa65 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET);
 8006452:	2201      	movs	r2, #1
 8006454:	f44f 7180 	mov.w	r1, #256	; 0x100
 8006458:	4815      	ldr	r0, [pc, #84]	; (80064b0 <RGB_Sensor_LED_Alarm_OFF+0xb4>)
 800645a:	f7fe fa5f 	bl	800491c <HAL_GPIO_WritePin>
            break;
        case 7:
            HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET);
            break;
        case 8:
            HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET);
 800645e:	2201      	movs	r2, #1
 8006460:	f44f 7100 	mov.w	r1, #512	; 0x200
 8006464:	e015      	b.n	8006492 <RGB_Sensor_LED_Alarm_OFF+0x96>
            HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET);
 8006466:	2201      	movs	r2, #1
 8006468:	f44f 6180 	mov.w	r1, #1024	; 0x400
            HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET);
 800646c:	480e      	ldr	r0, [pc, #56]	; (80064a8 <RGB_Sensor_LED_Alarm_OFF+0xac>)
            break;
    }
}
 800646e:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
            HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET);
 8006472:	f7fe ba53 	b.w	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET);
 8006476:	2201      	movs	r2, #1
 8006478:	f44f 6100 	mov.w	r1, #2048	; 0x800
 800647c:	e7f6      	b.n	800646c <RGB_Sensor_LED_Alarm_OFF+0x70>
            HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET);
 800647e:	2201      	movs	r2, #1
 8006480:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8006484:	e7f2      	b.n	800646c <RGB_Sensor_LED_Alarm_OFF+0x70>
            HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET);
 8006486:	2201      	movs	r2, #1
 8006488:	2104      	movs	r1, #4
 800648a:	4808      	ldr	r0, [pc, #32]	; (80064ac <RGB_Sensor_LED_Alarm_OFF+0xb0>)
 800648c:	e7ef      	b.n	800646e <RGB_Sensor_LED_Alarm_OFF+0x72>
            HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET);
 800648e:	2201      	movs	r2, #1
 8006490:	2140      	movs	r1, #64	; 0x40
            HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET);
 8006492:	4807      	ldr	r0, [pc, #28]	; (80064b0 <RGB_Sensor_LED_Alarm_OFF+0xb4>)
 8006494:	e7eb      	b.n	800646e <RGB_Sensor_LED_Alarm_OFF+0x72>
            HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET);
 8006496:	2201      	movs	r2, #1
 8006498:	2180      	movs	r1, #128	; 0x80
 800649a:	e7fa      	b.n	8006492 <RGB_Sensor_LED_Alarm_OFF+0x96>
            HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET);
 800649c:	2201      	movs	r2, #1
 800649e:	f44f 7180 	mov.w	r1, #256	; 0x100
 80064a2:	e7f6      	b.n	8006492 <RGB_Sensor_LED_Alarm_OFF+0x96>
 80064a4:	bd08      	pop	{r3, pc}
 80064a6:	bf00      	nop
 80064a8:	40011000 	.word	0x40011000
 80064ac:	40011400 	.word	0x40011400
 80064b0:	40010c00 	.word	0x40010c00

080064b4 <RGB_Alarm_Operate>:

void RGB_Alarm_Operate(void){
 80064b4:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    uint8_t temp_warning = 0;
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 80064b8:	2401      	movs	r4, #1
    uint8_t temp_warning = 0;
 80064ba:	2500      	movs	r5, #0
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 80064bc:	f8df 8060 	ldr.w	r8, [pc, #96]	; 8006520 <RGB_Alarm_Operate+0x6c>
        if(LED_Alarm[SensorID_buf[i]] == 1){
 80064c0:	4f15      	ldr	r7, [pc, #84]	; (8006518 <RGB_Alarm_Operate+0x64>)
 80064c2:	f8df 9060 	ldr.w	r9, [pc, #96]	; 8006524 <RGB_Alarm_Operate+0x70>
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 80064c6:	f898 3000 	ldrb.w	r3, [r8]
 80064ca:	42a3      	cmp	r3, r4
 80064cc:	d20b      	bcs.n	80064e6 <RGB_Alarm_Operate+0x32>
            temp_warning = 1; 
        }else{
            RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]);
        }
    }
    if(temp_warning == 0){          // 8개� Sensor가 전부 정�� 때 만 �작
 80064ce:	bb05      	cbnz	r5, 8006512 <RGB_Alarm_Operate+0x5e>
        HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_RESET); //표지 LED
 80064d0:	462a      	mov	r2, r5
 80064d2:	4812      	ldr	r0, [pc, #72]	; (800651c <RGB_Alarm_Operate+0x68>)
 80064d4:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 80064d8:	f7fe fa20 	bl	800491c <HAL_GPIO_WritePin>
        RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensor가 정�� 때는 LED 가 켜지지 않는다.
 80064dc:	4628      	mov	r0, r5
    }
}
 80064de:	e8bd 43f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
        RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensor가 정�� 때는 LED 가 켜지지 않는다.
 80064e2:	f7ff bf8b 	b.w	80063fc <RGB_Sensor_LED_Alarm_OFF>
        if(LED_Alarm[SensorID_buf[i]] == 1){
 80064e6:	5d38      	ldrb	r0, [r7, r4]
 80064e8:	f819 6000 	ldrb.w	r6, [r9, r0]
 80064ec:	2e01      	cmp	r6, #1
 80064ee:	d10c      	bne.n	800650a <RGB_Alarm_Operate+0x56>
            HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_SET); //표지 LED
 80064f0:	480a      	ldr	r0, [pc, #40]	; (800651c <RGB_Alarm_Operate+0x68>)
 80064f2:	4632      	mov	r2, r6
 80064f4:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 80064f8:	f7fe fa10 	bl	800491c <HAL_GPIO_WritePin>
            RGB_Sensor_LED_Alarm_ON(SensorID_buf[i]);
 80064fc:	5d38      	ldrb	r0, [r7, r4]
 80064fe:	f7ff ff21 	bl	8006344 <RGB_Sensor_LED_Alarm_ON>
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 8006502:	3401      	adds	r4, #1
 8006504:	b2e4      	uxtb	r4, r4
 8006506:	4635      	mov	r5, r6
 8006508:	e7dd      	b.n	80064c6 <RGB_Alarm_Operate+0x12>
            RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]);
 800650a:	f7ff ff77 	bl	80063fc <RGB_Sensor_LED_Alarm_OFF>
 800650e:	462e      	mov	r6, r5
 8006510:	e7f7      	b.n	8006502 <RGB_Alarm_Operate+0x4e>
 8006512:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8006516:	bf00      	nop
 8006518:	200002fb 	.word	0x200002fb
 800651c:	40010c00 	.word	0x40010c00
 8006520:	200002fa 	.word	0x200002fa
 8006524:	20000094 	.word	0x20000094

08006528 <RGB_DeviceStatusCheck>:
//         LoraDataSendSet(LoraTx_mode);//경고 발� 시 바로 Data 전송 하는 Option
         Prev_Alarm_occur = Alarm_occur;
    }
}

uint8_t RGB_DeviceStatusCheck(void){
 8006528:	b530      	push	{r4, r5, lr}
    uint8_t ret = 0;
    for(uint8_t i = 1; i <= SensorID_Cnt; i++){
 800652a:	4b09      	ldr	r3, [pc, #36]	; (8006550 <RGB_DeviceStatusCheck+0x28>)
    uint8_t ret = 0;
 800652c:	2000      	movs	r0, #0
    for(uint8_t i = 1; i <= SensorID_Cnt; i++){
 800652e:	7819      	ldrb	r1, [r3, #0]
 8006530:	2301      	movs	r3, #1
        if(SensorID_buf[i] > 0){
            ret += 0x01 << (SensorID_buf[i] - 1); 
 8006532:	461d      	mov	r5, r3
        if(SensorID_buf[i] > 0){
 8006534:	4c07      	ldr	r4, [pc, #28]	; (8006554 <RGB_DeviceStatusCheck+0x2c>)
    for(uint8_t i = 1; i <= SensorID_Cnt; i++){
 8006536:	428b      	cmp	r3, r1
 8006538:	d900      	bls.n	800653c <RGB_DeviceStatusCheck+0x14>
        }
    }
    return ret;
}
 800653a:	bd30      	pop	{r4, r5, pc}
        if(SensorID_buf[i] > 0){
 800653c:	5ce2      	ldrb	r2, [r4, r3]
 800653e:	b122      	cbz	r2, 800654a <RGB_DeviceStatusCheck+0x22>
            ret += 0x01 << (SensorID_buf[i] - 1); 
 8006540:	3a01      	subs	r2, #1
 8006542:	fa05 f202 	lsl.w	r2, r5, r2
 8006546:	4410      	add	r0, r2
 8006548:	b2c0      	uxtb	r0, r0
    for(uint8_t i = 1; i <= SensorID_Cnt; i++){
 800654a:	3301      	adds	r3, #1
 800654c:	b2db      	uxtb	r3, r3
 800654e:	e7f2      	b.n	8006536 <RGB_DeviceStatusCheck+0xe>
 8006550:	200002fa 	.word	0x200002fa
 8006554:	200002fb 	.word	0x200002fb

08006558 <RGB_BufCal>:
}
/*
    RGB_Data_Stack� Lora� Data를 보내기 위해 Buffer� Data를 쌓� 때
    ID 마다 Location Cnt
*/
uint8_t RGB_BufCal(uint8_t srcid){
 8006558:	3801      	subs	r0, #1
 800655a:	b2c0      	uxtb	r0, r0
 800655c:	2807      	cmp	r0, #7
 800655e:	bf9a      	itte	ls
 8006560:	4b01      	ldrls	r3, [pc, #4]	; (8006568 <RGB_BufCal+0x10>)
 8006562:	5c18      	ldrbls	r0, [r3, r0]
 8006564:	2000      	movhi	r0, #0
        case 6:ret = 29;break;
        case 7:ret = 32;break;
        case 8:ret = 35;break;      
    }
    return ret;
}
 8006566:	4770      	bx	lr
 8006568:	08008d92 	.word	0x08008d92

0800656c <RGB_Data_Stack>:
void RGB_Data_Stack(uint8_t* rgb_buf){
 800656c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    Lora_Buf[bluecell_stx]         = 0xbe;
 800656e:	23be      	movs	r3, #190	; 0xbe
    memset(&Lora_Buf[0],0x00,8);
 8006570:	4c1c      	ldr	r4, [pc, #112]	; (80065e4 <RGB_Data_Stack+0x78>)
 8006572:	2500      	movs	r5, #0
    Lora_Buf[bluecell_stx]         = 0xbe;
 8006574:	7023      	strb	r3, [r4, #0]
    Lora_Buf[bluecell_srcid + 4]   = 0xeb;
 8006576:	23eb      	movs	r3, #235	; 0xeb
    memset(&Lora_Buf[0],0x00,8);
 8006578:	6065      	str	r5, [r4, #4]
    Lora_Buf[bluecell_srcid + 4]   = 0xeb;
 800657a:	71e3      	strb	r3, [r4, #7]
    Lora_Buf[bluecell_type]        = RGB_Lora_DataResponse;
 800657c:	2316      	movs	r3, #22
 800657e:	7063      	strb	r3, [r4, #1]
    Lora_Buf[bluecell_length]      = Lora_Max_Amount;// RGB Data 5byte
 8006580:	2305      	movs	r3, #5
 8006582:	70a3      	strb	r3, [r4, #2]
    Lora_Buf[bluecell_srcid]       = MyControllerID;
 8006584:	4b18      	ldr	r3, [pc, #96]	; (80065e8 <RGB_Data_Stack+0x7c>)
    if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Device가 존재 하지않� 때
 8006586:	4e19      	ldr	r6, [pc, #100]	; (80065ec <RGB_Data_Stack+0x80>)
    Lora_Buf[bluecell_srcid]       = MyControllerID;
 8006588:	781b      	ldrb	r3, [r3, #0]
void RGB_Data_Stack(uint8_t* rgb_buf){
 800658a:	4601      	mov	r1, r0
    if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Device가 존재 하지않� 때
 800658c:	7870      	ldrb	r0, [r6, #1]
    Lora_Buf[bluecell_srcid]       = MyControllerID;
 800658e:	70e3      	strb	r3, [r4, #3]
    if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Device가 존재 하지않� 때
 8006590:	f7ff ffe2 	bl	8006558 <RGB_BufCal>
 8006594:	b1b8      	cbz	r0, 80065c6 <RGB_Data_Stack+0x5a>
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 8006596:	4b16      	ldr	r3, [pc, #88]	; (80065f0 <RGB_Data_Stack+0x84>)
 8006598:	7922      	ldrb	r2, [r4, #4]
 800659a:	781f      	ldrb	r7, [r3, #0]
 800659c:	2301      	movs	r3, #1
        Lora_Buf[bluecell_srcid + 1] |= 0x01  << (SensorID_buf[i] - 1);
 800659e:	469e      	mov	lr, r3
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 80065a0:	42bb      	cmp	r3, r7
 80065a2:	d915      	bls.n	80065d0 <RGB_Data_Stack+0x64>
 80065a4:	b105      	cbz	r5, 80065a8 <RGB_Data_Stack+0x3c>
 80065a6:	7122      	strb	r2, [r4, #4]
 80065a8:	2300      	movs	r3, #0
        Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ;
 80065aa:	5cca      	ldrb	r2, [r1, r3]
 80065ac:	7960      	ldrb	r0, [r4, #5]
 80065ae:	409a      	lsls	r2, r3
 80065b0:	3301      	adds	r3, #1
 80065b2:	4302      	orrs	r2, r0
    for(uint8_t i = 0; i < 8; i++){
 80065b4:	2b08      	cmp	r3, #8
        Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ;
 80065b6:	7162      	strb	r2, [r4, #5]
    for(uint8_t i = 0; i < 8; i++){
 80065b8:	d1f7      	bne.n	80065aa <RGB_Data_Stack+0x3e>
    Lora_Buf[bluecell_srcid + 3]= STH30_CreateCrc(&Lora_Buf[bluecell_type],Lora_Buf[bluecell_length]);
 80065ba:	2105      	movs	r1, #5
 80065bc:	480d      	ldr	r0, [pc, #52]	; (80065f4 <RGB_Data_Stack+0x88>)
 80065be:	f001 f998 	bl	80078f2 <STH30_CreateCrc>
 80065c2:	71a0      	strb	r0, [r4, #6]
 80065c4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        printf("Not Exist Device \n");
 80065c6:	480c      	ldr	r0, [pc, #48]	; (80065f8 <RGB_Data_Stack+0x8c>)
}
 80065c8:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
        printf("Not Exist Device \n");
 80065cc:	f001 bbce 	b.w	8007d6c <puts>
        Lora_Buf[bluecell_srcid + 1] |= 0x01  << (SensorID_buf[i] - 1);
 80065d0:	5cf0      	ldrb	r0, [r6, r3]
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 80065d2:	3301      	adds	r3, #1
        Lora_Buf[bluecell_srcid + 1] |= 0x01  << (SensorID_buf[i] - 1);
 80065d4:	3801      	subs	r0, #1
 80065d6:	fa0e f000 	lsl.w	r0, lr, r0
 80065da:	4302      	orrs	r2, r0
 80065dc:	b2d2      	uxtb	r2, r2
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 80065de:	b2db      	uxtb	r3, r3
 80065e0:	2501      	movs	r5, #1
 80065e2:	e7dd      	b.n	80065a0 <RGB_Data_Stack+0x34>
 80065e4:	2000009d 	.word	0x2000009d
 80065e8:	20000350 	.word	0x20000350
 80065ec:	200002fb 	.word	0x200002fb
 80065f0:	200002fa 	.word	0x200002fa
 80065f4:	2000009e 	.word	0x2000009e
 80065f8:	08008e32 	.word	0x08008e32

080065fc <RGB_Alarm_Check>:
void RGB_Alarm_Check(uint8_t* data){
 80065fc:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]);
 8006600:	7981      	ldrb	r1, [r0, #6]
 8006602:	79c2      	ldrb	r2, [r0, #7]
 8006604:	78c3      	ldrb	r3, [r0, #3]
 8006606:	4e26      	ldr	r6, [pc, #152]	; (80066a0 <RGB_Alarm_Check+0xa4>)
 8006608:	ea42 2201 	orr.w	r2, r2, r1, lsl #8
    Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]);
 800660c:	7a04      	ldrb	r4, [r0, #8]
    Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]);
 800660e:	f826 2013 	strh.w	r2, [r6, r3, lsl #1]
    Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]);
 8006612:	7a42      	ldrb	r2, [r0, #9]
 8006614:	4923      	ldr	r1, [pc, #140]	; (80066a4 <RGB_Alarm_Check+0xa8>)
 8006616:	ea42 2204 	orr.w	r2, r2, r4, lsl #8
 800661a:	f821 2013 	strh.w	r2, [r1, r3, lsl #1]
    Sensor_blue[data[bluecell_srcid]] = ((data[bluecell_blue_H + 2] << 8)| data[bluecell_blue_L + 2]);  
 800661e:	7a84      	ldrb	r4, [r0, #10]
 8006620:	7ac2      	ldrb	r2, [r0, #11]
 8006622:	4d21      	ldr	r5, [pc, #132]	; (80066a8 <RGB_Alarm_Check+0xac>)
 8006624:	ea42 2204 	orr.w	r2, r2, r4, lsl #8
 8006628:	f825 2013 	strh.w	r2, [r5, r3, lsl #1]
    uint8_t Alarm_occur = 0;
 800662c:	2400      	movs	r4, #0
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 800662e:	2201      	movs	r2, #1
            LED_Alarm[SensorID_buf[i]] = 0;
 8006630:	46a1      	mov	r9, r4
            LED_Alarm[SensorID_buf[i]] = 1;
 8006632:	4696      	mov	lr, r2
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 8006634:	4b1d      	ldr	r3, [pc, #116]	; (80066ac <RGB_Alarm_Check+0xb0>)
 8006636:	4628      	mov	r0, r5
 8006638:	f893 c000 	ldrb.w	ip, [r3]
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 800663c:	4f1c      	ldr	r7, [pc, #112]	; (80066b0 <RGB_Alarm_Check+0xb4>)
 800663e:	4d1d      	ldr	r5, [pc, #116]	; (80066b4 <RGB_Alarm_Check+0xb8>)
            || RGB_SensorBlueLimit_Buf[SensorID_buf[i]]  >= Sensor_blue[SensorID_buf[i]]) {
 8006640:	f8df 8084 	ldr.w	r8, [pc, #132]	; 80066c8 <RGB_Alarm_Check+0xcc>
 8006644:	9101      	str	r1, [sp, #4]
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 8006646:	4562      	cmp	r2, ip
 8006648:	d90a      	bls.n	8006660 <RGB_Alarm_Check+0x64>
    RGB_Data_Stack(&LED_Alarm[1]);
 800664a:	481b      	ldr	r0, [pc, #108]	; (80066b8 <RGB_Alarm_Check+0xbc>)
 800664c:	f7ff ff8e 	bl	800656c <RGB_Data_Stack>
    if(Prev_Alarm_occur != Alarm_occur){
 8006650:	4b1a      	ldr	r3, [pc, #104]	; (80066bc <RGB_Alarm_Check+0xc0>)
 8006652:	781a      	ldrb	r2, [r3, #0]
 8006654:	42a2      	cmp	r2, r4
         Prev_Alarm_occur = Alarm_occur;
 8006656:	bf18      	it	ne
 8006658:	701c      	strbne	r4, [r3, #0]
}
 800665a:	b003      	add	sp, #12
 800665c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        if(RGB_SensorRedLimit_Buf[SensorID_buf[i]]  >= Sensor_red[SensorID_buf[i]]
 8006660:	4b17      	ldr	r3, [pc, #92]	; (80066c0 <RGB_Alarm_Check+0xc4>)
 8006662:	5c9b      	ldrb	r3, [r3, r2]
 8006664:	f837 b013 	ldrh.w	fp, [r7, r3, lsl #1]
 8006668:	f836 a013 	ldrh.w	sl, [r6, r3, lsl #1]
 800666c:	45d3      	cmp	fp, sl
 800666e:	d20d      	bcs.n	800668c <RGB_Alarm_Check+0x90>
            || RGB_SensorGreenLimit_Buf[SensorID_buf[i]]  >= Sensor_green[SensorID_buf[i]]
 8006670:	4914      	ldr	r1, [pc, #80]	; (80066c4 <RGB_Alarm_Check+0xc8>)
 8006672:	f831 b013 	ldrh.w	fp, [r1, r3, lsl #1]
 8006676:	9901      	ldr	r1, [sp, #4]
 8006678:	f831 a013 	ldrh.w	sl, [r1, r3, lsl #1]
 800667c:	45d3      	cmp	fp, sl
 800667e:	d205      	bcs.n	800668c <RGB_Alarm_Check+0x90>
            || RGB_SensorBlueLimit_Buf[SensorID_buf[i]]  >= Sensor_blue[SensorID_buf[i]]) {
 8006680:	f838 b013 	ldrh.w	fp, [r8, r3, lsl #1]
 8006684:	f830 a013 	ldrh.w	sl, [r0, r3, lsl #1]
 8006688:	45d3      	cmp	fp, sl
 800668a:	d305      	bcc.n	8006698 <RGB_Alarm_Check+0x9c>
            Alarm_occur = 1;
 800668c:	2401      	movs	r4, #1
            LED_Alarm[SensorID_buf[i]] = 1;
 800668e:	f805 e003 	strb.w	lr, [r5, r3]
    for(uint8_t i = 1; i <= (SensorID_Cnt); i++){
 8006692:	3201      	adds	r2, #1
 8006694:	b2d2      	uxtb	r2, r2
 8006696:	e7d6      	b.n	8006646 <RGB_Alarm_Check+0x4a>
            LED_Alarm[SensorID_buf[i]] = 0;
 8006698:	f805 9003 	strb.w	r9, [r5, r3]
 800669c:	e7f9      	b.n	8006692 <RGB_Alarm_Check+0x96>
 800669e:	bf00      	nop
 80066a0:	20000328 	.word	0x20000328
 80066a4:	20000316 	.word	0x20000316
 80066a8:	20000304 	.word	0x20000304
 80066ac:	200002fa 	.word	0x200002fa
 80066b0:	200002e8 	.word	0x200002e8
 80066b4:	20000094 	.word	0x20000094
 80066b8:	20000095 	.word	0x20000095
 80066bc:	20000101 	.word	0x20000101
 80066c0:	200002fb 	.word	0x200002fb
 80066c4:	200002d6 	.word	0x200002d6
 80066c8:	200002c4 	.word	0x200002c4

080066cc <RGB_Controller_Func>:
#endif // PYJ.2019.04.14_END -- 
uint8_t datalosscnt[9] = {0,};


static uint8_t temp_sensorid;
void RGB_Controller_Func(uint8_t* data){
 80066cc:	b530      	push	{r4, r5, lr}
	RGB_CMD_T type = data[bluecell_type];
 80066ce:	7845      	ldrb	r5, [r0, #1]
void RGB_Controller_Func(uint8_t* data){
 80066d0:	b09b      	sub	sp, #108	; 0x6c
 80066d2:	4604      	mov	r4, r0
   // static uint8_t temp_sensorid;
    uint8_t Result_buf[100] = {0,};
 80066d4:	2264      	movs	r2, #100	; 0x64
 80066d6:	2100      	movs	r1, #0
 80066d8:	a801      	add	r0, sp, #4
 80066da:	f001 faca 	bl	8007c72 <memset>
    uint8_t i = 0;
    switch(type){
 80066de:	1e6b      	subs	r3, r5, #1
 80066e0:	2b17      	cmp	r3, #23
 80066e2:	d844      	bhi.n	800676e <RGB_Controller_Func+0xa2>
 80066e4:	e8df f013 	tbh	[pc, r3, lsl #1]
 80066e8:	00480018 	.word	0x00480018
 80066ec:	00640052 	.word	0x00640052
 80066f0:	00a30071 	.word	0x00a30071
 80066f4:	00430043 	.word	0x00430043
 80066f8:	00ca0043 	.word	0x00ca0043
 80066fc:	00430043 	.word	0x00430043
 8006700:	00d70043 	.word	0x00d70043
 8006704:	00e500de 	.word	0x00e500de
 8006708:	00fc0043 	.word	0x00fc0043
 800670c:	00430043 	.word	0x00430043
 8006710:	0043012b 	.word	0x0043012b
 8006714:	01470135 	.word	0x01470135
        case RGB_Status_Data_Request:          
            data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
 8006718:	49a8      	ldr	r1, [pc, #672]	; (80069bc <RGB_Controller_Func+0x2f0>)
            if(temp_sensorid > (SensorID_Cnt)){
 800671a:	48a9      	ldr	r0, [pc, #676]	; (80069c0 <RGB_Controller_Func+0x2f4>)
            data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
 800671c:	780a      	ldrb	r2, [r1, #0]
            if(temp_sensorid > (SensorID_Cnt)){
 800671e:	7800      	ldrb	r0, [r0, #0]
            data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
 8006720:	1c53      	adds	r3, r2, #1
 8006722:	b2db      	uxtb	r3, r3
            if(temp_sensorid > (SensorID_Cnt)){
 8006724:	4298      	cmp	r0, r3
            data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
 8006726:	700b      	strb	r3, [r1, #0]
                temp_sensorid = 0;
 8006728:	bf38      	it	cc
 800672a:	2300      	movcc	r3, #0
            data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
 800672c:	4da5      	ldr	r5, [pc, #660]	; (80069c4 <RGB_Controller_Func+0x2f8>)
                temp_sensorid = 0;
 800672e:	bf38      	it	cc
 8006730:	700b      	strbcc	r3, [r1, #0]
            data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
 8006732:	5caa      	ldrb	r2, [r5, r2]
            }    
            datalosscnt[data[bluecell_srcid + 1]]++;
 8006734:	4ba4      	ldr	r3, [pc, #656]	; (80069c8 <RGB_Controller_Func+0x2fc>)
            data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++];
 8006736:	7122      	strb	r2, [r4, #4]
            datalosscnt[data[bluecell_srcid + 1]]++;
 8006738:	5c99      	ldrb	r1, [r3, r2]
 800673a:	3101      	adds	r1, #1
 800673c:	5499      	strb	r1, [r3, r2]
            if(datalosscnt[data[bluecell_srcid + 1]] > 3 && data[bluecell_srcid + 1] != 0){
 800673e:	7922      	ldrb	r2, [r4, #4]
 8006740:	5c9b      	ldrb	r3, [r3, r2]
 8006742:	2b03      	cmp	r3, #3
 8006744:	d906      	bls.n	8006754 <RGB_Controller_Func+0x88>
 8006746:	b12a      	cbz	r2, 8006754 <RGB_Controller_Func+0x88>
                RGB_SensorIDAutoSet(1);
 8006748:	2001      	movs	r0, #1
 800674a:	f000 fc35 	bl	8006fb8 <RGB_SensorIDAutoSet>
                memset(&SensorID_buf[0],0x00,8);
 800674e:	2300      	movs	r3, #0
 8006750:	602b      	str	r3, [r5, #0]
 8006752:	606b      	str	r3, [r5, #4]
            }
            data[5]   = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
 8006754:	78a1      	ldrb	r1, [r4, #2]
 8006756:	1c60      	adds	r0, r4, #1
 8006758:	f001 f8cb 	bl	80078f2 <STH30_CreateCrc>
 800675c:	7160      	strb	r0, [r4, #5]
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],RGB_SensorDataRequest_Length);
 800675e:	88a2      	ldrh	r2, [r4, #4]
 8006760:	6820      	ldr	r0, [r4, #0]
 8006762:	79a3      	ldrb	r3, [r4, #6]
 8006764:	9001      	str	r0, [sp, #4]
 8006766:	f8ad 2008 	strh.w	r2, [sp, #8]
 800676a:	f88d 300a 	strb.w	r3, [sp, #10]
            Result_buf[bluecell_srcid + 6]   = 0xeb;
            break;
        default:
            break;
    }
    RGB_Response_Func(&Result_buf[bluecell_stx]);
 800676e:	a801      	add	r0, sp, #4
 8006770:	f7ff fd42 	bl	80061f8 <RGB_Response_Func>
    return;
}
 8006774:	b01b      	add	sp, #108	; 0x6c
 8006776:	bd30      	pop	{r4, r5, pc}
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
 8006778:	78a2      	ldrb	r2, [r4, #2]
 800677a:	4621      	mov	r1, r4
 800677c:	3203      	adds	r2, #3
 800677e:	a801      	add	r0, sp, #4
 8006780:	f001 fa6c 	bl	8007c5c <memcpy>
            MyControllerID = data[bluecell_srcid]; // �긽��諛⑹쓽 SRC ID�뒗 �굹�쓽 DST ID�씠�떎.
 8006784:	78e2      	ldrb	r2, [r4, #3]
 8006786:	4b91      	ldr	r3, [pc, #580]	; (80069cc <RGB_Controller_Func+0x300>)
 8006788:	701a      	strb	r2, [r3, #0]
            break;
 800678a:	e7f0      	b.n	800676e <RGB_Controller_Func+0xa2>
            RGB_SensorIDAutoSet(1);
 800678c:	2001      	movs	r0, #1
 800678e:	f000 fc13 	bl	8006fb8 <RGB_SensorIDAutoSet>
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
 8006792:	78a2      	ldrb	r2, [r4, #2]
 8006794:	4621      	mov	r1, r4
 8006796:	3203      	adds	r2, #3
 8006798:	a801      	add	r0, sp, #4
 800679a:	f001 fa5f 	bl	8007c5c <memcpy>
            Result_buf[5]  = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 800679e:	f89d 1006 	ldrb.w	r1, [sp, #6]
 80067a2:	f10d 0005 	add.w	r0, sp, #5
 80067a6:	f001 f8a4 	bl	80078f2 <STH30_CreateCrc>
 80067aa:	f88d 0009 	strb.w	r0, [sp, #9]
            break;
 80067ae:	e7de      	b.n	800676e <RGB_Controller_Func+0xa2>
            printf("Recognize %d Sensor\n",data[bluecell_length + 1]);
 80067b0:	78e1      	ldrb	r1, [r4, #3]
 80067b2:	4887      	ldr	r0, [pc, #540]	; (80069d0 <RGB_Controller_Func+0x304>)
 80067b4:	f001 fa66 	bl	8007c84 <iprintf>
            SensorID_Cnt++;
 80067b8:	4a81      	ldr	r2, [pc, #516]	; (80069c0 <RGB_Controller_Func+0x2f4>)
            SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1];
 80067ba:	78e1      	ldrb	r1, [r4, #3]
            SensorID_Cnt++;
 80067bc:	7813      	ldrb	r3, [r2, #0]
 80067be:	3301      	adds	r3, #1
 80067c0:	b2db      	uxtb	r3, r3
 80067c2:	7013      	strb	r3, [r2, #0]
            SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1];
 80067c4:	4a7f      	ldr	r2, [pc, #508]	; (80069c4 <RGB_Controller_Func+0x2f8>)
 80067c6:	54d1      	strb	r1, [r2, r3]
            break;
 80067c8:	e7d1      	b.n	800676e <RGB_Controller_Func+0xa2>
            datalosscnt[data[bluecell_srcid]] = 0;
 80067ca:	2100      	movs	r1, #0
 80067cc:	78e3      	ldrb	r3, [r4, #3]
 80067ce:	4a7e      	ldr	r2, [pc, #504]	; (80069c8 <RGB_Controller_Func+0x2fc>)
            RGB_Alarm_Check(&data[bluecell_stx]);
 80067d0:	4620      	mov	r0, r4
            datalosscnt[data[bluecell_srcid]] = 0;
 80067d2:	54d1      	strb	r1, [r2, r3]
            data[bluecell_length] += 1;
 80067d4:	78a3      	ldrb	r3, [r4, #2]
 80067d6:	3301      	adds	r3, #1
 80067d8:	70a3      	strb	r3, [r4, #2]
            RGB_Alarm_Check(&data[bluecell_stx]);
 80067da:	f7ff ff0f 	bl	80065fc <RGB_Alarm_Check>
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
 80067de:	78a2      	ldrb	r2, [r4, #2]
 80067e0:	4621      	mov	r1, r4
 80067e2:	3203      	adds	r2, #3
 80067e4:	a801      	add	r0, sp, #4
 80067e6:	f001 fa39 	bl	8007c5c <memcpy>
            Result_buf[Result_buf[bluecell_length] - 1]   = RGB_DeviceStatusCheck();// Device On OFF status  Send byte
 80067ea:	f7ff fe9d 	bl	8006528 <RGB_DeviceStatusCheck>
 80067ee:	f89d 3006 	ldrb.w	r3, [sp, #6]
 80067f2:	aa1a      	add	r2, sp, #104	; 0x68
 80067f4:	4413      	add	r3, r2
 80067f6:	f803 0c65 	strb.w	r0, [r3, #-101]
            Result_buf[Result_buf[bluecell_length] + 0]   = Lora_Buf[bluecell_srcid + 2];
 80067fa:	f89d 3006 	ldrb.w	r3, [sp, #6]
            Result_buf[Result_buf[bluecell_length] + 1]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 80067fe:	f10d 0005 	add.w	r0, sp, #5
            Result_buf[Result_buf[bluecell_length] + 0]   = Lora_Buf[bluecell_srcid + 2];
 8006802:	4413      	add	r3, r2
 8006804:	4a73      	ldr	r2, [pc, #460]	; (80069d4 <RGB_Controller_Func+0x308>)
 8006806:	7952      	ldrb	r2, [r2, #5]
 8006808:	f803 2c64 	strb.w	r2, [r3, #-100]
            Result_buf[Result_buf[bluecell_length] + 1]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 800680c:	f89d 4006 	ldrb.w	r4, [sp, #6]
 8006810:	4621      	mov	r1, r4
 8006812:	f001 f86e 	bl	80078f2 <STH30_CreateCrc>
 8006816:	ab1a      	add	r3, sp, #104	; 0x68
 8006818:	441c      	add	r4, r3
 800681a:	f804 0c63 	strb.w	r0, [r4, #-99]
            Result_buf[Result_buf[bluecell_length] + 2]   = 0xeb;
 800681e:	f89d 3006 	ldrb.w	r3, [sp, #6]
 8006822:	aa1a      	add	r2, sp, #104	; 0x68
 8006824:	4413      	add	r3, r2
 8006826:	22eb      	movs	r2, #235	; 0xeb
 8006828:	f803 2c62 	strb.w	r2, [r3, #-98]
            break;
 800682c:	e79f      	b.n	800676e <RGB_Controller_Func+0xa2>
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
 800682e:	78a2      	ldrb	r2, [r4, #2]
 8006830:	4621      	mov	r1, r4
 8006832:	3203      	adds	r2, #3
 8006834:	a801      	add	r0, sp, #4
 8006836:	f001 fa11 	bl	8007c5c <memcpy>
            RGB_SensorRedLimit_Buf[data[bluecell_dstid]]   = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]);
 800683a:	7922      	ldrb	r2, [r4, #4]
 800683c:	7963      	ldrb	r3, [r4, #5]
 800683e:	7aa1      	ldrb	r1, [r4, #10]
 8006840:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 8006844:	4a64      	ldr	r2, [pc, #400]	; (80069d8 <RGB_Controller_Func+0x30c>)
            Result_buf[bluecell_crc]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 8006846:	f10d 0005 	add.w	r0, sp, #5
            RGB_SensorRedLimit_Buf[data[bluecell_dstid]]   = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]);
 800684a:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            RGB_SensorGreenLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_green_H] << 8) |data[bluecell_green_L]);
 800684e:	79a2      	ldrb	r2, [r4, #6]
 8006850:	79e3      	ldrb	r3, [r4, #7]
 8006852:	7aa1      	ldrb	r1, [r4, #10]
 8006854:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 8006858:	4a60      	ldr	r2, [pc, #384]	; (80069dc <RGB_Controller_Func+0x310>)
 800685a:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            RGB_SensorBlueLimit_Buf[data[bluecell_dstid]]  = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]);        
 800685e:	7a22      	ldrb	r2, [r4, #8]
 8006860:	7a63      	ldrb	r3, [r4, #9]
 8006862:	7aa1      	ldrb	r1, [r4, #10]
 8006864:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
 8006868:	4a5d      	ldr	r2, [pc, #372]	; (80069e0 <RGB_Controller_Func+0x314>)
 800686a:	f822 3011 	strh.w	r3, [r2, r1, lsl #1]
            Result_buf[bluecell_crc]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 800686e:	f89d 1006 	ldrb.w	r1, [sp, #6]
 8006872:	f001 f83e 	bl	80078f2 <STH30_CreateCrc>
 8006876:	f88d 000f 	strb.w	r0, [sp, #15]
            break;
 800687a:	e778      	b.n	800676e <RGB_Controller_Func+0xa2>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 800687c:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8006880:	4958      	ldr	r1, [pc, #352]	; (80069e4 <RGB_Controller_Func+0x318>)
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 8006882:	4b59      	ldr	r3, [pc, #356]	; (80069e8 <RGB_Controller_Func+0x31c>)
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8006884:	68ca      	ldr	r2, [r1, #12]
 8006886:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 800688a:	4313      	orrs	r3, r2
 800688c:	60cb      	str	r3, [r1, #12]
 800688e:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("nop");
 8006892:	bf00      	nop
 8006894:	e7fd      	b.n	8006892 <RGB_Controller_Func+0x1c6>
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
 8006896:	78a2      	ldrb	r2, [r4, #2]
 8006898:	4621      	mov	r1, r4
 800689a:	3203      	adds	r2, #3
 800689c:	a801      	add	r0, sp, #4
 800689e:	f001 f9dd 	bl	8007c5c <memcpy>
            break;
 80068a2:	e764      	b.n	800676e <RGB_Controller_Func+0xa2>
            Result_buf[bluecell_type] = RGB_Location_Response;
 80068a4:	230f      	movs	r3, #15
 80068a6:	f88d 3005 	strb.w	r3, [sp, #5]
            Result_buf[bluecell_srcid] = data[bluecell_srcid];
 80068aa:	78e3      	ldrb	r3, [r4, #3]
 80068ac:	f88d 3007 	strb.w	r3, [sp, #7]
            break;
 80068b0:	e75d      	b.n	800676e <RGB_Controller_Func+0xa2>
            Result_buf[bluecell_stx]         = 0xbe;
 80068b2:	23be      	movs	r3, #190	; 0xbe
 80068b4:	f88d 3004 	strb.w	r3, [sp, #4]
            Result_buf[bluecell_type]        = RGB_ControllerID_GET;
 80068b8:	2310      	movs	r3, #16
            Result_buf[bluecell_length]      = 3;
 80068ba:	2103      	movs	r1, #3
            Result_buf[bluecell_type]        = RGB_ControllerID_GET;
 80068bc:	f88d 3005 	strb.w	r3, [sp, #5]
            Result_buf[bluecell_srcid]       = MyControllerID;      
 80068c0:	4b42      	ldr	r3, [pc, #264]	; (80069cc <RGB_Controller_Func+0x300>)
            Result_buf[bluecell_srcid + 1]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 80068c2:	f10d 0005 	add.w	r0, sp, #5
            Result_buf[bluecell_srcid]       = MyControllerID;      
 80068c6:	781b      	ldrb	r3, [r3, #0]
            Result_buf[bluecell_length]      = 3;
 80068c8:	f88d 1006 	strb.w	r1, [sp, #6]
            Result_buf[bluecell_srcid]       = MyControllerID;      
 80068cc:	f88d 3007 	strb.w	r3, [sp, #7]
            Result_buf[bluecell_srcid + 1]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 80068d0:	f001 f80f 	bl	80078f2 <STH30_CreateCrc>
            Result_buf[bluecell_srcid + 2]   = 0xeb;
 80068d4:	23eb      	movs	r3, #235	; 0xeb
            Result_buf[bluecell_srcid + 1]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 80068d6:	f88d 0008 	strb.w	r0, [sp, #8]
            Result_buf[bluecell_srcid + 2]   = 0xeb;
 80068da:	f88d 3009 	strb.w	r3, [sp, #9]
            break;
 80068de:	e746      	b.n	800676e <RGB_Controller_Func+0xa2>
            Result_buf[bluecell_stx]         = 0xbe;
 80068e0:	23be      	movs	r3, #190	; 0xbe
 80068e2:	f88d 3004 	strb.w	r3, [sp, #4]
            Result_buf[bluecell_type]        = RGB_ControllerLimitGet;
 80068e6:	2312      	movs	r3, #18
            Result_buf[bluecell_length]      = 8;
 80068e8:	2108      	movs	r1, #8
            Result_buf[bluecell_type]        = RGB_ControllerLimitGet;
 80068ea:	f88d 3005 	strb.w	r3, [sp, #5]
            Result_buf[bluecell_srcid + 0]   = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]]   & 0xFF00) >> 8;      
 80068ee:	4a3a      	ldr	r2, [pc, #232]	; (80069d8 <RGB_Controller_Func+0x30c>)
 80068f0:	78e3      	ldrb	r3, [r4, #3]
            Result_buf[bluecell_length]      = 8;
 80068f2:	f88d 1006 	strb.w	r1, [sp, #6]
            Result_buf[bluecell_srcid + 0]   = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]]   & 0xFF00) >> 8;      
 80068f6:	f832 2013 	ldrh.w	r2, [r2, r3, lsl #1]
 80068fa:	fa22 f001 	lsr.w	r0, r2, r1
            Result_buf[bluecell_srcid + 1]   = RGB_SensorRedLimit_Buf[data[bluecell_srcid]]   & 0x00FF;  
 80068fe:	f88d 2008 	strb.w	r2, [sp, #8]
            Result_buf[bluecell_srcid + 2]   = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;      
 8006902:	4a36      	ldr	r2, [pc, #216]	; (80069dc <RGB_Controller_Func+0x310>)
            Result_buf[bluecell_srcid + 0]   = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]]   & 0xFF00) >> 8;      
 8006904:	f88d 0007 	strb.w	r0, [sp, #7]
            Result_buf[bluecell_srcid + 2]   = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;      
 8006908:	f832 2013 	ldrh.w	r2, [r2, r3, lsl #1]
 800690c:	fa22 f001 	lsr.w	r0, r2, r1
            Result_buf[bluecell_srcid + 3]   = RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0x00FF;
 8006910:	f88d 200a 	strb.w	r2, [sp, #10]
            Result_buf[bluecell_srcid + 4]   = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]]  & 0xFF00) >> 8;      
 8006914:	4a32      	ldr	r2, [pc, #200]	; (80069e0 <RGB_Controller_Func+0x314>)
            Result_buf[bluecell_srcid + 2]   = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8;      
 8006916:	f88d 0009 	strb.w	r0, [sp, #9]
            Result_buf[bluecell_srcid + 4]   = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]]  & 0xFF00) >> 8;      
 800691a:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
            Result_buf[bluecell_srcid + 6]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 800691e:	f10d 0005 	add.w	r0, sp, #5
            Result_buf[bluecell_srcid + 4]   = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]]  & 0xFF00) >> 8;      
 8006922:	fa23 f201 	lsr.w	r2, r3, r1
            Result_buf[bluecell_srcid + 5]   = RGB_SensorBlueLimit_Buf[data[bluecell_srcid]]  & 0x00FF;
 8006926:	f88d 300c 	strb.w	r3, [sp, #12]
            Result_buf[bluecell_srcid + 4]   = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]]  & 0xFF00) >> 8;      
 800692a:	f88d 200b 	strb.w	r2, [sp, #11]
            Result_buf[bluecell_srcid + 6]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 800692e:	f000 ffe0 	bl	80078f2 <STH30_CreateCrc>
            Result_buf[bluecell_srcid + 7]   = 0xeb;
 8006932:	23eb      	movs	r3, #235	; 0xeb
            Result_buf[bluecell_srcid + 6]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 8006934:	f88d 000d 	strb.w	r0, [sp, #13]
            Result_buf[bluecell_srcid + 7]   = 0xeb;
 8006938:	f88d 300e 	strb.w	r3, [sp, #14]
            break;
 800693c:	e717      	b.n	800676e <RGB_Controller_Func+0xa2>
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
 800693e:	78a2      	ldrb	r2, [r4, #2]
 8006940:	4621      	mov	r1, r4
 8006942:	3203      	adds	r2, #3
 8006944:	a801      	add	r0, sp, #4
 8006946:	f001 f989 	bl	8007c5c <memcpy>
            Result_buf[bluecell_type] = RGB_Lora_DataResponse;
 800694a:	2316      	movs	r3, #22
 800694c:	f88d 3005 	strb.w	r3, [sp, #5]
            break;
 8006950:	e70d      	b.n	800676e <RGB_Controller_Func+0xa2>
            SX1276_hw_Reset(&SX1276_hw);
 8006952:	4826      	ldr	r0, [pc, #152]	; (80069ec <RGB_Controller_Func+0x320>)
 8006954:	f000 f893 	bl	8006a7e <SX1276_hw_Reset>
            memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3);
 8006958:	78a5      	ldrb	r5, [r4, #2]
 800695a:	4621      	mov	r1, r4
 800695c:	3503      	adds	r5, #3
 800695e:	462a      	mov	r2, r5
 8006960:	a801      	add	r0, sp, #4
 8006962:	f001 f97b 	bl	8007c5c <memcpy>
            data[(data[bluecell_length] + 3)]=STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 8006966:	f89d 1006 	ldrb.w	r1, [sp, #6]
 800696a:	f10d 0005 	add.w	r0, sp, #5
 800696e:	f000 ffc0 	bl	80078f2 <STH30_CreateCrc>
 8006972:	5560      	strb	r0, [r4, r5]
            break;
 8006974:	e6fb      	b.n	800676e <RGB_Controller_Func+0xa2>
            Result_buf[bluecell_stx]         = 0xbe;
 8006976:	23be      	movs	r3, #190	; 0xbe
 8006978:	f88d 3004 	strb.w	r3, [sp, #4]
            Result_buf[bluecell_type]        = RGB_ControllerLimitGet;
 800697c:	2312      	movs	r3, #18
            Result_buf[bluecell_length]      = 7;
 800697e:	2107      	movs	r1, #7
            Result_buf[bluecell_type]        = RGB_ControllerLimitGet;
 8006980:	f88d 3005 	strb.w	r3, [sp, #5]
            Result_buf[bluecell_srcid + 0]   = SX1276.frequency;
 8006984:	4b1a      	ldr	r3, [pc, #104]	; (80069f0 <RGB_Controller_Func+0x324>)
            Result_buf[bluecell_srcid + 5]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 8006986:	f10d 0005 	add.w	r0, sp, #5
            Result_buf[bluecell_srcid + 0]   = SX1276.frequency;
 800698a:	791a      	ldrb	r2, [r3, #4]
            Result_buf[bluecell_length]      = 7;
 800698c:	f88d 1006 	strb.w	r1, [sp, #6]
            Result_buf[bluecell_srcid + 0]   = SX1276.frequency;
 8006990:	f88d 2007 	strb.w	r2, [sp, #7]
            Result_buf[bluecell_srcid + 1]   = SX1276.LoRa_Pa_boost;            
 8006994:	7a5a      	ldrb	r2, [r3, #9]
 8006996:	f88d 2008 	strb.w	r2, [sp, #8]
            Result_buf[bluecell_srcid + 2]   = SX1276.LoRa_BW;
 800699a:	79da      	ldrb	r2, [r3, #7]
 800699c:	f88d 2009 	strb.w	r2, [sp, #9]
            Result_buf[bluecell_srcid + 3]   = SX1276.LoRa_Rate;
 80069a0:	799a      	ldrb	r2, [r3, #6]
            Result_buf[bluecell_srcid + 4]   = SX1276.LoRa_Lna;
 80069a2:	7a1b      	ldrb	r3, [r3, #8]
            Result_buf[bluecell_srcid + 3]   = SX1276.LoRa_Rate;
 80069a4:	f88d 200a 	strb.w	r2, [sp, #10]
            Result_buf[bluecell_srcid + 4]   = SX1276.LoRa_Lna;
 80069a8:	f88d 300b 	strb.w	r3, [sp, #11]
            Result_buf[bluecell_srcid + 5]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 80069ac:	f000 ffa1 	bl	80078f2 <STH30_CreateCrc>
            Result_buf[bluecell_srcid + 6]   = 0xeb;
 80069b0:	23eb      	movs	r3, #235	; 0xeb
            Result_buf[bluecell_srcid + 5]   = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]);
 80069b2:	f88d 000c 	strb.w	r0, [sp, #12]
            Result_buf[bluecell_srcid + 6]   = 0xeb;
 80069b6:	f88d 300d 	strb.w	r3, [sp, #13]
            break;
 80069ba:	e6d8      	b.n	800676e <RGB_Controller_Func+0xa2>
 80069bc:	20000343 	.word	0x20000343
 80069c0:	200002fa 	.word	0x200002fa
 80069c4:	200002fb 	.word	0x200002fb
 80069c8:	2000033a 	.word	0x2000033a
 80069cc:	20000350 	.word	0x20000350
 80069d0:	08008d9a 	.word	0x08008d9a
 80069d4:	2000009d 	.word	0x2000009d
 80069d8:	200002e8 	.word	0x200002e8
 80069dc:	200002d6 	.word	0x200002d6
 80069e0:	200002c4 	.word	0x200002c4
 80069e4:	e000ed00 	.word	0xe000ed00
 80069e8:	05fa0004 	.word	0x05fa0004
 80069ec:	200004f8 	.word	0x200004f8
 80069f0:	2000074c 	.word	0x2000074c

080069f4 <SX1276_hw_SetNSS>:
	SX1276_hw_SetNSS(hw, 1);
	HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
}

__weak void SX1276_hw_SetNSS(SX1276_hw_t * hw, int value) {
	HAL_GPIO_WritePin(hw->nss.port, hw->nss.pin,
 80069f4:	1e4b      	subs	r3, r1, #1
 80069f6:	425a      	negs	r2, r3
 80069f8:	8a01      	ldrh	r1, [r0, #16]
 80069fa:	415a      	adcs	r2, r3
 80069fc:	6940      	ldr	r0, [r0, #20]
 80069fe:	f7fd bf8d 	b.w	800491c <HAL_GPIO_WritePin>

08006a02 <SX1276_hw_init>:
__weak void SX1276_hw_init(SX1276_hw_t * hw) {
 8006a02:	b510      	push	{r4, lr}
 8006a04:	4604      	mov	r4, r0
	SX1276_hw_SetNSS(hw, 1);
 8006a06:	2101      	movs	r1, #1
 8006a08:	f7ff fff4 	bl	80069f4 <SX1276_hw_SetNSS>
	HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
 8006a0c:	8821      	ldrh	r1, [r4, #0]
 8006a0e:	6860      	ldr	r0, [r4, #4]
 8006a10:	2201      	movs	r2, #1
}
 8006a12:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
 8006a16:	f7fd bf81 	b.w	800491c <HAL_GPIO_WritePin>

08006a1a <SX1276_hw_SPICommand>:
	HAL_SPI_Transmit(hw->spi, &cmd, 1, 1000);
	while (HAL_SPI_GetState(hw->spi) != HAL_SPI_STATE_READY)
		;
}
#endif // PYJ.2019.04.01_END -- 
void SX1276_hw_SPICommand(SX1276_hw_t * hw, uint8_t cmd) {
 8006a1a:	b510      	push	{r4, lr}
 8006a1c:	460c      	mov	r4, r1
	SX1276_hw_SetNSS(hw, 0);
 8006a1e:	2100      	movs	r1, #0
 8006a20:	f7ff ffe8 	bl	80069f4 <SX1276_hw_SetNSS>
	BLUECELL_SPI_Transmit(cmd);
 8006a24:	4620      	mov	r0, r4
}
 8006a26:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	BLUECELL_SPI_Transmit(cmd);
 8006a2a:	f7ff bab7 	b.w	8005f9c <BLUECELL_SPI_Transmit>

08006a2e <SX1276_SPIBurstWrite.part.1>:
		//printf("\n");
		SX1276_hw_SetNSS(module->hw, 1);
	}
}

void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf,
 8006a2e:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8006a30:	460e      	mov	r6, r1
 8006a32:	4604      	mov	r4, r0
 8006a34:	461f      	mov	r7, r3
		uint8_t length) {
	uint8_t i;
	if (length <= 1) {
		return;
	} else {
		SX1276_hw_SetNSS(module->hw, 0);
 8006a36:	2100      	movs	r1, #0
 8006a38:	6800      	ldr	r0, [r0, #0]
void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf,
 8006a3a:	4615      	mov	r5, r2
		SX1276_hw_SetNSS(module->hw, 0);
 8006a3c:	f7ff ffda 	bl	80069f4 <SX1276_hw_SetNSS>
		SX1276_hw_SPICommand(module->hw, addr | 0x80);
 8006a40:	f046 0180 	orr.w	r1, r6, #128	; 0x80
 8006a44:	6820      	ldr	r0, [r4, #0]
 8006a46:	f7ff ffe8 	bl	8006a1a <SX1276_hw_SPICommand>
 8006a4a:	3f01      	subs	r7, #1
 8006a4c:	1e6e      	subs	r6, r5, #1
 8006a4e:	443d      	add	r5, r7
//        printf("Test Data:");
		for (i = 0; i < length; i++) {
 8006a50:	42ae      	cmp	r6, r5
 8006a52:	d104      	bne.n	8006a5e <SX1276_SPIBurstWrite.part.1+0x30>
			SX1276_hw_SPICommand(module->hw, txBuf[i]);
//            printf("%02x ",txBuf[i]);
		}
//        printf("\n");
		SX1276_hw_SetNSS(module->hw, 1);
 8006a54:	2101      	movs	r1, #1
 8006a56:	6820      	ldr	r0, [r4, #0]
 8006a58:	f7ff ffcc 	bl	80069f4 <SX1276_hw_SetNSS>
 8006a5c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
			SX1276_hw_SPICommand(module->hw, txBuf[i]);
 8006a5e:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8006a62:	6820      	ldr	r0, [r4, #0]
 8006a64:	f7ff ffd9 	bl	8006a1a <SX1276_hw_SPICommand>
 8006a68:	e7f2      	b.n	8006a50 <SX1276_SPIBurstWrite.part.1+0x22>

08006a6a <SX1276_hw_SPIReadByte>:
uint8_t SX1276_hw_SPIReadByte(SX1276_hw_t * hw) {
 8006a6a:	b508      	push	{r3, lr}
	SX1276_hw_SetNSS(hw, 0);
 8006a6c:	2100      	movs	r1, #0
 8006a6e:	f7ff ffc1 	bl	80069f4 <SX1276_hw_SetNSS>
    rxByte = SpiRead();
 8006a72:	f7ff fa6d 	bl	8005f50 <SpiRead>
}
 8006a76:	b2c0      	uxtb	r0, r0
 8006a78:	bd08      	pop	{r3, pc}

08006a7a <SX1276_hw_DelayMs>:
	HAL_Delay(msec);
 8006a7a:	f7fd bc1b 	b.w	80042b4 <HAL_Delay>

08006a7e <SX1276_hw_Reset>:
__weak void SX1276_hw_Reset(SX1276_hw_t * hw) {
 8006a7e:	b510      	push	{r4, lr}
 8006a80:	4604      	mov	r4, r0
	SX1276_hw_SetNSS(hw, 1);
 8006a82:	2101      	movs	r1, #1
 8006a84:	f7ff ffb6 	bl	80069f4 <SX1276_hw_SetNSS>
	HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_RESET);
 8006a88:	8821      	ldrh	r1, [r4, #0]
 8006a8a:	2200      	movs	r2, #0
 8006a8c:	6860      	ldr	r0, [r4, #4]
 8006a8e:	f7fd ff45 	bl	800491c <HAL_GPIO_WritePin>
	SX1276_hw_DelayMs(1);
 8006a92:	2001      	movs	r0, #1
 8006a94:	f7ff fff1 	bl	8006a7a <SX1276_hw_DelayMs>
	HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET);
 8006a98:	6860      	ldr	r0, [r4, #4]
 8006a9a:	2201      	movs	r2, #1
 8006a9c:	8821      	ldrh	r1, [r4, #0]
 8006a9e:	f7fd ff3d 	bl	800491c <HAL_GPIO_WritePin>
	SX1276_hw_DelayMs(100);
 8006aa2:	2064      	movs	r0, #100	; 0x64
 8006aa4:	f7ff ffe9 	bl	8006a7a <SX1276_hw_DelayMs>
 8006aa8:	bd10      	pop	{r4, pc}

08006aaa <SX1276_hw_GetDIO0>:
__weak int SX1276_hw_GetDIO0(SX1276_hw_t * hw) {
 8006aaa:	b508      	push	{r3, lr}
	return (HAL_GPIO_ReadPin(hw->dio0.port, hw->dio0.pin) == GPIO_PIN_SET);
 8006aac:	8901      	ldrh	r1, [r0, #8]
 8006aae:	68c0      	ldr	r0, [r0, #12]
 8006ab0:	f7fd ff2e 	bl	8004910 <HAL_GPIO_ReadPin>
}
 8006ab4:	1e43      	subs	r3, r0, #1
 8006ab6:	4258      	negs	r0, r3
 8006ab8:	4158      	adcs	r0, r3
 8006aba:	bd08      	pop	{r3, pc}

08006abc <SX1276_SPIIDRead>:
uint8_t SX1276_SPIIDRead(SX1276_t * module, uint8_t addr) {
 8006abc:	b538      	push	{r3, r4, r5, lr}
 8006abe:	4604      	mov	r4, r0
	SX1276_hw_SPICommand(module->hw, addr);
 8006ac0:	6800      	ldr	r0, [r0, #0]
 8006ac2:	f7ff ffaa 	bl	8006a1a <SX1276_hw_SPICommand>
	tmp = SX1276_hw_SPIReadByte(module->hw);
 8006ac6:	6820      	ldr	r0, [r4, #0]
 8006ac8:	f7ff ffcf 	bl	8006a6a <SX1276_hw_SPIReadByte>
 8006acc:	4605      	mov	r5, r0
	SX1276_hw_SetNSS(module->hw, 1);
 8006ace:	2101      	movs	r1, #1
 8006ad0:	6820      	ldr	r0, [r4, #0]
 8006ad2:	f7ff ff8f 	bl	80069f4 <SX1276_hw_SetNSS>
}
 8006ad6:	4628      	mov	r0, r5
 8006ad8:	bd38      	pop	{r3, r4, r5, pc}

08006ada <SX1276_SPIWrite>:
void SX1276_SPIWrite(SX1276_t * module, uint8_t addr, uint8_t cmd) {
 8006ada:	b570      	push	{r4, r5, r6, lr}
 8006adc:	4604      	mov	r4, r0
 8006ade:	460e      	mov	r6, r1
 8006ae0:	4615      	mov	r5, r2
	SX1276_hw_SetNSS(module->hw, 0);
 8006ae2:	2100      	movs	r1, #0
 8006ae4:	6800      	ldr	r0, [r0, #0]
 8006ae6:	f7ff ff85 	bl	80069f4 <SX1276_hw_SetNSS>
	SX1276_hw_SPICommand(module->hw, addr | 0x80);
 8006aea:	f046 0180 	orr.w	r1, r6, #128	; 0x80
 8006aee:	6820      	ldr	r0, [r4, #0]
 8006af0:	f7ff ff93 	bl	8006a1a <SX1276_hw_SPICommand>
	SX1276_hw_SPICommand(module->hw, cmd);
 8006af4:	4629      	mov	r1, r5
 8006af6:	6820      	ldr	r0, [r4, #0]
 8006af8:	f7ff ff8f 	bl	8006a1a <SX1276_hw_SPICommand>
	SX1276_hw_SetNSS(module->hw, 1);
 8006afc:	2101      	movs	r1, #1
 8006afe:	6820      	ldr	r0, [r4, #0]
 8006b00:	f7ff ff78 	bl	80069f4 <SX1276_hw_SetNSS>
 8006b04:	bd70      	pop	{r4, r5, r6, pc}

08006b06 <SX1276_SPIBurstRead>:
	if (length <= 1) {
 8006b06:	2b01      	cmp	r3, #1
		uint8_t length) {
 8006b08:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8006b0a:	4605      	mov	r5, r0
 8006b0c:	460f      	mov	r7, r1
 8006b0e:	4616      	mov	r6, r2
 8006b10:	461c      	mov	r4, r3
	if (length <= 1) {
 8006b12:	d916      	bls.n	8006b42 <SX1276_SPIBurstRead+0x3c>
		SX1276_hw_SetNSS(module->hw, 0);
 8006b14:	2100      	movs	r1, #0
 8006b16:	6800      	ldr	r0, [r0, #0]
 8006b18:	f7ff ff6c 	bl	80069f4 <SX1276_hw_SetNSS>
		SX1276_hw_SPICommand(module->hw, addr);
 8006b1c:	4639      	mov	r1, r7
 8006b1e:	6828      	ldr	r0, [r5, #0]
 8006b20:	f7ff ff7b 	bl	8006a1a <SX1276_hw_SPICommand>
 8006b24:	3c01      	subs	r4, #1
 8006b26:	b2e4      	uxtb	r4, r4
 8006b28:	1e77      	subs	r7, r6, #1
 8006b2a:	4434      	add	r4, r6
			rxBuf[i] = SX1276_hw_SPIReadByte(module->hw);
 8006b2c:	6828      	ldr	r0, [r5, #0]
 8006b2e:	f7ff ff9c 	bl	8006a6a <SX1276_hw_SPIReadByte>
 8006b32:	f807 0f01 	strb.w	r0, [r7, #1]!
		for (i = 0; i < length; i++) {
 8006b36:	42a7      	cmp	r7, r4
 8006b38:	d1f8      	bne.n	8006b2c <SX1276_SPIBurstRead+0x26>
		SX1276_hw_SetNSS(module->hw, 1);
 8006b3a:	2101      	movs	r1, #1
 8006b3c:	6828      	ldr	r0, [r5, #0]
 8006b3e:	f7ff ff59 	bl	80069f4 <SX1276_hw_SetNSS>
 8006b42:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

08006b44 <SX1276_SPIBurstWrite>:
	if (length <= 1) {
 8006b44:	2b01      	cmp	r3, #1
 8006b46:	d901      	bls.n	8006b4c <SX1276_SPIBurstWrite+0x8>
 8006b48:	f7ff bf71 	b.w	8006a2e <SX1276_SPIBurstWrite.part.1>
 8006b4c:	4770      	bx	lr

08006b4e <SX1276_set_power>:
*/

void SX1276_set_power(SX1276_t * module)
{
//    SX1276_SPIWrite(LR_RegPaConfig, (PaSelect << 7) | ((MaxPower & 0x07) << 4) | (OutputPower & 0x0F));
    SX1276_SPIWrite(module,LR_RegPaConfig, (module->LoRa_Pa_boost << 7) | ((0x07) << 4) | (module->power & 0x0F));
 8006b4e:	7942      	ldrb	r2, [r0, #5]
 8006b50:	7a43      	ldrb	r3, [r0, #9]
 8006b52:	f002 020f 	and.w	r2, r2, #15
 8006b56:	f042 0270 	orr.w	r2, r2, #112	; 0x70
 8006b5a:	ea42 12c3 	orr.w	r2, r2, r3, lsl #7
 8006b5e:	b2d2      	uxtb	r2, r2
 8006b60:	2109      	movs	r1, #9
 8006b62:	f7ff bfba 	b.w	8006ada <SX1276_SPIWrite>

08006b66 <SX1276_standby>:
	SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01
	module->readBytes = 0;
	SX1276_standby(module); //Entry standby mode
}

void SX1276_standby(SX1276_t * module) {
 8006b66:	b510      	push	{r4, lr}
	SX1276_SPIWrite(module, LR_RegOpMode, 0x09);
 8006b68:	2209      	movs	r2, #9
 8006b6a:	2101      	movs	r1, #1
void SX1276_standby(SX1276_t * module) {
 8006b6c:	4604      	mov	r4, r0
	SX1276_SPIWrite(module, LR_RegOpMode, 0x09);
 8006b6e:	f7ff ffb4 	bl	8006ada <SX1276_SPIWrite>
	module->status = STANDBY;
 8006b72:	2301      	movs	r3, #1
 8006b74:	72e3      	strb	r3, [r4, #11]
 8006b76:	bd10      	pop	{r4, pc}

08006b78 <SX1276_sleep>:
}

void SX1276_sleep(SX1276_t * module) {
 8006b78:	b510      	push	{r4, lr}
	SX1276_SPIWrite(module, LR_RegOpMode, 0x08);
 8006b7a:	2208      	movs	r2, #8
 8006b7c:	2101      	movs	r1, #1
void SX1276_sleep(SX1276_t * module) {
 8006b7e:	4604      	mov	r4, r0
	SX1276_SPIWrite(module, LR_RegOpMode, 0x08);
 8006b80:	f7ff ffab 	bl	8006ada <SX1276_SPIWrite>
	module->status = SLEEP;
 8006b84:	2300      	movs	r3, #0
 8006b86:	72e3      	strb	r3, [r4, #11]
 8006b88:	bd10      	pop	{r4, pc}

08006b8a <SX1276_entryLoRa>:
}

void SX1276_entryLoRa(SX1276_t * module) {
	SX1276_SPIWrite(module, LR_RegOpMode, 0x88);
 8006b8a:	2288      	movs	r2, #136	; 0x88
 8006b8c:	2101      	movs	r1, #1
 8006b8e:	f7ff bfa4 	b.w	8006ada <SX1276_SPIWrite>
	...

08006b94 <SX1276_config>:
		uint8_t LoRa_Rate, uint8_t LoRa_BW,uint8_t LoRa_Lna,uint8_t LoRa_PaBoost) {
 8006b94:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8006b98:	4604      	mov	r4, r0
 8006b9a:	460d      	mov	r5, r1
 8006b9c:	4691      	mov	r9, r2
 8006b9e:	461f      	mov	r7, r3
 8006ba0:	f89d 6020 	ldrb.w	r6, [sp, #32]
 8006ba4:	f89d 8024 	ldrb.w	r8, [sp, #36]	; 0x24
	SX1276_sleep(module); //Change modem mode Must in Sleep mode
 8006ba8:	f7ff ffe6 	bl	8006b78 <SX1276_sleep>
	SX1276_hw_DelayMs(15);
 8006bac:	200f      	movs	r0, #15
 8006bae:	f7ff ff64 	bl	8006a7a <SX1276_hw_DelayMs>
	SX1276_entryLoRa(module);
 8006bb2:	4620      	mov	r0, r4
 8006bb4:	f7ff ffe9 	bl	8006b8a <SX1276_entryLoRa>
 8006bb8:	4a34      	ldr	r2, [pc, #208]	; (8006c8c <SX1276_config+0xf8>)
			(uint8_t*) SX1276_Frequency[frequency], 3); //setting  frequency parameter
 8006bba:	eb05 0545 	add.w	r5, r5, r5, lsl #1
 8006bbe:	442a      	add	r2, r5
 8006bc0:	2303      	movs	r3, #3
 8006bc2:	2106      	movs	r1, #6
 8006bc4:	4620      	mov	r0, r4
 8006bc6:	f7ff ff32 	bl	8006a2e <SX1276_SPIBurstWrite.part.1>
	SX1276_SPIWrite(module, LR_RegPaConfig, SX1276_Power[power]); //Setting output power parameter
 8006bca:	4b31      	ldr	r3, [pc, #196]	; (8006c90 <SX1276_config+0xfc>)
 8006bcc:	2109      	movs	r1, #9
 8006bce:	f813 2009 	ldrb.w	r2, [r3, r9]
 8006bd2:	4620      	mov	r0, r4
 8006bd4:	f7ff ff81 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegOcp, 0x0B);			//RegOcp,Close Ocp
 8006bd8:	220b      	movs	r2, #11
 8006bda:	4620      	mov	r0, r4
 8006bdc:	4611      	mov	r1, r2
 8006bde:	f7ff ff7c 	bl	8006ada <SX1276_SPIWrite>
    SX1276_set_power(module);
 8006be2:	4620      	mov	r0, r4
 8006be4:	f7ff ffb3 	bl	8006b4e <SX1276_set_power>
    SX1276_SPIWrite(module, LR_RegLna, LoRa_Lna);       //RegLNA,High & LNA Enable
 8006be8:	4642      	mov	r2, r8
 8006bea:	210c      	movs	r1, #12
 8006bec:	4620      	mov	r0, r4
 8006bee:	f7ff ff74 	bl	8006ada <SX1276_SPIWrite>
	if (SX1276_SpreadFactor[LoRa_Rate] == 6) {	//SFactor=6
 8006bf2:	4b28      	ldr	r3, [pc, #160]	; (8006c94 <SX1276_config+0x100>)
 8006bf4:	5ddd      	ldrb	r5, [r3, r7]
 8006bf6:	4b28      	ldr	r3, [pc, #160]	; (8006c98 <SX1276_config+0x104>)
 8006bf8:	2d06      	cmp	r5, #6
				((SX1276_LoRaBandwidth[LoRa_BW] << 4) + (SX1276_CR << 1) + 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04)
 8006bfa:	5d9a      	ldrb	r2, [r3, r6]
 8006bfc:	ea4f 1202 	mov.w	r2, r2, lsl #4
	if (SX1276_SpreadFactor[LoRa_Rate] == 6) {	//SFactor=6
 8006c00:	d137      	bne.n	8006c72 <SX1276_config+0xde>
		SX1276_SPIWrite(module,
 8006c02:	3203      	adds	r2, #3
 8006c04:	b2d2      	uxtb	r2, r2
 8006c06:	211d      	movs	r1, #29
 8006c08:	4620      	mov	r0, r4
 8006c0a:	f7ff ff66 	bl	8006ada <SX1276_SPIWrite>
		SX1276_SPIWrite(module,
 8006c0e:	2267      	movs	r2, #103	; 0x67
 8006c10:	211e      	movs	r1, #30
 8006c12:	4620      	mov	r0, r4
 8006c14:	f7ff ff61 	bl	8006ada <SX1276_SPIWrite>
		tmp = SX1276_SPIRead(module, 0x31);
 8006c18:	2131      	movs	r1, #49	; 0x31
 8006c1a:	4620      	mov	r0, r4
 8006c1c:	f7ff ff4e 	bl	8006abc <SX1276_SPIIDRead>
		tmp &= 0xF8;
 8006c20:	f000 02f8 	and.w	r2, r0, #248	; 0xf8
		SX1276_SPIWrite(module, 0x31, tmp);
 8006c24:	f042 0205 	orr.w	r2, r2, #5
 8006c28:	2131      	movs	r1, #49	; 0x31
 8006c2a:	4620      	mov	r0, r4
 8006c2c:	f7ff ff55 	bl	8006ada <SX1276_SPIWrite>
		SX1276_SPIWrite(module, 0x37, 0x0C);
 8006c30:	220c      	movs	r2, #12
 8006c32:	2137      	movs	r1, #55	; 0x37
		SX1276_SPIWrite(module,
 8006c34:	4620      	mov	r0, r4
 8006c36:	f7ff ff50 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegSymbTimeoutLsb, 0xFF); //RegSymbTimeoutLsb Timeout = 0x3FF(Max)
 8006c3a:	4620      	mov	r0, r4
 8006c3c:	22ff      	movs	r2, #255	; 0xff
 8006c3e:	211f      	movs	r1, #31
 8006c40:	f7ff ff4b 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegPreambleMsb, 0x00); //RegPreambleMsb
 8006c44:	4620      	mov	r0, r4
 8006c46:	2200      	movs	r2, #0
 8006c48:	2120      	movs	r1, #32
 8006c4a:	f7ff ff46 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegPreambleLsb, 12); //RegPreambleLsb 8+4=12byte Preamble
 8006c4e:	4620      	mov	r0, r4
 8006c50:	220c      	movs	r2, #12
 8006c52:	2121      	movs	r1, #33	; 0x21
 8006c54:	f7ff ff41 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01
 8006c58:	4620      	mov	r0, r4
 8006c5a:	2201      	movs	r2, #1
 8006c5c:	2141      	movs	r1, #65	; 0x41
 8006c5e:	f7ff ff3c 	bl	8006ada <SX1276_SPIWrite>
	module->readBytes = 0;
 8006c62:	2300      	movs	r3, #0
	SX1276_standby(module); //Entry standby mode
 8006c64:	4620      	mov	r0, r4
	module->readBytes = 0;
 8006c66:	f884 310c 	strb.w	r3, [r4, #268]	; 0x10c
}
 8006c6a:	e8bd 43f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
	SX1276_standby(module); //Entry standby mode
 8006c6e:	f7ff bf7a 	b.w	8006b66 <SX1276_standby>
		SX1276_SPIWrite(module,
 8006c72:	3202      	adds	r2, #2
 8006c74:	f002 02fe 	and.w	r2, r2, #254	; 0xfe
 8006c78:	211d      	movs	r1, #29
 8006c7a:	4620      	mov	r0, r4
 8006c7c:	f7ff ff2d 	bl	8006ada <SX1276_SPIWrite>
				((SX1276_SpreadFactor[LoRa_Rate] << 4) + (SX1276_CRC << 2)
 8006c80:	012a      	lsls	r2, r5, #4
		SX1276_SPIWrite(module,
 8006c82:	3207      	adds	r2, #7
 8006c84:	b2d2      	uxtb	r2, r2
 8006c86:	211e      	movs	r1, #30
 8006c88:	e7d4      	b.n	8006c34 <SX1276_config+0xa0>
 8006c8a:	bf00      	nop
 8006c8c:	08008e44 	.word	0x08008e44
 8006c90:	08008e78 	.word	0x08008e78
 8006c94:	08008e7c 	.word	0x08008e7c
 8006c98:	08008e6e 	.word	0x08008e6e

08006c9c <SX1276_defaultConfig>:
void SX1276_defaultConfig(SX1276_t * module) {
 8006c9c:	b530      	push	{r4, r5, lr}
	SX1276_config(module, module->frequency, module->power, module->LoRa_Rate,
 8006c9e:	7a45      	ldrb	r5, [r0, #9]
void SX1276_defaultConfig(SX1276_t * module) {
 8006ca0:	b085      	sub	sp, #20
	SX1276_config(module, module->frequency, module->power, module->LoRa_Rate,
 8006ca2:	9502      	str	r5, [sp, #8]
 8006ca4:	79c4      	ldrb	r4, [r0, #7]
 8006ca6:	7a05      	ldrb	r5, [r0, #8]
 8006ca8:	7983      	ldrb	r3, [r0, #6]
 8006caa:	7942      	ldrb	r2, [r0, #5]
 8006cac:	7901      	ldrb	r1, [r0, #4]
 8006cae:	9501      	str	r5, [sp, #4]
 8006cb0:	9400      	str	r4, [sp, #0]
 8006cb2:	f7ff ff6f 	bl	8006b94 <SX1276_config>
}
 8006cb6:	b005      	add	sp, #20
 8006cb8:	bd30      	pop	{r4, r5, pc}

08006cba <SX1276_clearLoRaIrq>:
}

void SX1276_clearLoRaIrq(SX1276_t * module) {
	SX1276_SPIWrite(module, LR_RegIrqFlags, 0xFF);
 8006cba:	22ff      	movs	r2, #255	; 0xff
 8006cbc:	2112      	movs	r1, #18
 8006cbe:	f7ff bf0c 	b.w	8006ada <SX1276_SPIWrite>

08006cc2 <SX1276_LoRaEntryRx>:
}

int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) {
 8006cc2:	b570      	push	{r4, r5, r6, lr}
 8006cc4:	4604      	mov	r4, r0
 8006cc6:	460e      	mov	r6, r1
	uint8_t addr;

	module->packetLength = length;
 8006cc8:	72a1      	strb	r1, [r4, #10]
int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) {
 8006cca:	4615      	mov	r5, r2

	SX1276_defaultConfig(module);		//Setting base parameter
 8006ccc:	f7ff ffe6 	bl	8006c9c <SX1276_defaultConfig>
	SX1276_SPIWrite(module, REG_LR_PADAC, 0x84);	//Normal and RX
 8006cd0:	2284      	movs	r2, #132	; 0x84
 8006cd2:	214d      	movs	r1, #77	; 0x4d
 8006cd4:	4620      	mov	r0, r4
 8006cd6:	f7ff ff00 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegHopPeriod, 0xFF); //No FHSS
 8006cda:	22ff      	movs	r2, #255	; 0xff
 8006cdc:	2124      	movs	r1, #36	; 0x24
 8006cde:	4620      	mov	r0, r4
 8006ce0:	f7ff fefb 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x01);//DIO=00,DIO1=00,DIO2=00, DIO3=01
 8006ce4:	2201      	movs	r2, #1
 8006ce6:	2140      	movs	r1, #64	; 0x40
 8006ce8:	4620      	mov	r0, r4
 8006cea:	f7ff fef6 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0x3F);//Open RxDone interrupt & Timeout
 8006cee:	223f      	movs	r2, #63	; 0x3f
 8006cf0:	2111      	movs	r1, #17
 8006cf2:	4620      	mov	r0, r4
 8006cf4:	f7ff fef1 	bl	8006ada <SX1276_SPIWrite>
	SX1276_clearLoRaIrq(module);
 8006cf8:	4620      	mov	r0, r4
 8006cfa:	f7ff ffde 	bl	8006cba <SX1276_clearLoRaIrq>
	SX1276_SPIWrite(module, LR_RegPayloadLength, length);//Payload Length 21byte(this register must difine when the data long of one byte in SF is 6)
 8006cfe:	4632      	mov	r2, r6
 8006d00:	2122      	movs	r1, #34	; 0x22
 8006d02:	4620      	mov	r0, r4
 8006d04:	f7ff fee9 	bl	8006ada <SX1276_SPIWrite>
	addr = SX1276_SPIRead(module, LR_RegFifoRxBaseAddr); //Read RxBaseAddr
 8006d08:	210f      	movs	r1, #15
 8006d0a:	4620      	mov	r0, r4
 8006d0c:	f7ff fed6 	bl	8006abc <SX1276_SPIIDRead>
	SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr->FiFoAddrPtr
 8006d10:	210d      	movs	r1, #13
 8006d12:	4602      	mov	r2, r0
 8006d14:	4620      	mov	r0, r4
 8006d16:	f7ff fee0 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegOpMode, 0x85);	//Mode//Low Frequency Mode
 8006d1a:	2285      	movs	r2, #133	; 0x85
 8006d1c:	2101      	movs	r1, #1
 8006d1e:	4620      	mov	r0, r4
 8006d20:	f7ff fedb 	bl	8006ada <SX1276_SPIWrite>
	//SX1276_SPIWrite(module, LR_RegOpMode,0x05);	//Continuous Rx Mode //High Frequency Mode
	module->readBytes = 0;
 8006d24:	2300      	movs	r3, #0
 8006d26:	f884 310c 	strb.w	r3, [r4, #268]	; 0x10c

	while (1) {
		if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat
 8006d2a:	2118      	movs	r1, #24
 8006d2c:	4620      	mov	r0, r4
 8006d2e:	f7ff fec5 	bl	8006abc <SX1276_SPIIDRead>
 8006d32:	0743      	lsls	r3, r0, #29
 8006d34:	d503      	bpl.n	8006d3e <SX1276_LoRaEntryRx+0x7c>
			module->status = RX;
 8006d36:	2303      	movs	r3, #3
			return 1;
 8006d38:	2001      	movs	r0, #1
			module->status = RX;
 8006d3a:	72e3      	strb	r3, [r4, #11]
			return 1;
 8006d3c:	bd70      	pop	{r4, r5, r6, pc}
		}
		if (--timeout == 0) {
 8006d3e:	3d01      	subs	r5, #1
 8006d40:	d107      	bne.n	8006d52 <SX1276_LoRaEntryRx+0x90>
			SX1276_hw_Reset(module->hw);
 8006d42:	6820      	ldr	r0, [r4, #0]
 8006d44:	f7ff fe9b 	bl	8006a7e <SX1276_hw_Reset>
			SX1276_defaultConfig(module);
 8006d48:	4620      	mov	r0, r4
 8006d4a:	f7ff ffa7 	bl	8006c9c <SX1276_defaultConfig>
			return 0;
 8006d4e:	4628      	mov	r0, r5
 8006d50:	bd70      	pop	{r4, r5, r6, pc}
		}
		SX1276_hw_DelayMs(1);
 8006d52:	2001      	movs	r0, #1
 8006d54:	f7ff fe91 	bl	8006a7a <SX1276_hw_DelayMs>
		if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat
 8006d58:	e7e7      	b.n	8006d2a <SX1276_LoRaEntryRx+0x68>

08006d5a <SX1276_LoRaRxPacket>:
	}
}

uint8_t SX1276_LoRaRxPacket(SX1276_t * module) {
 8006d5a:	b570      	push	{r4, r5, r6, lr}
 8006d5c:	4604      	mov	r4, r0
	unsigned char addr;
	unsigned char packet_size;

	if (SX1276_hw_GetDIO0(module->hw)) {
 8006d5e:	6800      	ldr	r0, [r0, #0]
 8006d60:	f7ff fea3 	bl	8006aaa <SX1276_hw_GetDIO0>
 8006d64:	b1f0      	cbz	r0, 8006da4 <SX1276_LoRaRxPacket+0x4a>
		memset(module->rxBuffer, 0x00, SX1276_MAX_PACKET);
 8006d66:	f104 060c 	add.w	r6, r4, #12
 8006d6a:	f44f 7280 	mov.w	r2, #256	; 0x100
 8006d6e:	2100      	movs	r1, #0
 8006d70:	4630      	mov	r0, r6
 8006d72:	f000 ff7e 	bl	8007c72 <memset>

		addr = SX1276_SPIRead(module, LR_RegFifoRxCurrentaddr); //last packet addr
 8006d76:	2110      	movs	r1, #16
 8006d78:	4620      	mov	r0, r4
 8006d7a:	f7ff fe9f 	bl	8006abc <SX1276_SPIIDRead>
		SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr -> FiFoAddrPtr
 8006d7e:	210d      	movs	r1, #13
 8006d80:	4602      	mov	r2, r0
 8006d82:	4620      	mov	r0, r4
 8006d84:	f7ff fea9 	bl	8006ada <SX1276_SPIWrite>

		if (module->LoRa_Rate == SX1276_LORA_SF_6) { //When SpreadFactor is six,will used Implicit Header mode(Excluding internal packet length)
 8006d88:	79a3      	ldrb	r3, [r4, #6]
 8006d8a:	b973      	cbnz	r3, 8006daa <SX1276_LoRaRxPacket+0x50>
			packet_size = module->packetLength;
 8006d8c:	7aa5      	ldrb	r5, [r4, #10]
		} else {
			packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes
		}

		SX1276_SPIBurstRead(module, 0x00, module->rxBuffer, packet_size);
 8006d8e:	4620      	mov	r0, r4
 8006d90:	462b      	mov	r3, r5
 8006d92:	4632      	mov	r2, r6
 8006d94:	2100      	movs	r1, #0
 8006d96:	f7ff feb6 	bl	8006b06 <SX1276_SPIBurstRead>
		module->readBytes = packet_size;
 8006d9a:	f884 510c 	strb.w	r5, [r4, #268]	; 0x10c
		SX1276_clearLoRaIrq(module);
 8006d9e:	4620      	mov	r0, r4
 8006da0:	f7ff ff8b 	bl	8006cba <SX1276_clearLoRaIrq>
	}
	return module->readBytes;
}
 8006da4:	f894 010c 	ldrb.w	r0, [r4, #268]	; 0x10c
 8006da8:	bd70      	pop	{r4, r5, r6, pc}
			packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes
 8006daa:	2113      	movs	r1, #19
 8006dac:	4620      	mov	r0, r4
 8006dae:	f7ff fe85 	bl	8006abc <SX1276_SPIIDRead>
 8006db2:	4605      	mov	r5, r0
 8006db4:	e7eb      	b.n	8006d8e <SX1276_LoRaRxPacket+0x34>

08006db6 <SX1276_LoRaEntryTx>:




int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) {
 8006db6:	b570      	push	{r4, r5, r6, lr}
 8006db8:	4604      	mov	r4, r0
 8006dba:	460e      	mov	r6, r1
	uint8_t addr;
	uint8_t temp;

	module->packetLength = length;
 8006dbc:	72a1      	strb	r1, [r4, #10]
int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) {
 8006dbe:	4615      	mov	r5, r2

	SX1276_defaultConfig(module); //setting base parameter
 8006dc0:	f7ff ff6c 	bl	8006c9c <SX1276_defaultConfig>
	SX1276_SPIWrite(module, REG_LR_PADAC, 0x87);	//Tx for 20dBm
 8006dc4:	2287      	movs	r2, #135	; 0x87
 8006dc6:	214d      	movs	r1, #77	; 0x4d
 8006dc8:	4620      	mov	r0, r4
 8006dca:	f7ff fe86 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegHopPeriod, 0x00); //RegHopPeriod NO FHSS
 8006dce:	2200      	movs	r2, #0
 8006dd0:	2124      	movs	r1, #36	; 0x24
 8006dd2:	4620      	mov	r0, r4
 8006dd4:	f7ff fe81 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01
 8006dd8:	2241      	movs	r2, #65	; 0x41
 8006dda:	2140      	movs	r1, #64	; 0x40
 8006ddc:	4620      	mov	r0, r4
 8006dde:	f7ff fe7c 	bl	8006ada <SX1276_SPIWrite>
	SX1276_clearLoRaIrq(module);
 8006de2:	4620      	mov	r0, r4
 8006de4:	f7ff ff69 	bl	8006cba <SX1276_clearLoRaIrq>
	SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0xF7); //Open TxDone interrupt
 8006de8:	22f7      	movs	r2, #247	; 0xf7
 8006dea:	2111      	movs	r1, #17
 8006dec:	4620      	mov	r0, r4
 8006dee:	f7ff fe74 	bl	8006ada <SX1276_SPIWrite>
	SX1276_SPIWrite(module, LR_RegPayloadLength, length); //RegPayloadLength 21byte
 8006df2:	4632      	mov	r2, r6
 8006df4:	2122      	movs	r1, #34	; 0x22
 8006df6:	4620      	mov	r0, r4
 8006df8:	f7ff fe6f 	bl	8006ada <SX1276_SPIWrite>
	addr = SX1276_SPIRead(module, LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr
 8006dfc:	210e      	movs	r1, #14
 8006dfe:	4620      	mov	r0, r4
 8006e00:	f7ff fe5c 	bl	8006abc <SX1276_SPIIDRead>
	SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RegFifoAddrPtr
 8006e04:	210d      	movs	r1, #13
 8006e06:	4602      	mov	r2, r0
 8006e08:	4620      	mov	r0, r4
 8006e0a:	f7ff fe66 	bl	8006ada <SX1276_SPIWrite>

	while (1) {
		temp = SX1276_SPIRead(module, LR_RegPayloadLength);
 8006e0e:	2122      	movs	r1, #34	; 0x22
 8006e10:	4620      	mov	r0, r4
 8006e12:	f7ff fe53 	bl	8006abc <SX1276_SPIIDRead>
		if (temp == length) {
 8006e16:	4286      	cmp	r6, r0
 8006e18:	d103      	bne.n	8006e22 <SX1276_LoRaEntryTx+0x6c>
			module->status = TX;
 8006e1a:	2302      	movs	r3, #2
			return 1;
 8006e1c:	2001      	movs	r0, #1
			module->status = TX;
 8006e1e:	72e3      	strb	r3, [r4, #11]
			return 1;
 8006e20:	bd70      	pop	{r4, r5, r6, pc}
		}

		if (--timeout == 0) {
 8006e22:	3d01      	subs	r5, #1
 8006e24:	d1f3      	bne.n	8006e0e <SX1276_LoRaEntryTx+0x58>
			SX1276_hw_Reset(module->hw);
 8006e26:	6820      	ldr	r0, [r4, #0]
 8006e28:	f7ff fe29 	bl	8006a7e <SX1276_hw_Reset>
			SX1276_defaultConfig(module);
 8006e2c:	4620      	mov	r0, r4
 8006e2e:	f7ff ff35 	bl	8006c9c <SX1276_defaultConfig>
			return 0;
 8006e32:	4628      	mov	r0, r5
		}
	}
}
 8006e34:	bd70      	pop	{r4, r5, r6, pc}

08006e36 <SX1276_LoRaTxPacket>:

int SX1276_LoRaTxPacket(SX1276_t * module, uint8_t* txBuffer, uint8_t length,
		uint32_t timeout) {
 8006e36:	b570      	push	{r4, r5, r6, lr}
 8006e38:	4604      	mov	r4, r0
 8006e3a:	461e      	mov	r6, r3
	SX1276_SPIBurstWrite(module, 0x00, txBuffer, length);
 8006e3c:	4613      	mov	r3, r2
 8006e3e:	460a      	mov	r2, r1
 8006e40:	2100      	movs	r1, #0
 8006e42:	f7ff fe7f 	bl	8006b44 <SX1276_SPIBurstWrite>
	SX1276_SPIWrite(module, LR_RegOpMode, 0x8b);	//Tx Mode
 8006e46:	228b      	movs	r2, #139	; 0x8b
 8006e48:	2101      	movs	r1, #1
 8006e4a:	4620      	mov	r0, r4
 8006e4c:	f7ff fe45 	bl	8006ada <SX1276_SPIWrite>
	while (1) {
		if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over
 8006e50:	6820      	ldr	r0, [r4, #0]
 8006e52:	f7ff fe2a 	bl	8006aaa <SX1276_hw_GetDIO0>
 8006e56:	4605      	mov	r5, r0
 8006e58:	b160      	cbz	r0, 8006e74 <SX1276_LoRaTxPacket+0x3e>
			SX1276_SPIRead(module, LR_RegIrqFlags);
 8006e5a:	2112      	movs	r1, #18
 8006e5c:	4620      	mov	r0, r4
 8006e5e:	f7ff fe2d 	bl	8006abc <SX1276_SPIIDRead>
			SX1276_clearLoRaIrq(module); //Clear irq
 8006e62:	4620      	mov	r0, r4
 8006e64:	f7ff ff29 	bl	8006cba <SX1276_clearLoRaIrq>
			SX1276_standby(module); //Entry Standby mode
 8006e68:	4620      	mov	r0, r4
 8006e6a:	f7ff fe7c 	bl	8006b66 <SX1276_standby>
			return 1;
 8006e6e:	2501      	movs	r5, #1
			SX1276_defaultConfig(module);
			return 0;
		}
		SX1276_hw_DelayMs(1);
	}
}
 8006e70:	4628      	mov	r0, r5
 8006e72:	bd70      	pop	{r4, r5, r6, pc}
		if (--timeout == 0) {
 8006e74:	3e01      	subs	r6, #1
 8006e76:	d106      	bne.n	8006e86 <SX1276_LoRaTxPacket+0x50>
			SX1276_hw_Reset(module->hw);
 8006e78:	6820      	ldr	r0, [r4, #0]
 8006e7a:	f7ff fe00 	bl	8006a7e <SX1276_hw_Reset>
			SX1276_defaultConfig(module);
 8006e7e:	4620      	mov	r0, r4
 8006e80:	f7ff ff0c 	bl	8006c9c <SX1276_defaultConfig>
 8006e84:	e7f4      	b.n	8006e70 <SX1276_LoRaTxPacket+0x3a>
		SX1276_hw_DelayMs(1);
 8006e86:	2001      	movs	r0, #1
 8006e88:	f7ff fdf7 	bl	8006a7a <SX1276_hw_DelayMs>
		if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over
 8006e8c:	e7e0      	b.n	8006e50 <SX1276_LoRaTxPacket+0x1a>

08006e8e <SX1276_begin>:

void SX1276_begin(SX1276_t * module, uint8_t frequency, uint8_t power,
		uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength,uint8_t LoRa_Lna,uint8_t LoRa_PaBoost) {
 8006e8e:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8006e92:	4604      	mov	r4, r0
 8006e94:	468b      	mov	fp, r1
 8006e96:	4692      	mov	sl, r2
 8006e98:	4699      	mov	r9, r3
 8006e9a:	f89d 8028 	ldrb.w	r8, [sp, #40]	; 0x28
 8006e9e:	f89d 702c 	ldrb.w	r7, [sp, #44]	; 0x2c
 8006ea2:	f89d 6030 	ldrb.w	r6, [sp, #48]	; 0x30
 8006ea6:	f89d 5034 	ldrb.w	r5, [sp, #52]	; 0x34
	SX1276_hw_init(module->hw);
 8006eaa:	6800      	ldr	r0, [r0, #0]
 8006eac:	f7ff fda9 	bl	8006a02 <SX1276_hw_init>
	module->frequency       = frequency;
 8006eb0:	f884 b004 	strb.w	fp, [r4, #4]
	module->power           = power;
 8006eb4:	f884 a005 	strb.w	sl, [r4, #5]
	module->LoRa_Rate       = LoRa_Rate;
 8006eb8:	f884 9006 	strb.w	r9, [r4, #6]
	module->LoRa_BW         = LoRa_BW;
 8006ebc:	f884 8007 	strb.w	r8, [r4, #7]
	module->packetLength    = packetLength;
 8006ec0:	72a7      	strb	r7, [r4, #10]
    module->LoRa_Lna        = LoRa_Lna;
 8006ec2:	7226      	strb	r6, [r4, #8]
    module->LoRa_Pa_boost   = LoRa_PaBoost;
 8006ec4:	7265      	strb	r5, [r4, #9]
	SX1276_defaultConfig(module);
 8006ec6:	4620      	mov	r0, r4
}
 8006ec8:	e8bd 4ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
	SX1276_defaultConfig(module);
 8006ecc:	f7ff bee6 	b.w	8006c9c <SX1276_defaultConfig>

08006ed0 <SX1276_read>:

uint8_t SX1276_available(SX1276_t * module) {
	return SX1276_LoRaRxPacket(module);
}

uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) {
 8006ed0:	b570      	push	{r4, r5, r6, lr}
 8006ed2:	460e      	mov	r6, r1
	if (length != module->readBytes)
 8006ed4:	f890 410c 	ldrb.w	r4, [r0, #268]	; 0x10c
uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) {
 8006ed8:	4605      	mov	r5, r0
		length = module->readBytes;
	memcpy(rxBuf, module->rxBuffer, length);
 8006eda:	f100 010c 	add.w	r1, r0, #12
 8006ede:	4622      	mov	r2, r4
 8006ee0:	4630      	mov	r0, r6
 8006ee2:	f000 febb 	bl	8007c5c <memcpy>
	rxBuf[length] = '\0';
 8006ee6:	2300      	movs	r3, #0
 8006ee8:	5533      	strb	r3, [r6, r4]
	module->readBytes = 0;
 8006eea:	f885 310c 	strb.w	r3, [r5, #268]	; 0x10c
	return length;
}
 8006eee:	4620      	mov	r0, r4
 8006ef0:	bd70      	pop	{r4, r5, r6, pc}
	...

08006ef4 <HAL_UART_RxCpltCallback>:



void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
    if(huart->Instance == USART1)//RGB Comunication 
 8006ef4:	6802      	ldr	r2, [r0, #0]
 8006ef6:	4b14      	ldr	r3, [pc, #80]	; (8006f48 <HAL_UART_RxCpltCallback+0x54>)
{
 8006ef8:	b410      	push	{r4}
    if(huart->Instance == USART1)//RGB Comunication 
 8006efa:	429a      	cmp	r2, r3
 8006efc:	d10b      	bne.n	8006f16 <HAL_UART_RxCpltCallback+0x22>
    {
        buf1[count_in1] = rx1_data[0];//(uint8_t)USART2->DR;
 8006efe:	4a13      	ldr	r2, [pc, #76]	; (8006f4c <HAL_UART_RxCpltCallback+0x58>)
 8006f00:	4913      	ldr	r1, [pc, #76]	; (8006f50 <HAL_UART_RxCpltCallback+0x5c>)
 8006f02:	7813      	ldrb	r3, [r2, #0]
 8006f04:	780c      	ldrb	r4, [r1, #0]
 8006f06:	4913      	ldr	r1, [pc, #76]	; (8006f54 <HAL_UART_RxCpltCallback+0x60>)
 8006f08:	54cc      	strb	r4, [r1, r3]
         if(++count_in1>=buf_size){ count_in1 = 0; }
 8006f0a:	3301      	adds	r3, #1
 8006f0c:	b2db      	uxtb	r3, r3
 8006f0e:	2b63      	cmp	r3, #99	; 0x63
 8006f10:	bf88      	it	hi
 8006f12:	2300      	movhi	r3, #0
 8006f14:	7013      	strb	r3, [r2, #0]
                count_in1 = 0;
        }
#endif // PYJ.2019.04.19_END -- 
//        HAL_UART_Receive_IT(&huart1,&rx1_data[0],1);
    }
    if(huart->Instance == USART2) // Lora?? ?? Â???¹Â???¢Ë??Å ?? ?Â�¬?Š¸
 8006f16:	6802      	ldr	r2, [r0, #0]
 8006f18:	4b0f      	ldr	r3, [pc, #60]	; (8006f58 <HAL_UART_RxCpltCallback+0x64>)
 8006f1a:	429a      	cmp	r2, r3
 8006f1c:	d111      	bne.n	8006f42 <HAL_UART_RxCpltCallback+0x4e>
    {
        buf2[count_in2] = rx2_data[0];//(uint8_t)USART2->DR;
 8006f1e:	4a0f      	ldr	r2, [pc, #60]	; (8006f5c <HAL_UART_RxCpltCallback+0x68>)
 8006f20:	490f      	ldr	r1, [pc, #60]	; (8006f60 <HAL_UART_RxCpltCallback+0x6c>)
 8006f22:	7813      	ldrb	r3, [r2, #0]
 8006f24:	7808      	ldrb	r0, [r1, #0]
 8006f26:	490f      	ldr	r1, [pc, #60]	; (8006f64 <HAL_UART_RxCpltCallback+0x70>)
 8006f28:	54c8      	strb	r0, [r1, r3]
        if(++count_in2>=buf_size){ count_in2 = 0; }
 8006f2a:	3301      	adds	r3, #1
 8006f2c:	b2db      	uxtb	r3, r3
 8006f2e:	2b63      	cmp	r3, #99	; 0x63
 8006f30:	bf88      	it	hi
 8006f32:	2300      	movhi	r3, #0
 8006f34:	7013      	strb	r3, [r2, #0]
            else
                count_in1 = 0;
//                printf("UART 2 %d",((count_in2 -1) - 3));
        }
#endif // PYJ.2019.04.19_END -- 
        HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
 8006f36:	490a      	ldr	r1, [pc, #40]	; (8006f60 <HAL_UART_RxCpltCallback+0x6c>)
 8006f38:	2201      	movs	r2, #1
 8006f3a:	480b      	ldr	r0, [pc, #44]	; (8006f68 <HAL_UART_RxCpltCallback+0x74>)
        if(++count_in>=buf_size) count_in=0;*/
        HAL_UART_Receive_IT(&huart3,&rx3_data[0],1);
    }
#endif // PYJ.2019.04.13_END -- 
    
}
 8006f3c:	bc10      	pop	{r4}
        HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
 8006f3e:	f7fe be29 	b.w	8005b94 <HAL_UART_Receive_IT>
}
 8006f42:	bc10      	pop	{r4}
 8006f44:	4770      	bx	lr
 8006f46:	bf00      	nop
 8006f48:	40013800 	.word	0x40013800
 8006f4c:	20000420 	.word	0x20000420
 8006f50:	20000664 	.word	0x20000664
 8006f54:	20000358 	.word	0x20000358
 8006f58:	40004400 	.word	0x40004400
 8006f5c:	20000421 	.word	0x20000421
 8006f60:	20000490 	.word	0x20000490
 8006f64:	200003bc 	.word	0x200003bc
 8006f68:	20000708 	.word	0x20000708

08006f6c <HAL_TIM_PeriodElapsedCallback>:
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{

    if(htim->Instance == TIM6){
 8006f6c:	6802      	ldr	r2, [r0, #0]
 8006f6e:	4b0a      	ldr	r3, [pc, #40]	; (8006f98 <HAL_TIM_PeriodElapsedCallback+0x2c>)
 8006f70:	429a      	cmp	r2, r3
 8006f72:	d10f      	bne.n	8006f94 <HAL_TIM_PeriodElapsedCallback+0x28>
        UartTimerCnt++;
 8006f74:	4a09      	ldr	r2, [pc, #36]	; (8006f9c <HAL_TIM_PeriodElapsedCallback+0x30>)
 8006f76:	6813      	ldr	r3, [r2, #0]
 8006f78:	3301      	adds	r3, #1
 8006f7a:	6013      	str	r3, [r2, #0]
        LedTimerCnt++;
 8006f7c:	4a08      	ldr	r2, [pc, #32]	; (8006fa0 <HAL_TIM_PeriodElapsedCallback+0x34>)
 8006f7e:	6813      	ldr	r3, [r2, #0]
 8006f80:	3301      	adds	r3, #1
 8006f82:	6013      	str	r3, [r2, #0]
        LoraTxTimerCnt++;
 8006f84:	4a07      	ldr	r2, [pc, #28]	; (8006fa4 <HAL_TIM_PeriodElapsedCallback+0x38>)
 8006f86:	6813      	ldr	r3, [r2, #0]
 8006f88:	3301      	adds	r3, #1
 8006f8a:	6013      	str	r3, [r2, #0]
        LoraAckTimerCnt++;
 8006f8c:	4a06      	ldr	r2, [pc, #24]	; (8006fa8 <HAL_TIM_PeriodElapsedCallback+0x3c>)
 8006f8e:	6813      	ldr	r3, [r2, #0]
 8006f90:	3301      	adds	r3, #1
 8006f92:	6013      	str	r3, [r2, #0]
 8006f94:	4770      	bx	lr
 8006f96:	bf00      	nop
 8006f98:	40001000 	.word	0x40001000
 8006f9c:	20000354 	.word	0x20000354
 8006fa0:	20000344 	.word	0x20000344
 8006fa4:	2000034c 	.word	0x2000034c
 8006fa8:	20000348 	.word	0x20000348

08006fac <LoraDataSendSet>:
    }
}
void LoraDataSendSet(uint8_t val){
    LoraDataSend = val;
 8006fac:	4b01      	ldr	r3, [pc, #4]	; (8006fb4 <LoraDataSendSet+0x8>)
 8006fae:	7018      	strb	r0, [r3, #0]
 8006fb0:	4770      	bx	lr
 8006fb2:	bf00      	nop
 8006fb4:	20000514 	.word	0x20000514

08006fb8 <RGB_SensorIDAutoSet>:
}
uint8_t UartDataRecvGet(void){
    return UartDataisReved;
}
void RGB_SensorIDAutoSet(uint8_t set){
    RGB_SensorIDAutoset = set;
 8006fb8:	4b01      	ldr	r3, [pc, #4]	; (8006fc0 <RGB_SensorIDAutoSet+0x8>)
 8006fba:	7018      	strb	r0, [r3, #0]
 8006fbc:	4770      	bx	lr
 8006fbe:	bf00      	nop
 8006fc0:	20000351 	.word	0x20000351

08006fc4 <Uart2_Data_Send>:
uint8_t RGB_SensorIDAutoGet(void){
    return RGB_SensorIDAutoset;
}

void Uart2_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart2, data,size, 10); 
 8006fc4:	460a      	mov	r2, r1
 8006fc6:	230a      	movs	r3, #10
 8006fc8:	4601      	mov	r1, r0
 8006fca:	4801      	ldr	r0, [pc, #4]	; (8006fd0 <Uart2_Data_Send+0xc>)
 8006fcc:	f7fe bd86 	b.w	8005adc <HAL_UART_Transmit>
 8006fd0:	20000708 	.word	0x20000708

08006fd4 <Uart1_Data_Send>:
}
void Uart1_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart1, data,size, 10); 
 8006fd4:	460a      	mov	r2, r1
 8006fd6:	230a      	movs	r3, #10
 8006fd8:	4601      	mov	r1, r0
 8006fda:	4801      	ldr	r0, [pc, #4]	; (8006fe0 <Uart1_Data_Send+0xc>)
 8006fdc:	f7fe bd7e 	b.w	8005adc <HAL_UART_Transmit>
 8006fe0:	2000055c 	.word	0x2000055c

08006fe4 <_write>:
}

int _write (int file, uint8_t *ptr, uint16_t len) 
{
 8006fe4:	b510      	push	{r4, lr}
 8006fe6:	4614      	mov	r4, r2
    HAL_UART_Transmit (&huart1, ptr, len, 10); 
 8006fe8:	230a      	movs	r3, #10
 8006fea:	4802      	ldr	r0, [pc, #8]	; (8006ff4 <_write+0x10>)
 8006fec:	f7fe fd76 	bl	8005adc <HAL_UART_Transmit>
    return len;
}
 8006ff0:	4620      	mov	r0, r4
 8006ff2:	bd10      	pop	{r4, pc}
 8006ff4:	2000055c 	.word	0x2000055c

08006ff8 <Uart_dataCheck>:
    *cnt = 0;
    
    memset(buf,0x00,buf_size);
}
#else
void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){
 8006ff8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8006ffa:	460d      	mov	r5, r1
        printf("%02x ",*Que_Buf[i]);
    }
        printf("\r\n");
#endif  

    crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]);
 8006ffc:	7881      	ldrb	r1, [r0, #2]
void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){
 8006ffe:	4604      	mov	r4, r0
    crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]);
 8007000:	1843      	adds	r3, r0, r1
 8007002:	785a      	ldrb	r2, [r3, #1]
 8007004:	3001      	adds	r0, #1
 8007006:	f000 fc8f 	bl	8007928 <STH30_CheckCrc>
    if(crccheck == CHECKSUM_ERROR){
 800700a:	b9c8      	cbnz	r0, 8007040 <Uart_dataCheck+0x48>
        for(uint8_t i = 0; i < (*cnt); i++){
            printf("%02x ",Que_Buf[i]);
 800700c:	4f11      	ldr	r7, [pc, #68]	; (8007054 <Uart_dataCheck+0x5c>)
        for(uint8_t i = 0; i < (*cnt); i++){
 800700e:	782b      	ldrb	r3, [r5, #0]
 8007010:	1c46      	adds	r6, r0, #1
 8007012:	b2c0      	uxtb	r0, r0
 8007014:	4283      	cmp	r3, r0
 8007016:	d80d      	bhi.n	8007034 <Uart_dataCheck+0x3c>
        }
        printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,Que_Buf[Que_Buf[bluecell_length] + 1]);
 8007018:	78a3      	ldrb	r3, [r4, #2]
 800701a:	2100      	movs	r1, #0
 800701c:	4423      	add	r3, r4
 800701e:	785a      	ldrb	r2, [r3, #1]
 8007020:	480d      	ldr	r0, [pc, #52]	; (8007058 <Uart_dataCheck+0x60>)
 8007022:	f000 fe2f 	bl	8007c84 <iprintf>
        /*NOP*/
    }

    //*cnt = 0;
    
    memset(Que_Buf,0x00,buf_size);
 8007026:	4620      	mov	r0, r4
}
 8007028:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
    memset(Que_Buf,0x00,buf_size);
 800702c:	2264      	movs	r2, #100	; 0x64
 800702e:	2100      	movs	r1, #0
 8007030:	f000 be1f 	b.w	8007c72 <memset>
            printf("%02x ",Que_Buf[i]);
 8007034:	5c21      	ldrb	r1, [r4, r0]
 8007036:	4638      	mov	r0, r7
 8007038:	f000 fe24 	bl	8007c84 <iprintf>
 800703c:	4630      	mov	r0, r6
 800703e:	e7e6      	b.n	800700e <Uart_dataCheck+0x16>
    else if(crccheck == NO_ERROR){
 8007040:	2801      	cmp	r0, #1
 8007042:	d103      	bne.n	800704c <Uart_dataCheck+0x54>
        RGB_Controller_Func(&Que_Buf[bluecell_stx]);
 8007044:	4620      	mov	r0, r4
 8007046:	f7ff fb41 	bl	80066cc <RGB_Controller_Func>
 800704a:	e7ec      	b.n	8007026 <Uart_dataCheck+0x2e>
         printf("What Happen?\r\n");
 800704c:	4803      	ldr	r0, [pc, #12]	; (800705c <Uart_dataCheck+0x64>)
 800704e:	f000 fe8d 	bl	8007d6c <puts>
 8007052:	e7e8      	b.n	8007026 <Uart_dataCheck+0x2e>
 8007054:	08008e83 	.word	0x08008e83
 8007058:	08008e89 	.word	0x08008e89
 800705c:	08008eaf 	.word	0x08008eaf

08007060 <RGB_Sensor_PowerOnOff>:


#endif // PYJ.2019.04.19_END -- 
void RGB_Sensor_PowerOnOff(uint8_t id){
 8007060:	b5f0      	push	{r4, r5, r6, r7, lr}
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 8007062:	2402      	movs	r4, #2
 8007064:	2319      	movs	r3, #25
 8007066:	27be      	movs	r7, #190	; 0xbe
void RGB_Sensor_PowerOnOff(uint8_t id){
 8007068:	b085      	sub	sp, #20
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 800706a:	4621      	mov	r1, r4
void RGB_Sensor_PowerOnOff(uint8_t id){
 800706c:	4605      	mov	r5, r0
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 800706e:	f10d 0001 	add.w	r0, sp, #1
 8007072:	f88d 3001 	strb.w	r3, [sp, #1]
 8007076:	f88d 7000 	strb.w	r7, [sp]
 800707a:	f88d 4002 	strb.w	r4, [sp, #2]
 800707e:	f000 fc38 	bl	80078f2 <STH30_CreateCrc>
 8007082:	26eb      	movs	r6, #235	; 0xeb
    uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb};
 8007084:	231a      	movs	r3, #26
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 8007086:	f88d 0003 	strb.w	r0, [sp, #3]
    uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb};
 800708a:	4621      	mov	r1, r4
 800708c:	f10d 0009 	add.w	r0, sp, #9
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 8007090:	f88d 6004 	strb.w	r6, [sp, #4]
    uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb};
 8007094:	f88d 7008 	strb.w	r7, [sp, #8]
 8007098:	f88d 3009 	strb.w	r3, [sp, #9]
 800709c:	f88d 400a 	strb.w	r4, [sp, #10]
 80070a0:	f000 fc27 	bl	80078f2 <STH30_CreateCrc>
 80070a4:	f88d 600c 	strb.w	r6, [sp, #12]
 80070a8:	f88d 000b 	strb.w	r0, [sp, #11]
//    printf("%d Power ON \r\n",id);

    switch(id){
 80070ac:	2d08      	cmp	r5, #8
 80070ae:	d844      	bhi.n	800713a <RGB_Sensor_PowerOnOff+0xda>
 80070b0:	e8df f005 	tbb	[pc, r5]
 80070b4:	4d4505d1 	.word	0x4d4505d1
 80070b8:	a6886f5b 	.word	0xa6886f5b
 80070bc:	ca          	.byte	0xca
 80070bd:	00          	.byte	0x00
            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET);   
            break;
        case 1:
            Uart1_Data_Send(&SensorSerchStart_cmd[bluecell_stx], SensorSerchStart_cmd[bluecell_length] + 3);
 80070be:	f89d 1002 	ldrb.w	r1, [sp, #2]
 80070c2:	4668      	mov	r0, sp
 80070c4:	3103      	adds	r1, #3
 80070c6:	b2c9      	uxtb	r1, r1
 80070c8:	f7ff ff84 	bl	8006fd4 <Uart1_Data_Send>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_RESET);
 80070cc:	2200      	movs	r2, #0
 80070ce:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80070d2:	4876      	ldr	r0, [pc, #472]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80070d4:	f7fd fc22 	bl	800491c <HAL_GPIO_WritePin>
            HAL_Delay(50);
 80070d8:	2032      	movs	r0, #50	; 0x32
 80070da:	f7fd f8eb 	bl	80042b4 <HAL_Delay>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 80070de:	2201      	movs	r2, #1
 80070e0:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80070e4:	4871      	ldr	r0, [pc, #452]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80070e6:	f7fd fc19 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_RESET);            
 80070ea:	2200      	movs	r2, #0
            HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET);
            HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET);
            break;
        case 2:
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 80070ec:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80070f0:	486e      	ldr	r0, [pc, #440]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80070f2:	f7fd fc13 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_RESET);            
 80070f6:	2200      	movs	r2, #0
 80070f8:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80070fc:	486b      	ldr	r0, [pc, #428]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80070fe:	f7fd fc0d 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_RESET);
 8007102:	2200      	movs	r2, #0
 8007104:	2140      	movs	r1, #64	; 0x40
 8007106:	486a      	ldr	r0, [pc, #424]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 8007108:	f7fd fc08 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_RESET);
 800710c:	2200      	movs	r2, #0
        case 5:
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
 800710e:	2180      	movs	r1, #128	; 0x80
 8007110:	4867      	ldr	r0, [pc, #412]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 8007112:	f7fd fc03 	bl	800491c <HAL_GPIO_WritePin>

            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_RESET);
 8007116:	2200      	movs	r2, #0
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
 8007118:	f44f 7180 	mov.w	r1, #256	; 0x100
 800711c:	4864      	ldr	r0, [pc, #400]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 800711e:	f7fd fbfd 	bl	800491c <HAL_GPIO_WritePin>

            HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET);
 8007122:	2200      	movs	r2, #0
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
 8007124:	f44f 7100 	mov.w	r1, #512	; 0x200
 8007128:	4861      	ldr	r0, [pc, #388]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 800712a:	f7fd fbf7 	bl	800491c <HAL_GPIO_WritePin>

            HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET);
 800712e:	2200      	movs	r2, #0
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
            HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET);
 8007130:	f44f 7180 	mov.w	r1, #256	; 0x100
 8007134:	485f      	ldr	r0, [pc, #380]	; (80072b4 <RGB_Sensor_PowerOnOff+0x254>)
 8007136:	f7fd fbf1 	bl	800491c <HAL_GPIO_WritePin>

            break;
    }
}
 800713a:	b005      	add	sp, #20
 800713c:	bdf0      	pop	{r4, r5, r6, r7, pc}
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 800713e:	2201      	movs	r2, #1
 8007140:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8007144:	4859      	ldr	r0, [pc, #356]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007146:	f7fd fbe9 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 800714a:	2201      	movs	r2, #1
 800714c:	e7ce      	b.n	80070ec <RGB_Sensor_PowerOnOff+0x8c>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 800714e:	2201      	movs	r2, #1
 8007150:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8007154:	4855      	ldr	r0, [pc, #340]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007156:	f7fd fbe1 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 800715a:	2201      	movs	r2, #1
 800715c:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007160:	4852      	ldr	r0, [pc, #328]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007162:	f7fd fbdb 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
 8007166:	2201      	movs	r2, #1
 8007168:	e7c6      	b.n	80070f8 <RGB_Sensor_PowerOnOff+0x98>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 800716a:	2201      	movs	r2, #1
 800716c:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8007170:	484e      	ldr	r0, [pc, #312]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007172:	f7fd fbd3 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 8007176:	2201      	movs	r2, #1
 8007178:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 800717c:	484b      	ldr	r0, [pc, #300]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 800717e:	f7fd fbcd 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
 8007182:	2201      	movs	r2, #1
 8007184:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007188:	4848      	ldr	r0, [pc, #288]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 800718a:	f7fd fbc7 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
 800718e:	2201      	movs	r2, #1
 8007190:	e7b8      	b.n	8007104 <RGB_Sensor_PowerOnOff+0xa4>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 8007192:	2201      	movs	r2, #1
 8007194:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8007198:	4844      	ldr	r0, [pc, #272]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 800719a:	f7fd fbbf 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 800719e:	2201      	movs	r2, #1
 80071a0:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80071a4:	4841      	ldr	r0, [pc, #260]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80071a6:	f7fd fbb9 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
 80071aa:	2201      	movs	r2, #1
 80071ac:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80071b0:	483e      	ldr	r0, [pc, #248]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80071b2:	f7fd fbb3 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
 80071b6:	2201      	movs	r2, #1
 80071b8:	2140      	movs	r1, #64	; 0x40
 80071ba:	483d      	ldr	r0, [pc, #244]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 80071bc:	f7fd fbae 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
 80071c0:	2201      	movs	r2, #1
 80071c2:	e7a4      	b.n	800710e <RGB_Sensor_PowerOnOff+0xae>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 80071c4:	2201      	movs	r2, #1
 80071c6:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 80071ca:	4838      	ldr	r0, [pc, #224]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80071cc:	f7fd fba6 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 80071d0:	2201      	movs	r2, #1
 80071d2:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80071d6:	4835      	ldr	r0, [pc, #212]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80071d8:	f7fd fba0 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
 80071dc:	2201      	movs	r2, #1
 80071de:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80071e2:	4832      	ldr	r0, [pc, #200]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 80071e4:	f7fd fb9a 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
 80071e8:	2201      	movs	r2, #1
 80071ea:	2140      	movs	r1, #64	; 0x40
 80071ec:	4830      	ldr	r0, [pc, #192]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 80071ee:	f7fd fb95 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
 80071f2:	2201      	movs	r2, #1
 80071f4:	2180      	movs	r1, #128	; 0x80
 80071f6:	482e      	ldr	r0, [pc, #184]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 80071f8:	f7fd fb90 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
 80071fc:	2201      	movs	r2, #1
 80071fe:	e78b      	b.n	8007118 <RGB_Sensor_PowerOnOff+0xb8>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 8007200:	2201      	movs	r2, #1
 8007202:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 8007206:	4829      	ldr	r0, [pc, #164]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007208:	f7fd fb88 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 800720c:	2201      	movs	r2, #1
 800720e:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007212:	4826      	ldr	r0, [pc, #152]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007214:	f7fd fb82 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
 8007218:	2201      	movs	r2, #1
 800721a:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 800721e:	4823      	ldr	r0, [pc, #140]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007220:	f7fd fb7c 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
 8007224:	2201      	movs	r2, #1
 8007226:	2140      	movs	r1, #64	; 0x40
 8007228:	4821      	ldr	r0, [pc, #132]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 800722a:	f7fd fb77 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
 800722e:	2201      	movs	r2, #1
 8007230:	2180      	movs	r1, #128	; 0x80
 8007232:	481f      	ldr	r0, [pc, #124]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 8007234:	f7fd fb72 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
 8007238:	2201      	movs	r2, #1
 800723a:	f44f 7180 	mov.w	r1, #256	; 0x100
 800723e:	481c      	ldr	r0, [pc, #112]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 8007240:	f7fd fb6c 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
 8007244:	2201      	movs	r2, #1
 8007246:	e76d      	b.n	8007124 <RGB_Sensor_PowerOnOff+0xc4>
            Uart1_Data_Send(&SensorSerchEnd_cmd[bluecell_stx], SensorSerchEnd_cmd[bluecell_length] + 3);
 8007248:	f89d 100a 	ldrb.w	r1, [sp, #10]
 800724c:	a802      	add	r0, sp, #8
 800724e:	3103      	adds	r1, #3
 8007250:	b2c9      	uxtb	r1, r1
 8007252:	f7ff febf 	bl	8006fd4 <Uart1_Data_Send>
            HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET);
 8007256:	2201      	movs	r2, #1
 8007258:	f44f 5100 	mov.w	r1, #8192	; 0x2000
 800725c:	4813      	ldr	r0, [pc, #76]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 800725e:	f7fd fb5d 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET);        
 8007262:	2201      	movs	r2, #1
 8007264:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007268:	4810      	ldr	r0, [pc, #64]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 800726a:	f7fd fb57 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET);   
 800726e:	2201      	movs	r2, #1
 8007270:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007274:	480d      	ldr	r0, [pc, #52]	; (80072ac <RGB_Sensor_PowerOnOff+0x24c>)
 8007276:	f7fd fb51 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET);
 800727a:	2201      	movs	r2, #1
 800727c:	2140      	movs	r1, #64	; 0x40
 800727e:	480c      	ldr	r0, [pc, #48]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 8007280:	f7fd fb4c 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET);
 8007284:	2201      	movs	r2, #1
 8007286:	2180      	movs	r1, #128	; 0x80
 8007288:	4809      	ldr	r0, [pc, #36]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 800728a:	f7fd fb47 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET);
 800728e:	2201      	movs	r2, #1
 8007290:	f44f 7180 	mov.w	r1, #256	; 0x100
 8007294:	4806      	ldr	r0, [pc, #24]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 8007296:	f7fd fb41 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET);
 800729a:	2201      	movs	r2, #1
 800729c:	f44f 7100 	mov.w	r1, #512	; 0x200
 80072a0:	4803      	ldr	r0, [pc, #12]	; (80072b0 <RGB_Sensor_PowerOnOff+0x250>)
 80072a2:	f7fd fb3b 	bl	800491c <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET);
 80072a6:	2201      	movs	r2, #1
 80072a8:	e742      	b.n	8007130 <RGB_Sensor_PowerOnOff+0xd0>
 80072aa:	bf00      	nop
 80072ac:	40010c00 	.word	0x40010c00
 80072b0:	40011000 	.word	0x40011000
 80072b4:	40010800 	.word	0x40010800

080072b8 <Flash_InitRead>:
    HAL_FLASH_Lock(); // lock ?ž ê·¸ê¸°
    __HAL_RCC_TIM7_CLK_ENABLE(); // 매ì�¸???�´ë¨¸ë?? ?ž¬?‹œ?ž‘?•©?‹ˆ?‹¤

}
void Flash_InitRead(void) // ?“°ê¸°í•¨?ˆ˜
{
 80072b8:	b530      	push	{r4, r5, lr}
 80072ba:	480a      	ldr	r0, [pc, #40]	; (80072e4 <Flash_InitRead+0x2c>)
 80072bc:	490a      	ldr	r1, [pc, #40]	; (80072e8 <Flash_InitRead+0x30>)
 80072be:	4a0b      	ldr	r2, [pc, #44]	; (80072ec <Flash_InitRead+0x34>)
 80072c0:	4b0b      	ldr	r3, [pc, #44]	; (80072f0 <Flash_InitRead+0x38>)
    uint32_t  Address = 0;
    Address = StartAddr;
    for(uint8_t i = 1; i <= 8; i++ ){
 80072c2:	4c0c      	ldr	r4, [pc, #48]	; (80072f4 <Flash_InitRead+0x3c>)
        RGB_SensorRedLimit_Buf[i]   = (*(uint16_t*)Address);
 80072c4:	f833 5c06 	ldrh.w	r5, [r3, #-6]
 80072c8:	3306      	adds	r3, #6
 80072ca:	f820 5f02 	strh.w	r5, [r0, #2]!
//        printf("%08x : %04X \n",Address ,*(uint16_t*)Address);
        Address += 2;
        RGB_SensorGreenLimit_Buf[i] = (*(uint16_t*)Address);
 80072ce:	f833 5c0a 	ldrh.w	r5, [r3, #-10]
 80072d2:	f821 5f02 	strh.w	r5, [r1, #2]!
//        printf("%08x : %04X \n",Address ,*(uint16_t*)Address);
        Address += 2;        
        RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address);
 80072d6:	f833 5c08 	ldrh.w	r5, [r3, #-8]
    for(uint8_t i = 1; i <= 8; i++ ){
 80072da:	42a3      	cmp	r3, r4
        RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address);
 80072dc:	f822 5f02 	strh.w	r5, [r2, #2]!
    for(uint8_t i = 1; i <= 8; i++ ){
 80072e0:	d1f0      	bne.n	80072c4 <Flash_InitRead+0xc>
//        printf("%08x : %04X \n",Address ,*(uint16_t*)Address);        
        Address += 2;
    }

}
 80072e2:	bd30      	pop	{r4, r5, pc}
 80072e4:	200002e8 	.word	0x200002e8
 80072e8:	200002d6 	.word	0x200002d6
 80072ec:	200002c4 	.word	0x200002c4
 80072f0:	08030006 	.word	0x08030006
 80072f4:	08030036 	.word	0x08030036

080072f8 <Lora_Initialize>:


void Lora_Initialize(void){

    SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port;
    SX1276_hw.dio0.pin = SX1276_DIO0_Pin;
 80072f8:	2110      	movs	r1, #16
    SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port;
 80072fa:	4b16      	ldr	r3, [pc, #88]	; (8007354 <Lora_Initialize+0x5c>)
 80072fc:	4a16      	ldr	r2, [pc, #88]	; (8007358 <Lora_Initialize+0x60>)
void Lora_Initialize(void){
 80072fe:	b530      	push	{r4, r5, lr}
    SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port;
 8007300:	60da      	str	r2, [r3, #12]
    SX1276_hw.nss.port = GPIOA;
 8007302:	615a      	str	r2, [r3, #20]
    SX1276_hw.nss.pin = GPIO_PIN_15;
 8007304:	f44f 4200 	mov.w	r2, #32768	; 0x8000
    SX1276_hw.dio0.pin = SX1276_DIO0_Pin;
 8007308:	6099      	str	r1, [r3, #8]
    SX1276_hw.reset.port = SX1276_RESET_GPIO_Port;
    SX1276_hw.reset.pin = SX1276_RESET_Pin;
 800730a:	2101      	movs	r1, #1
    // SX1276_hw.spi = &hspi3;
    SX1276.hw = &SX1276_hw;
//    printf("Configuring LoRa module\r\n");
    SX1276_begin(&SX1276, Default_SX1276.frequency, Default_SX1276.power,
 800730c:	4813      	ldr	r0, [pc, #76]	; (800735c <Lora_Initialize+0x64>)
    SX1276_hw.nss.pin = GPIO_PIN_15;
 800730e:	611a      	str	r2, [r3, #16]
    SX1276_begin(&SX1276, Default_SX1276.frequency, Default_SX1276.power,
 8007310:	7945      	ldrb	r5, [r0, #5]
    SX1276.hw = &SX1276_hw;
 8007312:	4c13      	ldr	r4, [pc, #76]	; (8007360 <Lora_Initialize+0x68>)
    SX1276_hw.reset.pin = SX1276_RESET_Pin;
 8007314:	4a13      	ldr	r2, [pc, #76]	; (8007364 <Lora_Initialize+0x6c>)
void Lora_Initialize(void){
 8007316:	b085      	sub	sp, #20
    SX1276_hw.reset.pin = SX1276_RESET_Pin;
 8007318:	e883 0006 	stmia.w	r3, {r1, r2}
    SX1276.hw = &SX1276_hw;
 800731c:	6023      	str	r3, [r4, #0]
    SX1276_begin(&SX1276, Default_SX1276.frequency, Default_SX1276.power,
 800731e:	7842      	ldrb	r2, [r0, #1]
 8007320:	7883      	ldrb	r3, [r0, #2]
 8007322:	7801      	ldrb	r1, [r0, #0]
 8007324:	9503      	str	r5, [sp, #12]
 8007326:	7905      	ldrb	r5, [r0, #4]
 8007328:	9502      	str	r5, [sp, #8]
 800732a:	250a      	movs	r5, #10
 800732c:	9501      	str	r5, [sp, #4]
 800732e:	78c0      	ldrb	r0, [r0, #3]
 8007330:	9000      	str	r0, [sp, #0]
 8007332:	4620      	mov	r0, r4
 8007334:	f7ff fdab 	bl	8006e8e <SX1276_begin>
    Default_SX1276.LoRa_Rate,Default_SX1276.LoRa_BW, 10,Default_SX1276.LoRa_Lna,Default_SX1276.LoRa_Pa_boost);

//    printf("Done configuring LoRaModule\r\n");
    master = 0;
 8007338:	2200      	movs	r2, #0
 800733a:	4b0b      	ldr	r3, [pc, #44]	; (8007368 <Lora_Initialize+0x70>)
    if (master == 1) {
        ret = SX1276_LoRaEntryTx(&SX1276, LORA_MAX_DATA_CNT, 2000);
    } else {
        ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
 800733c:	2108      	movs	r1, #8
    master = 0;
 800733e:	601a      	str	r2, [r3, #0]
        ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
 8007340:	4620      	mov	r0, r4
 8007342:	f44f 62fa 	mov.w	r2, #2000	; 0x7d0
 8007346:	f7ff fcbc 	bl	8006cc2 <SX1276_LoRaEntryRx>
 800734a:	4b08      	ldr	r3, [pc, #32]	; (800736c <Lora_Initialize+0x74>)
 800734c:	6018      	str	r0, [r3, #0]
    }
}
 800734e:	b005      	add	sp, #20
 8007350:	bd30      	pop	{r4, r5, pc}
 8007352:	bf00      	nop
 8007354:	200004f8 	.word	0x200004f8
 8007358:	40010800 	.word	0x40010800
 800735c:	20000008 	.word	0x20000008
 8007360:	2000074c 	.word	0x2000074c
 8007364:	40010c00 	.word	0x40010c00
 8007368:	2000085c 	.word	0x2000085c
 800736c:	20000748 	.word	0x20000748

08007370 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8007370:	b510      	push	{r4, lr}
 8007372:	b090      	sub	sp, #64	; 0x40
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8007374:	2228      	movs	r2, #40	; 0x28
 8007376:	2100      	movs	r1, #0
 8007378:	a806      	add	r0, sp, #24
 800737a:	f000 fc7a 	bl	8007c72 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 800737e:	2100      	movs	r1, #0
 8007380:	2214      	movs	r2, #20
 8007382:	a801      	add	r0, sp, #4
 8007384:	f000 fc75 	bl	8007c72 <memset>
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8007388:	2402      	movs	r4, #2
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 800738a:	2201      	movs	r2, #1
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 800738c:	f44f 3380 	mov.w	r3, #65536	; 0x10000
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8007390:	a806      	add	r0, sp, #24
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 8007392:	9206      	str	r2, [sp, #24]
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8007394:	9307      	str	r3, [sp, #28]
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8007396:	920a      	str	r2, [sp, #40]	; 0x28
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8007398:	930e      	str	r3, [sp, #56]	; 0x38
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 800739a:	940d      	str	r4, [sp, #52]	; 0x34
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 800739c:	f7fd fec6 	bl	800512c <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 80073a0:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 80073a2:	2100      	movs	r1, #0
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 80073a4:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 80073a6:	f44f 6380 	mov.w	r3, #1024	; 0x400
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 80073aa:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 80073ac:	9402      	str	r4, [sp, #8]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 80073ae:	9103      	str	r1, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 80073b0:	9304      	str	r3, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 80073b2:	9105      	str	r1, [sp, #20]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 80073b4:	f7fe f882 	bl	80054bc <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
}
 80073b8:	b010      	add	sp, #64	; 0x40
 80073ba:	bd10      	pop	{r4, pc}

080073bc <main>:
{
 80073bc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 80073c0:	2319      	movs	r3, #25
 80073c2:	2702      	movs	r7, #2
 80073c4:	25be      	movs	r5, #190	; 0xbe
{
 80073c6:	b0c3      	sub	sp, #268	; 0x10c
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 80073c8:	4639      	mov	r1, r7
 80073ca:	eb0d 0003 	add.w	r0, sp, r3
    uint8_t StatusRequest_data[RGB_SensorDataRequest_Length]         = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
 80073ce:	f04f 0904 	mov.w	r9, #4
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 80073d2:	f88d 5018 	strb.w	r5, [sp, #24]
 80073d6:	f88d 3019 	strb.w	r3, [sp, #25]
 80073da:	f88d 701a 	strb.w	r7, [sp, #26]
 80073de:	f000 fa88 	bl	80078f2 <STH30_CreateCrc>
    uint8_t StatusRequest_data[RGB_SensorDataRequest_Length]         = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
 80073e2:	2601      	movs	r6, #1
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 80073e4:	24eb      	movs	r4, #235	; 0xeb
    uint8_t StatusRequest_data[RGB_SensorDataRequest_Length]         = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
 80073e6:	f8df a3c8 	ldr.w	sl, [pc, #968]	; 80077b0 <main+0x3f4>
 80073ea:	f8df 83c8 	ldr.w	r8, [pc, #968]	; 80077b4 <main+0x3f8>
 80073ee:	f89a 3000 	ldrb.w	r3, [sl]
 80073f2:	4649      	mov	r1, r9
 80073f4:	f88d 3023 	strb.w	r3, [sp, #35]	; 0x23
 80073f8:	f898 3000 	ldrb.w	r3, [r8]
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 80073fc:	f88d 001b 	strb.w	r0, [sp, #27]
    uint8_t StatusRequest_data[RGB_SensorDataRequest_Length]         = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
 8007400:	f10d 0021 	add.w	r0, sp, #33	; 0x21
    uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb};
 8007404:	f88d 401c 	strb.w	r4, [sp, #28]
    uint8_t StatusRequest_data[RGB_SensorDataRequest_Length]         = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
 8007408:	f88d 5020 	strb.w	r5, [sp, #32]
 800740c:	f88d 6021 	strb.w	r6, [sp, #33]	; 0x21
 8007410:	f88d 9022 	strb.w	r9, [sp, #34]	; 0x22
 8007414:	f88d 3024 	strb.w	r3, [sp, #36]	; 0x24
 8007418:	f000 fa6b 	bl	80078f2 <STH30_CreateCrc>
    uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};  
 800741c:	2303      	movs	r3, #3
 800741e:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 8007422:	f89a 3000 	ldrb.w	r3, [sl]
 8007426:	4649      	mov	r1, r9
 8007428:	f88d 302b 	strb.w	r3, [sp, #43]	; 0x2b
 800742c:	f898 3000 	ldrb.w	r3, [r8]
    uint8_t StatusRequest_data[RGB_SensorDataRequest_Length]         = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
 8007430:	f88d 0025 	strb.w	r0, [sp, #37]	; 0x25
    uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};  
 8007434:	f10d 0029 	add.w	r0, sp, #41	; 0x29
 8007438:	f88d 302c 	strb.w	r3, [sp, #44]	; 0x2c
    uint8_t StatusRequest_data[RGB_SensorDataRequest_Length]         = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb};
 800743c:	f88d 4026 	strb.w	r4, [sp, #38]	; 0x26
    uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};  
 8007440:	f88d 5028 	strb.w	r5, [sp, #40]	; 0x28
 8007444:	f88d 902a 	strb.w	r9, [sp, #42]	; 0x2a
 8007448:	f000 fa53 	bl	80078f2 <STH30_CreateCrc>
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800744c:	f04f 0a10 	mov.w	sl, #16
    uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};  
 8007450:	f88d 002d 	strb.w	r0, [sp, #45]	; 0x2d
    uint8_t data1[100]= {0,};
 8007454:	2264      	movs	r2, #100	; 0x64
 8007456:	2100      	movs	r1, #0
 8007458:	a810      	add	r0, sp, #64	; 0x40

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOC_CLK_ENABLE();
 800745a:	4db9      	ldr	r5, [pc, #740]	; (8007740 <main+0x384>)
    uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb};  
 800745c:	f88d 402e 	strb.w	r4, [sp, #46]	; 0x2e
    uint8_t data1[100]= {0,};
 8007460:	f000 fc07 	bl	8007c72 <memset>
    uint8_t data2[100]= {0,};
 8007464:	2264      	movs	r2, #100	; 0x64
 8007466:	2100      	movs	r1, #0
 8007468:	a829      	add	r0, sp, #164	; 0xa4
 800746a:	f000 fc02 	bl	8007c72 <memset>
  HAL_Init();
 800746e:	f7fc fefd 	bl	800426c <HAL_Init>
  SystemClock_Config();
 8007472:	f7ff ff7d 	bl	8007370 <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8007476:	4652      	mov	r2, sl
 8007478:	2100      	movs	r1, #0
 800747a:	a80c      	add	r0, sp, #48	; 0x30
 800747c:	f000 fbf9 	bl	8007c72 <memset>
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8007480:	69ab      	ldr	r3, [r5, #24]
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOA_CLK_ENABLE();
  __HAL_RCC_GPIOB_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 
 8007482:	2200      	movs	r2, #0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8007484:	ea43 030a 	orr.w	r3, r3, sl
 8007488:	61ab      	str	r3, [r5, #24]
 800748a:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 
 800748c:	f649 71f0 	movw	r1, #40944	; 0x9ff0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8007490:	ea03 030a 	and.w	r3, r3, sl
 8007494:	9302      	str	r3, [sp, #8]
 8007496:	9b02      	ldr	r3, [sp, #8]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8007498:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 
 800749a:	48aa      	ldr	r0, [pc, #680]	; (8007744 <main+0x388>)
  __HAL_RCC_GPIOD_CLK_ENABLE();
 800749c:	f043 0320 	orr.w	r3, r3, #32
 80074a0:	61ab      	str	r3, [r5, #24]
 80074a2:	69ab      	ldr	r3, [r5, #24]
                           LED_CH2_Pin LED_CH3_Pin */
  GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 
                          |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin 
                          |LED_CH2_Pin|LED_CH3_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80074a4:	2400      	movs	r4, #0
  __HAL_RCC_GPIOD_CLK_ENABLE();
 80074a6:	f003 0320 	and.w	r3, r3, #32
 80074aa:	9303      	str	r3, [sp, #12]
 80074ac:	9b03      	ldr	r3, [sp, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80074ae:	69ab      	ldr	r3, [r5, #24]
  huart1.Init.BaudRate = 115200;
 80074b0:	f44f 3be1 	mov.w	fp, #115200	; 0x1c200
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80074b4:	ea43 0309 	orr.w	r3, r3, r9
 80074b8:	61ab      	str	r3, [r5, #24]
 80074ba:	69ab      	ldr	r3, [r5, #24]
 80074bc:	ea03 0309 	and.w	r3, r3, r9
 80074c0:	9304      	str	r3, [sp, #16]
 80074c2:	9b04      	ldr	r3, [sp, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80074c4:	69ab      	ldr	r3, [r5, #24]
 80074c6:	f043 0308 	orr.w	r3, r3, #8
 80074ca:	61ab      	str	r3, [r5, #24]
 80074cc:	69ab      	ldr	r3, [r5, #24]
 80074ce:	f003 0308 	and.w	r3, r3, #8
 80074d2:	9305      	str	r3, [sp, #20]
 80074d4:	9b05      	ldr	r3, [sp, #20]
  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 
 80074d6:	f7fd fa21 	bl	800491c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 
 80074da:	2200      	movs	r2, #0
 80074dc:	f248 11f0 	movw	r1, #33264	; 0x81f0
 80074e0:	4899      	ldr	r0, [pc, #612]	; (8007748 <main+0x38c>)
 80074e2:	f7fd fa1b 	bl	800491c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 
 80074e6:	2200      	movs	r2, #0
 80074e8:	f24f 31e9 	movw	r1, #62441	; 0xf3e9
 80074ec:	4897      	ldr	r0, [pc, #604]	; (800774c <main+0x390>)
 80074ee:	f7fd fa15 	bl	800491c <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(LED_CH4_GPIO_Port, LED_CH4_Pin, GPIO_PIN_RESET);
 80074f2:	2200      	movs	r2, #0
 80074f4:	4649      	mov	r1, r9
 80074f6:	4896      	ldr	r0, [pc, #600]	; (8007750 <main+0x394>)
 80074f8:	f7fd fa10 	bl	800491c <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 
 80074fc:	f649 73f0 	movw	r3, #40944	; 0x9ff0
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8007500:	a90c      	add	r1, sp, #48	; 0x30
 8007502:	4890      	ldr	r0, [pc, #576]	; (8007744 <main+0x388>)
  GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 
 8007504:	930c      	str	r3, [sp, #48]	; 0x30
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007506:	960d      	str	r6, [sp, #52]	; 0x34
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007508:	970f      	str	r7, [sp, #60]	; 0x3c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800750a:	940e      	str	r4, [sp, #56]	; 0x38
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 800750c:	f7fd f914 	bl	8004738 <HAL_GPIO_Init>

  /*Configure GPIO pins : SX1276_DIO0_Pin SX1276_DIO1_Pin SX1276_DIO2_Pin SX1276_DIO3_Pin 
                           SENSOR_EN8_Pin SX1276_NSS_Pin */
  GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 
 8007510:	f248 13f0 	movw	r3, #33264	; 0x81f0
                          |SENSOR_EN8_Pin|SX1276_NSS_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007514:	a90c      	add	r1, sp, #48	; 0x30
 8007516:	488c      	ldr	r0, [pc, #560]	; (8007748 <main+0x38c>)
  GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 
 8007518:	930c      	str	r3, [sp, #48]	; 0x30
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800751a:	960d      	str	r6, [sp, #52]	; 0x34
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800751c:	970f      	str	r7, [sp, #60]	; 0x3c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800751e:	940e      	str	r4, [sp, #56]	; 0x38
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007520:	f7fd f90a 	bl	8004738 <HAL_GPIO_Init>

  /*Configure GPIO pins : SX1276_RESET_Pin LED_ALARM_Pin SENSOR_EN1_Pin SENSOR_EN2_Pin 
                           SENSOR_EN3_Pin SX1276_CLK_Pin SX1276_MOSI_Pin LED_CH5_Pin 
                           LED_CH6_Pin LED_CH7_Pin LED_CH8_Pin */
  GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 
 8007524:	f24f 33e9 	movw	r3, #62441	; 0xf3e9
                          |SENSOR_EN3_Pin|SX1276_CLK_Pin|SX1276_MOSI_Pin|LED_CH5_Pin 
                          |LED_CH6_Pin|LED_CH7_Pin|LED_CH8_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007528:	a90c      	add	r1, sp, #48	; 0x30
 800752a:	4888      	ldr	r0, [pc, #544]	; (800774c <main+0x390>)
  GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 
 800752c:	930c      	str	r3, [sp, #48]	; 0x30
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800752e:	960d      	str	r6, [sp, #52]	; 0x34
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007530:	970f      	str	r7, [sp, #60]	; 0x3c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007532:	940e      	str	r4, [sp, #56]	; 0x38
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007534:	f7fd f900 	bl	8004738 <HAL_GPIO_Init>
  /*Configure GPIO pin : LED_CH4_Pin */
  GPIO_InitStruct.Pin = LED_CH4_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct);
 8007538:	a90c      	add	r1, sp, #48	; 0x30
 800753a:	4885      	ldr	r0, [pc, #532]	; (8007750 <main+0x394>)
  GPIO_InitStruct.Pin = LED_CH4_Pin;
 800753c:	f8cd 9030 	str.w	r9, [sp, #48]	; 0x30
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007540:	960d      	str	r6, [sp, #52]	; 0x34
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007542:	970f      	str	r7, [sp, #60]	; 0x3c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007544:	940e      	str	r4, [sp, #56]	; 0x38
  HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct);
 8007546:	f7fd f8f7 	bl	8004738 <HAL_GPIO_Init>

  /*Configure GPIO pin : SX1276_MISO_Pin */
  GPIO_InitStruct.Pin = SX1276_MISO_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct);
 800754a:	a90c      	add	r1, sp, #48	; 0x30
 800754c:	487f      	ldr	r0, [pc, #508]	; (800774c <main+0x390>)
  GPIO_InitStruct.Pin = SX1276_MISO_Pin;
 800754e:	f8cd a030 	str.w	sl, [sp, #48]	; 0x30
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007552:	940d      	str	r4, [sp, #52]	; 0x34
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007554:	940e      	str	r4, [sp, #56]	; 0x38
  HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct);
 8007556:	f7fd f8ef 	bl	8004738 <HAL_GPIO_Init>
  __HAL_RCC_DMA1_CLK_ENABLE();
 800755a:	696b      	ldr	r3, [r5, #20]
  htim6.Instance = TIM6;
 800755c:	f8df 9258 	ldr.w	r9, [pc, #600]	; 80077b8 <main+0x3fc>
  __HAL_RCC_DMA1_CLK_ENABLE();
 8007560:	4333      	orrs	r3, r6
 8007562:	616b      	str	r3, [r5, #20]
 8007564:	696b      	ldr	r3, [r5, #20]
  htim6.Init.Prescaler = 1600-1;
 8007566:	4a7b      	ldr	r2, [pc, #492]	; (8007754 <main+0x398>)
  __HAL_RCC_DMA1_CLK_ENABLE();
 8007568:	4033      	ands	r3, r6
 800756a:	9301      	str	r3, [sp, #4]
 800756c:	9b01      	ldr	r3, [sp, #4]
  htim6.Init.Prescaler = 1600-1;
 800756e:	f240 633f 	movw	r3, #1599	; 0x63f
 8007572:	e889 000c 	stmia.w	r9, {r2, r3}
  htim6.Init.Period = 10-1;
 8007576:	2309      	movs	r3, #9
  huart1.Init.Mode = UART_MODE_TX_RX;
 8007578:	f04f 0a0c 	mov.w	sl, #12
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 800757c:	4648      	mov	r0, r9
  huart1.Instance = USART1;
 800757e:	4f76      	ldr	r7, [pc, #472]	; (8007758 <main+0x39c>)
  htim6.Init.Period = 10-1;
 8007580:	f8c9 300c 	str.w	r3, [r9, #12]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8007584:	940c      	str	r4, [sp, #48]	; 0x30
 8007586:	940d      	str	r4, [sp, #52]	; 0x34
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8007588:	f8c9 4008 	str.w	r4, [r9, #8]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 800758c:	f8c9 4018 	str.w	r4, [r9, #24]
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8007590:	f7fe f964 	bl	800585c <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8007594:	a90c      	add	r1, sp, #48	; 0x30
 8007596:	4648      	mov	r0, r9
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8007598:	940c      	str	r4, [sp, #48]	; 0x30
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 800759a:	940d      	str	r4, [sp, #52]	; 0x34
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 800759c:	f7fe f978 	bl	8005890 <HAL_TIMEx_MasterConfigSynchronization>
  huart1.Init.BaudRate = 115200;
 80075a0:	4b6e      	ldr	r3, [pc, #440]	; (800775c <main+0x3a0>)
  huart2.Instance = USART2;
 80075a2:	4d6f      	ldr	r5, [pc, #444]	; (8007760 <main+0x3a4>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 80075a4:	4638      	mov	r0, r7
  huart1.Init.BaudRate = 115200;
 80075a6:	e887 0808 	stmia.w	r7, {r3, fp}
  huart1.Init.Mode = UART_MODE_TX_RX;
 80075aa:	f8c7 a014 	str.w	sl, [r7, #20]
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 80075ae:	60bc      	str	r4, [r7, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 80075b0:	60fc      	str	r4, [r7, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 80075b2:	613c      	str	r4, [r7, #16]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80075b4:	61bc      	str	r4, [r7, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 80075b6:	61fc      	str	r4, [r7, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 80075b8:	f7fe fa62 	bl	8005a80 <HAL_UART_Init>
  huart2.Instance = USART2;
 80075bc:	4b69      	ldr	r3, [pc, #420]	; (8007764 <main+0x3a8>)
  if (HAL_UART_Init(&huart2) != HAL_OK)
 80075be:	4628      	mov	r0, r5
  huart2.Init.BaudRate = 115200;
 80075c0:	e885 0808 	stmia.w	r5, {r3, fp}
  huart2.Init.Mode = UART_MODE_TX_RX;
 80075c4:	f8c5 a014 	str.w	sl, [r5, #20]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 80075c8:	60ac      	str	r4, [r5, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 80075ca:	60ec      	str	r4, [r5, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 80075cc:	612c      	str	r4, [r5, #16]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80075ce:	61ac      	str	r4, [r5, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 80075d0:	61ec      	str	r4, [r5, #28]
  if (HAL_UART_Init(&huart2) != HAL_OK)
 80075d2:	f7fe fa55 	bl	8005a80 <HAL_UART_Init>
  hi2c2.Instance = I2C2;
 80075d6:	4864      	ldr	r0, [pc, #400]	; (8007768 <main+0x3ac>)
  hi2c2.Init.ClockSpeed = 100000;
 80075d8:	4964      	ldr	r1, [pc, #400]	; (800776c <main+0x3b0>)
 80075da:	4b65      	ldr	r3, [pc, #404]	; (8007770 <main+0x3b4>)
  hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
 80075dc:	6084      	str	r4, [r0, #8]
  hi2c2.Init.ClockSpeed = 100000;
 80075de:	e880 000a 	stmia.w	r0, {r1, r3}
  hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 80075e2:	f44f 4380 	mov.w	r3, #16384	; 0x4000
  hi2c2.Init.OwnAddress1 = 0;
 80075e6:	60c4      	str	r4, [r0, #12]
  hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 80075e8:	6103      	str	r3, [r0, #16]
  hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 80075ea:	6144      	str	r4, [r0, #20]
  hi2c2.Init.OwnAddress2 = 0;
 80075ec:	6184      	str	r4, [r0, #24]
  hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 80075ee:	61c4      	str	r4, [r0, #28]
  hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 80075f0:	6204      	str	r4, [r0, #32]
  if (HAL_I2C_Init(&hi2c2) != HAL_OK)
 80075f2:	f7fd fb65 	bl	8004cc0 <HAL_I2C_Init>
  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
 80075f6:	4622      	mov	r2, r4
 80075f8:	4621      	mov	r1, r4
 80075fa:	200f      	movs	r0, #15
 80075fc:	f7fc fe7e 	bl	80042fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
 8007600:	200f      	movs	r0, #15
 8007602:	f7fc feaf 	bl	8004364 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 8007606:	4622      	mov	r2, r4
 8007608:	4621      	mov	r1, r4
 800760a:	2025      	movs	r0, #37	; 0x25
 800760c:	f7fc fe76 	bl	80042fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8007610:	2025      	movs	r0, #37	; 0x25
 8007612:	f7fc fea7 	bl	8004364 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
 8007616:	4622      	mov	r2, r4
 8007618:	4621      	mov	r1, r4
 800761a:	2026      	movs	r0, #38	; 0x26
 800761c:	f7fc fe6e 	bl	80042fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART2_IRQn);
 8007620:	2026      	movs	r0, #38	; 0x26
 8007622:	f7fc fe9f 	bl	8004364 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 8007626:	4622      	mov	r2, r4
 8007628:	4621      	mov	r1, r4
 800762a:	2036      	movs	r0, #54	; 0x36
 800762c:	f7fc fe66 	bl	80042fc <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 8007630:	2036      	movs	r0, #54	; 0x36
 8007632:	f7fc fe97 	bl	8004364 <HAL_NVIC_EnableIRQ>
    RGB_SensorIDAutoset = set;
 8007636:	f8df a184 	ldr.w	sl, [pc, #388]	; 80077bc <main+0x400>
  HAL_TIM_Base_Start_IT(&htim6);
 800763a:	4648      	mov	r0, r9
 800763c:	f7fe f810 	bl	8005660 <HAL_TIM_Base_Start_IT>
  HAL_UART_Receive_DMA(&huart1, rx1_data, 1);
 8007640:	4632      	mov	r2, r6
 8007642:	494c      	ldr	r1, [pc, #304]	; (8007774 <main+0x3b8>)
 8007644:	4638      	mov	r0, r7
    RGB_SensorIDAutoset = set;
 8007646:	f88a 6000 	strb.w	r6, [sl]
  HAL_UART_Receive_DMA(&huart1, rx1_data, 1);
 800764a:	f7fe facb 	bl	8005be4 <HAL_UART_Receive_DMA>
  HAL_UART_Receive_IT(&huart2, &rx2_data[0],1);
 800764e:	4632      	mov	r2, r6
 8007650:	4949      	ldr	r1, [pc, #292]	; (8007778 <main+0x3bc>)
 8007652:	4628      	mov	r0, r5
 8007654:	f7fe fa9e 	bl	8005b94 <HAL_UART_Receive_IT>
  setbuf(stdout, NULL); // \n ?�„ ? �?�„ ?–„ë§? 
 8007658:	4b48      	ldr	r3, [pc, #288]	; (800777c <main+0x3c0>)
 800765a:	4621      	mov	r1, r4
 800765c:	681b      	ldr	r3, [r3, #0]
    uint8_t cnt1 = 0,cnt2=0,uartdatarecv = 0;
 800765e:	4625      	mov	r5, r4
  setbuf(stdout, NULL); // \n ?�„ ? �?�„ ?–„ë§? 
 8007660:	6898      	ldr	r0, [r3, #8]
 8007662:	f000 fb8b 	bl	8007d7c <setbuf>
   Uart1_Data_Send(&SensorSerchStart_cmd[bluecell_stx], SensorSerchStart_cmd[bluecell_length] + 3);
 8007666:	f89d 101a 	ldrb.w	r1, [sp, #26]
 800766a:	a806      	add	r0, sp, #24
 800766c:	3103      	adds	r1, #3
 800766e:	b2c9      	uxtb	r1, r1
 8007670:	f7ff fcb0 	bl	8006fd4 <Uart1_Data_Send>
 8007674:	4646      	mov	r6, r8
  Flash_InitRead();
 8007676:	f7ff fe1f 	bl	80072b8 <Flash_InitRead>
  RGB_Data_Init();
 800767a:	f7fe fceb 	bl	8006054 <RGB_Data_Init>
  Lora_Initialize();
 800767e:	f7ff fe3b 	bl	80072f8 <Lora_Initialize>
     if(LoraTxTimerCnt > LORA_TIMER_CNT){
 8007682:	4b3f      	ldr	r3, [pc, #252]	; (8007780 <main+0x3c4>)
 8007684:	4a3f      	ldr	r2, [pc, #252]	; (8007784 <main+0x3c8>)
 8007686:	6819      	ldr	r1, [r3, #0]
 8007688:	4f3f      	ldr	r7, [pc, #252]	; (8007788 <main+0x3cc>)
 800768a:	4291      	cmp	r1, r2
        LoraTxTimerCnt = 0;
 800768c:	bf84      	itt	hi
 800768e:	2200      	movhi	r2, #0
 8007690:	601a      	strhi	r2, [r3, #0]
    RGB_Alarm_Operate();//LED ALARM CHECK
 8007692:	f7fe ff0f 	bl	80064b4 <RGB_Alarm_Operate>
    if(LoraDataSendGet() == LoraTx_mode){
 8007696:	4b3d      	ldr	r3, [pc, #244]	; (800778c <main+0x3d0>)
 8007698:	781b      	ldrb	r3, [r3, #0]
 800769a:	2b01      	cmp	r3, #1
 800769c:	f040 80e9 	bne.w	8007872 <main+0x4b6>
        message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc
 80076a0:	f04f 0808 	mov.w	r8, #8
        memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT);
 80076a4:	4a3a      	ldr	r2, [pc, #232]	; (8007790 <main+0x3d4>)
 80076a6:	f8df 9118 	ldr.w	r9, [pc, #280]	; 80077c0 <main+0x404>
 80076aa:	6813      	ldr	r3, [r2, #0]
        message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc
 80076ac:	f8df b114 	ldr.w	fp, [pc, #276]	; 80077c4 <main+0x408>
        memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT);
 80076b0:	f8c9 3000 	str.w	r3, [r9]
 80076b4:	6853      	ldr	r3, [r2, #4]
        ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
 80076b6:	4641      	mov	r1, r8
        memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT);
 80076b8:	f8c9 3004 	str.w	r3, [r9, #4]
        ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
 80076bc:	f44f 62fa 	mov.w	r2, #2000	; 0x7d0
 80076c0:	4834      	ldr	r0, [pc, #208]	; (8007794 <main+0x3d8>)
        message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc
 80076c2:	f8cb 8000 	str.w	r8, [fp]
        ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
 80076c6:	f7ff fb76 	bl	8006db6 <SX1276_LoRaEntryTx>
        ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000);
 80076ca:	f44f 63fa 	mov.w	r3, #2000	; 0x7d0
        ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000);
 80076ce:	6038      	str	r0, [r7, #0]
        ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000);
 80076d0:	f89b 2000 	ldrb.w	r2, [fp]
 80076d4:	4649      	mov	r1, r9
 80076d6:	482f      	ldr	r0, [pc, #188]	; (8007794 <main+0x3d8>)
 80076d8:	f7ff fbad 	bl	8006e36 <SX1276_LoRaTxPacket>
    LoraDataSend = val;
 80076dc:	2300      	movs	r3, #0
 80076de:	4a2b      	ldr	r2, [pc, #172]	; (800778c <main+0x3d0>)
        ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000);
 80076e0:	6038      	str	r0, [r7, #0]
    LoraDataSend = val;
 80076e2:	7013      	strb	r3, [r2, #0]
        ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000);
 80076e4:	4641      	mov	r1, r8
 80076e6:	f44f 62fa 	mov.w	r2, #2000	; 0x7d0
 80076ea:	482a      	ldr	r0, [pc, #168]	; (8007794 <main+0x3d8>)
 80076ec:	f7ff fae9 	bl	8006cc2 <SX1276_LoRaEntryRx>
 80076f0:	6038      	str	r0, [r7, #0]
     if(count_in1 != count_out1){ // <------- 
 80076f2:	4829      	ldr	r0, [pc, #164]	; (8007798 <main+0x3dc>)
 80076f4:	4b29      	ldr	r3, [pc, #164]	; (800779c <main+0x3e0>)
 80076f6:	7807      	ldrb	r7, [r0, #0]
 80076f8:	781b      	ldrb	r3, [r3, #0]
 80076fa:	42bb      	cmp	r3, r7
 80076fc:	4b28      	ldr	r3, [pc, #160]	; (80077a0 <main+0x3e4>)
 80076fe:	d018      	beq.n	8007732 <main+0x376>
        data1[cnt1++] = buf1[count_out1++];
 8007700:	1c7a      	adds	r2, r7, #1
 8007702:	b2d2      	uxtb	r2, r2
 8007704:	7002      	strb	r2, [r0, #0]
        if(count_out1 >= 100){ count_out1 = 0; }
 8007706:	2a63      	cmp	r2, #99	; 0x63
 8007708:	f04f 0200 	mov.w	r2, #0
        data1[cnt1++] = buf1[count_out1++];
 800770c:	f50d 7e84 	add.w	lr, sp, #264	; 0x108
 8007710:	f105 0101 	add.w	r1, r5, #1
 8007714:	4475      	add	r5, lr
 8007716:	f8df e0b0 	ldr.w	lr, [pc, #176]	; 80077c8 <main+0x40c>
        if(count_out1 >= 100){ count_out1 = 0; }
 800771a:	bf88      	it	hi
 800771c:	7002      	strbhi	r2, [r0, #0]
        UartTimerCnt = 0;
 800771e:	4821      	ldr	r0, [pc, #132]	; (80077a4 <main+0x3e8>)
        data1[cnt1++] = buf1[count_out1++];
 8007720:	f81e 7007 	ldrb.w	r7, [lr, r7]
 8007724:	b2c9      	uxtb	r1, r1
        UartTimerCnt = 0;
 8007726:	6002      	str	r2, [r0, #0]
    UartDataisReved = val;
 8007728:	2201      	movs	r2, #1
        data1[cnt1++] = buf1[count_out1++];
 800772a:	f805 7cc8 	strb.w	r7, [r5, #-200]
 800772e:	460d      	mov	r5, r1
    UartDataisReved = val;
 8007730:	701a      	strb	r2, [r3, #0]
    if(count_in2 != count_out2){ // <------- 
 8007732:	481d      	ldr	r0, [pc, #116]	; (80077a8 <main+0x3ec>)
 8007734:	4a1d      	ldr	r2, [pc, #116]	; (80077ac <main+0x3f0>)
 8007736:	7807      	ldrb	r7, [r0, #0]
 8007738:	7812      	ldrb	r2, [r2, #0]
 800773a:	42ba      	cmp	r2, r7
 800773c:	d05f      	beq.n	80077fe <main+0x442>
 800773e:	e045      	b.n	80077cc <main+0x410>
 8007740:	40021000 	.word	0x40021000
 8007744:	40011000 	.word	0x40011000
 8007748:	40010800 	.word	0x40010800
 800774c:	40010c00 	.word	0x40010c00
 8007750:	40011400 	.word	0x40011400
 8007754:	40001000 	.word	0x40001000
 8007758:	2000055c 	.word	0x2000055c
 800775c:	40013800 	.word	0x40013800
 8007760:	20000708 	.word	0x20000708
 8007764:	40004400 	.word	0x40004400
 8007768:	2000043c 	.word	0x2000043c
 800776c:	40005800 	.word	0x40005800
 8007770:	000186a0 	.word	0x000186a0
 8007774:	20000664 	.word	0x20000664
 8007778:	20000490 	.word	0x20000490
 800777c:	20000014 	.word	0x20000014
 8007780:	2000034c 	.word	0x2000034c
 8007784:	000493e0 	.word	0x000493e0
 8007788:	20000748 	.word	0x20000748
 800778c:	20000514 	.word	0x20000514
 8007790:	2000009d 	.word	0x2000009d
 8007794:	2000074c 	.word	0x2000074c
 8007798:	20000422 	.word	0x20000422
 800779c:	20000420 	.word	0x20000420
 80077a0:	20000438 	.word	0x20000438
 80077a4:	20000354 	.word	0x20000354
 80077a8:	20000423 	.word	0x20000423
 80077ac:	20000421 	.word	0x20000421
 80077b0:	20000350 	.word	0x20000350
 80077b4:	20000352 	.word	0x20000352
 80077b8:	200006c8 	.word	0x200006c8
 80077bc:	20000351 	.word	0x20000351
 80077c0:	2000059c 	.word	0x2000059c
 80077c4:	20000434 	.word	0x20000434
 80077c8:	20000358 	.word	0x20000358
         data2[cnt2++] = buf2[count_out2++];
 80077cc:	1c7a      	adds	r2, r7, #1
 80077ce:	b2d2      	uxtb	r2, r2
 80077d0:	7002      	strb	r2, [r0, #0]
         if(count_out2 >= 100){ count_out2 = 0; }
 80077d2:	2a63      	cmp	r2, #99	; 0x63
 80077d4:	f04f 0200 	mov.w	r2, #0
         data2[cnt2++] = buf2[count_out2++];
 80077d8:	f50d 7e84 	add.w	lr, sp, #264	; 0x108
 80077dc:	f104 0101 	add.w	r1, r4, #1
 80077e0:	4474      	add	r4, lr
 80077e2:	f8df e108 	ldr.w	lr, [pc, #264]	; 80078ec <main+0x530>
         if(count_out2 >= 100){ count_out2 = 0; }
 80077e6:	bf88      	it	hi
 80077e8:	7002      	strbhi	r2, [r0, #0]
         UartTimerCnt = 0;
 80077ea:	4837      	ldr	r0, [pc, #220]	; (80078c8 <main+0x50c>)
         data2[cnt2++] = buf2[count_out2++];
 80077ec:	f81e 7007 	ldrb.w	r7, [lr, r7]
 80077f0:	b2c9      	uxtb	r1, r1
         UartTimerCnt = 0;
 80077f2:	6002      	str	r2, [r0, #0]
    UartDataisReved = val;
 80077f4:	2202      	movs	r2, #2
         data2[cnt2++] = buf2[count_out2++];
 80077f6:	f804 7c64 	strb.w	r7, [r4, #-100]
 80077fa:	460c      	mov	r4, r1
    UartDataisReved = val;
 80077fc:	701a      	strb	r2, [r3, #0]
    return UartDataisReved;
 80077fe:	781a      	ldrb	r2, [r3, #0]
        if(uartdatarecv == 1 && UartTimerCnt > 100){
 8007800:	2a01      	cmp	r2, #1
 8007802:	d147      	bne.n	8007894 <main+0x4d8>
 8007804:	4a30      	ldr	r2, [pc, #192]	; (80078c8 <main+0x50c>)
 8007806:	6812      	ldr	r2, [r2, #0]
 8007808:	2a64      	cmp	r2, #100	; 0x64
 800780a:	d90a      	bls.n	8007822 <main+0x466>
    UartDataisReved = val;
 800780c:	2500      	movs	r5, #0
            Uart_dataCheck(&data1[0],&count_in1);
 800780e:	492f      	ldr	r1, [pc, #188]	; (80078cc <main+0x510>)
 8007810:	a810      	add	r0, sp, #64	; 0x40
    UartDataisReved = val;
 8007812:	701d      	strb	r5, [r3, #0]
            Uart_dataCheck(&data1[0],&count_in1);
 8007814:	f7ff fbf0 	bl	8006ff8 <Uart_dataCheck>
            memset(&data1[0],0,100);
 8007818:	2264      	movs	r2, #100	; 0x64
 800781a:	4629      	mov	r1, r5
 800781c:	a810      	add	r0, sp, #64	; 0x40
            memset(&data2[0],0,100);
 800781e:	f000 fa28 	bl	8007c72 <memset>
    if(LedTimerCnt > 500){
 8007822:	4b2b      	ldr	r3, [pc, #172]	; (80078d0 <main+0x514>)
 8007824:	681b      	ldr	r3, [r3, #0]
 8007826:	f5b3 7ffa 	cmp.w	r3, #500	; 0x1f4
 800782a:	f67f af2a 	bls.w	8007682 <main+0x2c6>
        if(RGB_SensorIDAutoGet() == 1){
 800782e:	f89a 3000 	ldrb.w	r3, [sl]
 8007832:	2b01      	cmp	r3, #1
 8007834:	d114      	bne.n	8007860 <main+0x4a4>
            if(SensorID == 0){memset(&SensorID_buf[0],0x00,8);SensorID_Cnt = 0;}
 8007836:	7830      	ldrb	r0, [r6, #0]
 8007838:	b920      	cbnz	r0, 8007844 <main+0x488>
 800783a:	4b26      	ldr	r3, [pc, #152]	; (80078d4 <main+0x518>)
 800783c:	6018      	str	r0, [r3, #0]
 800783e:	6058      	str	r0, [r3, #4]
 8007840:	4b25      	ldr	r3, [pc, #148]	; (80078d8 <main+0x51c>)
 8007842:	7018      	strb	r0, [r3, #0]
            IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID
 8007844:	3001      	adds	r0, #1
 8007846:	b2c0      	uxtb	r0, r0
            if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){
 8007848:	2808      	cmp	r0, #8
            IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID
 800784a:	7030      	strb	r0, [r6, #0]
 800784c:	f88d 002c 	strb.w	r0, [sp, #44]	; 0x2c
            if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){
 8007850:	d930      	bls.n	80078b4 <main+0x4f8>
    RGB_SensorIDAutoset = set;
 8007852:	2700      	movs	r7, #0
                RGB_Sensor_PowerOnOff(0);
 8007854:	4638      	mov	r0, r7
    RGB_SensorIDAutoset = set;
 8007856:	f88a 7000 	strb.w	r7, [sl]
                RGB_Sensor_PowerOnOff(0);
 800785a:	f7ff fc01 	bl	8007060 <RGB_Sensor_PowerOnOff>
                SensorID = 0;
 800785e:	7037      	strb	r7, [r6, #0]
        HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 8007860:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007864:	481d      	ldr	r0, [pc, #116]	; (80078dc <main+0x520>)
 8007866:	f7fd f85e 	bl	8004926 <HAL_GPIO_TogglePin>
        LedTimerCnt = 0;
 800786a:	2300      	movs	r3, #0
 800786c:	4a18      	ldr	r2, [pc, #96]	; (80078d0 <main+0x514>)
 800786e:	6013      	str	r3, [r2, #0]
 8007870:	e707      	b.n	8007682 <main+0x2c6>
           ret = SX1276_LoRaRxPacket(&SX1276);
 8007872:	481b      	ldr	r0, [pc, #108]	; (80078e0 <main+0x524>)
 8007874:	f7ff fa71 	bl	8006d5a <SX1276_LoRaRxPacket>
 8007878:	4602      	mov	r2, r0
 800787a:	6038      	str	r0, [r7, #0]
           if (ret > 0) {
 800787c:	2800      	cmp	r0, #0
 800787e:	f43f af38 	beq.w	80076f2 <main+0x336>
               SX1276_read(&SX1276, &buffer[0], ret);
 8007882:	4918      	ldr	r1, [pc, #96]	; (80078e4 <main+0x528>)
 8007884:	4816      	ldr	r0, [pc, #88]	; (80078e0 <main+0x524>)
 8007886:	f7ff fb23 	bl	8006ed0 <SX1276_read>
               Uart_dataCheck(&buffer[bluecell_stx],&ret);
 800788a:	4639      	mov	r1, r7
 800788c:	4815      	ldr	r0, [pc, #84]	; (80078e4 <main+0x528>)
 800788e:	f7ff fbb3 	bl	8006ff8 <Uart_dataCheck>
 8007892:	e72e      	b.n	80076f2 <main+0x336>
        if(uartdatarecv == 2 && UartTimerCnt > 100){
 8007894:	2a02      	cmp	r2, #2
 8007896:	d1c4      	bne.n	8007822 <main+0x466>
 8007898:	4a0b      	ldr	r2, [pc, #44]	; (80078c8 <main+0x50c>)
 800789a:	6812      	ldr	r2, [r2, #0]
 800789c:	2a64      	cmp	r2, #100	; 0x64
 800789e:	d9c0      	bls.n	8007822 <main+0x466>
    UartDataisReved = val;
 80078a0:	2400      	movs	r4, #0
            Uart_dataCheck(&data2[0],&count_in2);
 80078a2:	4911      	ldr	r1, [pc, #68]	; (80078e8 <main+0x52c>)
 80078a4:	a829      	add	r0, sp, #164	; 0xa4
    UartDataisReved = val;
 80078a6:	701c      	strb	r4, [r3, #0]
            Uart_dataCheck(&data2[0],&count_in2);
 80078a8:	f7ff fba6 	bl	8006ff8 <Uart_dataCheck>
            memset(&data2[0],0,100);
 80078ac:	2264      	movs	r2, #100	; 0x64
 80078ae:	4621      	mov	r1, r4
 80078b0:	a829      	add	r0, sp, #164	; 0xa4
 80078b2:	e7b4      	b.n	800781e <main+0x462>
                RGB_Sensor_PowerOnOff(IDAutoSetRequest_data[4]);
 80078b4:	f7ff fbd4 	bl	8007060 <RGB_Sensor_PowerOnOff>
                HAL_Delay(100);
 80078b8:	2064      	movs	r0, #100	; 0x64
 80078ba:	f7fc fcfb 	bl	80042b4 <HAL_Delay>
                RGB_Controller_Func(&IDAutoSetRequest_data[bluecell_stx]);
 80078be:	a80a      	add	r0, sp, #40	; 0x28
 80078c0:	f7fe ff04 	bl	80066cc <RGB_Controller_Func>
 80078c4:	e7cc      	b.n	8007860 <main+0x4a4>
 80078c6:	bf00      	nop
 80078c8:	20000354 	.word	0x20000354
 80078cc:	20000420 	.word	0x20000420
 80078d0:	20000344 	.word	0x20000344
 80078d4:	200002fb 	.word	0x200002fb
 80078d8:	200002fa 	.word	0x200002fa
 80078dc:	40011000 	.word	0x40011000
 80078e0:	2000074c 	.word	0x2000074c
 80078e4:	2000059c 	.word	0x2000059c
 80078e8:	20000421 	.word	0x20000421
 80078ec:	200003bc 	.word	0x200003bc

080078f0 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 80078f0:	4770      	bx	lr

080078f2 <STH30_CreateCrc>:
	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 80078f2:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 80078f4:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 80078f6:	4604      	mov	r4, r0
 80078f8:	1a22      	subs	r2, r4, r0
 80078fa:	b2d2      	uxtb	r2, r2
 80078fc:	4291      	cmp	r1, r2
 80078fe:	d801      	bhi.n	8007904 <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 8007900:	4618      	mov	r0, r3
 8007902:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 8007904:	f814 2b01 	ldrb.w	r2, [r4], #1
 8007908:	4053      	eors	r3, r2
 800790a:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 800790c:	f013 0f80 	tst.w	r3, #128	; 0x80
 8007910:	f102 32ff 	add.w	r2, r2, #4294967295
 8007914:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8007918:	bf18      	it	ne
 800791a:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 800791e:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 8007922:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8007924:	d1f2      	bne.n	800790c <STH30_CreateCrc+0x1a>
 8007926:	e7e7      	b.n	80078f8 <STH30_CreateCrc+0x6>

08007928 <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 8007928:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 800792a:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 800792c:	4605      	mov	r5, r0
 800792e:	1a2c      	subs	r4, r5, r0
 8007930:	b2e4      	uxtb	r4, r4
 8007932:	42a1      	cmp	r1, r4
 8007934:	d803      	bhi.n	800793e <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8007936:	1a9b      	subs	r3, r3, r2
 8007938:	4258      	negs	r0, r3
 800793a:	4158      	adcs	r0, r3
 800793c:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 800793e:	f815 4b01 	ldrb.w	r4, [r5], #1
 8007942:	4063      	eors	r3, r4
 8007944:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8007946:	f013 0f80 	tst.w	r3, #128	; 0x80
 800794a:	f104 34ff 	add.w	r4, r4, #4294967295
 800794e:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8007952:	bf18      	it	ne
 8007954:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8007958:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 800795c:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 800795e:	d1f2      	bne.n	8007946 <STH30_CheckCrc+0x1e>
 8007960:	e7e5      	b.n	800792e <STH30_CheckCrc+0x6>
	...

08007964 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8007964:	4b0e      	ldr	r3, [pc, #56]	; (80079a0 <HAL_MspInit+0x3c>)
{
 8007966:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8007968:	699a      	ldr	r2, [r3, #24]
 800796a:	f042 0201 	orr.w	r2, r2, #1
 800796e:	619a      	str	r2, [r3, #24]
 8007970:	699a      	ldr	r2, [r3, #24]
 8007972:	f002 0201 	and.w	r2, r2, #1
 8007976:	9200      	str	r2, [sp, #0]
 8007978:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 800797a:	69da      	ldr	r2, [r3, #28]
 800797c:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8007980:	61da      	str	r2, [r3, #28]
 8007982:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /**DISABLE: JTAG-DP Disabled and SW-DP Disabled 
  */
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8007984:	4a07      	ldr	r2, [pc, #28]	; (80079a4 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 8007986:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 800798a:	9301      	str	r3, [sp, #4]
 800798c:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 800798e:	6853      	ldr	r3, [r2, #4]
 8007990:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8007994:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
 8007998:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 800799a:	b002      	add	sp, #8
 800799c:	4770      	bx	lr
 800799e:	bf00      	nop
 80079a0:	40021000 	.word	0x40021000
 80079a4:	40010000 	.word	0x40010000

080079a8 <HAL_I2C_MspInit>:
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
 80079a8:	b510      	push	{r4, lr}
 80079aa:	4604      	mov	r4, r0
 80079ac:	b086      	sub	sp, #24

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80079ae:	2210      	movs	r2, #16
 80079b0:	2100      	movs	r1, #0
 80079b2:	a802      	add	r0, sp, #8
 80079b4:	f000 f95d 	bl	8007c72 <memset>
  if(hi2c->Instance==I2C2)
 80079b8:	6822      	ldr	r2, [r4, #0]
 80079ba:	4b11      	ldr	r3, [pc, #68]	; (8007a00 <HAL_I2C_MspInit+0x58>)
 80079bc:	429a      	cmp	r2, r3
 80079be:	d11d      	bne.n	80079fc <HAL_I2C_MspInit+0x54>
  {
  /* USER CODE BEGIN I2C2_MspInit 0 */

  /* USER CODE END I2C2_MspInit 0 */
  
    __HAL_RCC_GPIOB_CLK_ENABLE();
 80079c0:	4c10      	ldr	r4, [pc, #64]	; (8007a04 <HAL_I2C_MspInit+0x5c>)
    PB11     ------> I2C2_SDA 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80079c2:	a902      	add	r1, sp, #8
    __HAL_RCC_GPIOB_CLK_ENABLE();
 80079c4:	69a3      	ldr	r3, [r4, #24]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80079c6:	4810      	ldr	r0, [pc, #64]	; (8007a08 <HAL_I2C_MspInit+0x60>)
    __HAL_RCC_GPIOB_CLK_ENABLE();
 80079c8:	f043 0308 	orr.w	r3, r3, #8
 80079cc:	61a3      	str	r3, [r4, #24]
 80079ce:	69a3      	ldr	r3, [r4, #24]
 80079d0:	f003 0308 	and.w	r3, r3, #8
 80079d4:	9300      	str	r3, [sp, #0]
 80079d6:	9b00      	ldr	r3, [sp, #0]
    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
 80079d8:	f44f 6340 	mov.w	r3, #3072	; 0xc00
 80079dc:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
 80079de:	2312      	movs	r3, #18
 80079e0:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 80079e2:	2303      	movs	r3, #3
 80079e4:	9305      	str	r3, [sp, #20]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80079e6:	f7fc fea7 	bl	8004738 <HAL_GPIO_Init>

    /* Peripheral clock enable */
    __HAL_RCC_I2C2_CLK_ENABLE();
 80079ea:	69e3      	ldr	r3, [r4, #28]
 80079ec:	f443 0380 	orr.w	r3, r3, #4194304	; 0x400000
 80079f0:	61e3      	str	r3, [r4, #28]
 80079f2:	69e3      	ldr	r3, [r4, #28]
 80079f4:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
 80079f8:	9301      	str	r3, [sp, #4]
 80079fa:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN I2C2_MspInit 1 */

  /* USER CODE END I2C2_MspInit 1 */
  }

}
 80079fc:	b006      	add	sp, #24
 80079fe:	bd10      	pop	{r4, pc}
 8007a00:	40005800 	.word	0x40005800
 8007a04:	40021000 	.word	0x40021000
 8007a08:	40010c00 	.word	0x40010c00

08007a0c <HAL_TIM_Base_MspInit>:
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{

  if(htim_base->Instance==TIM6)
 8007a0c:	6802      	ldr	r2, [r0, #0]
 8007a0e:	4b08      	ldr	r3, [pc, #32]	; (8007a30 <HAL_TIM_Base_MspInit+0x24>)
{
 8007a10:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 8007a12:	429a      	cmp	r2, r3
 8007a14:	d10a      	bne.n	8007a2c <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 8007a16:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 8007a1a:	69da      	ldr	r2, [r3, #28]
 8007a1c:	f042 0210 	orr.w	r2, r2, #16
 8007a20:	61da      	str	r2, [r3, #28]
 8007a22:	69db      	ldr	r3, [r3, #28]
 8007a24:	f003 0310 	and.w	r3, r3, #16
 8007a28:	9301      	str	r3, [sp, #4]
 8007a2a:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 8007a2c:	b002      	add	sp, #8
 8007a2e:	4770      	bx	lr
 8007a30:	40001000 	.word	0x40001000

08007a34 <HAL_UART_MspInit>:
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8007a34:	2210      	movs	r2, #16
{
 8007a36:	b570      	push	{r4, r5, r6, lr}
 8007a38:	4606      	mov	r6, r0
 8007a3a:	b088      	sub	sp, #32
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8007a3c:	eb0d 0002 	add.w	r0, sp, r2
 8007a40:	2100      	movs	r1, #0
 8007a42:	f000 f916 	bl	8007c72 <memset>
  if(huart->Instance==USART1)
 8007a46:	6833      	ldr	r3, [r6, #0]
 8007a48:	4a35      	ldr	r2, [pc, #212]	; (8007b20 <HAL_UART_MspInit+0xec>)
 8007a4a:	4293      	cmp	r3, r2
 8007a4c:	d13d      	bne.n	8007aca <HAL_UART_MspInit+0x96>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 8007a4e:	4b35      	ldr	r3, [pc, #212]	; (8007b24 <HAL_UART_MspInit+0xf0>)
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007a50:	a904      	add	r1, sp, #16
    __HAL_RCC_USART1_CLK_ENABLE();
 8007a52:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007a54:	4834      	ldr	r0, [pc, #208]	; (8007b28 <HAL_UART_MspInit+0xf4>)
    __HAL_RCC_USART1_CLK_ENABLE();
 8007a56:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8007a5a:	619a      	str	r2, [r3, #24]
 8007a5c:	699a      	ldr	r2, [r3, #24]

    GPIO_InitStruct.Pin = GPIO_PIN_10;
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007a5e:	2500      	movs	r5, #0
    __HAL_RCC_USART1_CLK_ENABLE();
 8007a60:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 8007a64:	9200      	str	r2, [sp, #0]
 8007a66:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8007a68:	699a      	ldr	r2, [r3, #24]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

    /* USART1 DMA Init */
    /* USART1_RX Init */
    hdma_usart1_rx.Instance = DMA1_Channel5;
 8007a6a:	4c30      	ldr	r4, [pc, #192]	; (8007b2c <HAL_UART_MspInit+0xf8>)
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8007a6c:	f042 0204 	orr.w	r2, r2, #4
 8007a70:	619a      	str	r2, [r3, #24]
 8007a72:	699b      	ldr	r3, [r3, #24]
 8007a74:	f003 0304 	and.w	r3, r3, #4
 8007a78:	9301      	str	r3, [sp, #4]
 8007a7a:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8007a7c:	f44f 7300 	mov.w	r3, #512	; 0x200
 8007a80:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8007a82:	2302      	movs	r3, #2
 8007a84:	9305      	str	r3, [sp, #20]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8007a86:	2303      	movs	r3, #3
 8007a88:	9307      	str	r3, [sp, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007a8a:	f7fc fe55 	bl	8004738 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8007a8e:	f44f 6380 	mov.w	r3, #1024	; 0x400
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007a92:	4825      	ldr	r0, [pc, #148]	; (8007b28 <HAL_UART_MspInit+0xf4>)
 8007a94:	a904      	add	r1, sp, #16
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8007a96:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007a98:	9505      	str	r5, [sp, #20]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007a9a:	9506      	str	r5, [sp, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007a9c:	f7fc fe4c 	bl	8004738 <HAL_GPIO_Init>
    hdma_usart1_rx.Instance = DMA1_Channel5;
 8007aa0:	4b23      	ldr	r3, [pc, #140]	; (8007b30 <HAL_UART_MspInit+0xfc>)
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
    hdma_usart1_rx.Init.Mode = DMA_CIRCULAR;
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 8007aa2:	4620      	mov	r0, r4
    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8007aa4:	e884 0028 	stmia.w	r4, {r3, r5}
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 8007aa8:	2380      	movs	r3, #128	; 0x80
 8007aaa:	60e3      	str	r3, [r4, #12]
    hdma_usart1_rx.Init.Mode = DMA_CIRCULAR;
 8007aac:	2320      	movs	r3, #32
    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8007aae:	60a5      	str	r5, [r4, #8]
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8007ab0:	6125      	str	r5, [r4, #16]
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8007ab2:	6165      	str	r5, [r4, #20]
    hdma_usart1_rx.Init.Mode = DMA_CIRCULAR;
 8007ab4:	61a3      	str	r3, [r4, #24]
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
 8007ab6:	61e5      	str	r5, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 8007ab8:	f7fc fc76 	bl	80043a8 <HAL_DMA_Init>
 8007abc:	b108      	cbz	r0, 8007ac2 <HAL_UART_MspInit+0x8e>
    {
      Error_Handler();
 8007abe:	f7ff ff17 	bl	80078f0 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
 8007ac2:	6374      	str	r4, [r6, #52]	; 0x34
 8007ac4:	6266      	str	r6, [r4, #36]	; 0x24
  /* USER CODE BEGIN USART2_MspInit 1 */

  /* USER CODE END USART2_MspInit 1 */
  }

}
 8007ac6:	b008      	add	sp, #32
 8007ac8:	bd70      	pop	{r4, r5, r6, pc}
  else if(huart->Instance==USART2)
 8007aca:	4a1a      	ldr	r2, [pc, #104]	; (8007b34 <HAL_UART_MspInit+0x100>)
 8007acc:	4293      	cmp	r3, r2
 8007ace:	d1fa      	bne.n	8007ac6 <HAL_UART_MspInit+0x92>
    __HAL_RCC_USART2_CLK_ENABLE();
 8007ad0:	4b14      	ldr	r3, [pc, #80]	; (8007b24 <HAL_UART_MspInit+0xf0>)
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007ad2:	a904      	add	r1, sp, #16
    __HAL_RCC_USART2_CLK_ENABLE();
 8007ad4:	69da      	ldr	r2, [r3, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007ad6:	4814      	ldr	r0, [pc, #80]	; (8007b28 <HAL_UART_MspInit+0xf4>)
    __HAL_RCC_USART2_CLK_ENABLE();
 8007ad8:	f442 3200 	orr.w	r2, r2, #131072	; 0x20000
 8007adc:	61da      	str	r2, [r3, #28]
 8007ade:	69da      	ldr	r2, [r3, #28]
 8007ae0:	f402 3200 	and.w	r2, r2, #131072	; 0x20000
 8007ae4:	9202      	str	r2, [sp, #8]
 8007ae6:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8007ae8:	699a      	ldr	r2, [r3, #24]
 8007aea:	f042 0204 	orr.w	r2, r2, #4
 8007aee:	619a      	str	r2, [r3, #24]
 8007af0:	699b      	ldr	r3, [r3, #24]
 8007af2:	f003 0304 	and.w	r3, r3, #4
 8007af6:	9303      	str	r3, [sp, #12]
 8007af8:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = GPIO_PIN_2;
 8007afa:	2304      	movs	r3, #4
 8007afc:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8007afe:	2302      	movs	r3, #2
 8007b00:	9305      	str	r3, [sp, #20]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8007b02:	2303      	movs	r3, #3
 8007b04:	9307      	str	r3, [sp, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007b06:	f7fc fe17 	bl	8004738 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_3;
 8007b0a:	2308      	movs	r3, #8
 8007b0c:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007b0e:	2300      	movs	r3, #0
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007b10:	a904      	add	r1, sp, #16
 8007b12:	4805      	ldr	r0, [pc, #20]	; (8007b28 <HAL_UART_MspInit+0xf4>)
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007b14:	9305      	str	r3, [sp, #20]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007b16:	9306      	str	r3, [sp, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8007b18:	f7fc fe0e 	bl	8004738 <HAL_GPIO_Init>
}
 8007b1c:	e7d3      	b.n	8007ac6 <HAL_UART_MspInit+0x92>
 8007b1e:	bf00      	nop
 8007b20:	40013800 	.word	0x40013800
 8007b24:	40021000 	.word	0x40021000
 8007b28:	40010800 	.word	0x40010800
 8007b2c:	20000518 	.word	0x20000518
 8007b30:	40020058 	.word	0x40020058
 8007b34:	40004400 	.word	0x40004400

08007b38 <NMI_Handler>:
 8007b38:	4770      	bx	lr

08007b3a <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8007b3a:	e7fe      	b.n	8007b3a <HardFault_Handler>

08007b3c <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8007b3c:	e7fe      	b.n	8007b3c <MemManage_Handler>

08007b3e <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8007b3e:	e7fe      	b.n	8007b3e <BusFault_Handler>

08007b40 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8007b40:	e7fe      	b.n	8007b40 <UsageFault_Handler>

08007b42 <SVC_Handler>:
 8007b42:	4770      	bx	lr

08007b44 <DebugMon_Handler>:
 8007b44:	4770      	bx	lr

08007b46 <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 8007b46:	4770      	bx	lr

08007b48 <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 8007b48:	f7fc bba2 	b.w	8004290 <HAL_IncTick>

08007b4c <DMA1_Channel5_IRQHandler>:
void DMA1_Channel5_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */

  /* USER CODE END DMA1_Channel5_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_rx);
 8007b4c:	4801      	ldr	r0, [pc, #4]	; (8007b54 <DMA1_Channel5_IRQHandler+0x8>)
 8007b4e:	f7fc bd17 	b.w	8004580 <HAL_DMA_IRQHandler>
 8007b52:	bf00      	nop
 8007b54:	20000518 	.word	0x20000518

08007b58 <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8007b58:	4801      	ldr	r0, [pc, #4]	; (8007b60 <USART1_IRQHandler+0x8>)
 8007b5a:	f7fe b915 	b.w	8005d88 <HAL_UART_IRQHandler>
 8007b5e:	bf00      	nop
 8007b60:	2000055c 	.word	0x2000055c

08007b64 <USART2_IRQHandler>:
void USART2_IRQHandler(void)
{
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 8007b64:	4801      	ldr	r0, [pc, #4]	; (8007b6c <USART2_IRQHandler+0x8>)
 8007b66:	f7fe b90f 	b.w	8005d88 <HAL_UART_IRQHandler>
 8007b6a:	bf00      	nop
 8007b6c:	20000708 	.word	0x20000708

08007b70 <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8007b70:	4801      	ldr	r0, [pc, #4]	; (8007b78 <TIM6_IRQHandler+0x8>)
 8007b72:	f7fd bd84 	b.w	800567e <HAL_TIM_IRQHandler>
 8007b76:	bf00      	nop
 8007b78:	200006c8 	.word	0x200006c8

08007b7c <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 8007b7c:	4b0e      	ldr	r3, [pc, #56]	; (8007bb8 <SystemInit+0x3c>)
 8007b7e:	681a      	ldr	r2, [r3, #0]
 8007b80:	f042 0201 	orr.w	r2, r2, #1
 8007b84:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8007b86:	6859      	ldr	r1, [r3, #4]
 8007b88:	4a0c      	ldr	r2, [pc, #48]	; (8007bbc <SystemInit+0x40>)
 8007b8a:	400a      	ands	r2, r1
 8007b8c:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 8007b8e:	681a      	ldr	r2, [r3, #0]
 8007b90:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8007b94:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8007b98:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8007b9a:	681a      	ldr	r2, [r3, #0]
 8007b9c:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8007ba0:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 8007ba2:	685a      	ldr	r2, [r3, #4]
 8007ba4:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8007ba8:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 8007baa:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 8007bae:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 8007bb0:	4a03      	ldr	r2, [pc, #12]	; (8007bc0 <SystemInit+0x44>)
 8007bb2:	4b04      	ldr	r3, [pc, #16]	; (8007bc4 <SystemInit+0x48>)
 8007bb4:	609a      	str	r2, [r3, #8]
 8007bb6:	4770      	bx	lr
 8007bb8:	40021000 	.word	0x40021000
 8007bbc:	f8ff0000 	.word	0xf8ff0000
 8007bc0:	08004000 	.word	0x08004000
 8007bc4:	e000ed00 	.word	0xe000ed00

08007bc8 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8007bc8:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8007bca:	e003      	b.n	8007bd4 <LoopCopyDataInit>

08007bcc <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8007bcc:	4b0b      	ldr	r3, [pc, #44]	; (8007bfc <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 8007bce:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 8007bd0:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 8007bd2:	3104      	adds	r1, #4

08007bd4 <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 8007bd4:	480a      	ldr	r0, [pc, #40]	; (8007c00 <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 8007bd6:	4b0b      	ldr	r3, [pc, #44]	; (8007c04 <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8007bd8:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8007bda:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8007bdc:	d3f6      	bcc.n	8007bcc <CopyDataInit>
  ldr r2, =_sbss
 8007bde:	4a0a      	ldr	r2, [pc, #40]	; (8007c08 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 8007be0:	e002      	b.n	8007be8 <LoopFillZerobss>

08007be2 <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 8007be2:	2300      	movs	r3, #0
  str r3, [r2], #4
 8007be4:	f842 3b04 	str.w	r3, [r2], #4

08007be8 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8007be8:	4b08      	ldr	r3, [pc, #32]	; (8007c0c <LoopFillZerobss+0x24>)
  cmp r2, r3
 8007bea:	429a      	cmp	r2, r3
  bcc FillZerobss
 8007bec:	d3f9      	bcc.n	8007be2 <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 8007bee:	f7ff ffc5 	bl	8007b7c <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 8007bf2:	f000 f80f 	bl	8007c14 <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 8007bf6:	f7ff fbe1 	bl	80073bc <main>
  bx lr
 8007bfa:	4770      	bx	lr
  ldr r3, =_sidata
 8007bfc:	08008f78 	.word	0x08008f78
  ldr r0, =_sdata
 8007c00:	20000000 	.word	0x20000000
  ldr r3, =_edata
 8007c04:	20000078 	.word	0x20000078
  ldr r2, =_sbss
 8007c08:	20000078 	.word	0x20000078
  ldr r3, = _ebss
 8007c0c:	20000864 	.word	0x20000864

08007c10 <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 8007c10:	e7fe      	b.n	8007c10 <ADC1_2_IRQHandler>
	...

08007c14 <__libc_init_array>:
 8007c14:	b570      	push	{r4, r5, r6, lr}
 8007c16:	2500      	movs	r5, #0
 8007c18:	4e0c      	ldr	r6, [pc, #48]	; (8007c4c <__libc_init_array+0x38>)
 8007c1a:	4c0d      	ldr	r4, [pc, #52]	; (8007c50 <__libc_init_array+0x3c>)
 8007c1c:	1ba4      	subs	r4, r4, r6
 8007c1e:	10a4      	asrs	r4, r4, #2
 8007c20:	42a5      	cmp	r5, r4
 8007c22:	d109      	bne.n	8007c38 <__libc_init_array+0x24>
 8007c24:	f001 f88a 	bl	8008d3c <_init>
 8007c28:	2500      	movs	r5, #0
 8007c2a:	4e0a      	ldr	r6, [pc, #40]	; (8007c54 <__libc_init_array+0x40>)
 8007c2c:	4c0a      	ldr	r4, [pc, #40]	; (8007c58 <__libc_init_array+0x44>)
 8007c2e:	1ba4      	subs	r4, r4, r6
 8007c30:	10a4      	asrs	r4, r4, #2
 8007c32:	42a5      	cmp	r5, r4
 8007c34:	d105      	bne.n	8007c42 <__libc_init_array+0x2e>
 8007c36:	bd70      	pop	{r4, r5, r6, pc}
 8007c38:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8007c3c:	4798      	blx	r3
 8007c3e:	3501      	adds	r5, #1
 8007c40:	e7ee      	b.n	8007c20 <__libc_init_array+0xc>
 8007c42:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8007c46:	4798      	blx	r3
 8007c48:	3501      	adds	r5, #1
 8007c4a:	e7f2      	b.n	8007c32 <__libc_init_array+0x1e>
 8007c4c:	08008f70 	.word	0x08008f70
 8007c50:	08008f70 	.word	0x08008f70
 8007c54:	08008f70 	.word	0x08008f70
 8007c58:	08008f74 	.word	0x08008f74

08007c5c <memcpy>:
 8007c5c:	b510      	push	{r4, lr}
 8007c5e:	1e43      	subs	r3, r0, #1
 8007c60:	440a      	add	r2, r1
 8007c62:	4291      	cmp	r1, r2
 8007c64:	d100      	bne.n	8007c68 <memcpy+0xc>
 8007c66:	bd10      	pop	{r4, pc}
 8007c68:	f811 4b01 	ldrb.w	r4, [r1], #1
 8007c6c:	f803 4f01 	strb.w	r4, [r3, #1]!
 8007c70:	e7f7      	b.n	8007c62 <memcpy+0x6>

08007c72 <memset>:
 8007c72:	4603      	mov	r3, r0
 8007c74:	4402      	add	r2, r0
 8007c76:	4293      	cmp	r3, r2
 8007c78:	d100      	bne.n	8007c7c <memset+0xa>
 8007c7a:	4770      	bx	lr
 8007c7c:	f803 1b01 	strb.w	r1, [r3], #1
 8007c80:	e7f9      	b.n	8007c76 <memset+0x4>
	...

08007c84 <iprintf>:
 8007c84:	b40f      	push	{r0, r1, r2, r3}
 8007c86:	4b0a      	ldr	r3, [pc, #40]	; (8007cb0 <iprintf+0x2c>)
 8007c88:	b513      	push	{r0, r1, r4, lr}
 8007c8a:	681c      	ldr	r4, [r3, #0]
 8007c8c:	b124      	cbz	r4, 8007c98 <iprintf+0x14>
 8007c8e:	69a3      	ldr	r3, [r4, #24]
 8007c90:	b913      	cbnz	r3, 8007c98 <iprintf+0x14>
 8007c92:	4620      	mov	r0, r4
 8007c94:	f000 fada 	bl	800824c <__sinit>
 8007c98:	ab05      	add	r3, sp, #20
 8007c9a:	9a04      	ldr	r2, [sp, #16]
 8007c9c:	68a1      	ldr	r1, [r4, #8]
 8007c9e:	4620      	mov	r0, r4
 8007ca0:	9301      	str	r3, [sp, #4]
 8007ca2:	f000 fc9b 	bl	80085dc <_vfiprintf_r>
 8007ca6:	b002      	add	sp, #8
 8007ca8:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8007cac:	b004      	add	sp, #16
 8007cae:	4770      	bx	lr
 8007cb0:	20000014 	.word	0x20000014

08007cb4 <_puts_r>:
 8007cb4:	b570      	push	{r4, r5, r6, lr}
 8007cb6:	460e      	mov	r6, r1
 8007cb8:	4605      	mov	r5, r0
 8007cba:	b118      	cbz	r0, 8007cc4 <_puts_r+0x10>
 8007cbc:	6983      	ldr	r3, [r0, #24]
 8007cbe:	b90b      	cbnz	r3, 8007cc4 <_puts_r+0x10>
 8007cc0:	f000 fac4 	bl	800824c <__sinit>
 8007cc4:	69ab      	ldr	r3, [r5, #24]
 8007cc6:	68ac      	ldr	r4, [r5, #8]
 8007cc8:	b913      	cbnz	r3, 8007cd0 <_puts_r+0x1c>
 8007cca:	4628      	mov	r0, r5
 8007ccc:	f000 fabe 	bl	800824c <__sinit>
 8007cd0:	4b23      	ldr	r3, [pc, #140]	; (8007d60 <_puts_r+0xac>)
 8007cd2:	429c      	cmp	r4, r3
 8007cd4:	d117      	bne.n	8007d06 <_puts_r+0x52>
 8007cd6:	686c      	ldr	r4, [r5, #4]
 8007cd8:	89a3      	ldrh	r3, [r4, #12]
 8007cda:	071b      	lsls	r3, r3, #28
 8007cdc:	d51d      	bpl.n	8007d1a <_puts_r+0x66>
 8007cde:	6923      	ldr	r3, [r4, #16]
 8007ce0:	b1db      	cbz	r3, 8007d1a <_puts_r+0x66>
 8007ce2:	3e01      	subs	r6, #1
 8007ce4:	68a3      	ldr	r3, [r4, #8]
 8007ce6:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8007cea:	3b01      	subs	r3, #1
 8007cec:	60a3      	str	r3, [r4, #8]
 8007cee:	b9e9      	cbnz	r1, 8007d2c <_puts_r+0x78>
 8007cf0:	2b00      	cmp	r3, #0
 8007cf2:	da2e      	bge.n	8007d52 <_puts_r+0x9e>
 8007cf4:	4622      	mov	r2, r4
 8007cf6:	210a      	movs	r1, #10
 8007cf8:	4628      	mov	r0, r5
 8007cfa:	f000 f8f5 	bl	8007ee8 <__swbuf_r>
 8007cfe:	3001      	adds	r0, #1
 8007d00:	d011      	beq.n	8007d26 <_puts_r+0x72>
 8007d02:	200a      	movs	r0, #10
 8007d04:	bd70      	pop	{r4, r5, r6, pc}
 8007d06:	4b17      	ldr	r3, [pc, #92]	; (8007d64 <_puts_r+0xb0>)
 8007d08:	429c      	cmp	r4, r3
 8007d0a:	d101      	bne.n	8007d10 <_puts_r+0x5c>
 8007d0c:	68ac      	ldr	r4, [r5, #8]
 8007d0e:	e7e3      	b.n	8007cd8 <_puts_r+0x24>
 8007d10:	4b15      	ldr	r3, [pc, #84]	; (8007d68 <_puts_r+0xb4>)
 8007d12:	429c      	cmp	r4, r3
 8007d14:	bf08      	it	eq
 8007d16:	68ec      	ldreq	r4, [r5, #12]
 8007d18:	e7de      	b.n	8007cd8 <_puts_r+0x24>
 8007d1a:	4621      	mov	r1, r4
 8007d1c:	4628      	mov	r0, r5
 8007d1e:	f000 f935 	bl	8007f8c <__swsetup_r>
 8007d22:	2800      	cmp	r0, #0
 8007d24:	d0dd      	beq.n	8007ce2 <_puts_r+0x2e>
 8007d26:	f04f 30ff 	mov.w	r0, #4294967295
 8007d2a:	bd70      	pop	{r4, r5, r6, pc}
 8007d2c:	2b00      	cmp	r3, #0
 8007d2e:	da04      	bge.n	8007d3a <_puts_r+0x86>
 8007d30:	69a2      	ldr	r2, [r4, #24]
 8007d32:	4293      	cmp	r3, r2
 8007d34:	db06      	blt.n	8007d44 <_puts_r+0x90>
 8007d36:	290a      	cmp	r1, #10
 8007d38:	d004      	beq.n	8007d44 <_puts_r+0x90>
 8007d3a:	6823      	ldr	r3, [r4, #0]
 8007d3c:	1c5a      	adds	r2, r3, #1
 8007d3e:	6022      	str	r2, [r4, #0]
 8007d40:	7019      	strb	r1, [r3, #0]
 8007d42:	e7cf      	b.n	8007ce4 <_puts_r+0x30>
 8007d44:	4622      	mov	r2, r4
 8007d46:	4628      	mov	r0, r5
 8007d48:	f000 f8ce 	bl	8007ee8 <__swbuf_r>
 8007d4c:	3001      	adds	r0, #1
 8007d4e:	d1c9      	bne.n	8007ce4 <_puts_r+0x30>
 8007d50:	e7e9      	b.n	8007d26 <_puts_r+0x72>
 8007d52:	200a      	movs	r0, #10
 8007d54:	6823      	ldr	r3, [r4, #0]
 8007d56:	1c5a      	adds	r2, r3, #1
 8007d58:	6022      	str	r2, [r4, #0]
 8007d5a:	7018      	strb	r0, [r3, #0]
 8007d5c:	bd70      	pop	{r4, r5, r6, pc}
 8007d5e:	bf00      	nop
 8007d60:	08008efc 	.word	0x08008efc
 8007d64:	08008f1c 	.word	0x08008f1c
 8007d68:	08008edc 	.word	0x08008edc

08007d6c <puts>:
 8007d6c:	4b02      	ldr	r3, [pc, #8]	; (8007d78 <puts+0xc>)
 8007d6e:	4601      	mov	r1, r0
 8007d70:	6818      	ldr	r0, [r3, #0]
 8007d72:	f7ff bf9f 	b.w	8007cb4 <_puts_r>
 8007d76:	bf00      	nop
 8007d78:	20000014 	.word	0x20000014

08007d7c <setbuf>:
 8007d7c:	2900      	cmp	r1, #0
 8007d7e:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8007d82:	bf0c      	ite	eq
 8007d84:	2202      	moveq	r2, #2
 8007d86:	2200      	movne	r2, #0
 8007d88:	f000 b800 	b.w	8007d8c <setvbuf>

08007d8c <setvbuf>:
 8007d8c:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 8007d90:	461d      	mov	r5, r3
 8007d92:	4b51      	ldr	r3, [pc, #324]	; (8007ed8 <setvbuf+0x14c>)
 8007d94:	4604      	mov	r4, r0
 8007d96:	681e      	ldr	r6, [r3, #0]
 8007d98:	460f      	mov	r7, r1
 8007d9a:	4690      	mov	r8, r2
 8007d9c:	b126      	cbz	r6, 8007da8 <setvbuf+0x1c>
 8007d9e:	69b3      	ldr	r3, [r6, #24]
 8007da0:	b913      	cbnz	r3, 8007da8 <setvbuf+0x1c>
 8007da2:	4630      	mov	r0, r6
 8007da4:	f000 fa52 	bl	800824c <__sinit>
 8007da8:	4b4c      	ldr	r3, [pc, #304]	; (8007edc <setvbuf+0x150>)
 8007daa:	429c      	cmp	r4, r3
 8007dac:	d152      	bne.n	8007e54 <setvbuf+0xc8>
 8007dae:	6874      	ldr	r4, [r6, #4]
 8007db0:	f1b8 0f02 	cmp.w	r8, #2
 8007db4:	d006      	beq.n	8007dc4 <setvbuf+0x38>
 8007db6:	f1b8 0f01 	cmp.w	r8, #1
 8007dba:	f200 8089 	bhi.w	8007ed0 <setvbuf+0x144>
 8007dbe:	2d00      	cmp	r5, #0
 8007dc0:	f2c0 8086 	blt.w	8007ed0 <setvbuf+0x144>
 8007dc4:	4621      	mov	r1, r4
 8007dc6:	4630      	mov	r0, r6
 8007dc8:	f000 f9d6 	bl	8008178 <_fflush_r>
 8007dcc:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8007dce:	b141      	cbz	r1, 8007de2 <setvbuf+0x56>
 8007dd0:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8007dd4:	4299      	cmp	r1, r3
 8007dd6:	d002      	beq.n	8007dde <setvbuf+0x52>
 8007dd8:	4630      	mov	r0, r6
 8007dda:	f000 fb2d 	bl	8008438 <_free_r>
 8007dde:	2300      	movs	r3, #0
 8007de0:	6363      	str	r3, [r4, #52]	; 0x34
 8007de2:	2300      	movs	r3, #0
 8007de4:	61a3      	str	r3, [r4, #24]
 8007de6:	6063      	str	r3, [r4, #4]
 8007de8:	89a3      	ldrh	r3, [r4, #12]
 8007dea:	061b      	lsls	r3, r3, #24
 8007dec:	d503      	bpl.n	8007df6 <setvbuf+0x6a>
 8007dee:	6921      	ldr	r1, [r4, #16]
 8007df0:	4630      	mov	r0, r6
 8007df2:	f000 fb21 	bl	8008438 <_free_r>
 8007df6:	89a3      	ldrh	r3, [r4, #12]
 8007df8:	f1b8 0f02 	cmp.w	r8, #2
 8007dfc:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 8007e00:	f023 0303 	bic.w	r3, r3, #3
 8007e04:	81a3      	strh	r3, [r4, #12]
 8007e06:	d05d      	beq.n	8007ec4 <setvbuf+0x138>
 8007e08:	ab01      	add	r3, sp, #4
 8007e0a:	466a      	mov	r2, sp
 8007e0c:	4621      	mov	r1, r4
 8007e0e:	4630      	mov	r0, r6
 8007e10:	f000 faa6 	bl	8008360 <__swhatbuf_r>
 8007e14:	89a3      	ldrh	r3, [r4, #12]
 8007e16:	4318      	orrs	r0, r3
 8007e18:	81a0      	strh	r0, [r4, #12]
 8007e1a:	bb2d      	cbnz	r5, 8007e68 <setvbuf+0xdc>
 8007e1c:	9d00      	ldr	r5, [sp, #0]
 8007e1e:	4628      	mov	r0, r5
 8007e20:	f000 fb02 	bl	8008428 <malloc>
 8007e24:	4607      	mov	r7, r0
 8007e26:	2800      	cmp	r0, #0
 8007e28:	d14e      	bne.n	8007ec8 <setvbuf+0x13c>
 8007e2a:	f8dd 9000 	ldr.w	r9, [sp]
 8007e2e:	45a9      	cmp	r9, r5
 8007e30:	d13c      	bne.n	8007eac <setvbuf+0x120>
 8007e32:	f04f 30ff 	mov.w	r0, #4294967295
 8007e36:	89a3      	ldrh	r3, [r4, #12]
 8007e38:	f043 0302 	orr.w	r3, r3, #2
 8007e3c:	81a3      	strh	r3, [r4, #12]
 8007e3e:	2300      	movs	r3, #0
 8007e40:	60a3      	str	r3, [r4, #8]
 8007e42:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8007e46:	6023      	str	r3, [r4, #0]
 8007e48:	6123      	str	r3, [r4, #16]
 8007e4a:	2301      	movs	r3, #1
 8007e4c:	6163      	str	r3, [r4, #20]
 8007e4e:	b003      	add	sp, #12
 8007e50:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8007e54:	4b22      	ldr	r3, [pc, #136]	; (8007ee0 <setvbuf+0x154>)
 8007e56:	429c      	cmp	r4, r3
 8007e58:	d101      	bne.n	8007e5e <setvbuf+0xd2>
 8007e5a:	68b4      	ldr	r4, [r6, #8]
 8007e5c:	e7a8      	b.n	8007db0 <setvbuf+0x24>
 8007e5e:	4b21      	ldr	r3, [pc, #132]	; (8007ee4 <setvbuf+0x158>)
 8007e60:	429c      	cmp	r4, r3
 8007e62:	bf08      	it	eq
 8007e64:	68f4      	ldreq	r4, [r6, #12]
 8007e66:	e7a3      	b.n	8007db0 <setvbuf+0x24>
 8007e68:	2f00      	cmp	r7, #0
 8007e6a:	d0d8      	beq.n	8007e1e <setvbuf+0x92>
 8007e6c:	69b3      	ldr	r3, [r6, #24]
 8007e6e:	b913      	cbnz	r3, 8007e76 <setvbuf+0xea>
 8007e70:	4630      	mov	r0, r6
 8007e72:	f000 f9eb 	bl	800824c <__sinit>
 8007e76:	f1b8 0f01 	cmp.w	r8, #1
 8007e7a:	bf08      	it	eq
 8007e7c:	89a3      	ldrheq	r3, [r4, #12]
 8007e7e:	6027      	str	r7, [r4, #0]
 8007e80:	bf04      	itt	eq
 8007e82:	f043 0301 	orreq.w	r3, r3, #1
 8007e86:	81a3      	strheq	r3, [r4, #12]
 8007e88:	89a3      	ldrh	r3, [r4, #12]
 8007e8a:	6127      	str	r7, [r4, #16]
 8007e8c:	f013 0008 	ands.w	r0, r3, #8
 8007e90:	6165      	str	r5, [r4, #20]
 8007e92:	d01b      	beq.n	8007ecc <setvbuf+0x140>
 8007e94:	f013 0001 	ands.w	r0, r3, #1
 8007e98:	f04f 0300 	mov.w	r3, #0
 8007e9c:	bf1f      	itttt	ne
 8007e9e:	426d      	negne	r5, r5
 8007ea0:	60a3      	strne	r3, [r4, #8]
 8007ea2:	61a5      	strne	r5, [r4, #24]
 8007ea4:	4618      	movne	r0, r3
 8007ea6:	bf08      	it	eq
 8007ea8:	60a5      	streq	r5, [r4, #8]
 8007eaa:	e7d0      	b.n	8007e4e <setvbuf+0xc2>
 8007eac:	4648      	mov	r0, r9
 8007eae:	f000 fabb 	bl	8008428 <malloc>
 8007eb2:	4607      	mov	r7, r0
 8007eb4:	2800      	cmp	r0, #0
 8007eb6:	d0bc      	beq.n	8007e32 <setvbuf+0xa6>
 8007eb8:	89a3      	ldrh	r3, [r4, #12]
 8007eba:	464d      	mov	r5, r9
 8007ebc:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8007ec0:	81a3      	strh	r3, [r4, #12]
 8007ec2:	e7d3      	b.n	8007e6c <setvbuf+0xe0>
 8007ec4:	2000      	movs	r0, #0
 8007ec6:	e7b6      	b.n	8007e36 <setvbuf+0xaa>
 8007ec8:	46a9      	mov	r9, r5
 8007eca:	e7f5      	b.n	8007eb8 <setvbuf+0x12c>
 8007ecc:	60a0      	str	r0, [r4, #8]
 8007ece:	e7be      	b.n	8007e4e <setvbuf+0xc2>
 8007ed0:	f04f 30ff 	mov.w	r0, #4294967295
 8007ed4:	e7bb      	b.n	8007e4e <setvbuf+0xc2>
 8007ed6:	bf00      	nop
 8007ed8:	20000014 	.word	0x20000014
 8007edc:	08008efc 	.word	0x08008efc
 8007ee0:	08008f1c 	.word	0x08008f1c
 8007ee4:	08008edc 	.word	0x08008edc

08007ee8 <__swbuf_r>:
 8007ee8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8007eea:	460e      	mov	r6, r1
 8007eec:	4614      	mov	r4, r2
 8007eee:	4605      	mov	r5, r0
 8007ef0:	b118      	cbz	r0, 8007efa <__swbuf_r+0x12>
 8007ef2:	6983      	ldr	r3, [r0, #24]
 8007ef4:	b90b      	cbnz	r3, 8007efa <__swbuf_r+0x12>
 8007ef6:	f000 f9a9 	bl	800824c <__sinit>
 8007efa:	4b21      	ldr	r3, [pc, #132]	; (8007f80 <__swbuf_r+0x98>)
 8007efc:	429c      	cmp	r4, r3
 8007efe:	d12a      	bne.n	8007f56 <__swbuf_r+0x6e>
 8007f00:	686c      	ldr	r4, [r5, #4]
 8007f02:	69a3      	ldr	r3, [r4, #24]
 8007f04:	60a3      	str	r3, [r4, #8]
 8007f06:	89a3      	ldrh	r3, [r4, #12]
 8007f08:	071a      	lsls	r2, r3, #28
 8007f0a:	d52e      	bpl.n	8007f6a <__swbuf_r+0x82>
 8007f0c:	6923      	ldr	r3, [r4, #16]
 8007f0e:	b363      	cbz	r3, 8007f6a <__swbuf_r+0x82>
 8007f10:	6923      	ldr	r3, [r4, #16]
 8007f12:	6820      	ldr	r0, [r4, #0]
 8007f14:	b2f6      	uxtb	r6, r6
 8007f16:	1ac0      	subs	r0, r0, r3
 8007f18:	6963      	ldr	r3, [r4, #20]
 8007f1a:	4637      	mov	r7, r6
 8007f1c:	4298      	cmp	r0, r3
 8007f1e:	db04      	blt.n	8007f2a <__swbuf_r+0x42>
 8007f20:	4621      	mov	r1, r4
 8007f22:	4628      	mov	r0, r5
 8007f24:	f000 f928 	bl	8008178 <_fflush_r>
 8007f28:	bb28      	cbnz	r0, 8007f76 <__swbuf_r+0x8e>
 8007f2a:	68a3      	ldr	r3, [r4, #8]
 8007f2c:	3001      	adds	r0, #1
 8007f2e:	3b01      	subs	r3, #1
 8007f30:	60a3      	str	r3, [r4, #8]
 8007f32:	6823      	ldr	r3, [r4, #0]
 8007f34:	1c5a      	adds	r2, r3, #1
 8007f36:	6022      	str	r2, [r4, #0]
 8007f38:	701e      	strb	r6, [r3, #0]
 8007f3a:	6963      	ldr	r3, [r4, #20]
 8007f3c:	4298      	cmp	r0, r3
 8007f3e:	d004      	beq.n	8007f4a <__swbuf_r+0x62>
 8007f40:	89a3      	ldrh	r3, [r4, #12]
 8007f42:	07db      	lsls	r3, r3, #31
 8007f44:	d519      	bpl.n	8007f7a <__swbuf_r+0x92>
 8007f46:	2e0a      	cmp	r6, #10
 8007f48:	d117      	bne.n	8007f7a <__swbuf_r+0x92>
 8007f4a:	4621      	mov	r1, r4
 8007f4c:	4628      	mov	r0, r5
 8007f4e:	f000 f913 	bl	8008178 <_fflush_r>
 8007f52:	b190      	cbz	r0, 8007f7a <__swbuf_r+0x92>
 8007f54:	e00f      	b.n	8007f76 <__swbuf_r+0x8e>
 8007f56:	4b0b      	ldr	r3, [pc, #44]	; (8007f84 <__swbuf_r+0x9c>)
 8007f58:	429c      	cmp	r4, r3
 8007f5a:	d101      	bne.n	8007f60 <__swbuf_r+0x78>
 8007f5c:	68ac      	ldr	r4, [r5, #8]
 8007f5e:	e7d0      	b.n	8007f02 <__swbuf_r+0x1a>
 8007f60:	4b09      	ldr	r3, [pc, #36]	; (8007f88 <__swbuf_r+0xa0>)
 8007f62:	429c      	cmp	r4, r3
 8007f64:	bf08      	it	eq
 8007f66:	68ec      	ldreq	r4, [r5, #12]
 8007f68:	e7cb      	b.n	8007f02 <__swbuf_r+0x1a>
 8007f6a:	4621      	mov	r1, r4
 8007f6c:	4628      	mov	r0, r5
 8007f6e:	f000 f80d 	bl	8007f8c <__swsetup_r>
 8007f72:	2800      	cmp	r0, #0
 8007f74:	d0cc      	beq.n	8007f10 <__swbuf_r+0x28>
 8007f76:	f04f 37ff 	mov.w	r7, #4294967295
 8007f7a:	4638      	mov	r0, r7
 8007f7c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8007f7e:	bf00      	nop
 8007f80:	08008efc 	.word	0x08008efc
 8007f84:	08008f1c 	.word	0x08008f1c
 8007f88:	08008edc 	.word	0x08008edc

08007f8c <__swsetup_r>:
 8007f8c:	4b32      	ldr	r3, [pc, #200]	; (8008058 <__swsetup_r+0xcc>)
 8007f8e:	b570      	push	{r4, r5, r6, lr}
 8007f90:	681d      	ldr	r5, [r3, #0]
 8007f92:	4606      	mov	r6, r0
 8007f94:	460c      	mov	r4, r1
 8007f96:	b125      	cbz	r5, 8007fa2 <__swsetup_r+0x16>
 8007f98:	69ab      	ldr	r3, [r5, #24]
 8007f9a:	b913      	cbnz	r3, 8007fa2 <__swsetup_r+0x16>
 8007f9c:	4628      	mov	r0, r5
 8007f9e:	f000 f955 	bl	800824c <__sinit>
 8007fa2:	4b2e      	ldr	r3, [pc, #184]	; (800805c <__swsetup_r+0xd0>)
 8007fa4:	429c      	cmp	r4, r3
 8007fa6:	d10f      	bne.n	8007fc8 <__swsetup_r+0x3c>
 8007fa8:	686c      	ldr	r4, [r5, #4]
 8007faa:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8007fae:	b29a      	uxth	r2, r3
 8007fb0:	0715      	lsls	r5, r2, #28
 8007fb2:	d42c      	bmi.n	800800e <__swsetup_r+0x82>
 8007fb4:	06d0      	lsls	r0, r2, #27
 8007fb6:	d411      	bmi.n	8007fdc <__swsetup_r+0x50>
 8007fb8:	2209      	movs	r2, #9
 8007fba:	6032      	str	r2, [r6, #0]
 8007fbc:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8007fc0:	81a3      	strh	r3, [r4, #12]
 8007fc2:	f04f 30ff 	mov.w	r0, #4294967295
 8007fc6:	bd70      	pop	{r4, r5, r6, pc}
 8007fc8:	4b25      	ldr	r3, [pc, #148]	; (8008060 <__swsetup_r+0xd4>)
 8007fca:	429c      	cmp	r4, r3
 8007fcc:	d101      	bne.n	8007fd2 <__swsetup_r+0x46>
 8007fce:	68ac      	ldr	r4, [r5, #8]
 8007fd0:	e7eb      	b.n	8007faa <__swsetup_r+0x1e>
 8007fd2:	4b24      	ldr	r3, [pc, #144]	; (8008064 <__swsetup_r+0xd8>)
 8007fd4:	429c      	cmp	r4, r3
 8007fd6:	bf08      	it	eq
 8007fd8:	68ec      	ldreq	r4, [r5, #12]
 8007fda:	e7e6      	b.n	8007faa <__swsetup_r+0x1e>
 8007fdc:	0751      	lsls	r1, r2, #29
 8007fde:	d512      	bpl.n	8008006 <__swsetup_r+0x7a>
 8007fe0:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8007fe2:	b141      	cbz	r1, 8007ff6 <__swsetup_r+0x6a>
 8007fe4:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8007fe8:	4299      	cmp	r1, r3
 8007fea:	d002      	beq.n	8007ff2 <__swsetup_r+0x66>
 8007fec:	4630      	mov	r0, r6
 8007fee:	f000 fa23 	bl	8008438 <_free_r>
 8007ff2:	2300      	movs	r3, #0
 8007ff4:	6363      	str	r3, [r4, #52]	; 0x34
 8007ff6:	89a3      	ldrh	r3, [r4, #12]
 8007ff8:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 8007ffc:	81a3      	strh	r3, [r4, #12]
 8007ffe:	2300      	movs	r3, #0
 8008000:	6063      	str	r3, [r4, #4]
 8008002:	6923      	ldr	r3, [r4, #16]
 8008004:	6023      	str	r3, [r4, #0]
 8008006:	89a3      	ldrh	r3, [r4, #12]
 8008008:	f043 0308 	orr.w	r3, r3, #8
 800800c:	81a3      	strh	r3, [r4, #12]
 800800e:	6923      	ldr	r3, [r4, #16]
 8008010:	b94b      	cbnz	r3, 8008026 <__swsetup_r+0x9a>
 8008012:	89a3      	ldrh	r3, [r4, #12]
 8008014:	f403 7320 	and.w	r3, r3, #640	; 0x280
 8008018:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 800801c:	d003      	beq.n	8008026 <__swsetup_r+0x9a>
 800801e:	4621      	mov	r1, r4
 8008020:	4630      	mov	r0, r6
 8008022:	f000 f9c1 	bl	80083a8 <__smakebuf_r>
 8008026:	89a2      	ldrh	r2, [r4, #12]
 8008028:	f012 0301 	ands.w	r3, r2, #1
 800802c:	d00c      	beq.n	8008048 <__swsetup_r+0xbc>
 800802e:	2300      	movs	r3, #0
 8008030:	60a3      	str	r3, [r4, #8]
 8008032:	6963      	ldr	r3, [r4, #20]
 8008034:	425b      	negs	r3, r3
 8008036:	61a3      	str	r3, [r4, #24]
 8008038:	6923      	ldr	r3, [r4, #16]
 800803a:	b953      	cbnz	r3, 8008052 <__swsetup_r+0xc6>
 800803c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8008040:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 8008044:	d1ba      	bne.n	8007fbc <__swsetup_r+0x30>
 8008046:	bd70      	pop	{r4, r5, r6, pc}
 8008048:	0792      	lsls	r2, r2, #30
 800804a:	bf58      	it	pl
 800804c:	6963      	ldrpl	r3, [r4, #20]
 800804e:	60a3      	str	r3, [r4, #8]
 8008050:	e7f2      	b.n	8008038 <__swsetup_r+0xac>
 8008052:	2000      	movs	r0, #0
 8008054:	e7f7      	b.n	8008046 <__swsetup_r+0xba>
 8008056:	bf00      	nop
 8008058:	20000014 	.word	0x20000014
 800805c:	08008efc 	.word	0x08008efc
 8008060:	08008f1c 	.word	0x08008f1c
 8008064:	08008edc 	.word	0x08008edc

08008068 <__sflush_r>:
 8008068:	898a      	ldrh	r2, [r1, #12]
 800806a:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800806e:	4605      	mov	r5, r0
 8008070:	0710      	lsls	r0, r2, #28
 8008072:	460c      	mov	r4, r1
 8008074:	d45a      	bmi.n	800812c <__sflush_r+0xc4>
 8008076:	684b      	ldr	r3, [r1, #4]
 8008078:	2b00      	cmp	r3, #0
 800807a:	dc05      	bgt.n	8008088 <__sflush_r+0x20>
 800807c:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 800807e:	2b00      	cmp	r3, #0
 8008080:	dc02      	bgt.n	8008088 <__sflush_r+0x20>
 8008082:	2000      	movs	r0, #0
 8008084:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8008088:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800808a:	2e00      	cmp	r6, #0
 800808c:	d0f9      	beq.n	8008082 <__sflush_r+0x1a>
 800808e:	2300      	movs	r3, #0
 8008090:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 8008094:	682f      	ldr	r7, [r5, #0]
 8008096:	602b      	str	r3, [r5, #0]
 8008098:	d033      	beq.n	8008102 <__sflush_r+0x9a>
 800809a:	6d60      	ldr	r0, [r4, #84]	; 0x54
 800809c:	89a3      	ldrh	r3, [r4, #12]
 800809e:	075a      	lsls	r2, r3, #29
 80080a0:	d505      	bpl.n	80080ae <__sflush_r+0x46>
 80080a2:	6863      	ldr	r3, [r4, #4]
 80080a4:	1ac0      	subs	r0, r0, r3
 80080a6:	6b63      	ldr	r3, [r4, #52]	; 0x34
 80080a8:	b10b      	cbz	r3, 80080ae <__sflush_r+0x46>
 80080aa:	6c23      	ldr	r3, [r4, #64]	; 0x40
 80080ac:	1ac0      	subs	r0, r0, r3
 80080ae:	2300      	movs	r3, #0
 80080b0:	4602      	mov	r2, r0
 80080b2:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 80080b4:	6a21      	ldr	r1, [r4, #32]
 80080b6:	4628      	mov	r0, r5
 80080b8:	47b0      	blx	r6
 80080ba:	1c43      	adds	r3, r0, #1
 80080bc:	89a3      	ldrh	r3, [r4, #12]
 80080be:	d106      	bne.n	80080ce <__sflush_r+0x66>
 80080c0:	6829      	ldr	r1, [r5, #0]
 80080c2:	291d      	cmp	r1, #29
 80080c4:	d84b      	bhi.n	800815e <__sflush_r+0xf6>
 80080c6:	4a2b      	ldr	r2, [pc, #172]	; (8008174 <__sflush_r+0x10c>)
 80080c8:	40ca      	lsrs	r2, r1
 80080ca:	07d6      	lsls	r6, r2, #31
 80080cc:	d547      	bpl.n	800815e <__sflush_r+0xf6>
 80080ce:	2200      	movs	r2, #0
 80080d0:	6062      	str	r2, [r4, #4]
 80080d2:	6922      	ldr	r2, [r4, #16]
 80080d4:	04d9      	lsls	r1, r3, #19
 80080d6:	6022      	str	r2, [r4, #0]
 80080d8:	d504      	bpl.n	80080e4 <__sflush_r+0x7c>
 80080da:	1c42      	adds	r2, r0, #1
 80080dc:	d101      	bne.n	80080e2 <__sflush_r+0x7a>
 80080de:	682b      	ldr	r3, [r5, #0]
 80080e0:	b903      	cbnz	r3, 80080e4 <__sflush_r+0x7c>
 80080e2:	6560      	str	r0, [r4, #84]	; 0x54
 80080e4:	6b61      	ldr	r1, [r4, #52]	; 0x34
 80080e6:	602f      	str	r7, [r5, #0]
 80080e8:	2900      	cmp	r1, #0
 80080ea:	d0ca      	beq.n	8008082 <__sflush_r+0x1a>
 80080ec:	f104 0344 	add.w	r3, r4, #68	; 0x44
 80080f0:	4299      	cmp	r1, r3
 80080f2:	d002      	beq.n	80080fa <__sflush_r+0x92>
 80080f4:	4628      	mov	r0, r5
 80080f6:	f000 f99f 	bl	8008438 <_free_r>
 80080fa:	2000      	movs	r0, #0
 80080fc:	6360      	str	r0, [r4, #52]	; 0x34
 80080fe:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8008102:	6a21      	ldr	r1, [r4, #32]
 8008104:	2301      	movs	r3, #1
 8008106:	4628      	mov	r0, r5
 8008108:	47b0      	blx	r6
 800810a:	1c41      	adds	r1, r0, #1
 800810c:	d1c6      	bne.n	800809c <__sflush_r+0x34>
 800810e:	682b      	ldr	r3, [r5, #0]
 8008110:	2b00      	cmp	r3, #0
 8008112:	d0c3      	beq.n	800809c <__sflush_r+0x34>
 8008114:	2b1d      	cmp	r3, #29
 8008116:	d001      	beq.n	800811c <__sflush_r+0xb4>
 8008118:	2b16      	cmp	r3, #22
 800811a:	d101      	bne.n	8008120 <__sflush_r+0xb8>
 800811c:	602f      	str	r7, [r5, #0]
 800811e:	e7b0      	b.n	8008082 <__sflush_r+0x1a>
 8008120:	89a3      	ldrh	r3, [r4, #12]
 8008122:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8008126:	81a3      	strh	r3, [r4, #12]
 8008128:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800812c:	690f      	ldr	r7, [r1, #16]
 800812e:	2f00      	cmp	r7, #0
 8008130:	d0a7      	beq.n	8008082 <__sflush_r+0x1a>
 8008132:	0793      	lsls	r3, r2, #30
 8008134:	bf18      	it	ne
 8008136:	2300      	movne	r3, #0
 8008138:	680e      	ldr	r6, [r1, #0]
 800813a:	bf08      	it	eq
 800813c:	694b      	ldreq	r3, [r1, #20]
 800813e:	eba6 0807 	sub.w	r8, r6, r7
 8008142:	600f      	str	r7, [r1, #0]
 8008144:	608b      	str	r3, [r1, #8]
 8008146:	f1b8 0f00 	cmp.w	r8, #0
 800814a:	dd9a      	ble.n	8008082 <__sflush_r+0x1a>
 800814c:	4643      	mov	r3, r8
 800814e:	463a      	mov	r2, r7
 8008150:	6a21      	ldr	r1, [r4, #32]
 8008152:	4628      	mov	r0, r5
 8008154:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 8008156:	47b0      	blx	r6
 8008158:	2800      	cmp	r0, #0
 800815a:	dc07      	bgt.n	800816c <__sflush_r+0x104>
 800815c:	89a3      	ldrh	r3, [r4, #12]
 800815e:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8008162:	81a3      	strh	r3, [r4, #12]
 8008164:	f04f 30ff 	mov.w	r0, #4294967295
 8008168:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800816c:	4407      	add	r7, r0
 800816e:	eba8 0800 	sub.w	r8, r8, r0
 8008172:	e7e8      	b.n	8008146 <__sflush_r+0xde>
 8008174:	20400001 	.word	0x20400001

08008178 <_fflush_r>:
 8008178:	b538      	push	{r3, r4, r5, lr}
 800817a:	690b      	ldr	r3, [r1, #16]
 800817c:	4605      	mov	r5, r0
 800817e:	460c      	mov	r4, r1
 8008180:	b1db      	cbz	r3, 80081ba <_fflush_r+0x42>
 8008182:	b118      	cbz	r0, 800818c <_fflush_r+0x14>
 8008184:	6983      	ldr	r3, [r0, #24]
 8008186:	b90b      	cbnz	r3, 800818c <_fflush_r+0x14>
 8008188:	f000 f860 	bl	800824c <__sinit>
 800818c:	4b0c      	ldr	r3, [pc, #48]	; (80081c0 <_fflush_r+0x48>)
 800818e:	429c      	cmp	r4, r3
 8008190:	d109      	bne.n	80081a6 <_fflush_r+0x2e>
 8008192:	686c      	ldr	r4, [r5, #4]
 8008194:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8008198:	b17b      	cbz	r3, 80081ba <_fflush_r+0x42>
 800819a:	4621      	mov	r1, r4
 800819c:	4628      	mov	r0, r5
 800819e:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 80081a2:	f7ff bf61 	b.w	8008068 <__sflush_r>
 80081a6:	4b07      	ldr	r3, [pc, #28]	; (80081c4 <_fflush_r+0x4c>)
 80081a8:	429c      	cmp	r4, r3
 80081aa:	d101      	bne.n	80081b0 <_fflush_r+0x38>
 80081ac:	68ac      	ldr	r4, [r5, #8]
 80081ae:	e7f1      	b.n	8008194 <_fflush_r+0x1c>
 80081b0:	4b05      	ldr	r3, [pc, #20]	; (80081c8 <_fflush_r+0x50>)
 80081b2:	429c      	cmp	r4, r3
 80081b4:	bf08      	it	eq
 80081b6:	68ec      	ldreq	r4, [r5, #12]
 80081b8:	e7ec      	b.n	8008194 <_fflush_r+0x1c>
 80081ba:	2000      	movs	r0, #0
 80081bc:	bd38      	pop	{r3, r4, r5, pc}
 80081be:	bf00      	nop
 80081c0:	08008efc 	.word	0x08008efc
 80081c4:	08008f1c 	.word	0x08008f1c
 80081c8:	08008edc 	.word	0x08008edc

080081cc <_cleanup_r>:
 80081cc:	4901      	ldr	r1, [pc, #4]	; (80081d4 <_cleanup_r+0x8>)
 80081ce:	f000 b8a9 	b.w	8008324 <_fwalk_reent>
 80081d2:	bf00      	nop
 80081d4:	08008179 	.word	0x08008179

080081d8 <std.isra.0>:
 80081d8:	2300      	movs	r3, #0
 80081da:	b510      	push	{r4, lr}
 80081dc:	4604      	mov	r4, r0
 80081de:	6003      	str	r3, [r0, #0]
 80081e0:	6043      	str	r3, [r0, #4]
 80081e2:	6083      	str	r3, [r0, #8]
 80081e4:	8181      	strh	r1, [r0, #12]
 80081e6:	6643      	str	r3, [r0, #100]	; 0x64
 80081e8:	81c2      	strh	r2, [r0, #14]
 80081ea:	6103      	str	r3, [r0, #16]
 80081ec:	6143      	str	r3, [r0, #20]
 80081ee:	6183      	str	r3, [r0, #24]
 80081f0:	4619      	mov	r1, r3
 80081f2:	2208      	movs	r2, #8
 80081f4:	305c      	adds	r0, #92	; 0x5c
 80081f6:	f7ff fd3c 	bl	8007c72 <memset>
 80081fa:	4b05      	ldr	r3, [pc, #20]	; (8008210 <std.isra.0+0x38>)
 80081fc:	6224      	str	r4, [r4, #32]
 80081fe:	6263      	str	r3, [r4, #36]	; 0x24
 8008200:	4b04      	ldr	r3, [pc, #16]	; (8008214 <std.isra.0+0x3c>)
 8008202:	62a3      	str	r3, [r4, #40]	; 0x28
 8008204:	4b04      	ldr	r3, [pc, #16]	; (8008218 <std.isra.0+0x40>)
 8008206:	62e3      	str	r3, [r4, #44]	; 0x2c
 8008208:	4b04      	ldr	r3, [pc, #16]	; (800821c <std.isra.0+0x44>)
 800820a:	6323      	str	r3, [r4, #48]	; 0x30
 800820c:	bd10      	pop	{r4, pc}
 800820e:	bf00      	nop
 8008210:	08008b59 	.word	0x08008b59
 8008214:	08008b7b 	.word	0x08008b7b
 8008218:	08008bb3 	.word	0x08008bb3
 800821c:	08008bd7 	.word	0x08008bd7

08008220 <__sfmoreglue>:
 8008220:	b570      	push	{r4, r5, r6, lr}
 8008222:	2568      	movs	r5, #104	; 0x68
 8008224:	1e4a      	subs	r2, r1, #1
 8008226:	4355      	muls	r5, r2
 8008228:	460e      	mov	r6, r1
 800822a:	f105 0174 	add.w	r1, r5, #116	; 0x74
 800822e:	f000 f94f 	bl	80084d0 <_malloc_r>
 8008232:	4604      	mov	r4, r0
 8008234:	b140      	cbz	r0, 8008248 <__sfmoreglue+0x28>
 8008236:	2100      	movs	r1, #0
 8008238:	e880 0042 	stmia.w	r0, {r1, r6}
 800823c:	300c      	adds	r0, #12
 800823e:	60a0      	str	r0, [r4, #8]
 8008240:	f105 0268 	add.w	r2, r5, #104	; 0x68
 8008244:	f7ff fd15 	bl	8007c72 <memset>
 8008248:	4620      	mov	r0, r4
 800824a:	bd70      	pop	{r4, r5, r6, pc}

0800824c <__sinit>:
 800824c:	6983      	ldr	r3, [r0, #24]
 800824e:	b510      	push	{r4, lr}
 8008250:	4604      	mov	r4, r0
 8008252:	bb33      	cbnz	r3, 80082a2 <__sinit+0x56>
 8008254:	6483      	str	r3, [r0, #72]	; 0x48
 8008256:	64c3      	str	r3, [r0, #76]	; 0x4c
 8008258:	6503      	str	r3, [r0, #80]	; 0x50
 800825a:	4b12      	ldr	r3, [pc, #72]	; (80082a4 <__sinit+0x58>)
 800825c:	4a12      	ldr	r2, [pc, #72]	; (80082a8 <__sinit+0x5c>)
 800825e:	681b      	ldr	r3, [r3, #0]
 8008260:	6282      	str	r2, [r0, #40]	; 0x28
 8008262:	4298      	cmp	r0, r3
 8008264:	bf04      	itt	eq
 8008266:	2301      	moveq	r3, #1
 8008268:	6183      	streq	r3, [r0, #24]
 800826a:	f000 f81f 	bl	80082ac <__sfp>
 800826e:	6060      	str	r0, [r4, #4]
 8008270:	4620      	mov	r0, r4
 8008272:	f000 f81b 	bl	80082ac <__sfp>
 8008276:	60a0      	str	r0, [r4, #8]
 8008278:	4620      	mov	r0, r4
 800827a:	f000 f817 	bl	80082ac <__sfp>
 800827e:	2200      	movs	r2, #0
 8008280:	60e0      	str	r0, [r4, #12]
 8008282:	2104      	movs	r1, #4
 8008284:	6860      	ldr	r0, [r4, #4]
 8008286:	f7ff ffa7 	bl	80081d8 <std.isra.0>
 800828a:	2201      	movs	r2, #1
 800828c:	2109      	movs	r1, #9
 800828e:	68a0      	ldr	r0, [r4, #8]
 8008290:	f7ff ffa2 	bl	80081d8 <std.isra.0>
 8008294:	2202      	movs	r2, #2
 8008296:	2112      	movs	r1, #18
 8008298:	68e0      	ldr	r0, [r4, #12]
 800829a:	f7ff ff9d 	bl	80081d8 <std.isra.0>
 800829e:	2301      	movs	r3, #1
 80082a0:	61a3      	str	r3, [r4, #24]
 80082a2:	bd10      	pop	{r4, pc}
 80082a4:	08008ed8 	.word	0x08008ed8
 80082a8:	080081cd 	.word	0x080081cd

080082ac <__sfp>:
 80082ac:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80082ae:	4b1c      	ldr	r3, [pc, #112]	; (8008320 <__sfp+0x74>)
 80082b0:	4607      	mov	r7, r0
 80082b2:	681e      	ldr	r6, [r3, #0]
 80082b4:	69b3      	ldr	r3, [r6, #24]
 80082b6:	b913      	cbnz	r3, 80082be <__sfp+0x12>
 80082b8:	4630      	mov	r0, r6
 80082ba:	f7ff ffc7 	bl	800824c <__sinit>
 80082be:	3648      	adds	r6, #72	; 0x48
 80082c0:	68b4      	ldr	r4, [r6, #8]
 80082c2:	6873      	ldr	r3, [r6, #4]
 80082c4:	3b01      	subs	r3, #1
 80082c6:	d503      	bpl.n	80082d0 <__sfp+0x24>
 80082c8:	6833      	ldr	r3, [r6, #0]
 80082ca:	b133      	cbz	r3, 80082da <__sfp+0x2e>
 80082cc:	6836      	ldr	r6, [r6, #0]
 80082ce:	e7f7      	b.n	80082c0 <__sfp+0x14>
 80082d0:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 80082d4:	b16d      	cbz	r5, 80082f2 <__sfp+0x46>
 80082d6:	3468      	adds	r4, #104	; 0x68
 80082d8:	e7f4      	b.n	80082c4 <__sfp+0x18>
 80082da:	2104      	movs	r1, #4
 80082dc:	4638      	mov	r0, r7
 80082de:	f7ff ff9f 	bl	8008220 <__sfmoreglue>
 80082e2:	6030      	str	r0, [r6, #0]
 80082e4:	2800      	cmp	r0, #0
 80082e6:	d1f1      	bne.n	80082cc <__sfp+0x20>
 80082e8:	230c      	movs	r3, #12
 80082ea:	4604      	mov	r4, r0
 80082ec:	603b      	str	r3, [r7, #0]
 80082ee:	4620      	mov	r0, r4
 80082f0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 80082f2:	f64f 73ff 	movw	r3, #65535	; 0xffff
 80082f6:	81e3      	strh	r3, [r4, #14]
 80082f8:	2301      	movs	r3, #1
 80082fa:	6665      	str	r5, [r4, #100]	; 0x64
 80082fc:	81a3      	strh	r3, [r4, #12]
 80082fe:	6025      	str	r5, [r4, #0]
 8008300:	60a5      	str	r5, [r4, #8]
 8008302:	6065      	str	r5, [r4, #4]
 8008304:	6125      	str	r5, [r4, #16]
 8008306:	6165      	str	r5, [r4, #20]
 8008308:	61a5      	str	r5, [r4, #24]
 800830a:	2208      	movs	r2, #8
 800830c:	4629      	mov	r1, r5
 800830e:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 8008312:	f7ff fcae 	bl	8007c72 <memset>
 8008316:	6365      	str	r5, [r4, #52]	; 0x34
 8008318:	63a5      	str	r5, [r4, #56]	; 0x38
 800831a:	64a5      	str	r5, [r4, #72]	; 0x48
 800831c:	64e5      	str	r5, [r4, #76]	; 0x4c
 800831e:	e7e6      	b.n	80082ee <__sfp+0x42>
 8008320:	08008ed8 	.word	0x08008ed8

08008324 <_fwalk_reent>:
 8008324:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8008328:	4680      	mov	r8, r0
 800832a:	4689      	mov	r9, r1
 800832c:	2600      	movs	r6, #0
 800832e:	f100 0448 	add.w	r4, r0, #72	; 0x48
 8008332:	b914      	cbnz	r4, 800833a <_fwalk_reent+0x16>
 8008334:	4630      	mov	r0, r6
 8008336:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800833a:	68a5      	ldr	r5, [r4, #8]
 800833c:	6867      	ldr	r7, [r4, #4]
 800833e:	3f01      	subs	r7, #1
 8008340:	d501      	bpl.n	8008346 <_fwalk_reent+0x22>
 8008342:	6824      	ldr	r4, [r4, #0]
 8008344:	e7f5      	b.n	8008332 <_fwalk_reent+0xe>
 8008346:	89ab      	ldrh	r3, [r5, #12]
 8008348:	2b01      	cmp	r3, #1
 800834a:	d907      	bls.n	800835c <_fwalk_reent+0x38>
 800834c:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 8008350:	3301      	adds	r3, #1
 8008352:	d003      	beq.n	800835c <_fwalk_reent+0x38>
 8008354:	4629      	mov	r1, r5
 8008356:	4640      	mov	r0, r8
 8008358:	47c8      	blx	r9
 800835a:	4306      	orrs	r6, r0
 800835c:	3568      	adds	r5, #104	; 0x68
 800835e:	e7ee      	b.n	800833e <_fwalk_reent+0x1a>

08008360 <__swhatbuf_r>:
 8008360:	b570      	push	{r4, r5, r6, lr}
 8008362:	460e      	mov	r6, r1
 8008364:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8008368:	b090      	sub	sp, #64	; 0x40
 800836a:	2900      	cmp	r1, #0
 800836c:	4614      	mov	r4, r2
 800836e:	461d      	mov	r5, r3
 8008370:	da07      	bge.n	8008382 <__swhatbuf_r+0x22>
 8008372:	2300      	movs	r3, #0
 8008374:	602b      	str	r3, [r5, #0]
 8008376:	89b3      	ldrh	r3, [r6, #12]
 8008378:	061a      	lsls	r2, r3, #24
 800837a:	d410      	bmi.n	800839e <__swhatbuf_r+0x3e>
 800837c:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8008380:	e00e      	b.n	80083a0 <__swhatbuf_r+0x40>
 8008382:	aa01      	add	r2, sp, #4
 8008384:	f000 fc4e 	bl	8008c24 <_fstat_r>
 8008388:	2800      	cmp	r0, #0
 800838a:	dbf2      	blt.n	8008372 <__swhatbuf_r+0x12>
 800838c:	9a02      	ldr	r2, [sp, #8]
 800838e:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 8008392:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 8008396:	425a      	negs	r2, r3
 8008398:	415a      	adcs	r2, r3
 800839a:	602a      	str	r2, [r5, #0]
 800839c:	e7ee      	b.n	800837c <__swhatbuf_r+0x1c>
 800839e:	2340      	movs	r3, #64	; 0x40
 80083a0:	2000      	movs	r0, #0
 80083a2:	6023      	str	r3, [r4, #0]
 80083a4:	b010      	add	sp, #64	; 0x40
 80083a6:	bd70      	pop	{r4, r5, r6, pc}

080083a8 <__smakebuf_r>:
 80083a8:	898b      	ldrh	r3, [r1, #12]
 80083aa:	b573      	push	{r0, r1, r4, r5, r6, lr}
 80083ac:	079d      	lsls	r5, r3, #30
 80083ae:	4606      	mov	r6, r0
 80083b0:	460c      	mov	r4, r1
 80083b2:	d507      	bpl.n	80083c4 <__smakebuf_r+0x1c>
 80083b4:	f104 0347 	add.w	r3, r4, #71	; 0x47
 80083b8:	6023      	str	r3, [r4, #0]
 80083ba:	6123      	str	r3, [r4, #16]
 80083bc:	2301      	movs	r3, #1
 80083be:	6163      	str	r3, [r4, #20]
 80083c0:	b002      	add	sp, #8
 80083c2:	bd70      	pop	{r4, r5, r6, pc}
 80083c4:	ab01      	add	r3, sp, #4
 80083c6:	466a      	mov	r2, sp
 80083c8:	f7ff ffca 	bl	8008360 <__swhatbuf_r>
 80083cc:	9900      	ldr	r1, [sp, #0]
 80083ce:	4605      	mov	r5, r0
 80083d0:	4630      	mov	r0, r6
 80083d2:	f000 f87d 	bl	80084d0 <_malloc_r>
 80083d6:	b948      	cbnz	r0, 80083ec <__smakebuf_r+0x44>
 80083d8:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80083dc:	059a      	lsls	r2, r3, #22
 80083de:	d4ef      	bmi.n	80083c0 <__smakebuf_r+0x18>
 80083e0:	f023 0303 	bic.w	r3, r3, #3
 80083e4:	f043 0302 	orr.w	r3, r3, #2
 80083e8:	81a3      	strh	r3, [r4, #12]
 80083ea:	e7e3      	b.n	80083b4 <__smakebuf_r+0xc>
 80083ec:	4b0d      	ldr	r3, [pc, #52]	; (8008424 <__smakebuf_r+0x7c>)
 80083ee:	62b3      	str	r3, [r6, #40]	; 0x28
 80083f0:	89a3      	ldrh	r3, [r4, #12]
 80083f2:	6020      	str	r0, [r4, #0]
 80083f4:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80083f8:	81a3      	strh	r3, [r4, #12]
 80083fa:	9b00      	ldr	r3, [sp, #0]
 80083fc:	6120      	str	r0, [r4, #16]
 80083fe:	6163      	str	r3, [r4, #20]
 8008400:	9b01      	ldr	r3, [sp, #4]
 8008402:	b15b      	cbz	r3, 800841c <__smakebuf_r+0x74>
 8008404:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8008408:	4630      	mov	r0, r6
 800840a:	f000 fc1d 	bl	8008c48 <_isatty_r>
 800840e:	b128      	cbz	r0, 800841c <__smakebuf_r+0x74>
 8008410:	89a3      	ldrh	r3, [r4, #12]
 8008412:	f023 0303 	bic.w	r3, r3, #3
 8008416:	f043 0301 	orr.w	r3, r3, #1
 800841a:	81a3      	strh	r3, [r4, #12]
 800841c:	89a3      	ldrh	r3, [r4, #12]
 800841e:	431d      	orrs	r5, r3
 8008420:	81a5      	strh	r5, [r4, #12]
 8008422:	e7cd      	b.n	80083c0 <__smakebuf_r+0x18>
 8008424:	080081cd 	.word	0x080081cd

08008428 <malloc>:
 8008428:	4b02      	ldr	r3, [pc, #8]	; (8008434 <malloc+0xc>)
 800842a:	4601      	mov	r1, r0
 800842c:	6818      	ldr	r0, [r3, #0]
 800842e:	f000 b84f 	b.w	80084d0 <_malloc_r>
 8008432:	bf00      	nop
 8008434:	20000014 	.word	0x20000014

08008438 <_free_r>:
 8008438:	b538      	push	{r3, r4, r5, lr}
 800843a:	4605      	mov	r5, r0
 800843c:	2900      	cmp	r1, #0
 800843e:	d043      	beq.n	80084c8 <_free_r+0x90>
 8008440:	f851 3c04 	ldr.w	r3, [r1, #-4]
 8008444:	1f0c      	subs	r4, r1, #4
 8008446:	2b00      	cmp	r3, #0
 8008448:	bfb8      	it	lt
 800844a:	18e4      	addlt	r4, r4, r3
 800844c:	f000 fc2c 	bl	8008ca8 <__malloc_lock>
 8008450:	4a1e      	ldr	r2, [pc, #120]	; (80084cc <_free_r+0x94>)
 8008452:	6813      	ldr	r3, [r2, #0]
 8008454:	4610      	mov	r0, r2
 8008456:	b933      	cbnz	r3, 8008466 <_free_r+0x2e>
 8008458:	6063      	str	r3, [r4, #4]
 800845a:	6014      	str	r4, [r2, #0]
 800845c:	4628      	mov	r0, r5
 800845e:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 8008462:	f000 bc22 	b.w	8008caa <__malloc_unlock>
 8008466:	42a3      	cmp	r3, r4
 8008468:	d90b      	bls.n	8008482 <_free_r+0x4a>
 800846a:	6821      	ldr	r1, [r4, #0]
 800846c:	1862      	adds	r2, r4, r1
 800846e:	4293      	cmp	r3, r2
 8008470:	bf01      	itttt	eq
 8008472:	681a      	ldreq	r2, [r3, #0]
 8008474:	685b      	ldreq	r3, [r3, #4]
 8008476:	1852      	addeq	r2, r2, r1
 8008478:	6022      	streq	r2, [r4, #0]
 800847a:	6063      	str	r3, [r4, #4]
 800847c:	6004      	str	r4, [r0, #0]
 800847e:	e7ed      	b.n	800845c <_free_r+0x24>
 8008480:	4613      	mov	r3, r2
 8008482:	685a      	ldr	r2, [r3, #4]
 8008484:	b10a      	cbz	r2, 800848a <_free_r+0x52>
 8008486:	42a2      	cmp	r2, r4
 8008488:	d9fa      	bls.n	8008480 <_free_r+0x48>
 800848a:	6819      	ldr	r1, [r3, #0]
 800848c:	1858      	adds	r0, r3, r1
 800848e:	42a0      	cmp	r0, r4
 8008490:	d10b      	bne.n	80084aa <_free_r+0x72>
 8008492:	6820      	ldr	r0, [r4, #0]
 8008494:	4401      	add	r1, r0
 8008496:	1858      	adds	r0, r3, r1
 8008498:	4282      	cmp	r2, r0
 800849a:	6019      	str	r1, [r3, #0]
 800849c:	d1de      	bne.n	800845c <_free_r+0x24>
 800849e:	6810      	ldr	r0, [r2, #0]
 80084a0:	6852      	ldr	r2, [r2, #4]
 80084a2:	4401      	add	r1, r0
 80084a4:	6019      	str	r1, [r3, #0]
 80084a6:	605a      	str	r2, [r3, #4]
 80084a8:	e7d8      	b.n	800845c <_free_r+0x24>
 80084aa:	d902      	bls.n	80084b2 <_free_r+0x7a>
 80084ac:	230c      	movs	r3, #12
 80084ae:	602b      	str	r3, [r5, #0]
 80084b0:	e7d4      	b.n	800845c <_free_r+0x24>
 80084b2:	6820      	ldr	r0, [r4, #0]
 80084b4:	1821      	adds	r1, r4, r0
 80084b6:	428a      	cmp	r2, r1
 80084b8:	bf01      	itttt	eq
 80084ba:	6811      	ldreq	r1, [r2, #0]
 80084bc:	6852      	ldreq	r2, [r2, #4]
 80084be:	1809      	addeq	r1, r1, r0
 80084c0:	6021      	streq	r1, [r4, #0]
 80084c2:	6062      	str	r2, [r4, #4]
 80084c4:	605c      	str	r4, [r3, #4]
 80084c6:	e7c9      	b.n	800845c <_free_r+0x24>
 80084c8:	bd38      	pop	{r3, r4, r5, pc}
 80084ca:	bf00      	nop
 80084cc:	20000424 	.word	0x20000424

080084d0 <_malloc_r>:
 80084d0:	b570      	push	{r4, r5, r6, lr}
 80084d2:	1ccd      	adds	r5, r1, #3
 80084d4:	f025 0503 	bic.w	r5, r5, #3
 80084d8:	3508      	adds	r5, #8
 80084da:	2d0c      	cmp	r5, #12
 80084dc:	bf38      	it	cc
 80084de:	250c      	movcc	r5, #12
 80084e0:	2d00      	cmp	r5, #0
 80084e2:	4606      	mov	r6, r0
 80084e4:	db01      	blt.n	80084ea <_malloc_r+0x1a>
 80084e6:	42a9      	cmp	r1, r5
 80084e8:	d903      	bls.n	80084f2 <_malloc_r+0x22>
 80084ea:	230c      	movs	r3, #12
 80084ec:	6033      	str	r3, [r6, #0]
 80084ee:	2000      	movs	r0, #0
 80084f0:	bd70      	pop	{r4, r5, r6, pc}
 80084f2:	f000 fbd9 	bl	8008ca8 <__malloc_lock>
 80084f6:	4a23      	ldr	r2, [pc, #140]	; (8008584 <_malloc_r+0xb4>)
 80084f8:	6814      	ldr	r4, [r2, #0]
 80084fa:	4621      	mov	r1, r4
 80084fc:	b991      	cbnz	r1, 8008524 <_malloc_r+0x54>
 80084fe:	4c22      	ldr	r4, [pc, #136]	; (8008588 <_malloc_r+0xb8>)
 8008500:	6823      	ldr	r3, [r4, #0]
 8008502:	b91b      	cbnz	r3, 800850c <_malloc_r+0x3c>
 8008504:	4630      	mov	r0, r6
 8008506:	f000 fb17 	bl	8008b38 <_sbrk_r>
 800850a:	6020      	str	r0, [r4, #0]
 800850c:	4629      	mov	r1, r5
 800850e:	4630      	mov	r0, r6
 8008510:	f000 fb12 	bl	8008b38 <_sbrk_r>
 8008514:	1c43      	adds	r3, r0, #1
 8008516:	d126      	bne.n	8008566 <_malloc_r+0x96>
 8008518:	230c      	movs	r3, #12
 800851a:	4630      	mov	r0, r6
 800851c:	6033      	str	r3, [r6, #0]
 800851e:	f000 fbc4 	bl	8008caa <__malloc_unlock>
 8008522:	e7e4      	b.n	80084ee <_malloc_r+0x1e>
 8008524:	680b      	ldr	r3, [r1, #0]
 8008526:	1b5b      	subs	r3, r3, r5
 8008528:	d41a      	bmi.n	8008560 <_malloc_r+0x90>
 800852a:	2b0b      	cmp	r3, #11
 800852c:	d90f      	bls.n	800854e <_malloc_r+0x7e>
 800852e:	600b      	str	r3, [r1, #0]
 8008530:	18cc      	adds	r4, r1, r3
 8008532:	50cd      	str	r5, [r1, r3]
 8008534:	4630      	mov	r0, r6
 8008536:	f000 fbb8 	bl	8008caa <__malloc_unlock>
 800853a:	f104 000b 	add.w	r0, r4, #11
 800853e:	1d23      	adds	r3, r4, #4
 8008540:	f020 0007 	bic.w	r0, r0, #7
 8008544:	1ac3      	subs	r3, r0, r3
 8008546:	d01b      	beq.n	8008580 <_malloc_r+0xb0>
 8008548:	425a      	negs	r2, r3
 800854a:	50e2      	str	r2, [r4, r3]
 800854c:	bd70      	pop	{r4, r5, r6, pc}
 800854e:	428c      	cmp	r4, r1
 8008550:	bf0b      	itete	eq
 8008552:	6863      	ldreq	r3, [r4, #4]
 8008554:	684b      	ldrne	r3, [r1, #4]
 8008556:	6013      	streq	r3, [r2, #0]
 8008558:	6063      	strne	r3, [r4, #4]
 800855a:	bf18      	it	ne
 800855c:	460c      	movne	r4, r1
 800855e:	e7e9      	b.n	8008534 <_malloc_r+0x64>
 8008560:	460c      	mov	r4, r1
 8008562:	6849      	ldr	r1, [r1, #4]
 8008564:	e7ca      	b.n	80084fc <_malloc_r+0x2c>
 8008566:	1cc4      	adds	r4, r0, #3
 8008568:	f024 0403 	bic.w	r4, r4, #3
 800856c:	42a0      	cmp	r0, r4
 800856e:	d005      	beq.n	800857c <_malloc_r+0xac>
 8008570:	1a21      	subs	r1, r4, r0
 8008572:	4630      	mov	r0, r6
 8008574:	f000 fae0 	bl	8008b38 <_sbrk_r>
 8008578:	3001      	adds	r0, #1
 800857a:	d0cd      	beq.n	8008518 <_malloc_r+0x48>
 800857c:	6025      	str	r5, [r4, #0]
 800857e:	e7d9      	b.n	8008534 <_malloc_r+0x64>
 8008580:	bd70      	pop	{r4, r5, r6, pc}
 8008582:	bf00      	nop
 8008584:	20000424 	.word	0x20000424
 8008588:	20000428 	.word	0x20000428

0800858c <__sfputc_r>:
 800858c:	6893      	ldr	r3, [r2, #8]
 800858e:	b410      	push	{r4}
 8008590:	3b01      	subs	r3, #1
 8008592:	2b00      	cmp	r3, #0
 8008594:	6093      	str	r3, [r2, #8]
 8008596:	da08      	bge.n	80085aa <__sfputc_r+0x1e>
 8008598:	6994      	ldr	r4, [r2, #24]
 800859a:	42a3      	cmp	r3, r4
 800859c:	db02      	blt.n	80085a4 <__sfputc_r+0x18>
 800859e:	b2cb      	uxtb	r3, r1
 80085a0:	2b0a      	cmp	r3, #10
 80085a2:	d102      	bne.n	80085aa <__sfputc_r+0x1e>
 80085a4:	bc10      	pop	{r4}
 80085a6:	f7ff bc9f 	b.w	8007ee8 <__swbuf_r>
 80085aa:	6813      	ldr	r3, [r2, #0]
 80085ac:	1c58      	adds	r0, r3, #1
 80085ae:	6010      	str	r0, [r2, #0]
 80085b0:	7019      	strb	r1, [r3, #0]
 80085b2:	b2c8      	uxtb	r0, r1
 80085b4:	bc10      	pop	{r4}
 80085b6:	4770      	bx	lr

080085b8 <__sfputs_r>:
 80085b8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80085ba:	4606      	mov	r6, r0
 80085bc:	460f      	mov	r7, r1
 80085be:	4614      	mov	r4, r2
 80085c0:	18d5      	adds	r5, r2, r3
 80085c2:	42ac      	cmp	r4, r5
 80085c4:	d101      	bne.n	80085ca <__sfputs_r+0x12>
 80085c6:	2000      	movs	r0, #0
 80085c8:	e007      	b.n	80085da <__sfputs_r+0x22>
 80085ca:	463a      	mov	r2, r7
 80085cc:	f814 1b01 	ldrb.w	r1, [r4], #1
 80085d0:	4630      	mov	r0, r6
 80085d2:	f7ff ffdb 	bl	800858c <__sfputc_r>
 80085d6:	1c43      	adds	r3, r0, #1
 80085d8:	d1f3      	bne.n	80085c2 <__sfputs_r+0xa>
 80085da:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

080085dc <_vfiprintf_r>:
 80085dc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80085e0:	b09d      	sub	sp, #116	; 0x74
 80085e2:	460c      	mov	r4, r1
 80085e4:	4617      	mov	r7, r2
 80085e6:	9303      	str	r3, [sp, #12]
 80085e8:	4606      	mov	r6, r0
 80085ea:	b118      	cbz	r0, 80085f4 <_vfiprintf_r+0x18>
 80085ec:	6983      	ldr	r3, [r0, #24]
 80085ee:	b90b      	cbnz	r3, 80085f4 <_vfiprintf_r+0x18>
 80085f0:	f7ff fe2c 	bl	800824c <__sinit>
 80085f4:	4b7c      	ldr	r3, [pc, #496]	; (80087e8 <_vfiprintf_r+0x20c>)
 80085f6:	429c      	cmp	r4, r3
 80085f8:	d157      	bne.n	80086aa <_vfiprintf_r+0xce>
 80085fa:	6874      	ldr	r4, [r6, #4]
 80085fc:	89a3      	ldrh	r3, [r4, #12]
 80085fe:	0718      	lsls	r0, r3, #28
 8008600:	d55d      	bpl.n	80086be <_vfiprintf_r+0xe2>
 8008602:	6923      	ldr	r3, [r4, #16]
 8008604:	2b00      	cmp	r3, #0
 8008606:	d05a      	beq.n	80086be <_vfiprintf_r+0xe2>
 8008608:	2300      	movs	r3, #0
 800860a:	9309      	str	r3, [sp, #36]	; 0x24
 800860c:	2320      	movs	r3, #32
 800860e:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 8008612:	2330      	movs	r3, #48	; 0x30
 8008614:	f04f 0b01 	mov.w	fp, #1
 8008618:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 800861c:	46b8      	mov	r8, r7
 800861e:	4645      	mov	r5, r8
 8008620:	f815 3b01 	ldrb.w	r3, [r5], #1
 8008624:	2b00      	cmp	r3, #0
 8008626:	d155      	bne.n	80086d4 <_vfiprintf_r+0xf8>
 8008628:	ebb8 0a07 	subs.w	sl, r8, r7
 800862c:	d00b      	beq.n	8008646 <_vfiprintf_r+0x6a>
 800862e:	4653      	mov	r3, sl
 8008630:	463a      	mov	r2, r7
 8008632:	4621      	mov	r1, r4
 8008634:	4630      	mov	r0, r6
 8008636:	f7ff ffbf 	bl	80085b8 <__sfputs_r>
 800863a:	3001      	adds	r0, #1
 800863c:	f000 80c4 	beq.w	80087c8 <_vfiprintf_r+0x1ec>
 8008640:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8008642:	4453      	add	r3, sl
 8008644:	9309      	str	r3, [sp, #36]	; 0x24
 8008646:	f898 3000 	ldrb.w	r3, [r8]
 800864a:	2b00      	cmp	r3, #0
 800864c:	f000 80bc 	beq.w	80087c8 <_vfiprintf_r+0x1ec>
 8008650:	2300      	movs	r3, #0
 8008652:	f04f 32ff 	mov.w	r2, #4294967295
 8008656:	9304      	str	r3, [sp, #16]
 8008658:	9307      	str	r3, [sp, #28]
 800865a:	9205      	str	r2, [sp, #20]
 800865c:	9306      	str	r3, [sp, #24]
 800865e:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 8008662:	931a      	str	r3, [sp, #104]	; 0x68
 8008664:	2205      	movs	r2, #5
 8008666:	7829      	ldrb	r1, [r5, #0]
 8008668:	4860      	ldr	r0, [pc, #384]	; (80087ec <_vfiprintf_r+0x210>)
 800866a:	f000 fb0f 	bl	8008c8c <memchr>
 800866e:	f105 0801 	add.w	r8, r5, #1
 8008672:	9b04      	ldr	r3, [sp, #16]
 8008674:	2800      	cmp	r0, #0
 8008676:	d131      	bne.n	80086dc <_vfiprintf_r+0x100>
 8008678:	06d9      	lsls	r1, r3, #27
 800867a:	bf44      	itt	mi
 800867c:	2220      	movmi	r2, #32
 800867e:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8008682:	071a      	lsls	r2, r3, #28
 8008684:	bf44      	itt	mi
 8008686:	222b      	movmi	r2, #43	; 0x2b
 8008688:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800868c:	782a      	ldrb	r2, [r5, #0]
 800868e:	2a2a      	cmp	r2, #42	; 0x2a
 8008690:	d02c      	beq.n	80086ec <_vfiprintf_r+0x110>
 8008692:	2100      	movs	r1, #0
 8008694:	200a      	movs	r0, #10
 8008696:	9a07      	ldr	r2, [sp, #28]
 8008698:	46a8      	mov	r8, r5
 800869a:	f898 3000 	ldrb.w	r3, [r8]
 800869e:	3501      	adds	r5, #1
 80086a0:	3b30      	subs	r3, #48	; 0x30
 80086a2:	2b09      	cmp	r3, #9
 80086a4:	d96d      	bls.n	8008782 <_vfiprintf_r+0x1a6>
 80086a6:	b371      	cbz	r1, 8008706 <_vfiprintf_r+0x12a>
 80086a8:	e026      	b.n	80086f8 <_vfiprintf_r+0x11c>
 80086aa:	4b51      	ldr	r3, [pc, #324]	; (80087f0 <_vfiprintf_r+0x214>)
 80086ac:	429c      	cmp	r4, r3
 80086ae:	d101      	bne.n	80086b4 <_vfiprintf_r+0xd8>
 80086b0:	68b4      	ldr	r4, [r6, #8]
 80086b2:	e7a3      	b.n	80085fc <_vfiprintf_r+0x20>
 80086b4:	4b4f      	ldr	r3, [pc, #316]	; (80087f4 <_vfiprintf_r+0x218>)
 80086b6:	429c      	cmp	r4, r3
 80086b8:	bf08      	it	eq
 80086ba:	68f4      	ldreq	r4, [r6, #12]
 80086bc:	e79e      	b.n	80085fc <_vfiprintf_r+0x20>
 80086be:	4621      	mov	r1, r4
 80086c0:	4630      	mov	r0, r6
 80086c2:	f7ff fc63 	bl	8007f8c <__swsetup_r>
 80086c6:	2800      	cmp	r0, #0
 80086c8:	d09e      	beq.n	8008608 <_vfiprintf_r+0x2c>
 80086ca:	f04f 30ff 	mov.w	r0, #4294967295
 80086ce:	b01d      	add	sp, #116	; 0x74
 80086d0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80086d4:	2b25      	cmp	r3, #37	; 0x25
 80086d6:	d0a7      	beq.n	8008628 <_vfiprintf_r+0x4c>
 80086d8:	46a8      	mov	r8, r5
 80086da:	e7a0      	b.n	800861e <_vfiprintf_r+0x42>
 80086dc:	4a43      	ldr	r2, [pc, #268]	; (80087ec <_vfiprintf_r+0x210>)
 80086de:	4645      	mov	r5, r8
 80086e0:	1a80      	subs	r0, r0, r2
 80086e2:	fa0b f000 	lsl.w	r0, fp, r0
 80086e6:	4318      	orrs	r0, r3
 80086e8:	9004      	str	r0, [sp, #16]
 80086ea:	e7bb      	b.n	8008664 <_vfiprintf_r+0x88>
 80086ec:	9a03      	ldr	r2, [sp, #12]
 80086ee:	1d11      	adds	r1, r2, #4
 80086f0:	6812      	ldr	r2, [r2, #0]
 80086f2:	9103      	str	r1, [sp, #12]
 80086f4:	2a00      	cmp	r2, #0
 80086f6:	db01      	blt.n	80086fc <_vfiprintf_r+0x120>
 80086f8:	9207      	str	r2, [sp, #28]
 80086fa:	e004      	b.n	8008706 <_vfiprintf_r+0x12a>
 80086fc:	4252      	negs	r2, r2
 80086fe:	f043 0302 	orr.w	r3, r3, #2
 8008702:	9207      	str	r2, [sp, #28]
 8008704:	9304      	str	r3, [sp, #16]
 8008706:	f898 3000 	ldrb.w	r3, [r8]
 800870a:	2b2e      	cmp	r3, #46	; 0x2e
 800870c:	d110      	bne.n	8008730 <_vfiprintf_r+0x154>
 800870e:	f898 3001 	ldrb.w	r3, [r8, #1]
 8008712:	f108 0101 	add.w	r1, r8, #1
 8008716:	2b2a      	cmp	r3, #42	; 0x2a
 8008718:	d137      	bne.n	800878a <_vfiprintf_r+0x1ae>
 800871a:	9b03      	ldr	r3, [sp, #12]
 800871c:	f108 0802 	add.w	r8, r8, #2
 8008720:	1d1a      	adds	r2, r3, #4
 8008722:	681b      	ldr	r3, [r3, #0]
 8008724:	9203      	str	r2, [sp, #12]
 8008726:	2b00      	cmp	r3, #0
 8008728:	bfb8      	it	lt
 800872a:	f04f 33ff 	movlt.w	r3, #4294967295
 800872e:	9305      	str	r3, [sp, #20]
 8008730:	4d31      	ldr	r5, [pc, #196]	; (80087f8 <_vfiprintf_r+0x21c>)
 8008732:	2203      	movs	r2, #3
 8008734:	f898 1000 	ldrb.w	r1, [r8]
 8008738:	4628      	mov	r0, r5
 800873a:	f000 faa7 	bl	8008c8c <memchr>
 800873e:	b140      	cbz	r0, 8008752 <_vfiprintf_r+0x176>
 8008740:	2340      	movs	r3, #64	; 0x40
 8008742:	1b40      	subs	r0, r0, r5
 8008744:	fa03 f000 	lsl.w	r0, r3, r0
 8008748:	9b04      	ldr	r3, [sp, #16]
 800874a:	f108 0801 	add.w	r8, r8, #1
 800874e:	4303      	orrs	r3, r0
 8008750:	9304      	str	r3, [sp, #16]
 8008752:	f898 1000 	ldrb.w	r1, [r8]
 8008756:	2206      	movs	r2, #6
 8008758:	4828      	ldr	r0, [pc, #160]	; (80087fc <_vfiprintf_r+0x220>)
 800875a:	f108 0701 	add.w	r7, r8, #1
 800875e:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 8008762:	f000 fa93 	bl	8008c8c <memchr>
 8008766:	2800      	cmp	r0, #0
 8008768:	d034      	beq.n	80087d4 <_vfiprintf_r+0x1f8>
 800876a:	4b25      	ldr	r3, [pc, #148]	; (8008800 <_vfiprintf_r+0x224>)
 800876c:	bb03      	cbnz	r3, 80087b0 <_vfiprintf_r+0x1d4>
 800876e:	9b03      	ldr	r3, [sp, #12]
 8008770:	3307      	adds	r3, #7
 8008772:	f023 0307 	bic.w	r3, r3, #7
 8008776:	3308      	adds	r3, #8
 8008778:	9303      	str	r3, [sp, #12]
 800877a:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800877c:	444b      	add	r3, r9
 800877e:	9309      	str	r3, [sp, #36]	; 0x24
 8008780:	e74c      	b.n	800861c <_vfiprintf_r+0x40>
 8008782:	fb00 3202 	mla	r2, r0, r2, r3
 8008786:	2101      	movs	r1, #1
 8008788:	e786      	b.n	8008698 <_vfiprintf_r+0xbc>
 800878a:	2300      	movs	r3, #0
 800878c:	250a      	movs	r5, #10
 800878e:	4618      	mov	r0, r3
 8008790:	9305      	str	r3, [sp, #20]
 8008792:	4688      	mov	r8, r1
 8008794:	f898 2000 	ldrb.w	r2, [r8]
 8008798:	3101      	adds	r1, #1
 800879a:	3a30      	subs	r2, #48	; 0x30
 800879c:	2a09      	cmp	r2, #9
 800879e:	d903      	bls.n	80087a8 <_vfiprintf_r+0x1cc>
 80087a0:	2b00      	cmp	r3, #0
 80087a2:	d0c5      	beq.n	8008730 <_vfiprintf_r+0x154>
 80087a4:	9005      	str	r0, [sp, #20]
 80087a6:	e7c3      	b.n	8008730 <_vfiprintf_r+0x154>
 80087a8:	fb05 2000 	mla	r0, r5, r0, r2
 80087ac:	2301      	movs	r3, #1
 80087ae:	e7f0      	b.n	8008792 <_vfiprintf_r+0x1b6>
 80087b0:	ab03      	add	r3, sp, #12
 80087b2:	9300      	str	r3, [sp, #0]
 80087b4:	4622      	mov	r2, r4
 80087b6:	4b13      	ldr	r3, [pc, #76]	; (8008804 <_vfiprintf_r+0x228>)
 80087b8:	a904      	add	r1, sp, #16
 80087ba:	4630      	mov	r0, r6
 80087bc:	f3af 8000 	nop.w
 80087c0:	f1b0 3fff 	cmp.w	r0, #4294967295
 80087c4:	4681      	mov	r9, r0
 80087c6:	d1d8      	bne.n	800877a <_vfiprintf_r+0x19e>
 80087c8:	89a3      	ldrh	r3, [r4, #12]
 80087ca:	065b      	lsls	r3, r3, #25
 80087cc:	f53f af7d 	bmi.w	80086ca <_vfiprintf_r+0xee>
 80087d0:	9809      	ldr	r0, [sp, #36]	; 0x24
 80087d2:	e77c      	b.n	80086ce <_vfiprintf_r+0xf2>
 80087d4:	ab03      	add	r3, sp, #12
 80087d6:	9300      	str	r3, [sp, #0]
 80087d8:	4622      	mov	r2, r4
 80087da:	4b0a      	ldr	r3, [pc, #40]	; (8008804 <_vfiprintf_r+0x228>)
 80087dc:	a904      	add	r1, sp, #16
 80087de:	4630      	mov	r0, r6
 80087e0:	f000 f88a 	bl	80088f8 <_printf_i>
 80087e4:	e7ec      	b.n	80087c0 <_vfiprintf_r+0x1e4>
 80087e6:	bf00      	nop
 80087e8:	08008efc 	.word	0x08008efc
 80087ec:	08008f3c 	.word	0x08008f3c
 80087f0:	08008f1c 	.word	0x08008f1c
 80087f4:	08008edc 	.word	0x08008edc
 80087f8:	08008f42 	.word	0x08008f42
 80087fc:	08008f46 	.word	0x08008f46
 8008800:	00000000 	.word	0x00000000
 8008804:	080085b9 	.word	0x080085b9

08008808 <_printf_common>:
 8008808:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800880c:	4691      	mov	r9, r2
 800880e:	461f      	mov	r7, r3
 8008810:	688a      	ldr	r2, [r1, #8]
 8008812:	690b      	ldr	r3, [r1, #16]
 8008814:	4606      	mov	r6, r0
 8008816:	4293      	cmp	r3, r2
 8008818:	bfb8      	it	lt
 800881a:	4613      	movlt	r3, r2
 800881c:	f8c9 3000 	str.w	r3, [r9]
 8008820:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 8008824:	460c      	mov	r4, r1
 8008826:	f8dd 8020 	ldr.w	r8, [sp, #32]
 800882a:	b112      	cbz	r2, 8008832 <_printf_common+0x2a>
 800882c:	3301      	adds	r3, #1
 800882e:	f8c9 3000 	str.w	r3, [r9]
 8008832:	6823      	ldr	r3, [r4, #0]
 8008834:	0699      	lsls	r1, r3, #26
 8008836:	bf42      	ittt	mi
 8008838:	f8d9 3000 	ldrmi.w	r3, [r9]
 800883c:	3302      	addmi	r3, #2
 800883e:	f8c9 3000 	strmi.w	r3, [r9]
 8008842:	6825      	ldr	r5, [r4, #0]
 8008844:	f015 0506 	ands.w	r5, r5, #6
 8008848:	d107      	bne.n	800885a <_printf_common+0x52>
 800884a:	f104 0a19 	add.w	sl, r4, #25
 800884e:	68e3      	ldr	r3, [r4, #12]
 8008850:	f8d9 2000 	ldr.w	r2, [r9]
 8008854:	1a9b      	subs	r3, r3, r2
 8008856:	429d      	cmp	r5, r3
 8008858:	db2a      	blt.n	80088b0 <_printf_common+0xa8>
 800885a:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 800885e:	6822      	ldr	r2, [r4, #0]
 8008860:	3300      	adds	r3, #0
 8008862:	bf18      	it	ne
 8008864:	2301      	movne	r3, #1
 8008866:	0692      	lsls	r2, r2, #26
 8008868:	d42f      	bmi.n	80088ca <_printf_common+0xc2>
 800886a:	f104 0243 	add.w	r2, r4, #67	; 0x43
 800886e:	4639      	mov	r1, r7
 8008870:	4630      	mov	r0, r6
 8008872:	47c0      	blx	r8
 8008874:	3001      	adds	r0, #1
 8008876:	d022      	beq.n	80088be <_printf_common+0xb6>
 8008878:	6823      	ldr	r3, [r4, #0]
 800887a:	68e5      	ldr	r5, [r4, #12]
 800887c:	f003 0306 	and.w	r3, r3, #6
 8008880:	2b04      	cmp	r3, #4
 8008882:	bf18      	it	ne
 8008884:	2500      	movne	r5, #0
 8008886:	f8d9 2000 	ldr.w	r2, [r9]
 800888a:	f04f 0900 	mov.w	r9, #0
 800888e:	bf08      	it	eq
 8008890:	1aad      	subeq	r5, r5, r2
 8008892:	68a3      	ldr	r3, [r4, #8]
 8008894:	6922      	ldr	r2, [r4, #16]
 8008896:	bf08      	it	eq
 8008898:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 800889c:	4293      	cmp	r3, r2
 800889e:	bfc4      	itt	gt
 80088a0:	1a9b      	subgt	r3, r3, r2
 80088a2:	18ed      	addgt	r5, r5, r3
 80088a4:	341a      	adds	r4, #26
 80088a6:	454d      	cmp	r5, r9
 80088a8:	d11b      	bne.n	80088e2 <_printf_common+0xda>
 80088aa:	2000      	movs	r0, #0
 80088ac:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80088b0:	2301      	movs	r3, #1
 80088b2:	4652      	mov	r2, sl
 80088b4:	4639      	mov	r1, r7
 80088b6:	4630      	mov	r0, r6
 80088b8:	47c0      	blx	r8
 80088ba:	3001      	adds	r0, #1
 80088bc:	d103      	bne.n	80088c6 <_printf_common+0xbe>
 80088be:	f04f 30ff 	mov.w	r0, #4294967295
 80088c2:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80088c6:	3501      	adds	r5, #1
 80088c8:	e7c1      	b.n	800884e <_printf_common+0x46>
 80088ca:	2030      	movs	r0, #48	; 0x30
 80088cc:	18e1      	adds	r1, r4, r3
 80088ce:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 80088d2:	1c5a      	adds	r2, r3, #1
 80088d4:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 80088d8:	4422      	add	r2, r4
 80088da:	3302      	adds	r3, #2
 80088dc:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 80088e0:	e7c3      	b.n	800886a <_printf_common+0x62>
 80088e2:	2301      	movs	r3, #1
 80088e4:	4622      	mov	r2, r4
 80088e6:	4639      	mov	r1, r7
 80088e8:	4630      	mov	r0, r6
 80088ea:	47c0      	blx	r8
 80088ec:	3001      	adds	r0, #1
 80088ee:	d0e6      	beq.n	80088be <_printf_common+0xb6>
 80088f0:	f109 0901 	add.w	r9, r9, #1
 80088f4:	e7d7      	b.n	80088a6 <_printf_common+0x9e>
	...

080088f8 <_printf_i>:
 80088f8:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 80088fc:	4617      	mov	r7, r2
 80088fe:	7e0a      	ldrb	r2, [r1, #24]
 8008900:	b085      	sub	sp, #20
 8008902:	2a6e      	cmp	r2, #110	; 0x6e
 8008904:	4698      	mov	r8, r3
 8008906:	4606      	mov	r6, r0
 8008908:	460c      	mov	r4, r1
 800890a:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800890c:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 8008910:	f000 80bc 	beq.w	8008a8c <_printf_i+0x194>
 8008914:	d81a      	bhi.n	800894c <_printf_i+0x54>
 8008916:	2a63      	cmp	r2, #99	; 0x63
 8008918:	d02e      	beq.n	8008978 <_printf_i+0x80>
 800891a:	d80a      	bhi.n	8008932 <_printf_i+0x3a>
 800891c:	2a00      	cmp	r2, #0
 800891e:	f000 80c8 	beq.w	8008ab2 <_printf_i+0x1ba>
 8008922:	2a58      	cmp	r2, #88	; 0x58
 8008924:	f000 808a 	beq.w	8008a3c <_printf_i+0x144>
 8008928:	f104 0542 	add.w	r5, r4, #66	; 0x42
 800892c:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 8008930:	e02a      	b.n	8008988 <_printf_i+0x90>
 8008932:	2a64      	cmp	r2, #100	; 0x64
 8008934:	d001      	beq.n	800893a <_printf_i+0x42>
 8008936:	2a69      	cmp	r2, #105	; 0x69
 8008938:	d1f6      	bne.n	8008928 <_printf_i+0x30>
 800893a:	6821      	ldr	r1, [r4, #0]
 800893c:	681a      	ldr	r2, [r3, #0]
 800893e:	f011 0f80 	tst.w	r1, #128	; 0x80
 8008942:	d023      	beq.n	800898c <_printf_i+0x94>
 8008944:	1d11      	adds	r1, r2, #4
 8008946:	6019      	str	r1, [r3, #0]
 8008948:	6813      	ldr	r3, [r2, #0]
 800894a:	e027      	b.n	800899c <_printf_i+0xa4>
 800894c:	2a73      	cmp	r2, #115	; 0x73
 800894e:	f000 80b4 	beq.w	8008aba <_printf_i+0x1c2>
 8008952:	d808      	bhi.n	8008966 <_printf_i+0x6e>
 8008954:	2a6f      	cmp	r2, #111	; 0x6f
 8008956:	d02a      	beq.n	80089ae <_printf_i+0xb6>
 8008958:	2a70      	cmp	r2, #112	; 0x70
 800895a:	d1e5      	bne.n	8008928 <_printf_i+0x30>
 800895c:	680a      	ldr	r2, [r1, #0]
 800895e:	f042 0220 	orr.w	r2, r2, #32
 8008962:	600a      	str	r2, [r1, #0]
 8008964:	e003      	b.n	800896e <_printf_i+0x76>
 8008966:	2a75      	cmp	r2, #117	; 0x75
 8008968:	d021      	beq.n	80089ae <_printf_i+0xb6>
 800896a:	2a78      	cmp	r2, #120	; 0x78
 800896c:	d1dc      	bne.n	8008928 <_printf_i+0x30>
 800896e:	2278      	movs	r2, #120	; 0x78
 8008970:	496f      	ldr	r1, [pc, #444]	; (8008b30 <_printf_i+0x238>)
 8008972:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8008976:	e064      	b.n	8008a42 <_printf_i+0x14a>
 8008978:	681a      	ldr	r2, [r3, #0]
 800897a:	f101 0542 	add.w	r5, r1, #66	; 0x42
 800897e:	1d11      	adds	r1, r2, #4
 8008980:	6019      	str	r1, [r3, #0]
 8008982:	6813      	ldr	r3, [r2, #0]
 8008984:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8008988:	2301      	movs	r3, #1
 800898a:	e0a3      	b.n	8008ad4 <_printf_i+0x1dc>
 800898c:	f011 0f40 	tst.w	r1, #64	; 0x40
 8008990:	f102 0104 	add.w	r1, r2, #4
 8008994:	6019      	str	r1, [r3, #0]
 8008996:	d0d7      	beq.n	8008948 <_printf_i+0x50>
 8008998:	f9b2 3000 	ldrsh.w	r3, [r2]
 800899c:	2b00      	cmp	r3, #0
 800899e:	da03      	bge.n	80089a8 <_printf_i+0xb0>
 80089a0:	222d      	movs	r2, #45	; 0x2d
 80089a2:	425b      	negs	r3, r3
 80089a4:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 80089a8:	4962      	ldr	r1, [pc, #392]	; (8008b34 <_printf_i+0x23c>)
 80089aa:	220a      	movs	r2, #10
 80089ac:	e017      	b.n	80089de <_printf_i+0xe6>
 80089ae:	6820      	ldr	r0, [r4, #0]
 80089b0:	6819      	ldr	r1, [r3, #0]
 80089b2:	f010 0f80 	tst.w	r0, #128	; 0x80
 80089b6:	d003      	beq.n	80089c0 <_printf_i+0xc8>
 80089b8:	1d08      	adds	r0, r1, #4
 80089ba:	6018      	str	r0, [r3, #0]
 80089bc:	680b      	ldr	r3, [r1, #0]
 80089be:	e006      	b.n	80089ce <_printf_i+0xd6>
 80089c0:	f010 0f40 	tst.w	r0, #64	; 0x40
 80089c4:	f101 0004 	add.w	r0, r1, #4
 80089c8:	6018      	str	r0, [r3, #0]
 80089ca:	d0f7      	beq.n	80089bc <_printf_i+0xc4>
 80089cc:	880b      	ldrh	r3, [r1, #0]
 80089ce:	2a6f      	cmp	r2, #111	; 0x6f
 80089d0:	bf14      	ite	ne
 80089d2:	220a      	movne	r2, #10
 80089d4:	2208      	moveq	r2, #8
 80089d6:	4957      	ldr	r1, [pc, #348]	; (8008b34 <_printf_i+0x23c>)
 80089d8:	2000      	movs	r0, #0
 80089da:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 80089de:	6865      	ldr	r5, [r4, #4]
 80089e0:	2d00      	cmp	r5, #0
 80089e2:	60a5      	str	r5, [r4, #8]
 80089e4:	f2c0 809c 	blt.w	8008b20 <_printf_i+0x228>
 80089e8:	6820      	ldr	r0, [r4, #0]
 80089ea:	f020 0004 	bic.w	r0, r0, #4
 80089ee:	6020      	str	r0, [r4, #0]
 80089f0:	2b00      	cmp	r3, #0
 80089f2:	d13f      	bne.n	8008a74 <_printf_i+0x17c>
 80089f4:	2d00      	cmp	r5, #0
 80089f6:	f040 8095 	bne.w	8008b24 <_printf_i+0x22c>
 80089fa:	4675      	mov	r5, lr
 80089fc:	2a08      	cmp	r2, #8
 80089fe:	d10b      	bne.n	8008a18 <_printf_i+0x120>
 8008a00:	6823      	ldr	r3, [r4, #0]
 8008a02:	07da      	lsls	r2, r3, #31
 8008a04:	d508      	bpl.n	8008a18 <_printf_i+0x120>
 8008a06:	6923      	ldr	r3, [r4, #16]
 8008a08:	6862      	ldr	r2, [r4, #4]
 8008a0a:	429a      	cmp	r2, r3
 8008a0c:	bfde      	ittt	le
 8008a0e:	2330      	movle	r3, #48	; 0x30
 8008a10:	f805 3c01 	strble.w	r3, [r5, #-1]
 8008a14:	f105 35ff 	addle.w	r5, r5, #4294967295
 8008a18:	ebae 0305 	sub.w	r3, lr, r5
 8008a1c:	6123      	str	r3, [r4, #16]
 8008a1e:	f8cd 8000 	str.w	r8, [sp]
 8008a22:	463b      	mov	r3, r7
 8008a24:	aa03      	add	r2, sp, #12
 8008a26:	4621      	mov	r1, r4
 8008a28:	4630      	mov	r0, r6
 8008a2a:	f7ff feed 	bl	8008808 <_printf_common>
 8008a2e:	3001      	adds	r0, #1
 8008a30:	d155      	bne.n	8008ade <_printf_i+0x1e6>
 8008a32:	f04f 30ff 	mov.w	r0, #4294967295
 8008a36:	b005      	add	sp, #20
 8008a38:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8008a3c:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8008a40:	493c      	ldr	r1, [pc, #240]	; (8008b34 <_printf_i+0x23c>)
 8008a42:	6822      	ldr	r2, [r4, #0]
 8008a44:	6818      	ldr	r0, [r3, #0]
 8008a46:	f012 0f80 	tst.w	r2, #128	; 0x80
 8008a4a:	f100 0504 	add.w	r5, r0, #4
 8008a4e:	601d      	str	r5, [r3, #0]
 8008a50:	d001      	beq.n	8008a56 <_printf_i+0x15e>
 8008a52:	6803      	ldr	r3, [r0, #0]
 8008a54:	e002      	b.n	8008a5c <_printf_i+0x164>
 8008a56:	0655      	lsls	r5, r2, #25
 8008a58:	d5fb      	bpl.n	8008a52 <_printf_i+0x15a>
 8008a5a:	8803      	ldrh	r3, [r0, #0]
 8008a5c:	07d0      	lsls	r0, r2, #31
 8008a5e:	bf44      	itt	mi
 8008a60:	f042 0220 	orrmi.w	r2, r2, #32
 8008a64:	6022      	strmi	r2, [r4, #0]
 8008a66:	b91b      	cbnz	r3, 8008a70 <_printf_i+0x178>
 8008a68:	6822      	ldr	r2, [r4, #0]
 8008a6a:	f022 0220 	bic.w	r2, r2, #32
 8008a6e:	6022      	str	r2, [r4, #0]
 8008a70:	2210      	movs	r2, #16
 8008a72:	e7b1      	b.n	80089d8 <_printf_i+0xe0>
 8008a74:	4675      	mov	r5, lr
 8008a76:	fbb3 f0f2 	udiv	r0, r3, r2
 8008a7a:	fb02 3310 	mls	r3, r2, r0, r3
 8008a7e:	5ccb      	ldrb	r3, [r1, r3]
 8008a80:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8008a84:	4603      	mov	r3, r0
 8008a86:	2800      	cmp	r0, #0
 8008a88:	d1f5      	bne.n	8008a76 <_printf_i+0x17e>
 8008a8a:	e7b7      	b.n	80089fc <_printf_i+0x104>
 8008a8c:	6808      	ldr	r0, [r1, #0]
 8008a8e:	681a      	ldr	r2, [r3, #0]
 8008a90:	f010 0f80 	tst.w	r0, #128	; 0x80
 8008a94:	6949      	ldr	r1, [r1, #20]
 8008a96:	d004      	beq.n	8008aa2 <_printf_i+0x1aa>
 8008a98:	1d10      	adds	r0, r2, #4
 8008a9a:	6018      	str	r0, [r3, #0]
 8008a9c:	6813      	ldr	r3, [r2, #0]
 8008a9e:	6019      	str	r1, [r3, #0]
 8008aa0:	e007      	b.n	8008ab2 <_printf_i+0x1ba>
 8008aa2:	f010 0f40 	tst.w	r0, #64	; 0x40
 8008aa6:	f102 0004 	add.w	r0, r2, #4
 8008aaa:	6018      	str	r0, [r3, #0]
 8008aac:	6813      	ldr	r3, [r2, #0]
 8008aae:	d0f6      	beq.n	8008a9e <_printf_i+0x1a6>
 8008ab0:	8019      	strh	r1, [r3, #0]
 8008ab2:	2300      	movs	r3, #0
 8008ab4:	4675      	mov	r5, lr
 8008ab6:	6123      	str	r3, [r4, #16]
 8008ab8:	e7b1      	b.n	8008a1e <_printf_i+0x126>
 8008aba:	681a      	ldr	r2, [r3, #0]
 8008abc:	1d11      	adds	r1, r2, #4
 8008abe:	6019      	str	r1, [r3, #0]
 8008ac0:	6815      	ldr	r5, [r2, #0]
 8008ac2:	2100      	movs	r1, #0
 8008ac4:	6862      	ldr	r2, [r4, #4]
 8008ac6:	4628      	mov	r0, r5
 8008ac8:	f000 f8e0 	bl	8008c8c <memchr>
 8008acc:	b108      	cbz	r0, 8008ad2 <_printf_i+0x1da>
 8008ace:	1b40      	subs	r0, r0, r5
 8008ad0:	6060      	str	r0, [r4, #4]
 8008ad2:	6863      	ldr	r3, [r4, #4]
 8008ad4:	6123      	str	r3, [r4, #16]
 8008ad6:	2300      	movs	r3, #0
 8008ad8:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8008adc:	e79f      	b.n	8008a1e <_printf_i+0x126>
 8008ade:	6923      	ldr	r3, [r4, #16]
 8008ae0:	462a      	mov	r2, r5
 8008ae2:	4639      	mov	r1, r7
 8008ae4:	4630      	mov	r0, r6
 8008ae6:	47c0      	blx	r8
 8008ae8:	3001      	adds	r0, #1
 8008aea:	d0a2      	beq.n	8008a32 <_printf_i+0x13a>
 8008aec:	6823      	ldr	r3, [r4, #0]
 8008aee:	079b      	lsls	r3, r3, #30
 8008af0:	d507      	bpl.n	8008b02 <_printf_i+0x20a>
 8008af2:	2500      	movs	r5, #0
 8008af4:	f104 0919 	add.w	r9, r4, #25
 8008af8:	68e3      	ldr	r3, [r4, #12]
 8008afa:	9a03      	ldr	r2, [sp, #12]
 8008afc:	1a9b      	subs	r3, r3, r2
 8008afe:	429d      	cmp	r5, r3
 8008b00:	db05      	blt.n	8008b0e <_printf_i+0x216>
 8008b02:	68e0      	ldr	r0, [r4, #12]
 8008b04:	9b03      	ldr	r3, [sp, #12]
 8008b06:	4298      	cmp	r0, r3
 8008b08:	bfb8      	it	lt
 8008b0a:	4618      	movlt	r0, r3
 8008b0c:	e793      	b.n	8008a36 <_printf_i+0x13e>
 8008b0e:	2301      	movs	r3, #1
 8008b10:	464a      	mov	r2, r9
 8008b12:	4639      	mov	r1, r7
 8008b14:	4630      	mov	r0, r6
 8008b16:	47c0      	blx	r8
 8008b18:	3001      	adds	r0, #1
 8008b1a:	d08a      	beq.n	8008a32 <_printf_i+0x13a>
 8008b1c:	3501      	adds	r5, #1
 8008b1e:	e7eb      	b.n	8008af8 <_printf_i+0x200>
 8008b20:	2b00      	cmp	r3, #0
 8008b22:	d1a7      	bne.n	8008a74 <_printf_i+0x17c>
 8008b24:	780b      	ldrb	r3, [r1, #0]
 8008b26:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8008b2a:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8008b2e:	e765      	b.n	80089fc <_printf_i+0x104>
 8008b30:	08008f5e 	.word	0x08008f5e
 8008b34:	08008f4d 	.word	0x08008f4d

08008b38 <_sbrk_r>:
 8008b38:	b538      	push	{r3, r4, r5, lr}
 8008b3a:	2300      	movs	r3, #0
 8008b3c:	4c05      	ldr	r4, [pc, #20]	; (8008b54 <_sbrk_r+0x1c>)
 8008b3e:	4605      	mov	r5, r0
 8008b40:	4608      	mov	r0, r1
 8008b42:	6023      	str	r3, [r4, #0]
 8008b44:	f000 f8ec 	bl	8008d20 <_sbrk>
 8008b48:	1c43      	adds	r3, r0, #1
 8008b4a:	d102      	bne.n	8008b52 <_sbrk_r+0x1a>
 8008b4c:	6823      	ldr	r3, [r4, #0]
 8008b4e:	b103      	cbz	r3, 8008b52 <_sbrk_r+0x1a>
 8008b50:	602b      	str	r3, [r5, #0]
 8008b52:	bd38      	pop	{r3, r4, r5, pc}
 8008b54:	20000860 	.word	0x20000860

08008b58 <__sread>:
 8008b58:	b510      	push	{r4, lr}
 8008b5a:	460c      	mov	r4, r1
 8008b5c:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8008b60:	f000 f8a4 	bl	8008cac <_read_r>
 8008b64:	2800      	cmp	r0, #0
 8008b66:	bfab      	itete	ge
 8008b68:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 8008b6a:	89a3      	ldrhlt	r3, [r4, #12]
 8008b6c:	181b      	addge	r3, r3, r0
 8008b6e:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 8008b72:	bfac      	ite	ge
 8008b74:	6563      	strge	r3, [r4, #84]	; 0x54
 8008b76:	81a3      	strhlt	r3, [r4, #12]
 8008b78:	bd10      	pop	{r4, pc}

08008b7a <__swrite>:
 8008b7a:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8008b7e:	461f      	mov	r7, r3
 8008b80:	898b      	ldrh	r3, [r1, #12]
 8008b82:	4605      	mov	r5, r0
 8008b84:	05db      	lsls	r3, r3, #23
 8008b86:	460c      	mov	r4, r1
 8008b88:	4616      	mov	r6, r2
 8008b8a:	d505      	bpl.n	8008b98 <__swrite+0x1e>
 8008b8c:	2302      	movs	r3, #2
 8008b8e:	2200      	movs	r2, #0
 8008b90:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8008b94:	f000 f868 	bl	8008c68 <_lseek_r>
 8008b98:	89a3      	ldrh	r3, [r4, #12]
 8008b9a:	4632      	mov	r2, r6
 8008b9c:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 8008ba0:	81a3      	strh	r3, [r4, #12]
 8008ba2:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8008ba6:	463b      	mov	r3, r7
 8008ba8:	4628      	mov	r0, r5
 8008baa:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8008bae:	f000 b817 	b.w	8008be0 <_write_r>

08008bb2 <__sseek>:
 8008bb2:	b510      	push	{r4, lr}
 8008bb4:	460c      	mov	r4, r1
 8008bb6:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8008bba:	f000 f855 	bl	8008c68 <_lseek_r>
 8008bbe:	1c43      	adds	r3, r0, #1
 8008bc0:	89a3      	ldrh	r3, [r4, #12]
 8008bc2:	bf15      	itete	ne
 8008bc4:	6560      	strne	r0, [r4, #84]	; 0x54
 8008bc6:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 8008bca:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 8008bce:	81a3      	strheq	r3, [r4, #12]
 8008bd0:	bf18      	it	ne
 8008bd2:	81a3      	strhne	r3, [r4, #12]
 8008bd4:	bd10      	pop	{r4, pc}

08008bd6 <__sclose>:
 8008bd6:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8008bda:	f000 b813 	b.w	8008c04 <_close_r>
	...

08008be0 <_write_r>:
 8008be0:	b538      	push	{r3, r4, r5, lr}
 8008be2:	4605      	mov	r5, r0
 8008be4:	4608      	mov	r0, r1
 8008be6:	4611      	mov	r1, r2
 8008be8:	2200      	movs	r2, #0
 8008bea:	4c05      	ldr	r4, [pc, #20]	; (8008c00 <_write_r+0x20>)
 8008bec:	6022      	str	r2, [r4, #0]
 8008bee:	461a      	mov	r2, r3
 8008bf0:	f7fe f9f8 	bl	8006fe4 <_write>
 8008bf4:	1c43      	adds	r3, r0, #1
 8008bf6:	d102      	bne.n	8008bfe <_write_r+0x1e>
 8008bf8:	6823      	ldr	r3, [r4, #0]
 8008bfa:	b103      	cbz	r3, 8008bfe <_write_r+0x1e>
 8008bfc:	602b      	str	r3, [r5, #0]
 8008bfe:	bd38      	pop	{r3, r4, r5, pc}
 8008c00:	20000860 	.word	0x20000860

08008c04 <_close_r>:
 8008c04:	b538      	push	{r3, r4, r5, lr}
 8008c06:	2300      	movs	r3, #0
 8008c08:	4c05      	ldr	r4, [pc, #20]	; (8008c20 <_close_r+0x1c>)
 8008c0a:	4605      	mov	r5, r0
 8008c0c:	4608      	mov	r0, r1
 8008c0e:	6023      	str	r3, [r4, #0]
 8008c10:	f000 f85e 	bl	8008cd0 <_close>
 8008c14:	1c43      	adds	r3, r0, #1
 8008c16:	d102      	bne.n	8008c1e <_close_r+0x1a>
 8008c18:	6823      	ldr	r3, [r4, #0]
 8008c1a:	b103      	cbz	r3, 8008c1e <_close_r+0x1a>
 8008c1c:	602b      	str	r3, [r5, #0]
 8008c1e:	bd38      	pop	{r3, r4, r5, pc}
 8008c20:	20000860 	.word	0x20000860

08008c24 <_fstat_r>:
 8008c24:	b538      	push	{r3, r4, r5, lr}
 8008c26:	2300      	movs	r3, #0
 8008c28:	4c06      	ldr	r4, [pc, #24]	; (8008c44 <_fstat_r+0x20>)
 8008c2a:	4605      	mov	r5, r0
 8008c2c:	4608      	mov	r0, r1
 8008c2e:	4611      	mov	r1, r2
 8008c30:	6023      	str	r3, [r4, #0]
 8008c32:	f000 f855 	bl	8008ce0 <_fstat>
 8008c36:	1c43      	adds	r3, r0, #1
 8008c38:	d102      	bne.n	8008c40 <_fstat_r+0x1c>
 8008c3a:	6823      	ldr	r3, [r4, #0]
 8008c3c:	b103      	cbz	r3, 8008c40 <_fstat_r+0x1c>
 8008c3e:	602b      	str	r3, [r5, #0]
 8008c40:	bd38      	pop	{r3, r4, r5, pc}
 8008c42:	bf00      	nop
 8008c44:	20000860 	.word	0x20000860

08008c48 <_isatty_r>:
 8008c48:	b538      	push	{r3, r4, r5, lr}
 8008c4a:	2300      	movs	r3, #0
 8008c4c:	4c05      	ldr	r4, [pc, #20]	; (8008c64 <_isatty_r+0x1c>)
 8008c4e:	4605      	mov	r5, r0
 8008c50:	4608      	mov	r0, r1
 8008c52:	6023      	str	r3, [r4, #0]
 8008c54:	f000 f84c 	bl	8008cf0 <_isatty>
 8008c58:	1c43      	adds	r3, r0, #1
 8008c5a:	d102      	bne.n	8008c62 <_isatty_r+0x1a>
 8008c5c:	6823      	ldr	r3, [r4, #0]
 8008c5e:	b103      	cbz	r3, 8008c62 <_isatty_r+0x1a>
 8008c60:	602b      	str	r3, [r5, #0]
 8008c62:	bd38      	pop	{r3, r4, r5, pc}
 8008c64:	20000860 	.word	0x20000860

08008c68 <_lseek_r>:
 8008c68:	b538      	push	{r3, r4, r5, lr}
 8008c6a:	4605      	mov	r5, r0
 8008c6c:	4608      	mov	r0, r1
 8008c6e:	4611      	mov	r1, r2
 8008c70:	2200      	movs	r2, #0
 8008c72:	4c05      	ldr	r4, [pc, #20]	; (8008c88 <_lseek_r+0x20>)
 8008c74:	6022      	str	r2, [r4, #0]
 8008c76:	461a      	mov	r2, r3
 8008c78:	f000 f842 	bl	8008d00 <_lseek>
 8008c7c:	1c43      	adds	r3, r0, #1
 8008c7e:	d102      	bne.n	8008c86 <_lseek_r+0x1e>
 8008c80:	6823      	ldr	r3, [r4, #0]
 8008c82:	b103      	cbz	r3, 8008c86 <_lseek_r+0x1e>
 8008c84:	602b      	str	r3, [r5, #0]
 8008c86:	bd38      	pop	{r3, r4, r5, pc}
 8008c88:	20000860 	.word	0x20000860

08008c8c <memchr>:
 8008c8c:	b510      	push	{r4, lr}
 8008c8e:	b2c9      	uxtb	r1, r1
 8008c90:	4402      	add	r2, r0
 8008c92:	4290      	cmp	r0, r2
 8008c94:	4603      	mov	r3, r0
 8008c96:	d101      	bne.n	8008c9c <memchr+0x10>
 8008c98:	2000      	movs	r0, #0
 8008c9a:	bd10      	pop	{r4, pc}
 8008c9c:	781c      	ldrb	r4, [r3, #0]
 8008c9e:	3001      	adds	r0, #1
 8008ca0:	428c      	cmp	r4, r1
 8008ca2:	d1f6      	bne.n	8008c92 <memchr+0x6>
 8008ca4:	4618      	mov	r0, r3
 8008ca6:	bd10      	pop	{r4, pc}

08008ca8 <__malloc_lock>:
 8008ca8:	4770      	bx	lr

08008caa <__malloc_unlock>:
 8008caa:	4770      	bx	lr

08008cac <_read_r>:
 8008cac:	b538      	push	{r3, r4, r5, lr}
 8008cae:	4605      	mov	r5, r0
 8008cb0:	4608      	mov	r0, r1
 8008cb2:	4611      	mov	r1, r2
 8008cb4:	2200      	movs	r2, #0
 8008cb6:	4c05      	ldr	r4, [pc, #20]	; (8008ccc <_read_r+0x20>)
 8008cb8:	6022      	str	r2, [r4, #0]
 8008cba:	461a      	mov	r2, r3
 8008cbc:	f000 f828 	bl	8008d10 <_read>
 8008cc0:	1c43      	adds	r3, r0, #1
 8008cc2:	d102      	bne.n	8008cca <_read_r+0x1e>
 8008cc4:	6823      	ldr	r3, [r4, #0]
 8008cc6:	b103      	cbz	r3, 8008cca <_read_r+0x1e>
 8008cc8:	602b      	str	r3, [r5, #0]
 8008cca:	bd38      	pop	{r3, r4, r5, pc}
 8008ccc:	20000860 	.word	0x20000860

08008cd0 <_close>:
 8008cd0:	2258      	movs	r2, #88	; 0x58
 8008cd2:	4b02      	ldr	r3, [pc, #8]	; (8008cdc <_close+0xc>)
 8008cd4:	f04f 30ff 	mov.w	r0, #4294967295
 8008cd8:	601a      	str	r2, [r3, #0]
 8008cda:	4770      	bx	lr
 8008cdc:	20000860 	.word	0x20000860

08008ce0 <_fstat>:
 8008ce0:	2258      	movs	r2, #88	; 0x58
 8008ce2:	4b02      	ldr	r3, [pc, #8]	; (8008cec <_fstat+0xc>)
 8008ce4:	f04f 30ff 	mov.w	r0, #4294967295
 8008ce8:	601a      	str	r2, [r3, #0]
 8008cea:	4770      	bx	lr
 8008cec:	20000860 	.word	0x20000860

08008cf0 <_isatty>:
 8008cf0:	2258      	movs	r2, #88	; 0x58
 8008cf2:	4b02      	ldr	r3, [pc, #8]	; (8008cfc <_isatty+0xc>)
 8008cf4:	2000      	movs	r0, #0
 8008cf6:	601a      	str	r2, [r3, #0]
 8008cf8:	4770      	bx	lr
 8008cfa:	bf00      	nop
 8008cfc:	20000860 	.word	0x20000860

08008d00 <_lseek>:
 8008d00:	2258      	movs	r2, #88	; 0x58
 8008d02:	4b02      	ldr	r3, [pc, #8]	; (8008d0c <_lseek+0xc>)
 8008d04:	f04f 30ff 	mov.w	r0, #4294967295
 8008d08:	601a      	str	r2, [r3, #0]
 8008d0a:	4770      	bx	lr
 8008d0c:	20000860 	.word	0x20000860

08008d10 <_read>:
 8008d10:	2258      	movs	r2, #88	; 0x58
 8008d12:	4b02      	ldr	r3, [pc, #8]	; (8008d1c <_read+0xc>)
 8008d14:	f04f 30ff 	mov.w	r0, #4294967295
 8008d18:	601a      	str	r2, [r3, #0]
 8008d1a:	4770      	bx	lr
 8008d1c:	20000860 	.word	0x20000860

08008d20 <_sbrk>:
 8008d20:	4b04      	ldr	r3, [pc, #16]	; (8008d34 <_sbrk+0x14>)
 8008d22:	4602      	mov	r2, r0
 8008d24:	6819      	ldr	r1, [r3, #0]
 8008d26:	b909      	cbnz	r1, 8008d2c <_sbrk+0xc>
 8008d28:	4903      	ldr	r1, [pc, #12]	; (8008d38 <_sbrk+0x18>)
 8008d2a:	6019      	str	r1, [r3, #0]
 8008d2c:	6818      	ldr	r0, [r3, #0]
 8008d2e:	4402      	add	r2, r0
 8008d30:	601a      	str	r2, [r3, #0]
 8008d32:	4770      	bx	lr
 8008d34:	2000042c 	.word	0x2000042c
 8008d38:	20000864 	.word	0x20000864

08008d3c <_init>:
 8008d3c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8008d3e:	bf00      	nop
 8008d40:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8008d42:	bc08      	pop	{r3}
 8008d44:	469e      	mov	lr, r3
 8008d46:	4770      	bx	lr

08008d48 <_fini>:
 8008d48:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8008d4a:	bf00      	nop
 8008d4c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8008d4e:	bc08      	pop	{r3}
 8008d50:	469e      	mov	lr, r3
 8008d52:	4770      	bx	lr