STM32F103_RGB_Controller.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00004c78 080041e4 080041e4 000041e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000314 08008e5c 08008e5c 00008e5c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08009170 08009170 00009170 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08009174 08009174 00009174 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000078 20000000 08009178 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 000009bc 20000078 080091f0 00010078 2**2 ALLOC 7 ._user_heap_stack 00000600 20000a34 080091f0 00010a34 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00010078 2**0 CONTENTS, READONLY 9 .debug_info 0001fdcc 00000000 00000000 000100a1 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00003b1b 00000000 00000000 0002fe6d 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000ab33 00000000 00000000 00033988 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000d60 00000000 00000000 0003e4c0 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00001530 00000000 00000000 0003f220 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00008983 00000000 00000000 00040750 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00005221 00000000 00000000 000490d3 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0004e2f4 2**0 CONTENTS, READONLY 17 .debug_frame 0000313c 00000000 00000000 0004e370 2**2 CONTENTS, READONLY, DEBUGGING 18 .stab 00000084 00000000 00000000 000514ac 2**2 CONTENTS, READONLY, DEBUGGING 19 .stabstr 00000117 00000000 00000000 00051530 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080041e4 <__do_global_dtors_aux>: 80041e4: b510 push {r4, lr} 80041e6: 4c05 ldr r4, [pc, #20] ; (80041fc <__do_global_dtors_aux+0x18>) 80041e8: 7823 ldrb r3, [r4, #0] 80041ea: b933 cbnz r3, 80041fa <__do_global_dtors_aux+0x16> 80041ec: 4b04 ldr r3, [pc, #16] ; (8004200 <__do_global_dtors_aux+0x1c>) 80041ee: b113 cbz r3, 80041f6 <__do_global_dtors_aux+0x12> 80041f0: 4804 ldr r0, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x20>) 80041f2: f3af 8000 nop.w 80041f6: 2301 movs r3, #1 80041f8: 7023 strb r3, [r4, #0] 80041fa: bd10 pop {r4, pc} 80041fc: 20000078 .word 0x20000078 8004200: 00000000 .word 0x00000000 8004204: 08008e44 .word 0x08008e44 08004208 : 8004208: b508 push {r3, lr} 800420a: 4b03 ldr r3, [pc, #12] ; (8004218 ) 800420c: b11b cbz r3, 8004216 800420e: 4903 ldr r1, [pc, #12] ; (800421c ) 8004210: 4803 ldr r0, [pc, #12] ; (8004220 ) 8004212: f3af 8000 nop.w 8004216: bd08 pop {r3, pc} 8004218: 00000000 .word 0x00000000 800421c: 2000007c .word 0x2000007c 8004220: 08008e44 .word 0x08008e44 08004224 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8004224: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8004226: 4b0e ldr r3, [pc, #56] ; (8004260 ) { 8004228: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800422a: 7818 ldrb r0, [r3, #0] 800422c: f44f 737a mov.w r3, #1000 ; 0x3e8 8004230: fbb3 f3f0 udiv r3, r3, r0 8004234: 4a0b ldr r2, [pc, #44] ; (8004264 ) 8004236: 6810 ldr r0, [r2, #0] 8004238: fbb0 f0f3 udiv r0, r0, r3 800423c: f000 f89e bl 800437c 8004240: 4604 mov r4, r0 8004242: b958 cbnz r0, 800425c { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8004244: 2d0f cmp r5, #15 8004246: d809 bhi.n 800425c { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8004248: 4602 mov r2, r0 800424a: 4629 mov r1, r5 800424c: f04f 30ff mov.w r0, #4294967295 8004250: f000 f854 bl 80042fc uwTickPrio = TickPriority; 8004254: 4b04 ldr r3, [pc, #16] ; (8004268 ) 8004256: 4620 mov r0, r4 8004258: 601d str r5, [r3, #0] 800425a: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 800425c: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 800425e: bd38 pop {r3, r4, r5, pc} 8004260: 20000000 .word 0x20000000 8004264: 20000010 .word 0x20000010 8004268: 20000004 .word 0x20000004 0800426c : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800426c: 4a07 ldr r2, [pc, #28] ; (800428c ) { 800426e: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004270: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8004272: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004274: f043 0310 orr.w r3, r3, #16 8004278: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800427a: f000 f82d bl 80042d8 HAL_InitTick(TICK_INT_PRIORITY); 800427e: 2000 movs r0, #0 8004280: f7ff ffd0 bl 8004224 HAL_MspInit(); 8004284: f003 fbe2 bl 8007a4c } 8004288: 2000 movs r0, #0 800428a: bd08 pop {r3, pc} 800428c: 40022000 .word 0x40022000 08004290 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 8004290: 4a03 ldr r2, [pc, #12] ; (80042a0 ) 8004292: 4b04 ldr r3, [pc, #16] ; (80042a4 ) 8004294: 6811 ldr r1, [r2, #0] 8004296: 781b ldrb r3, [r3, #0] 8004298: 440b add r3, r1 800429a: 6013 str r3, [r2, #0] 800429c: 4770 bx lr 800429e: bf00 nop 80042a0: 200005b0 .word 0x200005b0 80042a4: 20000000 .word 0x20000000 080042a8 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80042a8: 4b01 ldr r3, [pc, #4] ; (80042b0 ) 80042aa: 6818 ldr r0, [r3, #0] } 80042ac: 4770 bx lr 80042ae: bf00 nop 80042b0: 200005b0 .word 0x200005b0 080042b4 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80042b4: b538 push {r3, r4, r5, lr} 80042b6: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80042b8: f7ff fff6 bl 80042a8 80042bc: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80042be: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80042c0: bf1e ittt ne 80042c2: 4b04 ldrne r3, [pc, #16] ; (80042d4 ) 80042c4: 781b ldrbne r3, [r3, #0] 80042c6: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80042c8: f7ff ffee bl 80042a8 80042cc: 1b40 subs r0, r0, r5 80042ce: 4284 cmp r4, r0 80042d0: d8fa bhi.n 80042c8 { } } 80042d2: bd38 pop {r3, r4, r5, pc} 80042d4: 20000000 .word 0x20000000 080042d8 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80042d8: 4a07 ldr r2, [pc, #28] ; (80042f8 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042da: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80042dc: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042de: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80042e2: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80042e6: 041b lsls r3, r3, #16 80042e8: 0c1b lsrs r3, r3, #16 80042ea: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80042ee: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 80042f2: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 80042f4: 60d3 str r3, [r2, #12] 80042f6: 4770 bx lr 80042f8: e000ed00 .word 0xe000ed00 080042fc : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80042fc: 4b17 ldr r3, [pc, #92] ; (800435c ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 80042fe: b530 push {r4, r5, lr} 8004300: 68dc ldr r4, [r3, #12] 8004302: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8004306: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800430a: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800430c: 2b04 cmp r3, #4 800430e: bf28 it cs 8004310: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004312: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004314: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004318: bf98 it ls 800431a: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800431c: fa05 f303 lsl.w r3, r5, r3 8004320: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004324: bf88 it hi 8004326: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004328: 4019 ands r1, r3 800432a: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 800432c: fa05 f404 lsl.w r4, r5, r4 8004330: 3c01 subs r4, #1 8004332: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8004334: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004336: ea42 0201 orr.w r2, r2, r1 800433a: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800433e: bfaf iteee ge 8004340: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004344: 4b06 ldrlt r3, [pc, #24] ; (8004360 ) 8004346: f000 000f andlt.w r0, r0, #15 800434a: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800434c: bfa5 ittet ge 800434e: b2d2 uxtbge r2, r2 8004350: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004354: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004356: f880 2300 strbge.w r2, [r0, #768] ; 0x300 800435a: bd30 pop {r4, r5, pc} 800435c: e000ed00 .word 0xe000ed00 8004360: e000ed14 .word 0xe000ed14 08004364 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 8004364: 2301 movs r3, #1 8004366: 0942 lsrs r2, r0, #5 8004368: f000 001f and.w r0, r0, #31 800436c: fa03 f000 lsl.w r0, r3, r0 8004370: 4b01 ldr r3, [pc, #4] ; (8004378 ) 8004372: f843 0022 str.w r0, [r3, r2, lsl #2] 8004376: 4770 bx lr 8004378: e000e100 .word 0xe000e100 0800437c : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 800437c: 3801 subs r0, #1 800437e: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8004382: d20a bcs.n 800439a SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004384: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8004386: 4b06 ldr r3, [pc, #24] ; (80043a0 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004388: 4a06 ldr r2, [pc, #24] ; (80043a4 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800438a: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800438c: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8004390: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8004392: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8004394: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8004396: 601a str r2, [r3, #0] 8004398: 4770 bx lr return (1UL); /* Reload value impossible */ 800439a: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 800439c: 4770 bx lr 800439e: bf00 nop 80043a0: e000e010 .word 0xe000e010 80043a4: e000ed00 .word 0xe000ed00 080043a8 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 80043a8: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 80043aa: 2800 cmp r0, #0 80043ac: d032 beq.n 8004414 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80043ae: 6801 ldr r1, [r0, #0] 80043b0: 4b19 ldr r3, [pc, #100] ; (8004418 ) 80043b2: 2414 movs r4, #20 80043b4: 4299 cmp r1, r3 80043b6: d825 bhi.n 8004404 { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80043b8: 4a18 ldr r2, [pc, #96] ; (800441c ) hdma->DmaBaseAddress = DMA1; 80043ba: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80043be: 440a add r2, r1 80043c0: fbb2 f2f4 udiv r2, r2, r4 80043c4: 0092 lsls r2, r2, #2 80043c6: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80043c8: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80043ca: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80043cc: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80043ce: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80043d0: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80043d2: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80043d4: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80043d8: 4323 orrs r3, r4 80043da: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80043dc: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80043e0: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80043e2: 6944 ldr r4, [r0, #20] 80043e4: 4323 orrs r3, r4 80043e6: 6984 ldr r4, [r0, #24] 80043e8: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 80043ea: 69c4 ldr r4, [r0, #28] 80043ec: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 80043ee: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 80043f0: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 80043f2: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80043f4: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 80043f6: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80043fa: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 80043fc: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 8004400: 4618 mov r0, r3 8004402: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 8004404: 4b06 ldr r3, [pc, #24] ; (8004420 ) 8004406: 440b add r3, r1 8004408: fbb3 f3f4 udiv r3, r3, r4 800440c: 009b lsls r3, r3, #2 800440e: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8004410: 4b04 ldr r3, [pc, #16] ; (8004424 ) 8004412: e7d9 b.n 80043c8 return HAL_ERROR; 8004414: 2001 movs r0, #1 } 8004416: bd10 pop {r4, pc} 8004418: 40020407 .word 0x40020407 800441c: bffdfff8 .word 0xbffdfff8 8004420: bffdfbf8 .word 0xbffdfbf8 8004424: 40020400 .word 0x40020400 08004428 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8004428: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 800442a: f890 4020 ldrb.w r4, [r0, #32] 800442e: 2c01 cmp r4, #1 8004430: d035 beq.n 800449e 8004432: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 8004434: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 8004438: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 800443c: 42a5 cmp r5, r4 800443e: f04f 0600 mov.w r6, #0 8004442: f04f 0402 mov.w r4, #2 8004446: d128 bne.n 800449a { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8004448: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 800444c: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 800444e: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8004450: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8004452: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 8004454: f026 0601 bic.w r6, r6, #1 8004458: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800445a: 6bc6 ldr r6, [r0, #60] ; 0x3c 800445c: 40bd lsls r5, r7 800445e: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8004460: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8004462: 6843 ldr r3, [r0, #4] 8004464: 6805 ldr r5, [r0, #0] 8004466: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 8004468: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 800446a: bf0b itete eq 800446c: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 800446e: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8004470: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 8004472: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 8004474: b14b cbz r3, 800448a __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004476: 6823 ldr r3, [r4, #0] 8004478: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 800447c: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 800447e: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8004480: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 8004482: f043 0301 orr.w r3, r3, #1 8004486: 602b str r3, [r5, #0] 8004488: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 800448a: 6823 ldr r3, [r4, #0] 800448c: f023 0304 bic.w r3, r3, #4 8004490: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8004492: 6823 ldr r3, [r4, #0] 8004494: f043 030a orr.w r3, r3, #10 8004498: e7f0 b.n 800447c __HAL_UNLOCK(hdma); 800449a: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 800449e: 2002 movs r0, #2 } 80044a0: bdf0 pop {r4, r5, r6, r7, pc} ... 080044a4 : if(HAL_DMA_STATE_BUSY != hdma->State) 80044a4: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80044a8: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80044aa: 2b02 cmp r3, #2 80044ac: d003 beq.n 80044b6 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80044ae: 2304 movs r3, #4 80044b0: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80044b2: 2001 movs r0, #1 80044b4: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80044b6: 6803 ldr r3, [r0, #0] 80044b8: 681a ldr r2, [r3, #0] 80044ba: f022 020e bic.w r2, r2, #14 80044be: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80044c0: 681a ldr r2, [r3, #0] 80044c2: f022 0201 bic.w r2, r2, #1 80044c6: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80044c8: 4a29 ldr r2, [pc, #164] ; (8004570 ) 80044ca: 4293 cmp r3, r2 80044cc: d924 bls.n 8004518 80044ce: f502 7262 add.w r2, r2, #904 ; 0x388 80044d2: 4293 cmp r3, r2 80044d4: d019 beq.n 800450a 80044d6: 3214 adds r2, #20 80044d8: 4293 cmp r3, r2 80044da: d018 beq.n 800450e 80044dc: 3214 adds r2, #20 80044de: 4293 cmp r3, r2 80044e0: d017 beq.n 8004512 80044e2: 3214 adds r2, #20 80044e4: 4293 cmp r3, r2 80044e6: bf0c ite eq 80044e8: f44f 5380 moveq.w r3, #4096 ; 0x1000 80044ec: f44f 3380 movne.w r3, #65536 ; 0x10000 80044f0: 4a20 ldr r2, [pc, #128] ; (8004574 ) 80044f2: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 80044f4: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 80044f6: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 80044f8: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 80044fc: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 80044fe: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 8004502: b39b cbz r3, 800456c hdma->XferAbortCallback(hdma); 8004504: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8004506: 4620 mov r0, r4 8004508: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 800450a: 2301 movs r3, #1 800450c: e7f0 b.n 80044f0 800450e: 2310 movs r3, #16 8004510: e7ee b.n 80044f0 8004512: f44f 7380 mov.w r3, #256 ; 0x100 8004516: e7eb b.n 80044f0 8004518: 4917 ldr r1, [pc, #92] ; (8004578 ) 800451a: 428b cmp r3, r1 800451c: d016 beq.n 800454c 800451e: 3114 adds r1, #20 8004520: 428b cmp r3, r1 8004522: d015 beq.n 8004550 8004524: 3114 adds r1, #20 8004526: 428b cmp r3, r1 8004528: d014 beq.n 8004554 800452a: 3114 adds r1, #20 800452c: 428b cmp r3, r1 800452e: d014 beq.n 800455a 8004530: 3114 adds r1, #20 8004532: 428b cmp r3, r1 8004534: d014 beq.n 8004560 8004536: 3114 adds r1, #20 8004538: 428b cmp r3, r1 800453a: d014 beq.n 8004566 800453c: 4293 cmp r3, r2 800453e: bf14 ite ne 8004540: f44f 3380 movne.w r3, #65536 ; 0x10000 8004544: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8004548: 4a0c ldr r2, [pc, #48] ; (800457c ) 800454a: e7d2 b.n 80044f2 800454c: 2301 movs r3, #1 800454e: e7fb b.n 8004548 8004550: 2310 movs r3, #16 8004552: e7f9 b.n 8004548 8004554: f44f 7380 mov.w r3, #256 ; 0x100 8004558: e7f6 b.n 8004548 800455a: f44f 5380 mov.w r3, #4096 ; 0x1000 800455e: e7f3 b.n 8004548 8004560: f44f 3380 mov.w r3, #65536 ; 0x10000 8004564: e7f0 b.n 8004548 8004566: f44f 1380 mov.w r3, #1048576 ; 0x100000 800456a: e7ed b.n 8004548 HAL_StatusTypeDef status = HAL_OK; 800456c: 4618 mov r0, r3 } 800456e: bd10 pop {r4, pc} 8004570: 40020080 .word 0x40020080 8004574: 40020400 .word 0x40020400 8004578: 40020008 .word 0x40020008 800457c: 40020000 .word 0x40020000 08004580 : { 8004580: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004582: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8004584: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004586: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8004588: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 800458a: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800458c: 4095 lsls r5, r2 800458e: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 8004590: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004592: d055 beq.n 8004640 8004594: 074d lsls r5, r1, #29 8004596: d553 bpl.n 8004640 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8004598: 681a ldr r2, [r3, #0] 800459a: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 800459c: bf5e ittt pl 800459e: 681a ldrpl r2, [r3, #0] 80045a0: f022 0204 bicpl.w r2, r2, #4 80045a4: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80045a6: 4a60 ldr r2, [pc, #384] ; (8004728 ) 80045a8: 4293 cmp r3, r2 80045aa: d91f bls.n 80045ec 80045ac: f502 7262 add.w r2, r2, #904 ; 0x388 80045b0: 4293 cmp r3, r2 80045b2: d014 beq.n 80045de 80045b4: 3214 adds r2, #20 80045b6: 4293 cmp r3, r2 80045b8: d013 beq.n 80045e2 80045ba: 3214 adds r2, #20 80045bc: 4293 cmp r3, r2 80045be: d012 beq.n 80045e6 80045c0: 3214 adds r2, #20 80045c2: 4293 cmp r3, r2 80045c4: bf0c ite eq 80045c6: f44f 4380 moveq.w r3, #16384 ; 0x4000 80045ca: f44f 2380 movne.w r3, #262144 ; 0x40000 80045ce: 4a57 ldr r2, [pc, #348] ; (800472c ) 80045d0: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80045d2: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80045d4: 2b00 cmp r3, #0 80045d6: f000 80a5 beq.w 8004724 } 80045da: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80045dc: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80045de: 2304 movs r3, #4 80045e0: e7f5 b.n 80045ce 80045e2: 2340 movs r3, #64 ; 0x40 80045e4: e7f3 b.n 80045ce 80045e6: f44f 6380 mov.w r3, #1024 ; 0x400 80045ea: e7f0 b.n 80045ce 80045ec: 4950 ldr r1, [pc, #320] ; (8004730 ) 80045ee: 428b cmp r3, r1 80045f0: d016 beq.n 8004620 80045f2: 3114 adds r1, #20 80045f4: 428b cmp r3, r1 80045f6: d015 beq.n 8004624 80045f8: 3114 adds r1, #20 80045fa: 428b cmp r3, r1 80045fc: d014 beq.n 8004628 80045fe: 3114 adds r1, #20 8004600: 428b cmp r3, r1 8004602: d014 beq.n 800462e 8004604: 3114 adds r1, #20 8004606: 428b cmp r3, r1 8004608: d014 beq.n 8004634 800460a: 3114 adds r1, #20 800460c: 428b cmp r3, r1 800460e: d014 beq.n 800463a 8004610: 4293 cmp r3, r2 8004612: bf14 ite ne 8004614: f44f 2380 movne.w r3, #262144 ; 0x40000 8004618: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 800461c: 4a45 ldr r2, [pc, #276] ; (8004734 ) 800461e: e7d7 b.n 80045d0 8004620: 2304 movs r3, #4 8004622: e7fb b.n 800461c 8004624: 2340 movs r3, #64 ; 0x40 8004626: e7f9 b.n 800461c 8004628: f44f 6380 mov.w r3, #1024 ; 0x400 800462c: e7f6 b.n 800461c 800462e: f44f 4380 mov.w r3, #16384 ; 0x4000 8004632: e7f3 b.n 800461c 8004634: f44f 2380 mov.w r3, #262144 ; 0x40000 8004638: e7f0 b.n 800461c 800463a: f44f 0380 mov.w r3, #4194304 ; 0x400000 800463e: e7ed b.n 800461c else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8004640: 2502 movs r5, #2 8004642: 4095 lsls r5, r2 8004644: 4225 tst r5, r4 8004646: d057 beq.n 80046f8 8004648: 078d lsls r5, r1, #30 800464a: d555 bpl.n 80046f8 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800464c: 681a ldr r2, [r3, #0] 800464e: 0694 lsls r4, r2, #26 8004650: d406 bmi.n 8004660 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8004652: 681a ldr r2, [r3, #0] 8004654: f022 020a bic.w r2, r2, #10 8004658: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 800465a: 2201 movs r2, #1 800465c: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8004660: 4a31 ldr r2, [pc, #196] ; (8004728 ) 8004662: 4293 cmp r3, r2 8004664: d91e bls.n 80046a4 8004666: f502 7262 add.w r2, r2, #904 ; 0x388 800466a: 4293 cmp r3, r2 800466c: d013 beq.n 8004696 800466e: 3214 adds r2, #20 8004670: 4293 cmp r3, r2 8004672: d012 beq.n 800469a 8004674: 3214 adds r2, #20 8004676: 4293 cmp r3, r2 8004678: d011 beq.n 800469e 800467a: 3214 adds r2, #20 800467c: 4293 cmp r3, r2 800467e: bf0c ite eq 8004680: f44f 5300 moveq.w r3, #8192 ; 0x2000 8004684: f44f 3300 movne.w r3, #131072 ; 0x20000 8004688: 4a28 ldr r2, [pc, #160] ; (800472c ) 800468a: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 800468c: 2300 movs r3, #0 800468e: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 8004692: 6a83 ldr r3, [r0, #40] ; 0x28 8004694: e79e b.n 80045d4 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8004696: 2302 movs r3, #2 8004698: e7f6 b.n 8004688 800469a: 2320 movs r3, #32 800469c: e7f4 b.n 8004688 800469e: f44f 7300 mov.w r3, #512 ; 0x200 80046a2: e7f1 b.n 8004688 80046a4: 4922 ldr r1, [pc, #136] ; (8004730 ) 80046a6: 428b cmp r3, r1 80046a8: d016 beq.n 80046d8 80046aa: 3114 adds r1, #20 80046ac: 428b cmp r3, r1 80046ae: d015 beq.n 80046dc 80046b0: 3114 adds r1, #20 80046b2: 428b cmp r3, r1 80046b4: d014 beq.n 80046e0 80046b6: 3114 adds r1, #20 80046b8: 428b cmp r3, r1 80046ba: d014 beq.n 80046e6 80046bc: 3114 adds r1, #20 80046be: 428b cmp r3, r1 80046c0: d014 beq.n 80046ec 80046c2: 3114 adds r1, #20 80046c4: 428b cmp r3, r1 80046c6: d014 beq.n 80046f2 80046c8: 4293 cmp r3, r2 80046ca: bf14 ite ne 80046cc: f44f 3300 movne.w r3, #131072 ; 0x20000 80046d0: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80046d4: 4a17 ldr r2, [pc, #92] ; (8004734 ) 80046d6: e7d8 b.n 800468a 80046d8: 2302 movs r3, #2 80046da: e7fb b.n 80046d4 80046dc: 2320 movs r3, #32 80046de: e7f9 b.n 80046d4 80046e0: f44f 7300 mov.w r3, #512 ; 0x200 80046e4: e7f6 b.n 80046d4 80046e6: f44f 5300 mov.w r3, #8192 ; 0x2000 80046ea: e7f3 b.n 80046d4 80046ec: f44f 3300 mov.w r3, #131072 ; 0x20000 80046f0: e7f0 b.n 80046d4 80046f2: f44f 1300 mov.w r3, #2097152 ; 0x200000 80046f6: e7ed b.n 80046d4 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 80046f8: 2508 movs r5, #8 80046fa: 4095 lsls r5, r2 80046fc: 4225 tst r5, r4 80046fe: d011 beq.n 8004724 8004700: 0709 lsls r1, r1, #28 8004702: d50f bpl.n 8004724 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004704: 6819 ldr r1, [r3, #0] 8004706: f021 010e bic.w r1, r1, #14 800470a: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800470c: 2301 movs r3, #1 800470e: fa03 f202 lsl.w r2, r3, r2 8004712: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 8004714: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 8004716: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 800471a: 2300 movs r3, #0 800471c: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8004720: 6b03 ldr r3, [r0, #48] ; 0x30 8004722: e757 b.n 80045d4 } 8004724: bc70 pop {r4, r5, r6} 8004726: 4770 bx lr 8004728: 40020080 .word 0x40020080 800472c: 40020400 .word 0x40020400 8004730: 40020008 .word 0x40020008 8004734: 40020000 .word 0x40020000 08004738 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8004738: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 800473c: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800473e: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8004740: 4f6c ldr r7, [pc, #432] ; (80048f4 ) 8004742: 4b6d ldr r3, [pc, #436] ; (80048f8 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8004744: f8df e1b8 ldr.w lr, [pc, #440] ; 8004900 switch (GPIO_Init->Mode) 8004748: f8df c1b8 ldr.w ip, [pc, #440] ; 8004904 ioposition = (0x01U << position); 800474c: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8004750: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 8004752: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8004756: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 800475a: 45a0 cmp r8, r4 800475c: f040 8085 bne.w 800486a switch (GPIO_Init->Mode) 8004760: 684d ldr r5, [r1, #4] 8004762: 2d12 cmp r5, #18 8004764: f000 80b7 beq.w 80048d6 8004768: f200 808d bhi.w 8004886 800476c: 2d02 cmp r5, #2 800476e: f000 80af beq.w 80048d0 8004772: f200 8081 bhi.w 8004878 8004776: 2d00 cmp r5, #0 8004778: f000 8091 beq.w 800489e 800477c: 2d01 cmp r5, #1 800477e: f000 80a5 beq.w 80048cc MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8004782: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004786: 2cff cmp r4, #255 ; 0xff 8004788: bf93 iteet ls 800478a: 4682 movls sl, r0 800478c: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 8004790: 3d08 subhi r5, #8 8004792: f8d0 b000 ldrls.w fp, [r0] 8004796: bf92 itee ls 8004798: 00b5 lslls r5, r6, #2 800479a: f8d0 b004 ldrhi.w fp, [r0, #4] 800479e: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80047a0: fa09 f805 lsl.w r8, r9, r5 80047a4: ea2b 0808 bic.w r8, fp, r8 80047a8: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80047ac: bf88 it hi 80047ae: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80047b2: ea48 0505 orr.w r5, r8, r5 80047b6: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 80047ba: f8d1 a004 ldr.w sl, [r1, #4] 80047be: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 80047c2: d052 beq.n 800486a __HAL_RCC_AFIO_CLK_ENABLE(); 80047c4: 69bd ldr r5, [r7, #24] 80047c6: f026 0803 bic.w r8, r6, #3 80047ca: f045 0501 orr.w r5, r5, #1 80047ce: 61bd str r5, [r7, #24] 80047d0: 69bd ldr r5, [r7, #24] 80047d2: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 80047d6: f005 0501 and.w r5, r5, #1 80047da: 9501 str r5, [sp, #4] 80047dc: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80047e0: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 80047e4: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80047e6: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 80047ea: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80047ee: fa09 f90b lsl.w r9, r9, fp 80047f2: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80047f6: 4d41 ldr r5, [pc, #260] ; (80048fc ) 80047f8: 42a8 cmp r0, r5 80047fa: d071 beq.n 80048e0 80047fc: f505 6580 add.w r5, r5, #1024 ; 0x400 8004800: 42a8 cmp r0, r5 8004802: d06f beq.n 80048e4 8004804: f505 6580 add.w r5, r5, #1024 ; 0x400 8004808: 42a8 cmp r0, r5 800480a: d06d beq.n 80048e8 800480c: f505 6580 add.w r5, r5, #1024 ; 0x400 8004810: 42a8 cmp r0, r5 8004812: d06b beq.n 80048ec 8004814: f505 6580 add.w r5, r5, #1024 ; 0x400 8004818: 42a8 cmp r0, r5 800481a: d069 beq.n 80048f0 800481c: 4570 cmp r0, lr 800481e: bf0c ite eq 8004820: 2505 moveq r5, #5 8004822: 2506 movne r5, #6 8004824: fa05 f50b lsl.w r5, r5, fp 8004828: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 800482c: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8004830: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8004832: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8004836: bf14 ite ne 8004838: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 800483a: 43a5 biceq r5, r4 800483c: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 800483e: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8004840: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8004844: bf14 ite ne 8004846: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8004848: 43a5 biceq r5, r4 800484a: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 800484c: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800484e: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8004852: bf14 ite ne 8004854: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8004856: 43a5 biceq r5, r4 8004858: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 800485a: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 800485c: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8004860: bf14 ite ne 8004862: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8004864: ea25 0404 biceq.w r4, r5, r4 8004868: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 800486a: 3601 adds r6, #1 800486c: 2e10 cmp r6, #16 800486e: f47f af6d bne.w 800474c } } } } } 8004872: b003 add sp, #12 8004874: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8004878: 2d03 cmp r5, #3 800487a: d025 beq.n 80048c8 800487c: 2d11 cmp r5, #17 800487e: d180 bne.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8004880: 68ca ldr r2, [r1, #12] 8004882: 3204 adds r2, #4 break; 8004884: e77d b.n 8004782 switch (GPIO_Init->Mode) 8004886: 4565 cmp r5, ip 8004888: d009 beq.n 800489e 800488a: d812 bhi.n 80048b2 800488c: f8df 9078 ldr.w r9, [pc, #120] ; 8004908 8004890: 454d cmp r5, r9 8004892: d004 beq.n 800489e 8004894: f509 3980 add.w r9, r9, #65536 ; 0x10000 8004898: 454d cmp r5, r9 800489a: f47f af72 bne.w 8004782 if (GPIO_Init->Pull == GPIO_NOPULL) 800489e: 688a ldr r2, [r1, #8] 80048a0: b1e2 cbz r2, 80048dc else if (GPIO_Init->Pull == GPIO_PULLUP) 80048a2: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 80048a4: bf0c ite eq 80048a6: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 80048aa: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80048ae: 2208 movs r2, #8 80048b0: e767 b.n 8004782 switch (GPIO_Init->Mode) 80048b2: f8df 9058 ldr.w r9, [pc, #88] ; 800490c 80048b6: 454d cmp r5, r9 80048b8: d0f1 beq.n 800489e 80048ba: f509 3980 add.w r9, r9, #65536 ; 0x10000 80048be: 454d cmp r5, r9 80048c0: d0ed beq.n 800489e 80048c2: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 80048c6: e7e7 b.n 8004898 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80048c8: 2200 movs r2, #0 80048ca: e75a b.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 80048cc: 68ca ldr r2, [r1, #12] break; 80048ce: e758 b.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 80048d0: 68ca ldr r2, [r1, #12] 80048d2: 3208 adds r2, #8 break; 80048d4: e755 b.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80048d6: 68ca ldr r2, [r1, #12] 80048d8: 320c adds r2, #12 break; 80048da: e752 b.n 8004782 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80048dc: 2204 movs r2, #4 80048de: e750 b.n 8004782 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80048e0: 2500 movs r5, #0 80048e2: e79f b.n 8004824 80048e4: 2501 movs r5, #1 80048e6: e79d b.n 8004824 80048e8: 2502 movs r5, #2 80048ea: e79b b.n 8004824 80048ec: 2503 movs r5, #3 80048ee: e799 b.n 8004824 80048f0: 2504 movs r5, #4 80048f2: e797 b.n 8004824 80048f4: 40021000 .word 0x40021000 80048f8: 40010400 .word 0x40010400 80048fc: 40010800 .word 0x40010800 8004900: 40011c00 .word 0x40011c00 8004904: 10210000 .word 0x10210000 8004908: 10110000 .word 0x10110000 800490c: 10310000 .word 0x10310000 08004910 : GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8004910: 6883 ldr r3, [r0, #8] 8004912: 4219 tst r1, r3 else { bitstatus = GPIO_PIN_RESET; } return bitstatus; } 8004914: bf14 ite ne 8004916: 2001 movne r0, #1 8004918: 2000 moveq r0, #0 800491a: 4770 bx lr 0800491c : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 800491c: b10a cbz r2, 8004922 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 800491e: 6101 str r1, [r0, #16] 8004920: 4770 bx lr 8004922: 0409 lsls r1, r1, #16 8004924: e7fb b.n 800491e 08004926 : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 8004926: 68c3 ldr r3, [r0, #12] 8004928: 4059 eors r1, r3 800492a: 60c1 str r1, [r0, #12] 800492c: 4770 bx lr 0800492e : * @brief EXTI line detection callbacks. * @param GPIO_Pin: Specifies the pins connected EXTI line * @retval None */ __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { 800492e: 4770 bx lr 08004930 : { 8004930: b508 push {r3, lr} if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) 8004932: 4b04 ldr r3, [pc, #16] ; (8004944 ) 8004934: 6959 ldr r1, [r3, #20] 8004936: 4201 tst r1, r0 8004938: d002 beq.n 8004940 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); 800493a: 6158 str r0, [r3, #20] HAL_GPIO_EXTI_Callback(GPIO_Pin); 800493c: f7ff fff7 bl 800492e 8004940: bd08 pop {r3, pc} 8004942: bf00 nop 8004944: 40010400 .word 0x40010400 08004948 : * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8004948: 6802 ldr r2, [r0, #0] 800494a: 6953 ldr r3, [r2, #20] 800494c: f413 6380 ands.w r3, r3, #1024 ; 0x400 8004950: d00d beq.n 800496e { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8004952: f46f 6380 mvn.w r3, #1024 ; 0x400 8004956: 6153 str r3, [r2, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 8004958: 2304 movs r3, #4 hi2c->PreviousState = I2C_STATE_NONE; hi2c->State= HAL_I2C_STATE_READY; 800495a: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_AF; 800495c: 6403 str r3, [r0, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 800495e: 2300 movs r3, #0 8004960: 6303 str r3, [r0, #48] ; 0x30 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8004962: f880 303c strb.w r3, [r0, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8004966: f880 203d strb.w r2, [r0, #61] ; 0x3d return HAL_ERROR; 800496a: 2001 movs r0, #1 800496c: 4770 bx lr } return HAL_OK; 800496e: 4618 mov r0, r3 } 8004970: 4770 bx lr 08004972 : { 8004972: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8004976: 4604 mov r4, r0 8004978: 4617 mov r7, r2 800497a: 4699 mov r9, r3 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 800497c: f3c1 4807 ubfx r8, r1, #16, #8 8004980: b28e uxth r6, r1 8004982: 6825 ldr r5, [r4, #0] 8004984: f1b8 0f01 cmp.w r8, #1 8004988: bf0c ite eq 800498a: 696b ldreq r3, [r5, #20] 800498c: 69ab ldrne r3, [r5, #24] 800498e: ea36 0303 bics.w r3, r6, r3 8004992: bf14 ite ne 8004994: 2001 movne r0, #1 8004996: 2000 moveq r0, #0 8004998: b908 cbnz r0, 800499e } 800499a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 800499e: 696b ldr r3, [r5, #20] 80049a0: 055a lsls r2, r3, #21 80049a2: d512 bpl.n 80049ca hi2c->Instance->CR1 |= I2C_CR1_STOP; 80049a4: 682b ldr r3, [r5, #0] hi2c->State= HAL_I2C_STATE_READY; 80049a6: 2220 movs r2, #32 hi2c->Instance->CR1 |= I2C_CR1_STOP; 80049a8: f443 7300 orr.w r3, r3, #512 ; 0x200 80049ac: 602b str r3, [r5, #0] __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 80049ae: f46f 6380 mvn.w r3, #1024 ; 0x400 80049b2: 616b str r3, [r5, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 80049b4: 2304 movs r3, #4 80049b6: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 80049b8: 2300 movs r3, #0 return HAL_ERROR; 80049ba: 2001 movs r0, #1 hi2c->PreviousState = I2C_STATE_NONE; 80049bc: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 80049be: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 80049c2: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 80049c6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 80049ca: 1c7b adds r3, r7, #1 80049cc: d0d9 beq.n 8004982 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80049ce: b94f cbnz r7, 80049e4 hi2c->PreviousState = I2C_STATE_NONE; 80049d0: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 80049d2: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 80049d4: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 80049d6: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 80049da: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_TIMEOUT; 80049de: 2003 movs r0, #3 80049e0: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80049e4: f7ff fc60 bl 80042a8 80049e8: eba0 0009 sub.w r0, r0, r9 80049ec: 4287 cmp r7, r0 80049ee: d2c8 bcs.n 8004982 80049f0: e7ee b.n 80049d0 080049f2 : { 80049f2: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80049f6: 4604 mov r4, r0 80049f8: 4690 mov r8, r2 80049fa: 461f mov r7, r3 80049fc: 9e08 ldr r6, [sp, #32] while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) 80049fe: f3c1 4907 ubfx r9, r1, #16, #8 8004a02: b28d uxth r5, r1 8004a04: 6823 ldr r3, [r4, #0] 8004a06: f1b9 0f01 cmp.w r9, #1 8004a0a: bf0c ite eq 8004a0c: 695b ldreq r3, [r3, #20] 8004a0e: 699b ldrne r3, [r3, #24] 8004a10: ea35 0303 bics.w r3, r5, r3 8004a14: bf0c ite eq 8004a16: 2301 moveq r3, #1 8004a18: 2300 movne r3, #0 8004a1a: 4543 cmp r3, r8 8004a1c: d002 beq.n 8004a24 return HAL_OK; 8004a1e: 2000 movs r0, #0 } 8004a20: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 8004a24: 1c7b adds r3, r7, #1 8004a26: d0ed beq.n 8004a04 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8004a28: b95f cbnz r7, 8004a42 hi2c->PreviousState = I2C_STATE_NONE; 8004a2a: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 8004a2c: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 8004a2e: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8004a30: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8004a34: f884 203d strb.w r2, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8004a38: 2003 movs r0, #3 hi2c->Mode = HAL_I2C_MODE_NONE; 8004a3a: f884 303e strb.w r3, [r4, #62] ; 0x3e 8004a3e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8004a42: f7ff fc31 bl 80042a8 8004a46: 1b80 subs r0, r0, r6 8004a48: 4287 cmp r7, r0 8004a4a: d2db bcs.n 8004a04 8004a4c: e7ed b.n 8004a2a 08004a4e : { 8004a4e: b570 push {r4, r5, r6, lr} 8004a50: 4604 mov r4, r0 8004a52: 460d mov r5, r1 8004a54: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8004a56: 6823 ldr r3, [r4, #0] 8004a58: 695b ldr r3, [r3, #20] 8004a5a: 061b lsls r3, r3, #24 8004a5c: d501 bpl.n 8004a62 return HAL_OK; 8004a5e: 2000 movs r0, #0 8004a60: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8004a62: 4620 mov r0, r4 8004a64: f7ff ff70 bl 8004948 8004a68: b9a8 cbnz r0, 8004a96 if(Timeout != HAL_MAX_DELAY) 8004a6a: 1c6a adds r2, r5, #1 8004a6c: d0f3 beq.n 8004a56 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004a6e: b965 cbnz r5, 8004a8a hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004a70: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8004a72: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004a74: f043 0320 orr.w r3, r3, #32 8004a78: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8004a7a: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 8004a7c: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 8004a7e: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8004a80: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8004a84: f884 203d strb.w r2, [r4, #61] ; 0x3d 8004a88: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004a8a: f7ff fc0d bl 80042a8 8004a8e: 1b80 subs r0, r0, r6 8004a90: 4285 cmp r5, r0 8004a92: d2e0 bcs.n 8004a56 8004a94: e7ec b.n 8004a70 return HAL_ERROR; 8004a96: 2001 movs r0, #1 } 8004a98: bd70 pop {r4, r5, r6, pc} ... 08004a9c : { 8004a9c: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 8004aa0: 4615 mov r5, r2 hi2c->Instance->CR1 |= I2C_CR1_START; 8004aa2: 6802 ldr r2, [r0, #0] { 8004aa4: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_START; 8004aa6: 6813 ldr r3, [r2, #0] { 8004aa8: 9e0b ldr r6, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_START; 8004aaa: f443 7380 orr.w r3, r3, #256 ; 0x100 8004aae: 6013 str r3, [r2, #0] { 8004ab0: 460f mov r7, r1 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004ab2: 9600 str r6, [sp, #0] 8004ab4: 9b0a ldr r3, [sp, #40] ; 0x28 8004ab6: 2200 movs r2, #0 8004ab8: f04f 1101 mov.w r1, #65537 ; 0x10001 { 8004abc: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004abe: f7ff ff98 bl 80049f2 8004ac2: b968 cbnz r0, 8004ae0 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8004ac4: 6823 ldr r3, [r4, #0] 8004ac6: f007 07fe and.w r7, r7, #254 ; 0xfe 8004aca: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8004acc: 9a0a ldr r2, [sp, #40] ; 0x28 8004ace: 4633 mov r3, r6 8004ad0: 491a ldr r1, [pc, #104] ; (8004b3c ) 8004ad2: 4620 mov r0, r4 8004ad4: f7ff ff4d bl 8004972 8004ad8: b130 cbz r0, 8004ae8 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004ada: 6c23 ldr r3, [r4, #64] ; 0x40 8004adc: 2b04 cmp r3, #4 8004ade: d018 beq.n 8004b12 return HAL_TIMEOUT; 8004ae0: 2003 movs r0, #3 } 8004ae2: b004 add sp, #16 8004ae4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004ae8: 6823 ldr r3, [r4, #0] 8004aea: 9003 str r0, [sp, #12] 8004aec: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004aee: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004af0: 9203 str r2, [sp, #12] 8004af2: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004af4: 4632 mov r2, r6 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004af6: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004af8: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004afa: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004afc: f7ff ffa7 bl 8004a4e 8004b00: b148 cbz r0, 8004b16 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004b02: 6c23 ldr r3, [r4, #64] ; 0x40 8004b04: 2b04 cmp r3, #4 8004b06: d1eb bne.n 8004ae0 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004b08: 6822 ldr r2, [r4, #0] 8004b0a: 6813 ldr r3, [r2, #0] 8004b0c: f443 7300 orr.w r3, r3, #512 ; 0x200 8004b10: 6013 str r3, [r2, #0] return HAL_ERROR; 8004b12: 2001 movs r0, #1 8004b14: e7e5 b.n 8004ae2 if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8004b16: f1b8 0f01 cmp.w r8, #1 8004b1a: 6823 ldr r3, [r4, #0] 8004b1c: d102 bne.n 8004b24 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004b1e: b2ed uxtb r5, r5 8004b20: 611d str r5, [r3, #16] 8004b22: e7de b.n 8004ae2 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8004b24: 0a2a lsrs r2, r5, #8 8004b26: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004b28: 990a ldr r1, [sp, #40] ; 0x28 8004b2a: 4632 mov r2, r6 8004b2c: 4620 mov r0, r4 8004b2e: f7ff ff8e bl 8004a4e 8004b32: 2800 cmp r0, #0 8004b34: d1e5 bne.n 8004b02 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004b36: 6823 ldr r3, [r4, #0] 8004b38: e7f1 b.n 8004b1e 8004b3a: bf00 nop 8004b3c: 00010002 .word 0x00010002 08004b40 : { 8004b40: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 8004b44: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8004b46: 6803 ldr r3, [r0, #0] { 8004b48: 4616 mov r6, r2 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8004b4a: 681a ldr r2, [r3, #0] { 8004b4c: 9d0b ldr r5, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_ACK; 8004b4e: f442 6280 orr.w r2, r2, #1024 ; 0x400 8004b52: 601a str r2, [r3, #0] hi2c->Instance->CR1 |= I2C_CR1_START; 8004b54: 681a ldr r2, [r3, #0] { 8004b56: 460f mov r7, r1 hi2c->Instance->CR1 |= I2C_CR1_START; 8004b58: f442 7280 orr.w r2, r2, #256 ; 0x100 8004b5c: 601a str r2, [r3, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004b5e: f04f 1101 mov.w r1, #65537 ; 0x10001 8004b62: 9500 str r5, [sp, #0] 8004b64: 9b0a ldr r3, [sp, #40] ; 0x28 8004b66: 2200 movs r2, #0 { 8004b68: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004b6a: f7ff ff42 bl 80049f2 8004b6e: b980 cbnz r0, 8004b92 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8004b70: 6823 ldr r3, [r4, #0] 8004b72: b2ff uxtb r7, r7 8004b74: f007 02fe and.w r2, r7, #254 ; 0xfe 8004b78: 611a str r2, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8004b7a: 492d ldr r1, [pc, #180] ; (8004c30 ) 8004b7c: 462b mov r3, r5 8004b7e: 9a0a ldr r2, [sp, #40] ; 0x28 8004b80: 4620 mov r0, r4 8004b82: f7ff fef6 bl 8004972 8004b86: b140 cbz r0, 8004b9a if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004b88: 6c23 ldr r3, [r4, #64] ; 0x40 8004b8a: 2b04 cmp r3, #4 8004b8c: d101 bne.n 8004b92 return HAL_ERROR; 8004b8e: 2001 movs r0, #1 8004b90: e000 b.n 8004b94 return HAL_TIMEOUT; 8004b92: 2003 movs r0, #3 } 8004b94: b004 add sp, #16 8004b96: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004b9a: 6823 ldr r3, [r4, #0] 8004b9c: 9003 str r0, [sp, #12] 8004b9e: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004ba0: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004ba2: 9203 str r2, [sp, #12] 8004ba4: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004ba6: 462a mov r2, r5 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004ba8: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004baa: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004bac: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004bae: f7ff ff4e bl 8004a4e 8004bb2: b140 cbz r0, 8004bc6 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004bb4: 6c23 ldr r3, [r4, #64] ; 0x40 8004bb6: 2b04 cmp r3, #4 8004bb8: d1eb bne.n 8004b92 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004bba: 6822 ldr r2, [r4, #0] 8004bbc: 6813 ldr r3, [r2, #0] 8004bbe: f443 7300 orr.w r3, r3, #512 ; 0x200 8004bc2: 6013 str r3, [r2, #0] 8004bc4: e7e3 b.n 8004b8e if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8004bc6: f1b8 0f01 cmp.w r8, #1 8004bca: 6823 ldr r3, [r4, #0] 8004bcc: d124 bne.n 8004c18 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004bce: b2f6 uxtb r6, r6 8004bd0: 611e str r6, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004bd2: 462a mov r2, r5 8004bd4: 990a ldr r1, [sp, #40] ; 0x28 8004bd6: 4620 mov r0, r4 8004bd8: f7ff ff39 bl 8004a4e 8004bdc: 4602 mov r2, r0 8004bde: 2800 cmp r0, #0 8004be0: d1e8 bne.n 8004bb4 hi2c->Instance->CR1 |= I2C_CR1_START; 8004be2: 6821 ldr r1, [r4, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004be4: 4620 mov r0, r4 hi2c->Instance->CR1 |= I2C_CR1_START; 8004be6: 680b ldr r3, [r1, #0] 8004be8: f443 7380 orr.w r3, r3, #256 ; 0x100 8004bec: 600b str r3, [r1, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004bee: 9500 str r5, [sp, #0] 8004bf0: 9b0a ldr r3, [sp, #40] ; 0x28 8004bf2: f04f 1101 mov.w r1, #65537 ; 0x10001 8004bf6: f7ff fefc bl 80049f2 8004bfa: 2800 cmp r0, #0 8004bfc: d1c9 bne.n 8004b92 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 8004bfe: 6823 ldr r3, [r4, #0] 8004c00: f047 0701 orr.w r7, r7, #1 8004c04: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8004c06: 9a0a ldr r2, [sp, #40] ; 0x28 8004c08: 462b mov r3, r5 8004c0a: 4909 ldr r1, [pc, #36] ; (8004c30 ) 8004c0c: 4620 mov r0, r4 8004c0e: f7ff feb0 bl 8004972 8004c12: 2800 cmp r0, #0 8004c14: d1b8 bne.n 8004b88 8004c16: e7bd b.n 8004b94 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8004c18: 0a32 lsrs r2, r6, #8 8004c1a: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004c1c: 990a ldr r1, [sp, #40] ; 0x28 8004c1e: 462a mov r2, r5 8004c20: 4620 mov r0, r4 8004c22: f7ff ff14 bl 8004a4e 8004c26: 2800 cmp r0, #0 8004c28: d1c4 bne.n 8004bb4 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004c2a: 6823 ldr r3, [r4, #0] 8004c2c: e7cf b.n 8004bce 8004c2e: bf00 nop 8004c30: 00010002 .word 0x00010002 08004c34 : { 8004c34: b570 push {r4, r5, r6, lr} 8004c36: 4604 mov r4, r0 8004c38: 460d mov r5, r1 8004c3a: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 8004c3c: 6820 ldr r0, [r4, #0] 8004c3e: 6943 ldr r3, [r0, #20] 8004c40: f013 0340 ands.w r3, r3, #64 ; 0x40 8004c44: d001 beq.n 8004c4a return HAL_OK; 8004c46: 2000 movs r0, #0 } 8004c48: bd70 pop {r4, r5, r6, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 8004c4a: 6942 ldr r2, [r0, #20] 8004c4c: 06d2 lsls r2, r2, #27 8004c4e: d50b bpl.n 8004c68 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8004c50: f06f 0210 mvn.w r2, #16 8004c54: 6142 str r2, [r0, #20] hi2c->State= HAL_I2C_STATE_READY; 8004c56: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004c58: 6423 str r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004c5a: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->PreviousState = I2C_STATE_NONE; 8004c5e: 6323 str r3, [r4, #48] ; 0x30 return HAL_ERROR; 8004c60: 2001 movs r0, #1 hi2c->State= HAL_I2C_STATE_READY; 8004c62: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 8004c66: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004c68: b95d cbnz r5, 8004c82 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004c6a: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004c6c: 2003 movs r0, #3 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004c6e: f043 0320 orr.w r3, r3, #32 8004c72: 6423 str r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8004c74: 2320 movs r3, #32 8004c76: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8004c7a: 2300 movs r3, #0 8004c7c: f884 303c strb.w r3, [r4, #60] ; 0x3c 8004c80: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004c82: f7ff fb11 bl 80042a8 8004c86: 1b80 subs r0, r0, r6 8004c88: 4285 cmp r5, r0 8004c8a: d2d7 bcs.n 8004c3c 8004c8c: e7ed b.n 8004c6a 08004c8e : { 8004c8e: b570 push {r4, r5, r6, lr} 8004c90: 4604 mov r4, r0 8004c92: 460d mov r5, r1 8004c94: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8004c96: 6823 ldr r3, [r4, #0] 8004c98: 695b ldr r3, [r3, #20] 8004c9a: 075b lsls r3, r3, #29 8004c9c: d501 bpl.n 8004ca2 return HAL_OK; 8004c9e: 2000 movs r0, #0 8004ca0: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8004ca2: 4620 mov r0, r4 8004ca4: f7ff fe50 bl 8004948 8004ca8: b9a8 cbnz r0, 8004cd6 if(Timeout != HAL_MAX_DELAY) 8004caa: 1c6a adds r2, r5, #1 8004cac: d0f3 beq.n 8004c96 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004cae: b965 cbnz r5, 8004cca hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004cb0: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8004cb2: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004cb4: f043 0320 orr.w r3, r3, #32 8004cb8: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8004cba: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 8004cbc: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 8004cbe: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8004cc0: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8004cc4: f884 203d strb.w r2, [r4, #61] ; 0x3d 8004cc8: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004cca: f7ff faed bl 80042a8 8004cce: 1b80 subs r0, r0, r6 8004cd0: 4285 cmp r5, r0 8004cd2: d2e0 bcs.n 8004c96 8004cd4: e7ec b.n 8004cb0 return HAL_ERROR; 8004cd6: 2001 movs r0, #1 } 8004cd8: bd70 pop {r4, r5, r6, pc} ... 08004cdc : { 8004cdc: b538 push {r3, r4, r5, lr} if(hi2c == NULL) 8004cde: 4604 mov r4, r0 8004ce0: b908 cbnz r0, 8004ce6 return HAL_ERROR; 8004ce2: 2001 movs r0, #1 8004ce4: bd38 pop {r3, r4, r5, pc} if(hi2c->State == HAL_I2C_STATE_RESET) 8004ce6: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8004cea: f003 02ff and.w r2, r3, #255 ; 0xff 8004cee: b91b cbnz r3, 8004cf8 hi2c->Lock = HAL_UNLOCKED; 8004cf0: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_I2C_MspInit(hi2c); 8004cf4: f002 fecc bl 8007a90 hi2c->State = HAL_I2C_STATE_BUSY; 8004cf8: 2324 movs r3, #36 ; 0x24 __HAL_I2C_DISABLE(hi2c); 8004cfa: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 8004cfc: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8004d00: 6813 ldr r3, [r2, #0] 8004d02: f023 0301 bic.w r3, r3, #1 8004d06: 6013 str r3, [r2, #0] pclk1 = HAL_RCC_GetPCLK1Freq(); 8004d08: f000 fcba bl 8005680 if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8004d0c: 6863 ldr r3, [r4, #4] 8004d0e: 4a2f ldr r2, [pc, #188] ; (8004dcc ) 8004d10: 4293 cmp r3, r2 8004d12: d830 bhi.n 8004d76 8004d14: 4a2e ldr r2, [pc, #184] ; (8004dd0 ) 8004d16: 4290 cmp r0, r2 8004d18: d9e3 bls.n 8004ce2 freqrange = I2C_FREQRANGE(pclk1); 8004d1a: 4a2e ldr r2, [pc, #184] ; (8004dd4 ) hi2c->Instance->CR2 = freqrange; 8004d1c: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 8004d1e: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8004d22: 604a str r2, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d24: 3201 adds r2, #1 8004d26: 620a str r2, [r1, #32] hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8004d28: 4a28 ldr r2, [pc, #160] ; (8004dcc ) 8004d2a: 3801 subs r0, #1 8004d2c: 4293 cmp r3, r2 8004d2e: d832 bhi.n 8004d96 8004d30: 005b lsls r3, r3, #1 8004d32: fbb0 f0f3 udiv r0, r0, r3 8004d36: 1c43 adds r3, r0, #1 8004d38: f3c3 030b ubfx r3, r3, #0, #12 8004d3c: 2b04 cmp r3, #4 8004d3e: bf38 it cc 8004d40: 2304 movcc r3, #4 8004d42: 61cb str r3, [r1, #28] hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004d44: 6a22 ldr r2, [r4, #32] 8004d46: 69e3 ldr r3, [r4, #28] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004d48: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004d4a: 4313 orrs r3, r2 8004d4c: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 8004d4e: 68e2 ldr r2, [r4, #12] 8004d50: 6923 ldr r3, [r4, #16] 8004d52: 4313 orrs r3, r2 8004d54: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8004d56: 69a2 ldr r2, [r4, #24] 8004d58: 6963 ldr r3, [r4, #20] 8004d5a: 4313 orrs r3, r2 8004d5c: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 8004d5e: 680b ldr r3, [r1, #0] 8004d60: f043 0301 orr.w r3, r3, #1 8004d64: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8004d66: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004d68: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 8004d6a: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8004d6e: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8004d70: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8004d74: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8004d76: 4a18 ldr r2, [pc, #96] ; (8004dd8 ) 8004d78: 4290 cmp r0, r2 8004d7a: d9b2 bls.n 8004ce2 freqrange = I2C_FREQRANGE(pclk1); 8004d7c: 4d15 ldr r5, [pc, #84] ; (8004dd4 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d7e: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 8004d82: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 8004d86: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d88: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 8004d8a: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d8c: f44f 757a mov.w r5, #1000 ; 0x3e8 8004d90: fbb2 f2f5 udiv r2, r2, r5 8004d94: e7c6 b.n 8004d24 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8004d96: 68a2 ldr r2, [r4, #8] 8004d98: b952 cbnz r2, 8004db0 8004d9a: eb03 0343 add.w r3, r3, r3, lsl #1 8004d9e: fbb0 f0f3 udiv r0, r0, r3 8004da2: 1c43 adds r3, r0, #1 8004da4: f3c3 030b ubfx r3, r3, #0, #12 8004da8: b16b cbz r3, 8004dc6 8004daa: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8004dae: e7c8 b.n 8004d42 8004db0: 2219 movs r2, #25 8004db2: 4353 muls r3, r2 8004db4: fbb0 f0f3 udiv r0, r0, r3 8004db8: 1c43 adds r3, r0, #1 8004dba: f3c3 030b ubfx r3, r3, #0, #12 8004dbe: b113 cbz r3, 8004dc6 8004dc0: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8004dc4: e7bd b.n 8004d42 8004dc6: 2301 movs r3, #1 8004dc8: e7bb b.n 8004d42 8004dca: bf00 nop 8004dcc: 000186a0 .word 0x000186a0 8004dd0: 001e847f .word 0x001e847f 8004dd4: 000f4240 .word 0x000f4240 8004dd8: 003d08ff .word 0x003d08ff 08004ddc : { 8004ddc: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr} 8004de0: 4604 mov r4, r0 8004de2: 469a mov sl, r3 8004de4: 4688 mov r8, r1 8004de6: 4691 mov r9, r2 8004de8: 9e0c ldr r6, [sp, #48] ; 0x30 tickstart = HAL_GetTick(); 8004dea: f7ff fa5d bl 80042a8 if(hi2c->State == HAL_I2C_STATE_READY) 8004dee: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8004df2: 4605 mov r5, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8004df4: 2b20 cmp r3, #32 8004df6: d003 beq.n 8004e00 return HAL_BUSY; 8004df8: 2002 movs r0, #2 } 8004dfa: b002 add sp, #8 8004dfc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8004e00: 9000 str r0, [sp, #0] 8004e02: 2319 movs r3, #25 8004e04: 2201 movs r2, #1 8004e06: 493e ldr r1, [pc, #248] ; (8004f00 ) 8004e08: 4620 mov r0, r4 8004e0a: f7ff fdf2 bl 80049f2 8004e0e: 2800 cmp r0, #0 8004e10: d1f2 bne.n 8004df8 __HAL_LOCK(hi2c); 8004e12: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 8004e16: 2b01 cmp r3, #1 8004e18: d0ee beq.n 8004df8 8004e1a: 2301 movs r3, #1 8004e1c: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004e20: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004e22: 2700 movs r7, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004e24: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e26: 4641 mov r1, r8 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004e28: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 8004e2a: bf58 it pl 8004e2c: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e2e: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8004e30: bf5c itt pl 8004e32: f042 0201 orrpl.w r2, r2, #1 8004e36: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 8004e38: 681a ldr r2, [r3, #0] 8004e3a: f422 6200 bic.w r2, r2, #2048 ; 0x800 8004e3e: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 8004e40: 2321 movs r3, #33 ; 0x21 8004e42: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8004e46: 2340 movs r3, #64 ; 0x40 8004e48: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 8004e4c: 9b0a ldr r3, [sp, #40] ; 0x28 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004e4e: 6427 str r7, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 8004e50: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 8004e52: f8bd 302c ldrh.w r3, [sp, #44] ; 0x2c if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e56: 9501 str r5, [sp, #4] hi2c->XferCount = Size; 8004e58: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004e5a: 4b2a ldr r3, [pc, #168] ; (8004f04 ) if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e5c: 9600 str r6, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004e5e: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 8004e60: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e62: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 8004e64: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e66: 4653 mov r3, sl 8004e68: f7ff fe18 bl 8004a9c 8004e6c: 2800 cmp r0, #0 8004e6e: d02a beq.n 8004ec6 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004e70: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004e72: f884 703c strb.w r7, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004e76: 2b04 cmp r3, #4 8004e78: d107 bne.n 8004e8a return HAL_ERROR; 8004e7a: 2001 movs r0, #1 8004e7c: e7bd b.n 8004dfa if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004e7e: f7ff fde6 bl 8004a4e 8004e82: b120 cbz r0, 8004e8e if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004e84: 6c23 ldr r3, [r4, #64] ; 0x40 8004e86: 2b04 cmp r3, #4 8004e88: d034 beq.n 8004ef4 return HAL_TIMEOUT; 8004e8a: 2003 movs r0, #3 8004e8c: e7b5 b.n 8004dfa hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004e8e: 6a61 ldr r1, [r4, #36] ; 0x24 8004e90: 6827 ldr r7, [r4, #0] 8004e92: 1c4b adds r3, r1, #1 8004e94: 6263 str r3, [r4, #36] ; 0x24 8004e96: 780b ldrb r3, [r1, #0] hi2c->XferSize--; 8004e98: 8d22 ldrh r2, [r4, #40] ; 0x28 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004e9a: 613b str r3, [r7, #16] hi2c->XferCount--; 8004e9c: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 8004e9e: 1e50 subs r0, r2, #1 hi2c->XferCount--; 8004ea0: 3b01 subs r3, #1 8004ea2: b29b uxth r3, r3 8004ea4: 8563 strh r3, [r4, #42] ; 0x2a if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8004ea6: 697b ldr r3, [r7, #20] hi2c->XferSize--; 8004ea8: b280 uxth r0, r0 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8004eaa: 075b lsls r3, r3, #29 hi2c->XferSize--; 8004eac: 8520 strh r0, [r4, #40] ; 0x28 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8004eae: d50a bpl.n 8004ec6 8004eb0: b148 cbz r0, 8004ec6 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004eb2: 1c8b adds r3, r1, #2 8004eb4: 6263 str r3, [r4, #36] ; 0x24 8004eb6: 784b ldrb r3, [r1, #1] hi2c->XferSize--; 8004eb8: 3a02 subs r2, #2 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004eba: 613b str r3, [r7, #16] hi2c->XferCount--; 8004ebc: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 8004ebe: 8522 strh r2, [r4, #40] ; 0x28 hi2c->XferCount--; 8004ec0: 3b01 subs r3, #1 8004ec2: b29b uxth r3, r3 8004ec4: 8563 strh r3, [r4, #42] ; 0x2a while(hi2c->XferSize > 0U) 8004ec6: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004ec8: 462a mov r2, r5 8004eca: 4631 mov r1, r6 8004ecc: 4620 mov r0, r4 while(hi2c->XferSize > 0U) 8004ece: 2b00 cmp r3, #0 8004ed0: d1d5 bne.n 8004e7e if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004ed2: f7ff fedc bl 8004c8e 8004ed6: 2800 cmp r0, #0 8004ed8: d1d4 bne.n 8004e84 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004eda: 6822 ldr r2, [r4, #0] 8004edc: 6813 ldr r3, [r2, #0] 8004ede: f443 7300 orr.w r3, r3, #512 ; 0x200 8004ee2: 6013 str r3, [r2, #0] hi2c->State = HAL_I2C_STATE_READY; 8004ee4: 2320 movs r3, #32 __HAL_UNLOCK(hi2c); 8004ee6: f884 003c strb.w r0, [r4, #60] ; 0x3c hi2c->State = HAL_I2C_STATE_READY; 8004eea: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8004eee: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8004ef2: e782 b.n 8004dfa hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004ef4: 6822 ldr r2, [r4, #0] 8004ef6: 6813 ldr r3, [r2, #0] 8004ef8: f443 7300 orr.w r3, r3, #512 ; 0x200 8004efc: 6013 str r3, [r2, #0] 8004efe: e7bc b.n 8004e7a 8004f00: 00100002 .word 0x00100002 8004f04: ffff0000 .word 0xffff0000 08004f08 : { 8004f08: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8004f0c: 4604 mov r4, r0 8004f0e: b086 sub sp, #24 8004f10: 469a mov sl, r3 8004f12: 460d mov r5, r1 8004f14: 4691 mov r9, r2 8004f16: 9f10 ldr r7, [sp, #64] ; 0x40 tickstart = HAL_GetTick(); 8004f18: f7ff f9c6 bl 80042a8 if(hi2c->State == HAL_I2C_STATE_READY) 8004f1c: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8004f20: 4606 mov r6, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8004f22: 2b20 cmp r3, #32 8004f24: d004 beq.n 8004f30 return HAL_BUSY; 8004f26: 2502 movs r5, #2 } 8004f28: 4628 mov r0, r5 8004f2a: b006 add sp, #24 8004f2c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8004f30: 9000 str r0, [sp, #0] 8004f32: 2319 movs r3, #25 8004f34: 2201 movs r2, #1 8004f36: 4981 ldr r1, [pc, #516] ; (800513c ) 8004f38: 4620 mov r0, r4 8004f3a: f7ff fd5a bl 80049f2 8004f3e: 2800 cmp r0, #0 8004f40: d1f1 bne.n 8004f26 __HAL_LOCK(hi2c); 8004f42: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 8004f46: 2b01 cmp r3, #1 8004f48: d0ed beq.n 8004f26 8004f4a: 2301 movs r3, #1 8004f4c: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004f50: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004f52: f04f 0800 mov.w r8, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004f56: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f58: 4629 mov r1, r5 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004f5a: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 8004f5c: bf58 it pl 8004f5e: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f60: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8004f62: bf5c itt pl 8004f64: f042 0201 orrpl.w r2, r2, #1 8004f68: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 8004f6a: 681a ldr r2, [r3, #0] 8004f6c: f422 6200 bic.w r2, r2, #2048 ; 0x800 8004f70: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 8004f72: 2322 movs r3, #34 ; 0x22 8004f74: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8004f78: 2340 movs r3, #64 ; 0x40 8004f7a: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 8004f7e: 9b0e ldr r3, [sp, #56] ; 0x38 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004f80: f8c4 8040 str.w r8, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 8004f84: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 8004f86: f8bd 303c ldrh.w r3, [sp, #60] ; 0x3c if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f8a: 9601 str r6, [sp, #4] hi2c->XferCount = Size; 8004f8c: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004f8e: 4b6c ldr r3, [pc, #432] ; (8005140 ) if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f90: 9700 str r7, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004f92: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 8004f94: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f96: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 8004f98: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f9a: 4653 mov r3, sl 8004f9c: f7ff fdd0 bl 8004b40 8004fa0: 4605 mov r5, r0 8004fa2: b130 cbz r0, 8004fb2 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004fa4: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004fa6: f884 803c strb.w r8, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004faa: 2b04 cmp r3, #4 8004fac: d13d bne.n 800502a return HAL_ERROR; 8004fae: 2501 movs r5, #1 8004fb0: e7ba b.n 8004f28 if(hi2c->XferSize == 0U) 8004fb2: 8d22 ldrh r2, [r4, #40] ; 0x28 8004fb4: 6823 ldr r3, [r4, #0] 8004fb6: b992 cbnz r2, 8004fde __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004fb8: 9002 str r0, [sp, #8] 8004fba: 695a ldr r2, [r3, #20] 8004fbc: 9202 str r2, [sp, #8] 8004fbe: 699a ldr r2, [r3, #24] 8004fc0: 9202 str r2, [sp, #8] 8004fc2: 9a02 ldr r2, [sp, #8] hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004fc4: 681a ldr r2, [r3, #0] 8004fc6: f442 7200 orr.w r2, r2, #512 ; 0x200 8004fca: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8004fcc: 2320 movs r3, #32 8004fce: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8004fd2: 2300 movs r3, #0 8004fd4: f884 303e strb.w r3, [r4, #62] ; 0x3e __HAL_UNLOCK(hi2c); 8004fd8: f884 303c strb.w r3, [r4, #60] ; 0x3c return HAL_OK; 8004fdc: e7a4 b.n 8004f28 else if(hi2c->XferSize == 1U) 8004fde: 2a01 cmp r2, #1 8004fe0: d125 bne.n 800502e hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8004fe2: 681a ldr r2, [r3, #0] 8004fe4: f422 6280 bic.w r2, r2, #1024 ; 0x400 8004fe8: 601a str r2, [r3, #0] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8004fea: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004fec: 6823 ldr r3, [r4, #0] 8004fee: 9003 str r0, [sp, #12] 8004ff0: 695a ldr r2, [r3, #20] 8004ff2: 9203 str r2, [sp, #12] 8004ff4: 699a ldr r2, [r3, #24] 8004ff6: 9203 str r2, [sp, #12] 8004ff8: 9a03 ldr r2, [sp, #12] hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004ffa: 681a ldr r2, [r3, #0] 8004ffc: f442 7200 orr.w r2, r2, #512 ; 0x200 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8005000: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 8005002: b662 cpsie i if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8005004: f8df 813c ldr.w r8, [pc, #316] ; 8005144 while(hi2c->XferSize > 0U) 8005008: 8d23 ldrh r3, [r4, #40] ; 0x28 800500a: 2b00 cmp r3, #0 800500c: d0de beq.n 8004fcc if(hi2c->XferSize <= 3U) 800500e: 2b03 cmp r3, #3 8005010: d877 bhi.n 8005102 if(hi2c->XferSize== 1U) 8005012: 2b01 cmp r3, #1 8005014: d127 bne.n 8005066 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8005016: 4632 mov r2, r6 8005018: 4639 mov r1, r7 800501a: 4620 mov r0, r4 800501c: f7ff fe0a bl 8004c34 8005020: 2800 cmp r0, #0 8005022: d03f beq.n 80050a4 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 8005024: 6c23 ldr r3, [r4, #64] ; 0x40 8005026: 2b20 cmp r3, #32 8005028: d1c1 bne.n 8004fae return HAL_TIMEOUT; 800502a: 2503 movs r5, #3 800502c: e77c b.n 8004f28 else if(hi2c->XferSize == 2U) 800502e: 2a02 cmp r2, #2 hi2c->Instance->CR1 |= I2C_CR1_POS; 8005030: 681a ldr r2, [r3, #0] else if(hi2c->XferSize == 2U) 8005032: d10e bne.n 8005052 hi2c->Instance->CR1 |= I2C_CR1_POS; 8005034: f442 6200 orr.w r2, r2, #2048 ; 0x800 8005038: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 800503a: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 800503c: 6823 ldr r3, [r4, #0] 800503e: 9004 str r0, [sp, #16] 8005040: 695a ldr r2, [r3, #20] 8005042: 9204 str r2, [sp, #16] 8005044: 699a ldr r2, [r3, #24] 8005046: 9204 str r2, [sp, #16] 8005048: 9a04 ldr r2, [sp, #16] hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 800504a: 681a ldr r2, [r3, #0] 800504c: f422 6280 bic.w r2, r2, #1024 ; 0x400 8005050: e7d6 b.n 8005000 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8005052: f442 6280 orr.w r2, r2, #1024 ; 0x400 8005056: 601a str r2, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8005058: 9005 str r0, [sp, #20] 800505a: 695a ldr r2, [r3, #20] 800505c: 9205 str r2, [sp, #20] 800505e: 699b ldr r3, [r3, #24] 8005060: 9305 str r3, [sp, #20] 8005062: 9b05 ldr r3, [sp, #20] 8005064: e7ce b.n 8005004 else if(hi2c->XferSize == 2U) 8005066: 2b02 cmp r3, #2 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8005068: 9600 str r6, [sp, #0] 800506a: 463b mov r3, r7 800506c: f04f 0200 mov.w r2, #0 8005070: 4641 mov r1, r8 8005072: 4620 mov r0, r4 else if(hi2c->XferSize == 2U) 8005074: d124 bne.n 80050c0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8005076: f7ff fcbc bl 80049f2 800507a: 2800 cmp r0, #0 800507c: d1d5 bne.n 800502a 800507e: b672 cpsid i hi2c->Instance->CR1 |= I2C_CR1_STOP; 8005080: 6823 ldr r3, [r4, #0] 8005082: 681a ldr r2, [r3, #0] 8005084: f442 7200 orr.w r2, r2, #512 ; 0x200 8005088: 601a str r2, [r3, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 800508a: 6a62 ldr r2, [r4, #36] ; 0x24 800508c: 691b ldr r3, [r3, #16] 800508e: 1c51 adds r1, r2, #1 8005090: 6261 str r1, [r4, #36] ; 0x24 8005092: 7013 strb r3, [r2, #0] hi2c->XferSize--; 8005094: 8d23 ldrh r3, [r4, #40] ; 0x28 8005096: 3b01 subs r3, #1 8005098: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 800509a: 8d63 ldrh r3, [r4, #42] ; 0x2a 800509c: 3b01 subs r3, #1 800509e: b29b uxth r3, r3 80050a0: 8563 strh r3, [r4, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 80050a2: b662 cpsie i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80050a4: 6a63 ldr r3, [r4, #36] ; 0x24 80050a6: 1c5a adds r2, r3, #1 80050a8: 6262 str r2, [r4, #36] ; 0x24 80050aa: 6822 ldr r2, [r4, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80050ac: 6912 ldr r2, [r2, #16] 80050ae: 701a strb r2, [r3, #0] hi2c->XferSize--; 80050b0: 8d23 ldrh r3, [r4, #40] ; 0x28 80050b2: 3b01 subs r3, #1 80050b4: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 80050b6: 8d63 ldrh r3, [r4, #42] ; 0x2a 80050b8: 3b01 subs r3, #1 80050ba: b29b uxth r3, r3 80050bc: 8563 strh r3, [r4, #42] ; 0x2a 80050be: e7a3 b.n 8005008 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050c0: f7ff fc97 bl 80049f2 80050c4: 4602 mov r2, r0 80050c6: 2800 cmp r0, #0 80050c8: d1af bne.n 800502a hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 80050ca: 6821 ldr r1, [r4, #0] 80050cc: 680b ldr r3, [r1, #0] 80050ce: f423 6380 bic.w r3, r3, #1024 ; 0x400 80050d2: 600b str r3, [r1, #0] __ASM volatile ("cpsid i" : : : "memory"); 80050d4: b672 cpsid i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80050d6: 6a63 ldr r3, [r4, #36] ; 0x24 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050d8: 4620 mov r0, r4 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80050da: 1c59 adds r1, r3, #1 80050dc: 6261 str r1, [r4, #36] ; 0x24 80050de: 6821 ldr r1, [r4, #0] 80050e0: 6909 ldr r1, [r1, #16] 80050e2: 7019 strb r1, [r3, #0] hi2c->XferSize--; 80050e4: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050e6: 9600 str r6, [sp, #0] hi2c->XferSize--; 80050e8: 3b01 subs r3, #1 80050ea: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 80050ec: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050ee: 4641 mov r1, r8 hi2c->XferCount--; 80050f0: 3b01 subs r3, #1 80050f2: b29b uxth r3, r3 80050f4: 8563 strh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050f6: 463b mov r3, r7 80050f8: f7ff fc7b bl 80049f2 80050fc: 2800 cmp r0, #0 80050fe: d0bf beq.n 8005080 8005100: e793 b.n 800502a if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8005102: 4632 mov r2, r6 8005104: 4639 mov r1, r7 8005106: 4620 mov r0, r4 8005108: f7ff fd94 bl 8004c34 800510c: 2800 cmp r0, #0 800510e: d189 bne.n 8005024 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8005110: 6a63 ldr r3, [r4, #36] ; 0x24 8005112: 1c5a adds r2, r3, #1 8005114: 6262 str r2, [r4, #36] ; 0x24 8005116: 6822 ldr r2, [r4, #0] 8005118: 6912 ldr r2, [r2, #16] 800511a: 701a strb r2, [r3, #0] hi2c->XferSize--; 800511c: 8d23 ldrh r3, [r4, #40] ; 0x28 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 800511e: 6822 ldr r2, [r4, #0] hi2c->XferSize--; 8005120: 3b01 subs r3, #1 8005122: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8005124: 8d63 ldrh r3, [r4, #42] ; 0x2a 8005126: 3b01 subs r3, #1 8005128: b29b uxth r3, r3 800512a: 8563 strh r3, [r4, #42] ; 0x2a if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 800512c: 6953 ldr r3, [r2, #20] 800512e: 075b lsls r3, r3, #29 8005130: f57f af6a bpl.w 8005008 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8005134: 6a63 ldr r3, [r4, #36] ; 0x24 8005136: 1c59 adds r1, r3, #1 8005138: 6261 str r1, [r4, #36] ; 0x24 800513a: e7b7 b.n 80050ac 800513c: 00100002 .word 0x00100002 8005140: ffff0000 .word 0xffff0000 8005144: 00010004 .word 0x00010004 08005148 : * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains * the configuration information for the specified IWDG module. * @retval HAL status */ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) { 8005148: b538 push {r3, r4, r5, lr} uint32_t tickstart; /* Check the IWDG handle allocation */ if (hiwdg == NULL) 800514a: 4604 mov r4, r0 800514c: b1d8 cbz r0, 8005186 assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance)); assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); /* Enable IWDG. LSI is turned on automaticaly */ __HAL_IWDG_START(hiwdg); 800514e: f64c 42cc movw r2, #52428 ; 0xcccc 8005152: 6803 ldr r3, [r0, #0] 8005154: 601a str r2, [r3, #0] /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */ IWDG_ENABLE_WRITE_ACCESS(hiwdg); 8005156: f245 5255 movw r2, #21845 ; 0x5555 800515a: 601a str r2, [r3, #0] /* Write to IWDG registers the Prescaler & Reload values to work with */ hiwdg->Instance->PR = hiwdg->Init.Prescaler; 800515c: 6842 ldr r2, [r0, #4] 800515e: 605a str r2, [r3, #4] hiwdg->Instance->RLR = hiwdg->Init.Reload; 8005160: 6882 ldr r2, [r0, #8] 8005162: 609a str r2, [r3, #8] /* Check pending flag, if previous update not done, return timeout */ tickstart = HAL_GetTick(); 8005164: f7ff f8a0 bl 80042a8 8005168: 4605 mov r5, r0 /* Wait for register to be updated */ while (hiwdg->Instance->SR != RESET) 800516a: 6823 ldr r3, [r4, #0] 800516c: 68d8 ldr r0, [r3, #12] 800516e: b918 cbnz r0, 8005178 return HAL_TIMEOUT; } } /* Reload IWDG counter with value defined in the reload register */ __HAL_IWDG_RELOAD_COUNTER(hiwdg); 8005170: f64a 22aa movw r2, #43690 ; 0xaaaa 8005174: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; 8005176: bd38 pop {r3, r4, r5, pc} if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) 8005178: f7ff f896 bl 80042a8 800517c: 1b40 subs r0, r0, r5 800517e: 2830 cmp r0, #48 ; 0x30 8005180: d9f3 bls.n 800516a return HAL_TIMEOUT; 8005182: 2003 movs r0, #3 } 8005184: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8005186: 2001 movs r0, #1 8005188: bd38 pop {r3, r4, r5, pc} ... 0800518c : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800518c: 6803 ldr r3, [r0, #0] { 800518e: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005192: 07db lsls r3, r3, #31 { 8005194: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005196: d410 bmi.n 80051ba } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8005198: 682b ldr r3, [r5, #0] 800519a: 079f lsls r7, r3, #30 800519c: d45e bmi.n 800525c } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800519e: 682b ldr r3, [r5, #0] 80051a0: 0719 lsls r1, r3, #28 80051a2: f100 8095 bmi.w 80052d0 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80051a6: 682b ldr r3, [r5, #0] 80051a8: 075a lsls r2, r3, #29 80051aa: f100 80bf bmi.w 800532c #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80051ae: 69ea ldr r2, [r5, #28] 80051b0: 2a00 cmp r2, #0 80051b2: f040 812d bne.w 8005410 { return HAL_ERROR; } } return HAL_OK; 80051b6: 2000 movs r0, #0 80051b8: e014 b.n 80051e4 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 80051ba: 4c90 ldr r4, [pc, #576] ; (80053fc ) 80051bc: 6863 ldr r3, [r4, #4] 80051be: f003 030c and.w r3, r3, #12 80051c2: 2b04 cmp r3, #4 80051c4: d007 beq.n 80051d6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 80051c6: 6863 ldr r3, [r4, #4] 80051c8: f003 030c and.w r3, r3, #12 80051cc: 2b08 cmp r3, #8 80051ce: d10c bne.n 80051ea 80051d0: 6863 ldr r3, [r4, #4] 80051d2: 03de lsls r6, r3, #15 80051d4: d509 bpl.n 80051ea if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80051d6: 6823 ldr r3, [r4, #0] 80051d8: 039c lsls r4, r3, #14 80051da: d5dd bpl.n 8005198 80051dc: 686b ldr r3, [r5, #4] 80051de: 2b00 cmp r3, #0 80051e0: d1da bne.n 8005198 return HAL_ERROR; 80051e2: 2001 movs r0, #1 } 80051e4: b002 add sp, #8 80051e6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80051ea: 686b ldr r3, [r5, #4] 80051ec: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80051f0: d110 bne.n 8005214 80051f2: 6823 ldr r3, [r4, #0] 80051f4: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80051f8: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 80051fa: f7ff f855 bl 80042a8 80051fe: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8005200: 6823 ldr r3, [r4, #0] 8005202: 0398 lsls r0, r3, #14 8005204: d4c8 bmi.n 8005198 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8005206: f7ff f84f bl 80042a8 800520a: 1b80 subs r0, r0, r6 800520c: 2864 cmp r0, #100 ; 0x64 800520e: d9f7 bls.n 8005200 return HAL_TIMEOUT; 8005210: 2003 movs r0, #3 8005212: e7e7 b.n 80051e4 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8005214: b99b cbnz r3, 800523e 8005216: 6823 ldr r3, [r4, #0] 8005218: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800521c: 6023 str r3, [r4, #0] 800521e: 6823 ldr r3, [r4, #0] 8005220: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8005224: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8005226: f7ff f83f bl 80042a8 800522a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800522c: 6823 ldr r3, [r4, #0] 800522e: 0399 lsls r1, r3, #14 8005230: d5b2 bpl.n 8005198 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8005232: f7ff f839 bl 80042a8 8005236: 1b80 subs r0, r0, r6 8005238: 2864 cmp r0, #100 ; 0x64 800523a: d9f7 bls.n 800522c 800523c: e7e8 b.n 8005210 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800523e: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8005242: 6823 ldr r3, [r4, #0] 8005244: d103 bne.n 800524e 8005246: f443 2380 orr.w r3, r3, #262144 ; 0x40000 800524a: 6023 str r3, [r4, #0] 800524c: e7d1 b.n 80051f2 800524e: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8005252: 6023 str r3, [r4, #0] 8005254: 6823 ldr r3, [r4, #0] 8005256: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800525a: e7cd b.n 80051f8 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 800525c: 4c67 ldr r4, [pc, #412] ; (80053fc ) 800525e: 6863 ldr r3, [r4, #4] 8005260: f013 0f0c tst.w r3, #12 8005264: d007 beq.n 8005276 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8005266: 6863 ldr r3, [r4, #4] 8005268: f003 030c and.w r3, r3, #12 800526c: 2b08 cmp r3, #8 800526e: d110 bne.n 8005292 8005270: 6863 ldr r3, [r4, #4] 8005272: 03da lsls r2, r3, #15 8005274: d40d bmi.n 8005292 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8005276: 6823 ldr r3, [r4, #0] 8005278: 079b lsls r3, r3, #30 800527a: d502 bpl.n 8005282 800527c: 692b ldr r3, [r5, #16] 800527e: 2b01 cmp r3, #1 8005280: d1af bne.n 80051e2 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8005282: 6823 ldr r3, [r4, #0] 8005284: 696a ldr r2, [r5, #20] 8005286: f023 03f8 bic.w r3, r3, #248 ; 0xf8 800528a: ea43 03c2 orr.w r3, r3, r2, lsl #3 800528e: 6023 str r3, [r4, #0] 8005290: e785 b.n 800519e if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8005292: 692a ldr r2, [r5, #16] 8005294: 4b5a ldr r3, [pc, #360] ; (8005400 ) 8005296: b16a cbz r2, 80052b4 __HAL_RCC_HSI_ENABLE(); 8005298: 2201 movs r2, #1 800529a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 800529c: f7ff f804 bl 80042a8 80052a0: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80052a2: 6823 ldr r3, [r4, #0] 80052a4: 079f lsls r7, r3, #30 80052a6: d4ec bmi.n 8005282 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80052a8: f7fe fffe bl 80042a8 80052ac: 1b80 subs r0, r0, r6 80052ae: 2802 cmp r0, #2 80052b0: d9f7 bls.n 80052a2 80052b2: e7ad b.n 8005210 __HAL_RCC_HSI_DISABLE(); 80052b4: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80052b6: f7fe fff7 bl 80042a8 80052ba: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80052bc: 6823 ldr r3, [r4, #0] 80052be: 0798 lsls r0, r3, #30 80052c0: f57f af6d bpl.w 800519e if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80052c4: f7fe fff0 bl 80042a8 80052c8: 1b80 subs r0, r0, r6 80052ca: 2802 cmp r0, #2 80052cc: d9f6 bls.n 80052bc 80052ce: e79f b.n 8005210 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 80052d0: 69aa ldr r2, [r5, #24] 80052d2: 4c4a ldr r4, [pc, #296] ; (80053fc ) 80052d4: 4b4b ldr r3, [pc, #300] ; (8005404 ) 80052d6: b1da cbz r2, 8005310 __HAL_RCC_LSI_ENABLE(); 80052d8: 2201 movs r2, #1 80052da: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80052dc: f7fe ffe4 bl 80042a8 80052e0: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80052e2: 6a63 ldr r3, [r4, #36] ; 0x24 80052e4: 079b lsls r3, r3, #30 80052e6: d50d bpl.n 8005304 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80052e8: f44f 52fa mov.w r2, #8000 ; 0x1f40 80052ec: 4b46 ldr r3, [pc, #280] ; (8005408 ) 80052ee: 681b ldr r3, [r3, #0] 80052f0: fbb3 f3f2 udiv r3, r3, r2 80052f4: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 80052f6: bf00 nop do { __NOP(); } while (Delay --); 80052f8: 9b01 ldr r3, [sp, #4] 80052fa: 1e5a subs r2, r3, #1 80052fc: 9201 str r2, [sp, #4] 80052fe: 2b00 cmp r3, #0 8005300: d1f9 bne.n 80052f6 8005302: e750 b.n 80051a6 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8005304: f7fe ffd0 bl 80042a8 8005308: 1b80 subs r0, r0, r6 800530a: 2802 cmp r0, #2 800530c: d9e9 bls.n 80052e2 800530e: e77f b.n 8005210 __HAL_RCC_LSI_DISABLE(); 8005310: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8005312: f7fe ffc9 bl 80042a8 8005316: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8005318: 6a63 ldr r3, [r4, #36] ; 0x24 800531a: 079f lsls r7, r3, #30 800531c: f57f af43 bpl.w 80051a6 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8005320: f7fe ffc2 bl 80042a8 8005324: 1b80 subs r0, r0, r6 8005326: 2802 cmp r0, #2 8005328: d9f6 bls.n 8005318 800532a: e771 b.n 8005210 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 800532c: 4c33 ldr r4, [pc, #204] ; (80053fc ) 800532e: 69e3 ldr r3, [r4, #28] 8005330: 00d8 lsls r0, r3, #3 8005332: d424 bmi.n 800537e pwrclkchanged = SET; 8005334: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8005336: 69e3 ldr r3, [r4, #28] 8005338: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 800533c: 61e3 str r3, [r4, #28] 800533e: 69e3 ldr r3, [r4, #28] 8005340: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8005344: 9300 str r3, [sp, #0] 8005346: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005348: 4e30 ldr r6, [pc, #192] ; (800540c ) 800534a: 6833 ldr r3, [r6, #0] 800534c: 05d9 lsls r1, r3, #23 800534e: d518 bpl.n 8005382 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8005350: 68eb ldr r3, [r5, #12] 8005352: 2b01 cmp r3, #1 8005354: d126 bne.n 80053a4 8005356: 6a23 ldr r3, [r4, #32] 8005358: f043 0301 orr.w r3, r3, #1 800535c: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 800535e: f7fe ffa3 bl 80042a8 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8005362: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8005366: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8005368: 6a23 ldr r3, [r4, #32] 800536a: 079b lsls r3, r3, #30 800536c: d53f bpl.n 80053ee if(pwrclkchanged == SET) 800536e: 2f00 cmp r7, #0 8005370: f43f af1d beq.w 80051ae __HAL_RCC_PWR_CLK_DISABLE(); 8005374: 69e3 ldr r3, [r4, #28] 8005376: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 800537a: 61e3 str r3, [r4, #28] 800537c: e717 b.n 80051ae FlagStatus pwrclkchanged = RESET; 800537e: 2700 movs r7, #0 8005380: e7e2 b.n 8005348 SET_BIT(PWR->CR, PWR_CR_DBP); 8005382: 6833 ldr r3, [r6, #0] 8005384: f443 7380 orr.w r3, r3, #256 ; 0x100 8005388: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 800538a: f7fe ff8d bl 80042a8 800538e: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005390: 6833 ldr r3, [r6, #0] 8005392: 05da lsls r2, r3, #23 8005394: d4dc bmi.n 8005350 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8005396: f7fe ff87 bl 80042a8 800539a: eba0 0008 sub.w r0, r0, r8 800539e: 2864 cmp r0, #100 ; 0x64 80053a0: d9f6 bls.n 8005390 80053a2: e735 b.n 8005210 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80053a4: b9ab cbnz r3, 80053d2 80053a6: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80053a8: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80053ac: f023 0301 bic.w r3, r3, #1 80053b0: 6223 str r3, [r4, #32] 80053b2: 6a23 ldr r3, [r4, #32] 80053b4: f023 0304 bic.w r3, r3, #4 80053b8: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 80053ba: f7fe ff75 bl 80042a8 80053be: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80053c0: 6a23 ldr r3, [r4, #32] 80053c2: 0798 lsls r0, r3, #30 80053c4: d5d3 bpl.n 800536e if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80053c6: f7fe ff6f bl 80042a8 80053ca: 1b80 subs r0, r0, r6 80053cc: 4540 cmp r0, r8 80053ce: d9f7 bls.n 80053c0 80053d0: e71e b.n 8005210 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80053d2: 2b05 cmp r3, #5 80053d4: 6a23 ldr r3, [r4, #32] 80053d6: d103 bne.n 80053e0 80053d8: f043 0304 orr.w r3, r3, #4 80053dc: 6223 str r3, [r4, #32] 80053de: e7ba b.n 8005356 80053e0: f023 0301 bic.w r3, r3, #1 80053e4: 6223 str r3, [r4, #32] 80053e6: 6a23 ldr r3, [r4, #32] 80053e8: f023 0304 bic.w r3, r3, #4 80053ec: e7b6 b.n 800535c if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80053ee: f7fe ff5b bl 80042a8 80053f2: eba0 0008 sub.w r0, r0, r8 80053f6: 42b0 cmp r0, r6 80053f8: d9b6 bls.n 8005368 80053fa: e709 b.n 8005210 80053fc: 40021000 .word 0x40021000 8005400: 42420000 .word 0x42420000 8005404: 42420480 .word 0x42420480 8005408: 20000010 .word 0x20000010 800540c: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8005410: 4c22 ldr r4, [pc, #136] ; (800549c ) 8005412: 6863 ldr r3, [r4, #4] 8005414: f003 030c and.w r3, r3, #12 8005418: 2b08 cmp r3, #8 800541a: f43f aee2 beq.w 80051e2 800541e: 2300 movs r3, #0 8005420: 4e1f ldr r6, [pc, #124] ; (80054a0 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8005422: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8005424: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8005426: d12b bne.n 8005480 tickstart = HAL_GetTick(); 8005428: f7fe ff3e bl 80042a8 800542c: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800542e: 6823 ldr r3, [r4, #0] 8005430: 0199 lsls r1, r3, #6 8005432: d41f bmi.n 8005474 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8005434: 6a2b ldr r3, [r5, #32] 8005436: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 800543a: d105 bne.n 8005448 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 800543c: 6862 ldr r2, [r4, #4] 800543e: 68a9 ldr r1, [r5, #8] 8005440: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8005444: 430a orrs r2, r1 8005446: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8005448: 6a69 ldr r1, [r5, #36] ; 0x24 800544a: 6862 ldr r2, [r4, #4] 800544c: 430b orrs r3, r1 800544e: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8005452: 4313 orrs r3, r2 8005454: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8005456: 2301 movs r3, #1 8005458: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 800545a: f7fe ff25 bl 80042a8 800545e: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005460: 6823 ldr r3, [r4, #0] 8005462: 019a lsls r2, r3, #6 8005464: f53f aea7 bmi.w 80051b6 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8005468: f7fe ff1e bl 80042a8 800546c: 1b40 subs r0, r0, r5 800546e: 2802 cmp r0, #2 8005470: d9f6 bls.n 8005460 8005472: e6cd b.n 8005210 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8005474: f7fe ff18 bl 80042a8 8005478: 1bc0 subs r0, r0, r7 800547a: 2802 cmp r0, #2 800547c: d9d7 bls.n 800542e 800547e: e6c7 b.n 8005210 tickstart = HAL_GetTick(); 8005480: f7fe ff12 bl 80042a8 8005484: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005486: 6823 ldr r3, [r4, #0] 8005488: 019b lsls r3, r3, #6 800548a: f57f ae94 bpl.w 80051b6 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 800548e: f7fe ff0b bl 80042a8 8005492: 1b40 subs r0, r0, r5 8005494: 2802 cmp r0, #2 8005496: d9f6 bls.n 8005486 8005498: e6ba b.n 8005210 800549a: bf00 nop 800549c: 40021000 .word 0x40021000 80054a0: 42420060 .word 0x42420060 080054a4 : { 80054a4: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 80054a6: 4b19 ldr r3, [pc, #100] ; (800550c ) { 80054a8: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 80054aa: ac02 add r4, sp, #8 80054ac: f103 0510 add.w r5, r3, #16 80054b0: 4622 mov r2, r4 80054b2: 6818 ldr r0, [r3, #0] 80054b4: 6859 ldr r1, [r3, #4] 80054b6: 3308 adds r3, #8 80054b8: c203 stmia r2!, {r0, r1} 80054ba: 42ab cmp r3, r5 80054bc: 4614 mov r4, r2 80054be: d1f7 bne.n 80054b0 const uint8_t aPredivFactorTable[2] = {1, 2}; 80054c0: 2301 movs r3, #1 80054c2: f88d 3004 strb.w r3, [sp, #4] 80054c6: 2302 movs r3, #2 tmpreg = RCC->CFGR; 80054c8: 4911 ldr r1, [pc, #68] ; (8005510 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 80054ca: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 80054ce: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 80054d0: f003 020c and.w r2, r3, #12 80054d4: 2a08 cmp r2, #8 80054d6: d117 bne.n 8005508 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80054d8: f3c3 4283 ubfx r2, r3, #18, #4 80054dc: a806 add r0, sp, #24 80054de: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80054e0: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80054e2: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80054e6: d50c bpl.n 8005502 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80054e8: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80054ea: 480a ldr r0, [pc, #40] ; (8005514 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80054ec: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80054f0: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80054f2: aa06 add r2, sp, #24 80054f4: 4413 add r3, r2 80054f6: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80054fa: fbb0 f0f3 udiv r0, r0, r3 } 80054fe: b007 add sp, #28 8005500: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8005502: 4805 ldr r0, [pc, #20] ; (8005518 ) 8005504: 4350 muls r0, r2 8005506: e7fa b.n 80054fe sysclockfreq = HSE_VALUE; 8005508: 4802 ldr r0, [pc, #8] ; (8005514 ) return sysclockfreq; 800550a: e7f8 b.n 80054fe 800550c: 08008e5c .word 0x08008e5c 8005510: 40021000 .word 0x40021000 8005514: 007a1200 .word 0x007a1200 8005518: 003d0900 .word 0x003d0900 0800551c : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800551c: 4a54 ldr r2, [pc, #336] ; (8005670 ) { 800551e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8005522: 6813 ldr r3, [r2, #0] { 8005524: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8005526: f003 0307 and.w r3, r3, #7 800552a: 428b cmp r3, r1 { 800552c: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800552e: d32a bcc.n 8005586 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8005530: 6829 ldr r1, [r5, #0] 8005532: 078c lsls r4, r1, #30 8005534: d434 bmi.n 80055a0 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8005536: 07ca lsls r2, r1, #31 8005538: d447 bmi.n 80055ca if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 800553a: 4a4d ldr r2, [pc, #308] ; (8005670 ) 800553c: 6813 ldr r3, [r2, #0] 800553e: f003 0307 and.w r3, r3, #7 8005542: 429e cmp r6, r3 8005544: f0c0 8082 bcc.w 800564c if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8005548: 682a ldr r2, [r5, #0] 800554a: 4c4a ldr r4, [pc, #296] ; (8005674 ) 800554c: f012 0f04 tst.w r2, #4 8005550: f040 8087 bne.w 8005662 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8005554: 0713 lsls r3, r2, #28 8005556: d506 bpl.n 8005566 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8005558: 6863 ldr r3, [r4, #4] 800555a: 692a ldr r2, [r5, #16] 800555c: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8005560: ea43 03c2 orr.w r3, r3, r2, lsl #3 8005564: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8005566: f7ff ff9d bl 80054a4 800556a: 6863 ldr r3, [r4, #4] 800556c: 4a42 ldr r2, [pc, #264] ; (8005678 ) 800556e: f3c3 1303 ubfx r3, r3, #4, #4 8005572: 5cd3 ldrb r3, [r2, r3] 8005574: 40d8 lsrs r0, r3 8005576: 4b41 ldr r3, [pc, #260] ; (800567c ) 8005578: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 800557a: 2000 movs r0, #0 800557c: f7fe fe52 bl 8004224 return HAL_OK; 8005580: 2000 movs r0, #0 } 8005582: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8005586: 6813 ldr r3, [r2, #0] 8005588: f023 0307 bic.w r3, r3, #7 800558c: 430b orrs r3, r1 800558e: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8005590: 6813 ldr r3, [r2, #0] 8005592: f003 0307 and.w r3, r3, #7 8005596: 4299 cmp r1, r3 8005598: d0ca beq.n 8005530 return HAL_ERROR; 800559a: 2001 movs r0, #1 800559c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80055a0: 4b34 ldr r3, [pc, #208] ; (8005674 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80055a2: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 80055a6: bf1e ittt ne 80055a8: 685a ldrne r2, [r3, #4] 80055aa: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 80055ae: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80055b0: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80055b2: bf42 ittt mi 80055b4: 685a ldrmi r2, [r3, #4] 80055b6: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 80055ba: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80055bc: 685a ldr r2, [r3, #4] 80055be: 68a8 ldr r0, [r5, #8] 80055c0: f022 02f0 bic.w r2, r2, #240 ; 0xf0 80055c4: 4302 orrs r2, r0 80055c6: 605a str r2, [r3, #4] 80055c8: e7b5 b.n 8005536 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80055ca: 686a ldr r2, [r5, #4] 80055cc: 4c29 ldr r4, [pc, #164] ; (8005674 ) 80055ce: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80055d0: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80055d2: d11c bne.n 800560e if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80055d4: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80055d8: d0df beq.n 800559a __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80055da: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80055dc: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80055e0: f023 0303 bic.w r3, r3, #3 80055e4: 4313 orrs r3, r2 80055e6: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 80055e8: f7fe fe5e bl 80042a8 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80055ec: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 80055ee: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80055f0: 2b01 cmp r3, #1 80055f2: d114 bne.n 800561e while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 80055f4: 6863 ldr r3, [r4, #4] 80055f6: f003 030c and.w r3, r3, #12 80055fa: 2b04 cmp r3, #4 80055fc: d09d beq.n 800553a if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80055fe: f7fe fe53 bl 80042a8 8005602: 1bc0 subs r0, r0, r7 8005604: 4540 cmp r0, r8 8005606: d9f5 bls.n 80055f4 return HAL_TIMEOUT; 8005608: 2003 movs r0, #3 800560a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 800560e: 2a02 cmp r2, #2 8005610: d102 bne.n 8005618 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005612: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8005616: e7df b.n 80055d8 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8005618: f013 0f02 tst.w r3, #2 800561c: e7dc b.n 80055d8 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 800561e: 2b02 cmp r3, #2 8005620: d10f bne.n 8005642 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8005622: 6863 ldr r3, [r4, #4] 8005624: f003 030c and.w r3, r3, #12 8005628: 2b08 cmp r3, #8 800562a: d086 beq.n 800553a if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 800562c: f7fe fe3c bl 80042a8 8005630: 1bc0 subs r0, r0, r7 8005632: 4540 cmp r0, r8 8005634: d9f5 bls.n 8005622 8005636: e7e7 b.n 8005608 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8005638: f7fe fe36 bl 80042a8 800563c: 1bc0 subs r0, r0, r7 800563e: 4540 cmp r0, r8 8005640: d8e2 bhi.n 8005608 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8005642: 6863 ldr r3, [r4, #4] 8005644: f013 0f0c tst.w r3, #12 8005648: d1f6 bne.n 8005638 800564a: e776 b.n 800553a __HAL_FLASH_SET_LATENCY(FLatency); 800564c: 6813 ldr r3, [r2, #0] 800564e: f023 0307 bic.w r3, r3, #7 8005652: 4333 orrs r3, r6 8005654: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8005656: 6813 ldr r3, [r2, #0] 8005658: f003 0307 and.w r3, r3, #7 800565c: 429e cmp r6, r3 800565e: d19c bne.n 800559a 8005660: e772 b.n 8005548 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8005662: 6863 ldr r3, [r4, #4] 8005664: 68e9 ldr r1, [r5, #12] 8005666: f423 63e0 bic.w r3, r3, #1792 ; 0x700 800566a: 430b orrs r3, r1 800566c: 6063 str r3, [r4, #4] 800566e: e771 b.n 8005554 8005670: 40022000 .word 0x40022000 8005674: 40021000 .word 0x40021000 8005678: 080090c0 .word 0x080090c0 800567c: 20000010 .word 0x20000010 08005680 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8005680: 4b04 ldr r3, [pc, #16] ; (8005694 ) 8005682: 4a05 ldr r2, [pc, #20] ; (8005698 ) 8005684: 685b ldr r3, [r3, #4] 8005686: f3c3 2302 ubfx r3, r3, #8, #3 800568a: 5cd3 ldrb r3, [r2, r3] 800568c: 4a03 ldr r2, [pc, #12] ; (800569c ) 800568e: 6810 ldr r0, [r2, #0] } 8005690: 40d8 lsrs r0, r3 8005692: 4770 bx lr 8005694: 40021000 .word 0x40021000 8005698: 080090d0 .word 0x080090d0 800569c: 20000010 .word 0x20000010 080056a0 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 80056a0: 4b04 ldr r3, [pc, #16] ; (80056b4 ) 80056a2: 4a05 ldr r2, [pc, #20] ; (80056b8 ) 80056a4: 685b ldr r3, [r3, #4] 80056a6: f3c3 23c2 ubfx r3, r3, #11, #3 80056aa: 5cd3 ldrb r3, [r2, r3] 80056ac: 4a03 ldr r2, [pc, #12] ; (80056bc ) 80056ae: 6810 ldr r0, [r2, #0] } 80056b0: 40d8 lsrs r0, r3 80056b2: 4770 bx lr 80056b4: 40021000 .word 0x40021000 80056b8: 080090d0 .word 0x080090d0 80056bc: 20000010 .word 0x20000010 080056c0 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80056c0: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 80056c2: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80056c4: 68da ldr r2, [r3, #12] 80056c6: f042 0201 orr.w r2, r2, #1 80056ca: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 80056cc: 681a ldr r2, [r3, #0] 80056ce: f042 0201 orr.w r2, r2, #1 80056d2: 601a str r2, [r3, #0] } 80056d4: 4770 bx lr 080056d6 : 80056d6: 4770 bx lr 080056d8 : 80056d8: 4770 bx lr 080056da : 80056da: 4770 bx lr 080056dc : 80056dc: 4770 bx lr 080056de : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80056de: 6803 ldr r3, [r0, #0] { 80056e0: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80056e2: 691a ldr r2, [r3, #16] { 80056e4: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80056e6: 0791 lsls r1, r2, #30 80056e8: d50e bpl.n 8005708 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 80056ea: 68da ldr r2, [r3, #12] 80056ec: 0792 lsls r2, r2, #30 80056ee: d50b bpl.n 8005708 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80056f0: f06f 0202 mvn.w r2, #2 80056f4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80056f6: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80056f8: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80056fa: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80056fc: 079b lsls r3, r3, #30 80056fe: d077 beq.n 80057f0 { HAL_TIM_IC_CaptureCallback(htim); 8005700: f7ff ffea bl 80056d8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8005704: 2300 movs r3, #0 8005706: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8005708: 6823 ldr r3, [r4, #0] 800570a: 691a ldr r2, [r3, #16] 800570c: 0750 lsls r0, r2, #29 800570e: d510 bpl.n 8005732 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8005710: 68da ldr r2, [r3, #12] 8005712: 0751 lsls r1, r2, #29 8005714: d50d bpl.n 8005732 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8005716: f06f 0204 mvn.w r2, #4 800571a: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 800571c: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 800571e: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8005720: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8005722: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8005726: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8005728: d068 beq.n 80057fc HAL_TIM_IC_CaptureCallback(htim); 800572a: f7ff ffd5 bl 80056d8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800572e: 2300 movs r3, #0 8005730: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8005732: 6823 ldr r3, [r4, #0] 8005734: 691a ldr r2, [r3, #16] 8005736: 0712 lsls r2, r2, #28 8005738: d50f bpl.n 800575a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 800573a: 68da ldr r2, [r3, #12] 800573c: 0710 lsls r0, r2, #28 800573e: d50c bpl.n 800575a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8005740: f06f 0208 mvn.w r2, #8 8005744: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8005746: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8005748: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800574a: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800574c: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 800574e: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8005750: d05a beq.n 8005808 HAL_TIM_IC_CaptureCallback(htim); 8005752: f7ff ffc1 bl 80056d8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8005756: 2300 movs r3, #0 8005758: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 800575a: 6823 ldr r3, [r4, #0] 800575c: 691a ldr r2, [r3, #16] 800575e: 06d2 lsls r2, r2, #27 8005760: d510 bpl.n 8005784 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8005762: 68da ldr r2, [r3, #12] 8005764: 06d0 lsls r0, r2, #27 8005766: d50d bpl.n 8005784 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8005768: f06f 0210 mvn.w r2, #16 800576c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 800576e: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8005770: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8005772: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8005774: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8005778: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800577a: d04b beq.n 8005814 HAL_TIM_IC_CaptureCallback(htim); 800577c: f7ff ffac bl 80056d8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8005780: 2300 movs r3, #0 8005782: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8005784: 6823 ldr r3, [r4, #0] 8005786: 691a ldr r2, [r3, #16] 8005788: 07d1 lsls r1, r2, #31 800578a: d508 bpl.n 800579e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 800578c: 68da ldr r2, [r3, #12] 800578e: 07d2 lsls r2, r2, #31 8005790: d505 bpl.n 800579e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8005792: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8005796: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8005798: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 800579a: f001 fc2f bl 8006ffc } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 800579e: 6823 ldr r3, [r4, #0] 80057a0: 691a ldr r2, [r3, #16] 80057a2: 0610 lsls r0, r2, #24 80057a4: d508 bpl.n 80057b8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 80057a6: 68da ldr r2, [r3, #12] 80057a8: 0611 lsls r1, r2, #24 80057aa: d505 bpl.n 80057b8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80057ac: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 80057b0: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80057b2: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 80057b4: f000 f8bf bl 8005936 } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 80057b8: 6823 ldr r3, [r4, #0] 80057ba: 691a ldr r2, [r3, #16] 80057bc: 0652 lsls r2, r2, #25 80057be: d508 bpl.n 80057d2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 80057c0: 68da ldr r2, [r3, #12] 80057c2: 0650 lsls r0, r2, #25 80057c4: d505 bpl.n 80057d2 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80057c6: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80057ca: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80057cc: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80057ce: f7ff ff85 bl 80056dc } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80057d2: 6823 ldr r3, [r4, #0] 80057d4: 691a ldr r2, [r3, #16] 80057d6: 0691 lsls r1, r2, #26 80057d8: d522 bpl.n 8005820 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 80057da: 68da ldr r2, [r3, #12] 80057dc: 0692 lsls r2, r2, #26 80057de: d51f bpl.n 8005820 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80057e0: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 80057e4: 4620 mov r0, r4 } } } 80057e6: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80057ea: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 80057ec: f000 b8a2 b.w 8005934 HAL_TIM_OC_DelayElapsedCallback(htim); 80057f0: f7ff ff71 bl 80056d6 HAL_TIM_PWM_PulseFinishedCallback(htim); 80057f4: 4620 mov r0, r4 80057f6: f7ff ff70 bl 80056da 80057fa: e783 b.n 8005704 HAL_TIM_OC_DelayElapsedCallback(htim); 80057fc: f7ff ff6b bl 80056d6 HAL_TIM_PWM_PulseFinishedCallback(htim); 8005800: 4620 mov r0, r4 8005802: f7ff ff6a bl 80056da 8005806: e792 b.n 800572e HAL_TIM_OC_DelayElapsedCallback(htim); 8005808: f7ff ff65 bl 80056d6 HAL_TIM_PWM_PulseFinishedCallback(htim); 800580c: 4620 mov r0, r4 800580e: f7ff ff64 bl 80056da 8005812: e7a0 b.n 8005756 HAL_TIM_OC_DelayElapsedCallback(htim); 8005814: f7ff ff5f bl 80056d6 HAL_TIM_PWM_PulseFinishedCallback(htim); 8005818: 4620 mov r0, r4 800581a: f7ff ff5e bl 80056da 800581e: e7af b.n 8005780 8005820: bd10 pop {r4, pc} ... 08005824 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8005824: 4a24 ldr r2, [pc, #144] ; (80058b8 ) tmpcr1 = TIMx->CR1; 8005826: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8005828: 4290 cmp r0, r2 800582a: d012 beq.n 8005852 800582c: f502 6200 add.w r2, r2, #2048 ; 0x800 8005830: 4290 cmp r0, r2 8005832: d00e beq.n 8005852 8005834: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8005838: d00b beq.n 8005852 800583a: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 800583e: 4290 cmp r0, r2 8005840: d007 beq.n 8005852 8005842: f502 6280 add.w r2, r2, #1024 ; 0x400 8005846: 4290 cmp r0, r2 8005848: d003 beq.n 8005852 800584a: f502 6280 add.w r2, r2, #1024 ; 0x400 800584e: 4290 cmp r0, r2 8005850: d11d bne.n 800588e { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8005852: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8005854: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8005858: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800585a: 4a17 ldr r2, [pc, #92] ; (80058b8 ) 800585c: 4290 cmp r0, r2 800585e: d012 beq.n 8005886 8005860: f502 6200 add.w r2, r2, #2048 ; 0x800 8005864: 4290 cmp r0, r2 8005866: d00e beq.n 8005886 8005868: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 800586c: d00b beq.n 8005886 800586e: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8005872: 4290 cmp r0, r2 8005874: d007 beq.n 8005886 8005876: f502 6280 add.w r2, r2, #1024 ; 0x400 800587a: 4290 cmp r0, r2 800587c: d003 beq.n 8005886 800587e: f502 6280 add.w r2, r2, #1024 ; 0x400 8005882: 4290 cmp r0, r2 8005884: d103 bne.n 800588e { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 8005886: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8005888: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 800588c: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 800588e: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8005890: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8005894: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 8005896: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8005898: 688b ldr r3, [r1, #8] 800589a: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 800589c: 680b ldr r3, [r1, #0] 800589e: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 80058a0: 4b05 ldr r3, [pc, #20] ; (80058b8 ) 80058a2: 4298 cmp r0, r3 80058a4: d003 beq.n 80058ae 80058a6: f503 6300 add.w r3, r3, #2048 ; 0x800 80058aa: 4298 cmp r0, r3 80058ac: d101 bne.n 80058b2 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 80058ae: 690b ldr r3, [r1, #16] 80058b0: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 80058b2: 2301 movs r3, #1 80058b4: 6143 str r3, [r0, #20] 80058b6: 4770 bx lr 80058b8: 40012c00 .word 0x40012c00 080058bc : { 80058bc: b510 push {r4, lr} if(htim == NULL) 80058be: 4604 mov r4, r0 80058c0: b1a0 cbz r0, 80058ec if(htim->State == HAL_TIM_STATE_RESET) 80058c2: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 80058c6: f003 02ff and.w r2, r3, #255 ; 0xff 80058ca: b91b cbnz r3, 80058d4 htim->Lock = HAL_UNLOCKED; 80058cc: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80058d0: f002 f910 bl 8007af4 htim->State= HAL_TIM_STATE_BUSY; 80058d4: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80058d6: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 80058d8: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80058dc: 1d21 adds r1, r4, #4 80058de: f7ff ffa1 bl 8005824 htim->State= HAL_TIM_STATE_READY; 80058e2: 2301 movs r3, #1 return HAL_OK; 80058e4: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 80058e6: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80058ea: bd10 pop {r4, pc} return HAL_ERROR; 80058ec: 2001 movs r0, #1 } 80058ee: bd10 pop {r4, pc} 080058f0 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 80058f0: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80058f4: b510 push {r4, lr} __HAL_LOCK(htim); 80058f6: 2b01 cmp r3, #1 80058f8: f04f 0302 mov.w r3, #2 80058fc: d018 beq.n 8005930 htim->State = HAL_TIM_STATE_BUSY; 80058fe: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 8005902: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8005904: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 8005906: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8005908: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 800590a: f022 0270 bic.w r2, r2, #112 ; 0x70 800590e: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8005910: 685a ldr r2, [r3, #4] 8005912: 4322 orrs r2, r4 8005914: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 8005916: 689a ldr r2, [r3, #8] 8005918: f022 0280 bic.w r2, r2, #128 ; 0x80 800591c: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 800591e: 689a ldr r2, [r3, #8] 8005920: 430a orrs r2, r1 8005922: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 8005924: 2301 movs r3, #1 8005926: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 800592a: 2300 movs r3, #0 800592c: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8005930: 4618 mov r0, r3 return HAL_OK; } 8005932: bd10 pop {r4, pc} 08005934 : 8005934: 4770 bx lr 08005936 : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8005936: 4770 bx lr 08005938 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8005938: 6803 ldr r3, [r0, #0] 800593a: 68da ldr r2, [r3, #12] 800593c: f422 7290 bic.w r2, r2, #288 ; 0x120 8005940: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005942: 695a ldr r2, [r3, #20] 8005944: f022 0201 bic.w r2, r2, #1 8005948: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 800594a: 2320 movs r3, #32 800594c: f880 303a strb.w r3, [r0, #58] ; 0x3a 8005950: 4770 bx lr ... 08005954 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8005954: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8005958: 6805 ldr r5, [r0, #0] 800595a: 68c2 ldr r2, [r0, #12] 800595c: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800595e: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8005960: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8005964: 4313 orrs r3, r2 8005966: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005968: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 800596a: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800596c: 430b orrs r3, r1 800596e: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8005970: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 8005974: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005978: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 800597a: 4313 orrs r3, r2 800597c: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 800597e: 696b ldr r3, [r5, #20] 8005980: 6982 ldr r2, [r0, #24] 8005982: f423 7340 bic.w r3, r3, #768 ; 0x300 8005986: 4313 orrs r3, r2 8005988: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 800598a: 4b40 ldr r3, [pc, #256] ; (8005a8c ) { 800598c: 4681 mov r9, r0 if(huart->Instance == USART1) 800598e: 429d cmp r5, r3 8005990: f04f 0419 mov.w r4, #25 8005994: d146 bne.n 8005a24 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8005996: f7ff fe83 bl 80056a0 800599a: fb04 f300 mul.w r3, r4, r0 800599e: f8d9 6004 ldr.w r6, [r9, #4] 80059a2: f04f 0864 mov.w r8, #100 ; 0x64 80059a6: 00b6 lsls r6, r6, #2 80059a8: fbb3 f3f6 udiv r3, r3, r6 80059ac: fbb3 f3f8 udiv r3, r3, r8 80059b0: 011e lsls r6, r3, #4 80059b2: f7ff fe75 bl 80056a0 80059b6: 4360 muls r0, r4 80059b8: f8d9 3004 ldr.w r3, [r9, #4] 80059bc: 009b lsls r3, r3, #2 80059be: fbb0 f7f3 udiv r7, r0, r3 80059c2: f7ff fe6d bl 80056a0 80059c6: 4360 muls r0, r4 80059c8: f8d9 3004 ldr.w r3, [r9, #4] 80059cc: 009b lsls r3, r3, #2 80059ce: fbb0 f3f3 udiv r3, r0, r3 80059d2: fbb3 f3f8 udiv r3, r3, r8 80059d6: fb08 7313 mls r3, r8, r3, r7 80059da: 011b lsls r3, r3, #4 80059dc: 3332 adds r3, #50 ; 0x32 80059de: fbb3 f3f8 udiv r3, r3, r8 80059e2: f003 07f0 and.w r7, r3, #240 ; 0xf0 80059e6: f7ff fe5b bl 80056a0 80059ea: 4360 muls r0, r4 80059ec: f8d9 2004 ldr.w r2, [r9, #4] 80059f0: 0092 lsls r2, r2, #2 80059f2: fbb0 faf2 udiv sl, r0, r2 80059f6: f7ff fe53 bl 80056a0 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80059fa: 4360 muls r0, r4 80059fc: f8d9 3004 ldr.w r3, [r9, #4] 8005a00: 009b lsls r3, r3, #2 8005a02: fbb0 f3f3 udiv r3, r0, r3 8005a06: fbb3 f3f8 udiv r3, r3, r8 8005a0a: fb08 a313 mls r3, r8, r3, sl 8005a0e: 011b lsls r3, r3, #4 8005a10: 3332 adds r3, #50 ; 0x32 8005a12: fbb3 f3f8 udiv r3, r3, r8 8005a16: f003 030f and.w r3, r3, #15 8005a1a: 433b orrs r3, r7 8005a1c: 4433 add r3, r6 8005a1e: 60ab str r3, [r5, #8] 8005a20: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8005a24: f7ff fe2c bl 8005680 8005a28: fb04 f300 mul.w r3, r4, r0 8005a2c: f8d9 6004 ldr.w r6, [r9, #4] 8005a30: f04f 0864 mov.w r8, #100 ; 0x64 8005a34: 00b6 lsls r6, r6, #2 8005a36: fbb3 f3f6 udiv r3, r3, r6 8005a3a: fbb3 f3f8 udiv r3, r3, r8 8005a3e: 011e lsls r6, r3, #4 8005a40: f7ff fe1e bl 8005680 8005a44: 4360 muls r0, r4 8005a46: f8d9 3004 ldr.w r3, [r9, #4] 8005a4a: 009b lsls r3, r3, #2 8005a4c: fbb0 f7f3 udiv r7, r0, r3 8005a50: f7ff fe16 bl 8005680 8005a54: 4360 muls r0, r4 8005a56: f8d9 3004 ldr.w r3, [r9, #4] 8005a5a: 009b lsls r3, r3, #2 8005a5c: fbb0 f3f3 udiv r3, r0, r3 8005a60: fbb3 f3f8 udiv r3, r3, r8 8005a64: fb08 7313 mls r3, r8, r3, r7 8005a68: 011b lsls r3, r3, #4 8005a6a: 3332 adds r3, #50 ; 0x32 8005a6c: fbb3 f3f8 udiv r3, r3, r8 8005a70: f003 07f0 and.w r7, r3, #240 ; 0xf0 8005a74: f7ff fe04 bl 8005680 8005a78: 4360 muls r0, r4 8005a7a: f8d9 2004 ldr.w r2, [r9, #4] 8005a7e: 0092 lsls r2, r2, #2 8005a80: fbb0 faf2 udiv sl, r0, r2 8005a84: f7ff fdfc bl 8005680 8005a88: e7b7 b.n 80059fa 8005a8a: bf00 nop 8005a8c: 40013800 .word 0x40013800 08005a90 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8005a90: b5f8 push {r3, r4, r5, r6, r7, lr} 8005a92: 4604 mov r4, r0 8005a94: 460e mov r6, r1 8005a96: 4617 mov r7, r2 8005a98: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8005a9a: 6821 ldr r1, [r4, #0] 8005a9c: 680b ldr r3, [r1, #0] 8005a9e: ea36 0303 bics.w r3, r6, r3 8005aa2: d101 bne.n 8005aa8 return HAL_OK; 8005aa4: 2000 movs r0, #0 } 8005aa6: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8005aa8: 1c6b adds r3, r5, #1 8005aaa: d0f7 beq.n 8005a9c if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8005aac: b995 cbnz r5, 8005ad4 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8005aae: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8005ab0: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8005ab2: 68da ldr r2, [r3, #12] 8005ab4: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8005ab8: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005aba: 695a ldr r2, [r3, #20] 8005abc: f022 0201 bic.w r2, r2, #1 8005ac0: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8005ac2: 2320 movs r3, #32 8005ac4: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8005ac8: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 8005acc: 2300 movs r3, #0 8005ace: f884 3038 strb.w r3, [r4, #56] ; 0x38 8005ad2: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8005ad4: f7fe fbe8 bl 80042a8 8005ad8: 1bc0 subs r0, r0, r7 8005ada: 4285 cmp r5, r0 8005adc: d2dd bcs.n 8005a9a 8005ade: e7e6 b.n 8005aae 08005ae0 : { 8005ae0: b510 push {r4, lr} if(huart == NULL) 8005ae2: 4604 mov r4, r0 8005ae4: b340 cbz r0, 8005b38 if(huart->gState == HAL_UART_STATE_RESET) 8005ae6: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 8005aea: f003 02ff and.w r2, r3, #255 ; 0xff 8005aee: b91b cbnz r3, 8005af8 huart->Lock = HAL_UNLOCKED; 8005af0: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8005af4: f002 f812 bl 8007b1c huart->gState = HAL_UART_STATE_BUSY; 8005af8: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 8005afa: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8005afc: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8005b00: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8005b02: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8005b04: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8005b08: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 8005b0a: f7ff ff23 bl 8005954 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8005b0e: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8005b10: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8005b12: 691a ldr r2, [r3, #16] 8005b14: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8005b18: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8005b1a: 695a ldr r2, [r3, #20] 8005b1c: f022 022a bic.w r2, r2, #42 ; 0x2a 8005b20: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8005b22: 68da ldr r2, [r3, #12] 8005b24: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8005b28: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8005b2a: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005b2c: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8005b2e: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 8005b32: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 8005b36: bd10 pop {r4, pc} return HAL_ERROR; 8005b38: 2001 movs r0, #1 } 8005b3a: bd10 pop {r4, pc} 08005b3c : { 8005b3c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8005b40: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 8005b42: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 8005b46: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8005b48: 2b20 cmp r3, #32 { 8005b4a: 460d mov r5, r1 8005b4c: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8005b4e: d14e bne.n 8005bee if((pData == NULL) || (Size == 0U)) 8005b50: 2900 cmp r1, #0 8005b52: d049 beq.n 8005be8 8005b54: 2a00 cmp r2, #0 8005b56: d047 beq.n 8005be8 __HAL_LOCK(huart); 8005b58: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8005b5c: 2b01 cmp r3, #1 8005b5e: d046 beq.n 8005bee 8005b60: 2301 movs r3, #1 8005b62: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005b66: 2300 movs r3, #0 8005b68: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8005b6a: 2321 movs r3, #33 ; 0x21 8005b6c: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8005b70: f7fe fb9a bl 80042a8 8005b74: 4606 mov r6, r0 huart->TxXferSize = Size; 8005b76: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8005b7a: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8005b7e: 8ce3 ldrh r3, [r4, #38] ; 0x26 8005b80: b29b uxth r3, r3 8005b82: b96b cbnz r3, 8005ba0 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8005b84: 463b mov r3, r7 8005b86: 4632 mov r2, r6 8005b88: 2140 movs r1, #64 ; 0x40 8005b8a: 4620 mov r0, r4 8005b8c: f7ff ff80 bl 8005a90 8005b90: b9a8 cbnz r0, 8005bbe huart->gState = HAL_UART_STATE_READY; 8005b92: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8005b94: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8005b98: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8005b9c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8005ba0: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005ba2: 4632 mov r2, r6 huart->TxXferCount--; 8005ba4: 3b01 subs r3, #1 8005ba6: b29b uxth r3, r3 8005ba8: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005baa: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005bac: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005bae: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005bb2: 4620 mov r0, r4 8005bb4: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005bb6: d10e bne.n 8005bd6 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005bb8: f7ff ff6a bl 8005a90 8005bbc: b110 cbz r0, 8005bc4 return HAL_TIMEOUT; 8005bbe: 2003 movs r0, #3 8005bc0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 8005bc4: 882b ldrh r3, [r5, #0] 8005bc6: 6822 ldr r2, [r4, #0] 8005bc8: f3c3 0308 ubfx r3, r3, #0, #9 8005bcc: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005bce: 6923 ldr r3, [r4, #16] 8005bd0: b943 cbnz r3, 8005be4 pData +=2U; 8005bd2: 3502 adds r5, #2 8005bd4: e7d3 b.n 8005b7e if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005bd6: f7ff ff5b bl 8005a90 8005bda: 2800 cmp r0, #0 8005bdc: d1ef bne.n 8005bbe huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 8005bde: 6823 ldr r3, [r4, #0] 8005be0: 782a ldrb r2, [r5, #0] 8005be2: 605a str r2, [r3, #4] 8005be4: 3501 adds r5, #1 8005be6: e7ca b.n 8005b7e return HAL_ERROR; 8005be8: 2001 movs r0, #1 8005bea: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8005bee: 2002 movs r0, #2 } 8005bf0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08005bf4 : { 8005bf4: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 8005bf6: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 8005bfa: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 8005bfc: 2a20 cmp r2, #32 { 8005bfe: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 8005c00: d138 bne.n 8005c74 if((pData == NULL) || (Size == 0U)) 8005c02: 2900 cmp r1, #0 8005c04: d034 beq.n 8005c70 8005c06: 2b00 cmp r3, #0 8005c08: d032 beq.n 8005c70 __HAL_LOCK(huart); 8005c0a: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 8005c0e: 2a01 cmp r2, #1 8005c10: d030 beq.n 8005c74 8005c12: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005c14: 2400 movs r4, #0 __HAL_LOCK(huart); 8005c16: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 8005c1a: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8005c1c: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 8005c1e: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8005c20: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8005c22: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8005c26: 6b40 ldr r0, [r0, #52] ; 0x34 8005c28: 4a13 ldr r2, [pc, #76] ; (8005c78 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8005c2a: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8005c2c: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8005c2e: 4a13 ldr r2, [pc, #76] ; (8005c7c ) huart->hdmarx->XferAbortCallback = NULL; 8005c30: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8005c32: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8005c34: 4a12 ldr r2, [pc, #72] ; (8005c80 ) 8005c36: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8005c38: 460a mov r2, r1 8005c3a: 1d31 adds r1, r6, #4 8005c3c: f7fe fbf4 bl 8004428 return HAL_OK; 8005c40: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 8005c42: 682b ldr r3, [r5, #0] 8005c44: 9401 str r4, [sp, #4] 8005c46: 681a ldr r2, [r3, #0] 8005c48: 9201 str r2, [sp, #4] 8005c4a: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8005c4c: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8005c50: 9201 str r2, [sp, #4] 8005c52: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8005c54: 68da ldr r2, [r3, #12] 8005c56: f442 7280 orr.w r2, r2, #256 ; 0x100 8005c5a: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005c5c: 695a ldr r2, [r3, #20] 8005c5e: f042 0201 orr.w r2, r2, #1 8005c62: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005c64: 695a ldr r2, [r3, #20] 8005c66: f042 0240 orr.w r2, r2, #64 ; 0x40 8005c6a: 615a str r2, [r3, #20] } 8005c6c: b002 add sp, #8 8005c6e: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8005c70: 2001 movs r0, #1 8005c72: e7fb b.n 8005c6c return HAL_BUSY; 8005c74: 2002 movs r0, #2 8005c76: e7f9 b.n 8005c6c 8005c78: 08005c87 .word 0x08005c87 8005c7c: 08005d3d .word 0x08005d3d 8005c80: 08005d49 .word 0x08005d49 08005c84 : 8005c84: 4770 bx lr 08005c86 : { 8005c86: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005c88: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005c8a: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005c8c: 681b ldr r3, [r3, #0] 8005c8e: f013 0320 ands.w r3, r3, #32 8005c92: d110 bne.n 8005cb6 huart->RxXferCount = 0U; 8005c94: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8005c96: 6813 ldr r3, [r2, #0] 8005c98: 68d9 ldr r1, [r3, #12] 8005c9a: f421 7180 bic.w r1, r1, #256 ; 0x100 8005c9e: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005ca0: 6959 ldr r1, [r3, #20] 8005ca2: f021 0101 bic.w r1, r1, #1 8005ca6: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005ca8: 6959 ldr r1, [r3, #20] 8005caa: f021 0140 bic.w r1, r1, #64 ; 0x40 8005cae: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8005cb0: 2320 movs r3, #32 8005cb2: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8005cb6: 4610 mov r0, r2 8005cb8: f001 f96e bl 8006f98 8005cbc: bd08 pop {r3, pc} 08005cbe : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8005cbe: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8005cc2: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8005cc4: 2b22 cmp r3, #34 ; 0x22 8005cc6: d136 bne.n 8005d36 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005cc8: 6883 ldr r3, [r0, #8] 8005cca: 6901 ldr r1, [r0, #16] 8005ccc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8005cd0: 6802 ldr r2, [r0, #0] 8005cd2: 6a83 ldr r3, [r0, #40] ; 0x28 8005cd4: d123 bne.n 8005d1e *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8005cd6: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005cd8: b9e9 cbnz r1, 8005d16 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8005cda: f3c2 0208 ubfx r2, r2, #0, #9 8005cde: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8005ce2: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8005ce4: 8dc4 ldrh r4, [r0, #46] ; 0x2e 8005ce6: 3c01 subs r4, #1 8005ce8: b2a4 uxth r4, r4 8005cea: 85c4 strh r4, [r0, #46] ; 0x2e 8005cec: b98c cbnz r4, 8005d12 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 8005cee: 6803 ldr r3, [r0, #0] 8005cf0: 68da ldr r2, [r3, #12] 8005cf2: f022 0220 bic.w r2, r2, #32 8005cf6: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8005cf8: 68da ldr r2, [r3, #12] 8005cfa: f422 7280 bic.w r2, r2, #256 ; 0x100 8005cfe: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 8005d00: 695a ldr r2, [r3, #20] 8005d02: f022 0201 bic.w r2, r2, #1 8005d06: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8005d08: 2320 movs r3, #32 8005d0a: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8005d0e: f001 f943 bl 8006f98 if(--huart->RxXferCount == 0U) 8005d12: 2000 movs r0, #0 } 8005d14: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 8005d16: b2d2 uxtb r2, r2 8005d18: f823 2b01 strh.w r2, [r3], #1 8005d1c: e7e1 b.n 8005ce2 if(huart->Init.Parity == UART_PARITY_NONE) 8005d1e: b921 cbnz r1, 8005d2a *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8005d20: 1c59 adds r1, r3, #1 8005d22: 6852 ldr r2, [r2, #4] 8005d24: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8005d26: 701a strb r2, [r3, #0] 8005d28: e7dc b.n 8005ce4 8005d2a: 6852 ldr r2, [r2, #4] 8005d2c: 1c59 adds r1, r3, #1 8005d2e: 6281 str r1, [r0, #40] ; 0x28 8005d30: f002 027f and.w r2, r2, #127 ; 0x7f 8005d34: e7f7 b.n 8005d26 return HAL_BUSY; 8005d36: 2002 movs r0, #2 8005d38: bd10 pop {r4, pc} 08005d3a : 8005d3a: 4770 bx lr 08005d3c : { 8005d3c: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8005d3e: 6a40 ldr r0, [r0, #36] ; 0x24 8005d40: f7ff fffb bl 8005d3a 8005d44: bd08 pop {r3, pc} 08005d46 : 8005d46: 4770 bx lr 08005d48 : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005d48: 6a41 ldr r1, [r0, #36] ; 0x24 { 8005d4a: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8005d4c: 680b ldr r3, [r1, #0] 8005d4e: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8005d50: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8005d54: 2821 cmp r0, #33 ; 0x21 8005d56: d10a bne.n 8005d6e 8005d58: 0612 lsls r2, r2, #24 8005d5a: d508 bpl.n 8005d6e huart->TxXferCount = 0U; 8005d5c: 2200 movs r2, #0 8005d5e: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8005d60: 68da ldr r2, [r3, #12] 8005d62: f022 02c0 bic.w r2, r2, #192 ; 0xc0 8005d66: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8005d68: 2220 movs r2, #32 8005d6a: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005d6e: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8005d70: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8005d74: 2a22 cmp r2, #34 ; 0x22 8005d76: d106 bne.n 8005d86 8005d78: 065b lsls r3, r3, #25 8005d7a: d504 bpl.n 8005d86 huart->RxXferCount = 0U; 8005d7c: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8005d7e: 4608 mov r0, r1 huart->RxXferCount = 0U; 8005d80: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8005d82: f7ff fdd9 bl 8005938 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8005d86: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8005d88: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8005d8a: f043 0310 orr.w r3, r3, #16 8005d8e: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8005d90: f7ff ffd9 bl 8005d46 8005d94: bd08 pop {r3, pc} ... 08005d98 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8005d98: 6803 ldr r3, [r0, #0] { 8005d9a: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8005d9c: 681a ldr r2, [r3, #0] { 8005d9e: 4604 mov r4, r0 if(errorflags == RESET) 8005da0: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8005da2: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8005da4: 695d ldr r5, [r3, #20] if(errorflags == RESET) 8005da6: d107 bne.n 8005db8 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8005da8: 0696 lsls r6, r2, #26 8005daa: d55a bpl.n 8005e62 8005dac: 068d lsls r5, r1, #26 8005dae: d558 bpl.n 8005e62 } 8005db0: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8005db4: f7ff bf83 b.w 8005cbe if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8005db8: f015 0501 ands.w r5, r5, #1 8005dbc: d102 bne.n 8005dc4 8005dbe: f411 7f90 tst.w r1, #288 ; 0x120 8005dc2: d04e beq.n 8005e62 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8005dc4: 07d3 lsls r3, r2, #31 8005dc6: d505 bpl.n 8005dd4 8005dc8: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 8005dca: bf42 ittt mi 8005dcc: 6be3 ldrmi r3, [r4, #60] ; 0x3c 8005dce: f043 0301 orrmi.w r3, r3, #1 8005dd2: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005dd4: 0750 lsls r0, r2, #29 8005dd6: d504 bpl.n 8005de2 8005dd8: b11d cbz r5, 8005de2 huart->ErrorCode |= HAL_UART_ERROR_NE; 8005dda: 6be3 ldr r3, [r4, #60] ; 0x3c 8005ddc: f043 0302 orr.w r3, r3, #2 8005de0: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005de2: 0793 lsls r3, r2, #30 8005de4: d504 bpl.n 8005df0 8005de6: b11d cbz r5, 8005df0 huart->ErrorCode |= HAL_UART_ERROR_FE; 8005de8: 6be3 ldr r3, [r4, #60] ; 0x3c 8005dea: f043 0304 orr.w r3, r3, #4 8005dee: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005df0: 0716 lsls r6, r2, #28 8005df2: d504 bpl.n 8005dfe 8005df4: b11d cbz r5, 8005dfe huart->ErrorCode |= HAL_UART_ERROR_ORE; 8005df6: 6be3 ldr r3, [r4, #60] ; 0x3c 8005df8: f043 0308 orr.w r3, r3, #8 8005dfc: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8005dfe: 6be3 ldr r3, [r4, #60] ; 0x3c 8005e00: 2b00 cmp r3, #0 8005e02: d066 beq.n 8005ed2 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8005e04: 0695 lsls r5, r2, #26 8005e06: d504 bpl.n 8005e12 8005e08: 0688 lsls r0, r1, #26 8005e0a: d502 bpl.n 8005e12 UART_Receive_IT(huart); 8005e0c: 4620 mov r0, r4 8005e0e: f7ff ff56 bl 8005cbe dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005e12: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8005e14: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005e16: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8005e18: 6be2 ldr r2, [r4, #60] ; 0x3c 8005e1a: 0711 lsls r1, r2, #28 8005e1c: d402 bmi.n 8005e24 8005e1e: f015 0540 ands.w r5, r5, #64 ; 0x40 8005e22: d01a beq.n 8005e5a UART_EndRxTransfer(huart); 8005e24: f7ff fd88 bl 8005938 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8005e28: 6823 ldr r3, [r4, #0] 8005e2a: 695a ldr r2, [r3, #20] 8005e2c: 0652 lsls r2, r2, #25 8005e2e: d510 bpl.n 8005e52 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005e30: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8005e32: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005e34: f022 0240 bic.w r2, r2, #64 ; 0x40 8005e38: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 8005e3a: b150 cbz r0, 8005e52 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8005e3c: 4b25 ldr r3, [pc, #148] ; (8005ed4 ) 8005e3e: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8005e40: f7fe fb30 bl 80044a4 8005e44: 2800 cmp r0, #0 8005e46: d044 beq.n 8005ed2 huart->hdmarx->XferAbortCallback(huart->hdmarx); 8005e48: 6b60 ldr r0, [r4, #52] ; 0x34 } 8005e4a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8005e4e: 6b43 ldr r3, [r0, #52] ; 0x34 8005e50: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8005e52: 4620 mov r0, r4 8005e54: f7ff ff77 bl 8005d46 8005e58: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 8005e5a: f7ff ff74 bl 8005d46 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005e5e: 63e5 str r5, [r4, #60] ; 0x3c 8005e60: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8005e62: 0616 lsls r6, r2, #24 8005e64: d527 bpl.n 8005eb6 8005e66: 060d lsls r5, r1, #24 8005e68: d525 bpl.n 8005eb6 if(huart->gState == HAL_UART_STATE_BUSY_TX) 8005e6a: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8005e6e: 2a21 cmp r2, #33 ; 0x21 8005e70: d12f bne.n 8005ed2 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005e72: 68a2 ldr r2, [r4, #8] 8005e74: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8005e78: 6a22 ldr r2, [r4, #32] 8005e7a: d117 bne.n 8005eac huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8005e7c: 8811 ldrh r1, [r2, #0] 8005e7e: f3c1 0108 ubfx r1, r1, #0, #9 8005e82: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005e84: 6921 ldr r1, [r4, #16] 8005e86: b979 cbnz r1, 8005ea8 huart->pTxBuffPtr += 2U; 8005e88: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 8005e8a: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8005e8c: 8ce2 ldrh r2, [r4, #38] ; 0x26 8005e8e: 3a01 subs r2, #1 8005e90: b292 uxth r2, r2 8005e92: 84e2 strh r2, [r4, #38] ; 0x26 8005e94: b9ea cbnz r2, 8005ed2 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8005e96: 68da ldr r2, [r3, #12] 8005e98: f022 0280 bic.w r2, r2, #128 ; 0x80 8005e9c: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8005e9e: 68da ldr r2, [r3, #12] 8005ea0: f042 0240 orr.w r2, r2, #64 ; 0x40 8005ea4: 60da str r2, [r3, #12] 8005ea6: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8005ea8: 3201 adds r2, #1 8005eaa: e7ee b.n 8005e8a huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8005eac: 1c51 adds r1, r2, #1 8005eae: 6221 str r1, [r4, #32] 8005eb0: 7812 ldrb r2, [r2, #0] 8005eb2: 605a str r2, [r3, #4] 8005eb4: e7ea b.n 8005e8c if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8005eb6: 0650 lsls r0, r2, #25 8005eb8: d50b bpl.n 8005ed2 8005eba: 064a lsls r2, r1, #25 8005ebc: d509 bpl.n 8005ed2 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8005ebe: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8005ec0: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8005ec2: f022 0240 bic.w r2, r2, #64 ; 0x40 8005ec6: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8005ec8: 2320 movs r3, #32 8005eca: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 8005ece: f7ff fed9 bl 8005c84 8005ed2: bd70 pop {r4, r5, r6, pc} 8005ed4: 08005ed9 .word 0x08005ed9 08005ed8 : { 8005ed8: b508 push {r3, lr} huart->RxXferCount = 0x00U; 8005eda: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005edc: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 8005ede: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 8005ee0: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 8005ee2: f7ff ff30 bl 8005d46 8005ee6: bd08 pop {r3, pc} 08005ee8 : void SPI_Delay(int ustime) { volatile int i; volatile int k; for(i = 0; i < ustime; i++) 8005ee8: 2300 movs r3, #0 { 8005eea: b082 sub sp, #8 for(i = 0; i < ustime; i++) 8005eec: 9300 str r3, [sp, #0] 8005eee: 9b00 ldr r3, [sp, #0] 8005ef0: 4283 cmp r3, r0 8005ef2: db01 blt.n 8005ef8 { k++; } } 8005ef4: b002 add sp, #8 8005ef6: 4770 bx lr k++; 8005ef8: 9b01 ldr r3, [sp, #4] 8005efa: 3301 adds r3, #1 8005efc: 9301 str r3, [sp, #4] for(i = 0; i < ustime; i++) 8005efe: 9b00 ldr r3, [sp, #0] 8005f00: 3301 adds r3, #1 8005f02: e7f3 b.n 8005eec 08005f04 : #if 1 // PYJ.2019.04.02_BEGIN -- #ifdef STM32F1 void SpiInOut(uint8_t addr_write) { 8005f04: b570 push {r4, r5, r6, lr} 8005f06: 4605 mov r5, r0 8005f08: 2408 movs r4, #8 for (i = 0; i < 8; i++) { SPI_Delay(SDA_SETUP_TIME); Clr_SX1278_SCK(); 8005f0a: 4e14 ldr r6, [pc, #80] ; (8005f5c ) SPI_Delay(SDA_SETUP_TIME); 8005f0c: 2004 movs r0, #4 8005f0e: f7ff ffeb bl 8005ee8 Clr_SX1278_SCK(); 8005f12: 2200 movs r2, #0 8005f14: 2108 movs r1, #8 8005f16: 4630 mov r0, r6 8005f18: f7fe fd00 bl 800491c if (addr_write & 0x80) 8005f1c: 062b lsls r3, r5, #24 { Set_SX1278_SDI(); 8005f1e: bf4c ite mi 8005f20: 2201 movmi r2, #1 } else { Clr_SX1278_SDI(); 8005f22: 2200 movpl r2, #0 8005f24: 2120 movs r1, #32 8005f26: 4630 mov r0, r6 8005f28: f7fe fcf8 bl 800491c } SPI_Delay(SDA_SETUP_TIME); 8005f2c: 2004 movs r0, #4 8005f2e: f7ff ffdb bl 8005ee8 Set_SX1278_SCK(); 8005f32: 2201 movs r2, #1 8005f34: 2108 movs r1, #8 8005f36: 4630 mov r0, r6 8005f38: f7fe fcf0 bl 800491c 8005f3c: 3c01 subs r4, #1 addr_write = addr_write << 1; SPI_Delay(SDA_SETUP_TIME); 8005f3e: 2004 movs r0, #4 addr_write = addr_write << 1; 8005f40: 006d lsls r5, r5, #1 SPI_Delay(SDA_SETUP_TIME); 8005f42: f7ff ffd1 bl 8005ee8 for (i = 0; i < 8; i++) 8005f46: f014 04ff ands.w r4, r4, #255 ; 0xff addr_write = addr_write << 1; 8005f4a: b2ed uxtb r5, r5 for (i = 0; i < 8; i++) 8005f4c: d1de bne.n 8005f0c } Clr_SX1278_SCK(); 8005f4e: 4622 mov r2, r4 } 8005f50: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} Clr_SX1278_SCK(); 8005f54: 2108 movs r1, #8 8005f56: 4801 ldr r0, [pc, #4] ; (8005f5c ) 8005f58: f7fe bce0 b.w 800491c 8005f5c: 40010c00 .word 0x40010c00 08005f60 : uint8_t SpiRead(void) { 8005f60: b570 push {r4, r5, r6, lr} 8005f62: 2508 movs r5, #8 uint8_t i = 0,Readdata = 0; 8005f64: 2400 movs r4, #0 for (i = 0; i < 8; i++) { Readdata <<= 1; SPI_Delay(SDA_SETUP_TIME); Set_SX1278_SCK(); 8005f66: 4e10 ldr r6, [pc, #64] ; (8005fa8 ) SPI_Delay(SDA_SETUP_TIME); 8005f68: 2004 movs r0, #4 8005f6a: f7ff ffbd bl 8005ee8 Set_SX1278_SCK(); 8005f6e: 2108 movs r1, #8 8005f70: 4630 mov r0, r6 8005f72: 2201 movs r2, #1 8005f74: f7fe fcd2 bl 800491c Readdata <<= 1; 8005f78: 0064 lsls r4, r4, #1 if (Read_SX1278_SDO()) 8005f7a: 2110 movs r1, #16 8005f7c: 4630 mov r0, r6 Readdata <<= 1; 8005f7e: b2e4 uxtb r4, r4 if (Read_SX1278_SDO()) 8005f80: f7fe fcc6 bl 8004910 8005f84: b108 cbz r0, 8005f8a Readdata |= 0x01; 8005f86: f044 0401 orr.w r4, r4, #1 else Readdata &= 0xfe; SPI_Delay(SDA_SETUP_TIME); 8005f8a: 2004 movs r0, #4 8005f8c: f7ff ffac bl 8005ee8 8005f90: 3d01 subs r5, #1 Clr_SX1278_SCK(); 8005f92: 2200 movs r2, #0 8005f94: 2108 movs r1, #8 8005f96: 4630 mov r0, r6 8005f98: f7fe fcc0 bl 800491c for (i = 0; i < 8; i++) 8005f9c: f015 05ff ands.w r5, r5, #255 ; 0xff 8005fa0: d1e2 bne.n 8005f68 } return Readdata; } 8005fa2: 4620 mov r0, r4 8005fa4: bd70 pop {r4, r5, r6, pc} 8005fa6: bf00 nop 8005fa8: 40010c00 .word 0x40010c00 08005fac : // Lora_MOSI_SET; // SPI_Delay(SDA_SETUP_TIME); } #else void BLUECELL_SPI_Transmit(uint8_t data) { SpiInOut(data); 8005fac: f7ff bfaa b.w 8005f04 08005fb0 : } } void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){ 8005fb0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8005fb4: 4606 mov r6, r0 8005fb6: 460f mov r7, r1 8005fb8: 4690 mov r8, r2 8005fba: 461d mov r5, r3 HAL_StatusTypeDef status = HAL_ERROR; for(uint8_t i = 0; i < size; i++){ 8005fbc: 2400 movs r4, #0 status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000); 8005fbe: f44f 69fa mov.w r9, #2000 ; 0x7d0 8005fc2: f04f 0a01 mov.w sl, #1 HAL_Delay(5); if(status > HAL_OK) printf("EEPROM SAVE ERROR!!! \n"); 8005fc6: f8df b040 ldr.w fp, [pc, #64] ; 8006008 void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){ 8005fca: b087 sub sp, #28 for(uint8_t i = 0; i < size; i++){ 8005fcc: 42ac cmp r4, r5 8005fce: d102 bne.n 8005fd6 } // I2c_Status_Check(status); } 8005fd0: b007 add sp, #28 8005fd2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000); 8005fd6: 193b adds r3, r7, r4 8005fd8: eb08 0204 add.w r2, r8, r4 8005fdc: 9300 str r3, [sp, #0] 8005fde: b292 uxth r2, r2 8005fe0: 2310 movs r3, #16 8005fe2: 21a0 movs r1, #160 ; 0xa0 8005fe4: f8cd 9008 str.w r9, [sp, #8] 8005fe8: f8cd a004 str.w sl, [sp, #4] 8005fec: 4630 mov r0, r6 8005fee: f7fe fef5 bl 8004ddc 8005ff2: 9005 str r0, [sp, #20] HAL_Delay(5); 8005ff4: 2005 movs r0, #5 8005ff6: f7fe f95d bl 80042b4 if(status > HAL_OK) 8005ffa: 9b05 ldr r3, [sp, #20] 8005ffc: b113 cbz r3, 8006004 printf("EEPROM SAVE ERROR!!! \n"); 8005ffe: 4658 mov r0, fp 8006000: f001 ff38 bl 8007e74 8006004: 3401 adds r4, #1 8006006: e7e1 b.n 8005fcc 8006008: 08008e6c .word 0x08008e6c 0800600c : uint8_t M24C32_Data_Read(I2C_HandleTypeDef* hi2cx,uint16_t address){ 800600c: b57f push {r0, r1, r2, r3, r4, r5, r6, lr} uint8_t data[1] = {0}; 800600e: 2200 movs r2, #0 8006010: ab06 add r3, sp, #24 8006012: f803 2d04 strb.w r2, [r3, #-4]! HAL_StatusTypeDef status = HAL_ERROR; status = HAL_I2C_Mem_Read(hi2cx,0xA1, address,I2C_MEMADD_SIZE_16BIT, &data[0],1, 2000); 8006016: f44f 62fa mov.w r2, #2000 ; 0x7d0 800601a: 9202 str r2, [sp, #8] 800601c: 2201 movs r2, #1 800601e: 9300 str r3, [sp, #0] 8006020: 9201 str r2, [sp, #4] 8006022: 2310 movs r3, #16 8006024: 460a mov r2, r1 8006026: 21a1 movs r1, #161 ; 0xa1 8006028: f7fe ff6e bl 8004f08 // I2c_Status_Check(status); // printf("Readdata[0] : %02x\n",data); return data[0]; } 800602c: f89d 0014 ldrb.w r0, [sp, #20] 8006030: b007 add sp, #28 8006032: f85d fb04 ldr.w pc, [sp], #4 ... 08006038 : \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 8006038: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800603c: 4905 ldr r1, [pc, #20] ; (8006054 ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800603e: 4b06 ldr r3, [pc, #24] ; (8006058 ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8006040: 68ca ldr r2, [r1, #12] 8006042: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8006046: 4313 orrs r3, r2 8006048: 60cb str r3, [r1, #12] 800604a: f3bf 8f4f dsb sy __ASM volatile ("nop"); 800604e: bf00 nop 8006050: e7fd b.n 800604e 8006052: bf00 nop 8006054: e000ed00 .word 0xe000ed00 8006058: 05fa0004 .word 0x05fa0004 0800605c : printf("Lora LoRa_BW : %d \n",Default_SX1276.LoRa_BW); printf("Lora LoRa_Lna : %d \n",Default_SX1276.LoRa_Lna); } } uint16_t RGB_Limit_Address_Check(uint8_t id){ 800605c: 3801 subs r0, #1 800605e: b2c0 uxtb r0, r0 8006060: 2807 cmp r0, #7 8006062: bf9a itte ls 8006064: 4b01 ldrls r3, [pc, #4] ; (800606c ) 8006066: 5c18 ldrbls r0, [r3, r0] 8006068: 2000 movhi r0, #0 case 6: ret = RGB6_LIMIT_RED_H_ADDRESS;break; case 7: ret = RGB7_LIMIT_RED_H_ADDRESS;break; case 8: ret = RGB8_LIMIT_RED_H_ADDRESS;break; } return ret; } 800606a: 4770 bx lr 800606c: 08008e82 .word 0x08008e82 08006070 : uint16_t RGB_Location_Address_Check(uint8_t id){ 8006070: 3801 subs r0, #1 8006072: b2c0 uxtb r0, r0 8006074: 2807 cmp r0, #7 8006076: bf9a itte ls 8006078: 4b02 ldrls r3, [pc, #8] ; (8006084 ) 800607a: f833 0010 ldrhls.w r0, [r3, r0, lsl #1] 800607e: 2000 movhi r0, #0 case 6: ret = RGB6_LOCATION_ADDRESS;break; case 7: ret = RGB7_LOCATION_ADDRESS;break; case 8: ret = RGB8_LOCATION_ADDRESS;break; } return ret; } 8006080: 4770 bx lr 8006082: bf00 nop 8006084: 08008e8a .word 0x08008e8a 08006088 : void RGB_Data_Init(void){ 8006088: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS); 800608c: 2100 movs r1, #0 800608e: 4868 ldr r0, [pc, #416] ; (8006230 ) 8006090: 4e68 ldr r6, [pc, #416] ; (8006234 ) 8006092: f7ff ffbb bl 800600c 8006096: 2401 movs r4, #1 8006098: 46b0 mov r8, r6 800609a: 4d67 ldr r5, [pc, #412] ; (8006238 ) RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8); 800609c: 4f64 ldr r7, [pc, #400] ; (8006230 ) MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS); 800609e: 7028 strb r0, [r5, #0] RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8); 80060a0: 4621 mov r1, r4 80060a2: 4638 mov r0, r7 80060a4: f7ff ffb2 bl 800600c RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i)); 80060a8: 1c61 adds r1, r4, #1 RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8); 80060aa: 0200 lsls r0, r0, #8 80060ac: 8070 strh r0, [r6, #2] RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i)); 80060ae: b289 uxth r1, r1 80060b0: 4638 mov r0, r7 80060b2: f7ff ffab bl 800600c 80060b6: 3406 adds r4, #6 80060b8: 8873 ldrh r3, [r6, #2] 80060ba: b2a4 uxth r4, r4 80060bc: 4318 orrs r0, r3 for(uint8_t i = 0; i < 8; i++){ 80060be: 2c31 cmp r4, #49 ; 0x31 RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i)); 80060c0: f826 0f02 strh.w r0, [r6, #2]! for(uint8_t i = 0; i < 8; i++){ 80060c4: d1ec bne.n 80060a0 80060c6: f8df 919c ldr.w r9, [pc, #412] ; 8006264 80060ca: 2403 movs r4, #3 80060cc: 464f mov r7, r9 RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8); 80060ce: 4e58 ldr r6, [pc, #352] ; (8006230 ) 80060d0: 4621 mov r1, r4 80060d2: 4630 mov r0, r6 80060d4: f7ff ff9a bl 800600c RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i)); 80060d8: 1c61 adds r1, r4, #1 RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8); 80060da: 0200 lsls r0, r0, #8 80060dc: f8a9 0002 strh.w r0, [r9, #2] RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i)); 80060e0: b289 uxth r1, r1 80060e2: 4630 mov r0, r6 80060e4: f7ff ff92 bl 800600c 80060e8: 3406 adds r4, #6 80060ea: f8b9 3002 ldrh.w r3, [r9, #2] 80060ee: b2a4 uxth r4, r4 80060f0: 4318 orrs r0, r3 for(uint8_t i = 0; i < 8; i++){ 80060f2: 2c33 cmp r4, #51 ; 0x33 RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i)); 80060f4: f829 0f02 strh.w r0, [r9, #2]! for(uint8_t i = 0; i < 8; i++){ 80060f8: d1ea bne.n 80060d0 80060fa: f8df 916c ldr.w r9, [pc, #364] ; 8006268 80060fe: 2405 movs r4, #5 8006100: 46cb mov fp, r9 RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8); 8006102: 4e4b ldr r6, [pc, #300] ; (8006230 ) 8006104: 4621 mov r1, r4 8006106: 4630 mov r0, r6 8006108: f7ff ff80 bl 800600c RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i)); 800610c: 1c61 adds r1, r4, #1 RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8); 800610e: 0200 lsls r0, r0, #8 8006110: f8a9 0002 strh.w r0, [r9, #2] RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i)); 8006114: b289 uxth r1, r1 8006116: 4630 mov r0, r6 8006118: f7ff ff78 bl 800600c 800611c: 3406 adds r4, #6 800611e: f8b9 3002 ldrh.w r3, [r9, #2] 8006122: b2a4 uxth r4, r4 8006124: 4318 orrs r0, r3 for(uint8_t i = 0; i < 8; i++){ 8006126: 2c35 cmp r4, #53 ; 0x35 RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i)); 8006128: f829 0f02 strh.w r0, [r9, #2]! for(uint8_t i = 0; i < 8; i++){ 800612c: d1ea bne.n 8006104 800612e: 2400 movs r4, #0 8006130: f04f 0932 mov.w r9, #50 ; 0x32 RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa); 8006134: 1c66 adds r6, r4, #1 8006136: b2f0 uxtb r0, r6 8006138: f7ff ff9a bl 8006070 800613c: f04f 0a00 mov.w sl, #0 8006140: 4602 mov r2, r0 8006142: fb09 f404 mul.w r4, r9, r4 8006146: eb02 010a add.w r1, r2, sl 800614a: b289 uxth r1, r1 800614c: 4838 ldr r0, [pc, #224] ; (8006230 ) 800614e: 9201 str r2, [sp, #4] 8006150: f7ff ff5c bl 800600c 8006154: 4b39 ldr r3, [pc, #228] ; (800623c ) 8006156: eb0a 0104 add.w r1, sl, r4 800615a: f10a 0a01 add.w sl, sl, #1 800615e: 4419 add r1, r3 for(uint8_t aa= 0; aa < 50; aa++) 8006160: f1ba 0f32 cmp.w sl, #50 ; 0x32 RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa); 8006164: f881 0032 strb.w r0, [r1, #50] ; 0x32 for(uint8_t aa= 0; aa < 50; aa++) 8006168: 9a01 ldr r2, [sp, #4] 800616a: d1ec bne.n 8006146 for(uint8_t i = 0; i < 8; i++){ 800616c: 2e08 cmp r6, #8 800616e: 4634 mov r4, r6 8006170: d1e0 bne.n 8006134 printf("MY id is %d \n",MyControllerID); 8006172: 7829 ldrb r1, [r5, #0] 8006174: 4832 ldr r0, [pc, #200] ; (8006240 ) 8006176: f001 fe09 bl 8007d8c 800617a: 2401 movs r4, #1 printf("RGB_SensorRedLimit_Buf[%d] : %04x\n",i,RGB_SensorRedLimit_Buf[i]); 800617c: f8df 90ec ldr.w r9, [pc, #236] ; 800626c printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]); 8006180: 4e30 ldr r6, [pc, #192] ; (8006244 ) printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]); 8006182: 4d31 ldr r5, [pc, #196] ; (8006248 ) printf("RGB_SensorRedLimit_Buf[%d] : %04x\n",i,RGB_SensorRedLimit_Buf[i]); 8006184: f838 2014 ldrh.w r2, [r8, r4, lsl #1] 8006188: 4621 mov r1, r4 800618a: 4648 mov r0, r9 800618c: f001 fdfe bl 8007d8c printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]); 8006190: f837 2014 ldrh.w r2, [r7, r4, lsl #1] 8006194: 4621 mov r1, r4 8006196: 4630 mov r0, r6 8006198: f001 fdf8 bl 8007d8c printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]); 800619c: f83b 2014 ldrh.w r2, [fp, r4, lsl #1] 80061a0: 4621 mov r1, r4 80061a2: 4628 mov r0, r5 80061a4: 3401 adds r4, #1 80061a6: f001 fdf1 bl 8007d8c for(uint8_t i = 1; i <= 8; i++){ 80061aa: 2c09 cmp r4, #9 80061ac: d1ea bne.n 8006184 if(M24C32_Data_Read(&hi2c2,RGB_LORA_FREQ_ADDRESS) == 0xFF){ 80061ae: f44f 71e1 mov.w r1, #450 ; 0x1c2 80061b2: 481f ldr r0, [pc, #124] ; (8006230 ) 80061b4: f7ff ff2a bl 800600c 80061b8: 28ff cmp r0, #255 ; 0xff 80061ba: d035 beq.n 8006228 Default_SX1276.frequency = M24C32_Data_Read(&hi2c2,RGB_LORA_FREQ_ADDRESS); 80061bc: f44f 71e1 mov.w r1, #450 ; 0x1c2 80061c0: 481b ldr r0, [pc, #108] ; (8006230 ) 80061c2: f7ff ff23 bl 800600c 80061c6: 4c21 ldr r4, [pc, #132] ; (800624c ) Default_SX1276.LoRa_Pa_boost = M24C32_Data_Read(&hi2c2,RGB_LORA_PABOOST_ADDRESS); 80061c8: f240 11c3 movw r1, #451 ; 0x1c3 Default_SX1276.frequency = M24C32_Data_Read(&hi2c2,RGB_LORA_FREQ_ADDRESS); 80061cc: 7020 strb r0, [r4, #0] Default_SX1276.LoRa_Pa_boost = M24C32_Data_Read(&hi2c2,RGB_LORA_PABOOST_ADDRESS); 80061ce: 4818 ldr r0, [pc, #96] ; (8006230 ) 80061d0: f7ff ff1c bl 800600c Default_SX1276.LoRa_Rate = M24C32_Data_Read(&hi2c2,RGB_LORA_SF_ADDRESS); 80061d4: f44f 71e2 mov.w r1, #452 ; 0x1c4 Default_SX1276.LoRa_Pa_boost = M24C32_Data_Read(&hi2c2,RGB_LORA_PABOOST_ADDRESS); 80061d8: 7160 strb r0, [r4, #5] Default_SX1276.LoRa_Rate = M24C32_Data_Read(&hi2c2,RGB_LORA_SF_ADDRESS); 80061da: 4815 ldr r0, [pc, #84] ; (8006230 ) 80061dc: f7ff ff16 bl 800600c Default_SX1276.LoRa_BW = M24C32_Data_Read(&hi2c2,RGB_LORA_BANDWIDTH_ADDRESS); 80061e0: f240 11c5 movw r1, #453 ; 0x1c5 Default_SX1276.LoRa_Rate = M24C32_Data_Read(&hi2c2,RGB_LORA_SF_ADDRESS); 80061e4: 70a0 strb r0, [r4, #2] Default_SX1276.LoRa_BW = M24C32_Data_Read(&hi2c2,RGB_LORA_BANDWIDTH_ADDRESS); 80061e6: 4812 ldr r0, [pc, #72] ; (8006230 ) 80061e8: f7ff ff10 bl 800600c Default_SX1276.LoRa_Lna = M24C32_Data_Read(&hi2c2,RGB_LORA_LNA_ADDRESS); 80061ec: f44f 71e3 mov.w r1, #454 ; 0x1c6 Default_SX1276.LoRa_BW = M24C32_Data_Read(&hi2c2,RGB_LORA_BANDWIDTH_ADDRESS); 80061f0: 70e0 strb r0, [r4, #3] Default_SX1276.LoRa_Lna = M24C32_Data_Read(&hi2c2,RGB_LORA_LNA_ADDRESS); 80061f2: 480f ldr r0, [pc, #60] ; (8006230 ) 80061f4: f7ff ff0a bl 800600c printf("Lora frequency : %d \n",Default_SX1276.frequency); 80061f8: 7821 ldrb r1, [r4, #0] Default_SX1276.LoRa_Lna = M24C32_Data_Read(&hi2c2,RGB_LORA_LNA_ADDRESS); 80061fa: 7120 strb r0, [r4, #4] printf("Lora frequency : %d \n",Default_SX1276.frequency); 80061fc: 4814 ldr r0, [pc, #80] ; (8006250 ) 80061fe: f001 fdc5 bl 8007d8c printf("Lora LoRa_Pa_boost : %d \n",Default_SX1276.LoRa_Pa_boost); 8006202: 7961 ldrb r1, [r4, #5] 8006204: 4813 ldr r0, [pc, #76] ; (8006254 ) 8006206: f001 fdc1 bl 8007d8c printf("Lora LoRa_Rate : %d \n",Default_SX1276.LoRa_Rate); 800620a: 78a1 ldrb r1, [r4, #2] 800620c: 4812 ldr r0, [pc, #72] ; (8006258 ) 800620e: f001 fdbd bl 8007d8c printf("Lora LoRa_BW : %d \n",Default_SX1276.LoRa_BW); 8006212: 78e1 ldrb r1, [r4, #3] 8006214: 4811 ldr r0, [pc, #68] ; (800625c ) 8006216: f001 fdb9 bl 8007d8c printf("Lora LoRa_Lna : %d \n",Default_SX1276.LoRa_Lna); 800621a: 7921 ldrb r1, [r4, #4] 800621c: 4810 ldr r0, [pc, #64] ; (8006260 ) } 800621e: b003 add sp, #12 8006220: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} printf("Lora LoRa_Lna : %d \n",Default_SX1276.LoRa_Lna); 8006224: f001 bdb2 b.w 8007d8c } 8006228: b003 add sp, #12 800622a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800622e: bf00 nop 8006230: 2000060c .word 0x2000060c 8006234: 2000039c .word 0x2000039c 8006238: 20000400 .word 0x20000400 800623c: 20000102 .word 0x20000102 8006240: 08008eb7 .word 0x08008eb7 8006244: 08008eec .word 0x08008eec 8006248: 08008f13 .word 0x08008f13 800624c: 20000008 .word 0x20000008 8006250: 08008f3a .word 0x08008f3a 8006254: 08008f54 .word 0x08008f54 8006258: 08008f6e .word 0x08008f6e 800625c: 08008f88 .word 0x08008f88 8006260: 08008fa2 .word 0x08008fa2 8006264: 2000038a .word 0x2000038a 8006268: 200002c4 .word 0x200002c4 800626c: 08008ec5 .word 0x08008ec5 08006270 : } void DataSendStop_Get(uint8_t set){ return DatasendSetVal; } void RGB_Response_Func(uint8_t* data){ 8006270: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} #if 0 for(uint8_t i = 0; i < 10; i++){ printf("%02x ",data[i]); } #endif switch(type){ 8006274: 7843 ldrb r3, [r0, #1] void RGB_Response_Func(uint8_t* data){ 8006276: 4604 mov r4, r0 switch(type){ 8006278: 3b01 subs r3, #1 800627a: 2b17 cmp r3, #23 800627c: d816 bhi.n 80062ac 800627e: e8df f003 tbb [pc, r3] 8006282: 0c38 .short 0x0c38 8006284: 2c1b1538 .word 0x2c1b1538 8006288: 153d3838 .word 0x153d3838 800628c: 41151515 .word 0x41151515 8006290: 2515254a .word 0x2515254a 8006294: 71151515 .word 0x71151515 8006298: 2581 .short 0x2581 case RGB_Status_Data_Request: Uart2_Data_Send(data,RGB_SensorDataRequest_Length); break; case RGB_ControllerID_SET: Uart1_Data_Send(data,RGB_ControllerID_SET_Length); 800629a: 210a movs r1, #10 800629c: f000 fee2 bl 8007064 M24C32_Data_Write(&hi2c2,&MyControllerID,MY_ID_ADDRESS,1); // EEPROM Controller ID Save 80062a0: 2301 movs r3, #1 80062a2: 2200 movs r2, #0 80062a4: 494d ldr r1, [pc, #308] ; (80063dc ) memcpy(&RGB_SensorDataBuf[data[bluecell_srcid]][bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); Uart1_Data_Send(data,data[bluecell_length] + 3); break; case RGB_ControllerLimitSet: Uart1_Data_Send(data,data[bluecell_length] + 3); M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 80062a6: 484e ldr r0, [pc, #312] ; (80063e0 ) 80062a8: f7ff fe82 bl 8005fb0 // printf("\n"); // Uart1_Data_Send(data,data[bluecell_length] + 3); break; default:break; } LedTimerCnt = 0; 80062ac: 2200 movs r2, #0 80062ae: 4b4d ldr r3, [pc, #308] ; (80063e4 ) 80062b0: 601a str r2, [r3, #0] } 80062b2: b002 add sp, #8 80062b4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} memcpy(&RGB_SensorDataBuf[data[bluecell_srcid]][bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80062b8: 2514 movs r5, #20 80062ba: 78c0 ldrb r0, [r0, #3] 80062bc: 78a2 ldrb r2, [r4, #2] 80062be: 4b4a ldr r3, [pc, #296] ; (80063e8 ) 80062c0: 3203 adds r2, #3 80062c2: 4621 mov r1, r4 80062c4: fb05 3000 mla r0, r5, r0, r3 80062c8: f001 fd4c bl 8007d64 Uart1_Data_Send(data,data[bluecell_length] + 3); 80062cc: 78a1 ldrb r1, [r4, #2] 80062ce: 4620 mov r0, r4 80062d0: 3103 adds r1, #3 80062d2: b2c9 uxtb r1, r1 80062d4: f000 fec6 bl 8007064 break; 80062d8: e7e8 b.n 80062ac Uart1_Data_Send(data,data[bluecell_length] + 3); 80062da: 7881 ldrb r1, [r0, #2] 80062dc: 3103 adds r1, #3 80062de: b2c9 uxtb r1, r1 80062e0: f000 fec0 bl 8007064 M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 80062e4: 7aa0 ldrb r0, [r4, #10] 80062e6: f7ff feb9 bl 800605c 80062ea: 2306 movs r3, #6 80062ec: 4602 mov r2, r0 80062ee: 1d21 adds r1, r4, #4 80062f0: e7d9 b.n 80062a6 Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); 80062f2: 2107 movs r1, #7 Uart2_Data_Send(data,data[bluecell_length] + 3); 80062f4: 4620 mov r0, r4 80062f6: f000 fead bl 8007054 break; 80062fa: e7d7 b.n 80062ac Uart2_Data_Send(data,data[bluecell_length] + 3); 80062fc: 7881 ldrb r1, [r0, #2] 80062fe: 3103 adds r1, #3 8006300: b2c9 uxtb r1, r1 8006302: e7f7 b.n 80062f4 M24C32_Data_Write(&hi2c2,&data[Location_stx],RGB_Location_Address_Check(data[bluecell_srcid]),data[bluecell_length] + 3); // EEPROM Controller ID Save 8006304: 78c0 ldrb r0, [r0, #3] 8006306: f7ff feb3 bl 8006070 800630a: 78a3 ldrb r3, [r4, #2] 800630c: 4602 mov r2, r0 800630e: 3303 adds r3, #3 8006310: b2db uxtb r3, r3 8006312: 4621 mov r1, r4 8006314: e7c7 b.n 80062a6 data[bluecell_length] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(data[bluecell_dstid]) + 2); // EEPROM Controller ID Save 8006316: 7a80 ldrb r0, [r0, #10] 8006318: f7ff feaa bl 8006070 800631c: 1c81 adds r1, r0, #2 800631e: b289 uxth r1, r1 8006320: 482f ldr r0, [pc, #188] ; (80063e0 ) 8006322: f7ff fe73 bl 800600c 8006326: 70a0 strb r0, [r4, #2] temp = RGB_Location_Address_Check(data[bluecell_srcid]); 8006328: 78e0 ldrb r0, [r4, #3] 800632a: f7ff fea1 bl 8006070 for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){ 800632e: 2300 movs r3, #0 temp = RGB_Location_Address_Check(data[bluecell_srcid]); 8006330: 4607 mov r7, r0 data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save 8006332: f8df 80ac ldr.w r8, [pc, #172] ; 80063e0 for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){ 8006336: 78a1 ldrb r1, [r4, #2] 8006338: b2de uxtb r6, r3 800633a: 1c5d adds r5, r3, #1 800633c: 1c8b adds r3, r1, #2 800633e: 42b3 cmp r3, r6 8006340: da08 bge.n 8006354 data[bluecell_type] = RGB_Location_Response; 8006342: 4620 mov r0, r4 8006344: 230f movs r3, #15 8006346: f800 3f01 strb.w r3, [r0, #1]! data[data[bluecell_length] + 1] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 800634a: 1c4d adds r5, r1, #1 800634c: f001 fb45 bl 80079da 8006350: 5560 strb r0, [r4, r5] 8006352: e7bb b.n 80062cc data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save 8006354: 19b9 adds r1, r7, r6 8006356: b289 uxth r1, r1 8006358: 4640 mov r0, r8 800635a: f7ff fe57 bl 800600c 800635e: 462b mov r3, r5 8006360: 55a0 strb r0, [r4, r6] 8006362: e7e8 b.n 8006336 memcpy(&Lora_Tempdata.Request_stx,&data[bluecell_stx],data[bluecell_length] + 3); 8006364: 7882 ldrb r2, [r0, #2] 8006366: 4601 mov r1, r0 8006368: 3203 adds r2, #3 800636a: 4668 mov r0, sp 800636c: f001 fcfa bl 8007d64 if(Lora_Tempdata.Request_dstid == MyControllerID) 8006370: 4b1a ldr r3, [pc, #104] ; (80063dc ) 8006372: f89d 2004 ldrb.w r2, [sp, #4] 8006376: 781b ldrb r3, [r3, #0] 8006378: 429a cmp r2, r3 800637a: d19a bne.n 80062b2 LoraDataSendSet(1); 800637c: 2001 movs r0, #1 800637e: f000 fe5d bl 800703c break; 8006382: e793 b.n 80062ac data[bluecell_type] = RGB_Lora_ConfigGet; 8006384: 2318 movs r3, #24 Default_SX1276.frequency = data[3]; 8006386: 4d19 ldr r5, [pc, #100] ; (80063ec ) data[bluecell_type] = RGB_Lora_ConfigGet; 8006388: 7043 strb r3, [r0, #1] Default_SX1276.LoRa_Pa_boost = data[4]; 800638a: 7903 ldrb r3, [r0, #4] Default_SX1276.frequency = data[3]; 800638c: 78c1 ldrb r1, [r0, #3] Default_SX1276.LoRa_Pa_boost = data[4]; 800638e: 716b strb r3, [r5, #5] Default_SX1276.LoRa_Rate = data[5]; 8006390: 7943 ldrb r3, [r0, #5] Default_SX1276.frequency = data[3]; 8006392: 7029 strb r1, [r5, #0] Default_SX1276.LoRa_Rate = data[5]; 8006394: 70ab strb r3, [r5, #2] Default_SX1276.LoRa_BW = data[6]; 8006396: 7983 ldrb r3, [r0, #6] 8006398: 70eb strb r3, [r5, #3] Default_SX1276.LoRa_Lna = data[7]; 800639a: 79c3 ldrb r3, [r0, #7] printf("Lora frequency : %d \n",Default_SX1276.frequency); 800639c: 4814 ldr r0, [pc, #80] ; (80063f0 ) Default_SX1276.LoRa_Lna = data[7]; 800639e: 712b strb r3, [r5, #4] printf("Lora frequency : %d \n",Default_SX1276.frequency); 80063a0: f001 fcf4 bl 8007d8c printf("Lora LoRa_Pa_boost : %d \n",Default_SX1276.LoRa_Pa_boost); 80063a4: 7969 ldrb r1, [r5, #5] 80063a6: 4813 ldr r0, [pc, #76] ; (80063f4 ) 80063a8: f001 fcf0 bl 8007d8c printf("Lora LoRa_Rate : %d \n",Default_SX1276.LoRa_Rate); 80063ac: 78a9 ldrb r1, [r5, #2] 80063ae: 4812 ldr r0, [pc, #72] ; (80063f8 ) 80063b0: f001 fcec bl 8007d8c printf("Lora LoRa_BW : %d \n",Default_SX1276.LoRa_BW); 80063b4: 78e9 ldrb r1, [r5, #3] 80063b6: 4811 ldr r0, [pc, #68] ; (80063fc ) 80063b8: f001 fce8 bl 8007d8c printf("Lora LoRa_Lna : %d \n",Default_SX1276.LoRa_Lna); 80063bc: 7929 ldrb r1, [r5, #4] 80063be: 4810 ldr r0, [pc, #64] ; (8006400 ) 80063c0: f001 fce4 bl 8007d8c M24C32_Data_Write(&hi2c2,&data[bluecell_srcid],RGB_LORA_FREQ_ADDRESS,data[bluecell_length] - 2); // EEPROM Controller ID Save 80063c4: 78a3 ldrb r3, [r4, #2] 80063c6: f44f 72e1 mov.w r2, #450 ; 0x1c2 80063ca: 3b02 subs r3, #2 80063cc: b2db uxtb r3, r3 80063ce: 1ce1 adds r1, r4, #3 80063d0: 4803 ldr r0, [pc, #12] ; (80063e0 ) 80063d2: f7ff fded bl 8005fb0 NVIC_SystemReset(); 80063d6: f7ff fe2f bl 8006038 80063da: bf00 nop 80063dc: 20000400 .word 0x20000400 80063e0: 2000060c .word 0x2000060c 80063e4: 200003f8 .word 0x200003f8 80063e8: 200002d6 .word 0x200002d6 80063ec: 20000008 .word 0x20000008 80063f0: 08008f3a .word 0x08008f3a 80063f4: 08008f54 .word 0x08008f54 80063f8: 08008f6e .word 0x08008f6e 80063fc: 08008f88 .word 0x08008f88 8006400: 08008fa2 .word 0x08008fa2 08006404 : void RGB_Sensor_LED_Alarm_ON(uint8_t id ){ 8006404: b508 push {r3, lr} switch(id){ 8006406: 2808 cmp r0, #8 8006408: d850 bhi.n 80064ac 800640a: e8df f000 tbb [pc, r0] 800640e: 3005 .short 0x3005 8006410: 44403c38 .word 0x44403c38 8006414: 4b48 .short 0x4b48 8006416: 2c .byte 0x2c 8006417: 00 .byte 0x00 case 0:// 모든 LEDì˜ ì „ì›ì„ ON HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET); 8006418: 2200 movs r2, #0 800641a: f44f 6180 mov.w r1, #1024 ; 0x400 800641e: 4824 ldr r0, [pc, #144] ; (80064b0 ) 8006420: f7fe fa7c bl 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET); 8006424: 2200 movs r2, #0 8006426: f44f 6100 mov.w r1, #2048 ; 0x800 800642a: 4821 ldr r0, [pc, #132] ; (80064b0 ) 800642c: f7fe fa76 bl 800491c HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET); 8006430: 2200 movs r2, #0 8006432: f44f 5180 mov.w r1, #4096 ; 0x1000 8006436: 481e ldr r0, [pc, #120] ; (80064b0 ) 8006438: f7fe fa70 bl 800491c HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET); 800643c: 2200 movs r2, #0 800643e: 2104 movs r1, #4 8006440: 481c ldr r0, [pc, #112] ; (80064b4 ) 8006442: f7fe fa6b bl 800491c HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET); 8006446: 2200 movs r2, #0 8006448: 2140 movs r1, #64 ; 0x40 800644a: 481b ldr r0, [pc, #108] ; (80064b8 ) 800644c: f7fe fa66 bl 800491c HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET); 8006450: 2200 movs r2, #0 8006452: 2180 movs r1, #128 ; 0x80 8006454: 4818 ldr r0, [pc, #96] ; (80064b8 ) 8006456: f7fe fa61 bl 800491c HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET); 800645a: 2200 movs r2, #0 800645c: f44f 7180 mov.w r1, #256 ; 0x100 8006460: 4815 ldr r0, [pc, #84] ; (80064b8 ) 8006462: f7fe fa5b bl 800491c break; case 7: HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET); break; case 8: HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET); 8006466: 2200 movs r2, #0 8006468: f44f 7100 mov.w r1, #512 ; 0x200 800646c: e015 b.n 800649a HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET); 800646e: 2200 movs r2, #0 8006470: f44f 6180 mov.w r1, #1024 ; 0x400 HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET); 8006474: 480e ldr r0, [pc, #56] ; (80064b0 ) break; } } 8006476: e8bd 4008 ldmia.w sp!, {r3, lr} HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET); 800647a: f7fe ba4f b.w 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET); 800647e: 2200 movs r2, #0 8006480: f44f 6100 mov.w r1, #2048 ; 0x800 8006484: e7f6 b.n 8006474 HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET); 8006486: 2200 movs r2, #0 8006488: f44f 5180 mov.w r1, #4096 ; 0x1000 800648c: e7f2 b.n 8006474 HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET); 800648e: 2200 movs r2, #0 8006490: 2104 movs r1, #4 8006492: 4808 ldr r0, [pc, #32] ; (80064b4 ) 8006494: e7ef b.n 8006476 HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET); 8006496: 2200 movs r2, #0 8006498: 2140 movs r1, #64 ; 0x40 HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET); 800649a: 4807 ldr r0, [pc, #28] ; (80064b8 ) 800649c: e7eb b.n 8006476 HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET); 800649e: 2200 movs r2, #0 80064a0: 2180 movs r1, #128 ; 0x80 80064a2: e7fa b.n 800649a HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET); 80064a4: 2200 movs r2, #0 80064a6: f44f 7180 mov.w r1, #256 ; 0x100 80064aa: e7f6 b.n 800649a 80064ac: bd08 pop {r3, pc} 80064ae: bf00 nop 80064b0: 40011000 .word 0x40011000 80064b4: 40011400 .word 0x40011400 80064b8: 40010c00 .word 0x40010c00 080064bc : void RGB_Sensor_LED_Alarm_OFF(uint8_t id ){ 80064bc: b508 push {r3, lr} switch(id){ 80064be: 2808 cmp r0, #8 80064c0: d850 bhi.n 8006564 80064c2: e8df f000 tbb [pc, r0] 80064c6: 3005 .short 0x3005 80064c8: 44403c38 .word 0x44403c38 80064cc: 4b48 .short 0x4b48 80064ce: 2c .byte 0x2c 80064cf: 00 .byte 0x00 case 0:// 모든 LEDì˜ ì „ì›ì„ OFF HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET); 80064d0: 2201 movs r2, #1 80064d2: f44f 6180 mov.w r1, #1024 ; 0x400 80064d6: 4824 ldr r0, [pc, #144] ; (8006568 ) 80064d8: f7fe fa20 bl 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET); 80064dc: 2201 movs r2, #1 80064de: f44f 6100 mov.w r1, #2048 ; 0x800 80064e2: 4821 ldr r0, [pc, #132] ; (8006568 ) 80064e4: f7fe fa1a bl 800491c HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET); 80064e8: 2201 movs r2, #1 80064ea: f44f 5180 mov.w r1, #4096 ; 0x1000 80064ee: 481e ldr r0, [pc, #120] ; (8006568 ) 80064f0: f7fe fa14 bl 800491c HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET); 80064f4: 2201 movs r2, #1 80064f6: 2104 movs r1, #4 80064f8: 481c ldr r0, [pc, #112] ; (800656c ) 80064fa: f7fe fa0f bl 800491c HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET); 80064fe: 2201 movs r2, #1 8006500: 2140 movs r1, #64 ; 0x40 8006502: 481b ldr r0, [pc, #108] ; (8006570 ) 8006504: f7fe fa0a bl 800491c HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET); 8006508: 2201 movs r2, #1 800650a: 2180 movs r1, #128 ; 0x80 800650c: 4818 ldr r0, [pc, #96] ; (8006570 ) 800650e: f7fe fa05 bl 800491c HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET); 8006512: 2201 movs r2, #1 8006514: f44f 7180 mov.w r1, #256 ; 0x100 8006518: 4815 ldr r0, [pc, #84] ; (8006570 ) 800651a: f7fe f9ff bl 800491c break; case 7: HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET); break; case 8: HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET); 800651e: 2201 movs r2, #1 8006520: f44f 7100 mov.w r1, #512 ; 0x200 8006524: e015 b.n 8006552 HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET); 8006526: 2201 movs r2, #1 8006528: f44f 6180 mov.w r1, #1024 ; 0x400 HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET); 800652c: 480e ldr r0, [pc, #56] ; (8006568 ) break; } } 800652e: e8bd 4008 ldmia.w sp!, {r3, lr} HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET); 8006532: f7fe b9f3 b.w 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET); 8006536: 2201 movs r2, #1 8006538: f44f 6100 mov.w r1, #2048 ; 0x800 800653c: e7f6 b.n 800652c HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET); 800653e: 2201 movs r2, #1 8006540: f44f 5180 mov.w r1, #4096 ; 0x1000 8006544: e7f2 b.n 800652c HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET); 8006546: 2201 movs r2, #1 8006548: 2104 movs r1, #4 800654a: 4808 ldr r0, [pc, #32] ; (800656c ) 800654c: e7ef b.n 800652e HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET); 800654e: 2201 movs r2, #1 8006550: 2140 movs r1, #64 ; 0x40 HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET); 8006552: 4807 ldr r0, [pc, #28] ; (8006570 ) 8006554: e7eb b.n 800652e HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET); 8006556: 2201 movs r2, #1 8006558: 2180 movs r1, #128 ; 0x80 800655a: e7fa b.n 8006552 HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET); 800655c: 2201 movs r2, #1 800655e: f44f 7180 mov.w r1, #256 ; 0x100 8006562: e7f6 b.n 8006552 8006564: bd08 pop {r3, pc} 8006566: bf00 nop 8006568: 40011000 .word 0x40011000 800656c: 40011400 .word 0x40011400 8006570: 40010c00 .word 0x40010c00 08006574 : void RGB_Alarm_Operate(void){ 8006574: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} uint8_t temp_warning = 0; for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ /*SensorID_Cnt : Current Sensor Device Count */ 8006578: 2500 movs r5, #0 uint8_t temp_warning = 0; 800657a: 462c mov r4, r5 for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ /*SensorID_Cnt : Current Sensor Device Count */ 800657c: f8df 9060 ldr.w r9, [pc, #96] ; 80065e0 if(LED_Alarm[SensorID_buf[i]] == 1){ 8006580: f8df 8060 ldr.w r8, [pc, #96] ; 80065e4 8006584: f8df a060 ldr.w sl, [pc, #96] ; 80065e8 for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ /*SensorID_Cnt : Current Sensor Device Count */ 8006588: f899 3000 ldrb.w r3, [r9] 800658c: b2ef uxtb r7, r5 800658e: 42bb cmp r3, r7 8006590: d20b bcs.n 80065aa temp_warning = 1; }else{ RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]); } } if(temp_warning == 0){ // 8ê°œì˜ Sensorê°€ 전부 ì •ìƒì¼ ë•Œ 만 ë™ìž‘ 8006592: bb0c cbnz r4, 80065d8 HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_RESET); //표지 LED 8006594: 4622 mov r2, r4 8006596: 4811 ldr r0, [pc, #68] ; (80065dc ) 8006598: f44f 5180 mov.w r1, #4096 ; 0x1000 800659c: f7fe f9be bl 800491c RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensorê°€ ì •ìƒì¼ 때는 LED ê°€ 켜지지 않는다. 80065a0: 4620 mov r0, r4 } } 80065a2: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensorê°€ ì •ìƒì¼ 때는 LED ê°€ 켜지지 않는다. 80065a6: f7ff bf89 b.w 80064bc if(LED_Alarm[SensorID_buf[i]] == 1){ 80065aa: f818 0007 ldrb.w r0, [r8, r7] 80065ae: f81a 6000 ldrb.w r6, [sl, r0] 80065b2: 2e01 cmp r6, #1 80065b4: d10c bne.n 80065d0 HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_SET); //표지 LED 80065b6: 4809 ldr r0, [pc, #36] ; (80065dc ) 80065b8: 4632 mov r2, r6 80065ba: f44f 5180 mov.w r1, #4096 ; 0x1000 80065be: f7fe f9ad bl 800491c RGB_Sensor_LED_Alarm_ON(SensorID_buf[i]); 80065c2: f818 0007 ldrb.w r0, [r8, r7] 80065c6: f7ff ff1d bl 8006404 80065ca: 3501 adds r5, #1 uint8_t temp_warning = 0; 80065cc: 4634 mov r4, r6 80065ce: e7db b.n 8006588 RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]); 80065d0: f7ff ff74 bl 80064bc 80065d4: 4626 mov r6, r4 80065d6: e7f8 b.n 80065ca 80065d8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80065dc: 40010c00 .word 0x40010c00 80065e0: 200003ae .word 0x200003ae 80065e4: 200003af .word 0x200003af 80065e8: 20000094 .word 0x20000094 080065ec : } uint8_t RGB_DeviceStatusCheck(void){ uint8_t ret = 0; // printf("SensorID_Cnt : %d ",SensorID_Cnt); for(uint8_t i = 0; i < SensorID_Cnt; i++){ 80065ec: 2200 movs r2, #0 uint8_t RGB_DeviceStatusCheck(void){ 80065ee: b530 push {r4, r5, lr} uint8_t ret = 0; 80065f0: 4610 mov r0, r2 // printf("\n SensorID_buf[%d] : %02x ",i,SensorID_buf[i]); if(SensorID_buf[i] > 0){ ret |= 0x01 << (SensorID_buf[i] - 1); 80065f2: 2501 movs r5, #1 for(uint8_t i = 0; i < SensorID_Cnt; i++){ 80065f4: 4b07 ldr r3, [pc, #28] ; (8006614 ) if(SensorID_buf[i] > 0){ 80065f6: 4c08 ldr r4, [pc, #32] ; (8006618 ) for(uint8_t i = 0; i < SensorID_Cnt; i++){ 80065f8: 7819 ldrb r1, [r3, #0] 80065fa: b2d3 uxtb r3, r2 80065fc: 4299 cmp r1, r3 80065fe: d800 bhi.n 8006602 } // printf("\n ret %02x \n",ret); } return ret; } 8006600: bd30 pop {r4, r5, pc} if(SensorID_buf[i] > 0){ 8006602: 5d13 ldrb r3, [r2, r4] 8006604: b123 cbz r3, 8006610 ret |= 0x01 << (SensorID_buf[i] - 1); 8006606: 3b01 subs r3, #1 8006608: fa05 f303 lsl.w r3, r5, r3 800660c: 4318 orrs r0, r3 800660e: b2c0 uxtb r0, r0 8006610: 3201 adds r2, #1 8006612: e7f2 b.n 80065fa 8006614: 200003ae .word 0x200003ae 8006618: 200003af .word 0x200003af 0800661c : } /* RGB_Data_Stackì— Loraì— Data를 보내기 위해 Bufferì— Data를 ìŒ“ì„ ë•Œ ID 마다 Location Cnt */ uint8_t RGB_BufCal(uint8_t srcid){ 800661c: 3801 subs r0, #1 800661e: b2c0 uxtb r0, r0 8006620: 2807 cmp r0, #7 8006622: bf9a itte ls 8006624: 4b01 ldrls r3, [pc, #4] ; (800662c ) 8006626: 5c18 ldrbls r0, [r3, r0] 8006628: 2000 movhi r0, #0 case 6:ret = 29;break; case 7:ret = 32;break; case 8:ret = 35;break; } return ret; } 800662a: 4770 bx lr 800662c: 08008e9a .word 0x08008e9a 08006630 : void RGB_Data_Stack(uint8_t* rgb_buf){ 8006630: b5f8 push {r3, r4, r5, r6, r7, lr} Lora_Buf[bluecell_stx] = 0xbe; 8006632: 23be movs r3, #190 ; 0xbe memset(&Lora_Buf[0],0x00,8); 8006634: 4c1d ldr r4, [pc, #116] ; (80066ac ) 8006636: 2200 movs r2, #0 Lora_Buf[bluecell_stx] = 0xbe; 8006638: 7023 strb r3, [r4, #0] Lora_Buf[bluecell_srcid + 4] = 0xeb; 800663a: 23eb movs r3, #235 ; 0xeb memset(&Lora_Buf[0],0x00,8); 800663c: 6062 str r2, [r4, #4] Lora_Buf[bluecell_srcid + 4] = 0xeb; 800663e: 71e3 strb r3, [r4, #7] Lora_Buf[bluecell_type] = RGB_Lora_DataResponse; 8006640: 2316 movs r3, #22 8006642: 7063 strb r3, [r4, #1] Lora_Buf[bluecell_length] = Lora_Max_Amount;// RGB Data 5byte 8006644: 2305 movs r3, #5 8006646: 70a3 strb r3, [r4, #2] Lora_Buf[bluecell_srcid] = MyControllerID; 8006648: 4b19 ldr r3, [pc, #100] ; (80066b0 ) if(RGB_BufCal(SensorID_buf[0]) == 0){//아무런 Deviceê°€ 존재 í•˜ì§€ì•Šì„ ë•Œ 800664a: 4e1a ldr r6, [pc, #104] ; (80066b4 ) Lora_Buf[bluecell_srcid] = MyControllerID; 800664c: 781b ldrb r3, [r3, #0] void RGB_Data_Stack(uint8_t* rgb_buf){ 800664e: 4605 mov r5, r0 if(RGB_BufCal(SensorID_buf[0]) == 0){//아무런 Deviceê°€ 존재 í•˜ì§€ì•Šì„ ë•Œ 8006650: 7830 ldrb r0, [r6, #0] Lora_Buf[bluecell_srcid] = MyControllerID; 8006652: 70e3 strb r3, [r4, #3] if(RGB_BufCal(SensorID_buf[0]) == 0){//아무런 Deviceê°€ 존재 í•˜ì§€ì•Šì„ ë•Œ 8006654: f7ff ffe2 bl 800661c 8006658: b1c8 cbz r0, 800668e for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ 800665a: 4b17 ldr r3, [pc, #92] ; (80066b8 ) Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1); 800665c: f04f 0e01 mov.w lr, #1 for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ 8006660: 781f ldrb r7, [r3, #0] 8006662: 4613 mov r3, r2 8006664: 7921 ldrb r1, [r4, #4] 8006666: b2d8 uxtb r0, r3 8006668: 42b8 cmp r0, r7 800666a: d915 bls.n 8006698 800666c: b102 cbz r2, 8006670 800666e: 7121 strb r1, [r4, #4] 8006670: 2300 movs r3, #0 Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ; 8006672: 5cea ldrb r2, [r5, r3] 8006674: 7961 ldrb r1, [r4, #5] 8006676: 409a lsls r2, r3 8006678: 3301 adds r3, #1 800667a: 430a orrs r2, r1 for(uint8_t i = 0; i < 8; i++){ 800667c: 2b08 cmp r3, #8 Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ; 800667e: 7162 strb r2, [r4, #5] for(uint8_t i = 0; i < 8; i++){ 8006680: d1f7 bne.n 8006672 Lora_Buf[bluecell_srcid + 3]= STH30_CreateCrc(&Lora_Buf[bluecell_type],Lora_Buf[bluecell_length]); 8006682: 2105 movs r1, #5 8006684: 480d ldr r0, [pc, #52] ; (80066bc ) 8006686: f001 f9a8 bl 80079da 800668a: 71a0 strb r0, [r4, #6] 800668c: bdf8 pop {r3, r4, r5, r6, r7, pc} printf("Not Exist Device \n"); 800668e: 480c ldr r0, [pc, #48] ; (80066c0 ) } 8006690: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} printf("Not Exist Device \n"); 8006694: f001 bbee b.w 8007e74 Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1); 8006698: 5c32 ldrb r2, [r6, r0] 800669a: 3301 adds r3, #1 800669c: 3a01 subs r2, #1 800669e: fa0e f202 lsl.w r2, lr, r2 80066a2: 4311 orrs r1, r2 80066a4: b2c9 uxtb r1, r1 80066a6: 2201 movs r2, #1 80066a8: e7dd b.n 8006666 80066aa: bf00 nop 80066ac: 2000009d .word 0x2000009d 80066b0: 20000400 .word 0x20000400 80066b4: 200003af .word 0x200003af 80066b8: 200003ae .word 0x200003ae 80066bc: 2000009e .word 0x2000009e 80066c0: 08008fbc .word 0x08008fbc 080066c4 : void RGB_Alarm_Check(uint8_t* data){ 80066c4: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]); 80066c8: 7981 ldrb r1, [r0, #6] 80066ca: 79c2 ldrb r2, [r0, #7] 80066cc: 78c3 ldrb r3, [r0, #3] 80066ce: 4e26 ldr r6, [pc, #152] ; (8006768 ) 80066d0: ea42 2201 orr.w r2, r2, r1, lsl #8 Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]); 80066d4: 7a04 ldrb r4, [r0, #8] Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]); 80066d6: f826 2013 strh.w r2, [r6, r3, lsl #1] Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]); 80066da: 7a42 ldrb r2, [r0, #9] 80066dc: 4923 ldr r1, [pc, #140] ; (800676c ) 80066de: ea42 2204 orr.w r2, r2, r4, lsl #8 80066e2: f821 2013 strh.w r2, [r1, r3, lsl #1] Sensor_blue[data[bluecell_srcid]] = ((data[bluecell_blue_H + 2] << 8)| data[bluecell_blue_L + 2]); 80066e6: 7a84 ldrb r4, [r0, #10] 80066e8: 7ac2 ldrb r2, [r0, #11] 80066ea: 4d21 ldr r5, [pc, #132] ; (8006770 ) 80066ec: ea42 2204 orr.w r2, r2, r4, lsl #8 80066f0: f825 2013 strh.w r2, [r5, r3, lsl #1] for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ 80066f4: 2200 movs r2, #0 LED_Alarm[SensorID_buf[i]] = 1; 80066f6: f04f 0e01 mov.w lr, #1 uint8_t Alarm_occur = 0; 80066fa: 4614 mov r4, r2 LED_Alarm[SensorID_buf[i]] = 0; 80066fc: 4691 mov r9, r2 for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ 80066fe: 4b1d ldr r3, [pc, #116] ; (8006774 ) 8006700: 4628 mov r0, r5 8006702: f893 c000 ldrb.w ip, [r3] if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] > Sensor_red[SensorID_buf[i]] 8006706: 4f1c ldr r7, [pc, #112] ; (8006778 ) 8006708: 4d1c ldr r5, [pc, #112] ; (800677c ) || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] > Sensor_blue[SensorID_buf[i]]) { 800670a: f8df 8084 ldr.w r8, [pc, #132] ; 8006790 800670e: 9101 str r1, [sp, #4] for(uint8_t i = 0; i <= (SensorID_Cnt); i++){ 8006710: b2d3 uxtb r3, r2 8006712: 4563 cmp r3, ip 8006714: d90a bls.n 800672c RGB_Data_Stack(&LED_Alarm[1]); 8006716: 481a ldr r0, [pc, #104] ; (8006780 ) 8006718: f7ff ff8a bl 8006630 if(Prev_Alarm_occur != Alarm_occur){ 800671c: 4b19 ldr r3, [pc, #100] ; (8006784 ) 800671e: 781a ldrb r2, [r3, #0] 8006720: 42a2 cmp r2, r4 Prev_Alarm_occur = Alarm_occur; 8006722: bf18 it ne 8006724: 701c strbne r4, [r3, #0] } 8006726: b003 add sp, #12 8006728: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] > Sensor_red[SensorID_buf[i]] 800672c: 4916 ldr r1, [pc, #88] ; (8006788 ) 800672e: 5ccb ldrb r3, [r1, r3] 8006730: f837 b013 ldrh.w fp, [r7, r3, lsl #1] 8006734: f836 a013 ldrh.w sl, [r6, r3, lsl #1] 8006738: 45d3 cmp fp, sl 800673a: d80d bhi.n 8006758 || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] > Sensor_green[SensorID_buf[i]] 800673c: 4913 ldr r1, [pc, #76] ; (800678c ) 800673e: f831 b013 ldrh.w fp, [r1, r3, lsl #1] 8006742: 9901 ldr r1, [sp, #4] 8006744: f831 a013 ldrh.w sl, [r1, r3, lsl #1] 8006748: 45d3 cmp fp, sl 800674a: d805 bhi.n 8006758 || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] > Sensor_blue[SensorID_buf[i]]) { 800674c: f838 b013 ldrh.w fp, [r8, r3, lsl #1] 8006750: f830 a013 ldrh.w sl, [r0, r3, lsl #1] 8006754: 45d3 cmp fp, sl 8006756: d904 bls.n 8006762 Alarm_occur = 1; 8006758: 2401 movs r4, #1 LED_Alarm[SensorID_buf[i]] = 1; 800675a: f805 e003 strb.w lr, [r5, r3] 800675e: 3201 adds r2, #1 8006760: e7d6 b.n 8006710 LED_Alarm[SensorID_buf[i]] = 0; 8006762: f805 9003 strb.w r9, [r5, r3] 8006766: e7fa b.n 800675e 8006768: 200003dc .word 0x200003dc 800676c: 200003ca .word 0x200003ca 8006770: 200003b8 .word 0x200003b8 8006774: 200003ae .word 0x200003ae 8006778: 2000039c .word 0x2000039c 800677c: 20000094 .word 0x20000094 8006780: 20000095 .word 0x20000095 8006784: 20000101 .word 0x20000101 8006788: 200003af .word 0x200003af 800678c: 2000038a .word 0x2000038a 8006790: 200002c4 .word 0x200002c4 08006794 : uint8_t datalosscnt[9] = {0,}; static uint8_t temp_sensorid; static uint8_t gui_Sensorid; void RGB_Controller_Func(uint8_t* data){ 8006794: b530 push {r4, r5, lr} RGB_CMD_T type = data[bluecell_type]; 8006796: 7845 ldrb r5, [r0, #1] void RGB_Controller_Func(uint8_t* data){ 8006798: b09b sub sp, #108 ; 0x6c 800679a: 4604 mov r4, r0 // static uint8_t temp_sensorid; uint8_t Result_buf[100] = {0,}; 800679c: 2264 movs r2, #100 ; 0x64 800679e: 2100 movs r1, #0 80067a0: a801 add r0, sp, #4 80067a2: f001 faea bl 8007d7a uint8_t temp_gui_Sensorid = 0; uint8_t i = 0; switch(type){ 80067a6: 1e6b subs r3, r5, #1 80067a8: 2b17 cmp r3, #23 80067aa: d835 bhi.n 8006818 80067ac: e8df f013 tbh [pc, r3, lsl #1] 80067b0: 00390018 .word 0x00390018 80067b4: 00550043 .word 0x00550043 80067b8: 00950063 .word 0x00950063 80067bc: 00340034 .word 0x00340034 80067c0: 00bc0034 .word 0x00bc0034 80067c4: 00340034 .word 0x00340034 80067c8: 00be0034 .word 0x00be0034 80067cc: 00cc00c5 .word 0x00cc00c5 80067d0: 00e30034 .word 0x00e30034 80067d4: 00340034 .word 0x00340034 80067d8: 00340112 .word 0x00340112 80067dc: 012b011c .word 0x012b011c case RGB_Status_Data_Request: data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++]; 80067e0: 4a9a ldr r2, [pc, #616] ; (8006a4c ) 80067e2: 489b ldr r0, [pc, #620] ; (8006a50 ) 80067e4: 7811 ldrb r1, [r2, #0] 80067e6: 1c4b adds r3, r1, #1 80067e8: 5c41 ldrb r1, [r0, r1] 80067ea: b2db uxtb r3, r3 80067ec: 7121 strb r1, [r4, #4] if(temp_sensorid > (SensorID_Cnt)){ 80067ee: 4999 ldr r1, [pc, #612] ; (8006a54 ) data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++]; 80067f0: 7013 strb r3, [r2, #0] if(temp_sensorid > (SensorID_Cnt)){ 80067f2: 7809 ldrb r1, [r1, #0] // datalosscnt[data[bluecell_srcid + 1]]++; // if(datalosscnt[data[bluecell_srcid + 1]] > 5 && data[bluecell_srcid + 1] != 0){ // RGB_SensorIDAutoSet(1); // memset(&SensorID_buf[0],0x00,8); // } data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 80067f4: 1c60 adds r0, r4, #1 if(temp_sensorid > (SensorID_Cnt)){ 80067f6: 4299 cmp r1, r3 temp_sensorid = 0; 80067f8: bf38 it cc 80067fa: 2300 movcc r3, #0 data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 80067fc: 78a1 ldrb r1, [r4, #2] temp_sensorid = 0; 80067fe: bf38 it cc 8006800: 7013 strbcc r3, [r2, #0] data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 8006802: f001 f8ea bl 80079da 8006806: 7160 strb r0, [r4, #5] memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],RGB_SensorDataRequest_Length); 8006808: 88a2 ldrh r2, [r4, #4] 800680a: 6820 ldr r0, [r4, #0] 800680c: 79a3 ldrb r3, [r4, #6] 800680e: 9001 str r0, [sp, #4] 8006810: f8ad 2008 strh.w r2, [sp, #8] 8006814: f88d 300a strb.w r3, [sp, #10] // Result_buf[Result_buf[bluecell_length] + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); break; default: break; } RGB_Response_Func(&Result_buf[bluecell_stx]); 8006818: a801 add r0, sp, #4 800681a: f7ff fd29 bl 8006270 return; } 800681e: b01b add sp, #108 ; 0x6c 8006820: bd30 pop {r4, r5, pc} memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 8006822: 78a2 ldrb r2, [r4, #2] 8006824: 4621 mov r1, r4 8006826: 3203 adds r2, #3 8006828: a801 add r0, sp, #4 800682a: f001 fa9b bl 8007d64 MyControllerID = data[bluecell_srcid]; // �긽��諛⑹쓽 SRC ID�뒗 �굹�쓽 DST ID�씠�떎. 800682e: 78e2 ldrb r2, [r4, #3] 8006830: 4b89 ldr r3, [pc, #548] ; (8006a58 ) 8006832: 701a strb r2, [r3, #0] break; 8006834: e7f0 b.n 8006818 RGB_SensorIDAutoSet(1); 8006836: 2001 movs r0, #1 8006838: f000 fc06 bl 8007048 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 800683c: 78a2 ldrb r2, [r4, #2] 800683e: 4621 mov r1, r4 8006840: 3203 adds r2, #3 8006842: a801 add r0, sp, #4 8006844: f001 fa8e bl 8007d64 Result_buf[5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006848: f89d 1006 ldrb.w r1, [sp, #6] 800684c: f10d 0005 add.w r0, sp, #5 8006850: f001 f8c3 bl 80079da 8006854: f88d 0009 strb.w r0, [sp, #9] break; 8006858: e7de b.n 8006818 if(data[bluecell_length + 1] == 0) 800685a: 78e1 ldrb r1, [r4, #3] 800685c: 2900 cmp r1, #0 800685e: d0de beq.n 800681e printf("Recognize %d Sensor\n",data[bluecell_length + 1]); 8006860: 487e ldr r0, [pc, #504] ; (8006a5c ) 8006862: f001 fa93 bl 8007d8c SensorID_buf[SensorID_Cnt++] = data[bluecell_length + 1]; 8006866: 4a7b ldr r2, [pc, #492] ; (8006a54 ) 8006868: 7813 ldrb r3, [r2, #0] 800686a: 1c59 adds r1, r3, #1 800686c: 7011 strb r1, [r2, #0] 800686e: 78e1 ldrb r1, [r4, #3] 8006870: 4a77 ldr r2, [pc, #476] ; (8006a50 ) 8006872: 54d1 strb r1, [r2, r3] break; 8006874: e7d0 b.n 8006818 datalosscnt[data[bluecell_srcid]] = 0; 8006876: 2100 movs r1, #0 8006878: 78e3 ldrb r3, [r4, #3] 800687a: 4a79 ldr r2, [pc, #484] ; (8006a60 ) RGB_Alarm_Check(&data[bluecell_stx]); 800687c: 4620 mov r0, r4 datalosscnt[data[bluecell_srcid]] = 0; 800687e: 54d1 strb r1, [r2, r3] data[bluecell_length] += 1; 8006880: 78a3 ldrb r3, [r4, #2] 8006882: 3301 adds r3, #1 8006884: 70a3 strb r3, [r4, #2] RGB_Alarm_Check(&data[bluecell_stx]); 8006886: f7ff ff1d bl 80066c4 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 800688a: 78a2 ldrb r2, [r4, #2] 800688c: 4621 mov r1, r4 800688e: 3203 adds r2, #3 8006890: a801 add r0, sp, #4 8006892: f001 fa67 bl 8007d64 Result_buf[Result_buf[bluecell_length] - 1] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 8006896: f7ff fea9 bl 80065ec 800689a: f89d 3006 ldrb.w r3, [sp, #6] 800689e: aa1a add r2, sp, #104 ; 0x68 80068a0: 4413 add r3, r2 80068a2: f803 0c65 strb.w r0, [r3, #-101] Result_buf[Result_buf[bluecell_length] + 0] = Lora_Buf[bluecell_srcid + 2]; 80068a6: f89d 3006 ldrb.w r3, [sp, #6] Result_buf[Result_buf[bluecell_length] + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80068aa: f10d 0005 add.w r0, sp, #5 Result_buf[Result_buf[bluecell_length] + 0] = Lora_Buf[bluecell_srcid + 2]; 80068ae: 4413 add r3, r2 80068b0: 4a6c ldr r2, [pc, #432] ; (8006a64 ) 80068b2: 7952 ldrb r2, [r2, #5] 80068b4: f803 2c64 strb.w r2, [r3, #-100] Result_buf[Result_buf[bluecell_length] + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80068b8: f89d 4006 ldrb.w r4, [sp, #6] 80068bc: 4621 mov r1, r4 80068be: f001 f88c bl 80079da 80068c2: ab1a add r3, sp, #104 ; 0x68 80068c4: 441c add r4, r3 80068c6: f804 0c63 strb.w r0, [r4, #-99] Result_buf[Result_buf[bluecell_length] + 2] = 0xeb; 80068ca: f89d 3006 ldrb.w r3, [sp, #6] 80068ce: aa1a add r2, sp, #104 ; 0x68 80068d0: 4413 add r3, r2 80068d2: 22eb movs r2, #235 ; 0xeb 80068d4: f803 2c62 strb.w r2, [r3, #-98] break; 80068d8: e79e b.n 8006818 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80068da: 78a2 ldrb r2, [r4, #2] 80068dc: 4621 mov r1, r4 80068de: 3203 adds r2, #3 80068e0: a801 add r0, sp, #4 80068e2: f001 fa3f bl 8007d64 RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); 80068e6: 7922 ldrb r2, [r4, #4] 80068e8: 7963 ldrb r3, [r4, #5] 80068ea: 7aa1 ldrb r1, [r4, #10] 80068ec: ea43 2302 orr.w r3, r3, r2, lsl #8 80068f0: 4a5d ldr r2, [pc, #372] ; (8006a68 ) Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80068f2: f10d 0005 add.w r0, sp, #5 RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); 80068f6: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorGreenLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_green_H] << 8) |data[bluecell_green_L]); 80068fa: 79a2 ldrb r2, [r4, #6] 80068fc: 79e3 ldrb r3, [r4, #7] 80068fe: 7aa1 ldrb r1, [r4, #10] 8006900: ea43 2302 orr.w r3, r3, r2, lsl #8 8006904: 4a59 ldr r2, [pc, #356] ; (8006a6c ) 8006906: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorBlueLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]); 800690a: 7a22 ldrb r2, [r4, #8] 800690c: 7a63 ldrb r3, [r4, #9] 800690e: 7aa1 ldrb r1, [r4, #10] 8006910: ea43 2302 orr.w r3, r3, r2, lsl #8 8006914: 4a56 ldr r2, [pc, #344] ; (8006a70 ) 8006916: f822 3011 strh.w r3, [r2, r1, lsl #1] Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 800691a: f89d 1006 ldrb.w r1, [sp, #6] 800691e: f001 f85c bl 80079da 8006922: f88d 000f strb.w r0, [sp, #15] break; 8006926: e777 b.n 8006818 NVIC_SystemReset(); 8006928: f7ff fb86 bl 8006038 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 800692c: 78a2 ldrb r2, [r4, #2] 800692e: 4621 mov r1, r4 8006930: 3203 adds r2, #3 8006932: a801 add r0, sp, #4 8006934: f001 fa16 bl 8007d64 break; 8006938: e76e b.n 8006818 Result_buf[bluecell_type] = RGB_Location_Response; 800693a: 230f movs r3, #15 800693c: f88d 3005 strb.w r3, [sp, #5] Result_buf[bluecell_srcid] = data[bluecell_srcid]; 8006940: 78e3 ldrb r3, [r4, #3] 8006942: f88d 3007 strb.w r3, [sp, #7] break; 8006946: e767 b.n 8006818 Result_buf[bluecell_stx] = 0xbe; 8006948: 23be movs r3, #190 ; 0xbe 800694a: f88d 3004 strb.w r3, [sp, #4] Result_buf[bluecell_type] = RGB_ControllerID_GET; 800694e: 2310 movs r3, #16 Result_buf[bluecell_length] = 3; 8006950: 2103 movs r1, #3 Result_buf[bluecell_type] = RGB_ControllerID_GET; 8006952: f88d 3005 strb.w r3, [sp, #5] Result_buf[bluecell_srcid] = MyControllerID; 8006956: 4b40 ldr r3, [pc, #256] ; (8006a58 ) Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006958: f10d 0005 add.w r0, sp, #5 Result_buf[bluecell_srcid] = MyControllerID; 800695c: 781b ldrb r3, [r3, #0] Result_buf[bluecell_length] = 3; 800695e: f88d 1006 strb.w r1, [sp, #6] Result_buf[bluecell_srcid] = MyControllerID; 8006962: f88d 3007 strb.w r3, [sp, #7] Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006966: f001 f838 bl 80079da Result_buf[bluecell_srcid + 2] = 0xeb; 800696a: 23eb movs r3, #235 ; 0xeb Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 800696c: f88d 0008 strb.w r0, [sp, #8] Result_buf[bluecell_srcid + 2] = 0xeb; 8006970: f88d 3009 strb.w r3, [sp, #9] break; 8006974: e750 b.n 8006818 Result_buf[bluecell_stx] = 0xbe; 8006976: 23be movs r3, #190 ; 0xbe 8006978: f88d 3004 strb.w r3, [sp, #4] Result_buf[bluecell_type] = RGB_ControllerLimitGet; 800697c: 2312 movs r3, #18 Result_buf[bluecell_length] = 8; 800697e: 2108 movs r1, #8 Result_buf[bluecell_type] = RGB_ControllerLimitGet; 8006980: f88d 3005 strb.w r3, [sp, #5] Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006984: 4a38 ldr r2, [pc, #224] ; (8006a68 ) 8006986: 78e3 ldrb r3, [r4, #3] Result_buf[bluecell_length] = 8; 8006988: f88d 1006 strb.w r1, [sp, #6] Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 800698c: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 8006990: fa22 f001 lsr.w r0, r2, r1 Result_buf[bluecell_srcid + 1] = RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0x00FF; 8006994: f88d 2008 strb.w r2, [sp, #8] Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006998: 4a34 ldr r2, [pc, #208] ; (8006a6c ) Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 800699a: f88d 0007 strb.w r0, [sp, #7] Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 800699e: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 80069a2: fa22 f001 lsr.w r0, r2, r1 Result_buf[bluecell_srcid + 3] = RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0x00FF; 80069a6: f88d 200a strb.w r2, [sp, #10] Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 80069aa: 4a31 ldr r2, [pc, #196] ; (8006a70 ) Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 80069ac: f88d 0009 strb.w r0, [sp, #9] Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 80069b0: f832 3013 ldrh.w r3, [r2, r3, lsl #1] Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80069b4: f10d 0005 add.w r0, sp, #5 Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 80069b8: fa23 f201 lsr.w r2, r3, r1 Result_buf[bluecell_srcid + 5] = RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0x00FF; 80069bc: f88d 300c strb.w r3, [sp, #12] Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 80069c0: f88d 200b strb.w r2, [sp, #11] Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80069c4: f001 f809 bl 80079da Result_buf[bluecell_srcid + 7] = 0xeb; 80069c8: 23eb movs r3, #235 ; 0xeb Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80069ca: f88d 000d strb.w r0, [sp, #13] Result_buf[bluecell_srcid + 7] = 0xeb; 80069ce: f88d 300e strb.w r3, [sp, #14] break; 80069d2: e721 b.n 8006818 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80069d4: 78a2 ldrb r2, [r4, #2] 80069d6: 4621 mov r1, r4 80069d8: 3203 adds r2, #3 80069da: a801 add r0, sp, #4 80069dc: f001 f9c2 bl 8007d64 Result_buf[bluecell_type] = RGB_Lora_DataResponse; 80069e0: 2316 movs r3, #22 80069e2: f88d 3005 strb.w r3, [sp, #5] break; 80069e6: e717 b.n 8006818 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80069e8: 78a5 ldrb r5, [r4, #2] 80069ea: 4621 mov r1, r4 80069ec: 3503 adds r5, #3 80069ee: 462a mov r2, r5 80069f0: a801 add r0, sp, #4 80069f2: f001 f9b7 bl 8007d64 data[(data[bluecell_length] + 3)]=STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80069f6: f89d 1006 ldrb.w r1, [sp, #6] 80069fa: f10d 0005 add.w r0, sp, #5 80069fe: f000 ffec bl 80079da 8006a02: 5560 strb r0, [r4, r5] break; 8006a04: e708 b.n 8006818 Result_buf[bluecell_stx] = 0xbe; 8006a06: 23be movs r3, #190 ; 0xbe 8006a08: f88d 3004 strb.w r3, [sp, #4] Result_buf[bluecell_type] = RGB_Lora_ConfigGet; 8006a0c: 2318 movs r3, #24 Result_buf[bluecell_length] = 7; 8006a0e: 2107 movs r1, #7 Result_buf[bluecell_type] = RGB_Lora_ConfigGet; 8006a10: f88d 3005 strb.w r3, [sp, #5] Result_buf[bluecell_srcid + 0] = SX1276.frequency; 8006a14: 4b17 ldr r3, [pc, #92] ; (8006a74 ) Result_buf[bluecell_srcid + 5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006a16: f10d 0005 add.w r0, sp, #5 Result_buf[bluecell_srcid + 0] = SX1276.frequency; 8006a1a: 791a ldrb r2, [r3, #4] Result_buf[bluecell_length] = 7; 8006a1c: f88d 1006 strb.w r1, [sp, #6] Result_buf[bluecell_srcid + 0] = SX1276.frequency; 8006a20: f88d 2007 strb.w r2, [sp, #7] Result_buf[bluecell_srcid + 1] = SX1276.LoRa_Pa_boost; 8006a24: 7a5a ldrb r2, [r3, #9] 8006a26: f88d 2008 strb.w r2, [sp, #8] Result_buf[bluecell_srcid + 2] = SX1276.LoRa_Rate; //SF 8006a2a: 799a ldrb r2, [r3, #6] 8006a2c: f88d 2009 strb.w r2, [sp, #9] Result_buf[bluecell_srcid + 3] = SX1276.LoRa_BW; 8006a30: 79da ldrb r2, [r3, #7] Result_buf[bluecell_srcid + 4] = SX1276.LoRa_Lna; 8006a32: 7a1b ldrb r3, [r3, #8] Result_buf[bluecell_srcid + 3] = SX1276.LoRa_BW; 8006a34: f88d 200a strb.w r2, [sp, #10] Result_buf[bluecell_srcid + 4] = SX1276.LoRa_Lna; 8006a38: f88d 300b strb.w r3, [sp, #11] Result_buf[bluecell_srcid + 5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006a3c: f000 ffcd bl 80079da Result_buf[bluecell_srcid + 6] = 0xeb; 8006a40: 23eb movs r3, #235 ; 0xeb Result_buf[bluecell_srcid + 5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006a42: f88d 000c strb.w r0, [sp, #12] Result_buf[bluecell_srcid + 6] = 0xeb; 8006a46: f88d 300d strb.w r3, [sp, #13] break; 8006a4a: e6e5 b.n 8006818 8006a4c: 200003f7 .word 0x200003f7 8006a50: 200003af .word 0x200003af 8006a54: 200003ae .word 0x200003ae 8006a58: 20000400 .word 0x20000400 8006a5c: 08008ea2 .word 0x08008ea2 8006a60: 200003ee .word 0x200003ee 8006a64: 2000009d .word 0x2000009d 8006a68: 2000039c .word 0x2000039c 8006a6c: 2000038a .word 0x2000038a 8006a70: 200002c4 .word 0x200002c4 8006a74: 2000091c .word 0x2000091c 08006a78 : __ASM volatile ("dsb 0xF":::"memory"); 8006a78: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8006a7c: 4905 ldr r1, [pc, #20] ; (8006a94 ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8006a7e: 4b06 ldr r3, [pc, #24] ; (8006a98 ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8006a80: 68ca ldr r2, [r1, #12] 8006a82: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8006a86: 4313 orrs r3, r2 8006a88: 60cb str r3, [r1, #12] 8006a8a: f3bf 8f4f dsb sy __ASM volatile ("nop"); 8006a8e: bf00 nop 8006a90: e7fd b.n 8006a8e 8006a92: bf00 nop 8006a94: e000ed00 .word 0xe000ed00 8006a98: 05fa0004 .word 0x05fa0004 08006a9c : SX1276_hw_SetNSS(hw, 1); HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); } __weak void SX1276_hw_SetNSS(SX1276_hw_t * hw, int value) { HAL_GPIO_WritePin(hw->nss.port, hw->nss.pin, 8006a9c: 1e4b subs r3, r1, #1 8006a9e: 425a negs r2, r3 8006aa0: 8a01 ldrh r1, [r0, #16] 8006aa2: 415a adcs r2, r3 8006aa4: 6940 ldr r0, [r0, #20] 8006aa6: f7fd bf39 b.w 800491c 08006aaa : __weak void SX1276_hw_init(SX1276_hw_t * hw) { 8006aaa: b510 push {r4, lr} 8006aac: 4604 mov r4, r0 SX1276_hw_SetNSS(hw, 1); 8006aae: 2101 movs r1, #1 8006ab0: f7ff fff4 bl 8006a9c HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 8006ab4: 8821 ldrh r1, [r4, #0] 8006ab6: 6860 ldr r0, [r4, #4] 8006ab8: 2201 movs r2, #1 } 8006aba: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 8006abe: f7fd bf2d b.w 800491c 08006ac2 : HAL_SPI_Transmit(hw->spi, &cmd, 1, 1000); while (HAL_SPI_GetState(hw->spi) != HAL_SPI_STATE_READY) ; } #endif // PYJ.2019.04.01_END -- void SX1276_hw_SPICommand(SX1276_hw_t * hw, uint8_t cmd) { 8006ac2: b510 push {r4, lr} 8006ac4: 460c mov r4, r1 SX1276_hw_SetNSS(hw, 0); 8006ac6: 2100 movs r1, #0 8006ac8: f7ff ffe8 bl 8006a9c BLUECELL_SPI_Transmit(cmd); 8006acc: 4620 mov r0, r4 } 8006ace: e8bd 4010 ldmia.w sp!, {r4, lr} BLUECELL_SPI_Transmit(cmd); 8006ad2: f7ff ba6b b.w 8005fac 08006ad6 : //printf("\n"); SX1276_hw_SetNSS(module->hw, 1); } } void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 8006ad6: b5f8 push {r3, r4, r5, r6, r7, lr} 8006ad8: 460e mov r6, r1 8006ada: 4604 mov r4, r0 8006adc: 461f mov r7, r3 uint8_t length) { uint8_t i; if (length <= 1) { return; } else { SX1276_hw_SetNSS(module->hw, 0); 8006ade: 2100 movs r1, #0 8006ae0: 6800 ldr r0, [r0, #0] void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 8006ae2: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 8006ae4: f7ff ffda bl 8006a9c SX1276_hw_SPICommand(module->hw, addr | 0x80); 8006ae8: f046 0180 orr.w r1, r6, #128 ; 0x80 8006aec: 6820 ldr r0, [r4, #0] 8006aee: f7ff ffe8 bl 8006ac2 8006af2: 3f01 subs r7, #1 8006af4: 1e6e subs r6, r5, #1 8006af6: 443d add r5, r7 // printf("Test Data:"); for (i = 0; i < length; i++) { 8006af8: 42ae cmp r6, r5 8006afa: d104 bne.n 8006b06 SX1276_hw_SPICommand(module->hw, txBuf[i]); // printf("%02x ",txBuf[i]); } // printf("\n"); SX1276_hw_SetNSS(module->hw, 1); 8006afc: 2101 movs r1, #1 8006afe: 6820 ldr r0, [r4, #0] 8006b00: f7ff ffcc bl 8006a9c 8006b04: bdf8 pop {r3, r4, r5, r6, r7, pc} SX1276_hw_SPICommand(module->hw, txBuf[i]); 8006b06: f816 1f01 ldrb.w r1, [r6, #1]! 8006b0a: 6820 ldr r0, [r4, #0] 8006b0c: f7ff ffd9 bl 8006ac2 8006b10: e7f2 b.n 8006af8 08006b12 : uint8_t SX1276_hw_SPIReadByte(SX1276_hw_t * hw) { 8006b12: b508 push {r3, lr} SX1276_hw_SetNSS(hw, 0); 8006b14: 2100 movs r1, #0 8006b16: f7ff ffc1 bl 8006a9c rxByte = SpiRead(); 8006b1a: f7ff fa21 bl 8005f60 } 8006b1e: b2c0 uxtb r0, r0 8006b20: bd08 pop {r3, pc} 08006b22 : HAL_Delay(msec); 8006b22: f7fd bbc7 b.w 80042b4 08006b26 : __weak int SX1276_hw_GetDIO0(SX1276_hw_t * hw) { 8006b26: b508 push {r3, lr} return (HAL_GPIO_ReadPin(hw->dio0.port, hw->dio0.pin) == GPIO_PIN_SET); 8006b28: 8901 ldrh r1, [r0, #8] 8006b2a: 68c0 ldr r0, [r0, #12] 8006b2c: f7fd fef0 bl 8004910 } 8006b30: 1e43 subs r3, r0, #1 8006b32: 4258 negs r0, r3 8006b34: 4158 adcs r0, r3 8006b36: bd08 pop {r3, pc} 08006b38 : uint8_t SX1276_SPIIDRead(SX1276_t * module, uint8_t addr) { 8006b38: b538 push {r3, r4, r5, lr} 8006b3a: 4604 mov r4, r0 SX1276_hw_SPICommand(module->hw, addr); 8006b3c: 6800 ldr r0, [r0, #0] 8006b3e: f7ff ffc0 bl 8006ac2 tmp = SX1276_hw_SPIReadByte(module->hw); 8006b42: 6820 ldr r0, [r4, #0] 8006b44: f7ff ffe5 bl 8006b12 8006b48: 4605 mov r5, r0 SX1276_hw_SetNSS(module->hw, 1); 8006b4a: 2101 movs r1, #1 8006b4c: 6820 ldr r0, [r4, #0] 8006b4e: f7ff ffa5 bl 8006a9c } 8006b52: 4628 mov r0, r5 8006b54: bd38 pop {r3, r4, r5, pc} 08006b56 : void SX1276_SPIWrite(SX1276_t * module, uint8_t addr, uint8_t cmd) { 8006b56: b570 push {r4, r5, r6, lr} 8006b58: 4604 mov r4, r0 8006b5a: 460e mov r6, r1 8006b5c: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 8006b5e: 2100 movs r1, #0 8006b60: 6800 ldr r0, [r0, #0] 8006b62: f7ff ff9b bl 8006a9c SX1276_hw_SPICommand(module->hw, addr | 0x80); 8006b66: f046 0180 orr.w r1, r6, #128 ; 0x80 8006b6a: 6820 ldr r0, [r4, #0] 8006b6c: f7ff ffa9 bl 8006ac2 SX1276_hw_SPICommand(module->hw, cmd); 8006b70: 4629 mov r1, r5 8006b72: 6820 ldr r0, [r4, #0] 8006b74: f7ff ffa5 bl 8006ac2 SX1276_hw_SetNSS(module->hw, 1); 8006b78: 2101 movs r1, #1 8006b7a: 6820 ldr r0, [r4, #0] 8006b7c: f7ff ff8e bl 8006a9c 8006b80: bd70 pop {r4, r5, r6, pc} 08006b82 : if (length <= 1) { 8006b82: 2b01 cmp r3, #1 uint8_t length) { 8006b84: b5f8 push {r3, r4, r5, r6, r7, lr} 8006b86: 4605 mov r5, r0 8006b88: 460f mov r7, r1 8006b8a: 4616 mov r6, r2 8006b8c: 461c mov r4, r3 if (length <= 1) { 8006b8e: d916 bls.n 8006bbe SX1276_hw_SetNSS(module->hw, 0); 8006b90: 2100 movs r1, #0 8006b92: 6800 ldr r0, [r0, #0] 8006b94: f7ff ff82 bl 8006a9c SX1276_hw_SPICommand(module->hw, addr); 8006b98: 4639 mov r1, r7 8006b9a: 6828 ldr r0, [r5, #0] 8006b9c: f7ff ff91 bl 8006ac2 8006ba0: 3c01 subs r4, #1 8006ba2: b2e4 uxtb r4, r4 8006ba4: 1e77 subs r7, r6, #1 8006ba6: 4434 add r4, r6 rxBuf[i] = SX1276_hw_SPIReadByte(module->hw); 8006ba8: 6828 ldr r0, [r5, #0] 8006baa: f7ff ffb2 bl 8006b12 8006bae: f807 0f01 strb.w r0, [r7, #1]! for (i = 0; i < length; i++) { 8006bb2: 42a7 cmp r7, r4 8006bb4: d1f8 bne.n 8006ba8 SX1276_hw_SetNSS(module->hw, 1); 8006bb6: 2101 movs r1, #1 8006bb8: 6828 ldr r0, [r5, #0] 8006bba: f7ff ff6f bl 8006a9c 8006bbe: bdf8 pop {r3, r4, r5, r6, r7, pc} 08006bc0 : if (length <= 1) { 8006bc0: 2b01 cmp r3, #1 8006bc2: d901 bls.n 8006bc8 8006bc4: f7ff bf87 b.w 8006ad6 8006bc8: 4770 bx lr 08006bca : */ void SX1276_set_power(SX1276_t * module) { // SX1276_SPIWrite(LR_RegPaConfig, (PaSelect << 7) | ((MaxPower & 0x07) << 4) | (OutputPower & 0x0F)); SX1276_SPIWrite(module,LR_RegPaConfig, (module->LoRa_Pa_boost << 7) | ((0x07) << 4) | (module->power & 0x0F)); 8006bca: 7942 ldrb r2, [r0, #5] 8006bcc: 7a43 ldrb r3, [r0, #9] 8006bce: f002 020f and.w r2, r2, #15 8006bd2: f042 0270 orr.w r2, r2, #112 ; 0x70 8006bd6: ea42 12c3 orr.w r2, r2, r3, lsl #7 8006bda: b2d2 uxtb r2, r2 8006bdc: 2109 movs r1, #9 8006bde: f7ff bfba b.w 8006b56 08006be2 : SX1276_standby(module); //Entry standby mode } void SX1276_standby(SX1276_t * module) { // SX1276_SPIWrite(module, LR_RegOpMode, 0x09); SX1276_SPIWrite(module, LR_RegOpMode, 0x01); 8006be2: 2201 movs r2, #1 void SX1276_standby(SX1276_t * module) { 8006be4: b510 push {r4, lr} SX1276_SPIWrite(module, LR_RegOpMode, 0x01); 8006be6: 4611 mov r1, r2 void SX1276_standby(SX1276_t * module) { 8006be8: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x01); 8006bea: f7ff ffb4 bl 8006b56 module->status = STANDBY; 8006bee: 2301 movs r3, #1 8006bf0: 72e3 strb r3, [r4, #11] 8006bf2: bd10 pop {r4, pc} 08006bf4 : } void SX1276_sleep(SX1276_t * module) { 8006bf4: b510 push {r4, lr} // SX1276_SPIWrite(module, LR_RegOpMode, 0x08); SX1276_SPIWrite(module, LR_RegOpMode, 0x80); 8006bf6: 2280 movs r2, #128 ; 0x80 8006bf8: 2101 movs r1, #1 void SX1276_sleep(SX1276_t * module) { 8006bfa: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x80); 8006bfc: f7ff ffab bl 8006b56 module->status = SLEEP; 8006c00: 2300 movs r3, #0 8006c02: 72e3 strb r3, [r4, #11] 8006c04: bd10 pop {r4, pc} 08006c06 : } void SX1276_entryLoRa(SX1276_t * module) { // SX1276_SPIWrite(module, LR_RegOpMode, 0x88); SX1276_SPIWrite(module, LR_RegOpMode, 0x80); 8006c06: 2280 movs r2, #128 ; 0x80 8006c08: 2101 movs r1, #1 8006c0a: f7ff bfa4 b.w 8006b56 ... 08006c10 : uint8_t LoRa_Rate, uint8_t LoRa_BW,uint8_t LoRa_Lna,uint8_t LoRa_PaBoost) { 8006c10: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8006c14: 4604 mov r4, r0 8006c16: 460d mov r5, r1 8006c18: 4691 mov r9, r2 8006c1a: 461f mov r7, r3 8006c1c: f89d 6020 ldrb.w r6, [sp, #32] 8006c20: f89d 8024 ldrb.w r8, [sp, #36] ; 0x24 SX1276_sleep(module); //Change modem mode Must in Sleep mode 8006c24: f7ff ffe6 bl 8006bf4 SX1276_hw_DelayMs(15); 8006c28: 200f movs r0, #15 8006c2a: f7ff ff7a bl 8006b22 SX1276_entryLoRa(module); 8006c2e: 4620 mov r0, r4 8006c30: f7ff ffe9 bl 8006c06 8006c34: 4a34 ldr r2, [pc, #208] ; (8006d08 ) (uint8_t*) SX1276_Frequency[frequency], 3); //setting frequency parameter 8006c36: eb05 0545 add.w r5, r5, r5, lsl #1 8006c3a: 442a add r2, r5 8006c3c: 2303 movs r3, #3 8006c3e: 2106 movs r1, #6 8006c40: 4620 mov r0, r4 8006c42: f7ff ff48 bl 8006ad6 SX1276_SPIWrite(module, LR_RegPaConfig, SX1276_Power[power]); //Setting output power parameter 8006c46: 4b31 ldr r3, [pc, #196] ; (8006d0c ) 8006c48: 2109 movs r1, #9 8006c4a: f813 2009 ldrb.w r2, [r3, r9] 8006c4e: 4620 mov r0, r4 8006c50: f7ff ff81 bl 8006b56 SX1276_SPIWrite(module, LR_RegOcp, 0x0B); //RegOcp,Close Ocp 8006c54: 220b movs r2, #11 8006c56: 4620 mov r0, r4 8006c58: 4611 mov r1, r2 8006c5a: f7ff ff7c bl 8006b56 SX1276_set_power(module); 8006c5e: 4620 mov r0, r4 8006c60: f7ff ffb3 bl 8006bca SX1276_SPIWrite(module, LR_RegLna, LoRa_Lna); //RegLNA,High & LNA Enable 8006c64: 4642 mov r2, r8 8006c66: 210c movs r1, #12 8006c68: 4620 mov r0, r4 8006c6a: f7ff ff74 bl 8006b56 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8006c6e: 4b28 ldr r3, [pc, #160] ; (8006d10 ) 8006c70: 5ddd ldrb r5, [r3, r7] 8006c72: 4b28 ldr r3, [pc, #160] ; (8006d14 ) 8006c74: 2d06 cmp r5, #6 ((SX1276_LoRaBandwidth[LoRa_BW] << 4) + (SX1276_CR << 1) + 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04) 8006c76: 5d9a ldrb r2, [r3, r6] 8006c78: ea4f 1202 mov.w r2, r2, lsl #4 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8006c7c: d137 bne.n 8006cee SX1276_SPIWrite(module, 8006c7e: 3203 adds r2, #3 8006c80: b2d2 uxtb r2, r2 8006c82: 211d movs r1, #29 8006c84: 4620 mov r0, r4 8006c86: f7ff ff66 bl 8006b56 SX1276_SPIWrite(module,LR_RegModemConfig2,((SX1276_SpreadFactor[LoRa_Rate] << 4) + (SX1276_CRC << 2) + 0x03)); 8006c8a: 2267 movs r2, #103 ; 0x67 8006c8c: 211e movs r1, #30 8006c8e: 4620 mov r0, r4 8006c90: f7ff ff61 bl 8006b56 tmp = SX1276_SPIRead(module, 0x31); 8006c94: 2131 movs r1, #49 ; 0x31 8006c96: 4620 mov r0, r4 8006c98: f7ff ff4e bl 8006b38 tmp &= 0xF8; 8006c9c: f000 02f8 and.w r2, r0, #248 ; 0xf8 SX1276_SPIWrite(module, 0x31, tmp); 8006ca0: f042 0205 orr.w r2, r2, #5 8006ca4: 2131 movs r1, #49 ; 0x31 8006ca6: 4620 mov r0, r4 8006ca8: f7ff ff55 bl 8006b56 SX1276_SPIWrite(module, 0x37, 0x0C); 8006cac: 220c movs r2, #12 8006cae: 2137 movs r1, #55 ; 0x37 SX1276_SPIWrite(module, 8006cb0: 4620 mov r0, r4 8006cb2: f7ff ff50 bl 8006b56 SX1276_SPIWrite(module, LR_RegSymbTimeoutLsb, 0xFF); //RegSymbTimeoutLsb Timeout = 0x3FF(Max) 8006cb6: 4620 mov r0, r4 8006cb8: 22ff movs r2, #255 ; 0xff 8006cba: 211f movs r1, #31 8006cbc: f7ff ff4b bl 8006b56 SX1276_SPIWrite(module, LR_RegPreambleMsb, 0x00); //RegPreambleMsb 8006cc0: 4620 mov r0, r4 8006cc2: 2200 movs r2, #0 8006cc4: 2120 movs r1, #32 8006cc6: f7ff ff46 bl 8006b56 SX1276_SPIWrite(module, LR_RegPreambleLsb, 12); //RegPreambleLsb 8+4=12byte Preamble 8006cca: 4620 mov r0, r4 8006ccc: 220c movs r2, #12 8006cce: 2121 movs r1, #33 ; 0x21 8006cd0: f7ff ff41 bl 8006b56 SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01 8006cd4: 4620 mov r0, r4 8006cd6: 2201 movs r2, #1 8006cd8: 2141 movs r1, #65 ; 0x41 8006cda: f7ff ff3c bl 8006b56 module->readBytes = 0; 8006cde: 2300 movs r3, #0 SX1276_standby(module); //Entry standby mode 8006ce0: 4620 mov r0, r4 module->readBytes = 0; 8006ce2: f884 310c strb.w r3, [r4, #268] ; 0x10c } 8006ce6: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} SX1276_standby(module); //Entry standby mode 8006cea: f7ff bf7a b.w 8006be2 SX1276_SPIWrite(module, 8006cee: 3202 adds r2, #2 8006cf0: f002 02fe and.w r2, r2, #254 ; 0xfe 8006cf4: 211d movs r1, #29 8006cf6: 4620 mov r0, r4 8006cf8: f7ff ff2d bl 8006b56 ((SX1276_SpreadFactor[LoRa_Rate] << 4) + (SX1276_CRC << 2) 8006cfc: 012a lsls r2, r5, #4 SX1276_SPIWrite(module, 8006cfe: 3207 adds r2, #7 8006d00: b2d2 uxtb r2, r2 8006d02: 211e movs r1, #30 8006d04: e7d4 b.n 8006cb0 8006d06: bf00 nop 8006d08: 08008fce .word 0x08008fce 8006d0c: 0800901f .word 0x0800901f 8006d10: 08009023 .word 0x08009023 8006d14: 08008ff8 .word 0x08008ff8 08006d18 : void SX1276_defaultConfig(SX1276_t * module) { 8006d18: b530 push {r4, r5, lr} SX1276_config(module, module->frequency, module->power, module->LoRa_Rate, 8006d1a: 7a45 ldrb r5, [r0, #9] void SX1276_defaultConfig(SX1276_t * module) { 8006d1c: b085 sub sp, #20 SX1276_config(module, module->frequency, module->power, module->LoRa_Rate, 8006d1e: 9502 str r5, [sp, #8] 8006d20: 79c4 ldrb r4, [r0, #7] 8006d22: 7a05 ldrb r5, [r0, #8] 8006d24: 7983 ldrb r3, [r0, #6] 8006d26: 7942 ldrb r2, [r0, #5] 8006d28: 7901 ldrb r1, [r0, #4] 8006d2a: 9501 str r5, [sp, #4] 8006d2c: 9400 str r4, [sp, #0] 8006d2e: f7ff ff6f bl 8006c10 } 8006d32: b005 add sp, #20 8006d34: bd30 pop {r4, r5, pc} 08006d36 : } void SX1276_clearLoRaIrq(SX1276_t * module) { SX1276_SPIWrite(module, LR_RegIrqFlags, 0xFF); 8006d36: 22ff movs r2, #255 ; 0xff 8006d38: 2112 movs r1, #18 8006d3a: f7ff bf0c b.w 8006b56 ... 08006d40 : } int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006d40: b570 push {r4, r5, r6, lr} 8006d42: 4604 mov r4, r0 8006d44: 460e mov r6, r1 uint8_t addr; module->packetLength = length; 8006d46: 72a1 strb r1, [r4, #10] int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006d48: 4615 mov r5, r2 SX1276_defaultConfig(module); //Setting base parameter 8006d4a: f7ff ffe5 bl 8006d18 SX1276_SPIWrite(module, REG_LR_PADAC, 0x84); //Normal and RX 8006d4e: 2284 movs r2, #132 ; 0x84 8006d50: 214d movs r1, #77 ; 0x4d 8006d52: 4620 mov r0, r4 8006d54: f7ff feff bl 8006b56 SX1276_SPIWrite(module, LR_RegHopPeriod, 0xFF); //No FHSS 8006d58: 22ff movs r2, #255 ; 0xff 8006d5a: 2124 movs r1, #36 ; 0x24 8006d5c: 4620 mov r0, r4 8006d5e: f7ff fefa bl 8006b56 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x01);//DIO=00,DIO1=00,DIO2=00, DIO3=01 8006d62: 2201 movs r2, #1 8006d64: 2140 movs r1, #64 ; 0x40 8006d66: 4620 mov r0, r4 8006d68: f7ff fef5 bl 8006b56 SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0x3F);//Open RxDone interrupt & Timeout 8006d6c: 223f movs r2, #63 ; 0x3f 8006d6e: 2111 movs r1, #17 8006d70: 4620 mov r0, r4 8006d72: f7ff fef0 bl 8006b56 SX1276_clearLoRaIrq(module); 8006d76: 4620 mov r0, r4 8006d78: f7ff ffdd bl 8006d36 SX1276_SPIWrite(module, LR_RegPayloadLength, length);//Payload Length 21byte(this register must difine when the data long of one byte in SF is 6) 8006d7c: 4632 mov r2, r6 8006d7e: 2122 movs r1, #34 ; 0x22 8006d80: 4620 mov r0, r4 8006d82: f7ff fee8 bl 8006b56 addr = SX1276_SPIRead(module, LR_RegFifoRxBaseAddr); //Read RxBaseAddr 8006d86: 210f movs r1, #15 8006d88: 4620 mov r0, r4 8006d8a: f7ff fed5 bl 8006b38 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr->FiFoAddrPtr 8006d8e: 210d movs r1, #13 8006d90: 4602 mov r2, r0 8006d92: 4620 mov r0, r4 8006d94: f7ff fedf bl 8006b56 SX1276_SPIWrite(module, LR_RegOpMode, 0x85); //Mode//Low Frequency Mode 8006d98: 2285 movs r2, #133 ; 0x85 8006d9a: 2101 movs r1, #1 8006d9c: 4620 mov r0, r4 8006d9e: f7ff feda bl 8006b56 //SX1276_SPIWrite(module, LR_RegOpMode,0x05); //Continuous Rx Mode //High Frequency Mode module->readBytes = 0; 8006da2: 2300 movs r3, #0 8006da4: f884 310c strb.w r3, [r4, #268] ; 0x10c while (1) { if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8006da8: 2118 movs r1, #24 8006daa: 4620 mov r0, r4 8006dac: f7ff fec4 bl 8006b38 8006db0: 0743 lsls r3, r0, #29 8006db2: d40d bmi.n 8006dd0 module->status = RX; return 1; } if (--timeout == 0) { 8006db4: 3d01 subs r5, #1 8006db6: d107 bne.n 8006dc8 printf( 8006db8: f44f 72a3 mov.w r2, #326 ; 0x146 8006dbc: 4906 ldr r1, [pc, #24] ; (8006dd8 ) 8006dbe: 4807 ldr r0, [pc, #28] ; (8006ddc ) 8006dc0: f000 ffe4 bl 8007d8c "Function : %s Line : %d \n",__func__,__LINE__); NVIC_SystemReset(); 8006dc4: f7ff fe58 bl 8006a78 SX1276_hw_Reset(module->hw); SX1276_defaultConfig(module); return 0; } SX1276_hw_DelayMs(1); 8006dc8: 2001 movs r0, #1 8006dca: f7ff feaa bl 8006b22 if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8006dce: e7eb b.n 8006da8 module->status = RX; 8006dd0: 2303 movs r3, #3 } } 8006dd2: 2001 movs r0, #1 module->status = RX; 8006dd4: 72e3 strb r3, [r4, #11] } 8006dd6: bd70 pop {r4, r5, r6, pc} 8006dd8: 0800902a .word 0x0800902a 8006ddc: 08009002 .word 0x08009002 08006de0 : uint8_t SX1276_LoRaRxPacket(SX1276_t * module) { 8006de0: b570 push {r4, r5, r6, lr} 8006de2: 4604 mov r4, r0 unsigned char addr; unsigned char packet_size; if (SX1276_hw_GetDIO0(module->hw)) { 8006de4: 6800 ldr r0, [r0, #0] 8006de6: f7ff fe9e bl 8006b26 8006dea: b1f0 cbz r0, 8006e2a memset(module->rxBuffer, 0x00, SX1276_MAX_PACKET); 8006dec: f104 060c add.w r6, r4, #12 8006df0: f44f 7280 mov.w r2, #256 ; 0x100 8006df4: 2100 movs r1, #0 8006df6: 4630 mov r0, r6 8006df8: f000 ffbf bl 8007d7a addr = SX1276_SPIRead(module, LR_RegFifoRxCurrentaddr); //last packet addr 8006dfc: 2110 movs r1, #16 8006dfe: 4620 mov r0, r4 8006e00: f7ff fe9a bl 8006b38 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr -> FiFoAddrPtr 8006e04: 210d movs r1, #13 8006e06: 4602 mov r2, r0 8006e08: 4620 mov r0, r4 8006e0a: f7ff fea4 bl 8006b56 if (module->LoRa_Rate == SX1276_LORA_SF_6) { //When SpreadFactor is six,will used Implicit Header mode(Excluding internal packet length) 8006e0e: 79a3 ldrb r3, [r4, #6] 8006e10: b973 cbnz r3, 8006e30 packet_size = module->packetLength; 8006e12: 7aa5 ldrb r5, [r4, #10] } else { packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes } SX1276_SPIBurstRead(module, 0x00, module->rxBuffer, packet_size); 8006e14: 4620 mov r0, r4 8006e16: 462b mov r3, r5 8006e18: 4632 mov r2, r6 8006e1a: 2100 movs r1, #0 8006e1c: f7ff feb1 bl 8006b82 module->readBytes = packet_size; 8006e20: f884 510c strb.w r5, [r4, #268] ; 0x10c SX1276_clearLoRaIrq(module); 8006e24: 4620 mov r0, r4 8006e26: f7ff ff86 bl 8006d36 } return module->readBytes; } 8006e2a: f894 010c ldrb.w r0, [r4, #268] ; 0x10c 8006e2e: bd70 pop {r4, r5, r6, pc} packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes 8006e30: 2113 movs r1, #19 8006e32: 4620 mov r0, r4 8006e34: f7ff fe80 bl 8006b38 8006e38: 4605 mov r5, r0 8006e3a: e7eb b.n 8006e14 08006e3c : int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006e3c: b570 push {r4, r5, r6, lr} 8006e3e: 4604 mov r4, r0 8006e40: 460e mov r6, r1 uint8_t addr; uint8_t temp; module->packetLength = length; 8006e42: 72a1 strb r1, [r4, #10] int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006e44: 4615 mov r5, r2 SX1276_defaultConfig(module); //setting base parameter 8006e46: f7ff ff67 bl 8006d18 SX1276_SPIWrite(module, REG_LR_PADAC, 0x87); //Tx for 20dBm 8006e4a: 2287 movs r2, #135 ; 0x87 8006e4c: 214d movs r1, #77 ; 0x4d 8006e4e: 4620 mov r0, r4 8006e50: f7ff fe81 bl 8006b56 SX1276_SPIWrite(module, LR_RegHopPeriod, 0x00); //RegHopPeriod NO FHSS 8006e54: 2200 movs r2, #0 8006e56: 2124 movs r1, #36 ; 0x24 8006e58: 4620 mov r0, r4 8006e5a: f7ff fe7c bl 8006b56 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01 8006e5e: 2241 movs r2, #65 ; 0x41 8006e60: 2140 movs r1, #64 ; 0x40 8006e62: 4620 mov r0, r4 8006e64: f7ff fe77 bl 8006b56 SX1276_clearLoRaIrq(module); 8006e68: 4620 mov r0, r4 8006e6a: f7ff ff64 bl 8006d36 SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0xF7); //Open TxDone interrupt 8006e6e: 22f7 movs r2, #247 ; 0xf7 8006e70: 2111 movs r1, #17 8006e72: 4620 mov r0, r4 8006e74: f7ff fe6f bl 8006b56 SX1276_SPIWrite(module, LR_RegPayloadLength, length); //RegPayloadLength 21byte 8006e78: 4632 mov r2, r6 8006e7a: 2122 movs r1, #34 ; 0x22 8006e7c: 4620 mov r0, r4 8006e7e: f7ff fe6a bl 8006b56 addr = SX1276_SPIRead(module, LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr 8006e82: 210e movs r1, #14 8006e84: 4620 mov r0, r4 8006e86: f7ff fe57 bl 8006b38 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RegFifoAddrPtr 8006e8a: 210d movs r1, #13 8006e8c: 4602 mov r2, r0 8006e8e: 4620 mov r0, r4 8006e90: f7ff fe61 bl 8006b56 while (1) { temp = SX1276_SPIRead(module, LR_RegPayloadLength); 8006e94: 2122 movs r1, #34 ; 0x22 8006e96: 4620 mov r0, r4 8006e98: f7ff fe4e bl 8006b38 if (temp == length) { 8006e9c: 4286 cmp r6, r0 8006e9e: d009 beq.n 8006eb4 module->status = TX; return 1; } if (--timeout == 0) { 8006ea0: 3d01 subs r5, #1 8006ea2: d1f7 bne.n 8006e94 printf( 8006ea4: f240 1283 movw r2, #387 ; 0x183 8006ea8: 4904 ldr r1, [pc, #16] ; (8006ebc ) 8006eaa: 4805 ldr r0, [pc, #20] ; (8006ec0 ) 8006eac: f000 ff6e bl 8007d8c "Function : %s Line : %d \n",__func__,__LINE__); NVIC_SystemReset(); 8006eb0: f7ff fde2 bl 8006a78 module->status = TX; 8006eb4: 2302 movs r3, #2 SX1276_hw_Reset(module->hw); SX1276_defaultConfig(module); return 0; } } } 8006eb6: 2001 movs r0, #1 module->status = TX; 8006eb8: 72e3 strb r3, [r4, #11] } 8006eba: bd70 pop {r4, r5, r6, pc} 8006ebc: 0800903d .word 0x0800903d 8006ec0: 08009002 .word 0x08009002 08006ec4 : int SX1276_LoRaTxPacket(SX1276_t * module, uint8_t* txBuffer, uint8_t length, uint32_t timeout) { 8006ec4: b538 push {r3, r4, r5, lr} 8006ec6: 4604 mov r4, r0 8006ec8: 461d mov r5, r3 SX1276_SPIBurstWrite(module, 0x00, txBuffer, length); 8006eca: 4613 mov r3, r2 8006ecc: 460a mov r2, r1 8006ece: 2100 movs r1, #0 8006ed0: f7ff fe76 bl 8006bc0 // SX1276_SPIWrite(module, LR_RegOpMode, 0x8b); //Tx Mode SX1276_SPIWrite(module, LR_RegOpMode, 0x83); //Tx Mode 8006ed4: 2283 movs r2, #131 ; 0x83 8006ed6: 2101 movs r1, #1 8006ed8: 4620 mov r0, r4 8006eda: f7ff fe3c bl 8006b56 while (1) { if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over 8006ede: 6820 ldr r0, [r4, #0] 8006ee0: f7ff fe21 bl 8006b26 8006ee4: b968 cbnz r0, 8006f02 SX1276_clearLoRaIrq(module); //Clear irq SX1276_standby(module); //Entry Standby mode return 1; } if (--timeout == 0) { 8006ee6: 3d01 subs r5, #1 8006ee8: d107 bne.n 8006efa printf( 8006eea: f44f 72ce mov.w r2, #412 ; 0x19c 8006eee: 490b ldr r1, [pc, #44] ; (8006f1c ) 8006ef0: 480b ldr r0, [pc, #44] ; (8006f20 ) 8006ef2: f000 ff4b bl 8007d8c "Function : %s Line : %d \n",__func__,__LINE__); NVIC_SystemReset(); 8006ef6: f7ff fdbf bl 8006a78 SX1276_hw_Reset(module->hw); SX1276_defaultConfig(module); return 0; } SX1276_hw_DelayMs(1); 8006efa: 2001 movs r0, #1 8006efc: f7ff fe11 bl 8006b22 if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over 8006f00: e7ed b.n 8006ede SX1276_SPIRead(module, LR_RegIrqFlags); 8006f02: 2112 movs r1, #18 8006f04: 4620 mov r0, r4 8006f06: f7ff fe17 bl 8006b38 SX1276_clearLoRaIrq(module); //Clear irq 8006f0a: 4620 mov r0, r4 8006f0c: f7ff ff13 bl 8006d36 SX1276_standby(module); //Entry Standby mode 8006f10: 4620 mov r0, r4 8006f12: f7ff fe66 bl 8006be2 } } 8006f16: 2001 movs r0, #1 8006f18: bd38 pop {r3, r4, r5, pc} 8006f1a: bf00 nop 8006f1c: 08009050 .word 0x08009050 8006f20: 08009002 .word 0x08009002 08006f24 : void SX1276_begin(SX1276_t * module, uint8_t frequency, uint8_t power, uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength,uint8_t LoRa_Lna,uint8_t LoRa_PaBoost) { 8006f24: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8006f28: 4604 mov r4, r0 8006f2a: 468b mov fp, r1 8006f2c: 4692 mov sl, r2 8006f2e: 4699 mov r9, r3 8006f30: f89d 8028 ldrb.w r8, [sp, #40] ; 0x28 8006f34: f89d 702c ldrb.w r7, [sp, #44] ; 0x2c 8006f38: f89d 6030 ldrb.w r6, [sp, #48] ; 0x30 8006f3c: f89d 5034 ldrb.w r5, [sp, #52] ; 0x34 SX1276_hw_init(module->hw); 8006f40: 6800 ldr r0, [r0, #0] 8006f42: f7ff fdb2 bl 8006aaa module->frequency = frequency; 8006f46: f884 b004 strb.w fp, [r4, #4] module->power = power; 8006f4a: f884 a005 strb.w sl, [r4, #5] module->LoRa_Rate = LoRa_Rate; 8006f4e: f884 9006 strb.w r9, [r4, #6] module->LoRa_BW = LoRa_BW; 8006f52: f884 8007 strb.w r8, [r4, #7] module->packetLength = packetLength; 8006f56: 72a7 strb r7, [r4, #10] module->LoRa_Lna = LoRa_Lna; 8006f58: 7226 strb r6, [r4, #8] module->LoRa_Pa_boost = LoRa_PaBoost; 8006f5a: 7265 strb r5, [r4, #9] SX1276_defaultConfig(module); 8006f5c: 4620 mov r0, r4 } 8006f5e: e8bd 4ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} SX1276_defaultConfig(module); 8006f62: f7ff bed9 b.w 8006d18 08006f66 : uint8_t SX1276_available(SX1276_t * module) { return SX1276_LoRaRxPacket(module); } uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) { 8006f66: b570 push {r4, r5, r6, lr} 8006f68: 460e mov r6, r1 if (length != module->readBytes) 8006f6a: f890 410c ldrb.w r4, [r0, #268] ; 0x10c uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) { 8006f6e: 4605 mov r5, r0 length = module->readBytes; memcpy(rxBuf, module->rxBuffer, length); 8006f70: f100 010c add.w r1, r0, #12 8006f74: 4622 mov r2, r4 8006f76: 4630 mov r0, r6 8006f78: f000 fef4 bl 8007d64 rxBuf[length] = '\0'; 8006f7c: 2300 movs r3, #0 8006f7e: 5533 strb r3, [r6, r4] module->readBytes = 0; 8006f80: f885 310c strb.w r3, [r5, #268] ; 0x10c return length; } 8006f84: 4620 mov r0, r4 8006f86: bd70 pop {r4, r5, r6, pc} 08006f88 : uint8_t SX1276_RSSI_LoRa(SX1276_t * module) { 8006f88: b508 push {r3, lr} uint32_t temp = 10; temp = SX1276_SPIRead(module, LR_RegRssiValue); //Read RegRssiValue, Rssi value 8006f8a: 211b movs r1, #27 8006f8c: f7ff fdd4 bl 8006b38 temp = temp + 127 - 137; //127:Max RSSI, 137:RSSI offset 8006f90: 380a subs r0, #10 return (uint8_t) temp; } 8006f92: b2c0 uxtb r0, r0 8006f94: bd08 pop {r3, pc} ... 08006f98 : void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART1)//RGB Comunication 8006f98: 6802 ldr r2, [r0, #0] 8006f9a: 4b10 ldr r3, [pc, #64] ; (8006fdc ) { 8006f9c: b510 push {r4, lr} if(huart->Instance == USART1)//RGB Comunication 8006f9e: 429a cmp r2, r3 8006fa0: d10b bne.n 8006fba { buf1[count_in1] = rx1_data[0];//(uint8_t)USART2->DR; 8006fa2: 4a0f ldr r2, [pc, #60] ; (8006fe0 ) 8006fa4: 490f ldr r1, [pc, #60] ; (8006fe4 ) 8006fa6: 7813 ldrb r3, [r2, #0] 8006fa8: 780c ldrb r4, [r1, #0] 8006faa: 490f ldr r1, [pc, #60] ; (8006fe8 ) 8006fac: 54cc strb r4, [r1, r3] if(++count_in1>=buf_size){ count_in1 = 0; } 8006fae: 3301 adds r3, #1 8006fb0: b2db uxtb r3, r3 8006fb2: 2b63 cmp r3, #99 ; 0x63 8006fb4: bf88 it hi 8006fb6: 2300 movhi r3, #0 8006fb8: 7013 strb r3, [r2, #0] } if(huart->Instance == USART2) // Lora?? ?? Â???¹Â???¢Ë??Å ?? ?¬?Š¸ 8006fba: 6802 ldr r2, [r0, #0] 8006fbc: 4b0b ldr r3, [pc, #44] ; (8006fec ) 8006fbe: 429a cmp r2, r3 8006fc0: d10b bne.n 8006fda { buf2[count_in2] = rx2_data[0];//(uint8_t)USART2->DR; 8006fc2: 4a0b ldr r2, [pc, #44] ; (8006ff0 ) 8006fc4: 490b ldr r1, [pc, #44] ; (8006ff4 ) 8006fc6: 7813 ldrb r3, [r2, #0] 8006fc8: 7808 ldrb r0, [r1, #0] 8006fca: 490b ldr r1, [pc, #44] ; (8006ff8 ) 8006fcc: 54c8 strb r0, [r1, r3] if(++count_in2>=buf_size){ count_in2 = 0; } 8006fce: 3301 adds r3, #1 8006fd0: b2db uxtb r3, r3 8006fd2: 2b63 cmp r3, #99 ; 0x63 8006fd4: bf88 it hi 8006fd6: 2300 movhi r3, #0 8006fd8: 7013 strb r3, [r2, #0] 8006fda: bd10 pop {r4, pc} 8006fdc: 40013800 .word 0x40013800 8006fe0: 200004d6 .word 0x200004d6 8006fe4: 20000834 .word 0x20000834 8006fe8: 2000040c .word 0x2000040c 8006fec: 40004400 .word 0x40004400 8006ff0: 200004d7 .word 0x200004d7 8006ff4: 20000660 .word 0x20000660 8006ff8: 20000470 .word 0x20000470 08006ffc : } } void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8006ffc: 6802 ldr r2, [r0, #0] 8006ffe: 4b0a ldr r3, [pc, #40] ; (8007028 ) 8007000: 429a cmp r2, r3 8007002: d10f bne.n 8007024 Uart1TimerCnt++; 8007004: 4a09 ldr r2, [pc, #36] ; (800702c ) 8007006: 6813 ldr r3, [r2, #0] 8007008: 3301 adds r3, #1 800700a: 6013 str r3, [r2, #0] Uart2TimerCnt++; 800700c: 4a08 ldr r2, [pc, #32] ; (8007030 ) 800700e: 6813 ldr r3, [r2, #0] 8007010: 3301 adds r3, #1 8007012: 6013 str r3, [r2, #0] LedTimerCnt++; 8007014: 4a07 ldr r2, [pc, #28] ; (8007034 ) 8007016: 6813 ldr r3, [r2, #0] 8007018: 3301 adds r3, #1 800701a: 6013 str r3, [r2, #0] // LoraTxTimerCnt++; LoraAckTimerCnt++; 800701c: 4a06 ldr r2, [pc, #24] ; (8007038 ) 800701e: 6813 ldr r3, [r2, #0] 8007020: 3301 adds r3, #1 8007022: 6013 str r3, [r2, #0] 8007024: 4770 bx lr 8007026: bf00 nop 8007028: 40001000 .word 0x40001000 800702c: 20000404 .word 0x20000404 8007030: 20000408 .word 0x20000408 8007034: 200003f8 .word 0x200003f8 8007038: 200003fc .word 0x200003fc 0800703c : } } void LoraDataSendSet(uint8_t val){ LoraDataSend = val; 800703c: 4b01 ldr r3, [pc, #4] ; (8007044 ) 800703e: 7018 strb r0, [r3, #0] 8007040: 4770 bx lr 8007042: bf00 nop 8007044: 200006e4 .word 0x200006e4 08007048 : } uint8_t UartDataRecvGet(void){ return UartDataisReved; } void RGB_SensorIDAutoSet(uint8_t set){ RGB_SensorIDAutoset = set; 8007048: 4b01 ldr r3, [pc, #4] ; (8007050 ) 800704a: 7018 strb r0, [r3, #0] 800704c: 4770 bx lr 800704e: bf00 nop 8007050: 20000401 .word 0x20000401 08007054 : uint8_t RGB_SensorIDAutoGet(void){ return RGB_SensorIDAutoset; } void Uart2_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart2, data,size, 10); 8007054: 460a mov r2, r1 8007056: 230a movs r3, #10 8007058: 4601 mov r1, r0 800705a: 4801 ldr r0, [pc, #4] ; (8007060 ) 800705c: f7fe bd6e b.w 8005b3c 8007060: 200008d8 .word 0x200008d8 08007064 : } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart1, data,size, 10); 8007064: 460a mov r2, r1 8007066: 230a movs r3, #10 8007068: 4601 mov r1, r0 800706a: 4801 ldr r0, [pc, #4] ; (8007070 ) 800706c: f7fe bd66 b.w 8005b3c 8007070: 2000072c .word 0x2000072c 08007074 <_write>: } int _write (int file, uint8_t *ptr, uint16_t len) { 8007074: b510 push {r4, lr} 8007076: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8007078: 230a movs r3, #10 800707a: 4802 ldr r0, [pc, #8] ; (8007084 <_write+0x10>) 800707c: f7fe fd5e bl 8005b3c return len; } 8007080: 4620 mov r0, r4 8007082: bd10 pop {r4, pc} 8007084: 2000072c .word 0x2000072c 08007088 : *cnt = 0; memset(buf,0x00,buf_size); } #else void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){ 8007088: b5f8 push {r3, r4, r5, r6, r7, lr} 800708a: 460d mov r5, r1 printf("%02x ",*Que_Buf[i]); } printf("\r\n"); #endif crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]); 800708c: 7881 ldrb r1, [r0, #2] void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){ 800708e: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]); 8007090: 1843 adds r3, r0, r1 8007092: 785a ldrb r2, [r3, #1] 8007094: 3001 adds r0, #1 8007096: f000 fcbb bl 8007a10 if(crccheck == CHECKSUM_ERROR){ 800709a: b9c8 cbnz r0, 80070d0 for(uint8_t i = 0; i < (*cnt); i++){ printf("%02x ",Que_Buf[i]); 800709c: 4f11 ldr r7, [pc, #68] ; (80070e4 ) for(uint8_t i = 0; i < (*cnt); i++){ 800709e: 782b ldrb r3, [r5, #0] 80070a0: 1c46 adds r6, r0, #1 80070a2: b2c0 uxtb r0, r0 80070a4: 4283 cmp r3, r0 80070a6: d80d bhi.n 80070c4 } printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,Que_Buf[Que_Buf[bluecell_length] + 1]); 80070a8: 78a3 ldrb r3, [r4, #2] 80070aa: 2100 movs r1, #0 80070ac: 4423 add r3, r4 80070ae: 785a ldrb r2, [r3, #1] 80070b0: 480d ldr r0, [pc, #52] ; (80070e8 ) 80070b2: f000 fe6b bl 8007d8c /*NOP*/ } //*cnt = 0; memset(Que_Buf,0x00,buf_size); 80070b6: 4620 mov r0, r4 } 80070b8: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} memset(Que_Buf,0x00,buf_size); 80070bc: 2264 movs r2, #100 ; 0x64 80070be: 2100 movs r1, #0 80070c0: f000 be5b b.w 8007d7a printf("%02x ",Que_Buf[i]); 80070c4: 5c21 ldrb r1, [r4, r0] 80070c6: 4638 mov r0, r7 80070c8: f000 fe60 bl 8007d8c 80070cc: 4630 mov r0, r6 80070ce: e7e6 b.n 800709e else if(crccheck == NO_ERROR){ 80070d0: 2801 cmp r0, #1 80070d2: d103 bne.n 80070dc RGB_Controller_Func(&Que_Buf[bluecell_stx]); 80070d4: 4620 mov r0, r4 80070d6: f7ff fb5d bl 8006794 80070da: e7ec b.n 80070b6 printf("What Happen?\r\n"); 80070dc: 4803 ldr r0, [pc, #12] ; (80070ec ) 80070de: f000 fec9 bl 8007e74 80070e2: e7e8 b.n 80070b6 80070e4: 08009070 .word 0x08009070 80070e8: 08009076 .word 0x08009076 80070ec: 0800909c .word 0x0800909c 080070f0 : #endif // PYJ.2019.04.19_END -- void RGB_Sensor_PowerOnOff(uint8_t id){ uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb}; 80070f0: 23be movs r3, #190 ; 0xbe void RGB_Sensor_PowerOnOff(uint8_t id){ 80070f2: b513 push {r0, r1, r4, lr} uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb}; 80070f4: 2102 movs r1, #2 80070f6: f88d 3000 strb.w r3, [sp] 80070fa: 2319 movs r3, #25 void RGB_Sensor_PowerOnOff(uint8_t id){ 80070fc: 4604 mov r4, r0 uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb}; 80070fe: f10d 0001 add.w r0, sp, #1 8007102: f88d 3001 strb.w r3, [sp, #1] 8007106: f88d 1002 strb.w r1, [sp, #2] 800710a: f000 fc66 bl 80079da 800710e: 23eb movs r3, #235 ; 0xeb 8007110: f88d 0003 strb.w r0, [sp, #3] 8007114: f88d 3004 strb.w r3, [sp, #4] // printf("%d Power ON \r\n",id); switch(id){ 8007118: 2c08 cmp r4, #8 800711a: d844 bhi.n 80071a6 800711c: e8df f004 tbb [pc, r4] 8007120: 4d4505ca .word 0x4d4505ca 8007124: a6886f5b .word 0xa6886f5b 8007128: ca .byte 0xca 8007129: 00 .byte 0x00 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; case 1: Uart1_Data_Send(&SensorSerchStart_cmd[bluecell_stx], SensorSerchStart_cmd[bluecell_length] + 3); 800712a: f89d 1002 ldrb.w r1, [sp, #2] 800712e: 4668 mov r0, sp 8007130: 3103 adds r1, #3 8007132: b2c9 uxtb r1, r1 8007134: f7ff ff96 bl 8007064 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_RESET); 8007138: 2200 movs r2, #0 800713a: f44f 5100 mov.w r1, #8192 ; 0x2000 800713e: 4872 ldr r0, [pc, #456] ; (8007308 ) 8007140: f7fd fbec bl 800491c HAL_Delay(100); 8007144: 2064 movs r0, #100 ; 0x64 8007146: f7fd f8b5 bl 80042b4 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 800714a: 2201 movs r2, #1 800714c: f44f 5100 mov.w r1, #8192 ; 0x2000 8007150: 486d ldr r0, [pc, #436] ; (8007308 ) 8007152: f7fd fbe3 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_RESET); 8007156: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); break; case 2: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8007158: f44f 4180 mov.w r1, #16384 ; 0x4000 800715c: 486a ldr r0, [pc, #424] ; (8007308 ) 800715e: f7fd fbdd bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_RESET); 8007162: 2200 movs r2, #0 8007164: f44f 4100 mov.w r1, #32768 ; 0x8000 8007168: 4867 ldr r0, [pc, #412] ; (8007308 ) 800716a: f7fd fbd7 bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_RESET); 800716e: 2200 movs r2, #0 8007170: 2140 movs r1, #64 ; 0x40 8007172: 4866 ldr r0, [pc, #408] ; (800730c ) 8007174: f7fd fbd2 bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_RESET); 8007178: 2200 movs r2, #0 case 5: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800717a: 2180 movs r1, #128 ; 0x80 800717c: 4863 ldr r0, [pc, #396] ; (800730c ) 800717e: f7fd fbcd bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_RESET); 8007182: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8007184: f44f 7180 mov.w r1, #256 ; 0x100 8007188: 4860 ldr r0, [pc, #384] ; (800730c ) 800718a: f7fd fbc7 bl 800491c HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); 800718e: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8007190: f44f 7100 mov.w r1, #512 ; 0x200 8007194: 485d ldr r0, [pc, #372] ; (800730c ) 8007196: f7fd fbc1 bl 800491c HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); 800719a: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 800719c: f44f 7180 mov.w r1, #256 ; 0x100 80071a0: 485b ldr r0, [pc, #364] ; (8007310 ) 80071a2: f7fd fbbb bl 800491c break; } } 80071a6: b002 add sp, #8 80071a8: bd10 pop {r4, pc} HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 80071aa: 2201 movs r2, #1 80071ac: f44f 5100 mov.w r1, #8192 ; 0x2000 80071b0: 4855 ldr r0, [pc, #340] ; (8007308 ) 80071b2: f7fd fbb3 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 80071b6: 2201 movs r2, #1 80071b8: e7ce b.n 8007158 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 80071ba: 2201 movs r2, #1 80071bc: f44f 5100 mov.w r1, #8192 ; 0x2000 80071c0: 4851 ldr r0, [pc, #324] ; (8007308 ) 80071c2: f7fd fbab bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 80071c6: 2201 movs r2, #1 80071c8: f44f 4180 mov.w r1, #16384 ; 0x4000 80071cc: 484e ldr r0, [pc, #312] ; (8007308 ) 80071ce: f7fd fba5 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 80071d2: 2201 movs r2, #1 80071d4: e7c6 b.n 8007164 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 80071d6: 2201 movs r2, #1 80071d8: f44f 5100 mov.w r1, #8192 ; 0x2000 80071dc: 484a ldr r0, [pc, #296] ; (8007308 ) 80071de: f7fd fb9d bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 80071e2: 2201 movs r2, #1 80071e4: f44f 4180 mov.w r1, #16384 ; 0x4000 80071e8: 4847 ldr r0, [pc, #284] ; (8007308 ) 80071ea: f7fd fb97 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 80071ee: 2201 movs r2, #1 80071f0: f44f 4100 mov.w r1, #32768 ; 0x8000 80071f4: 4844 ldr r0, [pc, #272] ; (8007308 ) 80071f6: f7fd fb91 bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 80071fa: 2201 movs r2, #1 80071fc: e7b8 b.n 8007170 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 80071fe: 2201 movs r2, #1 8007200: f44f 5100 mov.w r1, #8192 ; 0x2000 8007204: 4840 ldr r0, [pc, #256] ; (8007308 ) 8007206: f7fd fb89 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 800720a: 2201 movs r2, #1 800720c: f44f 4180 mov.w r1, #16384 ; 0x4000 8007210: 483d ldr r0, [pc, #244] ; (8007308 ) 8007212: f7fd fb83 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8007216: 2201 movs r2, #1 8007218: f44f 4100 mov.w r1, #32768 ; 0x8000 800721c: 483a ldr r0, [pc, #232] ; (8007308 ) 800721e: f7fd fb7d bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8007222: 2201 movs r2, #1 8007224: 2140 movs r1, #64 ; 0x40 8007226: 4839 ldr r0, [pc, #228] ; (800730c ) 8007228: f7fd fb78 bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800722c: 2201 movs r2, #1 800722e: e7a4 b.n 800717a HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8007230: 2201 movs r2, #1 8007232: f44f 5100 mov.w r1, #8192 ; 0x2000 8007236: 4834 ldr r0, [pc, #208] ; (8007308 ) 8007238: f7fd fb70 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 800723c: 2201 movs r2, #1 800723e: f44f 4180 mov.w r1, #16384 ; 0x4000 8007242: 4831 ldr r0, [pc, #196] ; (8007308 ) 8007244: f7fd fb6a bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8007248: 2201 movs r2, #1 800724a: f44f 4100 mov.w r1, #32768 ; 0x8000 800724e: 482e ldr r0, [pc, #184] ; (8007308 ) 8007250: f7fd fb64 bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8007254: 2201 movs r2, #1 8007256: 2140 movs r1, #64 ; 0x40 8007258: 482c ldr r0, [pc, #176] ; (800730c ) 800725a: f7fd fb5f bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800725e: 2201 movs r2, #1 8007260: 2180 movs r1, #128 ; 0x80 8007262: 482a ldr r0, [pc, #168] ; (800730c ) 8007264: f7fd fb5a bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8007268: 2201 movs r2, #1 800726a: e78b b.n 8007184 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 800726c: 2201 movs r2, #1 800726e: f44f 5100 mov.w r1, #8192 ; 0x2000 8007272: 4825 ldr r0, [pc, #148] ; (8007308 ) 8007274: f7fd fb52 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8007278: 2201 movs r2, #1 800727a: f44f 4180 mov.w r1, #16384 ; 0x4000 800727e: 4822 ldr r0, [pc, #136] ; (8007308 ) 8007280: f7fd fb4c bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8007284: 2201 movs r2, #1 8007286: f44f 4100 mov.w r1, #32768 ; 0x8000 800728a: 481f ldr r0, [pc, #124] ; (8007308 ) 800728c: f7fd fb46 bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8007290: 2201 movs r2, #1 8007292: 2140 movs r1, #64 ; 0x40 8007294: 481d ldr r0, [pc, #116] ; (800730c ) 8007296: f7fd fb41 bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800729a: 2201 movs r2, #1 800729c: 2180 movs r1, #128 ; 0x80 800729e: 481b ldr r0, [pc, #108] ; (800730c ) 80072a0: f7fd fb3c bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 80072a4: 2201 movs r2, #1 80072a6: f44f 7180 mov.w r1, #256 ; 0x100 80072aa: 4818 ldr r0, [pc, #96] ; (800730c ) 80072ac: f7fd fb36 bl 800491c HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 80072b0: 2201 movs r2, #1 80072b2: e76d b.n 8007190 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 80072b4: 2201 movs r2, #1 80072b6: f44f 5100 mov.w r1, #8192 ; 0x2000 80072ba: 4813 ldr r0, [pc, #76] ; (8007308 ) 80072bc: f7fd fb2e bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 80072c0: 2201 movs r2, #1 80072c2: f44f 4180 mov.w r1, #16384 ; 0x4000 80072c6: 4810 ldr r0, [pc, #64] ; (8007308 ) 80072c8: f7fd fb28 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 80072cc: 2201 movs r2, #1 80072ce: f44f 4100 mov.w r1, #32768 ; 0x8000 80072d2: 480d ldr r0, [pc, #52] ; (8007308 ) 80072d4: f7fd fb22 bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 80072d8: 2201 movs r2, #1 80072da: 2140 movs r1, #64 ; 0x40 80072dc: 480b ldr r0, [pc, #44] ; (800730c ) 80072de: f7fd fb1d bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 80072e2: 2201 movs r2, #1 80072e4: 2180 movs r1, #128 ; 0x80 80072e6: 4809 ldr r0, [pc, #36] ; (800730c ) 80072e8: f7fd fb18 bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 80072ec: 2201 movs r2, #1 80072ee: f44f 7180 mov.w r1, #256 ; 0x100 80072f2: 4806 ldr r0, [pc, #24] ; (800730c ) 80072f4: f7fd fb12 bl 800491c HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 80072f8: 2201 movs r2, #1 80072fa: f44f 7100 mov.w r1, #512 ; 0x200 80072fe: 4803 ldr r0, [pc, #12] ; (800730c ) 8007300: f7fd fb0c bl 800491c HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 8007304: 2201 movs r2, #1 8007306: e749 b.n 800719c 8007308: 40010c00 .word 0x40010c00 800730c: 40011000 .word 0x40011000 8007310: 40010800 .word 0x40010800 08007314 : void Lora_Initialize(void){ SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; SX1276_hw.dio0.pin = SX1276_DIO0_Pin; 8007314: 2110 movs r1, #16 SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 8007316: 4b16 ldr r3, [pc, #88] ; (8007370 ) 8007318: 4a16 ldr r2, [pc, #88] ; (8007374 ) void Lora_Initialize(void){ 800731a: b530 push {r4, r5, lr} SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 800731c: 60da str r2, [r3, #12] SX1276_hw.nss.port = GPIOA; 800731e: 615a str r2, [r3, #20] SX1276_hw.nss.pin = GPIO_PIN_15; 8007320: f44f 4200 mov.w r2, #32768 ; 0x8000 SX1276_hw.dio0.pin = SX1276_DIO0_Pin; 8007324: 6099 str r1, [r3, #8] SX1276_hw.reset.port = SX1276_RESET_GPIO_Port; SX1276_hw.reset.pin = SX1276_RESET_Pin; 8007326: 2101 movs r1, #1 SX1276.hw = &SX1276_hw; // printf("Configuring LoRa module\r\n"); // SX1276_begin(&SX1276, SX1276_917MHZ, SX1276_POWER_17DBM, SX1276_LORA_SF_8, // SX1276_LORA_BW_20_8KHZ, 10); SX1276_begin(&SX1276, Default_SX1276.frequency, Default_SX1276.power, 8007328: 4813 ldr r0, [pc, #76] ; (8007378 ) SX1276_hw.nss.pin = GPIO_PIN_15; 800732a: 611a str r2, [r3, #16] SX1276_begin(&SX1276, Default_SX1276.frequency, Default_SX1276.power, 800732c: 7945 ldrb r5, [r0, #5] SX1276.hw = &SX1276_hw; 800732e: 4c13 ldr r4, [pc, #76] ; (800737c ) SX1276_hw.reset.pin = SX1276_RESET_Pin; 8007330: 4a13 ldr r2, [pc, #76] ; (8007380 ) void Lora_Initialize(void){ 8007332: b085 sub sp, #20 SX1276_hw.reset.pin = SX1276_RESET_Pin; 8007334: e883 0006 stmia.w r3, {r1, r2} SX1276.hw = &SX1276_hw; 8007338: 6023 str r3, [r4, #0] SX1276_begin(&SX1276, Default_SX1276.frequency, Default_SX1276.power, 800733a: 7842 ldrb r2, [r0, #1] 800733c: 7883 ldrb r3, [r0, #2] 800733e: 7801 ldrb r1, [r0, #0] 8007340: 9503 str r5, [sp, #12] 8007342: 7905 ldrb r5, [r0, #4] 8007344: 9502 str r5, [sp, #8] 8007346: 250a movs r5, #10 8007348: 9501 str r5, [sp, #4] 800734a: 78c0 ldrb r0, [r0, #3] 800734c: 9000 str r0, [sp, #0] 800734e: 4620 mov r0, r4 8007350: f7ff fde8 bl 8006f24 Default_SX1276.LoRa_Rate,Default_SX1276.LoRa_BW, 10,Default_SX1276.LoRa_Lna,Default_SX1276.LoRa_Pa_boost); // printf("Done configuring LoRaModule\r\n"); master = 0; 8007354: 2200 movs r2, #0 8007356: 4b0b ldr r3, [pc, #44] ; (8007384 ) if (master == 1) { ret = SX1276_LoRaEntryTx(&SX1276, LORA_MAX_DATA_CNT, 2000); } else { ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 8007358: 2108 movs r1, #8 master = 0; 800735a: 601a str r2, [r3, #0] ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 800735c: 4620 mov r0, r4 800735e: f44f 62fa mov.w r2, #2000 ; 0x7d0 8007362: f7ff fced bl 8006d40 8007366: 4b08 ldr r3, [pc, #32] ; (8007388 ) 8007368: 6018 str r0, [r3, #0] } } 800736a: b005 add sp, #20 800736c: bd30 pop {r4, r5, pc} 800736e: bf00 nop 8007370: 200006c8 .word 0x200006c8 8007374: 40010800 .word 0x40010800 8007378: 20000008 .word 0x20000008 800737c: 2000091c .word 0x2000091c 8007380: 40010c00 .word 0x40010c00 8007384: 20000a2c .word 0x20000a2c 8007388: 20000918 .word 0x20000918 0800738c : void Lora_Operate(void){ 800738c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} return RGB_SensorIDAutoset; 8007390: 4b25 ldr r3, [pc, #148] ; (8007428 ) uint8_t temp_rssi = 0; if(RGB_SensorIDAutoGet() == 0){/*ID allocate if sentence Condition */ 8007392: 781f ldrb r7, [r3, #0] 8007394: 2f00 cmp r7, #0 8007396: d144 bne.n 8007422 return LoraDataSend; 8007398: 4e24 ldr r6, [pc, #144] ; (800742c ) 800739a: 4c25 ldr r4, [pc, #148] ; (8007430 ) if(LoraDataSendGet() == LoraTx_mode && Lora_Buf[0] == 0xbe){ 800739c: 7833 ldrb r3, [r6, #0] 800739e: 2b01 cmp r3, #1 80073a0: d128 bne.n 80073f4 80073a2: 4b24 ldr r3, [pc, #144] ; (8007434 ) 80073a4: 781a ldrb r2, [r3, #0] 80073a6: 2abe cmp r2, #190 ; 0xbe 80073a8: d124 bne.n 80073f4 // LoraDataSendSet(LoraRx_mode); memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 80073aa: 681a ldr r2, [r3, #0] 80073ac: 4d22 ldr r5, [pc, #136] ; (8007438 ) message_length = Lora_Buf[bluecell_length] + 3;////RGB Data 60byte + stx + etx + crc 80073ae: 7899 ldrb r1, [r3, #2] memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 80073b0: 602a str r2, [r5, #0] message_length = Lora_Buf[bluecell_length] + 3;////RGB Data 60byte + stx + etx + crc 80073b2: f8df 8090 ldr.w r8, [pc, #144] ; 8007444 memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 80073b6: 685a ldr r2, [r3, #4] message_length = Lora_Buf[bluecell_length] + 3;////RGB Data 60byte + stx + etx + crc 80073b8: 3103 adds r1, #3 memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 80073ba: 606a str r2, [r5, #4] message_length = Lora_Buf[bluecell_length] + 3;////RGB Data 60byte + stx + etx + crc 80073bc: f8c8 1000 str.w r1, [r8] ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 80073c0: f44f 62fa mov.w r2, #2000 ; 0x7d0 80073c4: b2c9 uxtb r1, r1 80073c6: 481d ldr r0, [pc, #116] ; (800743c ) 80073c8: f7ff fd38 bl 8006e3c ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000); 80073cc: f44f 63fa mov.w r3, #2000 ; 0x7d0 ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 80073d0: 6020 str r0, [r4, #0] ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000); 80073d2: f898 2000 ldrb.w r2, [r8] 80073d6: 4629 mov r1, r5 80073d8: 4818 ldr r0, [pc, #96] ; (800743c ) 80073da: f7ff fd73 bl 8006ec4 // printf("Tx buffer : "); // for(uint8_t i = 0; i < sizeof(LoraDataRequest_t); i++) // printf("%02x ",buffer[i]); // printf("\n"); LoraDataSendSet(LoraRx_mode); ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 80073de: f44f 62fa mov.w r2, #2000 ; 0x7d0 ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000); 80073e2: 6020 str r0, [r4, #0] ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 80073e4: 2108 movs r1, #8 80073e6: 4815 ldr r0, [pc, #84] ; (800743c ) LoraDataSend = val; 80073e8: 7037 strb r7, [r6, #0] ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 80073ea: f7ff fca9 bl 8006d40 80073ee: 6020 str r0, [r4, #0] 80073f0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} }else{ ret = SX1276_LoRaRxPacket(&SX1276); 80073f4: 4811 ldr r0, [pc, #68] ; (800743c ) 80073f6: f7ff fcf3 bl 8006de0 80073fa: 4602 mov r2, r0 80073fc: 6020 str r0, [r4, #0] if (ret > 0) { 80073fe: b180 cbz r0, 8007422 SX1276_read(&SX1276, &buffer[0], ret); 8007400: 490d ldr r1, [pc, #52] ; (8007438 ) 8007402: 480e ldr r0, [pc, #56] ; (800743c ) 8007404: f7ff fdaf bl 8006f66 temp_rssi = SX1276_RSSI_LoRa(&SX1276); 8007408: 480c ldr r0, [pc, #48] ; (800743c ) 800740a: f7ff fdbd bl 8006f88 printf("Rssi : %d \n",temp_rssi); 800740e: 4601 mov r1, r0 8007410: 480b ldr r0, [pc, #44] ; (8007440 ) 8007412: f000 fcbb bl 8007d8c } } } 8007416: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} Uart_dataCheck(&buffer[bluecell_stx],&ret); 800741a: 4905 ldr r1, [pc, #20] ; (8007430 ) 800741c: 4806 ldr r0, [pc, #24] ; (8007438 ) 800741e: f7ff be33 b.w 8007088 8007422: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8007426: bf00 nop 8007428: 20000401 .word 0x20000401 800742c: 200006e4 .word 0x200006e4 8007430: 20000918 .word 0x20000918 8007434: 2000009d .word 0x2000009d 8007438: 2000076c .word 0x2000076c 800743c: 2000091c .word 0x2000091c 8007440: 08009064 .word 0x08009064 8007444: 200005f8 .word 0x200005f8 08007448 : void Usart_Data_RecvCheck(void){ 8007448: b570 push {r4, r5, r6, lr} static uint8_t cnt1 = 0,cnt2=0,uartdatarecv = 0; static uint8_t data1[100]= {0,}; static uint8_t data2[100]= {0,}; if(count_in1 != count_out1){ // <------- 800744a: 4a30 ldr r2, [pc, #192] ; (800750c ) 800744c: 4b30 ldr r3, [pc, #192] ; (8007510 ) 800744e: 7811 ldrb r1, [r2, #0] 8007450: 781b ldrb r3, [r3, #0] 8007452: 4c30 ldr r4, [pc, #192] ; (8007514 ) 8007454: 428b cmp r3, r1 8007456: d013 beq.n 8007480 data1[cnt1++] = buf1[count_out1++]; 8007458: 4b2f ldr r3, [pc, #188] ; (8007518 ) 800745a: 7818 ldrb r0, [r3, #0] 800745c: 1c45 adds r5, r0, #1 800745e: 701d strb r5, [r3, #0] 8007460: 1c4b adds r3, r1, #1 8007462: b2db uxtb r3, r3 8007464: 7013 strb r3, [r2, #0] if(count_out1 >= 100){ count_out1 = 0; } 8007466: 2b63 cmp r3, #99 ; 0x63 8007468: f04f 0300 mov.w r3, #0 800746c: bf88 it hi 800746e: 7013 strbhi r3, [r2, #0] Uart1TimerCnt = 0; 8007470: 4a2a ldr r2, [pc, #168] ; (800751c ) data1[cnt1++] = buf1[count_out1++]; 8007472: 4d2b ldr r5, [pc, #172] ; (8007520 ) Uart1TimerCnt = 0; 8007474: 6013 str r3, [r2, #0] UartDataisReved = val; 8007476: 2301 movs r3, #1 data1[cnt1++] = buf1[count_out1++]; 8007478: 5c6d ldrb r5, [r5, r1] 800747a: 492a ldr r1, [pc, #168] ; (8007524 ) UartDataisReved = val; 800747c: 7023 strb r3, [r4, #0] data1[cnt1++] = buf1[count_out1++]; 800747e: 540d strb r5, [r1, r0] UartDataRecvSet(1); } if(count_in2 != count_out2){ // <------- 8007480: 4a29 ldr r2, [pc, #164] ; (8007528 ) 8007482: 4b2a ldr r3, [pc, #168] ; (800752c ) 8007484: 7811 ldrb r1, [r2, #0] 8007486: 781b ldrb r3, [r3, #0] 8007488: 428b cmp r3, r1 800748a: d013 beq.n 80074b4 data2[cnt2++] = buf2[count_out2++]; 800748c: 4b28 ldr r3, [pc, #160] ; (8007530 ) 800748e: 7818 ldrb r0, [r3, #0] 8007490: 1c45 adds r5, r0, #1 8007492: 701d strb r5, [r3, #0] 8007494: 1c4b adds r3, r1, #1 8007496: b2db uxtb r3, r3 8007498: 7013 strb r3, [r2, #0] if(count_out2 >= 100){ count_out2 = 0; } 800749a: 2b63 cmp r3, #99 ; 0x63 800749c: f04f 0300 mov.w r3, #0 80074a0: bf88 it hi 80074a2: 7013 strbhi r3, [r2, #0] Uart2TimerCnt = 0; 80074a4: 4a23 ldr r2, [pc, #140] ; (8007534 ) data2[cnt2++] = buf2[count_out2++]; 80074a6: 4d24 ldr r5, [pc, #144] ; (8007538 ) Uart2TimerCnt = 0; 80074a8: 6013 str r3, [r2, #0] UartDataisReved = val; 80074aa: 2302 movs r3, #2 data2[cnt2++] = buf2[count_out2++]; 80074ac: 5c6d ldrb r5, [r5, r1] 80074ae: 4923 ldr r1, [pc, #140] ; (800753c ) UartDataisReved = val; 80074b0: 7023 strb r3, [r4, #0] data2[cnt2++] = buf2[count_out2++]; 80074b2: 540d strb r5, [r1, r0] return UartDataisReved; 80074b4: 7822 ldrb r2, [r4, #0] UartDataRecvSet(2); } uartdatarecv = UartDataRecvGet(); 80074b6: 4d22 ldr r5, [pc, #136] ; (8007540 ) if(uartdatarecv == 1 && Uart1TimerCnt > 100){ 80074b8: 2a01 cmp r2, #1 uartdatarecv = UartDataRecvGet(); 80074ba: 702a strb r2, [r5, #0] if(uartdatarecv == 1 && Uart1TimerCnt > 100){ 80074bc: d110 bne.n 80074e0 80074be: 4b17 ldr r3, [pc, #92] ; (800751c ) 80074c0: 681b ldr r3, [r3, #0] 80074c2: 2b64 cmp r3, #100 ; 0x64 80074c4: d90c bls.n 80074e0 cnt1 = 0; 80074c6: 2600 movs r6, #0 80074c8: 4b13 ldr r3, [pc, #76] ; (8007518 ) Uart_dataCheck(&data1[0],&count_in1); 80074ca: 4911 ldr r1, [pc, #68] ; (8007510 ) 80074cc: 4815 ldr r0, [pc, #84] ; (8007524 ) cnt1 = 0; 80074ce: 701e strb r6, [r3, #0] Uart_dataCheck(&data1[0],&count_in1); 80074d0: f7ff fdda bl 8007088 memset(&data1[0],0,100); 80074d4: 2264 movs r2, #100 ; 0x64 80074d6: 4631 mov r1, r6 80074d8: 4812 ldr r0, [pc, #72] ; (8007524 ) 80074da: f000 fc4e bl 8007d7a UartDataisReved = val; 80074de: 7026 strb r6, [r4, #0] UartDataRecvSet(0); } if(uartdatarecv == 2 && Uart2TimerCnt > 100){ 80074e0: 782b ldrb r3, [r5, #0] 80074e2: 2b02 cmp r3, #2 80074e4: d110 bne.n 8007508 80074e6: 4b13 ldr r3, [pc, #76] ; (8007534 ) 80074e8: 681b ldr r3, [r3, #0] 80074ea: 2b64 cmp r3, #100 ; 0x64 80074ec: d90c bls.n 8007508 cnt2 = 0; 80074ee: 2500 movs r5, #0 80074f0: 4b0f ldr r3, [pc, #60] ; (8007530 ) Uart_dataCheck(&data2[0],&count_in2); 80074f2: 490e ldr r1, [pc, #56] ; (800752c ) 80074f4: 4811 ldr r0, [pc, #68] ; (800753c ) cnt2 = 0; 80074f6: 701d strb r5, [r3, #0] Uart_dataCheck(&data2[0],&count_in2); 80074f8: f7ff fdc6 bl 8007088 memset(&data2[0],0,100); 80074fc: 2264 movs r2, #100 ; 0x64 80074fe: 4629 mov r1, r5 8007500: 480e ldr r0, [pc, #56] ; (800753c ) 8007502: f000 fc3a bl 8007d7a UartDataisReved = val; 8007506: 7025 strb r5, [r4, #0] 8007508: bd70 pop {r4, r5, r6, pc} 800750a: bf00 nop 800750c: 200004d8 .word 0x200004d8 8007510: 200004d6 .word 0x200004d6 8007514: 200005fc .word 0x200005fc 8007518: 200004d4 .word 0x200004d4 800751c: 20000404 .word 0x20000404 8007520: 2000040c .word 0x2000040c 8007524: 200004da .word 0x200004da 8007528: 200004d9 .word 0x200004d9 800752c: 200004d7 .word 0x200004d7 8007530: 200004d5 .word 0x200004d5 8007534: 20000408 .word 0x20000408 8007538: 20000470 .word 0x20000470 800753c: 2000053e .word 0x2000053e 8007540: 200005a2 .word 0x200005a2 08007544 : UartDataRecvSet(0); } } void RGB_Sensor_DataRequest(void){ uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 8007544: 2303 movs r3, #3 void RGB_Sensor_DataRequest(void){ 8007546: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 800754a: 2504 movs r5, #4 800754c: 27be movs r7, #190 ; 0xbe 800754e: f8df 8118 ldr.w r8, [pc, #280] ; 8007668 void RGB_Sensor_DataRequest(void){ 8007552: b086 sub sp, #24 uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 8007554: f88d 3009 strb.w r3, [sp, #9] 8007558: 4c3c ldr r4, [pc, #240] ; (800764c ) 800755a: f898 3000 ldrb.w r3, [r8] 800755e: 4629 mov r1, r5 8007560: f88d 300b strb.w r3, [sp, #11] 8007564: 7823 ldrb r3, [r4, #0] 8007566: f10d 0009 add.w r0, sp, #9 800756a: f88d 300c strb.w r3, [sp, #12] 800756e: f88d 7008 strb.w r7, [sp, #8] 8007572: f88d 500a strb.w r5, [sp, #10] 8007576: f000 fa30 bl 80079da 800757a: 26eb movs r6, #235 ; 0xeb uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb}; 800757c: 231a movs r3, #26 800757e: 2102 movs r1, #2 uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 8007580: f88d 000d strb.w r0, [sp, #13] uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb}; 8007584: f10d 0001 add.w r0, sp, #1 8007588: f88d 3001 strb.w r3, [sp, #1] 800758c: f88d 1002 strb.w r1, [sp, #2] uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 8007590: f88d 600e strb.w r6, [sp, #14] uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb}; 8007594: f88d 7000 strb.w r7, [sp] 8007598: f000 fa1f bl 80079da uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 800759c: 2301 movs r3, #1 800759e: f88d 3011 strb.w r3, [sp, #17] 80075a2: f898 3000 ldrb.w r3, [r8] uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb}; 80075a6: f88d 0003 strb.w r0, [sp, #3] uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80075aa: f88d 3013 strb.w r3, [sp, #19] 80075ae: 7823 ldrb r3, [r4, #0] 80075b0: 4629 mov r1, r5 80075b2: f10d 0011 add.w r0, sp, #17 80075b6: f88d 3014 strb.w r3, [sp, #20] uint8_t SensorSerchEnd_cmd[5] = {0xbe,RGB_Controller_Init_End,2,STH30_CreateCrc(&SensorSerchEnd_cmd[bluecell_type],SensorSerchEnd_cmd[bluecell_length]),0xeb}; 80075ba: f88d 6004 strb.w r6, [sp, #4] uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80075be: f88d 7010 strb.w r7, [sp, #16] 80075c2: f88d 5012 strb.w r5, [sp, #18] 80075c6: f000 fa08 bl 80079da if(LedTimerCnt > 500){ 80075ca: 4b21 ldr r3, [pc, #132] ; (8007650 ) uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80075cc: f88d 0015 strb.w r0, [sp, #21] if(LedTimerCnt > 500){ 80075d0: 681b ldr r3, [r3, #0] uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80075d2: f88d 6016 strb.w r6, [sp, #22] if(LedTimerCnt > 500){ 80075d6: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 80075da: d928 bls.n 800762e return RGB_SensorIDAutoset; 80075dc: 4b1d ldr r3, [pc, #116] ; (8007654 ) if(RGB_SensorIDAutoGet() == 1){/*ID allocate if sentence Condition */ 80075de: 781a ldrb r2, [r3, #0] 80075e0: 2a01 cmp r2, #1 80075e2: d130 bne.n 8007646 if(SensorID == 0){memset(&SensorID_buf[0],0x00,8);SensorID_Cnt = 0;} 80075e4: 7820 ldrb r0, [r4, #0] 80075e6: b920 cbnz r0, 80075f2 80075e8: 4a1b ldr r2, [pc, #108] ; (8007658 ) 80075ea: 6010 str r0, [r2, #0] 80075ec: 6050 str r0, [r2, #4] 80075ee: 4a1b ldr r2, [pc, #108] ; (800765c ) 80075f0: 7010 strb r0, [r2, #0] IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID 80075f2: 3001 adds r0, #1 80075f4: b2c0 uxtb r0, r0 if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){ /*Only 8 IDs are allowed.*/ 80075f6: 2808 cmp r0, #8 IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID 80075f8: 7020 strb r0, [r4, #0] 80075fa: f88d 000c strb.w r0, [sp, #12] if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){ /*Only 8 IDs are allowed.*/ 80075fe: d919 bls.n 8007634 RGB_SensorIDAutoset = set; 8007600: 2500 movs r5, #0 RGB_SensorIDAutoSet(0); RGB_Sensor_PowerOnOff(0); 8007602: 4628 mov r0, r5 RGB_SensorIDAutoset = set; 8007604: 701d strb r5, [r3, #0] RGB_Sensor_PowerOnOff(0); 8007606: f7ff fd73 bl 80070f0 SensorID = 0; Uart1_Data_Send(&SensorSerchEnd_cmd[bluecell_stx], SensorSerchEnd_cmd[bluecell_length] + 3); 800760a: f89d 1002 ldrb.w r1, [sp, #2] 800760e: 4668 mov r0, sp 8007610: 3103 adds r1, #3 8007612: b2c9 uxtb r1, r1 SensorID = 0; 8007614: 7025 strb r5, [r4, #0] Uart1_Data_Send(&SensorSerchEnd_cmd[bluecell_stx], SensorSerchEnd_cmd[bluecell_length] + 3); 8007616: f7ff fd25 bl 8007064 } } else{ /* Request data after completing ID setup */ RGB_Controller_Func(&StatusRequest_data[bluecell_stx]); } __HAL_IWDG_RELOAD_COUNTER(&hiwdg); 800761a: f64a 22aa movw r2, #43690 ; 0xaaaa 800761e: 4b10 ldr r3, [pc, #64] ; (8007660 ) HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 8007620: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_IWDG_RELOAD_COUNTER(&hiwdg); 8007624: 681b ldr r3, [r3, #0] HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 8007626: 480f ldr r0, [pc, #60] ; (8007664 ) __HAL_IWDG_RELOAD_COUNTER(&hiwdg); 8007628: 601a str r2, [r3, #0] HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 800762a: f7fd f97c bl 8004926 } } 800762e: b006 add sp, #24 8007630: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} RGB_Sensor_PowerOnOff(IDAutoSetRequest_data[4]); 8007634: f7ff fd5c bl 80070f0 HAL_Delay(100); 8007638: 2064 movs r0, #100 ; 0x64 800763a: f7fc fe3b bl 80042b4 RGB_Controller_Func(&IDAutoSetRequest_data[bluecell_stx]); 800763e: a802 add r0, sp, #8 RGB_Controller_Func(&StatusRequest_data[bluecell_stx]); 8007640: f7ff f8a8 bl 8006794 8007644: e7e9 b.n 800761a 8007646: a804 add r0, sp, #16 8007648: e7fa b.n 8007640 800764a: bf00 nop 800764c: 20000402 .word 0x20000402 8007650: 200003f8 .word 0x200003f8 8007654: 20000401 .word 0x20000401 8007658: 200003af .word 0x200003af 800765c: 200003ae .word 0x200003ae 8007660: 20000600 .word 0x20000600 8007664: 40011000 .word 0x40011000 8007668: 20000400 .word 0x20000400 0800766c : void WDOG_Check_Flag(void){ if(RESET != __HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST)) 800766c: 4b05 ldr r3, [pc, #20] ; (8007684 ) 800766e: 6a5b ldr r3, [r3, #36] ; 0x24 8007670: 009b lsls r3, r3, #2 8007672: d505 bpl.n 8007680 { __HAL_RCC_CLEAR_RESET_FLAGS(); 8007674: 2201 movs r2, #1 8007676: 4b04 ldr r3, [pc, #16] ; (8007688 ) printf("I am Reset Flag Clear\n"); 8007678: 4804 ldr r0, [pc, #16] ; (800768c ) __HAL_RCC_CLEAR_RESET_FLAGS(); 800767a: 601a str r2, [r3, #0] printf("I am Reset Flag Clear\n"); 800767c: f000 bbfa b.w 8007e74 8007680: 4770 bx lr 8007682: bf00 nop 8007684: 40021000 .word 0x40021000 8007688: 424204e0 .word 0x424204e0 800768c: 080090aa .word 0x080090aa 08007690 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8007690: b510 push {r4, lr} 8007692: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8007694: 2228 movs r2, #40 ; 0x28 8007696: 2100 movs r1, #0 8007698: a806 add r0, sp, #24 800769a: f000 fb6e bl 8007d7a RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800769e: 2100 movs r1, #0 80076a0: 2214 movs r2, #20 80076a2: a801 add r0, sp, #4 80076a4: f000 fb69 bl 8007d7a /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; 80076a8: 2309 movs r3, #9 RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 80076aa: 2201 movs r2, #1 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; 80076ac: 9306 str r3, [sp, #24] RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80076ae: 2402 movs r4, #2 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80076b0: f44f 3380 mov.w r3, #65536 ; 0x10000 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80076b4: a806 add r0, sp, #24 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80076b6: 9307 str r3, [sp, #28] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 80076b8: 920a str r2, [sp, #40] ; 0x28 RCC_OscInitStruct.LSIState = RCC_LSI_ON; 80076ba: 920c str r2, [sp, #48] ; 0x30 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 80076bc: 930e str r3, [sp, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80076be: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80076c0: f7fd fd64 bl 800518c { Error_Handler(); } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80076c4: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 80076c6: 2100 movs r1, #0 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80076c8: 9301 str r3, [sp, #4] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 80076ca: f44f 6380 mov.w r3, #1024 ; 0x400 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 80076ce: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 80076d0: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 80076d2: 9103 str r1, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 80076d4: 9304 str r3, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 80076d6: 9105 str r1, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 80076d8: f7fd ff20 bl 800551c { Error_Handler(); } } 80076dc: b010 add sp, #64 ; 0x40 80076de: bd10 pop {r4, pc} 080076e0
: uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb}; 80076e0: 23be movs r3, #190 ; 0xbe { 80076e2: e92d 4880 stmdb sp!, {r7, fp, lr} 80076e6: b08d sub sp, #52 ; 0x34 uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb}; 80076e8: 2602 movs r6, #2 80076ea: f88d 3018 strb.w r3, [sp, #24] 80076ee: 2319 movs r3, #25 80076f0: 4631 mov r1, r6 80076f2: eb0d 0003 add.w r0, sp, r3 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80076f6: f04f 0910 mov.w r9, #16 uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb}; 80076fa: f88d 3019 strb.w r3, [sp, #25] 80076fe: f88d 601a strb.w r6, [sp, #26] 8007702: f000 f96a bl 80079da 8007706: 23eb movs r3, #235 ; 0xeb /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8007708: 4d9e ldr r5, [pc, #632] ; (8007984 ) uint8_t SensorSerchStart_cmd[5] = {0xbe,RGB_Controller_Init_Start,2,STH30_CreateCrc(&SensorSerchStart_cmd[bluecell_type],SensorSerchStart_cmd[bluecell_length]),0xeb}; 800770a: f88d 301c strb.w r3, [sp, #28] 800770e: f88d 001b strb.w r0, [sp, #27] HAL_Init(); 8007712: f7fc fdab bl 800426c SystemClock_Config(); 8007716: f7ff ffbb bl 8007690 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800771a: 464a mov r2, r9 800771c: 2100 movs r1, #0 800771e: a808 add r0, sp, #32 8007720: f000 fb2b bl 8007d7a __HAL_RCC_GPIOC_CLK_ENABLE(); 8007724: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8007726: 2200 movs r2, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007728: ea43 0309 orr.w r3, r3, r9 800772c: 61ab str r3, [r5, #24] 800772e: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8007730: f649 71f0 movw r1, #40944 ; 0x9ff0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007734: ea03 0309 and.w r3, r3, r9 8007738: 9302 str r3, [sp, #8] 800773a: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOD_CLK_ENABLE(); 800773c: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 800773e: 4892 ldr r0, [pc, #584] ; (8007988 ) __HAL_RCC_GPIOD_CLK_ENABLE(); 8007740: f043 0320 orr.w r3, r3, #32 8007744: 61ab str r3, [r5, #24] 8007746: 69ab ldr r3, [r5, #24] LED_CH2_Pin LED_CH3_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin |LED_CH2_Pin|LED_CH3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8007748: 2400 movs r4, #0 __HAL_RCC_GPIOD_CLK_ENABLE(); 800774a: f003 0320 and.w r3, r3, #32 800774e: 9303 str r3, [sp, #12] 8007750: 9b03 ldr r3, [sp, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8007752: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007754: 2701 movs r7, #1 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007756: f043 0304 orr.w r3, r3, #4 800775a: 61ab str r3, [r5, #24] 800775c: 69ab ldr r3, [r5, #24] htim6.Instance = TIM6; 800775e: f8df 8270 ldr.w r8, [pc, #624] ; 80079d0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007762: f003 0304 and.w r3, r3, #4 8007766: 9304 str r3, [sp, #16] 8007768: 9b04 ldr r3, [sp, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 800776a: 69ab ldr r3, [r5, #24] huart1.Init.Mode = UART_MODE_TX_RX; 800776c: f04f 0a0c mov.w sl, #12 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007770: f043 0308 orr.w r3, r3, #8 8007774: 61ab str r3, [r5, #24] 8007776: 69ab ldr r3, [r5, #24] huart1.Init.BaudRate = 115200; 8007778: f44f 3be1 mov.w fp, #115200 ; 0x1c200 __HAL_RCC_GPIOB_CLK_ENABLE(); 800777c: f003 0308 and.w r3, r3, #8 8007780: 9305 str r3, [sp, #20] 8007782: 9b05 ldr r3, [sp, #20] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8007784: f7fd f8ca bl 800491c HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8007788: 2200 movs r2, #0 800778a: f248 11f0 movw r1, #33264 ; 0x81f0 800778e: 487f ldr r0, [pc, #508] ; (800798c ) 8007790: f7fd f8c4 bl 800491c HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8007794: 2200 movs r2, #0 8007796: f24f 31e9 movw r1, #62441 ; 0xf3e9 800779a: 487d ldr r0, [pc, #500] ; (8007990 ) 800779c: f7fd f8be bl 800491c HAL_GPIO_WritePin(LED_CH4_GPIO_Port, LED_CH4_Pin, GPIO_PIN_RESET); 80077a0: 2200 movs r2, #0 80077a2: 2104 movs r1, #4 80077a4: 487b ldr r0, [pc, #492] ; (8007994 ) 80077a6: f7fd f8b9 bl 800491c GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 80077aa: f649 73f0 movw r3, #40944 ; 0x9ff0 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80077ae: a908 add r1, sp, #32 80077b0: 4875 ldr r0, [pc, #468] ; (8007988 ) GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 80077b2: 9308 str r3, [sp, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80077b4: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80077b6: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80077b8: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80077ba: f7fc ffbd bl 8004738 /*Configure GPIO pin : IWDG_RESET_Pin */ GPIO_InitStruct.Pin = IWDG_RESET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 80077be: 4b76 ldr r3, [pc, #472] ; (8007998 ) GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(IWDG_RESET_GPIO_Port, &GPIO_InitStruct); 80077c0: a908 add r1, sp, #32 80077c2: 4871 ldr r0, [pc, #452] ; (8007988 ) GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 80077c4: 9309 str r3, [sp, #36] ; 0x24 GPIO_InitStruct.Pin = IWDG_RESET_Pin; 80077c6: 9708 str r7, [sp, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; 80077c8: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(IWDG_RESET_GPIO_Port, &GPIO_InitStruct); 80077ca: f7fc ffb5 bl 8004738 /*Configure GPIO pins : SX1276_DIO0_Pin SX1276_DIO1_Pin SX1276_DIO2_Pin SX1276_DIO3_Pin SENSOR_EN8_Pin SX1276_NSS_Pin */ GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 80077ce: f248 13f0 movw r3, #33264 ; 0x81f0 |SENSOR_EN8_Pin|SX1276_NSS_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80077d2: a908 add r1, sp, #32 80077d4: 486d ldr r0, [pc, #436] ; (800798c ) GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 80077d6: 9308 str r3, [sp, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80077d8: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80077da: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80077dc: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80077de: f7fc ffab bl 8004738 /*Configure GPIO pins : SX1276_RESET_Pin LED_ALARM_Pin SENSOR_EN1_Pin SENSOR_EN2_Pin SENSOR_EN3_Pin SX1276_CLK_Pin SX1276_MOSI_Pin LED_CH5_Pin LED_CH6_Pin LED_CH7_Pin LED_CH8_Pin */ GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 80077e2: f24f 33e9 movw r3, #62441 ; 0xf3e9 |SENSOR_EN3_Pin|SX1276_CLK_Pin|SX1276_MOSI_Pin|LED_CH5_Pin |LED_CH6_Pin|LED_CH7_Pin|LED_CH8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80077e6: a908 add r1, sp, #32 80077e8: 4869 ldr r0, [pc, #420] ; (8007990 ) GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 80077ea: 9308 str r3, [sp, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80077ec: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80077ee: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80077f0: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80077f2: f7fc ffa1 bl 8004738 /*Configure GPIO pin : LED_CH4_Pin */ GPIO_InitStruct.Pin = LED_CH4_Pin; 80077f6: 2304 movs r3, #4 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 80077f8: a908 add r1, sp, #32 80077fa: 4866 ldr r0, [pc, #408] ; (8007994 ) GPIO_InitStruct.Pin = LED_CH4_Pin; 80077fc: 9308 str r3, [sp, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80077fe: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007800: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007802: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 8007804: f7fc ff98 bl 8004738 /*Configure GPIO pin : SX1276_MISO_Pin */ GPIO_InitStruct.Pin = SX1276_MISO_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 8007808: a908 add r1, sp, #32 800780a: 4861 ldr r0, [pc, #388] ; (8007990 ) GPIO_InitStruct.Pin = SX1276_MISO_Pin; 800780c: f8cd 9020 str.w r9, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007810: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007812: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 8007814: f7fc ff90 bl 8004738 __HAL_RCC_DMA1_CLK_ENABLE(); 8007818: 696b ldr r3, [r5, #20] htim6.Init.Prescaler = 1600-1; 800781a: 4a60 ldr r2, [pc, #384] ; (800799c ) __HAL_RCC_DMA1_CLK_ENABLE(); 800781c: 433b orrs r3, r7 800781e: 616b str r3, [r5, #20] 8007820: 696b ldr r3, [r5, #20] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8007822: 4640 mov r0, r8 __HAL_RCC_DMA1_CLK_ENABLE(); 8007824: 403b ands r3, r7 8007826: 9301 str r3, [sp, #4] 8007828: 9b01 ldr r3, [sp, #4] htim6.Init.Prescaler = 1600-1; 800782a: f240 633f movw r3, #1599 ; 0x63f 800782e: e888 000c stmia.w r8, {r2, r3} htim6.Init.Period = 10-1; 8007832: 2309 movs r3, #9 huart1.Instance = USART1; 8007834: 4e5a ldr r6, [pc, #360] ; (80079a0 ) htim6.Init.Period = 10-1; 8007836: f8c8 300c str.w r3, [r8, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800783a: 9408 str r4, [sp, #32] 800783c: 9409 str r4, [sp, #36] ; 0x24 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 800783e: f8c8 4008 str.w r4, [r8, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8007842: f8c8 4018 str.w r4, [r8, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8007846: f7fe f839 bl 80058bc if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800784a: a908 add r1, sp, #32 800784c: 4640 mov r0, r8 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800784e: 9408 str r4, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8007850: 9409 str r4, [sp, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8007852: f7fe f84d bl 80058f0 huart1.Init.BaudRate = 115200; 8007856: 4b53 ldr r3, [pc, #332] ; (80079a4 ) huart2.Instance = USART2; 8007858: 4d53 ldr r5, [pc, #332] ; (80079a8 ) if (HAL_UART_Init(&huart1) != HAL_OK) 800785a: 4630 mov r0, r6 huart1.Init.BaudRate = 115200; 800785c: e886 0808 stmia.w r6, {r3, fp} huart1.Init.Mode = UART_MODE_TX_RX; 8007860: f8c6 a014 str.w sl, [r6, #20] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8007864: 60b4 str r4, [r6, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8007866: 60f4 str r4, [r6, #12] huart1.Init.Parity = UART_PARITY_NONE; 8007868: 6134 str r4, [r6, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800786a: 61b4 str r4, [r6, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800786c: 61f4 str r4, [r6, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800786e: f7fe f937 bl 8005ae0 huart2.Instance = USART2; 8007872: 4b4e ldr r3, [pc, #312] ; (80079ac ) if (HAL_UART_Init(&huart2) != HAL_OK) 8007874: 4628 mov r0, r5 huart2.Init.BaudRate = 115200; 8007876: e885 0808 stmia.w r5, {r3, fp} huart2.Init.Mode = UART_MODE_TX_RX; 800787a: f8c5 a014 str.w sl, [r5, #20] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800787e: 60ac str r4, [r5, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8007880: 60ec str r4, [r5, #12] huart2.Init.Parity = UART_PARITY_NONE; 8007882: 612c str r4, [r5, #16] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8007884: 61ac str r4, [r5, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8007886: 61ec str r4, [r5, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8007888: f7fe f92a bl 8005ae0 hi2c2.Instance = I2C2; 800788c: 4848 ldr r0, [pc, #288] ; (80079b0 ) hi2c2.Init.ClockSpeed = 100000; 800788e: 4949 ldr r1, [pc, #292] ; (80079b4 ) 8007890: 4b49 ldr r3, [pc, #292] ; (80079b8 ) hiwdg.Instance = IWDG; 8007892: f8df a140 ldr.w sl, [pc, #320] ; 80079d4 hi2c2.Init.ClockSpeed = 100000; 8007896: e880 000a stmia.w r0, {r1, r3} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 800789a: f44f 4380 mov.w r3, #16384 ; 0x4000 hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 800789e: 6084 str r4, [r0, #8] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 80078a0: 6103 str r3, [r0, #16] hi2c2.Init.OwnAddress1 = 0; 80078a2: 60c4 str r4, [r0, #12] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 80078a4: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 80078a6: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 80078a8: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 80078aa: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 80078ac: f7fd fa16 bl 8004cdc hiwdg.Instance = IWDG; 80078b0: 4b42 ldr r3, [pc, #264] ; (80079bc ) if (HAL_IWDG_Init(&hiwdg) != HAL_OK) 80078b2: 4650 mov r0, sl hiwdg.Init.Prescaler = IWDG_PRESCALER_4; 80078b4: e88a 0018 stmia.w sl, {r3, r4} hiwdg.Init.Reload = 1000; 80078b8: f44f 737a mov.w r3, #1000 ; 0x3e8 80078bc: f8ca 3008 str.w r3, [sl, #8] if (HAL_IWDG_Init(&hiwdg) != HAL_OK) 80078c0: f7fd fc42 bl 8005148 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 80078c4: 4622 mov r2, r4 80078c6: 4621 mov r1, r4 80078c8: 200f movs r0, #15 80078ca: f7fc fd17 bl 80042fc HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80078ce: 200f movs r0, #15 80078d0: f7fc fd48 bl 8004364 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80078d4: 4622 mov r2, r4 80078d6: 4621 mov r1, r4 80078d8: 2025 movs r0, #37 ; 0x25 80078da: f7fc fd0f bl 80042fc HAL_NVIC_EnableIRQ(USART1_IRQn); 80078de: 2025 movs r0, #37 ; 0x25 80078e0: f7fc fd40 bl 8004364 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 80078e4: 4622 mov r2, r4 80078e6: 4621 mov r1, r4 80078e8: 2026 movs r0, #38 ; 0x26 80078ea: f7fc fd07 bl 80042fc HAL_NVIC_EnableIRQ(USART2_IRQn); 80078ee: 2026 movs r0, #38 ; 0x26 80078f0: f7fc fd38 bl 8004364 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 80078f4: 4622 mov r2, r4 80078f6: 4621 mov r1, r4 80078f8: 2036 movs r0, #54 ; 0x36 80078fa: f7fc fcff bl 80042fc HAL_NVIC_EnableIRQ(TIM6_IRQn); 80078fe: 2036 movs r0, #54 ; 0x36 8007900: f7fc fd30 bl 8004364 HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); 8007904: 4622 mov r2, r4 8007906: 4621 mov r1, r4 8007908: 4648 mov r0, r9 800790a: f7fc fcf7 bl 80042fc HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); 800790e: 4648 mov r0, r9 8007910: f7fc fd28 bl 8004364 HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0); 8007914: 4622 mov r2, r4 8007916: 4621 mov r1, r4 8007918: 2006 movs r0, #6 800791a: f7fc fcef bl 80042fc HAL_NVIC_EnableIRQ(EXTI0_IRQn); 800791e: 2006 movs r0, #6 8007920: f7fc fd20 bl 8004364 HAL_TIM_Base_Start_IT(&htim6); 8007924: 4640 mov r0, r8 8007926: f7fd fecb bl 80056c0 RGB_SensorIDAutoset = set; 800792a: 4b25 ldr r3, [pc, #148] ; (80079c0 ) HAL_UART_Receive_DMA(&huart1, rx1_data, 1); 800792c: 463a mov r2, r7 800792e: 4925 ldr r1, [pc, #148] ; (80079c4 ) 8007930: 4630 mov r0, r6 RGB_SensorIDAutoset = set; 8007932: 701f strb r7, [r3, #0] HAL_UART_Receive_DMA(&huart1, rx1_data, 1); 8007934: f7fe f95e bl 8005bf4 HAL_UART_Receive_DMA(&huart2, rx2_data, 1); 8007938: 463a mov r2, r7 800793a: 4923 ldr r1, [pc, #140] ; (80079c8 ) 800793c: 4628 mov r0, r5 800793e: f7fe f959 bl 8005bf4 setbuf(stdout, NULL); // \n ?„ ? ?„ ?–„ë§? 8007942: 4b22 ldr r3, [pc, #136] ; (80079cc ) 8007944: 4621 mov r1, r4 8007946: 681b ldr r3, [r3, #0] 8007948: 6898 ldr r0, [r3, #8] 800794a: f000 fa9b bl 8007e84 Uart1_Data_Send(&SensorSerchStart_cmd[bluecell_stx], SensorSerchStart_cmd[bluecell_length] + 3); 800794e: f89d 101a ldrb.w r1, [sp, #26] 8007952: a806 add r0, sp, #24 8007954: 3103 adds r1, #3 8007956: b2c9 uxtb r1, r1 8007958: f7ff fb84 bl 8007064 WDOG_Check_Flag(); 800795c: f7ff fe86 bl 800766c __HAL_IWDG_START(&hiwdg); 8007960: f64c 42cc movw r2, #52428 ; 0xcccc 8007964: f8da 3000 ldr.w r3, [sl] 8007968: 601a str r2, [r3, #0] RGB_Data_Init(); 800796a: f7fe fb8d bl 8006088 Lora_Initialize(); 800796e: f7ff fcd1 bl 8007314 RGB_Alarm_Operate();//LED ALARM CHECK 8007972: f7fe fdff bl 8006574 Lora_Operate(); 8007976: f7ff fd09 bl 800738c Usart_Data_RecvCheck(); 800797a: f7ff fd65 bl 8007448 RGB_Sensor_DataRequest(); 800797e: f7ff fde1 bl 8007544 8007982: e7f6 b.n 8007972 8007984: 40021000 .word 0x40021000 8007988: 40011000 .word 0x40011000 800798c: 40010800 .word 0x40010800 8007990: 40010c00 .word 0x40010c00 8007994: 40011400 .word 0x40011400 8007998: 10110000 .word 0x10110000 800799c: 40001000 .word 0x40001000 80079a0: 2000072c .word 0x2000072c 80079a4: 40013800 .word 0x40013800 80079a8: 200008d8 .word 0x200008d8 80079ac: 40004400 .word 0x40004400 80079b0: 2000060c .word 0x2000060c 80079b4: 40005800 .word 0x40005800 80079b8: 000186a0 .word 0x000186a0 80079bc: 40003000 .word 0x40003000 80079c0: 20000401 .word 0x20000401 80079c4: 20000834 .word 0x20000834 80079c8: 20000660 .word 0x20000660 80079cc: 20000014 .word 0x20000014 80079d0: 20000898 .word 0x20000898 80079d4: 20000600 .word 0x20000600 080079d8 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80079d8: 4770 bx lr 080079da : 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 80079da: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80079dc: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80079de: 4604 mov r4, r0 80079e0: 1a22 subs r2, r4, r0 80079e2: b2d2 uxtb r2, r2 80079e4: 4291 cmp r1, r2 80079e6: d801 bhi.n 80079ec if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 80079e8: 4618 mov r0, r3 80079ea: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 80079ec: f814 2b01 ldrb.w r2, [r4], #1 80079f0: 4053 eors r3, r2 80079f2: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 80079f4: f013 0f80 tst.w r3, #128 ; 0x80 80079f8: f102 32ff add.w r2, r2, #4294967295 80079fc: ea4f 0343 mov.w r3, r3, lsl #1 8007a00: bf18 it ne 8007a02: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8007a06: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8007a0a: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8007a0c: d1f2 bne.n 80079f4 8007a0e: e7e7 b.n 80079e0 08007a10 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8007a10: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8007a12: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8007a14: 4605 mov r5, r0 8007a16: 1a2c subs r4, r5, r0 8007a18: b2e4 uxtb r4, r4 8007a1a: 42a1 cmp r1, r4 8007a1c: d803 bhi.n 8007a26 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8007a1e: 1a9b subs r3, r3, r2 8007a20: 4258 negs r0, r3 8007a22: 4158 adcs r0, r3 8007a24: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8007a26: f815 4b01 ldrb.w r4, [r5], #1 8007a2a: 4063 eors r3, r4 8007a2c: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8007a2e: f013 0f80 tst.w r3, #128 ; 0x80 8007a32: f104 34ff add.w r4, r4, #4294967295 8007a36: ea4f 0343 mov.w r3, r3, lsl #1 8007a3a: bf18 it ne 8007a3c: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8007a40: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8007a44: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8007a46: d1f2 bne.n 8007a2e 8007a48: e7e5 b.n 8007a16 ... 08007a4c : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8007a4c: 4b0e ldr r3, [pc, #56] ; (8007a88 ) { 8007a4e: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8007a50: 699a ldr r2, [r3, #24] 8007a52: f042 0201 orr.w r2, r2, #1 8007a56: 619a str r2, [r3, #24] 8007a58: 699a ldr r2, [r3, #24] 8007a5a: f002 0201 and.w r2, r2, #1 8007a5e: 9200 str r2, [sp, #0] 8007a60: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8007a62: 69da ldr r2, [r3, #28] 8007a64: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8007a68: 61da str r2, [r3, #28] 8007a6a: 69db ldr r3, [r3, #28] /* System interrupt init*/ /**NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8007a6c: 4a07 ldr r2, [pc, #28] ; (8007a8c ) __HAL_RCC_PWR_CLK_ENABLE(); 8007a6e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8007a72: 9301 str r3, [sp, #4] 8007a74: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8007a76: 6853 ldr r3, [r2, #4] 8007a78: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8007a7c: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 8007a80: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8007a82: b002 add sp, #8 8007a84: 4770 bx lr 8007a86: bf00 nop 8007a88: 40021000 .word 0x40021000 8007a8c: 40010000 .word 0x40010000 08007a90 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8007a90: b510 push {r4, lr} 8007a92: 4604 mov r4, r0 8007a94: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007a96: 2210 movs r2, #16 8007a98: 2100 movs r1, #0 8007a9a: a802 add r0, sp, #8 8007a9c: f000 f96d bl 8007d7a if(hi2c->Instance==I2C2) 8007aa0: 6822 ldr r2, [r4, #0] 8007aa2: 4b11 ldr r3, [pc, #68] ; (8007ae8 ) 8007aa4: 429a cmp r2, r3 8007aa6: d11d bne.n 8007ae4 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8007aa8: 4c10 ldr r4, [pc, #64] ; (8007aec ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007aaa: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007aac: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007aae: 4810 ldr r0, [pc, #64] ; (8007af0 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 8007ab0: f043 0308 orr.w r3, r3, #8 8007ab4: 61a3 str r3, [r4, #24] 8007ab6: 69a3 ldr r3, [r4, #24] 8007ab8: f003 0308 and.w r3, r3, #8 8007abc: 9300 str r3, [sp, #0] 8007abe: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8007ac0: f44f 6340 mov.w r3, #3072 ; 0xc00 8007ac4: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8007ac6: 2312 movs r3, #18 8007ac8: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8007aca: 2303 movs r3, #3 8007acc: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007ace: f7fc fe33 bl 8004738 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 8007ad2: 69e3 ldr r3, [r4, #28] 8007ad4: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 8007ad8: 61e3 str r3, [r4, #28] 8007ada: 69e3 ldr r3, [r4, #28] 8007adc: f403 0380 and.w r3, r3, #4194304 ; 0x400000 8007ae0: 9301 str r3, [sp, #4] 8007ae2: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 8007ae4: b006 add sp, #24 8007ae6: bd10 pop {r4, pc} 8007ae8: 40005800 .word 0x40005800 8007aec: 40021000 .word 0x40021000 8007af0: 40010c00 .word 0x40010c00 08007af4 : * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8007af4: 6802 ldr r2, [r0, #0] 8007af6: 4b08 ldr r3, [pc, #32] ; (8007b18 ) { 8007af8: b082 sub sp, #8 if(htim_base->Instance==TIM6) 8007afa: 429a cmp r2, r3 8007afc: d10a bne.n 8007b14 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8007afe: f503 3300 add.w r3, r3, #131072 ; 0x20000 8007b02: 69da ldr r2, [r3, #28] 8007b04: f042 0210 orr.w r2, r2, #16 8007b08: 61da str r2, [r3, #28] 8007b0a: 69db ldr r3, [r3, #28] 8007b0c: f003 0310 and.w r3, r3, #16 8007b10: 9301 str r3, [sp, #4] 8007b12: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8007b14: b002 add sp, #8 8007b16: 4770 bx lr 8007b18: 40001000 .word 0x40001000 08007b1c : * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007b1c: 2210 movs r2, #16 { 8007b1e: b570 push {r4, r5, r6, lr} 8007b20: 4606 mov r6, r0 8007b22: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007b24: eb0d 0002 add.w r0, sp, r2 8007b28: 2100 movs r1, #0 8007b2a: f000 f926 bl 8007d7a if(huart->Instance==USART1) 8007b2e: 6833 ldr r3, [r6, #0] 8007b30: 4a36 ldr r2, [pc, #216] ; (8007c0c ) 8007b32: 4293 cmp r3, r2 8007b34: d13d bne.n 8007bb2 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8007b36: 4b36 ldr r3, [pc, #216] ; (8007c10 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007b38: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 8007b3a: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007b3c: 4835 ldr r0, [pc, #212] ; (8007c14 ) __HAL_RCC_USART1_CLK_ENABLE(); 8007b3e: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8007b42: 619a str r2, [r3, #24] 8007b44: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007b46: 2500 movs r5, #0 __HAL_RCC_USART1_CLK_ENABLE(); 8007b48: f402 4280 and.w r2, r2, #16384 ; 0x4000 8007b4c: 9200 str r2, [sp, #0] 8007b4e: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8007b50: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 8007b52: 4c31 ldr r4, [pc, #196] ; (8007c18 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8007b54: f042 0204 orr.w r2, r2, #4 8007b58: 619a str r2, [r3, #24] 8007b5a: 699b ldr r3, [r3, #24] 8007b5c: f003 0304 and.w r3, r3, #4 8007b60: 9301 str r3, [sp, #4] 8007b62: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8007b64: f44f 7300 mov.w r3, #512 ; 0x200 8007b68: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8007b6a: 2302 movs r3, #2 8007b6c: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8007b6e: 2303 movs r3, #3 8007b70: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007b72: f7fc fde1 bl 8004738 GPIO_InitStruct.Pin = GPIO_PIN_10; 8007b76: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007b7a: a904 add r1, sp, #16 8007b7c: 4825 ldr r0, [pc, #148] ; (8007c14 ) GPIO_InitStruct.Pin = GPIO_PIN_10; 8007b7e: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007b80: 9505 str r5, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8007b82: 9506 str r5, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007b84: f7fc fdd8 bl 8004738 hdma_usart1_rx.Instance = DMA1_Channel5; 8007b88: 4b24 ldr r3, [pc, #144] ; (8007c1c ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART2 DMA Init */ /* USART2_RX Init */ hdma_usart2_rx.Instance = DMA1_Channel6; hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8007b8a: e884 0028 stmia.w r4, {r3, r5} hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; 8007b8e: 2380 movs r3, #128 ; 0x80 8007b90: 60e3 str r3, [r4, #12] hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart2_rx.Init.Mode = DMA_CIRCULAR; 8007b92: 2320 movs r3, #32 hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; 8007b94: 60a5 str r5, [r4, #8] hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8007b96: 6125 str r5, [r4, #16] hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8007b98: 6165 str r5, [r4, #20] hdma_usart2_rx.Init.Mode = DMA_CIRCULAR; 8007b9a: 61a3 str r3, [r4, #24] hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW; 8007b9c: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) 8007b9e: 4620 mov r0, r4 8007ba0: f7fc fc02 bl 80043a8 8007ba4: b108 cbz r0, 8007baa { Error_Handler(); 8007ba6: f7ff ff17 bl 80079d8 } __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx); 8007baa: 6374 str r4, [r6, #52] ; 0x34 8007bac: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8007bae: b008 add sp, #32 8007bb0: bd70 pop {r4, r5, r6, pc} else if(huart->Instance==USART2) 8007bb2: 4a1b ldr r2, [pc, #108] ; (8007c20 ) 8007bb4: 4293 cmp r3, r2 8007bb6: d1fa bne.n 8007bae __HAL_RCC_USART2_CLK_ENABLE(); 8007bb8: 4b15 ldr r3, [pc, #84] ; (8007c10 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007bba: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 8007bbc: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007bbe: 4815 ldr r0, [pc, #84] ; (8007c14 ) __HAL_RCC_USART2_CLK_ENABLE(); 8007bc0: f442 3200 orr.w r2, r2, #131072 ; 0x20000 8007bc4: 61da str r2, [r3, #28] 8007bc6: 69da ldr r2, [r3, #28] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007bc8: 2500 movs r5, #0 __HAL_RCC_USART2_CLK_ENABLE(); 8007bca: f402 3200 and.w r2, r2, #131072 ; 0x20000 8007bce: 9202 str r2, [sp, #8] 8007bd0: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8007bd2: 699a ldr r2, [r3, #24] hdma_usart2_rx.Instance = DMA1_Channel6; 8007bd4: 4c13 ldr r4, [pc, #76] ; (8007c24 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8007bd6: f042 0204 orr.w r2, r2, #4 8007bda: 619a str r2, [r3, #24] 8007bdc: 699b ldr r3, [r3, #24] 8007bde: f003 0304 and.w r3, r3, #4 8007be2: 9303 str r3, [sp, #12] 8007be4: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 8007be6: 2304 movs r3, #4 8007be8: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8007bea: 2302 movs r3, #2 8007bec: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8007bee: 2303 movs r3, #3 8007bf0: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007bf2: f7fc fda1 bl 8004738 GPIO_InitStruct.Pin = GPIO_PIN_3; 8007bf6: 2308 movs r3, #8 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007bf8: a904 add r1, sp, #16 8007bfa: 4806 ldr r0, [pc, #24] ; (8007c14 ) GPIO_InitStruct.Pin = GPIO_PIN_3; 8007bfc: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007bfe: 9505 str r5, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8007c00: 9506 str r5, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007c02: f7fc fd99 bl 8004738 hdma_usart2_rx.Instance = DMA1_Channel6; 8007c06: 4b08 ldr r3, [pc, #32] ; (8007c28 ) 8007c08: e7bf b.n 8007b8a 8007c0a: bf00 nop 8007c0c: 40013800 .word 0x40013800 8007c10: 40021000 .word 0x40021000 8007c14: 40010800 .word 0x40010800 8007c18: 200006e8 .word 0x200006e8 8007c1c: 40020058 .word 0x40020058 8007c20: 40004400 .word 0x40004400 8007c24: 200005b4 .word 0x200005b4 8007c28: 4002006c .word 0x4002006c 08007c2c : 8007c2c: 4770 bx lr 08007c2e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8007c2e: e7fe b.n 8007c2e 08007c30 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8007c30: e7fe b.n 8007c30 08007c32 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8007c32: e7fe b.n 8007c32 08007c34 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8007c34: e7fe b.n 8007c34 08007c36 : 8007c36: 4770 bx lr 08007c38 : 8007c38: 4770 bx lr 08007c3a : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8007c3a: 4770 bx lr 08007c3c : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8007c3c: f7fc bb28 b.w 8004290 08007c40 : void EXTI0_IRQHandler(void) { /* USER CODE BEGIN EXTI0_IRQn 0 */ /* USER CODE END EXTI0_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); 8007c40: 2001 movs r0, #1 8007c42: f7fc be75 b.w 8004930 ... 08007c48 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8007c48: 4801 ldr r0, [pc, #4] ; (8007c50 ) 8007c4a: f7fc bc99 b.w 8004580 8007c4e: bf00 nop 8007c50: 200006e8 .word 0x200006e8 08007c54 : void DMA1_Channel6_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */ /* USER CODE END DMA1_Channel6_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_rx); 8007c54: 4801 ldr r0, [pc, #4] ; (8007c5c ) 8007c56: f7fc bc93 b.w 8004580 8007c5a: bf00 nop 8007c5c: 200005b4 .word 0x200005b4 08007c60 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8007c60: 4801 ldr r0, [pc, #4] ; (8007c68 ) 8007c62: f7fe b899 b.w 8005d98 8007c66: bf00 nop 8007c68: 2000072c .word 0x2000072c 08007c6c : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 8007c6c: 4801 ldr r0, [pc, #4] ; (8007c74 ) 8007c6e: f7fe b893 b.w 8005d98 8007c72: bf00 nop 8007c74: 200008d8 .word 0x200008d8 08007c78 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8007c78: 4801 ldr r0, [pc, #4] ; (8007c80 ) 8007c7a: f7fd bd30 b.w 80056de 8007c7e: bf00 nop 8007c80: 20000898 .word 0x20000898 08007c84 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8007c84: 4b0e ldr r3, [pc, #56] ; (8007cc0 ) 8007c86: 681a ldr r2, [r3, #0] 8007c88: f042 0201 orr.w r2, r2, #1 8007c8c: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8007c8e: 6859 ldr r1, [r3, #4] 8007c90: 4a0c ldr r2, [pc, #48] ; (8007cc4 ) 8007c92: 400a ands r2, r1 8007c94: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8007c96: 681a ldr r2, [r3, #0] 8007c98: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8007c9c: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8007ca0: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8007ca2: 681a ldr r2, [r3, #0] 8007ca4: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8007ca8: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8007caa: 685a ldr r2, [r3, #4] 8007cac: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8007cb0: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8007cb2: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8007cb6: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8007cb8: 4a03 ldr r2, [pc, #12] ; (8007cc8 ) 8007cba: 4b04 ldr r3, [pc, #16] ; (8007ccc ) 8007cbc: 609a str r2, [r3, #8] 8007cbe: 4770 bx lr 8007cc0: 40021000 .word 0x40021000 8007cc4: f8ff0000 .word 0xf8ff0000 8007cc8: 08004000 .word 0x08004000 8007ccc: e000ed00 .word 0xe000ed00 08007cd0 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8007cd0: 2100 movs r1, #0 b LoopCopyDataInit 8007cd2: e003 b.n 8007cdc 08007cd4 : CopyDataInit: ldr r3, =_sidata 8007cd4: 4b0b ldr r3, [pc, #44] ; (8007d04 ) ldr r3, [r3, r1] 8007cd6: 585b ldr r3, [r3, r1] str r3, [r0, r1] 8007cd8: 5043 str r3, [r0, r1] adds r1, r1, #4 8007cda: 3104 adds r1, #4 08007cdc : LoopCopyDataInit: ldr r0, =_sdata 8007cdc: 480a ldr r0, [pc, #40] ; (8007d08 ) ldr r3, =_edata 8007cde: 4b0b ldr r3, [pc, #44] ; (8007d0c ) adds r2, r0, r1 8007ce0: 1842 adds r2, r0, r1 cmp r2, r3 8007ce2: 429a cmp r2, r3 bcc CopyDataInit 8007ce4: d3f6 bcc.n 8007cd4 ldr r2, =_sbss 8007ce6: 4a0a ldr r2, [pc, #40] ; (8007d10 ) b LoopFillZerobss 8007ce8: e002 b.n 8007cf0 08007cea : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 8007cea: 2300 movs r3, #0 str r3, [r2], #4 8007cec: f842 3b04 str.w r3, [r2], #4 08007cf0 : LoopFillZerobss: ldr r3, = _ebss 8007cf0: 4b08 ldr r3, [pc, #32] ; (8007d14 ) cmp r2, r3 8007cf2: 429a cmp r2, r3 bcc FillZerobss 8007cf4: d3f9 bcc.n 8007cea /* Call the clock system intitialization function.*/ bl SystemInit 8007cf6: f7ff ffc5 bl 8007c84 /* Call static constructors */ bl __libc_init_array 8007cfa: f000 f80f bl 8007d1c <__libc_init_array> /* Call the application's entry point.*/ bl main 8007cfe: f7ff fcef bl 80076e0
bx lr 8007d02: 4770 bx lr ldr r3, =_sidata 8007d04: 08009178 .word 0x08009178 ldr r0, =_sdata 8007d08: 20000000 .word 0x20000000 ldr r3, =_edata 8007d0c: 20000078 .word 0x20000078 ldr r2, =_sbss 8007d10: 20000078 .word 0x20000078 ldr r3, = _ebss 8007d14: 20000a34 .word 0x20000a34 08007d18 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8007d18: e7fe b.n 8007d18 ... 08007d1c <__libc_init_array>: 8007d1c: b570 push {r4, r5, r6, lr} 8007d1e: 2500 movs r5, #0 8007d20: 4e0c ldr r6, [pc, #48] ; (8007d54 <__libc_init_array+0x38>) 8007d22: 4c0d ldr r4, [pc, #52] ; (8007d58 <__libc_init_array+0x3c>) 8007d24: 1ba4 subs r4, r4, r6 8007d26: 10a4 asrs r4, r4, #2 8007d28: 42a5 cmp r5, r4 8007d2a: d109 bne.n 8007d40 <__libc_init_array+0x24> 8007d2c: f001 f88a bl 8008e44 <_init> 8007d30: 2500 movs r5, #0 8007d32: 4e0a ldr r6, [pc, #40] ; (8007d5c <__libc_init_array+0x40>) 8007d34: 4c0a ldr r4, [pc, #40] ; (8007d60 <__libc_init_array+0x44>) 8007d36: 1ba4 subs r4, r4, r6 8007d38: 10a4 asrs r4, r4, #2 8007d3a: 42a5 cmp r5, r4 8007d3c: d105 bne.n 8007d4a <__libc_init_array+0x2e> 8007d3e: bd70 pop {r4, r5, r6, pc} 8007d40: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8007d44: 4798 blx r3 8007d46: 3501 adds r5, #1 8007d48: e7ee b.n 8007d28 <__libc_init_array+0xc> 8007d4a: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8007d4e: 4798 blx r3 8007d50: 3501 adds r5, #1 8007d52: e7f2 b.n 8007d3a <__libc_init_array+0x1e> 8007d54: 08009170 .word 0x08009170 8007d58: 08009170 .word 0x08009170 8007d5c: 08009170 .word 0x08009170 8007d60: 08009174 .word 0x08009174 08007d64 : 8007d64: b510 push {r4, lr} 8007d66: 1e43 subs r3, r0, #1 8007d68: 440a add r2, r1 8007d6a: 4291 cmp r1, r2 8007d6c: d100 bne.n 8007d70 8007d6e: bd10 pop {r4, pc} 8007d70: f811 4b01 ldrb.w r4, [r1], #1 8007d74: f803 4f01 strb.w r4, [r3, #1]! 8007d78: e7f7 b.n 8007d6a 08007d7a : 8007d7a: 4603 mov r3, r0 8007d7c: 4402 add r2, r0 8007d7e: 4293 cmp r3, r2 8007d80: d100 bne.n 8007d84 8007d82: 4770 bx lr 8007d84: f803 1b01 strb.w r1, [r3], #1 8007d88: e7f9 b.n 8007d7e ... 08007d8c : 8007d8c: b40f push {r0, r1, r2, r3} 8007d8e: 4b0a ldr r3, [pc, #40] ; (8007db8 ) 8007d90: b513 push {r0, r1, r4, lr} 8007d92: 681c ldr r4, [r3, #0] 8007d94: b124 cbz r4, 8007da0 8007d96: 69a3 ldr r3, [r4, #24] 8007d98: b913 cbnz r3, 8007da0 8007d9a: 4620 mov r0, r4 8007d9c: f000 fada bl 8008354 <__sinit> 8007da0: ab05 add r3, sp, #20 8007da2: 9a04 ldr r2, [sp, #16] 8007da4: 68a1 ldr r1, [r4, #8] 8007da6: 4620 mov r0, r4 8007da8: 9301 str r3, [sp, #4] 8007daa: f000 fc9b bl 80086e4 <_vfiprintf_r> 8007dae: b002 add sp, #8 8007db0: e8bd 4010 ldmia.w sp!, {r4, lr} 8007db4: b004 add sp, #16 8007db6: 4770 bx lr 8007db8: 20000014 .word 0x20000014 08007dbc <_puts_r>: 8007dbc: b570 push {r4, r5, r6, lr} 8007dbe: 460e mov r6, r1 8007dc0: 4605 mov r5, r0 8007dc2: b118 cbz r0, 8007dcc <_puts_r+0x10> 8007dc4: 6983 ldr r3, [r0, #24] 8007dc6: b90b cbnz r3, 8007dcc <_puts_r+0x10> 8007dc8: f000 fac4 bl 8008354 <__sinit> 8007dcc: 69ab ldr r3, [r5, #24] 8007dce: 68ac ldr r4, [r5, #8] 8007dd0: b913 cbnz r3, 8007dd8 <_puts_r+0x1c> 8007dd2: 4628 mov r0, r5 8007dd4: f000 fabe bl 8008354 <__sinit> 8007dd8: 4b23 ldr r3, [pc, #140] ; (8007e68 <_puts_r+0xac>) 8007dda: 429c cmp r4, r3 8007ddc: d117 bne.n 8007e0e <_puts_r+0x52> 8007dde: 686c ldr r4, [r5, #4] 8007de0: 89a3 ldrh r3, [r4, #12] 8007de2: 071b lsls r3, r3, #28 8007de4: d51d bpl.n 8007e22 <_puts_r+0x66> 8007de6: 6923 ldr r3, [r4, #16] 8007de8: b1db cbz r3, 8007e22 <_puts_r+0x66> 8007dea: 3e01 subs r6, #1 8007dec: 68a3 ldr r3, [r4, #8] 8007dee: f816 1f01 ldrb.w r1, [r6, #1]! 8007df2: 3b01 subs r3, #1 8007df4: 60a3 str r3, [r4, #8] 8007df6: b9e9 cbnz r1, 8007e34 <_puts_r+0x78> 8007df8: 2b00 cmp r3, #0 8007dfa: da2e bge.n 8007e5a <_puts_r+0x9e> 8007dfc: 4622 mov r2, r4 8007dfe: 210a movs r1, #10 8007e00: 4628 mov r0, r5 8007e02: f000 f8f5 bl 8007ff0 <__swbuf_r> 8007e06: 3001 adds r0, #1 8007e08: d011 beq.n 8007e2e <_puts_r+0x72> 8007e0a: 200a movs r0, #10 8007e0c: bd70 pop {r4, r5, r6, pc} 8007e0e: 4b17 ldr r3, [pc, #92] ; (8007e6c <_puts_r+0xb0>) 8007e10: 429c cmp r4, r3 8007e12: d101 bne.n 8007e18 <_puts_r+0x5c> 8007e14: 68ac ldr r4, [r5, #8] 8007e16: e7e3 b.n 8007de0 <_puts_r+0x24> 8007e18: 4b15 ldr r3, [pc, #84] ; (8007e70 <_puts_r+0xb4>) 8007e1a: 429c cmp r4, r3 8007e1c: bf08 it eq 8007e1e: 68ec ldreq r4, [r5, #12] 8007e20: e7de b.n 8007de0 <_puts_r+0x24> 8007e22: 4621 mov r1, r4 8007e24: 4628 mov r0, r5 8007e26: f000 f935 bl 8008094 <__swsetup_r> 8007e2a: 2800 cmp r0, #0 8007e2c: d0dd beq.n 8007dea <_puts_r+0x2e> 8007e2e: f04f 30ff mov.w r0, #4294967295 8007e32: bd70 pop {r4, r5, r6, pc} 8007e34: 2b00 cmp r3, #0 8007e36: da04 bge.n 8007e42 <_puts_r+0x86> 8007e38: 69a2 ldr r2, [r4, #24] 8007e3a: 4293 cmp r3, r2 8007e3c: db06 blt.n 8007e4c <_puts_r+0x90> 8007e3e: 290a cmp r1, #10 8007e40: d004 beq.n 8007e4c <_puts_r+0x90> 8007e42: 6823 ldr r3, [r4, #0] 8007e44: 1c5a adds r2, r3, #1 8007e46: 6022 str r2, [r4, #0] 8007e48: 7019 strb r1, [r3, #0] 8007e4a: e7cf b.n 8007dec <_puts_r+0x30> 8007e4c: 4622 mov r2, r4 8007e4e: 4628 mov r0, r5 8007e50: f000 f8ce bl 8007ff0 <__swbuf_r> 8007e54: 3001 adds r0, #1 8007e56: d1c9 bne.n 8007dec <_puts_r+0x30> 8007e58: e7e9 b.n 8007e2e <_puts_r+0x72> 8007e5a: 200a movs r0, #10 8007e5c: 6823 ldr r3, [r4, #0] 8007e5e: 1c5a adds r2, r3, #1 8007e60: 6022 str r2, [r4, #0] 8007e62: 7018 strb r0, [r3, #0] 8007e64: bd70 pop {r4, r5, r6, pc} 8007e66: bf00 nop 8007e68: 080090fc .word 0x080090fc 8007e6c: 0800911c .word 0x0800911c 8007e70: 080090dc .word 0x080090dc 08007e74 : 8007e74: 4b02 ldr r3, [pc, #8] ; (8007e80 ) 8007e76: 4601 mov r1, r0 8007e78: 6818 ldr r0, [r3, #0] 8007e7a: f7ff bf9f b.w 8007dbc <_puts_r> 8007e7e: bf00 nop 8007e80: 20000014 .word 0x20000014 08007e84 : 8007e84: 2900 cmp r1, #0 8007e86: f44f 6380 mov.w r3, #1024 ; 0x400 8007e8a: bf0c ite eq 8007e8c: 2202 moveq r2, #2 8007e8e: 2200 movne r2, #0 8007e90: f000 b800 b.w 8007e94 08007e94 : 8007e94: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8007e98: 461d mov r5, r3 8007e9a: 4b51 ldr r3, [pc, #324] ; (8007fe0 ) 8007e9c: 4604 mov r4, r0 8007e9e: 681e ldr r6, [r3, #0] 8007ea0: 460f mov r7, r1 8007ea2: 4690 mov r8, r2 8007ea4: b126 cbz r6, 8007eb0 8007ea6: 69b3 ldr r3, [r6, #24] 8007ea8: b913 cbnz r3, 8007eb0 8007eaa: 4630 mov r0, r6 8007eac: f000 fa52 bl 8008354 <__sinit> 8007eb0: 4b4c ldr r3, [pc, #304] ; (8007fe4 ) 8007eb2: 429c cmp r4, r3 8007eb4: d152 bne.n 8007f5c 8007eb6: 6874 ldr r4, [r6, #4] 8007eb8: f1b8 0f02 cmp.w r8, #2 8007ebc: d006 beq.n 8007ecc 8007ebe: f1b8 0f01 cmp.w r8, #1 8007ec2: f200 8089 bhi.w 8007fd8 8007ec6: 2d00 cmp r5, #0 8007ec8: f2c0 8086 blt.w 8007fd8 8007ecc: 4621 mov r1, r4 8007ece: 4630 mov r0, r6 8007ed0: f000 f9d6 bl 8008280 <_fflush_r> 8007ed4: 6b61 ldr r1, [r4, #52] ; 0x34 8007ed6: b141 cbz r1, 8007eea 8007ed8: f104 0344 add.w r3, r4, #68 ; 0x44 8007edc: 4299 cmp r1, r3 8007ede: d002 beq.n 8007ee6 8007ee0: 4630 mov r0, r6 8007ee2: f000 fb2d bl 8008540 <_free_r> 8007ee6: 2300 movs r3, #0 8007ee8: 6363 str r3, [r4, #52] ; 0x34 8007eea: 2300 movs r3, #0 8007eec: 61a3 str r3, [r4, #24] 8007eee: 6063 str r3, [r4, #4] 8007ef0: 89a3 ldrh r3, [r4, #12] 8007ef2: 061b lsls r3, r3, #24 8007ef4: d503 bpl.n 8007efe 8007ef6: 6921 ldr r1, [r4, #16] 8007ef8: 4630 mov r0, r6 8007efa: f000 fb21 bl 8008540 <_free_r> 8007efe: 89a3 ldrh r3, [r4, #12] 8007f00: f1b8 0f02 cmp.w r8, #2 8007f04: f423 634a bic.w r3, r3, #3232 ; 0xca0 8007f08: f023 0303 bic.w r3, r3, #3 8007f0c: 81a3 strh r3, [r4, #12] 8007f0e: d05d beq.n 8007fcc 8007f10: ab01 add r3, sp, #4 8007f12: 466a mov r2, sp 8007f14: 4621 mov r1, r4 8007f16: 4630 mov r0, r6 8007f18: f000 faa6 bl 8008468 <__swhatbuf_r> 8007f1c: 89a3 ldrh r3, [r4, #12] 8007f1e: 4318 orrs r0, r3 8007f20: 81a0 strh r0, [r4, #12] 8007f22: bb2d cbnz r5, 8007f70 8007f24: 9d00 ldr r5, [sp, #0] 8007f26: 4628 mov r0, r5 8007f28: f000 fb02 bl 8008530 8007f2c: 4607 mov r7, r0 8007f2e: 2800 cmp r0, #0 8007f30: d14e bne.n 8007fd0 8007f32: f8dd 9000 ldr.w r9, [sp] 8007f36: 45a9 cmp r9, r5 8007f38: d13c bne.n 8007fb4 8007f3a: f04f 30ff mov.w r0, #4294967295 8007f3e: 89a3 ldrh r3, [r4, #12] 8007f40: f043 0302 orr.w r3, r3, #2 8007f44: 81a3 strh r3, [r4, #12] 8007f46: 2300 movs r3, #0 8007f48: 60a3 str r3, [r4, #8] 8007f4a: f104 0347 add.w r3, r4, #71 ; 0x47 8007f4e: 6023 str r3, [r4, #0] 8007f50: 6123 str r3, [r4, #16] 8007f52: 2301 movs r3, #1 8007f54: 6163 str r3, [r4, #20] 8007f56: b003 add sp, #12 8007f58: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8007f5c: 4b22 ldr r3, [pc, #136] ; (8007fe8 ) 8007f5e: 429c cmp r4, r3 8007f60: d101 bne.n 8007f66 8007f62: 68b4 ldr r4, [r6, #8] 8007f64: e7a8 b.n 8007eb8 8007f66: 4b21 ldr r3, [pc, #132] ; (8007fec ) 8007f68: 429c cmp r4, r3 8007f6a: bf08 it eq 8007f6c: 68f4 ldreq r4, [r6, #12] 8007f6e: e7a3 b.n 8007eb8 8007f70: 2f00 cmp r7, #0 8007f72: d0d8 beq.n 8007f26 8007f74: 69b3 ldr r3, [r6, #24] 8007f76: b913 cbnz r3, 8007f7e 8007f78: 4630 mov r0, r6 8007f7a: f000 f9eb bl 8008354 <__sinit> 8007f7e: f1b8 0f01 cmp.w r8, #1 8007f82: bf08 it eq 8007f84: 89a3 ldrheq r3, [r4, #12] 8007f86: 6027 str r7, [r4, #0] 8007f88: bf04 itt eq 8007f8a: f043 0301 orreq.w r3, r3, #1 8007f8e: 81a3 strheq r3, [r4, #12] 8007f90: 89a3 ldrh r3, [r4, #12] 8007f92: 6127 str r7, [r4, #16] 8007f94: f013 0008 ands.w r0, r3, #8 8007f98: 6165 str r5, [r4, #20] 8007f9a: d01b beq.n 8007fd4 8007f9c: f013 0001 ands.w r0, r3, #1 8007fa0: f04f 0300 mov.w r3, #0 8007fa4: bf1f itttt ne 8007fa6: 426d negne r5, r5 8007fa8: 60a3 strne r3, [r4, #8] 8007faa: 61a5 strne r5, [r4, #24] 8007fac: 4618 movne r0, r3 8007fae: bf08 it eq 8007fb0: 60a5 streq r5, [r4, #8] 8007fb2: e7d0 b.n 8007f56 8007fb4: 4648 mov r0, r9 8007fb6: f000 fabb bl 8008530 8007fba: 4607 mov r7, r0 8007fbc: 2800 cmp r0, #0 8007fbe: d0bc beq.n 8007f3a 8007fc0: 89a3 ldrh r3, [r4, #12] 8007fc2: 464d mov r5, r9 8007fc4: f043 0380 orr.w r3, r3, #128 ; 0x80 8007fc8: 81a3 strh r3, [r4, #12] 8007fca: e7d3 b.n 8007f74 8007fcc: 2000 movs r0, #0 8007fce: e7b6 b.n 8007f3e 8007fd0: 46a9 mov r9, r5 8007fd2: e7f5 b.n 8007fc0 8007fd4: 60a0 str r0, [r4, #8] 8007fd6: e7be b.n 8007f56 8007fd8: f04f 30ff mov.w r0, #4294967295 8007fdc: e7bb b.n 8007f56 8007fde: bf00 nop 8007fe0: 20000014 .word 0x20000014 8007fe4: 080090fc .word 0x080090fc 8007fe8: 0800911c .word 0x0800911c 8007fec: 080090dc .word 0x080090dc 08007ff0 <__swbuf_r>: 8007ff0: b5f8 push {r3, r4, r5, r6, r7, lr} 8007ff2: 460e mov r6, r1 8007ff4: 4614 mov r4, r2 8007ff6: 4605 mov r5, r0 8007ff8: b118 cbz r0, 8008002 <__swbuf_r+0x12> 8007ffa: 6983 ldr r3, [r0, #24] 8007ffc: b90b cbnz r3, 8008002 <__swbuf_r+0x12> 8007ffe: f000 f9a9 bl 8008354 <__sinit> 8008002: 4b21 ldr r3, [pc, #132] ; (8008088 <__swbuf_r+0x98>) 8008004: 429c cmp r4, r3 8008006: d12a bne.n 800805e <__swbuf_r+0x6e> 8008008: 686c ldr r4, [r5, #4] 800800a: 69a3 ldr r3, [r4, #24] 800800c: 60a3 str r3, [r4, #8] 800800e: 89a3 ldrh r3, [r4, #12] 8008010: 071a lsls r2, r3, #28 8008012: d52e bpl.n 8008072 <__swbuf_r+0x82> 8008014: 6923 ldr r3, [r4, #16] 8008016: b363 cbz r3, 8008072 <__swbuf_r+0x82> 8008018: 6923 ldr r3, [r4, #16] 800801a: 6820 ldr r0, [r4, #0] 800801c: b2f6 uxtb r6, r6 800801e: 1ac0 subs r0, r0, r3 8008020: 6963 ldr r3, [r4, #20] 8008022: 4637 mov r7, r6 8008024: 4298 cmp r0, r3 8008026: db04 blt.n 8008032 <__swbuf_r+0x42> 8008028: 4621 mov r1, r4 800802a: 4628 mov r0, r5 800802c: f000 f928 bl 8008280 <_fflush_r> 8008030: bb28 cbnz r0, 800807e <__swbuf_r+0x8e> 8008032: 68a3 ldr r3, [r4, #8] 8008034: 3001 adds r0, #1 8008036: 3b01 subs r3, #1 8008038: 60a3 str r3, [r4, #8] 800803a: 6823 ldr r3, [r4, #0] 800803c: 1c5a adds r2, r3, #1 800803e: 6022 str r2, [r4, #0] 8008040: 701e strb r6, [r3, #0] 8008042: 6963 ldr r3, [r4, #20] 8008044: 4298 cmp r0, r3 8008046: d004 beq.n 8008052 <__swbuf_r+0x62> 8008048: 89a3 ldrh r3, [r4, #12] 800804a: 07db lsls r3, r3, #31 800804c: d519 bpl.n 8008082 <__swbuf_r+0x92> 800804e: 2e0a cmp r6, #10 8008050: d117 bne.n 8008082 <__swbuf_r+0x92> 8008052: 4621 mov r1, r4 8008054: 4628 mov r0, r5 8008056: f000 f913 bl 8008280 <_fflush_r> 800805a: b190 cbz r0, 8008082 <__swbuf_r+0x92> 800805c: e00f b.n 800807e <__swbuf_r+0x8e> 800805e: 4b0b ldr r3, [pc, #44] ; (800808c <__swbuf_r+0x9c>) 8008060: 429c cmp r4, r3 8008062: d101 bne.n 8008068 <__swbuf_r+0x78> 8008064: 68ac ldr r4, [r5, #8] 8008066: e7d0 b.n 800800a <__swbuf_r+0x1a> 8008068: 4b09 ldr r3, [pc, #36] ; (8008090 <__swbuf_r+0xa0>) 800806a: 429c cmp r4, r3 800806c: bf08 it eq 800806e: 68ec ldreq r4, [r5, #12] 8008070: e7cb b.n 800800a <__swbuf_r+0x1a> 8008072: 4621 mov r1, r4 8008074: 4628 mov r0, r5 8008076: f000 f80d bl 8008094 <__swsetup_r> 800807a: 2800 cmp r0, #0 800807c: d0cc beq.n 8008018 <__swbuf_r+0x28> 800807e: f04f 37ff mov.w r7, #4294967295 8008082: 4638 mov r0, r7 8008084: bdf8 pop {r3, r4, r5, r6, r7, pc} 8008086: bf00 nop 8008088: 080090fc .word 0x080090fc 800808c: 0800911c .word 0x0800911c 8008090: 080090dc .word 0x080090dc 08008094 <__swsetup_r>: 8008094: 4b32 ldr r3, [pc, #200] ; (8008160 <__swsetup_r+0xcc>) 8008096: b570 push {r4, r5, r6, lr} 8008098: 681d ldr r5, [r3, #0] 800809a: 4606 mov r6, r0 800809c: 460c mov r4, r1 800809e: b125 cbz r5, 80080aa <__swsetup_r+0x16> 80080a0: 69ab ldr r3, [r5, #24] 80080a2: b913 cbnz r3, 80080aa <__swsetup_r+0x16> 80080a4: 4628 mov r0, r5 80080a6: f000 f955 bl 8008354 <__sinit> 80080aa: 4b2e ldr r3, [pc, #184] ; (8008164 <__swsetup_r+0xd0>) 80080ac: 429c cmp r4, r3 80080ae: d10f bne.n 80080d0 <__swsetup_r+0x3c> 80080b0: 686c ldr r4, [r5, #4] 80080b2: f9b4 300c ldrsh.w r3, [r4, #12] 80080b6: b29a uxth r2, r3 80080b8: 0715 lsls r5, r2, #28 80080ba: d42c bmi.n 8008116 <__swsetup_r+0x82> 80080bc: 06d0 lsls r0, r2, #27 80080be: d411 bmi.n 80080e4 <__swsetup_r+0x50> 80080c0: 2209 movs r2, #9 80080c2: 6032 str r2, [r6, #0] 80080c4: f043 0340 orr.w r3, r3, #64 ; 0x40 80080c8: 81a3 strh r3, [r4, #12] 80080ca: f04f 30ff mov.w r0, #4294967295 80080ce: bd70 pop {r4, r5, r6, pc} 80080d0: 4b25 ldr r3, [pc, #148] ; (8008168 <__swsetup_r+0xd4>) 80080d2: 429c cmp r4, r3 80080d4: d101 bne.n 80080da <__swsetup_r+0x46> 80080d6: 68ac ldr r4, [r5, #8] 80080d8: e7eb b.n 80080b2 <__swsetup_r+0x1e> 80080da: 4b24 ldr r3, [pc, #144] ; (800816c <__swsetup_r+0xd8>) 80080dc: 429c cmp r4, r3 80080de: bf08 it eq 80080e0: 68ec ldreq r4, [r5, #12] 80080e2: e7e6 b.n 80080b2 <__swsetup_r+0x1e> 80080e4: 0751 lsls r1, r2, #29 80080e6: d512 bpl.n 800810e <__swsetup_r+0x7a> 80080e8: 6b61 ldr r1, [r4, #52] ; 0x34 80080ea: b141 cbz r1, 80080fe <__swsetup_r+0x6a> 80080ec: f104 0344 add.w r3, r4, #68 ; 0x44 80080f0: 4299 cmp r1, r3 80080f2: d002 beq.n 80080fa <__swsetup_r+0x66> 80080f4: 4630 mov r0, r6 80080f6: f000 fa23 bl 8008540 <_free_r> 80080fa: 2300 movs r3, #0 80080fc: 6363 str r3, [r4, #52] ; 0x34 80080fe: 89a3 ldrh r3, [r4, #12] 8008100: f023 0324 bic.w r3, r3, #36 ; 0x24 8008104: 81a3 strh r3, [r4, #12] 8008106: 2300 movs r3, #0 8008108: 6063 str r3, [r4, #4] 800810a: 6923 ldr r3, [r4, #16] 800810c: 6023 str r3, [r4, #0] 800810e: 89a3 ldrh r3, [r4, #12] 8008110: f043 0308 orr.w r3, r3, #8 8008114: 81a3 strh r3, [r4, #12] 8008116: 6923 ldr r3, [r4, #16] 8008118: b94b cbnz r3, 800812e <__swsetup_r+0x9a> 800811a: 89a3 ldrh r3, [r4, #12] 800811c: f403 7320 and.w r3, r3, #640 ; 0x280 8008120: f5b3 7f00 cmp.w r3, #512 ; 0x200 8008124: d003 beq.n 800812e <__swsetup_r+0x9a> 8008126: 4621 mov r1, r4 8008128: 4630 mov r0, r6 800812a: f000 f9c1 bl 80084b0 <__smakebuf_r> 800812e: 89a2 ldrh r2, [r4, #12] 8008130: f012 0301 ands.w r3, r2, #1 8008134: d00c beq.n 8008150 <__swsetup_r+0xbc> 8008136: 2300 movs r3, #0 8008138: 60a3 str r3, [r4, #8] 800813a: 6963 ldr r3, [r4, #20] 800813c: 425b negs r3, r3 800813e: 61a3 str r3, [r4, #24] 8008140: 6923 ldr r3, [r4, #16] 8008142: b953 cbnz r3, 800815a <__swsetup_r+0xc6> 8008144: f9b4 300c ldrsh.w r3, [r4, #12] 8008148: f013 0080 ands.w r0, r3, #128 ; 0x80 800814c: d1ba bne.n 80080c4 <__swsetup_r+0x30> 800814e: bd70 pop {r4, r5, r6, pc} 8008150: 0792 lsls r2, r2, #30 8008152: bf58 it pl 8008154: 6963 ldrpl r3, [r4, #20] 8008156: 60a3 str r3, [r4, #8] 8008158: e7f2 b.n 8008140 <__swsetup_r+0xac> 800815a: 2000 movs r0, #0 800815c: e7f7 b.n 800814e <__swsetup_r+0xba> 800815e: bf00 nop 8008160: 20000014 .word 0x20000014 8008164: 080090fc .word 0x080090fc 8008168: 0800911c .word 0x0800911c 800816c: 080090dc .word 0x080090dc 08008170 <__sflush_r>: 8008170: 898a ldrh r2, [r1, #12] 8008172: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8008176: 4605 mov r5, r0 8008178: 0710 lsls r0, r2, #28 800817a: 460c mov r4, r1 800817c: d45a bmi.n 8008234 <__sflush_r+0xc4> 800817e: 684b ldr r3, [r1, #4] 8008180: 2b00 cmp r3, #0 8008182: dc05 bgt.n 8008190 <__sflush_r+0x20> 8008184: 6c0b ldr r3, [r1, #64] ; 0x40 8008186: 2b00 cmp r3, #0 8008188: dc02 bgt.n 8008190 <__sflush_r+0x20> 800818a: 2000 movs r0, #0 800818c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8008190: 6ae6 ldr r6, [r4, #44] ; 0x2c 8008192: 2e00 cmp r6, #0 8008194: d0f9 beq.n 800818a <__sflush_r+0x1a> 8008196: 2300 movs r3, #0 8008198: f412 5280 ands.w r2, r2, #4096 ; 0x1000 800819c: 682f ldr r7, [r5, #0] 800819e: 602b str r3, [r5, #0] 80081a0: d033 beq.n 800820a <__sflush_r+0x9a> 80081a2: 6d60 ldr r0, [r4, #84] ; 0x54 80081a4: 89a3 ldrh r3, [r4, #12] 80081a6: 075a lsls r2, r3, #29 80081a8: d505 bpl.n 80081b6 <__sflush_r+0x46> 80081aa: 6863 ldr r3, [r4, #4] 80081ac: 1ac0 subs r0, r0, r3 80081ae: 6b63 ldr r3, [r4, #52] ; 0x34 80081b0: b10b cbz r3, 80081b6 <__sflush_r+0x46> 80081b2: 6c23 ldr r3, [r4, #64] ; 0x40 80081b4: 1ac0 subs r0, r0, r3 80081b6: 2300 movs r3, #0 80081b8: 4602 mov r2, r0 80081ba: 6ae6 ldr r6, [r4, #44] ; 0x2c 80081bc: 6a21 ldr r1, [r4, #32] 80081be: 4628 mov r0, r5 80081c0: 47b0 blx r6 80081c2: 1c43 adds r3, r0, #1 80081c4: 89a3 ldrh r3, [r4, #12] 80081c6: d106 bne.n 80081d6 <__sflush_r+0x66> 80081c8: 6829 ldr r1, [r5, #0] 80081ca: 291d cmp r1, #29 80081cc: d84b bhi.n 8008266 <__sflush_r+0xf6> 80081ce: 4a2b ldr r2, [pc, #172] ; (800827c <__sflush_r+0x10c>) 80081d0: 40ca lsrs r2, r1 80081d2: 07d6 lsls r6, r2, #31 80081d4: d547 bpl.n 8008266 <__sflush_r+0xf6> 80081d6: 2200 movs r2, #0 80081d8: 6062 str r2, [r4, #4] 80081da: 6922 ldr r2, [r4, #16] 80081dc: 04d9 lsls r1, r3, #19 80081de: 6022 str r2, [r4, #0] 80081e0: d504 bpl.n 80081ec <__sflush_r+0x7c> 80081e2: 1c42 adds r2, r0, #1 80081e4: d101 bne.n 80081ea <__sflush_r+0x7a> 80081e6: 682b ldr r3, [r5, #0] 80081e8: b903 cbnz r3, 80081ec <__sflush_r+0x7c> 80081ea: 6560 str r0, [r4, #84] ; 0x54 80081ec: 6b61 ldr r1, [r4, #52] ; 0x34 80081ee: 602f str r7, [r5, #0] 80081f0: 2900 cmp r1, #0 80081f2: d0ca beq.n 800818a <__sflush_r+0x1a> 80081f4: f104 0344 add.w r3, r4, #68 ; 0x44 80081f8: 4299 cmp r1, r3 80081fa: d002 beq.n 8008202 <__sflush_r+0x92> 80081fc: 4628 mov r0, r5 80081fe: f000 f99f bl 8008540 <_free_r> 8008202: 2000 movs r0, #0 8008204: 6360 str r0, [r4, #52] ; 0x34 8008206: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800820a: 6a21 ldr r1, [r4, #32] 800820c: 2301 movs r3, #1 800820e: 4628 mov r0, r5 8008210: 47b0 blx r6 8008212: 1c41 adds r1, r0, #1 8008214: d1c6 bne.n 80081a4 <__sflush_r+0x34> 8008216: 682b ldr r3, [r5, #0] 8008218: 2b00 cmp r3, #0 800821a: d0c3 beq.n 80081a4 <__sflush_r+0x34> 800821c: 2b1d cmp r3, #29 800821e: d001 beq.n 8008224 <__sflush_r+0xb4> 8008220: 2b16 cmp r3, #22 8008222: d101 bne.n 8008228 <__sflush_r+0xb8> 8008224: 602f str r7, [r5, #0] 8008226: e7b0 b.n 800818a <__sflush_r+0x1a> 8008228: 89a3 ldrh r3, [r4, #12] 800822a: f043 0340 orr.w r3, r3, #64 ; 0x40 800822e: 81a3 strh r3, [r4, #12] 8008230: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8008234: 690f ldr r7, [r1, #16] 8008236: 2f00 cmp r7, #0 8008238: d0a7 beq.n 800818a <__sflush_r+0x1a> 800823a: 0793 lsls r3, r2, #30 800823c: bf18 it ne 800823e: 2300 movne r3, #0 8008240: 680e ldr r6, [r1, #0] 8008242: bf08 it eq 8008244: 694b ldreq r3, [r1, #20] 8008246: eba6 0807 sub.w r8, r6, r7 800824a: 600f str r7, [r1, #0] 800824c: 608b str r3, [r1, #8] 800824e: f1b8 0f00 cmp.w r8, #0 8008252: dd9a ble.n 800818a <__sflush_r+0x1a> 8008254: 4643 mov r3, r8 8008256: 463a mov r2, r7 8008258: 6a21 ldr r1, [r4, #32] 800825a: 4628 mov r0, r5 800825c: 6aa6 ldr r6, [r4, #40] ; 0x28 800825e: 47b0 blx r6 8008260: 2800 cmp r0, #0 8008262: dc07 bgt.n 8008274 <__sflush_r+0x104> 8008264: 89a3 ldrh r3, [r4, #12] 8008266: f043 0340 orr.w r3, r3, #64 ; 0x40 800826a: 81a3 strh r3, [r4, #12] 800826c: f04f 30ff mov.w r0, #4294967295 8008270: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8008274: 4407 add r7, r0 8008276: eba8 0800 sub.w r8, r8, r0 800827a: e7e8 b.n 800824e <__sflush_r+0xde> 800827c: 20400001 .word 0x20400001 08008280 <_fflush_r>: 8008280: b538 push {r3, r4, r5, lr} 8008282: 690b ldr r3, [r1, #16] 8008284: 4605 mov r5, r0 8008286: 460c mov r4, r1 8008288: b1db cbz r3, 80082c2 <_fflush_r+0x42> 800828a: b118 cbz r0, 8008294 <_fflush_r+0x14> 800828c: 6983 ldr r3, [r0, #24] 800828e: b90b cbnz r3, 8008294 <_fflush_r+0x14> 8008290: f000 f860 bl 8008354 <__sinit> 8008294: 4b0c ldr r3, [pc, #48] ; (80082c8 <_fflush_r+0x48>) 8008296: 429c cmp r4, r3 8008298: d109 bne.n 80082ae <_fflush_r+0x2e> 800829a: 686c ldr r4, [r5, #4] 800829c: f9b4 300c ldrsh.w r3, [r4, #12] 80082a0: b17b cbz r3, 80082c2 <_fflush_r+0x42> 80082a2: 4621 mov r1, r4 80082a4: 4628 mov r0, r5 80082a6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80082aa: f7ff bf61 b.w 8008170 <__sflush_r> 80082ae: 4b07 ldr r3, [pc, #28] ; (80082cc <_fflush_r+0x4c>) 80082b0: 429c cmp r4, r3 80082b2: d101 bne.n 80082b8 <_fflush_r+0x38> 80082b4: 68ac ldr r4, [r5, #8] 80082b6: e7f1 b.n 800829c <_fflush_r+0x1c> 80082b8: 4b05 ldr r3, [pc, #20] ; (80082d0 <_fflush_r+0x50>) 80082ba: 429c cmp r4, r3 80082bc: bf08 it eq 80082be: 68ec ldreq r4, [r5, #12] 80082c0: e7ec b.n 800829c <_fflush_r+0x1c> 80082c2: 2000 movs r0, #0 80082c4: bd38 pop {r3, r4, r5, pc} 80082c6: bf00 nop 80082c8: 080090fc .word 0x080090fc 80082cc: 0800911c .word 0x0800911c 80082d0: 080090dc .word 0x080090dc 080082d4 <_cleanup_r>: 80082d4: 4901 ldr r1, [pc, #4] ; (80082dc <_cleanup_r+0x8>) 80082d6: f000 b8a9 b.w 800842c <_fwalk_reent> 80082da: bf00 nop 80082dc: 08008281 .word 0x08008281 080082e0 : 80082e0: 2300 movs r3, #0 80082e2: b510 push {r4, lr} 80082e4: 4604 mov r4, r0 80082e6: 6003 str r3, [r0, #0] 80082e8: 6043 str r3, [r0, #4] 80082ea: 6083 str r3, [r0, #8] 80082ec: 8181 strh r1, [r0, #12] 80082ee: 6643 str r3, [r0, #100] ; 0x64 80082f0: 81c2 strh r2, [r0, #14] 80082f2: 6103 str r3, [r0, #16] 80082f4: 6143 str r3, [r0, #20] 80082f6: 6183 str r3, [r0, #24] 80082f8: 4619 mov r1, r3 80082fa: 2208 movs r2, #8 80082fc: 305c adds r0, #92 ; 0x5c 80082fe: f7ff fd3c bl 8007d7a 8008302: 4b05 ldr r3, [pc, #20] ; (8008318 ) 8008304: 6224 str r4, [r4, #32] 8008306: 6263 str r3, [r4, #36] ; 0x24 8008308: 4b04 ldr r3, [pc, #16] ; (800831c ) 800830a: 62a3 str r3, [r4, #40] ; 0x28 800830c: 4b04 ldr r3, [pc, #16] ; (8008320 ) 800830e: 62e3 str r3, [r4, #44] ; 0x2c 8008310: 4b04 ldr r3, [pc, #16] ; (8008324 ) 8008312: 6323 str r3, [r4, #48] ; 0x30 8008314: bd10 pop {r4, pc} 8008316: bf00 nop 8008318: 08008c61 .word 0x08008c61 800831c: 08008c83 .word 0x08008c83 8008320: 08008cbb .word 0x08008cbb 8008324: 08008cdf .word 0x08008cdf 08008328 <__sfmoreglue>: 8008328: b570 push {r4, r5, r6, lr} 800832a: 2568 movs r5, #104 ; 0x68 800832c: 1e4a subs r2, r1, #1 800832e: 4355 muls r5, r2 8008330: 460e mov r6, r1 8008332: f105 0174 add.w r1, r5, #116 ; 0x74 8008336: f000 f94f bl 80085d8 <_malloc_r> 800833a: 4604 mov r4, r0 800833c: b140 cbz r0, 8008350 <__sfmoreglue+0x28> 800833e: 2100 movs r1, #0 8008340: e880 0042 stmia.w r0, {r1, r6} 8008344: 300c adds r0, #12 8008346: 60a0 str r0, [r4, #8] 8008348: f105 0268 add.w r2, r5, #104 ; 0x68 800834c: f7ff fd15 bl 8007d7a 8008350: 4620 mov r0, r4 8008352: bd70 pop {r4, r5, r6, pc} 08008354 <__sinit>: 8008354: 6983 ldr r3, [r0, #24] 8008356: b510 push {r4, lr} 8008358: 4604 mov r4, r0 800835a: bb33 cbnz r3, 80083aa <__sinit+0x56> 800835c: 6483 str r3, [r0, #72] ; 0x48 800835e: 64c3 str r3, [r0, #76] ; 0x4c 8008360: 6503 str r3, [r0, #80] ; 0x50 8008362: 4b12 ldr r3, [pc, #72] ; (80083ac <__sinit+0x58>) 8008364: 4a12 ldr r2, [pc, #72] ; (80083b0 <__sinit+0x5c>) 8008366: 681b ldr r3, [r3, #0] 8008368: 6282 str r2, [r0, #40] ; 0x28 800836a: 4298 cmp r0, r3 800836c: bf04 itt eq 800836e: 2301 moveq r3, #1 8008370: 6183 streq r3, [r0, #24] 8008372: f000 f81f bl 80083b4 <__sfp> 8008376: 6060 str r0, [r4, #4] 8008378: 4620 mov r0, r4 800837a: f000 f81b bl 80083b4 <__sfp> 800837e: 60a0 str r0, [r4, #8] 8008380: 4620 mov r0, r4 8008382: f000 f817 bl 80083b4 <__sfp> 8008386: 2200 movs r2, #0 8008388: 60e0 str r0, [r4, #12] 800838a: 2104 movs r1, #4 800838c: 6860 ldr r0, [r4, #4] 800838e: f7ff ffa7 bl 80082e0 8008392: 2201 movs r2, #1 8008394: 2109 movs r1, #9 8008396: 68a0 ldr r0, [r4, #8] 8008398: f7ff ffa2 bl 80082e0 800839c: 2202 movs r2, #2 800839e: 2112 movs r1, #18 80083a0: 68e0 ldr r0, [r4, #12] 80083a2: f7ff ff9d bl 80082e0 80083a6: 2301 movs r3, #1 80083a8: 61a3 str r3, [r4, #24] 80083aa: bd10 pop {r4, pc} 80083ac: 080090d8 .word 0x080090d8 80083b0: 080082d5 .word 0x080082d5 080083b4 <__sfp>: 80083b4: b5f8 push {r3, r4, r5, r6, r7, lr} 80083b6: 4b1c ldr r3, [pc, #112] ; (8008428 <__sfp+0x74>) 80083b8: 4607 mov r7, r0 80083ba: 681e ldr r6, [r3, #0] 80083bc: 69b3 ldr r3, [r6, #24] 80083be: b913 cbnz r3, 80083c6 <__sfp+0x12> 80083c0: 4630 mov r0, r6 80083c2: f7ff ffc7 bl 8008354 <__sinit> 80083c6: 3648 adds r6, #72 ; 0x48 80083c8: 68b4 ldr r4, [r6, #8] 80083ca: 6873 ldr r3, [r6, #4] 80083cc: 3b01 subs r3, #1 80083ce: d503 bpl.n 80083d8 <__sfp+0x24> 80083d0: 6833 ldr r3, [r6, #0] 80083d2: b133 cbz r3, 80083e2 <__sfp+0x2e> 80083d4: 6836 ldr r6, [r6, #0] 80083d6: e7f7 b.n 80083c8 <__sfp+0x14> 80083d8: f9b4 500c ldrsh.w r5, [r4, #12] 80083dc: b16d cbz r5, 80083fa <__sfp+0x46> 80083de: 3468 adds r4, #104 ; 0x68 80083e0: e7f4 b.n 80083cc <__sfp+0x18> 80083e2: 2104 movs r1, #4 80083e4: 4638 mov r0, r7 80083e6: f7ff ff9f bl 8008328 <__sfmoreglue> 80083ea: 6030 str r0, [r6, #0] 80083ec: 2800 cmp r0, #0 80083ee: d1f1 bne.n 80083d4 <__sfp+0x20> 80083f0: 230c movs r3, #12 80083f2: 4604 mov r4, r0 80083f4: 603b str r3, [r7, #0] 80083f6: 4620 mov r0, r4 80083f8: bdf8 pop {r3, r4, r5, r6, r7, pc} 80083fa: f64f 73ff movw r3, #65535 ; 0xffff 80083fe: 81e3 strh r3, [r4, #14] 8008400: 2301 movs r3, #1 8008402: 6665 str r5, [r4, #100] ; 0x64 8008404: 81a3 strh r3, [r4, #12] 8008406: 6025 str r5, [r4, #0] 8008408: 60a5 str r5, [r4, #8] 800840a: 6065 str r5, [r4, #4] 800840c: 6125 str r5, [r4, #16] 800840e: 6165 str r5, [r4, #20] 8008410: 61a5 str r5, [r4, #24] 8008412: 2208 movs r2, #8 8008414: 4629 mov r1, r5 8008416: f104 005c add.w r0, r4, #92 ; 0x5c 800841a: f7ff fcae bl 8007d7a 800841e: 6365 str r5, [r4, #52] ; 0x34 8008420: 63a5 str r5, [r4, #56] ; 0x38 8008422: 64a5 str r5, [r4, #72] ; 0x48 8008424: 64e5 str r5, [r4, #76] ; 0x4c 8008426: e7e6 b.n 80083f6 <__sfp+0x42> 8008428: 080090d8 .word 0x080090d8 0800842c <_fwalk_reent>: 800842c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8008430: 4680 mov r8, r0 8008432: 4689 mov r9, r1 8008434: 2600 movs r6, #0 8008436: f100 0448 add.w r4, r0, #72 ; 0x48 800843a: b914 cbnz r4, 8008442 <_fwalk_reent+0x16> 800843c: 4630 mov r0, r6 800843e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8008442: 68a5 ldr r5, [r4, #8] 8008444: 6867 ldr r7, [r4, #4] 8008446: 3f01 subs r7, #1 8008448: d501 bpl.n 800844e <_fwalk_reent+0x22> 800844a: 6824 ldr r4, [r4, #0] 800844c: e7f5 b.n 800843a <_fwalk_reent+0xe> 800844e: 89ab ldrh r3, [r5, #12] 8008450: 2b01 cmp r3, #1 8008452: d907 bls.n 8008464 <_fwalk_reent+0x38> 8008454: f9b5 300e ldrsh.w r3, [r5, #14] 8008458: 3301 adds r3, #1 800845a: d003 beq.n 8008464 <_fwalk_reent+0x38> 800845c: 4629 mov r1, r5 800845e: 4640 mov r0, r8 8008460: 47c8 blx r9 8008462: 4306 orrs r6, r0 8008464: 3568 adds r5, #104 ; 0x68 8008466: e7ee b.n 8008446 <_fwalk_reent+0x1a> 08008468 <__swhatbuf_r>: 8008468: b570 push {r4, r5, r6, lr} 800846a: 460e mov r6, r1 800846c: f9b1 100e ldrsh.w r1, [r1, #14] 8008470: b090 sub sp, #64 ; 0x40 8008472: 2900 cmp r1, #0 8008474: 4614 mov r4, r2 8008476: 461d mov r5, r3 8008478: da07 bge.n 800848a <__swhatbuf_r+0x22> 800847a: 2300 movs r3, #0 800847c: 602b str r3, [r5, #0] 800847e: 89b3 ldrh r3, [r6, #12] 8008480: 061a lsls r2, r3, #24 8008482: d410 bmi.n 80084a6 <__swhatbuf_r+0x3e> 8008484: f44f 6380 mov.w r3, #1024 ; 0x400 8008488: e00e b.n 80084a8 <__swhatbuf_r+0x40> 800848a: aa01 add r2, sp, #4 800848c: f000 fc4e bl 8008d2c <_fstat_r> 8008490: 2800 cmp r0, #0 8008492: dbf2 blt.n 800847a <__swhatbuf_r+0x12> 8008494: 9a02 ldr r2, [sp, #8] 8008496: f402 4270 and.w r2, r2, #61440 ; 0xf000 800849a: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 800849e: 425a negs r2, r3 80084a0: 415a adcs r2, r3 80084a2: 602a str r2, [r5, #0] 80084a4: e7ee b.n 8008484 <__swhatbuf_r+0x1c> 80084a6: 2340 movs r3, #64 ; 0x40 80084a8: 2000 movs r0, #0 80084aa: 6023 str r3, [r4, #0] 80084ac: b010 add sp, #64 ; 0x40 80084ae: bd70 pop {r4, r5, r6, pc} 080084b0 <__smakebuf_r>: 80084b0: 898b ldrh r3, [r1, #12] 80084b2: b573 push {r0, r1, r4, r5, r6, lr} 80084b4: 079d lsls r5, r3, #30 80084b6: 4606 mov r6, r0 80084b8: 460c mov r4, r1 80084ba: d507 bpl.n 80084cc <__smakebuf_r+0x1c> 80084bc: f104 0347 add.w r3, r4, #71 ; 0x47 80084c0: 6023 str r3, [r4, #0] 80084c2: 6123 str r3, [r4, #16] 80084c4: 2301 movs r3, #1 80084c6: 6163 str r3, [r4, #20] 80084c8: b002 add sp, #8 80084ca: bd70 pop {r4, r5, r6, pc} 80084cc: ab01 add r3, sp, #4 80084ce: 466a mov r2, sp 80084d0: f7ff ffca bl 8008468 <__swhatbuf_r> 80084d4: 9900 ldr r1, [sp, #0] 80084d6: 4605 mov r5, r0 80084d8: 4630 mov r0, r6 80084da: f000 f87d bl 80085d8 <_malloc_r> 80084de: b948 cbnz r0, 80084f4 <__smakebuf_r+0x44> 80084e0: f9b4 300c ldrsh.w r3, [r4, #12] 80084e4: 059a lsls r2, r3, #22 80084e6: d4ef bmi.n 80084c8 <__smakebuf_r+0x18> 80084e8: f023 0303 bic.w r3, r3, #3 80084ec: f043 0302 orr.w r3, r3, #2 80084f0: 81a3 strh r3, [r4, #12] 80084f2: e7e3 b.n 80084bc <__smakebuf_r+0xc> 80084f4: 4b0d ldr r3, [pc, #52] ; (800852c <__smakebuf_r+0x7c>) 80084f6: 62b3 str r3, [r6, #40] ; 0x28 80084f8: 89a3 ldrh r3, [r4, #12] 80084fa: 6020 str r0, [r4, #0] 80084fc: f043 0380 orr.w r3, r3, #128 ; 0x80 8008500: 81a3 strh r3, [r4, #12] 8008502: 9b00 ldr r3, [sp, #0] 8008504: 6120 str r0, [r4, #16] 8008506: 6163 str r3, [r4, #20] 8008508: 9b01 ldr r3, [sp, #4] 800850a: b15b cbz r3, 8008524 <__smakebuf_r+0x74> 800850c: f9b4 100e ldrsh.w r1, [r4, #14] 8008510: 4630 mov r0, r6 8008512: f000 fc1d bl 8008d50 <_isatty_r> 8008516: b128 cbz r0, 8008524 <__smakebuf_r+0x74> 8008518: 89a3 ldrh r3, [r4, #12] 800851a: f023 0303 bic.w r3, r3, #3 800851e: f043 0301 orr.w r3, r3, #1 8008522: 81a3 strh r3, [r4, #12] 8008524: 89a3 ldrh r3, [r4, #12] 8008526: 431d orrs r5, r3 8008528: 81a5 strh r5, [r4, #12] 800852a: e7cd b.n 80084c8 <__smakebuf_r+0x18> 800852c: 080082d5 .word 0x080082d5 08008530 : 8008530: 4b02 ldr r3, [pc, #8] ; (800853c ) 8008532: 4601 mov r1, r0 8008534: 6818 ldr r0, [r3, #0] 8008536: f000 b84f b.w 80085d8 <_malloc_r> 800853a: bf00 nop 800853c: 20000014 .word 0x20000014 08008540 <_free_r>: 8008540: b538 push {r3, r4, r5, lr} 8008542: 4605 mov r5, r0 8008544: 2900 cmp r1, #0 8008546: d043 beq.n 80085d0 <_free_r+0x90> 8008548: f851 3c04 ldr.w r3, [r1, #-4] 800854c: 1f0c subs r4, r1, #4 800854e: 2b00 cmp r3, #0 8008550: bfb8 it lt 8008552: 18e4 addlt r4, r4, r3 8008554: f000 fc2c bl 8008db0 <__malloc_lock> 8008558: 4a1e ldr r2, [pc, #120] ; (80085d4 <_free_r+0x94>) 800855a: 6813 ldr r3, [r2, #0] 800855c: 4610 mov r0, r2 800855e: b933 cbnz r3, 800856e <_free_r+0x2e> 8008560: 6063 str r3, [r4, #4] 8008562: 6014 str r4, [r2, #0] 8008564: 4628 mov r0, r5 8008566: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800856a: f000 bc22 b.w 8008db2 <__malloc_unlock> 800856e: 42a3 cmp r3, r4 8008570: d90b bls.n 800858a <_free_r+0x4a> 8008572: 6821 ldr r1, [r4, #0] 8008574: 1862 adds r2, r4, r1 8008576: 4293 cmp r3, r2 8008578: bf01 itttt eq 800857a: 681a ldreq r2, [r3, #0] 800857c: 685b ldreq r3, [r3, #4] 800857e: 1852 addeq r2, r2, r1 8008580: 6022 streq r2, [r4, #0] 8008582: 6063 str r3, [r4, #4] 8008584: 6004 str r4, [r0, #0] 8008586: e7ed b.n 8008564 <_free_r+0x24> 8008588: 4613 mov r3, r2 800858a: 685a ldr r2, [r3, #4] 800858c: b10a cbz r2, 8008592 <_free_r+0x52> 800858e: 42a2 cmp r2, r4 8008590: d9fa bls.n 8008588 <_free_r+0x48> 8008592: 6819 ldr r1, [r3, #0] 8008594: 1858 adds r0, r3, r1 8008596: 42a0 cmp r0, r4 8008598: d10b bne.n 80085b2 <_free_r+0x72> 800859a: 6820 ldr r0, [r4, #0] 800859c: 4401 add r1, r0 800859e: 1858 adds r0, r3, r1 80085a0: 4282 cmp r2, r0 80085a2: 6019 str r1, [r3, #0] 80085a4: d1de bne.n 8008564 <_free_r+0x24> 80085a6: 6810 ldr r0, [r2, #0] 80085a8: 6852 ldr r2, [r2, #4] 80085aa: 4401 add r1, r0 80085ac: 6019 str r1, [r3, #0] 80085ae: 605a str r2, [r3, #4] 80085b0: e7d8 b.n 8008564 <_free_r+0x24> 80085b2: d902 bls.n 80085ba <_free_r+0x7a> 80085b4: 230c movs r3, #12 80085b6: 602b str r3, [r5, #0] 80085b8: e7d4 b.n 8008564 <_free_r+0x24> 80085ba: 6820 ldr r0, [r4, #0] 80085bc: 1821 adds r1, r4, r0 80085be: 428a cmp r2, r1 80085c0: bf01 itttt eq 80085c2: 6811 ldreq r1, [r2, #0] 80085c4: 6852 ldreq r2, [r2, #4] 80085c6: 1809 addeq r1, r1, r0 80085c8: 6021 streq r1, [r4, #0] 80085ca: 6062 str r2, [r4, #4] 80085cc: 605c str r4, [r3, #4] 80085ce: e7c9 b.n 8008564 <_free_r+0x24> 80085d0: bd38 pop {r3, r4, r5, pc} 80085d2: bf00 nop 80085d4: 200005a4 .word 0x200005a4 080085d8 <_malloc_r>: 80085d8: b570 push {r4, r5, r6, lr} 80085da: 1ccd adds r5, r1, #3 80085dc: f025 0503 bic.w r5, r5, #3 80085e0: 3508 adds r5, #8 80085e2: 2d0c cmp r5, #12 80085e4: bf38 it cc 80085e6: 250c movcc r5, #12 80085e8: 2d00 cmp r5, #0 80085ea: 4606 mov r6, r0 80085ec: db01 blt.n 80085f2 <_malloc_r+0x1a> 80085ee: 42a9 cmp r1, r5 80085f0: d903 bls.n 80085fa <_malloc_r+0x22> 80085f2: 230c movs r3, #12 80085f4: 6033 str r3, [r6, #0] 80085f6: 2000 movs r0, #0 80085f8: bd70 pop {r4, r5, r6, pc} 80085fa: f000 fbd9 bl 8008db0 <__malloc_lock> 80085fe: 4a23 ldr r2, [pc, #140] ; (800868c <_malloc_r+0xb4>) 8008600: 6814 ldr r4, [r2, #0] 8008602: 4621 mov r1, r4 8008604: b991 cbnz r1, 800862c <_malloc_r+0x54> 8008606: 4c22 ldr r4, [pc, #136] ; (8008690 <_malloc_r+0xb8>) 8008608: 6823 ldr r3, [r4, #0] 800860a: b91b cbnz r3, 8008614 <_malloc_r+0x3c> 800860c: 4630 mov r0, r6 800860e: f000 fb17 bl 8008c40 <_sbrk_r> 8008612: 6020 str r0, [r4, #0] 8008614: 4629 mov r1, r5 8008616: 4630 mov r0, r6 8008618: f000 fb12 bl 8008c40 <_sbrk_r> 800861c: 1c43 adds r3, r0, #1 800861e: d126 bne.n 800866e <_malloc_r+0x96> 8008620: 230c movs r3, #12 8008622: 4630 mov r0, r6 8008624: 6033 str r3, [r6, #0] 8008626: f000 fbc4 bl 8008db2 <__malloc_unlock> 800862a: e7e4 b.n 80085f6 <_malloc_r+0x1e> 800862c: 680b ldr r3, [r1, #0] 800862e: 1b5b subs r3, r3, r5 8008630: d41a bmi.n 8008668 <_malloc_r+0x90> 8008632: 2b0b cmp r3, #11 8008634: d90f bls.n 8008656 <_malloc_r+0x7e> 8008636: 600b str r3, [r1, #0] 8008638: 18cc adds r4, r1, r3 800863a: 50cd str r5, [r1, r3] 800863c: 4630 mov r0, r6 800863e: f000 fbb8 bl 8008db2 <__malloc_unlock> 8008642: f104 000b add.w r0, r4, #11 8008646: 1d23 adds r3, r4, #4 8008648: f020 0007 bic.w r0, r0, #7 800864c: 1ac3 subs r3, r0, r3 800864e: d01b beq.n 8008688 <_malloc_r+0xb0> 8008650: 425a negs r2, r3 8008652: 50e2 str r2, [r4, r3] 8008654: bd70 pop {r4, r5, r6, pc} 8008656: 428c cmp r4, r1 8008658: bf0b itete eq 800865a: 6863 ldreq r3, [r4, #4] 800865c: 684b ldrne r3, [r1, #4] 800865e: 6013 streq r3, [r2, #0] 8008660: 6063 strne r3, [r4, #4] 8008662: bf18 it ne 8008664: 460c movne r4, r1 8008666: e7e9 b.n 800863c <_malloc_r+0x64> 8008668: 460c mov r4, r1 800866a: 6849 ldr r1, [r1, #4] 800866c: e7ca b.n 8008604 <_malloc_r+0x2c> 800866e: 1cc4 adds r4, r0, #3 8008670: f024 0403 bic.w r4, r4, #3 8008674: 42a0 cmp r0, r4 8008676: d005 beq.n 8008684 <_malloc_r+0xac> 8008678: 1a21 subs r1, r4, r0 800867a: 4630 mov r0, r6 800867c: f000 fae0 bl 8008c40 <_sbrk_r> 8008680: 3001 adds r0, #1 8008682: d0cd beq.n 8008620 <_malloc_r+0x48> 8008684: 6025 str r5, [r4, #0] 8008686: e7d9 b.n 800863c <_malloc_r+0x64> 8008688: bd70 pop {r4, r5, r6, pc} 800868a: bf00 nop 800868c: 200005a4 .word 0x200005a4 8008690: 200005a8 .word 0x200005a8 08008694 <__sfputc_r>: 8008694: 6893 ldr r3, [r2, #8] 8008696: b410 push {r4} 8008698: 3b01 subs r3, #1 800869a: 2b00 cmp r3, #0 800869c: 6093 str r3, [r2, #8] 800869e: da08 bge.n 80086b2 <__sfputc_r+0x1e> 80086a0: 6994 ldr r4, [r2, #24] 80086a2: 42a3 cmp r3, r4 80086a4: db02 blt.n 80086ac <__sfputc_r+0x18> 80086a6: b2cb uxtb r3, r1 80086a8: 2b0a cmp r3, #10 80086aa: d102 bne.n 80086b2 <__sfputc_r+0x1e> 80086ac: bc10 pop {r4} 80086ae: f7ff bc9f b.w 8007ff0 <__swbuf_r> 80086b2: 6813 ldr r3, [r2, #0] 80086b4: 1c58 adds r0, r3, #1 80086b6: 6010 str r0, [r2, #0] 80086b8: 7019 strb r1, [r3, #0] 80086ba: b2c8 uxtb r0, r1 80086bc: bc10 pop {r4} 80086be: 4770 bx lr 080086c0 <__sfputs_r>: 80086c0: b5f8 push {r3, r4, r5, r6, r7, lr} 80086c2: 4606 mov r6, r0 80086c4: 460f mov r7, r1 80086c6: 4614 mov r4, r2 80086c8: 18d5 adds r5, r2, r3 80086ca: 42ac cmp r4, r5 80086cc: d101 bne.n 80086d2 <__sfputs_r+0x12> 80086ce: 2000 movs r0, #0 80086d0: e007 b.n 80086e2 <__sfputs_r+0x22> 80086d2: 463a mov r2, r7 80086d4: f814 1b01 ldrb.w r1, [r4], #1 80086d8: 4630 mov r0, r6 80086da: f7ff ffdb bl 8008694 <__sfputc_r> 80086de: 1c43 adds r3, r0, #1 80086e0: d1f3 bne.n 80086ca <__sfputs_r+0xa> 80086e2: bdf8 pop {r3, r4, r5, r6, r7, pc} 080086e4 <_vfiprintf_r>: 80086e4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80086e8: b09d sub sp, #116 ; 0x74 80086ea: 460c mov r4, r1 80086ec: 4617 mov r7, r2 80086ee: 9303 str r3, [sp, #12] 80086f0: 4606 mov r6, r0 80086f2: b118 cbz r0, 80086fc <_vfiprintf_r+0x18> 80086f4: 6983 ldr r3, [r0, #24] 80086f6: b90b cbnz r3, 80086fc <_vfiprintf_r+0x18> 80086f8: f7ff fe2c bl 8008354 <__sinit> 80086fc: 4b7c ldr r3, [pc, #496] ; (80088f0 <_vfiprintf_r+0x20c>) 80086fe: 429c cmp r4, r3 8008700: d157 bne.n 80087b2 <_vfiprintf_r+0xce> 8008702: 6874 ldr r4, [r6, #4] 8008704: 89a3 ldrh r3, [r4, #12] 8008706: 0718 lsls r0, r3, #28 8008708: d55d bpl.n 80087c6 <_vfiprintf_r+0xe2> 800870a: 6923 ldr r3, [r4, #16] 800870c: 2b00 cmp r3, #0 800870e: d05a beq.n 80087c6 <_vfiprintf_r+0xe2> 8008710: 2300 movs r3, #0 8008712: 9309 str r3, [sp, #36] ; 0x24 8008714: 2320 movs r3, #32 8008716: f88d 3029 strb.w r3, [sp, #41] ; 0x29 800871a: 2330 movs r3, #48 ; 0x30 800871c: f04f 0b01 mov.w fp, #1 8008720: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8008724: 46b8 mov r8, r7 8008726: 4645 mov r5, r8 8008728: f815 3b01 ldrb.w r3, [r5], #1 800872c: 2b00 cmp r3, #0 800872e: d155 bne.n 80087dc <_vfiprintf_r+0xf8> 8008730: ebb8 0a07 subs.w sl, r8, r7 8008734: d00b beq.n 800874e <_vfiprintf_r+0x6a> 8008736: 4653 mov r3, sl 8008738: 463a mov r2, r7 800873a: 4621 mov r1, r4 800873c: 4630 mov r0, r6 800873e: f7ff ffbf bl 80086c0 <__sfputs_r> 8008742: 3001 adds r0, #1 8008744: f000 80c4 beq.w 80088d0 <_vfiprintf_r+0x1ec> 8008748: 9b09 ldr r3, [sp, #36] ; 0x24 800874a: 4453 add r3, sl 800874c: 9309 str r3, [sp, #36] ; 0x24 800874e: f898 3000 ldrb.w r3, [r8] 8008752: 2b00 cmp r3, #0 8008754: f000 80bc beq.w 80088d0 <_vfiprintf_r+0x1ec> 8008758: 2300 movs r3, #0 800875a: f04f 32ff mov.w r2, #4294967295 800875e: 9304 str r3, [sp, #16] 8008760: 9307 str r3, [sp, #28] 8008762: 9205 str r2, [sp, #20] 8008764: 9306 str r3, [sp, #24] 8008766: f88d 3053 strb.w r3, [sp, #83] ; 0x53 800876a: 931a str r3, [sp, #104] ; 0x68 800876c: 2205 movs r2, #5 800876e: 7829 ldrb r1, [r5, #0] 8008770: 4860 ldr r0, [pc, #384] ; (80088f4 <_vfiprintf_r+0x210>) 8008772: f000 fb0f bl 8008d94 8008776: f105 0801 add.w r8, r5, #1 800877a: 9b04 ldr r3, [sp, #16] 800877c: 2800 cmp r0, #0 800877e: d131 bne.n 80087e4 <_vfiprintf_r+0x100> 8008780: 06d9 lsls r1, r3, #27 8008782: bf44 itt mi 8008784: 2220 movmi r2, #32 8008786: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800878a: 071a lsls r2, r3, #28 800878c: bf44 itt mi 800878e: 222b movmi r2, #43 ; 0x2b 8008790: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8008794: 782a ldrb r2, [r5, #0] 8008796: 2a2a cmp r2, #42 ; 0x2a 8008798: d02c beq.n 80087f4 <_vfiprintf_r+0x110> 800879a: 2100 movs r1, #0 800879c: 200a movs r0, #10 800879e: 9a07 ldr r2, [sp, #28] 80087a0: 46a8 mov r8, r5 80087a2: f898 3000 ldrb.w r3, [r8] 80087a6: 3501 adds r5, #1 80087a8: 3b30 subs r3, #48 ; 0x30 80087aa: 2b09 cmp r3, #9 80087ac: d96d bls.n 800888a <_vfiprintf_r+0x1a6> 80087ae: b371 cbz r1, 800880e <_vfiprintf_r+0x12a> 80087b0: e026 b.n 8008800 <_vfiprintf_r+0x11c> 80087b2: 4b51 ldr r3, [pc, #324] ; (80088f8 <_vfiprintf_r+0x214>) 80087b4: 429c cmp r4, r3 80087b6: d101 bne.n 80087bc <_vfiprintf_r+0xd8> 80087b8: 68b4 ldr r4, [r6, #8] 80087ba: e7a3 b.n 8008704 <_vfiprintf_r+0x20> 80087bc: 4b4f ldr r3, [pc, #316] ; (80088fc <_vfiprintf_r+0x218>) 80087be: 429c cmp r4, r3 80087c0: bf08 it eq 80087c2: 68f4 ldreq r4, [r6, #12] 80087c4: e79e b.n 8008704 <_vfiprintf_r+0x20> 80087c6: 4621 mov r1, r4 80087c8: 4630 mov r0, r6 80087ca: f7ff fc63 bl 8008094 <__swsetup_r> 80087ce: 2800 cmp r0, #0 80087d0: d09e beq.n 8008710 <_vfiprintf_r+0x2c> 80087d2: f04f 30ff mov.w r0, #4294967295 80087d6: b01d add sp, #116 ; 0x74 80087d8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80087dc: 2b25 cmp r3, #37 ; 0x25 80087de: d0a7 beq.n 8008730 <_vfiprintf_r+0x4c> 80087e0: 46a8 mov r8, r5 80087e2: e7a0 b.n 8008726 <_vfiprintf_r+0x42> 80087e4: 4a43 ldr r2, [pc, #268] ; (80088f4 <_vfiprintf_r+0x210>) 80087e6: 4645 mov r5, r8 80087e8: 1a80 subs r0, r0, r2 80087ea: fa0b f000 lsl.w r0, fp, r0 80087ee: 4318 orrs r0, r3 80087f0: 9004 str r0, [sp, #16] 80087f2: e7bb b.n 800876c <_vfiprintf_r+0x88> 80087f4: 9a03 ldr r2, [sp, #12] 80087f6: 1d11 adds r1, r2, #4 80087f8: 6812 ldr r2, [r2, #0] 80087fa: 9103 str r1, [sp, #12] 80087fc: 2a00 cmp r2, #0 80087fe: db01 blt.n 8008804 <_vfiprintf_r+0x120> 8008800: 9207 str r2, [sp, #28] 8008802: e004 b.n 800880e <_vfiprintf_r+0x12a> 8008804: 4252 negs r2, r2 8008806: f043 0302 orr.w r3, r3, #2 800880a: 9207 str r2, [sp, #28] 800880c: 9304 str r3, [sp, #16] 800880e: f898 3000 ldrb.w r3, [r8] 8008812: 2b2e cmp r3, #46 ; 0x2e 8008814: d110 bne.n 8008838 <_vfiprintf_r+0x154> 8008816: f898 3001 ldrb.w r3, [r8, #1] 800881a: f108 0101 add.w r1, r8, #1 800881e: 2b2a cmp r3, #42 ; 0x2a 8008820: d137 bne.n 8008892 <_vfiprintf_r+0x1ae> 8008822: 9b03 ldr r3, [sp, #12] 8008824: f108 0802 add.w r8, r8, #2 8008828: 1d1a adds r2, r3, #4 800882a: 681b ldr r3, [r3, #0] 800882c: 9203 str r2, [sp, #12] 800882e: 2b00 cmp r3, #0 8008830: bfb8 it lt 8008832: f04f 33ff movlt.w r3, #4294967295 8008836: 9305 str r3, [sp, #20] 8008838: 4d31 ldr r5, [pc, #196] ; (8008900 <_vfiprintf_r+0x21c>) 800883a: 2203 movs r2, #3 800883c: f898 1000 ldrb.w r1, [r8] 8008840: 4628 mov r0, r5 8008842: f000 faa7 bl 8008d94 8008846: b140 cbz r0, 800885a <_vfiprintf_r+0x176> 8008848: 2340 movs r3, #64 ; 0x40 800884a: 1b40 subs r0, r0, r5 800884c: fa03 f000 lsl.w r0, r3, r0 8008850: 9b04 ldr r3, [sp, #16] 8008852: f108 0801 add.w r8, r8, #1 8008856: 4303 orrs r3, r0 8008858: 9304 str r3, [sp, #16] 800885a: f898 1000 ldrb.w r1, [r8] 800885e: 2206 movs r2, #6 8008860: 4828 ldr r0, [pc, #160] ; (8008904 <_vfiprintf_r+0x220>) 8008862: f108 0701 add.w r7, r8, #1 8008866: f88d 1028 strb.w r1, [sp, #40] ; 0x28 800886a: f000 fa93 bl 8008d94 800886e: 2800 cmp r0, #0 8008870: d034 beq.n 80088dc <_vfiprintf_r+0x1f8> 8008872: 4b25 ldr r3, [pc, #148] ; (8008908 <_vfiprintf_r+0x224>) 8008874: bb03 cbnz r3, 80088b8 <_vfiprintf_r+0x1d4> 8008876: 9b03 ldr r3, [sp, #12] 8008878: 3307 adds r3, #7 800887a: f023 0307 bic.w r3, r3, #7 800887e: 3308 adds r3, #8 8008880: 9303 str r3, [sp, #12] 8008882: 9b09 ldr r3, [sp, #36] ; 0x24 8008884: 444b add r3, r9 8008886: 9309 str r3, [sp, #36] ; 0x24 8008888: e74c b.n 8008724 <_vfiprintf_r+0x40> 800888a: fb00 3202 mla r2, r0, r2, r3 800888e: 2101 movs r1, #1 8008890: e786 b.n 80087a0 <_vfiprintf_r+0xbc> 8008892: 2300 movs r3, #0 8008894: 250a movs r5, #10 8008896: 4618 mov r0, r3 8008898: 9305 str r3, [sp, #20] 800889a: 4688 mov r8, r1 800889c: f898 2000 ldrb.w r2, [r8] 80088a0: 3101 adds r1, #1 80088a2: 3a30 subs r2, #48 ; 0x30 80088a4: 2a09 cmp r2, #9 80088a6: d903 bls.n 80088b0 <_vfiprintf_r+0x1cc> 80088a8: 2b00 cmp r3, #0 80088aa: d0c5 beq.n 8008838 <_vfiprintf_r+0x154> 80088ac: 9005 str r0, [sp, #20] 80088ae: e7c3 b.n 8008838 <_vfiprintf_r+0x154> 80088b0: fb05 2000 mla r0, r5, r0, r2 80088b4: 2301 movs r3, #1 80088b6: e7f0 b.n 800889a <_vfiprintf_r+0x1b6> 80088b8: ab03 add r3, sp, #12 80088ba: 9300 str r3, [sp, #0] 80088bc: 4622 mov r2, r4 80088be: 4b13 ldr r3, [pc, #76] ; (800890c <_vfiprintf_r+0x228>) 80088c0: a904 add r1, sp, #16 80088c2: 4630 mov r0, r6 80088c4: f3af 8000 nop.w 80088c8: f1b0 3fff cmp.w r0, #4294967295 80088cc: 4681 mov r9, r0 80088ce: d1d8 bne.n 8008882 <_vfiprintf_r+0x19e> 80088d0: 89a3 ldrh r3, [r4, #12] 80088d2: 065b lsls r3, r3, #25 80088d4: f53f af7d bmi.w 80087d2 <_vfiprintf_r+0xee> 80088d8: 9809 ldr r0, [sp, #36] ; 0x24 80088da: e77c b.n 80087d6 <_vfiprintf_r+0xf2> 80088dc: ab03 add r3, sp, #12 80088de: 9300 str r3, [sp, #0] 80088e0: 4622 mov r2, r4 80088e2: 4b0a ldr r3, [pc, #40] ; (800890c <_vfiprintf_r+0x228>) 80088e4: a904 add r1, sp, #16 80088e6: 4630 mov r0, r6 80088e8: f000 f88a bl 8008a00 <_printf_i> 80088ec: e7ec b.n 80088c8 <_vfiprintf_r+0x1e4> 80088ee: bf00 nop 80088f0: 080090fc .word 0x080090fc 80088f4: 0800913c .word 0x0800913c 80088f8: 0800911c .word 0x0800911c 80088fc: 080090dc .word 0x080090dc 8008900: 08009142 .word 0x08009142 8008904: 08009146 .word 0x08009146 8008908: 00000000 .word 0x00000000 800890c: 080086c1 .word 0x080086c1 08008910 <_printf_common>: 8008910: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8008914: 4691 mov r9, r2 8008916: 461f mov r7, r3 8008918: 688a ldr r2, [r1, #8] 800891a: 690b ldr r3, [r1, #16] 800891c: 4606 mov r6, r0 800891e: 4293 cmp r3, r2 8008920: bfb8 it lt 8008922: 4613 movlt r3, r2 8008924: f8c9 3000 str.w r3, [r9] 8008928: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 800892c: 460c mov r4, r1 800892e: f8dd 8020 ldr.w r8, [sp, #32] 8008932: b112 cbz r2, 800893a <_printf_common+0x2a> 8008934: 3301 adds r3, #1 8008936: f8c9 3000 str.w r3, [r9] 800893a: 6823 ldr r3, [r4, #0] 800893c: 0699 lsls r1, r3, #26 800893e: bf42 ittt mi 8008940: f8d9 3000 ldrmi.w r3, [r9] 8008944: 3302 addmi r3, #2 8008946: f8c9 3000 strmi.w r3, [r9] 800894a: 6825 ldr r5, [r4, #0] 800894c: f015 0506 ands.w r5, r5, #6 8008950: d107 bne.n 8008962 <_printf_common+0x52> 8008952: f104 0a19 add.w sl, r4, #25 8008956: 68e3 ldr r3, [r4, #12] 8008958: f8d9 2000 ldr.w r2, [r9] 800895c: 1a9b subs r3, r3, r2 800895e: 429d cmp r5, r3 8008960: db2a blt.n 80089b8 <_printf_common+0xa8> 8008962: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8008966: 6822 ldr r2, [r4, #0] 8008968: 3300 adds r3, #0 800896a: bf18 it ne 800896c: 2301 movne r3, #1 800896e: 0692 lsls r2, r2, #26 8008970: d42f bmi.n 80089d2 <_printf_common+0xc2> 8008972: f104 0243 add.w r2, r4, #67 ; 0x43 8008976: 4639 mov r1, r7 8008978: 4630 mov r0, r6 800897a: 47c0 blx r8 800897c: 3001 adds r0, #1 800897e: d022 beq.n 80089c6 <_printf_common+0xb6> 8008980: 6823 ldr r3, [r4, #0] 8008982: 68e5 ldr r5, [r4, #12] 8008984: f003 0306 and.w r3, r3, #6 8008988: 2b04 cmp r3, #4 800898a: bf18 it ne 800898c: 2500 movne r5, #0 800898e: f8d9 2000 ldr.w r2, [r9] 8008992: f04f 0900 mov.w r9, #0 8008996: bf08 it eq 8008998: 1aad subeq r5, r5, r2 800899a: 68a3 ldr r3, [r4, #8] 800899c: 6922 ldr r2, [r4, #16] 800899e: bf08 it eq 80089a0: ea25 75e5 biceq.w r5, r5, r5, asr #31 80089a4: 4293 cmp r3, r2 80089a6: bfc4 itt gt 80089a8: 1a9b subgt r3, r3, r2 80089aa: 18ed addgt r5, r5, r3 80089ac: 341a adds r4, #26 80089ae: 454d cmp r5, r9 80089b0: d11b bne.n 80089ea <_printf_common+0xda> 80089b2: 2000 movs r0, #0 80089b4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80089b8: 2301 movs r3, #1 80089ba: 4652 mov r2, sl 80089bc: 4639 mov r1, r7 80089be: 4630 mov r0, r6 80089c0: 47c0 blx r8 80089c2: 3001 adds r0, #1 80089c4: d103 bne.n 80089ce <_printf_common+0xbe> 80089c6: f04f 30ff mov.w r0, #4294967295 80089ca: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80089ce: 3501 adds r5, #1 80089d0: e7c1 b.n 8008956 <_printf_common+0x46> 80089d2: 2030 movs r0, #48 ; 0x30 80089d4: 18e1 adds r1, r4, r3 80089d6: f881 0043 strb.w r0, [r1, #67] ; 0x43 80089da: 1c5a adds r2, r3, #1 80089dc: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 80089e0: 4422 add r2, r4 80089e2: 3302 adds r3, #2 80089e4: f882 1043 strb.w r1, [r2, #67] ; 0x43 80089e8: e7c3 b.n 8008972 <_printf_common+0x62> 80089ea: 2301 movs r3, #1 80089ec: 4622 mov r2, r4 80089ee: 4639 mov r1, r7 80089f0: 4630 mov r0, r6 80089f2: 47c0 blx r8 80089f4: 3001 adds r0, #1 80089f6: d0e6 beq.n 80089c6 <_printf_common+0xb6> 80089f8: f109 0901 add.w r9, r9, #1 80089fc: e7d7 b.n 80089ae <_printf_common+0x9e> ... 08008a00 <_printf_i>: 8008a00: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8008a04: 4617 mov r7, r2 8008a06: 7e0a ldrb r2, [r1, #24] 8008a08: b085 sub sp, #20 8008a0a: 2a6e cmp r2, #110 ; 0x6e 8008a0c: 4698 mov r8, r3 8008a0e: 4606 mov r6, r0 8008a10: 460c mov r4, r1 8008a12: 9b0c ldr r3, [sp, #48] ; 0x30 8008a14: f101 0e43 add.w lr, r1, #67 ; 0x43 8008a18: f000 80bc beq.w 8008b94 <_printf_i+0x194> 8008a1c: d81a bhi.n 8008a54 <_printf_i+0x54> 8008a1e: 2a63 cmp r2, #99 ; 0x63 8008a20: d02e beq.n 8008a80 <_printf_i+0x80> 8008a22: d80a bhi.n 8008a3a <_printf_i+0x3a> 8008a24: 2a00 cmp r2, #0 8008a26: f000 80c8 beq.w 8008bba <_printf_i+0x1ba> 8008a2a: 2a58 cmp r2, #88 ; 0x58 8008a2c: f000 808a beq.w 8008b44 <_printf_i+0x144> 8008a30: f104 0542 add.w r5, r4, #66 ; 0x42 8008a34: f884 2042 strb.w r2, [r4, #66] ; 0x42 8008a38: e02a b.n 8008a90 <_printf_i+0x90> 8008a3a: 2a64 cmp r2, #100 ; 0x64 8008a3c: d001 beq.n 8008a42 <_printf_i+0x42> 8008a3e: 2a69 cmp r2, #105 ; 0x69 8008a40: d1f6 bne.n 8008a30 <_printf_i+0x30> 8008a42: 6821 ldr r1, [r4, #0] 8008a44: 681a ldr r2, [r3, #0] 8008a46: f011 0f80 tst.w r1, #128 ; 0x80 8008a4a: d023 beq.n 8008a94 <_printf_i+0x94> 8008a4c: 1d11 adds r1, r2, #4 8008a4e: 6019 str r1, [r3, #0] 8008a50: 6813 ldr r3, [r2, #0] 8008a52: e027 b.n 8008aa4 <_printf_i+0xa4> 8008a54: 2a73 cmp r2, #115 ; 0x73 8008a56: f000 80b4 beq.w 8008bc2 <_printf_i+0x1c2> 8008a5a: d808 bhi.n 8008a6e <_printf_i+0x6e> 8008a5c: 2a6f cmp r2, #111 ; 0x6f 8008a5e: d02a beq.n 8008ab6 <_printf_i+0xb6> 8008a60: 2a70 cmp r2, #112 ; 0x70 8008a62: d1e5 bne.n 8008a30 <_printf_i+0x30> 8008a64: 680a ldr r2, [r1, #0] 8008a66: f042 0220 orr.w r2, r2, #32 8008a6a: 600a str r2, [r1, #0] 8008a6c: e003 b.n 8008a76 <_printf_i+0x76> 8008a6e: 2a75 cmp r2, #117 ; 0x75 8008a70: d021 beq.n 8008ab6 <_printf_i+0xb6> 8008a72: 2a78 cmp r2, #120 ; 0x78 8008a74: d1dc bne.n 8008a30 <_printf_i+0x30> 8008a76: 2278 movs r2, #120 ; 0x78 8008a78: 496f ldr r1, [pc, #444] ; (8008c38 <_printf_i+0x238>) 8008a7a: f884 2045 strb.w r2, [r4, #69] ; 0x45 8008a7e: e064 b.n 8008b4a <_printf_i+0x14a> 8008a80: 681a ldr r2, [r3, #0] 8008a82: f101 0542 add.w r5, r1, #66 ; 0x42 8008a86: 1d11 adds r1, r2, #4 8008a88: 6019 str r1, [r3, #0] 8008a8a: 6813 ldr r3, [r2, #0] 8008a8c: f884 3042 strb.w r3, [r4, #66] ; 0x42 8008a90: 2301 movs r3, #1 8008a92: e0a3 b.n 8008bdc <_printf_i+0x1dc> 8008a94: f011 0f40 tst.w r1, #64 ; 0x40 8008a98: f102 0104 add.w r1, r2, #4 8008a9c: 6019 str r1, [r3, #0] 8008a9e: d0d7 beq.n 8008a50 <_printf_i+0x50> 8008aa0: f9b2 3000 ldrsh.w r3, [r2] 8008aa4: 2b00 cmp r3, #0 8008aa6: da03 bge.n 8008ab0 <_printf_i+0xb0> 8008aa8: 222d movs r2, #45 ; 0x2d 8008aaa: 425b negs r3, r3 8008aac: f884 2043 strb.w r2, [r4, #67] ; 0x43 8008ab0: 4962 ldr r1, [pc, #392] ; (8008c3c <_printf_i+0x23c>) 8008ab2: 220a movs r2, #10 8008ab4: e017 b.n 8008ae6 <_printf_i+0xe6> 8008ab6: 6820 ldr r0, [r4, #0] 8008ab8: 6819 ldr r1, [r3, #0] 8008aba: f010 0f80 tst.w r0, #128 ; 0x80 8008abe: d003 beq.n 8008ac8 <_printf_i+0xc8> 8008ac0: 1d08 adds r0, r1, #4 8008ac2: 6018 str r0, [r3, #0] 8008ac4: 680b ldr r3, [r1, #0] 8008ac6: e006 b.n 8008ad6 <_printf_i+0xd6> 8008ac8: f010 0f40 tst.w r0, #64 ; 0x40 8008acc: f101 0004 add.w r0, r1, #4 8008ad0: 6018 str r0, [r3, #0] 8008ad2: d0f7 beq.n 8008ac4 <_printf_i+0xc4> 8008ad4: 880b ldrh r3, [r1, #0] 8008ad6: 2a6f cmp r2, #111 ; 0x6f 8008ad8: bf14 ite ne 8008ada: 220a movne r2, #10 8008adc: 2208 moveq r2, #8 8008ade: 4957 ldr r1, [pc, #348] ; (8008c3c <_printf_i+0x23c>) 8008ae0: 2000 movs r0, #0 8008ae2: f884 0043 strb.w r0, [r4, #67] ; 0x43 8008ae6: 6865 ldr r5, [r4, #4] 8008ae8: 2d00 cmp r5, #0 8008aea: 60a5 str r5, [r4, #8] 8008aec: f2c0 809c blt.w 8008c28 <_printf_i+0x228> 8008af0: 6820 ldr r0, [r4, #0] 8008af2: f020 0004 bic.w r0, r0, #4 8008af6: 6020 str r0, [r4, #0] 8008af8: 2b00 cmp r3, #0 8008afa: d13f bne.n 8008b7c <_printf_i+0x17c> 8008afc: 2d00 cmp r5, #0 8008afe: f040 8095 bne.w 8008c2c <_printf_i+0x22c> 8008b02: 4675 mov r5, lr 8008b04: 2a08 cmp r2, #8 8008b06: d10b bne.n 8008b20 <_printf_i+0x120> 8008b08: 6823 ldr r3, [r4, #0] 8008b0a: 07da lsls r2, r3, #31 8008b0c: d508 bpl.n 8008b20 <_printf_i+0x120> 8008b0e: 6923 ldr r3, [r4, #16] 8008b10: 6862 ldr r2, [r4, #4] 8008b12: 429a cmp r2, r3 8008b14: bfde ittt le 8008b16: 2330 movle r3, #48 ; 0x30 8008b18: f805 3c01 strble.w r3, [r5, #-1] 8008b1c: f105 35ff addle.w r5, r5, #4294967295 8008b20: ebae 0305 sub.w r3, lr, r5 8008b24: 6123 str r3, [r4, #16] 8008b26: f8cd 8000 str.w r8, [sp] 8008b2a: 463b mov r3, r7 8008b2c: aa03 add r2, sp, #12 8008b2e: 4621 mov r1, r4 8008b30: 4630 mov r0, r6 8008b32: f7ff feed bl 8008910 <_printf_common> 8008b36: 3001 adds r0, #1 8008b38: d155 bne.n 8008be6 <_printf_i+0x1e6> 8008b3a: f04f 30ff mov.w r0, #4294967295 8008b3e: b005 add sp, #20 8008b40: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8008b44: f881 2045 strb.w r2, [r1, #69] ; 0x45 8008b48: 493c ldr r1, [pc, #240] ; (8008c3c <_printf_i+0x23c>) 8008b4a: 6822 ldr r2, [r4, #0] 8008b4c: 6818 ldr r0, [r3, #0] 8008b4e: f012 0f80 tst.w r2, #128 ; 0x80 8008b52: f100 0504 add.w r5, r0, #4 8008b56: 601d str r5, [r3, #0] 8008b58: d001 beq.n 8008b5e <_printf_i+0x15e> 8008b5a: 6803 ldr r3, [r0, #0] 8008b5c: e002 b.n 8008b64 <_printf_i+0x164> 8008b5e: 0655 lsls r5, r2, #25 8008b60: d5fb bpl.n 8008b5a <_printf_i+0x15a> 8008b62: 8803 ldrh r3, [r0, #0] 8008b64: 07d0 lsls r0, r2, #31 8008b66: bf44 itt mi 8008b68: f042 0220 orrmi.w r2, r2, #32 8008b6c: 6022 strmi r2, [r4, #0] 8008b6e: b91b cbnz r3, 8008b78 <_printf_i+0x178> 8008b70: 6822 ldr r2, [r4, #0] 8008b72: f022 0220 bic.w r2, r2, #32 8008b76: 6022 str r2, [r4, #0] 8008b78: 2210 movs r2, #16 8008b7a: e7b1 b.n 8008ae0 <_printf_i+0xe0> 8008b7c: 4675 mov r5, lr 8008b7e: fbb3 f0f2 udiv r0, r3, r2 8008b82: fb02 3310 mls r3, r2, r0, r3 8008b86: 5ccb ldrb r3, [r1, r3] 8008b88: f805 3d01 strb.w r3, [r5, #-1]! 8008b8c: 4603 mov r3, r0 8008b8e: 2800 cmp r0, #0 8008b90: d1f5 bne.n 8008b7e <_printf_i+0x17e> 8008b92: e7b7 b.n 8008b04 <_printf_i+0x104> 8008b94: 6808 ldr r0, [r1, #0] 8008b96: 681a ldr r2, [r3, #0] 8008b98: f010 0f80 tst.w r0, #128 ; 0x80 8008b9c: 6949 ldr r1, [r1, #20] 8008b9e: d004 beq.n 8008baa <_printf_i+0x1aa> 8008ba0: 1d10 adds r0, r2, #4 8008ba2: 6018 str r0, [r3, #0] 8008ba4: 6813 ldr r3, [r2, #0] 8008ba6: 6019 str r1, [r3, #0] 8008ba8: e007 b.n 8008bba <_printf_i+0x1ba> 8008baa: f010 0f40 tst.w r0, #64 ; 0x40 8008bae: f102 0004 add.w r0, r2, #4 8008bb2: 6018 str r0, [r3, #0] 8008bb4: 6813 ldr r3, [r2, #0] 8008bb6: d0f6 beq.n 8008ba6 <_printf_i+0x1a6> 8008bb8: 8019 strh r1, [r3, #0] 8008bba: 2300 movs r3, #0 8008bbc: 4675 mov r5, lr 8008bbe: 6123 str r3, [r4, #16] 8008bc0: e7b1 b.n 8008b26 <_printf_i+0x126> 8008bc2: 681a ldr r2, [r3, #0] 8008bc4: 1d11 adds r1, r2, #4 8008bc6: 6019 str r1, [r3, #0] 8008bc8: 6815 ldr r5, [r2, #0] 8008bca: 2100 movs r1, #0 8008bcc: 6862 ldr r2, [r4, #4] 8008bce: 4628 mov r0, r5 8008bd0: f000 f8e0 bl 8008d94 8008bd4: b108 cbz r0, 8008bda <_printf_i+0x1da> 8008bd6: 1b40 subs r0, r0, r5 8008bd8: 6060 str r0, [r4, #4] 8008bda: 6863 ldr r3, [r4, #4] 8008bdc: 6123 str r3, [r4, #16] 8008bde: 2300 movs r3, #0 8008be0: f884 3043 strb.w r3, [r4, #67] ; 0x43 8008be4: e79f b.n 8008b26 <_printf_i+0x126> 8008be6: 6923 ldr r3, [r4, #16] 8008be8: 462a mov r2, r5 8008bea: 4639 mov r1, r7 8008bec: 4630 mov r0, r6 8008bee: 47c0 blx r8 8008bf0: 3001 adds r0, #1 8008bf2: d0a2 beq.n 8008b3a <_printf_i+0x13a> 8008bf4: 6823 ldr r3, [r4, #0] 8008bf6: 079b lsls r3, r3, #30 8008bf8: d507 bpl.n 8008c0a <_printf_i+0x20a> 8008bfa: 2500 movs r5, #0 8008bfc: f104 0919 add.w r9, r4, #25 8008c00: 68e3 ldr r3, [r4, #12] 8008c02: 9a03 ldr r2, [sp, #12] 8008c04: 1a9b subs r3, r3, r2 8008c06: 429d cmp r5, r3 8008c08: db05 blt.n 8008c16 <_printf_i+0x216> 8008c0a: 68e0 ldr r0, [r4, #12] 8008c0c: 9b03 ldr r3, [sp, #12] 8008c0e: 4298 cmp r0, r3 8008c10: bfb8 it lt 8008c12: 4618 movlt r0, r3 8008c14: e793 b.n 8008b3e <_printf_i+0x13e> 8008c16: 2301 movs r3, #1 8008c18: 464a mov r2, r9 8008c1a: 4639 mov r1, r7 8008c1c: 4630 mov r0, r6 8008c1e: 47c0 blx r8 8008c20: 3001 adds r0, #1 8008c22: d08a beq.n 8008b3a <_printf_i+0x13a> 8008c24: 3501 adds r5, #1 8008c26: e7eb b.n 8008c00 <_printf_i+0x200> 8008c28: 2b00 cmp r3, #0 8008c2a: d1a7 bne.n 8008b7c <_printf_i+0x17c> 8008c2c: 780b ldrb r3, [r1, #0] 8008c2e: f104 0542 add.w r5, r4, #66 ; 0x42 8008c32: f884 3042 strb.w r3, [r4, #66] ; 0x42 8008c36: e765 b.n 8008b04 <_printf_i+0x104> 8008c38: 0800915e .word 0x0800915e 8008c3c: 0800914d .word 0x0800914d 08008c40 <_sbrk_r>: 8008c40: b538 push {r3, r4, r5, lr} 8008c42: 2300 movs r3, #0 8008c44: 4c05 ldr r4, [pc, #20] ; (8008c5c <_sbrk_r+0x1c>) 8008c46: 4605 mov r5, r0 8008c48: 4608 mov r0, r1 8008c4a: 6023 str r3, [r4, #0] 8008c4c: f000 f8ec bl 8008e28 <_sbrk> 8008c50: 1c43 adds r3, r0, #1 8008c52: d102 bne.n 8008c5a <_sbrk_r+0x1a> 8008c54: 6823 ldr r3, [r4, #0] 8008c56: b103 cbz r3, 8008c5a <_sbrk_r+0x1a> 8008c58: 602b str r3, [r5, #0] 8008c5a: bd38 pop {r3, r4, r5, pc} 8008c5c: 20000a30 .word 0x20000a30 08008c60 <__sread>: 8008c60: b510 push {r4, lr} 8008c62: 460c mov r4, r1 8008c64: f9b1 100e ldrsh.w r1, [r1, #14] 8008c68: f000 f8a4 bl 8008db4 <_read_r> 8008c6c: 2800 cmp r0, #0 8008c6e: bfab itete ge 8008c70: 6d63 ldrge r3, [r4, #84] ; 0x54 8008c72: 89a3 ldrhlt r3, [r4, #12] 8008c74: 181b addge r3, r3, r0 8008c76: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 8008c7a: bfac ite ge 8008c7c: 6563 strge r3, [r4, #84] ; 0x54 8008c7e: 81a3 strhlt r3, [r4, #12] 8008c80: bd10 pop {r4, pc} 08008c82 <__swrite>: 8008c82: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8008c86: 461f mov r7, r3 8008c88: 898b ldrh r3, [r1, #12] 8008c8a: 4605 mov r5, r0 8008c8c: 05db lsls r3, r3, #23 8008c8e: 460c mov r4, r1 8008c90: 4616 mov r6, r2 8008c92: d505 bpl.n 8008ca0 <__swrite+0x1e> 8008c94: 2302 movs r3, #2 8008c96: 2200 movs r2, #0 8008c98: f9b1 100e ldrsh.w r1, [r1, #14] 8008c9c: f000 f868 bl 8008d70 <_lseek_r> 8008ca0: 89a3 ldrh r3, [r4, #12] 8008ca2: 4632 mov r2, r6 8008ca4: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8008ca8: 81a3 strh r3, [r4, #12] 8008caa: f9b4 100e ldrsh.w r1, [r4, #14] 8008cae: 463b mov r3, r7 8008cb0: 4628 mov r0, r5 8008cb2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8008cb6: f000 b817 b.w 8008ce8 <_write_r> 08008cba <__sseek>: 8008cba: b510 push {r4, lr} 8008cbc: 460c mov r4, r1 8008cbe: f9b1 100e ldrsh.w r1, [r1, #14] 8008cc2: f000 f855 bl 8008d70 <_lseek_r> 8008cc6: 1c43 adds r3, r0, #1 8008cc8: 89a3 ldrh r3, [r4, #12] 8008cca: bf15 itete ne 8008ccc: 6560 strne r0, [r4, #84] ; 0x54 8008cce: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8008cd2: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8008cd6: 81a3 strheq r3, [r4, #12] 8008cd8: bf18 it ne 8008cda: 81a3 strhne r3, [r4, #12] 8008cdc: bd10 pop {r4, pc} 08008cde <__sclose>: 8008cde: f9b1 100e ldrsh.w r1, [r1, #14] 8008ce2: f000 b813 b.w 8008d0c <_close_r> ... 08008ce8 <_write_r>: 8008ce8: b538 push {r3, r4, r5, lr} 8008cea: 4605 mov r5, r0 8008cec: 4608 mov r0, r1 8008cee: 4611 mov r1, r2 8008cf0: 2200 movs r2, #0 8008cf2: 4c05 ldr r4, [pc, #20] ; (8008d08 <_write_r+0x20>) 8008cf4: 6022 str r2, [r4, #0] 8008cf6: 461a mov r2, r3 8008cf8: f7fe f9bc bl 8007074 <_write> 8008cfc: 1c43 adds r3, r0, #1 8008cfe: d102 bne.n 8008d06 <_write_r+0x1e> 8008d00: 6823 ldr r3, [r4, #0] 8008d02: b103 cbz r3, 8008d06 <_write_r+0x1e> 8008d04: 602b str r3, [r5, #0] 8008d06: bd38 pop {r3, r4, r5, pc} 8008d08: 20000a30 .word 0x20000a30 08008d0c <_close_r>: 8008d0c: b538 push {r3, r4, r5, lr} 8008d0e: 2300 movs r3, #0 8008d10: 4c05 ldr r4, [pc, #20] ; (8008d28 <_close_r+0x1c>) 8008d12: 4605 mov r5, r0 8008d14: 4608 mov r0, r1 8008d16: 6023 str r3, [r4, #0] 8008d18: f000 f85e bl 8008dd8 <_close> 8008d1c: 1c43 adds r3, r0, #1 8008d1e: d102 bne.n 8008d26 <_close_r+0x1a> 8008d20: 6823 ldr r3, [r4, #0] 8008d22: b103 cbz r3, 8008d26 <_close_r+0x1a> 8008d24: 602b str r3, [r5, #0] 8008d26: bd38 pop {r3, r4, r5, pc} 8008d28: 20000a30 .word 0x20000a30 08008d2c <_fstat_r>: 8008d2c: b538 push {r3, r4, r5, lr} 8008d2e: 2300 movs r3, #0 8008d30: 4c06 ldr r4, [pc, #24] ; (8008d4c <_fstat_r+0x20>) 8008d32: 4605 mov r5, r0 8008d34: 4608 mov r0, r1 8008d36: 4611 mov r1, r2 8008d38: 6023 str r3, [r4, #0] 8008d3a: f000 f855 bl 8008de8 <_fstat> 8008d3e: 1c43 adds r3, r0, #1 8008d40: d102 bne.n 8008d48 <_fstat_r+0x1c> 8008d42: 6823 ldr r3, [r4, #0] 8008d44: b103 cbz r3, 8008d48 <_fstat_r+0x1c> 8008d46: 602b str r3, [r5, #0] 8008d48: bd38 pop {r3, r4, r5, pc} 8008d4a: bf00 nop 8008d4c: 20000a30 .word 0x20000a30 08008d50 <_isatty_r>: 8008d50: b538 push {r3, r4, r5, lr} 8008d52: 2300 movs r3, #0 8008d54: 4c05 ldr r4, [pc, #20] ; (8008d6c <_isatty_r+0x1c>) 8008d56: 4605 mov r5, r0 8008d58: 4608 mov r0, r1 8008d5a: 6023 str r3, [r4, #0] 8008d5c: f000 f84c bl 8008df8 <_isatty> 8008d60: 1c43 adds r3, r0, #1 8008d62: d102 bne.n 8008d6a <_isatty_r+0x1a> 8008d64: 6823 ldr r3, [r4, #0] 8008d66: b103 cbz r3, 8008d6a <_isatty_r+0x1a> 8008d68: 602b str r3, [r5, #0] 8008d6a: bd38 pop {r3, r4, r5, pc} 8008d6c: 20000a30 .word 0x20000a30 08008d70 <_lseek_r>: 8008d70: b538 push {r3, r4, r5, lr} 8008d72: 4605 mov r5, r0 8008d74: 4608 mov r0, r1 8008d76: 4611 mov r1, r2 8008d78: 2200 movs r2, #0 8008d7a: 4c05 ldr r4, [pc, #20] ; (8008d90 <_lseek_r+0x20>) 8008d7c: 6022 str r2, [r4, #0] 8008d7e: 461a mov r2, r3 8008d80: f000 f842 bl 8008e08 <_lseek> 8008d84: 1c43 adds r3, r0, #1 8008d86: d102 bne.n 8008d8e <_lseek_r+0x1e> 8008d88: 6823 ldr r3, [r4, #0] 8008d8a: b103 cbz r3, 8008d8e <_lseek_r+0x1e> 8008d8c: 602b str r3, [r5, #0] 8008d8e: bd38 pop {r3, r4, r5, pc} 8008d90: 20000a30 .word 0x20000a30 08008d94 : 8008d94: b510 push {r4, lr} 8008d96: b2c9 uxtb r1, r1 8008d98: 4402 add r2, r0 8008d9a: 4290 cmp r0, r2 8008d9c: 4603 mov r3, r0 8008d9e: d101 bne.n 8008da4 8008da0: 2000 movs r0, #0 8008da2: bd10 pop {r4, pc} 8008da4: 781c ldrb r4, [r3, #0] 8008da6: 3001 adds r0, #1 8008da8: 428c cmp r4, r1 8008daa: d1f6 bne.n 8008d9a 8008dac: 4618 mov r0, r3 8008dae: bd10 pop {r4, pc} 08008db0 <__malloc_lock>: 8008db0: 4770 bx lr 08008db2 <__malloc_unlock>: 8008db2: 4770 bx lr 08008db4 <_read_r>: 8008db4: b538 push {r3, r4, r5, lr} 8008db6: 4605 mov r5, r0 8008db8: 4608 mov r0, r1 8008dba: 4611 mov r1, r2 8008dbc: 2200 movs r2, #0 8008dbe: 4c05 ldr r4, [pc, #20] ; (8008dd4 <_read_r+0x20>) 8008dc0: 6022 str r2, [r4, #0] 8008dc2: 461a mov r2, r3 8008dc4: f000 f828 bl 8008e18 <_read> 8008dc8: 1c43 adds r3, r0, #1 8008dca: d102 bne.n 8008dd2 <_read_r+0x1e> 8008dcc: 6823 ldr r3, [r4, #0] 8008dce: b103 cbz r3, 8008dd2 <_read_r+0x1e> 8008dd0: 602b str r3, [r5, #0] 8008dd2: bd38 pop {r3, r4, r5, pc} 8008dd4: 20000a30 .word 0x20000a30 08008dd8 <_close>: 8008dd8: 2258 movs r2, #88 ; 0x58 8008dda: 4b02 ldr r3, [pc, #8] ; (8008de4 <_close+0xc>) 8008ddc: f04f 30ff mov.w r0, #4294967295 8008de0: 601a str r2, [r3, #0] 8008de2: 4770 bx lr 8008de4: 20000a30 .word 0x20000a30 08008de8 <_fstat>: 8008de8: 2258 movs r2, #88 ; 0x58 8008dea: 4b02 ldr r3, [pc, #8] ; (8008df4 <_fstat+0xc>) 8008dec: f04f 30ff mov.w r0, #4294967295 8008df0: 601a str r2, [r3, #0] 8008df2: 4770 bx lr 8008df4: 20000a30 .word 0x20000a30 08008df8 <_isatty>: 8008df8: 2258 movs r2, #88 ; 0x58 8008dfa: 4b02 ldr r3, [pc, #8] ; (8008e04 <_isatty+0xc>) 8008dfc: 2000 movs r0, #0 8008dfe: 601a str r2, [r3, #0] 8008e00: 4770 bx lr 8008e02: bf00 nop 8008e04: 20000a30 .word 0x20000a30 08008e08 <_lseek>: 8008e08: 2258 movs r2, #88 ; 0x58 8008e0a: 4b02 ldr r3, [pc, #8] ; (8008e14 <_lseek+0xc>) 8008e0c: f04f 30ff mov.w r0, #4294967295 8008e10: 601a str r2, [r3, #0] 8008e12: 4770 bx lr 8008e14: 20000a30 .word 0x20000a30 08008e18 <_read>: 8008e18: 2258 movs r2, #88 ; 0x58 8008e1a: 4b02 ldr r3, [pc, #8] ; (8008e24 <_read+0xc>) 8008e1c: f04f 30ff mov.w r0, #4294967295 8008e20: 601a str r2, [r3, #0] 8008e22: 4770 bx lr 8008e24: 20000a30 .word 0x20000a30 08008e28 <_sbrk>: 8008e28: 4b04 ldr r3, [pc, #16] ; (8008e3c <_sbrk+0x14>) 8008e2a: 4602 mov r2, r0 8008e2c: 6819 ldr r1, [r3, #0] 8008e2e: b909 cbnz r1, 8008e34 <_sbrk+0xc> 8008e30: 4903 ldr r1, [pc, #12] ; (8008e40 <_sbrk+0x18>) 8008e32: 6019 str r1, [r3, #0] 8008e34: 6818 ldr r0, [r3, #0] 8008e36: 4402 add r2, r0 8008e38: 601a str r2, [r3, #0] 8008e3a: 4770 bx lr 8008e3c: 200005ac .word 0x200005ac 8008e40: 20000a34 .word 0x20000a34 08008e44 <_init>: 8008e44: b5f8 push {r3, r4, r5, r6, r7, lr} 8008e46: bf00 nop 8008e48: bcf8 pop {r3, r4, r5, r6, r7} 8008e4a: bc08 pop {r3} 8008e4c: 469e mov lr, r3 8008e4e: 4770 bx lr 08008e50 <_fini>: 8008e50: b5f8 push {r3, r4, r5, r6, r7, lr} 8008e52: bf00 nop 8008e54: bcf8 pop {r3, r4, r5, r6, r7} 8008e56: bc08 pop {r3} 8008e58: 469e mov lr, r3 8008e5a: 4770 bx lr