STM32F103_RGB_Controller.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00004ac8 080041e4 080041e4 000041e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000002d8 08008cac 08008cac 00008cac 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08008f84 08008f84 00008f84 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08008f88 08008f88 00008f88 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000074 20000000 08008f8c 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 000007e8 20000074 08009000 00010074 2**2 ALLOC 7 ._user_heap_stack 00000600 2000085c 08009000 0001085c 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00010074 2**0 CONTENTS, READONLY 9 .debug_info 0001e69d 00000000 00000000 0001009d 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00003843 00000000 00000000 0002e73a 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000ab05 00000000 00000000 00031f7d 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000cd8 00000000 00000000 0003ca88 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00001480 00000000 00000000 0003d760 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 0000840e 00000000 00000000 0003ebe0 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004edc 00000000 00000000 00046fee 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0004beca 2**0 CONTENTS, READONLY 17 .debug_frame 000030c4 00000000 00000000 0004bf48 2**2 CONTENTS, READONLY, DEBUGGING 18 .stab 00000084 00000000 00000000 0004f00c 2**2 CONTENTS, READONLY, DEBUGGING 19 .stabstr 00000117 00000000 00000000 0004f090 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080041e4 <__do_global_dtors_aux>: 80041e4: b510 push {r4, lr} 80041e6: 4c05 ldr r4, [pc, #20] ; (80041fc <__do_global_dtors_aux+0x18>) 80041e8: 7823 ldrb r3, [r4, #0] 80041ea: b933 cbnz r3, 80041fa <__do_global_dtors_aux+0x16> 80041ec: 4b04 ldr r3, [pc, #16] ; (8004200 <__do_global_dtors_aux+0x1c>) 80041ee: b113 cbz r3, 80041f6 <__do_global_dtors_aux+0x12> 80041f0: 4804 ldr r0, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x20>) 80041f2: f3af 8000 nop.w 80041f6: 2301 movs r3, #1 80041f8: 7023 strb r3, [r4, #0] 80041fa: bd10 pop {r4, pc} 80041fc: 20000074 .word 0x20000074 8004200: 00000000 .word 0x00000000 8004204: 08008c94 .word 0x08008c94 08004208 : 8004208: b508 push {r3, lr} 800420a: 4b03 ldr r3, [pc, #12] ; (8004218 ) 800420c: b11b cbz r3, 8004216 800420e: 4903 ldr r1, [pc, #12] ; (800421c ) 8004210: 4803 ldr r0, [pc, #12] ; (8004220 ) 8004212: f3af 8000 nop.w 8004216: bd08 pop {r3, pc} 8004218: 00000000 .word 0x00000000 800421c: 20000078 .word 0x20000078 8004220: 08008c94 .word 0x08008c94 08004224 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8004224: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8004226: 4b0e ldr r3, [pc, #56] ; (8004260 ) { 8004228: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800422a: 7818 ldrb r0, [r3, #0] 800422c: f44f 737a mov.w r3, #1000 ; 0x3e8 8004230: fbb3 f3f0 udiv r3, r3, r0 8004234: 4a0b ldr r2, [pc, #44] ; (8004264 ) 8004236: 6810 ldr r0, [r2, #0] 8004238: fbb0 f0f3 udiv r0, r0, r3 800423c: f000 f89e bl 800437c 8004240: 4604 mov r4, r0 8004242: b958 cbnz r0, 800425c { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8004244: 2d0f cmp r5, #15 8004246: d809 bhi.n 800425c { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8004248: 4602 mov r2, r0 800424a: 4629 mov r1, r5 800424c: f04f 30ff mov.w r0, #4294967295 8004250: f000 f854 bl 80042fc uwTickPrio = TickPriority; 8004254: 4b04 ldr r3, [pc, #16] ; (8004268 ) 8004256: 4620 mov r0, r4 8004258: 601d str r5, [r3, #0] 800425a: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 800425c: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 800425e: bd38 pop {r3, r4, r5, pc} 8004260: 20000000 .word 0x20000000 8004264: 2000000c .word 0x2000000c 8004268: 20000004 .word 0x20000004 0800426c : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800426c: 4a07 ldr r2, [pc, #28] ; (800428c ) { 800426e: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004270: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8004272: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004274: f043 0310 orr.w r3, r3, #16 8004278: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800427a: f000 f82d bl 80042d8 HAL_InitTick(TICK_INT_PRIORITY); 800427e: 2000 movs r0, #0 8004280: f7ff ffd0 bl 8004224 HAL_MspInit(); 8004284: f003 fad0 bl 8007828 } 8004288: 2000 movs r0, #0 800428a: bd08 pop {r3, pc} 800428c: 40022000 .word 0x40022000 08004290 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 8004290: 4a03 ldr r2, [pc, #12] ; (80042a0 ) 8004292: 4b04 ldr r3, [pc, #16] ; (80042a4 ) 8004294: 6811 ldr r1, [r2, #0] 8004296: 781b ldrb r3, [r3, #0] 8004298: 440b add r3, r1 800429a: 6013 str r3, [r2, #0] 800429c: 4770 bx lr 800429e: bf00 nop 80042a0: 2000042c .word 0x2000042c 80042a4: 20000000 .word 0x20000000 080042a8 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80042a8: 4b01 ldr r3, [pc, #4] ; (80042b0 ) 80042aa: 6818 ldr r0, [r3, #0] } 80042ac: 4770 bx lr 80042ae: bf00 nop 80042b0: 2000042c .word 0x2000042c 080042b4 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80042b4: b538 push {r3, r4, r5, lr} 80042b6: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80042b8: f7ff fff6 bl 80042a8 80042bc: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80042be: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80042c0: bf1e ittt ne 80042c2: 4b04 ldrne r3, [pc, #16] ; (80042d4 ) 80042c4: 781b ldrbne r3, [r3, #0] 80042c6: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80042c8: f7ff ffee bl 80042a8 80042cc: 1b40 subs r0, r0, r5 80042ce: 4284 cmp r4, r0 80042d0: d8fa bhi.n 80042c8 { } } 80042d2: bd38 pop {r3, r4, r5, pc} 80042d4: 20000000 .word 0x20000000 080042d8 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80042d8: 4a07 ldr r2, [pc, #28] ; (80042f8 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042da: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80042dc: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042de: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80042e2: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80042e6: 041b lsls r3, r3, #16 80042e8: 0c1b lsrs r3, r3, #16 80042ea: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80042ee: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 80042f2: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 80042f4: 60d3 str r3, [r2, #12] 80042f6: 4770 bx lr 80042f8: e000ed00 .word 0xe000ed00 080042fc : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80042fc: 4b17 ldr r3, [pc, #92] ; (800435c ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 80042fe: b530 push {r4, r5, lr} 8004300: 68dc ldr r4, [r3, #12] 8004302: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8004306: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800430a: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800430c: 2b04 cmp r3, #4 800430e: bf28 it cs 8004310: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004312: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004314: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004318: bf98 it ls 800431a: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800431c: fa05 f303 lsl.w r3, r5, r3 8004320: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004324: bf88 it hi 8004326: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004328: 4019 ands r1, r3 800432a: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 800432c: fa05 f404 lsl.w r4, r5, r4 8004330: 3c01 subs r4, #1 8004332: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8004334: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004336: ea42 0201 orr.w r2, r2, r1 800433a: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800433e: bfaf iteee ge 8004340: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004344: 4b06 ldrlt r3, [pc, #24] ; (8004360 ) 8004346: f000 000f andlt.w r0, r0, #15 800434a: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800434c: bfa5 ittet ge 800434e: b2d2 uxtbge r2, r2 8004350: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004354: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004356: f880 2300 strbge.w r2, [r0, #768] ; 0x300 800435a: bd30 pop {r4, r5, pc} 800435c: e000ed00 .word 0xe000ed00 8004360: e000ed14 .word 0xe000ed14 08004364 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 8004364: 2301 movs r3, #1 8004366: 0942 lsrs r2, r0, #5 8004368: f000 001f and.w r0, r0, #31 800436c: fa03 f000 lsl.w r0, r3, r0 8004370: 4b01 ldr r3, [pc, #4] ; (8004378 ) 8004372: f843 0022 str.w r0, [r3, r2, lsl #2] 8004376: 4770 bx lr 8004378: e000e100 .word 0xe000e100 0800437c : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 800437c: 3801 subs r0, #1 800437e: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8004382: d20a bcs.n 800439a SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004384: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8004386: 4b06 ldr r3, [pc, #24] ; (80043a0 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004388: 4a06 ldr r2, [pc, #24] ; (80043a4 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800438a: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800438c: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8004390: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8004392: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8004394: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8004396: 601a str r2, [r3, #0] 8004398: 4770 bx lr return (1UL); /* Reload value impossible */ 800439a: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 800439c: 4770 bx lr 800439e: bf00 nop 80043a0: e000e010 .word 0xe000e010 80043a4: e000ed00 .word 0xe000ed00 080043a8 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 80043a8: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 80043aa: 2800 cmp r0, #0 80043ac: d032 beq.n 8004414 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80043ae: 6801 ldr r1, [r0, #0] 80043b0: 4b19 ldr r3, [pc, #100] ; (8004418 ) 80043b2: 2414 movs r4, #20 80043b4: 4299 cmp r1, r3 80043b6: d825 bhi.n 8004404 { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80043b8: 4a18 ldr r2, [pc, #96] ; (800441c ) hdma->DmaBaseAddress = DMA1; 80043ba: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80043be: 440a add r2, r1 80043c0: fbb2 f2f4 udiv r2, r2, r4 80043c4: 0092 lsls r2, r2, #2 80043c6: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80043c8: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80043ca: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80043cc: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80043ce: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80043d0: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80043d2: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80043d4: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80043d8: 4323 orrs r3, r4 80043da: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80043dc: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80043e0: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80043e2: 6944 ldr r4, [r0, #20] 80043e4: 4323 orrs r3, r4 80043e6: 6984 ldr r4, [r0, #24] 80043e8: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 80043ea: 69c4 ldr r4, [r0, #28] 80043ec: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 80043ee: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 80043f0: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 80043f2: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80043f4: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 80043f6: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80043fa: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 80043fc: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 8004400: 4618 mov r0, r3 8004402: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 8004404: 4b06 ldr r3, [pc, #24] ; (8004420 ) 8004406: 440b add r3, r1 8004408: fbb3 f3f4 udiv r3, r3, r4 800440c: 009b lsls r3, r3, #2 800440e: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8004410: 4b04 ldr r3, [pc, #16] ; (8004424 ) 8004412: e7d9 b.n 80043c8 return HAL_ERROR; 8004414: 2001 movs r0, #1 } 8004416: bd10 pop {r4, pc} 8004418: 40020407 .word 0x40020407 800441c: bffdfff8 .word 0xbffdfff8 8004420: bffdfbf8 .word 0xbffdfbf8 8004424: 40020400 .word 0x40020400 08004428 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8004428: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 800442a: f890 4020 ldrb.w r4, [r0, #32] 800442e: 2c01 cmp r4, #1 8004430: d035 beq.n 800449e 8004432: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 8004434: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 8004438: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 800443c: 42a5 cmp r5, r4 800443e: f04f 0600 mov.w r6, #0 8004442: f04f 0402 mov.w r4, #2 8004446: d128 bne.n 800449a { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8004448: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 800444c: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 800444e: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8004450: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8004452: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 8004454: f026 0601 bic.w r6, r6, #1 8004458: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800445a: 6bc6 ldr r6, [r0, #60] ; 0x3c 800445c: 40bd lsls r5, r7 800445e: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8004460: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8004462: 6843 ldr r3, [r0, #4] 8004464: 6805 ldr r5, [r0, #0] 8004466: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 8004468: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 800446a: bf0b itete eq 800446c: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 800446e: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8004470: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 8004472: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 8004474: b14b cbz r3, 800448a __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004476: 6823 ldr r3, [r4, #0] 8004478: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 800447c: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 800447e: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8004480: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 8004482: f043 0301 orr.w r3, r3, #1 8004486: 602b str r3, [r5, #0] 8004488: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 800448a: 6823 ldr r3, [r4, #0] 800448c: f023 0304 bic.w r3, r3, #4 8004490: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8004492: 6823 ldr r3, [r4, #0] 8004494: f043 030a orr.w r3, r3, #10 8004498: e7f0 b.n 800447c __HAL_UNLOCK(hdma); 800449a: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 800449e: 2002 movs r0, #2 } 80044a0: bdf0 pop {r4, r5, r6, r7, pc} ... 080044a4 : if(HAL_DMA_STATE_BUSY != hdma->State) 80044a4: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80044a8: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80044aa: 2b02 cmp r3, #2 80044ac: d003 beq.n 80044b6 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80044ae: 2304 movs r3, #4 80044b0: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80044b2: 2001 movs r0, #1 80044b4: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80044b6: 6803 ldr r3, [r0, #0] 80044b8: 681a ldr r2, [r3, #0] 80044ba: f022 020e bic.w r2, r2, #14 80044be: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80044c0: 681a ldr r2, [r3, #0] 80044c2: f022 0201 bic.w r2, r2, #1 80044c6: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80044c8: 4a29 ldr r2, [pc, #164] ; (8004570 ) 80044ca: 4293 cmp r3, r2 80044cc: d924 bls.n 8004518 80044ce: f502 7262 add.w r2, r2, #904 ; 0x388 80044d2: 4293 cmp r3, r2 80044d4: d019 beq.n 800450a 80044d6: 3214 adds r2, #20 80044d8: 4293 cmp r3, r2 80044da: d018 beq.n 800450e 80044dc: 3214 adds r2, #20 80044de: 4293 cmp r3, r2 80044e0: d017 beq.n 8004512 80044e2: 3214 adds r2, #20 80044e4: 4293 cmp r3, r2 80044e6: bf0c ite eq 80044e8: f44f 5380 moveq.w r3, #4096 ; 0x1000 80044ec: f44f 3380 movne.w r3, #65536 ; 0x10000 80044f0: 4a20 ldr r2, [pc, #128] ; (8004574 ) 80044f2: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 80044f4: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 80044f6: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 80044f8: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 80044fc: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 80044fe: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 8004502: b39b cbz r3, 800456c hdma->XferAbortCallback(hdma); 8004504: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8004506: 4620 mov r0, r4 8004508: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 800450a: 2301 movs r3, #1 800450c: e7f0 b.n 80044f0 800450e: 2310 movs r3, #16 8004510: e7ee b.n 80044f0 8004512: f44f 7380 mov.w r3, #256 ; 0x100 8004516: e7eb b.n 80044f0 8004518: 4917 ldr r1, [pc, #92] ; (8004578 ) 800451a: 428b cmp r3, r1 800451c: d016 beq.n 800454c 800451e: 3114 adds r1, #20 8004520: 428b cmp r3, r1 8004522: d015 beq.n 8004550 8004524: 3114 adds r1, #20 8004526: 428b cmp r3, r1 8004528: d014 beq.n 8004554 800452a: 3114 adds r1, #20 800452c: 428b cmp r3, r1 800452e: d014 beq.n 800455a 8004530: 3114 adds r1, #20 8004532: 428b cmp r3, r1 8004534: d014 beq.n 8004560 8004536: 3114 adds r1, #20 8004538: 428b cmp r3, r1 800453a: d014 beq.n 8004566 800453c: 4293 cmp r3, r2 800453e: bf14 ite ne 8004540: f44f 3380 movne.w r3, #65536 ; 0x10000 8004544: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8004548: 4a0c ldr r2, [pc, #48] ; (800457c ) 800454a: e7d2 b.n 80044f2 800454c: 2301 movs r3, #1 800454e: e7fb b.n 8004548 8004550: 2310 movs r3, #16 8004552: e7f9 b.n 8004548 8004554: f44f 7380 mov.w r3, #256 ; 0x100 8004558: e7f6 b.n 8004548 800455a: f44f 5380 mov.w r3, #4096 ; 0x1000 800455e: e7f3 b.n 8004548 8004560: f44f 3380 mov.w r3, #65536 ; 0x10000 8004564: e7f0 b.n 8004548 8004566: f44f 1380 mov.w r3, #1048576 ; 0x100000 800456a: e7ed b.n 8004548 HAL_StatusTypeDef status = HAL_OK; 800456c: 4618 mov r0, r3 } 800456e: bd10 pop {r4, pc} 8004570: 40020080 .word 0x40020080 8004574: 40020400 .word 0x40020400 8004578: 40020008 .word 0x40020008 800457c: 40020000 .word 0x40020000 08004580 : { 8004580: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004582: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8004584: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004586: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8004588: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 800458a: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800458c: 4095 lsls r5, r2 800458e: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 8004590: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004592: d055 beq.n 8004640 8004594: 074d lsls r5, r1, #29 8004596: d553 bpl.n 8004640 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8004598: 681a ldr r2, [r3, #0] 800459a: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 800459c: bf5e ittt pl 800459e: 681a ldrpl r2, [r3, #0] 80045a0: f022 0204 bicpl.w r2, r2, #4 80045a4: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80045a6: 4a60 ldr r2, [pc, #384] ; (8004728 ) 80045a8: 4293 cmp r3, r2 80045aa: d91f bls.n 80045ec 80045ac: f502 7262 add.w r2, r2, #904 ; 0x388 80045b0: 4293 cmp r3, r2 80045b2: d014 beq.n 80045de 80045b4: 3214 adds r2, #20 80045b6: 4293 cmp r3, r2 80045b8: d013 beq.n 80045e2 80045ba: 3214 adds r2, #20 80045bc: 4293 cmp r3, r2 80045be: d012 beq.n 80045e6 80045c0: 3214 adds r2, #20 80045c2: 4293 cmp r3, r2 80045c4: bf0c ite eq 80045c6: f44f 4380 moveq.w r3, #16384 ; 0x4000 80045ca: f44f 2380 movne.w r3, #262144 ; 0x40000 80045ce: 4a57 ldr r2, [pc, #348] ; (800472c ) 80045d0: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80045d2: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80045d4: 2b00 cmp r3, #0 80045d6: f000 80a5 beq.w 8004724 } 80045da: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80045dc: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80045de: 2304 movs r3, #4 80045e0: e7f5 b.n 80045ce 80045e2: 2340 movs r3, #64 ; 0x40 80045e4: e7f3 b.n 80045ce 80045e6: f44f 6380 mov.w r3, #1024 ; 0x400 80045ea: e7f0 b.n 80045ce 80045ec: 4950 ldr r1, [pc, #320] ; (8004730 ) 80045ee: 428b cmp r3, r1 80045f0: d016 beq.n 8004620 80045f2: 3114 adds r1, #20 80045f4: 428b cmp r3, r1 80045f6: d015 beq.n 8004624 80045f8: 3114 adds r1, #20 80045fa: 428b cmp r3, r1 80045fc: d014 beq.n 8004628 80045fe: 3114 adds r1, #20 8004600: 428b cmp r3, r1 8004602: d014 beq.n 800462e 8004604: 3114 adds r1, #20 8004606: 428b cmp r3, r1 8004608: d014 beq.n 8004634 800460a: 3114 adds r1, #20 800460c: 428b cmp r3, r1 800460e: d014 beq.n 800463a 8004610: 4293 cmp r3, r2 8004612: bf14 ite ne 8004614: f44f 2380 movne.w r3, #262144 ; 0x40000 8004618: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 800461c: 4a45 ldr r2, [pc, #276] ; (8004734 ) 800461e: e7d7 b.n 80045d0 8004620: 2304 movs r3, #4 8004622: e7fb b.n 800461c 8004624: 2340 movs r3, #64 ; 0x40 8004626: e7f9 b.n 800461c 8004628: f44f 6380 mov.w r3, #1024 ; 0x400 800462c: e7f6 b.n 800461c 800462e: f44f 4380 mov.w r3, #16384 ; 0x4000 8004632: e7f3 b.n 800461c 8004634: f44f 2380 mov.w r3, #262144 ; 0x40000 8004638: e7f0 b.n 800461c 800463a: f44f 0380 mov.w r3, #4194304 ; 0x400000 800463e: e7ed b.n 800461c else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8004640: 2502 movs r5, #2 8004642: 4095 lsls r5, r2 8004644: 4225 tst r5, r4 8004646: d057 beq.n 80046f8 8004648: 078d lsls r5, r1, #30 800464a: d555 bpl.n 80046f8 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800464c: 681a ldr r2, [r3, #0] 800464e: 0694 lsls r4, r2, #26 8004650: d406 bmi.n 8004660 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8004652: 681a ldr r2, [r3, #0] 8004654: f022 020a bic.w r2, r2, #10 8004658: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 800465a: 2201 movs r2, #1 800465c: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8004660: 4a31 ldr r2, [pc, #196] ; (8004728 ) 8004662: 4293 cmp r3, r2 8004664: d91e bls.n 80046a4 8004666: f502 7262 add.w r2, r2, #904 ; 0x388 800466a: 4293 cmp r3, r2 800466c: d013 beq.n 8004696 800466e: 3214 adds r2, #20 8004670: 4293 cmp r3, r2 8004672: d012 beq.n 800469a 8004674: 3214 adds r2, #20 8004676: 4293 cmp r3, r2 8004678: d011 beq.n 800469e 800467a: 3214 adds r2, #20 800467c: 4293 cmp r3, r2 800467e: bf0c ite eq 8004680: f44f 5300 moveq.w r3, #8192 ; 0x2000 8004684: f44f 3300 movne.w r3, #131072 ; 0x20000 8004688: 4a28 ldr r2, [pc, #160] ; (800472c ) 800468a: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 800468c: 2300 movs r3, #0 800468e: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 8004692: 6a83 ldr r3, [r0, #40] ; 0x28 8004694: e79e b.n 80045d4 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8004696: 2302 movs r3, #2 8004698: e7f6 b.n 8004688 800469a: 2320 movs r3, #32 800469c: e7f4 b.n 8004688 800469e: f44f 7300 mov.w r3, #512 ; 0x200 80046a2: e7f1 b.n 8004688 80046a4: 4922 ldr r1, [pc, #136] ; (8004730 ) 80046a6: 428b cmp r3, r1 80046a8: d016 beq.n 80046d8 80046aa: 3114 adds r1, #20 80046ac: 428b cmp r3, r1 80046ae: d015 beq.n 80046dc 80046b0: 3114 adds r1, #20 80046b2: 428b cmp r3, r1 80046b4: d014 beq.n 80046e0 80046b6: 3114 adds r1, #20 80046b8: 428b cmp r3, r1 80046ba: d014 beq.n 80046e6 80046bc: 3114 adds r1, #20 80046be: 428b cmp r3, r1 80046c0: d014 beq.n 80046ec 80046c2: 3114 adds r1, #20 80046c4: 428b cmp r3, r1 80046c6: d014 beq.n 80046f2 80046c8: 4293 cmp r3, r2 80046ca: bf14 ite ne 80046cc: f44f 3300 movne.w r3, #131072 ; 0x20000 80046d0: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80046d4: 4a17 ldr r2, [pc, #92] ; (8004734 ) 80046d6: e7d8 b.n 800468a 80046d8: 2302 movs r3, #2 80046da: e7fb b.n 80046d4 80046dc: 2320 movs r3, #32 80046de: e7f9 b.n 80046d4 80046e0: f44f 7300 mov.w r3, #512 ; 0x200 80046e4: e7f6 b.n 80046d4 80046e6: f44f 5300 mov.w r3, #8192 ; 0x2000 80046ea: e7f3 b.n 80046d4 80046ec: f44f 3300 mov.w r3, #131072 ; 0x20000 80046f0: e7f0 b.n 80046d4 80046f2: f44f 1300 mov.w r3, #2097152 ; 0x200000 80046f6: e7ed b.n 80046d4 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 80046f8: 2508 movs r5, #8 80046fa: 4095 lsls r5, r2 80046fc: 4225 tst r5, r4 80046fe: d011 beq.n 8004724 8004700: 0709 lsls r1, r1, #28 8004702: d50f bpl.n 8004724 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004704: 6819 ldr r1, [r3, #0] 8004706: f021 010e bic.w r1, r1, #14 800470a: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800470c: 2301 movs r3, #1 800470e: fa03 f202 lsl.w r2, r3, r2 8004712: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 8004714: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 8004716: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 800471a: 2300 movs r3, #0 800471c: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8004720: 6b03 ldr r3, [r0, #48] ; 0x30 8004722: e757 b.n 80045d4 } 8004724: bc70 pop {r4, r5, r6} 8004726: 4770 bx lr 8004728: 40020080 .word 0x40020080 800472c: 40020400 .word 0x40020400 8004730: 40020008 .word 0x40020008 8004734: 40020000 .word 0x40020000 08004738 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8004738: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 800473c: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800473e: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8004740: 4f6c ldr r7, [pc, #432] ; (80048f4 ) 8004742: 4b6d ldr r3, [pc, #436] ; (80048f8 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8004744: f8df e1b8 ldr.w lr, [pc, #440] ; 8004900 switch (GPIO_Init->Mode) 8004748: f8df c1b8 ldr.w ip, [pc, #440] ; 8004904 ioposition = (0x01U << position); 800474c: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8004750: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 8004752: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8004756: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 800475a: 45a0 cmp r8, r4 800475c: f040 8085 bne.w 800486a switch (GPIO_Init->Mode) 8004760: 684d ldr r5, [r1, #4] 8004762: 2d12 cmp r5, #18 8004764: f000 80b7 beq.w 80048d6 8004768: f200 808d bhi.w 8004886 800476c: 2d02 cmp r5, #2 800476e: f000 80af beq.w 80048d0 8004772: f200 8081 bhi.w 8004878 8004776: 2d00 cmp r5, #0 8004778: f000 8091 beq.w 800489e 800477c: 2d01 cmp r5, #1 800477e: f000 80a5 beq.w 80048cc MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8004782: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004786: 2cff cmp r4, #255 ; 0xff 8004788: bf93 iteet ls 800478a: 4682 movls sl, r0 800478c: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 8004790: 3d08 subhi r5, #8 8004792: f8d0 b000 ldrls.w fp, [r0] 8004796: bf92 itee ls 8004798: 00b5 lslls r5, r6, #2 800479a: f8d0 b004 ldrhi.w fp, [r0, #4] 800479e: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80047a0: fa09 f805 lsl.w r8, r9, r5 80047a4: ea2b 0808 bic.w r8, fp, r8 80047a8: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80047ac: bf88 it hi 80047ae: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80047b2: ea48 0505 orr.w r5, r8, r5 80047b6: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 80047ba: f8d1 a004 ldr.w sl, [r1, #4] 80047be: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 80047c2: d052 beq.n 800486a __HAL_RCC_AFIO_CLK_ENABLE(); 80047c4: 69bd ldr r5, [r7, #24] 80047c6: f026 0803 bic.w r8, r6, #3 80047ca: f045 0501 orr.w r5, r5, #1 80047ce: 61bd str r5, [r7, #24] 80047d0: 69bd ldr r5, [r7, #24] 80047d2: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 80047d6: f005 0501 and.w r5, r5, #1 80047da: 9501 str r5, [sp, #4] 80047dc: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80047e0: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 80047e4: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80047e6: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 80047ea: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80047ee: fa09 f90b lsl.w r9, r9, fp 80047f2: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80047f6: 4d41 ldr r5, [pc, #260] ; (80048fc ) 80047f8: 42a8 cmp r0, r5 80047fa: d071 beq.n 80048e0 80047fc: f505 6580 add.w r5, r5, #1024 ; 0x400 8004800: 42a8 cmp r0, r5 8004802: d06f beq.n 80048e4 8004804: f505 6580 add.w r5, r5, #1024 ; 0x400 8004808: 42a8 cmp r0, r5 800480a: d06d beq.n 80048e8 800480c: f505 6580 add.w r5, r5, #1024 ; 0x400 8004810: 42a8 cmp r0, r5 8004812: d06b beq.n 80048ec 8004814: f505 6580 add.w r5, r5, #1024 ; 0x400 8004818: 42a8 cmp r0, r5 800481a: d069 beq.n 80048f0 800481c: 4570 cmp r0, lr 800481e: bf0c ite eq 8004820: 2505 moveq r5, #5 8004822: 2506 movne r5, #6 8004824: fa05 f50b lsl.w r5, r5, fp 8004828: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 800482c: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8004830: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8004832: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8004836: bf14 ite ne 8004838: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 800483a: 43a5 biceq r5, r4 800483c: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 800483e: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8004840: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8004844: bf14 ite ne 8004846: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8004848: 43a5 biceq r5, r4 800484a: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 800484c: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800484e: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8004852: bf14 ite ne 8004854: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8004856: 43a5 biceq r5, r4 8004858: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 800485a: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 800485c: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8004860: bf14 ite ne 8004862: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8004864: ea25 0404 biceq.w r4, r5, r4 8004868: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 800486a: 3601 adds r6, #1 800486c: 2e10 cmp r6, #16 800486e: f47f af6d bne.w 800474c } } } } } 8004872: b003 add sp, #12 8004874: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8004878: 2d03 cmp r5, #3 800487a: d025 beq.n 80048c8 800487c: 2d11 cmp r5, #17 800487e: d180 bne.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8004880: 68ca ldr r2, [r1, #12] 8004882: 3204 adds r2, #4 break; 8004884: e77d b.n 8004782 switch (GPIO_Init->Mode) 8004886: 4565 cmp r5, ip 8004888: d009 beq.n 800489e 800488a: d812 bhi.n 80048b2 800488c: f8df 9078 ldr.w r9, [pc, #120] ; 8004908 8004890: 454d cmp r5, r9 8004892: d004 beq.n 800489e 8004894: f509 3980 add.w r9, r9, #65536 ; 0x10000 8004898: 454d cmp r5, r9 800489a: f47f af72 bne.w 8004782 if (GPIO_Init->Pull == GPIO_NOPULL) 800489e: 688a ldr r2, [r1, #8] 80048a0: b1e2 cbz r2, 80048dc else if (GPIO_Init->Pull == GPIO_PULLUP) 80048a2: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 80048a4: bf0c ite eq 80048a6: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 80048aa: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80048ae: 2208 movs r2, #8 80048b0: e767 b.n 8004782 switch (GPIO_Init->Mode) 80048b2: f8df 9058 ldr.w r9, [pc, #88] ; 800490c 80048b6: 454d cmp r5, r9 80048b8: d0f1 beq.n 800489e 80048ba: f509 3980 add.w r9, r9, #65536 ; 0x10000 80048be: 454d cmp r5, r9 80048c0: d0ed beq.n 800489e 80048c2: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 80048c6: e7e7 b.n 8004898 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80048c8: 2200 movs r2, #0 80048ca: e75a b.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 80048cc: 68ca ldr r2, [r1, #12] break; 80048ce: e758 b.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 80048d0: 68ca ldr r2, [r1, #12] 80048d2: 3208 adds r2, #8 break; 80048d4: e755 b.n 8004782 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80048d6: 68ca ldr r2, [r1, #12] 80048d8: 320c adds r2, #12 break; 80048da: e752 b.n 8004782 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80048dc: 2204 movs r2, #4 80048de: e750 b.n 8004782 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80048e0: 2500 movs r5, #0 80048e2: e79f b.n 8004824 80048e4: 2501 movs r5, #1 80048e6: e79d b.n 8004824 80048e8: 2502 movs r5, #2 80048ea: e79b b.n 8004824 80048ec: 2503 movs r5, #3 80048ee: e799 b.n 8004824 80048f0: 2504 movs r5, #4 80048f2: e797 b.n 8004824 80048f4: 40021000 .word 0x40021000 80048f8: 40010400 .word 0x40010400 80048fc: 40010800 .word 0x40010800 8004900: 40011c00 .word 0x40011c00 8004904: 10210000 .word 0x10210000 8004908: 10110000 .word 0x10110000 800490c: 10310000 .word 0x10310000 08004910 : GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8004910: 6883 ldr r3, [r0, #8] 8004912: 4219 tst r1, r3 else { bitstatus = GPIO_PIN_RESET; } return bitstatus; } 8004914: bf14 ite ne 8004916: 2001 movne r0, #1 8004918: 2000 moveq r0, #0 800491a: 4770 bx lr 0800491c : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 800491c: b10a cbz r2, 8004922 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 800491e: 6101 str r1, [r0, #16] 8004920: 4770 bx lr 8004922: 0409 lsls r1, r1, #16 8004924: e7fb b.n 800491e 08004926 : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 8004926: 68c3 ldr r3, [r0, #12] 8004928: 4059 eors r1, r3 800492a: 60c1 str r1, [r0, #12] 800492c: 4770 bx lr 0800492e : * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 800492e: 6802 ldr r2, [r0, #0] 8004930: 6953 ldr r3, [r2, #20] 8004932: f413 6380 ands.w r3, r3, #1024 ; 0x400 8004936: d00d beq.n 8004954 { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8004938: f46f 6380 mvn.w r3, #1024 ; 0x400 800493c: 6153 str r3, [r2, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 800493e: 2304 movs r3, #4 hi2c->PreviousState = I2C_STATE_NONE; hi2c->State= HAL_I2C_STATE_READY; 8004940: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_AF; 8004942: 6403 str r3, [r0, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8004944: 2300 movs r3, #0 8004946: 6303 str r3, [r0, #48] ; 0x30 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8004948: f880 303c strb.w r3, [r0, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 800494c: f880 203d strb.w r2, [r0, #61] ; 0x3d return HAL_ERROR; 8004950: 2001 movs r0, #1 8004952: 4770 bx lr } return HAL_OK; 8004954: 4618 mov r0, r3 } 8004956: 4770 bx lr 08004958 : { 8004958: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800495c: 4604 mov r4, r0 800495e: 4617 mov r7, r2 8004960: 4699 mov r9, r3 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8004962: f3c1 4807 ubfx r8, r1, #16, #8 8004966: b28e uxth r6, r1 8004968: 6825 ldr r5, [r4, #0] 800496a: f1b8 0f01 cmp.w r8, #1 800496e: bf0c ite eq 8004970: 696b ldreq r3, [r5, #20] 8004972: 69ab ldrne r3, [r5, #24] 8004974: ea36 0303 bics.w r3, r6, r3 8004978: bf14 ite ne 800497a: 2001 movne r0, #1 800497c: 2000 moveq r0, #0 800497e: b908 cbnz r0, 8004984 } 8004980: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8004984: 696b ldr r3, [r5, #20] 8004986: 055a lsls r2, r3, #21 8004988: d512 bpl.n 80049b0 hi2c->Instance->CR1 |= I2C_CR1_STOP; 800498a: 682b ldr r3, [r5, #0] hi2c->State= HAL_I2C_STATE_READY; 800498c: 2220 movs r2, #32 hi2c->Instance->CR1 |= I2C_CR1_STOP; 800498e: f443 7300 orr.w r3, r3, #512 ; 0x200 8004992: 602b str r3, [r5, #0] __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8004994: f46f 6380 mvn.w r3, #1024 ; 0x400 8004998: 616b str r3, [r5, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 800499a: 2304 movs r3, #4 800499c: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 800499e: 2300 movs r3, #0 return HAL_ERROR; 80049a0: 2001 movs r0, #1 hi2c->PreviousState = I2C_STATE_NONE; 80049a2: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 80049a4: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 80049a8: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 80049ac: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 80049b0: 1c7b adds r3, r7, #1 80049b2: d0d9 beq.n 8004968 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80049b4: b94f cbnz r7, 80049ca hi2c->PreviousState = I2C_STATE_NONE; 80049b6: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 80049b8: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 80049ba: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 80049bc: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 80049c0: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_TIMEOUT; 80049c4: 2003 movs r0, #3 80049c6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80049ca: f7ff fc6d bl 80042a8 80049ce: eba0 0009 sub.w r0, r0, r9 80049d2: 4287 cmp r7, r0 80049d4: d2c8 bcs.n 8004968 80049d6: e7ee b.n 80049b6 080049d8 : { 80049d8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80049dc: 4604 mov r4, r0 80049de: 4690 mov r8, r2 80049e0: 461f mov r7, r3 80049e2: 9e08 ldr r6, [sp, #32] while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) 80049e4: f3c1 4907 ubfx r9, r1, #16, #8 80049e8: b28d uxth r5, r1 80049ea: 6823 ldr r3, [r4, #0] 80049ec: f1b9 0f01 cmp.w r9, #1 80049f0: bf0c ite eq 80049f2: 695b ldreq r3, [r3, #20] 80049f4: 699b ldrne r3, [r3, #24] 80049f6: ea35 0303 bics.w r3, r5, r3 80049fa: bf0c ite eq 80049fc: 2301 moveq r3, #1 80049fe: 2300 movne r3, #0 8004a00: 4543 cmp r3, r8 8004a02: d002 beq.n 8004a0a return HAL_OK; 8004a04: 2000 movs r0, #0 } 8004a06: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 8004a0a: 1c7b adds r3, r7, #1 8004a0c: d0ed beq.n 80049ea if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8004a0e: b95f cbnz r7, 8004a28 hi2c->PreviousState = I2C_STATE_NONE; 8004a10: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 8004a12: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 8004a14: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8004a16: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8004a1a: f884 203d strb.w r2, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8004a1e: 2003 movs r0, #3 hi2c->Mode = HAL_I2C_MODE_NONE; 8004a20: f884 303e strb.w r3, [r4, #62] ; 0x3e 8004a24: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8004a28: f7ff fc3e bl 80042a8 8004a2c: 1b80 subs r0, r0, r6 8004a2e: 4287 cmp r7, r0 8004a30: d2db bcs.n 80049ea 8004a32: e7ed b.n 8004a10 08004a34 : { 8004a34: b570 push {r4, r5, r6, lr} 8004a36: 4604 mov r4, r0 8004a38: 460d mov r5, r1 8004a3a: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8004a3c: 6823 ldr r3, [r4, #0] 8004a3e: 695b ldr r3, [r3, #20] 8004a40: 061b lsls r3, r3, #24 8004a42: d501 bpl.n 8004a48 return HAL_OK; 8004a44: 2000 movs r0, #0 8004a46: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8004a48: 4620 mov r0, r4 8004a4a: f7ff ff70 bl 800492e 8004a4e: b9a8 cbnz r0, 8004a7c if(Timeout != HAL_MAX_DELAY) 8004a50: 1c6a adds r2, r5, #1 8004a52: d0f3 beq.n 8004a3c if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004a54: b965 cbnz r5, 8004a70 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004a56: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8004a58: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004a5a: f043 0320 orr.w r3, r3, #32 8004a5e: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8004a60: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 8004a62: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 8004a64: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8004a66: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8004a6a: f884 203d strb.w r2, [r4, #61] ; 0x3d 8004a6e: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004a70: f7ff fc1a bl 80042a8 8004a74: 1b80 subs r0, r0, r6 8004a76: 4285 cmp r5, r0 8004a78: d2e0 bcs.n 8004a3c 8004a7a: e7ec b.n 8004a56 return HAL_ERROR; 8004a7c: 2001 movs r0, #1 } 8004a7e: bd70 pop {r4, r5, r6, pc} 08004a80 : { 8004a80: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 8004a84: 4615 mov r5, r2 hi2c->Instance->CR1 |= I2C_CR1_START; 8004a86: 6802 ldr r2, [r0, #0] { 8004a88: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_START; 8004a8a: 6813 ldr r3, [r2, #0] { 8004a8c: 9e0b ldr r6, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_START; 8004a8e: f443 7380 orr.w r3, r3, #256 ; 0x100 8004a92: 6013 str r3, [r2, #0] { 8004a94: 460f mov r7, r1 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004a96: 9600 str r6, [sp, #0] 8004a98: 9b0a ldr r3, [sp, #40] ; 0x28 8004a9a: 2200 movs r2, #0 8004a9c: f04f 1101 mov.w r1, #65537 ; 0x10001 { 8004aa0: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004aa2: f7ff ff99 bl 80049d8 8004aa6: b968 cbnz r0, 8004ac4 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8004aa8: 6823 ldr r3, [r4, #0] 8004aaa: f007 07fe and.w r7, r7, #254 ; 0xfe 8004aae: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8004ab0: 9a0a ldr r2, [sp, #40] ; 0x28 8004ab2: 4633 mov r3, r6 8004ab4: 491a ldr r1, [pc, #104] ; (8004b20 ) 8004ab6: 4620 mov r0, r4 8004ab8: f7ff ff4e bl 8004958 8004abc: b130 cbz r0, 8004acc if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004abe: 6c23 ldr r3, [r4, #64] ; 0x40 8004ac0: 2b04 cmp r3, #4 8004ac2: d018 beq.n 8004af6 return HAL_TIMEOUT; 8004ac4: 2003 movs r0, #3 } 8004ac6: b004 add sp, #16 8004ac8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004acc: 6823 ldr r3, [r4, #0] 8004ace: 9003 str r0, [sp, #12] 8004ad0: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004ad2: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004ad4: 9203 str r2, [sp, #12] 8004ad6: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004ad8: 4632 mov r2, r6 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004ada: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004adc: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004ade: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004ae0: f7ff ffa8 bl 8004a34 8004ae4: b148 cbz r0, 8004afa if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004ae6: 6c23 ldr r3, [r4, #64] ; 0x40 8004ae8: 2b04 cmp r3, #4 8004aea: d1eb bne.n 8004ac4 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004aec: 6822 ldr r2, [r4, #0] 8004aee: 6813 ldr r3, [r2, #0] 8004af0: f443 7300 orr.w r3, r3, #512 ; 0x200 8004af4: 6013 str r3, [r2, #0] return HAL_ERROR; 8004af6: 2001 movs r0, #1 8004af8: e7e5 b.n 8004ac6 if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8004afa: f1b8 0f01 cmp.w r8, #1 8004afe: 6823 ldr r3, [r4, #0] 8004b00: d102 bne.n 8004b08 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004b02: b2ed uxtb r5, r5 8004b04: 611d str r5, [r3, #16] 8004b06: e7de b.n 8004ac6 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8004b08: 0a2a lsrs r2, r5, #8 8004b0a: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004b0c: 990a ldr r1, [sp, #40] ; 0x28 8004b0e: 4632 mov r2, r6 8004b10: 4620 mov r0, r4 8004b12: f7ff ff8f bl 8004a34 8004b16: 2800 cmp r0, #0 8004b18: d1e5 bne.n 8004ae6 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004b1a: 6823 ldr r3, [r4, #0] 8004b1c: e7f1 b.n 8004b02 8004b1e: bf00 nop 8004b20: 00010002 .word 0x00010002 08004b24 : { 8004b24: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 8004b28: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8004b2a: 6803 ldr r3, [r0, #0] { 8004b2c: 4616 mov r6, r2 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8004b2e: 681a ldr r2, [r3, #0] { 8004b30: 9d0b ldr r5, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_ACK; 8004b32: f442 6280 orr.w r2, r2, #1024 ; 0x400 8004b36: 601a str r2, [r3, #0] hi2c->Instance->CR1 |= I2C_CR1_START; 8004b38: 681a ldr r2, [r3, #0] { 8004b3a: 460f mov r7, r1 hi2c->Instance->CR1 |= I2C_CR1_START; 8004b3c: f442 7280 orr.w r2, r2, #256 ; 0x100 8004b40: 601a str r2, [r3, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004b42: f04f 1101 mov.w r1, #65537 ; 0x10001 8004b46: 9500 str r5, [sp, #0] 8004b48: 9b0a ldr r3, [sp, #40] ; 0x28 8004b4a: 2200 movs r2, #0 { 8004b4c: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004b4e: f7ff ff43 bl 80049d8 8004b52: b980 cbnz r0, 8004b76 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8004b54: 6823 ldr r3, [r4, #0] 8004b56: b2ff uxtb r7, r7 8004b58: f007 02fe and.w r2, r7, #254 ; 0xfe 8004b5c: 611a str r2, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8004b5e: 492d ldr r1, [pc, #180] ; (8004c14 ) 8004b60: 462b mov r3, r5 8004b62: 9a0a ldr r2, [sp, #40] ; 0x28 8004b64: 4620 mov r0, r4 8004b66: f7ff fef7 bl 8004958 8004b6a: b140 cbz r0, 8004b7e if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004b6c: 6c23 ldr r3, [r4, #64] ; 0x40 8004b6e: 2b04 cmp r3, #4 8004b70: d101 bne.n 8004b76 return HAL_ERROR; 8004b72: 2001 movs r0, #1 8004b74: e000 b.n 8004b78 return HAL_TIMEOUT; 8004b76: 2003 movs r0, #3 } 8004b78: b004 add sp, #16 8004b7a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004b7e: 6823 ldr r3, [r4, #0] 8004b80: 9003 str r0, [sp, #12] 8004b82: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004b84: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004b86: 9203 str r2, [sp, #12] 8004b88: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004b8a: 462a mov r2, r5 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004b8c: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004b8e: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004b90: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004b92: f7ff ff4f bl 8004a34 8004b96: b140 cbz r0, 8004baa if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004b98: 6c23 ldr r3, [r4, #64] ; 0x40 8004b9a: 2b04 cmp r3, #4 8004b9c: d1eb bne.n 8004b76 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004b9e: 6822 ldr r2, [r4, #0] 8004ba0: 6813 ldr r3, [r2, #0] 8004ba2: f443 7300 orr.w r3, r3, #512 ; 0x200 8004ba6: 6013 str r3, [r2, #0] 8004ba8: e7e3 b.n 8004b72 if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8004baa: f1b8 0f01 cmp.w r8, #1 8004bae: 6823 ldr r3, [r4, #0] 8004bb0: d124 bne.n 8004bfc hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004bb2: b2f6 uxtb r6, r6 8004bb4: 611e str r6, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004bb6: 462a mov r2, r5 8004bb8: 990a ldr r1, [sp, #40] ; 0x28 8004bba: 4620 mov r0, r4 8004bbc: f7ff ff3a bl 8004a34 8004bc0: 4602 mov r2, r0 8004bc2: 2800 cmp r0, #0 8004bc4: d1e8 bne.n 8004b98 hi2c->Instance->CR1 |= I2C_CR1_START; 8004bc6: 6821 ldr r1, [r4, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004bc8: 4620 mov r0, r4 hi2c->Instance->CR1 |= I2C_CR1_START; 8004bca: 680b ldr r3, [r1, #0] 8004bcc: f443 7380 orr.w r3, r3, #256 ; 0x100 8004bd0: 600b str r3, [r1, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8004bd2: 9500 str r5, [sp, #0] 8004bd4: 9b0a ldr r3, [sp, #40] ; 0x28 8004bd6: f04f 1101 mov.w r1, #65537 ; 0x10001 8004bda: f7ff fefd bl 80049d8 8004bde: 2800 cmp r0, #0 8004be0: d1c9 bne.n 8004b76 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 8004be2: 6823 ldr r3, [r4, #0] 8004be4: f047 0701 orr.w r7, r7, #1 8004be8: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8004bea: 9a0a ldr r2, [sp, #40] ; 0x28 8004bec: 462b mov r3, r5 8004bee: 4909 ldr r1, [pc, #36] ; (8004c14 ) 8004bf0: 4620 mov r0, r4 8004bf2: f7ff feb1 bl 8004958 8004bf6: 2800 cmp r0, #0 8004bf8: d1b8 bne.n 8004b6c 8004bfa: e7bd b.n 8004b78 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8004bfc: 0a32 lsrs r2, r6, #8 8004bfe: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004c00: 990a ldr r1, [sp, #40] ; 0x28 8004c02: 462a mov r2, r5 8004c04: 4620 mov r0, r4 8004c06: f7ff ff15 bl 8004a34 8004c0a: 2800 cmp r0, #0 8004c0c: d1c4 bne.n 8004b98 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8004c0e: 6823 ldr r3, [r4, #0] 8004c10: e7cf b.n 8004bb2 8004c12: bf00 nop 8004c14: 00010002 .word 0x00010002 08004c18 : { 8004c18: b570 push {r4, r5, r6, lr} 8004c1a: 4604 mov r4, r0 8004c1c: 460d mov r5, r1 8004c1e: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 8004c20: 6820 ldr r0, [r4, #0] 8004c22: 6943 ldr r3, [r0, #20] 8004c24: f013 0340 ands.w r3, r3, #64 ; 0x40 8004c28: d001 beq.n 8004c2e return HAL_OK; 8004c2a: 2000 movs r0, #0 } 8004c2c: bd70 pop {r4, r5, r6, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 8004c2e: 6942 ldr r2, [r0, #20] 8004c30: 06d2 lsls r2, r2, #27 8004c32: d50b bpl.n 8004c4c __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8004c34: f06f 0210 mvn.w r2, #16 8004c38: 6142 str r2, [r0, #20] hi2c->State= HAL_I2C_STATE_READY; 8004c3a: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004c3c: 6423 str r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004c3e: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->PreviousState = I2C_STATE_NONE; 8004c42: 6323 str r3, [r4, #48] ; 0x30 return HAL_ERROR; 8004c44: 2001 movs r0, #1 hi2c->State= HAL_I2C_STATE_READY; 8004c46: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 8004c4a: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004c4c: b95d cbnz r5, 8004c66 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004c4e: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004c50: 2003 movs r0, #3 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004c52: f043 0320 orr.w r3, r3, #32 8004c56: 6423 str r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8004c58: 2320 movs r3, #32 8004c5a: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8004c5e: 2300 movs r3, #0 8004c60: f884 303c strb.w r3, [r4, #60] ; 0x3c 8004c64: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004c66: f7ff fb1f bl 80042a8 8004c6a: 1b80 subs r0, r0, r6 8004c6c: 4285 cmp r5, r0 8004c6e: d2d7 bcs.n 8004c20 8004c70: e7ed b.n 8004c4e 08004c72 : { 8004c72: b570 push {r4, r5, r6, lr} 8004c74: 4604 mov r4, r0 8004c76: 460d mov r5, r1 8004c78: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8004c7a: 6823 ldr r3, [r4, #0] 8004c7c: 695b ldr r3, [r3, #20] 8004c7e: 075b lsls r3, r3, #29 8004c80: d501 bpl.n 8004c86 return HAL_OK; 8004c82: 2000 movs r0, #0 8004c84: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8004c86: 4620 mov r0, r4 8004c88: f7ff fe51 bl 800492e 8004c8c: b9a8 cbnz r0, 8004cba if(Timeout != HAL_MAX_DELAY) 8004c8e: 1c6a adds r2, r5, #1 8004c90: d0f3 beq.n 8004c7a if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004c92: b965 cbnz r5, 8004cae hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004c94: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8004c96: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004c98: f043 0320 orr.w r3, r3, #32 8004c9c: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8004c9e: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 8004ca0: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 8004ca2: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8004ca4: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8004ca8: f884 203d strb.w r2, [r4, #61] ; 0x3d 8004cac: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8004cae: f7ff fafb bl 80042a8 8004cb2: 1b80 subs r0, r0, r6 8004cb4: 4285 cmp r5, r0 8004cb6: d2e0 bcs.n 8004c7a 8004cb8: e7ec b.n 8004c94 return HAL_ERROR; 8004cba: 2001 movs r0, #1 } 8004cbc: bd70 pop {r4, r5, r6, pc} ... 08004cc0 : { 8004cc0: b538 push {r3, r4, r5, lr} if(hi2c == NULL) 8004cc2: 4604 mov r4, r0 8004cc4: b908 cbnz r0, 8004cca return HAL_ERROR; 8004cc6: 2001 movs r0, #1 8004cc8: bd38 pop {r3, r4, r5, pc} if(hi2c->State == HAL_I2C_STATE_RESET) 8004cca: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8004cce: f003 02ff and.w r2, r3, #255 ; 0xff 8004cd2: b91b cbnz r3, 8004cdc hi2c->Lock = HAL_UNLOCKED; 8004cd4: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_I2C_MspInit(hi2c); 8004cd8: f002 fdc8 bl 800786c hi2c->State = HAL_I2C_STATE_BUSY; 8004cdc: 2324 movs r3, #36 ; 0x24 __HAL_I2C_DISABLE(hi2c); 8004cde: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 8004ce0: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8004ce4: 6813 ldr r3, [r2, #0] 8004ce6: f023 0301 bic.w r3, r3, #1 8004cea: 6013 str r3, [r2, #0] pclk1 = HAL_RCC_GetPCLK1Freq(); 8004cec: f000 fc98 bl 8005620 if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8004cf0: 6863 ldr r3, [r4, #4] 8004cf2: 4a2f ldr r2, [pc, #188] ; (8004db0 ) 8004cf4: 4293 cmp r3, r2 8004cf6: d830 bhi.n 8004d5a 8004cf8: 4a2e ldr r2, [pc, #184] ; (8004db4 ) 8004cfa: 4290 cmp r0, r2 8004cfc: d9e3 bls.n 8004cc6 freqrange = I2C_FREQRANGE(pclk1); 8004cfe: 4a2e ldr r2, [pc, #184] ; (8004db8 ) hi2c->Instance->CR2 = freqrange; 8004d00: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 8004d02: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8004d06: 604a str r2, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d08: 3201 adds r2, #1 8004d0a: 620a str r2, [r1, #32] hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8004d0c: 4a28 ldr r2, [pc, #160] ; (8004db0 ) 8004d0e: 3801 subs r0, #1 8004d10: 4293 cmp r3, r2 8004d12: d832 bhi.n 8004d7a 8004d14: 005b lsls r3, r3, #1 8004d16: fbb0 f0f3 udiv r0, r0, r3 8004d1a: 1c43 adds r3, r0, #1 8004d1c: f3c3 030b ubfx r3, r3, #0, #12 8004d20: 2b04 cmp r3, #4 8004d22: bf38 it cc 8004d24: 2304 movcc r3, #4 8004d26: 61cb str r3, [r1, #28] hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004d28: 6a22 ldr r2, [r4, #32] 8004d2a: 69e3 ldr r3, [r4, #28] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004d2c: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004d2e: 4313 orrs r3, r2 8004d30: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 8004d32: 68e2 ldr r2, [r4, #12] 8004d34: 6923 ldr r3, [r4, #16] 8004d36: 4313 orrs r3, r2 8004d38: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8004d3a: 69a2 ldr r2, [r4, #24] 8004d3c: 6963 ldr r3, [r4, #20] 8004d3e: 4313 orrs r3, r2 8004d40: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 8004d42: 680b ldr r3, [r1, #0] 8004d44: f043 0301 orr.w r3, r3, #1 8004d48: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8004d4a: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004d4c: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 8004d4e: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8004d52: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8004d54: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8004d58: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8004d5a: 4a18 ldr r2, [pc, #96] ; (8004dbc ) 8004d5c: 4290 cmp r0, r2 8004d5e: d9b2 bls.n 8004cc6 freqrange = I2C_FREQRANGE(pclk1); 8004d60: 4d15 ldr r5, [pc, #84] ; (8004db8 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d62: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 8004d66: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 8004d6a: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d6c: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 8004d6e: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004d70: f44f 757a mov.w r5, #1000 ; 0x3e8 8004d74: fbb2 f2f5 udiv r2, r2, r5 8004d78: e7c6 b.n 8004d08 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8004d7a: 68a2 ldr r2, [r4, #8] 8004d7c: b952 cbnz r2, 8004d94 8004d7e: eb03 0343 add.w r3, r3, r3, lsl #1 8004d82: fbb0 f0f3 udiv r0, r0, r3 8004d86: 1c43 adds r3, r0, #1 8004d88: f3c3 030b ubfx r3, r3, #0, #12 8004d8c: b16b cbz r3, 8004daa 8004d8e: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8004d92: e7c8 b.n 8004d26 8004d94: 2219 movs r2, #25 8004d96: 4353 muls r3, r2 8004d98: fbb0 f0f3 udiv r0, r0, r3 8004d9c: 1c43 adds r3, r0, #1 8004d9e: f3c3 030b ubfx r3, r3, #0, #12 8004da2: b113 cbz r3, 8004daa 8004da4: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8004da8: e7bd b.n 8004d26 8004daa: 2301 movs r3, #1 8004dac: e7bb b.n 8004d26 8004dae: bf00 nop 8004db0: 000186a0 .word 0x000186a0 8004db4: 001e847f .word 0x001e847f 8004db8: 000f4240 .word 0x000f4240 8004dbc: 003d08ff .word 0x003d08ff 08004dc0 : { 8004dc0: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr} 8004dc4: 4604 mov r4, r0 8004dc6: 469a mov sl, r3 8004dc8: 4688 mov r8, r1 8004dca: 4691 mov r9, r2 8004dcc: 9e0c ldr r6, [sp, #48] ; 0x30 tickstart = HAL_GetTick(); 8004dce: f7ff fa6b bl 80042a8 if(hi2c->State == HAL_I2C_STATE_READY) 8004dd2: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8004dd6: 4605 mov r5, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8004dd8: 2b20 cmp r3, #32 8004dda: d003 beq.n 8004de4 return HAL_BUSY; 8004ddc: 2002 movs r0, #2 } 8004dde: b002 add sp, #8 8004de0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8004de4: 9000 str r0, [sp, #0] 8004de6: 2319 movs r3, #25 8004de8: 2201 movs r2, #1 8004dea: 493e ldr r1, [pc, #248] ; (8004ee4 ) 8004dec: 4620 mov r0, r4 8004dee: f7ff fdf3 bl 80049d8 8004df2: 2800 cmp r0, #0 8004df4: d1f2 bne.n 8004ddc __HAL_LOCK(hi2c); 8004df6: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 8004dfa: 2b01 cmp r3, #1 8004dfc: d0ee beq.n 8004ddc 8004dfe: 2301 movs r3, #1 8004e00: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004e04: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004e06: 2700 movs r7, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004e08: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e0a: 4641 mov r1, r8 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004e0c: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 8004e0e: bf58 it pl 8004e10: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e12: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8004e14: bf5c itt pl 8004e16: f042 0201 orrpl.w r2, r2, #1 8004e1a: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 8004e1c: 681a ldr r2, [r3, #0] 8004e1e: f422 6200 bic.w r2, r2, #2048 ; 0x800 8004e22: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 8004e24: 2321 movs r3, #33 ; 0x21 8004e26: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8004e2a: 2340 movs r3, #64 ; 0x40 8004e2c: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 8004e30: 9b0a ldr r3, [sp, #40] ; 0x28 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004e32: 6427 str r7, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 8004e34: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 8004e36: f8bd 302c ldrh.w r3, [sp, #44] ; 0x2c if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e3a: 9501 str r5, [sp, #4] hi2c->XferCount = Size; 8004e3c: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004e3e: 4b2a ldr r3, [pc, #168] ; (8004ee8 ) if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e40: 9600 str r6, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004e42: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 8004e44: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e46: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 8004e48: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004e4a: 4653 mov r3, sl 8004e4c: f7ff fe18 bl 8004a80 8004e50: 2800 cmp r0, #0 8004e52: d02a beq.n 8004eaa if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004e54: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004e56: f884 703c strb.w r7, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004e5a: 2b04 cmp r3, #4 8004e5c: d107 bne.n 8004e6e return HAL_ERROR; 8004e5e: 2001 movs r0, #1 8004e60: e7bd b.n 8004dde if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004e62: f7ff fde7 bl 8004a34 8004e66: b120 cbz r0, 8004e72 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004e68: 6c23 ldr r3, [r4, #64] ; 0x40 8004e6a: 2b04 cmp r3, #4 8004e6c: d034 beq.n 8004ed8 return HAL_TIMEOUT; 8004e6e: 2003 movs r0, #3 8004e70: e7b5 b.n 8004dde hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004e72: 6a61 ldr r1, [r4, #36] ; 0x24 8004e74: 6827 ldr r7, [r4, #0] 8004e76: 1c4b adds r3, r1, #1 8004e78: 6263 str r3, [r4, #36] ; 0x24 8004e7a: 780b ldrb r3, [r1, #0] hi2c->XferSize--; 8004e7c: 8d22 ldrh r2, [r4, #40] ; 0x28 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004e7e: 613b str r3, [r7, #16] hi2c->XferCount--; 8004e80: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 8004e82: 1e50 subs r0, r2, #1 hi2c->XferCount--; 8004e84: 3b01 subs r3, #1 8004e86: b29b uxth r3, r3 8004e88: 8563 strh r3, [r4, #42] ; 0x2a if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8004e8a: 697b ldr r3, [r7, #20] hi2c->XferSize--; 8004e8c: b280 uxth r0, r0 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8004e8e: 075b lsls r3, r3, #29 hi2c->XferSize--; 8004e90: 8520 strh r0, [r4, #40] ; 0x28 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8004e92: d50a bpl.n 8004eaa 8004e94: b148 cbz r0, 8004eaa hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004e96: 1c8b adds r3, r1, #2 8004e98: 6263 str r3, [r4, #36] ; 0x24 8004e9a: 784b ldrb r3, [r1, #1] hi2c->XferSize--; 8004e9c: 3a02 subs r2, #2 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8004e9e: 613b str r3, [r7, #16] hi2c->XferCount--; 8004ea0: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 8004ea2: 8522 strh r2, [r4, #40] ; 0x28 hi2c->XferCount--; 8004ea4: 3b01 subs r3, #1 8004ea6: b29b uxth r3, r3 8004ea8: 8563 strh r3, [r4, #42] ; 0x2a while(hi2c->XferSize > 0U) 8004eaa: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004eac: 462a mov r2, r5 8004eae: 4631 mov r1, r6 8004eb0: 4620 mov r0, r4 while(hi2c->XferSize > 0U) 8004eb2: 2b00 cmp r3, #0 8004eb4: d1d5 bne.n 8004e62 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004eb6: f7ff fedc bl 8004c72 8004eba: 2800 cmp r0, #0 8004ebc: d1d4 bne.n 8004e68 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004ebe: 6822 ldr r2, [r4, #0] 8004ec0: 6813 ldr r3, [r2, #0] 8004ec2: f443 7300 orr.w r3, r3, #512 ; 0x200 8004ec6: 6013 str r3, [r2, #0] hi2c->State = HAL_I2C_STATE_READY; 8004ec8: 2320 movs r3, #32 __HAL_UNLOCK(hi2c); 8004eca: f884 003c strb.w r0, [r4, #60] ; 0x3c hi2c->State = HAL_I2C_STATE_READY; 8004ece: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8004ed2: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8004ed6: e782 b.n 8004dde hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004ed8: 6822 ldr r2, [r4, #0] 8004eda: 6813 ldr r3, [r2, #0] 8004edc: f443 7300 orr.w r3, r3, #512 ; 0x200 8004ee0: 6013 str r3, [r2, #0] 8004ee2: e7bc b.n 8004e5e 8004ee4: 00100002 .word 0x00100002 8004ee8: ffff0000 .word 0xffff0000 08004eec : { 8004eec: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8004ef0: 4604 mov r4, r0 8004ef2: b086 sub sp, #24 8004ef4: 469a mov sl, r3 8004ef6: 460d mov r5, r1 8004ef8: 4691 mov r9, r2 8004efa: 9f10 ldr r7, [sp, #64] ; 0x40 tickstart = HAL_GetTick(); 8004efc: f7ff f9d4 bl 80042a8 if(hi2c->State == HAL_I2C_STATE_READY) 8004f00: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8004f04: 4606 mov r6, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8004f06: 2b20 cmp r3, #32 8004f08: d004 beq.n 8004f14 return HAL_BUSY; 8004f0a: 2502 movs r5, #2 } 8004f0c: 4628 mov r0, r5 8004f0e: b006 add sp, #24 8004f10: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8004f14: 9000 str r0, [sp, #0] 8004f16: 2319 movs r3, #25 8004f18: 2201 movs r2, #1 8004f1a: 4981 ldr r1, [pc, #516] ; (8005120 ) 8004f1c: 4620 mov r0, r4 8004f1e: f7ff fd5b bl 80049d8 8004f22: 2800 cmp r0, #0 8004f24: d1f1 bne.n 8004f0a __HAL_LOCK(hi2c); 8004f26: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 8004f2a: 2b01 cmp r3, #1 8004f2c: d0ed beq.n 8004f0a 8004f2e: 2301 movs r3, #1 8004f30: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004f34: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004f36: f04f 0800 mov.w r8, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004f3a: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f3c: 4629 mov r1, r5 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8004f3e: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 8004f40: bf58 it pl 8004f42: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f44: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8004f46: bf5c itt pl 8004f48: f042 0201 orrpl.w r2, r2, #1 8004f4c: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 8004f4e: 681a ldr r2, [r3, #0] 8004f50: f422 6200 bic.w r2, r2, #2048 ; 0x800 8004f54: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 8004f56: 2322 movs r3, #34 ; 0x22 8004f58: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8004f5c: 2340 movs r3, #64 ; 0x40 8004f5e: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 8004f62: 9b0e ldr r3, [sp, #56] ; 0x38 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004f64: f8c4 8040 str.w r8, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 8004f68: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 8004f6a: f8bd 303c ldrh.w r3, [sp, #60] ; 0x3c if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f6e: 9601 str r6, [sp, #4] hi2c->XferCount = Size; 8004f70: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004f72: 4b6c ldr r3, [pc, #432] ; (8005124 ) if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f74: 9700 str r7, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8004f76: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 8004f78: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f7a: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 8004f7c: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004f7e: 4653 mov r3, sl 8004f80: f7ff fdd0 bl 8004b24 8004f84: 4605 mov r5, r0 8004f86: b130 cbz r0, 8004f96 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004f88: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8004f8a: f884 803c strb.w r8, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8004f8e: 2b04 cmp r3, #4 8004f90: d13d bne.n 800500e return HAL_ERROR; 8004f92: 2501 movs r5, #1 8004f94: e7ba b.n 8004f0c if(hi2c->XferSize == 0U) 8004f96: 8d22 ldrh r2, [r4, #40] ; 0x28 8004f98: 6823 ldr r3, [r4, #0] 8004f9a: b992 cbnz r2, 8004fc2 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004f9c: 9002 str r0, [sp, #8] 8004f9e: 695a ldr r2, [r3, #20] 8004fa0: 9202 str r2, [sp, #8] 8004fa2: 699a ldr r2, [r3, #24] 8004fa4: 9202 str r2, [sp, #8] 8004fa6: 9a02 ldr r2, [sp, #8] hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004fa8: 681a ldr r2, [r3, #0] 8004faa: f442 7200 orr.w r2, r2, #512 ; 0x200 8004fae: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8004fb0: 2320 movs r3, #32 8004fb2: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8004fb6: 2300 movs r3, #0 8004fb8: f884 303e strb.w r3, [r4, #62] ; 0x3e __HAL_UNLOCK(hi2c); 8004fbc: f884 303c strb.w r3, [r4, #60] ; 0x3c return HAL_OK; 8004fc0: e7a4 b.n 8004f0c else if(hi2c->XferSize == 1U) 8004fc2: 2a01 cmp r2, #1 8004fc4: d125 bne.n 8005012 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8004fc6: 681a ldr r2, [r3, #0] 8004fc8: f422 6280 bic.w r2, r2, #1024 ; 0x400 8004fcc: 601a str r2, [r3, #0] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8004fce: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8004fd0: 6823 ldr r3, [r4, #0] 8004fd2: 9003 str r0, [sp, #12] 8004fd4: 695a ldr r2, [r3, #20] 8004fd6: 9203 str r2, [sp, #12] 8004fd8: 699a ldr r2, [r3, #24] 8004fda: 9203 str r2, [sp, #12] 8004fdc: 9a03 ldr r2, [sp, #12] hi2c->Instance->CR1 |= I2C_CR1_STOP; 8004fde: 681a ldr r2, [r3, #0] 8004fe0: f442 7200 orr.w r2, r2, #512 ; 0x200 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8004fe4: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 8004fe6: b662 cpsie i if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8004fe8: f8df 813c ldr.w r8, [pc, #316] ; 8005128 while(hi2c->XferSize > 0U) 8004fec: 8d23 ldrh r3, [r4, #40] ; 0x28 8004fee: 2b00 cmp r3, #0 8004ff0: d0de beq.n 8004fb0 if(hi2c->XferSize <= 3U) 8004ff2: 2b03 cmp r3, #3 8004ff4: d877 bhi.n 80050e6 if(hi2c->XferSize== 1U) 8004ff6: 2b01 cmp r3, #1 8004ff8: d127 bne.n 800504a if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004ffa: 4632 mov r2, r6 8004ffc: 4639 mov r1, r7 8004ffe: 4620 mov r0, r4 8005000: f7ff fe0a bl 8004c18 8005004: 2800 cmp r0, #0 8005006: d03f beq.n 8005088 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 8005008: 6c23 ldr r3, [r4, #64] ; 0x40 800500a: 2b20 cmp r3, #32 800500c: d1c1 bne.n 8004f92 return HAL_TIMEOUT; 800500e: 2503 movs r5, #3 8005010: e77c b.n 8004f0c else if(hi2c->XferSize == 2U) 8005012: 2a02 cmp r2, #2 hi2c->Instance->CR1 |= I2C_CR1_POS; 8005014: 681a ldr r2, [r3, #0] else if(hi2c->XferSize == 2U) 8005016: d10e bne.n 8005036 hi2c->Instance->CR1 |= I2C_CR1_POS; 8005018: f442 6200 orr.w r2, r2, #2048 ; 0x800 800501c: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 800501e: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8005020: 6823 ldr r3, [r4, #0] 8005022: 9004 str r0, [sp, #16] 8005024: 695a ldr r2, [r3, #20] 8005026: 9204 str r2, [sp, #16] 8005028: 699a ldr r2, [r3, #24] 800502a: 9204 str r2, [sp, #16] 800502c: 9a04 ldr r2, [sp, #16] hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 800502e: 681a ldr r2, [r3, #0] 8005030: f422 6280 bic.w r2, r2, #1024 ; 0x400 8005034: e7d6 b.n 8004fe4 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8005036: f442 6280 orr.w r2, r2, #1024 ; 0x400 800503a: 601a str r2, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 800503c: 9005 str r0, [sp, #20] 800503e: 695a ldr r2, [r3, #20] 8005040: 9205 str r2, [sp, #20] 8005042: 699b ldr r3, [r3, #24] 8005044: 9305 str r3, [sp, #20] 8005046: 9b05 ldr r3, [sp, #20] 8005048: e7ce b.n 8004fe8 else if(hi2c->XferSize == 2U) 800504a: 2b02 cmp r3, #2 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 800504c: 9600 str r6, [sp, #0] 800504e: 463b mov r3, r7 8005050: f04f 0200 mov.w r2, #0 8005054: 4641 mov r1, r8 8005056: 4620 mov r0, r4 else if(hi2c->XferSize == 2U) 8005058: d124 bne.n 80050a4 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 800505a: f7ff fcbd bl 80049d8 800505e: 2800 cmp r0, #0 8005060: d1d5 bne.n 800500e 8005062: b672 cpsid i hi2c->Instance->CR1 |= I2C_CR1_STOP; 8005064: 6823 ldr r3, [r4, #0] 8005066: 681a ldr r2, [r3, #0] 8005068: f442 7200 orr.w r2, r2, #512 ; 0x200 800506c: 601a str r2, [r3, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 800506e: 6a62 ldr r2, [r4, #36] ; 0x24 8005070: 691b ldr r3, [r3, #16] 8005072: 1c51 adds r1, r2, #1 8005074: 6261 str r1, [r4, #36] ; 0x24 8005076: 7013 strb r3, [r2, #0] hi2c->XferSize--; 8005078: 8d23 ldrh r3, [r4, #40] ; 0x28 800507a: 3b01 subs r3, #1 800507c: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 800507e: 8d63 ldrh r3, [r4, #42] ; 0x2a 8005080: 3b01 subs r3, #1 8005082: b29b uxth r3, r3 8005084: 8563 strh r3, [r4, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 8005086: b662 cpsie i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8005088: 6a63 ldr r3, [r4, #36] ; 0x24 800508a: 1c5a adds r2, r3, #1 800508c: 6262 str r2, [r4, #36] ; 0x24 800508e: 6822 ldr r2, [r4, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8005090: 6912 ldr r2, [r2, #16] 8005092: 701a strb r2, [r3, #0] hi2c->XferSize--; 8005094: 8d23 ldrh r3, [r4, #40] ; 0x28 8005096: 3b01 subs r3, #1 8005098: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 800509a: 8d63 ldrh r3, [r4, #42] ; 0x2a 800509c: 3b01 subs r3, #1 800509e: b29b uxth r3, r3 80050a0: 8563 strh r3, [r4, #42] ; 0x2a 80050a2: e7a3 b.n 8004fec if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050a4: f7ff fc98 bl 80049d8 80050a8: 4602 mov r2, r0 80050aa: 2800 cmp r0, #0 80050ac: d1af bne.n 800500e hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 80050ae: 6821 ldr r1, [r4, #0] 80050b0: 680b ldr r3, [r1, #0] 80050b2: f423 6380 bic.w r3, r3, #1024 ; 0x400 80050b6: 600b str r3, [r1, #0] __ASM volatile ("cpsid i" : : : "memory"); 80050b8: b672 cpsid i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80050ba: 6a63 ldr r3, [r4, #36] ; 0x24 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050bc: 4620 mov r0, r4 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80050be: 1c59 adds r1, r3, #1 80050c0: 6261 str r1, [r4, #36] ; 0x24 80050c2: 6821 ldr r1, [r4, #0] 80050c4: 6909 ldr r1, [r1, #16] 80050c6: 7019 strb r1, [r3, #0] hi2c->XferSize--; 80050c8: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050ca: 9600 str r6, [sp, #0] hi2c->XferSize--; 80050cc: 3b01 subs r3, #1 80050ce: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 80050d0: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050d2: 4641 mov r1, r8 hi2c->XferCount--; 80050d4: 3b01 subs r3, #1 80050d6: b29b uxth r3, r3 80050d8: 8563 strh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80050da: 463b mov r3, r7 80050dc: f7ff fc7c bl 80049d8 80050e0: 2800 cmp r0, #0 80050e2: d0bf beq.n 8005064 80050e4: e793 b.n 800500e if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80050e6: 4632 mov r2, r6 80050e8: 4639 mov r1, r7 80050ea: 4620 mov r0, r4 80050ec: f7ff fd94 bl 8004c18 80050f0: 2800 cmp r0, #0 80050f2: d189 bne.n 8005008 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80050f4: 6a63 ldr r3, [r4, #36] ; 0x24 80050f6: 1c5a adds r2, r3, #1 80050f8: 6262 str r2, [r4, #36] ; 0x24 80050fa: 6822 ldr r2, [r4, #0] 80050fc: 6912 ldr r2, [r2, #16] 80050fe: 701a strb r2, [r3, #0] hi2c->XferSize--; 8005100: 8d23 ldrh r3, [r4, #40] ; 0x28 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 8005102: 6822 ldr r2, [r4, #0] hi2c->XferSize--; 8005104: 3b01 subs r3, #1 8005106: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8005108: 8d63 ldrh r3, [r4, #42] ; 0x2a 800510a: 3b01 subs r3, #1 800510c: b29b uxth r3, r3 800510e: 8563 strh r3, [r4, #42] ; 0x2a if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 8005110: 6953 ldr r3, [r2, #20] 8005112: 075b lsls r3, r3, #29 8005114: f57f af6a bpl.w 8004fec (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8005118: 6a63 ldr r3, [r4, #36] ; 0x24 800511a: 1c59 adds r1, r3, #1 800511c: 6261 str r1, [r4, #36] ; 0x24 800511e: e7b7 b.n 8005090 8005120: 00100002 .word 0x00100002 8005124: ffff0000 .word 0xffff0000 8005128: 00010004 .word 0x00010004 0800512c : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800512c: 6803 ldr r3, [r0, #0] { 800512e: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005132: 07db lsls r3, r3, #31 { 8005134: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005136: d410 bmi.n 800515a } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8005138: 682b ldr r3, [r5, #0] 800513a: 079f lsls r7, r3, #30 800513c: d45e bmi.n 80051fc } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800513e: 682b ldr r3, [r5, #0] 8005140: 0719 lsls r1, r3, #28 8005142: f100 8095 bmi.w 8005270 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8005146: 682b ldr r3, [r5, #0] 8005148: 075a lsls r2, r3, #29 800514a: f100 80bf bmi.w 80052cc #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 800514e: 69ea ldr r2, [r5, #28] 8005150: 2a00 cmp r2, #0 8005152: f040 812d bne.w 80053b0 { return HAL_ERROR; } } return HAL_OK; 8005156: 2000 movs r0, #0 8005158: e014 b.n 8005184 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 800515a: 4c90 ldr r4, [pc, #576] ; (800539c ) 800515c: 6863 ldr r3, [r4, #4] 800515e: f003 030c and.w r3, r3, #12 8005162: 2b04 cmp r3, #4 8005164: d007 beq.n 8005176 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8005166: 6863 ldr r3, [r4, #4] 8005168: f003 030c and.w r3, r3, #12 800516c: 2b08 cmp r3, #8 800516e: d10c bne.n 800518a 8005170: 6863 ldr r3, [r4, #4] 8005172: 03de lsls r6, r3, #15 8005174: d509 bpl.n 800518a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8005176: 6823 ldr r3, [r4, #0] 8005178: 039c lsls r4, r3, #14 800517a: d5dd bpl.n 8005138 800517c: 686b ldr r3, [r5, #4] 800517e: 2b00 cmp r3, #0 8005180: d1da bne.n 8005138 return HAL_ERROR; 8005182: 2001 movs r0, #1 } 8005184: b002 add sp, #8 8005186: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800518a: 686b ldr r3, [r5, #4] 800518c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8005190: d110 bne.n 80051b4 8005192: 6823 ldr r3, [r4, #0] 8005194: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8005198: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800519a: f7ff f885 bl 80042a8 800519e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80051a0: 6823 ldr r3, [r4, #0] 80051a2: 0398 lsls r0, r3, #14 80051a4: d4c8 bmi.n 8005138 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80051a6: f7ff f87f bl 80042a8 80051aa: 1b80 subs r0, r0, r6 80051ac: 2864 cmp r0, #100 ; 0x64 80051ae: d9f7 bls.n 80051a0 return HAL_TIMEOUT; 80051b0: 2003 movs r0, #3 80051b2: e7e7 b.n 8005184 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80051b4: b99b cbnz r3, 80051de 80051b6: 6823 ldr r3, [r4, #0] 80051b8: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80051bc: 6023 str r3, [r4, #0] 80051be: 6823 ldr r3, [r4, #0] 80051c0: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80051c4: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 80051c6: f7ff f86f bl 80042a8 80051ca: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 80051cc: 6823 ldr r3, [r4, #0] 80051ce: 0399 lsls r1, r3, #14 80051d0: d5b2 bpl.n 8005138 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80051d2: f7ff f869 bl 80042a8 80051d6: 1b80 subs r0, r0, r6 80051d8: 2864 cmp r0, #100 ; 0x64 80051da: d9f7 bls.n 80051cc 80051dc: e7e8 b.n 80051b0 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80051de: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 80051e2: 6823 ldr r3, [r4, #0] 80051e4: d103 bne.n 80051ee 80051e6: f443 2380 orr.w r3, r3, #262144 ; 0x40000 80051ea: 6023 str r3, [r4, #0] 80051ec: e7d1 b.n 8005192 80051ee: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80051f2: 6023 str r3, [r4, #0] 80051f4: 6823 ldr r3, [r4, #0] 80051f6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80051fa: e7cd b.n 8005198 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80051fc: 4c67 ldr r4, [pc, #412] ; (800539c ) 80051fe: 6863 ldr r3, [r4, #4] 8005200: f013 0f0c tst.w r3, #12 8005204: d007 beq.n 8005216 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8005206: 6863 ldr r3, [r4, #4] 8005208: f003 030c and.w r3, r3, #12 800520c: 2b08 cmp r3, #8 800520e: d110 bne.n 8005232 8005210: 6863 ldr r3, [r4, #4] 8005212: 03da lsls r2, r3, #15 8005214: d40d bmi.n 8005232 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8005216: 6823 ldr r3, [r4, #0] 8005218: 079b lsls r3, r3, #30 800521a: d502 bpl.n 8005222 800521c: 692b ldr r3, [r5, #16] 800521e: 2b01 cmp r3, #1 8005220: d1af bne.n 8005182 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8005222: 6823 ldr r3, [r4, #0] 8005224: 696a ldr r2, [r5, #20] 8005226: f023 03f8 bic.w r3, r3, #248 ; 0xf8 800522a: ea43 03c2 orr.w r3, r3, r2, lsl #3 800522e: 6023 str r3, [r4, #0] 8005230: e785 b.n 800513e if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8005232: 692a ldr r2, [r5, #16] 8005234: 4b5a ldr r3, [pc, #360] ; (80053a0 ) 8005236: b16a cbz r2, 8005254 __HAL_RCC_HSI_ENABLE(); 8005238: 2201 movs r2, #1 800523a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 800523c: f7ff f834 bl 80042a8 8005240: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8005242: 6823 ldr r3, [r4, #0] 8005244: 079f lsls r7, r3, #30 8005246: d4ec bmi.n 8005222 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8005248: f7ff f82e bl 80042a8 800524c: 1b80 subs r0, r0, r6 800524e: 2802 cmp r0, #2 8005250: d9f7 bls.n 8005242 8005252: e7ad b.n 80051b0 __HAL_RCC_HSI_DISABLE(); 8005254: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8005256: f7ff f827 bl 80042a8 800525a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800525c: 6823 ldr r3, [r4, #0] 800525e: 0798 lsls r0, r3, #30 8005260: f57f af6d bpl.w 800513e if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8005264: f7ff f820 bl 80042a8 8005268: 1b80 subs r0, r0, r6 800526a: 2802 cmp r0, #2 800526c: d9f6 bls.n 800525c 800526e: e79f b.n 80051b0 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8005270: 69aa ldr r2, [r5, #24] 8005272: 4c4a ldr r4, [pc, #296] ; (800539c ) 8005274: 4b4b ldr r3, [pc, #300] ; (80053a4 ) 8005276: b1da cbz r2, 80052b0 __HAL_RCC_LSI_ENABLE(); 8005278: 2201 movs r2, #1 800527a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 800527c: f7ff f814 bl 80042a8 8005280: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8005282: 6a63 ldr r3, [r4, #36] ; 0x24 8005284: 079b lsls r3, r3, #30 8005286: d50d bpl.n 80052a4 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8005288: f44f 52fa mov.w r2, #8000 ; 0x1f40 800528c: 4b46 ldr r3, [pc, #280] ; (80053a8 ) 800528e: 681b ldr r3, [r3, #0] 8005290: fbb3 f3f2 udiv r3, r3, r2 8005294: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8005296: bf00 nop do { __NOP(); } while (Delay --); 8005298: 9b01 ldr r3, [sp, #4] 800529a: 1e5a subs r2, r3, #1 800529c: 9201 str r2, [sp, #4] 800529e: 2b00 cmp r3, #0 80052a0: d1f9 bne.n 8005296 80052a2: e750 b.n 8005146 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 80052a4: f7ff f800 bl 80042a8 80052a8: 1b80 subs r0, r0, r6 80052aa: 2802 cmp r0, #2 80052ac: d9e9 bls.n 8005282 80052ae: e77f b.n 80051b0 __HAL_RCC_LSI_DISABLE(); 80052b0: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80052b2: f7fe fff9 bl 80042a8 80052b6: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80052b8: 6a63 ldr r3, [r4, #36] ; 0x24 80052ba: 079f lsls r7, r3, #30 80052bc: f57f af43 bpl.w 8005146 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 80052c0: f7fe fff2 bl 80042a8 80052c4: 1b80 subs r0, r0, r6 80052c6: 2802 cmp r0, #2 80052c8: d9f6 bls.n 80052b8 80052ca: e771 b.n 80051b0 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 80052cc: 4c33 ldr r4, [pc, #204] ; (800539c ) 80052ce: 69e3 ldr r3, [r4, #28] 80052d0: 00d8 lsls r0, r3, #3 80052d2: d424 bmi.n 800531e pwrclkchanged = SET; 80052d4: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 80052d6: 69e3 ldr r3, [r4, #28] 80052d8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 80052dc: 61e3 str r3, [r4, #28] 80052de: 69e3 ldr r3, [r4, #28] 80052e0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80052e4: 9300 str r3, [sp, #0] 80052e6: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80052e8: 4e30 ldr r6, [pc, #192] ; (80053ac ) 80052ea: 6833 ldr r3, [r6, #0] 80052ec: 05d9 lsls r1, r3, #23 80052ee: d518 bpl.n 8005322 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80052f0: 68eb ldr r3, [r5, #12] 80052f2: 2b01 cmp r3, #1 80052f4: d126 bne.n 8005344 80052f6: 6a23 ldr r3, [r4, #32] 80052f8: f043 0301 orr.w r3, r3, #1 80052fc: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 80052fe: f7fe ffd3 bl 80042a8 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8005302: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8005306: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8005308: 6a23 ldr r3, [r4, #32] 800530a: 079b lsls r3, r3, #30 800530c: d53f bpl.n 800538e if(pwrclkchanged == SET) 800530e: 2f00 cmp r7, #0 8005310: f43f af1d beq.w 800514e __HAL_RCC_PWR_CLK_DISABLE(); 8005314: 69e3 ldr r3, [r4, #28] 8005316: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 800531a: 61e3 str r3, [r4, #28] 800531c: e717 b.n 800514e FlagStatus pwrclkchanged = RESET; 800531e: 2700 movs r7, #0 8005320: e7e2 b.n 80052e8 SET_BIT(PWR->CR, PWR_CR_DBP); 8005322: 6833 ldr r3, [r6, #0] 8005324: f443 7380 orr.w r3, r3, #256 ; 0x100 8005328: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 800532a: f7fe ffbd bl 80042a8 800532e: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005330: 6833 ldr r3, [r6, #0] 8005332: 05da lsls r2, r3, #23 8005334: d4dc bmi.n 80052f0 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8005336: f7fe ffb7 bl 80042a8 800533a: eba0 0008 sub.w r0, r0, r8 800533e: 2864 cmp r0, #100 ; 0x64 8005340: d9f6 bls.n 8005330 8005342: e735 b.n 80051b0 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8005344: b9ab cbnz r3, 8005372 8005346: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8005348: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 800534c: f023 0301 bic.w r3, r3, #1 8005350: 6223 str r3, [r4, #32] 8005352: 6a23 ldr r3, [r4, #32] 8005354: f023 0304 bic.w r3, r3, #4 8005358: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 800535a: f7fe ffa5 bl 80042a8 800535e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8005360: 6a23 ldr r3, [r4, #32] 8005362: 0798 lsls r0, r3, #30 8005364: d5d3 bpl.n 800530e if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8005366: f7fe ff9f bl 80042a8 800536a: 1b80 subs r0, r0, r6 800536c: 4540 cmp r0, r8 800536e: d9f7 bls.n 8005360 8005370: e71e b.n 80051b0 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8005372: 2b05 cmp r3, #5 8005374: 6a23 ldr r3, [r4, #32] 8005376: d103 bne.n 8005380 8005378: f043 0304 orr.w r3, r3, #4 800537c: 6223 str r3, [r4, #32] 800537e: e7ba b.n 80052f6 8005380: f023 0301 bic.w r3, r3, #1 8005384: 6223 str r3, [r4, #32] 8005386: 6a23 ldr r3, [r4, #32] 8005388: f023 0304 bic.w r3, r3, #4 800538c: e7b6 b.n 80052fc if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 800538e: f7fe ff8b bl 80042a8 8005392: eba0 0008 sub.w r0, r0, r8 8005396: 42b0 cmp r0, r6 8005398: d9b6 bls.n 8005308 800539a: e709 b.n 80051b0 800539c: 40021000 .word 0x40021000 80053a0: 42420000 .word 0x42420000 80053a4: 42420480 .word 0x42420480 80053a8: 2000000c .word 0x2000000c 80053ac: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 80053b0: 4c22 ldr r4, [pc, #136] ; (800543c ) 80053b2: 6863 ldr r3, [r4, #4] 80053b4: f003 030c and.w r3, r3, #12 80053b8: 2b08 cmp r3, #8 80053ba: f43f aee2 beq.w 8005182 80053be: 2300 movs r3, #0 80053c0: 4e1f ldr r6, [pc, #124] ; (8005440 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80053c2: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 80053c4: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80053c6: d12b bne.n 8005420 tickstart = HAL_GetTick(); 80053c8: f7fe ff6e bl 80042a8 80053cc: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80053ce: 6823 ldr r3, [r4, #0] 80053d0: 0199 lsls r1, r3, #6 80053d2: d41f bmi.n 8005414 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 80053d4: 6a2b ldr r3, [r5, #32] 80053d6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80053da: d105 bne.n 80053e8 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 80053dc: 6862 ldr r2, [r4, #4] 80053de: 68a9 ldr r1, [r5, #8] 80053e0: f422 3200 bic.w r2, r2, #131072 ; 0x20000 80053e4: 430a orrs r2, r1 80053e6: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80053e8: 6a69 ldr r1, [r5, #36] ; 0x24 80053ea: 6862 ldr r2, [r4, #4] 80053ec: 430b orrs r3, r1 80053ee: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 80053f2: 4313 orrs r3, r2 80053f4: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 80053f6: 2301 movs r3, #1 80053f8: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 80053fa: f7fe ff55 bl 80042a8 80053fe: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005400: 6823 ldr r3, [r4, #0] 8005402: 019a lsls r2, r3, #6 8005404: f53f aea7 bmi.w 8005156 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8005408: f7fe ff4e bl 80042a8 800540c: 1b40 subs r0, r0, r5 800540e: 2802 cmp r0, #2 8005410: d9f6 bls.n 8005400 8005412: e6cd b.n 80051b0 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8005414: f7fe ff48 bl 80042a8 8005418: 1bc0 subs r0, r0, r7 800541a: 2802 cmp r0, #2 800541c: d9d7 bls.n 80053ce 800541e: e6c7 b.n 80051b0 tickstart = HAL_GetTick(); 8005420: f7fe ff42 bl 80042a8 8005424: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005426: 6823 ldr r3, [r4, #0] 8005428: 019b lsls r3, r3, #6 800542a: f57f ae94 bpl.w 8005156 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 800542e: f7fe ff3b bl 80042a8 8005432: 1b40 subs r0, r0, r5 8005434: 2802 cmp r0, #2 8005436: d9f6 bls.n 8005426 8005438: e6ba b.n 80051b0 800543a: bf00 nop 800543c: 40021000 .word 0x40021000 8005440: 42420060 .word 0x42420060 08005444 : { 8005444: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8005446: 4b19 ldr r3, [pc, #100] ; (80054ac ) { 8005448: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 800544a: ac02 add r4, sp, #8 800544c: f103 0510 add.w r5, r3, #16 8005450: 4622 mov r2, r4 8005452: 6818 ldr r0, [r3, #0] 8005454: 6859 ldr r1, [r3, #4] 8005456: 3308 adds r3, #8 8005458: c203 stmia r2!, {r0, r1} 800545a: 42ab cmp r3, r5 800545c: 4614 mov r4, r2 800545e: d1f7 bne.n 8005450 const uint8_t aPredivFactorTable[2] = {1, 2}; 8005460: 2301 movs r3, #1 8005462: f88d 3004 strb.w r3, [sp, #4] 8005466: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8005468: 4911 ldr r1, [pc, #68] ; (80054b0 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 800546a: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 800546e: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8005470: f003 020c and.w r2, r3, #12 8005474: 2a08 cmp r2, #8 8005476: d117 bne.n 80054a8 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8005478: f3c3 4283 ubfx r2, r3, #18, #4 800547c: a806 add r0, sp, #24 800547e: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8005480: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8005482: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8005486: d50c bpl.n 80054a2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8005488: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 800548a: 480a ldr r0, [pc, #40] ; (80054b4 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 800548c: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8005490: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8005492: aa06 add r2, sp, #24 8005494: 4413 add r3, r2 8005496: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 800549a: fbb0 f0f3 udiv r0, r0, r3 } 800549e: b007 add sp, #28 80054a0: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 80054a2: 4805 ldr r0, [pc, #20] ; (80054b8 ) 80054a4: 4350 muls r0, r2 80054a6: e7fa b.n 800549e sysclockfreq = HSE_VALUE; 80054a8: 4802 ldr r0, [pc, #8] ; (80054b4 ) return sysclockfreq; 80054aa: e7f8 b.n 800549e 80054ac: 08008cac .word 0x08008cac 80054b0: 40021000 .word 0x40021000 80054b4: 007a1200 .word 0x007a1200 80054b8: 003d0900 .word 0x003d0900 080054bc : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 80054bc: 4a54 ldr r2, [pc, #336] ; (8005610 ) { 80054be: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 80054c2: 6813 ldr r3, [r2, #0] { 80054c4: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 80054c6: f003 0307 and.w r3, r3, #7 80054ca: 428b cmp r3, r1 { 80054cc: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 80054ce: d32a bcc.n 8005526 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80054d0: 6829 ldr r1, [r5, #0] 80054d2: 078c lsls r4, r1, #30 80054d4: d434 bmi.n 8005540 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 80054d6: 07ca lsls r2, r1, #31 80054d8: d447 bmi.n 800556a if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 80054da: 4a4d ldr r2, [pc, #308] ; (8005610 ) 80054dc: 6813 ldr r3, [r2, #0] 80054de: f003 0307 and.w r3, r3, #7 80054e2: 429e cmp r6, r3 80054e4: f0c0 8082 bcc.w 80055ec if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80054e8: 682a ldr r2, [r5, #0] 80054ea: 4c4a ldr r4, [pc, #296] ; (8005614 ) 80054ec: f012 0f04 tst.w r2, #4 80054f0: f040 8087 bne.w 8005602 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80054f4: 0713 lsls r3, r2, #28 80054f6: d506 bpl.n 8005506 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 80054f8: 6863 ldr r3, [r4, #4] 80054fa: 692a ldr r2, [r5, #16] 80054fc: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8005500: ea43 03c2 orr.w r3, r3, r2, lsl #3 8005504: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8005506: f7ff ff9d bl 8005444 800550a: 6863 ldr r3, [r4, #4] 800550c: 4a42 ldr r2, [pc, #264] ; (8005618 ) 800550e: f3c3 1303 ubfx r3, r3, #4, #4 8005512: 5cd3 ldrb r3, [r2, r3] 8005514: 40d8 lsrs r0, r3 8005516: 4b41 ldr r3, [pc, #260] ; (800561c ) 8005518: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 800551a: 2000 movs r0, #0 800551c: f7fe fe82 bl 8004224 return HAL_OK; 8005520: 2000 movs r0, #0 } 8005522: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8005526: 6813 ldr r3, [r2, #0] 8005528: f023 0307 bic.w r3, r3, #7 800552c: 430b orrs r3, r1 800552e: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8005530: 6813 ldr r3, [r2, #0] 8005532: f003 0307 and.w r3, r3, #7 8005536: 4299 cmp r1, r3 8005538: d0ca beq.n 80054d0 return HAL_ERROR; 800553a: 2001 movs r0, #1 800553c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8005540: 4b34 ldr r3, [pc, #208] ; (8005614 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8005542: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8005546: bf1e ittt ne 8005548: 685a ldrne r2, [r3, #4] 800554a: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 800554e: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8005550: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8005552: bf42 ittt mi 8005554: 685a ldrmi r2, [r3, #4] 8005556: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 800555a: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 800555c: 685a ldr r2, [r3, #4] 800555e: 68a8 ldr r0, [r5, #8] 8005560: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8005564: 4302 orrs r2, r0 8005566: 605a str r2, [r3, #4] 8005568: e7b5 b.n 80054d6 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800556a: 686a ldr r2, [r5, #4] 800556c: 4c29 ldr r4, [pc, #164] ; (8005614 ) 800556e: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8005570: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8005572: d11c bne.n 80055ae if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8005574: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8005578: d0df beq.n 800553a __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 800557a: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 800557c: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8005580: f023 0303 bic.w r3, r3, #3 8005584: 4313 orrs r3, r2 8005586: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8005588: f7fe fe8e bl 80042a8 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800558c: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 800558e: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8005590: 2b01 cmp r3, #1 8005592: d114 bne.n 80055be while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8005594: 6863 ldr r3, [r4, #4] 8005596: f003 030c and.w r3, r3, #12 800559a: 2b04 cmp r3, #4 800559c: d09d beq.n 80054da if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 800559e: f7fe fe83 bl 80042a8 80055a2: 1bc0 subs r0, r0, r7 80055a4: 4540 cmp r0, r8 80055a6: d9f5 bls.n 8005594 return HAL_TIMEOUT; 80055a8: 2003 movs r0, #3 80055aa: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80055ae: 2a02 cmp r2, #2 80055b0: d102 bne.n 80055b8 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80055b2: f013 7f00 tst.w r3, #33554432 ; 0x2000000 80055b6: e7df b.n 8005578 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80055b8: f013 0f02 tst.w r3, #2 80055bc: e7dc b.n 8005578 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80055be: 2b02 cmp r3, #2 80055c0: d10f bne.n 80055e2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 80055c2: 6863 ldr r3, [r4, #4] 80055c4: f003 030c and.w r3, r3, #12 80055c8: 2b08 cmp r3, #8 80055ca: d086 beq.n 80054da if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80055cc: f7fe fe6c bl 80042a8 80055d0: 1bc0 subs r0, r0, r7 80055d2: 4540 cmp r0, r8 80055d4: d9f5 bls.n 80055c2 80055d6: e7e7 b.n 80055a8 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80055d8: f7fe fe66 bl 80042a8 80055dc: 1bc0 subs r0, r0, r7 80055de: 4540 cmp r0, r8 80055e0: d8e2 bhi.n 80055a8 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 80055e2: 6863 ldr r3, [r4, #4] 80055e4: f013 0f0c tst.w r3, #12 80055e8: d1f6 bne.n 80055d8 80055ea: e776 b.n 80054da __HAL_FLASH_SET_LATENCY(FLatency); 80055ec: 6813 ldr r3, [r2, #0] 80055ee: f023 0307 bic.w r3, r3, #7 80055f2: 4333 orrs r3, r6 80055f4: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 80055f6: 6813 ldr r3, [r2, #0] 80055f8: f003 0307 and.w r3, r3, #7 80055fc: 429e cmp r6, r3 80055fe: d19c bne.n 800553a 8005600: e772 b.n 80054e8 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8005602: 6863 ldr r3, [r4, #4] 8005604: 68e9 ldr r1, [r5, #12] 8005606: f423 63e0 bic.w r3, r3, #1792 ; 0x700 800560a: 430b orrs r3, r1 800560c: 6063 str r3, [r4, #4] 800560e: e771 b.n 80054f4 8005610: 40022000 .word 0x40022000 8005614: 40021000 .word 0x40021000 8005618: 08008ed1 .word 0x08008ed1 800561c: 2000000c .word 0x2000000c 08005620 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8005620: 4b04 ldr r3, [pc, #16] ; (8005634 ) 8005622: 4a05 ldr r2, [pc, #20] ; (8005638 ) 8005624: 685b ldr r3, [r3, #4] 8005626: f3c3 2302 ubfx r3, r3, #8, #3 800562a: 5cd3 ldrb r3, [r2, r3] 800562c: 4a03 ldr r2, [pc, #12] ; (800563c ) 800562e: 6810 ldr r0, [r2, #0] } 8005630: 40d8 lsrs r0, r3 8005632: 4770 bx lr 8005634: 40021000 .word 0x40021000 8005638: 08008ee1 .word 0x08008ee1 800563c: 2000000c .word 0x2000000c 08005640 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8005640: 4b04 ldr r3, [pc, #16] ; (8005654 ) 8005642: 4a05 ldr r2, [pc, #20] ; (8005658 ) 8005644: 685b ldr r3, [r3, #4] 8005646: f3c3 23c2 ubfx r3, r3, #11, #3 800564a: 5cd3 ldrb r3, [r2, r3] 800564c: 4a03 ldr r2, [pc, #12] ; (800565c ) 800564e: 6810 ldr r0, [r2, #0] } 8005650: 40d8 lsrs r0, r3 8005652: 4770 bx lr 8005654: 40021000 .word 0x40021000 8005658: 08008ee1 .word 0x08008ee1 800565c: 2000000c .word 0x2000000c 08005660 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8005660: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 8005662: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8005664: 68da ldr r2, [r3, #12] 8005666: f042 0201 orr.w r2, r2, #1 800566a: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 800566c: 681a ldr r2, [r3, #0] 800566e: f042 0201 orr.w r2, r2, #1 8005672: 601a str r2, [r3, #0] } 8005674: 4770 bx lr 08005676 : 8005676: 4770 bx lr 08005678 : 8005678: 4770 bx lr 0800567a : 800567a: 4770 bx lr 0800567c : 800567c: 4770 bx lr 0800567e : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 800567e: 6803 ldr r3, [r0, #0] { 8005680: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8005682: 691a ldr r2, [r3, #16] { 8005684: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8005686: 0791 lsls r1, r2, #30 8005688: d50e bpl.n 80056a8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 800568a: 68da ldr r2, [r3, #12] 800568c: 0792 lsls r2, r2, #30 800568e: d50b bpl.n 80056a8 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 8005690: f06f 0202 mvn.w r2, #2 8005694: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8005696: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8005698: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 800569a: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 800569c: 079b lsls r3, r3, #30 800569e: d077 beq.n 8005790 { HAL_TIM_IC_CaptureCallback(htim); 80056a0: f7ff ffea bl 8005678 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80056a4: 2300 movs r3, #0 80056a6: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80056a8: 6823 ldr r3, [r4, #0] 80056aa: 691a ldr r2, [r3, #16] 80056ac: 0750 lsls r0, r2, #29 80056ae: d510 bpl.n 80056d2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 80056b0: 68da ldr r2, [r3, #12] 80056b2: 0751 lsls r1, r2, #29 80056b4: d50d bpl.n 80056d2 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 80056b6: f06f 0204 mvn.w r2, #4 80056ba: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80056bc: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80056be: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80056c0: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80056c2: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 80056c6: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80056c8: d068 beq.n 800579c HAL_TIM_IC_CaptureCallback(htim); 80056ca: f7ff ffd5 bl 8005678 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80056ce: 2300 movs r3, #0 80056d0: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 80056d2: 6823 ldr r3, [r4, #0] 80056d4: 691a ldr r2, [r3, #16] 80056d6: 0712 lsls r2, r2, #28 80056d8: d50f bpl.n 80056fa { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 80056da: 68da ldr r2, [r3, #12] 80056dc: 0710 lsls r0, r2, #28 80056de: d50c bpl.n 80056fa { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 80056e0: f06f 0208 mvn.w r2, #8 80056e4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 80056e6: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 80056e8: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 80056ea: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 80056ec: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 80056ee: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 80056f0: d05a beq.n 80057a8 HAL_TIM_IC_CaptureCallback(htim); 80056f2: f7ff ffc1 bl 8005678 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80056f6: 2300 movs r3, #0 80056f8: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 80056fa: 6823 ldr r3, [r4, #0] 80056fc: 691a ldr r2, [r3, #16] 80056fe: 06d2 lsls r2, r2, #27 8005700: d510 bpl.n 8005724 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8005702: 68da ldr r2, [r3, #12] 8005704: 06d0 lsls r0, r2, #27 8005706: d50d bpl.n 8005724 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8005708: f06f 0210 mvn.w r2, #16 800570c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 800570e: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8005710: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8005712: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8005714: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8005718: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800571a: d04b beq.n 80057b4 HAL_TIM_IC_CaptureCallback(htim); 800571c: f7ff ffac bl 8005678 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8005720: 2300 movs r3, #0 8005722: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8005724: 6823 ldr r3, [r4, #0] 8005726: 691a ldr r2, [r3, #16] 8005728: 07d1 lsls r1, r2, #31 800572a: d508 bpl.n 800573e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 800572c: 68da ldr r2, [r3, #12] 800572e: 07d2 lsls r2, r2, #31 8005730: d505 bpl.n 800573e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8005732: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8005736: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8005738: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 800573a: f001 fb6b bl 8006e14 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 800573e: 6823 ldr r3, [r4, #0] 8005740: 691a ldr r2, [r3, #16] 8005742: 0610 lsls r0, r2, #24 8005744: d508 bpl.n 8005758 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 8005746: 68da ldr r2, [r3, #12] 8005748: 0611 lsls r1, r2, #24 800574a: d505 bpl.n 8005758 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 800574c: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8005750: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8005752: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 8005754: f000 f8bf bl 80058d6 } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8005758: 6823 ldr r3, [r4, #0] 800575a: 691a ldr r2, [r3, #16] 800575c: 0652 lsls r2, r2, #25 800575e: d508 bpl.n 8005772 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8005760: 68da ldr r2, [r3, #12] 8005762: 0650 lsls r0, r2, #25 8005764: d505 bpl.n 8005772 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8005766: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 800576a: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 800576c: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 800576e: f7ff ff85 bl 800567c } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 8005772: 6823 ldr r3, [r4, #0] 8005774: 691a ldr r2, [r3, #16] 8005776: 0691 lsls r1, r2, #26 8005778: d522 bpl.n 80057c0 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 800577a: 68da ldr r2, [r3, #12] 800577c: 0692 lsls r2, r2, #26 800577e: d51f bpl.n 80057c0 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8005780: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 8005784: 4620 mov r0, r4 } } } 8005786: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 800578a: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 800578c: f000 b8a2 b.w 80058d4 HAL_TIM_OC_DelayElapsedCallback(htim); 8005790: f7ff ff71 bl 8005676 HAL_TIM_PWM_PulseFinishedCallback(htim); 8005794: 4620 mov r0, r4 8005796: f7ff ff70 bl 800567a 800579a: e783 b.n 80056a4 HAL_TIM_OC_DelayElapsedCallback(htim); 800579c: f7ff ff6b bl 8005676 HAL_TIM_PWM_PulseFinishedCallback(htim); 80057a0: 4620 mov r0, r4 80057a2: f7ff ff6a bl 800567a 80057a6: e792 b.n 80056ce HAL_TIM_OC_DelayElapsedCallback(htim); 80057a8: f7ff ff65 bl 8005676 HAL_TIM_PWM_PulseFinishedCallback(htim); 80057ac: 4620 mov r0, r4 80057ae: f7ff ff64 bl 800567a 80057b2: e7a0 b.n 80056f6 HAL_TIM_OC_DelayElapsedCallback(htim); 80057b4: f7ff ff5f bl 8005676 HAL_TIM_PWM_PulseFinishedCallback(htim); 80057b8: 4620 mov r0, r4 80057ba: f7ff ff5e bl 800567a 80057be: e7af b.n 8005720 80057c0: bd10 pop {r4, pc} ... 080057c4 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80057c4: 4a24 ldr r2, [pc, #144] ; (8005858 ) tmpcr1 = TIMx->CR1; 80057c6: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80057c8: 4290 cmp r0, r2 80057ca: d012 beq.n 80057f2 80057cc: f502 6200 add.w r2, r2, #2048 ; 0x800 80057d0: 4290 cmp r0, r2 80057d2: d00e beq.n 80057f2 80057d4: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 80057d8: d00b beq.n 80057f2 80057da: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 80057de: 4290 cmp r0, r2 80057e0: d007 beq.n 80057f2 80057e2: f502 6280 add.w r2, r2, #1024 ; 0x400 80057e6: 4290 cmp r0, r2 80057e8: d003 beq.n 80057f2 80057ea: f502 6280 add.w r2, r2, #1024 ; 0x400 80057ee: 4290 cmp r0, r2 80057f0: d11d bne.n 800582e { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 80057f2: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 80057f4: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 80057f8: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 80057fa: 4a17 ldr r2, [pc, #92] ; (8005858 ) 80057fc: 4290 cmp r0, r2 80057fe: d012 beq.n 8005826 8005800: f502 6200 add.w r2, r2, #2048 ; 0x800 8005804: 4290 cmp r0, r2 8005806: d00e beq.n 8005826 8005808: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 800580c: d00b beq.n 8005826 800580e: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8005812: 4290 cmp r0, r2 8005814: d007 beq.n 8005826 8005816: f502 6280 add.w r2, r2, #1024 ; 0x400 800581a: 4290 cmp r0, r2 800581c: d003 beq.n 8005826 800581e: f502 6280 add.w r2, r2, #1024 ; 0x400 8005822: 4290 cmp r0, r2 8005824: d103 bne.n 800582e { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 8005826: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8005828: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 800582c: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 800582e: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8005830: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8005834: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 8005836: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8005838: 688b ldr r3, [r1, #8] 800583a: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 800583c: 680b ldr r3, [r1, #0] 800583e: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8005840: 4b05 ldr r3, [pc, #20] ; (8005858 ) 8005842: 4298 cmp r0, r3 8005844: d003 beq.n 800584e 8005846: f503 6300 add.w r3, r3, #2048 ; 0x800 800584a: 4298 cmp r0, r3 800584c: d101 bne.n 8005852 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 800584e: 690b ldr r3, [r1, #16] 8005850: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 8005852: 2301 movs r3, #1 8005854: 6143 str r3, [r0, #20] 8005856: 4770 bx lr 8005858: 40012c00 .word 0x40012c00 0800585c : { 800585c: b510 push {r4, lr} if(htim == NULL) 800585e: 4604 mov r4, r0 8005860: b1a0 cbz r0, 800588c if(htim->State == HAL_TIM_STATE_RESET) 8005862: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8005866: f003 02ff and.w r2, r3, #255 ; 0xff 800586a: b91b cbnz r3, 8005874 htim->Lock = HAL_UNLOCKED; 800586c: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 8005870: f002 f82e bl 80078d0 htim->State= HAL_TIM_STATE_BUSY; 8005874: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 8005876: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 8005878: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 800587c: 1d21 adds r1, r4, #4 800587e: f7ff ffa1 bl 80057c4 htim->State= HAL_TIM_STATE_READY; 8005882: 2301 movs r3, #1 return HAL_OK; 8005884: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 8005886: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 800588a: bd10 pop {r4, pc} return HAL_ERROR; 800588c: 2001 movs r0, #1 } 800588e: bd10 pop {r4, pc} 08005890 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 8005890: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 8005894: b510 push {r4, lr} __HAL_LOCK(htim); 8005896: 2b01 cmp r3, #1 8005898: f04f 0302 mov.w r3, #2 800589c: d018 beq.n 80058d0 htim->State = HAL_TIM_STATE_BUSY; 800589e: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80058a2: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80058a4: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80058a6: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80058a8: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80058aa: f022 0270 bic.w r2, r2, #112 ; 0x70 80058ae: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80058b0: 685a ldr r2, [r3, #4] 80058b2: 4322 orrs r2, r4 80058b4: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 80058b6: 689a ldr r2, [r3, #8] 80058b8: f022 0280 bic.w r2, r2, #128 ; 0x80 80058bc: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80058be: 689a ldr r2, [r3, #8] 80058c0: 430a orrs r2, r1 80058c2: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 80058c4: 2301 movs r3, #1 80058c6: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 80058ca: 2300 movs r3, #0 80058cc: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 80058d0: 4618 mov r0, r3 return HAL_OK; } 80058d2: bd10 pop {r4, pc} 080058d4 : 80058d4: 4770 bx lr 080058d6 : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 80058d6: 4770 bx lr 080058d8 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80058d8: 6803 ldr r3, [r0, #0] 80058da: 68da ldr r2, [r3, #12] 80058dc: f422 7290 bic.w r2, r2, #288 ; 0x120 80058e0: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80058e2: 695a ldr r2, [r3, #20] 80058e4: f022 0201 bic.w r2, r2, #1 80058e8: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80058ea: 2320 movs r3, #32 80058ec: f880 303a strb.w r3, [r0, #58] ; 0x3a 80058f0: 4770 bx lr ... 080058f4 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80058f4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80058f8: 6805 ldr r5, [r0, #0] 80058fa: 68c2 ldr r2, [r0, #12] 80058fc: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80058fe: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8005900: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8005904: 4313 orrs r3, r2 8005906: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005908: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 800590a: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800590c: 430b orrs r3, r1 800590e: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8005910: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 8005914: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005918: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 800591a: 4313 orrs r3, r2 800591c: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 800591e: 696b ldr r3, [r5, #20] 8005920: 6982 ldr r2, [r0, #24] 8005922: f423 7340 bic.w r3, r3, #768 ; 0x300 8005926: 4313 orrs r3, r2 8005928: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 800592a: 4b40 ldr r3, [pc, #256] ; (8005a2c ) { 800592c: 4681 mov r9, r0 if(huart->Instance == USART1) 800592e: 429d cmp r5, r3 8005930: f04f 0419 mov.w r4, #25 8005934: d146 bne.n 80059c4 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8005936: f7ff fe83 bl 8005640 800593a: fb04 f300 mul.w r3, r4, r0 800593e: f8d9 6004 ldr.w r6, [r9, #4] 8005942: f04f 0864 mov.w r8, #100 ; 0x64 8005946: 00b6 lsls r6, r6, #2 8005948: fbb3 f3f6 udiv r3, r3, r6 800594c: fbb3 f3f8 udiv r3, r3, r8 8005950: 011e lsls r6, r3, #4 8005952: f7ff fe75 bl 8005640 8005956: 4360 muls r0, r4 8005958: f8d9 3004 ldr.w r3, [r9, #4] 800595c: 009b lsls r3, r3, #2 800595e: fbb0 f7f3 udiv r7, r0, r3 8005962: f7ff fe6d bl 8005640 8005966: 4360 muls r0, r4 8005968: f8d9 3004 ldr.w r3, [r9, #4] 800596c: 009b lsls r3, r3, #2 800596e: fbb0 f3f3 udiv r3, r0, r3 8005972: fbb3 f3f8 udiv r3, r3, r8 8005976: fb08 7313 mls r3, r8, r3, r7 800597a: 011b lsls r3, r3, #4 800597c: 3332 adds r3, #50 ; 0x32 800597e: fbb3 f3f8 udiv r3, r3, r8 8005982: f003 07f0 and.w r7, r3, #240 ; 0xf0 8005986: f7ff fe5b bl 8005640 800598a: 4360 muls r0, r4 800598c: f8d9 2004 ldr.w r2, [r9, #4] 8005990: 0092 lsls r2, r2, #2 8005992: fbb0 faf2 udiv sl, r0, r2 8005996: f7ff fe53 bl 8005640 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 800599a: 4360 muls r0, r4 800599c: f8d9 3004 ldr.w r3, [r9, #4] 80059a0: 009b lsls r3, r3, #2 80059a2: fbb0 f3f3 udiv r3, r0, r3 80059a6: fbb3 f3f8 udiv r3, r3, r8 80059aa: fb08 a313 mls r3, r8, r3, sl 80059ae: 011b lsls r3, r3, #4 80059b0: 3332 adds r3, #50 ; 0x32 80059b2: fbb3 f3f8 udiv r3, r3, r8 80059b6: f003 030f and.w r3, r3, #15 80059ba: 433b orrs r3, r7 80059bc: 4433 add r3, r6 80059be: 60ab str r3, [r5, #8] 80059c0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80059c4: f7ff fe2c bl 8005620 80059c8: fb04 f300 mul.w r3, r4, r0 80059cc: f8d9 6004 ldr.w r6, [r9, #4] 80059d0: f04f 0864 mov.w r8, #100 ; 0x64 80059d4: 00b6 lsls r6, r6, #2 80059d6: fbb3 f3f6 udiv r3, r3, r6 80059da: fbb3 f3f8 udiv r3, r3, r8 80059de: 011e lsls r6, r3, #4 80059e0: f7ff fe1e bl 8005620 80059e4: 4360 muls r0, r4 80059e6: f8d9 3004 ldr.w r3, [r9, #4] 80059ea: 009b lsls r3, r3, #2 80059ec: fbb0 f7f3 udiv r7, r0, r3 80059f0: f7ff fe16 bl 8005620 80059f4: 4360 muls r0, r4 80059f6: f8d9 3004 ldr.w r3, [r9, #4] 80059fa: 009b lsls r3, r3, #2 80059fc: fbb0 f3f3 udiv r3, r0, r3 8005a00: fbb3 f3f8 udiv r3, r3, r8 8005a04: fb08 7313 mls r3, r8, r3, r7 8005a08: 011b lsls r3, r3, #4 8005a0a: 3332 adds r3, #50 ; 0x32 8005a0c: fbb3 f3f8 udiv r3, r3, r8 8005a10: f003 07f0 and.w r7, r3, #240 ; 0xf0 8005a14: f7ff fe04 bl 8005620 8005a18: 4360 muls r0, r4 8005a1a: f8d9 2004 ldr.w r2, [r9, #4] 8005a1e: 0092 lsls r2, r2, #2 8005a20: fbb0 faf2 udiv sl, r0, r2 8005a24: f7ff fdfc bl 8005620 8005a28: e7b7 b.n 800599a 8005a2a: bf00 nop 8005a2c: 40013800 .word 0x40013800 08005a30 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8005a30: b5f8 push {r3, r4, r5, r6, r7, lr} 8005a32: 4604 mov r4, r0 8005a34: 460e mov r6, r1 8005a36: 4617 mov r7, r2 8005a38: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8005a3a: 6821 ldr r1, [r4, #0] 8005a3c: 680b ldr r3, [r1, #0] 8005a3e: ea36 0303 bics.w r3, r6, r3 8005a42: d101 bne.n 8005a48 return HAL_OK; 8005a44: 2000 movs r0, #0 } 8005a46: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8005a48: 1c6b adds r3, r5, #1 8005a4a: d0f7 beq.n 8005a3c if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8005a4c: b995 cbnz r5, 8005a74 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8005a4e: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8005a50: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8005a52: 68da ldr r2, [r3, #12] 8005a54: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8005a58: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005a5a: 695a ldr r2, [r3, #20] 8005a5c: f022 0201 bic.w r2, r2, #1 8005a60: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8005a62: 2320 movs r3, #32 8005a64: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8005a68: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 8005a6c: 2300 movs r3, #0 8005a6e: f884 3038 strb.w r3, [r4, #56] ; 0x38 8005a72: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8005a74: f7fe fc18 bl 80042a8 8005a78: 1bc0 subs r0, r0, r7 8005a7a: 4285 cmp r5, r0 8005a7c: d2dd bcs.n 8005a3a 8005a7e: e7e6 b.n 8005a4e 08005a80 : { 8005a80: b510 push {r4, lr} if(huart == NULL) 8005a82: 4604 mov r4, r0 8005a84: b340 cbz r0, 8005ad8 if(huart->gState == HAL_UART_STATE_RESET) 8005a86: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 8005a8a: f003 02ff and.w r2, r3, #255 ; 0xff 8005a8e: b91b cbnz r3, 8005a98 huart->Lock = HAL_UNLOCKED; 8005a90: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8005a94: f001 ff30 bl 80078f8 huart->gState = HAL_UART_STATE_BUSY; 8005a98: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 8005a9a: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8005a9c: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8005aa0: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8005aa2: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8005aa4: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8005aa8: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 8005aaa: f7ff ff23 bl 80058f4 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8005aae: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8005ab0: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8005ab2: 691a ldr r2, [r3, #16] 8005ab4: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8005ab8: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8005aba: 695a ldr r2, [r3, #20] 8005abc: f022 022a bic.w r2, r2, #42 ; 0x2a 8005ac0: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8005ac2: 68da ldr r2, [r3, #12] 8005ac4: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8005ac8: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8005aca: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005acc: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8005ace: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 8005ad2: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 8005ad6: bd10 pop {r4, pc} return HAL_ERROR; 8005ad8: 2001 movs r0, #1 } 8005ada: bd10 pop {r4, pc} 08005adc : { 8005adc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8005ae0: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 8005ae2: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 8005ae6: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8005ae8: 2b20 cmp r3, #32 { 8005aea: 460d mov r5, r1 8005aec: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8005aee: d14e bne.n 8005b8e if((pData == NULL) || (Size == 0U)) 8005af0: 2900 cmp r1, #0 8005af2: d049 beq.n 8005b88 8005af4: 2a00 cmp r2, #0 8005af6: d047 beq.n 8005b88 __HAL_LOCK(huart); 8005af8: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8005afc: 2b01 cmp r3, #1 8005afe: d046 beq.n 8005b8e 8005b00: 2301 movs r3, #1 8005b02: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005b06: 2300 movs r3, #0 8005b08: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8005b0a: 2321 movs r3, #33 ; 0x21 8005b0c: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8005b10: f7fe fbca bl 80042a8 8005b14: 4606 mov r6, r0 huart->TxXferSize = Size; 8005b16: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8005b1a: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8005b1e: 8ce3 ldrh r3, [r4, #38] ; 0x26 8005b20: b29b uxth r3, r3 8005b22: b96b cbnz r3, 8005b40 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8005b24: 463b mov r3, r7 8005b26: 4632 mov r2, r6 8005b28: 2140 movs r1, #64 ; 0x40 8005b2a: 4620 mov r0, r4 8005b2c: f7ff ff80 bl 8005a30 8005b30: b9a8 cbnz r0, 8005b5e huart->gState = HAL_UART_STATE_READY; 8005b32: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8005b34: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8005b38: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8005b3c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8005b40: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005b42: 4632 mov r2, r6 huart->TxXferCount--; 8005b44: 3b01 subs r3, #1 8005b46: b29b uxth r3, r3 8005b48: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005b4a: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005b4c: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005b4e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005b52: 4620 mov r0, r4 8005b54: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005b56: d10e bne.n 8005b76 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005b58: f7ff ff6a bl 8005a30 8005b5c: b110 cbz r0, 8005b64 return HAL_TIMEOUT; 8005b5e: 2003 movs r0, #3 8005b60: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 8005b64: 882b ldrh r3, [r5, #0] 8005b66: 6822 ldr r2, [r4, #0] 8005b68: f3c3 0308 ubfx r3, r3, #0, #9 8005b6c: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005b6e: 6923 ldr r3, [r4, #16] 8005b70: b943 cbnz r3, 8005b84 pData +=2U; 8005b72: 3502 adds r5, #2 8005b74: e7d3 b.n 8005b1e if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005b76: f7ff ff5b bl 8005a30 8005b7a: 2800 cmp r0, #0 8005b7c: d1ef bne.n 8005b5e huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 8005b7e: 6823 ldr r3, [r4, #0] 8005b80: 782a ldrb r2, [r5, #0] 8005b82: 605a str r2, [r3, #4] 8005b84: 3501 adds r5, #1 8005b86: e7ca b.n 8005b1e return HAL_ERROR; 8005b88: 2001 movs r0, #1 8005b8a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8005b8e: 2002 movs r0, #2 } 8005b90: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08005b94 : if(huart->RxState == HAL_UART_STATE_READY) 8005b94: f890 303a ldrb.w r3, [r0, #58] ; 0x3a 8005b98: 2b20 cmp r3, #32 8005b9a: d120 bne.n 8005bde if((pData == NULL) || (Size == 0U)) 8005b9c: b1e9 cbz r1, 8005bda 8005b9e: b1e2 cbz r2, 8005bda __HAL_LOCK(huart); 8005ba0: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8005ba4: 2b01 cmp r3, #1 8005ba6: d01a beq.n 8005bde huart->RxXferCount = Size; 8005ba8: 85c2 strh r2, [r0, #46] ; 0x2e huart->RxXferSize = Size; 8005baa: 8582 strh r2, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8005bac: 2300 movs r3, #0 huart->RxState = HAL_UART_STATE_BUSY_RX; 8005bae: 2222 movs r2, #34 ; 0x22 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005bb0: 63c3 str r3, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8005bb2: f880 203a strb.w r2, [r0, #58] ; 0x3a __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8005bb6: 6802 ldr r2, [r0, #0] huart->pRxBuffPtr = pData; 8005bb8: 6281 str r1, [r0, #40] ; 0x28 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8005bba: 68d1 ldr r1, [r2, #12] __HAL_UNLOCK(huart); 8005bbc: f880 3038 strb.w r3, [r0, #56] ; 0x38 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8005bc0: f441 7180 orr.w r1, r1, #256 ; 0x100 8005bc4: 60d1 str r1, [r2, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8005bc6: 6951 ldr r1, [r2, #20] return HAL_OK; 8005bc8: 4618 mov r0, r3 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8005bca: f041 0101 orr.w r1, r1, #1 8005bce: 6151 str r1, [r2, #20] __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 8005bd0: 68d1 ldr r1, [r2, #12] 8005bd2: f041 0120 orr.w r1, r1, #32 8005bd6: 60d1 str r1, [r2, #12] return HAL_OK; 8005bd8: 4770 bx lr return HAL_ERROR; 8005bda: 2001 movs r0, #1 8005bdc: 4770 bx lr return HAL_BUSY; 8005bde: 2002 movs r0, #2 } 8005be0: 4770 bx lr ... 08005be4 : { 8005be4: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 8005be6: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 8005bea: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 8005bec: 2a20 cmp r2, #32 { 8005bee: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 8005bf0: d138 bne.n 8005c64 if((pData == NULL) || (Size == 0U)) 8005bf2: 2900 cmp r1, #0 8005bf4: d034 beq.n 8005c60 8005bf6: 2b00 cmp r3, #0 8005bf8: d032 beq.n 8005c60 __HAL_LOCK(huart); 8005bfa: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 8005bfe: 2a01 cmp r2, #1 8005c00: d030 beq.n 8005c64 8005c02: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005c04: 2400 movs r4, #0 __HAL_LOCK(huart); 8005c06: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 8005c0a: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8005c0c: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 8005c0e: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8005c10: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8005c12: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8005c16: 6b40 ldr r0, [r0, #52] ; 0x34 8005c18: 4a13 ldr r2, [pc, #76] ; (8005c68 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8005c1a: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8005c1c: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8005c1e: 4a13 ldr r2, [pc, #76] ; (8005c6c ) huart->hdmarx->XferAbortCallback = NULL; 8005c20: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8005c22: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8005c24: 4a12 ldr r2, [pc, #72] ; (8005c70 ) 8005c26: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8005c28: 460a mov r2, r1 8005c2a: 1d31 adds r1, r6, #4 8005c2c: f7fe fbfc bl 8004428 return HAL_OK; 8005c30: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 8005c32: 682b ldr r3, [r5, #0] 8005c34: 9401 str r4, [sp, #4] 8005c36: 681a ldr r2, [r3, #0] 8005c38: 9201 str r2, [sp, #4] 8005c3a: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8005c3c: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8005c40: 9201 str r2, [sp, #4] 8005c42: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8005c44: 68da ldr r2, [r3, #12] 8005c46: f442 7280 orr.w r2, r2, #256 ; 0x100 8005c4a: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005c4c: 695a ldr r2, [r3, #20] 8005c4e: f042 0201 orr.w r2, r2, #1 8005c52: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005c54: 695a ldr r2, [r3, #20] 8005c56: f042 0240 orr.w r2, r2, #64 ; 0x40 8005c5a: 615a str r2, [r3, #20] } 8005c5c: b002 add sp, #8 8005c5e: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8005c60: 2001 movs r0, #1 8005c62: e7fb b.n 8005c5c return HAL_BUSY; 8005c64: 2002 movs r0, #2 8005c66: e7f9 b.n 8005c5c 8005c68: 08005c77 .word 0x08005c77 8005c6c: 08005d2d .word 0x08005d2d 8005c70: 08005d39 .word 0x08005d39 08005c74 : 8005c74: 4770 bx lr 08005c76 : { 8005c76: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005c78: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005c7a: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005c7c: 681b ldr r3, [r3, #0] 8005c7e: f013 0320 ands.w r3, r3, #32 8005c82: d110 bne.n 8005ca6 huart->RxXferCount = 0U; 8005c84: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8005c86: 6813 ldr r3, [r2, #0] 8005c88: 68d9 ldr r1, [r3, #12] 8005c8a: f421 7180 bic.w r1, r1, #256 ; 0x100 8005c8e: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005c90: 6959 ldr r1, [r3, #20] 8005c92: f021 0101 bic.w r1, r1, #1 8005c96: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005c98: 6959 ldr r1, [r3, #20] 8005c9a: f021 0140 bic.w r1, r1, #64 ; 0x40 8005c9e: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8005ca0: 2320 movs r3, #32 8005ca2: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8005ca6: 4610 mov r0, r2 8005ca8: f001 f878 bl 8006d9c 8005cac: bd08 pop {r3, pc} 08005cae : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8005cae: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8005cb2: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8005cb4: 2b22 cmp r3, #34 ; 0x22 8005cb6: d136 bne.n 8005d26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005cb8: 6883 ldr r3, [r0, #8] 8005cba: 6901 ldr r1, [r0, #16] 8005cbc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8005cc0: 6802 ldr r2, [r0, #0] 8005cc2: 6a83 ldr r3, [r0, #40] ; 0x28 8005cc4: d123 bne.n 8005d0e *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8005cc6: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005cc8: b9e9 cbnz r1, 8005d06 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8005cca: f3c2 0208 ubfx r2, r2, #0, #9 8005cce: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8005cd2: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8005cd4: 8dc4 ldrh r4, [r0, #46] ; 0x2e 8005cd6: 3c01 subs r4, #1 8005cd8: b2a4 uxth r4, r4 8005cda: 85c4 strh r4, [r0, #46] ; 0x2e 8005cdc: b98c cbnz r4, 8005d02 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 8005cde: 6803 ldr r3, [r0, #0] 8005ce0: 68da ldr r2, [r3, #12] 8005ce2: f022 0220 bic.w r2, r2, #32 8005ce6: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8005ce8: 68da ldr r2, [r3, #12] 8005cea: f422 7280 bic.w r2, r2, #256 ; 0x100 8005cee: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 8005cf0: 695a ldr r2, [r3, #20] 8005cf2: f022 0201 bic.w r2, r2, #1 8005cf6: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8005cf8: 2320 movs r3, #32 8005cfa: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8005cfe: f001 f84d bl 8006d9c if(--huart->RxXferCount == 0U) 8005d02: 2000 movs r0, #0 } 8005d04: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 8005d06: b2d2 uxtb r2, r2 8005d08: f823 2b01 strh.w r2, [r3], #1 8005d0c: e7e1 b.n 8005cd2 if(huart->Init.Parity == UART_PARITY_NONE) 8005d0e: b921 cbnz r1, 8005d1a *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8005d10: 1c59 adds r1, r3, #1 8005d12: 6852 ldr r2, [r2, #4] 8005d14: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8005d16: 701a strb r2, [r3, #0] 8005d18: e7dc b.n 8005cd4 8005d1a: 6852 ldr r2, [r2, #4] 8005d1c: 1c59 adds r1, r3, #1 8005d1e: 6281 str r1, [r0, #40] ; 0x28 8005d20: f002 027f and.w r2, r2, #127 ; 0x7f 8005d24: e7f7 b.n 8005d16 return HAL_BUSY; 8005d26: 2002 movs r0, #2 8005d28: bd10 pop {r4, pc} 08005d2a : 8005d2a: 4770 bx lr 08005d2c : { 8005d2c: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8005d2e: 6a40 ldr r0, [r0, #36] ; 0x24 8005d30: f7ff fffb bl 8005d2a 8005d34: bd08 pop {r3, pc} 08005d36 : 8005d36: 4770 bx lr 08005d38 : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005d38: 6a41 ldr r1, [r0, #36] ; 0x24 { 8005d3a: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8005d3c: 680b ldr r3, [r1, #0] 8005d3e: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8005d40: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8005d44: 2821 cmp r0, #33 ; 0x21 8005d46: d10a bne.n 8005d5e 8005d48: 0612 lsls r2, r2, #24 8005d4a: d508 bpl.n 8005d5e huart->TxXferCount = 0U; 8005d4c: 2200 movs r2, #0 8005d4e: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8005d50: 68da ldr r2, [r3, #12] 8005d52: f022 02c0 bic.w r2, r2, #192 ; 0xc0 8005d56: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8005d58: 2220 movs r2, #32 8005d5a: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005d5e: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8005d60: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8005d64: 2a22 cmp r2, #34 ; 0x22 8005d66: d106 bne.n 8005d76 8005d68: 065b lsls r3, r3, #25 8005d6a: d504 bpl.n 8005d76 huart->RxXferCount = 0U; 8005d6c: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8005d6e: 4608 mov r0, r1 huart->RxXferCount = 0U; 8005d70: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8005d72: f7ff fdb1 bl 80058d8 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8005d76: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8005d78: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8005d7a: f043 0310 orr.w r3, r3, #16 8005d7e: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8005d80: f7ff ffd9 bl 8005d36 8005d84: bd08 pop {r3, pc} ... 08005d88 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8005d88: 6803 ldr r3, [r0, #0] { 8005d8a: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8005d8c: 681a ldr r2, [r3, #0] { 8005d8e: 4604 mov r4, r0 if(errorflags == RESET) 8005d90: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8005d92: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8005d94: 695d ldr r5, [r3, #20] if(errorflags == RESET) 8005d96: d107 bne.n 8005da8 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8005d98: 0696 lsls r6, r2, #26 8005d9a: d55a bpl.n 8005e52 8005d9c: 068d lsls r5, r1, #26 8005d9e: d558 bpl.n 8005e52 } 8005da0: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8005da4: f7ff bf83 b.w 8005cae if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8005da8: f015 0501 ands.w r5, r5, #1 8005dac: d102 bne.n 8005db4 8005dae: f411 7f90 tst.w r1, #288 ; 0x120 8005db2: d04e beq.n 8005e52 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8005db4: 07d3 lsls r3, r2, #31 8005db6: d505 bpl.n 8005dc4 8005db8: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 8005dba: bf42 ittt mi 8005dbc: 6be3 ldrmi r3, [r4, #60] ; 0x3c 8005dbe: f043 0301 orrmi.w r3, r3, #1 8005dc2: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005dc4: 0750 lsls r0, r2, #29 8005dc6: d504 bpl.n 8005dd2 8005dc8: b11d cbz r5, 8005dd2 huart->ErrorCode |= HAL_UART_ERROR_NE; 8005dca: 6be3 ldr r3, [r4, #60] ; 0x3c 8005dcc: f043 0302 orr.w r3, r3, #2 8005dd0: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005dd2: 0793 lsls r3, r2, #30 8005dd4: d504 bpl.n 8005de0 8005dd6: b11d cbz r5, 8005de0 huart->ErrorCode |= HAL_UART_ERROR_FE; 8005dd8: 6be3 ldr r3, [r4, #60] ; 0x3c 8005dda: f043 0304 orr.w r3, r3, #4 8005dde: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005de0: 0716 lsls r6, r2, #28 8005de2: d504 bpl.n 8005dee 8005de4: b11d cbz r5, 8005dee huart->ErrorCode |= HAL_UART_ERROR_ORE; 8005de6: 6be3 ldr r3, [r4, #60] ; 0x3c 8005de8: f043 0308 orr.w r3, r3, #8 8005dec: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8005dee: 6be3 ldr r3, [r4, #60] ; 0x3c 8005df0: 2b00 cmp r3, #0 8005df2: d066 beq.n 8005ec2 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8005df4: 0695 lsls r5, r2, #26 8005df6: d504 bpl.n 8005e02 8005df8: 0688 lsls r0, r1, #26 8005dfa: d502 bpl.n 8005e02 UART_Receive_IT(huart); 8005dfc: 4620 mov r0, r4 8005dfe: f7ff ff56 bl 8005cae dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005e02: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8005e04: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005e06: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8005e08: 6be2 ldr r2, [r4, #60] ; 0x3c 8005e0a: 0711 lsls r1, r2, #28 8005e0c: d402 bmi.n 8005e14 8005e0e: f015 0540 ands.w r5, r5, #64 ; 0x40 8005e12: d01a beq.n 8005e4a UART_EndRxTransfer(huart); 8005e14: f7ff fd60 bl 80058d8 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8005e18: 6823 ldr r3, [r4, #0] 8005e1a: 695a ldr r2, [r3, #20] 8005e1c: 0652 lsls r2, r2, #25 8005e1e: d510 bpl.n 8005e42 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005e20: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8005e22: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005e24: f022 0240 bic.w r2, r2, #64 ; 0x40 8005e28: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 8005e2a: b150 cbz r0, 8005e42 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8005e2c: 4b25 ldr r3, [pc, #148] ; (8005ec4 ) 8005e2e: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8005e30: f7fe fb38 bl 80044a4 8005e34: 2800 cmp r0, #0 8005e36: d044 beq.n 8005ec2 huart->hdmarx->XferAbortCallback(huart->hdmarx); 8005e38: 6b60 ldr r0, [r4, #52] ; 0x34 } 8005e3a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8005e3e: 6b43 ldr r3, [r0, #52] ; 0x34 8005e40: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8005e42: 4620 mov r0, r4 8005e44: f7ff ff77 bl 8005d36 8005e48: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 8005e4a: f7ff ff74 bl 8005d36 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005e4e: 63e5 str r5, [r4, #60] ; 0x3c 8005e50: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8005e52: 0616 lsls r6, r2, #24 8005e54: d527 bpl.n 8005ea6 8005e56: 060d lsls r5, r1, #24 8005e58: d525 bpl.n 8005ea6 if(huart->gState == HAL_UART_STATE_BUSY_TX) 8005e5a: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8005e5e: 2a21 cmp r2, #33 ; 0x21 8005e60: d12f bne.n 8005ec2 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005e62: 68a2 ldr r2, [r4, #8] 8005e64: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8005e68: 6a22 ldr r2, [r4, #32] 8005e6a: d117 bne.n 8005e9c huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8005e6c: 8811 ldrh r1, [r2, #0] 8005e6e: f3c1 0108 ubfx r1, r1, #0, #9 8005e72: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005e74: 6921 ldr r1, [r4, #16] 8005e76: b979 cbnz r1, 8005e98 huart->pTxBuffPtr += 2U; 8005e78: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 8005e7a: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8005e7c: 8ce2 ldrh r2, [r4, #38] ; 0x26 8005e7e: 3a01 subs r2, #1 8005e80: b292 uxth r2, r2 8005e82: 84e2 strh r2, [r4, #38] ; 0x26 8005e84: b9ea cbnz r2, 8005ec2 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8005e86: 68da ldr r2, [r3, #12] 8005e88: f022 0280 bic.w r2, r2, #128 ; 0x80 8005e8c: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8005e8e: 68da ldr r2, [r3, #12] 8005e90: f042 0240 orr.w r2, r2, #64 ; 0x40 8005e94: 60da str r2, [r3, #12] 8005e96: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8005e98: 3201 adds r2, #1 8005e9a: e7ee b.n 8005e7a huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8005e9c: 1c51 adds r1, r2, #1 8005e9e: 6221 str r1, [r4, #32] 8005ea0: 7812 ldrb r2, [r2, #0] 8005ea2: 605a str r2, [r3, #4] 8005ea4: e7ea b.n 8005e7c if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8005ea6: 0650 lsls r0, r2, #25 8005ea8: d50b bpl.n 8005ec2 8005eaa: 064a lsls r2, r1, #25 8005eac: d509 bpl.n 8005ec2 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8005eae: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8005eb0: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8005eb2: f022 0240 bic.w r2, r2, #64 ; 0x40 8005eb6: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8005eb8: 2320 movs r3, #32 8005eba: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 8005ebe: f7ff fed9 bl 8005c74 8005ec2: bd70 pop {r4, r5, r6, pc} 8005ec4: 08005ec9 .word 0x08005ec9 08005ec8 : { 8005ec8: b508 push {r3, lr} huart->RxXferCount = 0x00U; 8005eca: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005ecc: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 8005ece: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 8005ed0: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 8005ed2: f7ff ff30 bl 8005d36 8005ed6: bd08 pop {r3, pc} 08005ed8 : void SPI_Delay(int ustime) { volatile int i; volatile int k; for(i = 0; i < ustime; i++) 8005ed8: 2300 movs r3, #0 { 8005eda: b082 sub sp, #8 for(i = 0; i < ustime; i++) 8005edc: 9300 str r3, [sp, #0] 8005ede: 9b00 ldr r3, [sp, #0] 8005ee0: 4283 cmp r3, r0 8005ee2: db01 blt.n 8005ee8 { k++; } } 8005ee4: b002 add sp, #8 8005ee6: 4770 bx lr k++; 8005ee8: 9b01 ldr r3, [sp, #4] 8005eea: 3301 adds r3, #1 8005eec: 9301 str r3, [sp, #4] for(i = 0; i < ustime; i++) 8005eee: 9b00 ldr r3, [sp, #0] 8005ef0: 3301 adds r3, #1 8005ef2: e7f3 b.n 8005edc 08005ef4 : #if 1 // PYJ.2019.04.02_BEGIN -- #ifdef STM32F1 void SpiInOut(uint8_t addr_write) { 8005ef4: b570 push {r4, r5, r6, lr} 8005ef6: 4605 mov r5, r0 8005ef8: 2408 movs r4, #8 for (i = 0; i < 8; i++) { SPI_Delay(SDA_SETUP_TIME); Clr_SX1278_SCK(); 8005efa: 4e14 ldr r6, [pc, #80] ; (8005f4c ) SPI_Delay(SDA_SETUP_TIME); 8005efc: 2004 movs r0, #4 8005efe: f7ff ffeb bl 8005ed8 Clr_SX1278_SCK(); 8005f02: 2200 movs r2, #0 8005f04: 2108 movs r1, #8 8005f06: 4630 mov r0, r6 8005f08: f7fe fd08 bl 800491c if (addr_write & 0x80) 8005f0c: 062b lsls r3, r5, #24 { Set_SX1278_SDI(); 8005f0e: bf4c ite mi 8005f10: 2201 movmi r2, #1 } else { Clr_SX1278_SDI(); 8005f12: 2200 movpl r2, #0 8005f14: 2120 movs r1, #32 8005f16: 4630 mov r0, r6 8005f18: f7fe fd00 bl 800491c } SPI_Delay(SDA_SETUP_TIME); 8005f1c: 2004 movs r0, #4 8005f1e: f7ff ffdb bl 8005ed8 Set_SX1278_SCK(); 8005f22: 2201 movs r2, #1 8005f24: 2108 movs r1, #8 8005f26: 4630 mov r0, r6 8005f28: f7fe fcf8 bl 800491c 8005f2c: 3c01 subs r4, #1 addr_write = addr_write << 1; SPI_Delay(SDA_SETUP_TIME); 8005f2e: 2004 movs r0, #4 addr_write = addr_write << 1; 8005f30: 006d lsls r5, r5, #1 SPI_Delay(SDA_SETUP_TIME); 8005f32: f7ff ffd1 bl 8005ed8 for (i = 0; i < 8; i++) 8005f36: f014 04ff ands.w r4, r4, #255 ; 0xff addr_write = addr_write << 1; 8005f3a: b2ed uxtb r5, r5 for (i = 0; i < 8; i++) 8005f3c: d1de bne.n 8005efc } Clr_SX1278_SCK(); 8005f3e: 4622 mov r2, r4 } 8005f40: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} Clr_SX1278_SCK(); 8005f44: 2108 movs r1, #8 8005f46: 4801 ldr r0, [pc, #4] ; (8005f4c ) 8005f48: f7fe bce8 b.w 800491c 8005f4c: 40010c00 .word 0x40010c00 08005f50 : uint8_t SpiRead(void) { 8005f50: b570 push {r4, r5, r6, lr} 8005f52: 2508 movs r5, #8 uint8_t i = 0,Readdata = 0; 8005f54: 2400 movs r4, #0 for (i = 0; i < 8; i++) { Readdata <<= 1; SPI_Delay(SDA_SETUP_TIME); Set_SX1278_SCK(); 8005f56: 4e10 ldr r6, [pc, #64] ; (8005f98 ) SPI_Delay(SDA_SETUP_TIME); 8005f58: 2004 movs r0, #4 8005f5a: f7ff ffbd bl 8005ed8 Set_SX1278_SCK(); 8005f5e: 2108 movs r1, #8 8005f60: 4630 mov r0, r6 8005f62: 2201 movs r2, #1 8005f64: f7fe fcda bl 800491c Readdata <<= 1; 8005f68: 0064 lsls r4, r4, #1 if (Read_SX1278_SDO()) 8005f6a: 2110 movs r1, #16 8005f6c: 4630 mov r0, r6 Readdata <<= 1; 8005f6e: b2e4 uxtb r4, r4 if (Read_SX1278_SDO()) 8005f70: f7fe fcce bl 8004910 8005f74: b108 cbz r0, 8005f7a Readdata |= 0x01; 8005f76: f044 0401 orr.w r4, r4, #1 else Readdata &= 0xfe; SPI_Delay(SDA_SETUP_TIME); 8005f7a: 2004 movs r0, #4 8005f7c: f7ff ffac bl 8005ed8 8005f80: 3d01 subs r5, #1 Clr_SX1278_SCK(); 8005f82: 2200 movs r2, #0 8005f84: 2108 movs r1, #8 8005f86: 4630 mov r0, r6 8005f88: f7fe fcc8 bl 800491c for (i = 0; i < 8; i++) 8005f8c: f015 05ff ands.w r5, r5, #255 ; 0xff 8005f90: d1e2 bne.n 8005f58 } return Readdata; } 8005f92: 4620 mov r0, r4 8005f94: bd70 pop {r4, r5, r6, pc} 8005f96: bf00 nop 8005f98: 40010c00 .word 0x40010c00 08005f9c : // Lora_MOSI_SET; // SPI_Delay(SDA_SETUP_TIME); } #else void BLUECELL_SPI_Transmit(uint8_t data) { SpiInOut(data); 8005f9c: f7ff bfaa b.w 8005ef4 08005fa0 : } } void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){ 8005fa0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8005fa4: 4606 mov r6, r0 8005fa6: 460f mov r7, r1 8005fa8: 4690 mov r8, r2 8005faa: 461d mov r5, r3 HAL_StatusTypeDef status = HAL_ERROR; for(uint8_t i = 0; i < size; i++){ 8005fac: 2400 movs r4, #0 status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000); 8005fae: f44f 69fa mov.w r9, #2000 ; 0x7d0 8005fb2: f04f 0a01 mov.w sl, #1 HAL_Delay(5); if(status > HAL_OK) printf("EEPROM SAVE ERROR!!! \n"); 8005fb6: f8df b040 ldr.w fp, [pc, #64] ; 8005ff8 void M24C32_Data_Write(I2C_HandleTypeDef* hi2cx,uint8_t* data,uint16_t address,uint8_t size){ 8005fba: b087 sub sp, #28 for(uint8_t i = 0; i < size; i++){ 8005fbc: 42ac cmp r4, r5 8005fbe: d102 bne.n 8005fc6 } // I2c_Status_Check(status); } 8005fc0: b007 add sp, #28 8005fc2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} status = HAL_I2C_Mem_Write(hi2cx,0xA0,address + i, I2C_MEMADD_SIZE_16BIT, &data[i],1, 2000); 8005fc6: 193b adds r3, r7, r4 8005fc8: eb08 0204 add.w r2, r8, r4 8005fcc: 9300 str r3, [sp, #0] 8005fce: b292 uxth r2, r2 8005fd0: 2310 movs r3, #16 8005fd2: 21a0 movs r1, #160 ; 0xa0 8005fd4: f8cd 9008 str.w r9, [sp, #8] 8005fd8: f8cd a004 str.w sl, [sp, #4] 8005fdc: 4630 mov r0, r6 8005fde: f7fe feef bl 8004dc0 8005fe2: 9005 str r0, [sp, #20] HAL_Delay(5); 8005fe4: 2005 movs r0, #5 8005fe6: f7fe f965 bl 80042b4 if(status > HAL_OK) 8005fea: 9b05 ldr r3, [sp, #20] 8005fec: b113 cbz r3, 8005ff4 printf("EEPROM SAVE ERROR!!! \n"); 8005fee: 4658 mov r0, fp 8005ff0: f001 fe32 bl 8007c58 8005ff4: 3401 adds r4, #1 8005ff6: e7e1 b.n 8005fbc 8005ff8: 08008cbc .word 0x08008cbc 08005ffc : uint8_t M24C32_Data_Read(I2C_HandleTypeDef* hi2cx,uint16_t address){ 8005ffc: b57f push {r0, r1, r2, r3, r4, r5, r6, lr} uint8_t data[1] = {0}; 8005ffe: 2200 movs r2, #0 8006000: ab06 add r3, sp, #24 8006002: f803 2d04 strb.w r2, [r3, #-4]! HAL_StatusTypeDef status = HAL_ERROR; status = HAL_I2C_Mem_Read(hi2cx,0xA1, address,I2C_MEMADD_SIZE_16BIT, &data[0],1, 2000); 8006006: f44f 62fa mov.w r2, #2000 ; 0x7d0 800600a: 9202 str r2, [sp, #8] 800600c: 2201 movs r2, #1 800600e: 9300 str r3, [sp, #0] 8006010: 9201 str r2, [sp, #4] 8006012: 2310 movs r3, #16 8006014: 460a mov r2, r1 8006016: 21a1 movs r1, #161 ; 0xa1 8006018: f7fe ff68 bl 8004eec // I2c_Status_Check(status); // printf("Readdata[0] : %02x\n",data); return data[0]; } 800601c: f89d 0014 ldrb.w r0, [sp, #20] 8006020: b007 add sp, #28 8006022: f85d fb04 ldr.w pc, [sp], #4 ... 08006028 : printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]); printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]); } } uint16_t RGB_Limit_Address_Check(uint8_t id){ 8006028: 3801 subs r0, #1 800602a: b2c0 uxtb r0, r0 800602c: 2807 cmp r0, #7 800602e: bf9a itte ls 8006030: 4b01 ldrls r3, [pc, #4] ; (8006038 ) 8006032: 5c18 ldrbls r0, [r3, r0] 8006034: 2000 movhi r0, #0 case 6: ret = RGB6_LIMIT_RED_H_ADDRESS;break; case 7: ret = RGB7_LIMIT_RED_H_ADDRESS;break; case 8: ret = RGB8_LIMIT_RED_H_ADDRESS;break; } return ret; } 8006036: 4770 bx lr 8006038: 08008cd2 .word 0x08008cd2 0800603c : uint16_t RGB_Location_Address_Check(uint8_t id){ 800603c: 3801 subs r0, #1 800603e: b2c0 uxtb r0, r0 8006040: 2807 cmp r0, #7 8006042: bf9a itte ls 8006044: 4b02 ldrls r3, [pc, #8] ; (8006050 ) 8006046: f833 0010 ldrhls.w r0, [r3, r0, lsl #1] 800604a: 2000 movhi r0, #0 case 6: ret = RGB6_LOCATION_ADDRESS;break; case 7: ret = RGB7_LOCATION_ADDRESS;break; case 8: ret = RGB8_LOCATION_ADDRESS;break; } return ret; } 800604c: 4770 bx lr 800604e: bf00 nop 8006050: 08008cda .word 0x08008cda 08006054 : void RGB_Data_Init(void){ 8006054: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS); 8006058: 2100 movs r1, #0 800605a: 4849 ldr r0, [pc, #292] ; (8006180 ) 800605c: 4e49 ldr r6, [pc, #292] ; (8006184 ) 800605e: f7ff ffcd bl 8005ffc 8006062: 2401 movs r4, #1 8006064: 46b0 mov r8, r6 8006066: 4d48 ldr r5, [pc, #288] ; (8006188 ) RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8); 8006068: 4f45 ldr r7, [pc, #276] ; (8006180 ) MyControllerID = M24C32_Data_Read(&hi2c2,MY_ID_ADDRESS); 800606a: 7028 strb r0, [r5, #0] RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8); 800606c: 4621 mov r1, r4 800606e: 4638 mov r0, r7 8006070: f7ff ffc4 bl 8005ffc RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i)); 8006074: 1c61 adds r1, r4, #1 RGB_SensorRedLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_H_ADDRESS + (6 * i)) << 8); 8006076: 0200 lsls r0, r0, #8 8006078: 8070 strh r0, [r6, #2] RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i)); 800607a: b289 uxth r1, r1 800607c: 4638 mov r0, r7 800607e: f7ff ffbd bl 8005ffc 8006082: 3406 adds r4, #6 8006084: 8873 ldrh r3, [r6, #2] 8006086: b2a4 uxth r4, r4 8006088: 4318 orrs r0, r3 for(uint8_t i = 0; i < 8; i++){ 800608a: 2c31 cmp r4, #49 ; 0x31 RGB_SensorRedLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_RED_L_ADDRESS + (6 * i)); 800608c: f826 0f02 strh.w r0, [r6, #2]! for(uint8_t i = 0; i < 8; i++){ 8006090: d1ec bne.n 800606c 8006092: f8df 9108 ldr.w r9, [pc, #264] ; 800619c 8006096: 2403 movs r4, #3 8006098: 464f mov r7, r9 RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8); 800609a: 4e39 ldr r6, [pc, #228] ; (8006180 ) 800609c: 4621 mov r1, r4 800609e: 4630 mov r0, r6 80060a0: f7ff ffac bl 8005ffc RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i)); 80060a4: 1c61 adds r1, r4, #1 RGB_SensorGreenLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_H_ADDRESS + (6 * i)) << 8); 80060a6: 0200 lsls r0, r0, #8 80060a8: f8a9 0002 strh.w r0, [r9, #2] RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i)); 80060ac: b289 uxth r1, r1 80060ae: 4630 mov r0, r6 80060b0: f7ff ffa4 bl 8005ffc 80060b4: 3406 adds r4, #6 80060b6: f8b9 3002 ldrh.w r3, [r9, #2] 80060ba: b2a4 uxth r4, r4 80060bc: 4318 orrs r0, r3 for(uint8_t i = 0; i < 8; i++){ 80060be: 2c33 cmp r4, #51 ; 0x33 RGB_SensorGreenLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_GREEN_L_ADDRESS + (6 * i)); 80060c0: f829 0f02 strh.w r0, [r9, #2]! for(uint8_t i = 0; i < 8; i++){ 80060c4: d1ea bne.n 800609c 80060c6: f8df 90d8 ldr.w r9, [pc, #216] ; 80061a0 80060ca: 2405 movs r4, #5 80060cc: 46cb mov fp, r9 RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8); 80060ce: 4e2c ldr r6, [pc, #176] ; (8006180 ) 80060d0: 4621 mov r1, r4 80060d2: 4630 mov r0, r6 80060d4: f7ff ff92 bl 8005ffc RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i)); 80060d8: 1c61 adds r1, r4, #1 RGB_SensorBlueLimit_Buf[i + 1] = (M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_H_ADDRESS + (6 * i)) << 8); 80060da: 0200 lsls r0, r0, #8 80060dc: f8a9 0002 strh.w r0, [r9, #2] RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i)); 80060e0: b289 uxth r1, r1 80060e2: 4630 mov r0, r6 80060e4: f7ff ff8a bl 8005ffc 80060e8: 3406 adds r4, #6 80060ea: f8b9 3002 ldrh.w r3, [r9, #2] 80060ee: b2a4 uxth r4, r4 80060f0: 4318 orrs r0, r3 for(uint8_t i = 0; i < 8; i++){ 80060f2: 2c35 cmp r4, #53 ; 0x35 RGB_SensorBlueLimit_Buf[i + 1] |= M24C32_Data_Read(&hi2c2,RGB1_LIMIT_BLUE_L_ADDRESS + (6 * i)); 80060f4: f829 0f02 strh.w r0, [r9, #2]! for(uint8_t i = 0; i < 8; i++){ 80060f8: d1ea bne.n 80060d0 80060fa: 2400 movs r4, #0 80060fc: f04f 0932 mov.w r9, #50 ; 0x32 RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa); 8006100: 1c66 adds r6, r4, #1 8006102: b2f0 uxtb r0, r6 8006104: f7ff ff9a bl 800603c 8006108: f04f 0a00 mov.w sl, #0 800610c: 4602 mov r2, r0 800610e: fb09 f404 mul.w r4, r9, r4 8006112: eb02 010a add.w r1, r2, sl 8006116: b289 uxth r1, r1 8006118: 4819 ldr r0, [pc, #100] ; (8006180 ) 800611a: 9201 str r2, [sp, #4] 800611c: f7ff ff6e bl 8005ffc 8006120: 4b1a ldr r3, [pc, #104] ; (800618c ) 8006122: eb0a 0104 add.w r1, sl, r4 8006126: f10a 0a01 add.w sl, sl, #1 800612a: 4419 add r1, r3 for(uint8_t aa= 0; aa < 50; aa++) 800612c: f1ba 0f32 cmp.w sl, #50 ; 0x32 RGB_Location_Buf[i + 1][aa] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(i + 1) + aa); 8006130: f881 0032 strb.w r0, [r1, #50] ; 0x32 for(uint8_t aa= 0; aa < 50; aa++) 8006134: 9a01 ldr r2, [sp, #4] 8006136: d1ec bne.n 8006112 for(uint8_t i = 0; i < 8; i++){ 8006138: 2e08 cmp r6, #8 800613a: 4634 mov r4, r6 800613c: d1e0 bne.n 8006100 printf("MY id is %d \n",MyControllerID); 800613e: 7829 ldrb r1, [r5, #0] 8006140: 4813 ldr r0, [pc, #76] ; (8006190 ) 8006142: f001 fd01 bl 8007b48 8006146: 2401 movs r4, #1 printf("RGB_SensorRedLimit_Buf[%d] : %04x\n",i,RGB_SensorRedLimit_Buf[i]); 8006148: f8df 9058 ldr.w r9, [pc, #88] ; 80061a4 printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]); 800614c: 4e11 ldr r6, [pc, #68] ; (8006194 ) printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]); 800614e: 4d12 ldr r5, [pc, #72] ; (8006198 ) printf("RGB_SensorRedLimit_Buf[%d] : %04x\n",i,RGB_SensorRedLimit_Buf[i]); 8006150: f838 2014 ldrh.w r2, [r8, r4, lsl #1] 8006154: 4621 mov r1, r4 8006156: 4648 mov r0, r9 8006158: f001 fcf6 bl 8007b48 printf("RGB_SensorGreenLimit_Buf[%d] : %04x\n",i,RGB_SensorGreenLimit_Buf[i]); 800615c: f837 2014 ldrh.w r2, [r7, r4, lsl #1] 8006160: 4621 mov r1, r4 8006162: 4630 mov r0, r6 8006164: f001 fcf0 bl 8007b48 printf("RGB_SensorBlueLimit_Buf[%d] : %04x\n",i,RGB_SensorBlueLimit_Buf[i]); 8006168: f83b 2014 ldrh.w r2, [fp, r4, lsl #1] 800616c: 4621 mov r1, r4 800616e: 4628 mov r0, r5 8006170: 3401 adds r4, #1 8006172: f001 fce9 bl 8007b48 for(uint8_t i = 1; i <= 8; i++){ 8006176: 2c09 cmp r4, #9 8006178: d1ea bne.n 8006150 } 800617a: b003 add sp, #12 800617c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8006180: 20000438 .word 0x20000438 8006184: 200002e4 .word 0x200002e4 8006188: 2000034c .word 0x2000034c 800618c: 200000fe .word 0x200000fe 8006190: 08008cf2 .word 0x08008cf2 8006194: 08008d27 .word 0x08008d27 8006198: 08008d4e .word 0x08008d4e 800619c: 200002d2 .word 0x200002d2 80061a0: 200002c0 .word 0x200002c0 80061a4: 08008d00 .word 0x08008d00 080061a8 : void RGB_Response_Func(uint8_t* data){ 80061a8: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} #if 0 for(uint8_t i = 0; i < 10; i++){ printf("%02x ",data[i]); } #endif switch(type){ 80061ac: 7843 ldrb r3, [r0, #1] void RGB_Response_Func(uint8_t* data){ 80061ae: 4604 mov r4, r0 switch(type){ 80061b0: 3b01 subs r3, #1 80061b2: 2b15 cmp r3, #21 80061b4: d879 bhi.n 80062aa 80061b6: e8df f003 tbb [pc, r3] 80061ba: 0b23 .short 0x0b23 80061bc: 17557823 .word 0x17557823 80061c0: 782a2323 .word 0x782a2323 80061c4: 2e787878 .word 0x2e787878 80061c8: 55785537 .word 0x55785537 80061cc: 66787878 .word 0x66787878 case RGB_Status_Data_Request: Uart2_Data_Send(data,RGB_SensorDataRequest_Length); break; case RGB_ControllerID_SET: Uart1_Data_Send(data,RGB_ControllerID_SET_Length); 80061d0: 210a movs r1, #10 80061d2: f000 fe53 bl 8006e7c M24C32_Data_Write(&hi2c2,&MyControllerID,MY_ID_ADDRESS,1); // EEPROM Controller ID Save 80061d6: 2301 movs r3, #1 80061d8: 2200 movs r2, #0 80061da: 4935 ldr r1, [pc, #212] ; (80062b0 ) case RGB_Status_Data_Response: Uart1_Data_Send(data,data[bluecell_length] + 3); break; case RGB_ControllerLimitSet: Uart1_Data_Send(data,data[bluecell_length] + 3); M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 80061dc: 4835 ldr r0, [pc, #212] ; (80062b4 ) else return; break; default:break; } } 80061de: b002 add sp, #8 80061e0: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 80061e4: f7ff bedc b.w 8005fa0 Uart1_Data_Send(data,data[bluecell_length] + 3); 80061e8: 7881 ldrb r1, [r0, #2] 80061ea: 3103 adds r1, #3 80061ec: b2c9 uxtb r1, r1 80061ee: f000 fe45 bl 8006e7c M24C32_Data_Write(&hi2c2,&data[bluecell_red_H],RGB_Limit_Address_Check(data[bluecell_dstid]),6); // EEPROM Controller ID Save 80061f2: 7aa0 ldrb r0, [r4, #10] 80061f4: f7ff ff18 bl 8006028 80061f8: 2306 movs r3, #6 80061fa: 4602 mov r2, r0 80061fc: 1d21 adds r1, r4, #4 80061fe: e7ed b.n 80061dc Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); 8006200: 2107 movs r1, #7 Uart2_Data_Send(data,data[bluecell_length] + 3); 8006202: 4620 mov r0, r4 } 8006204: b002 add sp, #8 8006206: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} Uart2_Data_Send(data,data[bluecell_length] + 3); 800620a: f000 be2f b.w 8006e6c 800620e: 7881 ldrb r1, [r0, #2] 8006210: 3103 adds r1, #3 8006212: b2c9 uxtb r1, r1 8006214: e7f5 b.n 8006202 M24C32_Data_Write(&hi2c2,&data[Location_stx],RGB_Location_Address_Check(data[bluecell_srcid]),data[bluecell_length] + 3); // EEPROM Controller ID Save 8006216: 78c0 ldrb r0, [r0, #3] 8006218: f7ff ff10 bl 800603c 800621c: 78a3 ldrb r3, [r4, #2] 800621e: 4602 mov r2, r0 8006220: 3303 adds r3, #3 8006222: b2db uxtb r3, r3 8006224: 4621 mov r1, r4 8006226: e7d9 b.n 80061dc data[bluecell_length] = M24C32_Data_Read(&hi2c2,RGB_Location_Address_Check(data[bluecell_dstid]) + 2); // EEPROM Controller ID Save 8006228: 7a80 ldrb r0, [r0, #10] 800622a: f7ff ff07 bl 800603c 800622e: 1c81 adds r1, r0, #2 8006230: b289 uxth r1, r1 8006232: 4820 ldr r0, [pc, #128] ; (80062b4 ) 8006234: f7ff fee2 bl 8005ffc 8006238: 70a0 strb r0, [r4, #2] temp = RGB_Location_Address_Check(data[bluecell_srcid]); 800623a: 78e0 ldrb r0, [r4, #3] 800623c: f7ff fefe bl 800603c for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){ 8006240: 2300 movs r3, #0 temp = RGB_Location_Address_Check(data[bluecell_srcid]); 8006242: 4607 mov r7, r0 data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save 8006244: f8df 806c ldr.w r8, [pc, #108] ; 80062b4 for(uint8_t i = 0; i < (data[bluecell_length] + 3); i++){ 8006248: 78a1 ldrb r1, [r4, #2] 800624a: b2de uxtb r6, r3 800624c: 1c5d adds r5, r3, #1 800624e: 1c8b adds r3, r1, #2 8006250: 42b3 cmp r3, r6 8006252: da10 bge.n 8006276 data[bluecell_type] = RGB_Location_Response; 8006254: 4620 mov r0, r4 8006256: 230f movs r3, #15 8006258: f800 3f01 strb.w r3, [r0, #1]! data[data[bluecell_length] + 1] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 800625c: 1c4d adds r5, r1, #1 800625e: f001 faaa bl 80077b6 8006262: 5560 strb r0, [r4, r5] Uart1_Data_Send(data,data[bluecell_length] + 3); 8006264: 4620 mov r0, r4 8006266: 78a1 ldrb r1, [r4, #2] 8006268: 3103 adds r1, #3 800626a: b2c9 uxtb r1, r1 } 800626c: b002 add sp, #8 800626e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} Uart1_Data_Send(data,data[bluecell_length] + 3); 8006272: f000 be03 b.w 8006e7c data[i] = M24C32_Data_Read(&hi2c2,(temp + i)); // EEPROM Controller ID Save 8006276: 19b9 adds r1, r7, r6 8006278: b289 uxth r1, r1 800627a: 4640 mov r0, r8 800627c: f7ff febe bl 8005ffc 8006280: 462b mov r3, r5 8006282: 55a0 strb r0, [r4, r6] 8006284: e7e0 b.n 8006248 memcpy(&Lora_Tempdata.Request_stx,&data[bluecell_stx],data[bluecell_length] + 3); 8006286: 7882 ldrb r2, [r0, #2] 8006288: 4601 mov r1, r0 800628a: 3203 adds r2, #3 800628c: 4668 mov r0, sp 800628e: f001 fc47 bl 8007b20 if(Lora_Tempdata.Request_dstid == MyControllerID) 8006292: 4b07 ldr r3, [pc, #28] ; (80062b0 ) 8006294: f89d 2004 ldrb.w r2, [sp, #4] 8006298: 781b ldrb r3, [r3, #0] 800629a: 429a cmp r2, r3 800629c: d105 bne.n 80062aa LoraDataSendSet(1); 800629e: 2001 movs r0, #1 } 80062a0: b002 add sp, #8 80062a2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} LoraDataSendSet(1); 80062a6: f000 bdd5 b.w 8006e54 } 80062aa: b002 add sp, #8 80062ac: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80062b0: 2000034c .word 0x2000034c 80062b4: 20000438 .word 0x20000438 080062b8 : void RGB_Sensor_LED_Alarm_ON(uint8_t id ){ 80062b8: b508 push {r3, lr} switch(id){ 80062ba: 2808 cmp r0, #8 80062bc: d850 bhi.n 8006360 80062be: e8df f000 tbb [pc, r0] 80062c2: 3005 .short 0x3005 80062c4: 44403c38 .word 0x44403c38 80062c8: 4b48 .short 0x4b48 80062ca: 2c .byte 0x2c 80062cb: 00 .byte 0x00 case 0:// 모든 LEDì˜ ì „ì›ì„ ON HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET); 80062cc: 2200 movs r2, #0 80062ce: f44f 6180 mov.w r1, #1024 ; 0x400 80062d2: 4824 ldr r0, [pc, #144] ; (8006364 ) 80062d4: f7fe fb22 bl 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET); 80062d8: 2200 movs r2, #0 80062da: f44f 6100 mov.w r1, #2048 ; 0x800 80062de: 4821 ldr r0, [pc, #132] ; (8006364 ) 80062e0: f7fe fb1c bl 800491c HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET); 80062e4: 2200 movs r2, #0 80062e6: f44f 5180 mov.w r1, #4096 ; 0x1000 80062ea: 481e ldr r0, [pc, #120] ; (8006364 ) 80062ec: f7fe fb16 bl 800491c HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET); 80062f0: 2200 movs r2, #0 80062f2: 2104 movs r1, #4 80062f4: 481c ldr r0, [pc, #112] ; (8006368 ) 80062f6: f7fe fb11 bl 800491c HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET); 80062fa: 2200 movs r2, #0 80062fc: 2140 movs r1, #64 ; 0x40 80062fe: 481b ldr r0, [pc, #108] ; (800636c ) 8006300: f7fe fb0c bl 800491c HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET); 8006304: 2200 movs r2, #0 8006306: 2180 movs r1, #128 ; 0x80 8006308: 4818 ldr r0, [pc, #96] ; (800636c ) 800630a: f7fe fb07 bl 800491c HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET); 800630e: 2200 movs r2, #0 8006310: f44f 7180 mov.w r1, #256 ; 0x100 8006314: 4815 ldr r0, [pc, #84] ; (800636c ) 8006316: f7fe fb01 bl 800491c break; case 7: HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET); break; case 8: HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET); 800631a: 2200 movs r2, #0 800631c: f44f 7100 mov.w r1, #512 ; 0x200 8006320: e015 b.n 800634e HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_RESET); 8006322: 2200 movs r2, #0 8006324: f44f 6180 mov.w r1, #1024 ; 0x400 HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET); 8006328: 480e ldr r0, [pc, #56] ; (8006364 ) break; } } 800632a: e8bd 4008 ldmia.w sp!, {r3, lr} HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET); 800632e: f7fe baf5 b.w 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_RESET); 8006332: 2200 movs r2, #0 8006334: f44f 6100 mov.w r1, #2048 ; 0x800 8006338: e7f6 b.n 8006328 HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_RESET); 800633a: 2200 movs r2, #0 800633c: f44f 5180 mov.w r1, #4096 ; 0x1000 8006340: e7f2 b.n 8006328 HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_RESET); 8006342: 2200 movs r2, #0 8006344: 2104 movs r1, #4 8006346: 4808 ldr r0, [pc, #32] ; (8006368 ) 8006348: e7ef b.n 800632a HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_RESET); 800634a: 2200 movs r2, #0 800634c: 2140 movs r1, #64 ; 0x40 HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_RESET); 800634e: 4807 ldr r0, [pc, #28] ; (800636c ) 8006350: e7eb b.n 800632a HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_RESET); 8006352: 2200 movs r2, #0 8006354: 2180 movs r1, #128 ; 0x80 8006356: e7fa b.n 800634e HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_RESET); 8006358: 2200 movs r2, #0 800635a: f44f 7180 mov.w r1, #256 ; 0x100 800635e: e7f6 b.n 800634e 8006360: bd08 pop {r3, pc} 8006362: bf00 nop 8006364: 40011000 .word 0x40011000 8006368: 40011400 .word 0x40011400 800636c: 40010c00 .word 0x40010c00 08006370 : void RGB_Sensor_LED_Alarm_OFF(uint8_t id ){ 8006370: b508 push {r3, lr} switch(id){ 8006372: 2808 cmp r0, #8 8006374: d850 bhi.n 8006418 8006376: e8df f000 tbb [pc, r0] 800637a: 3005 .short 0x3005 800637c: 44403c38 .word 0x44403c38 8006380: 4b48 .short 0x4b48 8006382: 2c .byte 0x2c 8006383: 00 .byte 0x00 case 0:// 모든 LEDì˜ ì „ì›ì„ OFF HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET); 8006384: 2201 movs r2, #1 8006386: f44f 6180 mov.w r1, #1024 ; 0x400 800638a: 4824 ldr r0, [pc, #144] ; (800641c ) 800638c: f7fe fac6 bl 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET); 8006390: 2201 movs r2, #1 8006392: f44f 6100 mov.w r1, #2048 ; 0x800 8006396: 4821 ldr r0, [pc, #132] ; (800641c ) 8006398: f7fe fac0 bl 800491c HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET); 800639c: 2201 movs r2, #1 800639e: f44f 5180 mov.w r1, #4096 ; 0x1000 80063a2: 481e ldr r0, [pc, #120] ; (800641c ) 80063a4: f7fe faba bl 800491c HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET); 80063a8: 2201 movs r2, #1 80063aa: 2104 movs r1, #4 80063ac: 481c ldr r0, [pc, #112] ; (8006420 ) 80063ae: f7fe fab5 bl 800491c HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET); 80063b2: 2201 movs r2, #1 80063b4: 2140 movs r1, #64 ; 0x40 80063b6: 481b ldr r0, [pc, #108] ; (8006424 ) 80063b8: f7fe fab0 bl 800491c HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET); 80063bc: 2201 movs r2, #1 80063be: 2180 movs r1, #128 ; 0x80 80063c0: 4818 ldr r0, [pc, #96] ; (8006424 ) 80063c2: f7fe faab bl 800491c HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET); 80063c6: 2201 movs r2, #1 80063c8: f44f 7180 mov.w r1, #256 ; 0x100 80063cc: 4815 ldr r0, [pc, #84] ; (8006424 ) 80063ce: f7fe faa5 bl 800491c break; case 7: HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET); break; case 8: HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET); 80063d2: 2201 movs r2, #1 80063d4: f44f 7100 mov.w r1, #512 ; 0x200 80063d8: e015 b.n 8006406 HAL_GPIO_WritePin(LED_CH1_GPIO_Port,LED_CH1_Pin,GPIO_PIN_SET); 80063da: 2201 movs r2, #1 80063dc: f44f 6180 mov.w r1, #1024 ; 0x400 HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET); 80063e0: 480e ldr r0, [pc, #56] ; (800641c ) break; } } 80063e2: e8bd 4008 ldmia.w sp!, {r3, lr} HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET); 80063e6: f7fe ba99 b.w 800491c HAL_GPIO_WritePin(LED_CH2_GPIO_Port,LED_CH2_Pin,GPIO_PIN_SET); 80063ea: 2201 movs r2, #1 80063ec: f44f 6100 mov.w r1, #2048 ; 0x800 80063f0: e7f6 b.n 80063e0 HAL_GPIO_WritePin(LED_CH3_GPIO_Port,LED_CH3_Pin,GPIO_PIN_SET); 80063f2: 2201 movs r2, #1 80063f4: f44f 5180 mov.w r1, #4096 ; 0x1000 80063f8: e7f2 b.n 80063e0 HAL_GPIO_WritePin(LED_CH4_GPIO_Port,LED_CH4_Pin,GPIO_PIN_SET); 80063fa: 2201 movs r2, #1 80063fc: 2104 movs r1, #4 80063fe: 4808 ldr r0, [pc, #32] ; (8006420 ) 8006400: e7ef b.n 80063e2 HAL_GPIO_WritePin(LED_CH5_GPIO_Port,LED_CH5_Pin,GPIO_PIN_SET); 8006402: 2201 movs r2, #1 8006404: 2140 movs r1, #64 ; 0x40 HAL_GPIO_WritePin(LED_CH8_GPIO_Port,LED_CH8_Pin,GPIO_PIN_SET); 8006406: 4807 ldr r0, [pc, #28] ; (8006424 ) 8006408: e7eb b.n 80063e2 HAL_GPIO_WritePin(LED_CH6_GPIO_Port,LED_CH6_Pin,GPIO_PIN_SET); 800640a: 2201 movs r2, #1 800640c: 2180 movs r1, #128 ; 0x80 800640e: e7fa b.n 8006406 HAL_GPIO_WritePin(LED_CH7_GPIO_Port,LED_CH7_Pin,GPIO_PIN_SET); 8006410: 2201 movs r2, #1 8006412: f44f 7180 mov.w r1, #256 ; 0x100 8006416: e7f6 b.n 8006406 8006418: bd08 pop {r3, pc} 800641a: bf00 nop 800641c: 40011000 .word 0x40011000 8006420: 40011400 .word 0x40011400 8006424: 40010c00 .word 0x40010c00 08006428 : void RGB_Alarm_Operate(void){ 8006428: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} uint8_t temp_warning = 0; for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 800642c: 2401 movs r4, #1 uint8_t temp_warning = 0; 800642e: 2500 movs r5, #0 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8006430: f8df 8060 ldr.w r8, [pc, #96] ; 8006494 if(LED_Alarm[SensorID_buf[i]] == 1){ 8006434: 4f15 ldr r7, [pc, #84] ; (800648c ) 8006436: f8df 9060 ldr.w r9, [pc, #96] ; 8006498 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 800643a: f898 3000 ldrb.w r3, [r8] 800643e: 42a3 cmp r3, r4 8006440: d20b bcs.n 800645a temp_warning = 1; }else{ RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]); } } if(temp_warning == 0){ // 8ê°œì˜ Sensorê°€ 전부 ì •ìƒì¼ ë•Œ 만 ë™ìž‘ 8006442: bb05 cbnz r5, 8006486 HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_RESET); //표지 LED 8006444: 462a mov r2, r5 8006446: 4812 ldr r0, [pc, #72] ; (8006490 ) 8006448: f44f 5180 mov.w r1, #4096 ; 0x1000 800644c: f7fe fa66 bl 800491c RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensorê°€ ì •ìƒì¼ 때는 LED ê°€ 켜지지 않는다. 8006450: 4628 mov r0, r5 } } 8006452: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} RGB_Sensor_LED_Alarm_OFF(0); //모든 Sensorê°€ ì •ìƒì¼ 때는 LED ê°€ 켜지지 않는다. 8006456: f7ff bf8b b.w 8006370 if(LED_Alarm[SensorID_buf[i]] == 1){ 800645a: 5d38 ldrb r0, [r7, r4] 800645c: f819 6000 ldrb.w r6, [r9, r0] 8006460: 2e01 cmp r6, #1 8006462: d10c bne.n 800647e HAL_GPIO_WritePin(LED_ALARM_GPIO_Port, LED_ALARM_Pin, GPIO_PIN_SET); //표지 LED 8006464: 480a ldr r0, [pc, #40] ; (8006490 ) 8006466: 4632 mov r2, r6 8006468: f44f 5180 mov.w r1, #4096 ; 0x1000 800646c: f7fe fa56 bl 800491c RGB_Sensor_LED_Alarm_ON(SensorID_buf[i]); 8006470: 5d38 ldrb r0, [r7, r4] 8006472: f7ff ff21 bl 80062b8 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8006476: 3401 adds r4, #1 8006478: b2e4 uxtb r4, r4 800647a: 4635 mov r5, r6 800647c: e7dd b.n 800643a RGB_Sensor_LED_Alarm_OFF(SensorID_buf[i]); 800647e: f7ff ff77 bl 8006370 8006482: 462e mov r6, r5 8006484: e7f7 b.n 8006476 8006486: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800648a: bf00 nop 800648c: 200002f7 .word 0x200002f7 8006490: 40010c00 .word 0x40010c00 8006494: 200002f6 .word 0x200002f6 8006498: 20000090 .word 0x20000090 0800649c : // LoraDataSendSet(LoraTx_mode);//경고 ë°œìƒ ì‹œ 바로 Data 전송 하는 Option Prev_Alarm_occur = Alarm_occur; } } uint8_t RGB_DeviceStatusCheck(void){ 800649c: b530 push {r4, r5, lr} uint8_t ret = 0; for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800649e: 4b09 ldr r3, [pc, #36] ; (80064c4 ) uint8_t ret = 0; 80064a0: 2000 movs r0, #0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 80064a2: 7819 ldrb r1, [r3, #0] 80064a4: 2301 movs r3, #1 if(SensorID_buf[i] > 0){ ret += 0x01 << (SensorID_buf[i] - 1); 80064a6: 461d mov r5, r3 if(SensorID_buf[i] > 0){ 80064a8: 4c07 ldr r4, [pc, #28] ; (80064c8 ) for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 80064aa: 428b cmp r3, r1 80064ac: d900 bls.n 80064b0 } } return ret; } 80064ae: bd30 pop {r4, r5, pc} if(SensorID_buf[i] > 0){ 80064b0: 5ce2 ldrb r2, [r4, r3] 80064b2: b122 cbz r2, 80064be ret += 0x01 << (SensorID_buf[i] - 1); 80064b4: 3a01 subs r2, #1 80064b6: fa05 f202 lsl.w r2, r5, r2 80064ba: 4410 add r0, r2 80064bc: b2c0 uxtb r0, r0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 80064be: 3301 adds r3, #1 80064c0: b2db uxtb r3, r3 80064c2: e7f2 b.n 80064aa 80064c4: 200002f6 .word 0x200002f6 80064c8: 200002f7 .word 0x200002f7 080064cc : } /* RGB_Data_Stackì— Loraì— Data를 보내기 위해 Bufferì— Data를 ìŒ“ì„ ë•Œ ID 마다 Location Cnt */ uint8_t RGB_BufCal(uint8_t srcid){ 80064cc: 3801 subs r0, #1 80064ce: b2c0 uxtb r0, r0 80064d0: 2807 cmp r0, #7 80064d2: bf9a itte ls 80064d4: 4b01 ldrls r3, [pc, #4] ; (80064dc ) 80064d6: 5c18 ldrbls r0, [r3, r0] 80064d8: 2000 movhi r0, #0 case 6:ret = 29;break; case 7:ret = 32;break; case 8:ret = 35;break; } return ret; } 80064da: 4770 bx lr 80064dc: 08008cea .word 0x08008cea 080064e0 : void RGB_Data_Stack(uint8_t* rgb_buf){ 80064e0: b5f8 push {r3, r4, r5, r6, r7, lr} Lora_Buf[bluecell_stx] = 0xbe; 80064e2: 23be movs r3, #190 ; 0xbe memset(&Lora_Buf[0],0x00,8); 80064e4: 4c1c ldr r4, [pc, #112] ; (8006558 ) 80064e6: 2500 movs r5, #0 Lora_Buf[bluecell_stx] = 0xbe; 80064e8: 7023 strb r3, [r4, #0] Lora_Buf[bluecell_srcid + 4] = 0xeb; 80064ea: 23eb movs r3, #235 ; 0xeb memset(&Lora_Buf[0],0x00,8); 80064ec: 6065 str r5, [r4, #4] Lora_Buf[bluecell_srcid + 4] = 0xeb; 80064ee: 71e3 strb r3, [r4, #7] Lora_Buf[bluecell_type] = RGB_Lora_DataResponse; 80064f0: 2316 movs r3, #22 80064f2: 7063 strb r3, [r4, #1] Lora_Buf[bluecell_length] = Lora_Max_Amount;// RGB Data 5byte 80064f4: 2305 movs r3, #5 80064f6: 70a3 strb r3, [r4, #2] Lora_Buf[bluecell_srcid] = MyControllerID; 80064f8: 4b18 ldr r3, [pc, #96] ; (800655c ) if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Deviceê°€ 존재 í•˜ì§€ì•Šì„ ë•Œ 80064fa: 4e19 ldr r6, [pc, #100] ; (8006560 ) Lora_Buf[bluecell_srcid] = MyControllerID; 80064fc: 781b ldrb r3, [r3, #0] void RGB_Data_Stack(uint8_t* rgb_buf){ 80064fe: 4601 mov r1, r0 if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Deviceê°€ 존재 í•˜ì§€ì•Šì„ ë•Œ 8006500: 7870 ldrb r0, [r6, #1] Lora_Buf[bluecell_srcid] = MyControllerID; 8006502: 70e3 strb r3, [r4, #3] if(RGB_BufCal(SensorID_buf[1]) == 0){//아무런 Deviceê°€ 존재 í•˜ì§€ì•Šì„ ë•Œ 8006504: f7ff ffe2 bl 80064cc 8006508: b1b8 cbz r0, 800653a for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 800650a: 4b16 ldr r3, [pc, #88] ; (8006564 ) 800650c: 7922 ldrb r2, [r4, #4] 800650e: 781f ldrb r7, [r3, #0] 8006510: 2301 movs r3, #1 Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1); 8006512: 469e mov lr, r3 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8006514: 42bb cmp r3, r7 8006516: d915 bls.n 8006544 8006518: b105 cbz r5, 800651c 800651a: 7122 strb r2, [r4, #4] 800651c: 2300 movs r3, #0 Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ; 800651e: 5cca ldrb r2, [r1, r3] 8006520: 7960 ldrb r0, [r4, #5] 8006522: 409a lsls r2, r3 8006524: 3301 adds r3, #1 8006526: 4302 orrs r2, r0 for(uint8_t i = 0; i < 8; i++){ 8006528: 2b08 cmp r3, #8 Lora_Buf[bluecell_srcid + 2] |= rgb_buf[i] << i ; 800652a: 7162 strb r2, [r4, #5] for(uint8_t i = 0; i < 8; i++){ 800652c: d1f7 bne.n 800651e Lora_Buf[bluecell_srcid + 3]= STH30_CreateCrc(&Lora_Buf[bluecell_type],Lora_Buf[bluecell_length]); 800652e: 2105 movs r1, #5 8006530: 480d ldr r0, [pc, #52] ; (8006568 ) 8006532: f001 f940 bl 80077b6 8006536: 71a0 strb r0, [r4, #6] 8006538: bdf8 pop {r3, r4, r5, r6, r7, pc} printf("Not Exist Device \n"); 800653a: 480c ldr r0, [pc, #48] ; (800656c ) } 800653c: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} printf("Not Exist Device \n"); 8006540: f001 bb8a b.w 8007c58 Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1); 8006544: 5cf0 ldrb r0, [r6, r3] for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8006546: 3301 adds r3, #1 Lora_Buf[bluecell_srcid + 1] |= 0x01 << (SensorID_buf[i] - 1); 8006548: 3801 subs r0, #1 800654a: fa0e f000 lsl.w r0, lr, r0 800654e: 4302 orrs r2, r0 8006550: b2d2 uxtb r2, r2 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8006552: b2db uxtb r3, r3 8006554: 2501 movs r5, #1 8006556: e7dd b.n 8006514 8006558: 20000099 .word 0x20000099 800655c: 2000034c .word 0x2000034c 8006560: 200002f7 .word 0x200002f7 8006564: 200002f6 .word 0x200002f6 8006568: 2000009a .word 0x2000009a 800656c: 08008d75 .word 0x08008d75 08006570 : void RGB_Alarm_Check(uint8_t* data){ 8006570: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]); 8006574: 7981 ldrb r1, [r0, #6] 8006576: 79c2 ldrb r2, [r0, #7] 8006578: 78c3 ldrb r3, [r0, #3] 800657a: 4e26 ldr r6, [pc, #152] ; (8006614 ) 800657c: ea42 2201 orr.w r2, r2, r1, lsl #8 Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]); 8006580: 7a04 ldrb r4, [r0, #8] Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]); 8006582: f826 2013 strh.w r2, [r6, r3, lsl #1] Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]); 8006586: 7a42 ldrb r2, [r0, #9] 8006588: 4923 ldr r1, [pc, #140] ; (8006618 ) 800658a: ea42 2204 orr.w r2, r2, r4, lsl #8 800658e: f821 2013 strh.w r2, [r1, r3, lsl #1] Sensor_blue[data[bluecell_srcid]] = ((data[bluecell_blue_H + 2] << 8)| data[bluecell_blue_L + 2]); 8006592: 7a84 ldrb r4, [r0, #10] 8006594: 7ac2 ldrb r2, [r0, #11] 8006596: 4d21 ldr r5, [pc, #132] ; (800661c ) 8006598: ea42 2204 orr.w r2, r2, r4, lsl #8 800659c: f825 2013 strh.w r2, [r5, r3, lsl #1] uint8_t Alarm_occur = 0; 80065a0: 2400 movs r4, #0 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80065a2: 2201 movs r2, #1 LED_Alarm[SensorID_buf[i]] = 0; 80065a4: 46a1 mov r9, r4 LED_Alarm[SensorID_buf[i]] = 1; 80065a6: 4696 mov lr, r2 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80065a8: 4b1d ldr r3, [pc, #116] ; (8006620 ) 80065aa: 4628 mov r0, r5 80065ac: f893 c000 ldrb.w ip, [r3] if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 80065b0: 4f1c ldr r7, [pc, #112] ; (8006624 ) 80065b2: 4d1d ldr r5, [pc, #116] ; (8006628 ) || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 80065b4: f8df 8084 ldr.w r8, [pc, #132] ; 800663c 80065b8: 9101 str r1, [sp, #4] for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80065ba: 4562 cmp r2, ip 80065bc: d90a bls.n 80065d4 RGB_Data_Stack(&LED_Alarm[1]); 80065be: 481b ldr r0, [pc, #108] ; (800662c ) 80065c0: f7ff ff8e bl 80064e0 if(Prev_Alarm_occur != Alarm_occur){ 80065c4: 4b1a ldr r3, [pc, #104] ; (8006630 ) 80065c6: 781a ldrb r2, [r3, #0] 80065c8: 42a2 cmp r2, r4 Prev_Alarm_occur = Alarm_occur; 80065ca: bf18 it ne 80065cc: 701c strbne r4, [r3, #0] } 80065ce: b003 add sp, #12 80065d0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 80065d4: 4b17 ldr r3, [pc, #92] ; (8006634 ) 80065d6: 5c9b ldrb r3, [r3, r2] 80065d8: f837 b013 ldrh.w fp, [r7, r3, lsl #1] 80065dc: f836 a013 ldrh.w sl, [r6, r3, lsl #1] 80065e0: 45d3 cmp fp, sl 80065e2: d20d bcs.n 8006600 || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]] 80065e4: 4914 ldr r1, [pc, #80] ; (8006638 ) 80065e6: f831 b013 ldrh.w fp, [r1, r3, lsl #1] 80065ea: 9901 ldr r1, [sp, #4] 80065ec: f831 a013 ldrh.w sl, [r1, r3, lsl #1] 80065f0: 45d3 cmp fp, sl 80065f2: d205 bcs.n 8006600 || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 80065f4: f838 b013 ldrh.w fp, [r8, r3, lsl #1] 80065f8: f830 a013 ldrh.w sl, [r0, r3, lsl #1] 80065fc: 45d3 cmp fp, sl 80065fe: d305 bcc.n 800660c Alarm_occur = 1; 8006600: 2401 movs r4, #1 LED_Alarm[SensorID_buf[i]] = 1; 8006602: f805 e003 strb.w lr, [r5, r3] for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8006606: 3201 adds r2, #1 8006608: b2d2 uxtb r2, r2 800660a: e7d6 b.n 80065ba LED_Alarm[SensorID_buf[i]] = 0; 800660c: f805 9003 strb.w r9, [r5, r3] 8006610: e7f9 b.n 8006606 8006612: bf00 nop 8006614: 20000324 .word 0x20000324 8006618: 20000312 .word 0x20000312 800661c: 20000300 .word 0x20000300 8006620: 200002f6 .word 0x200002f6 8006624: 200002e4 .word 0x200002e4 8006628: 20000090 .word 0x20000090 800662c: 20000091 .word 0x20000091 8006630: 200000fd .word 0x200000fd 8006634: 200002f7 .word 0x200002f7 8006638: 200002d2 .word 0x200002d2 800663c: 200002c0 .word 0x200002c0 08006640 : } #endif // PYJ.2019.04.14_END -- uint8_t datalosscnt[9] = {0,}; void RGB_Controller_Func(uint8_t* data){ 8006640: b530 push {r4, r5, lr} RGB_CMD_T type = data[bluecell_type]; 8006642: 7845 ldrb r5, [r0, #1] void RGB_Controller_Func(uint8_t* data){ 8006644: b09b sub sp, #108 ; 0x6c 8006646: 4604 mov r4, r0 // static uint8_t temp_sensorid; uint8_t Result_buf[100] = {0,}; 8006648: 2264 movs r2, #100 ; 0x64 800664a: 2100 movs r1, #0 800664c: a801 add r0, sp, #4 800664e: f001 fa72 bl 8007b36 uint8_t i = 0; switch(type){ 8006652: 1e6b subs r3, r5, #1 8006654: 2b16 cmp r3, #22 8006656: d836 bhi.n 80066c6 8006658: e8df f013 tbh [pc, r3, lsl #1] 800665c: 003a0017 .word 0x003a0017 8006660: 00560044 .word 0x00560044 8006664: 0091005f .word 0x0091005f 8006668: 00350035 .word 0x00350035 800666c: 00b80035 .word 0x00b80035 8006670: 00350035 .word 0x00350035 8006674: 011c0035 .word 0x011c0035 8006678: 00cc00c5 .word 0x00cc00c5 800667c: 00e30035 .word 0x00e30035 8006680: 00350035 .word 0x00350035 8006684: 00350112 .word 0x00350112 8006688: 011c .short 0x011c case RGB_Status_Data_Request: datalosscnt[data[bluecell_srcid + 1]]++; 800668a: 4b86 ldr r3, [pc, #536] ; (80068a4 ) 800668c: 7921 ldrb r1, [r4, #4] 800668e: 5c5a ldrb r2, [r3, r1] 8006690: 3201 adds r2, #1 8006692: 545a strb r2, [r3, r1] if(datalosscnt[data[bluecell_srcid + 1]] > 3 && data[bluecell_srcid + 1] != 0){ 8006694: 7922 ldrb r2, [r4, #4] 8006696: 5c9b ldrb r3, [r3, r2] 8006698: 2b03 cmp r3, #3 800669a: d907 bls.n 80066ac 800669c: b132 cbz r2, 80066ac RGB_SensorIDAutoSet(1); 800669e: 2001 movs r0, #1 80066a0: f000 fbde bl 8006e60 memset(&SensorID_buf[0],0x00,8); 80066a4: 2200 movs r2, #0 80066a6: 4b80 ldr r3, [pc, #512] ; (80068a8 ) 80066a8: 601a str r2, [r3, #0] 80066aa: 605a str r2, [r3, #4] } data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 80066ac: 78a1 ldrb r1, [r4, #2] 80066ae: 1c60 adds r0, r4, #1 80066b0: f001 f881 bl 80077b6 80066b4: 7160 strb r0, [r4, #5] memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],RGB_SensorDataRequest_Length); 80066b6: 88a2 ldrh r2, [r4, #4] 80066b8: 6820 ldr r0, [r4, #0] 80066ba: 79a3 ldrb r3, [r4, #6] 80066bc: 9001 str r0, [sp, #4] 80066be: f8ad 2008 strh.w r2, [sp, #8] 80066c2: f88d 300a strb.w r3, [sp, #10] memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); break; default: break; } RGB_Response_Func(&Result_buf[bluecell_stx]); 80066c6: a801 add r0, sp, #4 80066c8: f7ff fd6e bl 80061a8 return; } 80066cc: b01b add sp, #108 ; 0x6c 80066ce: bd30 pop {r4, r5, pc} memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80066d0: 78a2 ldrb r2, [r4, #2] 80066d2: 4621 mov r1, r4 80066d4: 3203 adds r2, #3 80066d6: a801 add r0, sp, #4 80066d8: f001 fa22 bl 8007b20 MyControllerID = data[bluecell_srcid]; // �긽��諛⑹쓽 SRC ID�뒗 �굹�쓽 DST ID�씠�떎. 80066dc: 78e2 ldrb r2, [r4, #3] 80066de: 4b73 ldr r3, [pc, #460] ; (80068ac ) 80066e0: 701a strb r2, [r3, #0] break; 80066e2: e7f0 b.n 80066c6 RGB_SensorIDAutoSet(1); 80066e4: 2001 movs r0, #1 80066e6: f000 fbbb bl 8006e60 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80066ea: 78a2 ldrb r2, [r4, #2] 80066ec: 4621 mov r1, r4 80066ee: 3203 adds r2, #3 80066f0: a801 add r0, sp, #4 80066f2: f001 fa15 bl 8007b20 Result_buf[5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80066f6: f89d 1006 ldrb.w r1, [sp, #6] 80066fa: f10d 0005 add.w r0, sp, #5 80066fe: f001 f85a bl 80077b6 8006702: f88d 0009 strb.w r0, [sp, #9] break; 8006706: e7de b.n 80066c6 SensorID_Cnt++; 8006708: 4a69 ldr r2, [pc, #420] ; (80068b0 ) SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1]; 800670a: 78e1 ldrb r1, [r4, #3] SensorID_Cnt++; 800670c: 7813 ldrb r3, [r2, #0] 800670e: 3301 adds r3, #1 8006710: b2db uxtb r3, r3 8006712: 7013 strb r3, [r2, #0] SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1]; 8006714: 4a64 ldr r2, [pc, #400] ; (80068a8 ) 8006716: 54d1 strb r1, [r2, r3] break; 8006718: e7d5 b.n 80066c6 datalosscnt[data[bluecell_srcid]] = 0; 800671a: 2100 movs r1, #0 800671c: 78e3 ldrb r3, [r4, #3] 800671e: 4a61 ldr r2, [pc, #388] ; (80068a4 ) RGB_Alarm_Check(&data[bluecell_stx]); 8006720: 4620 mov r0, r4 datalosscnt[data[bluecell_srcid]] = 0; 8006722: 54d1 strb r1, [r2, r3] data[bluecell_length] += 1; 8006724: 78a3 ldrb r3, [r4, #2] 8006726: 3301 adds r3, #1 8006728: 70a3 strb r3, [r4, #2] RGB_Alarm_Check(&data[bluecell_stx]); 800672a: f7ff ff21 bl 8006570 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 800672e: 78a2 ldrb r2, [r4, #2] 8006730: 4621 mov r1, r4 8006732: 3203 adds r2, #3 8006734: a801 add r0, sp, #4 8006736: f001 f9f3 bl 8007b20 Result_buf[Result_buf[bluecell_length] - 1] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 800673a: f7ff feaf bl 800649c 800673e: f89d 3006 ldrb.w r3, [sp, #6] 8006742: aa1a add r2, sp, #104 ; 0x68 8006744: 4413 add r3, r2 8006746: f803 0c65 strb.w r0, [r3, #-101] Result_buf[Result_buf[bluecell_length] + 0] = Lora_Buf[bluecell_srcid + 2]; 800674a: f89d 3006 ldrb.w r3, [sp, #6] Result_buf[Result_buf[bluecell_length] + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 800674e: f10d 0005 add.w r0, sp, #5 Result_buf[Result_buf[bluecell_length] + 0] = Lora_Buf[bluecell_srcid + 2]; 8006752: 4413 add r3, r2 8006754: 4a57 ldr r2, [pc, #348] ; (80068b4 ) 8006756: 7952 ldrb r2, [r2, #5] 8006758: f803 2c64 strb.w r2, [r3, #-100] Result_buf[Result_buf[bluecell_length] + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 800675c: f89d 4006 ldrb.w r4, [sp, #6] 8006760: 4621 mov r1, r4 8006762: f001 f828 bl 80077b6 8006766: ab1a add r3, sp, #104 ; 0x68 8006768: 441c add r4, r3 800676a: f804 0c63 strb.w r0, [r4, #-99] Result_buf[Result_buf[bluecell_length] + 2] = 0xeb; 800676e: f89d 3006 ldrb.w r3, [sp, #6] 8006772: aa1a add r2, sp, #104 ; 0x68 8006774: 4413 add r3, r2 8006776: 22eb movs r2, #235 ; 0xeb 8006778: f803 2c62 strb.w r2, [r3, #-98] break; 800677c: e7a3 b.n 80066c6 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 800677e: 78a2 ldrb r2, [r4, #2] 8006780: 4621 mov r1, r4 8006782: 3203 adds r2, #3 8006784: a801 add r0, sp, #4 8006786: f001 f9cb bl 8007b20 RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); 800678a: 7922 ldrb r2, [r4, #4] 800678c: 7963 ldrb r3, [r4, #5] 800678e: 7aa1 ldrb r1, [r4, #10] 8006790: ea43 2302 orr.w r3, r3, r2, lsl #8 8006794: 4a48 ldr r2, [pc, #288] ; (80068b8 ) Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006796: f10d 0005 add.w r0, sp, #5 RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); 800679a: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorGreenLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_green_H] << 8) |data[bluecell_green_L]); 800679e: 79a2 ldrb r2, [r4, #6] 80067a0: 79e3 ldrb r3, [r4, #7] 80067a2: 7aa1 ldrb r1, [r4, #10] 80067a4: ea43 2302 orr.w r3, r3, r2, lsl #8 80067a8: 4a44 ldr r2, [pc, #272] ; (80068bc ) 80067aa: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorBlueLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]); 80067ae: 7a22 ldrb r2, [r4, #8] 80067b0: 7a63 ldrb r3, [r4, #9] 80067b2: 7aa1 ldrb r1, [r4, #10] 80067b4: ea43 2302 orr.w r3, r3, r2, lsl #8 80067b8: 4a41 ldr r2, [pc, #260] ; (80068c0 ) 80067ba: f822 3011 strh.w r3, [r2, r1, lsl #1] Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80067be: f89d 1006 ldrb.w r1, [sp, #6] 80067c2: f000 fff8 bl 80077b6 80067c6: f88d 000f strb.w r0, [sp, #15] break; 80067ca: e77c b.n 80066c6 \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 80067cc: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 80067d0: 493c ldr r1, [pc, #240] ; (80068c4 ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80067d2: 4b3d ldr r3, [pc, #244] ; (80068c8 ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 80067d4: 68ca ldr r2, [r1, #12] 80067d6: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80067da: 4313 orrs r3, r2 80067dc: 60cb str r3, [r1, #12] 80067de: f3bf 8f4f dsb sy __ASM volatile ("nop"); 80067e2: bf00 nop 80067e4: e7fd b.n 80067e2 Result_buf[bluecell_type] = RGB_Location_Response; 80067e6: 230f movs r3, #15 80067e8: f88d 3005 strb.w r3, [sp, #5] Result_buf[bluecell_srcid] = data[bluecell_srcid]; 80067ec: 78e3 ldrb r3, [r4, #3] 80067ee: f88d 3007 strb.w r3, [sp, #7] break; 80067f2: e768 b.n 80066c6 Result_buf[bluecell_stx] = 0xbe; 80067f4: 23be movs r3, #190 ; 0xbe 80067f6: f88d 3004 strb.w r3, [sp, #4] Result_buf[bluecell_type] = RGB_ControllerID_GET; 80067fa: 2310 movs r3, #16 Result_buf[bluecell_length] = 3; 80067fc: 2103 movs r1, #3 Result_buf[bluecell_type] = RGB_ControllerID_GET; 80067fe: f88d 3005 strb.w r3, [sp, #5] Result_buf[bluecell_srcid] = MyControllerID; 8006802: 4b2a ldr r3, [pc, #168] ; (80068ac ) Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006804: f10d 0005 add.w r0, sp, #5 Result_buf[bluecell_srcid] = MyControllerID; 8006808: 781b ldrb r3, [r3, #0] Result_buf[bluecell_length] = 3; 800680a: f88d 1006 strb.w r1, [sp, #6] Result_buf[bluecell_srcid] = MyControllerID; 800680e: f88d 3007 strb.w r3, [sp, #7] Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006812: f000 ffd0 bl 80077b6 Result_buf[bluecell_srcid + 2] = 0xeb; 8006816: 23eb movs r3, #235 ; 0xeb Result_buf[bluecell_srcid + 1] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006818: f88d 0008 strb.w r0, [sp, #8] Result_buf[bluecell_srcid + 2] = 0xeb; 800681c: f88d 3009 strb.w r3, [sp, #9] break; 8006820: e751 b.n 80066c6 Result_buf[bluecell_stx] = 0xbe; 8006822: 23be movs r3, #190 ; 0xbe 8006824: f88d 3004 strb.w r3, [sp, #4] Result_buf[bluecell_type] = RGB_ControllerLimitGet; 8006828: 2312 movs r3, #18 Result_buf[bluecell_length] = 8; 800682a: 2108 movs r1, #8 Result_buf[bluecell_type] = RGB_ControllerLimitGet; 800682c: f88d 3005 strb.w r3, [sp, #5] Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006830: 4a21 ldr r2, [pc, #132] ; (80068b8 ) 8006832: 78e3 ldrb r3, [r4, #3] Result_buf[bluecell_length] = 8; 8006834: f88d 1006 strb.w r1, [sp, #6] Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006838: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 800683c: fa22 f001 lsr.w r0, r2, r1 Result_buf[bluecell_srcid + 1] = RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0x00FF; 8006840: f88d 2008 strb.w r2, [sp, #8] Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006844: 4a1d ldr r2, [pc, #116] ; (80068bc ) Result_buf[bluecell_srcid + 0] = (RGB_SensorRedLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006846: f88d 0007 strb.w r0, [sp, #7] Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 800684a: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 800684e: fa22 f001 lsr.w r0, r2, r1 Result_buf[bluecell_srcid + 3] = RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0x00FF; 8006852: f88d 200a strb.w r2, [sp, #10] Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006856: 4a1a ldr r2, [pc, #104] ; (80068c0 ) Result_buf[bluecell_srcid + 2] = (RGB_SensorGreenLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006858: f88d 0009 strb.w r0, [sp, #9] Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 800685c: f832 3013 ldrh.w r3, [r2, r3, lsl #1] Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006860: f10d 0005 add.w r0, sp, #5 Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 8006864: fa23 f201 lsr.w r2, r3, r1 Result_buf[bluecell_srcid + 5] = RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0x00FF; 8006868: f88d 300c strb.w r3, [sp, #12] Result_buf[bluecell_srcid + 4] = (RGB_SensorBlueLimit_Buf[data[bluecell_srcid]] & 0xFF00) >> 8; 800686c: f88d 200b strb.w r2, [sp, #11] Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006870: f000 ffa1 bl 80077b6 Result_buf[bluecell_srcid + 7] = 0xeb; 8006874: 23eb movs r3, #235 ; 0xeb Result_buf[bluecell_srcid + 6] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8006876: f88d 000d strb.w r0, [sp, #13] Result_buf[bluecell_srcid + 7] = 0xeb; 800687a: f88d 300e strb.w r3, [sp, #14] break; 800687e: e722 b.n 80066c6 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 8006880: 78a2 ldrb r2, [r4, #2] 8006882: 4621 mov r1, r4 8006884: 3203 adds r2, #3 8006886: a801 add r0, sp, #4 8006888: f001 f94a bl 8007b20 Result_buf[bluecell_type] = RGB_Lora_DataResponse; 800688c: 2316 movs r3, #22 800688e: f88d 3005 strb.w r3, [sp, #5] break; 8006892: e718 b.n 80066c6 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 8006894: 78a2 ldrb r2, [r4, #2] 8006896: 4621 mov r1, r4 8006898: 3203 adds r2, #3 800689a: a801 add r0, sp, #4 800689c: f001 f940 bl 8007b20 break; 80068a0: e711 b.n 80066c6 80068a2: bf00 nop 80068a4: 20000336 .word 0x20000336 80068a8: 200002f7 .word 0x200002f7 80068ac: 2000034c .word 0x2000034c 80068b0: 200002f6 .word 0x200002f6 80068b4: 20000099 .word 0x20000099 80068b8: 200002e4 .word 0x200002e4 80068bc: 200002d2 .word 0x200002d2 80068c0: 200002c0 .word 0x200002c0 80068c4: e000ed00 .word 0xe000ed00 80068c8: 05fa0004 .word 0x05fa0004 080068cc : SX1276_hw_SetNSS(hw, 1); HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); } __weak void SX1276_hw_SetNSS(SX1276_hw_t * hw, int value) { HAL_GPIO_WritePin(hw->nss.port, hw->nss.pin, 80068cc: 1e4b subs r3, r1, #1 80068ce: 425a negs r2, r3 80068d0: 8a01 ldrh r1, [r0, #16] 80068d2: 415a adcs r2, r3 80068d4: 6940 ldr r0, [r0, #20] 80068d6: f7fe b821 b.w 800491c 080068da : __weak void SX1276_hw_init(SX1276_hw_t * hw) { 80068da: b510 push {r4, lr} 80068dc: 4604 mov r4, r0 SX1276_hw_SetNSS(hw, 1); 80068de: 2101 movs r1, #1 80068e0: f7ff fff4 bl 80068cc HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 80068e4: 8821 ldrh r1, [r4, #0] 80068e6: 6860 ldr r0, [r4, #4] 80068e8: 2201 movs r2, #1 } 80068ea: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 80068ee: f7fe b815 b.w 800491c 080068f2 : HAL_SPI_Transmit(hw->spi, &cmd, 1, 1000); while (HAL_SPI_GetState(hw->spi) != HAL_SPI_STATE_READY) ; } #endif // PYJ.2019.04.01_END -- void SX1276_hw_SPICommand(SX1276_hw_t * hw, uint8_t cmd) { 80068f2: b510 push {r4, lr} 80068f4: 460c mov r4, r1 SX1276_hw_SetNSS(hw, 0); 80068f6: 2100 movs r1, #0 80068f8: f7ff ffe8 bl 80068cc BLUECELL_SPI_Transmit(cmd); 80068fc: 4620 mov r0, r4 } 80068fe: e8bd 4010 ldmia.w sp!, {r4, lr} BLUECELL_SPI_Transmit(cmd); 8006902: f7ff bb4b b.w 8005f9c 08006906 : //printf("\n"); SX1276_hw_SetNSS(module->hw, 1); } } void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 8006906: b5f8 push {r3, r4, r5, r6, r7, lr} 8006908: 460e mov r6, r1 800690a: 4604 mov r4, r0 800690c: 461f mov r7, r3 uint8_t length) { uint8_t i; if (length <= 1) { return; } else { SX1276_hw_SetNSS(module->hw, 0); 800690e: 2100 movs r1, #0 8006910: 6800 ldr r0, [r0, #0] void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 8006912: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 8006914: f7ff ffda bl 80068cc SX1276_hw_SPICommand(module->hw, addr | 0x80); 8006918: f046 0180 orr.w r1, r6, #128 ; 0x80 800691c: 6820 ldr r0, [r4, #0] 800691e: f7ff ffe8 bl 80068f2 8006922: 3f01 subs r7, #1 8006924: 1e6e subs r6, r5, #1 8006926: 443d add r5, r7 // printf("Test Data:"); for (i = 0; i < length; i++) { 8006928: 42ae cmp r6, r5 800692a: d104 bne.n 8006936 SX1276_hw_SPICommand(module->hw, txBuf[i]); // printf("%02x ",txBuf[i]); } // printf("\n"); SX1276_hw_SetNSS(module->hw, 1); 800692c: 2101 movs r1, #1 800692e: 6820 ldr r0, [r4, #0] 8006930: f7ff ffcc bl 80068cc 8006934: bdf8 pop {r3, r4, r5, r6, r7, pc} SX1276_hw_SPICommand(module->hw, txBuf[i]); 8006936: f816 1f01 ldrb.w r1, [r6, #1]! 800693a: 6820 ldr r0, [r4, #0] 800693c: f7ff ffd9 bl 80068f2 8006940: e7f2 b.n 8006928 08006942 : uint8_t SX1276_hw_SPIReadByte(SX1276_hw_t * hw) { 8006942: b508 push {r3, lr} SX1276_hw_SetNSS(hw, 0); 8006944: 2100 movs r1, #0 8006946: f7ff ffc1 bl 80068cc rxByte = SpiRead(); 800694a: f7ff fb01 bl 8005f50 } 800694e: b2c0 uxtb r0, r0 8006950: bd08 pop {r3, pc} 08006952 : HAL_Delay(msec); 8006952: f7fd bcaf b.w 80042b4 08006956 : __weak void SX1276_hw_Reset(SX1276_hw_t * hw) { 8006956: b510 push {r4, lr} 8006958: 4604 mov r4, r0 SX1276_hw_SetNSS(hw, 1); 800695a: 2101 movs r1, #1 800695c: f7ff ffb6 bl 80068cc HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_RESET); 8006960: 8821 ldrh r1, [r4, #0] 8006962: 2200 movs r2, #0 8006964: 6860 ldr r0, [r4, #4] 8006966: f7fd ffd9 bl 800491c SX1276_hw_DelayMs(1); 800696a: 2001 movs r0, #1 800696c: f7ff fff1 bl 8006952 HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 8006970: 6860 ldr r0, [r4, #4] 8006972: 2201 movs r2, #1 8006974: 8821 ldrh r1, [r4, #0] 8006976: f7fd ffd1 bl 800491c SX1276_hw_DelayMs(100); 800697a: 2064 movs r0, #100 ; 0x64 800697c: f7ff ffe9 bl 8006952 8006980: bd10 pop {r4, pc} 08006982 : __weak int SX1276_hw_GetDIO0(SX1276_hw_t * hw) { 8006982: b508 push {r3, lr} return (HAL_GPIO_ReadPin(hw->dio0.port, hw->dio0.pin) == GPIO_PIN_SET); 8006984: 8901 ldrh r1, [r0, #8] 8006986: 68c0 ldr r0, [r0, #12] 8006988: f7fd ffc2 bl 8004910 } 800698c: 1e43 subs r3, r0, #1 800698e: 4258 negs r0, r3 8006990: 4158 adcs r0, r3 8006992: bd08 pop {r3, pc} 08006994 : uint8_t SX1276_SPIIDRead(SX1276_t * module, uint8_t addr) { 8006994: b538 push {r3, r4, r5, lr} 8006996: 4604 mov r4, r0 SX1276_hw_SPICommand(module->hw, addr); 8006998: 6800 ldr r0, [r0, #0] 800699a: f7ff ffaa bl 80068f2 tmp = SX1276_hw_SPIReadByte(module->hw); 800699e: 6820 ldr r0, [r4, #0] 80069a0: f7ff ffcf bl 8006942 80069a4: 4605 mov r5, r0 SX1276_hw_SetNSS(module->hw, 1); 80069a6: 2101 movs r1, #1 80069a8: 6820 ldr r0, [r4, #0] 80069aa: f7ff ff8f bl 80068cc } 80069ae: 4628 mov r0, r5 80069b0: bd38 pop {r3, r4, r5, pc} 080069b2 : void SX1276_SPIWrite(SX1276_t * module, uint8_t addr, uint8_t cmd) { 80069b2: b570 push {r4, r5, r6, lr} 80069b4: 4604 mov r4, r0 80069b6: 460e mov r6, r1 80069b8: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 80069ba: 2100 movs r1, #0 80069bc: 6800 ldr r0, [r0, #0] 80069be: f7ff ff85 bl 80068cc SX1276_hw_SPICommand(module->hw, addr | 0x80); 80069c2: f046 0180 orr.w r1, r6, #128 ; 0x80 80069c6: 6820 ldr r0, [r4, #0] 80069c8: f7ff ff93 bl 80068f2 SX1276_hw_SPICommand(module->hw, cmd); 80069cc: 4629 mov r1, r5 80069ce: 6820 ldr r0, [r4, #0] 80069d0: f7ff ff8f bl 80068f2 SX1276_hw_SetNSS(module->hw, 1); 80069d4: 2101 movs r1, #1 80069d6: 6820 ldr r0, [r4, #0] 80069d8: f7ff ff78 bl 80068cc 80069dc: bd70 pop {r4, r5, r6, pc} 080069de : if (length <= 1) { 80069de: 2b01 cmp r3, #1 uint8_t length) { 80069e0: b5f8 push {r3, r4, r5, r6, r7, lr} 80069e2: 4605 mov r5, r0 80069e4: 460f mov r7, r1 80069e6: 4616 mov r6, r2 80069e8: 461c mov r4, r3 if (length <= 1) { 80069ea: d916 bls.n 8006a1a SX1276_hw_SetNSS(module->hw, 0); 80069ec: 2100 movs r1, #0 80069ee: 6800 ldr r0, [r0, #0] 80069f0: f7ff ff6c bl 80068cc SX1276_hw_SPICommand(module->hw, addr); 80069f4: 4639 mov r1, r7 80069f6: 6828 ldr r0, [r5, #0] 80069f8: f7ff ff7b bl 80068f2 80069fc: 3c01 subs r4, #1 80069fe: b2e4 uxtb r4, r4 8006a00: 1e77 subs r7, r6, #1 8006a02: 4434 add r4, r6 rxBuf[i] = SX1276_hw_SPIReadByte(module->hw); 8006a04: 6828 ldr r0, [r5, #0] 8006a06: f7ff ff9c bl 8006942 8006a0a: f807 0f01 strb.w r0, [r7, #1]! for (i = 0; i < length; i++) { 8006a0e: 42a7 cmp r7, r4 8006a10: d1f8 bne.n 8006a04 SX1276_hw_SetNSS(module->hw, 1); 8006a12: 2101 movs r1, #1 8006a14: 6828 ldr r0, [r5, #0] 8006a16: f7ff ff59 bl 80068cc 8006a1a: bdf8 pop {r3, r4, r5, r6, r7, pc} 08006a1c : if (length <= 1) { 8006a1c: 2b01 cmp r3, #1 8006a1e: d901 bls.n 8006a24 8006a20: f7ff bf71 b.w 8006906 8006a24: 4770 bx lr 08006a26 : SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01 module->readBytes = 0; SX1276_standby(module); //Entry standby mode } void SX1276_standby(SX1276_t * module) { 8006a26: b510 push {r4, lr} SX1276_SPIWrite(module, LR_RegOpMode, 0x09); 8006a28: 2209 movs r2, #9 8006a2a: 2101 movs r1, #1 void SX1276_standby(SX1276_t * module) { 8006a2c: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x09); 8006a2e: f7ff ffc0 bl 80069b2 module->status = STANDBY; 8006a32: 2301 movs r3, #1 8006a34: 72a3 strb r3, [r4, #10] 8006a36: bd10 pop {r4, pc} 08006a38 : } void SX1276_sleep(SX1276_t * module) { 8006a38: b510 push {r4, lr} SX1276_SPIWrite(module, LR_RegOpMode, 0x08); 8006a3a: 2208 movs r2, #8 8006a3c: 2101 movs r1, #1 void SX1276_sleep(SX1276_t * module) { 8006a3e: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x08); 8006a40: f7ff ffb7 bl 80069b2 module->status = SLEEP; 8006a44: 2300 movs r3, #0 8006a46: 72a3 strb r3, [r4, #10] 8006a48: bd10 pop {r4, pc} 08006a4a : } void SX1276_entryLoRa(SX1276_t * module) { SX1276_SPIWrite(module, LR_RegOpMode, 0x88); 8006a4a: 2288 movs r2, #136 ; 0x88 8006a4c: 2101 movs r1, #1 8006a4e: f7ff bfb0 b.w 80069b2 ... 08006a54 : uint8_t LoRa_Rate, uint8_t LoRa_BW,uint8_t LoRa_Lna) { 8006a54: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8006a58: 4604 mov r4, r0 8006a5a: 460d mov r5, r1 8006a5c: 4691 mov r9, r2 8006a5e: 461f mov r7, r3 8006a60: f89d 6020 ldrb.w r6, [sp, #32] 8006a64: f89d 8024 ldrb.w r8, [sp, #36] ; 0x24 SX1276_sleep(module); //Change modem mode Must in Sleep mode 8006a68: f7ff ffe6 bl 8006a38 SX1276_hw_DelayMs(15); 8006a6c: 200f movs r0, #15 8006a6e: f7ff ff70 bl 8006952 SX1276_entryLoRa(module); 8006a72: 4620 mov r0, r4 8006a74: f7ff ffe9 bl 8006a4a 8006a78: 4a32 ldr r2, [pc, #200] ; (8006b44 ) (uint8_t*) SX1276_Frequency[frequency], 3); //setting frequency parameter 8006a7a: eb05 0545 add.w r5, r5, r5, lsl #1 8006a7e: 442a add r2, r5 8006a80: 2303 movs r3, #3 8006a82: 2106 movs r1, #6 8006a84: 4620 mov r0, r4 8006a86: f7ff ff3e bl 8006906 SX1276_SPIWrite(module, LR_RegPaConfig, SX1276_Power[power]); //Setting output power parameter 8006a8a: 4b2f ldr r3, [pc, #188] ; (8006b48 ) 8006a8c: 2109 movs r1, #9 8006a8e: f813 2009 ldrb.w r2, [r3, r9] 8006a92: 4620 mov r0, r4 8006a94: f7ff ff8d bl 80069b2 SX1276_SPIWrite(module, LR_RegOcp, 0x0B); //RegOcp,Close Ocp 8006a98: 220b movs r2, #11 8006a9a: 4620 mov r0, r4 8006a9c: 4611 mov r1, r2 8006a9e: f7ff ff88 bl 80069b2 SX1276_SPIWrite(module, LR_RegLna, LoRa_Lna); //RegLNA,High & LNA Enable 8006aa2: 4642 mov r2, r8 8006aa4: 210c movs r1, #12 8006aa6: 4620 mov r0, r4 8006aa8: f7ff ff83 bl 80069b2 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8006aac: 4b27 ldr r3, [pc, #156] ; (8006b4c ) 8006aae: 5ddd ldrb r5, [r3, r7] 8006ab0: 4b27 ldr r3, [pc, #156] ; (8006b50 ) 8006ab2: 2d06 cmp r5, #6 ((SX1276_LoRaBandwidth[LoRa_BW] << 4) + (SX1276_CR << 1) + 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04) 8006ab4: 5d9a ldrb r2, [r3, r6] 8006ab6: ea4f 1202 mov.w r2, r2, lsl #4 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8006aba: d137 bne.n 8006b2c SX1276_SPIWrite(module, 8006abc: 3203 adds r2, #3 8006abe: b2d2 uxtb r2, r2 8006ac0: 211d movs r1, #29 8006ac2: 4620 mov r0, r4 8006ac4: f7ff ff75 bl 80069b2 SX1276_SPIWrite(module, 8006ac8: 2267 movs r2, #103 ; 0x67 8006aca: 211e movs r1, #30 8006acc: 4620 mov r0, r4 8006ace: f7ff ff70 bl 80069b2 tmp = SX1276_SPIRead(module, 0x31); 8006ad2: 2131 movs r1, #49 ; 0x31 8006ad4: 4620 mov r0, r4 8006ad6: f7ff ff5d bl 8006994 tmp &= 0xF8; 8006ada: f000 02f8 and.w r2, r0, #248 ; 0xf8 SX1276_SPIWrite(module, 0x31, tmp); 8006ade: f042 0205 orr.w r2, r2, #5 8006ae2: 2131 movs r1, #49 ; 0x31 8006ae4: 4620 mov r0, r4 8006ae6: f7ff ff64 bl 80069b2 SX1276_SPIWrite(module, 0x37, 0x0C); 8006aea: 220c movs r2, #12 8006aec: 2137 movs r1, #55 ; 0x37 SX1276_SPIWrite(module, 8006aee: 4620 mov r0, r4 8006af0: f7ff ff5f bl 80069b2 SX1276_SPIWrite(module, LR_RegSymbTimeoutLsb, 0xFF); //RegSymbTimeoutLsb Timeout = 0x3FF(Max) 8006af4: 4620 mov r0, r4 8006af6: 22ff movs r2, #255 ; 0xff 8006af8: 211f movs r1, #31 8006afa: f7ff ff5a bl 80069b2 SX1276_SPIWrite(module, LR_RegPreambleMsb, 0x00); //RegPreambleMsb 8006afe: 4620 mov r0, r4 8006b00: 2200 movs r2, #0 8006b02: 2120 movs r1, #32 8006b04: f7ff ff55 bl 80069b2 SX1276_SPIWrite(module, LR_RegPreambleLsb, 12); //RegPreambleLsb 8+4=12byte Preamble 8006b08: 4620 mov r0, r4 8006b0a: 220c movs r2, #12 8006b0c: 2121 movs r1, #33 ; 0x21 8006b0e: f7ff ff50 bl 80069b2 SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01 8006b12: 4620 mov r0, r4 8006b14: 2201 movs r2, #1 8006b16: 2141 movs r1, #65 ; 0x41 8006b18: f7ff ff4b bl 80069b2 module->readBytes = 0; 8006b1c: 2300 movs r3, #0 SX1276_standby(module); //Entry standby mode 8006b1e: 4620 mov r0, r4 module->readBytes = 0; 8006b20: f884 310b strb.w r3, [r4, #267] ; 0x10b } 8006b24: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} SX1276_standby(module); //Entry standby mode 8006b28: f7ff bf7d b.w 8006a26 SX1276_SPIWrite(module, 8006b2c: 3202 adds r2, #2 8006b2e: f002 02fe and.w r2, r2, #254 ; 0xfe 8006b32: 211d movs r1, #29 8006b34: 4620 mov r0, r4 8006b36: f7ff ff3c bl 80069b2 ((SX1276_SpreadFactor[LoRa_Rate] << 4) + (SX1276_CRC << 2) 8006b3a: 012a lsls r2, r5, #4 SX1276_SPIWrite(module, 8006b3c: 3207 adds r2, #7 8006b3e: b2d2 uxtb r2, r2 8006b40: 211e movs r1, #30 8006b42: e7d4 b.n 8006aee 8006b44: 08008d87 .word 0x08008d87 8006b48: 08008dbb .word 0x08008dbb 8006b4c: 08008dbf .word 0x08008dbf 8006b50: 08008db1 .word 0x08008db1 08006b54 : void SX1276_defaultConfig(SX1276_t * module) { 8006b54: b537 push {r0, r1, r2, r4, r5, lr} SX1276_config(module, module->frequency, module->power, module->LoRa_Rate, 8006b56: 7a05 ldrb r5, [r0, #8] 8006b58: 79c4 ldrb r4, [r0, #7] 8006b5a: 7983 ldrb r3, [r0, #6] 8006b5c: 7942 ldrb r2, [r0, #5] 8006b5e: 7901 ldrb r1, [r0, #4] 8006b60: 9501 str r5, [sp, #4] 8006b62: 9400 str r4, [sp, #0] 8006b64: f7ff ff76 bl 8006a54 } 8006b68: b003 add sp, #12 8006b6a: bd30 pop {r4, r5, pc} 08006b6c : } void SX1276_clearLoRaIrq(SX1276_t * module) { SX1276_SPIWrite(module, LR_RegIrqFlags, 0xFF); 8006b6c: 22ff movs r2, #255 ; 0xff 8006b6e: 2112 movs r1, #18 8006b70: f7ff bf1f b.w 80069b2 08006b74 : } int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006b74: b570 push {r4, r5, r6, lr} 8006b76: 4604 mov r4, r0 8006b78: 460e mov r6, r1 uint8_t addr; module->packetLength = length; 8006b7a: 7261 strb r1, [r4, #9] int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006b7c: 4615 mov r5, r2 SX1276_defaultConfig(module); //Setting base parameter 8006b7e: f7ff ffe9 bl 8006b54 SX1276_SPIWrite(module, REG_LR_PADAC, 0x84); //Normal and RX 8006b82: 2284 movs r2, #132 ; 0x84 8006b84: 214d movs r1, #77 ; 0x4d 8006b86: 4620 mov r0, r4 8006b88: f7ff ff13 bl 80069b2 SX1276_SPIWrite(module, LR_RegHopPeriod, 0xFF); //No FHSS 8006b8c: 22ff movs r2, #255 ; 0xff 8006b8e: 2124 movs r1, #36 ; 0x24 8006b90: 4620 mov r0, r4 8006b92: f7ff ff0e bl 80069b2 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x01);//DIO=00,DIO1=00,DIO2=00, DIO3=01 8006b96: 2201 movs r2, #1 8006b98: 2140 movs r1, #64 ; 0x40 8006b9a: 4620 mov r0, r4 8006b9c: f7ff ff09 bl 80069b2 SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0x3F);//Open RxDone interrupt & Timeout 8006ba0: 223f movs r2, #63 ; 0x3f 8006ba2: 2111 movs r1, #17 8006ba4: 4620 mov r0, r4 8006ba6: f7ff ff04 bl 80069b2 SX1276_clearLoRaIrq(module); 8006baa: 4620 mov r0, r4 8006bac: f7ff ffde bl 8006b6c SX1276_SPIWrite(module, LR_RegPayloadLength, length);//Payload Length 21byte(this register must difine when the data long of one byte in SF is 6) 8006bb0: 4632 mov r2, r6 8006bb2: 2122 movs r1, #34 ; 0x22 8006bb4: 4620 mov r0, r4 8006bb6: f7ff fefc bl 80069b2 addr = SX1276_SPIRead(module, LR_RegFifoRxBaseAddr); //Read RxBaseAddr 8006bba: 210f movs r1, #15 8006bbc: 4620 mov r0, r4 8006bbe: f7ff fee9 bl 8006994 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr->FiFoAddrPtr 8006bc2: 210d movs r1, #13 8006bc4: 4602 mov r2, r0 8006bc6: 4620 mov r0, r4 8006bc8: f7ff fef3 bl 80069b2 SX1276_SPIWrite(module, LR_RegOpMode, 0x85); //Mode//Low Frequency Mode 8006bcc: 2285 movs r2, #133 ; 0x85 8006bce: 2101 movs r1, #1 8006bd0: 4620 mov r0, r4 8006bd2: f7ff feee bl 80069b2 //SX1276_SPIWrite(module, LR_RegOpMode,0x05); //Continuous Rx Mode //High Frequency Mode module->readBytes = 0; 8006bd6: 2300 movs r3, #0 8006bd8: f884 310b strb.w r3, [r4, #267] ; 0x10b while (1) { if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8006bdc: 2118 movs r1, #24 8006bde: 4620 mov r0, r4 8006be0: f7ff fed8 bl 8006994 8006be4: 0743 lsls r3, r0, #29 8006be6: d503 bpl.n 8006bf0 module->status = RX; 8006be8: 2303 movs r3, #3 return 1; 8006bea: 2001 movs r0, #1 module->status = RX; 8006bec: 72a3 strb r3, [r4, #10] return 1; 8006bee: bd70 pop {r4, r5, r6, pc} } if (--timeout == 0) { 8006bf0: 3d01 subs r5, #1 8006bf2: d107 bne.n 8006c04 SX1276_hw_Reset(module->hw); 8006bf4: 6820 ldr r0, [r4, #0] 8006bf6: f7ff feae bl 8006956 SX1276_defaultConfig(module); 8006bfa: 4620 mov r0, r4 8006bfc: f7ff ffaa bl 8006b54 return 0; 8006c00: 4628 mov r0, r5 8006c02: bd70 pop {r4, r5, r6, pc} } SX1276_hw_DelayMs(1); 8006c04: 2001 movs r0, #1 8006c06: f7ff fea4 bl 8006952 if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8006c0a: e7e7 b.n 8006bdc 08006c0c : } } uint8_t SX1276_LoRaRxPacket(SX1276_t * module) { 8006c0c: b570 push {r4, r5, r6, lr} 8006c0e: 4604 mov r4, r0 unsigned char addr; unsigned char packet_size; if (SX1276_hw_GetDIO0(module->hw)) { 8006c10: 6800 ldr r0, [r0, #0] 8006c12: f7ff feb6 bl 8006982 8006c16: b1f0 cbz r0, 8006c56 memset(module->rxBuffer, 0x00, SX1276_MAX_PACKET); 8006c18: f104 060b add.w r6, r4, #11 8006c1c: f44f 7280 mov.w r2, #256 ; 0x100 8006c20: 2100 movs r1, #0 8006c22: 4630 mov r0, r6 8006c24: f000 ff87 bl 8007b36 addr = SX1276_SPIRead(module, LR_RegFifoRxCurrentaddr); //last packet addr 8006c28: 2110 movs r1, #16 8006c2a: 4620 mov r0, r4 8006c2c: f7ff feb2 bl 8006994 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr -> FiFoAddrPtr 8006c30: 210d movs r1, #13 8006c32: 4602 mov r2, r0 8006c34: 4620 mov r0, r4 8006c36: f7ff febc bl 80069b2 if (module->LoRa_Rate == SX1276_LORA_SF_6) { //When SpreadFactor is six,will used Implicit Header mode(Excluding internal packet length) 8006c3a: 79a3 ldrb r3, [r4, #6] 8006c3c: b973 cbnz r3, 8006c5c packet_size = module->packetLength; 8006c3e: 7a65 ldrb r5, [r4, #9] } else { packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes } SX1276_SPIBurstRead(module, 0x00, module->rxBuffer, packet_size); 8006c40: 4620 mov r0, r4 8006c42: 462b mov r3, r5 8006c44: 4632 mov r2, r6 8006c46: 2100 movs r1, #0 8006c48: f7ff fec9 bl 80069de module->readBytes = packet_size; 8006c4c: f884 510b strb.w r5, [r4, #267] ; 0x10b SX1276_clearLoRaIrq(module); 8006c50: 4620 mov r0, r4 8006c52: f7ff ff8b bl 8006b6c } return module->readBytes; } 8006c56: f894 010b ldrb.w r0, [r4, #267] ; 0x10b 8006c5a: bd70 pop {r4, r5, r6, pc} packet_size = SX1276_SPIRead(module, LR_RegRxNbBytes); //Number for received bytes 8006c5c: 2113 movs r1, #19 8006c5e: 4620 mov r0, r4 8006c60: f7ff fe98 bl 8006994 8006c64: 4605 mov r5, r0 8006c66: e7eb b.n 8006c40 08006c68 : int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006c68: b570 push {r4, r5, r6, lr} 8006c6a: 4604 mov r4, r0 8006c6c: 460e mov r6, r1 uint8_t addr; uint8_t temp; module->packetLength = length; 8006c6e: 7261 strb r1, [r4, #9] int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8006c70: 4615 mov r5, r2 SX1276_defaultConfig(module); //setting base parameter 8006c72: f7ff ff6f bl 8006b54 SX1276_SPIWrite(module, REG_LR_PADAC, 0x87); //Tx for 20dBm 8006c76: 2287 movs r2, #135 ; 0x87 8006c78: 214d movs r1, #77 ; 0x4d 8006c7a: 4620 mov r0, r4 8006c7c: f7ff fe99 bl 80069b2 SX1276_SPIWrite(module, LR_RegHopPeriod, 0x00); //RegHopPeriod NO FHSS 8006c80: 2200 movs r2, #0 8006c82: 2124 movs r1, #36 ; 0x24 8006c84: 4620 mov r0, r4 8006c86: f7ff fe94 bl 80069b2 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01 8006c8a: 2241 movs r2, #65 ; 0x41 8006c8c: 2140 movs r1, #64 ; 0x40 8006c8e: 4620 mov r0, r4 8006c90: f7ff fe8f bl 80069b2 SX1276_clearLoRaIrq(module); 8006c94: 4620 mov r0, r4 8006c96: f7ff ff69 bl 8006b6c SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0xF7); //Open TxDone interrupt 8006c9a: 22f7 movs r2, #247 ; 0xf7 8006c9c: 2111 movs r1, #17 8006c9e: 4620 mov r0, r4 8006ca0: f7ff fe87 bl 80069b2 SX1276_SPIWrite(module, LR_RegPayloadLength, length); //RegPayloadLength 21byte 8006ca4: 4632 mov r2, r6 8006ca6: 2122 movs r1, #34 ; 0x22 8006ca8: 4620 mov r0, r4 8006caa: f7ff fe82 bl 80069b2 addr = SX1276_SPIRead(module, LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr 8006cae: 210e movs r1, #14 8006cb0: 4620 mov r0, r4 8006cb2: f7ff fe6f bl 8006994 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RegFifoAddrPtr 8006cb6: 210d movs r1, #13 8006cb8: 4602 mov r2, r0 8006cba: 4620 mov r0, r4 8006cbc: f7ff fe79 bl 80069b2 while (1) { temp = SX1276_SPIRead(module, LR_RegPayloadLength); 8006cc0: 2122 movs r1, #34 ; 0x22 8006cc2: 4620 mov r0, r4 8006cc4: f7ff fe66 bl 8006994 if (temp == length) { 8006cc8: 4286 cmp r6, r0 8006cca: d103 bne.n 8006cd4 module->status = TX; 8006ccc: 2302 movs r3, #2 return 1; 8006cce: 2001 movs r0, #1 module->status = TX; 8006cd0: 72a3 strb r3, [r4, #10] return 1; 8006cd2: bd70 pop {r4, r5, r6, pc} } if (--timeout == 0) { 8006cd4: 3d01 subs r5, #1 8006cd6: d1f3 bne.n 8006cc0 SX1276_hw_Reset(module->hw); 8006cd8: 6820 ldr r0, [r4, #0] 8006cda: f7ff fe3c bl 8006956 SX1276_defaultConfig(module); 8006cde: 4620 mov r0, r4 8006ce0: f7ff ff38 bl 8006b54 return 0; 8006ce4: 4628 mov r0, r5 } } } 8006ce6: bd70 pop {r4, r5, r6, pc} 08006ce8 : int SX1276_LoRaTxPacket(SX1276_t * module, uint8_t* txBuffer, uint8_t length, uint32_t timeout) { 8006ce8: b570 push {r4, r5, r6, lr} 8006cea: 4604 mov r4, r0 8006cec: 461e mov r6, r3 SX1276_SPIBurstWrite(module, 0x00, txBuffer, length); 8006cee: 4613 mov r3, r2 8006cf0: 460a mov r2, r1 8006cf2: 2100 movs r1, #0 8006cf4: f7ff fe92 bl 8006a1c SX1276_SPIWrite(module, LR_RegOpMode, 0x8b); //Tx Mode 8006cf8: 228b movs r2, #139 ; 0x8b 8006cfa: 2101 movs r1, #1 8006cfc: 4620 mov r0, r4 8006cfe: f7ff fe58 bl 80069b2 while (1) { if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over 8006d02: 6820 ldr r0, [r4, #0] 8006d04: f7ff fe3d bl 8006982 8006d08: 4605 mov r5, r0 8006d0a: b160 cbz r0, 8006d26 SX1276_SPIRead(module, LR_RegIrqFlags); 8006d0c: 2112 movs r1, #18 8006d0e: 4620 mov r0, r4 8006d10: f7ff fe40 bl 8006994 SX1276_clearLoRaIrq(module); //Clear irq 8006d14: 4620 mov r0, r4 8006d16: f7ff ff29 bl 8006b6c SX1276_standby(module); //Entry Standby mode 8006d1a: 4620 mov r0, r4 8006d1c: f7ff fe83 bl 8006a26 return 1; 8006d20: 2501 movs r5, #1 SX1276_defaultConfig(module); return 0; } SX1276_hw_DelayMs(1); } } 8006d22: 4628 mov r0, r5 8006d24: bd70 pop {r4, r5, r6, pc} if (--timeout == 0) { 8006d26: 3e01 subs r6, #1 8006d28: d106 bne.n 8006d38 SX1276_hw_Reset(module->hw); 8006d2a: 6820 ldr r0, [r4, #0] 8006d2c: f7ff fe13 bl 8006956 SX1276_defaultConfig(module); 8006d30: 4620 mov r0, r4 8006d32: f7ff ff0f bl 8006b54 8006d36: e7f4 b.n 8006d22 SX1276_hw_DelayMs(1); 8006d38: 2001 movs r0, #1 8006d3a: f7ff fe0a bl 8006952 if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over 8006d3e: e7e0 b.n 8006d02 08006d40 : void SX1276_begin(SX1276_t * module, uint8_t frequency, uint8_t power, uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength,uint8_t LoRa_Lna) { 8006d40: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8006d44: 4604 mov r4, r0 8006d46: 468a mov sl, r1 8006d48: 4691 mov r9, r2 8006d4a: 4698 mov r8, r3 8006d4c: f89d 7020 ldrb.w r7, [sp, #32] 8006d50: f89d 5024 ldrb.w r5, [sp, #36] ; 0x24 8006d54: f89d 6028 ldrb.w r6, [sp, #40] ; 0x28 SX1276_hw_init(module->hw); 8006d58: 6800 ldr r0, [r0, #0] 8006d5a: f7ff fdbe bl 80068da module->frequency = frequency; 8006d5e: f884 a004 strb.w sl, [r4, #4] module->power = power; 8006d62: f884 9005 strb.w r9, [r4, #5] module->LoRa_Rate = LoRa_Rate; 8006d66: f884 8006 strb.w r8, [r4, #6] module->LoRa_BW = LoRa_BW; 8006d6a: 71e7 strb r7, [r4, #7] module->LoRa_Lna = LoRa_Lna; 8006d6c: 7226 strb r6, [r4, #8] module->packetLength = packetLength; 8006d6e: 7265 strb r5, [r4, #9] SX1276_defaultConfig(module); 8006d70: 4620 mov r0, r4 } 8006d72: e8bd 47f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, lr} SX1276_defaultConfig(module); 8006d76: f7ff beed b.w 8006b54 08006d7a : uint8_t SX1276_available(SX1276_t * module) { return SX1276_LoRaRxPacket(module); } uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) { 8006d7a: b570 push {r4, r5, r6, lr} 8006d7c: 460e mov r6, r1 if (length != module->readBytes) 8006d7e: f890 410b ldrb.w r4, [r0, #267] ; 0x10b uint8_t SX1276_read(SX1276_t * module, uint8_t* rxBuf, uint8_t length) { 8006d82: 4605 mov r5, r0 length = module->readBytes; memcpy(rxBuf, module->rxBuffer, length); 8006d84: f100 010b add.w r1, r0, #11 8006d88: 4622 mov r2, r4 8006d8a: 4630 mov r0, r6 8006d8c: f000 fec8 bl 8007b20 rxBuf[length] = '\0'; 8006d90: 2300 movs r3, #0 8006d92: 5533 strb r3, [r6, r4] module->readBytes = 0; 8006d94: f885 310b strb.w r3, [r5, #267] ; 0x10b return length; } 8006d98: 4620 mov r0, r4 8006d9a: bd70 pop {r4, r5, r6, pc} 08006d9c : void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART1)//RGB Comunication 8006d9c: 6802 ldr r2, [r0, #0] 8006d9e: 4b14 ldr r3, [pc, #80] ; (8006df0 ) { 8006da0: b410 push {r4} if(huart->Instance == USART1)//RGB Comunication 8006da2: 429a cmp r2, r3 8006da4: d10b bne.n 8006dbe { buf1[count_in1] = rx1_data[0];//(uint8_t)USART2->DR; 8006da6: 4a13 ldr r2, [pc, #76] ; (8006df4 ) 8006da8: 4913 ldr r1, [pc, #76] ; (8006df8 ) 8006daa: 7813 ldrb r3, [r2, #0] 8006dac: 780c ldrb r4, [r1, #0] 8006dae: 4913 ldr r1, [pc, #76] ; (8006dfc ) 8006db0: 54cc strb r4, [r1, r3] if(++count_in1>=buf_size){ count_in1 = 0; } 8006db2: 3301 adds r3, #1 8006db4: b2db uxtb r3, r3 8006db6: 2b63 cmp r3, #99 ; 0x63 8006db8: bf88 it hi 8006dba: 2300 movhi r3, #0 8006dbc: 7013 strb r3, [r2, #0] count_in1 = 0; } #endif // PYJ.2019.04.19_END -- // HAL_UART_Receive_IT(&huart1,&rx1_data[0],1); } if(huart->Instance == USART2) // Lora?? ?? Â???¹Â???¢Ë??Å ?? ?¬?Š¸ 8006dbe: 6802 ldr r2, [r0, #0] 8006dc0: 4b0f ldr r3, [pc, #60] ; (8006e00 ) 8006dc2: 429a cmp r2, r3 8006dc4: d111 bne.n 8006dea { buf2[count_in2] = rx2_data[0];//(uint8_t)USART2->DR; 8006dc6: 4a0f ldr r2, [pc, #60] ; (8006e04 ) 8006dc8: 490f ldr r1, [pc, #60] ; (8006e08 ) 8006dca: 7813 ldrb r3, [r2, #0] 8006dcc: 7808 ldrb r0, [r1, #0] 8006dce: 490f ldr r1, [pc, #60] ; (8006e0c ) 8006dd0: 54c8 strb r0, [r1, r3] if(++count_in2>=buf_size){ count_in2 = 0; } 8006dd2: 3301 adds r3, #1 8006dd4: b2db uxtb r3, r3 8006dd6: 2b63 cmp r3, #99 ; 0x63 8006dd8: bf88 it hi 8006dda: 2300 movhi r3, #0 8006ddc: 7013 strb r3, [r2, #0] else count_in1 = 0; // printf("UART 2 %d",((count_in2 -1) - 3)); } #endif // PYJ.2019.04.19_END -- HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8006dde: 490a ldr r1, [pc, #40] ; (8006e08 ) 8006de0: 2201 movs r2, #1 8006de2: 480b ldr r0, [pc, #44] ; (8006e10 ) if(++count_in>=buf_size) count_in=0;*/ HAL_UART_Receive_IT(&huart3,&rx3_data[0],1); } #endif // PYJ.2019.04.13_END -- } 8006de4: bc10 pop {r4} HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8006de6: f7fe bed5 b.w 8005b94 } 8006dea: bc10 pop {r4} 8006dec: 4770 bx lr 8006dee: bf00 nop 8006df0: 40013800 .word 0x40013800 8006df4: 2000041c .word 0x2000041c 8006df8: 20000660 .word 0x20000660 8006dfc: 20000354 .word 0x20000354 8006e00: 40004400 .word 0x40004400 8006e04: 2000041d .word 0x2000041d 8006e08: 2000048c .word 0x2000048c 8006e0c: 200003b8 .word 0x200003b8 8006e10: 20000704 .word 0x20000704 08006e14 : void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8006e14: 6802 ldr r2, [r0, #0] 8006e16: 4b0a ldr r3, [pc, #40] ; (8006e40 ) 8006e18: 429a cmp r2, r3 8006e1a: d10f bne.n 8006e3c UartTimerCnt++; 8006e1c: 4a09 ldr r2, [pc, #36] ; (8006e44 ) 8006e1e: 6813 ldr r3, [r2, #0] 8006e20: 3301 adds r3, #1 8006e22: 6013 str r3, [r2, #0] LedTimerCnt++; 8006e24: 4a08 ldr r2, [pc, #32] ; (8006e48 ) 8006e26: 6813 ldr r3, [r2, #0] 8006e28: 3301 adds r3, #1 8006e2a: 6013 str r3, [r2, #0] LoraTxTimerCnt++; 8006e2c: 4a07 ldr r2, [pc, #28] ; (8006e4c ) 8006e2e: 6813 ldr r3, [r2, #0] 8006e30: 3301 adds r3, #1 8006e32: 6013 str r3, [r2, #0] LoraAckTimerCnt++; 8006e34: 4a06 ldr r2, [pc, #24] ; (8006e50 ) 8006e36: 6813 ldr r3, [r2, #0] 8006e38: 3301 adds r3, #1 8006e3a: 6013 str r3, [r2, #0] 8006e3c: 4770 bx lr 8006e3e: bf00 nop 8006e40: 40001000 .word 0x40001000 8006e44: 20000350 .word 0x20000350 8006e48: 20000340 .word 0x20000340 8006e4c: 20000348 .word 0x20000348 8006e50: 20000344 .word 0x20000344 08006e54 : } } void LoraDataSendSet(uint8_t val){ LoraDataSend = val; 8006e54: 4b01 ldr r3, [pc, #4] ; (8006e5c ) 8006e56: 7018 strb r0, [r3, #0] 8006e58: 4770 bx lr 8006e5a: bf00 nop 8006e5c: 20000510 .word 0x20000510 08006e60 : } uint8_t UartDataRecvGet(void){ return UartDataisReved; } void RGB_SensorIDAutoSet(uint8_t set){ RGB_SensorIDAutoset = set; 8006e60: 4b01 ldr r3, [pc, #4] ; (8006e68 ) 8006e62: 7018 strb r0, [r3, #0] 8006e64: 4770 bx lr 8006e66: bf00 nop 8006e68: 2000034d .word 0x2000034d 08006e6c : uint8_t RGB_SensorIDAutoGet(void){ return RGB_SensorIDAutoset; } void Uart2_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart2, data,size, 10); 8006e6c: 460a mov r2, r1 8006e6e: 230a movs r3, #10 8006e70: 4601 mov r1, r0 8006e72: 4801 ldr r0, [pc, #4] ; (8006e78 ) 8006e74: f7fe be32 b.w 8005adc 8006e78: 20000704 .word 0x20000704 08006e7c : } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart1, data,size, 10); 8006e7c: 460a mov r2, r1 8006e7e: 230a movs r3, #10 8006e80: 4601 mov r1, r0 8006e82: 4801 ldr r0, [pc, #4] ; (8006e88 ) 8006e84: f7fe be2a b.w 8005adc 8006e88: 20000558 .word 0x20000558 08006e8c <_write>: } int _write (int file, uint8_t *ptr, uint16_t len) { 8006e8c: b510 push {r4, lr} 8006e8e: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8006e90: 230a movs r3, #10 8006e92: 4802 ldr r0, [pc, #8] ; (8006e9c <_write+0x10>) 8006e94: f7fe fe22 bl 8005adc return len; } 8006e98: 4620 mov r0, r4 8006e9a: bd10 pop {r4, pc} 8006e9c: 20000558 .word 0x20000558 08006ea0 : *cnt = 0; memset(buf,0x00,buf_size); } #else void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){ 8006ea0: b5f8 push {r3, r4, r5, r6, r7, lr} 8006ea2: 460d mov r5, r1 printf("%02x ",buf[i]); } printf("\r\n"); #endif crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]); 8006ea4: 7881 ldrb r1, [r0, #2] void Uart_dataCheck(uint8_t* Que_Buf,uint8_t* cnt){ 8006ea6: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&Que_Buf[bluecell_type],Que_Buf[bluecell_length],Que_Buf[Que_Buf[bluecell_length] + 1]); 8006ea8: 1843 adds r3, r0, r1 8006eaa: 785a ldrb r2, [r3, #1] 8006eac: 3001 adds r0, #1 8006eae: f000 fc9d bl 80077ec if(crccheck == CHECKSUM_ERROR){ 8006eb2: b9c8 cbnz r0, 8006ee8 for(uint8_t i = 0; i < (*cnt); i++){ printf("%02x ",Que_Buf[i]); 8006eb4: 4f11 ldr r7, [pc, #68] ; (8006efc ) for(uint8_t i = 0; i < (*cnt); i++){ 8006eb6: 782b ldrb r3, [r5, #0] 8006eb8: 1c46 adds r6, r0, #1 8006eba: b2c0 uxtb r0, r0 8006ebc: 4283 cmp r3, r0 8006ebe: d80d bhi.n 8006edc } printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,Que_Buf[Que_Buf[bluecell_length] + 1]); 8006ec0: 78a3 ldrb r3, [r4, #2] 8006ec2: 2100 movs r1, #0 8006ec4: 4423 add r3, r4 8006ec6: 785a ldrb r2, [r3, #1] 8006ec8: 480d ldr r0, [pc, #52] ; (8006f00 ) 8006eca: f000 fe3d bl 8007b48 /*NOP*/ } //*cnt = 0; memset(Que_Buf,0x00,buf_size); 8006ece: 4620 mov r0, r4 } 8006ed0: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} memset(Que_Buf,0x00,buf_size); 8006ed4: 2264 movs r2, #100 ; 0x64 8006ed6: 2100 movs r1, #0 8006ed8: f000 be2d b.w 8007b36 printf("%02x ",Que_Buf[i]); 8006edc: 5c21 ldrb r1, [r4, r0] 8006ede: 4638 mov r0, r7 8006ee0: f000 fe32 bl 8007b48 8006ee4: 4630 mov r0, r6 8006ee6: e7e6 b.n 8006eb6 else if(crccheck == NO_ERROR){ 8006ee8: 2801 cmp r0, #1 8006eea: d103 bne.n 8006ef4 RGB_Controller_Func(&Que_Buf[bluecell_stx]); 8006eec: 4620 mov r0, r4 8006eee: f7ff fba7 bl 8006640 8006ef2: e7ec b.n 8006ece printf("What Happen?\r\n"); 8006ef4: 4803 ldr r0, [pc, #12] ; (8006f04 ) 8006ef6: f000 feaf bl 8007c58 8006efa: e7e8 b.n 8006ece 8006efc: 08008dd5 .word 0x08008dd5 8006f00: 08008ddb .word 0x08008ddb 8006f04: 08008e01 .word 0x08008e01 08006f08 : #endif // PYJ.2019.04.19_END -- void RGB_Sensor_PowerOnOff(uint8_t id){ 8006f08: b510 push {r4, lr} 8006f0a: 4604 mov r4, r0 printf("%d Power ON \r\n",id); 8006f0c: 4601 mov r1, r0 8006f0e: 487b ldr r0, [pc, #492] ; (80070fc ) 8006f10: f000 fe1a bl 8007b48 switch(id){ 8006f14: 2c08 cmp r4, #8 8006f16: f200 80ef bhi.w 80070f8 8006f1a: e8df f004 tbb [pc, r4] 8006f1e: 05c3 .short 0x05c3 8006f20: 6854463e .word 0x6854463e 8006f24: 9f81 .short 0x9f81 8006f26: c3 .byte 0xc3 8006f27: 00 .byte 0x00 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; case 1: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_RESET); 8006f28: 2200 movs r2, #0 8006f2a: f44f 5100 mov.w r1, #8192 ; 0x2000 8006f2e: 4874 ldr r0, [pc, #464] ; (8007100 ) 8006f30: f7fd fcf4 bl 800491c HAL_Delay(50); 8006f34: 2032 movs r0, #50 ; 0x32 8006f36: f7fd f9bd bl 80042b4 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8006f3a: 2201 movs r2, #1 8006f3c: f44f 5100 mov.w r1, #8192 ; 0x2000 8006f40: 486f ldr r0, [pc, #444] ; (8007100 ) 8006f42: f7fd fceb bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_RESET); 8006f46: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); break; case 2: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006f48: f44f 4180 mov.w r1, #16384 ; 0x4000 8006f4c: 486c ldr r0, [pc, #432] ; (8007100 ) 8006f4e: f7fd fce5 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_RESET); 8006f52: 2200 movs r2, #0 8006f54: f44f 4100 mov.w r1, #32768 ; 0x8000 8006f58: 4869 ldr r0, [pc, #420] ; (8007100 ) 8006f5a: f7fd fcdf bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_RESET); 8006f5e: 2200 movs r2, #0 8006f60: 2140 movs r1, #64 ; 0x40 8006f62: 4868 ldr r0, [pc, #416] ; (8007104 ) 8006f64: f7fd fcda bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_RESET); 8006f68: 2200 movs r2, #0 8006f6a: 2180 movs r1, #128 ; 0x80 8006f6c: 4865 ldr r0, [pc, #404] ; (8007104 ) 8006f6e: f7fd fcd5 bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_RESET); 8006f72: 2200 movs r2, #0 8006f74: f44f 7180 mov.w r1, #256 ; 0x100 8006f78: 4862 ldr r0, [pc, #392] ; (8007104 ) 8006f7a: f7fd fccf bl 800491c HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); 8006f7e: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8006f80: f44f 7100 mov.w r1, #512 ; 0x200 8006f84: 485f ldr r0, [pc, #380] ; (8007104 ) 8006f86: f7fd fcc9 bl 800491c HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); 8006f8a: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; } } 8006f8c: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 8006f90: f44f 7180 mov.w r1, #256 ; 0x100 8006f94: 485c ldr r0, [pc, #368] ; (8007108 ) 8006f96: f7fd bcc1 b.w 800491c HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8006f9a: 2201 movs r2, #1 8006f9c: f44f 5100 mov.w r1, #8192 ; 0x2000 8006fa0: 4857 ldr r0, [pc, #348] ; (8007100 ) 8006fa2: f7fd fcbb bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006fa6: 2201 movs r2, #1 8006fa8: e7ce b.n 8006f48 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8006faa: 2201 movs r2, #1 8006fac: f44f 5100 mov.w r1, #8192 ; 0x2000 8006fb0: 4853 ldr r0, [pc, #332] ; (8007100 ) 8006fb2: f7fd fcb3 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006fb6: 2201 movs r2, #1 8006fb8: f44f 4180 mov.w r1, #16384 ; 0x4000 8006fbc: 4850 ldr r0, [pc, #320] ; (8007100 ) 8006fbe: f7fd fcad bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8006fc2: 2201 movs r2, #1 8006fc4: e7c6 b.n 8006f54 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8006fc6: 2201 movs r2, #1 8006fc8: f44f 5100 mov.w r1, #8192 ; 0x2000 8006fcc: 484c ldr r0, [pc, #304] ; (8007100 ) 8006fce: f7fd fca5 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006fd2: 2201 movs r2, #1 8006fd4: f44f 4180 mov.w r1, #16384 ; 0x4000 8006fd8: 4849 ldr r0, [pc, #292] ; (8007100 ) 8006fda: f7fd fc9f bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8006fde: 2201 movs r2, #1 8006fe0: f44f 4100 mov.w r1, #32768 ; 0x8000 8006fe4: 4846 ldr r0, [pc, #280] ; (8007100 ) 8006fe6: f7fd fc99 bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8006fea: 2201 movs r2, #1 8006fec: e7b8 b.n 8006f60 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8006fee: 2201 movs r2, #1 8006ff0: f44f 5100 mov.w r1, #8192 ; 0x2000 8006ff4: 4842 ldr r0, [pc, #264] ; (8007100 ) 8006ff6: f7fd fc91 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006ffa: 2201 movs r2, #1 8006ffc: f44f 4180 mov.w r1, #16384 ; 0x4000 8007000: 483f ldr r0, [pc, #252] ; (8007100 ) 8007002: f7fd fc8b bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8007006: 2201 movs r2, #1 8007008: f44f 4100 mov.w r1, #32768 ; 0x8000 800700c: 483c ldr r0, [pc, #240] ; (8007100 ) 800700e: f7fd fc85 bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8007012: 2201 movs r2, #1 8007014: 2140 movs r1, #64 ; 0x40 8007016: 483b ldr r0, [pc, #236] ; (8007104 ) 8007018: f7fd fc80 bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800701c: 2201 movs r2, #1 800701e: e7a4 b.n 8006f6a HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8007020: 2201 movs r2, #1 8007022: f44f 5100 mov.w r1, #8192 ; 0x2000 8007026: 4836 ldr r0, [pc, #216] ; (8007100 ) 8007028: f7fd fc78 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 800702c: 2201 movs r2, #1 800702e: f44f 4180 mov.w r1, #16384 ; 0x4000 8007032: 4833 ldr r0, [pc, #204] ; (8007100 ) 8007034: f7fd fc72 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8007038: 2201 movs r2, #1 800703a: f44f 4100 mov.w r1, #32768 ; 0x8000 800703e: 4830 ldr r0, [pc, #192] ; (8007100 ) 8007040: f7fd fc6c bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8007044: 2201 movs r2, #1 8007046: 2140 movs r1, #64 ; 0x40 8007048: 482e ldr r0, [pc, #184] ; (8007104 ) 800704a: f7fd fc67 bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800704e: 2201 movs r2, #1 8007050: 2180 movs r1, #128 ; 0x80 8007052: 482c ldr r0, [pc, #176] ; (8007104 ) 8007054: f7fd fc62 bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8007058: 2201 movs r2, #1 800705a: e78b b.n 8006f74 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 800705c: 2201 movs r2, #1 800705e: f44f 5100 mov.w r1, #8192 ; 0x2000 8007062: 4827 ldr r0, [pc, #156] ; (8007100 ) 8007064: f7fd fc5a bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8007068: 2201 movs r2, #1 800706a: f44f 4180 mov.w r1, #16384 ; 0x4000 800706e: 4824 ldr r0, [pc, #144] ; (8007100 ) 8007070: f7fd fc54 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8007074: 2201 movs r2, #1 8007076: f44f 4100 mov.w r1, #32768 ; 0x8000 800707a: 4821 ldr r0, [pc, #132] ; (8007100 ) 800707c: f7fd fc4e bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8007080: 2201 movs r2, #1 8007082: 2140 movs r1, #64 ; 0x40 8007084: 481f ldr r0, [pc, #124] ; (8007104 ) 8007086: f7fd fc49 bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800708a: 2201 movs r2, #1 800708c: 2180 movs r1, #128 ; 0x80 800708e: 481d ldr r0, [pc, #116] ; (8007104 ) 8007090: f7fd fc44 bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8007094: 2201 movs r2, #1 8007096: f44f 7180 mov.w r1, #256 ; 0x100 800709a: 481a ldr r0, [pc, #104] ; (8007104 ) 800709c: f7fd fc3e bl 800491c HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 80070a0: 2201 movs r2, #1 80070a2: e76d b.n 8006f80 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 80070a4: 2201 movs r2, #1 80070a6: f44f 5100 mov.w r1, #8192 ; 0x2000 80070aa: 4815 ldr r0, [pc, #84] ; (8007100 ) 80070ac: f7fd fc36 bl 800491c HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 80070b0: 2201 movs r2, #1 80070b2: f44f 4180 mov.w r1, #16384 ; 0x4000 80070b6: 4812 ldr r0, [pc, #72] ; (8007100 ) 80070b8: f7fd fc30 bl 800491c HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 80070bc: 2201 movs r2, #1 80070be: f44f 4100 mov.w r1, #32768 ; 0x8000 80070c2: 480f ldr r0, [pc, #60] ; (8007100 ) 80070c4: f7fd fc2a bl 800491c HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 80070c8: 2201 movs r2, #1 80070ca: 2140 movs r1, #64 ; 0x40 80070cc: 480d ldr r0, [pc, #52] ; (8007104 ) 80070ce: f7fd fc25 bl 800491c HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 80070d2: 2201 movs r2, #1 80070d4: 2180 movs r1, #128 ; 0x80 80070d6: 480b ldr r0, [pc, #44] ; (8007104 ) 80070d8: f7fd fc20 bl 800491c HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 80070dc: 2201 movs r2, #1 80070de: f44f 7180 mov.w r1, #256 ; 0x100 80070e2: 4808 ldr r0, [pc, #32] ; (8007104 ) 80070e4: f7fd fc1a bl 800491c HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 80070e8: 2201 movs r2, #1 80070ea: f44f 7100 mov.w r1, #512 ; 0x200 80070ee: 4805 ldr r0, [pc, #20] ; (8007104 ) 80070f0: f7fd fc14 bl 800491c HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 80070f4: 2201 movs r2, #1 80070f6: e749 b.n 8006f8c 80070f8: bd10 pop {r4, pc} 80070fa: bf00 nop 80070fc: 08008dc6 .word 0x08008dc6 8007100: 40010c00 .word 0x40010c00 8007104: 40011000 .word 0x40011000 8007108: 40010800 .word 0x40010800 0800710c : HAL_FLASH_Lock(); // lock ?ž ê·¸ê¸° __HAL_RCC_TIM7_CLK_ENABLE(); // 매ì¸???´ë¨¸ë?? ?ž¬?‹œ?ž‘?•©?‹ˆ?‹¤ } void Flash_InitRead(void) // ?“°ê¸°í•¨?ˆ˜ { 800710c: b530 push {r4, r5, lr} 800710e: 480a ldr r0, [pc, #40] ; (8007138 ) 8007110: 490a ldr r1, [pc, #40] ; (800713c ) 8007112: 4a0b ldr r2, [pc, #44] ; (8007140 ) 8007114: 4b0b ldr r3, [pc, #44] ; (8007144 ) uint32_t Address = 0; Address = StartAddr; for(uint8_t i = 1; i <= 8; i++ ){ 8007116: 4c0c ldr r4, [pc, #48] ; (8007148 ) RGB_SensorRedLimit_Buf[i] = (*(uint16_t*)Address); 8007118: f833 5c06 ldrh.w r5, [r3, #-6] 800711c: 3306 adds r3, #6 800711e: f820 5f02 strh.w r5, [r0, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorGreenLimit_Buf[i] = (*(uint16_t*)Address); 8007122: f833 5c0a ldrh.w r5, [r3, #-10] 8007126: f821 5f02 strh.w r5, [r1, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 800712a: f833 5c08 ldrh.w r5, [r3, #-8] for(uint8_t i = 1; i <= 8; i++ ){ 800712e: 42a3 cmp r3, r4 RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 8007130: f822 5f02 strh.w r5, [r2, #2]! for(uint8_t i = 1; i <= 8; i++ ){ 8007134: d1f0 bne.n 8007118 // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; } } 8007136: bd30 pop {r4, r5, pc} 8007138: 200002e4 .word 0x200002e4 800713c: 200002d2 .word 0x200002d2 8007140: 200002c0 .word 0x200002c0 8007144: 08030006 .word 0x08030006 8007148: 08030036 .word 0x08030036 0800714c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800714c: b510 push {r4, lr} 800714e: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8007150: 2228 movs r2, #40 ; 0x28 8007152: 2100 movs r1, #0 8007154: a806 add r0, sp, #24 8007156: f000 fcee bl 8007b36 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800715a: 2100 movs r1, #0 800715c: 2214 movs r2, #20 800715e: a801 add r0, sp, #4 8007160: f000 fce9 bl 8007b36 */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8007164: 2402 movs r4, #2 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8007166: 2201 movs r2, #1 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8007168: f44f 3380 mov.w r3, #65536 ; 0x10000 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800716c: a806 add r0, sp, #24 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 800716e: 9206 str r2, [sp, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8007170: 9307 str r3, [sp, #28] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8007172: 920a str r2, [sp, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8007174: 930e str r3, [sp, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8007176: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8007178: f7fd ffd8 bl 800512c { Error_Handler(); } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800717c: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800717e: 2100 movs r1, #0 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8007180: 9301 str r3, [sp, #4] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8007182: f44f 6380 mov.w r3, #1024 ; 0x400 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8007186: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8007188: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800718a: 9103 str r1, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800718c: 9304 str r3, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800718e: 9105 str r1, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8007190: f7fe f994 bl 80054bc { Error_Handler(); } } 8007194: b010 add sp, #64 ; 0x40 8007196: bd10 pop {r4, pc} 08007198
: { 8007198: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 800719c: 2704 movs r7, #4 800719e: 2501 movs r5, #1 80071a0: f04f 08be mov.w r8, #190 ; 0xbe 80071a4: 4ebe ldr r6, [pc, #760] ; (80074a0 ) 80071a6: f8df b368 ldr.w fp, [pc, #872] ; 8007510 80071aa: 7833 ldrb r3, [r6, #0] { 80071ac: b0c5 sub sp, #276 ; 0x114 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80071ae: f88d 303b strb.w r3, [sp, #59] ; 0x3b 80071b2: f89b 3000 ldrb.w r3, [fp] 80071b6: 4639 mov r1, r7 80071b8: f10d 0039 add.w r0, sp, #57 ; 0x39 80071bc: f88d 8038 strb.w r8, [sp, #56] ; 0x38 80071c0: f88d 5039 strb.w r5, [sp, #57] ; 0x39 80071c4: f88d 703a strb.w r7, [sp, #58] ; 0x3a 80071c8: f88d 303c strb.w r3, [sp, #60] ; 0x3c 80071cc: f000 faf3 bl 80077b6 uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 80071d0: f04f 0303 mov.w r3, #3 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80071d4: 24eb movs r4, #235 ; 0xeb uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 80071d6: f88d 3041 strb.w r3, [sp, #65] ; 0x41 80071da: 7833 ldrb r3, [r6, #0] 80071dc: 4639 mov r1, r7 80071de: f88d 3043 strb.w r3, [sp, #67] ; 0x43 80071e2: f89b 3000 ldrb.w r3, [fp] uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80071e6: f88d 003d strb.w r0, [sp, #61] ; 0x3d uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 80071ea: f10d 0041 add.w r0, sp, #65 ; 0x41 80071ee: f88d 3044 strb.w r3, [sp, #68] ; 0x44 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80071f2: f88d 403e strb.w r4, [sp, #62] ; 0x3e uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 80071f6: f88d 8040 strb.w r8, [sp, #64] ; 0x40 80071fa: f88d 7042 strb.w r7, [sp, #66] ; 0x42 80071fe: f000 fada bl 80077b6 static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8007202: 4ea8 ldr r6, [pc, #672] ; (80074a4 ) uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 8007204: f88d 4046 strb.w r4, [sp, #70] ; 0x46 8007208: f88d 0045 strb.w r0, [sp, #69] ; 0x45 HAL_Init(); 800720c: f7fd f82e bl 800426c SystemClock_Config(); 8007210: f7ff ff9c bl 800714c GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007214: 2210 movs r2, #16 8007216: 2100 movs r1, #0 8007218: a82b add r0, sp, #172 ; 0xac 800721a: f000 fc8c bl 8007b36 __HAL_RCC_GPIOC_CLK_ENABLE(); 800721e: 69b3 ldr r3, [r6, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin |LED_CH2_Pin|LED_CH3_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8007220: f8df a2f0 ldr.w sl, [pc, #752] ; 8007514 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007224: f043 0310 orr.w r3, r3, #16 8007228: 61b3 str r3, [r6, #24] 800722a: 69b3 ldr r3, [r6, #24] |SENSOR_EN8_Pin|SX1276_NSS_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 800722c: f8df 92e8 ldr.w r9, [pc, #744] ; 8007518 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007230: f003 0310 and.w r3, r3, #16 8007234: 930a str r3, [sp, #40] ; 0x28 8007236: 9b0a ldr r3, [sp, #40] ; 0x28 __HAL_RCC_GPIOD_CLK_ENABLE(); 8007238: 69b3 ldr r3, [r6, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 800723a: 2200 movs r2, #0 __HAL_RCC_GPIOD_CLK_ENABLE(); 800723c: f043 0320 orr.w r3, r3, #32 8007240: 61b3 str r3, [r6, #24] 8007242: 69b3 ldr r3, [r6, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8007244: f649 71f0 movw r1, #40944 ; 0x9ff0 __HAL_RCC_GPIOD_CLK_ENABLE(); 8007248: f003 0320 and.w r3, r3, #32 800724c: 930b str r3, [sp, #44] ; 0x2c 800724e: 9b0b ldr r3, [sp, #44] ; 0x2c __HAL_RCC_GPIOA_CLK_ENABLE(); 8007250: 69b3 ldr r3, [r6, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8007252: 4895 ldr r0, [pc, #596] ; (80074a8 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8007254: 433b orrs r3, r7 8007256: 61b3 str r3, [r6, #24] 8007258: 69b3 ldr r3, [r6, #24] LED_CH2_Pin LED_CH3_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin |LED_CH2_Pin|LED_CH3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 800725a: 2400 movs r4, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 800725c: 403b ands r3, r7 800725e: 930c str r3, [sp, #48] ; 0x30 8007260: 9b0c ldr r3, [sp, #48] ; 0x30 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007262: 69b3 ldr r3, [r6, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007264: f04f 0802 mov.w r8, #2 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007268: f043 0308 orr.w r3, r3, #8 800726c: 61b3 str r3, [r6, #24] 800726e: 69b3 ldr r3, [r6, #24] 8007270: f003 0308 and.w r3, r3, #8 8007274: 930d str r3, [sp, #52] ; 0x34 8007276: 9b0d ldr r3, [sp, #52] ; 0x34 HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8007278: f7fd fb50 bl 800491c HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 800727c: 2200 movs r2, #0 800727e: f248 11f0 movw r1, #33264 ; 0x81f0 8007282: 4650 mov r0, sl 8007284: f7fd fb4a bl 800491c HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8007288: 4648 mov r0, r9 800728a: 2200 movs r2, #0 800728c: f24f 31e9 movw r1, #62441 ; 0xf3e9 8007290: f7fd fb44 bl 800491c HAL_GPIO_WritePin(LED_CH4_GPIO_Port, LED_CH4_Pin, GPIO_PIN_RESET); 8007294: 2200 movs r2, #0 8007296: 4639 mov r1, r7 8007298: 4884 ldr r0, [pc, #528] ; (80074ac ) 800729a: f7fd fb3f bl 800491c GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 800729e: f649 73f0 movw r3, #40944 ; 0x9ff0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80072a2: a92b add r1, sp, #172 ; 0xac 80072a4: 4880 ldr r0, [pc, #512] ; (80074a8 ) GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 80072a6: 932b str r3, [sp, #172] ; 0xac GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80072a8: 952c str r5, [sp, #176] ; 0xb0 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80072aa: f8cd 80b8 str.w r8, [sp, #184] ; 0xb8 GPIO_InitStruct.Pull = GPIO_NOPULL; 80072ae: 942d str r4, [sp, #180] ; 0xb4 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80072b0: f7fd fa42 bl 8004738 /*Configure GPIO pins : SX1276_DIO0_Pin SX1276_DIO1_Pin SX1276_DIO2_Pin SX1276_DIO3_Pin SENSOR_EN8_Pin SX1276_NSS_Pin */ GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 80072b4: f248 13f0 movw r3, #33264 ; 0x81f0 |SENSOR_EN8_Pin|SX1276_NSS_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80072b8: a92b add r1, sp, #172 ; 0xac 80072ba: 4650 mov r0, sl GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 80072bc: 932b str r3, [sp, #172] ; 0xac GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80072be: 952c str r5, [sp, #176] ; 0xb0 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80072c0: f8cd 80b8 str.w r8, [sp, #184] ; 0xb8 GPIO_InitStruct.Pull = GPIO_NOPULL; 80072c4: 942d str r4, [sp, #180] ; 0xb4 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80072c6: f7fd fa37 bl 8004738 /*Configure GPIO pins : SX1276_RESET_Pin LED_ALARM_Pin SENSOR_EN1_Pin SENSOR_EN2_Pin SENSOR_EN3_Pin SX1276_CLK_Pin SX1276_MOSI_Pin LED_CH5_Pin LED_CH6_Pin LED_CH7_Pin LED_CH8_Pin */ GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 80072ca: f24f 33e9 movw r3, #62441 ; 0xf3e9 |SENSOR_EN3_Pin|SX1276_CLK_Pin|SX1276_MOSI_Pin|LED_CH5_Pin |LED_CH6_Pin|LED_CH7_Pin|LED_CH8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80072ce: 4648 mov r0, r9 80072d0: a92b add r1, sp, #172 ; 0xac GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 80072d2: 932b str r3, [sp, #172] ; 0xac GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80072d4: 952c str r5, [sp, #176] ; 0xb0 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80072d6: f8cd 80b8 str.w r8, [sp, #184] ; 0xb8 GPIO_InitStruct.Pull = GPIO_NOPULL; 80072da: 942d str r4, [sp, #180] ; 0xb4 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80072dc: f7fd fa2c bl 8004738 /*Configure GPIO pin : LED_CH4_Pin */ GPIO_InitStruct.Pin = LED_CH4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 80072e0: a92b add r1, sp, #172 ; 0xac 80072e2: 4872 ldr r0, [pc, #456] ; (80074ac ) GPIO_InitStruct.Pin = LED_CH4_Pin; 80072e4: 972b str r7, [sp, #172] ; 0xac GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80072e6: 952c str r5, [sp, #176] ; 0xb0 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80072e8: f8cd 80b8 str.w r8, [sp, #184] ; 0xb8 GPIO_InitStruct.Pull = GPIO_NOPULL; 80072ec: 942d str r4, [sp, #180] ; 0xb4 HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 80072ee: f7fd fa23 bl 8004738 /*Configure GPIO pin : SX1276_MISO_Pin */ GPIO_InitStruct.Pin = SX1276_MISO_Pin; 80072f2: 2310 movs r3, #16 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 80072f4: 4648 mov r0, r9 80072f6: a92b add r1, sp, #172 ; 0xac GPIO_InitStruct.Pin = SX1276_MISO_Pin; 80072f8: 932b str r3, [sp, #172] ; 0xac GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80072fa: 942c str r4, [sp, #176] ; 0xb0 GPIO_InitStruct.Pull = GPIO_NOPULL; 80072fc: 942d str r4, [sp, #180] ; 0xb4 HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 80072fe: f7fd fa1b bl 8004738 htim6.Init.Prescaler = 1600-1; 8007302: f240 623f movw r2, #1599 ; 0x63f __HAL_RCC_DMA1_CLK_ENABLE(); 8007306: 6973 ldr r3, [r6, #20] htim6.Init.Prescaler = 1600-1; 8007308: 4969 ldr r1, [pc, #420] ; (80074b0 ) __HAL_RCC_DMA1_CLK_ENABLE(); 800730a: 432b orrs r3, r5 800730c: 6173 str r3, [r6, #20] 800730e: 6973 ldr r3, [r6, #20] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8007310: 942b str r4, [sp, #172] ; 0xac __HAL_RCC_DMA1_CLK_ENABLE(); 8007312: 402b ands r3, r5 8007314: 9309 str r3, [sp, #36] ; 0x24 8007316: 9b09 ldr r3, [sp, #36] ; 0x24 htim6.Instance = TIM6; 8007318: 4b66 ldr r3, [pc, #408] ; (80074b4 ) TIM_MasterConfigTypeDef sMasterConfig = {0}; 800731a: 942c str r4, [sp, #176] ; 0xb0 htim6.Init.Prescaler = 1600-1; 800731c: e883 0006 stmia.w r3, {r1, r2} htim6.Init.Period = 10-1; 8007320: 2209 movs r2, #9 if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8007322: 4618 mov r0, r3 htim6.Init.Period = 10-1; 8007324: 60da str r2, [r3, #12] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8007326: 609c str r4, [r3, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8007328: 619c str r4, [r3, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 800732a: 9305 str r3, [sp, #20] 800732c: f7fe fa96 bl 800585c if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8007330: 9b05 ldr r3, [sp, #20] 8007332: a92b add r1, sp, #172 ; 0xac 8007334: 4618 mov r0, r3 8007336: 9307 str r3, [sp, #28] huart1.Instance = USART1; 8007338: 4f5f ldr r7, [pc, #380] ; (80074b8 ) sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800733a: 942b str r4, [sp, #172] ; 0xac sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800733c: 942c str r4, [sp, #176] ; 0xb0 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800733e: f7fe faa7 bl 8005890 huart1.Instance = USART1; 8007342: 4a5e ldr r2, [pc, #376] ; (80074bc ) huart1.Init.BaudRate = 115200; 8007344: f44f 31e1 mov.w r1, #115200 ; 0x1c200 huart1.Instance = USART1; 8007348: 603a str r2, [r7, #0] huart1.Init.Mode = UART_MODE_TX_RX; 800734a: 220c movs r2, #12 if (HAL_UART_Init(&huart1) != HAL_OK) 800734c: 4638 mov r0, r7 huart2.Instance = USART2; 800734e: 4e5c ldr r6, [pc, #368] ; (80074c0 ) huart1.Init.BaudRate = 115200; 8007350: 6079 str r1, [r7, #4] huart1.Init.Mode = UART_MODE_TX_RX; 8007352: 617a str r2, [r7, #20] huart1.Init.BaudRate = 115200; 8007354: 9106 str r1, [sp, #24] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8007356: 60bc str r4, [r7, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8007358: 60fc str r4, [r7, #12] huart1.Init.Parity = UART_PARITY_NONE; 800735a: 613c str r4, [r7, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800735c: 9205 str r2, [sp, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800735e: 61bc str r4, [r7, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8007360: 61fc str r4, [r7, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8007362: f7fe fb8d bl 8005a80 huart2.Instance = USART2; 8007366: 4857 ldr r0, [pc, #348] ; (80074c4 ) huart2.Init.BaudRate = 115200; 8007368: 9906 ldr r1, [sp, #24] huart2.Init.Mode = UART_MODE_TX_RX; 800736a: 9a05 ldr r2, [sp, #20] huart2.Instance = USART2; 800736c: 6030 str r0, [r6, #0] if (HAL_UART_Init(&huart2) != HAL_OK) 800736e: 4630 mov r0, r6 huart2.Init.BaudRate = 115200; 8007370: 6071 str r1, [r6, #4] huart2.Init.Mode = UART_MODE_TX_RX; 8007372: 6172 str r2, [r6, #20] huart2.Init.WordLength = UART_WORDLENGTH_8B; 8007374: 60b4 str r4, [r6, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8007376: 60f4 str r4, [r6, #12] huart2.Init.Parity = UART_PARITY_NONE; 8007378: 6134 str r4, [r6, #16] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800737a: 61b4 str r4, [r6, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 800737c: 61f4 str r4, [r6, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 800737e: f7fe fb7f bl 8005a80 hi2c2.Init.ClockSpeed = 100000; 8007382: f8df e198 ldr.w lr, [pc, #408] ; 800751c hi2c2.Instance = I2C2; 8007386: 4850 ldr r0, [pc, #320] ; (80074c8 ) hi2c2.Init.ClockSpeed = 100000; 8007388: 4a50 ldr r2, [pc, #320] ; (80074cc ) hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 800738a: 6084 str r4, [r0, #8] hi2c2.Init.ClockSpeed = 100000; 800738c: e880 4004 stmia.w r0, {r2, lr} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8007390: f44f 4280 mov.w r2, #16384 ; 0x4000 hi2c2.Init.OwnAddress1 = 0; 8007394: 60c4 str r4, [r0, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8007396: 6102 str r2, [r0, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8007398: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 800739a: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 800739c: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 800739e: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 80073a0: f7fd fc8e bl 8004cc0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 80073a4: 4622 mov r2, r4 80073a6: 4621 mov r1, r4 80073a8: 200f movs r0, #15 80073aa: f7fc ffa7 bl 80042fc HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80073ae: 200f movs r0, #15 80073b0: f7fc ffd8 bl 8004364 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80073b4: 4622 mov r2, r4 80073b6: 4621 mov r1, r4 80073b8: 2025 movs r0, #37 ; 0x25 80073ba: f7fc ff9f bl 80042fc HAL_NVIC_EnableIRQ(USART1_IRQn); 80073be: 2025 movs r0, #37 ; 0x25 80073c0: f7fc ffd0 bl 8004364 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 80073c4: 4622 mov r2, r4 80073c6: 4621 mov r1, r4 80073c8: 2026 movs r0, #38 ; 0x26 80073ca: f7fc ff97 bl 80042fc HAL_NVIC_EnableIRQ(USART2_IRQn); 80073ce: 2026 movs r0, #38 ; 0x26 80073d0: f7fc ffc8 bl 8004364 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 80073d4: 4622 mov r2, r4 80073d6: 4621 mov r1, r4 80073d8: 2036 movs r0, #54 ; 0x36 80073da: f7fc ff8f bl 80042fc HAL_NVIC_EnableIRQ(TIM6_IRQn); 80073de: 2036 movs r0, #54 ; 0x36 80073e0: f7fc ffc0 bl 8004364 HAL_TIM_Base_Start_IT(&htim6); 80073e4: 9b07 ldr r3, [sp, #28] 80073e6: 4618 mov r0, r3 80073e8: f7fe f93a bl 8005660 HAL_UART_Receive_DMA(&huart1, rx1_data, 1); 80073ec: 462a mov r2, r5 80073ee: 4938 ldr r1, [pc, #224] ; (80074d0 ) 80073f0: 4638 mov r0, r7 80073f2: f7fe fbf7 bl 8005be4 HAL_UART_Receive_IT(&huart2, &rx2_data[0],1); 80073f6: 462a mov r2, r5 80073f8: 4936 ldr r1, [pc, #216] ; (80074d4 ) 80073fa: 4630 mov r0, r6 80073fc: f7fe fbca bl 8005b94 setbuf(stdout, NULL); // \n ?„ ? ?„ ?–„ë§? 8007400: 4b35 ldr r3, [pc, #212] ; (80074d8 ) 8007402: 4621 mov r1, r4 8007404: 681b ldr r3, [r3, #0] RGB_SensorIDAutoset = set; 8007406: 4e35 ldr r6, [pc, #212] ; (80074dc ) setbuf(stdout, NULL); // \n ?„ ? ?„ ?–„ë§? 8007408: 6898 ldr r0, [r3, #8] 800740a: f000 fc2d bl 8007c68 printf("****************************************\r\n"); 800740e: 4834 ldr r0, [pc, #208] ; (80074e0 ) 8007410: f000 fc22 bl 8007c58 printf("RGB Project\r\n"); 8007414: 4833 ldr r0, [pc, #204] ; (80074e4 ) 8007416: f000 fc1f bl 8007c58 printf("Build at %s %s\r\n", __DATE__, __TIME__); 800741a: 4933 ldr r1, [pc, #204] ; (80074e8 ) 800741c: 4a33 ldr r2, [pc, #204] ; (80074ec ) 800741e: 4834 ldr r0, [pc, #208] ; (80074f0 ) 8007420: f000 fb92 bl 8007b48 printf("Copyright (c) 2019. BLUECELL\r\n"); 8007424: 4833 ldr r0, [pc, #204] ; (80074f4 ) 8007426: f000 fc17 bl 8007c58 printf("****************************************\r\n"); 800742a: 482d ldr r0, [pc, #180] ; (80074e0 ) 800742c: f000 fc14 bl 8007c58 RGB_SensorIDAutoset = set; 8007430: 7035 strb r5, [r6, #0] Flash_InitRead(); 8007432: f7ff fe6b bl 800710c RGB_Data_Init(); 8007436: f7fe fe0d bl 8006054 SX1276_hw.dio0.pin = SX1276_DIO0_Pin; 800743a: 2210 movs r2, #16 SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 800743c: 4b2e ldr r3, [pc, #184] ; (80074f8 ) SX1276.hw = &SX1276_hw; 800743e: 4f2f ldr r7, [pc, #188] ; (80074fc ) SX1276_hw.dio0.pin = SX1276_DIO0_Pin; 8007440: 609a str r2, [r3, #8] SX1276_hw.nss.pin = GPIO_PIN_15; 8007442: f44f 4200 mov.w r2, #32768 ; 0x8000 printf("Configuring LoRa module\r\n"); 8007446: 482e ldr r0, [pc, #184] ; (8007500 ) SX1276_hw.reset.pin = SX1276_RESET_Pin; 8007448: e883 0220 stmia.w r3, {r5, r9} SX1276_hw.nss.pin = GPIO_PIN_15; 800744c: 611a str r2, [r3, #16] SX1276.hw = &SX1276_hw; 800744e: 603b str r3, [r7, #0] SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 8007450: f8c3 a00c str.w sl, [r3, #12] SX1276_hw.nss.port = GPIOA; 8007454: f8c3 a014 str.w sl, [r3, #20] printf("Configuring LoRa module\r\n"); 8007458: f000 fbfe bl 8007c58 SX1276_begin(&SX1276, SX1276_917MHZ, SX1276_POWER_17DBM, SX1276_LORA_SF_8, 800745c: 4b29 ldr r3, [pc, #164] ; (8007504 ) 800745e: f04f 0c0a mov.w ip, #10 8007462: 781b ldrb r3, [r3, #0] 8007464: 462a mov r2, r5 8007466: 9302 str r3, [sp, #8] 8007468: 2303 movs r3, #3 800746a: 4621 mov r1, r4 800746c: e88d 1008 stmia.w sp, {r3, ip} 8007470: 4638 mov r0, r7 8007472: 4643 mov r3, r8 8007474: f7ff fc64 bl 8006d40 printf("Done configuring LoRaModule\r\n"); 8007478: 4823 ldr r0, [pc, #140] ; (8007508 ) 800747a: f000 fbed bl 8007c58 master = 0; 800747e: 4b23 ldr r3, [pc, #140] ; (800750c ) ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 8007480: f44f 62fa mov.w r2, #2000 ; 0x7d0 8007484: 2108 movs r1, #8 8007486: 4638 mov r0, r7 master = 0; 8007488: 601c str r4, [r3, #0] ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 800748a: f7ff fb73 bl 8006b74 uint8_t uartrecv1=0,uartrecv2=0,cnt1 = 0,cnt2=0; 800748e: 4625 mov r5, r4 uint8_t temp_sensorid = 0; 8007490: 46a1 mov r9, r4 8007492: 465f mov r7, fp ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 8007494: f8df 8088 ldr.w r8, [pc, #136] ; 8007520 uint8_t data1[100]= {0,}; 8007498: 2264 movs r2, #100 ; 0x64 ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 800749a: f8c8 0000 str.w r0, [r8] 800749e: e041 b.n 8007524 80074a0: 2000034c .word 0x2000034c 80074a4: 40021000 .word 0x40021000 80074a8: 40011000 .word 0x40011000 80074ac: 40011400 .word 0x40011400 80074b0: 40001000 .word 0x40001000 80074b4: 200006c4 .word 0x200006c4 80074b8: 20000558 .word 0x20000558 80074bc: 40013800 .word 0x40013800 80074c0: 20000704 .word 0x20000704 80074c4: 40004400 .word 0x40004400 80074c8: 20000438 .word 0x20000438 80074cc: 40005800 .word 0x40005800 80074d0: 20000660 .word 0x20000660 80074d4: 2000048c .word 0x2000048c 80074d8: 20000010 .word 0x20000010 80074dc: 2000034d .word 0x2000034d 80074e0: 08008e0f .word 0x08008e0f 80074e4: 08008e39 .word 0x08008e39 80074e8: 08008e4f .word 0x08008e4f 80074ec: 08008e46 .word 0x08008e46 80074f0: 08008e5b .word 0x08008e5b 80074f4: 08008e6c .word 0x08008e6c 80074f8: 200004f4 .word 0x200004f4 80074fc: 20000748 .word 0x20000748 8007500: 08008e8a .word 0x08008e8a 8007504: 20000008 .word 0x20000008 8007508: 08008ea3 .word 0x08008ea3 800750c: 20000854 .word 0x20000854 8007510: 2000034e .word 0x2000034e 8007514: 40010800 .word 0x40010800 8007518: 40010c00 .word 0x40010c00 800751c: 000186a0 .word 0x000186a0 8007520: 20000744 .word 0x20000744 uint8_t data1[100]= {0,}; 8007524: 4621 mov r1, r4 8007526: a812 add r0, sp, #72 ; 0x48 8007528: f000 fb05 bl 8007b36 uint8_t data2[100]= {0,}; 800752c: 2264 movs r2, #100 ; 0x64 800752e: 4621 mov r1, r4 8007530: a82b add r0, sp, #172 ; 0xac 8007532: f000 fb00 bl 8007b36 8007536: 9605 str r6, [sp, #20] 8007538: 4646 mov r6, r8 SX1276_read(&SX1276, &buffer[0], ret); 800753a: f8df 8260 ldr.w r8, [pc, #608] ; 800779c if(LoraTxTimerCnt > LORA_TIMER_CNT){ 800753e: 4b87 ldr r3, [pc, #540] ; (800775c ) 8007540: 4a87 ldr r2, [pc, #540] ; (8007760 ) 8007542: 6819 ldr r1, [r3, #0] 8007544: 4291 cmp r1, r2 LoraTxTimerCnt = 0; 8007546: bf84 itt hi 8007548: 2200 movhi r2, #0 800754a: 601a strhi r2, [r3, #0] RGB_Alarm_Operate();//LED ALARM CHECK 800754c: f7fe ff6c bl 8006428 if(LoraDataSendGet() == LoraTx_mode){ 8007550: 4b84 ldr r3, [pc, #528] ; (8007764 ) 8007552: 781b ldrb r3, [r3, #0] 8007554: 2b01 cmp r3, #1 8007556: f040 80a9 bne.w 80076ac message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc 800755a: f04f 0a08 mov.w sl, #8 memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 800755e: 4a82 ldr r2, [pc, #520] ; (8007768 ) message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc 8007560: f8df b23c ldr.w fp, [pc, #572] ; 80077a0 memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 8007564: 6813 ldr r3, [r2, #0] ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 8007566: 4651 mov r1, sl memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 8007568: f8c8 3000 str.w r3, [r8] 800756c: 6853 ldr r3, [r2, #4] ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 800756e: 487f ldr r0, [pc, #508] ; (800776c ) memcpy(&buffer[0],&Lora_Buf[0],LORA_MAX_DATA_CNT); 8007570: f8c8 3004 str.w r3, [r8, #4] ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 8007574: f44f 62fa mov.w r2, #2000 ; 0x7d0 message_length = Lora_Max_Amount + 3;////RGB Data 60byte + stx + etx + crc 8007578: f8cb a000 str.w sl, [fp] ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 800757c: f7ff fb74 bl 8006c68 ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000); 8007580: f44f 63fa mov.w r3, #2000 ; 0x7d0 ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 8007584: 6030 str r0, [r6, #0] ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000); 8007586: f89b 2000 ldrb.w r2, [fp] 800758a: 4641 mov r1, r8 800758c: 4877 ldr r0, [pc, #476] ; (800776c ) 800758e: f7ff fbab bl 8006ce8 LoraDataSend = val; 8007592: 2300 movs r3, #0 8007594: 4a73 ldr r2, [pc, #460] ; (8007764 ) ret = SX1276_LoRaTxPacket(&SX1276, &buffer[0], message_length, 2000); 8007596: 6030 str r0, [r6, #0] LoraDataSend = val; 8007598: 7013 strb r3, [r2, #0] ret = SX1276_LoRaEntryRx(&SX1276, LORA_MAX_DATA_CNT, 2000); 800759a: 4651 mov r1, sl 800759c: f44f 62fa mov.w r2, #2000 ; 0x7d0 80075a0: 4872 ldr r0, [pc, #456] ; (800776c ) 80075a2: f7ff fae7 bl 8006b74 80075a6: 6030 str r0, [r6, #0] if(count_in1 != count_out1){ // <------- 80075a8: 4871 ldr r0, [pc, #452] ; (8007770 ) 80075aa: 4b72 ldr r3, [pc, #456] ; (8007774 ) 80075ac: f890 e000 ldrb.w lr, [r0] 80075b0: 781b ldrb r3, [r3, #0] 80075b2: 4573 cmp r3, lr 80075b4: 4b70 ldr r3, [pc, #448] ; (8007778 ) 80075b6: d019 beq.n 80075ec data1[cnt1++] = buf1[count_out1++]; 80075b8: f10e 0201 add.w r2, lr, #1 80075bc: b2d2 uxtb r2, r2 80075be: 7002 strb r2, [r0, #0] if(count_out1 >= 100){ count_out1 = 0; } 80075c0: 2a63 cmp r2, #99 ; 0x63 80075c2: f04f 0200 mov.w r2, #0 data1[cnt1++] = buf1[count_out1++]; 80075c6: f50d 7c88 add.w ip, sp, #272 ; 0x110 80075ca: f105 0101 add.w r1, r5, #1 80075ce: 4465 add r5, ip 80075d0: f8df c1d0 ldr.w ip, [pc, #464] ; 80077a4 if(count_out1 >= 100){ count_out1 = 0; } 80075d4: bf88 it hi 80075d6: 7002 strbhi r2, [r0, #0] UartTimerCnt = 0; 80075d8: 4868 ldr r0, [pc, #416] ; (800777c ) data1[cnt1++] = buf1[count_out1++]; 80075da: f81c e00e ldrb.w lr, [ip, lr] 80075de: b2c9 uxtb r1, r1 UartTimerCnt = 0; 80075e0: 6002 str r2, [r0, #0] UartDataisReved = val; 80075e2: 2201 movs r2, #1 data1[cnt1++] = buf1[count_out1++]; 80075e4: f805 ecc8 strb.w lr, [r5, #-200] 80075e8: 460d mov r5, r1 UartDataisReved = val; 80075ea: 701a strb r2, [r3, #0] if(count_in2 != count_out2){ // <------- 80075ec: 4864 ldr r0, [pc, #400] ; (8007780 ) 80075ee: 4a65 ldr r2, [pc, #404] ; (8007784 ) 80075f0: f890 e000 ldrb.w lr, [r0] 80075f4: 7812 ldrb r2, [r2, #0] 80075f6: 4572 cmp r2, lr 80075f8: d019 beq.n 800762e data2[cnt2++] = buf2[count_out2++]; 80075fa: f10e 0201 add.w r2, lr, #1 80075fe: b2d2 uxtb r2, r2 8007600: 7002 strb r2, [r0, #0] if(count_out2 >= 100){ count_out2 = 0; } 8007602: 2a63 cmp r2, #99 ; 0x63 8007604: f04f 0200 mov.w r2, #0 data2[cnt2++] = buf2[count_out2++]; 8007608: f50d 7c88 add.w ip, sp, #272 ; 0x110 800760c: f104 0101 add.w r1, r4, #1 8007610: 4464 add r4, ip 8007612: f8df c194 ldr.w ip, [pc, #404] ; 80077a8 if(count_out2 >= 100){ count_out2 = 0; } 8007616: bf88 it hi 8007618: 7002 strbhi r2, [r0, #0] UartTimerCnt = 0; 800761a: 4858 ldr r0, [pc, #352] ; (800777c ) data2[cnt2++] = buf2[count_out2++]; 800761c: f81c e00e ldrb.w lr, [ip, lr] 8007620: b2c9 uxtb r1, r1 UartTimerCnt = 0; 8007622: 6002 str r2, [r0, #0] UartDataisReved = val; 8007624: 2202 movs r2, #2 data2[cnt2++] = buf2[count_out2++]; 8007626: f804 ec64 strb.w lr, [r4, #-100] 800762a: 460c mov r4, r1 UartDataisReved = val; 800762c: 701a strb r2, [r3, #0] return UartDataisReved; 800762e: 781a ldrb r2, [r3, #0] if(uartdatarecv == 1 && UartTimerCnt > 100){ 8007630: 2a01 cmp r2, #1 8007632: d163 bne.n 80076fc 8007634: 4a51 ldr r2, [pc, #324] ; (800777c ) 8007636: 6812 ldr r2, [r2, #0] 8007638: 2a64 cmp r2, #100 ; 0x64 800763a: d90a bls.n 8007652 UartDataisReved = val; 800763c: 2500 movs r5, #0 Uart_dataCheck(&data1[0],&count_in1); 800763e: 494d ldr r1, [pc, #308] ; (8007774 ) 8007640: a812 add r0, sp, #72 ; 0x48 UartDataisReved = val; 8007642: 701d strb r5, [r3, #0] Uart_dataCheck(&data1[0],&count_in1); 8007644: f7ff fc2c bl 8006ea0 memset(&data1[0],0,100); 8007648: 2264 movs r2, #100 ; 0x64 800764a: 4629 mov r1, r5 800764c: a812 add r0, sp, #72 ; 0x48 800764e: f000 fa72 bl 8007b36 if(LedTimerCnt > 500){ 8007652: f8df a158 ldr.w sl, [pc, #344] ; 80077ac 8007656: f8da 3000 ldr.w r3, [sl] 800765a: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 800765e: f67f af6e bls.w 800753e if(RGB_SensorIDAutoGet() == 1){ 8007662: 9b05 ldr r3, [sp, #20] 8007664: 781b ldrb r3, [r3, #0] 8007666: 2b01 cmp r3, #1 8007668: d163 bne.n 8007732 if(SensorID == 0){memset(&SensorID_buf[0],0x00,8);SensorID_Cnt = 0;} 800766a: 7838 ldrb r0, [r7, #0] 800766c: b920 cbnz r0, 8007678 800766e: 4b46 ldr r3, [pc, #280] ; (8007788 ) 8007670: 6018 str r0, [r3, #0] 8007672: 6058 str r0, [r3, #4] 8007674: 4b45 ldr r3, [pc, #276] ; (800778c ) 8007676: 7018 strb r0, [r3, #0] IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID 8007678: 3001 adds r0, #1 800767a: b2c0 uxtb r0, r0 if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){ 800767c: 2808 cmp r0, #8 IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID 800767e: 7038 strb r0, [r7, #0] 8007680: f88d 0044 strb.w r0, [sp, #68] ; 0x44 if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){ 8007684: d94c bls.n 8007720 RGB_SensorIDAutoset = set; 8007686: f04f 0b00 mov.w fp, #0 800768a: 9b05 ldr r3, [sp, #20] RGB_Sensor_PowerOnOff(0); 800768c: 4658 mov r0, fp RGB_SensorIDAutoset = set; 800768e: f883 b000 strb.w fp, [r3] RGB_Sensor_PowerOnOff(0); 8007692: f7ff fc39 bl 8006f08 SensorID = 0; 8007696: f887 b000 strb.w fp, [r7] HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 800769a: f44f 4100 mov.w r1, #32768 ; 0x8000 800769e: 483c ldr r0, [pc, #240] ; (8007790 ) 80076a0: f7fd f941 bl 8004926 LedTimerCnt = 0; 80076a4: 2300 movs r3, #0 80076a6: f8ca 3000 str.w r3, [sl] 80076aa: e748 b.n 800753e ret = SX1276_LoRaRxPacket(&SX1276); 80076ac: 482f ldr r0, [pc, #188] ; (800776c ) 80076ae: f7ff faad bl 8006c0c 80076b2: 4602 mov r2, r0 80076b4: 6030 str r0, [r6, #0] if (ret > 0) { 80076b6: 2800 cmp r0, #0 80076b8: f43f af76 beq.w 80075a8 SX1276_read(&SX1276, &buffer[0], ret); 80076bc: 4641 mov r1, r8 80076be: 482b ldr r0, [pc, #172] ; (800776c ) 80076c0: f7ff fb5b bl 8006d7a printf("Received Data : "); 80076c4: 4833 ldr r0, [pc, #204] ; (8007794 ) 80076c6: f000 fa3f bl 8007b48 for(uint8_t i = 0; i < ret; i++) 80076ca: f04f 0a00 mov.w sl, #0 printf("%02x ", buffer[i]); 80076ce: f8df b0e0 ldr.w fp, [pc, #224] ; 80077b0 for(uint8_t i = 0; i < ret; i++) 80076d2: 6832 ldr r2, [r6, #0] 80076d4: fa5f f38a uxtb.w r3, sl 80076d8: 4293 cmp r3, r2 80076da: f10a 0a01 add.w sl, sl, #1 80076de: db07 blt.n 80076f0 printf("\n"); 80076e0: 200a movs r0, #10 80076e2: f000 fa49 bl 8007b78 Uart_dataCheck(&buffer[bluecell_stx],&ret); 80076e6: 492c ldr r1, [pc, #176] ; (8007798 ) 80076e8: 4640 mov r0, r8 80076ea: f7ff fbd9 bl 8006ea0 80076ee: e75b b.n 80075a8 printf("%02x ", buffer[i]); 80076f0: f818 1003 ldrb.w r1, [r8, r3] 80076f4: 4658 mov r0, fp 80076f6: f000 fa27 bl 8007b48 80076fa: e7ea b.n 80076d2 if(uartdatarecv == 2 && UartTimerCnt > 100){ 80076fc: 2a02 cmp r2, #2 80076fe: d1a8 bne.n 8007652 8007700: 4a1e ldr r2, [pc, #120] ; (800777c ) 8007702: 6812 ldr r2, [r2, #0] 8007704: 2a64 cmp r2, #100 ; 0x64 8007706: d9a4 bls.n 8007652 UartDataisReved = val; 8007708: 2400 movs r4, #0 Uart_dataCheck(&data2[0],&count_in2); 800770a: a82b add r0, sp, #172 ; 0xac 800770c: 491d ldr r1, [pc, #116] ; (8007784 ) UartDataisReved = val; 800770e: 701c strb r4, [r3, #0] Uart_dataCheck(&data2[0],&count_in2); 8007710: f7ff fbc6 bl 8006ea0 memset(&data2[0],0,100); 8007714: 2264 movs r2, #100 ; 0x64 8007716: 4621 mov r1, r4 8007718: a82b add r0, sp, #172 ; 0xac 800771a: f000 fa0c bl 8007b36 800771e: e70e b.n 800753e RGB_Sensor_PowerOnOff(IDAutoSetRequest_data[4]); 8007720: f7ff fbf2 bl 8006f08 HAL_Delay(75); 8007724: 204b movs r0, #75 ; 0x4b 8007726: f7fc fdc5 bl 80042b4 RGB_Controller_Func(&IDAutoSetRequest_data[bluecell_stx]); 800772a: a810 add r0, sp, #64 ; 0x40 800772c: f7fe ff88 bl 8006640 8007730: e7b3 b.n 800769a StatusRequest_data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++]; 8007732: 4b15 ldr r3, [pc, #84] ; (8007788 ) 8007734: f109 0b01 add.w fp, r9, #1 8007738: f813 3009 ldrb.w r3, [r3, r9] 800773c: fa5f fb8b uxtb.w fp, fp 8007740: f88d 303c strb.w r3, [sp, #60] ; 0x3c if(temp_sensorid > (SensorID_Cnt)){ 8007744: 4b11 ldr r3, [pc, #68] ; (800778c ) RGB_Controller_Func(&StatusRequest_data[bluecell_stx]); 8007746: a80e add r0, sp, #56 ; 0x38 if(temp_sensorid > (SensorID_Cnt)){ 8007748: 781b ldrb r3, [r3, #0] temp_sensorid = 0; 800774a: 455b cmp r3, fp 800774c: bf38 it cc 800774e: f04f 0b00 movcc.w fp, #0 RGB_Controller_Func(&StatusRequest_data[bluecell_stx]); 8007752: f7fe ff75 bl 8006640 8007756: 46d9 mov r9, fp 8007758: e79f b.n 800769a 800775a: bf00 nop 800775c: 20000348 .word 0x20000348 8007760: 000493e0 .word 0x000493e0 8007764: 20000510 .word 0x20000510 8007768: 20000099 .word 0x20000099 800776c: 20000748 .word 0x20000748 8007770: 2000041e .word 0x2000041e 8007774: 2000041c .word 0x2000041c 8007778: 20000434 .word 0x20000434 800777c: 20000350 .word 0x20000350 8007780: 2000041f .word 0x2000041f 8007784: 2000041d .word 0x2000041d 8007788: 200002f7 .word 0x200002f7 800778c: 200002f6 .word 0x200002f6 8007790: 40011000 .word 0x40011000 8007794: 08008ec0 .word 0x08008ec0 8007798: 20000744 .word 0x20000744 800779c: 20000598 .word 0x20000598 80077a0: 20000430 .word 0x20000430 80077a4: 20000354 .word 0x20000354 80077a8: 200003b8 .word 0x200003b8 80077ac: 20000340 .word 0x20000340 80077b0: 08008dd5 .word 0x08008dd5 080077b4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80077b4: 4770 bx lr 080077b6 : 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 80077b6: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80077b8: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80077ba: 4604 mov r4, r0 80077bc: 1a22 subs r2, r4, r0 80077be: b2d2 uxtb r2, r2 80077c0: 4291 cmp r1, r2 80077c2: d801 bhi.n 80077c8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 80077c4: 4618 mov r0, r3 80077c6: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 80077c8: f814 2b01 ldrb.w r2, [r4], #1 80077cc: 4053 eors r3, r2 80077ce: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 80077d0: f013 0f80 tst.w r3, #128 ; 0x80 80077d4: f102 32ff add.w r2, r2, #4294967295 80077d8: ea4f 0343 mov.w r3, r3, lsl #1 80077dc: bf18 it ne 80077de: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 80077e2: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 80077e6: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 80077e8: d1f2 bne.n 80077d0 80077ea: e7e7 b.n 80077bc 080077ec : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 80077ec: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80077ee: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80077f0: 4605 mov r5, r0 80077f2: 1a2c subs r4, r5, r0 80077f4: b2e4 uxtb r4, r4 80077f6: 42a1 cmp r1, r4 80077f8: d803 bhi.n 8007802 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 80077fa: 1a9b subs r3, r3, r2 80077fc: 4258 negs r0, r3 80077fe: 4158 adcs r0, r3 8007800: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8007802: f815 4b01 ldrb.w r4, [r5], #1 8007806: 4063 eors r3, r4 8007808: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 800780a: f013 0f80 tst.w r3, #128 ; 0x80 800780e: f104 34ff add.w r4, r4, #4294967295 8007812: ea4f 0343 mov.w r3, r3, lsl #1 8007816: bf18 it ne 8007818: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 800781c: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8007820: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8007822: d1f2 bne.n 800780a 8007824: e7e5 b.n 80077f2 ... 08007828 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8007828: 4b0e ldr r3, [pc, #56] ; (8007864 ) { 800782a: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 800782c: 699a ldr r2, [r3, #24] 800782e: f042 0201 orr.w r2, r2, #1 8007832: 619a str r2, [r3, #24] 8007834: 699a ldr r2, [r3, #24] 8007836: f002 0201 and.w r2, r2, #1 800783a: 9200 str r2, [sp, #0] 800783c: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 800783e: 69da ldr r2, [r3, #28] 8007840: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8007844: 61da str r2, [r3, #28] 8007846: 69db ldr r3, [r3, #28] /* System interrupt init*/ /**DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8007848: 4a07 ldr r2, [pc, #28] ; (8007868 ) __HAL_RCC_PWR_CLK_ENABLE(); 800784a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800784e: 9301 str r3, [sp, #4] 8007850: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 8007852: 6853 ldr r3, [r2, #4] 8007854: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8007858: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 800785c: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800785e: b002 add sp, #8 8007860: 4770 bx lr 8007862: bf00 nop 8007864: 40021000 .word 0x40021000 8007868: 40010000 .word 0x40010000 0800786c : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 800786c: b510 push {r4, lr} 800786e: 4604 mov r4, r0 8007870: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007872: 2210 movs r2, #16 8007874: 2100 movs r1, #0 8007876: a802 add r0, sp, #8 8007878: f000 f95d bl 8007b36 if(hi2c->Instance==I2C2) 800787c: 6822 ldr r2, [r4, #0] 800787e: 4b11 ldr r3, [pc, #68] ; (80078c4 ) 8007880: 429a cmp r2, r3 8007882: d11d bne.n 80078c0 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8007884: 4c10 ldr r4, [pc, #64] ; (80078c8 ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007886: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007888: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800788a: 4810 ldr r0, [pc, #64] ; (80078cc ) __HAL_RCC_GPIOB_CLK_ENABLE(); 800788c: f043 0308 orr.w r3, r3, #8 8007890: 61a3 str r3, [r4, #24] 8007892: 69a3 ldr r3, [r4, #24] 8007894: f003 0308 and.w r3, r3, #8 8007898: 9300 str r3, [sp, #0] 800789a: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 800789c: f44f 6340 mov.w r3, #3072 ; 0xc00 80078a0: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 80078a2: 2312 movs r3, #18 80078a4: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80078a6: 2303 movs r3, #3 80078a8: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80078aa: f7fc ff45 bl 8004738 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 80078ae: 69e3 ldr r3, [r4, #28] 80078b0: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 80078b4: 61e3 str r3, [r4, #28] 80078b6: 69e3 ldr r3, [r4, #28] 80078b8: f403 0380 and.w r3, r3, #4194304 ; 0x400000 80078bc: 9301 str r3, [sp, #4] 80078be: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 80078c0: b006 add sp, #24 80078c2: bd10 pop {r4, pc} 80078c4: 40005800 .word 0x40005800 80078c8: 40021000 .word 0x40021000 80078cc: 40010c00 .word 0x40010c00 080078d0 : * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 80078d0: 6802 ldr r2, [r0, #0] 80078d2: 4b08 ldr r3, [pc, #32] ; (80078f4 ) { 80078d4: b082 sub sp, #8 if(htim_base->Instance==TIM6) 80078d6: 429a cmp r2, r3 80078d8: d10a bne.n 80078f0 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80078da: f503 3300 add.w r3, r3, #131072 ; 0x20000 80078de: 69da ldr r2, [r3, #28] 80078e0: f042 0210 orr.w r2, r2, #16 80078e4: 61da str r2, [r3, #28] 80078e6: 69db ldr r3, [r3, #28] 80078e8: f003 0310 and.w r3, r3, #16 80078ec: 9301 str r3, [sp, #4] 80078ee: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 80078f0: b002 add sp, #8 80078f2: 4770 bx lr 80078f4: 40001000 .word 0x40001000 080078f8 : * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80078f8: 2210 movs r2, #16 { 80078fa: b570 push {r4, r5, r6, lr} 80078fc: 4606 mov r6, r0 80078fe: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007900: eb0d 0002 add.w r0, sp, r2 8007904: 2100 movs r1, #0 8007906: f000 f916 bl 8007b36 if(huart->Instance==USART1) 800790a: 6833 ldr r3, [r6, #0] 800790c: 4a35 ldr r2, [pc, #212] ; (80079e4 ) 800790e: 4293 cmp r3, r2 8007910: d13d bne.n 800798e { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8007912: 4b35 ldr r3, [pc, #212] ; (80079e8 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007914: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 8007916: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007918: 4834 ldr r0, [pc, #208] ; (80079ec ) __HAL_RCC_USART1_CLK_ENABLE(); 800791a: f442 4280 orr.w r2, r2, #16384 ; 0x4000 800791e: 619a str r2, [r3, #24] 8007920: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007922: 2500 movs r5, #0 __HAL_RCC_USART1_CLK_ENABLE(); 8007924: f402 4280 and.w r2, r2, #16384 ; 0x4000 8007928: 9200 str r2, [sp, #0] 800792a: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 800792c: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 800792e: 4c30 ldr r4, [pc, #192] ; (80079f0 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8007930: f042 0204 orr.w r2, r2, #4 8007934: 619a str r2, [r3, #24] 8007936: 699b ldr r3, [r3, #24] 8007938: f003 0304 and.w r3, r3, #4 800793c: 9301 str r3, [sp, #4] 800793e: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8007940: f44f 7300 mov.w r3, #512 ; 0x200 8007944: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8007946: 2302 movs r3, #2 8007948: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800794a: 2303 movs r3, #3 800794c: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800794e: f7fc fef3 bl 8004738 GPIO_InitStruct.Pin = GPIO_PIN_10; 8007952: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007956: 4825 ldr r0, [pc, #148] ; (80079ec ) 8007958: a904 add r1, sp, #16 GPIO_InitStruct.Pin = GPIO_PIN_10; 800795a: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800795c: 9505 str r5, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800795e: 9506 str r5, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007960: f7fc feea bl 8004738 hdma_usart1_rx.Instance = DMA1_Channel5; 8007964: 4b23 ldr r3, [pc, #140] ; (80079f4 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_CIRCULAR; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8007966: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8007968: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 800796c: 2380 movs r3, #128 ; 0x80 800796e: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.Mode = DMA_CIRCULAR; 8007970: 2320 movs r3, #32 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 8007972: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8007974: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8007976: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_CIRCULAR; 8007978: 61a3 str r3, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 800797a: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 800797c: f7fc fd14 bl 80043a8 8007980: b108 cbz r0, 8007986 { Error_Handler(); 8007982: f7ff ff17 bl 80077b4 } __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 8007986: 6374 str r4, [r6, #52] ; 0x34 8007988: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 800798a: b008 add sp, #32 800798c: bd70 pop {r4, r5, r6, pc} else if(huart->Instance==USART2) 800798e: 4a1a ldr r2, [pc, #104] ; (80079f8 ) 8007990: 4293 cmp r3, r2 8007992: d1fa bne.n 800798a __HAL_RCC_USART2_CLK_ENABLE(); 8007994: 4b14 ldr r3, [pc, #80] ; (80079e8 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8007996: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 8007998: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800799a: 4814 ldr r0, [pc, #80] ; (80079ec ) __HAL_RCC_USART2_CLK_ENABLE(); 800799c: f442 3200 orr.w r2, r2, #131072 ; 0x20000 80079a0: 61da str r2, [r3, #28] 80079a2: 69da ldr r2, [r3, #28] 80079a4: f402 3200 and.w r2, r2, #131072 ; 0x20000 80079a8: 9202 str r2, [sp, #8] 80079aa: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 80079ac: 699a ldr r2, [r3, #24] 80079ae: f042 0204 orr.w r2, r2, #4 80079b2: 619a str r2, [r3, #24] 80079b4: 699b ldr r3, [r3, #24] 80079b6: f003 0304 and.w r3, r3, #4 80079ba: 9303 str r3, [sp, #12] 80079bc: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 80079be: 2304 movs r3, #4 80079c0: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80079c2: 2302 movs r3, #2 80079c4: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80079c6: 2303 movs r3, #3 80079c8: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80079ca: f7fc feb5 bl 8004738 GPIO_InitStruct.Pin = GPIO_PIN_3; 80079ce: 2308 movs r3, #8 80079d0: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80079d2: 2300 movs r3, #0 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80079d4: a904 add r1, sp, #16 80079d6: 4805 ldr r0, [pc, #20] ; (80079ec ) GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80079d8: 9305 str r3, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80079da: 9306 str r3, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80079dc: f7fc feac bl 8004738 } 80079e0: e7d3 b.n 800798a 80079e2: bf00 nop 80079e4: 40013800 .word 0x40013800 80079e8: 40021000 .word 0x40021000 80079ec: 40010800 .word 0x40010800 80079f0: 20000514 .word 0x20000514 80079f4: 40020058 .word 0x40020058 80079f8: 40004400 .word 0x40004400 080079fc : 80079fc: 4770 bx lr 080079fe : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80079fe: e7fe b.n 80079fe 08007a00 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8007a00: e7fe b.n 8007a00 08007a02 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8007a02: e7fe b.n 8007a02 08007a04 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8007a04: e7fe b.n 8007a04 08007a06 : 8007a06: 4770 bx lr 08007a08 : 8007a08: 4770 bx lr 08007a0a : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8007a0a: 4770 bx lr 08007a0c : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8007a0c: f7fc bc40 b.w 8004290 08007a10 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8007a10: 4801 ldr r0, [pc, #4] ; (8007a18 ) 8007a12: f7fc bdb5 b.w 8004580 8007a16: bf00 nop 8007a18: 20000514 .word 0x20000514 08007a1c : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8007a1c: 4801 ldr r0, [pc, #4] ; (8007a24 ) 8007a1e: f7fe b9b3 b.w 8005d88 8007a22: bf00 nop 8007a24: 20000558 .word 0x20000558 08007a28 : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 8007a28: 4801 ldr r0, [pc, #4] ; (8007a30 ) 8007a2a: f7fe b9ad b.w 8005d88 8007a2e: bf00 nop 8007a30: 20000704 .word 0x20000704 08007a34 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8007a34: 4801 ldr r0, [pc, #4] ; (8007a3c ) 8007a36: f7fd be22 b.w 800567e 8007a3a: bf00 nop 8007a3c: 200006c4 .word 0x200006c4 08007a40 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8007a40: 4b0e ldr r3, [pc, #56] ; (8007a7c ) 8007a42: 681a ldr r2, [r3, #0] 8007a44: f042 0201 orr.w r2, r2, #1 8007a48: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8007a4a: 6859 ldr r1, [r3, #4] 8007a4c: 4a0c ldr r2, [pc, #48] ; (8007a80 ) 8007a4e: 400a ands r2, r1 8007a50: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8007a52: 681a ldr r2, [r3, #0] 8007a54: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8007a58: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8007a5c: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8007a5e: 681a ldr r2, [r3, #0] 8007a60: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8007a64: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8007a66: 685a ldr r2, [r3, #4] 8007a68: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8007a6c: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8007a6e: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8007a72: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8007a74: 4a03 ldr r2, [pc, #12] ; (8007a84 ) 8007a76: 4b04 ldr r3, [pc, #16] ; (8007a88 ) 8007a78: 609a str r2, [r3, #8] 8007a7a: 4770 bx lr 8007a7c: 40021000 .word 0x40021000 8007a80: f8ff0000 .word 0xf8ff0000 8007a84: 08004000 .word 0x08004000 8007a88: e000ed00 .word 0xe000ed00 08007a8c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8007a8c: 2100 movs r1, #0 b LoopCopyDataInit 8007a8e: e003 b.n 8007a98 08007a90 : CopyDataInit: ldr r3, =_sidata 8007a90: 4b0b ldr r3, [pc, #44] ; (8007ac0 ) ldr r3, [r3, r1] 8007a92: 585b ldr r3, [r3, r1] str r3, [r0, r1] 8007a94: 5043 str r3, [r0, r1] adds r1, r1, #4 8007a96: 3104 adds r1, #4 08007a98 : LoopCopyDataInit: ldr r0, =_sdata 8007a98: 480a ldr r0, [pc, #40] ; (8007ac4 ) ldr r3, =_edata 8007a9a: 4b0b ldr r3, [pc, #44] ; (8007ac8 ) adds r2, r0, r1 8007a9c: 1842 adds r2, r0, r1 cmp r2, r3 8007a9e: 429a cmp r2, r3 bcc CopyDataInit 8007aa0: d3f6 bcc.n 8007a90 ldr r2, =_sbss 8007aa2: 4a0a ldr r2, [pc, #40] ; (8007acc ) b LoopFillZerobss 8007aa4: e002 b.n 8007aac 08007aa6 : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 8007aa6: 2300 movs r3, #0 str r3, [r2], #4 8007aa8: f842 3b04 str.w r3, [r2], #4 08007aac : LoopFillZerobss: ldr r3, = _ebss 8007aac: 4b08 ldr r3, [pc, #32] ; (8007ad0 ) cmp r2, r3 8007aae: 429a cmp r2, r3 bcc FillZerobss 8007ab0: d3f9 bcc.n 8007aa6 /* Call the clock system intitialization function.*/ bl SystemInit 8007ab2: f7ff ffc5 bl 8007a40 /* Call static constructors */ bl __libc_init_array 8007ab6: f000 f80f bl 8007ad8 <__libc_init_array> /* Call the application's entry point.*/ bl main 8007aba: f7ff fb6d bl 8007198
bx lr 8007abe: 4770 bx lr ldr r3, =_sidata 8007ac0: 08008f8c .word 0x08008f8c ldr r0, =_sdata 8007ac4: 20000000 .word 0x20000000 ldr r3, =_edata 8007ac8: 20000074 .word 0x20000074 ldr r2, =_sbss 8007acc: 20000074 .word 0x20000074 ldr r3, = _ebss 8007ad0: 2000085c .word 0x2000085c 08007ad4 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8007ad4: e7fe b.n 8007ad4 ... 08007ad8 <__libc_init_array>: 8007ad8: b570 push {r4, r5, r6, lr} 8007ada: 2500 movs r5, #0 8007adc: 4e0c ldr r6, [pc, #48] ; (8007b10 <__libc_init_array+0x38>) 8007ade: 4c0d ldr r4, [pc, #52] ; (8007b14 <__libc_init_array+0x3c>) 8007ae0: 1ba4 subs r4, r4, r6 8007ae2: 10a4 asrs r4, r4, #2 8007ae4: 42a5 cmp r5, r4 8007ae6: d109 bne.n 8007afc <__libc_init_array+0x24> 8007ae8: f001 f8d4 bl 8008c94 <_init> 8007aec: 2500 movs r5, #0 8007aee: 4e0a ldr r6, [pc, #40] ; (8007b18 <__libc_init_array+0x40>) 8007af0: 4c0a ldr r4, [pc, #40] ; (8007b1c <__libc_init_array+0x44>) 8007af2: 1ba4 subs r4, r4, r6 8007af4: 10a4 asrs r4, r4, #2 8007af6: 42a5 cmp r5, r4 8007af8: d105 bne.n 8007b06 <__libc_init_array+0x2e> 8007afa: bd70 pop {r4, r5, r6, pc} 8007afc: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8007b00: 4798 blx r3 8007b02: 3501 adds r5, #1 8007b04: e7ee b.n 8007ae4 <__libc_init_array+0xc> 8007b06: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8007b0a: 4798 blx r3 8007b0c: 3501 adds r5, #1 8007b0e: e7f2 b.n 8007af6 <__libc_init_array+0x1e> 8007b10: 08008f84 .word 0x08008f84 8007b14: 08008f84 .word 0x08008f84 8007b18: 08008f84 .word 0x08008f84 8007b1c: 08008f88 .word 0x08008f88 08007b20 : 8007b20: b510 push {r4, lr} 8007b22: 1e43 subs r3, r0, #1 8007b24: 440a add r2, r1 8007b26: 4291 cmp r1, r2 8007b28: d100 bne.n 8007b2c 8007b2a: bd10 pop {r4, pc} 8007b2c: f811 4b01 ldrb.w r4, [r1], #1 8007b30: f803 4f01 strb.w r4, [r3, #1]! 8007b34: e7f7 b.n 8007b26 08007b36 : 8007b36: 4603 mov r3, r0 8007b38: 4402 add r2, r0 8007b3a: 4293 cmp r3, r2 8007b3c: d100 bne.n 8007b40 8007b3e: 4770 bx lr 8007b40: f803 1b01 strb.w r1, [r3], #1 8007b44: e7f9 b.n 8007b3a ... 08007b48 : 8007b48: b40f push {r0, r1, r2, r3} 8007b4a: 4b0a ldr r3, [pc, #40] ; (8007b74 ) 8007b4c: b513 push {r0, r1, r4, lr} 8007b4e: 681c ldr r4, [r3, #0] 8007b50: b124 cbz r4, 8007b5c 8007b52: 69a3 ldr r3, [r4, #24] 8007b54: b913 cbnz r3, 8007b5c 8007b56: 4620 mov r0, r4 8007b58: f000 faee bl 8008138 <__sinit> 8007b5c: ab05 add r3, sp, #20 8007b5e: 9a04 ldr r2, [sp, #16] 8007b60: 68a1 ldr r1, [r4, #8] 8007b62: 4620 mov r0, r4 8007b64: 9301 str r3, [sp, #4] 8007b66: f000 fcaf bl 80084c8 <_vfiprintf_r> 8007b6a: b002 add sp, #8 8007b6c: e8bd 4010 ldmia.w sp!, {r4, lr} 8007b70: b004 add sp, #16 8007b72: 4770 bx lr 8007b74: 20000010 .word 0x20000010 08007b78 : 8007b78: b538 push {r3, r4, r5, lr} 8007b7a: 4b08 ldr r3, [pc, #32] ; (8007b9c ) 8007b7c: 4605 mov r5, r0 8007b7e: 681c ldr r4, [r3, #0] 8007b80: b124 cbz r4, 8007b8c 8007b82: 69a3 ldr r3, [r4, #24] 8007b84: b913 cbnz r3, 8007b8c 8007b86: 4620 mov r0, r4 8007b88: f000 fad6 bl 8008138 <__sinit> 8007b8c: 68a2 ldr r2, [r4, #8] 8007b8e: 4629 mov r1, r5 8007b90: 4620 mov r0, r4 8007b92: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8007b96: f000 bf45 b.w 8008a24 <_putc_r> 8007b9a: bf00 nop 8007b9c: 20000010 .word 0x20000010 08007ba0 <_puts_r>: 8007ba0: b570 push {r4, r5, r6, lr} 8007ba2: 460e mov r6, r1 8007ba4: 4605 mov r5, r0 8007ba6: b118 cbz r0, 8007bb0 <_puts_r+0x10> 8007ba8: 6983 ldr r3, [r0, #24] 8007baa: b90b cbnz r3, 8007bb0 <_puts_r+0x10> 8007bac: f000 fac4 bl 8008138 <__sinit> 8007bb0: 69ab ldr r3, [r5, #24] 8007bb2: 68ac ldr r4, [r5, #8] 8007bb4: b913 cbnz r3, 8007bbc <_puts_r+0x1c> 8007bb6: 4628 mov r0, r5 8007bb8: f000 fabe bl 8008138 <__sinit> 8007bbc: 4b23 ldr r3, [pc, #140] ; (8007c4c <_puts_r+0xac>) 8007bbe: 429c cmp r4, r3 8007bc0: d117 bne.n 8007bf2 <_puts_r+0x52> 8007bc2: 686c ldr r4, [r5, #4] 8007bc4: 89a3 ldrh r3, [r4, #12] 8007bc6: 071b lsls r3, r3, #28 8007bc8: d51d bpl.n 8007c06 <_puts_r+0x66> 8007bca: 6923 ldr r3, [r4, #16] 8007bcc: b1db cbz r3, 8007c06 <_puts_r+0x66> 8007bce: 3e01 subs r6, #1 8007bd0: 68a3 ldr r3, [r4, #8] 8007bd2: f816 1f01 ldrb.w r1, [r6, #1]! 8007bd6: 3b01 subs r3, #1 8007bd8: 60a3 str r3, [r4, #8] 8007bda: b9e9 cbnz r1, 8007c18 <_puts_r+0x78> 8007bdc: 2b00 cmp r3, #0 8007bde: da2e bge.n 8007c3e <_puts_r+0x9e> 8007be0: 4622 mov r2, r4 8007be2: 210a movs r1, #10 8007be4: 4628 mov r0, r5 8007be6: f000 f8f5 bl 8007dd4 <__swbuf_r> 8007bea: 3001 adds r0, #1 8007bec: d011 beq.n 8007c12 <_puts_r+0x72> 8007bee: 200a movs r0, #10 8007bf0: bd70 pop {r4, r5, r6, pc} 8007bf2: 4b17 ldr r3, [pc, #92] ; (8007c50 <_puts_r+0xb0>) 8007bf4: 429c cmp r4, r3 8007bf6: d101 bne.n 8007bfc <_puts_r+0x5c> 8007bf8: 68ac ldr r4, [r5, #8] 8007bfa: e7e3 b.n 8007bc4 <_puts_r+0x24> 8007bfc: 4b15 ldr r3, [pc, #84] ; (8007c54 <_puts_r+0xb4>) 8007bfe: 429c cmp r4, r3 8007c00: bf08 it eq 8007c02: 68ec ldreq r4, [r5, #12] 8007c04: e7de b.n 8007bc4 <_puts_r+0x24> 8007c06: 4621 mov r1, r4 8007c08: 4628 mov r0, r5 8007c0a: f000 f935 bl 8007e78 <__swsetup_r> 8007c0e: 2800 cmp r0, #0 8007c10: d0dd beq.n 8007bce <_puts_r+0x2e> 8007c12: f04f 30ff mov.w r0, #4294967295 8007c16: bd70 pop {r4, r5, r6, pc} 8007c18: 2b00 cmp r3, #0 8007c1a: da04 bge.n 8007c26 <_puts_r+0x86> 8007c1c: 69a2 ldr r2, [r4, #24] 8007c1e: 4293 cmp r3, r2 8007c20: db06 blt.n 8007c30 <_puts_r+0x90> 8007c22: 290a cmp r1, #10 8007c24: d004 beq.n 8007c30 <_puts_r+0x90> 8007c26: 6823 ldr r3, [r4, #0] 8007c28: 1c5a adds r2, r3, #1 8007c2a: 6022 str r2, [r4, #0] 8007c2c: 7019 strb r1, [r3, #0] 8007c2e: e7cf b.n 8007bd0 <_puts_r+0x30> 8007c30: 4622 mov r2, r4 8007c32: 4628 mov r0, r5 8007c34: f000 f8ce bl 8007dd4 <__swbuf_r> 8007c38: 3001 adds r0, #1 8007c3a: d1c9 bne.n 8007bd0 <_puts_r+0x30> 8007c3c: e7e9 b.n 8007c12 <_puts_r+0x72> 8007c3e: 200a movs r0, #10 8007c40: 6823 ldr r3, [r4, #0] 8007c42: 1c5a adds r2, r3, #1 8007c44: 6022 str r2, [r4, #0] 8007c46: 7018 strb r0, [r3, #0] 8007c48: bd70 pop {r4, r5, r6, pc} 8007c4a: bf00 nop 8007c4c: 08008f10 .word 0x08008f10 8007c50: 08008f30 .word 0x08008f30 8007c54: 08008ef0 .word 0x08008ef0 08007c58 : 8007c58: 4b02 ldr r3, [pc, #8] ; (8007c64 ) 8007c5a: 4601 mov r1, r0 8007c5c: 6818 ldr r0, [r3, #0] 8007c5e: f7ff bf9f b.w 8007ba0 <_puts_r> 8007c62: bf00 nop 8007c64: 20000010 .word 0x20000010 08007c68 : 8007c68: 2900 cmp r1, #0 8007c6a: f44f 6380 mov.w r3, #1024 ; 0x400 8007c6e: bf0c ite eq 8007c70: 2202 moveq r2, #2 8007c72: 2200 movne r2, #0 8007c74: f000 b800 b.w 8007c78 08007c78 : 8007c78: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8007c7c: 461d mov r5, r3 8007c7e: 4b51 ldr r3, [pc, #324] ; (8007dc4 ) 8007c80: 4604 mov r4, r0 8007c82: 681e ldr r6, [r3, #0] 8007c84: 460f mov r7, r1 8007c86: 4690 mov r8, r2 8007c88: b126 cbz r6, 8007c94 8007c8a: 69b3 ldr r3, [r6, #24] 8007c8c: b913 cbnz r3, 8007c94 8007c8e: 4630 mov r0, r6 8007c90: f000 fa52 bl 8008138 <__sinit> 8007c94: 4b4c ldr r3, [pc, #304] ; (8007dc8 ) 8007c96: 429c cmp r4, r3 8007c98: d152 bne.n 8007d40 8007c9a: 6874 ldr r4, [r6, #4] 8007c9c: f1b8 0f02 cmp.w r8, #2 8007ca0: d006 beq.n 8007cb0 8007ca2: f1b8 0f01 cmp.w r8, #1 8007ca6: f200 8089 bhi.w 8007dbc 8007caa: 2d00 cmp r5, #0 8007cac: f2c0 8086 blt.w 8007dbc 8007cb0: 4621 mov r1, r4 8007cb2: 4630 mov r0, r6 8007cb4: f000 f9d6 bl 8008064 <_fflush_r> 8007cb8: 6b61 ldr r1, [r4, #52] ; 0x34 8007cba: b141 cbz r1, 8007cce 8007cbc: f104 0344 add.w r3, r4, #68 ; 0x44 8007cc0: 4299 cmp r1, r3 8007cc2: d002 beq.n 8007cca 8007cc4: 4630 mov r0, r6 8007cc6: f000 fb2d bl 8008324 <_free_r> 8007cca: 2300 movs r3, #0 8007ccc: 6363 str r3, [r4, #52] ; 0x34 8007cce: 2300 movs r3, #0 8007cd0: 61a3 str r3, [r4, #24] 8007cd2: 6063 str r3, [r4, #4] 8007cd4: 89a3 ldrh r3, [r4, #12] 8007cd6: 061b lsls r3, r3, #24 8007cd8: d503 bpl.n 8007ce2 8007cda: 6921 ldr r1, [r4, #16] 8007cdc: 4630 mov r0, r6 8007cde: f000 fb21 bl 8008324 <_free_r> 8007ce2: 89a3 ldrh r3, [r4, #12] 8007ce4: f1b8 0f02 cmp.w r8, #2 8007ce8: f423 634a bic.w r3, r3, #3232 ; 0xca0 8007cec: f023 0303 bic.w r3, r3, #3 8007cf0: 81a3 strh r3, [r4, #12] 8007cf2: d05d beq.n 8007db0 8007cf4: ab01 add r3, sp, #4 8007cf6: 466a mov r2, sp 8007cf8: 4621 mov r1, r4 8007cfa: 4630 mov r0, r6 8007cfc: f000 faa6 bl 800824c <__swhatbuf_r> 8007d00: 89a3 ldrh r3, [r4, #12] 8007d02: 4318 orrs r0, r3 8007d04: 81a0 strh r0, [r4, #12] 8007d06: bb2d cbnz r5, 8007d54 8007d08: 9d00 ldr r5, [sp, #0] 8007d0a: 4628 mov r0, r5 8007d0c: f000 fb02 bl 8008314 8007d10: 4607 mov r7, r0 8007d12: 2800 cmp r0, #0 8007d14: d14e bne.n 8007db4 8007d16: f8dd 9000 ldr.w r9, [sp] 8007d1a: 45a9 cmp r9, r5 8007d1c: d13c bne.n 8007d98 8007d1e: f04f 30ff mov.w r0, #4294967295 8007d22: 89a3 ldrh r3, [r4, #12] 8007d24: f043 0302 orr.w r3, r3, #2 8007d28: 81a3 strh r3, [r4, #12] 8007d2a: 2300 movs r3, #0 8007d2c: 60a3 str r3, [r4, #8] 8007d2e: f104 0347 add.w r3, r4, #71 ; 0x47 8007d32: 6023 str r3, [r4, #0] 8007d34: 6123 str r3, [r4, #16] 8007d36: 2301 movs r3, #1 8007d38: 6163 str r3, [r4, #20] 8007d3a: b003 add sp, #12 8007d3c: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8007d40: 4b22 ldr r3, [pc, #136] ; (8007dcc ) 8007d42: 429c cmp r4, r3 8007d44: d101 bne.n 8007d4a 8007d46: 68b4 ldr r4, [r6, #8] 8007d48: e7a8 b.n 8007c9c 8007d4a: 4b21 ldr r3, [pc, #132] ; (8007dd0 ) 8007d4c: 429c cmp r4, r3 8007d4e: bf08 it eq 8007d50: 68f4 ldreq r4, [r6, #12] 8007d52: e7a3 b.n 8007c9c 8007d54: 2f00 cmp r7, #0 8007d56: d0d8 beq.n 8007d0a 8007d58: 69b3 ldr r3, [r6, #24] 8007d5a: b913 cbnz r3, 8007d62 8007d5c: 4630 mov r0, r6 8007d5e: f000 f9eb bl 8008138 <__sinit> 8007d62: f1b8 0f01 cmp.w r8, #1 8007d66: bf08 it eq 8007d68: 89a3 ldrheq r3, [r4, #12] 8007d6a: 6027 str r7, [r4, #0] 8007d6c: bf04 itt eq 8007d6e: f043 0301 orreq.w r3, r3, #1 8007d72: 81a3 strheq r3, [r4, #12] 8007d74: 89a3 ldrh r3, [r4, #12] 8007d76: 6127 str r7, [r4, #16] 8007d78: f013 0008 ands.w r0, r3, #8 8007d7c: 6165 str r5, [r4, #20] 8007d7e: d01b beq.n 8007db8 8007d80: f013 0001 ands.w r0, r3, #1 8007d84: f04f 0300 mov.w r3, #0 8007d88: bf1f itttt ne 8007d8a: 426d negne r5, r5 8007d8c: 60a3 strne r3, [r4, #8] 8007d8e: 61a5 strne r5, [r4, #24] 8007d90: 4618 movne r0, r3 8007d92: bf08 it eq 8007d94: 60a5 streq r5, [r4, #8] 8007d96: e7d0 b.n 8007d3a 8007d98: 4648 mov r0, r9 8007d9a: f000 fabb bl 8008314 8007d9e: 4607 mov r7, r0 8007da0: 2800 cmp r0, #0 8007da2: d0bc beq.n 8007d1e 8007da4: 89a3 ldrh r3, [r4, #12] 8007da6: 464d mov r5, r9 8007da8: f043 0380 orr.w r3, r3, #128 ; 0x80 8007dac: 81a3 strh r3, [r4, #12] 8007dae: e7d3 b.n 8007d58 8007db0: 2000 movs r0, #0 8007db2: e7b6 b.n 8007d22 8007db4: 46a9 mov r9, r5 8007db6: e7f5 b.n 8007da4 8007db8: 60a0 str r0, [r4, #8] 8007dba: e7be b.n 8007d3a 8007dbc: f04f 30ff mov.w r0, #4294967295 8007dc0: e7bb b.n 8007d3a 8007dc2: bf00 nop 8007dc4: 20000010 .word 0x20000010 8007dc8: 08008f10 .word 0x08008f10 8007dcc: 08008f30 .word 0x08008f30 8007dd0: 08008ef0 .word 0x08008ef0 08007dd4 <__swbuf_r>: 8007dd4: b5f8 push {r3, r4, r5, r6, r7, lr} 8007dd6: 460e mov r6, r1 8007dd8: 4614 mov r4, r2 8007dda: 4605 mov r5, r0 8007ddc: b118 cbz r0, 8007de6 <__swbuf_r+0x12> 8007dde: 6983 ldr r3, [r0, #24] 8007de0: b90b cbnz r3, 8007de6 <__swbuf_r+0x12> 8007de2: f000 f9a9 bl 8008138 <__sinit> 8007de6: 4b21 ldr r3, [pc, #132] ; (8007e6c <__swbuf_r+0x98>) 8007de8: 429c cmp r4, r3 8007dea: d12a bne.n 8007e42 <__swbuf_r+0x6e> 8007dec: 686c ldr r4, [r5, #4] 8007dee: 69a3 ldr r3, [r4, #24] 8007df0: 60a3 str r3, [r4, #8] 8007df2: 89a3 ldrh r3, [r4, #12] 8007df4: 071a lsls r2, r3, #28 8007df6: d52e bpl.n 8007e56 <__swbuf_r+0x82> 8007df8: 6923 ldr r3, [r4, #16] 8007dfa: b363 cbz r3, 8007e56 <__swbuf_r+0x82> 8007dfc: 6923 ldr r3, [r4, #16] 8007dfe: 6820 ldr r0, [r4, #0] 8007e00: b2f6 uxtb r6, r6 8007e02: 1ac0 subs r0, r0, r3 8007e04: 6963 ldr r3, [r4, #20] 8007e06: 4637 mov r7, r6 8007e08: 4298 cmp r0, r3 8007e0a: db04 blt.n 8007e16 <__swbuf_r+0x42> 8007e0c: 4621 mov r1, r4 8007e0e: 4628 mov r0, r5 8007e10: f000 f928 bl 8008064 <_fflush_r> 8007e14: bb28 cbnz r0, 8007e62 <__swbuf_r+0x8e> 8007e16: 68a3 ldr r3, [r4, #8] 8007e18: 3001 adds r0, #1 8007e1a: 3b01 subs r3, #1 8007e1c: 60a3 str r3, [r4, #8] 8007e1e: 6823 ldr r3, [r4, #0] 8007e20: 1c5a adds r2, r3, #1 8007e22: 6022 str r2, [r4, #0] 8007e24: 701e strb r6, [r3, #0] 8007e26: 6963 ldr r3, [r4, #20] 8007e28: 4298 cmp r0, r3 8007e2a: d004 beq.n 8007e36 <__swbuf_r+0x62> 8007e2c: 89a3 ldrh r3, [r4, #12] 8007e2e: 07db lsls r3, r3, #31 8007e30: d519 bpl.n 8007e66 <__swbuf_r+0x92> 8007e32: 2e0a cmp r6, #10 8007e34: d117 bne.n 8007e66 <__swbuf_r+0x92> 8007e36: 4621 mov r1, r4 8007e38: 4628 mov r0, r5 8007e3a: f000 f913 bl 8008064 <_fflush_r> 8007e3e: b190 cbz r0, 8007e66 <__swbuf_r+0x92> 8007e40: e00f b.n 8007e62 <__swbuf_r+0x8e> 8007e42: 4b0b ldr r3, [pc, #44] ; (8007e70 <__swbuf_r+0x9c>) 8007e44: 429c cmp r4, r3 8007e46: d101 bne.n 8007e4c <__swbuf_r+0x78> 8007e48: 68ac ldr r4, [r5, #8] 8007e4a: e7d0 b.n 8007dee <__swbuf_r+0x1a> 8007e4c: 4b09 ldr r3, [pc, #36] ; (8007e74 <__swbuf_r+0xa0>) 8007e4e: 429c cmp r4, r3 8007e50: bf08 it eq 8007e52: 68ec ldreq r4, [r5, #12] 8007e54: e7cb b.n 8007dee <__swbuf_r+0x1a> 8007e56: 4621 mov r1, r4 8007e58: 4628 mov r0, r5 8007e5a: f000 f80d bl 8007e78 <__swsetup_r> 8007e5e: 2800 cmp r0, #0 8007e60: d0cc beq.n 8007dfc <__swbuf_r+0x28> 8007e62: f04f 37ff mov.w r7, #4294967295 8007e66: 4638 mov r0, r7 8007e68: bdf8 pop {r3, r4, r5, r6, r7, pc} 8007e6a: bf00 nop 8007e6c: 08008f10 .word 0x08008f10 8007e70: 08008f30 .word 0x08008f30 8007e74: 08008ef0 .word 0x08008ef0 08007e78 <__swsetup_r>: 8007e78: 4b32 ldr r3, [pc, #200] ; (8007f44 <__swsetup_r+0xcc>) 8007e7a: b570 push {r4, r5, r6, lr} 8007e7c: 681d ldr r5, [r3, #0] 8007e7e: 4606 mov r6, r0 8007e80: 460c mov r4, r1 8007e82: b125 cbz r5, 8007e8e <__swsetup_r+0x16> 8007e84: 69ab ldr r3, [r5, #24] 8007e86: b913 cbnz r3, 8007e8e <__swsetup_r+0x16> 8007e88: 4628 mov r0, r5 8007e8a: f000 f955 bl 8008138 <__sinit> 8007e8e: 4b2e ldr r3, [pc, #184] ; (8007f48 <__swsetup_r+0xd0>) 8007e90: 429c cmp r4, r3 8007e92: d10f bne.n 8007eb4 <__swsetup_r+0x3c> 8007e94: 686c ldr r4, [r5, #4] 8007e96: f9b4 300c ldrsh.w r3, [r4, #12] 8007e9a: b29a uxth r2, r3 8007e9c: 0715 lsls r5, r2, #28 8007e9e: d42c bmi.n 8007efa <__swsetup_r+0x82> 8007ea0: 06d0 lsls r0, r2, #27 8007ea2: d411 bmi.n 8007ec8 <__swsetup_r+0x50> 8007ea4: 2209 movs r2, #9 8007ea6: 6032 str r2, [r6, #0] 8007ea8: f043 0340 orr.w r3, r3, #64 ; 0x40 8007eac: 81a3 strh r3, [r4, #12] 8007eae: f04f 30ff mov.w r0, #4294967295 8007eb2: bd70 pop {r4, r5, r6, pc} 8007eb4: 4b25 ldr r3, [pc, #148] ; (8007f4c <__swsetup_r+0xd4>) 8007eb6: 429c cmp r4, r3 8007eb8: d101 bne.n 8007ebe <__swsetup_r+0x46> 8007eba: 68ac ldr r4, [r5, #8] 8007ebc: e7eb b.n 8007e96 <__swsetup_r+0x1e> 8007ebe: 4b24 ldr r3, [pc, #144] ; (8007f50 <__swsetup_r+0xd8>) 8007ec0: 429c cmp r4, r3 8007ec2: bf08 it eq 8007ec4: 68ec ldreq r4, [r5, #12] 8007ec6: e7e6 b.n 8007e96 <__swsetup_r+0x1e> 8007ec8: 0751 lsls r1, r2, #29 8007eca: d512 bpl.n 8007ef2 <__swsetup_r+0x7a> 8007ecc: 6b61 ldr r1, [r4, #52] ; 0x34 8007ece: b141 cbz r1, 8007ee2 <__swsetup_r+0x6a> 8007ed0: f104 0344 add.w r3, r4, #68 ; 0x44 8007ed4: 4299 cmp r1, r3 8007ed6: d002 beq.n 8007ede <__swsetup_r+0x66> 8007ed8: 4630 mov r0, r6 8007eda: f000 fa23 bl 8008324 <_free_r> 8007ede: 2300 movs r3, #0 8007ee0: 6363 str r3, [r4, #52] ; 0x34 8007ee2: 89a3 ldrh r3, [r4, #12] 8007ee4: f023 0324 bic.w r3, r3, #36 ; 0x24 8007ee8: 81a3 strh r3, [r4, #12] 8007eea: 2300 movs r3, #0 8007eec: 6063 str r3, [r4, #4] 8007eee: 6923 ldr r3, [r4, #16] 8007ef0: 6023 str r3, [r4, #0] 8007ef2: 89a3 ldrh r3, [r4, #12] 8007ef4: f043 0308 orr.w r3, r3, #8 8007ef8: 81a3 strh r3, [r4, #12] 8007efa: 6923 ldr r3, [r4, #16] 8007efc: b94b cbnz r3, 8007f12 <__swsetup_r+0x9a> 8007efe: 89a3 ldrh r3, [r4, #12] 8007f00: f403 7320 and.w r3, r3, #640 ; 0x280 8007f04: f5b3 7f00 cmp.w r3, #512 ; 0x200 8007f08: d003 beq.n 8007f12 <__swsetup_r+0x9a> 8007f0a: 4621 mov r1, r4 8007f0c: 4630 mov r0, r6 8007f0e: f000 f9c1 bl 8008294 <__smakebuf_r> 8007f12: 89a2 ldrh r2, [r4, #12] 8007f14: f012 0301 ands.w r3, r2, #1 8007f18: d00c beq.n 8007f34 <__swsetup_r+0xbc> 8007f1a: 2300 movs r3, #0 8007f1c: 60a3 str r3, [r4, #8] 8007f1e: 6963 ldr r3, [r4, #20] 8007f20: 425b negs r3, r3 8007f22: 61a3 str r3, [r4, #24] 8007f24: 6923 ldr r3, [r4, #16] 8007f26: b953 cbnz r3, 8007f3e <__swsetup_r+0xc6> 8007f28: f9b4 300c ldrsh.w r3, [r4, #12] 8007f2c: f013 0080 ands.w r0, r3, #128 ; 0x80 8007f30: d1ba bne.n 8007ea8 <__swsetup_r+0x30> 8007f32: bd70 pop {r4, r5, r6, pc} 8007f34: 0792 lsls r2, r2, #30 8007f36: bf58 it pl 8007f38: 6963 ldrpl r3, [r4, #20] 8007f3a: 60a3 str r3, [r4, #8] 8007f3c: e7f2 b.n 8007f24 <__swsetup_r+0xac> 8007f3e: 2000 movs r0, #0 8007f40: e7f7 b.n 8007f32 <__swsetup_r+0xba> 8007f42: bf00 nop 8007f44: 20000010 .word 0x20000010 8007f48: 08008f10 .word 0x08008f10 8007f4c: 08008f30 .word 0x08008f30 8007f50: 08008ef0 .word 0x08008ef0 08007f54 <__sflush_r>: 8007f54: 898a ldrh r2, [r1, #12] 8007f56: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8007f5a: 4605 mov r5, r0 8007f5c: 0710 lsls r0, r2, #28 8007f5e: 460c mov r4, r1 8007f60: d45a bmi.n 8008018 <__sflush_r+0xc4> 8007f62: 684b ldr r3, [r1, #4] 8007f64: 2b00 cmp r3, #0 8007f66: dc05 bgt.n 8007f74 <__sflush_r+0x20> 8007f68: 6c0b ldr r3, [r1, #64] ; 0x40 8007f6a: 2b00 cmp r3, #0 8007f6c: dc02 bgt.n 8007f74 <__sflush_r+0x20> 8007f6e: 2000 movs r0, #0 8007f70: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8007f74: 6ae6 ldr r6, [r4, #44] ; 0x2c 8007f76: 2e00 cmp r6, #0 8007f78: d0f9 beq.n 8007f6e <__sflush_r+0x1a> 8007f7a: 2300 movs r3, #0 8007f7c: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8007f80: 682f ldr r7, [r5, #0] 8007f82: 602b str r3, [r5, #0] 8007f84: d033 beq.n 8007fee <__sflush_r+0x9a> 8007f86: 6d60 ldr r0, [r4, #84] ; 0x54 8007f88: 89a3 ldrh r3, [r4, #12] 8007f8a: 075a lsls r2, r3, #29 8007f8c: d505 bpl.n 8007f9a <__sflush_r+0x46> 8007f8e: 6863 ldr r3, [r4, #4] 8007f90: 1ac0 subs r0, r0, r3 8007f92: 6b63 ldr r3, [r4, #52] ; 0x34 8007f94: b10b cbz r3, 8007f9a <__sflush_r+0x46> 8007f96: 6c23 ldr r3, [r4, #64] ; 0x40 8007f98: 1ac0 subs r0, r0, r3 8007f9a: 2300 movs r3, #0 8007f9c: 4602 mov r2, r0 8007f9e: 6ae6 ldr r6, [r4, #44] ; 0x2c 8007fa0: 6a21 ldr r1, [r4, #32] 8007fa2: 4628 mov r0, r5 8007fa4: 47b0 blx r6 8007fa6: 1c43 adds r3, r0, #1 8007fa8: 89a3 ldrh r3, [r4, #12] 8007faa: d106 bne.n 8007fba <__sflush_r+0x66> 8007fac: 6829 ldr r1, [r5, #0] 8007fae: 291d cmp r1, #29 8007fb0: d84b bhi.n 800804a <__sflush_r+0xf6> 8007fb2: 4a2b ldr r2, [pc, #172] ; (8008060 <__sflush_r+0x10c>) 8007fb4: 40ca lsrs r2, r1 8007fb6: 07d6 lsls r6, r2, #31 8007fb8: d547 bpl.n 800804a <__sflush_r+0xf6> 8007fba: 2200 movs r2, #0 8007fbc: 6062 str r2, [r4, #4] 8007fbe: 6922 ldr r2, [r4, #16] 8007fc0: 04d9 lsls r1, r3, #19 8007fc2: 6022 str r2, [r4, #0] 8007fc4: d504 bpl.n 8007fd0 <__sflush_r+0x7c> 8007fc6: 1c42 adds r2, r0, #1 8007fc8: d101 bne.n 8007fce <__sflush_r+0x7a> 8007fca: 682b ldr r3, [r5, #0] 8007fcc: b903 cbnz r3, 8007fd0 <__sflush_r+0x7c> 8007fce: 6560 str r0, [r4, #84] ; 0x54 8007fd0: 6b61 ldr r1, [r4, #52] ; 0x34 8007fd2: 602f str r7, [r5, #0] 8007fd4: 2900 cmp r1, #0 8007fd6: d0ca beq.n 8007f6e <__sflush_r+0x1a> 8007fd8: f104 0344 add.w r3, r4, #68 ; 0x44 8007fdc: 4299 cmp r1, r3 8007fde: d002 beq.n 8007fe6 <__sflush_r+0x92> 8007fe0: 4628 mov r0, r5 8007fe2: f000 f99f bl 8008324 <_free_r> 8007fe6: 2000 movs r0, #0 8007fe8: 6360 str r0, [r4, #52] ; 0x34 8007fea: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8007fee: 6a21 ldr r1, [r4, #32] 8007ff0: 2301 movs r3, #1 8007ff2: 4628 mov r0, r5 8007ff4: 47b0 blx r6 8007ff6: 1c41 adds r1, r0, #1 8007ff8: d1c6 bne.n 8007f88 <__sflush_r+0x34> 8007ffa: 682b ldr r3, [r5, #0] 8007ffc: 2b00 cmp r3, #0 8007ffe: d0c3 beq.n 8007f88 <__sflush_r+0x34> 8008000: 2b1d cmp r3, #29 8008002: d001 beq.n 8008008 <__sflush_r+0xb4> 8008004: 2b16 cmp r3, #22 8008006: d101 bne.n 800800c <__sflush_r+0xb8> 8008008: 602f str r7, [r5, #0] 800800a: e7b0 b.n 8007f6e <__sflush_r+0x1a> 800800c: 89a3 ldrh r3, [r4, #12] 800800e: f043 0340 orr.w r3, r3, #64 ; 0x40 8008012: 81a3 strh r3, [r4, #12] 8008014: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8008018: 690f ldr r7, [r1, #16] 800801a: 2f00 cmp r7, #0 800801c: d0a7 beq.n 8007f6e <__sflush_r+0x1a> 800801e: 0793 lsls r3, r2, #30 8008020: bf18 it ne 8008022: 2300 movne r3, #0 8008024: 680e ldr r6, [r1, #0] 8008026: bf08 it eq 8008028: 694b ldreq r3, [r1, #20] 800802a: eba6 0807 sub.w r8, r6, r7 800802e: 600f str r7, [r1, #0] 8008030: 608b str r3, [r1, #8] 8008032: f1b8 0f00 cmp.w r8, #0 8008036: dd9a ble.n 8007f6e <__sflush_r+0x1a> 8008038: 4643 mov r3, r8 800803a: 463a mov r2, r7 800803c: 6a21 ldr r1, [r4, #32] 800803e: 4628 mov r0, r5 8008040: 6aa6 ldr r6, [r4, #40] ; 0x28 8008042: 47b0 blx r6 8008044: 2800 cmp r0, #0 8008046: dc07 bgt.n 8008058 <__sflush_r+0x104> 8008048: 89a3 ldrh r3, [r4, #12] 800804a: f043 0340 orr.w r3, r3, #64 ; 0x40 800804e: 81a3 strh r3, [r4, #12] 8008050: f04f 30ff mov.w r0, #4294967295 8008054: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8008058: 4407 add r7, r0 800805a: eba8 0800 sub.w r8, r8, r0 800805e: e7e8 b.n 8008032 <__sflush_r+0xde> 8008060: 20400001 .word 0x20400001 08008064 <_fflush_r>: 8008064: b538 push {r3, r4, r5, lr} 8008066: 690b ldr r3, [r1, #16] 8008068: 4605 mov r5, r0 800806a: 460c mov r4, r1 800806c: b1db cbz r3, 80080a6 <_fflush_r+0x42> 800806e: b118 cbz r0, 8008078 <_fflush_r+0x14> 8008070: 6983 ldr r3, [r0, #24] 8008072: b90b cbnz r3, 8008078 <_fflush_r+0x14> 8008074: f000 f860 bl 8008138 <__sinit> 8008078: 4b0c ldr r3, [pc, #48] ; (80080ac <_fflush_r+0x48>) 800807a: 429c cmp r4, r3 800807c: d109 bne.n 8008092 <_fflush_r+0x2e> 800807e: 686c ldr r4, [r5, #4] 8008080: f9b4 300c ldrsh.w r3, [r4, #12] 8008084: b17b cbz r3, 80080a6 <_fflush_r+0x42> 8008086: 4621 mov r1, r4 8008088: 4628 mov r0, r5 800808a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800808e: f7ff bf61 b.w 8007f54 <__sflush_r> 8008092: 4b07 ldr r3, [pc, #28] ; (80080b0 <_fflush_r+0x4c>) 8008094: 429c cmp r4, r3 8008096: d101 bne.n 800809c <_fflush_r+0x38> 8008098: 68ac ldr r4, [r5, #8] 800809a: e7f1 b.n 8008080 <_fflush_r+0x1c> 800809c: 4b05 ldr r3, [pc, #20] ; (80080b4 <_fflush_r+0x50>) 800809e: 429c cmp r4, r3 80080a0: bf08 it eq 80080a2: 68ec ldreq r4, [r5, #12] 80080a4: e7ec b.n 8008080 <_fflush_r+0x1c> 80080a6: 2000 movs r0, #0 80080a8: bd38 pop {r3, r4, r5, pc} 80080aa: bf00 nop 80080ac: 08008f10 .word 0x08008f10 80080b0: 08008f30 .word 0x08008f30 80080b4: 08008ef0 .word 0x08008ef0 080080b8 <_cleanup_r>: 80080b8: 4901 ldr r1, [pc, #4] ; (80080c0 <_cleanup_r+0x8>) 80080ba: f000 b8a9 b.w 8008210 <_fwalk_reent> 80080be: bf00 nop 80080c0: 08008065 .word 0x08008065 080080c4 : 80080c4: 2300 movs r3, #0 80080c6: b510 push {r4, lr} 80080c8: 4604 mov r4, r0 80080ca: 6003 str r3, [r0, #0] 80080cc: 6043 str r3, [r0, #4] 80080ce: 6083 str r3, [r0, #8] 80080d0: 8181 strh r1, [r0, #12] 80080d2: 6643 str r3, [r0, #100] ; 0x64 80080d4: 81c2 strh r2, [r0, #14] 80080d6: 6103 str r3, [r0, #16] 80080d8: 6143 str r3, [r0, #20] 80080da: 6183 str r3, [r0, #24] 80080dc: 4619 mov r1, r3 80080de: 2208 movs r2, #8 80080e0: 305c adds r0, #92 ; 0x5c 80080e2: f7ff fd28 bl 8007b36 80080e6: 4b05 ldr r3, [pc, #20] ; (80080fc ) 80080e8: 6224 str r4, [r4, #32] 80080ea: 6263 str r3, [r4, #36] ; 0x24 80080ec: 4b04 ldr r3, [pc, #16] ; (8008100 ) 80080ee: 62a3 str r3, [r4, #40] ; 0x28 80080f0: 4b04 ldr r3, [pc, #16] ; (8008104 ) 80080f2: 62e3 str r3, [r4, #44] ; 0x2c 80080f4: 4b04 ldr r3, [pc, #16] ; (8008108 ) 80080f6: 6323 str r3, [r4, #48] ; 0x30 80080f8: bd10 pop {r4, pc} 80080fa: bf00 nop 80080fc: 08008ab1 .word 0x08008ab1 8008100: 08008ad3 .word 0x08008ad3 8008104: 08008b0b .word 0x08008b0b 8008108: 08008b2f .word 0x08008b2f 0800810c <__sfmoreglue>: 800810c: b570 push {r4, r5, r6, lr} 800810e: 2568 movs r5, #104 ; 0x68 8008110: 1e4a subs r2, r1, #1 8008112: 4355 muls r5, r2 8008114: 460e mov r6, r1 8008116: f105 0174 add.w r1, r5, #116 ; 0x74 800811a: f000 f94f bl 80083bc <_malloc_r> 800811e: 4604 mov r4, r0 8008120: b140 cbz r0, 8008134 <__sfmoreglue+0x28> 8008122: 2100 movs r1, #0 8008124: e880 0042 stmia.w r0, {r1, r6} 8008128: 300c adds r0, #12 800812a: 60a0 str r0, [r4, #8] 800812c: f105 0268 add.w r2, r5, #104 ; 0x68 8008130: f7ff fd01 bl 8007b36 8008134: 4620 mov r0, r4 8008136: bd70 pop {r4, r5, r6, pc} 08008138 <__sinit>: 8008138: 6983 ldr r3, [r0, #24] 800813a: b510 push {r4, lr} 800813c: 4604 mov r4, r0 800813e: bb33 cbnz r3, 800818e <__sinit+0x56> 8008140: 6483 str r3, [r0, #72] ; 0x48 8008142: 64c3 str r3, [r0, #76] ; 0x4c 8008144: 6503 str r3, [r0, #80] ; 0x50 8008146: 4b12 ldr r3, [pc, #72] ; (8008190 <__sinit+0x58>) 8008148: 4a12 ldr r2, [pc, #72] ; (8008194 <__sinit+0x5c>) 800814a: 681b ldr r3, [r3, #0] 800814c: 6282 str r2, [r0, #40] ; 0x28 800814e: 4298 cmp r0, r3 8008150: bf04 itt eq 8008152: 2301 moveq r3, #1 8008154: 6183 streq r3, [r0, #24] 8008156: f000 f81f bl 8008198 <__sfp> 800815a: 6060 str r0, [r4, #4] 800815c: 4620 mov r0, r4 800815e: f000 f81b bl 8008198 <__sfp> 8008162: 60a0 str r0, [r4, #8] 8008164: 4620 mov r0, r4 8008166: f000 f817 bl 8008198 <__sfp> 800816a: 2200 movs r2, #0 800816c: 60e0 str r0, [r4, #12] 800816e: 2104 movs r1, #4 8008170: 6860 ldr r0, [r4, #4] 8008172: f7ff ffa7 bl 80080c4 8008176: 2201 movs r2, #1 8008178: 2109 movs r1, #9 800817a: 68a0 ldr r0, [r4, #8] 800817c: f7ff ffa2 bl 80080c4 8008180: 2202 movs r2, #2 8008182: 2112 movs r1, #18 8008184: 68e0 ldr r0, [r4, #12] 8008186: f7ff ff9d bl 80080c4 800818a: 2301 movs r3, #1 800818c: 61a3 str r3, [r4, #24] 800818e: bd10 pop {r4, pc} 8008190: 08008eec .word 0x08008eec 8008194: 080080b9 .word 0x080080b9 08008198 <__sfp>: 8008198: b5f8 push {r3, r4, r5, r6, r7, lr} 800819a: 4b1c ldr r3, [pc, #112] ; (800820c <__sfp+0x74>) 800819c: 4607 mov r7, r0 800819e: 681e ldr r6, [r3, #0] 80081a0: 69b3 ldr r3, [r6, #24] 80081a2: b913 cbnz r3, 80081aa <__sfp+0x12> 80081a4: 4630 mov r0, r6 80081a6: f7ff ffc7 bl 8008138 <__sinit> 80081aa: 3648 adds r6, #72 ; 0x48 80081ac: 68b4 ldr r4, [r6, #8] 80081ae: 6873 ldr r3, [r6, #4] 80081b0: 3b01 subs r3, #1 80081b2: d503 bpl.n 80081bc <__sfp+0x24> 80081b4: 6833 ldr r3, [r6, #0] 80081b6: b133 cbz r3, 80081c6 <__sfp+0x2e> 80081b8: 6836 ldr r6, [r6, #0] 80081ba: e7f7 b.n 80081ac <__sfp+0x14> 80081bc: f9b4 500c ldrsh.w r5, [r4, #12] 80081c0: b16d cbz r5, 80081de <__sfp+0x46> 80081c2: 3468 adds r4, #104 ; 0x68 80081c4: e7f4 b.n 80081b0 <__sfp+0x18> 80081c6: 2104 movs r1, #4 80081c8: 4638 mov r0, r7 80081ca: f7ff ff9f bl 800810c <__sfmoreglue> 80081ce: 6030 str r0, [r6, #0] 80081d0: 2800 cmp r0, #0 80081d2: d1f1 bne.n 80081b8 <__sfp+0x20> 80081d4: 230c movs r3, #12 80081d6: 4604 mov r4, r0 80081d8: 603b str r3, [r7, #0] 80081da: 4620 mov r0, r4 80081dc: bdf8 pop {r3, r4, r5, r6, r7, pc} 80081de: f64f 73ff movw r3, #65535 ; 0xffff 80081e2: 81e3 strh r3, [r4, #14] 80081e4: 2301 movs r3, #1 80081e6: 6665 str r5, [r4, #100] ; 0x64 80081e8: 81a3 strh r3, [r4, #12] 80081ea: 6025 str r5, [r4, #0] 80081ec: 60a5 str r5, [r4, #8] 80081ee: 6065 str r5, [r4, #4] 80081f0: 6125 str r5, [r4, #16] 80081f2: 6165 str r5, [r4, #20] 80081f4: 61a5 str r5, [r4, #24] 80081f6: 2208 movs r2, #8 80081f8: 4629 mov r1, r5 80081fa: f104 005c add.w r0, r4, #92 ; 0x5c 80081fe: f7ff fc9a bl 8007b36 8008202: 6365 str r5, [r4, #52] ; 0x34 8008204: 63a5 str r5, [r4, #56] ; 0x38 8008206: 64a5 str r5, [r4, #72] ; 0x48 8008208: 64e5 str r5, [r4, #76] ; 0x4c 800820a: e7e6 b.n 80081da <__sfp+0x42> 800820c: 08008eec .word 0x08008eec 08008210 <_fwalk_reent>: 8008210: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8008214: 4680 mov r8, r0 8008216: 4689 mov r9, r1 8008218: 2600 movs r6, #0 800821a: f100 0448 add.w r4, r0, #72 ; 0x48 800821e: b914 cbnz r4, 8008226 <_fwalk_reent+0x16> 8008220: 4630 mov r0, r6 8008222: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8008226: 68a5 ldr r5, [r4, #8] 8008228: 6867 ldr r7, [r4, #4] 800822a: 3f01 subs r7, #1 800822c: d501 bpl.n 8008232 <_fwalk_reent+0x22> 800822e: 6824 ldr r4, [r4, #0] 8008230: e7f5 b.n 800821e <_fwalk_reent+0xe> 8008232: 89ab ldrh r3, [r5, #12] 8008234: 2b01 cmp r3, #1 8008236: d907 bls.n 8008248 <_fwalk_reent+0x38> 8008238: f9b5 300e ldrsh.w r3, [r5, #14] 800823c: 3301 adds r3, #1 800823e: d003 beq.n 8008248 <_fwalk_reent+0x38> 8008240: 4629 mov r1, r5 8008242: 4640 mov r0, r8 8008244: 47c8 blx r9 8008246: 4306 orrs r6, r0 8008248: 3568 adds r5, #104 ; 0x68 800824a: e7ee b.n 800822a <_fwalk_reent+0x1a> 0800824c <__swhatbuf_r>: 800824c: b570 push {r4, r5, r6, lr} 800824e: 460e mov r6, r1 8008250: f9b1 100e ldrsh.w r1, [r1, #14] 8008254: b090 sub sp, #64 ; 0x40 8008256: 2900 cmp r1, #0 8008258: 4614 mov r4, r2 800825a: 461d mov r5, r3 800825c: da07 bge.n 800826e <__swhatbuf_r+0x22> 800825e: 2300 movs r3, #0 8008260: 602b str r3, [r5, #0] 8008262: 89b3 ldrh r3, [r6, #12] 8008264: 061a lsls r2, r3, #24 8008266: d410 bmi.n 800828a <__swhatbuf_r+0x3e> 8008268: f44f 6380 mov.w r3, #1024 ; 0x400 800826c: e00e b.n 800828c <__swhatbuf_r+0x40> 800826e: aa01 add r2, sp, #4 8008270: f000 fc84 bl 8008b7c <_fstat_r> 8008274: 2800 cmp r0, #0 8008276: dbf2 blt.n 800825e <__swhatbuf_r+0x12> 8008278: 9a02 ldr r2, [sp, #8] 800827a: f402 4270 and.w r2, r2, #61440 ; 0xf000 800827e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8008282: 425a negs r2, r3 8008284: 415a adcs r2, r3 8008286: 602a str r2, [r5, #0] 8008288: e7ee b.n 8008268 <__swhatbuf_r+0x1c> 800828a: 2340 movs r3, #64 ; 0x40 800828c: 2000 movs r0, #0 800828e: 6023 str r3, [r4, #0] 8008290: b010 add sp, #64 ; 0x40 8008292: bd70 pop {r4, r5, r6, pc} 08008294 <__smakebuf_r>: 8008294: 898b ldrh r3, [r1, #12] 8008296: b573 push {r0, r1, r4, r5, r6, lr} 8008298: 079d lsls r5, r3, #30 800829a: 4606 mov r6, r0 800829c: 460c mov r4, r1 800829e: d507 bpl.n 80082b0 <__smakebuf_r+0x1c> 80082a0: f104 0347 add.w r3, r4, #71 ; 0x47 80082a4: 6023 str r3, [r4, #0] 80082a6: 6123 str r3, [r4, #16] 80082a8: 2301 movs r3, #1 80082aa: 6163 str r3, [r4, #20] 80082ac: b002 add sp, #8 80082ae: bd70 pop {r4, r5, r6, pc} 80082b0: ab01 add r3, sp, #4 80082b2: 466a mov r2, sp 80082b4: f7ff ffca bl 800824c <__swhatbuf_r> 80082b8: 9900 ldr r1, [sp, #0] 80082ba: 4605 mov r5, r0 80082bc: 4630 mov r0, r6 80082be: f000 f87d bl 80083bc <_malloc_r> 80082c2: b948 cbnz r0, 80082d8 <__smakebuf_r+0x44> 80082c4: f9b4 300c ldrsh.w r3, [r4, #12] 80082c8: 059a lsls r2, r3, #22 80082ca: d4ef bmi.n 80082ac <__smakebuf_r+0x18> 80082cc: f023 0303 bic.w r3, r3, #3 80082d0: f043 0302 orr.w r3, r3, #2 80082d4: 81a3 strh r3, [r4, #12] 80082d6: e7e3 b.n 80082a0 <__smakebuf_r+0xc> 80082d8: 4b0d ldr r3, [pc, #52] ; (8008310 <__smakebuf_r+0x7c>) 80082da: 62b3 str r3, [r6, #40] ; 0x28 80082dc: 89a3 ldrh r3, [r4, #12] 80082de: 6020 str r0, [r4, #0] 80082e0: f043 0380 orr.w r3, r3, #128 ; 0x80 80082e4: 81a3 strh r3, [r4, #12] 80082e6: 9b00 ldr r3, [sp, #0] 80082e8: 6120 str r0, [r4, #16] 80082ea: 6163 str r3, [r4, #20] 80082ec: 9b01 ldr r3, [sp, #4] 80082ee: b15b cbz r3, 8008308 <__smakebuf_r+0x74> 80082f0: f9b4 100e ldrsh.w r1, [r4, #14] 80082f4: 4630 mov r0, r6 80082f6: f000 fc53 bl 8008ba0 <_isatty_r> 80082fa: b128 cbz r0, 8008308 <__smakebuf_r+0x74> 80082fc: 89a3 ldrh r3, [r4, #12] 80082fe: f023 0303 bic.w r3, r3, #3 8008302: f043 0301 orr.w r3, r3, #1 8008306: 81a3 strh r3, [r4, #12] 8008308: 89a3 ldrh r3, [r4, #12] 800830a: 431d orrs r5, r3 800830c: 81a5 strh r5, [r4, #12] 800830e: e7cd b.n 80082ac <__smakebuf_r+0x18> 8008310: 080080b9 .word 0x080080b9 08008314 : 8008314: 4b02 ldr r3, [pc, #8] ; (8008320 ) 8008316: 4601 mov r1, r0 8008318: 6818 ldr r0, [r3, #0] 800831a: f000 b84f b.w 80083bc <_malloc_r> 800831e: bf00 nop 8008320: 20000010 .word 0x20000010 08008324 <_free_r>: 8008324: b538 push {r3, r4, r5, lr} 8008326: 4605 mov r5, r0 8008328: 2900 cmp r1, #0 800832a: d043 beq.n 80083b4 <_free_r+0x90> 800832c: f851 3c04 ldr.w r3, [r1, #-4] 8008330: 1f0c subs r4, r1, #4 8008332: 2b00 cmp r3, #0 8008334: bfb8 it lt 8008336: 18e4 addlt r4, r4, r3 8008338: f000 fc62 bl 8008c00 <__malloc_lock> 800833c: 4a1e ldr r2, [pc, #120] ; (80083b8 <_free_r+0x94>) 800833e: 6813 ldr r3, [r2, #0] 8008340: 4610 mov r0, r2 8008342: b933 cbnz r3, 8008352 <_free_r+0x2e> 8008344: 6063 str r3, [r4, #4] 8008346: 6014 str r4, [r2, #0] 8008348: 4628 mov r0, r5 800834a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800834e: f000 bc58 b.w 8008c02 <__malloc_unlock> 8008352: 42a3 cmp r3, r4 8008354: d90b bls.n 800836e <_free_r+0x4a> 8008356: 6821 ldr r1, [r4, #0] 8008358: 1862 adds r2, r4, r1 800835a: 4293 cmp r3, r2 800835c: bf01 itttt eq 800835e: 681a ldreq r2, [r3, #0] 8008360: 685b ldreq r3, [r3, #4] 8008362: 1852 addeq r2, r2, r1 8008364: 6022 streq r2, [r4, #0] 8008366: 6063 str r3, [r4, #4] 8008368: 6004 str r4, [r0, #0] 800836a: e7ed b.n 8008348 <_free_r+0x24> 800836c: 4613 mov r3, r2 800836e: 685a ldr r2, [r3, #4] 8008370: b10a cbz r2, 8008376 <_free_r+0x52> 8008372: 42a2 cmp r2, r4 8008374: d9fa bls.n 800836c <_free_r+0x48> 8008376: 6819 ldr r1, [r3, #0] 8008378: 1858 adds r0, r3, r1 800837a: 42a0 cmp r0, r4 800837c: d10b bne.n 8008396 <_free_r+0x72> 800837e: 6820 ldr r0, [r4, #0] 8008380: 4401 add r1, r0 8008382: 1858 adds r0, r3, r1 8008384: 4282 cmp r2, r0 8008386: 6019 str r1, [r3, #0] 8008388: d1de bne.n 8008348 <_free_r+0x24> 800838a: 6810 ldr r0, [r2, #0] 800838c: 6852 ldr r2, [r2, #4] 800838e: 4401 add r1, r0 8008390: 6019 str r1, [r3, #0] 8008392: 605a str r2, [r3, #4] 8008394: e7d8 b.n 8008348 <_free_r+0x24> 8008396: d902 bls.n 800839e <_free_r+0x7a> 8008398: 230c movs r3, #12 800839a: 602b str r3, [r5, #0] 800839c: e7d4 b.n 8008348 <_free_r+0x24> 800839e: 6820 ldr r0, [r4, #0] 80083a0: 1821 adds r1, r4, r0 80083a2: 428a cmp r2, r1 80083a4: bf01 itttt eq 80083a6: 6811 ldreq r1, [r2, #0] 80083a8: 6852 ldreq r2, [r2, #4] 80083aa: 1809 addeq r1, r1, r0 80083ac: 6021 streq r1, [r4, #0] 80083ae: 6062 str r2, [r4, #4] 80083b0: 605c str r4, [r3, #4] 80083b2: e7c9 b.n 8008348 <_free_r+0x24> 80083b4: bd38 pop {r3, r4, r5, pc} 80083b6: bf00 nop 80083b8: 20000420 .word 0x20000420 080083bc <_malloc_r>: 80083bc: b570 push {r4, r5, r6, lr} 80083be: 1ccd adds r5, r1, #3 80083c0: f025 0503 bic.w r5, r5, #3 80083c4: 3508 adds r5, #8 80083c6: 2d0c cmp r5, #12 80083c8: bf38 it cc 80083ca: 250c movcc r5, #12 80083cc: 2d00 cmp r5, #0 80083ce: 4606 mov r6, r0 80083d0: db01 blt.n 80083d6 <_malloc_r+0x1a> 80083d2: 42a9 cmp r1, r5 80083d4: d903 bls.n 80083de <_malloc_r+0x22> 80083d6: 230c movs r3, #12 80083d8: 6033 str r3, [r6, #0] 80083da: 2000 movs r0, #0 80083dc: bd70 pop {r4, r5, r6, pc} 80083de: f000 fc0f bl 8008c00 <__malloc_lock> 80083e2: 4a23 ldr r2, [pc, #140] ; (8008470 <_malloc_r+0xb4>) 80083e4: 6814 ldr r4, [r2, #0] 80083e6: 4621 mov r1, r4 80083e8: b991 cbnz r1, 8008410 <_malloc_r+0x54> 80083ea: 4c22 ldr r4, [pc, #136] ; (8008474 <_malloc_r+0xb8>) 80083ec: 6823 ldr r3, [r4, #0] 80083ee: b91b cbnz r3, 80083f8 <_malloc_r+0x3c> 80083f0: 4630 mov r0, r6 80083f2: f000 fb4d bl 8008a90 <_sbrk_r> 80083f6: 6020 str r0, [r4, #0] 80083f8: 4629 mov r1, r5 80083fa: 4630 mov r0, r6 80083fc: f000 fb48 bl 8008a90 <_sbrk_r> 8008400: 1c43 adds r3, r0, #1 8008402: d126 bne.n 8008452 <_malloc_r+0x96> 8008404: 230c movs r3, #12 8008406: 4630 mov r0, r6 8008408: 6033 str r3, [r6, #0] 800840a: f000 fbfa bl 8008c02 <__malloc_unlock> 800840e: e7e4 b.n 80083da <_malloc_r+0x1e> 8008410: 680b ldr r3, [r1, #0] 8008412: 1b5b subs r3, r3, r5 8008414: d41a bmi.n 800844c <_malloc_r+0x90> 8008416: 2b0b cmp r3, #11 8008418: d90f bls.n 800843a <_malloc_r+0x7e> 800841a: 600b str r3, [r1, #0] 800841c: 18cc adds r4, r1, r3 800841e: 50cd str r5, [r1, r3] 8008420: 4630 mov r0, r6 8008422: f000 fbee bl 8008c02 <__malloc_unlock> 8008426: f104 000b add.w r0, r4, #11 800842a: 1d23 adds r3, r4, #4 800842c: f020 0007 bic.w r0, r0, #7 8008430: 1ac3 subs r3, r0, r3 8008432: d01b beq.n 800846c <_malloc_r+0xb0> 8008434: 425a negs r2, r3 8008436: 50e2 str r2, [r4, r3] 8008438: bd70 pop {r4, r5, r6, pc} 800843a: 428c cmp r4, r1 800843c: bf0b itete eq 800843e: 6863 ldreq r3, [r4, #4] 8008440: 684b ldrne r3, [r1, #4] 8008442: 6013 streq r3, [r2, #0] 8008444: 6063 strne r3, [r4, #4] 8008446: bf18 it ne 8008448: 460c movne r4, r1 800844a: e7e9 b.n 8008420 <_malloc_r+0x64> 800844c: 460c mov r4, r1 800844e: 6849 ldr r1, [r1, #4] 8008450: e7ca b.n 80083e8 <_malloc_r+0x2c> 8008452: 1cc4 adds r4, r0, #3 8008454: f024 0403 bic.w r4, r4, #3 8008458: 42a0 cmp r0, r4 800845a: d005 beq.n 8008468 <_malloc_r+0xac> 800845c: 1a21 subs r1, r4, r0 800845e: 4630 mov r0, r6 8008460: f000 fb16 bl 8008a90 <_sbrk_r> 8008464: 3001 adds r0, #1 8008466: d0cd beq.n 8008404 <_malloc_r+0x48> 8008468: 6025 str r5, [r4, #0] 800846a: e7d9 b.n 8008420 <_malloc_r+0x64> 800846c: bd70 pop {r4, r5, r6, pc} 800846e: bf00 nop 8008470: 20000420 .word 0x20000420 8008474: 20000424 .word 0x20000424 08008478 <__sfputc_r>: 8008478: 6893 ldr r3, [r2, #8] 800847a: b410 push {r4} 800847c: 3b01 subs r3, #1 800847e: 2b00 cmp r3, #0 8008480: 6093 str r3, [r2, #8] 8008482: da08 bge.n 8008496 <__sfputc_r+0x1e> 8008484: 6994 ldr r4, [r2, #24] 8008486: 42a3 cmp r3, r4 8008488: db02 blt.n 8008490 <__sfputc_r+0x18> 800848a: b2cb uxtb r3, r1 800848c: 2b0a cmp r3, #10 800848e: d102 bne.n 8008496 <__sfputc_r+0x1e> 8008490: bc10 pop {r4} 8008492: f7ff bc9f b.w 8007dd4 <__swbuf_r> 8008496: 6813 ldr r3, [r2, #0] 8008498: 1c58 adds r0, r3, #1 800849a: 6010 str r0, [r2, #0] 800849c: 7019 strb r1, [r3, #0] 800849e: b2c8 uxtb r0, r1 80084a0: bc10 pop {r4} 80084a2: 4770 bx lr 080084a4 <__sfputs_r>: 80084a4: b5f8 push {r3, r4, r5, r6, r7, lr} 80084a6: 4606 mov r6, r0 80084a8: 460f mov r7, r1 80084aa: 4614 mov r4, r2 80084ac: 18d5 adds r5, r2, r3 80084ae: 42ac cmp r4, r5 80084b0: d101 bne.n 80084b6 <__sfputs_r+0x12> 80084b2: 2000 movs r0, #0 80084b4: e007 b.n 80084c6 <__sfputs_r+0x22> 80084b6: 463a mov r2, r7 80084b8: f814 1b01 ldrb.w r1, [r4], #1 80084bc: 4630 mov r0, r6 80084be: f7ff ffdb bl 8008478 <__sfputc_r> 80084c2: 1c43 adds r3, r0, #1 80084c4: d1f3 bne.n 80084ae <__sfputs_r+0xa> 80084c6: bdf8 pop {r3, r4, r5, r6, r7, pc} 080084c8 <_vfiprintf_r>: 80084c8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80084cc: b09d sub sp, #116 ; 0x74 80084ce: 460c mov r4, r1 80084d0: 4617 mov r7, r2 80084d2: 9303 str r3, [sp, #12] 80084d4: 4606 mov r6, r0 80084d6: b118 cbz r0, 80084e0 <_vfiprintf_r+0x18> 80084d8: 6983 ldr r3, [r0, #24] 80084da: b90b cbnz r3, 80084e0 <_vfiprintf_r+0x18> 80084dc: f7ff fe2c bl 8008138 <__sinit> 80084e0: 4b7c ldr r3, [pc, #496] ; (80086d4 <_vfiprintf_r+0x20c>) 80084e2: 429c cmp r4, r3 80084e4: d157 bne.n 8008596 <_vfiprintf_r+0xce> 80084e6: 6874 ldr r4, [r6, #4] 80084e8: 89a3 ldrh r3, [r4, #12] 80084ea: 0718 lsls r0, r3, #28 80084ec: d55d bpl.n 80085aa <_vfiprintf_r+0xe2> 80084ee: 6923 ldr r3, [r4, #16] 80084f0: 2b00 cmp r3, #0 80084f2: d05a beq.n 80085aa <_vfiprintf_r+0xe2> 80084f4: 2300 movs r3, #0 80084f6: 9309 str r3, [sp, #36] ; 0x24 80084f8: 2320 movs r3, #32 80084fa: f88d 3029 strb.w r3, [sp, #41] ; 0x29 80084fe: 2330 movs r3, #48 ; 0x30 8008500: f04f 0b01 mov.w fp, #1 8008504: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8008508: 46b8 mov r8, r7 800850a: 4645 mov r5, r8 800850c: f815 3b01 ldrb.w r3, [r5], #1 8008510: 2b00 cmp r3, #0 8008512: d155 bne.n 80085c0 <_vfiprintf_r+0xf8> 8008514: ebb8 0a07 subs.w sl, r8, r7 8008518: d00b beq.n 8008532 <_vfiprintf_r+0x6a> 800851a: 4653 mov r3, sl 800851c: 463a mov r2, r7 800851e: 4621 mov r1, r4 8008520: 4630 mov r0, r6 8008522: f7ff ffbf bl 80084a4 <__sfputs_r> 8008526: 3001 adds r0, #1 8008528: f000 80c4 beq.w 80086b4 <_vfiprintf_r+0x1ec> 800852c: 9b09 ldr r3, [sp, #36] ; 0x24 800852e: 4453 add r3, sl 8008530: 9309 str r3, [sp, #36] ; 0x24 8008532: f898 3000 ldrb.w r3, [r8] 8008536: 2b00 cmp r3, #0 8008538: f000 80bc beq.w 80086b4 <_vfiprintf_r+0x1ec> 800853c: 2300 movs r3, #0 800853e: f04f 32ff mov.w r2, #4294967295 8008542: 9304 str r3, [sp, #16] 8008544: 9307 str r3, [sp, #28] 8008546: 9205 str r2, [sp, #20] 8008548: 9306 str r3, [sp, #24] 800854a: f88d 3053 strb.w r3, [sp, #83] ; 0x53 800854e: 931a str r3, [sp, #104] ; 0x68 8008550: 2205 movs r2, #5 8008552: 7829 ldrb r1, [r5, #0] 8008554: 4860 ldr r0, [pc, #384] ; (80086d8 <_vfiprintf_r+0x210>) 8008556: f000 fb45 bl 8008be4 800855a: f105 0801 add.w r8, r5, #1 800855e: 9b04 ldr r3, [sp, #16] 8008560: 2800 cmp r0, #0 8008562: d131 bne.n 80085c8 <_vfiprintf_r+0x100> 8008564: 06d9 lsls r1, r3, #27 8008566: bf44 itt mi 8008568: 2220 movmi r2, #32 800856a: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800856e: 071a lsls r2, r3, #28 8008570: bf44 itt mi 8008572: 222b movmi r2, #43 ; 0x2b 8008574: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8008578: 782a ldrb r2, [r5, #0] 800857a: 2a2a cmp r2, #42 ; 0x2a 800857c: d02c beq.n 80085d8 <_vfiprintf_r+0x110> 800857e: 2100 movs r1, #0 8008580: 200a movs r0, #10 8008582: 9a07 ldr r2, [sp, #28] 8008584: 46a8 mov r8, r5 8008586: f898 3000 ldrb.w r3, [r8] 800858a: 3501 adds r5, #1 800858c: 3b30 subs r3, #48 ; 0x30 800858e: 2b09 cmp r3, #9 8008590: d96d bls.n 800866e <_vfiprintf_r+0x1a6> 8008592: b371 cbz r1, 80085f2 <_vfiprintf_r+0x12a> 8008594: e026 b.n 80085e4 <_vfiprintf_r+0x11c> 8008596: 4b51 ldr r3, [pc, #324] ; (80086dc <_vfiprintf_r+0x214>) 8008598: 429c cmp r4, r3 800859a: d101 bne.n 80085a0 <_vfiprintf_r+0xd8> 800859c: 68b4 ldr r4, [r6, #8] 800859e: e7a3 b.n 80084e8 <_vfiprintf_r+0x20> 80085a0: 4b4f ldr r3, [pc, #316] ; (80086e0 <_vfiprintf_r+0x218>) 80085a2: 429c cmp r4, r3 80085a4: bf08 it eq 80085a6: 68f4 ldreq r4, [r6, #12] 80085a8: e79e b.n 80084e8 <_vfiprintf_r+0x20> 80085aa: 4621 mov r1, r4 80085ac: 4630 mov r0, r6 80085ae: f7ff fc63 bl 8007e78 <__swsetup_r> 80085b2: 2800 cmp r0, #0 80085b4: d09e beq.n 80084f4 <_vfiprintf_r+0x2c> 80085b6: f04f 30ff mov.w r0, #4294967295 80085ba: b01d add sp, #116 ; 0x74 80085bc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80085c0: 2b25 cmp r3, #37 ; 0x25 80085c2: d0a7 beq.n 8008514 <_vfiprintf_r+0x4c> 80085c4: 46a8 mov r8, r5 80085c6: e7a0 b.n 800850a <_vfiprintf_r+0x42> 80085c8: 4a43 ldr r2, [pc, #268] ; (80086d8 <_vfiprintf_r+0x210>) 80085ca: 4645 mov r5, r8 80085cc: 1a80 subs r0, r0, r2 80085ce: fa0b f000 lsl.w r0, fp, r0 80085d2: 4318 orrs r0, r3 80085d4: 9004 str r0, [sp, #16] 80085d6: e7bb b.n 8008550 <_vfiprintf_r+0x88> 80085d8: 9a03 ldr r2, [sp, #12] 80085da: 1d11 adds r1, r2, #4 80085dc: 6812 ldr r2, [r2, #0] 80085de: 9103 str r1, [sp, #12] 80085e0: 2a00 cmp r2, #0 80085e2: db01 blt.n 80085e8 <_vfiprintf_r+0x120> 80085e4: 9207 str r2, [sp, #28] 80085e6: e004 b.n 80085f2 <_vfiprintf_r+0x12a> 80085e8: 4252 negs r2, r2 80085ea: f043 0302 orr.w r3, r3, #2 80085ee: 9207 str r2, [sp, #28] 80085f0: 9304 str r3, [sp, #16] 80085f2: f898 3000 ldrb.w r3, [r8] 80085f6: 2b2e cmp r3, #46 ; 0x2e 80085f8: d110 bne.n 800861c <_vfiprintf_r+0x154> 80085fa: f898 3001 ldrb.w r3, [r8, #1] 80085fe: f108 0101 add.w r1, r8, #1 8008602: 2b2a cmp r3, #42 ; 0x2a 8008604: d137 bne.n 8008676 <_vfiprintf_r+0x1ae> 8008606: 9b03 ldr r3, [sp, #12] 8008608: f108 0802 add.w r8, r8, #2 800860c: 1d1a adds r2, r3, #4 800860e: 681b ldr r3, [r3, #0] 8008610: 9203 str r2, [sp, #12] 8008612: 2b00 cmp r3, #0 8008614: bfb8 it lt 8008616: f04f 33ff movlt.w r3, #4294967295 800861a: 9305 str r3, [sp, #20] 800861c: 4d31 ldr r5, [pc, #196] ; (80086e4 <_vfiprintf_r+0x21c>) 800861e: 2203 movs r2, #3 8008620: f898 1000 ldrb.w r1, [r8] 8008624: 4628 mov r0, r5 8008626: f000 fadd bl 8008be4 800862a: b140 cbz r0, 800863e <_vfiprintf_r+0x176> 800862c: 2340 movs r3, #64 ; 0x40 800862e: 1b40 subs r0, r0, r5 8008630: fa03 f000 lsl.w r0, r3, r0 8008634: 9b04 ldr r3, [sp, #16] 8008636: f108 0801 add.w r8, r8, #1 800863a: 4303 orrs r3, r0 800863c: 9304 str r3, [sp, #16] 800863e: f898 1000 ldrb.w r1, [r8] 8008642: 2206 movs r2, #6 8008644: 4828 ldr r0, [pc, #160] ; (80086e8 <_vfiprintf_r+0x220>) 8008646: f108 0701 add.w r7, r8, #1 800864a: f88d 1028 strb.w r1, [sp, #40] ; 0x28 800864e: f000 fac9 bl 8008be4 8008652: 2800 cmp r0, #0 8008654: d034 beq.n 80086c0 <_vfiprintf_r+0x1f8> 8008656: 4b25 ldr r3, [pc, #148] ; (80086ec <_vfiprintf_r+0x224>) 8008658: bb03 cbnz r3, 800869c <_vfiprintf_r+0x1d4> 800865a: 9b03 ldr r3, [sp, #12] 800865c: 3307 adds r3, #7 800865e: f023 0307 bic.w r3, r3, #7 8008662: 3308 adds r3, #8 8008664: 9303 str r3, [sp, #12] 8008666: 9b09 ldr r3, [sp, #36] ; 0x24 8008668: 444b add r3, r9 800866a: 9309 str r3, [sp, #36] ; 0x24 800866c: e74c b.n 8008508 <_vfiprintf_r+0x40> 800866e: fb00 3202 mla r2, r0, r2, r3 8008672: 2101 movs r1, #1 8008674: e786 b.n 8008584 <_vfiprintf_r+0xbc> 8008676: 2300 movs r3, #0 8008678: 250a movs r5, #10 800867a: 4618 mov r0, r3 800867c: 9305 str r3, [sp, #20] 800867e: 4688 mov r8, r1 8008680: f898 2000 ldrb.w r2, [r8] 8008684: 3101 adds r1, #1 8008686: 3a30 subs r2, #48 ; 0x30 8008688: 2a09 cmp r2, #9 800868a: d903 bls.n 8008694 <_vfiprintf_r+0x1cc> 800868c: 2b00 cmp r3, #0 800868e: d0c5 beq.n 800861c <_vfiprintf_r+0x154> 8008690: 9005 str r0, [sp, #20] 8008692: e7c3 b.n 800861c <_vfiprintf_r+0x154> 8008694: fb05 2000 mla r0, r5, r0, r2 8008698: 2301 movs r3, #1 800869a: e7f0 b.n 800867e <_vfiprintf_r+0x1b6> 800869c: ab03 add r3, sp, #12 800869e: 9300 str r3, [sp, #0] 80086a0: 4622 mov r2, r4 80086a2: 4b13 ldr r3, [pc, #76] ; (80086f0 <_vfiprintf_r+0x228>) 80086a4: a904 add r1, sp, #16 80086a6: 4630 mov r0, r6 80086a8: f3af 8000 nop.w 80086ac: f1b0 3fff cmp.w r0, #4294967295 80086b0: 4681 mov r9, r0 80086b2: d1d8 bne.n 8008666 <_vfiprintf_r+0x19e> 80086b4: 89a3 ldrh r3, [r4, #12] 80086b6: 065b lsls r3, r3, #25 80086b8: f53f af7d bmi.w 80085b6 <_vfiprintf_r+0xee> 80086bc: 9809 ldr r0, [sp, #36] ; 0x24 80086be: e77c b.n 80085ba <_vfiprintf_r+0xf2> 80086c0: ab03 add r3, sp, #12 80086c2: 9300 str r3, [sp, #0] 80086c4: 4622 mov r2, r4 80086c6: 4b0a ldr r3, [pc, #40] ; (80086f0 <_vfiprintf_r+0x228>) 80086c8: a904 add r1, sp, #16 80086ca: 4630 mov r0, r6 80086cc: f000 f88a bl 80087e4 <_printf_i> 80086d0: e7ec b.n 80086ac <_vfiprintf_r+0x1e4> 80086d2: bf00 nop 80086d4: 08008f10 .word 0x08008f10 80086d8: 08008f50 .word 0x08008f50 80086dc: 08008f30 .word 0x08008f30 80086e0: 08008ef0 .word 0x08008ef0 80086e4: 08008f56 .word 0x08008f56 80086e8: 08008f5a .word 0x08008f5a 80086ec: 00000000 .word 0x00000000 80086f0: 080084a5 .word 0x080084a5 080086f4 <_printf_common>: 80086f4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80086f8: 4691 mov r9, r2 80086fa: 461f mov r7, r3 80086fc: 688a ldr r2, [r1, #8] 80086fe: 690b ldr r3, [r1, #16] 8008700: 4606 mov r6, r0 8008702: 4293 cmp r3, r2 8008704: bfb8 it lt 8008706: 4613 movlt r3, r2 8008708: f8c9 3000 str.w r3, [r9] 800870c: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8008710: 460c mov r4, r1 8008712: f8dd 8020 ldr.w r8, [sp, #32] 8008716: b112 cbz r2, 800871e <_printf_common+0x2a> 8008718: 3301 adds r3, #1 800871a: f8c9 3000 str.w r3, [r9] 800871e: 6823 ldr r3, [r4, #0] 8008720: 0699 lsls r1, r3, #26 8008722: bf42 ittt mi 8008724: f8d9 3000 ldrmi.w r3, [r9] 8008728: 3302 addmi r3, #2 800872a: f8c9 3000 strmi.w r3, [r9] 800872e: 6825 ldr r5, [r4, #0] 8008730: f015 0506 ands.w r5, r5, #6 8008734: d107 bne.n 8008746 <_printf_common+0x52> 8008736: f104 0a19 add.w sl, r4, #25 800873a: 68e3 ldr r3, [r4, #12] 800873c: f8d9 2000 ldr.w r2, [r9] 8008740: 1a9b subs r3, r3, r2 8008742: 429d cmp r5, r3 8008744: db2a blt.n 800879c <_printf_common+0xa8> 8008746: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 800874a: 6822 ldr r2, [r4, #0] 800874c: 3300 adds r3, #0 800874e: bf18 it ne 8008750: 2301 movne r3, #1 8008752: 0692 lsls r2, r2, #26 8008754: d42f bmi.n 80087b6 <_printf_common+0xc2> 8008756: f104 0243 add.w r2, r4, #67 ; 0x43 800875a: 4639 mov r1, r7 800875c: 4630 mov r0, r6 800875e: 47c0 blx r8 8008760: 3001 adds r0, #1 8008762: d022 beq.n 80087aa <_printf_common+0xb6> 8008764: 6823 ldr r3, [r4, #0] 8008766: 68e5 ldr r5, [r4, #12] 8008768: f003 0306 and.w r3, r3, #6 800876c: 2b04 cmp r3, #4 800876e: bf18 it ne 8008770: 2500 movne r5, #0 8008772: f8d9 2000 ldr.w r2, [r9] 8008776: f04f 0900 mov.w r9, #0 800877a: bf08 it eq 800877c: 1aad subeq r5, r5, r2 800877e: 68a3 ldr r3, [r4, #8] 8008780: 6922 ldr r2, [r4, #16] 8008782: bf08 it eq 8008784: ea25 75e5 biceq.w r5, r5, r5, asr #31 8008788: 4293 cmp r3, r2 800878a: bfc4 itt gt 800878c: 1a9b subgt r3, r3, r2 800878e: 18ed addgt r5, r5, r3 8008790: 341a adds r4, #26 8008792: 454d cmp r5, r9 8008794: d11b bne.n 80087ce <_printf_common+0xda> 8008796: 2000 movs r0, #0 8008798: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800879c: 2301 movs r3, #1 800879e: 4652 mov r2, sl 80087a0: 4639 mov r1, r7 80087a2: 4630 mov r0, r6 80087a4: 47c0 blx r8 80087a6: 3001 adds r0, #1 80087a8: d103 bne.n 80087b2 <_printf_common+0xbe> 80087aa: f04f 30ff mov.w r0, #4294967295 80087ae: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80087b2: 3501 adds r5, #1 80087b4: e7c1 b.n 800873a <_printf_common+0x46> 80087b6: 2030 movs r0, #48 ; 0x30 80087b8: 18e1 adds r1, r4, r3 80087ba: f881 0043 strb.w r0, [r1, #67] ; 0x43 80087be: 1c5a adds r2, r3, #1 80087c0: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 80087c4: 4422 add r2, r4 80087c6: 3302 adds r3, #2 80087c8: f882 1043 strb.w r1, [r2, #67] ; 0x43 80087cc: e7c3 b.n 8008756 <_printf_common+0x62> 80087ce: 2301 movs r3, #1 80087d0: 4622 mov r2, r4 80087d2: 4639 mov r1, r7 80087d4: 4630 mov r0, r6 80087d6: 47c0 blx r8 80087d8: 3001 adds r0, #1 80087da: d0e6 beq.n 80087aa <_printf_common+0xb6> 80087dc: f109 0901 add.w r9, r9, #1 80087e0: e7d7 b.n 8008792 <_printf_common+0x9e> ... 080087e4 <_printf_i>: 80087e4: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 80087e8: 4617 mov r7, r2 80087ea: 7e0a ldrb r2, [r1, #24] 80087ec: b085 sub sp, #20 80087ee: 2a6e cmp r2, #110 ; 0x6e 80087f0: 4698 mov r8, r3 80087f2: 4606 mov r6, r0 80087f4: 460c mov r4, r1 80087f6: 9b0c ldr r3, [sp, #48] ; 0x30 80087f8: f101 0e43 add.w lr, r1, #67 ; 0x43 80087fc: f000 80bc beq.w 8008978 <_printf_i+0x194> 8008800: d81a bhi.n 8008838 <_printf_i+0x54> 8008802: 2a63 cmp r2, #99 ; 0x63 8008804: d02e beq.n 8008864 <_printf_i+0x80> 8008806: d80a bhi.n 800881e <_printf_i+0x3a> 8008808: 2a00 cmp r2, #0 800880a: f000 80c8 beq.w 800899e <_printf_i+0x1ba> 800880e: 2a58 cmp r2, #88 ; 0x58 8008810: f000 808a beq.w 8008928 <_printf_i+0x144> 8008814: f104 0542 add.w r5, r4, #66 ; 0x42 8008818: f884 2042 strb.w r2, [r4, #66] ; 0x42 800881c: e02a b.n 8008874 <_printf_i+0x90> 800881e: 2a64 cmp r2, #100 ; 0x64 8008820: d001 beq.n 8008826 <_printf_i+0x42> 8008822: 2a69 cmp r2, #105 ; 0x69 8008824: d1f6 bne.n 8008814 <_printf_i+0x30> 8008826: 6821 ldr r1, [r4, #0] 8008828: 681a ldr r2, [r3, #0] 800882a: f011 0f80 tst.w r1, #128 ; 0x80 800882e: d023 beq.n 8008878 <_printf_i+0x94> 8008830: 1d11 adds r1, r2, #4 8008832: 6019 str r1, [r3, #0] 8008834: 6813 ldr r3, [r2, #0] 8008836: e027 b.n 8008888 <_printf_i+0xa4> 8008838: 2a73 cmp r2, #115 ; 0x73 800883a: f000 80b4 beq.w 80089a6 <_printf_i+0x1c2> 800883e: d808 bhi.n 8008852 <_printf_i+0x6e> 8008840: 2a6f cmp r2, #111 ; 0x6f 8008842: d02a beq.n 800889a <_printf_i+0xb6> 8008844: 2a70 cmp r2, #112 ; 0x70 8008846: d1e5 bne.n 8008814 <_printf_i+0x30> 8008848: 680a ldr r2, [r1, #0] 800884a: f042 0220 orr.w r2, r2, #32 800884e: 600a str r2, [r1, #0] 8008850: e003 b.n 800885a <_printf_i+0x76> 8008852: 2a75 cmp r2, #117 ; 0x75 8008854: d021 beq.n 800889a <_printf_i+0xb6> 8008856: 2a78 cmp r2, #120 ; 0x78 8008858: d1dc bne.n 8008814 <_printf_i+0x30> 800885a: 2278 movs r2, #120 ; 0x78 800885c: 496f ldr r1, [pc, #444] ; (8008a1c <_printf_i+0x238>) 800885e: f884 2045 strb.w r2, [r4, #69] ; 0x45 8008862: e064 b.n 800892e <_printf_i+0x14a> 8008864: 681a ldr r2, [r3, #0] 8008866: f101 0542 add.w r5, r1, #66 ; 0x42 800886a: 1d11 adds r1, r2, #4 800886c: 6019 str r1, [r3, #0] 800886e: 6813 ldr r3, [r2, #0] 8008870: f884 3042 strb.w r3, [r4, #66] ; 0x42 8008874: 2301 movs r3, #1 8008876: e0a3 b.n 80089c0 <_printf_i+0x1dc> 8008878: f011 0f40 tst.w r1, #64 ; 0x40 800887c: f102 0104 add.w r1, r2, #4 8008880: 6019 str r1, [r3, #0] 8008882: d0d7 beq.n 8008834 <_printf_i+0x50> 8008884: f9b2 3000 ldrsh.w r3, [r2] 8008888: 2b00 cmp r3, #0 800888a: da03 bge.n 8008894 <_printf_i+0xb0> 800888c: 222d movs r2, #45 ; 0x2d 800888e: 425b negs r3, r3 8008890: f884 2043 strb.w r2, [r4, #67] ; 0x43 8008894: 4962 ldr r1, [pc, #392] ; (8008a20 <_printf_i+0x23c>) 8008896: 220a movs r2, #10 8008898: e017 b.n 80088ca <_printf_i+0xe6> 800889a: 6820 ldr r0, [r4, #0] 800889c: 6819 ldr r1, [r3, #0] 800889e: f010 0f80 tst.w r0, #128 ; 0x80 80088a2: d003 beq.n 80088ac <_printf_i+0xc8> 80088a4: 1d08 adds r0, r1, #4 80088a6: 6018 str r0, [r3, #0] 80088a8: 680b ldr r3, [r1, #0] 80088aa: e006 b.n 80088ba <_printf_i+0xd6> 80088ac: f010 0f40 tst.w r0, #64 ; 0x40 80088b0: f101 0004 add.w r0, r1, #4 80088b4: 6018 str r0, [r3, #0] 80088b6: d0f7 beq.n 80088a8 <_printf_i+0xc4> 80088b8: 880b ldrh r3, [r1, #0] 80088ba: 2a6f cmp r2, #111 ; 0x6f 80088bc: bf14 ite ne 80088be: 220a movne r2, #10 80088c0: 2208 moveq r2, #8 80088c2: 4957 ldr r1, [pc, #348] ; (8008a20 <_printf_i+0x23c>) 80088c4: 2000 movs r0, #0 80088c6: f884 0043 strb.w r0, [r4, #67] ; 0x43 80088ca: 6865 ldr r5, [r4, #4] 80088cc: 2d00 cmp r5, #0 80088ce: 60a5 str r5, [r4, #8] 80088d0: f2c0 809c blt.w 8008a0c <_printf_i+0x228> 80088d4: 6820 ldr r0, [r4, #0] 80088d6: f020 0004 bic.w r0, r0, #4 80088da: 6020 str r0, [r4, #0] 80088dc: 2b00 cmp r3, #0 80088de: d13f bne.n 8008960 <_printf_i+0x17c> 80088e0: 2d00 cmp r5, #0 80088e2: f040 8095 bne.w 8008a10 <_printf_i+0x22c> 80088e6: 4675 mov r5, lr 80088e8: 2a08 cmp r2, #8 80088ea: d10b bne.n 8008904 <_printf_i+0x120> 80088ec: 6823 ldr r3, [r4, #0] 80088ee: 07da lsls r2, r3, #31 80088f0: d508 bpl.n 8008904 <_printf_i+0x120> 80088f2: 6923 ldr r3, [r4, #16] 80088f4: 6862 ldr r2, [r4, #4] 80088f6: 429a cmp r2, r3 80088f8: bfde ittt le 80088fa: 2330 movle r3, #48 ; 0x30 80088fc: f805 3c01 strble.w r3, [r5, #-1] 8008900: f105 35ff addle.w r5, r5, #4294967295 8008904: ebae 0305 sub.w r3, lr, r5 8008908: 6123 str r3, [r4, #16] 800890a: f8cd 8000 str.w r8, [sp] 800890e: 463b mov r3, r7 8008910: aa03 add r2, sp, #12 8008912: 4621 mov r1, r4 8008914: 4630 mov r0, r6 8008916: f7ff feed bl 80086f4 <_printf_common> 800891a: 3001 adds r0, #1 800891c: d155 bne.n 80089ca <_printf_i+0x1e6> 800891e: f04f 30ff mov.w r0, #4294967295 8008922: b005 add sp, #20 8008924: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8008928: f881 2045 strb.w r2, [r1, #69] ; 0x45 800892c: 493c ldr r1, [pc, #240] ; (8008a20 <_printf_i+0x23c>) 800892e: 6822 ldr r2, [r4, #0] 8008930: 6818 ldr r0, [r3, #0] 8008932: f012 0f80 tst.w r2, #128 ; 0x80 8008936: f100 0504 add.w r5, r0, #4 800893a: 601d str r5, [r3, #0] 800893c: d001 beq.n 8008942 <_printf_i+0x15e> 800893e: 6803 ldr r3, [r0, #0] 8008940: e002 b.n 8008948 <_printf_i+0x164> 8008942: 0655 lsls r5, r2, #25 8008944: d5fb bpl.n 800893e <_printf_i+0x15a> 8008946: 8803 ldrh r3, [r0, #0] 8008948: 07d0 lsls r0, r2, #31 800894a: bf44 itt mi 800894c: f042 0220 orrmi.w r2, r2, #32 8008950: 6022 strmi r2, [r4, #0] 8008952: b91b cbnz r3, 800895c <_printf_i+0x178> 8008954: 6822 ldr r2, [r4, #0] 8008956: f022 0220 bic.w r2, r2, #32 800895a: 6022 str r2, [r4, #0] 800895c: 2210 movs r2, #16 800895e: e7b1 b.n 80088c4 <_printf_i+0xe0> 8008960: 4675 mov r5, lr 8008962: fbb3 f0f2 udiv r0, r3, r2 8008966: fb02 3310 mls r3, r2, r0, r3 800896a: 5ccb ldrb r3, [r1, r3] 800896c: f805 3d01 strb.w r3, [r5, #-1]! 8008970: 4603 mov r3, r0 8008972: 2800 cmp r0, #0 8008974: d1f5 bne.n 8008962 <_printf_i+0x17e> 8008976: e7b7 b.n 80088e8 <_printf_i+0x104> 8008978: 6808 ldr r0, [r1, #0] 800897a: 681a ldr r2, [r3, #0] 800897c: f010 0f80 tst.w r0, #128 ; 0x80 8008980: 6949 ldr r1, [r1, #20] 8008982: d004 beq.n 800898e <_printf_i+0x1aa> 8008984: 1d10 adds r0, r2, #4 8008986: 6018 str r0, [r3, #0] 8008988: 6813 ldr r3, [r2, #0] 800898a: 6019 str r1, [r3, #0] 800898c: e007 b.n 800899e <_printf_i+0x1ba> 800898e: f010 0f40 tst.w r0, #64 ; 0x40 8008992: f102 0004 add.w r0, r2, #4 8008996: 6018 str r0, [r3, #0] 8008998: 6813 ldr r3, [r2, #0] 800899a: d0f6 beq.n 800898a <_printf_i+0x1a6> 800899c: 8019 strh r1, [r3, #0] 800899e: 2300 movs r3, #0 80089a0: 4675 mov r5, lr 80089a2: 6123 str r3, [r4, #16] 80089a4: e7b1 b.n 800890a <_printf_i+0x126> 80089a6: 681a ldr r2, [r3, #0] 80089a8: 1d11 adds r1, r2, #4 80089aa: 6019 str r1, [r3, #0] 80089ac: 6815 ldr r5, [r2, #0] 80089ae: 2100 movs r1, #0 80089b0: 6862 ldr r2, [r4, #4] 80089b2: 4628 mov r0, r5 80089b4: f000 f916 bl 8008be4 80089b8: b108 cbz r0, 80089be <_printf_i+0x1da> 80089ba: 1b40 subs r0, r0, r5 80089bc: 6060 str r0, [r4, #4] 80089be: 6863 ldr r3, [r4, #4] 80089c0: 6123 str r3, [r4, #16] 80089c2: 2300 movs r3, #0 80089c4: f884 3043 strb.w r3, [r4, #67] ; 0x43 80089c8: e79f b.n 800890a <_printf_i+0x126> 80089ca: 6923 ldr r3, [r4, #16] 80089cc: 462a mov r2, r5 80089ce: 4639 mov r1, r7 80089d0: 4630 mov r0, r6 80089d2: 47c0 blx r8 80089d4: 3001 adds r0, #1 80089d6: d0a2 beq.n 800891e <_printf_i+0x13a> 80089d8: 6823 ldr r3, [r4, #0] 80089da: 079b lsls r3, r3, #30 80089dc: d507 bpl.n 80089ee <_printf_i+0x20a> 80089de: 2500 movs r5, #0 80089e0: f104 0919 add.w r9, r4, #25 80089e4: 68e3 ldr r3, [r4, #12] 80089e6: 9a03 ldr r2, [sp, #12] 80089e8: 1a9b subs r3, r3, r2 80089ea: 429d cmp r5, r3 80089ec: db05 blt.n 80089fa <_printf_i+0x216> 80089ee: 68e0 ldr r0, [r4, #12] 80089f0: 9b03 ldr r3, [sp, #12] 80089f2: 4298 cmp r0, r3 80089f4: bfb8 it lt 80089f6: 4618 movlt r0, r3 80089f8: e793 b.n 8008922 <_printf_i+0x13e> 80089fa: 2301 movs r3, #1 80089fc: 464a mov r2, r9 80089fe: 4639 mov r1, r7 8008a00: 4630 mov r0, r6 8008a02: 47c0 blx r8 8008a04: 3001 adds r0, #1 8008a06: d08a beq.n 800891e <_printf_i+0x13a> 8008a08: 3501 adds r5, #1 8008a0a: e7eb b.n 80089e4 <_printf_i+0x200> 8008a0c: 2b00 cmp r3, #0 8008a0e: d1a7 bne.n 8008960 <_printf_i+0x17c> 8008a10: 780b ldrb r3, [r1, #0] 8008a12: f104 0542 add.w r5, r4, #66 ; 0x42 8008a16: f884 3042 strb.w r3, [r4, #66] ; 0x42 8008a1a: e765 b.n 80088e8 <_printf_i+0x104> 8008a1c: 08008f72 .word 0x08008f72 8008a20: 08008f61 .word 0x08008f61 08008a24 <_putc_r>: 8008a24: b570 push {r4, r5, r6, lr} 8008a26: 460d mov r5, r1 8008a28: 4614 mov r4, r2 8008a2a: 4606 mov r6, r0 8008a2c: b118 cbz r0, 8008a36 <_putc_r+0x12> 8008a2e: 6983 ldr r3, [r0, #24] 8008a30: b90b cbnz r3, 8008a36 <_putc_r+0x12> 8008a32: f7ff fb81 bl 8008138 <__sinit> 8008a36: 4b13 ldr r3, [pc, #76] ; (8008a84 <_putc_r+0x60>) 8008a38: 429c cmp r4, r3 8008a3a: d112 bne.n 8008a62 <_putc_r+0x3e> 8008a3c: 6874 ldr r4, [r6, #4] 8008a3e: 68a3 ldr r3, [r4, #8] 8008a40: 3b01 subs r3, #1 8008a42: 2b00 cmp r3, #0 8008a44: 60a3 str r3, [r4, #8] 8008a46: da16 bge.n 8008a76 <_putc_r+0x52> 8008a48: 69a2 ldr r2, [r4, #24] 8008a4a: 4293 cmp r3, r2 8008a4c: db02 blt.n 8008a54 <_putc_r+0x30> 8008a4e: b2eb uxtb r3, r5 8008a50: 2b0a cmp r3, #10 8008a52: d110 bne.n 8008a76 <_putc_r+0x52> 8008a54: 4622 mov r2, r4 8008a56: 4629 mov r1, r5 8008a58: 4630 mov r0, r6 8008a5a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} 8008a5e: f7ff b9b9 b.w 8007dd4 <__swbuf_r> 8008a62: 4b09 ldr r3, [pc, #36] ; (8008a88 <_putc_r+0x64>) 8008a64: 429c cmp r4, r3 8008a66: d101 bne.n 8008a6c <_putc_r+0x48> 8008a68: 68b4 ldr r4, [r6, #8] 8008a6a: e7e8 b.n 8008a3e <_putc_r+0x1a> 8008a6c: 4b07 ldr r3, [pc, #28] ; (8008a8c <_putc_r+0x68>) 8008a6e: 429c cmp r4, r3 8008a70: bf08 it eq 8008a72: 68f4 ldreq r4, [r6, #12] 8008a74: e7e3 b.n 8008a3e <_putc_r+0x1a> 8008a76: 6823 ldr r3, [r4, #0] 8008a78: b2e8 uxtb r0, r5 8008a7a: 1c5a adds r2, r3, #1 8008a7c: 6022 str r2, [r4, #0] 8008a7e: 701d strb r5, [r3, #0] 8008a80: bd70 pop {r4, r5, r6, pc} 8008a82: bf00 nop 8008a84: 08008f10 .word 0x08008f10 8008a88: 08008f30 .word 0x08008f30 8008a8c: 08008ef0 .word 0x08008ef0 08008a90 <_sbrk_r>: 8008a90: b538 push {r3, r4, r5, lr} 8008a92: 2300 movs r3, #0 8008a94: 4c05 ldr r4, [pc, #20] ; (8008aac <_sbrk_r+0x1c>) 8008a96: 4605 mov r5, r0 8008a98: 4608 mov r0, r1 8008a9a: 6023 str r3, [r4, #0] 8008a9c: f000 f8ec bl 8008c78 <_sbrk> 8008aa0: 1c43 adds r3, r0, #1 8008aa2: d102 bne.n 8008aaa <_sbrk_r+0x1a> 8008aa4: 6823 ldr r3, [r4, #0] 8008aa6: b103 cbz r3, 8008aaa <_sbrk_r+0x1a> 8008aa8: 602b str r3, [r5, #0] 8008aaa: bd38 pop {r3, r4, r5, pc} 8008aac: 20000858 .word 0x20000858 08008ab0 <__sread>: 8008ab0: b510 push {r4, lr} 8008ab2: 460c mov r4, r1 8008ab4: f9b1 100e ldrsh.w r1, [r1, #14] 8008ab8: f000 f8a4 bl 8008c04 <_read_r> 8008abc: 2800 cmp r0, #0 8008abe: bfab itete ge 8008ac0: 6d63 ldrge r3, [r4, #84] ; 0x54 8008ac2: 89a3 ldrhlt r3, [r4, #12] 8008ac4: 181b addge r3, r3, r0 8008ac6: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 8008aca: bfac ite ge 8008acc: 6563 strge r3, [r4, #84] ; 0x54 8008ace: 81a3 strhlt r3, [r4, #12] 8008ad0: bd10 pop {r4, pc} 08008ad2 <__swrite>: 8008ad2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8008ad6: 461f mov r7, r3 8008ad8: 898b ldrh r3, [r1, #12] 8008ada: 4605 mov r5, r0 8008adc: 05db lsls r3, r3, #23 8008ade: 460c mov r4, r1 8008ae0: 4616 mov r6, r2 8008ae2: d505 bpl.n 8008af0 <__swrite+0x1e> 8008ae4: 2302 movs r3, #2 8008ae6: 2200 movs r2, #0 8008ae8: f9b1 100e ldrsh.w r1, [r1, #14] 8008aec: f000 f868 bl 8008bc0 <_lseek_r> 8008af0: 89a3 ldrh r3, [r4, #12] 8008af2: 4632 mov r2, r6 8008af4: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8008af8: 81a3 strh r3, [r4, #12] 8008afa: f9b4 100e ldrsh.w r1, [r4, #14] 8008afe: 463b mov r3, r7 8008b00: 4628 mov r0, r5 8008b02: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8008b06: f000 b817 b.w 8008b38 <_write_r> 08008b0a <__sseek>: 8008b0a: b510 push {r4, lr} 8008b0c: 460c mov r4, r1 8008b0e: f9b1 100e ldrsh.w r1, [r1, #14] 8008b12: f000 f855 bl 8008bc0 <_lseek_r> 8008b16: 1c43 adds r3, r0, #1 8008b18: 89a3 ldrh r3, [r4, #12] 8008b1a: bf15 itete ne 8008b1c: 6560 strne r0, [r4, #84] ; 0x54 8008b1e: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8008b22: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8008b26: 81a3 strheq r3, [r4, #12] 8008b28: bf18 it ne 8008b2a: 81a3 strhne r3, [r4, #12] 8008b2c: bd10 pop {r4, pc} 08008b2e <__sclose>: 8008b2e: f9b1 100e ldrsh.w r1, [r1, #14] 8008b32: f000 b813 b.w 8008b5c <_close_r> ... 08008b38 <_write_r>: 8008b38: b538 push {r3, r4, r5, lr} 8008b3a: 4605 mov r5, r0 8008b3c: 4608 mov r0, r1 8008b3e: 4611 mov r1, r2 8008b40: 2200 movs r2, #0 8008b42: 4c05 ldr r4, [pc, #20] ; (8008b58 <_write_r+0x20>) 8008b44: 6022 str r2, [r4, #0] 8008b46: 461a mov r2, r3 8008b48: f7fe f9a0 bl 8006e8c <_write> 8008b4c: 1c43 adds r3, r0, #1 8008b4e: d102 bne.n 8008b56 <_write_r+0x1e> 8008b50: 6823 ldr r3, [r4, #0] 8008b52: b103 cbz r3, 8008b56 <_write_r+0x1e> 8008b54: 602b str r3, [r5, #0] 8008b56: bd38 pop {r3, r4, r5, pc} 8008b58: 20000858 .word 0x20000858 08008b5c <_close_r>: 8008b5c: b538 push {r3, r4, r5, lr} 8008b5e: 2300 movs r3, #0 8008b60: 4c05 ldr r4, [pc, #20] ; (8008b78 <_close_r+0x1c>) 8008b62: 4605 mov r5, r0 8008b64: 4608 mov r0, r1 8008b66: 6023 str r3, [r4, #0] 8008b68: f000 f85e bl 8008c28 <_close> 8008b6c: 1c43 adds r3, r0, #1 8008b6e: d102 bne.n 8008b76 <_close_r+0x1a> 8008b70: 6823 ldr r3, [r4, #0] 8008b72: b103 cbz r3, 8008b76 <_close_r+0x1a> 8008b74: 602b str r3, [r5, #0] 8008b76: bd38 pop {r3, r4, r5, pc} 8008b78: 20000858 .word 0x20000858 08008b7c <_fstat_r>: 8008b7c: b538 push {r3, r4, r5, lr} 8008b7e: 2300 movs r3, #0 8008b80: 4c06 ldr r4, [pc, #24] ; (8008b9c <_fstat_r+0x20>) 8008b82: 4605 mov r5, r0 8008b84: 4608 mov r0, r1 8008b86: 4611 mov r1, r2 8008b88: 6023 str r3, [r4, #0] 8008b8a: f000 f855 bl 8008c38 <_fstat> 8008b8e: 1c43 adds r3, r0, #1 8008b90: d102 bne.n 8008b98 <_fstat_r+0x1c> 8008b92: 6823 ldr r3, [r4, #0] 8008b94: b103 cbz r3, 8008b98 <_fstat_r+0x1c> 8008b96: 602b str r3, [r5, #0] 8008b98: bd38 pop {r3, r4, r5, pc} 8008b9a: bf00 nop 8008b9c: 20000858 .word 0x20000858 08008ba0 <_isatty_r>: 8008ba0: b538 push {r3, r4, r5, lr} 8008ba2: 2300 movs r3, #0 8008ba4: 4c05 ldr r4, [pc, #20] ; (8008bbc <_isatty_r+0x1c>) 8008ba6: 4605 mov r5, r0 8008ba8: 4608 mov r0, r1 8008baa: 6023 str r3, [r4, #0] 8008bac: f000 f84c bl 8008c48 <_isatty> 8008bb0: 1c43 adds r3, r0, #1 8008bb2: d102 bne.n 8008bba <_isatty_r+0x1a> 8008bb4: 6823 ldr r3, [r4, #0] 8008bb6: b103 cbz r3, 8008bba <_isatty_r+0x1a> 8008bb8: 602b str r3, [r5, #0] 8008bba: bd38 pop {r3, r4, r5, pc} 8008bbc: 20000858 .word 0x20000858 08008bc0 <_lseek_r>: 8008bc0: b538 push {r3, r4, r5, lr} 8008bc2: 4605 mov r5, r0 8008bc4: 4608 mov r0, r1 8008bc6: 4611 mov r1, r2 8008bc8: 2200 movs r2, #0 8008bca: 4c05 ldr r4, [pc, #20] ; (8008be0 <_lseek_r+0x20>) 8008bcc: 6022 str r2, [r4, #0] 8008bce: 461a mov r2, r3 8008bd0: f000 f842 bl 8008c58 <_lseek> 8008bd4: 1c43 adds r3, r0, #1 8008bd6: d102 bne.n 8008bde <_lseek_r+0x1e> 8008bd8: 6823 ldr r3, [r4, #0] 8008bda: b103 cbz r3, 8008bde <_lseek_r+0x1e> 8008bdc: 602b str r3, [r5, #0] 8008bde: bd38 pop {r3, r4, r5, pc} 8008be0: 20000858 .word 0x20000858 08008be4 : 8008be4: b510 push {r4, lr} 8008be6: b2c9 uxtb r1, r1 8008be8: 4402 add r2, r0 8008bea: 4290 cmp r0, r2 8008bec: 4603 mov r3, r0 8008bee: d101 bne.n 8008bf4 8008bf0: 2000 movs r0, #0 8008bf2: bd10 pop {r4, pc} 8008bf4: 781c ldrb r4, [r3, #0] 8008bf6: 3001 adds r0, #1 8008bf8: 428c cmp r4, r1 8008bfa: d1f6 bne.n 8008bea 8008bfc: 4618 mov r0, r3 8008bfe: bd10 pop {r4, pc} 08008c00 <__malloc_lock>: 8008c00: 4770 bx lr 08008c02 <__malloc_unlock>: 8008c02: 4770 bx lr 08008c04 <_read_r>: 8008c04: b538 push {r3, r4, r5, lr} 8008c06: 4605 mov r5, r0 8008c08: 4608 mov r0, r1 8008c0a: 4611 mov r1, r2 8008c0c: 2200 movs r2, #0 8008c0e: 4c05 ldr r4, [pc, #20] ; (8008c24 <_read_r+0x20>) 8008c10: 6022 str r2, [r4, #0] 8008c12: 461a mov r2, r3 8008c14: f000 f828 bl 8008c68 <_read> 8008c18: 1c43 adds r3, r0, #1 8008c1a: d102 bne.n 8008c22 <_read_r+0x1e> 8008c1c: 6823 ldr r3, [r4, #0] 8008c1e: b103 cbz r3, 8008c22 <_read_r+0x1e> 8008c20: 602b str r3, [r5, #0] 8008c22: bd38 pop {r3, r4, r5, pc} 8008c24: 20000858 .word 0x20000858 08008c28 <_close>: 8008c28: 2258 movs r2, #88 ; 0x58 8008c2a: 4b02 ldr r3, [pc, #8] ; (8008c34 <_close+0xc>) 8008c2c: f04f 30ff mov.w r0, #4294967295 8008c30: 601a str r2, [r3, #0] 8008c32: 4770 bx lr 8008c34: 20000858 .word 0x20000858 08008c38 <_fstat>: 8008c38: 2258 movs r2, #88 ; 0x58 8008c3a: 4b02 ldr r3, [pc, #8] ; (8008c44 <_fstat+0xc>) 8008c3c: f04f 30ff mov.w r0, #4294967295 8008c40: 601a str r2, [r3, #0] 8008c42: 4770 bx lr 8008c44: 20000858 .word 0x20000858 08008c48 <_isatty>: 8008c48: 2258 movs r2, #88 ; 0x58 8008c4a: 4b02 ldr r3, [pc, #8] ; (8008c54 <_isatty+0xc>) 8008c4c: 2000 movs r0, #0 8008c4e: 601a str r2, [r3, #0] 8008c50: 4770 bx lr 8008c52: bf00 nop 8008c54: 20000858 .word 0x20000858 08008c58 <_lseek>: 8008c58: 2258 movs r2, #88 ; 0x58 8008c5a: 4b02 ldr r3, [pc, #8] ; (8008c64 <_lseek+0xc>) 8008c5c: f04f 30ff mov.w r0, #4294967295 8008c60: 601a str r2, [r3, #0] 8008c62: 4770 bx lr 8008c64: 20000858 .word 0x20000858 08008c68 <_read>: 8008c68: 2258 movs r2, #88 ; 0x58 8008c6a: 4b02 ldr r3, [pc, #8] ; (8008c74 <_read+0xc>) 8008c6c: f04f 30ff mov.w r0, #4294967295 8008c70: 601a str r2, [r3, #0] 8008c72: 4770 bx lr 8008c74: 20000858 .word 0x20000858 08008c78 <_sbrk>: 8008c78: 4b04 ldr r3, [pc, #16] ; (8008c8c <_sbrk+0x14>) 8008c7a: 4602 mov r2, r0 8008c7c: 6819 ldr r1, [r3, #0] 8008c7e: b909 cbnz r1, 8008c84 <_sbrk+0xc> 8008c80: 4903 ldr r1, [pc, #12] ; (8008c90 <_sbrk+0x18>) 8008c82: 6019 str r1, [r3, #0] 8008c84: 6818 ldr r0, [r3, #0] 8008c86: 4402 add r2, r0 8008c88: 601a str r2, [r3, #0] 8008c8a: 4770 bx lr 8008c8c: 20000428 .word 0x20000428 8008c90: 2000085c .word 0x2000085c 08008c94 <_init>: 8008c94: b5f8 push {r3, r4, r5, r6, r7, lr} 8008c96: bf00 nop 8008c98: bcf8 pop {r3, r4, r5, r6, r7} 8008c9a: bc08 pop {r3} 8008c9c: 469e mov lr, r3 8008c9e: 4770 bx lr 08008ca0 <_fini>: 8008ca0: b5f8 push {r3, r4, r5, r6, r7, lr} 8008ca2: bf00 nop 8008ca4: bcf8 pop {r3, r4, r5, r6, r7} 8008ca6: bc08 pop {r3} 8008ca8: 469e mov lr, r3 8008caa: 4770 bx lr