STM32F103_RGB_Controller.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000390c 080041e4 080041e4 000041e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000001f8 08007af0 08007af0 00007af0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08007ce8 08007ce8 00007ce8 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08007cec 08007cec 00007cec 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000070 20000000 08007cf0 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 000004ac 20000070 08007d60 00010070 2**3 ALLOC 7 ._user_heap_stack 00000600 2000051c 08007d60 0001051c 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00010070 2**0 CONTENTS, READONLY 9 .debug_info 0001c5f4 00000000 00000000 00010099 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 000037e0 00000000 00000000 0002c68d 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000a7a7 00000000 00000000 0002fe6d 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000ce0 00000000 00000000 0003a618 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00001400 00000000 00000000 0003b2f8 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 000081e1 00000000 00000000 0003c6f8 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004b76 00000000 00000000 000448d9 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0004944f 2**0 CONTENTS, READONLY 17 .debug_frame 00002fac 00000000 00000000 000494cc 2**2 CONTENTS, READONLY, DEBUGGING 18 .stab 00000084 00000000 00000000 0004c478 2**2 CONTENTS, READONLY, DEBUGGING 19 .stabstr 00000117 00000000 00000000 0004c4fc 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080041e4 <__do_global_dtors_aux>: 80041e4: b510 push {r4, lr} 80041e6: 4c05 ldr r4, [pc, #20] ; (80041fc <__do_global_dtors_aux+0x18>) 80041e8: 7823 ldrb r3, [r4, #0] 80041ea: b933 cbnz r3, 80041fa <__do_global_dtors_aux+0x16> 80041ec: 4b04 ldr r3, [pc, #16] ; (8004200 <__do_global_dtors_aux+0x1c>) 80041ee: b113 cbz r3, 80041f6 <__do_global_dtors_aux+0x12> 80041f0: 4804 ldr r0, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x20>) 80041f2: f3af 8000 nop.w 80041f6: 2301 movs r3, #1 80041f8: 7023 strb r3, [r4, #0] 80041fa: bd10 pop {r4, pc} 80041fc: 20000070 .word 0x20000070 8004200: 00000000 .word 0x00000000 8004204: 08007ad8 .word 0x08007ad8 08004208 : 8004208: b508 push {r3, lr} 800420a: 4b03 ldr r3, [pc, #12] ; (8004218 ) 800420c: b11b cbz r3, 8004216 800420e: 4903 ldr r1, [pc, #12] ; (800421c ) 8004210: 4803 ldr r0, [pc, #12] ; (8004220 ) 8004212: f3af 8000 nop.w 8004216: bd08 pop {r3, pc} 8004218: 00000000 .word 0x00000000 800421c: 20000074 .word 0x20000074 8004220: 08007ad8 .word 0x08007ad8 08004224 <__aeabi_llsr>: 8004224: 40d0 lsrs r0, r2 8004226: 1c0b adds r3, r1, #0 8004228: 40d1 lsrs r1, r2 800422a: 469c mov ip, r3 800422c: 3a20 subs r2, #32 800422e: 40d3 lsrs r3, r2 8004230: 4318 orrs r0, r3 8004232: 4252 negs r2, r2 8004234: 4663 mov r3, ip 8004236: 4093 lsls r3, r2 8004238: 4318 orrs r0, r3 800423a: 4770 bx lr 0800423c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800423c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800423e: 4b0e ldr r3, [pc, #56] ; (8004278 ) { 8004240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8004242: 7818 ldrb r0, [r3, #0] 8004244: f44f 737a mov.w r3, #1000 ; 0x3e8 8004248: fbb3 f3f0 udiv r3, r3, r0 800424c: 4a0b ldr r2, [pc, #44] ; (800427c ) 800424e: 6810 ldr r0, [r2, #0] 8004250: fbb0 f0f3 udiv r0, r0, r3 8004254: f000 f89e bl 8004394 8004258: 4604 mov r4, r0 800425a: b958 cbnz r0, 8004274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800425c: 2d0f cmp r5, #15 800425e: d809 bhi.n 8004274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8004260: 4602 mov r2, r0 8004262: 4629 mov r1, r5 8004264: f04f 30ff mov.w r0, #4294967295 8004268: f000 f854 bl 8004314 uwTickPrio = TickPriority; 800426c: 4b04 ldr r3, [pc, #16] ; (8004280 ) 800426e: 4620 mov r0, r4 8004270: 601d str r5, [r3, #0] 8004272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8004274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8004276: bd38 pop {r3, r4, r5, pc} 8004278: 20000000 .word 0x20000000 800427c: 20000008 .word 0x20000008 8004280: 20000004 .word 0x20000004 08004284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004284: 4a07 ldr r2, [pc, #28] ; (80042a4 ) { 8004286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800428a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800428c: f043 0310 orr.w r3, r3, #16 8004290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8004292: f000 f82d bl 80042f0 HAL_InitTick(TICK_INT_PRIORITY); 8004296: 2000 movs r0, #0 8004298: f7ff ffd0 bl 800423c HAL_MspInit(); 800429c: f002 fa56 bl 800674c } 80042a0: 2000 movs r0, #0 80042a2: bd08 pop {r3, pc} 80042a4: 40022000 .word 0x40022000 080042a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80042a8: 4a03 ldr r2, [pc, #12] ; (80042b8 ) 80042aa: 4b04 ldr r3, [pc, #16] ; (80042bc ) 80042ac: 6811 ldr r1, [r2, #0] 80042ae: 781b ldrb r3, [r3, #0] 80042b0: 440b add r3, r1 80042b2: 6013 str r3, [r2, #0] 80042b4: 4770 bx lr 80042b6: bf00 nop 80042b8: 200001f0 .word 0x200001f0 80042bc: 20000000 .word 0x20000000 080042c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80042c0: 4b01 ldr r3, [pc, #4] ; (80042c8 ) 80042c2: 6818 ldr r0, [r3, #0] } 80042c4: 4770 bx lr 80042c6: bf00 nop 80042c8: 200001f0 .word 0x200001f0 080042cc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80042cc: b538 push {r3, r4, r5, lr} 80042ce: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80042d0: f7ff fff6 bl 80042c0 80042d4: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80042d6: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80042d8: bf1e ittt ne 80042da: 4b04 ldrne r3, [pc, #16] ; (80042ec ) 80042dc: 781b ldrbne r3, [r3, #0] 80042de: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80042e0: f7ff ffee bl 80042c0 80042e4: 1b40 subs r0, r0, r5 80042e6: 4284 cmp r4, r0 80042e8: d8fa bhi.n 80042e0 { } } 80042ea: bd38 pop {r3, r4, r5, pc} 80042ec: 20000000 .word 0x20000000 080042f0 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80042f0: 4a07 ldr r2, [pc, #28] ; (8004310 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042f2: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80042f4: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042f6: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80042fa: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80042fe: 041b lsls r3, r3, #16 8004300: 0c1b lsrs r3, r3, #16 8004302: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8004306: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800430a: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 800430c: 60d3 str r3, [r2, #12] 800430e: 4770 bx lr 8004310: e000ed00 .word 0xe000ed00 08004314 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8004314: 4b17 ldr r3, [pc, #92] ; (8004374 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8004316: b530 push {r4, r5, lr} 8004318: 68dc ldr r4, [r3, #12] 800431a: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800431e: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004322: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8004324: 2b04 cmp r3, #4 8004326: bf28 it cs 8004328: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800432a: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800432c: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004330: bf98 it ls 8004332: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004334: fa05 f303 lsl.w r3, r5, r3 8004338: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800433c: bf88 it hi 800433e: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004340: 4019 ands r1, r3 8004342: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8004344: fa05 f404 lsl.w r4, r5, r4 8004348: 3c01 subs r4, #1 800434a: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 800434c: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800434e: ea42 0201 orr.w r2, r2, r1 8004352: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004356: bfaf iteee ge 8004358: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800435c: 4b06 ldrlt r3, [pc, #24] ; (8004378 ) 800435e: f000 000f andlt.w r0, r0, #15 8004362: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004364: bfa5 ittet ge 8004366: b2d2 uxtbge r2, r2 8004368: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800436c: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800436e: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8004372: bd30 pop {r4, r5, pc} 8004374: e000ed00 .word 0xe000ed00 8004378: e000ed14 .word 0xe000ed14 0800437c : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 800437c: 2301 movs r3, #1 800437e: 0942 lsrs r2, r0, #5 8004380: f000 001f and.w r0, r0, #31 8004384: fa03 f000 lsl.w r0, r3, r0 8004388: 4b01 ldr r3, [pc, #4] ; (8004390 ) 800438a: f843 0022 str.w r0, [r3, r2, lsl #2] 800438e: 4770 bx lr 8004390: e000e100 .word 0xe000e100 08004394 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8004394: 3801 subs r0, #1 8004396: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 800439a: d20a bcs.n 80043b2 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800439c: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800439e: 4b06 ldr r3, [pc, #24] ; (80043b8 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80043a0: 4a06 ldr r2, [pc, #24] ; (80043bc ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80043a2: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80043a4: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80043a8: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80043aa: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80043ac: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80043ae: 601a str r2, [r3, #0] 80043b0: 4770 bx lr return (1UL); /* Reload value impossible */ 80043b2: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80043b4: 4770 bx lr 80043b6: bf00 nop 80043b8: e000e010 .word 0xe000e010 80043bc: e000ed00 .word 0xe000ed00 080043c0 : */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { HAL_StatusTypeDef status = HAL_OK; if(HAL_DMA_STATE_BUSY != hdma->State) 80043c0: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80043c4: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80043c6: 2b02 cmp r3, #2 80043c8: d003 beq.n 80043d2 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80043ca: 2304 movs r3, #4 80043cc: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80043ce: 2001 movs r0, #1 80043d0: bd10 pop {r4, pc} } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80043d2: 6803 ldr r3, [r0, #0] 80043d4: 681a ldr r2, [r3, #0] 80043d6: f022 020e bic.w r2, r2, #14 80043da: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80043dc: 681a ldr r2, [r3, #0] 80043de: f022 0201 bic.w r2, r2, #1 80043e2: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80043e4: 4a29 ldr r2, [pc, #164] ; (800448c ) 80043e6: 4293 cmp r3, r2 80043e8: d924 bls.n 8004434 80043ea: f502 7262 add.w r2, r2, #904 ; 0x388 80043ee: 4293 cmp r3, r2 80043f0: d019 beq.n 8004426 80043f2: 3214 adds r2, #20 80043f4: 4293 cmp r3, r2 80043f6: d018 beq.n 800442a 80043f8: 3214 adds r2, #20 80043fa: 4293 cmp r3, r2 80043fc: d017 beq.n 800442e 80043fe: 3214 adds r2, #20 8004400: 4293 cmp r3, r2 8004402: bf0c ite eq 8004404: f44f 5380 moveq.w r3, #4096 ; 0x1000 8004408: f44f 3380 movne.w r3, #65536 ; 0x10000 800440c: 4a20 ldr r2, [pc, #128] ; (8004490 ) 800440e: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004410: 2301 movs r3, #1 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004412: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8004414: f880 3021 strb.w r3, [r0, #33] ; 0x21 /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8004418: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 800441a: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 800441e: b39b cbz r3, 8004488 { hdma->XferAbortCallback(hdma); 8004420: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8004422: 4620 mov r0, r4 8004424: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8004426: 2301 movs r3, #1 8004428: e7f0 b.n 800440c 800442a: 2310 movs r3, #16 800442c: e7ee b.n 800440c 800442e: f44f 7380 mov.w r3, #256 ; 0x100 8004432: e7eb b.n 800440c 8004434: 4917 ldr r1, [pc, #92] ; (8004494 ) 8004436: 428b cmp r3, r1 8004438: d016 beq.n 8004468 800443a: 3114 adds r1, #20 800443c: 428b cmp r3, r1 800443e: d015 beq.n 800446c 8004440: 3114 adds r1, #20 8004442: 428b cmp r3, r1 8004444: d014 beq.n 8004470 8004446: 3114 adds r1, #20 8004448: 428b cmp r3, r1 800444a: d014 beq.n 8004476 800444c: 3114 adds r1, #20 800444e: 428b cmp r3, r1 8004450: d014 beq.n 800447c 8004452: 3114 adds r1, #20 8004454: 428b cmp r3, r1 8004456: d014 beq.n 8004482 8004458: 4293 cmp r3, r2 800445a: bf14 ite ne 800445c: f44f 3380 movne.w r3, #65536 ; 0x10000 8004460: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8004464: 4a0c ldr r2, [pc, #48] ; (8004498 ) 8004466: e7d2 b.n 800440e 8004468: 2301 movs r3, #1 800446a: e7fb b.n 8004464 800446c: 2310 movs r3, #16 800446e: e7f9 b.n 8004464 8004470: f44f 7380 mov.w r3, #256 ; 0x100 8004474: e7f6 b.n 8004464 8004476: f44f 5380 mov.w r3, #4096 ; 0x1000 800447a: e7f3 b.n 8004464 800447c: f44f 3380 mov.w r3, #65536 ; 0x10000 8004480: e7f0 b.n 8004464 8004482: f44f 1380 mov.w r3, #1048576 ; 0x100000 8004486: e7ed b.n 8004464 HAL_StatusTypeDef status = HAL_OK; 8004488: 4618 mov r0, r3 } } return status; } 800448a: bd10 pop {r4, pc} 800448c: 40020080 .word 0x40020080 8004490: 40020400 .word 0x40020400 8004494: 40020008 .word 0x40020008 8004498: 40020000 .word 0x40020000 0800449c : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800449c: 4a11 ldr r2, [pc, #68] ; (80044e4 ) 800449e: 68d3 ldr r3, [r2, #12] 80044a0: f013 0310 ands.w r3, r3, #16 80044a4: d005 beq.n 80044b2 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 80044a6: 4910 ldr r1, [pc, #64] ; (80044e8 ) 80044a8: 69cb ldr r3, [r1, #28] 80044aa: f043 0302 orr.w r3, r3, #2 80044ae: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 80044b0: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80044b2: 68d2 ldr r2, [r2, #12] 80044b4: 0750 lsls r0, r2, #29 80044b6: d506 bpl.n 80044c6 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80044b8: 490b ldr r1, [pc, #44] ; (80044e8 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 80044ba: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80044be: 69ca ldr r2, [r1, #28] 80044c0: f042 0201 orr.w r2, r2, #1 80044c4: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 80044c6: 4a07 ldr r2, [pc, #28] ; (80044e4 ) 80044c8: 69d1 ldr r1, [r2, #28] 80044ca: 07c9 lsls r1, r1, #31 80044cc: d508 bpl.n 80044e0 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 80044ce: 4806 ldr r0, [pc, #24] ; (80044e8 ) 80044d0: 69c1 ldr r1, [r0, #28] 80044d2: f041 0104 orr.w r1, r1, #4 80044d6: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 80044d8: 69d1 ldr r1, [r2, #28] 80044da: f021 0101 bic.w r1, r1, #1 80044de: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 80044e0: 60d3 str r3, [r2, #12] 80044e2: 4770 bx lr 80044e4: 40022000 .word 0x40022000 80044e8: 200001f8 .word 0x200001f8 080044ec : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80044ec: 4b06 ldr r3, [pc, #24] ; (8004508 ) 80044ee: 6918 ldr r0, [r3, #16] 80044f0: f010 0080 ands.w r0, r0, #128 ; 0x80 80044f4: d007 beq.n 8004506 WRITE_REG(FLASH->KEYR, FLASH_KEY1); 80044f6: 4a05 ldr r2, [pc, #20] ; (800450c ) 80044f8: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 80044fa: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 80044fe: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8004500: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8004502: f3c0 10c0 ubfx r0, r0, #7, #1 } 8004506: 4770 bx lr 8004508: 40022000 .word 0x40022000 800450c: 45670123 .word 0x45670123 08004510 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8004510: 4a03 ldr r2, [pc, #12] ; (8004520 ) } 8004512: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8004514: 6913 ldr r3, [r2, #16] 8004516: f043 0380 orr.w r3, r3, #128 ; 0x80 800451a: 6113 str r3, [r2, #16] } 800451c: 4770 bx lr 800451e: bf00 nop 8004520: 40022000 .word 0x40022000 08004524 : { 8004524: b5f8 push {r3, r4, r5, r6, r7, lr} 8004526: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 8004528: f7ff feca bl 80042c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 800452c: 4c11 ldr r4, [pc, #68] ; (8004574 ) uint32_t tickstart = HAL_GetTick(); 800452e: 4607 mov r7, r0 8004530: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8004532: 68e3 ldr r3, [r4, #12] 8004534: 07d8 lsls r0, r3, #31 8004536: d412 bmi.n 800455e if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8004538: 68e3 ldr r3, [r4, #12] 800453a: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 800453c: bf44 itt mi 800453e: 2320 movmi r3, #32 8004540: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8004542: 68eb ldr r3, [r5, #12] 8004544: 06da lsls r2, r3, #27 8004546: d406 bmi.n 8004556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8004548: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 800454a: 07db lsls r3, r3, #31 800454c: d403 bmi.n 8004556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800454e: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8004550: f010 0004 ands.w r0, r0, #4 8004554: d002 beq.n 800455c FLASH_SetErrorCode(); 8004556: f7ff ffa1 bl 800449c return HAL_ERROR; 800455a: 2001 movs r0, #1 } 800455c: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 800455e: 1c73 adds r3, r6, #1 8004560: d0e7 beq.n 8004532 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8004562: b90e cbnz r6, 8004568 return HAL_TIMEOUT; 8004564: 2003 movs r0, #3 8004566: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8004568: f7ff feaa bl 80042c0 800456c: 1bc0 subs r0, r0, r7 800456e: 4286 cmp r6, r0 8004570: d2df bcs.n 8004532 8004572: e7f7 b.n 8004564 8004574: 40022000 .word 0x40022000 08004578 : { 8004578: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 800457c: 4c1f ldr r4, [pc, #124] ; (80045fc ) { 800457e: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8004580: 7e23 ldrb r3, [r4, #24] { 8004582: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8004584: 2b01 cmp r3, #1 { 8004586: 460f mov r7, r1 8004588: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800458a: d033 beq.n 80045f4 800458c: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800458e: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8004592: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8004594: f7ff ffc6 bl 8004524 if(status == HAL_OK) 8004598: bb40 cbnz r0, 80045ec if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800459a: 2d01 cmp r5, #1 800459c: d003 beq.n 80045a6 nbiterations = 4U; 800459e: 2d02 cmp r5, #2 80045a0: bf0c ite eq 80045a2: 2502 moveq r5, #2 80045a4: 2504 movne r5, #4 80045a6: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80045a8: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 80045aa: f8df b054 ldr.w fp, [pc, #84] ; 8004600 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80045ae: 0132 lsls r2, r6, #4 80045b0: 4640 mov r0, r8 80045b2: 4649 mov r1, r9 80045b4: f7ff fe36 bl 8004224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80045b8: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 80045bc: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80045c0: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 80045c2: f043 0301 orr.w r3, r3, #1 80045c6: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 80045ca: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 80045ce: f24c 3050 movw r0, #50000 ; 0xc350 80045d2: f7ff ffa7 bl 8004524 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 80045d6: f8db 3010 ldr.w r3, [fp, #16] 80045da: f023 0301 bic.w r3, r3, #1 80045de: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 80045e2: b918 cbnz r0, 80045ec 80045e4: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 80045e6: b2f3 uxtb r3, r6 80045e8: 429d cmp r5, r3 80045ea: d8e0 bhi.n 80045ae __HAL_UNLOCK(&pFlash); 80045ec: 2300 movs r3, #0 80045ee: 7623 strb r3, [r4, #24] return status; 80045f0: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 80045f4: 2002 movs r0, #2 } 80045f6: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80045fa: bf00 nop 80045fc: 200001f8 .word 0x200001f8 8004600: 40022000 .word 0x40022000 08004604 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8004604: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 8004608: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800460a: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 800460c: 4f6c ldr r7, [pc, #432] ; (80047c0 ) 800460e: 4b6d ldr r3, [pc, #436] ; (80047c4 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8004610: f8df e1b8 ldr.w lr, [pc, #440] ; 80047cc switch (GPIO_Init->Mode) 8004614: f8df c1b8 ldr.w ip, [pc, #440] ; 80047d0 ioposition = (0x01U << position); 8004618: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 800461c: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 800461e: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8004622: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 8004626: 45a0 cmp r8, r4 8004628: f040 8085 bne.w 8004736 switch (GPIO_Init->Mode) 800462c: 684d ldr r5, [r1, #4] 800462e: 2d12 cmp r5, #18 8004630: f000 80b7 beq.w 80047a2 8004634: f200 808d bhi.w 8004752 8004638: 2d02 cmp r5, #2 800463a: f000 80af beq.w 800479c 800463e: f200 8081 bhi.w 8004744 8004642: 2d00 cmp r5, #0 8004644: f000 8091 beq.w 800476a 8004648: 2d01 cmp r5, #1 800464a: f000 80a5 beq.w 8004798 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800464e: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004652: 2cff cmp r4, #255 ; 0xff 8004654: bf93 iteet ls 8004656: 4682 movls sl, r0 8004658: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 800465c: 3d08 subhi r5, #8 800465e: f8d0 b000 ldrls.w fp, [r0] 8004662: bf92 itee ls 8004664: 00b5 lslls r5, r6, #2 8004666: f8d0 b004 ldrhi.w fp, [r0, #4] 800466a: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800466c: fa09 f805 lsl.w r8, r9, r5 8004670: ea2b 0808 bic.w r8, fp, r8 8004674: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004678: bf88 it hi 800467a: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800467e: ea48 0505 orr.w r5, r8, r5 8004682: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8004686: f8d1 a004 ldr.w sl, [r1, #4] 800468a: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 800468e: d052 beq.n 8004736 __HAL_RCC_AFIO_CLK_ENABLE(); 8004690: 69bd ldr r5, [r7, #24] 8004692: f026 0803 bic.w r8, r6, #3 8004696: f045 0501 orr.w r5, r5, #1 800469a: 61bd str r5, [r7, #24] 800469c: 69bd ldr r5, [r7, #24] 800469e: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 80046a2: f005 0501 and.w r5, r5, #1 80046a6: 9501 str r5, [sp, #4] 80046a8: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046ac: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 80046b0: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046b2: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 80046b6: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046ba: fa09 f90b lsl.w r9, r9, fp 80046be: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80046c2: 4d41 ldr r5, [pc, #260] ; (80047c8 ) 80046c4: 42a8 cmp r0, r5 80046c6: d071 beq.n 80047ac 80046c8: f505 6580 add.w r5, r5, #1024 ; 0x400 80046cc: 42a8 cmp r0, r5 80046ce: d06f beq.n 80047b0 80046d0: f505 6580 add.w r5, r5, #1024 ; 0x400 80046d4: 42a8 cmp r0, r5 80046d6: d06d beq.n 80047b4 80046d8: f505 6580 add.w r5, r5, #1024 ; 0x400 80046dc: 42a8 cmp r0, r5 80046de: d06b beq.n 80047b8 80046e0: f505 6580 add.w r5, r5, #1024 ; 0x400 80046e4: 42a8 cmp r0, r5 80046e6: d069 beq.n 80047bc 80046e8: 4570 cmp r0, lr 80046ea: bf0c ite eq 80046ec: 2505 moveq r5, #5 80046ee: 2506 movne r5, #6 80046f0: fa05 f50b lsl.w r5, r5, fp 80046f4: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 80046f8: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 80046fc: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80046fe: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8004702: bf14 ite ne 8004704: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8004706: 43a5 biceq r5, r4 8004708: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 800470a: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 800470c: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8004710: bf14 ite ne 8004712: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8004714: 43a5 biceq r5, r4 8004716: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8004718: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800471a: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 800471e: bf14 ite ne 8004720: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8004722: 43a5 biceq r5, r4 8004724: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8004726: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8004728: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 800472c: bf14 ite ne 800472e: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8004730: ea25 0404 biceq.w r4, r5, r4 8004734: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8004736: 3601 adds r6, #1 8004738: 2e10 cmp r6, #16 800473a: f47f af6d bne.w 8004618 } } } } } 800473e: b003 add sp, #12 8004740: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8004744: 2d03 cmp r5, #3 8004746: d025 beq.n 8004794 8004748: 2d11 cmp r5, #17 800474a: d180 bne.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 800474c: 68ca ldr r2, [r1, #12] 800474e: 3204 adds r2, #4 break; 8004750: e77d b.n 800464e switch (GPIO_Init->Mode) 8004752: 4565 cmp r5, ip 8004754: d009 beq.n 800476a 8004756: d812 bhi.n 800477e 8004758: f8df 9078 ldr.w r9, [pc, #120] ; 80047d4 800475c: 454d cmp r5, r9 800475e: d004 beq.n 800476a 8004760: f509 3980 add.w r9, r9, #65536 ; 0x10000 8004764: 454d cmp r5, r9 8004766: f47f af72 bne.w 800464e if (GPIO_Init->Pull == GPIO_NOPULL) 800476a: 688a ldr r2, [r1, #8] 800476c: b1e2 cbz r2, 80047a8 else if (GPIO_Init->Pull == GPIO_PULLUP) 800476e: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8004770: bf0c ite eq 8004772: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8004776: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 800477a: 2208 movs r2, #8 800477c: e767 b.n 800464e switch (GPIO_Init->Mode) 800477e: f8df 9058 ldr.w r9, [pc, #88] ; 80047d8 8004782: 454d cmp r5, r9 8004784: d0f1 beq.n 800476a 8004786: f509 3980 add.w r9, r9, #65536 ; 0x10000 800478a: 454d cmp r5, r9 800478c: d0ed beq.n 800476a 800478e: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8004792: e7e7 b.n 8004764 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8004794: 2200 movs r2, #0 8004796: e75a b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8004798: 68ca ldr r2, [r1, #12] break; 800479a: e758 b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 800479c: 68ca ldr r2, [r1, #12] 800479e: 3208 adds r2, #8 break; 80047a0: e755 b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80047a2: 68ca ldr r2, [r1, #12] 80047a4: 320c adds r2, #12 break; 80047a6: e752 b.n 800464e config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80047a8: 2204 movs r2, #4 80047aa: e750 b.n 800464e SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80047ac: 2500 movs r5, #0 80047ae: e79f b.n 80046f0 80047b0: 2501 movs r5, #1 80047b2: e79d b.n 80046f0 80047b4: 2502 movs r5, #2 80047b6: e79b b.n 80046f0 80047b8: 2503 movs r5, #3 80047ba: e799 b.n 80046f0 80047bc: 2504 movs r5, #4 80047be: e797 b.n 80046f0 80047c0: 40021000 .word 0x40021000 80047c4: 40010400 .word 0x40010400 80047c8: 40010800 .word 0x40010800 80047cc: 40011c00 .word 0x40011c00 80047d0: 10210000 .word 0x10210000 80047d4: 10110000 .word 0x10110000 80047d8: 10310000 .word 0x10310000 080047dc : GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80047dc: 6883 ldr r3, [r0, #8] 80047de: 4219 tst r1, r3 else { bitstatus = GPIO_PIN_RESET; } return bitstatus; } 80047e0: bf14 ite ne 80047e2: 2001 movne r0, #1 80047e4: 2000 moveq r0, #0 80047e6: 4770 bx lr 080047e8 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80047e8: b10a cbz r2, 80047ee { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 80047ea: 6101 str r1, [r0, #16] 80047ec: 4770 bx lr 80047ee: 0409 lsls r1, r1, #16 80047f0: e7fb b.n 80047ea 080047f2 : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 80047f2: 68c3 ldr r3, [r0, #12] 80047f4: 4059 eors r1, r3 80047f6: 60c1 str r1, [r0, #12] 80047f8: 4770 bx lr ... 080047fc : * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 80047fc: b538 push {r3, r4, r5, lr} uint32_t freqrange = 0U; uint32_t pclk1 = 0U; /* Check the I2C handle allocation */ if(hi2c == NULL) 80047fe: 4604 mov r4, r0 8004800: b908 cbnz r0, 8004806 { return HAL_ERROR; 8004802: 2001 movs r0, #1 8004804: bd38 pop {r3, r4, r5, pc} assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if(hi2c->State == HAL_I2C_STATE_RESET) 8004806: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 800480a: f003 02ff and.w r2, r3, #255 ; 0xff 800480e: b91b cbnz r3, 8004818 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8004810: f880 203c strb.w r2, [r0, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8004814: f001 ffbc bl 8006790 } hi2c->State = HAL_I2C_STATE_BUSY; 8004818: 2324 movs r3, #36 ; 0x24 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 800481a: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 800481c: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8004820: 6813 ldr r3, [r2, #0] 8004822: f023 0301 bic.w r3, r3, #1 8004826: 6013 str r3, [r2, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8004828: f000 fae2 bl 8004df0 /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 800482c: 6863 ldr r3, [r4, #4] 800482e: 4a2f ldr r2, [pc, #188] ; (80048ec ) 8004830: 4293 cmp r3, r2 8004832: d830 bhi.n 8004896 8004834: 4a2e ldr r2, [pc, #184] ; (80048f0 ) 8004836: 4290 cmp r0, r2 8004838: d9e3 bls.n 8004802 { return HAL_ERROR; } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 800483a: 4a2e ldr r2, [pc, #184] ; (80048f4 ) /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->CR2 = freqrange; 800483c: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 800483e: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8004842: 604a str r2, [r1, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004844: 3201 adds r2, #1 8004846: 620a str r2, [r1, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8004848: 4a28 ldr r2, [pc, #160] ; (80048ec ) 800484a: 3801 subs r0, #1 800484c: 4293 cmp r3, r2 800484e: d832 bhi.n 80048b6 8004850: 005b lsls r3, r3, #1 8004852: fbb0 f0f3 udiv r0, r0, r3 8004856: 1c43 adds r3, r0, #1 8004858: f3c3 030b ubfx r3, r3, #0, #12 800485c: 2b04 cmp r3, #4 800485e: bf38 it cc 8004860: 2304 movcc r3, #4 8004862: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004864: 6a22 ldr r2, [r4, #32] 8004866: 69e3 ldr r3, [r4, #28] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004868: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 800486a: 4313 orrs r3, r2 800486c: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 800486e: 68e2 ldr r2, [r4, #12] 8004870: 6923 ldr r3, [r4, #16] 8004872: 4313 orrs r3, r2 8004874: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8004876: 69a2 ldr r2, [r4, #24] 8004878: 6963 ldr r3, [r4, #20] 800487a: 4313 orrs r3, r2 800487c: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 800487e: 680b ldr r3, [r1, #0] 8004880: f043 0301 orr.w r3, r3, #1 8004884: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8004886: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004888: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 800488a: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 800488e: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8004890: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8004894: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8004896: 4a18 ldr r2, [pc, #96] ; (80048f8 ) 8004898: 4290 cmp r0, r2 800489a: d9b2 bls.n 8004802 freqrange = I2C_FREQRANGE(pclk1); 800489c: 4d15 ldr r5, [pc, #84] ; (80048f4 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 800489e: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 80048a2: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 80048a6: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 80048a8: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 80048aa: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 80048ac: f44f 757a mov.w r5, #1000 ; 0x3e8 80048b0: fbb2 f2f5 udiv r2, r2, r5 80048b4: e7c6 b.n 8004844 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 80048b6: 68a2 ldr r2, [r4, #8] 80048b8: b952 cbnz r2, 80048d0 80048ba: eb03 0343 add.w r3, r3, r3, lsl #1 80048be: fbb0 f0f3 udiv r0, r0, r3 80048c2: 1c43 adds r3, r0, #1 80048c4: f3c3 030b ubfx r3, r3, #0, #12 80048c8: b16b cbz r3, 80048e6 80048ca: f443 4300 orr.w r3, r3, #32768 ; 0x8000 80048ce: e7c8 b.n 8004862 80048d0: 2219 movs r2, #25 80048d2: 4353 muls r3, r2 80048d4: fbb0 f0f3 udiv r0, r0, r3 80048d8: 1c43 adds r3, r0, #1 80048da: f3c3 030b ubfx r3, r3, #0, #12 80048de: b113 cbz r3, 80048e6 80048e0: f443 4340 orr.w r3, r3, #49152 ; 0xc000 80048e4: e7bd b.n 8004862 80048e6: 2301 movs r3, #1 80048e8: e7bb b.n 8004862 80048ea: bf00 nop 80048ec: 000186a0 .word 0x000186a0 80048f0: 001e847f .word 0x001e847f 80048f4: 000f4240 .word 0x000f4240 80048f8: 003d08ff .word 0x003d08ff 080048fc : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80048fc: 6803 ldr r3, [r0, #0] { 80048fe: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8004902: 07db lsls r3, r3, #31 { 8004904: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8004906: d410 bmi.n 800492a } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8004908: 682b ldr r3, [r5, #0] 800490a: 079f lsls r7, r3, #30 800490c: d45e bmi.n 80049cc } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800490e: 682b ldr r3, [r5, #0] 8004910: 0719 lsls r1, r3, #28 8004912: f100 8095 bmi.w 8004a40 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8004916: 682b ldr r3, [r5, #0] 8004918: 075a lsls r2, r3, #29 800491a: f100 80bf bmi.w 8004a9c #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 800491e: 69ea ldr r2, [r5, #28] 8004920: 2a00 cmp r2, #0 8004922: f040 812d bne.w 8004b80 { return HAL_ERROR; } } return HAL_OK; 8004926: 2000 movs r0, #0 8004928: e014 b.n 8004954 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 800492a: 4c90 ldr r4, [pc, #576] ; (8004b6c ) 800492c: 6863 ldr r3, [r4, #4] 800492e: f003 030c and.w r3, r3, #12 8004932: 2b04 cmp r3, #4 8004934: d007 beq.n 8004946 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8004936: 6863 ldr r3, [r4, #4] 8004938: f003 030c and.w r3, r3, #12 800493c: 2b08 cmp r3, #8 800493e: d10c bne.n 800495a 8004940: 6863 ldr r3, [r4, #4] 8004942: 03de lsls r6, r3, #15 8004944: d509 bpl.n 800495a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8004946: 6823 ldr r3, [r4, #0] 8004948: 039c lsls r4, r3, #14 800494a: d5dd bpl.n 8004908 800494c: 686b ldr r3, [r5, #4] 800494e: 2b00 cmp r3, #0 8004950: d1da bne.n 8004908 return HAL_ERROR; 8004952: 2001 movs r0, #1 } 8004954: b002 add sp, #8 8004956: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800495a: 686b ldr r3, [r5, #4] 800495c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8004960: d110 bne.n 8004984 8004962: 6823 ldr r3, [r4, #0] 8004964: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8004968: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800496a: f7ff fca9 bl 80042c0 800496e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004970: 6823 ldr r3, [r4, #0] 8004972: 0398 lsls r0, r3, #14 8004974: d4c8 bmi.n 8004908 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8004976: f7ff fca3 bl 80042c0 800497a: 1b80 subs r0, r0, r6 800497c: 2864 cmp r0, #100 ; 0x64 800497e: d9f7 bls.n 8004970 return HAL_TIMEOUT; 8004980: 2003 movs r0, #3 8004982: e7e7 b.n 8004954 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8004984: b99b cbnz r3, 80049ae 8004986: 6823 ldr r3, [r4, #0] 8004988: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800498c: 6023 str r3, [r4, #0] 800498e: 6823 ldr r3, [r4, #0] 8004990: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8004994: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8004996: f7ff fc93 bl 80042c0 800499a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800499c: 6823 ldr r3, [r4, #0] 800499e: 0399 lsls r1, r3, #14 80049a0: d5b2 bpl.n 8004908 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80049a2: f7ff fc8d bl 80042c0 80049a6: 1b80 subs r0, r0, r6 80049a8: 2864 cmp r0, #100 ; 0x64 80049aa: d9f7 bls.n 800499c 80049ac: e7e8 b.n 8004980 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80049ae: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 80049b2: 6823 ldr r3, [r4, #0] 80049b4: d103 bne.n 80049be 80049b6: f443 2380 orr.w r3, r3, #262144 ; 0x40000 80049ba: 6023 str r3, [r4, #0] 80049bc: e7d1 b.n 8004962 80049be: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80049c2: 6023 str r3, [r4, #0] 80049c4: 6823 ldr r3, [r4, #0] 80049c6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80049ca: e7cd b.n 8004968 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80049cc: 4c67 ldr r4, [pc, #412] ; (8004b6c ) 80049ce: 6863 ldr r3, [r4, #4] 80049d0: f013 0f0c tst.w r3, #12 80049d4: d007 beq.n 80049e6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80049d6: 6863 ldr r3, [r4, #4] 80049d8: f003 030c and.w r3, r3, #12 80049dc: 2b08 cmp r3, #8 80049de: d110 bne.n 8004a02 80049e0: 6863 ldr r3, [r4, #4] 80049e2: 03da lsls r2, r3, #15 80049e4: d40d bmi.n 8004a02 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80049e6: 6823 ldr r3, [r4, #0] 80049e8: 079b lsls r3, r3, #30 80049ea: d502 bpl.n 80049f2 80049ec: 692b ldr r3, [r5, #16] 80049ee: 2b01 cmp r3, #1 80049f0: d1af bne.n 8004952 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80049f2: 6823 ldr r3, [r4, #0] 80049f4: 696a ldr r2, [r5, #20] 80049f6: f023 03f8 bic.w r3, r3, #248 ; 0xf8 80049fa: ea43 03c2 orr.w r3, r3, r2, lsl #3 80049fe: 6023 str r3, [r4, #0] 8004a00: e785 b.n 800490e if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8004a02: 692a ldr r2, [r5, #16] 8004a04: 4b5a ldr r3, [pc, #360] ; (8004b70 ) 8004a06: b16a cbz r2, 8004a24 __HAL_RCC_HSI_ENABLE(); 8004a08: 2201 movs r2, #1 8004a0a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a0c: f7ff fc58 bl 80042c0 8004a10: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004a12: 6823 ldr r3, [r4, #0] 8004a14: 079f lsls r7, r3, #30 8004a16: d4ec bmi.n 80049f2 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8004a18: f7ff fc52 bl 80042c0 8004a1c: 1b80 subs r0, r0, r6 8004a1e: 2802 cmp r0, #2 8004a20: d9f7 bls.n 8004a12 8004a22: e7ad b.n 8004980 __HAL_RCC_HSI_DISABLE(); 8004a24: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a26: f7ff fc4b bl 80042c0 8004a2a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8004a2c: 6823 ldr r3, [r4, #0] 8004a2e: 0798 lsls r0, r3, #30 8004a30: f57f af6d bpl.w 800490e if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8004a34: f7ff fc44 bl 80042c0 8004a38: 1b80 subs r0, r0, r6 8004a3a: 2802 cmp r0, #2 8004a3c: d9f6 bls.n 8004a2c 8004a3e: e79f b.n 8004980 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8004a40: 69aa ldr r2, [r5, #24] 8004a42: 4c4a ldr r4, [pc, #296] ; (8004b6c ) 8004a44: 4b4b ldr r3, [pc, #300] ; (8004b74 ) 8004a46: b1da cbz r2, 8004a80 __HAL_RCC_LSI_ENABLE(); 8004a48: 2201 movs r2, #1 8004a4a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a4c: f7ff fc38 bl 80042c0 8004a50: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8004a52: 6a63 ldr r3, [r4, #36] ; 0x24 8004a54: 079b lsls r3, r3, #30 8004a56: d50d bpl.n 8004a74 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8004a58: f44f 52fa mov.w r2, #8000 ; 0x1f40 8004a5c: 4b46 ldr r3, [pc, #280] ; (8004b78 ) 8004a5e: 681b ldr r3, [r3, #0] 8004a60: fbb3 f3f2 udiv r3, r3, r2 8004a64: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8004a66: bf00 nop do { __NOP(); } while (Delay --); 8004a68: 9b01 ldr r3, [sp, #4] 8004a6a: 1e5a subs r2, r3, #1 8004a6c: 9201 str r2, [sp, #4] 8004a6e: 2b00 cmp r3, #0 8004a70: d1f9 bne.n 8004a66 8004a72: e750 b.n 8004916 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8004a74: f7ff fc24 bl 80042c0 8004a78: 1b80 subs r0, r0, r6 8004a7a: 2802 cmp r0, #2 8004a7c: d9e9 bls.n 8004a52 8004a7e: e77f b.n 8004980 __HAL_RCC_LSI_DISABLE(); 8004a80: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a82: f7ff fc1d bl 80042c0 8004a86: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8004a88: 6a63 ldr r3, [r4, #36] ; 0x24 8004a8a: 079f lsls r7, r3, #30 8004a8c: f57f af43 bpl.w 8004916 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8004a90: f7ff fc16 bl 80042c0 8004a94: 1b80 subs r0, r0, r6 8004a96: 2802 cmp r0, #2 8004a98: d9f6 bls.n 8004a88 8004a9a: e771 b.n 8004980 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8004a9c: 4c33 ldr r4, [pc, #204] ; (8004b6c ) 8004a9e: 69e3 ldr r3, [r4, #28] 8004aa0: 00d8 lsls r0, r3, #3 8004aa2: d424 bmi.n 8004aee pwrclkchanged = SET; 8004aa4: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8004aa6: 69e3 ldr r3, [r4, #28] 8004aa8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8004aac: 61e3 str r3, [r4, #28] 8004aae: 69e3 ldr r3, [r4, #28] 8004ab0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8004ab4: 9300 str r3, [sp, #0] 8004ab6: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004ab8: 4e30 ldr r6, [pc, #192] ; (8004b7c ) 8004aba: 6833 ldr r3, [r6, #0] 8004abc: 05d9 lsls r1, r3, #23 8004abe: d518 bpl.n 8004af2 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004ac0: 68eb ldr r3, [r5, #12] 8004ac2: 2b01 cmp r3, #1 8004ac4: d126 bne.n 8004b14 8004ac6: 6a23 ldr r3, [r4, #32] 8004ac8: f043 0301 orr.w r3, r3, #1 8004acc: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8004ace: f7ff fbf7 bl 80042c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004ad2: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8004ad6: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8004ad8: 6a23 ldr r3, [r4, #32] 8004ada: 079b lsls r3, r3, #30 8004adc: d53f bpl.n 8004b5e if(pwrclkchanged == SET) 8004ade: 2f00 cmp r7, #0 8004ae0: f43f af1d beq.w 800491e __HAL_RCC_PWR_CLK_DISABLE(); 8004ae4: 69e3 ldr r3, [r4, #28] 8004ae6: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8004aea: 61e3 str r3, [r4, #28] 8004aec: e717 b.n 800491e FlagStatus pwrclkchanged = RESET; 8004aee: 2700 movs r7, #0 8004af0: e7e2 b.n 8004ab8 SET_BIT(PWR->CR, PWR_CR_DBP); 8004af2: 6833 ldr r3, [r6, #0] 8004af4: f443 7380 orr.w r3, r3, #256 ; 0x100 8004af8: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8004afa: f7ff fbe1 bl 80042c0 8004afe: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004b00: 6833 ldr r3, [r6, #0] 8004b02: 05da lsls r2, r3, #23 8004b04: d4dc bmi.n 8004ac0 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8004b06: f7ff fbdb bl 80042c0 8004b0a: eba0 0008 sub.w r0, r0, r8 8004b0e: 2864 cmp r0, #100 ; 0x64 8004b10: d9f6 bls.n 8004b00 8004b12: e735 b.n 8004980 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b14: b9ab cbnz r3, 8004b42 8004b16: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b18: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b1c: f023 0301 bic.w r3, r3, #1 8004b20: 6223 str r3, [r4, #32] 8004b22: 6a23 ldr r3, [r4, #32] 8004b24: f023 0304 bic.w r3, r3, #4 8004b28: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8004b2a: f7ff fbc9 bl 80042c0 8004b2e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8004b30: 6a23 ldr r3, [r4, #32] 8004b32: 0798 lsls r0, r3, #30 8004b34: d5d3 bpl.n 8004ade if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b36: f7ff fbc3 bl 80042c0 8004b3a: 1b80 subs r0, r0, r6 8004b3c: 4540 cmp r0, r8 8004b3e: d9f7 bls.n 8004b30 8004b40: e71e b.n 8004980 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b42: 2b05 cmp r3, #5 8004b44: 6a23 ldr r3, [r4, #32] 8004b46: d103 bne.n 8004b50 8004b48: f043 0304 orr.w r3, r3, #4 8004b4c: 6223 str r3, [r4, #32] 8004b4e: e7ba b.n 8004ac6 8004b50: f023 0301 bic.w r3, r3, #1 8004b54: 6223 str r3, [r4, #32] 8004b56: 6a23 ldr r3, [r4, #32] 8004b58: f023 0304 bic.w r3, r3, #4 8004b5c: e7b6 b.n 8004acc if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b5e: f7ff fbaf bl 80042c0 8004b62: eba0 0008 sub.w r0, r0, r8 8004b66: 42b0 cmp r0, r6 8004b68: d9b6 bls.n 8004ad8 8004b6a: e709 b.n 8004980 8004b6c: 40021000 .word 0x40021000 8004b70: 42420000 .word 0x42420000 8004b74: 42420480 .word 0x42420480 8004b78: 20000008 .word 0x20000008 8004b7c: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8004b80: 4c22 ldr r4, [pc, #136] ; (8004c0c ) 8004b82: 6863 ldr r3, [r4, #4] 8004b84: f003 030c and.w r3, r3, #12 8004b88: 2b08 cmp r3, #8 8004b8a: f43f aee2 beq.w 8004952 8004b8e: 2300 movs r3, #0 8004b90: 4e1f ldr r6, [pc, #124] ; (8004c10 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8004b92: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8004b94: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8004b96: d12b bne.n 8004bf0 tickstart = HAL_GetTick(); 8004b98: f7ff fb92 bl 80042c0 8004b9c: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004b9e: 6823 ldr r3, [r4, #0] 8004ba0: 0199 lsls r1, r3, #6 8004ba2: d41f bmi.n 8004be4 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8004ba4: 6a2b ldr r3, [r5, #32] 8004ba6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8004baa: d105 bne.n 8004bb8 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8004bac: 6862 ldr r2, [r4, #4] 8004bae: 68a9 ldr r1, [r5, #8] 8004bb0: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8004bb4: 430a orrs r2, r1 8004bb6: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8004bb8: 6a69 ldr r1, [r5, #36] ; 0x24 8004bba: 6862 ldr r2, [r4, #4] 8004bbc: 430b orrs r3, r1 8004bbe: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8004bc2: 4313 orrs r3, r2 8004bc4: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8004bc6: 2301 movs r3, #1 8004bc8: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8004bca: f7ff fb79 bl 80042c0 8004bce: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004bd0: 6823 ldr r3, [r4, #0] 8004bd2: 019a lsls r2, r3, #6 8004bd4: f53f aea7 bmi.w 8004926 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004bd8: f7ff fb72 bl 80042c0 8004bdc: 1b40 subs r0, r0, r5 8004bde: 2802 cmp r0, #2 8004be0: d9f6 bls.n 8004bd0 8004be2: e6cd b.n 8004980 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004be4: f7ff fb6c bl 80042c0 8004be8: 1bc0 subs r0, r0, r7 8004bea: 2802 cmp r0, #2 8004bec: d9d7 bls.n 8004b9e 8004bee: e6c7 b.n 8004980 tickstart = HAL_GetTick(); 8004bf0: f7ff fb66 bl 80042c0 8004bf4: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004bf6: 6823 ldr r3, [r4, #0] 8004bf8: 019b lsls r3, r3, #6 8004bfa: f57f ae94 bpl.w 8004926 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004bfe: f7ff fb5f bl 80042c0 8004c02: 1b40 subs r0, r0, r5 8004c04: 2802 cmp r0, #2 8004c06: d9f6 bls.n 8004bf6 8004c08: e6ba b.n 8004980 8004c0a: bf00 nop 8004c0c: 40021000 .word 0x40021000 8004c10: 42420060 .word 0x42420060 08004c14 : { 8004c14: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8004c16: 4b19 ldr r3, [pc, #100] ; (8004c7c ) { 8004c18: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8004c1a: ac02 add r4, sp, #8 8004c1c: f103 0510 add.w r5, r3, #16 8004c20: 4622 mov r2, r4 8004c22: 6818 ldr r0, [r3, #0] 8004c24: 6859 ldr r1, [r3, #4] 8004c26: 3308 adds r3, #8 8004c28: c203 stmia r2!, {r0, r1} 8004c2a: 42ab cmp r3, r5 8004c2c: 4614 mov r4, r2 8004c2e: d1f7 bne.n 8004c20 const uint8_t aPredivFactorTable[2] = {1, 2}; 8004c30: 2301 movs r3, #1 8004c32: f88d 3004 strb.w r3, [sp, #4] 8004c36: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8004c38: 4911 ldr r1, [pc, #68] ; (8004c80 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8004c3a: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8004c3e: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8004c40: f003 020c and.w r2, r3, #12 8004c44: 2a08 cmp r2, #8 8004c46: d117 bne.n 8004c78 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8004c48: f3c3 4283 ubfx r2, r3, #18, #4 8004c4c: a806 add r0, sp, #24 8004c4e: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8004c50: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8004c52: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8004c56: d50c bpl.n 8004c72 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c58: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c5a: 480a ldr r0, [pc, #40] ; (8004c84 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c5c: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c60: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c62: aa06 add r2, sp, #24 8004c64: 4413 add r3, r2 8004c66: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c6a: fbb0 f0f3 udiv r0, r0, r3 } 8004c6e: b007 add sp, #28 8004c70: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8004c72: 4805 ldr r0, [pc, #20] ; (8004c88 ) 8004c74: 4350 muls r0, r2 8004c76: e7fa b.n 8004c6e sysclockfreq = HSE_VALUE; 8004c78: 4802 ldr r0, [pc, #8] ; (8004c84 ) return sysclockfreq; 8004c7a: e7f8 b.n 8004c6e 8004c7c: 08007af0 .word 0x08007af0 8004c80: 40021000 .word 0x40021000 8004c84: 007a1200 .word 0x007a1200 8004c88: 003d0900 .word 0x003d0900 08004c8c : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c8c: 4a54 ldr r2, [pc, #336] ; (8004de0 ) { 8004c8e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c92: 6813 ldr r3, [r2, #0] { 8004c94: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c96: f003 0307 and.w r3, r3, #7 8004c9a: 428b cmp r3, r1 { 8004c9c: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c9e: d32a bcc.n 8004cf6 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8004ca0: 6829 ldr r1, [r5, #0] 8004ca2: 078c lsls r4, r1, #30 8004ca4: d434 bmi.n 8004d10 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8004ca6: 07ca lsls r2, r1, #31 8004ca8: d447 bmi.n 8004d3a if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8004caa: 4a4d ldr r2, [pc, #308] ; (8004de0 ) 8004cac: 6813 ldr r3, [r2, #0] 8004cae: f003 0307 and.w r3, r3, #7 8004cb2: 429e cmp r6, r3 8004cb4: f0c0 8082 bcc.w 8004dbc if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8004cb8: 682a ldr r2, [r5, #0] 8004cba: 4c4a ldr r4, [pc, #296] ; (8004de4 ) 8004cbc: f012 0f04 tst.w r2, #4 8004cc0: f040 8087 bne.w 8004dd2 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8004cc4: 0713 lsls r3, r2, #28 8004cc6: d506 bpl.n 8004cd6 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8004cc8: 6863 ldr r3, [r4, #4] 8004cca: 692a ldr r2, [r5, #16] 8004ccc: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8004cd0: ea43 03c2 orr.w r3, r3, r2, lsl #3 8004cd4: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8004cd6: f7ff ff9d bl 8004c14 8004cda: 6863 ldr r3, [r4, #4] 8004cdc: 4a42 ldr r2, [pc, #264] ; (8004de8 ) 8004cde: f3c3 1303 ubfx r3, r3, #4, #4 8004ce2: 5cd3 ldrb r3, [r2, r3] 8004ce4: 40d8 lsrs r0, r3 8004ce6: 4b41 ldr r3, [pc, #260] ; (8004dec ) 8004ce8: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8004cea: 2000 movs r0, #0 8004cec: f7ff faa6 bl 800423c return HAL_OK; 8004cf0: 2000 movs r0, #0 } 8004cf2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8004cf6: 6813 ldr r3, [r2, #0] 8004cf8: f023 0307 bic.w r3, r3, #7 8004cfc: 430b orrs r3, r1 8004cfe: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8004d00: 6813 ldr r3, [r2, #0] 8004d02: f003 0307 and.w r3, r3, #7 8004d06: 4299 cmp r1, r3 8004d08: d0ca beq.n 8004ca0 return HAL_ERROR; 8004d0a: 2001 movs r0, #1 8004d0c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8004d10: 4b34 ldr r3, [pc, #208] ; (8004de4 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8004d12: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8004d16: bf1e ittt ne 8004d18: 685a ldrne r2, [r3, #4] 8004d1a: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8004d1e: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8004d20: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8004d22: bf42 ittt mi 8004d24: 685a ldrmi r2, [r3, #4] 8004d26: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8004d2a: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8004d2c: 685a ldr r2, [r3, #4] 8004d2e: 68a8 ldr r0, [r5, #8] 8004d30: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8004d34: 4302 orrs r2, r0 8004d36: 605a str r2, [r3, #4] 8004d38: e7b5 b.n 8004ca6 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d3a: 686a ldr r2, [r5, #4] 8004d3c: 4c29 ldr r4, [pc, #164] ; (8004de4 ) 8004d3e: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004d40: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d42: d11c bne.n 8004d7e if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004d44: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004d48: d0df beq.n 8004d0a __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8004d4a: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d4c: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8004d50: f023 0303 bic.w r3, r3, #3 8004d54: 4313 orrs r3, r2 8004d56: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8004d58: f7ff fab2 bl 80042c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d5c: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 8004d5e: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d60: 2b01 cmp r3, #1 8004d62: d114 bne.n 8004d8e while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8004d64: 6863 ldr r3, [r4, #4] 8004d66: f003 030c and.w r3, r3, #12 8004d6a: 2b04 cmp r3, #4 8004d6c: d09d beq.n 8004caa if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d6e: f7ff faa7 bl 80042c0 8004d72: 1bc0 subs r0, r0, r7 8004d74: 4540 cmp r0, r8 8004d76: d9f5 bls.n 8004d64 return HAL_TIMEOUT; 8004d78: 2003 movs r0, #3 8004d7a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8004d7e: 2a02 cmp r2, #2 8004d80: d102 bne.n 8004d88 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004d82: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8004d86: e7df b.n 8004d48 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004d88: f013 0f02 tst.w r3, #2 8004d8c: e7dc b.n 8004d48 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8004d8e: 2b02 cmp r3, #2 8004d90: d10f bne.n 8004db2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8004d92: 6863 ldr r3, [r4, #4] 8004d94: f003 030c and.w r3, r3, #12 8004d98: 2b08 cmp r3, #8 8004d9a: d086 beq.n 8004caa if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d9c: f7ff fa90 bl 80042c0 8004da0: 1bc0 subs r0, r0, r7 8004da2: 4540 cmp r0, r8 8004da4: d9f5 bls.n 8004d92 8004da6: e7e7 b.n 8004d78 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004da8: f7ff fa8a bl 80042c0 8004dac: 1bc0 subs r0, r0, r7 8004dae: 4540 cmp r0, r8 8004db0: d8e2 bhi.n 8004d78 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8004db2: 6863 ldr r3, [r4, #4] 8004db4: f013 0f0c tst.w r3, #12 8004db8: d1f6 bne.n 8004da8 8004dba: e776 b.n 8004caa __HAL_FLASH_SET_LATENCY(FLatency); 8004dbc: 6813 ldr r3, [r2, #0] 8004dbe: f023 0307 bic.w r3, r3, #7 8004dc2: 4333 orrs r3, r6 8004dc4: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8004dc6: 6813 ldr r3, [r2, #0] 8004dc8: f003 0307 and.w r3, r3, #7 8004dcc: 429e cmp r6, r3 8004dce: d19c bne.n 8004d0a 8004dd0: e772 b.n 8004cb8 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8004dd2: 6863 ldr r3, [r4, #4] 8004dd4: 68e9 ldr r1, [r5, #12] 8004dd6: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8004dda: 430b orrs r3, r1 8004ddc: 6063 str r3, [r4, #4] 8004dde: e771 b.n 8004cc4 8004de0: 40022000 .word 0x40022000 8004de4: 40021000 .word 0x40021000 8004de8: 08007c36 .word 0x08007c36 8004dec: 20000008 .word 0x20000008 08004df0 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8004df0: 4b04 ldr r3, [pc, #16] ; (8004e04 ) 8004df2: 4a05 ldr r2, [pc, #20] ; (8004e08 ) 8004df4: 685b ldr r3, [r3, #4] 8004df6: f3c3 2302 ubfx r3, r3, #8, #3 8004dfa: 5cd3 ldrb r3, [r2, r3] 8004dfc: 4a03 ldr r2, [pc, #12] ; (8004e0c ) 8004dfe: 6810 ldr r0, [r2, #0] } 8004e00: 40d8 lsrs r0, r3 8004e02: 4770 bx lr 8004e04: 40021000 .word 0x40021000 8004e08: 08007c46 .word 0x08007c46 8004e0c: 20000008 .word 0x20000008 08004e10 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8004e10: 4b04 ldr r3, [pc, #16] ; (8004e24 ) 8004e12: 4a05 ldr r2, [pc, #20] ; (8004e28 ) 8004e14: 685b ldr r3, [r3, #4] 8004e16: f3c3 23c2 ubfx r3, r3, #11, #3 8004e1a: 5cd3 ldrb r3, [r2, r3] 8004e1c: 4a03 ldr r2, [pc, #12] ; (8004e2c ) 8004e1e: 6810 ldr r0, [r2, #0] } 8004e20: 40d8 lsrs r0, r3 8004e22: 4770 bx lr 8004e24: 40021000 .word 0x40021000 8004e28: 08007c46 .word 0x08007c46 8004e2c: 20000008 .word 0x20000008 08004e30 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8004e30: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 8004e32: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8004e34: 68da ldr r2, [r3, #12] 8004e36: f042 0201 orr.w r2, r2, #1 8004e3a: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 8004e3c: 681a ldr r2, [r3, #0] 8004e3e: f042 0201 orr.w r2, r2, #1 8004e42: 601a str r2, [r3, #0] } 8004e44: 4770 bx lr 08004e46 : 8004e46: 4770 bx lr 08004e48 : 8004e48: 4770 bx lr 08004e4a : 8004e4a: 4770 bx lr 08004e4c : 8004e4c: 4770 bx lr 08004e4e : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004e4e: 6803 ldr r3, [r0, #0] { 8004e50: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004e52: 691a ldr r2, [r3, #16] { 8004e54: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004e56: 0791 lsls r1, r2, #30 8004e58: d50e bpl.n 8004e78 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 8004e5a: 68da ldr r2, [r3, #12] 8004e5c: 0792 lsls r2, r2, #30 8004e5e: d50b bpl.n 8004e78 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 8004e60: f06f 0202 mvn.w r2, #2 8004e64: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8004e66: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004e68: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8004e6a: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004e6c: 079b lsls r3, r3, #30 8004e6e: d077 beq.n 8004f60 { HAL_TIM_IC_CaptureCallback(htim); 8004e70: f7ff ffea bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004e74: 2300 movs r3, #0 8004e76: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8004e78: 6823 ldr r3, [r4, #0] 8004e7a: 691a ldr r2, [r3, #16] 8004e7c: 0750 lsls r0, r2, #29 8004e7e: d510 bpl.n 8004ea2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8004e80: 68da ldr r2, [r3, #12] 8004e82: 0751 lsls r1, r2, #29 8004e84: d50d bpl.n 8004ea2 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8004e86: f06f 0204 mvn.w r2, #4 8004e8a: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004e8c: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004e8e: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004e90: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004e92: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8004e96: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004e98: d068 beq.n 8004f6c HAL_TIM_IC_CaptureCallback(htim); 8004e9a: f7ff ffd5 bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004e9e: 2300 movs r3, #0 8004ea0: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8004ea2: 6823 ldr r3, [r4, #0] 8004ea4: 691a ldr r2, [r3, #16] 8004ea6: 0712 lsls r2, r2, #28 8004ea8: d50f bpl.n 8004eca { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8004eaa: 68da ldr r2, [r3, #12] 8004eac: 0710 lsls r0, r2, #28 8004eae: d50c bpl.n 8004eca { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8004eb0: f06f 0208 mvn.w r2, #8 8004eb4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004eb6: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004eb8: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004eba: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004ebc: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8004ebe: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004ec0: d05a beq.n 8004f78 HAL_TIM_IC_CaptureCallback(htim); 8004ec2: f7ff ffc1 bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004ec6: 2300 movs r3, #0 8004ec8: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8004eca: 6823 ldr r3, [r4, #0] 8004ecc: 691a ldr r2, [r3, #16] 8004ece: 06d2 lsls r2, r2, #27 8004ed0: d510 bpl.n 8004ef4 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8004ed2: 68da ldr r2, [r3, #12] 8004ed4: 06d0 lsls r0, r2, #27 8004ed6: d50d bpl.n 8004ef4 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8004ed8: f06f 0210 mvn.w r2, #16 8004edc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8004ede: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004ee0: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8004ee2: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004ee4: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8004ee8: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004eea: d04b beq.n 8004f84 HAL_TIM_IC_CaptureCallback(htim); 8004eec: f7ff ffac bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004ef0: 2300 movs r3, #0 8004ef2: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8004ef4: 6823 ldr r3, [r4, #0] 8004ef6: 691a ldr r2, [r3, #16] 8004ef8: 07d1 lsls r1, r2, #31 8004efa: d508 bpl.n 8004f0e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8004efc: 68da ldr r2, [r3, #12] 8004efe: 07d2 lsls r2, r2, #31 8004f00: d505 bpl.n 8004f0e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004f02: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8004f06: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004f08: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8004f0a: f000 ffa1 bl 8005e50 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8004f0e: 6823 ldr r3, [r4, #0] 8004f10: 691a ldr r2, [r3, #16] 8004f12: 0610 lsls r0, r2, #24 8004f14: d508 bpl.n 8004f28 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 8004f16: 68da ldr r2, [r3, #12] 8004f18: 0611 lsls r1, r2, #24 8004f1a: d505 bpl.n 8004f28 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004f1c: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8004f20: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004f22: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 8004f24: f000 f8bf bl 80050a6 } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8004f28: 6823 ldr r3, [r4, #0] 8004f2a: 691a ldr r2, [r3, #16] 8004f2c: 0652 lsls r2, r2, #25 8004f2e: d508 bpl.n 8004f42 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8004f30: 68da ldr r2, [r3, #12] 8004f32: 0650 lsls r0, r2, #25 8004f34: d505 bpl.n 8004f42 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8004f36: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 8004f3a: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8004f3c: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 8004f3e: f7ff ff85 bl 8004e4c } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 8004f42: 6823 ldr r3, [r4, #0] 8004f44: 691a ldr r2, [r3, #16] 8004f46: 0691 lsls r1, r2, #26 8004f48: d522 bpl.n 8004f90 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 8004f4a: 68da ldr r2, [r3, #12] 8004f4c: 0692 lsls r2, r2, #26 8004f4e: d51f bpl.n 8004f90 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004f50: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 8004f54: 4620 mov r0, r4 } } } 8004f56: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004f5a: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 8004f5c: f000 b8a2 b.w 80050a4 HAL_TIM_OC_DelayElapsedCallback(htim); 8004f60: f7ff ff71 bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f64: 4620 mov r0, r4 8004f66: f7ff ff70 bl 8004e4a 8004f6a: e783 b.n 8004e74 HAL_TIM_OC_DelayElapsedCallback(htim); 8004f6c: f7ff ff6b bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f70: 4620 mov r0, r4 8004f72: f7ff ff6a bl 8004e4a 8004f76: e792 b.n 8004e9e HAL_TIM_OC_DelayElapsedCallback(htim); 8004f78: f7ff ff65 bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f7c: 4620 mov r0, r4 8004f7e: f7ff ff64 bl 8004e4a 8004f82: e7a0 b.n 8004ec6 HAL_TIM_OC_DelayElapsedCallback(htim); 8004f84: f7ff ff5f bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f88: 4620 mov r0, r4 8004f8a: f7ff ff5e bl 8004e4a 8004f8e: e7af b.n 8004ef0 8004f90: bd10 pop {r4, pc} ... 08004f94 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004f94: 4a24 ldr r2, [pc, #144] ; (8005028 ) tmpcr1 = TIMx->CR1; 8004f96: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004f98: 4290 cmp r0, r2 8004f9a: d012 beq.n 8004fc2 8004f9c: f502 6200 add.w r2, r2, #2048 ; 0x800 8004fa0: 4290 cmp r0, r2 8004fa2: d00e beq.n 8004fc2 8004fa4: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8004fa8: d00b beq.n 8004fc2 8004faa: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8004fae: 4290 cmp r0, r2 8004fb0: d007 beq.n 8004fc2 8004fb2: f502 6280 add.w r2, r2, #1024 ; 0x400 8004fb6: 4290 cmp r0, r2 8004fb8: d003 beq.n 8004fc2 8004fba: f502 6280 add.w r2, r2, #1024 ; 0x400 8004fbe: 4290 cmp r0, r2 8004fc0: d11d bne.n 8004ffe { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8004fc2: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8004fc4: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8004fc8: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8004fca: 4a17 ldr r2, [pc, #92] ; (8005028 ) 8004fcc: 4290 cmp r0, r2 8004fce: d012 beq.n 8004ff6 8004fd0: f502 6200 add.w r2, r2, #2048 ; 0x800 8004fd4: 4290 cmp r0, r2 8004fd6: d00e beq.n 8004ff6 8004fd8: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8004fdc: d00b beq.n 8004ff6 8004fde: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8004fe2: 4290 cmp r0, r2 8004fe4: d007 beq.n 8004ff6 8004fe6: f502 6280 add.w r2, r2, #1024 ; 0x400 8004fea: 4290 cmp r0, r2 8004fec: d003 beq.n 8004ff6 8004fee: f502 6280 add.w r2, r2, #1024 ; 0x400 8004ff2: 4290 cmp r0, r2 8004ff4: d103 bne.n 8004ffe { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 8004ff6: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8004ff8: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8004ffc: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8004ffe: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8005000: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8005004: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 8005006: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8005008: 688b ldr r3, [r1, #8] 800500a: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 800500c: 680b ldr r3, [r1, #0] 800500e: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8005010: 4b05 ldr r3, [pc, #20] ; (8005028 ) 8005012: 4298 cmp r0, r3 8005014: d003 beq.n 800501e 8005016: f503 6300 add.w r3, r3, #2048 ; 0x800 800501a: 4298 cmp r0, r3 800501c: d101 bne.n 8005022 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 800501e: 690b ldr r3, [r1, #16] 8005020: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 8005022: 2301 movs r3, #1 8005024: 6143 str r3, [r0, #20] 8005026: 4770 bx lr 8005028: 40012c00 .word 0x40012c00 0800502c : { 800502c: b510 push {r4, lr} if(htim == NULL) 800502e: 4604 mov r4, r0 8005030: b1a0 cbz r0, 800505c if(htim->State == HAL_TIM_STATE_RESET) 8005032: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8005036: f003 02ff and.w r2, r3, #255 ; 0xff 800503a: b91b cbnz r3, 8005044 htim->Lock = HAL_UNLOCKED; 800503c: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 8005040: f001 fbd8 bl 80067f4 htim->State= HAL_TIM_STATE_BUSY; 8005044: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 8005046: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 8005048: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 800504c: 1d21 adds r1, r4, #4 800504e: f7ff ffa1 bl 8004f94 htim->State= HAL_TIM_STATE_READY; 8005052: 2301 movs r3, #1 return HAL_OK; 8005054: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 8005056: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 800505a: bd10 pop {r4, pc} return HAL_ERROR; 800505c: 2001 movs r0, #1 } 800505e: bd10 pop {r4, pc} 08005060 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 8005060: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 8005064: b510 push {r4, lr} __HAL_LOCK(htim); 8005066: 2b01 cmp r3, #1 8005068: f04f 0302 mov.w r3, #2 800506c: d018 beq.n 80050a0 htim->State = HAL_TIM_STATE_BUSY; 800506e: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 8005072: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8005074: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 8005076: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8005078: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 800507a: f022 0270 bic.w r2, r2, #112 ; 0x70 800507e: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8005080: 685a ldr r2, [r3, #4] 8005082: 4322 orrs r2, r4 8005084: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 8005086: 689a ldr r2, [r3, #8] 8005088: f022 0280 bic.w r2, r2, #128 ; 0x80 800508c: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 800508e: 689a ldr r2, [r3, #8] 8005090: 430a orrs r2, r1 8005092: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 8005094: 2301 movs r3, #1 8005096: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 800509a: 2300 movs r3, #0 800509c: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 80050a0: 4618 mov r0, r3 return HAL_OK; } 80050a2: bd10 pop {r4, pc} 080050a4 : 80050a4: 4770 bx lr 080050a6 : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 80050a6: 4770 bx lr 080050a8 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80050a8: 6803 ldr r3, [r0, #0] 80050aa: 68da ldr r2, [r3, #12] 80050ac: f422 7290 bic.w r2, r2, #288 ; 0x120 80050b0: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80050b2: 695a ldr r2, [r3, #20] 80050b4: f022 0201 bic.w r2, r2, #1 80050b8: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80050ba: 2320 movs r3, #32 80050bc: f880 303a strb.w r3, [r0, #58] ; 0x3a 80050c0: 4770 bx lr ... 080050c4 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80050c4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80050c8: 6805 ldr r5, [r0, #0] 80050ca: 68c2 ldr r2, [r0, #12] 80050cc: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050ce: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80050d0: f423 5340 bic.w r3, r3, #12288 ; 0x3000 80050d4: 4313 orrs r3, r2 80050d6: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050d8: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 80050da: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050dc: 430b orrs r3, r1 80050de: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 80050e0: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 80050e4: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050e8: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 80050ea: 4313 orrs r3, r2 80050ec: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 80050ee: 696b ldr r3, [r5, #20] 80050f0: 6982 ldr r2, [r0, #24] 80050f2: f423 7340 bic.w r3, r3, #768 ; 0x300 80050f6: 4313 orrs r3, r2 80050f8: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 80050fa: 4b40 ldr r3, [pc, #256] ; (80051fc ) { 80050fc: 4681 mov r9, r0 if(huart->Instance == USART1) 80050fe: 429d cmp r5, r3 8005100: f04f 0419 mov.w r4, #25 8005104: d146 bne.n 8005194 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8005106: f7ff fe83 bl 8004e10 800510a: fb04 f300 mul.w r3, r4, r0 800510e: f8d9 6004 ldr.w r6, [r9, #4] 8005112: f04f 0864 mov.w r8, #100 ; 0x64 8005116: 00b6 lsls r6, r6, #2 8005118: fbb3 f3f6 udiv r3, r3, r6 800511c: fbb3 f3f8 udiv r3, r3, r8 8005120: 011e lsls r6, r3, #4 8005122: f7ff fe75 bl 8004e10 8005126: 4360 muls r0, r4 8005128: f8d9 3004 ldr.w r3, [r9, #4] 800512c: 009b lsls r3, r3, #2 800512e: fbb0 f7f3 udiv r7, r0, r3 8005132: f7ff fe6d bl 8004e10 8005136: 4360 muls r0, r4 8005138: f8d9 3004 ldr.w r3, [r9, #4] 800513c: 009b lsls r3, r3, #2 800513e: fbb0 f3f3 udiv r3, r0, r3 8005142: fbb3 f3f8 udiv r3, r3, r8 8005146: fb08 7313 mls r3, r8, r3, r7 800514a: 011b lsls r3, r3, #4 800514c: 3332 adds r3, #50 ; 0x32 800514e: fbb3 f3f8 udiv r3, r3, r8 8005152: f003 07f0 and.w r7, r3, #240 ; 0xf0 8005156: f7ff fe5b bl 8004e10 800515a: 4360 muls r0, r4 800515c: f8d9 2004 ldr.w r2, [r9, #4] 8005160: 0092 lsls r2, r2, #2 8005162: fbb0 faf2 udiv sl, r0, r2 8005166: f7ff fe53 bl 8004e10 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 800516a: 4360 muls r0, r4 800516c: f8d9 3004 ldr.w r3, [r9, #4] 8005170: 009b lsls r3, r3, #2 8005172: fbb0 f3f3 udiv r3, r0, r3 8005176: fbb3 f3f8 udiv r3, r3, r8 800517a: fb08 a313 mls r3, r8, r3, sl 800517e: 011b lsls r3, r3, #4 8005180: 3332 adds r3, #50 ; 0x32 8005182: fbb3 f3f8 udiv r3, r3, r8 8005186: f003 030f and.w r3, r3, #15 800518a: 433b orrs r3, r7 800518c: 4433 add r3, r6 800518e: 60ab str r3, [r5, #8] 8005190: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8005194: f7ff fe2c bl 8004df0 8005198: fb04 f300 mul.w r3, r4, r0 800519c: f8d9 6004 ldr.w r6, [r9, #4] 80051a0: f04f 0864 mov.w r8, #100 ; 0x64 80051a4: 00b6 lsls r6, r6, #2 80051a6: fbb3 f3f6 udiv r3, r3, r6 80051aa: fbb3 f3f8 udiv r3, r3, r8 80051ae: 011e lsls r6, r3, #4 80051b0: f7ff fe1e bl 8004df0 80051b4: 4360 muls r0, r4 80051b6: f8d9 3004 ldr.w r3, [r9, #4] 80051ba: 009b lsls r3, r3, #2 80051bc: fbb0 f7f3 udiv r7, r0, r3 80051c0: f7ff fe16 bl 8004df0 80051c4: 4360 muls r0, r4 80051c6: f8d9 3004 ldr.w r3, [r9, #4] 80051ca: 009b lsls r3, r3, #2 80051cc: fbb0 f3f3 udiv r3, r0, r3 80051d0: fbb3 f3f8 udiv r3, r3, r8 80051d4: fb08 7313 mls r3, r8, r3, r7 80051d8: 011b lsls r3, r3, #4 80051da: 3332 adds r3, #50 ; 0x32 80051dc: fbb3 f3f8 udiv r3, r3, r8 80051e0: f003 07f0 and.w r7, r3, #240 ; 0xf0 80051e4: f7ff fe04 bl 8004df0 80051e8: 4360 muls r0, r4 80051ea: f8d9 2004 ldr.w r2, [r9, #4] 80051ee: 0092 lsls r2, r2, #2 80051f0: fbb0 faf2 udiv sl, r0, r2 80051f4: f7ff fdfc bl 8004df0 80051f8: e7b7 b.n 800516a 80051fa: bf00 nop 80051fc: 40013800 .word 0x40013800 08005200 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8005200: b5f8 push {r3, r4, r5, r6, r7, lr} 8005202: 4604 mov r4, r0 8005204: 460e mov r6, r1 8005206: 4617 mov r7, r2 8005208: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800520a: 6821 ldr r1, [r4, #0] 800520c: 680b ldr r3, [r1, #0] 800520e: ea36 0303 bics.w r3, r6, r3 8005212: d101 bne.n 8005218 return HAL_OK; 8005214: 2000 movs r0, #0 } 8005216: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8005218: 1c6b adds r3, r5, #1 800521a: d0f7 beq.n 800520c if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 800521c: b995 cbnz r5, 8005244 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 800521e: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8005220: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8005222: 68da ldr r2, [r3, #12] 8005224: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8005228: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800522a: 695a ldr r2, [r3, #20] 800522c: f022 0201 bic.w r2, r2, #1 8005230: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8005232: 2320 movs r3, #32 8005234: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8005238: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 800523c: 2300 movs r3, #0 800523e: f884 3038 strb.w r3, [r4, #56] ; 0x38 8005242: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8005244: f7ff f83c bl 80042c0 8005248: 1bc0 subs r0, r0, r7 800524a: 4285 cmp r5, r0 800524c: d2dd bcs.n 800520a 800524e: e7e6 b.n 800521e 08005250 : { 8005250: b510 push {r4, lr} if(huart == NULL) 8005252: 4604 mov r4, r0 8005254: b340 cbz r0, 80052a8 if(huart->gState == HAL_UART_STATE_RESET) 8005256: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 800525a: f003 02ff and.w r2, r3, #255 ; 0xff 800525e: b91b cbnz r3, 8005268 huart->Lock = HAL_UNLOCKED; 8005260: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8005264: f001 fada bl 800681c huart->gState = HAL_UART_STATE_BUSY; 8005268: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 800526a: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 800526c: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8005270: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8005272: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8005274: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8005278: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 800527a: f7ff ff23 bl 80050c4 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 800527e: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8005280: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8005282: 691a ldr r2, [r3, #16] 8005284: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8005288: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 800528a: 695a ldr r2, [r3, #20] 800528c: f022 022a bic.w r2, r2, #42 ; 0x2a 8005290: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8005292: 68da ldr r2, [r3, #12] 8005294: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8005298: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 800529a: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 800529c: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 800529e: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 80052a2: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 80052a6: bd10 pop {r4, pc} return HAL_ERROR; 80052a8: 2001 movs r0, #1 } 80052aa: bd10 pop {r4, pc} 080052ac : { 80052ac: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80052b0: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 80052b2: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 80052b6: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 80052b8: 2b20 cmp r3, #32 { 80052ba: 460d mov r5, r1 80052bc: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 80052be: d14e bne.n 800535e if((pData == NULL) || (Size == 0U)) 80052c0: 2900 cmp r1, #0 80052c2: d049 beq.n 8005358 80052c4: 2a00 cmp r2, #0 80052c6: d047 beq.n 8005358 __HAL_LOCK(huart); 80052c8: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 80052cc: 2b01 cmp r3, #1 80052ce: d046 beq.n 800535e 80052d0: 2301 movs r3, #1 80052d2: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 80052d6: 2300 movs r3, #0 80052d8: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 80052da: 2321 movs r3, #33 ; 0x21 80052dc: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 80052e0: f7fe ffee bl 80042c0 80052e4: 4606 mov r6, r0 huart->TxXferSize = Size; 80052e6: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 80052ea: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 80052ee: 8ce3 ldrh r3, [r4, #38] ; 0x26 80052f0: b29b uxth r3, r3 80052f2: b96b cbnz r3, 8005310 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 80052f4: 463b mov r3, r7 80052f6: 4632 mov r2, r6 80052f8: 2140 movs r1, #64 ; 0x40 80052fa: 4620 mov r0, r4 80052fc: f7ff ff80 bl 8005200 8005300: b9a8 cbnz r0, 800532e huart->gState = HAL_UART_STATE_READY; 8005302: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8005304: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8005308: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 800530c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8005310: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005312: 4632 mov r2, r6 huart->TxXferCount--; 8005314: 3b01 subs r3, #1 8005316: b29b uxth r3, r3 8005318: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800531a: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800531c: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800531e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005322: 4620 mov r0, r4 8005324: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005326: d10e bne.n 8005346 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005328: f7ff ff6a bl 8005200 800532c: b110 cbz r0, 8005334 return HAL_TIMEOUT; 800532e: 2003 movs r0, #3 8005330: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 8005334: 882b ldrh r3, [r5, #0] 8005336: 6822 ldr r2, [r4, #0] 8005338: f3c3 0308 ubfx r3, r3, #0, #9 800533c: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 800533e: 6923 ldr r3, [r4, #16] 8005340: b943 cbnz r3, 8005354 pData +=2U; 8005342: 3502 adds r5, #2 8005344: e7d3 b.n 80052ee if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005346: f7ff ff5b bl 8005200 800534a: 2800 cmp r0, #0 800534c: d1ef bne.n 800532e huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 800534e: 6823 ldr r3, [r4, #0] 8005350: 782a ldrb r2, [r5, #0] 8005352: 605a str r2, [r3, #4] 8005354: 3501 adds r5, #1 8005356: e7ca b.n 80052ee return HAL_ERROR; 8005358: 2001 movs r0, #1 800535a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 800535e: 2002 movs r0, #2 } 8005360: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08005364 : if(huart->RxState == HAL_UART_STATE_READY) 8005364: f890 303a ldrb.w r3, [r0, #58] ; 0x3a 8005368: 2b20 cmp r3, #32 800536a: d120 bne.n 80053ae if((pData == NULL) || (Size == 0U)) 800536c: b1e9 cbz r1, 80053aa 800536e: b1e2 cbz r2, 80053aa __HAL_LOCK(huart); 8005370: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8005374: 2b01 cmp r3, #1 8005376: d01a beq.n 80053ae huart->RxXferCount = Size; 8005378: 85c2 strh r2, [r0, #46] ; 0x2e huart->RxXferSize = Size; 800537a: 8582 strh r2, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 800537c: 2300 movs r3, #0 huart->RxState = HAL_UART_STATE_BUSY_RX; 800537e: 2222 movs r2, #34 ; 0x22 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005380: 63c3 str r3, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8005382: f880 203a strb.w r2, [r0, #58] ; 0x3a __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8005386: 6802 ldr r2, [r0, #0] huart->pRxBuffPtr = pData; 8005388: 6281 str r1, [r0, #40] ; 0x28 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 800538a: 68d1 ldr r1, [r2, #12] __HAL_UNLOCK(huart); 800538c: f880 3038 strb.w r3, [r0, #56] ; 0x38 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8005390: f441 7180 orr.w r1, r1, #256 ; 0x100 8005394: 60d1 str r1, [r2, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8005396: 6951 ldr r1, [r2, #20] return HAL_OK; 8005398: 4618 mov r0, r3 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 800539a: f041 0101 orr.w r1, r1, #1 800539e: 6151 str r1, [r2, #20] __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 80053a0: 68d1 ldr r1, [r2, #12] 80053a2: f041 0120 orr.w r1, r1, #32 80053a6: 60d1 str r1, [r2, #12] return HAL_OK; 80053a8: 4770 bx lr return HAL_ERROR; 80053aa: 2001 movs r0, #1 80053ac: 4770 bx lr return HAL_BUSY; 80053ae: 2002 movs r0, #2 } 80053b0: 4770 bx lr 080053b2 : 80053b2: 4770 bx lr 080053b4 : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80053b4: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 80053b8: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80053ba: 2b22 cmp r3, #34 ; 0x22 80053bc: d136 bne.n 800542c if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80053be: 6883 ldr r3, [r0, #8] 80053c0: 6901 ldr r1, [r0, #16] 80053c2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 80053c6: 6802 ldr r2, [r0, #0] 80053c8: 6a83 ldr r3, [r0, #40] ; 0x28 80053ca: d123 bne.n 8005414 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80053cc: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80053ce: b9e9 cbnz r1, 800540c *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80053d0: f3c2 0208 ubfx r2, r2, #0, #9 80053d4: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 80053d8: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 80053da: 8dc4 ldrh r4, [r0, #46] ; 0x2e 80053dc: 3c01 subs r4, #1 80053de: b2a4 uxth r4, r4 80053e0: 85c4 strh r4, [r0, #46] ; 0x2e 80053e2: b98c cbnz r4, 8005408 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80053e4: 6803 ldr r3, [r0, #0] 80053e6: 68da ldr r2, [r3, #12] 80053e8: f022 0220 bic.w r2, r2, #32 80053ec: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80053ee: 68da ldr r2, [r3, #12] 80053f0: f422 7280 bic.w r2, r2, #256 ; 0x100 80053f4: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80053f6: 695a ldr r2, [r3, #20] 80053f8: f022 0201 bic.w r2, r2, #1 80053fc: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80053fe: 2320 movs r3, #32 8005400: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8005404: f000 fcce bl 8005da4 if(--huart->RxXferCount == 0U) 8005408: 2000 movs r0, #0 } 800540a: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 800540c: b2d2 uxtb r2, r2 800540e: f823 2b01 strh.w r2, [r3], #1 8005412: e7e1 b.n 80053d8 if(huart->Init.Parity == UART_PARITY_NONE) 8005414: b921 cbnz r1, 8005420 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8005416: 1c59 adds r1, r3, #1 8005418: 6852 ldr r2, [r2, #4] 800541a: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 800541c: 701a strb r2, [r3, #0] 800541e: e7dc b.n 80053da 8005420: 6852 ldr r2, [r2, #4] 8005422: 1c59 adds r1, r3, #1 8005424: 6281 str r1, [r0, #40] ; 0x28 8005426: f002 027f and.w r2, r2, #127 ; 0x7f 800542a: e7f7 b.n 800541c return HAL_BUSY; 800542c: 2002 movs r0, #2 800542e: bd10 pop {r4, pc} 08005430 : 8005430: 4770 bx lr ... 08005434 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8005434: 6803 ldr r3, [r0, #0] { 8005436: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8005438: 681a ldr r2, [r3, #0] { 800543a: 4604 mov r4, r0 if(errorflags == RESET) 800543c: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 800543e: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8005440: 695d ldr r5, [r3, #20] if(errorflags == RESET) 8005442: d107 bne.n 8005454 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8005444: 0696 lsls r6, r2, #26 8005446: d55a bpl.n 80054fe 8005448: 068d lsls r5, r1, #26 800544a: d558 bpl.n 80054fe } 800544c: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8005450: f7ff bfb0 b.w 80053b4 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8005454: f015 0501 ands.w r5, r5, #1 8005458: d102 bne.n 8005460 800545a: f411 7f90 tst.w r1, #288 ; 0x120 800545e: d04e beq.n 80054fe if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8005460: 07d3 lsls r3, r2, #31 8005462: d505 bpl.n 8005470 8005464: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 8005466: bf42 ittt mi 8005468: 6be3 ldrmi r3, [r4, #60] ; 0x3c 800546a: f043 0301 orrmi.w r3, r3, #1 800546e: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005470: 0750 lsls r0, r2, #29 8005472: d504 bpl.n 800547e 8005474: b11d cbz r5, 800547e huart->ErrorCode |= HAL_UART_ERROR_NE; 8005476: 6be3 ldr r3, [r4, #60] ; 0x3c 8005478: f043 0302 orr.w r3, r3, #2 800547c: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 800547e: 0793 lsls r3, r2, #30 8005480: d504 bpl.n 800548c 8005482: b11d cbz r5, 800548c huart->ErrorCode |= HAL_UART_ERROR_FE; 8005484: 6be3 ldr r3, [r4, #60] ; 0x3c 8005486: f043 0304 orr.w r3, r3, #4 800548a: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 800548c: 0716 lsls r6, r2, #28 800548e: d504 bpl.n 800549a 8005490: b11d cbz r5, 800549a huart->ErrorCode |= HAL_UART_ERROR_ORE; 8005492: 6be3 ldr r3, [r4, #60] ; 0x3c 8005494: f043 0308 orr.w r3, r3, #8 8005498: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 800549a: 6be3 ldr r3, [r4, #60] ; 0x3c 800549c: 2b00 cmp r3, #0 800549e: d066 beq.n 800556e if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80054a0: 0695 lsls r5, r2, #26 80054a2: d504 bpl.n 80054ae 80054a4: 0688 lsls r0, r1, #26 80054a6: d502 bpl.n 80054ae UART_Receive_IT(huart); 80054a8: 4620 mov r0, r4 80054aa: f7ff ff83 bl 80053b4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80054ae: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 80054b0: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80054b2: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 80054b4: 6be2 ldr r2, [r4, #60] ; 0x3c 80054b6: 0711 lsls r1, r2, #28 80054b8: d402 bmi.n 80054c0 80054ba: f015 0540 ands.w r5, r5, #64 ; 0x40 80054be: d01a beq.n 80054f6 UART_EndRxTransfer(huart); 80054c0: f7ff fdf2 bl 80050a8 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80054c4: 6823 ldr r3, [r4, #0] 80054c6: 695a ldr r2, [r3, #20] 80054c8: 0652 lsls r2, r2, #25 80054ca: d510 bpl.n 80054ee CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80054cc: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 80054ce: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80054d0: f022 0240 bic.w r2, r2, #64 ; 0x40 80054d4: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 80054d6: b150 cbz r0, 80054ee huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 80054d8: 4b25 ldr r3, [pc, #148] ; (8005570 ) 80054da: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 80054dc: f7fe ff70 bl 80043c0 80054e0: 2800 cmp r0, #0 80054e2: d044 beq.n 800556e huart->hdmarx->XferAbortCallback(huart->hdmarx); 80054e4: 6b60 ldr r0, [r4, #52] ; 0x34 } 80054e6: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 80054ea: 6b43 ldr r3, [r0, #52] ; 0x34 80054ec: 4718 bx r3 HAL_UART_ErrorCallback(huart); 80054ee: 4620 mov r0, r4 80054f0: f7ff ff9e bl 8005430 80054f4: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 80054f6: f7ff ff9b bl 8005430 huart->ErrorCode = HAL_UART_ERROR_NONE; 80054fa: 63e5 str r5, [r4, #60] ; 0x3c 80054fc: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 80054fe: 0616 lsls r6, r2, #24 8005500: d527 bpl.n 8005552 8005502: 060d lsls r5, r1, #24 8005504: d525 bpl.n 8005552 if(huart->gState == HAL_UART_STATE_BUSY_TX) 8005506: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 800550a: 2a21 cmp r2, #33 ; 0x21 800550c: d12f bne.n 800556e if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800550e: 68a2 ldr r2, [r4, #8] 8005510: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8005514: 6a22 ldr r2, [r4, #32] 8005516: d117 bne.n 8005548 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8005518: 8811 ldrh r1, [r2, #0] 800551a: f3c1 0108 ubfx r1, r1, #0, #9 800551e: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005520: 6921 ldr r1, [r4, #16] 8005522: b979 cbnz r1, 8005544 huart->pTxBuffPtr += 2U; 8005524: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 8005526: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8005528: 8ce2 ldrh r2, [r4, #38] ; 0x26 800552a: 3a01 subs r2, #1 800552c: b292 uxth r2, r2 800552e: 84e2 strh r2, [r4, #38] ; 0x26 8005530: b9ea cbnz r2, 800556e __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8005532: 68da ldr r2, [r3, #12] 8005534: f022 0280 bic.w r2, r2, #128 ; 0x80 8005538: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 800553a: 68da ldr r2, [r3, #12] 800553c: f042 0240 orr.w r2, r2, #64 ; 0x40 8005540: 60da str r2, [r3, #12] 8005542: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8005544: 3201 adds r2, #1 8005546: e7ee b.n 8005526 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8005548: 1c51 adds r1, r2, #1 800554a: 6221 str r1, [r4, #32] 800554c: 7812 ldrb r2, [r2, #0] 800554e: 605a str r2, [r3, #4] 8005550: e7ea b.n 8005528 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8005552: 0650 lsls r0, r2, #25 8005554: d50b bpl.n 800556e 8005556: 064a lsls r2, r1, #25 8005558: d509 bpl.n 800556e __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 800555a: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 800555c: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 800555e: f022 0240 bic.w r2, r2, #64 ; 0x40 8005562: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8005564: 2320 movs r3, #32 8005566: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 800556a: f7ff ff22 bl 80053b2 800556e: bd70 pop {r4, r5, r6, pc} 8005570: 08005575 .word 0x08005575 08005574 : { 8005574: b508 push {r3, lr} huart->RxXferCount = 0x00U; 8005576: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005578: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 800557a: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 800557c: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 800557e: f7ff ff57 bl 8005430 8005582: bd08 pop {r3, pc} 08005584 : void SPI_Delay(int ustime) { volatile int i; volatile int k; for(i = 0; i < ustime; i++) 8005584: 2300 movs r3, #0 { 8005586: b082 sub sp, #8 for(i = 0; i < ustime; i++) 8005588: 9300 str r3, [sp, #0] 800558a: 9b00 ldr r3, [sp, #0] 800558c: 4283 cmp r3, r0 800558e: db01 blt.n 8005594 { k++; } } 8005590: b002 add sp, #8 8005592: 4770 bx lr k++; 8005594: 9b01 ldr r3, [sp, #4] 8005596: 3301 adds r3, #1 8005598: 9301 str r3, [sp, #4] for(i = 0; i < ustime; i++) 800559a: 9b00 ldr r3, [sp, #0] 800559c: 3301 adds r3, #1 800559e: e7f3 b.n 8005588 080055a0 : #if 1 // PYJ.2019.04.02_BEGIN -- #ifdef STM32F1 void SpiInOut(uint8_t addr_write) { 80055a0: b570 push {r4, r5, r6, lr} 80055a2: 4605 mov r5, r0 80055a4: 2408 movs r4, #8 for (i = 0; i < 8; i++) { SPI_Delay(SDA_SETUP_TIME); Clr_SX1278_SCK(); 80055a6: 4e14 ldr r6, [pc, #80] ; (80055f8 ) SPI_Delay(SDA_SETUP_TIME); 80055a8: 2004 movs r0, #4 80055aa: f7ff ffeb bl 8005584 Clr_SX1278_SCK(); 80055ae: 2200 movs r2, #0 80055b0: 2108 movs r1, #8 80055b2: 4630 mov r0, r6 80055b4: f7ff f918 bl 80047e8 if (addr_write & 0x80) 80055b8: 062b lsls r3, r5, #24 { Set_SX1278_SDI(); 80055ba: bf4c ite mi 80055bc: 2201 movmi r2, #1 } else { Clr_SX1278_SDI(); 80055be: 2200 movpl r2, #0 80055c0: 2120 movs r1, #32 80055c2: 4630 mov r0, r6 80055c4: f7ff f910 bl 80047e8 } SPI_Delay(SDA_SETUP_TIME); 80055c8: 2004 movs r0, #4 80055ca: f7ff ffdb bl 8005584 Set_SX1278_SCK(); 80055ce: 2201 movs r2, #1 80055d0: 2108 movs r1, #8 80055d2: 4630 mov r0, r6 80055d4: f7ff f908 bl 80047e8 80055d8: 3c01 subs r4, #1 addr_write = addr_write << 1; SPI_Delay(SDA_SETUP_TIME); 80055da: 2004 movs r0, #4 addr_write = addr_write << 1; 80055dc: 006d lsls r5, r5, #1 SPI_Delay(SDA_SETUP_TIME); 80055de: f7ff ffd1 bl 8005584 for (i = 0; i < 8; i++) 80055e2: f014 04ff ands.w r4, r4, #255 ; 0xff addr_write = addr_write << 1; 80055e6: b2ed uxtb r5, r5 for (i = 0; i < 8; i++) 80055e8: d1de bne.n 80055a8 } Clr_SX1278_SCK(); 80055ea: 4622 mov r2, r4 } 80055ec: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} Clr_SX1278_SCK(); 80055f0: 2108 movs r1, #8 80055f2: 4801 ldr r0, [pc, #4] ; (80055f8 ) 80055f4: f7ff b8f8 b.w 80047e8 80055f8: 40010c00 .word 0x40010c00 080055fc : uint8_t SpiRead(void) { 80055fc: b570 push {r4, r5, r6, lr} 80055fe: 2508 movs r5, #8 uint8_t i = 0,Readdata = 0; 8005600: 2400 movs r4, #0 for (i = 0; i < 8; i++) { Readdata <<= 1; SPI_Delay(SDA_SETUP_TIME); Set_SX1278_SCK(); 8005602: 4e10 ldr r6, [pc, #64] ; (8005644 ) SPI_Delay(SDA_SETUP_TIME); 8005604: 2004 movs r0, #4 8005606: f7ff ffbd bl 8005584 Set_SX1278_SCK(); 800560a: 2108 movs r1, #8 800560c: 4630 mov r0, r6 800560e: 2201 movs r2, #1 8005610: f7ff f8ea bl 80047e8 Readdata <<= 1; 8005614: 0064 lsls r4, r4, #1 if (Read_SX1278_SDO()) 8005616: 2110 movs r1, #16 8005618: 4630 mov r0, r6 Readdata <<= 1; 800561a: b2e4 uxtb r4, r4 if (Read_SX1278_SDO()) 800561c: f7ff f8de bl 80047dc 8005620: b108 cbz r0, 8005626 Readdata |= 0x01; 8005622: f044 0401 orr.w r4, r4, #1 else Readdata &= 0xfe; SPI_Delay(SDA_SETUP_TIME); 8005626: 2004 movs r0, #4 8005628: f7ff ffac bl 8005584 800562c: 3d01 subs r5, #1 Clr_SX1278_SCK(); 800562e: 2200 movs r2, #0 8005630: 2108 movs r1, #8 8005632: 4630 mov r0, r6 8005634: f7ff f8d8 bl 80047e8 for (i = 0; i < 8; i++) 8005638: f015 05ff ands.w r5, r5, #255 ; 0xff 800563c: d1e2 bne.n 8005604 } return Readdata; } 800563e: 4620 mov r0, r4 8005640: bd70 pop {r4, r5, r6, pc} 8005642: bf00 nop 8005644: 40010c00 .word 0x40010c00 08005648 : // Lora_MOSI_SET; // SPI_Delay(SDA_SETUP_TIME); } #else void BLUECELL_SPI_Transmit(uint8_t data) { SpiInOut(data); 8005648: f7ff bfaa b.w 80055a0 0800564c : void RGB_Response_Func(uint8_t* data); uint8_t RGB_BufCal(uint8_t srcid); void RGB_Response_Func(uint8_t* data){ 800564c: b510 push {r4, lr} #if 0 for(uint8_t i = 0; i < 10; i++){ printf("%02x ",data[i]); } #endif switch(type){ 800564e: 7843 ldrb r3, [r0, #1] void RGB_Response_Func(uint8_t* data){ 8005650: 4604 mov r4, r0 switch(type){ 8005652: 3b01 subs r3, #1 8005654: 2b08 cmp r3, #8 8005656: d820 bhi.n 800569a 8005658: e8df f003 tbb [pc, r3] 800565c: 1f160516 .word 0x1f160516 8005660: 16160d0b .word 0x16160d0b 8005664: 1c .byte 0x1c 8005665: 00 .byte 0x00 case RGB_Status_Data_Request: Uart2_Data_Send(data,RGB_SensorDataRequest_Length); break; case RGB_ControllerID_SET: Uart1_Data_Send(data,RGB_ControllerID_SET_Length); 8005666: 210a movs r1, #10 break; case RGB_SensorID_SET: Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); break; case RGB_Status_Data_Response: Uart1_Data_Send(data,RGB_SensorDataResponse_Length); 8005668: 4620 mov r0, r4 case RGB_SensorID_SET_Success: break; } } 800566a: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(data,RGB_SensorDataResponse_Length); 800566e: f000 bc17 b.w 8005ea0 8005672: 210f movs r1, #15 8005674: e7f8 b.n 8005668 Uart1_Data_Send(data,data[bluecell_length] + 3); 8005676: 7881 ldrb r1, [r0, #2] 8005678: 3103 adds r1, #3 800567a: f000 fc11 bl 8005ea0 Flash_write(&data[0]); 800567e: 4620 mov r0, r4 } 8005680: e8bd 4010 ldmia.w sp!, {r4, lr} Flash_write(&data[0]); 8005684: f000 bd7a b.w 800617c Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); 8005688: 2107 movs r1, #7 Uart2_Data_Send(data,data[bluecell_length] + 3); 800568a: 4620 mov r0, r4 } 800568c: e8bd 4010 ldmia.w sp!, {r4, lr} Uart2_Data_Send(data,data[bluecell_length] + 3); 8005690: f000 bbfe b.w 8005e90 8005694: 7881 ldrb r1, [r0, #2] 8005696: 3103 adds r1, #3 8005698: e7f7 b.n 800568a 800569a: bd10 pop {r4, pc} 0800569c : uint16_t Sensor_red[9] = {0,}; uint16_t Sensor_green[9] = {0,}; uint16_t Sensor_blue[9] = {0,}; void RGB_Alarm_Check(uint8_t* data){ 800569c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} Sensor_red[data[bluecell_srcid]] = ((data[bluecell_red_H + 2] << 8)| data[bluecell_red_L + 2]); 80056a0: 7981 ldrb r1, [r0, #6] 80056a2: 79c3 ldrb r3, [r0, #7] 80056a4: 78c2 ldrb r2, [r0, #3] 80056a6: 4c2d ldr r4, [pc, #180] ; (800575c ) 80056a8: ea43 2301 orr.w r3, r3, r1, lsl #8 80056ac: f824 3012 strh.w r3, [r4, r2, lsl #1] Sensor_green[data[bluecell_srcid]] = ((data[bluecell_green_H + 2] << 8)| data[bluecell_green_L + 2]); 80056b0: 7a05 ldrb r5, [r0, #8] 80056b2: 7a43 ldrb r3, [r0, #9] 80056b4: 78c2 ldrb r2, [r0, #3] 80056b6: 492a ldr r1, [pc, #168] ; (8005760 ) 80056b8: ea43 2305 orr.w r3, r3, r5, lsl #8 80056bc: f821 3012 strh.w r3, [r1, r2, lsl #1] Sensor_blue[data[bluecell_srcid]] = ((data[bluecell_blue_H + 2] << 8)| data[bluecell_blue_L + 2]); 80056c0: 7a86 ldrb r6, [r0, #10] 80056c2: 7ac3 ldrb r3, [r0, #11] 80056c4: 78c5 ldrb r5, [r0, #3] 80056c6: 4a27 ldr r2, [pc, #156] ; (8005764 ) 80056c8: ea43 2306 orr.w r3, r3, r6, lsl #8 80056cc: f822 3015 strh.w r3, [r2, r5, lsl #1] uint8_t LED_Alarm = 0; for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80056d0: 4b25 ldr r3, [pc, #148] ; (8005768 ) 80056d2: 4608 mov r0, r1 80056d4: f893 c000 ldrb.w ip, [r3] 80056d8: 4611 mov r1, r2 80056da: 2301 movs r3, #1 if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 80056dc: 4d23 ldr r5, [pc, #140] ; (800576c ) 80056de: 4e24 ldr r6, [pc, #144] ; (8005770 ) || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]] 80056e0: 4f24 ldr r7, [pc, #144] ; (8005774 ) || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 80056e2: f8df e0a0 ldr.w lr, [pc, #160] ; 8005784 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80056e6: 4563 cmp r3, ip 80056e8: d90d bls.n 8005706 if(LED_Alarm == 1){ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_SET); }else{ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET); 80056ea: 2200 movs r2, #0 80056ec: f44f 5180 mov.w r1, #4096 ; 0x1000 80056f0: 4821 ldr r0, [pc, #132] ; (8005778 ) 80056f2: f7ff f879 bl 80047e8 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_SET); 80056f6: 2201 movs r2, #1 80056f8: f44f 5100 mov.w r1, #8192 ; 0x2000 80056fc: 481f ldr r0, [pc, #124] ; (800577c ) 80056fe: f7ff f873 bl 80047e8 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_RESET); 8005702: 2200 movs r2, #0 8005704: e022 b.n 800574c if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 8005706: 5cea ldrb r2, [r5, r3] 8005708: f836 9012 ldrh.w r9, [r6, r2, lsl #1] 800570c: f834 8012 ldrh.w r8, [r4, r2, lsl #1] 8005710: 45c1 cmp r9, r8 8005712: d20e bcs.n 8005732 || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]] 8005714: f837 9012 ldrh.w r9, [r7, r2, lsl #1] 8005718: f830 8012 ldrh.w r8, [r0, r2, lsl #1] 800571c: 45c1 cmp r9, r8 800571e: d208 bcs.n 8005732 || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 8005720: f83e 8012 ldrh.w r8, [lr, r2, lsl #1] 8005724: f831 2012 ldrh.w r2, [r1, r2, lsl #1] 8005728: 4590 cmp r8, r2 800572a: d202 bcs.n 8005732 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 800572c: 3301 adds r3, #1 800572e: b2db uxtb r3, r3 8005730: e7d9 b.n 80056e6 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET); 8005732: 2201 movs r2, #1 8005734: f44f 5180 mov.w r1, #4096 ; 0x1000 8005738: 480f ldr r0, [pc, #60] ; (8005778 ) 800573a: f7ff f855 bl 80047e8 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET); 800573e: 2200 movs r2, #0 8005740: f44f 5100 mov.w r1, #8192 ; 0x2000 8005744: 480d ldr r0, [pc, #52] ; (800577c ) 8005746: f7ff f84f bl 80047e8 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_SET); 800574a: 2201 movs r2, #1 } } 800574c: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_RESET); 8005750: f44f 6180 mov.w r1, #1024 ; 0x400 8005754: 480a ldr r0, [pc, #40] ; (8005780 ) 8005756: f7ff b847 b.w 80047e8 800575a: bf00 nop 800575c: 20000154 .word 0x20000154 8005760: 20000142 .word 0x20000142 8005764: 20000130 .word 0x20000130 8005768: 20000126 .word 0x20000126 800576c: 20000127 .word 0x20000127 8005770: 20000114 .word 0x20000114 8005774: 20000102 .word 0x20000102 8005778: 40010c00 .word 0x40010c00 800577c: 40010800 .word 0x40010800 8005780: 40011000 .word 0x40011000 8005784: 200000f0 .word 0x200000f0 08005788 : uint8_t RGB_DeviceStatusCheck(void){ 8005788: b530 push {r4, r5, lr} uint8_t ret = 0; for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800578a: 4b09 ldr r3, [pc, #36] ; (80057b0 ) uint8_t ret = 0; 800578c: 2000 movs r0, #0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800578e: 7819 ldrb r1, [r3, #0] 8005790: 2301 movs r3, #1 if(SensorID_buf[i] > 0){ ret += 0x01 << (SensorID_buf[i] - 1); 8005792: 461d mov r5, r3 if(SensorID_buf[i] > 0){ 8005794: 4c07 ldr r4, [pc, #28] ; (80057b4 ) for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 8005796: 428b cmp r3, r1 8005798: d900 bls.n 800579c } } return ret; } 800579a: bd30 pop {r4, r5, pc} if(SensorID_buf[i] > 0){ 800579c: 5ce2 ldrb r2, [r4, r3] 800579e: b122 cbz r2, 80057aa ret += 0x01 << (SensorID_buf[i] - 1); 80057a0: 3a01 subs r2, #1 80057a2: fa05 f202 lsl.w r2, r5, r2 80057a6: 4410 add r0, r2 80057a8: b2c0 uxtb r0, r0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 80057aa: 3301 adds r3, #1 80057ac: b2db uxtb r3, r3 80057ae: e7f2 b.n 8005796 80057b0: 20000126 .word 0x20000126 80057b4: 20000127 .word 0x20000127 080057b8 : Lora_Buf[mynumcnt + 5] = rgb_buf[bluecell_blue_H + 2]; Lora_Buf[mynumcnt + 6] = rgb_buf[bluecell_blue_L + 2]; LoraDataSendSet(1); } uint8_t RGB_BufCal(uint8_t srcid){ 80057b8: 3801 subs r0, #1 80057ba: b2c0 uxtb r0, r0 80057bc: 2807 cmp r0, #7 80057be: bf9a itte ls 80057c0: 4b01 ldrls r3, [pc, #4] ; (80057c8 ) 80057c2: 5c18 ldrbls r0, [r3, r0] 80057c4: 2000 movhi r0, #0 case 6:ret = 39;break; case 7:ret = 46;break; case 8:ret = 53;break; } return ret; } 80057c6: 4770 bx lr 80057c8: 08007b00 .word 0x08007b00 080057cc : void RGB_Data_Stack(uint8_t* rgb_buf){ 80057cc: b508 push {r3, lr} 80057ce: 4602 mov r2, r0 uint8_t mynumcnt = RGB_BufCal(rgb_buf[bluecell_srcid]); 80057d0: 78c0 ldrb r0, [r0, #3] 80057d2: f7ff fff1 bl 80057b8 Lora_Buf[bluecell_stx] = 0xbe; 80057d6: 21be movs r1, #190 ; 0xbe 80057d8: 4b0e ldr r3, [pc, #56] ; (8005814 ) 80057da: 7019 strb r1, [r3, #0] Lora_Buf[bluecell_type] = RGB_Lora_Data_Report; 80057dc: 210c movs r1, #12 80057de: 7059 strb r1, [r3, #1] Lora_Buf[bluecell_length] = Lora_Max_Amount + 2; //length 1byte + type 1byte + RGB Data 60byte 80057e0: 213e movs r1, #62 ; 0x3e 80057e2: 7099 strb r1, [r3, #2] Lora_Buf[bluecell_srcid] = MyControllerID; 80057e4: 490c ldr r1, [pc, #48] ; (8005818 ) 80057e6: 7809 ldrb r1, [r1, #0] 80057e8: 70d9 strb r1, [r3, #3] Lora_Buf[mynumcnt] = rgb_buf[bluecell_srcid]; 80057ea: 78d1 ldrb r1, [r2, #3] 80057ec: 5419 strb r1, [r3, r0] Lora_Buf[mynumcnt + 1] = rgb_buf[bluecell_red_H + 2]; 80057ee: 7991 ldrb r1, [r2, #6] 80057f0: 4418 add r0, r3 80057f2: 7041 strb r1, [r0, #1] Lora_Buf[mynumcnt + 2] = rgb_buf[bluecell_red_L + 2]; 80057f4: 79d3 ldrb r3, [r2, #7] 80057f6: 7083 strb r3, [r0, #2] Lora_Buf[mynumcnt + 3] = rgb_buf[bluecell_green_H + 2]; 80057f8: 7a13 ldrb r3, [r2, #8] 80057fa: 70c3 strb r3, [r0, #3] Lora_Buf[mynumcnt + 4] = rgb_buf[bluecell_green_L + 2]; 80057fc: 7a53 ldrb r3, [r2, #9] 80057fe: 7103 strb r3, [r0, #4] Lora_Buf[mynumcnt + 5] = rgb_buf[bluecell_blue_H + 2]; 8005800: 7a93 ldrb r3, [r2, #10] 8005802: 7143 strb r3, [r0, #5] Lora_Buf[mynumcnt + 6] = rgb_buf[bluecell_blue_L + 2]; 8005804: 7ad3 ldrb r3, [r2, #11] 8005806: 7183 strb r3, [r0, #6] } 8005808: e8bd 4008 ldmia.w sp!, {r3, lr} LoraDataSendSet(1); 800580c: 2001 movs r0, #1 800580e: f000 bb33 b.w 8005e78 8005812: bf00 nop 8005814: 2000008c .word 0x2000008c 8005818: 20000174 .word 0x20000174 0800581c : uint8_t datalosscnt[9] = {0,}; void RGB_Controller_Func(uint8_t* data){ 800581c: b530 push {r4, r5, lr} RGB_CMD_T type = data[bluecell_type]; 800581e: 7845 ldrb r5, [r0, #1] void RGB_Controller_Func(uint8_t* data){ 8005820: b09b sub sp, #108 ; 0x6c 8005822: 4604 mov r4, r0 // static uint8_t temp_sensorid; uint8_t Result_buf[100] = {0,}; 8005824: 2264 movs r2, #100 ; 0x64 8005826: 2100 movs r1, #0 8005828: a801 add r0, sp, #4 800582a: f001 f8f0 bl 8006a0e switch(type){ 800582e: 1e6b subs r3, r5, #1 8005830: 2b09 cmp r3, #9 8005832: d824 bhi.n 800587e 8005834: e8df f003 tbb [pc, r3] 8005838: 46342805 .word 0x46342805 800583c: 23236e4f .word 0x23236e4f 8005840: 9523 .short 0x9523 case RGB_Status_Data_Request: datalosscnt[data[bluecell_srcid + 1]]++; 8005842: 4b4e ldr r3, [pc, #312] ; (800597c ) 8005844: 7921 ldrb r1, [r4, #4] 8005846: 5c5a ldrb r2, [r3, r1] 8005848: 3201 adds r2, #1 800584a: 545a strb r2, [r3, r1] if(datalosscnt[data[bluecell_srcid + 1]] > 3 && data[bluecell_srcid + 1] != 0){ 800584c: 7922 ldrb r2, [r4, #4] 800584e: 5c9b ldrb r3, [r3, r2] 8005850: 2b03 cmp r3, #3 8005852: d907 bls.n 8005864 8005854: b132 cbz r2, 8005864 RGB_SensorIDAutoSet(1); 8005856: 2001 movs r0, #1 8005858: f000 fb14 bl 8005e84 memset(&SensorID_buf[0],0x00,8); 800585c: 2200 movs r2, #0 800585e: 4b48 ldr r3, [pc, #288] ; (8005980 ) 8005860: 601a str r2, [r3, #0] 8005862: 605a str r2, [r3, #4] } data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 8005864: 78a1 ldrb r1, [r4, #2] 8005866: 1c60 adds r0, r4, #1 8005868: f000 ff38 bl 80066dc 800586c: 7160 strb r0, [r4, #5] memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],RGB_SensorDataRequest_Length); 800586e: 88a2 ldrh r2, [r4, #4] 8005870: 6820 ldr r0, [r4, #0] 8005872: 79a3 ldrb r3, [r4, #6] 8005874: 9001 str r0, [sp, #4] 8005876: f8ad 2008 strh.w r2, [sp, #8] 800587a: f88d 300a strb.w r3, [sp, #10] break; default: break; } RGB_Response_Func(&Result_buf[bluecell_stx]); 800587e: a801 add r0, sp, #4 8005880: f7ff fee4 bl 800564c return; } 8005884: b01b add sp, #108 ; 0x6c 8005886: bd30 pop {r4, r5, pc} memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 8005888: 78a2 ldrb r2, [r4, #2] 800588a: 4621 mov r1, r4 800588c: 3203 adds r2, #3 800588e: a801 add r0, sp, #4 8005890: f001 f8b2 bl 80069f8 MyControllerID = Result_buf[7] = data[7];//�긽��諛⑹쓽 DST ID �뒗 �굹�쓽 ID �씠�떎. 8005894: 79e3 ldrb r3, [r4, #7] 8005896: 4a3b ldr r2, [pc, #236] ; (8005984 ) 8005898: f88d 300b strb.w r3, [sp, #11] 800589c: 7013 strb r3, [r2, #0] break; 800589e: e7ee b.n 800587e RGB_SensorIDAutoSet(1); 80058a0: 2001 movs r0, #1 80058a2: f000 faef bl 8005e84 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80058a6: 78a2 ldrb r2, [r4, #2] 80058a8: 4621 mov r1, r4 80058aa: 3203 adds r2, #3 80058ac: a801 add r0, sp, #4 80058ae: f001 f8a3 bl 80069f8 Result_buf[5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80058b2: f89d 1006 ldrb.w r1, [sp, #6] 80058b6: f10d 0005 add.w r0, sp, #5 80058ba: f000 ff0f bl 80066dc 80058be: f88d 0009 strb.w r0, [sp, #9] break; 80058c2: e7dc b.n 800587e SensorID_Cnt++; 80058c4: 4a30 ldr r2, [pc, #192] ; (8005988 ) SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1]; 80058c6: 78e1 ldrb r1, [r4, #3] SensorID_Cnt++; 80058c8: 7813 ldrb r3, [r2, #0] 80058ca: 3301 adds r3, #1 80058cc: b2db uxtb r3, r3 80058ce: 7013 strb r3, [r2, #0] SensorID_buf[SensorID_Cnt] = data[bluecell_length + 1]; 80058d0: 4a2b ldr r2, [pc, #172] ; (8005980 ) 80058d2: 54d1 strb r1, [r2, r3] break; 80058d4: e7d3 b.n 800587e datalosscnt[data[bluecell_srcid]] = 0; 80058d6: 2100 movs r1, #0 80058d8: 78e3 ldrb r3, [r4, #3] 80058da: 4a28 ldr r2, [pc, #160] ; (800597c ) RGB_Data_Stack(&data[0]); 80058dc: 4620 mov r0, r4 datalosscnt[data[bluecell_srcid]] = 0; 80058de: 54d1 strb r1, [r2, r3] RGB_Data_Stack(&data[0]); 80058e0: f7ff ff74 bl 80057cc data[bluecell_length] += 1;// Device On OFF status Send byte 80058e4: 78a5 ldrb r5, [r4, #2] 80058e6: 3501 adds r5, #1 80058e8: b2ed uxtb r5, r5 80058ea: 70a5 strb r5, [r4, #2] data[bluecell_srcid + 9] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 80058ec: f7ff ff4c bl 8005788 memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80058f0: 1cea adds r2, r5, #3 data[bluecell_srcid + 9] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 80058f2: 7320 strb r0, [r4, #12] memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 80058f4: 4621 mov r1, r4 80058f6: a801 add r0, sp, #4 80058f8: f001 f87e bl 80069f8 Result_buf[5] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 80058fc: f89d 1006 ldrb.w r1, [sp, #6] 8005900: f10d 0005 add.w r0, sp, #5 8005904: f000 feea bl 80066dc 8005908: f88d 0009 strb.w r0, [sp, #9] RGB_Alarm_Check(&data[bluecell_stx]); 800590c: 4620 mov r0, r4 800590e: f7ff fec5 bl 800569c break; 8005912: e7b4 b.n 800587e memcpy(&Result_buf[bluecell_stx],&data[bluecell_stx],data[bluecell_length] + 3); 8005914: 78a2 ldrb r2, [r4, #2] 8005916: 4621 mov r1, r4 8005918: 3203 adds r2, #3 800591a: a801 add r0, sp, #4 800591c: f001 f86c bl 80069f8 RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); 8005920: 7922 ldrb r2, [r4, #4] 8005922: 7963 ldrb r3, [r4, #5] 8005924: 7aa1 ldrb r1, [r4, #10] 8005926: ea43 2302 orr.w r3, r3, r2, lsl #8 800592a: 4a18 ldr r2, [pc, #96] ; (800598c ) Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 800592c: f10d 0005 add.w r0, sp, #5 RGB_SensorRedLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); 8005930: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorGreenLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_green_H] << 8) |data[bluecell_green_L]); 8005934: 79a2 ldrb r2, [r4, #6] 8005936: 79e3 ldrb r3, [r4, #7] 8005938: 7aa1 ldrb r1, [r4, #10] 800593a: ea43 2302 orr.w r3, r3, r2, lsl #8 800593e: 4a14 ldr r2, [pc, #80] ; (8005990 ) 8005940: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorBlueLimit_Buf[data[bluecell_dstid]] = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]); 8005944: 7a22 ldrb r2, [r4, #8] 8005946: 7a63 ldrb r3, [r4, #9] 8005948: 7aa1 ldrb r1, [r4, #10] 800594a: ea43 2302 orr.w r3, r3, r2, lsl #8 800594e: 4a11 ldr r2, [pc, #68] ; (8005994 ) 8005950: f822 3011 strh.w r3, [r2, r1, lsl #1] Result_buf[bluecell_crc] = STH30_CreateCrc(&Result_buf[bluecell_type],Result_buf[bluecell_length]); 8005954: f89d 1006 ldrb.w r1, [sp, #6] 8005958: f000 fec0 bl 80066dc 800595c: f88d 000f strb.w r0, [sp, #15] break; 8005960: e78d b.n 800587e \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 8005962: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8005966: 490c ldr r1, [pc, #48] ; (8005998 ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8005968: 4b0c ldr r3, [pc, #48] ; (800599c ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800596a: 68ca ldr r2, [r1, #12] 800596c: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8005970: 4313 orrs r3, r2 8005972: 60cb str r3, [r1, #12] 8005974: f3bf 8f4f dsb sy __ASM volatile ("nop"); 8005978: bf00 nop 800597a: e7fd b.n 8005978 800597c: 20000166 .word 0x20000166 8005980: 20000127 .word 0x20000127 8005984: 20000174 .word 0x20000174 8005988: 20000126 .word 0x20000126 800598c: 20000114 .word 0x20000114 8005990: 20000102 .word 0x20000102 8005994: 200000f0 .word 0x200000f0 8005998: e000ed00 .word 0xe000ed00 800599c: 05fa0004 .word 0x05fa0004 080059a0 : SX1276_hw_SetNSS(hw, 1); HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); } __weak void SX1276_hw_SetNSS(SX1276_hw_t * hw, int value) { HAL_GPIO_WritePin(hw->nss.port, hw->nss.pin, 80059a0: 1e4b subs r3, r1, #1 80059a2: 425a negs r2, r3 80059a4: 8a01 ldrh r1, [r0, #16] 80059a6: 415a adcs r2, r3 80059a8: 6940 ldr r0, [r0, #20] 80059aa: f7fe bf1d b.w 80047e8 080059ae : __weak void SX1276_hw_init(SX1276_hw_t * hw) { 80059ae: b510 push {r4, lr} 80059b0: 4604 mov r4, r0 SX1276_hw_SetNSS(hw, 1); 80059b2: 2101 movs r1, #1 80059b4: f7ff fff4 bl 80059a0 HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 80059b8: 8821 ldrh r1, [r4, #0] 80059ba: 6860 ldr r0, [r4, #4] 80059bc: 2201 movs r2, #1 } 80059be: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 80059c2: f7fe bf11 b.w 80047e8 080059c6 : HAL_SPI_Transmit(hw->spi, &cmd, 1, 1000); while (HAL_SPI_GetState(hw->spi) != HAL_SPI_STATE_READY) ; } #endif // PYJ.2019.04.01_END -- void SX1276_hw_SPICommand(SX1276_hw_t * hw, uint8_t cmd) { 80059c6: b510 push {r4, lr} 80059c8: 460c mov r4, r1 SX1276_hw_SetNSS(hw, 0); 80059ca: 2100 movs r1, #0 80059cc: f7ff ffe8 bl 80059a0 BLUECELL_SPI_Transmit(cmd); 80059d0: 4620 mov r0, r4 } 80059d2: e8bd 4010 ldmia.w sp!, {r4, lr} BLUECELL_SPI_Transmit(cmd); 80059d6: f7ff be37 b.w 8005648 080059da : //printf("\n"); SX1276_hw_SetNSS(module->hw, 1); } } void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 80059da: b5f8 push {r3, r4, r5, r6, r7, lr} 80059dc: 460e mov r6, r1 80059de: 4604 mov r4, r0 80059e0: 461f mov r7, r3 uint8_t length) { uint8_t i; if (length <= 1) { return; } else { SX1276_hw_SetNSS(module->hw, 0); 80059e2: 2100 movs r1, #0 80059e4: 6800 ldr r0, [r0, #0] void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 80059e6: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 80059e8: f7ff ffda bl 80059a0 SX1276_hw_SPICommand(module->hw, addr | 0x80); 80059ec: f046 0180 orr.w r1, r6, #128 ; 0x80 80059f0: 6820 ldr r0, [r4, #0] 80059f2: f7ff ffe8 bl 80059c6 80059f6: 3f01 subs r7, #1 80059f8: 1e6e subs r6, r5, #1 80059fa: 443d add r5, r7 for (i = 0; i < length; i++) { 80059fc: 42ae cmp r6, r5 80059fe: d104 bne.n 8005a0a SX1276_hw_SPICommand(module->hw, txBuf[i]); } SX1276_hw_SetNSS(module->hw, 1); 8005a00: 2101 movs r1, #1 8005a02: 6820 ldr r0, [r4, #0] 8005a04: f7ff ffcc bl 80059a0 8005a08: bdf8 pop {r3, r4, r5, r6, r7, pc} SX1276_hw_SPICommand(module->hw, txBuf[i]); 8005a0a: f816 1f01 ldrb.w r1, [r6, #1]! 8005a0e: 6820 ldr r0, [r4, #0] 8005a10: f7ff ffd9 bl 80059c6 8005a14: e7f2 b.n 80059fc 08005a16 : uint8_t SX1276_hw_SPIReadByte(SX1276_hw_t * hw) { 8005a16: b508 push {r3, lr} SX1276_hw_SetNSS(hw, 0); 8005a18: 2100 movs r1, #0 8005a1a: f7ff ffc1 bl 80059a0 rxByte = SpiRead(); 8005a1e: f7ff fded bl 80055fc } 8005a22: b2c0 uxtb r0, r0 8005a24: bd08 pop {r3, pc} 08005a26 : HAL_Delay(msec); 8005a26: f7fe bc51 b.w 80042cc 08005a2a : __weak void SX1276_hw_Reset(SX1276_hw_t * hw) { 8005a2a: b510 push {r4, lr} 8005a2c: 4604 mov r4, r0 SX1276_hw_SetNSS(hw, 1); 8005a2e: 2101 movs r1, #1 8005a30: f7ff ffb6 bl 80059a0 HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_RESET); 8005a34: 8821 ldrh r1, [r4, #0] 8005a36: 2200 movs r2, #0 8005a38: 6860 ldr r0, [r4, #4] 8005a3a: f7fe fed5 bl 80047e8 SX1276_hw_DelayMs(1); 8005a3e: 2001 movs r0, #1 8005a40: f7ff fff1 bl 8005a26 HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 8005a44: 6860 ldr r0, [r4, #4] 8005a46: 2201 movs r2, #1 8005a48: 8821 ldrh r1, [r4, #0] 8005a4a: f7fe fecd bl 80047e8 SX1276_hw_DelayMs(100); 8005a4e: 2064 movs r0, #100 ; 0x64 8005a50: f7ff ffe9 bl 8005a26 8005a54: bd10 pop {r4, pc} 08005a56 : __weak int SX1276_hw_GetDIO0(SX1276_hw_t * hw) { 8005a56: b508 push {r3, lr} return (HAL_GPIO_ReadPin(hw->dio0.port, hw->dio0.pin) == GPIO_PIN_SET); 8005a58: 8901 ldrh r1, [r0, #8] 8005a5a: 68c0 ldr r0, [r0, #12] 8005a5c: f7fe febe bl 80047dc } 8005a60: 1e43 subs r3, r0, #1 8005a62: 4258 negs r0, r3 8005a64: 4158 adcs r0, r3 8005a66: bd08 pop {r3, pc} 08005a68 : uint8_t SX1276_SPIIDRead(SX1276_t * module, uint8_t addr) { 8005a68: b538 push {r3, r4, r5, lr} 8005a6a: 4604 mov r4, r0 SX1276_hw_SPICommand(module->hw, addr); 8005a6c: 6800 ldr r0, [r0, #0] 8005a6e: f7ff ffaa bl 80059c6 tmp = SX1276_hw_SPIReadByte(module->hw); 8005a72: 6820 ldr r0, [r4, #0] 8005a74: f7ff ffcf bl 8005a16 8005a78: 4605 mov r5, r0 SX1276_hw_SetNSS(module->hw, 1); 8005a7a: 2101 movs r1, #1 8005a7c: 6820 ldr r0, [r4, #0] 8005a7e: f7ff ff8f bl 80059a0 } 8005a82: 4628 mov r0, r5 8005a84: bd38 pop {r3, r4, r5, pc} 08005a86 : void SX1276_SPIWrite(SX1276_t * module, uint8_t addr, uint8_t cmd) { 8005a86: b570 push {r4, r5, r6, lr} 8005a88: 4604 mov r4, r0 8005a8a: 460e mov r6, r1 8005a8c: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 8005a8e: 2100 movs r1, #0 8005a90: 6800 ldr r0, [r0, #0] 8005a92: f7ff ff85 bl 80059a0 SX1276_hw_SPICommand(module->hw, addr | 0x80); 8005a96: f046 0180 orr.w r1, r6, #128 ; 0x80 8005a9a: 6820 ldr r0, [r4, #0] 8005a9c: f7ff ff93 bl 80059c6 SX1276_hw_SPICommand(module->hw, cmd); 8005aa0: 4629 mov r1, r5 8005aa2: 6820 ldr r0, [r4, #0] 8005aa4: f7ff ff8f bl 80059c6 SX1276_hw_SetNSS(module->hw, 1); 8005aa8: 2101 movs r1, #1 8005aaa: 6820 ldr r0, [r4, #0] 8005aac: f7ff ff78 bl 80059a0 8005ab0: bd70 pop {r4, r5, r6, pc} 08005ab2 : if (length <= 1) { 8005ab2: 2b01 cmp r3, #1 8005ab4: d901 bls.n 8005aba 8005ab6: f7ff bf90 b.w 80059da 8005aba: 4770 bx lr 08005abc : SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01 module->readBytes = 0; SX1276_standby(module); //Entry standby mode } void SX1276_standby(SX1276_t * module) { 8005abc: b510 push {r4, lr} SX1276_SPIWrite(module, LR_RegOpMode, 0x09); 8005abe: 2209 movs r2, #9 8005ac0: 2101 movs r1, #1 void SX1276_standby(SX1276_t * module) { 8005ac2: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x09); 8005ac4: f7ff ffdf bl 8005a86 module->status = STANDBY; 8005ac8: 2301 movs r3, #1 8005aca: 7263 strb r3, [r4, #9] 8005acc: bd10 pop {r4, pc} 08005ace : } void SX1276_sleep(SX1276_t * module) { 8005ace: b510 push {r4, lr} SX1276_SPIWrite(module, LR_RegOpMode, 0x08); 8005ad0: 2208 movs r2, #8 8005ad2: 2101 movs r1, #1 void SX1276_sleep(SX1276_t * module) { 8005ad4: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x08); 8005ad6: f7ff ffd6 bl 8005a86 module->status = SLEEP; 8005ada: 2300 movs r3, #0 8005adc: 7263 strb r3, [r4, #9] 8005ade: bd10 pop {r4, pc} 08005ae0 : } void SX1276_entryLoRa(SX1276_t * module) { SX1276_SPIWrite(module, LR_RegOpMode, 0x88); 8005ae0: 2288 movs r2, #136 ; 0x88 8005ae2: 2101 movs r1, #1 8005ae4: f7ff bfcf b.w 8005a86 08005ae8 : uint8_t LoRa_Rate, uint8_t LoRa_BW) { 8005ae8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8005aec: 4604 mov r4, r0 8005aee: 460d mov r5, r1 8005af0: 4690 mov r8, r2 8005af2: 461f mov r7, r3 8005af4: f89d 6018 ldrb.w r6, [sp, #24] SX1276_sleep(module); //Change modem mode Must in Sleep mode 8005af8: f7ff ffe9 bl 8005ace SX1276_hw_DelayMs(15); 8005afc: 200f movs r0, #15 8005afe: f7ff ff92 bl 8005a26 SX1276_entryLoRa(module); 8005b02: 4620 mov r0, r4 8005b04: f7ff ffec bl 8005ae0 8005b08: 4a32 ldr r2, [pc, #200] ; (8005bd4 ) (uint8_t*) SX1276_Frequency[frequency], 3); //setting frequency parameter 8005b0a: eb05 0545 add.w r5, r5, r5, lsl #1 8005b0e: 442a add r2, r5 8005b10: 2303 movs r3, #3 8005b12: 2106 movs r1, #6 8005b14: 4620 mov r0, r4 8005b16: f7ff ff60 bl 80059da SX1276_SPIWrite(module, LR_RegPaConfig, SX1276_Power[power]); //Setting output power parameter 8005b1a: 4b2f ldr r3, [pc, #188] ; (8005bd8 ) 8005b1c: 2109 movs r1, #9 8005b1e: f813 2008 ldrb.w r2, [r3, r8] 8005b22: 4620 mov r0, r4 8005b24: f7ff ffaf bl 8005a86 SX1276_SPIWrite(module, LR_RegOcp, 0x0B); //RegOcp,Close Ocp 8005b28: 220b movs r2, #11 8005b2a: 4620 mov r0, r4 8005b2c: 4611 mov r1, r2 8005b2e: f7ff ffaa bl 8005a86 SX1276_SPIWrite(module, LR_RegLna, 0x23); //RegLNA,High & LNA Enable 8005b32: 2223 movs r2, #35 ; 0x23 8005b34: 210c movs r1, #12 8005b36: 4620 mov r0, r4 8005b38: f7ff ffa5 bl 8005a86 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8005b3c: 4b27 ldr r3, [pc, #156] ; (8005bdc ) 8005b3e: 5ddd ldrb r5, [r3, r7] 8005b40: 4b27 ldr r3, [pc, #156] ; (8005be0 ) 8005b42: 2d06 cmp r5, #6 ((SX1276_LoRaBandwidth[LoRa_BW] << 4) + (SX1276_CR << 1) + 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04) 8005b44: 5d9a ldrb r2, [r3, r6] 8005b46: ea4f 1202 mov.w r2, r2, lsl #4 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8005b4a: d137 bne.n 8005bbc SX1276_SPIWrite(module, 8005b4c: 3203 adds r2, #3 8005b4e: b2d2 uxtb r2, r2 8005b50: 211d movs r1, #29 8005b52: 4620 mov r0, r4 8005b54: f7ff ff97 bl 8005a86 SX1276_SPIWrite(module, 8005b58: 2267 movs r2, #103 ; 0x67 8005b5a: 211e movs r1, #30 8005b5c: 4620 mov r0, r4 8005b5e: f7ff ff92 bl 8005a86 tmp = SX1276_SPIRead(module, 0x31); 8005b62: 2131 movs r1, #49 ; 0x31 8005b64: 4620 mov r0, r4 8005b66: f7ff ff7f bl 8005a68 tmp &= 0xF8; 8005b6a: f000 02f8 and.w r2, r0, #248 ; 0xf8 SX1276_SPIWrite(module, 0x31, tmp); 8005b6e: f042 0205 orr.w r2, r2, #5 8005b72: 2131 movs r1, #49 ; 0x31 8005b74: 4620 mov r0, r4 8005b76: f7ff ff86 bl 8005a86 SX1276_SPIWrite(module, 0x37, 0x0C); 8005b7a: 220c movs r2, #12 8005b7c: 2137 movs r1, #55 ; 0x37 SX1276_SPIWrite(module, 8005b7e: 4620 mov r0, r4 8005b80: f7ff ff81 bl 8005a86 SX1276_SPIWrite(module, LR_RegSymbTimeoutLsb, 0xFF); //RegSymbTimeoutLsb Timeout = 0x3FF(Max) 8005b84: 4620 mov r0, r4 8005b86: 22ff movs r2, #255 ; 0xff 8005b88: 211f movs r1, #31 8005b8a: f7ff ff7c bl 8005a86 SX1276_SPIWrite(module, LR_RegPreambleMsb, 0x00); //RegPreambleMsb 8005b8e: 4620 mov r0, r4 8005b90: 2200 movs r2, #0 8005b92: 2120 movs r1, #32 8005b94: f7ff ff77 bl 8005a86 SX1276_SPIWrite(module, LR_RegPreambleLsb, 12); //RegPreambleLsb 8+4=12byte Preamble 8005b98: 4620 mov r0, r4 8005b9a: 220c movs r2, #12 8005b9c: 2121 movs r1, #33 ; 0x21 8005b9e: f7ff ff72 bl 8005a86 SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01 8005ba2: 4620 mov r0, r4 8005ba4: 2201 movs r2, #1 8005ba6: 2141 movs r1, #65 ; 0x41 8005ba8: f7ff ff6d bl 8005a86 module->readBytes = 0; 8005bac: 2300 movs r3, #0 SX1276_standby(module); //Entry standby mode 8005bae: 4620 mov r0, r4 module->readBytes = 0; 8005bb0: f884 310a strb.w r3, [r4, #266] ; 0x10a } 8005bb4: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} SX1276_standby(module); //Entry standby mode 8005bb8: f7ff bf80 b.w 8005abc SX1276_SPIWrite(module, 8005bbc: 3202 adds r2, #2 8005bbe: f002 02fe and.w r2, r2, #254 ; 0xfe 8005bc2: 211d movs r1, #29 8005bc4: 4620 mov r0, r4 8005bc6: f7ff ff5e bl 8005a86 ((SX1276_SpreadFactor[LoRa_Rate] << 4) + (SX1276_CRC << 2) 8005bca: 012a lsls r2, r5, #4 SX1276_SPIWrite(module, 8005bcc: 3207 adds r2, #7 8005bce: b2d2 uxtb r2, r2 8005bd0: 211e movs r1, #30 8005bd2: e7d4 b.n 8005b7e 8005bd4: 08007b08 .word 0x08007b08 8005bd8: 08007b15 .word 0x08007b15 8005bdc: 08007b19 .word 0x08007b19 8005be0: 08007b0b .word 0x08007b0b 08005be4 : void SX1276_defaultConfig(SX1276_t * module) { 8005be4: b513 push {r0, r1, r4, lr} SX1276_config(module, module->frequency, module->power, module->LoRa_Rate, 8005be6: 79c4 ldrb r4, [r0, #7] 8005be8: 7983 ldrb r3, [r0, #6] 8005bea: 7942 ldrb r2, [r0, #5] 8005bec: 7901 ldrb r1, [r0, #4] 8005bee: 9400 str r4, [sp, #0] 8005bf0: f7ff ff7a bl 8005ae8 } 8005bf4: b002 add sp, #8 8005bf6: bd10 pop {r4, pc} 08005bf8 : } void SX1276_clearLoRaIrq(SX1276_t * module) { SX1276_SPIWrite(module, LR_RegIrqFlags, 0xFF); 8005bf8: 22ff movs r2, #255 ; 0xff 8005bfa: 2112 movs r1, #18 8005bfc: f7ff bf43 b.w 8005a86 08005c00 : } int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005c00: b570 push {r4, r5, r6, lr} 8005c02: 4604 mov r4, r0 8005c04: 460e mov r6, r1 uint8_t addr; module->packetLength = length; 8005c06: 7221 strb r1, [r4, #8] int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005c08: 4615 mov r5, r2 SX1276_defaultConfig(module); //Setting base parameter 8005c0a: f7ff ffeb bl 8005be4 SX1276_SPIWrite(module, REG_LR_PADAC, 0x84); //Normal and RX 8005c0e: 2284 movs r2, #132 ; 0x84 8005c10: 214d movs r1, #77 ; 0x4d 8005c12: 4620 mov r0, r4 8005c14: f7ff ff37 bl 8005a86 SX1276_SPIWrite(module, LR_RegHopPeriod, 0xFF); //No FHSS 8005c18: 22ff movs r2, #255 ; 0xff 8005c1a: 2124 movs r1, #36 ; 0x24 8005c1c: 4620 mov r0, r4 8005c1e: f7ff ff32 bl 8005a86 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x01);//DIO=00,DIO1=00,DIO2=00, DIO3=01 8005c22: 2201 movs r2, #1 8005c24: 2140 movs r1, #64 ; 0x40 8005c26: 4620 mov r0, r4 8005c28: f7ff ff2d bl 8005a86 SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0x3F);//Open RxDone interrupt & Timeout 8005c2c: 223f movs r2, #63 ; 0x3f 8005c2e: 2111 movs r1, #17 8005c30: 4620 mov r0, r4 8005c32: f7ff ff28 bl 8005a86 SX1276_clearLoRaIrq(module); 8005c36: 4620 mov r0, r4 8005c38: f7ff ffde bl 8005bf8 SX1276_SPIWrite(module, LR_RegPayloadLength, length);//Payload Length 21byte(this register must difine when the data long of one byte in SF is 6) 8005c3c: 4632 mov r2, r6 8005c3e: 2122 movs r1, #34 ; 0x22 8005c40: 4620 mov r0, r4 8005c42: f7ff ff20 bl 8005a86 addr = SX1276_SPIRead(module, LR_RegFifoRxBaseAddr); //Read RxBaseAddr 8005c46: 210f movs r1, #15 8005c48: 4620 mov r0, r4 8005c4a: f7ff ff0d bl 8005a68 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr->FiFoAddrPtr 8005c4e: 210d movs r1, #13 8005c50: 4602 mov r2, r0 8005c52: 4620 mov r0, r4 8005c54: f7ff ff17 bl 8005a86 SX1276_SPIWrite(module, LR_RegOpMode, 0x85); //Mode//Low Frequency Mode 8005c58: 2285 movs r2, #133 ; 0x85 8005c5a: 2101 movs r1, #1 8005c5c: 4620 mov r0, r4 8005c5e: f7ff ff12 bl 8005a86 //SX1276_SPIWrite(module, LR_RegOpMode,0x05); //Continuous Rx Mode //High Frequency Mode module->readBytes = 0; 8005c62: 2300 movs r3, #0 8005c64: f884 310a strb.w r3, [r4, #266] ; 0x10a while (1) { if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8005c68: 2118 movs r1, #24 8005c6a: 4620 mov r0, r4 8005c6c: f7ff fefc bl 8005a68 8005c70: 0743 lsls r3, r0, #29 8005c72: d503 bpl.n 8005c7c module->status = RX; 8005c74: 2303 movs r3, #3 return 1; 8005c76: 2001 movs r0, #1 module->status = RX; 8005c78: 7263 strb r3, [r4, #9] return 1; 8005c7a: bd70 pop {r4, r5, r6, pc} } if (--timeout == 0) { 8005c7c: 3d01 subs r5, #1 8005c7e: d107 bne.n 8005c90 SX1276_hw_Reset(module->hw); 8005c80: 6820 ldr r0, [r4, #0] 8005c82: f7ff fed2 bl 8005a2a SX1276_defaultConfig(module); 8005c86: 4620 mov r0, r4 8005c88: f7ff ffac bl 8005be4 return 0; 8005c8c: 4628 mov r0, r5 8005c8e: bd70 pop {r4, r5, r6, pc} } SX1276_hw_DelayMs(1); 8005c90: 2001 movs r0, #1 8005c92: f7ff fec8 bl 8005a26 if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8005c96: e7e7 b.n 8005c68 08005c98 : SX1276_clearLoRaIrq(module); } return module->readBytes; } int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005c98: b570 push {r4, r5, r6, lr} 8005c9a: 4604 mov r4, r0 8005c9c: 460e mov r6, r1 uint8_t addr; uint8_t temp; module->packetLength = length; 8005c9e: 7221 strb r1, [r4, #8] int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005ca0: 4615 mov r5, r2 SX1276_defaultConfig(module); //setting base parameter 8005ca2: f7ff ff9f bl 8005be4 SX1276_SPIWrite(module, REG_LR_PADAC, 0x87); //Tx for 20dBm 8005ca6: 2287 movs r2, #135 ; 0x87 8005ca8: 214d movs r1, #77 ; 0x4d 8005caa: 4620 mov r0, r4 8005cac: f7ff feeb bl 8005a86 SX1276_SPIWrite(module, LR_RegHopPeriod, 0x00); //RegHopPeriod NO FHSS 8005cb0: 2200 movs r2, #0 8005cb2: 2124 movs r1, #36 ; 0x24 8005cb4: 4620 mov r0, r4 8005cb6: f7ff fee6 bl 8005a86 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01 8005cba: 2241 movs r2, #65 ; 0x41 8005cbc: 2140 movs r1, #64 ; 0x40 8005cbe: 4620 mov r0, r4 8005cc0: f7ff fee1 bl 8005a86 SX1276_clearLoRaIrq(module); 8005cc4: 4620 mov r0, r4 8005cc6: f7ff ff97 bl 8005bf8 SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0xF7); //Open TxDone interrupt 8005cca: 22f7 movs r2, #247 ; 0xf7 8005ccc: 2111 movs r1, #17 8005cce: 4620 mov r0, r4 8005cd0: f7ff fed9 bl 8005a86 SX1276_SPIWrite(module, LR_RegPayloadLength, length); //RegPayloadLength 21byte 8005cd4: 4632 mov r2, r6 8005cd6: 2122 movs r1, #34 ; 0x22 8005cd8: 4620 mov r0, r4 8005cda: f7ff fed4 bl 8005a86 addr = SX1276_SPIRead(module, LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr 8005cde: 210e movs r1, #14 8005ce0: 4620 mov r0, r4 8005ce2: f7ff fec1 bl 8005a68 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RegFifoAddrPtr 8005ce6: 210d movs r1, #13 8005ce8: 4602 mov r2, r0 8005cea: 4620 mov r0, r4 8005cec: f7ff fecb bl 8005a86 while (1) { temp = SX1276_SPIRead(module, LR_RegPayloadLength); 8005cf0: 2122 movs r1, #34 ; 0x22 8005cf2: 4620 mov r0, r4 8005cf4: f7ff feb8 bl 8005a68 if (temp == length) { 8005cf8: 4286 cmp r6, r0 8005cfa: d103 bne.n 8005d04 module->status = TX; 8005cfc: 2302 movs r3, #2 return 1; 8005cfe: 2001 movs r0, #1 module->status = TX; 8005d00: 7263 strb r3, [r4, #9] return 1; 8005d02: bd70 pop {r4, r5, r6, pc} } if (--timeout == 0) { 8005d04: 3d01 subs r5, #1 8005d06: d1f3 bne.n 8005cf0 SX1276_hw_Reset(module->hw); 8005d08: 6820 ldr r0, [r4, #0] 8005d0a: f7ff fe8e bl 8005a2a SX1276_defaultConfig(module); 8005d0e: 4620 mov r0, r4 8005d10: f7ff ff68 bl 8005be4 return 0; 8005d14: 4628 mov r0, r5 } } } 8005d16: bd70 pop {r4, r5, r6, pc} 08005d18 : int SX1276_LoRaTxPacket(SX1276_t * module, uint8_t* txBuffer, uint8_t length, uint32_t timeout) { 8005d18: b570 push {r4, r5, r6, lr} 8005d1a: 4604 mov r4, r0 8005d1c: 461e mov r6, r3 SX1276_SPIBurstWrite(module, 0x00, txBuffer, length); 8005d1e: 4613 mov r3, r2 8005d20: 460a mov r2, r1 8005d22: 2100 movs r1, #0 8005d24: f7ff fec5 bl 8005ab2 SX1276_SPIWrite(module, LR_RegOpMode, 0x8b); //Tx Mode 8005d28: 228b movs r2, #139 ; 0x8b 8005d2a: 2101 movs r1, #1 8005d2c: 4620 mov r0, r4 8005d2e: f7ff feaa bl 8005a86 while (1) { if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over 8005d32: 6820 ldr r0, [r4, #0] 8005d34: f7ff fe8f bl 8005a56 8005d38: 4605 mov r5, r0 8005d3a: b160 cbz r0, 8005d56 SX1276_SPIRead(module, LR_RegIrqFlags); 8005d3c: 2112 movs r1, #18 8005d3e: 4620 mov r0, r4 8005d40: f7ff fe92 bl 8005a68 SX1276_clearLoRaIrq(module); //Clear irq 8005d44: 4620 mov r0, r4 8005d46: f7ff ff57 bl 8005bf8 SX1276_standby(module); //Entry Standby mode 8005d4a: 4620 mov r0, r4 8005d4c: f7ff feb6 bl 8005abc return 1; 8005d50: 2501 movs r5, #1 SX1276_defaultConfig(module); return 0; } SX1276_hw_DelayMs(1); } } 8005d52: 4628 mov r0, r5 8005d54: bd70 pop {r4, r5, r6, pc} if (--timeout == 0) { 8005d56: 3e01 subs r6, #1 8005d58: d106 bne.n 8005d68 SX1276_hw_Reset(module->hw); 8005d5a: 6820 ldr r0, [r4, #0] 8005d5c: f7ff fe65 bl 8005a2a SX1276_defaultConfig(module); 8005d60: 4620 mov r0, r4 8005d62: f7ff ff3f bl 8005be4 8005d66: e7f4 b.n 8005d52 SX1276_hw_DelayMs(1); 8005d68: 2001 movs r0, #1 8005d6a: f7ff fe5c bl 8005a26 if (SX1276_hw_GetDIO0(module->hw)) { //if(Get_NIRQ()) //Packet send over 8005d6e: e7e0 b.n 8005d32 08005d70 : void SX1276_begin(SX1276_t * module, uint8_t frequency, uint8_t power, uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength) { 8005d70: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8005d74: 4604 mov r4, r0 8005d76: 4689 mov r9, r1 8005d78: 4690 mov r8, r2 8005d7a: 461f mov r7, r3 8005d7c: f89d 6020 ldrb.w r6, [sp, #32] 8005d80: f89d 5024 ldrb.w r5, [sp, #36] ; 0x24 SX1276_hw_init(module->hw); 8005d84: 6800 ldr r0, [r0, #0] 8005d86: f7ff fe12 bl 80059ae module->frequency = frequency; 8005d8a: f884 9004 strb.w r9, [r4, #4] module->power = power; 8005d8e: f884 8005 strb.w r8, [r4, #5] module->LoRa_Rate = LoRa_Rate; 8005d92: 71a7 strb r7, [r4, #6] module->LoRa_BW = LoRa_BW; 8005d94: 71e6 strb r6, [r4, #7] module->packetLength = packetLength; 8005d96: 7225 strb r5, [r4, #8] SX1276_defaultConfig(module); 8005d98: 4620 mov r0, r4 } 8005d9a: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} SX1276_defaultConfig(module); 8005d9e: f7ff bf21 b.w 8005be4 ... 08005da4 : void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART1)//RGB Comunication 8005da4: 6802 ldr r2, [r0, #0] 8005da6: 4b20 ldr r3, [pc, #128] ; (8005e28 ) { 8005da8: b510 push {r4, lr} if(huart->Instance == USART1)//RGB Comunication 8005daa: 429a cmp r2, r3 { 8005dac: 4604 mov r4, r0 if(huart->Instance == USART1)//RGB Comunication 8005dae: d11a bne.n 8005de6 { buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR; 8005db0: 4a1e ldr r2, [pc, #120] ; (8005e2c ) 8005db2: 491f ldr r1, [pc, #124] ; (8005e30 ) 8005db4: 7813 ldrb r3, [r2, #0] 8005db6: 7808 ldrb r0, [r1, #0] 8005db8: 491e ldr r1, [pc, #120] ; (8005e34 ) // printf("data %02x \r\n",rx1_data[0]); if(buf[count_in1++] == 0xEB){ 8005dba: 28eb cmp r0, #235 ; 0xeb buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR; 8005dbc: 54c8 strb r0, [r1, r3] if(buf[count_in1++] == 0xEB){ 8005dbe: f103 0301 add.w r3, r3, #1 8005dc2: b2db uxtb r3, r3 8005dc4: 7013 strb r3, [r2, #0] 8005dc6: d109 bne.n 8005ddc if(buf[bluecell_length] == (count_in1 - 3)) 8005dc8: 7889 ldrb r1, [r1, #2] 8005dca: 3b03 subs r3, #3 8005dcc: 4299 cmp r1, r3 uint8_t LoraDataSendGet(void){ return LoraDataSend; } void UartDataRecvSet(uint8_t val){ UartDataisReved = val; 8005dce: bf0b itete eq 8005dd0: 2201 moveq r2, #1 count_in1 = 0; 8005dd2: 2300 movne r3, #0 UartDataisReved = val; 8005dd4: 4b18 ldreq r3, [pc, #96] ; (8005e38 ) count_in1 = 0; 8005dd6: 7013 strbne r3, [r2, #0] UartDataisReved = val; 8005dd8: bf08 it eq 8005dda: 701a strbeq r2, [r3, #0] HAL_UART_Receive_IT(&huart1,&rx1_data[0],1); 8005ddc: 2201 movs r2, #1 8005dde: 4914 ldr r1, [pc, #80] ; (8005e30 ) 8005de0: 4816 ldr r0, [pc, #88] ; (8005e3c ) 8005de2: f7ff fabf bl 8005364 if(huart->Instance == USART2) // Lora?? ?†µ?‹ ?•˜?Š” ?¬?Š¸ 8005de6: 6822 ldr r2, [r4, #0] 8005de8: 4b15 ldr r3, [pc, #84] ; (8005e40 ) 8005dea: 429a cmp r2, r3 8005dec: d11b bne.n 8005e26 buf[count_in2] = rx2_data[0];//(uint8_t)USART2->DR; 8005dee: 4815 ldr r0, [pc, #84] ; (8005e44 ) 8005df0: 4a15 ldr r2, [pc, #84] ; (8005e48 ) 8005df2: 7803 ldrb r3, [r0, #0] 8005df4: 7811 ldrb r1, [r2, #0] 8005df6: 4a0f ldr r2, [pc, #60] ; (8005e34 ) if(buf[count_in2++] == 0xEB){ 8005df8: 29eb cmp r1, #235 ; 0xeb buf[count_in2] = rx2_data[0];//(uint8_t)USART2->DR; 8005dfa: 54d1 strb r1, [r2, r3] if(buf[count_in2++] == 0xEB){ 8005dfc: f103 0301 add.w r3, r3, #1 8005e00: b2db uxtb r3, r3 8005e02: 7003 strb r3, [r0, #0] 8005e04: d108 bne.n 8005e18 if(buf[bluecell_length] == (count_in2 - 3)) 8005e06: 7892 ldrb r2, [r2, #2] 8005e08: 3b03 subs r3, #3 8005e0a: 429a cmp r2, r3 UartDataisReved = val; 8005e0c: bf0b itete eq 8005e0e: 2202 moveq r2, #2 count_in1 = 0; 8005e10: 2200 movne r2, #0 UartDataisReved = val; 8005e12: 4b09 ldreq r3, [pc, #36] ; (8005e38 ) count_in1 = 0; 8005e14: 4b05 ldrne r3, [pc, #20] ; (8005e2c ) 8005e16: 701a strb r2, [r3, #0] HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8005e18: 2201 movs r2, #1 } 8005e1a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8005e1e: 490a ldr r1, [pc, #40] ; (8005e48 ) 8005e20: 480a ldr r0, [pc, #40] ; (8005e4c ) 8005e22: f7ff ba9f b.w 8005364 8005e26: bd10 pop {r4, pc} 8005e28: 40013800 .word 0x40013800 8005e2c: 200001e0 .word 0x200001e0 8005e30: 20000380 .word 0x20000380 8005e34: 2000017c .word 0x2000017c 8005e38: 2000021c .word 0x2000021c 8005e3c: 2000029c .word 0x2000029c 8005e40: 40004400 .word 0x40004400 8005e44: 200001e1 .word 0x200001e1 8005e48: 20000274 .word 0x20000274 8005e4c: 200003c4 .word 0x200003c4 08005e50 : if(htim->Instance == TIM6){ 8005e50: 6802 ldr r2, [r0, #0] 8005e52: 4b06 ldr r3, [pc, #24] ; (8005e6c ) 8005e54: 429a cmp r2, r3 8005e56: d107 bne.n 8005e68 UartTimerCnt++; 8005e58: 4a05 ldr r2, [pc, #20] ; (8005e70 ) 8005e5a: 6813 ldr r3, [r2, #0] 8005e5c: 3301 adds r3, #1 8005e5e: 6013 str r3, [r2, #0] LedTimerCnt++; 8005e60: 4a04 ldr r2, [pc, #16] ; (8005e74 ) 8005e62: 6813 ldr r3, [r2, #0] 8005e64: 3301 adds r3, #1 8005e66: 6013 str r3, [r2, #0] 8005e68: 4770 bx lr 8005e6a: bf00 nop 8005e6c: 40001000 .word 0x40001000 8005e70: 20000178 .word 0x20000178 8005e74: 20000170 .word 0x20000170 08005e78 : LoraDataSend = val; 8005e78: 4b01 ldr r3, [pc, #4] ; (8005e80 ) 8005e7a: 7018 strb r0, [r3, #0] 8005e7c: 4770 bx lr 8005e7e: bf00 nop 8005e80: 20000298 .word 0x20000298 08005e84 : } uint8_t UartDataRecvGet(void){ return UartDataisReved; } void RGB_SensorIDAutoSet(uint8_t set){ RGB_SensorIDAutoset = set; 8005e84: 4b01 ldr r3, [pc, #4] ; (8005e8c ) 8005e86: 7018 strb r0, [r3, #0] 8005e88: 4770 bx lr 8005e8a: bf00 nop 8005e8c: 20000175 .word 0x20000175 08005e90 : uint8_t RGB_SensorIDAutoGet(void){ return RGB_SensorIDAutoset; } void Uart2_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart2, data,size, 10); 8005e90: 460a mov r2, r1 8005e92: 230a movs r3, #10 8005e94: 4601 mov r1, r0 8005e96: 4801 ldr r0, [pc, #4] ; (8005e9c ) 8005e98: f7ff ba08 b.w 80052ac 8005e9c: 200003c4 .word 0x200003c4 08005ea0 : } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart1, data,size, 10); 8005ea0: 460a mov r2, r1 8005ea2: 230a movs r3, #10 8005ea4: 4601 mov r1, r0 8005ea6: 4801 ldr r0, [pc, #4] ; (8005eac ) 8005ea8: f7ff ba00 b.w 80052ac 8005eac: 2000029c .word 0x2000029c 08005eb0 <_write>: } int _write (int file, uint8_t *ptr, uint16_t len) { 8005eb0: b510 push {r4, lr} 8005eb2: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8005eb4: 230a movs r3, #10 8005eb6: 4802 ldr r0, [pc, #8] ; (8005ec0 <_write+0x10>) 8005eb8: f7ff f9f8 bl 80052ac return len; } 8005ebc: 4620 mov r0, r4 8005ebe: bd10 pop {r4, pc} 8005ec0: 2000029c .word 0x2000029c 08005ec4 : void Uart_dataCheck(uint8_t* cnt){ 8005ec4: b5f8 push {r3, r4, r5, r6, r7, lr} printf("%02x ",buf[i]); } printf("\r\n"); #endif crccheck = STH30_CheckCrc(&buf[bluecell_type],buf[bluecell_length],buf[buf[bluecell_length] + 1]); 8005ec6: 4c17 ldr r4, [pc, #92] ; (8005f24 ) void Uart_dataCheck(uint8_t* cnt){ 8005ec8: 4606 mov r6, r0 crccheck = STH30_CheckCrc(&buf[bluecell_type],buf[bluecell_length],buf[buf[bluecell_length] + 1]); 8005eca: 78a1 ldrb r1, [r4, #2] 8005ecc: 1c60 adds r0, r4, #1 8005ece: 1863 adds r3, r4, r1 8005ed0: 785a ldrb r2, [r3, #1] 8005ed2: f000 fc1e bl 8006712 8005ed6: 4625 mov r5, r4 if(crccheck == CHECKSUM_ERROR){ 8005ed8: b9d0 cbnz r0, 8005f10 for(uint8_t i = 0; i < (*cnt); i++){ printf("%02x ",buf[i]); 8005eda: 4f13 ldr r7, [pc, #76] ; (8005f28 ) for(uint8_t i = 0; i < (*cnt); i++){ 8005edc: 7833 ldrb r3, [r6, #0] 8005ede: 1c44 adds r4, r0, #1 8005ee0: b2c0 uxtb r0, r0 8005ee2: 4283 cmp r3, r0 8005ee4: d80e bhi.n 8005f04 } printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,buf[buf[bluecell_length] + 1]); 8005ee6: 78ab ldrb r3, [r5, #2] 8005ee8: 2100 movs r1, #0 8005eea: 441d add r5, r3 8005eec: 786a ldrb r2, [r5, #1] 8005eee: 480f ldr r0, [pc, #60] ; (8005f2c ) 8005ef0: f000 fd96 bl 8006a20 else{ printf("What Happen?\r\n"); /*NOP*/ } *cnt = 0; 8005ef4: 2100 movs r1, #0 memset(buf,0x00,buf_size); 8005ef6: 2264 movs r2, #100 ; 0x64 *cnt = 0; 8005ef8: 7031 strb r1, [r6, #0] memset(buf,0x00,buf_size); 8005efa: 480a ldr r0, [pc, #40] ; (8005f24 ) } 8005efc: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} memset(buf,0x00,buf_size); 8005f00: f000 bd85 b.w 8006a0e printf("%02x ",buf[i]); 8005f04: 5c29 ldrb r1, [r5, r0] 8005f06: 4638 mov r0, r7 8005f08: f000 fd8a bl 8006a20 8005f0c: 4620 mov r0, r4 8005f0e: e7e5 b.n 8005edc else if(crccheck == NO_ERROR){ 8005f10: 2801 cmp r0, #1 8005f12: d103 bne.n 8005f1c RGB_Controller_Func(&buf[bluecell_stx]); 8005f14: 4620 mov r0, r4 8005f16: f7ff fc81 bl 800581c 8005f1a: e7eb b.n 8005ef4 printf("What Happen?\r\n"); 8005f1c: 4804 ldr r0, [pc, #16] ; (8005f30 ) 8005f1e: f000 fdf3 bl 8006b08 8005f22: e7e7 b.n 8005ef4 8005f24: 2000017c .word 0x2000017c 8005f28: 08007b4b .word 0x08007b4b 8005f2c: 08007b51 .word 0x08007b51 8005f30: 08007b77 .word 0x08007b77 08005f34 : void RGB_Sensor_PowerOnOff(uint8_t id){ 8005f34: b510 push {r4, lr} 8005f36: 4604 mov r4, r0 printf("%d Power ON \r\n",id); 8005f38: 4601 mov r1, r0 8005f3a: 487b ldr r0, [pc, #492] ; (8006128 ) 8005f3c: f000 fd70 bl 8006a20 switch(id){ 8005f40: 2c08 cmp r4, #8 8005f42: f200 80ef bhi.w 8006124 8005f46: e8df f004 tbb [pc, r4] 8005f4a: 05c3 .short 0x05c3 8005f4c: 6854463e .word 0x6854463e 8005f50: 9f81 .short 0x9f81 8005f52: c3 .byte 0xc3 8005f53: 00 .byte 0x00 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; case 1: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_RESET); 8005f54: 2200 movs r2, #0 8005f56: f44f 5100 mov.w r1, #8192 ; 0x2000 8005f5a: 4874 ldr r0, [pc, #464] ; (800612c ) 8005f5c: f7fe fc44 bl 80047e8 HAL_Delay(50); 8005f60: 2032 movs r0, #50 ; 0x32 8005f62: f7fe f9b3 bl 80042cc HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005f66: 2201 movs r2, #1 8005f68: f44f 5100 mov.w r1, #8192 ; 0x2000 8005f6c: 486f ldr r0, [pc, #444] ; (800612c ) 8005f6e: f7fe fc3b bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_RESET); 8005f72: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); break; case 2: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005f74: f44f 4180 mov.w r1, #16384 ; 0x4000 8005f78: 486c ldr r0, [pc, #432] ; (800612c ) 8005f7a: f7fe fc35 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_RESET); 8005f7e: 2200 movs r2, #0 8005f80: f44f 4100 mov.w r1, #32768 ; 0x8000 8005f84: 4869 ldr r0, [pc, #420] ; (800612c ) 8005f86: f7fe fc2f bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_RESET); 8005f8a: 2200 movs r2, #0 8005f8c: 2140 movs r1, #64 ; 0x40 8005f8e: 4868 ldr r0, [pc, #416] ; (8006130 ) 8005f90: f7fe fc2a bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_RESET); 8005f94: 2200 movs r2, #0 8005f96: 2180 movs r1, #128 ; 0x80 8005f98: 4865 ldr r0, [pc, #404] ; (8006130 ) 8005f9a: f7fe fc25 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_RESET); 8005f9e: 2200 movs r2, #0 8005fa0: f44f 7180 mov.w r1, #256 ; 0x100 8005fa4: 4862 ldr r0, [pc, #392] ; (8006130 ) 8005fa6: f7fe fc1f bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); 8005faa: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8005fac: f44f 7100 mov.w r1, #512 ; 0x200 8005fb0: 485f ldr r0, [pc, #380] ; (8006130 ) 8005fb2: f7fe fc19 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); 8005fb6: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; } } 8005fb8: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 8005fbc: f44f 7180 mov.w r1, #256 ; 0x100 8005fc0: 485c ldr r0, [pc, #368] ; (8006134 ) 8005fc2: f7fe bc11 b.w 80047e8 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005fc6: 2201 movs r2, #1 8005fc8: f44f 5100 mov.w r1, #8192 ; 0x2000 8005fcc: 4857 ldr r0, [pc, #348] ; (800612c ) 8005fce: f7fe fc0b bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005fd2: 2201 movs r2, #1 8005fd4: e7ce b.n 8005f74 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005fd6: 2201 movs r2, #1 8005fd8: f44f 5100 mov.w r1, #8192 ; 0x2000 8005fdc: 4853 ldr r0, [pc, #332] ; (800612c ) 8005fde: f7fe fc03 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005fe2: 2201 movs r2, #1 8005fe4: f44f 4180 mov.w r1, #16384 ; 0x4000 8005fe8: 4850 ldr r0, [pc, #320] ; (800612c ) 8005fea: f7fe fbfd bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005fee: 2201 movs r2, #1 8005ff0: e7c6 b.n 8005f80 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005ff2: 2201 movs r2, #1 8005ff4: f44f 5100 mov.w r1, #8192 ; 0x2000 8005ff8: 484c ldr r0, [pc, #304] ; (800612c ) 8005ffa: f7fe fbf5 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005ffe: 2201 movs r2, #1 8006000: f44f 4180 mov.w r1, #16384 ; 0x4000 8006004: 4849 ldr r0, [pc, #292] ; (800612c ) 8006006: f7fe fbef bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 800600a: 2201 movs r2, #1 800600c: f44f 4100 mov.w r1, #32768 ; 0x8000 8006010: 4846 ldr r0, [pc, #280] ; (800612c ) 8006012: f7fe fbe9 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8006016: 2201 movs r2, #1 8006018: e7b8 b.n 8005f8c HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 800601a: 2201 movs r2, #1 800601c: f44f 5100 mov.w r1, #8192 ; 0x2000 8006020: 4842 ldr r0, [pc, #264] ; (800612c ) 8006022: f7fe fbe1 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006026: 2201 movs r2, #1 8006028: f44f 4180 mov.w r1, #16384 ; 0x4000 800602c: 483f ldr r0, [pc, #252] ; (800612c ) 800602e: f7fe fbdb bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8006032: 2201 movs r2, #1 8006034: f44f 4100 mov.w r1, #32768 ; 0x8000 8006038: 483c ldr r0, [pc, #240] ; (800612c ) 800603a: f7fe fbd5 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 800603e: 2201 movs r2, #1 8006040: 2140 movs r1, #64 ; 0x40 8006042: 483b ldr r0, [pc, #236] ; (8006130 ) 8006044: f7fe fbd0 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8006048: 2201 movs r2, #1 800604a: e7a4 b.n 8005f96 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 800604c: 2201 movs r2, #1 800604e: f44f 5100 mov.w r1, #8192 ; 0x2000 8006052: 4836 ldr r0, [pc, #216] ; (800612c ) 8006054: f7fe fbc8 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006058: 2201 movs r2, #1 800605a: f44f 4180 mov.w r1, #16384 ; 0x4000 800605e: 4833 ldr r0, [pc, #204] ; (800612c ) 8006060: f7fe fbc2 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8006064: 2201 movs r2, #1 8006066: f44f 4100 mov.w r1, #32768 ; 0x8000 800606a: 4830 ldr r0, [pc, #192] ; (800612c ) 800606c: f7fe fbbc bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8006070: 2201 movs r2, #1 8006072: 2140 movs r1, #64 ; 0x40 8006074: 482e ldr r0, [pc, #184] ; (8006130 ) 8006076: f7fe fbb7 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800607a: 2201 movs r2, #1 800607c: 2180 movs r1, #128 ; 0x80 800607e: 482c ldr r0, [pc, #176] ; (8006130 ) 8006080: f7fe fbb2 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8006084: 2201 movs r2, #1 8006086: e78b b.n 8005fa0 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8006088: 2201 movs r2, #1 800608a: f44f 5100 mov.w r1, #8192 ; 0x2000 800608e: 4827 ldr r0, [pc, #156] ; (800612c ) 8006090: f7fe fbaa bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006094: 2201 movs r2, #1 8006096: f44f 4180 mov.w r1, #16384 ; 0x4000 800609a: 4824 ldr r0, [pc, #144] ; (800612c ) 800609c: f7fe fba4 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 80060a0: 2201 movs r2, #1 80060a2: f44f 4100 mov.w r1, #32768 ; 0x8000 80060a6: 4821 ldr r0, [pc, #132] ; (800612c ) 80060a8: f7fe fb9e bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 80060ac: 2201 movs r2, #1 80060ae: 2140 movs r1, #64 ; 0x40 80060b0: 481f ldr r0, [pc, #124] ; (8006130 ) 80060b2: f7fe fb99 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 80060b6: 2201 movs r2, #1 80060b8: 2180 movs r1, #128 ; 0x80 80060ba: 481d ldr r0, [pc, #116] ; (8006130 ) 80060bc: f7fe fb94 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 80060c0: 2201 movs r2, #1 80060c2: f44f 7180 mov.w r1, #256 ; 0x100 80060c6: 481a ldr r0, [pc, #104] ; (8006130 ) 80060c8: f7fe fb8e bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 80060cc: 2201 movs r2, #1 80060ce: e76d b.n 8005fac HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 80060d0: 2201 movs r2, #1 80060d2: f44f 5100 mov.w r1, #8192 ; 0x2000 80060d6: 4815 ldr r0, [pc, #84] ; (800612c ) 80060d8: f7fe fb86 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 80060dc: 2201 movs r2, #1 80060de: f44f 4180 mov.w r1, #16384 ; 0x4000 80060e2: 4812 ldr r0, [pc, #72] ; (800612c ) 80060e4: f7fe fb80 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 80060e8: 2201 movs r2, #1 80060ea: f44f 4100 mov.w r1, #32768 ; 0x8000 80060ee: 480f ldr r0, [pc, #60] ; (800612c ) 80060f0: f7fe fb7a bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 80060f4: 2201 movs r2, #1 80060f6: 2140 movs r1, #64 ; 0x40 80060f8: 480d ldr r0, [pc, #52] ; (8006130 ) 80060fa: f7fe fb75 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 80060fe: 2201 movs r2, #1 8006100: 2180 movs r1, #128 ; 0x80 8006102: 480b ldr r0, [pc, #44] ; (8006130 ) 8006104: f7fe fb70 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8006108: 2201 movs r2, #1 800610a: f44f 7180 mov.w r1, #256 ; 0x100 800610e: 4808 ldr r0, [pc, #32] ; (8006130 ) 8006110: f7fe fb6a bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8006114: 2201 movs r2, #1 8006116: f44f 7100 mov.w r1, #512 ; 0x200 800611a: 4805 ldr r0, [pc, #20] ; (8006130 ) 800611c: f7fe fb64 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 8006120: 2201 movs r2, #1 8006122: e749 b.n 8005fb8 8006124: bd10 pop {r4, pc} 8006126: bf00 nop 8006128: 08007b3c .word 0x08007b3c 800612c: 40010c00 .word 0x40010c00 8006130: 40011000 .word 0x40011000 8006134: 40010800 .word 0x40010800 08006138 : #endif // PYJ.2019.03.20_END -- #define ADDR_FLASH_PAGE_TEST ((uint32_t)0x08030000) /* Base @ of Page 127, 1 Kbytes */ #define FLASH_USER_START_ADDR ADDR_FLASH_PAGE_TEST /* Start @ of user Flash area */ #define FLASH_USER_END_ADDR ADDR_FLASH_PAGE_TEST + ((uint32_t)0x0000FFFF) /* End @ of user Flash area */ void Flash_RGB_Data_Write(uint32_t Addr,uint8_t* data){ 8006138: b570 push {r4, r5, r6, lr} 800613a: 4604 mov r4, r0 uint16_t temp_Red = 0,temp_Green = 0,temp_Blue = 0; temp_Red = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); //R temp_Green= ((data[bluecell_green_H] << 8) |data[bluecell_green_L]); //G 800613c: 798b ldrb r3, [r1, #6] 800613e: 79ce ldrb r6, [r1, #7] temp_Blue = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]); //B 8006140: 7a4d ldrb r5, [r1, #9] temp_Green= ((data[bluecell_green_H] << 8) |data[bluecell_green_L]); //G 8006142: ea46 2603 orr.w r6, r6, r3, lsl #8 temp_Blue = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]); //B 8006146: 7a0b ldrb r3, [r1, #8] temp_Red = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); //R 8006148: 794a ldrb r2, [r1, #5] temp_Blue = ((data[bluecell_blue_H] << 8) |data[bluecell_blue_L]); //B 800614a: ea45 2503 orr.w r5, r5, r3, lsl #8 temp_Red = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); //R 800614e: 790b ldrb r3, [r1, #4] HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 , (uint16_t)temp_Red); 8006150: 4601 mov r1, r0 temp_Red = ((data[bluecell_red_H] << 8) |data[bluecell_red_L]); //R 8006152: ea42 2203 orr.w r2, r2, r3, lsl #8 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 , (uint16_t)temp_Red); 8006156: 2001 movs r0, #1 8006158: 2300 movs r3, #0 800615a: f7fe fa0d bl 8004578 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 2 , (uint16_t)temp_Green); 800615e: 4632 mov r2, r6 8006160: 1ca1 adds r1, r4, #2 8006162: 2300 movs r3, #0 8006164: 2001 movs r0, #1 8006166: f7fe fa07 bl 8004578 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 , (uint16_t)temp_Blue); 800616a: 462a mov r2, r5 800616c: 1d21 adds r1, r4, #4 800616e: 2300 movs r3, #0 } 8006170: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 , (uint16_t)temp_Blue); 8006174: 2001 movs r0, #1 8006176: f7fe b9ff b.w 8004578 ... 0800617c : void Flash_write(uint8_t* data) // 쓰기함수 { 800617c: b537 push {r0, r1, r2, r4, r5, lr} 800617e: 4605 mov r5, r0 // EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; // EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; // EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; Address = START_ADDR; __HAL_RCC_TIM7_CLK_DISABLE(); // 매인타이머를 정지합니다 8006180: 4c0f ldr r4, [pc, #60] ; (80061c0 ) 8006182: 69e3 ldr r3, [r4, #28] 8006184: f023 0320 bic.w r3, r3, #32 8006188: 61e3 str r3, [r4, #28] HAL_FLASH_Unlock(); // lock 풀기 800618a: f7fe f9af bl 80044ec 800618e: 7aab ldrb r3, [r5, #10] case 8: Address += 42; break; } Flash_RGB_Data_Write(Address,&data[bluecell_stx]); 8006190: 4629 mov r1, r5 8006192: 3b02 subs r3, #2 8006194: b2db uxtb r3, r3 8006196: 2b06 cmp r3, #6 8006198: bf96 itet ls 800619a: 4a0a ldrls r2, [pc, #40] ; (80061c4 ) switch(data[bluecell_dstid]){ 800619c: 480a ldrhi r0, [pc, #40] ; (80061c8 ) 800619e: f852 0023 ldrls.w r0, [r2, r3, lsl #2] Flash_RGB_Data_Write(Address,&data[bluecell_stx]); 80061a2: f7ff ffc9 bl 8006138 HAL_FLASH_Lock(); // lock 잠그기 80061a6: f7fe f9b3 bl 8004510 __HAL_RCC_TIM7_CLK_ENABLE(); // 매인타이머를 재시작합니다 80061aa: 69e3 ldr r3, [r4, #28] 80061ac: f043 0320 orr.w r3, r3, #32 80061b0: 61e3 str r3, [r4, #28] 80061b2: 69e3 ldr r3, [r4, #28] 80061b4: f003 0320 and.w r3, r3, #32 80061b8: 9301 str r3, [sp, #4] 80061ba: 9b01 ldr r3, [sp, #4] } 80061bc: b003 add sp, #12 80061be: bd30 pop {r4, r5, pc} 80061c0: 40021000 .word 0x40021000 80061c4: 08007b20 .word 0x08007b20 80061c8: 08030000 .word 0x08030000 080061cc : void Flash_InitRead(void) // 쓰기함수 { 80061cc: b530 push {r4, r5, lr} 80061ce: 480a ldr r0, [pc, #40] ; (80061f8 ) 80061d0: 490a ldr r1, [pc, #40] ; (80061fc ) 80061d2: 4a0b ldr r2, [pc, #44] ; (8006200 ) 80061d4: 4b0b ldr r3, [pc, #44] ; (8006204 ) uint32_t Address = 0; Address = StartAddr; for(uint8_t i = 1; i <= 8; i++ ){ 80061d6: 4c0c ldr r4, [pc, #48] ; (8006208 ) RGB_SensorRedLimit_Buf[i] = (*(uint16_t*)Address); 80061d8: f833 5c06 ldrh.w r5, [r3, #-6] 80061dc: 3306 adds r3, #6 80061de: f820 5f02 strh.w r5, [r0, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorGreenLimit_Buf[i] = (*(uint16_t*)Address); 80061e2: f833 5c0a ldrh.w r5, [r3, #-10] 80061e6: f821 5f02 strh.w r5, [r1, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 80061ea: f833 5c08 ldrh.w r5, [r3, #-8] for(uint8_t i = 1; i <= 8; i++ ){ 80061ee: 42a3 cmp r3, r4 RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 80061f0: f822 5f02 strh.w r5, [r2, #2]! for(uint8_t i = 1; i <= 8; i++ ){ 80061f4: d1f0 bne.n 80061d8 // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; } } 80061f6: bd30 pop {r4, r5, pc} 80061f8: 20000114 .word 0x20000114 80061fc: 20000102 .word 0x20000102 8006200: 200000f0 .word 0x200000f0 8006204: 08030006 .word 0x08030006 8006208: 08030036 .word 0x08030036 0800620c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800620c: b510 push {r4, lr} 800620e: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8006210: 2228 movs r2, #40 ; 0x28 8006212: 2100 movs r1, #0 8006214: a806 add r0, sp, #24 8006216: f000 fbfa bl 8006a0e RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800621a: 2100 movs r1, #0 800621c: 2214 movs r2, #20 800621e: a801 add r0, sp, #4 8006220: f000 fbf5 bl 8006a0e */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8006224: 2402 movs r4, #2 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8006226: 2201 movs r2, #1 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8006228: f44f 3380 mov.w r3, #65536 ; 0x10000 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800622c: a806 add r0, sp, #24 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 800622e: 9206 str r2, [sp, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8006230: 9307 str r3, [sp, #28] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8006232: 920a str r2, [sp, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8006234: 930e str r3, [sp, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8006236: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8006238: f7fe fb60 bl 80048fc { Error_Handler(); } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800623c: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800623e: 2100 movs r1, #0 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8006240: 9301 str r3, [sp, #4] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8006242: f44f 6380 mov.w r3, #1024 ; 0x400 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8006246: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8006248: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800624a: 9103 str r1, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800624c: 9304 str r3, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800624e: 9105 str r1, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8006250: f7fe fd1c bl 8004c8c { Error_Handler(); } } 8006254: b010 add sp, #64 ; 0x40 8006256: bd10 pop {r4, pc} 08006258
: { 8006258: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 800625c: 2604 movs r6, #4 800625e: 2501 movs r5, #1 8006260: f04f 08be mov.w r8, #190 ; 0xbe 8006264: 4fbc ldr r7, [pc, #752] ; (8006558 ) { 8006266: b093 sub sp, #76 ; 0x4c uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 8006268: 783b ldrb r3, [r7, #0] 800626a: 4631 mov r1, r6 800626c: f88d 302b strb.w r3, [sp, #43] ; 0x2b 8006270: 4bba ldr r3, [pc, #744] ; (800655c ) 8006272: f10d 0029 add.w r0, sp, #41 ; 0x29 8006276: 781b ldrb r3, [r3, #0] 8006278: f88d 8028 strb.w r8, [sp, #40] ; 0x28 800627c: f88d 602a strb.w r6, [sp, #42] ; 0x2a 8006280: f88d 302c strb.w r3, [sp, #44] ; 0x2c 8006284: f88d 5029 strb.w r5, [sp, #41] ; 0x29 8006288: f000 fa28 bl 80066dc uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 800628c: f04f 0303 mov.w r3, #3 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 8006290: 24eb movs r4, #235 ; 0xeb uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 8006292: f88d 3031 strb.w r3, [sp, #49] ; 0x31 8006296: 783b ldrb r3, [r7, #0] 8006298: 4631 mov r1, r6 800629a: f88d 3033 strb.w r3, [sp, #51] ; 0x33 800629e: 4baf ldr r3, [pc, #700] ; (800655c ) uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80062a0: f88d 002d strb.w r0, [sp, #45] ; 0x2d uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 80062a4: 781b ldrb r3, [r3, #0] 80062a6: f10d 0031 add.w r0, sp, #49 ; 0x31 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80062aa: f04f 0910 mov.w r9, #16 uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 80062ae: f88d 3034 strb.w r3, [sp, #52] ; 0x34 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[bluecell_type],StatusRequest_data[bluecell_length]),0xeb}; 80062b2: f88d 402e strb.w r4, [sp, #46] ; 0x2e uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[bluecell_type],IDAutoSetRequest_data[bluecell_length]),0xeb}; 80062b6: f88d 8030 strb.w r8, [sp, #48] ; 0x30 80062ba: f88d 6032 strb.w r6, [sp, #50] ; 0x32 80062be: f000 fa0d bl 80066dc 80062c2: f88d 4036 strb.w r4, [sp, #54] ; 0x36 80062c6: f88d 0035 strb.w r0, [sp, #53] ; 0x35 HAL_Init(); 80062ca: f7fd ffdb bl 8004284 SystemClock_Config(); 80062ce: f7ff ff9d bl 800620c GPIO_InitTypeDef GPIO_InitStruct = {0}; 80062d2: 464a mov r2, r9 80062d4: 2100 movs r1, #0 80062d6: a80e add r0, sp, #56 ; 0x38 80062d8: f000 fb99 bl 8006a0e /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 80062dc: 4ba0 ldr r3, [pc, #640] ; (8006560 ) __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 80062de: f649 71f0 movw r1, #40944 ; 0x9ff0 __HAL_RCC_GPIOC_CLK_ENABLE(); 80062e2: 699a ldr r2, [r3, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 80062e4: 489f ldr r0, [pc, #636] ; (8006564 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 80062e6: ea42 0209 orr.w r2, r2, r9 80062ea: 619a str r2, [r3, #24] 80062ec: 699a ldr r2, [r3, #24] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin |SENSOR_EN8_Pin|SX1276_NSS_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 80062ee: f8df b2ec ldr.w fp, [pc, #748] ; 80065dc __HAL_RCC_GPIOC_CLK_ENABLE(); 80062f2: ea02 0209 and.w r2, r2, r9 80062f6: 9206 str r2, [sp, #24] 80062f8: 9a06 ldr r2, [sp, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 80062fa: 699a ldr r2, [r3, #24] LED_CH2_Pin LED_CH3_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin |LED_CH2_Pin|LED_CH3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 80062fc: 2400 movs r4, #0 __HAL_RCC_GPIOD_CLK_ENABLE(); 80062fe: f042 0220 orr.w r2, r2, #32 8006302: 619a str r2, [r3, #24] 8006304: 699a ldr r2, [r3, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8006306: f04f 0a02 mov.w sl, #2 __HAL_RCC_GPIOD_CLK_ENABLE(); 800630a: f002 0220 and.w r2, r2, #32 800630e: 9207 str r2, [sp, #28] 8006310: 9a07 ldr r2, [sp, #28] __HAL_RCC_GPIOA_CLK_ENABLE(); 8006312: 699a ldr r2, [r3, #24] htim6.Instance = TIM6; 8006314: f8df 82c8 ldr.w r8, [pc, #712] ; 80065e0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8006318: 4332 orrs r2, r6 800631a: 619a str r2, [r3, #24] 800631c: 699a ldr r2, [r3, #24] huart1.Instance = USART1; 800631e: 4f92 ldr r7, [pc, #584] ; (8006568 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8006320: 4032 ands r2, r6 8006322: 9208 str r2, [sp, #32] 8006324: 9a08 ldr r2, [sp, #32] __HAL_RCC_GPIOB_CLK_ENABLE(); 8006326: 699a ldr r2, [r3, #24] 8006328: f042 0208 orr.w r2, r2, #8 800632c: 619a str r2, [r3, #24] 800632e: 699b ldr r3, [r3, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8006330: 2200 movs r2, #0 __HAL_RCC_GPIOB_CLK_ENABLE(); 8006332: f003 0308 and.w r3, r3, #8 8006336: 9309 str r3, [sp, #36] ; 0x24 8006338: 9b09 ldr r3, [sp, #36] ; 0x24 HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 800633a: f7fe fa55 bl 80047e8 HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 800633e: 4b8b ldr r3, [pc, #556] ; (800656c ) 8006340: 2200 movs r2, #0 8006342: 4618 mov r0, r3 8006344: f248 11f0 movw r1, #33264 ; 0x81f0 8006348: 9303 str r3, [sp, #12] 800634a: f7fe fa4d bl 80047e8 HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 800634e: 2200 movs r2, #0 8006350: f24f 31e9 movw r1, #62441 ; 0xf3e9 8006354: 4658 mov r0, fp 8006356: f7fe fa47 bl 80047e8 HAL_GPIO_WritePin(LED_CH4_GPIO_Port, LED_CH4_Pin, GPIO_PIN_RESET); 800635a: 4631 mov r1, r6 800635c: 2200 movs r2, #0 800635e: 4884 ldr r0, [pc, #528] ; (8006570 ) 8006360: f7fe fa42 bl 80047e8 GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8006364: f649 72f0 movw r2, #40944 ; 0x9ff0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8006368: a90e add r1, sp, #56 ; 0x38 800636a: 487e ldr r0, [pc, #504] ; (8006564 ) GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 800636c: 920e str r2, [sp, #56] ; 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 800636e: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8006370: f8cd a044 str.w sl, [sp, #68] ; 0x44 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8006374: 950f str r5, [sp, #60] ; 0x3c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8006376: f7fe f945 bl 8004604 /*Configure GPIO pins : SX1276_DIO0_Pin SX1276_DIO1_Pin SX1276_DIO2_Pin SX1276_DIO3_Pin SENSOR_EN8_Pin SX1276_NSS_Pin */ GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 800637a: f248 12f0 movw r2, #33264 ; 0x81f0 |SENSOR_EN8_Pin|SX1276_NSS_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800637e: 9b03 ldr r3, [sp, #12] 8006380: a90e add r1, sp, #56 ; 0x38 8006382: 4618 mov r0, r3 8006384: 9305 str r3, [sp, #20] GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8006386: 920e str r2, [sp, #56] ; 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8006388: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800638a: f8cd a044 str.w sl, [sp, #68] ; 0x44 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800638e: 950f str r5, [sp, #60] ; 0x3c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006390: f7fe f938 bl 8004604 /*Configure GPIO pins : SX1276_RESET_Pin LED_ALARM_Pin SENSOR_EN1_Pin SENSOR_EN2_Pin SENSOR_EN3_Pin SX1276_CLK_Pin SX1276_MOSI_Pin LED_CH5_Pin LED_CH6_Pin LED_CH7_Pin LED_CH8_Pin */ GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8006394: f24f 32e9 movw r2, #62441 ; 0xf3e9 |SENSOR_EN3_Pin|SX1276_CLK_Pin|SX1276_MOSI_Pin|LED_CH5_Pin |LED_CH6_Pin|LED_CH7_Pin|LED_CH8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8006398: a90e add r1, sp, #56 ; 0x38 800639a: 4658 mov r0, fp GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 800639c: 920e str r2, [sp, #56] ; 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 800639e: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80063a0: f8cd a044 str.w sl, [sp, #68] ; 0x44 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80063a4: 950f str r5, [sp, #60] ; 0x3c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80063a6: f7fe f92d bl 8004604 /*Configure GPIO pin : LED_CH4_Pin */ GPIO_InitStruct.Pin = LED_CH4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 80063aa: a90e add r1, sp, #56 ; 0x38 80063ac: 4870 ldr r0, [pc, #448] ; (8006570 ) GPIO_InitStruct.Pin = LED_CH4_Pin; 80063ae: 960e str r6, [sp, #56] ; 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 80063b0: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80063b2: f8cd a044 str.w sl, [sp, #68] ; 0x44 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80063b6: 950f str r5, [sp, #60] ; 0x3c HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 80063b8: f7fe f924 bl 8004604 /*Configure GPIO pin : SX1276_MISO_Pin */ GPIO_InitStruct.Pin = SX1276_MISO_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 80063bc: a90e add r1, sp, #56 ; 0x38 80063be: 4658 mov r0, fp GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80063c0: 940f str r4, [sp, #60] ; 0x3c GPIO_InitStruct.Pull = GPIO_NOPULL; 80063c2: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Pin = SX1276_MISO_Pin; 80063c4: f8cd 9038 str.w r9, [sp, #56] ; 0x38 HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 80063c8: f7fe f91c bl 8004604 htim6.Init.Prescaler = 1600-1; 80063cc: f240 633f movw r3, #1599 ; 0x63f 80063d0: 4a68 ldr r2, [pc, #416] ; (8006574 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80063d2: 4640 mov r0, r8 htim6.Init.Prescaler = 1600-1; 80063d4: e888 000c stmia.w r8, {r2, r3} htim6.Init.Period = 10-1; 80063d8: 2209 movs r2, #9 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 80063da: f8c8 4008 str.w r4, [r8, #8] htim6.Init.Period = 10-1; 80063de: f8c8 200c str.w r2, [r8, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80063e2: f8c8 4018 str.w r4, [r8, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 80063e6: 940e str r4, [sp, #56] ; 0x38 80063e8: 940f str r4, [sp, #60] ; 0x3c if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80063ea: f7fe fe1f bl 800502c if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80063ee: a90e add r1, sp, #56 ; 0x38 80063f0: 4640 mov r0, r8 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80063f2: 940e str r4, [sp, #56] ; 0x38 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80063f4: 940f str r4, [sp, #60] ; 0x3c if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80063f6: f7fe fe33 bl 8005060 huart1.Instance = USART1; 80063fa: 4a5f ldr r2, [pc, #380] ; (8006578 ) huart1.Init.BaudRate = 115200; 80063fc: f44f 31e1 mov.w r1, #115200 ; 0x1c200 huart1.Instance = USART1; 8006400: 603a str r2, [r7, #0] huart1.Init.Mode = UART_MODE_TX_RX; 8006402: 220c movs r2, #12 if (HAL_UART_Init(&huart1) != HAL_OK) 8006404: 4638 mov r0, r7 huart2.Instance = USART2; 8006406: 4e5d ldr r6, [pc, #372] ; (800657c ) huart1.Init.BaudRate = 115200; 8006408: 6079 str r1, [r7, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 800640a: 60bc str r4, [r7, #8] huart1.Init.StopBits = UART_STOPBITS_1; 800640c: 60fc str r4, [r7, #12] huart1.Init.Parity = UART_PARITY_NONE; 800640e: 613c str r4, [r7, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8006410: 617a str r2, [r7, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8006412: 61bc str r4, [r7, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8006414: 61fc str r4, [r7, #28] huart1.Init.BaudRate = 115200; 8006416: 9104 str r1, [sp, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8006418: 9203 str r2, [sp, #12] if (HAL_UART_Init(&huart1) != HAL_OK) 800641a: f7fe ff19 bl 8005250 huart2.Instance = USART2; 800641e: 4858 ldr r0, [pc, #352] ; (8006580 ) huart2.Init.BaudRate = 115200; 8006420: 9904 ldr r1, [sp, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8006422: 9a03 ldr r2, [sp, #12] huart2.Instance = USART2; 8006424: 6030 str r0, [r6, #0] if (HAL_UART_Init(&huart2) != HAL_OK) 8006426: 4630 mov r0, r6 huart2.Init.BaudRate = 115200; 8006428: 6071 str r1, [r6, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800642a: 60b4 str r4, [r6, #8] huart2.Init.StopBits = UART_STOPBITS_1; 800642c: 60f4 str r4, [r6, #12] huart2.Init.Parity = UART_PARITY_NONE; 800642e: 6134 str r4, [r6, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8006430: 6172 str r2, [r6, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8006432: 61b4 str r4, [r6, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8006434: 61f4 str r4, [r6, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8006436: f7fe ff0b bl 8005250 hi2c2.Instance = I2C2; 800643a: 4852 ldr r0, [pc, #328] ; (8006584 ) hi2c2.Init.ClockSpeed = 100000; 800643c: 4952 ldr r1, [pc, #328] ; (8006588 ) 800643e: 4a53 ldr r2, [pc, #332] ; (800658c ) hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 8006440: 6084 str r4, [r0, #8] hi2c2.Init.ClockSpeed = 100000; 8006442: e880 0006 stmia.w r0, {r1, r2} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8006446: f44f 4280 mov.w r2, #16384 ; 0x4000 hi2c2.Init.OwnAddress1 = 0; 800644a: 60c4 str r4, [r0, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 800644c: 6102 str r2, [r0, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 800644e: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 8006450: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8006452: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8006454: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8006456: f7fe f9d1 bl 80047fc HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 800645a: 4622 mov r2, r4 800645c: 4621 mov r1, r4 800645e: 2026 movs r0, #38 ; 0x26 8006460: f7fd ff58 bl 8004314 HAL_NVIC_EnableIRQ(USART2_IRQn); 8006464: 2026 movs r0, #38 ; 0x26 8006466: f7fd ff89 bl 800437c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 800646a: 4622 mov r2, r4 800646c: 4621 mov r1, r4 800646e: 2025 movs r0, #37 ; 0x25 8006470: f7fd ff50 bl 8004314 HAL_NVIC_EnableIRQ(USART1_IRQn); 8006474: 2025 movs r0, #37 ; 0x25 8006476: f7fd ff81 bl 800437c HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 800647a: 4622 mov r2, r4 800647c: 4621 mov r1, r4 800647e: 2036 movs r0, #54 ; 0x36 8006480: f7fd ff48 bl 8004314 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8006484: 2036 movs r0, #54 ; 0x36 8006486: f7fd ff79 bl 800437c HAL_TIM_Base_Start_IT(&htim6); 800648a: 4640 mov r0, r8 800648c: f7fe fcd0 bl 8004e30 HAL_UART_Receive_IT(&huart1, &rx1_data[0],1); 8006490: 462a mov r2, r5 8006492: 493f ldr r1, [pc, #252] ; (8006590 ) 8006494: 4638 mov r0, r7 8006496: f7fe ff65 bl 8005364 HAL_UART_Receive_IT(&huart2, &rx2_data[0],1); 800649a: 462a mov r2, r5 800649c: 493d ldr r1, [pc, #244] ; (8006594 ) 800649e: 4630 mov r0, r6 80064a0: f7fe ff60 bl 8005364 setbuf(stdout, NULL); // \n 을 적을 떄만 80064a4: 4a3c ldr r2, [pc, #240] ; (8006598 ) 80064a6: 4621 mov r1, r4 80064a8: 6812 ldr r2, [r2, #0] RGB_SensorIDAutoset = set; 80064aa: 4e3c ldr r6, [pc, #240] ; (800659c ) setbuf(stdout, NULL); // \n 을 적을 떄만 80064ac: 6890 ldr r0, [r2, #8] 80064ae: f000 fb33 bl 8006b18 printf("****************************************\r\n"); 80064b2: 483b ldr r0, [pc, #236] ; (80065a0 ) 80064b4: f000 fb28 bl 8006b08 printf("RGB Project\r\n"); 80064b8: 483a ldr r0, [pc, #232] ; (80065a4 ) 80064ba: f000 fb25 bl 8006b08 printf("Build at %s %s\r\n", __DATE__, __TIME__); 80064be: 493a ldr r1, [pc, #232] ; (80065a8 ) 80064c0: 4a3a ldr r2, [pc, #232] ; (80065ac ) 80064c2: 483b ldr r0, [pc, #236] ; (80065b0 ) 80064c4: f000 faac bl 8006a20 printf("Copyright (c) 2019. BLUECELL\r\n"); 80064c8: 483a ldr r0, [pc, #232] ; (80065b4 ) 80064ca: f000 fb1d bl 8006b08 printf("****************************************\r\n"); 80064ce: 4834 ldr r0, [pc, #208] ; (80065a0 ) 80064d0: f000 fb1a bl 8006b08 RGB_SensorIDAutoset = set; 80064d4: 7035 strb r5, [r6, #0] Flash_InitRead(); 80064d6: f7ff fe79 bl 80061cc SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 80064da: 4a37 ldr r2, [pc, #220] ; (80065b8 ) 80064dc: 9b05 ldr r3, [sp, #20] SX1276.hw = &SX1276_hw; 80064de: 4f37 ldr r7, [pc, #220] ; (80065bc ) SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 80064e0: 60d3 str r3, [r2, #12] SX1276_hw.nss.port = GPIOA; 80064e2: 6153 str r3, [r2, #20] SX1276_hw.nss.pin = GPIO_PIN_15; 80064e4: f44f 4300 mov.w r3, #32768 ; 0x8000 printf("Configuring LoRa module\r\n"); 80064e8: 4835 ldr r0, [pc, #212] ; (80065c0 ) SX1276_hw.nss.pin = GPIO_PIN_15; 80064ea: 6113 str r3, [r2, #16] SX1276_hw.dio0.pin = SX1276_DIO0_Pin; 80064ec: f8c2 9008 str.w r9, [r2, #8] SX1276_hw.reset.pin = SX1276_RESET_Pin; 80064f0: e882 0820 stmia.w r2, {r5, fp} SX1276.hw = &SX1276_hw; 80064f4: 603a str r2, [r7, #0] printf("Configuring LoRa module\r\n"); 80064f6: f000 fb07 bl 8006b08 SX1276_begin(&SX1276, SX1276_917MHZ, SX1276_POWER_17DBM, SX1276_LORA_SF_8, 80064fa: 2003 movs r0, #3 80064fc: 230a movs r3, #10 80064fe: 4621 mov r1, r4 8006500: e88d 0009 stmia.w sp, {r0, r3} 8006504: 462a mov r2, r5 8006506: 4653 mov r3, sl 8006508: 4638 mov r0, r7 800650a: f7ff fc31 bl 8005d70 printf("Done configuring LoRaModule\r\n"); 800650e: 482d ldr r0, [pc, #180] ; (80065c4 ) 8006510: f000 fafa bl 8006b08 if (master == 1) { 8006514: 4b2c ldr r3, [pc, #176] ; (80065c8 ) ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 8006516: f44f 62fa mov.w r2, #2000 ; 0x7d0 if (master == 1) { 800651a: 681b ldr r3, [r3, #0] ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 800651c: 4649 mov r1, r9 if (master == 1) { 800651e: 42ab cmp r3, r5 ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 8006520: 4638 mov r0, r7 8006522: f8df 8038 ldr.w r8, [pc, #56] ; 800655c 8006526: 46b2 mov sl, r6 8006528: 4c28 ldr r4, [pc, #160] ; (80065cc ) if (master == 1) { 800652a: d173 bne.n 8006614 ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 800652c: f7ff fbb4 bl 8005c98 return UartDataisReved; 8006530: 4e27 ldr r6, [pc, #156] ; (80065d0 ) { 8006532: 2500 movs r5, #0 8006534: 46b3 mov fp, r6 ret = SX1276_LoRaEntryRx(&SX1276, 16, 2000); 8006536: 6020 str r0, [r4, #0] return LoraDataSend; 8006538: 4b26 ldr r3, [pc, #152] ; (80065d4 ) if(LoraDataSendGet() == 1){ 800653a: 781a ldrb r2, [r3, #0] 800653c: 2a01 cmp r2, #1 800653e: d15e bne.n 80065fe LoraDataSend = val; 8006540: 2200 movs r2, #0 message_length = Lora_Max_Amount + 2 + 3;////length 1byte + type 1byte + RGB Data 60byte + stx + etx + crc 8006542: 2141 movs r1, #65 ; 0x41 8006544: 4f24 ldr r7, [pc, #144] ; (80065d8 ) LoraDataSend = val; 8006546: 701a strb r2, [r3, #0] ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 8006548: 481c ldr r0, [pc, #112] ; (80065bc ) 800654a: f44f 62fa mov.w r2, #2000 ; 0x7d0 message_length = Lora_Max_Amount + 2 + 3;////length 1byte + type 1byte + RGB Data 60byte + stx + etx + crc 800654e: 6039 str r1, [r7, #0] ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 8006550: f7ff fba2 bl 8005c98 8006554: e046 b.n 80065e4 8006556: bf00 nop 8006558: 20000174 .word 0x20000174 800655c: 20000176 .word 0x20000176 8006560: 40021000 .word 0x40021000 8006564: 40011000 .word 0x40011000 8006568: 2000029c .word 0x2000029c 800656c: 40010800 .word 0x40010800 8006570: 40011400 .word 0x40011400 8006574: 40001000 .word 0x40001000 8006578: 40013800 .word 0x40013800 800657c: 200003c4 .word 0x200003c4 8006580: 40004400 .word 0x40004400 8006584: 20000220 .word 0x20000220 8006588: 40005800 .word 0x40005800 800658c: 000186a0 .word 0x000186a0 8006590: 20000380 .word 0x20000380 8006594: 20000274 .word 0x20000274 8006598: 2000000c .word 0x2000000c 800659c: 20000175 .word 0x20000175 80065a0: 08007b85 .word 0x08007b85 80065a4: 08007baf .word 0x08007baf 80065a8: 08007bc5 .word 0x08007bc5 80065ac: 08007bbc .word 0x08007bbc 80065b0: 08007bd1 .word 0x08007bd1 80065b4: 08007be2 .word 0x08007be2 80065b8: 2000027c .word 0x2000027c 80065bc: 20000408 .word 0x20000408 80065c0: 08007c00 .word 0x08007c00 80065c4: 08007c19 .word 0x08007c19 80065c8: 20000514 .word 0x20000514 80065cc: 20000404 .word 0x20000404 80065d0: 2000021c .word 0x2000021c 80065d4: 20000298 .word 0x20000298 80065d8: 20000218 .word 0x20000218 80065dc: 40010c00 .word 0x40010c00 80065e0: 20000384 .word 0x20000384 ret = SX1276_LoRaTxPacket(&SX1276, (uint8_t *) buffer, message_length, 2000); 80065e4: f44f 63fa mov.w r3, #2000 ; 0x7d0 ret = SX1276_LoRaEntryTx(&SX1276, message_length, 2000); 80065e8: 6020 str r0, [r4, #0] ret = SX1276_LoRaTxPacket(&SX1276, (uint8_t *) buffer, message_length, 2000); 80065ea: 783a ldrb r2, [r7, #0] 80065ec: 4932 ldr r1, [pc, #200] ; (80066b8 ) 80065ee: 4833 ldr r0, [pc, #204] ; (80066bc ) 80065f0: f7ff fb92 bl 8005d18 message += 1; 80065f4: 4a32 ldr r2, [pc, #200] ; (80066c0 ) ret = SX1276_LoRaTxPacket(&SX1276, (uint8_t *) buffer, message_length, 2000); 80065f6: 6020 str r0, [r4, #0] message += 1; 80065f8: 6813 ldr r3, [r2, #0] 80065fa: 3301 adds r3, #1 80065fc: 6013 str r3, [r2, #0] return UartDataisReved; 80065fe: 7833 ldrb r3, [r6, #0] if(uartdatarecv != 0){ 8006600: b17b cbz r3, 8006622 if(uartdatarecv == 1){ 8006602: 2b01 cmp r3, #1 8006604: d109 bne.n 800661a Uart_dataCheck(&count_in1); 8006606: 482f ldr r0, [pc, #188] ; (80066c4 ) Uart_dataCheck(&count_in2); 8006608: f7ff fc5c bl 8005ec4 UartDataisReved = val; 800660c: 2300 movs r3, #0 800660e: f88b 3000 strb.w r3, [fp] 8006612: e791 b.n 8006538 ret = SX1276_LoRaEntryRx(&SX1276, 16, 2000); 8006614: f7ff faf4 bl 8005c00 8006618: e78a b.n 8006530 }else if(uartdatarecv == 2){ 800661a: 2b02 cmp r3, #2 800661c: d1f6 bne.n 800660c Uart_dataCheck(&count_in2); 800661e: 482a ldr r0, [pc, #168] ; (80066c8 ) 8006620: e7f2 b.n 8006608 if(LedTimerCnt > 500){ 8006622: 4f2a ldr r7, [pc, #168] ; (80066cc ) 8006624: 683b ldr r3, [r7, #0] 8006626: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 800662a: d985 bls.n 8006538 if(RGB_SensorIDAutoGet() == 1){ 800662c: f89a 3000 ldrb.w r3, [sl] 8006630: 2b01 cmp r3, #1 8006632: d12e bne.n 8006692 if(SensorID == 0){memset(&SensorID_buf[0],0x00,8);SensorID_Cnt = 0;} 8006634: f898 0000 ldrb.w r0, [r8] 8006638: b920 cbnz r0, 8006644 800663a: 4b25 ldr r3, [pc, #148] ; (80066d0 ) 800663c: 6018 str r0, [r3, #0] 800663e: 6058 str r0, [r3, #4] 8006640: 4b24 ldr r3, [pc, #144] ; (80066d4 ) 8006642: 7018 strb r0, [r3, #0] IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID 8006644: 3001 adds r0, #1 8006646: b2c0 uxtb r0, r0 if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){ 8006648: 2808 cmp r0, #8 IDAutoSetRequest_data[bluecell_srcid + 1] = ++SensorID;//DST ID 800664a: f888 0000 strb.w r0, [r8] 800664e: f88d 0034 strb.w r0, [sp, #52] ; 0x34 if(IDAutoSetRequest_data[bluecell_srcid + 1] > 8){ 8006652: d910 bls.n 8006676 RGB_SensorIDAutoset = set; 8006654: f04f 0900 mov.w r9, #0 RGB_Sensor_PowerOnOff(0); 8006658: 4648 mov r0, r9 RGB_SensorIDAutoset = set; 800665a: f88a 9000 strb.w r9, [sl] RGB_Sensor_PowerOnOff(0); 800665e: f7ff fc69 bl 8005f34 SensorID = 0; 8006662: f888 9000 strb.w r9, [r8] HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 8006666: f44f 4100 mov.w r1, #32768 ; 0x8000 800666a: 481b ldr r0, [pc, #108] ; (80066d8 ) 800666c: f7fe f8c1 bl 80047f2 LedTimerCnt = 0; 8006670: 2300 movs r3, #0 8006672: 603b str r3, [r7, #0] 8006674: e760 b.n 8006538 RGB_Sensor_PowerOnOff(IDAutoSetRequest_data[4]); 8006676: f7ff fc5d bl 8005f34 HAL_Delay(1500); 800667a: f240 50dc movw r0, #1500 ; 0x5dc 800667e: f7fd fe25 bl 80042cc RGB_Controller_Func(&IDAutoSetRequest_data[bluecell_stx]); 8006682: a80c add r0, sp, #48 ; 0x30 8006684: f7ff f8ca bl 800581c HAL_Delay(500); 8006688: f44f 70fa mov.w r0, #500 ; 0x1f4 800668c: f7fd fe1e bl 80042cc 8006690: e7e9 b.n 8006666 StatusRequest_data[bluecell_srcid + 1] = SensorID_buf[temp_sensorid++]; 8006692: 4a0f ldr r2, [pc, #60] ; (80066d0 ) 8006694: 1c6b adds r3, r5, #1 8006696: 5d52 ldrb r2, [r2, r5] 8006698: fa5f f983 uxtb.w r9, r3 800669c: f88d 202c strb.w r2, [sp, #44] ; 0x2c if(temp_sensorid > (SensorID_Cnt)){ 80066a0: 4a0c ldr r2, [pc, #48] ; (80066d4 ) RGB_Controller_Func(&StatusRequest_data[bluecell_stx]); 80066a2: a80a add r0, sp, #40 ; 0x28 if(temp_sensorid > (SensorID_Cnt)){ 80066a4: 7812 ldrb r2, [r2, #0] temp_sensorid = 0; 80066a6: 454a cmp r2, r9 80066a8: bf38 it cc 80066aa: f04f 0900 movcc.w r9, #0 RGB_Controller_Func(&StatusRequest_data[bluecell_stx]); 80066ae: f7ff f8b5 bl 800581c 80066b2: 464d mov r5, r9 80066b4: e7d7 b.n 8006666 80066b6: bf00 nop 80066b8: 200002dc .word 0x200002dc 80066bc: 20000408 .word 0x20000408 80066c0: 20000278 .word 0x20000278 80066c4: 200001e0 .word 0x200001e0 80066c8: 200001e1 .word 0x200001e1 80066cc: 20000170 .word 0x20000170 80066d0: 20000127 .word 0x20000127 80066d4: 20000126 .word 0x20000126 80066d8: 40011000 .word 0x40011000 080066dc : 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 80066dc: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80066de: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80066e0: 4604 mov r4, r0 80066e2: 1a22 subs r2, r4, r0 80066e4: b2d2 uxtb r2, r2 80066e6: 4291 cmp r1, r2 80066e8: d801 bhi.n 80066ee if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 80066ea: 4618 mov r0, r3 80066ec: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 80066ee: f814 2b01 ldrb.w r2, [r4], #1 80066f2: 4053 eors r3, r2 80066f4: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 80066f6: f013 0f80 tst.w r3, #128 ; 0x80 80066fa: f102 32ff add.w r2, r2, #4294967295 80066fe: ea4f 0343 mov.w r3, r3, lsl #1 8006702: bf18 it ne 8006704: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8006708: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 800670c: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 800670e: d1f2 bne.n 80066f6 8006710: e7e7 b.n 80066e2 08006712 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8006712: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8006714: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8006716: 4605 mov r5, r0 8006718: 1a2c subs r4, r5, r0 800671a: b2e4 uxtb r4, r4 800671c: 42a1 cmp r1, r4 800671e: d803 bhi.n 8006728 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8006720: 1a9b subs r3, r3, r2 8006722: 4258 negs r0, r3 8006724: 4158 adcs r0, r3 8006726: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8006728: f815 4b01 ldrb.w r4, [r5], #1 800672c: 4063 eors r3, r4 800672e: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8006730: f013 0f80 tst.w r3, #128 ; 0x80 8006734: f104 34ff add.w r4, r4, #4294967295 8006738: ea4f 0343 mov.w r3, r3, lsl #1 800673c: bf18 it ne 800673e: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8006742: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8006746: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8006748: d1f2 bne.n 8006730 800674a: e7e5 b.n 8006718 0800674c : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800674c: 4b0e ldr r3, [pc, #56] ; (8006788 ) { 800674e: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8006750: 699a ldr r2, [r3, #24] 8006752: f042 0201 orr.w r2, r2, #1 8006756: 619a str r2, [r3, #24] 8006758: 699a ldr r2, [r3, #24] 800675a: f002 0201 and.w r2, r2, #1 800675e: 9200 str r2, [sp, #0] 8006760: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8006762: 69da ldr r2, [r3, #28] 8006764: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8006768: 61da str r2, [r3, #28] 800676a: 69db ldr r3, [r3, #28] /* System interrupt init*/ /**DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 800676c: 4a07 ldr r2, [pc, #28] ; (800678c ) __HAL_RCC_PWR_CLK_ENABLE(); 800676e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8006772: 9301 str r3, [sp, #4] 8006774: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 8006776: 6853 ldr r3, [r2, #4] 8006778: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 800677c: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8006780: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8006782: b002 add sp, #8 8006784: 4770 bx lr 8006786: bf00 nop 8006788: 40021000 .word 0x40021000 800678c: 40010000 .word 0x40010000 08006790 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8006790: b510 push {r4, lr} 8006792: 4604 mov r4, r0 8006794: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8006796: 2210 movs r2, #16 8006798: 2100 movs r1, #0 800679a: a802 add r0, sp, #8 800679c: f000 f937 bl 8006a0e if(hi2c->Instance==I2C2) 80067a0: 6822 ldr r2, [r4, #0] 80067a2: 4b11 ldr r3, [pc, #68] ; (80067e8 ) 80067a4: 429a cmp r2, r3 80067a6: d11d bne.n 80067e4 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 80067a8: 4c10 ldr r4, [pc, #64] ; (80067ec ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80067aa: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 80067ac: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80067ae: 4810 ldr r0, [pc, #64] ; (80067f0 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 80067b0: f043 0308 orr.w r3, r3, #8 80067b4: 61a3 str r3, [r4, #24] 80067b6: 69a3 ldr r3, [r4, #24] 80067b8: f003 0308 and.w r3, r3, #8 80067bc: 9300 str r3, [sp, #0] 80067be: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 80067c0: f44f 6340 mov.w r3, #3072 ; 0xc00 80067c4: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 80067c6: 2312 movs r3, #18 80067c8: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80067ca: 2303 movs r3, #3 80067cc: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80067ce: f7fd ff19 bl 8004604 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 80067d2: 69e3 ldr r3, [r4, #28] 80067d4: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 80067d8: 61e3 str r3, [r4, #28] 80067da: 69e3 ldr r3, [r4, #28] 80067dc: f403 0380 and.w r3, r3, #4194304 ; 0x400000 80067e0: 9301 str r3, [sp, #4] 80067e2: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 80067e4: b006 add sp, #24 80067e6: bd10 pop {r4, pc} 80067e8: 40005800 .word 0x40005800 80067ec: 40021000 .word 0x40021000 80067f0: 40010c00 .word 0x40010c00 080067f4 : * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 80067f4: 6802 ldr r2, [r0, #0] 80067f6: 4b08 ldr r3, [pc, #32] ; (8006818 ) { 80067f8: b082 sub sp, #8 if(htim_base->Instance==TIM6) 80067fa: 429a cmp r2, r3 80067fc: d10a bne.n 8006814 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80067fe: f503 3300 add.w r3, r3, #131072 ; 0x20000 8006802: 69da ldr r2, [r3, #28] 8006804: f042 0210 orr.w r2, r2, #16 8006808: 61da str r2, [r3, #28] 800680a: 69db ldr r3, [r3, #28] 800680c: f003 0310 and.w r3, r3, #16 8006810: 9301 str r3, [sp, #4] 8006812: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8006814: b002 add sp, #8 8006816: 4770 bx lr 8006818: 40001000 .word 0x40001000 0800681c : * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 800681c: 2210 movs r2, #16 { 800681e: b510 push {r4, lr} 8006820: 4604 mov r4, r0 8006822: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8006824: eb0d 0002 add.w r0, sp, r2 8006828: 2100 movs r1, #0 800682a: f000 f8f0 bl 8006a0e if(huart->Instance==USART1) 800682e: 6823 ldr r3, [r4, #0] 8006830: 4a27 ldr r2, [pc, #156] ; (80068d0 ) 8006832: 4293 cmp r3, r2 8006834: d129 bne.n 800688a { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8006836: 4b27 ldr r3, [pc, #156] ; (80068d4 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006838: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 800683a: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800683c: 4826 ldr r0, [pc, #152] ; (80068d8 ) __HAL_RCC_USART1_CLK_ENABLE(); 800683e: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8006842: 619a str r2, [r3, #24] 8006844: 699a ldr r2, [r3, #24] 8006846: f402 4280 and.w r2, r2, #16384 ; 0x4000 800684a: 9200 str r2, [sp, #0] 800684c: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 800684e: 699a ldr r2, [r3, #24] 8006850: f042 0204 orr.w r2, r2, #4 8006854: 619a str r2, [r3, #24] 8006856: 699b ldr r3, [r3, #24] 8006858: f003 0304 and.w r3, r3, #4 800685c: 9301 str r3, [sp, #4] 800685e: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8006860: f44f 7300 mov.w r3, #512 ; 0x200 8006864: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8006866: 2302 movs r3, #2 8006868: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800686a: 2303 movs r3, #3 800686c: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800686e: f7fd fec9 bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_10; 8006872: f44f 6380 mov.w r3, #1024 ; 0x400 GPIO_InitStruct.Pin = GPIO_PIN_2; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); GPIO_InitStruct.Pin = GPIO_PIN_3; 8006876: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8006878: 2300 movs r3, #0 GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800687a: a904 add r1, sp, #16 800687c: 4816 ldr r0, [pc, #88] ; (80068d8 ) GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800687e: 9305 str r3, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8006880: 9306 str r3, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006882: f7fd febf bl 8004604 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8006886: b008 add sp, #32 8006888: bd10 pop {r4, pc} else if(huart->Instance==USART2) 800688a: 4a14 ldr r2, [pc, #80] ; (80068dc ) 800688c: 4293 cmp r3, r2 800688e: d1fa bne.n 8006886 __HAL_RCC_USART2_CLK_ENABLE(); 8006890: 4b10 ldr r3, [pc, #64] ; (80068d4 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006892: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 8006894: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006896: 4810 ldr r0, [pc, #64] ; (80068d8 ) __HAL_RCC_USART2_CLK_ENABLE(); 8006898: f442 3200 orr.w r2, r2, #131072 ; 0x20000 800689c: 61da str r2, [r3, #28] 800689e: 69da ldr r2, [r3, #28] 80068a0: f402 3200 and.w r2, r2, #131072 ; 0x20000 80068a4: 9202 str r2, [sp, #8] 80068a6: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 80068a8: 699a ldr r2, [r3, #24] 80068aa: f042 0204 orr.w r2, r2, #4 80068ae: 619a str r2, [r3, #24] 80068b0: 699b ldr r3, [r3, #24] 80068b2: f003 0304 and.w r3, r3, #4 80068b6: 9303 str r3, [sp, #12] 80068b8: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 80068ba: 2304 movs r3, #4 80068bc: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80068be: 2302 movs r3, #2 80068c0: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80068c2: 2303 movs r3, #3 80068c4: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80068c6: f7fd fe9d bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_3; 80068ca: 2308 movs r3, #8 80068cc: e7d3 b.n 8006876 80068ce: bf00 nop 80068d0: 40013800 .word 0x40013800 80068d4: 40021000 .word 0x40021000 80068d8: 40010800 .word 0x40010800 80068dc: 40004400 .word 0x40004400 080068e0 : 80068e0: 4770 bx lr 080068e2 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80068e2: e7fe b.n 80068e2 080068e4 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80068e4: e7fe b.n 80068e4 080068e6 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80068e6: e7fe b.n 80068e6 080068e8 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80068e8: e7fe b.n 80068e8 080068ea : 80068ea: 4770 bx lr 080068ec : 80068ec: 4770 bx lr 080068ee : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80068ee: 4770 bx lr 080068f0 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80068f0: f7fd bcda b.w 80042a8 080068f4 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 80068f4: 4801 ldr r0, [pc, #4] ; (80068fc ) 80068f6: f7fe bd9d b.w 8005434 80068fa: bf00 nop 80068fc: 2000029c .word 0x2000029c 08006900 : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 8006900: 4801 ldr r0, [pc, #4] ; (8006908 ) 8006902: f7fe bd97 b.w 8005434 8006906: bf00 nop 8006908: 200003c4 .word 0x200003c4 0800690c : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 800690c: 4801 ldr r0, [pc, #4] ; (8006914 ) 800690e: f7fe ba9e b.w 8004e4e 8006912: bf00 nop 8006914: 20000384 .word 0x20000384 08006918 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8006918: 4b0e ldr r3, [pc, #56] ; (8006954 ) 800691a: 681a ldr r2, [r3, #0] 800691c: f042 0201 orr.w r2, r2, #1 8006920: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8006922: 6859 ldr r1, [r3, #4] 8006924: 4a0c ldr r2, [pc, #48] ; (8006958 ) 8006926: 400a ands r2, r1 8006928: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 800692a: 681a ldr r2, [r3, #0] 800692c: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8006930: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8006934: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8006936: 681a ldr r2, [r3, #0] 8006938: f422 2280 bic.w r2, r2, #262144 ; 0x40000 800693c: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 800693e: 685a ldr r2, [r3, #4] 8006940: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8006944: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8006946: f44f 021f mov.w r2, #10420224 ; 0x9f0000 800694a: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 800694c: 4a03 ldr r2, [pc, #12] ; (800695c ) 800694e: 4b04 ldr r3, [pc, #16] ; (8006960 ) 8006950: 609a str r2, [r3, #8] 8006952: 4770 bx lr 8006954: 40021000 .word 0x40021000 8006958: f8ff0000 .word 0xf8ff0000 800695c: 08004000 .word 0x08004000 8006960: e000ed00 .word 0xe000ed00 08006964 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8006964: 2100 movs r1, #0 b LoopCopyDataInit 8006966: e003 b.n 8006970 08006968 : CopyDataInit: ldr r3, =_sidata 8006968: 4b0b ldr r3, [pc, #44] ; (8006998 ) ldr r3, [r3, r1] 800696a: 585b ldr r3, [r3, r1] str r3, [r0, r1] 800696c: 5043 str r3, [r0, r1] adds r1, r1, #4 800696e: 3104 adds r1, #4 08006970 : LoopCopyDataInit: ldr r0, =_sdata 8006970: 480a ldr r0, [pc, #40] ; (800699c ) ldr r3, =_edata 8006972: 4b0b ldr r3, [pc, #44] ; (80069a0 ) adds r2, r0, r1 8006974: 1842 adds r2, r0, r1 cmp r2, r3 8006976: 429a cmp r2, r3 bcc CopyDataInit 8006978: d3f6 bcc.n 8006968 ldr r2, =_sbss 800697a: 4a0a ldr r2, [pc, #40] ; (80069a4 ) b LoopFillZerobss 800697c: e002 b.n 8006984 0800697e : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 800697e: 2300 movs r3, #0 str r3, [r2], #4 8006980: f842 3b04 str.w r3, [r2], #4 08006984 : LoopFillZerobss: ldr r3, = _ebss 8006984: 4b08 ldr r3, [pc, #32] ; (80069a8 ) cmp r2, r3 8006986: 429a cmp r2, r3 bcc FillZerobss 8006988: d3f9 bcc.n 800697e /* Call the clock system intitialization function.*/ bl SystemInit 800698a: f7ff ffc5 bl 8006918 /* Call static constructors */ bl __libc_init_array 800698e: f000 f80f bl 80069b0 <__libc_init_array> /* Call the application's entry point.*/ bl main 8006992: f7ff fc61 bl 8006258
bx lr 8006996: 4770 bx lr ldr r3, =_sidata 8006998: 08007cf0 .word 0x08007cf0 ldr r0, =_sdata 800699c: 20000000 .word 0x20000000 ldr r3, =_edata 80069a0: 20000070 .word 0x20000070 ldr r2, =_sbss 80069a4: 20000070 .word 0x20000070 ldr r3, = _ebss 80069a8: 2000051c .word 0x2000051c 080069ac : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80069ac: e7fe b.n 80069ac ... 080069b0 <__libc_init_array>: 80069b0: b570 push {r4, r5, r6, lr} 80069b2: 2500 movs r5, #0 80069b4: 4e0c ldr r6, [pc, #48] ; (80069e8 <__libc_init_array+0x38>) 80069b6: 4c0d ldr r4, [pc, #52] ; (80069ec <__libc_init_array+0x3c>) 80069b8: 1ba4 subs r4, r4, r6 80069ba: 10a4 asrs r4, r4, #2 80069bc: 42a5 cmp r5, r4 80069be: d109 bne.n 80069d4 <__libc_init_array+0x24> 80069c0: f001 f88a bl 8007ad8 <_init> 80069c4: 2500 movs r5, #0 80069c6: 4e0a ldr r6, [pc, #40] ; (80069f0 <__libc_init_array+0x40>) 80069c8: 4c0a ldr r4, [pc, #40] ; (80069f4 <__libc_init_array+0x44>) 80069ca: 1ba4 subs r4, r4, r6 80069cc: 10a4 asrs r4, r4, #2 80069ce: 42a5 cmp r5, r4 80069d0: d105 bne.n 80069de <__libc_init_array+0x2e> 80069d2: bd70 pop {r4, r5, r6, pc} 80069d4: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80069d8: 4798 blx r3 80069da: 3501 adds r5, #1 80069dc: e7ee b.n 80069bc <__libc_init_array+0xc> 80069de: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80069e2: 4798 blx r3 80069e4: 3501 adds r5, #1 80069e6: e7f2 b.n 80069ce <__libc_init_array+0x1e> 80069e8: 08007ce8 .word 0x08007ce8 80069ec: 08007ce8 .word 0x08007ce8 80069f0: 08007ce8 .word 0x08007ce8 80069f4: 08007cec .word 0x08007cec 080069f8 : 80069f8: b510 push {r4, lr} 80069fa: 1e43 subs r3, r0, #1 80069fc: 440a add r2, r1 80069fe: 4291 cmp r1, r2 8006a00: d100 bne.n 8006a04 8006a02: bd10 pop {r4, pc} 8006a04: f811 4b01 ldrb.w r4, [r1], #1 8006a08: f803 4f01 strb.w r4, [r3, #1]! 8006a0c: e7f7 b.n 80069fe 08006a0e : 8006a0e: 4603 mov r3, r0 8006a10: 4402 add r2, r0 8006a12: 4293 cmp r3, r2 8006a14: d100 bne.n 8006a18 8006a16: 4770 bx lr 8006a18: f803 1b01 strb.w r1, [r3], #1 8006a1c: e7f9 b.n 8006a12 ... 08006a20 : 8006a20: b40f push {r0, r1, r2, r3} 8006a22: 4b0a ldr r3, [pc, #40] ; (8006a4c ) 8006a24: b513 push {r0, r1, r4, lr} 8006a26: 681c ldr r4, [r3, #0] 8006a28: b124 cbz r4, 8006a34 8006a2a: 69a3 ldr r3, [r4, #24] 8006a2c: b913 cbnz r3, 8006a34 8006a2e: 4620 mov r0, r4 8006a30: f000 fada bl 8006fe8 <__sinit> 8006a34: ab05 add r3, sp, #20 8006a36: 9a04 ldr r2, [sp, #16] 8006a38: 68a1 ldr r1, [r4, #8] 8006a3a: 4620 mov r0, r4 8006a3c: 9301 str r3, [sp, #4] 8006a3e: f000 fc9b bl 8007378 <_vfiprintf_r> 8006a42: b002 add sp, #8 8006a44: e8bd 4010 ldmia.w sp!, {r4, lr} 8006a48: b004 add sp, #16 8006a4a: 4770 bx lr 8006a4c: 2000000c .word 0x2000000c 08006a50 <_puts_r>: 8006a50: b570 push {r4, r5, r6, lr} 8006a52: 460e mov r6, r1 8006a54: 4605 mov r5, r0 8006a56: b118 cbz r0, 8006a60 <_puts_r+0x10> 8006a58: 6983 ldr r3, [r0, #24] 8006a5a: b90b cbnz r3, 8006a60 <_puts_r+0x10> 8006a5c: f000 fac4 bl 8006fe8 <__sinit> 8006a60: 69ab ldr r3, [r5, #24] 8006a62: 68ac ldr r4, [r5, #8] 8006a64: b913 cbnz r3, 8006a6c <_puts_r+0x1c> 8006a66: 4628 mov r0, r5 8006a68: f000 fabe bl 8006fe8 <__sinit> 8006a6c: 4b23 ldr r3, [pc, #140] ; (8006afc <_puts_r+0xac>) 8006a6e: 429c cmp r4, r3 8006a70: d117 bne.n 8006aa2 <_puts_r+0x52> 8006a72: 686c ldr r4, [r5, #4] 8006a74: 89a3 ldrh r3, [r4, #12] 8006a76: 071b lsls r3, r3, #28 8006a78: d51d bpl.n 8006ab6 <_puts_r+0x66> 8006a7a: 6923 ldr r3, [r4, #16] 8006a7c: b1db cbz r3, 8006ab6 <_puts_r+0x66> 8006a7e: 3e01 subs r6, #1 8006a80: 68a3 ldr r3, [r4, #8] 8006a82: f816 1f01 ldrb.w r1, [r6, #1]! 8006a86: 3b01 subs r3, #1 8006a88: 60a3 str r3, [r4, #8] 8006a8a: b9e9 cbnz r1, 8006ac8 <_puts_r+0x78> 8006a8c: 2b00 cmp r3, #0 8006a8e: da2e bge.n 8006aee <_puts_r+0x9e> 8006a90: 4622 mov r2, r4 8006a92: 210a movs r1, #10 8006a94: 4628 mov r0, r5 8006a96: f000 f8f5 bl 8006c84 <__swbuf_r> 8006a9a: 3001 adds r0, #1 8006a9c: d011 beq.n 8006ac2 <_puts_r+0x72> 8006a9e: 200a movs r0, #10 8006aa0: bd70 pop {r4, r5, r6, pc} 8006aa2: 4b17 ldr r3, [pc, #92] ; (8006b00 <_puts_r+0xb0>) 8006aa4: 429c cmp r4, r3 8006aa6: d101 bne.n 8006aac <_puts_r+0x5c> 8006aa8: 68ac ldr r4, [r5, #8] 8006aaa: e7e3 b.n 8006a74 <_puts_r+0x24> 8006aac: 4b15 ldr r3, [pc, #84] ; (8006b04 <_puts_r+0xb4>) 8006aae: 429c cmp r4, r3 8006ab0: bf08 it eq 8006ab2: 68ec ldreq r4, [r5, #12] 8006ab4: e7de b.n 8006a74 <_puts_r+0x24> 8006ab6: 4621 mov r1, r4 8006ab8: 4628 mov r0, r5 8006aba: f000 f935 bl 8006d28 <__swsetup_r> 8006abe: 2800 cmp r0, #0 8006ac0: d0dd beq.n 8006a7e <_puts_r+0x2e> 8006ac2: f04f 30ff mov.w r0, #4294967295 8006ac6: bd70 pop {r4, r5, r6, pc} 8006ac8: 2b00 cmp r3, #0 8006aca: da04 bge.n 8006ad6 <_puts_r+0x86> 8006acc: 69a2 ldr r2, [r4, #24] 8006ace: 4293 cmp r3, r2 8006ad0: db06 blt.n 8006ae0 <_puts_r+0x90> 8006ad2: 290a cmp r1, #10 8006ad4: d004 beq.n 8006ae0 <_puts_r+0x90> 8006ad6: 6823 ldr r3, [r4, #0] 8006ad8: 1c5a adds r2, r3, #1 8006ada: 6022 str r2, [r4, #0] 8006adc: 7019 strb r1, [r3, #0] 8006ade: e7cf b.n 8006a80 <_puts_r+0x30> 8006ae0: 4622 mov r2, r4 8006ae2: 4628 mov r0, r5 8006ae4: f000 f8ce bl 8006c84 <__swbuf_r> 8006ae8: 3001 adds r0, #1 8006aea: d1c9 bne.n 8006a80 <_puts_r+0x30> 8006aec: e7e9 b.n 8006ac2 <_puts_r+0x72> 8006aee: 200a movs r0, #10 8006af0: 6823 ldr r3, [r4, #0] 8006af2: 1c5a adds r2, r3, #1 8006af4: 6022 str r2, [r4, #0] 8006af6: 7018 strb r0, [r3, #0] 8006af8: bd70 pop {r4, r5, r6, pc} 8006afa: bf00 nop 8006afc: 08007c74 .word 0x08007c74 8006b00: 08007c94 .word 0x08007c94 8006b04: 08007c54 .word 0x08007c54 08006b08 : 8006b08: 4b02 ldr r3, [pc, #8] ; (8006b14 ) 8006b0a: 4601 mov r1, r0 8006b0c: 6818 ldr r0, [r3, #0] 8006b0e: f7ff bf9f b.w 8006a50 <_puts_r> 8006b12: bf00 nop 8006b14: 2000000c .word 0x2000000c 08006b18 : 8006b18: 2900 cmp r1, #0 8006b1a: f44f 6380 mov.w r3, #1024 ; 0x400 8006b1e: bf0c ite eq 8006b20: 2202 moveq r2, #2 8006b22: 2200 movne r2, #0 8006b24: f000 b800 b.w 8006b28 08006b28 : 8006b28: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8006b2c: 461d mov r5, r3 8006b2e: 4b51 ldr r3, [pc, #324] ; (8006c74 ) 8006b30: 4604 mov r4, r0 8006b32: 681e ldr r6, [r3, #0] 8006b34: 460f mov r7, r1 8006b36: 4690 mov r8, r2 8006b38: b126 cbz r6, 8006b44 8006b3a: 69b3 ldr r3, [r6, #24] 8006b3c: b913 cbnz r3, 8006b44 8006b3e: 4630 mov r0, r6 8006b40: f000 fa52 bl 8006fe8 <__sinit> 8006b44: 4b4c ldr r3, [pc, #304] ; (8006c78 ) 8006b46: 429c cmp r4, r3 8006b48: d152 bne.n 8006bf0 8006b4a: 6874 ldr r4, [r6, #4] 8006b4c: f1b8 0f02 cmp.w r8, #2 8006b50: d006 beq.n 8006b60 8006b52: f1b8 0f01 cmp.w r8, #1 8006b56: f200 8089 bhi.w 8006c6c 8006b5a: 2d00 cmp r5, #0 8006b5c: f2c0 8086 blt.w 8006c6c 8006b60: 4621 mov r1, r4 8006b62: 4630 mov r0, r6 8006b64: f000 f9d6 bl 8006f14 <_fflush_r> 8006b68: 6b61 ldr r1, [r4, #52] ; 0x34 8006b6a: b141 cbz r1, 8006b7e 8006b6c: f104 0344 add.w r3, r4, #68 ; 0x44 8006b70: 4299 cmp r1, r3 8006b72: d002 beq.n 8006b7a 8006b74: 4630 mov r0, r6 8006b76: f000 fb2d bl 80071d4 <_free_r> 8006b7a: 2300 movs r3, #0 8006b7c: 6363 str r3, [r4, #52] ; 0x34 8006b7e: 2300 movs r3, #0 8006b80: 61a3 str r3, [r4, #24] 8006b82: 6063 str r3, [r4, #4] 8006b84: 89a3 ldrh r3, [r4, #12] 8006b86: 061b lsls r3, r3, #24 8006b88: d503 bpl.n 8006b92 8006b8a: 6921 ldr r1, [r4, #16] 8006b8c: 4630 mov r0, r6 8006b8e: f000 fb21 bl 80071d4 <_free_r> 8006b92: 89a3 ldrh r3, [r4, #12] 8006b94: f1b8 0f02 cmp.w r8, #2 8006b98: f423 634a bic.w r3, r3, #3232 ; 0xca0 8006b9c: f023 0303 bic.w r3, r3, #3 8006ba0: 81a3 strh r3, [r4, #12] 8006ba2: d05d beq.n 8006c60 8006ba4: ab01 add r3, sp, #4 8006ba6: 466a mov r2, sp 8006ba8: 4621 mov r1, r4 8006baa: 4630 mov r0, r6 8006bac: f000 faa6 bl 80070fc <__swhatbuf_r> 8006bb0: 89a3 ldrh r3, [r4, #12] 8006bb2: 4318 orrs r0, r3 8006bb4: 81a0 strh r0, [r4, #12] 8006bb6: bb2d cbnz r5, 8006c04 8006bb8: 9d00 ldr r5, [sp, #0] 8006bba: 4628 mov r0, r5 8006bbc: f000 fb02 bl 80071c4 8006bc0: 4607 mov r7, r0 8006bc2: 2800 cmp r0, #0 8006bc4: d14e bne.n 8006c64 8006bc6: f8dd 9000 ldr.w r9, [sp] 8006bca: 45a9 cmp r9, r5 8006bcc: d13c bne.n 8006c48 8006bce: f04f 30ff mov.w r0, #4294967295 8006bd2: 89a3 ldrh r3, [r4, #12] 8006bd4: f043 0302 orr.w r3, r3, #2 8006bd8: 81a3 strh r3, [r4, #12] 8006bda: 2300 movs r3, #0 8006bdc: 60a3 str r3, [r4, #8] 8006bde: f104 0347 add.w r3, r4, #71 ; 0x47 8006be2: 6023 str r3, [r4, #0] 8006be4: 6123 str r3, [r4, #16] 8006be6: 2301 movs r3, #1 8006be8: 6163 str r3, [r4, #20] 8006bea: b003 add sp, #12 8006bec: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8006bf0: 4b22 ldr r3, [pc, #136] ; (8006c7c ) 8006bf2: 429c cmp r4, r3 8006bf4: d101 bne.n 8006bfa 8006bf6: 68b4 ldr r4, [r6, #8] 8006bf8: e7a8 b.n 8006b4c 8006bfa: 4b21 ldr r3, [pc, #132] ; (8006c80 ) 8006bfc: 429c cmp r4, r3 8006bfe: bf08 it eq 8006c00: 68f4 ldreq r4, [r6, #12] 8006c02: e7a3 b.n 8006b4c 8006c04: 2f00 cmp r7, #0 8006c06: d0d8 beq.n 8006bba 8006c08: 69b3 ldr r3, [r6, #24] 8006c0a: b913 cbnz r3, 8006c12 8006c0c: 4630 mov r0, r6 8006c0e: f000 f9eb bl 8006fe8 <__sinit> 8006c12: f1b8 0f01 cmp.w r8, #1 8006c16: bf08 it eq 8006c18: 89a3 ldrheq r3, [r4, #12] 8006c1a: 6027 str r7, [r4, #0] 8006c1c: bf04 itt eq 8006c1e: f043 0301 orreq.w r3, r3, #1 8006c22: 81a3 strheq r3, [r4, #12] 8006c24: 89a3 ldrh r3, [r4, #12] 8006c26: 6127 str r7, [r4, #16] 8006c28: f013 0008 ands.w r0, r3, #8 8006c2c: 6165 str r5, [r4, #20] 8006c2e: d01b beq.n 8006c68 8006c30: f013 0001 ands.w r0, r3, #1 8006c34: f04f 0300 mov.w r3, #0 8006c38: bf1f itttt ne 8006c3a: 426d negne r5, r5 8006c3c: 60a3 strne r3, [r4, #8] 8006c3e: 61a5 strne r5, [r4, #24] 8006c40: 4618 movne r0, r3 8006c42: bf08 it eq 8006c44: 60a5 streq r5, [r4, #8] 8006c46: e7d0 b.n 8006bea 8006c48: 4648 mov r0, r9 8006c4a: f000 fabb bl 80071c4 8006c4e: 4607 mov r7, r0 8006c50: 2800 cmp r0, #0 8006c52: d0bc beq.n 8006bce 8006c54: 89a3 ldrh r3, [r4, #12] 8006c56: 464d mov r5, r9 8006c58: f043 0380 orr.w r3, r3, #128 ; 0x80 8006c5c: 81a3 strh r3, [r4, #12] 8006c5e: e7d3 b.n 8006c08 8006c60: 2000 movs r0, #0 8006c62: e7b6 b.n 8006bd2 8006c64: 46a9 mov r9, r5 8006c66: e7f5 b.n 8006c54 8006c68: 60a0 str r0, [r4, #8] 8006c6a: e7be b.n 8006bea 8006c6c: f04f 30ff mov.w r0, #4294967295 8006c70: e7bb b.n 8006bea 8006c72: bf00 nop 8006c74: 2000000c .word 0x2000000c 8006c78: 08007c74 .word 0x08007c74 8006c7c: 08007c94 .word 0x08007c94 8006c80: 08007c54 .word 0x08007c54 08006c84 <__swbuf_r>: 8006c84: b5f8 push {r3, r4, r5, r6, r7, lr} 8006c86: 460e mov r6, r1 8006c88: 4614 mov r4, r2 8006c8a: 4605 mov r5, r0 8006c8c: b118 cbz r0, 8006c96 <__swbuf_r+0x12> 8006c8e: 6983 ldr r3, [r0, #24] 8006c90: b90b cbnz r3, 8006c96 <__swbuf_r+0x12> 8006c92: f000 f9a9 bl 8006fe8 <__sinit> 8006c96: 4b21 ldr r3, [pc, #132] ; (8006d1c <__swbuf_r+0x98>) 8006c98: 429c cmp r4, r3 8006c9a: d12a bne.n 8006cf2 <__swbuf_r+0x6e> 8006c9c: 686c ldr r4, [r5, #4] 8006c9e: 69a3 ldr r3, [r4, #24] 8006ca0: 60a3 str r3, [r4, #8] 8006ca2: 89a3 ldrh r3, [r4, #12] 8006ca4: 071a lsls r2, r3, #28 8006ca6: d52e bpl.n 8006d06 <__swbuf_r+0x82> 8006ca8: 6923 ldr r3, [r4, #16] 8006caa: b363 cbz r3, 8006d06 <__swbuf_r+0x82> 8006cac: 6923 ldr r3, [r4, #16] 8006cae: 6820 ldr r0, [r4, #0] 8006cb0: b2f6 uxtb r6, r6 8006cb2: 1ac0 subs r0, r0, r3 8006cb4: 6963 ldr r3, [r4, #20] 8006cb6: 4637 mov r7, r6 8006cb8: 4298 cmp r0, r3 8006cba: db04 blt.n 8006cc6 <__swbuf_r+0x42> 8006cbc: 4621 mov r1, r4 8006cbe: 4628 mov r0, r5 8006cc0: f000 f928 bl 8006f14 <_fflush_r> 8006cc4: bb28 cbnz r0, 8006d12 <__swbuf_r+0x8e> 8006cc6: 68a3 ldr r3, [r4, #8] 8006cc8: 3001 adds r0, #1 8006cca: 3b01 subs r3, #1 8006ccc: 60a3 str r3, [r4, #8] 8006cce: 6823 ldr r3, [r4, #0] 8006cd0: 1c5a adds r2, r3, #1 8006cd2: 6022 str r2, [r4, #0] 8006cd4: 701e strb r6, [r3, #0] 8006cd6: 6963 ldr r3, [r4, #20] 8006cd8: 4298 cmp r0, r3 8006cda: d004 beq.n 8006ce6 <__swbuf_r+0x62> 8006cdc: 89a3 ldrh r3, [r4, #12] 8006cde: 07db lsls r3, r3, #31 8006ce0: d519 bpl.n 8006d16 <__swbuf_r+0x92> 8006ce2: 2e0a cmp r6, #10 8006ce4: d117 bne.n 8006d16 <__swbuf_r+0x92> 8006ce6: 4621 mov r1, r4 8006ce8: 4628 mov r0, r5 8006cea: f000 f913 bl 8006f14 <_fflush_r> 8006cee: b190 cbz r0, 8006d16 <__swbuf_r+0x92> 8006cf0: e00f b.n 8006d12 <__swbuf_r+0x8e> 8006cf2: 4b0b ldr r3, [pc, #44] ; (8006d20 <__swbuf_r+0x9c>) 8006cf4: 429c cmp r4, r3 8006cf6: d101 bne.n 8006cfc <__swbuf_r+0x78> 8006cf8: 68ac ldr r4, [r5, #8] 8006cfa: e7d0 b.n 8006c9e <__swbuf_r+0x1a> 8006cfc: 4b09 ldr r3, [pc, #36] ; (8006d24 <__swbuf_r+0xa0>) 8006cfe: 429c cmp r4, r3 8006d00: bf08 it eq 8006d02: 68ec ldreq r4, [r5, #12] 8006d04: e7cb b.n 8006c9e <__swbuf_r+0x1a> 8006d06: 4621 mov r1, r4 8006d08: 4628 mov r0, r5 8006d0a: f000 f80d bl 8006d28 <__swsetup_r> 8006d0e: 2800 cmp r0, #0 8006d10: d0cc beq.n 8006cac <__swbuf_r+0x28> 8006d12: f04f 37ff mov.w r7, #4294967295 8006d16: 4638 mov r0, r7 8006d18: bdf8 pop {r3, r4, r5, r6, r7, pc} 8006d1a: bf00 nop 8006d1c: 08007c74 .word 0x08007c74 8006d20: 08007c94 .word 0x08007c94 8006d24: 08007c54 .word 0x08007c54 08006d28 <__swsetup_r>: 8006d28: 4b32 ldr r3, [pc, #200] ; (8006df4 <__swsetup_r+0xcc>) 8006d2a: b570 push {r4, r5, r6, lr} 8006d2c: 681d ldr r5, [r3, #0] 8006d2e: 4606 mov r6, r0 8006d30: 460c mov r4, r1 8006d32: b125 cbz r5, 8006d3e <__swsetup_r+0x16> 8006d34: 69ab ldr r3, [r5, #24] 8006d36: b913 cbnz r3, 8006d3e <__swsetup_r+0x16> 8006d38: 4628 mov r0, r5 8006d3a: f000 f955 bl 8006fe8 <__sinit> 8006d3e: 4b2e ldr r3, [pc, #184] ; (8006df8 <__swsetup_r+0xd0>) 8006d40: 429c cmp r4, r3 8006d42: d10f bne.n 8006d64 <__swsetup_r+0x3c> 8006d44: 686c ldr r4, [r5, #4] 8006d46: f9b4 300c ldrsh.w r3, [r4, #12] 8006d4a: b29a uxth r2, r3 8006d4c: 0715 lsls r5, r2, #28 8006d4e: d42c bmi.n 8006daa <__swsetup_r+0x82> 8006d50: 06d0 lsls r0, r2, #27 8006d52: d411 bmi.n 8006d78 <__swsetup_r+0x50> 8006d54: 2209 movs r2, #9 8006d56: 6032 str r2, [r6, #0] 8006d58: f043 0340 orr.w r3, r3, #64 ; 0x40 8006d5c: 81a3 strh r3, [r4, #12] 8006d5e: f04f 30ff mov.w r0, #4294967295 8006d62: bd70 pop {r4, r5, r6, pc} 8006d64: 4b25 ldr r3, [pc, #148] ; (8006dfc <__swsetup_r+0xd4>) 8006d66: 429c cmp r4, r3 8006d68: d101 bne.n 8006d6e <__swsetup_r+0x46> 8006d6a: 68ac ldr r4, [r5, #8] 8006d6c: e7eb b.n 8006d46 <__swsetup_r+0x1e> 8006d6e: 4b24 ldr r3, [pc, #144] ; (8006e00 <__swsetup_r+0xd8>) 8006d70: 429c cmp r4, r3 8006d72: bf08 it eq 8006d74: 68ec ldreq r4, [r5, #12] 8006d76: e7e6 b.n 8006d46 <__swsetup_r+0x1e> 8006d78: 0751 lsls r1, r2, #29 8006d7a: d512 bpl.n 8006da2 <__swsetup_r+0x7a> 8006d7c: 6b61 ldr r1, [r4, #52] ; 0x34 8006d7e: b141 cbz r1, 8006d92 <__swsetup_r+0x6a> 8006d80: f104 0344 add.w r3, r4, #68 ; 0x44 8006d84: 4299 cmp r1, r3 8006d86: d002 beq.n 8006d8e <__swsetup_r+0x66> 8006d88: 4630 mov r0, r6 8006d8a: f000 fa23 bl 80071d4 <_free_r> 8006d8e: 2300 movs r3, #0 8006d90: 6363 str r3, [r4, #52] ; 0x34 8006d92: 89a3 ldrh r3, [r4, #12] 8006d94: f023 0324 bic.w r3, r3, #36 ; 0x24 8006d98: 81a3 strh r3, [r4, #12] 8006d9a: 2300 movs r3, #0 8006d9c: 6063 str r3, [r4, #4] 8006d9e: 6923 ldr r3, [r4, #16] 8006da0: 6023 str r3, [r4, #0] 8006da2: 89a3 ldrh r3, [r4, #12] 8006da4: f043 0308 orr.w r3, r3, #8 8006da8: 81a3 strh r3, [r4, #12] 8006daa: 6923 ldr r3, [r4, #16] 8006dac: b94b cbnz r3, 8006dc2 <__swsetup_r+0x9a> 8006dae: 89a3 ldrh r3, [r4, #12] 8006db0: f403 7320 and.w r3, r3, #640 ; 0x280 8006db4: f5b3 7f00 cmp.w r3, #512 ; 0x200 8006db8: d003 beq.n 8006dc2 <__swsetup_r+0x9a> 8006dba: 4621 mov r1, r4 8006dbc: 4630 mov r0, r6 8006dbe: f000 f9c1 bl 8007144 <__smakebuf_r> 8006dc2: 89a2 ldrh r2, [r4, #12] 8006dc4: f012 0301 ands.w r3, r2, #1 8006dc8: d00c beq.n 8006de4 <__swsetup_r+0xbc> 8006dca: 2300 movs r3, #0 8006dcc: 60a3 str r3, [r4, #8] 8006dce: 6963 ldr r3, [r4, #20] 8006dd0: 425b negs r3, r3 8006dd2: 61a3 str r3, [r4, #24] 8006dd4: 6923 ldr r3, [r4, #16] 8006dd6: b953 cbnz r3, 8006dee <__swsetup_r+0xc6> 8006dd8: f9b4 300c ldrsh.w r3, [r4, #12] 8006ddc: f013 0080 ands.w r0, r3, #128 ; 0x80 8006de0: d1ba bne.n 8006d58 <__swsetup_r+0x30> 8006de2: bd70 pop {r4, r5, r6, pc} 8006de4: 0792 lsls r2, r2, #30 8006de6: bf58 it pl 8006de8: 6963 ldrpl r3, [r4, #20] 8006dea: 60a3 str r3, [r4, #8] 8006dec: e7f2 b.n 8006dd4 <__swsetup_r+0xac> 8006dee: 2000 movs r0, #0 8006df0: e7f7 b.n 8006de2 <__swsetup_r+0xba> 8006df2: bf00 nop 8006df4: 2000000c .word 0x2000000c 8006df8: 08007c74 .word 0x08007c74 8006dfc: 08007c94 .word 0x08007c94 8006e00: 08007c54 .word 0x08007c54 08006e04 <__sflush_r>: 8006e04: 898a ldrh r2, [r1, #12] 8006e06: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8006e0a: 4605 mov r5, r0 8006e0c: 0710 lsls r0, r2, #28 8006e0e: 460c mov r4, r1 8006e10: d45a bmi.n 8006ec8 <__sflush_r+0xc4> 8006e12: 684b ldr r3, [r1, #4] 8006e14: 2b00 cmp r3, #0 8006e16: dc05 bgt.n 8006e24 <__sflush_r+0x20> 8006e18: 6c0b ldr r3, [r1, #64] ; 0x40 8006e1a: 2b00 cmp r3, #0 8006e1c: dc02 bgt.n 8006e24 <__sflush_r+0x20> 8006e1e: 2000 movs r0, #0 8006e20: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006e24: 6ae6 ldr r6, [r4, #44] ; 0x2c 8006e26: 2e00 cmp r6, #0 8006e28: d0f9 beq.n 8006e1e <__sflush_r+0x1a> 8006e2a: 2300 movs r3, #0 8006e2c: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8006e30: 682f ldr r7, [r5, #0] 8006e32: 602b str r3, [r5, #0] 8006e34: d033 beq.n 8006e9e <__sflush_r+0x9a> 8006e36: 6d60 ldr r0, [r4, #84] ; 0x54 8006e38: 89a3 ldrh r3, [r4, #12] 8006e3a: 075a lsls r2, r3, #29 8006e3c: d505 bpl.n 8006e4a <__sflush_r+0x46> 8006e3e: 6863 ldr r3, [r4, #4] 8006e40: 1ac0 subs r0, r0, r3 8006e42: 6b63 ldr r3, [r4, #52] ; 0x34 8006e44: b10b cbz r3, 8006e4a <__sflush_r+0x46> 8006e46: 6c23 ldr r3, [r4, #64] ; 0x40 8006e48: 1ac0 subs r0, r0, r3 8006e4a: 2300 movs r3, #0 8006e4c: 4602 mov r2, r0 8006e4e: 6ae6 ldr r6, [r4, #44] ; 0x2c 8006e50: 6a21 ldr r1, [r4, #32] 8006e52: 4628 mov r0, r5 8006e54: 47b0 blx r6 8006e56: 1c43 adds r3, r0, #1 8006e58: 89a3 ldrh r3, [r4, #12] 8006e5a: d106 bne.n 8006e6a <__sflush_r+0x66> 8006e5c: 6829 ldr r1, [r5, #0] 8006e5e: 291d cmp r1, #29 8006e60: d84b bhi.n 8006efa <__sflush_r+0xf6> 8006e62: 4a2b ldr r2, [pc, #172] ; (8006f10 <__sflush_r+0x10c>) 8006e64: 40ca lsrs r2, r1 8006e66: 07d6 lsls r6, r2, #31 8006e68: d547 bpl.n 8006efa <__sflush_r+0xf6> 8006e6a: 2200 movs r2, #0 8006e6c: 6062 str r2, [r4, #4] 8006e6e: 6922 ldr r2, [r4, #16] 8006e70: 04d9 lsls r1, r3, #19 8006e72: 6022 str r2, [r4, #0] 8006e74: d504 bpl.n 8006e80 <__sflush_r+0x7c> 8006e76: 1c42 adds r2, r0, #1 8006e78: d101 bne.n 8006e7e <__sflush_r+0x7a> 8006e7a: 682b ldr r3, [r5, #0] 8006e7c: b903 cbnz r3, 8006e80 <__sflush_r+0x7c> 8006e7e: 6560 str r0, [r4, #84] ; 0x54 8006e80: 6b61 ldr r1, [r4, #52] ; 0x34 8006e82: 602f str r7, [r5, #0] 8006e84: 2900 cmp r1, #0 8006e86: d0ca beq.n 8006e1e <__sflush_r+0x1a> 8006e88: f104 0344 add.w r3, r4, #68 ; 0x44 8006e8c: 4299 cmp r1, r3 8006e8e: d002 beq.n 8006e96 <__sflush_r+0x92> 8006e90: 4628 mov r0, r5 8006e92: f000 f99f bl 80071d4 <_free_r> 8006e96: 2000 movs r0, #0 8006e98: 6360 str r0, [r4, #52] ; 0x34 8006e9a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006e9e: 6a21 ldr r1, [r4, #32] 8006ea0: 2301 movs r3, #1 8006ea2: 4628 mov r0, r5 8006ea4: 47b0 blx r6 8006ea6: 1c41 adds r1, r0, #1 8006ea8: d1c6 bne.n 8006e38 <__sflush_r+0x34> 8006eaa: 682b ldr r3, [r5, #0] 8006eac: 2b00 cmp r3, #0 8006eae: d0c3 beq.n 8006e38 <__sflush_r+0x34> 8006eb0: 2b1d cmp r3, #29 8006eb2: d001 beq.n 8006eb8 <__sflush_r+0xb4> 8006eb4: 2b16 cmp r3, #22 8006eb6: d101 bne.n 8006ebc <__sflush_r+0xb8> 8006eb8: 602f str r7, [r5, #0] 8006eba: e7b0 b.n 8006e1e <__sflush_r+0x1a> 8006ebc: 89a3 ldrh r3, [r4, #12] 8006ebe: f043 0340 orr.w r3, r3, #64 ; 0x40 8006ec2: 81a3 strh r3, [r4, #12] 8006ec4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006ec8: 690f ldr r7, [r1, #16] 8006eca: 2f00 cmp r7, #0 8006ecc: d0a7 beq.n 8006e1e <__sflush_r+0x1a> 8006ece: 0793 lsls r3, r2, #30 8006ed0: bf18 it ne 8006ed2: 2300 movne r3, #0 8006ed4: 680e ldr r6, [r1, #0] 8006ed6: bf08 it eq 8006ed8: 694b ldreq r3, [r1, #20] 8006eda: eba6 0807 sub.w r8, r6, r7 8006ede: 600f str r7, [r1, #0] 8006ee0: 608b str r3, [r1, #8] 8006ee2: f1b8 0f00 cmp.w r8, #0 8006ee6: dd9a ble.n 8006e1e <__sflush_r+0x1a> 8006ee8: 4643 mov r3, r8 8006eea: 463a mov r2, r7 8006eec: 6a21 ldr r1, [r4, #32] 8006eee: 4628 mov r0, r5 8006ef0: 6aa6 ldr r6, [r4, #40] ; 0x28 8006ef2: 47b0 blx r6 8006ef4: 2800 cmp r0, #0 8006ef6: dc07 bgt.n 8006f08 <__sflush_r+0x104> 8006ef8: 89a3 ldrh r3, [r4, #12] 8006efa: f043 0340 orr.w r3, r3, #64 ; 0x40 8006efe: 81a3 strh r3, [r4, #12] 8006f00: f04f 30ff mov.w r0, #4294967295 8006f04: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006f08: 4407 add r7, r0 8006f0a: eba8 0800 sub.w r8, r8, r0 8006f0e: e7e8 b.n 8006ee2 <__sflush_r+0xde> 8006f10: 20400001 .word 0x20400001 08006f14 <_fflush_r>: 8006f14: b538 push {r3, r4, r5, lr} 8006f16: 690b ldr r3, [r1, #16] 8006f18: 4605 mov r5, r0 8006f1a: 460c mov r4, r1 8006f1c: b1db cbz r3, 8006f56 <_fflush_r+0x42> 8006f1e: b118 cbz r0, 8006f28 <_fflush_r+0x14> 8006f20: 6983 ldr r3, [r0, #24] 8006f22: b90b cbnz r3, 8006f28 <_fflush_r+0x14> 8006f24: f000 f860 bl 8006fe8 <__sinit> 8006f28: 4b0c ldr r3, [pc, #48] ; (8006f5c <_fflush_r+0x48>) 8006f2a: 429c cmp r4, r3 8006f2c: d109 bne.n 8006f42 <_fflush_r+0x2e> 8006f2e: 686c ldr r4, [r5, #4] 8006f30: f9b4 300c ldrsh.w r3, [r4, #12] 8006f34: b17b cbz r3, 8006f56 <_fflush_r+0x42> 8006f36: 4621 mov r1, r4 8006f38: 4628 mov r0, r5 8006f3a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8006f3e: f7ff bf61 b.w 8006e04 <__sflush_r> 8006f42: 4b07 ldr r3, [pc, #28] ; (8006f60 <_fflush_r+0x4c>) 8006f44: 429c cmp r4, r3 8006f46: d101 bne.n 8006f4c <_fflush_r+0x38> 8006f48: 68ac ldr r4, [r5, #8] 8006f4a: e7f1 b.n 8006f30 <_fflush_r+0x1c> 8006f4c: 4b05 ldr r3, [pc, #20] ; (8006f64 <_fflush_r+0x50>) 8006f4e: 429c cmp r4, r3 8006f50: bf08 it eq 8006f52: 68ec ldreq r4, [r5, #12] 8006f54: e7ec b.n 8006f30 <_fflush_r+0x1c> 8006f56: 2000 movs r0, #0 8006f58: bd38 pop {r3, r4, r5, pc} 8006f5a: bf00 nop 8006f5c: 08007c74 .word 0x08007c74 8006f60: 08007c94 .word 0x08007c94 8006f64: 08007c54 .word 0x08007c54 08006f68 <_cleanup_r>: 8006f68: 4901 ldr r1, [pc, #4] ; (8006f70 <_cleanup_r+0x8>) 8006f6a: f000 b8a9 b.w 80070c0 <_fwalk_reent> 8006f6e: bf00 nop 8006f70: 08006f15 .word 0x08006f15 08006f74 : 8006f74: 2300 movs r3, #0 8006f76: b510 push {r4, lr} 8006f78: 4604 mov r4, r0 8006f7a: 6003 str r3, [r0, #0] 8006f7c: 6043 str r3, [r0, #4] 8006f7e: 6083 str r3, [r0, #8] 8006f80: 8181 strh r1, [r0, #12] 8006f82: 6643 str r3, [r0, #100] ; 0x64 8006f84: 81c2 strh r2, [r0, #14] 8006f86: 6103 str r3, [r0, #16] 8006f88: 6143 str r3, [r0, #20] 8006f8a: 6183 str r3, [r0, #24] 8006f8c: 4619 mov r1, r3 8006f8e: 2208 movs r2, #8 8006f90: 305c adds r0, #92 ; 0x5c 8006f92: f7ff fd3c bl 8006a0e 8006f96: 4b05 ldr r3, [pc, #20] ; (8006fac ) 8006f98: 6224 str r4, [r4, #32] 8006f9a: 6263 str r3, [r4, #36] ; 0x24 8006f9c: 4b04 ldr r3, [pc, #16] ; (8006fb0 ) 8006f9e: 62a3 str r3, [r4, #40] ; 0x28 8006fa0: 4b04 ldr r3, [pc, #16] ; (8006fb4 ) 8006fa2: 62e3 str r3, [r4, #44] ; 0x2c 8006fa4: 4b04 ldr r3, [pc, #16] ; (8006fb8 ) 8006fa6: 6323 str r3, [r4, #48] ; 0x30 8006fa8: bd10 pop {r4, pc} 8006faa: bf00 nop 8006fac: 080078f5 .word 0x080078f5 8006fb0: 08007917 .word 0x08007917 8006fb4: 0800794f .word 0x0800794f 8006fb8: 08007973 .word 0x08007973 08006fbc <__sfmoreglue>: 8006fbc: b570 push {r4, r5, r6, lr} 8006fbe: 2568 movs r5, #104 ; 0x68 8006fc0: 1e4a subs r2, r1, #1 8006fc2: 4355 muls r5, r2 8006fc4: 460e mov r6, r1 8006fc6: f105 0174 add.w r1, r5, #116 ; 0x74 8006fca: f000 f94f bl 800726c <_malloc_r> 8006fce: 4604 mov r4, r0 8006fd0: b140 cbz r0, 8006fe4 <__sfmoreglue+0x28> 8006fd2: 2100 movs r1, #0 8006fd4: e880 0042 stmia.w r0, {r1, r6} 8006fd8: 300c adds r0, #12 8006fda: 60a0 str r0, [r4, #8] 8006fdc: f105 0268 add.w r2, r5, #104 ; 0x68 8006fe0: f7ff fd15 bl 8006a0e 8006fe4: 4620 mov r0, r4 8006fe6: bd70 pop {r4, r5, r6, pc} 08006fe8 <__sinit>: 8006fe8: 6983 ldr r3, [r0, #24] 8006fea: b510 push {r4, lr} 8006fec: 4604 mov r4, r0 8006fee: bb33 cbnz r3, 800703e <__sinit+0x56> 8006ff0: 6483 str r3, [r0, #72] ; 0x48 8006ff2: 64c3 str r3, [r0, #76] ; 0x4c 8006ff4: 6503 str r3, [r0, #80] ; 0x50 8006ff6: 4b12 ldr r3, [pc, #72] ; (8007040 <__sinit+0x58>) 8006ff8: 4a12 ldr r2, [pc, #72] ; (8007044 <__sinit+0x5c>) 8006ffa: 681b ldr r3, [r3, #0] 8006ffc: 6282 str r2, [r0, #40] ; 0x28 8006ffe: 4298 cmp r0, r3 8007000: bf04 itt eq 8007002: 2301 moveq r3, #1 8007004: 6183 streq r3, [r0, #24] 8007006: f000 f81f bl 8007048 <__sfp> 800700a: 6060 str r0, [r4, #4] 800700c: 4620 mov r0, r4 800700e: f000 f81b bl 8007048 <__sfp> 8007012: 60a0 str r0, [r4, #8] 8007014: 4620 mov r0, r4 8007016: f000 f817 bl 8007048 <__sfp> 800701a: 2200 movs r2, #0 800701c: 60e0 str r0, [r4, #12] 800701e: 2104 movs r1, #4 8007020: 6860 ldr r0, [r4, #4] 8007022: f7ff ffa7 bl 8006f74 8007026: 2201 movs r2, #1 8007028: 2109 movs r1, #9 800702a: 68a0 ldr r0, [r4, #8] 800702c: f7ff ffa2 bl 8006f74 8007030: 2202 movs r2, #2 8007032: 2112 movs r1, #18 8007034: 68e0 ldr r0, [r4, #12] 8007036: f7ff ff9d bl 8006f74 800703a: 2301 movs r3, #1 800703c: 61a3 str r3, [r4, #24] 800703e: bd10 pop {r4, pc} 8007040: 08007c50 .word 0x08007c50 8007044: 08006f69 .word 0x08006f69 08007048 <__sfp>: 8007048: b5f8 push {r3, r4, r5, r6, r7, lr} 800704a: 4b1c ldr r3, [pc, #112] ; (80070bc <__sfp+0x74>) 800704c: 4607 mov r7, r0 800704e: 681e ldr r6, [r3, #0] 8007050: 69b3 ldr r3, [r6, #24] 8007052: b913 cbnz r3, 800705a <__sfp+0x12> 8007054: 4630 mov r0, r6 8007056: f7ff ffc7 bl 8006fe8 <__sinit> 800705a: 3648 adds r6, #72 ; 0x48 800705c: 68b4 ldr r4, [r6, #8] 800705e: 6873 ldr r3, [r6, #4] 8007060: 3b01 subs r3, #1 8007062: d503 bpl.n 800706c <__sfp+0x24> 8007064: 6833 ldr r3, [r6, #0] 8007066: b133 cbz r3, 8007076 <__sfp+0x2e> 8007068: 6836 ldr r6, [r6, #0] 800706a: e7f7 b.n 800705c <__sfp+0x14> 800706c: f9b4 500c ldrsh.w r5, [r4, #12] 8007070: b16d cbz r5, 800708e <__sfp+0x46> 8007072: 3468 adds r4, #104 ; 0x68 8007074: e7f4 b.n 8007060 <__sfp+0x18> 8007076: 2104 movs r1, #4 8007078: 4638 mov r0, r7 800707a: f7ff ff9f bl 8006fbc <__sfmoreglue> 800707e: 6030 str r0, [r6, #0] 8007080: 2800 cmp r0, #0 8007082: d1f1 bne.n 8007068 <__sfp+0x20> 8007084: 230c movs r3, #12 8007086: 4604 mov r4, r0 8007088: 603b str r3, [r7, #0] 800708a: 4620 mov r0, r4 800708c: bdf8 pop {r3, r4, r5, r6, r7, pc} 800708e: f64f 73ff movw r3, #65535 ; 0xffff 8007092: 81e3 strh r3, [r4, #14] 8007094: 2301 movs r3, #1 8007096: 6665 str r5, [r4, #100] ; 0x64 8007098: 81a3 strh r3, [r4, #12] 800709a: 6025 str r5, [r4, #0] 800709c: 60a5 str r5, [r4, #8] 800709e: 6065 str r5, [r4, #4] 80070a0: 6125 str r5, [r4, #16] 80070a2: 6165 str r5, [r4, #20] 80070a4: 61a5 str r5, [r4, #24] 80070a6: 2208 movs r2, #8 80070a8: 4629 mov r1, r5 80070aa: f104 005c add.w r0, r4, #92 ; 0x5c 80070ae: f7ff fcae bl 8006a0e 80070b2: 6365 str r5, [r4, #52] ; 0x34 80070b4: 63a5 str r5, [r4, #56] ; 0x38 80070b6: 64a5 str r5, [r4, #72] ; 0x48 80070b8: 64e5 str r5, [r4, #76] ; 0x4c 80070ba: e7e6 b.n 800708a <__sfp+0x42> 80070bc: 08007c50 .word 0x08007c50 080070c0 <_fwalk_reent>: 80070c0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80070c4: 4680 mov r8, r0 80070c6: 4689 mov r9, r1 80070c8: 2600 movs r6, #0 80070ca: f100 0448 add.w r4, r0, #72 ; 0x48 80070ce: b914 cbnz r4, 80070d6 <_fwalk_reent+0x16> 80070d0: 4630 mov r0, r6 80070d2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 80070d6: 68a5 ldr r5, [r4, #8] 80070d8: 6867 ldr r7, [r4, #4] 80070da: 3f01 subs r7, #1 80070dc: d501 bpl.n 80070e2 <_fwalk_reent+0x22> 80070de: 6824 ldr r4, [r4, #0] 80070e0: e7f5 b.n 80070ce <_fwalk_reent+0xe> 80070e2: 89ab ldrh r3, [r5, #12] 80070e4: 2b01 cmp r3, #1 80070e6: d907 bls.n 80070f8 <_fwalk_reent+0x38> 80070e8: f9b5 300e ldrsh.w r3, [r5, #14] 80070ec: 3301 adds r3, #1 80070ee: d003 beq.n 80070f8 <_fwalk_reent+0x38> 80070f0: 4629 mov r1, r5 80070f2: 4640 mov r0, r8 80070f4: 47c8 blx r9 80070f6: 4306 orrs r6, r0 80070f8: 3568 adds r5, #104 ; 0x68 80070fa: e7ee b.n 80070da <_fwalk_reent+0x1a> 080070fc <__swhatbuf_r>: 80070fc: b570 push {r4, r5, r6, lr} 80070fe: 460e mov r6, r1 8007100: f9b1 100e ldrsh.w r1, [r1, #14] 8007104: b090 sub sp, #64 ; 0x40 8007106: 2900 cmp r1, #0 8007108: 4614 mov r4, r2 800710a: 461d mov r5, r3 800710c: da07 bge.n 800711e <__swhatbuf_r+0x22> 800710e: 2300 movs r3, #0 8007110: 602b str r3, [r5, #0] 8007112: 89b3 ldrh r3, [r6, #12] 8007114: 061a lsls r2, r3, #24 8007116: d410 bmi.n 800713a <__swhatbuf_r+0x3e> 8007118: f44f 6380 mov.w r3, #1024 ; 0x400 800711c: e00e b.n 800713c <__swhatbuf_r+0x40> 800711e: aa01 add r2, sp, #4 8007120: f000 fc4e bl 80079c0 <_fstat_r> 8007124: 2800 cmp r0, #0 8007126: dbf2 blt.n 800710e <__swhatbuf_r+0x12> 8007128: 9a02 ldr r2, [sp, #8] 800712a: f402 4270 and.w r2, r2, #61440 ; 0xf000 800712e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8007132: 425a negs r2, r3 8007134: 415a adcs r2, r3 8007136: 602a str r2, [r5, #0] 8007138: e7ee b.n 8007118 <__swhatbuf_r+0x1c> 800713a: 2340 movs r3, #64 ; 0x40 800713c: 2000 movs r0, #0 800713e: 6023 str r3, [r4, #0] 8007140: b010 add sp, #64 ; 0x40 8007142: bd70 pop {r4, r5, r6, pc} 08007144 <__smakebuf_r>: 8007144: 898b ldrh r3, [r1, #12] 8007146: b573 push {r0, r1, r4, r5, r6, lr} 8007148: 079d lsls r5, r3, #30 800714a: 4606 mov r6, r0 800714c: 460c mov r4, r1 800714e: d507 bpl.n 8007160 <__smakebuf_r+0x1c> 8007150: f104 0347 add.w r3, r4, #71 ; 0x47 8007154: 6023 str r3, [r4, #0] 8007156: 6123 str r3, [r4, #16] 8007158: 2301 movs r3, #1 800715a: 6163 str r3, [r4, #20] 800715c: b002 add sp, #8 800715e: bd70 pop {r4, r5, r6, pc} 8007160: ab01 add r3, sp, #4 8007162: 466a mov r2, sp 8007164: f7ff ffca bl 80070fc <__swhatbuf_r> 8007168: 9900 ldr r1, [sp, #0] 800716a: 4605 mov r5, r0 800716c: 4630 mov r0, r6 800716e: f000 f87d bl 800726c <_malloc_r> 8007172: b948 cbnz r0, 8007188 <__smakebuf_r+0x44> 8007174: f9b4 300c ldrsh.w r3, [r4, #12] 8007178: 059a lsls r2, r3, #22 800717a: d4ef bmi.n 800715c <__smakebuf_r+0x18> 800717c: f023 0303 bic.w r3, r3, #3 8007180: f043 0302 orr.w r3, r3, #2 8007184: 81a3 strh r3, [r4, #12] 8007186: e7e3 b.n 8007150 <__smakebuf_r+0xc> 8007188: 4b0d ldr r3, [pc, #52] ; (80071c0 <__smakebuf_r+0x7c>) 800718a: 62b3 str r3, [r6, #40] ; 0x28 800718c: 89a3 ldrh r3, [r4, #12] 800718e: 6020 str r0, [r4, #0] 8007190: f043 0380 orr.w r3, r3, #128 ; 0x80 8007194: 81a3 strh r3, [r4, #12] 8007196: 9b00 ldr r3, [sp, #0] 8007198: 6120 str r0, [r4, #16] 800719a: 6163 str r3, [r4, #20] 800719c: 9b01 ldr r3, [sp, #4] 800719e: b15b cbz r3, 80071b8 <__smakebuf_r+0x74> 80071a0: f9b4 100e ldrsh.w r1, [r4, #14] 80071a4: 4630 mov r0, r6 80071a6: f000 fc1d bl 80079e4 <_isatty_r> 80071aa: b128 cbz r0, 80071b8 <__smakebuf_r+0x74> 80071ac: 89a3 ldrh r3, [r4, #12] 80071ae: f023 0303 bic.w r3, r3, #3 80071b2: f043 0301 orr.w r3, r3, #1 80071b6: 81a3 strh r3, [r4, #12] 80071b8: 89a3 ldrh r3, [r4, #12] 80071ba: 431d orrs r5, r3 80071bc: 81a5 strh r5, [r4, #12] 80071be: e7cd b.n 800715c <__smakebuf_r+0x18> 80071c0: 08006f69 .word 0x08006f69 080071c4 : 80071c4: 4b02 ldr r3, [pc, #8] ; (80071d0 ) 80071c6: 4601 mov r1, r0 80071c8: 6818 ldr r0, [r3, #0] 80071ca: f000 b84f b.w 800726c <_malloc_r> 80071ce: bf00 nop 80071d0: 2000000c .word 0x2000000c 080071d4 <_free_r>: 80071d4: b538 push {r3, r4, r5, lr} 80071d6: 4605 mov r5, r0 80071d8: 2900 cmp r1, #0 80071da: d043 beq.n 8007264 <_free_r+0x90> 80071dc: f851 3c04 ldr.w r3, [r1, #-4] 80071e0: 1f0c subs r4, r1, #4 80071e2: 2b00 cmp r3, #0 80071e4: bfb8 it lt 80071e6: 18e4 addlt r4, r4, r3 80071e8: f000 fc2c bl 8007a44 <__malloc_lock> 80071ec: 4a1e ldr r2, [pc, #120] ; (8007268 <_free_r+0x94>) 80071ee: 6813 ldr r3, [r2, #0] 80071f0: 4610 mov r0, r2 80071f2: b933 cbnz r3, 8007202 <_free_r+0x2e> 80071f4: 6063 str r3, [r4, #4] 80071f6: 6014 str r4, [r2, #0] 80071f8: 4628 mov r0, r5 80071fa: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80071fe: f000 bc22 b.w 8007a46 <__malloc_unlock> 8007202: 42a3 cmp r3, r4 8007204: d90b bls.n 800721e <_free_r+0x4a> 8007206: 6821 ldr r1, [r4, #0] 8007208: 1862 adds r2, r4, r1 800720a: 4293 cmp r3, r2 800720c: bf01 itttt eq 800720e: 681a ldreq r2, [r3, #0] 8007210: 685b ldreq r3, [r3, #4] 8007212: 1852 addeq r2, r2, r1 8007214: 6022 streq r2, [r4, #0] 8007216: 6063 str r3, [r4, #4] 8007218: 6004 str r4, [r0, #0] 800721a: e7ed b.n 80071f8 <_free_r+0x24> 800721c: 4613 mov r3, r2 800721e: 685a ldr r2, [r3, #4] 8007220: b10a cbz r2, 8007226 <_free_r+0x52> 8007222: 42a2 cmp r2, r4 8007224: d9fa bls.n 800721c <_free_r+0x48> 8007226: 6819 ldr r1, [r3, #0] 8007228: 1858 adds r0, r3, r1 800722a: 42a0 cmp r0, r4 800722c: d10b bne.n 8007246 <_free_r+0x72> 800722e: 6820 ldr r0, [r4, #0] 8007230: 4401 add r1, r0 8007232: 1858 adds r0, r3, r1 8007234: 4282 cmp r2, r0 8007236: 6019 str r1, [r3, #0] 8007238: d1de bne.n 80071f8 <_free_r+0x24> 800723a: 6810 ldr r0, [r2, #0] 800723c: 6852 ldr r2, [r2, #4] 800723e: 4401 add r1, r0 8007240: 6019 str r1, [r3, #0] 8007242: 605a str r2, [r3, #4] 8007244: e7d8 b.n 80071f8 <_free_r+0x24> 8007246: d902 bls.n 800724e <_free_r+0x7a> 8007248: 230c movs r3, #12 800724a: 602b str r3, [r5, #0] 800724c: e7d4 b.n 80071f8 <_free_r+0x24> 800724e: 6820 ldr r0, [r4, #0] 8007250: 1821 adds r1, r4, r0 8007252: 428a cmp r2, r1 8007254: bf01 itttt eq 8007256: 6811 ldreq r1, [r2, #0] 8007258: 6852 ldreq r2, [r2, #4] 800725a: 1809 addeq r1, r1, r0 800725c: 6021 streq r1, [r4, #0] 800725e: 6062 str r2, [r4, #4] 8007260: 605c str r4, [r3, #4] 8007262: e7c9 b.n 80071f8 <_free_r+0x24> 8007264: bd38 pop {r3, r4, r5, pc} 8007266: bf00 nop 8007268: 200001e4 .word 0x200001e4 0800726c <_malloc_r>: 800726c: b570 push {r4, r5, r6, lr} 800726e: 1ccd adds r5, r1, #3 8007270: f025 0503 bic.w r5, r5, #3 8007274: 3508 adds r5, #8 8007276: 2d0c cmp r5, #12 8007278: bf38 it cc 800727a: 250c movcc r5, #12 800727c: 2d00 cmp r5, #0 800727e: 4606 mov r6, r0 8007280: db01 blt.n 8007286 <_malloc_r+0x1a> 8007282: 42a9 cmp r1, r5 8007284: d903 bls.n 800728e <_malloc_r+0x22> 8007286: 230c movs r3, #12 8007288: 6033 str r3, [r6, #0] 800728a: 2000 movs r0, #0 800728c: bd70 pop {r4, r5, r6, pc} 800728e: f000 fbd9 bl 8007a44 <__malloc_lock> 8007292: 4a23 ldr r2, [pc, #140] ; (8007320 <_malloc_r+0xb4>) 8007294: 6814 ldr r4, [r2, #0] 8007296: 4621 mov r1, r4 8007298: b991 cbnz r1, 80072c0 <_malloc_r+0x54> 800729a: 4c22 ldr r4, [pc, #136] ; (8007324 <_malloc_r+0xb8>) 800729c: 6823 ldr r3, [r4, #0] 800729e: b91b cbnz r3, 80072a8 <_malloc_r+0x3c> 80072a0: 4630 mov r0, r6 80072a2: f000 fb17 bl 80078d4 <_sbrk_r> 80072a6: 6020 str r0, [r4, #0] 80072a8: 4629 mov r1, r5 80072aa: 4630 mov r0, r6 80072ac: f000 fb12 bl 80078d4 <_sbrk_r> 80072b0: 1c43 adds r3, r0, #1 80072b2: d126 bne.n 8007302 <_malloc_r+0x96> 80072b4: 230c movs r3, #12 80072b6: 4630 mov r0, r6 80072b8: 6033 str r3, [r6, #0] 80072ba: f000 fbc4 bl 8007a46 <__malloc_unlock> 80072be: e7e4 b.n 800728a <_malloc_r+0x1e> 80072c0: 680b ldr r3, [r1, #0] 80072c2: 1b5b subs r3, r3, r5 80072c4: d41a bmi.n 80072fc <_malloc_r+0x90> 80072c6: 2b0b cmp r3, #11 80072c8: d90f bls.n 80072ea <_malloc_r+0x7e> 80072ca: 600b str r3, [r1, #0] 80072cc: 18cc adds r4, r1, r3 80072ce: 50cd str r5, [r1, r3] 80072d0: 4630 mov r0, r6 80072d2: f000 fbb8 bl 8007a46 <__malloc_unlock> 80072d6: f104 000b add.w r0, r4, #11 80072da: 1d23 adds r3, r4, #4 80072dc: f020 0007 bic.w r0, r0, #7 80072e0: 1ac3 subs r3, r0, r3 80072e2: d01b beq.n 800731c <_malloc_r+0xb0> 80072e4: 425a negs r2, r3 80072e6: 50e2 str r2, [r4, r3] 80072e8: bd70 pop {r4, r5, r6, pc} 80072ea: 428c cmp r4, r1 80072ec: bf0b itete eq 80072ee: 6863 ldreq r3, [r4, #4] 80072f0: 684b ldrne r3, [r1, #4] 80072f2: 6013 streq r3, [r2, #0] 80072f4: 6063 strne r3, [r4, #4] 80072f6: bf18 it ne 80072f8: 460c movne r4, r1 80072fa: e7e9 b.n 80072d0 <_malloc_r+0x64> 80072fc: 460c mov r4, r1 80072fe: 6849 ldr r1, [r1, #4] 8007300: e7ca b.n 8007298 <_malloc_r+0x2c> 8007302: 1cc4 adds r4, r0, #3 8007304: f024 0403 bic.w r4, r4, #3 8007308: 42a0 cmp r0, r4 800730a: d005 beq.n 8007318 <_malloc_r+0xac> 800730c: 1a21 subs r1, r4, r0 800730e: 4630 mov r0, r6 8007310: f000 fae0 bl 80078d4 <_sbrk_r> 8007314: 3001 adds r0, #1 8007316: d0cd beq.n 80072b4 <_malloc_r+0x48> 8007318: 6025 str r5, [r4, #0] 800731a: e7d9 b.n 80072d0 <_malloc_r+0x64> 800731c: bd70 pop {r4, r5, r6, pc} 800731e: bf00 nop 8007320: 200001e4 .word 0x200001e4 8007324: 200001e8 .word 0x200001e8 08007328 <__sfputc_r>: 8007328: 6893 ldr r3, [r2, #8] 800732a: b410 push {r4} 800732c: 3b01 subs r3, #1 800732e: 2b00 cmp r3, #0 8007330: 6093 str r3, [r2, #8] 8007332: da08 bge.n 8007346 <__sfputc_r+0x1e> 8007334: 6994 ldr r4, [r2, #24] 8007336: 42a3 cmp r3, r4 8007338: db02 blt.n 8007340 <__sfputc_r+0x18> 800733a: b2cb uxtb r3, r1 800733c: 2b0a cmp r3, #10 800733e: d102 bne.n 8007346 <__sfputc_r+0x1e> 8007340: bc10 pop {r4} 8007342: f7ff bc9f b.w 8006c84 <__swbuf_r> 8007346: 6813 ldr r3, [r2, #0] 8007348: 1c58 adds r0, r3, #1 800734a: 6010 str r0, [r2, #0] 800734c: 7019 strb r1, [r3, #0] 800734e: b2c8 uxtb r0, r1 8007350: bc10 pop {r4} 8007352: 4770 bx lr 08007354 <__sfputs_r>: 8007354: b5f8 push {r3, r4, r5, r6, r7, lr} 8007356: 4606 mov r6, r0 8007358: 460f mov r7, r1 800735a: 4614 mov r4, r2 800735c: 18d5 adds r5, r2, r3 800735e: 42ac cmp r4, r5 8007360: d101 bne.n 8007366 <__sfputs_r+0x12> 8007362: 2000 movs r0, #0 8007364: e007 b.n 8007376 <__sfputs_r+0x22> 8007366: 463a mov r2, r7 8007368: f814 1b01 ldrb.w r1, [r4], #1 800736c: 4630 mov r0, r6 800736e: f7ff ffdb bl 8007328 <__sfputc_r> 8007372: 1c43 adds r3, r0, #1 8007374: d1f3 bne.n 800735e <__sfputs_r+0xa> 8007376: bdf8 pop {r3, r4, r5, r6, r7, pc} 08007378 <_vfiprintf_r>: 8007378: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800737c: b09d sub sp, #116 ; 0x74 800737e: 460c mov r4, r1 8007380: 4617 mov r7, r2 8007382: 9303 str r3, [sp, #12] 8007384: 4606 mov r6, r0 8007386: b118 cbz r0, 8007390 <_vfiprintf_r+0x18> 8007388: 6983 ldr r3, [r0, #24] 800738a: b90b cbnz r3, 8007390 <_vfiprintf_r+0x18> 800738c: f7ff fe2c bl 8006fe8 <__sinit> 8007390: 4b7c ldr r3, [pc, #496] ; (8007584 <_vfiprintf_r+0x20c>) 8007392: 429c cmp r4, r3 8007394: d157 bne.n 8007446 <_vfiprintf_r+0xce> 8007396: 6874 ldr r4, [r6, #4] 8007398: 89a3 ldrh r3, [r4, #12] 800739a: 0718 lsls r0, r3, #28 800739c: d55d bpl.n 800745a <_vfiprintf_r+0xe2> 800739e: 6923 ldr r3, [r4, #16] 80073a0: 2b00 cmp r3, #0 80073a2: d05a beq.n 800745a <_vfiprintf_r+0xe2> 80073a4: 2300 movs r3, #0 80073a6: 9309 str r3, [sp, #36] ; 0x24 80073a8: 2320 movs r3, #32 80073aa: f88d 3029 strb.w r3, [sp, #41] ; 0x29 80073ae: 2330 movs r3, #48 ; 0x30 80073b0: f04f 0b01 mov.w fp, #1 80073b4: f88d 302a strb.w r3, [sp, #42] ; 0x2a 80073b8: 46b8 mov r8, r7 80073ba: 4645 mov r5, r8 80073bc: f815 3b01 ldrb.w r3, [r5], #1 80073c0: 2b00 cmp r3, #0 80073c2: d155 bne.n 8007470 <_vfiprintf_r+0xf8> 80073c4: ebb8 0a07 subs.w sl, r8, r7 80073c8: d00b beq.n 80073e2 <_vfiprintf_r+0x6a> 80073ca: 4653 mov r3, sl 80073cc: 463a mov r2, r7 80073ce: 4621 mov r1, r4 80073d0: 4630 mov r0, r6 80073d2: f7ff ffbf bl 8007354 <__sfputs_r> 80073d6: 3001 adds r0, #1 80073d8: f000 80c4 beq.w 8007564 <_vfiprintf_r+0x1ec> 80073dc: 9b09 ldr r3, [sp, #36] ; 0x24 80073de: 4453 add r3, sl 80073e0: 9309 str r3, [sp, #36] ; 0x24 80073e2: f898 3000 ldrb.w r3, [r8] 80073e6: 2b00 cmp r3, #0 80073e8: f000 80bc beq.w 8007564 <_vfiprintf_r+0x1ec> 80073ec: 2300 movs r3, #0 80073ee: f04f 32ff mov.w r2, #4294967295 80073f2: 9304 str r3, [sp, #16] 80073f4: 9307 str r3, [sp, #28] 80073f6: 9205 str r2, [sp, #20] 80073f8: 9306 str r3, [sp, #24] 80073fa: f88d 3053 strb.w r3, [sp, #83] ; 0x53 80073fe: 931a str r3, [sp, #104] ; 0x68 8007400: 2205 movs r2, #5 8007402: 7829 ldrb r1, [r5, #0] 8007404: 4860 ldr r0, [pc, #384] ; (8007588 <_vfiprintf_r+0x210>) 8007406: f000 fb0f bl 8007a28 800740a: f105 0801 add.w r8, r5, #1 800740e: 9b04 ldr r3, [sp, #16] 8007410: 2800 cmp r0, #0 8007412: d131 bne.n 8007478 <_vfiprintf_r+0x100> 8007414: 06d9 lsls r1, r3, #27 8007416: bf44 itt mi 8007418: 2220 movmi r2, #32 800741a: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800741e: 071a lsls r2, r3, #28 8007420: bf44 itt mi 8007422: 222b movmi r2, #43 ; 0x2b 8007424: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8007428: 782a ldrb r2, [r5, #0] 800742a: 2a2a cmp r2, #42 ; 0x2a 800742c: d02c beq.n 8007488 <_vfiprintf_r+0x110> 800742e: 2100 movs r1, #0 8007430: 200a movs r0, #10 8007432: 9a07 ldr r2, [sp, #28] 8007434: 46a8 mov r8, r5 8007436: f898 3000 ldrb.w r3, [r8] 800743a: 3501 adds r5, #1 800743c: 3b30 subs r3, #48 ; 0x30 800743e: 2b09 cmp r3, #9 8007440: d96d bls.n 800751e <_vfiprintf_r+0x1a6> 8007442: b371 cbz r1, 80074a2 <_vfiprintf_r+0x12a> 8007444: e026 b.n 8007494 <_vfiprintf_r+0x11c> 8007446: 4b51 ldr r3, [pc, #324] ; (800758c <_vfiprintf_r+0x214>) 8007448: 429c cmp r4, r3 800744a: d101 bne.n 8007450 <_vfiprintf_r+0xd8> 800744c: 68b4 ldr r4, [r6, #8] 800744e: e7a3 b.n 8007398 <_vfiprintf_r+0x20> 8007450: 4b4f ldr r3, [pc, #316] ; (8007590 <_vfiprintf_r+0x218>) 8007452: 429c cmp r4, r3 8007454: bf08 it eq 8007456: 68f4 ldreq r4, [r6, #12] 8007458: e79e b.n 8007398 <_vfiprintf_r+0x20> 800745a: 4621 mov r1, r4 800745c: 4630 mov r0, r6 800745e: f7ff fc63 bl 8006d28 <__swsetup_r> 8007462: 2800 cmp r0, #0 8007464: d09e beq.n 80073a4 <_vfiprintf_r+0x2c> 8007466: f04f 30ff mov.w r0, #4294967295 800746a: b01d add sp, #116 ; 0x74 800746c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8007470: 2b25 cmp r3, #37 ; 0x25 8007472: d0a7 beq.n 80073c4 <_vfiprintf_r+0x4c> 8007474: 46a8 mov r8, r5 8007476: e7a0 b.n 80073ba <_vfiprintf_r+0x42> 8007478: 4a43 ldr r2, [pc, #268] ; (8007588 <_vfiprintf_r+0x210>) 800747a: 4645 mov r5, r8 800747c: 1a80 subs r0, r0, r2 800747e: fa0b f000 lsl.w r0, fp, r0 8007482: 4318 orrs r0, r3 8007484: 9004 str r0, [sp, #16] 8007486: e7bb b.n 8007400 <_vfiprintf_r+0x88> 8007488: 9a03 ldr r2, [sp, #12] 800748a: 1d11 adds r1, r2, #4 800748c: 6812 ldr r2, [r2, #0] 800748e: 9103 str r1, [sp, #12] 8007490: 2a00 cmp r2, #0 8007492: db01 blt.n 8007498 <_vfiprintf_r+0x120> 8007494: 9207 str r2, [sp, #28] 8007496: e004 b.n 80074a2 <_vfiprintf_r+0x12a> 8007498: 4252 negs r2, r2 800749a: f043 0302 orr.w r3, r3, #2 800749e: 9207 str r2, [sp, #28] 80074a0: 9304 str r3, [sp, #16] 80074a2: f898 3000 ldrb.w r3, [r8] 80074a6: 2b2e cmp r3, #46 ; 0x2e 80074a8: d110 bne.n 80074cc <_vfiprintf_r+0x154> 80074aa: f898 3001 ldrb.w r3, [r8, #1] 80074ae: f108 0101 add.w r1, r8, #1 80074b2: 2b2a cmp r3, #42 ; 0x2a 80074b4: d137 bne.n 8007526 <_vfiprintf_r+0x1ae> 80074b6: 9b03 ldr r3, [sp, #12] 80074b8: f108 0802 add.w r8, r8, #2 80074bc: 1d1a adds r2, r3, #4 80074be: 681b ldr r3, [r3, #0] 80074c0: 9203 str r2, [sp, #12] 80074c2: 2b00 cmp r3, #0 80074c4: bfb8 it lt 80074c6: f04f 33ff movlt.w r3, #4294967295 80074ca: 9305 str r3, [sp, #20] 80074cc: 4d31 ldr r5, [pc, #196] ; (8007594 <_vfiprintf_r+0x21c>) 80074ce: 2203 movs r2, #3 80074d0: f898 1000 ldrb.w r1, [r8] 80074d4: 4628 mov r0, r5 80074d6: f000 faa7 bl 8007a28 80074da: b140 cbz r0, 80074ee <_vfiprintf_r+0x176> 80074dc: 2340 movs r3, #64 ; 0x40 80074de: 1b40 subs r0, r0, r5 80074e0: fa03 f000 lsl.w r0, r3, r0 80074e4: 9b04 ldr r3, [sp, #16] 80074e6: f108 0801 add.w r8, r8, #1 80074ea: 4303 orrs r3, r0 80074ec: 9304 str r3, [sp, #16] 80074ee: f898 1000 ldrb.w r1, [r8] 80074f2: 2206 movs r2, #6 80074f4: 4828 ldr r0, [pc, #160] ; (8007598 <_vfiprintf_r+0x220>) 80074f6: f108 0701 add.w r7, r8, #1 80074fa: f88d 1028 strb.w r1, [sp, #40] ; 0x28 80074fe: f000 fa93 bl 8007a28 8007502: 2800 cmp r0, #0 8007504: d034 beq.n 8007570 <_vfiprintf_r+0x1f8> 8007506: 4b25 ldr r3, [pc, #148] ; (800759c <_vfiprintf_r+0x224>) 8007508: bb03 cbnz r3, 800754c <_vfiprintf_r+0x1d4> 800750a: 9b03 ldr r3, [sp, #12] 800750c: 3307 adds r3, #7 800750e: f023 0307 bic.w r3, r3, #7 8007512: 3308 adds r3, #8 8007514: 9303 str r3, [sp, #12] 8007516: 9b09 ldr r3, [sp, #36] ; 0x24 8007518: 444b add r3, r9 800751a: 9309 str r3, [sp, #36] ; 0x24 800751c: e74c b.n 80073b8 <_vfiprintf_r+0x40> 800751e: fb00 3202 mla r2, r0, r2, r3 8007522: 2101 movs r1, #1 8007524: e786 b.n 8007434 <_vfiprintf_r+0xbc> 8007526: 2300 movs r3, #0 8007528: 250a movs r5, #10 800752a: 4618 mov r0, r3 800752c: 9305 str r3, [sp, #20] 800752e: 4688 mov r8, r1 8007530: f898 2000 ldrb.w r2, [r8] 8007534: 3101 adds r1, #1 8007536: 3a30 subs r2, #48 ; 0x30 8007538: 2a09 cmp r2, #9 800753a: d903 bls.n 8007544 <_vfiprintf_r+0x1cc> 800753c: 2b00 cmp r3, #0 800753e: d0c5 beq.n 80074cc <_vfiprintf_r+0x154> 8007540: 9005 str r0, [sp, #20] 8007542: e7c3 b.n 80074cc <_vfiprintf_r+0x154> 8007544: fb05 2000 mla r0, r5, r0, r2 8007548: 2301 movs r3, #1 800754a: e7f0 b.n 800752e <_vfiprintf_r+0x1b6> 800754c: ab03 add r3, sp, #12 800754e: 9300 str r3, [sp, #0] 8007550: 4622 mov r2, r4 8007552: 4b13 ldr r3, [pc, #76] ; (80075a0 <_vfiprintf_r+0x228>) 8007554: a904 add r1, sp, #16 8007556: 4630 mov r0, r6 8007558: f3af 8000 nop.w 800755c: f1b0 3fff cmp.w r0, #4294967295 8007560: 4681 mov r9, r0 8007562: d1d8 bne.n 8007516 <_vfiprintf_r+0x19e> 8007564: 89a3 ldrh r3, [r4, #12] 8007566: 065b lsls r3, r3, #25 8007568: f53f af7d bmi.w 8007466 <_vfiprintf_r+0xee> 800756c: 9809 ldr r0, [sp, #36] ; 0x24 800756e: e77c b.n 800746a <_vfiprintf_r+0xf2> 8007570: ab03 add r3, sp, #12 8007572: 9300 str r3, [sp, #0] 8007574: 4622 mov r2, r4 8007576: 4b0a ldr r3, [pc, #40] ; (80075a0 <_vfiprintf_r+0x228>) 8007578: a904 add r1, sp, #16 800757a: 4630 mov r0, r6 800757c: f000 f88a bl 8007694 <_printf_i> 8007580: e7ec b.n 800755c <_vfiprintf_r+0x1e4> 8007582: bf00 nop 8007584: 08007c74 .word 0x08007c74 8007588: 08007cb4 .word 0x08007cb4 800758c: 08007c94 .word 0x08007c94 8007590: 08007c54 .word 0x08007c54 8007594: 08007cba .word 0x08007cba 8007598: 08007cbe .word 0x08007cbe 800759c: 00000000 .word 0x00000000 80075a0: 08007355 .word 0x08007355 080075a4 <_printf_common>: 80075a4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80075a8: 4691 mov r9, r2 80075aa: 461f mov r7, r3 80075ac: 688a ldr r2, [r1, #8] 80075ae: 690b ldr r3, [r1, #16] 80075b0: 4606 mov r6, r0 80075b2: 4293 cmp r3, r2 80075b4: bfb8 it lt 80075b6: 4613 movlt r3, r2 80075b8: f8c9 3000 str.w r3, [r9] 80075bc: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 80075c0: 460c mov r4, r1 80075c2: f8dd 8020 ldr.w r8, [sp, #32] 80075c6: b112 cbz r2, 80075ce <_printf_common+0x2a> 80075c8: 3301 adds r3, #1 80075ca: f8c9 3000 str.w r3, [r9] 80075ce: 6823 ldr r3, [r4, #0] 80075d0: 0699 lsls r1, r3, #26 80075d2: bf42 ittt mi 80075d4: f8d9 3000 ldrmi.w r3, [r9] 80075d8: 3302 addmi r3, #2 80075da: f8c9 3000 strmi.w r3, [r9] 80075de: 6825 ldr r5, [r4, #0] 80075e0: f015 0506 ands.w r5, r5, #6 80075e4: d107 bne.n 80075f6 <_printf_common+0x52> 80075e6: f104 0a19 add.w sl, r4, #25 80075ea: 68e3 ldr r3, [r4, #12] 80075ec: f8d9 2000 ldr.w r2, [r9] 80075f0: 1a9b subs r3, r3, r2 80075f2: 429d cmp r5, r3 80075f4: db2a blt.n 800764c <_printf_common+0xa8> 80075f6: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 80075fa: 6822 ldr r2, [r4, #0] 80075fc: 3300 adds r3, #0 80075fe: bf18 it ne 8007600: 2301 movne r3, #1 8007602: 0692 lsls r2, r2, #26 8007604: d42f bmi.n 8007666 <_printf_common+0xc2> 8007606: f104 0243 add.w r2, r4, #67 ; 0x43 800760a: 4639 mov r1, r7 800760c: 4630 mov r0, r6 800760e: 47c0 blx r8 8007610: 3001 adds r0, #1 8007612: d022 beq.n 800765a <_printf_common+0xb6> 8007614: 6823 ldr r3, [r4, #0] 8007616: 68e5 ldr r5, [r4, #12] 8007618: f003 0306 and.w r3, r3, #6 800761c: 2b04 cmp r3, #4 800761e: bf18 it ne 8007620: 2500 movne r5, #0 8007622: f8d9 2000 ldr.w r2, [r9] 8007626: f04f 0900 mov.w r9, #0 800762a: bf08 it eq 800762c: 1aad subeq r5, r5, r2 800762e: 68a3 ldr r3, [r4, #8] 8007630: 6922 ldr r2, [r4, #16] 8007632: bf08 it eq 8007634: ea25 75e5 biceq.w r5, r5, r5, asr #31 8007638: 4293 cmp r3, r2 800763a: bfc4 itt gt 800763c: 1a9b subgt r3, r3, r2 800763e: 18ed addgt r5, r5, r3 8007640: 341a adds r4, #26 8007642: 454d cmp r5, r9 8007644: d11b bne.n 800767e <_printf_common+0xda> 8007646: 2000 movs r0, #0 8007648: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800764c: 2301 movs r3, #1 800764e: 4652 mov r2, sl 8007650: 4639 mov r1, r7 8007652: 4630 mov r0, r6 8007654: 47c0 blx r8 8007656: 3001 adds r0, #1 8007658: d103 bne.n 8007662 <_printf_common+0xbe> 800765a: f04f 30ff mov.w r0, #4294967295 800765e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007662: 3501 adds r5, #1 8007664: e7c1 b.n 80075ea <_printf_common+0x46> 8007666: 2030 movs r0, #48 ; 0x30 8007668: 18e1 adds r1, r4, r3 800766a: f881 0043 strb.w r0, [r1, #67] ; 0x43 800766e: 1c5a adds r2, r3, #1 8007670: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8007674: 4422 add r2, r4 8007676: 3302 adds r3, #2 8007678: f882 1043 strb.w r1, [r2, #67] ; 0x43 800767c: e7c3 b.n 8007606 <_printf_common+0x62> 800767e: 2301 movs r3, #1 8007680: 4622 mov r2, r4 8007682: 4639 mov r1, r7 8007684: 4630 mov r0, r6 8007686: 47c0 blx r8 8007688: 3001 adds r0, #1 800768a: d0e6 beq.n 800765a <_printf_common+0xb6> 800768c: f109 0901 add.w r9, r9, #1 8007690: e7d7 b.n 8007642 <_printf_common+0x9e> ... 08007694 <_printf_i>: 8007694: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8007698: 4617 mov r7, r2 800769a: 7e0a ldrb r2, [r1, #24] 800769c: b085 sub sp, #20 800769e: 2a6e cmp r2, #110 ; 0x6e 80076a0: 4698 mov r8, r3 80076a2: 4606 mov r6, r0 80076a4: 460c mov r4, r1 80076a6: 9b0c ldr r3, [sp, #48] ; 0x30 80076a8: f101 0e43 add.w lr, r1, #67 ; 0x43 80076ac: f000 80bc beq.w 8007828 <_printf_i+0x194> 80076b0: d81a bhi.n 80076e8 <_printf_i+0x54> 80076b2: 2a63 cmp r2, #99 ; 0x63 80076b4: d02e beq.n 8007714 <_printf_i+0x80> 80076b6: d80a bhi.n 80076ce <_printf_i+0x3a> 80076b8: 2a00 cmp r2, #0 80076ba: f000 80c8 beq.w 800784e <_printf_i+0x1ba> 80076be: 2a58 cmp r2, #88 ; 0x58 80076c0: f000 808a beq.w 80077d8 <_printf_i+0x144> 80076c4: f104 0542 add.w r5, r4, #66 ; 0x42 80076c8: f884 2042 strb.w r2, [r4, #66] ; 0x42 80076cc: e02a b.n 8007724 <_printf_i+0x90> 80076ce: 2a64 cmp r2, #100 ; 0x64 80076d0: d001 beq.n 80076d6 <_printf_i+0x42> 80076d2: 2a69 cmp r2, #105 ; 0x69 80076d4: d1f6 bne.n 80076c4 <_printf_i+0x30> 80076d6: 6821 ldr r1, [r4, #0] 80076d8: 681a ldr r2, [r3, #0] 80076da: f011 0f80 tst.w r1, #128 ; 0x80 80076de: d023 beq.n 8007728 <_printf_i+0x94> 80076e0: 1d11 adds r1, r2, #4 80076e2: 6019 str r1, [r3, #0] 80076e4: 6813 ldr r3, [r2, #0] 80076e6: e027 b.n 8007738 <_printf_i+0xa4> 80076e8: 2a73 cmp r2, #115 ; 0x73 80076ea: f000 80b4 beq.w 8007856 <_printf_i+0x1c2> 80076ee: d808 bhi.n 8007702 <_printf_i+0x6e> 80076f0: 2a6f cmp r2, #111 ; 0x6f 80076f2: d02a beq.n 800774a <_printf_i+0xb6> 80076f4: 2a70 cmp r2, #112 ; 0x70 80076f6: d1e5 bne.n 80076c4 <_printf_i+0x30> 80076f8: 680a ldr r2, [r1, #0] 80076fa: f042 0220 orr.w r2, r2, #32 80076fe: 600a str r2, [r1, #0] 8007700: e003 b.n 800770a <_printf_i+0x76> 8007702: 2a75 cmp r2, #117 ; 0x75 8007704: d021 beq.n 800774a <_printf_i+0xb6> 8007706: 2a78 cmp r2, #120 ; 0x78 8007708: d1dc bne.n 80076c4 <_printf_i+0x30> 800770a: 2278 movs r2, #120 ; 0x78 800770c: 496f ldr r1, [pc, #444] ; (80078cc <_printf_i+0x238>) 800770e: f884 2045 strb.w r2, [r4, #69] ; 0x45 8007712: e064 b.n 80077de <_printf_i+0x14a> 8007714: 681a ldr r2, [r3, #0] 8007716: f101 0542 add.w r5, r1, #66 ; 0x42 800771a: 1d11 adds r1, r2, #4 800771c: 6019 str r1, [r3, #0] 800771e: 6813 ldr r3, [r2, #0] 8007720: f884 3042 strb.w r3, [r4, #66] ; 0x42 8007724: 2301 movs r3, #1 8007726: e0a3 b.n 8007870 <_printf_i+0x1dc> 8007728: f011 0f40 tst.w r1, #64 ; 0x40 800772c: f102 0104 add.w r1, r2, #4 8007730: 6019 str r1, [r3, #0] 8007732: d0d7 beq.n 80076e4 <_printf_i+0x50> 8007734: f9b2 3000 ldrsh.w r3, [r2] 8007738: 2b00 cmp r3, #0 800773a: da03 bge.n 8007744 <_printf_i+0xb0> 800773c: 222d movs r2, #45 ; 0x2d 800773e: 425b negs r3, r3 8007740: f884 2043 strb.w r2, [r4, #67] ; 0x43 8007744: 4962 ldr r1, [pc, #392] ; (80078d0 <_printf_i+0x23c>) 8007746: 220a movs r2, #10 8007748: e017 b.n 800777a <_printf_i+0xe6> 800774a: 6820 ldr r0, [r4, #0] 800774c: 6819 ldr r1, [r3, #0] 800774e: f010 0f80 tst.w r0, #128 ; 0x80 8007752: d003 beq.n 800775c <_printf_i+0xc8> 8007754: 1d08 adds r0, r1, #4 8007756: 6018 str r0, [r3, #0] 8007758: 680b ldr r3, [r1, #0] 800775a: e006 b.n 800776a <_printf_i+0xd6> 800775c: f010 0f40 tst.w r0, #64 ; 0x40 8007760: f101 0004 add.w r0, r1, #4 8007764: 6018 str r0, [r3, #0] 8007766: d0f7 beq.n 8007758 <_printf_i+0xc4> 8007768: 880b ldrh r3, [r1, #0] 800776a: 2a6f cmp r2, #111 ; 0x6f 800776c: bf14 ite ne 800776e: 220a movne r2, #10 8007770: 2208 moveq r2, #8 8007772: 4957 ldr r1, [pc, #348] ; (80078d0 <_printf_i+0x23c>) 8007774: 2000 movs r0, #0 8007776: f884 0043 strb.w r0, [r4, #67] ; 0x43 800777a: 6865 ldr r5, [r4, #4] 800777c: 2d00 cmp r5, #0 800777e: 60a5 str r5, [r4, #8] 8007780: f2c0 809c blt.w 80078bc <_printf_i+0x228> 8007784: 6820 ldr r0, [r4, #0] 8007786: f020 0004 bic.w r0, r0, #4 800778a: 6020 str r0, [r4, #0] 800778c: 2b00 cmp r3, #0 800778e: d13f bne.n 8007810 <_printf_i+0x17c> 8007790: 2d00 cmp r5, #0 8007792: f040 8095 bne.w 80078c0 <_printf_i+0x22c> 8007796: 4675 mov r5, lr 8007798: 2a08 cmp r2, #8 800779a: d10b bne.n 80077b4 <_printf_i+0x120> 800779c: 6823 ldr r3, [r4, #0] 800779e: 07da lsls r2, r3, #31 80077a0: d508 bpl.n 80077b4 <_printf_i+0x120> 80077a2: 6923 ldr r3, [r4, #16] 80077a4: 6862 ldr r2, [r4, #4] 80077a6: 429a cmp r2, r3 80077a8: bfde ittt le 80077aa: 2330 movle r3, #48 ; 0x30 80077ac: f805 3c01 strble.w r3, [r5, #-1] 80077b0: f105 35ff addle.w r5, r5, #4294967295 80077b4: ebae 0305 sub.w r3, lr, r5 80077b8: 6123 str r3, [r4, #16] 80077ba: f8cd 8000 str.w r8, [sp] 80077be: 463b mov r3, r7 80077c0: aa03 add r2, sp, #12 80077c2: 4621 mov r1, r4 80077c4: 4630 mov r0, r6 80077c6: f7ff feed bl 80075a4 <_printf_common> 80077ca: 3001 adds r0, #1 80077cc: d155 bne.n 800787a <_printf_i+0x1e6> 80077ce: f04f 30ff mov.w r0, #4294967295 80077d2: b005 add sp, #20 80077d4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80077d8: f881 2045 strb.w r2, [r1, #69] ; 0x45 80077dc: 493c ldr r1, [pc, #240] ; (80078d0 <_printf_i+0x23c>) 80077de: 6822 ldr r2, [r4, #0] 80077e0: 6818 ldr r0, [r3, #0] 80077e2: f012 0f80 tst.w r2, #128 ; 0x80 80077e6: f100 0504 add.w r5, r0, #4 80077ea: 601d str r5, [r3, #0] 80077ec: d001 beq.n 80077f2 <_printf_i+0x15e> 80077ee: 6803 ldr r3, [r0, #0] 80077f0: e002 b.n 80077f8 <_printf_i+0x164> 80077f2: 0655 lsls r5, r2, #25 80077f4: d5fb bpl.n 80077ee <_printf_i+0x15a> 80077f6: 8803 ldrh r3, [r0, #0] 80077f8: 07d0 lsls r0, r2, #31 80077fa: bf44 itt mi 80077fc: f042 0220 orrmi.w r2, r2, #32 8007800: 6022 strmi r2, [r4, #0] 8007802: b91b cbnz r3, 800780c <_printf_i+0x178> 8007804: 6822 ldr r2, [r4, #0] 8007806: f022 0220 bic.w r2, r2, #32 800780a: 6022 str r2, [r4, #0] 800780c: 2210 movs r2, #16 800780e: e7b1 b.n 8007774 <_printf_i+0xe0> 8007810: 4675 mov r5, lr 8007812: fbb3 f0f2 udiv r0, r3, r2 8007816: fb02 3310 mls r3, r2, r0, r3 800781a: 5ccb ldrb r3, [r1, r3] 800781c: f805 3d01 strb.w r3, [r5, #-1]! 8007820: 4603 mov r3, r0 8007822: 2800 cmp r0, #0 8007824: d1f5 bne.n 8007812 <_printf_i+0x17e> 8007826: e7b7 b.n 8007798 <_printf_i+0x104> 8007828: 6808 ldr r0, [r1, #0] 800782a: 681a ldr r2, [r3, #0] 800782c: f010 0f80 tst.w r0, #128 ; 0x80 8007830: 6949 ldr r1, [r1, #20] 8007832: d004 beq.n 800783e <_printf_i+0x1aa> 8007834: 1d10 adds r0, r2, #4 8007836: 6018 str r0, [r3, #0] 8007838: 6813 ldr r3, [r2, #0] 800783a: 6019 str r1, [r3, #0] 800783c: e007 b.n 800784e <_printf_i+0x1ba> 800783e: f010 0f40 tst.w r0, #64 ; 0x40 8007842: f102 0004 add.w r0, r2, #4 8007846: 6018 str r0, [r3, #0] 8007848: 6813 ldr r3, [r2, #0] 800784a: d0f6 beq.n 800783a <_printf_i+0x1a6> 800784c: 8019 strh r1, [r3, #0] 800784e: 2300 movs r3, #0 8007850: 4675 mov r5, lr 8007852: 6123 str r3, [r4, #16] 8007854: e7b1 b.n 80077ba <_printf_i+0x126> 8007856: 681a ldr r2, [r3, #0] 8007858: 1d11 adds r1, r2, #4 800785a: 6019 str r1, [r3, #0] 800785c: 6815 ldr r5, [r2, #0] 800785e: 2100 movs r1, #0 8007860: 6862 ldr r2, [r4, #4] 8007862: 4628 mov r0, r5 8007864: f000 f8e0 bl 8007a28 8007868: b108 cbz r0, 800786e <_printf_i+0x1da> 800786a: 1b40 subs r0, r0, r5 800786c: 6060 str r0, [r4, #4] 800786e: 6863 ldr r3, [r4, #4] 8007870: 6123 str r3, [r4, #16] 8007872: 2300 movs r3, #0 8007874: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007878: e79f b.n 80077ba <_printf_i+0x126> 800787a: 6923 ldr r3, [r4, #16] 800787c: 462a mov r2, r5 800787e: 4639 mov r1, r7 8007880: 4630 mov r0, r6 8007882: 47c0 blx r8 8007884: 3001 adds r0, #1 8007886: d0a2 beq.n 80077ce <_printf_i+0x13a> 8007888: 6823 ldr r3, [r4, #0] 800788a: 079b lsls r3, r3, #30 800788c: d507 bpl.n 800789e <_printf_i+0x20a> 800788e: 2500 movs r5, #0 8007890: f104 0919 add.w r9, r4, #25 8007894: 68e3 ldr r3, [r4, #12] 8007896: 9a03 ldr r2, [sp, #12] 8007898: 1a9b subs r3, r3, r2 800789a: 429d cmp r5, r3 800789c: db05 blt.n 80078aa <_printf_i+0x216> 800789e: 68e0 ldr r0, [r4, #12] 80078a0: 9b03 ldr r3, [sp, #12] 80078a2: 4298 cmp r0, r3 80078a4: bfb8 it lt 80078a6: 4618 movlt r0, r3 80078a8: e793 b.n 80077d2 <_printf_i+0x13e> 80078aa: 2301 movs r3, #1 80078ac: 464a mov r2, r9 80078ae: 4639 mov r1, r7 80078b0: 4630 mov r0, r6 80078b2: 47c0 blx r8 80078b4: 3001 adds r0, #1 80078b6: d08a beq.n 80077ce <_printf_i+0x13a> 80078b8: 3501 adds r5, #1 80078ba: e7eb b.n 8007894 <_printf_i+0x200> 80078bc: 2b00 cmp r3, #0 80078be: d1a7 bne.n 8007810 <_printf_i+0x17c> 80078c0: 780b ldrb r3, [r1, #0] 80078c2: f104 0542 add.w r5, r4, #66 ; 0x42 80078c6: f884 3042 strb.w r3, [r4, #66] ; 0x42 80078ca: e765 b.n 8007798 <_printf_i+0x104> 80078cc: 08007cd6 .word 0x08007cd6 80078d0: 08007cc5 .word 0x08007cc5 080078d4 <_sbrk_r>: 80078d4: b538 push {r3, r4, r5, lr} 80078d6: 2300 movs r3, #0 80078d8: 4c05 ldr r4, [pc, #20] ; (80078f0 <_sbrk_r+0x1c>) 80078da: 4605 mov r5, r0 80078dc: 4608 mov r0, r1 80078de: 6023 str r3, [r4, #0] 80078e0: f000 f8ec bl 8007abc <_sbrk> 80078e4: 1c43 adds r3, r0, #1 80078e6: d102 bne.n 80078ee <_sbrk_r+0x1a> 80078e8: 6823 ldr r3, [r4, #0] 80078ea: b103 cbz r3, 80078ee <_sbrk_r+0x1a> 80078ec: 602b str r3, [r5, #0] 80078ee: bd38 pop {r3, r4, r5, pc} 80078f0: 20000518 .word 0x20000518 080078f4 <__sread>: 80078f4: b510 push {r4, lr} 80078f6: 460c mov r4, r1 80078f8: f9b1 100e ldrsh.w r1, [r1, #14] 80078fc: f000 f8a4 bl 8007a48 <_read_r> 8007900: 2800 cmp r0, #0 8007902: bfab itete ge 8007904: 6d63 ldrge r3, [r4, #84] ; 0x54 8007906: 89a3 ldrhlt r3, [r4, #12] 8007908: 181b addge r3, r3, r0 800790a: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 800790e: bfac ite ge 8007910: 6563 strge r3, [r4, #84] ; 0x54 8007912: 81a3 strhlt r3, [r4, #12] 8007914: bd10 pop {r4, pc} 08007916 <__swrite>: 8007916: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800791a: 461f mov r7, r3 800791c: 898b ldrh r3, [r1, #12] 800791e: 4605 mov r5, r0 8007920: 05db lsls r3, r3, #23 8007922: 460c mov r4, r1 8007924: 4616 mov r6, r2 8007926: d505 bpl.n 8007934 <__swrite+0x1e> 8007928: 2302 movs r3, #2 800792a: 2200 movs r2, #0 800792c: f9b1 100e ldrsh.w r1, [r1, #14] 8007930: f000 f868 bl 8007a04 <_lseek_r> 8007934: 89a3 ldrh r3, [r4, #12] 8007936: 4632 mov r2, r6 8007938: f423 5380 bic.w r3, r3, #4096 ; 0x1000 800793c: 81a3 strh r3, [r4, #12] 800793e: f9b4 100e ldrsh.w r1, [r4, #14] 8007942: 463b mov r3, r7 8007944: 4628 mov r0, r5 8007946: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800794a: f000 b817 b.w 800797c <_write_r> 0800794e <__sseek>: 800794e: b510 push {r4, lr} 8007950: 460c mov r4, r1 8007952: f9b1 100e ldrsh.w r1, [r1, #14] 8007956: f000 f855 bl 8007a04 <_lseek_r> 800795a: 1c43 adds r3, r0, #1 800795c: 89a3 ldrh r3, [r4, #12] 800795e: bf15 itete ne 8007960: 6560 strne r0, [r4, #84] ; 0x54 8007962: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8007966: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800796a: 81a3 strheq r3, [r4, #12] 800796c: bf18 it ne 800796e: 81a3 strhne r3, [r4, #12] 8007970: bd10 pop {r4, pc} 08007972 <__sclose>: 8007972: f9b1 100e ldrsh.w r1, [r1, #14] 8007976: f000 b813 b.w 80079a0 <_close_r> ... 0800797c <_write_r>: 800797c: b538 push {r3, r4, r5, lr} 800797e: 4605 mov r5, r0 8007980: 4608 mov r0, r1 8007982: 4611 mov r1, r2 8007984: 2200 movs r2, #0 8007986: 4c05 ldr r4, [pc, #20] ; (800799c <_write_r+0x20>) 8007988: 6022 str r2, [r4, #0] 800798a: 461a mov r2, r3 800798c: f7fe fa90 bl 8005eb0 <_write> 8007990: 1c43 adds r3, r0, #1 8007992: d102 bne.n 800799a <_write_r+0x1e> 8007994: 6823 ldr r3, [r4, #0] 8007996: b103 cbz r3, 800799a <_write_r+0x1e> 8007998: 602b str r3, [r5, #0] 800799a: bd38 pop {r3, r4, r5, pc} 800799c: 20000518 .word 0x20000518 080079a0 <_close_r>: 80079a0: b538 push {r3, r4, r5, lr} 80079a2: 2300 movs r3, #0 80079a4: 4c05 ldr r4, [pc, #20] ; (80079bc <_close_r+0x1c>) 80079a6: 4605 mov r5, r0 80079a8: 4608 mov r0, r1 80079aa: 6023 str r3, [r4, #0] 80079ac: f000 f85e bl 8007a6c <_close> 80079b0: 1c43 adds r3, r0, #1 80079b2: d102 bne.n 80079ba <_close_r+0x1a> 80079b4: 6823 ldr r3, [r4, #0] 80079b6: b103 cbz r3, 80079ba <_close_r+0x1a> 80079b8: 602b str r3, [r5, #0] 80079ba: bd38 pop {r3, r4, r5, pc} 80079bc: 20000518 .word 0x20000518 080079c0 <_fstat_r>: 80079c0: b538 push {r3, r4, r5, lr} 80079c2: 2300 movs r3, #0 80079c4: 4c06 ldr r4, [pc, #24] ; (80079e0 <_fstat_r+0x20>) 80079c6: 4605 mov r5, r0 80079c8: 4608 mov r0, r1 80079ca: 4611 mov r1, r2 80079cc: 6023 str r3, [r4, #0] 80079ce: f000 f855 bl 8007a7c <_fstat> 80079d2: 1c43 adds r3, r0, #1 80079d4: d102 bne.n 80079dc <_fstat_r+0x1c> 80079d6: 6823 ldr r3, [r4, #0] 80079d8: b103 cbz r3, 80079dc <_fstat_r+0x1c> 80079da: 602b str r3, [r5, #0] 80079dc: bd38 pop {r3, r4, r5, pc} 80079de: bf00 nop 80079e0: 20000518 .word 0x20000518 080079e4 <_isatty_r>: 80079e4: b538 push {r3, r4, r5, lr} 80079e6: 2300 movs r3, #0 80079e8: 4c05 ldr r4, [pc, #20] ; (8007a00 <_isatty_r+0x1c>) 80079ea: 4605 mov r5, r0 80079ec: 4608 mov r0, r1 80079ee: 6023 str r3, [r4, #0] 80079f0: f000 f84c bl 8007a8c <_isatty> 80079f4: 1c43 adds r3, r0, #1 80079f6: d102 bne.n 80079fe <_isatty_r+0x1a> 80079f8: 6823 ldr r3, [r4, #0] 80079fa: b103 cbz r3, 80079fe <_isatty_r+0x1a> 80079fc: 602b str r3, [r5, #0] 80079fe: bd38 pop {r3, r4, r5, pc} 8007a00: 20000518 .word 0x20000518 08007a04 <_lseek_r>: 8007a04: b538 push {r3, r4, r5, lr} 8007a06: 4605 mov r5, r0 8007a08: 4608 mov r0, r1 8007a0a: 4611 mov r1, r2 8007a0c: 2200 movs r2, #0 8007a0e: 4c05 ldr r4, [pc, #20] ; (8007a24 <_lseek_r+0x20>) 8007a10: 6022 str r2, [r4, #0] 8007a12: 461a mov r2, r3 8007a14: f000 f842 bl 8007a9c <_lseek> 8007a18: 1c43 adds r3, r0, #1 8007a1a: d102 bne.n 8007a22 <_lseek_r+0x1e> 8007a1c: 6823 ldr r3, [r4, #0] 8007a1e: b103 cbz r3, 8007a22 <_lseek_r+0x1e> 8007a20: 602b str r3, [r5, #0] 8007a22: bd38 pop {r3, r4, r5, pc} 8007a24: 20000518 .word 0x20000518 08007a28 : 8007a28: b510 push {r4, lr} 8007a2a: b2c9 uxtb r1, r1 8007a2c: 4402 add r2, r0 8007a2e: 4290 cmp r0, r2 8007a30: 4603 mov r3, r0 8007a32: d101 bne.n 8007a38 8007a34: 2000 movs r0, #0 8007a36: bd10 pop {r4, pc} 8007a38: 781c ldrb r4, [r3, #0] 8007a3a: 3001 adds r0, #1 8007a3c: 428c cmp r4, r1 8007a3e: d1f6 bne.n 8007a2e 8007a40: 4618 mov r0, r3 8007a42: bd10 pop {r4, pc} 08007a44 <__malloc_lock>: 8007a44: 4770 bx lr 08007a46 <__malloc_unlock>: 8007a46: 4770 bx lr 08007a48 <_read_r>: 8007a48: b538 push {r3, r4, r5, lr} 8007a4a: 4605 mov r5, r0 8007a4c: 4608 mov r0, r1 8007a4e: 4611 mov r1, r2 8007a50: 2200 movs r2, #0 8007a52: 4c05 ldr r4, [pc, #20] ; (8007a68 <_read_r+0x20>) 8007a54: 6022 str r2, [r4, #0] 8007a56: 461a mov r2, r3 8007a58: f000 f828 bl 8007aac <_read> 8007a5c: 1c43 adds r3, r0, #1 8007a5e: d102 bne.n 8007a66 <_read_r+0x1e> 8007a60: 6823 ldr r3, [r4, #0] 8007a62: b103 cbz r3, 8007a66 <_read_r+0x1e> 8007a64: 602b str r3, [r5, #0] 8007a66: bd38 pop {r3, r4, r5, pc} 8007a68: 20000518 .word 0x20000518 08007a6c <_close>: 8007a6c: 2258 movs r2, #88 ; 0x58 8007a6e: 4b02 ldr r3, [pc, #8] ; (8007a78 <_close+0xc>) 8007a70: f04f 30ff mov.w r0, #4294967295 8007a74: 601a str r2, [r3, #0] 8007a76: 4770 bx lr 8007a78: 20000518 .word 0x20000518 08007a7c <_fstat>: 8007a7c: 2258 movs r2, #88 ; 0x58 8007a7e: 4b02 ldr r3, [pc, #8] ; (8007a88 <_fstat+0xc>) 8007a80: f04f 30ff mov.w r0, #4294967295 8007a84: 601a str r2, [r3, #0] 8007a86: 4770 bx lr 8007a88: 20000518 .word 0x20000518 08007a8c <_isatty>: 8007a8c: 2258 movs r2, #88 ; 0x58 8007a8e: 4b02 ldr r3, [pc, #8] ; (8007a98 <_isatty+0xc>) 8007a90: 2000 movs r0, #0 8007a92: 601a str r2, [r3, #0] 8007a94: 4770 bx lr 8007a96: bf00 nop 8007a98: 20000518 .word 0x20000518 08007a9c <_lseek>: 8007a9c: 2258 movs r2, #88 ; 0x58 8007a9e: 4b02 ldr r3, [pc, #8] ; (8007aa8 <_lseek+0xc>) 8007aa0: f04f 30ff mov.w r0, #4294967295 8007aa4: 601a str r2, [r3, #0] 8007aa6: 4770 bx lr 8007aa8: 20000518 .word 0x20000518 08007aac <_read>: 8007aac: 2258 movs r2, #88 ; 0x58 8007aae: 4b02 ldr r3, [pc, #8] ; (8007ab8 <_read+0xc>) 8007ab0: f04f 30ff mov.w r0, #4294967295 8007ab4: 601a str r2, [r3, #0] 8007ab6: 4770 bx lr 8007ab8: 20000518 .word 0x20000518 08007abc <_sbrk>: 8007abc: 4b04 ldr r3, [pc, #16] ; (8007ad0 <_sbrk+0x14>) 8007abe: 4602 mov r2, r0 8007ac0: 6819 ldr r1, [r3, #0] 8007ac2: b909 cbnz r1, 8007ac8 <_sbrk+0xc> 8007ac4: 4903 ldr r1, [pc, #12] ; (8007ad4 <_sbrk+0x18>) 8007ac6: 6019 str r1, [r3, #0] 8007ac8: 6818 ldr r0, [r3, #0] 8007aca: 4402 add r2, r0 8007acc: 601a str r2, [r3, #0] 8007ace: 4770 bx lr 8007ad0: 200001ec .word 0x200001ec 8007ad4: 2000051c .word 0x2000051c 08007ad8 <_init>: 8007ad8: b5f8 push {r3, r4, r5, r6, r7, lr} 8007ada: bf00 nop 8007adc: bcf8 pop {r3, r4, r5, r6, r7} 8007ade: bc08 pop {r3} 8007ae0: 469e mov lr, r3 8007ae2: 4770 bx lr 08007ae4 <_fini>: 8007ae4: b5f8 push {r3, r4, r5, r6, r7, lr} 8007ae6: bf00 nop 8007ae8: bcf8 pop {r3, r4, r5, r6, r7} 8007aea: bc08 pop {r3} 8007aec: 469e mov lr, r3 8007aee: 4770 bx lr