STM32F103_RGB_Controller.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000384c 080041e4 080041e4 000041e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000001c8 08007a30 08007a30 00007a30 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08007bf8 08007bf8 00007bf8 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08007bfc 08007bfc 00007bfc 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000070 20000000 08007c00 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00000504 20000070 08007c70 00010070 2**3 ALLOC 7 ._user_heap_stack 00000600 20000574 08007c70 00010574 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00010070 2**0 CONTENTS, READONLY 9 .debug_info 0001e446 00000000 00000000 00010099 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00003b00 00000000 00000000 0002e4df 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000a7b0 00000000 00000000 00031fdf 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000ce8 00000000 00000000 0003c790 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00001368 00000000 00000000 0003d478 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 000085ec 00000000 00000000 0003e7e0 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004b4a 00000000 00000000 00046dcc 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0004b916 2**0 CONTENTS, READONLY 17 .debug_frame 00002fac 00000000 00000000 0004b994 2**2 CONTENTS, READONLY, DEBUGGING 18 .stab 00000084 00000000 00000000 0004e940 2**2 CONTENTS, READONLY, DEBUGGING 19 .stabstr 00000117 00000000 00000000 0004e9c4 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080041e4 <__do_global_dtors_aux>: 80041e4: b510 push {r4, lr} 80041e6: 4c05 ldr r4, [pc, #20] ; (80041fc <__do_global_dtors_aux+0x18>) 80041e8: 7823 ldrb r3, [r4, #0] 80041ea: b933 cbnz r3, 80041fa <__do_global_dtors_aux+0x16> 80041ec: 4b04 ldr r3, [pc, #16] ; (8004200 <__do_global_dtors_aux+0x1c>) 80041ee: b113 cbz r3, 80041f6 <__do_global_dtors_aux+0x12> 80041f0: 4804 ldr r0, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x20>) 80041f2: f3af 8000 nop.w 80041f6: 2301 movs r3, #1 80041f8: 7023 strb r3, [r4, #0] 80041fa: bd10 pop {r4, pc} 80041fc: 20000070 .word 0x20000070 8004200: 00000000 .word 0x00000000 8004204: 08007a18 .word 0x08007a18 08004208 : 8004208: b508 push {r3, lr} 800420a: 4b03 ldr r3, [pc, #12] ; (8004218 ) 800420c: b11b cbz r3, 8004216 800420e: 4903 ldr r1, [pc, #12] ; (800421c ) 8004210: 4803 ldr r0, [pc, #12] ; (8004220 ) 8004212: f3af 8000 nop.w 8004216: bd08 pop {r3, pc} 8004218: 00000000 .word 0x00000000 800421c: 20000074 .word 0x20000074 8004220: 08007a18 .word 0x08007a18 08004224 <__aeabi_llsr>: 8004224: 40d0 lsrs r0, r2 8004226: 1c0b adds r3, r1, #0 8004228: 40d1 lsrs r1, r2 800422a: 469c mov ip, r3 800422c: 3a20 subs r2, #32 800422e: 40d3 lsrs r3, r2 8004230: 4318 orrs r0, r3 8004232: 4252 negs r2, r2 8004234: 4663 mov r3, ip 8004236: 4093 lsls r3, r2 8004238: 4318 orrs r0, r3 800423a: 4770 bx lr 0800423c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800423c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800423e: 4b0e ldr r3, [pc, #56] ; (8004278 ) { 8004240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8004242: 7818 ldrb r0, [r3, #0] 8004244: f44f 737a mov.w r3, #1000 ; 0x3e8 8004248: fbb3 f3f0 udiv r3, r3, r0 800424c: 4a0b ldr r2, [pc, #44] ; (800427c ) 800424e: 6810 ldr r0, [r2, #0] 8004250: fbb0 f0f3 udiv r0, r0, r3 8004254: f000 f89e bl 8004394 8004258: 4604 mov r4, r0 800425a: b958 cbnz r0, 8004274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800425c: 2d0f cmp r5, #15 800425e: d809 bhi.n 8004274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8004260: 4602 mov r2, r0 8004262: 4629 mov r1, r5 8004264: f04f 30ff mov.w r0, #4294967295 8004268: f000 f854 bl 8004314 uwTickPrio = TickPriority; 800426c: 4b04 ldr r3, [pc, #16] ; (8004280 ) 800426e: 4620 mov r0, r4 8004270: 601d str r5, [r3, #0] 8004272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8004274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8004276: bd38 pop {r3, r4, r5, pc} 8004278: 20000000 .word 0x20000000 800427c: 20000008 .word 0x20000008 8004280: 20000004 .word 0x20000004 08004284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004284: 4a07 ldr r2, [pc, #28] ; (80042a4 ) { 8004286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800428a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800428c: f043 0310 orr.w r3, r3, #16 8004290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8004292: f000 f82d bl 80042f0 HAL_InitTick(TICK_INT_PRIORITY); 8004296: 2000 movs r0, #0 8004298: f7ff ffd0 bl 800423c HAL_MspInit(); 800429c: f002 f9f6 bl 800668c } 80042a0: 2000 movs r0, #0 80042a2: bd08 pop {r3, pc} 80042a4: 40022000 .word 0x40022000 080042a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80042a8: 4a03 ldr r2, [pc, #12] ; (80042b8 ) 80042aa: 4b04 ldr r3, [pc, #16] ; (80042bc ) 80042ac: 6811 ldr r1, [r2, #0] 80042ae: 781b ldrb r3, [r3, #0] 80042b0: 440b add r3, r1 80042b2: 6013 str r3, [r2, #0] 80042b4: 4770 bx lr 80042b6: bf00 nop 80042b8: 200002b8 .word 0x200002b8 80042bc: 20000000 .word 0x20000000 080042c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80042c0: 4b01 ldr r3, [pc, #4] ; (80042c8 ) 80042c2: 6818 ldr r0, [r3, #0] } 80042c4: 4770 bx lr 80042c6: bf00 nop 80042c8: 200002b8 .word 0x200002b8 080042cc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80042cc: b538 push {r3, r4, r5, lr} 80042ce: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80042d0: f7ff fff6 bl 80042c0 80042d4: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80042d6: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80042d8: bf1e ittt ne 80042da: 4b04 ldrne r3, [pc, #16] ; (80042ec ) 80042dc: 781b ldrbne r3, [r3, #0] 80042de: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80042e0: f7ff ffee bl 80042c0 80042e4: 1b40 subs r0, r0, r5 80042e6: 4284 cmp r4, r0 80042e8: d8fa bhi.n 80042e0 { } } 80042ea: bd38 pop {r3, r4, r5, pc} 80042ec: 20000000 .word 0x20000000 080042f0 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80042f0: 4a07 ldr r2, [pc, #28] ; (8004310 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042f2: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80042f4: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042f6: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80042fa: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80042fe: 041b lsls r3, r3, #16 8004300: 0c1b lsrs r3, r3, #16 8004302: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8004306: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800430a: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 800430c: 60d3 str r3, [r2, #12] 800430e: 4770 bx lr 8004310: e000ed00 .word 0xe000ed00 08004314 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8004314: 4b17 ldr r3, [pc, #92] ; (8004374 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8004316: b530 push {r4, r5, lr} 8004318: 68dc ldr r4, [r3, #12] 800431a: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800431e: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004322: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8004324: 2b04 cmp r3, #4 8004326: bf28 it cs 8004328: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800432a: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800432c: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004330: bf98 it ls 8004332: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004334: fa05 f303 lsl.w r3, r5, r3 8004338: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800433c: bf88 it hi 800433e: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004340: 4019 ands r1, r3 8004342: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8004344: fa05 f404 lsl.w r4, r5, r4 8004348: 3c01 subs r4, #1 800434a: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 800434c: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800434e: ea42 0201 orr.w r2, r2, r1 8004352: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004356: bfaf iteee ge 8004358: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800435c: 4b06 ldrlt r3, [pc, #24] ; (8004378 ) 800435e: f000 000f andlt.w r0, r0, #15 8004362: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004364: bfa5 ittet ge 8004366: b2d2 uxtbge r2, r2 8004368: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800436c: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800436e: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8004372: bd30 pop {r4, r5, pc} 8004374: e000ed00 .word 0xe000ed00 8004378: e000ed14 .word 0xe000ed14 0800437c : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 800437c: 2301 movs r3, #1 800437e: 0942 lsrs r2, r0, #5 8004380: f000 001f and.w r0, r0, #31 8004384: fa03 f000 lsl.w r0, r3, r0 8004388: 4b01 ldr r3, [pc, #4] ; (8004390 ) 800438a: f843 0022 str.w r0, [r3, r2, lsl #2] 800438e: 4770 bx lr 8004390: e000e100 .word 0xe000e100 08004394 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8004394: 3801 subs r0, #1 8004396: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 800439a: d20a bcs.n 80043b2 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800439c: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800439e: 4b06 ldr r3, [pc, #24] ; (80043b8 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80043a0: 4a06 ldr r2, [pc, #24] ; (80043bc ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80043a2: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80043a4: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80043a8: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80043aa: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80043ac: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80043ae: 601a str r2, [r3, #0] 80043b0: 4770 bx lr return (1UL); /* Reload value impossible */ 80043b2: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80043b4: 4770 bx lr 80043b6: bf00 nop 80043b8: e000e010 .word 0xe000e010 80043bc: e000ed00 .word 0xe000ed00 080043c0 : */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { HAL_StatusTypeDef status = HAL_OK; if(HAL_DMA_STATE_BUSY != hdma->State) 80043c0: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80043c4: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80043c6: 2b02 cmp r3, #2 80043c8: d003 beq.n 80043d2 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80043ca: 2304 movs r3, #4 80043cc: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80043ce: 2001 movs r0, #1 80043d0: bd10 pop {r4, pc} } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80043d2: 6803 ldr r3, [r0, #0] 80043d4: 681a ldr r2, [r3, #0] 80043d6: f022 020e bic.w r2, r2, #14 80043da: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80043dc: 681a ldr r2, [r3, #0] 80043de: f022 0201 bic.w r2, r2, #1 80043e2: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80043e4: 4a29 ldr r2, [pc, #164] ; (800448c ) 80043e6: 4293 cmp r3, r2 80043e8: d924 bls.n 8004434 80043ea: f502 7262 add.w r2, r2, #904 ; 0x388 80043ee: 4293 cmp r3, r2 80043f0: d019 beq.n 8004426 80043f2: 3214 adds r2, #20 80043f4: 4293 cmp r3, r2 80043f6: d018 beq.n 800442a 80043f8: 3214 adds r2, #20 80043fa: 4293 cmp r3, r2 80043fc: d017 beq.n 800442e 80043fe: 3214 adds r2, #20 8004400: 4293 cmp r3, r2 8004402: bf0c ite eq 8004404: f44f 5380 moveq.w r3, #4096 ; 0x1000 8004408: f44f 3380 movne.w r3, #65536 ; 0x10000 800440c: 4a20 ldr r2, [pc, #128] ; (8004490 ) 800440e: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004410: 2301 movs r3, #1 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004412: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8004414: f880 3021 strb.w r3, [r0, #33] ; 0x21 /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8004418: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 800441a: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 800441e: b39b cbz r3, 8004488 { hdma->XferAbortCallback(hdma); 8004420: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8004422: 4620 mov r0, r4 8004424: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8004426: 2301 movs r3, #1 8004428: e7f0 b.n 800440c 800442a: 2310 movs r3, #16 800442c: e7ee b.n 800440c 800442e: f44f 7380 mov.w r3, #256 ; 0x100 8004432: e7eb b.n 800440c 8004434: 4917 ldr r1, [pc, #92] ; (8004494 ) 8004436: 428b cmp r3, r1 8004438: d016 beq.n 8004468 800443a: 3114 adds r1, #20 800443c: 428b cmp r3, r1 800443e: d015 beq.n 800446c 8004440: 3114 adds r1, #20 8004442: 428b cmp r3, r1 8004444: d014 beq.n 8004470 8004446: 3114 adds r1, #20 8004448: 428b cmp r3, r1 800444a: d014 beq.n 8004476 800444c: 3114 adds r1, #20 800444e: 428b cmp r3, r1 8004450: d014 beq.n 800447c 8004452: 3114 adds r1, #20 8004454: 428b cmp r3, r1 8004456: d014 beq.n 8004482 8004458: 4293 cmp r3, r2 800445a: bf14 ite ne 800445c: f44f 3380 movne.w r3, #65536 ; 0x10000 8004460: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8004464: 4a0c ldr r2, [pc, #48] ; (8004498 ) 8004466: e7d2 b.n 800440e 8004468: 2301 movs r3, #1 800446a: e7fb b.n 8004464 800446c: 2310 movs r3, #16 800446e: e7f9 b.n 8004464 8004470: f44f 7380 mov.w r3, #256 ; 0x100 8004474: e7f6 b.n 8004464 8004476: f44f 5380 mov.w r3, #4096 ; 0x1000 800447a: e7f3 b.n 8004464 800447c: f44f 3380 mov.w r3, #65536 ; 0x10000 8004480: e7f0 b.n 8004464 8004482: f44f 1380 mov.w r3, #1048576 ; 0x100000 8004486: e7ed b.n 8004464 HAL_StatusTypeDef status = HAL_OK; 8004488: 4618 mov r0, r3 } } return status; } 800448a: bd10 pop {r4, pc} 800448c: 40020080 .word 0x40020080 8004490: 40020400 .word 0x40020400 8004494: 40020008 .word 0x40020008 8004498: 40020000 .word 0x40020000 0800449c : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800449c: 4a11 ldr r2, [pc, #68] ; (80044e4 ) 800449e: 68d3 ldr r3, [r2, #12] 80044a0: f013 0310 ands.w r3, r3, #16 80044a4: d005 beq.n 80044b2 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 80044a6: 4910 ldr r1, [pc, #64] ; (80044e8 ) 80044a8: 69cb ldr r3, [r1, #28] 80044aa: f043 0302 orr.w r3, r3, #2 80044ae: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 80044b0: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80044b2: 68d2 ldr r2, [r2, #12] 80044b4: 0750 lsls r0, r2, #29 80044b6: d506 bpl.n 80044c6 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80044b8: 490b ldr r1, [pc, #44] ; (80044e8 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 80044ba: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80044be: 69ca ldr r2, [r1, #28] 80044c0: f042 0201 orr.w r2, r2, #1 80044c4: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 80044c6: 4a07 ldr r2, [pc, #28] ; (80044e4 ) 80044c8: 69d1 ldr r1, [r2, #28] 80044ca: 07c9 lsls r1, r1, #31 80044cc: d508 bpl.n 80044e0 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 80044ce: 4806 ldr r0, [pc, #24] ; (80044e8 ) 80044d0: 69c1 ldr r1, [r0, #28] 80044d2: f041 0104 orr.w r1, r1, #4 80044d6: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 80044d8: 69d1 ldr r1, [r2, #28] 80044da: f021 0101 bic.w r1, r1, #1 80044de: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 80044e0: 60d3 str r3, [r2, #12] 80044e2: 4770 bx lr 80044e4: 40022000 .word 0x40022000 80044e8: 200002c0 .word 0x200002c0 080044ec : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80044ec: 4b06 ldr r3, [pc, #24] ; (8004508 ) 80044ee: 6918 ldr r0, [r3, #16] 80044f0: f010 0080 ands.w r0, r0, #128 ; 0x80 80044f4: d007 beq.n 8004506 WRITE_REG(FLASH->KEYR, FLASH_KEY1); 80044f6: 4a05 ldr r2, [pc, #20] ; (800450c ) 80044f8: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 80044fa: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 80044fe: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8004500: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8004502: f3c0 10c0 ubfx r0, r0, #7, #1 } 8004506: 4770 bx lr 8004508: 40022000 .word 0x40022000 800450c: 45670123 .word 0x45670123 08004510 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8004510: 4a03 ldr r2, [pc, #12] ; (8004520 ) } 8004512: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8004514: 6913 ldr r3, [r2, #16] 8004516: f043 0380 orr.w r3, r3, #128 ; 0x80 800451a: 6113 str r3, [r2, #16] } 800451c: 4770 bx lr 800451e: bf00 nop 8004520: 40022000 .word 0x40022000 08004524 : { 8004524: b5f8 push {r3, r4, r5, r6, r7, lr} 8004526: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 8004528: f7ff feca bl 80042c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 800452c: 4c11 ldr r4, [pc, #68] ; (8004574 ) uint32_t tickstart = HAL_GetTick(); 800452e: 4607 mov r7, r0 8004530: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8004532: 68e3 ldr r3, [r4, #12] 8004534: 07d8 lsls r0, r3, #31 8004536: d412 bmi.n 800455e if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8004538: 68e3 ldr r3, [r4, #12] 800453a: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 800453c: bf44 itt mi 800453e: 2320 movmi r3, #32 8004540: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8004542: 68eb ldr r3, [r5, #12] 8004544: 06da lsls r2, r3, #27 8004546: d406 bmi.n 8004556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8004548: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 800454a: 07db lsls r3, r3, #31 800454c: d403 bmi.n 8004556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800454e: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8004550: f010 0004 ands.w r0, r0, #4 8004554: d002 beq.n 800455c FLASH_SetErrorCode(); 8004556: f7ff ffa1 bl 800449c return HAL_ERROR; 800455a: 2001 movs r0, #1 } 800455c: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 800455e: 1c73 adds r3, r6, #1 8004560: d0e7 beq.n 8004532 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8004562: b90e cbnz r6, 8004568 return HAL_TIMEOUT; 8004564: 2003 movs r0, #3 8004566: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8004568: f7ff feaa bl 80042c0 800456c: 1bc0 subs r0, r0, r7 800456e: 4286 cmp r6, r0 8004570: d2df bcs.n 8004532 8004572: e7f7 b.n 8004564 8004574: 40022000 .word 0x40022000 08004578 : { 8004578: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 800457c: 4c1f ldr r4, [pc, #124] ; (80045fc ) { 800457e: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8004580: 7e23 ldrb r3, [r4, #24] { 8004582: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8004584: 2b01 cmp r3, #1 { 8004586: 460f mov r7, r1 8004588: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800458a: d033 beq.n 80045f4 800458c: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800458e: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8004592: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8004594: f7ff ffc6 bl 8004524 if(status == HAL_OK) 8004598: bb40 cbnz r0, 80045ec if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800459a: 2d01 cmp r5, #1 800459c: d003 beq.n 80045a6 nbiterations = 4U; 800459e: 2d02 cmp r5, #2 80045a0: bf0c ite eq 80045a2: 2502 moveq r5, #2 80045a4: 2504 movne r5, #4 80045a6: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80045a8: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 80045aa: f8df b054 ldr.w fp, [pc, #84] ; 8004600 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80045ae: 0132 lsls r2, r6, #4 80045b0: 4640 mov r0, r8 80045b2: 4649 mov r1, r9 80045b4: f7ff fe36 bl 8004224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80045b8: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 80045bc: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80045c0: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 80045c2: f043 0301 orr.w r3, r3, #1 80045c6: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 80045ca: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 80045ce: f24c 3050 movw r0, #50000 ; 0xc350 80045d2: f7ff ffa7 bl 8004524 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 80045d6: f8db 3010 ldr.w r3, [fp, #16] 80045da: f023 0301 bic.w r3, r3, #1 80045de: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 80045e2: b918 cbnz r0, 80045ec 80045e4: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 80045e6: b2f3 uxtb r3, r6 80045e8: 429d cmp r5, r3 80045ea: d8e0 bhi.n 80045ae __HAL_UNLOCK(&pFlash); 80045ec: 2300 movs r3, #0 80045ee: 7623 strb r3, [r4, #24] return status; 80045f0: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 80045f4: 2002 movs r0, #2 } 80045f6: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80045fa: bf00 nop 80045fc: 200002c0 .word 0x200002c0 8004600: 40022000 .word 0x40022000 08004604 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8004604: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 8004608: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800460a: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 800460c: 4f6c ldr r7, [pc, #432] ; (80047c0 ) 800460e: 4b6d ldr r3, [pc, #436] ; (80047c4 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8004610: f8df e1b8 ldr.w lr, [pc, #440] ; 80047cc switch (GPIO_Init->Mode) 8004614: f8df c1b8 ldr.w ip, [pc, #440] ; 80047d0 ioposition = (0x01U << position); 8004618: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 800461c: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 800461e: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8004622: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 8004626: 45a0 cmp r8, r4 8004628: f040 8085 bne.w 8004736 switch (GPIO_Init->Mode) 800462c: 684d ldr r5, [r1, #4] 800462e: 2d12 cmp r5, #18 8004630: f000 80b7 beq.w 80047a2 8004634: f200 808d bhi.w 8004752 8004638: 2d02 cmp r5, #2 800463a: f000 80af beq.w 800479c 800463e: f200 8081 bhi.w 8004744 8004642: 2d00 cmp r5, #0 8004644: f000 8091 beq.w 800476a 8004648: 2d01 cmp r5, #1 800464a: f000 80a5 beq.w 8004798 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800464e: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004652: 2cff cmp r4, #255 ; 0xff 8004654: bf93 iteet ls 8004656: 4682 movls sl, r0 8004658: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 800465c: 3d08 subhi r5, #8 800465e: f8d0 b000 ldrls.w fp, [r0] 8004662: bf92 itee ls 8004664: 00b5 lslls r5, r6, #2 8004666: f8d0 b004 ldrhi.w fp, [r0, #4] 800466a: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800466c: fa09 f805 lsl.w r8, r9, r5 8004670: ea2b 0808 bic.w r8, fp, r8 8004674: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004678: bf88 it hi 800467a: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800467e: ea48 0505 orr.w r5, r8, r5 8004682: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8004686: f8d1 a004 ldr.w sl, [r1, #4] 800468a: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 800468e: d052 beq.n 8004736 __HAL_RCC_AFIO_CLK_ENABLE(); 8004690: 69bd ldr r5, [r7, #24] 8004692: f026 0803 bic.w r8, r6, #3 8004696: f045 0501 orr.w r5, r5, #1 800469a: 61bd str r5, [r7, #24] 800469c: 69bd ldr r5, [r7, #24] 800469e: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 80046a2: f005 0501 and.w r5, r5, #1 80046a6: 9501 str r5, [sp, #4] 80046a8: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046ac: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 80046b0: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046b2: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 80046b6: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046ba: fa09 f90b lsl.w r9, r9, fp 80046be: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80046c2: 4d41 ldr r5, [pc, #260] ; (80047c8 ) 80046c4: 42a8 cmp r0, r5 80046c6: d071 beq.n 80047ac 80046c8: f505 6580 add.w r5, r5, #1024 ; 0x400 80046cc: 42a8 cmp r0, r5 80046ce: d06f beq.n 80047b0 80046d0: f505 6580 add.w r5, r5, #1024 ; 0x400 80046d4: 42a8 cmp r0, r5 80046d6: d06d beq.n 80047b4 80046d8: f505 6580 add.w r5, r5, #1024 ; 0x400 80046dc: 42a8 cmp r0, r5 80046de: d06b beq.n 80047b8 80046e0: f505 6580 add.w r5, r5, #1024 ; 0x400 80046e4: 42a8 cmp r0, r5 80046e6: d069 beq.n 80047bc 80046e8: 4570 cmp r0, lr 80046ea: bf0c ite eq 80046ec: 2505 moveq r5, #5 80046ee: 2506 movne r5, #6 80046f0: fa05 f50b lsl.w r5, r5, fp 80046f4: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 80046f8: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 80046fc: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80046fe: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8004702: bf14 ite ne 8004704: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8004706: 43a5 biceq r5, r4 8004708: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 800470a: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 800470c: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8004710: bf14 ite ne 8004712: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8004714: 43a5 biceq r5, r4 8004716: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8004718: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800471a: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 800471e: bf14 ite ne 8004720: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8004722: 43a5 biceq r5, r4 8004724: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8004726: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8004728: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 800472c: bf14 ite ne 800472e: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8004730: ea25 0404 biceq.w r4, r5, r4 8004734: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8004736: 3601 adds r6, #1 8004738: 2e10 cmp r6, #16 800473a: f47f af6d bne.w 8004618 } } } } } 800473e: b003 add sp, #12 8004740: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8004744: 2d03 cmp r5, #3 8004746: d025 beq.n 8004794 8004748: 2d11 cmp r5, #17 800474a: d180 bne.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 800474c: 68ca ldr r2, [r1, #12] 800474e: 3204 adds r2, #4 break; 8004750: e77d b.n 800464e switch (GPIO_Init->Mode) 8004752: 4565 cmp r5, ip 8004754: d009 beq.n 800476a 8004756: d812 bhi.n 800477e 8004758: f8df 9078 ldr.w r9, [pc, #120] ; 80047d4 800475c: 454d cmp r5, r9 800475e: d004 beq.n 800476a 8004760: f509 3980 add.w r9, r9, #65536 ; 0x10000 8004764: 454d cmp r5, r9 8004766: f47f af72 bne.w 800464e if (GPIO_Init->Pull == GPIO_NOPULL) 800476a: 688a ldr r2, [r1, #8] 800476c: b1e2 cbz r2, 80047a8 else if (GPIO_Init->Pull == GPIO_PULLUP) 800476e: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8004770: bf0c ite eq 8004772: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8004776: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 800477a: 2208 movs r2, #8 800477c: e767 b.n 800464e switch (GPIO_Init->Mode) 800477e: f8df 9058 ldr.w r9, [pc, #88] ; 80047d8 8004782: 454d cmp r5, r9 8004784: d0f1 beq.n 800476a 8004786: f509 3980 add.w r9, r9, #65536 ; 0x10000 800478a: 454d cmp r5, r9 800478c: d0ed beq.n 800476a 800478e: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8004792: e7e7 b.n 8004764 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8004794: 2200 movs r2, #0 8004796: e75a b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8004798: 68ca ldr r2, [r1, #12] break; 800479a: e758 b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 800479c: 68ca ldr r2, [r1, #12] 800479e: 3208 adds r2, #8 break; 80047a0: e755 b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80047a2: 68ca ldr r2, [r1, #12] 80047a4: 320c adds r2, #12 break; 80047a6: e752 b.n 800464e config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80047a8: 2204 movs r2, #4 80047aa: e750 b.n 800464e SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80047ac: 2500 movs r5, #0 80047ae: e79f b.n 80046f0 80047b0: 2501 movs r5, #1 80047b2: e79d b.n 80046f0 80047b4: 2502 movs r5, #2 80047b6: e79b b.n 80046f0 80047b8: 2503 movs r5, #3 80047ba: e799 b.n 80046f0 80047bc: 2504 movs r5, #4 80047be: e797 b.n 80046f0 80047c0: 40021000 .word 0x40021000 80047c4: 40010400 .word 0x40010400 80047c8: 40010800 .word 0x40010800 80047cc: 40011c00 .word 0x40011c00 80047d0: 10210000 .word 0x10210000 80047d4: 10110000 .word 0x10110000 80047d8: 10310000 .word 0x10310000 080047dc : GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80047dc: 6883 ldr r3, [r0, #8] 80047de: 4219 tst r1, r3 else { bitstatus = GPIO_PIN_RESET; } return bitstatus; } 80047e0: bf14 ite ne 80047e2: 2001 movne r0, #1 80047e4: 2000 moveq r0, #0 80047e6: 4770 bx lr 080047e8 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80047e8: b10a cbz r2, 80047ee { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 80047ea: 6101 str r1, [r0, #16] 80047ec: 4770 bx lr 80047ee: 0409 lsls r1, r1, #16 80047f0: e7fb b.n 80047ea 080047f2 : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 80047f2: 68c3 ldr r3, [r0, #12] 80047f4: 4059 eors r1, r3 80047f6: 60c1 str r1, [r0, #12] 80047f8: 4770 bx lr ... 080047fc : * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 80047fc: b538 push {r3, r4, r5, lr} uint32_t freqrange = 0U; uint32_t pclk1 = 0U; /* Check the I2C handle allocation */ if(hi2c == NULL) 80047fe: 4604 mov r4, r0 8004800: b908 cbnz r0, 8004806 { return HAL_ERROR; 8004802: 2001 movs r0, #1 8004804: bd38 pop {r3, r4, r5, pc} assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if(hi2c->State == HAL_I2C_STATE_RESET) 8004806: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 800480a: f003 02ff and.w r2, r3, #255 ; 0xff 800480e: b91b cbnz r3, 8004818 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8004810: f880 203c strb.w r2, [r0, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8004814: f001 ff5c bl 80066d0 } hi2c->State = HAL_I2C_STATE_BUSY; 8004818: 2324 movs r3, #36 ; 0x24 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 800481a: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 800481c: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8004820: 6813 ldr r3, [r2, #0] 8004822: f023 0301 bic.w r3, r3, #1 8004826: 6013 str r3, [r2, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8004828: f000 fae2 bl 8004df0 /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 800482c: 6863 ldr r3, [r4, #4] 800482e: 4a2f ldr r2, [pc, #188] ; (80048ec ) 8004830: 4293 cmp r3, r2 8004832: d830 bhi.n 8004896 8004834: 4a2e ldr r2, [pc, #184] ; (80048f0 ) 8004836: 4290 cmp r0, r2 8004838: d9e3 bls.n 8004802 { return HAL_ERROR; } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 800483a: 4a2e ldr r2, [pc, #184] ; (80048f4 ) /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->CR2 = freqrange; 800483c: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 800483e: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8004842: 604a str r2, [r1, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004844: 3201 adds r2, #1 8004846: 620a str r2, [r1, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8004848: 4a28 ldr r2, [pc, #160] ; (80048ec ) 800484a: 3801 subs r0, #1 800484c: 4293 cmp r3, r2 800484e: d832 bhi.n 80048b6 8004850: 005b lsls r3, r3, #1 8004852: fbb0 f0f3 udiv r0, r0, r3 8004856: 1c43 adds r3, r0, #1 8004858: f3c3 030b ubfx r3, r3, #0, #12 800485c: 2b04 cmp r3, #4 800485e: bf38 it cc 8004860: 2304 movcc r3, #4 8004862: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004864: 6a22 ldr r2, [r4, #32] 8004866: 69e3 ldr r3, [r4, #28] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004868: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 800486a: 4313 orrs r3, r2 800486c: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 800486e: 68e2 ldr r2, [r4, #12] 8004870: 6923 ldr r3, [r4, #16] 8004872: 4313 orrs r3, r2 8004874: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8004876: 69a2 ldr r2, [r4, #24] 8004878: 6963 ldr r3, [r4, #20] 800487a: 4313 orrs r3, r2 800487c: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 800487e: 680b ldr r3, [r1, #0] 8004880: f043 0301 orr.w r3, r3, #1 8004884: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8004886: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004888: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 800488a: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 800488e: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8004890: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8004894: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8004896: 4a18 ldr r2, [pc, #96] ; (80048f8 ) 8004898: 4290 cmp r0, r2 800489a: d9b2 bls.n 8004802 freqrange = I2C_FREQRANGE(pclk1); 800489c: 4d15 ldr r5, [pc, #84] ; (80048f4 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 800489e: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 80048a2: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 80048a6: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 80048a8: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 80048aa: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 80048ac: f44f 757a mov.w r5, #1000 ; 0x3e8 80048b0: fbb2 f2f5 udiv r2, r2, r5 80048b4: e7c6 b.n 8004844 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 80048b6: 68a2 ldr r2, [r4, #8] 80048b8: b952 cbnz r2, 80048d0 80048ba: eb03 0343 add.w r3, r3, r3, lsl #1 80048be: fbb0 f0f3 udiv r0, r0, r3 80048c2: 1c43 adds r3, r0, #1 80048c4: f3c3 030b ubfx r3, r3, #0, #12 80048c8: b16b cbz r3, 80048e6 80048ca: f443 4300 orr.w r3, r3, #32768 ; 0x8000 80048ce: e7c8 b.n 8004862 80048d0: 2219 movs r2, #25 80048d2: 4353 muls r3, r2 80048d4: fbb0 f0f3 udiv r0, r0, r3 80048d8: 1c43 adds r3, r0, #1 80048da: f3c3 030b ubfx r3, r3, #0, #12 80048de: b113 cbz r3, 80048e6 80048e0: f443 4340 orr.w r3, r3, #49152 ; 0xc000 80048e4: e7bd b.n 8004862 80048e6: 2301 movs r3, #1 80048e8: e7bb b.n 8004862 80048ea: bf00 nop 80048ec: 000186a0 .word 0x000186a0 80048f0: 001e847f .word 0x001e847f 80048f4: 000f4240 .word 0x000f4240 80048f8: 003d08ff .word 0x003d08ff 080048fc : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80048fc: 6803 ldr r3, [r0, #0] { 80048fe: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8004902: 07db lsls r3, r3, #31 { 8004904: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8004906: d410 bmi.n 800492a } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8004908: 682b ldr r3, [r5, #0] 800490a: 079f lsls r7, r3, #30 800490c: d45e bmi.n 80049cc } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800490e: 682b ldr r3, [r5, #0] 8004910: 0719 lsls r1, r3, #28 8004912: f100 8095 bmi.w 8004a40 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8004916: 682b ldr r3, [r5, #0] 8004918: 075a lsls r2, r3, #29 800491a: f100 80bf bmi.w 8004a9c #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 800491e: 69ea ldr r2, [r5, #28] 8004920: 2a00 cmp r2, #0 8004922: f040 812d bne.w 8004b80 { return HAL_ERROR; } } return HAL_OK; 8004926: 2000 movs r0, #0 8004928: e014 b.n 8004954 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 800492a: 4c90 ldr r4, [pc, #576] ; (8004b6c ) 800492c: 6863 ldr r3, [r4, #4] 800492e: f003 030c and.w r3, r3, #12 8004932: 2b04 cmp r3, #4 8004934: d007 beq.n 8004946 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8004936: 6863 ldr r3, [r4, #4] 8004938: f003 030c and.w r3, r3, #12 800493c: 2b08 cmp r3, #8 800493e: d10c bne.n 800495a 8004940: 6863 ldr r3, [r4, #4] 8004942: 03de lsls r6, r3, #15 8004944: d509 bpl.n 800495a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8004946: 6823 ldr r3, [r4, #0] 8004948: 039c lsls r4, r3, #14 800494a: d5dd bpl.n 8004908 800494c: 686b ldr r3, [r5, #4] 800494e: 2b00 cmp r3, #0 8004950: d1da bne.n 8004908 return HAL_ERROR; 8004952: 2001 movs r0, #1 } 8004954: b002 add sp, #8 8004956: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800495a: 686b ldr r3, [r5, #4] 800495c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8004960: d110 bne.n 8004984 8004962: 6823 ldr r3, [r4, #0] 8004964: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8004968: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800496a: f7ff fca9 bl 80042c0 800496e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004970: 6823 ldr r3, [r4, #0] 8004972: 0398 lsls r0, r3, #14 8004974: d4c8 bmi.n 8004908 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8004976: f7ff fca3 bl 80042c0 800497a: 1b80 subs r0, r0, r6 800497c: 2864 cmp r0, #100 ; 0x64 800497e: d9f7 bls.n 8004970 return HAL_TIMEOUT; 8004980: 2003 movs r0, #3 8004982: e7e7 b.n 8004954 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8004984: b99b cbnz r3, 80049ae 8004986: 6823 ldr r3, [r4, #0] 8004988: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800498c: 6023 str r3, [r4, #0] 800498e: 6823 ldr r3, [r4, #0] 8004990: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8004994: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8004996: f7ff fc93 bl 80042c0 800499a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800499c: 6823 ldr r3, [r4, #0] 800499e: 0399 lsls r1, r3, #14 80049a0: d5b2 bpl.n 8004908 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80049a2: f7ff fc8d bl 80042c0 80049a6: 1b80 subs r0, r0, r6 80049a8: 2864 cmp r0, #100 ; 0x64 80049aa: d9f7 bls.n 800499c 80049ac: e7e8 b.n 8004980 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80049ae: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 80049b2: 6823 ldr r3, [r4, #0] 80049b4: d103 bne.n 80049be 80049b6: f443 2380 orr.w r3, r3, #262144 ; 0x40000 80049ba: 6023 str r3, [r4, #0] 80049bc: e7d1 b.n 8004962 80049be: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80049c2: 6023 str r3, [r4, #0] 80049c4: 6823 ldr r3, [r4, #0] 80049c6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80049ca: e7cd b.n 8004968 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80049cc: 4c67 ldr r4, [pc, #412] ; (8004b6c ) 80049ce: 6863 ldr r3, [r4, #4] 80049d0: f013 0f0c tst.w r3, #12 80049d4: d007 beq.n 80049e6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80049d6: 6863 ldr r3, [r4, #4] 80049d8: f003 030c and.w r3, r3, #12 80049dc: 2b08 cmp r3, #8 80049de: d110 bne.n 8004a02 80049e0: 6863 ldr r3, [r4, #4] 80049e2: 03da lsls r2, r3, #15 80049e4: d40d bmi.n 8004a02 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80049e6: 6823 ldr r3, [r4, #0] 80049e8: 079b lsls r3, r3, #30 80049ea: d502 bpl.n 80049f2 80049ec: 692b ldr r3, [r5, #16] 80049ee: 2b01 cmp r3, #1 80049f0: d1af bne.n 8004952 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80049f2: 6823 ldr r3, [r4, #0] 80049f4: 696a ldr r2, [r5, #20] 80049f6: f023 03f8 bic.w r3, r3, #248 ; 0xf8 80049fa: ea43 03c2 orr.w r3, r3, r2, lsl #3 80049fe: 6023 str r3, [r4, #0] 8004a00: e785 b.n 800490e if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8004a02: 692a ldr r2, [r5, #16] 8004a04: 4b5a ldr r3, [pc, #360] ; (8004b70 ) 8004a06: b16a cbz r2, 8004a24 __HAL_RCC_HSI_ENABLE(); 8004a08: 2201 movs r2, #1 8004a0a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a0c: f7ff fc58 bl 80042c0 8004a10: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004a12: 6823 ldr r3, [r4, #0] 8004a14: 079f lsls r7, r3, #30 8004a16: d4ec bmi.n 80049f2 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8004a18: f7ff fc52 bl 80042c0 8004a1c: 1b80 subs r0, r0, r6 8004a1e: 2802 cmp r0, #2 8004a20: d9f7 bls.n 8004a12 8004a22: e7ad b.n 8004980 __HAL_RCC_HSI_DISABLE(); 8004a24: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a26: f7ff fc4b bl 80042c0 8004a2a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8004a2c: 6823 ldr r3, [r4, #0] 8004a2e: 0798 lsls r0, r3, #30 8004a30: f57f af6d bpl.w 800490e if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8004a34: f7ff fc44 bl 80042c0 8004a38: 1b80 subs r0, r0, r6 8004a3a: 2802 cmp r0, #2 8004a3c: d9f6 bls.n 8004a2c 8004a3e: e79f b.n 8004980 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8004a40: 69aa ldr r2, [r5, #24] 8004a42: 4c4a ldr r4, [pc, #296] ; (8004b6c ) 8004a44: 4b4b ldr r3, [pc, #300] ; (8004b74 ) 8004a46: b1da cbz r2, 8004a80 __HAL_RCC_LSI_ENABLE(); 8004a48: 2201 movs r2, #1 8004a4a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a4c: f7ff fc38 bl 80042c0 8004a50: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8004a52: 6a63 ldr r3, [r4, #36] ; 0x24 8004a54: 079b lsls r3, r3, #30 8004a56: d50d bpl.n 8004a74 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8004a58: f44f 52fa mov.w r2, #8000 ; 0x1f40 8004a5c: 4b46 ldr r3, [pc, #280] ; (8004b78 ) 8004a5e: 681b ldr r3, [r3, #0] 8004a60: fbb3 f3f2 udiv r3, r3, r2 8004a64: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8004a66: bf00 nop do { __NOP(); } while (Delay --); 8004a68: 9b01 ldr r3, [sp, #4] 8004a6a: 1e5a subs r2, r3, #1 8004a6c: 9201 str r2, [sp, #4] 8004a6e: 2b00 cmp r3, #0 8004a70: d1f9 bne.n 8004a66 8004a72: e750 b.n 8004916 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8004a74: f7ff fc24 bl 80042c0 8004a78: 1b80 subs r0, r0, r6 8004a7a: 2802 cmp r0, #2 8004a7c: d9e9 bls.n 8004a52 8004a7e: e77f b.n 8004980 __HAL_RCC_LSI_DISABLE(); 8004a80: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a82: f7ff fc1d bl 80042c0 8004a86: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8004a88: 6a63 ldr r3, [r4, #36] ; 0x24 8004a8a: 079f lsls r7, r3, #30 8004a8c: f57f af43 bpl.w 8004916 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8004a90: f7ff fc16 bl 80042c0 8004a94: 1b80 subs r0, r0, r6 8004a96: 2802 cmp r0, #2 8004a98: d9f6 bls.n 8004a88 8004a9a: e771 b.n 8004980 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8004a9c: 4c33 ldr r4, [pc, #204] ; (8004b6c ) 8004a9e: 69e3 ldr r3, [r4, #28] 8004aa0: 00d8 lsls r0, r3, #3 8004aa2: d424 bmi.n 8004aee pwrclkchanged = SET; 8004aa4: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8004aa6: 69e3 ldr r3, [r4, #28] 8004aa8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8004aac: 61e3 str r3, [r4, #28] 8004aae: 69e3 ldr r3, [r4, #28] 8004ab0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8004ab4: 9300 str r3, [sp, #0] 8004ab6: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004ab8: 4e30 ldr r6, [pc, #192] ; (8004b7c ) 8004aba: 6833 ldr r3, [r6, #0] 8004abc: 05d9 lsls r1, r3, #23 8004abe: d518 bpl.n 8004af2 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004ac0: 68eb ldr r3, [r5, #12] 8004ac2: 2b01 cmp r3, #1 8004ac4: d126 bne.n 8004b14 8004ac6: 6a23 ldr r3, [r4, #32] 8004ac8: f043 0301 orr.w r3, r3, #1 8004acc: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8004ace: f7ff fbf7 bl 80042c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004ad2: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8004ad6: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8004ad8: 6a23 ldr r3, [r4, #32] 8004ada: 079b lsls r3, r3, #30 8004adc: d53f bpl.n 8004b5e if(pwrclkchanged == SET) 8004ade: 2f00 cmp r7, #0 8004ae0: f43f af1d beq.w 800491e __HAL_RCC_PWR_CLK_DISABLE(); 8004ae4: 69e3 ldr r3, [r4, #28] 8004ae6: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8004aea: 61e3 str r3, [r4, #28] 8004aec: e717 b.n 800491e FlagStatus pwrclkchanged = RESET; 8004aee: 2700 movs r7, #0 8004af0: e7e2 b.n 8004ab8 SET_BIT(PWR->CR, PWR_CR_DBP); 8004af2: 6833 ldr r3, [r6, #0] 8004af4: f443 7380 orr.w r3, r3, #256 ; 0x100 8004af8: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8004afa: f7ff fbe1 bl 80042c0 8004afe: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004b00: 6833 ldr r3, [r6, #0] 8004b02: 05da lsls r2, r3, #23 8004b04: d4dc bmi.n 8004ac0 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8004b06: f7ff fbdb bl 80042c0 8004b0a: eba0 0008 sub.w r0, r0, r8 8004b0e: 2864 cmp r0, #100 ; 0x64 8004b10: d9f6 bls.n 8004b00 8004b12: e735 b.n 8004980 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b14: b9ab cbnz r3, 8004b42 8004b16: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b18: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b1c: f023 0301 bic.w r3, r3, #1 8004b20: 6223 str r3, [r4, #32] 8004b22: 6a23 ldr r3, [r4, #32] 8004b24: f023 0304 bic.w r3, r3, #4 8004b28: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8004b2a: f7ff fbc9 bl 80042c0 8004b2e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8004b30: 6a23 ldr r3, [r4, #32] 8004b32: 0798 lsls r0, r3, #30 8004b34: d5d3 bpl.n 8004ade if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b36: f7ff fbc3 bl 80042c0 8004b3a: 1b80 subs r0, r0, r6 8004b3c: 4540 cmp r0, r8 8004b3e: d9f7 bls.n 8004b30 8004b40: e71e b.n 8004980 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b42: 2b05 cmp r3, #5 8004b44: 6a23 ldr r3, [r4, #32] 8004b46: d103 bne.n 8004b50 8004b48: f043 0304 orr.w r3, r3, #4 8004b4c: 6223 str r3, [r4, #32] 8004b4e: e7ba b.n 8004ac6 8004b50: f023 0301 bic.w r3, r3, #1 8004b54: 6223 str r3, [r4, #32] 8004b56: 6a23 ldr r3, [r4, #32] 8004b58: f023 0304 bic.w r3, r3, #4 8004b5c: e7b6 b.n 8004acc if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b5e: f7ff fbaf bl 80042c0 8004b62: eba0 0008 sub.w r0, r0, r8 8004b66: 42b0 cmp r0, r6 8004b68: d9b6 bls.n 8004ad8 8004b6a: e709 b.n 8004980 8004b6c: 40021000 .word 0x40021000 8004b70: 42420000 .word 0x42420000 8004b74: 42420480 .word 0x42420480 8004b78: 20000008 .word 0x20000008 8004b7c: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8004b80: 4c22 ldr r4, [pc, #136] ; (8004c0c ) 8004b82: 6863 ldr r3, [r4, #4] 8004b84: f003 030c and.w r3, r3, #12 8004b88: 2b08 cmp r3, #8 8004b8a: f43f aee2 beq.w 8004952 8004b8e: 2300 movs r3, #0 8004b90: 4e1f ldr r6, [pc, #124] ; (8004c10 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8004b92: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8004b94: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8004b96: d12b bne.n 8004bf0 tickstart = HAL_GetTick(); 8004b98: f7ff fb92 bl 80042c0 8004b9c: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004b9e: 6823 ldr r3, [r4, #0] 8004ba0: 0199 lsls r1, r3, #6 8004ba2: d41f bmi.n 8004be4 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8004ba4: 6a2b ldr r3, [r5, #32] 8004ba6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8004baa: d105 bne.n 8004bb8 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8004bac: 6862 ldr r2, [r4, #4] 8004bae: 68a9 ldr r1, [r5, #8] 8004bb0: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8004bb4: 430a orrs r2, r1 8004bb6: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8004bb8: 6a69 ldr r1, [r5, #36] ; 0x24 8004bba: 6862 ldr r2, [r4, #4] 8004bbc: 430b orrs r3, r1 8004bbe: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8004bc2: 4313 orrs r3, r2 8004bc4: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8004bc6: 2301 movs r3, #1 8004bc8: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8004bca: f7ff fb79 bl 80042c0 8004bce: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004bd0: 6823 ldr r3, [r4, #0] 8004bd2: 019a lsls r2, r3, #6 8004bd4: f53f aea7 bmi.w 8004926 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004bd8: f7ff fb72 bl 80042c0 8004bdc: 1b40 subs r0, r0, r5 8004bde: 2802 cmp r0, #2 8004be0: d9f6 bls.n 8004bd0 8004be2: e6cd b.n 8004980 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004be4: f7ff fb6c bl 80042c0 8004be8: 1bc0 subs r0, r0, r7 8004bea: 2802 cmp r0, #2 8004bec: d9d7 bls.n 8004b9e 8004bee: e6c7 b.n 8004980 tickstart = HAL_GetTick(); 8004bf0: f7ff fb66 bl 80042c0 8004bf4: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004bf6: 6823 ldr r3, [r4, #0] 8004bf8: 019b lsls r3, r3, #6 8004bfa: f57f ae94 bpl.w 8004926 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004bfe: f7ff fb5f bl 80042c0 8004c02: 1b40 subs r0, r0, r5 8004c04: 2802 cmp r0, #2 8004c06: d9f6 bls.n 8004bf6 8004c08: e6ba b.n 8004980 8004c0a: bf00 nop 8004c0c: 40021000 .word 0x40021000 8004c10: 42420060 .word 0x42420060 08004c14 : { 8004c14: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8004c16: 4b19 ldr r3, [pc, #100] ; (8004c7c ) { 8004c18: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8004c1a: ac02 add r4, sp, #8 8004c1c: f103 0510 add.w r5, r3, #16 8004c20: 4622 mov r2, r4 8004c22: 6818 ldr r0, [r3, #0] 8004c24: 6859 ldr r1, [r3, #4] 8004c26: 3308 adds r3, #8 8004c28: c203 stmia r2!, {r0, r1} 8004c2a: 42ab cmp r3, r5 8004c2c: 4614 mov r4, r2 8004c2e: d1f7 bne.n 8004c20 const uint8_t aPredivFactorTable[2] = {1, 2}; 8004c30: 2301 movs r3, #1 8004c32: f88d 3004 strb.w r3, [sp, #4] 8004c36: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8004c38: 4911 ldr r1, [pc, #68] ; (8004c80 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8004c3a: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8004c3e: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8004c40: f003 020c and.w r2, r3, #12 8004c44: 2a08 cmp r2, #8 8004c46: d117 bne.n 8004c78 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8004c48: f3c3 4283 ubfx r2, r3, #18, #4 8004c4c: a806 add r0, sp, #24 8004c4e: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8004c50: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8004c52: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8004c56: d50c bpl.n 8004c72 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c58: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c5a: 480a ldr r0, [pc, #40] ; (8004c84 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c5c: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c60: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c62: aa06 add r2, sp, #24 8004c64: 4413 add r3, r2 8004c66: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c6a: fbb0 f0f3 udiv r0, r0, r3 } 8004c6e: b007 add sp, #28 8004c70: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8004c72: 4805 ldr r0, [pc, #20] ; (8004c88 ) 8004c74: 4350 muls r0, r2 8004c76: e7fa b.n 8004c6e sysclockfreq = HSE_VALUE; 8004c78: 4802 ldr r0, [pc, #8] ; (8004c84 ) return sysclockfreq; 8004c7a: e7f8 b.n 8004c6e 8004c7c: 08007a30 .word 0x08007a30 8004c80: 40021000 .word 0x40021000 8004c84: 007a1200 .word 0x007a1200 8004c88: 003d0900 .word 0x003d0900 08004c8c : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c8c: 4a54 ldr r2, [pc, #336] ; (8004de0 ) { 8004c8e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c92: 6813 ldr r3, [r2, #0] { 8004c94: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c96: f003 0307 and.w r3, r3, #7 8004c9a: 428b cmp r3, r1 { 8004c9c: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c9e: d32a bcc.n 8004cf6 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8004ca0: 6829 ldr r1, [r5, #0] 8004ca2: 078c lsls r4, r1, #30 8004ca4: d434 bmi.n 8004d10 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8004ca6: 07ca lsls r2, r1, #31 8004ca8: d447 bmi.n 8004d3a if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8004caa: 4a4d ldr r2, [pc, #308] ; (8004de0 ) 8004cac: 6813 ldr r3, [r2, #0] 8004cae: f003 0307 and.w r3, r3, #7 8004cb2: 429e cmp r6, r3 8004cb4: f0c0 8082 bcc.w 8004dbc if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8004cb8: 682a ldr r2, [r5, #0] 8004cba: 4c4a ldr r4, [pc, #296] ; (8004de4 ) 8004cbc: f012 0f04 tst.w r2, #4 8004cc0: f040 8087 bne.w 8004dd2 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8004cc4: 0713 lsls r3, r2, #28 8004cc6: d506 bpl.n 8004cd6 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8004cc8: 6863 ldr r3, [r4, #4] 8004cca: 692a ldr r2, [r5, #16] 8004ccc: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8004cd0: ea43 03c2 orr.w r3, r3, r2, lsl #3 8004cd4: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8004cd6: f7ff ff9d bl 8004c14 8004cda: 6863 ldr r3, [r4, #4] 8004cdc: 4a42 ldr r2, [pc, #264] ; (8004de8 ) 8004cde: f3c3 1303 ubfx r3, r3, #4, #4 8004ce2: 5cd3 ldrb r3, [r2, r3] 8004ce4: 40d8 lsrs r0, r3 8004ce6: 4b41 ldr r3, [pc, #260] ; (8004dec ) 8004ce8: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8004cea: 2000 movs r0, #0 8004cec: f7ff faa6 bl 800423c return HAL_OK; 8004cf0: 2000 movs r0, #0 } 8004cf2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8004cf6: 6813 ldr r3, [r2, #0] 8004cf8: f023 0307 bic.w r3, r3, #7 8004cfc: 430b orrs r3, r1 8004cfe: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8004d00: 6813 ldr r3, [r2, #0] 8004d02: f003 0307 and.w r3, r3, #7 8004d06: 4299 cmp r1, r3 8004d08: d0ca beq.n 8004ca0 return HAL_ERROR; 8004d0a: 2001 movs r0, #1 8004d0c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8004d10: 4b34 ldr r3, [pc, #208] ; (8004de4 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8004d12: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8004d16: bf1e ittt ne 8004d18: 685a ldrne r2, [r3, #4] 8004d1a: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8004d1e: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8004d20: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8004d22: bf42 ittt mi 8004d24: 685a ldrmi r2, [r3, #4] 8004d26: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8004d2a: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8004d2c: 685a ldr r2, [r3, #4] 8004d2e: 68a8 ldr r0, [r5, #8] 8004d30: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8004d34: 4302 orrs r2, r0 8004d36: 605a str r2, [r3, #4] 8004d38: e7b5 b.n 8004ca6 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d3a: 686a ldr r2, [r5, #4] 8004d3c: 4c29 ldr r4, [pc, #164] ; (8004de4 ) 8004d3e: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004d40: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d42: d11c bne.n 8004d7e if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004d44: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004d48: d0df beq.n 8004d0a __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8004d4a: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d4c: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8004d50: f023 0303 bic.w r3, r3, #3 8004d54: 4313 orrs r3, r2 8004d56: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8004d58: f7ff fab2 bl 80042c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d5c: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 8004d5e: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d60: 2b01 cmp r3, #1 8004d62: d114 bne.n 8004d8e while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8004d64: 6863 ldr r3, [r4, #4] 8004d66: f003 030c and.w r3, r3, #12 8004d6a: 2b04 cmp r3, #4 8004d6c: d09d beq.n 8004caa if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d6e: f7ff faa7 bl 80042c0 8004d72: 1bc0 subs r0, r0, r7 8004d74: 4540 cmp r0, r8 8004d76: d9f5 bls.n 8004d64 return HAL_TIMEOUT; 8004d78: 2003 movs r0, #3 8004d7a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8004d7e: 2a02 cmp r2, #2 8004d80: d102 bne.n 8004d88 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004d82: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8004d86: e7df b.n 8004d48 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004d88: f013 0f02 tst.w r3, #2 8004d8c: e7dc b.n 8004d48 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8004d8e: 2b02 cmp r3, #2 8004d90: d10f bne.n 8004db2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8004d92: 6863 ldr r3, [r4, #4] 8004d94: f003 030c and.w r3, r3, #12 8004d98: 2b08 cmp r3, #8 8004d9a: d086 beq.n 8004caa if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d9c: f7ff fa90 bl 80042c0 8004da0: 1bc0 subs r0, r0, r7 8004da2: 4540 cmp r0, r8 8004da4: d9f5 bls.n 8004d92 8004da6: e7e7 b.n 8004d78 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004da8: f7ff fa8a bl 80042c0 8004dac: 1bc0 subs r0, r0, r7 8004dae: 4540 cmp r0, r8 8004db0: d8e2 bhi.n 8004d78 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8004db2: 6863 ldr r3, [r4, #4] 8004db4: f013 0f0c tst.w r3, #12 8004db8: d1f6 bne.n 8004da8 8004dba: e776 b.n 8004caa __HAL_FLASH_SET_LATENCY(FLatency); 8004dbc: 6813 ldr r3, [r2, #0] 8004dbe: f023 0307 bic.w r3, r3, #7 8004dc2: 4333 orrs r3, r6 8004dc4: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8004dc6: 6813 ldr r3, [r2, #0] 8004dc8: f003 0307 and.w r3, r3, #7 8004dcc: 429e cmp r6, r3 8004dce: d19c bne.n 8004d0a 8004dd0: e772 b.n 8004cb8 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8004dd2: 6863 ldr r3, [r4, #4] 8004dd4: 68e9 ldr r1, [r5, #12] 8004dd6: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8004dda: 430b orrs r3, r1 8004ddc: 6063 str r3, [r4, #4] 8004dde: e771 b.n 8004cc4 8004de0: 40022000 .word 0x40022000 8004de4: 40021000 .word 0x40021000 8004de8: 08007b48 .word 0x08007b48 8004dec: 20000008 .word 0x20000008 08004df0 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8004df0: 4b04 ldr r3, [pc, #16] ; (8004e04 ) 8004df2: 4a05 ldr r2, [pc, #20] ; (8004e08 ) 8004df4: 685b ldr r3, [r3, #4] 8004df6: f3c3 2302 ubfx r3, r3, #8, #3 8004dfa: 5cd3 ldrb r3, [r2, r3] 8004dfc: 4a03 ldr r2, [pc, #12] ; (8004e0c ) 8004dfe: 6810 ldr r0, [r2, #0] } 8004e00: 40d8 lsrs r0, r3 8004e02: 4770 bx lr 8004e04: 40021000 .word 0x40021000 8004e08: 08007b58 .word 0x08007b58 8004e0c: 20000008 .word 0x20000008 08004e10 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8004e10: 4b04 ldr r3, [pc, #16] ; (8004e24 ) 8004e12: 4a05 ldr r2, [pc, #20] ; (8004e28 ) 8004e14: 685b ldr r3, [r3, #4] 8004e16: f3c3 23c2 ubfx r3, r3, #11, #3 8004e1a: 5cd3 ldrb r3, [r2, r3] 8004e1c: 4a03 ldr r2, [pc, #12] ; (8004e2c ) 8004e1e: 6810 ldr r0, [r2, #0] } 8004e20: 40d8 lsrs r0, r3 8004e22: 4770 bx lr 8004e24: 40021000 .word 0x40021000 8004e28: 08007b58 .word 0x08007b58 8004e2c: 20000008 .word 0x20000008 08004e30 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8004e30: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 8004e32: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8004e34: 68da ldr r2, [r3, #12] 8004e36: f042 0201 orr.w r2, r2, #1 8004e3a: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 8004e3c: 681a ldr r2, [r3, #0] 8004e3e: f042 0201 orr.w r2, r2, #1 8004e42: 601a str r2, [r3, #0] } 8004e44: 4770 bx lr 08004e46 : 8004e46: 4770 bx lr 08004e48 : 8004e48: 4770 bx lr 08004e4a : 8004e4a: 4770 bx lr 08004e4c : 8004e4c: 4770 bx lr 08004e4e : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004e4e: 6803 ldr r3, [r0, #0] { 8004e50: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004e52: 691a ldr r2, [r3, #16] { 8004e54: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004e56: 0791 lsls r1, r2, #30 8004e58: d50e bpl.n 8004e78 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 8004e5a: 68da ldr r2, [r3, #12] 8004e5c: 0792 lsls r2, r2, #30 8004e5e: d50b bpl.n 8004e78 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 8004e60: f06f 0202 mvn.w r2, #2 8004e64: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8004e66: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004e68: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8004e6a: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004e6c: 079b lsls r3, r3, #30 8004e6e: d077 beq.n 8004f60 { HAL_TIM_IC_CaptureCallback(htim); 8004e70: f7ff ffea bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004e74: 2300 movs r3, #0 8004e76: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8004e78: 6823 ldr r3, [r4, #0] 8004e7a: 691a ldr r2, [r3, #16] 8004e7c: 0750 lsls r0, r2, #29 8004e7e: d510 bpl.n 8004ea2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8004e80: 68da ldr r2, [r3, #12] 8004e82: 0751 lsls r1, r2, #29 8004e84: d50d bpl.n 8004ea2 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8004e86: f06f 0204 mvn.w r2, #4 8004e8a: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004e8c: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004e8e: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004e90: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004e92: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8004e96: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004e98: d068 beq.n 8004f6c HAL_TIM_IC_CaptureCallback(htim); 8004e9a: f7ff ffd5 bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004e9e: 2300 movs r3, #0 8004ea0: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8004ea2: 6823 ldr r3, [r4, #0] 8004ea4: 691a ldr r2, [r3, #16] 8004ea6: 0712 lsls r2, r2, #28 8004ea8: d50f bpl.n 8004eca { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8004eaa: 68da ldr r2, [r3, #12] 8004eac: 0710 lsls r0, r2, #28 8004eae: d50c bpl.n 8004eca { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8004eb0: f06f 0208 mvn.w r2, #8 8004eb4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004eb6: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004eb8: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004eba: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004ebc: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8004ebe: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004ec0: d05a beq.n 8004f78 HAL_TIM_IC_CaptureCallback(htim); 8004ec2: f7ff ffc1 bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004ec6: 2300 movs r3, #0 8004ec8: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8004eca: 6823 ldr r3, [r4, #0] 8004ecc: 691a ldr r2, [r3, #16] 8004ece: 06d2 lsls r2, r2, #27 8004ed0: d510 bpl.n 8004ef4 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8004ed2: 68da ldr r2, [r3, #12] 8004ed4: 06d0 lsls r0, r2, #27 8004ed6: d50d bpl.n 8004ef4 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8004ed8: f06f 0210 mvn.w r2, #16 8004edc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8004ede: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004ee0: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8004ee2: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004ee4: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8004ee8: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004eea: d04b beq.n 8004f84 HAL_TIM_IC_CaptureCallback(htim); 8004eec: f7ff ffac bl 8004e48 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004ef0: 2300 movs r3, #0 8004ef2: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8004ef4: 6823 ldr r3, [r4, #0] 8004ef6: 691a ldr r2, [r3, #16] 8004ef8: 07d1 lsls r1, r2, #31 8004efa: d508 bpl.n 8004f0e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8004efc: 68da ldr r2, [r3, #12] 8004efe: 07d2 lsls r2, r2, #31 8004f00: d505 bpl.n 8004f0e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004f02: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8004f06: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004f08: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8004f0a: f000 ffc7 bl 8005e9c } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8004f0e: 6823 ldr r3, [r4, #0] 8004f10: 691a ldr r2, [r3, #16] 8004f12: 0610 lsls r0, r2, #24 8004f14: d508 bpl.n 8004f28 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 8004f16: 68da ldr r2, [r3, #12] 8004f18: 0611 lsls r1, r2, #24 8004f1a: d505 bpl.n 8004f28 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004f1c: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8004f20: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004f22: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 8004f24: f000 f8bf bl 80050a6 } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8004f28: 6823 ldr r3, [r4, #0] 8004f2a: 691a ldr r2, [r3, #16] 8004f2c: 0652 lsls r2, r2, #25 8004f2e: d508 bpl.n 8004f42 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8004f30: 68da ldr r2, [r3, #12] 8004f32: 0650 lsls r0, r2, #25 8004f34: d505 bpl.n 8004f42 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8004f36: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 8004f3a: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8004f3c: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 8004f3e: f7ff ff85 bl 8004e4c } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 8004f42: 6823 ldr r3, [r4, #0] 8004f44: 691a ldr r2, [r3, #16] 8004f46: 0691 lsls r1, r2, #26 8004f48: d522 bpl.n 8004f90 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 8004f4a: 68da ldr r2, [r3, #12] 8004f4c: 0692 lsls r2, r2, #26 8004f4e: d51f bpl.n 8004f90 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004f50: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 8004f54: 4620 mov r0, r4 } } } 8004f56: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004f5a: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 8004f5c: f000 b8a2 b.w 80050a4 HAL_TIM_OC_DelayElapsedCallback(htim); 8004f60: f7ff ff71 bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f64: 4620 mov r0, r4 8004f66: f7ff ff70 bl 8004e4a 8004f6a: e783 b.n 8004e74 HAL_TIM_OC_DelayElapsedCallback(htim); 8004f6c: f7ff ff6b bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f70: 4620 mov r0, r4 8004f72: f7ff ff6a bl 8004e4a 8004f76: e792 b.n 8004e9e HAL_TIM_OC_DelayElapsedCallback(htim); 8004f78: f7ff ff65 bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f7c: 4620 mov r0, r4 8004f7e: f7ff ff64 bl 8004e4a 8004f82: e7a0 b.n 8004ec6 HAL_TIM_OC_DelayElapsedCallback(htim); 8004f84: f7ff ff5f bl 8004e46 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004f88: 4620 mov r0, r4 8004f8a: f7ff ff5e bl 8004e4a 8004f8e: e7af b.n 8004ef0 8004f90: bd10 pop {r4, pc} ... 08004f94 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004f94: 4a24 ldr r2, [pc, #144] ; (8005028 ) tmpcr1 = TIMx->CR1; 8004f96: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004f98: 4290 cmp r0, r2 8004f9a: d012 beq.n 8004fc2 8004f9c: f502 6200 add.w r2, r2, #2048 ; 0x800 8004fa0: 4290 cmp r0, r2 8004fa2: d00e beq.n 8004fc2 8004fa4: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8004fa8: d00b beq.n 8004fc2 8004faa: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8004fae: 4290 cmp r0, r2 8004fb0: d007 beq.n 8004fc2 8004fb2: f502 6280 add.w r2, r2, #1024 ; 0x400 8004fb6: 4290 cmp r0, r2 8004fb8: d003 beq.n 8004fc2 8004fba: f502 6280 add.w r2, r2, #1024 ; 0x400 8004fbe: 4290 cmp r0, r2 8004fc0: d11d bne.n 8004ffe { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8004fc2: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8004fc4: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8004fc8: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8004fca: 4a17 ldr r2, [pc, #92] ; (8005028 ) 8004fcc: 4290 cmp r0, r2 8004fce: d012 beq.n 8004ff6 8004fd0: f502 6200 add.w r2, r2, #2048 ; 0x800 8004fd4: 4290 cmp r0, r2 8004fd6: d00e beq.n 8004ff6 8004fd8: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8004fdc: d00b beq.n 8004ff6 8004fde: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8004fe2: 4290 cmp r0, r2 8004fe4: d007 beq.n 8004ff6 8004fe6: f502 6280 add.w r2, r2, #1024 ; 0x400 8004fea: 4290 cmp r0, r2 8004fec: d003 beq.n 8004ff6 8004fee: f502 6280 add.w r2, r2, #1024 ; 0x400 8004ff2: 4290 cmp r0, r2 8004ff4: d103 bne.n 8004ffe { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 8004ff6: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8004ff8: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8004ffc: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8004ffe: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8005000: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8005004: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 8005006: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8005008: 688b ldr r3, [r1, #8] 800500a: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 800500c: 680b ldr r3, [r1, #0] 800500e: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8005010: 4b05 ldr r3, [pc, #20] ; (8005028 ) 8005012: 4298 cmp r0, r3 8005014: d003 beq.n 800501e 8005016: f503 6300 add.w r3, r3, #2048 ; 0x800 800501a: 4298 cmp r0, r3 800501c: d101 bne.n 8005022 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 800501e: 690b ldr r3, [r1, #16] 8005020: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 8005022: 2301 movs r3, #1 8005024: 6143 str r3, [r0, #20] 8005026: 4770 bx lr 8005028: 40012c00 .word 0x40012c00 0800502c : { 800502c: b510 push {r4, lr} if(htim == NULL) 800502e: 4604 mov r4, r0 8005030: b1a0 cbz r0, 800505c if(htim->State == HAL_TIM_STATE_RESET) 8005032: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8005036: f003 02ff and.w r2, r3, #255 ; 0xff 800503a: b91b cbnz r3, 8005044 htim->Lock = HAL_UNLOCKED; 800503c: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 8005040: f001 fb78 bl 8006734 htim->State= HAL_TIM_STATE_BUSY; 8005044: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 8005046: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 8005048: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 800504c: 1d21 adds r1, r4, #4 800504e: f7ff ffa1 bl 8004f94 htim->State= HAL_TIM_STATE_READY; 8005052: 2301 movs r3, #1 return HAL_OK; 8005054: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 8005056: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 800505a: bd10 pop {r4, pc} return HAL_ERROR; 800505c: 2001 movs r0, #1 } 800505e: bd10 pop {r4, pc} 08005060 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 8005060: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 8005064: b510 push {r4, lr} __HAL_LOCK(htim); 8005066: 2b01 cmp r3, #1 8005068: f04f 0302 mov.w r3, #2 800506c: d018 beq.n 80050a0 htim->State = HAL_TIM_STATE_BUSY; 800506e: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 8005072: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8005074: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 8005076: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8005078: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 800507a: f022 0270 bic.w r2, r2, #112 ; 0x70 800507e: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8005080: 685a ldr r2, [r3, #4] 8005082: 4322 orrs r2, r4 8005084: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 8005086: 689a ldr r2, [r3, #8] 8005088: f022 0280 bic.w r2, r2, #128 ; 0x80 800508c: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 800508e: 689a ldr r2, [r3, #8] 8005090: 430a orrs r2, r1 8005092: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 8005094: 2301 movs r3, #1 8005096: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 800509a: 2300 movs r3, #0 800509c: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 80050a0: 4618 mov r0, r3 return HAL_OK; } 80050a2: bd10 pop {r4, pc} 080050a4 : 80050a4: 4770 bx lr 080050a6 : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 80050a6: 4770 bx lr 080050a8 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80050a8: 6803 ldr r3, [r0, #0] 80050aa: 68da ldr r2, [r3, #12] 80050ac: f422 7290 bic.w r2, r2, #288 ; 0x120 80050b0: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80050b2: 695a ldr r2, [r3, #20] 80050b4: f022 0201 bic.w r2, r2, #1 80050b8: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80050ba: 2320 movs r3, #32 80050bc: f880 303a strb.w r3, [r0, #58] ; 0x3a 80050c0: 4770 bx lr ... 080050c4 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80050c4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80050c8: 6805 ldr r5, [r0, #0] 80050ca: 68c2 ldr r2, [r0, #12] 80050cc: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050ce: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80050d0: f423 5340 bic.w r3, r3, #12288 ; 0x3000 80050d4: 4313 orrs r3, r2 80050d6: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050d8: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 80050da: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050dc: 430b orrs r3, r1 80050de: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 80050e0: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 80050e4: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80050e8: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 80050ea: 4313 orrs r3, r2 80050ec: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 80050ee: 696b ldr r3, [r5, #20] 80050f0: 6982 ldr r2, [r0, #24] 80050f2: f423 7340 bic.w r3, r3, #768 ; 0x300 80050f6: 4313 orrs r3, r2 80050f8: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 80050fa: 4b40 ldr r3, [pc, #256] ; (80051fc ) { 80050fc: 4681 mov r9, r0 if(huart->Instance == USART1) 80050fe: 429d cmp r5, r3 8005100: f04f 0419 mov.w r4, #25 8005104: d146 bne.n 8005194 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8005106: f7ff fe83 bl 8004e10 800510a: fb04 f300 mul.w r3, r4, r0 800510e: f8d9 6004 ldr.w r6, [r9, #4] 8005112: f04f 0864 mov.w r8, #100 ; 0x64 8005116: 00b6 lsls r6, r6, #2 8005118: fbb3 f3f6 udiv r3, r3, r6 800511c: fbb3 f3f8 udiv r3, r3, r8 8005120: 011e lsls r6, r3, #4 8005122: f7ff fe75 bl 8004e10 8005126: 4360 muls r0, r4 8005128: f8d9 3004 ldr.w r3, [r9, #4] 800512c: 009b lsls r3, r3, #2 800512e: fbb0 f7f3 udiv r7, r0, r3 8005132: f7ff fe6d bl 8004e10 8005136: 4360 muls r0, r4 8005138: f8d9 3004 ldr.w r3, [r9, #4] 800513c: 009b lsls r3, r3, #2 800513e: fbb0 f3f3 udiv r3, r0, r3 8005142: fbb3 f3f8 udiv r3, r3, r8 8005146: fb08 7313 mls r3, r8, r3, r7 800514a: 011b lsls r3, r3, #4 800514c: 3332 adds r3, #50 ; 0x32 800514e: fbb3 f3f8 udiv r3, r3, r8 8005152: f003 07f0 and.w r7, r3, #240 ; 0xf0 8005156: f7ff fe5b bl 8004e10 800515a: 4360 muls r0, r4 800515c: f8d9 2004 ldr.w r2, [r9, #4] 8005160: 0092 lsls r2, r2, #2 8005162: fbb0 faf2 udiv sl, r0, r2 8005166: f7ff fe53 bl 8004e10 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 800516a: 4360 muls r0, r4 800516c: f8d9 3004 ldr.w r3, [r9, #4] 8005170: 009b lsls r3, r3, #2 8005172: fbb0 f3f3 udiv r3, r0, r3 8005176: fbb3 f3f8 udiv r3, r3, r8 800517a: fb08 a313 mls r3, r8, r3, sl 800517e: 011b lsls r3, r3, #4 8005180: 3332 adds r3, #50 ; 0x32 8005182: fbb3 f3f8 udiv r3, r3, r8 8005186: f003 030f and.w r3, r3, #15 800518a: 433b orrs r3, r7 800518c: 4433 add r3, r6 800518e: 60ab str r3, [r5, #8] 8005190: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8005194: f7ff fe2c bl 8004df0 8005198: fb04 f300 mul.w r3, r4, r0 800519c: f8d9 6004 ldr.w r6, [r9, #4] 80051a0: f04f 0864 mov.w r8, #100 ; 0x64 80051a4: 00b6 lsls r6, r6, #2 80051a6: fbb3 f3f6 udiv r3, r3, r6 80051aa: fbb3 f3f8 udiv r3, r3, r8 80051ae: 011e lsls r6, r3, #4 80051b0: f7ff fe1e bl 8004df0 80051b4: 4360 muls r0, r4 80051b6: f8d9 3004 ldr.w r3, [r9, #4] 80051ba: 009b lsls r3, r3, #2 80051bc: fbb0 f7f3 udiv r7, r0, r3 80051c0: f7ff fe16 bl 8004df0 80051c4: 4360 muls r0, r4 80051c6: f8d9 3004 ldr.w r3, [r9, #4] 80051ca: 009b lsls r3, r3, #2 80051cc: fbb0 f3f3 udiv r3, r0, r3 80051d0: fbb3 f3f8 udiv r3, r3, r8 80051d4: fb08 7313 mls r3, r8, r3, r7 80051d8: 011b lsls r3, r3, #4 80051da: 3332 adds r3, #50 ; 0x32 80051dc: fbb3 f3f8 udiv r3, r3, r8 80051e0: f003 07f0 and.w r7, r3, #240 ; 0xf0 80051e4: f7ff fe04 bl 8004df0 80051e8: 4360 muls r0, r4 80051ea: f8d9 2004 ldr.w r2, [r9, #4] 80051ee: 0092 lsls r2, r2, #2 80051f0: fbb0 faf2 udiv sl, r0, r2 80051f4: f7ff fdfc bl 8004df0 80051f8: e7b7 b.n 800516a 80051fa: bf00 nop 80051fc: 40013800 .word 0x40013800 08005200 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8005200: b5f8 push {r3, r4, r5, r6, r7, lr} 8005202: 4604 mov r4, r0 8005204: 460e mov r6, r1 8005206: 4617 mov r7, r2 8005208: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800520a: 6821 ldr r1, [r4, #0] 800520c: 680b ldr r3, [r1, #0] 800520e: ea36 0303 bics.w r3, r6, r3 8005212: d101 bne.n 8005218 return HAL_OK; 8005214: 2000 movs r0, #0 } 8005216: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8005218: 1c6b adds r3, r5, #1 800521a: d0f7 beq.n 800520c if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 800521c: b995 cbnz r5, 8005244 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 800521e: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8005220: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8005222: 68da ldr r2, [r3, #12] 8005224: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8005228: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800522a: 695a ldr r2, [r3, #20] 800522c: f022 0201 bic.w r2, r2, #1 8005230: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8005232: 2320 movs r3, #32 8005234: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8005238: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 800523c: 2300 movs r3, #0 800523e: f884 3038 strb.w r3, [r4, #56] ; 0x38 8005242: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8005244: f7ff f83c bl 80042c0 8005248: 1bc0 subs r0, r0, r7 800524a: 4285 cmp r5, r0 800524c: d2dd bcs.n 800520a 800524e: e7e6 b.n 800521e 08005250 : { 8005250: b510 push {r4, lr} if(huart == NULL) 8005252: 4604 mov r4, r0 8005254: b340 cbz r0, 80052a8 if(huart->gState == HAL_UART_STATE_RESET) 8005256: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 800525a: f003 02ff and.w r2, r3, #255 ; 0xff 800525e: b91b cbnz r3, 8005268 huart->Lock = HAL_UNLOCKED; 8005260: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8005264: f001 fa7a bl 800675c huart->gState = HAL_UART_STATE_BUSY; 8005268: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 800526a: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 800526c: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8005270: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8005272: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8005274: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8005278: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 800527a: f7ff ff23 bl 80050c4 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 800527e: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8005280: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8005282: 691a ldr r2, [r3, #16] 8005284: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8005288: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 800528a: 695a ldr r2, [r3, #20] 800528c: f022 022a bic.w r2, r2, #42 ; 0x2a 8005290: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8005292: 68da ldr r2, [r3, #12] 8005294: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8005298: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 800529a: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 800529c: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 800529e: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 80052a2: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 80052a6: bd10 pop {r4, pc} return HAL_ERROR; 80052a8: 2001 movs r0, #1 } 80052aa: bd10 pop {r4, pc} 080052ac : { 80052ac: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80052b0: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 80052b2: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 80052b6: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 80052b8: 2b20 cmp r3, #32 { 80052ba: 460d mov r5, r1 80052bc: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 80052be: d14e bne.n 800535e if((pData == NULL) || (Size == 0U)) 80052c0: 2900 cmp r1, #0 80052c2: d049 beq.n 8005358 80052c4: 2a00 cmp r2, #0 80052c6: d047 beq.n 8005358 __HAL_LOCK(huart); 80052c8: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 80052cc: 2b01 cmp r3, #1 80052ce: d046 beq.n 800535e 80052d0: 2301 movs r3, #1 80052d2: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 80052d6: 2300 movs r3, #0 80052d8: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 80052da: 2321 movs r3, #33 ; 0x21 80052dc: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 80052e0: f7fe ffee bl 80042c0 80052e4: 4606 mov r6, r0 huart->TxXferSize = Size; 80052e6: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 80052ea: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 80052ee: 8ce3 ldrh r3, [r4, #38] ; 0x26 80052f0: b29b uxth r3, r3 80052f2: b96b cbnz r3, 8005310 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 80052f4: 463b mov r3, r7 80052f6: 4632 mov r2, r6 80052f8: 2140 movs r1, #64 ; 0x40 80052fa: 4620 mov r0, r4 80052fc: f7ff ff80 bl 8005200 8005300: b9a8 cbnz r0, 800532e huart->gState = HAL_UART_STATE_READY; 8005302: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8005304: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8005308: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 800530c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8005310: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005312: 4632 mov r2, r6 huart->TxXferCount--; 8005314: 3b01 subs r3, #1 8005316: b29b uxth r3, r3 8005318: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800531a: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800531c: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800531e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005322: 4620 mov r0, r4 8005324: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005326: d10e bne.n 8005346 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005328: f7ff ff6a bl 8005200 800532c: b110 cbz r0, 8005334 return HAL_TIMEOUT; 800532e: 2003 movs r0, #3 8005330: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 8005334: 882b ldrh r3, [r5, #0] 8005336: 6822 ldr r2, [r4, #0] 8005338: f3c3 0308 ubfx r3, r3, #0, #9 800533c: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 800533e: 6923 ldr r3, [r4, #16] 8005340: b943 cbnz r3, 8005354 pData +=2U; 8005342: 3502 adds r5, #2 8005344: e7d3 b.n 80052ee if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005346: f7ff ff5b bl 8005200 800534a: 2800 cmp r0, #0 800534c: d1ef bne.n 800532e huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 800534e: 6823 ldr r3, [r4, #0] 8005350: 782a ldrb r2, [r5, #0] 8005352: 605a str r2, [r3, #4] 8005354: 3501 adds r5, #1 8005356: e7ca b.n 80052ee return HAL_ERROR; 8005358: 2001 movs r0, #1 800535a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 800535e: 2002 movs r0, #2 } 8005360: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08005364 : if(huart->RxState == HAL_UART_STATE_READY) 8005364: f890 303a ldrb.w r3, [r0, #58] ; 0x3a 8005368: 2b20 cmp r3, #32 800536a: d120 bne.n 80053ae if((pData == NULL) || (Size == 0U)) 800536c: b1e9 cbz r1, 80053aa 800536e: b1e2 cbz r2, 80053aa __HAL_LOCK(huart); 8005370: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8005374: 2b01 cmp r3, #1 8005376: d01a beq.n 80053ae huart->RxXferCount = Size; 8005378: 85c2 strh r2, [r0, #46] ; 0x2e huart->RxXferSize = Size; 800537a: 8582 strh r2, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 800537c: 2300 movs r3, #0 huart->RxState = HAL_UART_STATE_BUSY_RX; 800537e: 2222 movs r2, #34 ; 0x22 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005380: 63c3 str r3, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8005382: f880 203a strb.w r2, [r0, #58] ; 0x3a __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8005386: 6802 ldr r2, [r0, #0] huart->pRxBuffPtr = pData; 8005388: 6281 str r1, [r0, #40] ; 0x28 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 800538a: 68d1 ldr r1, [r2, #12] __HAL_UNLOCK(huart); 800538c: f880 3038 strb.w r3, [r0, #56] ; 0x38 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8005390: f441 7180 orr.w r1, r1, #256 ; 0x100 8005394: 60d1 str r1, [r2, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8005396: 6951 ldr r1, [r2, #20] return HAL_OK; 8005398: 4618 mov r0, r3 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 800539a: f041 0101 orr.w r1, r1, #1 800539e: 6151 str r1, [r2, #20] __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 80053a0: 68d1 ldr r1, [r2, #12] 80053a2: f041 0120 orr.w r1, r1, #32 80053a6: 60d1 str r1, [r2, #12] return HAL_OK; 80053a8: 4770 bx lr return HAL_ERROR; 80053aa: 2001 movs r0, #1 80053ac: 4770 bx lr return HAL_BUSY; 80053ae: 2002 movs r0, #2 } 80053b0: 4770 bx lr 080053b2 : 80053b2: 4770 bx lr 080053b4 : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80053b4: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 80053b8: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80053ba: 2b22 cmp r3, #34 ; 0x22 80053bc: d136 bne.n 800542c if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80053be: 6883 ldr r3, [r0, #8] 80053c0: 6901 ldr r1, [r0, #16] 80053c2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 80053c6: 6802 ldr r2, [r0, #0] 80053c8: 6a83 ldr r3, [r0, #40] ; 0x28 80053ca: d123 bne.n 8005414 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80053cc: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80053ce: b9e9 cbnz r1, 800540c *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80053d0: f3c2 0208 ubfx r2, r2, #0, #9 80053d4: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 80053d8: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 80053da: 8dc4 ldrh r4, [r0, #46] ; 0x2e 80053dc: 3c01 subs r4, #1 80053de: b2a4 uxth r4, r4 80053e0: 85c4 strh r4, [r0, #46] ; 0x2e 80053e2: b98c cbnz r4, 8005408 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80053e4: 6803 ldr r3, [r0, #0] 80053e6: 68da ldr r2, [r3, #12] 80053e8: f022 0220 bic.w r2, r2, #32 80053ec: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80053ee: 68da ldr r2, [r3, #12] 80053f0: f422 7280 bic.w r2, r2, #256 ; 0x100 80053f4: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80053f6: 695a ldr r2, [r3, #20] 80053f8: f022 0201 bic.w r2, r2, #1 80053fc: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80053fe: 2320 movs r3, #32 8005400: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8005404: f000 fc62 bl 8005ccc if(--huart->RxXferCount == 0U) 8005408: 2000 movs r0, #0 } 800540a: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 800540c: b2d2 uxtb r2, r2 800540e: f823 2b01 strh.w r2, [r3], #1 8005412: e7e1 b.n 80053d8 if(huart->Init.Parity == UART_PARITY_NONE) 8005414: b921 cbnz r1, 8005420 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8005416: 1c59 adds r1, r3, #1 8005418: 6852 ldr r2, [r2, #4] 800541a: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 800541c: 701a strb r2, [r3, #0] 800541e: e7dc b.n 80053da 8005420: 6852 ldr r2, [r2, #4] 8005422: 1c59 adds r1, r3, #1 8005424: 6281 str r1, [r0, #40] ; 0x28 8005426: f002 027f and.w r2, r2, #127 ; 0x7f 800542a: e7f7 b.n 800541c return HAL_BUSY; 800542c: 2002 movs r0, #2 800542e: bd10 pop {r4, pc} 08005430 : 8005430: 4770 bx lr ... 08005434 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8005434: 6803 ldr r3, [r0, #0] { 8005436: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8005438: 681a ldr r2, [r3, #0] { 800543a: 4604 mov r4, r0 if(errorflags == RESET) 800543c: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 800543e: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8005440: 695d ldr r5, [r3, #20] if(errorflags == RESET) 8005442: d107 bne.n 8005454 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8005444: 0696 lsls r6, r2, #26 8005446: d55a bpl.n 80054fe 8005448: 068d lsls r5, r1, #26 800544a: d558 bpl.n 80054fe } 800544c: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8005450: f7ff bfb0 b.w 80053b4 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8005454: f015 0501 ands.w r5, r5, #1 8005458: d102 bne.n 8005460 800545a: f411 7f90 tst.w r1, #288 ; 0x120 800545e: d04e beq.n 80054fe if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8005460: 07d3 lsls r3, r2, #31 8005462: d505 bpl.n 8005470 8005464: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 8005466: bf42 ittt mi 8005468: 6be3 ldrmi r3, [r4, #60] ; 0x3c 800546a: f043 0301 orrmi.w r3, r3, #1 800546e: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8005470: 0750 lsls r0, r2, #29 8005472: d504 bpl.n 800547e 8005474: b11d cbz r5, 800547e huart->ErrorCode |= HAL_UART_ERROR_NE; 8005476: 6be3 ldr r3, [r4, #60] ; 0x3c 8005478: f043 0302 orr.w r3, r3, #2 800547c: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 800547e: 0793 lsls r3, r2, #30 8005480: d504 bpl.n 800548c 8005482: b11d cbz r5, 800548c huart->ErrorCode |= HAL_UART_ERROR_FE; 8005484: 6be3 ldr r3, [r4, #60] ; 0x3c 8005486: f043 0304 orr.w r3, r3, #4 800548a: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 800548c: 0716 lsls r6, r2, #28 800548e: d504 bpl.n 800549a 8005490: b11d cbz r5, 800549a huart->ErrorCode |= HAL_UART_ERROR_ORE; 8005492: 6be3 ldr r3, [r4, #60] ; 0x3c 8005494: f043 0308 orr.w r3, r3, #8 8005498: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 800549a: 6be3 ldr r3, [r4, #60] ; 0x3c 800549c: 2b00 cmp r3, #0 800549e: d066 beq.n 800556e if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80054a0: 0695 lsls r5, r2, #26 80054a2: d504 bpl.n 80054ae 80054a4: 0688 lsls r0, r1, #26 80054a6: d502 bpl.n 80054ae UART_Receive_IT(huart); 80054a8: 4620 mov r0, r4 80054aa: f7ff ff83 bl 80053b4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80054ae: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 80054b0: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80054b2: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 80054b4: 6be2 ldr r2, [r4, #60] ; 0x3c 80054b6: 0711 lsls r1, r2, #28 80054b8: d402 bmi.n 80054c0 80054ba: f015 0540 ands.w r5, r5, #64 ; 0x40 80054be: d01a beq.n 80054f6 UART_EndRxTransfer(huart); 80054c0: f7ff fdf2 bl 80050a8 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80054c4: 6823 ldr r3, [r4, #0] 80054c6: 695a ldr r2, [r3, #20] 80054c8: 0652 lsls r2, r2, #25 80054ca: d510 bpl.n 80054ee CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80054cc: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 80054ce: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80054d0: f022 0240 bic.w r2, r2, #64 ; 0x40 80054d4: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 80054d6: b150 cbz r0, 80054ee huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 80054d8: 4b25 ldr r3, [pc, #148] ; (8005570 ) 80054da: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 80054dc: f7fe ff70 bl 80043c0 80054e0: 2800 cmp r0, #0 80054e2: d044 beq.n 800556e huart->hdmarx->XferAbortCallback(huart->hdmarx); 80054e4: 6b60 ldr r0, [r4, #52] ; 0x34 } 80054e6: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 80054ea: 6b43 ldr r3, [r0, #52] ; 0x34 80054ec: 4718 bx r3 HAL_UART_ErrorCallback(huart); 80054ee: 4620 mov r0, r4 80054f0: f7ff ff9e bl 8005430 80054f4: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 80054f6: f7ff ff9b bl 8005430 huart->ErrorCode = HAL_UART_ERROR_NONE; 80054fa: 63e5 str r5, [r4, #60] ; 0x3c 80054fc: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 80054fe: 0616 lsls r6, r2, #24 8005500: d527 bpl.n 8005552 8005502: 060d lsls r5, r1, #24 8005504: d525 bpl.n 8005552 if(huart->gState == HAL_UART_STATE_BUSY_TX) 8005506: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 800550a: 2a21 cmp r2, #33 ; 0x21 800550c: d12f bne.n 800556e if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800550e: 68a2 ldr r2, [r4, #8] 8005510: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8005514: 6a22 ldr r2, [r4, #32] 8005516: d117 bne.n 8005548 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8005518: 8811 ldrh r1, [r2, #0] 800551a: f3c1 0108 ubfx r1, r1, #0, #9 800551e: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005520: 6921 ldr r1, [r4, #16] 8005522: b979 cbnz r1, 8005544 huart->pTxBuffPtr += 2U; 8005524: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 8005526: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8005528: 8ce2 ldrh r2, [r4, #38] ; 0x26 800552a: 3a01 subs r2, #1 800552c: b292 uxth r2, r2 800552e: 84e2 strh r2, [r4, #38] ; 0x26 8005530: b9ea cbnz r2, 800556e __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8005532: 68da ldr r2, [r3, #12] 8005534: f022 0280 bic.w r2, r2, #128 ; 0x80 8005538: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 800553a: 68da ldr r2, [r3, #12] 800553c: f042 0240 orr.w r2, r2, #64 ; 0x40 8005540: 60da str r2, [r3, #12] 8005542: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8005544: 3201 adds r2, #1 8005546: e7ee b.n 8005526 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8005548: 1c51 adds r1, r2, #1 800554a: 6221 str r1, [r4, #32] 800554c: 7812 ldrb r2, [r2, #0] 800554e: 605a str r2, [r3, #4] 8005550: e7ea b.n 8005528 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8005552: 0650 lsls r0, r2, #25 8005554: d50b bpl.n 800556e 8005556: 064a lsls r2, r1, #25 8005558: d509 bpl.n 800556e __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 800555a: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 800555c: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 800555e: f022 0240 bic.w r2, r2, #64 ; 0x40 8005562: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8005564: 2320 movs r3, #32 8005566: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 800556a: f7ff ff22 bl 80053b2 800556e: bd70 pop {r4, r5, r6, pc} 8005570: 08005575 .word 0x08005575 08005574 : { 8005574: b508 push {r3, lr} huart->RxXferCount = 0x00U; 8005576: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005578: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 800557a: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 800557c: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 800557e: f7ff ff57 bl 8005430 8005582: bd08 pop {r3, pc} 08005584 : void SPI_Delay(int ustime) { volatile int i; volatile int k; for(i = 0; i < ustime; i++) 8005584: 2300 movs r3, #0 { 8005586: b082 sub sp, #8 for(i = 0; i < ustime; i++) 8005588: 9300 str r3, [sp, #0] 800558a: 9b00 ldr r3, [sp, #0] 800558c: 4283 cmp r3, r0 800558e: db01 blt.n 8005594 { k++; } } 8005590: b002 add sp, #8 8005592: 4770 bx lr k++; 8005594: 9b01 ldr r3, [sp, #4] 8005596: 3301 adds r3, #1 8005598: 9301 str r3, [sp, #4] for(i = 0; i < ustime; i++) 800559a: 9b00 ldr r3, [sp, #0] 800559c: 3301 adds r3, #1 800559e: e7f3 b.n 8005588 080055a0 : #if 1 // PYJ.2019.04.02_BEGIN -- #ifdef STM32F1 void SpiInOut(uint8_t addr_write) { 80055a0: b570 push {r4, r5, r6, lr} 80055a2: 4605 mov r5, r0 80055a4: 2408 movs r4, #8 for (i = 0; i < 8; i++) { SPI_Delay(SDA_SETUP_TIME); Clr_SX1278_SCK(); 80055a6: 4e14 ldr r6, [pc, #80] ; (80055f8 ) SPI_Delay(SDA_SETUP_TIME); 80055a8: 2004 movs r0, #4 80055aa: f7ff ffeb bl 8005584 Clr_SX1278_SCK(); 80055ae: 2200 movs r2, #0 80055b0: 2108 movs r1, #8 80055b2: 4630 mov r0, r6 80055b4: f7ff f918 bl 80047e8 if (addr_write & 0x80) 80055b8: 062b lsls r3, r5, #24 { Set_SX1278_SDI(); 80055ba: bf4c ite mi 80055bc: 2201 movmi r2, #1 } else { Clr_SX1278_SDI(); 80055be: 2200 movpl r2, #0 80055c0: 2120 movs r1, #32 80055c2: 4630 mov r0, r6 80055c4: f7ff f910 bl 80047e8 } SPI_Delay(SDA_SETUP_TIME); 80055c8: 2004 movs r0, #4 80055ca: f7ff ffdb bl 8005584 Set_SX1278_SCK(); 80055ce: 2201 movs r2, #1 80055d0: 2108 movs r1, #8 80055d2: 4630 mov r0, r6 80055d4: f7ff f908 bl 80047e8 80055d8: 3c01 subs r4, #1 addr_write = addr_write << 1; SPI_Delay(SDA_SETUP_TIME); 80055da: 2004 movs r0, #4 addr_write = addr_write << 1; 80055dc: 006d lsls r5, r5, #1 SPI_Delay(SDA_SETUP_TIME); 80055de: f7ff ffd1 bl 8005584 for (i = 0; i < 8; i++) 80055e2: f014 04ff ands.w r4, r4, #255 ; 0xff addr_write = addr_write << 1; 80055e6: b2ed uxtb r5, r5 for (i = 0; i < 8; i++) 80055e8: d1de bne.n 80055a8 } Clr_SX1278_SCK(); 80055ea: 4622 mov r2, r4 } 80055ec: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} Clr_SX1278_SCK(); 80055f0: 2108 movs r1, #8 80055f2: 4801 ldr r0, [pc, #4] ; (80055f8 ) 80055f4: f7ff b8f8 b.w 80047e8 80055f8: 40010c00 .word 0x40010c00 080055fc : uint8_t SpiRead(void) { 80055fc: b570 push {r4, r5, r6, lr} 80055fe: 2508 movs r5, #8 uint8_t i = 0,Readdata = 0; 8005600: 2400 movs r4, #0 for (i = 0; i < 8; i++) { Readdata <<= 1; SPI_Delay(SDA_SETUP_TIME); Set_SX1278_SCK(); 8005602: 4e10 ldr r6, [pc, #64] ; (8005644 ) SPI_Delay(SDA_SETUP_TIME); 8005604: 2004 movs r0, #4 8005606: f7ff ffbd bl 8005584 Set_SX1278_SCK(); 800560a: 2108 movs r1, #8 800560c: 4630 mov r0, r6 800560e: 2201 movs r2, #1 8005610: f7ff f8ea bl 80047e8 Readdata <<= 1; 8005614: 0064 lsls r4, r4, #1 if (Read_SX1278_SDO()) 8005616: 2110 movs r1, #16 8005618: 4630 mov r0, r6 Readdata <<= 1; 800561a: b2e4 uxtb r4, r4 if (Read_SX1278_SDO()) 800561c: f7ff f8de bl 80047dc 8005620: b108 cbz r0, 8005626 Readdata |= 0x01; 8005622: f044 0401 orr.w r4, r4, #1 else Readdata &= 0xfe; SPI_Delay(SDA_SETUP_TIME); 8005626: 2004 movs r0, #4 8005628: f7ff ffac bl 8005584 800562c: 3d01 subs r5, #1 Clr_SX1278_SCK(); 800562e: 2200 movs r2, #0 8005630: 2108 movs r1, #8 8005632: 4630 mov r0, r6 8005634: f7ff f8d8 bl 80047e8 for (i = 0; i < 8; i++) 8005638: f015 05ff ands.w r5, r5, #255 ; 0xff 800563c: d1e2 bne.n 8005604 } return Readdata; } 800563e: 4620 mov r0, r4 8005640: bd70 pop {r4, r5, r6, pc} 8005642: bf00 nop 8005644: 40010c00 .word 0x40010c00 08005648 : // Lora_MOSI_SET; // SPI_Delay(SDA_SETUP_TIME); } #else void BLUECELL_SPI_Transmit(uint8_t data) { SpiInOut(data); 8005648: f7ff bfaa b.w 80055a0 0800564c : void RGB_Response_Func(uint8_t* data); void RGB_Response_Func(uint8_t* data){ 800564c: b510 push {r4, lr} #if 0 for(uint8_t i = 0; i < 10; i++){ printf("%02x ",data[i]); } #endif switch(type){ 800564e: 7843 ldrb r3, [r0, #1] void RGB_Response_Func(uint8_t* data){ 8005650: 4604 mov r4, r0 switch(type){ 8005652: 3b01 subs r3, #1 8005654: 2b08 cmp r3, #8 8005656: d822 bhi.n 800569e 8005658: e8df f003 tbb [pc, r3] 800565c: 21170517 .word 0x21170517 8005660: 17170d0b .word 0x17170d0b 8005664: 1d .byte 0x1d 8005665: 00 .byte 0x00 case RGB_Status_Data_Request: Uart2_Data_Send(data,RGB_SensorDataRequest_Length); break; case RGB_ControllerID_SET: Uart1_Data_Send(data,RGB_ControllerID_SET_Length); 8005666: 210a movs r1, #10 break; case RGB_SensorID_SET: Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); break; case RGB_Status_Data_Response: Uart1_Data_Send(data,RGB_SensorDataResponse_Length); 8005668: 4620 mov r0, r4 case RGB_SensorID_SET_Success: break; } } 800566a: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(data,RGB_SensorDataResponse_Length); 800566e: f000 bbcb b.w 8005e08 8005672: 210f movs r1, #15 8005674: e7f8 b.n 8005668 Uart1_Data_Send(data,data[blucell_length] + 3); 8005676: 7881 ldrb r1, [r0, #2] 8005678: 3103 adds r1, #3 800567a: b2c9 uxtb r1, r1 800567c: f000 fbc4 bl 8005e08 Flash_write(&data[0]); 8005680: 4620 mov r0, r4 } 8005682: e8bd 4010 ldmia.w sp!, {r4, lr} Flash_write(&data[0]); 8005686: f000 bd47 b.w 8006118 Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); 800568a: 2107 movs r1, #7 Uart2_Data_Send(data,data[blucell_length] + 3); 800568c: 4620 mov r0, r4 } 800568e: e8bd 4010 ldmia.w sp!, {r4, lr} Uart2_Data_Send(data,data[blucell_length] + 3); 8005692: f000 bbb1 b.w 8005df8 8005696: 7881 ldrb r1, [r0, #2] 8005698: 3103 adds r1, #3 800569a: b2c9 uxtb r1, r1 800569c: e7f6 b.n 800568c 800569e: bd10 pop {r4, pc} 080056a0 : uint16_t Sensor_red[9] = {0,}; uint16_t Sensor_green[9] = {0,}; uint16_t Sensor_blue[9] = {0,}; void RGB_Alarm_Check(uint8_t* data){ 80056a0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} Sensor_red[data[blucell_srcid]] = ((data[blucell_red_H + 2] << 8)| data[blucell_red_L + 2]); 80056a4: 7981 ldrb r1, [r0, #6] 80056a6: 79c3 ldrb r3, [r0, #7] 80056a8: 78c2 ldrb r2, [r0, #3] 80056aa: 4c2d ldr r4, [pc, #180] ; (8005760 ) 80056ac: ea43 2301 orr.w r3, r3, r1, lsl #8 80056b0: f824 3012 strh.w r3, [r4, r2, lsl #1] Sensor_green[data[blucell_srcid]] = ((data[blucell_green_H + 2] << 8)| data[blucell_green_L + 2]); 80056b4: 7a05 ldrb r5, [r0, #8] 80056b6: 7a43 ldrb r3, [r0, #9] 80056b8: 78c2 ldrb r2, [r0, #3] 80056ba: 492a ldr r1, [pc, #168] ; (8005764 ) 80056bc: ea43 2305 orr.w r3, r3, r5, lsl #8 80056c0: f821 3012 strh.w r3, [r1, r2, lsl #1] Sensor_blue[data[blucell_srcid]] = ((data[blucell_blue_H + 2] << 8)| data[blucell_blue_L + 2]); 80056c4: 7a86 ldrb r6, [r0, #10] 80056c6: 7ac3 ldrb r3, [r0, #11] 80056c8: 78c5 ldrb r5, [r0, #3] 80056ca: 4a27 ldr r2, [pc, #156] ; (8005768 ) 80056cc: ea43 2306 orr.w r3, r3, r6, lsl #8 80056d0: f822 3015 strh.w r3, [r2, r5, lsl #1] uint8_t LED_Alarm = 0; for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80056d4: 4b25 ldr r3, [pc, #148] ; (800576c ) 80056d6: 4608 mov r0, r1 80056d8: f893 c000 ldrb.w ip, [r3] 80056dc: 4611 mov r1, r2 80056de: 2301 movs r3, #1 if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 80056e0: 4d23 ldr r5, [pc, #140] ; (8005770 ) 80056e2: 4e24 ldr r6, [pc, #144] ; (8005774 ) || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]] 80056e4: 4f24 ldr r7, [pc, #144] ; (8005778 ) || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 80056e6: f8df e0a0 ldr.w lr, [pc, #160] ; 8005788 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80056ea: 4563 cmp r3, ip 80056ec: d90d bls.n 800570a if(LED_Alarm == 1){ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_SET); }else{ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET); 80056ee: 2200 movs r2, #0 80056f0: f44f 5180 mov.w r1, #4096 ; 0x1000 80056f4: 4821 ldr r0, [pc, #132] ; (800577c ) 80056f6: f7ff f877 bl 80047e8 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_SET); 80056fa: 2201 movs r2, #1 80056fc: f44f 5100 mov.w r1, #8192 ; 0x2000 8005700: 481f ldr r0, [pc, #124] ; (8005780 ) 8005702: f7ff f871 bl 80047e8 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_RESET); 8005706: 2200 movs r2, #0 8005708: e022 b.n 8005750 if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 800570a: 5cea ldrb r2, [r5, r3] 800570c: f836 9012 ldrh.w r9, [r6, r2, lsl #1] 8005710: f834 8012 ldrh.w r8, [r4, r2, lsl #1] 8005714: 45c1 cmp r9, r8 8005716: d20e bcs.n 8005736 || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]] 8005718: f837 9012 ldrh.w r9, [r7, r2, lsl #1] 800571c: f830 8012 ldrh.w r8, [r0, r2, lsl #1] 8005720: 45c1 cmp r9, r8 8005722: d208 bcs.n 8005736 || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 8005724: f83e 8012 ldrh.w r8, [lr, r2, lsl #1] 8005728: f831 2012 ldrh.w r2, [r1, r2, lsl #1] 800572c: 4590 cmp r8, r2 800572e: d202 bcs.n 8005736 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8005730: 3301 adds r3, #1 8005732: b2db uxtb r3, r3 8005734: e7d9 b.n 80056ea HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET); 8005736: 2201 movs r2, #1 8005738: f44f 5180 mov.w r1, #4096 ; 0x1000 800573c: 480f ldr r0, [pc, #60] ; (800577c ) 800573e: f7ff f853 bl 80047e8 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET); 8005742: 2200 movs r2, #0 8005744: f44f 5100 mov.w r1, #8192 ; 0x2000 8005748: 480d ldr r0, [pc, #52] ; (8005780 ) 800574a: f7ff f84d bl 80047e8 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_SET); 800574e: 2201 movs r2, #1 } } 8005750: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_RESET); 8005754: f44f 6180 mov.w r1, #1024 ; 0x400 8005758: 480a ldr r0, [pc, #40] ; (8005784 ) 800575a: f7ff b845 b.w 80047e8 800575e: bf00 nop 8005760: 200000f0 .word 0x200000f0 8005764: 200000de .word 0x200000de 8005768: 200000cc .word 0x200000cc 800576c: 200000c2 .word 0x200000c2 8005770: 200000c3 .word 0x200000c3 8005774: 200000b0 .word 0x200000b0 8005778: 2000009e .word 0x2000009e 800577c: 40010c00 .word 0x40010c00 8005780: 40010800 .word 0x40010800 8005784: 40011000 .word 0x40011000 8005788: 2000008c .word 0x2000008c 0800578c : uint8_t RGB_DeviceStatusCheck(void){ 800578c: b530 push {r4, r5, lr} uint8_t ret = 0; for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800578e: 4b09 ldr r3, [pc, #36] ; (80057b4 ) uint8_t ret = 0; 8005790: 2000 movs r0, #0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 8005792: 7819 ldrb r1, [r3, #0] 8005794: 2301 movs r3, #1 if(SensorID_buf[i] > 0){ ret += 0x01 << (SensorID_buf[i] - 1); 8005796: 461d mov r5, r3 if(SensorID_buf[i] > 0){ 8005798: 4c07 ldr r4, [pc, #28] ; (80057b8 ) for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800579a: 428b cmp r3, r1 800579c: d900 bls.n 80057a0 } } return ret; } 800579e: bd30 pop {r4, r5, pc} if(SensorID_buf[i] > 0){ 80057a0: 5ce2 ldrb r2, [r4, r3] 80057a2: b122 cbz r2, 80057ae ret += 0x01 << (SensorID_buf[i] - 1); 80057a4: 3a01 subs r2, #1 80057a6: fa05 f202 lsl.w r2, r5, r2 80057aa: 4410 add r0, r2 80057ac: b2c0 uxtb r0, r0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 80057ae: 3301 adds r3, #1 80057b0: b2db uxtb r3, r3 80057b2: e7f2 b.n 800579a 80057b4: 200000c2 .word 0x200000c2 80057b8: 200000c3 .word 0x200000c3 080057bc : uint8_t datalosscnt[9] = {0,}; void RGB_Controller_Func(uint8_t* data){ 80057bc: b530 push {r4, r5, lr} RGB_CMD_T type = data[blucell_type]; 80057be: 7845 ldrb r5, [r0, #1] void RGB_Controller_Func(uint8_t* data){ 80057c0: b09b sub sp, #108 ; 0x6c 80057c2: 4604 mov r4, r0 // static uint8_t temp_sensorid; uint8_t Result_buf[100] = {0,}; 80057c4: 2264 movs r2, #100 ; 0x64 80057c6: 2100 movs r1, #0 80057c8: a801 add r0, sp, #4 80057ca: f001 f8c0 bl 800694e switch(type){ 80057ce: 1e6b subs r3, r5, #1 80057d0: 2b09 cmp r3, #9 80057d2: d824 bhi.n 800581e 80057d4: e8df f003 tbb [pc, r3] 80057d8: 46342805 .word 0x46342805 80057dc: 23236b4f .word 0x23236b4f 80057e0: 9223 .short 0x9223 case RGB_Status_Data_Request: datalosscnt[data[blucell_srcid + 1]]++; 80057e2: 4b4d ldr r3, [pc, #308] ; (8005918 ) 80057e4: 7921 ldrb r1, [r4, #4] 80057e6: 5c5a ldrb r2, [r3, r1] 80057e8: 3201 adds r2, #1 80057ea: 545a strb r2, [r3, r1] if(datalosscnt[data[blucell_srcid + 1]] > 3 && data[blucell_srcid + 1] != 0){ 80057ec: 7922 ldrb r2, [r4, #4] 80057ee: 5c9b ldrb r3, [r3, r2] 80057f0: 2b03 cmp r3, #3 80057f2: d907 bls.n 8005804 80057f4: b132 cbz r2, 8005804 RGB_SensorIDAutoSet(1); 80057f6: 2001 movs r0, #1 80057f8: f000 fb64 bl 8005ec4 memset(&SensorID_buf[0],0x00,8); 80057fc: 2200 movs r2, #0 80057fe: 4b47 ldr r3, [pc, #284] ; (800591c ) 8005800: 601a str r2, [r3, #0] 8005802: 605a str r2, [r3, #4] } data[5] = STH30_CreateCrc(&data[blucell_type],data[blucell_length]); 8005804: 78a1 ldrb r1, [r4, #2] 8005806: 1c60 adds r0, r4, #1 8005808: f000 ff08 bl 800661c 800580c: 7160 strb r0, [r4, #5] memcpy(&Result_buf[blucell_stx],&data[blucell_stx],RGB_SensorDataRequest_Length); 800580e: 88a2 ldrh r2, [r4, #4] 8005810: 6820 ldr r0, [r4, #0] 8005812: 79a3 ldrb r3, [r4, #6] 8005814: 9001 str r0, [sp, #4] 8005816: f8ad 2008 strh.w r2, [sp, #8] 800581a: f88d 300a strb.w r3, [sp, #10] break; default: break; } RGB_Response_Func(&Result_buf[blucell_stx]); 800581e: a801 add r0, sp, #4 8005820: f7ff ff14 bl 800564c return; } 8005824: b01b add sp, #108 ; 0x6c 8005826: bd30 pop {r4, r5, pc} memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 8005828: 78a2 ldrb r2, [r4, #2] 800582a: 4621 mov r1, r4 800582c: 3203 adds r2, #3 800582e: a801 add r0, sp, #4 8005830: f001 f882 bl 8006938 MyControllerID = Result_buf[7] = data[7];//�긽��諛⑹쓽 DST ID �뒗 �굹�쓽 ID �씠�떎. 8005834: 79e3 ldrb r3, [r4, #7] 8005836: 4a3a ldr r2, [pc, #232] ; (8005920 ) 8005838: f88d 300b strb.w r3, [sp, #11] 800583c: 7013 strb r3, [r2, #0] break; 800583e: e7ee b.n 800581e RGB_SensorIDAutoSet(1); 8005840: 2001 movs r0, #1 8005842: f000 fb3f bl 8005ec4 memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 8005846: 78a2 ldrb r2, [r4, #2] 8005848: 4621 mov r1, r4 800584a: 3203 adds r2, #3 800584c: a801 add r0, sp, #4 800584e: f001 f873 bl 8006938 Result_buf[5] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 8005852: f89d 1006 ldrb.w r1, [sp, #6] 8005856: f10d 0005 add.w r0, sp, #5 800585a: f000 fedf bl 800661c 800585e: f88d 0009 strb.w r0, [sp, #9] break; 8005862: e7dc b.n 800581e SensorID_Cnt++; 8005864: 4a2f ldr r2, [pc, #188] ; (8005924 ) SensorID_buf[SensorID_Cnt] = data[blucell_length + 1]; 8005866: 78e1 ldrb r1, [r4, #3] SensorID_Cnt++; 8005868: 7813 ldrb r3, [r2, #0] 800586a: 3301 adds r3, #1 800586c: b2db uxtb r3, r3 800586e: 7013 strb r3, [r2, #0] SensorID_buf[SensorID_Cnt] = data[blucell_length + 1]; 8005870: 4a2a ldr r2, [pc, #168] ; (800591c ) 8005872: 54d1 strb r1, [r2, r3] break; 8005874: e7d3 b.n 800581e datalosscnt[data[blucell_srcid]] = 0; 8005876: 2100 movs r1, #0 8005878: 78e3 ldrb r3, [r4, #3] 800587a: 4a27 ldr r2, [pc, #156] ; (8005918 ) 800587c: 54d1 strb r1, [r2, r3] data[blucell_length] += 1;// Device On OFF status Send byte 800587e: 78a5 ldrb r5, [r4, #2] 8005880: 3501 adds r5, #1 8005882: b2ed uxtb r5, r5 8005884: 70a5 strb r5, [r4, #2] data[blucell_srcid + 9] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 8005886: f7ff ff81 bl 800578c memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 800588a: 1cea adds r2, r5, #3 data[blucell_srcid + 9] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 800588c: 7320 strb r0, [r4, #12] memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 800588e: 4621 mov r1, r4 8005890: a801 add r0, sp, #4 8005892: f001 f851 bl 8006938 Result_buf[5] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 8005896: f89d 1006 ldrb.w r1, [sp, #6] 800589a: f10d 0005 add.w r0, sp, #5 800589e: f000 febd bl 800661c 80058a2: f88d 0009 strb.w r0, [sp, #9] RGB_Alarm_Check(&data[blucell_stx]); 80058a6: 4620 mov r0, r4 80058a8: f7ff fefa bl 80056a0 break; 80058ac: e7b7 b.n 800581e memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 80058ae: 78a2 ldrb r2, [r4, #2] 80058b0: 4621 mov r1, r4 80058b2: 3203 adds r2, #3 80058b4: a801 add r0, sp, #4 80058b6: f001 f83f bl 8006938 RGB_SensorRedLimit_Buf[data[blucell_dstid]] = ((data[blucell_red_H] << 8) |data[blucell_red_L]); 80058ba: 7922 ldrb r2, [r4, #4] 80058bc: 7963 ldrb r3, [r4, #5] 80058be: 7aa1 ldrb r1, [r4, #10] 80058c0: ea43 2302 orr.w r3, r3, r2, lsl #8 80058c4: 4a18 ldr r2, [pc, #96] ; (8005928 ) Result_buf[blucell_crc] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 80058c6: f10d 0005 add.w r0, sp, #5 RGB_SensorRedLimit_Buf[data[blucell_dstid]] = ((data[blucell_red_H] << 8) |data[blucell_red_L]); 80058ca: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorGreenLimit_Buf[data[blucell_dstid]] = ((data[blucell_green_H] << 8) |data[blucell_green_L]); 80058ce: 79a2 ldrb r2, [r4, #6] 80058d0: 79e3 ldrb r3, [r4, #7] 80058d2: 7aa1 ldrb r1, [r4, #10] 80058d4: ea43 2302 orr.w r3, r3, r2, lsl #8 80058d8: 4a14 ldr r2, [pc, #80] ; (800592c ) 80058da: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorBlueLimit_Buf[data[blucell_dstid]] = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); 80058de: 7a22 ldrb r2, [r4, #8] 80058e0: 7a63 ldrb r3, [r4, #9] 80058e2: 7aa1 ldrb r1, [r4, #10] 80058e4: ea43 2302 orr.w r3, r3, r2, lsl #8 80058e8: 4a11 ldr r2, [pc, #68] ; (8005930 ) 80058ea: f822 3011 strh.w r3, [r2, r1, lsl #1] Result_buf[blucell_crc] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 80058ee: f89d 1006 ldrb.w r1, [sp, #6] 80058f2: f000 fe93 bl 800661c 80058f6: f88d 000f strb.w r0, [sp, #15] break; 80058fa: e790 b.n 800581e \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 80058fc: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8005900: 490c ldr r1, [pc, #48] ; (8005934 ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8005902: 4b0d ldr r3, [pc, #52] ; (8005938 ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8005904: 68ca ldr r2, [r1, #12] 8005906: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800590a: 4313 orrs r3, r2 800590c: 60cb str r3, [r1, #12] 800590e: f3bf 8f4f dsb sy __ASM volatile ("nop"); 8005912: bf00 nop 8005914: e7fd b.n 8005912 8005916: bf00 nop 8005918: 20000102 .word 0x20000102 800591c: 200000c3 .word 0x200000c3 8005920: 200002a4 .word 0x200002a4 8005924: 200000c2 .word 0x200000c2 8005928: 200000b0 .word 0x200000b0 800592c: 2000009e .word 0x2000009e 8005930: 2000008c .word 0x2000008c 8005934: e000ed00 .word 0xe000ed00 8005938: 05fa0004 .word 0x05fa0004 0800593c : SX1276_hw_SetNSS(hw, 1); HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); } __weak void SX1276_hw_SetNSS(SX1276_hw_t * hw, int value) { HAL_GPIO_WritePin(hw->nss.port, hw->nss.pin, 800593c: 1e4b subs r3, r1, #1 800593e: 425a negs r2, r3 8005940: 8a01 ldrh r1, [r0, #16] 8005942: 415a adcs r2, r3 8005944: 6940 ldr r0, [r0, #20] 8005946: f7fe bf4f b.w 80047e8 0800594a : __weak void SX1276_hw_init(SX1276_hw_t * hw) { 800594a: b510 push {r4, lr} 800594c: 4604 mov r4, r0 SX1276_hw_SetNSS(hw, 1); 800594e: 2101 movs r1, #1 8005950: f7ff fff4 bl 800593c HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 8005954: 8821 ldrh r1, [r4, #0] 8005956: 6860 ldr r0, [r4, #4] 8005958: 2201 movs r2, #1 } 800595a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 800595e: f7fe bf43 b.w 80047e8 08005962 : HAL_SPI_Transmit(hw->spi, &cmd, 1, 1000); while (HAL_SPI_GetState(hw->spi) != HAL_SPI_STATE_READY) ; } #endif // PYJ.2019.04.01_END -- void SX1276_hw_SPICommand(SX1276_hw_t * hw, uint8_t cmd) { 8005962: b510 push {r4, lr} 8005964: 460c mov r4, r1 SX1276_hw_SetNSS(hw, 0); 8005966: 2100 movs r1, #0 8005968: f7ff ffe8 bl 800593c BLUECELL_SPI_Transmit(cmd); 800596c: 4620 mov r0, r4 } 800596e: e8bd 4010 ldmia.w sp!, {r4, lr} BLUECELL_SPI_Transmit(cmd); 8005972: f7ff be69 b.w 8005648 08005976 : //printf("\n"); SX1276_hw_SetNSS(module->hw, 1); } } void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 8005976: b5f8 push {r3, r4, r5, r6, r7, lr} 8005978: 460e mov r6, r1 800597a: 4604 mov r4, r0 800597c: 461f mov r7, r3 uint8_t length) { uint8_t i; if (length <= 1) { return; } else { SX1276_hw_SetNSS(module->hw, 0); 800597e: 2100 movs r1, #0 8005980: 6800 ldr r0, [r0, #0] void SX1276_SPIBurstWrite(SX1276_t * module, uint8_t addr, uint8_t* txBuf, 8005982: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 8005984: f7ff ffda bl 800593c SX1276_hw_SPICommand(module->hw, addr | 0x80); 8005988: f046 0180 orr.w r1, r6, #128 ; 0x80 800598c: 6820 ldr r0, [r4, #0] 800598e: f7ff ffe8 bl 8005962 8005992: 3f01 subs r7, #1 8005994: 1e6e subs r6, r5, #1 8005996: 443d add r5, r7 for (i = 0; i < length; i++) { 8005998: 42ae cmp r6, r5 800599a: d104 bne.n 80059a6 SX1276_hw_SPICommand(module->hw, txBuf[i]); } SX1276_hw_SetNSS(module->hw, 1); 800599c: 2101 movs r1, #1 800599e: 6820 ldr r0, [r4, #0] 80059a0: f7ff ffcc bl 800593c 80059a4: bdf8 pop {r3, r4, r5, r6, r7, pc} SX1276_hw_SPICommand(module->hw, txBuf[i]); 80059a6: f816 1f01 ldrb.w r1, [r6, #1]! 80059aa: 6820 ldr r0, [r4, #0] 80059ac: f7ff ffd9 bl 8005962 80059b0: e7f2 b.n 8005998 080059b2 : uint8_t SX1276_hw_SPIReadByte(SX1276_hw_t * hw) { 80059b2: b508 push {r3, lr} SX1276_hw_SetNSS(hw, 0); 80059b4: 2100 movs r1, #0 80059b6: f7ff ffc1 bl 800593c rxByte = SpiRead(); 80059ba: f7ff fe1f bl 80055fc } 80059be: b2c0 uxtb r0, r0 80059c0: bd08 pop {r3, pc} 080059c2 : HAL_Delay(msec); 80059c2: f7fe bc83 b.w 80042cc 080059c6 : __weak void SX1276_hw_Reset(SX1276_hw_t * hw) { 80059c6: b510 push {r4, lr} 80059c8: 4604 mov r4, r0 SX1276_hw_SetNSS(hw, 1); 80059ca: 2101 movs r1, #1 80059cc: f7ff ffb6 bl 800593c HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_RESET); 80059d0: 8821 ldrh r1, [r4, #0] 80059d2: 2200 movs r2, #0 80059d4: 6860 ldr r0, [r4, #4] 80059d6: f7fe ff07 bl 80047e8 SX1276_hw_DelayMs(1); 80059da: 2001 movs r0, #1 80059dc: f7ff fff1 bl 80059c2 HAL_GPIO_WritePin(hw->reset.port, hw->reset.pin, GPIO_PIN_SET); 80059e0: 6860 ldr r0, [r4, #4] 80059e2: 2201 movs r2, #1 80059e4: 8821 ldrh r1, [r4, #0] 80059e6: f7fe feff bl 80047e8 SX1276_hw_DelayMs(100); 80059ea: 2064 movs r0, #100 ; 0x64 80059ec: f7ff ffe9 bl 80059c2 80059f0: bd10 pop {r4, pc} 080059f2 : uint8_t SX1276_SPIIDRead(SX1276_t * module, uint8_t addr) { 80059f2: b538 push {r3, r4, r5, lr} 80059f4: 4604 mov r4, r0 SX1276_hw_SPICommand(module->hw, addr); 80059f6: 6800 ldr r0, [r0, #0] 80059f8: f7ff ffb3 bl 8005962 tmp = SX1276_hw_SPIReadByte(module->hw); 80059fc: 6820 ldr r0, [r4, #0] 80059fe: f7ff ffd8 bl 80059b2 8005a02: 4605 mov r5, r0 SX1276_hw_SetNSS(module->hw, 1); 8005a04: 2101 movs r1, #1 8005a06: 6820 ldr r0, [r4, #0] 8005a08: f7ff ff98 bl 800593c } 8005a0c: 4628 mov r0, r5 8005a0e: bd38 pop {r3, r4, r5, pc} 08005a10 : void SX1276_SPIWrite(SX1276_t * module, uint8_t addr, uint8_t cmd) { 8005a10: b570 push {r4, r5, r6, lr} 8005a12: 4604 mov r4, r0 8005a14: 460e mov r6, r1 8005a16: 4615 mov r5, r2 SX1276_hw_SetNSS(module->hw, 0); 8005a18: 2100 movs r1, #0 8005a1a: 6800 ldr r0, [r0, #0] 8005a1c: f7ff ff8e bl 800593c SX1276_hw_SPICommand(module->hw, addr | 0x80); 8005a20: f046 0180 orr.w r1, r6, #128 ; 0x80 8005a24: 6820 ldr r0, [r4, #0] 8005a26: f7ff ff9c bl 8005962 SX1276_hw_SPICommand(module->hw, cmd); 8005a2a: 4629 mov r1, r5 8005a2c: 6820 ldr r0, [r4, #0] 8005a2e: f7ff ff98 bl 8005962 SX1276_hw_SetNSS(module->hw, 1); 8005a32: 2101 movs r1, #1 8005a34: 6820 ldr r0, [r4, #0] 8005a36: f7ff ff81 bl 800593c 8005a3a: bd70 pop {r4, r5, r6, pc} 08005a3c : SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01 module->readBytes = 0; SX1276_standby(module); //Entry standby mode } void SX1276_standby(SX1276_t * module) { 8005a3c: b510 push {r4, lr} SX1276_SPIWrite(module, LR_RegOpMode, 0x09); 8005a3e: 2209 movs r2, #9 8005a40: 2101 movs r1, #1 void SX1276_standby(SX1276_t * module) { 8005a42: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x09); 8005a44: f7ff ffe4 bl 8005a10 module->status = STANDBY; 8005a48: 2301 movs r3, #1 8005a4a: 7263 strb r3, [r4, #9] 8005a4c: bd10 pop {r4, pc} 08005a4e : } void SX1276_sleep(SX1276_t * module) { 8005a4e: b510 push {r4, lr} SX1276_SPIWrite(module, LR_RegOpMode, 0x08); 8005a50: 2208 movs r2, #8 8005a52: 2101 movs r1, #1 void SX1276_sleep(SX1276_t * module) { 8005a54: 4604 mov r4, r0 SX1276_SPIWrite(module, LR_RegOpMode, 0x08); 8005a56: f7ff ffdb bl 8005a10 module->status = SLEEP; 8005a5a: 2300 movs r3, #0 8005a5c: 7263 strb r3, [r4, #9] 8005a5e: bd10 pop {r4, pc} 08005a60 : } void SX1276_entryLoRa(SX1276_t * module) { SX1276_SPIWrite(module, LR_RegOpMode, 0x88); 8005a60: 2288 movs r2, #136 ; 0x88 8005a62: 2101 movs r1, #1 8005a64: f7ff bfd4 b.w 8005a10 08005a68 : uint8_t LoRa_Rate, uint8_t LoRa_BW) { 8005a68: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8005a6c: 4604 mov r4, r0 8005a6e: 460d mov r5, r1 8005a70: 4690 mov r8, r2 8005a72: 461f mov r7, r3 8005a74: f89d 6018 ldrb.w r6, [sp, #24] SX1276_sleep(module); //Change modem mode Must in Sleep mode 8005a78: f7ff ffe9 bl 8005a4e SX1276_hw_DelayMs(15); 8005a7c: 200f movs r0, #15 8005a7e: f7ff ffa0 bl 80059c2 SX1276_entryLoRa(module); 8005a82: 4620 mov r0, r4 8005a84: f7ff ffec bl 8005a60 8005a88: 4a32 ldr r2, [pc, #200] ; (8005b54 ) (uint8_t*) SX1276_Frequency[frequency], 3); //setting frequency parameter 8005a8a: eb05 0545 add.w r5, r5, r5, lsl #1 8005a8e: 442a add r2, r5 8005a90: 2303 movs r3, #3 8005a92: 2106 movs r1, #6 8005a94: 4620 mov r0, r4 8005a96: f7ff ff6e bl 8005976 SX1276_SPIWrite(module, LR_RegPaConfig, SX1276_Power[power]); //Setting output power parameter 8005a9a: 4b2f ldr r3, [pc, #188] ; (8005b58 ) 8005a9c: 2109 movs r1, #9 8005a9e: f813 2008 ldrb.w r2, [r3, r8] 8005aa2: 4620 mov r0, r4 8005aa4: f7ff ffb4 bl 8005a10 SX1276_SPIWrite(module, LR_RegOcp, 0x0B); //RegOcp,Close Ocp 8005aa8: 220b movs r2, #11 8005aaa: 4620 mov r0, r4 8005aac: 4611 mov r1, r2 8005aae: f7ff ffaf bl 8005a10 SX1276_SPIWrite(module, LR_RegLna, 0x23); //RegLNA,High & LNA Enable 8005ab2: 2223 movs r2, #35 ; 0x23 8005ab4: 210c movs r1, #12 8005ab6: 4620 mov r0, r4 8005ab8: f7ff ffaa bl 8005a10 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8005abc: 4b27 ldr r3, [pc, #156] ; (8005b5c ) 8005abe: 5ddd ldrb r5, [r3, r7] 8005ac0: 4b27 ldr r3, [pc, #156] ; (8005b60 ) 8005ac2: 2d06 cmp r5, #6 ((SX1276_LoRaBandwidth[LoRa_BW] << 4) + (SX1276_CR << 1) + 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04) 8005ac4: 5d9a ldrb r2, [r3, r6] 8005ac6: ea4f 1202 mov.w r2, r2, lsl #4 if (SX1276_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6 8005aca: d137 bne.n 8005b3c SX1276_SPIWrite(module, 8005acc: 3203 adds r2, #3 8005ace: b2d2 uxtb r2, r2 8005ad0: 211d movs r1, #29 8005ad2: 4620 mov r0, r4 8005ad4: f7ff ff9c bl 8005a10 SX1276_SPIWrite(module, 8005ad8: 2267 movs r2, #103 ; 0x67 8005ada: 211e movs r1, #30 8005adc: 4620 mov r0, r4 8005ade: f7ff ff97 bl 8005a10 tmp = SX1276_SPIRead(module, 0x31); 8005ae2: 2131 movs r1, #49 ; 0x31 8005ae4: 4620 mov r0, r4 8005ae6: f7ff ff84 bl 80059f2 tmp &= 0xF8; 8005aea: f000 02f8 and.w r2, r0, #248 ; 0xf8 SX1276_SPIWrite(module, 0x31, tmp); 8005aee: f042 0205 orr.w r2, r2, #5 8005af2: 2131 movs r1, #49 ; 0x31 8005af4: 4620 mov r0, r4 8005af6: f7ff ff8b bl 8005a10 SX1276_SPIWrite(module, 0x37, 0x0C); 8005afa: 220c movs r2, #12 8005afc: 2137 movs r1, #55 ; 0x37 SX1276_SPIWrite(module, 8005afe: 4620 mov r0, r4 8005b00: f7ff ff86 bl 8005a10 SX1276_SPIWrite(module, LR_RegSymbTimeoutLsb, 0xFF); //RegSymbTimeoutLsb Timeout = 0x3FF(Max) 8005b04: 4620 mov r0, r4 8005b06: 22ff movs r2, #255 ; 0xff 8005b08: 211f movs r1, #31 8005b0a: f7ff ff81 bl 8005a10 SX1276_SPIWrite(module, LR_RegPreambleMsb, 0x00); //RegPreambleMsb 8005b0e: 4620 mov r0, r4 8005b10: 2200 movs r2, #0 8005b12: 2120 movs r1, #32 8005b14: f7ff ff7c bl 8005a10 SX1276_SPIWrite(module, LR_RegPreambleLsb, 12); //RegPreambleLsb 8+4=12byte Preamble 8005b18: 4620 mov r0, r4 8005b1a: 220c movs r2, #12 8005b1c: 2121 movs r1, #33 ; 0x21 8005b1e: f7ff ff77 bl 8005a10 SX1276_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01 8005b22: 4620 mov r0, r4 8005b24: 2201 movs r2, #1 8005b26: 2141 movs r1, #65 ; 0x41 8005b28: f7ff ff72 bl 8005a10 module->readBytes = 0; 8005b2c: 2300 movs r3, #0 SX1276_standby(module); //Entry standby mode 8005b2e: 4620 mov r0, r4 module->readBytes = 0; 8005b30: f884 310a strb.w r3, [r4, #266] ; 0x10a } 8005b34: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} SX1276_standby(module); //Entry standby mode 8005b38: f7ff bf80 b.w 8005a3c SX1276_SPIWrite(module, 8005b3c: 3202 adds r2, #2 8005b3e: f002 02fe and.w r2, r2, #254 ; 0xfe 8005b42: 211d movs r1, #29 8005b44: 4620 mov r0, r4 8005b46: f7ff ff63 bl 8005a10 ((SX1276_SpreadFactor[LoRa_Rate] << 4) + (SX1276_CRC << 2) 8005b4a: 012a lsls r2, r5, #4 SX1276_SPIWrite(module, 8005b4c: 3207 adds r2, #7 8005b4e: b2d2 uxtb r2, r2 8005b50: 211e movs r1, #30 8005b52: e7d4 b.n 8005afe 8005b54: 08007a40 .word 0x08007a40 8005b58: 08007a4d .word 0x08007a4d 8005b5c: 08007a51 .word 0x08007a51 8005b60: 08007a43 .word 0x08007a43 08005b64 : void SX1276_defaultConfig(SX1276_t * module) { 8005b64: b513 push {r0, r1, r4, lr} SX1276_config(module, module->frequency, module->power, module->LoRa_Rate, 8005b66: 79c4 ldrb r4, [r0, #7] 8005b68: 7983 ldrb r3, [r0, #6] 8005b6a: 7942 ldrb r2, [r0, #5] 8005b6c: 7901 ldrb r1, [r0, #4] 8005b6e: 9400 str r4, [sp, #0] 8005b70: f7ff ff7a bl 8005a68 } 8005b74: b002 add sp, #8 8005b76: bd10 pop {r4, pc} 08005b78 : } void SX1276_clearLoRaIrq(SX1276_t * module) { SX1276_SPIWrite(module, LR_RegIrqFlags, 0xFF); 8005b78: 22ff movs r2, #255 ; 0xff 8005b7a: 2112 movs r1, #18 8005b7c: f7ff bf48 b.w 8005a10 08005b80 : } int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005b80: b570 push {r4, r5, r6, lr} 8005b82: 4604 mov r4, r0 8005b84: 460e mov r6, r1 uint8_t addr; module->packetLength = length; 8005b86: 7221 strb r1, [r4, #8] int SX1276_LoRaEntryRx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005b88: 4615 mov r5, r2 SX1276_defaultConfig(module); //Setting base parameter 8005b8a: f7ff ffeb bl 8005b64 SX1276_SPIWrite(module, REG_LR_PADAC, 0x84); //Normal and RX 8005b8e: 2284 movs r2, #132 ; 0x84 8005b90: 214d movs r1, #77 ; 0x4d 8005b92: 4620 mov r0, r4 8005b94: f7ff ff3c bl 8005a10 SX1276_SPIWrite(module, LR_RegHopPeriod, 0xFF); //No FHSS 8005b98: 22ff movs r2, #255 ; 0xff 8005b9a: 2124 movs r1, #36 ; 0x24 8005b9c: 4620 mov r0, r4 8005b9e: f7ff ff37 bl 8005a10 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x01);//DIO=00,DIO1=00,DIO2=00, DIO3=01 8005ba2: 2201 movs r2, #1 8005ba4: 2140 movs r1, #64 ; 0x40 8005ba6: 4620 mov r0, r4 8005ba8: f7ff ff32 bl 8005a10 SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0x3F);//Open RxDone interrupt & Timeout 8005bac: 223f movs r2, #63 ; 0x3f 8005bae: 2111 movs r1, #17 8005bb0: 4620 mov r0, r4 8005bb2: f7ff ff2d bl 8005a10 SX1276_clearLoRaIrq(module); 8005bb6: 4620 mov r0, r4 8005bb8: f7ff ffde bl 8005b78 SX1276_SPIWrite(module, LR_RegPayloadLength, length);//Payload Length 21byte(this register must difine when the data long of one byte in SF is 6) 8005bbc: 4632 mov r2, r6 8005bbe: 2122 movs r1, #34 ; 0x22 8005bc0: 4620 mov r0, r4 8005bc2: f7ff ff25 bl 8005a10 addr = SX1276_SPIRead(module, LR_RegFifoRxBaseAddr); //Read RxBaseAddr 8005bc6: 210f movs r1, #15 8005bc8: 4620 mov r0, r4 8005bca: f7ff ff12 bl 80059f2 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RxBaseAddr->FiFoAddrPtr 8005bce: 210d movs r1, #13 8005bd0: 4602 mov r2, r0 8005bd2: 4620 mov r0, r4 8005bd4: f7ff ff1c bl 8005a10 SX1276_SPIWrite(module, LR_RegOpMode, 0x85); //Mode//Low Frequency Mode 8005bd8: 2285 movs r2, #133 ; 0x85 8005bda: 2101 movs r1, #1 8005bdc: 4620 mov r0, r4 8005bde: f7ff ff17 bl 8005a10 //SX1276_SPIWrite(module, LR_RegOpMode,0x05); //Continuous Rx Mode //High Frequency Mode module->readBytes = 0; 8005be2: 2300 movs r3, #0 8005be4: f884 310a strb.w r3, [r4, #266] ; 0x10a while (1) { if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8005be8: 2118 movs r1, #24 8005bea: 4620 mov r0, r4 8005bec: f7ff ff01 bl 80059f2 8005bf0: 0743 lsls r3, r0, #29 8005bf2: d503 bpl.n 8005bfc module->status = RX; 8005bf4: 2303 movs r3, #3 return 1; 8005bf6: 2001 movs r0, #1 module->status = RX; 8005bf8: 7263 strb r3, [r4, #9] return 1; 8005bfa: bd70 pop {r4, r5, r6, pc} } if (--timeout == 0) { 8005bfc: 3d01 subs r5, #1 8005bfe: d107 bne.n 8005c10 SX1276_hw_Reset(module->hw); 8005c00: 6820 ldr r0, [r4, #0] 8005c02: f7ff fee0 bl 80059c6 SX1276_defaultConfig(module); 8005c06: 4620 mov r0, r4 8005c08: f7ff ffac bl 8005b64 return 0; 8005c0c: 4628 mov r0, r5 8005c0e: bd70 pop {r4, r5, r6, pc} } SX1276_hw_DelayMs(1); 8005c10: 2001 movs r0, #1 8005c12: f7ff fed6 bl 80059c2 if ((SX1276_SPIRead(module, LR_RegModemStat) & 0x04) == 0x04) { //Rx-on going RegModemStat 8005c16: e7e7 b.n 8005be8 08005c18 : SX1276_clearLoRaIrq(module); } return module->readBytes; } int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005c18: b570 push {r4, r5, r6, lr} 8005c1a: 4604 mov r4, r0 8005c1c: 460e mov r6, r1 uint8_t addr; uint8_t temp; module->packetLength = length; 8005c1e: 7221 strb r1, [r4, #8] int SX1276_LoRaEntryTx(SX1276_t * module, uint8_t length, uint32_t timeout) { 8005c20: 4615 mov r5, r2 SX1276_defaultConfig(module); //setting base parameter 8005c22: f7ff ff9f bl 8005b64 SX1276_SPIWrite(module, REG_LR_PADAC, 0x87); //Tx for 20dBm 8005c26: 2287 movs r2, #135 ; 0x87 8005c28: 214d movs r1, #77 ; 0x4d 8005c2a: 4620 mov r0, r4 8005c2c: f7ff fef0 bl 8005a10 SX1276_SPIWrite(module, LR_RegHopPeriod, 0x00); //RegHopPeriod NO FHSS 8005c30: 2200 movs r2, #0 8005c32: 2124 movs r1, #36 ; 0x24 8005c34: 4620 mov r0, r4 8005c36: f7ff feeb bl 8005a10 SX1276_SPIWrite(module, REG_LR_DIOMAPPING1, 0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01 8005c3a: 2241 movs r2, #65 ; 0x41 8005c3c: 2140 movs r1, #64 ; 0x40 8005c3e: 4620 mov r0, r4 8005c40: f7ff fee6 bl 8005a10 SX1276_clearLoRaIrq(module); 8005c44: 4620 mov r0, r4 8005c46: f7ff ff97 bl 8005b78 SX1276_SPIWrite(module, LR_RegIrqFlagsMask, 0xF7); //Open TxDone interrupt 8005c4a: 22f7 movs r2, #247 ; 0xf7 8005c4c: 2111 movs r1, #17 8005c4e: 4620 mov r0, r4 8005c50: f7ff fede bl 8005a10 SX1276_SPIWrite(module, LR_RegPayloadLength, length); //RegPayloadLength 21byte 8005c54: 4632 mov r2, r6 8005c56: 2122 movs r1, #34 ; 0x22 8005c58: 4620 mov r0, r4 8005c5a: f7ff fed9 bl 8005a10 addr = SX1276_SPIRead(module, LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr 8005c5e: 210e movs r1, #14 8005c60: 4620 mov r0, r4 8005c62: f7ff fec6 bl 80059f2 SX1276_SPIWrite(module, LR_RegFifoAddrPtr, addr); //RegFifoAddrPtr 8005c66: 210d movs r1, #13 8005c68: 4602 mov r2, r0 8005c6a: 4620 mov r0, r4 8005c6c: f7ff fed0 bl 8005a10 while (1) { temp = SX1276_SPIRead(module, LR_RegPayloadLength); 8005c70: 2122 movs r1, #34 ; 0x22 8005c72: 4620 mov r0, r4 8005c74: f7ff febd bl 80059f2 if (temp == length) { 8005c78: 4286 cmp r6, r0 8005c7a: d103 bne.n 8005c84 module->status = TX; 8005c7c: 2302 movs r3, #2 return 1; 8005c7e: 2001 movs r0, #1 module->status = TX; 8005c80: 7263 strb r3, [r4, #9] return 1; 8005c82: bd70 pop {r4, r5, r6, pc} } if (--timeout == 0) { 8005c84: 3d01 subs r5, #1 8005c86: d1f3 bne.n 8005c70 SX1276_hw_Reset(module->hw); 8005c88: 6820 ldr r0, [r4, #0] 8005c8a: f7ff fe9c bl 80059c6 SX1276_defaultConfig(module); 8005c8e: 4620 mov r0, r4 8005c90: f7ff ff68 bl 8005b64 return 0; 8005c94: 4628 mov r0, r5 } } } 8005c96: bd70 pop {r4, r5, r6, pc} 08005c98 : SX1276_hw_DelayMs(1); } } void SX1276_begin(SX1276_t * module, uint8_t frequency, uint8_t power, uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength) { 8005c98: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8005c9c: 4604 mov r4, r0 8005c9e: 4689 mov r9, r1 8005ca0: 4690 mov r8, r2 8005ca2: 461f mov r7, r3 8005ca4: f89d 6020 ldrb.w r6, [sp, #32] 8005ca8: f89d 5024 ldrb.w r5, [sp, #36] ; 0x24 SX1276_hw_init(module->hw); 8005cac: 6800 ldr r0, [r0, #0] 8005cae: f7ff fe4c bl 800594a module->frequency = frequency; 8005cb2: f884 9004 strb.w r9, [r4, #4] module->power = power; 8005cb6: f884 8005 strb.w r8, [r4, #5] module->LoRa_Rate = LoRa_Rate; 8005cba: 71a7 strb r7, [r4, #6] module->LoRa_BW = LoRa_BW; 8005cbc: 71e6 strb r6, [r4, #7] module->packetLength = packetLength; 8005cbe: 7225 strb r5, [r4, #8] SX1276_defaultConfig(module); 8005cc0: 4620 mov r0, r4 } 8005cc2: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} SX1276_defaultConfig(module); 8005cc6: f7ff bf4d b.w 8005b64 ... 08005ccc : uint8_t buf[USART_CNT][buf_size]; }BlueUsart_t; void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART1) 8005ccc: 6802 ldr r2, [r0, #0] 8005cce: 4b18 ldr r3, [pc, #96] ; (8005d30 ) { 8005cd0: b510 push {r4, lr} if(huart->Instance == USART1) 8005cd2: 429a cmp r2, r3 { 8005cd4: 4604 mov r4, r0 if(huart->Instance == USART1) 8005cd6: d110 bne.n 8005cfa { buf[USART1_CNT][count_in1] = rx1_data[0]; 8005cd8: 4a16 ldr r2, [pc, #88] ; (8005d34 ) 8005cda: 4917 ldr r1, [pc, #92] ; (8005d38 ) 8005cdc: 7813 ldrb r3, [r2, #0] 8005cde: 7808 ldrb r0, [r1, #0] 8005ce0: 4916 ldr r1, [pc, #88] ; (8005d3c ) 8005ce2: 54c8 strb r0, [r1, r3] if(++count_in1>=100){ count_in1 = 0; } 8005ce4: 3301 adds r3, #1 8005ce6: b2db uxtb r3, r3 8005ce8: 2b63 cmp r3, #99 ; 0x63 8005cea: bf88 it hi 8005cec: 2300 movhi r3, #0 HAL_UART_Receive_IT(&huart1,&rx1_data[0],1); 8005cee: 4912 ldr r1, [pc, #72] ; (8005d38 ) if(++count_in1>=100){ count_in1 = 0; } 8005cf0: 7013 strb r3, [r2, #0] HAL_UART_Receive_IT(&huart1,&rx1_data[0],1); 8005cf2: 4813 ldr r0, [pc, #76] ; (8005d40 ) 8005cf4: 2201 movs r2, #1 8005cf6: f7ff fb35 bl 8005364 } if(huart->Instance == USART2) 8005cfa: 6822 ldr r2, [r4, #0] 8005cfc: 4b11 ldr r3, [pc, #68] ; (8005d44 ) 8005cfe: 429a cmp r2, r3 8005d00: d114 bne.n 8005d2c { buf[USART2_CNT][count_in2] = rx2_data[0]; 8005d02: 4a11 ldr r2, [pc, #68] ; (8005d48 ) 8005d04: 490d ldr r1, [pc, #52] ; (8005d3c ) 8005d06: 7813 ldrb r3, [r2, #0] 8005d08: 4810 ldr r0, [pc, #64] ; (8005d4c ) 8005d0a: 4419 add r1, r3 if(++count_in2>=100){ count_in2 = 0; } 8005d0c: 3301 adds r3, #1 8005d0e: b2db uxtb r3, r3 8005d10: 2b63 cmp r3, #99 ; 0x63 8005d12: bf88 it hi 8005d14: 2300 movhi r3, #0 buf[USART2_CNT][count_in2] = rx2_data[0]; 8005d16: 7800 ldrb r0, [r0, #0] if(++count_in2>=100){ count_in2 = 0; } 8005d18: 7013 strb r3, [r2, #0] buf[USART2_CNT][count_in2] = rx2_data[0]; 8005d1a: f881 0064 strb.w r0, [r1, #100] ; 0x64 HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8005d1e: 2201 movs r2, #1 } } 8005d20: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8005d24: 4909 ldr r1, [pc, #36] ; (8005d4c ) 8005d26: 480a ldr r0, [pc, #40] ; (8005d50 ) 8005d28: f7ff bb1c b.w 8005364 8005d2c: bd10 pop {r4, pc} 8005d2e: bf00 nop 8005d30: 40013800 .word 0x40013800 8005d34: 2000029c .word 0x2000029c 8005d38: 200002e2 .word 0x200002e2 8005d3c: 200001d4 .word 0x200001d4 8005d40: 2000035c .word 0x2000035c 8005d44: 40004400 .word 0x40004400 8005d48: 2000029d .word 0x2000029d 8005d4c: 200002e1 .word 0x200002e1 8005d50: 2000041c .word 0x2000041c 08005d54 : void QueueCheck(uint8_t Usart_Num,uint8_t* header,uint8_t* tail){ 8005d54: b5f8 push {r3, r4, r5, r6, r7, lr} 8005d56: 4614 mov r4, r2 if(*tail != *header){ 8005d58: 780b ldrb r3, [r1, #0] 8005d5a: 7812 ldrb r2, [r2, #0] void QueueCheck(uint8_t Usart_Num,uint8_t* header,uint8_t* tail){ 8005d5c: 4605 mov r5, r0 if(*tail != *header){ 8005d5e: 429a cmp r2, r3 8005d60: d020 beq.n 8005da4 Uart_RxData[Usart_Num][Uart_Rxcnt++] = buf[Usart_Num][(*tail)++]; 8005d62: 2264 movs r2, #100 ; 0x64 8005d64: 4910 ldr r1, [pc, #64] ; (8005da8 ) 8005d66: 4342 muls r2, r0 8005d68: 780e ldrb r6, [r1, #0] 8005d6a: 4810 ldr r0, [pc, #64] ; (8005dac ) 8005d6c: 1c73 adds r3, r6, #1 8005d6e: 700b strb r3, [r1, #0] 8005d70: 7827 ldrb r7, [r4, #0] printf("%02x ",Uart_RxData[Usart_Num][Uart_Rxcnt - 1]); if(*tail>= 100){ *tail = 0; } UartTimerCnt = 0; UartDataRecvSet(Usart_Num + 1); 8005d72: 3501 adds r5, #1 Uart_RxData[Usart_Num][Uart_Rxcnt++] = buf[Usart_Num][(*tail)++]; 8005d74: 1c7b adds r3, r7, #1 8005d76: 7023 strb r3, [r4, #0] 8005d78: 4b0d ldr r3, [pc, #52] ; (8005db0 ) 8005d7a: 4413 add r3, r2 8005d7c: 4402 add r2, r0 8005d7e: 5dd2 ldrb r2, [r2, r7] printf("%02x ",Uart_RxData[Usart_Num][Uart_Rxcnt - 1]); 8005d80: 480c ldr r0, [pc, #48] ; (8005db4 ) Uart_RxData[Usart_Num][Uart_Rxcnt++] = buf[Usart_Num][(*tail)++]; 8005d82: 559a strb r2, [r3, r6] printf("%02x ",Uart_RxData[Usart_Num][Uart_Rxcnt - 1]); 8005d84: 780a ldrb r2, [r1, #0] 8005d86: 4413 add r3, r2 8005d88: f813 1c01 ldrb.w r1, [r3, #-1] 8005d8c: f000 fde8 bl 8006960 if(*tail>= 100){ *tail = 0; } 8005d90: 7823 ldrb r3, [r4, #0] UartTimerCnt = 0; 8005d92: 4a09 ldr r2, [pc, #36] ; (8005db8 ) if(*tail>= 100){ *tail = 0; } 8005d94: 2b63 cmp r3, #99 ; 0x63 8005d96: f04f 0300 mov.w r3, #0 8005d9a: bf88 it hi 8005d9c: 7023 strbhi r3, [r4, #0] UartTimerCnt = 0; 8005d9e: 6013 str r3, [r2, #0] void UartDataBufferCheck(void){ QueueCheck(USART1_CNT,&count_in1,&count_out1); QueueCheck(USART2_CNT,&count_in2,&count_out2); } void UartDataRecvSet(uint8_t val){ UartDataisReved = val; 8005da0: 4b06 ldr r3, [pc, #24] ; (8005dbc ) 8005da2: 701d strb r5, [r3, #0] 8005da4: bdf8 pop {r3, r4, r5, r6, r7, pc} 8005da6: bf00 nop 8005da8: 200001d3 .word 0x200001d3 8005dac: 200001d4 .word 0x200001d4 8005db0: 2000010b .word 0x2000010b 8005db4: 08007a58 .word 0x08007a58 8005db8: 200002a8 .word 0x200002a8 8005dbc: 200002e0 .word 0x200002e0 08005dc0 : void UartDataBufferCheck(void){ 8005dc0: b508 push {r3, lr} QueueCheck(USART1_CNT,&count_in1,&count_out1); 8005dc2: 4a06 ldr r2, [pc, #24] ; (8005ddc ) 8005dc4: 4906 ldr r1, [pc, #24] ; (8005de0 ) 8005dc6: 2000 movs r0, #0 8005dc8: f7ff ffc4 bl 8005d54 } 8005dcc: e8bd 4008 ldmia.w sp!, {r3, lr} QueueCheck(USART2_CNT,&count_in2,&count_out2); 8005dd0: 4a04 ldr r2, [pc, #16] ; (8005de4 ) 8005dd2: 4905 ldr r1, [pc, #20] ; (8005de8 ) 8005dd4: 2001 movs r0, #1 8005dd6: f7ff bfbd b.w 8005d54 8005dda: bf00 nop 8005ddc: 2000029e .word 0x2000029e 8005de0: 2000029c .word 0x2000029c 8005de4: 2000029f .word 0x2000029f 8005de8: 2000029d .word 0x2000029d 08005dec : } uint8_t UartDataRecvGet(void){ return UartDataisReved; } 8005dec: 4b01 ldr r3, [pc, #4] ; (8005df4 ) 8005dee: 7818 ldrb r0, [r3, #0] 8005df0: 4770 bx lr 8005df2: bf00 nop 8005df4: 200002e0 .word 0x200002e0 08005df8 : void Uart2_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart2, data,size, 10); 8005df8: 460a mov r2, r1 8005dfa: 230a movs r3, #10 8005dfc: 4601 mov r1, r0 8005dfe: 4801 ldr r0, [pc, #4] ; (8005e04 ) 8005e00: f7ff ba54 b.w 80052ac 8005e04: 2000041c .word 0x2000041c 08005e08 : } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart1, data,size, 10); 8005e08: 460a mov r2, r1 8005e0a: 230a movs r3, #10 8005e0c: 4601 mov r1, r0 8005e0e: 4801 ldr r0, [pc, #4] ; (8005e14 ) 8005e10: f7ff ba4c b.w 80052ac 8005e14: 2000035c .word 0x2000035c 08005e18 <_write>: } int _write (int file, uint8_t *ptr, uint16_t len) { 8005e18: b510 push {r4, lr} 8005e1a: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8005e1c: 230a movs r3, #10 8005e1e: 4802 ldr r0, [pc, #8] ; (8005e28 <_write+0x10>) 8005e20: f7ff fa44 bl 80052ac return len; } 8005e24: 4620 mov r0, r4 8005e26: bd10 pop {r4, pc} 8005e28: 2000035c .word 0x2000035c 08005e2c : void Uart_dataCheck(uint8_t Usart_Num ,uint8_t* cnt){ 8005e2c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8005e30: 2564 movs r5, #100 ; 0x64 8005e32: 4345 muls r5, r0 printf("%02x ",buf[i]); } printf("\r\n"); #endif crccheck = STH30_CheckCrc(&Uart_RxData[Usart_Num][blucell_type],Uart_RxData[Usart_Num][blucell_length],Uart_RxData[Usart_Num][Uart_RxData[Usart_Num][blucell_length] + 1]); 8005e34: 4e15 ldr r6, [pc, #84] ; (8005e8c ) void Uart_dataCheck(uint8_t Usart_Num ,uint8_t* cnt){ 8005e36: 460f mov r7, r1 crccheck = STH30_CheckCrc(&Uart_RxData[Usart_Num][blucell_type],Uart_RxData[Usart_Num][blucell_length],Uart_RxData[Usart_Num][Uart_RxData[Usart_Num][blucell_length] + 1]); 8005e38: 1974 adds r4, r6, r5 8005e3a: 78a1 ldrb r1, [r4, #2] 8005e3c: 1c68 adds r0, r5, #1 8005e3e: 1863 adds r3, r4, r1 8005e40: 785a ldrb r2, [r3, #1] 8005e42: 4430 add r0, r6 8005e44: f000 fc05 bl 8006652 if(crccheck == CHECKSUM_ERROR){ 8005e48: b998 cbnz r0, 8005e72 for(uint8_t i = 0; i < (*cnt); i++){ 8005e4a: 783b ldrb r3, [r7, #0] 8005e4c: f100 0801 add.w r8, r0, #1 8005e50: b2c0 uxtb r0, r0 8005e52: 4283 cmp r3, r0 8005e54: d807 bhi.n 8005e66 else{ printf("What Happen?\r\n"); /*NOP*/ } *cnt = 0; 8005e56: 2100 movs r1, #0 8005e58: 7039 strb r1, [r7, #0] memset(Uart_RxData[Usart_Num],0x00,buf_size); 8005e5a: 1970 adds r0, r6, r5 8005e5c: 2264 movs r2, #100 ; 0x64 } 8005e5e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} memset(Uart_RxData[Usart_Num],0x00,buf_size); 8005e62: f000 bd74 b.w 800694e printf("%02x ",Uart_RxData[Usart_Num][i]); 8005e66: 5c21 ldrb r1, [r4, r0] 8005e68: 4809 ldr r0, [pc, #36] ; (8005e90 ) 8005e6a: f000 fd79 bl 8006960 8005e6e: 4640 mov r0, r8 8005e70: e7eb b.n 8005e4a else if(crccheck == NO_ERROR){ 8005e72: 2801 cmp r0, #1 8005e74: d106 bne.n 8005e84 RGB_Controller_Func(&Uart_RxData[Usart_Num][blucell_stx]);\ 8005e76: 4620 mov r0, r4 8005e78: f7ff fca0 bl 80057bc UartDataisReved = val; 8005e7c: 2200 movs r2, #0 8005e7e: 4b05 ldr r3, [pc, #20] ; (8005e94 ) 8005e80: 701a strb r2, [r3, #0] 8005e82: e7e8 b.n 8005e56 printf("What Happen?\r\n"); 8005e84: 4804 ldr r0, [pc, #16] ; (8005e98 ) 8005e86: f000 fddf bl 8006a48 8005e8a: e7e4 b.n 8005e56 8005e8c: 2000010b .word 0x2000010b 8005e90: 08007a58 .word 0x08007a58 8005e94: 200002e0 .word 0x200002e0 8005e98: 08007a5e .word 0x08007a5e 08005e9c : void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8005e9c: 6802 ldr r2, [r0, #0] 8005e9e: 4b06 ldr r3, [pc, #24] ; (8005eb8 ) 8005ea0: 429a cmp r2, r3 8005ea2: d107 bne.n 8005eb4 UartTimerCnt++; 8005ea4: 4a05 ldr r2, [pc, #20] ; (8005ebc ) 8005ea6: 6813 ldr r3, [r2, #0] 8005ea8: 3301 adds r3, #1 8005eaa: 6013 str r3, [r2, #0] LedTimerCnt++; 8005eac: 4a04 ldr r2, [pc, #16] ; (8005ec0 ) 8005eae: 6813 ldr r3, [r2, #0] 8005eb0: 3301 adds r3, #1 8005eb2: 6013 str r3, [r2, #0] 8005eb4: 4770 bx lr 8005eb6: bf00 nop 8005eb8: 40001000 .word 0x40001000 8005ebc: 200002a8 .word 0x200002a8 8005ec0: 200002a0 .word 0x200002a0 08005ec4 : } } void RGB_SensorIDAutoSet(uint8_t set){ RGB_SensorIDAutoset = set; 8005ec4: 4b01 ldr r3, [pc, #4] ; (8005ecc ) 8005ec6: 7018 strb r0, [r3, #0] 8005ec8: 4770 bx lr 8005eca: bf00 nop 8005ecc: 200002a5 .word 0x200002a5 08005ed0 : uint8_t RGB_SensorIDAutoGet(void){ return RGB_SensorIDAutoset; } void RGB_Sensor_PowerOnOff(uint8_t id){ 8005ed0: b510 push {r4, lr} 8005ed2: 4604 mov r4, r0 printf("%d Power ON \r\n",id); 8005ed4: 4601 mov r1, r0 8005ed6: 487b ldr r0, [pc, #492] ; (80060c4 ) 8005ed8: f000 fd42 bl 8006960 switch(id){ 8005edc: 2c08 cmp r4, #8 8005ede: f200 80ef bhi.w 80060c0 8005ee2: e8df f004 tbb [pc, r4] 8005ee6: 05c3 .short 0x05c3 8005ee8: 6854463e .word 0x6854463e 8005eec: 9f81 .short 0x9f81 8005eee: c3 .byte 0xc3 8005eef: 00 .byte 0x00 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; case 1: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_RESET); 8005ef0: 2200 movs r2, #0 8005ef2: f44f 5100 mov.w r1, #8192 ; 0x2000 8005ef6: 4874 ldr r0, [pc, #464] ; (80060c8 ) 8005ef8: f7fe fc76 bl 80047e8 HAL_Delay(50); 8005efc: 2032 movs r0, #50 ; 0x32 8005efe: f7fe f9e5 bl 80042cc HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005f02: 2201 movs r2, #1 8005f04: f44f 5100 mov.w r1, #8192 ; 0x2000 8005f08: 486f ldr r0, [pc, #444] ; (80060c8 ) 8005f0a: f7fe fc6d bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_RESET); 8005f0e: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); break; case 2: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005f10: f44f 4180 mov.w r1, #16384 ; 0x4000 8005f14: 486c ldr r0, [pc, #432] ; (80060c8 ) 8005f16: f7fe fc67 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_RESET); 8005f1a: 2200 movs r2, #0 8005f1c: f44f 4100 mov.w r1, #32768 ; 0x8000 8005f20: 4869 ldr r0, [pc, #420] ; (80060c8 ) 8005f22: f7fe fc61 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_RESET); 8005f26: 2200 movs r2, #0 8005f28: 2140 movs r1, #64 ; 0x40 8005f2a: 4868 ldr r0, [pc, #416] ; (80060cc ) 8005f2c: f7fe fc5c bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_RESET); 8005f30: 2200 movs r2, #0 8005f32: 2180 movs r1, #128 ; 0x80 8005f34: 4865 ldr r0, [pc, #404] ; (80060cc ) 8005f36: f7fe fc57 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_RESET); 8005f3a: 2200 movs r2, #0 8005f3c: f44f 7180 mov.w r1, #256 ; 0x100 8005f40: 4862 ldr r0, [pc, #392] ; (80060cc ) 8005f42: f7fe fc51 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); 8005f46: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8005f48: f44f 7100 mov.w r1, #512 ; 0x200 8005f4c: 485f ldr r0, [pc, #380] ; (80060cc ) 8005f4e: f7fe fc4b bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); 8005f52: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; } } 8005f54: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 8005f58: f44f 7180 mov.w r1, #256 ; 0x100 8005f5c: 485c ldr r0, [pc, #368] ; (80060d0 ) 8005f5e: f7fe bc43 b.w 80047e8 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005f62: 2201 movs r2, #1 8005f64: f44f 5100 mov.w r1, #8192 ; 0x2000 8005f68: 4857 ldr r0, [pc, #348] ; (80060c8 ) 8005f6a: f7fe fc3d bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005f6e: 2201 movs r2, #1 8005f70: e7ce b.n 8005f10 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005f72: 2201 movs r2, #1 8005f74: f44f 5100 mov.w r1, #8192 ; 0x2000 8005f78: 4853 ldr r0, [pc, #332] ; (80060c8 ) 8005f7a: f7fe fc35 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005f7e: 2201 movs r2, #1 8005f80: f44f 4180 mov.w r1, #16384 ; 0x4000 8005f84: 4850 ldr r0, [pc, #320] ; (80060c8 ) 8005f86: f7fe fc2f bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005f8a: 2201 movs r2, #1 8005f8c: e7c6 b.n 8005f1c HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005f8e: 2201 movs r2, #1 8005f90: f44f 5100 mov.w r1, #8192 ; 0x2000 8005f94: 484c ldr r0, [pc, #304] ; (80060c8 ) 8005f96: f7fe fc27 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005f9a: 2201 movs r2, #1 8005f9c: f44f 4180 mov.w r1, #16384 ; 0x4000 8005fa0: 4849 ldr r0, [pc, #292] ; (80060c8 ) 8005fa2: f7fe fc21 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005fa6: 2201 movs r2, #1 8005fa8: f44f 4100 mov.w r1, #32768 ; 0x8000 8005fac: 4846 ldr r0, [pc, #280] ; (80060c8 ) 8005fae: f7fe fc1b bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8005fb2: 2201 movs r2, #1 8005fb4: e7b8 b.n 8005f28 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005fb6: 2201 movs r2, #1 8005fb8: f44f 5100 mov.w r1, #8192 ; 0x2000 8005fbc: 4842 ldr r0, [pc, #264] ; (80060c8 ) 8005fbe: f7fe fc13 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005fc2: 2201 movs r2, #1 8005fc4: f44f 4180 mov.w r1, #16384 ; 0x4000 8005fc8: 483f ldr r0, [pc, #252] ; (80060c8 ) 8005fca: f7fe fc0d bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005fce: 2201 movs r2, #1 8005fd0: f44f 4100 mov.w r1, #32768 ; 0x8000 8005fd4: 483c ldr r0, [pc, #240] ; (80060c8 ) 8005fd6: f7fe fc07 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8005fda: 2201 movs r2, #1 8005fdc: 2140 movs r1, #64 ; 0x40 8005fde: 483b ldr r0, [pc, #236] ; (80060cc ) 8005fe0: f7fe fc02 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8005fe4: 2201 movs r2, #1 8005fe6: e7a4 b.n 8005f32 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005fe8: 2201 movs r2, #1 8005fea: f44f 5100 mov.w r1, #8192 ; 0x2000 8005fee: 4836 ldr r0, [pc, #216] ; (80060c8 ) 8005ff0: f7fe fbfa bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005ff4: 2201 movs r2, #1 8005ff6: f44f 4180 mov.w r1, #16384 ; 0x4000 8005ffa: 4833 ldr r0, [pc, #204] ; (80060c8 ) 8005ffc: f7fe fbf4 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8006000: 2201 movs r2, #1 8006002: f44f 4100 mov.w r1, #32768 ; 0x8000 8006006: 4830 ldr r0, [pc, #192] ; (80060c8 ) 8006008: f7fe fbee bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 800600c: 2201 movs r2, #1 800600e: 2140 movs r1, #64 ; 0x40 8006010: 482e ldr r0, [pc, #184] ; (80060cc ) 8006012: f7fe fbe9 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8006016: 2201 movs r2, #1 8006018: 2180 movs r1, #128 ; 0x80 800601a: 482c ldr r0, [pc, #176] ; (80060cc ) 800601c: f7fe fbe4 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8006020: 2201 movs r2, #1 8006022: e78b b.n 8005f3c HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8006024: 2201 movs r2, #1 8006026: f44f 5100 mov.w r1, #8192 ; 0x2000 800602a: 4827 ldr r0, [pc, #156] ; (80060c8 ) 800602c: f7fe fbdc bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006030: 2201 movs r2, #1 8006032: f44f 4180 mov.w r1, #16384 ; 0x4000 8006036: 4824 ldr r0, [pc, #144] ; (80060c8 ) 8006038: f7fe fbd6 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 800603c: 2201 movs r2, #1 800603e: f44f 4100 mov.w r1, #32768 ; 0x8000 8006042: 4821 ldr r0, [pc, #132] ; (80060c8 ) 8006044: f7fe fbd0 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8006048: 2201 movs r2, #1 800604a: 2140 movs r1, #64 ; 0x40 800604c: 481f ldr r0, [pc, #124] ; (80060cc ) 800604e: f7fe fbcb bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8006052: 2201 movs r2, #1 8006054: 2180 movs r1, #128 ; 0x80 8006056: 481d ldr r0, [pc, #116] ; (80060cc ) 8006058: f7fe fbc6 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 800605c: 2201 movs r2, #1 800605e: f44f 7180 mov.w r1, #256 ; 0x100 8006062: 481a ldr r0, [pc, #104] ; (80060cc ) 8006064: f7fe fbc0 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8006068: 2201 movs r2, #1 800606a: e76d b.n 8005f48 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 800606c: 2201 movs r2, #1 800606e: f44f 5100 mov.w r1, #8192 ; 0x2000 8006072: 4815 ldr r0, [pc, #84] ; (80060c8 ) 8006074: f7fe fbb8 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8006078: 2201 movs r2, #1 800607a: f44f 4180 mov.w r1, #16384 ; 0x4000 800607e: 4812 ldr r0, [pc, #72] ; (80060c8 ) 8006080: f7fe fbb2 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8006084: 2201 movs r2, #1 8006086: f44f 4100 mov.w r1, #32768 ; 0x8000 800608a: 480f ldr r0, [pc, #60] ; (80060c8 ) 800608c: f7fe fbac bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8006090: 2201 movs r2, #1 8006092: 2140 movs r1, #64 ; 0x40 8006094: 480d ldr r0, [pc, #52] ; (80060cc ) 8006096: f7fe fba7 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 800609a: 2201 movs r2, #1 800609c: 2180 movs r1, #128 ; 0x80 800609e: 480b ldr r0, [pc, #44] ; (80060cc ) 80060a0: f7fe fba2 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 80060a4: 2201 movs r2, #1 80060a6: f44f 7180 mov.w r1, #256 ; 0x100 80060aa: 4808 ldr r0, [pc, #32] ; (80060cc ) 80060ac: f7fe fb9c bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 80060b0: 2201 movs r2, #1 80060b2: f44f 7100 mov.w r1, #512 ; 0x200 80060b6: 4805 ldr r0, [pc, #20] ; (80060cc ) 80060b8: f7fe fb96 bl 80047e8 HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 80060bc: 2201 movs r2, #1 80060be: e749 b.n 8005f54 80060c0: bd10 pop {r4, pc} 80060c2: bf00 nop 80060c4: 08007a88 .word 0x08007a88 80060c8: 40010c00 .word 0x40010c00 80060cc: 40011000 .word 0x40011000 80060d0: 40010800 .word 0x40010800 080060d4 : #endif // PYJ.2019.03.20_END -- #define ADDR_FLASH_PAGE_TEST ((uint32_t)0x08030000) /* Base @ of Page 127, 1 Kbytes */ #define FLASH_USER_START_ADDR ADDR_FLASH_PAGE_TEST /* Start @ of user Flash area */ #define FLASH_USER_END_ADDR ADDR_FLASH_PAGE_TEST + ((uint32_t)0x0000FFFF) /* End @ of user Flash area */ void Flash_RGB_Data_Write(uint32_t Addr,uint8_t* data){ 80060d4: b570 push {r4, r5, r6, lr} 80060d6: 4604 mov r4, r0 uint16_t temp_Red = 0,temp_Green = 0,temp_Blue = 0; temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R temp_Green= ((data[blucell_green_H] << 8) |data[blucell_green_L]); //G 80060d8: 798b ldrb r3, [r1, #6] 80060da: 79ce ldrb r6, [r1, #7] temp_Blue = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); //B 80060dc: 7a4d ldrb r5, [r1, #9] temp_Green= ((data[blucell_green_H] << 8) |data[blucell_green_L]); //G 80060de: ea46 2603 orr.w r6, r6, r3, lsl #8 temp_Blue = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); //B 80060e2: 7a0b ldrb r3, [r1, #8] temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R 80060e4: 794a ldrb r2, [r1, #5] temp_Blue = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); //B 80060e6: ea45 2503 orr.w r5, r5, r3, lsl #8 temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R 80060ea: 790b ldrb r3, [r1, #4] HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 , (uint16_t)temp_Red); 80060ec: 4601 mov r1, r0 temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R 80060ee: ea42 2203 orr.w r2, r2, r3, lsl #8 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 , (uint16_t)temp_Red); 80060f2: 2001 movs r0, #1 80060f4: 2300 movs r3, #0 80060f6: f7fe fa3f bl 8004578 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 2 , (uint16_t)temp_Green); 80060fa: 4632 mov r2, r6 80060fc: 1ca1 adds r1, r4, #2 80060fe: 2300 movs r3, #0 8006100: 2001 movs r0, #1 8006102: f7fe fa39 bl 8004578 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 , (uint16_t)temp_Blue); 8006106: 462a mov r2, r5 8006108: 1d21 adds r1, r4, #4 800610a: 2300 movs r3, #0 } 800610c: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 , (uint16_t)temp_Blue); 8006110: 2001 movs r0, #1 8006112: f7fe ba31 b.w 8004578 ... 08006118 : void Flash_write(uint8_t* data) // ?“°ê¸°í•¨?ˆ˜ { 8006118: b537 push {r0, r1, r2, r4, r5, lr} 800611a: 4605 mov r5, r0 // EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; // EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; // EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; Address = START_ADDR; __HAL_RCC_TIM7_CLK_DISABLE(); // 매ì¸???´ë¨¸ë?? ? •ì§??•©?‹ˆ?‹¤ 800611c: 4c0f ldr r4, [pc, #60] ; (800615c ) 800611e: 69e3 ldr r3, [r4, #28] 8006120: f023 0320 bic.w r3, r3, #32 8006124: 61e3 str r3, [r4, #28] HAL_FLASH_Unlock(); // lock ??ê¸? 8006126: f7fe f9e1 bl 80044ec 800612a: 7aab ldrb r3, [r5, #10] case 8: Address += 42; break; } Flash_RGB_Data_Write(Address,&data[blucell_stx]); 800612c: 4629 mov r1, r5 800612e: 3b02 subs r3, #2 8006130: b2db uxtb r3, r3 8006132: 2b06 cmp r3, #6 8006134: bf96 itet ls 8006136: 4a0a ldrls r2, [pc, #40] ; (8006160 ) switch(data[blucell_dstid]){ 8006138: 480a ldrhi r0, [pc, #40] ; (8006164 ) 800613a: f852 0023 ldrls.w r0, [r2, r3, lsl #2] Flash_RGB_Data_Write(Address,&data[blucell_stx]); 800613e: f7ff ffc9 bl 80060d4 HAL_FLASH_Lock(); // lock ?ž ê·¸ê¸° 8006142: f7fe f9e5 bl 8004510 __HAL_RCC_TIM7_CLK_ENABLE(); // 매ì¸???´ë¨¸ë?? ?ž¬?‹œ?ž‘?•©?‹ˆ?‹¤ 8006146: 69e3 ldr r3, [r4, #28] 8006148: f043 0320 orr.w r3, r3, #32 800614c: 61e3 str r3, [r4, #28] 800614e: 69e3 ldr r3, [r4, #28] 8006150: f003 0320 and.w r3, r3, #32 8006154: 9301 str r3, [sp, #4] 8006156: 9b01 ldr r3, [sp, #4] } 8006158: b003 add sp, #12 800615a: bd30 pop {r4, r5, pc} 800615c: 40021000 .word 0x40021000 8006160: 08007a6c .word 0x08007a6c 8006164: 08030000 .word 0x08030000 08006168 : void Flash_InitRead(void) // ?“°ê¸°í•¨?ˆ˜ { 8006168: b530 push {r4, r5, lr} 800616a: 480a ldr r0, [pc, #40] ; (8006194 ) 800616c: 490a ldr r1, [pc, #40] ; (8006198 ) 800616e: 4a0b ldr r2, [pc, #44] ; (800619c ) 8006170: 4b0b ldr r3, [pc, #44] ; (80061a0 ) uint32_t Address = 0; Address = StartAddr; for(uint8_t i = 1; i <= 8; i++ ){ 8006172: 4c0c ldr r4, [pc, #48] ; (80061a4 ) RGB_SensorRedLimit_Buf[i] = (*(uint16_t*)Address); 8006174: f833 5c06 ldrh.w r5, [r3, #-6] 8006178: 3306 adds r3, #6 800617a: f820 5f02 strh.w r5, [r0, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorGreenLimit_Buf[i] = (*(uint16_t*)Address); 800617e: f833 5c0a ldrh.w r5, [r3, #-10] 8006182: f821 5f02 strh.w r5, [r1, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 8006186: f833 5c08 ldrh.w r5, [r3, #-8] for(uint8_t i = 1; i <= 8; i++ ){ 800618a: 42a3 cmp r3, r4 RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 800618c: f822 5f02 strh.w r5, [r2, #2]! for(uint8_t i = 1; i <= 8; i++ ){ 8006190: d1f0 bne.n 8006174 // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; } } 8006192: bd30 pop {r4, r5, pc} 8006194: 200000b0 .word 0x200000b0 8006198: 2000009e .word 0x2000009e 800619c: 2000008c .word 0x2000008c 80061a0: 08030006 .word 0x08030006 80061a4: 08030036 .word 0x08030036 080061a8 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80061a8: b510 push {r4, lr} 80061aa: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 80061ac: 2228 movs r2, #40 ; 0x28 80061ae: 2100 movs r1, #0 80061b0: a806 add r0, sp, #24 80061b2: f000 fbcc bl 800694e RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 80061b6: 2100 movs r1, #0 80061b8: 2214 movs r2, #20 80061ba: a801 add r0, sp, #4 80061bc: f000 fbc7 bl 800694e */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80061c0: 2402 movs r4, #2 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 80061c2: 2201 movs r2, #1 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80061c4: f44f 3380 mov.w r3, #65536 ; 0x10000 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80061c8: a806 add r0, sp, #24 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 80061ca: 9206 str r2, [sp, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80061cc: 9307 str r3, [sp, #28] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 80061ce: 920a str r2, [sp, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 80061d0: 930e str r3, [sp, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80061d2: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80061d4: f7fe fb92 bl 80048fc { Error_Handler(); } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80061d8: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 80061da: 2100 movs r1, #0 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80061dc: 9301 str r3, [sp, #4] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 80061de: f44f 6380 mov.w r3, #1024 ; 0x400 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 80061e2: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 80061e4: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 80061e6: 9103 str r1, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 80061e8: 9304 str r3, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 80061ea: 9105 str r1, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 80061ec: f7fe fd4e bl 8004c8c { Error_Handler(); } } 80061f0: b010 add sp, #64 ; 0x40 80061f2: bd10 pop {r4, pc} 080061f4
: { 80061f4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 80061f8: 2604 movs r6, #4 80061fa: 2501 movs r5, #1 80061fc: f04f 08be mov.w r8, #190 ; 0xbe 8006200: 4fbb ldr r7, [pc, #748] ; (80064f0 ) { 8006202: b093 sub sp, #76 ; 0x4c uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 8006204: 783b ldrb r3, [r7, #0] 8006206: 4631 mov r1, r6 8006208: f88d 302b strb.w r3, [sp, #43] ; 0x2b 800620c: 4bb9 ldr r3, [pc, #740] ; (80064f4 ) 800620e: f10d 0029 add.w r0, sp, #41 ; 0x29 8006212: 781b ldrb r3, [r3, #0] 8006214: f88d 8028 strb.w r8, [sp, #40] ; 0x28 8006218: f88d 5029 strb.w r5, [sp, #41] ; 0x29 800621c: f88d 602a strb.w r6, [sp, #42] ; 0x2a 8006220: f88d 302c strb.w r3, [sp, #44] ; 0x2c 8006224: f000 f9fa bl 800661c uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 8006228: f04f 0303 mov.w r3, #3 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 800622c: 24eb movs r4, #235 ; 0xeb uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 800622e: f88d 3031 strb.w r3, [sp, #49] ; 0x31 8006232: 783b ldrb r3, [r7, #0] 8006234: 4631 mov r1, r6 8006236: f88d 3033 strb.w r3, [sp, #51] ; 0x33 800623a: 4bae ldr r3, [pc, #696] ; (80064f4 ) uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 800623c: f88d 002d strb.w r0, [sp, #45] ; 0x2d uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 8006240: 781b ldrb r3, [r3, #0] 8006242: f10d 0031 add.w r0, sp, #49 ; 0x31 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8006246: f04f 0910 mov.w r9, #16 uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 800624a: f88d 3034 strb.w r3, [sp, #52] ; 0x34 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 800624e: f88d 402e strb.w r4, [sp, #46] ; 0x2e uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 8006252: f88d 8030 strb.w r8, [sp, #48] ; 0x30 8006256: f88d 6032 strb.w r6, [sp, #50] ; 0x32 800625a: f000 f9df bl 800661c 800625e: f88d 4036 strb.w r4, [sp, #54] ; 0x36 8006262: f88d 0035 strb.w r0, [sp, #53] ; 0x35 HAL_Init(); 8006266: f7fe f80d bl 8004284 SystemClock_Config(); 800626a: f7ff ff9d bl 80061a8 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800626e: 464a mov r2, r9 8006270: 2100 movs r1, #0 8006272: a80e add r0, sp, #56 ; 0x38 8006274: f000 fb6b bl 800694e /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8006278: 4b9f ldr r3, [pc, #636] ; (80064f8 ) __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 800627a: f649 71f0 movw r1, #40944 ; 0x9ff0 __HAL_RCC_GPIOC_CLK_ENABLE(); 800627e: 699a ldr r2, [r3, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8006280: 489e ldr r0, [pc, #632] ; (80064fc ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8006282: ea42 0209 orr.w r2, r2, r9 8006286: 619a str r2, [r3, #24] 8006288: 699a ldr r2, [r3, #24] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin |SENSOR_EN8_Pin|SX1276_NSS_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 800628a: f8df b2e8 ldr.w fp, [pc, #744] ; 8006574 __HAL_RCC_GPIOC_CLK_ENABLE(); 800628e: ea02 0209 and.w r2, r2, r9 8006292: 9206 str r2, [sp, #24] 8006294: 9a06 ldr r2, [sp, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 8006296: 699a ldr r2, [r3, #24] LED_CH2_Pin LED_CH3_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin |LED_CH2_Pin|LED_CH3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8006298: 2400 movs r4, #0 __HAL_RCC_GPIOD_CLK_ENABLE(); 800629a: f042 0220 orr.w r2, r2, #32 800629e: 619a str r2, [r3, #24] 80062a0: 699a ldr r2, [r3, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80062a2: f04f 0a02 mov.w sl, #2 __HAL_RCC_GPIOD_CLK_ENABLE(); 80062a6: f002 0220 and.w r2, r2, #32 80062aa: 9207 str r2, [sp, #28] 80062ac: 9a07 ldr r2, [sp, #28] __HAL_RCC_GPIOA_CLK_ENABLE(); 80062ae: 699a ldr r2, [r3, #24] htim6.Instance = TIM6; 80062b0: f8df 82c4 ldr.w r8, [pc, #708] ; 8006578 __HAL_RCC_GPIOA_CLK_ENABLE(); 80062b4: 4332 orrs r2, r6 80062b6: 619a str r2, [r3, #24] 80062b8: 699a ldr r2, [r3, #24] huart1.Instance = USART1; 80062ba: 4f91 ldr r7, [pc, #580] ; (8006500 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 80062bc: 4032 ands r2, r6 80062be: 9208 str r2, [sp, #32] 80062c0: 9a08 ldr r2, [sp, #32] __HAL_RCC_GPIOB_CLK_ENABLE(); 80062c2: 699a ldr r2, [r3, #24] 80062c4: f042 0208 orr.w r2, r2, #8 80062c8: 619a str r2, [r3, #24] 80062ca: 699b ldr r3, [r3, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 80062cc: 2200 movs r2, #0 __HAL_RCC_GPIOB_CLK_ENABLE(); 80062ce: f003 0308 and.w r3, r3, #8 80062d2: 9309 str r3, [sp, #36] ; 0x24 80062d4: 9b09 ldr r3, [sp, #36] ; 0x24 HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 80062d6: f7fe fa87 bl 80047e8 HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 80062da: 4b8a ldr r3, [pc, #552] ; (8006504 ) 80062dc: 2200 movs r2, #0 80062de: 4618 mov r0, r3 80062e0: f248 11f0 movw r1, #33264 ; 0x81f0 80062e4: 9303 str r3, [sp, #12] 80062e6: f7fe fa7f bl 80047e8 HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 80062ea: 2200 movs r2, #0 80062ec: f24f 31e9 movw r1, #62441 ; 0xf3e9 80062f0: 4658 mov r0, fp 80062f2: f7fe fa79 bl 80047e8 HAL_GPIO_WritePin(LED_CH4_GPIO_Port, LED_CH4_Pin, GPIO_PIN_RESET); 80062f6: 4631 mov r1, r6 80062f8: 2200 movs r2, #0 80062fa: 4883 ldr r0, [pc, #524] ; (8006508 ) 80062fc: f7fe fa74 bl 80047e8 GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8006300: f649 72f0 movw r2, #40944 ; 0x9ff0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8006304: a90e add r1, sp, #56 ; 0x38 8006306: 487d ldr r0, [pc, #500] ; (80064fc ) GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8006308: 920e str r2, [sp, #56] ; 0x38 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800630a: 950f str r5, [sp, #60] ; 0x3c GPIO_InitStruct.Pull = GPIO_NOPULL; 800630c: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800630e: f8cd a044 str.w sl, [sp, #68] ; 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8006312: f7fe f977 bl 8004604 /*Configure GPIO pins : SX1276_DIO0_Pin SX1276_DIO1_Pin SX1276_DIO2_Pin SX1276_DIO3_Pin SENSOR_EN8_Pin SX1276_NSS_Pin */ GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8006316: f248 12f0 movw r2, #33264 ; 0x81f0 |SENSOR_EN8_Pin|SX1276_NSS_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800631a: 9b03 ldr r3, [sp, #12] 800631c: a90e add r1, sp, #56 ; 0x38 800631e: 4618 mov r0, r3 8006320: 9305 str r3, [sp, #20] GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8006322: 920e str r2, [sp, #56] ; 0x38 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8006324: 950f str r5, [sp, #60] ; 0x3c GPIO_InitStruct.Pull = GPIO_NOPULL; 8006326: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8006328: f8cd a044 str.w sl, [sp, #68] ; 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800632c: f7fe f96a bl 8004604 /*Configure GPIO pins : SX1276_RESET_Pin LED_ALARM_Pin SENSOR_EN1_Pin SENSOR_EN2_Pin SENSOR_EN3_Pin SX1276_CLK_Pin SX1276_MOSI_Pin LED_CH5_Pin LED_CH6_Pin LED_CH7_Pin LED_CH8_Pin */ GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8006330: f24f 32e9 movw r2, #62441 ; 0xf3e9 |SENSOR_EN3_Pin|SX1276_CLK_Pin|SX1276_MOSI_Pin|LED_CH5_Pin |LED_CH6_Pin|LED_CH7_Pin|LED_CH8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8006334: a90e add r1, sp, #56 ; 0x38 8006336: 4658 mov r0, fp GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8006338: 920e str r2, [sp, #56] ; 0x38 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800633a: 950f str r5, [sp, #60] ; 0x3c GPIO_InitStruct.Pull = GPIO_NOPULL; 800633c: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800633e: f8cd a044 str.w sl, [sp, #68] ; 0x44 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8006342: f7fe f95f bl 8004604 /*Configure GPIO pin : LED_CH4_Pin */ GPIO_InitStruct.Pin = LED_CH4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 8006346: a90e add r1, sp, #56 ; 0x38 8006348: 486f ldr r0, [pc, #444] ; (8006508 ) GPIO_InitStruct.Pin = LED_CH4_Pin; 800634a: 960e str r6, [sp, #56] ; 0x38 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800634c: 950f str r5, [sp, #60] ; 0x3c GPIO_InitStruct.Pull = GPIO_NOPULL; 800634e: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8006350: f8cd a044 str.w sl, [sp, #68] ; 0x44 HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 8006354: f7fe f956 bl 8004604 /*Configure GPIO pin : SX1276_MISO_Pin */ GPIO_InitStruct.Pin = SX1276_MISO_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 8006358: a90e add r1, sp, #56 ; 0x38 800635a: 4658 mov r0, fp GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800635c: 940f str r4, [sp, #60] ; 0x3c GPIO_InitStruct.Pull = GPIO_NOPULL; 800635e: 9410 str r4, [sp, #64] ; 0x40 GPIO_InitStruct.Pin = SX1276_MISO_Pin; 8006360: f8cd 9038 str.w r9, [sp, #56] ; 0x38 HAL_GPIO_Init(SX1276_MISO_GPIO_Port, &GPIO_InitStruct); 8006364: f7fe f94e bl 8004604 htim6.Init.Prescaler = 1600-1; 8006368: f240 633f movw r3, #1599 ; 0x63f 800636c: 4a67 ldr r2, [pc, #412] ; (800650c ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 800636e: 4640 mov r0, r8 htim6.Init.Prescaler = 1600-1; 8006370: e888 000c stmia.w r8, {r2, r3} htim6.Init.Period = 10-1; 8006374: 2209 movs r2, #9 TIM_MasterConfigTypeDef sMasterConfig = {0}; 8006376: 940e str r4, [sp, #56] ; 0x38 htim6.Init.Period = 10-1; 8006378: f8c8 200c str.w r2, [r8, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800637c: 940f str r4, [sp, #60] ; 0x3c htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 800637e: f8c8 4008 str.w r4, [r8, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8006382: f8c8 4018 str.w r4, [r8, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8006386: f7fe fe51 bl 800502c if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800638a: a90e add r1, sp, #56 ; 0x38 800638c: 4640 mov r0, r8 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800638e: 940e str r4, [sp, #56] ; 0x38 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8006390: 940f str r4, [sp, #60] ; 0x3c if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8006392: f7fe fe65 bl 8005060 huart1.Instance = USART1; 8006396: 4a5e ldr r2, [pc, #376] ; (8006510 ) huart1.Init.BaudRate = 115200; 8006398: f44f 31e1 mov.w r1, #115200 ; 0x1c200 huart1.Instance = USART1; 800639c: 603a str r2, [r7, #0] huart1.Init.Mode = UART_MODE_TX_RX; 800639e: 220c movs r2, #12 if (HAL_UART_Init(&huart1) != HAL_OK) 80063a0: 4638 mov r0, r7 huart2.Instance = USART2; 80063a2: 4e5c ldr r6, [pc, #368] ; (8006514 ) huart1.Init.BaudRate = 115200; 80063a4: 6079 str r1, [r7, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 80063a6: 60bc str r4, [r7, #8] huart1.Init.StopBits = UART_STOPBITS_1; 80063a8: 60fc str r4, [r7, #12] huart1.Init.Parity = UART_PARITY_NONE; 80063aa: 613c str r4, [r7, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80063ac: 617a str r2, [r7, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80063ae: 61bc str r4, [r7, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80063b0: 61fc str r4, [r7, #28] huart1.Init.BaudRate = 115200; 80063b2: 9104 str r1, [sp, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80063b4: 9203 str r2, [sp, #12] if (HAL_UART_Init(&huart1) != HAL_OK) 80063b6: f7fe ff4b bl 8005250 huart2.Instance = USART2; 80063ba: 4857 ldr r0, [pc, #348] ; (8006518 ) huart2.Init.BaudRate = 115200; 80063bc: 9904 ldr r1, [sp, #16] huart2.Init.Mode = UART_MODE_TX_RX; 80063be: 9a03 ldr r2, [sp, #12] huart2.Instance = USART2; 80063c0: 6030 str r0, [r6, #0] if (HAL_UART_Init(&huart2) != HAL_OK) 80063c2: 4630 mov r0, r6 huart2.Init.BaudRate = 115200; 80063c4: 6071 str r1, [r6, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 80063c6: 60b4 str r4, [r6, #8] huart2.Init.StopBits = UART_STOPBITS_1; 80063c8: 60f4 str r4, [r6, #12] huart2.Init.Parity = UART_PARITY_NONE; 80063ca: 6134 str r4, [r6, #16] huart2.Init.Mode = UART_MODE_TX_RX; 80063cc: 6172 str r2, [r6, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80063ce: 61b4 str r4, [r6, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 80063d0: 61f4 str r4, [r6, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 80063d2: f7fe ff3d bl 8005250 hi2c2.Instance = I2C2; 80063d6: 4851 ldr r0, [pc, #324] ; (800651c ) hi2c2.Init.ClockSpeed = 100000; 80063d8: 4951 ldr r1, [pc, #324] ; (8006520 ) 80063da: 4a52 ldr r2, [pc, #328] ; (8006524 ) hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 80063dc: 6084 str r4, [r0, #8] hi2c2.Init.ClockSpeed = 100000; 80063de: e880 0006 stmia.w r0, {r1, r2} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 80063e2: f44f 4280 mov.w r2, #16384 ; 0x4000 hi2c2.Init.OwnAddress1 = 0; 80063e6: 60c4 str r4, [r0, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 80063e8: 6102 str r2, [r0, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 80063ea: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 80063ec: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 80063ee: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 80063f0: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 80063f2: f7fe fa03 bl 80047fc HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 80063f6: 4622 mov r2, r4 80063f8: 4621 mov r1, r4 80063fa: 2026 movs r0, #38 ; 0x26 80063fc: f7fd ff8a bl 8004314 HAL_NVIC_EnableIRQ(USART2_IRQn); 8006400: 2026 movs r0, #38 ; 0x26 8006402: f7fd ffbb bl 800437c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8006406: 4622 mov r2, r4 8006408: 4621 mov r1, r4 800640a: 2025 movs r0, #37 ; 0x25 800640c: f7fd ff82 bl 8004314 HAL_NVIC_EnableIRQ(USART1_IRQn); 8006410: 2025 movs r0, #37 ; 0x25 8006412: f7fd ffb3 bl 800437c HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8006416: 4622 mov r2, r4 8006418: 4621 mov r1, r4 800641a: 2036 movs r0, #54 ; 0x36 800641c: f7fd ff7a bl 8004314 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8006420: 2036 movs r0, #54 ; 0x36 8006422: f7fd ffab bl 800437c HAL_TIM_Base_Start_IT(&htim6); 8006426: 4640 mov r0, r8 8006428: f7fe fd02 bl 8004e30 HAL_UART_Receive_IT(&huart1, &rx1_data[0],1); 800642c: 462a mov r2, r5 800642e: 493e ldr r1, [pc, #248] ; (8006528 ) 8006430: 4638 mov r0, r7 8006432: f7fe ff97 bl 8005364 HAL_UART_Receive_IT(&huart2, &rx2_data[0],1); 8006436: 462a mov r2, r5 8006438: 493c ldr r1, [pc, #240] ; (800652c ) 800643a: 4630 mov r0, r6 800643c: f7fe ff92 bl 8005364 setbuf(stdout, NULL); // \n ?„ ? ?„ ?–„ë§? 8006440: 4a3b ldr r2, [pc, #236] ; (8006530 ) 8006442: 4621 mov r1, r4 8006444: 6812 ldr r2, [r2, #0] RGB_SensorIDAutoset = set; 8006446: 4e3b ldr r6, [pc, #236] ; (8006534 ) setbuf(stdout, NULL); // \n ?„ ? ?„ ?–„ë§? 8006448: 6890 ldr r0, [r2, #8] 800644a: f000 fb05 bl 8006a58 printf("****************************************\r\n"); 800644e: 483a ldr r0, [pc, #232] ; (8006538 ) 8006450: f000 fafa bl 8006a48 printf("RGB Project\r\n"); 8006454: 4839 ldr r0, [pc, #228] ; (800653c ) 8006456: f000 faf7 bl 8006a48 printf("Build at %s %s\r\n", __DATE__, __TIME__); 800645a: 4939 ldr r1, [pc, #228] ; (8006540 ) 800645c: 4a39 ldr r2, [pc, #228] ; (8006544 ) 800645e: 483a ldr r0, [pc, #232] ; (8006548 ) 8006460: f000 fa7e bl 8006960 printf("Copyright (c) 2019. BLUECELL\r\n"); 8006464: 4839 ldr r0, [pc, #228] ; (800654c ) 8006466: f000 faef bl 8006a48 printf("****************************************\r\n"); 800646a: 4833 ldr r0, [pc, #204] ; (8006538 ) 800646c: f000 faec bl 8006a48 RGB_SensorIDAutoset = set; 8006470: 7035 strb r5, [r6, #0] Flash_InitRead(); 8006472: f7ff fe79 bl 8006168 SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 8006476: 4a36 ldr r2, [pc, #216] ; (8006550 ) 8006478: 9b05 ldr r3, [sp, #20] SX1276.hw = &SX1276_hw; 800647a: 4f36 ldr r7, [pc, #216] ; (8006554 ) SX1276_hw.dio0.port = SX1276_DIO0_GPIO_Port; 800647c: 60d3 str r3, [r2, #12] SX1276_hw.nss.port = GPIOA; 800647e: 6153 str r3, [r2, #20] SX1276_hw.nss.pin = GPIO_PIN_15; 8006480: f44f 4300 mov.w r3, #32768 ; 0x8000 printf("Configuring LoRa module\r\n"); 8006484: 4834 ldr r0, [pc, #208] ; (8006558 ) SX1276_hw.nss.pin = GPIO_PIN_15; 8006486: 6113 str r3, [r2, #16] SX1276_hw.reset.pin = SX1276_RESET_Pin; 8006488: e882 0820 stmia.w r2, {r5, fp} SX1276_hw.dio0.pin = SX1276_DIO0_Pin; 800648c: f8c2 9008 str.w r9, [r2, #8] SX1276.hw = &SX1276_hw; 8006490: 603a str r2, [r7, #0] printf("Configuring LoRa module\r\n"); 8006492: f000 fad9 bl 8006a48 SX1276_begin(&SX1276, SX1276_917MHZ, SX1276_POWER_17DBM, SX1276_LORA_SF_8, 8006496: 2003 movs r0, #3 8006498: 230a movs r3, #10 800649a: 462a mov r2, r5 800649c: 4621 mov r1, r4 800649e: e88d 0009 stmia.w sp, {r0, r3} 80064a2: 4653 mov r3, sl 80064a4: 4638 mov r0, r7 80064a6: f7ff fbf7 bl 8005c98 printf("Done configuring LoRaModule\r\n"); 80064aa: 482c ldr r0, [pc, #176] ; (800655c ) 80064ac: f000 facc bl 8006a48 if (master == 1) { 80064b0: 4b2b ldr r3, [pc, #172] ; (8006560 ) ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 80064b2: f44f 62fa mov.w r2, #2000 ; 0x7d0 if (master == 1) { 80064b6: 681b ldr r3, [r3, #0] ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 80064b8: 4649 mov r1, r9 if (master == 1) { 80064ba: 42ab cmp r3, r5 ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 80064bc: 4638 mov r0, r7 80064be: 4d0d ldr r5, [pc, #52] ; (80064f4 ) 80064c0: 4c28 ldr r4, [pc, #160] ; (8006564 ) if (master == 1) { 80064c2: d15c bne.n 800657e ret = SX1276_LoRaEntryTx(&SX1276, 16, 2000); 80064c4: f7ff fba8 bl 8005c18 ret = SX1276_LoRaEntryRx(&SX1276, 16, 2000); 80064c8: 6020 str r0, [r4, #0] { 80064ca: 2400 movs r4, #0 if(LedTimerCnt > 500){ 80064cc: 4f26 ldr r7, [pc, #152] ; (8006568 ) HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 80064ce: f8df 802c ldr.w r8, [pc, #44] ; 80064fc UartDataBufferCheck(); 80064d2: f7ff fc75 bl 8005dc0 if(UartDataRecvGet() >= 1 && UartTimerCnt > 100){ 80064d6: f7ff fc89 bl 8005dec 80064da: 2800 cmp r0, #0 80064dc: d052 beq.n 8006584 80064de: 4b23 ldr r3, [pc, #140] ; (800656c ) 80064e0: 681b ldr r3, [r3, #0] 80064e2: 2b64 cmp r3, #100 ; 0x64 80064e4: d94e bls.n 8006584 Uart_dataCheck(USART1_CNT,&count_in1); 80064e6: 4922 ldr r1, [pc, #136] ; (8006570 ) 80064e8: 2000 movs r0, #0 80064ea: f7ff fc9f bl 8005e2c 80064ee: e045 b.n 800657c 80064f0: 200002a4 .word 0x200002a4 80064f4: 200002a6 .word 0x200002a6 80064f8: 40021000 .word 0x40021000 80064fc: 40011000 .word 0x40011000 8006500: 2000035c .word 0x2000035c 8006504: 40010800 .word 0x40010800 8006508: 40011400 .word 0x40011400 800650c: 40001000 .word 0x40001000 8006510: 40013800 .word 0x40013800 8006514: 2000041c .word 0x2000041c 8006518: 40004400 .word 0x40004400 800651c: 200002e8 .word 0x200002e8 8006520: 40005800 .word 0x40005800 8006524: 000186a0 .word 0x000186a0 8006528: 200002e2 .word 0x200002e2 800652c: 200002e1 .word 0x200002e1 8006530: 2000000c .word 0x2000000c 8006534: 200002a5 .word 0x200002a5 8006538: 08007a97 .word 0x08007a97 800653c: 08007ac1 .word 0x08007ac1 8006540: 08007ad7 .word 0x08007ad7 8006544: 08007ace .word 0x08007ace 8006548: 08007ae3 .word 0x08007ae3 800654c: 08007af4 .word 0x08007af4 8006550: 20000340 .word 0x20000340 8006554: 20000460 .word 0x20000460 8006558: 08007b12 .word 0x08007b12 800655c: 08007b2b .word 0x08007b2b 8006560: 2000056c .word 0x2000056c 8006564: 2000045c .word 0x2000045c 8006568: 200002a0 .word 0x200002a0 800656c: 200002a8 .word 0x200002a8 8006570: 2000029c .word 0x2000029c 8006574: 40010c00 .word 0x40010c00 8006578: 200003dc .word 0x200003dc 800657c: e7a9 b.n 80064d2 ret = SX1276_LoRaEntryRx(&SX1276, 16, 2000); 800657e: f7ff faff bl 8005b80 8006582: e7a1 b.n 80064c8 if(LedTimerCnt > 500){ 8006584: 683b ldr r3, [r7, #0] 8006586: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 800658a: d9a2 bls.n 80064d2 if(RGB_SensorIDAutoGet() == 1){ 800658c: 7833 ldrb r3, [r6, #0] 800658e: 2b01 cmp r3, #1 8006590: d12c bne.n 80065ec if(SensorID == 0){memset(&SensorID_buf[0],0x00,8);SensorID_Cnt = 0;} 8006592: 7828 ldrb r0, [r5, #0] 8006594: b920 cbnz r0, 80065a0 8006596: 4b1f ldr r3, [pc, #124] ; (8006614 ) 8006598: 6018 str r0, [r3, #0] 800659a: 6058 str r0, [r3, #4] 800659c: 4b1e ldr r3, [pc, #120] ; (8006618 ) 800659e: 7018 strb r0, [r3, #0] IDAutoSetRequest_data[blucell_srcid + 1] = ++SensorID;//DST ID 80065a0: 3001 adds r0, #1 80065a2: b2c0 uxtb r0, r0 if(IDAutoSetRequest_data[blucell_srcid + 1] > 8){ 80065a4: 2808 cmp r0, #8 IDAutoSetRequest_data[blucell_srcid + 1] = ++SensorID;//DST ID 80065a6: 7028 strb r0, [r5, #0] 80065a8: f88d 0034 strb.w r0, [sp, #52] ; 0x34 if(IDAutoSetRequest_data[blucell_srcid + 1] > 8){ 80065ac: d910 bls.n 80065d0 RGB_SensorIDAutoset = set; 80065ae: f04f 0900 mov.w r9, #0 RGB_Sensor_PowerOnOff(0); 80065b2: 4648 mov r0, r9 RGB_SensorIDAutoset = set; 80065b4: f886 9000 strb.w r9, [r6] RGB_Sensor_PowerOnOff(0); 80065b8: f7ff fc8a bl 8005ed0 SensorID = 0; 80065bc: f885 9000 strb.w r9, [r5] HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 80065c0: f44f 4100 mov.w r1, #32768 ; 0x8000 80065c4: 4640 mov r0, r8 80065c6: f7fe f914 bl 80047f2 LedTimerCnt = 0; 80065ca: 2300 movs r3, #0 80065cc: 603b str r3, [r7, #0] 80065ce: e780 b.n 80064d2 RGB_Sensor_PowerOnOff(IDAutoSetRequest_data[4]); 80065d0: f7ff fc7e bl 8005ed0 HAL_Delay(5000); 80065d4: f241 3088 movw r0, #5000 ; 0x1388 80065d8: f7fd fe78 bl 80042cc RGB_Controller_Func(&IDAutoSetRequest_data[blucell_stx]); 80065dc: a80c add r0, sp, #48 ; 0x30 80065de: f7ff f8ed bl 80057bc HAL_Delay(500); 80065e2: f44f 70fa mov.w r0, #500 ; 0x1f4 80065e6: f7fd fe71 bl 80042cc 80065ea: e7e9 b.n 80065c0 StatusRequest_data[blucell_srcid + 1] = SensorID_buf[temp_sensorid++]; 80065ec: 4b09 ldr r3, [pc, #36] ; (8006614 ) 80065ee: f104 0901 add.w r9, r4, #1 80065f2: 5d1b ldrb r3, [r3, r4] 80065f4: fa5f f989 uxtb.w r9, r9 80065f8: f88d 302c strb.w r3, [sp, #44] ; 0x2c if(temp_sensorid > (SensorID_Cnt)){ 80065fc: 4b06 ldr r3, [pc, #24] ; (8006618 ) RGB_Controller_Func(&StatusRequest_data[blucell_stx]); 80065fe: a80a add r0, sp, #40 ; 0x28 if(temp_sensorid > (SensorID_Cnt)){ 8006600: 781b ldrb r3, [r3, #0] temp_sensorid = 0; 8006602: 454b cmp r3, r9 8006604: bf38 it cc 8006606: f04f 0900 movcc.w r9, #0 RGB_Controller_Func(&StatusRequest_data[blucell_stx]); 800660a: f7ff f8d7 bl 80057bc 800660e: 464c mov r4, r9 8006610: e7d6 b.n 80065c0 8006612: bf00 nop 8006614: 200000c3 .word 0x200000c3 8006618: 200000c2 .word 0x200000c2 0800661c : 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 800661c: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 800661e: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8006620: 4604 mov r4, r0 8006622: 1a22 subs r2, r4, r0 8006624: b2d2 uxtb r2, r2 8006626: 4291 cmp r1, r2 8006628: d801 bhi.n 800662e if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 800662a: 4618 mov r0, r3 800662c: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 800662e: f814 2b01 ldrb.w r2, [r4], #1 8006632: 4053 eors r3, r2 8006634: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8006636: f013 0f80 tst.w r3, #128 ; 0x80 800663a: f102 32ff add.w r2, r2, #4294967295 800663e: ea4f 0343 mov.w r3, r3, lsl #1 8006642: bf18 it ne 8006644: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8006648: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 800664c: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 800664e: d1f2 bne.n 8006636 8006650: e7e7 b.n 8006622 08006652 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8006652: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8006654: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8006656: 4605 mov r5, r0 8006658: 1a2c subs r4, r5, r0 800665a: b2e4 uxtb r4, r4 800665c: 42a1 cmp r1, r4 800665e: d803 bhi.n 8006668 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8006660: 1a9b subs r3, r3, r2 8006662: 4258 negs r0, r3 8006664: 4158 adcs r0, r3 8006666: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8006668: f815 4b01 ldrb.w r4, [r5], #1 800666c: 4063 eors r3, r4 800666e: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8006670: f013 0f80 tst.w r3, #128 ; 0x80 8006674: f104 34ff add.w r4, r4, #4294967295 8006678: ea4f 0343 mov.w r3, r3, lsl #1 800667c: bf18 it ne 800667e: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8006682: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8006686: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8006688: d1f2 bne.n 8006670 800668a: e7e5 b.n 8006658 0800668c : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800668c: 4b0e ldr r3, [pc, #56] ; (80066c8 ) { 800668e: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8006690: 699a ldr r2, [r3, #24] 8006692: f042 0201 orr.w r2, r2, #1 8006696: 619a str r2, [r3, #24] 8006698: 699a ldr r2, [r3, #24] 800669a: f002 0201 and.w r2, r2, #1 800669e: 9200 str r2, [sp, #0] 80066a0: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 80066a2: 69da ldr r2, [r3, #28] 80066a4: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 80066a8: 61da str r2, [r3, #28] 80066aa: 69db ldr r3, [r3, #28] /* System interrupt init*/ /**DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 80066ac: 4a07 ldr r2, [pc, #28] ; (80066cc ) __HAL_RCC_PWR_CLK_ENABLE(); 80066ae: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80066b2: 9301 str r3, [sp, #4] 80066b4: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 80066b6: 6853 ldr r3, [r2, #4] 80066b8: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80066bc: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 80066c0: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80066c2: b002 add sp, #8 80066c4: 4770 bx lr 80066c6: bf00 nop 80066c8: 40021000 .word 0x40021000 80066cc: 40010000 .word 0x40010000 080066d0 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 80066d0: b510 push {r4, lr} 80066d2: 4604 mov r4, r0 80066d4: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80066d6: 2210 movs r2, #16 80066d8: 2100 movs r1, #0 80066da: a802 add r0, sp, #8 80066dc: f000 f937 bl 800694e if(hi2c->Instance==I2C2) 80066e0: 6822 ldr r2, [r4, #0] 80066e2: 4b11 ldr r3, [pc, #68] ; (8006728 ) 80066e4: 429a cmp r2, r3 80066e6: d11d bne.n 8006724 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 80066e8: 4c10 ldr r4, [pc, #64] ; (800672c ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80066ea: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 80066ec: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80066ee: 4810 ldr r0, [pc, #64] ; (8006730 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 80066f0: f043 0308 orr.w r3, r3, #8 80066f4: 61a3 str r3, [r4, #24] 80066f6: 69a3 ldr r3, [r4, #24] 80066f8: f003 0308 and.w r3, r3, #8 80066fc: 9300 str r3, [sp, #0] 80066fe: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8006700: f44f 6340 mov.w r3, #3072 ; 0xc00 8006704: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8006706: 2312 movs r3, #18 8006708: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800670a: 2303 movs r3, #3 800670c: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800670e: f7fd ff79 bl 8004604 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 8006712: 69e3 ldr r3, [r4, #28] 8006714: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 8006718: 61e3 str r3, [r4, #28] 800671a: 69e3 ldr r3, [r4, #28] 800671c: f403 0380 and.w r3, r3, #4194304 ; 0x400000 8006720: 9301 str r3, [sp, #4] 8006722: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 8006724: b006 add sp, #24 8006726: bd10 pop {r4, pc} 8006728: 40005800 .word 0x40005800 800672c: 40021000 .word 0x40021000 8006730: 40010c00 .word 0x40010c00 08006734 : * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8006734: 6802 ldr r2, [r0, #0] 8006736: 4b08 ldr r3, [pc, #32] ; (8006758 ) { 8006738: b082 sub sp, #8 if(htim_base->Instance==TIM6) 800673a: 429a cmp r2, r3 800673c: d10a bne.n 8006754 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 800673e: f503 3300 add.w r3, r3, #131072 ; 0x20000 8006742: 69da ldr r2, [r3, #28] 8006744: f042 0210 orr.w r2, r2, #16 8006748: 61da str r2, [r3, #28] 800674a: 69db ldr r3, [r3, #28] 800674c: f003 0310 and.w r3, r3, #16 8006750: 9301 str r3, [sp, #4] 8006752: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8006754: b002 add sp, #8 8006756: 4770 bx lr 8006758: 40001000 .word 0x40001000 0800675c : * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 800675c: 2210 movs r2, #16 { 800675e: b510 push {r4, lr} 8006760: 4604 mov r4, r0 8006762: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8006764: eb0d 0002 add.w r0, sp, r2 8006768: 2100 movs r1, #0 800676a: f000 f8f0 bl 800694e if(huart->Instance==USART1) 800676e: 6823 ldr r3, [r4, #0] 8006770: 4a27 ldr r2, [pc, #156] ; (8006810 ) 8006772: 4293 cmp r3, r2 8006774: d129 bne.n 80067ca { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8006776: 4b27 ldr r3, [pc, #156] ; (8006814 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006778: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 800677a: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800677c: 4826 ldr r0, [pc, #152] ; (8006818 ) __HAL_RCC_USART1_CLK_ENABLE(); 800677e: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8006782: 619a str r2, [r3, #24] 8006784: 699a ldr r2, [r3, #24] 8006786: f402 4280 and.w r2, r2, #16384 ; 0x4000 800678a: 9200 str r2, [sp, #0] 800678c: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 800678e: 699a ldr r2, [r3, #24] 8006790: f042 0204 orr.w r2, r2, #4 8006794: 619a str r2, [r3, #24] 8006796: 699b ldr r3, [r3, #24] 8006798: f003 0304 and.w r3, r3, #4 800679c: 9301 str r3, [sp, #4] 800679e: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 80067a0: f44f 7300 mov.w r3, #512 ; 0x200 80067a4: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80067a6: 2302 movs r3, #2 80067a8: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80067aa: 2303 movs r3, #3 80067ac: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80067ae: f7fd ff29 bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_10; 80067b2: f44f 6380 mov.w r3, #1024 ; 0x400 GPIO_InitStruct.Pin = GPIO_PIN_2; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); GPIO_InitStruct.Pin = GPIO_PIN_3; 80067b6: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80067b8: 2300 movs r3, #0 GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80067ba: a904 add r1, sp, #16 80067bc: 4816 ldr r0, [pc, #88] ; (8006818 ) GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80067be: 9305 str r3, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80067c0: 9306 str r3, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80067c2: f7fd ff1f bl 8004604 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 80067c6: b008 add sp, #32 80067c8: bd10 pop {r4, pc} else if(huart->Instance==USART2) 80067ca: 4a14 ldr r2, [pc, #80] ; (800681c ) 80067cc: 4293 cmp r3, r2 80067ce: d1fa bne.n 80067c6 __HAL_RCC_USART2_CLK_ENABLE(); 80067d0: 4b10 ldr r3, [pc, #64] ; (8006814 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80067d2: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 80067d4: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80067d6: 4810 ldr r0, [pc, #64] ; (8006818 ) __HAL_RCC_USART2_CLK_ENABLE(); 80067d8: f442 3200 orr.w r2, r2, #131072 ; 0x20000 80067dc: 61da str r2, [r3, #28] 80067de: 69da ldr r2, [r3, #28] 80067e0: f402 3200 and.w r2, r2, #131072 ; 0x20000 80067e4: 9202 str r2, [sp, #8] 80067e6: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 80067e8: 699a ldr r2, [r3, #24] 80067ea: f042 0204 orr.w r2, r2, #4 80067ee: 619a str r2, [r3, #24] 80067f0: 699b ldr r3, [r3, #24] 80067f2: f003 0304 and.w r3, r3, #4 80067f6: 9303 str r3, [sp, #12] 80067f8: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 80067fa: 2304 movs r3, #4 80067fc: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80067fe: 2302 movs r3, #2 8006800: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8006802: 2303 movs r3, #3 8006804: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006806: f7fd fefd bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_3; 800680a: 2308 movs r3, #8 800680c: e7d3 b.n 80067b6 800680e: bf00 nop 8006810: 40013800 .word 0x40013800 8006814: 40021000 .word 0x40021000 8006818: 40010800 .word 0x40010800 800681c: 40004400 .word 0x40004400 08006820 : 8006820: 4770 bx lr 08006822 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8006822: e7fe b.n 8006822 08006824 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8006824: e7fe b.n 8006824 08006826 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8006826: e7fe b.n 8006826 08006828 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8006828: e7fe b.n 8006828 0800682a : 800682a: 4770 bx lr 0800682c : 800682c: 4770 bx lr 0800682e : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 800682e: 4770 bx lr 08006830 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8006830: f7fd bd3a b.w 80042a8 08006834 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8006834: 4801 ldr r0, [pc, #4] ; (800683c ) 8006836: f7fe bdfd b.w 8005434 800683a: bf00 nop 800683c: 2000035c .word 0x2000035c 08006840 : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 8006840: 4801 ldr r0, [pc, #4] ; (8006848 ) 8006842: f7fe bdf7 b.w 8005434 8006846: bf00 nop 8006848: 2000041c .word 0x2000041c 0800684c : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 800684c: 4801 ldr r0, [pc, #4] ; (8006854 ) 800684e: f7fe bafe b.w 8004e4e 8006852: bf00 nop 8006854: 200003dc .word 0x200003dc 08006858 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8006858: 4b0e ldr r3, [pc, #56] ; (8006894 ) 800685a: 681a ldr r2, [r3, #0] 800685c: f042 0201 orr.w r2, r2, #1 8006860: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8006862: 6859 ldr r1, [r3, #4] 8006864: 4a0c ldr r2, [pc, #48] ; (8006898 ) 8006866: 400a ands r2, r1 8006868: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 800686a: 681a ldr r2, [r3, #0] 800686c: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8006870: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8006874: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8006876: 681a ldr r2, [r3, #0] 8006878: f422 2280 bic.w r2, r2, #262144 ; 0x40000 800687c: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 800687e: 685a ldr r2, [r3, #4] 8006880: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8006884: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8006886: f44f 021f mov.w r2, #10420224 ; 0x9f0000 800688a: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 800688c: 4a03 ldr r2, [pc, #12] ; (800689c ) 800688e: 4b04 ldr r3, [pc, #16] ; (80068a0 ) 8006890: 609a str r2, [r3, #8] 8006892: 4770 bx lr 8006894: 40021000 .word 0x40021000 8006898: f8ff0000 .word 0xf8ff0000 800689c: 08004000 .word 0x08004000 80068a0: e000ed00 .word 0xe000ed00 080068a4 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 80068a4: 2100 movs r1, #0 b LoopCopyDataInit 80068a6: e003 b.n 80068b0 080068a8 : CopyDataInit: ldr r3, =_sidata 80068a8: 4b0b ldr r3, [pc, #44] ; (80068d8 ) ldr r3, [r3, r1] 80068aa: 585b ldr r3, [r3, r1] str r3, [r0, r1] 80068ac: 5043 str r3, [r0, r1] adds r1, r1, #4 80068ae: 3104 adds r1, #4 080068b0 : LoopCopyDataInit: ldr r0, =_sdata 80068b0: 480a ldr r0, [pc, #40] ; (80068dc ) ldr r3, =_edata 80068b2: 4b0b ldr r3, [pc, #44] ; (80068e0 ) adds r2, r0, r1 80068b4: 1842 adds r2, r0, r1 cmp r2, r3 80068b6: 429a cmp r2, r3 bcc CopyDataInit 80068b8: d3f6 bcc.n 80068a8 ldr r2, =_sbss 80068ba: 4a0a ldr r2, [pc, #40] ; (80068e4 ) b LoopFillZerobss 80068bc: e002 b.n 80068c4 080068be : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 80068be: 2300 movs r3, #0 str r3, [r2], #4 80068c0: f842 3b04 str.w r3, [r2], #4 080068c4 : LoopFillZerobss: ldr r3, = _ebss 80068c4: 4b08 ldr r3, [pc, #32] ; (80068e8 ) cmp r2, r3 80068c6: 429a cmp r2, r3 bcc FillZerobss 80068c8: d3f9 bcc.n 80068be /* Call the clock system intitialization function.*/ bl SystemInit 80068ca: f7ff ffc5 bl 8006858 /* Call static constructors */ bl __libc_init_array 80068ce: f000 f80f bl 80068f0 <__libc_init_array> /* Call the application's entry point.*/ bl main 80068d2: f7ff fc8f bl 80061f4
bx lr 80068d6: 4770 bx lr ldr r3, =_sidata 80068d8: 08007c00 .word 0x08007c00 ldr r0, =_sdata 80068dc: 20000000 .word 0x20000000 ldr r3, =_edata 80068e0: 20000070 .word 0x20000070 ldr r2, =_sbss 80068e4: 20000070 .word 0x20000070 ldr r3, = _ebss 80068e8: 20000574 .word 0x20000574 080068ec : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80068ec: e7fe b.n 80068ec ... 080068f0 <__libc_init_array>: 80068f0: b570 push {r4, r5, r6, lr} 80068f2: 2500 movs r5, #0 80068f4: 4e0c ldr r6, [pc, #48] ; (8006928 <__libc_init_array+0x38>) 80068f6: 4c0d ldr r4, [pc, #52] ; (800692c <__libc_init_array+0x3c>) 80068f8: 1ba4 subs r4, r4, r6 80068fa: 10a4 asrs r4, r4, #2 80068fc: 42a5 cmp r5, r4 80068fe: d109 bne.n 8006914 <__libc_init_array+0x24> 8006900: f001 f88a bl 8007a18 <_init> 8006904: 2500 movs r5, #0 8006906: 4e0a ldr r6, [pc, #40] ; (8006930 <__libc_init_array+0x40>) 8006908: 4c0a ldr r4, [pc, #40] ; (8006934 <__libc_init_array+0x44>) 800690a: 1ba4 subs r4, r4, r6 800690c: 10a4 asrs r4, r4, #2 800690e: 42a5 cmp r5, r4 8006910: d105 bne.n 800691e <__libc_init_array+0x2e> 8006912: bd70 pop {r4, r5, r6, pc} 8006914: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8006918: 4798 blx r3 800691a: 3501 adds r5, #1 800691c: e7ee b.n 80068fc <__libc_init_array+0xc> 800691e: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8006922: 4798 blx r3 8006924: 3501 adds r5, #1 8006926: e7f2 b.n 800690e <__libc_init_array+0x1e> 8006928: 08007bf8 .word 0x08007bf8 800692c: 08007bf8 .word 0x08007bf8 8006930: 08007bf8 .word 0x08007bf8 8006934: 08007bfc .word 0x08007bfc 08006938 : 8006938: b510 push {r4, lr} 800693a: 1e43 subs r3, r0, #1 800693c: 440a add r2, r1 800693e: 4291 cmp r1, r2 8006940: d100 bne.n 8006944 8006942: bd10 pop {r4, pc} 8006944: f811 4b01 ldrb.w r4, [r1], #1 8006948: f803 4f01 strb.w r4, [r3, #1]! 800694c: e7f7 b.n 800693e 0800694e : 800694e: 4603 mov r3, r0 8006950: 4402 add r2, r0 8006952: 4293 cmp r3, r2 8006954: d100 bne.n 8006958 8006956: 4770 bx lr 8006958: f803 1b01 strb.w r1, [r3], #1 800695c: e7f9 b.n 8006952 ... 08006960 : 8006960: b40f push {r0, r1, r2, r3} 8006962: 4b0a ldr r3, [pc, #40] ; (800698c ) 8006964: b513 push {r0, r1, r4, lr} 8006966: 681c ldr r4, [r3, #0] 8006968: b124 cbz r4, 8006974 800696a: 69a3 ldr r3, [r4, #24] 800696c: b913 cbnz r3, 8006974 800696e: 4620 mov r0, r4 8006970: f000 fada bl 8006f28 <__sinit> 8006974: ab05 add r3, sp, #20 8006976: 9a04 ldr r2, [sp, #16] 8006978: 68a1 ldr r1, [r4, #8] 800697a: 4620 mov r0, r4 800697c: 9301 str r3, [sp, #4] 800697e: f000 fc9b bl 80072b8 <_vfiprintf_r> 8006982: b002 add sp, #8 8006984: e8bd 4010 ldmia.w sp!, {r4, lr} 8006988: b004 add sp, #16 800698a: 4770 bx lr 800698c: 2000000c .word 0x2000000c 08006990 <_puts_r>: 8006990: b570 push {r4, r5, r6, lr} 8006992: 460e mov r6, r1 8006994: 4605 mov r5, r0 8006996: b118 cbz r0, 80069a0 <_puts_r+0x10> 8006998: 6983 ldr r3, [r0, #24] 800699a: b90b cbnz r3, 80069a0 <_puts_r+0x10> 800699c: f000 fac4 bl 8006f28 <__sinit> 80069a0: 69ab ldr r3, [r5, #24] 80069a2: 68ac ldr r4, [r5, #8] 80069a4: b913 cbnz r3, 80069ac <_puts_r+0x1c> 80069a6: 4628 mov r0, r5 80069a8: f000 fabe bl 8006f28 <__sinit> 80069ac: 4b23 ldr r3, [pc, #140] ; (8006a3c <_puts_r+0xac>) 80069ae: 429c cmp r4, r3 80069b0: d117 bne.n 80069e2 <_puts_r+0x52> 80069b2: 686c ldr r4, [r5, #4] 80069b4: 89a3 ldrh r3, [r4, #12] 80069b6: 071b lsls r3, r3, #28 80069b8: d51d bpl.n 80069f6 <_puts_r+0x66> 80069ba: 6923 ldr r3, [r4, #16] 80069bc: b1db cbz r3, 80069f6 <_puts_r+0x66> 80069be: 3e01 subs r6, #1 80069c0: 68a3 ldr r3, [r4, #8] 80069c2: f816 1f01 ldrb.w r1, [r6, #1]! 80069c6: 3b01 subs r3, #1 80069c8: 60a3 str r3, [r4, #8] 80069ca: b9e9 cbnz r1, 8006a08 <_puts_r+0x78> 80069cc: 2b00 cmp r3, #0 80069ce: da2e bge.n 8006a2e <_puts_r+0x9e> 80069d0: 4622 mov r2, r4 80069d2: 210a movs r1, #10 80069d4: 4628 mov r0, r5 80069d6: f000 f8f5 bl 8006bc4 <__swbuf_r> 80069da: 3001 adds r0, #1 80069dc: d011 beq.n 8006a02 <_puts_r+0x72> 80069de: 200a movs r0, #10 80069e0: bd70 pop {r4, r5, r6, pc} 80069e2: 4b17 ldr r3, [pc, #92] ; (8006a40 <_puts_r+0xb0>) 80069e4: 429c cmp r4, r3 80069e6: d101 bne.n 80069ec <_puts_r+0x5c> 80069e8: 68ac ldr r4, [r5, #8] 80069ea: e7e3 b.n 80069b4 <_puts_r+0x24> 80069ec: 4b15 ldr r3, [pc, #84] ; (8006a44 <_puts_r+0xb4>) 80069ee: 429c cmp r4, r3 80069f0: bf08 it eq 80069f2: 68ec ldreq r4, [r5, #12] 80069f4: e7de b.n 80069b4 <_puts_r+0x24> 80069f6: 4621 mov r1, r4 80069f8: 4628 mov r0, r5 80069fa: f000 f935 bl 8006c68 <__swsetup_r> 80069fe: 2800 cmp r0, #0 8006a00: d0dd beq.n 80069be <_puts_r+0x2e> 8006a02: f04f 30ff mov.w r0, #4294967295 8006a06: bd70 pop {r4, r5, r6, pc} 8006a08: 2b00 cmp r3, #0 8006a0a: da04 bge.n 8006a16 <_puts_r+0x86> 8006a0c: 69a2 ldr r2, [r4, #24] 8006a0e: 4293 cmp r3, r2 8006a10: db06 blt.n 8006a20 <_puts_r+0x90> 8006a12: 290a cmp r1, #10 8006a14: d004 beq.n 8006a20 <_puts_r+0x90> 8006a16: 6823 ldr r3, [r4, #0] 8006a18: 1c5a adds r2, r3, #1 8006a1a: 6022 str r2, [r4, #0] 8006a1c: 7019 strb r1, [r3, #0] 8006a1e: e7cf b.n 80069c0 <_puts_r+0x30> 8006a20: 4622 mov r2, r4 8006a22: 4628 mov r0, r5 8006a24: f000 f8ce bl 8006bc4 <__swbuf_r> 8006a28: 3001 adds r0, #1 8006a2a: d1c9 bne.n 80069c0 <_puts_r+0x30> 8006a2c: e7e9 b.n 8006a02 <_puts_r+0x72> 8006a2e: 200a movs r0, #10 8006a30: 6823 ldr r3, [r4, #0] 8006a32: 1c5a adds r2, r3, #1 8006a34: 6022 str r2, [r4, #0] 8006a36: 7018 strb r0, [r3, #0] 8006a38: bd70 pop {r4, r5, r6, pc} 8006a3a: bf00 nop 8006a3c: 08007b84 .word 0x08007b84 8006a40: 08007ba4 .word 0x08007ba4 8006a44: 08007b64 .word 0x08007b64 08006a48 : 8006a48: 4b02 ldr r3, [pc, #8] ; (8006a54 ) 8006a4a: 4601 mov r1, r0 8006a4c: 6818 ldr r0, [r3, #0] 8006a4e: f7ff bf9f b.w 8006990 <_puts_r> 8006a52: bf00 nop 8006a54: 2000000c .word 0x2000000c 08006a58 : 8006a58: 2900 cmp r1, #0 8006a5a: f44f 6380 mov.w r3, #1024 ; 0x400 8006a5e: bf0c ite eq 8006a60: 2202 moveq r2, #2 8006a62: 2200 movne r2, #0 8006a64: f000 b800 b.w 8006a68 08006a68 : 8006a68: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8006a6c: 461d mov r5, r3 8006a6e: 4b51 ldr r3, [pc, #324] ; (8006bb4 ) 8006a70: 4604 mov r4, r0 8006a72: 681e ldr r6, [r3, #0] 8006a74: 460f mov r7, r1 8006a76: 4690 mov r8, r2 8006a78: b126 cbz r6, 8006a84 8006a7a: 69b3 ldr r3, [r6, #24] 8006a7c: b913 cbnz r3, 8006a84 8006a7e: 4630 mov r0, r6 8006a80: f000 fa52 bl 8006f28 <__sinit> 8006a84: 4b4c ldr r3, [pc, #304] ; (8006bb8 ) 8006a86: 429c cmp r4, r3 8006a88: d152 bne.n 8006b30 8006a8a: 6874 ldr r4, [r6, #4] 8006a8c: f1b8 0f02 cmp.w r8, #2 8006a90: d006 beq.n 8006aa0 8006a92: f1b8 0f01 cmp.w r8, #1 8006a96: f200 8089 bhi.w 8006bac 8006a9a: 2d00 cmp r5, #0 8006a9c: f2c0 8086 blt.w 8006bac 8006aa0: 4621 mov r1, r4 8006aa2: 4630 mov r0, r6 8006aa4: f000 f9d6 bl 8006e54 <_fflush_r> 8006aa8: 6b61 ldr r1, [r4, #52] ; 0x34 8006aaa: b141 cbz r1, 8006abe 8006aac: f104 0344 add.w r3, r4, #68 ; 0x44 8006ab0: 4299 cmp r1, r3 8006ab2: d002 beq.n 8006aba 8006ab4: 4630 mov r0, r6 8006ab6: f000 fb2d bl 8007114 <_free_r> 8006aba: 2300 movs r3, #0 8006abc: 6363 str r3, [r4, #52] ; 0x34 8006abe: 2300 movs r3, #0 8006ac0: 61a3 str r3, [r4, #24] 8006ac2: 6063 str r3, [r4, #4] 8006ac4: 89a3 ldrh r3, [r4, #12] 8006ac6: 061b lsls r3, r3, #24 8006ac8: d503 bpl.n 8006ad2 8006aca: 6921 ldr r1, [r4, #16] 8006acc: 4630 mov r0, r6 8006ace: f000 fb21 bl 8007114 <_free_r> 8006ad2: 89a3 ldrh r3, [r4, #12] 8006ad4: f1b8 0f02 cmp.w r8, #2 8006ad8: f423 634a bic.w r3, r3, #3232 ; 0xca0 8006adc: f023 0303 bic.w r3, r3, #3 8006ae0: 81a3 strh r3, [r4, #12] 8006ae2: d05d beq.n 8006ba0 8006ae4: ab01 add r3, sp, #4 8006ae6: 466a mov r2, sp 8006ae8: 4621 mov r1, r4 8006aea: 4630 mov r0, r6 8006aec: f000 faa6 bl 800703c <__swhatbuf_r> 8006af0: 89a3 ldrh r3, [r4, #12] 8006af2: 4318 orrs r0, r3 8006af4: 81a0 strh r0, [r4, #12] 8006af6: bb2d cbnz r5, 8006b44 8006af8: 9d00 ldr r5, [sp, #0] 8006afa: 4628 mov r0, r5 8006afc: f000 fb02 bl 8007104 8006b00: 4607 mov r7, r0 8006b02: 2800 cmp r0, #0 8006b04: d14e bne.n 8006ba4 8006b06: f8dd 9000 ldr.w r9, [sp] 8006b0a: 45a9 cmp r9, r5 8006b0c: d13c bne.n 8006b88 8006b0e: f04f 30ff mov.w r0, #4294967295 8006b12: 89a3 ldrh r3, [r4, #12] 8006b14: f043 0302 orr.w r3, r3, #2 8006b18: 81a3 strh r3, [r4, #12] 8006b1a: 2300 movs r3, #0 8006b1c: 60a3 str r3, [r4, #8] 8006b1e: f104 0347 add.w r3, r4, #71 ; 0x47 8006b22: 6023 str r3, [r4, #0] 8006b24: 6123 str r3, [r4, #16] 8006b26: 2301 movs r3, #1 8006b28: 6163 str r3, [r4, #20] 8006b2a: b003 add sp, #12 8006b2c: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8006b30: 4b22 ldr r3, [pc, #136] ; (8006bbc ) 8006b32: 429c cmp r4, r3 8006b34: d101 bne.n 8006b3a 8006b36: 68b4 ldr r4, [r6, #8] 8006b38: e7a8 b.n 8006a8c 8006b3a: 4b21 ldr r3, [pc, #132] ; (8006bc0 ) 8006b3c: 429c cmp r4, r3 8006b3e: bf08 it eq 8006b40: 68f4 ldreq r4, [r6, #12] 8006b42: e7a3 b.n 8006a8c 8006b44: 2f00 cmp r7, #0 8006b46: d0d8 beq.n 8006afa 8006b48: 69b3 ldr r3, [r6, #24] 8006b4a: b913 cbnz r3, 8006b52 8006b4c: 4630 mov r0, r6 8006b4e: f000 f9eb bl 8006f28 <__sinit> 8006b52: f1b8 0f01 cmp.w r8, #1 8006b56: bf08 it eq 8006b58: 89a3 ldrheq r3, [r4, #12] 8006b5a: 6027 str r7, [r4, #0] 8006b5c: bf04 itt eq 8006b5e: f043 0301 orreq.w r3, r3, #1 8006b62: 81a3 strheq r3, [r4, #12] 8006b64: 89a3 ldrh r3, [r4, #12] 8006b66: 6127 str r7, [r4, #16] 8006b68: f013 0008 ands.w r0, r3, #8 8006b6c: 6165 str r5, [r4, #20] 8006b6e: d01b beq.n 8006ba8 8006b70: f013 0001 ands.w r0, r3, #1 8006b74: f04f 0300 mov.w r3, #0 8006b78: bf1f itttt ne 8006b7a: 426d negne r5, r5 8006b7c: 60a3 strne r3, [r4, #8] 8006b7e: 61a5 strne r5, [r4, #24] 8006b80: 4618 movne r0, r3 8006b82: bf08 it eq 8006b84: 60a5 streq r5, [r4, #8] 8006b86: e7d0 b.n 8006b2a 8006b88: 4648 mov r0, r9 8006b8a: f000 fabb bl 8007104 8006b8e: 4607 mov r7, r0 8006b90: 2800 cmp r0, #0 8006b92: d0bc beq.n 8006b0e 8006b94: 89a3 ldrh r3, [r4, #12] 8006b96: 464d mov r5, r9 8006b98: f043 0380 orr.w r3, r3, #128 ; 0x80 8006b9c: 81a3 strh r3, [r4, #12] 8006b9e: e7d3 b.n 8006b48 8006ba0: 2000 movs r0, #0 8006ba2: e7b6 b.n 8006b12 8006ba4: 46a9 mov r9, r5 8006ba6: e7f5 b.n 8006b94 8006ba8: 60a0 str r0, [r4, #8] 8006baa: e7be b.n 8006b2a 8006bac: f04f 30ff mov.w r0, #4294967295 8006bb0: e7bb b.n 8006b2a 8006bb2: bf00 nop 8006bb4: 2000000c .word 0x2000000c 8006bb8: 08007b84 .word 0x08007b84 8006bbc: 08007ba4 .word 0x08007ba4 8006bc0: 08007b64 .word 0x08007b64 08006bc4 <__swbuf_r>: 8006bc4: b5f8 push {r3, r4, r5, r6, r7, lr} 8006bc6: 460e mov r6, r1 8006bc8: 4614 mov r4, r2 8006bca: 4605 mov r5, r0 8006bcc: b118 cbz r0, 8006bd6 <__swbuf_r+0x12> 8006bce: 6983 ldr r3, [r0, #24] 8006bd0: b90b cbnz r3, 8006bd6 <__swbuf_r+0x12> 8006bd2: f000 f9a9 bl 8006f28 <__sinit> 8006bd6: 4b21 ldr r3, [pc, #132] ; (8006c5c <__swbuf_r+0x98>) 8006bd8: 429c cmp r4, r3 8006bda: d12a bne.n 8006c32 <__swbuf_r+0x6e> 8006bdc: 686c ldr r4, [r5, #4] 8006bde: 69a3 ldr r3, [r4, #24] 8006be0: 60a3 str r3, [r4, #8] 8006be2: 89a3 ldrh r3, [r4, #12] 8006be4: 071a lsls r2, r3, #28 8006be6: d52e bpl.n 8006c46 <__swbuf_r+0x82> 8006be8: 6923 ldr r3, [r4, #16] 8006bea: b363 cbz r3, 8006c46 <__swbuf_r+0x82> 8006bec: 6923 ldr r3, [r4, #16] 8006bee: 6820 ldr r0, [r4, #0] 8006bf0: b2f6 uxtb r6, r6 8006bf2: 1ac0 subs r0, r0, r3 8006bf4: 6963 ldr r3, [r4, #20] 8006bf6: 4637 mov r7, r6 8006bf8: 4298 cmp r0, r3 8006bfa: db04 blt.n 8006c06 <__swbuf_r+0x42> 8006bfc: 4621 mov r1, r4 8006bfe: 4628 mov r0, r5 8006c00: f000 f928 bl 8006e54 <_fflush_r> 8006c04: bb28 cbnz r0, 8006c52 <__swbuf_r+0x8e> 8006c06: 68a3 ldr r3, [r4, #8] 8006c08: 3001 adds r0, #1 8006c0a: 3b01 subs r3, #1 8006c0c: 60a3 str r3, [r4, #8] 8006c0e: 6823 ldr r3, [r4, #0] 8006c10: 1c5a adds r2, r3, #1 8006c12: 6022 str r2, [r4, #0] 8006c14: 701e strb r6, [r3, #0] 8006c16: 6963 ldr r3, [r4, #20] 8006c18: 4298 cmp r0, r3 8006c1a: d004 beq.n 8006c26 <__swbuf_r+0x62> 8006c1c: 89a3 ldrh r3, [r4, #12] 8006c1e: 07db lsls r3, r3, #31 8006c20: d519 bpl.n 8006c56 <__swbuf_r+0x92> 8006c22: 2e0a cmp r6, #10 8006c24: d117 bne.n 8006c56 <__swbuf_r+0x92> 8006c26: 4621 mov r1, r4 8006c28: 4628 mov r0, r5 8006c2a: f000 f913 bl 8006e54 <_fflush_r> 8006c2e: b190 cbz r0, 8006c56 <__swbuf_r+0x92> 8006c30: e00f b.n 8006c52 <__swbuf_r+0x8e> 8006c32: 4b0b ldr r3, [pc, #44] ; (8006c60 <__swbuf_r+0x9c>) 8006c34: 429c cmp r4, r3 8006c36: d101 bne.n 8006c3c <__swbuf_r+0x78> 8006c38: 68ac ldr r4, [r5, #8] 8006c3a: e7d0 b.n 8006bde <__swbuf_r+0x1a> 8006c3c: 4b09 ldr r3, [pc, #36] ; (8006c64 <__swbuf_r+0xa0>) 8006c3e: 429c cmp r4, r3 8006c40: bf08 it eq 8006c42: 68ec ldreq r4, [r5, #12] 8006c44: e7cb b.n 8006bde <__swbuf_r+0x1a> 8006c46: 4621 mov r1, r4 8006c48: 4628 mov r0, r5 8006c4a: f000 f80d bl 8006c68 <__swsetup_r> 8006c4e: 2800 cmp r0, #0 8006c50: d0cc beq.n 8006bec <__swbuf_r+0x28> 8006c52: f04f 37ff mov.w r7, #4294967295 8006c56: 4638 mov r0, r7 8006c58: bdf8 pop {r3, r4, r5, r6, r7, pc} 8006c5a: bf00 nop 8006c5c: 08007b84 .word 0x08007b84 8006c60: 08007ba4 .word 0x08007ba4 8006c64: 08007b64 .word 0x08007b64 08006c68 <__swsetup_r>: 8006c68: 4b32 ldr r3, [pc, #200] ; (8006d34 <__swsetup_r+0xcc>) 8006c6a: b570 push {r4, r5, r6, lr} 8006c6c: 681d ldr r5, [r3, #0] 8006c6e: 4606 mov r6, r0 8006c70: 460c mov r4, r1 8006c72: b125 cbz r5, 8006c7e <__swsetup_r+0x16> 8006c74: 69ab ldr r3, [r5, #24] 8006c76: b913 cbnz r3, 8006c7e <__swsetup_r+0x16> 8006c78: 4628 mov r0, r5 8006c7a: f000 f955 bl 8006f28 <__sinit> 8006c7e: 4b2e ldr r3, [pc, #184] ; (8006d38 <__swsetup_r+0xd0>) 8006c80: 429c cmp r4, r3 8006c82: d10f bne.n 8006ca4 <__swsetup_r+0x3c> 8006c84: 686c ldr r4, [r5, #4] 8006c86: f9b4 300c ldrsh.w r3, [r4, #12] 8006c8a: b29a uxth r2, r3 8006c8c: 0715 lsls r5, r2, #28 8006c8e: d42c bmi.n 8006cea <__swsetup_r+0x82> 8006c90: 06d0 lsls r0, r2, #27 8006c92: d411 bmi.n 8006cb8 <__swsetup_r+0x50> 8006c94: 2209 movs r2, #9 8006c96: 6032 str r2, [r6, #0] 8006c98: f043 0340 orr.w r3, r3, #64 ; 0x40 8006c9c: 81a3 strh r3, [r4, #12] 8006c9e: f04f 30ff mov.w r0, #4294967295 8006ca2: bd70 pop {r4, r5, r6, pc} 8006ca4: 4b25 ldr r3, [pc, #148] ; (8006d3c <__swsetup_r+0xd4>) 8006ca6: 429c cmp r4, r3 8006ca8: d101 bne.n 8006cae <__swsetup_r+0x46> 8006caa: 68ac ldr r4, [r5, #8] 8006cac: e7eb b.n 8006c86 <__swsetup_r+0x1e> 8006cae: 4b24 ldr r3, [pc, #144] ; (8006d40 <__swsetup_r+0xd8>) 8006cb0: 429c cmp r4, r3 8006cb2: bf08 it eq 8006cb4: 68ec ldreq r4, [r5, #12] 8006cb6: e7e6 b.n 8006c86 <__swsetup_r+0x1e> 8006cb8: 0751 lsls r1, r2, #29 8006cba: d512 bpl.n 8006ce2 <__swsetup_r+0x7a> 8006cbc: 6b61 ldr r1, [r4, #52] ; 0x34 8006cbe: b141 cbz r1, 8006cd2 <__swsetup_r+0x6a> 8006cc0: f104 0344 add.w r3, r4, #68 ; 0x44 8006cc4: 4299 cmp r1, r3 8006cc6: d002 beq.n 8006cce <__swsetup_r+0x66> 8006cc8: 4630 mov r0, r6 8006cca: f000 fa23 bl 8007114 <_free_r> 8006cce: 2300 movs r3, #0 8006cd0: 6363 str r3, [r4, #52] ; 0x34 8006cd2: 89a3 ldrh r3, [r4, #12] 8006cd4: f023 0324 bic.w r3, r3, #36 ; 0x24 8006cd8: 81a3 strh r3, [r4, #12] 8006cda: 2300 movs r3, #0 8006cdc: 6063 str r3, [r4, #4] 8006cde: 6923 ldr r3, [r4, #16] 8006ce0: 6023 str r3, [r4, #0] 8006ce2: 89a3 ldrh r3, [r4, #12] 8006ce4: f043 0308 orr.w r3, r3, #8 8006ce8: 81a3 strh r3, [r4, #12] 8006cea: 6923 ldr r3, [r4, #16] 8006cec: b94b cbnz r3, 8006d02 <__swsetup_r+0x9a> 8006cee: 89a3 ldrh r3, [r4, #12] 8006cf0: f403 7320 and.w r3, r3, #640 ; 0x280 8006cf4: f5b3 7f00 cmp.w r3, #512 ; 0x200 8006cf8: d003 beq.n 8006d02 <__swsetup_r+0x9a> 8006cfa: 4621 mov r1, r4 8006cfc: 4630 mov r0, r6 8006cfe: f000 f9c1 bl 8007084 <__smakebuf_r> 8006d02: 89a2 ldrh r2, [r4, #12] 8006d04: f012 0301 ands.w r3, r2, #1 8006d08: d00c beq.n 8006d24 <__swsetup_r+0xbc> 8006d0a: 2300 movs r3, #0 8006d0c: 60a3 str r3, [r4, #8] 8006d0e: 6963 ldr r3, [r4, #20] 8006d10: 425b negs r3, r3 8006d12: 61a3 str r3, [r4, #24] 8006d14: 6923 ldr r3, [r4, #16] 8006d16: b953 cbnz r3, 8006d2e <__swsetup_r+0xc6> 8006d18: f9b4 300c ldrsh.w r3, [r4, #12] 8006d1c: f013 0080 ands.w r0, r3, #128 ; 0x80 8006d20: d1ba bne.n 8006c98 <__swsetup_r+0x30> 8006d22: bd70 pop {r4, r5, r6, pc} 8006d24: 0792 lsls r2, r2, #30 8006d26: bf58 it pl 8006d28: 6963 ldrpl r3, [r4, #20] 8006d2a: 60a3 str r3, [r4, #8] 8006d2c: e7f2 b.n 8006d14 <__swsetup_r+0xac> 8006d2e: 2000 movs r0, #0 8006d30: e7f7 b.n 8006d22 <__swsetup_r+0xba> 8006d32: bf00 nop 8006d34: 2000000c .word 0x2000000c 8006d38: 08007b84 .word 0x08007b84 8006d3c: 08007ba4 .word 0x08007ba4 8006d40: 08007b64 .word 0x08007b64 08006d44 <__sflush_r>: 8006d44: 898a ldrh r2, [r1, #12] 8006d46: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8006d4a: 4605 mov r5, r0 8006d4c: 0710 lsls r0, r2, #28 8006d4e: 460c mov r4, r1 8006d50: d45a bmi.n 8006e08 <__sflush_r+0xc4> 8006d52: 684b ldr r3, [r1, #4] 8006d54: 2b00 cmp r3, #0 8006d56: dc05 bgt.n 8006d64 <__sflush_r+0x20> 8006d58: 6c0b ldr r3, [r1, #64] ; 0x40 8006d5a: 2b00 cmp r3, #0 8006d5c: dc02 bgt.n 8006d64 <__sflush_r+0x20> 8006d5e: 2000 movs r0, #0 8006d60: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006d64: 6ae6 ldr r6, [r4, #44] ; 0x2c 8006d66: 2e00 cmp r6, #0 8006d68: d0f9 beq.n 8006d5e <__sflush_r+0x1a> 8006d6a: 2300 movs r3, #0 8006d6c: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8006d70: 682f ldr r7, [r5, #0] 8006d72: 602b str r3, [r5, #0] 8006d74: d033 beq.n 8006dde <__sflush_r+0x9a> 8006d76: 6d60 ldr r0, [r4, #84] ; 0x54 8006d78: 89a3 ldrh r3, [r4, #12] 8006d7a: 075a lsls r2, r3, #29 8006d7c: d505 bpl.n 8006d8a <__sflush_r+0x46> 8006d7e: 6863 ldr r3, [r4, #4] 8006d80: 1ac0 subs r0, r0, r3 8006d82: 6b63 ldr r3, [r4, #52] ; 0x34 8006d84: b10b cbz r3, 8006d8a <__sflush_r+0x46> 8006d86: 6c23 ldr r3, [r4, #64] ; 0x40 8006d88: 1ac0 subs r0, r0, r3 8006d8a: 2300 movs r3, #0 8006d8c: 4602 mov r2, r0 8006d8e: 6ae6 ldr r6, [r4, #44] ; 0x2c 8006d90: 6a21 ldr r1, [r4, #32] 8006d92: 4628 mov r0, r5 8006d94: 47b0 blx r6 8006d96: 1c43 adds r3, r0, #1 8006d98: 89a3 ldrh r3, [r4, #12] 8006d9a: d106 bne.n 8006daa <__sflush_r+0x66> 8006d9c: 6829 ldr r1, [r5, #0] 8006d9e: 291d cmp r1, #29 8006da0: d84b bhi.n 8006e3a <__sflush_r+0xf6> 8006da2: 4a2b ldr r2, [pc, #172] ; (8006e50 <__sflush_r+0x10c>) 8006da4: 40ca lsrs r2, r1 8006da6: 07d6 lsls r6, r2, #31 8006da8: d547 bpl.n 8006e3a <__sflush_r+0xf6> 8006daa: 2200 movs r2, #0 8006dac: 6062 str r2, [r4, #4] 8006dae: 6922 ldr r2, [r4, #16] 8006db0: 04d9 lsls r1, r3, #19 8006db2: 6022 str r2, [r4, #0] 8006db4: d504 bpl.n 8006dc0 <__sflush_r+0x7c> 8006db6: 1c42 adds r2, r0, #1 8006db8: d101 bne.n 8006dbe <__sflush_r+0x7a> 8006dba: 682b ldr r3, [r5, #0] 8006dbc: b903 cbnz r3, 8006dc0 <__sflush_r+0x7c> 8006dbe: 6560 str r0, [r4, #84] ; 0x54 8006dc0: 6b61 ldr r1, [r4, #52] ; 0x34 8006dc2: 602f str r7, [r5, #0] 8006dc4: 2900 cmp r1, #0 8006dc6: d0ca beq.n 8006d5e <__sflush_r+0x1a> 8006dc8: f104 0344 add.w r3, r4, #68 ; 0x44 8006dcc: 4299 cmp r1, r3 8006dce: d002 beq.n 8006dd6 <__sflush_r+0x92> 8006dd0: 4628 mov r0, r5 8006dd2: f000 f99f bl 8007114 <_free_r> 8006dd6: 2000 movs r0, #0 8006dd8: 6360 str r0, [r4, #52] ; 0x34 8006dda: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006dde: 6a21 ldr r1, [r4, #32] 8006de0: 2301 movs r3, #1 8006de2: 4628 mov r0, r5 8006de4: 47b0 blx r6 8006de6: 1c41 adds r1, r0, #1 8006de8: d1c6 bne.n 8006d78 <__sflush_r+0x34> 8006dea: 682b ldr r3, [r5, #0] 8006dec: 2b00 cmp r3, #0 8006dee: d0c3 beq.n 8006d78 <__sflush_r+0x34> 8006df0: 2b1d cmp r3, #29 8006df2: d001 beq.n 8006df8 <__sflush_r+0xb4> 8006df4: 2b16 cmp r3, #22 8006df6: d101 bne.n 8006dfc <__sflush_r+0xb8> 8006df8: 602f str r7, [r5, #0] 8006dfa: e7b0 b.n 8006d5e <__sflush_r+0x1a> 8006dfc: 89a3 ldrh r3, [r4, #12] 8006dfe: f043 0340 orr.w r3, r3, #64 ; 0x40 8006e02: 81a3 strh r3, [r4, #12] 8006e04: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006e08: 690f ldr r7, [r1, #16] 8006e0a: 2f00 cmp r7, #0 8006e0c: d0a7 beq.n 8006d5e <__sflush_r+0x1a> 8006e0e: 0793 lsls r3, r2, #30 8006e10: bf18 it ne 8006e12: 2300 movne r3, #0 8006e14: 680e ldr r6, [r1, #0] 8006e16: bf08 it eq 8006e18: 694b ldreq r3, [r1, #20] 8006e1a: eba6 0807 sub.w r8, r6, r7 8006e1e: 600f str r7, [r1, #0] 8006e20: 608b str r3, [r1, #8] 8006e22: f1b8 0f00 cmp.w r8, #0 8006e26: dd9a ble.n 8006d5e <__sflush_r+0x1a> 8006e28: 4643 mov r3, r8 8006e2a: 463a mov r2, r7 8006e2c: 6a21 ldr r1, [r4, #32] 8006e2e: 4628 mov r0, r5 8006e30: 6aa6 ldr r6, [r4, #40] ; 0x28 8006e32: 47b0 blx r6 8006e34: 2800 cmp r0, #0 8006e36: dc07 bgt.n 8006e48 <__sflush_r+0x104> 8006e38: 89a3 ldrh r3, [r4, #12] 8006e3a: f043 0340 orr.w r3, r3, #64 ; 0x40 8006e3e: 81a3 strh r3, [r4, #12] 8006e40: f04f 30ff mov.w r0, #4294967295 8006e44: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006e48: 4407 add r7, r0 8006e4a: eba8 0800 sub.w r8, r8, r0 8006e4e: e7e8 b.n 8006e22 <__sflush_r+0xde> 8006e50: 20400001 .word 0x20400001 08006e54 <_fflush_r>: 8006e54: b538 push {r3, r4, r5, lr} 8006e56: 690b ldr r3, [r1, #16] 8006e58: 4605 mov r5, r0 8006e5a: 460c mov r4, r1 8006e5c: b1db cbz r3, 8006e96 <_fflush_r+0x42> 8006e5e: b118 cbz r0, 8006e68 <_fflush_r+0x14> 8006e60: 6983 ldr r3, [r0, #24] 8006e62: b90b cbnz r3, 8006e68 <_fflush_r+0x14> 8006e64: f000 f860 bl 8006f28 <__sinit> 8006e68: 4b0c ldr r3, [pc, #48] ; (8006e9c <_fflush_r+0x48>) 8006e6a: 429c cmp r4, r3 8006e6c: d109 bne.n 8006e82 <_fflush_r+0x2e> 8006e6e: 686c ldr r4, [r5, #4] 8006e70: f9b4 300c ldrsh.w r3, [r4, #12] 8006e74: b17b cbz r3, 8006e96 <_fflush_r+0x42> 8006e76: 4621 mov r1, r4 8006e78: 4628 mov r0, r5 8006e7a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8006e7e: f7ff bf61 b.w 8006d44 <__sflush_r> 8006e82: 4b07 ldr r3, [pc, #28] ; (8006ea0 <_fflush_r+0x4c>) 8006e84: 429c cmp r4, r3 8006e86: d101 bne.n 8006e8c <_fflush_r+0x38> 8006e88: 68ac ldr r4, [r5, #8] 8006e8a: e7f1 b.n 8006e70 <_fflush_r+0x1c> 8006e8c: 4b05 ldr r3, [pc, #20] ; (8006ea4 <_fflush_r+0x50>) 8006e8e: 429c cmp r4, r3 8006e90: bf08 it eq 8006e92: 68ec ldreq r4, [r5, #12] 8006e94: e7ec b.n 8006e70 <_fflush_r+0x1c> 8006e96: 2000 movs r0, #0 8006e98: bd38 pop {r3, r4, r5, pc} 8006e9a: bf00 nop 8006e9c: 08007b84 .word 0x08007b84 8006ea0: 08007ba4 .word 0x08007ba4 8006ea4: 08007b64 .word 0x08007b64 08006ea8 <_cleanup_r>: 8006ea8: 4901 ldr r1, [pc, #4] ; (8006eb0 <_cleanup_r+0x8>) 8006eaa: f000 b8a9 b.w 8007000 <_fwalk_reent> 8006eae: bf00 nop 8006eb0: 08006e55 .word 0x08006e55 08006eb4 : 8006eb4: 2300 movs r3, #0 8006eb6: b510 push {r4, lr} 8006eb8: 4604 mov r4, r0 8006eba: 6003 str r3, [r0, #0] 8006ebc: 6043 str r3, [r0, #4] 8006ebe: 6083 str r3, [r0, #8] 8006ec0: 8181 strh r1, [r0, #12] 8006ec2: 6643 str r3, [r0, #100] ; 0x64 8006ec4: 81c2 strh r2, [r0, #14] 8006ec6: 6103 str r3, [r0, #16] 8006ec8: 6143 str r3, [r0, #20] 8006eca: 6183 str r3, [r0, #24] 8006ecc: 4619 mov r1, r3 8006ece: 2208 movs r2, #8 8006ed0: 305c adds r0, #92 ; 0x5c 8006ed2: f7ff fd3c bl 800694e 8006ed6: 4b05 ldr r3, [pc, #20] ; (8006eec ) 8006ed8: 6224 str r4, [r4, #32] 8006eda: 6263 str r3, [r4, #36] ; 0x24 8006edc: 4b04 ldr r3, [pc, #16] ; (8006ef0 ) 8006ede: 62a3 str r3, [r4, #40] ; 0x28 8006ee0: 4b04 ldr r3, [pc, #16] ; (8006ef4 ) 8006ee2: 62e3 str r3, [r4, #44] ; 0x2c 8006ee4: 4b04 ldr r3, [pc, #16] ; (8006ef8 ) 8006ee6: 6323 str r3, [r4, #48] ; 0x30 8006ee8: bd10 pop {r4, pc} 8006eea: bf00 nop 8006eec: 08007835 .word 0x08007835 8006ef0: 08007857 .word 0x08007857 8006ef4: 0800788f .word 0x0800788f 8006ef8: 080078b3 .word 0x080078b3 08006efc <__sfmoreglue>: 8006efc: b570 push {r4, r5, r6, lr} 8006efe: 2568 movs r5, #104 ; 0x68 8006f00: 1e4a subs r2, r1, #1 8006f02: 4355 muls r5, r2 8006f04: 460e mov r6, r1 8006f06: f105 0174 add.w r1, r5, #116 ; 0x74 8006f0a: f000 f94f bl 80071ac <_malloc_r> 8006f0e: 4604 mov r4, r0 8006f10: b140 cbz r0, 8006f24 <__sfmoreglue+0x28> 8006f12: 2100 movs r1, #0 8006f14: e880 0042 stmia.w r0, {r1, r6} 8006f18: 300c adds r0, #12 8006f1a: 60a0 str r0, [r4, #8] 8006f1c: f105 0268 add.w r2, r5, #104 ; 0x68 8006f20: f7ff fd15 bl 800694e 8006f24: 4620 mov r0, r4 8006f26: bd70 pop {r4, r5, r6, pc} 08006f28 <__sinit>: 8006f28: 6983 ldr r3, [r0, #24] 8006f2a: b510 push {r4, lr} 8006f2c: 4604 mov r4, r0 8006f2e: bb33 cbnz r3, 8006f7e <__sinit+0x56> 8006f30: 6483 str r3, [r0, #72] ; 0x48 8006f32: 64c3 str r3, [r0, #76] ; 0x4c 8006f34: 6503 str r3, [r0, #80] ; 0x50 8006f36: 4b12 ldr r3, [pc, #72] ; (8006f80 <__sinit+0x58>) 8006f38: 4a12 ldr r2, [pc, #72] ; (8006f84 <__sinit+0x5c>) 8006f3a: 681b ldr r3, [r3, #0] 8006f3c: 6282 str r2, [r0, #40] ; 0x28 8006f3e: 4298 cmp r0, r3 8006f40: bf04 itt eq 8006f42: 2301 moveq r3, #1 8006f44: 6183 streq r3, [r0, #24] 8006f46: f000 f81f bl 8006f88 <__sfp> 8006f4a: 6060 str r0, [r4, #4] 8006f4c: 4620 mov r0, r4 8006f4e: f000 f81b bl 8006f88 <__sfp> 8006f52: 60a0 str r0, [r4, #8] 8006f54: 4620 mov r0, r4 8006f56: f000 f817 bl 8006f88 <__sfp> 8006f5a: 2200 movs r2, #0 8006f5c: 60e0 str r0, [r4, #12] 8006f5e: 2104 movs r1, #4 8006f60: 6860 ldr r0, [r4, #4] 8006f62: f7ff ffa7 bl 8006eb4 8006f66: 2201 movs r2, #1 8006f68: 2109 movs r1, #9 8006f6a: 68a0 ldr r0, [r4, #8] 8006f6c: f7ff ffa2 bl 8006eb4 8006f70: 2202 movs r2, #2 8006f72: 2112 movs r1, #18 8006f74: 68e0 ldr r0, [r4, #12] 8006f76: f7ff ff9d bl 8006eb4 8006f7a: 2301 movs r3, #1 8006f7c: 61a3 str r3, [r4, #24] 8006f7e: bd10 pop {r4, pc} 8006f80: 08007b60 .word 0x08007b60 8006f84: 08006ea9 .word 0x08006ea9 08006f88 <__sfp>: 8006f88: b5f8 push {r3, r4, r5, r6, r7, lr} 8006f8a: 4b1c ldr r3, [pc, #112] ; (8006ffc <__sfp+0x74>) 8006f8c: 4607 mov r7, r0 8006f8e: 681e ldr r6, [r3, #0] 8006f90: 69b3 ldr r3, [r6, #24] 8006f92: b913 cbnz r3, 8006f9a <__sfp+0x12> 8006f94: 4630 mov r0, r6 8006f96: f7ff ffc7 bl 8006f28 <__sinit> 8006f9a: 3648 adds r6, #72 ; 0x48 8006f9c: 68b4 ldr r4, [r6, #8] 8006f9e: 6873 ldr r3, [r6, #4] 8006fa0: 3b01 subs r3, #1 8006fa2: d503 bpl.n 8006fac <__sfp+0x24> 8006fa4: 6833 ldr r3, [r6, #0] 8006fa6: b133 cbz r3, 8006fb6 <__sfp+0x2e> 8006fa8: 6836 ldr r6, [r6, #0] 8006faa: e7f7 b.n 8006f9c <__sfp+0x14> 8006fac: f9b4 500c ldrsh.w r5, [r4, #12] 8006fb0: b16d cbz r5, 8006fce <__sfp+0x46> 8006fb2: 3468 adds r4, #104 ; 0x68 8006fb4: e7f4 b.n 8006fa0 <__sfp+0x18> 8006fb6: 2104 movs r1, #4 8006fb8: 4638 mov r0, r7 8006fba: f7ff ff9f bl 8006efc <__sfmoreglue> 8006fbe: 6030 str r0, [r6, #0] 8006fc0: 2800 cmp r0, #0 8006fc2: d1f1 bne.n 8006fa8 <__sfp+0x20> 8006fc4: 230c movs r3, #12 8006fc6: 4604 mov r4, r0 8006fc8: 603b str r3, [r7, #0] 8006fca: 4620 mov r0, r4 8006fcc: bdf8 pop {r3, r4, r5, r6, r7, pc} 8006fce: f64f 73ff movw r3, #65535 ; 0xffff 8006fd2: 81e3 strh r3, [r4, #14] 8006fd4: 2301 movs r3, #1 8006fd6: 6665 str r5, [r4, #100] ; 0x64 8006fd8: 81a3 strh r3, [r4, #12] 8006fda: 6025 str r5, [r4, #0] 8006fdc: 60a5 str r5, [r4, #8] 8006fde: 6065 str r5, [r4, #4] 8006fe0: 6125 str r5, [r4, #16] 8006fe2: 6165 str r5, [r4, #20] 8006fe4: 61a5 str r5, [r4, #24] 8006fe6: 2208 movs r2, #8 8006fe8: 4629 mov r1, r5 8006fea: f104 005c add.w r0, r4, #92 ; 0x5c 8006fee: f7ff fcae bl 800694e 8006ff2: 6365 str r5, [r4, #52] ; 0x34 8006ff4: 63a5 str r5, [r4, #56] ; 0x38 8006ff6: 64a5 str r5, [r4, #72] ; 0x48 8006ff8: 64e5 str r5, [r4, #76] ; 0x4c 8006ffa: e7e6 b.n 8006fca <__sfp+0x42> 8006ffc: 08007b60 .word 0x08007b60 08007000 <_fwalk_reent>: 8007000: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8007004: 4680 mov r8, r0 8007006: 4689 mov r9, r1 8007008: 2600 movs r6, #0 800700a: f100 0448 add.w r4, r0, #72 ; 0x48 800700e: b914 cbnz r4, 8007016 <_fwalk_reent+0x16> 8007010: 4630 mov r0, r6 8007012: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8007016: 68a5 ldr r5, [r4, #8] 8007018: 6867 ldr r7, [r4, #4] 800701a: 3f01 subs r7, #1 800701c: d501 bpl.n 8007022 <_fwalk_reent+0x22> 800701e: 6824 ldr r4, [r4, #0] 8007020: e7f5 b.n 800700e <_fwalk_reent+0xe> 8007022: 89ab ldrh r3, [r5, #12] 8007024: 2b01 cmp r3, #1 8007026: d907 bls.n 8007038 <_fwalk_reent+0x38> 8007028: f9b5 300e ldrsh.w r3, [r5, #14] 800702c: 3301 adds r3, #1 800702e: d003 beq.n 8007038 <_fwalk_reent+0x38> 8007030: 4629 mov r1, r5 8007032: 4640 mov r0, r8 8007034: 47c8 blx r9 8007036: 4306 orrs r6, r0 8007038: 3568 adds r5, #104 ; 0x68 800703a: e7ee b.n 800701a <_fwalk_reent+0x1a> 0800703c <__swhatbuf_r>: 800703c: b570 push {r4, r5, r6, lr} 800703e: 460e mov r6, r1 8007040: f9b1 100e ldrsh.w r1, [r1, #14] 8007044: b090 sub sp, #64 ; 0x40 8007046: 2900 cmp r1, #0 8007048: 4614 mov r4, r2 800704a: 461d mov r5, r3 800704c: da07 bge.n 800705e <__swhatbuf_r+0x22> 800704e: 2300 movs r3, #0 8007050: 602b str r3, [r5, #0] 8007052: 89b3 ldrh r3, [r6, #12] 8007054: 061a lsls r2, r3, #24 8007056: d410 bmi.n 800707a <__swhatbuf_r+0x3e> 8007058: f44f 6380 mov.w r3, #1024 ; 0x400 800705c: e00e b.n 800707c <__swhatbuf_r+0x40> 800705e: aa01 add r2, sp, #4 8007060: f000 fc4e bl 8007900 <_fstat_r> 8007064: 2800 cmp r0, #0 8007066: dbf2 blt.n 800704e <__swhatbuf_r+0x12> 8007068: 9a02 ldr r2, [sp, #8] 800706a: f402 4270 and.w r2, r2, #61440 ; 0xf000 800706e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8007072: 425a negs r2, r3 8007074: 415a adcs r2, r3 8007076: 602a str r2, [r5, #0] 8007078: e7ee b.n 8007058 <__swhatbuf_r+0x1c> 800707a: 2340 movs r3, #64 ; 0x40 800707c: 2000 movs r0, #0 800707e: 6023 str r3, [r4, #0] 8007080: b010 add sp, #64 ; 0x40 8007082: bd70 pop {r4, r5, r6, pc} 08007084 <__smakebuf_r>: 8007084: 898b ldrh r3, [r1, #12] 8007086: b573 push {r0, r1, r4, r5, r6, lr} 8007088: 079d lsls r5, r3, #30 800708a: 4606 mov r6, r0 800708c: 460c mov r4, r1 800708e: d507 bpl.n 80070a0 <__smakebuf_r+0x1c> 8007090: f104 0347 add.w r3, r4, #71 ; 0x47 8007094: 6023 str r3, [r4, #0] 8007096: 6123 str r3, [r4, #16] 8007098: 2301 movs r3, #1 800709a: 6163 str r3, [r4, #20] 800709c: b002 add sp, #8 800709e: bd70 pop {r4, r5, r6, pc} 80070a0: ab01 add r3, sp, #4 80070a2: 466a mov r2, sp 80070a4: f7ff ffca bl 800703c <__swhatbuf_r> 80070a8: 9900 ldr r1, [sp, #0] 80070aa: 4605 mov r5, r0 80070ac: 4630 mov r0, r6 80070ae: f000 f87d bl 80071ac <_malloc_r> 80070b2: b948 cbnz r0, 80070c8 <__smakebuf_r+0x44> 80070b4: f9b4 300c ldrsh.w r3, [r4, #12] 80070b8: 059a lsls r2, r3, #22 80070ba: d4ef bmi.n 800709c <__smakebuf_r+0x18> 80070bc: f023 0303 bic.w r3, r3, #3 80070c0: f043 0302 orr.w r3, r3, #2 80070c4: 81a3 strh r3, [r4, #12] 80070c6: e7e3 b.n 8007090 <__smakebuf_r+0xc> 80070c8: 4b0d ldr r3, [pc, #52] ; (8007100 <__smakebuf_r+0x7c>) 80070ca: 62b3 str r3, [r6, #40] ; 0x28 80070cc: 89a3 ldrh r3, [r4, #12] 80070ce: 6020 str r0, [r4, #0] 80070d0: f043 0380 orr.w r3, r3, #128 ; 0x80 80070d4: 81a3 strh r3, [r4, #12] 80070d6: 9b00 ldr r3, [sp, #0] 80070d8: 6120 str r0, [r4, #16] 80070da: 6163 str r3, [r4, #20] 80070dc: 9b01 ldr r3, [sp, #4] 80070de: b15b cbz r3, 80070f8 <__smakebuf_r+0x74> 80070e0: f9b4 100e ldrsh.w r1, [r4, #14] 80070e4: 4630 mov r0, r6 80070e6: f000 fc1d bl 8007924 <_isatty_r> 80070ea: b128 cbz r0, 80070f8 <__smakebuf_r+0x74> 80070ec: 89a3 ldrh r3, [r4, #12] 80070ee: f023 0303 bic.w r3, r3, #3 80070f2: f043 0301 orr.w r3, r3, #1 80070f6: 81a3 strh r3, [r4, #12] 80070f8: 89a3 ldrh r3, [r4, #12] 80070fa: 431d orrs r5, r3 80070fc: 81a5 strh r5, [r4, #12] 80070fe: e7cd b.n 800709c <__smakebuf_r+0x18> 8007100: 08006ea9 .word 0x08006ea9 08007104 : 8007104: 4b02 ldr r3, [pc, #8] ; (8007110 ) 8007106: 4601 mov r1, r0 8007108: 6818 ldr r0, [r3, #0] 800710a: f000 b84f b.w 80071ac <_malloc_r> 800710e: bf00 nop 8007110: 2000000c .word 0x2000000c 08007114 <_free_r>: 8007114: b538 push {r3, r4, r5, lr} 8007116: 4605 mov r5, r0 8007118: 2900 cmp r1, #0 800711a: d043 beq.n 80071a4 <_free_r+0x90> 800711c: f851 3c04 ldr.w r3, [r1, #-4] 8007120: 1f0c subs r4, r1, #4 8007122: 2b00 cmp r3, #0 8007124: bfb8 it lt 8007126: 18e4 addlt r4, r4, r3 8007128: f000 fc2c bl 8007984 <__malloc_lock> 800712c: 4a1e ldr r2, [pc, #120] ; (80071a8 <_free_r+0x94>) 800712e: 6813 ldr r3, [r2, #0] 8007130: 4610 mov r0, r2 8007132: b933 cbnz r3, 8007142 <_free_r+0x2e> 8007134: 6063 str r3, [r4, #4] 8007136: 6014 str r4, [r2, #0] 8007138: 4628 mov r0, r5 800713a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800713e: f000 bc22 b.w 8007986 <__malloc_unlock> 8007142: 42a3 cmp r3, r4 8007144: d90b bls.n 800715e <_free_r+0x4a> 8007146: 6821 ldr r1, [r4, #0] 8007148: 1862 adds r2, r4, r1 800714a: 4293 cmp r3, r2 800714c: bf01 itttt eq 800714e: 681a ldreq r2, [r3, #0] 8007150: 685b ldreq r3, [r3, #4] 8007152: 1852 addeq r2, r2, r1 8007154: 6022 streq r2, [r4, #0] 8007156: 6063 str r3, [r4, #4] 8007158: 6004 str r4, [r0, #0] 800715a: e7ed b.n 8007138 <_free_r+0x24> 800715c: 4613 mov r3, r2 800715e: 685a ldr r2, [r3, #4] 8007160: b10a cbz r2, 8007166 <_free_r+0x52> 8007162: 42a2 cmp r2, r4 8007164: d9fa bls.n 800715c <_free_r+0x48> 8007166: 6819 ldr r1, [r3, #0] 8007168: 1858 adds r0, r3, r1 800716a: 42a0 cmp r0, r4 800716c: d10b bne.n 8007186 <_free_r+0x72> 800716e: 6820 ldr r0, [r4, #0] 8007170: 4401 add r1, r0 8007172: 1858 adds r0, r3, r1 8007174: 4282 cmp r2, r0 8007176: 6019 str r1, [r3, #0] 8007178: d1de bne.n 8007138 <_free_r+0x24> 800717a: 6810 ldr r0, [r2, #0] 800717c: 6852 ldr r2, [r2, #4] 800717e: 4401 add r1, r0 8007180: 6019 str r1, [r3, #0] 8007182: 605a str r2, [r3, #4] 8007184: e7d8 b.n 8007138 <_free_r+0x24> 8007186: d902 bls.n 800718e <_free_r+0x7a> 8007188: 230c movs r3, #12 800718a: 602b str r3, [r5, #0] 800718c: e7d4 b.n 8007138 <_free_r+0x24> 800718e: 6820 ldr r0, [r4, #0] 8007190: 1821 adds r1, r4, r0 8007192: 428a cmp r2, r1 8007194: bf01 itttt eq 8007196: 6811 ldreq r1, [r2, #0] 8007198: 6852 ldreq r2, [r2, #4] 800719a: 1809 addeq r1, r1, r0 800719c: 6021 streq r1, [r4, #0] 800719e: 6062 str r2, [r4, #4] 80071a0: 605c str r4, [r3, #4] 80071a2: e7c9 b.n 8007138 <_free_r+0x24> 80071a4: bd38 pop {r3, r4, r5, pc} 80071a6: bf00 nop 80071a8: 200002ac .word 0x200002ac 080071ac <_malloc_r>: 80071ac: b570 push {r4, r5, r6, lr} 80071ae: 1ccd adds r5, r1, #3 80071b0: f025 0503 bic.w r5, r5, #3 80071b4: 3508 adds r5, #8 80071b6: 2d0c cmp r5, #12 80071b8: bf38 it cc 80071ba: 250c movcc r5, #12 80071bc: 2d00 cmp r5, #0 80071be: 4606 mov r6, r0 80071c0: db01 blt.n 80071c6 <_malloc_r+0x1a> 80071c2: 42a9 cmp r1, r5 80071c4: d903 bls.n 80071ce <_malloc_r+0x22> 80071c6: 230c movs r3, #12 80071c8: 6033 str r3, [r6, #0] 80071ca: 2000 movs r0, #0 80071cc: bd70 pop {r4, r5, r6, pc} 80071ce: f000 fbd9 bl 8007984 <__malloc_lock> 80071d2: 4a23 ldr r2, [pc, #140] ; (8007260 <_malloc_r+0xb4>) 80071d4: 6814 ldr r4, [r2, #0] 80071d6: 4621 mov r1, r4 80071d8: b991 cbnz r1, 8007200 <_malloc_r+0x54> 80071da: 4c22 ldr r4, [pc, #136] ; (8007264 <_malloc_r+0xb8>) 80071dc: 6823 ldr r3, [r4, #0] 80071de: b91b cbnz r3, 80071e8 <_malloc_r+0x3c> 80071e0: 4630 mov r0, r6 80071e2: f000 fb17 bl 8007814 <_sbrk_r> 80071e6: 6020 str r0, [r4, #0] 80071e8: 4629 mov r1, r5 80071ea: 4630 mov r0, r6 80071ec: f000 fb12 bl 8007814 <_sbrk_r> 80071f0: 1c43 adds r3, r0, #1 80071f2: d126 bne.n 8007242 <_malloc_r+0x96> 80071f4: 230c movs r3, #12 80071f6: 4630 mov r0, r6 80071f8: 6033 str r3, [r6, #0] 80071fa: f000 fbc4 bl 8007986 <__malloc_unlock> 80071fe: e7e4 b.n 80071ca <_malloc_r+0x1e> 8007200: 680b ldr r3, [r1, #0] 8007202: 1b5b subs r3, r3, r5 8007204: d41a bmi.n 800723c <_malloc_r+0x90> 8007206: 2b0b cmp r3, #11 8007208: d90f bls.n 800722a <_malloc_r+0x7e> 800720a: 600b str r3, [r1, #0] 800720c: 18cc adds r4, r1, r3 800720e: 50cd str r5, [r1, r3] 8007210: 4630 mov r0, r6 8007212: f000 fbb8 bl 8007986 <__malloc_unlock> 8007216: f104 000b add.w r0, r4, #11 800721a: 1d23 adds r3, r4, #4 800721c: f020 0007 bic.w r0, r0, #7 8007220: 1ac3 subs r3, r0, r3 8007222: d01b beq.n 800725c <_malloc_r+0xb0> 8007224: 425a negs r2, r3 8007226: 50e2 str r2, [r4, r3] 8007228: bd70 pop {r4, r5, r6, pc} 800722a: 428c cmp r4, r1 800722c: bf0b itete eq 800722e: 6863 ldreq r3, [r4, #4] 8007230: 684b ldrne r3, [r1, #4] 8007232: 6013 streq r3, [r2, #0] 8007234: 6063 strne r3, [r4, #4] 8007236: bf18 it ne 8007238: 460c movne r4, r1 800723a: e7e9 b.n 8007210 <_malloc_r+0x64> 800723c: 460c mov r4, r1 800723e: 6849 ldr r1, [r1, #4] 8007240: e7ca b.n 80071d8 <_malloc_r+0x2c> 8007242: 1cc4 adds r4, r0, #3 8007244: f024 0403 bic.w r4, r4, #3 8007248: 42a0 cmp r0, r4 800724a: d005 beq.n 8007258 <_malloc_r+0xac> 800724c: 1a21 subs r1, r4, r0 800724e: 4630 mov r0, r6 8007250: f000 fae0 bl 8007814 <_sbrk_r> 8007254: 3001 adds r0, #1 8007256: d0cd beq.n 80071f4 <_malloc_r+0x48> 8007258: 6025 str r5, [r4, #0] 800725a: e7d9 b.n 8007210 <_malloc_r+0x64> 800725c: bd70 pop {r4, r5, r6, pc} 800725e: bf00 nop 8007260: 200002ac .word 0x200002ac 8007264: 200002b0 .word 0x200002b0 08007268 <__sfputc_r>: 8007268: 6893 ldr r3, [r2, #8] 800726a: b410 push {r4} 800726c: 3b01 subs r3, #1 800726e: 2b00 cmp r3, #0 8007270: 6093 str r3, [r2, #8] 8007272: da08 bge.n 8007286 <__sfputc_r+0x1e> 8007274: 6994 ldr r4, [r2, #24] 8007276: 42a3 cmp r3, r4 8007278: db02 blt.n 8007280 <__sfputc_r+0x18> 800727a: b2cb uxtb r3, r1 800727c: 2b0a cmp r3, #10 800727e: d102 bne.n 8007286 <__sfputc_r+0x1e> 8007280: bc10 pop {r4} 8007282: f7ff bc9f b.w 8006bc4 <__swbuf_r> 8007286: 6813 ldr r3, [r2, #0] 8007288: 1c58 adds r0, r3, #1 800728a: 6010 str r0, [r2, #0] 800728c: 7019 strb r1, [r3, #0] 800728e: b2c8 uxtb r0, r1 8007290: bc10 pop {r4} 8007292: 4770 bx lr 08007294 <__sfputs_r>: 8007294: b5f8 push {r3, r4, r5, r6, r7, lr} 8007296: 4606 mov r6, r0 8007298: 460f mov r7, r1 800729a: 4614 mov r4, r2 800729c: 18d5 adds r5, r2, r3 800729e: 42ac cmp r4, r5 80072a0: d101 bne.n 80072a6 <__sfputs_r+0x12> 80072a2: 2000 movs r0, #0 80072a4: e007 b.n 80072b6 <__sfputs_r+0x22> 80072a6: 463a mov r2, r7 80072a8: f814 1b01 ldrb.w r1, [r4], #1 80072ac: 4630 mov r0, r6 80072ae: f7ff ffdb bl 8007268 <__sfputc_r> 80072b2: 1c43 adds r3, r0, #1 80072b4: d1f3 bne.n 800729e <__sfputs_r+0xa> 80072b6: bdf8 pop {r3, r4, r5, r6, r7, pc} 080072b8 <_vfiprintf_r>: 80072b8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80072bc: b09d sub sp, #116 ; 0x74 80072be: 460c mov r4, r1 80072c0: 4617 mov r7, r2 80072c2: 9303 str r3, [sp, #12] 80072c4: 4606 mov r6, r0 80072c6: b118 cbz r0, 80072d0 <_vfiprintf_r+0x18> 80072c8: 6983 ldr r3, [r0, #24] 80072ca: b90b cbnz r3, 80072d0 <_vfiprintf_r+0x18> 80072cc: f7ff fe2c bl 8006f28 <__sinit> 80072d0: 4b7c ldr r3, [pc, #496] ; (80074c4 <_vfiprintf_r+0x20c>) 80072d2: 429c cmp r4, r3 80072d4: d157 bne.n 8007386 <_vfiprintf_r+0xce> 80072d6: 6874 ldr r4, [r6, #4] 80072d8: 89a3 ldrh r3, [r4, #12] 80072da: 0718 lsls r0, r3, #28 80072dc: d55d bpl.n 800739a <_vfiprintf_r+0xe2> 80072de: 6923 ldr r3, [r4, #16] 80072e0: 2b00 cmp r3, #0 80072e2: d05a beq.n 800739a <_vfiprintf_r+0xe2> 80072e4: 2300 movs r3, #0 80072e6: 9309 str r3, [sp, #36] ; 0x24 80072e8: 2320 movs r3, #32 80072ea: f88d 3029 strb.w r3, [sp, #41] ; 0x29 80072ee: 2330 movs r3, #48 ; 0x30 80072f0: f04f 0b01 mov.w fp, #1 80072f4: f88d 302a strb.w r3, [sp, #42] ; 0x2a 80072f8: 46b8 mov r8, r7 80072fa: 4645 mov r5, r8 80072fc: f815 3b01 ldrb.w r3, [r5], #1 8007300: 2b00 cmp r3, #0 8007302: d155 bne.n 80073b0 <_vfiprintf_r+0xf8> 8007304: ebb8 0a07 subs.w sl, r8, r7 8007308: d00b beq.n 8007322 <_vfiprintf_r+0x6a> 800730a: 4653 mov r3, sl 800730c: 463a mov r2, r7 800730e: 4621 mov r1, r4 8007310: 4630 mov r0, r6 8007312: f7ff ffbf bl 8007294 <__sfputs_r> 8007316: 3001 adds r0, #1 8007318: f000 80c4 beq.w 80074a4 <_vfiprintf_r+0x1ec> 800731c: 9b09 ldr r3, [sp, #36] ; 0x24 800731e: 4453 add r3, sl 8007320: 9309 str r3, [sp, #36] ; 0x24 8007322: f898 3000 ldrb.w r3, [r8] 8007326: 2b00 cmp r3, #0 8007328: f000 80bc beq.w 80074a4 <_vfiprintf_r+0x1ec> 800732c: 2300 movs r3, #0 800732e: f04f 32ff mov.w r2, #4294967295 8007332: 9304 str r3, [sp, #16] 8007334: 9307 str r3, [sp, #28] 8007336: 9205 str r2, [sp, #20] 8007338: 9306 str r3, [sp, #24] 800733a: f88d 3053 strb.w r3, [sp, #83] ; 0x53 800733e: 931a str r3, [sp, #104] ; 0x68 8007340: 2205 movs r2, #5 8007342: 7829 ldrb r1, [r5, #0] 8007344: 4860 ldr r0, [pc, #384] ; (80074c8 <_vfiprintf_r+0x210>) 8007346: f000 fb0f bl 8007968 800734a: f105 0801 add.w r8, r5, #1 800734e: 9b04 ldr r3, [sp, #16] 8007350: 2800 cmp r0, #0 8007352: d131 bne.n 80073b8 <_vfiprintf_r+0x100> 8007354: 06d9 lsls r1, r3, #27 8007356: bf44 itt mi 8007358: 2220 movmi r2, #32 800735a: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800735e: 071a lsls r2, r3, #28 8007360: bf44 itt mi 8007362: 222b movmi r2, #43 ; 0x2b 8007364: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8007368: 782a ldrb r2, [r5, #0] 800736a: 2a2a cmp r2, #42 ; 0x2a 800736c: d02c beq.n 80073c8 <_vfiprintf_r+0x110> 800736e: 2100 movs r1, #0 8007370: 200a movs r0, #10 8007372: 9a07 ldr r2, [sp, #28] 8007374: 46a8 mov r8, r5 8007376: f898 3000 ldrb.w r3, [r8] 800737a: 3501 adds r5, #1 800737c: 3b30 subs r3, #48 ; 0x30 800737e: 2b09 cmp r3, #9 8007380: d96d bls.n 800745e <_vfiprintf_r+0x1a6> 8007382: b371 cbz r1, 80073e2 <_vfiprintf_r+0x12a> 8007384: e026 b.n 80073d4 <_vfiprintf_r+0x11c> 8007386: 4b51 ldr r3, [pc, #324] ; (80074cc <_vfiprintf_r+0x214>) 8007388: 429c cmp r4, r3 800738a: d101 bne.n 8007390 <_vfiprintf_r+0xd8> 800738c: 68b4 ldr r4, [r6, #8] 800738e: e7a3 b.n 80072d8 <_vfiprintf_r+0x20> 8007390: 4b4f ldr r3, [pc, #316] ; (80074d0 <_vfiprintf_r+0x218>) 8007392: 429c cmp r4, r3 8007394: bf08 it eq 8007396: 68f4 ldreq r4, [r6, #12] 8007398: e79e b.n 80072d8 <_vfiprintf_r+0x20> 800739a: 4621 mov r1, r4 800739c: 4630 mov r0, r6 800739e: f7ff fc63 bl 8006c68 <__swsetup_r> 80073a2: 2800 cmp r0, #0 80073a4: d09e beq.n 80072e4 <_vfiprintf_r+0x2c> 80073a6: f04f 30ff mov.w r0, #4294967295 80073aa: b01d add sp, #116 ; 0x74 80073ac: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80073b0: 2b25 cmp r3, #37 ; 0x25 80073b2: d0a7 beq.n 8007304 <_vfiprintf_r+0x4c> 80073b4: 46a8 mov r8, r5 80073b6: e7a0 b.n 80072fa <_vfiprintf_r+0x42> 80073b8: 4a43 ldr r2, [pc, #268] ; (80074c8 <_vfiprintf_r+0x210>) 80073ba: 4645 mov r5, r8 80073bc: 1a80 subs r0, r0, r2 80073be: fa0b f000 lsl.w r0, fp, r0 80073c2: 4318 orrs r0, r3 80073c4: 9004 str r0, [sp, #16] 80073c6: e7bb b.n 8007340 <_vfiprintf_r+0x88> 80073c8: 9a03 ldr r2, [sp, #12] 80073ca: 1d11 adds r1, r2, #4 80073cc: 6812 ldr r2, [r2, #0] 80073ce: 9103 str r1, [sp, #12] 80073d0: 2a00 cmp r2, #0 80073d2: db01 blt.n 80073d8 <_vfiprintf_r+0x120> 80073d4: 9207 str r2, [sp, #28] 80073d6: e004 b.n 80073e2 <_vfiprintf_r+0x12a> 80073d8: 4252 negs r2, r2 80073da: f043 0302 orr.w r3, r3, #2 80073de: 9207 str r2, [sp, #28] 80073e0: 9304 str r3, [sp, #16] 80073e2: f898 3000 ldrb.w r3, [r8] 80073e6: 2b2e cmp r3, #46 ; 0x2e 80073e8: d110 bne.n 800740c <_vfiprintf_r+0x154> 80073ea: f898 3001 ldrb.w r3, [r8, #1] 80073ee: f108 0101 add.w r1, r8, #1 80073f2: 2b2a cmp r3, #42 ; 0x2a 80073f4: d137 bne.n 8007466 <_vfiprintf_r+0x1ae> 80073f6: 9b03 ldr r3, [sp, #12] 80073f8: f108 0802 add.w r8, r8, #2 80073fc: 1d1a adds r2, r3, #4 80073fe: 681b ldr r3, [r3, #0] 8007400: 9203 str r2, [sp, #12] 8007402: 2b00 cmp r3, #0 8007404: bfb8 it lt 8007406: f04f 33ff movlt.w r3, #4294967295 800740a: 9305 str r3, [sp, #20] 800740c: 4d31 ldr r5, [pc, #196] ; (80074d4 <_vfiprintf_r+0x21c>) 800740e: 2203 movs r2, #3 8007410: f898 1000 ldrb.w r1, [r8] 8007414: 4628 mov r0, r5 8007416: f000 faa7 bl 8007968 800741a: b140 cbz r0, 800742e <_vfiprintf_r+0x176> 800741c: 2340 movs r3, #64 ; 0x40 800741e: 1b40 subs r0, r0, r5 8007420: fa03 f000 lsl.w r0, r3, r0 8007424: 9b04 ldr r3, [sp, #16] 8007426: f108 0801 add.w r8, r8, #1 800742a: 4303 orrs r3, r0 800742c: 9304 str r3, [sp, #16] 800742e: f898 1000 ldrb.w r1, [r8] 8007432: 2206 movs r2, #6 8007434: 4828 ldr r0, [pc, #160] ; (80074d8 <_vfiprintf_r+0x220>) 8007436: f108 0701 add.w r7, r8, #1 800743a: f88d 1028 strb.w r1, [sp, #40] ; 0x28 800743e: f000 fa93 bl 8007968 8007442: 2800 cmp r0, #0 8007444: d034 beq.n 80074b0 <_vfiprintf_r+0x1f8> 8007446: 4b25 ldr r3, [pc, #148] ; (80074dc <_vfiprintf_r+0x224>) 8007448: bb03 cbnz r3, 800748c <_vfiprintf_r+0x1d4> 800744a: 9b03 ldr r3, [sp, #12] 800744c: 3307 adds r3, #7 800744e: f023 0307 bic.w r3, r3, #7 8007452: 3308 adds r3, #8 8007454: 9303 str r3, [sp, #12] 8007456: 9b09 ldr r3, [sp, #36] ; 0x24 8007458: 444b add r3, r9 800745a: 9309 str r3, [sp, #36] ; 0x24 800745c: e74c b.n 80072f8 <_vfiprintf_r+0x40> 800745e: fb00 3202 mla r2, r0, r2, r3 8007462: 2101 movs r1, #1 8007464: e786 b.n 8007374 <_vfiprintf_r+0xbc> 8007466: 2300 movs r3, #0 8007468: 250a movs r5, #10 800746a: 4618 mov r0, r3 800746c: 9305 str r3, [sp, #20] 800746e: 4688 mov r8, r1 8007470: f898 2000 ldrb.w r2, [r8] 8007474: 3101 adds r1, #1 8007476: 3a30 subs r2, #48 ; 0x30 8007478: 2a09 cmp r2, #9 800747a: d903 bls.n 8007484 <_vfiprintf_r+0x1cc> 800747c: 2b00 cmp r3, #0 800747e: d0c5 beq.n 800740c <_vfiprintf_r+0x154> 8007480: 9005 str r0, [sp, #20] 8007482: e7c3 b.n 800740c <_vfiprintf_r+0x154> 8007484: fb05 2000 mla r0, r5, r0, r2 8007488: 2301 movs r3, #1 800748a: e7f0 b.n 800746e <_vfiprintf_r+0x1b6> 800748c: ab03 add r3, sp, #12 800748e: 9300 str r3, [sp, #0] 8007490: 4622 mov r2, r4 8007492: 4b13 ldr r3, [pc, #76] ; (80074e0 <_vfiprintf_r+0x228>) 8007494: a904 add r1, sp, #16 8007496: 4630 mov r0, r6 8007498: f3af 8000 nop.w 800749c: f1b0 3fff cmp.w r0, #4294967295 80074a0: 4681 mov r9, r0 80074a2: d1d8 bne.n 8007456 <_vfiprintf_r+0x19e> 80074a4: 89a3 ldrh r3, [r4, #12] 80074a6: 065b lsls r3, r3, #25 80074a8: f53f af7d bmi.w 80073a6 <_vfiprintf_r+0xee> 80074ac: 9809 ldr r0, [sp, #36] ; 0x24 80074ae: e77c b.n 80073aa <_vfiprintf_r+0xf2> 80074b0: ab03 add r3, sp, #12 80074b2: 9300 str r3, [sp, #0] 80074b4: 4622 mov r2, r4 80074b6: 4b0a ldr r3, [pc, #40] ; (80074e0 <_vfiprintf_r+0x228>) 80074b8: a904 add r1, sp, #16 80074ba: 4630 mov r0, r6 80074bc: f000 f88a bl 80075d4 <_printf_i> 80074c0: e7ec b.n 800749c <_vfiprintf_r+0x1e4> 80074c2: bf00 nop 80074c4: 08007b84 .word 0x08007b84 80074c8: 08007bc4 .word 0x08007bc4 80074cc: 08007ba4 .word 0x08007ba4 80074d0: 08007b64 .word 0x08007b64 80074d4: 08007bca .word 0x08007bca 80074d8: 08007bce .word 0x08007bce 80074dc: 00000000 .word 0x00000000 80074e0: 08007295 .word 0x08007295 080074e4 <_printf_common>: 80074e4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80074e8: 4691 mov r9, r2 80074ea: 461f mov r7, r3 80074ec: 688a ldr r2, [r1, #8] 80074ee: 690b ldr r3, [r1, #16] 80074f0: 4606 mov r6, r0 80074f2: 4293 cmp r3, r2 80074f4: bfb8 it lt 80074f6: 4613 movlt r3, r2 80074f8: f8c9 3000 str.w r3, [r9] 80074fc: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8007500: 460c mov r4, r1 8007502: f8dd 8020 ldr.w r8, [sp, #32] 8007506: b112 cbz r2, 800750e <_printf_common+0x2a> 8007508: 3301 adds r3, #1 800750a: f8c9 3000 str.w r3, [r9] 800750e: 6823 ldr r3, [r4, #0] 8007510: 0699 lsls r1, r3, #26 8007512: bf42 ittt mi 8007514: f8d9 3000 ldrmi.w r3, [r9] 8007518: 3302 addmi r3, #2 800751a: f8c9 3000 strmi.w r3, [r9] 800751e: 6825 ldr r5, [r4, #0] 8007520: f015 0506 ands.w r5, r5, #6 8007524: d107 bne.n 8007536 <_printf_common+0x52> 8007526: f104 0a19 add.w sl, r4, #25 800752a: 68e3 ldr r3, [r4, #12] 800752c: f8d9 2000 ldr.w r2, [r9] 8007530: 1a9b subs r3, r3, r2 8007532: 429d cmp r5, r3 8007534: db2a blt.n 800758c <_printf_common+0xa8> 8007536: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 800753a: 6822 ldr r2, [r4, #0] 800753c: 3300 adds r3, #0 800753e: bf18 it ne 8007540: 2301 movne r3, #1 8007542: 0692 lsls r2, r2, #26 8007544: d42f bmi.n 80075a6 <_printf_common+0xc2> 8007546: f104 0243 add.w r2, r4, #67 ; 0x43 800754a: 4639 mov r1, r7 800754c: 4630 mov r0, r6 800754e: 47c0 blx r8 8007550: 3001 adds r0, #1 8007552: d022 beq.n 800759a <_printf_common+0xb6> 8007554: 6823 ldr r3, [r4, #0] 8007556: 68e5 ldr r5, [r4, #12] 8007558: f003 0306 and.w r3, r3, #6 800755c: 2b04 cmp r3, #4 800755e: bf18 it ne 8007560: 2500 movne r5, #0 8007562: f8d9 2000 ldr.w r2, [r9] 8007566: f04f 0900 mov.w r9, #0 800756a: bf08 it eq 800756c: 1aad subeq r5, r5, r2 800756e: 68a3 ldr r3, [r4, #8] 8007570: 6922 ldr r2, [r4, #16] 8007572: bf08 it eq 8007574: ea25 75e5 biceq.w r5, r5, r5, asr #31 8007578: 4293 cmp r3, r2 800757a: bfc4 itt gt 800757c: 1a9b subgt r3, r3, r2 800757e: 18ed addgt r5, r5, r3 8007580: 341a adds r4, #26 8007582: 454d cmp r5, r9 8007584: d11b bne.n 80075be <_printf_common+0xda> 8007586: 2000 movs r0, #0 8007588: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800758c: 2301 movs r3, #1 800758e: 4652 mov r2, sl 8007590: 4639 mov r1, r7 8007592: 4630 mov r0, r6 8007594: 47c0 blx r8 8007596: 3001 adds r0, #1 8007598: d103 bne.n 80075a2 <_printf_common+0xbe> 800759a: f04f 30ff mov.w r0, #4294967295 800759e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80075a2: 3501 adds r5, #1 80075a4: e7c1 b.n 800752a <_printf_common+0x46> 80075a6: 2030 movs r0, #48 ; 0x30 80075a8: 18e1 adds r1, r4, r3 80075aa: f881 0043 strb.w r0, [r1, #67] ; 0x43 80075ae: 1c5a adds r2, r3, #1 80075b0: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 80075b4: 4422 add r2, r4 80075b6: 3302 adds r3, #2 80075b8: f882 1043 strb.w r1, [r2, #67] ; 0x43 80075bc: e7c3 b.n 8007546 <_printf_common+0x62> 80075be: 2301 movs r3, #1 80075c0: 4622 mov r2, r4 80075c2: 4639 mov r1, r7 80075c4: 4630 mov r0, r6 80075c6: 47c0 blx r8 80075c8: 3001 adds r0, #1 80075ca: d0e6 beq.n 800759a <_printf_common+0xb6> 80075cc: f109 0901 add.w r9, r9, #1 80075d0: e7d7 b.n 8007582 <_printf_common+0x9e> ... 080075d4 <_printf_i>: 80075d4: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 80075d8: 4617 mov r7, r2 80075da: 7e0a ldrb r2, [r1, #24] 80075dc: b085 sub sp, #20 80075de: 2a6e cmp r2, #110 ; 0x6e 80075e0: 4698 mov r8, r3 80075e2: 4606 mov r6, r0 80075e4: 460c mov r4, r1 80075e6: 9b0c ldr r3, [sp, #48] ; 0x30 80075e8: f101 0e43 add.w lr, r1, #67 ; 0x43 80075ec: f000 80bc beq.w 8007768 <_printf_i+0x194> 80075f0: d81a bhi.n 8007628 <_printf_i+0x54> 80075f2: 2a63 cmp r2, #99 ; 0x63 80075f4: d02e beq.n 8007654 <_printf_i+0x80> 80075f6: d80a bhi.n 800760e <_printf_i+0x3a> 80075f8: 2a00 cmp r2, #0 80075fa: f000 80c8 beq.w 800778e <_printf_i+0x1ba> 80075fe: 2a58 cmp r2, #88 ; 0x58 8007600: f000 808a beq.w 8007718 <_printf_i+0x144> 8007604: f104 0542 add.w r5, r4, #66 ; 0x42 8007608: f884 2042 strb.w r2, [r4, #66] ; 0x42 800760c: e02a b.n 8007664 <_printf_i+0x90> 800760e: 2a64 cmp r2, #100 ; 0x64 8007610: d001 beq.n 8007616 <_printf_i+0x42> 8007612: 2a69 cmp r2, #105 ; 0x69 8007614: d1f6 bne.n 8007604 <_printf_i+0x30> 8007616: 6821 ldr r1, [r4, #0] 8007618: 681a ldr r2, [r3, #0] 800761a: f011 0f80 tst.w r1, #128 ; 0x80 800761e: d023 beq.n 8007668 <_printf_i+0x94> 8007620: 1d11 adds r1, r2, #4 8007622: 6019 str r1, [r3, #0] 8007624: 6813 ldr r3, [r2, #0] 8007626: e027 b.n 8007678 <_printf_i+0xa4> 8007628: 2a73 cmp r2, #115 ; 0x73 800762a: f000 80b4 beq.w 8007796 <_printf_i+0x1c2> 800762e: d808 bhi.n 8007642 <_printf_i+0x6e> 8007630: 2a6f cmp r2, #111 ; 0x6f 8007632: d02a beq.n 800768a <_printf_i+0xb6> 8007634: 2a70 cmp r2, #112 ; 0x70 8007636: d1e5 bne.n 8007604 <_printf_i+0x30> 8007638: 680a ldr r2, [r1, #0] 800763a: f042 0220 orr.w r2, r2, #32 800763e: 600a str r2, [r1, #0] 8007640: e003 b.n 800764a <_printf_i+0x76> 8007642: 2a75 cmp r2, #117 ; 0x75 8007644: d021 beq.n 800768a <_printf_i+0xb6> 8007646: 2a78 cmp r2, #120 ; 0x78 8007648: d1dc bne.n 8007604 <_printf_i+0x30> 800764a: 2278 movs r2, #120 ; 0x78 800764c: 496f ldr r1, [pc, #444] ; (800780c <_printf_i+0x238>) 800764e: f884 2045 strb.w r2, [r4, #69] ; 0x45 8007652: e064 b.n 800771e <_printf_i+0x14a> 8007654: 681a ldr r2, [r3, #0] 8007656: f101 0542 add.w r5, r1, #66 ; 0x42 800765a: 1d11 adds r1, r2, #4 800765c: 6019 str r1, [r3, #0] 800765e: 6813 ldr r3, [r2, #0] 8007660: f884 3042 strb.w r3, [r4, #66] ; 0x42 8007664: 2301 movs r3, #1 8007666: e0a3 b.n 80077b0 <_printf_i+0x1dc> 8007668: f011 0f40 tst.w r1, #64 ; 0x40 800766c: f102 0104 add.w r1, r2, #4 8007670: 6019 str r1, [r3, #0] 8007672: d0d7 beq.n 8007624 <_printf_i+0x50> 8007674: f9b2 3000 ldrsh.w r3, [r2] 8007678: 2b00 cmp r3, #0 800767a: da03 bge.n 8007684 <_printf_i+0xb0> 800767c: 222d movs r2, #45 ; 0x2d 800767e: 425b negs r3, r3 8007680: f884 2043 strb.w r2, [r4, #67] ; 0x43 8007684: 4962 ldr r1, [pc, #392] ; (8007810 <_printf_i+0x23c>) 8007686: 220a movs r2, #10 8007688: e017 b.n 80076ba <_printf_i+0xe6> 800768a: 6820 ldr r0, [r4, #0] 800768c: 6819 ldr r1, [r3, #0] 800768e: f010 0f80 tst.w r0, #128 ; 0x80 8007692: d003 beq.n 800769c <_printf_i+0xc8> 8007694: 1d08 adds r0, r1, #4 8007696: 6018 str r0, [r3, #0] 8007698: 680b ldr r3, [r1, #0] 800769a: e006 b.n 80076aa <_printf_i+0xd6> 800769c: f010 0f40 tst.w r0, #64 ; 0x40 80076a0: f101 0004 add.w r0, r1, #4 80076a4: 6018 str r0, [r3, #0] 80076a6: d0f7 beq.n 8007698 <_printf_i+0xc4> 80076a8: 880b ldrh r3, [r1, #0] 80076aa: 2a6f cmp r2, #111 ; 0x6f 80076ac: bf14 ite ne 80076ae: 220a movne r2, #10 80076b0: 2208 moveq r2, #8 80076b2: 4957 ldr r1, [pc, #348] ; (8007810 <_printf_i+0x23c>) 80076b4: 2000 movs r0, #0 80076b6: f884 0043 strb.w r0, [r4, #67] ; 0x43 80076ba: 6865 ldr r5, [r4, #4] 80076bc: 2d00 cmp r5, #0 80076be: 60a5 str r5, [r4, #8] 80076c0: f2c0 809c blt.w 80077fc <_printf_i+0x228> 80076c4: 6820 ldr r0, [r4, #0] 80076c6: f020 0004 bic.w r0, r0, #4 80076ca: 6020 str r0, [r4, #0] 80076cc: 2b00 cmp r3, #0 80076ce: d13f bne.n 8007750 <_printf_i+0x17c> 80076d0: 2d00 cmp r5, #0 80076d2: f040 8095 bne.w 8007800 <_printf_i+0x22c> 80076d6: 4675 mov r5, lr 80076d8: 2a08 cmp r2, #8 80076da: d10b bne.n 80076f4 <_printf_i+0x120> 80076dc: 6823 ldr r3, [r4, #0] 80076de: 07da lsls r2, r3, #31 80076e0: d508 bpl.n 80076f4 <_printf_i+0x120> 80076e2: 6923 ldr r3, [r4, #16] 80076e4: 6862 ldr r2, [r4, #4] 80076e6: 429a cmp r2, r3 80076e8: bfde ittt le 80076ea: 2330 movle r3, #48 ; 0x30 80076ec: f805 3c01 strble.w r3, [r5, #-1] 80076f0: f105 35ff addle.w r5, r5, #4294967295 80076f4: ebae 0305 sub.w r3, lr, r5 80076f8: 6123 str r3, [r4, #16] 80076fa: f8cd 8000 str.w r8, [sp] 80076fe: 463b mov r3, r7 8007700: aa03 add r2, sp, #12 8007702: 4621 mov r1, r4 8007704: 4630 mov r0, r6 8007706: f7ff feed bl 80074e4 <_printf_common> 800770a: 3001 adds r0, #1 800770c: d155 bne.n 80077ba <_printf_i+0x1e6> 800770e: f04f 30ff mov.w r0, #4294967295 8007712: b005 add sp, #20 8007714: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8007718: f881 2045 strb.w r2, [r1, #69] ; 0x45 800771c: 493c ldr r1, [pc, #240] ; (8007810 <_printf_i+0x23c>) 800771e: 6822 ldr r2, [r4, #0] 8007720: 6818 ldr r0, [r3, #0] 8007722: f012 0f80 tst.w r2, #128 ; 0x80 8007726: f100 0504 add.w r5, r0, #4 800772a: 601d str r5, [r3, #0] 800772c: d001 beq.n 8007732 <_printf_i+0x15e> 800772e: 6803 ldr r3, [r0, #0] 8007730: e002 b.n 8007738 <_printf_i+0x164> 8007732: 0655 lsls r5, r2, #25 8007734: d5fb bpl.n 800772e <_printf_i+0x15a> 8007736: 8803 ldrh r3, [r0, #0] 8007738: 07d0 lsls r0, r2, #31 800773a: bf44 itt mi 800773c: f042 0220 orrmi.w r2, r2, #32 8007740: 6022 strmi r2, [r4, #0] 8007742: b91b cbnz r3, 800774c <_printf_i+0x178> 8007744: 6822 ldr r2, [r4, #0] 8007746: f022 0220 bic.w r2, r2, #32 800774a: 6022 str r2, [r4, #0] 800774c: 2210 movs r2, #16 800774e: e7b1 b.n 80076b4 <_printf_i+0xe0> 8007750: 4675 mov r5, lr 8007752: fbb3 f0f2 udiv r0, r3, r2 8007756: fb02 3310 mls r3, r2, r0, r3 800775a: 5ccb ldrb r3, [r1, r3] 800775c: f805 3d01 strb.w r3, [r5, #-1]! 8007760: 4603 mov r3, r0 8007762: 2800 cmp r0, #0 8007764: d1f5 bne.n 8007752 <_printf_i+0x17e> 8007766: e7b7 b.n 80076d8 <_printf_i+0x104> 8007768: 6808 ldr r0, [r1, #0] 800776a: 681a ldr r2, [r3, #0] 800776c: f010 0f80 tst.w r0, #128 ; 0x80 8007770: 6949 ldr r1, [r1, #20] 8007772: d004 beq.n 800777e <_printf_i+0x1aa> 8007774: 1d10 adds r0, r2, #4 8007776: 6018 str r0, [r3, #0] 8007778: 6813 ldr r3, [r2, #0] 800777a: 6019 str r1, [r3, #0] 800777c: e007 b.n 800778e <_printf_i+0x1ba> 800777e: f010 0f40 tst.w r0, #64 ; 0x40 8007782: f102 0004 add.w r0, r2, #4 8007786: 6018 str r0, [r3, #0] 8007788: 6813 ldr r3, [r2, #0] 800778a: d0f6 beq.n 800777a <_printf_i+0x1a6> 800778c: 8019 strh r1, [r3, #0] 800778e: 2300 movs r3, #0 8007790: 4675 mov r5, lr 8007792: 6123 str r3, [r4, #16] 8007794: e7b1 b.n 80076fa <_printf_i+0x126> 8007796: 681a ldr r2, [r3, #0] 8007798: 1d11 adds r1, r2, #4 800779a: 6019 str r1, [r3, #0] 800779c: 6815 ldr r5, [r2, #0] 800779e: 2100 movs r1, #0 80077a0: 6862 ldr r2, [r4, #4] 80077a2: 4628 mov r0, r5 80077a4: f000 f8e0 bl 8007968 80077a8: b108 cbz r0, 80077ae <_printf_i+0x1da> 80077aa: 1b40 subs r0, r0, r5 80077ac: 6060 str r0, [r4, #4] 80077ae: 6863 ldr r3, [r4, #4] 80077b0: 6123 str r3, [r4, #16] 80077b2: 2300 movs r3, #0 80077b4: f884 3043 strb.w r3, [r4, #67] ; 0x43 80077b8: e79f b.n 80076fa <_printf_i+0x126> 80077ba: 6923 ldr r3, [r4, #16] 80077bc: 462a mov r2, r5 80077be: 4639 mov r1, r7 80077c0: 4630 mov r0, r6 80077c2: 47c0 blx r8 80077c4: 3001 adds r0, #1 80077c6: d0a2 beq.n 800770e <_printf_i+0x13a> 80077c8: 6823 ldr r3, [r4, #0] 80077ca: 079b lsls r3, r3, #30 80077cc: d507 bpl.n 80077de <_printf_i+0x20a> 80077ce: 2500 movs r5, #0 80077d0: f104 0919 add.w r9, r4, #25 80077d4: 68e3 ldr r3, [r4, #12] 80077d6: 9a03 ldr r2, [sp, #12] 80077d8: 1a9b subs r3, r3, r2 80077da: 429d cmp r5, r3 80077dc: db05 blt.n 80077ea <_printf_i+0x216> 80077de: 68e0 ldr r0, [r4, #12] 80077e0: 9b03 ldr r3, [sp, #12] 80077e2: 4298 cmp r0, r3 80077e4: bfb8 it lt 80077e6: 4618 movlt r0, r3 80077e8: e793 b.n 8007712 <_printf_i+0x13e> 80077ea: 2301 movs r3, #1 80077ec: 464a mov r2, r9 80077ee: 4639 mov r1, r7 80077f0: 4630 mov r0, r6 80077f2: 47c0 blx r8 80077f4: 3001 adds r0, #1 80077f6: d08a beq.n 800770e <_printf_i+0x13a> 80077f8: 3501 adds r5, #1 80077fa: e7eb b.n 80077d4 <_printf_i+0x200> 80077fc: 2b00 cmp r3, #0 80077fe: d1a7 bne.n 8007750 <_printf_i+0x17c> 8007800: 780b ldrb r3, [r1, #0] 8007802: f104 0542 add.w r5, r4, #66 ; 0x42 8007806: f884 3042 strb.w r3, [r4, #66] ; 0x42 800780a: e765 b.n 80076d8 <_printf_i+0x104> 800780c: 08007be6 .word 0x08007be6 8007810: 08007bd5 .word 0x08007bd5 08007814 <_sbrk_r>: 8007814: b538 push {r3, r4, r5, lr} 8007816: 2300 movs r3, #0 8007818: 4c05 ldr r4, [pc, #20] ; (8007830 <_sbrk_r+0x1c>) 800781a: 4605 mov r5, r0 800781c: 4608 mov r0, r1 800781e: 6023 str r3, [r4, #0] 8007820: f000 f8ec bl 80079fc <_sbrk> 8007824: 1c43 adds r3, r0, #1 8007826: d102 bne.n 800782e <_sbrk_r+0x1a> 8007828: 6823 ldr r3, [r4, #0] 800782a: b103 cbz r3, 800782e <_sbrk_r+0x1a> 800782c: 602b str r3, [r5, #0] 800782e: bd38 pop {r3, r4, r5, pc} 8007830: 20000570 .word 0x20000570 08007834 <__sread>: 8007834: b510 push {r4, lr} 8007836: 460c mov r4, r1 8007838: f9b1 100e ldrsh.w r1, [r1, #14] 800783c: f000 f8a4 bl 8007988 <_read_r> 8007840: 2800 cmp r0, #0 8007842: bfab itete ge 8007844: 6d63 ldrge r3, [r4, #84] ; 0x54 8007846: 89a3 ldrhlt r3, [r4, #12] 8007848: 181b addge r3, r3, r0 800784a: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 800784e: bfac ite ge 8007850: 6563 strge r3, [r4, #84] ; 0x54 8007852: 81a3 strhlt r3, [r4, #12] 8007854: bd10 pop {r4, pc} 08007856 <__swrite>: 8007856: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800785a: 461f mov r7, r3 800785c: 898b ldrh r3, [r1, #12] 800785e: 4605 mov r5, r0 8007860: 05db lsls r3, r3, #23 8007862: 460c mov r4, r1 8007864: 4616 mov r6, r2 8007866: d505 bpl.n 8007874 <__swrite+0x1e> 8007868: 2302 movs r3, #2 800786a: 2200 movs r2, #0 800786c: f9b1 100e ldrsh.w r1, [r1, #14] 8007870: f000 f868 bl 8007944 <_lseek_r> 8007874: 89a3 ldrh r3, [r4, #12] 8007876: 4632 mov r2, r6 8007878: f423 5380 bic.w r3, r3, #4096 ; 0x1000 800787c: 81a3 strh r3, [r4, #12] 800787e: f9b4 100e ldrsh.w r1, [r4, #14] 8007882: 463b mov r3, r7 8007884: 4628 mov r0, r5 8007886: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800788a: f000 b817 b.w 80078bc <_write_r> 0800788e <__sseek>: 800788e: b510 push {r4, lr} 8007890: 460c mov r4, r1 8007892: f9b1 100e ldrsh.w r1, [r1, #14] 8007896: f000 f855 bl 8007944 <_lseek_r> 800789a: 1c43 adds r3, r0, #1 800789c: 89a3 ldrh r3, [r4, #12] 800789e: bf15 itete ne 80078a0: 6560 strne r0, [r4, #84] ; 0x54 80078a2: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 80078a6: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 80078aa: 81a3 strheq r3, [r4, #12] 80078ac: bf18 it ne 80078ae: 81a3 strhne r3, [r4, #12] 80078b0: bd10 pop {r4, pc} 080078b2 <__sclose>: 80078b2: f9b1 100e ldrsh.w r1, [r1, #14] 80078b6: f000 b813 b.w 80078e0 <_close_r> ... 080078bc <_write_r>: 80078bc: b538 push {r3, r4, r5, lr} 80078be: 4605 mov r5, r0 80078c0: 4608 mov r0, r1 80078c2: 4611 mov r1, r2 80078c4: 2200 movs r2, #0 80078c6: 4c05 ldr r4, [pc, #20] ; (80078dc <_write_r+0x20>) 80078c8: 6022 str r2, [r4, #0] 80078ca: 461a mov r2, r3 80078cc: f7fe faa4 bl 8005e18 <_write> 80078d0: 1c43 adds r3, r0, #1 80078d2: d102 bne.n 80078da <_write_r+0x1e> 80078d4: 6823 ldr r3, [r4, #0] 80078d6: b103 cbz r3, 80078da <_write_r+0x1e> 80078d8: 602b str r3, [r5, #0] 80078da: bd38 pop {r3, r4, r5, pc} 80078dc: 20000570 .word 0x20000570 080078e0 <_close_r>: 80078e0: b538 push {r3, r4, r5, lr} 80078e2: 2300 movs r3, #0 80078e4: 4c05 ldr r4, [pc, #20] ; (80078fc <_close_r+0x1c>) 80078e6: 4605 mov r5, r0 80078e8: 4608 mov r0, r1 80078ea: 6023 str r3, [r4, #0] 80078ec: f000 f85e bl 80079ac <_close> 80078f0: 1c43 adds r3, r0, #1 80078f2: d102 bne.n 80078fa <_close_r+0x1a> 80078f4: 6823 ldr r3, [r4, #0] 80078f6: b103 cbz r3, 80078fa <_close_r+0x1a> 80078f8: 602b str r3, [r5, #0] 80078fa: bd38 pop {r3, r4, r5, pc} 80078fc: 20000570 .word 0x20000570 08007900 <_fstat_r>: 8007900: b538 push {r3, r4, r5, lr} 8007902: 2300 movs r3, #0 8007904: 4c06 ldr r4, [pc, #24] ; (8007920 <_fstat_r+0x20>) 8007906: 4605 mov r5, r0 8007908: 4608 mov r0, r1 800790a: 4611 mov r1, r2 800790c: 6023 str r3, [r4, #0] 800790e: f000 f855 bl 80079bc <_fstat> 8007912: 1c43 adds r3, r0, #1 8007914: d102 bne.n 800791c <_fstat_r+0x1c> 8007916: 6823 ldr r3, [r4, #0] 8007918: b103 cbz r3, 800791c <_fstat_r+0x1c> 800791a: 602b str r3, [r5, #0] 800791c: bd38 pop {r3, r4, r5, pc} 800791e: bf00 nop 8007920: 20000570 .word 0x20000570 08007924 <_isatty_r>: 8007924: b538 push {r3, r4, r5, lr} 8007926: 2300 movs r3, #0 8007928: 4c05 ldr r4, [pc, #20] ; (8007940 <_isatty_r+0x1c>) 800792a: 4605 mov r5, r0 800792c: 4608 mov r0, r1 800792e: 6023 str r3, [r4, #0] 8007930: f000 f84c bl 80079cc <_isatty> 8007934: 1c43 adds r3, r0, #1 8007936: d102 bne.n 800793e <_isatty_r+0x1a> 8007938: 6823 ldr r3, [r4, #0] 800793a: b103 cbz r3, 800793e <_isatty_r+0x1a> 800793c: 602b str r3, [r5, #0] 800793e: bd38 pop {r3, r4, r5, pc} 8007940: 20000570 .word 0x20000570 08007944 <_lseek_r>: 8007944: b538 push {r3, r4, r5, lr} 8007946: 4605 mov r5, r0 8007948: 4608 mov r0, r1 800794a: 4611 mov r1, r2 800794c: 2200 movs r2, #0 800794e: 4c05 ldr r4, [pc, #20] ; (8007964 <_lseek_r+0x20>) 8007950: 6022 str r2, [r4, #0] 8007952: 461a mov r2, r3 8007954: f000 f842 bl 80079dc <_lseek> 8007958: 1c43 adds r3, r0, #1 800795a: d102 bne.n 8007962 <_lseek_r+0x1e> 800795c: 6823 ldr r3, [r4, #0] 800795e: b103 cbz r3, 8007962 <_lseek_r+0x1e> 8007960: 602b str r3, [r5, #0] 8007962: bd38 pop {r3, r4, r5, pc} 8007964: 20000570 .word 0x20000570 08007968 : 8007968: b510 push {r4, lr} 800796a: b2c9 uxtb r1, r1 800796c: 4402 add r2, r0 800796e: 4290 cmp r0, r2 8007970: 4603 mov r3, r0 8007972: d101 bne.n 8007978 8007974: 2000 movs r0, #0 8007976: bd10 pop {r4, pc} 8007978: 781c ldrb r4, [r3, #0] 800797a: 3001 adds r0, #1 800797c: 428c cmp r4, r1 800797e: d1f6 bne.n 800796e 8007980: 4618 mov r0, r3 8007982: bd10 pop {r4, pc} 08007984 <__malloc_lock>: 8007984: 4770 bx lr 08007986 <__malloc_unlock>: 8007986: 4770 bx lr 08007988 <_read_r>: 8007988: b538 push {r3, r4, r5, lr} 800798a: 4605 mov r5, r0 800798c: 4608 mov r0, r1 800798e: 4611 mov r1, r2 8007990: 2200 movs r2, #0 8007992: 4c05 ldr r4, [pc, #20] ; (80079a8 <_read_r+0x20>) 8007994: 6022 str r2, [r4, #0] 8007996: 461a mov r2, r3 8007998: f000 f828 bl 80079ec <_read> 800799c: 1c43 adds r3, r0, #1 800799e: d102 bne.n 80079a6 <_read_r+0x1e> 80079a0: 6823 ldr r3, [r4, #0] 80079a2: b103 cbz r3, 80079a6 <_read_r+0x1e> 80079a4: 602b str r3, [r5, #0] 80079a6: bd38 pop {r3, r4, r5, pc} 80079a8: 20000570 .word 0x20000570 080079ac <_close>: 80079ac: 2258 movs r2, #88 ; 0x58 80079ae: 4b02 ldr r3, [pc, #8] ; (80079b8 <_close+0xc>) 80079b0: f04f 30ff mov.w r0, #4294967295 80079b4: 601a str r2, [r3, #0] 80079b6: 4770 bx lr 80079b8: 20000570 .word 0x20000570 080079bc <_fstat>: 80079bc: 2258 movs r2, #88 ; 0x58 80079be: 4b02 ldr r3, [pc, #8] ; (80079c8 <_fstat+0xc>) 80079c0: f04f 30ff mov.w r0, #4294967295 80079c4: 601a str r2, [r3, #0] 80079c6: 4770 bx lr 80079c8: 20000570 .word 0x20000570 080079cc <_isatty>: 80079cc: 2258 movs r2, #88 ; 0x58 80079ce: 4b02 ldr r3, [pc, #8] ; (80079d8 <_isatty+0xc>) 80079d0: 2000 movs r0, #0 80079d2: 601a str r2, [r3, #0] 80079d4: 4770 bx lr 80079d6: bf00 nop 80079d8: 20000570 .word 0x20000570 080079dc <_lseek>: 80079dc: 2258 movs r2, #88 ; 0x58 80079de: 4b02 ldr r3, [pc, #8] ; (80079e8 <_lseek+0xc>) 80079e0: f04f 30ff mov.w r0, #4294967295 80079e4: 601a str r2, [r3, #0] 80079e6: 4770 bx lr 80079e8: 20000570 .word 0x20000570 080079ec <_read>: 80079ec: 2258 movs r2, #88 ; 0x58 80079ee: 4b02 ldr r3, [pc, #8] ; (80079f8 <_read+0xc>) 80079f0: f04f 30ff mov.w r0, #4294967295 80079f4: 601a str r2, [r3, #0] 80079f6: 4770 bx lr 80079f8: 20000570 .word 0x20000570 080079fc <_sbrk>: 80079fc: 4b04 ldr r3, [pc, #16] ; (8007a10 <_sbrk+0x14>) 80079fe: 4602 mov r2, r0 8007a00: 6819 ldr r1, [r3, #0] 8007a02: b909 cbnz r1, 8007a08 <_sbrk+0xc> 8007a04: 4903 ldr r1, [pc, #12] ; (8007a14 <_sbrk+0x18>) 8007a06: 6019 str r1, [r3, #0] 8007a08: 6818 ldr r0, [r3, #0] 8007a0a: 4402 add r2, r0 8007a0c: 601a str r2, [r3, #0] 8007a0e: 4770 bx lr 8007a10: 200002b4 .word 0x200002b4 8007a14: 20000574 .word 0x20000574 08007a18 <_init>: 8007a18: b5f8 push {r3, r4, r5, r6, r7, lr} 8007a1a: bf00 nop 8007a1c: bcf8 pop {r3, r4, r5, r6, r7} 8007a1e: bc08 pop {r3} 8007a20: 469e mov lr, r3 8007a22: 4770 bx lr 08007a24 <_fini>: 8007a24: b5f8 push {r3, r4, r5, r6, r7, lr} 8007a26: bf00 nop 8007a28: bcf8 pop {r3, r4, r5, r6, r7} 8007a2a: bc08 pop {r3} 8007a2c: 469e mov lr, r3 8007a2e: 4770 bx lr