STM32F103_RGB_Controller.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 000034b8 080041e4 080041e4 000041e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000001a4 0800769c 0800769c 0000769c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08007840 08007840 00007840 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08007844 08007844 00007844 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000070 20000000 08007848 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 000003e4 20000070 080078b8 00010070 2**3 ALLOC 7 ._user_heap_stack 00000600 20000454 080078b8 00010454 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00010070 2**0 CONTENTS, READONLY 9 .debug_info 0001bc8c 00000000 00000000 00010099 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 0000358f 00000000 00000000 0002bd25 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 00009a54 00000000 00000000 0002f2b4 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000bc8 00000000 00000000 00038d08 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00001298 00000000 00000000 000398d0 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00007fc1 00000000 00000000 0003ab68 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004944 00000000 00000000 00042b29 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0004746d 2**0 CONTENTS, READONLY 17 .debug_frame 00002c3c 00000000 00000000 000474ec 2**2 CONTENTS, READONLY, DEBUGGING 18 .stab 00000084 00000000 00000000 0004a128 2**2 CONTENTS, READONLY, DEBUGGING 19 .stabstr 00000117 00000000 00000000 0004a1ac 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080041e4 <__do_global_dtors_aux>: 80041e4: b510 push {r4, lr} 80041e6: 4c05 ldr r4, [pc, #20] ; (80041fc <__do_global_dtors_aux+0x18>) 80041e8: 7823 ldrb r3, [r4, #0] 80041ea: b933 cbnz r3, 80041fa <__do_global_dtors_aux+0x16> 80041ec: 4b04 ldr r3, [pc, #16] ; (8004200 <__do_global_dtors_aux+0x1c>) 80041ee: b113 cbz r3, 80041f6 <__do_global_dtors_aux+0x12> 80041f0: 4804 ldr r0, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x20>) 80041f2: f3af 8000 nop.w 80041f6: 2301 movs r3, #1 80041f8: 7023 strb r3, [r4, #0] 80041fa: bd10 pop {r4, pc} 80041fc: 20000070 .word 0x20000070 8004200: 00000000 .word 0x00000000 8004204: 08007684 .word 0x08007684 08004208 : 8004208: b508 push {r3, lr} 800420a: 4b03 ldr r3, [pc, #12] ; (8004218 ) 800420c: b11b cbz r3, 8004216 800420e: 4903 ldr r1, [pc, #12] ; (800421c ) 8004210: 4803 ldr r0, [pc, #12] ; (8004220 ) 8004212: f3af 8000 nop.w 8004216: bd08 pop {r3, pc} 8004218: 00000000 .word 0x00000000 800421c: 20000074 .word 0x20000074 8004220: 08007684 .word 0x08007684 08004224 <__aeabi_llsr>: 8004224: 40d0 lsrs r0, r2 8004226: 1c0b adds r3, r1, #0 8004228: 40d1 lsrs r1, r2 800422a: 469c mov ip, r3 800422c: 3a20 subs r2, #32 800422e: 40d3 lsrs r3, r2 8004230: 4318 orrs r0, r3 8004232: 4252 negs r2, r2 8004234: 4663 mov r3, ip 8004236: 4093 lsls r3, r2 8004238: 4318 orrs r0, r3 800423a: 4770 bx lr 0800423c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800423c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800423e: 4b0e ldr r3, [pc, #56] ; (8004278 ) { 8004240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8004242: 7818 ldrb r0, [r3, #0] 8004244: f44f 737a mov.w r3, #1000 ; 0x3e8 8004248: fbb3 f3f0 udiv r3, r3, r0 800424c: 4a0b ldr r2, [pc, #44] ; (800427c ) 800424e: 6810 ldr r0, [r2, #0] 8004250: fbb0 f0f3 udiv r0, r0, r3 8004254: f000 f89e bl 8004394 8004258: 4604 mov r4, r0 800425a: b958 cbnz r0, 8004274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800425c: 2d0f cmp r5, #15 800425e: d809 bhi.n 8004274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8004260: 4602 mov r2, r0 8004262: 4629 mov r1, r5 8004264: f04f 30ff mov.w r0, #4294967295 8004268: f000 f854 bl 8004314 uwTickPrio = TickPriority; 800426c: 4b04 ldr r3, [pc, #16] ; (8004280 ) 800426e: 4620 mov r0, r4 8004270: 601d str r5, [r3, #0] 8004272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8004274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8004276: bd38 pop {r3, r4, r5, pc} 8004278: 20000000 .word 0x20000000 800427c: 20000008 .word 0x20000008 8004280: 20000004 .word 0x20000004 08004284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004284: 4a07 ldr r2, [pc, #28] ; (80042a4 ) { 8004286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800428a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800428c: f043 0310 orr.w r3, r3, #16 8004290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8004292: f000 f82d bl 80042f0 HAL_InitTick(TICK_INT_PRIORITY); 8004296: 2000 movs r0, #0 8004298: f7ff ffd0 bl 800423c HAL_MspInit(); 800429c: f001 ffd2 bl 8006244 } 80042a0: 2000 movs r0, #0 80042a2: bd08 pop {r3, pc} 80042a4: 40022000 .word 0x40022000 080042a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80042a8: 4a03 ldr r2, [pc, #12] ; (80042b8 ) 80042aa: 4b04 ldr r3, [pc, #16] ; (80042bc ) 80042ac: 6811 ldr r1, [r2, #0] 80042ae: 781b ldrb r3, [r3, #0] 80042b0: 440b add r3, r1 80042b2: 6013 str r3, [r2, #0] 80042b4: 4770 bx lr 80042b6: bf00 nop 80042b8: 200002b8 .word 0x200002b8 80042bc: 20000000 .word 0x20000000 080042c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80042c0: 4b01 ldr r3, [pc, #4] ; (80042c8 ) 80042c2: 6818 ldr r0, [r3, #0] } 80042c4: 4770 bx lr 80042c6: bf00 nop 80042c8: 200002b8 .word 0x200002b8 080042cc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80042cc: b538 push {r3, r4, r5, lr} 80042ce: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80042d0: f7ff fff6 bl 80042c0 80042d4: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80042d6: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80042d8: bf1e ittt ne 80042da: 4b04 ldrne r3, [pc, #16] ; (80042ec ) 80042dc: 781b ldrbne r3, [r3, #0] 80042de: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80042e0: f7ff ffee bl 80042c0 80042e4: 1b40 subs r0, r0, r5 80042e6: 4284 cmp r4, r0 80042e8: d8fa bhi.n 80042e0 { } } 80042ea: bd38 pop {r3, r4, r5, pc} 80042ec: 20000000 .word 0x20000000 080042f0 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80042f0: 4a07 ldr r2, [pc, #28] ; (8004310 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042f2: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80042f4: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80042f6: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80042fa: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80042fe: 041b lsls r3, r3, #16 8004300: 0c1b lsrs r3, r3, #16 8004302: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8004306: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800430a: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 800430c: 60d3 str r3, [r2, #12] 800430e: 4770 bx lr 8004310: e000ed00 .word 0xe000ed00 08004314 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8004314: 4b17 ldr r3, [pc, #92] ; (8004374 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8004316: b530 push {r4, r5, lr} 8004318: 68dc ldr r4, [r3, #12] 800431a: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800431e: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004322: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8004324: 2b04 cmp r3, #4 8004326: bf28 it cs 8004328: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800432a: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800432c: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004330: bf98 it ls 8004332: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004334: fa05 f303 lsl.w r3, r5, r3 8004338: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800433c: bf88 it hi 800433e: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004340: 4019 ands r1, r3 8004342: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8004344: fa05 f404 lsl.w r4, r5, r4 8004348: 3c01 subs r4, #1 800434a: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 800434c: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800434e: ea42 0201 orr.w r2, r2, r1 8004352: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004356: bfaf iteee ge 8004358: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800435c: 4b06 ldrlt r3, [pc, #24] ; (8004378 ) 800435e: f000 000f andlt.w r0, r0, #15 8004362: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004364: bfa5 ittet ge 8004366: b2d2 uxtbge r2, r2 8004368: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800436c: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800436e: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8004372: bd30 pop {r4, r5, pc} 8004374: e000ed00 .word 0xe000ed00 8004378: e000ed14 .word 0xe000ed14 0800437c : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 800437c: 2301 movs r3, #1 800437e: 0942 lsrs r2, r0, #5 8004380: f000 001f and.w r0, r0, #31 8004384: fa03 f000 lsl.w r0, r3, r0 8004388: 4b01 ldr r3, [pc, #4] ; (8004390 ) 800438a: f843 0022 str.w r0, [r3, r2, lsl #2] 800438e: 4770 bx lr 8004390: e000e100 .word 0xe000e100 08004394 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8004394: 3801 subs r0, #1 8004396: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 800439a: d20a bcs.n 80043b2 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800439c: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800439e: 4b06 ldr r3, [pc, #24] ; (80043b8 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80043a0: 4a06 ldr r2, [pc, #24] ; (80043bc ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80043a2: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80043a4: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80043a8: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80043aa: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80043ac: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80043ae: 601a str r2, [r3, #0] 80043b0: 4770 bx lr return (1UL); /* Reload value impossible */ 80043b2: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80043b4: 4770 bx lr 80043b6: bf00 nop 80043b8: e000e010 .word 0xe000e010 80043bc: e000ed00 .word 0xe000ed00 080043c0 : */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { HAL_StatusTypeDef status = HAL_OK; if(HAL_DMA_STATE_BUSY != hdma->State) 80043c0: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80043c4: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80043c6: 2b02 cmp r3, #2 80043c8: d003 beq.n 80043d2 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80043ca: 2304 movs r3, #4 80043cc: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80043ce: 2001 movs r0, #1 80043d0: bd10 pop {r4, pc} } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80043d2: 6803 ldr r3, [r0, #0] 80043d4: 681a ldr r2, [r3, #0] 80043d6: f022 020e bic.w r2, r2, #14 80043da: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80043dc: 681a ldr r2, [r3, #0] 80043de: f022 0201 bic.w r2, r2, #1 80043e2: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80043e4: 4a29 ldr r2, [pc, #164] ; (800448c ) 80043e6: 4293 cmp r3, r2 80043e8: d924 bls.n 8004434 80043ea: f502 7262 add.w r2, r2, #904 ; 0x388 80043ee: 4293 cmp r3, r2 80043f0: d019 beq.n 8004426 80043f2: 3214 adds r2, #20 80043f4: 4293 cmp r3, r2 80043f6: d018 beq.n 800442a 80043f8: 3214 adds r2, #20 80043fa: 4293 cmp r3, r2 80043fc: d017 beq.n 800442e 80043fe: 3214 adds r2, #20 8004400: 4293 cmp r3, r2 8004402: bf0c ite eq 8004404: f44f 5380 moveq.w r3, #4096 ; 0x1000 8004408: f44f 3380 movne.w r3, #65536 ; 0x10000 800440c: 4a20 ldr r2, [pc, #128] ; (8004490 ) 800440e: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004410: 2301 movs r3, #1 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004412: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8004414: f880 3021 strb.w r3, [r0, #33] ; 0x21 /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8004418: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 800441a: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 800441e: b39b cbz r3, 8004488 { hdma->XferAbortCallback(hdma); 8004420: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8004422: 4620 mov r0, r4 8004424: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8004426: 2301 movs r3, #1 8004428: e7f0 b.n 800440c 800442a: 2310 movs r3, #16 800442c: e7ee b.n 800440c 800442e: f44f 7380 mov.w r3, #256 ; 0x100 8004432: e7eb b.n 800440c 8004434: 4917 ldr r1, [pc, #92] ; (8004494 ) 8004436: 428b cmp r3, r1 8004438: d016 beq.n 8004468 800443a: 3114 adds r1, #20 800443c: 428b cmp r3, r1 800443e: d015 beq.n 800446c 8004440: 3114 adds r1, #20 8004442: 428b cmp r3, r1 8004444: d014 beq.n 8004470 8004446: 3114 adds r1, #20 8004448: 428b cmp r3, r1 800444a: d014 beq.n 8004476 800444c: 3114 adds r1, #20 800444e: 428b cmp r3, r1 8004450: d014 beq.n 800447c 8004452: 3114 adds r1, #20 8004454: 428b cmp r3, r1 8004456: d014 beq.n 8004482 8004458: 4293 cmp r3, r2 800445a: bf14 ite ne 800445c: f44f 3380 movne.w r3, #65536 ; 0x10000 8004460: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8004464: 4a0c ldr r2, [pc, #48] ; (8004498 ) 8004466: e7d2 b.n 800440e 8004468: 2301 movs r3, #1 800446a: e7fb b.n 8004464 800446c: 2310 movs r3, #16 800446e: e7f9 b.n 8004464 8004470: f44f 7380 mov.w r3, #256 ; 0x100 8004474: e7f6 b.n 8004464 8004476: f44f 5380 mov.w r3, #4096 ; 0x1000 800447a: e7f3 b.n 8004464 800447c: f44f 3380 mov.w r3, #65536 ; 0x10000 8004480: e7f0 b.n 8004464 8004482: f44f 1380 mov.w r3, #1048576 ; 0x100000 8004486: e7ed b.n 8004464 HAL_StatusTypeDef status = HAL_OK; 8004488: 4618 mov r0, r3 } } return status; } 800448a: bd10 pop {r4, pc} 800448c: 40020080 .word 0x40020080 8004490: 40020400 .word 0x40020400 8004494: 40020008 .word 0x40020008 8004498: 40020000 .word 0x40020000 0800449c : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800449c: 4a11 ldr r2, [pc, #68] ; (80044e4 ) 800449e: 68d3 ldr r3, [r2, #12] 80044a0: f013 0310 ands.w r3, r3, #16 80044a4: d005 beq.n 80044b2 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 80044a6: 4910 ldr r1, [pc, #64] ; (80044e8 ) 80044a8: 69cb ldr r3, [r1, #28] 80044aa: f043 0302 orr.w r3, r3, #2 80044ae: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 80044b0: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80044b2: 68d2 ldr r2, [r2, #12] 80044b4: 0750 lsls r0, r2, #29 80044b6: d506 bpl.n 80044c6 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80044b8: 490b ldr r1, [pc, #44] ; (80044e8 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 80044ba: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80044be: 69ca ldr r2, [r1, #28] 80044c0: f042 0201 orr.w r2, r2, #1 80044c4: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 80044c6: 4a07 ldr r2, [pc, #28] ; (80044e4 ) 80044c8: 69d1 ldr r1, [r2, #28] 80044ca: 07c9 lsls r1, r1, #31 80044cc: d508 bpl.n 80044e0 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 80044ce: 4806 ldr r0, [pc, #24] ; (80044e8 ) 80044d0: 69c1 ldr r1, [r0, #28] 80044d2: f041 0104 orr.w r1, r1, #4 80044d6: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 80044d8: 69d1 ldr r1, [r2, #28] 80044da: f021 0101 bic.w r1, r1, #1 80044de: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 80044e0: 60d3 str r3, [r2, #12] 80044e2: 4770 bx lr 80044e4: 40022000 .word 0x40022000 80044e8: 200002c0 .word 0x200002c0 080044ec : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80044ec: 4b06 ldr r3, [pc, #24] ; (8004508 ) 80044ee: 6918 ldr r0, [r3, #16] 80044f0: f010 0080 ands.w r0, r0, #128 ; 0x80 80044f4: d007 beq.n 8004506 WRITE_REG(FLASH->KEYR, FLASH_KEY1); 80044f6: 4a05 ldr r2, [pc, #20] ; (800450c ) 80044f8: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 80044fa: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 80044fe: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8004500: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8004502: f3c0 10c0 ubfx r0, r0, #7, #1 } 8004506: 4770 bx lr 8004508: 40022000 .word 0x40022000 800450c: 45670123 .word 0x45670123 08004510 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8004510: 4a03 ldr r2, [pc, #12] ; (8004520 ) } 8004512: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8004514: 6913 ldr r3, [r2, #16] 8004516: f043 0380 orr.w r3, r3, #128 ; 0x80 800451a: 6113 str r3, [r2, #16] } 800451c: 4770 bx lr 800451e: bf00 nop 8004520: 40022000 .word 0x40022000 08004524 : { 8004524: b5f8 push {r3, r4, r5, r6, r7, lr} 8004526: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 8004528: f7ff feca bl 80042c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 800452c: 4c11 ldr r4, [pc, #68] ; (8004574 ) uint32_t tickstart = HAL_GetTick(); 800452e: 4607 mov r7, r0 8004530: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8004532: 68e3 ldr r3, [r4, #12] 8004534: 07d8 lsls r0, r3, #31 8004536: d412 bmi.n 800455e if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8004538: 68e3 ldr r3, [r4, #12] 800453a: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 800453c: bf44 itt mi 800453e: 2320 movmi r3, #32 8004540: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8004542: 68eb ldr r3, [r5, #12] 8004544: 06da lsls r2, r3, #27 8004546: d406 bmi.n 8004556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8004548: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 800454a: 07db lsls r3, r3, #31 800454c: d403 bmi.n 8004556 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800454e: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8004550: f010 0004 ands.w r0, r0, #4 8004554: d002 beq.n 800455c FLASH_SetErrorCode(); 8004556: f7ff ffa1 bl 800449c return HAL_ERROR; 800455a: 2001 movs r0, #1 } 800455c: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 800455e: 1c73 adds r3, r6, #1 8004560: d0e7 beq.n 8004532 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8004562: b90e cbnz r6, 8004568 return HAL_TIMEOUT; 8004564: 2003 movs r0, #3 8004566: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8004568: f7ff feaa bl 80042c0 800456c: 1bc0 subs r0, r0, r7 800456e: 4286 cmp r6, r0 8004570: d2df bcs.n 8004532 8004572: e7f7 b.n 8004564 8004574: 40022000 .word 0x40022000 08004578 : { 8004578: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 800457c: 4c1f ldr r4, [pc, #124] ; (80045fc ) { 800457e: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8004580: 7e23 ldrb r3, [r4, #24] { 8004582: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8004584: 2b01 cmp r3, #1 { 8004586: 460f mov r7, r1 8004588: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800458a: d033 beq.n 80045f4 800458c: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800458e: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8004592: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8004594: f7ff ffc6 bl 8004524 if(status == HAL_OK) 8004598: bb40 cbnz r0, 80045ec if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800459a: 2d01 cmp r5, #1 800459c: d003 beq.n 80045a6 nbiterations = 4U; 800459e: 2d02 cmp r5, #2 80045a0: bf0c ite eq 80045a2: 2502 moveq r5, #2 80045a4: 2504 movne r5, #4 80045a6: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80045a8: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 80045aa: f8df b054 ldr.w fp, [pc, #84] ; 8004600 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80045ae: 0132 lsls r2, r6, #4 80045b0: 4640 mov r0, r8 80045b2: 4649 mov r1, r9 80045b4: f7ff fe36 bl 8004224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80045b8: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 80045bc: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80045c0: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 80045c2: f043 0301 orr.w r3, r3, #1 80045c6: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 80045ca: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 80045ce: f24c 3050 movw r0, #50000 ; 0xc350 80045d2: f7ff ffa7 bl 8004524 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 80045d6: f8db 3010 ldr.w r3, [fp, #16] 80045da: f023 0301 bic.w r3, r3, #1 80045de: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 80045e2: b918 cbnz r0, 80045ec 80045e4: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 80045e6: b2f3 uxtb r3, r6 80045e8: 429d cmp r5, r3 80045ea: d8e0 bhi.n 80045ae __HAL_UNLOCK(&pFlash); 80045ec: 2300 movs r3, #0 80045ee: 7623 strb r3, [r4, #24] return status; 80045f0: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 80045f4: 2002 movs r0, #2 } 80045f6: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80045fa: bf00 nop 80045fc: 200002c0 .word 0x200002c0 8004600: 40022000 .word 0x40022000 08004604 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8004604: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 8004608: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800460a: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 800460c: 4f6c ldr r7, [pc, #432] ; (80047c0 ) 800460e: 4b6d ldr r3, [pc, #436] ; (80047c4 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8004610: f8df e1b8 ldr.w lr, [pc, #440] ; 80047cc switch (GPIO_Init->Mode) 8004614: f8df c1b8 ldr.w ip, [pc, #440] ; 80047d0 ioposition = (0x01U << position); 8004618: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 800461c: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 800461e: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8004622: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 8004626: 45a0 cmp r8, r4 8004628: f040 8085 bne.w 8004736 switch (GPIO_Init->Mode) 800462c: 684d ldr r5, [r1, #4] 800462e: 2d12 cmp r5, #18 8004630: f000 80b7 beq.w 80047a2 8004634: f200 808d bhi.w 8004752 8004638: 2d02 cmp r5, #2 800463a: f000 80af beq.w 800479c 800463e: f200 8081 bhi.w 8004744 8004642: 2d00 cmp r5, #0 8004644: f000 8091 beq.w 800476a 8004648: 2d01 cmp r5, #1 800464a: f000 80a5 beq.w 8004798 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800464e: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004652: 2cff cmp r4, #255 ; 0xff 8004654: bf93 iteet ls 8004656: 4682 movls sl, r0 8004658: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 800465c: 3d08 subhi r5, #8 800465e: f8d0 b000 ldrls.w fp, [r0] 8004662: bf92 itee ls 8004664: 00b5 lslls r5, r6, #2 8004666: f8d0 b004 ldrhi.w fp, [r0, #4] 800466a: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800466c: fa09 f805 lsl.w r8, r9, r5 8004670: ea2b 0808 bic.w r8, fp, r8 8004674: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8004678: bf88 it hi 800467a: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800467e: ea48 0505 orr.w r5, r8, r5 8004682: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8004686: f8d1 a004 ldr.w sl, [r1, #4] 800468a: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 800468e: d052 beq.n 8004736 __HAL_RCC_AFIO_CLK_ENABLE(); 8004690: 69bd ldr r5, [r7, #24] 8004692: f026 0803 bic.w r8, r6, #3 8004696: f045 0501 orr.w r5, r5, #1 800469a: 61bd str r5, [r7, #24] 800469c: 69bd ldr r5, [r7, #24] 800469e: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 80046a2: f005 0501 and.w r5, r5, #1 80046a6: 9501 str r5, [sp, #4] 80046a8: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046ac: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 80046b0: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046b2: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 80046b6: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 80046ba: fa09 f90b lsl.w r9, r9, fp 80046be: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80046c2: 4d41 ldr r5, [pc, #260] ; (80047c8 ) 80046c4: 42a8 cmp r0, r5 80046c6: d071 beq.n 80047ac 80046c8: f505 6580 add.w r5, r5, #1024 ; 0x400 80046cc: 42a8 cmp r0, r5 80046ce: d06f beq.n 80047b0 80046d0: f505 6580 add.w r5, r5, #1024 ; 0x400 80046d4: 42a8 cmp r0, r5 80046d6: d06d beq.n 80047b4 80046d8: f505 6580 add.w r5, r5, #1024 ; 0x400 80046dc: 42a8 cmp r0, r5 80046de: d06b beq.n 80047b8 80046e0: f505 6580 add.w r5, r5, #1024 ; 0x400 80046e4: 42a8 cmp r0, r5 80046e6: d069 beq.n 80047bc 80046e8: 4570 cmp r0, lr 80046ea: bf0c ite eq 80046ec: 2505 moveq r5, #5 80046ee: 2506 movne r5, #6 80046f0: fa05 f50b lsl.w r5, r5, fp 80046f4: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 80046f8: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 80046fc: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80046fe: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8004702: bf14 ite ne 8004704: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8004706: 43a5 biceq r5, r4 8004708: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 800470a: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 800470c: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8004710: bf14 ite ne 8004712: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8004714: 43a5 biceq r5, r4 8004716: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8004718: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800471a: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 800471e: bf14 ite ne 8004720: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8004722: 43a5 biceq r5, r4 8004724: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8004726: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8004728: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 800472c: bf14 ite ne 800472e: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8004730: ea25 0404 biceq.w r4, r5, r4 8004734: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8004736: 3601 adds r6, #1 8004738: 2e10 cmp r6, #16 800473a: f47f af6d bne.w 8004618 } } } } } 800473e: b003 add sp, #12 8004740: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8004744: 2d03 cmp r5, #3 8004746: d025 beq.n 8004794 8004748: 2d11 cmp r5, #17 800474a: d180 bne.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 800474c: 68ca ldr r2, [r1, #12] 800474e: 3204 adds r2, #4 break; 8004750: e77d b.n 800464e switch (GPIO_Init->Mode) 8004752: 4565 cmp r5, ip 8004754: d009 beq.n 800476a 8004756: d812 bhi.n 800477e 8004758: f8df 9078 ldr.w r9, [pc, #120] ; 80047d4 800475c: 454d cmp r5, r9 800475e: d004 beq.n 800476a 8004760: f509 3980 add.w r9, r9, #65536 ; 0x10000 8004764: 454d cmp r5, r9 8004766: f47f af72 bne.w 800464e if (GPIO_Init->Pull == GPIO_NOPULL) 800476a: 688a ldr r2, [r1, #8] 800476c: b1e2 cbz r2, 80047a8 else if (GPIO_Init->Pull == GPIO_PULLUP) 800476e: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8004770: bf0c ite eq 8004772: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8004776: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 800477a: 2208 movs r2, #8 800477c: e767 b.n 800464e switch (GPIO_Init->Mode) 800477e: f8df 9058 ldr.w r9, [pc, #88] ; 80047d8 8004782: 454d cmp r5, r9 8004784: d0f1 beq.n 800476a 8004786: f509 3980 add.w r9, r9, #65536 ; 0x10000 800478a: 454d cmp r5, r9 800478c: d0ed beq.n 800476a 800478e: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8004792: e7e7 b.n 8004764 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8004794: 2200 movs r2, #0 8004796: e75a b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8004798: 68ca ldr r2, [r1, #12] break; 800479a: e758 b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 800479c: 68ca ldr r2, [r1, #12] 800479e: 3208 adds r2, #8 break; 80047a0: e755 b.n 800464e config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80047a2: 68ca ldr r2, [r1, #12] 80047a4: 320c adds r2, #12 break; 80047a6: e752 b.n 800464e config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80047a8: 2204 movs r2, #4 80047aa: e750 b.n 800464e SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80047ac: 2500 movs r5, #0 80047ae: e79f b.n 80046f0 80047b0: 2501 movs r5, #1 80047b2: e79d b.n 80046f0 80047b4: 2502 movs r5, #2 80047b6: e79b b.n 80046f0 80047b8: 2503 movs r5, #3 80047ba: e799 b.n 80046f0 80047bc: 2504 movs r5, #4 80047be: e797 b.n 80046f0 80047c0: 40021000 .word 0x40021000 80047c4: 40010400 .word 0x40010400 80047c8: 40010800 .word 0x40010800 80047cc: 40011c00 .word 0x40011c00 80047d0: 10210000 .word 0x10210000 80047d4: 10110000 .word 0x10110000 80047d8: 10310000 .word 0x10310000 080047dc : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80047dc: b10a cbz r2, 80047e2 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 80047de: 6101 str r1, [r0, #16] 80047e0: 4770 bx lr 80047e2: 0409 lsls r1, r1, #16 80047e4: e7fb b.n 80047de 080047e6 : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 80047e6: 68c3 ldr r3, [r0, #12] 80047e8: 4059 eors r1, r3 80047ea: 60c1 str r1, [r0, #12] 80047ec: 4770 bx lr ... 080047f0 : * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 80047f0: b538 push {r3, r4, r5, lr} uint32_t freqrange = 0U; uint32_t pclk1 = 0U; /* Check the I2C handle allocation */ if(hi2c == NULL) 80047f2: 4604 mov r4, r0 80047f4: b908 cbnz r0, 80047fa { return HAL_ERROR; 80047f6: 2001 movs r0, #1 80047f8: bd38 pop {r3, r4, r5, pc} assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if(hi2c->State == HAL_I2C_STATE_RESET) 80047fa: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 80047fe: f003 02ff and.w r2, r3, #255 ; 0xff 8004802: b91b cbnz r3, 800480c { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8004804: f880 203c strb.w r2, [r0, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8004808: f001 fd3e bl 8006288 } hi2c->State = HAL_I2C_STATE_BUSY; 800480c: 2324 movs r3, #36 ; 0x24 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 800480e: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 8004810: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8004814: 6813 ldr r3, [r2, #0] 8004816: f023 0301 bic.w r3, r3, #1 800481a: 6013 str r3, [r2, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 800481c: f000 fae2 bl 8004de4 /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8004820: 6863 ldr r3, [r4, #4] 8004822: 4a2f ldr r2, [pc, #188] ; (80048e0 ) 8004824: 4293 cmp r3, r2 8004826: d830 bhi.n 800488a 8004828: 4a2e ldr r2, [pc, #184] ; (80048e4 ) 800482a: 4290 cmp r0, r2 800482c: d9e3 bls.n 80047f6 { return HAL_ERROR; } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 800482e: 4a2e ldr r2, [pc, #184] ; (80048e8 ) /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->CR2 = freqrange; 8004830: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 8004832: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8004836: 604a str r2, [r1, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004838: 3201 adds r2, #1 800483a: 620a str r2, [r1, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 800483c: 4a28 ldr r2, [pc, #160] ; (80048e0 ) 800483e: 3801 subs r0, #1 8004840: 4293 cmp r3, r2 8004842: d832 bhi.n 80048aa 8004844: 005b lsls r3, r3, #1 8004846: fbb0 f0f3 udiv r0, r0, r3 800484a: 1c43 adds r3, r0, #1 800484c: f3c3 030b ubfx r3, r3, #0, #12 8004850: 2b04 cmp r3, #4 8004852: bf38 it cc 8004854: 2304 movcc r3, #4 8004856: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004858: 6a22 ldr r2, [r4, #32] 800485a: 69e3 ldr r3, [r4, #28] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 800485c: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 800485e: 4313 orrs r3, r2 8004860: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 8004862: 68e2 ldr r2, [r4, #12] 8004864: 6923 ldr r3, [r4, #16] 8004866: 4313 orrs r3, r2 8004868: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 800486a: 69a2 ldr r2, [r4, #24] 800486c: 6963 ldr r3, [r4, #20] 800486e: 4313 orrs r3, r2 8004870: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 8004872: 680b ldr r3, [r1, #0] 8004874: f043 0301 orr.w r3, r3, #1 8004878: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 800487a: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 800487c: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 800487e: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8004882: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8004884: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8004888: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 800488a: 4a18 ldr r2, [pc, #96] ; (80048ec ) 800488c: 4290 cmp r0, r2 800488e: d9b2 bls.n 80047f6 freqrange = I2C_FREQRANGE(pclk1); 8004890: 4d15 ldr r5, [pc, #84] ; (80048e8 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8004892: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 8004896: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 800489a: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 800489c: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 800489e: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 80048a0: f44f 757a mov.w r5, #1000 ; 0x3e8 80048a4: fbb2 f2f5 udiv r2, r2, r5 80048a8: e7c6 b.n 8004838 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 80048aa: 68a2 ldr r2, [r4, #8] 80048ac: b952 cbnz r2, 80048c4 80048ae: eb03 0343 add.w r3, r3, r3, lsl #1 80048b2: fbb0 f0f3 udiv r0, r0, r3 80048b6: 1c43 adds r3, r0, #1 80048b8: f3c3 030b ubfx r3, r3, #0, #12 80048bc: b16b cbz r3, 80048da 80048be: f443 4300 orr.w r3, r3, #32768 ; 0x8000 80048c2: e7c8 b.n 8004856 80048c4: 2219 movs r2, #25 80048c6: 4353 muls r3, r2 80048c8: fbb0 f0f3 udiv r0, r0, r3 80048cc: 1c43 adds r3, r0, #1 80048ce: f3c3 030b ubfx r3, r3, #0, #12 80048d2: b113 cbz r3, 80048da 80048d4: f443 4340 orr.w r3, r3, #49152 ; 0xc000 80048d8: e7bd b.n 8004856 80048da: 2301 movs r3, #1 80048dc: e7bb b.n 8004856 80048de: bf00 nop 80048e0: 000186a0 .word 0x000186a0 80048e4: 001e847f .word 0x001e847f 80048e8: 000f4240 .word 0x000f4240 80048ec: 003d08ff .word 0x003d08ff 080048f0 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80048f0: 6803 ldr r3, [r0, #0] { 80048f2: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80048f6: 07db lsls r3, r3, #31 { 80048f8: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80048fa: d410 bmi.n 800491e } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 80048fc: 682b ldr r3, [r5, #0] 80048fe: 079f lsls r7, r3, #30 8004900: d45e bmi.n 80049c0 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8004902: 682b ldr r3, [r5, #0] 8004904: 0719 lsls r1, r3, #28 8004906: f100 8095 bmi.w 8004a34 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 800490a: 682b ldr r3, [r5, #0] 800490c: 075a lsls r2, r3, #29 800490e: f100 80bf bmi.w 8004a90 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8004912: 69ea ldr r2, [r5, #28] 8004914: 2a00 cmp r2, #0 8004916: f040 812d bne.w 8004b74 { return HAL_ERROR; } } return HAL_OK; 800491a: 2000 movs r0, #0 800491c: e014 b.n 8004948 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 800491e: 4c90 ldr r4, [pc, #576] ; (8004b60 ) 8004920: 6863 ldr r3, [r4, #4] 8004922: f003 030c and.w r3, r3, #12 8004926: 2b04 cmp r3, #4 8004928: d007 beq.n 800493a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 800492a: 6863 ldr r3, [r4, #4] 800492c: f003 030c and.w r3, r3, #12 8004930: 2b08 cmp r3, #8 8004932: d10c bne.n 800494e 8004934: 6863 ldr r3, [r4, #4] 8004936: 03de lsls r6, r3, #15 8004938: d509 bpl.n 800494e if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800493a: 6823 ldr r3, [r4, #0] 800493c: 039c lsls r4, r3, #14 800493e: d5dd bpl.n 80048fc 8004940: 686b ldr r3, [r5, #4] 8004942: 2b00 cmp r3, #0 8004944: d1da bne.n 80048fc return HAL_ERROR; 8004946: 2001 movs r0, #1 } 8004948: b002 add sp, #8 800494a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800494e: 686b ldr r3, [r5, #4] 8004950: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8004954: d110 bne.n 8004978 8004956: 6823 ldr r3, [r4, #0] 8004958: f443 3380 orr.w r3, r3, #65536 ; 0x10000 800495c: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800495e: f7ff fcaf bl 80042c0 8004962: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004964: 6823 ldr r3, [r4, #0] 8004966: 0398 lsls r0, r3, #14 8004968: d4c8 bmi.n 80048fc if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800496a: f7ff fca9 bl 80042c0 800496e: 1b80 subs r0, r0, r6 8004970: 2864 cmp r0, #100 ; 0x64 8004972: d9f7 bls.n 8004964 return HAL_TIMEOUT; 8004974: 2003 movs r0, #3 8004976: e7e7 b.n 8004948 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8004978: b99b cbnz r3, 80049a2 800497a: 6823 ldr r3, [r4, #0] 800497c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8004980: 6023 str r3, [r4, #0] 8004982: 6823 ldr r3, [r4, #0] 8004984: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8004988: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800498a: f7ff fc99 bl 80042c0 800498e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8004990: 6823 ldr r3, [r4, #0] 8004992: 0399 lsls r1, r3, #14 8004994: d5b2 bpl.n 80048fc if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8004996: f7ff fc93 bl 80042c0 800499a: 1b80 subs r0, r0, r6 800499c: 2864 cmp r0, #100 ; 0x64 800499e: d9f7 bls.n 8004990 80049a0: e7e8 b.n 8004974 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80049a2: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 80049a6: 6823 ldr r3, [r4, #0] 80049a8: d103 bne.n 80049b2 80049aa: f443 2380 orr.w r3, r3, #262144 ; 0x40000 80049ae: 6023 str r3, [r4, #0] 80049b0: e7d1 b.n 8004956 80049b2: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80049b6: 6023 str r3, [r4, #0] 80049b8: 6823 ldr r3, [r4, #0] 80049ba: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80049be: e7cd b.n 800495c if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80049c0: 4c67 ldr r4, [pc, #412] ; (8004b60 ) 80049c2: 6863 ldr r3, [r4, #4] 80049c4: f013 0f0c tst.w r3, #12 80049c8: d007 beq.n 80049da || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80049ca: 6863 ldr r3, [r4, #4] 80049cc: f003 030c and.w r3, r3, #12 80049d0: 2b08 cmp r3, #8 80049d2: d110 bne.n 80049f6 80049d4: 6863 ldr r3, [r4, #4] 80049d6: 03da lsls r2, r3, #15 80049d8: d40d bmi.n 80049f6 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80049da: 6823 ldr r3, [r4, #0] 80049dc: 079b lsls r3, r3, #30 80049de: d502 bpl.n 80049e6 80049e0: 692b ldr r3, [r5, #16] 80049e2: 2b01 cmp r3, #1 80049e4: d1af bne.n 8004946 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80049e6: 6823 ldr r3, [r4, #0] 80049e8: 696a ldr r2, [r5, #20] 80049ea: f023 03f8 bic.w r3, r3, #248 ; 0xf8 80049ee: ea43 03c2 orr.w r3, r3, r2, lsl #3 80049f2: 6023 str r3, [r4, #0] 80049f4: e785 b.n 8004902 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80049f6: 692a ldr r2, [r5, #16] 80049f8: 4b5a ldr r3, [pc, #360] ; (8004b64 ) 80049fa: b16a cbz r2, 8004a18 __HAL_RCC_HSI_ENABLE(); 80049fc: 2201 movs r2, #1 80049fe: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a00: f7ff fc5e bl 80042c0 8004a04: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004a06: 6823 ldr r3, [r4, #0] 8004a08: 079f lsls r7, r3, #30 8004a0a: d4ec bmi.n 80049e6 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8004a0c: f7ff fc58 bl 80042c0 8004a10: 1b80 subs r0, r0, r6 8004a12: 2802 cmp r0, #2 8004a14: d9f7 bls.n 8004a06 8004a16: e7ad b.n 8004974 __HAL_RCC_HSI_DISABLE(); 8004a18: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a1a: f7ff fc51 bl 80042c0 8004a1e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8004a20: 6823 ldr r3, [r4, #0] 8004a22: 0798 lsls r0, r3, #30 8004a24: f57f af6d bpl.w 8004902 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8004a28: f7ff fc4a bl 80042c0 8004a2c: 1b80 subs r0, r0, r6 8004a2e: 2802 cmp r0, #2 8004a30: d9f6 bls.n 8004a20 8004a32: e79f b.n 8004974 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8004a34: 69aa ldr r2, [r5, #24] 8004a36: 4c4a ldr r4, [pc, #296] ; (8004b60 ) 8004a38: 4b4b ldr r3, [pc, #300] ; (8004b68 ) 8004a3a: b1da cbz r2, 8004a74 __HAL_RCC_LSI_ENABLE(); 8004a3c: 2201 movs r2, #1 8004a3e: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a40: f7ff fc3e bl 80042c0 8004a44: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8004a46: 6a63 ldr r3, [r4, #36] ; 0x24 8004a48: 079b lsls r3, r3, #30 8004a4a: d50d bpl.n 8004a68 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8004a4c: f44f 52fa mov.w r2, #8000 ; 0x1f40 8004a50: 4b46 ldr r3, [pc, #280] ; (8004b6c ) 8004a52: 681b ldr r3, [r3, #0] 8004a54: fbb3 f3f2 udiv r3, r3, r2 8004a58: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8004a5a: bf00 nop do { __NOP(); } while (Delay --); 8004a5c: 9b01 ldr r3, [sp, #4] 8004a5e: 1e5a subs r2, r3, #1 8004a60: 9201 str r2, [sp, #4] 8004a62: 2b00 cmp r3, #0 8004a64: d1f9 bne.n 8004a5a 8004a66: e750 b.n 800490a if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8004a68: f7ff fc2a bl 80042c0 8004a6c: 1b80 subs r0, r0, r6 8004a6e: 2802 cmp r0, #2 8004a70: d9e9 bls.n 8004a46 8004a72: e77f b.n 8004974 __HAL_RCC_LSI_DISABLE(); 8004a74: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8004a76: f7ff fc23 bl 80042c0 8004a7a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8004a7c: 6a63 ldr r3, [r4, #36] ; 0x24 8004a7e: 079f lsls r7, r3, #30 8004a80: f57f af43 bpl.w 800490a if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8004a84: f7ff fc1c bl 80042c0 8004a88: 1b80 subs r0, r0, r6 8004a8a: 2802 cmp r0, #2 8004a8c: d9f6 bls.n 8004a7c 8004a8e: e771 b.n 8004974 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8004a90: 4c33 ldr r4, [pc, #204] ; (8004b60 ) 8004a92: 69e3 ldr r3, [r4, #28] 8004a94: 00d8 lsls r0, r3, #3 8004a96: d424 bmi.n 8004ae2 pwrclkchanged = SET; 8004a98: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8004a9a: 69e3 ldr r3, [r4, #28] 8004a9c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8004aa0: 61e3 str r3, [r4, #28] 8004aa2: 69e3 ldr r3, [r4, #28] 8004aa4: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8004aa8: 9300 str r3, [sp, #0] 8004aaa: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004aac: 4e30 ldr r6, [pc, #192] ; (8004b70 ) 8004aae: 6833 ldr r3, [r6, #0] 8004ab0: 05d9 lsls r1, r3, #23 8004ab2: d518 bpl.n 8004ae6 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004ab4: 68eb ldr r3, [r5, #12] 8004ab6: 2b01 cmp r3, #1 8004ab8: d126 bne.n 8004b08 8004aba: 6a23 ldr r3, [r4, #32] 8004abc: f043 0301 orr.w r3, r3, #1 8004ac0: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8004ac2: f7ff fbfd bl 80042c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004ac6: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8004aca: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8004acc: 6a23 ldr r3, [r4, #32] 8004ace: 079b lsls r3, r3, #30 8004ad0: d53f bpl.n 8004b52 if(pwrclkchanged == SET) 8004ad2: 2f00 cmp r7, #0 8004ad4: f43f af1d beq.w 8004912 __HAL_RCC_PWR_CLK_DISABLE(); 8004ad8: 69e3 ldr r3, [r4, #28] 8004ada: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8004ade: 61e3 str r3, [r4, #28] 8004ae0: e717 b.n 8004912 FlagStatus pwrclkchanged = RESET; 8004ae2: 2700 movs r7, #0 8004ae4: e7e2 b.n 8004aac SET_BIT(PWR->CR, PWR_CR_DBP); 8004ae6: 6833 ldr r3, [r6, #0] 8004ae8: f443 7380 orr.w r3, r3, #256 ; 0x100 8004aec: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8004aee: f7ff fbe7 bl 80042c0 8004af2: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004af4: 6833 ldr r3, [r6, #0] 8004af6: 05da lsls r2, r3, #23 8004af8: d4dc bmi.n 8004ab4 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8004afa: f7ff fbe1 bl 80042c0 8004afe: eba0 0008 sub.w r0, r0, r8 8004b02: 2864 cmp r0, #100 ; 0x64 8004b04: d9f6 bls.n 8004af4 8004b06: e735 b.n 8004974 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b08: b9ab cbnz r3, 8004b36 8004b0a: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b0c: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b10: f023 0301 bic.w r3, r3, #1 8004b14: 6223 str r3, [r4, #32] 8004b16: 6a23 ldr r3, [r4, #32] 8004b18: f023 0304 bic.w r3, r3, #4 8004b1c: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8004b1e: f7ff fbcf bl 80042c0 8004b22: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8004b24: 6a23 ldr r3, [r4, #32] 8004b26: 0798 lsls r0, r3, #30 8004b28: d5d3 bpl.n 8004ad2 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b2a: f7ff fbc9 bl 80042c0 8004b2e: 1b80 subs r0, r0, r6 8004b30: 4540 cmp r0, r8 8004b32: d9f7 bls.n 8004b24 8004b34: e71e b.n 8004974 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004b36: 2b05 cmp r3, #5 8004b38: 6a23 ldr r3, [r4, #32] 8004b3a: d103 bne.n 8004b44 8004b3c: f043 0304 orr.w r3, r3, #4 8004b40: 6223 str r3, [r4, #32] 8004b42: e7ba b.n 8004aba 8004b44: f023 0301 bic.w r3, r3, #1 8004b48: 6223 str r3, [r4, #32] 8004b4a: 6a23 ldr r3, [r4, #32] 8004b4c: f023 0304 bic.w r3, r3, #4 8004b50: e7b6 b.n 8004ac0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8004b52: f7ff fbb5 bl 80042c0 8004b56: eba0 0008 sub.w r0, r0, r8 8004b5a: 42b0 cmp r0, r6 8004b5c: d9b6 bls.n 8004acc 8004b5e: e709 b.n 8004974 8004b60: 40021000 .word 0x40021000 8004b64: 42420000 .word 0x42420000 8004b68: 42420480 .word 0x42420480 8004b6c: 20000008 .word 0x20000008 8004b70: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8004b74: 4c22 ldr r4, [pc, #136] ; (8004c00 ) 8004b76: 6863 ldr r3, [r4, #4] 8004b78: f003 030c and.w r3, r3, #12 8004b7c: 2b08 cmp r3, #8 8004b7e: f43f aee2 beq.w 8004946 8004b82: 2300 movs r3, #0 8004b84: 4e1f ldr r6, [pc, #124] ; (8004c04 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8004b86: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8004b88: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8004b8a: d12b bne.n 8004be4 tickstart = HAL_GetTick(); 8004b8c: f7ff fb98 bl 80042c0 8004b90: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004b92: 6823 ldr r3, [r4, #0] 8004b94: 0199 lsls r1, r3, #6 8004b96: d41f bmi.n 8004bd8 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8004b98: 6a2b ldr r3, [r5, #32] 8004b9a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8004b9e: d105 bne.n 8004bac __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8004ba0: 6862 ldr r2, [r4, #4] 8004ba2: 68a9 ldr r1, [r5, #8] 8004ba4: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8004ba8: 430a orrs r2, r1 8004baa: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8004bac: 6a69 ldr r1, [r5, #36] ; 0x24 8004bae: 6862 ldr r2, [r4, #4] 8004bb0: 430b orrs r3, r1 8004bb2: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8004bb6: 4313 orrs r3, r2 8004bb8: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8004bba: 2301 movs r3, #1 8004bbc: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8004bbe: f7ff fb7f bl 80042c0 8004bc2: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004bc4: 6823 ldr r3, [r4, #0] 8004bc6: 019a lsls r2, r3, #6 8004bc8: f53f aea7 bmi.w 800491a if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004bcc: f7ff fb78 bl 80042c0 8004bd0: 1b40 subs r0, r0, r5 8004bd2: 2802 cmp r0, #2 8004bd4: d9f6 bls.n 8004bc4 8004bd6: e6cd b.n 8004974 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004bd8: f7ff fb72 bl 80042c0 8004bdc: 1bc0 subs r0, r0, r7 8004bde: 2802 cmp r0, #2 8004be0: d9d7 bls.n 8004b92 8004be2: e6c7 b.n 8004974 tickstart = HAL_GetTick(); 8004be4: f7ff fb6c bl 80042c0 8004be8: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004bea: 6823 ldr r3, [r4, #0] 8004bec: 019b lsls r3, r3, #6 8004bee: f57f ae94 bpl.w 800491a if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004bf2: f7ff fb65 bl 80042c0 8004bf6: 1b40 subs r0, r0, r5 8004bf8: 2802 cmp r0, #2 8004bfa: d9f6 bls.n 8004bea 8004bfc: e6ba b.n 8004974 8004bfe: bf00 nop 8004c00: 40021000 .word 0x40021000 8004c04: 42420060 .word 0x42420060 08004c08 : { 8004c08: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8004c0a: 4b19 ldr r3, [pc, #100] ; (8004c70 ) { 8004c0c: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8004c0e: ac02 add r4, sp, #8 8004c10: f103 0510 add.w r5, r3, #16 8004c14: 4622 mov r2, r4 8004c16: 6818 ldr r0, [r3, #0] 8004c18: 6859 ldr r1, [r3, #4] 8004c1a: 3308 adds r3, #8 8004c1c: c203 stmia r2!, {r0, r1} 8004c1e: 42ab cmp r3, r5 8004c20: 4614 mov r4, r2 8004c22: d1f7 bne.n 8004c14 const uint8_t aPredivFactorTable[2] = {1, 2}; 8004c24: 2301 movs r3, #1 8004c26: f88d 3004 strb.w r3, [sp, #4] 8004c2a: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8004c2c: 4911 ldr r1, [pc, #68] ; (8004c74 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8004c2e: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8004c32: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8004c34: f003 020c and.w r2, r3, #12 8004c38: 2a08 cmp r2, #8 8004c3a: d117 bne.n 8004c6c pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8004c3c: f3c3 4283 ubfx r2, r3, #18, #4 8004c40: a806 add r0, sp, #24 8004c42: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8004c44: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8004c46: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8004c4a: d50c bpl.n 8004c66 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c4c: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c4e: 480a ldr r0, [pc, #40] ; (8004c78 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c50: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c54: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8004c56: aa06 add r2, sp, #24 8004c58: 4413 add r3, r2 8004c5a: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8004c5e: fbb0 f0f3 udiv r0, r0, r3 } 8004c62: b007 add sp, #28 8004c64: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8004c66: 4805 ldr r0, [pc, #20] ; (8004c7c ) 8004c68: 4350 muls r0, r2 8004c6a: e7fa b.n 8004c62 sysclockfreq = HSE_VALUE; 8004c6c: 4802 ldr r0, [pc, #8] ; (8004c78 ) return sysclockfreq; 8004c6e: e7f8 b.n 8004c62 8004c70: 0800769c .word 0x0800769c 8004c74: 40021000 .word 0x40021000 8004c78: 007a1200 .word 0x007a1200 8004c7c: 003d0900 .word 0x003d0900 08004c80 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c80: 4a54 ldr r2, [pc, #336] ; (8004dd4 ) { 8004c82: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c86: 6813 ldr r3, [r2, #0] { 8004c88: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c8a: f003 0307 and.w r3, r3, #7 8004c8e: 428b cmp r3, r1 { 8004c90: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c92: d32a bcc.n 8004cea if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8004c94: 6829 ldr r1, [r5, #0] 8004c96: 078c lsls r4, r1, #30 8004c98: d434 bmi.n 8004d04 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8004c9a: 07ca lsls r2, r1, #31 8004c9c: d447 bmi.n 8004d2e if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8004c9e: 4a4d ldr r2, [pc, #308] ; (8004dd4 ) 8004ca0: 6813 ldr r3, [r2, #0] 8004ca2: f003 0307 and.w r3, r3, #7 8004ca6: 429e cmp r6, r3 8004ca8: f0c0 8082 bcc.w 8004db0 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8004cac: 682a ldr r2, [r5, #0] 8004cae: 4c4a ldr r4, [pc, #296] ; (8004dd8 ) 8004cb0: f012 0f04 tst.w r2, #4 8004cb4: f040 8087 bne.w 8004dc6 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8004cb8: 0713 lsls r3, r2, #28 8004cba: d506 bpl.n 8004cca MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8004cbc: 6863 ldr r3, [r4, #4] 8004cbe: 692a ldr r2, [r5, #16] 8004cc0: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8004cc4: ea43 03c2 orr.w r3, r3, r2, lsl #3 8004cc8: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8004cca: f7ff ff9d bl 8004c08 8004cce: 6863 ldr r3, [r4, #4] 8004cd0: 4a42 ldr r2, [pc, #264] ; (8004ddc ) 8004cd2: f3c3 1303 ubfx r3, r3, #4, #4 8004cd6: 5cd3 ldrb r3, [r2, r3] 8004cd8: 40d8 lsrs r0, r3 8004cda: 4b41 ldr r3, [pc, #260] ; (8004de0 ) 8004cdc: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8004cde: 2000 movs r0, #0 8004ce0: f7ff faac bl 800423c return HAL_OK; 8004ce4: 2000 movs r0, #0 } 8004ce6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8004cea: 6813 ldr r3, [r2, #0] 8004cec: f023 0307 bic.w r3, r3, #7 8004cf0: 430b orrs r3, r1 8004cf2: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8004cf4: 6813 ldr r3, [r2, #0] 8004cf6: f003 0307 and.w r3, r3, #7 8004cfa: 4299 cmp r1, r3 8004cfc: d0ca beq.n 8004c94 return HAL_ERROR; 8004cfe: 2001 movs r0, #1 8004d00: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8004d04: 4b34 ldr r3, [pc, #208] ; (8004dd8 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8004d06: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8004d0a: bf1e ittt ne 8004d0c: 685a ldrne r2, [r3, #4] 8004d0e: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8004d12: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8004d14: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8004d16: bf42 ittt mi 8004d18: 685a ldrmi r2, [r3, #4] 8004d1a: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8004d1e: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8004d20: 685a ldr r2, [r3, #4] 8004d22: 68a8 ldr r0, [r5, #8] 8004d24: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8004d28: 4302 orrs r2, r0 8004d2a: 605a str r2, [r3, #4] 8004d2c: e7b5 b.n 8004c9a if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d2e: 686a ldr r2, [r5, #4] 8004d30: 4c29 ldr r4, [pc, #164] ; (8004dd8 ) 8004d32: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004d34: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d36: d11c bne.n 8004d72 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004d38: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004d3c: d0df beq.n 8004cfe __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8004d3e: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d40: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8004d44: f023 0303 bic.w r3, r3, #3 8004d48: 4313 orrs r3, r2 8004d4a: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8004d4c: f7ff fab8 bl 80042c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d50: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 8004d52: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8004d54: 2b01 cmp r3, #1 8004d56: d114 bne.n 8004d82 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8004d58: 6863 ldr r3, [r4, #4] 8004d5a: f003 030c and.w r3, r3, #12 8004d5e: 2b04 cmp r3, #4 8004d60: d09d beq.n 8004c9e if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d62: f7ff faad bl 80042c0 8004d66: 1bc0 subs r0, r0, r7 8004d68: 4540 cmp r0, r8 8004d6a: d9f5 bls.n 8004d58 return HAL_TIMEOUT; 8004d6c: 2003 movs r0, #3 8004d6e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8004d72: 2a02 cmp r2, #2 8004d74: d102 bne.n 8004d7c if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004d76: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8004d7a: e7df b.n 8004d3c if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8004d7c: f013 0f02 tst.w r3, #2 8004d80: e7dc b.n 8004d3c else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8004d82: 2b02 cmp r3, #2 8004d84: d10f bne.n 8004da6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8004d86: 6863 ldr r3, [r4, #4] 8004d88: f003 030c and.w r3, r3, #12 8004d8c: 2b08 cmp r3, #8 8004d8e: d086 beq.n 8004c9e if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d90: f7ff fa96 bl 80042c0 8004d94: 1bc0 subs r0, r0, r7 8004d96: 4540 cmp r0, r8 8004d98: d9f5 bls.n 8004d86 8004d9a: e7e7 b.n 8004d6c if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004d9c: f7ff fa90 bl 80042c0 8004da0: 1bc0 subs r0, r0, r7 8004da2: 4540 cmp r0, r8 8004da4: d8e2 bhi.n 8004d6c while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8004da6: 6863 ldr r3, [r4, #4] 8004da8: f013 0f0c tst.w r3, #12 8004dac: d1f6 bne.n 8004d9c 8004dae: e776 b.n 8004c9e __HAL_FLASH_SET_LATENCY(FLatency); 8004db0: 6813 ldr r3, [r2, #0] 8004db2: f023 0307 bic.w r3, r3, #7 8004db6: 4333 orrs r3, r6 8004db8: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8004dba: 6813 ldr r3, [r2, #0] 8004dbc: f003 0307 and.w r3, r3, #7 8004dc0: 429e cmp r6, r3 8004dc2: d19c bne.n 8004cfe 8004dc4: e772 b.n 8004cac MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8004dc6: 6863 ldr r3, [r4, #4] 8004dc8: 68e9 ldr r1, [r5, #12] 8004dca: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8004dce: 430b orrs r3, r1 8004dd0: 6063 str r3, [r4, #4] 8004dd2: e771 b.n 8004cb8 8004dd4: 40022000 .word 0x40022000 8004dd8: 40021000 .word 0x40021000 8004ddc: 0800778e .word 0x0800778e 8004de0: 20000008 .word 0x20000008 08004de4 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8004de4: 4b04 ldr r3, [pc, #16] ; (8004df8 ) 8004de6: 4a05 ldr r2, [pc, #20] ; (8004dfc ) 8004de8: 685b ldr r3, [r3, #4] 8004dea: f3c3 2302 ubfx r3, r3, #8, #3 8004dee: 5cd3 ldrb r3, [r2, r3] 8004df0: 4a03 ldr r2, [pc, #12] ; (8004e00 ) 8004df2: 6810 ldr r0, [r2, #0] } 8004df4: 40d8 lsrs r0, r3 8004df6: 4770 bx lr 8004df8: 40021000 .word 0x40021000 8004dfc: 0800779e .word 0x0800779e 8004e00: 20000008 .word 0x20000008 08004e04 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8004e04: 4b04 ldr r3, [pc, #16] ; (8004e18 ) 8004e06: 4a05 ldr r2, [pc, #20] ; (8004e1c ) 8004e08: 685b ldr r3, [r3, #4] 8004e0a: f3c3 23c2 ubfx r3, r3, #11, #3 8004e0e: 5cd3 ldrb r3, [r2, r3] 8004e10: 4a03 ldr r2, [pc, #12] ; (8004e20 ) 8004e12: 6810 ldr r0, [r2, #0] } 8004e14: 40d8 lsrs r0, r3 8004e16: 4770 bx lr 8004e18: 40021000 .word 0x40021000 8004e1c: 0800779e .word 0x0800779e 8004e20: 20000008 .word 0x20000008 08004e24 : * @param hspi: pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { 8004e24: b510 push {r4, lr} /* Check the SPI handle allocation */ if(hspi == NULL) 8004e26: 4604 mov r4, r0 8004e28: 2800 cmp r0, #0 8004e2a: d034 beq.n 8004e96 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8004e2c: 2300 movs r3, #0 8004e2e: 6283 str r3, [r0, #40] ; 0x28 #endif /* USE_SPI_CRC */ if(hspi->State == HAL_SPI_STATE_RESET) 8004e30: f890 3051 ldrb.w r3, [r0, #81] ; 0x51 8004e34: b90b cbnz r3, 8004e3a { /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); 8004e36: f001 fa59 bl 80062ec } hspi->State = HAL_SPI_STATE_BUSY; 8004e3a: 2302 movs r3, #2 /* Disble the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); 8004e3c: 6821 ldr r1, [r4, #0] hspi->State = HAL_SPI_STATE_BUSY; 8004e3e: f884 3051 strb.w r3, [r4, #81] ; 0x51 __HAL_SPI_DISABLE(hspi); 8004e42: 680b ldr r3, [r1, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize | 8004e44: 68a0 ldr r0, [r4, #8] __HAL_SPI_DISABLE(hspi); 8004e46: f023 0340 bic.w r3, r3, #64 ; 0x40 8004e4a: 600b str r3, [r1, #0] WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize | 8004e4c: 6863 ldr r3, [r4, #4] 8004e4e: 69a2 ldr r2, [r4, #24] 8004e50: 4303 orrs r3, r0 8004e52: 68e0 ldr r0, [r4, #12] 8004e54: 4303 orrs r3, r0 8004e56: 6920 ldr r0, [r4, #16] 8004e58: 4303 orrs r3, r0 8004e5a: 6960 ldr r0, [r4, #20] 8004e5c: 4303 orrs r3, r0 8004e5e: 69e0 ldr r0, [r4, #28] 8004e60: 4303 orrs r3, r0 8004e62: 6a20 ldr r0, [r4, #32] 8004e64: 4303 orrs r3, r0 8004e66: 6aa0 ldr r0, [r4, #40] ; 0x28 8004e68: 4303 orrs r3, r0 8004e6a: f402 7000 and.w r0, r2, #512 ; 0x200 8004e6e: 4303 orrs r3, r0 8004e70: 600b str r3, [r1, #0] hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) | hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation) ); /* Configure : NSS management */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode)); 8004e72: 0c12 lsrs r2, r2, #16 8004e74: 6a63 ldr r3, [r4, #36] ; 0x24 8004e76: f002 0204 and.w r2, r2, #4 8004e7a: 431a orrs r2, r3 /*---------------------------- SPIx CRCPOLY Configuration ------------------*/ /* Configure : CRC Polynomial */ WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial); 8004e7c: 6ae3 ldr r3, [r4, #44] ; 0x2c WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode)); 8004e7e: 604a str r2, [r1, #4] WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial); 8004e80: 610b str r3, [r1, #16] #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); 8004e82: 69cb ldr r3, [r1, #28] #else uCRCErrorWorkaroundCheck = 0U; #endif /* STM32F101xE || STM32F103xE */ #endif /* USE_SPI_CRC */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8004e84: 2000 movs r0, #0 CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); 8004e86: f423 6300 bic.w r3, r3, #2048 ; 0x800 8004e8a: 61cb str r3, [r1, #28] hspi->State = HAL_SPI_STATE_READY; 8004e8c: 2301 movs r3, #1 hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8004e8e: 6560 str r0, [r4, #84] ; 0x54 hspi->State = HAL_SPI_STATE_READY; 8004e90: f884 3051 strb.w r3, [r4, #81] ; 0x51 return HAL_OK; 8004e94: bd10 pop {r4, pc} return HAL_ERROR; 8004e96: 2001 movs r0, #1 } 8004e98: bd10 pop {r4, pc} 08004e9a : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8004e9a: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 8004e9c: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8004e9e: 68da ldr r2, [r3, #12] 8004ea0: f042 0201 orr.w r2, r2, #1 8004ea4: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 8004ea6: 681a ldr r2, [r3, #0] 8004ea8: f042 0201 orr.w r2, r2, #1 8004eac: 601a str r2, [r3, #0] } 8004eae: 4770 bx lr 08004eb0 : 8004eb0: 4770 bx lr 08004eb2 : 8004eb2: 4770 bx lr 08004eb4 : 8004eb4: 4770 bx lr 08004eb6 : 8004eb6: 4770 bx lr 08004eb8 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004eb8: 6803 ldr r3, [r0, #0] { 8004eba: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004ebc: 691a ldr r2, [r3, #16] { 8004ebe: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004ec0: 0791 lsls r1, r2, #30 8004ec2: d50e bpl.n 8004ee2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 8004ec4: 68da ldr r2, [r3, #12] 8004ec6: 0792 lsls r2, r2, #30 8004ec8: d50b bpl.n 8004ee2 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 8004eca: f06f 0202 mvn.w r2, #2 8004ece: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8004ed0: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004ed2: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8004ed4: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004ed6: 079b lsls r3, r3, #30 8004ed8: d077 beq.n 8004fca { HAL_TIM_IC_CaptureCallback(htim); 8004eda: f7ff ffea bl 8004eb2 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004ede: 2300 movs r3, #0 8004ee0: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8004ee2: 6823 ldr r3, [r4, #0] 8004ee4: 691a ldr r2, [r3, #16] 8004ee6: 0750 lsls r0, r2, #29 8004ee8: d510 bpl.n 8004f0c { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8004eea: 68da ldr r2, [r3, #12] 8004eec: 0751 lsls r1, r2, #29 8004eee: d50d bpl.n 8004f0c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8004ef0: f06f 0204 mvn.w r2, #4 8004ef4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004ef6: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004ef8: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004efa: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004efc: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8004f00: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004f02: d068 beq.n 8004fd6 HAL_TIM_IC_CaptureCallback(htim); 8004f04: f7ff ffd5 bl 8004eb2 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004f08: 2300 movs r3, #0 8004f0a: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8004f0c: 6823 ldr r3, [r4, #0] 8004f0e: 691a ldr r2, [r3, #16] 8004f10: 0712 lsls r2, r2, #28 8004f12: d50f bpl.n 8004f34 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8004f14: 68da ldr r2, [r3, #12] 8004f16: 0710 lsls r0, r2, #28 8004f18: d50c bpl.n 8004f34 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8004f1a: f06f 0208 mvn.w r2, #8 8004f1e: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004f20: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004f22: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004f24: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004f26: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8004f28: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004f2a: d05a beq.n 8004fe2 HAL_TIM_IC_CaptureCallback(htim); 8004f2c: f7ff ffc1 bl 8004eb2 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004f30: 2300 movs r3, #0 8004f32: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8004f34: 6823 ldr r3, [r4, #0] 8004f36: 691a ldr r2, [r3, #16] 8004f38: 06d2 lsls r2, r2, #27 8004f3a: d510 bpl.n 8004f5e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8004f3c: 68da ldr r2, [r3, #12] 8004f3e: 06d0 lsls r0, r2, #27 8004f40: d50d bpl.n 8004f5e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8004f42: f06f 0210 mvn.w r2, #16 8004f46: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8004f48: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004f4a: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8004f4c: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004f4e: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8004f52: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004f54: d04b beq.n 8004fee HAL_TIM_IC_CaptureCallback(htim); 8004f56: f7ff ffac bl 8004eb2 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004f5a: 2300 movs r3, #0 8004f5c: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8004f5e: 6823 ldr r3, [r4, #0] 8004f60: 691a ldr r2, [r3, #16] 8004f62: 07d1 lsls r1, r2, #31 8004f64: d508 bpl.n 8004f78 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8004f66: 68da ldr r2, [r3, #12] 8004f68: 07d2 lsls r2, r2, #31 8004f6a: d505 bpl.n 8004f78 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004f6c: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8004f70: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004f72: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8004f74: f000 fda0 bl 8005ab8 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8004f78: 6823 ldr r3, [r4, #0] 8004f7a: 691a ldr r2, [r3, #16] 8004f7c: 0610 lsls r0, r2, #24 8004f7e: d508 bpl.n 8004f92 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 8004f80: 68da ldr r2, [r3, #12] 8004f82: 0611 lsls r1, r2, #24 8004f84: d505 bpl.n 8004f92 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004f86: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8004f8a: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004f8c: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 8004f8e: f000 f8be bl 800510e } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8004f92: 6823 ldr r3, [r4, #0] 8004f94: 691a ldr r2, [r3, #16] 8004f96: 0652 lsls r2, r2, #25 8004f98: d508 bpl.n 8004fac { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8004f9a: 68da ldr r2, [r3, #12] 8004f9c: 0650 lsls r0, r2, #25 8004f9e: d505 bpl.n 8004fac { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8004fa0: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 8004fa4: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8004fa6: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 8004fa8: f7ff ff85 bl 8004eb6 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 8004fac: 6823 ldr r3, [r4, #0] 8004fae: 691a ldr r2, [r3, #16] 8004fb0: 0691 lsls r1, r2, #26 8004fb2: d522 bpl.n 8004ffa { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 8004fb4: 68da ldr r2, [r3, #12] 8004fb6: 0692 lsls r2, r2, #26 8004fb8: d51f bpl.n 8004ffa { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004fba: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 8004fbe: 4620 mov r0, r4 } } } 8004fc0: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004fc4: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 8004fc6: f000 b8a1 b.w 800510c HAL_TIM_OC_DelayElapsedCallback(htim); 8004fca: f7ff ff71 bl 8004eb0 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004fce: 4620 mov r0, r4 8004fd0: f7ff ff70 bl 8004eb4 8004fd4: e783 b.n 8004ede HAL_TIM_OC_DelayElapsedCallback(htim); 8004fd6: f7ff ff6b bl 8004eb0 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004fda: 4620 mov r0, r4 8004fdc: f7ff ff6a bl 8004eb4 8004fe0: e792 b.n 8004f08 HAL_TIM_OC_DelayElapsedCallback(htim); 8004fe2: f7ff ff65 bl 8004eb0 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004fe6: 4620 mov r0, r4 8004fe8: f7ff ff64 bl 8004eb4 8004fec: e7a0 b.n 8004f30 HAL_TIM_OC_DelayElapsedCallback(htim); 8004fee: f7ff ff5f bl 8004eb0 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004ff2: 4620 mov r0, r4 8004ff4: f7ff ff5e bl 8004eb4 8004ff8: e7af b.n 8004f5a 8004ffa: bd10 pop {r4, pc} 08004ffc : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004ffc: 4a24 ldr r2, [pc, #144] ; (8005090 ) tmpcr1 = TIMx->CR1; 8004ffe: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8005000: 4290 cmp r0, r2 8005002: d012 beq.n 800502a 8005004: f502 6200 add.w r2, r2, #2048 ; 0x800 8005008: 4290 cmp r0, r2 800500a: d00e beq.n 800502a 800500c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8005010: d00b beq.n 800502a 8005012: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8005016: 4290 cmp r0, r2 8005018: d007 beq.n 800502a 800501a: f502 6280 add.w r2, r2, #1024 ; 0x400 800501e: 4290 cmp r0, r2 8005020: d003 beq.n 800502a 8005022: f502 6280 add.w r2, r2, #1024 ; 0x400 8005026: 4290 cmp r0, r2 8005028: d11d bne.n 8005066 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 800502a: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 800502c: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8005030: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8005032: 4a17 ldr r2, [pc, #92] ; (8005090 ) 8005034: 4290 cmp r0, r2 8005036: d012 beq.n 800505e 8005038: f502 6200 add.w r2, r2, #2048 ; 0x800 800503c: 4290 cmp r0, r2 800503e: d00e beq.n 800505e 8005040: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8005044: d00b beq.n 800505e 8005046: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 800504a: 4290 cmp r0, r2 800504c: d007 beq.n 800505e 800504e: f502 6280 add.w r2, r2, #1024 ; 0x400 8005052: 4290 cmp r0, r2 8005054: d003 beq.n 800505e 8005056: f502 6280 add.w r2, r2, #1024 ; 0x400 800505a: 4290 cmp r0, r2 800505c: d103 bne.n 8005066 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 800505e: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8005060: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8005064: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8005066: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8005068: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 800506c: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 800506e: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8005070: 688b ldr r3, [r1, #8] 8005072: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8005074: 680b ldr r3, [r1, #0] 8005076: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8005078: 4b05 ldr r3, [pc, #20] ; (8005090 ) 800507a: 4298 cmp r0, r3 800507c: d003 beq.n 8005086 800507e: f503 6300 add.w r3, r3, #2048 ; 0x800 8005082: 4298 cmp r0, r3 8005084: d101 bne.n 800508a { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8005086: 690b ldr r3, [r1, #16] 8005088: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 800508a: 2301 movs r3, #1 800508c: 6143 str r3, [r0, #20] 800508e: 4770 bx lr 8005090: 40012c00 .word 0x40012c00 08005094 : { 8005094: b510 push {r4, lr} if(htim == NULL) 8005096: 4604 mov r4, r0 8005098: b1a0 cbz r0, 80050c4 if(htim->State == HAL_TIM_STATE_RESET) 800509a: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 800509e: f003 02ff and.w r2, r3, #255 ; 0xff 80050a2: b91b cbnz r3, 80050ac htim->Lock = HAL_UNLOCKED; 80050a4: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80050a8: f001 f97a bl 80063a0 htim->State= HAL_TIM_STATE_BUSY; 80050ac: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80050ae: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 80050b0: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80050b4: 1d21 adds r1, r4, #4 80050b6: f7ff ffa1 bl 8004ffc htim->State= HAL_TIM_STATE_READY; 80050ba: 2301 movs r3, #1 return HAL_OK; 80050bc: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 80050be: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80050c2: bd10 pop {r4, pc} return HAL_ERROR; 80050c4: 2001 movs r0, #1 } 80050c6: bd10 pop {r4, pc} 080050c8 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 80050c8: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80050cc: b510 push {r4, lr} __HAL_LOCK(htim); 80050ce: 2b01 cmp r3, #1 80050d0: f04f 0302 mov.w r3, #2 80050d4: d018 beq.n 8005108 htim->State = HAL_TIM_STATE_BUSY; 80050d6: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80050da: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80050dc: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80050de: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80050e0: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80050e2: f022 0270 bic.w r2, r2, #112 ; 0x70 80050e6: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80050e8: 685a ldr r2, [r3, #4] 80050ea: 4322 orrs r2, r4 80050ec: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 80050ee: 689a ldr r2, [r3, #8] 80050f0: f022 0280 bic.w r2, r2, #128 ; 0x80 80050f4: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80050f6: 689a ldr r2, [r3, #8] 80050f8: 430a orrs r2, r1 80050fa: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 80050fc: 2301 movs r3, #1 80050fe: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 8005102: 2300 movs r3, #0 8005104: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8005108: 4618 mov r0, r3 return HAL_OK; } 800510a: bd10 pop {r4, pc} 0800510c : 800510c: 4770 bx lr 0800510e : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 800510e: 4770 bx lr 08005110 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8005110: 6803 ldr r3, [r0, #0] 8005112: 68da ldr r2, [r3, #12] 8005114: f422 7290 bic.w r2, r2, #288 ; 0x120 8005118: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800511a: 695a ldr r2, [r3, #20] 800511c: f022 0201 bic.w r2, r2, #1 8005120: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8005122: 2320 movs r3, #32 8005124: f880 303a strb.w r3, [r0, #58] ; 0x3a 8005128: 4770 bx lr ... 0800512c : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 800512c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8005130: 6805 ldr r5, [r0, #0] 8005132: 68c2 ldr r2, [r0, #12] 8005134: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005136: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8005138: f423 5340 bic.w r3, r3, #12288 ; 0x3000 800513c: 4313 orrs r3, r2 800513e: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005140: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 8005142: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005144: 430b orrs r3, r1 8005146: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8005148: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 800514c: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8005150: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 8005152: 4313 orrs r3, r2 8005154: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8005156: 696b ldr r3, [r5, #20] 8005158: 6982 ldr r2, [r0, #24] 800515a: f423 7340 bic.w r3, r3, #768 ; 0x300 800515e: 4313 orrs r3, r2 8005160: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 8005162: 4b40 ldr r3, [pc, #256] ; (8005264 ) { 8005164: 4681 mov r9, r0 if(huart->Instance == USART1) 8005166: 429d cmp r5, r3 8005168: f04f 0419 mov.w r4, #25 800516c: d146 bne.n 80051fc { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 800516e: f7ff fe49 bl 8004e04 8005172: fb04 f300 mul.w r3, r4, r0 8005176: f8d9 6004 ldr.w r6, [r9, #4] 800517a: f04f 0864 mov.w r8, #100 ; 0x64 800517e: 00b6 lsls r6, r6, #2 8005180: fbb3 f3f6 udiv r3, r3, r6 8005184: fbb3 f3f8 udiv r3, r3, r8 8005188: 011e lsls r6, r3, #4 800518a: f7ff fe3b bl 8004e04 800518e: 4360 muls r0, r4 8005190: f8d9 3004 ldr.w r3, [r9, #4] 8005194: 009b lsls r3, r3, #2 8005196: fbb0 f7f3 udiv r7, r0, r3 800519a: f7ff fe33 bl 8004e04 800519e: 4360 muls r0, r4 80051a0: f8d9 3004 ldr.w r3, [r9, #4] 80051a4: 009b lsls r3, r3, #2 80051a6: fbb0 f3f3 udiv r3, r0, r3 80051aa: fbb3 f3f8 udiv r3, r3, r8 80051ae: fb08 7313 mls r3, r8, r3, r7 80051b2: 011b lsls r3, r3, #4 80051b4: 3332 adds r3, #50 ; 0x32 80051b6: fbb3 f3f8 udiv r3, r3, r8 80051ba: f003 07f0 and.w r7, r3, #240 ; 0xf0 80051be: f7ff fe21 bl 8004e04 80051c2: 4360 muls r0, r4 80051c4: f8d9 2004 ldr.w r2, [r9, #4] 80051c8: 0092 lsls r2, r2, #2 80051ca: fbb0 faf2 udiv sl, r0, r2 80051ce: f7ff fe19 bl 8004e04 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80051d2: 4360 muls r0, r4 80051d4: f8d9 3004 ldr.w r3, [r9, #4] 80051d8: 009b lsls r3, r3, #2 80051da: fbb0 f3f3 udiv r3, r0, r3 80051de: fbb3 f3f8 udiv r3, r3, r8 80051e2: fb08 a313 mls r3, r8, r3, sl 80051e6: 011b lsls r3, r3, #4 80051e8: 3332 adds r3, #50 ; 0x32 80051ea: fbb3 f3f8 udiv r3, r3, r8 80051ee: f003 030f and.w r3, r3, #15 80051f2: 433b orrs r3, r7 80051f4: 4433 add r3, r6 80051f6: 60ab str r3, [r5, #8] 80051f8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80051fc: f7ff fdf2 bl 8004de4 8005200: fb04 f300 mul.w r3, r4, r0 8005204: f8d9 6004 ldr.w r6, [r9, #4] 8005208: f04f 0864 mov.w r8, #100 ; 0x64 800520c: 00b6 lsls r6, r6, #2 800520e: fbb3 f3f6 udiv r3, r3, r6 8005212: fbb3 f3f8 udiv r3, r3, r8 8005216: 011e lsls r6, r3, #4 8005218: f7ff fde4 bl 8004de4 800521c: 4360 muls r0, r4 800521e: f8d9 3004 ldr.w r3, [r9, #4] 8005222: 009b lsls r3, r3, #2 8005224: fbb0 f7f3 udiv r7, r0, r3 8005228: f7ff fddc bl 8004de4 800522c: 4360 muls r0, r4 800522e: f8d9 3004 ldr.w r3, [r9, #4] 8005232: 009b lsls r3, r3, #2 8005234: fbb0 f3f3 udiv r3, r0, r3 8005238: fbb3 f3f8 udiv r3, r3, r8 800523c: fb08 7313 mls r3, r8, r3, r7 8005240: 011b lsls r3, r3, #4 8005242: 3332 adds r3, #50 ; 0x32 8005244: fbb3 f3f8 udiv r3, r3, r8 8005248: f003 07f0 and.w r7, r3, #240 ; 0xf0 800524c: f7ff fdca bl 8004de4 8005250: 4360 muls r0, r4 8005252: f8d9 2004 ldr.w r2, [r9, #4] 8005256: 0092 lsls r2, r2, #2 8005258: fbb0 faf2 udiv sl, r0, r2 800525c: f7ff fdc2 bl 8004de4 8005260: e7b7 b.n 80051d2 8005262: bf00 nop 8005264: 40013800 .word 0x40013800 08005268 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8005268: b5f8 push {r3, r4, r5, r6, r7, lr} 800526a: 4604 mov r4, r0 800526c: 460e mov r6, r1 800526e: 4617 mov r7, r2 8005270: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8005272: 6821 ldr r1, [r4, #0] 8005274: 680b ldr r3, [r1, #0] 8005276: ea36 0303 bics.w r3, r6, r3 800527a: d101 bne.n 8005280 return HAL_OK; 800527c: 2000 movs r0, #0 } 800527e: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8005280: 1c6b adds r3, r5, #1 8005282: d0f7 beq.n 8005274 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8005284: b995 cbnz r5, 80052ac CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8005286: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8005288: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 800528a: 68da ldr r2, [r3, #12] 800528c: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8005290: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005292: 695a ldr r2, [r3, #20] 8005294: f022 0201 bic.w r2, r2, #1 8005298: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 800529a: 2320 movs r3, #32 800529c: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 80052a0: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 80052a4: 2300 movs r3, #0 80052a6: f884 3038 strb.w r3, [r4, #56] ; 0x38 80052aa: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80052ac: f7ff f808 bl 80042c0 80052b0: 1bc0 subs r0, r0, r7 80052b2: 4285 cmp r5, r0 80052b4: d2dd bcs.n 8005272 80052b6: e7e6 b.n 8005286 080052b8 : { 80052b8: b510 push {r4, lr} if(huart == NULL) 80052ba: 4604 mov r4, r0 80052bc: b340 cbz r0, 8005310 if(huart->gState == HAL_UART_STATE_RESET) 80052be: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 80052c2: f003 02ff and.w r2, r3, #255 ; 0xff 80052c6: b91b cbnz r3, 80052d0 huart->Lock = HAL_UNLOCKED; 80052c8: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 80052cc: f001 f87c bl 80063c8 huart->gState = HAL_UART_STATE_BUSY; 80052d0: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 80052d2: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 80052d4: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 80052d8: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 80052da: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 80052dc: f423 5300 bic.w r3, r3, #8192 ; 0x2000 80052e0: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 80052e2: f7ff ff23 bl 800512c CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80052e6: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 80052e8: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80052ea: 691a ldr r2, [r3, #16] 80052ec: f422 4290 bic.w r2, r2, #18432 ; 0x4800 80052f0: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80052f2: 695a ldr r2, [r3, #20] 80052f4: f022 022a bic.w r2, r2, #42 ; 0x2a 80052f8: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 80052fa: 68da ldr r2, [r3, #12] 80052fc: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8005300: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8005302: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005304: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8005306: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 800530a: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 800530e: bd10 pop {r4, pc} return HAL_ERROR; 8005310: 2001 movs r0, #1 } 8005312: bd10 pop {r4, pc} 08005314 : { 8005314: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8005318: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 800531a: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 800531e: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8005320: 2b20 cmp r3, #32 { 8005322: 460d mov r5, r1 8005324: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8005326: d14e bne.n 80053c6 if((pData == NULL) || (Size == 0U)) 8005328: 2900 cmp r1, #0 800532a: d049 beq.n 80053c0 800532c: 2a00 cmp r2, #0 800532e: d047 beq.n 80053c0 __HAL_LOCK(huart); 8005330: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8005334: 2b01 cmp r3, #1 8005336: d046 beq.n 80053c6 8005338: 2301 movs r3, #1 800533a: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 800533e: 2300 movs r3, #0 8005340: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8005342: 2321 movs r3, #33 ; 0x21 8005344: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8005348: f7fe ffba bl 80042c0 800534c: 4606 mov r6, r0 huart->TxXferSize = Size; 800534e: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8005352: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8005356: 8ce3 ldrh r3, [r4, #38] ; 0x26 8005358: b29b uxth r3, r3 800535a: b96b cbnz r3, 8005378 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 800535c: 463b mov r3, r7 800535e: 4632 mov r2, r6 8005360: 2140 movs r1, #64 ; 0x40 8005362: 4620 mov r0, r4 8005364: f7ff ff80 bl 8005268 8005368: b9a8 cbnz r0, 8005396 huart->gState = HAL_UART_STATE_READY; 800536a: 2320 movs r3, #32 __HAL_UNLOCK(huart); 800536c: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8005370: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8005374: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8005378: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800537a: 4632 mov r2, r6 huart->TxXferCount--; 800537c: 3b01 subs r3, #1 800537e: b29b uxth r3, r3 8005380: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005382: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005384: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005386: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800538a: 4620 mov r0, r4 800538c: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800538e: d10e bne.n 80053ae if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8005390: f7ff ff6a bl 8005268 8005394: b110 cbz r0, 800539c return HAL_TIMEOUT; 8005396: 2003 movs r0, #3 8005398: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 800539c: 882b ldrh r3, [r5, #0] 800539e: 6822 ldr r2, [r4, #0] 80053a0: f3c3 0308 ubfx r3, r3, #0, #9 80053a4: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80053a6: 6923 ldr r3, [r4, #16] 80053a8: b943 cbnz r3, 80053bc pData +=2U; 80053aa: 3502 adds r5, #2 80053ac: e7d3 b.n 8005356 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80053ae: f7ff ff5b bl 8005268 80053b2: 2800 cmp r0, #0 80053b4: d1ef bne.n 8005396 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 80053b6: 6823 ldr r3, [r4, #0] 80053b8: 782a ldrb r2, [r5, #0] 80053ba: 605a str r2, [r3, #4] 80053bc: 3501 adds r5, #1 80053be: e7ca b.n 8005356 return HAL_ERROR; 80053c0: 2001 movs r0, #1 80053c2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 80053c6: 2002 movs r0, #2 } 80053c8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 080053cc : if(huart->RxState == HAL_UART_STATE_READY) 80053cc: f890 303a ldrb.w r3, [r0, #58] ; 0x3a 80053d0: 2b20 cmp r3, #32 80053d2: d120 bne.n 8005416 if((pData == NULL) || (Size == 0U)) 80053d4: b1e9 cbz r1, 8005412 80053d6: b1e2 cbz r2, 8005412 __HAL_LOCK(huart); 80053d8: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 80053dc: 2b01 cmp r3, #1 80053de: d01a beq.n 8005416 huart->RxXferCount = Size; 80053e0: 85c2 strh r2, [r0, #46] ; 0x2e huart->RxXferSize = Size; 80053e2: 8582 strh r2, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 80053e4: 2300 movs r3, #0 huart->RxState = HAL_UART_STATE_BUSY_RX; 80053e6: 2222 movs r2, #34 ; 0x22 huart->ErrorCode = HAL_UART_ERROR_NONE; 80053e8: 63c3 str r3, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 80053ea: f880 203a strb.w r2, [r0, #58] ; 0x3a __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 80053ee: 6802 ldr r2, [r0, #0] huart->pRxBuffPtr = pData; 80053f0: 6281 str r1, [r0, #40] ; 0x28 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 80053f2: 68d1 ldr r1, [r2, #12] __HAL_UNLOCK(huart); 80053f4: f880 3038 strb.w r3, [r0, #56] ; 0x38 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 80053f8: f441 7180 orr.w r1, r1, #256 ; 0x100 80053fc: 60d1 str r1, [r2, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 80053fe: 6951 ldr r1, [r2, #20] return HAL_OK; 8005400: 4618 mov r0, r3 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8005402: f041 0101 orr.w r1, r1, #1 8005406: 6151 str r1, [r2, #20] __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 8005408: 68d1 ldr r1, [r2, #12] 800540a: f041 0120 orr.w r1, r1, #32 800540e: 60d1 str r1, [r2, #12] return HAL_OK; 8005410: 4770 bx lr return HAL_ERROR; 8005412: 2001 movs r0, #1 8005414: 4770 bx lr return HAL_BUSY; 8005416: 2002 movs r0, #2 } 8005418: 4770 bx lr 0800541a : 800541a: 4770 bx lr 0800541c : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 800541c: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8005420: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8005422: 2b22 cmp r3, #34 ; 0x22 8005424: d136 bne.n 8005494 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005426: 6883 ldr r3, [r0, #8] 8005428: 6901 ldr r1, [r0, #16] 800542a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 800542e: 6802 ldr r2, [r0, #0] 8005430: 6a83 ldr r3, [r0, #40] ; 0x28 8005432: d123 bne.n 800547c *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8005434: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005436: b9e9 cbnz r1, 8005474 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8005438: f3c2 0208 ubfx r2, r2, #0, #9 800543c: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8005440: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8005442: 8dc4 ldrh r4, [r0, #46] ; 0x2e 8005444: 3c01 subs r4, #1 8005446: b2a4 uxth r4, r4 8005448: 85c4 strh r4, [r0, #46] ; 0x2e 800544a: b98c cbnz r4, 8005470 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 800544c: 6803 ldr r3, [r0, #0] 800544e: 68da ldr r2, [r3, #12] 8005450: f022 0220 bic.w r2, r2, #32 8005454: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8005456: 68da ldr r2, [r3, #12] 8005458: f422 7280 bic.w r2, r2, #256 ; 0x100 800545c: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 800545e: 695a ldr r2, [r3, #20] 8005460: f022 0201 bic.w r2, r2, #1 8005464: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8005466: 2320 movs r3, #32 8005468: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 800546c: f000 fa36 bl 80058dc if(--huart->RxXferCount == 0U) 8005470: 2000 movs r0, #0 } 8005472: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 8005474: b2d2 uxtb r2, r2 8005476: f823 2b01 strh.w r2, [r3], #1 800547a: e7e1 b.n 8005440 if(huart->Init.Parity == UART_PARITY_NONE) 800547c: b921 cbnz r1, 8005488 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 800547e: 1c59 adds r1, r3, #1 8005480: 6852 ldr r2, [r2, #4] 8005482: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8005484: 701a strb r2, [r3, #0] 8005486: e7dc b.n 8005442 8005488: 6852 ldr r2, [r2, #4] 800548a: 1c59 adds r1, r3, #1 800548c: 6281 str r1, [r0, #40] ; 0x28 800548e: f002 027f and.w r2, r2, #127 ; 0x7f 8005492: e7f7 b.n 8005484 return HAL_BUSY; 8005494: 2002 movs r0, #2 8005496: bd10 pop {r4, pc} 08005498 : 8005498: 4770 bx lr ... 0800549c : uint32_t isrflags = READ_REG(huart->Instance->SR); 800549c: 6803 ldr r3, [r0, #0] { 800549e: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 80054a0: 681a ldr r2, [r3, #0] { 80054a2: 4604 mov r4, r0 if(errorflags == RESET) 80054a4: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 80054a6: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 80054a8: 695d ldr r5, [r3, #20] if(errorflags == RESET) 80054aa: d107 bne.n 80054bc if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80054ac: 0696 lsls r6, r2, #26 80054ae: d55a bpl.n 8005566 80054b0: 068d lsls r5, r1, #26 80054b2: d558 bpl.n 8005566 } 80054b4: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 80054b8: f7ff bfb0 b.w 800541c if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 80054bc: f015 0501 ands.w r5, r5, #1 80054c0: d102 bne.n 80054c8 80054c2: f411 7f90 tst.w r1, #288 ; 0x120 80054c6: d04e beq.n 8005566 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 80054c8: 07d3 lsls r3, r2, #31 80054ca: d505 bpl.n 80054d8 80054cc: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 80054ce: bf42 ittt mi 80054d0: 6be3 ldrmi r3, [r4, #60] ; 0x3c 80054d2: f043 0301 orrmi.w r3, r3, #1 80054d6: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80054d8: 0750 lsls r0, r2, #29 80054da: d504 bpl.n 80054e6 80054dc: b11d cbz r5, 80054e6 huart->ErrorCode |= HAL_UART_ERROR_NE; 80054de: 6be3 ldr r3, [r4, #60] ; 0x3c 80054e0: f043 0302 orr.w r3, r3, #2 80054e4: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80054e6: 0793 lsls r3, r2, #30 80054e8: d504 bpl.n 80054f4 80054ea: b11d cbz r5, 80054f4 huart->ErrorCode |= HAL_UART_ERROR_FE; 80054ec: 6be3 ldr r3, [r4, #60] ; 0x3c 80054ee: f043 0304 orr.w r3, r3, #4 80054f2: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80054f4: 0716 lsls r6, r2, #28 80054f6: d504 bpl.n 8005502 80054f8: b11d cbz r5, 8005502 huart->ErrorCode |= HAL_UART_ERROR_ORE; 80054fa: 6be3 ldr r3, [r4, #60] ; 0x3c 80054fc: f043 0308 orr.w r3, r3, #8 8005500: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8005502: 6be3 ldr r3, [r4, #60] ; 0x3c 8005504: 2b00 cmp r3, #0 8005506: d066 beq.n 80055d6 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8005508: 0695 lsls r5, r2, #26 800550a: d504 bpl.n 8005516 800550c: 0688 lsls r0, r1, #26 800550e: d502 bpl.n 8005516 UART_Receive_IT(huart); 8005510: 4620 mov r0, r4 8005512: f7ff ff83 bl 800541c dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005516: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8005518: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 800551a: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 800551c: 6be2 ldr r2, [r4, #60] ; 0x3c 800551e: 0711 lsls r1, r2, #28 8005520: d402 bmi.n 8005528 8005522: f015 0540 ands.w r5, r5, #64 ; 0x40 8005526: d01a beq.n 800555e UART_EndRxTransfer(huart); 8005528: f7ff fdf2 bl 8005110 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 800552c: 6823 ldr r3, [r4, #0] 800552e: 695a ldr r2, [r3, #20] 8005530: 0652 lsls r2, r2, #25 8005532: d510 bpl.n 8005556 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005534: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8005536: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005538: f022 0240 bic.w r2, r2, #64 ; 0x40 800553c: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 800553e: b150 cbz r0, 8005556 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8005540: 4b25 ldr r3, [pc, #148] ; (80055d8 ) 8005542: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8005544: f7fe ff3c bl 80043c0 8005548: 2800 cmp r0, #0 800554a: d044 beq.n 80055d6 huart->hdmarx->XferAbortCallback(huart->hdmarx); 800554c: 6b60 ldr r0, [r4, #52] ; 0x34 } 800554e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8005552: 6b43 ldr r3, [r0, #52] ; 0x34 8005554: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8005556: 4620 mov r0, r4 8005558: f7ff ff9e bl 8005498 800555c: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 800555e: f7ff ff9b bl 8005498 huart->ErrorCode = HAL_UART_ERROR_NONE; 8005562: 63e5 str r5, [r4, #60] ; 0x3c 8005564: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8005566: 0616 lsls r6, r2, #24 8005568: d527 bpl.n 80055ba 800556a: 060d lsls r5, r1, #24 800556c: d525 bpl.n 80055ba if(huart->gState == HAL_UART_STATE_BUSY_TX) 800556e: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8005572: 2a21 cmp r2, #33 ; 0x21 8005574: d12f bne.n 80055d6 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8005576: 68a2 ldr r2, [r4, #8] 8005578: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 800557c: 6a22 ldr r2, [r4, #32] 800557e: d117 bne.n 80055b0 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8005580: 8811 ldrh r1, [r2, #0] 8005582: f3c1 0108 ubfx r1, r1, #0, #9 8005586: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8005588: 6921 ldr r1, [r4, #16] 800558a: b979 cbnz r1, 80055ac huart->pTxBuffPtr += 2U; 800558c: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800558e: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8005590: 8ce2 ldrh r2, [r4, #38] ; 0x26 8005592: 3a01 subs r2, #1 8005594: b292 uxth r2, r2 8005596: 84e2 strh r2, [r4, #38] ; 0x26 8005598: b9ea cbnz r2, 80055d6 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 800559a: 68da ldr r2, [r3, #12] 800559c: f022 0280 bic.w r2, r2, #128 ; 0x80 80055a0: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 80055a2: 68da ldr r2, [r3, #12] 80055a4: f042 0240 orr.w r2, r2, #64 ; 0x40 80055a8: 60da str r2, [r3, #12] 80055aa: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 80055ac: 3201 adds r2, #1 80055ae: e7ee b.n 800558e huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 80055b0: 1c51 adds r1, r2, #1 80055b2: 6221 str r1, [r4, #32] 80055b4: 7812 ldrb r2, [r2, #0] 80055b6: 605a str r2, [r3, #4] 80055b8: e7ea b.n 8005590 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 80055ba: 0650 lsls r0, r2, #25 80055bc: d50b bpl.n 80055d6 80055be: 064a lsls r2, r1, #25 80055c0: d509 bpl.n 80055d6 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80055c2: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 80055c4: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80055c6: f022 0240 bic.w r2, r2, #64 ; 0x40 80055ca: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 80055cc: 2320 movs r3, #32 80055ce: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 80055d2: f7ff ff22 bl 800541a 80055d6: bd70 pop {r4, r5, r6, pc} 80055d8: 080055dd .word 0x080055dd 080055dc : { 80055dc: b508 push {r3, lr} huart->RxXferCount = 0x00U; 80055de: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80055e0: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 80055e2: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 80055e4: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 80055e6: f7ff ff57 bl 8005498 80055ea: bd08 pop {r3, pc} 080055ec : void RGB_Response_Func(uint8_t* data); void RGB_Response_Func(uint8_t* data){ 80055ec: b510 push {r4, lr} #if 0 for(uint8_t i = 0; i < 10; i++){ printf("%02x ",data[i]); } #endif switch(type){ 80055ee: 7843 ldrb r3, [r0, #1] void RGB_Response_Func(uint8_t* data){ 80055f0: 4604 mov r4, r0 switch(type){ 80055f2: 3b01 subs r3, #1 80055f4: 2b08 cmp r3, #8 80055f6: d822 bhi.n 800563e 80055f8: e8df f003 tbb [pc, r3] 80055fc: 21170517 .word 0x21170517 8005600: 17170d0b .word 0x17170d0b 8005604: 1d .byte 0x1d 8005605: 00 .byte 0x00 case RGB_Status_Data_Request: Uart2_Data_Send(data,RGB_SensorDataRequest_Length); break; case RGB_ControllerID_SET: Uart1_Data_Send(data,RGB_ControllerID_SET_Length); 8005606: 210a movs r1, #10 break; case RGB_SensorID_SET: Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); break; case RGB_Status_Data_Response: Uart1_Data_Send(data,RGB_SensorDataResponse_Length); 8005608: 4620 mov r0, r4 case RGB_SensorID_SET_Success: break; } } 800560a: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(data,RGB_SensorDataResponse_Length); 800560e: f000 b9f5 b.w 80059fc 8005612: 210f movs r1, #15 8005614: e7f8 b.n 8005608 Uart1_Data_Send(data,data[blucell_length] + 3); 8005616: 7881 ldrb r1, [r0, #2] 8005618: 3103 adds r1, #3 800561a: b2c9 uxtb r1, r1 800561c: f000 f9ee bl 80059fc Flash_write(&data[0]); 8005620: 4620 mov r0, r4 } 8005622: e8bd 4010 ldmia.w sp!, {r4, lr} Flash_write(&data[0]); 8005626: f000 bb85 b.w 8005d34 Uart2_Data_Send(data,RGB_SensorIDAutoSetRequest_Length); 800562a: 2107 movs r1, #7 Uart2_Data_Send(data,data[blucell_length] + 3); 800562c: 4620 mov r0, r4 } 800562e: e8bd 4010 ldmia.w sp!, {r4, lr} Uart2_Data_Send(data,data[blucell_length] + 3); 8005632: f000 b9db b.w 80059ec 8005636: 7881 ldrb r1, [r0, #2] 8005638: 3103 adds r1, #3 800563a: b2c9 uxtb r1, r1 800563c: e7f6 b.n 800562c 800563e: bd10 pop {r4, pc} 08005640 : uint16_t Sensor_red[9] = {0,}; uint16_t Sensor_green[9] = {0,}; uint16_t Sensor_blue[9] = {0,}; void RGB_Alarm_Check(uint8_t* data){ 8005640: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} Sensor_red[data[blucell_srcid]] = ((data[blucell_red_H + 2] << 8)| data[blucell_red_L + 2]); 8005644: 7981 ldrb r1, [r0, #6] 8005646: 79c3 ldrb r3, [r0, #7] 8005648: 78c2 ldrb r2, [r0, #3] 800564a: 4c2d ldr r4, [pc, #180] ; (8005700 ) 800564c: ea43 2301 orr.w r3, r3, r1, lsl #8 8005650: f824 3012 strh.w r3, [r4, r2, lsl #1] Sensor_green[data[blucell_srcid]] = ((data[blucell_green_H + 2] << 8)| data[blucell_green_L + 2]); 8005654: 7a05 ldrb r5, [r0, #8] 8005656: 7a43 ldrb r3, [r0, #9] 8005658: 78c2 ldrb r2, [r0, #3] 800565a: 492a ldr r1, [pc, #168] ; (8005704 ) 800565c: ea43 2305 orr.w r3, r3, r5, lsl #8 8005660: f821 3012 strh.w r3, [r1, r2, lsl #1] Sensor_blue[data[blucell_srcid]] = ((data[blucell_blue_H + 2] << 8)| data[blucell_blue_L + 2]); 8005664: 7a86 ldrb r6, [r0, #10] 8005666: 7ac3 ldrb r3, [r0, #11] 8005668: 78c5 ldrb r5, [r0, #3] 800566a: 4a27 ldr r2, [pc, #156] ; (8005708 ) 800566c: ea43 2306 orr.w r3, r3, r6, lsl #8 8005670: f822 3015 strh.w r3, [r2, r5, lsl #1] uint8_t LED_Alarm = 0; for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 8005674: 4b25 ldr r3, [pc, #148] ; (800570c ) 8005676: 4608 mov r0, r1 8005678: f893 c000 ldrb.w ip, [r3] 800567c: 4611 mov r1, r2 800567e: 2301 movs r3, #1 if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 8005680: 4d23 ldr r5, [pc, #140] ; (8005710 ) 8005682: 4e24 ldr r6, [pc, #144] ; (8005714 ) || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]] 8005684: 4f24 ldr r7, [pc, #144] ; (8005718 ) || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 8005686: f8df e0a0 ldr.w lr, [pc, #160] ; 8005728 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 800568a: 4563 cmp r3, ip 800568c: d90d bls.n 80056aa if(LED_Alarm == 1){ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_SET); }else{ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET); 800568e: 2200 movs r2, #0 8005690: f44f 5180 mov.w r1, #4096 ; 0x1000 8005694: 4821 ldr r0, [pc, #132] ; (800571c ) 8005696: f7ff f8a1 bl 80047dc HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_SET); 800569a: 2201 movs r2, #1 800569c: f44f 5100 mov.w r1, #8192 ; 0x2000 80056a0: 481f ldr r0, [pc, #124] ; (8005720 ) 80056a2: f7ff f89b bl 80047dc HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_RESET); 80056a6: 2200 movs r2, #0 80056a8: e022 b.n 80056f0 if(RGB_SensorRedLimit_Buf[SensorID_buf[i]] >= Sensor_red[SensorID_buf[i]] 80056aa: 5cea ldrb r2, [r5, r3] 80056ac: f836 9012 ldrh.w r9, [r6, r2, lsl #1] 80056b0: f834 8012 ldrh.w r8, [r4, r2, lsl #1] 80056b4: 45c1 cmp r9, r8 80056b6: d20e bcs.n 80056d6 || RGB_SensorGreenLimit_Buf[SensorID_buf[i]] >= Sensor_green[SensorID_buf[i]] 80056b8: f837 9012 ldrh.w r9, [r7, r2, lsl #1] 80056bc: f830 8012 ldrh.w r8, [r0, r2, lsl #1] 80056c0: 45c1 cmp r9, r8 80056c2: d208 bcs.n 80056d6 || RGB_SensorBlueLimit_Buf[SensorID_buf[i]] >= Sensor_blue[SensorID_buf[i]]) { 80056c4: f83e 8012 ldrh.w r8, [lr, r2, lsl #1] 80056c8: f831 2012 ldrh.w r2, [r1, r2, lsl #1] 80056cc: 4590 cmp r8, r2 80056ce: d202 bcs.n 80056d6 for(uint8_t i = 1; i <= (SensorID_Cnt); i++){ 80056d0: 3301 adds r3, #1 80056d2: b2db uxtb r3, r3 80056d4: e7d9 b.n 800568a HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_SET); 80056d6: 2201 movs r2, #1 80056d8: f44f 5180 mov.w r1, #4096 ; 0x1000 80056dc: 480f ldr r0, [pc, #60] ; (800571c ) 80056de: f7ff f87d bl 80047dc HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET); 80056e2: 2200 movs r2, #0 80056e4: f44f 5100 mov.w r1, #8192 ; 0x2000 80056e8: 480d ldr r0, [pc, #52] ; (8005720 ) 80056ea: f7ff f877 bl 80047dc HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_SET); 80056ee: 2201 movs r2, #1 } } 80056f0: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, GPIO_PIN_RESET); 80056f4: f44f 6180 mov.w r1, #1024 ; 0x400 80056f8: 480a ldr r0, [pc, #40] ; (8005724 ) 80056fa: f7ff b86f b.w 80047dc 80056fe: bf00 nop 8005700: 200000f0 .word 0x200000f0 8005704: 200000de .word 0x200000de 8005708: 200000cc .word 0x200000cc 800570c: 200000c2 .word 0x200000c2 8005710: 200000c3 .word 0x200000c3 8005714: 200000b0 .word 0x200000b0 8005718: 2000009e .word 0x2000009e 800571c: 40010c00 .word 0x40010c00 8005720: 40010800 .word 0x40010800 8005724: 40011000 .word 0x40011000 8005728: 2000008c .word 0x2000008c 0800572c : uint8_t RGB_DeviceStatusCheck(void){ 800572c: b530 push {r4, r5, lr} uint8_t ret = 0; for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800572e: 4b09 ldr r3, [pc, #36] ; (8005754 ) uint8_t ret = 0; 8005730: 2000 movs r0, #0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 8005732: 7819 ldrb r1, [r3, #0] 8005734: 2301 movs r3, #1 if(SensorID_buf[i] > 0){ ret += 0x01 << (SensorID_buf[i] - 1); 8005736: 461d mov r5, r3 if(SensorID_buf[i] > 0){ 8005738: 4c07 ldr r4, [pc, #28] ; (8005758 ) for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800573a: 428b cmp r3, r1 800573c: d900 bls.n 8005740 } } return ret; } 800573e: bd30 pop {r4, r5, pc} if(SensorID_buf[i] > 0){ 8005740: 5ce2 ldrb r2, [r4, r3] 8005742: b122 cbz r2, 800574e ret += 0x01 << (SensorID_buf[i] - 1); 8005744: 3a01 subs r2, #1 8005746: fa05 f202 lsl.w r2, r5, r2 800574a: 4410 add r0, r2 800574c: b2c0 uxtb r0, r0 for(uint8_t i = 1; i <= SensorID_Cnt; i++){ 800574e: 3301 adds r3, #1 8005750: b2db uxtb r3, r3 8005752: e7f2 b.n 800573a 8005754: 200000c2 .word 0x200000c2 8005758: 200000c3 .word 0x200000c3 0800575c : uint8_t datalosscnt[9] = {0,}; void RGB_Controller_Func(uint8_t* data){ 800575c: b530 push {r4, r5, lr} RGB_CMD_T type = data[blucell_type]; 800575e: 7845 ldrb r5, [r0, #1] void RGB_Controller_Func(uint8_t* data){ 8005760: b09b sub sp, #108 ; 0x6c 8005762: 4604 mov r4, r0 // static uint8_t temp_sensorid; uint8_t Result_buf[100] = {0,}; 8005764: 2264 movs r2, #100 ; 0x64 8005766: 2100 movs r1, #0 8005768: a801 add r0, sp, #4 800576a: f000 ff26 bl 80065ba switch(type){ 800576e: 1e6b subs r3, r5, #1 8005770: 2b09 cmp r3, #9 8005772: d824 bhi.n 80057be 8005774: e8df f003 tbb [pc, r3] 8005778: 46342805 .word 0x46342805 800577c: 23236b4f .word 0x23236b4f 8005780: 9223 .short 0x9223 case RGB_Status_Data_Request: datalosscnt[data[blucell_srcid + 1]]++; 8005782: 4b4d ldr r3, [pc, #308] ; (80058b8 ) 8005784: 7921 ldrb r1, [r4, #4] 8005786: 5c5a ldrb r2, [r3, r1] 8005788: 3201 adds r2, #1 800578a: 545a strb r2, [r3, r1] if(datalosscnt[data[blucell_srcid + 1]] > 3 && data[blucell_srcid + 1] != 0){ 800578c: 7922 ldrb r2, [r4, #4] 800578e: 5c9b ldrb r3, [r3, r2] 8005790: 2b03 cmp r3, #3 8005792: d907 bls.n 80057a4 8005794: b132 cbz r2, 80057a4 RGB_SensorIDAutoSet(1); 8005796: 2001 movs r0, #1 8005798: f000 f9a2 bl 8005ae0 memset(&SensorID_buf[0],0x00,8); 800579c: 2200 movs r2, #0 800579e: 4b47 ldr r3, [pc, #284] ; (80058bc ) 80057a0: 601a str r2, [r3, #0] 80057a2: 605a str r2, [r3, #4] } data[5] = STH30_CreateCrc(&data[blucell_type],data[blucell_length]); 80057a4: 78a1 ldrb r1, [r4, #2] 80057a6: 1c60 adds r0, r4, #1 80057a8: f000 fd14 bl 80061d4 80057ac: 7160 strb r0, [r4, #5] memcpy(&Result_buf[blucell_stx],&data[blucell_stx],RGB_SensorDataRequest_Length); 80057ae: 88a2 ldrh r2, [r4, #4] 80057b0: 6820 ldr r0, [r4, #0] 80057b2: 79a3 ldrb r3, [r4, #6] 80057b4: 9001 str r0, [sp, #4] 80057b6: f8ad 2008 strh.w r2, [sp, #8] 80057ba: f88d 300a strb.w r3, [sp, #10] break; default: break; } RGB_Response_Func(&Result_buf[blucell_stx]); 80057be: a801 add r0, sp, #4 80057c0: f7ff ff14 bl 80055ec return; } 80057c4: b01b add sp, #108 ; 0x6c 80057c6: bd30 pop {r4, r5, pc} memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 80057c8: 78a2 ldrb r2, [r4, #2] 80057ca: 4621 mov r1, r4 80057cc: 3203 adds r2, #3 80057ce: a801 add r0, sp, #4 80057d0: f000 fee8 bl 80065a4 MyControllerID = Result_buf[7] = data[7];//�긽��諛⑹쓽 DST ID �뒗 �굹�쓽 ID �씠�떎. 80057d4: 79e3 ldrb r3, [r4, #7] 80057d6: 4a3a ldr r2, [pc, #232] ; (80058c0 ) 80057d8: f88d 300b strb.w r3, [sp, #11] 80057dc: 7013 strb r3, [r2, #0] break; 80057de: e7ee b.n 80057be RGB_SensorIDAutoSet(1); 80057e0: 2001 movs r0, #1 80057e2: f000 f97d bl 8005ae0 memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 80057e6: 78a2 ldrb r2, [r4, #2] 80057e8: 4621 mov r1, r4 80057ea: 3203 adds r2, #3 80057ec: a801 add r0, sp, #4 80057ee: f000 fed9 bl 80065a4 Result_buf[5] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 80057f2: f89d 1006 ldrb.w r1, [sp, #6] 80057f6: f10d 0005 add.w r0, sp, #5 80057fa: f000 fceb bl 80061d4 80057fe: f88d 0009 strb.w r0, [sp, #9] break; 8005802: e7dc b.n 80057be SensorID_Cnt++; 8005804: 4a2f ldr r2, [pc, #188] ; (80058c4 ) SensorID_buf[SensorID_Cnt] = data[blucell_length + 1]; 8005806: 78e1 ldrb r1, [r4, #3] SensorID_Cnt++; 8005808: 7813 ldrb r3, [r2, #0] 800580a: 3301 adds r3, #1 800580c: b2db uxtb r3, r3 800580e: 7013 strb r3, [r2, #0] SensorID_buf[SensorID_Cnt] = data[blucell_length + 1]; 8005810: 4a2a ldr r2, [pc, #168] ; (80058bc ) 8005812: 54d1 strb r1, [r2, r3] break; 8005814: e7d3 b.n 80057be datalosscnt[data[blucell_srcid]] = 0; 8005816: 2100 movs r1, #0 8005818: 78e3 ldrb r3, [r4, #3] 800581a: 4a27 ldr r2, [pc, #156] ; (80058b8 ) 800581c: 54d1 strb r1, [r2, r3] data[blucell_length] += 1;// Device On OFF status Send byte 800581e: 78a5 ldrb r5, [r4, #2] 8005820: 3501 adds r5, #1 8005822: b2ed uxtb r5, r5 8005824: 70a5 strb r5, [r4, #2] data[blucell_srcid + 9] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 8005826: f7ff ff81 bl 800572c memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 800582a: 1cea adds r2, r5, #3 data[blucell_srcid + 9] = RGB_DeviceStatusCheck();// Device On OFF status Send byte 800582c: 7320 strb r0, [r4, #12] memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 800582e: 4621 mov r1, r4 8005830: a801 add r0, sp, #4 8005832: f000 feb7 bl 80065a4 Result_buf[5] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 8005836: f89d 1006 ldrb.w r1, [sp, #6] 800583a: f10d 0005 add.w r0, sp, #5 800583e: f000 fcc9 bl 80061d4 8005842: f88d 0009 strb.w r0, [sp, #9] RGB_Alarm_Check(&data[blucell_stx]); 8005846: 4620 mov r0, r4 8005848: f7ff fefa bl 8005640 break; 800584c: e7b7 b.n 80057be memcpy(&Result_buf[blucell_stx],&data[blucell_stx],data[blucell_length] + 3); 800584e: 78a2 ldrb r2, [r4, #2] 8005850: 4621 mov r1, r4 8005852: 3203 adds r2, #3 8005854: a801 add r0, sp, #4 8005856: f000 fea5 bl 80065a4 RGB_SensorRedLimit_Buf[data[blucell_dstid]] = ((data[blucell_red_H] << 8) |data[blucell_red_L]); 800585a: 7922 ldrb r2, [r4, #4] 800585c: 7963 ldrb r3, [r4, #5] 800585e: 7aa1 ldrb r1, [r4, #10] 8005860: ea43 2302 orr.w r3, r3, r2, lsl #8 8005864: 4a18 ldr r2, [pc, #96] ; (80058c8 ) Result_buf[blucell_crc] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 8005866: f10d 0005 add.w r0, sp, #5 RGB_SensorRedLimit_Buf[data[blucell_dstid]] = ((data[blucell_red_H] << 8) |data[blucell_red_L]); 800586a: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorGreenLimit_Buf[data[blucell_dstid]] = ((data[blucell_green_H] << 8) |data[blucell_green_L]); 800586e: 79a2 ldrb r2, [r4, #6] 8005870: 79e3 ldrb r3, [r4, #7] 8005872: 7aa1 ldrb r1, [r4, #10] 8005874: ea43 2302 orr.w r3, r3, r2, lsl #8 8005878: 4a14 ldr r2, [pc, #80] ; (80058cc ) 800587a: f822 3011 strh.w r3, [r2, r1, lsl #1] RGB_SensorBlueLimit_Buf[data[blucell_dstid]] = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); 800587e: 7a22 ldrb r2, [r4, #8] 8005880: 7a63 ldrb r3, [r4, #9] 8005882: 7aa1 ldrb r1, [r4, #10] 8005884: ea43 2302 orr.w r3, r3, r2, lsl #8 8005888: 4a11 ldr r2, [pc, #68] ; (80058d0 ) 800588a: f822 3011 strh.w r3, [r2, r1, lsl #1] Result_buf[blucell_crc] = STH30_CreateCrc(&Result_buf[blucell_type],Result_buf[blucell_length]); 800588e: f89d 1006 ldrb.w r1, [sp, #6] 8005892: f000 fc9f bl 80061d4 8005896: f88d 000f strb.w r0, [sp, #15] break; 800589a: e790 b.n 80057be \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 800589c: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 80058a0: 490c ldr r1, [pc, #48] ; (80058d4 ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80058a2: 4b0d ldr r3, [pc, #52] ; (80058d8 ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 80058a4: 68ca ldr r2, [r1, #12] 80058a6: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80058aa: 4313 orrs r3, r2 80058ac: 60cb str r3, [r1, #12] 80058ae: f3bf 8f4f dsb sy __ASM volatile ("nop"); 80058b2: bf00 nop 80058b4: e7fd b.n 80058b2 80058b6: bf00 nop 80058b8: 20000102 .word 0x20000102 80058bc: 200000c3 .word 0x200000c3 80058c0: 200002a4 .word 0x200002a4 80058c4: 200000c2 .word 0x200000c2 80058c8: 200000b0 .word 0x200000b0 80058cc: 2000009e .word 0x2000009e 80058d0: 2000008c .word 0x2000008c 80058d4: e000ed00 .word 0xe000ed00 80058d8: 05fa0004 .word 0x05fa0004 080058dc : uint8_t buf[USART_CNT][buf_size]; }BlueUsart_t; void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART1)//RGB Comunication 80058dc: 6802 ldr r2, [r0, #0] 80058de: 4b18 ldr r3, [pc, #96] ; (8005940 ) { 80058e0: b510 push {r4, lr} if(huart->Instance == USART1)//RGB Comunication 80058e2: 429a cmp r2, r3 { 80058e4: 4604 mov r4, r0 if(huart->Instance == USART1)//RGB Comunication 80058e6: d110 bne.n 800590a { buf[USART1_CNT][count_in1] = rx1_data[0]; 80058e8: 4a16 ldr r2, [pc, #88] ; (8005944 ) 80058ea: 4917 ldr r1, [pc, #92] ; (8005948 ) 80058ec: 7813 ldrb r3, [r2, #0] 80058ee: 7808 ldrb r0, [r1, #0] 80058f0: 4916 ldr r1, [pc, #88] ; (800594c ) 80058f2: 54c8 strb r0, [r1, r3] if(++count_in1>=100){ count_in1 = 0; } 80058f4: 3301 adds r3, #1 80058f6: b2db uxtb r3, r3 80058f8: 2b63 cmp r3, #99 ; 0x63 80058fa: bf88 it hi 80058fc: 2300 movhi r3, #0 HAL_UART_Receive_IT(&huart1,&rx1_data[0],1); 80058fe: 4912 ldr r1, [pc, #72] ; (8005948 ) if(++count_in1>=100){ count_in1 = 0; } 8005900: 7013 strb r3, [r2, #0] HAL_UART_Receive_IT(&huart1,&rx1_data[0],1); 8005902: 4813 ldr r0, [pc, #76] ; (8005950 ) 8005904: 2201 movs r2, #1 8005906: f7ff fd61 bl 80053cc } if(huart->Instance == USART2) 800590a: 6822 ldr r2, [r4, #0] 800590c: 4b11 ldr r3, [pc, #68] ; (8005954 ) 800590e: 429a cmp r2, r3 8005910: d114 bne.n 800593c { buf[USART2_CNT][count_in2] = rx2_data[0]; 8005912: 4a11 ldr r2, [pc, #68] ; (8005958 ) 8005914: 490d ldr r1, [pc, #52] ; (800594c ) 8005916: 7813 ldrb r3, [r2, #0] 8005918: 4810 ldr r0, [pc, #64] ; (800595c ) 800591a: 4419 add r1, r3 if(++count_in2>=100){ count_in2 = 0; } 800591c: 3301 adds r3, #1 800591e: b2db uxtb r3, r3 8005920: 2b63 cmp r3, #99 ; 0x63 8005922: bf88 it hi 8005924: 2300 movhi r3, #0 buf[USART2_CNT][count_in2] = rx2_data[0]; 8005926: 7800 ldrb r0, [r0, #0] if(++count_in2>=100){ count_in2 = 0; } 8005928: 7013 strb r3, [r2, #0] buf[USART2_CNT][count_in2] = rx2_data[0]; 800592a: f881 0064 strb.w r0, [r1, #100] ; 0x64 HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 800592e: 2201 movs r2, #1 } } 8005930: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8005934: 4909 ldr r1, [pc, #36] ; (800595c ) 8005936: 480a ldr r0, [pc, #40] ; (8005960 ) 8005938: f7ff bd48 b.w 80053cc 800593c: bd10 pop {r4, pc} 800593e: bf00 nop 8005940: 40013800 .word 0x40013800 8005944: 2000029c .word 0x2000029c 8005948: 200002e2 .word 0x200002e2 800594c: 200001d4 .word 0x200001d4 8005950: 20000338 .word 0x20000338 8005954: 40004400 .word 0x40004400 8005958: 2000029d .word 0x2000029d 800595c: 200002e1 .word 0x200002e1 8005960: 20000410 .word 0x20000410 08005964 : void QueueCheck(uint8_t Usart_Num,uint8_t* header,uint8_t* tail){ 8005964: b570 push {r4, r5, r6, lr} if(*tail != *header){ 8005966: 7814 ldrb r4, [r2, #0] 8005968: 780b ldrb r3, [r1, #0] 800596a: 429c cmp r4, r3 800596c: d017 beq.n 800599e Uart_RxData[Usart_Num][Uart_Rxcnt++] = buf[Usart_Num][*tail++]; 800596e: 4b0c ldr r3, [pc, #48] ; (80059a0 ) 8005970: 4c0c ldr r4, [pc, #48] ; (80059a4 ) 8005972: 781d ldrb r5, [r3, #0] 8005974: 1c69 adds r1, r5, #1 8005976: 7019 strb r1, [r3, #0] 8005978: 2364 movs r3, #100 ; 0x64 800597a: 4343 muls r3, r0 800597c: 490a ldr r1, [pc, #40] ; (80059a8 ) 800597e: 7816 ldrb r6, [r2, #0] 8005980: 4419 add r1, r3 8005982: 4423 add r3, r4 8005984: 5d9b ldrb r3, [r3, r6] if(*tail>= 100){ *tail = 0; } UartTimerCnt = 0; UartDataRecvSet(Usart_Num + 1); 8005986: 3001 adds r0, #1 Uart_RxData[Usart_Num][Uart_Rxcnt++] = buf[Usart_Num][*tail++]; 8005988: 554b strb r3, [r1, r5] if(*tail>= 100){ *tail = 0; } 800598a: 7853 ldrb r3, [r2, #1] 800598c: 2b63 cmp r3, #99 ; 0x63 800598e: f04f 0300 mov.w r3, #0 8005992: bf88 it hi 8005994: 7053 strbhi r3, [r2, #1] UartTimerCnt = 0; 8005996: 4a05 ldr r2, [pc, #20] ; (80059ac ) 8005998: 6013 str r3, [r2, #0] void UartDataBufferCheck(void){ QueueCheck(USART1_CNT,&count_in1,&count_out1); QueueCheck(USART2_CNT,&count_in2,&count_out2); } void UartDataRecvSet(uint8_t val){ UartDataisReved = val; 800599a: 4b05 ldr r3, [pc, #20] ; (80059b0 ) 800599c: 7018 strb r0, [r3, #0] 800599e: bd70 pop {r4, r5, r6, pc} 80059a0: 200001d3 .word 0x200001d3 80059a4: 200001d4 .word 0x200001d4 80059a8: 2000010b .word 0x2000010b 80059ac: 200002a8 .word 0x200002a8 80059b0: 200002e0 .word 0x200002e0 080059b4 : void UartDataBufferCheck(void){ 80059b4: b508 push {r3, lr} QueueCheck(USART1_CNT,&count_in1,&count_out1); 80059b6: 4a06 ldr r2, [pc, #24] ; (80059d0 ) 80059b8: 4906 ldr r1, [pc, #24] ; (80059d4 ) 80059ba: 2000 movs r0, #0 80059bc: f7ff ffd2 bl 8005964 } 80059c0: e8bd 4008 ldmia.w sp!, {r3, lr} QueueCheck(USART2_CNT,&count_in2,&count_out2); 80059c4: 4a04 ldr r2, [pc, #16] ; (80059d8 ) 80059c6: 4905 ldr r1, [pc, #20] ; (80059dc ) 80059c8: 2001 movs r0, #1 80059ca: f7ff bfcb b.w 8005964 80059ce: bf00 nop 80059d0: 2000029e .word 0x2000029e 80059d4: 2000029c .word 0x2000029c 80059d8: 2000029f .word 0x2000029f 80059dc: 2000029d .word 0x2000029d 080059e0 : } uint8_t UartDataRecvGet(void){ return UartDataisReved; } 80059e0: 4b01 ldr r3, [pc, #4] ; (80059e8 ) 80059e2: 7818 ldrb r0, [r3, #0] 80059e4: 4770 bx lr 80059e6: bf00 nop 80059e8: 200002e0 .word 0x200002e0 080059ec : void Uart2_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart2, data,size, 10); 80059ec: 460a mov r2, r1 80059ee: 230a movs r3, #10 80059f0: 4601 mov r1, r0 80059f2: 4801 ldr r0, [pc, #4] ; (80059f8 ) 80059f4: f7ff bc8e b.w 8005314 80059f8: 20000410 .word 0x20000410 080059fc : } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart1, data,size, 10); 80059fc: 460a mov r2, r1 80059fe: 230a movs r3, #10 8005a00: 4601 mov r1, r0 8005a02: 4801 ldr r0, [pc, #4] ; (8005a08 ) 8005a04: f7ff bc86 b.w 8005314 8005a08: 20000338 .word 0x20000338 08005a0c <_write>: } int _write (int file, uint8_t *ptr, uint16_t len) { 8005a0c: b510 push {r4, lr} 8005a0e: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8005a10: 230a movs r3, #10 8005a12: 4802 ldr r0, [pc, #8] ; (8005a1c <_write+0x10>) 8005a14: f7ff fc7e bl 8005314 return len; } 8005a18: 4620 mov r0, r4 8005a1a: bd10 pop {r4, pc} 8005a1c: 20000338 .word 0x20000338 08005a20 : void Uart_dataCheck(uint8_t Usart_Num ,uint8_t* cnt){ 8005a20: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8005a24: f04f 0964 mov.w r9, #100 ; 0x64 8005a28: fb09 f600 mul.w r6, r9, r0 printf("%02x ",buf[i]); } printf("\r\n"); #endif crccheck = STH30_CheckCrc(&Uart_RxData[Usart_Num][blucell_type],Uart_RxData[Usart_Num][blucell_length],Uart_RxData[Usart_Num][Uart_RxData[Usart_Num][blucell_length] + 1]); 8005a2c: 4d1d ldr r5, [pc, #116] ; (8005aa4 ) void Uart_dataCheck(uint8_t Usart_Num ,uint8_t* cnt){ 8005a2e: 460f mov r7, r1 crccheck = STH30_CheckCrc(&Uart_RxData[Usart_Num][blucell_type],Uart_RxData[Usart_Num][blucell_length],Uart_RxData[Usart_Num][Uart_RxData[Usart_Num][blucell_length] + 1]); 8005a30: eb05 0806 add.w r8, r5, r6 8005a34: f898 1002 ldrb.w r1, [r8, #2] void Uart_dataCheck(uint8_t Usart_Num ,uint8_t* cnt){ 8005a38: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&Uart_RxData[Usart_Num][blucell_type],Uart_RxData[Usart_Num][blucell_length],Uart_RxData[Usart_Num][Uart_RxData[Usart_Num][blucell_length] + 1]); 8005a3a: eb08 0301 add.w r3, r8, r1 8005a3e: 1c70 adds r0, r6, #1 8005a40: 785a ldrb r2, [r3, #1] 8005a42: 4428 add r0, r5 8005a44: f000 fbe1 bl 800620a if(crccheck == CHECKSUM_ERROR){ 8005a48: b9f8 cbnz r0, 8005a8a for(uint8_t i = 0; i < (*cnt); i++){ printf("%02x ",Uart_RxData[Usart_Num][i]); 8005a4a: f8df b068 ldr.w fp, [pc, #104] ; 8005ab4 for(uint8_t i = 0; i < (*cnt); i++){ 8005a4e: 783b ldrb r3, [r7, #0] 8005a50: f100 0a01 add.w sl, r0, #1 8005a54: b2c0 uxtb r0, r0 8005a56: 4283 cmp r3, r0 8005a58: d810 bhi.n 8005a7c } printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,Uart_RxData[Usart_Num][Uart_RxData[Usart_Num][blucell_length] + 1]); 8005a5a: fb09 5404 mla r4, r9, r4, r5 8005a5e: 78a3 ldrb r3, [r4, #2] 8005a60: 2100 movs r1, #0 8005a62: 441c add r4, r3 8005a64: 7862 ldrb r2, [r4, #1] 8005a66: 4810 ldr r0, [pc, #64] ; (8005aa8 ) 8005a68: f000 fdb0 bl 80065cc else{ printf("What Happen?\r\n"); /*NOP*/ } *cnt = 0; 8005a6c: 2100 movs r1, #0 8005a6e: 7039 strb r1, [r7, #0] memset(Uart_RxData[Usart_Num],0x00,buf_size); 8005a70: 19a8 adds r0, r5, r6 8005a72: 2264 movs r2, #100 ; 0x64 } 8005a74: e8bd 4ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} memset(Uart_RxData[Usart_Num],0x00,buf_size); 8005a78: f000 bd9f b.w 80065ba printf("%02x ",Uart_RxData[Usart_Num][i]); 8005a7c: f818 1000 ldrb.w r1, [r8, r0] 8005a80: 4658 mov r0, fp 8005a82: f000 fda3 bl 80065cc 8005a86: 4650 mov r0, sl 8005a88: e7e1 b.n 8005a4e else if(crccheck == NO_ERROR){ 8005a8a: 2801 cmp r0, #1 8005a8c: d106 bne.n 8005a9c RGB_Controller_Func(&Uart_RxData[Usart_Num][blucell_stx]);\ 8005a8e: 4640 mov r0, r8 8005a90: f7ff fe64 bl 800575c UartDataisReved = val; 8005a94: 2200 movs r2, #0 8005a96: 4b05 ldr r3, [pc, #20] ; (8005aac ) 8005a98: 701a strb r2, [r3, #0] 8005a9a: e7e7 b.n 8005a6c printf("What Happen?\r\n"); 8005a9c: 4804 ldr r0, [pc, #16] ; (8005ab0 ) 8005a9e: f000 fe09 bl 80066b4 8005aa2: e7e3 b.n 8005a6c 8005aa4: 2000010b .word 0x2000010b 8005aa8: 080076b2 .word 0x080076b2 8005aac: 200002e0 .word 0x200002e0 8005ab0: 080076d8 .word 0x080076d8 8005ab4: 080076ac .word 0x080076ac 08005ab8 : void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8005ab8: 6802 ldr r2, [r0, #0] 8005aba: 4b06 ldr r3, [pc, #24] ; (8005ad4 ) 8005abc: 429a cmp r2, r3 8005abe: d107 bne.n 8005ad0 UartTimerCnt++; 8005ac0: 4a05 ldr r2, [pc, #20] ; (8005ad8 ) 8005ac2: 6813 ldr r3, [r2, #0] 8005ac4: 3301 adds r3, #1 8005ac6: 6013 str r3, [r2, #0] LedTimerCnt++; 8005ac8: 4a04 ldr r2, [pc, #16] ; (8005adc ) 8005aca: 6813 ldr r3, [r2, #0] 8005acc: 3301 adds r3, #1 8005ace: 6013 str r3, [r2, #0] 8005ad0: 4770 bx lr 8005ad2: bf00 nop 8005ad4: 40001000 .word 0x40001000 8005ad8: 200002a8 .word 0x200002a8 8005adc: 200002a0 .word 0x200002a0 08005ae0 : } } void RGB_SensorIDAutoSet(uint8_t set){ RGB_SensorIDAutoset = set; 8005ae0: 4b01 ldr r3, [pc, #4] ; (8005ae8 ) 8005ae2: 7018 strb r0, [r3, #0] 8005ae4: 4770 bx lr 8005ae6: bf00 nop 8005ae8: 200002a5 .word 0x200002a5 08005aec : uint8_t RGB_SensorIDAutoGet(void){ return RGB_SensorIDAutoset; } void RGB_Sensor_PowerOnOff(uint8_t id){ 8005aec: b510 push {r4, lr} 8005aee: 4604 mov r4, r0 printf("%d Power ON \r\n",id); 8005af0: 4601 mov r1, r0 8005af2: 487b ldr r0, [pc, #492] ; (8005ce0 ) 8005af4: f000 fd6a bl 80065cc switch(id){ 8005af8: 2c08 cmp r4, #8 8005afa: f200 80ef bhi.w 8005cdc 8005afe: e8df f004 tbb [pc, r4] 8005b02: 05c3 .short 0x05c3 8005b04: 6854463e .word 0x6854463e 8005b08: 9f81 .short 0x9f81 8005b0a: c3 .byte 0xc3 8005b0b: 00 .byte 0x00 HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; case 1: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_RESET); 8005b0c: 2200 movs r2, #0 8005b0e: f44f 5100 mov.w r1, #8192 ; 0x2000 8005b12: 4874 ldr r0, [pc, #464] ; (8005ce4 ) 8005b14: f7fe fe62 bl 80047dc HAL_Delay(50); 8005b18: 2032 movs r0, #50 ; 0x32 8005b1a: f7fe fbd7 bl 80042cc HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005b1e: 2201 movs r2, #1 8005b20: f44f 5100 mov.w r1, #8192 ; 0x2000 8005b24: 486f ldr r0, [pc, #444] ; (8005ce4 ) 8005b26: f7fe fe59 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_RESET); 8005b2a: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); break; case 2: HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005b2c: f44f 4180 mov.w r1, #16384 ; 0x4000 8005b30: 486c ldr r0, [pc, #432] ; (8005ce4 ) 8005b32: f7fe fe53 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_RESET); 8005b36: 2200 movs r2, #0 8005b38: f44f 4100 mov.w r1, #32768 ; 0x8000 8005b3c: 4869 ldr r0, [pc, #420] ; (8005ce4 ) 8005b3e: f7fe fe4d bl 80047dc HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_RESET); 8005b42: 2200 movs r2, #0 8005b44: 2140 movs r1, #64 ; 0x40 8005b46: 4868 ldr r0, [pc, #416] ; (8005ce8 ) 8005b48: f7fe fe48 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_RESET); 8005b4c: 2200 movs r2, #0 8005b4e: 2180 movs r1, #128 ; 0x80 8005b50: 4865 ldr r0, [pc, #404] ; (8005ce8 ) 8005b52: f7fe fe43 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_RESET); 8005b56: 2200 movs r2, #0 8005b58: f44f 7180 mov.w r1, #256 ; 0x100 8005b5c: 4862 ldr r0, [pc, #392] ; (8005ce8 ) 8005b5e: f7fe fe3d bl 80047dc HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_RESET); 8005b62: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8005b64: f44f 7100 mov.w r1, #512 ; 0x200 8005b68: 485f ldr r0, [pc, #380] ; (8005ce8 ) 8005b6a: f7fe fe37 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_RESET); 8005b6e: 2200 movs r2, #0 HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); break; } } 8005b70: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 8005b74: f44f 7180 mov.w r1, #256 ; 0x100 8005b78: 485c ldr r0, [pc, #368] ; (8005cec ) 8005b7a: f7fe be2f b.w 80047dc HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005b7e: 2201 movs r2, #1 8005b80: f44f 5100 mov.w r1, #8192 ; 0x2000 8005b84: 4857 ldr r0, [pc, #348] ; (8005ce4 ) 8005b86: f7fe fe29 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005b8a: 2201 movs r2, #1 8005b8c: e7ce b.n 8005b2c HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005b8e: 2201 movs r2, #1 8005b90: f44f 5100 mov.w r1, #8192 ; 0x2000 8005b94: 4853 ldr r0, [pc, #332] ; (8005ce4 ) 8005b96: f7fe fe21 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005b9a: 2201 movs r2, #1 8005b9c: f44f 4180 mov.w r1, #16384 ; 0x4000 8005ba0: 4850 ldr r0, [pc, #320] ; (8005ce4 ) 8005ba2: f7fe fe1b bl 80047dc HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005ba6: 2201 movs r2, #1 8005ba8: e7c6 b.n 8005b38 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005baa: 2201 movs r2, #1 8005bac: f44f 5100 mov.w r1, #8192 ; 0x2000 8005bb0: 484c ldr r0, [pc, #304] ; (8005ce4 ) 8005bb2: f7fe fe13 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005bb6: 2201 movs r2, #1 8005bb8: f44f 4180 mov.w r1, #16384 ; 0x4000 8005bbc: 4849 ldr r0, [pc, #292] ; (8005ce4 ) 8005bbe: f7fe fe0d bl 80047dc HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005bc2: 2201 movs r2, #1 8005bc4: f44f 4100 mov.w r1, #32768 ; 0x8000 8005bc8: 4846 ldr r0, [pc, #280] ; (8005ce4 ) 8005bca: f7fe fe07 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8005bce: 2201 movs r2, #1 8005bd0: e7b8 b.n 8005b44 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005bd2: 2201 movs r2, #1 8005bd4: f44f 5100 mov.w r1, #8192 ; 0x2000 8005bd8: 4842 ldr r0, [pc, #264] ; (8005ce4 ) 8005bda: f7fe fdff bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005bde: 2201 movs r2, #1 8005be0: f44f 4180 mov.w r1, #16384 ; 0x4000 8005be4: 483f ldr r0, [pc, #252] ; (8005ce4 ) 8005be6: f7fe fdf9 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005bea: 2201 movs r2, #1 8005bec: f44f 4100 mov.w r1, #32768 ; 0x8000 8005bf0: 483c ldr r0, [pc, #240] ; (8005ce4 ) 8005bf2: f7fe fdf3 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8005bf6: 2201 movs r2, #1 8005bf8: 2140 movs r1, #64 ; 0x40 8005bfa: 483b ldr r0, [pc, #236] ; (8005ce8 ) 8005bfc: f7fe fdee bl 80047dc HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8005c00: 2201 movs r2, #1 8005c02: e7a4 b.n 8005b4e HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005c04: 2201 movs r2, #1 8005c06: f44f 5100 mov.w r1, #8192 ; 0x2000 8005c0a: 4836 ldr r0, [pc, #216] ; (8005ce4 ) 8005c0c: f7fe fde6 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005c10: 2201 movs r2, #1 8005c12: f44f 4180 mov.w r1, #16384 ; 0x4000 8005c16: 4833 ldr r0, [pc, #204] ; (8005ce4 ) 8005c18: f7fe fde0 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005c1c: 2201 movs r2, #1 8005c1e: f44f 4100 mov.w r1, #32768 ; 0x8000 8005c22: 4830 ldr r0, [pc, #192] ; (8005ce4 ) 8005c24: f7fe fdda bl 80047dc HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8005c28: 2201 movs r2, #1 8005c2a: 2140 movs r1, #64 ; 0x40 8005c2c: 482e ldr r0, [pc, #184] ; (8005ce8 ) 8005c2e: f7fe fdd5 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8005c32: 2201 movs r2, #1 8005c34: 2180 movs r1, #128 ; 0x80 8005c36: 482c ldr r0, [pc, #176] ; (8005ce8 ) 8005c38: f7fe fdd0 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8005c3c: 2201 movs r2, #1 8005c3e: e78b b.n 8005b58 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005c40: 2201 movs r2, #1 8005c42: f44f 5100 mov.w r1, #8192 ; 0x2000 8005c46: 4827 ldr r0, [pc, #156] ; (8005ce4 ) 8005c48: f7fe fdc8 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005c4c: 2201 movs r2, #1 8005c4e: f44f 4180 mov.w r1, #16384 ; 0x4000 8005c52: 4824 ldr r0, [pc, #144] ; (8005ce4 ) 8005c54: f7fe fdc2 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005c58: 2201 movs r2, #1 8005c5a: f44f 4100 mov.w r1, #32768 ; 0x8000 8005c5e: 4821 ldr r0, [pc, #132] ; (8005ce4 ) 8005c60: f7fe fdbc bl 80047dc HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8005c64: 2201 movs r2, #1 8005c66: 2140 movs r1, #64 ; 0x40 8005c68: 481f ldr r0, [pc, #124] ; (8005ce8 ) 8005c6a: f7fe fdb7 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8005c6e: 2201 movs r2, #1 8005c70: 2180 movs r1, #128 ; 0x80 8005c72: 481d ldr r0, [pc, #116] ; (8005ce8 ) 8005c74: f7fe fdb2 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8005c78: 2201 movs r2, #1 8005c7a: f44f 7180 mov.w r1, #256 ; 0x100 8005c7e: 481a ldr r0, [pc, #104] ; (8005ce8 ) 8005c80: f7fe fdac bl 80047dc HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8005c84: 2201 movs r2, #1 8005c86: e76d b.n 8005b64 HAL_GPIO_WritePin(SENSOR_EN1_GPIO_Port,SENSOR_EN1_Pin,GPIO_PIN_SET); 8005c88: 2201 movs r2, #1 8005c8a: f44f 5100 mov.w r1, #8192 ; 0x2000 8005c8e: 4815 ldr r0, [pc, #84] ; (8005ce4 ) 8005c90: f7fe fda4 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN2_GPIO_Port,SENSOR_EN2_Pin,GPIO_PIN_SET); 8005c94: 2201 movs r2, #1 8005c96: f44f 4180 mov.w r1, #16384 ; 0x4000 8005c9a: 4812 ldr r0, [pc, #72] ; (8005ce4 ) 8005c9c: f7fe fd9e bl 80047dc HAL_GPIO_WritePin(SENSOR_EN3_GPIO_Port,SENSOR_EN3_Pin,GPIO_PIN_SET); 8005ca0: 2201 movs r2, #1 8005ca2: f44f 4100 mov.w r1, #32768 ; 0x8000 8005ca6: 480f ldr r0, [pc, #60] ; (8005ce4 ) 8005ca8: f7fe fd98 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN4_GPIO_Port,SENSOR_EN4_Pin,GPIO_PIN_SET); 8005cac: 2201 movs r2, #1 8005cae: 2140 movs r1, #64 ; 0x40 8005cb0: 480d ldr r0, [pc, #52] ; (8005ce8 ) 8005cb2: f7fe fd93 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN5_GPIO_Port,SENSOR_EN5_Pin,GPIO_PIN_SET); 8005cb6: 2201 movs r2, #1 8005cb8: 2180 movs r1, #128 ; 0x80 8005cba: 480b ldr r0, [pc, #44] ; (8005ce8 ) 8005cbc: f7fe fd8e bl 80047dc HAL_GPIO_WritePin(SENSOR_EN6_GPIO_Port,SENSOR_EN6_Pin,GPIO_PIN_SET); 8005cc0: 2201 movs r2, #1 8005cc2: f44f 7180 mov.w r1, #256 ; 0x100 8005cc6: 4808 ldr r0, [pc, #32] ; (8005ce8 ) 8005cc8: f7fe fd88 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN7_GPIO_Port,SENSOR_EN7_Pin,GPIO_PIN_SET); 8005ccc: 2201 movs r2, #1 8005cce: f44f 7100 mov.w r1, #512 ; 0x200 8005cd2: 4805 ldr r0, [pc, #20] ; (8005ce8 ) 8005cd4: f7fe fd82 bl 80047dc HAL_GPIO_WritePin(SENSOR_EN8_GPIO_Port,SENSOR_EN8_Pin,GPIO_PIN_SET); 8005cd8: 2201 movs r2, #1 8005cda: e749 b.n 8005b70 8005cdc: bd10 pop {r4, pc} 8005cde: bf00 nop 8005ce0: 08007704 .word 0x08007704 8005ce4: 40010c00 .word 0x40010c00 8005ce8: 40011000 .word 0x40011000 8005cec: 40010800 .word 0x40010800 08005cf0 : #endif // PYJ.2019.03.20_END -- #define ADDR_FLASH_PAGE_TEST ((uint32_t)0x08030000) /* Base @ of Page 127, 1 Kbytes */ #define FLASH_USER_START_ADDR ADDR_FLASH_PAGE_TEST /* Start @ of user Flash area */ #define FLASH_USER_END_ADDR ADDR_FLASH_PAGE_TEST + ((uint32_t)0x0000FFFF) /* End @ of user Flash area */ void Flash_RGB_Data_Write(uint32_t Addr,uint8_t* data){ 8005cf0: b570 push {r4, r5, r6, lr} 8005cf2: 4604 mov r4, r0 uint16_t temp_Red = 0,temp_Green = 0,temp_Blue = 0; temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R temp_Green= ((data[blucell_green_H] << 8) |data[blucell_green_L]); //G 8005cf4: 798b ldrb r3, [r1, #6] 8005cf6: 79ce ldrb r6, [r1, #7] temp_Blue = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); //B 8005cf8: 7a4d ldrb r5, [r1, #9] temp_Green= ((data[blucell_green_H] << 8) |data[blucell_green_L]); //G 8005cfa: ea46 2603 orr.w r6, r6, r3, lsl #8 temp_Blue = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); //B 8005cfe: 7a0b ldrb r3, [r1, #8] temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R 8005d00: 794a ldrb r2, [r1, #5] temp_Blue = ((data[blucell_blue_H] << 8) |data[blucell_blue_L]); //B 8005d02: ea45 2503 orr.w r5, r5, r3, lsl #8 temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R 8005d06: 790b ldrb r3, [r1, #4] HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 , (uint16_t)temp_Red); 8005d08: 4601 mov r1, r0 temp_Red = ((data[blucell_red_H] << 8) |data[blucell_red_L]); //R 8005d0a: ea42 2203 orr.w r2, r2, r3, lsl #8 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 0 , (uint16_t)temp_Red); 8005d0e: 2001 movs r0, #1 8005d10: 2300 movs r3, #0 8005d12: f7fe fc31 bl 8004578 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 2 , (uint16_t)temp_Green); 8005d16: 4632 mov r2, r6 8005d18: 1ca1 adds r1, r4, #2 8005d1a: 2300 movs r3, #0 8005d1c: 2001 movs r0, #1 8005d1e: f7fe fc2b bl 8004578 HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 , (uint16_t)temp_Blue); 8005d22: 462a mov r2, r5 8005d24: 1d21 adds r1, r4, #4 8005d26: 2300 movs r3, #0 } 8005d28: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Addr + 4 , (uint16_t)temp_Blue); 8005d2c: 2001 movs r0, #1 8005d2e: f7fe bc23 b.w 8004578 ... 08005d34 : void Flash_write(uint8_t* data) // 쓰기함수 { 8005d34: b537 push {r0, r1, r2, r4, r5, lr} 8005d36: 4605 mov r5, r0 // EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; // EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; // EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; Address = START_ADDR; __HAL_RCC_TIM7_CLK_DISABLE(); // 매인타이머를 정지합니다 8005d38: 4c0f ldr r4, [pc, #60] ; (8005d78 ) 8005d3a: 69e3 ldr r3, [r4, #28] 8005d3c: f023 0320 bic.w r3, r3, #32 8005d40: 61e3 str r3, [r4, #28] HAL_FLASH_Unlock(); // lock 풀기 8005d42: f7fe fbd3 bl 80044ec 8005d46: 7aab ldrb r3, [r5, #10] case 8: Address += 42; break; } Flash_RGB_Data_Write(Address,&data[blucell_stx]); 8005d48: 4629 mov r1, r5 8005d4a: 3b02 subs r3, #2 8005d4c: b2db uxtb r3, r3 8005d4e: 2b06 cmp r3, #6 8005d50: bf96 itet ls 8005d52: 4a0a ldrls r2, [pc, #40] ; (8005d7c ) switch(data[blucell_dstid]){ 8005d54: 480a ldrhi r0, [pc, #40] ; (8005d80 ) 8005d56: f852 0023 ldrls.w r0, [r2, r3, lsl #2] Flash_RGB_Data_Write(Address,&data[blucell_stx]); 8005d5a: f7ff ffc9 bl 8005cf0 HAL_FLASH_Lock(); // lock 잠그기 8005d5e: f7fe fbd7 bl 8004510 __HAL_RCC_TIM7_CLK_ENABLE(); // 매인타이머를 재시작합니다 8005d62: 69e3 ldr r3, [r4, #28] 8005d64: f043 0320 orr.w r3, r3, #32 8005d68: 61e3 str r3, [r4, #28] 8005d6a: 69e3 ldr r3, [r4, #28] 8005d6c: f003 0320 and.w r3, r3, #32 8005d70: 9301 str r3, [sp, #4] 8005d72: 9b01 ldr r3, [sp, #4] } 8005d74: b003 add sp, #12 8005d76: bd30 pop {r4, r5, pc} 8005d78: 40021000 .word 0x40021000 8005d7c: 080076e8 .word 0x080076e8 8005d80: 08030000 .word 0x08030000 08005d84 : void Flash_InitRead(void) // 쓰기함수 { 8005d84: b530 push {r4, r5, lr} 8005d86: 480a ldr r0, [pc, #40] ; (8005db0 ) 8005d88: 490a ldr r1, [pc, #40] ; (8005db4 ) 8005d8a: 4a0b ldr r2, [pc, #44] ; (8005db8 ) 8005d8c: 4b0b ldr r3, [pc, #44] ; (8005dbc ) uint32_t Address = 0; Address = StartAddr; for(uint8_t i = 1; i <= 8; i++ ){ 8005d8e: 4c0c ldr r4, [pc, #48] ; (8005dc0 ) RGB_SensorRedLimit_Buf[i] = (*(uint16_t*)Address); 8005d90: f833 5c06 ldrh.w r5, [r3, #-6] 8005d94: 3306 adds r3, #6 8005d96: f820 5f02 strh.w r5, [r0, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorGreenLimit_Buf[i] = (*(uint16_t*)Address); 8005d9a: f833 5c0a ldrh.w r5, [r3, #-10] 8005d9e: f821 5f02 strh.w r5, [r1, #2]! // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 8005da2: f833 5c08 ldrh.w r5, [r3, #-8] for(uint8_t i = 1; i <= 8; i++ ){ 8005da6: 42a3 cmp r3, r4 RGB_SensorBlueLimit_Buf[i] = (*(uint16_t*)Address); 8005da8: f822 5f02 strh.w r5, [r2, #2]! for(uint8_t i = 1; i <= 8; i++ ){ 8005dac: d1f0 bne.n 8005d90 // printf("%08x : %04X \n",Address ,*(uint16_t*)Address); Address += 2; } } 8005dae: bd30 pop {r4, r5, pc} 8005db0: 200000b0 .word 0x200000b0 8005db4: 2000009e .word 0x2000009e 8005db8: 2000008c .word 0x2000008c 8005dbc: 08030006 .word 0x08030006 8005dc0: 08030036 .word 0x08030036 08005dc4 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8005dc4: b510 push {r4, lr} 8005dc6: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8005dc8: 2228 movs r2, #40 ; 0x28 8005dca: 2100 movs r1, #0 8005dcc: a806 add r0, sp, #24 8005dce: f000 fbf4 bl 80065ba RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8005dd2: 2100 movs r1, #0 8005dd4: 2214 movs r2, #20 8005dd6: a801 add r0, sp, #4 8005dd8: f000 fbef bl 80065ba */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8005ddc: 2402 movs r4, #2 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8005dde: 2201 movs r2, #1 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8005de0: f44f 3380 mov.w r3, #65536 ; 0x10000 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8005de4: a806 add r0, sp, #24 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8005de6: 9206 str r2, [sp, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8005de8: 9307 str r3, [sp, #28] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8005dea: 920a str r2, [sp, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8005dec: 930e str r3, [sp, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8005dee: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8005df0: f7fe fd7e bl 80048f0 { Error_Handler(); } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8005df4: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8005df6: 2100 movs r1, #0 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8005df8: 9301 str r3, [sp, #4] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8005dfa: f44f 6380 mov.w r3, #1024 ; 0x400 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8005dfe: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8005e00: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8005e02: 9103 str r1, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8005e04: 9304 str r3, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8005e06: 9105 str r1, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8005e08: f7fe ff3a bl 8004c80 { Error_Handler(); } } 8005e0c: b010 add sp, #64 ; 0x40 8005e0e: bd10 pop {r4, pc} 08005e10
: { 8005e10: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 8005e14: 2504 movs r5, #4 8005e16: 2701 movs r7, #1 8005e18: f04f 09be mov.w r9, #190 ; 0xbe 8005e1c: 4eb9 ldr r6, [pc, #740] ; (8006104 ) 8005e1e: f8df 835c ldr.w r8, [pc, #860] ; 800617c 8005e22: 7833 ldrb r3, [r6, #0] { 8005e24: b08d sub sp, #52 ; 0x34 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 8005e26: f88d 3013 strb.w r3, [sp, #19] 8005e2a: f898 3000 ldrb.w r3, [r8] 8005e2e: 4629 mov r1, r5 8005e30: f10d 0011 add.w r0, sp, #17 8005e34: f88d 9010 strb.w r9, [sp, #16] 8005e38: f88d 7011 strb.w r7, [sp, #17] 8005e3c: f88d 5012 strb.w r5, [sp, #18] 8005e40: f88d 3014 strb.w r3, [sp, #20] 8005e44: f000 f9c6 bl 80061d4 uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 8005e48: 2303 movs r3, #3 uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 8005e4a: 24eb movs r4, #235 ; 0xeb uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 8005e4c: f88d 3019 strb.w r3, [sp, #25] 8005e50: 7833 ldrb r3, [r6, #0] 8005e52: 4629 mov r1, r5 8005e54: f88d 301b strb.w r3, [sp, #27] 8005e58: f898 3000 ldrb.w r3, [r8] uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 8005e5c: f88d 0015 strb.w r0, [sp, #21] uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 8005e60: f10d 0019 add.w r0, sp, #25 8005e64: f88d 301c strb.w r3, [sp, #28] uint8_t StatusRequest_data[RGB_SensorDataRequest_Length] = {0xbe,RGB_Status_Data_Request,RGB_SensorDataRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&StatusRequest_data[blucell_type],StatusRequest_data[blucell_length]),0xeb}; 8005e68: f88d 4016 strb.w r4, [sp, #22] uint8_t IDAutoSetRequest_data[RGB_SensorIDAutoSetRequest_Length] = {0xbe,RGB_SensorID_SET,RGB_SensorIDAutoSetRequest_Length - 3,MyControllerID,SensorID,STH30_CreateCrc(&IDAutoSetRequest_data[blucell_type],IDAutoSetRequest_data[blucell_length]),0xeb}; 8005e6c: f88d 9018 strb.w r9, [sp, #24] 8005e70: f88d 501a strb.w r5, [sp, #26] 8005e74: f000 f9ae bl 80061d4 8005e78: f88d 401e strb.w r4, [sp, #30] 8005e7c: f88d 001d strb.w r0, [sp, #29] HAL_Init(); 8005e80: f7fe fa00 bl 8004284 SystemClock_Config(); 8005e84: f7ff ff9e bl 8005dc4 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8005e88: 2210 movs r2, #16 8005e8a: 2100 movs r1, #0 8005e8c: a808 add r0, sp, #32 8005e8e: f000 fb94 bl 80065ba /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8005e92: 4b9d ldr r3, [pc, #628] ; (8006108 ) __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8005e94: f649 71f0 movw r1, #40944 ; 0x9ff0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8005e98: 699a ldr r2, [r3, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8005e9a: 489c ldr r0, [pc, #624] ; (800610c ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8005e9c: f042 0210 orr.w r2, r2, #16 8005ea0: 619a str r2, [r3, #24] 8005ea2: 699a ldr r2, [r3, #24] LED_CH2_Pin LED_CH3_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin |SENSOR_EN5_Pin|SENSOR_EN6_Pin|SENSOR_EN7_Pin|LED_CH1_Pin |LED_CH2_Pin|LED_CH3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8005ea4: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8005ea6: f002 0210 and.w r2, r2, #16 8005eaa: 9200 str r2, [sp, #0] 8005eac: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOD_CLK_ENABLE(); 8005eae: 699a ldr r2, [r3, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8005eb0: 2602 movs r6, #2 __HAL_RCC_GPIOD_CLK_ENABLE(); 8005eb2: f042 0220 orr.w r2, r2, #32 8005eb6: 619a str r2, [r3, #24] 8005eb8: 699a ldr r2, [r3, #24] htim6.Instance = TIM6; 8005eba: f8df 92c4 ldr.w r9, [pc, #708] ; 8006180 __HAL_RCC_GPIOD_CLK_ENABLE(); 8005ebe: f002 0220 and.w r2, r2, #32 8005ec2: 9201 str r2, [sp, #4] 8005ec4: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8005ec6: 699a ldr r2, [r3, #24] huart1.Init.BaudRate = 115200; 8005ec8: f44f 3be1 mov.w fp, #115200 ; 0x1c200 __HAL_RCC_GPIOA_CLK_ENABLE(); 8005ecc: 432a orrs r2, r5 8005ece: 619a str r2, [r3, #24] 8005ed0: 699a ldr r2, [r3, #24] huart1.Init.Mode = UART_MODE_TX_RX; 8005ed2: f04f 0a0c mov.w sl, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 8005ed6: 402a ands r2, r5 8005ed8: 9202 str r2, [sp, #8] 8005eda: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8005edc: 699a ldr r2, [r3, #24] 8005ede: f042 0208 orr.w r2, r2, #8 8005ee2: 619a str r2, [r3, #24] 8005ee4: 699b ldr r3, [r3, #24] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8005ee6: 2200 movs r2, #0 __HAL_RCC_GPIOB_CLK_ENABLE(); 8005ee8: f003 0308 and.w r3, r3, #8 8005eec: 9303 str r3, [sp, #12] 8005eee: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8005ef0: f7fe fc74 bl 80047dc HAL_GPIO_WritePin(GPIOA, SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8005ef4: 2200 movs r2, #0 8005ef6: f44f 71f8 mov.w r1, #496 ; 0x1f0 8005efa: 4885 ldr r0, [pc, #532] ; (8006110 ) 8005efc: f7fe fc6e bl 80047dc HAL_GPIO_WritePin(GPIOB, SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8005f00: 2200 movs r2, #0 8005f02: f24f 31c1 movw r1, #62401 ; 0xf3c1 8005f06: 4883 ldr r0, [pc, #524] ; (8006114 ) 8005f08: f7fe fc68 bl 80047dc HAL_GPIO_WritePin(LED_CH4_GPIO_Port, LED_CH4_Pin, GPIO_PIN_RESET); 8005f0c: 2200 movs r2, #0 8005f0e: 4629 mov r1, r5 8005f10: 4881 ldr r0, [pc, #516] ; (8006118 ) 8005f12: f7fe fc63 bl 80047dc GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8005f16: f649 73f0 movw r3, #40944 ; 0x9ff0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8005f1a: a908 add r1, sp, #32 8005f1c: 487b ldr r0, [pc, #492] ; (800610c ) GPIO_InitStruct.Pin = BOOT_LED_Pin|SX1276_DIO4_Pin|SX1276_DIO5_Pin|SENSOR_EN4_Pin 8005f1e: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8005f20: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8005f22: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8005f24: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8005f26: f7fe fb6d bl 8004604 /*Configure GPIO pins : SX1276_DIO0_Pin SX1276_DIO1_Pin SX1276_DIO2_Pin SX1276_DIO3_Pin SENSOR_EN8_Pin */ GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8005f2a: f44f 73f8 mov.w r3, #496 ; 0x1f0 |SENSOR_EN8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8005f2e: a908 add r1, sp, #32 8005f30: 4877 ldr r0, [pc, #476] ; (8006110 ) GPIO_InitStruct.Pin = SX1276_DIO0_Pin|SX1276_DIO1_Pin|SX1276_DIO2_Pin|SX1276_DIO3_Pin 8005f32: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8005f34: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8005f36: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8005f38: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8005f3a: f7fe fb63 bl 8004604 /*Configure GPIO pins : SX1276_RESET_Pin LED_ALARM_Pin SENSOR_EN1_Pin SENSOR_EN2_Pin SENSOR_EN3_Pin LED_CH5_Pin LED_CH6_Pin LED_CH7_Pin LED_CH8_Pin */ GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8005f3e: f24f 33c1 movw r3, #62401 ; 0xf3c1 |SENSOR_EN3_Pin|LED_CH5_Pin|LED_CH6_Pin|LED_CH7_Pin |LED_CH8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8005f42: a908 add r1, sp, #32 8005f44: 4873 ldr r0, [pc, #460] ; (8006114 ) GPIO_InitStruct.Pin = SX1276_RESET_Pin|LED_ALARM_Pin|SENSOR_EN1_Pin|SENSOR_EN2_Pin 8005f46: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8005f48: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8005f4a: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8005f4c: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8005f4e: f7fe fb59 bl 8004604 /*Configure GPIO pin : LED_CH4_Pin */ GPIO_InitStruct.Pin = LED_CH4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 8005f52: a908 add r1, sp, #32 8005f54: 4870 ldr r0, [pc, #448] ; (8006118 ) GPIO_InitStruct.Pin = LED_CH4_Pin; 8005f56: 9508 str r5, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8005f58: 9709 str r7, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8005f5a: 960b str r6, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8005f5c: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(LED_CH4_GPIO_Port, &GPIO_InitStruct); 8005f5e: f7fe fb51 bl 8004604 htim6.Init.Prescaler = 1600-1; 8005f62: f240 633f movw r3, #1599 ; 0x63f 8005f66: 4a6d ldr r2, [pc, #436] ; (800611c ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8005f68: 4648 mov r0, r9 htim6.Init.Prescaler = 1600-1; 8005f6a: e889 000c stmia.w r9, {r2, r3} htim6.Init.Period = 10-1; 8005f6e: 2309 movs r3, #9 huart1.Instance = USART1; 8005f70: 4e6b ldr r6, [pc, #428] ; (8006120 ) htim6.Init.Period = 10-1; 8005f72: f8c9 300c str.w r3, [r9, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8005f76: 9408 str r4, [sp, #32] 8005f78: 9409 str r4, [sp, #36] ; 0x24 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8005f7a: f8c9 4008 str.w r4, [r9, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8005f7e: f8c9 4018 str.w r4, [r9, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8005f82: f7ff f887 bl 8005094 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8005f86: a908 add r1, sp, #32 8005f88: 4648 mov r0, r9 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8005f8a: 9408 str r4, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8005f8c: 9409 str r4, [sp, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8005f8e: f7ff f89b bl 80050c8 huart1.Init.BaudRate = 115200; 8005f92: 4b64 ldr r3, [pc, #400] ; (8006124 ) huart2.Instance = USART2; 8005f94: 4d64 ldr r5, [pc, #400] ; (8006128 ) if (HAL_UART_Init(&huart1) != HAL_OK) 8005f96: 4630 mov r0, r6 huart1.Init.BaudRate = 115200; 8005f98: e886 0808 stmia.w r6, {r3, fp} huart1.Init.WordLength = UART_WORDLENGTH_8B; 8005f9c: 60b4 str r4, [r6, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8005f9e: 60f4 str r4, [r6, #12] huart1.Init.Parity = UART_PARITY_NONE; 8005fa0: 6134 str r4, [r6, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8005fa2: f8c6 a014 str.w sl, [r6, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8005fa6: 61b4 str r4, [r6, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8005fa8: 61f4 str r4, [r6, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8005faa: f7ff f985 bl 80052b8 huart2.Instance = USART2; 8005fae: 4b5f ldr r3, [pc, #380] ; (800612c ) if (HAL_UART_Init(&huart2) != HAL_OK) 8005fb0: 4628 mov r0, r5 huart2.Init.BaudRate = 115200; 8005fb2: e885 0808 stmia.w r5, {r3, fp} huart2.Init.WordLength = UART_WORDLENGTH_8B; 8005fb6: 60ac str r4, [r5, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8005fb8: 60ec str r4, [r5, #12] huart2.Init.Parity = UART_PARITY_NONE; 8005fba: 612c str r4, [r5, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8005fbc: f8c5 a014 str.w sl, [r5, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8005fc0: 61ac str r4, [r5, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8005fc2: 61ec str r4, [r5, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8005fc4: f7ff f978 bl 80052b8 hspi1.Init.Mode = SPI_MODE_MASTER; 8005fc8: f44f 7382 mov.w r3, #260 ; 0x104 hspi1.Instance = SPI1; 8005fcc: 4858 ldr r0, [pc, #352] ; (8006130 ) hspi1.Init.Mode = SPI_MODE_MASTER; 8005fce: 4959 ldr r1, [pc, #356] ; (8006134 ) hspi1.Init.Direction = SPI_DIRECTION_2LINES; 8005fd0: 6084 str r4, [r0, #8] hspi1.Init.Mode = SPI_MODE_MASTER; 8005fd2: e880 000a stmia.w r0, {r1, r3} hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT; 8005fd6: f44f 2380 mov.w r3, #262144 ; 0x40000 8005fda: 6183 str r3, [r0, #24] hspi1.Init.CRCPolynomial = 10; 8005fdc: 230a movs r3, #10 hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 8005fde: 60c4 str r4, [r0, #12] hspi1.Init.CRCPolynomial = 10; 8005fe0: 62c3 str r3, [r0, #44] ; 0x2c hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; 8005fe2: 6104 str r4, [r0, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; 8005fe4: 6144 str r4, [r0, #20] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 8005fe6: 61c4 str r4, [r0, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 8005fe8: 6204 str r4, [r0, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 8005fea: 6244 str r4, [r0, #36] ; 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8005fec: 6284 str r4, [r0, #40] ; 0x28 if (HAL_SPI_Init(&hspi1) != HAL_OK) 8005fee: f7fe ff19 bl 8004e24 hi2c2.Init.ClockSpeed = 100000; 8005ff2: f8df e190 ldr.w lr, [pc, #400] ; 8006184 hi2c2.Instance = I2C2; 8005ff6: 4850 ldr r0, [pc, #320] ; (8006138 ) hi2c2.Init.ClockSpeed = 100000; 8005ff8: 4b50 ldr r3, [pc, #320] ; (800613c ) hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 8005ffa: 6084 str r4, [r0, #8] hi2c2.Init.ClockSpeed = 100000; 8005ffc: e880 4008 stmia.w r0, {r3, lr} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8006000: f44f 4380 mov.w r3, #16384 ; 0x4000 hi2c2.Init.OwnAddress1 = 0; 8006004: 60c4 str r4, [r0, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8006006: 6103 str r3, [r0, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8006008: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 800600a: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 800600c: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 800600e: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8006010: f7fe fbee bl 80047f0 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 8006014: 4622 mov r2, r4 8006016: 4621 mov r1, r4 8006018: 2026 movs r0, #38 ; 0x26 800601a: f7fe f97b bl 8004314 HAL_NVIC_EnableIRQ(USART2_IRQn); 800601e: 2026 movs r0, #38 ; 0x26 8006020: f7fe f9ac bl 800437c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8006024: 4622 mov r2, r4 8006026: 4621 mov r1, r4 8006028: 2025 movs r0, #37 ; 0x25 800602a: f7fe f973 bl 8004314 HAL_NVIC_EnableIRQ(USART1_IRQn); 800602e: 2025 movs r0, #37 ; 0x25 8006030: f7fe f9a4 bl 800437c HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8006034: 4622 mov r2, r4 8006036: 4621 mov r1, r4 8006038: 2036 movs r0, #54 ; 0x36 800603a: f7fe f96b bl 8004314 HAL_NVIC_EnableIRQ(TIM6_IRQn); 800603e: 2036 movs r0, #54 ; 0x36 8006040: f7fe f99c bl 800437c HAL_TIM_Base_Start_IT(&htim6); 8006044: 4648 mov r0, r9 8006046: f7fe ff28 bl 8004e9a HAL_UART_Receive_IT(&huart1, &rx1_data[0],1); 800604a: 463a mov r2, r7 800604c: 493c ldr r1, [pc, #240] ; (8006140 ) 800604e: 4630 mov r0, r6 8006050: f7ff f9bc bl 80053cc HAL_UART_Receive_IT(&huart2, &rx2_data[0],1); 8006054: 463a mov r2, r7 8006056: 493b ldr r1, [pc, #236] ; (8006144 ) 8006058: 4628 mov r0, r5 800605a: f7ff f9b7 bl 80053cc setbuf(stdout, NULL); // \n 을 적을 떄만 800605e: 4b3a ldr r3, [pc, #232] ; (8006148 ) 8006060: 4621 mov r1, r4 8006062: 681b ldr r3, [r3, #0] RGB_SensorIDAutoset = set; 8006064: 4d39 ldr r5, [pc, #228] ; (800614c ) setbuf(stdout, NULL); // \n 을 적을 떄만 8006066: 6898 ldr r0, [r3, #8] 8006068: f000 fb2c bl 80066c4 printf("****************************************\r\n"); 800606c: 4838 ldr r0, [pc, #224] ; (8006150 ) 800606e: f000 fb21 bl 80066b4 printf("RGB Project\r\n"); 8006072: 4838 ldr r0, [pc, #224] ; (8006154 ) 8006074: f000 fb1e bl 80066b4 printf("Build at %s %s\r\n", __DATE__, __TIME__); 8006078: 4a37 ldr r2, [pc, #220] ; (8006158 ) 800607a: 4938 ldr r1, [pc, #224] ; (800615c ) 800607c: 4838 ldr r0, [pc, #224] ; (8006160 ) 800607e: f000 faa5 bl 80065cc printf("Copyright (c) 2019. BLUECELL\r\n"); 8006082: 4838 ldr r0, [pc, #224] ; (8006164 ) 8006084: f000 fb16 bl 80066b4 printf("****************************************\r\n"); 8006088: 4831 ldr r0, [pc, #196] ; (8006150 ) 800608a: f000 fb13 bl 80066b4 RGB_SensorIDAutoset = set; 800608e: 702f strb r7, [r5, #0] Flash_InitRead(); 8006090: f7ff fe78 bl 8005d84 if(LedTimerCnt > 500){ 8006094: 4e34 ldr r6, [pc, #208] ; (8006168 ) HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 8006096: 4f1d ldr r7, [pc, #116] ; (800610c ) UartDataBufferCheck(); 8006098: f7ff fc8c bl 80059b4 if(UartDataRecvGet() >= 1 && UartTimerCnt > 100){ 800609c: f7ff fca0 bl 80059e0 80060a0: b140 cbz r0, 80060b4 80060a2: 4b32 ldr r3, [pc, #200] ; (800616c ) 80060a4: 681b ldr r3, [r3, #0] 80060a6: 2b64 cmp r3, #100 ; 0x64 80060a8: d904 bls.n 80060b4 Uart_dataCheck(USART1_CNT,&count_in1); 80060aa: 4931 ldr r1, [pc, #196] ; (8006170 ) 80060ac: 2000 movs r0, #0 80060ae: f7ff fcb7 bl 8005a20 80060b2: e7f1 b.n 8006098 if(LedTimerCnt > 500){ 80060b4: 6833 ldr r3, [r6, #0] 80060b6: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 80060ba: d9ed bls.n 8006098 if(RGB_SensorIDAutoGet() == 1){ 80060bc: 782b ldrb r3, [r5, #0] 80060be: 2b01 cmp r3, #1 80060c0: d170 bne.n 80061a4 if(SensorID == 0){memset(&SensorID_buf[0],0x00,8);SensorID_Cnt = 0;} 80060c2: f898 0000 ldrb.w r0, [r8] 80060c6: b920 cbnz r0, 80060d2 80060c8: 4b2a ldr r3, [pc, #168] ; (8006174 ) 80060ca: 6018 str r0, [r3, #0] 80060cc: 6058 str r0, [r3, #4] 80060ce: 4b2a ldr r3, [pc, #168] ; (8006178 ) 80060d0: 7018 strb r0, [r3, #0] IDAutoSetRequest_data[blucell_srcid + 1] = ++SensorID;//DST ID 80060d2: 3001 adds r0, #1 80060d4: b2c0 uxtb r0, r0 if(IDAutoSetRequest_data[blucell_srcid + 1] > 8){ 80060d6: 2808 cmp r0, #8 IDAutoSetRequest_data[blucell_srcid + 1] = ++SensorID;//DST ID 80060d8: f888 0000 strb.w r0, [r8] 80060dc: f88d 001c strb.w r0, [sp, #28] if(IDAutoSetRequest_data[blucell_srcid + 1] > 8){ 80060e0: d952 bls.n 8006188 RGB_SensorIDAutoset = set; 80060e2: f04f 0900 mov.w r9, #0 RGB_Sensor_PowerOnOff(0); 80060e6: 4648 mov r0, r9 RGB_SensorIDAutoset = set; 80060e8: f885 9000 strb.w r9, [r5] RGB_Sensor_PowerOnOff(0); 80060ec: f7ff fcfe bl 8005aec SensorID = 0; 80060f0: f888 9000 strb.w r9, [r8] HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 80060f4: f44f 4100 mov.w r1, #32768 ; 0x8000 80060f8: 4638 mov r0, r7 80060fa: f7fe fb74 bl 80047e6 LedTimerCnt = 0; 80060fe: 2300 movs r3, #0 8006100: 6033 str r3, [r6, #0] 8006102: e7c9 b.n 8006098 8006104: 200002a4 .word 0x200002a4 8006108: 40021000 .word 0x40021000 800610c: 40011000 .word 0x40011000 8006110: 40010800 .word 0x40010800 8006114: 40010c00 .word 0x40010c00 8006118: 40011400 .word 0x40011400 800611c: 40001000 .word 0x40001000 8006120: 20000338 .word 0x20000338 8006124: 40013800 .word 0x40013800 8006128: 20000410 .word 0x20000410 800612c: 40004400 .word 0x40004400 8006130: 200003b8 .word 0x200003b8 8006134: 40013000 .word 0x40013000 8006138: 200002e4 .word 0x200002e4 800613c: 40005800 .word 0x40005800 8006140: 200002e2 .word 0x200002e2 8006144: 200002e1 .word 0x200002e1 8006148: 2000000c .word 0x2000000c 800614c: 200002a5 .word 0x200002a5 8006150: 08007713 .word 0x08007713 8006154: 0800773d .word 0x0800773d 8006158: 0800774a .word 0x0800774a 800615c: 08007753 .word 0x08007753 8006160: 0800775f .word 0x0800775f 8006164: 08007770 .word 0x08007770 8006168: 200002a0 .word 0x200002a0 800616c: 200002a8 .word 0x200002a8 8006170: 2000029c .word 0x2000029c 8006174: 200000c3 .word 0x200000c3 8006178: 200000c2 .word 0x200000c2 800617c: 200002a6 .word 0x200002a6 8006180: 20000378 .word 0x20000378 8006184: 000186a0 .word 0x000186a0 RGB_Sensor_PowerOnOff(IDAutoSetRequest_data[4]); 8006188: f7ff fcb0 bl 8005aec HAL_Delay(500); 800618c: f44f 70fa mov.w r0, #500 ; 0x1f4 8006190: f7fe f89c bl 80042cc RGB_Controller_Func(&IDAutoSetRequest_data[blucell_stx]); 8006194: a806 add r0, sp, #24 8006196: f7ff fae1 bl 800575c HAL_Delay(500); 800619a: f44f 70fa mov.w r0, #500 ; 0x1f4 800619e: f7fe f895 bl 80042cc 80061a2: e7a7 b.n 80060f4 StatusRequest_data[blucell_srcid + 1] = SensorID_buf[temp_sensorid++]; 80061a4: 4b09 ldr r3, [pc, #36] ; (80061cc ) 80061a6: f104 0901 add.w r9, r4, #1 80061aa: 5d1b ldrb r3, [r3, r4] 80061ac: fa5f f989 uxtb.w r9, r9 80061b0: f88d 3014 strb.w r3, [sp, #20] if(temp_sensorid > (SensorID_Cnt)){ 80061b4: 4b06 ldr r3, [pc, #24] ; (80061d0 ) RGB_Controller_Func(&StatusRequest_data[blucell_stx]); 80061b6: a804 add r0, sp, #16 if(temp_sensorid > (SensorID_Cnt)){ 80061b8: 781b ldrb r3, [r3, #0] temp_sensorid = 0; 80061ba: 454b cmp r3, r9 80061bc: bf38 it cc 80061be: f04f 0900 movcc.w r9, #0 RGB_Controller_Func(&StatusRequest_data[blucell_stx]); 80061c2: f7ff facb bl 800575c 80061c6: 464c mov r4, r9 80061c8: e794 b.n 80060f4 80061ca: bf00 nop 80061cc: 200000c3 .word 0x200000c3 80061d0: 200000c2 .word 0x200000c2 080061d4 : 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 80061d4: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80061d6: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80061d8: 4604 mov r4, r0 80061da: 1a22 subs r2, r4, r0 80061dc: b2d2 uxtb r2, r2 80061de: 4291 cmp r1, r2 80061e0: d801 bhi.n 80061e6 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 80061e2: 4618 mov r0, r3 80061e4: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 80061e6: f814 2b01 ldrb.w r2, [r4], #1 80061ea: 4053 eors r3, r2 80061ec: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 80061ee: f013 0f80 tst.w r3, #128 ; 0x80 80061f2: f102 32ff add.w r2, r2, #4294967295 80061f6: ea4f 0343 mov.w r3, r3, lsl #1 80061fa: bf18 it ne 80061fc: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8006200: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8006204: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8006206: d1f2 bne.n 80061ee 8006208: e7e7 b.n 80061da 0800620a : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 800620a: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 800620c: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 800620e: 4605 mov r5, r0 8006210: 1a2c subs r4, r5, r0 8006212: b2e4 uxtb r4, r4 8006214: 42a1 cmp r1, r4 8006216: d803 bhi.n 8006220 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8006218: 1a9b subs r3, r3, r2 800621a: 4258 negs r0, r3 800621c: 4158 adcs r0, r3 800621e: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8006220: f815 4b01 ldrb.w r4, [r5], #1 8006224: 4063 eors r3, r4 8006226: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8006228: f013 0f80 tst.w r3, #128 ; 0x80 800622c: f104 34ff add.w r4, r4, #4294967295 8006230: ea4f 0343 mov.w r3, r3, lsl #1 8006234: bf18 it ne 8006236: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 800623a: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 800623e: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8006240: d1f2 bne.n 8006228 8006242: e7e5 b.n 8006210 08006244 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8006244: 4b0e ldr r3, [pc, #56] ; (8006280 ) { 8006246: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8006248: 699a ldr r2, [r3, #24] 800624a: f042 0201 orr.w r2, r2, #1 800624e: 619a str r2, [r3, #24] 8006250: 699a ldr r2, [r3, #24] 8006252: f002 0201 and.w r2, r2, #1 8006256: 9200 str r2, [sp, #0] 8006258: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 800625a: 69da ldr r2, [r3, #28] 800625c: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8006260: 61da str r2, [r3, #28] 8006262: 69db ldr r3, [r3, #28] /* System interrupt init*/ /**DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8006264: 4a07 ldr r2, [pc, #28] ; (8006284 ) __HAL_RCC_PWR_CLK_ENABLE(); 8006266: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800626a: 9301 str r3, [sp, #4] 800626c: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 800626e: 6853 ldr r3, [r2, #4] 8006270: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8006274: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8006278: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800627a: b002 add sp, #8 800627c: 4770 bx lr 800627e: bf00 nop 8006280: 40021000 .word 0x40021000 8006284: 40010000 .word 0x40010000 08006288 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8006288: b510 push {r4, lr} 800628a: 4604 mov r4, r0 800628c: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800628e: 2210 movs r2, #16 8006290: 2100 movs r1, #0 8006292: a802 add r0, sp, #8 8006294: f000 f991 bl 80065ba if(hi2c->Instance==I2C2) 8006298: 6822 ldr r2, [r4, #0] 800629a: 4b11 ldr r3, [pc, #68] ; (80062e0 ) 800629c: 429a cmp r2, r3 800629e: d11d bne.n 80062dc { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 80062a0: 4c10 ldr r4, [pc, #64] ; (80062e4 ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80062a2: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 80062a4: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80062a6: 4810 ldr r0, [pc, #64] ; (80062e8 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 80062a8: f043 0308 orr.w r3, r3, #8 80062ac: 61a3 str r3, [r4, #24] 80062ae: 69a3 ldr r3, [r4, #24] 80062b0: f003 0308 and.w r3, r3, #8 80062b4: 9300 str r3, [sp, #0] 80062b6: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 80062b8: f44f 6340 mov.w r3, #3072 ; 0xc00 80062bc: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 80062be: 2312 movs r3, #18 80062c0: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80062c2: 2303 movs r3, #3 80062c4: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80062c6: f7fe f99d bl 8004604 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 80062ca: 69e3 ldr r3, [r4, #28] 80062cc: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 80062d0: 61e3 str r3, [r4, #28] 80062d2: 69e3 ldr r3, [r4, #28] 80062d4: f403 0380 and.w r3, r3, #4194304 ; 0x400000 80062d8: 9301 str r3, [sp, #4] 80062da: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 80062dc: b006 add sp, #24 80062de: bd10 pop {r4, pc} 80062e0: 40005800 .word 0x40005800 80062e4: 40021000 .word 0x40021000 80062e8: 40010c00 .word 0x40010c00 080062ec : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { 80062ec: b570 push {r4, r5, r6, lr} GPIO_InitTypeDef GPIO_InitStruct = {0}; 80062ee: 2410 movs r4, #16 { 80062f0: 4605 mov r5, r0 80062f2: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80062f4: 4622 mov r2, r4 80062f6: 2100 movs r1, #0 80062f8: eb0d 0004 add.w r0, sp, r4 80062fc: f000 f95d bl 80065ba if(hspi->Instance==SPI1) 8006300: 682a ldr r2, [r5, #0] 8006302: 4b23 ldr r3, [pc, #140] ; (8006390 ) 8006304: 429a cmp r2, r3 8006306: d141 bne.n 800638c { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); 8006308: f503 4360 add.w r3, r3, #57344 ; 0xe000 800630c: 699a ldr r2, [r3, #24] PB3 ------> SPI1_SCK PB4 ------> SPI1_MISO PB5 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800630e: 2602 movs r6, #2 __HAL_RCC_SPI1_CLK_ENABLE(); 8006310: f442 5280 orr.w r2, r2, #4096 ; 0x1000 8006314: 619a str r2, [r3, #24] 8006316: 699a ldr r2, [r3, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8006318: 2503 movs r5, #3 __HAL_RCC_SPI1_CLK_ENABLE(); 800631a: f402 5280 and.w r2, r2, #4096 ; 0x1000 800631e: 9201 str r2, [sp, #4] 8006320: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8006322: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006324: eb0d 0104 add.w r1, sp, r4 __HAL_RCC_GPIOA_CLK_ENABLE(); 8006328: f042 0204 orr.w r2, r2, #4 800632c: 619a str r2, [r3, #24] 800632e: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006330: 4818 ldr r0, [pc, #96] ; (8006394 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8006332: f002 0204 and.w r2, r2, #4 8006336: 9202 str r2, [sp, #8] 8006338: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 800633a: 699a ldr r2, [r3, #24] 800633c: f042 0208 orr.w r2, r2, #8 8006340: 619a str r2, [r3, #24] 8006342: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8006344: 9605 str r6, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 8006346: f003 0308 and.w r3, r3, #8 800634a: 9303 str r3, [sp, #12] 800634c: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_15; 800634e: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8006352: 9507 str r5, [sp, #28] GPIO_InitStruct.Pin = GPIO_PIN_15; 8006354: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006356: f7fe f955 bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_5; 800635a: 2328 movs r3, #40 ; 0x28 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800635c: eb0d 0104 add.w r1, sp, r4 8006360: 480d ldr r0, [pc, #52] ; (8006398 ) GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_5; 8006362: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8006364: 9605 str r6, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8006366: 9507 str r5, [sp, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8006368: f7fe f94c bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_4; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800636c: 2300 movs r3, #0 GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800636e: eb0d 0104 add.w r1, sp, r4 8006372: 4809 ldr r0, [pc, #36] ; (8006398 ) GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8006374: 9305 str r3, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8006376: 9306 str r3, [sp, #24] GPIO_InitStruct.Pin = GPIO_PIN_4; 8006378: 9404 str r4, [sp, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800637a: f7fe f943 bl 8004604 __HAL_AFIO_REMAP_SPI1_ENABLE(); 800637e: 4a07 ldr r2, [pc, #28] ; (800639c ) 8006380: 6853 ldr r3, [r2, #4] 8006382: f043 63e0 orr.w r3, r3, #117440512 ; 0x7000000 8006386: f043 0301 orr.w r3, r3, #1 800638a: 6053 str r3, [r2, #4] /* USER CODE BEGIN SPI1_MspInit 1 */ /* USER CODE END SPI1_MspInit 1 */ } } 800638c: b008 add sp, #32 800638e: bd70 pop {r4, r5, r6, pc} 8006390: 40013000 .word 0x40013000 8006394: 40010800 .word 0x40010800 8006398: 40010c00 .word 0x40010c00 800639c: 40010000 .word 0x40010000 080063a0 : * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 80063a0: 6802 ldr r2, [r0, #0] 80063a2: 4b08 ldr r3, [pc, #32] ; (80063c4 ) { 80063a4: b082 sub sp, #8 if(htim_base->Instance==TIM6) 80063a6: 429a cmp r2, r3 80063a8: d10a bne.n 80063c0 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80063aa: f503 3300 add.w r3, r3, #131072 ; 0x20000 80063ae: 69da ldr r2, [r3, #28] 80063b0: f042 0210 orr.w r2, r2, #16 80063b4: 61da str r2, [r3, #28] 80063b6: 69db ldr r3, [r3, #28] 80063b8: f003 0310 and.w r3, r3, #16 80063bc: 9301 str r3, [sp, #4] 80063be: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 80063c0: b002 add sp, #8 80063c2: 4770 bx lr 80063c4: 40001000 .word 0x40001000 080063c8 : * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80063c8: 2210 movs r2, #16 { 80063ca: b510 push {r4, lr} 80063cc: 4604 mov r4, r0 80063ce: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80063d0: eb0d 0002 add.w r0, sp, r2 80063d4: 2100 movs r1, #0 80063d6: f000 f8f0 bl 80065ba if(huart->Instance==USART1) 80063da: 6823 ldr r3, [r4, #0] 80063dc: 4a27 ldr r2, [pc, #156] ; (800647c ) 80063de: 4293 cmp r3, r2 80063e0: d129 bne.n 8006436 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 80063e2: 4b27 ldr r3, [pc, #156] ; (8006480 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80063e4: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 80063e6: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80063e8: 4826 ldr r0, [pc, #152] ; (8006484 ) __HAL_RCC_USART1_CLK_ENABLE(); 80063ea: f442 4280 orr.w r2, r2, #16384 ; 0x4000 80063ee: 619a str r2, [r3, #24] 80063f0: 699a ldr r2, [r3, #24] 80063f2: f402 4280 and.w r2, r2, #16384 ; 0x4000 80063f6: 9200 str r2, [sp, #0] 80063f8: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 80063fa: 699a ldr r2, [r3, #24] 80063fc: f042 0204 orr.w r2, r2, #4 8006400: 619a str r2, [r3, #24] 8006402: 699b ldr r3, [r3, #24] 8006404: f003 0304 and.w r3, r3, #4 8006408: 9301 str r3, [sp, #4] 800640a: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 800640c: f44f 7300 mov.w r3, #512 ; 0x200 8006410: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8006412: 2302 movs r3, #2 8006414: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8006416: 2303 movs r3, #3 8006418: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800641a: f7fe f8f3 bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_10; 800641e: f44f 6380 mov.w r3, #1024 ; 0x400 GPIO_InitStruct.Pin = GPIO_PIN_2; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); GPIO_InitStruct.Pin = GPIO_PIN_3; 8006422: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8006424: 2300 movs r3, #0 GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006426: a904 add r1, sp, #16 8006428: 4816 ldr r0, [pc, #88] ; (8006484 ) GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800642a: 9305 str r3, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800642c: 9306 str r3, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800642e: f7fe f8e9 bl 8004604 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8006432: b008 add sp, #32 8006434: bd10 pop {r4, pc} else if(huart->Instance==USART2) 8006436: 4a14 ldr r2, [pc, #80] ; (8006488 ) 8006438: 4293 cmp r3, r2 800643a: d1fa bne.n 8006432 __HAL_RCC_USART2_CLK_ENABLE(); 800643c: 4b10 ldr r3, [pc, #64] ; (8006480 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800643e: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 8006440: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006442: 4810 ldr r0, [pc, #64] ; (8006484 ) __HAL_RCC_USART2_CLK_ENABLE(); 8006444: f442 3200 orr.w r2, r2, #131072 ; 0x20000 8006448: 61da str r2, [r3, #28] 800644a: 69da ldr r2, [r3, #28] 800644c: f402 3200 and.w r2, r2, #131072 ; 0x20000 8006450: 9202 str r2, [sp, #8] 8006452: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8006454: 699a ldr r2, [r3, #24] 8006456: f042 0204 orr.w r2, r2, #4 800645a: 619a str r2, [r3, #24] 800645c: 699b ldr r3, [r3, #24] 800645e: f003 0304 and.w r3, r3, #4 8006462: 9303 str r3, [sp, #12] 8006464: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 8006466: 2304 movs r3, #4 8006468: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800646a: 2302 movs r3, #2 800646c: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800646e: 2303 movs r3, #3 8006470: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8006472: f7fe f8c7 bl 8004604 GPIO_InitStruct.Pin = GPIO_PIN_3; 8006476: 2308 movs r3, #8 8006478: e7d3 b.n 8006422 800647a: bf00 nop 800647c: 40013800 .word 0x40013800 8006480: 40021000 .word 0x40021000 8006484: 40010800 .word 0x40010800 8006488: 40004400 .word 0x40004400 0800648c : 800648c: 4770 bx lr 0800648e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 800648e: e7fe b.n 800648e 08006490 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8006490: e7fe b.n 8006490 08006492 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8006492: e7fe b.n 8006492 08006494 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8006494: e7fe b.n 8006494 08006496 : 8006496: 4770 bx lr 08006498 : 8006498: 4770 bx lr 0800649a : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 800649a: 4770 bx lr 0800649c : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800649c: f7fd bf04 b.w 80042a8 080064a0 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 80064a0: 4801 ldr r0, [pc, #4] ; (80064a8 ) 80064a2: f7fe bffb b.w 800549c 80064a6: bf00 nop 80064a8: 20000338 .word 0x20000338 080064ac : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 80064ac: 4801 ldr r0, [pc, #4] ; (80064b4 ) 80064ae: f7fe bff5 b.w 800549c 80064b2: bf00 nop 80064b4: 20000410 .word 0x20000410 080064b8 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 80064b8: 4801 ldr r0, [pc, #4] ; (80064c0 ) 80064ba: f7fe bcfd b.w 8004eb8 80064be: bf00 nop 80064c0: 20000378 .word 0x20000378 080064c4 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 80064c4: 4b0e ldr r3, [pc, #56] ; (8006500 ) 80064c6: 681a ldr r2, [r3, #0] 80064c8: f042 0201 orr.w r2, r2, #1 80064cc: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 80064ce: 6859 ldr r1, [r3, #4] 80064d0: 4a0c ldr r2, [pc, #48] ; (8006504 ) 80064d2: 400a ands r2, r1 80064d4: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 80064d6: 681a ldr r2, [r3, #0] 80064d8: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 80064dc: f422 3280 bic.w r2, r2, #65536 ; 0x10000 80064e0: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 80064e2: 681a ldr r2, [r3, #0] 80064e4: f422 2280 bic.w r2, r2, #262144 ; 0x40000 80064e8: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 80064ea: 685a ldr r2, [r3, #4] 80064ec: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80064f0: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80064f2: f44f 021f mov.w r2, #10420224 ; 0x9f0000 80064f6: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80064f8: 4a03 ldr r2, [pc, #12] ; (8006508 ) 80064fa: 4b04 ldr r3, [pc, #16] ; (800650c ) 80064fc: 609a str r2, [r3, #8] 80064fe: 4770 bx lr 8006500: 40021000 .word 0x40021000 8006504: f8ff0000 .word 0xf8ff0000 8006508: 08004000 .word 0x08004000 800650c: e000ed00 .word 0xe000ed00 08006510 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8006510: 2100 movs r1, #0 b LoopCopyDataInit 8006512: e003 b.n 800651c 08006514 : CopyDataInit: ldr r3, =_sidata 8006514: 4b0b ldr r3, [pc, #44] ; (8006544 ) ldr r3, [r3, r1] 8006516: 585b ldr r3, [r3, r1] str r3, [r0, r1] 8006518: 5043 str r3, [r0, r1] adds r1, r1, #4 800651a: 3104 adds r1, #4 0800651c : LoopCopyDataInit: ldr r0, =_sdata 800651c: 480a ldr r0, [pc, #40] ; (8006548 ) ldr r3, =_edata 800651e: 4b0b ldr r3, [pc, #44] ; (800654c ) adds r2, r0, r1 8006520: 1842 adds r2, r0, r1 cmp r2, r3 8006522: 429a cmp r2, r3 bcc CopyDataInit 8006524: d3f6 bcc.n 8006514 ldr r2, =_sbss 8006526: 4a0a ldr r2, [pc, #40] ; (8006550 ) b LoopFillZerobss 8006528: e002 b.n 8006530 0800652a : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 800652a: 2300 movs r3, #0 str r3, [r2], #4 800652c: f842 3b04 str.w r3, [r2], #4 08006530 : LoopFillZerobss: ldr r3, = _ebss 8006530: 4b08 ldr r3, [pc, #32] ; (8006554 ) cmp r2, r3 8006532: 429a cmp r2, r3 bcc FillZerobss 8006534: d3f9 bcc.n 800652a /* Call the clock system intitialization function.*/ bl SystemInit 8006536: f7ff ffc5 bl 80064c4 /* Call static constructors */ bl __libc_init_array 800653a: f000 f80f bl 800655c <__libc_init_array> /* Call the application's entry point.*/ bl main 800653e: f7ff fc67 bl 8005e10
bx lr 8006542: 4770 bx lr ldr r3, =_sidata 8006544: 08007848 .word 0x08007848 ldr r0, =_sdata 8006548: 20000000 .word 0x20000000 ldr r3, =_edata 800654c: 20000070 .word 0x20000070 ldr r2, =_sbss 8006550: 20000070 .word 0x20000070 ldr r3, = _ebss 8006554: 20000454 .word 0x20000454 08006558 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8006558: e7fe b.n 8006558 ... 0800655c <__libc_init_array>: 800655c: b570 push {r4, r5, r6, lr} 800655e: 2500 movs r5, #0 8006560: 4e0c ldr r6, [pc, #48] ; (8006594 <__libc_init_array+0x38>) 8006562: 4c0d ldr r4, [pc, #52] ; (8006598 <__libc_init_array+0x3c>) 8006564: 1ba4 subs r4, r4, r6 8006566: 10a4 asrs r4, r4, #2 8006568: 42a5 cmp r5, r4 800656a: d109 bne.n 8006580 <__libc_init_array+0x24> 800656c: f001 f88a bl 8007684 <_init> 8006570: 2500 movs r5, #0 8006572: 4e0a ldr r6, [pc, #40] ; (800659c <__libc_init_array+0x40>) 8006574: 4c0a ldr r4, [pc, #40] ; (80065a0 <__libc_init_array+0x44>) 8006576: 1ba4 subs r4, r4, r6 8006578: 10a4 asrs r4, r4, #2 800657a: 42a5 cmp r5, r4 800657c: d105 bne.n 800658a <__libc_init_array+0x2e> 800657e: bd70 pop {r4, r5, r6, pc} 8006580: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8006584: 4798 blx r3 8006586: 3501 adds r5, #1 8006588: e7ee b.n 8006568 <__libc_init_array+0xc> 800658a: f856 3025 ldr.w r3, [r6, r5, lsl #2] 800658e: 4798 blx r3 8006590: 3501 adds r5, #1 8006592: e7f2 b.n 800657a <__libc_init_array+0x1e> 8006594: 08007840 .word 0x08007840 8006598: 08007840 .word 0x08007840 800659c: 08007840 .word 0x08007840 80065a0: 08007844 .word 0x08007844 080065a4 : 80065a4: b510 push {r4, lr} 80065a6: 1e43 subs r3, r0, #1 80065a8: 440a add r2, r1 80065aa: 4291 cmp r1, r2 80065ac: d100 bne.n 80065b0 80065ae: bd10 pop {r4, pc} 80065b0: f811 4b01 ldrb.w r4, [r1], #1 80065b4: f803 4f01 strb.w r4, [r3, #1]! 80065b8: e7f7 b.n 80065aa 080065ba : 80065ba: 4603 mov r3, r0 80065bc: 4402 add r2, r0 80065be: 4293 cmp r3, r2 80065c0: d100 bne.n 80065c4 80065c2: 4770 bx lr 80065c4: f803 1b01 strb.w r1, [r3], #1 80065c8: e7f9 b.n 80065be ... 080065cc : 80065cc: b40f push {r0, r1, r2, r3} 80065ce: 4b0a ldr r3, [pc, #40] ; (80065f8 ) 80065d0: b513 push {r0, r1, r4, lr} 80065d2: 681c ldr r4, [r3, #0] 80065d4: b124 cbz r4, 80065e0 80065d6: 69a3 ldr r3, [r4, #24] 80065d8: b913 cbnz r3, 80065e0 80065da: 4620 mov r0, r4 80065dc: f000 fada bl 8006b94 <__sinit> 80065e0: ab05 add r3, sp, #20 80065e2: 9a04 ldr r2, [sp, #16] 80065e4: 68a1 ldr r1, [r4, #8] 80065e6: 4620 mov r0, r4 80065e8: 9301 str r3, [sp, #4] 80065ea: f000 fc9b bl 8006f24 <_vfiprintf_r> 80065ee: b002 add sp, #8 80065f0: e8bd 4010 ldmia.w sp!, {r4, lr} 80065f4: b004 add sp, #16 80065f6: 4770 bx lr 80065f8: 2000000c .word 0x2000000c 080065fc <_puts_r>: 80065fc: b570 push {r4, r5, r6, lr} 80065fe: 460e mov r6, r1 8006600: 4605 mov r5, r0 8006602: b118 cbz r0, 800660c <_puts_r+0x10> 8006604: 6983 ldr r3, [r0, #24] 8006606: b90b cbnz r3, 800660c <_puts_r+0x10> 8006608: f000 fac4 bl 8006b94 <__sinit> 800660c: 69ab ldr r3, [r5, #24] 800660e: 68ac ldr r4, [r5, #8] 8006610: b913 cbnz r3, 8006618 <_puts_r+0x1c> 8006612: 4628 mov r0, r5 8006614: f000 fabe bl 8006b94 <__sinit> 8006618: 4b23 ldr r3, [pc, #140] ; (80066a8 <_puts_r+0xac>) 800661a: 429c cmp r4, r3 800661c: d117 bne.n 800664e <_puts_r+0x52> 800661e: 686c ldr r4, [r5, #4] 8006620: 89a3 ldrh r3, [r4, #12] 8006622: 071b lsls r3, r3, #28 8006624: d51d bpl.n 8006662 <_puts_r+0x66> 8006626: 6923 ldr r3, [r4, #16] 8006628: b1db cbz r3, 8006662 <_puts_r+0x66> 800662a: 3e01 subs r6, #1 800662c: 68a3 ldr r3, [r4, #8] 800662e: f816 1f01 ldrb.w r1, [r6, #1]! 8006632: 3b01 subs r3, #1 8006634: 60a3 str r3, [r4, #8] 8006636: b9e9 cbnz r1, 8006674 <_puts_r+0x78> 8006638: 2b00 cmp r3, #0 800663a: da2e bge.n 800669a <_puts_r+0x9e> 800663c: 4622 mov r2, r4 800663e: 210a movs r1, #10 8006640: 4628 mov r0, r5 8006642: f000 f8f5 bl 8006830 <__swbuf_r> 8006646: 3001 adds r0, #1 8006648: d011 beq.n 800666e <_puts_r+0x72> 800664a: 200a movs r0, #10 800664c: bd70 pop {r4, r5, r6, pc} 800664e: 4b17 ldr r3, [pc, #92] ; (80066ac <_puts_r+0xb0>) 8006650: 429c cmp r4, r3 8006652: d101 bne.n 8006658 <_puts_r+0x5c> 8006654: 68ac ldr r4, [r5, #8] 8006656: e7e3 b.n 8006620 <_puts_r+0x24> 8006658: 4b15 ldr r3, [pc, #84] ; (80066b0 <_puts_r+0xb4>) 800665a: 429c cmp r4, r3 800665c: bf08 it eq 800665e: 68ec ldreq r4, [r5, #12] 8006660: e7de b.n 8006620 <_puts_r+0x24> 8006662: 4621 mov r1, r4 8006664: 4628 mov r0, r5 8006666: f000 f935 bl 80068d4 <__swsetup_r> 800666a: 2800 cmp r0, #0 800666c: d0dd beq.n 800662a <_puts_r+0x2e> 800666e: f04f 30ff mov.w r0, #4294967295 8006672: bd70 pop {r4, r5, r6, pc} 8006674: 2b00 cmp r3, #0 8006676: da04 bge.n 8006682 <_puts_r+0x86> 8006678: 69a2 ldr r2, [r4, #24] 800667a: 4293 cmp r3, r2 800667c: db06 blt.n 800668c <_puts_r+0x90> 800667e: 290a cmp r1, #10 8006680: d004 beq.n 800668c <_puts_r+0x90> 8006682: 6823 ldr r3, [r4, #0] 8006684: 1c5a adds r2, r3, #1 8006686: 6022 str r2, [r4, #0] 8006688: 7019 strb r1, [r3, #0] 800668a: e7cf b.n 800662c <_puts_r+0x30> 800668c: 4622 mov r2, r4 800668e: 4628 mov r0, r5 8006690: f000 f8ce bl 8006830 <__swbuf_r> 8006694: 3001 adds r0, #1 8006696: d1c9 bne.n 800662c <_puts_r+0x30> 8006698: e7e9 b.n 800666e <_puts_r+0x72> 800669a: 200a movs r0, #10 800669c: 6823 ldr r3, [r4, #0] 800669e: 1c5a adds r2, r3, #1 80066a0: 6022 str r2, [r4, #0] 80066a2: 7018 strb r0, [r3, #0] 80066a4: bd70 pop {r4, r5, r6, pc} 80066a6: bf00 nop 80066a8: 080077cc .word 0x080077cc 80066ac: 080077ec .word 0x080077ec 80066b0: 080077ac .word 0x080077ac 080066b4 : 80066b4: 4b02 ldr r3, [pc, #8] ; (80066c0 ) 80066b6: 4601 mov r1, r0 80066b8: 6818 ldr r0, [r3, #0] 80066ba: f7ff bf9f b.w 80065fc <_puts_r> 80066be: bf00 nop 80066c0: 2000000c .word 0x2000000c 080066c4 : 80066c4: 2900 cmp r1, #0 80066c6: f44f 6380 mov.w r3, #1024 ; 0x400 80066ca: bf0c ite eq 80066cc: 2202 moveq r2, #2 80066ce: 2200 movne r2, #0 80066d0: f000 b800 b.w 80066d4 080066d4 : 80066d4: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 80066d8: 461d mov r5, r3 80066da: 4b51 ldr r3, [pc, #324] ; (8006820 ) 80066dc: 4604 mov r4, r0 80066de: 681e ldr r6, [r3, #0] 80066e0: 460f mov r7, r1 80066e2: 4690 mov r8, r2 80066e4: b126 cbz r6, 80066f0 80066e6: 69b3 ldr r3, [r6, #24] 80066e8: b913 cbnz r3, 80066f0 80066ea: 4630 mov r0, r6 80066ec: f000 fa52 bl 8006b94 <__sinit> 80066f0: 4b4c ldr r3, [pc, #304] ; (8006824 ) 80066f2: 429c cmp r4, r3 80066f4: d152 bne.n 800679c 80066f6: 6874 ldr r4, [r6, #4] 80066f8: f1b8 0f02 cmp.w r8, #2 80066fc: d006 beq.n 800670c 80066fe: f1b8 0f01 cmp.w r8, #1 8006702: f200 8089 bhi.w 8006818 8006706: 2d00 cmp r5, #0 8006708: f2c0 8086 blt.w 8006818 800670c: 4621 mov r1, r4 800670e: 4630 mov r0, r6 8006710: f000 f9d6 bl 8006ac0 <_fflush_r> 8006714: 6b61 ldr r1, [r4, #52] ; 0x34 8006716: b141 cbz r1, 800672a 8006718: f104 0344 add.w r3, r4, #68 ; 0x44 800671c: 4299 cmp r1, r3 800671e: d002 beq.n 8006726 8006720: 4630 mov r0, r6 8006722: f000 fb2d bl 8006d80 <_free_r> 8006726: 2300 movs r3, #0 8006728: 6363 str r3, [r4, #52] ; 0x34 800672a: 2300 movs r3, #0 800672c: 61a3 str r3, [r4, #24] 800672e: 6063 str r3, [r4, #4] 8006730: 89a3 ldrh r3, [r4, #12] 8006732: 061b lsls r3, r3, #24 8006734: d503 bpl.n 800673e 8006736: 6921 ldr r1, [r4, #16] 8006738: 4630 mov r0, r6 800673a: f000 fb21 bl 8006d80 <_free_r> 800673e: 89a3 ldrh r3, [r4, #12] 8006740: f1b8 0f02 cmp.w r8, #2 8006744: f423 634a bic.w r3, r3, #3232 ; 0xca0 8006748: f023 0303 bic.w r3, r3, #3 800674c: 81a3 strh r3, [r4, #12] 800674e: d05d beq.n 800680c 8006750: ab01 add r3, sp, #4 8006752: 466a mov r2, sp 8006754: 4621 mov r1, r4 8006756: 4630 mov r0, r6 8006758: f000 faa6 bl 8006ca8 <__swhatbuf_r> 800675c: 89a3 ldrh r3, [r4, #12] 800675e: 4318 orrs r0, r3 8006760: 81a0 strh r0, [r4, #12] 8006762: bb2d cbnz r5, 80067b0 8006764: 9d00 ldr r5, [sp, #0] 8006766: 4628 mov r0, r5 8006768: f000 fb02 bl 8006d70 800676c: 4607 mov r7, r0 800676e: 2800 cmp r0, #0 8006770: d14e bne.n 8006810 8006772: f8dd 9000 ldr.w r9, [sp] 8006776: 45a9 cmp r9, r5 8006778: d13c bne.n 80067f4 800677a: f04f 30ff mov.w r0, #4294967295 800677e: 89a3 ldrh r3, [r4, #12] 8006780: f043 0302 orr.w r3, r3, #2 8006784: 81a3 strh r3, [r4, #12] 8006786: 2300 movs r3, #0 8006788: 60a3 str r3, [r4, #8] 800678a: f104 0347 add.w r3, r4, #71 ; 0x47 800678e: 6023 str r3, [r4, #0] 8006790: 6123 str r3, [r4, #16] 8006792: 2301 movs r3, #1 8006794: 6163 str r3, [r4, #20] 8006796: b003 add sp, #12 8006798: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 800679c: 4b22 ldr r3, [pc, #136] ; (8006828 ) 800679e: 429c cmp r4, r3 80067a0: d101 bne.n 80067a6 80067a2: 68b4 ldr r4, [r6, #8] 80067a4: e7a8 b.n 80066f8 80067a6: 4b21 ldr r3, [pc, #132] ; (800682c ) 80067a8: 429c cmp r4, r3 80067aa: bf08 it eq 80067ac: 68f4 ldreq r4, [r6, #12] 80067ae: e7a3 b.n 80066f8 80067b0: 2f00 cmp r7, #0 80067b2: d0d8 beq.n 8006766 80067b4: 69b3 ldr r3, [r6, #24] 80067b6: b913 cbnz r3, 80067be 80067b8: 4630 mov r0, r6 80067ba: f000 f9eb bl 8006b94 <__sinit> 80067be: f1b8 0f01 cmp.w r8, #1 80067c2: bf08 it eq 80067c4: 89a3 ldrheq r3, [r4, #12] 80067c6: 6027 str r7, [r4, #0] 80067c8: bf04 itt eq 80067ca: f043 0301 orreq.w r3, r3, #1 80067ce: 81a3 strheq r3, [r4, #12] 80067d0: 89a3 ldrh r3, [r4, #12] 80067d2: 6127 str r7, [r4, #16] 80067d4: f013 0008 ands.w r0, r3, #8 80067d8: 6165 str r5, [r4, #20] 80067da: d01b beq.n 8006814 80067dc: f013 0001 ands.w r0, r3, #1 80067e0: f04f 0300 mov.w r3, #0 80067e4: bf1f itttt ne 80067e6: 426d negne r5, r5 80067e8: 60a3 strne r3, [r4, #8] 80067ea: 61a5 strne r5, [r4, #24] 80067ec: 4618 movne r0, r3 80067ee: bf08 it eq 80067f0: 60a5 streq r5, [r4, #8] 80067f2: e7d0 b.n 8006796 80067f4: 4648 mov r0, r9 80067f6: f000 fabb bl 8006d70 80067fa: 4607 mov r7, r0 80067fc: 2800 cmp r0, #0 80067fe: d0bc beq.n 800677a 8006800: 89a3 ldrh r3, [r4, #12] 8006802: 464d mov r5, r9 8006804: f043 0380 orr.w r3, r3, #128 ; 0x80 8006808: 81a3 strh r3, [r4, #12] 800680a: e7d3 b.n 80067b4 800680c: 2000 movs r0, #0 800680e: e7b6 b.n 800677e 8006810: 46a9 mov r9, r5 8006812: e7f5 b.n 8006800 8006814: 60a0 str r0, [r4, #8] 8006816: e7be b.n 8006796 8006818: f04f 30ff mov.w r0, #4294967295 800681c: e7bb b.n 8006796 800681e: bf00 nop 8006820: 2000000c .word 0x2000000c 8006824: 080077cc .word 0x080077cc 8006828: 080077ec .word 0x080077ec 800682c: 080077ac .word 0x080077ac 08006830 <__swbuf_r>: 8006830: b5f8 push {r3, r4, r5, r6, r7, lr} 8006832: 460e mov r6, r1 8006834: 4614 mov r4, r2 8006836: 4605 mov r5, r0 8006838: b118 cbz r0, 8006842 <__swbuf_r+0x12> 800683a: 6983 ldr r3, [r0, #24] 800683c: b90b cbnz r3, 8006842 <__swbuf_r+0x12> 800683e: f000 f9a9 bl 8006b94 <__sinit> 8006842: 4b21 ldr r3, [pc, #132] ; (80068c8 <__swbuf_r+0x98>) 8006844: 429c cmp r4, r3 8006846: d12a bne.n 800689e <__swbuf_r+0x6e> 8006848: 686c ldr r4, [r5, #4] 800684a: 69a3 ldr r3, [r4, #24] 800684c: 60a3 str r3, [r4, #8] 800684e: 89a3 ldrh r3, [r4, #12] 8006850: 071a lsls r2, r3, #28 8006852: d52e bpl.n 80068b2 <__swbuf_r+0x82> 8006854: 6923 ldr r3, [r4, #16] 8006856: b363 cbz r3, 80068b2 <__swbuf_r+0x82> 8006858: 6923 ldr r3, [r4, #16] 800685a: 6820 ldr r0, [r4, #0] 800685c: b2f6 uxtb r6, r6 800685e: 1ac0 subs r0, r0, r3 8006860: 6963 ldr r3, [r4, #20] 8006862: 4637 mov r7, r6 8006864: 4298 cmp r0, r3 8006866: db04 blt.n 8006872 <__swbuf_r+0x42> 8006868: 4621 mov r1, r4 800686a: 4628 mov r0, r5 800686c: f000 f928 bl 8006ac0 <_fflush_r> 8006870: bb28 cbnz r0, 80068be <__swbuf_r+0x8e> 8006872: 68a3 ldr r3, [r4, #8] 8006874: 3001 adds r0, #1 8006876: 3b01 subs r3, #1 8006878: 60a3 str r3, [r4, #8] 800687a: 6823 ldr r3, [r4, #0] 800687c: 1c5a adds r2, r3, #1 800687e: 6022 str r2, [r4, #0] 8006880: 701e strb r6, [r3, #0] 8006882: 6963 ldr r3, [r4, #20] 8006884: 4298 cmp r0, r3 8006886: d004 beq.n 8006892 <__swbuf_r+0x62> 8006888: 89a3 ldrh r3, [r4, #12] 800688a: 07db lsls r3, r3, #31 800688c: d519 bpl.n 80068c2 <__swbuf_r+0x92> 800688e: 2e0a cmp r6, #10 8006890: d117 bne.n 80068c2 <__swbuf_r+0x92> 8006892: 4621 mov r1, r4 8006894: 4628 mov r0, r5 8006896: f000 f913 bl 8006ac0 <_fflush_r> 800689a: b190 cbz r0, 80068c2 <__swbuf_r+0x92> 800689c: e00f b.n 80068be <__swbuf_r+0x8e> 800689e: 4b0b ldr r3, [pc, #44] ; (80068cc <__swbuf_r+0x9c>) 80068a0: 429c cmp r4, r3 80068a2: d101 bne.n 80068a8 <__swbuf_r+0x78> 80068a4: 68ac ldr r4, [r5, #8] 80068a6: e7d0 b.n 800684a <__swbuf_r+0x1a> 80068a8: 4b09 ldr r3, [pc, #36] ; (80068d0 <__swbuf_r+0xa0>) 80068aa: 429c cmp r4, r3 80068ac: bf08 it eq 80068ae: 68ec ldreq r4, [r5, #12] 80068b0: e7cb b.n 800684a <__swbuf_r+0x1a> 80068b2: 4621 mov r1, r4 80068b4: 4628 mov r0, r5 80068b6: f000 f80d bl 80068d4 <__swsetup_r> 80068ba: 2800 cmp r0, #0 80068bc: d0cc beq.n 8006858 <__swbuf_r+0x28> 80068be: f04f 37ff mov.w r7, #4294967295 80068c2: 4638 mov r0, r7 80068c4: bdf8 pop {r3, r4, r5, r6, r7, pc} 80068c6: bf00 nop 80068c8: 080077cc .word 0x080077cc 80068cc: 080077ec .word 0x080077ec 80068d0: 080077ac .word 0x080077ac 080068d4 <__swsetup_r>: 80068d4: 4b32 ldr r3, [pc, #200] ; (80069a0 <__swsetup_r+0xcc>) 80068d6: b570 push {r4, r5, r6, lr} 80068d8: 681d ldr r5, [r3, #0] 80068da: 4606 mov r6, r0 80068dc: 460c mov r4, r1 80068de: b125 cbz r5, 80068ea <__swsetup_r+0x16> 80068e0: 69ab ldr r3, [r5, #24] 80068e2: b913 cbnz r3, 80068ea <__swsetup_r+0x16> 80068e4: 4628 mov r0, r5 80068e6: f000 f955 bl 8006b94 <__sinit> 80068ea: 4b2e ldr r3, [pc, #184] ; (80069a4 <__swsetup_r+0xd0>) 80068ec: 429c cmp r4, r3 80068ee: d10f bne.n 8006910 <__swsetup_r+0x3c> 80068f0: 686c ldr r4, [r5, #4] 80068f2: f9b4 300c ldrsh.w r3, [r4, #12] 80068f6: b29a uxth r2, r3 80068f8: 0715 lsls r5, r2, #28 80068fa: d42c bmi.n 8006956 <__swsetup_r+0x82> 80068fc: 06d0 lsls r0, r2, #27 80068fe: d411 bmi.n 8006924 <__swsetup_r+0x50> 8006900: 2209 movs r2, #9 8006902: 6032 str r2, [r6, #0] 8006904: f043 0340 orr.w r3, r3, #64 ; 0x40 8006908: 81a3 strh r3, [r4, #12] 800690a: f04f 30ff mov.w r0, #4294967295 800690e: bd70 pop {r4, r5, r6, pc} 8006910: 4b25 ldr r3, [pc, #148] ; (80069a8 <__swsetup_r+0xd4>) 8006912: 429c cmp r4, r3 8006914: d101 bne.n 800691a <__swsetup_r+0x46> 8006916: 68ac ldr r4, [r5, #8] 8006918: e7eb b.n 80068f2 <__swsetup_r+0x1e> 800691a: 4b24 ldr r3, [pc, #144] ; (80069ac <__swsetup_r+0xd8>) 800691c: 429c cmp r4, r3 800691e: bf08 it eq 8006920: 68ec ldreq r4, [r5, #12] 8006922: e7e6 b.n 80068f2 <__swsetup_r+0x1e> 8006924: 0751 lsls r1, r2, #29 8006926: d512 bpl.n 800694e <__swsetup_r+0x7a> 8006928: 6b61 ldr r1, [r4, #52] ; 0x34 800692a: b141 cbz r1, 800693e <__swsetup_r+0x6a> 800692c: f104 0344 add.w r3, r4, #68 ; 0x44 8006930: 4299 cmp r1, r3 8006932: d002 beq.n 800693a <__swsetup_r+0x66> 8006934: 4630 mov r0, r6 8006936: f000 fa23 bl 8006d80 <_free_r> 800693a: 2300 movs r3, #0 800693c: 6363 str r3, [r4, #52] ; 0x34 800693e: 89a3 ldrh r3, [r4, #12] 8006940: f023 0324 bic.w r3, r3, #36 ; 0x24 8006944: 81a3 strh r3, [r4, #12] 8006946: 2300 movs r3, #0 8006948: 6063 str r3, [r4, #4] 800694a: 6923 ldr r3, [r4, #16] 800694c: 6023 str r3, [r4, #0] 800694e: 89a3 ldrh r3, [r4, #12] 8006950: f043 0308 orr.w r3, r3, #8 8006954: 81a3 strh r3, [r4, #12] 8006956: 6923 ldr r3, [r4, #16] 8006958: b94b cbnz r3, 800696e <__swsetup_r+0x9a> 800695a: 89a3 ldrh r3, [r4, #12] 800695c: f403 7320 and.w r3, r3, #640 ; 0x280 8006960: f5b3 7f00 cmp.w r3, #512 ; 0x200 8006964: d003 beq.n 800696e <__swsetup_r+0x9a> 8006966: 4621 mov r1, r4 8006968: 4630 mov r0, r6 800696a: f000 f9c1 bl 8006cf0 <__smakebuf_r> 800696e: 89a2 ldrh r2, [r4, #12] 8006970: f012 0301 ands.w r3, r2, #1 8006974: d00c beq.n 8006990 <__swsetup_r+0xbc> 8006976: 2300 movs r3, #0 8006978: 60a3 str r3, [r4, #8] 800697a: 6963 ldr r3, [r4, #20] 800697c: 425b negs r3, r3 800697e: 61a3 str r3, [r4, #24] 8006980: 6923 ldr r3, [r4, #16] 8006982: b953 cbnz r3, 800699a <__swsetup_r+0xc6> 8006984: f9b4 300c ldrsh.w r3, [r4, #12] 8006988: f013 0080 ands.w r0, r3, #128 ; 0x80 800698c: d1ba bne.n 8006904 <__swsetup_r+0x30> 800698e: bd70 pop {r4, r5, r6, pc} 8006990: 0792 lsls r2, r2, #30 8006992: bf58 it pl 8006994: 6963 ldrpl r3, [r4, #20] 8006996: 60a3 str r3, [r4, #8] 8006998: e7f2 b.n 8006980 <__swsetup_r+0xac> 800699a: 2000 movs r0, #0 800699c: e7f7 b.n 800698e <__swsetup_r+0xba> 800699e: bf00 nop 80069a0: 2000000c .word 0x2000000c 80069a4: 080077cc .word 0x080077cc 80069a8: 080077ec .word 0x080077ec 80069ac: 080077ac .word 0x080077ac 080069b0 <__sflush_r>: 80069b0: 898a ldrh r2, [r1, #12] 80069b2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80069b6: 4605 mov r5, r0 80069b8: 0710 lsls r0, r2, #28 80069ba: 460c mov r4, r1 80069bc: d45a bmi.n 8006a74 <__sflush_r+0xc4> 80069be: 684b ldr r3, [r1, #4] 80069c0: 2b00 cmp r3, #0 80069c2: dc05 bgt.n 80069d0 <__sflush_r+0x20> 80069c4: 6c0b ldr r3, [r1, #64] ; 0x40 80069c6: 2b00 cmp r3, #0 80069c8: dc02 bgt.n 80069d0 <__sflush_r+0x20> 80069ca: 2000 movs r0, #0 80069cc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80069d0: 6ae6 ldr r6, [r4, #44] ; 0x2c 80069d2: 2e00 cmp r6, #0 80069d4: d0f9 beq.n 80069ca <__sflush_r+0x1a> 80069d6: 2300 movs r3, #0 80069d8: f412 5280 ands.w r2, r2, #4096 ; 0x1000 80069dc: 682f ldr r7, [r5, #0] 80069de: 602b str r3, [r5, #0] 80069e0: d033 beq.n 8006a4a <__sflush_r+0x9a> 80069e2: 6d60 ldr r0, [r4, #84] ; 0x54 80069e4: 89a3 ldrh r3, [r4, #12] 80069e6: 075a lsls r2, r3, #29 80069e8: d505 bpl.n 80069f6 <__sflush_r+0x46> 80069ea: 6863 ldr r3, [r4, #4] 80069ec: 1ac0 subs r0, r0, r3 80069ee: 6b63 ldr r3, [r4, #52] ; 0x34 80069f0: b10b cbz r3, 80069f6 <__sflush_r+0x46> 80069f2: 6c23 ldr r3, [r4, #64] ; 0x40 80069f4: 1ac0 subs r0, r0, r3 80069f6: 2300 movs r3, #0 80069f8: 4602 mov r2, r0 80069fa: 6ae6 ldr r6, [r4, #44] ; 0x2c 80069fc: 6a21 ldr r1, [r4, #32] 80069fe: 4628 mov r0, r5 8006a00: 47b0 blx r6 8006a02: 1c43 adds r3, r0, #1 8006a04: 89a3 ldrh r3, [r4, #12] 8006a06: d106 bne.n 8006a16 <__sflush_r+0x66> 8006a08: 6829 ldr r1, [r5, #0] 8006a0a: 291d cmp r1, #29 8006a0c: d84b bhi.n 8006aa6 <__sflush_r+0xf6> 8006a0e: 4a2b ldr r2, [pc, #172] ; (8006abc <__sflush_r+0x10c>) 8006a10: 40ca lsrs r2, r1 8006a12: 07d6 lsls r6, r2, #31 8006a14: d547 bpl.n 8006aa6 <__sflush_r+0xf6> 8006a16: 2200 movs r2, #0 8006a18: 6062 str r2, [r4, #4] 8006a1a: 6922 ldr r2, [r4, #16] 8006a1c: 04d9 lsls r1, r3, #19 8006a1e: 6022 str r2, [r4, #0] 8006a20: d504 bpl.n 8006a2c <__sflush_r+0x7c> 8006a22: 1c42 adds r2, r0, #1 8006a24: d101 bne.n 8006a2a <__sflush_r+0x7a> 8006a26: 682b ldr r3, [r5, #0] 8006a28: b903 cbnz r3, 8006a2c <__sflush_r+0x7c> 8006a2a: 6560 str r0, [r4, #84] ; 0x54 8006a2c: 6b61 ldr r1, [r4, #52] ; 0x34 8006a2e: 602f str r7, [r5, #0] 8006a30: 2900 cmp r1, #0 8006a32: d0ca beq.n 80069ca <__sflush_r+0x1a> 8006a34: f104 0344 add.w r3, r4, #68 ; 0x44 8006a38: 4299 cmp r1, r3 8006a3a: d002 beq.n 8006a42 <__sflush_r+0x92> 8006a3c: 4628 mov r0, r5 8006a3e: f000 f99f bl 8006d80 <_free_r> 8006a42: 2000 movs r0, #0 8006a44: 6360 str r0, [r4, #52] ; 0x34 8006a46: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006a4a: 6a21 ldr r1, [r4, #32] 8006a4c: 2301 movs r3, #1 8006a4e: 4628 mov r0, r5 8006a50: 47b0 blx r6 8006a52: 1c41 adds r1, r0, #1 8006a54: d1c6 bne.n 80069e4 <__sflush_r+0x34> 8006a56: 682b ldr r3, [r5, #0] 8006a58: 2b00 cmp r3, #0 8006a5a: d0c3 beq.n 80069e4 <__sflush_r+0x34> 8006a5c: 2b1d cmp r3, #29 8006a5e: d001 beq.n 8006a64 <__sflush_r+0xb4> 8006a60: 2b16 cmp r3, #22 8006a62: d101 bne.n 8006a68 <__sflush_r+0xb8> 8006a64: 602f str r7, [r5, #0] 8006a66: e7b0 b.n 80069ca <__sflush_r+0x1a> 8006a68: 89a3 ldrh r3, [r4, #12] 8006a6a: f043 0340 orr.w r3, r3, #64 ; 0x40 8006a6e: 81a3 strh r3, [r4, #12] 8006a70: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006a74: 690f ldr r7, [r1, #16] 8006a76: 2f00 cmp r7, #0 8006a78: d0a7 beq.n 80069ca <__sflush_r+0x1a> 8006a7a: 0793 lsls r3, r2, #30 8006a7c: bf18 it ne 8006a7e: 2300 movne r3, #0 8006a80: 680e ldr r6, [r1, #0] 8006a82: bf08 it eq 8006a84: 694b ldreq r3, [r1, #20] 8006a86: eba6 0807 sub.w r8, r6, r7 8006a8a: 600f str r7, [r1, #0] 8006a8c: 608b str r3, [r1, #8] 8006a8e: f1b8 0f00 cmp.w r8, #0 8006a92: dd9a ble.n 80069ca <__sflush_r+0x1a> 8006a94: 4643 mov r3, r8 8006a96: 463a mov r2, r7 8006a98: 6a21 ldr r1, [r4, #32] 8006a9a: 4628 mov r0, r5 8006a9c: 6aa6 ldr r6, [r4, #40] ; 0x28 8006a9e: 47b0 blx r6 8006aa0: 2800 cmp r0, #0 8006aa2: dc07 bgt.n 8006ab4 <__sflush_r+0x104> 8006aa4: 89a3 ldrh r3, [r4, #12] 8006aa6: f043 0340 orr.w r3, r3, #64 ; 0x40 8006aaa: 81a3 strh r3, [r4, #12] 8006aac: f04f 30ff mov.w r0, #4294967295 8006ab0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006ab4: 4407 add r7, r0 8006ab6: eba8 0800 sub.w r8, r8, r0 8006aba: e7e8 b.n 8006a8e <__sflush_r+0xde> 8006abc: 20400001 .word 0x20400001 08006ac0 <_fflush_r>: 8006ac0: b538 push {r3, r4, r5, lr} 8006ac2: 690b ldr r3, [r1, #16] 8006ac4: 4605 mov r5, r0 8006ac6: 460c mov r4, r1 8006ac8: b1db cbz r3, 8006b02 <_fflush_r+0x42> 8006aca: b118 cbz r0, 8006ad4 <_fflush_r+0x14> 8006acc: 6983 ldr r3, [r0, #24] 8006ace: b90b cbnz r3, 8006ad4 <_fflush_r+0x14> 8006ad0: f000 f860 bl 8006b94 <__sinit> 8006ad4: 4b0c ldr r3, [pc, #48] ; (8006b08 <_fflush_r+0x48>) 8006ad6: 429c cmp r4, r3 8006ad8: d109 bne.n 8006aee <_fflush_r+0x2e> 8006ada: 686c ldr r4, [r5, #4] 8006adc: f9b4 300c ldrsh.w r3, [r4, #12] 8006ae0: b17b cbz r3, 8006b02 <_fflush_r+0x42> 8006ae2: 4621 mov r1, r4 8006ae4: 4628 mov r0, r5 8006ae6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8006aea: f7ff bf61 b.w 80069b0 <__sflush_r> 8006aee: 4b07 ldr r3, [pc, #28] ; (8006b0c <_fflush_r+0x4c>) 8006af0: 429c cmp r4, r3 8006af2: d101 bne.n 8006af8 <_fflush_r+0x38> 8006af4: 68ac ldr r4, [r5, #8] 8006af6: e7f1 b.n 8006adc <_fflush_r+0x1c> 8006af8: 4b05 ldr r3, [pc, #20] ; (8006b10 <_fflush_r+0x50>) 8006afa: 429c cmp r4, r3 8006afc: bf08 it eq 8006afe: 68ec ldreq r4, [r5, #12] 8006b00: e7ec b.n 8006adc <_fflush_r+0x1c> 8006b02: 2000 movs r0, #0 8006b04: bd38 pop {r3, r4, r5, pc} 8006b06: bf00 nop 8006b08: 080077cc .word 0x080077cc 8006b0c: 080077ec .word 0x080077ec 8006b10: 080077ac .word 0x080077ac 08006b14 <_cleanup_r>: 8006b14: 4901 ldr r1, [pc, #4] ; (8006b1c <_cleanup_r+0x8>) 8006b16: f000 b8a9 b.w 8006c6c <_fwalk_reent> 8006b1a: bf00 nop 8006b1c: 08006ac1 .word 0x08006ac1 08006b20 : 8006b20: 2300 movs r3, #0 8006b22: b510 push {r4, lr} 8006b24: 4604 mov r4, r0 8006b26: 6003 str r3, [r0, #0] 8006b28: 6043 str r3, [r0, #4] 8006b2a: 6083 str r3, [r0, #8] 8006b2c: 8181 strh r1, [r0, #12] 8006b2e: 6643 str r3, [r0, #100] ; 0x64 8006b30: 81c2 strh r2, [r0, #14] 8006b32: 6103 str r3, [r0, #16] 8006b34: 6143 str r3, [r0, #20] 8006b36: 6183 str r3, [r0, #24] 8006b38: 4619 mov r1, r3 8006b3a: 2208 movs r2, #8 8006b3c: 305c adds r0, #92 ; 0x5c 8006b3e: f7ff fd3c bl 80065ba 8006b42: 4b05 ldr r3, [pc, #20] ; (8006b58 ) 8006b44: 6224 str r4, [r4, #32] 8006b46: 6263 str r3, [r4, #36] ; 0x24 8006b48: 4b04 ldr r3, [pc, #16] ; (8006b5c ) 8006b4a: 62a3 str r3, [r4, #40] ; 0x28 8006b4c: 4b04 ldr r3, [pc, #16] ; (8006b60 ) 8006b4e: 62e3 str r3, [r4, #44] ; 0x2c 8006b50: 4b04 ldr r3, [pc, #16] ; (8006b64 ) 8006b52: 6323 str r3, [r4, #48] ; 0x30 8006b54: bd10 pop {r4, pc} 8006b56: bf00 nop 8006b58: 080074a1 .word 0x080074a1 8006b5c: 080074c3 .word 0x080074c3 8006b60: 080074fb .word 0x080074fb 8006b64: 0800751f .word 0x0800751f 08006b68 <__sfmoreglue>: 8006b68: b570 push {r4, r5, r6, lr} 8006b6a: 2568 movs r5, #104 ; 0x68 8006b6c: 1e4a subs r2, r1, #1 8006b6e: 4355 muls r5, r2 8006b70: 460e mov r6, r1 8006b72: f105 0174 add.w r1, r5, #116 ; 0x74 8006b76: f000 f94f bl 8006e18 <_malloc_r> 8006b7a: 4604 mov r4, r0 8006b7c: b140 cbz r0, 8006b90 <__sfmoreglue+0x28> 8006b7e: 2100 movs r1, #0 8006b80: e880 0042 stmia.w r0, {r1, r6} 8006b84: 300c adds r0, #12 8006b86: 60a0 str r0, [r4, #8] 8006b88: f105 0268 add.w r2, r5, #104 ; 0x68 8006b8c: f7ff fd15 bl 80065ba 8006b90: 4620 mov r0, r4 8006b92: bd70 pop {r4, r5, r6, pc} 08006b94 <__sinit>: 8006b94: 6983 ldr r3, [r0, #24] 8006b96: b510 push {r4, lr} 8006b98: 4604 mov r4, r0 8006b9a: bb33 cbnz r3, 8006bea <__sinit+0x56> 8006b9c: 6483 str r3, [r0, #72] ; 0x48 8006b9e: 64c3 str r3, [r0, #76] ; 0x4c 8006ba0: 6503 str r3, [r0, #80] ; 0x50 8006ba2: 4b12 ldr r3, [pc, #72] ; (8006bec <__sinit+0x58>) 8006ba4: 4a12 ldr r2, [pc, #72] ; (8006bf0 <__sinit+0x5c>) 8006ba6: 681b ldr r3, [r3, #0] 8006ba8: 6282 str r2, [r0, #40] ; 0x28 8006baa: 4298 cmp r0, r3 8006bac: bf04 itt eq 8006bae: 2301 moveq r3, #1 8006bb0: 6183 streq r3, [r0, #24] 8006bb2: f000 f81f bl 8006bf4 <__sfp> 8006bb6: 6060 str r0, [r4, #4] 8006bb8: 4620 mov r0, r4 8006bba: f000 f81b bl 8006bf4 <__sfp> 8006bbe: 60a0 str r0, [r4, #8] 8006bc0: 4620 mov r0, r4 8006bc2: f000 f817 bl 8006bf4 <__sfp> 8006bc6: 2200 movs r2, #0 8006bc8: 60e0 str r0, [r4, #12] 8006bca: 2104 movs r1, #4 8006bcc: 6860 ldr r0, [r4, #4] 8006bce: f7ff ffa7 bl 8006b20 8006bd2: 2201 movs r2, #1 8006bd4: 2109 movs r1, #9 8006bd6: 68a0 ldr r0, [r4, #8] 8006bd8: f7ff ffa2 bl 8006b20 8006bdc: 2202 movs r2, #2 8006bde: 2112 movs r1, #18 8006be0: 68e0 ldr r0, [r4, #12] 8006be2: f7ff ff9d bl 8006b20 8006be6: 2301 movs r3, #1 8006be8: 61a3 str r3, [r4, #24] 8006bea: bd10 pop {r4, pc} 8006bec: 080077a8 .word 0x080077a8 8006bf0: 08006b15 .word 0x08006b15 08006bf4 <__sfp>: 8006bf4: b5f8 push {r3, r4, r5, r6, r7, lr} 8006bf6: 4b1c ldr r3, [pc, #112] ; (8006c68 <__sfp+0x74>) 8006bf8: 4607 mov r7, r0 8006bfa: 681e ldr r6, [r3, #0] 8006bfc: 69b3 ldr r3, [r6, #24] 8006bfe: b913 cbnz r3, 8006c06 <__sfp+0x12> 8006c00: 4630 mov r0, r6 8006c02: f7ff ffc7 bl 8006b94 <__sinit> 8006c06: 3648 adds r6, #72 ; 0x48 8006c08: 68b4 ldr r4, [r6, #8] 8006c0a: 6873 ldr r3, [r6, #4] 8006c0c: 3b01 subs r3, #1 8006c0e: d503 bpl.n 8006c18 <__sfp+0x24> 8006c10: 6833 ldr r3, [r6, #0] 8006c12: b133 cbz r3, 8006c22 <__sfp+0x2e> 8006c14: 6836 ldr r6, [r6, #0] 8006c16: e7f7 b.n 8006c08 <__sfp+0x14> 8006c18: f9b4 500c ldrsh.w r5, [r4, #12] 8006c1c: b16d cbz r5, 8006c3a <__sfp+0x46> 8006c1e: 3468 adds r4, #104 ; 0x68 8006c20: e7f4 b.n 8006c0c <__sfp+0x18> 8006c22: 2104 movs r1, #4 8006c24: 4638 mov r0, r7 8006c26: f7ff ff9f bl 8006b68 <__sfmoreglue> 8006c2a: 6030 str r0, [r6, #0] 8006c2c: 2800 cmp r0, #0 8006c2e: d1f1 bne.n 8006c14 <__sfp+0x20> 8006c30: 230c movs r3, #12 8006c32: 4604 mov r4, r0 8006c34: 603b str r3, [r7, #0] 8006c36: 4620 mov r0, r4 8006c38: bdf8 pop {r3, r4, r5, r6, r7, pc} 8006c3a: f64f 73ff movw r3, #65535 ; 0xffff 8006c3e: 81e3 strh r3, [r4, #14] 8006c40: 2301 movs r3, #1 8006c42: 6665 str r5, [r4, #100] ; 0x64 8006c44: 81a3 strh r3, [r4, #12] 8006c46: 6025 str r5, [r4, #0] 8006c48: 60a5 str r5, [r4, #8] 8006c4a: 6065 str r5, [r4, #4] 8006c4c: 6125 str r5, [r4, #16] 8006c4e: 6165 str r5, [r4, #20] 8006c50: 61a5 str r5, [r4, #24] 8006c52: 2208 movs r2, #8 8006c54: 4629 mov r1, r5 8006c56: f104 005c add.w r0, r4, #92 ; 0x5c 8006c5a: f7ff fcae bl 80065ba 8006c5e: 6365 str r5, [r4, #52] ; 0x34 8006c60: 63a5 str r5, [r4, #56] ; 0x38 8006c62: 64a5 str r5, [r4, #72] ; 0x48 8006c64: 64e5 str r5, [r4, #76] ; 0x4c 8006c66: e7e6 b.n 8006c36 <__sfp+0x42> 8006c68: 080077a8 .word 0x080077a8 08006c6c <_fwalk_reent>: 8006c6c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8006c70: 4680 mov r8, r0 8006c72: 4689 mov r9, r1 8006c74: 2600 movs r6, #0 8006c76: f100 0448 add.w r4, r0, #72 ; 0x48 8006c7a: b914 cbnz r4, 8006c82 <_fwalk_reent+0x16> 8006c7c: 4630 mov r0, r6 8006c7e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8006c82: 68a5 ldr r5, [r4, #8] 8006c84: 6867 ldr r7, [r4, #4] 8006c86: 3f01 subs r7, #1 8006c88: d501 bpl.n 8006c8e <_fwalk_reent+0x22> 8006c8a: 6824 ldr r4, [r4, #0] 8006c8c: e7f5 b.n 8006c7a <_fwalk_reent+0xe> 8006c8e: 89ab ldrh r3, [r5, #12] 8006c90: 2b01 cmp r3, #1 8006c92: d907 bls.n 8006ca4 <_fwalk_reent+0x38> 8006c94: f9b5 300e ldrsh.w r3, [r5, #14] 8006c98: 3301 adds r3, #1 8006c9a: d003 beq.n 8006ca4 <_fwalk_reent+0x38> 8006c9c: 4629 mov r1, r5 8006c9e: 4640 mov r0, r8 8006ca0: 47c8 blx r9 8006ca2: 4306 orrs r6, r0 8006ca4: 3568 adds r5, #104 ; 0x68 8006ca6: e7ee b.n 8006c86 <_fwalk_reent+0x1a> 08006ca8 <__swhatbuf_r>: 8006ca8: b570 push {r4, r5, r6, lr} 8006caa: 460e mov r6, r1 8006cac: f9b1 100e ldrsh.w r1, [r1, #14] 8006cb0: b090 sub sp, #64 ; 0x40 8006cb2: 2900 cmp r1, #0 8006cb4: 4614 mov r4, r2 8006cb6: 461d mov r5, r3 8006cb8: da07 bge.n 8006cca <__swhatbuf_r+0x22> 8006cba: 2300 movs r3, #0 8006cbc: 602b str r3, [r5, #0] 8006cbe: 89b3 ldrh r3, [r6, #12] 8006cc0: 061a lsls r2, r3, #24 8006cc2: d410 bmi.n 8006ce6 <__swhatbuf_r+0x3e> 8006cc4: f44f 6380 mov.w r3, #1024 ; 0x400 8006cc8: e00e b.n 8006ce8 <__swhatbuf_r+0x40> 8006cca: aa01 add r2, sp, #4 8006ccc: f000 fc4e bl 800756c <_fstat_r> 8006cd0: 2800 cmp r0, #0 8006cd2: dbf2 blt.n 8006cba <__swhatbuf_r+0x12> 8006cd4: 9a02 ldr r2, [sp, #8] 8006cd6: f402 4270 and.w r2, r2, #61440 ; 0xf000 8006cda: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8006cde: 425a negs r2, r3 8006ce0: 415a adcs r2, r3 8006ce2: 602a str r2, [r5, #0] 8006ce4: e7ee b.n 8006cc4 <__swhatbuf_r+0x1c> 8006ce6: 2340 movs r3, #64 ; 0x40 8006ce8: 2000 movs r0, #0 8006cea: 6023 str r3, [r4, #0] 8006cec: b010 add sp, #64 ; 0x40 8006cee: bd70 pop {r4, r5, r6, pc} 08006cf0 <__smakebuf_r>: 8006cf0: 898b ldrh r3, [r1, #12] 8006cf2: b573 push {r0, r1, r4, r5, r6, lr} 8006cf4: 079d lsls r5, r3, #30 8006cf6: 4606 mov r6, r0 8006cf8: 460c mov r4, r1 8006cfa: d507 bpl.n 8006d0c <__smakebuf_r+0x1c> 8006cfc: f104 0347 add.w r3, r4, #71 ; 0x47 8006d00: 6023 str r3, [r4, #0] 8006d02: 6123 str r3, [r4, #16] 8006d04: 2301 movs r3, #1 8006d06: 6163 str r3, [r4, #20] 8006d08: b002 add sp, #8 8006d0a: bd70 pop {r4, r5, r6, pc} 8006d0c: ab01 add r3, sp, #4 8006d0e: 466a mov r2, sp 8006d10: f7ff ffca bl 8006ca8 <__swhatbuf_r> 8006d14: 9900 ldr r1, [sp, #0] 8006d16: 4605 mov r5, r0 8006d18: 4630 mov r0, r6 8006d1a: f000 f87d bl 8006e18 <_malloc_r> 8006d1e: b948 cbnz r0, 8006d34 <__smakebuf_r+0x44> 8006d20: f9b4 300c ldrsh.w r3, [r4, #12] 8006d24: 059a lsls r2, r3, #22 8006d26: d4ef bmi.n 8006d08 <__smakebuf_r+0x18> 8006d28: f023 0303 bic.w r3, r3, #3 8006d2c: f043 0302 orr.w r3, r3, #2 8006d30: 81a3 strh r3, [r4, #12] 8006d32: e7e3 b.n 8006cfc <__smakebuf_r+0xc> 8006d34: 4b0d ldr r3, [pc, #52] ; (8006d6c <__smakebuf_r+0x7c>) 8006d36: 62b3 str r3, [r6, #40] ; 0x28 8006d38: 89a3 ldrh r3, [r4, #12] 8006d3a: 6020 str r0, [r4, #0] 8006d3c: f043 0380 orr.w r3, r3, #128 ; 0x80 8006d40: 81a3 strh r3, [r4, #12] 8006d42: 9b00 ldr r3, [sp, #0] 8006d44: 6120 str r0, [r4, #16] 8006d46: 6163 str r3, [r4, #20] 8006d48: 9b01 ldr r3, [sp, #4] 8006d4a: b15b cbz r3, 8006d64 <__smakebuf_r+0x74> 8006d4c: f9b4 100e ldrsh.w r1, [r4, #14] 8006d50: 4630 mov r0, r6 8006d52: f000 fc1d bl 8007590 <_isatty_r> 8006d56: b128 cbz r0, 8006d64 <__smakebuf_r+0x74> 8006d58: 89a3 ldrh r3, [r4, #12] 8006d5a: f023 0303 bic.w r3, r3, #3 8006d5e: f043 0301 orr.w r3, r3, #1 8006d62: 81a3 strh r3, [r4, #12] 8006d64: 89a3 ldrh r3, [r4, #12] 8006d66: 431d orrs r5, r3 8006d68: 81a5 strh r5, [r4, #12] 8006d6a: e7cd b.n 8006d08 <__smakebuf_r+0x18> 8006d6c: 08006b15 .word 0x08006b15 08006d70 : 8006d70: 4b02 ldr r3, [pc, #8] ; (8006d7c ) 8006d72: 4601 mov r1, r0 8006d74: 6818 ldr r0, [r3, #0] 8006d76: f000 b84f b.w 8006e18 <_malloc_r> 8006d7a: bf00 nop 8006d7c: 2000000c .word 0x2000000c 08006d80 <_free_r>: 8006d80: b538 push {r3, r4, r5, lr} 8006d82: 4605 mov r5, r0 8006d84: 2900 cmp r1, #0 8006d86: d043 beq.n 8006e10 <_free_r+0x90> 8006d88: f851 3c04 ldr.w r3, [r1, #-4] 8006d8c: 1f0c subs r4, r1, #4 8006d8e: 2b00 cmp r3, #0 8006d90: bfb8 it lt 8006d92: 18e4 addlt r4, r4, r3 8006d94: f000 fc2c bl 80075f0 <__malloc_lock> 8006d98: 4a1e ldr r2, [pc, #120] ; (8006e14 <_free_r+0x94>) 8006d9a: 6813 ldr r3, [r2, #0] 8006d9c: 4610 mov r0, r2 8006d9e: b933 cbnz r3, 8006dae <_free_r+0x2e> 8006da0: 6063 str r3, [r4, #4] 8006da2: 6014 str r4, [r2, #0] 8006da4: 4628 mov r0, r5 8006da6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8006daa: f000 bc22 b.w 80075f2 <__malloc_unlock> 8006dae: 42a3 cmp r3, r4 8006db0: d90b bls.n 8006dca <_free_r+0x4a> 8006db2: 6821 ldr r1, [r4, #0] 8006db4: 1862 adds r2, r4, r1 8006db6: 4293 cmp r3, r2 8006db8: bf01 itttt eq 8006dba: 681a ldreq r2, [r3, #0] 8006dbc: 685b ldreq r3, [r3, #4] 8006dbe: 1852 addeq r2, r2, r1 8006dc0: 6022 streq r2, [r4, #0] 8006dc2: 6063 str r3, [r4, #4] 8006dc4: 6004 str r4, [r0, #0] 8006dc6: e7ed b.n 8006da4 <_free_r+0x24> 8006dc8: 4613 mov r3, r2 8006dca: 685a ldr r2, [r3, #4] 8006dcc: b10a cbz r2, 8006dd2 <_free_r+0x52> 8006dce: 42a2 cmp r2, r4 8006dd0: d9fa bls.n 8006dc8 <_free_r+0x48> 8006dd2: 6819 ldr r1, [r3, #0] 8006dd4: 1858 adds r0, r3, r1 8006dd6: 42a0 cmp r0, r4 8006dd8: d10b bne.n 8006df2 <_free_r+0x72> 8006dda: 6820 ldr r0, [r4, #0] 8006ddc: 4401 add r1, r0 8006dde: 1858 adds r0, r3, r1 8006de0: 4282 cmp r2, r0 8006de2: 6019 str r1, [r3, #0] 8006de4: d1de bne.n 8006da4 <_free_r+0x24> 8006de6: 6810 ldr r0, [r2, #0] 8006de8: 6852 ldr r2, [r2, #4] 8006dea: 4401 add r1, r0 8006dec: 6019 str r1, [r3, #0] 8006dee: 605a str r2, [r3, #4] 8006df0: e7d8 b.n 8006da4 <_free_r+0x24> 8006df2: d902 bls.n 8006dfa <_free_r+0x7a> 8006df4: 230c movs r3, #12 8006df6: 602b str r3, [r5, #0] 8006df8: e7d4 b.n 8006da4 <_free_r+0x24> 8006dfa: 6820 ldr r0, [r4, #0] 8006dfc: 1821 adds r1, r4, r0 8006dfe: 428a cmp r2, r1 8006e00: bf01 itttt eq 8006e02: 6811 ldreq r1, [r2, #0] 8006e04: 6852 ldreq r2, [r2, #4] 8006e06: 1809 addeq r1, r1, r0 8006e08: 6021 streq r1, [r4, #0] 8006e0a: 6062 str r2, [r4, #4] 8006e0c: 605c str r4, [r3, #4] 8006e0e: e7c9 b.n 8006da4 <_free_r+0x24> 8006e10: bd38 pop {r3, r4, r5, pc} 8006e12: bf00 nop 8006e14: 200002ac .word 0x200002ac 08006e18 <_malloc_r>: 8006e18: b570 push {r4, r5, r6, lr} 8006e1a: 1ccd adds r5, r1, #3 8006e1c: f025 0503 bic.w r5, r5, #3 8006e20: 3508 adds r5, #8 8006e22: 2d0c cmp r5, #12 8006e24: bf38 it cc 8006e26: 250c movcc r5, #12 8006e28: 2d00 cmp r5, #0 8006e2a: 4606 mov r6, r0 8006e2c: db01 blt.n 8006e32 <_malloc_r+0x1a> 8006e2e: 42a9 cmp r1, r5 8006e30: d903 bls.n 8006e3a <_malloc_r+0x22> 8006e32: 230c movs r3, #12 8006e34: 6033 str r3, [r6, #0] 8006e36: 2000 movs r0, #0 8006e38: bd70 pop {r4, r5, r6, pc} 8006e3a: f000 fbd9 bl 80075f0 <__malloc_lock> 8006e3e: 4a23 ldr r2, [pc, #140] ; (8006ecc <_malloc_r+0xb4>) 8006e40: 6814 ldr r4, [r2, #0] 8006e42: 4621 mov r1, r4 8006e44: b991 cbnz r1, 8006e6c <_malloc_r+0x54> 8006e46: 4c22 ldr r4, [pc, #136] ; (8006ed0 <_malloc_r+0xb8>) 8006e48: 6823 ldr r3, [r4, #0] 8006e4a: b91b cbnz r3, 8006e54 <_malloc_r+0x3c> 8006e4c: 4630 mov r0, r6 8006e4e: f000 fb17 bl 8007480 <_sbrk_r> 8006e52: 6020 str r0, [r4, #0] 8006e54: 4629 mov r1, r5 8006e56: 4630 mov r0, r6 8006e58: f000 fb12 bl 8007480 <_sbrk_r> 8006e5c: 1c43 adds r3, r0, #1 8006e5e: d126 bne.n 8006eae <_malloc_r+0x96> 8006e60: 230c movs r3, #12 8006e62: 4630 mov r0, r6 8006e64: 6033 str r3, [r6, #0] 8006e66: f000 fbc4 bl 80075f2 <__malloc_unlock> 8006e6a: e7e4 b.n 8006e36 <_malloc_r+0x1e> 8006e6c: 680b ldr r3, [r1, #0] 8006e6e: 1b5b subs r3, r3, r5 8006e70: d41a bmi.n 8006ea8 <_malloc_r+0x90> 8006e72: 2b0b cmp r3, #11 8006e74: d90f bls.n 8006e96 <_malloc_r+0x7e> 8006e76: 600b str r3, [r1, #0] 8006e78: 18cc adds r4, r1, r3 8006e7a: 50cd str r5, [r1, r3] 8006e7c: 4630 mov r0, r6 8006e7e: f000 fbb8 bl 80075f2 <__malloc_unlock> 8006e82: f104 000b add.w r0, r4, #11 8006e86: 1d23 adds r3, r4, #4 8006e88: f020 0007 bic.w r0, r0, #7 8006e8c: 1ac3 subs r3, r0, r3 8006e8e: d01b beq.n 8006ec8 <_malloc_r+0xb0> 8006e90: 425a negs r2, r3 8006e92: 50e2 str r2, [r4, r3] 8006e94: bd70 pop {r4, r5, r6, pc} 8006e96: 428c cmp r4, r1 8006e98: bf0b itete eq 8006e9a: 6863 ldreq r3, [r4, #4] 8006e9c: 684b ldrne r3, [r1, #4] 8006e9e: 6013 streq r3, [r2, #0] 8006ea0: 6063 strne r3, [r4, #4] 8006ea2: bf18 it ne 8006ea4: 460c movne r4, r1 8006ea6: e7e9 b.n 8006e7c <_malloc_r+0x64> 8006ea8: 460c mov r4, r1 8006eaa: 6849 ldr r1, [r1, #4] 8006eac: e7ca b.n 8006e44 <_malloc_r+0x2c> 8006eae: 1cc4 adds r4, r0, #3 8006eb0: f024 0403 bic.w r4, r4, #3 8006eb4: 42a0 cmp r0, r4 8006eb6: d005 beq.n 8006ec4 <_malloc_r+0xac> 8006eb8: 1a21 subs r1, r4, r0 8006eba: 4630 mov r0, r6 8006ebc: f000 fae0 bl 8007480 <_sbrk_r> 8006ec0: 3001 adds r0, #1 8006ec2: d0cd beq.n 8006e60 <_malloc_r+0x48> 8006ec4: 6025 str r5, [r4, #0] 8006ec6: e7d9 b.n 8006e7c <_malloc_r+0x64> 8006ec8: bd70 pop {r4, r5, r6, pc} 8006eca: bf00 nop 8006ecc: 200002ac .word 0x200002ac 8006ed0: 200002b0 .word 0x200002b0 08006ed4 <__sfputc_r>: 8006ed4: 6893 ldr r3, [r2, #8] 8006ed6: b410 push {r4} 8006ed8: 3b01 subs r3, #1 8006eda: 2b00 cmp r3, #0 8006edc: 6093 str r3, [r2, #8] 8006ede: da08 bge.n 8006ef2 <__sfputc_r+0x1e> 8006ee0: 6994 ldr r4, [r2, #24] 8006ee2: 42a3 cmp r3, r4 8006ee4: db02 blt.n 8006eec <__sfputc_r+0x18> 8006ee6: b2cb uxtb r3, r1 8006ee8: 2b0a cmp r3, #10 8006eea: d102 bne.n 8006ef2 <__sfputc_r+0x1e> 8006eec: bc10 pop {r4} 8006eee: f7ff bc9f b.w 8006830 <__swbuf_r> 8006ef2: 6813 ldr r3, [r2, #0] 8006ef4: 1c58 adds r0, r3, #1 8006ef6: 6010 str r0, [r2, #0] 8006ef8: 7019 strb r1, [r3, #0] 8006efa: b2c8 uxtb r0, r1 8006efc: bc10 pop {r4} 8006efe: 4770 bx lr 08006f00 <__sfputs_r>: 8006f00: b5f8 push {r3, r4, r5, r6, r7, lr} 8006f02: 4606 mov r6, r0 8006f04: 460f mov r7, r1 8006f06: 4614 mov r4, r2 8006f08: 18d5 adds r5, r2, r3 8006f0a: 42ac cmp r4, r5 8006f0c: d101 bne.n 8006f12 <__sfputs_r+0x12> 8006f0e: 2000 movs r0, #0 8006f10: e007 b.n 8006f22 <__sfputs_r+0x22> 8006f12: 463a mov r2, r7 8006f14: f814 1b01 ldrb.w r1, [r4], #1 8006f18: 4630 mov r0, r6 8006f1a: f7ff ffdb bl 8006ed4 <__sfputc_r> 8006f1e: 1c43 adds r3, r0, #1 8006f20: d1f3 bne.n 8006f0a <__sfputs_r+0xa> 8006f22: bdf8 pop {r3, r4, r5, r6, r7, pc} 08006f24 <_vfiprintf_r>: 8006f24: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8006f28: b09d sub sp, #116 ; 0x74 8006f2a: 460c mov r4, r1 8006f2c: 4617 mov r7, r2 8006f2e: 9303 str r3, [sp, #12] 8006f30: 4606 mov r6, r0 8006f32: b118 cbz r0, 8006f3c <_vfiprintf_r+0x18> 8006f34: 6983 ldr r3, [r0, #24] 8006f36: b90b cbnz r3, 8006f3c <_vfiprintf_r+0x18> 8006f38: f7ff fe2c bl 8006b94 <__sinit> 8006f3c: 4b7c ldr r3, [pc, #496] ; (8007130 <_vfiprintf_r+0x20c>) 8006f3e: 429c cmp r4, r3 8006f40: d157 bne.n 8006ff2 <_vfiprintf_r+0xce> 8006f42: 6874 ldr r4, [r6, #4] 8006f44: 89a3 ldrh r3, [r4, #12] 8006f46: 0718 lsls r0, r3, #28 8006f48: d55d bpl.n 8007006 <_vfiprintf_r+0xe2> 8006f4a: 6923 ldr r3, [r4, #16] 8006f4c: 2b00 cmp r3, #0 8006f4e: d05a beq.n 8007006 <_vfiprintf_r+0xe2> 8006f50: 2300 movs r3, #0 8006f52: 9309 str r3, [sp, #36] ; 0x24 8006f54: 2320 movs r3, #32 8006f56: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8006f5a: 2330 movs r3, #48 ; 0x30 8006f5c: f04f 0b01 mov.w fp, #1 8006f60: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8006f64: 46b8 mov r8, r7 8006f66: 4645 mov r5, r8 8006f68: f815 3b01 ldrb.w r3, [r5], #1 8006f6c: 2b00 cmp r3, #0 8006f6e: d155 bne.n 800701c <_vfiprintf_r+0xf8> 8006f70: ebb8 0a07 subs.w sl, r8, r7 8006f74: d00b beq.n 8006f8e <_vfiprintf_r+0x6a> 8006f76: 4653 mov r3, sl 8006f78: 463a mov r2, r7 8006f7a: 4621 mov r1, r4 8006f7c: 4630 mov r0, r6 8006f7e: f7ff ffbf bl 8006f00 <__sfputs_r> 8006f82: 3001 adds r0, #1 8006f84: f000 80c4 beq.w 8007110 <_vfiprintf_r+0x1ec> 8006f88: 9b09 ldr r3, [sp, #36] ; 0x24 8006f8a: 4453 add r3, sl 8006f8c: 9309 str r3, [sp, #36] ; 0x24 8006f8e: f898 3000 ldrb.w r3, [r8] 8006f92: 2b00 cmp r3, #0 8006f94: f000 80bc beq.w 8007110 <_vfiprintf_r+0x1ec> 8006f98: 2300 movs r3, #0 8006f9a: f04f 32ff mov.w r2, #4294967295 8006f9e: 9304 str r3, [sp, #16] 8006fa0: 9307 str r3, [sp, #28] 8006fa2: 9205 str r2, [sp, #20] 8006fa4: 9306 str r3, [sp, #24] 8006fa6: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8006faa: 931a str r3, [sp, #104] ; 0x68 8006fac: 2205 movs r2, #5 8006fae: 7829 ldrb r1, [r5, #0] 8006fb0: 4860 ldr r0, [pc, #384] ; (8007134 <_vfiprintf_r+0x210>) 8006fb2: f000 fb0f bl 80075d4 8006fb6: f105 0801 add.w r8, r5, #1 8006fba: 9b04 ldr r3, [sp, #16] 8006fbc: 2800 cmp r0, #0 8006fbe: d131 bne.n 8007024 <_vfiprintf_r+0x100> 8006fc0: 06d9 lsls r1, r3, #27 8006fc2: bf44 itt mi 8006fc4: 2220 movmi r2, #32 8006fc6: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8006fca: 071a lsls r2, r3, #28 8006fcc: bf44 itt mi 8006fce: 222b movmi r2, #43 ; 0x2b 8006fd0: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8006fd4: 782a ldrb r2, [r5, #0] 8006fd6: 2a2a cmp r2, #42 ; 0x2a 8006fd8: d02c beq.n 8007034 <_vfiprintf_r+0x110> 8006fda: 2100 movs r1, #0 8006fdc: 200a movs r0, #10 8006fde: 9a07 ldr r2, [sp, #28] 8006fe0: 46a8 mov r8, r5 8006fe2: f898 3000 ldrb.w r3, [r8] 8006fe6: 3501 adds r5, #1 8006fe8: 3b30 subs r3, #48 ; 0x30 8006fea: 2b09 cmp r3, #9 8006fec: d96d bls.n 80070ca <_vfiprintf_r+0x1a6> 8006fee: b371 cbz r1, 800704e <_vfiprintf_r+0x12a> 8006ff0: e026 b.n 8007040 <_vfiprintf_r+0x11c> 8006ff2: 4b51 ldr r3, [pc, #324] ; (8007138 <_vfiprintf_r+0x214>) 8006ff4: 429c cmp r4, r3 8006ff6: d101 bne.n 8006ffc <_vfiprintf_r+0xd8> 8006ff8: 68b4 ldr r4, [r6, #8] 8006ffa: e7a3 b.n 8006f44 <_vfiprintf_r+0x20> 8006ffc: 4b4f ldr r3, [pc, #316] ; (800713c <_vfiprintf_r+0x218>) 8006ffe: 429c cmp r4, r3 8007000: bf08 it eq 8007002: 68f4 ldreq r4, [r6, #12] 8007004: e79e b.n 8006f44 <_vfiprintf_r+0x20> 8007006: 4621 mov r1, r4 8007008: 4630 mov r0, r6 800700a: f7ff fc63 bl 80068d4 <__swsetup_r> 800700e: 2800 cmp r0, #0 8007010: d09e beq.n 8006f50 <_vfiprintf_r+0x2c> 8007012: f04f 30ff mov.w r0, #4294967295 8007016: b01d add sp, #116 ; 0x74 8007018: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800701c: 2b25 cmp r3, #37 ; 0x25 800701e: d0a7 beq.n 8006f70 <_vfiprintf_r+0x4c> 8007020: 46a8 mov r8, r5 8007022: e7a0 b.n 8006f66 <_vfiprintf_r+0x42> 8007024: 4a43 ldr r2, [pc, #268] ; (8007134 <_vfiprintf_r+0x210>) 8007026: 4645 mov r5, r8 8007028: 1a80 subs r0, r0, r2 800702a: fa0b f000 lsl.w r0, fp, r0 800702e: 4318 orrs r0, r3 8007030: 9004 str r0, [sp, #16] 8007032: e7bb b.n 8006fac <_vfiprintf_r+0x88> 8007034: 9a03 ldr r2, [sp, #12] 8007036: 1d11 adds r1, r2, #4 8007038: 6812 ldr r2, [r2, #0] 800703a: 9103 str r1, [sp, #12] 800703c: 2a00 cmp r2, #0 800703e: db01 blt.n 8007044 <_vfiprintf_r+0x120> 8007040: 9207 str r2, [sp, #28] 8007042: e004 b.n 800704e <_vfiprintf_r+0x12a> 8007044: 4252 negs r2, r2 8007046: f043 0302 orr.w r3, r3, #2 800704a: 9207 str r2, [sp, #28] 800704c: 9304 str r3, [sp, #16] 800704e: f898 3000 ldrb.w r3, [r8] 8007052: 2b2e cmp r3, #46 ; 0x2e 8007054: d110 bne.n 8007078 <_vfiprintf_r+0x154> 8007056: f898 3001 ldrb.w r3, [r8, #1] 800705a: f108 0101 add.w r1, r8, #1 800705e: 2b2a cmp r3, #42 ; 0x2a 8007060: d137 bne.n 80070d2 <_vfiprintf_r+0x1ae> 8007062: 9b03 ldr r3, [sp, #12] 8007064: f108 0802 add.w r8, r8, #2 8007068: 1d1a adds r2, r3, #4 800706a: 681b ldr r3, [r3, #0] 800706c: 9203 str r2, [sp, #12] 800706e: 2b00 cmp r3, #0 8007070: bfb8 it lt 8007072: f04f 33ff movlt.w r3, #4294967295 8007076: 9305 str r3, [sp, #20] 8007078: 4d31 ldr r5, [pc, #196] ; (8007140 <_vfiprintf_r+0x21c>) 800707a: 2203 movs r2, #3 800707c: f898 1000 ldrb.w r1, [r8] 8007080: 4628 mov r0, r5 8007082: f000 faa7 bl 80075d4 8007086: b140 cbz r0, 800709a <_vfiprintf_r+0x176> 8007088: 2340 movs r3, #64 ; 0x40 800708a: 1b40 subs r0, r0, r5 800708c: fa03 f000 lsl.w r0, r3, r0 8007090: 9b04 ldr r3, [sp, #16] 8007092: f108 0801 add.w r8, r8, #1 8007096: 4303 orrs r3, r0 8007098: 9304 str r3, [sp, #16] 800709a: f898 1000 ldrb.w r1, [r8] 800709e: 2206 movs r2, #6 80070a0: 4828 ldr r0, [pc, #160] ; (8007144 <_vfiprintf_r+0x220>) 80070a2: f108 0701 add.w r7, r8, #1 80070a6: f88d 1028 strb.w r1, [sp, #40] ; 0x28 80070aa: f000 fa93 bl 80075d4 80070ae: 2800 cmp r0, #0 80070b0: d034 beq.n 800711c <_vfiprintf_r+0x1f8> 80070b2: 4b25 ldr r3, [pc, #148] ; (8007148 <_vfiprintf_r+0x224>) 80070b4: bb03 cbnz r3, 80070f8 <_vfiprintf_r+0x1d4> 80070b6: 9b03 ldr r3, [sp, #12] 80070b8: 3307 adds r3, #7 80070ba: f023 0307 bic.w r3, r3, #7 80070be: 3308 adds r3, #8 80070c0: 9303 str r3, [sp, #12] 80070c2: 9b09 ldr r3, [sp, #36] ; 0x24 80070c4: 444b add r3, r9 80070c6: 9309 str r3, [sp, #36] ; 0x24 80070c8: e74c b.n 8006f64 <_vfiprintf_r+0x40> 80070ca: fb00 3202 mla r2, r0, r2, r3 80070ce: 2101 movs r1, #1 80070d0: e786 b.n 8006fe0 <_vfiprintf_r+0xbc> 80070d2: 2300 movs r3, #0 80070d4: 250a movs r5, #10 80070d6: 4618 mov r0, r3 80070d8: 9305 str r3, [sp, #20] 80070da: 4688 mov r8, r1 80070dc: f898 2000 ldrb.w r2, [r8] 80070e0: 3101 adds r1, #1 80070e2: 3a30 subs r2, #48 ; 0x30 80070e4: 2a09 cmp r2, #9 80070e6: d903 bls.n 80070f0 <_vfiprintf_r+0x1cc> 80070e8: 2b00 cmp r3, #0 80070ea: d0c5 beq.n 8007078 <_vfiprintf_r+0x154> 80070ec: 9005 str r0, [sp, #20] 80070ee: e7c3 b.n 8007078 <_vfiprintf_r+0x154> 80070f0: fb05 2000 mla r0, r5, r0, r2 80070f4: 2301 movs r3, #1 80070f6: e7f0 b.n 80070da <_vfiprintf_r+0x1b6> 80070f8: ab03 add r3, sp, #12 80070fa: 9300 str r3, [sp, #0] 80070fc: 4622 mov r2, r4 80070fe: 4b13 ldr r3, [pc, #76] ; (800714c <_vfiprintf_r+0x228>) 8007100: a904 add r1, sp, #16 8007102: 4630 mov r0, r6 8007104: f3af 8000 nop.w 8007108: f1b0 3fff cmp.w r0, #4294967295 800710c: 4681 mov r9, r0 800710e: d1d8 bne.n 80070c2 <_vfiprintf_r+0x19e> 8007110: 89a3 ldrh r3, [r4, #12] 8007112: 065b lsls r3, r3, #25 8007114: f53f af7d bmi.w 8007012 <_vfiprintf_r+0xee> 8007118: 9809 ldr r0, [sp, #36] ; 0x24 800711a: e77c b.n 8007016 <_vfiprintf_r+0xf2> 800711c: ab03 add r3, sp, #12 800711e: 9300 str r3, [sp, #0] 8007120: 4622 mov r2, r4 8007122: 4b0a ldr r3, [pc, #40] ; (800714c <_vfiprintf_r+0x228>) 8007124: a904 add r1, sp, #16 8007126: 4630 mov r0, r6 8007128: f000 f88a bl 8007240 <_printf_i> 800712c: e7ec b.n 8007108 <_vfiprintf_r+0x1e4> 800712e: bf00 nop 8007130: 080077cc .word 0x080077cc 8007134: 0800780c .word 0x0800780c 8007138: 080077ec .word 0x080077ec 800713c: 080077ac .word 0x080077ac 8007140: 08007812 .word 0x08007812 8007144: 08007816 .word 0x08007816 8007148: 00000000 .word 0x00000000 800714c: 08006f01 .word 0x08006f01 08007150 <_printf_common>: 8007150: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8007154: 4691 mov r9, r2 8007156: 461f mov r7, r3 8007158: 688a ldr r2, [r1, #8] 800715a: 690b ldr r3, [r1, #16] 800715c: 4606 mov r6, r0 800715e: 4293 cmp r3, r2 8007160: bfb8 it lt 8007162: 4613 movlt r3, r2 8007164: f8c9 3000 str.w r3, [r9] 8007168: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 800716c: 460c mov r4, r1 800716e: f8dd 8020 ldr.w r8, [sp, #32] 8007172: b112 cbz r2, 800717a <_printf_common+0x2a> 8007174: 3301 adds r3, #1 8007176: f8c9 3000 str.w r3, [r9] 800717a: 6823 ldr r3, [r4, #0] 800717c: 0699 lsls r1, r3, #26 800717e: bf42 ittt mi 8007180: f8d9 3000 ldrmi.w r3, [r9] 8007184: 3302 addmi r3, #2 8007186: f8c9 3000 strmi.w r3, [r9] 800718a: 6825 ldr r5, [r4, #0] 800718c: f015 0506 ands.w r5, r5, #6 8007190: d107 bne.n 80071a2 <_printf_common+0x52> 8007192: f104 0a19 add.w sl, r4, #25 8007196: 68e3 ldr r3, [r4, #12] 8007198: f8d9 2000 ldr.w r2, [r9] 800719c: 1a9b subs r3, r3, r2 800719e: 429d cmp r5, r3 80071a0: db2a blt.n 80071f8 <_printf_common+0xa8> 80071a2: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 80071a6: 6822 ldr r2, [r4, #0] 80071a8: 3300 adds r3, #0 80071aa: bf18 it ne 80071ac: 2301 movne r3, #1 80071ae: 0692 lsls r2, r2, #26 80071b0: d42f bmi.n 8007212 <_printf_common+0xc2> 80071b2: f104 0243 add.w r2, r4, #67 ; 0x43 80071b6: 4639 mov r1, r7 80071b8: 4630 mov r0, r6 80071ba: 47c0 blx r8 80071bc: 3001 adds r0, #1 80071be: d022 beq.n 8007206 <_printf_common+0xb6> 80071c0: 6823 ldr r3, [r4, #0] 80071c2: 68e5 ldr r5, [r4, #12] 80071c4: f003 0306 and.w r3, r3, #6 80071c8: 2b04 cmp r3, #4 80071ca: bf18 it ne 80071cc: 2500 movne r5, #0 80071ce: f8d9 2000 ldr.w r2, [r9] 80071d2: f04f 0900 mov.w r9, #0 80071d6: bf08 it eq 80071d8: 1aad subeq r5, r5, r2 80071da: 68a3 ldr r3, [r4, #8] 80071dc: 6922 ldr r2, [r4, #16] 80071de: bf08 it eq 80071e0: ea25 75e5 biceq.w r5, r5, r5, asr #31 80071e4: 4293 cmp r3, r2 80071e6: bfc4 itt gt 80071e8: 1a9b subgt r3, r3, r2 80071ea: 18ed addgt r5, r5, r3 80071ec: 341a adds r4, #26 80071ee: 454d cmp r5, r9 80071f0: d11b bne.n 800722a <_printf_common+0xda> 80071f2: 2000 movs r0, #0 80071f4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80071f8: 2301 movs r3, #1 80071fa: 4652 mov r2, sl 80071fc: 4639 mov r1, r7 80071fe: 4630 mov r0, r6 8007200: 47c0 blx r8 8007202: 3001 adds r0, #1 8007204: d103 bne.n 800720e <_printf_common+0xbe> 8007206: f04f 30ff mov.w r0, #4294967295 800720a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800720e: 3501 adds r5, #1 8007210: e7c1 b.n 8007196 <_printf_common+0x46> 8007212: 2030 movs r0, #48 ; 0x30 8007214: 18e1 adds r1, r4, r3 8007216: f881 0043 strb.w r0, [r1, #67] ; 0x43 800721a: 1c5a adds r2, r3, #1 800721c: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8007220: 4422 add r2, r4 8007222: 3302 adds r3, #2 8007224: f882 1043 strb.w r1, [r2, #67] ; 0x43 8007228: e7c3 b.n 80071b2 <_printf_common+0x62> 800722a: 2301 movs r3, #1 800722c: 4622 mov r2, r4 800722e: 4639 mov r1, r7 8007230: 4630 mov r0, r6 8007232: 47c0 blx r8 8007234: 3001 adds r0, #1 8007236: d0e6 beq.n 8007206 <_printf_common+0xb6> 8007238: f109 0901 add.w r9, r9, #1 800723c: e7d7 b.n 80071ee <_printf_common+0x9e> ... 08007240 <_printf_i>: 8007240: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8007244: 4617 mov r7, r2 8007246: 7e0a ldrb r2, [r1, #24] 8007248: b085 sub sp, #20 800724a: 2a6e cmp r2, #110 ; 0x6e 800724c: 4698 mov r8, r3 800724e: 4606 mov r6, r0 8007250: 460c mov r4, r1 8007252: 9b0c ldr r3, [sp, #48] ; 0x30 8007254: f101 0e43 add.w lr, r1, #67 ; 0x43 8007258: f000 80bc beq.w 80073d4 <_printf_i+0x194> 800725c: d81a bhi.n 8007294 <_printf_i+0x54> 800725e: 2a63 cmp r2, #99 ; 0x63 8007260: d02e beq.n 80072c0 <_printf_i+0x80> 8007262: d80a bhi.n 800727a <_printf_i+0x3a> 8007264: 2a00 cmp r2, #0 8007266: f000 80c8 beq.w 80073fa <_printf_i+0x1ba> 800726a: 2a58 cmp r2, #88 ; 0x58 800726c: f000 808a beq.w 8007384 <_printf_i+0x144> 8007270: f104 0542 add.w r5, r4, #66 ; 0x42 8007274: f884 2042 strb.w r2, [r4, #66] ; 0x42 8007278: e02a b.n 80072d0 <_printf_i+0x90> 800727a: 2a64 cmp r2, #100 ; 0x64 800727c: d001 beq.n 8007282 <_printf_i+0x42> 800727e: 2a69 cmp r2, #105 ; 0x69 8007280: d1f6 bne.n 8007270 <_printf_i+0x30> 8007282: 6821 ldr r1, [r4, #0] 8007284: 681a ldr r2, [r3, #0] 8007286: f011 0f80 tst.w r1, #128 ; 0x80 800728a: d023 beq.n 80072d4 <_printf_i+0x94> 800728c: 1d11 adds r1, r2, #4 800728e: 6019 str r1, [r3, #0] 8007290: 6813 ldr r3, [r2, #0] 8007292: e027 b.n 80072e4 <_printf_i+0xa4> 8007294: 2a73 cmp r2, #115 ; 0x73 8007296: f000 80b4 beq.w 8007402 <_printf_i+0x1c2> 800729a: d808 bhi.n 80072ae <_printf_i+0x6e> 800729c: 2a6f cmp r2, #111 ; 0x6f 800729e: d02a beq.n 80072f6 <_printf_i+0xb6> 80072a0: 2a70 cmp r2, #112 ; 0x70 80072a2: d1e5 bne.n 8007270 <_printf_i+0x30> 80072a4: 680a ldr r2, [r1, #0] 80072a6: f042 0220 orr.w r2, r2, #32 80072aa: 600a str r2, [r1, #0] 80072ac: e003 b.n 80072b6 <_printf_i+0x76> 80072ae: 2a75 cmp r2, #117 ; 0x75 80072b0: d021 beq.n 80072f6 <_printf_i+0xb6> 80072b2: 2a78 cmp r2, #120 ; 0x78 80072b4: d1dc bne.n 8007270 <_printf_i+0x30> 80072b6: 2278 movs r2, #120 ; 0x78 80072b8: 496f ldr r1, [pc, #444] ; (8007478 <_printf_i+0x238>) 80072ba: f884 2045 strb.w r2, [r4, #69] ; 0x45 80072be: e064 b.n 800738a <_printf_i+0x14a> 80072c0: 681a ldr r2, [r3, #0] 80072c2: f101 0542 add.w r5, r1, #66 ; 0x42 80072c6: 1d11 adds r1, r2, #4 80072c8: 6019 str r1, [r3, #0] 80072ca: 6813 ldr r3, [r2, #0] 80072cc: f884 3042 strb.w r3, [r4, #66] ; 0x42 80072d0: 2301 movs r3, #1 80072d2: e0a3 b.n 800741c <_printf_i+0x1dc> 80072d4: f011 0f40 tst.w r1, #64 ; 0x40 80072d8: f102 0104 add.w r1, r2, #4 80072dc: 6019 str r1, [r3, #0] 80072de: d0d7 beq.n 8007290 <_printf_i+0x50> 80072e0: f9b2 3000 ldrsh.w r3, [r2] 80072e4: 2b00 cmp r3, #0 80072e6: da03 bge.n 80072f0 <_printf_i+0xb0> 80072e8: 222d movs r2, #45 ; 0x2d 80072ea: 425b negs r3, r3 80072ec: f884 2043 strb.w r2, [r4, #67] ; 0x43 80072f0: 4962 ldr r1, [pc, #392] ; (800747c <_printf_i+0x23c>) 80072f2: 220a movs r2, #10 80072f4: e017 b.n 8007326 <_printf_i+0xe6> 80072f6: 6820 ldr r0, [r4, #0] 80072f8: 6819 ldr r1, [r3, #0] 80072fa: f010 0f80 tst.w r0, #128 ; 0x80 80072fe: d003 beq.n 8007308 <_printf_i+0xc8> 8007300: 1d08 adds r0, r1, #4 8007302: 6018 str r0, [r3, #0] 8007304: 680b ldr r3, [r1, #0] 8007306: e006 b.n 8007316 <_printf_i+0xd6> 8007308: f010 0f40 tst.w r0, #64 ; 0x40 800730c: f101 0004 add.w r0, r1, #4 8007310: 6018 str r0, [r3, #0] 8007312: d0f7 beq.n 8007304 <_printf_i+0xc4> 8007314: 880b ldrh r3, [r1, #0] 8007316: 2a6f cmp r2, #111 ; 0x6f 8007318: bf14 ite ne 800731a: 220a movne r2, #10 800731c: 2208 moveq r2, #8 800731e: 4957 ldr r1, [pc, #348] ; (800747c <_printf_i+0x23c>) 8007320: 2000 movs r0, #0 8007322: f884 0043 strb.w r0, [r4, #67] ; 0x43 8007326: 6865 ldr r5, [r4, #4] 8007328: 2d00 cmp r5, #0 800732a: 60a5 str r5, [r4, #8] 800732c: f2c0 809c blt.w 8007468 <_printf_i+0x228> 8007330: 6820 ldr r0, [r4, #0] 8007332: f020 0004 bic.w r0, r0, #4 8007336: 6020 str r0, [r4, #0] 8007338: 2b00 cmp r3, #0 800733a: d13f bne.n 80073bc <_printf_i+0x17c> 800733c: 2d00 cmp r5, #0 800733e: f040 8095 bne.w 800746c <_printf_i+0x22c> 8007342: 4675 mov r5, lr 8007344: 2a08 cmp r2, #8 8007346: d10b bne.n 8007360 <_printf_i+0x120> 8007348: 6823 ldr r3, [r4, #0] 800734a: 07da lsls r2, r3, #31 800734c: d508 bpl.n 8007360 <_printf_i+0x120> 800734e: 6923 ldr r3, [r4, #16] 8007350: 6862 ldr r2, [r4, #4] 8007352: 429a cmp r2, r3 8007354: bfde ittt le 8007356: 2330 movle r3, #48 ; 0x30 8007358: f805 3c01 strble.w r3, [r5, #-1] 800735c: f105 35ff addle.w r5, r5, #4294967295 8007360: ebae 0305 sub.w r3, lr, r5 8007364: 6123 str r3, [r4, #16] 8007366: f8cd 8000 str.w r8, [sp] 800736a: 463b mov r3, r7 800736c: aa03 add r2, sp, #12 800736e: 4621 mov r1, r4 8007370: 4630 mov r0, r6 8007372: f7ff feed bl 8007150 <_printf_common> 8007376: 3001 adds r0, #1 8007378: d155 bne.n 8007426 <_printf_i+0x1e6> 800737a: f04f 30ff mov.w r0, #4294967295 800737e: b005 add sp, #20 8007380: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8007384: f881 2045 strb.w r2, [r1, #69] ; 0x45 8007388: 493c ldr r1, [pc, #240] ; (800747c <_printf_i+0x23c>) 800738a: 6822 ldr r2, [r4, #0] 800738c: 6818 ldr r0, [r3, #0] 800738e: f012 0f80 tst.w r2, #128 ; 0x80 8007392: f100 0504 add.w r5, r0, #4 8007396: 601d str r5, [r3, #0] 8007398: d001 beq.n 800739e <_printf_i+0x15e> 800739a: 6803 ldr r3, [r0, #0] 800739c: e002 b.n 80073a4 <_printf_i+0x164> 800739e: 0655 lsls r5, r2, #25 80073a0: d5fb bpl.n 800739a <_printf_i+0x15a> 80073a2: 8803 ldrh r3, [r0, #0] 80073a4: 07d0 lsls r0, r2, #31 80073a6: bf44 itt mi 80073a8: f042 0220 orrmi.w r2, r2, #32 80073ac: 6022 strmi r2, [r4, #0] 80073ae: b91b cbnz r3, 80073b8 <_printf_i+0x178> 80073b0: 6822 ldr r2, [r4, #0] 80073b2: f022 0220 bic.w r2, r2, #32 80073b6: 6022 str r2, [r4, #0] 80073b8: 2210 movs r2, #16 80073ba: e7b1 b.n 8007320 <_printf_i+0xe0> 80073bc: 4675 mov r5, lr 80073be: fbb3 f0f2 udiv r0, r3, r2 80073c2: fb02 3310 mls r3, r2, r0, r3 80073c6: 5ccb ldrb r3, [r1, r3] 80073c8: f805 3d01 strb.w r3, [r5, #-1]! 80073cc: 4603 mov r3, r0 80073ce: 2800 cmp r0, #0 80073d0: d1f5 bne.n 80073be <_printf_i+0x17e> 80073d2: e7b7 b.n 8007344 <_printf_i+0x104> 80073d4: 6808 ldr r0, [r1, #0] 80073d6: 681a ldr r2, [r3, #0] 80073d8: f010 0f80 tst.w r0, #128 ; 0x80 80073dc: 6949 ldr r1, [r1, #20] 80073de: d004 beq.n 80073ea <_printf_i+0x1aa> 80073e0: 1d10 adds r0, r2, #4 80073e2: 6018 str r0, [r3, #0] 80073e4: 6813 ldr r3, [r2, #0] 80073e6: 6019 str r1, [r3, #0] 80073e8: e007 b.n 80073fa <_printf_i+0x1ba> 80073ea: f010 0f40 tst.w r0, #64 ; 0x40 80073ee: f102 0004 add.w r0, r2, #4 80073f2: 6018 str r0, [r3, #0] 80073f4: 6813 ldr r3, [r2, #0] 80073f6: d0f6 beq.n 80073e6 <_printf_i+0x1a6> 80073f8: 8019 strh r1, [r3, #0] 80073fa: 2300 movs r3, #0 80073fc: 4675 mov r5, lr 80073fe: 6123 str r3, [r4, #16] 8007400: e7b1 b.n 8007366 <_printf_i+0x126> 8007402: 681a ldr r2, [r3, #0] 8007404: 1d11 adds r1, r2, #4 8007406: 6019 str r1, [r3, #0] 8007408: 6815 ldr r5, [r2, #0] 800740a: 2100 movs r1, #0 800740c: 6862 ldr r2, [r4, #4] 800740e: 4628 mov r0, r5 8007410: f000 f8e0 bl 80075d4 8007414: b108 cbz r0, 800741a <_printf_i+0x1da> 8007416: 1b40 subs r0, r0, r5 8007418: 6060 str r0, [r4, #4] 800741a: 6863 ldr r3, [r4, #4] 800741c: 6123 str r3, [r4, #16] 800741e: 2300 movs r3, #0 8007420: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007424: e79f b.n 8007366 <_printf_i+0x126> 8007426: 6923 ldr r3, [r4, #16] 8007428: 462a mov r2, r5 800742a: 4639 mov r1, r7 800742c: 4630 mov r0, r6 800742e: 47c0 blx r8 8007430: 3001 adds r0, #1 8007432: d0a2 beq.n 800737a <_printf_i+0x13a> 8007434: 6823 ldr r3, [r4, #0] 8007436: 079b lsls r3, r3, #30 8007438: d507 bpl.n 800744a <_printf_i+0x20a> 800743a: 2500 movs r5, #0 800743c: f104 0919 add.w r9, r4, #25 8007440: 68e3 ldr r3, [r4, #12] 8007442: 9a03 ldr r2, [sp, #12] 8007444: 1a9b subs r3, r3, r2 8007446: 429d cmp r5, r3 8007448: db05 blt.n 8007456 <_printf_i+0x216> 800744a: 68e0 ldr r0, [r4, #12] 800744c: 9b03 ldr r3, [sp, #12] 800744e: 4298 cmp r0, r3 8007450: bfb8 it lt 8007452: 4618 movlt r0, r3 8007454: e793 b.n 800737e <_printf_i+0x13e> 8007456: 2301 movs r3, #1 8007458: 464a mov r2, r9 800745a: 4639 mov r1, r7 800745c: 4630 mov r0, r6 800745e: 47c0 blx r8 8007460: 3001 adds r0, #1 8007462: d08a beq.n 800737a <_printf_i+0x13a> 8007464: 3501 adds r5, #1 8007466: e7eb b.n 8007440 <_printf_i+0x200> 8007468: 2b00 cmp r3, #0 800746a: d1a7 bne.n 80073bc <_printf_i+0x17c> 800746c: 780b ldrb r3, [r1, #0] 800746e: f104 0542 add.w r5, r4, #66 ; 0x42 8007472: f884 3042 strb.w r3, [r4, #66] ; 0x42 8007476: e765 b.n 8007344 <_printf_i+0x104> 8007478: 0800782e .word 0x0800782e 800747c: 0800781d .word 0x0800781d 08007480 <_sbrk_r>: 8007480: b538 push {r3, r4, r5, lr} 8007482: 2300 movs r3, #0 8007484: 4c05 ldr r4, [pc, #20] ; (800749c <_sbrk_r+0x1c>) 8007486: 4605 mov r5, r0 8007488: 4608 mov r0, r1 800748a: 6023 str r3, [r4, #0] 800748c: f000 f8ec bl 8007668 <_sbrk> 8007490: 1c43 adds r3, r0, #1 8007492: d102 bne.n 800749a <_sbrk_r+0x1a> 8007494: 6823 ldr r3, [r4, #0] 8007496: b103 cbz r3, 800749a <_sbrk_r+0x1a> 8007498: 602b str r3, [r5, #0] 800749a: bd38 pop {r3, r4, r5, pc} 800749c: 20000450 .word 0x20000450 080074a0 <__sread>: 80074a0: b510 push {r4, lr} 80074a2: 460c mov r4, r1 80074a4: f9b1 100e ldrsh.w r1, [r1, #14] 80074a8: f000 f8a4 bl 80075f4 <_read_r> 80074ac: 2800 cmp r0, #0 80074ae: bfab itete ge 80074b0: 6d63 ldrge r3, [r4, #84] ; 0x54 80074b2: 89a3 ldrhlt r3, [r4, #12] 80074b4: 181b addge r3, r3, r0 80074b6: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 80074ba: bfac ite ge 80074bc: 6563 strge r3, [r4, #84] ; 0x54 80074be: 81a3 strhlt r3, [r4, #12] 80074c0: bd10 pop {r4, pc} 080074c2 <__swrite>: 80074c2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80074c6: 461f mov r7, r3 80074c8: 898b ldrh r3, [r1, #12] 80074ca: 4605 mov r5, r0 80074cc: 05db lsls r3, r3, #23 80074ce: 460c mov r4, r1 80074d0: 4616 mov r6, r2 80074d2: d505 bpl.n 80074e0 <__swrite+0x1e> 80074d4: 2302 movs r3, #2 80074d6: 2200 movs r2, #0 80074d8: f9b1 100e ldrsh.w r1, [r1, #14] 80074dc: f000 f868 bl 80075b0 <_lseek_r> 80074e0: 89a3 ldrh r3, [r4, #12] 80074e2: 4632 mov r2, r6 80074e4: f423 5380 bic.w r3, r3, #4096 ; 0x1000 80074e8: 81a3 strh r3, [r4, #12] 80074ea: f9b4 100e ldrsh.w r1, [r4, #14] 80074ee: 463b mov r3, r7 80074f0: 4628 mov r0, r5 80074f2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 80074f6: f000 b817 b.w 8007528 <_write_r> 080074fa <__sseek>: 80074fa: b510 push {r4, lr} 80074fc: 460c mov r4, r1 80074fe: f9b1 100e ldrsh.w r1, [r1, #14] 8007502: f000 f855 bl 80075b0 <_lseek_r> 8007506: 1c43 adds r3, r0, #1 8007508: 89a3 ldrh r3, [r4, #12] 800750a: bf15 itete ne 800750c: 6560 strne r0, [r4, #84] ; 0x54 800750e: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8007512: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8007516: 81a3 strheq r3, [r4, #12] 8007518: bf18 it ne 800751a: 81a3 strhne r3, [r4, #12] 800751c: bd10 pop {r4, pc} 0800751e <__sclose>: 800751e: f9b1 100e ldrsh.w r1, [r1, #14] 8007522: f000 b813 b.w 800754c <_close_r> ... 08007528 <_write_r>: 8007528: b538 push {r3, r4, r5, lr} 800752a: 4605 mov r5, r0 800752c: 4608 mov r0, r1 800752e: 4611 mov r1, r2 8007530: 2200 movs r2, #0 8007532: 4c05 ldr r4, [pc, #20] ; (8007548 <_write_r+0x20>) 8007534: 6022 str r2, [r4, #0] 8007536: 461a mov r2, r3 8007538: f7fe fa68 bl 8005a0c <_write> 800753c: 1c43 adds r3, r0, #1 800753e: d102 bne.n 8007546 <_write_r+0x1e> 8007540: 6823 ldr r3, [r4, #0] 8007542: b103 cbz r3, 8007546 <_write_r+0x1e> 8007544: 602b str r3, [r5, #0] 8007546: bd38 pop {r3, r4, r5, pc} 8007548: 20000450 .word 0x20000450 0800754c <_close_r>: 800754c: b538 push {r3, r4, r5, lr} 800754e: 2300 movs r3, #0 8007550: 4c05 ldr r4, [pc, #20] ; (8007568 <_close_r+0x1c>) 8007552: 4605 mov r5, r0 8007554: 4608 mov r0, r1 8007556: 6023 str r3, [r4, #0] 8007558: f000 f85e bl 8007618 <_close> 800755c: 1c43 adds r3, r0, #1 800755e: d102 bne.n 8007566 <_close_r+0x1a> 8007560: 6823 ldr r3, [r4, #0] 8007562: b103 cbz r3, 8007566 <_close_r+0x1a> 8007564: 602b str r3, [r5, #0] 8007566: bd38 pop {r3, r4, r5, pc} 8007568: 20000450 .word 0x20000450 0800756c <_fstat_r>: 800756c: b538 push {r3, r4, r5, lr} 800756e: 2300 movs r3, #0 8007570: 4c06 ldr r4, [pc, #24] ; (800758c <_fstat_r+0x20>) 8007572: 4605 mov r5, r0 8007574: 4608 mov r0, r1 8007576: 4611 mov r1, r2 8007578: 6023 str r3, [r4, #0] 800757a: f000 f855 bl 8007628 <_fstat> 800757e: 1c43 adds r3, r0, #1 8007580: d102 bne.n 8007588 <_fstat_r+0x1c> 8007582: 6823 ldr r3, [r4, #0] 8007584: b103 cbz r3, 8007588 <_fstat_r+0x1c> 8007586: 602b str r3, [r5, #0] 8007588: bd38 pop {r3, r4, r5, pc} 800758a: bf00 nop 800758c: 20000450 .word 0x20000450 08007590 <_isatty_r>: 8007590: b538 push {r3, r4, r5, lr} 8007592: 2300 movs r3, #0 8007594: 4c05 ldr r4, [pc, #20] ; (80075ac <_isatty_r+0x1c>) 8007596: 4605 mov r5, r0 8007598: 4608 mov r0, r1 800759a: 6023 str r3, [r4, #0] 800759c: f000 f84c bl 8007638 <_isatty> 80075a0: 1c43 adds r3, r0, #1 80075a2: d102 bne.n 80075aa <_isatty_r+0x1a> 80075a4: 6823 ldr r3, [r4, #0] 80075a6: b103 cbz r3, 80075aa <_isatty_r+0x1a> 80075a8: 602b str r3, [r5, #0] 80075aa: bd38 pop {r3, r4, r5, pc} 80075ac: 20000450 .word 0x20000450 080075b0 <_lseek_r>: 80075b0: b538 push {r3, r4, r5, lr} 80075b2: 4605 mov r5, r0 80075b4: 4608 mov r0, r1 80075b6: 4611 mov r1, r2 80075b8: 2200 movs r2, #0 80075ba: 4c05 ldr r4, [pc, #20] ; (80075d0 <_lseek_r+0x20>) 80075bc: 6022 str r2, [r4, #0] 80075be: 461a mov r2, r3 80075c0: f000 f842 bl 8007648 <_lseek> 80075c4: 1c43 adds r3, r0, #1 80075c6: d102 bne.n 80075ce <_lseek_r+0x1e> 80075c8: 6823 ldr r3, [r4, #0] 80075ca: b103 cbz r3, 80075ce <_lseek_r+0x1e> 80075cc: 602b str r3, [r5, #0] 80075ce: bd38 pop {r3, r4, r5, pc} 80075d0: 20000450 .word 0x20000450 080075d4 : 80075d4: b510 push {r4, lr} 80075d6: b2c9 uxtb r1, r1 80075d8: 4402 add r2, r0 80075da: 4290 cmp r0, r2 80075dc: 4603 mov r3, r0 80075de: d101 bne.n 80075e4 80075e0: 2000 movs r0, #0 80075e2: bd10 pop {r4, pc} 80075e4: 781c ldrb r4, [r3, #0] 80075e6: 3001 adds r0, #1 80075e8: 428c cmp r4, r1 80075ea: d1f6 bne.n 80075da 80075ec: 4618 mov r0, r3 80075ee: bd10 pop {r4, pc} 080075f0 <__malloc_lock>: 80075f0: 4770 bx lr 080075f2 <__malloc_unlock>: 80075f2: 4770 bx lr 080075f4 <_read_r>: 80075f4: b538 push {r3, r4, r5, lr} 80075f6: 4605 mov r5, r0 80075f8: 4608 mov r0, r1 80075fa: 4611 mov r1, r2 80075fc: 2200 movs r2, #0 80075fe: 4c05 ldr r4, [pc, #20] ; (8007614 <_read_r+0x20>) 8007600: 6022 str r2, [r4, #0] 8007602: 461a mov r2, r3 8007604: f000 f828 bl 8007658 <_read> 8007608: 1c43 adds r3, r0, #1 800760a: d102 bne.n 8007612 <_read_r+0x1e> 800760c: 6823 ldr r3, [r4, #0] 800760e: b103 cbz r3, 8007612 <_read_r+0x1e> 8007610: 602b str r3, [r5, #0] 8007612: bd38 pop {r3, r4, r5, pc} 8007614: 20000450 .word 0x20000450 08007618 <_close>: 8007618: 2258 movs r2, #88 ; 0x58 800761a: 4b02 ldr r3, [pc, #8] ; (8007624 <_close+0xc>) 800761c: f04f 30ff mov.w r0, #4294967295 8007620: 601a str r2, [r3, #0] 8007622: 4770 bx lr 8007624: 20000450 .word 0x20000450 08007628 <_fstat>: 8007628: 2258 movs r2, #88 ; 0x58 800762a: 4b02 ldr r3, [pc, #8] ; (8007634 <_fstat+0xc>) 800762c: f04f 30ff mov.w r0, #4294967295 8007630: 601a str r2, [r3, #0] 8007632: 4770 bx lr 8007634: 20000450 .word 0x20000450 08007638 <_isatty>: 8007638: 2258 movs r2, #88 ; 0x58 800763a: 4b02 ldr r3, [pc, #8] ; (8007644 <_isatty+0xc>) 800763c: 2000 movs r0, #0 800763e: 601a str r2, [r3, #0] 8007640: 4770 bx lr 8007642: bf00 nop 8007644: 20000450 .word 0x20000450 08007648 <_lseek>: 8007648: 2258 movs r2, #88 ; 0x58 800764a: 4b02 ldr r3, [pc, #8] ; (8007654 <_lseek+0xc>) 800764c: f04f 30ff mov.w r0, #4294967295 8007650: 601a str r2, [r3, #0] 8007652: 4770 bx lr 8007654: 20000450 .word 0x20000450 08007658 <_read>: 8007658: 2258 movs r2, #88 ; 0x58 800765a: 4b02 ldr r3, [pc, #8] ; (8007664 <_read+0xc>) 800765c: f04f 30ff mov.w r0, #4294967295 8007660: 601a str r2, [r3, #0] 8007662: 4770 bx lr 8007664: 20000450 .word 0x20000450 08007668 <_sbrk>: 8007668: 4b04 ldr r3, [pc, #16] ; (800767c <_sbrk+0x14>) 800766a: 4602 mov r2, r0 800766c: 6819 ldr r1, [r3, #0] 800766e: b909 cbnz r1, 8007674 <_sbrk+0xc> 8007670: 4903 ldr r1, [pc, #12] ; (8007680 <_sbrk+0x18>) 8007672: 6019 str r1, [r3, #0] 8007674: 6818 ldr r0, [r3, #0] 8007676: 4402 add r2, r0 8007678: 601a str r2, [r3, #0] 800767a: 4770 bx lr 800767c: 200002b4 .word 0x200002b4 8007680: 20000454 .word 0x20000454 08007684 <_init>: 8007684: b5f8 push {r3, r4, r5, r6, r7, lr} 8007686: bf00 nop 8007688: bcf8 pop {r3, r4, r5, r6, r7} 800768a: bc08 pop {r3} 800768c: 469e mov lr, r3 800768e: 4770 bx lr 08007690 <_fini>: 8007690: b5f8 push {r3, r4, r5, r6, r7, lr} 8007692: bf00 nop 8007694: bcf8 pop {r3, r4, r5, r6, r7} 8007696: bc08 pop {r3} 8007698: 469e mov lr, r3 800769a: 4770 bx lr