STM32F103_ATTEN_PLL_Zig/Src/adf4153.c

/******************************************************************************
*   @file   ADF4153.c
*   @brief  Implementation of ADF4153 Driver for Microblaze processor.
*   @author Istvan Csomortani (istvan.csomortani@analog.com)
*
*******************************************************************************
* Copyright 2013(c) Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*  - Redistributions of source code must retain the above copyright
*    notice, this list of conditions and the following disclaimer.
*  - Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in
*    the documentation and/or other materials provided with the
*    distribution.
*  - Neither the name of Analog Devices, Inc. nor the names of its
*    contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*  - The use of this software may or may not infringe the patent rights
*    of one or more patent holders.  This license does not release you
*    from the requirement that you obtain separate licenses from these
*    patent holders to use this software.
*  - Use of the software either in source or binary form, must be run
*    on or directly connected to an Analog Devices Inc. component.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/

/*****************************************************************************/
/****************************** Include Files ********************************/
/*****************************************************************************/
#include "adf4153.h"
#include "zig_operate.h"
#include "main.h"
#include "pll_4113.h"

extern void Pol_Delay_us(volatile uint32_t microseconds);
typedef struct _adf4153_st{
    unsigned long long PFD_Value;
    uint16_t MOD_Value;
    uint32_t FRAC_Value;
    uint16_t INT_Value;    
    double N_Value;
}adf4153_st;
extern PLL_Setting_st Pll_3_5_H;
extern PLL_Setting_st Pll_3_5_L;

uint32_t pow2(uint32_t val,int32_t val2){
    for(uint8_t i = 0; i < val2 - 1; i++){
        val = val * val;
    }

    return val;
}

double round_up( double value, int pos )
{
    double temp;
    temp = value * pow2( 10, pos );  // �썝�븯�뒗 �냼�닔�젏 �옄由ъ닔留뚰겮 10�쓽 �늻�듅�쓣 �븿
    temp =  (int)(temp + 0.5);          // 0.5瑜� �뜑�븳�썑 踰꾨┝�븯硫� 諛섏삱由쇱씠 �맖
    temp *= pow2( 10, -pos );           // �떎�떆 �썝�옒 �냼�닔�젏 �옄由ъ닔濡�

    return temp;
}


double N_Reg_Value_Calc(double val){
    return  val / 1000;
}
uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){
    uint32_t ret = 0;
    uint32_t shift_bit = 0x01;
    uint8_t control_bit = 0;
    uint8_t i = 0;
#ifdef DEBUG_PRINT
    printf("FRAC : %d INT : %d \r\n",(int)_FRAC,_INT);
#endif /* DEBUG_PRINT */
    for(i = 0; i < 2; i++){
        if(control_bit & 0x01)
            ret += shift_bit << i;
        control_bit = control_bit >> 1;
    }
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 14; i++){
        if(_FRAC & 0x01)
            ret += shift_bit << i;
        _FRAC = _FRAC >> 1;
    }
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
#endif /* DEBUG_PRINT */
    for(i = 14; i < 22; i++){
        if(_INT & 0x01)
            ret += shift_bit << i;
        _INT = _INT >> 1;
    }  
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
#endif /* DEBUG_PRINT */
    if(_FASTLOCK & 0x01)
            ret += shift_bit << i;
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */

    return ret;
}
uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){
    uint32_t ret = 0;
    uint32_t shift_bit = 0x01;
    uint8_t control_bit = 1;
    uint8_t i = 0;
#ifdef DEBUG_PRINT
    printf("_MOD : %d INT : %d \r\n",_MOD,_RCOUNTER);
#endif /* DEBUG_PRINT */

#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 0; i < 2; i++){
        if(control_bit & 0x01)
            ret += shift_bit << i;
        control_bit = control_bit >> 1;
    }
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 14; i++){
        if(_MOD & 0x01)
            ret += shift_bit << i;
        _MOD = _MOD >> 1;
    }
    for(i = 14; i < 18; i++){
        if(_RCOUNTER & 0x01)
            ret += shift_bit << i;
        _RCOUNTER = _RCOUNTER >> 1;
    }  
    if(_PRESCALER & 0x01)
            ret += shift_bit << i++;
    if(_RESERVED & 0x01)
            ret += shift_bit << i++;
    for(i = 19; i < 22; i++){
        if(_MUXOUT & 0x01)
            ret += shift_bit << i;
        _MUXOUT = _MUXOUT >> 1;
    }   
    if(LOAD_CONTROL & 0x01)
        ret += shift_bit << i++;

    return ret;
}

ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
    adf4153_st temp_adf4153;
    double temp = 0;
    ADF4153_R_N_Reg_st temp_reg;
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
    temp_adf4153.N_Value    =  N_Reg_Value_Calc(((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)));
    temp_adf4153.INT_Value  =   temp_adf4153.N_Value ;
#ifdef DEBUG_PRINT
    printf("\r\ntemp_adf4153.N_Value : %f  temp_adf4153.INT_Value : %f  temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value);
#endif /* DEBUG_PRINT */
    temp = temp_adf4153.N_Value - (double)temp_adf4153.INT_Value;
#ifdef DEBUG_PRINT
    printf("\r\n temp_adf4153.N_Value - (double)temp_adf4153.INT_Value) : %f  temp * (double)temp_adf4153.MOD_Value : %f \r\n",temp,temp * (double)temp_adf4153.MOD_Value);
#endif /* DEBUG_PRINT */
    temp_adf4153.FRAC_Value =  (float)temp * temp_adf4153.MOD_Value;
   
#ifdef DEBUG_PRINT
    printf("\r\ntemp_adf4153.N_Value : %x   : %f ",temp_adf4153.N_Value,((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)) / 1000);
    printf("temp_adf4153.MOD_Value : %x   : %d \r\n",temp_adf4153.MOD_Value,temp_adf4153.MOD_Value);
#endif /* DEBUG_PRINT */
    uint16_t tempmod = temp_adf4153.FRAC_Value;
    for(uint8_t i = 0; i < 12; i++){
#ifdef DEBUG_PRINT
        if(temp_adf4153.MOD_Value & 0x800){
            printf("1");
        }else{
            printf("0");
        }
#endif /* DEBUG_PRINT */
        tempmod = tempmod << 1;
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
    printf("temp_adf4153.FRAC_Value : %x   : %d\r\n",temp_adf4153.FRAC_Value,temp_adf4153.FRAC_Value);
#endif /* DEBUG_PRINT */
    uint16_t tempfrac = temp_adf4153.FRAC_Value;
    for(uint8_t i = 0; i < 12; i++){
#ifdef DEBUG_PRINT
        if(tempfrac & 0x800){
            printf("1");
        }else{
            printf("0");
        }
#endif /* DEBUG_PRINT */
        tempfrac = tempfrac << 1;
    }
#ifdef DEBUG_PRINT
    printf("\r\n");    
#endif /* DEBUG_PRINT */
#ifdef DEBUG_PRINT
    printf("temp_adf4153.INT_Value : %x   : %d\r\n",temp_adf4153.INT_Value,temp_adf4153.INT_Value); 
#endif /* DEBUG_PRINT */
    uint16_t tempint = temp_adf4153.INT_Value;
    for(uint8_t i = 0; i < 9; i++){
#ifdef DEBUG_PRINT
        if(tempint & 0x100){
            printf("1");
        }else{
            printf("0");
        }
#endif /* DEBUG_PRINT */
        tempint = tempint << 1;
    }
#ifdef DEBUG_PRINT
    printf("\r\n");    

    printf("R0: %x  R1: %x \r\n",N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0),R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0));   
#endif /* DEBUG_PRINT */
    temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0);
    temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0);

    return temp_reg;
//    R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,1,0); //prescaler 1 : 8/9 0: 4/5
}
void ADF4153_Initialize(void){
#if 0 // PYJ.2019.08.09_BEGIN -- 
PLL_Setting_st Pll_test = {
      PLL_CLK_3_5G_GPIO_Port,
      PLL_CLK_3_5G_Pin,
      PLL_DATA_3_5G_GPIO_Port,
      PLL_DATA_3_5G_Pin,
    PLL_EN_3_5G_L_GPIO_Port,    
    PLL_EN_3_5G_L_Pin,
  };
PLL_Setting_st Pll_test2 = {
    PLL_CLK_3_5G_GPIO_Port,
    PLL_CLK_3_5G_Pin,
    PLL_DATA_3_5G_GPIO_Port,
    PLL_DATA_3_5G_Pin,
    PLL_EN_3_5G_H_GPIO_Port,    
    PLL_EN_3_5G_H_Pin,
  };          
    //  ADF4153_Module_Ctrl(Pll_test,0x2B44B0,0x14BE81,0x0013C2,0x000003);
      ADF4153_R_N_Reg_st temp_reg;
      temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
      ADF4153_Module_Ctrl(Pll_test,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);      
    
      HAL_Delay(1);
#ifdef DEBUG_PRINT
        printf("\r\nPLL_EN_3_5G_H_GPIO_Port\r\n");
#endif /* DEBUG_PRINT */
   
        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
        ADF4153_Module_Ctrl(Pll_test2,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);                  
    //  ADF4153_Module_Ctrl(Pll_test2,0x313840,0x14BE81,0x13C2,0x3);
      HAL_Delay(1);
#endif // PYJ.2019.08.09_END -- 
  if(  Flash_Save_data[INDEX_PLL_3_5G_LOW_H] == 0 
    && Flash_Save_data[INDEX_PLL_3_5G_LOW_M] == 0
    &&Flash_Save_data[INDEX_PLL_3_5G_LOW_L] == 0)
  {
    Flash_Save_data[INDEX_PLL_3_5G_LOW_H] = ((34655 & 0xFF0000) >> 16);
    Flash_Save_data[INDEX_PLL_3_5G_LOW_M] = ((34655 & 0x00FF00) >> 8);
    Flash_Save_data[INDEX_PLL_3_5G_LOW_L] = (34655 & 0x0000FF);
  }
  if(Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] == 0 
    && Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] == 0 
    && Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] == 0)
  {
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] = ((39345 & 0xFF0000) >> 16);
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] = ((39345 & 0x00FF00) >> 8);    
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] = (39345  & 0x0000FF);    
  }


}
void ADF4153_Check(void){
  ADF4153_R_N_Reg_st temp_reg;
  if(HAL_GPIO_ReadPin(PLL_LD_3_5G_H_GPIO_Port, PLL_LD_3_5G_H_Pin) == GPIO_PIN_RESET 
     && HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port, PLL_ON_OFF_3_5G_H_Pin) == GPIO_PIN_SET){
       temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
       ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
       HAL_Delay(1);
     }
     if(HAL_GPIO_ReadPin(PLL_LD_3_5G_L_GPIO_Port, PLL_LD_3_5G_L_Pin) == GPIO_PIN_RESET
     && HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port, PLL_ON_OFF_3_5G_L_Pin) == GPIO_PIN_SET){
       temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
       ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
       HAL_Delay(1);
     }


}

void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
    R3  = R3  & 0x0007FF;
    R2 = R2 & 0x00FFFF;
    R1 = R1 & 0xFFFFFF;
    R0 = R0 & 0xFFFFFF;
//    ADF4153_Freq_Calc(3461500000,40000000,2,5000);
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
#ifdef DEBUG_PRINT
    printf("YJ :R0: %x  R1:  %x   R2 : %x R3 : %x ",R0,R1,R2,R3);
    printf("\r\n");
#endif /* DEBUG_PRINT */
    /*   R3 Ctrl    */
    for(int i =0; i < 11; i++){
        if(R3 & 0x000400){
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(50);
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
        Pol_Delay_us(50);
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
        R3 = (R3 << 1);
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
      Pol_Delay_us(50);
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
    
    /*   R2 Ctrl    */
     for(int i =0; i < 16; i++){
         if(R2 & 0x008000){
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
#ifdef DEBUG_PRINT
             printf("1");
#endif /* DEBUG_PRINT */
         }
         else{
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
#ifdef DEBUG_PRINT
             printf("0");
#endif /* DEBUG_PRINT */
         }
         Pol_Delay_us(50);
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
         Pol_Delay_us(50);
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);

         R2 = ((R2 << 1) & 0x00FFFF);
     }
#ifdef DEBUG_PRINT
     printf("\r\n");
#endif /* DEBUG_PRINT */
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
      Pol_Delay_us(50);
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
    
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(50);
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
        Pol_Delay_us(50);
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);

        R1 = ((R1 << 1) & 0xFFFFFF);
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
      Pol_Delay_us(50);
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);


        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(50);
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
        Pol_Delay_us(50);
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);

        R0 = ((R0 << 1) & 0xFFFFFF);
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
    Pol_Delay_us(50);
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);

}