STM32F103_ATTEN_PLL_Zig/Src/pll_4113.c

/**************************************************************************************************
  Filename:       hal_adf4113.c
  Revised:        $Date: 2013-11-17 $
  Revision:       $Revision:  $
  Description:   This file contains the interface to the ADF4113 frequency synthesizer.
**************************************************************************************************/
#include "pll_4113.h"
void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2);

uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN);

#define ADF4113_PRESCALE8         0
#define ADF4113_PRESCALE16        1
#define ADF4113_PRESCALE32        2
#define ADF4113_PRESCALE64        3
// ADF4113 Prescale value for minimum required division ratio
#define ADF4113_PRE8_MIN_N        56
#define ADF4113_PRE16_MIN_N       240
#define ADF4113_PRE32_MIN_N       992
#define ADF4113_PRE64_MIN_N       4032
// Frequency Settings
// Initally, the synthesizer will operate at 2450 MHz
#define ADF4113_CH_STEP          50000
#define HAL_SYN_INVALID_PRESCALE  0x04
#define ADF4113_REF_FREQ_MHZ    13000000

uint8_t PLL_1_8_DL_Error_Cnt = 0;
uint8_t PLL_1_8_UL_Error_Cnt = 0;
uint8_t PLL_2_1_DL_Error_Cnt = 0;
uint8_t PLL_2_1_UL_Error_Cnt = 0;


PLL_Setting_st ADF4113_1_8G_DL = {
    PLL_CLK_GPIO_Port,
    PLL_CLK_Pin,
    PLL_DATA_GPIO_Port,
    PLL_DATA_Pin,
    PLL_EN_1_8G_DL_GPIO_Port,    
    PLL_EN_1_8G_DL_Pin,
};
PLL_Setting_st ADF4113_1_8G_UL = {
    PLL_CLK_GPIO_Port,
    PLL_CLK_Pin,
    PLL_DATA_GPIO_Port,
    PLL_DATA_Pin,
    PLL_EN_1_8G_UL_GPIO_Port,    
    PLL_EN_1_8G_UL_Pin,
};
PLL_Setting_st ADF4113_2_1G_DL = {
    PLL_CLK_GPIO_Port,
    PLL_CLK_Pin,
    PLL_DATA_GPIO_Port,
    PLL_DATA_Pin,
    PLL_EN_2_1G_DL_GPIO_Port,    
    PLL_EN_2_1G_DL_Pin,
};
PLL_Setting_st ADF4113_2_1G_UL = {
    PLL_CLK_GPIO_Port,
    PLL_CLK_Pin,
    PLL_DATA_GPIO_Port,
    PLL_DATA_Pin,
    PLL_EN_2_1G_UL_GPIO_Port,    
    PLL_EN_2_1G_UL_Pin,
};



// Error Code
typedef struct{
    uint16_t B;
    uint16_t P;
    uint16_t A;   
    uint16_t N;       
}Adf4113_st;
void ADF4113_Initialize(void){
  if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47;
    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF);
  }
  if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8);
    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF);
  }
  if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8);
    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF);
  }
  if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8);
    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF);    
  }
//    ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
//    HAL_Delay(1);
//    ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
//    HAL_Delay(1);
//    ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
//    HAL_Delay(1);
//    ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
}


void ADF4113_Check(void){
  uint16_t temp_val = 0;
    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_DL_GPIO_Port, PLL_LD_1_8G_DL_Pin) == GPIO_PIN_RESET){
      temp_val = (Prev_data[INDEX_PLL_1_8G_DL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_DL_L]);
//      ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
            ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
      if(PLL_1_8_DL_Error_Cnt == 3){
        Error_Message_Occur(DL_1_8);
      }
      if(PLL_1_8_DL_Error_Cnt < 4)
        PLL_1_8_DL_Error_Cnt++;    
      HAL_Delay(1);
    }else{
      PLL_1_8_DL_Error_Cnt = 0;
    }

    
    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_UL_GPIO_Port, PLL_LD_1_8G_UL_Pin) == GPIO_PIN_RESET){
      temp_val = (Prev_data[INDEX_PLL_1_8G_UL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_UL_L]);
      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
    //      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
      if(PLL_1_8_UL_Error_Cnt == 3){
        Error_Message_Occur(UL_1_8);
      }
      if(PLL_1_8_UL_Error_Cnt < 4)
        PLL_1_8_UL_Error_Cnt++;
      HAL_Delay(1);
    }else{
      PLL_1_8_UL_Error_Cnt = 0;
    }
    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_DL_GPIO_Port, PLL_LD_2_1G_DL_Pin) == GPIO_PIN_RESET){
      temp_val = (Prev_data[INDEX_PLL_2_1G_DL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_DL_L]);
//      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
          ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
      if(PLL_2_1_DL_Error_Cnt == 3){
        Error_Message_Occur(DL_2_1);
      }
      
      if(PLL_2_1_DL_Error_Cnt < 4)
        PLL_2_1_DL_Error_Cnt++;
      HAL_Delay(1);
    }else{
      PLL_2_1_DL_Error_Cnt = 0;
    }

    
    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_UL_GPIO_Port, PLL_LD_2_1G_UL_Pin) == GPIO_PIN_RESET){
      temp_val = (Prev_data[INDEX_PLL_2_1G_UL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_UL_L]);
//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
          ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
      if(PLL_2_1_UL_Error_Cnt == 3){
        Error_Message_Occur(UL_2_1);
      }
      if(PLL_2_1_UL_Error_Cnt < 4)
        PLL_2_1_UL_Error_Cnt++;
      HAL_Delay(1);
    }else{
      PLL_2_1_UL_Error_Cnt = 0;
    }
}


uint32_t halSynSetFreq(uint32_t rf_Freq)
{
    uint32_t  R, B;
    uint32_t  A, P, p_mode;
    uint32_t  N_val = 0;
    N_val = (rf_Freq / ADF4113_CH_STEP);
    if( N_val < ADF4113_PRE8_MIN_N) { 
        return HAL_SYN_INVALID_PRESCALE; 
    } else if(( N_val> ADF4113_PRE8_MIN_N) && (N_val < ADF4113_PRE16_MIN_N)) { 
        P = 8;  
        p_mode = ADF4113_PRESCALE8;
    } else if(( N_val > ADF4113_PRE16_MIN_N) && (N_val < ADF4113_PRE32_MIN_N)) { 
        P = 16;
        p_mode = ADF4113_PRESCALE16;
        
    } else if((N_val > ADF4113_PRE32_MIN_N) && ( N_val < ADF4113_PRE64_MIN_N)) { 
        P = 32;
        p_mode = ADF4113_PRESCALE32;
        
    } else if( N_val > ADF4113_PRE64_MIN_N) { 
        P = 64; 
        p_mode = ADF4113_PRESCALE64;
    }
    P = 32;
    B = N_val / P;
    A = N_val -(B * P);
//    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
//    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
  return N_Counter_Latch_Create(A,B,0);
}
uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
    uint32_t ret = 0;
    uint32_t shift_bit = 0x01;
    uint8_t control_bit = 1;
    uint8_t i = 0;
    uint8_t reserve = 0;
//    printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
//    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
    for(i = 0; i < 2; i++){
        if(control_bit & 0x01)
            ret += shift_bit << i;
        control_bit = control_bit >> 1;
    }
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 8; i++){
        if(_ACOUNTER & 0x01)
            ret += shift_bit << i;
        _ACOUNTER = _ACOUNTER >> 1;
    }  
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 8; i < 21; i++){
        if(_BCOUNTER & 0x01)
            ret += shift_bit << i;
        _BCOUNTER = _BCOUNTER >> 1;
    }      
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    if(_CPGAIN & 0x01)
            ret += shift_bit << i++;
    for(i = 22; i < 24; i++){
        if(reserve & 0x01)
            ret += shift_bit << i;
        reserve = reserve >> 1;
    }   
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    return ret;
}
void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
    R2 = R2 & 0xFFFFFF;
    R1 = R1 & 0xFFFFFF;
    R0 = R0 & 0xFFFFFF;
    
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
    /*   R2 Ctrl    */
     for(int i =0; i < 24; i++){
         if(R2 & 0x800000){
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("1");
#endif // PYJ.2019.08.11_END -- 
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
         }
         else{
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");
#endif // PYJ.2019.08.11_END -- 
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
         }
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
         Pol_Delay_us(10);
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
         R2 = ((R2 << 1) & 0xFFFFFF);
     }
#if 0 // PYJ.2019.08.11_BEGIN -- 
     printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
     Pol_Delay_us(10);
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("1");
#endif // PYJ.2019.08.11_END -- 
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");
#endif // PYJ.2019.08.11_END -- 
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
        Pol_Delay_us(10);
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
        R0 = ((R0 << 1) & 0xFFFFFF);
    }  
#if 0 // PYJ.2019.08.11_BEGIN -- 
        printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
     
     Pol_Delay_us(10);
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);    
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("1");
#endif // PYJ.2019.08.11_END -- 
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
        }
        else{
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");            
#endif // PYJ.2019.08.11_END -- 
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
        Pol_Delay_us(10);
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
        R1 = ((R1 << 1) & 0xFFFFFF);
    }
#if 0 // PYJ.2019.08.11_BEGIN -- 
        printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
    Pol_Delay_us(10);
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);

}