STM32F103_ATTEN_PLL_Zig/Debug/STM32F103_ATTEN_PLL_Zig.list

STM32F103_ATTEN_PLL_Zig.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08004000  08004000  00004000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         000073d0  080041e8  080041e8  000041e8  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00000858  0800b5b8  0800b5b8  0000b5b8  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  0800be10  0800be10  0000be10  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  0800be18  0800be18  0000be18  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .fini_array   00000004  0800be1c  0800be1c  0000be1c  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .data         00000404  20000000  0800be20  00010000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          000012a4  20000404  0800c224  00010404  2**2
                  ALLOC
  8 ._user_heap_stack 00000600  200016a8  0800c224  000116a8  2**0
                  ALLOC
  9 .ARM.attributes 00000029  00000000  00000000  00010404  2**0
                  CONTENTS, READONLY
 10 .debug_info   00022064  00000000  00000000  0001042d  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_abbrev 00004224  00000000  00000000  00032491  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_loc    00008a12  00000000  00000000  000366b5  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_aranges 00000bf0  00000000  00000000  0003f0c8  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_ranges 00000ff8  00000000  00000000  0003fcb8  2**3
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_line   000082b6  00000000  00000000  00040cb0  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .debug_str    00004c10  00000000  00000000  00048f66  2**0
                  CONTENTS, READONLY, DEBUGGING
 17 .comment      0000007c  00000000  00000000  0004db76  2**0
                  CONTENTS, READONLY
 18 .debug_frame  000032dc  00000000  00000000  0004dbf4  2**2
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080041e8 <__do_global_dtors_aux>:
 80041e8:	b510      	push	{r4, lr}
 80041ea:	4c05      	ldr	r4, [pc, #20]	; (8004200 <__do_global_dtors_aux+0x18>)
 80041ec:	7823      	ldrb	r3, [r4, #0]
 80041ee:	b933      	cbnz	r3, 80041fe <__do_global_dtors_aux+0x16>
 80041f0:	4b04      	ldr	r3, [pc, #16]	; (8004204 <__do_global_dtors_aux+0x1c>)
 80041f2:	b113      	cbz	r3, 80041fa <__do_global_dtors_aux+0x12>
 80041f4:	4804      	ldr	r0, [pc, #16]	; (8004208 <__do_global_dtors_aux+0x20>)
 80041f6:	f3af 8000 	nop.w
 80041fa:	2301      	movs	r3, #1
 80041fc:	7023      	strb	r3, [r4, #0]
 80041fe:	bd10      	pop	{r4, pc}
 8004200:	20000404 	.word	0x20000404
 8004204:	00000000 	.word	0x00000000
 8004208:	0800b5a0 	.word	0x0800b5a0

0800420c <frame_dummy>:
 800420c:	b508      	push	{r3, lr}
 800420e:	4b03      	ldr	r3, [pc, #12]	; (800421c <frame_dummy+0x10>)
 8004210:	b11b      	cbz	r3, 800421a <frame_dummy+0xe>
 8004212:	4903      	ldr	r1, [pc, #12]	; (8004220 <frame_dummy+0x14>)
 8004214:	4803      	ldr	r0, [pc, #12]	; (8004224 <frame_dummy+0x18>)
 8004216:	f3af 8000 	nop.w
 800421a:	bd08      	pop	{r3, pc}
 800421c:	00000000 	.word	0x00000000
 8004220:	20000408 	.word	0x20000408
 8004224:	0800b5a0 	.word	0x0800b5a0

08004228 <strlen>:
 8004228:	4603      	mov	r3, r0
 800422a:	f813 2b01 	ldrb.w	r2, [r3], #1
 800422e:	2a00      	cmp	r2, #0
 8004230:	d1fb      	bne.n	800422a <strlen+0x2>
 8004232:	1a18      	subs	r0, r3, r0
 8004234:	3801      	subs	r0, #1
 8004236:	4770      	bx	lr

08004238 <__aeabi_drsub>:
 8004238:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
 800423c:	e002      	b.n	8004244 <__adddf3>
 800423e:	bf00      	nop

08004240 <__aeabi_dsub>:
 8004240:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000

08004244 <__adddf3>:
 8004244:	b530      	push	{r4, r5, lr}
 8004246:	ea4f 0441 	mov.w	r4, r1, lsl #1
 800424a:	ea4f 0543 	mov.w	r5, r3, lsl #1
 800424e:	ea94 0f05 	teq	r4, r5
 8004252:	bf08      	it	eq
 8004254:	ea90 0f02 	teqeq	r0, r2
 8004258:	bf1f      	itttt	ne
 800425a:	ea54 0c00 	orrsne.w	ip, r4, r0
 800425e:	ea55 0c02 	orrsne.w	ip, r5, r2
 8004262:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 8004266:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 800426a:	f000 80e2 	beq.w	8004432 <__adddf3+0x1ee>
 800426e:	ea4f 5454 	mov.w	r4, r4, lsr #21
 8004272:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 8004276:	bfb8      	it	lt
 8004278:	426d      	neglt	r5, r5
 800427a:	dd0c      	ble.n	8004296 <__adddf3+0x52>
 800427c:	442c      	add	r4, r5
 800427e:	ea80 0202 	eor.w	r2, r0, r2
 8004282:	ea81 0303 	eor.w	r3, r1, r3
 8004286:	ea82 0000 	eor.w	r0, r2, r0
 800428a:	ea83 0101 	eor.w	r1, r3, r1
 800428e:	ea80 0202 	eor.w	r2, r0, r2
 8004292:	ea81 0303 	eor.w	r3, r1, r3
 8004296:	2d36      	cmp	r5, #54	; 0x36
 8004298:	bf88      	it	hi
 800429a:	bd30      	pophi	{r4, r5, pc}
 800429c:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 80042a0:	ea4f 3101 	mov.w	r1, r1, lsl #12
 80042a4:	f44f 1c80 	mov.w	ip, #1048576	; 0x100000
 80042a8:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 80042ac:	d002      	beq.n	80042b4 <__adddf3+0x70>
 80042ae:	4240      	negs	r0, r0
 80042b0:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80042b4:	f013 4f00 	tst.w	r3, #2147483648	; 0x80000000
 80042b8:	ea4f 3303 	mov.w	r3, r3, lsl #12
 80042bc:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 80042c0:	d002      	beq.n	80042c8 <__adddf3+0x84>
 80042c2:	4252      	negs	r2, r2
 80042c4:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 80042c8:	ea94 0f05 	teq	r4, r5
 80042cc:	f000 80a7 	beq.w	800441e <__adddf3+0x1da>
 80042d0:	f1a4 0401 	sub.w	r4, r4, #1
 80042d4:	f1d5 0e20 	rsbs	lr, r5, #32
 80042d8:	db0d      	blt.n	80042f6 <__adddf3+0xb2>
 80042da:	fa02 fc0e 	lsl.w	ip, r2, lr
 80042de:	fa22 f205 	lsr.w	r2, r2, r5
 80042e2:	1880      	adds	r0, r0, r2
 80042e4:	f141 0100 	adc.w	r1, r1, #0
 80042e8:	fa03 f20e 	lsl.w	r2, r3, lr
 80042ec:	1880      	adds	r0, r0, r2
 80042ee:	fa43 f305 	asr.w	r3, r3, r5
 80042f2:	4159      	adcs	r1, r3
 80042f4:	e00e      	b.n	8004314 <__adddf3+0xd0>
 80042f6:	f1a5 0520 	sub.w	r5, r5, #32
 80042fa:	f10e 0e20 	add.w	lr, lr, #32
 80042fe:	2a01      	cmp	r2, #1
 8004300:	fa03 fc0e 	lsl.w	ip, r3, lr
 8004304:	bf28      	it	cs
 8004306:	f04c 0c02 	orrcs.w	ip, ip, #2
 800430a:	fa43 f305 	asr.w	r3, r3, r5
 800430e:	18c0      	adds	r0, r0, r3
 8004310:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 8004314:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004318:	d507      	bpl.n	800432a <__adddf3+0xe6>
 800431a:	f04f 0e00 	mov.w	lr, #0
 800431e:	f1dc 0c00 	rsbs	ip, ip, #0
 8004322:	eb7e 0000 	sbcs.w	r0, lr, r0
 8004326:	eb6e 0101 	sbc.w	r1, lr, r1
 800432a:	f5b1 1f80 	cmp.w	r1, #1048576	; 0x100000
 800432e:	d31b      	bcc.n	8004368 <__adddf3+0x124>
 8004330:	f5b1 1f00 	cmp.w	r1, #2097152	; 0x200000
 8004334:	d30c      	bcc.n	8004350 <__adddf3+0x10c>
 8004336:	0849      	lsrs	r1, r1, #1
 8004338:	ea5f 0030 	movs.w	r0, r0, rrx
 800433c:	ea4f 0c3c 	mov.w	ip, ip, rrx
 8004340:	f104 0401 	add.w	r4, r4, #1
 8004344:	ea4f 5244 	mov.w	r2, r4, lsl #21
 8004348:	f512 0f80 	cmn.w	r2, #4194304	; 0x400000
 800434c:	f080 809a 	bcs.w	8004484 <__adddf3+0x240>
 8004350:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
 8004354:	bf08      	it	eq
 8004356:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 800435a:	f150 0000 	adcs.w	r0, r0, #0
 800435e:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 8004362:	ea41 0105 	orr.w	r1, r1, r5
 8004366:	bd30      	pop	{r4, r5, pc}
 8004368:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 800436c:	4140      	adcs	r0, r0
 800436e:	eb41 0101 	adc.w	r1, r1, r1
 8004372:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004376:	f1a4 0401 	sub.w	r4, r4, #1
 800437a:	d1e9      	bne.n	8004350 <__adddf3+0x10c>
 800437c:	f091 0f00 	teq	r1, #0
 8004380:	bf04      	itt	eq
 8004382:	4601      	moveq	r1, r0
 8004384:	2000      	moveq	r0, #0
 8004386:	fab1 f381 	clz	r3, r1
 800438a:	bf08      	it	eq
 800438c:	3320      	addeq	r3, #32
 800438e:	f1a3 030b 	sub.w	r3, r3, #11
 8004392:	f1b3 0220 	subs.w	r2, r3, #32
 8004396:	da0c      	bge.n	80043b2 <__adddf3+0x16e>
 8004398:	320c      	adds	r2, #12
 800439a:	dd08      	ble.n	80043ae <__adddf3+0x16a>
 800439c:	f102 0c14 	add.w	ip, r2, #20
 80043a0:	f1c2 020c 	rsb	r2, r2, #12
 80043a4:	fa01 f00c 	lsl.w	r0, r1, ip
 80043a8:	fa21 f102 	lsr.w	r1, r1, r2
 80043ac:	e00c      	b.n	80043c8 <__adddf3+0x184>
 80043ae:	f102 0214 	add.w	r2, r2, #20
 80043b2:	bfd8      	it	le
 80043b4:	f1c2 0c20 	rsble	ip, r2, #32
 80043b8:	fa01 f102 	lsl.w	r1, r1, r2
 80043bc:	fa20 fc0c 	lsr.w	ip, r0, ip
 80043c0:	bfdc      	itt	le
 80043c2:	ea41 010c 	orrle.w	r1, r1, ip
 80043c6:	4090      	lslle	r0, r2
 80043c8:	1ae4      	subs	r4, r4, r3
 80043ca:	bfa2      	ittt	ge
 80043cc:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 80043d0:	4329      	orrge	r1, r5
 80043d2:	bd30      	popge	{r4, r5, pc}
 80043d4:	ea6f 0404 	mvn.w	r4, r4
 80043d8:	3c1f      	subs	r4, #31
 80043da:	da1c      	bge.n	8004416 <__adddf3+0x1d2>
 80043dc:	340c      	adds	r4, #12
 80043de:	dc0e      	bgt.n	80043fe <__adddf3+0x1ba>
 80043e0:	f104 0414 	add.w	r4, r4, #20
 80043e4:	f1c4 0220 	rsb	r2, r4, #32
 80043e8:	fa20 f004 	lsr.w	r0, r0, r4
 80043ec:	fa01 f302 	lsl.w	r3, r1, r2
 80043f0:	ea40 0003 	orr.w	r0, r0, r3
 80043f4:	fa21 f304 	lsr.w	r3, r1, r4
 80043f8:	ea45 0103 	orr.w	r1, r5, r3
 80043fc:	bd30      	pop	{r4, r5, pc}
 80043fe:	f1c4 040c 	rsb	r4, r4, #12
 8004402:	f1c4 0220 	rsb	r2, r4, #32
 8004406:	fa20 f002 	lsr.w	r0, r0, r2
 800440a:	fa01 f304 	lsl.w	r3, r1, r4
 800440e:	ea40 0003 	orr.w	r0, r0, r3
 8004412:	4629      	mov	r1, r5
 8004414:	bd30      	pop	{r4, r5, pc}
 8004416:	fa21 f004 	lsr.w	r0, r1, r4
 800441a:	4629      	mov	r1, r5
 800441c:	bd30      	pop	{r4, r5, pc}
 800441e:	f094 0f00 	teq	r4, #0
 8004422:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
 8004426:	bf06      	itte	eq
 8004428:	f481 1180 	eoreq.w	r1, r1, #1048576	; 0x100000
 800442c:	3401      	addeq	r4, #1
 800442e:	3d01      	subne	r5, #1
 8004430:	e74e      	b.n	80042d0 <__adddf3+0x8c>
 8004432:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 8004436:	bf18      	it	ne
 8004438:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 800443c:	d029      	beq.n	8004492 <__adddf3+0x24e>
 800443e:	ea94 0f05 	teq	r4, r5
 8004442:	bf08      	it	eq
 8004444:	ea90 0f02 	teqeq	r0, r2
 8004448:	d005      	beq.n	8004456 <__adddf3+0x212>
 800444a:	ea54 0c00 	orrs.w	ip, r4, r0
 800444e:	bf04      	itt	eq
 8004450:	4619      	moveq	r1, r3
 8004452:	4610      	moveq	r0, r2
 8004454:	bd30      	pop	{r4, r5, pc}
 8004456:	ea91 0f03 	teq	r1, r3
 800445a:	bf1e      	ittt	ne
 800445c:	2100      	movne	r1, #0
 800445e:	2000      	movne	r0, #0
 8004460:	bd30      	popne	{r4, r5, pc}
 8004462:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 8004466:	d105      	bne.n	8004474 <__adddf3+0x230>
 8004468:	0040      	lsls	r0, r0, #1
 800446a:	4149      	adcs	r1, r1
 800446c:	bf28      	it	cs
 800446e:	f041 4100 	orrcs.w	r1, r1, #2147483648	; 0x80000000
 8004472:	bd30      	pop	{r4, r5, pc}
 8004474:	f514 0480 	adds.w	r4, r4, #4194304	; 0x400000
 8004478:	bf3c      	itt	cc
 800447a:	f501 1180 	addcc.w	r1, r1, #1048576	; 0x100000
 800447e:	bd30      	popcc	{r4, r5, pc}
 8004480:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004484:	f045 41fe 	orr.w	r1, r5, #2130706432	; 0x7f000000
 8004488:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 800448c:	f04f 0000 	mov.w	r0, #0
 8004490:	bd30      	pop	{r4, r5, pc}
 8004492:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 8004496:	bf1a      	itte	ne
 8004498:	4619      	movne	r1, r3
 800449a:	4610      	movne	r0, r2
 800449c:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 80044a0:	bf1c      	itt	ne
 80044a2:	460b      	movne	r3, r1
 80044a4:	4602      	movne	r2, r0
 80044a6:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 80044aa:	bf06      	itte	eq
 80044ac:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 80044b0:	ea91 0f03 	teqeq	r1, r3
 80044b4:	f441 2100 	orrne.w	r1, r1, #524288	; 0x80000
 80044b8:	bd30      	pop	{r4, r5, pc}
 80044ba:	bf00      	nop

080044bc <__aeabi_ui2d>:
 80044bc:	f090 0f00 	teq	r0, #0
 80044c0:	bf04      	itt	eq
 80044c2:	2100      	moveq	r1, #0
 80044c4:	4770      	bxeq	lr
 80044c6:	b530      	push	{r4, r5, lr}
 80044c8:	f44f 6480 	mov.w	r4, #1024	; 0x400
 80044cc:	f104 0432 	add.w	r4, r4, #50	; 0x32
 80044d0:	f04f 0500 	mov.w	r5, #0
 80044d4:	f04f 0100 	mov.w	r1, #0
 80044d8:	e750      	b.n	800437c <__adddf3+0x138>
 80044da:	bf00      	nop

080044dc <__aeabi_i2d>:
 80044dc:	f090 0f00 	teq	r0, #0
 80044e0:	bf04      	itt	eq
 80044e2:	2100      	moveq	r1, #0
 80044e4:	4770      	bxeq	lr
 80044e6:	b530      	push	{r4, r5, lr}
 80044e8:	f44f 6480 	mov.w	r4, #1024	; 0x400
 80044ec:	f104 0432 	add.w	r4, r4, #50	; 0x32
 80044f0:	f010 4500 	ands.w	r5, r0, #2147483648	; 0x80000000
 80044f4:	bf48      	it	mi
 80044f6:	4240      	negmi	r0, r0
 80044f8:	f04f 0100 	mov.w	r1, #0
 80044fc:	e73e      	b.n	800437c <__adddf3+0x138>
 80044fe:	bf00      	nop

08004500 <__aeabi_f2d>:
 8004500:	0042      	lsls	r2, r0, #1
 8004502:	ea4f 01e2 	mov.w	r1, r2, asr #3
 8004506:	ea4f 0131 	mov.w	r1, r1, rrx
 800450a:	ea4f 7002 	mov.w	r0, r2, lsl #28
 800450e:	bf1f      	itttt	ne
 8004510:	f012 437f 	andsne.w	r3, r2, #4278190080	; 0xff000000
 8004514:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004518:	f081 5160 	eorne.w	r1, r1, #939524096	; 0x38000000
 800451c:	4770      	bxne	lr
 800451e:	f092 0f00 	teq	r2, #0
 8004522:	bf14      	ite	ne
 8004524:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004528:	4770      	bxeq	lr
 800452a:	b530      	push	{r4, r5, lr}
 800452c:	f44f 7460 	mov.w	r4, #896	; 0x380
 8004530:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004534:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 8004538:	e720      	b.n	800437c <__adddf3+0x138>
 800453a:	bf00      	nop

0800453c <__aeabi_ul2d>:
 800453c:	ea50 0201 	orrs.w	r2, r0, r1
 8004540:	bf08      	it	eq
 8004542:	4770      	bxeq	lr
 8004544:	b530      	push	{r4, r5, lr}
 8004546:	f04f 0500 	mov.w	r5, #0
 800454a:	e00a      	b.n	8004562 <__aeabi_l2d+0x16>

0800454c <__aeabi_l2d>:
 800454c:	ea50 0201 	orrs.w	r2, r0, r1
 8004550:	bf08      	it	eq
 8004552:	4770      	bxeq	lr
 8004554:	b530      	push	{r4, r5, lr}
 8004556:	f011 4500 	ands.w	r5, r1, #2147483648	; 0x80000000
 800455a:	d502      	bpl.n	8004562 <__aeabi_l2d+0x16>
 800455c:	4240      	negs	r0, r0
 800455e:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8004562:	f44f 6480 	mov.w	r4, #1024	; 0x400
 8004566:	f104 0432 	add.w	r4, r4, #50	; 0x32
 800456a:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 800456e:	f43f aedc 	beq.w	800432a <__adddf3+0xe6>
 8004572:	f04f 0203 	mov.w	r2, #3
 8004576:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 800457a:	bf18      	it	ne
 800457c:	3203      	addne	r2, #3
 800457e:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8004582:	bf18      	it	ne
 8004584:	3203      	addne	r2, #3
 8004586:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 800458a:	f1c2 0320 	rsb	r3, r2, #32
 800458e:	fa00 fc03 	lsl.w	ip, r0, r3
 8004592:	fa20 f002 	lsr.w	r0, r0, r2
 8004596:	fa01 fe03 	lsl.w	lr, r1, r3
 800459a:	ea40 000e 	orr.w	r0, r0, lr
 800459e:	fa21 f102 	lsr.w	r1, r1, r2
 80045a2:	4414      	add	r4, r2
 80045a4:	e6c1      	b.n	800432a <__adddf3+0xe6>
 80045a6:	bf00      	nop

080045a8 <__aeabi_dmul>:
 80045a8:	b570      	push	{r4, r5, r6, lr}
 80045aa:	f04f 0cff 	mov.w	ip, #255	; 0xff
 80045ae:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 80045b2:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 80045b6:	bf1d      	ittte	ne
 80045b8:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 80045bc:	ea94 0f0c 	teqne	r4, ip
 80045c0:	ea95 0f0c 	teqne	r5, ip
 80045c4:	f000 f8de 	bleq	8004784 <__aeabi_dmul+0x1dc>
 80045c8:	442c      	add	r4, r5
 80045ca:	ea81 0603 	eor.w	r6, r1, r3
 80045ce:	ea21 514c 	bic.w	r1, r1, ip, lsl #21
 80045d2:	ea23 534c 	bic.w	r3, r3, ip, lsl #21
 80045d6:	ea50 3501 	orrs.w	r5, r0, r1, lsl #12
 80045da:	bf18      	it	ne
 80045dc:	ea52 3503 	orrsne.w	r5, r2, r3, lsl #12
 80045e0:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 80045e4:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
 80045e8:	d038      	beq.n	800465c <__aeabi_dmul+0xb4>
 80045ea:	fba0 ce02 	umull	ip, lr, r0, r2
 80045ee:	f04f 0500 	mov.w	r5, #0
 80045f2:	fbe1 e502 	umlal	lr, r5, r1, r2
 80045f6:	f006 4200 	and.w	r2, r6, #2147483648	; 0x80000000
 80045fa:	fbe0 e503 	umlal	lr, r5, r0, r3
 80045fe:	f04f 0600 	mov.w	r6, #0
 8004602:	fbe1 5603 	umlal	r5, r6, r1, r3
 8004606:	f09c 0f00 	teq	ip, #0
 800460a:	bf18      	it	ne
 800460c:	f04e 0e01 	orrne.w	lr, lr, #1
 8004610:	f1a4 04ff 	sub.w	r4, r4, #255	; 0xff
 8004614:	f5b6 7f00 	cmp.w	r6, #512	; 0x200
 8004618:	f564 7440 	sbc.w	r4, r4, #768	; 0x300
 800461c:	d204      	bcs.n	8004628 <__aeabi_dmul+0x80>
 800461e:	ea5f 0e4e 	movs.w	lr, lr, lsl #1
 8004622:	416d      	adcs	r5, r5
 8004624:	eb46 0606 	adc.w	r6, r6, r6
 8004628:	ea42 21c6 	orr.w	r1, r2, r6, lsl #11
 800462c:	ea41 5155 	orr.w	r1, r1, r5, lsr #21
 8004630:	ea4f 20c5 	mov.w	r0, r5, lsl #11
 8004634:	ea40 505e 	orr.w	r0, r0, lr, lsr #21
 8004638:	ea4f 2ece 	mov.w	lr, lr, lsl #11
 800463c:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 8004640:	bf88      	it	hi
 8004642:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 8004646:	d81e      	bhi.n	8004686 <__aeabi_dmul+0xde>
 8004648:	f1be 4f00 	cmp.w	lr, #2147483648	; 0x80000000
 800464c:	bf08      	it	eq
 800464e:	ea5f 0e50 	movseq.w	lr, r0, lsr #1
 8004652:	f150 0000 	adcs.w	r0, r0, #0
 8004656:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 800465a:	bd70      	pop	{r4, r5, r6, pc}
 800465c:	f006 4600 	and.w	r6, r6, #2147483648	; 0x80000000
 8004660:	ea46 0101 	orr.w	r1, r6, r1
 8004664:	ea40 0002 	orr.w	r0, r0, r2
 8004668:	ea81 0103 	eor.w	r1, r1, r3
 800466c:	ebb4 045c 	subs.w	r4, r4, ip, lsr #1
 8004670:	bfc2      	ittt	gt
 8004672:	ebd4 050c 	rsbsgt	r5, r4, ip
 8004676:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 800467a:	bd70      	popgt	{r4, r5, r6, pc}
 800467c:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004680:	f04f 0e00 	mov.w	lr, #0
 8004684:	3c01      	subs	r4, #1
 8004686:	f300 80ab 	bgt.w	80047e0 <__aeabi_dmul+0x238>
 800468a:	f114 0f36 	cmn.w	r4, #54	; 0x36
 800468e:	bfde      	ittt	le
 8004690:	2000      	movle	r0, #0
 8004692:	f001 4100 	andle.w	r1, r1, #2147483648	; 0x80000000
 8004696:	bd70      	pople	{r4, r5, r6, pc}
 8004698:	f1c4 0400 	rsb	r4, r4, #0
 800469c:	3c20      	subs	r4, #32
 800469e:	da35      	bge.n	800470c <__aeabi_dmul+0x164>
 80046a0:	340c      	adds	r4, #12
 80046a2:	dc1b      	bgt.n	80046dc <__aeabi_dmul+0x134>
 80046a4:	f104 0414 	add.w	r4, r4, #20
 80046a8:	f1c4 0520 	rsb	r5, r4, #32
 80046ac:	fa00 f305 	lsl.w	r3, r0, r5
 80046b0:	fa20 f004 	lsr.w	r0, r0, r4
 80046b4:	fa01 f205 	lsl.w	r2, r1, r5
 80046b8:	ea40 0002 	orr.w	r0, r0, r2
 80046bc:	f001 4200 	and.w	r2, r1, #2147483648	; 0x80000000
 80046c0:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 80046c4:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 80046c8:	fa21 f604 	lsr.w	r6, r1, r4
 80046cc:	eb42 0106 	adc.w	r1, r2, r6
 80046d0:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 80046d4:	bf08      	it	eq
 80046d6:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 80046da:	bd70      	pop	{r4, r5, r6, pc}
 80046dc:	f1c4 040c 	rsb	r4, r4, #12
 80046e0:	f1c4 0520 	rsb	r5, r4, #32
 80046e4:	fa00 f304 	lsl.w	r3, r0, r4
 80046e8:	fa20 f005 	lsr.w	r0, r0, r5
 80046ec:	fa01 f204 	lsl.w	r2, r1, r4
 80046f0:	ea40 0002 	orr.w	r0, r0, r2
 80046f4:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80046f8:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 80046fc:	f141 0100 	adc.w	r1, r1, #0
 8004700:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 8004704:	bf08      	it	eq
 8004706:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 800470a:	bd70      	pop	{r4, r5, r6, pc}
 800470c:	f1c4 0520 	rsb	r5, r4, #32
 8004710:	fa00 f205 	lsl.w	r2, r0, r5
 8004714:	ea4e 0e02 	orr.w	lr, lr, r2
 8004718:	fa20 f304 	lsr.w	r3, r0, r4
 800471c:	fa01 f205 	lsl.w	r2, r1, r5
 8004720:	ea43 0302 	orr.w	r3, r3, r2
 8004724:	fa21 f004 	lsr.w	r0, r1, r4
 8004728:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 800472c:	fa21 f204 	lsr.w	r2, r1, r4
 8004730:	ea20 0002 	bic.w	r0, r0, r2
 8004734:	eb00 70d3 	add.w	r0, r0, r3, lsr #31
 8004738:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 800473c:	bf08      	it	eq
 800473e:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 8004742:	bd70      	pop	{r4, r5, r6, pc}
 8004744:	f094 0f00 	teq	r4, #0
 8004748:	d10f      	bne.n	800476a <__aeabi_dmul+0x1c2>
 800474a:	f001 4600 	and.w	r6, r1, #2147483648	; 0x80000000
 800474e:	0040      	lsls	r0, r0, #1
 8004750:	eb41 0101 	adc.w	r1, r1, r1
 8004754:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004758:	bf08      	it	eq
 800475a:	3c01      	subeq	r4, #1
 800475c:	d0f7      	beq.n	800474e <__aeabi_dmul+0x1a6>
 800475e:	ea41 0106 	orr.w	r1, r1, r6
 8004762:	f095 0f00 	teq	r5, #0
 8004766:	bf18      	it	ne
 8004768:	4770      	bxne	lr
 800476a:	f003 4600 	and.w	r6, r3, #2147483648	; 0x80000000
 800476e:	0052      	lsls	r2, r2, #1
 8004770:	eb43 0303 	adc.w	r3, r3, r3
 8004774:	f413 1f80 	tst.w	r3, #1048576	; 0x100000
 8004778:	bf08      	it	eq
 800477a:	3d01      	subeq	r5, #1
 800477c:	d0f7      	beq.n	800476e <__aeabi_dmul+0x1c6>
 800477e:	ea43 0306 	orr.w	r3, r3, r6
 8004782:	4770      	bx	lr
 8004784:	ea94 0f0c 	teq	r4, ip
 8004788:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 800478c:	bf18      	it	ne
 800478e:	ea95 0f0c 	teqne	r5, ip
 8004792:	d00c      	beq.n	80047ae <__aeabi_dmul+0x206>
 8004794:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 8004798:	bf18      	it	ne
 800479a:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 800479e:	d1d1      	bne.n	8004744 <__aeabi_dmul+0x19c>
 80047a0:	ea81 0103 	eor.w	r1, r1, r3
 80047a4:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047a8:	f04f 0000 	mov.w	r0, #0
 80047ac:	bd70      	pop	{r4, r5, r6, pc}
 80047ae:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80047b2:	bf06      	itte	eq
 80047b4:	4610      	moveq	r0, r2
 80047b6:	4619      	moveq	r1, r3
 80047b8:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80047bc:	d019      	beq.n	80047f2 <__aeabi_dmul+0x24a>
 80047be:	ea94 0f0c 	teq	r4, ip
 80047c2:	d102      	bne.n	80047ca <__aeabi_dmul+0x222>
 80047c4:	ea50 3601 	orrs.w	r6, r0, r1, lsl #12
 80047c8:	d113      	bne.n	80047f2 <__aeabi_dmul+0x24a>
 80047ca:	ea95 0f0c 	teq	r5, ip
 80047ce:	d105      	bne.n	80047dc <__aeabi_dmul+0x234>
 80047d0:	ea52 3603 	orrs.w	r6, r2, r3, lsl #12
 80047d4:	bf1c      	itt	ne
 80047d6:	4610      	movne	r0, r2
 80047d8:	4619      	movne	r1, r3
 80047da:	d10a      	bne.n	80047f2 <__aeabi_dmul+0x24a>
 80047dc:	ea81 0103 	eor.w	r1, r1, r3
 80047e0:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047e4:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 80047e8:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 80047ec:	f04f 0000 	mov.w	r0, #0
 80047f0:	bd70      	pop	{r4, r5, r6, pc}
 80047f2:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 80047f6:	f441 0178 	orr.w	r1, r1, #16252928	; 0xf80000
 80047fa:	bd70      	pop	{r4, r5, r6, pc}

080047fc <__aeabi_ddiv>:
 80047fc:	b570      	push	{r4, r5, r6, lr}
 80047fe:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004802:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 8004806:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 800480a:	bf1d      	ittte	ne
 800480c:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 8004810:	ea94 0f0c 	teqne	r4, ip
 8004814:	ea95 0f0c 	teqne	r5, ip
 8004818:	f000 f8a7 	bleq	800496a <__aeabi_ddiv+0x16e>
 800481c:	eba4 0405 	sub.w	r4, r4, r5
 8004820:	ea81 0e03 	eor.w	lr, r1, r3
 8004824:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 8004828:	ea4f 3101 	mov.w	r1, r1, lsl #12
 800482c:	f000 8088 	beq.w	8004940 <__aeabi_ddiv+0x144>
 8004830:	ea4f 3303 	mov.w	r3, r3, lsl #12
 8004834:	f04f 5580 	mov.w	r5, #268435456	; 0x10000000
 8004838:	ea45 1313 	orr.w	r3, r5, r3, lsr #4
 800483c:	ea43 6312 	orr.w	r3, r3, r2, lsr #24
 8004840:	ea4f 2202 	mov.w	r2, r2, lsl #8
 8004844:	ea45 1511 	orr.w	r5, r5, r1, lsr #4
 8004848:	ea45 6510 	orr.w	r5, r5, r0, lsr #24
 800484c:	ea4f 2600 	mov.w	r6, r0, lsl #8
 8004850:	f00e 4100 	and.w	r1, lr, #2147483648	; 0x80000000
 8004854:	429d      	cmp	r5, r3
 8004856:	bf08      	it	eq
 8004858:	4296      	cmpeq	r6, r2
 800485a:	f144 04fd 	adc.w	r4, r4, #253	; 0xfd
 800485e:	f504 7440 	add.w	r4, r4, #768	; 0x300
 8004862:	d202      	bcs.n	800486a <__aeabi_ddiv+0x6e>
 8004864:	085b      	lsrs	r3, r3, #1
 8004866:	ea4f 0232 	mov.w	r2, r2, rrx
 800486a:	1ab6      	subs	r6, r6, r2
 800486c:	eb65 0503 	sbc.w	r5, r5, r3
 8004870:	085b      	lsrs	r3, r3, #1
 8004872:	ea4f 0232 	mov.w	r2, r2, rrx
 8004876:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
 800487a:	f44f 2c00 	mov.w	ip, #524288	; 0x80000
 800487e:	ebb6 0e02 	subs.w	lr, r6, r2
 8004882:	eb75 0e03 	sbcs.w	lr, r5, r3
 8004886:	bf22      	ittt	cs
 8004888:	1ab6      	subcs	r6, r6, r2
 800488a:	4675      	movcs	r5, lr
 800488c:	ea40 000c 	orrcs.w	r0, r0, ip
 8004890:	085b      	lsrs	r3, r3, #1
 8004892:	ea4f 0232 	mov.w	r2, r2, rrx
 8004896:	ebb6 0e02 	subs.w	lr, r6, r2
 800489a:	eb75 0e03 	sbcs.w	lr, r5, r3
 800489e:	bf22      	ittt	cs
 80048a0:	1ab6      	subcs	r6, r6, r2
 80048a2:	4675      	movcs	r5, lr
 80048a4:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
 80048a8:	085b      	lsrs	r3, r3, #1
 80048aa:	ea4f 0232 	mov.w	r2, r2, rrx
 80048ae:	ebb6 0e02 	subs.w	lr, r6, r2
 80048b2:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048b6:	bf22      	ittt	cs
 80048b8:	1ab6      	subcs	r6, r6, r2
 80048ba:	4675      	movcs	r5, lr
 80048bc:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
 80048c0:	085b      	lsrs	r3, r3, #1
 80048c2:	ea4f 0232 	mov.w	r2, r2, rrx
 80048c6:	ebb6 0e02 	subs.w	lr, r6, r2
 80048ca:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048ce:	bf22      	ittt	cs
 80048d0:	1ab6      	subcs	r6, r6, r2
 80048d2:	4675      	movcs	r5, lr
 80048d4:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
 80048d8:	ea55 0e06 	orrs.w	lr, r5, r6
 80048dc:	d018      	beq.n	8004910 <__aeabi_ddiv+0x114>
 80048de:	ea4f 1505 	mov.w	r5, r5, lsl #4
 80048e2:	ea45 7516 	orr.w	r5, r5, r6, lsr #28
 80048e6:	ea4f 1606 	mov.w	r6, r6, lsl #4
 80048ea:	ea4f 03c3 	mov.w	r3, r3, lsl #3
 80048ee:	ea43 7352 	orr.w	r3, r3, r2, lsr #29
 80048f2:	ea4f 02c2 	mov.w	r2, r2, lsl #3
 80048f6:	ea5f 1c1c 	movs.w	ip, ip, lsr #4
 80048fa:	d1c0      	bne.n	800487e <__aeabi_ddiv+0x82>
 80048fc:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004900:	d10b      	bne.n	800491a <__aeabi_ddiv+0x11e>
 8004902:	ea41 0100 	orr.w	r1, r1, r0
 8004906:	f04f 0000 	mov.w	r0, #0
 800490a:	f04f 4c00 	mov.w	ip, #2147483648	; 0x80000000
 800490e:	e7b6      	b.n	800487e <__aeabi_ddiv+0x82>
 8004910:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004914:	bf04      	itt	eq
 8004916:	4301      	orreq	r1, r0
 8004918:	2000      	moveq	r0, #0
 800491a:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 800491e:	bf88      	it	hi
 8004920:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 8004924:	f63f aeaf 	bhi.w	8004686 <__aeabi_dmul+0xde>
 8004928:	ebb5 0c03 	subs.w	ip, r5, r3
 800492c:	bf04      	itt	eq
 800492e:	ebb6 0c02 	subseq.w	ip, r6, r2
 8004932:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 8004936:	f150 0000 	adcs.w	r0, r0, #0
 800493a:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 800493e:	bd70      	pop	{r4, r5, r6, pc}
 8004940:	f00e 4e00 	and.w	lr, lr, #2147483648	; 0x80000000
 8004944:	ea4e 3111 	orr.w	r1, lr, r1, lsr #12
 8004948:	eb14 045c 	adds.w	r4, r4, ip, lsr #1
 800494c:	bfc2      	ittt	gt
 800494e:	ebd4 050c 	rsbsgt	r5, r4, ip
 8004952:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 8004956:	bd70      	popgt	{r4, r5, r6, pc}
 8004958:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 800495c:	f04f 0e00 	mov.w	lr, #0
 8004960:	3c01      	subs	r4, #1
 8004962:	e690      	b.n	8004686 <__aeabi_dmul+0xde>
 8004964:	ea45 0e06 	orr.w	lr, r5, r6
 8004968:	e68d      	b.n	8004686 <__aeabi_dmul+0xde>
 800496a:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 800496e:	ea94 0f0c 	teq	r4, ip
 8004972:	bf08      	it	eq
 8004974:	ea95 0f0c 	teqeq	r5, ip
 8004978:	f43f af3b 	beq.w	80047f2 <__aeabi_dmul+0x24a>
 800497c:	ea94 0f0c 	teq	r4, ip
 8004980:	d10a      	bne.n	8004998 <__aeabi_ddiv+0x19c>
 8004982:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 8004986:	f47f af34 	bne.w	80047f2 <__aeabi_dmul+0x24a>
 800498a:	ea95 0f0c 	teq	r5, ip
 800498e:	f47f af25 	bne.w	80047dc <__aeabi_dmul+0x234>
 8004992:	4610      	mov	r0, r2
 8004994:	4619      	mov	r1, r3
 8004996:	e72c      	b.n	80047f2 <__aeabi_dmul+0x24a>
 8004998:	ea95 0f0c 	teq	r5, ip
 800499c:	d106      	bne.n	80049ac <__aeabi_ddiv+0x1b0>
 800499e:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 80049a2:	f43f aefd 	beq.w	80047a0 <__aeabi_dmul+0x1f8>
 80049a6:	4610      	mov	r0, r2
 80049a8:	4619      	mov	r1, r3
 80049aa:	e722      	b.n	80047f2 <__aeabi_dmul+0x24a>
 80049ac:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80049b0:	bf18      	it	ne
 80049b2:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80049b6:	f47f aec5 	bne.w	8004744 <__aeabi_dmul+0x19c>
 80049ba:	ea50 0441 	orrs.w	r4, r0, r1, lsl #1
 80049be:	f47f af0d 	bne.w	80047dc <__aeabi_dmul+0x234>
 80049c2:	ea52 0543 	orrs.w	r5, r2, r3, lsl #1
 80049c6:	f47f aeeb 	bne.w	80047a0 <__aeabi_dmul+0x1f8>
 80049ca:	e712      	b.n	80047f2 <__aeabi_dmul+0x24a>

080049cc <__gedf2>:
 80049cc:	f04f 3cff 	mov.w	ip, #4294967295
 80049d0:	e006      	b.n	80049e0 <__cmpdf2+0x4>
 80049d2:	bf00      	nop

080049d4 <__ledf2>:
 80049d4:	f04f 0c01 	mov.w	ip, #1
 80049d8:	e002      	b.n	80049e0 <__cmpdf2+0x4>
 80049da:	bf00      	nop

080049dc <__cmpdf2>:
 80049dc:	f04f 0c01 	mov.w	ip, #1
 80049e0:	f84d cd04 	str.w	ip, [sp, #-4]!
 80049e4:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 80049e8:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 80049ec:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 80049f0:	bf18      	it	ne
 80049f2:	ea7f 5c6c 	mvnsne.w	ip, ip, asr #21
 80049f6:	d01b      	beq.n	8004a30 <__cmpdf2+0x54>
 80049f8:	b001      	add	sp, #4
 80049fa:	ea50 0c41 	orrs.w	ip, r0, r1, lsl #1
 80049fe:	bf0c      	ite	eq
 8004a00:	ea52 0c43 	orrseq.w	ip, r2, r3, lsl #1
 8004a04:	ea91 0f03 	teqne	r1, r3
 8004a08:	bf02      	ittt	eq
 8004a0a:	ea90 0f02 	teqeq	r0, r2
 8004a0e:	2000      	moveq	r0, #0
 8004a10:	4770      	bxeq	lr
 8004a12:	f110 0f00 	cmn.w	r0, #0
 8004a16:	ea91 0f03 	teq	r1, r3
 8004a1a:	bf58      	it	pl
 8004a1c:	4299      	cmppl	r1, r3
 8004a1e:	bf08      	it	eq
 8004a20:	4290      	cmpeq	r0, r2
 8004a22:	bf2c      	ite	cs
 8004a24:	17d8      	asrcs	r0, r3, #31
 8004a26:	ea6f 70e3 	mvncc.w	r0, r3, asr #31
 8004a2a:	f040 0001 	orr.w	r0, r0, #1
 8004a2e:	4770      	bx	lr
 8004a30:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004a34:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a38:	d102      	bne.n	8004a40 <__cmpdf2+0x64>
 8004a3a:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004a3e:	d107      	bne.n	8004a50 <__cmpdf2+0x74>
 8004a40:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004a44:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a48:	d1d6      	bne.n	80049f8 <__cmpdf2+0x1c>
 8004a4a:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004a4e:	d0d3      	beq.n	80049f8 <__cmpdf2+0x1c>
 8004a50:	f85d 0b04 	ldr.w	r0, [sp], #4
 8004a54:	4770      	bx	lr
 8004a56:	bf00      	nop

08004a58 <__aeabi_cdrcmple>:
 8004a58:	4684      	mov	ip, r0
 8004a5a:	4610      	mov	r0, r2
 8004a5c:	4662      	mov	r2, ip
 8004a5e:	468c      	mov	ip, r1
 8004a60:	4619      	mov	r1, r3
 8004a62:	4663      	mov	r3, ip
 8004a64:	e000      	b.n	8004a68 <__aeabi_cdcmpeq>
 8004a66:	bf00      	nop

08004a68 <__aeabi_cdcmpeq>:
 8004a68:	b501      	push	{r0, lr}
 8004a6a:	f7ff ffb7 	bl	80049dc <__cmpdf2>
 8004a6e:	2800      	cmp	r0, #0
 8004a70:	bf48      	it	mi
 8004a72:	f110 0f00 	cmnmi.w	r0, #0
 8004a76:	bd01      	pop	{r0, pc}

08004a78 <__aeabi_dcmpeq>:
 8004a78:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004a7c:	f7ff fff4 	bl	8004a68 <__aeabi_cdcmpeq>
 8004a80:	bf0c      	ite	eq
 8004a82:	2001      	moveq	r0, #1
 8004a84:	2000      	movne	r0, #0
 8004a86:	f85d fb08 	ldr.w	pc, [sp], #8
 8004a8a:	bf00      	nop

08004a8c <__aeabi_dcmplt>:
 8004a8c:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004a90:	f7ff ffea 	bl	8004a68 <__aeabi_cdcmpeq>
 8004a94:	bf34      	ite	cc
 8004a96:	2001      	movcc	r0, #1
 8004a98:	2000      	movcs	r0, #0
 8004a9a:	f85d fb08 	ldr.w	pc, [sp], #8
 8004a9e:	bf00      	nop

08004aa0 <__aeabi_dcmple>:
 8004aa0:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004aa4:	f7ff ffe0 	bl	8004a68 <__aeabi_cdcmpeq>
 8004aa8:	bf94      	ite	ls
 8004aaa:	2001      	movls	r0, #1
 8004aac:	2000      	movhi	r0, #0
 8004aae:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ab2:	bf00      	nop

08004ab4 <__aeabi_dcmpge>:
 8004ab4:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004ab8:	f7ff ffce 	bl	8004a58 <__aeabi_cdrcmple>
 8004abc:	bf94      	ite	ls
 8004abe:	2001      	movls	r0, #1
 8004ac0:	2000      	movhi	r0, #0
 8004ac2:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ac6:	bf00      	nop

08004ac8 <__aeabi_dcmpgt>:
 8004ac8:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004acc:	f7ff ffc4 	bl	8004a58 <__aeabi_cdrcmple>
 8004ad0:	bf34      	ite	cc
 8004ad2:	2001      	movcc	r0, #1
 8004ad4:	2000      	movcs	r0, #0
 8004ad6:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ada:	bf00      	nop

08004adc <__aeabi_dcmpun>:
 8004adc:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004ae0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004ae4:	d102      	bne.n	8004aec <__aeabi_dcmpun+0x10>
 8004ae6:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004aea:	d10a      	bne.n	8004b02 <__aeabi_dcmpun+0x26>
 8004aec:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004af0:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004af4:	d102      	bne.n	8004afc <__aeabi_dcmpun+0x20>
 8004af6:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004afa:	d102      	bne.n	8004b02 <__aeabi_dcmpun+0x26>
 8004afc:	f04f 0000 	mov.w	r0, #0
 8004b00:	4770      	bx	lr
 8004b02:	f04f 0001 	mov.w	r0, #1
 8004b06:	4770      	bx	lr

08004b08 <__aeabi_d2iz>:
 8004b08:	ea4f 0241 	mov.w	r2, r1, lsl #1
 8004b0c:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
 8004b10:	d215      	bcs.n	8004b3e <__aeabi_d2iz+0x36>
 8004b12:	d511      	bpl.n	8004b38 <__aeabi_d2iz+0x30>
 8004b14:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
 8004b18:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
 8004b1c:	d912      	bls.n	8004b44 <__aeabi_d2iz+0x3c>
 8004b1e:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004b22:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8004b26:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
 8004b2a:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 8004b2e:	fa23 f002 	lsr.w	r0, r3, r2
 8004b32:	bf18      	it	ne
 8004b34:	4240      	negne	r0, r0
 8004b36:	4770      	bx	lr
 8004b38:	f04f 0000 	mov.w	r0, #0
 8004b3c:	4770      	bx	lr
 8004b3e:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
 8004b42:	d105      	bne.n	8004b50 <__aeabi_d2iz+0x48>
 8004b44:	f011 4000 	ands.w	r0, r1, #2147483648	; 0x80000000
 8004b48:	bf08      	it	eq
 8004b4a:	f06f 4000 	mvneq.w	r0, #2147483648	; 0x80000000
 8004b4e:	4770      	bx	lr
 8004b50:	f04f 0000 	mov.w	r0, #0
 8004b54:	4770      	bx	lr
 8004b56:	bf00      	nop

08004b58 <__aeabi_d2uiz>:
 8004b58:	004a      	lsls	r2, r1, #1
 8004b5a:	d211      	bcs.n	8004b80 <__aeabi_d2uiz+0x28>
 8004b5c:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
 8004b60:	d211      	bcs.n	8004b86 <__aeabi_d2uiz+0x2e>
 8004b62:	d50d      	bpl.n	8004b80 <__aeabi_d2uiz+0x28>
 8004b64:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
 8004b68:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
 8004b6c:	d40e      	bmi.n	8004b8c <__aeabi_d2uiz+0x34>
 8004b6e:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004b72:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8004b76:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
 8004b7a:	fa23 f002 	lsr.w	r0, r3, r2
 8004b7e:	4770      	bx	lr
 8004b80:	f04f 0000 	mov.w	r0, #0
 8004b84:	4770      	bx	lr
 8004b86:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
 8004b8a:	d102      	bne.n	8004b92 <__aeabi_d2uiz+0x3a>
 8004b8c:	f04f 30ff 	mov.w	r0, #4294967295
 8004b90:	4770      	bx	lr
 8004b92:	f04f 0000 	mov.w	r0, #0
 8004b96:	4770      	bx	lr

08004b98 <__aeabi_d2f>:
 8004b98:	ea4f 0241 	mov.w	r2, r1, lsl #1
 8004b9c:	f1b2 43e0 	subs.w	r3, r2, #1879048192	; 0x70000000
 8004ba0:	bf24      	itt	cs
 8004ba2:	f5b3 1c00 	subscs.w	ip, r3, #2097152	; 0x200000
 8004ba6:	f1dc 5cfe 	rsbscs	ip, ip, #532676608	; 0x1fc00000
 8004baa:	d90d      	bls.n	8004bc8 <__aeabi_d2f+0x30>
 8004bac:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 8004bb0:	ea4f 02c0 	mov.w	r2, r0, lsl #3
 8004bb4:	ea4c 7050 	orr.w	r0, ip, r0, lsr #29
 8004bb8:	f1b2 4f00 	cmp.w	r2, #2147483648	; 0x80000000
 8004bbc:	eb40 0083 	adc.w	r0, r0, r3, lsl #2
 8004bc0:	bf08      	it	eq
 8004bc2:	f020 0001 	biceq.w	r0, r0, #1
 8004bc6:	4770      	bx	lr
 8004bc8:	f011 4f80 	tst.w	r1, #1073741824	; 0x40000000
 8004bcc:	d121      	bne.n	8004c12 <__aeabi_d2f+0x7a>
 8004bce:	f113 7238 	adds.w	r2, r3, #48234496	; 0x2e00000
 8004bd2:	bfbc      	itt	lt
 8004bd4:	f001 4000 	andlt.w	r0, r1, #2147483648	; 0x80000000
 8004bd8:	4770      	bxlt	lr
 8004bda:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004bde:	ea4f 5252 	mov.w	r2, r2, lsr #21
 8004be2:	f1c2 0218 	rsb	r2, r2, #24
 8004be6:	f1c2 0c20 	rsb	ip, r2, #32
 8004bea:	fa10 f30c 	lsls.w	r3, r0, ip
 8004bee:	fa20 f002 	lsr.w	r0, r0, r2
 8004bf2:	bf18      	it	ne
 8004bf4:	f040 0001 	orrne.w	r0, r0, #1
 8004bf8:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004bfc:	ea4f 23d3 	mov.w	r3, r3, lsr #11
 8004c00:	fa03 fc0c 	lsl.w	ip, r3, ip
 8004c04:	ea40 000c 	orr.w	r0, r0, ip
 8004c08:	fa23 f302 	lsr.w	r3, r3, r2
 8004c0c:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8004c10:	e7cc      	b.n	8004bac <__aeabi_d2f+0x14>
 8004c12:	ea7f 5362 	mvns.w	r3, r2, asr #21
 8004c16:	d107      	bne.n	8004c28 <__aeabi_d2f+0x90>
 8004c18:	ea50 3301 	orrs.w	r3, r0, r1, lsl #12
 8004c1c:	bf1e      	ittt	ne
 8004c1e:	f04f 40fe 	movne.w	r0, #2130706432	; 0x7f000000
 8004c22:	f440 0040 	orrne.w	r0, r0, #12582912	; 0xc00000
 8004c26:	4770      	bxne	lr
 8004c28:	f001 4000 	and.w	r0, r1, #2147483648	; 0x80000000
 8004c2c:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004c30:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004c34:	4770      	bx	lr
 8004c36:	bf00      	nop

08004c38 <__aeabi_frsub>:
 8004c38:	f080 4000 	eor.w	r0, r0, #2147483648	; 0x80000000
 8004c3c:	e002      	b.n	8004c44 <__addsf3>
 8004c3e:	bf00      	nop

08004c40 <__aeabi_fsub>:
 8004c40:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000

08004c44 <__addsf3>:
 8004c44:	0042      	lsls	r2, r0, #1
 8004c46:	bf1f      	itttt	ne
 8004c48:	ea5f 0341 	movsne.w	r3, r1, lsl #1
 8004c4c:	ea92 0f03 	teqne	r2, r3
 8004c50:	ea7f 6c22 	mvnsne.w	ip, r2, asr #24
 8004c54:	ea7f 6c23 	mvnsne.w	ip, r3, asr #24
 8004c58:	d06a      	beq.n	8004d30 <__addsf3+0xec>
 8004c5a:	ea4f 6212 	mov.w	r2, r2, lsr #24
 8004c5e:	ebd2 6313 	rsbs	r3, r2, r3, lsr #24
 8004c62:	bfc1      	itttt	gt
 8004c64:	18d2      	addgt	r2, r2, r3
 8004c66:	4041      	eorgt	r1, r0
 8004c68:	4048      	eorgt	r0, r1
 8004c6a:	4041      	eorgt	r1, r0
 8004c6c:	bfb8      	it	lt
 8004c6e:	425b      	neglt	r3, r3
 8004c70:	2b19      	cmp	r3, #25
 8004c72:	bf88      	it	hi
 8004c74:	4770      	bxhi	lr
 8004c76:	f010 4f00 	tst.w	r0, #2147483648	; 0x80000000
 8004c7a:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004c7e:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
 8004c82:	bf18      	it	ne
 8004c84:	4240      	negne	r0, r0
 8004c86:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 8004c8a:	f441 0100 	orr.w	r1, r1, #8388608	; 0x800000
 8004c8e:	f021 417f 	bic.w	r1, r1, #4278190080	; 0xff000000
 8004c92:	bf18      	it	ne
 8004c94:	4249      	negne	r1, r1
 8004c96:	ea92 0f03 	teq	r2, r3
 8004c9a:	d03f      	beq.n	8004d1c <__addsf3+0xd8>
 8004c9c:	f1a2 0201 	sub.w	r2, r2, #1
 8004ca0:	fa41 fc03 	asr.w	ip, r1, r3
 8004ca4:	eb10 000c 	adds.w	r0, r0, ip
 8004ca8:	f1c3 0320 	rsb	r3, r3, #32
 8004cac:	fa01 f103 	lsl.w	r1, r1, r3
 8004cb0:	f000 4300 	and.w	r3, r0, #2147483648	; 0x80000000
 8004cb4:	d502      	bpl.n	8004cbc <__addsf3+0x78>
 8004cb6:	4249      	negs	r1, r1
 8004cb8:	eb60 0040 	sbc.w	r0, r0, r0, lsl #1
 8004cbc:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
 8004cc0:	d313      	bcc.n	8004cea <__addsf3+0xa6>
 8004cc2:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8004cc6:	d306      	bcc.n	8004cd6 <__addsf3+0x92>
 8004cc8:	0840      	lsrs	r0, r0, #1
 8004cca:	ea4f 0131 	mov.w	r1, r1, rrx
 8004cce:	f102 0201 	add.w	r2, r2, #1
 8004cd2:	2afe      	cmp	r2, #254	; 0xfe
 8004cd4:	d251      	bcs.n	8004d7a <__addsf3+0x136>
 8004cd6:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
 8004cda:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8004cde:	bf08      	it	eq
 8004ce0:	f020 0001 	biceq.w	r0, r0, #1
 8004ce4:	ea40 0003 	orr.w	r0, r0, r3
 8004ce8:	4770      	bx	lr
 8004cea:	0049      	lsls	r1, r1, #1
 8004cec:	eb40 0000 	adc.w	r0, r0, r0
 8004cf0:	f410 0f00 	tst.w	r0, #8388608	; 0x800000
 8004cf4:	f1a2 0201 	sub.w	r2, r2, #1
 8004cf8:	d1ed      	bne.n	8004cd6 <__addsf3+0x92>
 8004cfa:	fab0 fc80 	clz	ip, r0
 8004cfe:	f1ac 0c08 	sub.w	ip, ip, #8
 8004d02:	ebb2 020c 	subs.w	r2, r2, ip
 8004d06:	fa00 f00c 	lsl.w	r0, r0, ip
 8004d0a:	bfaa      	itet	ge
 8004d0c:	eb00 50c2 	addge.w	r0, r0, r2, lsl #23
 8004d10:	4252      	neglt	r2, r2
 8004d12:	4318      	orrge	r0, r3
 8004d14:	bfbc      	itt	lt
 8004d16:	40d0      	lsrlt	r0, r2
 8004d18:	4318      	orrlt	r0, r3
 8004d1a:	4770      	bx	lr
 8004d1c:	f092 0f00 	teq	r2, #0
 8004d20:	f481 0100 	eor.w	r1, r1, #8388608	; 0x800000
 8004d24:	bf06      	itte	eq
 8004d26:	f480 0000 	eoreq.w	r0, r0, #8388608	; 0x800000
 8004d2a:	3201      	addeq	r2, #1
 8004d2c:	3b01      	subne	r3, #1
 8004d2e:	e7b5      	b.n	8004c9c <__addsf3+0x58>
 8004d30:	ea4f 0341 	mov.w	r3, r1, lsl #1
 8004d34:	ea7f 6c22 	mvns.w	ip, r2, asr #24
 8004d38:	bf18      	it	ne
 8004d3a:	ea7f 6c23 	mvnsne.w	ip, r3, asr #24
 8004d3e:	d021      	beq.n	8004d84 <__addsf3+0x140>
 8004d40:	ea92 0f03 	teq	r2, r3
 8004d44:	d004      	beq.n	8004d50 <__addsf3+0x10c>
 8004d46:	f092 0f00 	teq	r2, #0
 8004d4a:	bf08      	it	eq
 8004d4c:	4608      	moveq	r0, r1
 8004d4e:	4770      	bx	lr
 8004d50:	ea90 0f01 	teq	r0, r1
 8004d54:	bf1c      	itt	ne
 8004d56:	2000      	movne	r0, #0
 8004d58:	4770      	bxne	lr
 8004d5a:	f012 4f7f 	tst.w	r2, #4278190080	; 0xff000000
 8004d5e:	d104      	bne.n	8004d6a <__addsf3+0x126>
 8004d60:	0040      	lsls	r0, r0, #1
 8004d62:	bf28      	it	cs
 8004d64:	f040 4000 	orrcs.w	r0, r0, #2147483648	; 0x80000000
 8004d68:	4770      	bx	lr
 8004d6a:	f112 7200 	adds.w	r2, r2, #33554432	; 0x2000000
 8004d6e:	bf3c      	itt	cc
 8004d70:	f500 0000 	addcc.w	r0, r0, #8388608	; 0x800000
 8004d74:	4770      	bxcc	lr
 8004d76:	f000 4300 	and.w	r3, r0, #2147483648	; 0x80000000
 8004d7a:	f043 40fe 	orr.w	r0, r3, #2130706432	; 0x7f000000
 8004d7e:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004d82:	4770      	bx	lr
 8004d84:	ea7f 6222 	mvns.w	r2, r2, asr #24
 8004d88:	bf16      	itet	ne
 8004d8a:	4608      	movne	r0, r1
 8004d8c:	ea7f 6323 	mvnseq.w	r3, r3, asr #24
 8004d90:	4601      	movne	r1, r0
 8004d92:	0242      	lsls	r2, r0, #9
 8004d94:	bf06      	itte	eq
 8004d96:	ea5f 2341 	movseq.w	r3, r1, lsl #9
 8004d9a:	ea90 0f01 	teqeq	r0, r1
 8004d9e:	f440 0080 	orrne.w	r0, r0, #4194304	; 0x400000
 8004da2:	4770      	bx	lr

08004da4 <__aeabi_ui2f>:
 8004da4:	f04f 0300 	mov.w	r3, #0
 8004da8:	e004      	b.n	8004db4 <__aeabi_i2f+0x8>
 8004daa:	bf00      	nop

08004dac <__aeabi_i2f>:
 8004dac:	f010 4300 	ands.w	r3, r0, #2147483648	; 0x80000000
 8004db0:	bf48      	it	mi
 8004db2:	4240      	negmi	r0, r0
 8004db4:	ea5f 0c00 	movs.w	ip, r0
 8004db8:	bf08      	it	eq
 8004dba:	4770      	bxeq	lr
 8004dbc:	f043 4396 	orr.w	r3, r3, #1258291200	; 0x4b000000
 8004dc0:	4601      	mov	r1, r0
 8004dc2:	f04f 0000 	mov.w	r0, #0
 8004dc6:	e01c      	b.n	8004e02 <__aeabi_l2f+0x2a>

08004dc8 <__aeabi_ul2f>:
 8004dc8:	ea50 0201 	orrs.w	r2, r0, r1
 8004dcc:	bf08      	it	eq
 8004dce:	4770      	bxeq	lr
 8004dd0:	f04f 0300 	mov.w	r3, #0
 8004dd4:	e00a      	b.n	8004dec <__aeabi_l2f+0x14>
 8004dd6:	bf00      	nop

08004dd8 <__aeabi_l2f>:
 8004dd8:	ea50 0201 	orrs.w	r2, r0, r1
 8004ddc:	bf08      	it	eq
 8004dde:	4770      	bxeq	lr
 8004de0:	f011 4300 	ands.w	r3, r1, #2147483648	; 0x80000000
 8004de4:	d502      	bpl.n	8004dec <__aeabi_l2f+0x14>
 8004de6:	4240      	negs	r0, r0
 8004de8:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8004dec:	ea5f 0c01 	movs.w	ip, r1
 8004df0:	bf02      	ittt	eq
 8004df2:	4684      	moveq	ip, r0
 8004df4:	4601      	moveq	r1, r0
 8004df6:	2000      	moveq	r0, #0
 8004df8:	f043 43b6 	orr.w	r3, r3, #1526726656	; 0x5b000000
 8004dfc:	bf08      	it	eq
 8004dfe:	f1a3 5380 	subeq.w	r3, r3, #268435456	; 0x10000000
 8004e02:	f5a3 0300 	sub.w	r3, r3, #8388608	; 0x800000
 8004e06:	fabc f28c 	clz	r2, ip
 8004e0a:	3a08      	subs	r2, #8
 8004e0c:	eba3 53c2 	sub.w	r3, r3, r2, lsl #23
 8004e10:	db10      	blt.n	8004e34 <__aeabi_l2f+0x5c>
 8004e12:	fa01 fc02 	lsl.w	ip, r1, r2
 8004e16:	4463      	add	r3, ip
 8004e18:	fa00 fc02 	lsl.w	ip, r0, r2
 8004e1c:	f1c2 0220 	rsb	r2, r2, #32
 8004e20:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
 8004e24:	fa20 f202 	lsr.w	r2, r0, r2
 8004e28:	eb43 0002 	adc.w	r0, r3, r2
 8004e2c:	bf08      	it	eq
 8004e2e:	f020 0001 	biceq.w	r0, r0, #1
 8004e32:	4770      	bx	lr
 8004e34:	f102 0220 	add.w	r2, r2, #32
 8004e38:	fa01 fc02 	lsl.w	ip, r1, r2
 8004e3c:	f1c2 0220 	rsb	r2, r2, #32
 8004e40:	ea50 004c 	orrs.w	r0, r0, ip, lsl #1
 8004e44:	fa21 f202 	lsr.w	r2, r1, r2
 8004e48:	eb43 0002 	adc.w	r0, r3, r2
 8004e4c:	bf08      	it	eq
 8004e4e:	ea20 70dc 	biceq.w	r0, r0, ip, lsr #31
 8004e52:	4770      	bx	lr

08004e54 <__aeabi_fmul>:
 8004e54:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004e58:	ea1c 52d0 	ands.w	r2, ip, r0, lsr #23
 8004e5c:	bf1e      	ittt	ne
 8004e5e:	ea1c 53d1 	andsne.w	r3, ip, r1, lsr #23
 8004e62:	ea92 0f0c 	teqne	r2, ip
 8004e66:	ea93 0f0c 	teqne	r3, ip
 8004e6a:	d06f      	beq.n	8004f4c <__aeabi_fmul+0xf8>
 8004e6c:	441a      	add	r2, r3
 8004e6e:	ea80 0c01 	eor.w	ip, r0, r1
 8004e72:	0240      	lsls	r0, r0, #9
 8004e74:	bf18      	it	ne
 8004e76:	ea5f 2141 	movsne.w	r1, r1, lsl #9
 8004e7a:	d01e      	beq.n	8004eba <__aeabi_fmul+0x66>
 8004e7c:	f04f 6300 	mov.w	r3, #134217728	; 0x8000000
 8004e80:	ea43 1050 	orr.w	r0, r3, r0, lsr #5
 8004e84:	ea43 1151 	orr.w	r1, r3, r1, lsr #5
 8004e88:	fba0 3101 	umull	r3, r1, r0, r1
 8004e8c:	f00c 4000 	and.w	r0, ip, #2147483648	; 0x80000000
 8004e90:	f5b1 0f00 	cmp.w	r1, #8388608	; 0x800000
 8004e94:	bf3e      	ittt	cc
 8004e96:	0049      	lslcc	r1, r1, #1
 8004e98:	ea41 71d3 	orrcc.w	r1, r1, r3, lsr #31
 8004e9c:	005b      	lslcc	r3, r3, #1
 8004e9e:	ea40 0001 	orr.w	r0, r0, r1
 8004ea2:	f162 027f 	sbc.w	r2, r2, #127	; 0x7f
 8004ea6:	2afd      	cmp	r2, #253	; 0xfd
 8004ea8:	d81d      	bhi.n	8004ee6 <__aeabi_fmul+0x92>
 8004eaa:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
 8004eae:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8004eb2:	bf08      	it	eq
 8004eb4:	f020 0001 	biceq.w	r0, r0, #1
 8004eb8:	4770      	bx	lr
 8004eba:	f090 0f00 	teq	r0, #0
 8004ebe:	f00c 4c00 	and.w	ip, ip, #2147483648	; 0x80000000
 8004ec2:	bf08      	it	eq
 8004ec4:	0249      	lsleq	r1, r1, #9
 8004ec6:	ea4c 2050 	orr.w	r0, ip, r0, lsr #9
 8004eca:	ea40 2051 	orr.w	r0, r0, r1, lsr #9
 8004ece:	3a7f      	subs	r2, #127	; 0x7f
 8004ed0:	bfc2      	ittt	gt
 8004ed2:	f1d2 03ff 	rsbsgt	r3, r2, #255	; 0xff
 8004ed6:	ea40 50c2 	orrgt.w	r0, r0, r2, lsl #23
 8004eda:	4770      	bxgt	lr
 8004edc:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004ee0:	f04f 0300 	mov.w	r3, #0
 8004ee4:	3a01      	subs	r2, #1
 8004ee6:	dc5d      	bgt.n	8004fa4 <__aeabi_fmul+0x150>
 8004ee8:	f112 0f19 	cmn.w	r2, #25
 8004eec:	bfdc      	itt	le
 8004eee:	f000 4000 	andle.w	r0, r0, #2147483648	; 0x80000000
 8004ef2:	4770      	bxle	lr
 8004ef4:	f1c2 0200 	rsb	r2, r2, #0
 8004ef8:	0041      	lsls	r1, r0, #1
 8004efa:	fa21 f102 	lsr.w	r1, r1, r2
 8004efe:	f1c2 0220 	rsb	r2, r2, #32
 8004f02:	fa00 fc02 	lsl.w	ip, r0, r2
 8004f06:	ea5f 0031 	movs.w	r0, r1, rrx
 8004f0a:	f140 0000 	adc.w	r0, r0, #0
 8004f0e:	ea53 034c 	orrs.w	r3, r3, ip, lsl #1
 8004f12:	bf08      	it	eq
 8004f14:	ea20 70dc 	biceq.w	r0, r0, ip, lsr #31
 8004f18:	4770      	bx	lr
 8004f1a:	f092 0f00 	teq	r2, #0
 8004f1e:	f000 4c00 	and.w	ip, r0, #2147483648	; 0x80000000
 8004f22:	bf02      	ittt	eq
 8004f24:	0040      	lsleq	r0, r0, #1
 8004f26:	f410 0f00 	tsteq.w	r0, #8388608	; 0x800000
 8004f2a:	3a01      	subeq	r2, #1
 8004f2c:	d0f9      	beq.n	8004f22 <__aeabi_fmul+0xce>
 8004f2e:	ea40 000c 	orr.w	r0, r0, ip
 8004f32:	f093 0f00 	teq	r3, #0
 8004f36:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 8004f3a:	bf02      	ittt	eq
 8004f3c:	0049      	lsleq	r1, r1, #1
 8004f3e:	f411 0f00 	tsteq.w	r1, #8388608	; 0x800000
 8004f42:	3b01      	subeq	r3, #1
 8004f44:	d0f9      	beq.n	8004f3a <__aeabi_fmul+0xe6>
 8004f46:	ea41 010c 	orr.w	r1, r1, ip
 8004f4a:	e78f      	b.n	8004e6c <__aeabi_fmul+0x18>
 8004f4c:	ea0c 53d1 	and.w	r3, ip, r1, lsr #23
 8004f50:	ea92 0f0c 	teq	r2, ip
 8004f54:	bf18      	it	ne
 8004f56:	ea93 0f0c 	teqne	r3, ip
 8004f5a:	d00a      	beq.n	8004f72 <__aeabi_fmul+0x11e>
 8004f5c:	f030 4c00 	bics.w	ip, r0, #2147483648	; 0x80000000
 8004f60:	bf18      	it	ne
 8004f62:	f031 4c00 	bicsne.w	ip, r1, #2147483648	; 0x80000000
 8004f66:	d1d8      	bne.n	8004f1a <__aeabi_fmul+0xc6>
 8004f68:	ea80 0001 	eor.w	r0, r0, r1
 8004f6c:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
 8004f70:	4770      	bx	lr
 8004f72:	f090 0f00 	teq	r0, #0
 8004f76:	bf17      	itett	ne
 8004f78:	f090 4f00 	teqne	r0, #2147483648	; 0x80000000
 8004f7c:	4608      	moveq	r0, r1
 8004f7e:	f091 0f00 	teqne	r1, #0
 8004f82:	f091 4f00 	teqne	r1, #2147483648	; 0x80000000
 8004f86:	d014      	beq.n	8004fb2 <__aeabi_fmul+0x15e>
 8004f88:	ea92 0f0c 	teq	r2, ip
 8004f8c:	d101      	bne.n	8004f92 <__aeabi_fmul+0x13e>
 8004f8e:	0242      	lsls	r2, r0, #9
 8004f90:	d10f      	bne.n	8004fb2 <__aeabi_fmul+0x15e>
 8004f92:	ea93 0f0c 	teq	r3, ip
 8004f96:	d103      	bne.n	8004fa0 <__aeabi_fmul+0x14c>
 8004f98:	024b      	lsls	r3, r1, #9
 8004f9a:	bf18      	it	ne
 8004f9c:	4608      	movne	r0, r1
 8004f9e:	d108      	bne.n	8004fb2 <__aeabi_fmul+0x15e>
 8004fa0:	ea80 0001 	eor.w	r0, r0, r1
 8004fa4:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
 8004fa8:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004fac:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004fb0:	4770      	bx	lr
 8004fb2:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004fb6:	f440 0040 	orr.w	r0, r0, #12582912	; 0xc00000
 8004fba:	4770      	bx	lr

08004fbc <__aeabi_fdiv>:
 8004fbc:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004fc0:	ea1c 52d0 	ands.w	r2, ip, r0, lsr #23
 8004fc4:	bf1e      	ittt	ne
 8004fc6:	ea1c 53d1 	andsne.w	r3, ip, r1, lsr #23
 8004fca:	ea92 0f0c 	teqne	r2, ip
 8004fce:	ea93 0f0c 	teqne	r3, ip
 8004fd2:	d069      	beq.n	80050a8 <__aeabi_fdiv+0xec>
 8004fd4:	eba2 0203 	sub.w	r2, r2, r3
 8004fd8:	ea80 0c01 	eor.w	ip, r0, r1
 8004fdc:	0249      	lsls	r1, r1, #9
 8004fde:	ea4f 2040 	mov.w	r0, r0, lsl #9
 8004fe2:	d037      	beq.n	8005054 <__aeabi_fdiv+0x98>
 8004fe4:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
 8004fe8:	ea43 1111 	orr.w	r1, r3, r1, lsr #4
 8004fec:	ea43 1310 	orr.w	r3, r3, r0, lsr #4
 8004ff0:	f00c 4000 	and.w	r0, ip, #2147483648	; 0x80000000
 8004ff4:	428b      	cmp	r3, r1
 8004ff6:	bf38      	it	cc
 8004ff8:	005b      	lslcc	r3, r3, #1
 8004ffa:	f142 027d 	adc.w	r2, r2, #125	; 0x7d
 8004ffe:	f44f 0c00 	mov.w	ip, #8388608	; 0x800000
 8005002:	428b      	cmp	r3, r1
 8005004:	bf24      	itt	cs
 8005006:	1a5b      	subcs	r3, r3, r1
 8005008:	ea40 000c 	orrcs.w	r0, r0, ip
 800500c:	ebb3 0f51 	cmp.w	r3, r1, lsr #1
 8005010:	bf24      	itt	cs
 8005012:	eba3 0351 	subcs.w	r3, r3, r1, lsr #1
 8005016:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
 800501a:	ebb3 0f91 	cmp.w	r3, r1, lsr #2
 800501e:	bf24      	itt	cs
 8005020:	eba3 0391 	subcs.w	r3, r3, r1, lsr #2
 8005024:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
 8005028:	ebb3 0fd1 	cmp.w	r3, r1, lsr #3
 800502c:	bf24      	itt	cs
 800502e:	eba3 03d1 	subcs.w	r3, r3, r1, lsr #3
 8005032:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
 8005036:	011b      	lsls	r3, r3, #4
 8005038:	bf18      	it	ne
 800503a:	ea5f 1c1c 	movsne.w	ip, ip, lsr #4
 800503e:	d1e0      	bne.n	8005002 <__aeabi_fdiv+0x46>
 8005040:	2afd      	cmp	r2, #253	; 0xfd
 8005042:	f63f af50 	bhi.w	8004ee6 <__aeabi_fmul+0x92>
 8005046:	428b      	cmp	r3, r1
 8005048:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 800504c:	bf08      	it	eq
 800504e:	f020 0001 	biceq.w	r0, r0, #1
 8005052:	4770      	bx	lr
 8005054:	f00c 4c00 	and.w	ip, ip, #2147483648	; 0x80000000
 8005058:	ea4c 2050 	orr.w	r0, ip, r0, lsr #9
 800505c:	327f      	adds	r2, #127	; 0x7f
 800505e:	bfc2      	ittt	gt
 8005060:	f1d2 03ff 	rsbsgt	r3, r2, #255	; 0xff
 8005064:	ea40 50c2 	orrgt.w	r0, r0, r2, lsl #23
 8005068:	4770      	bxgt	lr
 800506a:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 800506e:	f04f 0300 	mov.w	r3, #0
 8005072:	3a01      	subs	r2, #1
 8005074:	e737      	b.n	8004ee6 <__aeabi_fmul+0x92>
 8005076:	f092 0f00 	teq	r2, #0
 800507a:	f000 4c00 	and.w	ip, r0, #2147483648	; 0x80000000
 800507e:	bf02      	ittt	eq
 8005080:	0040      	lsleq	r0, r0, #1
 8005082:	f410 0f00 	tsteq.w	r0, #8388608	; 0x800000
 8005086:	3a01      	subeq	r2, #1
 8005088:	d0f9      	beq.n	800507e <__aeabi_fdiv+0xc2>
 800508a:	ea40 000c 	orr.w	r0, r0, ip
 800508e:	f093 0f00 	teq	r3, #0
 8005092:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 8005096:	bf02      	ittt	eq
 8005098:	0049      	lsleq	r1, r1, #1
 800509a:	f411 0f00 	tsteq.w	r1, #8388608	; 0x800000
 800509e:	3b01      	subeq	r3, #1
 80050a0:	d0f9      	beq.n	8005096 <__aeabi_fdiv+0xda>
 80050a2:	ea41 010c 	orr.w	r1, r1, ip
 80050a6:	e795      	b.n	8004fd4 <__aeabi_fdiv+0x18>
 80050a8:	ea0c 53d1 	and.w	r3, ip, r1, lsr #23
 80050ac:	ea92 0f0c 	teq	r2, ip
 80050b0:	d108      	bne.n	80050c4 <__aeabi_fdiv+0x108>
 80050b2:	0242      	lsls	r2, r0, #9
 80050b4:	f47f af7d 	bne.w	8004fb2 <__aeabi_fmul+0x15e>
 80050b8:	ea93 0f0c 	teq	r3, ip
 80050bc:	f47f af70 	bne.w	8004fa0 <__aeabi_fmul+0x14c>
 80050c0:	4608      	mov	r0, r1
 80050c2:	e776      	b.n	8004fb2 <__aeabi_fmul+0x15e>
 80050c4:	ea93 0f0c 	teq	r3, ip
 80050c8:	d104      	bne.n	80050d4 <__aeabi_fdiv+0x118>
 80050ca:	024b      	lsls	r3, r1, #9
 80050cc:	f43f af4c 	beq.w	8004f68 <__aeabi_fmul+0x114>
 80050d0:	4608      	mov	r0, r1
 80050d2:	e76e      	b.n	8004fb2 <__aeabi_fmul+0x15e>
 80050d4:	f030 4c00 	bics.w	ip, r0, #2147483648	; 0x80000000
 80050d8:	bf18      	it	ne
 80050da:	f031 4c00 	bicsne.w	ip, r1, #2147483648	; 0x80000000
 80050de:	d1ca      	bne.n	8005076 <__aeabi_fdiv+0xba>
 80050e0:	f030 4200 	bics.w	r2, r0, #2147483648	; 0x80000000
 80050e4:	f47f af5c 	bne.w	8004fa0 <__aeabi_fmul+0x14c>
 80050e8:	f031 4300 	bics.w	r3, r1, #2147483648	; 0x80000000
 80050ec:	f47f af3c 	bne.w	8004f68 <__aeabi_fmul+0x114>
 80050f0:	e75f      	b.n	8004fb2 <__aeabi_fmul+0x15e>
 80050f2:	bf00      	nop

080050f4 <__aeabi_f2uiz>:
 80050f4:	0042      	lsls	r2, r0, #1
 80050f6:	d20e      	bcs.n	8005116 <__aeabi_f2uiz+0x22>
 80050f8:	f1b2 4ffe 	cmp.w	r2, #2130706432	; 0x7f000000
 80050fc:	d30b      	bcc.n	8005116 <__aeabi_f2uiz+0x22>
 80050fe:	f04f 039e 	mov.w	r3, #158	; 0x9e
 8005102:	ebb3 6212 	subs.w	r2, r3, r2, lsr #24
 8005106:	d409      	bmi.n	800511c <__aeabi_f2uiz+0x28>
 8005108:	ea4f 2300 	mov.w	r3, r0, lsl #8
 800510c:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8005110:	fa23 f002 	lsr.w	r0, r3, r2
 8005114:	4770      	bx	lr
 8005116:	f04f 0000 	mov.w	r0, #0
 800511a:	4770      	bx	lr
 800511c:	f112 0f61 	cmn.w	r2, #97	; 0x61
 8005120:	d101      	bne.n	8005126 <__aeabi_f2uiz+0x32>
 8005122:	0242      	lsls	r2, r0, #9
 8005124:	d102      	bne.n	800512c <__aeabi_f2uiz+0x38>
 8005126:	f04f 30ff 	mov.w	r0, #4294967295
 800512a:	4770      	bx	lr
 800512c:	f04f 0000 	mov.w	r0, #0
 8005130:	4770      	bx	lr
 8005132:	bf00      	nop

08005134 <__aeabi_uldivmod>:
 8005134:	b953      	cbnz	r3, 800514c <__aeabi_uldivmod+0x18>
 8005136:	b94a      	cbnz	r2, 800514c <__aeabi_uldivmod+0x18>
 8005138:	2900      	cmp	r1, #0
 800513a:	bf08      	it	eq
 800513c:	2800      	cmpeq	r0, #0
 800513e:	bf1c      	itt	ne
 8005140:	f04f 31ff 	movne.w	r1, #4294967295
 8005144:	f04f 30ff 	movne.w	r0, #4294967295
 8005148:	f000 b97a 	b.w	8005440 <__aeabi_idiv0>
 800514c:	f1ad 0c08 	sub.w	ip, sp, #8
 8005150:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 8005154:	f000 f806 	bl	8005164 <__udivmoddi4>
 8005158:	f8dd e004 	ldr.w	lr, [sp, #4]
 800515c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8005160:	b004      	add	sp, #16
 8005162:	4770      	bx	lr

08005164 <__udivmoddi4>:
 8005164:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8005168:	468c      	mov	ip, r1
 800516a:	460e      	mov	r6, r1
 800516c:	4604      	mov	r4, r0
 800516e:	9d08      	ldr	r5, [sp, #32]
 8005170:	2b00      	cmp	r3, #0
 8005172:	d150      	bne.n	8005216 <__udivmoddi4+0xb2>
 8005174:	428a      	cmp	r2, r1
 8005176:	4617      	mov	r7, r2
 8005178:	d96c      	bls.n	8005254 <__udivmoddi4+0xf0>
 800517a:	fab2 fe82 	clz	lr, r2
 800517e:	f1be 0f00 	cmp.w	lr, #0
 8005182:	d00b      	beq.n	800519c <__udivmoddi4+0x38>
 8005184:	f1ce 0c20 	rsb	ip, lr, #32
 8005188:	fa01 f60e 	lsl.w	r6, r1, lr
 800518c:	fa20 fc0c 	lsr.w	ip, r0, ip
 8005190:	fa02 f70e 	lsl.w	r7, r2, lr
 8005194:	ea4c 0c06 	orr.w	ip, ip, r6
 8005198:	fa00 f40e 	lsl.w	r4, r0, lr
 800519c:	0c3a      	lsrs	r2, r7, #16
 800519e:	fbbc f9f2 	udiv	r9, ip, r2
 80051a2:	b2bb      	uxth	r3, r7
 80051a4:	fb02 cc19 	mls	ip, r2, r9, ip
 80051a8:	fb09 fa03 	mul.w	sl, r9, r3
 80051ac:	ea4f 4814 	mov.w	r8, r4, lsr #16
 80051b0:	ea48 460c 	orr.w	r6, r8, ip, lsl #16
 80051b4:	45b2      	cmp	sl, r6
 80051b6:	d90a      	bls.n	80051ce <__udivmoddi4+0x6a>
 80051b8:	19f6      	adds	r6, r6, r7
 80051ba:	f109 31ff 	add.w	r1, r9, #4294967295
 80051be:	f080 8125 	bcs.w	800540c <__udivmoddi4+0x2a8>
 80051c2:	45b2      	cmp	sl, r6
 80051c4:	f240 8122 	bls.w	800540c <__udivmoddi4+0x2a8>
 80051c8:	f1a9 0902 	sub.w	r9, r9, #2
 80051cc:	443e      	add	r6, r7
 80051ce:	eba6 060a 	sub.w	r6, r6, sl
 80051d2:	fbb6 f0f2 	udiv	r0, r6, r2
 80051d6:	fb02 6610 	mls	r6, r2, r0, r6
 80051da:	fb00 f303 	mul.w	r3, r0, r3
 80051de:	b2a4      	uxth	r4, r4
 80051e0:	ea44 4406 	orr.w	r4, r4, r6, lsl #16
 80051e4:	42a3      	cmp	r3, r4
 80051e6:	d909      	bls.n	80051fc <__udivmoddi4+0x98>
 80051e8:	19e4      	adds	r4, r4, r7
 80051ea:	f100 32ff 	add.w	r2, r0, #4294967295
 80051ee:	f080 810b 	bcs.w	8005408 <__udivmoddi4+0x2a4>
 80051f2:	42a3      	cmp	r3, r4
 80051f4:	f240 8108 	bls.w	8005408 <__udivmoddi4+0x2a4>
 80051f8:	3802      	subs	r0, #2
 80051fa:	443c      	add	r4, r7
 80051fc:	2100      	movs	r1, #0
 80051fe:	1ae4      	subs	r4, r4, r3
 8005200:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
 8005204:	2d00      	cmp	r5, #0
 8005206:	d062      	beq.n	80052ce <__udivmoddi4+0x16a>
 8005208:	2300      	movs	r3, #0
 800520a:	fa24 f40e 	lsr.w	r4, r4, lr
 800520e:	602c      	str	r4, [r5, #0]
 8005210:	606b      	str	r3, [r5, #4]
 8005212:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8005216:	428b      	cmp	r3, r1
 8005218:	d907      	bls.n	800522a <__udivmoddi4+0xc6>
 800521a:	2d00      	cmp	r5, #0
 800521c:	d055      	beq.n	80052ca <__udivmoddi4+0x166>
 800521e:	2100      	movs	r1, #0
 8005220:	e885 0041 	stmia.w	r5, {r0, r6}
 8005224:	4608      	mov	r0, r1
 8005226:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800522a:	fab3 f183 	clz	r1, r3
 800522e:	2900      	cmp	r1, #0
 8005230:	f040 808f 	bne.w	8005352 <__udivmoddi4+0x1ee>
 8005234:	42b3      	cmp	r3, r6
 8005236:	d302      	bcc.n	800523e <__udivmoddi4+0xda>
 8005238:	4282      	cmp	r2, r0
 800523a:	f200 80fc 	bhi.w	8005436 <__udivmoddi4+0x2d2>
 800523e:	1a84      	subs	r4, r0, r2
 8005240:	eb66 0603 	sbc.w	r6, r6, r3
 8005244:	2001      	movs	r0, #1
 8005246:	46b4      	mov	ip, r6
 8005248:	2d00      	cmp	r5, #0
 800524a:	d040      	beq.n	80052ce <__udivmoddi4+0x16a>
 800524c:	e885 1010 	stmia.w	r5, {r4, ip}
 8005250:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8005254:	b912      	cbnz	r2, 800525c <__udivmoddi4+0xf8>
 8005256:	2701      	movs	r7, #1
 8005258:	fbb7 f7f2 	udiv	r7, r7, r2
 800525c:	fab7 fe87 	clz	lr, r7
 8005260:	f1be 0f00 	cmp.w	lr, #0
 8005264:	d135      	bne.n	80052d2 <__udivmoddi4+0x16e>
 8005266:	2101      	movs	r1, #1
 8005268:	1bf6      	subs	r6, r6, r7
 800526a:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 800526e:	fa1f f887 	uxth.w	r8, r7
 8005272:	fbb6 f2fc 	udiv	r2, r6, ip
 8005276:	fb0c 6612 	mls	r6, ip, r2, r6
 800527a:	fb08 f002 	mul.w	r0, r8, r2
 800527e:	0c23      	lsrs	r3, r4, #16
 8005280:	ea43 4606 	orr.w	r6, r3, r6, lsl #16
 8005284:	42b0      	cmp	r0, r6
 8005286:	d907      	bls.n	8005298 <__udivmoddi4+0x134>
 8005288:	19f6      	adds	r6, r6, r7
 800528a:	f102 33ff 	add.w	r3, r2, #4294967295
 800528e:	d202      	bcs.n	8005296 <__udivmoddi4+0x132>
 8005290:	42b0      	cmp	r0, r6
 8005292:	f200 80d2 	bhi.w	800543a <__udivmoddi4+0x2d6>
 8005296:	461a      	mov	r2, r3
 8005298:	1a36      	subs	r6, r6, r0
 800529a:	fbb6 f0fc 	udiv	r0, r6, ip
 800529e:	fb0c 6610 	mls	r6, ip, r0, r6
 80052a2:	fb08 f800 	mul.w	r8, r8, r0
 80052a6:	b2a3      	uxth	r3, r4
 80052a8:	ea43 4406 	orr.w	r4, r3, r6, lsl #16
 80052ac:	45a0      	cmp	r8, r4
 80052ae:	d907      	bls.n	80052c0 <__udivmoddi4+0x15c>
 80052b0:	19e4      	adds	r4, r4, r7
 80052b2:	f100 33ff 	add.w	r3, r0, #4294967295
 80052b6:	d202      	bcs.n	80052be <__udivmoddi4+0x15a>
 80052b8:	45a0      	cmp	r8, r4
 80052ba:	f200 80b9 	bhi.w	8005430 <__udivmoddi4+0x2cc>
 80052be:	4618      	mov	r0, r3
 80052c0:	eba4 0408 	sub.w	r4, r4, r8
 80052c4:	ea40 4002 	orr.w	r0, r0, r2, lsl #16
 80052c8:	e79c      	b.n	8005204 <__udivmoddi4+0xa0>
 80052ca:	4629      	mov	r1, r5
 80052cc:	4628      	mov	r0, r5
 80052ce:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80052d2:	fa07 f70e 	lsl.w	r7, r7, lr
 80052d6:	f1ce 0320 	rsb	r3, lr, #32
 80052da:	fa26 f203 	lsr.w	r2, r6, r3
 80052de:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 80052e2:	fbb2 f1fc 	udiv	r1, r2, ip
 80052e6:	fa1f f887 	uxth.w	r8, r7
 80052ea:	fb0c 2211 	mls	r2, ip, r1, r2
 80052ee:	fa06 f60e 	lsl.w	r6, r6, lr
 80052f2:	fa20 f303 	lsr.w	r3, r0, r3
 80052f6:	fb01 f908 	mul.w	r9, r1, r8
 80052fa:	4333      	orrs	r3, r6
 80052fc:	0c1e      	lsrs	r6, r3, #16
 80052fe:	ea46 4602 	orr.w	r6, r6, r2, lsl #16
 8005302:	45b1      	cmp	r9, r6
 8005304:	fa00 f40e 	lsl.w	r4, r0, lr
 8005308:	d909      	bls.n	800531e <__udivmoddi4+0x1ba>
 800530a:	19f6      	adds	r6, r6, r7
 800530c:	f101 32ff 	add.w	r2, r1, #4294967295
 8005310:	f080 808c 	bcs.w	800542c <__udivmoddi4+0x2c8>
 8005314:	45b1      	cmp	r9, r6
 8005316:	f240 8089 	bls.w	800542c <__udivmoddi4+0x2c8>
 800531a:	3902      	subs	r1, #2
 800531c:	443e      	add	r6, r7
 800531e:	eba6 0609 	sub.w	r6, r6, r9
 8005322:	fbb6 f0fc 	udiv	r0, r6, ip
 8005326:	fb0c 6210 	mls	r2, ip, r0, r6
 800532a:	fb00 f908 	mul.w	r9, r0, r8
 800532e:	b29e      	uxth	r6, r3
 8005330:	ea46 4602 	orr.w	r6, r6, r2, lsl #16
 8005334:	45b1      	cmp	r9, r6
 8005336:	d907      	bls.n	8005348 <__udivmoddi4+0x1e4>
 8005338:	19f6      	adds	r6, r6, r7
 800533a:	f100 33ff 	add.w	r3, r0, #4294967295
 800533e:	d271      	bcs.n	8005424 <__udivmoddi4+0x2c0>
 8005340:	45b1      	cmp	r9, r6
 8005342:	d96f      	bls.n	8005424 <__udivmoddi4+0x2c0>
 8005344:	3802      	subs	r0, #2
 8005346:	443e      	add	r6, r7
 8005348:	eba6 0609 	sub.w	r6, r6, r9
 800534c:	ea40 4101 	orr.w	r1, r0, r1, lsl #16
 8005350:	e78f      	b.n	8005272 <__udivmoddi4+0x10e>
 8005352:	f1c1 0720 	rsb	r7, r1, #32
 8005356:	fa22 f807 	lsr.w	r8, r2, r7
 800535a:	408b      	lsls	r3, r1
 800535c:	ea48 0303 	orr.w	r3, r8, r3
 8005360:	fa26 f407 	lsr.w	r4, r6, r7
 8005364:	ea4f 4e13 	mov.w	lr, r3, lsr #16
 8005368:	fbb4 f9fe 	udiv	r9, r4, lr
 800536c:	fa1f fc83 	uxth.w	ip, r3
 8005370:	fb0e 4419 	mls	r4, lr, r9, r4
 8005374:	408e      	lsls	r6, r1
 8005376:	fa20 f807 	lsr.w	r8, r0, r7
 800537a:	fb09 fa0c 	mul.w	sl, r9, ip
 800537e:	ea48 0806 	orr.w	r8, r8, r6
 8005382:	ea4f 4618 	mov.w	r6, r8, lsr #16
 8005386:	ea46 4404 	orr.w	r4, r6, r4, lsl #16
 800538a:	45a2      	cmp	sl, r4
 800538c:	fa02 f201 	lsl.w	r2, r2, r1
 8005390:	fa00 f601 	lsl.w	r6, r0, r1
 8005394:	d908      	bls.n	80053a8 <__udivmoddi4+0x244>
 8005396:	18e4      	adds	r4, r4, r3
 8005398:	f109 30ff 	add.w	r0, r9, #4294967295
 800539c:	d244      	bcs.n	8005428 <__udivmoddi4+0x2c4>
 800539e:	45a2      	cmp	sl, r4
 80053a0:	d942      	bls.n	8005428 <__udivmoddi4+0x2c4>
 80053a2:	f1a9 0902 	sub.w	r9, r9, #2
 80053a6:	441c      	add	r4, r3
 80053a8:	eba4 040a 	sub.w	r4, r4, sl
 80053ac:	fbb4 f0fe 	udiv	r0, r4, lr
 80053b0:	fb0e 4410 	mls	r4, lr, r0, r4
 80053b4:	fb00 fc0c 	mul.w	ip, r0, ip
 80053b8:	fa1f f888 	uxth.w	r8, r8
 80053bc:	ea48 4404 	orr.w	r4, r8, r4, lsl #16
 80053c0:	45a4      	cmp	ip, r4
 80053c2:	d907      	bls.n	80053d4 <__udivmoddi4+0x270>
 80053c4:	18e4      	adds	r4, r4, r3
 80053c6:	f100 3eff 	add.w	lr, r0, #4294967295
 80053ca:	d229      	bcs.n	8005420 <__udivmoddi4+0x2bc>
 80053cc:	45a4      	cmp	ip, r4
 80053ce:	d927      	bls.n	8005420 <__udivmoddi4+0x2bc>
 80053d0:	3802      	subs	r0, #2
 80053d2:	441c      	add	r4, r3
 80053d4:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
 80053d8:	fba0 8902 	umull	r8, r9, r0, r2
 80053dc:	eba4 0c0c 	sub.w	ip, r4, ip
 80053e0:	45cc      	cmp	ip, r9
 80053e2:	46c2      	mov	sl, r8
 80053e4:	46ce      	mov	lr, r9
 80053e6:	d315      	bcc.n	8005414 <__udivmoddi4+0x2b0>
 80053e8:	d012      	beq.n	8005410 <__udivmoddi4+0x2ac>
 80053ea:	b155      	cbz	r5, 8005402 <__udivmoddi4+0x29e>
 80053ec:	ebb6 030a 	subs.w	r3, r6, sl
 80053f0:	eb6c 060e 	sbc.w	r6, ip, lr
 80053f4:	fa06 f707 	lsl.w	r7, r6, r7
 80053f8:	40cb      	lsrs	r3, r1
 80053fa:	431f      	orrs	r7, r3
 80053fc:	40ce      	lsrs	r6, r1
 80053fe:	602f      	str	r7, [r5, #0]
 8005400:	606e      	str	r6, [r5, #4]
 8005402:	2100      	movs	r1, #0
 8005404:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8005408:	4610      	mov	r0, r2
 800540a:	e6f7      	b.n	80051fc <__udivmoddi4+0x98>
 800540c:	4689      	mov	r9, r1
 800540e:	e6de      	b.n	80051ce <__udivmoddi4+0x6a>
 8005410:	4546      	cmp	r6, r8
 8005412:	d2ea      	bcs.n	80053ea <__udivmoddi4+0x286>
 8005414:	ebb8 0a02 	subs.w	sl, r8, r2
 8005418:	eb69 0e03 	sbc.w	lr, r9, r3
 800541c:	3801      	subs	r0, #1
 800541e:	e7e4      	b.n	80053ea <__udivmoddi4+0x286>
 8005420:	4670      	mov	r0, lr
 8005422:	e7d7      	b.n	80053d4 <__udivmoddi4+0x270>
 8005424:	4618      	mov	r0, r3
 8005426:	e78f      	b.n	8005348 <__udivmoddi4+0x1e4>
 8005428:	4681      	mov	r9, r0
 800542a:	e7bd      	b.n	80053a8 <__udivmoddi4+0x244>
 800542c:	4611      	mov	r1, r2
 800542e:	e776      	b.n	800531e <__udivmoddi4+0x1ba>
 8005430:	3802      	subs	r0, #2
 8005432:	443c      	add	r4, r7
 8005434:	e744      	b.n	80052c0 <__udivmoddi4+0x15c>
 8005436:	4608      	mov	r0, r1
 8005438:	e706      	b.n	8005248 <__udivmoddi4+0xe4>
 800543a:	3a02      	subs	r2, #2
 800543c:	443e      	add	r6, r7
 800543e:	e72b      	b.n	8005298 <__udivmoddi4+0x134>

08005440 <__aeabi_idiv0>:
 8005440:	4770      	bx	lr
 8005442:	bf00      	nop

08005444 <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8005444:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8005446:	4b0e      	ldr	r3, [pc, #56]	; (8005480 <HAL_InitTick+0x3c>)
{
 8005448:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800544a:	7818      	ldrb	r0, [r3, #0]
 800544c:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8005450:	fbb3 f3f0 	udiv	r3, r3, r0
 8005454:	4a0b      	ldr	r2, [pc, #44]	; (8005484 <HAL_InitTick+0x40>)
 8005456:	6810      	ldr	r0, [r2, #0]
 8005458:	fbb0 f0f3 	udiv	r0, r0, r3
 800545c:	f000 f9ce 	bl	80057fc <HAL_SYSTICK_Config>
 8005460:	4604      	mov	r4, r0
 8005462:	b958      	cbnz	r0, 800547c <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8005464:	2d0f      	cmp	r5, #15
 8005466:	d809      	bhi.n	800547c <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8005468:	4602      	mov	r2, r0
 800546a:	4629      	mov	r1, r5
 800546c:	f04f 30ff 	mov.w	r0, #4294967295
 8005470:	f000 f984 	bl	800577c <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 8005474:	4b04      	ldr	r3, [pc, #16]	; (8005488 <HAL_InitTick+0x44>)
 8005476:	4620      	mov	r0, r4
 8005478:	601d      	str	r5, [r3, #0]
 800547a:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 800547c:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 800547e:	bd38      	pop	{r3, r4, r5, pc}
 8005480:	20000000 	.word	0x20000000
 8005484:	20000200 	.word	0x20000200
 8005488:	20000004 	.word	0x20000004

0800548c <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 800548c:	4a07      	ldr	r2, [pc, #28]	; (80054ac <HAL_Init+0x20>)
{
 800548e:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8005490:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8005492:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8005494:	f043 0310 	orr.w	r3, r3, #16
 8005498:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800549a:	f000 f95d 	bl	8005758 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 800549e:	2000      	movs	r0, #0
 80054a0:	f7ff ffd0 	bl	8005444 <HAL_InitTick>
  HAL_MspInit();
 80054a4:	f002 fe20 	bl	80080e8 <HAL_MspInit>
}
 80054a8:	2000      	movs	r0, #0
 80054aa:	bd08      	pop	{r3, pc}
 80054ac:	40022000 	.word	0x40022000

080054b0 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 80054b0:	4a03      	ldr	r2, [pc, #12]	; (80054c0 <HAL_IncTick+0x10>)
 80054b2:	4b04      	ldr	r3, [pc, #16]	; (80054c4 <HAL_IncTick+0x14>)
 80054b4:	6811      	ldr	r1, [r2, #0]
 80054b6:	781b      	ldrb	r3, [r3, #0]
 80054b8:	440b      	add	r3, r1
 80054ba:	6013      	str	r3, [r2, #0]
 80054bc:	4770      	bx	lr
 80054be:	bf00      	nop
 80054c0:	20000438 	.word	0x20000438
 80054c4:	20000000 	.word	0x20000000

080054c8 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80054c8:	4b01      	ldr	r3, [pc, #4]	; (80054d0 <HAL_GetTick+0x8>)
 80054ca:	6818      	ldr	r0, [r3, #0]
}
 80054cc:	4770      	bx	lr
 80054ce:	bf00      	nop
 80054d0:	20000438 	.word	0x20000438

080054d4 <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80054d4:	b538      	push	{r3, r4, r5, lr}
 80054d6:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80054d8:	f7ff fff6 	bl	80054c8 <HAL_GetTick>
 80054dc:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80054de:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80054e0:	bf1e      	ittt	ne
 80054e2:	4b04      	ldrne	r3, [pc, #16]	; (80054f4 <HAL_Delay+0x20>)
 80054e4:	781b      	ldrbne	r3, [r3, #0]
 80054e6:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80054e8:	f7ff ffee 	bl	80054c8 <HAL_GetTick>
 80054ec:	1b40      	subs	r0, r0, r5
 80054ee:	4284      	cmp	r4, r0
 80054f0:	d8fa      	bhi.n	80054e8 <HAL_Delay+0x14>
  {
  }
}
 80054f2:	bd38      	pop	{r3, r4, r5, pc}
 80054f4:	20000000 	.word	0x20000000

080054f8 <HAL_ADC_ConfigChannel>:
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{ 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  __IO uint32_t wait_loop_index = 0U;
 80054f8:	2300      	movs	r3, #0
{ 
 80054fa:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 80054fc:	9301      	str	r3, [sp, #4]
  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
  
  /* Process locked */
  __HAL_LOCK(hadc);
 80054fe:	f890 3024 	ldrb.w	r3, [r0, #36]	; 0x24
 8005502:	2b01      	cmp	r3, #1
 8005504:	d074      	beq.n	80055f0 <HAL_ADC_ConfigChannel+0xf8>
 8005506:	2301      	movs	r3, #1
  
  
  /* Regular sequence configuration */
  /* For Rank 1 to 6 */
  if (sConfig->Rank < 7U)
 8005508:	684d      	ldr	r5, [r1, #4]
  __HAL_LOCK(hadc);
 800550a:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
  if (sConfig->Rank < 7U)
 800550e:	2d06      	cmp	r5, #6
 8005510:	6802      	ldr	r2, [r0, #0]
 8005512:	ea4f 0385 	mov.w	r3, r5, lsl #2
 8005516:	680c      	ldr	r4, [r1, #0]
 8005518:	d825      	bhi.n	8005566 <HAL_ADC_ConfigChannel+0x6e>
  {
    MODIFY_REG(hadc->Instance->SQR3                        ,
 800551a:	442b      	add	r3, r5
 800551c:	251f      	movs	r5, #31
 800551e:	6b56      	ldr	r6, [r2, #52]	; 0x34
 8005520:	3b05      	subs	r3, #5
 8005522:	409d      	lsls	r5, r3
 8005524:	ea26 0505 	bic.w	r5, r6, r5
 8005528:	fa04 f303 	lsl.w	r3, r4, r3
 800552c:	432b      	orrs	r3, r5
 800552e:	6353      	str	r3, [r2, #52]	; 0x34
  }
  
  
  /* Channel sampling time configuration */
  /* For channels 10 to 17 */
  if (sConfig->Channel >= ADC_CHANNEL_10)
 8005530:	2c09      	cmp	r4, #9
 8005532:	ea4f 0344 	mov.w	r3, r4, lsl #1
 8005536:	688d      	ldr	r5, [r1, #8]
 8005538:	d92f      	bls.n	800559a <HAL_ADC_ConfigChannel+0xa2>
  {
    MODIFY_REG(hadc->Instance->SMPR1                             ,
 800553a:	2607      	movs	r6, #7
 800553c:	4423      	add	r3, r4
 800553e:	68d1      	ldr	r1, [r2, #12]
 8005540:	3b1e      	subs	r3, #30
 8005542:	409e      	lsls	r6, r3
 8005544:	ea21 0106 	bic.w	r1, r1, r6
 8005548:	fa05 f303 	lsl.w	r3, r5, r3
 800554c:	430b      	orrs	r3, r1
 800554e:	60d3      	str	r3, [r2, #12]
               ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
  }
  
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
  /* and VREFINT measurement path.                                            */
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
 8005550:	f1a4 0310 	sub.w	r3, r4, #16
 8005554:	2b01      	cmp	r3, #1
 8005556:	d92b      	bls.n	80055b0 <HAL_ADC_ConfigChannel+0xb8>
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 8005558:	2300      	movs	r3, #0
      tmp_hal_status = HAL_ERROR;
    }
  }
  
  /* Process unlocked */
  __HAL_UNLOCK(hadc);
 800555a:	2200      	movs	r2, #0
 800555c:	f880 2024 	strb.w	r2, [r0, #36]	; 0x24
  
  /* Return function status */
  return tmp_hal_status;
}
 8005560:	4618      	mov	r0, r3
 8005562:	b002      	add	sp, #8
 8005564:	bd70      	pop	{r4, r5, r6, pc}
  else if (sConfig->Rank < 13U)
 8005566:	2d0c      	cmp	r5, #12
 8005568:	d80b      	bhi.n	8005582 <HAL_ADC_ConfigChannel+0x8a>
    MODIFY_REG(hadc->Instance->SQR2                        ,
 800556a:	442b      	add	r3, r5
 800556c:	251f      	movs	r5, #31
 800556e:	6b16      	ldr	r6, [r2, #48]	; 0x30
 8005570:	3b23      	subs	r3, #35	; 0x23
 8005572:	409d      	lsls	r5, r3
 8005574:	ea26 0505 	bic.w	r5, r6, r5
 8005578:	fa04 f303 	lsl.w	r3, r4, r3
 800557c:	432b      	orrs	r3, r5
 800557e:	6313      	str	r3, [r2, #48]	; 0x30
 8005580:	e7d6      	b.n	8005530 <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SQR1                        ,
 8005582:	442b      	add	r3, r5
 8005584:	251f      	movs	r5, #31
 8005586:	6ad6      	ldr	r6, [r2, #44]	; 0x2c
 8005588:	3b41      	subs	r3, #65	; 0x41
 800558a:	409d      	lsls	r5, r3
 800558c:	ea26 0505 	bic.w	r5, r6, r5
 8005590:	fa04 f303 	lsl.w	r3, r4, r3
 8005594:	432b      	orrs	r3, r5
 8005596:	62d3      	str	r3, [r2, #44]	; 0x2c
 8005598:	e7ca      	b.n	8005530 <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SMPR2                             ,
 800559a:	2607      	movs	r6, #7
 800559c:	6911      	ldr	r1, [r2, #16]
 800559e:	4423      	add	r3, r4
 80055a0:	409e      	lsls	r6, r3
 80055a2:	ea21 0106 	bic.w	r1, r1, r6
 80055a6:	fa05 f303 	lsl.w	r3, r5, r3
 80055aa:	430b      	orrs	r3, r1
 80055ac:	6113      	str	r3, [r2, #16]
 80055ae:	e7cf      	b.n	8005550 <HAL_ADC_ConfigChannel+0x58>
    if (hadc->Instance == ADC1)
 80055b0:	4b10      	ldr	r3, [pc, #64]	; (80055f4 <HAL_ADC_ConfigChannel+0xfc>)
 80055b2:	429a      	cmp	r2, r3
 80055b4:	d116      	bne.n	80055e4 <HAL_ADC_ConfigChannel+0xec>
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
 80055b6:	6893      	ldr	r3, [r2, #8]
 80055b8:	021b      	lsls	r3, r3, #8
 80055ba:	d4cd      	bmi.n	8005558 <HAL_ADC_ConfigChannel+0x60>
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 80055bc:	6893      	ldr	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 80055be:	2c10      	cmp	r4, #16
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 80055c0:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
 80055c4:	6093      	str	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 80055c6:	d1c7      	bne.n	8005558 <HAL_ADC_ConfigChannel+0x60>
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
 80055c8:	4b0b      	ldr	r3, [pc, #44]	; (80055f8 <HAL_ADC_ConfigChannel+0x100>)
 80055ca:	4a0c      	ldr	r2, [pc, #48]	; (80055fc <HAL_ADC_ConfigChannel+0x104>)
 80055cc:	681b      	ldr	r3, [r3, #0]
 80055ce:	fbb3 f2f2 	udiv	r2, r3, r2
 80055d2:	230a      	movs	r3, #10
 80055d4:	4353      	muls	r3, r2
            wait_loop_index--;
 80055d6:	9301      	str	r3, [sp, #4]
          while(wait_loop_index != 0U)
 80055d8:	9b01      	ldr	r3, [sp, #4]
 80055da:	2b00      	cmp	r3, #0
 80055dc:	d0bc      	beq.n	8005558 <HAL_ADC_ConfigChannel+0x60>
            wait_loop_index--;
 80055de:	9b01      	ldr	r3, [sp, #4]
 80055e0:	3b01      	subs	r3, #1
 80055e2:	e7f8      	b.n	80055d6 <HAL_ADC_ConfigChannel+0xde>
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 80055e4:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80055e6:	f043 0320 	orr.w	r3, r3, #32
 80055ea:	6283      	str	r3, [r0, #40]	; 0x28
      tmp_hal_status = HAL_ERROR;
 80055ec:	2301      	movs	r3, #1
 80055ee:	e7b4      	b.n	800555a <HAL_ADC_ConfigChannel+0x62>
  __HAL_LOCK(hadc);
 80055f0:	2302      	movs	r3, #2
 80055f2:	e7b5      	b.n	8005560 <HAL_ADC_ConfigChannel+0x68>
 80055f4:	40012400 	.word	0x40012400
 80055f8:	20000200 	.word	0x20000200
 80055fc:	000f4240 	.word	0x000f4240

08005600 <ADC_ConversionStop_Disable>:
  *         stopped to disable the ADC.
  * @param  hadc: ADC handle
  * @retval HAL status.
  */
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
 8005600:	b538      	push	{r3, r4, r5, lr}
  uint32_t tickstart = 0U;
  
  /* Verification if ADC is not already disabled */
  if (ADC_IS_ENABLE(hadc) != RESET)
 8005602:	6803      	ldr	r3, [r0, #0]
{
 8005604:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) != RESET)
 8005606:	689a      	ldr	r2, [r3, #8]
 8005608:	07d2      	lsls	r2, r2, #31
 800560a:	d401      	bmi.n	8005610 <ADC_ConversionStop_Disable+0x10>
      }
    }
  }
  
  /* Return HAL status */
  return HAL_OK;
 800560c:	2000      	movs	r0, #0
 800560e:	bd38      	pop	{r3, r4, r5, pc}
    __HAL_ADC_DISABLE(hadc);
 8005610:	689a      	ldr	r2, [r3, #8]
 8005612:	f022 0201 	bic.w	r2, r2, #1
 8005616:	609a      	str	r2, [r3, #8]
    tickstart = HAL_GetTick();
 8005618:	f7ff ff56 	bl	80054c8 <HAL_GetTick>
 800561c:	4605      	mov	r5, r0
    while(ADC_IS_ENABLE(hadc) != RESET)
 800561e:	6823      	ldr	r3, [r4, #0]
 8005620:	689b      	ldr	r3, [r3, #8]
 8005622:	07db      	lsls	r3, r3, #31
 8005624:	d5f2      	bpl.n	800560c <ADC_ConversionStop_Disable+0xc>
      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
 8005626:	f7ff ff4f 	bl	80054c8 <HAL_GetTick>
 800562a:	1b40      	subs	r0, r0, r5
 800562c:	2802      	cmp	r0, #2
 800562e:	d9f6      	bls.n	800561e <ADC_ConversionStop_Disable+0x1e>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8005630:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005632:	2001      	movs	r0, #1
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8005634:	f043 0310 	orr.w	r3, r3, #16
 8005638:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 800563a:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 800563c:	f043 0301 	orr.w	r3, r3, #1
 8005640:	62e3      	str	r3, [r4, #44]	; 0x2c
 8005642:	bd38      	pop	{r3, r4, r5, pc}

08005644 <HAL_ADC_Init>:
{
 8005644:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  if(hadc == NULL)
 8005646:	4604      	mov	r4, r0
 8005648:	2800      	cmp	r0, #0
 800564a:	d077      	beq.n	800573c <HAL_ADC_Init+0xf8>
  if (hadc->State == HAL_ADC_STATE_RESET)
 800564c:	6a83      	ldr	r3, [r0, #40]	; 0x28
 800564e:	b923      	cbnz	r3, 800565a <HAL_ADC_Init+0x16>
    ADC_CLEAR_ERRORCODE(hadc);
 8005650:	62c3      	str	r3, [r0, #44]	; 0x2c
    hadc->Lock = HAL_UNLOCKED;
 8005652:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
    HAL_ADC_MspInit(hadc);
 8005656:	f002 fd69 	bl	800812c <HAL_ADC_MspInit>
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 800565a:	4620      	mov	r0, r4
 800565c:	f7ff ffd0 	bl	8005600 <ADC_ConversionStop_Disable>
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
 8005660:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8005662:	f013 0310 	ands.w	r3, r3, #16
 8005666:	d16b      	bne.n	8005740 <HAL_ADC_Init+0xfc>
 8005668:	2800      	cmp	r0, #0
 800566a:	d169      	bne.n	8005740 <HAL_ADC_Init+0xfc>
    ADC_STATE_CLR_SET(hadc->State,
 800566c:	6aa2      	ldr	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800566e:	4937      	ldr	r1, [pc, #220]	; (800574c <HAL_ADC_Init+0x108>)
    ADC_STATE_CLR_SET(hadc->State,
 8005670:	f422 5288 	bic.w	r2, r2, #4352	; 0x1100
 8005674:	f022 0202 	bic.w	r2, r2, #2
 8005678:	f042 0202 	orr.w	r2, r2, #2
 800567c:	62a2      	str	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800567e:	e894 0024 	ldmia.w	r4, {r2, r5}
 8005682:	428a      	cmp	r2, r1
 8005684:	69e1      	ldr	r1, [r4, #28]
 8005686:	d104      	bne.n	8005692 <HAL_ADC_Init+0x4e>
 8005688:	f5b1 2f40 	cmp.w	r1, #786432	; 0xc0000
 800568c:	bf08      	it	eq
 800568e:	f44f 2100 	moveq.w	r1, #524288	; 0x80000
                ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode)   );
 8005692:	68e6      	ldr	r6, [r4, #12]
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 8005694:	ea45 0546 	orr.w	r5, r5, r6, lsl #1
 8005698:	4329      	orrs	r1, r5
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 800569a:	68a5      	ldr	r5, [r4, #8]
 800569c:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
 80056a0:	d035      	beq.n	800570e <HAL_ADC_Init+0xca>
 80056a2:	2d01      	cmp	r5, #1
 80056a4:	bf08      	it	eq
 80056a6:	f44f 7380 	moveq.w	r3, #256	; 0x100
    if (hadc->Init.DiscontinuousConvMode == ENABLE)
 80056aa:	6967      	ldr	r7, [r4, #20]
 80056ac:	2f01      	cmp	r7, #1
 80056ae:	d106      	bne.n	80056be <HAL_ADC_Init+0x7a>
      if (hadc->Init.ContinuousConvMode == DISABLE)
 80056b0:	bb7e      	cbnz	r6, 8005712 <HAL_ADC_Init+0xce>
        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
 80056b2:	69a6      	ldr	r6, [r4, #24]
 80056b4:	3e01      	subs	r6, #1
 80056b6:	ea43 3346 	orr.w	r3, r3, r6, lsl #13
 80056ba:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
      MODIFY_REG(hadc->Instance->CR1,
 80056be:	6856      	ldr	r6, [r2, #4]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80056c0:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
      MODIFY_REG(hadc->Instance->CR1,
 80056c4:	f426 4669 	bic.w	r6, r6, #59648	; 0xe900
 80056c8:	ea43 0306 	orr.w	r3, r3, r6
 80056cc:	6053      	str	r3, [r2, #4]
      MODIFY_REG(hadc->Instance->CR2,
 80056ce:	6896      	ldr	r6, [r2, #8]
 80056d0:	4b1f      	ldr	r3, [pc, #124]	; (8005750 <HAL_ADC_Init+0x10c>)
 80056d2:	ea03 0306 	and.w	r3, r3, r6
 80056d6:	ea43 0301 	orr.w	r3, r3, r1
 80056da:	6093      	str	r3, [r2, #8]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80056dc:	d001      	beq.n	80056e2 <HAL_ADC_Init+0x9e>
 80056de:	2d01      	cmp	r5, #1
 80056e0:	d120      	bne.n	8005724 <HAL_ADC_Init+0xe0>
      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
 80056e2:	6923      	ldr	r3, [r4, #16]
 80056e4:	3b01      	subs	r3, #1
 80056e6:	051b      	lsls	r3, r3, #20
    MODIFY_REG(hadc->Instance->SQR1,
 80056e8:	6ad5      	ldr	r5, [r2, #44]	; 0x2c
 80056ea:	f425 0570 	bic.w	r5, r5, #15728640	; 0xf00000
 80056ee:	432b      	orrs	r3, r5
 80056f0:	62d3      	str	r3, [r2, #44]	; 0x2c
    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
 80056f2:	6892      	ldr	r2, [r2, #8]
 80056f4:	4b17      	ldr	r3, [pc, #92]	; (8005754 <HAL_ADC_Init+0x110>)
 80056f6:	4013      	ands	r3, r2
 80056f8:	4299      	cmp	r1, r3
 80056fa:	d115      	bne.n	8005728 <HAL_ADC_Init+0xe4>
      ADC_CLEAR_ERRORCODE(hadc);
 80056fc:	2300      	movs	r3, #0
 80056fe:	62e3      	str	r3, [r4, #44]	; 0x2c
      ADC_STATE_CLR_SET(hadc->State,
 8005700:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8005702:	f023 0303 	bic.w	r3, r3, #3
 8005706:	f043 0301 	orr.w	r3, r3, #1
 800570a:	62a3      	str	r3, [r4, #40]	; 0x28
 800570c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 800570e:	462b      	mov	r3, r5
 8005710:	e7cb      	b.n	80056aa <HAL_ADC_Init+0x66>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 8005712:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 8005714:	f046 0620 	orr.w	r6, r6, #32
 8005718:	62a6      	str	r6, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 800571a:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800571c:	f046 0601 	orr.w	r6, r6, #1
 8005720:	62e6      	str	r6, [r4, #44]	; 0x2c
 8005722:	e7cc      	b.n	80056be <HAL_ADC_Init+0x7a>
  uint32_t tmp_sqr1 = 0U;
 8005724:	2300      	movs	r3, #0
 8005726:	e7df      	b.n	80056e8 <HAL_ADC_Init+0xa4>
      ADC_STATE_CLR_SET(hadc->State,
 8005728:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800572a:	f023 0312 	bic.w	r3, r3, #18
 800572e:	f043 0310 	orr.w	r3, r3, #16
 8005732:	62a3      	str	r3, [r4, #40]	; 0x28
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005734:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 8005736:	f043 0301 	orr.w	r3, r3, #1
 800573a:	62e3      	str	r3, [r4, #44]	; 0x2c
    return HAL_ERROR;
 800573c:	2001      	movs	r0, #1
}
 800573e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8005740:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8005742:	f043 0310 	orr.w	r3, r3, #16
 8005746:	62a3      	str	r3, [r4, #40]	; 0x28
 8005748:	e7f8      	b.n	800573c <HAL_ADC_Init+0xf8>
 800574a:	bf00      	nop
 800574c:	40013c00 	.word	0x40013c00
 8005750:	ffe1f7fd 	.word	0xffe1f7fd
 8005754:	ff1f0efe 	.word	0xff1f0efe

08005758 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005758:	4a07      	ldr	r2, [pc, #28]	; (8005778 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 800575a:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 800575c:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 800575e:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 8005762:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8005766:	041b      	lsls	r3, r3, #16
 8005768:	0c1b      	lsrs	r3, r3, #16
 800576a:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 800576e:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 8005772:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 8005774:	60d3      	str	r3, [r2, #12]
 8005776:	4770      	bx	lr
 8005778:	e000ed00 	.word	0xe000ed00

0800577c <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 800577c:	4b17      	ldr	r3, [pc, #92]	; (80057dc <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 800577e:	b530      	push	{r4, r5, lr}
 8005780:	68dc      	ldr	r4, [r3, #12]
 8005782:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005786:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800578a:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 800578c:	2b04      	cmp	r3, #4
 800578e:	bf28      	it	cs
 8005790:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005792:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005794:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005798:	bf98      	it	ls
 800579a:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800579c:	fa05 f303 	lsl.w	r3, r5, r3
 80057a0:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80057a4:	bf88      	it	hi
 80057a6:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80057a8:	4019      	ands	r1, r3
 80057aa:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 80057ac:	fa05 f404 	lsl.w	r4, r5, r4
 80057b0:	3c01      	subs	r4, #1
 80057b2:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 80057b4:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 80057b6:	ea42 0201 	orr.w	r2, r2, r1
 80057ba:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057be:	bfaf      	iteee	ge
 80057c0:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057c4:	4b06      	ldrlt	r3, [pc, #24]	; (80057e0 <HAL_NVIC_SetPriority+0x64>)
 80057c6:	f000 000f 	andlt.w	r0, r0, #15
 80057ca:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057cc:	bfa5      	ittet	ge
 80057ce:	b2d2      	uxtbge	r2, r2
 80057d0:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057d4:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057d6:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 80057da:	bd30      	pop	{r4, r5, pc}
 80057dc:	e000ed00 	.word	0xe000ed00
 80057e0:	e000ed14 	.word	0xe000ed14

080057e4 <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 80057e4:	2301      	movs	r3, #1
 80057e6:	0942      	lsrs	r2, r0, #5
 80057e8:	f000 001f 	and.w	r0, r0, #31
 80057ec:	fa03 f000 	lsl.w	r0, r3, r0
 80057f0:	4b01      	ldr	r3, [pc, #4]	; (80057f8 <HAL_NVIC_EnableIRQ+0x14>)
 80057f2:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 80057f6:	4770      	bx	lr
 80057f8:	e000e100 	.word	0xe000e100

080057fc <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 80057fc:	3801      	subs	r0, #1
 80057fe:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8005802:	d20a      	bcs.n	800581a <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005804:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8005806:	4b06      	ldr	r3, [pc, #24]	; (8005820 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005808:	4a06      	ldr	r2, [pc, #24]	; (8005824 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800580a:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800580c:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8005810:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8005812:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8005814:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8005816:	601a      	str	r2, [r3, #0]
 8005818:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 800581a:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 800581c:	4770      	bx	lr
 800581e:	bf00      	nop
 8005820:	e000e010 	.word	0xe000e010
 8005824:	e000ed00 	.word	0xe000ed00

08005828 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Channel.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 8005828:	b510      	push	{r4, lr}
  uint32_t tmp = 0U;

  /* Check the DMA handle allocation */
  if(hdma == NULL)
 800582a:	2800      	cmp	r0, #0
 800582c:	d032      	beq.n	8005894 <HAL_DMA_Init+0x6c>
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

#if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC)
  /* calculation of the channel index */
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 800582e:	6801      	ldr	r1, [r0, #0]
 8005830:	4b19      	ldr	r3, [pc, #100]	; (8005898 <HAL_DMA_Init+0x70>)
 8005832:	2414      	movs	r4, #20
 8005834:	4299      	cmp	r1, r3
 8005836:	d825      	bhi.n	8005884 <HAL_DMA_Init+0x5c>
  {
    /* DMA1 */
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 8005838:	4a18      	ldr	r2, [pc, #96]	; (800589c <HAL_DMA_Init+0x74>)
    hdma->DmaBaseAddress = DMA1;
 800583a:	f2a3 4307 	subw	r3, r3, #1031	; 0x407
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 800583e:	440a      	add	r2, r1
 8005840:	fbb2 f2f4 	udiv	r2, r2, r4
 8005844:	0092      	lsls	r2, r2, #2
 8005846:	6402      	str	r2, [r0, #64]	; 0x40
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
                      DMA_CCR_DIR));

  /* Prepare the DMA Channel configuration */
  tmp |=  hdma->Init.Direction        |
 8005848:	6884      	ldr	r4, [r0, #8]
    hdma->DmaBaseAddress = DMA2;
 800584a:	63c3      	str	r3, [r0, #60]	; 0x3c
  tmp |=  hdma->Init.Direction        |
 800584c:	6843      	ldr	r3, [r0, #4]
  tmp = hdma->Instance->CCR;
 800584e:	680a      	ldr	r2, [r1, #0]
  tmp |=  hdma->Init.Direction        |
 8005850:	4323      	orrs	r3, r4
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005852:	68c4      	ldr	r4, [r0, #12]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8005854:	f422 527f 	bic.w	r2, r2, #16320	; 0x3fc0
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005858:	4323      	orrs	r3, r4
 800585a:	6904      	ldr	r4, [r0, #16]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 800585c:	f022 0230 	bic.w	r2, r2, #48	; 0x30
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005860:	4323      	orrs	r3, r4
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005862:	6944      	ldr	r4, [r0, #20]
 8005864:	4323      	orrs	r3, r4
 8005866:	6984      	ldr	r4, [r0, #24]
 8005868:	4323      	orrs	r3, r4
          hdma->Init.Mode                | hdma->Init.Priority;
 800586a:	69c4      	ldr	r4, [r0, #28]
 800586c:	4323      	orrs	r3, r4
  tmp |=  hdma->Init.Direction        |
 800586e:	4313      	orrs	r3, r2

  /* Write to DMA Channel CR register */
  hdma->Instance->CCR = tmp;
 8005870:	600b      	str	r3, [r1, #0]

  /* Initialise the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;

  /* Initialize the DMA state*/
  hdma->State = HAL_DMA_STATE_READY;
 8005872:	2201      	movs	r2, #1
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005874:	2300      	movs	r3, #0
  hdma->State = HAL_DMA_STATE_READY;
 8005876:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 800587a:	6383      	str	r3, [r0, #56]	; 0x38
  /* Allocate lock resource and initialize it */
  hdma->Lock = HAL_UNLOCKED;
 800587c:	f880 3020 	strb.w	r3, [r0, #32]

  return HAL_OK;
 8005880:	4618      	mov	r0, r3
 8005882:	bd10      	pop	{r4, pc}
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 8005884:	4b06      	ldr	r3, [pc, #24]	; (80058a0 <HAL_DMA_Init+0x78>)
 8005886:	440b      	add	r3, r1
 8005888:	fbb3 f3f4 	udiv	r3, r3, r4
 800588c:	009b      	lsls	r3, r3, #2
 800588e:	6403      	str	r3, [r0, #64]	; 0x40
    hdma->DmaBaseAddress = DMA2;
 8005890:	4b04      	ldr	r3, [pc, #16]	; (80058a4 <HAL_DMA_Init+0x7c>)
 8005892:	e7d9      	b.n	8005848 <HAL_DMA_Init+0x20>
    return HAL_ERROR;
 8005894:	2001      	movs	r0, #1
}
 8005896:	bd10      	pop	{r4, pc}
 8005898:	40020407 	.word	0x40020407
 800589c:	bffdfff8 	.word	0xbffdfff8
 80058a0:	bffdfbf8 	.word	0xbffdfbf8
 80058a4:	40020400 	.word	0x40020400

080058a8 <HAL_DMA_Start_IT>:
  * @param  DstAddress: The destination memory Buffer address
  * @param  DataLength: The length of data to be transferred from source to destination
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
 80058a8:	b5f0      	push	{r4, r5, r6, r7, lr}

  /* Check the parameters */
  assert_param(IS_DMA_BUFFER_SIZE(DataLength));

  /* Process locked */
  __HAL_LOCK(hdma);
 80058aa:	f890 4020 	ldrb.w	r4, [r0, #32]
 80058ae:	2c01      	cmp	r4, #1
 80058b0:	d035      	beq.n	800591e <HAL_DMA_Start_IT+0x76>
 80058b2:	2401      	movs	r4, #1
  
  if(HAL_DMA_STATE_READY == hdma->State)
 80058b4:	f890 5021 	ldrb.w	r5, [r0, #33]	; 0x21
  __HAL_LOCK(hdma);
 80058b8:	f880 4020 	strb.w	r4, [r0, #32]
  if(HAL_DMA_STATE_READY == hdma->State)
 80058bc:	42a5      	cmp	r5, r4
 80058be:	f04f 0600 	mov.w	r6, #0
 80058c2:	f04f 0402 	mov.w	r4, #2
 80058c6:	d128      	bne.n	800591a <HAL_DMA_Start_IT+0x72>
  {
    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 80058c8:	f880 4021 	strb.w	r4, [r0, #33]	; 0x21
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
    
    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 80058cc:	6804      	ldr	r4, [r0, #0]
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 80058ce:	6386      	str	r6, [r0, #56]	; 0x38
    __HAL_DMA_DISABLE(hdma);
 80058d0:	6826      	ldr	r6, [r4, #0]
  * @retval HAL status
  */
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
  /* Clear all flags */
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 80058d2:	6c07      	ldr	r7, [r0, #64]	; 0x40
    __HAL_DMA_DISABLE(hdma);
 80058d4:	f026 0601 	bic.w	r6, r6, #1
 80058d8:	6026      	str	r6, [r4, #0]
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 80058da:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
 80058dc:	40bd      	lsls	r5, r7
 80058de:	6075      	str	r5, [r6, #4]

  /* Configure DMA Channel data length */
  hdma->Instance->CNDTR = DataLength;
 80058e0:	6063      	str	r3, [r4, #4]

  /* Memory to Peripheral */
  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
 80058e2:	6843      	ldr	r3, [r0, #4]
 80058e4:	6805      	ldr	r5, [r0, #0]
 80058e6:	2b10      	cmp	r3, #16
    if(NULL != hdma->XferHalfCpltCallback)
 80058e8:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
  {
    /* Configure DMA Channel destination address */
    hdma->Instance->CPAR = DstAddress;
 80058ea:	bf0b      	itete	eq
 80058ec:	60a2      	streq	r2, [r4, #8]
  }
  /* Peripheral to Memory */
  else
  {
    /* Configure DMA Channel source address */
    hdma->Instance->CPAR = SrcAddress;
 80058ee:	60a1      	strne	r1, [r4, #8]
    hdma->Instance->CMAR = SrcAddress;
 80058f0:	60e1      	streq	r1, [r4, #12]

    /* Configure DMA Channel destination address */
    hdma->Instance->CMAR = DstAddress;
 80058f2:	60e2      	strne	r2, [r4, #12]
    if(NULL != hdma->XferHalfCpltCallback)
 80058f4:	b14b      	cbz	r3, 800590a <HAL_DMA_Start_IT+0x62>
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80058f6:	6823      	ldr	r3, [r4, #0]
 80058f8:	f043 030e 	orr.w	r3, r3, #14
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 80058fc:	6023      	str	r3, [r4, #0]
    __HAL_DMA_ENABLE(hdma);
 80058fe:	682b      	ldr	r3, [r5, #0]
  HAL_StatusTypeDef status = HAL_OK;
 8005900:	2000      	movs	r0, #0
    __HAL_DMA_ENABLE(hdma);
 8005902:	f043 0301 	orr.w	r3, r3, #1
 8005906:	602b      	str	r3, [r5, #0]
 8005908:	bdf0      	pop	{r4, r5, r6, r7, pc}
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 800590a:	6823      	ldr	r3, [r4, #0]
 800590c:	f023 0304 	bic.w	r3, r3, #4
 8005910:	6023      	str	r3, [r4, #0]
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 8005912:	6823      	ldr	r3, [r4, #0]
 8005914:	f043 030a 	orr.w	r3, r3, #10
 8005918:	e7f0      	b.n	80058fc <HAL_DMA_Start_IT+0x54>
    __HAL_UNLOCK(hdma); 
 800591a:	f880 6020 	strb.w	r6, [r0, #32]
  __HAL_LOCK(hdma);
 800591e:	2002      	movs	r0, #2
}
 8005920:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08005924 <HAL_DMA_Abort_IT>:
  if(HAL_DMA_STATE_BUSY != hdma->State)
 8005924:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 8005928:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 800592a:	2b02      	cmp	r3, #2
 800592c:	d003      	beq.n	8005936 <HAL_DMA_Abort_IT+0x12>
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 800592e:	2304      	movs	r3, #4
 8005930:	6383      	str	r3, [r0, #56]	; 0x38
    status = HAL_ERROR;
 8005932:	2001      	movs	r0, #1
 8005934:	bd10      	pop	{r4, pc}
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005936:	6803      	ldr	r3, [r0, #0]
 8005938:	681a      	ldr	r2, [r3, #0]
 800593a:	f022 020e 	bic.w	r2, r2, #14
 800593e:	601a      	str	r2, [r3, #0]
    __HAL_DMA_DISABLE(hdma);
 8005940:	681a      	ldr	r2, [r3, #0]
 8005942:	f022 0201 	bic.w	r2, r2, #1
 8005946:	601a      	str	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8005948:	4a29      	ldr	r2, [pc, #164]	; (80059f0 <HAL_DMA_Abort_IT+0xcc>)
 800594a:	4293      	cmp	r3, r2
 800594c:	d924      	bls.n	8005998 <HAL_DMA_Abort_IT+0x74>
 800594e:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005952:	4293      	cmp	r3, r2
 8005954:	d019      	beq.n	800598a <HAL_DMA_Abort_IT+0x66>
 8005956:	3214      	adds	r2, #20
 8005958:	4293      	cmp	r3, r2
 800595a:	d018      	beq.n	800598e <HAL_DMA_Abort_IT+0x6a>
 800595c:	3214      	adds	r2, #20
 800595e:	4293      	cmp	r3, r2
 8005960:	d017      	beq.n	8005992 <HAL_DMA_Abort_IT+0x6e>
 8005962:	3214      	adds	r2, #20
 8005964:	4293      	cmp	r3, r2
 8005966:	bf0c      	ite	eq
 8005968:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 800596c:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8005970:	4a20      	ldr	r2, [pc, #128]	; (80059f4 <HAL_DMA_Abort_IT+0xd0>)
 8005972:	6053      	str	r3, [r2, #4]
    hdma->State = HAL_DMA_STATE_READY;
 8005974:	2301      	movs	r3, #1
    __HAL_UNLOCK(hdma);
 8005976:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 8005978:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    if(hdma->XferAbortCallback != NULL)
 800597c:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 800597e:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 8005982:	b39b      	cbz	r3, 80059ec <HAL_DMA_Abort_IT+0xc8>
      hdma->XferAbortCallback(hdma);
 8005984:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8005986:	4620      	mov	r0, r4
 8005988:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 800598a:	2301      	movs	r3, #1
 800598c:	e7f0      	b.n	8005970 <HAL_DMA_Abort_IT+0x4c>
 800598e:	2310      	movs	r3, #16
 8005990:	e7ee      	b.n	8005970 <HAL_DMA_Abort_IT+0x4c>
 8005992:	f44f 7380 	mov.w	r3, #256	; 0x100
 8005996:	e7eb      	b.n	8005970 <HAL_DMA_Abort_IT+0x4c>
 8005998:	4917      	ldr	r1, [pc, #92]	; (80059f8 <HAL_DMA_Abort_IT+0xd4>)
 800599a:	428b      	cmp	r3, r1
 800599c:	d016      	beq.n	80059cc <HAL_DMA_Abort_IT+0xa8>
 800599e:	3114      	adds	r1, #20
 80059a0:	428b      	cmp	r3, r1
 80059a2:	d015      	beq.n	80059d0 <HAL_DMA_Abort_IT+0xac>
 80059a4:	3114      	adds	r1, #20
 80059a6:	428b      	cmp	r3, r1
 80059a8:	d014      	beq.n	80059d4 <HAL_DMA_Abort_IT+0xb0>
 80059aa:	3114      	adds	r1, #20
 80059ac:	428b      	cmp	r3, r1
 80059ae:	d014      	beq.n	80059da <HAL_DMA_Abort_IT+0xb6>
 80059b0:	3114      	adds	r1, #20
 80059b2:	428b      	cmp	r3, r1
 80059b4:	d014      	beq.n	80059e0 <HAL_DMA_Abort_IT+0xbc>
 80059b6:	3114      	adds	r1, #20
 80059b8:	428b      	cmp	r3, r1
 80059ba:	d014      	beq.n	80059e6 <HAL_DMA_Abort_IT+0xc2>
 80059bc:	4293      	cmp	r3, r2
 80059be:	bf14      	ite	ne
 80059c0:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 80059c4:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 80059c8:	4a0c      	ldr	r2, [pc, #48]	; (80059fc <HAL_DMA_Abort_IT+0xd8>)
 80059ca:	e7d2      	b.n	8005972 <HAL_DMA_Abort_IT+0x4e>
 80059cc:	2301      	movs	r3, #1
 80059ce:	e7fb      	b.n	80059c8 <HAL_DMA_Abort_IT+0xa4>
 80059d0:	2310      	movs	r3, #16
 80059d2:	e7f9      	b.n	80059c8 <HAL_DMA_Abort_IT+0xa4>
 80059d4:	f44f 7380 	mov.w	r3, #256	; 0x100
 80059d8:	e7f6      	b.n	80059c8 <HAL_DMA_Abort_IT+0xa4>
 80059da:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 80059de:	e7f3      	b.n	80059c8 <HAL_DMA_Abort_IT+0xa4>
 80059e0:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 80059e4:	e7f0      	b.n	80059c8 <HAL_DMA_Abort_IT+0xa4>
 80059e6:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 80059ea:	e7ed      	b.n	80059c8 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 80059ec:	4618      	mov	r0, r3
}
 80059ee:	bd10      	pop	{r4, pc}
 80059f0:	40020080 	.word	0x40020080
 80059f4:	40020400 	.word	0x40020400
 80059f8:	40020008 	.word	0x40020008
 80059fc:	40020000 	.word	0x40020000

08005a00 <HAL_DMA_IRQHandler>:
{
 8005a00:	b470      	push	{r4, r5, r6}
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005a02:	2504      	movs	r5, #4
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8005a04:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005a06:	6c02      	ldr	r2, [r0, #64]	; 0x40
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8005a08:	6834      	ldr	r4, [r6, #0]
  uint32_t source_it = hdma->Instance->CCR;
 8005a0a:	6803      	ldr	r3, [r0, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005a0c:	4095      	lsls	r5, r2
 8005a0e:	4225      	tst	r5, r4
  uint32_t source_it = hdma->Instance->CCR;
 8005a10:	6819      	ldr	r1, [r3, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005a12:	d055      	beq.n	8005ac0 <HAL_DMA_IRQHandler+0xc0>
 8005a14:	074d      	lsls	r5, r1, #29
 8005a16:	d553      	bpl.n	8005ac0 <HAL_DMA_IRQHandler+0xc0>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005a18:	681a      	ldr	r2, [r3, #0]
 8005a1a:	0696      	lsls	r6, r2, #26
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 8005a1c:	bf5e      	ittt	pl
 8005a1e:	681a      	ldrpl	r2, [r3, #0]
 8005a20:	f022 0204 	bicpl.w	r2, r2, #4
 8005a24:	601a      	strpl	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8005a26:	4a60      	ldr	r2, [pc, #384]	; (8005ba8 <HAL_DMA_IRQHandler+0x1a8>)
 8005a28:	4293      	cmp	r3, r2
 8005a2a:	d91f      	bls.n	8005a6c <HAL_DMA_IRQHandler+0x6c>
 8005a2c:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005a30:	4293      	cmp	r3, r2
 8005a32:	d014      	beq.n	8005a5e <HAL_DMA_IRQHandler+0x5e>
 8005a34:	3214      	adds	r2, #20
 8005a36:	4293      	cmp	r3, r2
 8005a38:	d013      	beq.n	8005a62 <HAL_DMA_IRQHandler+0x62>
 8005a3a:	3214      	adds	r2, #20
 8005a3c:	4293      	cmp	r3, r2
 8005a3e:	d012      	beq.n	8005a66 <HAL_DMA_IRQHandler+0x66>
 8005a40:	3214      	adds	r2, #20
 8005a42:	4293      	cmp	r3, r2
 8005a44:	bf0c      	ite	eq
 8005a46:	f44f 4380 	moveq.w	r3, #16384	; 0x4000
 8005a4a:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 8005a4e:	4a57      	ldr	r2, [pc, #348]	; (8005bac <HAL_DMA_IRQHandler+0x1ac>)
 8005a50:	6053      	str	r3, [r2, #4]
    if(hdma->XferHalfCpltCallback != NULL)
 8005a52:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
    if (hdma->XferErrorCallback != NULL)
 8005a54:	2b00      	cmp	r3, #0
 8005a56:	f000 80a5 	beq.w	8005ba4 <HAL_DMA_IRQHandler+0x1a4>
}
 8005a5a:	bc70      	pop	{r4, r5, r6}
      hdma->XferErrorCallback(hdma);
 8005a5c:	4718      	bx	r3
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8005a5e:	2304      	movs	r3, #4
 8005a60:	e7f5      	b.n	8005a4e <HAL_DMA_IRQHandler+0x4e>
 8005a62:	2340      	movs	r3, #64	; 0x40
 8005a64:	e7f3      	b.n	8005a4e <HAL_DMA_IRQHandler+0x4e>
 8005a66:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005a6a:	e7f0      	b.n	8005a4e <HAL_DMA_IRQHandler+0x4e>
 8005a6c:	4950      	ldr	r1, [pc, #320]	; (8005bb0 <HAL_DMA_IRQHandler+0x1b0>)
 8005a6e:	428b      	cmp	r3, r1
 8005a70:	d016      	beq.n	8005aa0 <HAL_DMA_IRQHandler+0xa0>
 8005a72:	3114      	adds	r1, #20
 8005a74:	428b      	cmp	r3, r1
 8005a76:	d015      	beq.n	8005aa4 <HAL_DMA_IRQHandler+0xa4>
 8005a78:	3114      	adds	r1, #20
 8005a7a:	428b      	cmp	r3, r1
 8005a7c:	d014      	beq.n	8005aa8 <HAL_DMA_IRQHandler+0xa8>
 8005a7e:	3114      	adds	r1, #20
 8005a80:	428b      	cmp	r3, r1
 8005a82:	d014      	beq.n	8005aae <HAL_DMA_IRQHandler+0xae>
 8005a84:	3114      	adds	r1, #20
 8005a86:	428b      	cmp	r3, r1
 8005a88:	d014      	beq.n	8005ab4 <HAL_DMA_IRQHandler+0xb4>
 8005a8a:	3114      	adds	r1, #20
 8005a8c:	428b      	cmp	r3, r1
 8005a8e:	d014      	beq.n	8005aba <HAL_DMA_IRQHandler+0xba>
 8005a90:	4293      	cmp	r3, r2
 8005a92:	bf14      	ite	ne
 8005a94:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 8005a98:	f04f 6380 	moveq.w	r3, #67108864	; 0x4000000
 8005a9c:	4a45      	ldr	r2, [pc, #276]	; (8005bb4 <HAL_DMA_IRQHandler+0x1b4>)
 8005a9e:	e7d7      	b.n	8005a50 <HAL_DMA_IRQHandler+0x50>
 8005aa0:	2304      	movs	r3, #4
 8005aa2:	e7fb      	b.n	8005a9c <HAL_DMA_IRQHandler+0x9c>
 8005aa4:	2340      	movs	r3, #64	; 0x40
 8005aa6:	e7f9      	b.n	8005a9c <HAL_DMA_IRQHandler+0x9c>
 8005aa8:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005aac:	e7f6      	b.n	8005a9c <HAL_DMA_IRQHandler+0x9c>
 8005aae:	f44f 4380 	mov.w	r3, #16384	; 0x4000
 8005ab2:	e7f3      	b.n	8005a9c <HAL_DMA_IRQHandler+0x9c>
 8005ab4:	f44f 2380 	mov.w	r3, #262144	; 0x40000
 8005ab8:	e7f0      	b.n	8005a9c <HAL_DMA_IRQHandler+0x9c>
 8005aba:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
 8005abe:	e7ed      	b.n	8005a9c <HAL_DMA_IRQHandler+0x9c>
  else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
 8005ac0:	2502      	movs	r5, #2
 8005ac2:	4095      	lsls	r5, r2
 8005ac4:	4225      	tst	r5, r4
 8005ac6:	d057      	beq.n	8005b78 <HAL_DMA_IRQHandler+0x178>
 8005ac8:	078d      	lsls	r5, r1, #30
 8005aca:	d555      	bpl.n	8005b78 <HAL_DMA_IRQHandler+0x178>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005acc:	681a      	ldr	r2, [r3, #0]
 8005ace:	0694      	lsls	r4, r2, #26
 8005ad0:	d406      	bmi.n	8005ae0 <HAL_DMA_IRQHandler+0xe0>
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  
 8005ad2:	681a      	ldr	r2, [r3, #0]
 8005ad4:	f022 020a 	bic.w	r2, r2, #10
 8005ad8:	601a      	str	r2, [r3, #0]
      hdma->State = HAL_DMA_STATE_READY;
 8005ada:	2201      	movs	r2, #1
 8005adc:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8005ae0:	4a31      	ldr	r2, [pc, #196]	; (8005ba8 <HAL_DMA_IRQHandler+0x1a8>)
 8005ae2:	4293      	cmp	r3, r2
 8005ae4:	d91e      	bls.n	8005b24 <HAL_DMA_IRQHandler+0x124>
 8005ae6:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005aea:	4293      	cmp	r3, r2
 8005aec:	d013      	beq.n	8005b16 <HAL_DMA_IRQHandler+0x116>
 8005aee:	3214      	adds	r2, #20
 8005af0:	4293      	cmp	r3, r2
 8005af2:	d012      	beq.n	8005b1a <HAL_DMA_IRQHandler+0x11a>
 8005af4:	3214      	adds	r2, #20
 8005af6:	4293      	cmp	r3, r2
 8005af8:	d011      	beq.n	8005b1e <HAL_DMA_IRQHandler+0x11e>
 8005afa:	3214      	adds	r2, #20
 8005afc:	4293      	cmp	r3, r2
 8005afe:	bf0c      	ite	eq
 8005b00:	f44f 5300 	moveq.w	r3, #8192	; 0x2000
 8005b04:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005b08:	4a28      	ldr	r2, [pc, #160]	; (8005bac <HAL_DMA_IRQHandler+0x1ac>)
 8005b0a:	6053      	str	r3, [r2, #4]
    __HAL_UNLOCK(hdma);
 8005b0c:	2300      	movs	r3, #0
 8005b0e:	f880 3020 	strb.w	r3, [r0, #32]
    if(hdma->XferCpltCallback != NULL)
 8005b12:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005b14:	e79e      	b.n	8005a54 <HAL_DMA_IRQHandler+0x54>
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8005b16:	2302      	movs	r3, #2
 8005b18:	e7f6      	b.n	8005b08 <HAL_DMA_IRQHandler+0x108>
 8005b1a:	2320      	movs	r3, #32
 8005b1c:	e7f4      	b.n	8005b08 <HAL_DMA_IRQHandler+0x108>
 8005b1e:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005b22:	e7f1      	b.n	8005b08 <HAL_DMA_IRQHandler+0x108>
 8005b24:	4922      	ldr	r1, [pc, #136]	; (8005bb0 <HAL_DMA_IRQHandler+0x1b0>)
 8005b26:	428b      	cmp	r3, r1
 8005b28:	d016      	beq.n	8005b58 <HAL_DMA_IRQHandler+0x158>
 8005b2a:	3114      	adds	r1, #20
 8005b2c:	428b      	cmp	r3, r1
 8005b2e:	d015      	beq.n	8005b5c <HAL_DMA_IRQHandler+0x15c>
 8005b30:	3114      	adds	r1, #20
 8005b32:	428b      	cmp	r3, r1
 8005b34:	d014      	beq.n	8005b60 <HAL_DMA_IRQHandler+0x160>
 8005b36:	3114      	adds	r1, #20
 8005b38:	428b      	cmp	r3, r1
 8005b3a:	d014      	beq.n	8005b66 <HAL_DMA_IRQHandler+0x166>
 8005b3c:	3114      	adds	r1, #20
 8005b3e:	428b      	cmp	r3, r1
 8005b40:	d014      	beq.n	8005b6c <HAL_DMA_IRQHandler+0x16c>
 8005b42:	3114      	adds	r1, #20
 8005b44:	428b      	cmp	r3, r1
 8005b46:	d014      	beq.n	8005b72 <HAL_DMA_IRQHandler+0x172>
 8005b48:	4293      	cmp	r3, r2
 8005b4a:	bf14      	ite	ne
 8005b4c:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005b50:	f04f 7300 	moveq.w	r3, #33554432	; 0x2000000
 8005b54:	4a17      	ldr	r2, [pc, #92]	; (8005bb4 <HAL_DMA_IRQHandler+0x1b4>)
 8005b56:	e7d8      	b.n	8005b0a <HAL_DMA_IRQHandler+0x10a>
 8005b58:	2302      	movs	r3, #2
 8005b5a:	e7fb      	b.n	8005b54 <HAL_DMA_IRQHandler+0x154>
 8005b5c:	2320      	movs	r3, #32
 8005b5e:	e7f9      	b.n	8005b54 <HAL_DMA_IRQHandler+0x154>
 8005b60:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005b64:	e7f6      	b.n	8005b54 <HAL_DMA_IRQHandler+0x154>
 8005b66:	f44f 5300 	mov.w	r3, #8192	; 0x2000
 8005b6a:	e7f3      	b.n	8005b54 <HAL_DMA_IRQHandler+0x154>
 8005b6c:	f44f 3300 	mov.w	r3, #131072	; 0x20000
 8005b70:	e7f0      	b.n	8005b54 <HAL_DMA_IRQHandler+0x154>
 8005b72:	f44f 1300 	mov.w	r3, #2097152	; 0x200000
 8005b76:	e7ed      	b.n	8005b54 <HAL_DMA_IRQHandler+0x154>
  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
 8005b78:	2508      	movs	r5, #8
 8005b7a:	4095      	lsls	r5, r2
 8005b7c:	4225      	tst	r5, r4
 8005b7e:	d011      	beq.n	8005ba4 <HAL_DMA_IRQHandler+0x1a4>
 8005b80:	0709      	lsls	r1, r1, #28
 8005b82:	d50f      	bpl.n	8005ba4 <HAL_DMA_IRQHandler+0x1a4>
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005b84:	6819      	ldr	r1, [r3, #0]
 8005b86:	f021 010e 	bic.w	r1, r1, #14
 8005b8a:	6019      	str	r1, [r3, #0]
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 8005b8c:	2301      	movs	r3, #1
 8005b8e:	fa03 f202 	lsl.w	r2, r3, r2
 8005b92:	6072      	str	r2, [r6, #4]
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
 8005b94:	6383      	str	r3, [r0, #56]	; 0x38
    hdma->State = HAL_DMA_STATE_READY;
 8005b96:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    __HAL_UNLOCK(hdma);
 8005b9a:	2300      	movs	r3, #0
 8005b9c:	f880 3020 	strb.w	r3, [r0, #32]
    if (hdma->XferErrorCallback != NULL)
 8005ba0:	6b03      	ldr	r3, [r0, #48]	; 0x30
 8005ba2:	e757      	b.n	8005a54 <HAL_DMA_IRQHandler+0x54>
}
 8005ba4:	bc70      	pop	{r4, r5, r6}
 8005ba6:	4770      	bx	lr
 8005ba8:	40020080 	.word	0x40020080
 8005bac:	40020400 	.word	0x40020400
 8005bb0:	40020008 	.word	0x40020008
 8005bb4:	40020000 	.word	0x40020000

08005bb8 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 8005bb8:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 8005bbc:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 8005bbe:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 8005bc0:	4f6c      	ldr	r7, [pc, #432]	; (8005d74 <HAL_GPIO_Init+0x1bc>)
 8005bc2:	4b6d      	ldr	r3, [pc, #436]	; (8005d78 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8005bc4:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 8005d80 <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 8005bc8:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 8005d84 <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 8005bcc:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8005bd0:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 8005bd2:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8005bd6:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 8005bda:	45a0      	cmp	r8, r4
 8005bdc:	f040 8085 	bne.w	8005cea <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 8005be0:	684d      	ldr	r5, [r1, #4]
 8005be2:	2d12      	cmp	r5, #18
 8005be4:	f000 80b7 	beq.w	8005d56 <HAL_GPIO_Init+0x19e>
 8005be8:	f200 808d 	bhi.w	8005d06 <HAL_GPIO_Init+0x14e>
 8005bec:	2d02      	cmp	r5, #2
 8005bee:	f000 80af 	beq.w	8005d50 <HAL_GPIO_Init+0x198>
 8005bf2:	f200 8081 	bhi.w	8005cf8 <HAL_GPIO_Init+0x140>
 8005bf6:	2d00      	cmp	r5, #0
 8005bf8:	f000 8091 	beq.w	8005d1e <HAL_GPIO_Init+0x166>
 8005bfc:	2d01      	cmp	r5, #1
 8005bfe:	f000 80a5 	beq.w	8005d4c <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8005c02:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8005c06:	2cff      	cmp	r4, #255	; 0xff
 8005c08:	bf93      	iteet	ls
 8005c0a:	4682      	movls	sl, r0
 8005c0c:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 8005c10:	3d08      	subhi	r5, #8
 8005c12:	f8d0 b000 	ldrls.w	fp, [r0]
 8005c16:	bf92      	itee	ls
 8005c18:	00b5      	lslls	r5, r6, #2
 8005c1a:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 8005c1e:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8005c20:	fa09 f805 	lsl.w	r8, r9, r5
 8005c24:	ea2b 0808 	bic.w	r8, fp, r8
 8005c28:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8005c2c:	bf88      	it	hi
 8005c2e:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8005c32:	ea48 0505 	orr.w	r5, r8, r5
 8005c36:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 8005c3a:	f8d1 a004 	ldr.w	sl, [r1, #4]
 8005c3e:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 8005c42:	d052      	beq.n	8005cea <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 8005c44:	69bd      	ldr	r5, [r7, #24]
 8005c46:	f026 0803 	bic.w	r8, r6, #3
 8005c4a:	f045 0501 	orr.w	r5, r5, #1
 8005c4e:	61bd      	str	r5, [r7, #24]
 8005c50:	69bd      	ldr	r5, [r7, #24]
 8005c52:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 8005c56:	f005 0501 	and.w	r5, r5, #1
 8005c5a:	9501      	str	r5, [sp, #4]
 8005c5c:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8005c60:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 8005c64:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8005c66:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 8005c6a:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8005c6e:	fa09 f90b 	lsl.w	r9, r9, fp
 8005c72:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8005c76:	4d41      	ldr	r5, [pc, #260]	; (8005d7c <HAL_GPIO_Init+0x1c4>)
 8005c78:	42a8      	cmp	r0, r5
 8005c7a:	d071      	beq.n	8005d60 <HAL_GPIO_Init+0x1a8>
 8005c7c:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005c80:	42a8      	cmp	r0, r5
 8005c82:	d06f      	beq.n	8005d64 <HAL_GPIO_Init+0x1ac>
 8005c84:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005c88:	42a8      	cmp	r0, r5
 8005c8a:	d06d      	beq.n	8005d68 <HAL_GPIO_Init+0x1b0>
 8005c8c:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005c90:	42a8      	cmp	r0, r5
 8005c92:	d06b      	beq.n	8005d6c <HAL_GPIO_Init+0x1b4>
 8005c94:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005c98:	42a8      	cmp	r0, r5
 8005c9a:	d069      	beq.n	8005d70 <HAL_GPIO_Init+0x1b8>
 8005c9c:	4570      	cmp	r0, lr
 8005c9e:	bf0c      	ite	eq
 8005ca0:	2505      	moveq	r5, #5
 8005ca2:	2506      	movne	r5, #6
 8005ca4:	fa05 f50b 	lsl.w	r5, r5, fp
 8005ca8:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 8005cac:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 8005cb0:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 8005cb2:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 8005cb6:	bf14      	ite	ne
 8005cb8:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 8005cba:	43a5      	biceq	r5, r4
 8005cbc:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 8005cbe:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 8005cc0:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 8005cc4:	bf14      	ite	ne
 8005cc6:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 8005cc8:	43a5      	biceq	r5, r4
 8005cca:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 8005ccc:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 8005cce:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 8005cd2:	bf14      	ite	ne
 8005cd4:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 8005cd6:	43a5      	biceq	r5, r4
 8005cd8:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 8005cda:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 8005cdc:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 8005ce0:	bf14      	ite	ne
 8005ce2:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 8005ce4:	ea25 0404 	biceq.w	r4, r5, r4
 8005ce8:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 8005cea:	3601      	adds	r6, #1
 8005cec:	2e10      	cmp	r6, #16
 8005cee:	f47f af6d 	bne.w	8005bcc <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 8005cf2:	b003      	add	sp, #12
 8005cf4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 8005cf8:	2d03      	cmp	r5, #3
 8005cfa:	d025      	beq.n	8005d48 <HAL_GPIO_Init+0x190>
 8005cfc:	2d11      	cmp	r5, #17
 8005cfe:	d180      	bne.n	8005c02 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 8005d00:	68ca      	ldr	r2, [r1, #12]
 8005d02:	3204      	adds	r2, #4
          break;
 8005d04:	e77d      	b.n	8005c02 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8005d06:	4565      	cmp	r5, ip
 8005d08:	d009      	beq.n	8005d1e <HAL_GPIO_Init+0x166>
 8005d0a:	d812      	bhi.n	8005d32 <HAL_GPIO_Init+0x17a>
 8005d0c:	f8df 9078 	ldr.w	r9, [pc, #120]	; 8005d88 <HAL_GPIO_Init+0x1d0>
 8005d10:	454d      	cmp	r5, r9
 8005d12:	d004      	beq.n	8005d1e <HAL_GPIO_Init+0x166>
 8005d14:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8005d18:	454d      	cmp	r5, r9
 8005d1a:	f47f af72 	bne.w	8005c02 <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 8005d1e:	688a      	ldr	r2, [r1, #8]
 8005d20:	b1e2      	cbz	r2, 8005d5c <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 8005d22:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 8005d24:	bf0c      	ite	eq
 8005d26:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 8005d2a:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 8005d2e:	2208      	movs	r2, #8
 8005d30:	e767      	b.n	8005c02 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8005d32:	f8df 9058 	ldr.w	r9, [pc, #88]	; 8005d8c <HAL_GPIO_Init+0x1d4>
 8005d36:	454d      	cmp	r5, r9
 8005d38:	d0f1      	beq.n	8005d1e <HAL_GPIO_Init+0x166>
 8005d3a:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8005d3e:	454d      	cmp	r5, r9
 8005d40:	d0ed      	beq.n	8005d1e <HAL_GPIO_Init+0x166>
 8005d42:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 8005d46:	e7e7      	b.n	8005d18 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8005d48:	2200      	movs	r2, #0
 8005d4a:	e75a      	b.n	8005c02 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 8005d4c:	68ca      	ldr	r2, [r1, #12]
          break;
 8005d4e:	e758      	b.n	8005c02 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 8005d50:	68ca      	ldr	r2, [r1, #12]
 8005d52:	3208      	adds	r2, #8
          break;
 8005d54:	e755      	b.n	8005c02 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 8005d56:	68ca      	ldr	r2, [r1, #12]
 8005d58:	320c      	adds	r2, #12
          break;
 8005d5a:	e752      	b.n	8005c02 <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 8005d5c:	2204      	movs	r2, #4
 8005d5e:	e750      	b.n	8005c02 <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8005d60:	2500      	movs	r5, #0
 8005d62:	e79f      	b.n	8005ca4 <HAL_GPIO_Init+0xec>
 8005d64:	2501      	movs	r5, #1
 8005d66:	e79d      	b.n	8005ca4 <HAL_GPIO_Init+0xec>
 8005d68:	2502      	movs	r5, #2
 8005d6a:	e79b      	b.n	8005ca4 <HAL_GPIO_Init+0xec>
 8005d6c:	2503      	movs	r5, #3
 8005d6e:	e799      	b.n	8005ca4 <HAL_GPIO_Init+0xec>
 8005d70:	2504      	movs	r5, #4
 8005d72:	e797      	b.n	8005ca4 <HAL_GPIO_Init+0xec>
 8005d74:	40021000 	.word	0x40021000
 8005d78:	40010400 	.word	0x40010400
 8005d7c:	40010800 	.word	0x40010800
 8005d80:	40011c00 	.word	0x40011c00
 8005d84:	10210000 	.word	0x10210000
 8005d88:	10110000 	.word	0x10110000
 8005d8c:	10310000 	.word	0x10310000

08005d90 <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 8005d90:	b10a      	cbz	r2, 8005d96 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 8005d92:	6101      	str	r1, [r0, #16]
 8005d94:	4770      	bx	lr
 8005d96:	0409      	lsls	r1, r1, #16
 8005d98:	e7fb      	b.n	8005d92 <HAL_GPIO_WritePin+0x2>

08005d9a <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 8005d9a:	68c3      	ldr	r3, [r0, #12]
 8005d9c:	4059      	eors	r1, r3
 8005d9e:	60c1      	str	r1, [r0, #12]
 8005da0:	4770      	bx	lr
	...

08005da4 <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005da4:	6803      	ldr	r3, [r0, #0]
{
 8005da6:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005daa:	07db      	lsls	r3, r3, #31
{
 8005dac:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005dae:	d410      	bmi.n	8005dd2 <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 8005db0:	682b      	ldr	r3, [r5, #0]
 8005db2:	079f      	lsls	r7, r3, #30
 8005db4:	d45e      	bmi.n	8005e74 <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8005db6:	682b      	ldr	r3, [r5, #0]
 8005db8:	0719      	lsls	r1, r3, #28
 8005dba:	f100 8095 	bmi.w	8005ee8 <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8005dbe:	682b      	ldr	r3, [r5, #0]
 8005dc0:	075a      	lsls	r2, r3, #29
 8005dc2:	f100 80bf 	bmi.w	8005f44 <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8005dc6:	69ea      	ldr	r2, [r5, #28]
 8005dc8:	2a00      	cmp	r2, #0
 8005dca:	f040 812d 	bne.w	8006028 <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 8005dce:	2000      	movs	r0, #0
 8005dd0:	e014      	b.n	8005dfc <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 8005dd2:	4c90      	ldr	r4, [pc, #576]	; (8006014 <HAL_RCC_OscConfig+0x270>)
 8005dd4:	6863      	ldr	r3, [r4, #4]
 8005dd6:	f003 030c 	and.w	r3, r3, #12
 8005dda:	2b04      	cmp	r3, #4
 8005ddc:	d007      	beq.n	8005dee <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 8005dde:	6863      	ldr	r3, [r4, #4]
 8005de0:	f003 030c 	and.w	r3, r3, #12
 8005de4:	2b08      	cmp	r3, #8
 8005de6:	d10c      	bne.n	8005e02 <HAL_RCC_OscConfig+0x5e>
 8005de8:	6863      	ldr	r3, [r4, #4]
 8005dea:	03de      	lsls	r6, r3, #15
 8005dec:	d509      	bpl.n	8005e02 <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8005dee:	6823      	ldr	r3, [r4, #0]
 8005df0:	039c      	lsls	r4, r3, #14
 8005df2:	d5dd      	bpl.n	8005db0 <HAL_RCC_OscConfig+0xc>
 8005df4:	686b      	ldr	r3, [r5, #4]
 8005df6:	2b00      	cmp	r3, #0
 8005df8:	d1da      	bne.n	8005db0 <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 8005dfa:	2001      	movs	r0, #1
}
 8005dfc:	b002      	add	sp, #8
 8005dfe:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8005e02:	686b      	ldr	r3, [r5, #4]
 8005e04:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8005e08:	d110      	bne.n	8005e2c <HAL_RCC_OscConfig+0x88>
 8005e0a:	6823      	ldr	r3, [r4, #0]
 8005e0c:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8005e10:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8005e12:	f7ff fb59 	bl	80054c8 <HAL_GetTick>
 8005e16:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8005e18:	6823      	ldr	r3, [r4, #0]
 8005e1a:	0398      	lsls	r0, r3, #14
 8005e1c:	d4c8      	bmi.n	8005db0 <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8005e1e:	f7ff fb53 	bl	80054c8 <HAL_GetTick>
 8005e22:	1b80      	subs	r0, r0, r6
 8005e24:	2864      	cmp	r0, #100	; 0x64
 8005e26:	d9f7      	bls.n	8005e18 <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 8005e28:	2003      	movs	r0, #3
 8005e2a:	e7e7      	b.n	8005dfc <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8005e2c:	b99b      	cbnz	r3, 8005e56 <HAL_RCC_OscConfig+0xb2>
 8005e2e:	6823      	ldr	r3, [r4, #0]
 8005e30:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8005e34:	6023      	str	r3, [r4, #0]
 8005e36:	6823      	ldr	r3, [r4, #0]
 8005e38:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8005e3c:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8005e3e:	f7ff fb43 	bl	80054c8 <HAL_GetTick>
 8005e42:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8005e44:	6823      	ldr	r3, [r4, #0]
 8005e46:	0399      	lsls	r1, r3, #14
 8005e48:	d5b2      	bpl.n	8005db0 <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8005e4a:	f7ff fb3d 	bl	80054c8 <HAL_GetTick>
 8005e4e:	1b80      	subs	r0, r0, r6
 8005e50:	2864      	cmp	r0, #100	; 0x64
 8005e52:	d9f7      	bls.n	8005e44 <HAL_RCC_OscConfig+0xa0>
 8005e54:	e7e8      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8005e56:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 8005e5a:	6823      	ldr	r3, [r4, #0]
 8005e5c:	d103      	bne.n	8005e66 <HAL_RCC_OscConfig+0xc2>
 8005e5e:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 8005e62:	6023      	str	r3, [r4, #0]
 8005e64:	e7d1      	b.n	8005e0a <HAL_RCC_OscConfig+0x66>
 8005e66:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8005e6a:	6023      	str	r3, [r4, #0]
 8005e6c:	6823      	ldr	r3, [r4, #0]
 8005e6e:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8005e72:	e7cd      	b.n	8005e10 <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 8005e74:	4c67      	ldr	r4, [pc, #412]	; (8006014 <HAL_RCC_OscConfig+0x270>)
 8005e76:	6863      	ldr	r3, [r4, #4]
 8005e78:	f013 0f0c 	tst.w	r3, #12
 8005e7c:	d007      	beq.n	8005e8e <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 8005e7e:	6863      	ldr	r3, [r4, #4]
 8005e80:	f003 030c 	and.w	r3, r3, #12
 8005e84:	2b08      	cmp	r3, #8
 8005e86:	d110      	bne.n	8005eaa <HAL_RCC_OscConfig+0x106>
 8005e88:	6863      	ldr	r3, [r4, #4]
 8005e8a:	03da      	lsls	r2, r3, #15
 8005e8c:	d40d      	bmi.n	8005eaa <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 8005e8e:	6823      	ldr	r3, [r4, #0]
 8005e90:	079b      	lsls	r3, r3, #30
 8005e92:	d502      	bpl.n	8005e9a <HAL_RCC_OscConfig+0xf6>
 8005e94:	692b      	ldr	r3, [r5, #16]
 8005e96:	2b01      	cmp	r3, #1
 8005e98:	d1af      	bne.n	8005dfa <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8005e9a:	6823      	ldr	r3, [r4, #0]
 8005e9c:	696a      	ldr	r2, [r5, #20]
 8005e9e:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 8005ea2:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8005ea6:	6023      	str	r3, [r4, #0]
 8005ea8:	e785      	b.n	8005db6 <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 8005eaa:	692a      	ldr	r2, [r5, #16]
 8005eac:	4b5a      	ldr	r3, [pc, #360]	; (8006018 <HAL_RCC_OscConfig+0x274>)
 8005eae:	b16a      	cbz	r2, 8005ecc <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 8005eb0:	2201      	movs	r2, #1
 8005eb2:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8005eb4:	f7ff fb08 	bl	80054c8 <HAL_GetTick>
 8005eb8:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8005eba:	6823      	ldr	r3, [r4, #0]
 8005ebc:	079f      	lsls	r7, r3, #30
 8005ebe:	d4ec      	bmi.n	8005e9a <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8005ec0:	f7ff fb02 	bl	80054c8 <HAL_GetTick>
 8005ec4:	1b80      	subs	r0, r0, r6
 8005ec6:	2802      	cmp	r0, #2
 8005ec8:	d9f7      	bls.n	8005eba <HAL_RCC_OscConfig+0x116>
 8005eca:	e7ad      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8005ecc:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8005ece:	f7ff fafb 	bl	80054c8 <HAL_GetTick>
 8005ed2:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8005ed4:	6823      	ldr	r3, [r4, #0]
 8005ed6:	0798      	lsls	r0, r3, #30
 8005ed8:	f57f af6d 	bpl.w	8005db6 <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8005edc:	f7ff faf4 	bl	80054c8 <HAL_GetTick>
 8005ee0:	1b80      	subs	r0, r0, r6
 8005ee2:	2802      	cmp	r0, #2
 8005ee4:	d9f6      	bls.n	8005ed4 <HAL_RCC_OscConfig+0x130>
 8005ee6:	e79f      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8005ee8:	69aa      	ldr	r2, [r5, #24]
 8005eea:	4c4a      	ldr	r4, [pc, #296]	; (8006014 <HAL_RCC_OscConfig+0x270>)
 8005eec:	4b4b      	ldr	r3, [pc, #300]	; (800601c <HAL_RCC_OscConfig+0x278>)
 8005eee:	b1da      	cbz	r2, 8005f28 <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 8005ef0:	2201      	movs	r2, #1
 8005ef2:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8005ef4:	f7ff fae8 	bl	80054c8 <HAL_GetTick>
 8005ef8:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8005efa:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8005efc:	079b      	lsls	r3, r3, #30
 8005efe:	d50d      	bpl.n	8005f1c <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 8005f00:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 8005f04:	4b46      	ldr	r3, [pc, #280]	; (8006020 <HAL_RCC_OscConfig+0x27c>)
 8005f06:	681b      	ldr	r3, [r3, #0]
 8005f08:	fbb3 f3f2 	udiv	r3, r3, r2
 8005f0c:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 8005f0e:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 8005f10:	9b01      	ldr	r3, [sp, #4]
 8005f12:	1e5a      	subs	r2, r3, #1
 8005f14:	9201      	str	r2, [sp, #4]
 8005f16:	2b00      	cmp	r3, #0
 8005f18:	d1f9      	bne.n	8005f0e <HAL_RCC_OscConfig+0x16a>
 8005f1a:	e750      	b.n	8005dbe <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8005f1c:	f7ff fad4 	bl	80054c8 <HAL_GetTick>
 8005f20:	1b80      	subs	r0, r0, r6
 8005f22:	2802      	cmp	r0, #2
 8005f24:	d9e9      	bls.n	8005efa <HAL_RCC_OscConfig+0x156>
 8005f26:	e77f      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 8005f28:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8005f2a:	f7ff facd 	bl	80054c8 <HAL_GetTick>
 8005f2e:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8005f30:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8005f32:	079f      	lsls	r7, r3, #30
 8005f34:	f57f af43 	bpl.w	8005dbe <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8005f38:	f7ff fac6 	bl	80054c8 <HAL_GetTick>
 8005f3c:	1b80      	subs	r0, r0, r6
 8005f3e:	2802      	cmp	r0, #2
 8005f40:	d9f6      	bls.n	8005f30 <HAL_RCC_OscConfig+0x18c>
 8005f42:	e771      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8005f44:	4c33      	ldr	r4, [pc, #204]	; (8006014 <HAL_RCC_OscConfig+0x270>)
 8005f46:	69e3      	ldr	r3, [r4, #28]
 8005f48:	00d8      	lsls	r0, r3, #3
 8005f4a:	d424      	bmi.n	8005f96 <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 8005f4c:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 8005f4e:	69e3      	ldr	r3, [r4, #28]
 8005f50:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8005f54:	61e3      	str	r3, [r4, #28]
 8005f56:	69e3      	ldr	r3, [r4, #28]
 8005f58:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8005f5c:	9300      	str	r3, [sp, #0]
 8005f5e:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8005f60:	4e30      	ldr	r6, [pc, #192]	; (8006024 <HAL_RCC_OscConfig+0x280>)
 8005f62:	6833      	ldr	r3, [r6, #0]
 8005f64:	05d9      	lsls	r1, r3, #23
 8005f66:	d518      	bpl.n	8005f9a <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005f68:	68eb      	ldr	r3, [r5, #12]
 8005f6a:	2b01      	cmp	r3, #1
 8005f6c:	d126      	bne.n	8005fbc <HAL_RCC_OscConfig+0x218>
 8005f6e:	6a23      	ldr	r3, [r4, #32]
 8005f70:	f043 0301 	orr.w	r3, r3, #1
 8005f74:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8005f76:	f7ff faa7 	bl	80054c8 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8005f7a:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 8005f7e:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 8005f80:	6a23      	ldr	r3, [r4, #32]
 8005f82:	079b      	lsls	r3, r3, #30
 8005f84:	d53f      	bpl.n	8006006 <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 8005f86:	2f00      	cmp	r7, #0
 8005f88:	f43f af1d 	beq.w	8005dc6 <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 8005f8c:	69e3      	ldr	r3, [r4, #28]
 8005f8e:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8005f92:	61e3      	str	r3, [r4, #28]
 8005f94:	e717      	b.n	8005dc6 <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 8005f96:	2700      	movs	r7, #0
 8005f98:	e7e2      	b.n	8005f60 <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8005f9a:	6833      	ldr	r3, [r6, #0]
 8005f9c:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8005fa0:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 8005fa2:	f7ff fa91 	bl	80054c8 <HAL_GetTick>
 8005fa6:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8005fa8:	6833      	ldr	r3, [r6, #0]
 8005faa:	05da      	lsls	r2, r3, #23
 8005fac:	d4dc      	bmi.n	8005f68 <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8005fae:	f7ff fa8b 	bl	80054c8 <HAL_GetTick>
 8005fb2:	eba0 0008 	sub.w	r0, r0, r8
 8005fb6:	2864      	cmp	r0, #100	; 0x64
 8005fb8:	d9f6      	bls.n	8005fa8 <HAL_RCC_OscConfig+0x204>
 8005fba:	e735      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005fbc:	b9ab      	cbnz	r3, 8005fea <HAL_RCC_OscConfig+0x246>
 8005fbe:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8005fc0:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005fc4:	f023 0301 	bic.w	r3, r3, #1
 8005fc8:	6223      	str	r3, [r4, #32]
 8005fca:	6a23      	ldr	r3, [r4, #32]
 8005fcc:	f023 0304 	bic.w	r3, r3, #4
 8005fd0:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8005fd2:	f7ff fa79 	bl	80054c8 <HAL_GetTick>
 8005fd6:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 8005fd8:	6a23      	ldr	r3, [r4, #32]
 8005fda:	0798      	lsls	r0, r3, #30
 8005fdc:	d5d3      	bpl.n	8005f86 <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8005fde:	f7ff fa73 	bl	80054c8 <HAL_GetTick>
 8005fe2:	1b80      	subs	r0, r0, r6
 8005fe4:	4540      	cmp	r0, r8
 8005fe6:	d9f7      	bls.n	8005fd8 <HAL_RCC_OscConfig+0x234>
 8005fe8:	e71e      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8005fea:	2b05      	cmp	r3, #5
 8005fec:	6a23      	ldr	r3, [r4, #32]
 8005fee:	d103      	bne.n	8005ff8 <HAL_RCC_OscConfig+0x254>
 8005ff0:	f043 0304 	orr.w	r3, r3, #4
 8005ff4:	6223      	str	r3, [r4, #32]
 8005ff6:	e7ba      	b.n	8005f6e <HAL_RCC_OscConfig+0x1ca>
 8005ff8:	f023 0301 	bic.w	r3, r3, #1
 8005ffc:	6223      	str	r3, [r4, #32]
 8005ffe:	6a23      	ldr	r3, [r4, #32]
 8006000:	f023 0304 	bic.w	r3, r3, #4
 8006004:	e7b6      	b.n	8005f74 <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8006006:	f7ff fa5f 	bl	80054c8 <HAL_GetTick>
 800600a:	eba0 0008 	sub.w	r0, r0, r8
 800600e:	42b0      	cmp	r0, r6
 8006010:	d9b6      	bls.n	8005f80 <HAL_RCC_OscConfig+0x1dc>
 8006012:	e709      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
 8006014:	40021000 	.word	0x40021000
 8006018:	42420000 	.word	0x42420000
 800601c:	42420480 	.word	0x42420480
 8006020:	20000200 	.word	0x20000200
 8006024:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8006028:	4c22      	ldr	r4, [pc, #136]	; (80060b4 <HAL_RCC_OscConfig+0x310>)
 800602a:	6863      	ldr	r3, [r4, #4]
 800602c:	f003 030c 	and.w	r3, r3, #12
 8006030:	2b08      	cmp	r3, #8
 8006032:	f43f aee2 	beq.w	8005dfa <HAL_RCC_OscConfig+0x56>
 8006036:	2300      	movs	r3, #0
 8006038:	4e1f      	ldr	r6, [pc, #124]	; (80060b8 <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800603a:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 800603c:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800603e:	d12b      	bne.n	8006098 <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 8006040:	f7ff fa42 	bl	80054c8 <HAL_GetTick>
 8006044:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8006046:	6823      	ldr	r3, [r4, #0]
 8006048:	0199      	lsls	r1, r3, #6
 800604a:	d41f      	bmi.n	800608c <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 800604c:	6a2b      	ldr	r3, [r5, #32]
 800604e:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8006052:	d105      	bne.n	8006060 <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8006054:	6862      	ldr	r2, [r4, #4]
 8006056:	68a9      	ldr	r1, [r5, #8]
 8006058:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 800605c:	430a      	orrs	r2, r1
 800605e:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8006060:	6a69      	ldr	r1, [r5, #36]	; 0x24
 8006062:	6862      	ldr	r2, [r4, #4]
 8006064:	430b      	orrs	r3, r1
 8006066:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 800606a:	4313      	orrs	r3, r2
 800606c:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 800606e:	2301      	movs	r3, #1
 8006070:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 8006072:	f7ff fa29 	bl	80054c8 <HAL_GetTick>
 8006076:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8006078:	6823      	ldr	r3, [r4, #0]
 800607a:	019a      	lsls	r2, r3, #6
 800607c:	f53f aea7 	bmi.w	8005dce <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8006080:	f7ff fa22 	bl	80054c8 <HAL_GetTick>
 8006084:	1b40      	subs	r0, r0, r5
 8006086:	2802      	cmp	r0, #2
 8006088:	d9f6      	bls.n	8006078 <HAL_RCC_OscConfig+0x2d4>
 800608a:	e6cd      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 800608c:	f7ff fa1c 	bl	80054c8 <HAL_GetTick>
 8006090:	1bc0      	subs	r0, r0, r7
 8006092:	2802      	cmp	r0, #2
 8006094:	d9d7      	bls.n	8006046 <HAL_RCC_OscConfig+0x2a2>
 8006096:	e6c7      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8006098:	f7ff fa16 	bl	80054c8 <HAL_GetTick>
 800609c:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 800609e:	6823      	ldr	r3, [r4, #0]
 80060a0:	019b      	lsls	r3, r3, #6
 80060a2:	f57f ae94 	bpl.w	8005dce <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80060a6:	f7ff fa0f 	bl	80054c8 <HAL_GetTick>
 80060aa:	1b40      	subs	r0, r0, r5
 80060ac:	2802      	cmp	r0, #2
 80060ae:	d9f6      	bls.n	800609e <HAL_RCC_OscConfig+0x2fa>
 80060b0:	e6ba      	b.n	8005e28 <HAL_RCC_OscConfig+0x84>
 80060b2:	bf00      	nop
 80060b4:	40021000 	.word	0x40021000
 80060b8:	42420060 	.word	0x42420060

080060bc <HAL_RCC_GetSysClockFreq>:
{
 80060bc:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 80060be:	4b19      	ldr	r3, [pc, #100]	; (8006124 <HAL_RCC_GetSysClockFreq+0x68>)
{
 80060c0:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 80060c2:	ac02      	add	r4, sp, #8
 80060c4:	f103 0510 	add.w	r5, r3, #16
 80060c8:	4622      	mov	r2, r4
 80060ca:	6818      	ldr	r0, [r3, #0]
 80060cc:	6859      	ldr	r1, [r3, #4]
 80060ce:	3308      	adds	r3, #8
 80060d0:	c203      	stmia	r2!, {r0, r1}
 80060d2:	42ab      	cmp	r3, r5
 80060d4:	4614      	mov	r4, r2
 80060d6:	d1f7      	bne.n	80060c8 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 80060d8:	2301      	movs	r3, #1
 80060da:	f88d 3004 	strb.w	r3, [sp, #4]
 80060de:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 80060e0:	4911      	ldr	r1, [pc, #68]	; (8006128 <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 80060e2:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 80060e6:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 80060e8:	f003 020c 	and.w	r2, r3, #12
 80060ec:	2a08      	cmp	r2, #8
 80060ee:	d117      	bne.n	8006120 <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 80060f0:	f3c3 4283 	ubfx	r2, r3, #18, #4
 80060f4:	a806      	add	r0, sp, #24
 80060f6:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 80060f8:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 80060fa:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 80060fe:	d50c      	bpl.n	800611a <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8006100:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8006102:	480a      	ldr	r0, [pc, #40]	; (800612c <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8006104:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8006108:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 800610a:	aa06      	add	r2, sp, #24
 800610c:	4413      	add	r3, r2
 800610e:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8006112:	fbb0 f0f3 	udiv	r0, r0, r3
}
 8006116:	b007      	add	sp, #28
 8006118:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 800611a:	4805      	ldr	r0, [pc, #20]	; (8006130 <HAL_RCC_GetSysClockFreq+0x74>)
 800611c:	4350      	muls	r0, r2
 800611e:	e7fa      	b.n	8006116 <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 8006120:	4802      	ldr	r0, [pc, #8]	; (800612c <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 8006122:	e7f8      	b.n	8006116 <HAL_RCC_GetSysClockFreq+0x5a>
 8006124:	0800b5b8 	.word	0x0800b5b8
 8006128:	40021000 	.word	0x40021000
 800612c:	007a1200 	.word	0x007a1200
 8006130:	003d0900 	.word	0x003d0900

08006134 <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8006134:	4a54      	ldr	r2, [pc, #336]	; (8006288 <HAL_RCC_ClockConfig+0x154>)
{
 8006136:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 800613a:	6813      	ldr	r3, [r2, #0]
{
 800613c:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 800613e:	f003 0307 	and.w	r3, r3, #7
 8006142:	428b      	cmp	r3, r1
{
 8006144:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8006146:	d32a      	bcc.n	800619e <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8006148:	6829      	ldr	r1, [r5, #0]
 800614a:	078c      	lsls	r4, r1, #30
 800614c:	d434      	bmi.n	80061b8 <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 800614e:	07ca      	lsls	r2, r1, #31
 8006150:	d447      	bmi.n	80061e2 <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 8006152:	4a4d      	ldr	r2, [pc, #308]	; (8006288 <HAL_RCC_ClockConfig+0x154>)
 8006154:	6813      	ldr	r3, [r2, #0]
 8006156:	f003 0307 	and.w	r3, r3, #7
 800615a:	429e      	cmp	r6, r3
 800615c:	f0c0 8082 	bcc.w	8006264 <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8006160:	682a      	ldr	r2, [r5, #0]
 8006162:	4c4a      	ldr	r4, [pc, #296]	; (800628c <HAL_RCC_ClockConfig+0x158>)
 8006164:	f012 0f04 	tst.w	r2, #4
 8006168:	f040 8087 	bne.w	800627a <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800616c:	0713      	lsls	r3, r2, #28
 800616e:	d506      	bpl.n	800617e <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 8006170:	6863      	ldr	r3, [r4, #4]
 8006172:	692a      	ldr	r2, [r5, #16]
 8006174:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8006178:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 800617c:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 800617e:	f7ff ff9d 	bl	80060bc <HAL_RCC_GetSysClockFreq>
 8006182:	6863      	ldr	r3, [r4, #4]
 8006184:	4a42      	ldr	r2, [pc, #264]	; (8006290 <HAL_RCC_ClockConfig+0x15c>)
 8006186:	f3c3 1303 	ubfx	r3, r3, #4, #4
 800618a:	5cd3      	ldrb	r3, [r2, r3]
 800618c:	40d8      	lsrs	r0, r3
 800618e:	4b41      	ldr	r3, [pc, #260]	; (8006294 <HAL_RCC_ClockConfig+0x160>)
 8006190:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 8006192:	2000      	movs	r0, #0
 8006194:	f7ff f956 	bl	8005444 <HAL_InitTick>
  return HAL_OK;
 8006198:	2000      	movs	r0, #0
}
 800619a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 800619e:	6813      	ldr	r3, [r2, #0]
 80061a0:	f023 0307 	bic.w	r3, r3, #7
 80061a4:	430b      	orrs	r3, r1
 80061a6:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 80061a8:	6813      	ldr	r3, [r2, #0]
 80061aa:	f003 0307 	and.w	r3, r3, #7
 80061ae:	4299      	cmp	r1, r3
 80061b0:	d0ca      	beq.n	8006148 <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 80061b2:	2001      	movs	r0, #1
 80061b4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80061b8:	4b34      	ldr	r3, [pc, #208]	; (800628c <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 80061ba:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 80061be:	bf1e      	ittt	ne
 80061c0:	685a      	ldrne	r2, [r3, #4]
 80061c2:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 80061c6:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 80061c8:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 80061ca:	bf42      	ittt	mi
 80061cc:	685a      	ldrmi	r2, [r3, #4]
 80061ce:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 80061d2:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 80061d4:	685a      	ldr	r2, [r3, #4]
 80061d6:	68a8      	ldr	r0, [r5, #8]
 80061d8:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 80061dc:	4302      	orrs	r2, r0
 80061de:	605a      	str	r2, [r3, #4]
 80061e0:	e7b5      	b.n	800614e <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 80061e2:	686a      	ldr	r2, [r5, #4]
 80061e4:	4c29      	ldr	r4, [pc, #164]	; (800628c <HAL_RCC_ClockConfig+0x158>)
 80061e6:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80061e8:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 80061ea:	d11c      	bne.n	8006226 <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80061ec:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80061f0:	d0df      	beq.n	80061b2 <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 80061f2:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 80061f4:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 80061f8:	f023 0303 	bic.w	r3, r3, #3
 80061fc:	4313      	orrs	r3, r2
 80061fe:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8006200:	f7ff f962 	bl	80054c8 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8006204:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 8006206:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8006208:	2b01      	cmp	r3, #1
 800620a:	d114      	bne.n	8006236 <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 800620c:	6863      	ldr	r3, [r4, #4]
 800620e:	f003 030c 	and.w	r3, r3, #12
 8006212:	2b04      	cmp	r3, #4
 8006214:	d09d      	beq.n	8006152 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006216:	f7ff f957 	bl	80054c8 <HAL_GetTick>
 800621a:	1bc0      	subs	r0, r0, r7
 800621c:	4540      	cmp	r0, r8
 800621e:	d9f5      	bls.n	800620c <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 8006220:	2003      	movs	r0, #3
 8006222:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8006226:	2a02      	cmp	r2, #2
 8006228:	d102      	bne.n	8006230 <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 800622a:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 800622e:	e7df      	b.n	80061f0 <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8006230:	f013 0f02 	tst.w	r3, #2
 8006234:	e7dc      	b.n	80061f0 <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8006236:	2b02      	cmp	r3, #2
 8006238:	d10f      	bne.n	800625a <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 800623a:	6863      	ldr	r3, [r4, #4]
 800623c:	f003 030c 	and.w	r3, r3, #12
 8006240:	2b08      	cmp	r3, #8
 8006242:	d086      	beq.n	8006152 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006244:	f7ff f940 	bl	80054c8 <HAL_GetTick>
 8006248:	1bc0      	subs	r0, r0, r7
 800624a:	4540      	cmp	r0, r8
 800624c:	d9f5      	bls.n	800623a <HAL_RCC_ClockConfig+0x106>
 800624e:	e7e7      	b.n	8006220 <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006250:	f7ff f93a 	bl	80054c8 <HAL_GetTick>
 8006254:	1bc0      	subs	r0, r0, r7
 8006256:	4540      	cmp	r0, r8
 8006258:	d8e2      	bhi.n	8006220 <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 800625a:	6863      	ldr	r3, [r4, #4]
 800625c:	f013 0f0c 	tst.w	r3, #12
 8006260:	d1f6      	bne.n	8006250 <HAL_RCC_ClockConfig+0x11c>
 8006262:	e776      	b.n	8006152 <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 8006264:	6813      	ldr	r3, [r2, #0]
 8006266:	f023 0307 	bic.w	r3, r3, #7
 800626a:	4333      	orrs	r3, r6
 800626c:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 800626e:	6813      	ldr	r3, [r2, #0]
 8006270:	f003 0307 	and.w	r3, r3, #7
 8006274:	429e      	cmp	r6, r3
 8006276:	d19c      	bne.n	80061b2 <HAL_RCC_ClockConfig+0x7e>
 8006278:	e772      	b.n	8006160 <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 800627a:	6863      	ldr	r3, [r4, #4]
 800627c:	68e9      	ldr	r1, [r5, #12]
 800627e:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8006282:	430b      	orrs	r3, r1
 8006284:	6063      	str	r3, [r4, #4]
 8006286:	e771      	b.n	800616c <HAL_RCC_ClockConfig+0x38>
 8006288:	40022000 	.word	0x40022000
 800628c:	40021000 	.word	0x40021000
 8006290:	0800b9ad 	.word	0x0800b9ad
 8006294:	20000200 	.word	0x20000200

08006298 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8006298:	4b04      	ldr	r3, [pc, #16]	; (80062ac <HAL_RCC_GetPCLK1Freq+0x14>)
 800629a:	4a05      	ldr	r2, [pc, #20]	; (80062b0 <HAL_RCC_GetPCLK1Freq+0x18>)
 800629c:	685b      	ldr	r3, [r3, #4]
 800629e:	f3c3 2302 	ubfx	r3, r3, #8, #3
 80062a2:	5cd3      	ldrb	r3, [r2, r3]
 80062a4:	4a03      	ldr	r2, [pc, #12]	; (80062b4 <HAL_RCC_GetPCLK1Freq+0x1c>)
 80062a6:	6810      	ldr	r0, [r2, #0]
}    
 80062a8:	40d8      	lsrs	r0, r3
 80062aa:	4770      	bx	lr
 80062ac:	40021000 	.word	0x40021000
 80062b0:	0800b9bd 	.word	0x0800b9bd
 80062b4:	20000200 	.word	0x20000200

080062b8 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 80062b8:	4b04      	ldr	r3, [pc, #16]	; (80062cc <HAL_RCC_GetPCLK2Freq+0x14>)
 80062ba:	4a05      	ldr	r2, [pc, #20]	; (80062d0 <HAL_RCC_GetPCLK2Freq+0x18>)
 80062bc:	685b      	ldr	r3, [r3, #4]
 80062be:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 80062c2:	5cd3      	ldrb	r3, [r2, r3]
 80062c4:	4a03      	ldr	r2, [pc, #12]	; (80062d4 <HAL_RCC_GetPCLK2Freq+0x1c>)
 80062c6:	6810      	ldr	r0, [r2, #0]
} 
 80062c8:	40d8      	lsrs	r0, r3
 80062ca:	4770      	bx	lr
 80062cc:	40021000 	.word	0x40021000
 80062d0:	0800b9bd 	.word	0x0800b9bd
 80062d4:	20000200 	.word	0x20000200

080062d8 <HAL_RCCEx_PeriphCLKConfig>:

  /* Check the parameters */
  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
  
  /*------------------------------- RTC/LCD Configuration ------------------------*/ 
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 80062d8:	6803      	ldr	r3, [r0, #0]
{
 80062da:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 80062de:	07d9      	lsls	r1, r3, #31
{
 80062e0:	4605      	mov	r5, r0
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 80062e2:	d520      	bpl.n	8006326 <HAL_RCCEx_PeriphCLKConfig+0x4e>
    FlagStatus       pwrclkchanged = RESET;

    /* As soon as function is called to change RTC clock source, activation of the 
       power domain is done. */
    /* Requires to enable write access to Backup Domain of necessary */
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 80062e4:	4c35      	ldr	r4, [pc, #212]	; (80063bc <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 80062e6:	69e3      	ldr	r3, [r4, #28]
 80062e8:	00da      	lsls	r2, r3, #3
 80062ea:	d432      	bmi.n	8006352 <HAL_RCCEx_PeriphCLKConfig+0x7a>
    {
    __HAL_RCC_PWR_CLK_ENABLE();
      pwrclkchanged = SET;
 80062ec:	2701      	movs	r7, #1
    __HAL_RCC_PWR_CLK_ENABLE();
 80062ee:	69e3      	ldr	r3, [r4, #28]
 80062f0:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 80062f4:	61e3      	str	r3, [r4, #28]
 80062f6:	69e3      	ldr	r3, [r4, #28]
 80062f8:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80062fc:	9301      	str	r3, [sp, #4]
 80062fe:	9b01      	ldr	r3, [sp, #4]
    }
    
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8006300:	4e2f      	ldr	r6, [pc, #188]	; (80063c0 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 8006302:	6833      	ldr	r3, [r6, #0]
 8006304:	05db      	lsls	r3, r3, #23
 8006306:	d526      	bpl.n	8006356 <HAL_RCCEx_PeriphCLKConfig+0x7e>
        }
      }
    }
      
    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ 
    temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
 8006308:	6a23      	ldr	r3, [r4, #32]
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 800630a:	f413 7340 	ands.w	r3, r3, #768	; 0x300
 800630e:	d136      	bne.n	800637e <HAL_RCCEx_PeriphCLKConfig+0xa6>
            return HAL_TIMEOUT;
          }      
        }  
      }
    }
    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
 8006310:	6a23      	ldr	r3, [r4, #32]
 8006312:	686a      	ldr	r2, [r5, #4]
 8006314:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8006318:	4313      	orrs	r3, r2
 800631a:	6223      	str	r3, [r4, #32]

    /* Require to disable power clock if necessary */
    if(pwrclkchanged == SET)
 800631c:	b11f      	cbz	r7, 8006326 <HAL_RCCEx_PeriphCLKConfig+0x4e>
    {
      __HAL_RCC_PWR_CLK_DISABLE();
 800631e:	69e3      	ldr	r3, [r4, #28]
 8006320:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8006324:	61e3      	str	r3, [r4, #28]
    }
  }

  /*------------------------------ ADC clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 8006326:	6828      	ldr	r0, [r5, #0]
 8006328:	0783      	lsls	r3, r0, #30
 800632a:	d506      	bpl.n	800633a <HAL_RCCEx_PeriphCLKConfig+0x62>
  {
    /* Check the parameters */
    assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
    
    /* Configure the ADC clock source */
    __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 800632c:	4a23      	ldr	r2, [pc, #140]	; (80063bc <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 800632e:	68a9      	ldr	r1, [r5, #8]
 8006330:	6853      	ldr	r3, [r2, #4]
 8006332:	f423 4340 	bic.w	r3, r3, #49152	; 0xc000
 8006336:	430b      	orrs	r3, r1
 8006338:	6053      	str	r3, [r2, #4]

#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
 || defined(STM32F105xC) || defined(STM32F107xC)
  /*------------------------------ USB clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800633a:	f010 0010 	ands.w	r0, r0, #16
 800633e:	d01b      	beq.n	8006378 <HAL_RCCEx_PeriphCLKConfig+0xa0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
    
    /* Configure the USB clock source */
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8006340:	4a1e      	ldr	r2, [pc, #120]	; (80063bc <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8006342:	6969      	ldr	r1, [r5, #20]
 8006344:	6853      	ldr	r3, [r2, #4]
  }
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */

  return HAL_OK;
 8006346:	2000      	movs	r0, #0
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8006348:	f423 0380 	bic.w	r3, r3, #4194304	; 0x400000
 800634c:	430b      	orrs	r3, r1
 800634e:	6053      	str	r3, [r2, #4]
 8006350:	e012      	b.n	8006378 <HAL_RCCEx_PeriphCLKConfig+0xa0>
    FlagStatus       pwrclkchanged = RESET;
 8006352:	2700      	movs	r7, #0
 8006354:	e7d4      	b.n	8006300 <HAL_RCCEx_PeriphCLKConfig+0x28>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8006356:	6833      	ldr	r3, [r6, #0]
 8006358:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 800635c:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 800635e:	f7ff f8b3 	bl	80054c8 <HAL_GetTick>
 8006362:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8006364:	6833      	ldr	r3, [r6, #0]
 8006366:	05d8      	lsls	r0, r3, #23
 8006368:	d4ce      	bmi.n	8006308 <HAL_RCCEx_PeriphCLKConfig+0x30>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800636a:	f7ff f8ad 	bl	80054c8 <HAL_GetTick>
 800636e:	eba0 0008 	sub.w	r0, r0, r8
 8006372:	2864      	cmp	r0, #100	; 0x64
 8006374:	d9f6      	bls.n	8006364 <HAL_RCCEx_PeriphCLKConfig+0x8c>
          return HAL_TIMEOUT;
 8006376:	2003      	movs	r0, #3
}
 8006378:	b002      	add	sp, #8
 800637a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 800637e:	686a      	ldr	r2, [r5, #4]
 8006380:	f402 7240 	and.w	r2, r2, #768	; 0x300
 8006384:	4293      	cmp	r3, r2
 8006386:	d0c3      	beq.n	8006310 <HAL_RCCEx_PeriphCLKConfig+0x38>
      __HAL_RCC_BACKUPRESET_FORCE();
 8006388:	2001      	movs	r0, #1
 800638a:	4a0e      	ldr	r2, [pc, #56]	; (80063c4 <HAL_RCCEx_PeriphCLKConfig+0xec>)
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 800638c:	6a23      	ldr	r3, [r4, #32]
      __HAL_RCC_BACKUPRESET_FORCE();
 800638e:	6010      	str	r0, [r2, #0]
      __HAL_RCC_BACKUPRESET_RELEASE();
 8006390:	2000      	movs	r0, #0
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 8006392:	f423 7140 	bic.w	r1, r3, #768	; 0x300
      __HAL_RCC_BACKUPRESET_RELEASE();
 8006396:	6010      	str	r0, [r2, #0]
      RCC->BDCR = temp_reg;
 8006398:	6221      	str	r1, [r4, #32]
      if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
 800639a:	07d9      	lsls	r1, r3, #31
 800639c:	d5b8      	bpl.n	8006310 <HAL_RCCEx_PeriphCLKConfig+0x38>
        tickstart = HAL_GetTick();
 800639e:	f7ff f893 	bl	80054c8 <HAL_GetTick>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80063a2:	f241 3888 	movw	r8, #5000	; 0x1388
        tickstart = HAL_GetTick();
 80063a6:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80063a8:	6a23      	ldr	r3, [r4, #32]
 80063aa:	079a      	lsls	r2, r3, #30
 80063ac:	d4b0      	bmi.n	8006310 <HAL_RCCEx_PeriphCLKConfig+0x38>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80063ae:	f7ff f88b 	bl	80054c8 <HAL_GetTick>
 80063b2:	1b80      	subs	r0, r0, r6
 80063b4:	4540      	cmp	r0, r8
 80063b6:	d9f7      	bls.n	80063a8 <HAL_RCCEx_PeriphCLKConfig+0xd0>
 80063b8:	e7dd      	b.n	8006376 <HAL_RCCEx_PeriphCLKConfig+0x9e>
 80063ba:	bf00      	nop
 80063bc:	40021000 	.word	0x40021000
 80063c0:	40007000 	.word	0x40007000
 80063c4:	42420440 	.word	0x42420440

080063c8 <HAL_TIM_OC_DelayElapsedCallback>:
 80063c8:	4770      	bx	lr

080063ca <HAL_TIM_IC_CaptureCallback>:
 80063ca:	4770      	bx	lr

080063cc <HAL_TIM_PWM_PulseFinishedCallback>:
 80063cc:	4770      	bx	lr

080063ce <HAL_TIM_TriggerCallback>:
 80063ce:	4770      	bx	lr

080063d0 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 80063d0:	6803      	ldr	r3, [r0, #0]
{
 80063d2:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 80063d4:	691a      	ldr	r2, [r3, #16]
{
 80063d6:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 80063d8:	0791      	lsls	r1, r2, #30
 80063da:	d50e      	bpl.n	80063fa <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 80063dc:	68da      	ldr	r2, [r3, #12]
 80063de:	0792      	lsls	r2, r2, #30
 80063e0:	d50b      	bpl.n	80063fa <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 80063e2:	f06f 0202 	mvn.w	r2, #2
 80063e6:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 80063e8:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 80063ea:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 80063ec:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 80063ee:	079b      	lsls	r3, r3, #30
 80063f0:	d077      	beq.n	80064e2 <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 80063f2:	f7ff ffea 	bl	80063ca <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 80063f6:	2300      	movs	r3, #0
 80063f8:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 80063fa:	6823      	ldr	r3, [r4, #0]
 80063fc:	691a      	ldr	r2, [r3, #16]
 80063fe:	0750      	lsls	r0, r2, #29
 8006400:	d510      	bpl.n	8006424 <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 8006402:	68da      	ldr	r2, [r3, #12]
 8006404:	0751      	lsls	r1, r2, #29
 8006406:	d50d      	bpl.n	8006424 <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8006408:	f06f 0204 	mvn.w	r2, #4
 800640c:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800640e:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8006410:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8006412:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8006414:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8006418:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800641a:	d068      	beq.n	80064ee <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 800641c:	f7ff ffd5 	bl	80063ca <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006420:	2300      	movs	r3, #0
 8006422:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8006424:	6823      	ldr	r3, [r4, #0]
 8006426:	691a      	ldr	r2, [r3, #16]
 8006428:	0712      	lsls	r2, r2, #28
 800642a:	d50f      	bpl.n	800644c <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 800642c:	68da      	ldr	r2, [r3, #12]
 800642e:	0710      	lsls	r0, r2, #28
 8006430:	d50c      	bpl.n	800644c <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8006432:	f06f 0208 	mvn.w	r2, #8
 8006436:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8006438:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800643a:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 800643c:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800643e:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8006440:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8006442:	d05a      	beq.n	80064fa <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8006444:	f7ff ffc1 	bl	80063ca <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006448:	2300      	movs	r3, #0
 800644a:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 800644c:	6823      	ldr	r3, [r4, #0]
 800644e:	691a      	ldr	r2, [r3, #16]
 8006450:	06d2      	lsls	r2, r2, #27
 8006452:	d510      	bpl.n	8006476 <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8006454:	68da      	ldr	r2, [r3, #12]
 8006456:	06d0      	lsls	r0, r2, #27
 8006458:	d50d      	bpl.n	8006476 <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 800645a:	f06f 0210 	mvn.w	r2, #16
 800645e:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8006460:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8006462:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8006464:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8006466:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 800646a:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800646c:	d04b      	beq.n	8006506 <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 800646e:	f7ff ffac 	bl	80063ca <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006472:	2300      	movs	r3, #0
 8006474:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8006476:	6823      	ldr	r3, [r4, #0]
 8006478:	691a      	ldr	r2, [r3, #16]
 800647a:	07d1      	lsls	r1, r2, #31
 800647c:	d508      	bpl.n	8006490 <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 800647e:	68da      	ldr	r2, [r3, #12]
 8006480:	07d2      	lsls	r2, r2, #31
 8006482:	d505      	bpl.n	8006490 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8006484:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 8006488:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 800648a:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 800648c:	f001 f922 	bl	80076d4 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 8006490:	6823      	ldr	r3, [r4, #0]
 8006492:	691a      	ldr	r2, [r3, #16]
 8006494:	0610      	lsls	r0, r2, #24
 8006496:	d508      	bpl.n	80064aa <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 8006498:	68da      	ldr	r2, [r3, #12]
 800649a:	0611      	lsls	r1, r2, #24
 800649c:	d505      	bpl.n	80064aa <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 800649e:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 80064a2:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 80064a4:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 80064a6:	f000 f8be 	bl	8006626 <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 80064aa:	6823      	ldr	r3, [r4, #0]
 80064ac:	691a      	ldr	r2, [r3, #16]
 80064ae:	0652      	lsls	r2, r2, #25
 80064b0:	d508      	bpl.n	80064c4 <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 80064b2:	68da      	ldr	r2, [r3, #12]
 80064b4:	0650      	lsls	r0, r2, #25
 80064b6:	d505      	bpl.n	80064c4 <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 80064b8:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 80064bc:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 80064be:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 80064c0:	f7ff ff85 	bl	80063ce <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 80064c4:	6823      	ldr	r3, [r4, #0]
 80064c6:	691a      	ldr	r2, [r3, #16]
 80064c8:	0691      	lsls	r1, r2, #26
 80064ca:	d522      	bpl.n	8006512 <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 80064cc:	68da      	ldr	r2, [r3, #12]
 80064ce:	0692      	lsls	r2, r2, #26
 80064d0:	d51f      	bpl.n	8006512 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 80064d2:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 80064d6:	4620      	mov	r0, r4
    }
  }
}
 80064d8:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 80064dc:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 80064de:	f000 b8a1 	b.w	8006624 <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 80064e2:	f7ff ff71 	bl	80063c8 <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 80064e6:	4620      	mov	r0, r4
 80064e8:	f7ff ff70 	bl	80063cc <HAL_TIM_PWM_PulseFinishedCallback>
 80064ec:	e783      	b.n	80063f6 <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 80064ee:	f7ff ff6b 	bl	80063c8 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 80064f2:	4620      	mov	r0, r4
 80064f4:	f7ff ff6a 	bl	80063cc <HAL_TIM_PWM_PulseFinishedCallback>
 80064f8:	e792      	b.n	8006420 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 80064fa:	f7ff ff65 	bl	80063c8 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 80064fe:	4620      	mov	r0, r4
 8006500:	f7ff ff64 	bl	80063cc <HAL_TIM_PWM_PulseFinishedCallback>
 8006504:	e7a0      	b.n	8006448 <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8006506:	f7ff ff5f 	bl	80063c8 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800650a:	4620      	mov	r0, r4
 800650c:	f7ff ff5e 	bl	80063cc <HAL_TIM_PWM_PulseFinishedCallback>
 8006510:	e7af      	b.n	8006472 <HAL_TIM_IRQHandler+0xa2>
 8006512:	bd10      	pop	{r4, pc}

08006514 <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8006514:	4a24      	ldr	r2, [pc, #144]	; (80065a8 <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 8006516:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8006518:	4290      	cmp	r0, r2
 800651a:	d012      	beq.n	8006542 <TIM_Base_SetConfig+0x2e>
 800651c:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8006520:	4290      	cmp	r0, r2
 8006522:	d00e      	beq.n	8006542 <TIM_Base_SetConfig+0x2e>
 8006524:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8006528:	d00b      	beq.n	8006542 <TIM_Base_SetConfig+0x2e>
 800652a:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 800652e:	4290      	cmp	r0, r2
 8006530:	d007      	beq.n	8006542 <TIM_Base_SetConfig+0x2e>
 8006532:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8006536:	4290      	cmp	r0, r2
 8006538:	d003      	beq.n	8006542 <TIM_Base_SetConfig+0x2e>
 800653a:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 800653e:	4290      	cmp	r0, r2
 8006540:	d11d      	bne.n	800657e <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8006542:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8006544:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8006548:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 800654a:	4a17      	ldr	r2, [pc, #92]	; (80065a8 <TIM_Base_SetConfig+0x94>)
 800654c:	4290      	cmp	r0, r2
 800654e:	d012      	beq.n	8006576 <TIM_Base_SetConfig+0x62>
 8006550:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8006554:	4290      	cmp	r0, r2
 8006556:	d00e      	beq.n	8006576 <TIM_Base_SetConfig+0x62>
 8006558:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 800655c:	d00b      	beq.n	8006576 <TIM_Base_SetConfig+0x62>
 800655e:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8006562:	4290      	cmp	r0, r2
 8006564:	d007      	beq.n	8006576 <TIM_Base_SetConfig+0x62>
 8006566:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 800656a:	4290      	cmp	r0, r2
 800656c:	d003      	beq.n	8006576 <TIM_Base_SetConfig+0x62>
 800656e:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8006572:	4290      	cmp	r0, r2
 8006574:	d103      	bne.n	800657e <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8006576:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8006578:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 800657c:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 800657e:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 8006580:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8006584:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8006586:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8006588:	688b      	ldr	r3, [r1, #8]
 800658a:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 800658c:	680b      	ldr	r3, [r1, #0]
 800658e:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8006590:	4b05      	ldr	r3, [pc, #20]	; (80065a8 <TIM_Base_SetConfig+0x94>)
 8006592:	4298      	cmp	r0, r3
 8006594:	d003      	beq.n	800659e <TIM_Base_SetConfig+0x8a>
 8006596:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 800659a:	4298      	cmp	r0, r3
 800659c:	d101      	bne.n	80065a2 <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 800659e:	690b      	ldr	r3, [r1, #16]
 80065a0:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 80065a2:	2301      	movs	r3, #1
 80065a4:	6143      	str	r3, [r0, #20]
 80065a6:	4770      	bx	lr
 80065a8:	40012c00 	.word	0x40012c00

080065ac <HAL_TIM_Base_Init>:
{
 80065ac:	b510      	push	{r4, lr}
  if(htim == NULL)
 80065ae:	4604      	mov	r4, r0
 80065b0:	b1a0      	cbz	r0, 80065dc <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 80065b2:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 80065b6:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 80065ba:	b91b      	cbnz	r3, 80065c4 <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 80065bc:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 80065c0:	f001 fe22 	bl	8008208 <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 80065c4:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 80065c6:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 80065c8:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 80065cc:	1d21      	adds	r1, r4, #4
 80065ce:	f7ff ffa1 	bl	8006514 <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 80065d2:	2301      	movs	r3, #1
  return HAL_OK;
 80065d4:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 80065d6:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 80065da:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 80065dc:	2001      	movs	r0, #1
}
 80065de:	bd10      	pop	{r4, pc}

080065e0 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 80065e0:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 80065e4:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 80065e6:	2b01      	cmp	r3, #1
 80065e8:	f04f 0302 	mov.w	r3, #2
 80065ec:	d018      	beq.n	8006620 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 80065ee:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 80065f2:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 80065f4:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 80065f6:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 80065f8:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 80065fa:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 80065fe:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8006600:	685a      	ldr	r2, [r3, #4]
 8006602:	4322      	orrs	r2, r4
 8006604:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 8006606:	689a      	ldr	r2, [r3, #8]
 8006608:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 800660c:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 800660e:	689a      	ldr	r2, [r3, #8]
 8006610:	430a      	orrs	r2, r1
 8006612:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 8006614:	2301      	movs	r3, #1
 8006616:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 800661a:	2300      	movs	r3, #0
 800661c:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8006620:	4618      	mov	r0, r3

  return HAL_OK;
}
 8006622:	bd10      	pop	{r4, pc}

08006624 <HAL_TIMEx_CommutationCallback>:
 8006624:	4770      	bx	lr

08006626 <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 8006626:	4770      	bx	lr

08006628 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8006628:	6803      	ldr	r3, [r0, #0]
 800662a:	68da      	ldr	r2, [r3, #12]
 800662c:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8006630:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006632:	695a      	ldr	r2, [r3, #20]
 8006634:	f022 0201 	bic.w	r2, r2, #1
 8006638:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 800663a:	2320      	movs	r3, #32
 800663c:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8006640:	4770      	bx	lr
	...

08006644 <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 8006644:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8006648:	6805      	ldr	r5, [r0, #0]
 800664a:	68c2      	ldr	r2, [r0, #12]
 800664c:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 800664e:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8006650:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8006654:	4313      	orrs	r3, r2
 8006656:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006658:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 800665a:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 800665c:	430b      	orrs	r3, r1
 800665e:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8006660:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 8006664:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006668:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 800666a:	4313      	orrs	r3, r2
 800666c:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 800666e:	696b      	ldr	r3, [r5, #20]
 8006670:	6982      	ldr	r2, [r0, #24]
 8006672:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8006676:	4313      	orrs	r3, r2
 8006678:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 800667a:	4b40      	ldr	r3, [pc, #256]	; (800677c <UART_SetConfig+0x138>)
{
 800667c:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 800667e:	429d      	cmp	r5, r3
 8006680:	f04f 0419 	mov.w	r4, #25
 8006684:	d146      	bne.n	8006714 <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 8006686:	f7ff fe17 	bl	80062b8 <HAL_RCC_GetPCLK2Freq>
 800668a:	fb04 f300 	mul.w	r3, r4, r0
 800668e:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8006692:	f04f 0864 	mov.w	r8, #100	; 0x64
 8006696:	00b6      	lsls	r6, r6, #2
 8006698:	fbb3 f3f6 	udiv	r3, r3, r6
 800669c:	fbb3 f3f8 	udiv	r3, r3, r8
 80066a0:	011e      	lsls	r6, r3, #4
 80066a2:	f7ff fe09 	bl	80062b8 <HAL_RCC_GetPCLK2Freq>
 80066a6:	4360      	muls	r0, r4
 80066a8:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80066ac:	009b      	lsls	r3, r3, #2
 80066ae:	fbb0 f7f3 	udiv	r7, r0, r3
 80066b2:	f7ff fe01 	bl	80062b8 <HAL_RCC_GetPCLK2Freq>
 80066b6:	4360      	muls	r0, r4
 80066b8:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80066bc:	009b      	lsls	r3, r3, #2
 80066be:	fbb0 f3f3 	udiv	r3, r0, r3
 80066c2:	fbb3 f3f8 	udiv	r3, r3, r8
 80066c6:	fb08 7313 	mls	r3, r8, r3, r7
 80066ca:	011b      	lsls	r3, r3, #4
 80066cc:	3332      	adds	r3, #50	; 0x32
 80066ce:	fbb3 f3f8 	udiv	r3, r3, r8
 80066d2:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 80066d6:	f7ff fdef 	bl	80062b8 <HAL_RCC_GetPCLK2Freq>
 80066da:	4360      	muls	r0, r4
 80066dc:	f8d9 2004 	ldr.w	r2, [r9, #4]
 80066e0:	0092      	lsls	r2, r2, #2
 80066e2:	fbb0 faf2 	udiv	sl, r0, r2
 80066e6:	f7ff fde7 	bl	80062b8 <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 80066ea:	4360      	muls	r0, r4
 80066ec:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80066f0:	009b      	lsls	r3, r3, #2
 80066f2:	fbb0 f3f3 	udiv	r3, r0, r3
 80066f6:	fbb3 f3f8 	udiv	r3, r3, r8
 80066fa:	fb08 a313 	mls	r3, r8, r3, sl
 80066fe:	011b      	lsls	r3, r3, #4
 8006700:	3332      	adds	r3, #50	; 0x32
 8006702:	fbb3 f3f8 	udiv	r3, r3, r8
 8006706:	f003 030f 	and.w	r3, r3, #15
 800670a:	433b      	orrs	r3, r7
 800670c:	4433      	add	r3, r6
 800670e:	60ab      	str	r3, [r5, #8]
 8006710:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8006714:	f7ff fdc0 	bl	8006298 <HAL_RCC_GetPCLK1Freq>
 8006718:	fb04 f300 	mul.w	r3, r4, r0
 800671c:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8006720:	f04f 0864 	mov.w	r8, #100	; 0x64
 8006724:	00b6      	lsls	r6, r6, #2
 8006726:	fbb3 f3f6 	udiv	r3, r3, r6
 800672a:	fbb3 f3f8 	udiv	r3, r3, r8
 800672e:	011e      	lsls	r6, r3, #4
 8006730:	f7ff fdb2 	bl	8006298 <HAL_RCC_GetPCLK1Freq>
 8006734:	4360      	muls	r0, r4
 8006736:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800673a:	009b      	lsls	r3, r3, #2
 800673c:	fbb0 f7f3 	udiv	r7, r0, r3
 8006740:	f7ff fdaa 	bl	8006298 <HAL_RCC_GetPCLK1Freq>
 8006744:	4360      	muls	r0, r4
 8006746:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800674a:	009b      	lsls	r3, r3, #2
 800674c:	fbb0 f3f3 	udiv	r3, r0, r3
 8006750:	fbb3 f3f8 	udiv	r3, r3, r8
 8006754:	fb08 7313 	mls	r3, r8, r3, r7
 8006758:	011b      	lsls	r3, r3, #4
 800675a:	3332      	adds	r3, #50	; 0x32
 800675c:	fbb3 f3f8 	udiv	r3, r3, r8
 8006760:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8006764:	f7ff fd98 	bl	8006298 <HAL_RCC_GetPCLK1Freq>
 8006768:	4360      	muls	r0, r4
 800676a:	f8d9 2004 	ldr.w	r2, [r9, #4]
 800676e:	0092      	lsls	r2, r2, #2
 8006770:	fbb0 faf2 	udiv	sl, r0, r2
 8006774:	f7ff fd90 	bl	8006298 <HAL_RCC_GetPCLK1Freq>
 8006778:	e7b7      	b.n	80066ea <UART_SetConfig+0xa6>
 800677a:	bf00      	nop
 800677c:	40013800 	.word	0x40013800

08006780 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 8006780:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8006782:	4604      	mov	r4, r0
 8006784:	460e      	mov	r6, r1
 8006786:	4617      	mov	r7, r2
 8006788:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 800678a:	6821      	ldr	r1, [r4, #0]
 800678c:	680b      	ldr	r3, [r1, #0]
 800678e:	ea36 0303 	bics.w	r3, r6, r3
 8006792:	d101      	bne.n	8006798 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 8006794:	2000      	movs	r0, #0
}
 8006796:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 8006798:	1c6b      	adds	r3, r5, #1
 800679a:	d0f7      	beq.n	800678c <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 800679c:	b995      	cbnz	r5, 80067c4 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 800679e:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 80067a0:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 80067a2:	68da      	ldr	r2, [r3, #12]
 80067a4:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 80067a8:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 80067aa:	695a      	ldr	r2, [r3, #20]
 80067ac:	f022 0201 	bic.w	r2, r2, #1
 80067b0:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 80067b2:	2320      	movs	r3, #32
 80067b4:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 80067b8:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 80067bc:	2300      	movs	r3, #0
 80067be:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 80067c2:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 80067c4:	f7fe fe80 	bl	80054c8 <HAL_GetTick>
 80067c8:	1bc0      	subs	r0, r0, r7
 80067ca:	4285      	cmp	r5, r0
 80067cc:	d2dd      	bcs.n	800678a <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 80067ce:	e7e6      	b.n	800679e <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

080067d0 <HAL_UART_Init>:
{
 80067d0:	b510      	push	{r4, lr}
  if(huart == NULL)
 80067d2:	4604      	mov	r4, r0
 80067d4:	b340      	cbz	r0, 8006828 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 80067d6:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 80067da:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 80067de:	b91b      	cbnz	r3, 80067e8 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 80067e0:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 80067e4:	f001 fd24 	bl	8008230 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 80067e8:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 80067ea:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 80067ec:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 80067f0:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 80067f2:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 80067f4:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 80067f8:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 80067fa:	f7ff ff23 	bl	8006644 <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 80067fe:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006800:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8006802:	691a      	ldr	r2, [r3, #16]
 8006804:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8006808:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800680a:	695a      	ldr	r2, [r3, #20]
 800680c:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8006810:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8006812:	68da      	ldr	r2, [r3, #12]
 8006814:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8006818:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 800681a:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800681c:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 800681e:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 8006822:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 8006826:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8006828:	2001      	movs	r0, #1
}
 800682a:	bd10      	pop	{r4, pc}

0800682c <HAL_UART_Transmit>:
{
 800682c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8006830:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 8006832:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 8006836:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 8006838:	2b20      	cmp	r3, #32
{
 800683a:	460d      	mov	r5, r1
 800683c:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 800683e:	d14e      	bne.n	80068de <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 8006840:	2900      	cmp	r1, #0
 8006842:	d049      	beq.n	80068d8 <HAL_UART_Transmit+0xac>
 8006844:	2a00      	cmp	r2, #0
 8006846:	d047      	beq.n	80068d8 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 8006848:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 800684c:	2b01      	cmp	r3, #1
 800684e:	d046      	beq.n	80068de <HAL_UART_Transmit+0xb2>
 8006850:	2301      	movs	r3, #1
 8006852:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006856:	2300      	movs	r3, #0
 8006858:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800685a:	2321      	movs	r3, #33	; 0x21
 800685c:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 8006860:	f7fe fe32 	bl	80054c8 <HAL_GetTick>
 8006864:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 8006866:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 800686a:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 800686e:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 8006870:	b29b      	uxth	r3, r3
 8006872:	b96b      	cbnz	r3, 8006890 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8006874:	463b      	mov	r3, r7
 8006876:	4632      	mov	r2, r6
 8006878:	2140      	movs	r1, #64	; 0x40
 800687a:	4620      	mov	r0, r4
 800687c:	f7ff ff80 	bl	8006780 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8006880:	b9a8      	cbnz	r0, 80068ae <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 8006882:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 8006884:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 8006888:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 800688c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 8006890:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006892:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8006894:	3b01      	subs	r3, #1
 8006896:	b29b      	uxth	r3, r3
 8006898:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800689a:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800689c:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800689e:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80068a2:	4620      	mov	r0, r4
 80068a4:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80068a6:	d10e      	bne.n	80068c6 <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80068a8:	f7ff ff6a 	bl	8006780 <UART_WaitOnFlagUntilTimeout.constprop.3>
 80068ac:	b110      	cbz	r0, 80068b4 <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 80068ae:	2003      	movs	r0, #3
 80068b0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 80068b4:	882b      	ldrh	r3, [r5, #0]
 80068b6:	6822      	ldr	r2, [r4, #0]
 80068b8:	f3c3 0308 	ubfx	r3, r3, #0, #9
 80068bc:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 80068be:	6923      	ldr	r3, [r4, #16]
 80068c0:	b943      	cbnz	r3, 80068d4 <HAL_UART_Transmit+0xa8>
          pData +=2U;
 80068c2:	3502      	adds	r5, #2
 80068c4:	e7d3      	b.n	800686e <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 80068c6:	f7ff ff5b 	bl	8006780 <UART_WaitOnFlagUntilTimeout.constprop.3>
 80068ca:	2800      	cmp	r0, #0
 80068cc:	d1ef      	bne.n	80068ae <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 80068ce:	6823      	ldr	r3, [r4, #0]
 80068d0:	782a      	ldrb	r2, [r5, #0]
 80068d2:	605a      	str	r2, [r3, #4]
 80068d4:	3501      	adds	r5, #1
 80068d6:	e7ca      	b.n	800686e <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 80068d8:	2001      	movs	r0, #1
 80068da:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 80068de:	2002      	movs	r0, #2
}
 80068e0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

080068e4 <HAL_UART_Receive_DMA>:
{
 80068e4:	4613      	mov	r3, r2
  if(huart->RxState == HAL_UART_STATE_READY) 
 80068e6:	f890 203a 	ldrb.w	r2, [r0, #58]	; 0x3a
{
 80068ea:	b573      	push	{r0, r1, r4, r5, r6, lr}
  if(huart->RxState == HAL_UART_STATE_READY) 
 80068ec:	2a20      	cmp	r2, #32
{
 80068ee:	4605      	mov	r5, r0
  if(huart->RxState == HAL_UART_STATE_READY) 
 80068f0:	d138      	bne.n	8006964 <HAL_UART_Receive_DMA+0x80>
    if((pData == NULL) || (Size == 0U))
 80068f2:	2900      	cmp	r1, #0
 80068f4:	d034      	beq.n	8006960 <HAL_UART_Receive_DMA+0x7c>
 80068f6:	2b00      	cmp	r3, #0
 80068f8:	d032      	beq.n	8006960 <HAL_UART_Receive_DMA+0x7c>
    __HAL_LOCK(huart);
 80068fa:	f890 2038 	ldrb.w	r2, [r0, #56]	; 0x38
 80068fe:	2a01      	cmp	r2, #1
 8006900:	d030      	beq.n	8006964 <HAL_UART_Receive_DMA+0x80>
 8006902:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006904:	2400      	movs	r4, #0
    __HAL_LOCK(huart);
 8006906:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 800690a:	2222      	movs	r2, #34	; 0x22
    huart->pRxBuffPtr = pData;
 800690c:	6281      	str	r1, [r0, #40]	; 0x28
    huart->RxXferSize = Size;
 800690e:	8583      	strh	r3, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006910:	63c4      	str	r4, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8006912:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 8006916:	6b40      	ldr	r0, [r0, #52]	; 0x34
 8006918:	4a13      	ldr	r2, [pc, #76]	; (8006968 <HAL_UART_Receive_DMA+0x84>)
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 800691a:	682e      	ldr	r6, [r5, #0]
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 800691c:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 800691e:	4a13      	ldr	r2, [pc, #76]	; (800696c <HAL_UART_Receive_DMA+0x88>)
    huart->hdmarx->XferAbortCallback = NULL;
 8006920:	6344      	str	r4, [r0, #52]	; 0x34
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 8006922:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmarx->XferErrorCallback = UART_DMAError;
 8006924:	4a12      	ldr	r2, [pc, #72]	; (8006970 <HAL_UART_Receive_DMA+0x8c>)
 8006926:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 8006928:	460a      	mov	r2, r1
 800692a:	1d31      	adds	r1, r6, #4
 800692c:	f7fe ffbc 	bl	80058a8 <HAL_DMA_Start_IT>
    return HAL_OK;
 8006930:	4620      	mov	r0, r4
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006932:	682b      	ldr	r3, [r5, #0]
 8006934:	9401      	str	r4, [sp, #4]
 8006936:	681a      	ldr	r2, [r3, #0]
 8006938:	9201      	str	r2, [sp, #4]
 800693a:	685a      	ldr	r2, [r3, #4]
    __HAL_UNLOCK(huart);
 800693c:	f885 4038 	strb.w	r4, [r5, #56]	; 0x38
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006940:	9201      	str	r2, [sp, #4]
 8006942:	9a01      	ldr	r2, [sp, #4]
    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8006944:	68da      	ldr	r2, [r3, #12]
 8006946:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 800694a:	60da      	str	r2, [r3, #12]
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800694c:	695a      	ldr	r2, [r3, #20]
 800694e:	f042 0201 	orr.w	r2, r2, #1
 8006952:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006954:	695a      	ldr	r2, [r3, #20]
 8006956:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 800695a:	615a      	str	r2, [r3, #20]
}
 800695c:	b002      	add	sp, #8
 800695e:	bd70      	pop	{r4, r5, r6, pc}
      return HAL_ERROR;
 8006960:	2001      	movs	r0, #1
 8006962:	e7fb      	b.n	800695c <HAL_UART_Receive_DMA+0x78>
    return HAL_BUSY;
 8006964:	2002      	movs	r0, #2
 8006966:	e7f9      	b.n	800695c <HAL_UART_Receive_DMA+0x78>
 8006968:	08006977 	.word	0x08006977
 800696c:	08006a2d 	.word	0x08006a2d
 8006970:	08006a39 	.word	0x08006a39

08006974 <HAL_UART_TxCpltCallback>:
 8006974:	4770      	bx	lr

08006976 <UART_DMAReceiveCplt>:
{
 8006976:	b508      	push	{r3, lr}
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006978:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 800697a:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 800697c:	681b      	ldr	r3, [r3, #0]
 800697e:	f013 0320 	ands.w	r3, r3, #32
 8006982:	d110      	bne.n	80069a6 <UART_DMAReceiveCplt+0x30>
    huart->RxXferCount = 0U;
 8006984:	85d3      	strh	r3, [r2, #46]	; 0x2e
    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8006986:	6813      	ldr	r3, [r2, #0]
 8006988:	68d9      	ldr	r1, [r3, #12]
 800698a:	f421 7180 	bic.w	r1, r1, #256	; 0x100
 800698e:	60d9      	str	r1, [r3, #12]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006990:	6959      	ldr	r1, [r3, #20]
 8006992:	f021 0101 	bic.w	r1, r1, #1
 8006996:	6159      	str	r1, [r3, #20]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006998:	6959      	ldr	r1, [r3, #20]
 800699a:	f021 0140 	bic.w	r1, r1, #64	; 0x40
 800699e:	6159      	str	r1, [r3, #20]
    huart->RxState = HAL_UART_STATE_READY;
 80069a0:	2320      	movs	r3, #32
 80069a2:	f882 303a 	strb.w	r3, [r2, #58]	; 0x3a
  HAL_UART_RxCpltCallback(huart);
 80069a6:	4610      	mov	r0, r2
 80069a8:	f001 fd46 	bl	8008438 <HAL_UART_RxCpltCallback>
 80069ac:	bd08      	pop	{r3, pc}

080069ae <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80069ae:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 80069b2:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80069b4:	2b22      	cmp	r3, #34	; 0x22
 80069b6:	d136      	bne.n	8006a26 <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80069b8:	6883      	ldr	r3, [r0, #8]
 80069ba:	6901      	ldr	r1, [r0, #16]
 80069bc:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 80069c0:	6802      	ldr	r2, [r0, #0]
 80069c2:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80069c4:	d123      	bne.n	8006a0e <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80069c6:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 80069c8:	b9e9      	cbnz	r1, 8006a06 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80069ca:	f3c2 0208 	ubfx	r2, r2, #0, #9
 80069ce:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 80069d2:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 80069d4:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 80069d6:	3c01      	subs	r4, #1
 80069d8:	b2a4      	uxth	r4, r4
 80069da:	85c4      	strh	r4, [r0, #46]	; 0x2e
 80069dc:	b98c      	cbnz	r4, 8006a02 <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 80069de:	6803      	ldr	r3, [r0, #0]
 80069e0:	68da      	ldr	r2, [r3, #12]
 80069e2:	f022 0220 	bic.w	r2, r2, #32
 80069e6:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 80069e8:	68da      	ldr	r2, [r3, #12]
 80069ea:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 80069ee:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 80069f0:	695a      	ldr	r2, [r3, #20]
 80069f2:	f022 0201 	bic.w	r2, r2, #1
 80069f6:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 80069f8:	2320      	movs	r3, #32
 80069fa:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 80069fe:	f001 fd1b 	bl	8008438 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 8006a02:	2000      	movs	r0, #0
}
 8006a04:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8006a06:	b2d2      	uxtb	r2, r2
 8006a08:	f823 2b01 	strh.w	r2, [r3], #1
 8006a0c:	e7e1      	b.n	80069d2 <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8006a0e:	b921      	cbnz	r1, 8006a1a <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 8006a10:	1c59      	adds	r1, r3, #1
 8006a12:	6852      	ldr	r2, [r2, #4]
 8006a14:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8006a16:	701a      	strb	r2, [r3, #0]
 8006a18:	e7dc      	b.n	80069d4 <UART_Receive_IT+0x26>
 8006a1a:	6852      	ldr	r2, [r2, #4]
 8006a1c:	1c59      	adds	r1, r3, #1
 8006a1e:	6281      	str	r1, [r0, #40]	; 0x28
 8006a20:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8006a24:	e7f7      	b.n	8006a16 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8006a26:	2002      	movs	r0, #2
 8006a28:	bd10      	pop	{r4, pc}

08006a2a <HAL_UART_RxHalfCpltCallback>:
 8006a2a:	4770      	bx	lr

08006a2c <UART_DMARxHalfCplt>:
{
 8006a2c:	b508      	push	{r3, lr}
  HAL_UART_RxHalfCpltCallback(huart); 
 8006a2e:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8006a30:	f7ff fffb 	bl	8006a2a <HAL_UART_RxHalfCpltCallback>
 8006a34:	bd08      	pop	{r3, pc}

08006a36 <HAL_UART_ErrorCallback>:
 8006a36:	4770      	bx	lr

08006a38 <UART_DMAError>:
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8006a38:	6a41      	ldr	r1, [r0, #36]	; 0x24
{
 8006a3a:	b508      	push	{r3, lr}
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
 8006a3c:	680b      	ldr	r3, [r1, #0]
 8006a3e:	695a      	ldr	r2, [r3, #20]
  if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
 8006a40:	f891 0039 	ldrb.w	r0, [r1, #57]	; 0x39
 8006a44:	2821      	cmp	r0, #33	; 0x21
 8006a46:	d10a      	bne.n	8006a5e <UART_DMAError+0x26>
 8006a48:	0612      	lsls	r2, r2, #24
 8006a4a:	d508      	bpl.n	8006a5e <UART_DMAError+0x26>
    huart->TxXferCount = 0U;
 8006a4c:	2200      	movs	r2, #0
 8006a4e:	84ca      	strh	r2, [r1, #38]	; 0x26
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
 8006a50:	68da      	ldr	r2, [r3, #12]
 8006a52:	f022 02c0 	bic.w	r2, r2, #192	; 0xc0
 8006a56:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8006a58:	2220      	movs	r2, #32
 8006a5a:	f881 2039 	strb.w	r2, [r1, #57]	; 0x39
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 
 8006a5e:	695b      	ldr	r3, [r3, #20]
  if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
 8006a60:	f891 203a 	ldrb.w	r2, [r1, #58]	; 0x3a
 8006a64:	2a22      	cmp	r2, #34	; 0x22
 8006a66:	d106      	bne.n	8006a76 <UART_DMAError+0x3e>
 8006a68:	065b      	lsls	r3, r3, #25
 8006a6a:	d504      	bpl.n	8006a76 <UART_DMAError+0x3e>
    huart->RxXferCount = 0U;
 8006a6c:	2300      	movs	r3, #0
    UART_EndRxTransfer(huart);
 8006a6e:	4608      	mov	r0, r1
    huart->RxXferCount = 0U;
 8006a70:	85cb      	strh	r3, [r1, #46]	; 0x2e
    UART_EndRxTransfer(huart);
 8006a72:	f7ff fdd9 	bl	8006628 <UART_EndRxTransfer>
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8006a76:	6bcb      	ldr	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8006a78:	4608      	mov	r0, r1
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8006a7a:	f043 0310 	orr.w	r3, r3, #16
 8006a7e:	63cb      	str	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8006a80:	f7ff ffd9 	bl	8006a36 <HAL_UART_ErrorCallback>
 8006a84:	bd08      	pop	{r3, pc}
	...

08006a88 <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8006a88:	6803      	ldr	r3, [r0, #0]
{
 8006a8a:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8006a8c:	681a      	ldr	r2, [r3, #0]
{
 8006a8e:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8006a90:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8006a92:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8006a94:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 8006a96:	d107      	bne.n	8006aa8 <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8006a98:	0696      	lsls	r6, r2, #26
 8006a9a:	d55a      	bpl.n	8006b52 <HAL_UART_IRQHandler+0xca>
 8006a9c:	068d      	lsls	r5, r1, #26
 8006a9e:	d558      	bpl.n	8006b52 <HAL_UART_IRQHandler+0xca>
}
 8006aa0:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8006aa4:	f7ff bf83 	b.w	80069ae <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 8006aa8:	f015 0501 	ands.w	r5, r5, #1
 8006aac:	d102      	bne.n	8006ab4 <HAL_UART_IRQHandler+0x2c>
 8006aae:	f411 7f90 	tst.w	r1, #288	; 0x120
 8006ab2:	d04e      	beq.n	8006b52 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 8006ab4:	07d3      	lsls	r3, r2, #31
 8006ab6:	d505      	bpl.n	8006ac4 <HAL_UART_IRQHandler+0x3c>
 8006ab8:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 8006aba:	bf42      	ittt	mi
 8006abc:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 8006abe:	f043 0301 	orrmi.w	r3, r3, #1
 8006ac2:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8006ac4:	0750      	lsls	r0, r2, #29
 8006ac6:	d504      	bpl.n	8006ad2 <HAL_UART_IRQHandler+0x4a>
 8006ac8:	b11d      	cbz	r5, 8006ad2 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 8006aca:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006acc:	f043 0302 	orr.w	r3, r3, #2
 8006ad0:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8006ad2:	0793      	lsls	r3, r2, #30
 8006ad4:	d504      	bpl.n	8006ae0 <HAL_UART_IRQHandler+0x58>
 8006ad6:	b11d      	cbz	r5, 8006ae0 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 8006ad8:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006ada:	f043 0304 	orr.w	r3, r3, #4
 8006ade:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8006ae0:	0716      	lsls	r6, r2, #28
 8006ae2:	d504      	bpl.n	8006aee <HAL_UART_IRQHandler+0x66>
 8006ae4:	b11d      	cbz	r5, 8006aee <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 8006ae6:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006ae8:	f043 0308 	orr.w	r3, r3, #8
 8006aec:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 8006aee:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006af0:	2b00      	cmp	r3, #0
 8006af2:	d066      	beq.n	8006bc2 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8006af4:	0695      	lsls	r5, r2, #26
 8006af6:	d504      	bpl.n	8006b02 <HAL_UART_IRQHandler+0x7a>
 8006af8:	0688      	lsls	r0, r1, #26
 8006afa:	d502      	bpl.n	8006b02 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 8006afc:	4620      	mov	r0, r4
 8006afe:	f7ff ff56 	bl	80069ae <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8006b02:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 8006b04:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8006b06:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 8006b08:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 8006b0a:	0711      	lsls	r1, r2, #28
 8006b0c:	d402      	bmi.n	8006b14 <HAL_UART_IRQHandler+0x8c>
 8006b0e:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 8006b12:	d01a      	beq.n	8006b4a <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8006b14:	f7ff fd88 	bl	8006628 <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 8006b18:	6823      	ldr	r3, [r4, #0]
 8006b1a:	695a      	ldr	r2, [r3, #20]
 8006b1c:	0652      	lsls	r2, r2, #25
 8006b1e:	d510      	bpl.n	8006b42 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006b20:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8006b22:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006b24:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8006b28:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8006b2a:	b150      	cbz	r0, 8006b42 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 8006b2c:	4b25      	ldr	r3, [pc, #148]	; (8006bc4 <HAL_UART_IRQHandler+0x13c>)
 8006b2e:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 8006b30:	f7fe fef8 	bl	8005924 <HAL_DMA_Abort_IT>
 8006b34:	2800      	cmp	r0, #0
 8006b36:	d044      	beq.n	8006bc2 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8006b38:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 8006b3a:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8006b3e:	6b43      	ldr	r3, [r0, #52]	; 0x34
 8006b40:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 8006b42:	4620      	mov	r0, r4
 8006b44:	f7ff ff77 	bl	8006a36 <HAL_UART_ErrorCallback>
 8006b48:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 8006b4a:	f7ff ff74 	bl	8006a36 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006b4e:	63e5      	str	r5, [r4, #60]	; 0x3c
 8006b50:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 8006b52:	0616      	lsls	r6, r2, #24
 8006b54:	d527      	bpl.n	8006ba6 <HAL_UART_IRQHandler+0x11e>
 8006b56:	060d      	lsls	r5, r1, #24
 8006b58:	d525      	bpl.n	8006ba6 <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 8006b5a:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8006b5e:	2a21      	cmp	r2, #33	; 0x21
 8006b60:	d12f      	bne.n	8006bc2 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006b62:	68a2      	ldr	r2, [r4, #8]
 8006b64:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8006b68:	6a22      	ldr	r2, [r4, #32]
 8006b6a:	d117      	bne.n	8006b9c <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 8006b6c:	8811      	ldrh	r1, [r2, #0]
 8006b6e:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8006b72:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8006b74:	6921      	ldr	r1, [r4, #16]
 8006b76:	b979      	cbnz	r1, 8006b98 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8006b78:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 8006b7a:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 8006b7c:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 8006b7e:	3a01      	subs	r2, #1
 8006b80:	b292      	uxth	r2, r2
 8006b82:	84e2      	strh	r2, [r4, #38]	; 0x26
 8006b84:	b9ea      	cbnz	r2, 8006bc2 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 8006b86:	68da      	ldr	r2, [r3, #12]
 8006b88:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8006b8c:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 8006b8e:	68da      	ldr	r2, [r3, #12]
 8006b90:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8006b94:	60da      	str	r2, [r3, #12]
 8006b96:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 8006b98:	3201      	adds	r2, #1
 8006b9a:	e7ee      	b.n	8006b7a <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 8006b9c:	1c51      	adds	r1, r2, #1
 8006b9e:	6221      	str	r1, [r4, #32]
 8006ba0:	7812      	ldrb	r2, [r2, #0]
 8006ba2:	605a      	str	r2, [r3, #4]
 8006ba4:	e7ea      	b.n	8006b7c <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 8006ba6:	0650      	lsls	r0, r2, #25
 8006ba8:	d50b      	bpl.n	8006bc2 <HAL_UART_IRQHandler+0x13a>
 8006baa:	064a      	lsls	r2, r1, #25
 8006bac:	d509      	bpl.n	8006bc2 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8006bae:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8006bb0:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8006bb2:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8006bb6:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8006bb8:	2320      	movs	r3, #32
 8006bba:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 8006bbe:	f7ff fed9 	bl	8006974 <HAL_UART_TxCpltCallback>
 8006bc2:	bd70      	pop	{r4, r5, r6, pc}
 8006bc4:	08006bc9 	.word	0x08006bc9

08006bc8 <UART_DMAAbortOnError>:
{
 8006bc8:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 8006bca:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8006bcc:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 8006bce:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 8006bd0:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 8006bd2:	f7ff ff30 	bl	8006a36 <HAL_UART_ErrorCallback>
 8006bd6:	bd08      	pop	{r3, pc}

08006bd8 <BDA4601_atten_ctrl>:
    BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0);           
    BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0);               
}


void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
 8006bd8:	b084      	sub	sp, #16
 8006bda:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8006bde:	ac0a      	add	r4, sp, #40	; 0x28
 8006be0:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 8006be4:	f89d 4040 	ldrb.w	r4, [sp, #64]	; 0x40
 8006be8:	9e0e      	ldr	r6, [sp, #56]	; 0x38
 8006bea:	f8bd 703c 	ldrh.w	r7, [sp, #60]	; 0x3c
    uint8_t i = 0;
    uint8_t temp = 0;
    printf("BDA4601_atten_ctrl : %x \r\n",data);
 8006bee:	4621      	mov	r1, r4
 8006bf0:	4681      	mov	r9, r0
 8006bf2:	4828      	ldr	r0, [pc, #160]	; (8006c94 <BDA4601_atten_ctrl+0xbc>)
 8006bf4:	f8bd a02c 	ldrh.w	sl, [sp, #44]	; 0x2c
 8006bf8:	f8dd 8030 	ldr.w	r8, [sp, #48]	; 0x30
 8006bfc:	f8bd b034 	ldrh.w	fp, [sp, #52]	; 0x34
 8006c00:	f002 fc86 	bl	8009510 <iprintf>
    data = 4 * data;
    temp = (uint8_t)data;
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 8006c04:	2200      	movs	r2, #0
 8006c06:	4639      	mov	r1, r7
 8006c08:	4630      	mov	r0, r6
 8006c0a:	f7ff f8c1 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8006c0e:	2001      	movs	r0, #1
 8006c10:	f7fe fc60 	bl	80054d4 <HAL_Delay>
 8006c14:	2508      	movs	r5, #8
    data = 4 * data;
 8006c16:	00a4      	lsls	r4, r4, #2
 8006c18:	b2e4      	uxtb	r4, r4
    for(i = 0; i < 8; i++){
        if((uint8_t)temp & 0x01){
 8006c1a:	f014 0201 	ands.w	r2, r4, #1
           HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_SET);//DATA
 8006c1e:	bf18      	it	ne
 8006c20:	2201      	movne	r2, #1
        }
           else{
           HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_RESET);//DATA
 8006c22:	4659      	mov	r1, fp
 8006c24:	4640      	mov	r0, r8
 8006c26:	f7ff f8b3 	bl	8005d90 <HAL_GPIO_WritePin>
           }

        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_SET);//CLOCK
 8006c2a:	2201      	movs	r2, #1
 8006c2c:	4651      	mov	r1, sl
 8006c2e:	4648      	mov	r0, r9
 8006c30:	f7ff f8ae 	bl	8005d90 <HAL_GPIO_WritePin>
        HAL_Delay(1);
 8006c34:	2001      	movs	r0, #1
 8006c36:	f7fe fc4d 	bl	80054d4 <HAL_Delay>
        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 8006c3a:	2200      	movs	r2, #0
 8006c3c:	4651      	mov	r1, sl
 8006c3e:	4648      	mov	r0, r9
 8006c40:	f7ff f8a6 	bl	8005d90 <HAL_GPIO_WritePin>
 8006c44:	3d01      	subs	r5, #1
        HAL_Delay(1);
 8006c46:	2001      	movs	r0, #1
 8006c48:	f7fe fc44 	bl	80054d4 <HAL_Delay>
    for(i = 0; i < 8; i++){
 8006c4c:	f015 05ff 	ands.w	r5, r5, #255	; 0xff
        temp >>= 1;
 8006c50:	ea4f 0454 	mov.w	r4, r4, lsr #1
    for(i = 0; i < 8; i++){
 8006c54:	d1e1      	bne.n	8006c1a <BDA4601_atten_ctrl+0x42>
    }
    HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 8006c56:	462a      	mov	r2, r5
 8006c58:	4651      	mov	r1, sl
 8006c5a:	4648      	mov	r0, r9
 8006c5c:	f7ff f898 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
 8006c60:	462a      	mov	r2, r5
 8006c62:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8006c66:	4640      	mov	r0, r8
 8006c68:	f7ff f892 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_Delay(5);
 8006c6c:	2005      	movs	r0, #5
 8006c6e:	f7fe fc31 	bl	80054d4 <HAL_Delay>
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_SET);//LE
 8006c72:	4639      	mov	r1, r7
 8006c74:	2201      	movs	r2, #1
 8006c76:	4630      	mov	r0, r6
 8006c78:	f7ff f88a 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8006c7c:	2001      	movs	r0, #1
 8006c7e:	f7fe fc29 	bl	80054d4 <HAL_Delay>
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 8006c82:	462a      	mov	r2, r5
 8006c84:	4639      	mov	r1, r7
 8006c86:	4630      	mov	r0, r6
}
 8006c88:	e8bd 4ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8006c8c:	b004      	add	sp, #16
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 8006c8e:	f7ff b87f 	b.w	8005d90 <HAL_GPIO_WritePin>
 8006c92:	bf00      	nop
 8006c94:	0800b658 	.word	0x0800b658

08006c98 <BDA4601_Test>:
void BDA4601_Test(void){
 8006c98:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    BDA4601_atten_ctrl(BDA4601_1_8G_DL1,0);           
 8006c9a:	2400      	movs	r4, #0
 8006c9c:	4b42      	ldr	r3, [pc, #264]	; (8006da8 <BDA4601_Test+0x110>)
 8006c9e:	9402      	str	r4, [sp, #8]
 8006ca0:	f103 0210 	add.w	r2, r3, #16
 8006ca4:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006ca8:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006cac:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006cae:	f7ff ff93 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_DL2,0);           
 8006cb2:	4b3e      	ldr	r3, [pc, #248]	; (8006dac <BDA4601_Test+0x114>)
 8006cb4:	9402      	str	r4, [sp, #8]
 8006cb6:	f103 0210 	add.w	r2, r3, #16
 8006cba:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006cbe:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006cc2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006cc4:	f7ff ff88 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL1,0);           
 8006cc8:	4b39      	ldr	r3, [pc, #228]	; (8006db0 <BDA4601_Test+0x118>)
 8006cca:	9402      	str	r4, [sp, #8]
 8006ccc:	f103 0210 	add.w	r2, r3, #16
 8006cd0:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006cd4:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006cd8:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006cda:	f7ff ff7d 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL2,0);           
 8006cde:	4b35      	ldr	r3, [pc, #212]	; (8006db4 <BDA4601_Test+0x11c>)
 8006ce0:	9402      	str	r4, [sp, #8]
 8006ce2:	f103 0210 	add.w	r2, r3, #16
 8006ce6:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006cea:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006cee:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006cf0:	f7ff ff72 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL3,0);           
 8006cf4:	4b30      	ldr	r3, [pc, #192]	; (8006db8 <BDA4601_Test+0x120>)
 8006cf6:	9402      	str	r4, [sp, #8]
 8006cf8:	f103 0210 	add.w	r2, r3, #16
 8006cfc:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d00:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d04:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006d06:	f7ff ff67 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL4,0);           
 8006d0a:	4b2c      	ldr	r3, [pc, #176]	; (8006dbc <BDA4601_Test+0x124>)
 8006d0c:	9402      	str	r4, [sp, #8]
 8006d0e:	f103 0210 	add.w	r2, r3, #16
 8006d12:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d16:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d1a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006d1c:	f7ff ff5c 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_DL1,0);           
 8006d20:	4b27      	ldr	r3, [pc, #156]	; (8006dc0 <BDA4601_Test+0x128>)
 8006d22:	9402      	str	r4, [sp, #8]
 8006d24:	f103 0210 	add.w	r2, r3, #16
 8006d28:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d2c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d30:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006d32:	f7ff ff51 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_DL2,0);           
 8006d36:	4b23      	ldr	r3, [pc, #140]	; (8006dc4 <BDA4601_Test+0x12c>)
 8006d38:	9402      	str	r4, [sp, #8]
 8006d3a:	f103 0210 	add.w	r2, r3, #16
 8006d3e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d42:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d46:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006d48:	f7ff ff46 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL1,0);           
 8006d4c:	4b1e      	ldr	r3, [pc, #120]	; (8006dc8 <BDA4601_Test+0x130>)
 8006d4e:	9402      	str	r4, [sp, #8]
 8006d50:	f103 0210 	add.w	r2, r3, #16
 8006d54:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d58:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d5c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006d5e:	f7ff ff3b 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL2,0);
 8006d62:	4b1a      	ldr	r3, [pc, #104]	; (8006dcc <BDA4601_Test+0x134>)
 8006d64:	9402      	str	r4, [sp, #8]
 8006d66:	f103 0210 	add.w	r2, r3, #16
 8006d6a:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d6e:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d72:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006d74:	f7ff ff30 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0);           
 8006d78:	4b15      	ldr	r3, [pc, #84]	; (8006dd0 <BDA4601_Test+0x138>)
 8006d7a:	9402      	str	r4, [sp, #8]
 8006d7c:	f103 0210 	add.w	r2, r3, #16
 8006d80:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d84:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d88:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006d8a:	f7ff ff25 	bl	8006bd8 <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0);               
 8006d8e:	4b11      	ldr	r3, [pc, #68]	; (8006dd4 <BDA4601_Test+0x13c>)
 8006d90:	9402      	str	r4, [sp, #8]
 8006d92:	f103 0210 	add.w	r2, r3, #16
 8006d96:	e892 0003 	ldmia.w	r2, {r0, r1}
 8006d9a:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006d9e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006da0:	f7ff ff1a 	bl	8006bd8 <BDA4601_atten_ctrl>
}
 8006da4:	b004      	add	sp, #16
 8006da6:	bd10      	pop	{r4, pc}
 8006da8:	20000008 	.word	0x20000008
 8006dac:	20000020 	.word	0x20000020
 8006db0:	20000038 	.word	0x20000038
 8006db4:	20000050 	.word	0x20000050
 8006db8:	20000068 	.word	0x20000068
 8006dbc:	20000080 	.word	0x20000080
 8006dc0:	20000098 	.word	0x20000098
 8006dc4:	200000b0 	.word	0x200000b0
 8006dc8:	200000c8 	.word	0x200000c8
 8006dcc:	200000e0 	.word	0x200000e0
 8006dd0:	200000f8 	.word	0x200000f8
 8006dd4:	20000110 	.word	0x20000110

08006dd8 <STH30_CreateCrc>:
	}
	return(crc16);
}

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 8006dd8:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8006dda:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8006ddc:	4604      	mov	r4, r0
 8006dde:	1a22      	subs	r2, r4, r0
 8006de0:	b2d2      	uxtb	r2, r2
 8006de2:	4291      	cmp	r1, r2
 8006de4:	d801      	bhi.n	8006dea <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 8006de6:	4618      	mov	r0, r3
 8006de8:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 8006dea:	f814 2b01 	ldrb.w	r2, [r4], #1
 8006dee:	4053      	eors	r3, r2
 8006df0:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8006df2:	f013 0f80 	tst.w	r3, #128	; 0x80
 8006df6:	f102 32ff 	add.w	r2, r2, #4294967295
 8006dfa:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8006dfe:	bf18      	it	ne
 8006e00:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8006e04:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 8006e08:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8006e0a:	d1f2      	bne.n	8006df2 <STH30_CreateCrc+0x1a>
 8006e0c:	e7e7      	b.n	8006dde <STH30_CreateCrc+0x6>

08006e0e <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 8006e0e:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8006e10:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8006e12:	4605      	mov	r5, r0
 8006e14:	1a2c      	subs	r4, r5, r0
 8006e16:	b2e4      	uxtb	r4, r4
 8006e18:	42a1      	cmp	r1, r4
 8006e1a:	d803      	bhi.n	8006e24 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8006e1c:	1a9b      	subs	r3, r3, r2
 8006e1e:	4258      	negs	r0, r3
 8006e20:	4158      	adcs	r0, r3
 8006e22:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 8006e24:	f815 4b01 	ldrb.w	r4, [r5], #1
 8006e28:	4063      	eors	r3, r4
 8006e2a:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8006e2c:	f013 0f80 	tst.w	r3, #128	; 0x80
 8006e30:	f104 34ff 	add.w	r4, r4, #4294967295
 8006e34:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8006e38:	bf18      	it	ne
 8006e3a:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8006e3e:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8006e42:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8006e44:	d1f2      	bne.n	8006e2c <STH30_CheckCrc+0x1e>
 8006e46:	e7e5      	b.n	8006e14 <STH30_CheckCrc+0x6>

08006e48 <Bit_Compare>:
    ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val;
    ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
    PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
}
#endif // PYJ.2019.07.26_END -- 
void Bit_Compare(PE43711_st ATT,uint8_t data,uint8_t Shift_Index){
 8006e48:	b084      	sub	sp, #16
 8006e4a:	e88d 000f 	stmia.w	sp, {r0, r1, r2, r3}
 8006e4e:	f89d 2018 	ldrb.w	r2, [sp, #24]
 8006e52:	f89d 301c 	ldrb.w	r3, [sp, #28]
 8006e56:	9802      	ldr	r0, [sp, #8]
    if(data & (0x01 << Shift_Index)){
 8006e58:	411a      	asrs	r2, r3
 8006e5a:	f012 0201 	ands.w	r2, r2, #1
 8006e5e:	f8bd 100c 	ldrh.w	r1, [sp, #12]
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_SET);//DATA
 8006e62:	bf18      	it	ne
 8006e64:	2201      	movne	r2, #1
    }
    else{
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
    }
}
 8006e66:	b004      	add	sp, #16
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
 8006e68:	f7fe bf92 	b.w	8005d90 <HAL_GPIO_WritePin>

08006e6c <PE43711_ALL_atten_ctrl>:
void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){
 8006e6c:	b084      	sub	sp, #16
 8006e6e:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8006e72:	b085      	sub	sp, #20
 8006e74:	ac0e      	add	r4, sp, #56	; 0x38
 8006e76:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 8006e7a:	9d12      	ldr	r5, [sp, #72]	; 0x48
 8006e7c:	f8bd 604c 	ldrh.w	r6, [sp, #76]	; 0x4c
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8006e80:	2200      	movs	r2, #0
 8006e82:	4631      	mov	r1, r6
 8006e84:	4680      	mov	r8, r0
 8006e86:	4628      	mov	r0, r5
 8006e88:	f8bd 903c 	ldrh.w	r9, [sp, #60]	; 0x3c
 8006e8c:	f7fe ff80 	bl	8005d90 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8006e90:	200a      	movs	r0, #10
 8006e92:	f000 fc3d 	bl	8007710 <Pol_Delay_us>
 8006e96:	2700      	movs	r7, #0
    for(uint8_t i = 0; i < 8; i++){
        Bit_Compare(ATT.ATT0,ATT.data0,i);
 8006e98:	f10d 0b48 	add.w	fp, sp, #72	; 0x48
        Bit_Compare(ATT.ATT1,ATT.data1,i);
 8006e9c:	f10d 0a64 	add.w	sl, sp, #100	; 0x64
        Bit_Compare(ATT.ATT0,ATT.data0,i);
 8006ea0:	f89d 3050 	ldrb.w	r3, [sp, #80]	; 0x50
 8006ea4:	b2fc      	uxtb	r4, r7
 8006ea6:	9302      	str	r3, [sp, #8]
 8006ea8:	9512      	str	r5, [sp, #72]	; 0x48
 8006eaa:	f8ad 604c 	strh.w	r6, [sp, #76]	; 0x4c
 8006eae:	9403      	str	r4, [sp, #12]
 8006eb0:	e89b 0003 	ldmia.w	fp, {r0, r1}
 8006eb4:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006eb8:	f8cd 8038 	str.w	r8, [sp, #56]	; 0x38
 8006ebc:	f8ad 903c 	strh.w	r9, [sp, #60]	; 0x3c
 8006ec0:	ab0e      	add	r3, sp, #56	; 0x38
 8006ec2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006ec4:	f7ff ffc0 	bl	8006e48 <Bit_Compare>
        Bit_Compare(ATT.ATT1,ATT.data1,i);
 8006ec8:	f89d 306c 	ldrb.w	r3, [sp, #108]	; 0x6c
 8006ecc:	9403      	str	r4, [sp, #12]
 8006ece:	9302      	str	r3, [sp, #8]
 8006ed0:	e89a 0003 	ldmia.w	sl, {r0, r1}
 8006ed4:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006ed8:	ab15      	add	r3, sp, #84	; 0x54
 8006eda:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006edc:	f7ff ffb4 	bl	8006e48 <Bit_Compare>
        Bit_Compare(ATT.ATT2,ATT.data2,i);
 8006ee0:	f89d 3088 	ldrb.w	r3, [sp, #136]	; 0x88
 8006ee4:	9403      	str	r4, [sp, #12]
 8006ee6:	9302      	str	r3, [sp, #8]
 8006ee8:	ab20      	add	r3, sp, #128	; 0x80
 8006eea:	e893 0003 	ldmia.w	r3, {r0, r1}
 8006eee:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006ef2:	ab1c      	add	r3, sp, #112	; 0x70
 8006ef4:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006ef6:	f7ff ffa7 	bl	8006e48 <Bit_Compare>
        Bit_Compare(ATT.ATT3,ATT.data3,i);
 8006efa:	f89d 30a4 	ldrb.w	r3, [sp, #164]	; 0xa4
 8006efe:	9403      	str	r4, [sp, #12]
 8006f00:	9302      	str	r3, [sp, #8]
 8006f02:	ab27      	add	r3, sp, #156	; 0x9c
 8006f04:	e893 0003 	ldmia.w	r3, {r0, r1}
 8006f08:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006f0c:	ab23      	add	r3, sp, #140	; 0x8c
 8006f0e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006f10:	f7ff ff9a 	bl	8006e48 <Bit_Compare>
        Bit_Compare(ATT.ATT4,ATT.data4,i);
 8006f14:	f89d 30c0 	ldrb.w	r3, [sp, #192]	; 0xc0
 8006f18:	9403      	str	r4, [sp, #12]
 8006f1a:	9302      	str	r3, [sp, #8]
 8006f1c:	ab2e      	add	r3, sp, #184	; 0xb8
 8006f1e:	e893 0003 	ldmia.w	r3, {r0, r1}
 8006f22:	e88d 0003 	stmia.w	sp, {r0, r1}
 8006f26:	ab2a      	add	r3, sp, #168	; 0xa8
 8006f28:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8006f2a:	f7ff ff8d 	bl	8006e48 <Bit_Compare>
		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK
 8006f2e:	2201      	movs	r2, #1
 8006f30:	4649      	mov	r1, r9
 8006f32:	4640      	mov	r0, r8
 8006f34:	f7fe ff2c 	bl	8005d90 <HAL_GPIO_WritePin>
		Pol_Delay_us(10);
 8006f38:	200a      	movs	r0, #10
 8006f3a:	f000 fbe9 	bl	8007710 <Pol_Delay_us>
 8006f3e:	3701      	adds	r7, #1
		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 8006f40:	2200      	movs	r2, #0
 8006f42:	4649      	mov	r1, r9
 8006f44:	4640      	mov	r0, r8
 8006f46:	f7fe ff23 	bl	8005d90 <HAL_GPIO_WritePin>
    for(uint8_t i = 0; i < 8; i++){
 8006f4a:	2f08      	cmp	r7, #8
 8006f4c:	d1a8      	bne.n	8006ea0 <PE43711_ALL_atten_ctrl+0x34>
    }
    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
 8006f4e:	2200      	movs	r2, #0
 8006f50:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8006f54:	4809      	ldr	r0, [pc, #36]	; (8006f7c <PE43711_ALL_atten_ctrl+0x110>)
 8006f56:	f7fe ff1b 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_SET);//LE
 8006f5a:	4631      	mov	r1, r6
 8006f5c:	2201      	movs	r2, #1
 8006f5e:	4628      	mov	r0, r5
 8006f60:	f7fe ff16 	bl	8005d90 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8006f64:	200a      	movs	r0, #10
 8006f66:	f000 fbd3 	bl	8007710 <Pol_Delay_us>
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8006f6a:	2200      	movs	r2, #0
 8006f6c:	4631      	mov	r1, r6
 8006f6e:	4628      	mov	r0, r5
}
 8006f70:	b005      	add	sp, #20
 8006f72:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8006f76:	b004      	add	sp, #16
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8006f78:	f7fe bf0a 	b.w	8005d90 <HAL_GPIO_WritePin>
 8006f7c:	40010c00 	.word	0x40010c00

08006f80 <PE43711_PinInit>:
void PE43711_PinInit(void){
 8006f80:	b5f0      	push	{r4, r5, r6, r7, lr}
    ALL_ATT_3_5G.ATT0 = ATT_3_5G_DL;
 8006f82:	4c21      	ldr	r4, [pc, #132]	; (8007008 <PE43711_PinInit+0x88>)
 8006f84:	4e21      	ldr	r6, [pc, #132]	; (800700c <PE43711_PinInit+0x8c>)
 8006f86:	4625      	mov	r5, r4
 8006f88:	ce0f      	ldmia	r6!, {r0, r1, r2, r3}
 8006f8a:	c50f      	stmia	r5!, {r0, r1, r2, r3}
 8006f8c:	e896 0003 	ldmia.w	r6, {r0, r1}
    ALL_ATT_3_5G.ATT1 = ATT_3_5G_UL;
 8006f90:	4f1f      	ldr	r7, [pc, #124]	; (8007010 <PE43711_PinInit+0x90>)
 8006f92:	f104 061c 	add.w	r6, r4, #28
    ALL_ATT_3_5G.ATT0 = ATT_3_5G_DL;
 8006f96:	e885 0003 	stmia.w	r5, {r0, r1}
    ALL_ATT_3_5G.ATT1 = ATT_3_5G_UL;
 8006f9a:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 8006f9c:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 8006f9e:	e897 0003 	ldmia.w	r7, {r0, r1}
    ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 8006fa2:	4f1c      	ldr	r7, [pc, #112]	; (8007014 <PE43711_PinInit+0x94>)
    ALL_ATT_3_5G.ATT1 = ATT_3_5G_UL;
 8006fa4:	e886 0003 	stmia.w	r6, {r0, r1}
    ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 8006fa8:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 8006faa:	f104 0638 	add.w	r6, r4, #56	; 0x38
 8006fae:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 8006fb0:	e897 0003 	ldmia.w	r7, {r0, r1}
    ALL_ATT_3_5G.ATT3 = ATT_3_5G_COM2;
 8006fb4:	4f18      	ldr	r7, [pc, #96]	; (8007018 <PE43711_PinInit+0x98>)
    ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 8006fb6:	e886 0003 	stmia.w	r6, {r0, r1}
    ALL_ATT_3_5G.ATT3 = ATT_3_5G_COM2;
 8006fba:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 8006fbc:	f104 0654 	add.w	r6, r4, #84	; 0x54
 8006fc0:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 8006fc2:	e897 0003 	ldmia.w	r7, {r0, r1}
    ALL_ATT_3_5G.ATT4 = ATT_3_5G_COM3;
 8006fc6:	4f15      	ldr	r7, [pc, #84]	; (800701c <PE43711_PinInit+0x9c>)
    ALL_ATT_3_5G.ATT3 = ATT_3_5G_COM2;
 8006fc8:	e886 0003 	stmia.w	r6, {r0, r1}
    ALL_ATT_3_5G.ATT4 = ATT_3_5G_COM3;
 8006fcc:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 8006fce:	f104 0670 	add.w	r6, r4, #112	; 0x70
 8006fd2:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 8006fd4:	e897 0003 	ldmia.w	r7, {r0, r1}
    ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
 8006fd8:	2300      	movs	r3, #0
void PE43711_PinInit(void){
 8006fda:	b0a1      	sub	sp, #132	; 0x84
    ALL_ATT_3_5G.ATT4 = ATT_3_5G_COM3;
 8006fdc:	e886 0003 	stmia.w	r6, {r0, r1}
    PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8006fe0:	227c      	movs	r2, #124	; 0x7c
 8006fe2:	4629      	mov	r1, r5
 8006fe4:	4668      	mov	r0, sp
    ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
 8006fe6:	7623      	strb	r3, [r4, #24]
    ALL_ATT_3_5G.data1 = ATTEN_3_5G_Initial_Val;
 8006fe8:	f884 3034 	strb.w	r3, [r4, #52]	; 0x34
    ALL_ATT_3_5G.data2 = ATTEN_3_5G_Initial_Val;
 8006fec:	f884 3050 	strb.w	r3, [r4, #80]	; 0x50
    ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val;
 8006ff0:	f884 306c 	strb.w	r3, [r4, #108]	; 0x6c
    ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
 8006ff4:	f884 3088 	strb.w	r3, [r4, #136]	; 0x88
    PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8006ff8:	f001 fe16 	bl	8008c28 <memcpy>
 8006ffc:	e894 000f 	ldmia.w	r4, {r0, r1, r2, r3}
 8007000:	f7ff ff34 	bl	8006e6c <PE43711_ALL_atten_ctrl>
}
 8007004:	b021      	add	sp, #132	; 0x84
 8007006:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8007008:	2000043c 	.word	0x2000043c
 800700c:	20000170 	.word	0x20000170
 8007010:	20000188 	.word	0x20000188
 8007014:	20000128 	.word	0x20000128
 8007018:	20000140 	.word	0x20000140
 800701c:	20000158 	.word	0x20000158

08007020 <N_Divider_Reg_Create>:


double N_Reg_Value_Calc(double val){
    return  val / 1000;
}
uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){
 8007020:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8007024:	4607      	mov	r7, r0
 8007026:	460e      	mov	r6, r1
 8007028:	4690      	mov	r8, r2
    uint32_t ret = 0;
    uint32_t shift_bit = 0x01;
    uint8_t control_bit = 0;
    uint8_t i = 0;
    printf("FRAC : %d INT : %d \r\n",(int)_FRAC,_INT);
 800702a:	460a      	mov	r2, r1
 800702c:	4601      	mov	r1, r0
 800702e:	481d      	ldr	r0, [pc, #116]	; (80070a4 <N_Divider_Reg_Create+0x84>)
 8007030:	f002 fa6e 	bl	8009510 <iprintf>
    for(i = 0; i < 2; i++){
        if(control_bit & 0x01)
            ret += shift_bit << i;
        control_bit = control_bit >> 1;
    }
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007034:	2200      	movs	r2, #0
 8007036:	2157      	movs	r1, #87	; 0x57
 8007038:	481b      	ldr	r0, [pc, #108]	; (80070a8 <N_Divider_Reg_Create+0x88>)
 800703a:	f002 fa69 	bl	8009510 <iprintf>
 800703e:	2502      	movs	r5, #2
 8007040:	2400      	movs	r4, #0
    for(i = 2; i < 14; i++){
        if(_FRAC & 0x01)
            ret += shift_bit << i;
 8007042:	2301      	movs	r3, #1
        if(_FRAC & 0x01)
 8007044:	07f9      	lsls	r1, r7, #31
            ret += shift_bit << i;
 8007046:	bf48      	it	mi
 8007048:	fa03 f205 	lslmi.w	r2, r3, r5
 800704c:	f105 0501 	add.w	r5, r5, #1
 8007050:	bf48      	it	mi
 8007052:	18a4      	addmi	r4, r4, r2
    for(i = 2; i < 14; i++){
 8007054:	2d0e      	cmp	r5, #14
        _FRAC = _FRAC >> 1;
 8007056:	ea4f 0757 	mov.w	r7, r7, lsr #1
    for(i = 2; i < 14; i++){
 800705a:	d1f3      	bne.n	8007044 <N_Divider_Reg_Create+0x24>
    }
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
 800705c:	4622      	mov	r2, r4
 800705e:	215d      	movs	r1, #93	; 0x5d
 8007060:	4811      	ldr	r0, [pc, #68]	; (80070a8 <N_Divider_Reg_Create+0x88>)
 8007062:	f002 fa55 	bl	8009510 <iprintf>
    for(i = 14; i < 22; i++){
        if(_INT & 0x01)
            ret += shift_bit << i;
 8007066:	2301      	movs	r3, #1
        if(_INT & 0x01)
 8007068:	07f2      	lsls	r2, r6, #31
            ret += shift_bit << i;
 800706a:	bf48      	it	mi
 800706c:	fa03 f205 	lslmi.w	r2, r3, r5
 8007070:	f105 0501 	add.w	r5, r5, #1
 8007074:	bf48      	it	mi
 8007076:	18a4      	addmi	r4, r4, r2
    for(i = 14; i < 22; i++){
 8007078:	2d16      	cmp	r5, #22
        _INT = _INT >> 1;
 800707a:	ea4f 0656 	mov.w	r6, r6, lsr #1
    for(i = 14; i < 22; i++){
 800707e:	d1f3      	bne.n	8007068 <N_Divider_Reg_Create+0x48>
    }  
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
 8007080:	4622      	mov	r2, r4
 8007082:	2163      	movs	r1, #99	; 0x63
 8007084:	4808      	ldr	r0, [pc, #32]	; (80070a8 <N_Divider_Reg_Create+0x88>)
 8007086:	f002 fa43 	bl	8009510 <iprintf>
    if(_FASTLOCK & 0x01)
 800708a:	f018 0f01 	tst.w	r8, #1
            ret += shift_bit << i;
 800708e:	bf18      	it	ne
 8007090:	f504 0480 	addne.w	r4, r4, #4194304	; 0x400000
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007094:	4622      	mov	r2, r4
 8007096:	2166      	movs	r1, #102	; 0x66
 8007098:	4803      	ldr	r0, [pc, #12]	; (80070a8 <N_Divider_Reg_Create+0x88>)
 800709a:	f002 fa39 	bl	8009510 <iprintf>

    return ret;
}
 800709e:	4620      	mov	r0, r4
 80070a0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80070a4:	0800b808 	.word	0x0800b808
 80070a8:	0800b81e 	.word	0x0800b81e

080070ac <R_Divider_Reg_Create>:
uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){
 80070ac:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 80070b0:	4605      	mov	r5, r0
 80070b2:	460c      	mov	r4, r1
 80070b4:	4690      	mov	r8, r2
    uint32_t ret = 0;
    uint32_t shift_bit = 0x01;
    uint8_t control_bit = 1;
    uint8_t i = 0;
    printf("_MOD : %d INT : %d \r\n",_MOD,_RCOUNTER);
 80070b6:	460a      	mov	r2, r1
 80070b8:	4601      	mov	r1, r0
 80070ba:	4826      	ldr	r0, [pc, #152]	; (8007154 <R_Divider_Reg_Create+0xa8>)
uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){
 80070bc:	461f      	mov	r7, r3
 80070be:	f89d 6018 	ldrb.w	r6, [sp, #24]
    printf("_MOD : %d INT : %d \r\n",_MOD,_RCOUNTER);
 80070c2:	f002 fa25 	bl	8009510 <iprintf>

    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 80070c6:	2200      	movs	r2, #0
 80070c8:	2171      	movs	r1, #113	; 0x71
 80070ca:	4823      	ldr	r0, [pc, #140]	; (8007158 <R_Divider_Reg_Create+0xac>)
 80070cc:	f002 fa20 	bl	8009510 <iprintf>
    for(i = 0; i < 2; i++){
        if(control_bit & 0x01)
            ret += shift_bit << i;
        control_bit = control_bit >> 1;
    }
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 80070d0:	2201      	movs	r2, #1
 80070d2:	2177      	movs	r1, #119	; 0x77
 80070d4:	4820      	ldr	r0, [pc, #128]	; (8007158 <R_Divider_Reg_Create+0xac>)
 80070d6:	f002 fa1b 	bl	8009510 <iprintf>
 80070da:	2001      	movs	r0, #1
 80070dc:	2202      	movs	r2, #2
    for(i = 2; i < 14; i++){
        if(_MOD & 0x01)
            ret += shift_bit << i;
 80070de:	4603      	mov	r3, r0
        if(_MOD & 0x01)
 80070e0:	07e9      	lsls	r1, r5, #31
            ret += shift_bit << i;
 80070e2:	bf48      	it	mi
 80070e4:	fa03 f102 	lslmi.w	r1, r3, r2
 80070e8:	f102 0201 	add.w	r2, r2, #1
 80070ec:	bf48      	it	mi
 80070ee:	1840      	addmi	r0, r0, r1
    for(i = 2; i < 14; i++){
 80070f0:	2a0e      	cmp	r2, #14
        _MOD = _MOD >> 1;
 80070f2:	ea4f 0555 	mov.w	r5, r5, lsr #1
    for(i = 2; i < 14; i++){
 80070f6:	d1f3      	bne.n	80070e0 <R_Divider_Reg_Create+0x34>
    }
    for(i = 14; i < 18; i++){
        if(_RCOUNTER & 0x01)
            ret += shift_bit << i;
 80070f8:	2301      	movs	r3, #1
        if(_RCOUNTER & 0x01)
 80070fa:	07e1      	lsls	r1, r4, #31
            ret += shift_bit << i;
 80070fc:	bf48      	it	mi
 80070fe:	fa03 f102 	lslmi.w	r1, r3, r2
 8007102:	f102 0201 	add.w	r2, r2, #1
 8007106:	bf48      	it	mi
 8007108:	1840      	addmi	r0, r0, r1
    for(i = 14; i < 18; i++){
 800710a:	2a12      	cmp	r2, #18
        _RCOUNTER = _RCOUNTER >> 1;
 800710c:	ea4f 0454 	mov.w	r4, r4, lsr #1
    for(i = 14; i < 18; i++){
 8007110:	d1f3      	bne.n	80070fa <R_Divider_Reg_Create+0x4e>
    }  
    if(_PRESCALER & 0x01)
 8007112:	f018 0f01 	tst.w	r8, #1
            ret += shift_bit << i++;
 8007116:	bf1c      	itt	ne
 8007118:	f500 2080 	addne.w	r0, r0, #262144	; 0x40000
 800711c:	2213      	movne	r2, #19
    if(_RESERVED & 0x01)
 800711e:	07fd      	lsls	r5, r7, #31
            ret += shift_bit << i++;
 8007120:	bf42      	ittt	mi
 8007122:	2301      	movmi	r3, #1
 8007124:	fa03 f202 	lslmi.w	r2, r3, r2
 8007128:	1880      	addmi	r0, r0, r2
    for(i = 19; i < 22; i++){
        if(_MUXOUT & 0x01)
 800712a:	07f4      	lsls	r4, r6, #31
            ret += shift_bit << i;
 800712c:	bf48      	it	mi
 800712e:	f500 2000 	addmi.w	r0, r0, #524288	; 0x80000
        _MUXOUT = _MUXOUT >> 1;
    }   
    if(LOAD_CONTROL & 0x01)
 8007132:	f89d 301c 	ldrb.w	r3, [sp, #28]
        if(_MUXOUT & 0x01)
 8007136:	07b1      	lsls	r1, r6, #30
            ret += shift_bit << i;
 8007138:	bf48      	it	mi
 800713a:	f500 1080 	addmi.w	r0, r0, #1048576	; 0x100000
        if(_MUXOUT & 0x01)
 800713e:	0772      	lsls	r2, r6, #29
            ret += shift_bit << i;
 8007140:	bf48      	it	mi
 8007142:	f500 1000 	addmi.w	r0, r0, #2097152	; 0x200000
    if(LOAD_CONTROL & 0x01)
 8007146:	07db      	lsls	r3, r3, #31
        ret += shift_bit << i++;
 8007148:	bf48      	it	mi
 800714a:	f500 0080 	addmi.w	r0, r0, #4194304	; 0x400000

    return ret;
}
 800714e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8007152:	bf00      	nop
 8007154:	0800b836 	.word	0x0800b836
 8007158:	0800b81e 	.word	0x0800b81e

0800715c <ADF4153_Freq_Calc>:

ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
 800715c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007160:	4616      	mov	r6, r2
    adf4153_st temp_adf4153;
    double temp = 0;
    ADF4153_R_N_Reg_st temp_reg;
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 8007162:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
 8007166:	b087      	sub	sp, #28
 8007168:	f89d a048 	ldrb.w	sl, [sp, #72]	; 0x48
 800716c:	461f      	mov	r7, r3
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 800716e:	fb02 f20a 	mul.w	r2, r2, sl
ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
 8007172:	4605      	mov	r5, r0
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 8007174:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
 8007178:	17d3      	asrs	r3, r2, #31
 800717a:	f7fd ffdb 	bl	8005134 <__aeabi_uldivmod>
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 800717e:	9a13      	ldr	r2, [sp, #76]	; 0x4c
 8007180:	2300      	movs	r3, #0
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 8007182:	4680      	mov	r8, r0
 8007184:	4689      	mov	r9, r1
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 8007186:	f7fd ffd5 	bl	8005134 <__aeabi_uldivmod>
 800718a:	ebc0 1440 	rsb	r4, r0, r0, lsl #5
    temp_adf4153.N_Value    =  N_Reg_Value_Calc(((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)));
 800718e:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
 8007192:	2300      	movs	r3, #0
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 8007194:	eb00 0484 	add.w	r4, r0, r4, lsl #2
    temp_adf4153.N_Value    =  N_Reg_Value_Calc(((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)));
 8007198:	4639      	mov	r1, r7
 800719a:	4630      	mov	r0, r6
 800719c:	f7fd ffca 	bl	8005134 <__aeabi_uldivmod>
 80071a0:	f7fd f9cc 	bl	800453c <__aeabi_ul2d>
 80071a4:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
 80071a8:	4606      	mov	r6, r0
 80071aa:	460f      	mov	r7, r1
 80071ac:	2300      	movs	r3, #0
 80071ae:	4640      	mov	r0, r8
 80071b0:	4649      	mov	r1, r9
 80071b2:	f7fd ffbf 	bl	8005134 <__aeabi_uldivmod>
 80071b6:	f7fd f9c1 	bl	800453c <__aeabi_ul2d>
 80071ba:	4602      	mov	r2, r0
 80071bc:	460b      	mov	r3, r1
 80071be:	4630      	mov	r0, r6
 80071c0:	4639      	mov	r1, r7
 80071c2:	f7fd fb1b 	bl	80047fc <__aeabi_ddiv>
    return  val / 1000;
 80071c6:	2200      	movs	r2, #0
 80071c8:	4b5c      	ldr	r3, [pc, #368]	; (800733c <ADF4153_Freq_Calc+0x1e0>)
 80071ca:	f7fd fb17 	bl	80047fc <__aeabi_ddiv>
 80071ce:	4689      	mov	r9, r1
 80071d0:	4680      	mov	r8, r0
    temp_adf4153.INT_Value  =   temp_adf4153.N_Value ;
 80071d2:	f7fd fcc1 	bl	8004b58 <__aeabi_d2uiz>
 80071d6:	fa1f fb80 	uxth.w	fp, r0
    printf("\r\ntemp_adf4153.N_Value : %f  temp_adf4153.INT_Value : %f  temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value);
 80071da:	4658      	mov	r0, fp
 80071dc:	f7fd f96e 	bl	80044bc <__aeabi_ui2d>
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 80071e0:	00e4      	lsls	r4, r4, #3
 80071e2:	b2a4      	uxth	r4, r4
    printf("\r\ntemp_adf4153.N_Value : %f  temp_adf4153.INT_Value : %f  temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value);
 80071e4:	4606      	mov	r6, r0
 80071e6:	4620      	mov	r0, r4
 80071e8:	460f      	mov	r7, r1
 80071ea:	f7fd f967 	bl	80044bc <__aeabi_ui2d>
 80071ee:	460b      	mov	r3, r1
 80071f0:	4602      	mov	r2, r0
 80071f2:	e9cd 0104 	strd	r0, r1, [sp, #16]
 80071f6:	e9cd 2302 	strd	r2, r3, [sp, #8]
 80071fa:	e9cd 6700 	strd	r6, r7, [sp]
 80071fe:	4642      	mov	r2, r8
 8007200:	464b      	mov	r3, r9
 8007202:	484f      	ldr	r0, [pc, #316]	; (8007340 <ADF4153_Freq_Calc+0x1e4>)
 8007204:	f002 f984 	bl	8009510 <iprintf>
    temp = temp_adf4153.N_Value - (double)temp_adf4153.INT_Value;
 8007208:	4632      	mov	r2, r6
 800720a:	463b      	mov	r3, r7
 800720c:	4640      	mov	r0, r8
 800720e:	4649      	mov	r1, r9
 8007210:	f7fd f816 	bl	8004240 <__aeabi_dsub>
 8007214:	4606      	mov	r6, r0
 8007216:	460f      	mov	r7, r1
    printf("\r\n temp_adf4153.N_Value - (double)temp_adf4153.INT_Value) : %f  temp * (double)temp_adf4153.MOD_Value : %f \r\n",temp,temp * (double)temp_adf4153.MOD_Value);
 8007218:	4602      	mov	r2, r0
 800721a:	460b      	mov	r3, r1
 800721c:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 8007220:	f7fd f9c2 	bl	80045a8 <__aeabi_dmul>
 8007224:	4632      	mov	r2, r6
 8007226:	463b      	mov	r3, r7
 8007228:	e9cd 0100 	strd	r0, r1, [sp]
 800722c:	4845      	ldr	r0, [pc, #276]	; (8007344 <ADF4153_Freq_Calc+0x1e8>)
 800722e:	f002 f96f 	bl	8009510 <iprintf>
    temp_adf4153.FRAC_Value =  (float)temp * temp_adf4153.MOD_Value;
 8007232:	4620      	mov	r0, r4
 8007234:	f7fd fdba 	bl	8004dac <__aeabi_i2f>
 8007238:	4639      	mov	r1, r7
 800723a:	9004      	str	r0, [sp, #16]
 800723c:	4630      	mov	r0, r6
 800723e:	f7fd fcab 	bl	8004b98 <__aeabi_d2f>
 8007242:	9b04      	ldr	r3, [sp, #16]
 8007244:	4601      	mov	r1, r0
 8007246:	4618      	mov	r0, r3
 8007248:	f7fd fe04 	bl	8004e54 <__aeabi_fmul>
 800724c:	f7fd ff52 	bl	80050f4 <__aeabi_f2uiz>
   
    printf("\r\ntemp_adf4153.N_Value : %x   : %f ",temp_adf4153.N_Value,((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)) / 1000);
 8007250:	e9cd 8900 	strd	r8, r9, [sp]
 8007254:	4642      	mov	r2, r8
 8007256:	464b      	mov	r3, r9
    temp_adf4153.FRAC_Value =  (float)temp * temp_adf4153.MOD_Value;
 8007258:	4606      	mov	r6, r0
    printf("\r\ntemp_adf4153.N_Value : %x   : %f ",temp_adf4153.N_Value,((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)) / 1000);
 800725a:	483b      	ldr	r0, [pc, #236]	; (8007348 <ADF4153_Freq_Calc+0x1ec>)
 800725c:	f002 f958 	bl	8009510 <iprintf>
    printf("temp_adf4153.MOD_Value : %x   : %d \r\n",temp_adf4153.MOD_Value,temp_adf4153.MOD_Value);
 8007260:	4622      	mov	r2, r4
 8007262:	4621      	mov	r1, r4
 8007264:	4839      	ldr	r0, [pc, #228]	; (800734c <ADF4153_Freq_Calc+0x1f0>)
 8007266:	f002 f953 	bl	8009510 <iprintf>
    uint16_t tempmod = temp_adf4153.FRAC_Value;
 800726a:	270c      	movs	r7, #12
 800726c:	fa1f f886 	uxth.w	r8, r6
    for(uint8_t i = 0; i < 12; i++){
        if(temp_adf4153.MOD_Value & 0x800){
 8007270:	f404 6900 	and.w	r9, r4, #2048	; 0x800
 8007274:	f1b9 0f00 	cmp.w	r9, #0
 8007278:	d05d      	beq.n	8007336 <ADF4153_Freq_Calc+0x1da>
            printf("1");
 800727a:	2031      	movs	r0, #49	; 0x31
 800727c:	3f01      	subs	r7, #1
        }else{
            printf("0");
 800727e:	f002 f95f 	bl	8009540 <putchar>
    for(uint8_t i = 0; i < 12; i++){
 8007282:	f017 07ff 	ands.w	r7, r7, #255	; 0xff
 8007286:	d1f5      	bne.n	8007274 <ADF4153_Freq_Calc+0x118>
        }
        tempmod = tempmod << 1;
    }
    printf("\r\n");
 8007288:	4831      	ldr	r0, [pc, #196]	; (8007350 <ADF4153_Freq_Calc+0x1f4>)
 800728a:	f002 f9c9 	bl	8009620 <puts>
    printf("temp_adf4153.FRAC_Value : %x   : %d\r\n",temp_adf4153.FRAC_Value,temp_adf4153.FRAC_Value);
 800728e:	4632      	mov	r2, r6
 8007290:	4631      	mov	r1, r6
 8007292:	4830      	ldr	r0, [pc, #192]	; (8007354 <ADF4153_Freq_Calc+0x1f8>)
 8007294:	f002 f93c 	bl	8009510 <iprintf>
    uint16_t tempfrac = temp_adf4153.FRAC_Value;
 8007298:	4647      	mov	r7, r8
    printf("temp_adf4153.FRAC_Value : %x   : %d\r\n",temp_adf4153.FRAC_Value,temp_adf4153.FRAC_Value);
 800729a:	260c      	movs	r6, #12
    for(uint8_t i = 0; i < 12; i++){
        if(tempfrac & 0x800){
 800729c:	053a      	lsls	r2, r7, #20
            printf("1");
 800729e:	bf4c      	ite	mi
 80072a0:	2031      	movmi	r0, #49	; 0x31
        }else{
            printf("0");
 80072a2:	2030      	movpl	r0, #48	; 0x30
 80072a4:	3e01      	subs	r6, #1
 80072a6:	f002 f94b 	bl	8009540 <putchar>
        }
        tempfrac = tempfrac << 1;
 80072aa:	007f      	lsls	r7, r7, #1
    for(uint8_t i = 0; i < 12; i++){
 80072ac:	f016 06ff 	ands.w	r6, r6, #255	; 0xff
        tempfrac = tempfrac << 1;
 80072b0:	b2bf      	uxth	r7, r7
    for(uint8_t i = 0; i < 12; i++){
 80072b2:	d1f3      	bne.n	800729c <ADF4153_Freq_Calc+0x140>
    }
    printf("\r\n");    
 80072b4:	4826      	ldr	r0, [pc, #152]	; (8007350 <ADF4153_Freq_Calc+0x1f4>)
 80072b6:	f002 f9b3 	bl	8009620 <puts>
    printf("temp_adf4153.INT_Value : %x   : %d\r\n",temp_adf4153.INT_Value,temp_adf4153.INT_Value); 
 80072ba:	465a      	mov	r2, fp
 80072bc:	4659      	mov	r1, fp
 80072be:	4826      	ldr	r0, [pc, #152]	; (8007358 <ADF4153_Freq_Calc+0x1fc>)
 80072c0:	f002 f926 	bl	8009510 <iprintf>
    uint16_t tempint = temp_adf4153.INT_Value;
 80072c4:	465f      	mov	r7, fp
    printf("temp_adf4153.INT_Value : %x   : %d\r\n",temp_adf4153.INT_Value,temp_adf4153.INT_Value); 
 80072c6:	2609      	movs	r6, #9
    for(uint8_t i = 0; i < 9; i++){
        if(tempint & 0x100){
 80072c8:	05fb      	lsls	r3, r7, #23
            printf("1");
 80072ca:	bf4c      	ite	mi
 80072cc:	2031      	movmi	r0, #49	; 0x31
        }else{
            printf("0");
 80072ce:	2030      	movpl	r0, #48	; 0x30
 80072d0:	3e01      	subs	r6, #1
 80072d2:	f002 f935 	bl	8009540 <putchar>
        }
        tempint = tempint << 1;
 80072d6:	007f      	lsls	r7, r7, #1
    for(uint8_t i = 0; i < 9; i++){
 80072d8:	f016 06ff 	ands.w	r6, r6, #255	; 0xff
        tempint = tempint << 1;
 80072dc:	b2bf      	uxth	r7, r7
    for(uint8_t i = 0; i < 9; i++){
 80072de:	d1f3      	bne.n	80072c8 <ADF4153_Freq_Calc+0x16c>
    }
    printf("\r\n");    
 80072e0:	481b      	ldr	r0, [pc, #108]	; (8007350 <ADF4153_Freq_Calc+0x1f4>)
 80072e2:	f002 f99d 	bl	8009620 <puts>

    printf("R0: %x  R1: %x \r\n",N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0),R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0));   
 80072e6:	4632      	mov	r2, r6
 80072e8:	4659      	mov	r1, fp
 80072ea:	4640      	mov	r0, r8
 80072ec:	f7ff fe98 	bl	8007020 <N_Divider_Reg_Create>
 80072f0:	2702      	movs	r7, #2
 80072f2:	4633      	mov	r3, r6
 80072f4:	4681      	mov	r9, r0
 80072f6:	4651      	mov	r1, sl
 80072f8:	9601      	str	r6, [sp, #4]
 80072fa:	9700      	str	r7, [sp, #0]
 80072fc:	2201      	movs	r2, #1
 80072fe:	4620      	mov	r0, r4
 8007300:	f7ff fed4 	bl	80070ac <R_Divider_Reg_Create>
 8007304:	4649      	mov	r1, r9
 8007306:	4602      	mov	r2, r0
 8007308:	4814      	ldr	r0, [pc, #80]	; (800735c <ADF4153_Freq_Calc+0x200>)
 800730a:	f002 f901 	bl	8009510 <iprintf>
    temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0);
 800730e:	4632      	mov	r2, r6
 8007310:	4659      	mov	r1, fp
 8007312:	4640      	mov	r0, r8
 8007314:	f7ff fe84 	bl	8007020 <N_Divider_Reg_Create>
    temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0);
 8007318:	9601      	str	r6, [sp, #4]
    temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0);
 800731a:	4680      	mov	r8, r0
    temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0);
 800731c:	9700      	str	r7, [sp, #0]
 800731e:	4633      	mov	r3, r6
 8007320:	2201      	movs	r2, #1
 8007322:	4651      	mov	r1, sl
 8007324:	4620      	mov	r0, r4
 8007326:	f7ff fec1 	bl	80070ac <R_Divider_Reg_Create>

    return temp_reg;
 800732a:	e885 0101 	stmia.w	r5, {r0, r8}
//    R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,1,0); //prescaler 1 : 8/9 0: 4/5
}
 800732e:	4628      	mov	r0, r5
 8007330:	b007      	add	sp, #28
 8007332:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
            printf("0");
 8007336:	2030      	movs	r0, #48	; 0x30
 8007338:	e7a0      	b.n	800727c <ADF4153_Freq_Calc+0x120>
 800733a:	bf00      	nop
 800733c:	408f4000 	.word	0x408f4000
 8007340:	0800b673 	.word	0x0800b673
 8007344:	0800b6cc 	.word	0x0800b6cc
 8007348:	0800b73a 	.word	0x0800b73a
 800734c:	0800b75e 	.word	0x0800b75e
 8007350:	0800b9de 	.word	0x0800b9de
 8007354:	0800b784 	.word	0x0800b784
 8007358:	0800b7aa 	.word	0x0800b7aa
 800735c:	0800b7cf 	.word	0x0800b7cf

08007360 <ADF4153_Module_Ctrl>:

void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
 8007360:	b084      	sub	sp, #16
 8007362:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007366:	b087      	sub	sp, #28
 8007368:	ac10      	add	r4, sp, #64	; 0x40
 800736a:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
    R3  = R3  & 0x0007FF;
 800736e:	9b19      	ldr	r3, [sp, #100]	; 0x64
 8007370:	f8bd 6044 	ldrh.w	r6, [sp, #68]	; 0x44
 8007374:	f3c3 0a0a 	ubfx	sl, r3, #0, #11
    R2 = R2 & 0x00FFFF;
 8007378:	f8bd 3060 	ldrh.w	r3, [sp, #96]	; 0x60
 800737c:	9f12      	ldr	r7, [sp, #72]	; 0x48
 800737e:	9303      	str	r3, [sp, #12]
    R1 = R1 & 0xFFFFFF;
 8007380:	9b17      	ldr	r3, [sp, #92]	; 0x5c
 8007382:	f8bd 804c 	ldrh.w	r8, [sp, #76]	; 0x4c
 8007386:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 800738a:	9304      	str	r3, [sp, #16]
    R0 = R0 & 0xFFFFFF;
 800738c:	9b16      	ldr	r3, [sp, #88]	; 0x58
 800738e:	9c14      	ldr	r4, [sp, #80]	; 0x50
 8007390:	f8bd 5054 	ldrh.w	r5, [sp, #84]	; 0x54
//    ADF4153_Freq_Calc(3461500000,40000000,2,5000);
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007394:	2200      	movs	r2, #0
 8007396:	4631      	mov	r1, r6
    R0 = R0 & 0xFFFFFF;
 8007398:	f023 4b7f 	bic.w	fp, r3, #4278190080	; 0xff000000
 800739c:	4681      	mov	r9, r0
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 800739e:	f7fe fcf7 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80073a2:	2200      	movs	r2, #0
 80073a4:	4641      	mov	r1, r8
 80073a6:	4638      	mov	r0, r7
 80073a8:	f7fe fcf2 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80073ac:	2200      	movs	r2, #0
 80073ae:	4629      	mov	r1, r5
 80073b0:	4620      	mov	r0, r4
 80073b2:	f7fe fced 	bl	8005d90 <HAL_GPIO_WritePin>
    printf("YJ :R0: %x  R1:  %x   R2 : %x R3 : %x ",R0,R1,R2,R3);
 80073b6:	9b03      	ldr	r3, [sp, #12]
 80073b8:	9a04      	ldr	r2, [sp, #16]
 80073ba:	4659      	mov	r1, fp
 80073bc:	f8cd a000 	str.w	sl, [sp]
 80073c0:	487b      	ldr	r0, [pc, #492]	; (80075b0 <ADF4153_Module_Ctrl+0x250>)
 80073c2:	f002 f8a5 	bl	8009510 <iprintf>
    printf("\r\n");
 80073c6:	487b      	ldr	r0, [pc, #492]	; (80075b4 <ADF4153_Module_Ctrl+0x254>)
 80073c8:	f002 f92a 	bl	8009620 <puts>
 80073cc:	230b      	movs	r3, #11
 80073ce:	9305      	str	r3, [sp, #20]
    /*   R3 Ctrl    */
    for(int i =0; i < 11; i++){
        if(R3 & 0x000400){
 80073d0:	f41a 6280 	ands.w	r2, sl, #1024	; 0x400
 80073d4:	f000 80d4 	beq.w	8007580 <ADF4153_Module_Ctrl+0x220>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 80073d8:	4638      	mov	r0, r7
 80073da:	2201      	movs	r2, #1
 80073dc:	4641      	mov	r1, r8
 80073de:	f7fe fcd7 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("1");
 80073e2:	2031      	movs	r0, #49	; 0x31
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
            printf("0");
 80073e4:	f002 f8ac 	bl	8009540 <putchar>
        }
        Pol_Delay_us(10);
 80073e8:	200a      	movs	r0, #10
 80073ea:	f000 f991 	bl	8007710 <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 80073ee:	2201      	movs	r2, #1
 80073f0:	4631      	mov	r1, r6
 80073f2:	4648      	mov	r0, r9
 80073f4:	f7fe fccc 	bl	8005d90 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 80073f8:	200a      	movs	r0, #10
 80073fa:	f000 f989 	bl	8007710 <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 80073fe:	2200      	movs	r2, #0
 8007400:	4631      	mov	r1, r6
 8007402:	4648      	mov	r0, r9
 8007404:	f7fe fcc4 	bl	8005d90 <HAL_GPIO_WritePin>
    for(int i =0; i < 11; i++){
 8007408:	9b05      	ldr	r3, [sp, #20]
        R3 = (R3 << 1);
 800740a:	ea4f 0a4a 	mov.w	sl, sl, lsl #1
    for(int i =0; i < 11; i++){
 800740e:	3b01      	subs	r3, #1
 8007410:	9305      	str	r3, [sp, #20]
 8007412:	d1dd      	bne.n	80073d0 <ADF4153_Module_Ctrl+0x70>
    }
    printf("\r\n");
 8007414:	4867      	ldr	r0, [pc, #412]	; (80075b4 <ADF4153_Module_Ctrl+0x254>)
 8007416:	f002 f903 	bl	8009620 <puts>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 800741a:	2201      	movs	r2, #1
 800741c:	4629      	mov	r1, r5
 800741e:	4620      	mov	r0, r4
 8007420:	f7fe fcb6 	bl	8005d90 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 8007424:	200a      	movs	r0, #10
 8007426:	f000 f973 	bl	8007710 <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800742a:	9a05      	ldr	r2, [sp, #20]
 800742c:	4629      	mov	r1, r5
 800742e:	4620      	mov	r0, r4
 8007430:	f7fe fcae 	bl	8005d90 <HAL_GPIO_WritePin>
 8007434:	f04f 0a10 	mov.w	sl, #16
    
    /*   R2 Ctrl    */
     for(int i =0; i < 16; i++){
         if(R2 & 0x008000){
 8007438:	9b03      	ldr	r3, [sp, #12]
 800743a:	f413 4200 	ands.w	r2, r3, #32768	; 0x8000
 800743e:	f000 80a5 	beq.w	800758c <ADF4153_Module_Ctrl+0x22c>
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007442:	4638      	mov	r0, r7
 8007444:	2201      	movs	r2, #1
 8007446:	4641      	mov	r1, r8
 8007448:	f7fe fca2 	bl	8005d90 <HAL_GPIO_WritePin>
             printf("1");
 800744c:	2031      	movs	r0, #49	; 0x31
         }
         else{
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
             printf("0");
 800744e:	f002 f877 	bl	8009540 <putchar>
         }
         Pol_Delay_us(10);
 8007452:	200a      	movs	r0, #10
 8007454:	f000 f95c 	bl	8007710 <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007458:	2201      	movs	r2, #1
 800745a:	4631      	mov	r1, r6
 800745c:	4648      	mov	r0, r9
 800745e:	f7fe fc97 	bl	8005d90 <HAL_GPIO_WritePin>
         Pol_Delay_us(10);
 8007462:	200a      	movs	r0, #10
 8007464:	f000 f954 	bl	8007710 <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007468:	2200      	movs	r2, #0
 800746a:	4631      	mov	r1, r6
 800746c:	4648      	mov	r0, r9
 800746e:	f7fe fc8f 	bl	8005d90 <HAL_GPIO_WritePin>

         R2 = ((R2 << 1) & 0x00FFFF);
 8007472:	9b03      	ldr	r3, [sp, #12]
     for(int i =0; i < 16; i++){
 8007474:	f1ba 0a01 	subs.w	sl, sl, #1
         R2 = ((R2 << 1) & 0x00FFFF);
 8007478:	ea4f 0343 	mov.w	r3, r3, lsl #1
 800747c:	b29b      	uxth	r3, r3
 800747e:	9303      	str	r3, [sp, #12]
     for(int i =0; i < 16; i++){
 8007480:	d1da      	bne.n	8007438 <ADF4153_Module_Ctrl+0xd8>
     }
     printf("\r\n");
 8007482:	484c      	ldr	r0, [pc, #304]	; (80075b4 <ADF4153_Module_Ctrl+0x254>)
 8007484:	f002 f8cc 	bl	8009620 <puts>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007488:	2201      	movs	r2, #1
 800748a:	4629      	mov	r1, r5
 800748c:	4620      	mov	r0, r4
 800748e:	f7fe fc7f 	bl	8005d90 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 8007492:	200a      	movs	r0, #10
 8007494:	f000 f93c 	bl	8007710 <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007498:	4652      	mov	r2, sl
 800749a:	4629      	mov	r1, r5
 800749c:	4620      	mov	r0, r4
 800749e:	f7fe fc77 	bl	8005d90 <HAL_GPIO_WritePin>
 80074a2:	f04f 0a18 	mov.w	sl, #24
    
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
 80074a6:	9b04      	ldr	r3, [sp, #16]
 80074a8:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
 80074ac:	d074      	beq.n	8007598 <ADF4153_Module_Ctrl+0x238>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 80074ae:	4638      	mov	r0, r7
 80074b0:	2201      	movs	r2, #1
 80074b2:	4641      	mov	r1, r8
 80074b4:	f7fe fc6c 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("1");
 80074b8:	2031      	movs	r0, #49	; 0x31
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
            printf("0");
 80074ba:	f002 f841 	bl	8009540 <putchar>
        }
        Pol_Delay_us(10);
 80074be:	200a      	movs	r0, #10
 80074c0:	f000 f926 	bl	8007710 <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 80074c4:	2201      	movs	r2, #1
 80074c6:	4631      	mov	r1, r6
 80074c8:	4648      	mov	r0, r9
 80074ca:	f7fe fc61 	bl	8005d90 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 80074ce:	200a      	movs	r0, #10
 80074d0:	f000 f91e 	bl	8007710 <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 80074d4:	2200      	movs	r2, #0
 80074d6:	4631      	mov	r1, r6
 80074d8:	4648      	mov	r0, r9
 80074da:	f7fe fc59 	bl	8005d90 <HAL_GPIO_WritePin>

        R1 = ((R1 << 1) & 0xFFFFFF);
 80074de:	9b04      	ldr	r3, [sp, #16]
    for(int i =0; i < 24; i++){
 80074e0:	f1ba 0a01 	subs.w	sl, sl, #1
        R1 = ((R1 << 1) & 0xFFFFFF);
 80074e4:	ea4f 0343 	mov.w	r3, r3, lsl #1
 80074e8:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 80074ec:	9304      	str	r3, [sp, #16]
    for(int i =0; i < 24; i++){
 80074ee:	d1da      	bne.n	80074a6 <ADF4153_Module_Ctrl+0x146>
    }
    printf("\r\n");
 80074f0:	4830      	ldr	r0, [pc, #192]	; (80075b4 <ADF4153_Module_Ctrl+0x254>)
 80074f2:	f002 f895 	bl	8009620 <puts>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 80074f6:	2201      	movs	r2, #1
 80074f8:	4629      	mov	r1, r5
 80074fa:	4620      	mov	r0, r4
 80074fc:	f7fe fc48 	bl	8005d90 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 8007500:	200a      	movs	r0, #10
 8007502:	f000 f905 	bl	8007710 <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007506:	4652      	mov	r2, sl
 8007508:	4629      	mov	r1, r5
 800750a:	4620      	mov	r0, r4
 800750c:	f7fe fc40 	bl	8005d90 <HAL_GPIO_WritePin>
 8007510:	f04f 0a18 	mov.w	sl, #24


        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
 8007514:	f41b 0200 	ands.w	r2, fp, #8388608	; 0x800000
 8007518:	d044      	beq.n	80075a4 <ADF4153_Module_Ctrl+0x244>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 800751a:	4638      	mov	r0, r7
 800751c:	2201      	movs	r2, #1
 800751e:	4641      	mov	r1, r8
 8007520:	f7fe fc36 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("1");
 8007524:	2031      	movs	r0, #49	; 0x31
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
            printf("0");
 8007526:	f002 f80b 	bl	8009540 <putchar>
        }
        Pol_Delay_us(10);
 800752a:	200a      	movs	r0, #10
 800752c:	f000 f8f0 	bl	8007710 <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007530:	2201      	movs	r2, #1
 8007532:	4631      	mov	r1, r6
 8007534:	4648      	mov	r0, r9
 8007536:	f7fe fc2b 	bl	8005d90 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 800753a:	200a      	movs	r0, #10
 800753c:	f000 f8e8 	bl	8007710 <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007540:	2200      	movs	r2, #0
 8007542:	4631      	mov	r1, r6
 8007544:	4648      	mov	r0, r9
 8007546:	f7fe fc23 	bl	8005d90 <HAL_GPIO_WritePin>

        R0 = ((R0 << 1) & 0xFFFFFF);
 800754a:	ea4f 034b 	mov.w	r3, fp, lsl #1
    for(int i =0; i < 24; i++){
 800754e:	f1ba 0a01 	subs.w	sl, sl, #1
        R0 = ((R0 << 1) & 0xFFFFFF);
 8007552:	f023 4b7f 	bic.w	fp, r3, #4278190080	; 0xff000000
    for(int i =0; i < 24; i++){
 8007556:	d1dd      	bne.n	8007514 <ADF4153_Module_Ctrl+0x1b4>
    }
    printf("\r\n");
 8007558:	4816      	ldr	r0, [pc, #88]	; (80075b4 <ADF4153_Module_Ctrl+0x254>)
 800755a:	f002 f861 	bl	8009620 <puts>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 800755e:	4629      	mov	r1, r5
 8007560:	2201      	movs	r2, #1
 8007562:	4620      	mov	r0, r4
 8007564:	f7fe fc14 	bl	8005d90 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8007568:	200a      	movs	r0, #10
 800756a:	f000 f8d1 	bl	8007710 <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800756e:	4652      	mov	r2, sl
 8007570:	4629      	mov	r1, r5
 8007572:	4620      	mov	r0, r4

}
 8007574:	b007      	add	sp, #28
 8007576:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800757a:	b004      	add	sp, #16
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800757c:	f7fe bc08 	b.w	8005d90 <HAL_GPIO_WritePin>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007580:	4638      	mov	r0, r7
 8007582:	4641      	mov	r1, r8
 8007584:	f7fe fc04 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("0");
 8007588:	2030      	movs	r0, #48	; 0x30
 800758a:	e72b      	b.n	80073e4 <ADF4153_Module_Ctrl+0x84>
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800758c:	4638      	mov	r0, r7
 800758e:	4641      	mov	r1, r8
 8007590:	f7fe fbfe 	bl	8005d90 <HAL_GPIO_WritePin>
             printf("0");
 8007594:	2030      	movs	r0, #48	; 0x30
 8007596:	e75a      	b.n	800744e <ADF4153_Module_Ctrl+0xee>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007598:	4638      	mov	r0, r7
 800759a:	4641      	mov	r1, r8
 800759c:	f7fe fbf8 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("0");
 80075a0:	2030      	movs	r0, #48	; 0x30
 80075a2:	e78a      	b.n	80074ba <ADF4153_Module_Ctrl+0x15a>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80075a4:	4638      	mov	r0, r7
 80075a6:	4641      	mov	r1, r8
 80075a8:	f7fe fbf2 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("0");
 80075ac:	2030      	movs	r0, #48	; 0x30
 80075ae:	e7ba      	b.n	8007526 <ADF4153_Module_Ctrl+0x1c6>
 80075b0:	0800b7e1 	.word	0x0800b7e1
 80075b4:	0800b9de 	.word	0x0800b9de

080075b8 <Power_ON_OFF_Ctrl>:
 */
#include "includes.h"


void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
    switch(type){
 80075b8:	3840      	subs	r0, #64	; 0x40
void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
 80075ba:	b510      	push	{r4, lr}
 80075bc:	460c      	mov	r4, r1
    switch(type){
 80075be:	280d      	cmp	r0, #13
 80075c0:	d873      	bhi.n	80076aa <Power_ON_OFF_Ctrl+0xf2>
 80075c2:	e8df f000 	tbb	[pc, r0]
 80075c6:	1207      	.short	0x1207
 80075c8:	2d262019 	.word	0x2d262019
 80075cc:	3d413935 	.word	0x3d413935
 80075d0:	45454545 	.word	0x45454545
        case INDEX_PATH_EN_1_8G_DL  : 
            if(cmd)
 80075d4:	b139      	cbz	r1, 80075e6 <Power_ON_OFF_Ctrl+0x2e>
                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET);
 80075d6:	2201      	movs	r2, #1
            else
                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
 80075d8:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80075dc:	4836      	ldr	r0, [pc, #216]	; (80076b8 <Power_ON_OFF_Ctrl+0x100>)
        printf("Function : %s LINE : %d   ERROR \r\n",__func__,__LINE__);
    break;

    }

}
 80075de:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
 80075e2:	f7fe bbd5 	b.w	8005d90 <HAL_GPIO_WritePin>
 80075e6:	460a      	mov	r2, r1
 80075e8:	e7f6      	b.n	80075d8 <Power_ON_OFF_Ctrl+0x20>
            if(cmd)
 80075ea:	b119      	cbz	r1, 80075f4 <Power_ON_OFF_Ctrl+0x3c>
                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET);
 80075ec:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
 80075ee:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 80075f2:	e7f3      	b.n	80075dc <Power_ON_OFF_Ctrl+0x24>
 80075f4:	460a      	mov	r2, r1
 80075f6:	e7fa      	b.n	80075ee <Power_ON_OFF_Ctrl+0x36>
            if(cmd)
 80075f8:	b119      	cbz	r1, 8007602 <Power_ON_OFF_Ctrl+0x4a>
                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET);
 80075fa:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);                
 80075fc:	2101      	movs	r1, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
 80075fe:	482f      	ldr	r0, [pc, #188]	; (80076bc <Power_ON_OFF_Ctrl+0x104>)
 8007600:	e7ed      	b.n	80075de <Power_ON_OFF_Ctrl+0x26>
                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);                
 8007602:	460a      	mov	r2, r1
 8007604:	e7fa      	b.n	80075fc <Power_ON_OFF_Ctrl+0x44>
            if(cmd)
 8007606:	b111      	cbz	r1, 800760e <Power_ON_OFF_Ctrl+0x56>
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET);
 8007608:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
 800760a:	2102      	movs	r1, #2
 800760c:	e7f7      	b.n	80075fe <Power_ON_OFF_Ctrl+0x46>
 800760e:	460a      	mov	r2, r1
 8007610:	e7fb      	b.n	800760a <Power_ON_OFF_Ctrl+0x52>
            if(cmd)
 8007612:	b119      	cbz	r1, 800761c <Power_ON_OFF_Ctrl+0x64>
                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);
 8007614:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
 8007616:	2180      	movs	r1, #128	; 0x80
 8007618:	4829      	ldr	r0, [pc, #164]	; (80076c0 <Power_ON_OFF_Ctrl+0x108>)
 800761a:	e7e0      	b.n	80075de <Power_ON_OFF_Ctrl+0x26>
 800761c:	460a      	mov	r2, r1
 800761e:	e7fa      	b.n	8007616 <Power_ON_OFF_Ctrl+0x5e>
            if(cmd)
 8007620:	b121      	cbz	r1, 800762c <Power_ON_OFF_Ctrl+0x74>
                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET);
 8007622:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
 8007624:	f44f 7100 	mov.w	r1, #512	; 0x200
            HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
 8007628:	4826      	ldr	r0, [pc, #152]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 800762a:	e7d8      	b.n	80075de <Power_ON_OFF_Ctrl+0x26>
                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
 800762c:	460a      	mov	r2, r1
 800762e:	e7f9      	b.n	8007624 <Power_ON_OFF_Ctrl+0x6c>
            HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET);
 8007630:	2201      	movs	r2, #1
 8007632:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007636:	e7f7      	b.n	8007628 <Power_ON_OFF_Ctrl+0x70>
            HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
 8007638:	2201      	movs	r2, #1
 800763a:	f44f 6100 	mov.w	r1, #2048	; 0x800
 800763e:	e7f3      	b.n	8007628 <Power_ON_OFF_Ctrl+0x70>
            HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
 8007640:	2201      	movs	r2, #1
 8007642:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007646:	e7c9      	b.n	80075dc <Power_ON_OFF_Ctrl+0x24>
            HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
 8007648:	2201      	movs	r2, #1
 800764a:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 800764e:	e7c5      	b.n	80075dc <Power_ON_OFF_Ctrl+0x24>
            if(cmd){
 8007650:	b1d1      	cbz	r1, 8007688 <Power_ON_OFF_Ctrl+0xd0>
                HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
 8007652:	2200      	movs	r2, #0
 8007654:	2120      	movs	r1, #32
 8007656:	481b      	ldr	r0, [pc, #108]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 8007658:	f7fe fb9a 	bl	8005d90 <HAL_GPIO_WritePin>
                HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
 800765c:	2200      	movs	r2, #0
 800765e:	2140      	movs	r1, #64	; 0x40
 8007660:	4818      	ldr	r0, [pc, #96]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 8007662:	f7fe fb95 	bl	8005d90 <HAL_GPIO_WritePin>
                HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
 8007666:	2201      	movs	r2, #1
 8007668:	2180      	movs	r1, #128	; 0x80
 800766a:	4816      	ldr	r0, [pc, #88]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 800766c:	f7fe fb90 	bl	8005d90 <HAL_GPIO_WritePin>
                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);                
 8007670:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET);                
 8007672:	f44f 7180 	mov.w	r1, #256	; 0x100
 8007676:	4813      	ldr	r0, [pc, #76]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 8007678:	f7fe fb8a 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("TDD SYNC OPERATE ; %d\r\n",cmd);
 800767c:	4621      	mov	r1, r4
}
 800767e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
            printf("TDD SYNC OPERATE ; %d\r\n",cmd);
 8007682:	4811      	ldr	r0, [pc, #68]	; (80076c8 <Power_ON_OFF_Ctrl+0x110>)
 8007684:	f001 bf44 	b.w	8009510 <iprintf>
                HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_SET);
 8007688:	2201      	movs	r2, #1
 800768a:	2120      	movs	r1, #32
 800768c:	480d      	ldr	r0, [pc, #52]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 800768e:	f7fe fb7f 	bl	8005d90 <HAL_GPIO_WritePin>
                HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_SET);
 8007692:	2201      	movs	r2, #1
 8007694:	2140      	movs	r1, #64	; 0x40
 8007696:	480b      	ldr	r0, [pc, #44]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 8007698:	f7fe fb7a 	bl	8005d90 <HAL_GPIO_WritePin>
                HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_RESET);
 800769c:	4622      	mov	r2, r4
 800769e:	2180      	movs	r1, #128	; 0x80
 80076a0:	4808      	ldr	r0, [pc, #32]	; (80076c4 <Power_ON_OFF_Ctrl+0x10c>)
 80076a2:	f7fe fb75 	bl	8005d90 <HAL_GPIO_WritePin>
                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET);                
 80076a6:	4622      	mov	r2, r4
 80076a8:	e7e3      	b.n	8007672 <Power_ON_OFF_Ctrl+0xba>
        printf("Function : %s LINE : %d   ERROR \r\n",__func__,__LINE__);
 80076aa:	2251      	movs	r2, #81	; 0x51
}
 80076ac:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
        printf("Function : %s LINE : %d   ERROR \r\n",__func__,__LINE__);
 80076b0:	4906      	ldr	r1, [pc, #24]	; (80076cc <Power_ON_OFF_Ctrl+0x114>)
 80076b2:	4807      	ldr	r0, [pc, #28]	; (80076d0 <Power_ON_OFF_Ctrl+0x118>)
 80076b4:	f001 bf2c 	b.w	8009510 <iprintf>
 80076b8:	40011000 	.word	0x40011000
 80076bc:	40011800 	.word	0x40011800
 80076c0:	40011400 	.word	0x40011400
 80076c4:	40012000 	.word	0x40012000
 80076c8:	0800b84c 	.word	0x0800b84c
 80076cc:	0800b887 	.word	0x0800b887
 80076d0:	0800b864 	.word	0x0800b864

080076d4 <HAL_TIM_PeriodElapsedCallback>:

#if 1 // PYJ.2019.07.26_BEGIN --

void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
    if(htim->Instance == TIM6){
 80076d4:	6802      	ldr	r2, [r0, #0]
 80076d6:	4b06      	ldr	r3, [pc, #24]	; (80076f0 <HAL_TIM_PeriodElapsedCallback+0x1c>)
 80076d8:	429a      	cmp	r2, r3
 80076da:	d107      	bne.n	80076ec <HAL_TIM_PeriodElapsedCallback+0x18>
        UartTimerCnt++;
 80076dc:	4a05      	ldr	r2, [pc, #20]	; (80076f4 <HAL_TIM_PeriodElapsedCallback+0x20>)
 80076de:	6813      	ldr	r3, [r2, #0]
 80076e0:	3301      	adds	r3, #1
 80076e2:	6013      	str	r3, [r2, #0]
        LedTimerCnt++;
 80076e4:	4a04      	ldr	r2, [pc, #16]	; (80076f8 <HAL_TIM_PeriodElapsedCallback+0x24>)
 80076e6:	6813      	ldr	r3, [r2, #0]
 80076e8:	3301      	adds	r3, #1
 80076ea:	6013      	str	r3, [r2, #0]
 80076ec:	4770      	bx	lr
 80076ee:	bf00      	nop
 80076f0:	40001000 	.word	0x40001000
 80076f4:	20000424 	.word	0x20000424
 80076f8:	20000420 	.word	0x20000420

080076fc <_write>:
    }
} 
#endif // PYJ.2019.07.26_END -- 
int _write (int file, uint8_t *ptr, uint16_t len)
{
 80076fc:	b510      	push	{r4, lr}
 80076fe:	4614      	mov	r4, r2
    HAL_UART_Transmit(&huart1, ptr, len,10);
 8007700:	230a      	movs	r3, #10
 8007702:	4802      	ldr	r0, [pc, #8]	; (800770c <_write+0x10>)
 8007704:	f7ff f892 	bl	800682c <HAL_UART_Transmit>
    return len;
}
 8007708:	4620      	mov	r0, r4
 800770a:	bd10      	pop	{r4, pc}
 800770c:	2000053c 	.word	0x2000053c

08007710 <Pol_Delay_us>:
void Pol_Delay_us(volatile uint32_t microseconds)
{
  /* Go to number of cycles for system */
  microseconds *= (SystemCoreClock / 1000000);
 8007710:	4a08      	ldr	r2, [pc, #32]	; (8007734 <Pol_Delay_us+0x24>)
 8007712:	4909      	ldr	r1, [pc, #36]	; (8007738 <Pol_Delay_us+0x28>)
 8007714:	6812      	ldr	r2, [r2, #0]
{
 8007716:	b082      	sub	sp, #8
  microseconds *= (SystemCoreClock / 1000000);
 8007718:	fbb2 f2f1 	udiv	r2, r2, r1
{
 800771c:	9001      	str	r0, [sp, #4]
  microseconds *= (SystemCoreClock / 1000000);
 800771e:	9b01      	ldr	r3, [sp, #4]
 8007720:	4353      	muls	r3, r2
 8007722:	9301      	str	r3, [sp, #4]
 
  /* Delay till end */
  while (microseconds--);
 8007724:	9b01      	ldr	r3, [sp, #4]
 8007726:	1e5a      	subs	r2, r3, #1
 8007728:	9201      	str	r2, [sp, #4]
 800772a:	2b00      	cmp	r3, #0
 800772c:	d1fa      	bne.n	8007724 <Pol_Delay_us+0x14>
}
 800772e:	b002      	add	sp, #8
 8007730:	4770      	bx	lr
 8007732:	bf00      	nop
 8007734:	20000200 	.word	0x20000200
 8007738:	000f4240 	.word	0x000f4240

0800773c <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 800773c:	b510      	push	{r4, lr}
 800773e:	b096      	sub	sp, #88	; 0x58
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8007740:	2228      	movs	r2, #40	; 0x28
 8007742:	2100      	movs	r1, #0
 8007744:	a80c      	add	r0, sp, #48	; 0x30
 8007746:	f001 fa7a 	bl	8008c3e <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 800774a:	2214      	movs	r2, #20
 800774c:	2100      	movs	r1, #0
 800774e:	a801      	add	r0, sp, #4
 8007750:	f001 fa75 	bl	8008c3e <memset>
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 8007754:	2218      	movs	r2, #24
 8007756:	2100      	movs	r1, #0
 8007758:	eb0d 0002 	add.w	r0, sp, r2
 800775c:	f001 fa6f 	bl	8008c3e <memset>

  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8007760:	2301      	movs	r3, #1
 8007762:	9310      	str	r3, [sp, #64]	; 0x40
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8007764:	2310      	movs	r3, #16
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8007766:	2402      	movs	r4, #2
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8007768:	9311      	str	r3, [sp, #68]	; 0x44
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
 800776a:	f44f 1350 	mov.w	r3, #3407872	; 0x340000
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 800776e:	a80c      	add	r0, sp, #48	; 0x30
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
 8007770:	9315      	str	r3, [sp, #84]	; 0x54
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8007772:	940c      	str	r4, [sp, #48]	; 0x30
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8007774:	9413      	str	r4, [sp, #76]	; 0x4c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8007776:	f7fe fb15 	bl	8005da4 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 800777a:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 800777c:	f44f 6280 	mov.w	r2, #1024	; 0x400
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8007780:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8007782:	2300      	movs	r3, #0
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8007784:	4621      	mov	r1, r4
 8007786:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8007788:	9303      	str	r3, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 800778a:	9204      	str	r2, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 800778c:	9305      	str	r3, [sp, #20]
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 800778e:	9402      	str	r4, [sp, #8]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8007790:	f7fe fcd0 	bl	8006134 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
 8007794:	f44f 4300 	mov.w	r3, #32768	; 0x8000
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 8007798:	a806      	add	r0, sp, #24
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
 800779a:	9406      	str	r4, [sp, #24]
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
 800779c:	9308      	str	r3, [sp, #32]
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 800779e:	f7fe fd9b 	bl	80062d8 <HAL_RCCEx_PeriphCLKConfig>
  {
    Error_Handler();
  }
}
 80077a2:	b016      	add	sp, #88	; 0x58
 80077a4:	bd10      	pop	{r4, pc}
	...

080077a8 <main>:
{
 80077a8:	e92d 4880 	stmdb	sp!, {r7, fp, lr}
 80077ac:	b0b7      	sub	sp, #220	; 0xdc
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80077ae:	ad30      	add	r5, sp, #192	; 0xc0

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 80077b0:	4fbe      	ldr	r7, [pc, #760]	; (8007aac <main+0x304>)
  HAL_Init();
 80077b2:	f7fd fe6b 	bl	800548c <HAL_Init>
  SystemClock_Config();
 80077b6:	f7ff ffc1 	bl	800773c <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80077ba:	2210      	movs	r2, #16
 80077bc:	2100      	movs	r1, #0
 80077be:	4628      	mov	r0, r5
 80077c0:	f001 fa3d 	bl	8008c3e <memset>
  __HAL_RCC_GPIOE_CLK_ENABLE();
 80077c4:	69bb      	ldr	r3, [r7, #24]
  __HAL_RCC_GPIOB_CLK_ENABLE();
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOG_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 80077c6:	2200      	movs	r2, #0
  __HAL_RCC_GPIOE_CLK_ENABLE();
 80077c8:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 80077cc:	61bb      	str	r3, [r7, #24]
 80077ce:	69bb      	ldr	r3, [r7, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 80077d0:	217f      	movs	r1, #127	; 0x7f
  __HAL_RCC_GPIOE_CLK_ENABLE();
 80077d2:	f003 0340 	and.w	r3, r3, #64	; 0x40
 80077d6:	9309      	str	r3, [sp, #36]	; 0x24
 80077d8:	9b09      	ldr	r3, [sp, #36]	; 0x24
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80077da:	69bb      	ldr	r3, [r7, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 80077dc:	48b4      	ldr	r0, [pc, #720]	; (8007ab0 <main+0x308>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80077de:	f043 0310 	orr.w	r3, r3, #16
 80077e2:	61bb      	str	r3, [r7, #24]
 80077e4:	69bb      	ldr	r3, [r7, #24]
  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80077e6:	2400      	movs	r4, #0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80077e8:	f003 0310 	and.w	r3, r3, #16
 80077ec:	930a      	str	r3, [sp, #40]	; 0x28
 80077ee:	9b0a      	ldr	r3, [sp, #40]	; 0x28
  __HAL_RCC_GPIOF_CLK_ENABLE();
 80077f0:	69bb      	ldr	r3, [r7, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80077f2:	2601      	movs	r6, #1
  __HAL_RCC_GPIOF_CLK_ENABLE();
 80077f4:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80077f8:	61bb      	str	r3, [r7, #24]
 80077fa:	69bb      	ldr	r3, [r7, #24]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80077fc:	f04f 0802 	mov.w	r8, #2
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8007800:	f003 0380 	and.w	r3, r3, #128	; 0x80
 8007804:	930b      	str	r3, [sp, #44]	; 0x2c
 8007806:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8007808:	69bb      	ldr	r3, [r7, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);

  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 800780a:	f04f 0a0c 	mov.w	sl, #12
  __HAL_RCC_GPIOA_CLK_ENABLE();
 800780e:	f043 0304 	orr.w	r3, r3, #4
 8007812:	61bb      	str	r3, [r7, #24]
 8007814:	69bb      	ldr	r3, [r7, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);

  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
 8007816:	f44f 4b00 	mov.w	fp, #32768	; 0x8000
  __HAL_RCC_GPIOA_CLK_ENABLE();
 800781a:	f003 0304 	and.w	r3, r3, #4
 800781e:	930c      	str	r3, [sp, #48]	; 0x30
 8007820:	9b0c      	ldr	r3, [sp, #48]	; 0x30
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8007822:	69bb      	ldr	r3, [r7, #24]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);

  /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */
  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8007824:	f04f 0903 	mov.w	r9, #3
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8007828:	f043 0308 	orr.w	r3, r3, #8
 800782c:	61bb      	str	r3, [r7, #24]
 800782e:	69bb      	ldr	r3, [r7, #24]
 8007830:	f003 0308 	and.w	r3, r3, #8
 8007834:	930d      	str	r3, [sp, #52]	; 0x34
 8007836:	9b0d      	ldr	r3, [sp, #52]	; 0x34
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8007838:	69bb      	ldr	r3, [r7, #24]
 800783a:	f043 0320 	orr.w	r3, r3, #32
 800783e:	61bb      	str	r3, [r7, #24]
 8007840:	69bb      	ldr	r3, [r7, #24]
 8007842:	f003 0320 	and.w	r3, r3, #32
 8007846:	930e      	str	r3, [sp, #56]	; 0x38
 8007848:	9b0e      	ldr	r3, [sp, #56]	; 0x38
  __HAL_RCC_GPIOG_CLK_ENABLE();
 800784a:	69bb      	ldr	r3, [r7, #24]
 800784c:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8007850:	61bb      	str	r3, [r7, #24]
 8007852:	69bb      	ldr	r3, [r7, #24]
 8007854:	f403 7380 	and.w	r3, r3, #256	; 0x100
 8007858:	930f      	str	r3, [sp, #60]	; 0x3c
 800785a:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 800785c:	f7fe fa98 	bl	8005d90 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 8007860:	2200      	movs	r2, #0
 8007862:	f64f 41c0 	movw	r1, #64704	; 0xfcc0
 8007866:	4893      	ldr	r0, [pc, #588]	; (8007ab4 <main+0x30c>)
 8007868:	f7fe fa92 	bl	8005d90 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 800786c:	2200      	movs	r2, #0
 800786e:	f240 31f3 	movw	r1, #1011	; 0x3f3
 8007872:	4891      	ldr	r0, [pc, #580]	; (8007ab8 <main+0x310>)
 8007874:	f7fe fa8c 	bl	8005d90 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 8007878:	2200      	movs	r2, #0
 800787a:	f648 71ff 	movw	r1, #36863	; 0x8fff
 800787e:	488f      	ldr	r0, [pc, #572]	; (8007abc <main+0x314>)
 8007880:	f7fe fa86 	bl	8005d90 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 8007884:	2200      	movs	r2, #0
 8007886:	f647 51fc 	movw	r1, #32252	; 0x7dfc
 800788a:	488d      	ldr	r0, [pc, #564]	; (8007ac0 <main+0x318>)
 800788c:	f7fe fa80 	bl	8005d90 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
 8007890:	2200      	movs	r2, #0
 8007892:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007896:	488b      	ldr	r0, [pc, #556]	; (8007ac4 <main+0x31c>)
 8007898:	f7fe fa7a 	bl	8005d90 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
 800789c:	2200      	movs	r2, #0
 800789e:	2118      	movs	r1, #24
 80078a0:	4889      	ldr	r0, [pc, #548]	; (8007ac8 <main+0x320>)
 80078a2:	f7fe fa75 	bl	8005d90 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 80078a6:	237f      	movs	r3, #127	; 0x7f
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80078a8:	4629      	mov	r1, r5
 80078aa:	4881      	ldr	r0, [pc, #516]	; (8007ab0 <main+0x308>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 80078ac:	9330      	str	r3, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80078ae:	9631      	str	r6, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80078b0:	9432      	str	r4, [sp, #200]	; 0xc8
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80078b2:	f8cd 80cc 	str.w	r8, [sp, #204]	; 0xcc
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80078b6:	f7fe f97f 	bl	8005bb8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 80078ba:	f64f 43c0 	movw	r3, #64704	; 0xfcc0
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80078be:	4629      	mov	r1, r5
 80078c0:	487c      	ldr	r0, [pc, #496]	; (8007ab4 <main+0x30c>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 80078c2:	9330      	str	r3, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80078c4:	9631      	str	r6, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80078c6:	9432      	str	r4, [sp, #200]	; 0xc8
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80078c8:	f8cd 80cc 	str.w	r8, [sp, #204]	; 0xcc
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80078cc:	f7fe f974 	bl	8005bb8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 80078d0:	f240 33f3 	movw	r3, #1011	; 0x3f3
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 80078d4:	4629      	mov	r1, r5
 80078d6:	4878      	ldr	r0, [pc, #480]	; (8007ab8 <main+0x310>)
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 80078d8:	9330      	str	r3, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80078da:	9631      	str	r6, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80078dc:	9432      	str	r4, [sp, #200]	; 0xc8
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80078de:	f8cd 80cc 	str.w	r8, [sp, #204]	; 0xcc
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 80078e2:	f7fe f969 	bl	8005bb8 <HAL_GPIO_Init>
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 80078e6:	4629      	mov	r1, r5
 80078e8:	4873      	ldr	r0, [pc, #460]	; (8007ab8 <main+0x310>)
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 80078ea:	f8cd a0c0 	str.w	sl, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80078ee:	9431      	str	r4, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80078f0:	9432      	str	r4, [sp, #200]	; 0xc8
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 80078f2:	f7fe f961 	bl	8005bb8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 80078f6:	f648 73ff 	movw	r3, #36863	; 0x8fff
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80078fa:	4629      	mov	r1, r5
 80078fc:	486f      	ldr	r0, [pc, #444]	; (8007abc <main+0x314>)
  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 80078fe:	9330      	str	r3, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007900:	9631      	str	r6, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007902:	9432      	str	r4, [sp, #200]	; 0xc8
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007904:	f8cd 80cc 	str.w	r8, [sp, #204]	; 0xcc
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8007908:	f7fe f956 	bl	8005bb8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 800790c:	f44f 5340 	mov.w	r3, #12288	; 0x3000
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8007910:	4629      	mov	r1, r5
 8007912:	486a      	ldr	r0, [pc, #424]	; (8007abc <main+0x314>)
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 8007914:	9330      	str	r3, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007916:	9431      	str	r4, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007918:	9432      	str	r4, [sp, #200]	; 0xc8
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 800791a:	f7fe f94d 	bl	8005bb8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 800791e:	f647 53fc 	movw	r3, #32252	; 0x7dfc
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 8007922:	4629      	mov	r1, r5
 8007924:	4866      	ldr	r0, [pc, #408]	; (8007ac0 <main+0x318>)
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 8007926:	9330      	str	r3, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007928:	9631      	str	r6, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800792a:	9432      	str	r4, [sp, #200]	; 0xc8
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800792c:	f8cd 80cc 	str.w	r8, [sp, #204]	; 0xcc
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 8007930:	f7fe f942 	bl	8005bb8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 8007934:	f44f 7340 	mov.w	r3, #768	; 0x300
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8007938:	4629      	mov	r1, r5
 800793a:	485e      	ldr	r0, [pc, #376]	; (8007ab4 <main+0x30c>)
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 800793c:	9330      	str	r3, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 800793e:	9431      	str	r4, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007940:	9432      	str	r4, [sp, #200]	; 0xc8
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8007942:	f7fe f939 	bl	8005bb8 <HAL_GPIO_Init>
  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
 8007946:	4629      	mov	r1, r5
 8007948:	485e      	ldr	r0, [pc, #376]	; (8007ac4 <main+0x31c>)
  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
 800794a:	f8cd b0c0 	str.w	fp, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800794e:	9631      	str	r6, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007950:	9432      	str	r4, [sp, #200]	; 0xc8
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007952:	f8cd 80cc 	str.w	r8, [sp, #204]	; 0xcc
  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
 8007956:	f7fe f92f 	bl	8005bb8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
 800795a:	f44f 7300 	mov.w	r3, #512	; 0x200
  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
 800795e:	4629      	mov	r1, r5
 8007960:	4857      	ldr	r0, [pc, #348]	; (8007ac0 <main+0x318>)
  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
 8007962:	9330      	str	r3, [sp, #192]	; 0xc0
 8007964:	9307      	str	r3, [sp, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8007966:	f8cd 90c4 	str.w	r9, [sp, #196]	; 0xc4
  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
 800796a:	f7fe f925 	bl	8005bb8 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 800796e:	2218      	movs	r2, #24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007970:	4629      	mov	r1, r5
 8007972:	4855      	ldr	r0, [pc, #340]	; (8007ac8 <main+0x320>)
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 8007974:	9230      	str	r2, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007976:	9631      	str	r6, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007978:	9432      	str	r4, [sp, #200]	; 0xc8
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800797a:	f8cd 80cc 	str.w	r8, [sp, #204]	; 0xcc
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800797e:	f7fe f91b 	bl	8005bb8 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 8007982:	2260      	movs	r2, #96	; 0x60
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007984:	4629      	mov	r1, r5
 8007986:	4850      	ldr	r0, [pc, #320]	; (8007ac8 <main+0x320>)
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 8007988:	9230      	str	r2, [sp, #192]	; 0xc0
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 800798a:	9431      	str	r4, [sp, #196]	; 0xc4
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800798c:	9432      	str	r4, [sp, #200]	; 0xc8
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800798e:	f7fe f913 	bl	8005bb8 <HAL_GPIO_Init>
  __HAL_RCC_DMA1_CLK_ENABLE();
 8007992:	697a      	ldr	r2, [r7, #20]
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 8007994:	4621      	mov	r1, r4
  __HAL_RCC_DMA1_CLK_ENABLE();
 8007996:	4332      	orrs	r2, r6
 8007998:	617a      	str	r2, [r7, #20]
 800799a:	697a      	ldr	r2, [r7, #20]
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 800799c:	200b      	movs	r0, #11
  __HAL_RCC_DMA1_CLK_ENABLE();
 800799e:	4032      	ands	r2, r6
 80079a0:	9208      	str	r2, [sp, #32]
 80079a2:	9a08      	ldr	r2, [sp, #32]
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 80079a4:	4622      	mov	r2, r4
 80079a6:	f7fd fee9 	bl	800577c <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
 80079aa:	200b      	movs	r0, #11
 80079ac:	f7fd ff1a 	bl	80057e4 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
 80079b0:	4621      	mov	r1, r4
 80079b2:	4622      	mov	r2, r4
 80079b4:	200f      	movs	r0, #15
 80079b6:	f7fd fee1 	bl	800577c <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
 80079ba:	200f      	movs	r0, #15
  hadc1.Instance = ADC1;
 80079bc:	4f43      	ldr	r7, [pc, #268]	; (8007acc <main+0x324>)
  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
 80079be:	f7fd ff11 	bl	80057e4 <HAL_NVIC_EnableIRQ>
  hadc1.Instance = ADC1;
 80079c2:	4a43      	ldr	r2, [pc, #268]	; (8007ad0 <main+0x328>)
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 80079c4:	4638      	mov	r0, r7
  hadc1.Instance = ADC1;
 80079c6:	603a      	str	r2, [r7, #0]
  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
 80079c8:	f44f 7280 	mov.w	r2, #256	; 0x100
 80079cc:	60ba      	str	r2, [r7, #8]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 80079ce:	f44f 2260 	mov.w	r2, #917504	; 0xe0000
 80079d2:	61fa      	str	r2, [r7, #28]
  hadc1.Init.NbrOfConversion = 14;
 80079d4:	220e      	movs	r2, #14
  ADC_ChannelConfTypeDef sConfig = {0};
 80079d6:	606c      	str	r4, [r5, #4]
  hadc1.Init.NbrOfConversion = 14;
 80079d8:	613a      	str	r2, [r7, #16]
 80079da:	9206      	str	r2, [sp, #24]
  ADC_ChannelConfTypeDef sConfig = {0};
 80079dc:	60ac      	str	r4, [r5, #8]
  hadc1.Init.ContinuousConvMode = ENABLE;
 80079de:	60fe      	str	r6, [r7, #12]
  hadc1.Init.DiscontinuousConvMode = DISABLE;
 80079e0:	617c      	str	r4, [r7, #20]
  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 80079e2:	607c      	str	r4, [r7, #4]
  ADC_ChannelConfTypeDef sConfig = {0};
 80079e4:	9430      	str	r4, [sp, #192]	; 0xc0
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 80079e6:	f7fd fe2d 	bl	8005644 <HAL_ADC_Init>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80079ea:	4629      	mov	r1, r5
 80079ec:	4638      	mov	r0, r7
  sConfig.Channel = ADC_CHANNEL_0;
 80079ee:	9430      	str	r4, [sp, #192]	; 0xc0
  sConfig.Rank = ADC_REGULAR_RANK_1;
 80079f0:	9631      	str	r6, [sp, #196]	; 0xc4
  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
 80079f2:	9432      	str	r4, [sp, #200]	; 0xc8
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80079f4:	f7fd fd80 	bl	80054f8 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80079f8:	4629      	mov	r1, r5
 80079fa:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_2;
 80079fc:	f8cd 80c4 	str.w	r8, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a00:	f7fd fd7a 	bl	80054f8 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a04:	4629      	mov	r1, r5
 8007a06:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_3;
 8007a08:	f8cd 90c4 	str.w	r9, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a0c:	f7fd fd74 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_4;
 8007a10:	2104      	movs	r1, #4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a12:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_4;
 8007a14:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a16:	4629      	mov	r1, r5
 8007a18:	f7fd fd6e 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_5;
 8007a1c:	2105      	movs	r1, #5
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a1e:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_5;
 8007a20:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a22:	4629      	mov	r1, r5
 8007a24:	f7fd fd68 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_6;
 8007a28:	2106      	movs	r1, #6
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a2a:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_6;
 8007a2c:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a2e:	4629      	mov	r1, r5
 8007a30:	f7fd fd62 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_7;
 8007a34:	2107      	movs	r1, #7
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a36:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_7;
 8007a38:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a3a:	4629      	mov	r1, r5
 8007a3c:	f7fd fd5c 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_8;
 8007a40:	2108      	movs	r1, #8
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a42:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_8;
 8007a44:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a46:	4629      	mov	r1, r5
 8007a48:	f7fd fd56 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_9;
 8007a4c:	2109      	movs	r1, #9
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a4e:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_9;
 8007a50:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a52:	4629      	mov	r1, r5
 8007a54:	f7fd fd50 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_10;
 8007a58:	230a      	movs	r3, #10
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a5a:	4629      	mov	r1, r5
 8007a5c:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_10;
 8007a5e:	9331      	str	r3, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a60:	f7fd fd4a 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_11;
 8007a64:	210b      	movs	r1, #11
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a66:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_11;
 8007a68:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a6a:	4629      	mov	r1, r5
 8007a6c:	f7fd fd44 	bl	80054f8 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a70:	4629      	mov	r1, r5
 8007a72:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_12;
 8007a74:	f8cd a0c4 	str.w	sl, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a78:	f7fd fd3e 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_13;
 8007a7c:	210d      	movs	r1, #13
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a7e:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_13;
 8007a80:	9131      	str	r1, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a82:	4629      	mov	r1, r5
 8007a84:	f7fd fd38 	bl	80054f8 <HAL_ADC_ConfigChannel>
  sConfig.Rank = ADC_REGULAR_RANK_14;
 8007a88:	9a06      	ldr	r2, [sp, #24]
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a8a:	4629      	mov	r1, r5
 8007a8c:	4638      	mov	r0, r7
  sConfig.Rank = ADC_REGULAR_RANK_14;
 8007a8e:	9231      	str	r2, [sp, #196]	; 0xc4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007a90:	f7fd fd32 	bl	80054f8 <HAL_ADC_ConfigChannel>
  huart1.Init.BaudRate = 115200;
 8007a94:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
  huart1.Instance = USART1;
 8007a98:	4f0e      	ldr	r7, [pc, #56]	; (8007ad4 <main+0x32c>)
  huart1.Init.BaudRate = 115200;
 8007a9a:	4a0f      	ldr	r2, [pc, #60]	; (8007ad8 <main+0x330>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8007a9c:	4638      	mov	r0, r7
  huart1.Init.BaudRate = 115200;
 8007a9e:	e887 000c 	stmia.w	r7, {r2, r3}
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8007aa2:	60bc      	str	r4, [r7, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8007aa4:	60fc      	str	r4, [r7, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 8007aa6:	613c      	str	r4, [r7, #16]
 8007aa8:	e018      	b.n	8007adc <main+0x334>
 8007aaa:	bf00      	nop
 8007aac:	40021000 	.word	0x40021000
 8007ab0:	40011800 	.word	0x40011800
 8007ab4:	40011000 	.word	0x40011000
 8007ab8:	40011c00 	.word	0x40011c00
 8007abc:	40011400 	.word	0x40011400
 8007ac0:	40012000 	.word	0x40012000
 8007ac4:	40010800 	.word	0x40010800
 8007ac8:	40010c00 	.word	0x40010c00
 8007acc:	200004c8 	.word	0x200004c8
 8007ad0:	40012400 	.word	0x40012400
 8007ad4:	2000053c 	.word	0x2000053c
 8007ad8:	40013800 	.word	0x40013800
  huart1.Init.Mode = UART_MODE_TX_RX;
 8007adc:	f8c7 a014 	str.w	sl, [r7, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8007ae0:	61bc      	str	r4, [r7, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8007ae2:	61fc      	str	r4, [r7, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8007ae4:	f7fe fe74 	bl	80067d0 <HAL_UART_Init>
  htim6.Init.Period = 10;
 8007ae8:	230a      	movs	r3, #10
  htim6.Init.Prescaler = 6000-1;
 8007aea:	f241 726f 	movw	r2, #5999	; 0x176f
  htim6.Instance = TIM6;
 8007aee:	f8df a344 	ldr.w	sl, [pc, #836]	; 8007e34 <main+0x68c>
  htim6.Init.Prescaler = 6000-1;
 8007af2:	49b9      	ldr	r1, [pc, #740]	; (8007dd8 <main+0x630>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8007af4:	4650      	mov	r0, sl
  htim6.Init.Period = 10;
 8007af6:	f8ca 300c 	str.w	r3, [sl, #12]
  htim6.Init.Prescaler = 6000-1;
 8007afa:	e88a 0006 	stmia.w	sl, {r1, r2}
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8007afe:	606c      	str	r4, [r5, #4]
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8007b00:	f8ca 4008 	str.w	r4, [sl, #8]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8007b04:	f8ca 4018 	str.w	r4, [sl, #24]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8007b08:	9430      	str	r4, [sp, #192]	; 0xc0
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8007b0a:	f7fe fd4f 	bl	80065ac <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8007b0e:	4629      	mov	r1, r5
 8007b10:	4650      	mov	r0, sl
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8007b12:	9430      	str	r4, [sp, #192]	; 0xc0
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 8007b14:	9431      	str	r4, [sp, #196]	; 0xc4
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8007b16:	f7fe fd63 	bl	80065e0 <HAL_TIMEx_MasterConfigSynchronization>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 8007b1a:	4622      	mov	r2, r4
 8007b1c:	4621      	mov	r1, r4
 8007b1e:	2025      	movs	r0, #37	; 0x25
 8007b20:	f7fd fe2c 	bl	800577c <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8007b24:	2025      	movs	r0, #37	; 0x25
 8007b26:	f7fd fe5d 	bl	80057e4 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 8007b2a:	4622      	mov	r2, r4
 8007b2c:	4621      	mov	r1, r4
 8007b2e:	2036      	movs	r0, #54	; 0x36
 8007b30:	f7fd fe24 	bl	800577c <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 8007b34:	2036      	movs	r0, #54	; 0x36
 8007b36:	f7fd fe55 	bl	80057e4 <HAL_NVIC_EnableIRQ>
  setbuf(stdout, NULL);
 8007b3a:	4aa8      	ldr	r2, [pc, #672]	; (8007ddc <main+0x634>)
 8007b3c:	4621      	mov	r1, r4
 8007b3e:	6812      	ldr	r2, [r2, #0]
  PLL_Setting_st Pll_test = {
 8007b40:	4ca7      	ldr	r4, [pc, #668]	; (8007de0 <main+0x638>)
  setbuf(stdout, NULL);
 8007b42:	6890      	ldr	r0, [r2, #8]
 8007b44:	f001 fd74 	bl	8009630 <setbuf>
  printf("UART Start \r\n");
 8007b48:	48a6      	ldr	r0, [pc, #664]	; (8007de4 <main+0x63c>)
 8007b4a:	f001 fd69 	bl	8009620 <puts>
  HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1);
 8007b4e:	4632      	mov	r2, r6
 8007b50:	49a5      	ldr	r1, [pc, #660]	; (8007de8 <main+0x640>)
 8007b52:	4638      	mov	r0, r7
 8007b54:	f7fe fec6 	bl	80068e4 <HAL_UART_Receive_DMA>
  PE43711_PinInit();
 8007b58:	f7ff fa12 	bl	8006f80 <PE43711_PinInit>
    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);
 8007b5c:	4632      	mov	r2, r6
 8007b5e:	2180      	movs	r1, #128	; 0x80
 8007b60:	48a2      	ldr	r0, [pc, #648]	; (8007dec <main+0x644>)
 8007b62:	f7fe f915 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET);
 8007b66:	9b07      	ldr	r3, [sp, #28]
 8007b68:	4632      	mov	r2, r6
 8007b6a:	4619      	mov	r1, r3
 8007b6c:	48a0      	ldr	r0, [pc, #640]	; (8007df0 <main+0x648>)
 8007b6e:	f7fe f90f 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET);
 8007b72:	4632      	mov	r2, r6
 8007b74:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007b78:	489d      	ldr	r0, [pc, #628]	; (8007df0 <main+0x648>)
 8007b7a:	f7fe f909 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
 8007b7e:	4632      	mov	r2, r6
 8007b80:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8007b84:	489a      	ldr	r0, [pc, #616]	; (8007df0 <main+0x648>)
 8007b86:	f7fe f903 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);  
 8007b8a:	4632      	mov	r2, r6
 8007b8c:	2180      	movs	r1, #128	; 0x80
 8007b8e:	4897      	ldr	r0, [pc, #604]	; (8007dec <main+0x644>)
 8007b90:	f7fe f8fe 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
 8007b94:	4632      	mov	r2, r6
 8007b96:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8007b9a:	4896      	ldr	r0, [pc, #600]	; (8007df4 <main+0x64c>)
 8007b9c:	f7fe f8f8 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
 8007ba0:	4632      	mov	r2, r6
 8007ba2:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007ba6:	4893      	ldr	r0, [pc, #588]	; (8007df4 <main+0x64c>)
 8007ba8:	f7fe f8f2 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET);
 8007bac:	4632      	mov	r2, r6
 8007bae:	4631      	mov	r1, r6
 8007bb0:	4891      	ldr	r0, [pc, #580]	; (8007df8 <main+0x650>)
 8007bb2:	f7fe f8ed 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET);
 8007bb6:	4632      	mov	r2, r6
 8007bb8:	4641      	mov	r1, r8
 8007bba:	488f      	ldr	r0, [pc, #572]	; (8007df8 <main+0x650>)
 8007bbc:	f7fe f8e8 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET);
 8007bc0:	4632      	mov	r2, r6
 8007bc2:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007bc6:	488b      	ldr	r0, [pc, #556]	; (8007df4 <main+0x64c>)
 8007bc8:	f7fe f8e2 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET);
 8007bcc:	4632      	mov	r2, r6
 8007bce:	4659      	mov	r1, fp
 8007bd0:	4888      	ldr	r0, [pc, #544]	; (8007df4 <main+0x64c>)
 8007bd2:	f7fe f8dd 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8007bd6:	4630      	mov	r0, r6
 8007bd8:	f7fd fc7c 	bl	80054d4 <HAL_Delay>
  PLL_Setting_st Pll_test = {
 8007bdc:	af12      	add	r7, sp, #72	; 0x48
  printf("\r\nPLL_EN_3_5G_L_GPIO_Port\r\n");
 8007bde:	4887      	ldr	r0, [pc, #540]	; (8007dfc <main+0x654>)
 8007be0:	f001 fd1e 	bl	8009620 <puts>
  PLL_Setting_st Pll_test = {
 8007be4:	cc0f      	ldmia	r4!, {r0, r1, r2, r3}
  temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
 8007be6:	f04f 0b00 	mov.w	fp, #0
  PLL_Setting_st Pll_test = {
 8007bea:	c70f      	stmia	r7!, {r0, r1, r2, r3}
 8007bec:	e894 0003 	ldmia.w	r4, {r0, r1}
  temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
 8007bf0:	f241 3388 	movw	r3, #5000	; 0x1388
  PLL_Setting_st Pll_test = {
 8007bf4:	e887 0003 	stmia.w	r7, {r0, r1}
  ADF4153_Module_Ctrl(Pll_test,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);      
 8007bf8:	f241 37c2 	movw	r7, #5058	; 0x13c2
  temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
 8007bfc:	f8df a238 	ldr.w	sl, [pc, #568]	; 8007e38 <main+0x690>
 8007c00:	9303      	str	r3, [sp, #12]
 8007c02:	f8cd 8008 	str.w	r8, [sp, #8]
 8007c06:	a370      	add	r3, pc, #448	; (adr r3, 8007dc8 <main+0x620>)
 8007c08:	e9d3 2300 	ldrd	r2, r3, [r3]
 8007c0c:	a810      	add	r0, sp, #64	; 0x40
 8007c0e:	e9cd ab00 	strd	sl, fp, [sp]
 8007c12:	f7ff faa3 	bl	800715c <ADF4153_Freq_Calc>
  ADF4153_Module_Ctrl(Pll_test,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);      
 8007c16:	9b10      	ldr	r3, [sp, #64]	; 0x40
 8007c18:	f8cd 9014 	str.w	r9, [sp, #20]
 8007c1c:	9303      	str	r3, [sp, #12]
 8007c1e:	9b11      	ldr	r3, [sp, #68]	; 0x44
 8007c20:	9704      	str	r7, [sp, #16]
 8007c22:	9302      	str	r3, [sp, #8]
 8007c24:	ab16      	add	r3, sp, #88	; 0x58
 8007c26:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007c2a:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007c2e:	ab12      	add	r3, sp, #72	; 0x48
 8007c30:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007c32:	f7ff fb95 	bl	8007360 <ADF4153_Module_Ctrl>
  HAL_Delay(1);
 8007c36:	4630      	mov	r0, r6
 8007c38:	f7fd fc4c 	bl	80054d4 <HAL_Delay>
    printf("\r\nPLL_EN_3_5G_H_GPIO_Port\r\n");
 8007c3c:	4870      	ldr	r0, [pc, #448]	; (8007e00 <main+0x658>)
 8007c3e:	f001 fcef 	bl	8009620 <puts>
  PLL_Setting_st Pll_test2 = {
 8007c42:	f104 0c08 	add.w	ip, r4, #8
 8007c46:	f10d 0e60 	add.w	lr, sp, #96	; 0x60
 8007c4a:	e8bc 000f 	ldmia.w	ip!, {r0, r1, r2, r3}
 8007c4e:	e8ae 000f 	stmia.w	lr!, {r0, r1, r2, r3}
 8007c52:	e89c 0003 	ldmia.w	ip, {r0, r1}
    temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
 8007c56:	f241 3388 	movw	r3, #5000	; 0x1388
  PLL_Setting_st Pll_test2 = {
 8007c5a:	e88e 0003 	stmia.w	lr, {r0, r1}
    temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
 8007c5e:	f8cd 8008 	str.w	r8, [sp, #8]
  ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092);
 8007c62:	f44f 6882 	mov.w	r8, #1040	; 0x410
    temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
 8007c66:	9303      	str	r3, [sp, #12]
 8007c68:	a810      	add	r0, sp, #64	; 0x40
 8007c6a:	a359      	add	r3, pc, #356	; (adr r3, 8007dd0 <main+0x628>)
 8007c6c:	e9d3 2300 	ldrd	r2, r3, [r3]
 8007c70:	e9cd ab00 	strd	sl, fp, [sp]
 8007c74:	f7ff fa72 	bl	800715c <ADF4153_Freq_Calc>
    ADF4153_Module_Ctrl(Pll_test2,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);                  
 8007c78:	9b10      	ldr	r3, [sp, #64]	; 0x40
 8007c7a:	f8cd 9014 	str.w	r9, [sp, #20]
 8007c7e:	9303      	str	r3, [sp, #12]
 8007c80:	9b11      	ldr	r3, [sp, #68]	; 0x44
 8007c82:	9704      	str	r7, [sp, #16]
 8007c84:	9302      	str	r3, [sp, #8]
 8007c86:	ab1c      	add	r3, sp, #112	; 0x70
 8007c88:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007c8c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007c90:	ab18      	add	r3, sp, #96	; 0x60
 8007c92:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007c94:	f7ff fb64 	bl	8007360 <ADF4153_Module_Ctrl>
  HAL_Delay(1);
 8007c98:	4630      	mov	r0, r6
 8007c9a:	f7fd fc1b 	bl	80054d4 <HAL_Delay>
  printf("\r\nPLL_EN_2_1G_UL_GPIO_Port\r\n");
 8007c9e:	4859      	ldr	r0, [pc, #356]	; (8007e04 <main+0x65c>)
 8007ca0:	f001 fcbe 	bl	8009620 <puts>
  PLL_Setting_st Pll_test3 = {
 8007ca4:	af1e      	add	r7, sp, #120	; 0x78
 8007ca6:	f104 0e20 	add.w	lr, r4, #32
 8007caa:	e8be 000f 	ldmia.w	lr!, {r0, r1, r2, r3}
 8007cae:	c70f      	stmia	r7!, {r0, r1, r2, r3}
 8007cb0:	e89e 0003 	ldmia.w	lr, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092);
 8007cb4:	f8df 9184 	ldr.w	r9, [pc, #388]	; 8007e3c <main+0x694>
  PLL_Setting_st Pll_test3 = {
 8007cb8:	e887 0003 	stmia.w	r7, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092);
 8007cbc:	4b52      	ldr	r3, [pc, #328]	; (8007e08 <main+0x660>)
 8007cbe:	f8cd 9010 	str.w	r9, [sp, #16]
 8007cc2:	9303      	str	r3, [sp, #12]
 8007cc4:	f8cd 8008 	str.w	r8, [sp, #8]
 8007cc8:	ab22      	add	r3, sp, #136	; 0x88
 8007cca:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007cce:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007cd2:	ab1e      	add	r3, sp, #120	; 0x78
 8007cd4:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007cd6:	f000 f931 	bl	8007f3c <ADF4113_Module_Ctrl>
  HAL_Delay(1);
 8007cda:	4630      	mov	r0, r6
 8007cdc:	f7fd fbfa 	bl	80054d4 <HAL_Delay>
  printf("\r\nPLL_EN_2_1G_DL_GPIO_Port\r\n");
 8007ce0:	484a      	ldr	r0, [pc, #296]	; (8007e0c <main+0x664>)
 8007ce2:	f001 fc9d 	bl	8009620 <puts>
  PLL_Setting_st Pll_test4 = {
 8007ce6:	af24      	add	r7, sp, #144	; 0x90
 8007ce8:	f104 0e38 	add.w	lr, r4, #56	; 0x38
 8007cec:	e8be 000f 	ldmia.w	lr!, {r0, r1, r2, r3}
 8007cf0:	c70f      	stmia	r7!, {r0, r1, r2, r3}
 8007cf2:	e89e 0003 	ldmia.w	lr, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test4,0x410,0x4DE71,0x9F8092);
 8007cf6:	4b46      	ldr	r3, [pc, #280]	; (8007e10 <main+0x668>)
  PLL_Setting_st Pll_test4 = {
 8007cf8:	e887 0003 	stmia.w	r7, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test4,0x410,0x4DE71,0x9F8092);
 8007cfc:	9303      	str	r3, [sp, #12]
 8007cfe:	f8cd 9010 	str.w	r9, [sp, #16]
 8007d02:	f8cd 8008 	str.w	r8, [sp, #8]
 8007d06:	ab28      	add	r3, sp, #160	; 0xa0
 8007d08:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007d0c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007d10:	ab24      	add	r3, sp, #144	; 0x90
 8007d12:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007d14:	f000 f912 	bl	8007f3c <ADF4113_Module_Ctrl>
    HAL_Delay(1);
 8007d18:	4630      	mov	r0, r6
 8007d1a:	f7fd fbdb 	bl	80054d4 <HAL_Delay>
    printf("\r\nPLL_EN_1_8G_UL_GPIO_Port\r\n");
 8007d1e:	483d      	ldr	r0, [pc, #244]	; (8007e14 <main+0x66c>)
 8007d20:	f001 fc7e 	bl	8009620 <puts>
    PLL_Setting_st Pll_test5 = {
 8007d24:	af2a      	add	r7, sp, #168	; 0xa8
 8007d26:	f104 0e50 	add.w	lr, r4, #80	; 0x50
 8007d2a:	e8be 000f 	ldmia.w	lr!, {r0, r1, r2, r3}
 8007d2e:	c70f      	stmia	r7!, {r0, r1, r2, r3}
 8007d30:	e89e 0003 	ldmia.w	lr, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test5,0x000410,0x038D31,0x9f8092);
 8007d34:	4b38      	ldr	r3, [pc, #224]	; (8007e18 <main+0x670>)
    PLL_Setting_st Pll_test5 = {
 8007d36:	e887 0003 	stmia.w	r7, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test5,0x000410,0x038D31,0x9f8092);
 8007d3a:	9303      	str	r3, [sp, #12]
 8007d3c:	f8cd 9010 	str.w	r9, [sp, #16]
 8007d40:	f8cd 8008 	str.w	r8, [sp, #8]
 8007d44:	ab2e      	add	r3, sp, #184	; 0xb8
 8007d46:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007d4a:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007d4e:	ab2a      	add	r3, sp, #168	; 0xa8
 8007d50:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007d52:	f000 f8f3 	bl	8007f3c <ADF4113_Module_Ctrl>
    HAL_Delay(1);
 8007d56:	4630      	mov	r0, r6
    PLL_Setting_st Pll_test6 = {
 8007d58:	462e      	mov	r6, r5
    HAL_Delay(1);
 8007d5a:	f7fd fbbb 	bl	80054d4 <HAL_Delay>
    PLL_Setting_st Pll_test6 = {
 8007d5e:	3468      	adds	r4, #104	; 0x68
    printf("\r\nPLL_EN_1_8G_DL_GPIO_Port\r\n");
 8007d60:	482e      	ldr	r0, [pc, #184]	; (8007e1c <main+0x674>)
 8007d62:	f001 fc5d 	bl	8009620 <puts>
    PLL_Setting_st Pll_test6 = {
 8007d66:	cc0f      	ldmia	r4!, {r0, r1, r2, r3}
 8007d68:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 8007d6a:	e894 0003 	ldmia.w	r4, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test6,0x000410,0x03E801,0x9F8092);
 8007d6e:	4b2c      	ldr	r3, [pc, #176]	; (8007e20 <main+0x678>)
    PLL_Setting_st Pll_test6 = {
 8007d70:	e886 0003 	stmia.w	r6, {r0, r1}
  ADF4113_Module_Ctrl(Pll_test6,0x000410,0x03E801,0x9F8092);
 8007d74:	9303      	str	r3, [sp, #12]
 8007d76:	f8cd 9010 	str.w	r9, [sp, #16]
 8007d7a:	f8cd 8008 	str.w	r8, [sp, #8]
 8007d7e:	ab36      	add	r3, sp, #216	; 0xd8
 8007d80:	e913 0003 	ldmdb	r3, {r0, r1}
 8007d84:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007d88:	e895 000f 	ldmia.w	r5, {r0, r1, r2, r3}
 8007d8c:	f000 f8d6 	bl	8007f3c <ADF4113_Module_Ctrl>
  BDA4601_Test();
 8007d90:	f7fe ff82 	bl	8006c98 <BDA4601_Test>
    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
 8007d94:	4e16      	ldr	r6, [pc, #88]	; (8007df0 <main+0x648>)
    while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
 8007d96:	4d23      	ldr	r5, [pc, #140]	; (8007e24 <main+0x67c>)
    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
 8007d98:	4c23      	ldr	r4, [pc, #140]	; (8007e28 <main+0x680>)
 8007d9a:	6823      	ldr	r3, [r4, #0]
 8007d9c:	f5b3 7ffa 	cmp.w	r3, #500	; 0x1f4
 8007da0:	d906      	bls.n	8007db0 <main+0x608>
 8007da2:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007da6:	4630      	mov	r0, r6
 8007da8:	f7fd fff7 	bl	8005d9a <HAL_GPIO_TogglePin>
 8007dac:	2300      	movs	r3, #0
 8007dae:	6023      	str	r3, [r4, #0]
    while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
 8007db0:	4c1e      	ldr	r4, [pc, #120]	; (8007e2c <main+0x684>)
 8007db2:	4f1f      	ldr	r7, [pc, #124]	; (8007e30 <main+0x688>)
 8007db4:	68a3      	ldr	r3, [r4, #8]
 8007db6:	2b00      	cmp	r3, #0
 8007db8:	ddee      	ble.n	8007d98 <main+0x5f0>
 8007dba:	682b      	ldr	r3, [r5, #0]
 8007dbc:	2b64      	cmp	r3, #100	; 0x64
 8007dbe:	d9eb      	bls.n	8007d98 <main+0x5f0>
 8007dc0:	4638      	mov	r0, r7
 8007dc2:	f000 fb03 	bl	80083cc <GetDataFromUartQueue>
 8007dc6:	e7f5      	b.n	8007db4 <main+0x60c>
 8007dc8:	ce8f5560 	.word	0xce8f5560
 8007dcc:	00000000 	.word	0x00000000
 8007dd0:	ea83b4a0 	.word	0xea83b4a0
 8007dd4:	00000000 	.word	0x00000000
 8007dd8:	40001000 	.word	0x40001000
 8007ddc:	20000234 	.word	0x20000234
 8007de0:	0800b5c8 	.word	0x0800b5c8
 8007de4:	0800b899 	.word	0x0800b899
 8007de8:	20000a44 	.word	0x20000a44
 8007dec:	40011400 	.word	0x40011400
 8007df0:	40012000 	.word	0x40012000
 8007df4:	40011000 	.word	0x40011000
 8007df8:	40011800 	.word	0x40011800
 8007dfc:	0800b8a6 	.word	0x0800b8a6
 8007e00:	0800b8c1 	.word	0x0800b8c1
 8007e04:	0800b8dc 	.word	0x0800b8dc
 8007e08:	00059a31 	.word	0x00059a31
 8007e0c:	0800b8f8 	.word	0x0800b8f8
 8007e10:	0004de71 	.word	0x0004de71
 8007e14:	0800b914 	.word	0x0800b914
 8007e18:	00038d31 	.word	0x00038d31
 8007e1c:	0800b930 	.word	0x0800b930
 8007e20:	0003e801 	.word	0x0003e801
 8007e24:	20000424 	.word	0x20000424
 8007e28:	20000420 	.word	0x20000420
 8007e2c:	20000a38 	.word	0x20000a38
 8007e30:	2000053c 	.word	0x2000053c
 8007e34:	200005c0 	.word	0x200005c0
 8007e38:	02625a00 	.word	0x02625a00
 8007e3c:	009f8092 	.word	0x009f8092

08007e40 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8007e40:	4770      	bx	lr
	...

08007e44 <N_Counter_Latch_Create>:
    B = N_val / P;
    A = N_val -(B * P);
    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
}
uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
 8007e44:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    for(i = 0; i < 2; i++){
        if(control_bit & 0x01)
            ret += shift_bit << i;
        control_bit = control_bit >> 1;
    }
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007e48:	2401      	movs	r4, #1
uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
 8007e4a:	4607      	mov	r7, r0
 8007e4c:	460e      	mov	r6, r1
 8007e4e:	4690      	mov	r8, r2
    printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
 8007e50:	460a      	mov	r2, r1
 8007e52:	4601      	mov	r1, r0
 8007e54:	481f      	ldr	r0, [pc, #124]	; (8007ed4 <N_Counter_Latch_Create+0x90>)
 8007e56:	f001 fb5b 	bl	8009510 <iprintf>
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007e5a:	2200      	movs	r2, #0
 8007e5c:	216a      	movs	r1, #106	; 0x6a
 8007e5e:	481e      	ldr	r0, [pc, #120]	; (8007ed8 <N_Counter_Latch_Create+0x94>)
 8007e60:	f001 fb56 	bl	8009510 <iprintf>
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007e64:	2201      	movs	r2, #1
 8007e66:	2170      	movs	r1, #112	; 0x70
 8007e68:	481b      	ldr	r0, [pc, #108]	; (8007ed8 <N_Counter_Latch_Create+0x94>)
 8007e6a:	f001 fb51 	bl	8009510 <iprintf>
 8007e6e:	2502      	movs	r5, #2
    for(i = 2; i < 8; i++){
        if(_ACOUNTER & 0x01)
            ret += shift_bit << i;
 8007e70:	4623      	mov	r3, r4
        if(_ACOUNTER & 0x01)
 8007e72:	07f9      	lsls	r1, r7, #31
            ret += shift_bit << i;
 8007e74:	bf48      	it	mi
 8007e76:	fa03 f205 	lslmi.w	r2, r3, r5
 8007e7a:	f105 0501 	add.w	r5, r5, #1
 8007e7e:	bf48      	it	mi
 8007e80:	18a4      	addmi	r4, r4, r2
    for(i = 2; i < 8; i++){
 8007e82:	2d08      	cmp	r5, #8
        _ACOUNTER = _ACOUNTER >> 1;
 8007e84:	ea4f 0757 	mov.w	r7, r7, lsr #1
    for(i = 2; i < 8; i++){
 8007e88:	d1f3      	bne.n	8007e72 <N_Counter_Latch_Create+0x2e>
    }  
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007e8a:	4622      	mov	r2, r4
 8007e8c:	2176      	movs	r1, #118	; 0x76
 8007e8e:	4812      	ldr	r0, [pc, #72]	; (8007ed8 <N_Counter_Latch_Create+0x94>)
 8007e90:	f001 fb3e 	bl	8009510 <iprintf>
    for(i = 8; i < 21; i++){
        if(_BCOUNTER & 0x01)
            ret += shift_bit << i;
 8007e94:	2301      	movs	r3, #1
        if(_BCOUNTER & 0x01)
 8007e96:	07f2      	lsls	r2, r6, #31
            ret += shift_bit << i;
 8007e98:	bf48      	it	mi
 8007e9a:	fa03 f205 	lslmi.w	r2, r3, r5
 8007e9e:	f105 0501 	add.w	r5, r5, #1
 8007ea2:	bf48      	it	mi
 8007ea4:	18a4      	addmi	r4, r4, r2
    for(i = 8; i < 21; i++){
 8007ea6:	2d15      	cmp	r5, #21
        _BCOUNTER = _BCOUNTER >> 1;
 8007ea8:	ea4f 0656 	mov.w	r6, r6, lsr #1
    for(i = 8; i < 21; i++){
 8007eac:	d1f3      	bne.n	8007e96 <N_Counter_Latch_Create+0x52>
    }      
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007eae:	4622      	mov	r2, r4
 8007eb0:	217c      	movs	r1, #124	; 0x7c
 8007eb2:	4809      	ldr	r0, [pc, #36]	; (8007ed8 <N_Counter_Latch_Create+0x94>)
 8007eb4:	f001 fb2c 	bl	8009510 <iprintf>
    if(_CPGAIN & 0x01)
 8007eb8:	f018 0f01 	tst.w	r8, #1
            ret += shift_bit << i++;
 8007ebc:	bf18      	it	ne
 8007ebe:	f504 1400 	addne.w	r4, r4, #2097152	; 0x200000
    for(i = 22; i < 24; i++){
        if(reserve & 0x01)
            ret += shift_bit << i;
        reserve = reserve >> 1;
    }   
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
 8007ec2:	4622      	mov	r2, r4
 8007ec4:	2184      	movs	r1, #132	; 0x84
 8007ec6:	4804      	ldr	r0, [pc, #16]	; (8007ed8 <N_Counter_Latch_Create+0x94>)
 8007ec8:	f001 fb22 	bl	8009510 <iprintf>
    return ret;
}
 8007ecc:	4620      	mov	r0, r4
 8007ece:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8007ed2:	bf00      	nop
 8007ed4:	0800b94c 	.word	0x0800b94c
 8007ed8:	0800b81e 	.word	0x0800b81e

08007edc <halSynSetFreq>:
{
 8007edc:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
    N_val = (rf_Freq / ADF4113_CH_STEP);
 8007ede:	f24c 3550 	movw	r5, #50000	; 0xc350
 8007ee2:	fbb0 f5f5 	udiv	r5, r0, r5
    if( N_val < ADF4113_PRE8_MIN_N) { 
 8007ee6:	2d37      	cmp	r5, #55	; 0x37
 8007ee8:	d802      	bhi.n	8007ef0 <halSynSetFreq+0x14>
        return HAL_SYN_INVALID_PRESCALE; 
 8007eea:	2004      	movs	r0, #4
}
 8007eec:	b004      	add	sp, #16
 8007eee:	bd70      	pop	{r4, r5, r6, pc}
    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
 8007ef0:	4b0e      	ldr	r3, [pc, #56]	; (8007f2c <halSynSetFreq+0x50>)
    B = N_val / P;
 8007ef2:	4c0f      	ldr	r4, [pc, #60]	; (8007f30 <halSynSetFreq+0x54>)
 8007ef4:	fbb0 f4f4 	udiv	r4, r0, r4
    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
 8007ef8:	fbb0 f0f3 	udiv	r0, r0, r3
 8007efc:	f7fc ff52 	bl	8004da4 <__aeabi_ui2f>
 8007f00:	f7fc fafe 	bl	8004500 <__aeabi_f2d>
    A = N_val -(B * P);
 8007f04:	eba5 1644 	sub.w	r6, r5, r4, lsl #5
    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
 8007f08:	460b      	mov	r3, r1
 8007f0a:	4602      	mov	r2, r0
 8007f0c:	9502      	str	r5, [sp, #8]
 8007f0e:	e88d 0050 	stmia.w	sp, {r4, r6}
 8007f12:	4808      	ldr	r0, [pc, #32]	; (8007f34 <halSynSetFreq+0x58>)
 8007f14:	f001 fafc 	bl	8009510 <iprintf>
    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
 8007f18:	b2a1      	uxth	r1, r4
 8007f1a:	2200      	movs	r2, #0
 8007f1c:	b2b0      	uxth	r0, r6
 8007f1e:	f7ff ff91 	bl	8007e44 <N_Counter_Latch_Create>
 8007f22:	4601      	mov	r1, r0
 8007f24:	4804      	ldr	r0, [pc, #16]	; (8007f38 <halSynSetFreq+0x5c>)
 8007f26:	f001 faf3 	bl	8009510 <iprintf>
}
 8007f2a:	e7df      	b.n	8007eec <halSynSetFreq+0x10>
 8007f2c:	000f4240 	.word	0x000f4240
 8007f30:	00186a00 	.word	0x00186a00
 8007f34:	0800b96d 	.word	0x0800b96d
 8007f38:	0800b99d 	.word	0x0800b99d

08007f3c <ADF4113_Module_Ctrl>:
void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
 8007f3c:	b084      	sub	sp, #16
 8007f3e:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007f42:	b085      	sub	sp, #20
 8007f44:	ac0e      	add	r4, sp, #56	; 0x38
 8007f46:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
    R2 = R2 & 0xFFFFFF;
    R1 = R1 & 0xFFFFFF;
 8007f4a:	9b15      	ldr	r3, [sp, #84]	; 0x54
 8007f4c:	f8bd 703c 	ldrh.w	r7, [sp, #60]	; 0x3c
 8007f50:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007f54:	9302      	str	r3, [sp, #8]
    R0 = R0 & 0xFFFFFF;
 8007f56:	9b14      	ldr	r3, [sp, #80]	; 0x50
 8007f58:	f8dd 8040 	ldr.w	r8, [sp, #64]	; 0x40
 8007f5c:	f8bd 9044 	ldrh.w	r9, [sp, #68]	; 0x44
 8007f60:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007f64:	9d12      	ldr	r5, [sp, #72]	; 0x48
 8007f66:	f8bd 604c 	ldrh.w	r6, [sp, #76]	; 0x4c
    
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007f6a:	2200      	movs	r2, #0
 8007f6c:	4639      	mov	r1, r7
    R0 = R0 & 0xFFFFFF;
 8007f6e:	9301      	str	r3, [sp, #4]
 8007f70:	4682      	mov	sl, r0
    R2 = R2 & 0xFFFFFF;
 8007f72:	9c16      	ldr	r4, [sp, #88]	; 0x58
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007f74:	f7fd ff0c 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007f78:	2200      	movs	r2, #0
 8007f7a:	4649      	mov	r1, r9
 8007f7c:	4640      	mov	r0, r8
 8007f7e:	f7fd ff07 	bl	8005d90 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007f82:	2200      	movs	r2, #0
 8007f84:	4631      	mov	r1, r6
 8007f86:	4628      	mov	r0, r5
 8007f88:	f7fd ff02 	bl	8005d90 <HAL_GPIO_WritePin>
 8007f8c:	f04f 0b18 	mov.w	fp, #24
    R2 = R2 & 0xFFFFFF;
 8007f90:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
    /*   R2 Ctrl    */
     for(int i =0; i < 24; i++){
         if(R2 & 0x800000){
 8007f94:	f414 0200 	ands.w	r2, r4, #8388608	; 0x800000
 8007f98:	f000 8093 	beq.w	80080c2 <ADF4113_Module_Ctrl+0x186>
            printf("1");
 8007f9c:	2031      	movs	r0, #49	; 0x31
 8007f9e:	f001 facf 	bl	8009540 <putchar>
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007fa2:	2201      	movs	r2, #1
         }
         else{
            printf("0");
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007fa4:	4649      	mov	r1, r9
 8007fa6:	4640      	mov	r0, r8
 8007fa8:	f7fd fef2 	bl	8005d90 <HAL_GPIO_WritePin>
         }
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007fac:	2201      	movs	r2, #1
 8007fae:	4639      	mov	r1, r7
 8007fb0:	4650      	mov	r0, sl
 8007fb2:	f7fd feed 	bl	8005d90 <HAL_GPIO_WritePin>
         Pol_Delay_us(10);
 8007fb6:	200a      	movs	r0, #10
 8007fb8:	f7ff fbaa 	bl	8007710 <Pol_Delay_us>
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007fbc:	2200      	movs	r2, #0
 8007fbe:	4639      	mov	r1, r7
 8007fc0:	4650      	mov	r0, sl
 8007fc2:	f7fd fee5 	bl	8005d90 <HAL_GPIO_WritePin>
         R2 = ((R2 << 1) & 0xFFFFFF);
 8007fc6:	0064      	lsls	r4, r4, #1
     for(int i =0; i < 24; i++){
 8007fc8:	f1bb 0b01 	subs.w	fp, fp, #1
         R2 = ((R2 << 1) & 0xFFFFFF);
 8007fcc:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
     for(int i =0; i < 24; i++){
 8007fd0:	d1e0      	bne.n	8007f94 <ADF4113_Module_Ctrl+0x58>
     }
     printf("\r\n");
 8007fd2:	4844      	ldr	r0, [pc, #272]	; (80080e4 <ADF4113_Module_Ctrl+0x1a8>)
 8007fd4:	f001 fb24 	bl	8009620 <puts>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007fd8:	2201      	movs	r2, #1
 8007fda:	4631      	mov	r1, r6
 8007fdc:	4628      	mov	r0, r5
 8007fde:	f7fd fed7 	bl	8005d90 <HAL_GPIO_WritePin>
     Pol_Delay_us(10);
 8007fe2:	200a      	movs	r0, #10
 8007fe4:	f7ff fb94 	bl	8007710 <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007fe8:	465a      	mov	r2, fp
 8007fea:	4631      	mov	r1, r6
 8007fec:	4628      	mov	r0, r5
 8007fee:	f7fd fecf 	bl	8005d90 <HAL_GPIO_WritePin>
 8007ff2:	2418      	movs	r4, #24
        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
 8007ff4:	9b01      	ldr	r3, [sp, #4]
 8007ff6:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
 8007ffa:	d068      	beq.n	80080ce <ADF4113_Module_Ctrl+0x192>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007ffc:	4640      	mov	r0, r8
 8007ffe:	2201      	movs	r2, #1
 8008000:	4649      	mov	r1, r9
 8008002:	f7fd fec5 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("1");
 8008006:	2031      	movs	r0, #49	; 0x31
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
            printf("0");
 8008008:	f001 fa9a 	bl	8009540 <putchar>
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 800800c:	2201      	movs	r2, #1
 800800e:	4639      	mov	r1, r7
 8008010:	4650      	mov	r0, sl
 8008012:	f7fd febd 	bl	8005d90 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 8008016:	200a      	movs	r0, #10
 8008018:	f7ff fb7a 	bl	8007710 <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 800801c:	2200      	movs	r2, #0
 800801e:	4639      	mov	r1, r7
 8008020:	4650      	mov	r0, sl
 8008022:	f7fd feb5 	bl	8005d90 <HAL_GPIO_WritePin>
        R0 = ((R0 << 1) & 0xFFFFFF);
 8008026:	9b01      	ldr	r3, [sp, #4]
    for(int i =0; i < 24; i++){
 8008028:	3c01      	subs	r4, #1
        R0 = ((R0 << 1) & 0xFFFFFF);
 800802a:	ea4f 0343 	mov.w	r3, r3, lsl #1
 800802e:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008032:	9301      	str	r3, [sp, #4]
    for(int i =0; i < 24; i++){
 8008034:	d1de      	bne.n	8007ff4 <ADF4113_Module_Ctrl+0xb8>
    }  
        printf("\r\n");
 8008036:	482b      	ldr	r0, [pc, #172]	; (80080e4 <ADF4113_Module_Ctrl+0x1a8>)
 8008038:	f001 faf2 	bl	8009620 <puts>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 800803c:	2201      	movs	r2, #1
 800803e:	4631      	mov	r1, r6
 8008040:	4628      	mov	r0, r5
 8008042:	f7fd fea5 	bl	8005d90 <HAL_GPIO_WritePin>
     
     Pol_Delay_us(10);
 8008046:	200a      	movs	r0, #10
 8008048:	f7ff fb62 	bl	8007710 <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);    
 800804c:	4622      	mov	r2, r4
 800804e:	4631      	mov	r1, r6
 8008050:	4628      	mov	r0, r5
 8008052:	f7fd fe9d 	bl	8005d90 <HAL_GPIO_WritePin>
 8008056:	2418      	movs	r4, #24
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
 8008058:	9b02      	ldr	r3, [sp, #8]
 800805a:	f413 0b00 	ands.w	fp, r3, #8388608	; 0x800000
 800805e:	d03c      	beq.n	80080da <ADF4113_Module_Ctrl+0x19e>
            printf("1");
 8008060:	2031      	movs	r0, #49	; 0x31
 8008062:	f001 fa6d 	bl	8009540 <putchar>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8008066:	2201      	movs	r2, #1
        }
        else{
            printf("0");            
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8008068:	4649      	mov	r1, r9
 800806a:	4640      	mov	r0, r8
 800806c:	f7fd fe90 	bl	8005d90 <HAL_GPIO_WritePin>
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8008070:	2201      	movs	r2, #1
 8008072:	4639      	mov	r1, r7
 8008074:	4650      	mov	r0, sl
 8008076:	f7fd fe8b 	bl	8005d90 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 800807a:	200a      	movs	r0, #10
 800807c:	f7ff fb48 	bl	8007710 <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8008080:	2200      	movs	r2, #0
 8008082:	4639      	mov	r1, r7
 8008084:	4650      	mov	r0, sl
 8008086:	f7fd fe83 	bl	8005d90 <HAL_GPIO_WritePin>
        R1 = ((R1 << 1) & 0xFFFFFF);
 800808a:	9b02      	ldr	r3, [sp, #8]
    for(int i =0; i < 24; i++){
 800808c:	3c01      	subs	r4, #1
        R1 = ((R1 << 1) & 0xFFFFFF);
 800808e:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8008092:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008096:	9302      	str	r3, [sp, #8]
    for(int i =0; i < 24; i++){
 8008098:	d1de      	bne.n	8008058 <ADF4113_Module_Ctrl+0x11c>
    }
        printf("\r\n");
 800809a:	4812      	ldr	r0, [pc, #72]	; (80080e4 <ADF4113_Module_Ctrl+0x1a8>)
 800809c:	f001 fac0 	bl	8009620 <puts>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 80080a0:	4631      	mov	r1, r6
 80080a2:	2201      	movs	r2, #1
 80080a4:	4628      	mov	r0, r5
 80080a6:	f7fd fe73 	bl	8005d90 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 80080aa:	200a      	movs	r0, #10
 80080ac:	f7ff fb30 	bl	8007710 <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80080b0:	4622      	mov	r2, r4
 80080b2:	4631      	mov	r1, r6
 80080b4:	4628      	mov	r0, r5

}
 80080b6:	b005      	add	sp, #20
 80080b8:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80080bc:	b004      	add	sp, #16
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80080be:	f7fd be67 	b.w	8005d90 <HAL_GPIO_WritePin>
            printf("0");
 80080c2:	2030      	movs	r0, #48	; 0x30
 80080c4:	9203      	str	r2, [sp, #12]
 80080c6:	f001 fa3b 	bl	8009540 <putchar>
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80080ca:	9a03      	ldr	r2, [sp, #12]
 80080cc:	e76a      	b.n	8007fa4 <ADF4113_Module_Ctrl+0x68>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80080ce:	4640      	mov	r0, r8
 80080d0:	4649      	mov	r1, r9
 80080d2:	f7fd fe5d 	bl	8005d90 <HAL_GPIO_WritePin>
            printf("0");
 80080d6:	2030      	movs	r0, #48	; 0x30
 80080d8:	e796      	b.n	8008008 <ADF4113_Module_Ctrl+0xcc>
            printf("0");            
 80080da:	2030      	movs	r0, #48	; 0x30
 80080dc:	f001 fa30 	bl	8009540 <putchar>
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80080e0:	465a      	mov	r2, fp
 80080e2:	e7c1      	b.n	8008068 <ADF4113_Module_Ctrl+0x12c>
 80080e4:	0800b9de 	.word	0x0800b9de

080080e8 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 80080e8:	4b0e      	ldr	r3, [pc, #56]	; (8008124 <HAL_MspInit+0x3c>)
{
 80080ea:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 80080ec:	699a      	ldr	r2, [r3, #24]
 80080ee:	f042 0201 	orr.w	r2, r2, #1
 80080f2:	619a      	str	r2, [r3, #24]
 80080f4:	699a      	ldr	r2, [r3, #24]
 80080f6:	f002 0201 	and.w	r2, r2, #1
 80080fa:	9200      	str	r2, [sp, #0]
 80080fc:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 80080fe:	69da      	ldr	r2, [r3, #28]
 8008100:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8008104:	61da      	str	r2, [r3, #28]
 8008106:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled 
  */
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 8008108:	4a07      	ldr	r2, [pc, #28]	; (8008128 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 800810a:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 800810e:	9301      	str	r3, [sp, #4]
 8008110:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 8008112:	6853      	ldr	r3, [r2, #4]
 8008114:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8008118:	f043 7300 	orr.w	r3, r3, #33554432	; 0x2000000
 800811c:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 800811e:	b002      	add	sp, #8
 8008120:	4770      	bx	lr
 8008122:	bf00      	nop
 8008124:	40021000 	.word	0x40021000
 8008128:	40010000 	.word	0x40010000

0800812c <HAL_ADC_MspInit>:
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800812c:	2210      	movs	r2, #16
{
 800812e:	b530      	push	{r4, r5, lr}
 8008130:	4605      	mov	r5, r0
 8008132:	b089      	sub	sp, #36	; 0x24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8008134:	eb0d 0002 	add.w	r0, sp, r2
 8008138:	2100      	movs	r1, #0
 800813a:	f000 fd80 	bl	8008c3e <memset>
  if(hadc->Instance==ADC1)
 800813e:	682a      	ldr	r2, [r5, #0]
 8008140:	4b2b      	ldr	r3, [pc, #172]	; (80081f0 <HAL_ADC_MspInit+0xc4>)
 8008142:	429a      	cmp	r2, r3
 8008144:	d152      	bne.n	80081ec <HAL_ADC_MspInit+0xc0>
  {
  /* USER CODE BEGIN ADC1_MspInit 0 */

  /* USER CODE END ADC1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_ADC1_CLK_ENABLE();
 8008146:	f503 436c 	add.w	r3, r3, #60416	; 0xec00
 800814a:	699a      	ldr	r2, [r3, #24]
    PA7     ------> ADC1_IN7
    PB0     ------> ADC1_IN8
    PB1     ------> ADC1_IN9 
    */
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 800814c:	2403      	movs	r4, #3
    __HAL_RCC_ADC1_CLK_ENABLE();
 800814e:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8008152:	619a      	str	r2, [r3, #24]
 8008154:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8008156:	a904      	add	r1, sp, #16
    __HAL_RCC_ADC1_CLK_ENABLE();
 8008158:	f402 7200 	and.w	r2, r2, #512	; 0x200
 800815c:	9200      	str	r2, [sp, #0]
 800815e:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8008160:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8008162:	4824      	ldr	r0, [pc, #144]	; (80081f4 <HAL_ADC_MspInit+0xc8>)
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8008164:	f042 0210 	orr.w	r2, r2, #16
 8008168:	619a      	str	r2, [r3, #24]
 800816a:	699a      	ldr	r2, [r3, #24]
 800816c:	f002 0210 	and.w	r2, r2, #16
 8008170:	9201      	str	r2, [sp, #4]
 8008172:	9a01      	ldr	r2, [sp, #4]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8008174:	699a      	ldr	r2, [r3, #24]
 8008176:	f042 0204 	orr.w	r2, r2, #4
 800817a:	619a      	str	r2, [r3, #24]
 800817c:	699a      	ldr	r2, [r3, #24]
 800817e:	f002 0204 	and.w	r2, r2, #4
 8008182:	9202      	str	r2, [sp, #8]
 8008184:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8008186:	699a      	ldr	r2, [r3, #24]
 8008188:	f042 0208 	orr.w	r2, r2, #8
 800818c:	619a      	str	r2, [r3, #24]
 800818e:	699b      	ldr	r3, [r3, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8008190:	9405      	str	r4, [sp, #20]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8008192:	f003 0308 	and.w	r3, r3, #8
 8008196:	9303      	str	r3, [sp, #12]
 8008198:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
 800819a:	230f      	movs	r3, #15
 800819c:	9304      	str	r3, [sp, #16]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 800819e:	f7fd fd0b 	bl	8005bb8 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 80081a2:	23ff      	movs	r3, #255	; 0xff
                          |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80081a4:	a904      	add	r1, sp, #16
 80081a6:	4814      	ldr	r0, [pc, #80]	; (80081f8 <HAL_ADC_MspInit+0xcc>)
    GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 80081a8:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 80081aa:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80081ac:	f7fd fd04 	bl	8005bb8 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80081b0:	4812      	ldr	r0, [pc, #72]	; (80081fc <HAL_ADC_MspInit+0xd0>)
 80081b2:	a904      	add	r1, sp, #16
    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
 80081b4:	9404      	str	r4, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 80081b6:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80081b8:	f7fd fcfe 	bl	8005bb8 <HAL_GPIO_Init>
    /* ADC1 DMA Init */
    /* ADC1 Init */
    hdma_adc1.Instance = DMA1_Channel1;
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 80081bc:	2280      	movs	r2, #128	; 0x80
    hdma_adc1.Instance = DMA1_Channel1;
 80081be:	4c10      	ldr	r4, [pc, #64]	; (8008200 <HAL_ADC_MspInit+0xd4>)
 80081c0:	4b10      	ldr	r3, [pc, #64]	; (8008204 <HAL_ADC_MspInit+0xd8>)
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 80081c2:	60e2      	str	r2, [r4, #12]
    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 80081c4:	f44f 7200 	mov.w	r2, #512	; 0x200
    hdma_adc1.Instance = DMA1_Channel1;
 80081c8:	6023      	str	r3, [r4, #0]
    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 80081ca:	6122      	str	r2, [r4, #16]
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 80081cc:	2300      	movs	r3, #0
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 80081ce:	f44f 6200 	mov.w	r2, #2048	; 0x800
    hdma_adc1.Init.Mode = DMA_NORMAL;
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 80081d2:	4620      	mov	r0, r4
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 80081d4:	6063      	str	r3, [r4, #4]
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
 80081d6:	60a3      	str	r3, [r4, #8]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 80081d8:	6162      	str	r2, [r4, #20]
    hdma_adc1.Init.Mode = DMA_NORMAL;
 80081da:	61a3      	str	r3, [r4, #24]
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 80081dc:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 80081de:	f7fd fb23 	bl	8005828 <HAL_DMA_Init>
 80081e2:	b108      	cbz	r0, 80081e8 <HAL_ADC_MspInit+0xbc>
    {
      Error_Handler();
 80081e4:	f7ff fe2c 	bl	8007e40 <Error_Handler>
    }

    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
 80081e8:	622c      	str	r4, [r5, #32]
 80081ea:	6265      	str	r5, [r4, #36]	; 0x24
  /* USER CODE BEGIN ADC1_MspInit 1 */

  /* USER CODE END ADC1_MspInit 1 */
  }

}
 80081ec:	b009      	add	sp, #36	; 0x24
 80081ee:	bd30      	pop	{r4, r5, pc}
 80081f0:	40012400 	.word	0x40012400
 80081f4:	40011000 	.word	0x40011000
 80081f8:	40010800 	.word	0x40010800
 80081fc:	40010c00 	.word	0x40010c00
 8008200:	2000057c 	.word	0x2000057c
 8008204:	40020008 	.word	0x40020008

08008208 <HAL_TIM_Base_MspInit>:
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
  if(htim_base->Instance==TIM6)
 8008208:	6802      	ldr	r2, [r0, #0]
 800820a:	4b08      	ldr	r3, [pc, #32]	; (800822c <HAL_TIM_Base_MspInit+0x24>)
{
 800820c:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 800820e:	429a      	cmp	r2, r3
 8008210:	d10a      	bne.n	8008228 <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 8008212:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 8008216:	69da      	ldr	r2, [r3, #28]
 8008218:	f042 0210 	orr.w	r2, r2, #16
 800821c:	61da      	str	r2, [r3, #28]
 800821e:	69db      	ldr	r3, [r3, #28]
 8008220:	f003 0310 	and.w	r3, r3, #16
 8008224:	9301      	str	r3, [sp, #4]
 8008226:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 8008228:	b002      	add	sp, #8
 800822a:	4770      	bx	lr
 800822c:	40001000 	.word	0x40001000

08008230 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8008230:	b570      	push	{r4, r5, r6, lr}
 8008232:	4606      	mov	r6, r0
 8008234:	b086      	sub	sp, #24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8008236:	2210      	movs	r2, #16
 8008238:	2100      	movs	r1, #0
 800823a:	a802      	add	r0, sp, #8
 800823c:	f000 fcff 	bl	8008c3e <memset>
  if(huart->Instance==USART1)
 8008240:	6832      	ldr	r2, [r6, #0]
 8008242:	4b20      	ldr	r3, [pc, #128]	; (80082c4 <HAL_UART_MspInit+0x94>)
 8008244:	429a      	cmp	r2, r3
 8008246:	d13b      	bne.n	80082c0 <HAL_UART_MspInit+0x90>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 8008248:	f503 4358 	add.w	r3, r3, #55296	; 0xd800
 800824c:	699a      	ldr	r2, [r3, #24]
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800824e:	a902      	add	r1, sp, #8
    __HAL_RCC_USART1_CLK_ENABLE();
 8008250:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8008254:	619a      	str	r2, [r3, #24]
 8008256:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008258:	481b      	ldr	r0, [pc, #108]	; (80082c8 <HAL_UART_MspInit+0x98>)
    __HAL_RCC_USART1_CLK_ENABLE();
 800825a:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 800825e:	9200      	str	r2, [sp, #0]
 8008260:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8008262:	699a      	ldr	r2, [r3, #24]

    GPIO_InitStruct.Pin = GPIO_PIN_10;
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8008264:	2500      	movs	r5, #0
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8008266:	f042 0204 	orr.w	r2, r2, #4
 800826a:	619a      	str	r2, [r3, #24]
 800826c:	699b      	ldr	r3, [r3, #24]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

    /* USART1 DMA Init */
    /* USART1_RX Init */
    hdma_usart1_rx.Instance = DMA1_Channel5;
 800826e:	4c17      	ldr	r4, [pc, #92]	; (80082cc <HAL_UART_MspInit+0x9c>)
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8008270:	f003 0304 	and.w	r3, r3, #4
 8008274:	9301      	str	r3, [sp, #4]
 8008276:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8008278:	f44f 7300 	mov.w	r3, #512	; 0x200
 800827c:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800827e:	2302      	movs	r3, #2
 8008280:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8008282:	2303      	movs	r3, #3
 8008284:	9305      	str	r3, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008286:	f7fd fc97 	bl	8005bb8 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 800828a:	f44f 6380 	mov.w	r3, #1024	; 0x400
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800828e:	480e      	ldr	r0, [pc, #56]	; (80082c8 <HAL_UART_MspInit+0x98>)
 8008290:	a902      	add	r1, sp, #8
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8008292:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8008294:	9503      	str	r5, [sp, #12]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008296:	9504      	str	r5, [sp, #16]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008298:	f7fd fc8e 	bl	8005bb8 <HAL_GPIO_Init>
    hdma_usart1_rx.Instance = DMA1_Channel5;
 800829c:	4b0c      	ldr	r3, [pc, #48]	; (80082d0 <HAL_UART_MspInit+0xa0>)
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 800829e:	4620      	mov	r0, r4
    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 80082a0:	e884 0028 	stmia.w	r4, {r3, r5}
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 80082a4:	2380      	movs	r3, #128	; 0x80
    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 80082a6:	60a5      	str	r5, [r4, #8]
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 80082a8:	60e3      	str	r3, [r4, #12]
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 80082aa:	6125      	str	r5, [r4, #16]
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 80082ac:	6165      	str	r5, [r4, #20]
    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
 80082ae:	61a5      	str	r5, [r4, #24]
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
 80082b0:	61e5      	str	r5, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 80082b2:	f7fd fab9 	bl	8005828 <HAL_DMA_Init>
 80082b6:	b108      	cbz	r0, 80082bc <HAL_UART_MspInit+0x8c>
    {
      Error_Handler();
 80082b8:	f7ff fdc2 	bl	8007e40 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
 80082bc:	6374      	str	r4, [r6, #52]	; 0x34
 80082be:	6266      	str	r6, [r4, #36]	; 0x24
  /* USER CODE BEGIN USART1_MspInit 1 */

  /* USER CODE END USART1_MspInit 1 */
  }

}
 80082c0:	b006      	add	sp, #24
 80082c2:	bd70      	pop	{r4, r5, r6, pc}
 80082c4:	40013800 	.word	0x40013800
 80082c8:	40010800 	.word	0x40010800
 80082cc:	200004f8 	.word	0x200004f8
 80082d0:	40020058 	.word	0x40020058

080082d4 <NMI_Handler>:
 80082d4:	4770      	bx	lr

080082d6 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 80082d6:	e7fe      	b.n	80082d6 <HardFault_Handler>

080082d8 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 80082d8:	e7fe      	b.n	80082d8 <MemManage_Handler>

080082da <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 80082da:	e7fe      	b.n	80082da <BusFault_Handler>

080082dc <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 80082dc:	e7fe      	b.n	80082dc <UsageFault_Handler>

080082de <SVC_Handler>:
 80082de:	4770      	bx	lr

080082e0 <DebugMon_Handler>:
 80082e0:	4770      	bx	lr

080082e2 <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 80082e2:	4770      	bx	lr

080082e4 <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 80082e4:	f7fd b8e4 	b.w	80054b0 <HAL_IncTick>

080082e8 <DMA1_Channel1_IRQHandler>:
void DMA1_Channel1_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */

  /* USER CODE END DMA1_Channel1_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_adc1);
 80082e8:	4801      	ldr	r0, [pc, #4]	; (80082f0 <DMA1_Channel1_IRQHandler+0x8>)
 80082ea:	f7fd bb89 	b.w	8005a00 <HAL_DMA_IRQHandler>
 80082ee:	bf00      	nop
 80082f0:	2000057c 	.word	0x2000057c

080082f4 <DMA1_Channel5_IRQHandler>:
void DMA1_Channel5_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */

  /* USER CODE END DMA1_Channel5_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_rx);
 80082f4:	4801      	ldr	r0, [pc, #4]	; (80082fc <DMA1_Channel5_IRQHandler+0x8>)
 80082f6:	f7fd bb83 	b.w	8005a00 <HAL_DMA_IRQHandler>
 80082fa:	bf00      	nop
 80082fc:	200004f8 	.word	0x200004f8

08008300 <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8008300:	4801      	ldr	r0, [pc, #4]	; (8008308 <USART1_IRQHandler+0x8>)
 8008302:	f7fe bbc1 	b.w	8006a88 <HAL_UART_IRQHandler>
 8008306:	bf00      	nop
 8008308:	2000053c 	.word	0x2000053c

0800830c <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 800830c:	4801      	ldr	r0, [pc, #4]	; (8008314 <TIM6_IRQHandler+0x8>)
 800830e:	f7fe b85f 	b.w	80063d0 <HAL_TIM_IRQHandler>
 8008312:	bf00      	nop
 8008314:	200005c0 	.word	0x200005c0

08008318 <_read>:
	_kill(status, -1);
	while (1) {}		/* Make sure we hang here */
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 8008318:	b570      	push	{r4, r5, r6, lr}
 800831a:	460e      	mov	r6, r1
 800831c:	4615      	mov	r5, r2
	int DataIdx;

	for (DataIdx = 0; DataIdx < len; DataIdx++)
 800831e:	460c      	mov	r4, r1
 8008320:	1ba3      	subs	r3, r4, r6
 8008322:	429d      	cmp	r5, r3
 8008324:	dc01      	bgt.n	800832a <_read+0x12>
	{
		*ptr++ = __io_getchar();
	}

return len;
}
 8008326:	4628      	mov	r0, r5
 8008328:	bd70      	pop	{r4, r5, r6, pc}
		*ptr++ = __io_getchar();
 800832a:	f3af 8000 	nop.w
 800832e:	f804 0b01 	strb.w	r0, [r4], #1
 8008332:	e7f5      	b.n	8008320 <_read+0x8>

08008334 <_sbrk>:
	}
	return len;
}

caddr_t _sbrk(int incr)
{
 8008334:	b508      	push	{r3, lr}
	extern char end asm("end");
	static char *heap_end;
	char *prev_heap_end;

	if (heap_end == 0)
 8008336:	4b0a      	ldr	r3, [pc, #40]	; (8008360 <_sbrk+0x2c>)
{
 8008338:	4602      	mov	r2, r0
	if (heap_end == 0)
 800833a:	6819      	ldr	r1, [r3, #0]
 800833c:	b909      	cbnz	r1, 8008342 <_sbrk+0xe>
		heap_end = &end;
 800833e:	4909      	ldr	r1, [pc, #36]	; (8008364 <_sbrk+0x30>)
 8008340:	6019      	str	r1, [r3, #0]

	prev_heap_end = heap_end;
	if (heap_end + incr > stack_ptr)
 8008342:	4669      	mov	r1, sp
	prev_heap_end = heap_end;
 8008344:	6818      	ldr	r0, [r3, #0]
	if (heap_end + incr > stack_ptr)
 8008346:	4402      	add	r2, r0
 8008348:	428a      	cmp	r2, r1
 800834a:	d906      	bls.n	800835a <_sbrk+0x26>
	{
//		write(1, "Heap and stack collision\n", 25);
//		abort();
		errno = ENOMEM;
 800834c:	f000 fc42 	bl	8008bd4 <__errno>
 8008350:	230c      	movs	r3, #12
 8008352:	6003      	str	r3, [r0, #0]
		return (caddr_t) -1;
 8008354:	f04f 30ff 	mov.w	r0, #4294967295
 8008358:	bd08      	pop	{r3, pc}
	}

	heap_end += incr;
 800835a:	601a      	str	r2, [r3, #0]

	return (caddr_t) prev_heap_end;
}
 800835c:	bd08      	pop	{r3, pc}
 800835e:	bf00      	nop
 8008360:	20000428 	.word	0x20000428
 8008364:	200016a8 	.word	0x200016a8

08008368 <_close>:

int _close(int file)
{
	return -1;
}
 8008368:	f04f 30ff 	mov.w	r0, #4294967295
 800836c:	4770      	bx	lr

0800836e <_fstat>:


int _fstat(int file, struct stat *st)
{
	st->st_mode = S_IFCHR;
 800836e:	f44f 5300 	mov.w	r3, #8192	; 0x2000
	return 0;
}
 8008372:	2000      	movs	r0, #0
	st->st_mode = S_IFCHR;
 8008374:	604b      	str	r3, [r1, #4]
}
 8008376:	4770      	bx	lr

08008378 <_isatty>:

int _isatty(int file)
{
	return 1;
}
 8008378:	2001      	movs	r0, #1
 800837a:	4770      	bx	lr

0800837c <_lseek>:

int _lseek(int file, int ptr, int dir)
{
	return 0;
}
 800837c:	2000      	movs	r0, #0
 800837e:	4770      	bx	lr

08008380 <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 8008380:	4b0e      	ldr	r3, [pc, #56]	; (80083bc <SystemInit+0x3c>)
 8008382:	681a      	ldr	r2, [r3, #0]
 8008384:	f042 0201 	orr.w	r2, r2, #1
 8008388:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 800838a:	6859      	ldr	r1, [r3, #4]
 800838c:	4a0c      	ldr	r2, [pc, #48]	; (80083c0 <SystemInit+0x40>)
 800838e:	400a      	ands	r2, r1
 8008390:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 8008392:	681a      	ldr	r2, [r3, #0]
 8008394:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8008398:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 800839c:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 800839e:	681a      	ldr	r2, [r3, #0]
 80083a0:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 80083a4:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 80083a6:	685a      	ldr	r2, [r3, #4]
 80083a8:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 80083ac:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 80083ae:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 80083b2:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 80083b4:	4a03      	ldr	r2, [pc, #12]	; (80083c4 <SystemInit+0x44>)
 80083b6:	4b04      	ldr	r3, [pc, #16]	; (80083c8 <SystemInit+0x48>)
 80083b8:	609a      	str	r2, [r3, #8]
 80083ba:	4770      	bx	lr
 80083bc:	40021000 	.word	0x40021000
 80083c0:	f8ff0000 	.word	0xf8ff0000
 80083c4:	08004000 	.word	0x08004000
 80083c8:	e000ed00 	.word	0xe000ed00

080083cc <GetDataFromUartQueue>:
   // HAL_UART_Receive_DMA(&hTerminal,  pQueue->Buffer + pQueue->head, 10);
}

uint8_t uart_buf[QUEUE_BUFFER_LENGTH];
void GetDataFromUartQueue(UART_HandleTypeDef *huart)
{
 80083cc:	b570      	push	{r4, r5, r6, lr}
    pUARTQUEUE pQueue = &TerminalQueue;
//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
//    {
//       _Error_Handler(__FILE__, __LINE__);
//    }
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 80083ce:	4d15      	ldr	r5, [pc, #84]	; (8008424 <GetDataFromUartQueue+0x58>)
 80083d0:	4c15      	ldr	r4, [pc, #84]	; (8008428 <GetDataFromUartQueue+0x5c>)
 80083d2:	682b      	ldr	r3, [r5, #0]
 80083d4:	6861      	ldr	r1, [r4, #4]
 80083d6:	1c5a      	adds	r2, r3, #1
 80083d8:	602a      	str	r2, [r5, #0]
 80083da:	f104 020c 	add.w	r2, r4, #12
 80083de:	5c89      	ldrb	r1, [r1, r2]
 80083e0:	4a12      	ldr	r2, [pc, #72]	; (800842c <GetDataFromUartQueue+0x60>)
    printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ;
 80083e2:	4813      	ldr	r0, [pc, #76]	; (8008430 <GetDataFromUartQueue+0x64>)
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 80083e4:	54d1      	strb	r1, [r2, r3]
    printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ;
 80083e6:	f001 f893 	bl	8009510 <iprintf>

    pQueue->tail++;
 80083ea:	6863      	ldr	r3, [r4, #4]
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
    pQueue->data--;
 80083ec:	68a6      	ldr	r6, [r4, #8]
    pQueue->tail++;
 80083ee:	3301      	adds	r3, #1
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 80083f0:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
 80083f4:	bfa8      	it	ge
 80083f6:	2300      	movge	r3, #0
    pQueue->data--;
 80083f8:	3e01      	subs	r6, #1
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 80083fa:	6063      	str	r3, [r4, #4]
    pQueue->data--;
 80083fc:	60a6      	str	r6, [r4, #8]
    
    if(pQueue->data == 0){
 80083fe:	b986      	cbnz	r6, 8008422 <GetDataFromUartQueue+0x56>
        printf("data cnt zero !!!  \r\n");
 8008400:	480c      	ldr	r0, [pc, #48]	; (8008434 <GetDataFromUartQueue+0x68>)
 8008402:	f001 f90d 	bl	8009620 <puts>
        RF_Ctrl_Main(&uart_buf[Header]);
 8008406:	4809      	ldr	r0, [pc, #36]	; (800842c <GetDataFromUartQueue+0x60>)
 8008408:	f000 fb66 	bl	8008ad8 <RF_Ctrl_Main>
#if 0 // PYJ.2019.07.15_BEGIN -- 
            for(int i = 0; i < cnt; i++){
                printf("%02x ",uart_buf[i]);
            }
#endif // PYJ.2019.07.15_END -- 
        memset(uart_buf,0x00,cnt);
 800840c:	682a      	ldr	r2, [r5, #0]
 800840e:	4631      	mov	r1, r6
 8008410:	4806      	ldr	r0, [pc, #24]	; (800842c <GetDataFromUartQueue+0x60>)
 8008412:	f000 fc14 	bl	8008c3e <memset>
        
//        for(int i  = 0; i < cnt; i++)
//            uart_buf[i] = 0;
        cnt = 0;
 8008416:	602e      	str	r6, [r5, #0]
        
        HAL_Delay(1);
 8008418:	2001      	movs	r0, #1
    }

}
 800841a:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
        HAL_Delay(1);
 800841e:	f7fd b859 	b.w	80054d4 <HAL_Delay>
 8008422:	bd70      	pop	{r4, r5, r6, pc}
 8008424:	2000042c 	.word	0x2000042c
 8008428:	20000a38 	.word	0x20000a38
 800842c:	20000638 	.word	0x20000638
 8008430:	0800b9c5 	.word	0x0800b9c5
 8008434:	0800b9cb 	.word	0x0800b9cb

08008438 <HAL_UART_RxCpltCallback>:
    UartTimerCnt = 0;
 8008438:	2300      	movs	r3, #0
{
 800843a:	b510      	push	{r4, lr}
    UartTimerCnt = 0;
 800843c:	4a0d      	ldr	r2, [pc, #52]	; (8008474 <HAL_UART_RxCpltCallback+0x3c>)
    pQueue->head++;
 800843e:	4c0e      	ldr	r4, [pc, #56]	; (8008478 <HAL_UART_RxCpltCallback+0x40>)
    UartTimerCnt = 0;
 8008440:	6013      	str	r3, [r2, #0]
    pQueue->head++;
 8008442:	6822      	ldr	r2, [r4, #0]
 8008444:	3201      	adds	r2, #1
 8008446:	f5b2 6f80 	cmp.w	r2, #1024	; 0x400
 800844a:	bfb8      	it	lt
 800844c:	4613      	movlt	r3, r2
 800844e:	6023      	str	r3, [r4, #0]
    pQueue->data++;
 8008450:	68a3      	ldr	r3, [r4, #8]
 8008452:	3301      	adds	r3, #1
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 8008454:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
    pQueue->data++;
 8008458:	60a3      	str	r3, [r4, #8]
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 800845a:	db01      	blt.n	8008460 <HAL_UART_RxCpltCallback+0x28>
        GetDataFromUartQueue(huart);
 800845c:	f7ff ffb6 	bl	80083cc <GetDataFromUartQueue>
    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
 8008460:	6823      	ldr	r3, [r4, #0]
 8008462:	4906      	ldr	r1, [pc, #24]	; (800847c <HAL_UART_RxCpltCallback+0x44>)
 8008464:	2201      	movs	r2, #1
}
 8008466:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
 800846a:	4419      	add	r1, r3
 800846c:	4804      	ldr	r0, [pc, #16]	; (8008480 <HAL_UART_RxCpltCallback+0x48>)
 800846e:	f7fe ba39 	b.w	80068e4 <HAL_UART_Receive_DMA>
 8008472:	bf00      	nop
 8008474:	20000424 	.word	0x20000424
 8008478:	20000a38 	.word	0x20000a38
 800847c:	20000a44 	.word	0x20000a44
 8008480:	2000053c 	.word	0x2000053c

08008484 <RF_Data_Check>:
    PATH_EN_2_1G_UL_GPIO_Port,
    PATH_EN_2_1G_UL_Pin,    
};

uint8_t Prev_data[INDEX__T_SYNC_UL + 1];
bool RF_Data_Check(uint8_t* data_buf){
 8008484:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    bool ret = false;
    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
 8008486:	78c3      	ldrb	r3, [r0, #3]
 8008488:	1c46      	adds	r6, r0, #1
 800848a:	5cc2      	ldrb	r2, [r0, r3]
 800848c:	7881      	ldrb	r1, [r0, #2]
bool RF_Data_Check(uint8_t* data_buf){
 800848e:	4604      	mov	r4, r0
    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
 8008490:	4630      	mov	r0, r6
 8008492:	f7fe fcbc 	bl	8006e0e <STH30_CheckCrc>
    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
        ret= true;
    }
    if(crcret == true){/*CRC CHECK*/
 8008496:	4605      	mov	r5, r0
 8008498:	b980      	cbnz	r0, 80084bc <RF_Data_Check+0x38>
        ret = true;
    }else{
        ret = false;
        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
 800849a:	78e3      	ldrb	r3, [r4, #3]
 800849c:	78a1      	ldrb	r1, [r4, #2]
 800849e:	4630      	mov	r0, r6
 80084a0:	5ce7      	ldrb	r7, [r4, r3]
 80084a2:	f7fe fc99 	bl	8006dd8 <STH30_CreateCrc>
 80084a6:	4639      	mov	r1, r7
 80084a8:	4602      	mov	r2, r0
 80084aa:	4805      	ldr	r0, [pc, #20]	; (80084c0 <RF_Data_Check+0x3c>)
 80084ac:	f001 f830 	bl	8009510 <iprintf>
    }
    printf("CRC Result : \"%d\"   \r\n",ret);
 80084b0:	4629      	mov	r1, r5
 80084b2:	4804      	ldr	r0, [pc, #16]	; (80084c4 <RF_Data_Check+0x40>)
 80084b4:	f001 f82c 	bl	8009510 <iprintf>

    return ret;

}
 80084b8:	4628      	mov	r0, r5
 80084ba:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        ret = true;
 80084bc:	2501      	movs	r5, #1
 80084be:	e7f7      	b.n	80084b0 <RF_Data_Check+0x2c>
 80084c0:	0800ba2d 	.word	0x0800ba2d
 80084c4:	0800ba62 	.word	0x0800ba62

080084c8 <RF_Operate>:
     PLL_DATA_3_5G_Pin,
       PLL_EN_3_5G_H_GPIO_Port,    
       PLL_EN_3_5G_H_Pin,
 };

void RF_Operate(uint8_t* data_buf){
 80084c8:	b570      	push	{r4, r5, r6, lr}
    uint16_t temp_val = 0;

    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 80084ca:	4db0      	ldr	r5, [pc, #704]	; (800878c <RF_Operate+0x2c4>)
 80084cc:	7903      	ldrb	r3, [r0, #4]
 80084ce:	792a      	ldrb	r2, [r5, #4]
void RF_Operate(uint8_t* data_buf){
 80084d0:	b0a4      	sub	sp, #144	; 0x90
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 80084d2:	429a      	cmp	r2, r3
void RF_Operate(uint8_t* data_buf){
 80084d4:	4604      	mov	r4, r0
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 80084d6:	d011      	beq.n	80084fc <RF_Operate+0x34>
        
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 80084d8:	21df      	movs	r1, #223	; 0xdf
 80084da:	48ad      	ldr	r0, [pc, #692]	; (8008790 <RF_Operate+0x2c8>)
 80084dc:	f001 f818 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
 80084e0:	7922      	ldrb	r2, [r4, #4]
 80084e2:	4bac      	ldr	r3, [pc, #688]	; (8008794 <RF_Operate+0x2cc>)
 80084e4:	9202      	str	r2, [sp, #8]
 80084e6:	f103 0210 	add.w	r2, r3, #16
 80084ea:	e892 0003 	ldmia.w	r2, {r0, r1}
 80084ee:	e88d 0003 	stmia.w	sp, {r0, r1}
 80084f2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80084f4:	f7fe fb70 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
 80084f8:	7923      	ldrb	r3, [r4, #4]
 80084fa:	712b      	strb	r3, [r5, #4]
    }
    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
 80084fc:	796a      	ldrb	r2, [r5, #5]
 80084fe:	7963      	ldrb	r3, [r4, #5]
 8008500:	429a      	cmp	r2, r3
 8008502:	d011      	beq.n	8008528 <RF_Operate+0x60>
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 8008504:	21e4      	movs	r1, #228	; 0xe4
 8008506:	48a2      	ldr	r0, [pc, #648]	; (8008790 <RF_Operate+0x2c8>)
 8008508:	f001 f802 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
 800850c:	7962      	ldrb	r2, [r4, #5]
 800850e:	4ba2      	ldr	r3, [pc, #648]	; (8008798 <RF_Operate+0x2d0>)
 8008510:	9202      	str	r2, [sp, #8]
 8008512:	f103 0210 	add.w	r2, r3, #16
 8008516:	e892 0003 	ldmia.w	r2, {r0, r1}
 800851a:	e88d 0003 	stmia.w	sp, {r0, r1}
 800851e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008520:	f7fe fb5a 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
 8008524:	7963      	ldrb	r3, [r4, #5]
 8008526:	716b      	strb	r3, [r5, #5]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
 8008528:	79aa      	ldrb	r2, [r5, #6]
 800852a:	79a3      	ldrb	r3, [r4, #6]
 800852c:	429a      	cmp	r2, r3
 800852e:	d011      	beq.n	8008554 <RF_Operate+0x8c>
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 8008530:	21e9      	movs	r1, #233	; 0xe9
 8008532:	4897      	ldr	r0, [pc, #604]	; (8008790 <RF_Operate+0x2c8>)
 8008534:	f000 ffec 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
 8008538:	79a2      	ldrb	r2, [r4, #6]
 800853a:	4b98      	ldr	r3, [pc, #608]	; (800879c <RF_Operate+0x2d4>)
 800853c:	9202      	str	r2, [sp, #8]
 800853e:	f103 0210 	add.w	r2, r3, #16
 8008542:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008546:	e88d 0003 	stmia.w	sp, {r0, r1}
 800854a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800854c:	f7fe fb44 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
 8008550:	79a3      	ldrb	r3, [r4, #6]
 8008552:	71ab      	strb	r3, [r5, #6]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
 8008554:	79ea      	ldrb	r2, [r5, #7]
 8008556:	79e3      	ldrb	r3, [r4, #7]
 8008558:	429a      	cmp	r2, r3
 800855a:	d011      	beq.n	8008580 <RF_Operate+0xb8>
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 800855c:	21ee      	movs	r1, #238	; 0xee
 800855e:	488c      	ldr	r0, [pc, #560]	; (8008790 <RF_Operate+0x2c8>)
 8008560:	f000 ffd6 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
 8008564:	79e2      	ldrb	r2, [r4, #7]
 8008566:	4b8e      	ldr	r3, [pc, #568]	; (80087a0 <RF_Operate+0x2d8>)
 8008568:	9202      	str	r2, [sp, #8]
 800856a:	f103 0210 	add.w	r2, r3, #16
 800856e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008572:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008576:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008578:	f7fe fb2e 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
 800857c:	79e3      	ldrb	r3, [r4, #7]
 800857e:	71eb      	strb	r3, [r5, #7]

    }
    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
 8008580:	7a22      	ldrb	r2, [r4, #8]
 8008582:	7a2b      	ldrb	r3, [r5, #8]
 8008584:	4293      	cmp	r3, r2
 8008586:	d00c      	beq.n	80085a2 <RF_Operate+0xda>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
 8008588:	4b86      	ldr	r3, [pc, #536]	; (80087a4 <RF_Operate+0x2dc>)
 800858a:	9202      	str	r2, [sp, #8]
 800858c:	f103 0210 	add.w	r2, r3, #16
 8008590:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008594:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008598:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800859a:	f7fe fb1d 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
 800859e:	7a23      	ldrb	r3, [r4, #8]
 80085a0:	722b      	strb	r3, [r5, #8]

    }
    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
 80085a2:	7a6a      	ldrb	r2, [r5, #9]
 80085a4:	7a63      	ldrb	r3, [r4, #9]
 80085a6:	429a      	cmp	r2, r3
 80085a8:	d011      	beq.n	80085ce <RF_Operate+0x106>
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 80085aa:	21f9      	movs	r1, #249	; 0xf9
 80085ac:	4878      	ldr	r0, [pc, #480]	; (8008790 <RF_Operate+0x2c8>)
 80085ae:	f000 ffaf 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
 80085b2:	7a62      	ldrb	r2, [r4, #9]
 80085b4:	4b7c      	ldr	r3, [pc, #496]	; (80087a8 <RF_Operate+0x2e0>)
 80085b6:	9202      	str	r2, [sp, #8]
 80085b8:	f103 0210 	add.w	r2, r3, #16
 80085bc:	e892 0003 	ldmia.w	r2, {r0, r1}
 80085c0:	e88d 0003 	stmia.w	sp, {r0, r1}
 80085c4:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80085c6:	f7fe fb07 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
 80085ca:	7a63      	ldrb	r3, [r4, #9]
 80085cc:	726b      	strb	r3, [r5, #9]

    }
    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
 80085ce:	7aaa      	ldrb	r2, [r5, #10]
 80085d0:	7aa3      	ldrb	r3, [r4, #10]
 80085d2:	429a      	cmp	r2, r3
 80085d4:	d011      	beq.n	80085fa <RF_Operate+0x132>
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 80085d6:	21ff      	movs	r1, #255	; 0xff
 80085d8:	486d      	ldr	r0, [pc, #436]	; (8008790 <RF_Operate+0x2c8>)
 80085da:	f000 ff99 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
 80085de:	7aa2      	ldrb	r2, [r4, #10]
 80085e0:	4b72      	ldr	r3, [pc, #456]	; (80087ac <RF_Operate+0x2e4>)
 80085e2:	9202      	str	r2, [sp, #8]
 80085e4:	f103 0210 	add.w	r2, r3, #16
 80085e8:	e892 0003 	ldmia.w	r2, {r0, r1}
 80085ec:	e88d 0003 	stmia.w	sp, {r0, r1}
 80085f0:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80085f2:	f7fe faf1 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
 80085f6:	7aa3      	ldrb	r3, [r4, #10]
 80085f8:	72ab      	strb	r3, [r5, #10]

    }
    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
 80085fa:	7aea      	ldrb	r2, [r5, #11]
 80085fc:	7ae3      	ldrb	r3, [r4, #11]
 80085fe:	429a      	cmp	r2, r3
 8008600:	d012      	beq.n	8008628 <RF_Operate+0x160>
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 8008602:	f240 1105 	movw	r1, #261	; 0x105
 8008606:	4862      	ldr	r0, [pc, #392]	; (8008790 <RF_Operate+0x2c8>)
 8008608:	f000 ff82 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
 800860c:	7ae2      	ldrb	r2, [r4, #11]
 800860e:	4b68      	ldr	r3, [pc, #416]	; (80087b0 <RF_Operate+0x2e8>)
 8008610:	9202      	str	r2, [sp, #8]
 8008612:	f103 0210 	add.w	r2, r3, #16
 8008616:	e892 0003 	ldmia.w	r2, {r0, r1}
 800861a:	e88d 0003 	stmia.w	sp, {r0, r1}
 800861e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008620:	f7fe fada 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
 8008624:	7ae3      	ldrb	r3, [r4, #11]
 8008626:	72eb      	strb	r3, [r5, #11]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
 8008628:	7b2a      	ldrb	r2, [r5, #12]
 800862a:	7b23      	ldrb	r3, [r4, #12]
 800862c:	429a      	cmp	r2, r3
 800862e:	d012      	beq.n	8008656 <RF_Operate+0x18e>
        printf("\r\nLINE : %d  \r\n",__LINE__);    
 8008630:	f240 110b 	movw	r1, #267	; 0x10b
 8008634:	4856      	ldr	r0, [pc, #344]	; (8008790 <RF_Operate+0x2c8>)
 8008636:	f000 ff6b 	bl	8009510 <iprintf>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
 800863a:	7b22      	ldrb	r2, [r4, #12]
 800863c:	4b5d      	ldr	r3, [pc, #372]	; (80087b4 <RF_Operate+0x2ec>)
 800863e:	9202      	str	r2, [sp, #8]
 8008640:	f103 0210 	add.w	r2, r3, #16
 8008644:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008648:	e88d 0003 	stmia.w	sp, {r0, r1}
 800864c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800864e:	f7fe fac3 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
 8008652:	7b23      	ldrb	r3, [r4, #12]
 8008654:	732b      	strb	r3, [r5, #12]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
 8008656:	7b62      	ldrb	r2, [r4, #13]
 8008658:	7b6b      	ldrb	r3, [r5, #13]
 800865a:	4293      	cmp	r3, r2
 800865c:	d00c      	beq.n	8008678 <RF_Operate+0x1b0>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
 800865e:	4b56      	ldr	r3, [pc, #344]	; (80087b8 <RF_Operate+0x2f0>)
 8008660:	9202      	str	r2, [sp, #8]
 8008662:	f103 0210 	add.w	r2, r3, #16
 8008666:	e892 0003 	ldmia.w	r2, {r0, r1}
 800866a:	e88d 0003 	stmia.w	sp, {r0, r1}
 800866e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008670:	f7fe fab2 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
 8008674:	7b63      	ldrb	r3, [r4, #13]
 8008676:	736b      	strb	r3, [r5, #13]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
 8008678:	7ba2      	ldrb	r2, [r4, #14]
 800867a:	7bab      	ldrb	r3, [r5, #14]
 800867c:	4293      	cmp	r3, r2
 800867e:	d00c      	beq.n	800869a <RF_Operate+0x1d2>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
 8008680:	4b4e      	ldr	r3, [pc, #312]	; (80087bc <RF_Operate+0x2f4>)
 8008682:	9202      	str	r2, [sp, #8]
 8008684:	f103 0210 	add.w	r2, r3, #16
 8008688:	e892 0003 	ldmia.w	r2, {r0, r1}
 800868c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008690:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008692:	f7fe faa1 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
 8008696:	7ba3      	ldrb	r3, [r4, #14]
 8008698:	73ab      	strb	r3, [r5, #14]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
 800869a:	7be2      	ldrb	r2, [r4, #15]
 800869c:	7beb      	ldrb	r3, [r5, #15]
 800869e:	4293      	cmp	r3, r2
 80086a0:	d00c      	beq.n	80086bc <RF_Operate+0x1f4>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
 80086a2:	4b47      	ldr	r3, [pc, #284]	; (80087c0 <RF_Operate+0x2f8>)
 80086a4:	9202      	str	r2, [sp, #8]
 80086a6:	f103 0210 	add.w	r2, r3, #16
 80086aa:	e892 0003 	ldmia.w	r2, {r0, r1}
 80086ae:	e88d 0003 	stmia.w	sp, {r0, r1}
 80086b2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80086b4:	f7fe fa90 	bl	8006bd8 <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
 80086b8:	7be3      	ldrb	r3, [r4, #15]
 80086ba:	73eb      	strb	r3, [r5, #15]
    }
    if(   (Prev_data[INDEX_ATT_3_5G_DL] != data_buf[INDEX_ATT_3_5G_DL])
 80086bc:	7c21      	ldrb	r1, [r4, #16]
 80086be:	7c2b      	ldrb	r3, [r5, #16]
 80086c0:	428b      	cmp	r3, r1
 80086c2:	d10f      	bne.n	80086e4 <RF_Operate+0x21c>
        ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL])
 80086c4:	7c6a      	ldrb	r2, [r5, #17]
 80086c6:	7c63      	ldrb	r3, [r4, #17]
 80086c8:	429a      	cmp	r2, r3
 80086ca:	d10b      	bne.n	80086e4 <RF_Operate+0x21c>
        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
 80086cc:	7caa      	ldrb	r2, [r5, #18]
 80086ce:	7ca3      	ldrb	r3, [r4, #18]
 80086d0:	429a      	cmp	r2, r3
 80086d2:	d107      	bne.n	80086e4 <RF_Operate+0x21c>
        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
 80086d4:	7cea      	ldrb	r2, [r5, #19]
 80086d6:	7ce3      	ldrb	r3, [r4, #19]
 80086d8:	429a      	cmp	r2, r3
 80086da:	d103      	bne.n	80086e4 <RF_Operate+0x21c>
        ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3])
 80086dc:	7d2a      	ldrb	r2, [r5, #20]
 80086de:	7d23      	ldrb	r3, [r4, #20]
 80086e0:	429a      	cmp	r2, r3
 80086e2:	d033      	beq.n	800874c <RF_Operate+0x284>
    ){
        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_DL]   = data_buf[INDEX_ATT_3_5G_DL];
 80086e4:	4e37      	ldr	r6, [pc, #220]	; (80087c4 <RF_Operate+0x2fc>)
 80086e6:	7429      	strb	r1, [r5, #16]
 80086e8:	7631      	strb	r1, [r6, #24]
        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL]   = data_buf[INDEX_ATT_3_5G_UL];
 80086ea:	7c63      	ldrb	r3, [r4, #17]
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1];
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2];
        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3];
        printf("YJ : data0  : %x \r\n",ALL_ATT_3_5G.data0);
 80086ec:	4836      	ldr	r0, [pc, #216]	; (80087c8 <RF_Operate+0x300>)
        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL]   = data_buf[INDEX_ATT_3_5G_UL];
 80086ee:	746b      	strb	r3, [r5, #17]
 80086f0:	f886 3034 	strb.w	r3, [r6, #52]	; 0x34
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1];
 80086f4:	7ca3      	ldrb	r3, [r4, #18]
 80086f6:	74ab      	strb	r3, [r5, #18]
 80086f8:	f886 3050 	strb.w	r3, [r6, #80]	; 0x50
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2];
 80086fc:	7ce3      	ldrb	r3, [r4, #19]
 80086fe:	74eb      	strb	r3, [r5, #19]
 8008700:	f886 306c 	strb.w	r3, [r6, #108]	; 0x6c
        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3];
 8008704:	7d23      	ldrb	r3, [r4, #20]
 8008706:	752b      	strb	r3, [r5, #20]
 8008708:	f886 3088 	strb.w	r3, [r6, #136]	; 0x88
        printf("YJ : data0  : %x \r\n",ALL_ATT_3_5G.data0);
 800870c:	f000 ff00 	bl	8009510 <iprintf>
        printf("YJ : data1  : %x \r\n",ALL_ATT_3_5G.data1);
 8008710:	f896 1034 	ldrb.w	r1, [r6, #52]	; 0x34
 8008714:	482d      	ldr	r0, [pc, #180]	; (80087cc <RF_Operate+0x304>)
 8008716:	f000 fefb 	bl	8009510 <iprintf>
        printf("YJ : data2  : %x \r\n",ALL_ATT_3_5G.data2);
 800871a:	f896 1050 	ldrb.w	r1, [r6, #80]	; 0x50
 800871e:	482c      	ldr	r0, [pc, #176]	; (80087d0 <RF_Operate+0x308>)
 8008720:	f000 fef6 	bl	8009510 <iprintf>
        printf("YJ : data3  : %x \r\n",ALL_ATT_3_5G.data3);
 8008724:	f896 106c 	ldrb.w	r1, [r6, #108]	; 0x6c
 8008728:	482a      	ldr	r0, [pc, #168]	; (80087d4 <RF_Operate+0x30c>)
 800872a:	f000 fef1 	bl	8009510 <iprintf>
        printf("YJ : data4  : %x \r\n",ALL_ATT_3_5G.data4);
 800872e:	f896 1088 	ldrb.w	r1, [r6, #136]	; 0x88
 8008732:	4829      	ldr	r0, [pc, #164]	; (80087d8 <RF_Operate+0x310>)
 8008734:	f000 feec 	bl	8009510 <iprintf>
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008738:	227c      	movs	r2, #124	; 0x7c
 800873a:	f106 0110 	add.w	r1, r6, #16
 800873e:	4668      	mov	r0, sp
 8008740:	f000 fa72 	bl	8008c28 <memcpy>
 8008744:	e896 000f 	ldmia.w	r6, {r0, r1, r2, r3}
 8008748:	f7fe fb90 	bl	8006e6c <PE43711_ALL_atten_ctrl>
    }

    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
 800874c:	7d63      	ldrb	r3, [r4, #21]
 800874e:	7d6a      	ldrb	r2, [r5, #21]
 8008750:	429a      	cmp	r2, r3
 8008752:	d049      	beq.n	80087e8 <RF_Operate+0x320>
        && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
 8008754:	7da0      	ldrb	r0, [r4, #22]
 8008756:	7daa      	ldrb	r2, [r5, #22]
 8008758:	4282      	cmp	r2, r0
 800875a:	d045      	beq.n	80087e8 <RF_Operate+0x320>
    ){
        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
//        printf("INDEX_PLL_1_8G_DL_H : %x \r\n",temp_val);
        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
 800875c:	ea40 2003 	orr.w	r0, r0, r3, lsl #8
 8008760:	4b1e      	ldr	r3, [pc, #120]	; (80087dc <RF_Operate+0x314>)
 8008762:	4358      	muls	r0, r3
 8008764:	f7ff fbba 	bl	8007edc <halSynSetFreq>
 8008768:	4a1d      	ldr	r2, [pc, #116]	; (80087e0 <RF_Operate+0x318>)
 800876a:	4b1e      	ldr	r3, [pc, #120]	; (80087e4 <RF_Operate+0x31c>)
 800876c:	9204      	str	r2, [sp, #16]
 800876e:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008772:	9003      	str	r0, [sp, #12]
 8008774:	9202      	str	r2, [sp, #8]
 8008776:	f103 0210 	add.w	r2, r3, #16
 800877a:	e892 0003 	ldmia.w	r2, {r0, r1}
 800877e:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008782:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008784:	f7ff fbda 	bl	8007f3c <ADF4113_Module_Ctrl>
 8008788:	e02e      	b.n	80087e8 <RF_Operate+0x320>
 800878a:	bf00      	nop
 800878c:	20001654 	.word	0x20001654
 8008790:	0800ba79 	.word	0x0800ba79
 8008794:	20000008 	.word	0x20000008
 8008798:	20000020 	.word	0x20000020
 800879c:	20000038 	.word	0x20000038
 80087a0:	20000050 	.word	0x20000050
 80087a4:	20000068 	.word	0x20000068
 80087a8:	20000080 	.word	0x20000080
 80087ac:	20000098 	.word	0x20000098
 80087b0:	200000b0 	.word	0x200000b0
 80087b4:	200000c8 	.word	0x200000c8
 80087b8:	200000e0 	.word	0x200000e0
 80087bc:	200000f8 	.word	0x200000f8
 80087c0:	20000110 	.word	0x20000110
 80087c4:	2000043c 	.word	0x2000043c
 80087c8:	0800ba89 	.word	0x0800ba89
 80087cc:	0800ba9d 	.word	0x0800ba9d
 80087d0:	0800bab1 	.word	0x0800bab1
 80087d4:	0800bac5 	.word	0x0800bac5
 80087d8:	0800bad9 	.word	0x0800bad9
 80087dc:	000186a0 	.word	0x000186a0
 80087e0:	009f8092 	.word	0x009f8092
 80087e4:	200001a0 	.word	0x200001a0
    }
    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
 80087e8:	7de3      	ldrb	r3, [r4, #23]
 80087ea:	7dea      	ldrb	r2, [r5, #23]
 80087ec:	429a      	cmp	r2, r3
 80087ee:	d019      	beq.n	8008824 <RF_Operate+0x35c>
        && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
 80087f0:	7e20      	ldrb	r0, [r4, #24]
 80087f2:	7e2a      	ldrb	r2, [r5, #24]
 80087f4:	4282      	cmp	r2, r0
 80087f6:	d015      	beq.n	8008824 <RF_Operate+0x35c>
        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
 80087f8:	ea40 2003 	orr.w	r0, r0, r3, lsl #8
 80087fc:	4bac      	ldr	r3, [pc, #688]	; (8008ab0 <RF_Operate+0x5e8>)
 80087fe:	4358      	muls	r0, r3
 8008800:	f7ff fb6c 	bl	8007edc <halSynSetFreq>
 8008804:	4aab      	ldr	r2, [pc, #684]	; (8008ab4 <RF_Operate+0x5ec>)
 8008806:	4bac      	ldr	r3, [pc, #688]	; (8008ab8 <RF_Operate+0x5f0>)
 8008808:	9204      	str	r2, [sp, #16]
 800880a:	f44f 6282 	mov.w	r2, #1040	; 0x410
 800880e:	9003      	str	r0, [sp, #12]
 8008810:	9202      	str	r2, [sp, #8]
 8008812:	f103 0210 	add.w	r2, r3, #16
 8008816:	e892 0003 	ldmia.w	r2, {r0, r1}
 800881a:	e88d 0003 	stmia.w	sp, {r0, r1}
 800881e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008820:	f7ff fb8c 	bl	8007f3c <ADF4113_Module_Ctrl>
    }
    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
 8008824:	7e61      	ldrb	r1, [r4, #25]
 8008826:	7e6b      	ldrb	r3, [r5, #25]
 8008828:	428b      	cmp	r3, r1
 800882a:	d01d      	beq.n	8008868 <RF_Operate+0x3a0>
        && (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
 800882c:	7ea2      	ldrb	r2, [r4, #26]
 800882e:	7eab      	ldrb	r3, [r5, #26]
 8008830:	4293      	cmp	r3, r2
 8008832:	d019      	beq.n	8008868 <RF_Operate+0x3a0>
        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
        printf("data_buf[INDEX_PLL_2_1G_DL_H]  %x \r\ndata_buf[INDEX_PLL_2_1G_DL_L]  temp_val : %x\r\n ",data_buf[INDEX_PLL_2_1G_DL_H],data_buf[INDEX_PLL_2_1G_DL_L],temp_val);
 8008834:	ea42 2601 	orr.w	r6, r2, r1, lsl #8
 8008838:	4633      	mov	r3, r6
 800883a:	48a0      	ldr	r0, [pc, #640]	; (8008abc <RF_Operate+0x5f4>)
 800883c:	f000 fe68 	bl	8009510 <iprintf>
        ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
 8008840:	489b      	ldr	r0, [pc, #620]	; (8008ab0 <RF_Operate+0x5e8>)
 8008842:	4370      	muls	r0, r6
 8008844:	f7ff fb4a 	bl	8007edc <halSynSetFreq>
 8008848:	4a9a      	ldr	r2, [pc, #616]	; (8008ab4 <RF_Operate+0x5ec>)
 800884a:	4b9d      	ldr	r3, [pc, #628]	; (8008ac0 <RF_Operate+0x5f8>)
 800884c:	9204      	str	r2, [sp, #16]
 800884e:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008852:	9003      	str	r0, [sp, #12]
 8008854:	9202      	str	r2, [sp, #8]
 8008856:	f103 0210 	add.w	r2, r3, #16
 800885a:	e892 0003 	ldmia.w	r2, {r0, r1}
 800885e:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008862:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008864:	f7ff fb6a 	bl	8007f3c <ADF4113_Module_Ctrl>
    }
    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
 8008868:	7ee3      	ldrb	r3, [r4, #27]
 800886a:	7eea      	ldrb	r2, [r5, #27]
 800886c:	429a      	cmp	r2, r3
 800886e:	d019      	beq.n	80088a4 <RF_Operate+0x3dc>
        && (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
 8008870:	7f20      	ldrb	r0, [r4, #28]
 8008872:	7f2a      	ldrb	r2, [r5, #28]
 8008874:	4282      	cmp	r2, r0
 8008876:	d015      	beq.n	80088a4 <RF_Operate+0x3dc>
        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
 8008878:	ea40 2003 	orr.w	r0, r0, r3, lsl #8
 800887c:	4b8c      	ldr	r3, [pc, #560]	; (8008ab0 <RF_Operate+0x5e8>)
 800887e:	4358      	muls	r0, r3
 8008880:	f7ff fb2c 	bl	8007edc <halSynSetFreq>
 8008884:	4a8b      	ldr	r2, [pc, #556]	; (8008ab4 <RF_Operate+0x5ec>)
 8008886:	4b8f      	ldr	r3, [pc, #572]	; (8008ac4 <RF_Operate+0x5fc>)
 8008888:	9204      	str	r2, [sp, #16]
 800888a:	f44f 6282 	mov.w	r2, #1040	; 0x410
 800888e:	9003      	str	r0, [sp, #12]
 8008890:	9202      	str	r2, [sp, #8]
 8008892:	f103 0210 	add.w	r2, r3, #16
 8008896:	e892 0003 	ldmia.w	r2, {r0, r1}
 800889a:	e88d 0003 	stmia.w	sp, {r0, r1}
 800889e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80088a0:	f7ff fb4c 	bl	8007f3c <ADF4113_Module_Ctrl>

    }
    if((Prev_data[INDEX_PLL_3_5G_DL_H] != data_buf[INDEX_PLL_3_5G_DL_H])
 80088a4:	7f6a      	ldrb	r2, [r5, #29]
 80088a6:	7f63      	ldrb	r3, [r4, #29]
 80088a8:	429a      	cmp	r2, r3
 80088aa:	d02c      	beq.n	8008906 <RF_Operate+0x43e>
        && (Prev_data[INDEX_PLL_3_5G_DL_L] != data_buf[INDEX_PLL_3_5G_DL_L])){
 80088ac:	7faa      	ldrb	r2, [r5, #30]
 80088ae:	7fa3      	ldrb	r3, [r4, #30]
 80088b0:	429a      	cmp	r2, r3
 80088b2:	d028      	beq.n	8008906 <RF_Operate+0x43e>
        temp_val = (data_buf[INDEX_PLL_3_5G_DL_H] << 8) | (data_buf[INDEX_PLL_3_5G_DL_L]);
        ADF4153_Module_Ctrl(Pll_3_5_L,ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING),0x14be81,0x13c2,0x3);
 80088b4:	f241 3388 	movw	r3, #5000	; 0x1388
 80088b8:	9303      	str	r3, [sp, #12]
 80088ba:	2302      	movs	r3, #2
 80088bc:	9302      	str	r3, [sp, #8]
 80088be:	2300      	movs	r3, #0
 80088c0:	4a81      	ldr	r2, [pc, #516]	; (8008ac8 <RF_Operate+0x600>)
 80088c2:	ae20      	add	r6, sp, #128	; 0x80
 80088c4:	e9cd 2300 	strd	r2, r3, [sp]
 80088c8:	a375      	add	r3, pc, #468	; (adr r3, 8008aa0 <RF_Operate+0x5d8>)
 80088ca:	e9d3 2300 	ldrd	r2, r3, [r3]
 80088ce:	4630      	mov	r0, r6
 80088d0:	f7fe fc44 	bl	800715c <ADF4153_Freq_Calc>
 80088d4:	2203      	movs	r2, #3
 80088d6:	9206      	str	r2, [sp, #24]
 80088d8:	f241 32c2 	movw	r2, #5058	; 0x13c2
 80088dc:	9205      	str	r2, [sp, #20]
 80088de:	f502 12a5 	add.w	r2, r2, #1351680	; 0x14a000
 80088e2:	f602 22bf 	addw	r2, r2, #2751	; 0xabf
 80088e6:	9204      	str	r2, [sp, #16]
 80088e8:	aa02      	add	r2, sp, #8
 80088ea:	e896 0003 	ldmia.w	r6, {r0, r1}
 80088ee:	4b77      	ldr	r3, [pc, #476]	; (8008acc <RF_Operate+0x604>)
 80088f0:	e882 0003 	stmia.w	r2, {r0, r1}
 80088f4:	f103 0210 	add.w	r2, r3, #16
 80088f8:	e892 0003 	ldmia.w	r2, {r0, r1}
 80088fc:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008900:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008902:	f7fe fd2d 	bl	8007360 <ADF4153_Module_Ctrl>
    }
    if((Prev_data[INDEX_PLL_3_5G_UL_H] != data_buf[INDEX_PLL_3_5G_UL_H])
 8008906:	7fea      	ldrb	r2, [r5, #31]
 8008908:	7fe3      	ldrb	r3, [r4, #31]
 800890a:	429a      	cmp	r2, r3
 800890c:	d02e      	beq.n	800896c <RF_Operate+0x4a4>
        && (Prev_data[INDEX_PLL_3_5G_UL_L] != data_buf[INDEX_PLL_3_5G_UL_L])){
 800890e:	f895 2020 	ldrb.w	r2, [r5, #32]
 8008912:	f894 3020 	ldrb.w	r3, [r4, #32]
 8008916:	429a      	cmp	r2, r3
 8008918:	d028      	beq.n	800896c <RF_Operate+0x4a4>
        temp_val = (data_buf[INDEX_PLL_3_5G_UL_H] << 8) | (data_buf[INDEX_PLL_3_5G_UL_L]);
        ADF4153_Module_Ctrl(Pll_3_5_H,ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING),0x14be81,0x13c2,0x3);
 800891a:	f241 3388 	movw	r3, #5000	; 0x1388
 800891e:	9303      	str	r3, [sp, #12]
 8008920:	2302      	movs	r3, #2
 8008922:	9302      	str	r3, [sp, #8]
 8008924:	2300      	movs	r3, #0
 8008926:	4a68      	ldr	r2, [pc, #416]	; (8008ac8 <RF_Operate+0x600>)
 8008928:	ae22      	add	r6, sp, #136	; 0x88
 800892a:	e9cd 2300 	strd	r2, r3, [sp]
 800892e:	a35e      	add	r3, pc, #376	; (adr r3, 8008aa8 <RF_Operate+0x5e0>)
 8008930:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008934:	4630      	mov	r0, r6
 8008936:	f7fe fc11 	bl	800715c <ADF4153_Freq_Calc>
 800893a:	2203      	movs	r2, #3
 800893c:	9206      	str	r2, [sp, #24]
 800893e:	f241 32c2 	movw	r2, #5058	; 0x13c2
 8008942:	9205      	str	r2, [sp, #20]
 8008944:	f502 12a5 	add.w	r2, r2, #1351680	; 0x14a000
 8008948:	f602 22bf 	addw	r2, r2, #2751	; 0xabf
 800894c:	9204      	str	r2, [sp, #16]
 800894e:	aa02      	add	r2, sp, #8
 8008950:	e896 0003 	ldmia.w	r6, {r0, r1}
 8008954:	4b5e      	ldr	r3, [pc, #376]	; (8008ad0 <RF_Operate+0x608>)
 8008956:	e882 0003 	stmia.w	r2, {r0, r1}
 800895a:	f103 0210 	add.w	r2, r3, #16
 800895e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008962:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008966:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008968:	f7fe fcfa 	bl	8007360 <ADF4153_Module_Ctrl>

    }
    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){

    }
    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
 800896c:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 8008970:	f895 3040 	ldrb.w	r3, [r5, #64]	; 0x40
 8008974:	428b      	cmp	r3, r1
 8008976:	d002      	beq.n	800897e <RF_Operate+0x4b6>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 8008978:	2040      	movs	r0, #64	; 0x40
 800897a:	f7fe fe1d 	bl	80075b8 <Power_ON_OFF_Ctrl>
    }
    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
 800897e:	f895 2041 	ldrb.w	r2, [r5, #65]	; 0x41
 8008982:	f894 3041 	ldrb.w	r3, [r4, #65]	; 0x41
 8008986:	429a      	cmp	r2, r3
 8008988:	d004      	beq.n	8008994 <RF_Operate+0x4cc>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 800898a:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 800898e:	2041      	movs	r0, #65	; 0x41
 8008990:	f7fe fe12 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }

    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
 8008994:	f895 2042 	ldrb.w	r2, [r5, #66]	; 0x42
 8008998:	f894 3042 	ldrb.w	r3, [r4, #66]	; 0x42
 800899c:	429a      	cmp	r2, r3
 800899e:	d004      	beq.n	80089aa <RF_Operate+0x4e2>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 80089a0:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 80089a4:	2042      	movs	r0, #66	; 0x42
 80089a6:	f7fe fe07 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }
    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
 80089aa:	f895 2043 	ldrb.w	r2, [r5, #67]	; 0x43
 80089ae:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 80089b2:	429a      	cmp	r2, r3
 80089b4:	d004      	beq.n	80089c0 <RF_Operate+0x4f8>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 80089b6:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 80089ba:	2043      	movs	r0, #67	; 0x43
 80089bc:	f7fe fdfc 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
 80089c0:	f895 2044 	ldrb.w	r2, [r5, #68]	; 0x44
 80089c4:	f894 3044 	ldrb.w	r3, [r4, #68]	; 0x44
 80089c8:	429a      	cmp	r2, r3
 80089ca:	d004      	beq.n	80089d6 <RF_Operate+0x50e>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_1_8G_DL]);
 80089cc:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 80089d0:	2044      	movs	r0, #68	; 0x44
 80089d2:	f7fe fdf1 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
 80089d6:	f895 2045 	ldrb.w	r2, [r5, #69]	; 0x45
 80089da:	f894 3045 	ldrb.w	r3, [r4, #69]	; 0x45
 80089de:	429a      	cmp	r2, r3
 80089e0:	d004      	beq.n	80089ec <RF_Operate+0x524>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_1_8G_DL]);
 80089e2:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 80089e6:	2045      	movs	r0, #69	; 0x45
 80089e8:	f7fe fde6 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
 80089ec:	f895 2046 	ldrb.w	r2, [r5, #70]	; 0x46
 80089f0:	f894 3046 	ldrb.w	r3, [r4, #70]	; 0x46
 80089f4:	429a      	cmp	r2, r3
 80089f6:	d004      	beq.n	8008a02 <RF_Operate+0x53a>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 80089f8:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 80089fc:	2046      	movs	r0, #70	; 0x46
 80089fe:	f7fe fddb 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
 8008a02:	f895 2047 	ldrb.w	r2, [r5, #71]	; 0x47
 8008a06:	f894 3047 	ldrb.w	r3, [r4, #71]	; 0x47
 8008a0a:	429a      	cmp	r2, r3
 8008a0c:	d004      	beq.n	8008a18 <RF_Operate+0x550>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 8008a0e:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 8008a12:	2047      	movs	r0, #71	; 0x47
 8008a14:	f7fe fdd0 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }
    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
 8008a18:	f895 2048 	ldrb.w	r2, [r5, #72]	; 0x48
 8008a1c:	f894 3048 	ldrb.w	r3, [r4, #72]	; 0x48
 8008a20:	429a      	cmp	r2, r3
 8008a22:	d004      	beq.n	8008a2e <RF_Operate+0x566>
        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PATH_EN_1_8G_DL]);
 8008a24:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 8008a28:	2048      	movs	r0, #72	; 0x48
 8008a2a:	f7fe fdc5 	bl	80075b8 <Power_ON_OFF_Ctrl>

    }
    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
 8008a2e:	f895 2049 	ldrb.w	r2, [r5, #73]	; 0x49
 8008a32:	f894 3049 	ldrb.w	r3, [r4, #73]	; 0x49
 8008a36:	429a      	cmp	r2, r3
 8008a38:	d004      	beq.n	8008a44 <RF_Operate+0x57c>
        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PATH_EN_1_8G_DL]);
 8008a3a:	f894 1040 	ldrb.w	r1, [r4, #64]	; 0x40
 8008a3e:	2049      	movs	r0, #73	; 0x49
 8008a40:	f7fe fdba 	bl	80075b8 <Power_ON_OFF_Ctrl>
    }

    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
 8008a44:	f894 304a 	ldrb.w	r3, [r4, #74]	; 0x4a
 8008a48:	f895 204a 	ldrb.w	r2, [r5, #74]	; 0x4a
 8008a4c:	429a      	cmp	r2, r3
        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
 8008a4e:	bf18      	it	ne
 8008a50:	f885 304a 	strbne.w	r3, [r5, #74]	; 0x4a
    }
    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
 8008a54:	f894 304b 	ldrb.w	r3, [r4, #75]	; 0x4b
 8008a58:	f895 204b 	ldrb.w	r2, [r5, #75]	; 0x4b
 8008a5c:	429a      	cmp	r2, r3
        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
 8008a5e:	bf18      	it	ne
 8008a60:	f885 304b 	strbne.w	r3, [r5, #75]	; 0x4b
    }
    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
 8008a64:	4b1b      	ldr	r3, [pc, #108]	; (8008ad4 <RF_Operate+0x60c>)
 8008a66:	f894 204c 	ldrb.w	r2, [r4, #76]	; 0x4c
 8008a6a:	f893 104c 	ldrb.w	r1, [r3, #76]	; 0x4c
 8008a6e:	4291      	cmp	r1, r2
        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
 8008a70:	bf18      	it	ne
 8008a72:	f883 204c 	strbne.w	r2, [r3, #76]	; 0x4c
    }
    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
 8008a76:	f894 204d 	ldrb.w	r2, [r4, #77]	; 0x4d
 8008a7a:	f893 104d 	ldrb.w	r1, [r3, #77]	; 0x4d
 8008a7e:	4291      	cmp	r1, r2
 8008a80:	d009      	beq.n	8008a96 <RF_Operate+0x5ce>
        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
 8008a82:	204d      	movs	r0, #77	; 0x4d
        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
 8008a84:	f883 204d 	strb.w	r2, [r3, #77]	; 0x4d
        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
 8008a88:	f894 104d 	ldrb.w	r1, [r4, #77]	; 0x4d
    }
}
 8008a8c:	b024      	add	sp, #144	; 0x90
 8008a8e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
 8008a92:	f7fe bd91 	b.w	80075b8 <Power_ON_OFF_Ctrl>
}
 8008a96:	b024      	add	sp, #144	; 0x90
 8008a98:	bd70      	pop	{r4, r5, r6, pc}
 8008a9a:	bf00      	nop
 8008a9c:	f3af 8000 	nop.w
 8008aa0:	ce8f5560 	.word	0xce8f5560
 8008aa4:	00000000 	.word	0x00000000
 8008aa8:	ea83b4a0 	.word	0xea83b4a0
 8008aac:	00000000 	.word	0x00000000
 8008ab0:	000186a0 	.word	0x000186a0
 8008ab4:	009f8092 	.word	0x009f8092
 8008ab8:	200001b8 	.word	0x200001b8
 8008abc:	0800baed 	.word	0x0800baed
 8008ac0:	200001d0 	.word	0x200001d0
 8008ac4:	200001e8 	.word	0x200001e8
 8008ac8:	02625a00 	.word	0x02625a00
 8008acc:	2000021c 	.word	0x2000021c
 8008ad0:	20000204 	.word	0x20000204
 8008ad4:	20001654 	.word	0x20001654

08008ad8 <RF_Ctrl_Main>:

bool RF_Ctrl_Main(uint8_t* data_buf){
 8008ad8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8008ada:	4604      	mov	r4, r0
    bool ret = false;
    Bluecell_Prot_t type = data_buf[Type];
 8008adc:	7845      	ldrb	r5, [r0, #1]
    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
 8008ade:	f7ff fcd1 	bl	8008484 <RF_Data_Check>
    if(ret == false)
 8008ae2:	4606      	mov	r6, r0
 8008ae4:	2800      	cmp	r0, #0
 8008ae6:	d039      	beq.n	8008b5c <RF_Ctrl_Main+0x84>
    return ret;

    
    switch(type){
 8008ae8:	2d01      	cmp	r5, #1
 8008aea:	d028      	beq.n	8008b3e <RF_Ctrl_Main+0x66>
 8008aec:	d309      	bcc.n	8008b02 <RF_Ctrl_Main+0x2a>
 8008aee:	2d02      	cmp	r5, #2
 8008af0:	d034      	beq.n	8008b5c <RF_Ctrl_Main+0x84>
        
        break;
 
        default:
#ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN --         
            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
 8008af2:	462b      	mov	r3, r5
 8008af4:	f240 2211 	movw	r2, #529	; 0x211
 8008af8:	491c      	ldr	r1, [pc, #112]	; (8008b6c <RF_Ctrl_Main+0x94>)
 8008afa:	481d      	ldr	r0, [pc, #116]	; (8008b70 <RF_Ctrl_Main+0x98>)
 8008afc:	f000 fd08 	bl	8009510 <iprintf>
#endif
            break;
 8008b00:	e02c      	b.n	8008b5c <RF_Ctrl_Main+0x84>
    switch(type){
 8008b02:	2300      	movs	r3, #0
            printf("%02x ",data_buf[i]);
 8008b04:	4e1b      	ldr	r6, [pc, #108]	; (8008b74 <RF_Ctrl_Main+0x9c>)
        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
 8008b06:	78a2      	ldrb	r2, [r4, #2]
 8008b08:	1c5d      	adds	r5, r3, #1
 8008b0a:	3205      	adds	r2, #5
 8008b0c:	b2db      	uxtb	r3, r3
 8008b0e:	429a      	cmp	r2, r3
 8008b10:	da0f      	bge.n	8008b32 <RF_Ctrl_Main+0x5a>
        printf("Reset Start \r\n");
 8008b12:	4819      	ldr	r0, [pc, #100]	; (8008b78 <RF_Ctrl_Main+0xa0>)
 8008b14:	f000 fd84 	bl	8009620 <puts>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8008b18:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8008b1c:	4917      	ldr	r1, [pc, #92]	; (8008b7c <RF_Ctrl_Main+0xa4>)
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 8008b1e:	4b18      	ldr	r3, [pc, #96]	; (8008b80 <RF_Ctrl_Main+0xa8>)
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8008b20:	68ca      	ldr	r2, [r1, #12]
 8008b22:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 8008b26:	4313      	orrs	r3, r2
 8008b28:	60cb      	str	r3, [r1, #12]
 8008b2a:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("nop");
 8008b2e:	bf00      	nop
 8008b30:	e7fd      	b.n	8008b2e <RF_Ctrl_Main+0x56>
            printf("%02x ",data_buf[i]);
 8008b32:	5ce1      	ldrb	r1, [r4, r3]
 8008b34:	4630      	mov	r0, r6
 8008b36:	f000 fceb 	bl	8009510 <iprintf>
 8008b3a:	462b      	mov	r3, r5
 8008b3c:	e7e3      	b.n	8008b06 <RF_Ctrl_Main+0x2e>
    printf("TYPE_BLUECELL_SET : ");
 8008b3e:	4811      	ldr	r0, [pc, #68]	; (8008b84 <RF_Ctrl_Main+0xac>)
 8008b40:	f000 fce6 	bl	8009510 <iprintf>
    for(uint8_t i =0 ; i < data_buf[Length] - 1; i++)
 8008b44:	2500      	movs	r5, #0
        printf("%02x ",data_buf[4 + i]);
 8008b46:	4f0b      	ldr	r7, [pc, #44]	; (8008b74 <RF_Ctrl_Main+0x9c>)
    for(uint8_t i =0 ; i < data_buf[Length] - 1; i++)
 8008b48:	78a2      	ldrb	r2, [r4, #2]
 8008b4a:	b2eb      	uxtb	r3, r5
 8008b4c:	3a01      	subs	r2, #1
 8008b4e:	4293      	cmp	r3, r2
 8008b50:	f105 0501 	add.w	r5, r5, #1
 8008b54:	db04      	blt.n	8008b60 <RF_Ctrl_Main+0x88>
        RF_Operate(&data_buf[Header]);
 8008b56:	4620      	mov	r0, r4
 8008b58:	f7ff fcb6 	bl	80084c8 <RF_Operate>
    }
    return ret;
}
 8008b5c:	4630      	mov	r0, r6
 8008b5e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        printf("%02x ",data_buf[4 + i]);
 8008b60:	4423      	add	r3, r4
 8008b62:	7919      	ldrb	r1, [r3, #4]
 8008b64:	4638      	mov	r0, r7
 8008b66:	f000 fcd3 	bl	8009510 <iprintf>
 8008b6a:	e7ed      	b.n	8008b48 <RF_Ctrl_Main+0x70>
 8008b6c:	0800bb41 	.word	0x0800bb41
 8008b70:	0800ba03 	.word	0x0800ba03
 8008b74:	0800b9c5 	.word	0x0800b9c5
 8008b78:	0800b9e0 	.word	0x0800b9e0
 8008b7c:	e000ed00 	.word	0xe000ed00
 8008b80:	05fa0004 	.word	0x05fa0004
 8008b84:	0800b9ee 	.word	0x0800b9ee

08008b88 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8008b88:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8008b8a:	e003      	b.n	8008b94 <LoopCopyDataInit>

08008b8c <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8008b8c:	4b0b      	ldr	r3, [pc, #44]	; (8008bbc <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 8008b8e:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 8008b90:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 8008b92:	3104      	adds	r1, #4

08008b94 <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 8008b94:	480a      	ldr	r0, [pc, #40]	; (8008bc0 <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 8008b96:	4b0b      	ldr	r3, [pc, #44]	; (8008bc4 <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8008b98:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8008b9a:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8008b9c:	d3f6      	bcc.n	8008b8c <CopyDataInit>
  ldr r2, =_sbss
 8008b9e:	4a0a      	ldr	r2, [pc, #40]	; (8008bc8 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 8008ba0:	e002      	b.n	8008ba8 <LoopFillZerobss>

08008ba2 <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 8008ba2:	2300      	movs	r3, #0
  str r3, [r2], #4
 8008ba4:	f842 3b04 	str.w	r3, [r2], #4

08008ba8 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8008ba8:	4b08      	ldr	r3, [pc, #32]	; (8008bcc <LoopFillZerobss+0x24>)
  cmp r2, r3
 8008baa:	429a      	cmp	r2, r3
  bcc FillZerobss
 8008bac:	d3f9      	bcc.n	8008ba2 <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 8008bae:	f7ff fbe7 	bl	8008380 <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 8008bb2:	f000 f815 	bl	8008be0 <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 8008bb6:	f7fe fdf7 	bl	80077a8 <main>
  bx lr
 8008bba:	4770      	bx	lr
  ldr r3, =_sidata
 8008bbc:	0800be20 	.word	0x0800be20
  ldr r0, =_sdata
 8008bc0:	20000000 	.word	0x20000000
  ldr r3, =_edata
 8008bc4:	20000404 	.word	0x20000404
  ldr r2, =_sbss
 8008bc8:	20000404 	.word	0x20000404
  ldr r3, = _ebss
 8008bcc:	200016a8 	.word	0x200016a8

08008bd0 <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 8008bd0:	e7fe      	b.n	8008bd0 <ADC1_2_IRQHandler>
	...

08008bd4 <__errno>:
 8008bd4:	4b01      	ldr	r3, [pc, #4]	; (8008bdc <__errno+0x8>)
 8008bd6:	6818      	ldr	r0, [r3, #0]
 8008bd8:	4770      	bx	lr
 8008bda:	bf00      	nop
 8008bdc:	20000234 	.word	0x20000234

08008be0 <__libc_init_array>:
 8008be0:	b570      	push	{r4, r5, r6, lr}
 8008be2:	2500      	movs	r5, #0
 8008be4:	4e0c      	ldr	r6, [pc, #48]	; (8008c18 <__libc_init_array+0x38>)
 8008be6:	4c0d      	ldr	r4, [pc, #52]	; (8008c1c <__libc_init_array+0x3c>)
 8008be8:	1ba4      	subs	r4, r4, r6
 8008bea:	10a4      	asrs	r4, r4, #2
 8008bec:	42a5      	cmp	r5, r4
 8008bee:	d109      	bne.n	8008c04 <__libc_init_array+0x24>
 8008bf0:	f002 fcd6 	bl	800b5a0 <_init>
 8008bf4:	2500      	movs	r5, #0
 8008bf6:	4e0a      	ldr	r6, [pc, #40]	; (8008c20 <__libc_init_array+0x40>)
 8008bf8:	4c0a      	ldr	r4, [pc, #40]	; (8008c24 <__libc_init_array+0x44>)
 8008bfa:	1ba4      	subs	r4, r4, r6
 8008bfc:	10a4      	asrs	r4, r4, #2
 8008bfe:	42a5      	cmp	r5, r4
 8008c00:	d105      	bne.n	8008c0e <__libc_init_array+0x2e>
 8008c02:	bd70      	pop	{r4, r5, r6, pc}
 8008c04:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8008c08:	4798      	blx	r3
 8008c0a:	3501      	adds	r5, #1
 8008c0c:	e7ee      	b.n	8008bec <__libc_init_array+0xc>
 8008c0e:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8008c12:	4798      	blx	r3
 8008c14:	3501      	adds	r5, #1
 8008c16:	e7f2      	b.n	8008bfe <__libc_init_array+0x1e>
 8008c18:	0800be18 	.word	0x0800be18
 8008c1c:	0800be18 	.word	0x0800be18
 8008c20:	0800be18 	.word	0x0800be18
 8008c24:	0800be1c 	.word	0x0800be1c

08008c28 <memcpy>:
 8008c28:	b510      	push	{r4, lr}
 8008c2a:	1e43      	subs	r3, r0, #1
 8008c2c:	440a      	add	r2, r1
 8008c2e:	4291      	cmp	r1, r2
 8008c30:	d100      	bne.n	8008c34 <memcpy+0xc>
 8008c32:	bd10      	pop	{r4, pc}
 8008c34:	f811 4b01 	ldrb.w	r4, [r1], #1
 8008c38:	f803 4f01 	strb.w	r4, [r3, #1]!
 8008c3c:	e7f7      	b.n	8008c2e <memcpy+0x6>

08008c3e <memset>:
 8008c3e:	4603      	mov	r3, r0
 8008c40:	4402      	add	r2, r0
 8008c42:	4293      	cmp	r3, r2
 8008c44:	d100      	bne.n	8008c48 <memset+0xa>
 8008c46:	4770      	bx	lr
 8008c48:	f803 1b01 	strb.w	r1, [r3], #1
 8008c4c:	e7f9      	b.n	8008c42 <memset+0x4>

08008c4e <__cvt>:
 8008c4e:	2b00      	cmp	r3, #0
 8008c50:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8008c54:	461e      	mov	r6, r3
 8008c56:	bfbb      	ittet	lt
 8008c58:	f103 4300 	addlt.w	r3, r3, #2147483648	; 0x80000000
 8008c5c:	461e      	movlt	r6, r3
 8008c5e:	2300      	movge	r3, #0
 8008c60:	232d      	movlt	r3, #45	; 0x2d
 8008c62:	b088      	sub	sp, #32
 8008c64:	9f14      	ldr	r7, [sp, #80]	; 0x50
 8008c66:	9912      	ldr	r1, [sp, #72]	; 0x48
 8008c68:	f027 0720 	bic.w	r7, r7, #32
 8008c6c:	2f46      	cmp	r7, #70	; 0x46
 8008c6e:	4614      	mov	r4, r2
 8008c70:	9d10      	ldr	r5, [sp, #64]	; 0x40
 8008c72:	f8dd a04c 	ldr.w	sl, [sp, #76]	; 0x4c
 8008c76:	700b      	strb	r3, [r1, #0]
 8008c78:	d004      	beq.n	8008c84 <__cvt+0x36>
 8008c7a:	2f45      	cmp	r7, #69	; 0x45
 8008c7c:	d100      	bne.n	8008c80 <__cvt+0x32>
 8008c7e:	3501      	adds	r5, #1
 8008c80:	2302      	movs	r3, #2
 8008c82:	e000      	b.n	8008c86 <__cvt+0x38>
 8008c84:	2303      	movs	r3, #3
 8008c86:	aa07      	add	r2, sp, #28
 8008c88:	9204      	str	r2, [sp, #16]
 8008c8a:	aa06      	add	r2, sp, #24
 8008c8c:	9203      	str	r2, [sp, #12]
 8008c8e:	e88d 0428 	stmia.w	sp, {r3, r5, sl}
 8008c92:	4622      	mov	r2, r4
 8008c94:	4633      	mov	r3, r6
 8008c96:	f000 fecf 	bl	8009a38 <_dtoa_r>
 8008c9a:	2f47      	cmp	r7, #71	; 0x47
 8008c9c:	4680      	mov	r8, r0
 8008c9e:	d102      	bne.n	8008ca6 <__cvt+0x58>
 8008ca0:	9b11      	ldr	r3, [sp, #68]	; 0x44
 8008ca2:	07db      	lsls	r3, r3, #31
 8008ca4:	d526      	bpl.n	8008cf4 <__cvt+0xa6>
 8008ca6:	2f46      	cmp	r7, #70	; 0x46
 8008ca8:	eb08 0905 	add.w	r9, r8, r5
 8008cac:	d111      	bne.n	8008cd2 <__cvt+0x84>
 8008cae:	f898 3000 	ldrb.w	r3, [r8]
 8008cb2:	2b30      	cmp	r3, #48	; 0x30
 8008cb4:	d10a      	bne.n	8008ccc <__cvt+0x7e>
 8008cb6:	2200      	movs	r2, #0
 8008cb8:	2300      	movs	r3, #0
 8008cba:	4620      	mov	r0, r4
 8008cbc:	4631      	mov	r1, r6
 8008cbe:	f7fb fedb 	bl	8004a78 <__aeabi_dcmpeq>
 8008cc2:	b918      	cbnz	r0, 8008ccc <__cvt+0x7e>
 8008cc4:	f1c5 0501 	rsb	r5, r5, #1
 8008cc8:	f8ca 5000 	str.w	r5, [sl]
 8008ccc:	f8da 3000 	ldr.w	r3, [sl]
 8008cd0:	4499      	add	r9, r3
 8008cd2:	2200      	movs	r2, #0
 8008cd4:	2300      	movs	r3, #0
 8008cd6:	4620      	mov	r0, r4
 8008cd8:	4631      	mov	r1, r6
 8008cda:	f7fb fecd 	bl	8004a78 <__aeabi_dcmpeq>
 8008cde:	b938      	cbnz	r0, 8008cf0 <__cvt+0xa2>
 8008ce0:	2230      	movs	r2, #48	; 0x30
 8008ce2:	9b07      	ldr	r3, [sp, #28]
 8008ce4:	4599      	cmp	r9, r3
 8008ce6:	d905      	bls.n	8008cf4 <__cvt+0xa6>
 8008ce8:	1c59      	adds	r1, r3, #1
 8008cea:	9107      	str	r1, [sp, #28]
 8008cec:	701a      	strb	r2, [r3, #0]
 8008cee:	e7f8      	b.n	8008ce2 <__cvt+0x94>
 8008cf0:	f8cd 901c 	str.w	r9, [sp, #28]
 8008cf4:	4640      	mov	r0, r8
 8008cf6:	9b07      	ldr	r3, [sp, #28]
 8008cf8:	9a15      	ldr	r2, [sp, #84]	; 0x54
 8008cfa:	eba3 0308 	sub.w	r3, r3, r8
 8008cfe:	6013      	str	r3, [r2, #0]
 8008d00:	b008      	add	sp, #32
 8008d02:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}

08008d06 <__exponent>:
 8008d06:	4603      	mov	r3, r0
 8008d08:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 8008d0a:	2900      	cmp	r1, #0
 8008d0c:	f803 2b02 	strb.w	r2, [r3], #2
 8008d10:	bfb6      	itet	lt
 8008d12:	222d      	movlt	r2, #45	; 0x2d
 8008d14:	222b      	movge	r2, #43	; 0x2b
 8008d16:	4249      	neglt	r1, r1
 8008d18:	2909      	cmp	r1, #9
 8008d1a:	7042      	strb	r2, [r0, #1]
 8008d1c:	dd21      	ble.n	8008d62 <__exponent+0x5c>
 8008d1e:	f10d 0207 	add.w	r2, sp, #7
 8008d22:	4617      	mov	r7, r2
 8008d24:	260a      	movs	r6, #10
 8008d26:	fb91 f5f6 	sdiv	r5, r1, r6
 8008d2a:	fb06 1115 	mls	r1, r6, r5, r1
 8008d2e:	2d09      	cmp	r5, #9
 8008d30:	f101 0130 	add.w	r1, r1, #48	; 0x30
 8008d34:	f802 1c01 	strb.w	r1, [r2, #-1]
 8008d38:	f102 34ff 	add.w	r4, r2, #4294967295
 8008d3c:	4629      	mov	r1, r5
 8008d3e:	dc09      	bgt.n	8008d54 <__exponent+0x4e>
 8008d40:	3130      	adds	r1, #48	; 0x30
 8008d42:	3a02      	subs	r2, #2
 8008d44:	f804 1c01 	strb.w	r1, [r4, #-1]
 8008d48:	42ba      	cmp	r2, r7
 8008d4a:	461c      	mov	r4, r3
 8008d4c:	d304      	bcc.n	8008d58 <__exponent+0x52>
 8008d4e:	1a20      	subs	r0, r4, r0
 8008d50:	b003      	add	sp, #12
 8008d52:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8008d54:	4622      	mov	r2, r4
 8008d56:	e7e6      	b.n	8008d26 <__exponent+0x20>
 8008d58:	f812 1b01 	ldrb.w	r1, [r2], #1
 8008d5c:	f803 1b01 	strb.w	r1, [r3], #1
 8008d60:	e7f2      	b.n	8008d48 <__exponent+0x42>
 8008d62:	2230      	movs	r2, #48	; 0x30
 8008d64:	461c      	mov	r4, r3
 8008d66:	4411      	add	r1, r2
 8008d68:	f804 2b02 	strb.w	r2, [r4], #2
 8008d6c:	7059      	strb	r1, [r3, #1]
 8008d6e:	e7ee      	b.n	8008d4e <__exponent+0x48>

08008d70 <_printf_float>:
 8008d70:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8008d74:	b091      	sub	sp, #68	; 0x44
 8008d76:	460c      	mov	r4, r1
 8008d78:	9f1a      	ldr	r7, [sp, #104]	; 0x68
 8008d7a:	4693      	mov	fp, r2
 8008d7c:	461e      	mov	r6, r3
 8008d7e:	4605      	mov	r5, r0
 8008d80:	f001 fdaa 	bl	800a8d8 <_localeconv_r>
 8008d84:	6803      	ldr	r3, [r0, #0]
 8008d86:	4618      	mov	r0, r3
 8008d88:	9309      	str	r3, [sp, #36]	; 0x24
 8008d8a:	f7fb fa4d 	bl	8004228 <strlen>
 8008d8e:	2300      	movs	r3, #0
 8008d90:	930e      	str	r3, [sp, #56]	; 0x38
 8008d92:	683b      	ldr	r3, [r7, #0]
 8008d94:	900a      	str	r0, [sp, #40]	; 0x28
 8008d96:	3307      	adds	r3, #7
 8008d98:	f023 0307 	bic.w	r3, r3, #7
 8008d9c:	f103 0208 	add.w	r2, r3, #8
 8008da0:	f894 8018 	ldrb.w	r8, [r4, #24]
 8008da4:	f8d4 a000 	ldr.w	sl, [r4]
 8008da8:	603a      	str	r2, [r7, #0]
 8008daa:	e9d3 2300 	ldrd	r2, r3, [r3]
 8008dae:	e9c4 2312 	strd	r2, r3, [r4, #72]	; 0x48
 8008db2:	f8d4 904c 	ldr.w	r9, [r4, #76]	; 0x4c
 8008db6:	6ca7      	ldr	r7, [r4, #72]	; 0x48
 8008db8:	f029 4300 	bic.w	r3, r9, #2147483648	; 0x80000000
 8008dbc:	930b      	str	r3, [sp, #44]	; 0x2c
 8008dbe:	f04f 32ff 	mov.w	r2, #4294967295
 8008dc2:	4ba6      	ldr	r3, [pc, #664]	; (800905c <_printf_float+0x2ec>)
 8008dc4:	4638      	mov	r0, r7
 8008dc6:	990b      	ldr	r1, [sp, #44]	; 0x2c
 8008dc8:	f7fb fe88 	bl	8004adc <__aeabi_dcmpun>
 8008dcc:	2800      	cmp	r0, #0
 8008dce:	f040 81f7 	bne.w	80091c0 <_printf_float+0x450>
 8008dd2:	f04f 32ff 	mov.w	r2, #4294967295
 8008dd6:	4ba1      	ldr	r3, [pc, #644]	; (800905c <_printf_float+0x2ec>)
 8008dd8:	4638      	mov	r0, r7
 8008dda:	990b      	ldr	r1, [sp, #44]	; 0x2c
 8008ddc:	f7fb fe60 	bl	8004aa0 <__aeabi_dcmple>
 8008de0:	2800      	cmp	r0, #0
 8008de2:	f040 81ed 	bne.w	80091c0 <_printf_float+0x450>
 8008de6:	2200      	movs	r2, #0
 8008de8:	2300      	movs	r3, #0
 8008dea:	4638      	mov	r0, r7
 8008dec:	4649      	mov	r1, r9
 8008dee:	f7fb fe4d 	bl	8004a8c <__aeabi_dcmplt>
 8008df2:	b110      	cbz	r0, 8008dfa <_printf_float+0x8a>
 8008df4:	232d      	movs	r3, #45	; 0x2d
 8008df6:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8008dfa:	4b99      	ldr	r3, [pc, #612]	; (8009060 <_printf_float+0x2f0>)
 8008dfc:	4f99      	ldr	r7, [pc, #612]	; (8009064 <_printf_float+0x2f4>)
 8008dfe:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 8008e02:	bf98      	it	ls
 8008e04:	461f      	movls	r7, r3
 8008e06:	2303      	movs	r3, #3
 8008e08:	f04f 0900 	mov.w	r9, #0
 8008e0c:	6123      	str	r3, [r4, #16]
 8008e0e:	f02a 0304 	bic.w	r3, sl, #4
 8008e12:	6023      	str	r3, [r4, #0]
 8008e14:	9600      	str	r6, [sp, #0]
 8008e16:	465b      	mov	r3, fp
 8008e18:	aa0f      	add	r2, sp, #60	; 0x3c
 8008e1a:	4621      	mov	r1, r4
 8008e1c:	4628      	mov	r0, r5
 8008e1e:	f000 f9df 	bl	80091e0 <_printf_common>
 8008e22:	3001      	adds	r0, #1
 8008e24:	f040 809a 	bne.w	8008f5c <_printf_float+0x1ec>
 8008e28:	f04f 30ff 	mov.w	r0, #4294967295
 8008e2c:	b011      	add	sp, #68	; 0x44
 8008e2e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8008e32:	6862      	ldr	r2, [r4, #4]
 8008e34:	a80e      	add	r0, sp, #56	; 0x38
 8008e36:	1c53      	adds	r3, r2, #1
 8008e38:	f10d 0e34 	add.w	lr, sp, #52	; 0x34
 8008e3c:	f44a 6380 	orr.w	r3, sl, #1024	; 0x400
 8008e40:	d141      	bne.n	8008ec6 <_printf_float+0x156>
 8008e42:	2206      	movs	r2, #6
 8008e44:	6062      	str	r2, [r4, #4]
 8008e46:	2100      	movs	r1, #0
 8008e48:	6023      	str	r3, [r4, #0]
 8008e4a:	9301      	str	r3, [sp, #4]
 8008e4c:	6863      	ldr	r3, [r4, #4]
 8008e4e:	f10d 0233 	add.w	r2, sp, #51	; 0x33
 8008e52:	9005      	str	r0, [sp, #20]
 8008e54:	9202      	str	r2, [sp, #8]
 8008e56:	9300      	str	r3, [sp, #0]
 8008e58:	463a      	mov	r2, r7
 8008e5a:	464b      	mov	r3, r9
 8008e5c:	9106      	str	r1, [sp, #24]
 8008e5e:	f8cd 8010 	str.w	r8, [sp, #16]
 8008e62:	f8cd e00c 	str.w	lr, [sp, #12]
 8008e66:	4628      	mov	r0, r5
 8008e68:	f7ff fef1 	bl	8008c4e <__cvt>
 8008e6c:	f008 03df 	and.w	r3, r8, #223	; 0xdf
 8008e70:	2b47      	cmp	r3, #71	; 0x47
 8008e72:	4607      	mov	r7, r0
 8008e74:	d109      	bne.n	8008e8a <_printf_float+0x11a>
 8008e76:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8008e78:	1cd8      	adds	r0, r3, #3
 8008e7a:	db02      	blt.n	8008e82 <_printf_float+0x112>
 8008e7c:	6862      	ldr	r2, [r4, #4]
 8008e7e:	4293      	cmp	r3, r2
 8008e80:	dd59      	ble.n	8008f36 <_printf_float+0x1c6>
 8008e82:	f1a8 0802 	sub.w	r8, r8, #2
 8008e86:	fa5f f888 	uxtb.w	r8, r8
 8008e8a:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 8008e8e:	990d      	ldr	r1, [sp, #52]	; 0x34
 8008e90:	d836      	bhi.n	8008f00 <_printf_float+0x190>
 8008e92:	3901      	subs	r1, #1
 8008e94:	4642      	mov	r2, r8
 8008e96:	f104 0050 	add.w	r0, r4, #80	; 0x50
 8008e9a:	910d      	str	r1, [sp, #52]	; 0x34
 8008e9c:	f7ff ff33 	bl	8008d06 <__exponent>
 8008ea0:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8008ea2:	4681      	mov	r9, r0
 8008ea4:	1883      	adds	r3, r0, r2
 8008ea6:	2a01      	cmp	r2, #1
 8008ea8:	6123      	str	r3, [r4, #16]
 8008eaa:	dc02      	bgt.n	8008eb2 <_printf_float+0x142>
 8008eac:	6822      	ldr	r2, [r4, #0]
 8008eae:	07d1      	lsls	r1, r2, #31
 8008eb0:	d501      	bpl.n	8008eb6 <_printf_float+0x146>
 8008eb2:	3301      	adds	r3, #1
 8008eb4:	6123      	str	r3, [r4, #16]
 8008eb6:	f89d 3033 	ldrb.w	r3, [sp, #51]	; 0x33
 8008eba:	2b00      	cmp	r3, #0
 8008ebc:	d0aa      	beq.n	8008e14 <_printf_float+0xa4>
 8008ebe:	232d      	movs	r3, #45	; 0x2d
 8008ec0:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8008ec4:	e7a6      	b.n	8008e14 <_printf_float+0xa4>
 8008ec6:	f1b8 0f67 	cmp.w	r8, #103	; 0x67
 8008eca:	d002      	beq.n	8008ed2 <_printf_float+0x162>
 8008ecc:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 8008ed0:	d1b9      	bne.n	8008e46 <_printf_float+0xd6>
 8008ed2:	b19a      	cbz	r2, 8008efc <_printf_float+0x18c>
 8008ed4:	2100      	movs	r1, #0
 8008ed6:	9106      	str	r1, [sp, #24]
 8008ed8:	f10d 0133 	add.w	r1, sp, #51	; 0x33
 8008edc:	e88d 000c 	stmia.w	sp, {r2, r3}
 8008ee0:	6023      	str	r3, [r4, #0]
 8008ee2:	9005      	str	r0, [sp, #20]
 8008ee4:	463a      	mov	r2, r7
 8008ee6:	f8cd 8010 	str.w	r8, [sp, #16]
 8008eea:	f8cd e00c 	str.w	lr, [sp, #12]
 8008eee:	9102      	str	r1, [sp, #8]
 8008ef0:	464b      	mov	r3, r9
 8008ef2:	4628      	mov	r0, r5
 8008ef4:	f7ff feab 	bl	8008c4e <__cvt>
 8008ef8:	4607      	mov	r7, r0
 8008efa:	e7bc      	b.n	8008e76 <_printf_float+0x106>
 8008efc:	2201      	movs	r2, #1
 8008efe:	e7a1      	b.n	8008e44 <_printf_float+0xd4>
 8008f00:	f1b8 0f66 	cmp.w	r8, #102	; 0x66
 8008f04:	d119      	bne.n	8008f3a <_printf_float+0x1ca>
 8008f06:	2900      	cmp	r1, #0
 8008f08:	6863      	ldr	r3, [r4, #4]
 8008f0a:	dd0c      	ble.n	8008f26 <_printf_float+0x1b6>
 8008f0c:	6121      	str	r1, [r4, #16]
 8008f0e:	b913      	cbnz	r3, 8008f16 <_printf_float+0x1a6>
 8008f10:	6822      	ldr	r2, [r4, #0]
 8008f12:	07d2      	lsls	r2, r2, #31
 8008f14:	d502      	bpl.n	8008f1c <_printf_float+0x1ac>
 8008f16:	3301      	adds	r3, #1
 8008f18:	440b      	add	r3, r1
 8008f1a:	6123      	str	r3, [r4, #16]
 8008f1c:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8008f1e:	f04f 0900 	mov.w	r9, #0
 8008f22:	65a3      	str	r3, [r4, #88]	; 0x58
 8008f24:	e7c7      	b.n	8008eb6 <_printf_float+0x146>
 8008f26:	b913      	cbnz	r3, 8008f2e <_printf_float+0x1be>
 8008f28:	6822      	ldr	r2, [r4, #0]
 8008f2a:	07d0      	lsls	r0, r2, #31
 8008f2c:	d501      	bpl.n	8008f32 <_printf_float+0x1c2>
 8008f2e:	3302      	adds	r3, #2
 8008f30:	e7f3      	b.n	8008f1a <_printf_float+0x1aa>
 8008f32:	2301      	movs	r3, #1
 8008f34:	e7f1      	b.n	8008f1a <_printf_float+0x1aa>
 8008f36:	f04f 0867 	mov.w	r8, #103	; 0x67
 8008f3a:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8008f3c:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8008f3e:	4293      	cmp	r3, r2
 8008f40:	db05      	blt.n	8008f4e <_printf_float+0x1de>
 8008f42:	6822      	ldr	r2, [r4, #0]
 8008f44:	6123      	str	r3, [r4, #16]
 8008f46:	07d1      	lsls	r1, r2, #31
 8008f48:	d5e8      	bpl.n	8008f1c <_printf_float+0x1ac>
 8008f4a:	3301      	adds	r3, #1
 8008f4c:	e7e5      	b.n	8008f1a <_printf_float+0x1aa>
 8008f4e:	2b00      	cmp	r3, #0
 8008f50:	bfcc      	ite	gt
 8008f52:	2301      	movgt	r3, #1
 8008f54:	f1c3 0302 	rsble	r3, r3, #2
 8008f58:	4413      	add	r3, r2
 8008f5a:	e7de      	b.n	8008f1a <_printf_float+0x1aa>
 8008f5c:	6823      	ldr	r3, [r4, #0]
 8008f5e:	055a      	lsls	r2, r3, #21
 8008f60:	d407      	bmi.n	8008f72 <_printf_float+0x202>
 8008f62:	6923      	ldr	r3, [r4, #16]
 8008f64:	463a      	mov	r2, r7
 8008f66:	4659      	mov	r1, fp
 8008f68:	4628      	mov	r0, r5
 8008f6a:	47b0      	blx	r6
 8008f6c:	3001      	adds	r0, #1
 8008f6e:	d12a      	bne.n	8008fc6 <_printf_float+0x256>
 8008f70:	e75a      	b.n	8008e28 <_printf_float+0xb8>
 8008f72:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 8008f76:	f240 80dc 	bls.w	8009132 <_printf_float+0x3c2>
 8008f7a:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 8008f7e:	2200      	movs	r2, #0
 8008f80:	2300      	movs	r3, #0
 8008f82:	f7fb fd79 	bl	8004a78 <__aeabi_dcmpeq>
 8008f86:	2800      	cmp	r0, #0
 8008f88:	d039      	beq.n	8008ffe <_printf_float+0x28e>
 8008f8a:	2301      	movs	r3, #1
 8008f8c:	4a36      	ldr	r2, [pc, #216]	; (8009068 <_printf_float+0x2f8>)
 8008f8e:	4659      	mov	r1, fp
 8008f90:	4628      	mov	r0, r5
 8008f92:	47b0      	blx	r6
 8008f94:	3001      	adds	r0, #1
 8008f96:	f43f af47 	beq.w	8008e28 <_printf_float+0xb8>
 8008f9a:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8008f9c:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8008f9e:	429a      	cmp	r2, r3
 8008fa0:	db02      	blt.n	8008fa8 <_printf_float+0x238>
 8008fa2:	6823      	ldr	r3, [r4, #0]
 8008fa4:	07d8      	lsls	r0, r3, #31
 8008fa6:	d50e      	bpl.n	8008fc6 <_printf_float+0x256>
 8008fa8:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8008faa:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8008fac:	4659      	mov	r1, fp
 8008fae:	4628      	mov	r0, r5
 8008fb0:	47b0      	blx	r6
 8008fb2:	3001      	adds	r0, #1
 8008fb4:	f43f af38 	beq.w	8008e28 <_printf_float+0xb8>
 8008fb8:	2700      	movs	r7, #0
 8008fba:	f104 081a 	add.w	r8, r4, #26
 8008fbe:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8008fc0:	3b01      	subs	r3, #1
 8008fc2:	429f      	cmp	r7, r3
 8008fc4:	db11      	blt.n	8008fea <_printf_float+0x27a>
 8008fc6:	6823      	ldr	r3, [r4, #0]
 8008fc8:	079f      	lsls	r7, r3, #30
 8008fca:	d508      	bpl.n	8008fde <_printf_float+0x26e>
 8008fcc:	2700      	movs	r7, #0
 8008fce:	f104 0819 	add.w	r8, r4, #25
 8008fd2:	68e3      	ldr	r3, [r4, #12]
 8008fd4:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
 8008fd6:	1a9b      	subs	r3, r3, r2
 8008fd8:	429f      	cmp	r7, r3
 8008fda:	f2c0 80e7 	blt.w	80091ac <_printf_float+0x43c>
 8008fde:	68e0      	ldr	r0, [r4, #12]
 8008fe0:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
 8008fe2:	4298      	cmp	r0, r3
 8008fe4:	bfb8      	it	lt
 8008fe6:	4618      	movlt	r0, r3
 8008fe8:	e720      	b.n	8008e2c <_printf_float+0xbc>
 8008fea:	2301      	movs	r3, #1
 8008fec:	4642      	mov	r2, r8
 8008fee:	4659      	mov	r1, fp
 8008ff0:	4628      	mov	r0, r5
 8008ff2:	47b0      	blx	r6
 8008ff4:	3001      	adds	r0, #1
 8008ff6:	f43f af17 	beq.w	8008e28 <_printf_float+0xb8>
 8008ffa:	3701      	adds	r7, #1
 8008ffc:	e7df      	b.n	8008fbe <_printf_float+0x24e>
 8008ffe:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009000:	2b00      	cmp	r3, #0
 8009002:	dc33      	bgt.n	800906c <_printf_float+0x2fc>
 8009004:	2301      	movs	r3, #1
 8009006:	4a18      	ldr	r2, [pc, #96]	; (8009068 <_printf_float+0x2f8>)
 8009008:	4659      	mov	r1, fp
 800900a:	4628      	mov	r0, r5
 800900c:	47b0      	blx	r6
 800900e:	3001      	adds	r0, #1
 8009010:	f43f af0a 	beq.w	8008e28 <_printf_float+0xb8>
 8009014:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009016:	b923      	cbnz	r3, 8009022 <_printf_float+0x2b2>
 8009018:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800901a:	b913      	cbnz	r3, 8009022 <_printf_float+0x2b2>
 800901c:	6823      	ldr	r3, [r4, #0]
 800901e:	07d9      	lsls	r1, r3, #31
 8009020:	d5d1      	bpl.n	8008fc6 <_printf_float+0x256>
 8009022:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8009024:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009026:	4659      	mov	r1, fp
 8009028:	4628      	mov	r0, r5
 800902a:	47b0      	blx	r6
 800902c:	3001      	adds	r0, #1
 800902e:	f43f aefb 	beq.w	8008e28 <_printf_float+0xb8>
 8009032:	f04f 0800 	mov.w	r8, #0
 8009036:	f104 091a 	add.w	r9, r4, #26
 800903a:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800903c:	425b      	negs	r3, r3
 800903e:	4598      	cmp	r8, r3
 8009040:	db01      	blt.n	8009046 <_printf_float+0x2d6>
 8009042:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009044:	e78e      	b.n	8008f64 <_printf_float+0x1f4>
 8009046:	2301      	movs	r3, #1
 8009048:	464a      	mov	r2, r9
 800904a:	4659      	mov	r1, fp
 800904c:	4628      	mov	r0, r5
 800904e:	47b0      	blx	r6
 8009050:	3001      	adds	r0, #1
 8009052:	f43f aee9 	beq.w	8008e28 <_printf_float+0xb8>
 8009056:	f108 0801 	add.w	r8, r8, #1
 800905a:	e7ee      	b.n	800903a <_printf_float+0x2ca>
 800905c:	7fefffff 	.word	0x7fefffff
 8009060:	0800bb54 	.word	0x0800bb54
 8009064:	0800bb58 	.word	0x0800bb58
 8009068:	0800bb64 	.word	0x0800bb64
 800906c:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 800906e:	6da3      	ldr	r3, [r4, #88]	; 0x58
 8009070:	429a      	cmp	r2, r3
 8009072:	bfa8      	it	ge
 8009074:	461a      	movge	r2, r3
 8009076:	2a00      	cmp	r2, #0
 8009078:	4690      	mov	r8, r2
 800907a:	dc36      	bgt.n	80090ea <_printf_float+0x37a>
 800907c:	f04f 0a00 	mov.w	sl, #0
 8009080:	f104 031a 	add.w	r3, r4, #26
 8009084:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 8009088:	930b      	str	r3, [sp, #44]	; 0x2c
 800908a:	f8d4 9058 	ldr.w	r9, [r4, #88]	; 0x58
 800908e:	eba9 0308 	sub.w	r3, r9, r8
 8009092:	459a      	cmp	sl, r3
 8009094:	db31      	blt.n	80090fa <_printf_float+0x38a>
 8009096:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009098:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 800909a:	429a      	cmp	r2, r3
 800909c:	db38      	blt.n	8009110 <_printf_float+0x3a0>
 800909e:	6823      	ldr	r3, [r4, #0]
 80090a0:	07da      	lsls	r2, r3, #31
 80090a2:	d435      	bmi.n	8009110 <_printf_float+0x3a0>
 80090a4:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 80090a6:	990d      	ldr	r1, [sp, #52]	; 0x34
 80090a8:	eba3 0209 	sub.w	r2, r3, r9
 80090ac:	eba3 0801 	sub.w	r8, r3, r1
 80090b0:	4590      	cmp	r8, r2
 80090b2:	bfa8      	it	ge
 80090b4:	4690      	movge	r8, r2
 80090b6:	f1b8 0f00 	cmp.w	r8, #0
 80090ba:	dc31      	bgt.n	8009120 <_printf_float+0x3b0>
 80090bc:	2700      	movs	r7, #0
 80090be:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 80090c2:	f104 091a 	add.w	r9, r4, #26
 80090c6:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 80090c8:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 80090ca:	1a9b      	subs	r3, r3, r2
 80090cc:	eba3 0308 	sub.w	r3, r3, r8
 80090d0:	429f      	cmp	r7, r3
 80090d2:	f6bf af78 	bge.w	8008fc6 <_printf_float+0x256>
 80090d6:	2301      	movs	r3, #1
 80090d8:	464a      	mov	r2, r9
 80090da:	4659      	mov	r1, fp
 80090dc:	4628      	mov	r0, r5
 80090de:	47b0      	blx	r6
 80090e0:	3001      	adds	r0, #1
 80090e2:	f43f aea1 	beq.w	8008e28 <_printf_float+0xb8>
 80090e6:	3701      	adds	r7, #1
 80090e8:	e7ed      	b.n	80090c6 <_printf_float+0x356>
 80090ea:	4613      	mov	r3, r2
 80090ec:	4659      	mov	r1, fp
 80090ee:	463a      	mov	r2, r7
 80090f0:	4628      	mov	r0, r5
 80090f2:	47b0      	blx	r6
 80090f4:	3001      	adds	r0, #1
 80090f6:	d1c1      	bne.n	800907c <_printf_float+0x30c>
 80090f8:	e696      	b.n	8008e28 <_printf_float+0xb8>
 80090fa:	2301      	movs	r3, #1
 80090fc:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
 80090fe:	4659      	mov	r1, fp
 8009100:	4628      	mov	r0, r5
 8009102:	47b0      	blx	r6
 8009104:	3001      	adds	r0, #1
 8009106:	f43f ae8f 	beq.w	8008e28 <_printf_float+0xb8>
 800910a:	f10a 0a01 	add.w	sl, sl, #1
 800910e:	e7bc      	b.n	800908a <_printf_float+0x31a>
 8009110:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8009112:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009114:	4659      	mov	r1, fp
 8009116:	4628      	mov	r0, r5
 8009118:	47b0      	blx	r6
 800911a:	3001      	adds	r0, #1
 800911c:	d1c2      	bne.n	80090a4 <_printf_float+0x334>
 800911e:	e683      	b.n	8008e28 <_printf_float+0xb8>
 8009120:	4643      	mov	r3, r8
 8009122:	eb07 0209 	add.w	r2, r7, r9
 8009126:	4659      	mov	r1, fp
 8009128:	4628      	mov	r0, r5
 800912a:	47b0      	blx	r6
 800912c:	3001      	adds	r0, #1
 800912e:	d1c5      	bne.n	80090bc <_printf_float+0x34c>
 8009130:	e67a      	b.n	8008e28 <_printf_float+0xb8>
 8009132:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8009134:	2a01      	cmp	r2, #1
 8009136:	dc01      	bgt.n	800913c <_printf_float+0x3cc>
 8009138:	07db      	lsls	r3, r3, #31
 800913a:	d534      	bpl.n	80091a6 <_printf_float+0x436>
 800913c:	2301      	movs	r3, #1
 800913e:	463a      	mov	r2, r7
 8009140:	4659      	mov	r1, fp
 8009142:	4628      	mov	r0, r5
 8009144:	47b0      	blx	r6
 8009146:	3001      	adds	r0, #1
 8009148:	f43f ae6e 	beq.w	8008e28 <_printf_float+0xb8>
 800914c:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 800914e:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009150:	4659      	mov	r1, fp
 8009152:	4628      	mov	r0, r5
 8009154:	47b0      	blx	r6
 8009156:	3001      	adds	r0, #1
 8009158:	f43f ae66 	beq.w	8008e28 <_printf_float+0xb8>
 800915c:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 8009160:	2200      	movs	r2, #0
 8009162:	2300      	movs	r3, #0
 8009164:	f7fb fc88 	bl	8004a78 <__aeabi_dcmpeq>
 8009168:	b150      	cbz	r0, 8009180 <_printf_float+0x410>
 800916a:	2700      	movs	r7, #0
 800916c:	f104 081a 	add.w	r8, r4, #26
 8009170:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009172:	3b01      	subs	r3, #1
 8009174:	429f      	cmp	r7, r3
 8009176:	db0c      	blt.n	8009192 <_printf_float+0x422>
 8009178:	464b      	mov	r3, r9
 800917a:	f104 0250 	add.w	r2, r4, #80	; 0x50
 800917e:	e6f2      	b.n	8008f66 <_printf_float+0x1f6>
 8009180:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009182:	1c7a      	adds	r2, r7, #1
 8009184:	3b01      	subs	r3, #1
 8009186:	4659      	mov	r1, fp
 8009188:	4628      	mov	r0, r5
 800918a:	47b0      	blx	r6
 800918c:	3001      	adds	r0, #1
 800918e:	d1f3      	bne.n	8009178 <_printf_float+0x408>
 8009190:	e64a      	b.n	8008e28 <_printf_float+0xb8>
 8009192:	2301      	movs	r3, #1
 8009194:	4642      	mov	r2, r8
 8009196:	4659      	mov	r1, fp
 8009198:	4628      	mov	r0, r5
 800919a:	47b0      	blx	r6
 800919c:	3001      	adds	r0, #1
 800919e:	f43f ae43 	beq.w	8008e28 <_printf_float+0xb8>
 80091a2:	3701      	adds	r7, #1
 80091a4:	e7e4      	b.n	8009170 <_printf_float+0x400>
 80091a6:	2301      	movs	r3, #1
 80091a8:	463a      	mov	r2, r7
 80091aa:	e7ec      	b.n	8009186 <_printf_float+0x416>
 80091ac:	2301      	movs	r3, #1
 80091ae:	4642      	mov	r2, r8
 80091b0:	4659      	mov	r1, fp
 80091b2:	4628      	mov	r0, r5
 80091b4:	47b0      	blx	r6
 80091b6:	3001      	adds	r0, #1
 80091b8:	f43f ae36 	beq.w	8008e28 <_printf_float+0xb8>
 80091bc:	3701      	adds	r7, #1
 80091be:	e708      	b.n	8008fd2 <_printf_float+0x262>
 80091c0:	463a      	mov	r2, r7
 80091c2:	464b      	mov	r3, r9
 80091c4:	4638      	mov	r0, r7
 80091c6:	4649      	mov	r1, r9
 80091c8:	f7fb fc88 	bl	8004adc <__aeabi_dcmpun>
 80091cc:	2800      	cmp	r0, #0
 80091ce:	f43f ae30 	beq.w	8008e32 <_printf_float+0xc2>
 80091d2:	4b01      	ldr	r3, [pc, #4]	; (80091d8 <_printf_float+0x468>)
 80091d4:	4f01      	ldr	r7, [pc, #4]	; (80091dc <_printf_float+0x46c>)
 80091d6:	e612      	b.n	8008dfe <_printf_float+0x8e>
 80091d8:	0800bb5c 	.word	0x0800bb5c
 80091dc:	0800bb60 	.word	0x0800bb60

080091e0 <_printf_common>:
 80091e0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80091e4:	4691      	mov	r9, r2
 80091e6:	461f      	mov	r7, r3
 80091e8:	688a      	ldr	r2, [r1, #8]
 80091ea:	690b      	ldr	r3, [r1, #16]
 80091ec:	4606      	mov	r6, r0
 80091ee:	4293      	cmp	r3, r2
 80091f0:	bfb8      	it	lt
 80091f2:	4613      	movlt	r3, r2
 80091f4:	f8c9 3000 	str.w	r3, [r9]
 80091f8:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 80091fc:	460c      	mov	r4, r1
 80091fe:	f8dd 8020 	ldr.w	r8, [sp, #32]
 8009202:	b112      	cbz	r2, 800920a <_printf_common+0x2a>
 8009204:	3301      	adds	r3, #1
 8009206:	f8c9 3000 	str.w	r3, [r9]
 800920a:	6823      	ldr	r3, [r4, #0]
 800920c:	0699      	lsls	r1, r3, #26
 800920e:	bf42      	ittt	mi
 8009210:	f8d9 3000 	ldrmi.w	r3, [r9]
 8009214:	3302      	addmi	r3, #2
 8009216:	f8c9 3000 	strmi.w	r3, [r9]
 800921a:	6825      	ldr	r5, [r4, #0]
 800921c:	f015 0506 	ands.w	r5, r5, #6
 8009220:	d107      	bne.n	8009232 <_printf_common+0x52>
 8009222:	f104 0a19 	add.w	sl, r4, #25
 8009226:	68e3      	ldr	r3, [r4, #12]
 8009228:	f8d9 2000 	ldr.w	r2, [r9]
 800922c:	1a9b      	subs	r3, r3, r2
 800922e:	429d      	cmp	r5, r3
 8009230:	db2a      	blt.n	8009288 <_printf_common+0xa8>
 8009232:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 8009236:	6822      	ldr	r2, [r4, #0]
 8009238:	3300      	adds	r3, #0
 800923a:	bf18      	it	ne
 800923c:	2301      	movne	r3, #1
 800923e:	0692      	lsls	r2, r2, #26
 8009240:	d42f      	bmi.n	80092a2 <_printf_common+0xc2>
 8009242:	f104 0243 	add.w	r2, r4, #67	; 0x43
 8009246:	4639      	mov	r1, r7
 8009248:	4630      	mov	r0, r6
 800924a:	47c0      	blx	r8
 800924c:	3001      	adds	r0, #1
 800924e:	d022      	beq.n	8009296 <_printf_common+0xb6>
 8009250:	6823      	ldr	r3, [r4, #0]
 8009252:	68e5      	ldr	r5, [r4, #12]
 8009254:	f003 0306 	and.w	r3, r3, #6
 8009258:	2b04      	cmp	r3, #4
 800925a:	bf18      	it	ne
 800925c:	2500      	movne	r5, #0
 800925e:	f8d9 2000 	ldr.w	r2, [r9]
 8009262:	f04f 0900 	mov.w	r9, #0
 8009266:	bf08      	it	eq
 8009268:	1aad      	subeq	r5, r5, r2
 800926a:	68a3      	ldr	r3, [r4, #8]
 800926c:	6922      	ldr	r2, [r4, #16]
 800926e:	bf08      	it	eq
 8009270:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8009274:	4293      	cmp	r3, r2
 8009276:	bfc4      	itt	gt
 8009278:	1a9b      	subgt	r3, r3, r2
 800927a:	18ed      	addgt	r5, r5, r3
 800927c:	341a      	adds	r4, #26
 800927e:	454d      	cmp	r5, r9
 8009280:	d11b      	bne.n	80092ba <_printf_common+0xda>
 8009282:	2000      	movs	r0, #0
 8009284:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8009288:	2301      	movs	r3, #1
 800928a:	4652      	mov	r2, sl
 800928c:	4639      	mov	r1, r7
 800928e:	4630      	mov	r0, r6
 8009290:	47c0      	blx	r8
 8009292:	3001      	adds	r0, #1
 8009294:	d103      	bne.n	800929e <_printf_common+0xbe>
 8009296:	f04f 30ff 	mov.w	r0, #4294967295
 800929a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800929e:	3501      	adds	r5, #1
 80092a0:	e7c1      	b.n	8009226 <_printf_common+0x46>
 80092a2:	2030      	movs	r0, #48	; 0x30
 80092a4:	18e1      	adds	r1, r4, r3
 80092a6:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 80092aa:	1c5a      	adds	r2, r3, #1
 80092ac:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 80092b0:	4422      	add	r2, r4
 80092b2:	3302      	adds	r3, #2
 80092b4:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 80092b8:	e7c3      	b.n	8009242 <_printf_common+0x62>
 80092ba:	2301      	movs	r3, #1
 80092bc:	4622      	mov	r2, r4
 80092be:	4639      	mov	r1, r7
 80092c0:	4630      	mov	r0, r6
 80092c2:	47c0      	blx	r8
 80092c4:	3001      	adds	r0, #1
 80092c6:	d0e6      	beq.n	8009296 <_printf_common+0xb6>
 80092c8:	f109 0901 	add.w	r9, r9, #1
 80092cc:	e7d7      	b.n	800927e <_printf_common+0x9e>
	...

080092d0 <_printf_i>:
 80092d0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 80092d4:	4617      	mov	r7, r2
 80092d6:	7e0a      	ldrb	r2, [r1, #24]
 80092d8:	b085      	sub	sp, #20
 80092da:	2a6e      	cmp	r2, #110	; 0x6e
 80092dc:	4698      	mov	r8, r3
 80092de:	4606      	mov	r6, r0
 80092e0:	460c      	mov	r4, r1
 80092e2:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 80092e4:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 80092e8:	f000 80bc 	beq.w	8009464 <_printf_i+0x194>
 80092ec:	d81a      	bhi.n	8009324 <_printf_i+0x54>
 80092ee:	2a63      	cmp	r2, #99	; 0x63
 80092f0:	d02e      	beq.n	8009350 <_printf_i+0x80>
 80092f2:	d80a      	bhi.n	800930a <_printf_i+0x3a>
 80092f4:	2a00      	cmp	r2, #0
 80092f6:	f000 80c8 	beq.w	800948a <_printf_i+0x1ba>
 80092fa:	2a58      	cmp	r2, #88	; 0x58
 80092fc:	f000 808a 	beq.w	8009414 <_printf_i+0x144>
 8009300:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8009304:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 8009308:	e02a      	b.n	8009360 <_printf_i+0x90>
 800930a:	2a64      	cmp	r2, #100	; 0x64
 800930c:	d001      	beq.n	8009312 <_printf_i+0x42>
 800930e:	2a69      	cmp	r2, #105	; 0x69
 8009310:	d1f6      	bne.n	8009300 <_printf_i+0x30>
 8009312:	6821      	ldr	r1, [r4, #0]
 8009314:	681a      	ldr	r2, [r3, #0]
 8009316:	f011 0f80 	tst.w	r1, #128	; 0x80
 800931a:	d023      	beq.n	8009364 <_printf_i+0x94>
 800931c:	1d11      	adds	r1, r2, #4
 800931e:	6019      	str	r1, [r3, #0]
 8009320:	6813      	ldr	r3, [r2, #0]
 8009322:	e027      	b.n	8009374 <_printf_i+0xa4>
 8009324:	2a73      	cmp	r2, #115	; 0x73
 8009326:	f000 80b4 	beq.w	8009492 <_printf_i+0x1c2>
 800932a:	d808      	bhi.n	800933e <_printf_i+0x6e>
 800932c:	2a6f      	cmp	r2, #111	; 0x6f
 800932e:	d02a      	beq.n	8009386 <_printf_i+0xb6>
 8009330:	2a70      	cmp	r2, #112	; 0x70
 8009332:	d1e5      	bne.n	8009300 <_printf_i+0x30>
 8009334:	680a      	ldr	r2, [r1, #0]
 8009336:	f042 0220 	orr.w	r2, r2, #32
 800933a:	600a      	str	r2, [r1, #0]
 800933c:	e003      	b.n	8009346 <_printf_i+0x76>
 800933e:	2a75      	cmp	r2, #117	; 0x75
 8009340:	d021      	beq.n	8009386 <_printf_i+0xb6>
 8009342:	2a78      	cmp	r2, #120	; 0x78
 8009344:	d1dc      	bne.n	8009300 <_printf_i+0x30>
 8009346:	2278      	movs	r2, #120	; 0x78
 8009348:	496f      	ldr	r1, [pc, #444]	; (8009508 <_printf_i+0x238>)
 800934a:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 800934e:	e064      	b.n	800941a <_printf_i+0x14a>
 8009350:	681a      	ldr	r2, [r3, #0]
 8009352:	f101 0542 	add.w	r5, r1, #66	; 0x42
 8009356:	1d11      	adds	r1, r2, #4
 8009358:	6019      	str	r1, [r3, #0]
 800935a:	6813      	ldr	r3, [r2, #0]
 800935c:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8009360:	2301      	movs	r3, #1
 8009362:	e0a3      	b.n	80094ac <_printf_i+0x1dc>
 8009364:	f011 0f40 	tst.w	r1, #64	; 0x40
 8009368:	f102 0104 	add.w	r1, r2, #4
 800936c:	6019      	str	r1, [r3, #0]
 800936e:	d0d7      	beq.n	8009320 <_printf_i+0x50>
 8009370:	f9b2 3000 	ldrsh.w	r3, [r2]
 8009374:	2b00      	cmp	r3, #0
 8009376:	da03      	bge.n	8009380 <_printf_i+0xb0>
 8009378:	222d      	movs	r2, #45	; 0x2d
 800937a:	425b      	negs	r3, r3
 800937c:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8009380:	4962      	ldr	r1, [pc, #392]	; (800950c <_printf_i+0x23c>)
 8009382:	220a      	movs	r2, #10
 8009384:	e017      	b.n	80093b6 <_printf_i+0xe6>
 8009386:	6820      	ldr	r0, [r4, #0]
 8009388:	6819      	ldr	r1, [r3, #0]
 800938a:	f010 0f80 	tst.w	r0, #128	; 0x80
 800938e:	d003      	beq.n	8009398 <_printf_i+0xc8>
 8009390:	1d08      	adds	r0, r1, #4
 8009392:	6018      	str	r0, [r3, #0]
 8009394:	680b      	ldr	r3, [r1, #0]
 8009396:	e006      	b.n	80093a6 <_printf_i+0xd6>
 8009398:	f010 0f40 	tst.w	r0, #64	; 0x40
 800939c:	f101 0004 	add.w	r0, r1, #4
 80093a0:	6018      	str	r0, [r3, #0]
 80093a2:	d0f7      	beq.n	8009394 <_printf_i+0xc4>
 80093a4:	880b      	ldrh	r3, [r1, #0]
 80093a6:	2a6f      	cmp	r2, #111	; 0x6f
 80093a8:	bf14      	ite	ne
 80093aa:	220a      	movne	r2, #10
 80093ac:	2208      	moveq	r2, #8
 80093ae:	4957      	ldr	r1, [pc, #348]	; (800950c <_printf_i+0x23c>)
 80093b0:	2000      	movs	r0, #0
 80093b2:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 80093b6:	6865      	ldr	r5, [r4, #4]
 80093b8:	2d00      	cmp	r5, #0
 80093ba:	60a5      	str	r5, [r4, #8]
 80093bc:	f2c0 809c 	blt.w	80094f8 <_printf_i+0x228>
 80093c0:	6820      	ldr	r0, [r4, #0]
 80093c2:	f020 0004 	bic.w	r0, r0, #4
 80093c6:	6020      	str	r0, [r4, #0]
 80093c8:	2b00      	cmp	r3, #0
 80093ca:	d13f      	bne.n	800944c <_printf_i+0x17c>
 80093cc:	2d00      	cmp	r5, #0
 80093ce:	f040 8095 	bne.w	80094fc <_printf_i+0x22c>
 80093d2:	4675      	mov	r5, lr
 80093d4:	2a08      	cmp	r2, #8
 80093d6:	d10b      	bne.n	80093f0 <_printf_i+0x120>
 80093d8:	6823      	ldr	r3, [r4, #0]
 80093da:	07da      	lsls	r2, r3, #31
 80093dc:	d508      	bpl.n	80093f0 <_printf_i+0x120>
 80093de:	6923      	ldr	r3, [r4, #16]
 80093e0:	6862      	ldr	r2, [r4, #4]
 80093e2:	429a      	cmp	r2, r3
 80093e4:	bfde      	ittt	le
 80093e6:	2330      	movle	r3, #48	; 0x30
 80093e8:	f805 3c01 	strble.w	r3, [r5, #-1]
 80093ec:	f105 35ff 	addle.w	r5, r5, #4294967295
 80093f0:	ebae 0305 	sub.w	r3, lr, r5
 80093f4:	6123      	str	r3, [r4, #16]
 80093f6:	f8cd 8000 	str.w	r8, [sp]
 80093fa:	463b      	mov	r3, r7
 80093fc:	aa03      	add	r2, sp, #12
 80093fe:	4621      	mov	r1, r4
 8009400:	4630      	mov	r0, r6
 8009402:	f7ff feed 	bl	80091e0 <_printf_common>
 8009406:	3001      	adds	r0, #1
 8009408:	d155      	bne.n	80094b6 <_printf_i+0x1e6>
 800940a:	f04f 30ff 	mov.w	r0, #4294967295
 800940e:	b005      	add	sp, #20
 8009410:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8009414:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8009418:	493c      	ldr	r1, [pc, #240]	; (800950c <_printf_i+0x23c>)
 800941a:	6822      	ldr	r2, [r4, #0]
 800941c:	6818      	ldr	r0, [r3, #0]
 800941e:	f012 0f80 	tst.w	r2, #128	; 0x80
 8009422:	f100 0504 	add.w	r5, r0, #4
 8009426:	601d      	str	r5, [r3, #0]
 8009428:	d001      	beq.n	800942e <_printf_i+0x15e>
 800942a:	6803      	ldr	r3, [r0, #0]
 800942c:	e002      	b.n	8009434 <_printf_i+0x164>
 800942e:	0655      	lsls	r5, r2, #25
 8009430:	d5fb      	bpl.n	800942a <_printf_i+0x15a>
 8009432:	8803      	ldrh	r3, [r0, #0]
 8009434:	07d0      	lsls	r0, r2, #31
 8009436:	bf44      	itt	mi
 8009438:	f042 0220 	orrmi.w	r2, r2, #32
 800943c:	6022      	strmi	r2, [r4, #0]
 800943e:	b91b      	cbnz	r3, 8009448 <_printf_i+0x178>
 8009440:	6822      	ldr	r2, [r4, #0]
 8009442:	f022 0220 	bic.w	r2, r2, #32
 8009446:	6022      	str	r2, [r4, #0]
 8009448:	2210      	movs	r2, #16
 800944a:	e7b1      	b.n	80093b0 <_printf_i+0xe0>
 800944c:	4675      	mov	r5, lr
 800944e:	fbb3 f0f2 	udiv	r0, r3, r2
 8009452:	fb02 3310 	mls	r3, r2, r0, r3
 8009456:	5ccb      	ldrb	r3, [r1, r3]
 8009458:	f805 3d01 	strb.w	r3, [r5, #-1]!
 800945c:	4603      	mov	r3, r0
 800945e:	2800      	cmp	r0, #0
 8009460:	d1f5      	bne.n	800944e <_printf_i+0x17e>
 8009462:	e7b7      	b.n	80093d4 <_printf_i+0x104>
 8009464:	6808      	ldr	r0, [r1, #0]
 8009466:	681a      	ldr	r2, [r3, #0]
 8009468:	f010 0f80 	tst.w	r0, #128	; 0x80
 800946c:	6949      	ldr	r1, [r1, #20]
 800946e:	d004      	beq.n	800947a <_printf_i+0x1aa>
 8009470:	1d10      	adds	r0, r2, #4
 8009472:	6018      	str	r0, [r3, #0]
 8009474:	6813      	ldr	r3, [r2, #0]
 8009476:	6019      	str	r1, [r3, #0]
 8009478:	e007      	b.n	800948a <_printf_i+0x1ba>
 800947a:	f010 0f40 	tst.w	r0, #64	; 0x40
 800947e:	f102 0004 	add.w	r0, r2, #4
 8009482:	6018      	str	r0, [r3, #0]
 8009484:	6813      	ldr	r3, [r2, #0]
 8009486:	d0f6      	beq.n	8009476 <_printf_i+0x1a6>
 8009488:	8019      	strh	r1, [r3, #0]
 800948a:	2300      	movs	r3, #0
 800948c:	4675      	mov	r5, lr
 800948e:	6123      	str	r3, [r4, #16]
 8009490:	e7b1      	b.n	80093f6 <_printf_i+0x126>
 8009492:	681a      	ldr	r2, [r3, #0]
 8009494:	1d11      	adds	r1, r2, #4
 8009496:	6019      	str	r1, [r3, #0]
 8009498:	6815      	ldr	r5, [r2, #0]
 800949a:	2100      	movs	r1, #0
 800949c:	6862      	ldr	r2, [r4, #4]
 800949e:	4628      	mov	r0, r5
 80094a0:	f001 fa94 	bl	800a9cc <memchr>
 80094a4:	b108      	cbz	r0, 80094aa <_printf_i+0x1da>
 80094a6:	1b40      	subs	r0, r0, r5
 80094a8:	6060      	str	r0, [r4, #4]
 80094aa:	6863      	ldr	r3, [r4, #4]
 80094ac:	6123      	str	r3, [r4, #16]
 80094ae:	2300      	movs	r3, #0
 80094b0:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 80094b4:	e79f      	b.n	80093f6 <_printf_i+0x126>
 80094b6:	6923      	ldr	r3, [r4, #16]
 80094b8:	462a      	mov	r2, r5
 80094ba:	4639      	mov	r1, r7
 80094bc:	4630      	mov	r0, r6
 80094be:	47c0      	blx	r8
 80094c0:	3001      	adds	r0, #1
 80094c2:	d0a2      	beq.n	800940a <_printf_i+0x13a>
 80094c4:	6823      	ldr	r3, [r4, #0]
 80094c6:	079b      	lsls	r3, r3, #30
 80094c8:	d507      	bpl.n	80094da <_printf_i+0x20a>
 80094ca:	2500      	movs	r5, #0
 80094cc:	f104 0919 	add.w	r9, r4, #25
 80094d0:	68e3      	ldr	r3, [r4, #12]
 80094d2:	9a03      	ldr	r2, [sp, #12]
 80094d4:	1a9b      	subs	r3, r3, r2
 80094d6:	429d      	cmp	r5, r3
 80094d8:	db05      	blt.n	80094e6 <_printf_i+0x216>
 80094da:	68e0      	ldr	r0, [r4, #12]
 80094dc:	9b03      	ldr	r3, [sp, #12]
 80094de:	4298      	cmp	r0, r3
 80094e0:	bfb8      	it	lt
 80094e2:	4618      	movlt	r0, r3
 80094e4:	e793      	b.n	800940e <_printf_i+0x13e>
 80094e6:	2301      	movs	r3, #1
 80094e8:	464a      	mov	r2, r9
 80094ea:	4639      	mov	r1, r7
 80094ec:	4630      	mov	r0, r6
 80094ee:	47c0      	blx	r8
 80094f0:	3001      	adds	r0, #1
 80094f2:	d08a      	beq.n	800940a <_printf_i+0x13a>
 80094f4:	3501      	adds	r5, #1
 80094f6:	e7eb      	b.n	80094d0 <_printf_i+0x200>
 80094f8:	2b00      	cmp	r3, #0
 80094fa:	d1a7      	bne.n	800944c <_printf_i+0x17c>
 80094fc:	780b      	ldrb	r3, [r1, #0]
 80094fe:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8009502:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8009506:	e765      	b.n	80093d4 <_printf_i+0x104>
 8009508:	0800bb77 	.word	0x0800bb77
 800950c:	0800bb66 	.word	0x0800bb66

08009510 <iprintf>:
 8009510:	b40f      	push	{r0, r1, r2, r3}
 8009512:	4b0a      	ldr	r3, [pc, #40]	; (800953c <iprintf+0x2c>)
 8009514:	b513      	push	{r0, r1, r4, lr}
 8009516:	681c      	ldr	r4, [r3, #0]
 8009518:	b124      	cbz	r4, 8009524 <iprintf+0x14>
 800951a:	69a3      	ldr	r3, [r4, #24]
 800951c:	b913      	cbnz	r3, 8009524 <iprintf+0x14>
 800951e:	4620      	mov	r0, r4
 8009520:	f001 f950 	bl	800a7c4 <__sinit>
 8009524:	ab05      	add	r3, sp, #20
 8009526:	9a04      	ldr	r2, [sp, #16]
 8009528:	68a1      	ldr	r1, [r4, #8]
 800952a:	4620      	mov	r0, r4
 800952c:	9301      	str	r3, [sp, #4]
 800952e:	f001 fe0d 	bl	800b14c <_vfiprintf_r>
 8009532:	b002      	add	sp, #8
 8009534:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8009538:	b004      	add	sp, #16
 800953a:	4770      	bx	lr
 800953c:	20000234 	.word	0x20000234

08009540 <putchar>:
 8009540:	b538      	push	{r3, r4, r5, lr}
 8009542:	4b08      	ldr	r3, [pc, #32]	; (8009564 <putchar+0x24>)
 8009544:	4605      	mov	r5, r0
 8009546:	681c      	ldr	r4, [r3, #0]
 8009548:	b124      	cbz	r4, 8009554 <putchar+0x14>
 800954a:	69a3      	ldr	r3, [r4, #24]
 800954c:	b913      	cbnz	r3, 8009554 <putchar+0x14>
 800954e:	4620      	mov	r0, r4
 8009550:	f001 f938 	bl	800a7c4 <__sinit>
 8009554:	68a2      	ldr	r2, [r4, #8]
 8009556:	4629      	mov	r1, r5
 8009558:	4620      	mov	r0, r4
 800955a:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800955e:	f001 bf0b 	b.w	800b378 <_putc_r>
 8009562:	bf00      	nop
 8009564:	20000234 	.word	0x20000234

08009568 <_puts_r>:
 8009568:	b570      	push	{r4, r5, r6, lr}
 800956a:	460e      	mov	r6, r1
 800956c:	4605      	mov	r5, r0
 800956e:	b118      	cbz	r0, 8009578 <_puts_r+0x10>
 8009570:	6983      	ldr	r3, [r0, #24]
 8009572:	b90b      	cbnz	r3, 8009578 <_puts_r+0x10>
 8009574:	f001 f926 	bl	800a7c4 <__sinit>
 8009578:	69ab      	ldr	r3, [r5, #24]
 800957a:	68ac      	ldr	r4, [r5, #8]
 800957c:	b913      	cbnz	r3, 8009584 <_puts_r+0x1c>
 800957e:	4628      	mov	r0, r5
 8009580:	f001 f920 	bl	800a7c4 <__sinit>
 8009584:	4b23      	ldr	r3, [pc, #140]	; (8009614 <_puts_r+0xac>)
 8009586:	429c      	cmp	r4, r3
 8009588:	d117      	bne.n	80095ba <_puts_r+0x52>
 800958a:	686c      	ldr	r4, [r5, #4]
 800958c:	89a3      	ldrh	r3, [r4, #12]
 800958e:	071b      	lsls	r3, r3, #28
 8009590:	d51d      	bpl.n	80095ce <_puts_r+0x66>
 8009592:	6923      	ldr	r3, [r4, #16]
 8009594:	b1db      	cbz	r3, 80095ce <_puts_r+0x66>
 8009596:	3e01      	subs	r6, #1
 8009598:	68a3      	ldr	r3, [r4, #8]
 800959a:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 800959e:	3b01      	subs	r3, #1
 80095a0:	60a3      	str	r3, [r4, #8]
 80095a2:	b9e9      	cbnz	r1, 80095e0 <_puts_r+0x78>
 80095a4:	2b00      	cmp	r3, #0
 80095a6:	da2e      	bge.n	8009606 <_puts_r+0x9e>
 80095a8:	4622      	mov	r2, r4
 80095aa:	210a      	movs	r1, #10
 80095ac:	4628      	mov	r0, r5
 80095ae:	f000 f8f5 	bl	800979c <__swbuf_r>
 80095b2:	3001      	adds	r0, #1
 80095b4:	d011      	beq.n	80095da <_puts_r+0x72>
 80095b6:	200a      	movs	r0, #10
 80095b8:	bd70      	pop	{r4, r5, r6, pc}
 80095ba:	4b17      	ldr	r3, [pc, #92]	; (8009618 <_puts_r+0xb0>)
 80095bc:	429c      	cmp	r4, r3
 80095be:	d101      	bne.n	80095c4 <_puts_r+0x5c>
 80095c0:	68ac      	ldr	r4, [r5, #8]
 80095c2:	e7e3      	b.n	800958c <_puts_r+0x24>
 80095c4:	4b15      	ldr	r3, [pc, #84]	; (800961c <_puts_r+0xb4>)
 80095c6:	429c      	cmp	r4, r3
 80095c8:	bf08      	it	eq
 80095ca:	68ec      	ldreq	r4, [r5, #12]
 80095cc:	e7de      	b.n	800958c <_puts_r+0x24>
 80095ce:	4621      	mov	r1, r4
 80095d0:	4628      	mov	r0, r5
 80095d2:	f000 f935 	bl	8009840 <__swsetup_r>
 80095d6:	2800      	cmp	r0, #0
 80095d8:	d0dd      	beq.n	8009596 <_puts_r+0x2e>
 80095da:	f04f 30ff 	mov.w	r0, #4294967295
 80095de:	bd70      	pop	{r4, r5, r6, pc}
 80095e0:	2b00      	cmp	r3, #0
 80095e2:	da04      	bge.n	80095ee <_puts_r+0x86>
 80095e4:	69a2      	ldr	r2, [r4, #24]
 80095e6:	4293      	cmp	r3, r2
 80095e8:	db06      	blt.n	80095f8 <_puts_r+0x90>
 80095ea:	290a      	cmp	r1, #10
 80095ec:	d004      	beq.n	80095f8 <_puts_r+0x90>
 80095ee:	6823      	ldr	r3, [r4, #0]
 80095f0:	1c5a      	adds	r2, r3, #1
 80095f2:	6022      	str	r2, [r4, #0]
 80095f4:	7019      	strb	r1, [r3, #0]
 80095f6:	e7cf      	b.n	8009598 <_puts_r+0x30>
 80095f8:	4622      	mov	r2, r4
 80095fa:	4628      	mov	r0, r5
 80095fc:	f000 f8ce 	bl	800979c <__swbuf_r>
 8009600:	3001      	adds	r0, #1
 8009602:	d1c9      	bne.n	8009598 <_puts_r+0x30>
 8009604:	e7e9      	b.n	80095da <_puts_r+0x72>
 8009606:	200a      	movs	r0, #10
 8009608:	6823      	ldr	r3, [r4, #0]
 800960a:	1c5a      	adds	r2, r3, #1
 800960c:	6022      	str	r2, [r4, #0]
 800960e:	7018      	strb	r0, [r3, #0]
 8009610:	bd70      	pop	{r4, r5, r6, pc}
 8009612:	bf00      	nop
 8009614:	0800bbb8 	.word	0x0800bbb8
 8009618:	0800bbd8 	.word	0x0800bbd8
 800961c:	0800bb98 	.word	0x0800bb98

08009620 <puts>:
 8009620:	4b02      	ldr	r3, [pc, #8]	; (800962c <puts+0xc>)
 8009622:	4601      	mov	r1, r0
 8009624:	6818      	ldr	r0, [r3, #0]
 8009626:	f7ff bf9f 	b.w	8009568 <_puts_r>
 800962a:	bf00      	nop
 800962c:	20000234 	.word	0x20000234

08009630 <setbuf>:
 8009630:	2900      	cmp	r1, #0
 8009632:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8009636:	bf0c      	ite	eq
 8009638:	2202      	moveq	r2, #2
 800963a:	2200      	movne	r2, #0
 800963c:	f000 b800 	b.w	8009640 <setvbuf>

08009640 <setvbuf>:
 8009640:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 8009644:	461d      	mov	r5, r3
 8009646:	4b51      	ldr	r3, [pc, #324]	; (800978c <setvbuf+0x14c>)
 8009648:	4604      	mov	r4, r0
 800964a:	681e      	ldr	r6, [r3, #0]
 800964c:	460f      	mov	r7, r1
 800964e:	4690      	mov	r8, r2
 8009650:	b126      	cbz	r6, 800965c <setvbuf+0x1c>
 8009652:	69b3      	ldr	r3, [r6, #24]
 8009654:	b913      	cbnz	r3, 800965c <setvbuf+0x1c>
 8009656:	4630      	mov	r0, r6
 8009658:	f001 f8b4 	bl	800a7c4 <__sinit>
 800965c:	4b4c      	ldr	r3, [pc, #304]	; (8009790 <setvbuf+0x150>)
 800965e:	429c      	cmp	r4, r3
 8009660:	d152      	bne.n	8009708 <setvbuf+0xc8>
 8009662:	6874      	ldr	r4, [r6, #4]
 8009664:	f1b8 0f02 	cmp.w	r8, #2
 8009668:	d006      	beq.n	8009678 <setvbuf+0x38>
 800966a:	f1b8 0f01 	cmp.w	r8, #1
 800966e:	f200 8089 	bhi.w	8009784 <setvbuf+0x144>
 8009672:	2d00      	cmp	r5, #0
 8009674:	f2c0 8086 	blt.w	8009784 <setvbuf+0x144>
 8009678:	4621      	mov	r1, r4
 800967a:	4630      	mov	r0, r6
 800967c:	f001 f838 	bl	800a6f0 <_fflush_r>
 8009680:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8009682:	b141      	cbz	r1, 8009696 <setvbuf+0x56>
 8009684:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8009688:	4299      	cmp	r1, r3
 800968a:	d002      	beq.n	8009692 <setvbuf+0x52>
 800968c:	4630      	mov	r0, r6
 800968e:	f001 fc8b 	bl	800afa8 <_free_r>
 8009692:	2300      	movs	r3, #0
 8009694:	6363      	str	r3, [r4, #52]	; 0x34
 8009696:	2300      	movs	r3, #0
 8009698:	61a3      	str	r3, [r4, #24]
 800969a:	6063      	str	r3, [r4, #4]
 800969c:	89a3      	ldrh	r3, [r4, #12]
 800969e:	061b      	lsls	r3, r3, #24
 80096a0:	d503      	bpl.n	80096aa <setvbuf+0x6a>
 80096a2:	6921      	ldr	r1, [r4, #16]
 80096a4:	4630      	mov	r0, r6
 80096a6:	f001 fc7f 	bl	800afa8 <_free_r>
 80096aa:	89a3      	ldrh	r3, [r4, #12]
 80096ac:	f1b8 0f02 	cmp.w	r8, #2
 80096b0:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 80096b4:	f023 0303 	bic.w	r3, r3, #3
 80096b8:	81a3      	strh	r3, [r4, #12]
 80096ba:	d05d      	beq.n	8009778 <setvbuf+0x138>
 80096bc:	ab01      	add	r3, sp, #4
 80096be:	466a      	mov	r2, sp
 80096c0:	4621      	mov	r1, r4
 80096c2:	4630      	mov	r0, r6
 80096c4:	f001 f916 	bl	800a8f4 <__swhatbuf_r>
 80096c8:	89a3      	ldrh	r3, [r4, #12]
 80096ca:	4318      	orrs	r0, r3
 80096cc:	81a0      	strh	r0, [r4, #12]
 80096ce:	bb2d      	cbnz	r5, 800971c <setvbuf+0xdc>
 80096d0:	9d00      	ldr	r5, [sp, #0]
 80096d2:	4628      	mov	r0, r5
 80096d4:	f001 f972 	bl	800a9bc <malloc>
 80096d8:	4607      	mov	r7, r0
 80096da:	2800      	cmp	r0, #0
 80096dc:	d14e      	bne.n	800977c <setvbuf+0x13c>
 80096de:	f8dd 9000 	ldr.w	r9, [sp]
 80096e2:	45a9      	cmp	r9, r5
 80096e4:	d13c      	bne.n	8009760 <setvbuf+0x120>
 80096e6:	f04f 30ff 	mov.w	r0, #4294967295
 80096ea:	89a3      	ldrh	r3, [r4, #12]
 80096ec:	f043 0302 	orr.w	r3, r3, #2
 80096f0:	81a3      	strh	r3, [r4, #12]
 80096f2:	2300      	movs	r3, #0
 80096f4:	60a3      	str	r3, [r4, #8]
 80096f6:	f104 0347 	add.w	r3, r4, #71	; 0x47
 80096fa:	6023      	str	r3, [r4, #0]
 80096fc:	6123      	str	r3, [r4, #16]
 80096fe:	2301      	movs	r3, #1
 8009700:	6163      	str	r3, [r4, #20]
 8009702:	b003      	add	sp, #12
 8009704:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8009708:	4b22      	ldr	r3, [pc, #136]	; (8009794 <setvbuf+0x154>)
 800970a:	429c      	cmp	r4, r3
 800970c:	d101      	bne.n	8009712 <setvbuf+0xd2>
 800970e:	68b4      	ldr	r4, [r6, #8]
 8009710:	e7a8      	b.n	8009664 <setvbuf+0x24>
 8009712:	4b21      	ldr	r3, [pc, #132]	; (8009798 <setvbuf+0x158>)
 8009714:	429c      	cmp	r4, r3
 8009716:	bf08      	it	eq
 8009718:	68f4      	ldreq	r4, [r6, #12]
 800971a:	e7a3      	b.n	8009664 <setvbuf+0x24>
 800971c:	2f00      	cmp	r7, #0
 800971e:	d0d8      	beq.n	80096d2 <setvbuf+0x92>
 8009720:	69b3      	ldr	r3, [r6, #24]
 8009722:	b913      	cbnz	r3, 800972a <setvbuf+0xea>
 8009724:	4630      	mov	r0, r6
 8009726:	f001 f84d 	bl	800a7c4 <__sinit>
 800972a:	f1b8 0f01 	cmp.w	r8, #1
 800972e:	bf08      	it	eq
 8009730:	89a3      	ldrheq	r3, [r4, #12]
 8009732:	6027      	str	r7, [r4, #0]
 8009734:	bf04      	itt	eq
 8009736:	f043 0301 	orreq.w	r3, r3, #1
 800973a:	81a3      	strheq	r3, [r4, #12]
 800973c:	89a3      	ldrh	r3, [r4, #12]
 800973e:	6127      	str	r7, [r4, #16]
 8009740:	f013 0008 	ands.w	r0, r3, #8
 8009744:	6165      	str	r5, [r4, #20]
 8009746:	d01b      	beq.n	8009780 <setvbuf+0x140>
 8009748:	f013 0001 	ands.w	r0, r3, #1
 800974c:	f04f 0300 	mov.w	r3, #0
 8009750:	bf1f      	itttt	ne
 8009752:	426d      	negne	r5, r5
 8009754:	60a3      	strne	r3, [r4, #8]
 8009756:	61a5      	strne	r5, [r4, #24]
 8009758:	4618      	movne	r0, r3
 800975a:	bf08      	it	eq
 800975c:	60a5      	streq	r5, [r4, #8]
 800975e:	e7d0      	b.n	8009702 <setvbuf+0xc2>
 8009760:	4648      	mov	r0, r9
 8009762:	f001 f92b 	bl	800a9bc <malloc>
 8009766:	4607      	mov	r7, r0
 8009768:	2800      	cmp	r0, #0
 800976a:	d0bc      	beq.n	80096e6 <setvbuf+0xa6>
 800976c:	89a3      	ldrh	r3, [r4, #12]
 800976e:	464d      	mov	r5, r9
 8009770:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8009774:	81a3      	strh	r3, [r4, #12]
 8009776:	e7d3      	b.n	8009720 <setvbuf+0xe0>
 8009778:	2000      	movs	r0, #0
 800977a:	e7b6      	b.n	80096ea <setvbuf+0xaa>
 800977c:	46a9      	mov	r9, r5
 800977e:	e7f5      	b.n	800976c <setvbuf+0x12c>
 8009780:	60a0      	str	r0, [r4, #8]
 8009782:	e7be      	b.n	8009702 <setvbuf+0xc2>
 8009784:	f04f 30ff 	mov.w	r0, #4294967295
 8009788:	e7bb      	b.n	8009702 <setvbuf+0xc2>
 800978a:	bf00      	nop
 800978c:	20000234 	.word	0x20000234
 8009790:	0800bbb8 	.word	0x0800bbb8
 8009794:	0800bbd8 	.word	0x0800bbd8
 8009798:	0800bb98 	.word	0x0800bb98

0800979c <__swbuf_r>:
 800979c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800979e:	460e      	mov	r6, r1
 80097a0:	4614      	mov	r4, r2
 80097a2:	4605      	mov	r5, r0
 80097a4:	b118      	cbz	r0, 80097ae <__swbuf_r+0x12>
 80097a6:	6983      	ldr	r3, [r0, #24]
 80097a8:	b90b      	cbnz	r3, 80097ae <__swbuf_r+0x12>
 80097aa:	f001 f80b 	bl	800a7c4 <__sinit>
 80097ae:	4b21      	ldr	r3, [pc, #132]	; (8009834 <__swbuf_r+0x98>)
 80097b0:	429c      	cmp	r4, r3
 80097b2:	d12a      	bne.n	800980a <__swbuf_r+0x6e>
 80097b4:	686c      	ldr	r4, [r5, #4]
 80097b6:	69a3      	ldr	r3, [r4, #24]
 80097b8:	60a3      	str	r3, [r4, #8]
 80097ba:	89a3      	ldrh	r3, [r4, #12]
 80097bc:	071a      	lsls	r2, r3, #28
 80097be:	d52e      	bpl.n	800981e <__swbuf_r+0x82>
 80097c0:	6923      	ldr	r3, [r4, #16]
 80097c2:	b363      	cbz	r3, 800981e <__swbuf_r+0x82>
 80097c4:	6923      	ldr	r3, [r4, #16]
 80097c6:	6820      	ldr	r0, [r4, #0]
 80097c8:	b2f6      	uxtb	r6, r6
 80097ca:	1ac0      	subs	r0, r0, r3
 80097cc:	6963      	ldr	r3, [r4, #20]
 80097ce:	4637      	mov	r7, r6
 80097d0:	4298      	cmp	r0, r3
 80097d2:	db04      	blt.n	80097de <__swbuf_r+0x42>
 80097d4:	4621      	mov	r1, r4
 80097d6:	4628      	mov	r0, r5
 80097d8:	f000 ff8a 	bl	800a6f0 <_fflush_r>
 80097dc:	bb28      	cbnz	r0, 800982a <__swbuf_r+0x8e>
 80097de:	68a3      	ldr	r3, [r4, #8]
 80097e0:	3001      	adds	r0, #1
 80097e2:	3b01      	subs	r3, #1
 80097e4:	60a3      	str	r3, [r4, #8]
 80097e6:	6823      	ldr	r3, [r4, #0]
 80097e8:	1c5a      	adds	r2, r3, #1
 80097ea:	6022      	str	r2, [r4, #0]
 80097ec:	701e      	strb	r6, [r3, #0]
 80097ee:	6963      	ldr	r3, [r4, #20]
 80097f0:	4298      	cmp	r0, r3
 80097f2:	d004      	beq.n	80097fe <__swbuf_r+0x62>
 80097f4:	89a3      	ldrh	r3, [r4, #12]
 80097f6:	07db      	lsls	r3, r3, #31
 80097f8:	d519      	bpl.n	800982e <__swbuf_r+0x92>
 80097fa:	2e0a      	cmp	r6, #10
 80097fc:	d117      	bne.n	800982e <__swbuf_r+0x92>
 80097fe:	4621      	mov	r1, r4
 8009800:	4628      	mov	r0, r5
 8009802:	f000 ff75 	bl	800a6f0 <_fflush_r>
 8009806:	b190      	cbz	r0, 800982e <__swbuf_r+0x92>
 8009808:	e00f      	b.n	800982a <__swbuf_r+0x8e>
 800980a:	4b0b      	ldr	r3, [pc, #44]	; (8009838 <__swbuf_r+0x9c>)
 800980c:	429c      	cmp	r4, r3
 800980e:	d101      	bne.n	8009814 <__swbuf_r+0x78>
 8009810:	68ac      	ldr	r4, [r5, #8]
 8009812:	e7d0      	b.n	80097b6 <__swbuf_r+0x1a>
 8009814:	4b09      	ldr	r3, [pc, #36]	; (800983c <__swbuf_r+0xa0>)
 8009816:	429c      	cmp	r4, r3
 8009818:	bf08      	it	eq
 800981a:	68ec      	ldreq	r4, [r5, #12]
 800981c:	e7cb      	b.n	80097b6 <__swbuf_r+0x1a>
 800981e:	4621      	mov	r1, r4
 8009820:	4628      	mov	r0, r5
 8009822:	f000 f80d 	bl	8009840 <__swsetup_r>
 8009826:	2800      	cmp	r0, #0
 8009828:	d0cc      	beq.n	80097c4 <__swbuf_r+0x28>
 800982a:	f04f 37ff 	mov.w	r7, #4294967295
 800982e:	4638      	mov	r0, r7
 8009830:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8009832:	bf00      	nop
 8009834:	0800bbb8 	.word	0x0800bbb8
 8009838:	0800bbd8 	.word	0x0800bbd8
 800983c:	0800bb98 	.word	0x0800bb98

08009840 <__swsetup_r>:
 8009840:	4b32      	ldr	r3, [pc, #200]	; (800990c <__swsetup_r+0xcc>)
 8009842:	b570      	push	{r4, r5, r6, lr}
 8009844:	681d      	ldr	r5, [r3, #0]
 8009846:	4606      	mov	r6, r0
 8009848:	460c      	mov	r4, r1
 800984a:	b125      	cbz	r5, 8009856 <__swsetup_r+0x16>
 800984c:	69ab      	ldr	r3, [r5, #24]
 800984e:	b913      	cbnz	r3, 8009856 <__swsetup_r+0x16>
 8009850:	4628      	mov	r0, r5
 8009852:	f000 ffb7 	bl	800a7c4 <__sinit>
 8009856:	4b2e      	ldr	r3, [pc, #184]	; (8009910 <__swsetup_r+0xd0>)
 8009858:	429c      	cmp	r4, r3
 800985a:	d10f      	bne.n	800987c <__swsetup_r+0x3c>
 800985c:	686c      	ldr	r4, [r5, #4]
 800985e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8009862:	b29a      	uxth	r2, r3
 8009864:	0715      	lsls	r5, r2, #28
 8009866:	d42c      	bmi.n	80098c2 <__swsetup_r+0x82>
 8009868:	06d0      	lsls	r0, r2, #27
 800986a:	d411      	bmi.n	8009890 <__swsetup_r+0x50>
 800986c:	2209      	movs	r2, #9
 800986e:	6032      	str	r2, [r6, #0]
 8009870:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8009874:	81a3      	strh	r3, [r4, #12]
 8009876:	f04f 30ff 	mov.w	r0, #4294967295
 800987a:	bd70      	pop	{r4, r5, r6, pc}
 800987c:	4b25      	ldr	r3, [pc, #148]	; (8009914 <__swsetup_r+0xd4>)
 800987e:	429c      	cmp	r4, r3
 8009880:	d101      	bne.n	8009886 <__swsetup_r+0x46>
 8009882:	68ac      	ldr	r4, [r5, #8]
 8009884:	e7eb      	b.n	800985e <__swsetup_r+0x1e>
 8009886:	4b24      	ldr	r3, [pc, #144]	; (8009918 <__swsetup_r+0xd8>)
 8009888:	429c      	cmp	r4, r3
 800988a:	bf08      	it	eq
 800988c:	68ec      	ldreq	r4, [r5, #12]
 800988e:	e7e6      	b.n	800985e <__swsetup_r+0x1e>
 8009890:	0751      	lsls	r1, r2, #29
 8009892:	d512      	bpl.n	80098ba <__swsetup_r+0x7a>
 8009894:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8009896:	b141      	cbz	r1, 80098aa <__swsetup_r+0x6a>
 8009898:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800989c:	4299      	cmp	r1, r3
 800989e:	d002      	beq.n	80098a6 <__swsetup_r+0x66>
 80098a0:	4630      	mov	r0, r6
 80098a2:	f001 fb81 	bl	800afa8 <_free_r>
 80098a6:	2300      	movs	r3, #0
 80098a8:	6363      	str	r3, [r4, #52]	; 0x34
 80098aa:	89a3      	ldrh	r3, [r4, #12]
 80098ac:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 80098b0:	81a3      	strh	r3, [r4, #12]
 80098b2:	2300      	movs	r3, #0
 80098b4:	6063      	str	r3, [r4, #4]
 80098b6:	6923      	ldr	r3, [r4, #16]
 80098b8:	6023      	str	r3, [r4, #0]
 80098ba:	89a3      	ldrh	r3, [r4, #12]
 80098bc:	f043 0308 	orr.w	r3, r3, #8
 80098c0:	81a3      	strh	r3, [r4, #12]
 80098c2:	6923      	ldr	r3, [r4, #16]
 80098c4:	b94b      	cbnz	r3, 80098da <__swsetup_r+0x9a>
 80098c6:	89a3      	ldrh	r3, [r4, #12]
 80098c8:	f403 7320 	and.w	r3, r3, #640	; 0x280
 80098cc:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 80098d0:	d003      	beq.n	80098da <__swsetup_r+0x9a>
 80098d2:	4621      	mov	r1, r4
 80098d4:	4630      	mov	r0, r6
 80098d6:	f001 f831 	bl	800a93c <__smakebuf_r>
 80098da:	89a2      	ldrh	r2, [r4, #12]
 80098dc:	f012 0301 	ands.w	r3, r2, #1
 80098e0:	d00c      	beq.n	80098fc <__swsetup_r+0xbc>
 80098e2:	2300      	movs	r3, #0
 80098e4:	60a3      	str	r3, [r4, #8]
 80098e6:	6963      	ldr	r3, [r4, #20]
 80098e8:	425b      	negs	r3, r3
 80098ea:	61a3      	str	r3, [r4, #24]
 80098ec:	6923      	ldr	r3, [r4, #16]
 80098ee:	b953      	cbnz	r3, 8009906 <__swsetup_r+0xc6>
 80098f0:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80098f4:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 80098f8:	d1ba      	bne.n	8009870 <__swsetup_r+0x30>
 80098fa:	bd70      	pop	{r4, r5, r6, pc}
 80098fc:	0792      	lsls	r2, r2, #30
 80098fe:	bf58      	it	pl
 8009900:	6963      	ldrpl	r3, [r4, #20]
 8009902:	60a3      	str	r3, [r4, #8]
 8009904:	e7f2      	b.n	80098ec <__swsetup_r+0xac>
 8009906:	2000      	movs	r0, #0
 8009908:	e7f7      	b.n	80098fa <__swsetup_r+0xba>
 800990a:	bf00      	nop
 800990c:	20000234 	.word	0x20000234
 8009910:	0800bbb8 	.word	0x0800bbb8
 8009914:	0800bbd8 	.word	0x0800bbd8
 8009918:	0800bb98 	.word	0x0800bb98

0800991c <quorem>:
 800991c:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8009920:	6903      	ldr	r3, [r0, #16]
 8009922:	690c      	ldr	r4, [r1, #16]
 8009924:	4680      	mov	r8, r0
 8009926:	429c      	cmp	r4, r3
 8009928:	f300 8082 	bgt.w	8009a30 <quorem+0x114>
 800992c:	3c01      	subs	r4, #1
 800992e:	f101 0714 	add.w	r7, r1, #20
 8009932:	f100 0614 	add.w	r6, r0, #20
 8009936:	f857 5024 	ldr.w	r5, [r7, r4, lsl #2]
 800993a:	f856 0024 	ldr.w	r0, [r6, r4, lsl #2]
 800993e:	3501      	adds	r5, #1
 8009940:	fbb0 f5f5 	udiv	r5, r0, r5
 8009944:	ea4f 0e84 	mov.w	lr, r4, lsl #2
 8009948:	eb06 030e 	add.w	r3, r6, lr
 800994c:	eb07 090e 	add.w	r9, r7, lr
 8009950:	9301      	str	r3, [sp, #4]
 8009952:	b38d      	cbz	r5, 80099b8 <quorem+0x9c>
 8009954:	f04f 0a00 	mov.w	sl, #0
 8009958:	4638      	mov	r0, r7
 800995a:	46b4      	mov	ip, r6
 800995c:	46d3      	mov	fp, sl
 800995e:	f850 2b04 	ldr.w	r2, [r0], #4
 8009962:	b293      	uxth	r3, r2
 8009964:	fb05 a303 	mla	r3, r5, r3, sl
 8009968:	0c12      	lsrs	r2, r2, #16
 800996a:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 800996e:	fb05 a202 	mla	r2, r5, r2, sl
 8009972:	b29b      	uxth	r3, r3
 8009974:	ebab 0303 	sub.w	r3, fp, r3
 8009978:	f8bc b000 	ldrh.w	fp, [ip]
 800997c:	ea4f 4a12 	mov.w	sl, r2, lsr #16
 8009980:	445b      	add	r3, fp
 8009982:	fa1f fb82 	uxth.w	fp, r2
 8009986:	f8dc 2000 	ldr.w	r2, [ip]
 800998a:	4581      	cmp	r9, r0
 800998c:	ebcb 4212 	rsb	r2, fp, r2, lsr #16
 8009990:	eb02 4223 	add.w	r2, r2, r3, asr #16
 8009994:	b29b      	uxth	r3, r3
 8009996:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 800999a:	ea4f 4b22 	mov.w	fp, r2, asr #16
 800999e:	f84c 3b04 	str.w	r3, [ip], #4
 80099a2:	d2dc      	bcs.n	800995e <quorem+0x42>
 80099a4:	f856 300e 	ldr.w	r3, [r6, lr]
 80099a8:	b933      	cbnz	r3, 80099b8 <quorem+0x9c>
 80099aa:	9b01      	ldr	r3, [sp, #4]
 80099ac:	3b04      	subs	r3, #4
 80099ae:	429e      	cmp	r6, r3
 80099b0:	461a      	mov	r2, r3
 80099b2:	d331      	bcc.n	8009a18 <quorem+0xfc>
 80099b4:	f8c8 4010 	str.w	r4, [r8, #16]
 80099b8:	4640      	mov	r0, r8
 80099ba:	f001 fa1e 	bl	800adfa <__mcmp>
 80099be:	2800      	cmp	r0, #0
 80099c0:	db26      	blt.n	8009a10 <quorem+0xf4>
 80099c2:	4630      	mov	r0, r6
 80099c4:	f04f 0e00 	mov.w	lr, #0
 80099c8:	3501      	adds	r5, #1
 80099ca:	f857 1b04 	ldr.w	r1, [r7], #4
 80099ce:	f8d0 c000 	ldr.w	ip, [r0]
 80099d2:	b28b      	uxth	r3, r1
 80099d4:	ebae 0303 	sub.w	r3, lr, r3
 80099d8:	fa1f f28c 	uxth.w	r2, ip
 80099dc:	4413      	add	r3, r2
 80099de:	0c0a      	lsrs	r2, r1, #16
 80099e0:	ebc2 421c 	rsb	r2, r2, ip, lsr #16
 80099e4:	eb02 4223 	add.w	r2, r2, r3, asr #16
 80099e8:	b29b      	uxth	r3, r3
 80099ea:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 80099ee:	45b9      	cmp	r9, r7
 80099f0:	ea4f 4e22 	mov.w	lr, r2, asr #16
 80099f4:	f840 3b04 	str.w	r3, [r0], #4
 80099f8:	d2e7      	bcs.n	80099ca <quorem+0xae>
 80099fa:	f856 2024 	ldr.w	r2, [r6, r4, lsl #2]
 80099fe:	eb06 0384 	add.w	r3, r6, r4, lsl #2
 8009a02:	b92a      	cbnz	r2, 8009a10 <quorem+0xf4>
 8009a04:	3b04      	subs	r3, #4
 8009a06:	429e      	cmp	r6, r3
 8009a08:	461a      	mov	r2, r3
 8009a0a:	d30b      	bcc.n	8009a24 <quorem+0x108>
 8009a0c:	f8c8 4010 	str.w	r4, [r8, #16]
 8009a10:	4628      	mov	r0, r5
 8009a12:	b003      	add	sp, #12
 8009a14:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8009a18:	6812      	ldr	r2, [r2, #0]
 8009a1a:	3b04      	subs	r3, #4
 8009a1c:	2a00      	cmp	r2, #0
 8009a1e:	d1c9      	bne.n	80099b4 <quorem+0x98>
 8009a20:	3c01      	subs	r4, #1
 8009a22:	e7c4      	b.n	80099ae <quorem+0x92>
 8009a24:	6812      	ldr	r2, [r2, #0]
 8009a26:	3b04      	subs	r3, #4
 8009a28:	2a00      	cmp	r2, #0
 8009a2a:	d1ef      	bne.n	8009a0c <quorem+0xf0>
 8009a2c:	3c01      	subs	r4, #1
 8009a2e:	e7ea      	b.n	8009a06 <quorem+0xea>
 8009a30:	2000      	movs	r0, #0
 8009a32:	e7ee      	b.n	8009a12 <quorem+0xf6>
 8009a34:	0000      	movs	r0, r0
	...

08009a38 <_dtoa_r>:
 8009a38:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8009a3c:	6a46      	ldr	r6, [r0, #36]	; 0x24
 8009a3e:	b095      	sub	sp, #84	; 0x54
 8009a40:	4604      	mov	r4, r0
 8009a42:	9d21      	ldr	r5, [sp, #132]	; 0x84
 8009a44:	e9cd 2302 	strd	r2, r3, [sp, #8]
 8009a48:	b93e      	cbnz	r6, 8009a5a <_dtoa_r+0x22>
 8009a4a:	2010      	movs	r0, #16
 8009a4c:	f000 ffb6 	bl	800a9bc <malloc>
 8009a50:	6260      	str	r0, [r4, #36]	; 0x24
 8009a52:	6046      	str	r6, [r0, #4]
 8009a54:	6086      	str	r6, [r0, #8]
 8009a56:	6006      	str	r6, [r0, #0]
 8009a58:	60c6      	str	r6, [r0, #12]
 8009a5a:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8009a5c:	6819      	ldr	r1, [r3, #0]
 8009a5e:	b151      	cbz	r1, 8009a76 <_dtoa_r+0x3e>
 8009a60:	685a      	ldr	r2, [r3, #4]
 8009a62:	2301      	movs	r3, #1
 8009a64:	4093      	lsls	r3, r2
 8009a66:	604a      	str	r2, [r1, #4]
 8009a68:	608b      	str	r3, [r1, #8]
 8009a6a:	4620      	mov	r0, r4
 8009a6c:	f000 fff0 	bl	800aa50 <_Bfree>
 8009a70:	2200      	movs	r2, #0
 8009a72:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8009a74:	601a      	str	r2, [r3, #0]
 8009a76:	9b03      	ldr	r3, [sp, #12]
 8009a78:	2b00      	cmp	r3, #0
 8009a7a:	bfb7      	itett	lt
 8009a7c:	2301      	movlt	r3, #1
 8009a7e:	2300      	movge	r3, #0
 8009a80:	602b      	strlt	r3, [r5, #0]
 8009a82:	9b03      	ldrlt	r3, [sp, #12]
 8009a84:	bfae      	itee	ge
 8009a86:	602b      	strge	r3, [r5, #0]
 8009a88:	f023 4300 	biclt.w	r3, r3, #2147483648	; 0x80000000
 8009a8c:	9303      	strlt	r3, [sp, #12]
 8009a8e:	f8dd 900c 	ldr.w	r9, [sp, #12]
 8009a92:	4bab      	ldr	r3, [pc, #684]	; (8009d40 <_dtoa_r+0x308>)
 8009a94:	ea33 0309 	bics.w	r3, r3, r9
 8009a98:	d11b      	bne.n	8009ad2 <_dtoa_r+0x9a>
 8009a9a:	f242 730f 	movw	r3, #9999	; 0x270f
 8009a9e:	9a20      	ldr	r2, [sp, #128]	; 0x80
 8009aa0:	6013      	str	r3, [r2, #0]
 8009aa2:	9b02      	ldr	r3, [sp, #8]
 8009aa4:	b923      	cbnz	r3, 8009ab0 <_dtoa_r+0x78>
 8009aa6:	f3c9 0013 	ubfx	r0, r9, #0, #20
 8009aaa:	2800      	cmp	r0, #0
 8009aac:	f000 8583 	beq.w	800a5b6 <_dtoa_r+0xb7e>
 8009ab0:	9b22      	ldr	r3, [sp, #136]	; 0x88
 8009ab2:	b953      	cbnz	r3, 8009aca <_dtoa_r+0x92>
 8009ab4:	4ba3      	ldr	r3, [pc, #652]	; (8009d44 <_dtoa_r+0x30c>)
 8009ab6:	e021      	b.n	8009afc <_dtoa_r+0xc4>
 8009ab8:	4ba3      	ldr	r3, [pc, #652]	; (8009d48 <_dtoa_r+0x310>)
 8009aba:	9306      	str	r3, [sp, #24]
 8009abc:	3308      	adds	r3, #8
 8009abe:	9a22      	ldr	r2, [sp, #136]	; 0x88
 8009ac0:	6013      	str	r3, [r2, #0]
 8009ac2:	9806      	ldr	r0, [sp, #24]
 8009ac4:	b015      	add	sp, #84	; 0x54
 8009ac6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8009aca:	4b9e      	ldr	r3, [pc, #632]	; (8009d44 <_dtoa_r+0x30c>)
 8009acc:	9306      	str	r3, [sp, #24]
 8009ace:	3303      	adds	r3, #3
 8009ad0:	e7f5      	b.n	8009abe <_dtoa_r+0x86>
 8009ad2:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 8009ad6:	2200      	movs	r2, #0
 8009ad8:	2300      	movs	r3, #0
 8009ada:	4630      	mov	r0, r6
 8009adc:	4639      	mov	r1, r7
 8009ade:	f7fa ffcb 	bl	8004a78 <__aeabi_dcmpeq>
 8009ae2:	4680      	mov	r8, r0
 8009ae4:	b160      	cbz	r0, 8009b00 <_dtoa_r+0xc8>
 8009ae6:	2301      	movs	r3, #1
 8009ae8:	9a20      	ldr	r2, [sp, #128]	; 0x80
 8009aea:	6013      	str	r3, [r2, #0]
 8009aec:	9b22      	ldr	r3, [sp, #136]	; 0x88
 8009aee:	2b00      	cmp	r3, #0
 8009af0:	f000 855e 	beq.w	800a5b0 <_dtoa_r+0xb78>
 8009af4:	4b95      	ldr	r3, [pc, #596]	; (8009d4c <_dtoa_r+0x314>)
 8009af6:	9a22      	ldr	r2, [sp, #136]	; 0x88
 8009af8:	6013      	str	r3, [r2, #0]
 8009afa:	3b01      	subs	r3, #1
 8009afc:	9306      	str	r3, [sp, #24]
 8009afe:	e7e0      	b.n	8009ac2 <_dtoa_r+0x8a>
 8009b00:	ab12      	add	r3, sp, #72	; 0x48
 8009b02:	9301      	str	r3, [sp, #4]
 8009b04:	ab13      	add	r3, sp, #76	; 0x4c
 8009b06:	9300      	str	r3, [sp, #0]
 8009b08:	4632      	mov	r2, r6
 8009b0a:	463b      	mov	r3, r7
 8009b0c:	4620      	mov	r0, r4
 8009b0e:	f001 f9ed 	bl	800aeec <__d2b>
 8009b12:	f3c9 550a 	ubfx	r5, r9, #20, #11
 8009b16:	4682      	mov	sl, r0
 8009b18:	2d00      	cmp	r5, #0
 8009b1a:	d07d      	beq.n	8009c18 <_dtoa_r+0x1e0>
 8009b1c:	4630      	mov	r0, r6
 8009b1e:	f3c7 0313 	ubfx	r3, r7, #0, #20
 8009b22:	f043 517f 	orr.w	r1, r3, #1069547520	; 0x3fc00000
 8009b26:	f441 1140 	orr.w	r1, r1, #3145728	; 0x300000
 8009b2a:	f2a5 35ff 	subw	r5, r5, #1023	; 0x3ff
 8009b2e:	f8cd 8040 	str.w	r8, [sp, #64]	; 0x40
 8009b32:	2200      	movs	r2, #0
 8009b34:	4b86      	ldr	r3, [pc, #536]	; (8009d50 <_dtoa_r+0x318>)
 8009b36:	f7fa fb83 	bl	8004240 <__aeabi_dsub>
 8009b3a:	a37b      	add	r3, pc, #492	; (adr r3, 8009d28 <_dtoa_r+0x2f0>)
 8009b3c:	e9d3 2300 	ldrd	r2, r3, [r3]
 8009b40:	f7fa fd32 	bl	80045a8 <__aeabi_dmul>
 8009b44:	a37a      	add	r3, pc, #488	; (adr r3, 8009d30 <_dtoa_r+0x2f8>)
 8009b46:	e9d3 2300 	ldrd	r2, r3, [r3]
 8009b4a:	f7fa fb7b 	bl	8004244 <__adddf3>
 8009b4e:	4606      	mov	r6, r0
 8009b50:	4628      	mov	r0, r5
 8009b52:	460f      	mov	r7, r1
 8009b54:	f7fa fcc2 	bl	80044dc <__aeabi_i2d>
 8009b58:	a377      	add	r3, pc, #476	; (adr r3, 8009d38 <_dtoa_r+0x300>)
 8009b5a:	e9d3 2300 	ldrd	r2, r3, [r3]
 8009b5e:	f7fa fd23 	bl	80045a8 <__aeabi_dmul>
 8009b62:	4602      	mov	r2, r0
 8009b64:	460b      	mov	r3, r1
 8009b66:	4630      	mov	r0, r6
 8009b68:	4639      	mov	r1, r7
 8009b6a:	f7fa fb6b 	bl	8004244 <__adddf3>
 8009b6e:	4606      	mov	r6, r0
 8009b70:	460f      	mov	r7, r1
 8009b72:	f7fa ffc9 	bl	8004b08 <__aeabi_d2iz>
 8009b76:	2200      	movs	r2, #0
 8009b78:	4683      	mov	fp, r0
 8009b7a:	2300      	movs	r3, #0
 8009b7c:	4630      	mov	r0, r6
 8009b7e:	4639      	mov	r1, r7
 8009b80:	f7fa ff84 	bl	8004a8c <__aeabi_dcmplt>
 8009b84:	b158      	cbz	r0, 8009b9e <_dtoa_r+0x166>
 8009b86:	4658      	mov	r0, fp
 8009b88:	f7fa fca8 	bl	80044dc <__aeabi_i2d>
 8009b8c:	4602      	mov	r2, r0
 8009b8e:	460b      	mov	r3, r1
 8009b90:	4630      	mov	r0, r6
 8009b92:	4639      	mov	r1, r7
 8009b94:	f7fa ff70 	bl	8004a78 <__aeabi_dcmpeq>
 8009b98:	b908      	cbnz	r0, 8009b9e <_dtoa_r+0x166>
 8009b9a:	f10b 3bff 	add.w	fp, fp, #4294967295
 8009b9e:	f1bb 0f16 	cmp.w	fp, #22
 8009ba2:	d858      	bhi.n	8009c56 <_dtoa_r+0x21e>
 8009ba4:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8009ba8:	496a      	ldr	r1, [pc, #424]	; (8009d54 <_dtoa_r+0x31c>)
 8009baa:	eb01 01cb 	add.w	r1, r1, fp, lsl #3
 8009bae:	e9d1 0100 	ldrd	r0, r1, [r1]
 8009bb2:	f7fa ff89 	bl	8004ac8 <__aeabi_dcmpgt>
 8009bb6:	2800      	cmp	r0, #0
 8009bb8:	d04f      	beq.n	8009c5a <_dtoa_r+0x222>
 8009bba:	2300      	movs	r3, #0
 8009bbc:	f10b 3bff 	add.w	fp, fp, #4294967295
 8009bc0:	930d      	str	r3, [sp, #52]	; 0x34
 8009bc2:	9b12      	ldr	r3, [sp, #72]	; 0x48
 8009bc4:	1b5d      	subs	r5, r3, r5
 8009bc6:	1e6b      	subs	r3, r5, #1
 8009bc8:	9307      	str	r3, [sp, #28]
 8009bca:	bf43      	ittte	mi
 8009bcc:	2300      	movmi	r3, #0
 8009bce:	f1c5 0801 	rsbmi	r8, r5, #1
 8009bd2:	9307      	strmi	r3, [sp, #28]
 8009bd4:	f04f 0800 	movpl.w	r8, #0
 8009bd8:	f1bb 0f00 	cmp.w	fp, #0
 8009bdc:	db3f      	blt.n	8009c5e <_dtoa_r+0x226>
 8009bde:	9b07      	ldr	r3, [sp, #28]
 8009be0:	f8cd b030 	str.w	fp, [sp, #48]	; 0x30
 8009be4:	445b      	add	r3, fp
 8009be6:	9307      	str	r3, [sp, #28]
 8009be8:	2300      	movs	r3, #0
 8009bea:	9308      	str	r3, [sp, #32]
 8009bec:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 8009bee:	2b09      	cmp	r3, #9
 8009bf0:	f200 80b4 	bhi.w	8009d5c <_dtoa_r+0x324>
 8009bf4:	2b05      	cmp	r3, #5
 8009bf6:	bfc4      	itt	gt
 8009bf8:	3b04      	subgt	r3, #4
 8009bfa:	931e      	strgt	r3, [sp, #120]	; 0x78
 8009bfc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 8009bfe:	bfc8      	it	gt
 8009c00:	2600      	movgt	r6, #0
 8009c02:	f1a3 0302 	sub.w	r3, r3, #2
 8009c06:	bfd8      	it	le
 8009c08:	2601      	movle	r6, #1
 8009c0a:	2b03      	cmp	r3, #3
 8009c0c:	f200 80b2 	bhi.w	8009d74 <_dtoa_r+0x33c>
 8009c10:	e8df f003 	tbb	[pc, r3]
 8009c14:	782d8684 	.word	0x782d8684
 8009c18:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 8009c1a:	9d12      	ldr	r5, [sp, #72]	; 0x48
 8009c1c:	441d      	add	r5, r3
 8009c1e:	f205 4332 	addw	r3, r5, #1074	; 0x432
 8009c22:	2b20      	cmp	r3, #32
 8009c24:	dd11      	ble.n	8009c4a <_dtoa_r+0x212>
 8009c26:	9a02      	ldr	r2, [sp, #8]
 8009c28:	f205 4012 	addw	r0, r5, #1042	; 0x412
 8009c2c:	f1c3 0340 	rsb	r3, r3, #64	; 0x40
 8009c30:	fa22 f000 	lsr.w	r0, r2, r0
 8009c34:	fa09 f303 	lsl.w	r3, r9, r3
 8009c38:	4318      	orrs	r0, r3
 8009c3a:	f7fa fc3f 	bl	80044bc <__aeabi_ui2d>
 8009c3e:	2301      	movs	r3, #1
 8009c40:	f1a1 71f8 	sub.w	r1, r1, #32505856	; 0x1f00000
 8009c44:	3d01      	subs	r5, #1
 8009c46:	9310      	str	r3, [sp, #64]	; 0x40
 8009c48:	e773      	b.n	8009b32 <_dtoa_r+0xfa>
 8009c4a:	f1c3 0020 	rsb	r0, r3, #32
 8009c4e:	9b02      	ldr	r3, [sp, #8]
 8009c50:	fa03 f000 	lsl.w	r0, r3, r0
 8009c54:	e7f1      	b.n	8009c3a <_dtoa_r+0x202>
 8009c56:	2301      	movs	r3, #1
 8009c58:	e7b2      	b.n	8009bc0 <_dtoa_r+0x188>
 8009c5a:	900d      	str	r0, [sp, #52]	; 0x34
 8009c5c:	e7b1      	b.n	8009bc2 <_dtoa_r+0x18a>
 8009c5e:	f1cb 0300 	rsb	r3, fp, #0
 8009c62:	9308      	str	r3, [sp, #32]
 8009c64:	2300      	movs	r3, #0
 8009c66:	eba8 080b 	sub.w	r8, r8, fp
 8009c6a:	930c      	str	r3, [sp, #48]	; 0x30
 8009c6c:	e7be      	b.n	8009bec <_dtoa_r+0x1b4>
 8009c6e:	2301      	movs	r3, #1
 8009c70:	9309      	str	r3, [sp, #36]	; 0x24
 8009c72:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 8009c74:	2b00      	cmp	r3, #0
 8009c76:	f340 8080 	ble.w	8009d7a <_dtoa_r+0x342>
 8009c7a:	4699      	mov	r9, r3
 8009c7c:	9304      	str	r3, [sp, #16]
 8009c7e:	2200      	movs	r2, #0
 8009c80:	2104      	movs	r1, #4
 8009c82:	6a65      	ldr	r5, [r4, #36]	; 0x24
 8009c84:	606a      	str	r2, [r5, #4]
 8009c86:	f101 0214 	add.w	r2, r1, #20
 8009c8a:	429a      	cmp	r2, r3
 8009c8c:	d97a      	bls.n	8009d84 <_dtoa_r+0x34c>
 8009c8e:	6869      	ldr	r1, [r5, #4]
 8009c90:	4620      	mov	r0, r4
 8009c92:	f000 fea9 	bl	800a9e8 <_Balloc>
 8009c96:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8009c98:	6028      	str	r0, [r5, #0]
 8009c9a:	681b      	ldr	r3, [r3, #0]
 8009c9c:	f1b9 0f0e 	cmp.w	r9, #14
 8009ca0:	9306      	str	r3, [sp, #24]
 8009ca2:	f200 80f0 	bhi.w	8009e86 <_dtoa_r+0x44e>
 8009ca6:	2e00      	cmp	r6, #0
 8009ca8:	f000 80ed 	beq.w	8009e86 <_dtoa_r+0x44e>
 8009cac:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8009cb0:	f1bb 0f00 	cmp.w	fp, #0
 8009cb4:	e9cd 230e 	strd	r2, r3, [sp, #56]	; 0x38
 8009cb8:	dd79      	ble.n	8009dae <_dtoa_r+0x376>
 8009cba:	4a26      	ldr	r2, [pc, #152]	; (8009d54 <_dtoa_r+0x31c>)
 8009cbc:	f00b 030f 	and.w	r3, fp, #15
 8009cc0:	ea4f 162b 	mov.w	r6, fp, asr #4
 8009cc4:	eb02 03c3 	add.w	r3, r2, r3, lsl #3
 8009cc8:	06f0      	lsls	r0, r6, #27
 8009cca:	e9d3 2300 	ldrd	r2, r3, [r3]
 8009cce:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 8009cd2:	d55c      	bpl.n	8009d8e <_dtoa_r+0x356>
 8009cd4:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 8009cd8:	4b1f      	ldr	r3, [pc, #124]	; (8009d58 <_dtoa_r+0x320>)
 8009cda:	2503      	movs	r5, #3
 8009cdc:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
 8009ce0:	f7fa fd8c 	bl	80047fc <__aeabi_ddiv>
 8009ce4:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009ce8:	f006 060f 	and.w	r6, r6, #15
 8009cec:	4f1a      	ldr	r7, [pc, #104]	; (8009d58 <_dtoa_r+0x320>)
 8009cee:	2e00      	cmp	r6, #0
 8009cf0:	d14f      	bne.n	8009d92 <_dtoa_r+0x35a>
 8009cf2:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 8009cf6:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009cfa:	f7fa fd7f 	bl	80047fc <__aeabi_ddiv>
 8009cfe:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009d02:	e06e      	b.n	8009de2 <_dtoa_r+0x3aa>
 8009d04:	2301      	movs	r3, #1
 8009d06:	9309      	str	r3, [sp, #36]	; 0x24
 8009d08:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 8009d0a:	445b      	add	r3, fp
 8009d0c:	f103 0901 	add.w	r9, r3, #1
 8009d10:	9304      	str	r3, [sp, #16]
 8009d12:	464b      	mov	r3, r9
 8009d14:	2b01      	cmp	r3, #1
 8009d16:	bfb8      	it	lt
 8009d18:	2301      	movlt	r3, #1
 8009d1a:	e7b0      	b.n	8009c7e <_dtoa_r+0x246>
 8009d1c:	2300      	movs	r3, #0
 8009d1e:	e7a7      	b.n	8009c70 <_dtoa_r+0x238>
 8009d20:	2300      	movs	r3, #0
 8009d22:	e7f0      	b.n	8009d06 <_dtoa_r+0x2ce>
 8009d24:	f3af 8000 	nop.w
 8009d28:	636f4361 	.word	0x636f4361
 8009d2c:	3fd287a7 	.word	0x3fd287a7
 8009d30:	8b60c8b3 	.word	0x8b60c8b3
 8009d34:	3fc68a28 	.word	0x3fc68a28
 8009d38:	509f79fb 	.word	0x509f79fb
 8009d3c:	3fd34413 	.word	0x3fd34413
 8009d40:	7ff00000 	.word	0x7ff00000
 8009d44:	0800bb91 	.word	0x0800bb91
 8009d48:	0800bb88 	.word	0x0800bb88
 8009d4c:	0800bb65 	.word	0x0800bb65
 8009d50:	3ff80000 	.word	0x3ff80000
 8009d54:	0800bc20 	.word	0x0800bc20
 8009d58:	0800bbf8 	.word	0x0800bbf8
 8009d5c:	2601      	movs	r6, #1
 8009d5e:	2300      	movs	r3, #0
 8009d60:	9609      	str	r6, [sp, #36]	; 0x24
 8009d62:	931e      	str	r3, [sp, #120]	; 0x78
 8009d64:	f04f 33ff 	mov.w	r3, #4294967295
 8009d68:	2200      	movs	r2, #0
 8009d6a:	9304      	str	r3, [sp, #16]
 8009d6c:	4699      	mov	r9, r3
 8009d6e:	2312      	movs	r3, #18
 8009d70:	921f      	str	r2, [sp, #124]	; 0x7c
 8009d72:	e784      	b.n	8009c7e <_dtoa_r+0x246>
 8009d74:	2301      	movs	r3, #1
 8009d76:	9309      	str	r3, [sp, #36]	; 0x24
 8009d78:	e7f4      	b.n	8009d64 <_dtoa_r+0x32c>
 8009d7a:	2301      	movs	r3, #1
 8009d7c:	9304      	str	r3, [sp, #16]
 8009d7e:	4699      	mov	r9, r3
 8009d80:	461a      	mov	r2, r3
 8009d82:	e7f5      	b.n	8009d70 <_dtoa_r+0x338>
 8009d84:	686a      	ldr	r2, [r5, #4]
 8009d86:	0049      	lsls	r1, r1, #1
 8009d88:	3201      	adds	r2, #1
 8009d8a:	606a      	str	r2, [r5, #4]
 8009d8c:	e77b      	b.n	8009c86 <_dtoa_r+0x24e>
 8009d8e:	2502      	movs	r5, #2
 8009d90:	e7ac      	b.n	8009cec <_dtoa_r+0x2b4>
 8009d92:	07f1      	lsls	r1, r6, #31
 8009d94:	d508      	bpl.n	8009da8 <_dtoa_r+0x370>
 8009d96:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 8009d9a:	e9d7 2300 	ldrd	r2, r3, [r7]
 8009d9e:	f7fa fc03 	bl	80045a8 <__aeabi_dmul>
 8009da2:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8009da6:	3501      	adds	r5, #1
 8009da8:	1076      	asrs	r6, r6, #1
 8009daa:	3708      	adds	r7, #8
 8009dac:	e79f      	b.n	8009cee <_dtoa_r+0x2b6>
 8009dae:	f000 80a5 	beq.w	8009efc <_dtoa_r+0x4c4>
 8009db2:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 8009db6:	f1cb 0600 	rsb	r6, fp, #0
 8009dba:	4ba2      	ldr	r3, [pc, #648]	; (800a044 <_dtoa_r+0x60c>)
 8009dbc:	f006 020f 	and.w	r2, r6, #15
 8009dc0:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 8009dc4:	e9d3 2300 	ldrd	r2, r3, [r3]
 8009dc8:	f7fa fbee 	bl	80045a8 <__aeabi_dmul>
 8009dcc:	2502      	movs	r5, #2
 8009dce:	2300      	movs	r3, #0
 8009dd0:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009dd4:	4f9c      	ldr	r7, [pc, #624]	; (800a048 <_dtoa_r+0x610>)
 8009dd6:	1136      	asrs	r6, r6, #4
 8009dd8:	2e00      	cmp	r6, #0
 8009dda:	f040 8084 	bne.w	8009ee6 <_dtoa_r+0x4ae>
 8009dde:	2b00      	cmp	r3, #0
 8009de0:	d18d      	bne.n	8009cfe <_dtoa_r+0x2c6>
 8009de2:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009de4:	2b00      	cmp	r3, #0
 8009de6:	f000 808b 	beq.w	8009f00 <_dtoa_r+0x4c8>
 8009dea:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8009dee:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 8009df2:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 8009df6:	2200      	movs	r2, #0
 8009df8:	4b94      	ldr	r3, [pc, #592]	; (800a04c <_dtoa_r+0x614>)
 8009dfa:	f7fa fe47 	bl	8004a8c <__aeabi_dcmplt>
 8009dfe:	2800      	cmp	r0, #0
 8009e00:	d07e      	beq.n	8009f00 <_dtoa_r+0x4c8>
 8009e02:	f1b9 0f00 	cmp.w	r9, #0
 8009e06:	d07b      	beq.n	8009f00 <_dtoa_r+0x4c8>
 8009e08:	9b04      	ldr	r3, [sp, #16]
 8009e0a:	2b00      	cmp	r3, #0
 8009e0c:	dd37      	ble.n	8009e7e <_dtoa_r+0x446>
 8009e0e:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 8009e12:	2200      	movs	r2, #0
 8009e14:	4b8e      	ldr	r3, [pc, #568]	; (800a050 <_dtoa_r+0x618>)
 8009e16:	f7fa fbc7 	bl	80045a8 <__aeabi_dmul>
 8009e1a:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009e1e:	9e04      	ldr	r6, [sp, #16]
 8009e20:	f10b 37ff 	add.w	r7, fp, #4294967295
 8009e24:	3501      	adds	r5, #1
 8009e26:	4628      	mov	r0, r5
 8009e28:	f7fa fb58 	bl	80044dc <__aeabi_i2d>
 8009e2c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8009e30:	f7fa fbba 	bl	80045a8 <__aeabi_dmul>
 8009e34:	4b87      	ldr	r3, [pc, #540]	; (800a054 <_dtoa_r+0x61c>)
 8009e36:	2200      	movs	r2, #0
 8009e38:	f7fa fa04 	bl	8004244 <__adddf3>
 8009e3c:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8009e40:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
 8009e42:	f1a3 7550 	sub.w	r5, r3, #54525952	; 0x3400000
 8009e46:	950b      	str	r5, [sp, #44]	; 0x2c
 8009e48:	2e00      	cmp	r6, #0
 8009e4a:	d15c      	bne.n	8009f06 <_dtoa_r+0x4ce>
 8009e4c:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009e50:	2200      	movs	r2, #0
 8009e52:	4b81      	ldr	r3, [pc, #516]	; (800a058 <_dtoa_r+0x620>)
 8009e54:	f7fa f9f4 	bl	8004240 <__aeabi_dsub>
 8009e58:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8009e5a:	462b      	mov	r3, r5
 8009e5c:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009e60:	f7fa fe32 	bl	8004ac8 <__aeabi_dcmpgt>
 8009e64:	2800      	cmp	r0, #0
 8009e66:	f040 82f7 	bne.w	800a458 <_dtoa_r+0xa20>
 8009e6a:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009e6e:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8009e70:	f105 4300 	add.w	r3, r5, #2147483648	; 0x80000000
 8009e74:	f7fa fe0a 	bl	8004a8c <__aeabi_dcmplt>
 8009e78:	2800      	cmp	r0, #0
 8009e7a:	f040 82eb 	bne.w	800a454 <_dtoa_r+0xa1c>
 8009e7e:	e9dd 230e 	ldrd	r2, r3, [sp, #56]	; 0x38
 8009e82:	e9cd 2302 	strd	r2, r3, [sp, #8]
 8009e86:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 8009e88:	2b00      	cmp	r3, #0
 8009e8a:	f2c0 8150 	blt.w	800a12e <_dtoa_r+0x6f6>
 8009e8e:	f1bb 0f0e 	cmp.w	fp, #14
 8009e92:	f300 814c 	bgt.w	800a12e <_dtoa_r+0x6f6>
 8009e96:	4b6b      	ldr	r3, [pc, #428]	; (800a044 <_dtoa_r+0x60c>)
 8009e98:	eb03 03cb 	add.w	r3, r3, fp, lsl #3
 8009e9c:	e9d3 2300 	ldrd	r2, r3, [r3]
 8009ea0:	e9cd 2304 	strd	r2, r3, [sp, #16]
 8009ea4:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 8009ea6:	2b00      	cmp	r3, #0
 8009ea8:	f280 80da 	bge.w	800a060 <_dtoa_r+0x628>
 8009eac:	f1b9 0f00 	cmp.w	r9, #0
 8009eb0:	f300 80d6 	bgt.w	800a060 <_dtoa_r+0x628>
 8009eb4:	f040 82cd 	bne.w	800a452 <_dtoa_r+0xa1a>
 8009eb8:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 8009ebc:	2200      	movs	r2, #0
 8009ebe:	4b66      	ldr	r3, [pc, #408]	; (800a058 <_dtoa_r+0x620>)
 8009ec0:	f7fa fb72 	bl	80045a8 <__aeabi_dmul>
 8009ec4:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8009ec8:	f7fa fdf4 	bl	8004ab4 <__aeabi_dcmpge>
 8009ecc:	464e      	mov	r6, r9
 8009ece:	464f      	mov	r7, r9
 8009ed0:	2800      	cmp	r0, #0
 8009ed2:	f040 82a4 	bne.w	800a41e <_dtoa_r+0x9e6>
 8009ed6:	9b06      	ldr	r3, [sp, #24]
 8009ed8:	9a06      	ldr	r2, [sp, #24]
 8009eda:	1c5d      	adds	r5, r3, #1
 8009edc:	2331      	movs	r3, #49	; 0x31
 8009ede:	f10b 0b01 	add.w	fp, fp, #1
 8009ee2:	7013      	strb	r3, [r2, #0]
 8009ee4:	e29f      	b.n	800a426 <_dtoa_r+0x9ee>
 8009ee6:	07f2      	lsls	r2, r6, #31
 8009ee8:	d505      	bpl.n	8009ef6 <_dtoa_r+0x4be>
 8009eea:	e9d7 2300 	ldrd	r2, r3, [r7]
 8009eee:	f7fa fb5b 	bl	80045a8 <__aeabi_dmul>
 8009ef2:	2301      	movs	r3, #1
 8009ef4:	3501      	adds	r5, #1
 8009ef6:	1076      	asrs	r6, r6, #1
 8009ef8:	3708      	adds	r7, #8
 8009efa:	e76d      	b.n	8009dd8 <_dtoa_r+0x3a0>
 8009efc:	2502      	movs	r5, #2
 8009efe:	e770      	b.n	8009de2 <_dtoa_r+0x3aa>
 8009f00:	465f      	mov	r7, fp
 8009f02:	464e      	mov	r6, r9
 8009f04:	e78f      	b.n	8009e26 <_dtoa_r+0x3ee>
 8009f06:	9a06      	ldr	r2, [sp, #24]
 8009f08:	4b4e      	ldr	r3, [pc, #312]	; (800a044 <_dtoa_r+0x60c>)
 8009f0a:	4432      	add	r2, r6
 8009f0c:	9211      	str	r2, [sp, #68]	; 0x44
 8009f0e:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009f10:	1e71      	subs	r1, r6, #1
 8009f12:	2a00      	cmp	r2, #0
 8009f14:	d048      	beq.n	8009fa8 <_dtoa_r+0x570>
 8009f16:	eb03 03c1 	add.w	r3, r3, r1, lsl #3
 8009f1a:	e9d3 2300 	ldrd	r2, r3, [r3]
 8009f1e:	2000      	movs	r0, #0
 8009f20:	494e      	ldr	r1, [pc, #312]	; (800a05c <_dtoa_r+0x624>)
 8009f22:	f7fa fc6b 	bl	80047fc <__aeabi_ddiv>
 8009f26:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 8009f2a:	f7fa f989 	bl	8004240 <__aeabi_dsub>
 8009f2e:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8009f32:	9d06      	ldr	r5, [sp, #24]
 8009f34:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009f38:	f7fa fde6 	bl	8004b08 <__aeabi_d2iz>
 8009f3c:	4606      	mov	r6, r0
 8009f3e:	f7fa facd 	bl	80044dc <__aeabi_i2d>
 8009f42:	4602      	mov	r2, r0
 8009f44:	460b      	mov	r3, r1
 8009f46:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009f4a:	f7fa f979 	bl	8004240 <__aeabi_dsub>
 8009f4e:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 8009f52:	3630      	adds	r6, #48	; 0x30
 8009f54:	f805 6b01 	strb.w	r6, [r5], #1
 8009f58:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009f5c:	f7fa fd96 	bl	8004a8c <__aeabi_dcmplt>
 8009f60:	2800      	cmp	r0, #0
 8009f62:	d164      	bne.n	800a02e <_dtoa_r+0x5f6>
 8009f64:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8009f68:	2000      	movs	r0, #0
 8009f6a:	4938      	ldr	r1, [pc, #224]	; (800a04c <_dtoa_r+0x614>)
 8009f6c:	f7fa f968 	bl	8004240 <__aeabi_dsub>
 8009f70:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 8009f74:	f7fa fd8a 	bl	8004a8c <__aeabi_dcmplt>
 8009f78:	2800      	cmp	r0, #0
 8009f7a:	f040 80b9 	bne.w	800a0f0 <_dtoa_r+0x6b8>
 8009f7e:	9b11      	ldr	r3, [sp, #68]	; 0x44
 8009f80:	429d      	cmp	r5, r3
 8009f82:	f43f af7c 	beq.w	8009e7e <_dtoa_r+0x446>
 8009f86:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 8009f8a:	2200      	movs	r2, #0
 8009f8c:	4b30      	ldr	r3, [pc, #192]	; (800a050 <_dtoa_r+0x618>)
 8009f8e:	f7fa fb0b 	bl	80045a8 <__aeabi_dmul>
 8009f92:	2200      	movs	r2, #0
 8009f94:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8009f98:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009f9c:	4b2c      	ldr	r3, [pc, #176]	; (800a050 <_dtoa_r+0x618>)
 8009f9e:	f7fa fb03 	bl	80045a8 <__aeabi_dmul>
 8009fa2:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009fa6:	e7c5      	b.n	8009f34 <_dtoa_r+0x4fc>
 8009fa8:	eb03 01c1 	add.w	r1, r3, r1, lsl #3
 8009fac:	e9d1 0100 	ldrd	r0, r1, [r1]
 8009fb0:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 8009fb4:	f7fa faf8 	bl	80045a8 <__aeabi_dmul>
 8009fb8:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 8009fbc:	9d06      	ldr	r5, [sp, #24]
 8009fbe:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009fc2:	f7fa fda1 	bl	8004b08 <__aeabi_d2iz>
 8009fc6:	4606      	mov	r6, r0
 8009fc8:	f7fa fa88 	bl	80044dc <__aeabi_i2d>
 8009fcc:	4602      	mov	r2, r0
 8009fce:	460b      	mov	r3, r1
 8009fd0:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009fd4:	f7fa f934 	bl	8004240 <__aeabi_dsub>
 8009fd8:	3630      	adds	r6, #48	; 0x30
 8009fda:	9b11      	ldr	r3, [sp, #68]	; 0x44
 8009fdc:	f805 6b01 	strb.w	r6, [r5], #1
 8009fe0:	42ab      	cmp	r3, r5
 8009fe2:	e9cd 0102 	strd	r0, r1, [sp, #8]
 8009fe6:	f04f 0200 	mov.w	r2, #0
 8009fea:	d124      	bne.n	800a036 <_dtoa_r+0x5fe>
 8009fec:	4b1b      	ldr	r3, [pc, #108]	; (800a05c <_dtoa_r+0x624>)
 8009fee:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 8009ff2:	f7fa f927 	bl	8004244 <__adddf3>
 8009ff6:	4602      	mov	r2, r0
 8009ff8:	460b      	mov	r3, r1
 8009ffa:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 8009ffe:	f7fa fd63 	bl	8004ac8 <__aeabi_dcmpgt>
 800a002:	2800      	cmp	r0, #0
 800a004:	d174      	bne.n	800a0f0 <_dtoa_r+0x6b8>
 800a006:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a00a:	2000      	movs	r0, #0
 800a00c:	4913      	ldr	r1, [pc, #76]	; (800a05c <_dtoa_r+0x624>)
 800a00e:	f7fa f917 	bl	8004240 <__aeabi_dsub>
 800a012:	4602      	mov	r2, r0
 800a014:	460b      	mov	r3, r1
 800a016:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a01a:	f7fa fd37 	bl	8004a8c <__aeabi_dcmplt>
 800a01e:	2800      	cmp	r0, #0
 800a020:	f43f af2d 	beq.w	8009e7e <_dtoa_r+0x446>
 800a024:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800a028:	1e6a      	subs	r2, r5, #1
 800a02a:	2b30      	cmp	r3, #48	; 0x30
 800a02c:	d001      	beq.n	800a032 <_dtoa_r+0x5fa>
 800a02e:	46bb      	mov	fp, r7
 800a030:	e04d      	b.n	800a0ce <_dtoa_r+0x696>
 800a032:	4615      	mov	r5, r2
 800a034:	e7f6      	b.n	800a024 <_dtoa_r+0x5ec>
 800a036:	4b06      	ldr	r3, [pc, #24]	; (800a050 <_dtoa_r+0x618>)
 800a038:	f7fa fab6 	bl	80045a8 <__aeabi_dmul>
 800a03c:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a040:	e7bd      	b.n	8009fbe <_dtoa_r+0x586>
 800a042:	bf00      	nop
 800a044:	0800bc20 	.word	0x0800bc20
 800a048:	0800bbf8 	.word	0x0800bbf8
 800a04c:	3ff00000 	.word	0x3ff00000
 800a050:	40240000 	.word	0x40240000
 800a054:	401c0000 	.word	0x401c0000
 800a058:	40140000 	.word	0x40140000
 800a05c:	3fe00000 	.word	0x3fe00000
 800a060:	9d06      	ldr	r5, [sp, #24]
 800a062:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 800a066:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 800a06a:	4630      	mov	r0, r6
 800a06c:	4639      	mov	r1, r7
 800a06e:	f7fa fbc5 	bl	80047fc <__aeabi_ddiv>
 800a072:	f7fa fd49 	bl	8004b08 <__aeabi_d2iz>
 800a076:	4680      	mov	r8, r0
 800a078:	f7fa fa30 	bl	80044dc <__aeabi_i2d>
 800a07c:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 800a080:	f7fa fa92 	bl	80045a8 <__aeabi_dmul>
 800a084:	4602      	mov	r2, r0
 800a086:	460b      	mov	r3, r1
 800a088:	4630      	mov	r0, r6
 800a08a:	4639      	mov	r1, r7
 800a08c:	f7fa f8d8 	bl	8004240 <__aeabi_dsub>
 800a090:	f108 0630 	add.w	r6, r8, #48	; 0x30
 800a094:	f805 6b01 	strb.w	r6, [r5], #1
 800a098:	9e06      	ldr	r6, [sp, #24]
 800a09a:	4602      	mov	r2, r0
 800a09c:	1bae      	subs	r6, r5, r6
 800a09e:	45b1      	cmp	r9, r6
 800a0a0:	460b      	mov	r3, r1
 800a0a2:	d137      	bne.n	800a114 <_dtoa_r+0x6dc>
 800a0a4:	f7fa f8ce 	bl	8004244 <__adddf3>
 800a0a8:	4606      	mov	r6, r0
 800a0aa:	460f      	mov	r7, r1
 800a0ac:	4602      	mov	r2, r0
 800a0ae:	460b      	mov	r3, r1
 800a0b0:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800a0b4:	f7fa fcea 	bl	8004a8c <__aeabi_dcmplt>
 800a0b8:	b9c8      	cbnz	r0, 800a0ee <_dtoa_r+0x6b6>
 800a0ba:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800a0be:	4632      	mov	r2, r6
 800a0c0:	463b      	mov	r3, r7
 800a0c2:	f7fa fcd9 	bl	8004a78 <__aeabi_dcmpeq>
 800a0c6:	b110      	cbz	r0, 800a0ce <_dtoa_r+0x696>
 800a0c8:	f018 0f01 	tst.w	r8, #1
 800a0cc:	d10f      	bne.n	800a0ee <_dtoa_r+0x6b6>
 800a0ce:	4651      	mov	r1, sl
 800a0d0:	4620      	mov	r0, r4
 800a0d2:	f000 fcbd 	bl	800aa50 <_Bfree>
 800a0d6:	2300      	movs	r3, #0
 800a0d8:	9a20      	ldr	r2, [sp, #128]	; 0x80
 800a0da:	702b      	strb	r3, [r5, #0]
 800a0dc:	f10b 0301 	add.w	r3, fp, #1
 800a0e0:	6013      	str	r3, [r2, #0]
 800a0e2:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800a0e4:	2b00      	cmp	r3, #0
 800a0e6:	f43f acec 	beq.w	8009ac2 <_dtoa_r+0x8a>
 800a0ea:	601d      	str	r5, [r3, #0]
 800a0ec:	e4e9      	b.n	8009ac2 <_dtoa_r+0x8a>
 800a0ee:	465f      	mov	r7, fp
 800a0f0:	f815 2c01 	ldrb.w	r2, [r5, #-1]
 800a0f4:	1e6b      	subs	r3, r5, #1
 800a0f6:	2a39      	cmp	r2, #57	; 0x39
 800a0f8:	d106      	bne.n	800a108 <_dtoa_r+0x6d0>
 800a0fa:	9a06      	ldr	r2, [sp, #24]
 800a0fc:	429a      	cmp	r2, r3
 800a0fe:	d107      	bne.n	800a110 <_dtoa_r+0x6d8>
 800a100:	2330      	movs	r3, #48	; 0x30
 800a102:	7013      	strb	r3, [r2, #0]
 800a104:	4613      	mov	r3, r2
 800a106:	3701      	adds	r7, #1
 800a108:	781a      	ldrb	r2, [r3, #0]
 800a10a:	3201      	adds	r2, #1
 800a10c:	701a      	strb	r2, [r3, #0]
 800a10e:	e78e      	b.n	800a02e <_dtoa_r+0x5f6>
 800a110:	461d      	mov	r5, r3
 800a112:	e7ed      	b.n	800a0f0 <_dtoa_r+0x6b8>
 800a114:	2200      	movs	r2, #0
 800a116:	4bb5      	ldr	r3, [pc, #724]	; (800a3ec <_dtoa_r+0x9b4>)
 800a118:	f7fa fa46 	bl	80045a8 <__aeabi_dmul>
 800a11c:	2200      	movs	r2, #0
 800a11e:	2300      	movs	r3, #0
 800a120:	4606      	mov	r6, r0
 800a122:	460f      	mov	r7, r1
 800a124:	f7fa fca8 	bl	8004a78 <__aeabi_dcmpeq>
 800a128:	2800      	cmp	r0, #0
 800a12a:	d09c      	beq.n	800a066 <_dtoa_r+0x62e>
 800a12c:	e7cf      	b.n	800a0ce <_dtoa_r+0x696>
 800a12e:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800a130:	2a00      	cmp	r2, #0
 800a132:	f000 8129 	beq.w	800a388 <_dtoa_r+0x950>
 800a136:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800a138:	2a01      	cmp	r2, #1
 800a13a:	f300 810e 	bgt.w	800a35a <_dtoa_r+0x922>
 800a13e:	9a10      	ldr	r2, [sp, #64]	; 0x40
 800a140:	2a00      	cmp	r2, #0
 800a142:	f000 8106 	beq.w	800a352 <_dtoa_r+0x91a>
 800a146:	f203 4333 	addw	r3, r3, #1075	; 0x433
 800a14a:	4645      	mov	r5, r8
 800a14c:	9e08      	ldr	r6, [sp, #32]
 800a14e:	9a07      	ldr	r2, [sp, #28]
 800a150:	2101      	movs	r1, #1
 800a152:	441a      	add	r2, r3
 800a154:	4620      	mov	r0, r4
 800a156:	4498      	add	r8, r3
 800a158:	9207      	str	r2, [sp, #28]
 800a15a:	f000 fd19 	bl	800ab90 <__i2b>
 800a15e:	4607      	mov	r7, r0
 800a160:	2d00      	cmp	r5, #0
 800a162:	dd0b      	ble.n	800a17c <_dtoa_r+0x744>
 800a164:	9b07      	ldr	r3, [sp, #28]
 800a166:	2b00      	cmp	r3, #0
 800a168:	dd08      	ble.n	800a17c <_dtoa_r+0x744>
 800a16a:	42ab      	cmp	r3, r5
 800a16c:	bfa8      	it	ge
 800a16e:	462b      	movge	r3, r5
 800a170:	9a07      	ldr	r2, [sp, #28]
 800a172:	eba8 0803 	sub.w	r8, r8, r3
 800a176:	1aed      	subs	r5, r5, r3
 800a178:	1ad3      	subs	r3, r2, r3
 800a17a:	9307      	str	r3, [sp, #28]
 800a17c:	9b08      	ldr	r3, [sp, #32]
 800a17e:	b1fb      	cbz	r3, 800a1c0 <_dtoa_r+0x788>
 800a180:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800a182:	2b00      	cmp	r3, #0
 800a184:	f000 8104 	beq.w	800a390 <_dtoa_r+0x958>
 800a188:	2e00      	cmp	r6, #0
 800a18a:	dd11      	ble.n	800a1b0 <_dtoa_r+0x778>
 800a18c:	4639      	mov	r1, r7
 800a18e:	4632      	mov	r2, r6
 800a190:	4620      	mov	r0, r4
 800a192:	f000 fd93 	bl	800acbc <__pow5mult>
 800a196:	4652      	mov	r2, sl
 800a198:	4601      	mov	r1, r0
 800a19a:	4607      	mov	r7, r0
 800a19c:	4620      	mov	r0, r4
 800a19e:	f000 fd00 	bl	800aba2 <__multiply>
 800a1a2:	4651      	mov	r1, sl
 800a1a4:	900a      	str	r0, [sp, #40]	; 0x28
 800a1a6:	4620      	mov	r0, r4
 800a1a8:	f000 fc52 	bl	800aa50 <_Bfree>
 800a1ac:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 800a1ae:	469a      	mov	sl, r3
 800a1b0:	9b08      	ldr	r3, [sp, #32]
 800a1b2:	1b9a      	subs	r2, r3, r6
 800a1b4:	d004      	beq.n	800a1c0 <_dtoa_r+0x788>
 800a1b6:	4651      	mov	r1, sl
 800a1b8:	4620      	mov	r0, r4
 800a1ba:	f000 fd7f 	bl	800acbc <__pow5mult>
 800a1be:	4682      	mov	sl, r0
 800a1c0:	2101      	movs	r1, #1
 800a1c2:	4620      	mov	r0, r4
 800a1c4:	f000 fce4 	bl	800ab90 <__i2b>
 800a1c8:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800a1ca:	4606      	mov	r6, r0
 800a1cc:	2b00      	cmp	r3, #0
 800a1ce:	f340 80e1 	ble.w	800a394 <_dtoa_r+0x95c>
 800a1d2:	461a      	mov	r2, r3
 800a1d4:	4601      	mov	r1, r0
 800a1d6:	4620      	mov	r0, r4
 800a1d8:	f000 fd70 	bl	800acbc <__pow5mult>
 800a1dc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a1de:	4606      	mov	r6, r0
 800a1e0:	2b01      	cmp	r3, #1
 800a1e2:	f340 80da 	ble.w	800a39a <_dtoa_r+0x962>
 800a1e6:	2300      	movs	r3, #0
 800a1e8:	9308      	str	r3, [sp, #32]
 800a1ea:	6933      	ldr	r3, [r6, #16]
 800a1ec:	eb06 0383 	add.w	r3, r6, r3, lsl #2
 800a1f0:	6918      	ldr	r0, [r3, #16]
 800a1f2:	f000 fc7f 	bl	800aaf4 <__hi0bits>
 800a1f6:	f1c0 0020 	rsb	r0, r0, #32
 800a1fa:	9b07      	ldr	r3, [sp, #28]
 800a1fc:	4418      	add	r0, r3
 800a1fe:	f010 001f 	ands.w	r0, r0, #31
 800a202:	f000 80f0 	beq.w	800a3e6 <_dtoa_r+0x9ae>
 800a206:	f1c0 0320 	rsb	r3, r0, #32
 800a20a:	2b04      	cmp	r3, #4
 800a20c:	f340 80e2 	ble.w	800a3d4 <_dtoa_r+0x99c>
 800a210:	9b07      	ldr	r3, [sp, #28]
 800a212:	f1c0 001c 	rsb	r0, r0, #28
 800a216:	4480      	add	r8, r0
 800a218:	4405      	add	r5, r0
 800a21a:	4403      	add	r3, r0
 800a21c:	9307      	str	r3, [sp, #28]
 800a21e:	f1b8 0f00 	cmp.w	r8, #0
 800a222:	dd05      	ble.n	800a230 <_dtoa_r+0x7f8>
 800a224:	4651      	mov	r1, sl
 800a226:	4642      	mov	r2, r8
 800a228:	4620      	mov	r0, r4
 800a22a:	f000 fd95 	bl	800ad58 <__lshift>
 800a22e:	4682      	mov	sl, r0
 800a230:	9b07      	ldr	r3, [sp, #28]
 800a232:	2b00      	cmp	r3, #0
 800a234:	dd05      	ble.n	800a242 <_dtoa_r+0x80a>
 800a236:	4631      	mov	r1, r6
 800a238:	461a      	mov	r2, r3
 800a23a:	4620      	mov	r0, r4
 800a23c:	f000 fd8c 	bl	800ad58 <__lshift>
 800a240:	4606      	mov	r6, r0
 800a242:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800a244:	2b00      	cmp	r3, #0
 800a246:	f000 80d3 	beq.w	800a3f0 <_dtoa_r+0x9b8>
 800a24a:	4631      	mov	r1, r6
 800a24c:	4650      	mov	r0, sl
 800a24e:	f000 fdd4 	bl	800adfa <__mcmp>
 800a252:	2800      	cmp	r0, #0
 800a254:	f280 80cc 	bge.w	800a3f0 <_dtoa_r+0x9b8>
 800a258:	2300      	movs	r3, #0
 800a25a:	4651      	mov	r1, sl
 800a25c:	220a      	movs	r2, #10
 800a25e:	4620      	mov	r0, r4
 800a260:	f000 fc0d 	bl	800aa7e <__multadd>
 800a264:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800a266:	f10b 3bff 	add.w	fp, fp, #4294967295
 800a26a:	4682      	mov	sl, r0
 800a26c:	2b00      	cmp	r3, #0
 800a26e:	f000 81a9 	beq.w	800a5c4 <_dtoa_r+0xb8c>
 800a272:	2300      	movs	r3, #0
 800a274:	4639      	mov	r1, r7
 800a276:	220a      	movs	r2, #10
 800a278:	4620      	mov	r0, r4
 800a27a:	f000 fc00 	bl	800aa7e <__multadd>
 800a27e:	9b04      	ldr	r3, [sp, #16]
 800a280:	4607      	mov	r7, r0
 800a282:	2b00      	cmp	r3, #0
 800a284:	dc03      	bgt.n	800a28e <_dtoa_r+0x856>
 800a286:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a288:	2b02      	cmp	r3, #2
 800a28a:	f300 80b9 	bgt.w	800a400 <_dtoa_r+0x9c8>
 800a28e:	2d00      	cmp	r5, #0
 800a290:	dd05      	ble.n	800a29e <_dtoa_r+0x866>
 800a292:	4639      	mov	r1, r7
 800a294:	462a      	mov	r2, r5
 800a296:	4620      	mov	r0, r4
 800a298:	f000 fd5e 	bl	800ad58 <__lshift>
 800a29c:	4607      	mov	r7, r0
 800a29e:	9b08      	ldr	r3, [sp, #32]
 800a2a0:	2b00      	cmp	r3, #0
 800a2a2:	f000 8110 	beq.w	800a4c6 <_dtoa_r+0xa8e>
 800a2a6:	6879      	ldr	r1, [r7, #4]
 800a2a8:	4620      	mov	r0, r4
 800a2aa:	f000 fb9d 	bl	800a9e8 <_Balloc>
 800a2ae:	4605      	mov	r5, r0
 800a2b0:	693a      	ldr	r2, [r7, #16]
 800a2b2:	f107 010c 	add.w	r1, r7, #12
 800a2b6:	3202      	adds	r2, #2
 800a2b8:	0092      	lsls	r2, r2, #2
 800a2ba:	300c      	adds	r0, #12
 800a2bc:	f7fe fcb4 	bl	8008c28 <memcpy>
 800a2c0:	2201      	movs	r2, #1
 800a2c2:	4629      	mov	r1, r5
 800a2c4:	4620      	mov	r0, r4
 800a2c6:	f000 fd47 	bl	800ad58 <__lshift>
 800a2ca:	9707      	str	r7, [sp, #28]
 800a2cc:	4607      	mov	r7, r0
 800a2ce:	9b02      	ldr	r3, [sp, #8]
 800a2d0:	f8dd 8018 	ldr.w	r8, [sp, #24]
 800a2d4:	f003 0301 	and.w	r3, r3, #1
 800a2d8:	9308      	str	r3, [sp, #32]
 800a2da:	4631      	mov	r1, r6
 800a2dc:	4650      	mov	r0, sl
 800a2de:	f7ff fb1d 	bl	800991c <quorem>
 800a2e2:	9907      	ldr	r1, [sp, #28]
 800a2e4:	4605      	mov	r5, r0
 800a2e6:	f100 0930 	add.w	r9, r0, #48	; 0x30
 800a2ea:	4650      	mov	r0, sl
 800a2ec:	f000 fd85 	bl	800adfa <__mcmp>
 800a2f0:	463a      	mov	r2, r7
 800a2f2:	9002      	str	r0, [sp, #8]
 800a2f4:	4631      	mov	r1, r6
 800a2f6:	4620      	mov	r0, r4
 800a2f8:	f000 fd99 	bl	800ae2e <__mdiff>
 800a2fc:	68c3      	ldr	r3, [r0, #12]
 800a2fe:	4602      	mov	r2, r0
 800a300:	2b00      	cmp	r3, #0
 800a302:	f040 80e2 	bne.w	800a4ca <_dtoa_r+0xa92>
 800a306:	4601      	mov	r1, r0
 800a308:	9009      	str	r0, [sp, #36]	; 0x24
 800a30a:	4650      	mov	r0, sl
 800a30c:	f000 fd75 	bl	800adfa <__mcmp>
 800a310:	4603      	mov	r3, r0
 800a312:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800a314:	4611      	mov	r1, r2
 800a316:	4620      	mov	r0, r4
 800a318:	9309      	str	r3, [sp, #36]	; 0x24
 800a31a:	f000 fb99 	bl	800aa50 <_Bfree>
 800a31e:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800a320:	2b00      	cmp	r3, #0
 800a322:	f040 80d4 	bne.w	800a4ce <_dtoa_r+0xa96>
 800a326:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800a328:	2a00      	cmp	r2, #0
 800a32a:	f040 80d0 	bne.w	800a4ce <_dtoa_r+0xa96>
 800a32e:	9a08      	ldr	r2, [sp, #32]
 800a330:	2a00      	cmp	r2, #0
 800a332:	f040 80cc 	bne.w	800a4ce <_dtoa_r+0xa96>
 800a336:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800a33a:	f000 80e8 	beq.w	800a50e <_dtoa_r+0xad6>
 800a33e:	9b02      	ldr	r3, [sp, #8]
 800a340:	2b00      	cmp	r3, #0
 800a342:	dd01      	ble.n	800a348 <_dtoa_r+0x910>
 800a344:	f105 0931 	add.w	r9, r5, #49	; 0x31
 800a348:	f108 0501 	add.w	r5, r8, #1
 800a34c:	f888 9000 	strb.w	r9, [r8]
 800a350:	e06b      	b.n	800a42a <_dtoa_r+0x9f2>
 800a352:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800a354:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
 800a358:	e6f7      	b.n	800a14a <_dtoa_r+0x712>
 800a35a:	9b08      	ldr	r3, [sp, #32]
 800a35c:	f109 36ff 	add.w	r6, r9, #4294967295
 800a360:	42b3      	cmp	r3, r6
 800a362:	bfb7      	itett	lt
 800a364:	9b08      	ldrlt	r3, [sp, #32]
 800a366:	1b9e      	subge	r6, r3, r6
 800a368:	1af2      	sublt	r2, r6, r3
 800a36a:	9b0c      	ldrlt	r3, [sp, #48]	; 0x30
 800a36c:	bfbf      	itttt	lt
 800a36e:	9608      	strlt	r6, [sp, #32]
 800a370:	189b      	addlt	r3, r3, r2
 800a372:	930c      	strlt	r3, [sp, #48]	; 0x30
 800a374:	2600      	movlt	r6, #0
 800a376:	f1b9 0f00 	cmp.w	r9, #0
 800a37a:	bfb9      	ittee	lt
 800a37c:	eba8 0509 	sublt.w	r5, r8, r9
 800a380:	2300      	movlt	r3, #0
 800a382:	4645      	movge	r5, r8
 800a384:	464b      	movge	r3, r9
 800a386:	e6e2      	b.n	800a14e <_dtoa_r+0x716>
 800a388:	9e08      	ldr	r6, [sp, #32]
 800a38a:	4645      	mov	r5, r8
 800a38c:	9f09      	ldr	r7, [sp, #36]	; 0x24
 800a38e:	e6e7      	b.n	800a160 <_dtoa_r+0x728>
 800a390:	9a08      	ldr	r2, [sp, #32]
 800a392:	e710      	b.n	800a1b6 <_dtoa_r+0x77e>
 800a394:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a396:	2b01      	cmp	r3, #1
 800a398:	dc18      	bgt.n	800a3cc <_dtoa_r+0x994>
 800a39a:	9b02      	ldr	r3, [sp, #8]
 800a39c:	b9b3      	cbnz	r3, 800a3cc <_dtoa_r+0x994>
 800a39e:	9b03      	ldr	r3, [sp, #12]
 800a3a0:	f3c3 0313 	ubfx	r3, r3, #0, #20
 800a3a4:	b9a3      	cbnz	r3, 800a3d0 <_dtoa_r+0x998>
 800a3a6:	9b03      	ldr	r3, [sp, #12]
 800a3a8:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 800a3ac:	0d1b      	lsrs	r3, r3, #20
 800a3ae:	051b      	lsls	r3, r3, #20
 800a3b0:	b12b      	cbz	r3, 800a3be <_dtoa_r+0x986>
 800a3b2:	9b07      	ldr	r3, [sp, #28]
 800a3b4:	f108 0801 	add.w	r8, r8, #1
 800a3b8:	3301      	adds	r3, #1
 800a3ba:	9307      	str	r3, [sp, #28]
 800a3bc:	2301      	movs	r3, #1
 800a3be:	9308      	str	r3, [sp, #32]
 800a3c0:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800a3c2:	2b00      	cmp	r3, #0
 800a3c4:	f47f af11 	bne.w	800a1ea <_dtoa_r+0x7b2>
 800a3c8:	2001      	movs	r0, #1
 800a3ca:	e716      	b.n	800a1fa <_dtoa_r+0x7c2>
 800a3cc:	2300      	movs	r3, #0
 800a3ce:	e7f6      	b.n	800a3be <_dtoa_r+0x986>
 800a3d0:	9b02      	ldr	r3, [sp, #8]
 800a3d2:	e7f4      	b.n	800a3be <_dtoa_r+0x986>
 800a3d4:	f43f af23 	beq.w	800a21e <_dtoa_r+0x7e6>
 800a3d8:	9a07      	ldr	r2, [sp, #28]
 800a3da:	331c      	adds	r3, #28
 800a3dc:	441a      	add	r2, r3
 800a3de:	4498      	add	r8, r3
 800a3e0:	441d      	add	r5, r3
 800a3e2:	4613      	mov	r3, r2
 800a3e4:	e71a      	b.n	800a21c <_dtoa_r+0x7e4>
 800a3e6:	4603      	mov	r3, r0
 800a3e8:	e7f6      	b.n	800a3d8 <_dtoa_r+0x9a0>
 800a3ea:	bf00      	nop
 800a3ec:	40240000 	.word	0x40240000
 800a3f0:	f1b9 0f00 	cmp.w	r9, #0
 800a3f4:	dc33      	bgt.n	800a45e <_dtoa_r+0xa26>
 800a3f6:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a3f8:	2b02      	cmp	r3, #2
 800a3fa:	dd30      	ble.n	800a45e <_dtoa_r+0xa26>
 800a3fc:	f8cd 9010 	str.w	r9, [sp, #16]
 800a400:	9b04      	ldr	r3, [sp, #16]
 800a402:	b963      	cbnz	r3, 800a41e <_dtoa_r+0x9e6>
 800a404:	4631      	mov	r1, r6
 800a406:	2205      	movs	r2, #5
 800a408:	4620      	mov	r0, r4
 800a40a:	f000 fb38 	bl	800aa7e <__multadd>
 800a40e:	4601      	mov	r1, r0
 800a410:	4606      	mov	r6, r0
 800a412:	4650      	mov	r0, sl
 800a414:	f000 fcf1 	bl	800adfa <__mcmp>
 800a418:	2800      	cmp	r0, #0
 800a41a:	f73f ad5c 	bgt.w	8009ed6 <_dtoa_r+0x49e>
 800a41e:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800a420:	9d06      	ldr	r5, [sp, #24]
 800a422:	ea6f 0b03 	mvn.w	fp, r3
 800a426:	2300      	movs	r3, #0
 800a428:	9307      	str	r3, [sp, #28]
 800a42a:	4631      	mov	r1, r6
 800a42c:	4620      	mov	r0, r4
 800a42e:	f000 fb0f 	bl	800aa50 <_Bfree>
 800a432:	2f00      	cmp	r7, #0
 800a434:	f43f ae4b 	beq.w	800a0ce <_dtoa_r+0x696>
 800a438:	9b07      	ldr	r3, [sp, #28]
 800a43a:	b12b      	cbz	r3, 800a448 <_dtoa_r+0xa10>
 800a43c:	42bb      	cmp	r3, r7
 800a43e:	d003      	beq.n	800a448 <_dtoa_r+0xa10>
 800a440:	4619      	mov	r1, r3
 800a442:	4620      	mov	r0, r4
 800a444:	f000 fb04 	bl	800aa50 <_Bfree>
 800a448:	4639      	mov	r1, r7
 800a44a:	4620      	mov	r0, r4
 800a44c:	f000 fb00 	bl	800aa50 <_Bfree>
 800a450:	e63d      	b.n	800a0ce <_dtoa_r+0x696>
 800a452:	2600      	movs	r6, #0
 800a454:	4637      	mov	r7, r6
 800a456:	e7e2      	b.n	800a41e <_dtoa_r+0x9e6>
 800a458:	46bb      	mov	fp, r7
 800a45a:	4637      	mov	r7, r6
 800a45c:	e53b      	b.n	8009ed6 <_dtoa_r+0x49e>
 800a45e:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800a460:	f8cd 9010 	str.w	r9, [sp, #16]
 800a464:	2b00      	cmp	r3, #0
 800a466:	f47f af12 	bne.w	800a28e <_dtoa_r+0x856>
 800a46a:	9d06      	ldr	r5, [sp, #24]
 800a46c:	4631      	mov	r1, r6
 800a46e:	4650      	mov	r0, sl
 800a470:	f7ff fa54 	bl	800991c <quorem>
 800a474:	9b06      	ldr	r3, [sp, #24]
 800a476:	f100 0930 	add.w	r9, r0, #48	; 0x30
 800a47a:	f805 9b01 	strb.w	r9, [r5], #1
 800a47e:	9a04      	ldr	r2, [sp, #16]
 800a480:	1aeb      	subs	r3, r5, r3
 800a482:	429a      	cmp	r2, r3
 800a484:	f300 8081 	bgt.w	800a58a <_dtoa_r+0xb52>
 800a488:	9b06      	ldr	r3, [sp, #24]
 800a48a:	2a01      	cmp	r2, #1
 800a48c:	bfac      	ite	ge
 800a48e:	189b      	addge	r3, r3, r2
 800a490:	3301      	addlt	r3, #1
 800a492:	4698      	mov	r8, r3
 800a494:	2300      	movs	r3, #0
 800a496:	9307      	str	r3, [sp, #28]
 800a498:	4651      	mov	r1, sl
 800a49a:	2201      	movs	r2, #1
 800a49c:	4620      	mov	r0, r4
 800a49e:	f000 fc5b 	bl	800ad58 <__lshift>
 800a4a2:	4631      	mov	r1, r6
 800a4a4:	4682      	mov	sl, r0
 800a4a6:	f000 fca8 	bl	800adfa <__mcmp>
 800a4aa:	2800      	cmp	r0, #0
 800a4ac:	dc34      	bgt.n	800a518 <_dtoa_r+0xae0>
 800a4ae:	d102      	bne.n	800a4b6 <_dtoa_r+0xa7e>
 800a4b0:	f019 0f01 	tst.w	r9, #1
 800a4b4:	d130      	bne.n	800a518 <_dtoa_r+0xae0>
 800a4b6:	4645      	mov	r5, r8
 800a4b8:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800a4bc:	1e6a      	subs	r2, r5, #1
 800a4be:	2b30      	cmp	r3, #48	; 0x30
 800a4c0:	d1b3      	bne.n	800a42a <_dtoa_r+0x9f2>
 800a4c2:	4615      	mov	r5, r2
 800a4c4:	e7f8      	b.n	800a4b8 <_dtoa_r+0xa80>
 800a4c6:	4638      	mov	r0, r7
 800a4c8:	e6ff      	b.n	800a2ca <_dtoa_r+0x892>
 800a4ca:	2301      	movs	r3, #1
 800a4cc:	e722      	b.n	800a314 <_dtoa_r+0x8dc>
 800a4ce:	9a02      	ldr	r2, [sp, #8]
 800a4d0:	2a00      	cmp	r2, #0
 800a4d2:	db04      	blt.n	800a4de <_dtoa_r+0xaa6>
 800a4d4:	d128      	bne.n	800a528 <_dtoa_r+0xaf0>
 800a4d6:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800a4d8:	bb32      	cbnz	r2, 800a528 <_dtoa_r+0xaf0>
 800a4da:	9a08      	ldr	r2, [sp, #32]
 800a4dc:	bb22      	cbnz	r2, 800a528 <_dtoa_r+0xaf0>
 800a4de:	2b00      	cmp	r3, #0
 800a4e0:	f77f af32 	ble.w	800a348 <_dtoa_r+0x910>
 800a4e4:	4651      	mov	r1, sl
 800a4e6:	2201      	movs	r2, #1
 800a4e8:	4620      	mov	r0, r4
 800a4ea:	f000 fc35 	bl	800ad58 <__lshift>
 800a4ee:	4631      	mov	r1, r6
 800a4f0:	4682      	mov	sl, r0
 800a4f2:	f000 fc82 	bl	800adfa <__mcmp>
 800a4f6:	2800      	cmp	r0, #0
 800a4f8:	dc05      	bgt.n	800a506 <_dtoa_r+0xace>
 800a4fa:	f47f af25 	bne.w	800a348 <_dtoa_r+0x910>
 800a4fe:	f019 0f01 	tst.w	r9, #1
 800a502:	f43f af21 	beq.w	800a348 <_dtoa_r+0x910>
 800a506:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800a50a:	f47f af1b 	bne.w	800a344 <_dtoa_r+0x90c>
 800a50e:	2339      	movs	r3, #57	; 0x39
 800a510:	f108 0801 	add.w	r8, r8, #1
 800a514:	f808 3c01 	strb.w	r3, [r8, #-1]
 800a518:	4645      	mov	r5, r8
 800a51a:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800a51e:	1e6a      	subs	r2, r5, #1
 800a520:	2b39      	cmp	r3, #57	; 0x39
 800a522:	d03a      	beq.n	800a59a <_dtoa_r+0xb62>
 800a524:	3301      	adds	r3, #1
 800a526:	e03f      	b.n	800a5a8 <_dtoa_r+0xb70>
 800a528:	2b00      	cmp	r3, #0
 800a52a:	f108 0501 	add.w	r5, r8, #1
 800a52e:	dd05      	ble.n	800a53c <_dtoa_r+0xb04>
 800a530:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800a534:	d0eb      	beq.n	800a50e <_dtoa_r+0xad6>
 800a536:	f109 0901 	add.w	r9, r9, #1
 800a53a:	e707      	b.n	800a34c <_dtoa_r+0x914>
 800a53c:	9b06      	ldr	r3, [sp, #24]
 800a53e:	9a04      	ldr	r2, [sp, #16]
 800a540:	1aeb      	subs	r3, r5, r3
 800a542:	4293      	cmp	r3, r2
 800a544:	46a8      	mov	r8, r5
 800a546:	f805 9c01 	strb.w	r9, [r5, #-1]
 800a54a:	d0a5      	beq.n	800a498 <_dtoa_r+0xa60>
 800a54c:	4651      	mov	r1, sl
 800a54e:	2300      	movs	r3, #0
 800a550:	220a      	movs	r2, #10
 800a552:	4620      	mov	r0, r4
 800a554:	f000 fa93 	bl	800aa7e <__multadd>
 800a558:	9b07      	ldr	r3, [sp, #28]
 800a55a:	4682      	mov	sl, r0
 800a55c:	42bb      	cmp	r3, r7
 800a55e:	f04f 020a 	mov.w	r2, #10
 800a562:	f04f 0300 	mov.w	r3, #0
 800a566:	9907      	ldr	r1, [sp, #28]
 800a568:	4620      	mov	r0, r4
 800a56a:	d104      	bne.n	800a576 <_dtoa_r+0xb3e>
 800a56c:	f000 fa87 	bl	800aa7e <__multadd>
 800a570:	9007      	str	r0, [sp, #28]
 800a572:	4607      	mov	r7, r0
 800a574:	e6b1      	b.n	800a2da <_dtoa_r+0x8a2>
 800a576:	f000 fa82 	bl	800aa7e <__multadd>
 800a57a:	2300      	movs	r3, #0
 800a57c:	9007      	str	r0, [sp, #28]
 800a57e:	220a      	movs	r2, #10
 800a580:	4639      	mov	r1, r7
 800a582:	4620      	mov	r0, r4
 800a584:	f000 fa7b 	bl	800aa7e <__multadd>
 800a588:	e7f3      	b.n	800a572 <_dtoa_r+0xb3a>
 800a58a:	4651      	mov	r1, sl
 800a58c:	2300      	movs	r3, #0
 800a58e:	220a      	movs	r2, #10
 800a590:	4620      	mov	r0, r4
 800a592:	f000 fa74 	bl	800aa7e <__multadd>
 800a596:	4682      	mov	sl, r0
 800a598:	e768      	b.n	800a46c <_dtoa_r+0xa34>
 800a59a:	9b06      	ldr	r3, [sp, #24]
 800a59c:	4293      	cmp	r3, r2
 800a59e:	d105      	bne.n	800a5ac <_dtoa_r+0xb74>
 800a5a0:	2331      	movs	r3, #49	; 0x31
 800a5a2:	9a06      	ldr	r2, [sp, #24]
 800a5a4:	f10b 0b01 	add.w	fp, fp, #1
 800a5a8:	7013      	strb	r3, [r2, #0]
 800a5aa:	e73e      	b.n	800a42a <_dtoa_r+0x9f2>
 800a5ac:	4615      	mov	r5, r2
 800a5ae:	e7b4      	b.n	800a51a <_dtoa_r+0xae2>
 800a5b0:	4b09      	ldr	r3, [pc, #36]	; (800a5d8 <_dtoa_r+0xba0>)
 800a5b2:	f7ff baa3 	b.w	8009afc <_dtoa_r+0xc4>
 800a5b6:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800a5b8:	2b00      	cmp	r3, #0
 800a5ba:	f47f aa7d 	bne.w	8009ab8 <_dtoa_r+0x80>
 800a5be:	4b07      	ldr	r3, [pc, #28]	; (800a5dc <_dtoa_r+0xba4>)
 800a5c0:	f7ff ba9c 	b.w	8009afc <_dtoa_r+0xc4>
 800a5c4:	9b04      	ldr	r3, [sp, #16]
 800a5c6:	2b00      	cmp	r3, #0
 800a5c8:	f73f af4f 	bgt.w	800a46a <_dtoa_r+0xa32>
 800a5cc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a5ce:	2b02      	cmp	r3, #2
 800a5d0:	f77f af4b 	ble.w	800a46a <_dtoa_r+0xa32>
 800a5d4:	e714      	b.n	800a400 <_dtoa_r+0x9c8>
 800a5d6:	bf00      	nop
 800a5d8:	0800bb64 	.word	0x0800bb64
 800a5dc:	0800bb88 	.word	0x0800bb88

0800a5e0 <__sflush_r>:
 800a5e0:	898a      	ldrh	r2, [r1, #12]
 800a5e2:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800a5e6:	4605      	mov	r5, r0
 800a5e8:	0710      	lsls	r0, r2, #28
 800a5ea:	460c      	mov	r4, r1
 800a5ec:	d45a      	bmi.n	800a6a4 <__sflush_r+0xc4>
 800a5ee:	684b      	ldr	r3, [r1, #4]
 800a5f0:	2b00      	cmp	r3, #0
 800a5f2:	dc05      	bgt.n	800a600 <__sflush_r+0x20>
 800a5f4:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 800a5f6:	2b00      	cmp	r3, #0
 800a5f8:	dc02      	bgt.n	800a600 <__sflush_r+0x20>
 800a5fa:	2000      	movs	r0, #0
 800a5fc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800a600:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800a602:	2e00      	cmp	r6, #0
 800a604:	d0f9      	beq.n	800a5fa <__sflush_r+0x1a>
 800a606:	2300      	movs	r3, #0
 800a608:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 800a60c:	682f      	ldr	r7, [r5, #0]
 800a60e:	602b      	str	r3, [r5, #0]
 800a610:	d033      	beq.n	800a67a <__sflush_r+0x9a>
 800a612:	6d60      	ldr	r0, [r4, #84]	; 0x54
 800a614:	89a3      	ldrh	r3, [r4, #12]
 800a616:	075a      	lsls	r2, r3, #29
 800a618:	d505      	bpl.n	800a626 <__sflush_r+0x46>
 800a61a:	6863      	ldr	r3, [r4, #4]
 800a61c:	1ac0      	subs	r0, r0, r3
 800a61e:	6b63      	ldr	r3, [r4, #52]	; 0x34
 800a620:	b10b      	cbz	r3, 800a626 <__sflush_r+0x46>
 800a622:	6c23      	ldr	r3, [r4, #64]	; 0x40
 800a624:	1ac0      	subs	r0, r0, r3
 800a626:	2300      	movs	r3, #0
 800a628:	4602      	mov	r2, r0
 800a62a:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800a62c:	6a21      	ldr	r1, [r4, #32]
 800a62e:	4628      	mov	r0, r5
 800a630:	47b0      	blx	r6
 800a632:	1c43      	adds	r3, r0, #1
 800a634:	89a3      	ldrh	r3, [r4, #12]
 800a636:	d106      	bne.n	800a646 <__sflush_r+0x66>
 800a638:	6829      	ldr	r1, [r5, #0]
 800a63a:	291d      	cmp	r1, #29
 800a63c:	d84b      	bhi.n	800a6d6 <__sflush_r+0xf6>
 800a63e:	4a2b      	ldr	r2, [pc, #172]	; (800a6ec <__sflush_r+0x10c>)
 800a640:	40ca      	lsrs	r2, r1
 800a642:	07d6      	lsls	r6, r2, #31
 800a644:	d547      	bpl.n	800a6d6 <__sflush_r+0xf6>
 800a646:	2200      	movs	r2, #0
 800a648:	6062      	str	r2, [r4, #4]
 800a64a:	6922      	ldr	r2, [r4, #16]
 800a64c:	04d9      	lsls	r1, r3, #19
 800a64e:	6022      	str	r2, [r4, #0]
 800a650:	d504      	bpl.n	800a65c <__sflush_r+0x7c>
 800a652:	1c42      	adds	r2, r0, #1
 800a654:	d101      	bne.n	800a65a <__sflush_r+0x7a>
 800a656:	682b      	ldr	r3, [r5, #0]
 800a658:	b903      	cbnz	r3, 800a65c <__sflush_r+0x7c>
 800a65a:	6560      	str	r0, [r4, #84]	; 0x54
 800a65c:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800a65e:	602f      	str	r7, [r5, #0]
 800a660:	2900      	cmp	r1, #0
 800a662:	d0ca      	beq.n	800a5fa <__sflush_r+0x1a>
 800a664:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800a668:	4299      	cmp	r1, r3
 800a66a:	d002      	beq.n	800a672 <__sflush_r+0x92>
 800a66c:	4628      	mov	r0, r5
 800a66e:	f000 fc9b 	bl	800afa8 <_free_r>
 800a672:	2000      	movs	r0, #0
 800a674:	6360      	str	r0, [r4, #52]	; 0x34
 800a676:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800a67a:	6a21      	ldr	r1, [r4, #32]
 800a67c:	2301      	movs	r3, #1
 800a67e:	4628      	mov	r0, r5
 800a680:	47b0      	blx	r6
 800a682:	1c41      	adds	r1, r0, #1
 800a684:	d1c6      	bne.n	800a614 <__sflush_r+0x34>
 800a686:	682b      	ldr	r3, [r5, #0]
 800a688:	2b00      	cmp	r3, #0
 800a68a:	d0c3      	beq.n	800a614 <__sflush_r+0x34>
 800a68c:	2b1d      	cmp	r3, #29
 800a68e:	d001      	beq.n	800a694 <__sflush_r+0xb4>
 800a690:	2b16      	cmp	r3, #22
 800a692:	d101      	bne.n	800a698 <__sflush_r+0xb8>
 800a694:	602f      	str	r7, [r5, #0]
 800a696:	e7b0      	b.n	800a5fa <__sflush_r+0x1a>
 800a698:	89a3      	ldrh	r3, [r4, #12]
 800a69a:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800a69e:	81a3      	strh	r3, [r4, #12]
 800a6a0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800a6a4:	690f      	ldr	r7, [r1, #16]
 800a6a6:	2f00      	cmp	r7, #0
 800a6a8:	d0a7      	beq.n	800a5fa <__sflush_r+0x1a>
 800a6aa:	0793      	lsls	r3, r2, #30
 800a6ac:	bf18      	it	ne
 800a6ae:	2300      	movne	r3, #0
 800a6b0:	680e      	ldr	r6, [r1, #0]
 800a6b2:	bf08      	it	eq
 800a6b4:	694b      	ldreq	r3, [r1, #20]
 800a6b6:	eba6 0807 	sub.w	r8, r6, r7
 800a6ba:	600f      	str	r7, [r1, #0]
 800a6bc:	608b      	str	r3, [r1, #8]
 800a6be:	f1b8 0f00 	cmp.w	r8, #0
 800a6c2:	dd9a      	ble.n	800a5fa <__sflush_r+0x1a>
 800a6c4:	4643      	mov	r3, r8
 800a6c6:	463a      	mov	r2, r7
 800a6c8:	6a21      	ldr	r1, [r4, #32]
 800a6ca:	4628      	mov	r0, r5
 800a6cc:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 800a6ce:	47b0      	blx	r6
 800a6d0:	2800      	cmp	r0, #0
 800a6d2:	dc07      	bgt.n	800a6e4 <__sflush_r+0x104>
 800a6d4:	89a3      	ldrh	r3, [r4, #12]
 800a6d6:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800a6da:	81a3      	strh	r3, [r4, #12]
 800a6dc:	f04f 30ff 	mov.w	r0, #4294967295
 800a6e0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800a6e4:	4407      	add	r7, r0
 800a6e6:	eba8 0800 	sub.w	r8, r8, r0
 800a6ea:	e7e8      	b.n	800a6be <__sflush_r+0xde>
 800a6ec:	20400001 	.word	0x20400001

0800a6f0 <_fflush_r>:
 800a6f0:	b538      	push	{r3, r4, r5, lr}
 800a6f2:	690b      	ldr	r3, [r1, #16]
 800a6f4:	4605      	mov	r5, r0
 800a6f6:	460c      	mov	r4, r1
 800a6f8:	b1db      	cbz	r3, 800a732 <_fflush_r+0x42>
 800a6fa:	b118      	cbz	r0, 800a704 <_fflush_r+0x14>
 800a6fc:	6983      	ldr	r3, [r0, #24]
 800a6fe:	b90b      	cbnz	r3, 800a704 <_fflush_r+0x14>
 800a700:	f000 f860 	bl	800a7c4 <__sinit>
 800a704:	4b0c      	ldr	r3, [pc, #48]	; (800a738 <_fflush_r+0x48>)
 800a706:	429c      	cmp	r4, r3
 800a708:	d109      	bne.n	800a71e <_fflush_r+0x2e>
 800a70a:	686c      	ldr	r4, [r5, #4]
 800a70c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800a710:	b17b      	cbz	r3, 800a732 <_fflush_r+0x42>
 800a712:	4621      	mov	r1, r4
 800a714:	4628      	mov	r0, r5
 800a716:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800a71a:	f7ff bf61 	b.w	800a5e0 <__sflush_r>
 800a71e:	4b07      	ldr	r3, [pc, #28]	; (800a73c <_fflush_r+0x4c>)
 800a720:	429c      	cmp	r4, r3
 800a722:	d101      	bne.n	800a728 <_fflush_r+0x38>
 800a724:	68ac      	ldr	r4, [r5, #8]
 800a726:	e7f1      	b.n	800a70c <_fflush_r+0x1c>
 800a728:	4b05      	ldr	r3, [pc, #20]	; (800a740 <_fflush_r+0x50>)
 800a72a:	429c      	cmp	r4, r3
 800a72c:	bf08      	it	eq
 800a72e:	68ec      	ldreq	r4, [r5, #12]
 800a730:	e7ec      	b.n	800a70c <_fflush_r+0x1c>
 800a732:	2000      	movs	r0, #0
 800a734:	bd38      	pop	{r3, r4, r5, pc}
 800a736:	bf00      	nop
 800a738:	0800bbb8 	.word	0x0800bbb8
 800a73c:	0800bbd8 	.word	0x0800bbd8
 800a740:	0800bb98 	.word	0x0800bb98

0800a744 <_cleanup_r>:
 800a744:	4901      	ldr	r1, [pc, #4]	; (800a74c <_cleanup_r+0x8>)
 800a746:	f000 b8a9 	b.w	800a89c <_fwalk_reent>
 800a74a:	bf00      	nop
 800a74c:	0800a6f1 	.word	0x0800a6f1

0800a750 <std.isra.0>:
 800a750:	2300      	movs	r3, #0
 800a752:	b510      	push	{r4, lr}
 800a754:	4604      	mov	r4, r0
 800a756:	6003      	str	r3, [r0, #0]
 800a758:	6043      	str	r3, [r0, #4]
 800a75a:	6083      	str	r3, [r0, #8]
 800a75c:	8181      	strh	r1, [r0, #12]
 800a75e:	6643      	str	r3, [r0, #100]	; 0x64
 800a760:	81c2      	strh	r2, [r0, #14]
 800a762:	6103      	str	r3, [r0, #16]
 800a764:	6143      	str	r3, [r0, #20]
 800a766:	6183      	str	r3, [r0, #24]
 800a768:	4619      	mov	r1, r3
 800a76a:	2208      	movs	r2, #8
 800a76c:	305c      	adds	r0, #92	; 0x5c
 800a76e:	f7fe fa66 	bl	8008c3e <memset>
 800a772:	4b05      	ldr	r3, [pc, #20]	; (800a788 <std.isra.0+0x38>)
 800a774:	6224      	str	r4, [r4, #32]
 800a776:	6263      	str	r3, [r4, #36]	; 0x24
 800a778:	4b04      	ldr	r3, [pc, #16]	; (800a78c <std.isra.0+0x3c>)
 800a77a:	62a3      	str	r3, [r4, #40]	; 0x28
 800a77c:	4b04      	ldr	r3, [pc, #16]	; (800a790 <std.isra.0+0x40>)
 800a77e:	62e3      	str	r3, [r4, #44]	; 0x2c
 800a780:	4b04      	ldr	r3, [pc, #16]	; (800a794 <std.isra.0+0x44>)
 800a782:	6323      	str	r3, [r4, #48]	; 0x30
 800a784:	bd10      	pop	{r4, pc}
 800a786:	bf00      	nop
 800a788:	0800b405 	.word	0x0800b405
 800a78c:	0800b427 	.word	0x0800b427
 800a790:	0800b45f 	.word	0x0800b45f
 800a794:	0800b483 	.word	0x0800b483

0800a798 <__sfmoreglue>:
 800a798:	b570      	push	{r4, r5, r6, lr}
 800a79a:	2568      	movs	r5, #104	; 0x68
 800a79c:	1e4a      	subs	r2, r1, #1
 800a79e:	4355      	muls	r5, r2
 800a7a0:	460e      	mov	r6, r1
 800a7a2:	f105 0174 	add.w	r1, r5, #116	; 0x74
 800a7a6:	f000 fc4b 	bl	800b040 <_malloc_r>
 800a7aa:	4604      	mov	r4, r0
 800a7ac:	b140      	cbz	r0, 800a7c0 <__sfmoreglue+0x28>
 800a7ae:	2100      	movs	r1, #0
 800a7b0:	e880 0042 	stmia.w	r0, {r1, r6}
 800a7b4:	300c      	adds	r0, #12
 800a7b6:	60a0      	str	r0, [r4, #8]
 800a7b8:	f105 0268 	add.w	r2, r5, #104	; 0x68
 800a7bc:	f7fe fa3f 	bl	8008c3e <memset>
 800a7c0:	4620      	mov	r0, r4
 800a7c2:	bd70      	pop	{r4, r5, r6, pc}

0800a7c4 <__sinit>:
 800a7c4:	6983      	ldr	r3, [r0, #24]
 800a7c6:	b510      	push	{r4, lr}
 800a7c8:	4604      	mov	r4, r0
 800a7ca:	bb33      	cbnz	r3, 800a81a <__sinit+0x56>
 800a7cc:	6483      	str	r3, [r0, #72]	; 0x48
 800a7ce:	64c3      	str	r3, [r0, #76]	; 0x4c
 800a7d0:	6503      	str	r3, [r0, #80]	; 0x50
 800a7d2:	4b12      	ldr	r3, [pc, #72]	; (800a81c <__sinit+0x58>)
 800a7d4:	4a12      	ldr	r2, [pc, #72]	; (800a820 <__sinit+0x5c>)
 800a7d6:	681b      	ldr	r3, [r3, #0]
 800a7d8:	6282      	str	r2, [r0, #40]	; 0x28
 800a7da:	4298      	cmp	r0, r3
 800a7dc:	bf04      	itt	eq
 800a7de:	2301      	moveq	r3, #1
 800a7e0:	6183      	streq	r3, [r0, #24]
 800a7e2:	f000 f81f 	bl	800a824 <__sfp>
 800a7e6:	6060      	str	r0, [r4, #4]
 800a7e8:	4620      	mov	r0, r4
 800a7ea:	f000 f81b 	bl	800a824 <__sfp>
 800a7ee:	60a0      	str	r0, [r4, #8]
 800a7f0:	4620      	mov	r0, r4
 800a7f2:	f000 f817 	bl	800a824 <__sfp>
 800a7f6:	2200      	movs	r2, #0
 800a7f8:	60e0      	str	r0, [r4, #12]
 800a7fa:	2104      	movs	r1, #4
 800a7fc:	6860      	ldr	r0, [r4, #4]
 800a7fe:	f7ff ffa7 	bl	800a750 <std.isra.0>
 800a802:	2201      	movs	r2, #1
 800a804:	2109      	movs	r1, #9
 800a806:	68a0      	ldr	r0, [r4, #8]
 800a808:	f7ff ffa2 	bl	800a750 <std.isra.0>
 800a80c:	2202      	movs	r2, #2
 800a80e:	2112      	movs	r1, #18
 800a810:	68e0      	ldr	r0, [r4, #12]
 800a812:	f7ff ff9d 	bl	800a750 <std.isra.0>
 800a816:	2301      	movs	r3, #1
 800a818:	61a3      	str	r3, [r4, #24]
 800a81a:	bd10      	pop	{r4, pc}
 800a81c:	0800bb50 	.word	0x0800bb50
 800a820:	0800a745 	.word	0x0800a745

0800a824 <__sfp>:
 800a824:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800a826:	4b1c      	ldr	r3, [pc, #112]	; (800a898 <__sfp+0x74>)
 800a828:	4607      	mov	r7, r0
 800a82a:	681e      	ldr	r6, [r3, #0]
 800a82c:	69b3      	ldr	r3, [r6, #24]
 800a82e:	b913      	cbnz	r3, 800a836 <__sfp+0x12>
 800a830:	4630      	mov	r0, r6
 800a832:	f7ff ffc7 	bl	800a7c4 <__sinit>
 800a836:	3648      	adds	r6, #72	; 0x48
 800a838:	68b4      	ldr	r4, [r6, #8]
 800a83a:	6873      	ldr	r3, [r6, #4]
 800a83c:	3b01      	subs	r3, #1
 800a83e:	d503      	bpl.n	800a848 <__sfp+0x24>
 800a840:	6833      	ldr	r3, [r6, #0]
 800a842:	b133      	cbz	r3, 800a852 <__sfp+0x2e>
 800a844:	6836      	ldr	r6, [r6, #0]
 800a846:	e7f7      	b.n	800a838 <__sfp+0x14>
 800a848:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 800a84c:	b16d      	cbz	r5, 800a86a <__sfp+0x46>
 800a84e:	3468      	adds	r4, #104	; 0x68
 800a850:	e7f4      	b.n	800a83c <__sfp+0x18>
 800a852:	2104      	movs	r1, #4
 800a854:	4638      	mov	r0, r7
 800a856:	f7ff ff9f 	bl	800a798 <__sfmoreglue>
 800a85a:	6030      	str	r0, [r6, #0]
 800a85c:	2800      	cmp	r0, #0
 800a85e:	d1f1      	bne.n	800a844 <__sfp+0x20>
 800a860:	230c      	movs	r3, #12
 800a862:	4604      	mov	r4, r0
 800a864:	603b      	str	r3, [r7, #0]
 800a866:	4620      	mov	r0, r4
 800a868:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 800a86a:	f64f 73ff 	movw	r3, #65535	; 0xffff
 800a86e:	81e3      	strh	r3, [r4, #14]
 800a870:	2301      	movs	r3, #1
 800a872:	6665      	str	r5, [r4, #100]	; 0x64
 800a874:	81a3      	strh	r3, [r4, #12]
 800a876:	6025      	str	r5, [r4, #0]
 800a878:	60a5      	str	r5, [r4, #8]
 800a87a:	6065      	str	r5, [r4, #4]
 800a87c:	6125      	str	r5, [r4, #16]
 800a87e:	6165      	str	r5, [r4, #20]
 800a880:	61a5      	str	r5, [r4, #24]
 800a882:	2208      	movs	r2, #8
 800a884:	4629      	mov	r1, r5
 800a886:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 800a88a:	f7fe f9d8 	bl	8008c3e <memset>
 800a88e:	6365      	str	r5, [r4, #52]	; 0x34
 800a890:	63a5      	str	r5, [r4, #56]	; 0x38
 800a892:	64a5      	str	r5, [r4, #72]	; 0x48
 800a894:	64e5      	str	r5, [r4, #76]	; 0x4c
 800a896:	e7e6      	b.n	800a866 <__sfp+0x42>
 800a898:	0800bb50 	.word	0x0800bb50

0800a89c <_fwalk_reent>:
 800a89c:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800a8a0:	4680      	mov	r8, r0
 800a8a2:	4689      	mov	r9, r1
 800a8a4:	2600      	movs	r6, #0
 800a8a6:	f100 0448 	add.w	r4, r0, #72	; 0x48
 800a8aa:	b914      	cbnz	r4, 800a8b2 <_fwalk_reent+0x16>
 800a8ac:	4630      	mov	r0, r6
 800a8ae:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800a8b2:	68a5      	ldr	r5, [r4, #8]
 800a8b4:	6867      	ldr	r7, [r4, #4]
 800a8b6:	3f01      	subs	r7, #1
 800a8b8:	d501      	bpl.n	800a8be <_fwalk_reent+0x22>
 800a8ba:	6824      	ldr	r4, [r4, #0]
 800a8bc:	e7f5      	b.n	800a8aa <_fwalk_reent+0xe>
 800a8be:	89ab      	ldrh	r3, [r5, #12]
 800a8c0:	2b01      	cmp	r3, #1
 800a8c2:	d907      	bls.n	800a8d4 <_fwalk_reent+0x38>
 800a8c4:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 800a8c8:	3301      	adds	r3, #1
 800a8ca:	d003      	beq.n	800a8d4 <_fwalk_reent+0x38>
 800a8cc:	4629      	mov	r1, r5
 800a8ce:	4640      	mov	r0, r8
 800a8d0:	47c8      	blx	r9
 800a8d2:	4306      	orrs	r6, r0
 800a8d4:	3568      	adds	r5, #104	; 0x68
 800a8d6:	e7ee      	b.n	800a8b6 <_fwalk_reent+0x1a>

0800a8d8 <_localeconv_r>:
 800a8d8:	4b04      	ldr	r3, [pc, #16]	; (800a8ec <_localeconv_r+0x14>)
 800a8da:	681b      	ldr	r3, [r3, #0]
 800a8dc:	6a18      	ldr	r0, [r3, #32]
 800a8de:	4b04      	ldr	r3, [pc, #16]	; (800a8f0 <_localeconv_r+0x18>)
 800a8e0:	2800      	cmp	r0, #0
 800a8e2:	bf08      	it	eq
 800a8e4:	4618      	moveq	r0, r3
 800a8e6:	30f0      	adds	r0, #240	; 0xf0
 800a8e8:	4770      	bx	lr
 800a8ea:	bf00      	nop
 800a8ec:	20000234 	.word	0x20000234
 800a8f0:	20000298 	.word	0x20000298

0800a8f4 <__swhatbuf_r>:
 800a8f4:	b570      	push	{r4, r5, r6, lr}
 800a8f6:	460e      	mov	r6, r1
 800a8f8:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800a8fc:	b090      	sub	sp, #64	; 0x40
 800a8fe:	2900      	cmp	r1, #0
 800a900:	4614      	mov	r4, r2
 800a902:	461d      	mov	r5, r3
 800a904:	da07      	bge.n	800a916 <__swhatbuf_r+0x22>
 800a906:	2300      	movs	r3, #0
 800a908:	602b      	str	r3, [r5, #0]
 800a90a:	89b3      	ldrh	r3, [r6, #12]
 800a90c:	061a      	lsls	r2, r3, #24
 800a90e:	d410      	bmi.n	800a932 <__swhatbuf_r+0x3e>
 800a910:	f44f 6380 	mov.w	r3, #1024	; 0x400
 800a914:	e00e      	b.n	800a934 <__swhatbuf_r+0x40>
 800a916:	aa01      	add	r2, sp, #4
 800a918:	f000 fdda 	bl	800b4d0 <_fstat_r>
 800a91c:	2800      	cmp	r0, #0
 800a91e:	dbf2      	blt.n	800a906 <__swhatbuf_r+0x12>
 800a920:	9a02      	ldr	r2, [sp, #8]
 800a922:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 800a926:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 800a92a:	425a      	negs	r2, r3
 800a92c:	415a      	adcs	r2, r3
 800a92e:	602a      	str	r2, [r5, #0]
 800a930:	e7ee      	b.n	800a910 <__swhatbuf_r+0x1c>
 800a932:	2340      	movs	r3, #64	; 0x40
 800a934:	2000      	movs	r0, #0
 800a936:	6023      	str	r3, [r4, #0]
 800a938:	b010      	add	sp, #64	; 0x40
 800a93a:	bd70      	pop	{r4, r5, r6, pc}

0800a93c <__smakebuf_r>:
 800a93c:	898b      	ldrh	r3, [r1, #12]
 800a93e:	b573      	push	{r0, r1, r4, r5, r6, lr}
 800a940:	079d      	lsls	r5, r3, #30
 800a942:	4606      	mov	r6, r0
 800a944:	460c      	mov	r4, r1
 800a946:	d507      	bpl.n	800a958 <__smakebuf_r+0x1c>
 800a948:	f104 0347 	add.w	r3, r4, #71	; 0x47
 800a94c:	6023      	str	r3, [r4, #0]
 800a94e:	6123      	str	r3, [r4, #16]
 800a950:	2301      	movs	r3, #1
 800a952:	6163      	str	r3, [r4, #20]
 800a954:	b002      	add	sp, #8
 800a956:	bd70      	pop	{r4, r5, r6, pc}
 800a958:	ab01      	add	r3, sp, #4
 800a95a:	466a      	mov	r2, sp
 800a95c:	f7ff ffca 	bl	800a8f4 <__swhatbuf_r>
 800a960:	9900      	ldr	r1, [sp, #0]
 800a962:	4605      	mov	r5, r0
 800a964:	4630      	mov	r0, r6
 800a966:	f000 fb6b 	bl	800b040 <_malloc_r>
 800a96a:	b948      	cbnz	r0, 800a980 <__smakebuf_r+0x44>
 800a96c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800a970:	059a      	lsls	r2, r3, #22
 800a972:	d4ef      	bmi.n	800a954 <__smakebuf_r+0x18>
 800a974:	f023 0303 	bic.w	r3, r3, #3
 800a978:	f043 0302 	orr.w	r3, r3, #2
 800a97c:	81a3      	strh	r3, [r4, #12]
 800a97e:	e7e3      	b.n	800a948 <__smakebuf_r+0xc>
 800a980:	4b0d      	ldr	r3, [pc, #52]	; (800a9b8 <__smakebuf_r+0x7c>)
 800a982:	62b3      	str	r3, [r6, #40]	; 0x28
 800a984:	89a3      	ldrh	r3, [r4, #12]
 800a986:	6020      	str	r0, [r4, #0]
 800a988:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800a98c:	81a3      	strh	r3, [r4, #12]
 800a98e:	9b00      	ldr	r3, [sp, #0]
 800a990:	6120      	str	r0, [r4, #16]
 800a992:	6163      	str	r3, [r4, #20]
 800a994:	9b01      	ldr	r3, [sp, #4]
 800a996:	b15b      	cbz	r3, 800a9b0 <__smakebuf_r+0x74>
 800a998:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800a99c:	4630      	mov	r0, r6
 800a99e:	f000 fda9 	bl	800b4f4 <_isatty_r>
 800a9a2:	b128      	cbz	r0, 800a9b0 <__smakebuf_r+0x74>
 800a9a4:	89a3      	ldrh	r3, [r4, #12]
 800a9a6:	f023 0303 	bic.w	r3, r3, #3
 800a9aa:	f043 0301 	orr.w	r3, r3, #1
 800a9ae:	81a3      	strh	r3, [r4, #12]
 800a9b0:	89a3      	ldrh	r3, [r4, #12]
 800a9b2:	431d      	orrs	r5, r3
 800a9b4:	81a5      	strh	r5, [r4, #12]
 800a9b6:	e7cd      	b.n	800a954 <__smakebuf_r+0x18>
 800a9b8:	0800a745 	.word	0x0800a745

0800a9bc <malloc>:
 800a9bc:	4b02      	ldr	r3, [pc, #8]	; (800a9c8 <malloc+0xc>)
 800a9be:	4601      	mov	r1, r0
 800a9c0:	6818      	ldr	r0, [r3, #0]
 800a9c2:	f000 bb3d 	b.w	800b040 <_malloc_r>
 800a9c6:	bf00      	nop
 800a9c8:	20000234 	.word	0x20000234

0800a9cc <memchr>:
 800a9cc:	b510      	push	{r4, lr}
 800a9ce:	b2c9      	uxtb	r1, r1
 800a9d0:	4402      	add	r2, r0
 800a9d2:	4290      	cmp	r0, r2
 800a9d4:	4603      	mov	r3, r0
 800a9d6:	d101      	bne.n	800a9dc <memchr+0x10>
 800a9d8:	2000      	movs	r0, #0
 800a9da:	bd10      	pop	{r4, pc}
 800a9dc:	781c      	ldrb	r4, [r3, #0]
 800a9de:	3001      	adds	r0, #1
 800a9e0:	428c      	cmp	r4, r1
 800a9e2:	d1f6      	bne.n	800a9d2 <memchr+0x6>
 800a9e4:	4618      	mov	r0, r3
 800a9e6:	bd10      	pop	{r4, pc}

0800a9e8 <_Balloc>:
 800a9e8:	b570      	push	{r4, r5, r6, lr}
 800a9ea:	6a45      	ldr	r5, [r0, #36]	; 0x24
 800a9ec:	4604      	mov	r4, r0
 800a9ee:	460e      	mov	r6, r1
 800a9f0:	b93d      	cbnz	r5, 800aa02 <_Balloc+0x1a>
 800a9f2:	2010      	movs	r0, #16
 800a9f4:	f7ff ffe2 	bl	800a9bc <malloc>
 800a9f8:	6260      	str	r0, [r4, #36]	; 0x24
 800a9fa:	6045      	str	r5, [r0, #4]
 800a9fc:	6085      	str	r5, [r0, #8]
 800a9fe:	6005      	str	r5, [r0, #0]
 800aa00:	60c5      	str	r5, [r0, #12]
 800aa02:	6a65      	ldr	r5, [r4, #36]	; 0x24
 800aa04:	68eb      	ldr	r3, [r5, #12]
 800aa06:	b183      	cbz	r3, 800aa2a <_Balloc+0x42>
 800aa08:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800aa0a:	68db      	ldr	r3, [r3, #12]
 800aa0c:	f853 0026 	ldr.w	r0, [r3, r6, lsl #2]
 800aa10:	b9b8      	cbnz	r0, 800aa42 <_Balloc+0x5a>
 800aa12:	2101      	movs	r1, #1
 800aa14:	fa01 f506 	lsl.w	r5, r1, r6
 800aa18:	1d6a      	adds	r2, r5, #5
 800aa1a:	0092      	lsls	r2, r2, #2
 800aa1c:	4620      	mov	r0, r4
 800aa1e:	f000 fab4 	bl	800af8a <_calloc_r>
 800aa22:	b160      	cbz	r0, 800aa3e <_Balloc+0x56>
 800aa24:	6046      	str	r6, [r0, #4]
 800aa26:	6085      	str	r5, [r0, #8]
 800aa28:	e00e      	b.n	800aa48 <_Balloc+0x60>
 800aa2a:	2221      	movs	r2, #33	; 0x21
 800aa2c:	2104      	movs	r1, #4
 800aa2e:	4620      	mov	r0, r4
 800aa30:	f000 faab 	bl	800af8a <_calloc_r>
 800aa34:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800aa36:	60e8      	str	r0, [r5, #12]
 800aa38:	68db      	ldr	r3, [r3, #12]
 800aa3a:	2b00      	cmp	r3, #0
 800aa3c:	d1e4      	bne.n	800aa08 <_Balloc+0x20>
 800aa3e:	2000      	movs	r0, #0
 800aa40:	bd70      	pop	{r4, r5, r6, pc}
 800aa42:	6802      	ldr	r2, [r0, #0]
 800aa44:	f843 2026 	str.w	r2, [r3, r6, lsl #2]
 800aa48:	2300      	movs	r3, #0
 800aa4a:	6103      	str	r3, [r0, #16]
 800aa4c:	60c3      	str	r3, [r0, #12]
 800aa4e:	bd70      	pop	{r4, r5, r6, pc}

0800aa50 <_Bfree>:
 800aa50:	b570      	push	{r4, r5, r6, lr}
 800aa52:	6a44      	ldr	r4, [r0, #36]	; 0x24
 800aa54:	4606      	mov	r6, r0
 800aa56:	460d      	mov	r5, r1
 800aa58:	b93c      	cbnz	r4, 800aa6a <_Bfree+0x1a>
 800aa5a:	2010      	movs	r0, #16
 800aa5c:	f7ff ffae 	bl	800a9bc <malloc>
 800aa60:	6270      	str	r0, [r6, #36]	; 0x24
 800aa62:	6044      	str	r4, [r0, #4]
 800aa64:	6084      	str	r4, [r0, #8]
 800aa66:	6004      	str	r4, [r0, #0]
 800aa68:	60c4      	str	r4, [r0, #12]
 800aa6a:	b13d      	cbz	r5, 800aa7c <_Bfree+0x2c>
 800aa6c:	6a73      	ldr	r3, [r6, #36]	; 0x24
 800aa6e:	686a      	ldr	r2, [r5, #4]
 800aa70:	68db      	ldr	r3, [r3, #12]
 800aa72:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 800aa76:	6029      	str	r1, [r5, #0]
 800aa78:	f843 5022 	str.w	r5, [r3, r2, lsl #2]
 800aa7c:	bd70      	pop	{r4, r5, r6, pc}

0800aa7e <__multadd>:
 800aa7e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800aa82:	461f      	mov	r7, r3
 800aa84:	4606      	mov	r6, r0
 800aa86:	460c      	mov	r4, r1
 800aa88:	2300      	movs	r3, #0
 800aa8a:	690d      	ldr	r5, [r1, #16]
 800aa8c:	f101 0e14 	add.w	lr, r1, #20
 800aa90:	f8de 0000 	ldr.w	r0, [lr]
 800aa94:	3301      	adds	r3, #1
 800aa96:	b281      	uxth	r1, r0
 800aa98:	fb02 7101 	mla	r1, r2, r1, r7
 800aa9c:	0c00      	lsrs	r0, r0, #16
 800aa9e:	0c0f      	lsrs	r7, r1, #16
 800aaa0:	fb02 7000 	mla	r0, r2, r0, r7
 800aaa4:	b289      	uxth	r1, r1
 800aaa6:	eb01 4100 	add.w	r1, r1, r0, lsl #16
 800aaaa:	429d      	cmp	r5, r3
 800aaac:	ea4f 4710 	mov.w	r7, r0, lsr #16
 800aab0:	f84e 1b04 	str.w	r1, [lr], #4
 800aab4:	dcec      	bgt.n	800aa90 <__multadd+0x12>
 800aab6:	b1d7      	cbz	r7, 800aaee <__multadd+0x70>
 800aab8:	68a3      	ldr	r3, [r4, #8]
 800aaba:	429d      	cmp	r5, r3
 800aabc:	db12      	blt.n	800aae4 <__multadd+0x66>
 800aabe:	6861      	ldr	r1, [r4, #4]
 800aac0:	4630      	mov	r0, r6
 800aac2:	3101      	adds	r1, #1
 800aac4:	f7ff ff90 	bl	800a9e8 <_Balloc>
 800aac8:	4680      	mov	r8, r0
 800aaca:	6922      	ldr	r2, [r4, #16]
 800aacc:	f104 010c 	add.w	r1, r4, #12
 800aad0:	3202      	adds	r2, #2
 800aad2:	0092      	lsls	r2, r2, #2
 800aad4:	300c      	adds	r0, #12
 800aad6:	f7fe f8a7 	bl	8008c28 <memcpy>
 800aada:	4621      	mov	r1, r4
 800aadc:	4630      	mov	r0, r6
 800aade:	f7ff ffb7 	bl	800aa50 <_Bfree>
 800aae2:	4644      	mov	r4, r8
 800aae4:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 800aae8:	3501      	adds	r5, #1
 800aaea:	615f      	str	r7, [r3, #20]
 800aaec:	6125      	str	r5, [r4, #16]
 800aaee:	4620      	mov	r0, r4
 800aaf0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

0800aaf4 <__hi0bits>:
 800aaf4:	0c02      	lsrs	r2, r0, #16
 800aaf6:	0412      	lsls	r2, r2, #16
 800aaf8:	4603      	mov	r3, r0
 800aafa:	b9b2      	cbnz	r2, 800ab2a <__hi0bits+0x36>
 800aafc:	0403      	lsls	r3, r0, #16
 800aafe:	2010      	movs	r0, #16
 800ab00:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
 800ab04:	bf04      	itt	eq
 800ab06:	021b      	lsleq	r3, r3, #8
 800ab08:	3008      	addeq	r0, #8
 800ab0a:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
 800ab0e:	bf04      	itt	eq
 800ab10:	011b      	lsleq	r3, r3, #4
 800ab12:	3004      	addeq	r0, #4
 800ab14:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
 800ab18:	bf04      	itt	eq
 800ab1a:	009b      	lsleq	r3, r3, #2
 800ab1c:	3002      	addeq	r0, #2
 800ab1e:	2b00      	cmp	r3, #0
 800ab20:	db06      	blt.n	800ab30 <__hi0bits+0x3c>
 800ab22:	005b      	lsls	r3, r3, #1
 800ab24:	d503      	bpl.n	800ab2e <__hi0bits+0x3a>
 800ab26:	3001      	adds	r0, #1
 800ab28:	4770      	bx	lr
 800ab2a:	2000      	movs	r0, #0
 800ab2c:	e7e8      	b.n	800ab00 <__hi0bits+0xc>
 800ab2e:	2020      	movs	r0, #32
 800ab30:	4770      	bx	lr

0800ab32 <__lo0bits>:
 800ab32:	6803      	ldr	r3, [r0, #0]
 800ab34:	4601      	mov	r1, r0
 800ab36:	f013 0207 	ands.w	r2, r3, #7
 800ab3a:	d00b      	beq.n	800ab54 <__lo0bits+0x22>
 800ab3c:	07da      	lsls	r2, r3, #31
 800ab3e:	d423      	bmi.n	800ab88 <__lo0bits+0x56>
 800ab40:	0798      	lsls	r0, r3, #30
 800ab42:	bf49      	itett	mi
 800ab44:	085b      	lsrmi	r3, r3, #1
 800ab46:	089b      	lsrpl	r3, r3, #2
 800ab48:	2001      	movmi	r0, #1
 800ab4a:	600b      	strmi	r3, [r1, #0]
 800ab4c:	bf5c      	itt	pl
 800ab4e:	600b      	strpl	r3, [r1, #0]
 800ab50:	2002      	movpl	r0, #2
 800ab52:	4770      	bx	lr
 800ab54:	b298      	uxth	r0, r3
 800ab56:	b9a8      	cbnz	r0, 800ab84 <__lo0bits+0x52>
 800ab58:	2010      	movs	r0, #16
 800ab5a:	0c1b      	lsrs	r3, r3, #16
 800ab5c:	f013 0fff 	tst.w	r3, #255	; 0xff
 800ab60:	bf04      	itt	eq
 800ab62:	0a1b      	lsreq	r3, r3, #8
 800ab64:	3008      	addeq	r0, #8
 800ab66:	071a      	lsls	r2, r3, #28
 800ab68:	bf04      	itt	eq
 800ab6a:	091b      	lsreq	r3, r3, #4
 800ab6c:	3004      	addeq	r0, #4
 800ab6e:	079a      	lsls	r2, r3, #30
 800ab70:	bf04      	itt	eq
 800ab72:	089b      	lsreq	r3, r3, #2
 800ab74:	3002      	addeq	r0, #2
 800ab76:	07da      	lsls	r2, r3, #31
 800ab78:	d402      	bmi.n	800ab80 <__lo0bits+0x4e>
 800ab7a:	085b      	lsrs	r3, r3, #1
 800ab7c:	d006      	beq.n	800ab8c <__lo0bits+0x5a>
 800ab7e:	3001      	adds	r0, #1
 800ab80:	600b      	str	r3, [r1, #0]
 800ab82:	4770      	bx	lr
 800ab84:	4610      	mov	r0, r2
 800ab86:	e7e9      	b.n	800ab5c <__lo0bits+0x2a>
 800ab88:	2000      	movs	r0, #0
 800ab8a:	4770      	bx	lr
 800ab8c:	2020      	movs	r0, #32
 800ab8e:	4770      	bx	lr

0800ab90 <__i2b>:
 800ab90:	b510      	push	{r4, lr}
 800ab92:	460c      	mov	r4, r1
 800ab94:	2101      	movs	r1, #1
 800ab96:	f7ff ff27 	bl	800a9e8 <_Balloc>
 800ab9a:	2201      	movs	r2, #1
 800ab9c:	6144      	str	r4, [r0, #20]
 800ab9e:	6102      	str	r2, [r0, #16]
 800aba0:	bd10      	pop	{r4, pc}

0800aba2 <__multiply>:
 800aba2:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800aba6:	4614      	mov	r4, r2
 800aba8:	690a      	ldr	r2, [r1, #16]
 800abaa:	6923      	ldr	r3, [r4, #16]
 800abac:	4689      	mov	r9, r1
 800abae:	429a      	cmp	r2, r3
 800abb0:	bfbe      	ittt	lt
 800abb2:	460b      	movlt	r3, r1
 800abb4:	46a1      	movlt	r9, r4
 800abb6:	461c      	movlt	r4, r3
 800abb8:	f8d9 7010 	ldr.w	r7, [r9, #16]
 800abbc:	f8d4 a010 	ldr.w	sl, [r4, #16]
 800abc0:	f8d9 3008 	ldr.w	r3, [r9, #8]
 800abc4:	f8d9 1004 	ldr.w	r1, [r9, #4]
 800abc8:	eb07 060a 	add.w	r6, r7, sl
 800abcc:	429e      	cmp	r6, r3
 800abce:	bfc8      	it	gt
 800abd0:	3101      	addgt	r1, #1
 800abd2:	f7ff ff09 	bl	800a9e8 <_Balloc>
 800abd6:	f100 0514 	add.w	r5, r0, #20
 800abda:	462b      	mov	r3, r5
 800abdc:	2200      	movs	r2, #0
 800abde:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 800abe2:	4543      	cmp	r3, r8
 800abe4:	d316      	bcc.n	800ac14 <__multiply+0x72>
 800abe6:	f104 0214 	add.w	r2, r4, #20
 800abea:	f109 0114 	add.w	r1, r9, #20
 800abee:	eb02 038a 	add.w	r3, r2, sl, lsl #2
 800abf2:	eb01 0787 	add.w	r7, r1, r7, lsl #2
 800abf6:	9301      	str	r3, [sp, #4]
 800abf8:	9c01      	ldr	r4, [sp, #4]
 800abfa:	4613      	mov	r3, r2
 800abfc:	4294      	cmp	r4, r2
 800abfe:	d80c      	bhi.n	800ac1a <__multiply+0x78>
 800ac00:	2e00      	cmp	r6, #0
 800ac02:	dd03      	ble.n	800ac0c <__multiply+0x6a>
 800ac04:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 800ac08:	2b00      	cmp	r3, #0
 800ac0a:	d054      	beq.n	800acb6 <__multiply+0x114>
 800ac0c:	6106      	str	r6, [r0, #16]
 800ac0e:	b003      	add	sp, #12
 800ac10:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800ac14:	f843 2b04 	str.w	r2, [r3], #4
 800ac18:	e7e3      	b.n	800abe2 <__multiply+0x40>
 800ac1a:	f8b3 a000 	ldrh.w	sl, [r3]
 800ac1e:	3204      	adds	r2, #4
 800ac20:	f1ba 0f00 	cmp.w	sl, #0
 800ac24:	d020      	beq.n	800ac68 <__multiply+0xc6>
 800ac26:	46ae      	mov	lr, r5
 800ac28:	4689      	mov	r9, r1
 800ac2a:	f04f 0c00 	mov.w	ip, #0
 800ac2e:	f859 4b04 	ldr.w	r4, [r9], #4
 800ac32:	f8be b000 	ldrh.w	fp, [lr]
 800ac36:	b2a3      	uxth	r3, r4
 800ac38:	fb0a b303 	mla	r3, sl, r3, fp
 800ac3c:	ea4f 4b14 	mov.w	fp, r4, lsr #16
 800ac40:	f8de 4000 	ldr.w	r4, [lr]
 800ac44:	4463      	add	r3, ip
 800ac46:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 800ac4a:	fb0a c40b 	mla	r4, sl, fp, ip
 800ac4e:	eb04 4413 	add.w	r4, r4, r3, lsr #16
 800ac52:	b29b      	uxth	r3, r3
 800ac54:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 800ac58:	454f      	cmp	r7, r9
 800ac5a:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 800ac5e:	f84e 3b04 	str.w	r3, [lr], #4
 800ac62:	d8e4      	bhi.n	800ac2e <__multiply+0x8c>
 800ac64:	f8ce c000 	str.w	ip, [lr]
 800ac68:	f832 9c02 	ldrh.w	r9, [r2, #-2]
 800ac6c:	f1b9 0f00 	cmp.w	r9, #0
 800ac70:	d01f      	beq.n	800acb2 <__multiply+0x110>
 800ac72:	46ae      	mov	lr, r5
 800ac74:	468c      	mov	ip, r1
 800ac76:	f04f 0a00 	mov.w	sl, #0
 800ac7a:	682b      	ldr	r3, [r5, #0]
 800ac7c:	f8bc 4000 	ldrh.w	r4, [ip]
 800ac80:	f8be b002 	ldrh.w	fp, [lr, #2]
 800ac84:	b29b      	uxth	r3, r3
 800ac86:	fb09 b404 	mla	r4, r9, r4, fp
 800ac8a:	44a2      	add	sl, r4
 800ac8c:	ea43 430a 	orr.w	r3, r3, sl, lsl #16
 800ac90:	f84e 3b04 	str.w	r3, [lr], #4
 800ac94:	f85c 3b04 	ldr.w	r3, [ip], #4
 800ac98:	f8be 4000 	ldrh.w	r4, [lr]
 800ac9c:	0c1b      	lsrs	r3, r3, #16
 800ac9e:	fb09 4303 	mla	r3, r9, r3, r4
 800aca2:	4567      	cmp	r7, ip
 800aca4:	eb03 431a 	add.w	r3, r3, sl, lsr #16
 800aca8:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 800acac:	d8e6      	bhi.n	800ac7c <__multiply+0xda>
 800acae:	f8ce 3000 	str.w	r3, [lr]
 800acb2:	3504      	adds	r5, #4
 800acb4:	e7a0      	b.n	800abf8 <__multiply+0x56>
 800acb6:	3e01      	subs	r6, #1
 800acb8:	e7a2      	b.n	800ac00 <__multiply+0x5e>
	...

0800acbc <__pow5mult>:
 800acbc:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800acc0:	4615      	mov	r5, r2
 800acc2:	f012 0203 	ands.w	r2, r2, #3
 800acc6:	4606      	mov	r6, r0
 800acc8:	460f      	mov	r7, r1
 800acca:	d007      	beq.n	800acdc <__pow5mult+0x20>
 800accc:	4c21      	ldr	r4, [pc, #132]	; (800ad54 <__pow5mult+0x98>)
 800acce:	3a01      	subs	r2, #1
 800acd0:	2300      	movs	r3, #0
 800acd2:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 800acd6:	f7ff fed2 	bl	800aa7e <__multadd>
 800acda:	4607      	mov	r7, r0
 800acdc:	10ad      	asrs	r5, r5, #2
 800acde:	d035      	beq.n	800ad4c <__pow5mult+0x90>
 800ace0:	6a74      	ldr	r4, [r6, #36]	; 0x24
 800ace2:	b93c      	cbnz	r4, 800acf4 <__pow5mult+0x38>
 800ace4:	2010      	movs	r0, #16
 800ace6:	f7ff fe69 	bl	800a9bc <malloc>
 800acea:	6270      	str	r0, [r6, #36]	; 0x24
 800acec:	6044      	str	r4, [r0, #4]
 800acee:	6084      	str	r4, [r0, #8]
 800acf0:	6004      	str	r4, [r0, #0]
 800acf2:	60c4      	str	r4, [r0, #12]
 800acf4:	f8d6 8024 	ldr.w	r8, [r6, #36]	; 0x24
 800acf8:	f8d8 4008 	ldr.w	r4, [r8, #8]
 800acfc:	b94c      	cbnz	r4, 800ad12 <__pow5mult+0x56>
 800acfe:	f240 2171 	movw	r1, #625	; 0x271
 800ad02:	4630      	mov	r0, r6
 800ad04:	f7ff ff44 	bl	800ab90 <__i2b>
 800ad08:	2300      	movs	r3, #0
 800ad0a:	4604      	mov	r4, r0
 800ad0c:	f8c8 0008 	str.w	r0, [r8, #8]
 800ad10:	6003      	str	r3, [r0, #0]
 800ad12:	f04f 0800 	mov.w	r8, #0
 800ad16:	07eb      	lsls	r3, r5, #31
 800ad18:	d50a      	bpl.n	800ad30 <__pow5mult+0x74>
 800ad1a:	4639      	mov	r1, r7
 800ad1c:	4622      	mov	r2, r4
 800ad1e:	4630      	mov	r0, r6
 800ad20:	f7ff ff3f 	bl	800aba2 <__multiply>
 800ad24:	4681      	mov	r9, r0
 800ad26:	4639      	mov	r1, r7
 800ad28:	4630      	mov	r0, r6
 800ad2a:	f7ff fe91 	bl	800aa50 <_Bfree>
 800ad2e:	464f      	mov	r7, r9
 800ad30:	106d      	asrs	r5, r5, #1
 800ad32:	d00b      	beq.n	800ad4c <__pow5mult+0x90>
 800ad34:	6820      	ldr	r0, [r4, #0]
 800ad36:	b938      	cbnz	r0, 800ad48 <__pow5mult+0x8c>
 800ad38:	4622      	mov	r2, r4
 800ad3a:	4621      	mov	r1, r4
 800ad3c:	4630      	mov	r0, r6
 800ad3e:	f7ff ff30 	bl	800aba2 <__multiply>
 800ad42:	6020      	str	r0, [r4, #0]
 800ad44:	f8c0 8000 	str.w	r8, [r0]
 800ad48:	4604      	mov	r4, r0
 800ad4a:	e7e4      	b.n	800ad16 <__pow5mult+0x5a>
 800ad4c:	4638      	mov	r0, r7
 800ad4e:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800ad52:	bf00      	nop
 800ad54:	0800bce8 	.word	0x0800bce8

0800ad58 <__lshift>:
 800ad58:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800ad5c:	460c      	mov	r4, r1
 800ad5e:	4607      	mov	r7, r0
 800ad60:	4616      	mov	r6, r2
 800ad62:	6923      	ldr	r3, [r4, #16]
 800ad64:	ea4f 1a62 	mov.w	sl, r2, asr #5
 800ad68:	eb0a 0903 	add.w	r9, sl, r3
 800ad6c:	6849      	ldr	r1, [r1, #4]
 800ad6e:	68a3      	ldr	r3, [r4, #8]
 800ad70:	f109 0501 	add.w	r5, r9, #1
 800ad74:	42ab      	cmp	r3, r5
 800ad76:	db31      	blt.n	800addc <__lshift+0x84>
 800ad78:	4638      	mov	r0, r7
 800ad7a:	f7ff fe35 	bl	800a9e8 <_Balloc>
 800ad7e:	2200      	movs	r2, #0
 800ad80:	4680      	mov	r8, r0
 800ad82:	4611      	mov	r1, r2
 800ad84:	f100 0314 	add.w	r3, r0, #20
 800ad88:	4552      	cmp	r2, sl
 800ad8a:	db2a      	blt.n	800ade2 <__lshift+0x8a>
 800ad8c:	6920      	ldr	r0, [r4, #16]
 800ad8e:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 800ad92:	f104 0114 	add.w	r1, r4, #20
 800ad96:	f016 021f 	ands.w	r2, r6, #31
 800ad9a:	eb03 038a 	add.w	r3, r3, sl, lsl #2
 800ad9e:	eb01 0e80 	add.w	lr, r1, r0, lsl #2
 800ada2:	d022      	beq.n	800adea <__lshift+0x92>
 800ada4:	2000      	movs	r0, #0
 800ada6:	f1c2 0c20 	rsb	ip, r2, #32
 800adaa:	680e      	ldr	r6, [r1, #0]
 800adac:	4096      	lsls	r6, r2
 800adae:	4330      	orrs	r0, r6
 800adb0:	f843 0b04 	str.w	r0, [r3], #4
 800adb4:	f851 0b04 	ldr.w	r0, [r1], #4
 800adb8:	458e      	cmp	lr, r1
 800adba:	fa20 f00c 	lsr.w	r0, r0, ip
 800adbe:	d8f4      	bhi.n	800adaa <__lshift+0x52>
 800adc0:	6018      	str	r0, [r3, #0]
 800adc2:	b108      	cbz	r0, 800adc8 <__lshift+0x70>
 800adc4:	f109 0502 	add.w	r5, r9, #2
 800adc8:	3d01      	subs	r5, #1
 800adca:	4638      	mov	r0, r7
 800adcc:	f8c8 5010 	str.w	r5, [r8, #16]
 800add0:	4621      	mov	r1, r4
 800add2:	f7ff fe3d 	bl	800aa50 <_Bfree>
 800add6:	4640      	mov	r0, r8
 800add8:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800addc:	3101      	adds	r1, #1
 800adde:	005b      	lsls	r3, r3, #1
 800ade0:	e7c8      	b.n	800ad74 <__lshift+0x1c>
 800ade2:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
 800ade6:	3201      	adds	r2, #1
 800ade8:	e7ce      	b.n	800ad88 <__lshift+0x30>
 800adea:	3b04      	subs	r3, #4
 800adec:	f851 2b04 	ldr.w	r2, [r1], #4
 800adf0:	458e      	cmp	lr, r1
 800adf2:	f843 2f04 	str.w	r2, [r3, #4]!
 800adf6:	d8f9      	bhi.n	800adec <__lshift+0x94>
 800adf8:	e7e6      	b.n	800adc8 <__lshift+0x70>

0800adfa <__mcmp>:
 800adfa:	6903      	ldr	r3, [r0, #16]
 800adfc:	690a      	ldr	r2, [r1, #16]
 800adfe:	b530      	push	{r4, r5, lr}
 800ae00:	1a9b      	subs	r3, r3, r2
 800ae02:	d10c      	bne.n	800ae1e <__mcmp+0x24>
 800ae04:	0092      	lsls	r2, r2, #2
 800ae06:	3014      	adds	r0, #20
 800ae08:	3114      	adds	r1, #20
 800ae0a:	1884      	adds	r4, r0, r2
 800ae0c:	4411      	add	r1, r2
 800ae0e:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 800ae12:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 800ae16:	4295      	cmp	r5, r2
 800ae18:	d003      	beq.n	800ae22 <__mcmp+0x28>
 800ae1a:	d305      	bcc.n	800ae28 <__mcmp+0x2e>
 800ae1c:	2301      	movs	r3, #1
 800ae1e:	4618      	mov	r0, r3
 800ae20:	bd30      	pop	{r4, r5, pc}
 800ae22:	42a0      	cmp	r0, r4
 800ae24:	d3f3      	bcc.n	800ae0e <__mcmp+0x14>
 800ae26:	e7fa      	b.n	800ae1e <__mcmp+0x24>
 800ae28:	f04f 33ff 	mov.w	r3, #4294967295
 800ae2c:	e7f7      	b.n	800ae1e <__mcmp+0x24>

0800ae2e <__mdiff>:
 800ae2e:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800ae32:	460d      	mov	r5, r1
 800ae34:	4607      	mov	r7, r0
 800ae36:	4611      	mov	r1, r2
 800ae38:	4628      	mov	r0, r5
 800ae3a:	4614      	mov	r4, r2
 800ae3c:	f7ff ffdd 	bl	800adfa <__mcmp>
 800ae40:	1e06      	subs	r6, r0, #0
 800ae42:	d108      	bne.n	800ae56 <__mdiff+0x28>
 800ae44:	4631      	mov	r1, r6
 800ae46:	4638      	mov	r0, r7
 800ae48:	f7ff fdce 	bl	800a9e8 <_Balloc>
 800ae4c:	2301      	movs	r3, #1
 800ae4e:	6146      	str	r6, [r0, #20]
 800ae50:	6103      	str	r3, [r0, #16]
 800ae52:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800ae56:	bfa4      	itt	ge
 800ae58:	4623      	movge	r3, r4
 800ae5a:	462c      	movge	r4, r5
 800ae5c:	4638      	mov	r0, r7
 800ae5e:	6861      	ldr	r1, [r4, #4]
 800ae60:	bfa6      	itte	ge
 800ae62:	461d      	movge	r5, r3
 800ae64:	2600      	movge	r6, #0
 800ae66:	2601      	movlt	r6, #1
 800ae68:	f7ff fdbe 	bl	800a9e8 <_Balloc>
 800ae6c:	f04f 0c00 	mov.w	ip, #0
 800ae70:	60c6      	str	r6, [r0, #12]
 800ae72:	692b      	ldr	r3, [r5, #16]
 800ae74:	6926      	ldr	r6, [r4, #16]
 800ae76:	f104 0214 	add.w	r2, r4, #20
 800ae7a:	f105 0914 	add.w	r9, r5, #20
 800ae7e:	eb02 0786 	add.w	r7, r2, r6, lsl #2
 800ae82:	eb09 0883 	add.w	r8, r9, r3, lsl #2
 800ae86:	f100 0114 	add.w	r1, r0, #20
 800ae8a:	f852 ab04 	ldr.w	sl, [r2], #4
 800ae8e:	f859 5b04 	ldr.w	r5, [r9], #4
 800ae92:	fa1f f38a 	uxth.w	r3, sl
 800ae96:	4463      	add	r3, ip
 800ae98:	b2ac      	uxth	r4, r5
 800ae9a:	1b1b      	subs	r3, r3, r4
 800ae9c:	0c2c      	lsrs	r4, r5, #16
 800ae9e:	ebc4 441a 	rsb	r4, r4, sl, lsr #16
 800aea2:	eb04 4423 	add.w	r4, r4, r3, asr #16
 800aea6:	b29b      	uxth	r3, r3
 800aea8:	ea4f 4c24 	mov.w	ip, r4, asr #16
 800aeac:	45c8      	cmp	r8, r9
 800aeae:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
 800aeb2:	4696      	mov	lr, r2
 800aeb4:	f841 4b04 	str.w	r4, [r1], #4
 800aeb8:	d8e7      	bhi.n	800ae8a <__mdiff+0x5c>
 800aeba:	45be      	cmp	lr, r7
 800aebc:	d305      	bcc.n	800aeca <__mdiff+0x9c>
 800aebe:	f851 3d04 	ldr.w	r3, [r1, #-4]!
 800aec2:	b18b      	cbz	r3, 800aee8 <__mdiff+0xba>
 800aec4:	6106      	str	r6, [r0, #16]
 800aec6:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800aeca:	f85e 4b04 	ldr.w	r4, [lr], #4
 800aece:	b2a2      	uxth	r2, r4
 800aed0:	4462      	add	r2, ip
 800aed2:	1413      	asrs	r3, r2, #16
 800aed4:	eb03 4314 	add.w	r3, r3, r4, lsr #16
 800aed8:	b292      	uxth	r2, r2
 800aeda:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 800aede:	ea4f 4c23 	mov.w	ip, r3, asr #16
 800aee2:	f841 2b04 	str.w	r2, [r1], #4
 800aee6:	e7e8      	b.n	800aeba <__mdiff+0x8c>
 800aee8:	3e01      	subs	r6, #1
 800aeea:	e7e8      	b.n	800aebe <__mdiff+0x90>

0800aeec <__d2b>:
 800aeec:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
 800aef0:	461c      	mov	r4, r3
 800aef2:	2101      	movs	r1, #1
 800aef4:	4690      	mov	r8, r2
 800aef6:	9e08      	ldr	r6, [sp, #32]
 800aef8:	9d09      	ldr	r5, [sp, #36]	; 0x24
 800aefa:	f7ff fd75 	bl	800a9e8 <_Balloc>
 800aefe:	f3c4 0213 	ubfx	r2, r4, #0, #20
 800af02:	f3c4 540a 	ubfx	r4, r4, #20, #11
 800af06:	4607      	mov	r7, r0
 800af08:	bb34      	cbnz	r4, 800af58 <__d2b+0x6c>
 800af0a:	9201      	str	r2, [sp, #4]
 800af0c:	f1b8 0f00 	cmp.w	r8, #0
 800af10:	d027      	beq.n	800af62 <__d2b+0x76>
 800af12:	a802      	add	r0, sp, #8
 800af14:	f840 8d08 	str.w	r8, [r0, #-8]!
 800af18:	f7ff fe0b 	bl	800ab32 <__lo0bits>
 800af1c:	9900      	ldr	r1, [sp, #0]
 800af1e:	b1f0      	cbz	r0, 800af5e <__d2b+0x72>
 800af20:	9a01      	ldr	r2, [sp, #4]
 800af22:	f1c0 0320 	rsb	r3, r0, #32
 800af26:	fa02 f303 	lsl.w	r3, r2, r3
 800af2a:	430b      	orrs	r3, r1
 800af2c:	40c2      	lsrs	r2, r0
 800af2e:	617b      	str	r3, [r7, #20]
 800af30:	9201      	str	r2, [sp, #4]
 800af32:	9b01      	ldr	r3, [sp, #4]
 800af34:	2b00      	cmp	r3, #0
 800af36:	bf14      	ite	ne
 800af38:	2102      	movne	r1, #2
 800af3a:	2101      	moveq	r1, #1
 800af3c:	61bb      	str	r3, [r7, #24]
 800af3e:	6139      	str	r1, [r7, #16]
 800af40:	b1c4      	cbz	r4, 800af74 <__d2b+0x88>
 800af42:	f2a4 4433 	subw	r4, r4, #1075	; 0x433
 800af46:	4404      	add	r4, r0
 800af48:	6034      	str	r4, [r6, #0]
 800af4a:	f1c0 0035 	rsb	r0, r0, #53	; 0x35
 800af4e:	6028      	str	r0, [r5, #0]
 800af50:	4638      	mov	r0, r7
 800af52:	b002      	add	sp, #8
 800af54:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800af58:	f442 1280 	orr.w	r2, r2, #1048576	; 0x100000
 800af5c:	e7d5      	b.n	800af0a <__d2b+0x1e>
 800af5e:	6179      	str	r1, [r7, #20]
 800af60:	e7e7      	b.n	800af32 <__d2b+0x46>
 800af62:	a801      	add	r0, sp, #4
 800af64:	f7ff fde5 	bl	800ab32 <__lo0bits>
 800af68:	2101      	movs	r1, #1
 800af6a:	9b01      	ldr	r3, [sp, #4]
 800af6c:	6139      	str	r1, [r7, #16]
 800af6e:	617b      	str	r3, [r7, #20]
 800af70:	3020      	adds	r0, #32
 800af72:	e7e5      	b.n	800af40 <__d2b+0x54>
 800af74:	f2a0 4032 	subw	r0, r0, #1074	; 0x432
 800af78:	eb07 0381 	add.w	r3, r7, r1, lsl #2
 800af7c:	6030      	str	r0, [r6, #0]
 800af7e:	6918      	ldr	r0, [r3, #16]
 800af80:	f7ff fdb8 	bl	800aaf4 <__hi0bits>
 800af84:	ebc0 1041 	rsb	r0, r0, r1, lsl #5
 800af88:	e7e1      	b.n	800af4e <__d2b+0x62>

0800af8a <_calloc_r>:
 800af8a:	b538      	push	{r3, r4, r5, lr}
 800af8c:	fb02 f401 	mul.w	r4, r2, r1
 800af90:	4621      	mov	r1, r4
 800af92:	f000 f855 	bl	800b040 <_malloc_r>
 800af96:	4605      	mov	r5, r0
 800af98:	b118      	cbz	r0, 800afa2 <_calloc_r+0x18>
 800af9a:	4622      	mov	r2, r4
 800af9c:	2100      	movs	r1, #0
 800af9e:	f7fd fe4e 	bl	8008c3e <memset>
 800afa2:	4628      	mov	r0, r5
 800afa4:	bd38      	pop	{r3, r4, r5, pc}
	...

0800afa8 <_free_r>:
 800afa8:	b538      	push	{r3, r4, r5, lr}
 800afaa:	4605      	mov	r5, r0
 800afac:	2900      	cmp	r1, #0
 800afae:	d043      	beq.n	800b038 <_free_r+0x90>
 800afb0:	f851 3c04 	ldr.w	r3, [r1, #-4]
 800afb4:	1f0c      	subs	r4, r1, #4
 800afb6:	2b00      	cmp	r3, #0
 800afb8:	bfb8      	it	lt
 800afba:	18e4      	addlt	r4, r4, r3
 800afbc:	f000 face 	bl	800b55c <__malloc_lock>
 800afc0:	4a1e      	ldr	r2, [pc, #120]	; (800b03c <_free_r+0x94>)
 800afc2:	6813      	ldr	r3, [r2, #0]
 800afc4:	4610      	mov	r0, r2
 800afc6:	b933      	cbnz	r3, 800afd6 <_free_r+0x2e>
 800afc8:	6063      	str	r3, [r4, #4]
 800afca:	6014      	str	r4, [r2, #0]
 800afcc:	4628      	mov	r0, r5
 800afce:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800afd2:	f000 bac4 	b.w	800b55e <__malloc_unlock>
 800afd6:	42a3      	cmp	r3, r4
 800afd8:	d90b      	bls.n	800aff2 <_free_r+0x4a>
 800afda:	6821      	ldr	r1, [r4, #0]
 800afdc:	1862      	adds	r2, r4, r1
 800afde:	4293      	cmp	r3, r2
 800afe0:	bf01      	itttt	eq
 800afe2:	681a      	ldreq	r2, [r3, #0]
 800afe4:	685b      	ldreq	r3, [r3, #4]
 800afe6:	1852      	addeq	r2, r2, r1
 800afe8:	6022      	streq	r2, [r4, #0]
 800afea:	6063      	str	r3, [r4, #4]
 800afec:	6004      	str	r4, [r0, #0]
 800afee:	e7ed      	b.n	800afcc <_free_r+0x24>
 800aff0:	4613      	mov	r3, r2
 800aff2:	685a      	ldr	r2, [r3, #4]
 800aff4:	b10a      	cbz	r2, 800affa <_free_r+0x52>
 800aff6:	42a2      	cmp	r2, r4
 800aff8:	d9fa      	bls.n	800aff0 <_free_r+0x48>
 800affa:	6819      	ldr	r1, [r3, #0]
 800affc:	1858      	adds	r0, r3, r1
 800affe:	42a0      	cmp	r0, r4
 800b000:	d10b      	bne.n	800b01a <_free_r+0x72>
 800b002:	6820      	ldr	r0, [r4, #0]
 800b004:	4401      	add	r1, r0
 800b006:	1858      	adds	r0, r3, r1
 800b008:	4282      	cmp	r2, r0
 800b00a:	6019      	str	r1, [r3, #0]
 800b00c:	d1de      	bne.n	800afcc <_free_r+0x24>
 800b00e:	6810      	ldr	r0, [r2, #0]
 800b010:	6852      	ldr	r2, [r2, #4]
 800b012:	4401      	add	r1, r0
 800b014:	6019      	str	r1, [r3, #0]
 800b016:	605a      	str	r2, [r3, #4]
 800b018:	e7d8      	b.n	800afcc <_free_r+0x24>
 800b01a:	d902      	bls.n	800b022 <_free_r+0x7a>
 800b01c:	230c      	movs	r3, #12
 800b01e:	602b      	str	r3, [r5, #0]
 800b020:	e7d4      	b.n	800afcc <_free_r+0x24>
 800b022:	6820      	ldr	r0, [r4, #0]
 800b024:	1821      	adds	r1, r4, r0
 800b026:	428a      	cmp	r2, r1
 800b028:	bf01      	itttt	eq
 800b02a:	6811      	ldreq	r1, [r2, #0]
 800b02c:	6852      	ldreq	r2, [r2, #4]
 800b02e:	1809      	addeq	r1, r1, r0
 800b030:	6021      	streq	r1, [r4, #0]
 800b032:	6062      	str	r2, [r4, #4]
 800b034:	605c      	str	r4, [r3, #4]
 800b036:	e7c9      	b.n	800afcc <_free_r+0x24>
 800b038:	bd38      	pop	{r3, r4, r5, pc}
 800b03a:	bf00      	nop
 800b03c:	20000430 	.word	0x20000430

0800b040 <_malloc_r>:
 800b040:	b570      	push	{r4, r5, r6, lr}
 800b042:	1ccd      	adds	r5, r1, #3
 800b044:	f025 0503 	bic.w	r5, r5, #3
 800b048:	3508      	adds	r5, #8
 800b04a:	2d0c      	cmp	r5, #12
 800b04c:	bf38      	it	cc
 800b04e:	250c      	movcc	r5, #12
 800b050:	2d00      	cmp	r5, #0
 800b052:	4606      	mov	r6, r0
 800b054:	db01      	blt.n	800b05a <_malloc_r+0x1a>
 800b056:	42a9      	cmp	r1, r5
 800b058:	d903      	bls.n	800b062 <_malloc_r+0x22>
 800b05a:	230c      	movs	r3, #12
 800b05c:	6033      	str	r3, [r6, #0]
 800b05e:	2000      	movs	r0, #0
 800b060:	bd70      	pop	{r4, r5, r6, pc}
 800b062:	f000 fa7b 	bl	800b55c <__malloc_lock>
 800b066:	4a23      	ldr	r2, [pc, #140]	; (800b0f4 <_malloc_r+0xb4>)
 800b068:	6814      	ldr	r4, [r2, #0]
 800b06a:	4621      	mov	r1, r4
 800b06c:	b991      	cbnz	r1, 800b094 <_malloc_r+0x54>
 800b06e:	4c22      	ldr	r4, [pc, #136]	; (800b0f8 <_malloc_r+0xb8>)
 800b070:	6823      	ldr	r3, [r4, #0]
 800b072:	b91b      	cbnz	r3, 800b07c <_malloc_r+0x3c>
 800b074:	4630      	mov	r0, r6
 800b076:	f000 f9b5 	bl	800b3e4 <_sbrk_r>
 800b07a:	6020      	str	r0, [r4, #0]
 800b07c:	4629      	mov	r1, r5
 800b07e:	4630      	mov	r0, r6
 800b080:	f000 f9b0 	bl	800b3e4 <_sbrk_r>
 800b084:	1c43      	adds	r3, r0, #1
 800b086:	d126      	bne.n	800b0d6 <_malloc_r+0x96>
 800b088:	230c      	movs	r3, #12
 800b08a:	4630      	mov	r0, r6
 800b08c:	6033      	str	r3, [r6, #0]
 800b08e:	f000 fa66 	bl	800b55e <__malloc_unlock>
 800b092:	e7e4      	b.n	800b05e <_malloc_r+0x1e>
 800b094:	680b      	ldr	r3, [r1, #0]
 800b096:	1b5b      	subs	r3, r3, r5
 800b098:	d41a      	bmi.n	800b0d0 <_malloc_r+0x90>
 800b09a:	2b0b      	cmp	r3, #11
 800b09c:	d90f      	bls.n	800b0be <_malloc_r+0x7e>
 800b09e:	600b      	str	r3, [r1, #0]
 800b0a0:	18cc      	adds	r4, r1, r3
 800b0a2:	50cd      	str	r5, [r1, r3]
 800b0a4:	4630      	mov	r0, r6
 800b0a6:	f000 fa5a 	bl	800b55e <__malloc_unlock>
 800b0aa:	f104 000b 	add.w	r0, r4, #11
 800b0ae:	1d23      	adds	r3, r4, #4
 800b0b0:	f020 0007 	bic.w	r0, r0, #7
 800b0b4:	1ac3      	subs	r3, r0, r3
 800b0b6:	d01b      	beq.n	800b0f0 <_malloc_r+0xb0>
 800b0b8:	425a      	negs	r2, r3
 800b0ba:	50e2      	str	r2, [r4, r3]
 800b0bc:	bd70      	pop	{r4, r5, r6, pc}
 800b0be:	428c      	cmp	r4, r1
 800b0c0:	bf0b      	itete	eq
 800b0c2:	6863      	ldreq	r3, [r4, #4]
 800b0c4:	684b      	ldrne	r3, [r1, #4]
 800b0c6:	6013      	streq	r3, [r2, #0]
 800b0c8:	6063      	strne	r3, [r4, #4]
 800b0ca:	bf18      	it	ne
 800b0cc:	460c      	movne	r4, r1
 800b0ce:	e7e9      	b.n	800b0a4 <_malloc_r+0x64>
 800b0d0:	460c      	mov	r4, r1
 800b0d2:	6849      	ldr	r1, [r1, #4]
 800b0d4:	e7ca      	b.n	800b06c <_malloc_r+0x2c>
 800b0d6:	1cc4      	adds	r4, r0, #3
 800b0d8:	f024 0403 	bic.w	r4, r4, #3
 800b0dc:	42a0      	cmp	r0, r4
 800b0de:	d005      	beq.n	800b0ec <_malloc_r+0xac>
 800b0e0:	1a21      	subs	r1, r4, r0
 800b0e2:	4630      	mov	r0, r6
 800b0e4:	f000 f97e 	bl	800b3e4 <_sbrk_r>
 800b0e8:	3001      	adds	r0, #1
 800b0ea:	d0cd      	beq.n	800b088 <_malloc_r+0x48>
 800b0ec:	6025      	str	r5, [r4, #0]
 800b0ee:	e7d9      	b.n	800b0a4 <_malloc_r+0x64>
 800b0f0:	bd70      	pop	{r4, r5, r6, pc}
 800b0f2:	bf00      	nop
 800b0f4:	20000430 	.word	0x20000430
 800b0f8:	20000434 	.word	0x20000434

0800b0fc <__sfputc_r>:
 800b0fc:	6893      	ldr	r3, [r2, #8]
 800b0fe:	b410      	push	{r4}
 800b100:	3b01      	subs	r3, #1
 800b102:	2b00      	cmp	r3, #0
 800b104:	6093      	str	r3, [r2, #8]
 800b106:	da08      	bge.n	800b11a <__sfputc_r+0x1e>
 800b108:	6994      	ldr	r4, [r2, #24]
 800b10a:	42a3      	cmp	r3, r4
 800b10c:	db02      	blt.n	800b114 <__sfputc_r+0x18>
 800b10e:	b2cb      	uxtb	r3, r1
 800b110:	2b0a      	cmp	r3, #10
 800b112:	d102      	bne.n	800b11a <__sfputc_r+0x1e>
 800b114:	bc10      	pop	{r4}
 800b116:	f7fe bb41 	b.w	800979c <__swbuf_r>
 800b11a:	6813      	ldr	r3, [r2, #0]
 800b11c:	1c58      	adds	r0, r3, #1
 800b11e:	6010      	str	r0, [r2, #0]
 800b120:	7019      	strb	r1, [r3, #0]
 800b122:	b2c8      	uxtb	r0, r1
 800b124:	bc10      	pop	{r4}
 800b126:	4770      	bx	lr

0800b128 <__sfputs_r>:
 800b128:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800b12a:	4606      	mov	r6, r0
 800b12c:	460f      	mov	r7, r1
 800b12e:	4614      	mov	r4, r2
 800b130:	18d5      	adds	r5, r2, r3
 800b132:	42ac      	cmp	r4, r5
 800b134:	d101      	bne.n	800b13a <__sfputs_r+0x12>
 800b136:	2000      	movs	r0, #0
 800b138:	e007      	b.n	800b14a <__sfputs_r+0x22>
 800b13a:	463a      	mov	r2, r7
 800b13c:	f814 1b01 	ldrb.w	r1, [r4], #1
 800b140:	4630      	mov	r0, r6
 800b142:	f7ff ffdb 	bl	800b0fc <__sfputc_r>
 800b146:	1c43      	adds	r3, r0, #1
 800b148:	d1f3      	bne.n	800b132 <__sfputs_r+0xa>
 800b14a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

0800b14c <_vfiprintf_r>:
 800b14c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800b150:	b09d      	sub	sp, #116	; 0x74
 800b152:	460c      	mov	r4, r1
 800b154:	4617      	mov	r7, r2
 800b156:	9303      	str	r3, [sp, #12]
 800b158:	4606      	mov	r6, r0
 800b15a:	b118      	cbz	r0, 800b164 <_vfiprintf_r+0x18>
 800b15c:	6983      	ldr	r3, [r0, #24]
 800b15e:	b90b      	cbnz	r3, 800b164 <_vfiprintf_r+0x18>
 800b160:	f7ff fb30 	bl	800a7c4 <__sinit>
 800b164:	4b7c      	ldr	r3, [pc, #496]	; (800b358 <_vfiprintf_r+0x20c>)
 800b166:	429c      	cmp	r4, r3
 800b168:	d157      	bne.n	800b21a <_vfiprintf_r+0xce>
 800b16a:	6874      	ldr	r4, [r6, #4]
 800b16c:	89a3      	ldrh	r3, [r4, #12]
 800b16e:	0718      	lsls	r0, r3, #28
 800b170:	d55d      	bpl.n	800b22e <_vfiprintf_r+0xe2>
 800b172:	6923      	ldr	r3, [r4, #16]
 800b174:	2b00      	cmp	r3, #0
 800b176:	d05a      	beq.n	800b22e <_vfiprintf_r+0xe2>
 800b178:	2300      	movs	r3, #0
 800b17a:	9309      	str	r3, [sp, #36]	; 0x24
 800b17c:	2320      	movs	r3, #32
 800b17e:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 800b182:	2330      	movs	r3, #48	; 0x30
 800b184:	f04f 0b01 	mov.w	fp, #1
 800b188:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 800b18c:	46b8      	mov	r8, r7
 800b18e:	4645      	mov	r5, r8
 800b190:	f815 3b01 	ldrb.w	r3, [r5], #1
 800b194:	2b00      	cmp	r3, #0
 800b196:	d155      	bne.n	800b244 <_vfiprintf_r+0xf8>
 800b198:	ebb8 0a07 	subs.w	sl, r8, r7
 800b19c:	d00b      	beq.n	800b1b6 <_vfiprintf_r+0x6a>
 800b19e:	4653      	mov	r3, sl
 800b1a0:	463a      	mov	r2, r7
 800b1a2:	4621      	mov	r1, r4
 800b1a4:	4630      	mov	r0, r6
 800b1a6:	f7ff ffbf 	bl	800b128 <__sfputs_r>
 800b1aa:	3001      	adds	r0, #1
 800b1ac:	f000 80c4 	beq.w	800b338 <_vfiprintf_r+0x1ec>
 800b1b0:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800b1b2:	4453      	add	r3, sl
 800b1b4:	9309      	str	r3, [sp, #36]	; 0x24
 800b1b6:	f898 3000 	ldrb.w	r3, [r8]
 800b1ba:	2b00      	cmp	r3, #0
 800b1bc:	f000 80bc 	beq.w	800b338 <_vfiprintf_r+0x1ec>
 800b1c0:	2300      	movs	r3, #0
 800b1c2:	f04f 32ff 	mov.w	r2, #4294967295
 800b1c6:	9304      	str	r3, [sp, #16]
 800b1c8:	9307      	str	r3, [sp, #28]
 800b1ca:	9205      	str	r2, [sp, #20]
 800b1cc:	9306      	str	r3, [sp, #24]
 800b1ce:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 800b1d2:	931a      	str	r3, [sp, #104]	; 0x68
 800b1d4:	2205      	movs	r2, #5
 800b1d6:	7829      	ldrb	r1, [r5, #0]
 800b1d8:	4860      	ldr	r0, [pc, #384]	; (800b35c <_vfiprintf_r+0x210>)
 800b1da:	f7ff fbf7 	bl	800a9cc <memchr>
 800b1de:	f105 0801 	add.w	r8, r5, #1
 800b1e2:	9b04      	ldr	r3, [sp, #16]
 800b1e4:	2800      	cmp	r0, #0
 800b1e6:	d131      	bne.n	800b24c <_vfiprintf_r+0x100>
 800b1e8:	06d9      	lsls	r1, r3, #27
 800b1ea:	bf44      	itt	mi
 800b1ec:	2220      	movmi	r2, #32
 800b1ee:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800b1f2:	071a      	lsls	r2, r3, #28
 800b1f4:	bf44      	itt	mi
 800b1f6:	222b      	movmi	r2, #43	; 0x2b
 800b1f8:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800b1fc:	782a      	ldrb	r2, [r5, #0]
 800b1fe:	2a2a      	cmp	r2, #42	; 0x2a
 800b200:	d02c      	beq.n	800b25c <_vfiprintf_r+0x110>
 800b202:	2100      	movs	r1, #0
 800b204:	200a      	movs	r0, #10
 800b206:	9a07      	ldr	r2, [sp, #28]
 800b208:	46a8      	mov	r8, r5
 800b20a:	f898 3000 	ldrb.w	r3, [r8]
 800b20e:	3501      	adds	r5, #1
 800b210:	3b30      	subs	r3, #48	; 0x30
 800b212:	2b09      	cmp	r3, #9
 800b214:	d96d      	bls.n	800b2f2 <_vfiprintf_r+0x1a6>
 800b216:	b371      	cbz	r1, 800b276 <_vfiprintf_r+0x12a>
 800b218:	e026      	b.n	800b268 <_vfiprintf_r+0x11c>
 800b21a:	4b51      	ldr	r3, [pc, #324]	; (800b360 <_vfiprintf_r+0x214>)
 800b21c:	429c      	cmp	r4, r3
 800b21e:	d101      	bne.n	800b224 <_vfiprintf_r+0xd8>
 800b220:	68b4      	ldr	r4, [r6, #8]
 800b222:	e7a3      	b.n	800b16c <_vfiprintf_r+0x20>
 800b224:	4b4f      	ldr	r3, [pc, #316]	; (800b364 <_vfiprintf_r+0x218>)
 800b226:	429c      	cmp	r4, r3
 800b228:	bf08      	it	eq
 800b22a:	68f4      	ldreq	r4, [r6, #12]
 800b22c:	e79e      	b.n	800b16c <_vfiprintf_r+0x20>
 800b22e:	4621      	mov	r1, r4
 800b230:	4630      	mov	r0, r6
 800b232:	f7fe fb05 	bl	8009840 <__swsetup_r>
 800b236:	2800      	cmp	r0, #0
 800b238:	d09e      	beq.n	800b178 <_vfiprintf_r+0x2c>
 800b23a:	f04f 30ff 	mov.w	r0, #4294967295
 800b23e:	b01d      	add	sp, #116	; 0x74
 800b240:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800b244:	2b25      	cmp	r3, #37	; 0x25
 800b246:	d0a7      	beq.n	800b198 <_vfiprintf_r+0x4c>
 800b248:	46a8      	mov	r8, r5
 800b24a:	e7a0      	b.n	800b18e <_vfiprintf_r+0x42>
 800b24c:	4a43      	ldr	r2, [pc, #268]	; (800b35c <_vfiprintf_r+0x210>)
 800b24e:	4645      	mov	r5, r8
 800b250:	1a80      	subs	r0, r0, r2
 800b252:	fa0b f000 	lsl.w	r0, fp, r0
 800b256:	4318      	orrs	r0, r3
 800b258:	9004      	str	r0, [sp, #16]
 800b25a:	e7bb      	b.n	800b1d4 <_vfiprintf_r+0x88>
 800b25c:	9a03      	ldr	r2, [sp, #12]
 800b25e:	1d11      	adds	r1, r2, #4
 800b260:	6812      	ldr	r2, [r2, #0]
 800b262:	9103      	str	r1, [sp, #12]
 800b264:	2a00      	cmp	r2, #0
 800b266:	db01      	blt.n	800b26c <_vfiprintf_r+0x120>
 800b268:	9207      	str	r2, [sp, #28]
 800b26a:	e004      	b.n	800b276 <_vfiprintf_r+0x12a>
 800b26c:	4252      	negs	r2, r2
 800b26e:	f043 0302 	orr.w	r3, r3, #2
 800b272:	9207      	str	r2, [sp, #28]
 800b274:	9304      	str	r3, [sp, #16]
 800b276:	f898 3000 	ldrb.w	r3, [r8]
 800b27a:	2b2e      	cmp	r3, #46	; 0x2e
 800b27c:	d110      	bne.n	800b2a0 <_vfiprintf_r+0x154>
 800b27e:	f898 3001 	ldrb.w	r3, [r8, #1]
 800b282:	f108 0101 	add.w	r1, r8, #1
 800b286:	2b2a      	cmp	r3, #42	; 0x2a
 800b288:	d137      	bne.n	800b2fa <_vfiprintf_r+0x1ae>
 800b28a:	9b03      	ldr	r3, [sp, #12]
 800b28c:	f108 0802 	add.w	r8, r8, #2
 800b290:	1d1a      	adds	r2, r3, #4
 800b292:	681b      	ldr	r3, [r3, #0]
 800b294:	9203      	str	r2, [sp, #12]
 800b296:	2b00      	cmp	r3, #0
 800b298:	bfb8      	it	lt
 800b29a:	f04f 33ff 	movlt.w	r3, #4294967295
 800b29e:	9305      	str	r3, [sp, #20]
 800b2a0:	4d31      	ldr	r5, [pc, #196]	; (800b368 <_vfiprintf_r+0x21c>)
 800b2a2:	2203      	movs	r2, #3
 800b2a4:	f898 1000 	ldrb.w	r1, [r8]
 800b2a8:	4628      	mov	r0, r5
 800b2aa:	f7ff fb8f 	bl	800a9cc <memchr>
 800b2ae:	b140      	cbz	r0, 800b2c2 <_vfiprintf_r+0x176>
 800b2b0:	2340      	movs	r3, #64	; 0x40
 800b2b2:	1b40      	subs	r0, r0, r5
 800b2b4:	fa03 f000 	lsl.w	r0, r3, r0
 800b2b8:	9b04      	ldr	r3, [sp, #16]
 800b2ba:	f108 0801 	add.w	r8, r8, #1
 800b2be:	4303      	orrs	r3, r0
 800b2c0:	9304      	str	r3, [sp, #16]
 800b2c2:	f898 1000 	ldrb.w	r1, [r8]
 800b2c6:	2206      	movs	r2, #6
 800b2c8:	4828      	ldr	r0, [pc, #160]	; (800b36c <_vfiprintf_r+0x220>)
 800b2ca:	f108 0701 	add.w	r7, r8, #1
 800b2ce:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 800b2d2:	f7ff fb7b 	bl	800a9cc <memchr>
 800b2d6:	2800      	cmp	r0, #0
 800b2d8:	d034      	beq.n	800b344 <_vfiprintf_r+0x1f8>
 800b2da:	4b25      	ldr	r3, [pc, #148]	; (800b370 <_vfiprintf_r+0x224>)
 800b2dc:	bb03      	cbnz	r3, 800b320 <_vfiprintf_r+0x1d4>
 800b2de:	9b03      	ldr	r3, [sp, #12]
 800b2e0:	3307      	adds	r3, #7
 800b2e2:	f023 0307 	bic.w	r3, r3, #7
 800b2e6:	3308      	adds	r3, #8
 800b2e8:	9303      	str	r3, [sp, #12]
 800b2ea:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800b2ec:	444b      	add	r3, r9
 800b2ee:	9309      	str	r3, [sp, #36]	; 0x24
 800b2f0:	e74c      	b.n	800b18c <_vfiprintf_r+0x40>
 800b2f2:	fb00 3202 	mla	r2, r0, r2, r3
 800b2f6:	2101      	movs	r1, #1
 800b2f8:	e786      	b.n	800b208 <_vfiprintf_r+0xbc>
 800b2fa:	2300      	movs	r3, #0
 800b2fc:	250a      	movs	r5, #10
 800b2fe:	4618      	mov	r0, r3
 800b300:	9305      	str	r3, [sp, #20]
 800b302:	4688      	mov	r8, r1
 800b304:	f898 2000 	ldrb.w	r2, [r8]
 800b308:	3101      	adds	r1, #1
 800b30a:	3a30      	subs	r2, #48	; 0x30
 800b30c:	2a09      	cmp	r2, #9
 800b30e:	d903      	bls.n	800b318 <_vfiprintf_r+0x1cc>
 800b310:	2b00      	cmp	r3, #0
 800b312:	d0c5      	beq.n	800b2a0 <_vfiprintf_r+0x154>
 800b314:	9005      	str	r0, [sp, #20]
 800b316:	e7c3      	b.n	800b2a0 <_vfiprintf_r+0x154>
 800b318:	fb05 2000 	mla	r0, r5, r0, r2
 800b31c:	2301      	movs	r3, #1
 800b31e:	e7f0      	b.n	800b302 <_vfiprintf_r+0x1b6>
 800b320:	ab03      	add	r3, sp, #12
 800b322:	9300      	str	r3, [sp, #0]
 800b324:	4622      	mov	r2, r4
 800b326:	4b13      	ldr	r3, [pc, #76]	; (800b374 <_vfiprintf_r+0x228>)
 800b328:	a904      	add	r1, sp, #16
 800b32a:	4630      	mov	r0, r6
 800b32c:	f7fd fd20 	bl	8008d70 <_printf_float>
 800b330:	f1b0 3fff 	cmp.w	r0, #4294967295
 800b334:	4681      	mov	r9, r0
 800b336:	d1d8      	bne.n	800b2ea <_vfiprintf_r+0x19e>
 800b338:	89a3      	ldrh	r3, [r4, #12]
 800b33a:	065b      	lsls	r3, r3, #25
 800b33c:	f53f af7d 	bmi.w	800b23a <_vfiprintf_r+0xee>
 800b340:	9809      	ldr	r0, [sp, #36]	; 0x24
 800b342:	e77c      	b.n	800b23e <_vfiprintf_r+0xf2>
 800b344:	ab03      	add	r3, sp, #12
 800b346:	9300      	str	r3, [sp, #0]
 800b348:	4622      	mov	r2, r4
 800b34a:	4b0a      	ldr	r3, [pc, #40]	; (800b374 <_vfiprintf_r+0x228>)
 800b34c:	a904      	add	r1, sp, #16
 800b34e:	4630      	mov	r0, r6
 800b350:	f7fd ffbe 	bl	80092d0 <_printf_i>
 800b354:	e7ec      	b.n	800b330 <_vfiprintf_r+0x1e4>
 800b356:	bf00      	nop
 800b358:	0800bbb8 	.word	0x0800bbb8
 800b35c:	0800bcf4 	.word	0x0800bcf4
 800b360:	0800bbd8 	.word	0x0800bbd8
 800b364:	0800bb98 	.word	0x0800bb98
 800b368:	0800bcfa 	.word	0x0800bcfa
 800b36c:	0800bcfe 	.word	0x0800bcfe
 800b370:	08008d71 	.word	0x08008d71
 800b374:	0800b129 	.word	0x0800b129

0800b378 <_putc_r>:
 800b378:	b570      	push	{r4, r5, r6, lr}
 800b37a:	460d      	mov	r5, r1
 800b37c:	4614      	mov	r4, r2
 800b37e:	4606      	mov	r6, r0
 800b380:	b118      	cbz	r0, 800b38a <_putc_r+0x12>
 800b382:	6983      	ldr	r3, [r0, #24]
 800b384:	b90b      	cbnz	r3, 800b38a <_putc_r+0x12>
 800b386:	f7ff fa1d 	bl	800a7c4 <__sinit>
 800b38a:	4b13      	ldr	r3, [pc, #76]	; (800b3d8 <_putc_r+0x60>)
 800b38c:	429c      	cmp	r4, r3
 800b38e:	d112      	bne.n	800b3b6 <_putc_r+0x3e>
 800b390:	6874      	ldr	r4, [r6, #4]
 800b392:	68a3      	ldr	r3, [r4, #8]
 800b394:	3b01      	subs	r3, #1
 800b396:	2b00      	cmp	r3, #0
 800b398:	60a3      	str	r3, [r4, #8]
 800b39a:	da16      	bge.n	800b3ca <_putc_r+0x52>
 800b39c:	69a2      	ldr	r2, [r4, #24]
 800b39e:	4293      	cmp	r3, r2
 800b3a0:	db02      	blt.n	800b3a8 <_putc_r+0x30>
 800b3a2:	b2eb      	uxtb	r3, r5
 800b3a4:	2b0a      	cmp	r3, #10
 800b3a6:	d110      	bne.n	800b3ca <_putc_r+0x52>
 800b3a8:	4622      	mov	r2, r4
 800b3aa:	4629      	mov	r1, r5
 800b3ac:	4630      	mov	r0, r6
 800b3ae:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 800b3b2:	f7fe b9f3 	b.w	800979c <__swbuf_r>
 800b3b6:	4b09      	ldr	r3, [pc, #36]	; (800b3dc <_putc_r+0x64>)
 800b3b8:	429c      	cmp	r4, r3
 800b3ba:	d101      	bne.n	800b3c0 <_putc_r+0x48>
 800b3bc:	68b4      	ldr	r4, [r6, #8]
 800b3be:	e7e8      	b.n	800b392 <_putc_r+0x1a>
 800b3c0:	4b07      	ldr	r3, [pc, #28]	; (800b3e0 <_putc_r+0x68>)
 800b3c2:	429c      	cmp	r4, r3
 800b3c4:	bf08      	it	eq
 800b3c6:	68f4      	ldreq	r4, [r6, #12]
 800b3c8:	e7e3      	b.n	800b392 <_putc_r+0x1a>
 800b3ca:	6823      	ldr	r3, [r4, #0]
 800b3cc:	b2e8      	uxtb	r0, r5
 800b3ce:	1c5a      	adds	r2, r3, #1
 800b3d0:	6022      	str	r2, [r4, #0]
 800b3d2:	701d      	strb	r5, [r3, #0]
 800b3d4:	bd70      	pop	{r4, r5, r6, pc}
 800b3d6:	bf00      	nop
 800b3d8:	0800bbb8 	.word	0x0800bbb8
 800b3dc:	0800bbd8 	.word	0x0800bbd8
 800b3e0:	0800bb98 	.word	0x0800bb98

0800b3e4 <_sbrk_r>:
 800b3e4:	b538      	push	{r3, r4, r5, lr}
 800b3e6:	2300      	movs	r3, #0
 800b3e8:	4c05      	ldr	r4, [pc, #20]	; (800b400 <_sbrk_r+0x1c>)
 800b3ea:	4605      	mov	r5, r0
 800b3ec:	4608      	mov	r0, r1
 800b3ee:	6023      	str	r3, [r4, #0]
 800b3f0:	f7fc ffa0 	bl	8008334 <_sbrk>
 800b3f4:	1c43      	adds	r3, r0, #1
 800b3f6:	d102      	bne.n	800b3fe <_sbrk_r+0x1a>
 800b3f8:	6823      	ldr	r3, [r4, #0]
 800b3fa:	b103      	cbz	r3, 800b3fe <_sbrk_r+0x1a>
 800b3fc:	602b      	str	r3, [r5, #0]
 800b3fe:	bd38      	pop	{r3, r4, r5, pc}
 800b400:	200016a4 	.word	0x200016a4

0800b404 <__sread>:
 800b404:	b510      	push	{r4, lr}
 800b406:	460c      	mov	r4, r1
 800b408:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800b40c:	f000 f8a8 	bl	800b560 <_read_r>
 800b410:	2800      	cmp	r0, #0
 800b412:	bfab      	itete	ge
 800b414:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 800b416:	89a3      	ldrhlt	r3, [r4, #12]
 800b418:	181b      	addge	r3, r3, r0
 800b41a:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 800b41e:	bfac      	ite	ge
 800b420:	6563      	strge	r3, [r4, #84]	; 0x54
 800b422:	81a3      	strhlt	r3, [r4, #12]
 800b424:	bd10      	pop	{r4, pc}

0800b426 <__swrite>:
 800b426:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800b42a:	461f      	mov	r7, r3
 800b42c:	898b      	ldrh	r3, [r1, #12]
 800b42e:	4605      	mov	r5, r0
 800b430:	05db      	lsls	r3, r3, #23
 800b432:	460c      	mov	r4, r1
 800b434:	4616      	mov	r6, r2
 800b436:	d505      	bpl.n	800b444 <__swrite+0x1e>
 800b438:	2302      	movs	r3, #2
 800b43a:	2200      	movs	r2, #0
 800b43c:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800b440:	f000 f868 	bl	800b514 <_lseek_r>
 800b444:	89a3      	ldrh	r3, [r4, #12]
 800b446:	4632      	mov	r2, r6
 800b448:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 800b44c:	81a3      	strh	r3, [r4, #12]
 800b44e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800b452:	463b      	mov	r3, r7
 800b454:	4628      	mov	r0, r5
 800b456:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 800b45a:	f000 b817 	b.w	800b48c <_write_r>

0800b45e <__sseek>:
 800b45e:	b510      	push	{r4, lr}
 800b460:	460c      	mov	r4, r1
 800b462:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800b466:	f000 f855 	bl	800b514 <_lseek_r>
 800b46a:	1c43      	adds	r3, r0, #1
 800b46c:	89a3      	ldrh	r3, [r4, #12]
 800b46e:	bf15      	itete	ne
 800b470:	6560      	strne	r0, [r4, #84]	; 0x54
 800b472:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 800b476:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 800b47a:	81a3      	strheq	r3, [r4, #12]
 800b47c:	bf18      	it	ne
 800b47e:	81a3      	strhne	r3, [r4, #12]
 800b480:	bd10      	pop	{r4, pc}

0800b482 <__sclose>:
 800b482:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800b486:	f000 b813 	b.w	800b4b0 <_close_r>
	...

0800b48c <_write_r>:
 800b48c:	b538      	push	{r3, r4, r5, lr}
 800b48e:	4605      	mov	r5, r0
 800b490:	4608      	mov	r0, r1
 800b492:	4611      	mov	r1, r2
 800b494:	2200      	movs	r2, #0
 800b496:	4c05      	ldr	r4, [pc, #20]	; (800b4ac <_write_r+0x20>)
 800b498:	6022      	str	r2, [r4, #0]
 800b49a:	461a      	mov	r2, r3
 800b49c:	f7fc f92e 	bl	80076fc <_write>
 800b4a0:	1c43      	adds	r3, r0, #1
 800b4a2:	d102      	bne.n	800b4aa <_write_r+0x1e>
 800b4a4:	6823      	ldr	r3, [r4, #0]
 800b4a6:	b103      	cbz	r3, 800b4aa <_write_r+0x1e>
 800b4a8:	602b      	str	r3, [r5, #0]
 800b4aa:	bd38      	pop	{r3, r4, r5, pc}
 800b4ac:	200016a4 	.word	0x200016a4

0800b4b0 <_close_r>:
 800b4b0:	b538      	push	{r3, r4, r5, lr}
 800b4b2:	2300      	movs	r3, #0
 800b4b4:	4c05      	ldr	r4, [pc, #20]	; (800b4cc <_close_r+0x1c>)
 800b4b6:	4605      	mov	r5, r0
 800b4b8:	4608      	mov	r0, r1
 800b4ba:	6023      	str	r3, [r4, #0]
 800b4bc:	f7fc ff54 	bl	8008368 <_close>
 800b4c0:	1c43      	adds	r3, r0, #1
 800b4c2:	d102      	bne.n	800b4ca <_close_r+0x1a>
 800b4c4:	6823      	ldr	r3, [r4, #0]
 800b4c6:	b103      	cbz	r3, 800b4ca <_close_r+0x1a>
 800b4c8:	602b      	str	r3, [r5, #0]
 800b4ca:	bd38      	pop	{r3, r4, r5, pc}
 800b4cc:	200016a4 	.word	0x200016a4

0800b4d0 <_fstat_r>:
 800b4d0:	b538      	push	{r3, r4, r5, lr}
 800b4d2:	2300      	movs	r3, #0
 800b4d4:	4c06      	ldr	r4, [pc, #24]	; (800b4f0 <_fstat_r+0x20>)
 800b4d6:	4605      	mov	r5, r0
 800b4d8:	4608      	mov	r0, r1
 800b4da:	4611      	mov	r1, r2
 800b4dc:	6023      	str	r3, [r4, #0]
 800b4de:	f7fc ff46 	bl	800836e <_fstat>
 800b4e2:	1c43      	adds	r3, r0, #1
 800b4e4:	d102      	bne.n	800b4ec <_fstat_r+0x1c>
 800b4e6:	6823      	ldr	r3, [r4, #0]
 800b4e8:	b103      	cbz	r3, 800b4ec <_fstat_r+0x1c>
 800b4ea:	602b      	str	r3, [r5, #0]
 800b4ec:	bd38      	pop	{r3, r4, r5, pc}
 800b4ee:	bf00      	nop
 800b4f0:	200016a4 	.word	0x200016a4

0800b4f4 <_isatty_r>:
 800b4f4:	b538      	push	{r3, r4, r5, lr}
 800b4f6:	2300      	movs	r3, #0
 800b4f8:	4c05      	ldr	r4, [pc, #20]	; (800b510 <_isatty_r+0x1c>)
 800b4fa:	4605      	mov	r5, r0
 800b4fc:	4608      	mov	r0, r1
 800b4fe:	6023      	str	r3, [r4, #0]
 800b500:	f7fc ff3a 	bl	8008378 <_isatty>
 800b504:	1c43      	adds	r3, r0, #1
 800b506:	d102      	bne.n	800b50e <_isatty_r+0x1a>
 800b508:	6823      	ldr	r3, [r4, #0]
 800b50a:	b103      	cbz	r3, 800b50e <_isatty_r+0x1a>
 800b50c:	602b      	str	r3, [r5, #0]
 800b50e:	bd38      	pop	{r3, r4, r5, pc}
 800b510:	200016a4 	.word	0x200016a4

0800b514 <_lseek_r>:
 800b514:	b538      	push	{r3, r4, r5, lr}
 800b516:	4605      	mov	r5, r0
 800b518:	4608      	mov	r0, r1
 800b51a:	4611      	mov	r1, r2
 800b51c:	2200      	movs	r2, #0
 800b51e:	4c05      	ldr	r4, [pc, #20]	; (800b534 <_lseek_r+0x20>)
 800b520:	6022      	str	r2, [r4, #0]
 800b522:	461a      	mov	r2, r3
 800b524:	f7fc ff2a 	bl	800837c <_lseek>
 800b528:	1c43      	adds	r3, r0, #1
 800b52a:	d102      	bne.n	800b532 <_lseek_r+0x1e>
 800b52c:	6823      	ldr	r3, [r4, #0]
 800b52e:	b103      	cbz	r3, 800b532 <_lseek_r+0x1e>
 800b530:	602b      	str	r3, [r5, #0]
 800b532:	bd38      	pop	{r3, r4, r5, pc}
 800b534:	200016a4 	.word	0x200016a4

0800b538 <__ascii_mbtowc>:
 800b538:	b082      	sub	sp, #8
 800b53a:	b901      	cbnz	r1, 800b53e <__ascii_mbtowc+0x6>
 800b53c:	a901      	add	r1, sp, #4
 800b53e:	b142      	cbz	r2, 800b552 <__ascii_mbtowc+0x1a>
 800b540:	b14b      	cbz	r3, 800b556 <__ascii_mbtowc+0x1e>
 800b542:	7813      	ldrb	r3, [r2, #0]
 800b544:	600b      	str	r3, [r1, #0]
 800b546:	7812      	ldrb	r2, [r2, #0]
 800b548:	1c10      	adds	r0, r2, #0
 800b54a:	bf18      	it	ne
 800b54c:	2001      	movne	r0, #1
 800b54e:	b002      	add	sp, #8
 800b550:	4770      	bx	lr
 800b552:	4610      	mov	r0, r2
 800b554:	e7fb      	b.n	800b54e <__ascii_mbtowc+0x16>
 800b556:	f06f 0001 	mvn.w	r0, #1
 800b55a:	e7f8      	b.n	800b54e <__ascii_mbtowc+0x16>

0800b55c <__malloc_lock>:
 800b55c:	4770      	bx	lr

0800b55e <__malloc_unlock>:
 800b55e:	4770      	bx	lr

0800b560 <_read_r>:
 800b560:	b538      	push	{r3, r4, r5, lr}
 800b562:	4605      	mov	r5, r0
 800b564:	4608      	mov	r0, r1
 800b566:	4611      	mov	r1, r2
 800b568:	2200      	movs	r2, #0
 800b56a:	4c05      	ldr	r4, [pc, #20]	; (800b580 <_read_r+0x20>)
 800b56c:	6022      	str	r2, [r4, #0]
 800b56e:	461a      	mov	r2, r3
 800b570:	f7fc fed2 	bl	8008318 <_read>
 800b574:	1c43      	adds	r3, r0, #1
 800b576:	d102      	bne.n	800b57e <_read_r+0x1e>
 800b578:	6823      	ldr	r3, [r4, #0]
 800b57a:	b103      	cbz	r3, 800b57e <_read_r+0x1e>
 800b57c:	602b      	str	r3, [r5, #0]
 800b57e:	bd38      	pop	{r3, r4, r5, pc}
 800b580:	200016a4 	.word	0x200016a4

0800b584 <__ascii_wctomb>:
 800b584:	b149      	cbz	r1, 800b59a <__ascii_wctomb+0x16>
 800b586:	2aff      	cmp	r2, #255	; 0xff
 800b588:	bf8b      	itete	hi
 800b58a:	238a      	movhi	r3, #138	; 0x8a
 800b58c:	700a      	strbls	r2, [r1, #0]
 800b58e:	6003      	strhi	r3, [r0, #0]
 800b590:	2001      	movls	r0, #1
 800b592:	bf88      	it	hi
 800b594:	f04f 30ff 	movhi.w	r0, #4294967295
 800b598:	4770      	bx	lr
 800b59a:	4608      	mov	r0, r1
 800b59c:	4770      	bx	lr
	...

0800b5a0 <_init>:
 800b5a0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800b5a2:	bf00      	nop
 800b5a4:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800b5a6:	bc08      	pop	{r3}
 800b5a8:	469e      	mov	lr, r3
 800b5aa:	4770      	bx	lr

0800b5ac <_fini>:
 800b5ac:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800b5ae:	bf00      	nop
 800b5b0:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800b5b2:	bc08      	pop	{r3}
 800b5b4:	469e      	mov	lr, r3
 800b5b6:	4770      	bx	lr