STM32F103_ATTEN_PLL_Zig/Debug/STM32F103_ATTEN_PLL_Zig.list

STM32F103_ATTEN_PLL_Zig.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08004000  08004000  00004000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00007a34  080041e8  080041e8  000041e8  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00000330  0800bc20  0800bc20  0000bc20  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  0800bf50  0800bf50  0000bf50  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  0800bf54  0800bf54  0000bf54  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         0000041c  20000000  0800bf58  00010000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          000013c4  20000420  0800c374  00010420  2**3
                  ALLOC
  7 ._user_heap_stack 00000600  200017e4  0800c374  000117e4  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  0001041c  2**0
                  CONTENTS, READONLY
  9 .debug_info   0002554a  00000000  00000000  00010445  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 00005055  00000000  00000000  0003598f  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    00009e0d  00000000  00000000  0003a9e4  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 00000e38  00000000  00000000  000447f8  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00001218  00000000  00000000  00045630  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   000098f9  00000000  00000000  00046848  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    000058a5  00000000  00000000  00050141  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  000559e6  2**0
                  CONTENTS, READONLY
 17 .debug_frame  000037dc  00000000  00000000  00055a64  2**2
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080041e8 <__do_global_dtors_aux>:
 80041e8:	b510      	push	{r4, lr}
 80041ea:	4c05      	ldr	r4, [pc, #20]	; (8004200 <__do_global_dtors_aux+0x18>)
 80041ec:	7823      	ldrb	r3, [r4, #0]
 80041ee:	b933      	cbnz	r3, 80041fe <__do_global_dtors_aux+0x16>
 80041f0:	4b04      	ldr	r3, [pc, #16]	; (8004204 <__do_global_dtors_aux+0x1c>)
 80041f2:	b113      	cbz	r3, 80041fa <__do_global_dtors_aux+0x12>
 80041f4:	4804      	ldr	r0, [pc, #16]	; (8004208 <__do_global_dtors_aux+0x20>)
 80041f6:	f3af 8000 	nop.w
 80041fa:	2301      	movs	r3, #1
 80041fc:	7023      	strb	r3, [r4, #0]
 80041fe:	bd10      	pop	{r4, pc}
 8004200:	20000420 	.word	0x20000420
 8004204:	00000000 	.word	0x00000000
 8004208:	0800bc04 	.word	0x0800bc04

0800420c <frame_dummy>:
 800420c:	b508      	push	{r3, lr}
 800420e:	4b03      	ldr	r3, [pc, #12]	; (800421c <frame_dummy+0x10>)
 8004210:	b11b      	cbz	r3, 800421a <frame_dummy+0xe>
 8004212:	4903      	ldr	r1, [pc, #12]	; (8004220 <frame_dummy+0x14>)
 8004214:	4803      	ldr	r0, [pc, #12]	; (8004224 <frame_dummy+0x18>)
 8004216:	f3af 8000 	nop.w
 800421a:	bd08      	pop	{r3, pc}
 800421c:	00000000 	.word	0x00000000
 8004220:	20000424 	.word	0x20000424
 8004224:	0800bc04 	.word	0x0800bc04

08004228 <strlen>:
 8004228:	4603      	mov	r3, r0
 800422a:	f813 2b01 	ldrb.w	r2, [r3], #1
 800422e:	2a00      	cmp	r2, #0
 8004230:	d1fb      	bne.n	800422a <strlen+0x2>
 8004232:	1a18      	subs	r0, r3, r0
 8004234:	3801      	subs	r0, #1
 8004236:	4770      	bx	lr

08004238 <__aeabi_llsr>:
 8004238:	40d0      	lsrs	r0, r2
 800423a:	1c0b      	adds	r3, r1, #0
 800423c:	40d1      	lsrs	r1, r2
 800423e:	469c      	mov	ip, r3
 8004240:	3a20      	subs	r2, #32
 8004242:	40d3      	lsrs	r3, r2
 8004244:	4318      	orrs	r0, r3
 8004246:	4252      	negs	r2, r2
 8004248:	4663      	mov	r3, ip
 800424a:	4093      	lsls	r3, r2
 800424c:	4318      	orrs	r0, r3
 800424e:	4770      	bx	lr

08004250 <__aeabi_drsub>:
 8004250:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
 8004254:	e002      	b.n	800425c <__adddf3>
 8004256:	bf00      	nop

08004258 <__aeabi_dsub>:
 8004258:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000

0800425c <__adddf3>:
 800425c:	b530      	push	{r4, r5, lr}
 800425e:	ea4f 0441 	mov.w	r4, r1, lsl #1
 8004262:	ea4f 0543 	mov.w	r5, r3, lsl #1
 8004266:	ea94 0f05 	teq	r4, r5
 800426a:	bf08      	it	eq
 800426c:	ea90 0f02 	teqeq	r0, r2
 8004270:	bf1f      	itttt	ne
 8004272:	ea54 0c00 	orrsne.w	ip, r4, r0
 8004276:	ea55 0c02 	orrsne.w	ip, r5, r2
 800427a:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 800427e:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 8004282:	f000 80e2 	beq.w	800444a <__adddf3+0x1ee>
 8004286:	ea4f 5454 	mov.w	r4, r4, lsr #21
 800428a:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 800428e:	bfb8      	it	lt
 8004290:	426d      	neglt	r5, r5
 8004292:	dd0c      	ble.n	80042ae <__adddf3+0x52>
 8004294:	442c      	add	r4, r5
 8004296:	ea80 0202 	eor.w	r2, r0, r2
 800429a:	ea81 0303 	eor.w	r3, r1, r3
 800429e:	ea82 0000 	eor.w	r0, r2, r0
 80042a2:	ea83 0101 	eor.w	r1, r3, r1
 80042a6:	ea80 0202 	eor.w	r2, r0, r2
 80042aa:	ea81 0303 	eor.w	r3, r1, r3
 80042ae:	2d36      	cmp	r5, #54	; 0x36
 80042b0:	bf88      	it	hi
 80042b2:	bd30      	pophi	{r4, r5, pc}
 80042b4:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 80042b8:	ea4f 3101 	mov.w	r1, r1, lsl #12
 80042bc:	f44f 1c80 	mov.w	ip, #1048576	; 0x100000
 80042c0:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 80042c4:	d002      	beq.n	80042cc <__adddf3+0x70>
 80042c6:	4240      	negs	r0, r0
 80042c8:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80042cc:	f013 4f00 	tst.w	r3, #2147483648	; 0x80000000
 80042d0:	ea4f 3303 	mov.w	r3, r3, lsl #12
 80042d4:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 80042d8:	d002      	beq.n	80042e0 <__adddf3+0x84>
 80042da:	4252      	negs	r2, r2
 80042dc:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 80042e0:	ea94 0f05 	teq	r4, r5
 80042e4:	f000 80a7 	beq.w	8004436 <__adddf3+0x1da>
 80042e8:	f1a4 0401 	sub.w	r4, r4, #1
 80042ec:	f1d5 0e20 	rsbs	lr, r5, #32
 80042f0:	db0d      	blt.n	800430e <__adddf3+0xb2>
 80042f2:	fa02 fc0e 	lsl.w	ip, r2, lr
 80042f6:	fa22 f205 	lsr.w	r2, r2, r5
 80042fa:	1880      	adds	r0, r0, r2
 80042fc:	f141 0100 	adc.w	r1, r1, #0
 8004300:	fa03 f20e 	lsl.w	r2, r3, lr
 8004304:	1880      	adds	r0, r0, r2
 8004306:	fa43 f305 	asr.w	r3, r3, r5
 800430a:	4159      	adcs	r1, r3
 800430c:	e00e      	b.n	800432c <__adddf3+0xd0>
 800430e:	f1a5 0520 	sub.w	r5, r5, #32
 8004312:	f10e 0e20 	add.w	lr, lr, #32
 8004316:	2a01      	cmp	r2, #1
 8004318:	fa03 fc0e 	lsl.w	ip, r3, lr
 800431c:	bf28      	it	cs
 800431e:	f04c 0c02 	orrcs.w	ip, ip, #2
 8004322:	fa43 f305 	asr.w	r3, r3, r5
 8004326:	18c0      	adds	r0, r0, r3
 8004328:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 800432c:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004330:	d507      	bpl.n	8004342 <__adddf3+0xe6>
 8004332:	f04f 0e00 	mov.w	lr, #0
 8004336:	f1dc 0c00 	rsbs	ip, ip, #0
 800433a:	eb7e 0000 	sbcs.w	r0, lr, r0
 800433e:	eb6e 0101 	sbc.w	r1, lr, r1
 8004342:	f5b1 1f80 	cmp.w	r1, #1048576	; 0x100000
 8004346:	d31b      	bcc.n	8004380 <__adddf3+0x124>
 8004348:	f5b1 1f00 	cmp.w	r1, #2097152	; 0x200000
 800434c:	d30c      	bcc.n	8004368 <__adddf3+0x10c>
 800434e:	0849      	lsrs	r1, r1, #1
 8004350:	ea5f 0030 	movs.w	r0, r0, rrx
 8004354:	ea4f 0c3c 	mov.w	ip, ip, rrx
 8004358:	f104 0401 	add.w	r4, r4, #1
 800435c:	ea4f 5244 	mov.w	r2, r4, lsl #21
 8004360:	f512 0f80 	cmn.w	r2, #4194304	; 0x400000
 8004364:	f080 809a 	bcs.w	800449c <__adddf3+0x240>
 8004368:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
 800436c:	bf08      	it	eq
 800436e:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 8004372:	f150 0000 	adcs.w	r0, r0, #0
 8004376:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 800437a:	ea41 0105 	orr.w	r1, r1, r5
 800437e:	bd30      	pop	{r4, r5, pc}
 8004380:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 8004384:	4140      	adcs	r0, r0
 8004386:	eb41 0101 	adc.w	r1, r1, r1
 800438a:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 800438e:	f1a4 0401 	sub.w	r4, r4, #1
 8004392:	d1e9      	bne.n	8004368 <__adddf3+0x10c>
 8004394:	f091 0f00 	teq	r1, #0
 8004398:	bf04      	itt	eq
 800439a:	4601      	moveq	r1, r0
 800439c:	2000      	moveq	r0, #0
 800439e:	fab1 f381 	clz	r3, r1
 80043a2:	bf08      	it	eq
 80043a4:	3320      	addeq	r3, #32
 80043a6:	f1a3 030b 	sub.w	r3, r3, #11
 80043aa:	f1b3 0220 	subs.w	r2, r3, #32
 80043ae:	da0c      	bge.n	80043ca <__adddf3+0x16e>
 80043b0:	320c      	adds	r2, #12
 80043b2:	dd08      	ble.n	80043c6 <__adddf3+0x16a>
 80043b4:	f102 0c14 	add.w	ip, r2, #20
 80043b8:	f1c2 020c 	rsb	r2, r2, #12
 80043bc:	fa01 f00c 	lsl.w	r0, r1, ip
 80043c0:	fa21 f102 	lsr.w	r1, r1, r2
 80043c4:	e00c      	b.n	80043e0 <__adddf3+0x184>
 80043c6:	f102 0214 	add.w	r2, r2, #20
 80043ca:	bfd8      	it	le
 80043cc:	f1c2 0c20 	rsble	ip, r2, #32
 80043d0:	fa01 f102 	lsl.w	r1, r1, r2
 80043d4:	fa20 fc0c 	lsr.w	ip, r0, ip
 80043d8:	bfdc      	itt	le
 80043da:	ea41 010c 	orrle.w	r1, r1, ip
 80043de:	4090      	lslle	r0, r2
 80043e0:	1ae4      	subs	r4, r4, r3
 80043e2:	bfa2      	ittt	ge
 80043e4:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 80043e8:	4329      	orrge	r1, r5
 80043ea:	bd30      	popge	{r4, r5, pc}
 80043ec:	ea6f 0404 	mvn.w	r4, r4
 80043f0:	3c1f      	subs	r4, #31
 80043f2:	da1c      	bge.n	800442e <__adddf3+0x1d2>
 80043f4:	340c      	adds	r4, #12
 80043f6:	dc0e      	bgt.n	8004416 <__adddf3+0x1ba>
 80043f8:	f104 0414 	add.w	r4, r4, #20
 80043fc:	f1c4 0220 	rsb	r2, r4, #32
 8004400:	fa20 f004 	lsr.w	r0, r0, r4
 8004404:	fa01 f302 	lsl.w	r3, r1, r2
 8004408:	ea40 0003 	orr.w	r0, r0, r3
 800440c:	fa21 f304 	lsr.w	r3, r1, r4
 8004410:	ea45 0103 	orr.w	r1, r5, r3
 8004414:	bd30      	pop	{r4, r5, pc}
 8004416:	f1c4 040c 	rsb	r4, r4, #12
 800441a:	f1c4 0220 	rsb	r2, r4, #32
 800441e:	fa20 f002 	lsr.w	r0, r0, r2
 8004422:	fa01 f304 	lsl.w	r3, r1, r4
 8004426:	ea40 0003 	orr.w	r0, r0, r3
 800442a:	4629      	mov	r1, r5
 800442c:	bd30      	pop	{r4, r5, pc}
 800442e:	fa21 f004 	lsr.w	r0, r1, r4
 8004432:	4629      	mov	r1, r5
 8004434:	bd30      	pop	{r4, r5, pc}
 8004436:	f094 0f00 	teq	r4, #0
 800443a:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
 800443e:	bf06      	itte	eq
 8004440:	f481 1180 	eoreq.w	r1, r1, #1048576	; 0x100000
 8004444:	3401      	addeq	r4, #1
 8004446:	3d01      	subne	r5, #1
 8004448:	e74e      	b.n	80042e8 <__adddf3+0x8c>
 800444a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 800444e:	bf18      	it	ne
 8004450:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 8004454:	d029      	beq.n	80044aa <__adddf3+0x24e>
 8004456:	ea94 0f05 	teq	r4, r5
 800445a:	bf08      	it	eq
 800445c:	ea90 0f02 	teqeq	r0, r2
 8004460:	d005      	beq.n	800446e <__adddf3+0x212>
 8004462:	ea54 0c00 	orrs.w	ip, r4, r0
 8004466:	bf04      	itt	eq
 8004468:	4619      	moveq	r1, r3
 800446a:	4610      	moveq	r0, r2
 800446c:	bd30      	pop	{r4, r5, pc}
 800446e:	ea91 0f03 	teq	r1, r3
 8004472:	bf1e      	ittt	ne
 8004474:	2100      	movne	r1, #0
 8004476:	2000      	movne	r0, #0
 8004478:	bd30      	popne	{r4, r5, pc}
 800447a:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 800447e:	d105      	bne.n	800448c <__adddf3+0x230>
 8004480:	0040      	lsls	r0, r0, #1
 8004482:	4149      	adcs	r1, r1
 8004484:	bf28      	it	cs
 8004486:	f041 4100 	orrcs.w	r1, r1, #2147483648	; 0x80000000
 800448a:	bd30      	pop	{r4, r5, pc}
 800448c:	f514 0480 	adds.w	r4, r4, #4194304	; 0x400000
 8004490:	bf3c      	itt	cc
 8004492:	f501 1180 	addcc.w	r1, r1, #1048576	; 0x100000
 8004496:	bd30      	popcc	{r4, r5, pc}
 8004498:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 800449c:	f045 41fe 	orr.w	r1, r5, #2130706432	; 0x7f000000
 80044a0:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 80044a4:	f04f 0000 	mov.w	r0, #0
 80044a8:	bd30      	pop	{r4, r5, pc}
 80044aa:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 80044ae:	bf1a      	itte	ne
 80044b0:	4619      	movne	r1, r3
 80044b2:	4610      	movne	r0, r2
 80044b4:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 80044b8:	bf1c      	itt	ne
 80044ba:	460b      	movne	r3, r1
 80044bc:	4602      	movne	r2, r0
 80044be:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 80044c2:	bf06      	itte	eq
 80044c4:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 80044c8:	ea91 0f03 	teqeq	r1, r3
 80044cc:	f441 2100 	orrne.w	r1, r1, #524288	; 0x80000
 80044d0:	bd30      	pop	{r4, r5, pc}
 80044d2:	bf00      	nop

080044d4 <__aeabi_ui2d>:
 80044d4:	f090 0f00 	teq	r0, #0
 80044d8:	bf04      	itt	eq
 80044da:	2100      	moveq	r1, #0
 80044dc:	4770      	bxeq	lr
 80044de:	b530      	push	{r4, r5, lr}
 80044e0:	f44f 6480 	mov.w	r4, #1024	; 0x400
 80044e4:	f104 0432 	add.w	r4, r4, #50	; 0x32
 80044e8:	f04f 0500 	mov.w	r5, #0
 80044ec:	f04f 0100 	mov.w	r1, #0
 80044f0:	e750      	b.n	8004394 <__adddf3+0x138>
 80044f2:	bf00      	nop

080044f4 <__aeabi_i2d>:
 80044f4:	f090 0f00 	teq	r0, #0
 80044f8:	bf04      	itt	eq
 80044fa:	2100      	moveq	r1, #0
 80044fc:	4770      	bxeq	lr
 80044fe:	b530      	push	{r4, r5, lr}
 8004500:	f44f 6480 	mov.w	r4, #1024	; 0x400
 8004504:	f104 0432 	add.w	r4, r4, #50	; 0x32
 8004508:	f010 4500 	ands.w	r5, r0, #2147483648	; 0x80000000
 800450c:	bf48      	it	mi
 800450e:	4240      	negmi	r0, r0
 8004510:	f04f 0100 	mov.w	r1, #0
 8004514:	e73e      	b.n	8004394 <__adddf3+0x138>
 8004516:	bf00      	nop

08004518 <__aeabi_f2d>:
 8004518:	0042      	lsls	r2, r0, #1
 800451a:	ea4f 01e2 	mov.w	r1, r2, asr #3
 800451e:	ea4f 0131 	mov.w	r1, r1, rrx
 8004522:	ea4f 7002 	mov.w	r0, r2, lsl #28
 8004526:	bf1f      	itttt	ne
 8004528:	f012 437f 	andsne.w	r3, r2, #4278190080	; 0xff000000
 800452c:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004530:	f081 5160 	eorne.w	r1, r1, #939524096	; 0x38000000
 8004534:	4770      	bxne	lr
 8004536:	f092 0f00 	teq	r2, #0
 800453a:	bf14      	ite	ne
 800453c:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004540:	4770      	bxeq	lr
 8004542:	b530      	push	{r4, r5, lr}
 8004544:	f44f 7460 	mov.w	r4, #896	; 0x380
 8004548:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 800454c:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 8004550:	e720      	b.n	8004394 <__adddf3+0x138>
 8004552:	bf00      	nop

08004554 <__aeabi_ul2d>:
 8004554:	ea50 0201 	orrs.w	r2, r0, r1
 8004558:	bf08      	it	eq
 800455a:	4770      	bxeq	lr
 800455c:	b530      	push	{r4, r5, lr}
 800455e:	f04f 0500 	mov.w	r5, #0
 8004562:	e00a      	b.n	800457a <__aeabi_l2d+0x16>

08004564 <__aeabi_l2d>:
 8004564:	ea50 0201 	orrs.w	r2, r0, r1
 8004568:	bf08      	it	eq
 800456a:	4770      	bxeq	lr
 800456c:	b530      	push	{r4, r5, lr}
 800456e:	f011 4500 	ands.w	r5, r1, #2147483648	; 0x80000000
 8004572:	d502      	bpl.n	800457a <__aeabi_l2d+0x16>
 8004574:	4240      	negs	r0, r0
 8004576:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 800457a:	f44f 6480 	mov.w	r4, #1024	; 0x400
 800457e:	f104 0432 	add.w	r4, r4, #50	; 0x32
 8004582:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 8004586:	f43f aedc 	beq.w	8004342 <__adddf3+0xe6>
 800458a:	f04f 0203 	mov.w	r2, #3
 800458e:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8004592:	bf18      	it	ne
 8004594:	3203      	addne	r2, #3
 8004596:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 800459a:	bf18      	it	ne
 800459c:	3203      	addne	r2, #3
 800459e:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 80045a2:	f1c2 0320 	rsb	r3, r2, #32
 80045a6:	fa00 fc03 	lsl.w	ip, r0, r3
 80045aa:	fa20 f002 	lsr.w	r0, r0, r2
 80045ae:	fa01 fe03 	lsl.w	lr, r1, r3
 80045b2:	ea40 000e 	orr.w	r0, r0, lr
 80045b6:	fa21 f102 	lsr.w	r1, r1, r2
 80045ba:	4414      	add	r4, r2
 80045bc:	e6c1      	b.n	8004342 <__adddf3+0xe6>
 80045be:	bf00      	nop

080045c0 <__aeabi_dmul>:
 80045c0:	b570      	push	{r4, r5, r6, lr}
 80045c2:	f04f 0cff 	mov.w	ip, #255	; 0xff
 80045c6:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 80045ca:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 80045ce:	bf1d      	ittte	ne
 80045d0:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 80045d4:	ea94 0f0c 	teqne	r4, ip
 80045d8:	ea95 0f0c 	teqne	r5, ip
 80045dc:	f000 f8de 	bleq	800479c <__aeabi_dmul+0x1dc>
 80045e0:	442c      	add	r4, r5
 80045e2:	ea81 0603 	eor.w	r6, r1, r3
 80045e6:	ea21 514c 	bic.w	r1, r1, ip, lsl #21
 80045ea:	ea23 534c 	bic.w	r3, r3, ip, lsl #21
 80045ee:	ea50 3501 	orrs.w	r5, r0, r1, lsl #12
 80045f2:	bf18      	it	ne
 80045f4:	ea52 3503 	orrsne.w	r5, r2, r3, lsl #12
 80045f8:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 80045fc:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
 8004600:	d038      	beq.n	8004674 <__aeabi_dmul+0xb4>
 8004602:	fba0 ce02 	umull	ip, lr, r0, r2
 8004606:	f04f 0500 	mov.w	r5, #0
 800460a:	fbe1 e502 	umlal	lr, r5, r1, r2
 800460e:	f006 4200 	and.w	r2, r6, #2147483648	; 0x80000000
 8004612:	fbe0 e503 	umlal	lr, r5, r0, r3
 8004616:	f04f 0600 	mov.w	r6, #0
 800461a:	fbe1 5603 	umlal	r5, r6, r1, r3
 800461e:	f09c 0f00 	teq	ip, #0
 8004622:	bf18      	it	ne
 8004624:	f04e 0e01 	orrne.w	lr, lr, #1
 8004628:	f1a4 04ff 	sub.w	r4, r4, #255	; 0xff
 800462c:	f5b6 7f00 	cmp.w	r6, #512	; 0x200
 8004630:	f564 7440 	sbc.w	r4, r4, #768	; 0x300
 8004634:	d204      	bcs.n	8004640 <__aeabi_dmul+0x80>
 8004636:	ea5f 0e4e 	movs.w	lr, lr, lsl #1
 800463a:	416d      	adcs	r5, r5
 800463c:	eb46 0606 	adc.w	r6, r6, r6
 8004640:	ea42 21c6 	orr.w	r1, r2, r6, lsl #11
 8004644:	ea41 5155 	orr.w	r1, r1, r5, lsr #21
 8004648:	ea4f 20c5 	mov.w	r0, r5, lsl #11
 800464c:	ea40 505e 	orr.w	r0, r0, lr, lsr #21
 8004650:	ea4f 2ece 	mov.w	lr, lr, lsl #11
 8004654:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 8004658:	bf88      	it	hi
 800465a:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 800465e:	d81e      	bhi.n	800469e <__aeabi_dmul+0xde>
 8004660:	f1be 4f00 	cmp.w	lr, #2147483648	; 0x80000000
 8004664:	bf08      	it	eq
 8004666:	ea5f 0e50 	movseq.w	lr, r0, lsr #1
 800466a:	f150 0000 	adcs.w	r0, r0, #0
 800466e:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 8004672:	bd70      	pop	{r4, r5, r6, pc}
 8004674:	f006 4600 	and.w	r6, r6, #2147483648	; 0x80000000
 8004678:	ea46 0101 	orr.w	r1, r6, r1
 800467c:	ea40 0002 	orr.w	r0, r0, r2
 8004680:	ea81 0103 	eor.w	r1, r1, r3
 8004684:	ebb4 045c 	subs.w	r4, r4, ip, lsr #1
 8004688:	bfc2      	ittt	gt
 800468a:	ebd4 050c 	rsbsgt	r5, r4, ip
 800468e:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 8004692:	bd70      	popgt	{r4, r5, r6, pc}
 8004694:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004698:	f04f 0e00 	mov.w	lr, #0
 800469c:	3c01      	subs	r4, #1
 800469e:	f300 80ab 	bgt.w	80047f8 <__aeabi_dmul+0x238>
 80046a2:	f114 0f36 	cmn.w	r4, #54	; 0x36
 80046a6:	bfde      	ittt	le
 80046a8:	2000      	movle	r0, #0
 80046aa:	f001 4100 	andle.w	r1, r1, #2147483648	; 0x80000000
 80046ae:	bd70      	pople	{r4, r5, r6, pc}
 80046b0:	f1c4 0400 	rsb	r4, r4, #0
 80046b4:	3c20      	subs	r4, #32
 80046b6:	da35      	bge.n	8004724 <__aeabi_dmul+0x164>
 80046b8:	340c      	adds	r4, #12
 80046ba:	dc1b      	bgt.n	80046f4 <__aeabi_dmul+0x134>
 80046bc:	f104 0414 	add.w	r4, r4, #20
 80046c0:	f1c4 0520 	rsb	r5, r4, #32
 80046c4:	fa00 f305 	lsl.w	r3, r0, r5
 80046c8:	fa20 f004 	lsr.w	r0, r0, r4
 80046cc:	fa01 f205 	lsl.w	r2, r1, r5
 80046d0:	ea40 0002 	orr.w	r0, r0, r2
 80046d4:	f001 4200 	and.w	r2, r1, #2147483648	; 0x80000000
 80046d8:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 80046dc:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 80046e0:	fa21 f604 	lsr.w	r6, r1, r4
 80046e4:	eb42 0106 	adc.w	r1, r2, r6
 80046e8:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 80046ec:	bf08      	it	eq
 80046ee:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 80046f2:	bd70      	pop	{r4, r5, r6, pc}
 80046f4:	f1c4 040c 	rsb	r4, r4, #12
 80046f8:	f1c4 0520 	rsb	r5, r4, #32
 80046fc:	fa00 f304 	lsl.w	r3, r0, r4
 8004700:	fa20 f005 	lsr.w	r0, r0, r5
 8004704:	fa01 f204 	lsl.w	r2, r1, r4
 8004708:	ea40 0002 	orr.w	r0, r0, r2
 800470c:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 8004710:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 8004714:	f141 0100 	adc.w	r1, r1, #0
 8004718:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 800471c:	bf08      	it	eq
 800471e:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 8004722:	bd70      	pop	{r4, r5, r6, pc}
 8004724:	f1c4 0520 	rsb	r5, r4, #32
 8004728:	fa00 f205 	lsl.w	r2, r0, r5
 800472c:	ea4e 0e02 	orr.w	lr, lr, r2
 8004730:	fa20 f304 	lsr.w	r3, r0, r4
 8004734:	fa01 f205 	lsl.w	r2, r1, r5
 8004738:	ea43 0302 	orr.w	r3, r3, r2
 800473c:	fa21 f004 	lsr.w	r0, r1, r4
 8004740:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 8004744:	fa21 f204 	lsr.w	r2, r1, r4
 8004748:	ea20 0002 	bic.w	r0, r0, r2
 800474c:	eb00 70d3 	add.w	r0, r0, r3, lsr #31
 8004750:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 8004754:	bf08      	it	eq
 8004756:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 800475a:	bd70      	pop	{r4, r5, r6, pc}
 800475c:	f094 0f00 	teq	r4, #0
 8004760:	d10f      	bne.n	8004782 <__aeabi_dmul+0x1c2>
 8004762:	f001 4600 	and.w	r6, r1, #2147483648	; 0x80000000
 8004766:	0040      	lsls	r0, r0, #1
 8004768:	eb41 0101 	adc.w	r1, r1, r1
 800476c:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004770:	bf08      	it	eq
 8004772:	3c01      	subeq	r4, #1
 8004774:	d0f7      	beq.n	8004766 <__aeabi_dmul+0x1a6>
 8004776:	ea41 0106 	orr.w	r1, r1, r6
 800477a:	f095 0f00 	teq	r5, #0
 800477e:	bf18      	it	ne
 8004780:	4770      	bxne	lr
 8004782:	f003 4600 	and.w	r6, r3, #2147483648	; 0x80000000
 8004786:	0052      	lsls	r2, r2, #1
 8004788:	eb43 0303 	adc.w	r3, r3, r3
 800478c:	f413 1f80 	tst.w	r3, #1048576	; 0x100000
 8004790:	bf08      	it	eq
 8004792:	3d01      	subeq	r5, #1
 8004794:	d0f7      	beq.n	8004786 <__aeabi_dmul+0x1c6>
 8004796:	ea43 0306 	orr.w	r3, r3, r6
 800479a:	4770      	bx	lr
 800479c:	ea94 0f0c 	teq	r4, ip
 80047a0:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 80047a4:	bf18      	it	ne
 80047a6:	ea95 0f0c 	teqne	r5, ip
 80047aa:	d00c      	beq.n	80047c6 <__aeabi_dmul+0x206>
 80047ac:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80047b0:	bf18      	it	ne
 80047b2:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80047b6:	d1d1      	bne.n	800475c <__aeabi_dmul+0x19c>
 80047b8:	ea81 0103 	eor.w	r1, r1, r3
 80047bc:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047c0:	f04f 0000 	mov.w	r0, #0
 80047c4:	bd70      	pop	{r4, r5, r6, pc}
 80047c6:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80047ca:	bf06      	itte	eq
 80047cc:	4610      	moveq	r0, r2
 80047ce:	4619      	moveq	r1, r3
 80047d0:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80047d4:	d019      	beq.n	800480a <__aeabi_dmul+0x24a>
 80047d6:	ea94 0f0c 	teq	r4, ip
 80047da:	d102      	bne.n	80047e2 <__aeabi_dmul+0x222>
 80047dc:	ea50 3601 	orrs.w	r6, r0, r1, lsl #12
 80047e0:	d113      	bne.n	800480a <__aeabi_dmul+0x24a>
 80047e2:	ea95 0f0c 	teq	r5, ip
 80047e6:	d105      	bne.n	80047f4 <__aeabi_dmul+0x234>
 80047e8:	ea52 3603 	orrs.w	r6, r2, r3, lsl #12
 80047ec:	bf1c      	itt	ne
 80047ee:	4610      	movne	r0, r2
 80047f0:	4619      	movne	r1, r3
 80047f2:	d10a      	bne.n	800480a <__aeabi_dmul+0x24a>
 80047f4:	ea81 0103 	eor.w	r1, r1, r3
 80047f8:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047fc:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 8004800:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 8004804:	f04f 0000 	mov.w	r0, #0
 8004808:	bd70      	pop	{r4, r5, r6, pc}
 800480a:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 800480e:	f441 0178 	orr.w	r1, r1, #16252928	; 0xf80000
 8004812:	bd70      	pop	{r4, r5, r6, pc}

08004814 <__aeabi_ddiv>:
 8004814:	b570      	push	{r4, r5, r6, lr}
 8004816:	f04f 0cff 	mov.w	ip, #255	; 0xff
 800481a:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 800481e:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 8004822:	bf1d      	ittte	ne
 8004824:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 8004828:	ea94 0f0c 	teqne	r4, ip
 800482c:	ea95 0f0c 	teqne	r5, ip
 8004830:	f000 f8a7 	bleq	8004982 <__aeabi_ddiv+0x16e>
 8004834:	eba4 0405 	sub.w	r4, r4, r5
 8004838:	ea81 0e03 	eor.w	lr, r1, r3
 800483c:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 8004840:	ea4f 3101 	mov.w	r1, r1, lsl #12
 8004844:	f000 8088 	beq.w	8004958 <__aeabi_ddiv+0x144>
 8004848:	ea4f 3303 	mov.w	r3, r3, lsl #12
 800484c:	f04f 5580 	mov.w	r5, #268435456	; 0x10000000
 8004850:	ea45 1313 	orr.w	r3, r5, r3, lsr #4
 8004854:	ea43 6312 	orr.w	r3, r3, r2, lsr #24
 8004858:	ea4f 2202 	mov.w	r2, r2, lsl #8
 800485c:	ea45 1511 	orr.w	r5, r5, r1, lsr #4
 8004860:	ea45 6510 	orr.w	r5, r5, r0, lsr #24
 8004864:	ea4f 2600 	mov.w	r6, r0, lsl #8
 8004868:	f00e 4100 	and.w	r1, lr, #2147483648	; 0x80000000
 800486c:	429d      	cmp	r5, r3
 800486e:	bf08      	it	eq
 8004870:	4296      	cmpeq	r6, r2
 8004872:	f144 04fd 	adc.w	r4, r4, #253	; 0xfd
 8004876:	f504 7440 	add.w	r4, r4, #768	; 0x300
 800487a:	d202      	bcs.n	8004882 <__aeabi_ddiv+0x6e>
 800487c:	085b      	lsrs	r3, r3, #1
 800487e:	ea4f 0232 	mov.w	r2, r2, rrx
 8004882:	1ab6      	subs	r6, r6, r2
 8004884:	eb65 0503 	sbc.w	r5, r5, r3
 8004888:	085b      	lsrs	r3, r3, #1
 800488a:	ea4f 0232 	mov.w	r2, r2, rrx
 800488e:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
 8004892:	f44f 2c00 	mov.w	ip, #524288	; 0x80000
 8004896:	ebb6 0e02 	subs.w	lr, r6, r2
 800489a:	eb75 0e03 	sbcs.w	lr, r5, r3
 800489e:	bf22      	ittt	cs
 80048a0:	1ab6      	subcs	r6, r6, r2
 80048a2:	4675      	movcs	r5, lr
 80048a4:	ea40 000c 	orrcs.w	r0, r0, ip
 80048a8:	085b      	lsrs	r3, r3, #1
 80048aa:	ea4f 0232 	mov.w	r2, r2, rrx
 80048ae:	ebb6 0e02 	subs.w	lr, r6, r2
 80048b2:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048b6:	bf22      	ittt	cs
 80048b8:	1ab6      	subcs	r6, r6, r2
 80048ba:	4675      	movcs	r5, lr
 80048bc:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
 80048c0:	085b      	lsrs	r3, r3, #1
 80048c2:	ea4f 0232 	mov.w	r2, r2, rrx
 80048c6:	ebb6 0e02 	subs.w	lr, r6, r2
 80048ca:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048ce:	bf22      	ittt	cs
 80048d0:	1ab6      	subcs	r6, r6, r2
 80048d2:	4675      	movcs	r5, lr
 80048d4:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
 80048d8:	085b      	lsrs	r3, r3, #1
 80048da:	ea4f 0232 	mov.w	r2, r2, rrx
 80048de:	ebb6 0e02 	subs.w	lr, r6, r2
 80048e2:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048e6:	bf22      	ittt	cs
 80048e8:	1ab6      	subcs	r6, r6, r2
 80048ea:	4675      	movcs	r5, lr
 80048ec:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
 80048f0:	ea55 0e06 	orrs.w	lr, r5, r6
 80048f4:	d018      	beq.n	8004928 <__aeabi_ddiv+0x114>
 80048f6:	ea4f 1505 	mov.w	r5, r5, lsl #4
 80048fa:	ea45 7516 	orr.w	r5, r5, r6, lsr #28
 80048fe:	ea4f 1606 	mov.w	r6, r6, lsl #4
 8004902:	ea4f 03c3 	mov.w	r3, r3, lsl #3
 8004906:	ea43 7352 	orr.w	r3, r3, r2, lsr #29
 800490a:	ea4f 02c2 	mov.w	r2, r2, lsl #3
 800490e:	ea5f 1c1c 	movs.w	ip, ip, lsr #4
 8004912:	d1c0      	bne.n	8004896 <__aeabi_ddiv+0x82>
 8004914:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004918:	d10b      	bne.n	8004932 <__aeabi_ddiv+0x11e>
 800491a:	ea41 0100 	orr.w	r1, r1, r0
 800491e:	f04f 0000 	mov.w	r0, #0
 8004922:	f04f 4c00 	mov.w	ip, #2147483648	; 0x80000000
 8004926:	e7b6      	b.n	8004896 <__aeabi_ddiv+0x82>
 8004928:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 800492c:	bf04      	itt	eq
 800492e:	4301      	orreq	r1, r0
 8004930:	2000      	moveq	r0, #0
 8004932:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 8004936:	bf88      	it	hi
 8004938:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 800493c:	f63f aeaf 	bhi.w	800469e <__aeabi_dmul+0xde>
 8004940:	ebb5 0c03 	subs.w	ip, r5, r3
 8004944:	bf04      	itt	eq
 8004946:	ebb6 0c02 	subseq.w	ip, r6, r2
 800494a:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 800494e:	f150 0000 	adcs.w	r0, r0, #0
 8004952:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 8004956:	bd70      	pop	{r4, r5, r6, pc}
 8004958:	f00e 4e00 	and.w	lr, lr, #2147483648	; 0x80000000
 800495c:	ea4e 3111 	orr.w	r1, lr, r1, lsr #12
 8004960:	eb14 045c 	adds.w	r4, r4, ip, lsr #1
 8004964:	bfc2      	ittt	gt
 8004966:	ebd4 050c 	rsbsgt	r5, r4, ip
 800496a:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 800496e:	bd70      	popgt	{r4, r5, r6, pc}
 8004970:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004974:	f04f 0e00 	mov.w	lr, #0
 8004978:	3c01      	subs	r4, #1
 800497a:	e690      	b.n	800469e <__aeabi_dmul+0xde>
 800497c:	ea45 0e06 	orr.w	lr, r5, r6
 8004980:	e68d      	b.n	800469e <__aeabi_dmul+0xde>
 8004982:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 8004986:	ea94 0f0c 	teq	r4, ip
 800498a:	bf08      	it	eq
 800498c:	ea95 0f0c 	teqeq	r5, ip
 8004990:	f43f af3b 	beq.w	800480a <__aeabi_dmul+0x24a>
 8004994:	ea94 0f0c 	teq	r4, ip
 8004998:	d10a      	bne.n	80049b0 <__aeabi_ddiv+0x19c>
 800499a:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 800499e:	f47f af34 	bne.w	800480a <__aeabi_dmul+0x24a>
 80049a2:	ea95 0f0c 	teq	r5, ip
 80049a6:	f47f af25 	bne.w	80047f4 <__aeabi_dmul+0x234>
 80049aa:	4610      	mov	r0, r2
 80049ac:	4619      	mov	r1, r3
 80049ae:	e72c      	b.n	800480a <__aeabi_dmul+0x24a>
 80049b0:	ea95 0f0c 	teq	r5, ip
 80049b4:	d106      	bne.n	80049c4 <__aeabi_ddiv+0x1b0>
 80049b6:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 80049ba:	f43f aefd 	beq.w	80047b8 <__aeabi_dmul+0x1f8>
 80049be:	4610      	mov	r0, r2
 80049c0:	4619      	mov	r1, r3
 80049c2:	e722      	b.n	800480a <__aeabi_dmul+0x24a>
 80049c4:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80049c8:	bf18      	it	ne
 80049ca:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80049ce:	f47f aec5 	bne.w	800475c <__aeabi_dmul+0x19c>
 80049d2:	ea50 0441 	orrs.w	r4, r0, r1, lsl #1
 80049d6:	f47f af0d 	bne.w	80047f4 <__aeabi_dmul+0x234>
 80049da:	ea52 0543 	orrs.w	r5, r2, r3, lsl #1
 80049de:	f47f aeeb 	bne.w	80047b8 <__aeabi_dmul+0x1f8>
 80049e2:	e712      	b.n	800480a <__aeabi_dmul+0x24a>

080049e4 <__gedf2>:
 80049e4:	f04f 3cff 	mov.w	ip, #4294967295
 80049e8:	e006      	b.n	80049f8 <__cmpdf2+0x4>
 80049ea:	bf00      	nop

080049ec <__ledf2>:
 80049ec:	f04f 0c01 	mov.w	ip, #1
 80049f0:	e002      	b.n	80049f8 <__cmpdf2+0x4>
 80049f2:	bf00      	nop

080049f4 <__cmpdf2>:
 80049f4:	f04f 0c01 	mov.w	ip, #1
 80049f8:	f84d cd04 	str.w	ip, [sp, #-4]!
 80049fc:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004a00:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a04:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004a08:	bf18      	it	ne
 8004a0a:	ea7f 5c6c 	mvnsne.w	ip, ip, asr #21
 8004a0e:	d01b      	beq.n	8004a48 <__cmpdf2+0x54>
 8004a10:	b001      	add	sp, #4
 8004a12:	ea50 0c41 	orrs.w	ip, r0, r1, lsl #1
 8004a16:	bf0c      	ite	eq
 8004a18:	ea52 0c43 	orrseq.w	ip, r2, r3, lsl #1
 8004a1c:	ea91 0f03 	teqne	r1, r3
 8004a20:	bf02      	ittt	eq
 8004a22:	ea90 0f02 	teqeq	r0, r2
 8004a26:	2000      	moveq	r0, #0
 8004a28:	4770      	bxeq	lr
 8004a2a:	f110 0f00 	cmn.w	r0, #0
 8004a2e:	ea91 0f03 	teq	r1, r3
 8004a32:	bf58      	it	pl
 8004a34:	4299      	cmppl	r1, r3
 8004a36:	bf08      	it	eq
 8004a38:	4290      	cmpeq	r0, r2
 8004a3a:	bf2c      	ite	cs
 8004a3c:	17d8      	asrcs	r0, r3, #31
 8004a3e:	ea6f 70e3 	mvncc.w	r0, r3, asr #31
 8004a42:	f040 0001 	orr.w	r0, r0, #1
 8004a46:	4770      	bx	lr
 8004a48:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004a4c:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a50:	d102      	bne.n	8004a58 <__cmpdf2+0x64>
 8004a52:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004a56:	d107      	bne.n	8004a68 <__cmpdf2+0x74>
 8004a58:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004a5c:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a60:	d1d6      	bne.n	8004a10 <__cmpdf2+0x1c>
 8004a62:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004a66:	d0d3      	beq.n	8004a10 <__cmpdf2+0x1c>
 8004a68:	f85d 0b04 	ldr.w	r0, [sp], #4
 8004a6c:	4770      	bx	lr
 8004a6e:	bf00      	nop

08004a70 <__aeabi_cdrcmple>:
 8004a70:	4684      	mov	ip, r0
 8004a72:	4610      	mov	r0, r2
 8004a74:	4662      	mov	r2, ip
 8004a76:	468c      	mov	ip, r1
 8004a78:	4619      	mov	r1, r3
 8004a7a:	4663      	mov	r3, ip
 8004a7c:	e000      	b.n	8004a80 <__aeabi_cdcmpeq>
 8004a7e:	bf00      	nop

08004a80 <__aeabi_cdcmpeq>:
 8004a80:	b501      	push	{r0, lr}
 8004a82:	f7ff ffb7 	bl	80049f4 <__cmpdf2>
 8004a86:	2800      	cmp	r0, #0
 8004a88:	bf48      	it	mi
 8004a8a:	f110 0f00 	cmnmi.w	r0, #0
 8004a8e:	bd01      	pop	{r0, pc}

08004a90 <__aeabi_dcmpeq>:
 8004a90:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004a94:	f7ff fff4 	bl	8004a80 <__aeabi_cdcmpeq>
 8004a98:	bf0c      	ite	eq
 8004a9a:	2001      	moveq	r0, #1
 8004a9c:	2000      	movne	r0, #0
 8004a9e:	f85d fb08 	ldr.w	pc, [sp], #8
 8004aa2:	bf00      	nop

08004aa4 <__aeabi_dcmplt>:
 8004aa4:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004aa8:	f7ff ffea 	bl	8004a80 <__aeabi_cdcmpeq>
 8004aac:	bf34      	ite	cc
 8004aae:	2001      	movcc	r0, #1
 8004ab0:	2000      	movcs	r0, #0
 8004ab2:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ab6:	bf00      	nop

08004ab8 <__aeabi_dcmple>:
 8004ab8:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004abc:	f7ff ffe0 	bl	8004a80 <__aeabi_cdcmpeq>
 8004ac0:	bf94      	ite	ls
 8004ac2:	2001      	movls	r0, #1
 8004ac4:	2000      	movhi	r0, #0
 8004ac6:	f85d fb08 	ldr.w	pc, [sp], #8
 8004aca:	bf00      	nop

08004acc <__aeabi_dcmpge>:
 8004acc:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004ad0:	f7ff ffce 	bl	8004a70 <__aeabi_cdrcmple>
 8004ad4:	bf94      	ite	ls
 8004ad6:	2001      	movls	r0, #1
 8004ad8:	2000      	movhi	r0, #0
 8004ada:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ade:	bf00      	nop

08004ae0 <__aeabi_dcmpgt>:
 8004ae0:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004ae4:	f7ff ffc4 	bl	8004a70 <__aeabi_cdrcmple>
 8004ae8:	bf34      	ite	cc
 8004aea:	2001      	movcc	r0, #1
 8004aec:	2000      	movcs	r0, #0
 8004aee:	f85d fb08 	ldr.w	pc, [sp], #8
 8004af2:	bf00      	nop

08004af4 <__aeabi_dcmpun>:
 8004af4:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004af8:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004afc:	d102      	bne.n	8004b04 <__aeabi_dcmpun+0x10>
 8004afe:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004b02:	d10a      	bne.n	8004b1a <__aeabi_dcmpun+0x26>
 8004b04:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004b08:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004b0c:	d102      	bne.n	8004b14 <__aeabi_dcmpun+0x20>
 8004b0e:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004b12:	d102      	bne.n	8004b1a <__aeabi_dcmpun+0x26>
 8004b14:	f04f 0000 	mov.w	r0, #0
 8004b18:	4770      	bx	lr
 8004b1a:	f04f 0001 	mov.w	r0, #1
 8004b1e:	4770      	bx	lr

08004b20 <__aeabi_d2iz>:
 8004b20:	ea4f 0241 	mov.w	r2, r1, lsl #1
 8004b24:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
 8004b28:	d215      	bcs.n	8004b56 <__aeabi_d2iz+0x36>
 8004b2a:	d511      	bpl.n	8004b50 <__aeabi_d2iz+0x30>
 8004b2c:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
 8004b30:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
 8004b34:	d912      	bls.n	8004b5c <__aeabi_d2iz+0x3c>
 8004b36:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004b3a:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8004b3e:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
 8004b42:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 8004b46:	fa23 f002 	lsr.w	r0, r3, r2
 8004b4a:	bf18      	it	ne
 8004b4c:	4240      	negne	r0, r0
 8004b4e:	4770      	bx	lr
 8004b50:	f04f 0000 	mov.w	r0, #0
 8004b54:	4770      	bx	lr
 8004b56:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
 8004b5a:	d105      	bne.n	8004b68 <__aeabi_d2iz+0x48>
 8004b5c:	f011 4000 	ands.w	r0, r1, #2147483648	; 0x80000000
 8004b60:	bf08      	it	eq
 8004b62:	f06f 4000 	mvneq.w	r0, #2147483648	; 0x80000000
 8004b66:	4770      	bx	lr
 8004b68:	f04f 0000 	mov.w	r0, #0
 8004b6c:	4770      	bx	lr
 8004b6e:	bf00      	nop

08004b70 <__aeabi_d2uiz>:
 8004b70:	004a      	lsls	r2, r1, #1
 8004b72:	d211      	bcs.n	8004b98 <__aeabi_d2uiz+0x28>
 8004b74:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
 8004b78:	d211      	bcs.n	8004b9e <__aeabi_d2uiz+0x2e>
 8004b7a:	d50d      	bpl.n	8004b98 <__aeabi_d2uiz+0x28>
 8004b7c:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
 8004b80:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
 8004b84:	d40e      	bmi.n	8004ba4 <__aeabi_d2uiz+0x34>
 8004b86:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004b8a:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8004b8e:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
 8004b92:	fa23 f002 	lsr.w	r0, r3, r2
 8004b96:	4770      	bx	lr
 8004b98:	f04f 0000 	mov.w	r0, #0
 8004b9c:	4770      	bx	lr
 8004b9e:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
 8004ba2:	d102      	bne.n	8004baa <__aeabi_d2uiz+0x3a>
 8004ba4:	f04f 30ff 	mov.w	r0, #4294967295
 8004ba8:	4770      	bx	lr
 8004baa:	f04f 0000 	mov.w	r0, #0
 8004bae:	4770      	bx	lr

08004bb0 <__aeabi_d2f>:
 8004bb0:	ea4f 0241 	mov.w	r2, r1, lsl #1
 8004bb4:	f1b2 43e0 	subs.w	r3, r2, #1879048192	; 0x70000000
 8004bb8:	bf24      	itt	cs
 8004bba:	f5b3 1c00 	subscs.w	ip, r3, #2097152	; 0x200000
 8004bbe:	f1dc 5cfe 	rsbscs	ip, ip, #532676608	; 0x1fc00000
 8004bc2:	d90d      	bls.n	8004be0 <__aeabi_d2f+0x30>
 8004bc4:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 8004bc8:	ea4f 02c0 	mov.w	r2, r0, lsl #3
 8004bcc:	ea4c 7050 	orr.w	r0, ip, r0, lsr #29
 8004bd0:	f1b2 4f00 	cmp.w	r2, #2147483648	; 0x80000000
 8004bd4:	eb40 0083 	adc.w	r0, r0, r3, lsl #2
 8004bd8:	bf08      	it	eq
 8004bda:	f020 0001 	biceq.w	r0, r0, #1
 8004bde:	4770      	bx	lr
 8004be0:	f011 4f80 	tst.w	r1, #1073741824	; 0x40000000
 8004be4:	d121      	bne.n	8004c2a <__aeabi_d2f+0x7a>
 8004be6:	f113 7238 	adds.w	r2, r3, #48234496	; 0x2e00000
 8004bea:	bfbc      	itt	lt
 8004bec:	f001 4000 	andlt.w	r0, r1, #2147483648	; 0x80000000
 8004bf0:	4770      	bxlt	lr
 8004bf2:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004bf6:	ea4f 5252 	mov.w	r2, r2, lsr #21
 8004bfa:	f1c2 0218 	rsb	r2, r2, #24
 8004bfe:	f1c2 0c20 	rsb	ip, r2, #32
 8004c02:	fa10 f30c 	lsls.w	r3, r0, ip
 8004c06:	fa20 f002 	lsr.w	r0, r0, r2
 8004c0a:	bf18      	it	ne
 8004c0c:	f040 0001 	orrne.w	r0, r0, #1
 8004c10:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004c14:	ea4f 23d3 	mov.w	r3, r3, lsr #11
 8004c18:	fa03 fc0c 	lsl.w	ip, r3, ip
 8004c1c:	ea40 000c 	orr.w	r0, r0, ip
 8004c20:	fa23 f302 	lsr.w	r3, r3, r2
 8004c24:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8004c28:	e7cc      	b.n	8004bc4 <__aeabi_d2f+0x14>
 8004c2a:	ea7f 5362 	mvns.w	r3, r2, asr #21
 8004c2e:	d107      	bne.n	8004c40 <__aeabi_d2f+0x90>
 8004c30:	ea50 3301 	orrs.w	r3, r0, r1, lsl #12
 8004c34:	bf1e      	ittt	ne
 8004c36:	f04f 40fe 	movne.w	r0, #2130706432	; 0x7f000000
 8004c3a:	f440 0040 	orrne.w	r0, r0, #12582912	; 0xc00000
 8004c3e:	4770      	bxne	lr
 8004c40:	f001 4000 	and.w	r0, r1, #2147483648	; 0x80000000
 8004c44:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004c48:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004c4c:	4770      	bx	lr
 8004c4e:	bf00      	nop

08004c50 <__aeabi_frsub>:
 8004c50:	f080 4000 	eor.w	r0, r0, #2147483648	; 0x80000000
 8004c54:	e002      	b.n	8004c5c <__addsf3>
 8004c56:	bf00      	nop

08004c58 <__aeabi_fsub>:
 8004c58:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000

08004c5c <__addsf3>:
 8004c5c:	0042      	lsls	r2, r0, #1
 8004c5e:	bf1f      	itttt	ne
 8004c60:	ea5f 0341 	movsne.w	r3, r1, lsl #1
 8004c64:	ea92 0f03 	teqne	r2, r3
 8004c68:	ea7f 6c22 	mvnsne.w	ip, r2, asr #24
 8004c6c:	ea7f 6c23 	mvnsne.w	ip, r3, asr #24
 8004c70:	d06a      	beq.n	8004d48 <__addsf3+0xec>
 8004c72:	ea4f 6212 	mov.w	r2, r2, lsr #24
 8004c76:	ebd2 6313 	rsbs	r3, r2, r3, lsr #24
 8004c7a:	bfc1      	itttt	gt
 8004c7c:	18d2      	addgt	r2, r2, r3
 8004c7e:	4041      	eorgt	r1, r0
 8004c80:	4048      	eorgt	r0, r1
 8004c82:	4041      	eorgt	r1, r0
 8004c84:	bfb8      	it	lt
 8004c86:	425b      	neglt	r3, r3
 8004c88:	2b19      	cmp	r3, #25
 8004c8a:	bf88      	it	hi
 8004c8c:	4770      	bxhi	lr
 8004c8e:	f010 4f00 	tst.w	r0, #2147483648	; 0x80000000
 8004c92:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004c96:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
 8004c9a:	bf18      	it	ne
 8004c9c:	4240      	negne	r0, r0
 8004c9e:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 8004ca2:	f441 0100 	orr.w	r1, r1, #8388608	; 0x800000
 8004ca6:	f021 417f 	bic.w	r1, r1, #4278190080	; 0xff000000
 8004caa:	bf18      	it	ne
 8004cac:	4249      	negne	r1, r1
 8004cae:	ea92 0f03 	teq	r2, r3
 8004cb2:	d03f      	beq.n	8004d34 <__addsf3+0xd8>
 8004cb4:	f1a2 0201 	sub.w	r2, r2, #1
 8004cb8:	fa41 fc03 	asr.w	ip, r1, r3
 8004cbc:	eb10 000c 	adds.w	r0, r0, ip
 8004cc0:	f1c3 0320 	rsb	r3, r3, #32
 8004cc4:	fa01 f103 	lsl.w	r1, r1, r3
 8004cc8:	f000 4300 	and.w	r3, r0, #2147483648	; 0x80000000
 8004ccc:	d502      	bpl.n	8004cd4 <__addsf3+0x78>
 8004cce:	4249      	negs	r1, r1
 8004cd0:	eb60 0040 	sbc.w	r0, r0, r0, lsl #1
 8004cd4:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
 8004cd8:	d313      	bcc.n	8004d02 <__addsf3+0xa6>
 8004cda:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8004cde:	d306      	bcc.n	8004cee <__addsf3+0x92>
 8004ce0:	0840      	lsrs	r0, r0, #1
 8004ce2:	ea4f 0131 	mov.w	r1, r1, rrx
 8004ce6:	f102 0201 	add.w	r2, r2, #1
 8004cea:	2afe      	cmp	r2, #254	; 0xfe
 8004cec:	d251      	bcs.n	8004d92 <__addsf3+0x136>
 8004cee:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
 8004cf2:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8004cf6:	bf08      	it	eq
 8004cf8:	f020 0001 	biceq.w	r0, r0, #1
 8004cfc:	ea40 0003 	orr.w	r0, r0, r3
 8004d00:	4770      	bx	lr
 8004d02:	0049      	lsls	r1, r1, #1
 8004d04:	eb40 0000 	adc.w	r0, r0, r0
 8004d08:	f410 0f00 	tst.w	r0, #8388608	; 0x800000
 8004d0c:	f1a2 0201 	sub.w	r2, r2, #1
 8004d10:	d1ed      	bne.n	8004cee <__addsf3+0x92>
 8004d12:	fab0 fc80 	clz	ip, r0
 8004d16:	f1ac 0c08 	sub.w	ip, ip, #8
 8004d1a:	ebb2 020c 	subs.w	r2, r2, ip
 8004d1e:	fa00 f00c 	lsl.w	r0, r0, ip
 8004d22:	bfaa      	itet	ge
 8004d24:	eb00 50c2 	addge.w	r0, r0, r2, lsl #23
 8004d28:	4252      	neglt	r2, r2
 8004d2a:	4318      	orrge	r0, r3
 8004d2c:	bfbc      	itt	lt
 8004d2e:	40d0      	lsrlt	r0, r2
 8004d30:	4318      	orrlt	r0, r3
 8004d32:	4770      	bx	lr
 8004d34:	f092 0f00 	teq	r2, #0
 8004d38:	f481 0100 	eor.w	r1, r1, #8388608	; 0x800000
 8004d3c:	bf06      	itte	eq
 8004d3e:	f480 0000 	eoreq.w	r0, r0, #8388608	; 0x800000
 8004d42:	3201      	addeq	r2, #1
 8004d44:	3b01      	subne	r3, #1
 8004d46:	e7b5      	b.n	8004cb4 <__addsf3+0x58>
 8004d48:	ea4f 0341 	mov.w	r3, r1, lsl #1
 8004d4c:	ea7f 6c22 	mvns.w	ip, r2, asr #24
 8004d50:	bf18      	it	ne
 8004d52:	ea7f 6c23 	mvnsne.w	ip, r3, asr #24
 8004d56:	d021      	beq.n	8004d9c <__addsf3+0x140>
 8004d58:	ea92 0f03 	teq	r2, r3
 8004d5c:	d004      	beq.n	8004d68 <__addsf3+0x10c>
 8004d5e:	f092 0f00 	teq	r2, #0
 8004d62:	bf08      	it	eq
 8004d64:	4608      	moveq	r0, r1
 8004d66:	4770      	bx	lr
 8004d68:	ea90 0f01 	teq	r0, r1
 8004d6c:	bf1c      	itt	ne
 8004d6e:	2000      	movne	r0, #0
 8004d70:	4770      	bxne	lr
 8004d72:	f012 4f7f 	tst.w	r2, #4278190080	; 0xff000000
 8004d76:	d104      	bne.n	8004d82 <__addsf3+0x126>
 8004d78:	0040      	lsls	r0, r0, #1
 8004d7a:	bf28      	it	cs
 8004d7c:	f040 4000 	orrcs.w	r0, r0, #2147483648	; 0x80000000
 8004d80:	4770      	bx	lr
 8004d82:	f112 7200 	adds.w	r2, r2, #33554432	; 0x2000000
 8004d86:	bf3c      	itt	cc
 8004d88:	f500 0000 	addcc.w	r0, r0, #8388608	; 0x800000
 8004d8c:	4770      	bxcc	lr
 8004d8e:	f000 4300 	and.w	r3, r0, #2147483648	; 0x80000000
 8004d92:	f043 40fe 	orr.w	r0, r3, #2130706432	; 0x7f000000
 8004d96:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004d9a:	4770      	bx	lr
 8004d9c:	ea7f 6222 	mvns.w	r2, r2, asr #24
 8004da0:	bf16      	itet	ne
 8004da2:	4608      	movne	r0, r1
 8004da4:	ea7f 6323 	mvnseq.w	r3, r3, asr #24
 8004da8:	4601      	movne	r1, r0
 8004daa:	0242      	lsls	r2, r0, #9
 8004dac:	bf06      	itte	eq
 8004dae:	ea5f 2341 	movseq.w	r3, r1, lsl #9
 8004db2:	ea90 0f01 	teqeq	r0, r1
 8004db6:	f440 0080 	orrne.w	r0, r0, #4194304	; 0x400000
 8004dba:	4770      	bx	lr

08004dbc <__aeabi_ui2f>:
 8004dbc:	f04f 0300 	mov.w	r3, #0
 8004dc0:	e004      	b.n	8004dcc <__aeabi_i2f+0x8>
 8004dc2:	bf00      	nop

08004dc4 <__aeabi_i2f>:
 8004dc4:	f010 4300 	ands.w	r3, r0, #2147483648	; 0x80000000
 8004dc8:	bf48      	it	mi
 8004dca:	4240      	negmi	r0, r0
 8004dcc:	ea5f 0c00 	movs.w	ip, r0
 8004dd0:	bf08      	it	eq
 8004dd2:	4770      	bxeq	lr
 8004dd4:	f043 4396 	orr.w	r3, r3, #1258291200	; 0x4b000000
 8004dd8:	4601      	mov	r1, r0
 8004dda:	f04f 0000 	mov.w	r0, #0
 8004dde:	e01c      	b.n	8004e1a <__aeabi_l2f+0x2a>

08004de0 <__aeabi_ul2f>:
 8004de0:	ea50 0201 	orrs.w	r2, r0, r1
 8004de4:	bf08      	it	eq
 8004de6:	4770      	bxeq	lr
 8004de8:	f04f 0300 	mov.w	r3, #0
 8004dec:	e00a      	b.n	8004e04 <__aeabi_l2f+0x14>
 8004dee:	bf00      	nop

08004df0 <__aeabi_l2f>:
 8004df0:	ea50 0201 	orrs.w	r2, r0, r1
 8004df4:	bf08      	it	eq
 8004df6:	4770      	bxeq	lr
 8004df8:	f011 4300 	ands.w	r3, r1, #2147483648	; 0x80000000
 8004dfc:	d502      	bpl.n	8004e04 <__aeabi_l2f+0x14>
 8004dfe:	4240      	negs	r0, r0
 8004e00:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8004e04:	ea5f 0c01 	movs.w	ip, r1
 8004e08:	bf02      	ittt	eq
 8004e0a:	4684      	moveq	ip, r0
 8004e0c:	4601      	moveq	r1, r0
 8004e0e:	2000      	moveq	r0, #0
 8004e10:	f043 43b6 	orr.w	r3, r3, #1526726656	; 0x5b000000
 8004e14:	bf08      	it	eq
 8004e16:	f1a3 5380 	subeq.w	r3, r3, #268435456	; 0x10000000
 8004e1a:	f5a3 0300 	sub.w	r3, r3, #8388608	; 0x800000
 8004e1e:	fabc f28c 	clz	r2, ip
 8004e22:	3a08      	subs	r2, #8
 8004e24:	eba3 53c2 	sub.w	r3, r3, r2, lsl #23
 8004e28:	db10      	blt.n	8004e4c <__aeabi_l2f+0x5c>
 8004e2a:	fa01 fc02 	lsl.w	ip, r1, r2
 8004e2e:	4463      	add	r3, ip
 8004e30:	fa00 fc02 	lsl.w	ip, r0, r2
 8004e34:	f1c2 0220 	rsb	r2, r2, #32
 8004e38:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
 8004e3c:	fa20 f202 	lsr.w	r2, r0, r2
 8004e40:	eb43 0002 	adc.w	r0, r3, r2
 8004e44:	bf08      	it	eq
 8004e46:	f020 0001 	biceq.w	r0, r0, #1
 8004e4a:	4770      	bx	lr
 8004e4c:	f102 0220 	add.w	r2, r2, #32
 8004e50:	fa01 fc02 	lsl.w	ip, r1, r2
 8004e54:	f1c2 0220 	rsb	r2, r2, #32
 8004e58:	ea50 004c 	orrs.w	r0, r0, ip, lsl #1
 8004e5c:	fa21 f202 	lsr.w	r2, r1, r2
 8004e60:	eb43 0002 	adc.w	r0, r3, r2
 8004e64:	bf08      	it	eq
 8004e66:	ea20 70dc 	biceq.w	r0, r0, ip, lsr #31
 8004e6a:	4770      	bx	lr

08004e6c <__aeabi_fmul>:
 8004e6c:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004e70:	ea1c 52d0 	ands.w	r2, ip, r0, lsr #23
 8004e74:	bf1e      	ittt	ne
 8004e76:	ea1c 53d1 	andsne.w	r3, ip, r1, lsr #23
 8004e7a:	ea92 0f0c 	teqne	r2, ip
 8004e7e:	ea93 0f0c 	teqne	r3, ip
 8004e82:	d06f      	beq.n	8004f64 <__aeabi_fmul+0xf8>
 8004e84:	441a      	add	r2, r3
 8004e86:	ea80 0c01 	eor.w	ip, r0, r1
 8004e8a:	0240      	lsls	r0, r0, #9
 8004e8c:	bf18      	it	ne
 8004e8e:	ea5f 2141 	movsne.w	r1, r1, lsl #9
 8004e92:	d01e      	beq.n	8004ed2 <__aeabi_fmul+0x66>
 8004e94:	f04f 6300 	mov.w	r3, #134217728	; 0x8000000
 8004e98:	ea43 1050 	orr.w	r0, r3, r0, lsr #5
 8004e9c:	ea43 1151 	orr.w	r1, r3, r1, lsr #5
 8004ea0:	fba0 3101 	umull	r3, r1, r0, r1
 8004ea4:	f00c 4000 	and.w	r0, ip, #2147483648	; 0x80000000
 8004ea8:	f5b1 0f00 	cmp.w	r1, #8388608	; 0x800000
 8004eac:	bf3e      	ittt	cc
 8004eae:	0049      	lslcc	r1, r1, #1
 8004eb0:	ea41 71d3 	orrcc.w	r1, r1, r3, lsr #31
 8004eb4:	005b      	lslcc	r3, r3, #1
 8004eb6:	ea40 0001 	orr.w	r0, r0, r1
 8004eba:	f162 027f 	sbc.w	r2, r2, #127	; 0x7f
 8004ebe:	2afd      	cmp	r2, #253	; 0xfd
 8004ec0:	d81d      	bhi.n	8004efe <__aeabi_fmul+0x92>
 8004ec2:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
 8004ec6:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8004eca:	bf08      	it	eq
 8004ecc:	f020 0001 	biceq.w	r0, r0, #1
 8004ed0:	4770      	bx	lr
 8004ed2:	f090 0f00 	teq	r0, #0
 8004ed6:	f00c 4c00 	and.w	ip, ip, #2147483648	; 0x80000000
 8004eda:	bf08      	it	eq
 8004edc:	0249      	lsleq	r1, r1, #9
 8004ede:	ea4c 2050 	orr.w	r0, ip, r0, lsr #9
 8004ee2:	ea40 2051 	orr.w	r0, r0, r1, lsr #9
 8004ee6:	3a7f      	subs	r2, #127	; 0x7f
 8004ee8:	bfc2      	ittt	gt
 8004eea:	f1d2 03ff 	rsbsgt	r3, r2, #255	; 0xff
 8004eee:	ea40 50c2 	orrgt.w	r0, r0, r2, lsl #23
 8004ef2:	4770      	bxgt	lr
 8004ef4:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004ef8:	f04f 0300 	mov.w	r3, #0
 8004efc:	3a01      	subs	r2, #1
 8004efe:	dc5d      	bgt.n	8004fbc <__aeabi_fmul+0x150>
 8004f00:	f112 0f19 	cmn.w	r2, #25
 8004f04:	bfdc      	itt	le
 8004f06:	f000 4000 	andle.w	r0, r0, #2147483648	; 0x80000000
 8004f0a:	4770      	bxle	lr
 8004f0c:	f1c2 0200 	rsb	r2, r2, #0
 8004f10:	0041      	lsls	r1, r0, #1
 8004f12:	fa21 f102 	lsr.w	r1, r1, r2
 8004f16:	f1c2 0220 	rsb	r2, r2, #32
 8004f1a:	fa00 fc02 	lsl.w	ip, r0, r2
 8004f1e:	ea5f 0031 	movs.w	r0, r1, rrx
 8004f22:	f140 0000 	adc.w	r0, r0, #0
 8004f26:	ea53 034c 	orrs.w	r3, r3, ip, lsl #1
 8004f2a:	bf08      	it	eq
 8004f2c:	ea20 70dc 	biceq.w	r0, r0, ip, lsr #31
 8004f30:	4770      	bx	lr
 8004f32:	f092 0f00 	teq	r2, #0
 8004f36:	f000 4c00 	and.w	ip, r0, #2147483648	; 0x80000000
 8004f3a:	bf02      	ittt	eq
 8004f3c:	0040      	lsleq	r0, r0, #1
 8004f3e:	f410 0f00 	tsteq.w	r0, #8388608	; 0x800000
 8004f42:	3a01      	subeq	r2, #1
 8004f44:	d0f9      	beq.n	8004f3a <__aeabi_fmul+0xce>
 8004f46:	ea40 000c 	orr.w	r0, r0, ip
 8004f4a:	f093 0f00 	teq	r3, #0
 8004f4e:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 8004f52:	bf02      	ittt	eq
 8004f54:	0049      	lsleq	r1, r1, #1
 8004f56:	f411 0f00 	tsteq.w	r1, #8388608	; 0x800000
 8004f5a:	3b01      	subeq	r3, #1
 8004f5c:	d0f9      	beq.n	8004f52 <__aeabi_fmul+0xe6>
 8004f5e:	ea41 010c 	orr.w	r1, r1, ip
 8004f62:	e78f      	b.n	8004e84 <__aeabi_fmul+0x18>
 8004f64:	ea0c 53d1 	and.w	r3, ip, r1, lsr #23
 8004f68:	ea92 0f0c 	teq	r2, ip
 8004f6c:	bf18      	it	ne
 8004f6e:	ea93 0f0c 	teqne	r3, ip
 8004f72:	d00a      	beq.n	8004f8a <__aeabi_fmul+0x11e>
 8004f74:	f030 4c00 	bics.w	ip, r0, #2147483648	; 0x80000000
 8004f78:	bf18      	it	ne
 8004f7a:	f031 4c00 	bicsne.w	ip, r1, #2147483648	; 0x80000000
 8004f7e:	d1d8      	bne.n	8004f32 <__aeabi_fmul+0xc6>
 8004f80:	ea80 0001 	eor.w	r0, r0, r1
 8004f84:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
 8004f88:	4770      	bx	lr
 8004f8a:	f090 0f00 	teq	r0, #0
 8004f8e:	bf17      	itett	ne
 8004f90:	f090 4f00 	teqne	r0, #2147483648	; 0x80000000
 8004f94:	4608      	moveq	r0, r1
 8004f96:	f091 0f00 	teqne	r1, #0
 8004f9a:	f091 4f00 	teqne	r1, #2147483648	; 0x80000000
 8004f9e:	d014      	beq.n	8004fca <__aeabi_fmul+0x15e>
 8004fa0:	ea92 0f0c 	teq	r2, ip
 8004fa4:	d101      	bne.n	8004faa <__aeabi_fmul+0x13e>
 8004fa6:	0242      	lsls	r2, r0, #9
 8004fa8:	d10f      	bne.n	8004fca <__aeabi_fmul+0x15e>
 8004faa:	ea93 0f0c 	teq	r3, ip
 8004fae:	d103      	bne.n	8004fb8 <__aeabi_fmul+0x14c>
 8004fb0:	024b      	lsls	r3, r1, #9
 8004fb2:	bf18      	it	ne
 8004fb4:	4608      	movne	r0, r1
 8004fb6:	d108      	bne.n	8004fca <__aeabi_fmul+0x15e>
 8004fb8:	ea80 0001 	eor.w	r0, r0, r1
 8004fbc:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
 8004fc0:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004fc4:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004fc8:	4770      	bx	lr
 8004fca:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004fce:	f440 0040 	orr.w	r0, r0, #12582912	; 0xc00000
 8004fd2:	4770      	bx	lr

08004fd4 <__aeabi_fdiv>:
 8004fd4:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004fd8:	ea1c 52d0 	ands.w	r2, ip, r0, lsr #23
 8004fdc:	bf1e      	ittt	ne
 8004fde:	ea1c 53d1 	andsne.w	r3, ip, r1, lsr #23
 8004fe2:	ea92 0f0c 	teqne	r2, ip
 8004fe6:	ea93 0f0c 	teqne	r3, ip
 8004fea:	d069      	beq.n	80050c0 <__aeabi_fdiv+0xec>
 8004fec:	eba2 0203 	sub.w	r2, r2, r3
 8004ff0:	ea80 0c01 	eor.w	ip, r0, r1
 8004ff4:	0249      	lsls	r1, r1, #9
 8004ff6:	ea4f 2040 	mov.w	r0, r0, lsl #9
 8004ffa:	d037      	beq.n	800506c <__aeabi_fdiv+0x98>
 8004ffc:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
 8005000:	ea43 1111 	orr.w	r1, r3, r1, lsr #4
 8005004:	ea43 1310 	orr.w	r3, r3, r0, lsr #4
 8005008:	f00c 4000 	and.w	r0, ip, #2147483648	; 0x80000000
 800500c:	428b      	cmp	r3, r1
 800500e:	bf38      	it	cc
 8005010:	005b      	lslcc	r3, r3, #1
 8005012:	f142 027d 	adc.w	r2, r2, #125	; 0x7d
 8005016:	f44f 0c00 	mov.w	ip, #8388608	; 0x800000
 800501a:	428b      	cmp	r3, r1
 800501c:	bf24      	itt	cs
 800501e:	1a5b      	subcs	r3, r3, r1
 8005020:	ea40 000c 	orrcs.w	r0, r0, ip
 8005024:	ebb3 0f51 	cmp.w	r3, r1, lsr #1
 8005028:	bf24      	itt	cs
 800502a:	eba3 0351 	subcs.w	r3, r3, r1, lsr #1
 800502e:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
 8005032:	ebb3 0f91 	cmp.w	r3, r1, lsr #2
 8005036:	bf24      	itt	cs
 8005038:	eba3 0391 	subcs.w	r3, r3, r1, lsr #2
 800503c:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
 8005040:	ebb3 0fd1 	cmp.w	r3, r1, lsr #3
 8005044:	bf24      	itt	cs
 8005046:	eba3 03d1 	subcs.w	r3, r3, r1, lsr #3
 800504a:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
 800504e:	011b      	lsls	r3, r3, #4
 8005050:	bf18      	it	ne
 8005052:	ea5f 1c1c 	movsne.w	ip, ip, lsr #4
 8005056:	d1e0      	bne.n	800501a <__aeabi_fdiv+0x46>
 8005058:	2afd      	cmp	r2, #253	; 0xfd
 800505a:	f63f af50 	bhi.w	8004efe <__aeabi_fmul+0x92>
 800505e:	428b      	cmp	r3, r1
 8005060:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8005064:	bf08      	it	eq
 8005066:	f020 0001 	biceq.w	r0, r0, #1
 800506a:	4770      	bx	lr
 800506c:	f00c 4c00 	and.w	ip, ip, #2147483648	; 0x80000000
 8005070:	ea4c 2050 	orr.w	r0, ip, r0, lsr #9
 8005074:	327f      	adds	r2, #127	; 0x7f
 8005076:	bfc2      	ittt	gt
 8005078:	f1d2 03ff 	rsbsgt	r3, r2, #255	; 0xff
 800507c:	ea40 50c2 	orrgt.w	r0, r0, r2, lsl #23
 8005080:	4770      	bxgt	lr
 8005082:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8005086:	f04f 0300 	mov.w	r3, #0
 800508a:	3a01      	subs	r2, #1
 800508c:	e737      	b.n	8004efe <__aeabi_fmul+0x92>
 800508e:	f092 0f00 	teq	r2, #0
 8005092:	f000 4c00 	and.w	ip, r0, #2147483648	; 0x80000000
 8005096:	bf02      	ittt	eq
 8005098:	0040      	lsleq	r0, r0, #1
 800509a:	f410 0f00 	tsteq.w	r0, #8388608	; 0x800000
 800509e:	3a01      	subeq	r2, #1
 80050a0:	d0f9      	beq.n	8005096 <__aeabi_fdiv+0xc2>
 80050a2:	ea40 000c 	orr.w	r0, r0, ip
 80050a6:	f093 0f00 	teq	r3, #0
 80050aa:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 80050ae:	bf02      	ittt	eq
 80050b0:	0049      	lsleq	r1, r1, #1
 80050b2:	f411 0f00 	tsteq.w	r1, #8388608	; 0x800000
 80050b6:	3b01      	subeq	r3, #1
 80050b8:	d0f9      	beq.n	80050ae <__aeabi_fdiv+0xda>
 80050ba:	ea41 010c 	orr.w	r1, r1, ip
 80050be:	e795      	b.n	8004fec <__aeabi_fdiv+0x18>
 80050c0:	ea0c 53d1 	and.w	r3, ip, r1, lsr #23
 80050c4:	ea92 0f0c 	teq	r2, ip
 80050c8:	d108      	bne.n	80050dc <__aeabi_fdiv+0x108>
 80050ca:	0242      	lsls	r2, r0, #9
 80050cc:	f47f af7d 	bne.w	8004fca <__aeabi_fmul+0x15e>
 80050d0:	ea93 0f0c 	teq	r3, ip
 80050d4:	f47f af70 	bne.w	8004fb8 <__aeabi_fmul+0x14c>
 80050d8:	4608      	mov	r0, r1
 80050da:	e776      	b.n	8004fca <__aeabi_fmul+0x15e>
 80050dc:	ea93 0f0c 	teq	r3, ip
 80050e0:	d104      	bne.n	80050ec <__aeabi_fdiv+0x118>
 80050e2:	024b      	lsls	r3, r1, #9
 80050e4:	f43f af4c 	beq.w	8004f80 <__aeabi_fmul+0x114>
 80050e8:	4608      	mov	r0, r1
 80050ea:	e76e      	b.n	8004fca <__aeabi_fmul+0x15e>
 80050ec:	f030 4c00 	bics.w	ip, r0, #2147483648	; 0x80000000
 80050f0:	bf18      	it	ne
 80050f2:	f031 4c00 	bicsne.w	ip, r1, #2147483648	; 0x80000000
 80050f6:	d1ca      	bne.n	800508e <__aeabi_fdiv+0xba>
 80050f8:	f030 4200 	bics.w	r2, r0, #2147483648	; 0x80000000
 80050fc:	f47f af5c 	bne.w	8004fb8 <__aeabi_fmul+0x14c>
 8005100:	f031 4300 	bics.w	r3, r1, #2147483648	; 0x80000000
 8005104:	f47f af3c 	bne.w	8004f80 <__aeabi_fmul+0x114>
 8005108:	e75f      	b.n	8004fca <__aeabi_fmul+0x15e>
 800510a:	bf00      	nop

0800510c <__aeabi_f2uiz>:
 800510c:	0042      	lsls	r2, r0, #1
 800510e:	d20e      	bcs.n	800512e <__aeabi_f2uiz+0x22>
 8005110:	f1b2 4ffe 	cmp.w	r2, #2130706432	; 0x7f000000
 8005114:	d30b      	bcc.n	800512e <__aeabi_f2uiz+0x22>
 8005116:	f04f 039e 	mov.w	r3, #158	; 0x9e
 800511a:	ebb3 6212 	subs.w	r2, r3, r2, lsr #24
 800511e:	d409      	bmi.n	8005134 <__aeabi_f2uiz+0x28>
 8005120:	ea4f 2300 	mov.w	r3, r0, lsl #8
 8005124:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8005128:	fa23 f002 	lsr.w	r0, r3, r2
 800512c:	4770      	bx	lr
 800512e:	f04f 0000 	mov.w	r0, #0
 8005132:	4770      	bx	lr
 8005134:	f112 0f61 	cmn.w	r2, #97	; 0x61
 8005138:	d101      	bne.n	800513e <__aeabi_f2uiz+0x32>
 800513a:	0242      	lsls	r2, r0, #9
 800513c:	d102      	bne.n	8005144 <__aeabi_f2uiz+0x38>
 800513e:	f04f 30ff 	mov.w	r0, #4294967295
 8005142:	4770      	bx	lr
 8005144:	f04f 0000 	mov.w	r0, #0
 8005148:	4770      	bx	lr
 800514a:	bf00      	nop

0800514c <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 800514c:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800514e:	4b0e      	ldr	r3, [pc, #56]	; (8005188 <HAL_InitTick+0x3c>)
{
 8005150:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8005152:	7818      	ldrb	r0, [r3, #0]
 8005154:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8005158:	fbb3 f3f0 	udiv	r3, r3, r0
 800515c:	4a0b      	ldr	r2, [pc, #44]	; (800518c <HAL_InitTick+0x40>)
 800515e:	6810      	ldr	r0, [r2, #0]
 8005160:	fbb0 f0f3 	udiv	r0, r0, r3
 8005164:	f000 fb38 	bl	80057d8 <HAL_SYSTICK_Config>
 8005168:	4604      	mov	r4, r0
 800516a:	b958      	cbnz	r0, 8005184 <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 800516c:	2d0f      	cmp	r5, #15
 800516e:	d809      	bhi.n	8005184 <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8005170:	4602      	mov	r2, r0
 8005172:	4629      	mov	r1, r5
 8005174:	f04f 30ff 	mov.w	r0, #4294967295
 8005178:	f000 faee 	bl	8005758 <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 800517c:	4b04      	ldr	r3, [pc, #16]	; (8005190 <HAL_InitTick+0x44>)
 800517e:	4620      	mov	r0, r4
 8005180:	601d      	str	r5, [r3, #0]
 8005182:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 8005184:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 8005186:	bd38      	pop	{r3, r4, r5, pc}
 8005188:	20000000 	.word	0x20000000
 800518c:	20000218 	.word	0x20000218
 8005190:	20000004 	.word	0x20000004

08005194 <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8005194:	4a07      	ldr	r2, [pc, #28]	; (80051b4 <HAL_Init+0x20>)
{
 8005196:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8005198:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800519a:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 800519c:	f043 0310 	orr.w	r3, r3, #16
 80051a0:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 80051a2:	f000 fac7 	bl	8005734 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 80051a6:	2000      	movs	r0, #0
 80051a8:	f7ff ffd0 	bl	800514c <HAL_InitTick>
  HAL_MspInit();
 80051ac:	f003 f8e8 	bl	8008380 <HAL_MspInit>
}
 80051b0:	2000      	movs	r0, #0
 80051b2:	bd08      	pop	{r3, pc}
 80051b4:	40022000 	.word	0x40022000

080051b8 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 80051b8:	4a03      	ldr	r2, [pc, #12]	; (80051c8 <HAL_IncTick+0x10>)
 80051ba:	4b04      	ldr	r3, [pc, #16]	; (80051cc <HAL_IncTick+0x14>)
 80051bc:	6811      	ldr	r1, [r2, #0]
 80051be:	781b      	ldrb	r3, [r3, #0]
 80051c0:	440b      	add	r3, r1
 80051c2:	6013      	str	r3, [r2, #0]
 80051c4:	4770      	bx	lr
 80051c6:	bf00      	nop
 80051c8:	20000478 	.word	0x20000478
 80051cc:	20000000 	.word	0x20000000

080051d0 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80051d0:	4b01      	ldr	r3, [pc, #4]	; (80051d8 <HAL_GetTick+0x8>)
 80051d2:	6818      	ldr	r0, [r3, #0]
}
 80051d4:	4770      	bx	lr
 80051d6:	bf00      	nop
 80051d8:	20000478 	.word	0x20000478

080051dc <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80051dc:	b538      	push	{r3, r4, r5, lr}
 80051de:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80051e0:	f7ff fff6 	bl	80051d0 <HAL_GetTick>
 80051e4:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80051e6:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80051e8:	bf1e      	ittt	ne
 80051ea:	4b04      	ldrne	r3, [pc, #16]	; (80051fc <HAL_Delay+0x20>)
 80051ec:	781b      	ldrbne	r3, [r3, #0]
 80051ee:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80051f0:	f7ff ffee 	bl	80051d0 <HAL_GetTick>
 80051f4:	1b40      	subs	r0, r0, r5
 80051f6:	4284      	cmp	r4, r0
 80051f8:	d8fa      	bhi.n	80051f0 <HAL_Delay+0x14>
  {
  }
}
 80051fa:	bd38      	pop	{r3, r4, r5, pc}
 80051fc:	20000000 	.word	0x20000000

08005200 <HAL_ADC_ConvCpltCallback>:
 8005200:	4770      	bx	lr

08005202 <ADC_DMAConvCplt>:
  * @retval None
  */
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8005202:	6a43      	ldr	r3, [r0, #36]	; 0x24
{
 8005204:	b510      	push	{r4, lr}
 
  /* Update state machine on conversion status if not in error state */
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
 8005206:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8005208:	f012 0f50 	tst.w	r2, #80	; 0x50
 800520c:	d11b      	bne.n	8005246 <ADC_DMAConvCplt+0x44>
  {
    /* Update ADC state machine */
    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
 800520e:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8005210:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8005214:	629a      	str	r2, [r3, #40]	; 0x28
    /* Determine whether any further conversion upcoming on group regular     */
    /* by external trigger, continuous mode or scan sequence on going.        */
    /* Note: On STM32F1 devices, in case of sequencer enabled                 */
    /*       (several ranks selected), end of conversion flag is raised       */
    /*       at the end of the sequence.                                      */
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
 8005216:	681a      	ldr	r2, [r3, #0]
 8005218:	6892      	ldr	r2, [r2, #8]
 800521a:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
 800521e:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
 8005222:	d10c      	bne.n	800523e <ADC_DMAConvCplt+0x3c>
 8005224:	68da      	ldr	r2, [r3, #12]
 8005226:	b952      	cbnz	r2, 800523e <ADC_DMAConvCplt+0x3c>
       (hadc->Init.ContinuousConvMode == DISABLE)   )
    {
      /* Set ADC state */
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);   
 8005228:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 800522a:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 800522e:	629a      	str	r2, [r3, #40]	; 0x28
      
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8005230:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8005232:	04d2      	lsls	r2, r2, #19
      {
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 8005234:	bf5e      	ittt	pl
 8005236:	6a9a      	ldrpl	r2, [r3, #40]	; 0x28
 8005238:	f042 0201 	orrpl.w	r2, r2, #1
 800523c:	629a      	strpl	r2, [r3, #40]	; 0x28
      }
    }
    
    /* Conversion complete callback */
    HAL_ADC_ConvCpltCallback(hadc); 
 800523e:	4618      	mov	r0, r3
 8005240:	f7ff ffde 	bl	8005200 <HAL_ADC_ConvCpltCallback>
 8005244:	bd10      	pop	{r4, pc}
  }
  else
  {
    /* Call DMA error callback */
    hadc->DMA_Handle->XferErrorCallback(hdma);
 8005246:	6a1b      	ldr	r3, [r3, #32]
  }
}
 8005248:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    hadc->DMA_Handle->XferErrorCallback(hdma);
 800524c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 800524e:	4718      	bx	r3

08005250 <HAL_ADC_ConvHalfCpltCallback>:
 8005250:	4770      	bx	lr

08005252 <ADC_DMAHalfConvCplt>:
  * @brief  DMA half transfer complete callback. 
  * @param  hdma: pointer to DMA handle.
  * @retval None
  */
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)   
{
 8005252:	b508      	push	{r3, lr}
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  
  /* Half conversion callback */
  HAL_ADC_ConvHalfCpltCallback(hadc); 
 8005254:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8005256:	f7ff fffb 	bl	8005250 <HAL_ADC_ConvHalfCpltCallback>
 800525a:	bd08      	pop	{r3, pc}

0800525c <HAL_ADC_ErrorCallback>:
{
 800525c:	4770      	bx	lr

0800525e <ADC_DMAError>:
  * @retval None
  */
void ADC_DMAError(DMA_HandleTypeDef *hdma)   
{
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 800525e:	6a40      	ldr	r0, [r0, #36]	; 0x24
{
 8005260:	b508      	push	{r3, lr}
  
  /* Set ADC state */
  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
 8005262:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005264:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8005268:	6283      	str	r3, [r0, #40]	; 0x28
  
  /* Set ADC error code to DMA error */
  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
 800526a:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
 800526c:	f043 0304 	orr.w	r3, r3, #4
 8005270:	62c3      	str	r3, [r0, #44]	; 0x2c
  
  /* Error callback */
  HAL_ADC_ErrorCallback(hadc); 
 8005272:	f7ff fff3 	bl	800525c <HAL_ADC_ErrorCallback>
 8005276:	bd08      	pop	{r3, pc}

08005278 <HAL_ADC_ConfigChannel>:
  __IO uint32_t wait_loop_index = 0U;
 8005278:	2300      	movs	r3, #0
{ 
 800527a:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 800527c:	9301      	str	r3, [sp, #4]
  __HAL_LOCK(hadc);
 800527e:	f890 3024 	ldrb.w	r3, [r0, #36]	; 0x24
 8005282:	2b01      	cmp	r3, #1
 8005284:	d074      	beq.n	8005370 <HAL_ADC_ConfigChannel+0xf8>
 8005286:	2301      	movs	r3, #1
  if (sConfig->Rank < 7U)
 8005288:	684d      	ldr	r5, [r1, #4]
  __HAL_LOCK(hadc);
 800528a:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
  if (sConfig->Rank < 7U)
 800528e:	2d06      	cmp	r5, #6
 8005290:	6802      	ldr	r2, [r0, #0]
 8005292:	ea4f 0385 	mov.w	r3, r5, lsl #2
 8005296:	680c      	ldr	r4, [r1, #0]
 8005298:	d825      	bhi.n	80052e6 <HAL_ADC_ConfigChannel+0x6e>
    MODIFY_REG(hadc->Instance->SQR3                        ,
 800529a:	442b      	add	r3, r5
 800529c:	251f      	movs	r5, #31
 800529e:	6b56      	ldr	r6, [r2, #52]	; 0x34
 80052a0:	3b05      	subs	r3, #5
 80052a2:	409d      	lsls	r5, r3
 80052a4:	ea26 0505 	bic.w	r5, r6, r5
 80052a8:	fa04 f303 	lsl.w	r3, r4, r3
 80052ac:	432b      	orrs	r3, r5
 80052ae:	6353      	str	r3, [r2, #52]	; 0x34
  if (sConfig->Channel >= ADC_CHANNEL_10)
 80052b0:	2c09      	cmp	r4, #9
 80052b2:	ea4f 0344 	mov.w	r3, r4, lsl #1
 80052b6:	688d      	ldr	r5, [r1, #8]
 80052b8:	d92f      	bls.n	800531a <HAL_ADC_ConfigChannel+0xa2>
    MODIFY_REG(hadc->Instance->SMPR1                             ,
 80052ba:	2607      	movs	r6, #7
 80052bc:	4423      	add	r3, r4
 80052be:	68d1      	ldr	r1, [r2, #12]
 80052c0:	3b1e      	subs	r3, #30
 80052c2:	409e      	lsls	r6, r3
 80052c4:	ea21 0106 	bic.w	r1, r1, r6
 80052c8:	fa05 f303 	lsl.w	r3, r5, r3
 80052cc:	430b      	orrs	r3, r1
 80052ce:	60d3      	str	r3, [r2, #12]
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
 80052d0:	f1a4 0310 	sub.w	r3, r4, #16
 80052d4:	2b01      	cmp	r3, #1
 80052d6:	d92b      	bls.n	8005330 <HAL_ADC_ConfigChannel+0xb8>
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 80052d8:	2300      	movs	r3, #0
  __HAL_UNLOCK(hadc);
 80052da:	2200      	movs	r2, #0
 80052dc:	f880 2024 	strb.w	r2, [r0, #36]	; 0x24
}
 80052e0:	4618      	mov	r0, r3
 80052e2:	b002      	add	sp, #8
 80052e4:	bd70      	pop	{r4, r5, r6, pc}
  else if (sConfig->Rank < 13U)
 80052e6:	2d0c      	cmp	r5, #12
 80052e8:	d80b      	bhi.n	8005302 <HAL_ADC_ConfigChannel+0x8a>
    MODIFY_REG(hadc->Instance->SQR2                        ,
 80052ea:	442b      	add	r3, r5
 80052ec:	251f      	movs	r5, #31
 80052ee:	6b16      	ldr	r6, [r2, #48]	; 0x30
 80052f0:	3b23      	subs	r3, #35	; 0x23
 80052f2:	409d      	lsls	r5, r3
 80052f4:	ea26 0505 	bic.w	r5, r6, r5
 80052f8:	fa04 f303 	lsl.w	r3, r4, r3
 80052fc:	432b      	orrs	r3, r5
 80052fe:	6313      	str	r3, [r2, #48]	; 0x30
 8005300:	e7d6      	b.n	80052b0 <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SQR1                        ,
 8005302:	442b      	add	r3, r5
 8005304:	251f      	movs	r5, #31
 8005306:	6ad6      	ldr	r6, [r2, #44]	; 0x2c
 8005308:	3b41      	subs	r3, #65	; 0x41
 800530a:	409d      	lsls	r5, r3
 800530c:	ea26 0505 	bic.w	r5, r6, r5
 8005310:	fa04 f303 	lsl.w	r3, r4, r3
 8005314:	432b      	orrs	r3, r5
 8005316:	62d3      	str	r3, [r2, #44]	; 0x2c
 8005318:	e7ca      	b.n	80052b0 <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SMPR2                             ,
 800531a:	2607      	movs	r6, #7
 800531c:	6911      	ldr	r1, [r2, #16]
 800531e:	4423      	add	r3, r4
 8005320:	409e      	lsls	r6, r3
 8005322:	ea21 0106 	bic.w	r1, r1, r6
 8005326:	fa05 f303 	lsl.w	r3, r5, r3
 800532a:	430b      	orrs	r3, r1
 800532c:	6113      	str	r3, [r2, #16]
 800532e:	e7cf      	b.n	80052d0 <HAL_ADC_ConfigChannel+0x58>
    if (hadc->Instance == ADC1)
 8005330:	4b10      	ldr	r3, [pc, #64]	; (8005374 <HAL_ADC_ConfigChannel+0xfc>)
 8005332:	429a      	cmp	r2, r3
 8005334:	d116      	bne.n	8005364 <HAL_ADC_ConfigChannel+0xec>
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
 8005336:	6893      	ldr	r3, [r2, #8]
 8005338:	021b      	lsls	r3, r3, #8
 800533a:	d4cd      	bmi.n	80052d8 <HAL_ADC_ConfigChannel+0x60>
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 800533c:	6893      	ldr	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 800533e:	2c10      	cmp	r4, #16
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 8005340:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
 8005344:	6093      	str	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 8005346:	d1c7      	bne.n	80052d8 <HAL_ADC_ConfigChannel+0x60>
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
 8005348:	4b0b      	ldr	r3, [pc, #44]	; (8005378 <HAL_ADC_ConfigChannel+0x100>)
 800534a:	4a0c      	ldr	r2, [pc, #48]	; (800537c <HAL_ADC_ConfigChannel+0x104>)
 800534c:	681b      	ldr	r3, [r3, #0]
 800534e:	fbb3 f2f2 	udiv	r2, r3, r2
 8005352:	230a      	movs	r3, #10
 8005354:	4353      	muls	r3, r2
            wait_loop_index--;
 8005356:	9301      	str	r3, [sp, #4]
          while(wait_loop_index != 0U)
 8005358:	9b01      	ldr	r3, [sp, #4]
 800535a:	2b00      	cmp	r3, #0
 800535c:	d0bc      	beq.n	80052d8 <HAL_ADC_ConfigChannel+0x60>
            wait_loop_index--;
 800535e:	9b01      	ldr	r3, [sp, #4]
 8005360:	3b01      	subs	r3, #1
 8005362:	e7f8      	b.n	8005356 <HAL_ADC_ConfigChannel+0xde>
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 8005364:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005366:	f043 0320 	orr.w	r3, r3, #32
 800536a:	6283      	str	r3, [r0, #40]	; 0x28
      tmp_hal_status = HAL_ERROR;
 800536c:	2301      	movs	r3, #1
 800536e:	e7b4      	b.n	80052da <HAL_ADC_ConfigChannel+0x62>
  __HAL_LOCK(hadc);
 8005370:	2302      	movs	r3, #2
 8005372:	e7b5      	b.n	80052e0 <HAL_ADC_ConfigChannel+0x68>
 8005374:	40012400 	.word	0x40012400
 8005378:	20000218 	.word	0x20000218
 800537c:	000f4240 	.word	0x000f4240

08005380 <ADC_Enable>:
  __IO uint32_t wait_loop_index = 0U;
 8005380:	2300      	movs	r3, #0
{
 8005382:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 8005384:	9301      	str	r3, [sp, #4]
  if (ADC_IS_ENABLE(hadc) == RESET)
 8005386:	6803      	ldr	r3, [r0, #0]
{
 8005388:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) == RESET)
 800538a:	689a      	ldr	r2, [r3, #8]
 800538c:	07d2      	lsls	r2, r2, #31
 800538e:	d502      	bpl.n	8005396 <ADC_Enable+0x16>
  return HAL_OK;
 8005390:	2000      	movs	r0, #0
}
 8005392:	b002      	add	sp, #8
 8005394:	bd70      	pop	{r4, r5, r6, pc}
    __HAL_ADC_ENABLE(hadc);
 8005396:	689a      	ldr	r2, [r3, #8]
 8005398:	f042 0201 	orr.w	r2, r2, #1
 800539c:	609a      	str	r2, [r3, #8]
    wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
 800539e:	4b12      	ldr	r3, [pc, #72]	; (80053e8 <ADC_Enable+0x68>)
 80053a0:	4a12      	ldr	r2, [pc, #72]	; (80053ec <ADC_Enable+0x6c>)
 80053a2:	681b      	ldr	r3, [r3, #0]
 80053a4:	fbb3 f3f2 	udiv	r3, r3, r2
      wait_loop_index--;
 80053a8:	9301      	str	r3, [sp, #4]
    while(wait_loop_index != 0U)
 80053aa:	9b01      	ldr	r3, [sp, #4]
 80053ac:	b9c3      	cbnz	r3, 80053e0 <ADC_Enable+0x60>
    tickstart = HAL_GetTick();
 80053ae:	f7ff ff0f 	bl	80051d0 <HAL_GetTick>
 80053b2:	4606      	mov	r6, r0
    while(ADC_IS_ENABLE(hadc) == RESET)
 80053b4:	6823      	ldr	r3, [r4, #0]
 80053b6:	689d      	ldr	r5, [r3, #8]
 80053b8:	f015 0501 	ands.w	r5, r5, #1
 80053bc:	d1e8      	bne.n	8005390 <ADC_Enable+0x10>
      if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
 80053be:	f7ff ff07 	bl	80051d0 <HAL_GetTick>
 80053c2:	1b80      	subs	r0, r0, r6
 80053c4:	2802      	cmp	r0, #2
 80053c6:	d9f5      	bls.n	80053b4 <ADC_Enable+0x34>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 80053c8:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        __HAL_UNLOCK(hadc);
 80053ca:	f884 5024 	strb.w	r5, [r4, #36]	; 0x24
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 80053ce:	f043 0310 	orr.w	r3, r3, #16
 80053d2:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80053d4:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
        __HAL_UNLOCK(hadc);
 80053d6:	2001      	movs	r0, #1
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80053d8:	f043 0301 	orr.w	r3, r3, #1
 80053dc:	62e3      	str	r3, [r4, #44]	; 0x2c
 80053de:	e7d8      	b.n	8005392 <ADC_Enable+0x12>
      wait_loop_index--;
 80053e0:	9b01      	ldr	r3, [sp, #4]
 80053e2:	3b01      	subs	r3, #1
 80053e4:	e7e0      	b.n	80053a8 <ADC_Enable+0x28>
 80053e6:	bf00      	nop
 80053e8:	20000218 	.word	0x20000218
 80053ec:	000f4240 	.word	0x000f4240

080053f0 <HAL_ADC_Start_DMA>:
{
 80053f0:	e92d 41d8 	stmdb	sp!, {r3, r4, r6, r7, r8, lr}
 80053f4:	4690      	mov	r8, r2
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 80053f6:	4b40      	ldr	r3, [pc, #256]	; (80054f8 <HAL_ADC_Start_DMA+0x108>)
 80053f8:	6802      	ldr	r2, [r0, #0]
{
 80053fa:	4604      	mov	r4, r0
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 80053fc:	429a      	cmp	r2, r3
{
 80053fe:	460f      	mov	r7, r1
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 8005400:	d002      	beq.n	8005408 <HAL_ADC_Start_DMA+0x18>
 8005402:	493e      	ldr	r1, [pc, #248]	; (80054fc <HAL_ADC_Start_DMA+0x10c>)
 8005404:	428a      	cmp	r2, r1
 8005406:	d103      	bne.n	8005410 <HAL_ADC_Start_DMA+0x20>
 8005408:	685b      	ldr	r3, [r3, #4]
 800540a:	f413 2f70 	tst.w	r3, #983040	; 0xf0000
 800540e:	d16e      	bne.n	80054ee <HAL_ADC_Start_DMA+0xfe>
    __HAL_LOCK(hadc);
 8005410:	f894 3024 	ldrb.w	r3, [r4, #36]	; 0x24
 8005414:	2b01      	cmp	r3, #1
 8005416:	d06c      	beq.n	80054f2 <HAL_ADC_Start_DMA+0x102>
 8005418:	2301      	movs	r3, #1
    tmp_hal_status = ADC_Enable(hadc);
 800541a:	4620      	mov	r0, r4
    __HAL_LOCK(hadc);
 800541c:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
    tmp_hal_status = ADC_Enable(hadc);
 8005420:	f7ff ffae 	bl	8005380 <ADC_Enable>
    if (tmp_hal_status == HAL_OK)
 8005424:	4606      	mov	r6, r0
 8005426:	2800      	cmp	r0, #0
 8005428:	d15d      	bne.n	80054e6 <HAL_ADC_Start_DMA+0xf6>
      ADC_STATE_CLR_SET(hadc->State,
 800542a:	6aa0      	ldr	r0, [r4, #40]	; 0x28
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 800542c:	6821      	ldr	r1, [r4, #0]
      ADC_STATE_CLR_SET(hadc->State,
 800542e:	f420 6070 	bic.w	r0, r0, #3840	; 0xf00
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8005432:	4b32      	ldr	r3, [pc, #200]	; (80054fc <HAL_ADC_Start_DMA+0x10c>)
      ADC_STATE_CLR_SET(hadc->State,
 8005434:	f020 0001 	bic.w	r0, r0, #1
 8005438:	f440 7080 	orr.w	r0, r0, #256	; 0x100
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 800543c:	4299      	cmp	r1, r3
      ADC_STATE_CLR_SET(hadc->State,
 800543e:	62a0      	str	r0, [r4, #40]	; 0x28
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8005440:	d104      	bne.n	800544c <HAL_ADC_Start_DMA+0x5c>
 8005442:	4a2d      	ldr	r2, [pc, #180]	; (80054f8 <HAL_ADC_Start_DMA+0x108>)
 8005444:	6853      	ldr	r3, [r2, #4]
 8005446:	f413 2f70 	tst.w	r3, #983040	; 0xf0000
 800544a:	d13e      	bne.n	80054ca <HAL_ADC_Start_DMA+0xda>
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 800544c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800544e:	f423 1380 	bic.w	r3, r3, #1048576	; 0x100000
 8005452:	62a3      	str	r3, [r4, #40]	; 0x28
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
 8005454:	684b      	ldr	r3, [r1, #4]
 8005456:	055a      	lsls	r2, r3, #21
 8005458:	d505      	bpl.n	8005466 <HAL_ADC_Start_DMA+0x76>
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
 800545a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800545c:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8005460:	f443 5380 	orr.w	r3, r3, #4096	; 0x1000
 8005464:	62a3      	str	r3, [r4, #40]	; 0x28
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8005466:	6aa3      	ldr	r3, [r4, #40]	; 0x28
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8005468:	6a20      	ldr	r0, [r4, #32]
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 800546a:	f413 5380 	ands.w	r3, r3, #4096	; 0x1000
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
 800546e:	bf18      	it	ne
 8005470:	6ae3      	ldrne	r3, [r4, #44]	; 0x2c
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 8005472:	463a      	mov	r2, r7
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
 8005474:	bf18      	it	ne
 8005476:	f023 0306 	bicne.w	r3, r3, #6
        ADC_CLEAR_ERRORCODE(hadc);
 800547a:	62e3      	str	r3, [r4, #44]	; 0x2c
      __HAL_UNLOCK(hadc);
 800547c:	2300      	movs	r3, #0
 800547e:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8005482:	4b1f      	ldr	r3, [pc, #124]	; (8005500 <HAL_ADC_Start_DMA+0x110>)
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 8005484:	314c      	adds	r1, #76	; 0x4c
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8005486:	6283      	str	r3, [r0, #40]	; 0x28
      hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
 8005488:	4b1e      	ldr	r3, [pc, #120]	; (8005504 <HAL_ADC_Start_DMA+0x114>)
 800548a:	62c3      	str	r3, [r0, #44]	; 0x2c
      hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
 800548c:	4b1e      	ldr	r3, [pc, #120]	; (8005508 <HAL_ADC_Start_DMA+0x118>)
 800548e:	6303      	str	r3, [r0, #48]	; 0x30
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
 8005490:	f06f 0302 	mvn.w	r3, #2
 8005494:	f841 3c4c 	str.w	r3, [r1, #-76]
      SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
 8005498:	f851 3c44 	ldr.w	r3, [r1, #-68]
 800549c:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80054a0:	f841 3c44 	str.w	r3, [r1, #-68]
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 80054a4:	4643      	mov	r3, r8
 80054a6:	f000 f9ed 	bl	8005884 <HAL_DMA_Start_IT>
      if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
 80054aa:	6823      	ldr	r3, [r4, #0]
 80054ac:	689a      	ldr	r2, [r3, #8]
 80054ae:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
 80054b2:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
 80054b6:	689a      	ldr	r2, [r3, #8]
 80054b8:	bf0c      	ite	eq
 80054ba:	f442 02a0 	orreq.w	r2, r2, #5242880	; 0x500000
        SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
 80054be:	f442 1280 	orrne.w	r2, r2, #1048576	; 0x100000
 80054c2:	609a      	str	r2, [r3, #8]
}
 80054c4:	4630      	mov	r0, r6
 80054c6:	e8bd 81d8 	ldmia.w	sp!, {r3, r4, r6, r7, r8, pc}
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 80054ca:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 80054cc:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
 80054d0:	62a3      	str	r3, [r4, #40]	; 0x28
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
 80054d2:	6853      	ldr	r3, [r2, #4]
 80054d4:	055b      	lsls	r3, r3, #21
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
 80054d6:	bf41      	itttt	mi
 80054d8:	6aa0      	ldrmi	r0, [r4, #40]	; 0x28
 80054da:	f420 5040 	bicmi.w	r0, r0, #12288	; 0x3000
 80054de:	f440 5080 	orrmi.w	r0, r0, #4096	; 0x1000
 80054e2:	62a0      	strmi	r0, [r4, #40]	; 0x28
 80054e4:	e7bf      	b.n	8005466 <HAL_ADC_Start_DMA+0x76>
      __HAL_UNLOCK(hadc);
 80054e6:	2300      	movs	r3, #0
 80054e8:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
 80054ec:	e7ea      	b.n	80054c4 <HAL_ADC_Start_DMA+0xd4>
    tmp_hal_status = HAL_ERROR;
 80054ee:	2601      	movs	r6, #1
 80054f0:	e7e8      	b.n	80054c4 <HAL_ADC_Start_DMA+0xd4>
    __HAL_LOCK(hadc);
 80054f2:	2602      	movs	r6, #2
 80054f4:	e7e6      	b.n	80054c4 <HAL_ADC_Start_DMA+0xd4>
 80054f6:	bf00      	nop
 80054f8:	40012400 	.word	0x40012400
 80054fc:	40012800 	.word	0x40012800
 8005500:	08005203 	.word	0x08005203
 8005504:	08005253 	.word	0x08005253
 8005508:	0800525f 	.word	0x0800525f

0800550c <ADC_ConversionStop_Disable>:
{
 800550c:	b538      	push	{r3, r4, r5, lr}
  if (ADC_IS_ENABLE(hadc) != RESET)
 800550e:	6803      	ldr	r3, [r0, #0]
{
 8005510:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) != RESET)
 8005512:	689a      	ldr	r2, [r3, #8]
 8005514:	07d2      	lsls	r2, r2, #31
 8005516:	d401      	bmi.n	800551c <ADC_ConversionStop_Disable+0x10>
  return HAL_OK;
 8005518:	2000      	movs	r0, #0
 800551a:	bd38      	pop	{r3, r4, r5, pc}
    __HAL_ADC_DISABLE(hadc);
 800551c:	689a      	ldr	r2, [r3, #8]
 800551e:	f022 0201 	bic.w	r2, r2, #1
 8005522:	609a      	str	r2, [r3, #8]
    tickstart = HAL_GetTick();
 8005524:	f7ff fe54 	bl	80051d0 <HAL_GetTick>
 8005528:	4605      	mov	r5, r0
    while(ADC_IS_ENABLE(hadc) != RESET)
 800552a:	6823      	ldr	r3, [r4, #0]
 800552c:	689b      	ldr	r3, [r3, #8]
 800552e:	07db      	lsls	r3, r3, #31
 8005530:	d5f2      	bpl.n	8005518 <ADC_ConversionStop_Disable+0xc>
      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
 8005532:	f7ff fe4d 	bl	80051d0 <HAL_GetTick>
 8005536:	1b40      	subs	r0, r0, r5
 8005538:	2802      	cmp	r0, #2
 800553a:	d9f6      	bls.n	800552a <ADC_ConversionStop_Disable+0x1e>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 800553c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 800553e:	2001      	movs	r0, #1
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8005540:	f043 0310 	orr.w	r3, r3, #16
 8005544:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005546:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 8005548:	f043 0301 	orr.w	r3, r3, #1
 800554c:	62e3      	str	r3, [r4, #44]	; 0x2c
 800554e:	bd38      	pop	{r3, r4, r5, pc}

08005550 <HAL_ADC_Init>:
{
 8005550:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  if(hadc == NULL)
 8005552:	4604      	mov	r4, r0
 8005554:	2800      	cmp	r0, #0
 8005556:	d077      	beq.n	8005648 <HAL_ADC_Init+0xf8>
  if (hadc->State == HAL_ADC_STATE_RESET)
 8005558:	6a83      	ldr	r3, [r0, #40]	; 0x28
 800555a:	b923      	cbnz	r3, 8005566 <HAL_ADC_Init+0x16>
    ADC_CLEAR_ERRORCODE(hadc);
 800555c:	62c3      	str	r3, [r0, #44]	; 0x2c
    hadc->Lock = HAL_UNLOCKED;
 800555e:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
    HAL_ADC_MspInit(hadc);
 8005562:	f002 ff2f 	bl	80083c4 <HAL_ADC_MspInit>
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 8005566:	4620      	mov	r0, r4
 8005568:	f7ff ffd0 	bl	800550c <ADC_ConversionStop_Disable>
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
 800556c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800556e:	f013 0310 	ands.w	r3, r3, #16
 8005572:	d16b      	bne.n	800564c <HAL_ADC_Init+0xfc>
 8005574:	2800      	cmp	r0, #0
 8005576:	d169      	bne.n	800564c <HAL_ADC_Init+0xfc>
    ADC_STATE_CLR_SET(hadc->State,
 8005578:	6aa2      	ldr	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800557a:	4937      	ldr	r1, [pc, #220]	; (8005658 <HAL_ADC_Init+0x108>)
    ADC_STATE_CLR_SET(hadc->State,
 800557c:	f422 5288 	bic.w	r2, r2, #4352	; 0x1100
 8005580:	f022 0202 	bic.w	r2, r2, #2
 8005584:	f042 0202 	orr.w	r2, r2, #2
 8005588:	62a2      	str	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800558a:	e894 0024 	ldmia.w	r4, {r2, r5}
 800558e:	428a      	cmp	r2, r1
 8005590:	69e1      	ldr	r1, [r4, #28]
 8005592:	d104      	bne.n	800559e <HAL_ADC_Init+0x4e>
 8005594:	f5b1 2f40 	cmp.w	r1, #786432	; 0xc0000
 8005598:	bf08      	it	eq
 800559a:	f44f 2100 	moveq.w	r1, #524288	; 0x80000
                ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode)   );
 800559e:	68e6      	ldr	r6, [r4, #12]
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 80055a0:	ea45 0546 	orr.w	r5, r5, r6, lsl #1
 80055a4:	4329      	orrs	r1, r5
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 80055a6:	68a5      	ldr	r5, [r4, #8]
 80055a8:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
 80055ac:	d035      	beq.n	800561a <HAL_ADC_Init+0xca>
 80055ae:	2d01      	cmp	r5, #1
 80055b0:	bf08      	it	eq
 80055b2:	f44f 7380 	moveq.w	r3, #256	; 0x100
    if (hadc->Init.DiscontinuousConvMode == ENABLE)
 80055b6:	6967      	ldr	r7, [r4, #20]
 80055b8:	2f01      	cmp	r7, #1
 80055ba:	d106      	bne.n	80055ca <HAL_ADC_Init+0x7a>
      if (hadc->Init.ContinuousConvMode == DISABLE)
 80055bc:	bb7e      	cbnz	r6, 800561e <HAL_ADC_Init+0xce>
        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
 80055be:	69a6      	ldr	r6, [r4, #24]
 80055c0:	3e01      	subs	r6, #1
 80055c2:	ea43 3346 	orr.w	r3, r3, r6, lsl #13
 80055c6:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
      MODIFY_REG(hadc->Instance->CR1,
 80055ca:	6856      	ldr	r6, [r2, #4]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80055cc:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
      MODIFY_REG(hadc->Instance->CR1,
 80055d0:	f426 4669 	bic.w	r6, r6, #59648	; 0xe900
 80055d4:	ea43 0306 	orr.w	r3, r3, r6
 80055d8:	6053      	str	r3, [r2, #4]
      MODIFY_REG(hadc->Instance->CR2,
 80055da:	6896      	ldr	r6, [r2, #8]
 80055dc:	4b1f      	ldr	r3, [pc, #124]	; (800565c <HAL_ADC_Init+0x10c>)
 80055de:	ea03 0306 	and.w	r3, r3, r6
 80055e2:	ea43 0301 	orr.w	r3, r3, r1
 80055e6:	6093      	str	r3, [r2, #8]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80055e8:	d001      	beq.n	80055ee <HAL_ADC_Init+0x9e>
 80055ea:	2d01      	cmp	r5, #1
 80055ec:	d120      	bne.n	8005630 <HAL_ADC_Init+0xe0>
      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
 80055ee:	6923      	ldr	r3, [r4, #16]
 80055f0:	3b01      	subs	r3, #1
 80055f2:	051b      	lsls	r3, r3, #20
    MODIFY_REG(hadc->Instance->SQR1,
 80055f4:	6ad5      	ldr	r5, [r2, #44]	; 0x2c
 80055f6:	f425 0570 	bic.w	r5, r5, #15728640	; 0xf00000
 80055fa:	432b      	orrs	r3, r5
 80055fc:	62d3      	str	r3, [r2, #44]	; 0x2c
    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
 80055fe:	6892      	ldr	r2, [r2, #8]
 8005600:	4b17      	ldr	r3, [pc, #92]	; (8005660 <HAL_ADC_Init+0x110>)
 8005602:	4013      	ands	r3, r2
 8005604:	4299      	cmp	r1, r3
 8005606:	d115      	bne.n	8005634 <HAL_ADC_Init+0xe4>
      ADC_CLEAR_ERRORCODE(hadc);
 8005608:	2300      	movs	r3, #0
 800560a:	62e3      	str	r3, [r4, #44]	; 0x2c
      ADC_STATE_CLR_SET(hadc->State,
 800560c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800560e:	f023 0303 	bic.w	r3, r3, #3
 8005612:	f043 0301 	orr.w	r3, r3, #1
 8005616:	62a3      	str	r3, [r4, #40]	; 0x28
 8005618:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 800561a:	462b      	mov	r3, r5
 800561c:	e7cb      	b.n	80055b6 <HAL_ADC_Init+0x66>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 800561e:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 8005620:	f046 0620 	orr.w	r6, r6, #32
 8005624:	62a6      	str	r6, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005626:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8005628:	f046 0601 	orr.w	r6, r6, #1
 800562c:	62e6      	str	r6, [r4, #44]	; 0x2c
 800562e:	e7cc      	b.n	80055ca <HAL_ADC_Init+0x7a>
  uint32_t tmp_sqr1 = 0U;
 8005630:	2300      	movs	r3, #0
 8005632:	e7df      	b.n	80055f4 <HAL_ADC_Init+0xa4>
      ADC_STATE_CLR_SET(hadc->State,
 8005634:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8005636:	f023 0312 	bic.w	r3, r3, #18
 800563a:	f043 0310 	orr.w	r3, r3, #16
 800563e:	62a3      	str	r3, [r4, #40]	; 0x28
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005640:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 8005642:	f043 0301 	orr.w	r3, r3, #1
 8005646:	62e3      	str	r3, [r4, #44]	; 0x2c
    return HAL_ERROR;
 8005648:	2001      	movs	r0, #1
}
 800564a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 800564c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800564e:	f043 0310 	orr.w	r3, r3, #16
 8005652:	62a3      	str	r3, [r4, #40]	; 0x28
 8005654:	e7f8      	b.n	8005648 <HAL_ADC_Init+0xf8>
 8005656:	bf00      	nop
 8005658:	40013c00 	.word	0x40013c00
 800565c:	ffe1f7fd 	.word	0xffe1f7fd
 8005660:	ff1f0efe 	.word	0xff1f0efe

08005664 <HAL_ADCEx_Calibration_Start>:
  */
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
{
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  uint32_t tickstart;
  __IO uint32_t wait_loop_index = 0U;
 8005664:	2300      	movs	r3, #0
{
 8005666:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 8005668:	9301      	str	r3, [sp, #4]
  
  /* Check the parameters */
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));

  /* Process locked */
  __HAL_LOCK(hadc);
 800566a:	f890 3024 	ldrb.w	r3, [r0, #36]	; 0x24
{
 800566e:	4604      	mov	r4, r0
  __HAL_LOCK(hadc);
 8005670:	2b01      	cmp	r3, #1
 8005672:	d05a      	beq.n	800572a <HAL_ADCEx_Calibration_Start+0xc6>
 8005674:	2301      	movs	r3, #1
 8005676:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
  /* 1. Calibration prerequisite:                                             */
  /*    - ADC must be disabled for at least two ADC clock cycles in disable   */
  /*      mode before ADC enable                                              */
  /* Stop potential conversion on going, on regular and injected groups       */
  /* Disable ADC peripheral */
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 800567a:	f7ff ff47 	bl	800550c <ADC_ConversionStop_Disable>
  
  /* Check if ADC is effectively disabled */
  if (tmp_hal_status == HAL_OK)
 800567e:	4605      	mov	r5, r0
 8005680:	2800      	cmp	r0, #0
 8005682:	d132      	bne.n	80056ea <HAL_ADCEx_Calibration_Start+0x86>
  {
    /* Set ADC state */
    ADC_STATE_CLR_SET(hadc->State,
 8005684:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    
    /* Hardware prerequisite: delay before starting the calibration.          */
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles.  */
    /*  - Wait for the expected ADC clock cycles delay */
    wait_loop_index = ((SystemCoreClock
                        / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
 8005686:	2002      	movs	r0, #2
    ADC_STATE_CLR_SET(hadc->State,
 8005688:	f423 5388 	bic.w	r3, r3, #4352	; 0x1100
 800568c:	f023 0302 	bic.w	r3, r3, #2
 8005690:	f043 0302 	orr.w	r3, r3, #2
 8005694:	62a3      	str	r3, [r4, #40]	; 0x28
                        / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
 8005696:	4b26      	ldr	r3, [pc, #152]	; (8005730 <HAL_ADCEx_Calibration_Start+0xcc>)
 8005698:	681e      	ldr	r6, [r3, #0]
 800569a:	f000 ffaf 	bl	80065fc <HAL_RCCEx_GetPeriphCLKFreq>
 800569e:	fbb6 f0f0 	udiv	r0, r6, r0
                       * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES        );
 80056a2:	0040      	lsls	r0, r0, #1
    wait_loop_index = ((SystemCoreClock
 80056a4:	9001      	str	r0, [sp, #4]

    while(wait_loop_index != 0U)
 80056a6:	9b01      	ldr	r3, [sp, #4]
 80056a8:	bb1b      	cbnz	r3, 80056f2 <HAL_ADCEx_Calibration_Start+0x8e>
    {
      wait_loop_index--;
    }
    
    /* 2. Enable the ADC peripheral */
    ADC_Enable(hadc);
 80056aa:	4620      	mov	r0, r4
 80056ac:	f7ff fe68 	bl	8005380 <ADC_Enable>
    
    /* 3. Resets ADC calibration registers */  
    SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL);
 80056b0:	6822      	ldr	r2, [r4, #0]
 80056b2:	6893      	ldr	r3, [r2, #8]
 80056b4:	f043 0308 	orr.w	r3, r3, #8
 80056b8:	6093      	str	r3, [r2, #8]
    
    tickstart = HAL_GetTick();  
 80056ba:	f7ff fd89 	bl	80051d0 <HAL_GetTick>
 80056be:	4606      	mov	r6, r0

    /* Wait for calibration reset completion */
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
 80056c0:	6823      	ldr	r3, [r4, #0]
 80056c2:	689a      	ldr	r2, [r3, #8]
 80056c4:	0712      	lsls	r2, r2, #28
 80056c6:	d418      	bmi.n	80056fa <HAL_ADCEx_Calibration_Start+0x96>
      }
    }
    
    
    /* 4. Start ADC calibration */
    SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL);
 80056c8:	689a      	ldr	r2, [r3, #8]
 80056ca:	f042 0204 	orr.w	r2, r2, #4
 80056ce:	609a      	str	r2, [r3, #8]
    
    tickstart = HAL_GetTick();  
 80056d0:	f7ff fd7e 	bl	80051d0 <HAL_GetTick>
 80056d4:	4606      	mov	r6, r0

    /* Wait for calibration completion */
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
 80056d6:	6823      	ldr	r3, [r4, #0]
 80056d8:	689b      	ldr	r3, [r3, #8]
 80056da:	075b      	lsls	r3, r3, #29
 80056dc:	d41f      	bmi.n	800571e <HAL_ADCEx_Calibration_Start+0xba>
        return HAL_ERROR;
      }
    }
    
    /* Set ADC state */
    ADC_STATE_CLR_SET(hadc->State,
 80056de:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 80056e0:	f023 0303 	bic.w	r3, r3, #3
 80056e4:	f043 0301 	orr.w	r3, r3, #1
 80056e8:	62a3      	str	r3, [r4, #40]	; 0x28
                      HAL_ADC_STATE_BUSY_INTERNAL,
                      HAL_ADC_STATE_READY);
  }
  
  /* Process unlocked */
  __HAL_UNLOCK(hadc);
 80056ea:	2300      	movs	r3, #0
 80056ec:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
  
  /* Return function status */
  return tmp_hal_status;
 80056f0:	e012      	b.n	8005718 <HAL_ADCEx_Calibration_Start+0xb4>
      wait_loop_index--;
 80056f2:	9b01      	ldr	r3, [sp, #4]
 80056f4:	3b01      	subs	r3, #1
 80056f6:	9301      	str	r3, [sp, #4]
 80056f8:	e7d5      	b.n	80056a6 <HAL_ADCEx_Calibration_Start+0x42>
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
 80056fa:	f7ff fd69 	bl	80051d0 <HAL_GetTick>
 80056fe:	1b80      	subs	r0, r0, r6
 8005700:	280a      	cmp	r0, #10
 8005702:	d9dd      	bls.n	80056c0 <HAL_ADCEx_Calibration_Start+0x5c>
        ADC_STATE_CLR_SET(hadc->State,
 8005704:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        return HAL_ERROR;
 8005706:	2501      	movs	r5, #1
        ADC_STATE_CLR_SET(hadc->State,
 8005708:	f023 0312 	bic.w	r3, r3, #18
 800570c:	f043 0310 	orr.w	r3, r3, #16
 8005710:	62a3      	str	r3, [r4, #40]	; 0x28
        __HAL_UNLOCK(hadc);
 8005712:	2300      	movs	r3, #0
 8005714:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
}
 8005718:	4628      	mov	r0, r5
 800571a:	b002      	add	sp, #8
 800571c:	bd70      	pop	{r4, r5, r6, pc}
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
 800571e:	f7ff fd57 	bl	80051d0 <HAL_GetTick>
 8005722:	1b80      	subs	r0, r0, r6
 8005724:	280a      	cmp	r0, #10
 8005726:	d9d6      	bls.n	80056d6 <HAL_ADCEx_Calibration_Start+0x72>
 8005728:	e7ec      	b.n	8005704 <HAL_ADCEx_Calibration_Start+0xa0>
  __HAL_LOCK(hadc);
 800572a:	2502      	movs	r5, #2
 800572c:	e7f4      	b.n	8005718 <HAL_ADCEx_Calibration_Start+0xb4>
 800572e:	bf00      	nop
 8005730:	20000218 	.word	0x20000218

08005734 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005734:	4a07      	ldr	r2, [pc, #28]	; (8005754 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 8005736:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005738:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 800573a:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 800573e:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8005742:	041b      	lsls	r3, r3, #16
 8005744:	0c1b      	lsrs	r3, r3, #16
 8005746:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 800574a:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 800574e:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 8005750:	60d3      	str	r3, [r2, #12]
 8005752:	4770      	bx	lr
 8005754:	e000ed00 	.word	0xe000ed00

08005758 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8005758:	4b17      	ldr	r3, [pc, #92]	; (80057b8 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 800575a:	b530      	push	{r4, r5, lr}
 800575c:	68dc      	ldr	r4, [r3, #12]
 800575e:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005762:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005766:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005768:	2b04      	cmp	r3, #4
 800576a:	bf28      	it	cs
 800576c:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800576e:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005770:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005774:	bf98      	it	ls
 8005776:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005778:	fa05 f303 	lsl.w	r3, r5, r3
 800577c:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005780:	bf88      	it	hi
 8005782:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005784:	4019      	ands	r1, r3
 8005786:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8005788:	fa05 f404 	lsl.w	r4, r5, r4
 800578c:	3c01      	subs	r4, #1
 800578e:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 8005790:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005792:	ea42 0201 	orr.w	r2, r2, r1
 8005796:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800579a:	bfaf      	iteee	ge
 800579c:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057a0:	4b06      	ldrlt	r3, [pc, #24]	; (80057bc <HAL_NVIC_SetPriority+0x64>)
 80057a2:	f000 000f 	andlt.w	r0, r0, #15
 80057a6:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057a8:	bfa5      	ittet	ge
 80057aa:	b2d2      	uxtbge	r2, r2
 80057ac:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057b0:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057b2:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 80057b6:	bd30      	pop	{r4, r5, pc}
 80057b8:	e000ed00 	.word	0xe000ed00
 80057bc:	e000ed14 	.word	0xe000ed14

080057c0 <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 80057c0:	2301      	movs	r3, #1
 80057c2:	0942      	lsrs	r2, r0, #5
 80057c4:	f000 001f 	and.w	r0, r0, #31
 80057c8:	fa03 f000 	lsl.w	r0, r3, r0
 80057cc:	4b01      	ldr	r3, [pc, #4]	; (80057d4 <HAL_NVIC_EnableIRQ+0x14>)
 80057ce:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 80057d2:	4770      	bx	lr
 80057d4:	e000e100 	.word	0xe000e100

080057d8 <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 80057d8:	3801      	subs	r0, #1
 80057da:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 80057de:	d20a      	bcs.n	80057f6 <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057e0:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 80057e2:	4b06      	ldr	r3, [pc, #24]	; (80057fc <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057e4:	4a06      	ldr	r2, [pc, #24]	; (8005800 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 80057e6:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057e8:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80057ec:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80057ee:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80057f0:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80057f2:	601a      	str	r2, [r3, #0]
 80057f4:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 80057f6:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 80057f8:	4770      	bx	lr
 80057fa:	bf00      	nop
 80057fc:	e000e010 	.word	0xe000e010
 8005800:	e000ed00 	.word	0xe000ed00

08005804 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Channel.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 8005804:	b510      	push	{r4, lr}
  uint32_t tmp = 0U;

  /* Check the DMA handle allocation */
  if(hdma == NULL)
 8005806:	2800      	cmp	r0, #0
 8005808:	d032      	beq.n	8005870 <HAL_DMA_Init+0x6c>
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

#if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC)
  /* calculation of the channel index */
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 800580a:	6801      	ldr	r1, [r0, #0]
 800580c:	4b19      	ldr	r3, [pc, #100]	; (8005874 <HAL_DMA_Init+0x70>)
 800580e:	2414      	movs	r4, #20
 8005810:	4299      	cmp	r1, r3
 8005812:	d825      	bhi.n	8005860 <HAL_DMA_Init+0x5c>
  {
    /* DMA1 */
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 8005814:	4a18      	ldr	r2, [pc, #96]	; (8005878 <HAL_DMA_Init+0x74>)
    hdma->DmaBaseAddress = DMA1;
 8005816:	f2a3 4307 	subw	r3, r3, #1031	; 0x407
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 800581a:	440a      	add	r2, r1
 800581c:	fbb2 f2f4 	udiv	r2, r2, r4
 8005820:	0092      	lsls	r2, r2, #2
 8005822:	6402      	str	r2, [r0, #64]	; 0x40
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
                      DMA_CCR_DIR));

  /* Prepare the DMA Channel configuration */
  tmp |=  hdma->Init.Direction        |
 8005824:	6884      	ldr	r4, [r0, #8]
    hdma->DmaBaseAddress = DMA2;
 8005826:	63c3      	str	r3, [r0, #60]	; 0x3c
  tmp |=  hdma->Init.Direction        |
 8005828:	6843      	ldr	r3, [r0, #4]
  tmp = hdma->Instance->CCR;
 800582a:	680a      	ldr	r2, [r1, #0]
  tmp |=  hdma->Init.Direction        |
 800582c:	4323      	orrs	r3, r4
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800582e:	68c4      	ldr	r4, [r0, #12]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8005830:	f422 527f 	bic.w	r2, r2, #16320	; 0x3fc0
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005834:	4323      	orrs	r3, r4
 8005836:	6904      	ldr	r4, [r0, #16]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8005838:	f022 0230 	bic.w	r2, r2, #48	; 0x30
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800583c:	4323      	orrs	r3, r4
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 800583e:	6944      	ldr	r4, [r0, #20]
 8005840:	4323      	orrs	r3, r4
 8005842:	6984      	ldr	r4, [r0, #24]
 8005844:	4323      	orrs	r3, r4
          hdma->Init.Mode                | hdma->Init.Priority;
 8005846:	69c4      	ldr	r4, [r0, #28]
 8005848:	4323      	orrs	r3, r4
  tmp |=  hdma->Init.Direction        |
 800584a:	4313      	orrs	r3, r2

  /* Write to DMA Channel CR register */
  hdma->Instance->CCR = tmp;
 800584c:	600b      	str	r3, [r1, #0]

  /* Initialise the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;

  /* Initialize the DMA state*/
  hdma->State = HAL_DMA_STATE_READY;
 800584e:	2201      	movs	r2, #1
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005850:	2300      	movs	r3, #0
  hdma->State = HAL_DMA_STATE_READY;
 8005852:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005856:	6383      	str	r3, [r0, #56]	; 0x38
  /* Allocate lock resource and initialize it */
  hdma->Lock = HAL_UNLOCKED;
 8005858:	f880 3020 	strb.w	r3, [r0, #32]

  return HAL_OK;
 800585c:	4618      	mov	r0, r3
 800585e:	bd10      	pop	{r4, pc}
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 8005860:	4b06      	ldr	r3, [pc, #24]	; (800587c <HAL_DMA_Init+0x78>)
 8005862:	440b      	add	r3, r1
 8005864:	fbb3 f3f4 	udiv	r3, r3, r4
 8005868:	009b      	lsls	r3, r3, #2
 800586a:	6403      	str	r3, [r0, #64]	; 0x40
    hdma->DmaBaseAddress = DMA2;
 800586c:	4b04      	ldr	r3, [pc, #16]	; (8005880 <HAL_DMA_Init+0x7c>)
 800586e:	e7d9      	b.n	8005824 <HAL_DMA_Init+0x20>
    return HAL_ERROR;
 8005870:	2001      	movs	r0, #1
}
 8005872:	bd10      	pop	{r4, pc}
 8005874:	40020407 	.word	0x40020407
 8005878:	bffdfff8 	.word	0xbffdfff8
 800587c:	bffdfbf8 	.word	0xbffdfbf8
 8005880:	40020400 	.word	0x40020400

08005884 <HAL_DMA_Start_IT>:
  * @param  DstAddress: The destination memory Buffer address
  * @param  DataLength: The length of data to be transferred from source to destination
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
 8005884:	b5f0      	push	{r4, r5, r6, r7, lr}

  /* Check the parameters */
  assert_param(IS_DMA_BUFFER_SIZE(DataLength));

  /* Process locked */
  __HAL_LOCK(hdma);
 8005886:	f890 4020 	ldrb.w	r4, [r0, #32]
 800588a:	2c01      	cmp	r4, #1
 800588c:	d035      	beq.n	80058fa <HAL_DMA_Start_IT+0x76>
 800588e:	2401      	movs	r4, #1
  
  if(HAL_DMA_STATE_READY == hdma->State)
 8005890:	f890 5021 	ldrb.w	r5, [r0, #33]	; 0x21
  __HAL_LOCK(hdma);
 8005894:	f880 4020 	strb.w	r4, [r0, #32]
  if(HAL_DMA_STATE_READY == hdma->State)
 8005898:	42a5      	cmp	r5, r4
 800589a:	f04f 0600 	mov.w	r6, #0
 800589e:	f04f 0402 	mov.w	r4, #2
 80058a2:	d128      	bne.n	80058f6 <HAL_DMA_Start_IT+0x72>
  {
    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 80058a4:	f880 4021 	strb.w	r4, [r0, #33]	; 0x21
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
    
    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 80058a8:	6804      	ldr	r4, [r0, #0]
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 80058aa:	6386      	str	r6, [r0, #56]	; 0x38
    __HAL_DMA_DISABLE(hdma);
 80058ac:	6826      	ldr	r6, [r4, #0]
  * @retval HAL status
  */
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
  /* Clear all flags */
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 80058ae:	6c07      	ldr	r7, [r0, #64]	; 0x40
    __HAL_DMA_DISABLE(hdma);
 80058b0:	f026 0601 	bic.w	r6, r6, #1
 80058b4:	6026      	str	r6, [r4, #0]
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 80058b6:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
 80058b8:	40bd      	lsls	r5, r7
 80058ba:	6075      	str	r5, [r6, #4]

  /* Configure DMA Channel data length */
  hdma->Instance->CNDTR = DataLength;
 80058bc:	6063      	str	r3, [r4, #4]

  /* Memory to Peripheral */
  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
 80058be:	6843      	ldr	r3, [r0, #4]
 80058c0:	6805      	ldr	r5, [r0, #0]
 80058c2:	2b10      	cmp	r3, #16
    if(NULL != hdma->XferHalfCpltCallback)
 80058c4:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
  {
    /* Configure DMA Channel destination address */
    hdma->Instance->CPAR = DstAddress;
 80058c6:	bf0b      	itete	eq
 80058c8:	60a2      	streq	r2, [r4, #8]
  }
  /* Peripheral to Memory */
  else
  {
    /* Configure DMA Channel source address */
    hdma->Instance->CPAR = SrcAddress;
 80058ca:	60a1      	strne	r1, [r4, #8]
    hdma->Instance->CMAR = SrcAddress;
 80058cc:	60e1      	streq	r1, [r4, #12]

    /* Configure DMA Channel destination address */
    hdma->Instance->CMAR = DstAddress;
 80058ce:	60e2      	strne	r2, [r4, #12]
    if(NULL != hdma->XferHalfCpltCallback)
 80058d0:	b14b      	cbz	r3, 80058e6 <HAL_DMA_Start_IT+0x62>
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80058d2:	6823      	ldr	r3, [r4, #0]
 80058d4:	f043 030e 	orr.w	r3, r3, #14
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 80058d8:	6023      	str	r3, [r4, #0]
    __HAL_DMA_ENABLE(hdma);
 80058da:	682b      	ldr	r3, [r5, #0]
  HAL_StatusTypeDef status = HAL_OK;
 80058dc:	2000      	movs	r0, #0
    __HAL_DMA_ENABLE(hdma);
 80058de:	f043 0301 	orr.w	r3, r3, #1
 80058e2:	602b      	str	r3, [r5, #0]
 80058e4:	bdf0      	pop	{r4, r5, r6, r7, pc}
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 80058e6:	6823      	ldr	r3, [r4, #0]
 80058e8:	f023 0304 	bic.w	r3, r3, #4
 80058ec:	6023      	str	r3, [r4, #0]
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 80058ee:	6823      	ldr	r3, [r4, #0]
 80058f0:	f043 030a 	orr.w	r3, r3, #10
 80058f4:	e7f0      	b.n	80058d8 <HAL_DMA_Start_IT+0x54>
    __HAL_UNLOCK(hdma); 
 80058f6:	f880 6020 	strb.w	r6, [r0, #32]
  __HAL_LOCK(hdma);
 80058fa:	2002      	movs	r0, #2
}
 80058fc:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08005900 <HAL_DMA_Abort_IT>:
  if(HAL_DMA_STATE_BUSY != hdma->State)
 8005900:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 8005904:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 8005906:	2b02      	cmp	r3, #2
 8005908:	d003      	beq.n	8005912 <HAL_DMA_Abort_IT+0x12>
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 800590a:	2304      	movs	r3, #4
 800590c:	6383      	str	r3, [r0, #56]	; 0x38
    status = HAL_ERROR;
 800590e:	2001      	movs	r0, #1
 8005910:	bd10      	pop	{r4, pc}
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005912:	6803      	ldr	r3, [r0, #0]
 8005914:	681a      	ldr	r2, [r3, #0]
 8005916:	f022 020e 	bic.w	r2, r2, #14
 800591a:	601a      	str	r2, [r3, #0]
    __HAL_DMA_DISABLE(hdma);
 800591c:	681a      	ldr	r2, [r3, #0]
 800591e:	f022 0201 	bic.w	r2, r2, #1
 8005922:	601a      	str	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8005924:	4a29      	ldr	r2, [pc, #164]	; (80059cc <HAL_DMA_Abort_IT+0xcc>)
 8005926:	4293      	cmp	r3, r2
 8005928:	d924      	bls.n	8005974 <HAL_DMA_Abort_IT+0x74>
 800592a:	f502 7262 	add.w	r2, r2, #904	; 0x388
 800592e:	4293      	cmp	r3, r2
 8005930:	d019      	beq.n	8005966 <HAL_DMA_Abort_IT+0x66>
 8005932:	3214      	adds	r2, #20
 8005934:	4293      	cmp	r3, r2
 8005936:	d018      	beq.n	800596a <HAL_DMA_Abort_IT+0x6a>
 8005938:	3214      	adds	r2, #20
 800593a:	4293      	cmp	r3, r2
 800593c:	d017      	beq.n	800596e <HAL_DMA_Abort_IT+0x6e>
 800593e:	3214      	adds	r2, #20
 8005940:	4293      	cmp	r3, r2
 8005942:	bf0c      	ite	eq
 8005944:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 8005948:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 800594c:	4a20      	ldr	r2, [pc, #128]	; (80059d0 <HAL_DMA_Abort_IT+0xd0>)
 800594e:	6053      	str	r3, [r2, #4]
    hdma->State = HAL_DMA_STATE_READY;
 8005950:	2301      	movs	r3, #1
    __HAL_UNLOCK(hdma);
 8005952:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 8005954:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    if(hdma->XferAbortCallback != NULL)
 8005958:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 800595a:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 800595e:	b39b      	cbz	r3, 80059c8 <HAL_DMA_Abort_IT+0xc8>
      hdma->XferAbortCallback(hdma);
 8005960:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8005962:	4620      	mov	r0, r4
 8005964:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8005966:	2301      	movs	r3, #1
 8005968:	e7f0      	b.n	800594c <HAL_DMA_Abort_IT+0x4c>
 800596a:	2310      	movs	r3, #16
 800596c:	e7ee      	b.n	800594c <HAL_DMA_Abort_IT+0x4c>
 800596e:	f44f 7380 	mov.w	r3, #256	; 0x100
 8005972:	e7eb      	b.n	800594c <HAL_DMA_Abort_IT+0x4c>
 8005974:	4917      	ldr	r1, [pc, #92]	; (80059d4 <HAL_DMA_Abort_IT+0xd4>)
 8005976:	428b      	cmp	r3, r1
 8005978:	d016      	beq.n	80059a8 <HAL_DMA_Abort_IT+0xa8>
 800597a:	3114      	adds	r1, #20
 800597c:	428b      	cmp	r3, r1
 800597e:	d015      	beq.n	80059ac <HAL_DMA_Abort_IT+0xac>
 8005980:	3114      	adds	r1, #20
 8005982:	428b      	cmp	r3, r1
 8005984:	d014      	beq.n	80059b0 <HAL_DMA_Abort_IT+0xb0>
 8005986:	3114      	adds	r1, #20
 8005988:	428b      	cmp	r3, r1
 800598a:	d014      	beq.n	80059b6 <HAL_DMA_Abort_IT+0xb6>
 800598c:	3114      	adds	r1, #20
 800598e:	428b      	cmp	r3, r1
 8005990:	d014      	beq.n	80059bc <HAL_DMA_Abort_IT+0xbc>
 8005992:	3114      	adds	r1, #20
 8005994:	428b      	cmp	r3, r1
 8005996:	d014      	beq.n	80059c2 <HAL_DMA_Abort_IT+0xc2>
 8005998:	4293      	cmp	r3, r2
 800599a:	bf14      	ite	ne
 800599c:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 80059a0:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 80059a4:	4a0c      	ldr	r2, [pc, #48]	; (80059d8 <HAL_DMA_Abort_IT+0xd8>)
 80059a6:	e7d2      	b.n	800594e <HAL_DMA_Abort_IT+0x4e>
 80059a8:	2301      	movs	r3, #1
 80059aa:	e7fb      	b.n	80059a4 <HAL_DMA_Abort_IT+0xa4>
 80059ac:	2310      	movs	r3, #16
 80059ae:	e7f9      	b.n	80059a4 <HAL_DMA_Abort_IT+0xa4>
 80059b0:	f44f 7380 	mov.w	r3, #256	; 0x100
 80059b4:	e7f6      	b.n	80059a4 <HAL_DMA_Abort_IT+0xa4>
 80059b6:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 80059ba:	e7f3      	b.n	80059a4 <HAL_DMA_Abort_IT+0xa4>
 80059bc:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 80059c0:	e7f0      	b.n	80059a4 <HAL_DMA_Abort_IT+0xa4>
 80059c2:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 80059c6:	e7ed      	b.n	80059a4 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 80059c8:	4618      	mov	r0, r3
}
 80059ca:	bd10      	pop	{r4, pc}
 80059cc:	40020080 	.word	0x40020080
 80059d0:	40020400 	.word	0x40020400
 80059d4:	40020008 	.word	0x40020008
 80059d8:	40020000 	.word	0x40020000

080059dc <HAL_DMA_IRQHandler>:
{
 80059dc:	b470      	push	{r4, r5, r6}
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 80059de:	2504      	movs	r5, #4
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 80059e0:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 80059e2:	6c02      	ldr	r2, [r0, #64]	; 0x40
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 80059e4:	6834      	ldr	r4, [r6, #0]
  uint32_t source_it = hdma->Instance->CCR;
 80059e6:	6803      	ldr	r3, [r0, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 80059e8:	4095      	lsls	r5, r2
 80059ea:	4225      	tst	r5, r4
  uint32_t source_it = hdma->Instance->CCR;
 80059ec:	6819      	ldr	r1, [r3, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 80059ee:	d055      	beq.n	8005a9c <HAL_DMA_IRQHandler+0xc0>
 80059f0:	074d      	lsls	r5, r1, #29
 80059f2:	d553      	bpl.n	8005a9c <HAL_DMA_IRQHandler+0xc0>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 80059f4:	681a      	ldr	r2, [r3, #0]
 80059f6:	0696      	lsls	r6, r2, #26
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 80059f8:	bf5e      	ittt	pl
 80059fa:	681a      	ldrpl	r2, [r3, #0]
 80059fc:	f022 0204 	bicpl.w	r2, r2, #4
 8005a00:	601a      	strpl	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8005a02:	4a60      	ldr	r2, [pc, #384]	; (8005b84 <HAL_DMA_IRQHandler+0x1a8>)
 8005a04:	4293      	cmp	r3, r2
 8005a06:	d91f      	bls.n	8005a48 <HAL_DMA_IRQHandler+0x6c>
 8005a08:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005a0c:	4293      	cmp	r3, r2
 8005a0e:	d014      	beq.n	8005a3a <HAL_DMA_IRQHandler+0x5e>
 8005a10:	3214      	adds	r2, #20
 8005a12:	4293      	cmp	r3, r2
 8005a14:	d013      	beq.n	8005a3e <HAL_DMA_IRQHandler+0x62>
 8005a16:	3214      	adds	r2, #20
 8005a18:	4293      	cmp	r3, r2
 8005a1a:	d012      	beq.n	8005a42 <HAL_DMA_IRQHandler+0x66>
 8005a1c:	3214      	adds	r2, #20
 8005a1e:	4293      	cmp	r3, r2
 8005a20:	bf0c      	ite	eq
 8005a22:	f44f 4380 	moveq.w	r3, #16384	; 0x4000
 8005a26:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 8005a2a:	4a57      	ldr	r2, [pc, #348]	; (8005b88 <HAL_DMA_IRQHandler+0x1ac>)
 8005a2c:	6053      	str	r3, [r2, #4]
    if(hdma->XferHalfCpltCallback != NULL)
 8005a2e:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
    if (hdma->XferErrorCallback != NULL)
 8005a30:	2b00      	cmp	r3, #0
 8005a32:	f000 80a5 	beq.w	8005b80 <HAL_DMA_IRQHandler+0x1a4>
}
 8005a36:	bc70      	pop	{r4, r5, r6}
      hdma->XferErrorCallback(hdma);
 8005a38:	4718      	bx	r3
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8005a3a:	2304      	movs	r3, #4
 8005a3c:	e7f5      	b.n	8005a2a <HAL_DMA_IRQHandler+0x4e>
 8005a3e:	2340      	movs	r3, #64	; 0x40
 8005a40:	e7f3      	b.n	8005a2a <HAL_DMA_IRQHandler+0x4e>
 8005a42:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005a46:	e7f0      	b.n	8005a2a <HAL_DMA_IRQHandler+0x4e>
 8005a48:	4950      	ldr	r1, [pc, #320]	; (8005b8c <HAL_DMA_IRQHandler+0x1b0>)
 8005a4a:	428b      	cmp	r3, r1
 8005a4c:	d016      	beq.n	8005a7c <HAL_DMA_IRQHandler+0xa0>
 8005a4e:	3114      	adds	r1, #20
 8005a50:	428b      	cmp	r3, r1
 8005a52:	d015      	beq.n	8005a80 <HAL_DMA_IRQHandler+0xa4>
 8005a54:	3114      	adds	r1, #20
 8005a56:	428b      	cmp	r3, r1
 8005a58:	d014      	beq.n	8005a84 <HAL_DMA_IRQHandler+0xa8>
 8005a5a:	3114      	adds	r1, #20
 8005a5c:	428b      	cmp	r3, r1
 8005a5e:	d014      	beq.n	8005a8a <HAL_DMA_IRQHandler+0xae>
 8005a60:	3114      	adds	r1, #20
 8005a62:	428b      	cmp	r3, r1
 8005a64:	d014      	beq.n	8005a90 <HAL_DMA_IRQHandler+0xb4>
 8005a66:	3114      	adds	r1, #20
 8005a68:	428b      	cmp	r3, r1
 8005a6a:	d014      	beq.n	8005a96 <HAL_DMA_IRQHandler+0xba>
 8005a6c:	4293      	cmp	r3, r2
 8005a6e:	bf14      	ite	ne
 8005a70:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 8005a74:	f04f 6380 	moveq.w	r3, #67108864	; 0x4000000
 8005a78:	4a45      	ldr	r2, [pc, #276]	; (8005b90 <HAL_DMA_IRQHandler+0x1b4>)
 8005a7a:	e7d7      	b.n	8005a2c <HAL_DMA_IRQHandler+0x50>
 8005a7c:	2304      	movs	r3, #4
 8005a7e:	e7fb      	b.n	8005a78 <HAL_DMA_IRQHandler+0x9c>
 8005a80:	2340      	movs	r3, #64	; 0x40
 8005a82:	e7f9      	b.n	8005a78 <HAL_DMA_IRQHandler+0x9c>
 8005a84:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005a88:	e7f6      	b.n	8005a78 <HAL_DMA_IRQHandler+0x9c>
 8005a8a:	f44f 4380 	mov.w	r3, #16384	; 0x4000
 8005a8e:	e7f3      	b.n	8005a78 <HAL_DMA_IRQHandler+0x9c>
 8005a90:	f44f 2380 	mov.w	r3, #262144	; 0x40000
 8005a94:	e7f0      	b.n	8005a78 <HAL_DMA_IRQHandler+0x9c>
 8005a96:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
 8005a9a:	e7ed      	b.n	8005a78 <HAL_DMA_IRQHandler+0x9c>
  else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
 8005a9c:	2502      	movs	r5, #2
 8005a9e:	4095      	lsls	r5, r2
 8005aa0:	4225      	tst	r5, r4
 8005aa2:	d057      	beq.n	8005b54 <HAL_DMA_IRQHandler+0x178>
 8005aa4:	078d      	lsls	r5, r1, #30
 8005aa6:	d555      	bpl.n	8005b54 <HAL_DMA_IRQHandler+0x178>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005aa8:	681a      	ldr	r2, [r3, #0]
 8005aaa:	0694      	lsls	r4, r2, #26
 8005aac:	d406      	bmi.n	8005abc <HAL_DMA_IRQHandler+0xe0>
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  
 8005aae:	681a      	ldr	r2, [r3, #0]
 8005ab0:	f022 020a 	bic.w	r2, r2, #10
 8005ab4:	601a      	str	r2, [r3, #0]
      hdma->State = HAL_DMA_STATE_READY;
 8005ab6:	2201      	movs	r2, #1
 8005ab8:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8005abc:	4a31      	ldr	r2, [pc, #196]	; (8005b84 <HAL_DMA_IRQHandler+0x1a8>)
 8005abe:	4293      	cmp	r3, r2
 8005ac0:	d91e      	bls.n	8005b00 <HAL_DMA_IRQHandler+0x124>
 8005ac2:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005ac6:	4293      	cmp	r3, r2
 8005ac8:	d013      	beq.n	8005af2 <HAL_DMA_IRQHandler+0x116>
 8005aca:	3214      	adds	r2, #20
 8005acc:	4293      	cmp	r3, r2
 8005ace:	d012      	beq.n	8005af6 <HAL_DMA_IRQHandler+0x11a>
 8005ad0:	3214      	adds	r2, #20
 8005ad2:	4293      	cmp	r3, r2
 8005ad4:	d011      	beq.n	8005afa <HAL_DMA_IRQHandler+0x11e>
 8005ad6:	3214      	adds	r2, #20
 8005ad8:	4293      	cmp	r3, r2
 8005ada:	bf0c      	ite	eq
 8005adc:	f44f 5300 	moveq.w	r3, #8192	; 0x2000
 8005ae0:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005ae4:	4a28      	ldr	r2, [pc, #160]	; (8005b88 <HAL_DMA_IRQHandler+0x1ac>)
 8005ae6:	6053      	str	r3, [r2, #4]
    __HAL_UNLOCK(hdma);
 8005ae8:	2300      	movs	r3, #0
 8005aea:	f880 3020 	strb.w	r3, [r0, #32]
    if(hdma->XferCpltCallback != NULL)
 8005aee:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005af0:	e79e      	b.n	8005a30 <HAL_DMA_IRQHandler+0x54>
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8005af2:	2302      	movs	r3, #2
 8005af4:	e7f6      	b.n	8005ae4 <HAL_DMA_IRQHandler+0x108>
 8005af6:	2320      	movs	r3, #32
 8005af8:	e7f4      	b.n	8005ae4 <HAL_DMA_IRQHandler+0x108>
 8005afa:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005afe:	e7f1      	b.n	8005ae4 <HAL_DMA_IRQHandler+0x108>
 8005b00:	4922      	ldr	r1, [pc, #136]	; (8005b8c <HAL_DMA_IRQHandler+0x1b0>)
 8005b02:	428b      	cmp	r3, r1
 8005b04:	d016      	beq.n	8005b34 <HAL_DMA_IRQHandler+0x158>
 8005b06:	3114      	adds	r1, #20
 8005b08:	428b      	cmp	r3, r1
 8005b0a:	d015      	beq.n	8005b38 <HAL_DMA_IRQHandler+0x15c>
 8005b0c:	3114      	adds	r1, #20
 8005b0e:	428b      	cmp	r3, r1
 8005b10:	d014      	beq.n	8005b3c <HAL_DMA_IRQHandler+0x160>
 8005b12:	3114      	adds	r1, #20
 8005b14:	428b      	cmp	r3, r1
 8005b16:	d014      	beq.n	8005b42 <HAL_DMA_IRQHandler+0x166>
 8005b18:	3114      	adds	r1, #20
 8005b1a:	428b      	cmp	r3, r1
 8005b1c:	d014      	beq.n	8005b48 <HAL_DMA_IRQHandler+0x16c>
 8005b1e:	3114      	adds	r1, #20
 8005b20:	428b      	cmp	r3, r1
 8005b22:	d014      	beq.n	8005b4e <HAL_DMA_IRQHandler+0x172>
 8005b24:	4293      	cmp	r3, r2
 8005b26:	bf14      	ite	ne
 8005b28:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005b2c:	f04f 7300 	moveq.w	r3, #33554432	; 0x2000000
 8005b30:	4a17      	ldr	r2, [pc, #92]	; (8005b90 <HAL_DMA_IRQHandler+0x1b4>)
 8005b32:	e7d8      	b.n	8005ae6 <HAL_DMA_IRQHandler+0x10a>
 8005b34:	2302      	movs	r3, #2
 8005b36:	e7fb      	b.n	8005b30 <HAL_DMA_IRQHandler+0x154>
 8005b38:	2320      	movs	r3, #32
 8005b3a:	e7f9      	b.n	8005b30 <HAL_DMA_IRQHandler+0x154>
 8005b3c:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005b40:	e7f6      	b.n	8005b30 <HAL_DMA_IRQHandler+0x154>
 8005b42:	f44f 5300 	mov.w	r3, #8192	; 0x2000
 8005b46:	e7f3      	b.n	8005b30 <HAL_DMA_IRQHandler+0x154>
 8005b48:	f44f 3300 	mov.w	r3, #131072	; 0x20000
 8005b4c:	e7f0      	b.n	8005b30 <HAL_DMA_IRQHandler+0x154>
 8005b4e:	f44f 1300 	mov.w	r3, #2097152	; 0x200000
 8005b52:	e7ed      	b.n	8005b30 <HAL_DMA_IRQHandler+0x154>
  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
 8005b54:	2508      	movs	r5, #8
 8005b56:	4095      	lsls	r5, r2
 8005b58:	4225      	tst	r5, r4
 8005b5a:	d011      	beq.n	8005b80 <HAL_DMA_IRQHandler+0x1a4>
 8005b5c:	0709      	lsls	r1, r1, #28
 8005b5e:	d50f      	bpl.n	8005b80 <HAL_DMA_IRQHandler+0x1a4>
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005b60:	6819      	ldr	r1, [r3, #0]
 8005b62:	f021 010e 	bic.w	r1, r1, #14
 8005b66:	6019      	str	r1, [r3, #0]
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 8005b68:	2301      	movs	r3, #1
 8005b6a:	fa03 f202 	lsl.w	r2, r3, r2
 8005b6e:	6072      	str	r2, [r6, #4]
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
 8005b70:	6383      	str	r3, [r0, #56]	; 0x38
    hdma->State = HAL_DMA_STATE_READY;
 8005b72:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    __HAL_UNLOCK(hdma);
 8005b76:	2300      	movs	r3, #0
 8005b78:	f880 3020 	strb.w	r3, [r0, #32]
    if (hdma->XferErrorCallback != NULL)
 8005b7c:	6b03      	ldr	r3, [r0, #48]	; 0x30
 8005b7e:	e757      	b.n	8005a30 <HAL_DMA_IRQHandler+0x54>
}
 8005b80:	bc70      	pop	{r4, r5, r6}
 8005b82:	4770      	bx	lr
 8005b84:	40020080 	.word	0x40020080
 8005b88:	40020400 	.word	0x40020400
 8005b8c:	40020008 	.word	0x40020008
 8005b90:	40020000 	.word	0x40020000

08005b94 <FLASH_SetErrorCode>:
  uint32_t flags = 0U;
  
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
 8005b94:	4a11      	ldr	r2, [pc, #68]	; (8005bdc <FLASH_SetErrorCode+0x48>)
 8005b96:	68d3      	ldr	r3, [r2, #12]
 8005b98:	f013 0310 	ands.w	r3, r3, #16
 8005b9c:	d005      	beq.n	8005baa <FLASH_SetErrorCode+0x16>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
 8005b9e:	4910      	ldr	r1, [pc, #64]	; (8005be0 <FLASH_SetErrorCode+0x4c>)
 8005ba0:	69cb      	ldr	r3, [r1, #28]
 8005ba2:	f043 0302 	orr.w	r3, r3, #2
 8005ba6:	61cb      	str	r3, [r1, #28]
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
    flags |= FLASH_FLAG_WRPERR;
 8005ba8:	2310      	movs	r3, #16
#endif /* FLASH_BANK2_END */
  }
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 8005baa:	68d2      	ldr	r2, [r2, #12]
 8005bac:	0750      	lsls	r0, r2, #29
 8005bae:	d506      	bpl.n	8005bbe <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 8005bb0:	490b      	ldr	r1, [pc, #44]	; (8005be0 <FLASH_SetErrorCode+0x4c>)
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
    flags |= FLASH_FLAG_PGERR;
 8005bb2:	f043 0304 	orr.w	r3, r3, #4
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 8005bb6:	69ca      	ldr	r2, [r1, #28]
 8005bb8:	f042 0201 	orr.w	r2, r2, #1
 8005bbc:	61ca      	str	r2, [r1, #28]
#endif /* FLASH_BANK2_END */
  }
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
 8005bbe:	4a07      	ldr	r2, [pc, #28]	; (8005bdc <FLASH_SetErrorCode+0x48>)
 8005bc0:	69d1      	ldr	r1, [r2, #28]
 8005bc2:	07c9      	lsls	r1, r1, #31
 8005bc4:	d508      	bpl.n	8005bd8 <FLASH_SetErrorCode+0x44>
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
 8005bc6:	4806      	ldr	r0, [pc, #24]	; (8005be0 <FLASH_SetErrorCode+0x4c>)
 8005bc8:	69c1      	ldr	r1, [r0, #28]
 8005bca:	f041 0104 	orr.w	r1, r1, #4
 8005bce:	61c1      	str	r1, [r0, #28]
  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
 8005bd0:	69d1      	ldr	r1, [r2, #28]
 8005bd2:	f021 0101 	bic.w	r1, r1, #1
 8005bd6:	61d1      	str	r1, [r2, #28]
  }

  /* Clear FLASH error pending bits */
  __HAL_FLASH_CLEAR_FLAG(flags);
 8005bd8:	60d3      	str	r3, [r2, #12]
 8005bda:	4770      	bx	lr
 8005bdc:	40022000 	.word	0x40022000
 8005be0:	20000480 	.word	0x20000480

08005be4 <HAL_FLASH_Unlock>:
  if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8005be4:	4b06      	ldr	r3, [pc, #24]	; (8005c00 <HAL_FLASH_Unlock+0x1c>)
 8005be6:	6918      	ldr	r0, [r3, #16]
 8005be8:	f010 0080 	ands.w	r0, r0, #128	; 0x80
 8005bec:	d007      	beq.n	8005bfe <HAL_FLASH_Unlock+0x1a>
    WRITE_REG(FLASH->KEYR, FLASH_KEY1);
 8005bee:	4a05      	ldr	r2, [pc, #20]	; (8005c04 <HAL_FLASH_Unlock+0x20>)
 8005bf0:	605a      	str	r2, [r3, #4]
    WRITE_REG(FLASH->KEYR, FLASH_KEY2);
 8005bf2:	f102 3288 	add.w	r2, r2, #2290649224	; 0x88888888
 8005bf6:	605a      	str	r2, [r3, #4]
    if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8005bf8:	6918      	ldr	r0, [r3, #16]
  HAL_StatusTypeDef status = HAL_OK;
 8005bfa:	f3c0 10c0 	ubfx	r0, r0, #7, #1
}
 8005bfe:	4770      	bx	lr
 8005c00:	40022000 	.word	0x40022000
 8005c04:	45670123 	.word	0x45670123

08005c08 <HAL_FLASH_Lock>:
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8005c08:	4a03      	ldr	r2, [pc, #12]	; (8005c18 <HAL_FLASH_Lock+0x10>)
}
 8005c0a:	2000      	movs	r0, #0
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8005c0c:	6913      	ldr	r3, [r2, #16]
 8005c0e:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8005c12:	6113      	str	r3, [r2, #16]
}
 8005c14:	4770      	bx	lr
 8005c16:	bf00      	nop
 8005c18:	40022000 	.word	0x40022000

08005c1c <FLASH_WaitForLastOperation>:
{
 8005c1c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8005c1e:	4606      	mov	r6, r0
  uint32_t tickstart = HAL_GetTick();
 8005c20:	f7ff fad6 	bl	80051d0 <HAL_GetTick>
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 8005c24:	4c11      	ldr	r4, [pc, #68]	; (8005c6c <FLASH_WaitForLastOperation+0x50>)
  uint32_t tickstart = HAL_GetTick();
 8005c26:	4607      	mov	r7, r0
 8005c28:	4625      	mov	r5, r4
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 8005c2a:	68e3      	ldr	r3, [r4, #12]
 8005c2c:	07d8      	lsls	r0, r3, #31
 8005c2e:	d412      	bmi.n	8005c56 <FLASH_WaitForLastOperation+0x3a>
  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
 8005c30:	68e3      	ldr	r3, [r4, #12]
 8005c32:	0699      	lsls	r1, r3, #26
    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
 8005c34:	bf44      	itt	mi
 8005c36:	2320      	movmi	r3, #32
 8005c38:	60e3      	strmi	r3, [r4, #12]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 8005c3a:	68eb      	ldr	r3, [r5, #12]
 8005c3c:	06da      	lsls	r2, r3, #27
 8005c3e:	d406      	bmi.n	8005c4e <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8005c40:	69eb      	ldr	r3, [r5, #28]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 8005c42:	07db      	lsls	r3, r3, #31
 8005c44:	d403      	bmi.n	8005c4e <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 8005c46:	68e8      	ldr	r0, [r5, #12]
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8005c48:	f010 0004 	ands.w	r0, r0, #4
 8005c4c:	d002      	beq.n	8005c54 <FLASH_WaitForLastOperation+0x38>
    FLASH_SetErrorCode();
 8005c4e:	f7ff ffa1 	bl	8005b94 <FLASH_SetErrorCode>
    return HAL_ERROR;
 8005c52:	2001      	movs	r0, #1
}
 8005c54:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if (Timeout != HAL_MAX_DELAY)
 8005c56:	1c73      	adds	r3, r6, #1
 8005c58:	d0e7      	beq.n	8005c2a <FLASH_WaitForLastOperation+0xe>
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8005c5a:	b90e      	cbnz	r6, 8005c60 <FLASH_WaitForLastOperation+0x44>
        return HAL_TIMEOUT;
 8005c5c:	2003      	movs	r0, #3
 8005c5e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8005c60:	f7ff fab6 	bl	80051d0 <HAL_GetTick>
 8005c64:	1bc0      	subs	r0, r0, r7
 8005c66:	4286      	cmp	r6, r0
 8005c68:	d2df      	bcs.n	8005c2a <FLASH_WaitForLastOperation+0xe>
 8005c6a:	e7f7      	b.n	8005c5c <FLASH_WaitForLastOperation+0x40>
 8005c6c:	40022000 	.word	0x40022000

08005c70 <HAL_FLASH_Program>:
{
 8005c70:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  __HAL_LOCK(&pFlash);
 8005c74:	4c1f      	ldr	r4, [pc, #124]	; (8005cf4 <HAL_FLASH_Program+0x84>)
{
 8005c76:	4699      	mov	r9, r3
  __HAL_LOCK(&pFlash);
 8005c78:	7e23      	ldrb	r3, [r4, #24]
{
 8005c7a:	4605      	mov	r5, r0
  __HAL_LOCK(&pFlash);
 8005c7c:	2b01      	cmp	r3, #1
{
 8005c7e:	460f      	mov	r7, r1
 8005c80:	4690      	mov	r8, r2
  __HAL_LOCK(&pFlash);
 8005c82:	d033      	beq.n	8005cec <HAL_FLASH_Program+0x7c>
 8005c84:	2301      	movs	r3, #1
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8005c86:	f24c 3050 	movw	r0, #50000	; 0xc350
  __HAL_LOCK(&pFlash);
 8005c8a:	7623      	strb	r3, [r4, #24]
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8005c8c:	f7ff ffc6 	bl	8005c1c <FLASH_WaitForLastOperation>
  if(status == HAL_OK)
 8005c90:	bb40      	cbnz	r0, 8005ce4 <HAL_FLASH_Program+0x74>
    if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
 8005c92:	2d01      	cmp	r5, #1
 8005c94:	d003      	beq.n	8005c9e <HAL_FLASH_Program+0x2e>
      nbiterations = 4U;
 8005c96:	2d02      	cmp	r5, #2
 8005c98:	bf0c      	ite	eq
 8005c9a:	2502      	moveq	r5, #2
 8005c9c:	2504      	movne	r5, #4
 8005c9e:	2600      	movs	r6, #0
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8005ca0:	46b2      	mov	sl, r6
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8005ca2:	f8df b054 	ldr.w	fp, [pc, #84]	; 8005cf8 <HAL_FLASH_Program+0x88>
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 8005ca6:	0132      	lsls	r2, r6, #4
 8005ca8:	4640      	mov	r0, r8
 8005caa:	4649      	mov	r1, r9
 8005cac:	f7fe fac4 	bl	8004238 <__aeabi_llsr>
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8005cb0:	f8c4 a01c 	str.w	sl, [r4, #28]
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8005cb4:	f8db 3010 	ldr.w	r3, [fp, #16]
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 8005cb8:	b280      	uxth	r0, r0
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8005cba:	f043 0301 	orr.w	r3, r3, #1
 8005cbe:	f8cb 3010 	str.w	r3, [fp, #16]
  *(__IO uint16_t*)Address = Data;
 8005cc2:	f827 0016 	strh.w	r0, [r7, r6, lsl #1]
        status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8005cc6:	f24c 3050 	movw	r0, #50000	; 0xc350
 8005cca:	f7ff ffa7 	bl	8005c1c <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
 8005cce:	f8db 3010 	ldr.w	r3, [fp, #16]
 8005cd2:	f023 0301 	bic.w	r3, r3, #1
 8005cd6:	f8cb 3010 	str.w	r3, [fp, #16]
      if (status != HAL_OK)
 8005cda:	b918      	cbnz	r0, 8005ce4 <HAL_FLASH_Program+0x74>
 8005cdc:	3601      	adds	r6, #1
    for (index = 0U; index < nbiterations; index++)
 8005cde:	b2f3      	uxtb	r3, r6
 8005ce0:	429d      	cmp	r5, r3
 8005ce2:	d8e0      	bhi.n	8005ca6 <HAL_FLASH_Program+0x36>
  __HAL_UNLOCK(&pFlash);
 8005ce4:	2300      	movs	r3, #0
 8005ce6:	7623      	strb	r3, [r4, #24]
  return status;
 8005ce8:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
  __HAL_LOCK(&pFlash);
 8005cec:	2002      	movs	r0, #2
}
 8005cee:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8005cf2:	bf00      	nop
 8005cf4:	20000480 	.word	0x20000480
 8005cf8:	40022000 	.word	0x40022000

08005cfc <FLASH_MassErase.isra.0>:
{
  /* Check the parameters */
  assert_param(IS_FLASH_BANK(Banks));

  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8005cfc:	2200      	movs	r2, #0
 8005cfe:	4b06      	ldr	r3, [pc, #24]	; (8005d18 <FLASH_MassErase.isra.0+0x1c>)
 8005d00:	61da      	str	r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
  /* Prevent unused argument(s) compilation warning */
  UNUSED(Banks);
#endif /* FLASH_BANK2_END */  
    /* Only bank1 will be erased*/
    SET_BIT(FLASH->CR, FLASH_CR_MER);
 8005d02:	4b06      	ldr	r3, [pc, #24]	; (8005d1c <FLASH_MassErase.isra.0+0x20>)
 8005d04:	691a      	ldr	r2, [r3, #16]
 8005d06:	f042 0204 	orr.w	r2, r2, #4
 8005d0a:	611a      	str	r2, [r3, #16]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 8005d0c:	691a      	ldr	r2, [r3, #16]
 8005d0e:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8005d12:	611a      	str	r2, [r3, #16]
 8005d14:	4770      	bx	lr
 8005d16:	bf00      	nop
 8005d18:	20000480 	.word	0x20000480
 8005d1c:	40022000 	.word	0x40022000

08005d20 <FLASH_PageErase>:
  * @retval None
  */
void FLASH_PageErase(uint32_t PageAddress)
{
  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8005d20:	2200      	movs	r2, #0
 8005d22:	4b06      	ldr	r3, [pc, #24]	; (8005d3c <FLASH_PageErase+0x1c>)
 8005d24:	61da      	str	r2, [r3, #28]
  }
  else
  {
#endif /* FLASH_BANK2_END */
    /* Proceed to erase the page */
    SET_BIT(FLASH->CR, FLASH_CR_PER);
 8005d26:	4b06      	ldr	r3, [pc, #24]	; (8005d40 <FLASH_PageErase+0x20>)
 8005d28:	691a      	ldr	r2, [r3, #16]
 8005d2a:	f042 0202 	orr.w	r2, r2, #2
 8005d2e:	611a      	str	r2, [r3, #16]
    WRITE_REG(FLASH->AR, PageAddress);
 8005d30:	6158      	str	r0, [r3, #20]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 8005d32:	691a      	ldr	r2, [r3, #16]
 8005d34:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8005d38:	611a      	str	r2, [r3, #16]
 8005d3a:	4770      	bx	lr
 8005d3c:	20000480 	.word	0x20000480
 8005d40:	40022000 	.word	0x40022000

08005d44 <HAL_FLASHEx_Erase>:
{
 8005d44:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  __HAL_LOCK(&pFlash);
 8005d48:	4d23      	ldr	r5, [pc, #140]	; (8005dd8 <HAL_FLASHEx_Erase+0x94>)
{
 8005d4a:	4607      	mov	r7, r0
  __HAL_LOCK(&pFlash);
 8005d4c:	7e2b      	ldrb	r3, [r5, #24]
{
 8005d4e:	4688      	mov	r8, r1
  __HAL_LOCK(&pFlash);
 8005d50:	2b01      	cmp	r3, #1
 8005d52:	d03d      	beq.n	8005dd0 <HAL_FLASHEx_Erase+0x8c>
 8005d54:	2401      	movs	r4, #1
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 8005d56:	6803      	ldr	r3, [r0, #0]
  __HAL_LOCK(&pFlash);
 8005d58:	762c      	strb	r4, [r5, #24]
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 8005d5a:	2b02      	cmp	r3, #2
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 8005d5c:	f24c 3050 	movw	r0, #50000	; 0xc350
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 8005d60:	d113      	bne.n	8005d8a <HAL_FLASHEx_Erase+0x46>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 8005d62:	f7ff ff5b 	bl	8005c1c <FLASH_WaitForLastOperation>
 8005d66:	b120      	cbz	r0, 8005d72 <HAL_FLASHEx_Erase+0x2e>
  HAL_StatusTypeDef status = HAL_ERROR;
 8005d68:	2001      	movs	r0, #1
  __HAL_UNLOCK(&pFlash);
 8005d6a:	2300      	movs	r3, #0
 8005d6c:	762b      	strb	r3, [r5, #24]
  return status;
 8005d6e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        FLASH_MassErase(FLASH_BANK_1);
 8005d72:	f7ff ffc3 	bl	8005cfc <FLASH_MassErase.isra.0>
        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 8005d76:	f24c 3050 	movw	r0, #50000	; 0xc350
 8005d7a:	f7ff ff4f 	bl	8005c1c <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
 8005d7e:	4a17      	ldr	r2, [pc, #92]	; (8005ddc <HAL_FLASHEx_Erase+0x98>)
 8005d80:	6913      	ldr	r3, [r2, #16]
 8005d82:	f023 0304 	bic.w	r3, r3, #4
 8005d86:	6113      	str	r3, [r2, #16]
 8005d88:	e7ef      	b.n	8005d6a <HAL_FLASHEx_Erase+0x26>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 8005d8a:	f7ff ff47 	bl	8005c1c <FLASH_WaitForLastOperation>
 8005d8e:	2800      	cmp	r0, #0
 8005d90:	d1ea      	bne.n	8005d68 <HAL_FLASHEx_Erase+0x24>
        *PageError = 0xFFFFFFFFU;
 8005d92:	f04f 33ff 	mov.w	r3, #4294967295
 8005d96:	f8c8 3000 	str.w	r3, [r8]
  HAL_StatusTypeDef status = HAL_ERROR;
 8005d9a:	4620      	mov	r0, r4
        for(address = pEraseInit->PageAddress;
 8005d9c:	68be      	ldr	r6, [r7, #8]
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 8005d9e:	4c0f      	ldr	r4, [pc, #60]	; (8005ddc <HAL_FLASHEx_Erase+0x98>)
            address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
 8005da0:	68fa      	ldr	r2, [r7, #12]
 8005da2:	68bb      	ldr	r3, [r7, #8]
 8005da4:	eb03 23c2 	add.w	r3, r3, r2, lsl #11
        for(address = pEraseInit->PageAddress;
 8005da8:	429e      	cmp	r6, r3
 8005daa:	d2de      	bcs.n	8005d6a <HAL_FLASHEx_Erase+0x26>
          FLASH_PageErase(address);
 8005dac:	4630      	mov	r0, r6
 8005dae:	f7ff ffb7 	bl	8005d20 <FLASH_PageErase>
          status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 8005db2:	f24c 3050 	movw	r0, #50000	; 0xc350
 8005db6:	f7ff ff31 	bl	8005c1c <FLASH_WaitForLastOperation>
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 8005dba:	6923      	ldr	r3, [r4, #16]
 8005dbc:	f023 0302 	bic.w	r3, r3, #2
 8005dc0:	6123      	str	r3, [r4, #16]
          if (status != HAL_OK)
 8005dc2:	b110      	cbz	r0, 8005dca <HAL_FLASHEx_Erase+0x86>
            *PageError = address;
 8005dc4:	f8c8 6000 	str.w	r6, [r8]
            break;
 8005dc8:	e7cf      	b.n	8005d6a <HAL_FLASHEx_Erase+0x26>
            address += FLASH_PAGE_SIZE)
 8005dca:	f506 6600 	add.w	r6, r6, #2048	; 0x800
 8005dce:	e7e7      	b.n	8005da0 <HAL_FLASHEx_Erase+0x5c>
  __HAL_LOCK(&pFlash);
 8005dd0:	2002      	movs	r0, #2
}
 8005dd2:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8005dd6:	bf00      	nop
 8005dd8:	20000480 	.word	0x20000480
 8005ddc:	40022000 	.word	0x40022000

08005de0 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 8005de0:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 8005de4:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 8005de6:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 8005de8:	4f6c      	ldr	r7, [pc, #432]	; (8005f9c <HAL_GPIO_Init+0x1bc>)
 8005dea:	4b6d      	ldr	r3, [pc, #436]	; (8005fa0 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8005dec:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 8005fa8 <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 8005df0:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 8005fac <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 8005df4:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8005df8:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 8005dfa:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8005dfe:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 8005e02:	45a0      	cmp	r8, r4
 8005e04:	f040 8085 	bne.w	8005f12 <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 8005e08:	684d      	ldr	r5, [r1, #4]
 8005e0a:	2d12      	cmp	r5, #18
 8005e0c:	f000 80b7 	beq.w	8005f7e <HAL_GPIO_Init+0x19e>
 8005e10:	f200 808d 	bhi.w	8005f2e <HAL_GPIO_Init+0x14e>
 8005e14:	2d02      	cmp	r5, #2
 8005e16:	f000 80af 	beq.w	8005f78 <HAL_GPIO_Init+0x198>
 8005e1a:	f200 8081 	bhi.w	8005f20 <HAL_GPIO_Init+0x140>
 8005e1e:	2d00      	cmp	r5, #0
 8005e20:	f000 8091 	beq.w	8005f46 <HAL_GPIO_Init+0x166>
 8005e24:	2d01      	cmp	r5, #1
 8005e26:	f000 80a5 	beq.w	8005f74 <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8005e2a:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8005e2e:	2cff      	cmp	r4, #255	; 0xff
 8005e30:	bf93      	iteet	ls
 8005e32:	4682      	movls	sl, r0
 8005e34:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 8005e38:	3d08      	subhi	r5, #8
 8005e3a:	f8d0 b000 	ldrls.w	fp, [r0]
 8005e3e:	bf92      	itee	ls
 8005e40:	00b5      	lslls	r5, r6, #2
 8005e42:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 8005e46:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8005e48:	fa09 f805 	lsl.w	r8, r9, r5
 8005e4c:	ea2b 0808 	bic.w	r8, fp, r8
 8005e50:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8005e54:	bf88      	it	hi
 8005e56:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8005e5a:	ea48 0505 	orr.w	r5, r8, r5
 8005e5e:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 8005e62:	f8d1 a004 	ldr.w	sl, [r1, #4]
 8005e66:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 8005e6a:	d052      	beq.n	8005f12 <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 8005e6c:	69bd      	ldr	r5, [r7, #24]
 8005e6e:	f026 0803 	bic.w	r8, r6, #3
 8005e72:	f045 0501 	orr.w	r5, r5, #1
 8005e76:	61bd      	str	r5, [r7, #24]
 8005e78:	69bd      	ldr	r5, [r7, #24]
 8005e7a:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 8005e7e:	f005 0501 	and.w	r5, r5, #1
 8005e82:	9501      	str	r5, [sp, #4]
 8005e84:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8005e88:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 8005e8c:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8005e8e:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 8005e92:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8005e96:	fa09 f90b 	lsl.w	r9, r9, fp
 8005e9a:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8005e9e:	4d41      	ldr	r5, [pc, #260]	; (8005fa4 <HAL_GPIO_Init+0x1c4>)
 8005ea0:	42a8      	cmp	r0, r5
 8005ea2:	d071      	beq.n	8005f88 <HAL_GPIO_Init+0x1a8>
 8005ea4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005ea8:	42a8      	cmp	r0, r5
 8005eaa:	d06f      	beq.n	8005f8c <HAL_GPIO_Init+0x1ac>
 8005eac:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005eb0:	42a8      	cmp	r0, r5
 8005eb2:	d06d      	beq.n	8005f90 <HAL_GPIO_Init+0x1b0>
 8005eb4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005eb8:	42a8      	cmp	r0, r5
 8005eba:	d06b      	beq.n	8005f94 <HAL_GPIO_Init+0x1b4>
 8005ebc:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8005ec0:	42a8      	cmp	r0, r5
 8005ec2:	d069      	beq.n	8005f98 <HAL_GPIO_Init+0x1b8>
 8005ec4:	4570      	cmp	r0, lr
 8005ec6:	bf0c      	ite	eq
 8005ec8:	2505      	moveq	r5, #5
 8005eca:	2506      	movne	r5, #6
 8005ecc:	fa05 f50b 	lsl.w	r5, r5, fp
 8005ed0:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 8005ed4:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 8005ed8:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 8005eda:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 8005ede:	bf14      	ite	ne
 8005ee0:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 8005ee2:	43a5      	biceq	r5, r4
 8005ee4:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 8005ee6:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 8005ee8:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 8005eec:	bf14      	ite	ne
 8005eee:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 8005ef0:	43a5      	biceq	r5, r4
 8005ef2:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 8005ef4:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 8005ef6:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 8005efa:	bf14      	ite	ne
 8005efc:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 8005efe:	43a5      	biceq	r5, r4
 8005f00:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 8005f02:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 8005f04:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 8005f08:	bf14      	ite	ne
 8005f0a:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 8005f0c:	ea25 0404 	biceq.w	r4, r5, r4
 8005f10:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 8005f12:	3601      	adds	r6, #1
 8005f14:	2e10      	cmp	r6, #16
 8005f16:	f47f af6d 	bne.w	8005df4 <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 8005f1a:	b003      	add	sp, #12
 8005f1c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 8005f20:	2d03      	cmp	r5, #3
 8005f22:	d025      	beq.n	8005f70 <HAL_GPIO_Init+0x190>
 8005f24:	2d11      	cmp	r5, #17
 8005f26:	d180      	bne.n	8005e2a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 8005f28:	68ca      	ldr	r2, [r1, #12]
 8005f2a:	3204      	adds	r2, #4
          break;
 8005f2c:	e77d      	b.n	8005e2a <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8005f2e:	4565      	cmp	r5, ip
 8005f30:	d009      	beq.n	8005f46 <HAL_GPIO_Init+0x166>
 8005f32:	d812      	bhi.n	8005f5a <HAL_GPIO_Init+0x17a>
 8005f34:	f8df 9078 	ldr.w	r9, [pc, #120]	; 8005fb0 <HAL_GPIO_Init+0x1d0>
 8005f38:	454d      	cmp	r5, r9
 8005f3a:	d004      	beq.n	8005f46 <HAL_GPIO_Init+0x166>
 8005f3c:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8005f40:	454d      	cmp	r5, r9
 8005f42:	f47f af72 	bne.w	8005e2a <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 8005f46:	688a      	ldr	r2, [r1, #8]
 8005f48:	b1e2      	cbz	r2, 8005f84 <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 8005f4a:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 8005f4c:	bf0c      	ite	eq
 8005f4e:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 8005f52:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 8005f56:	2208      	movs	r2, #8
 8005f58:	e767      	b.n	8005e2a <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8005f5a:	f8df 9058 	ldr.w	r9, [pc, #88]	; 8005fb4 <HAL_GPIO_Init+0x1d4>
 8005f5e:	454d      	cmp	r5, r9
 8005f60:	d0f1      	beq.n	8005f46 <HAL_GPIO_Init+0x166>
 8005f62:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8005f66:	454d      	cmp	r5, r9
 8005f68:	d0ed      	beq.n	8005f46 <HAL_GPIO_Init+0x166>
 8005f6a:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 8005f6e:	e7e7      	b.n	8005f40 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8005f70:	2200      	movs	r2, #0
 8005f72:	e75a      	b.n	8005e2a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 8005f74:	68ca      	ldr	r2, [r1, #12]
          break;
 8005f76:	e758      	b.n	8005e2a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 8005f78:	68ca      	ldr	r2, [r1, #12]
 8005f7a:	3208      	adds	r2, #8
          break;
 8005f7c:	e755      	b.n	8005e2a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 8005f7e:	68ca      	ldr	r2, [r1, #12]
 8005f80:	320c      	adds	r2, #12
          break;
 8005f82:	e752      	b.n	8005e2a <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 8005f84:	2204      	movs	r2, #4
 8005f86:	e750      	b.n	8005e2a <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8005f88:	2500      	movs	r5, #0
 8005f8a:	e79f      	b.n	8005ecc <HAL_GPIO_Init+0xec>
 8005f8c:	2501      	movs	r5, #1
 8005f8e:	e79d      	b.n	8005ecc <HAL_GPIO_Init+0xec>
 8005f90:	2502      	movs	r5, #2
 8005f92:	e79b      	b.n	8005ecc <HAL_GPIO_Init+0xec>
 8005f94:	2503      	movs	r5, #3
 8005f96:	e799      	b.n	8005ecc <HAL_GPIO_Init+0xec>
 8005f98:	2504      	movs	r5, #4
 8005f9a:	e797      	b.n	8005ecc <HAL_GPIO_Init+0xec>
 8005f9c:	40021000 	.word	0x40021000
 8005fa0:	40010400 	.word	0x40010400
 8005fa4:	40010800 	.word	0x40010800
 8005fa8:	40011c00 	.word	0x40011c00
 8005fac:	10210000 	.word	0x10210000
 8005fb0:	10110000 	.word	0x10110000
 8005fb4:	10310000 	.word	0x10310000

08005fb8 <HAL_GPIO_ReadPin>:
  GPIO_PinState bitstatus;

  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
 8005fb8:	6883      	ldr	r3, [r0, #8]
 8005fba:	4219      	tst	r1, r3
  else
  {
    bitstatus = GPIO_PIN_RESET;
  }
  return bitstatus;
}
 8005fbc:	bf14      	ite	ne
 8005fbe:	2001      	movne	r0, #1
 8005fc0:	2000      	moveq	r0, #0
 8005fc2:	4770      	bx	lr

08005fc4 <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 8005fc4:	b10a      	cbz	r2, 8005fca <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 8005fc6:	6101      	str	r1, [r0, #16]
 8005fc8:	4770      	bx	lr
 8005fca:	0409      	lsls	r1, r1, #16
 8005fcc:	e7fb      	b.n	8005fc6 <HAL_GPIO_WritePin+0x2>

08005fce <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 8005fce:	68c3      	ldr	r3, [r0, #12]
 8005fd0:	4059      	eors	r1, r3
 8005fd2:	60c1      	str	r1, [r0, #12]
 8005fd4:	4770      	bx	lr
	...

08005fd8 <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005fd8:	6803      	ldr	r3, [r0, #0]
{
 8005fda:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005fde:	07db      	lsls	r3, r3, #31
{
 8005fe0:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8005fe2:	d410      	bmi.n	8006006 <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 8005fe4:	682b      	ldr	r3, [r5, #0]
 8005fe6:	079f      	lsls	r7, r3, #30
 8005fe8:	d45e      	bmi.n	80060a8 <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8005fea:	682b      	ldr	r3, [r5, #0]
 8005fec:	0719      	lsls	r1, r3, #28
 8005fee:	f100 8095 	bmi.w	800611c <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8005ff2:	682b      	ldr	r3, [r5, #0]
 8005ff4:	075a      	lsls	r2, r3, #29
 8005ff6:	f100 80bf 	bmi.w	8006178 <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8005ffa:	69ea      	ldr	r2, [r5, #28]
 8005ffc:	2a00      	cmp	r2, #0
 8005ffe:	f040 812d 	bne.w	800625c <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 8006002:	2000      	movs	r0, #0
 8006004:	e014      	b.n	8006030 <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 8006006:	4c90      	ldr	r4, [pc, #576]	; (8006248 <HAL_RCC_OscConfig+0x270>)
 8006008:	6863      	ldr	r3, [r4, #4]
 800600a:	f003 030c 	and.w	r3, r3, #12
 800600e:	2b04      	cmp	r3, #4
 8006010:	d007      	beq.n	8006022 <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 8006012:	6863      	ldr	r3, [r4, #4]
 8006014:	f003 030c 	and.w	r3, r3, #12
 8006018:	2b08      	cmp	r3, #8
 800601a:	d10c      	bne.n	8006036 <HAL_RCC_OscConfig+0x5e>
 800601c:	6863      	ldr	r3, [r4, #4]
 800601e:	03de      	lsls	r6, r3, #15
 8006020:	d509      	bpl.n	8006036 <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8006022:	6823      	ldr	r3, [r4, #0]
 8006024:	039c      	lsls	r4, r3, #14
 8006026:	d5dd      	bpl.n	8005fe4 <HAL_RCC_OscConfig+0xc>
 8006028:	686b      	ldr	r3, [r5, #4]
 800602a:	2b00      	cmp	r3, #0
 800602c:	d1da      	bne.n	8005fe4 <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 800602e:	2001      	movs	r0, #1
}
 8006030:	b002      	add	sp, #8
 8006032:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8006036:	686b      	ldr	r3, [r5, #4]
 8006038:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 800603c:	d110      	bne.n	8006060 <HAL_RCC_OscConfig+0x88>
 800603e:	6823      	ldr	r3, [r4, #0]
 8006040:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8006044:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8006046:	f7ff f8c3 	bl	80051d0 <HAL_GetTick>
 800604a:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 800604c:	6823      	ldr	r3, [r4, #0]
 800604e:	0398      	lsls	r0, r3, #14
 8006050:	d4c8      	bmi.n	8005fe4 <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8006052:	f7ff f8bd 	bl	80051d0 <HAL_GetTick>
 8006056:	1b80      	subs	r0, r0, r6
 8006058:	2864      	cmp	r0, #100	; 0x64
 800605a:	d9f7      	bls.n	800604c <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 800605c:	2003      	movs	r0, #3
 800605e:	e7e7      	b.n	8006030 <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8006060:	b99b      	cbnz	r3, 800608a <HAL_RCC_OscConfig+0xb2>
 8006062:	6823      	ldr	r3, [r4, #0]
 8006064:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8006068:	6023      	str	r3, [r4, #0]
 800606a:	6823      	ldr	r3, [r4, #0]
 800606c:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8006070:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8006072:	f7ff f8ad 	bl	80051d0 <HAL_GetTick>
 8006076:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8006078:	6823      	ldr	r3, [r4, #0]
 800607a:	0399      	lsls	r1, r3, #14
 800607c:	d5b2      	bpl.n	8005fe4 <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 800607e:	f7ff f8a7 	bl	80051d0 <HAL_GetTick>
 8006082:	1b80      	subs	r0, r0, r6
 8006084:	2864      	cmp	r0, #100	; 0x64
 8006086:	d9f7      	bls.n	8006078 <HAL_RCC_OscConfig+0xa0>
 8006088:	e7e8      	b.n	800605c <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800608a:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 800608e:	6823      	ldr	r3, [r4, #0]
 8006090:	d103      	bne.n	800609a <HAL_RCC_OscConfig+0xc2>
 8006092:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 8006096:	6023      	str	r3, [r4, #0]
 8006098:	e7d1      	b.n	800603e <HAL_RCC_OscConfig+0x66>
 800609a:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 800609e:	6023      	str	r3, [r4, #0]
 80060a0:	6823      	ldr	r3, [r4, #0]
 80060a2:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 80060a6:	e7cd      	b.n	8006044 <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 80060a8:	4c67      	ldr	r4, [pc, #412]	; (8006248 <HAL_RCC_OscConfig+0x270>)
 80060aa:	6863      	ldr	r3, [r4, #4]
 80060ac:	f013 0f0c 	tst.w	r3, #12
 80060b0:	d007      	beq.n	80060c2 <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 80060b2:	6863      	ldr	r3, [r4, #4]
 80060b4:	f003 030c 	and.w	r3, r3, #12
 80060b8:	2b08      	cmp	r3, #8
 80060ba:	d110      	bne.n	80060de <HAL_RCC_OscConfig+0x106>
 80060bc:	6863      	ldr	r3, [r4, #4]
 80060be:	03da      	lsls	r2, r3, #15
 80060c0:	d40d      	bmi.n	80060de <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 80060c2:	6823      	ldr	r3, [r4, #0]
 80060c4:	079b      	lsls	r3, r3, #30
 80060c6:	d502      	bpl.n	80060ce <HAL_RCC_OscConfig+0xf6>
 80060c8:	692b      	ldr	r3, [r5, #16]
 80060ca:	2b01      	cmp	r3, #1
 80060cc:	d1af      	bne.n	800602e <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80060ce:	6823      	ldr	r3, [r4, #0]
 80060d0:	696a      	ldr	r2, [r5, #20]
 80060d2:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 80060d6:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 80060da:	6023      	str	r3, [r4, #0]
 80060dc:	e785      	b.n	8005fea <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 80060de:	692a      	ldr	r2, [r5, #16]
 80060e0:	4b5a      	ldr	r3, [pc, #360]	; (800624c <HAL_RCC_OscConfig+0x274>)
 80060e2:	b16a      	cbz	r2, 8006100 <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 80060e4:	2201      	movs	r2, #1
 80060e6:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 80060e8:	f7ff f872 	bl	80051d0 <HAL_GetTick>
 80060ec:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80060ee:	6823      	ldr	r3, [r4, #0]
 80060f0:	079f      	lsls	r7, r3, #30
 80060f2:	d4ec      	bmi.n	80060ce <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 80060f4:	f7ff f86c 	bl	80051d0 <HAL_GetTick>
 80060f8:	1b80      	subs	r0, r0, r6
 80060fa:	2802      	cmp	r0, #2
 80060fc:	d9f7      	bls.n	80060ee <HAL_RCC_OscConfig+0x116>
 80060fe:	e7ad      	b.n	800605c <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8006100:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8006102:	f7ff f865 	bl	80051d0 <HAL_GetTick>
 8006106:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8006108:	6823      	ldr	r3, [r4, #0]
 800610a:	0798      	lsls	r0, r3, #30
 800610c:	f57f af6d 	bpl.w	8005fea <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8006110:	f7ff f85e 	bl	80051d0 <HAL_GetTick>
 8006114:	1b80      	subs	r0, r0, r6
 8006116:	2802      	cmp	r0, #2
 8006118:	d9f6      	bls.n	8006108 <HAL_RCC_OscConfig+0x130>
 800611a:	e79f      	b.n	800605c <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 800611c:	69aa      	ldr	r2, [r5, #24]
 800611e:	4c4a      	ldr	r4, [pc, #296]	; (8006248 <HAL_RCC_OscConfig+0x270>)
 8006120:	4b4b      	ldr	r3, [pc, #300]	; (8006250 <HAL_RCC_OscConfig+0x278>)
 8006122:	b1da      	cbz	r2, 800615c <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 8006124:	2201      	movs	r2, #1
 8006126:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8006128:	f7ff f852 	bl	80051d0 <HAL_GetTick>
 800612c:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 800612e:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8006130:	079b      	lsls	r3, r3, #30
 8006132:	d50d      	bpl.n	8006150 <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 8006134:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 8006138:	4b46      	ldr	r3, [pc, #280]	; (8006254 <HAL_RCC_OscConfig+0x27c>)
 800613a:	681b      	ldr	r3, [r3, #0]
 800613c:	fbb3 f3f2 	udiv	r3, r3, r2
 8006140:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 8006142:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 8006144:	9b01      	ldr	r3, [sp, #4]
 8006146:	1e5a      	subs	r2, r3, #1
 8006148:	9201      	str	r2, [sp, #4]
 800614a:	2b00      	cmp	r3, #0
 800614c:	d1f9      	bne.n	8006142 <HAL_RCC_OscConfig+0x16a>
 800614e:	e750      	b.n	8005ff2 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8006150:	f7ff f83e 	bl	80051d0 <HAL_GetTick>
 8006154:	1b80      	subs	r0, r0, r6
 8006156:	2802      	cmp	r0, #2
 8006158:	d9e9      	bls.n	800612e <HAL_RCC_OscConfig+0x156>
 800615a:	e77f      	b.n	800605c <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 800615c:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 800615e:	f7ff f837 	bl	80051d0 <HAL_GetTick>
 8006162:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8006164:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8006166:	079f      	lsls	r7, r3, #30
 8006168:	f57f af43 	bpl.w	8005ff2 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 800616c:	f7ff f830 	bl	80051d0 <HAL_GetTick>
 8006170:	1b80      	subs	r0, r0, r6
 8006172:	2802      	cmp	r0, #2
 8006174:	d9f6      	bls.n	8006164 <HAL_RCC_OscConfig+0x18c>
 8006176:	e771      	b.n	800605c <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8006178:	4c33      	ldr	r4, [pc, #204]	; (8006248 <HAL_RCC_OscConfig+0x270>)
 800617a:	69e3      	ldr	r3, [r4, #28]
 800617c:	00d8      	lsls	r0, r3, #3
 800617e:	d424      	bmi.n	80061ca <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 8006180:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 8006182:	69e3      	ldr	r3, [r4, #28]
 8006184:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8006188:	61e3      	str	r3, [r4, #28]
 800618a:	69e3      	ldr	r3, [r4, #28]
 800618c:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8006190:	9300      	str	r3, [sp, #0]
 8006192:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8006194:	4e30      	ldr	r6, [pc, #192]	; (8006258 <HAL_RCC_OscConfig+0x280>)
 8006196:	6833      	ldr	r3, [r6, #0]
 8006198:	05d9      	lsls	r1, r3, #23
 800619a:	d518      	bpl.n	80061ce <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800619c:	68eb      	ldr	r3, [r5, #12]
 800619e:	2b01      	cmp	r3, #1
 80061a0:	d126      	bne.n	80061f0 <HAL_RCC_OscConfig+0x218>
 80061a2:	6a23      	ldr	r3, [r4, #32]
 80061a4:	f043 0301 	orr.w	r3, r3, #1
 80061a8:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 80061aa:	f7ff f811 	bl	80051d0 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80061ae:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 80061b2:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80061b4:	6a23      	ldr	r3, [r4, #32]
 80061b6:	079b      	lsls	r3, r3, #30
 80061b8:	d53f      	bpl.n	800623a <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 80061ba:	2f00      	cmp	r7, #0
 80061bc:	f43f af1d 	beq.w	8005ffa <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 80061c0:	69e3      	ldr	r3, [r4, #28]
 80061c2:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 80061c6:	61e3      	str	r3, [r4, #28]
 80061c8:	e717      	b.n	8005ffa <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 80061ca:	2700      	movs	r7, #0
 80061cc:	e7e2      	b.n	8006194 <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 80061ce:	6833      	ldr	r3, [r6, #0]
 80061d0:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80061d4:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 80061d6:	f7fe fffb 	bl	80051d0 <HAL_GetTick>
 80061da:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80061dc:	6833      	ldr	r3, [r6, #0]
 80061de:	05da      	lsls	r2, r3, #23
 80061e0:	d4dc      	bmi.n	800619c <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 80061e2:	f7fe fff5 	bl	80051d0 <HAL_GetTick>
 80061e6:	eba0 0008 	sub.w	r0, r0, r8
 80061ea:	2864      	cmp	r0, #100	; 0x64
 80061ec:	d9f6      	bls.n	80061dc <HAL_RCC_OscConfig+0x204>
 80061ee:	e735      	b.n	800605c <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80061f0:	b9ab      	cbnz	r3, 800621e <HAL_RCC_OscConfig+0x246>
 80061f2:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80061f4:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80061f8:	f023 0301 	bic.w	r3, r3, #1
 80061fc:	6223      	str	r3, [r4, #32]
 80061fe:	6a23      	ldr	r3, [r4, #32]
 8006200:	f023 0304 	bic.w	r3, r3, #4
 8006204:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8006206:	f7fe ffe3 	bl	80051d0 <HAL_GetTick>
 800620a:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 800620c:	6a23      	ldr	r3, [r4, #32]
 800620e:	0798      	lsls	r0, r3, #30
 8006210:	d5d3      	bpl.n	80061ba <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8006212:	f7fe ffdd 	bl	80051d0 <HAL_GetTick>
 8006216:	1b80      	subs	r0, r0, r6
 8006218:	4540      	cmp	r0, r8
 800621a:	d9f7      	bls.n	800620c <HAL_RCC_OscConfig+0x234>
 800621c:	e71e      	b.n	800605c <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800621e:	2b05      	cmp	r3, #5
 8006220:	6a23      	ldr	r3, [r4, #32]
 8006222:	d103      	bne.n	800622c <HAL_RCC_OscConfig+0x254>
 8006224:	f043 0304 	orr.w	r3, r3, #4
 8006228:	6223      	str	r3, [r4, #32]
 800622a:	e7ba      	b.n	80061a2 <HAL_RCC_OscConfig+0x1ca>
 800622c:	f023 0301 	bic.w	r3, r3, #1
 8006230:	6223      	str	r3, [r4, #32]
 8006232:	6a23      	ldr	r3, [r4, #32]
 8006234:	f023 0304 	bic.w	r3, r3, #4
 8006238:	e7b6      	b.n	80061a8 <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 800623a:	f7fe ffc9 	bl	80051d0 <HAL_GetTick>
 800623e:	eba0 0008 	sub.w	r0, r0, r8
 8006242:	42b0      	cmp	r0, r6
 8006244:	d9b6      	bls.n	80061b4 <HAL_RCC_OscConfig+0x1dc>
 8006246:	e709      	b.n	800605c <HAL_RCC_OscConfig+0x84>
 8006248:	40021000 	.word	0x40021000
 800624c:	42420000 	.word	0x42420000
 8006250:	42420480 	.word	0x42420480
 8006254:	20000218 	.word	0x20000218
 8006258:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 800625c:	4c22      	ldr	r4, [pc, #136]	; (80062e8 <HAL_RCC_OscConfig+0x310>)
 800625e:	6863      	ldr	r3, [r4, #4]
 8006260:	f003 030c 	and.w	r3, r3, #12
 8006264:	2b08      	cmp	r3, #8
 8006266:	f43f aee2 	beq.w	800602e <HAL_RCC_OscConfig+0x56>
 800626a:	2300      	movs	r3, #0
 800626c:	4e1f      	ldr	r6, [pc, #124]	; (80062ec <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800626e:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8006270:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8006272:	d12b      	bne.n	80062cc <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 8006274:	f7fe ffac 	bl	80051d0 <HAL_GetTick>
 8006278:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 800627a:	6823      	ldr	r3, [r4, #0]
 800627c:	0199      	lsls	r1, r3, #6
 800627e:	d41f      	bmi.n	80062c0 <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8006280:	6a2b      	ldr	r3, [r5, #32]
 8006282:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8006286:	d105      	bne.n	8006294 <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8006288:	6862      	ldr	r2, [r4, #4]
 800628a:	68a9      	ldr	r1, [r5, #8]
 800628c:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 8006290:	430a      	orrs	r2, r1
 8006292:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8006294:	6a69      	ldr	r1, [r5, #36]	; 0x24
 8006296:	6862      	ldr	r2, [r4, #4]
 8006298:	430b      	orrs	r3, r1
 800629a:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 800629e:	4313      	orrs	r3, r2
 80062a0:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 80062a2:	2301      	movs	r3, #1
 80062a4:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 80062a6:	f7fe ff93 	bl	80051d0 <HAL_GetTick>
 80062aa:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 80062ac:	6823      	ldr	r3, [r4, #0]
 80062ae:	019a      	lsls	r2, r3, #6
 80062b0:	f53f aea7 	bmi.w	8006002 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80062b4:	f7fe ff8c 	bl	80051d0 <HAL_GetTick>
 80062b8:	1b40      	subs	r0, r0, r5
 80062ba:	2802      	cmp	r0, #2
 80062bc:	d9f6      	bls.n	80062ac <HAL_RCC_OscConfig+0x2d4>
 80062be:	e6cd      	b.n	800605c <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80062c0:	f7fe ff86 	bl	80051d0 <HAL_GetTick>
 80062c4:	1bc0      	subs	r0, r0, r7
 80062c6:	2802      	cmp	r0, #2
 80062c8:	d9d7      	bls.n	800627a <HAL_RCC_OscConfig+0x2a2>
 80062ca:	e6c7      	b.n	800605c <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 80062cc:	f7fe ff80 	bl	80051d0 <HAL_GetTick>
 80062d0:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 80062d2:	6823      	ldr	r3, [r4, #0]
 80062d4:	019b      	lsls	r3, r3, #6
 80062d6:	f57f ae94 	bpl.w	8006002 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80062da:	f7fe ff79 	bl	80051d0 <HAL_GetTick>
 80062de:	1b40      	subs	r0, r0, r5
 80062e0:	2802      	cmp	r0, #2
 80062e2:	d9f6      	bls.n	80062d2 <HAL_RCC_OscConfig+0x2fa>
 80062e4:	e6ba      	b.n	800605c <HAL_RCC_OscConfig+0x84>
 80062e6:	bf00      	nop
 80062e8:	40021000 	.word	0x40021000
 80062ec:	42420060 	.word	0x42420060

080062f0 <HAL_RCC_GetSysClockFreq>:
{
 80062f0:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 80062f2:	4b19      	ldr	r3, [pc, #100]	; (8006358 <HAL_RCC_GetSysClockFreq+0x68>)
{
 80062f4:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 80062f6:	ac02      	add	r4, sp, #8
 80062f8:	f103 0510 	add.w	r5, r3, #16
 80062fc:	4622      	mov	r2, r4
 80062fe:	6818      	ldr	r0, [r3, #0]
 8006300:	6859      	ldr	r1, [r3, #4]
 8006302:	3308      	adds	r3, #8
 8006304:	c203      	stmia	r2!, {r0, r1}
 8006306:	42ab      	cmp	r3, r5
 8006308:	4614      	mov	r4, r2
 800630a:	d1f7      	bne.n	80062fc <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 800630c:	2301      	movs	r3, #1
 800630e:	f88d 3004 	strb.w	r3, [sp, #4]
 8006312:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 8006314:	4911      	ldr	r1, [pc, #68]	; (800635c <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8006316:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 800631a:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 800631c:	f003 020c 	and.w	r2, r3, #12
 8006320:	2a08      	cmp	r2, #8
 8006322:	d117      	bne.n	8006354 <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8006324:	f3c3 4283 	ubfx	r2, r3, #18, #4
 8006328:	a806      	add	r0, sp, #24
 800632a:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 800632c:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 800632e:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8006332:	d50c      	bpl.n	800634e <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8006334:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8006336:	480a      	ldr	r0, [pc, #40]	; (8006360 <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8006338:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 800633c:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 800633e:	aa06      	add	r2, sp, #24
 8006340:	4413      	add	r3, r2
 8006342:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8006346:	fbb0 f0f3 	udiv	r0, r0, r3
}
 800634a:	b007      	add	sp, #28
 800634c:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 800634e:	4805      	ldr	r0, [pc, #20]	; (8006364 <HAL_RCC_GetSysClockFreq+0x74>)
 8006350:	4350      	muls	r0, r2
 8006352:	e7fa      	b.n	800634a <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 8006354:	4802      	ldr	r0, [pc, #8]	; (8006360 <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 8006356:	e7f8      	b.n	800634a <HAL_RCC_GetSysClockFreq+0x5a>
 8006358:	0800bc20 	.word	0x0800bc20
 800635c:	40021000 	.word	0x40021000
 8006360:	007a1200 	.word	0x007a1200
 8006364:	003d0900 	.word	0x003d0900

08006368 <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8006368:	4a54      	ldr	r2, [pc, #336]	; (80064bc <HAL_RCC_ClockConfig+0x154>)
{
 800636a:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 800636e:	6813      	ldr	r3, [r2, #0]
{
 8006370:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8006372:	f003 0307 	and.w	r3, r3, #7
 8006376:	428b      	cmp	r3, r1
{
 8006378:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 800637a:	d32a      	bcc.n	80063d2 <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800637c:	6829      	ldr	r1, [r5, #0]
 800637e:	078c      	lsls	r4, r1, #30
 8006380:	d434      	bmi.n	80063ec <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8006382:	07ca      	lsls	r2, r1, #31
 8006384:	d447      	bmi.n	8006416 <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 8006386:	4a4d      	ldr	r2, [pc, #308]	; (80064bc <HAL_RCC_ClockConfig+0x154>)
 8006388:	6813      	ldr	r3, [r2, #0]
 800638a:	f003 0307 	and.w	r3, r3, #7
 800638e:	429e      	cmp	r6, r3
 8006390:	f0c0 8082 	bcc.w	8006498 <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8006394:	682a      	ldr	r2, [r5, #0]
 8006396:	4c4a      	ldr	r4, [pc, #296]	; (80064c0 <HAL_RCC_ClockConfig+0x158>)
 8006398:	f012 0f04 	tst.w	r2, #4
 800639c:	f040 8087 	bne.w	80064ae <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 80063a0:	0713      	lsls	r3, r2, #28
 80063a2:	d506      	bpl.n	80063b2 <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 80063a4:	6863      	ldr	r3, [r4, #4]
 80063a6:	692a      	ldr	r2, [r5, #16]
 80063a8:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 80063ac:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 80063b0:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 80063b2:	f7ff ff9d 	bl	80062f0 <HAL_RCC_GetSysClockFreq>
 80063b6:	6863      	ldr	r3, [r4, #4]
 80063b8:	4a42      	ldr	r2, [pc, #264]	; (80064c4 <HAL_RCC_ClockConfig+0x15c>)
 80063ba:	f3c3 1303 	ubfx	r3, r3, #4, #4
 80063be:	5cd3      	ldrb	r3, [r2, r3]
 80063c0:	40d8      	lsrs	r0, r3
 80063c2:	4b41      	ldr	r3, [pc, #260]	; (80064c8 <HAL_RCC_ClockConfig+0x160>)
 80063c4:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 80063c6:	2000      	movs	r0, #0
 80063c8:	f7fe fec0 	bl	800514c <HAL_InitTick>
  return HAL_OK;
 80063cc:	2000      	movs	r0, #0
}
 80063ce:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 80063d2:	6813      	ldr	r3, [r2, #0]
 80063d4:	f023 0307 	bic.w	r3, r3, #7
 80063d8:	430b      	orrs	r3, r1
 80063da:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 80063dc:	6813      	ldr	r3, [r2, #0]
 80063de:	f003 0307 	and.w	r3, r3, #7
 80063e2:	4299      	cmp	r1, r3
 80063e4:	d0ca      	beq.n	800637c <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 80063e6:	2001      	movs	r0, #1
 80063e8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80063ec:	4b34      	ldr	r3, [pc, #208]	; (80064c0 <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 80063ee:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 80063f2:	bf1e      	ittt	ne
 80063f4:	685a      	ldrne	r2, [r3, #4]
 80063f6:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 80063fa:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 80063fc:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 80063fe:	bf42      	ittt	mi
 8006400:	685a      	ldrmi	r2, [r3, #4]
 8006402:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 8006406:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8006408:	685a      	ldr	r2, [r3, #4]
 800640a:	68a8      	ldr	r0, [r5, #8]
 800640c:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8006410:	4302      	orrs	r2, r0
 8006412:	605a      	str	r2, [r3, #4]
 8006414:	e7b5      	b.n	8006382 <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8006416:	686a      	ldr	r2, [r5, #4]
 8006418:	4c29      	ldr	r4, [pc, #164]	; (80064c0 <HAL_RCC_ClockConfig+0x158>)
 800641a:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 800641c:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800641e:	d11c      	bne.n	800645a <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8006420:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8006424:	d0df      	beq.n	80063e6 <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8006426:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006428:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 800642c:	f023 0303 	bic.w	r3, r3, #3
 8006430:	4313      	orrs	r3, r2
 8006432:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8006434:	f7fe fecc 	bl	80051d0 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8006438:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 800643a:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800643c:	2b01      	cmp	r3, #1
 800643e:	d114      	bne.n	800646a <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8006440:	6863      	ldr	r3, [r4, #4]
 8006442:	f003 030c 	and.w	r3, r3, #12
 8006446:	2b04      	cmp	r3, #4
 8006448:	d09d      	beq.n	8006386 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 800644a:	f7fe fec1 	bl	80051d0 <HAL_GetTick>
 800644e:	1bc0      	subs	r0, r0, r7
 8006450:	4540      	cmp	r0, r8
 8006452:	d9f5      	bls.n	8006440 <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 8006454:	2003      	movs	r0, #3
 8006456:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800645a:	2a02      	cmp	r2, #2
 800645c:	d102      	bne.n	8006464 <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 800645e:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 8006462:	e7df      	b.n	8006424 <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8006464:	f013 0f02 	tst.w	r3, #2
 8006468:	e7dc      	b.n	8006424 <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800646a:	2b02      	cmp	r3, #2
 800646c:	d10f      	bne.n	800648e <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 800646e:	6863      	ldr	r3, [r4, #4]
 8006470:	f003 030c 	and.w	r3, r3, #12
 8006474:	2b08      	cmp	r3, #8
 8006476:	d086      	beq.n	8006386 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006478:	f7fe feaa 	bl	80051d0 <HAL_GetTick>
 800647c:	1bc0      	subs	r0, r0, r7
 800647e:	4540      	cmp	r0, r8
 8006480:	d9f5      	bls.n	800646e <HAL_RCC_ClockConfig+0x106>
 8006482:	e7e7      	b.n	8006454 <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006484:	f7fe fea4 	bl	80051d0 <HAL_GetTick>
 8006488:	1bc0      	subs	r0, r0, r7
 800648a:	4540      	cmp	r0, r8
 800648c:	d8e2      	bhi.n	8006454 <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 800648e:	6863      	ldr	r3, [r4, #4]
 8006490:	f013 0f0c 	tst.w	r3, #12
 8006494:	d1f6      	bne.n	8006484 <HAL_RCC_ClockConfig+0x11c>
 8006496:	e776      	b.n	8006386 <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 8006498:	6813      	ldr	r3, [r2, #0]
 800649a:	f023 0307 	bic.w	r3, r3, #7
 800649e:	4333      	orrs	r3, r6
 80064a0:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 80064a2:	6813      	ldr	r3, [r2, #0]
 80064a4:	f003 0307 	and.w	r3, r3, #7
 80064a8:	429e      	cmp	r6, r3
 80064aa:	d19c      	bne.n	80063e6 <HAL_RCC_ClockConfig+0x7e>
 80064ac:	e772      	b.n	8006394 <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 80064ae:	6863      	ldr	r3, [r4, #4]
 80064b0:	68e9      	ldr	r1, [r5, #12]
 80064b2:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 80064b6:	430b      	orrs	r3, r1
 80064b8:	6063      	str	r3, [r4, #4]
 80064ba:	e771      	b.n	80063a0 <HAL_RCC_ClockConfig+0x38>
 80064bc:	40022000 	.word	0x40022000
 80064c0:	40021000 	.word	0x40021000
 80064c4:	0800bc5f 	.word	0x0800bc5f
 80064c8:	20000218 	.word	0x20000218

080064cc <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 80064cc:	4b04      	ldr	r3, [pc, #16]	; (80064e0 <HAL_RCC_GetPCLK1Freq+0x14>)
 80064ce:	4a05      	ldr	r2, [pc, #20]	; (80064e4 <HAL_RCC_GetPCLK1Freq+0x18>)
 80064d0:	685b      	ldr	r3, [r3, #4]
 80064d2:	f3c3 2302 	ubfx	r3, r3, #8, #3
 80064d6:	5cd3      	ldrb	r3, [r2, r3]
 80064d8:	4a03      	ldr	r2, [pc, #12]	; (80064e8 <HAL_RCC_GetPCLK1Freq+0x1c>)
 80064da:	6810      	ldr	r0, [r2, #0]
}    
 80064dc:	40d8      	lsrs	r0, r3
 80064de:	4770      	bx	lr
 80064e0:	40021000 	.word	0x40021000
 80064e4:	0800bc6f 	.word	0x0800bc6f
 80064e8:	20000218 	.word	0x20000218

080064ec <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 80064ec:	4b04      	ldr	r3, [pc, #16]	; (8006500 <HAL_RCC_GetPCLK2Freq+0x14>)
 80064ee:	4a05      	ldr	r2, [pc, #20]	; (8006504 <HAL_RCC_GetPCLK2Freq+0x18>)
 80064f0:	685b      	ldr	r3, [r3, #4]
 80064f2:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 80064f6:	5cd3      	ldrb	r3, [r2, r3]
 80064f8:	4a03      	ldr	r2, [pc, #12]	; (8006508 <HAL_RCC_GetPCLK2Freq+0x1c>)
 80064fa:	6810      	ldr	r0, [r2, #0]
} 
 80064fc:	40d8      	lsrs	r0, r3
 80064fe:	4770      	bx	lr
 8006500:	40021000 	.word	0x40021000
 8006504:	0800bc6f 	.word	0x0800bc6f
 8006508:	20000218 	.word	0x20000218

0800650c <HAL_RCCEx_PeriphCLKConfig>:

  /* Check the parameters */
  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
  
  /*------------------------------- RTC/LCD Configuration ------------------------*/ 
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 800650c:	6803      	ldr	r3, [r0, #0]
{
 800650e:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8006512:	07d9      	lsls	r1, r3, #31
{
 8006514:	4605      	mov	r5, r0
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8006516:	d520      	bpl.n	800655a <HAL_RCCEx_PeriphCLKConfig+0x4e>
    FlagStatus       pwrclkchanged = RESET;

    /* As soon as function is called to change RTC clock source, activation of the 
       power domain is done. */
    /* Requires to enable write access to Backup Domain of necessary */
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8006518:	4c35      	ldr	r4, [pc, #212]	; (80065f0 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 800651a:	69e3      	ldr	r3, [r4, #28]
 800651c:	00da      	lsls	r2, r3, #3
 800651e:	d432      	bmi.n	8006586 <HAL_RCCEx_PeriphCLKConfig+0x7a>
    {
    __HAL_RCC_PWR_CLK_ENABLE();
      pwrclkchanged = SET;
 8006520:	2701      	movs	r7, #1
    __HAL_RCC_PWR_CLK_ENABLE();
 8006522:	69e3      	ldr	r3, [r4, #28]
 8006524:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8006528:	61e3      	str	r3, [r4, #28]
 800652a:	69e3      	ldr	r3, [r4, #28]
 800652c:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8006530:	9301      	str	r3, [sp, #4]
 8006532:	9b01      	ldr	r3, [sp, #4]
    }
    
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8006534:	4e2f      	ldr	r6, [pc, #188]	; (80065f4 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 8006536:	6833      	ldr	r3, [r6, #0]
 8006538:	05db      	lsls	r3, r3, #23
 800653a:	d526      	bpl.n	800658a <HAL_RCCEx_PeriphCLKConfig+0x7e>
        }
      }
    }
      
    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ 
    temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
 800653c:	6a23      	ldr	r3, [r4, #32]
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 800653e:	f413 7340 	ands.w	r3, r3, #768	; 0x300
 8006542:	d136      	bne.n	80065b2 <HAL_RCCEx_PeriphCLKConfig+0xa6>
            return HAL_TIMEOUT;
          }      
        }  
      }
    }
    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
 8006544:	6a23      	ldr	r3, [r4, #32]
 8006546:	686a      	ldr	r2, [r5, #4]
 8006548:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 800654c:	4313      	orrs	r3, r2
 800654e:	6223      	str	r3, [r4, #32]

    /* Require to disable power clock if necessary */
    if(pwrclkchanged == SET)
 8006550:	b11f      	cbz	r7, 800655a <HAL_RCCEx_PeriphCLKConfig+0x4e>
    {
      __HAL_RCC_PWR_CLK_DISABLE();
 8006552:	69e3      	ldr	r3, [r4, #28]
 8006554:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8006558:	61e3      	str	r3, [r4, #28]
    }
  }

  /*------------------------------ ADC clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800655a:	6828      	ldr	r0, [r5, #0]
 800655c:	0783      	lsls	r3, r0, #30
 800655e:	d506      	bpl.n	800656e <HAL_RCCEx_PeriphCLKConfig+0x62>
  {
    /* Check the parameters */
    assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
    
    /* Configure the ADC clock source */
    __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 8006560:	4a23      	ldr	r2, [pc, #140]	; (80065f0 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8006562:	68a9      	ldr	r1, [r5, #8]
 8006564:	6853      	ldr	r3, [r2, #4]
 8006566:	f423 4340 	bic.w	r3, r3, #49152	; 0xc000
 800656a:	430b      	orrs	r3, r1
 800656c:	6053      	str	r3, [r2, #4]

#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
 || defined(STM32F105xC) || defined(STM32F107xC)
  /*------------------------------ USB clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800656e:	f010 0010 	ands.w	r0, r0, #16
 8006572:	d01b      	beq.n	80065ac <HAL_RCCEx_PeriphCLKConfig+0xa0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
    
    /* Configure the USB clock source */
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8006574:	4a1e      	ldr	r2, [pc, #120]	; (80065f0 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8006576:	6969      	ldr	r1, [r5, #20]
 8006578:	6853      	ldr	r3, [r2, #4]
  }
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */

  return HAL_OK;
 800657a:	2000      	movs	r0, #0
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 800657c:	f423 0380 	bic.w	r3, r3, #4194304	; 0x400000
 8006580:	430b      	orrs	r3, r1
 8006582:	6053      	str	r3, [r2, #4]
 8006584:	e012      	b.n	80065ac <HAL_RCCEx_PeriphCLKConfig+0xa0>
    FlagStatus       pwrclkchanged = RESET;
 8006586:	2700      	movs	r7, #0
 8006588:	e7d4      	b.n	8006534 <HAL_RCCEx_PeriphCLKConfig+0x28>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 800658a:	6833      	ldr	r3, [r6, #0]
 800658c:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8006590:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 8006592:	f7fe fe1d 	bl	80051d0 <HAL_GetTick>
 8006596:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8006598:	6833      	ldr	r3, [r6, #0]
 800659a:	05d8      	lsls	r0, r3, #23
 800659c:	d4ce      	bmi.n	800653c <HAL_RCCEx_PeriphCLKConfig+0x30>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800659e:	f7fe fe17 	bl	80051d0 <HAL_GetTick>
 80065a2:	eba0 0008 	sub.w	r0, r0, r8
 80065a6:	2864      	cmp	r0, #100	; 0x64
 80065a8:	d9f6      	bls.n	8006598 <HAL_RCCEx_PeriphCLKConfig+0x8c>
          return HAL_TIMEOUT;
 80065aa:	2003      	movs	r0, #3
}
 80065ac:	b002      	add	sp, #8
 80065ae:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 80065b2:	686a      	ldr	r2, [r5, #4]
 80065b4:	f402 7240 	and.w	r2, r2, #768	; 0x300
 80065b8:	4293      	cmp	r3, r2
 80065ba:	d0c3      	beq.n	8006544 <HAL_RCCEx_PeriphCLKConfig+0x38>
      __HAL_RCC_BACKUPRESET_FORCE();
 80065bc:	2001      	movs	r0, #1
 80065be:	4a0e      	ldr	r2, [pc, #56]	; (80065f8 <HAL_RCCEx_PeriphCLKConfig+0xec>)
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 80065c0:	6a23      	ldr	r3, [r4, #32]
      __HAL_RCC_BACKUPRESET_FORCE();
 80065c2:	6010      	str	r0, [r2, #0]
      __HAL_RCC_BACKUPRESET_RELEASE();
 80065c4:	2000      	movs	r0, #0
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 80065c6:	f423 7140 	bic.w	r1, r3, #768	; 0x300
      __HAL_RCC_BACKUPRESET_RELEASE();
 80065ca:	6010      	str	r0, [r2, #0]
      RCC->BDCR = temp_reg;
 80065cc:	6221      	str	r1, [r4, #32]
      if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
 80065ce:	07d9      	lsls	r1, r3, #31
 80065d0:	d5b8      	bpl.n	8006544 <HAL_RCCEx_PeriphCLKConfig+0x38>
        tickstart = HAL_GetTick();
 80065d2:	f7fe fdfd 	bl	80051d0 <HAL_GetTick>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80065d6:	f241 3888 	movw	r8, #5000	; 0x1388
        tickstart = HAL_GetTick();
 80065da:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80065dc:	6a23      	ldr	r3, [r4, #32]
 80065de:	079a      	lsls	r2, r3, #30
 80065e0:	d4b0      	bmi.n	8006544 <HAL_RCCEx_PeriphCLKConfig+0x38>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80065e2:	f7fe fdf5 	bl	80051d0 <HAL_GetTick>
 80065e6:	1b80      	subs	r0, r0, r6
 80065e8:	4540      	cmp	r0, r8
 80065ea:	d9f7      	bls.n	80065dc <HAL_RCCEx_PeriphCLKConfig+0xd0>
 80065ec:	e7dd      	b.n	80065aa <HAL_RCCEx_PeriphCLKConfig+0x9e>
 80065ee:	bf00      	nop
 80065f0:	40021000 	.word	0x40021000
 80065f4:	40007000 	.word	0x40007000
 80065f8:	42420440 	.word	0x42420440

080065fc <HAL_RCCEx_GetPeriphCLKFreq>:
  *            @arg @ref RCC_PERIPHCLK_USB  USB peripheral clock
  @endif
  * @retval Frequency in Hz (0: means that no available frequency for the peripheral)
  */
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
{
 80065fc:	4602      	mov	r2, r0
 80065fe:	b570      	push	{r4, r5, r6, lr}
  uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U;
  uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U;
#endif /* STM32F105xC || STM32F107xC */
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || \
    defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8006600:	4b3b      	ldr	r3, [pc, #236]	; (80066f0 <HAL_RCCEx_GetPeriphCLKFreq+0xf4>)
{
 8006602:	b086      	sub	sp, #24
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8006604:	ad02      	add	r5, sp, #8
 8006606:	f103 0610 	add.w	r6, r3, #16
 800660a:	462c      	mov	r4, r5
 800660c:	6818      	ldr	r0, [r3, #0]
 800660e:	6859      	ldr	r1, [r3, #4]
 8006610:	3308      	adds	r3, #8
 8006612:	c403      	stmia	r4!, {r0, r1}
 8006614:	42b3      	cmp	r3, r6
 8006616:	4625      	mov	r5, r4
 8006618:	d1f7      	bne.n	800660a <HAL_RCCEx_GetPeriphCLKFreq+0xe>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 800661a:	2301      	movs	r3, #1
 800661c:	f88d 3004 	strb.w	r3, [sp, #4]
 8006620:	2302      	movs	r3, #2
  uint32_t temp_reg = 0U, frequency = 0U;

  /* Check the parameters */
  assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
  
  switch (PeriphClk)
 8006622:	1e50      	subs	r0, r2, #1
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8006624:	f88d 3005 	strb.w	r3, [sp, #5]
  switch (PeriphClk)
 8006628:	280f      	cmp	r0, #15
 800662a:	d85e      	bhi.n	80066ea <HAL_RCCEx_GetPeriphCLKFreq+0xee>
 800662c:	e8df f000 	tbb	[pc, r0]
 8006630:	2d5d5132 	.word	0x2d5d5132
 8006634:	2d5d5d5d 	.word	0x2d5d5d5d
 8006638:	5d5d5d5d 	.word	0x5d5d5d5d
 800663c:	085d5d5d 	.word	0x085d5d5d
 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
 || defined(STM32F105xC) || defined(STM32F107xC)
  case RCC_PERIPHCLK_USB:  
    {
      /* Get RCC configuration ------------------------------------------------------*/
      temp_reg = RCC->CFGR;
 8006640:	4b2c      	ldr	r3, [pc, #176]	; (80066f4 <HAL_RCCEx_GetPeriphCLKFreq+0xf8>)
 8006642:	6859      	ldr	r1, [r3, #4]
  
      /* Check if PLL is enabled */
      if (HAL_IS_BIT_SET(RCC->CR,RCC_CR_PLLON))
 8006644:	6818      	ldr	r0, [r3, #0]
 8006646:	f010 7080 	ands.w	r0, r0, #16777216	; 0x1000000
 800664a:	d037      	beq.n	80066bc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
      {
        pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 800664c:	f3c1 4283 	ubfx	r2, r1, #18, #4
 8006650:	a806      	add	r0, sp, #24
 8006652:	4402      	add	r2, r0
 8006654:	f812 0c10 	ldrb.w	r0, [r2, #-16]
        if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8006658:	03ca      	lsls	r2, r1, #15
        {
#if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\
 || defined(STM32F100xE)
          prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
          prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 800665a:	bf41      	itttt	mi
 800665c:	685a      	ldrmi	r2, [r3, #4]
 800665e:	a906      	addmi	r1, sp, #24
 8006660:	f3c2 4240 	ubfxmi	r2, r2, #17, #1
 8006664:	1852      	addmi	r2, r2, r1
 8006666:	bf44      	itt	mi
 8006668:	f812 1c14 	ldrbmi.w	r1, [r2, #-20]
          }
#else
          if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
          {
            /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
            pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul);
 800666c:	4a22      	ldrmi	r2, [pc, #136]	; (80066f8 <HAL_RCCEx_GetPeriphCLKFreq+0xfc>)
          /* Prescaler of 3 selected for USB */ 
          frequency = (2 * pllclk) / 3;
        }
#else
        /* USBCLK = PLLCLK / USB prescaler */
        if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
 800666e:	685b      	ldr	r3, [r3, #4]
            pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul);
 8006670:	bf4c      	ite	mi
 8006672:	fbb2 f2f1 	udivmi	r2, r2, r1
          pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 8006676:	4a21      	ldrpl	r2, [pc, #132]	; (80066fc <HAL_RCCEx_GetPeriphCLKFreq+0x100>)
        if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
 8006678:	025b      	lsls	r3, r3, #9
          pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 800667a:	fb02 f000 	mul.w	r0, r2, r0
        if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
 800667e:	d41d      	bmi.n	80066bc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
          frequency = pllclk;
        }
        else
        {
          /* Prescaler of 1.5 selected for USB */ 
          frequency = (pllclk * 2) / 3;
 8006680:	2303      	movs	r3, #3
 8006682:	0040      	lsls	r0, r0, #1
      }
      break;
    }
  case RCC_PERIPHCLK_ADC:  
    {
      frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2);
 8006684:	fbb0 f0f3 	udiv	r0, r0, r3
      break;
 8006688:	e018      	b.n	80066bc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
    {
      break;
    }
  }
  return(frequency);
}
 800668a:	b006      	add	sp, #24
 800668c:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      frequency = HAL_RCC_GetSysClockFreq();
 8006690:	f7ff be2e 	b.w	80062f0 <HAL_RCC_GetSysClockFreq>
      if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY)))
 8006694:	f240 3102 	movw	r1, #770	; 0x302
      temp_reg = RCC->BDCR;
 8006698:	4a16      	ldr	r2, [pc, #88]	; (80066f4 <HAL_RCCEx_GetPeriphCLKFreq+0xf8>)
 800669a:	6a13      	ldr	r3, [r2, #32]
      if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY)))
 800669c:	4019      	ands	r1, r3
 800669e:	f5b1 7f81 	cmp.w	r1, #258	; 0x102
 80066a2:	d01f      	beq.n	80066e4 <HAL_RCCEx_GetPeriphCLKFreq+0xe8>
      else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
 80066a4:	f403 7340 	and.w	r3, r3, #768	; 0x300
 80066a8:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 80066ac:	d108      	bne.n	80066c0 <HAL_RCCEx_GetPeriphCLKFreq+0xc4>
        frequency = LSI_VALUE;
 80066ae:	f649 4040 	movw	r0, #40000	; 0x9c40
      else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
 80066b2:	6a53      	ldr	r3, [r2, #36]	; 0x24
        frequency = LSI_VALUE;
 80066b4:	f013 0f02 	tst.w	r3, #2
        frequency = HSE_VALUE / 128U;
 80066b8:	bf08      	it	eq
 80066ba:	2000      	moveq	r0, #0
}
 80066bc:	b006      	add	sp, #24
 80066be:	bd70      	pop	{r4, r5, r6, pc}
      else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
 80066c0:	f5b3 7f40 	cmp.w	r3, #768	; 0x300
 80066c4:	d111      	bne.n	80066ea <HAL_RCCEx_GetPeriphCLKFreq+0xee>
 80066c6:	6813      	ldr	r3, [r2, #0]
        frequency = HSE_VALUE / 128U;
 80066c8:	f24f 4024 	movw	r0, #62500	; 0xf424
 80066cc:	f413 3f00 	tst.w	r3, #131072	; 0x20000
 80066d0:	e7f2      	b.n	80066b8 <HAL_RCCEx_GetPeriphCLKFreq+0xbc>
      frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2);
 80066d2:	f7ff ff0b 	bl	80064ec <HAL_RCC_GetPCLK2Freq>
 80066d6:	4b07      	ldr	r3, [pc, #28]	; (80066f4 <HAL_RCCEx_GetPeriphCLKFreq+0xf8>)
 80066d8:	685b      	ldr	r3, [r3, #4]
 80066da:	f3c3 3381 	ubfx	r3, r3, #14, #2
 80066de:	3301      	adds	r3, #1
 80066e0:	005b      	lsls	r3, r3, #1
 80066e2:	e7cf      	b.n	8006684 <HAL_RCCEx_GetPeriphCLKFreq+0x88>
        frequency = LSE_VALUE;
 80066e4:	f44f 4000 	mov.w	r0, #32768	; 0x8000
 80066e8:	e7e8      	b.n	80066bc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
        frequency = 0U;
 80066ea:	2000      	movs	r0, #0
 80066ec:	e7e6      	b.n	80066bc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
 80066ee:	bf00      	nop
 80066f0:	0800bc30 	.word	0x0800bc30
 80066f4:	40021000 	.word	0x40021000
 80066f8:	007a1200 	.word	0x007a1200
 80066fc:	003d0900 	.word	0x003d0900

08006700 <HAL_TIM_OC_DelayElapsedCallback>:
 8006700:	4770      	bx	lr

08006702 <HAL_TIM_IC_CaptureCallback>:
 8006702:	4770      	bx	lr

08006704 <HAL_TIM_PWM_PulseFinishedCallback>:
 8006704:	4770      	bx	lr

08006706 <HAL_TIM_TriggerCallback>:
 8006706:	4770      	bx	lr

08006708 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8006708:	6803      	ldr	r3, [r0, #0]
{
 800670a:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 800670c:	691a      	ldr	r2, [r3, #16]
{
 800670e:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8006710:	0791      	lsls	r1, r2, #30
 8006712:	d50e      	bpl.n	8006732 <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 8006714:	68da      	ldr	r2, [r3, #12]
 8006716:	0792      	lsls	r2, r2, #30
 8006718:	d50b      	bpl.n	8006732 <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 800671a:	f06f 0202 	mvn.w	r2, #2
 800671e:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8006720:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8006722:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8006724:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8006726:	079b      	lsls	r3, r3, #30
 8006728:	d077      	beq.n	800681a <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 800672a:	f7ff ffea 	bl	8006702 <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800672e:	2300      	movs	r3, #0
 8006730:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8006732:	6823      	ldr	r3, [r4, #0]
 8006734:	691a      	ldr	r2, [r3, #16]
 8006736:	0750      	lsls	r0, r2, #29
 8006738:	d510      	bpl.n	800675c <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 800673a:	68da      	ldr	r2, [r3, #12]
 800673c:	0751      	lsls	r1, r2, #29
 800673e:	d50d      	bpl.n	800675c <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8006740:	f06f 0204 	mvn.w	r2, #4
 8006744:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8006746:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8006748:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800674a:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800674c:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8006750:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8006752:	d068      	beq.n	8006826 <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 8006754:	f7ff ffd5 	bl	8006702 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006758:	2300      	movs	r3, #0
 800675a:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 800675c:	6823      	ldr	r3, [r4, #0]
 800675e:	691a      	ldr	r2, [r3, #16]
 8006760:	0712      	lsls	r2, r2, #28
 8006762:	d50f      	bpl.n	8006784 <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 8006764:	68da      	ldr	r2, [r3, #12]
 8006766:	0710      	lsls	r0, r2, #28
 8006768:	d50c      	bpl.n	8006784 <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 800676a:	f06f 0208 	mvn.w	r2, #8
 800676e:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8006770:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8006772:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8006774:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8006776:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8006778:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800677a:	d05a      	beq.n	8006832 <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 800677c:	f7ff ffc1 	bl	8006702 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006780:	2300      	movs	r3, #0
 8006782:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8006784:	6823      	ldr	r3, [r4, #0]
 8006786:	691a      	ldr	r2, [r3, #16]
 8006788:	06d2      	lsls	r2, r2, #27
 800678a:	d510      	bpl.n	80067ae <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 800678c:	68da      	ldr	r2, [r3, #12]
 800678e:	06d0      	lsls	r0, r2, #27
 8006790:	d50d      	bpl.n	80067ae <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8006792:	f06f 0210 	mvn.w	r2, #16
 8006796:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8006798:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800679a:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800679c:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800679e:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 80067a2:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 80067a4:	d04b      	beq.n	800683e <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 80067a6:	f7ff ffac 	bl	8006702 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 80067aa:	2300      	movs	r3, #0
 80067ac:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 80067ae:	6823      	ldr	r3, [r4, #0]
 80067b0:	691a      	ldr	r2, [r3, #16]
 80067b2:	07d1      	lsls	r1, r2, #31
 80067b4:	d508      	bpl.n	80067c8 <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 80067b6:	68da      	ldr	r2, [r3, #12]
 80067b8:	07d2      	lsls	r2, r2, #31
 80067ba:	d505      	bpl.n	80067c8 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 80067bc:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 80067c0:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 80067c2:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 80067c4:	f001 fa70 	bl	8007ca8 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 80067c8:	6823      	ldr	r3, [r4, #0]
 80067ca:	691a      	ldr	r2, [r3, #16]
 80067cc:	0610      	lsls	r0, r2, #24
 80067ce:	d508      	bpl.n	80067e2 <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 80067d0:	68da      	ldr	r2, [r3, #12]
 80067d2:	0611      	lsls	r1, r2, #24
 80067d4:	d505      	bpl.n	80067e2 <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 80067d6:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 80067da:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 80067dc:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 80067de:	f000 f8be 	bl	800695e <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 80067e2:	6823      	ldr	r3, [r4, #0]
 80067e4:	691a      	ldr	r2, [r3, #16]
 80067e6:	0652      	lsls	r2, r2, #25
 80067e8:	d508      	bpl.n	80067fc <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 80067ea:	68da      	ldr	r2, [r3, #12]
 80067ec:	0650      	lsls	r0, r2, #25
 80067ee:	d505      	bpl.n	80067fc <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 80067f0:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 80067f4:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 80067f6:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 80067f8:	f7ff ff85 	bl	8006706 <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 80067fc:	6823      	ldr	r3, [r4, #0]
 80067fe:	691a      	ldr	r2, [r3, #16]
 8006800:	0691      	lsls	r1, r2, #26
 8006802:	d522      	bpl.n	800684a <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 8006804:	68da      	ldr	r2, [r3, #12]
 8006806:	0692      	lsls	r2, r2, #26
 8006808:	d51f      	bpl.n	800684a <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 800680a:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 800680e:	4620      	mov	r0, r4
    }
  }
}
 8006810:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8006814:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 8006816:	f000 b8a1 	b.w	800695c <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 800681a:	f7ff ff71 	bl	8006700 <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 800681e:	4620      	mov	r0, r4
 8006820:	f7ff ff70 	bl	8006704 <HAL_TIM_PWM_PulseFinishedCallback>
 8006824:	e783      	b.n	800672e <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8006826:	f7ff ff6b 	bl	8006700 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800682a:	4620      	mov	r0, r4
 800682c:	f7ff ff6a 	bl	8006704 <HAL_TIM_PWM_PulseFinishedCallback>
 8006830:	e792      	b.n	8006758 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8006832:	f7ff ff65 	bl	8006700 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8006836:	4620      	mov	r0, r4
 8006838:	f7ff ff64 	bl	8006704 <HAL_TIM_PWM_PulseFinishedCallback>
 800683c:	e7a0      	b.n	8006780 <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800683e:	f7ff ff5f 	bl	8006700 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8006842:	4620      	mov	r0, r4
 8006844:	f7ff ff5e 	bl	8006704 <HAL_TIM_PWM_PulseFinishedCallback>
 8006848:	e7af      	b.n	80067aa <HAL_TIM_IRQHandler+0xa2>
 800684a:	bd10      	pop	{r4, pc}

0800684c <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 800684c:	4a24      	ldr	r2, [pc, #144]	; (80068e0 <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 800684e:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8006850:	4290      	cmp	r0, r2
 8006852:	d012      	beq.n	800687a <TIM_Base_SetConfig+0x2e>
 8006854:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8006858:	4290      	cmp	r0, r2
 800685a:	d00e      	beq.n	800687a <TIM_Base_SetConfig+0x2e>
 800685c:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8006860:	d00b      	beq.n	800687a <TIM_Base_SetConfig+0x2e>
 8006862:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8006866:	4290      	cmp	r0, r2
 8006868:	d007      	beq.n	800687a <TIM_Base_SetConfig+0x2e>
 800686a:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 800686e:	4290      	cmp	r0, r2
 8006870:	d003      	beq.n	800687a <TIM_Base_SetConfig+0x2e>
 8006872:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8006876:	4290      	cmp	r0, r2
 8006878:	d11d      	bne.n	80068b6 <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 800687a:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 800687c:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8006880:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 8006882:	4a17      	ldr	r2, [pc, #92]	; (80068e0 <TIM_Base_SetConfig+0x94>)
 8006884:	4290      	cmp	r0, r2
 8006886:	d012      	beq.n	80068ae <TIM_Base_SetConfig+0x62>
 8006888:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 800688c:	4290      	cmp	r0, r2
 800688e:	d00e      	beq.n	80068ae <TIM_Base_SetConfig+0x62>
 8006890:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8006894:	d00b      	beq.n	80068ae <TIM_Base_SetConfig+0x62>
 8006896:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 800689a:	4290      	cmp	r0, r2
 800689c:	d007      	beq.n	80068ae <TIM_Base_SetConfig+0x62>
 800689e:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80068a2:	4290      	cmp	r0, r2
 80068a4:	d003      	beq.n	80068ae <TIM_Base_SetConfig+0x62>
 80068a6:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 80068aa:	4290      	cmp	r0, r2
 80068ac:	d103      	bne.n	80068b6 <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 80068ae:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 80068b0:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 80068b4:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 80068b6:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 80068b8:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 80068bc:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 80068be:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 80068c0:	688b      	ldr	r3, [r1, #8]
 80068c2:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 80068c4:	680b      	ldr	r3, [r1, #0]
 80068c6:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 80068c8:	4b05      	ldr	r3, [pc, #20]	; (80068e0 <TIM_Base_SetConfig+0x94>)
 80068ca:	4298      	cmp	r0, r3
 80068cc:	d003      	beq.n	80068d6 <TIM_Base_SetConfig+0x8a>
 80068ce:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 80068d2:	4298      	cmp	r0, r3
 80068d4:	d101      	bne.n	80068da <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 80068d6:	690b      	ldr	r3, [r1, #16]
 80068d8:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 80068da:	2301      	movs	r3, #1
 80068dc:	6143      	str	r3, [r0, #20]
 80068de:	4770      	bx	lr
 80068e0:	40012c00 	.word	0x40012c00

080068e4 <HAL_TIM_Base_Init>:
{
 80068e4:	b510      	push	{r4, lr}
  if(htim == NULL)
 80068e6:	4604      	mov	r4, r0
 80068e8:	b1a0      	cbz	r0, 8006914 <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 80068ea:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 80068ee:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 80068f2:	b91b      	cbnz	r3, 80068fc <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 80068f4:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 80068f8:	f001 fdd4 	bl	80084a4 <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 80068fc:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 80068fe:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8006900:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8006904:	1d21      	adds	r1, r4, #4
 8006906:	f7ff ffa1 	bl	800684c <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 800690a:	2301      	movs	r3, #1
  return HAL_OK;
 800690c:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 800690e:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 8006912:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8006914:	2001      	movs	r0, #1
}
 8006916:	bd10      	pop	{r4, pc}

08006918 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 8006918:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 800691c:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 800691e:	2b01      	cmp	r3, #1
 8006920:	f04f 0302 	mov.w	r3, #2
 8006924:	d018      	beq.n	8006958 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 8006926:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 800692a:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 800692c:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 800692e:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8006930:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8006932:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 8006936:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8006938:	685a      	ldr	r2, [r3, #4]
 800693a:	4322      	orrs	r2, r4
 800693c:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 800693e:	689a      	ldr	r2, [r3, #8]
 8006940:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8006944:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8006946:	689a      	ldr	r2, [r3, #8]
 8006948:	430a      	orrs	r2, r1
 800694a:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 800694c:	2301      	movs	r3, #1
 800694e:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 8006952:	2300      	movs	r3, #0
 8006954:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8006958:	4618      	mov	r0, r3

  return HAL_OK;
}
 800695a:	bd10      	pop	{r4, pc}

0800695c <HAL_TIMEx_CommutationCallback>:
 800695c:	4770      	bx	lr

0800695e <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800695e:	4770      	bx	lr

08006960 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8006960:	6803      	ldr	r3, [r0, #0]
 8006962:	68da      	ldr	r2, [r3, #12]
 8006964:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8006968:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800696a:	695a      	ldr	r2, [r3, #20]
 800696c:	f022 0201 	bic.w	r2, r2, #1
 8006970:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8006972:	2320      	movs	r3, #32
 8006974:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8006978:	4770      	bx	lr
	...

0800697c <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 800697c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8006980:	6805      	ldr	r5, [r0, #0]
 8006982:	68c2      	ldr	r2, [r0, #12]
 8006984:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006986:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8006988:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 800698c:	4313      	orrs	r3, r2
 800698e:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006990:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 8006992:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006994:	430b      	orrs	r3, r1
 8006996:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8006998:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 800699c:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 80069a0:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 80069a2:	4313      	orrs	r3, r2
 80069a4:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 80069a6:	696b      	ldr	r3, [r5, #20]
 80069a8:	6982      	ldr	r2, [r0, #24]
 80069aa:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 80069ae:	4313      	orrs	r3, r2
 80069b0:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 80069b2:	4b40      	ldr	r3, [pc, #256]	; (8006ab4 <UART_SetConfig+0x138>)
{
 80069b4:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 80069b6:	429d      	cmp	r5, r3
 80069b8:	f04f 0419 	mov.w	r4, #25
 80069bc:	d146      	bne.n	8006a4c <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 80069be:	f7ff fd95 	bl	80064ec <HAL_RCC_GetPCLK2Freq>
 80069c2:	fb04 f300 	mul.w	r3, r4, r0
 80069c6:	f8d9 6004 	ldr.w	r6, [r9, #4]
 80069ca:	f04f 0864 	mov.w	r8, #100	; 0x64
 80069ce:	00b6      	lsls	r6, r6, #2
 80069d0:	fbb3 f3f6 	udiv	r3, r3, r6
 80069d4:	fbb3 f3f8 	udiv	r3, r3, r8
 80069d8:	011e      	lsls	r6, r3, #4
 80069da:	f7ff fd87 	bl	80064ec <HAL_RCC_GetPCLK2Freq>
 80069de:	4360      	muls	r0, r4
 80069e0:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80069e4:	009b      	lsls	r3, r3, #2
 80069e6:	fbb0 f7f3 	udiv	r7, r0, r3
 80069ea:	f7ff fd7f 	bl	80064ec <HAL_RCC_GetPCLK2Freq>
 80069ee:	4360      	muls	r0, r4
 80069f0:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80069f4:	009b      	lsls	r3, r3, #2
 80069f6:	fbb0 f3f3 	udiv	r3, r0, r3
 80069fa:	fbb3 f3f8 	udiv	r3, r3, r8
 80069fe:	fb08 7313 	mls	r3, r8, r3, r7
 8006a02:	011b      	lsls	r3, r3, #4
 8006a04:	3332      	adds	r3, #50	; 0x32
 8006a06:	fbb3 f3f8 	udiv	r3, r3, r8
 8006a0a:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8006a0e:	f7ff fd6d 	bl	80064ec <HAL_RCC_GetPCLK2Freq>
 8006a12:	4360      	muls	r0, r4
 8006a14:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8006a18:	0092      	lsls	r2, r2, #2
 8006a1a:	fbb0 faf2 	udiv	sl, r0, r2
 8006a1e:	f7ff fd65 	bl	80064ec <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 8006a22:	4360      	muls	r0, r4
 8006a24:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006a28:	009b      	lsls	r3, r3, #2
 8006a2a:	fbb0 f3f3 	udiv	r3, r0, r3
 8006a2e:	fbb3 f3f8 	udiv	r3, r3, r8
 8006a32:	fb08 a313 	mls	r3, r8, r3, sl
 8006a36:	011b      	lsls	r3, r3, #4
 8006a38:	3332      	adds	r3, #50	; 0x32
 8006a3a:	fbb3 f3f8 	udiv	r3, r3, r8
 8006a3e:	f003 030f 	and.w	r3, r3, #15
 8006a42:	433b      	orrs	r3, r7
 8006a44:	4433      	add	r3, r6
 8006a46:	60ab      	str	r3, [r5, #8]
 8006a48:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8006a4c:	f7ff fd3e 	bl	80064cc <HAL_RCC_GetPCLK1Freq>
 8006a50:	fb04 f300 	mul.w	r3, r4, r0
 8006a54:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8006a58:	f04f 0864 	mov.w	r8, #100	; 0x64
 8006a5c:	00b6      	lsls	r6, r6, #2
 8006a5e:	fbb3 f3f6 	udiv	r3, r3, r6
 8006a62:	fbb3 f3f8 	udiv	r3, r3, r8
 8006a66:	011e      	lsls	r6, r3, #4
 8006a68:	f7ff fd30 	bl	80064cc <HAL_RCC_GetPCLK1Freq>
 8006a6c:	4360      	muls	r0, r4
 8006a6e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006a72:	009b      	lsls	r3, r3, #2
 8006a74:	fbb0 f7f3 	udiv	r7, r0, r3
 8006a78:	f7ff fd28 	bl	80064cc <HAL_RCC_GetPCLK1Freq>
 8006a7c:	4360      	muls	r0, r4
 8006a7e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006a82:	009b      	lsls	r3, r3, #2
 8006a84:	fbb0 f3f3 	udiv	r3, r0, r3
 8006a88:	fbb3 f3f8 	udiv	r3, r3, r8
 8006a8c:	fb08 7313 	mls	r3, r8, r3, r7
 8006a90:	011b      	lsls	r3, r3, #4
 8006a92:	3332      	adds	r3, #50	; 0x32
 8006a94:	fbb3 f3f8 	udiv	r3, r3, r8
 8006a98:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8006a9c:	f7ff fd16 	bl	80064cc <HAL_RCC_GetPCLK1Freq>
 8006aa0:	4360      	muls	r0, r4
 8006aa2:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8006aa6:	0092      	lsls	r2, r2, #2
 8006aa8:	fbb0 faf2 	udiv	sl, r0, r2
 8006aac:	f7ff fd0e 	bl	80064cc <HAL_RCC_GetPCLK1Freq>
 8006ab0:	e7b7      	b.n	8006a22 <UART_SetConfig+0xa6>
 8006ab2:	bf00      	nop
 8006ab4:	40013800 	.word	0x40013800

08006ab8 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 8006ab8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8006aba:	4604      	mov	r4, r0
 8006abc:	460e      	mov	r6, r1
 8006abe:	4617      	mov	r7, r2
 8006ac0:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 8006ac2:	6821      	ldr	r1, [r4, #0]
 8006ac4:	680b      	ldr	r3, [r1, #0]
 8006ac6:	ea36 0303 	bics.w	r3, r6, r3
 8006aca:	d101      	bne.n	8006ad0 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 8006acc:	2000      	movs	r0, #0
}
 8006ace:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 8006ad0:	1c6b      	adds	r3, r5, #1
 8006ad2:	d0f7      	beq.n	8006ac4 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8006ad4:	b995      	cbnz	r5, 8006afc <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8006ad6:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 8006ad8:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8006ada:	68da      	ldr	r2, [r3, #12]
 8006adc:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 8006ae0:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006ae2:	695a      	ldr	r2, [r3, #20]
 8006ae4:	f022 0201 	bic.w	r2, r2, #1
 8006ae8:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 8006aea:	2320      	movs	r3, #32
 8006aec:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8006af0:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8006af4:	2300      	movs	r3, #0
 8006af6:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 8006afa:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8006afc:	f7fe fb68 	bl	80051d0 <HAL_GetTick>
 8006b00:	1bc0      	subs	r0, r0, r7
 8006b02:	4285      	cmp	r5, r0
 8006b04:	d2dd      	bcs.n	8006ac2 <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 8006b06:	e7e6      	b.n	8006ad6 <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08006b08 <HAL_UART_Init>:
{
 8006b08:	b510      	push	{r4, lr}
  if(huart == NULL)
 8006b0a:	4604      	mov	r4, r0
 8006b0c:	b340      	cbz	r0, 8006b60 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 8006b0e:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8006b12:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8006b16:	b91b      	cbnz	r3, 8006b20 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8006b18:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8006b1c:	f001 fcd6 	bl	80084cc <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8006b20:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8006b22:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8006b24:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8006b28:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 8006b2a:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8006b2c:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8006b30:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8006b32:	f7ff ff23 	bl	800697c <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8006b36:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006b38:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8006b3a:	691a      	ldr	r2, [r3, #16]
 8006b3c:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8006b40:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 8006b42:	695a      	ldr	r2, [r3, #20]
 8006b44:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8006b48:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8006b4a:	68da      	ldr	r2, [r3, #12]
 8006b4c:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8006b50:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 8006b52:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006b54:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 8006b56:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 8006b5a:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 8006b5e:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8006b60:	2001      	movs	r0, #1
}
 8006b62:	bd10      	pop	{r4, pc}

08006b64 <HAL_UART_Transmit>:
{
 8006b64:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8006b68:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 8006b6a:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 8006b6e:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 8006b70:	2b20      	cmp	r3, #32
{
 8006b72:	460d      	mov	r5, r1
 8006b74:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 8006b76:	d14e      	bne.n	8006c16 <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 8006b78:	2900      	cmp	r1, #0
 8006b7a:	d049      	beq.n	8006c10 <HAL_UART_Transmit+0xac>
 8006b7c:	2a00      	cmp	r2, #0
 8006b7e:	d047      	beq.n	8006c10 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 8006b80:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8006b84:	2b01      	cmp	r3, #1
 8006b86:	d046      	beq.n	8006c16 <HAL_UART_Transmit+0xb2>
 8006b88:	2301      	movs	r3, #1
 8006b8a:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006b8e:	2300      	movs	r3, #0
 8006b90:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8006b92:	2321      	movs	r3, #33	; 0x21
 8006b94:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 8006b98:	f7fe fb1a 	bl	80051d0 <HAL_GetTick>
 8006b9c:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 8006b9e:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 8006ba2:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 8006ba6:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 8006ba8:	b29b      	uxth	r3, r3
 8006baa:	b96b      	cbnz	r3, 8006bc8 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8006bac:	463b      	mov	r3, r7
 8006bae:	4632      	mov	r2, r6
 8006bb0:	2140      	movs	r1, #64	; 0x40
 8006bb2:	4620      	mov	r0, r4
 8006bb4:	f7ff ff80 	bl	8006ab8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8006bb8:	b9a8      	cbnz	r0, 8006be6 <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 8006bba:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 8006bbc:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 8006bc0:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 8006bc4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 8006bc8:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006bca:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8006bcc:	3b01      	subs	r3, #1
 8006bce:	b29b      	uxth	r3, r3
 8006bd0:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006bd2:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006bd4:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006bd6:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006bda:	4620      	mov	r0, r4
 8006bdc:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006bde:	d10e      	bne.n	8006bfe <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006be0:	f7ff ff6a 	bl	8006ab8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8006be4:	b110      	cbz	r0, 8006bec <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 8006be6:	2003      	movs	r0, #3
 8006be8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8006bec:	882b      	ldrh	r3, [r5, #0]
 8006bee:	6822      	ldr	r2, [r4, #0]
 8006bf0:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8006bf4:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 8006bf6:	6923      	ldr	r3, [r4, #16]
 8006bf8:	b943      	cbnz	r3, 8006c0c <HAL_UART_Transmit+0xa8>
          pData +=2U;
 8006bfa:	3502      	adds	r5, #2
 8006bfc:	e7d3      	b.n	8006ba6 <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006bfe:	f7ff ff5b 	bl	8006ab8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8006c02:	2800      	cmp	r0, #0
 8006c04:	d1ef      	bne.n	8006be6 <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 8006c06:	6823      	ldr	r3, [r4, #0]
 8006c08:	782a      	ldrb	r2, [r5, #0]
 8006c0a:	605a      	str	r2, [r3, #4]
 8006c0c:	3501      	adds	r5, #1
 8006c0e:	e7ca      	b.n	8006ba6 <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 8006c10:	2001      	movs	r0, #1
 8006c12:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 8006c16:	2002      	movs	r0, #2
}
 8006c18:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

08006c1c <HAL_UART_Transmit_DMA>:
{
 8006c1c:	b538      	push	{r3, r4, r5, lr}
 8006c1e:	4604      	mov	r4, r0
 8006c20:	4613      	mov	r3, r2
  if(huart->gState == HAL_UART_STATE_READY)
 8006c22:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8006c26:	2a20      	cmp	r2, #32
 8006c28:	d12a      	bne.n	8006c80 <HAL_UART_Transmit_DMA+0x64>
    if((pData == NULL) || (Size == 0U))
 8006c2a:	b339      	cbz	r1, 8006c7c <HAL_UART_Transmit_DMA+0x60>
 8006c2c:	b333      	cbz	r3, 8006c7c <HAL_UART_Transmit_DMA+0x60>
    __HAL_LOCK(huart);
 8006c2e:	f894 2038 	ldrb.w	r2, [r4, #56]	; 0x38
 8006c32:	2a01      	cmp	r2, #1
 8006c34:	d024      	beq.n	8006c80 <HAL_UART_Transmit_DMA+0x64>
 8006c36:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006c38:	2500      	movs	r5, #0
    __HAL_LOCK(huart);
 8006c3a:	f884 2038 	strb.w	r2, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8006c3e:	2221      	movs	r2, #33	; 0x21
    huart->TxXferCount = Size;
 8006c40:	84e3      	strh	r3, [r4, #38]	; 0x26
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006c42:	6b20      	ldr	r0, [r4, #48]	; 0x30
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006c44:	63e5      	str	r5, [r4, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8006c46:	f884 2039 	strb.w	r2, [r4, #57]	; 0x39
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006c4a:	4a0e      	ldr	r2, [pc, #56]	; (8006c84 <HAL_UART_Transmit_DMA+0x68>)
    huart->TxXferSize = Size;
 8006c4c:	84a3      	strh	r3, [r4, #36]	; 0x24
    huart->pTxBuffPtr = pData;
 8006c4e:	6221      	str	r1, [r4, #32]
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006c50:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
 8006c52:	4a0d      	ldr	r2, [pc, #52]	; (8006c88 <HAL_UART_Transmit_DMA+0x6c>)
    huart->hdmatx->XferAbortCallback = NULL;
 8006c54:	6345      	str	r5, [r0, #52]	; 0x34
    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
 8006c56:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmatx->XferErrorCallback = UART_DMAError;
 8006c58:	4a0c      	ldr	r2, [pc, #48]	; (8006c8c <HAL_UART_Transmit_DMA+0x70>)
 8006c5a:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size);
 8006c5c:	6822      	ldr	r2, [r4, #0]
 8006c5e:	3204      	adds	r2, #4
 8006c60:	f7fe fe10 	bl	8005884 <HAL_DMA_Start_IT>
    __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
 8006c64:	f06f 0240 	mvn.w	r2, #64	; 0x40
 8006c68:	6823      	ldr	r3, [r4, #0]
    return HAL_OK;
 8006c6a:	4628      	mov	r0, r5
    __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
 8006c6c:	601a      	str	r2, [r3, #0]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 8006c6e:	695a      	ldr	r2, [r3, #20]
    __HAL_UNLOCK(huart);
 8006c70:	f884 5038 	strb.w	r5, [r4, #56]	; 0x38
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 8006c74:	f042 0280 	orr.w	r2, r2, #128	; 0x80
 8006c78:	615a      	str	r2, [r3, #20]
    return HAL_OK;
 8006c7a:	bd38      	pop	{r3, r4, r5, pc}
      return HAL_ERROR;
 8006c7c:	2001      	movs	r0, #1
 8006c7e:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_BUSY;
 8006c80:	2002      	movs	r0, #2
}
 8006c82:	bd38      	pop	{r3, r4, r5, pc}
 8006c84:	08006d23 	.word	0x08006d23
 8006c88:	08006d51 	.word	0x08006d51
 8006c8c:	08006e1d 	.word	0x08006e1d

08006c90 <HAL_UART_Receive_DMA>:
{
 8006c90:	4613      	mov	r3, r2
  if(huart->RxState == HAL_UART_STATE_READY) 
 8006c92:	f890 203a 	ldrb.w	r2, [r0, #58]	; 0x3a
{
 8006c96:	b573      	push	{r0, r1, r4, r5, r6, lr}
  if(huart->RxState == HAL_UART_STATE_READY) 
 8006c98:	2a20      	cmp	r2, #32
{
 8006c9a:	4605      	mov	r5, r0
  if(huart->RxState == HAL_UART_STATE_READY) 
 8006c9c:	d138      	bne.n	8006d10 <HAL_UART_Receive_DMA+0x80>
    if((pData == NULL) || (Size == 0U))
 8006c9e:	2900      	cmp	r1, #0
 8006ca0:	d034      	beq.n	8006d0c <HAL_UART_Receive_DMA+0x7c>
 8006ca2:	2b00      	cmp	r3, #0
 8006ca4:	d032      	beq.n	8006d0c <HAL_UART_Receive_DMA+0x7c>
    __HAL_LOCK(huart);
 8006ca6:	f890 2038 	ldrb.w	r2, [r0, #56]	; 0x38
 8006caa:	2a01      	cmp	r2, #1
 8006cac:	d030      	beq.n	8006d10 <HAL_UART_Receive_DMA+0x80>
 8006cae:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006cb0:	2400      	movs	r4, #0
    __HAL_LOCK(huart);
 8006cb2:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8006cb6:	2222      	movs	r2, #34	; 0x22
    huart->pRxBuffPtr = pData;
 8006cb8:	6281      	str	r1, [r0, #40]	; 0x28
    huart->RxXferSize = Size;
 8006cba:	8583      	strh	r3, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006cbc:	63c4      	str	r4, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8006cbe:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 8006cc2:	6b40      	ldr	r0, [r0, #52]	; 0x34
 8006cc4:	4a13      	ldr	r2, [pc, #76]	; (8006d14 <HAL_UART_Receive_DMA+0x84>)
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 8006cc6:	682e      	ldr	r6, [r5, #0]
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 8006cc8:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 8006cca:	4a13      	ldr	r2, [pc, #76]	; (8006d18 <HAL_UART_Receive_DMA+0x88>)
    huart->hdmarx->XferAbortCallback = NULL;
 8006ccc:	6344      	str	r4, [r0, #52]	; 0x34
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 8006cce:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmarx->XferErrorCallback = UART_DMAError;
 8006cd0:	4a12      	ldr	r2, [pc, #72]	; (8006d1c <HAL_UART_Receive_DMA+0x8c>)
 8006cd2:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 8006cd4:	460a      	mov	r2, r1
 8006cd6:	1d31      	adds	r1, r6, #4
 8006cd8:	f7fe fdd4 	bl	8005884 <HAL_DMA_Start_IT>
    return HAL_OK;
 8006cdc:	4620      	mov	r0, r4
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006cde:	682b      	ldr	r3, [r5, #0]
 8006ce0:	9401      	str	r4, [sp, #4]
 8006ce2:	681a      	ldr	r2, [r3, #0]
 8006ce4:	9201      	str	r2, [sp, #4]
 8006ce6:	685a      	ldr	r2, [r3, #4]
    __HAL_UNLOCK(huart);
 8006ce8:	f885 4038 	strb.w	r4, [r5, #56]	; 0x38
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006cec:	9201      	str	r2, [sp, #4]
 8006cee:	9a01      	ldr	r2, [sp, #4]
    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8006cf0:	68da      	ldr	r2, [r3, #12]
 8006cf2:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 8006cf6:	60da      	str	r2, [r3, #12]
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006cf8:	695a      	ldr	r2, [r3, #20]
 8006cfa:	f042 0201 	orr.w	r2, r2, #1
 8006cfe:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006d00:	695a      	ldr	r2, [r3, #20]
 8006d02:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8006d06:	615a      	str	r2, [r3, #20]
}
 8006d08:	b002      	add	sp, #8
 8006d0a:	bd70      	pop	{r4, r5, r6, pc}
      return HAL_ERROR;
 8006d0c:	2001      	movs	r0, #1
 8006d0e:	e7fb      	b.n	8006d08 <HAL_UART_Receive_DMA+0x78>
    return HAL_BUSY;
 8006d10:	2002      	movs	r0, #2
 8006d12:	e7f9      	b.n	8006d08 <HAL_UART_Receive_DMA+0x78>
 8006d14:	08006d5b 	.word	0x08006d5b
 8006d18:	08006e11 	.word	0x08006e11
 8006d1c:	08006e1d 	.word	0x08006e1d

08006d20 <HAL_UART_TxCpltCallback>:
 8006d20:	4770      	bx	lr

08006d22 <UART_DMATransmitCplt>:
{
 8006d22:	b508      	push	{r3, lr}
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006d24:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8006d26:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006d28:	681b      	ldr	r3, [r3, #0]
 8006d2a:	f013 0320 	ands.w	r3, r3, #32
 8006d2e:	d10a      	bne.n	8006d46 <UART_DMATransmitCplt+0x24>
    huart->TxXferCount = 0U;
 8006d30:	84d3      	strh	r3, [r2, #38]	; 0x26
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 8006d32:	6813      	ldr	r3, [r2, #0]
 8006d34:	695a      	ldr	r2, [r3, #20]
 8006d36:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8006d3a:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 8006d3c:	68da      	ldr	r2, [r3, #12]
 8006d3e:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8006d42:	60da      	str	r2, [r3, #12]
 8006d44:	bd08      	pop	{r3, pc}
    HAL_UART_TxCpltCallback(huart);
 8006d46:	4610      	mov	r0, r2
 8006d48:	f7ff ffea 	bl	8006d20 <HAL_UART_TxCpltCallback>
 8006d4c:	bd08      	pop	{r3, pc}

08006d4e <HAL_UART_TxHalfCpltCallback>:
 8006d4e:	4770      	bx	lr

08006d50 <UART_DMATxHalfCplt>:
{
 8006d50:	b508      	push	{r3, lr}
  HAL_UART_TxHalfCpltCallback(huart);
 8006d52:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8006d54:	f7ff fffb 	bl	8006d4e <HAL_UART_TxHalfCpltCallback>
 8006d58:	bd08      	pop	{r3, pc}

08006d5a <UART_DMAReceiveCplt>:
{
 8006d5a:	b508      	push	{r3, lr}
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006d5c:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8006d5e:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8006d60:	681b      	ldr	r3, [r3, #0]
 8006d62:	f013 0320 	ands.w	r3, r3, #32
 8006d66:	d110      	bne.n	8006d8a <UART_DMAReceiveCplt+0x30>
    huart->RxXferCount = 0U;
 8006d68:	85d3      	strh	r3, [r2, #46]	; 0x2e
    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8006d6a:	6813      	ldr	r3, [r2, #0]
 8006d6c:	68d9      	ldr	r1, [r3, #12]
 8006d6e:	f421 7180 	bic.w	r1, r1, #256	; 0x100
 8006d72:	60d9      	str	r1, [r3, #12]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006d74:	6959      	ldr	r1, [r3, #20]
 8006d76:	f021 0101 	bic.w	r1, r1, #1
 8006d7a:	6159      	str	r1, [r3, #20]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006d7c:	6959      	ldr	r1, [r3, #20]
 8006d7e:	f021 0140 	bic.w	r1, r1, #64	; 0x40
 8006d82:	6159      	str	r1, [r3, #20]
    huart->RxState = HAL_UART_STATE_READY;
 8006d84:	2320      	movs	r3, #32
 8006d86:	f882 303a 	strb.w	r3, [r2, #58]	; 0x3a
  HAL_UART_RxCpltCallback(huart);
 8006d8a:	4610      	mov	r0, r2
 8006d8c:	f001 fcdc 	bl	8008748 <HAL_UART_RxCpltCallback>
 8006d90:	bd08      	pop	{r3, pc}

08006d92 <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8006d92:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 8006d96:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 8006d98:	2b22      	cmp	r3, #34	; 0x22
 8006d9a:	d136      	bne.n	8006e0a <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006d9c:	6883      	ldr	r3, [r0, #8]
 8006d9e:	6901      	ldr	r1, [r0, #16]
 8006da0:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 8006da4:	6802      	ldr	r2, [r0, #0]
 8006da6:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8006da8:	d123      	bne.n	8006df2 <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8006daa:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8006dac:	b9e9      	cbnz	r1, 8006dea <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 8006dae:	f3c2 0208 	ubfx	r2, r2, #0, #9
 8006db2:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 8006db6:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 8006db8:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 8006dba:	3c01      	subs	r4, #1
 8006dbc:	b2a4      	uxth	r4, r4
 8006dbe:	85c4      	strh	r4, [r0, #46]	; 0x2e
 8006dc0:	b98c      	cbnz	r4, 8006de6 <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 8006dc2:	6803      	ldr	r3, [r0, #0]
 8006dc4:	68da      	ldr	r2, [r3, #12]
 8006dc6:	f022 0220 	bic.w	r2, r2, #32
 8006dca:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 8006dcc:	68da      	ldr	r2, [r3, #12]
 8006dce:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 8006dd2:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 8006dd4:	695a      	ldr	r2, [r3, #20]
 8006dd6:	f022 0201 	bic.w	r2, r2, #1
 8006dda:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 8006ddc:	2320      	movs	r3, #32
 8006dde:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 8006de2:	f001 fcb1 	bl	8008748 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 8006de6:	2000      	movs	r0, #0
}
 8006de8:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8006dea:	b2d2      	uxtb	r2, r2
 8006dec:	f823 2b01 	strh.w	r2, [r3], #1
 8006df0:	e7e1      	b.n	8006db6 <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8006df2:	b921      	cbnz	r1, 8006dfe <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 8006df4:	1c59      	adds	r1, r3, #1
 8006df6:	6852      	ldr	r2, [r2, #4]
 8006df8:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8006dfa:	701a      	strb	r2, [r3, #0]
 8006dfc:	e7dc      	b.n	8006db8 <UART_Receive_IT+0x26>
 8006dfe:	6852      	ldr	r2, [r2, #4]
 8006e00:	1c59      	adds	r1, r3, #1
 8006e02:	6281      	str	r1, [r0, #40]	; 0x28
 8006e04:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8006e08:	e7f7      	b.n	8006dfa <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8006e0a:	2002      	movs	r0, #2
 8006e0c:	bd10      	pop	{r4, pc}

08006e0e <HAL_UART_RxHalfCpltCallback>:
 8006e0e:	4770      	bx	lr

08006e10 <UART_DMARxHalfCplt>:
{
 8006e10:	b508      	push	{r3, lr}
  HAL_UART_RxHalfCpltCallback(huart); 
 8006e12:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8006e14:	f7ff fffb 	bl	8006e0e <HAL_UART_RxHalfCpltCallback>
 8006e18:	bd08      	pop	{r3, pc}

08006e1a <HAL_UART_ErrorCallback>:
 8006e1a:	4770      	bx	lr

08006e1c <UART_DMAError>:
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8006e1c:	6a41      	ldr	r1, [r0, #36]	; 0x24
{
 8006e1e:	b508      	push	{r3, lr}
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
 8006e20:	680b      	ldr	r3, [r1, #0]
 8006e22:	695a      	ldr	r2, [r3, #20]
  if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
 8006e24:	f891 0039 	ldrb.w	r0, [r1, #57]	; 0x39
 8006e28:	2821      	cmp	r0, #33	; 0x21
 8006e2a:	d10a      	bne.n	8006e42 <UART_DMAError+0x26>
 8006e2c:	0612      	lsls	r2, r2, #24
 8006e2e:	d508      	bpl.n	8006e42 <UART_DMAError+0x26>
    huart->TxXferCount = 0U;
 8006e30:	2200      	movs	r2, #0
 8006e32:	84ca      	strh	r2, [r1, #38]	; 0x26
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
 8006e34:	68da      	ldr	r2, [r3, #12]
 8006e36:	f022 02c0 	bic.w	r2, r2, #192	; 0xc0
 8006e3a:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8006e3c:	2220      	movs	r2, #32
 8006e3e:	f881 2039 	strb.w	r2, [r1, #57]	; 0x39
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 
 8006e42:	695b      	ldr	r3, [r3, #20]
  if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
 8006e44:	f891 203a 	ldrb.w	r2, [r1, #58]	; 0x3a
 8006e48:	2a22      	cmp	r2, #34	; 0x22
 8006e4a:	d106      	bne.n	8006e5a <UART_DMAError+0x3e>
 8006e4c:	065b      	lsls	r3, r3, #25
 8006e4e:	d504      	bpl.n	8006e5a <UART_DMAError+0x3e>
    huart->RxXferCount = 0U;
 8006e50:	2300      	movs	r3, #0
    UART_EndRxTransfer(huart);
 8006e52:	4608      	mov	r0, r1
    huart->RxXferCount = 0U;
 8006e54:	85cb      	strh	r3, [r1, #46]	; 0x2e
    UART_EndRxTransfer(huart);
 8006e56:	f7ff fd83 	bl	8006960 <UART_EndRxTransfer>
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8006e5a:	6bcb      	ldr	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8006e5c:	4608      	mov	r0, r1
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 8006e5e:	f043 0310 	orr.w	r3, r3, #16
 8006e62:	63cb      	str	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8006e64:	f7ff ffd9 	bl	8006e1a <HAL_UART_ErrorCallback>
 8006e68:	bd08      	pop	{r3, pc}
	...

08006e6c <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8006e6c:	6803      	ldr	r3, [r0, #0]
{
 8006e6e:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8006e70:	681a      	ldr	r2, [r3, #0]
{
 8006e72:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8006e74:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8006e76:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8006e78:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 8006e7a:	d107      	bne.n	8006e8c <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8006e7c:	0696      	lsls	r6, r2, #26
 8006e7e:	d55a      	bpl.n	8006f36 <HAL_UART_IRQHandler+0xca>
 8006e80:	068d      	lsls	r5, r1, #26
 8006e82:	d558      	bpl.n	8006f36 <HAL_UART_IRQHandler+0xca>
}
 8006e84:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8006e88:	f7ff bf83 	b.w	8006d92 <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 8006e8c:	f015 0501 	ands.w	r5, r5, #1
 8006e90:	d102      	bne.n	8006e98 <HAL_UART_IRQHandler+0x2c>
 8006e92:	f411 7f90 	tst.w	r1, #288	; 0x120
 8006e96:	d04e      	beq.n	8006f36 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 8006e98:	07d3      	lsls	r3, r2, #31
 8006e9a:	d505      	bpl.n	8006ea8 <HAL_UART_IRQHandler+0x3c>
 8006e9c:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 8006e9e:	bf42      	ittt	mi
 8006ea0:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 8006ea2:	f043 0301 	orrmi.w	r3, r3, #1
 8006ea6:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8006ea8:	0750      	lsls	r0, r2, #29
 8006eaa:	d504      	bpl.n	8006eb6 <HAL_UART_IRQHandler+0x4a>
 8006eac:	b11d      	cbz	r5, 8006eb6 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 8006eae:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006eb0:	f043 0302 	orr.w	r3, r3, #2
 8006eb4:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8006eb6:	0793      	lsls	r3, r2, #30
 8006eb8:	d504      	bpl.n	8006ec4 <HAL_UART_IRQHandler+0x58>
 8006eba:	b11d      	cbz	r5, 8006ec4 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 8006ebc:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006ebe:	f043 0304 	orr.w	r3, r3, #4
 8006ec2:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8006ec4:	0716      	lsls	r6, r2, #28
 8006ec6:	d504      	bpl.n	8006ed2 <HAL_UART_IRQHandler+0x66>
 8006ec8:	b11d      	cbz	r5, 8006ed2 <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 8006eca:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006ecc:	f043 0308 	orr.w	r3, r3, #8
 8006ed0:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 8006ed2:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8006ed4:	2b00      	cmp	r3, #0
 8006ed6:	d066      	beq.n	8006fa6 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8006ed8:	0695      	lsls	r5, r2, #26
 8006eda:	d504      	bpl.n	8006ee6 <HAL_UART_IRQHandler+0x7a>
 8006edc:	0688      	lsls	r0, r1, #26
 8006ede:	d502      	bpl.n	8006ee6 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 8006ee0:	4620      	mov	r0, r4
 8006ee2:	f7ff ff56 	bl	8006d92 <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8006ee6:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 8006ee8:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 8006eea:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 8006eec:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 8006eee:	0711      	lsls	r1, r2, #28
 8006ef0:	d402      	bmi.n	8006ef8 <HAL_UART_IRQHandler+0x8c>
 8006ef2:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 8006ef6:	d01a      	beq.n	8006f2e <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8006ef8:	f7ff fd32 	bl	8006960 <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 8006efc:	6823      	ldr	r3, [r4, #0]
 8006efe:	695a      	ldr	r2, [r3, #20]
 8006f00:	0652      	lsls	r2, r2, #25
 8006f02:	d510      	bpl.n	8006f26 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006f04:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8006f06:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8006f08:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8006f0c:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8006f0e:	b150      	cbz	r0, 8006f26 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 8006f10:	4b25      	ldr	r3, [pc, #148]	; (8006fa8 <HAL_UART_IRQHandler+0x13c>)
 8006f12:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 8006f14:	f7fe fcf4 	bl	8005900 <HAL_DMA_Abort_IT>
 8006f18:	2800      	cmp	r0, #0
 8006f1a:	d044      	beq.n	8006fa6 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8006f1c:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 8006f1e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8006f22:	6b43      	ldr	r3, [r0, #52]	; 0x34
 8006f24:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 8006f26:	4620      	mov	r0, r4
 8006f28:	f7ff ff77 	bl	8006e1a <HAL_UART_ErrorCallback>
 8006f2c:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 8006f2e:	f7ff ff74 	bl	8006e1a <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006f32:	63e5      	str	r5, [r4, #60]	; 0x3c
 8006f34:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 8006f36:	0616      	lsls	r6, r2, #24
 8006f38:	d527      	bpl.n	8006f8a <HAL_UART_IRQHandler+0x11e>
 8006f3a:	060d      	lsls	r5, r1, #24
 8006f3c:	d525      	bpl.n	8006f8a <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 8006f3e:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8006f42:	2a21      	cmp	r2, #33	; 0x21
 8006f44:	d12f      	bne.n	8006fa6 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006f46:	68a2      	ldr	r2, [r4, #8]
 8006f48:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8006f4c:	6a22      	ldr	r2, [r4, #32]
 8006f4e:	d117      	bne.n	8006f80 <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 8006f50:	8811      	ldrh	r1, [r2, #0]
 8006f52:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8006f56:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8006f58:	6921      	ldr	r1, [r4, #16]
 8006f5a:	b979      	cbnz	r1, 8006f7c <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8006f5c:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 8006f5e:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 8006f60:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 8006f62:	3a01      	subs	r2, #1
 8006f64:	b292      	uxth	r2, r2
 8006f66:	84e2      	strh	r2, [r4, #38]	; 0x26
 8006f68:	b9ea      	cbnz	r2, 8006fa6 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 8006f6a:	68da      	ldr	r2, [r3, #12]
 8006f6c:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8006f70:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 8006f72:	68da      	ldr	r2, [r3, #12]
 8006f74:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8006f78:	60da      	str	r2, [r3, #12]
 8006f7a:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 8006f7c:	3201      	adds	r2, #1
 8006f7e:	e7ee      	b.n	8006f5e <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 8006f80:	1c51      	adds	r1, r2, #1
 8006f82:	6221      	str	r1, [r4, #32]
 8006f84:	7812      	ldrb	r2, [r2, #0]
 8006f86:	605a      	str	r2, [r3, #4]
 8006f88:	e7ea      	b.n	8006f60 <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 8006f8a:	0650      	lsls	r0, r2, #25
 8006f8c:	d50b      	bpl.n	8006fa6 <HAL_UART_IRQHandler+0x13a>
 8006f8e:	064a      	lsls	r2, r1, #25
 8006f90:	d509      	bpl.n	8006fa6 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8006f92:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8006f94:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8006f96:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8006f9a:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8006f9c:	2320      	movs	r3, #32
 8006f9e:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 8006fa2:	f7ff febd 	bl	8006d20 <HAL_UART_TxCpltCallback>
 8006fa6:	bd70      	pop	{r4, r5, r6, pc}
 8006fa8:	08006fad 	.word	0x08006fad

08006fac <UART_DMAAbortOnError>:
{
 8006fac:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 8006fae:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8006fb0:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 8006fb2:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 8006fb4:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 8006fb6:	f7ff ff30 	bl	8006e1a <HAL_UART_ErrorCallback>
 8006fba:	bd08      	pop	{r3, pc}

08006fbc <AD5318_Ctrl>:
    AD5318_Ctrl(0x57FF);
    AD5318_Ctrl(0x68FF);
    AD5318_Ctrl(0x79FF);
    HAL_Delay(1);
 }
void AD5318_Ctrl(uint16_t ShiftTarget) {
 8006fbc:	b570      	push	{r4, r5, r6, lr}
    char i; /* serial counter */
//    printf("ShiftTarget : %x \r\n",ShiftTarget);
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
 8006fbe:	2200      	movs	r2, #0
void AD5318_Ctrl(uint16_t ShiftTarget) {
 8006fc0:	4605      	mov	r5, r0
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
 8006fc2:	2104      	movs	r1, #4
 8006fc4:	4824      	ldr	r0, [pc, #144]	; (8007058 <AD5318_Ctrl+0x9c>)
 8006fc6:	f7fe fffd 	bl	8005fc4 <HAL_GPIO_WritePin>
 8006fca:	2410      	movs	r4, #16
    for (i=0;i < 16;i++) { /* loop through all 16 data bits */
        HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_SET); /* rise clk line again */
 8006fcc:	4e22      	ldr	r6, [pc, #136]	; (8007058 <AD5318_Ctrl+0x9c>)
 8006fce:	2201      	movs	r2, #1
 8006fd0:	2108      	movs	r1, #8
 8006fd2:	4630      	mov	r0, r6
 8006fd4:	f7fe fff6 	bl	8005fc4 <HAL_GPIO_WritePin>
        if (ShiftTarget & 0x8000) HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_SET);
 8006fd8:	042b      	lsls	r3, r5, #16
 8006fda:	bf4c      	ite	mi
 8006fdc:	2201      	movmi	r2, #1
        else HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET); /* set data bit */
 8006fde:	2200      	movpl	r2, #0
 8006fe0:	2110      	movs	r1, #16
 8006fe2:	4630      	mov	r0, r6
 8006fe4:	f7fe ffee 	bl	8005fc4 <HAL_GPIO_WritePin>
 8006fe8:	3c01      	subs	r4, #1
        HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_RESET); /* lower clock line */
 8006fea:	2200      	movs	r2, #0
 8006fec:	2108      	movs	r1, #8
 8006fee:	4630      	mov	r0, r6
 8006ff0:	f7fe ffe8 	bl	8005fc4 <HAL_GPIO_WritePin>
        ShiftTarget <<= 1;
 8006ff4:	006d      	lsls	r5, r5, #1
    for (i=0;i < 16;i++) { /* loop through all 16 data bits */
 8006ff6:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
        ShiftTarget <<= 1;
 8006ffa:	b2ad      	uxth	r5, r5
    for (i=0;i < 16;i++) { /* loop through all 16 data bits */
 8006ffc:	d1e7      	bne.n	8006fce <AD5318_Ctrl+0x12>
    }
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET);        
 8006ffe:	2201      	movs	r2, #1
 8007000:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007004:	4815      	ldr	r0, [pc, #84]	; (800705c <AD5318_Ctrl+0xa0>)
 8007006:	f7fe ffdd 	bl	8005fc4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 800700a:	200a      	movs	r0, #10
 800700c:	f000 fdee 	bl	8007bec <Pol_Delay_us>
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);    
 8007010:	4622      	mov	r2, r4
 8007012:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007016:	4811      	ldr	r0, [pc, #68]	; (800705c <AD5318_Ctrl+0xa0>)
 8007018:	f7fe ffd4 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_SET);    
 800701c:	2201      	movs	r2, #1
 800701e:	2104      	movs	r1, #4
 8007020:	480d      	ldr	r0, [pc, #52]	; (8007058 <AD5318_Ctrl+0x9c>)
 8007022:	f7fe ffcf 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET);
 8007026:	4622      	mov	r2, r4
 8007028:	2110      	movs	r1, #16
 800702a:	480b      	ldr	r0, [pc, #44]	; (8007058 <AD5318_Ctrl+0x9c>)
 800702c:	f7fe ffca 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET);            
 8007030:	2201      	movs	r2, #1
 8007032:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007036:	4809      	ldr	r0, [pc, #36]	; (800705c <AD5318_Ctrl+0xa0>)
 8007038:	f7fe ffc4 	bl	8005fc4 <HAL_GPIO_WritePin>
    /* rise DAC SYNC line again */
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
 800703c:	4622      	mov	r2, r4
 800703e:	2104      	movs	r1, #4
 8007040:	4805      	ldr	r0, [pc, #20]	; (8007058 <AD5318_Ctrl+0x9c>)
 8007042:	f7fe ffbf 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);            
 8007046:	4622      	mov	r2, r4
    
}
 8007048:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);            
 800704c:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007050:	4802      	ldr	r0, [pc, #8]	; (800705c <AD5318_Ctrl+0xa0>)
 8007052:	f7fe bfb7 	b.w	8005fc4 <HAL_GPIO_WritePin>
 8007056:	bf00      	nop
 8007058:	40012000 	.word	0x40012000
 800705c:	40011400 	.word	0x40011400

08007060 <AD5318_Initialize>:
 void AD5318_Initialize(void){
 8007060:	b508      	push	{r3, lr}
    AD5318_Ctrl(0x800C);
 8007062:	f248 000c 	movw	r0, #32780	; 0x800c
 8007066:	f7ff ffa9 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0xA000);
 800706a:	f44f 4020 	mov.w	r0, #40960	; 0xa000
 800706e:	f7ff ffa5 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x0FFF);
 8007072:	f640 70ff 	movw	r0, #4095	; 0xfff
 8007076:	f7ff ffa1 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x13FF);
 800707a:	f241 30ff 	movw	r0, #5119	; 0x13ff
 800707e:	f7ff ff9d 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x24FF);
 8007082:	f242 40ff 	movw	r0, #9471	; 0x24ff
 8007086:	f7ff ff99 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x35FF);
 800708a:	f243 50ff 	movw	r0, #13823	; 0x35ff
 800708e:	f7ff ff95 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x46FF);
 8007092:	f244 60ff 	movw	r0, #18175	; 0x46ff
 8007096:	f7ff ff91 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x57FF);
 800709a:	f245 70ff 	movw	r0, #22527	; 0x57ff
 800709e:	f7ff ff8d 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x68FF);
 80070a2:	f646 00ff 	movw	r0, #26879	; 0x68ff
 80070a6:	f7ff ff89 	bl	8006fbc <AD5318_Ctrl>
    AD5318_Ctrl(0x79FF);
 80070aa:	f647 10ff 	movw	r0, #31231	; 0x79ff
 80070ae:	f7ff ff85 	bl	8006fbc <AD5318_Ctrl>
 }
 80070b2:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    HAL_Delay(1);
 80070b6:	2001      	movs	r0, #1
 80070b8:	f7fe b890 	b.w	80051dc <HAL_Delay>

080070bc <BDA4601_atten_ctrl>:
    BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0);           
    BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0);               
}


void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
 80070bc:	b084      	sub	sp, #16
 80070be:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80070c2:	ac0a      	add	r4, sp, #40	; 0x28
 80070c4:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 80070c8:	9e0e      	ldr	r6, [sp, #56]	; 0x38
 80070ca:	f8bd 703c 	ldrh.w	r7, [sp, #60]	; 0x3c
    uint8_t i = 0;
//    uint8_t temp = 0;
//    printf("BDA4601_atten_ctrl : %x \r\n",data);
//    temp = 4|data;
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 80070ce:	2200      	movs	r2, #0
 80070d0:	4639      	mov	r1, r7
 80070d2:	4681      	mov	r9, r0
 80070d4:	4630      	mov	r0, r6
void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
 80070d6:	f89d 5040 	ldrb.w	r5, [sp, #64]	; 0x40
 80070da:	f8bd a02c 	ldrh.w	sl, [sp, #44]	; 0x2c
 80070de:	f8dd 8030 	ldr.w	r8, [sp, #48]	; 0x30
 80070e2:	f8bd b034 	ldrh.w	fp, [sp, #52]	; 0x34
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 80070e6:	f7fe ff6d 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 80070ea:	2001      	movs	r0, #1
 80070ec:	f7fe f876 	bl	80051dc <HAL_Delay>
 80070f0:	2406      	movs	r4, #6
    for(i = 0; i < 6; i++){
        if(data & 0x01){
 80070f2:	f015 0201 	ands.w	r2, r5, #1
           HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_SET);//DATA
 80070f6:	bf18      	it	ne
 80070f8:	2201      	movne	r2, #1
//                     HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_SET);//DATA
//                     printf("1");

        }
       else{
       HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_RESET);//DATA
 80070fa:	4659      	mov	r1, fp
 80070fc:	4640      	mov	r0, r8
 80070fe:	f7fe ff61 	bl	8005fc4 <HAL_GPIO_WritePin>
//                HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA
//                printf("0");

       }

        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_SET);//CLOCK
 8007102:	2201      	movs	r2, #1
 8007104:	4651      	mov	r1, sl
 8007106:	4648      	mov	r0, r9
 8007108:	f7fe ff5c 	bl	8005fc4 <HAL_GPIO_WritePin>
        HAL_Delay(1);
 800710c:	2001      	movs	r0, #1
 800710e:	f7fe f865 	bl	80051dc <HAL_Delay>
        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 8007112:	2200      	movs	r2, #0
 8007114:	4651      	mov	r1, sl
 8007116:	4648      	mov	r0, r9
 8007118:	f7fe ff54 	bl	8005fc4 <HAL_GPIO_WritePin>
 800711c:	3c01      	subs	r4, #1
        HAL_Delay(1);
 800711e:	2001      	movs	r0, #1
 8007120:	f7fe f85c 	bl	80051dc <HAL_Delay>
    for(i = 0; i < 6; i++){
 8007124:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
        data >>= 1;
 8007128:	ea4f 0555 	mov.w	r5, r5, lsr #1
    for(i = 0; i < 6; i++){
 800712c:	d1e1      	bne.n	80070f2 <BDA4601_atten_ctrl+0x36>
    }
    HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 800712e:	4622      	mov	r2, r4
 8007130:	4651      	mov	r1, sl
 8007132:	4648      	mov	r0, r9
 8007134:	f7fe ff46 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA
 8007138:	4622      	mov	r2, r4
 800713a:	f44f 6180 	mov.w	r1, #1024	; 0x400
 800713e:	4640      	mov	r0, r8
 8007140:	f7fe ff40 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8007144:	2001      	movs	r0, #1
 8007146:	f7fe f849 	bl	80051dc <HAL_Delay>
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_SET);//LE
 800714a:	4639      	mov	r1, r7
 800714c:	2201      	movs	r2, #1
 800714e:	4630      	mov	r0, r6
 8007150:	f7fe ff38 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8007154:	2001      	movs	r0, #1
 8007156:	f7fe f841 	bl	80051dc <HAL_Delay>
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 800715a:	4622      	mov	r2, r4
 800715c:	4639      	mov	r1, r7
 800715e:	4630      	mov	r0, r6
}
 8007160:	e8bd 4ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007164:	b004      	add	sp, #16
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 8007166:	f7fe bf2d 	b.w	8005fc4 <HAL_GPIO_WritePin>
	...

0800716c <BDA4601_Initialize>:
void BDA4601_Initialize(void){
 800716c:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    BDA4601_atten_ctrl(BDA4601_1_8G_DL1,0);           
 800716e:	2400      	movs	r4, #0
 8007170:	4b42      	ldr	r3, [pc, #264]	; (800727c <BDA4601_Initialize+0x110>)
 8007172:	9402      	str	r4, [sp, #8]
 8007174:	f103 0210 	add.w	r2, r3, #16
 8007178:	e892 0003 	ldmia.w	r2, {r0, r1}
 800717c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007180:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007182:	f7ff ff9b 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_DL2,0);           
 8007186:	4b3e      	ldr	r3, [pc, #248]	; (8007280 <BDA4601_Initialize+0x114>)
 8007188:	9402      	str	r4, [sp, #8]
 800718a:	f103 0210 	add.w	r2, r3, #16
 800718e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007192:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007196:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007198:	f7ff ff90 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL1,0);           
 800719c:	4b39      	ldr	r3, [pc, #228]	; (8007284 <BDA4601_Initialize+0x118>)
 800719e:	9402      	str	r4, [sp, #8]
 80071a0:	f103 0210 	add.w	r2, r3, #16
 80071a4:	e892 0003 	ldmia.w	r2, {r0, r1}
 80071a8:	e88d 0003 	stmia.w	sp, {r0, r1}
 80071ac:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80071ae:	f7ff ff85 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL2,0);           
 80071b2:	4b35      	ldr	r3, [pc, #212]	; (8007288 <BDA4601_Initialize+0x11c>)
 80071b4:	9402      	str	r4, [sp, #8]
 80071b6:	f103 0210 	add.w	r2, r3, #16
 80071ba:	e892 0003 	ldmia.w	r2, {r0, r1}
 80071be:	e88d 0003 	stmia.w	sp, {r0, r1}
 80071c2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80071c4:	f7ff ff7a 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL3,0);           
 80071c8:	4b30      	ldr	r3, [pc, #192]	; (800728c <BDA4601_Initialize+0x120>)
 80071ca:	9402      	str	r4, [sp, #8]
 80071cc:	f103 0210 	add.w	r2, r3, #16
 80071d0:	e892 0003 	ldmia.w	r2, {r0, r1}
 80071d4:	e88d 0003 	stmia.w	sp, {r0, r1}
 80071d8:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80071da:	f7ff ff6f 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL4,0);           
 80071de:	4b2c      	ldr	r3, [pc, #176]	; (8007290 <BDA4601_Initialize+0x124>)
 80071e0:	9402      	str	r4, [sp, #8]
 80071e2:	f103 0210 	add.w	r2, r3, #16
 80071e6:	e892 0003 	ldmia.w	r2, {r0, r1}
 80071ea:	e88d 0003 	stmia.w	sp, {r0, r1}
 80071ee:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80071f0:	f7ff ff64 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_DL1,0);           
 80071f4:	4b27      	ldr	r3, [pc, #156]	; (8007294 <BDA4601_Initialize+0x128>)
 80071f6:	9402      	str	r4, [sp, #8]
 80071f8:	f103 0210 	add.w	r2, r3, #16
 80071fc:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007200:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007204:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007206:	f7ff ff59 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_DL2,0);           
 800720a:	4b23      	ldr	r3, [pc, #140]	; (8007298 <BDA4601_Initialize+0x12c>)
 800720c:	9402      	str	r4, [sp, #8]
 800720e:	f103 0210 	add.w	r2, r3, #16
 8007212:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007216:	e88d 0003 	stmia.w	sp, {r0, r1}
 800721a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800721c:	f7ff ff4e 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL1,0);           
 8007220:	4b1e      	ldr	r3, [pc, #120]	; (800729c <BDA4601_Initialize+0x130>)
 8007222:	9402      	str	r4, [sp, #8]
 8007224:	f103 0210 	add.w	r2, r3, #16
 8007228:	e892 0003 	ldmia.w	r2, {r0, r1}
 800722c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007230:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007232:	f7ff ff43 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL2,0);
 8007236:	4b1a      	ldr	r3, [pc, #104]	; (80072a0 <BDA4601_Initialize+0x134>)
 8007238:	9402      	str	r4, [sp, #8]
 800723a:	f103 0210 	add.w	r2, r3, #16
 800723e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007242:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007246:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007248:	f7ff ff38 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0);           
 800724c:	4b15      	ldr	r3, [pc, #84]	; (80072a4 <BDA4601_Initialize+0x138>)
 800724e:	9402      	str	r4, [sp, #8]
 8007250:	f103 0210 	add.w	r2, r3, #16
 8007254:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007258:	e88d 0003 	stmia.w	sp, {r0, r1}
 800725c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800725e:	f7ff ff2d 	bl	80070bc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0);               
 8007262:	4b11      	ldr	r3, [pc, #68]	; (80072a8 <BDA4601_Initialize+0x13c>)
 8007264:	9402      	str	r4, [sp, #8]
 8007266:	f103 0210 	add.w	r2, r3, #16
 800726a:	e892 0003 	ldmia.w	r2, {r0, r1}
 800726e:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007272:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007274:	f7ff ff22 	bl	80070bc <BDA4601_atten_ctrl>
}
 8007278:	b004      	add	sp, #16
 800727a:	bd10      	pop	{r4, pc}
 800727c:	20000008 	.word	0x20000008
 8007280:	20000020 	.word	0x20000020
 8007284:	20000038 	.word	0x20000038
 8007288:	20000050 	.word	0x20000050
 800728c:	20000068 	.word	0x20000068
 8007290:	20000080 	.word	0x20000080
 8007294:	20000098 	.word	0x20000098
 8007298:	200000b0 	.word	0x200000b0
 800729c:	200000c8 	.word	0x200000c8
 80072a0:	200000e0 	.word	0x200000e0
 80072a4:	200000f8 	.word	0x200000f8
 80072a8:	20000110 	.word	0x20000110

080072ac <STH30_CreateCrc>:
	}
	return(crc16);
}

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 80072ac:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 80072ae:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 80072b0:	4604      	mov	r4, r0
 80072b2:	1a22      	subs	r2, r4, r0
 80072b4:	b2d2      	uxtb	r2, r2
 80072b6:	4291      	cmp	r1, r2
 80072b8:	d801      	bhi.n	80072be <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 80072ba:	4618      	mov	r0, r3
 80072bc:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 80072be:	f814 2b01 	ldrb.w	r2, [r4], #1
 80072c2:	4053      	eors	r3, r2
 80072c4:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 80072c6:	f013 0f80 	tst.w	r3, #128	; 0x80
 80072ca:	f102 32ff 	add.w	r2, r2, #4294967295
 80072ce:	ea4f 0343 	mov.w	r3, r3, lsl #1
 80072d2:	bf18      	it	ne
 80072d4:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 80072d8:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 80072dc:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 80072de:	d1f2      	bne.n	80072c6 <STH30_CreateCrc+0x1a>
 80072e0:	e7e7      	b.n	80072b2 <STH30_CreateCrc+0x6>

080072e2 <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 80072e2:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 80072e4:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 80072e6:	4605      	mov	r5, r0
 80072e8:	1a2c      	subs	r4, r5, r0
 80072ea:	b2e4      	uxtb	r4, r4
 80072ec:	42a1      	cmp	r1, r4
 80072ee:	d803      	bhi.n	80072f8 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 80072f0:	1a9b      	subs	r3, r3, r2
 80072f2:	4258      	negs	r0, r3
 80072f4:	4158      	adcs	r0, r3
 80072f6:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 80072f8:	f815 4b01 	ldrb.w	r4, [r5], #1
 80072fc:	4063      	eors	r3, r4
 80072fe:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8007300:	f013 0f80 	tst.w	r3, #128	; 0x80
 8007304:	f104 34ff 	add.w	r4, r4, #4294967295
 8007308:	ea4f 0343 	mov.w	r3, r3, lsl #1
 800730c:	bf18      	it	ne
 800730e:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8007312:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8007316:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8007318:	d1f2      	bne.n	8007300 <STH30_CheckCrc+0x1e>
 800731a:	e7e5      	b.n	80072e8 <STH30_CheckCrc+0x6>

0800731c <Bit_Compare>:
  ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
  ALL_ATT_3_5G.data5 = ATTEN_3_5G_Initial_Val;        
  PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
}
#endif // PYJ.2019.07.26_END -- 
void Bit_Compare(PE43711_st ATT,uint8_t data,uint8_t Shift_Index){
 800731c:	b084      	sub	sp, #16
 800731e:	e88d 000f 	stmia.w	sp, {r0, r1, r2, r3}
 8007322:	f89d 2018 	ldrb.w	r2, [sp, #24]
 8007326:	f89d 301c 	ldrb.w	r3, [sp, #28]
 800732a:	9802      	ldr	r0, [sp, #8]
    if(data & (0x01 << Shift_Index)){
 800732c:	411a      	asrs	r2, r3
 800732e:	f012 0201 	ands.w	r2, r2, #1
 8007332:	f8bd 100c 	ldrh.w	r1, [sp, #12]
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_SET);//DATA
 8007336:	bf18      	it	ne
 8007338:	2201      	movne	r2, #1
    }
    else{
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
    }
}
 800733a:	b004      	add	sp, #16
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
 800733c:	f7fe be42 	b.w	8005fc4 <HAL_GPIO_WritePin>

08007340 <PE43711_ALL_atten_ctrl>:
void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){
 8007340:	b084      	sub	sp, #16
 8007342:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007346:	b085      	sub	sp, #20
 8007348:	ac0e      	add	r4, sp, #56	; 0x38
 800734a:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 800734e:	9d12      	ldr	r5, [sp, #72]	; 0x48
 8007350:	f8bd 604c 	ldrh.w	r6, [sp, #76]	; 0x4c
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8007354:	2200      	movs	r2, #0
 8007356:	4631      	mov	r1, r6
 8007358:	4680      	mov	r8, r0
 800735a:	4628      	mov	r0, r5
 800735c:	f8bd 903c 	ldrh.w	r9, [sp, #60]	; 0x3c
 8007360:	f7fe fe30 	bl	8005fc4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8007364:	200a      	movs	r0, #10
 8007366:	f000 fc41 	bl	8007bec <Pol_Delay_us>
 800736a:	2700      	movs	r7, #0
//    printf("why not? \r\n");
    for(uint8_t i = 0; i < 8; i++){
      Bit_Compare(ATT.ATT0,ATT.data0,i);
 800736c:	f10d 0b48 	add.w	fp, sp, #72	; 0x48
      Bit_Compare(ATT.ATT1,ATT.data1,i);
 8007370:	f10d 0a64 	add.w	sl, sp, #100	; 0x64
      Bit_Compare(ATT.ATT0,ATT.data0,i);
 8007374:	f89d 3050 	ldrb.w	r3, [sp, #80]	; 0x50
 8007378:	b2fc      	uxtb	r4, r7
 800737a:	9302      	str	r3, [sp, #8]
 800737c:	9512      	str	r5, [sp, #72]	; 0x48
 800737e:	f8ad 604c 	strh.w	r6, [sp, #76]	; 0x4c
 8007382:	9403      	str	r4, [sp, #12]
 8007384:	e89b 0003 	ldmia.w	fp, {r0, r1}
 8007388:	e88d 0003 	stmia.w	sp, {r0, r1}
 800738c:	f8cd 8038 	str.w	r8, [sp, #56]	; 0x38
 8007390:	f8ad 903c 	strh.w	r9, [sp, #60]	; 0x3c
 8007394:	ab0e      	add	r3, sp, #56	; 0x38
 8007396:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007398:	f7ff ffc0 	bl	800731c <Bit_Compare>
      Bit_Compare(ATT.ATT1,ATT.data1,i);
 800739c:	f89d 306c 	ldrb.w	r3, [sp, #108]	; 0x6c
 80073a0:	9403      	str	r4, [sp, #12]
 80073a2:	9302      	str	r3, [sp, #8]
 80073a4:	e89a 0003 	ldmia.w	sl, {r0, r1}
 80073a8:	e88d 0003 	stmia.w	sp, {r0, r1}
 80073ac:	ab15      	add	r3, sp, #84	; 0x54
 80073ae:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80073b0:	f7ff ffb4 	bl	800731c <Bit_Compare>
      Bit_Compare(ATT.ATT2,ATT.data2,i);
 80073b4:	f89d 3088 	ldrb.w	r3, [sp, #136]	; 0x88
 80073b8:	9403      	str	r4, [sp, #12]
 80073ba:	9302      	str	r3, [sp, #8]
 80073bc:	ab20      	add	r3, sp, #128	; 0x80
 80073be:	e893 0003 	ldmia.w	r3, {r0, r1}
 80073c2:	e88d 0003 	stmia.w	sp, {r0, r1}
 80073c6:	ab1c      	add	r3, sp, #112	; 0x70
 80073c8:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80073ca:	f7ff ffa7 	bl	800731c <Bit_Compare>
      Bit_Compare(ATT.ATT3,ATT.data3,i);
 80073ce:	f89d 30a4 	ldrb.w	r3, [sp, #164]	; 0xa4
 80073d2:	9403      	str	r4, [sp, #12]
 80073d4:	9302      	str	r3, [sp, #8]
 80073d6:	ab27      	add	r3, sp, #156	; 0x9c
 80073d8:	e893 0003 	ldmia.w	r3, {r0, r1}
 80073dc:	e88d 0003 	stmia.w	sp, {r0, r1}
 80073e0:	ab23      	add	r3, sp, #140	; 0x8c
 80073e2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80073e4:	f7ff ff9a 	bl	800731c <Bit_Compare>
      Bit_Compare(ATT.ATT4,ATT.data4,i);
 80073e8:	f89d 30c0 	ldrb.w	r3, [sp, #192]	; 0xc0
 80073ec:	9403      	str	r4, [sp, #12]
 80073ee:	9302      	str	r3, [sp, #8]
 80073f0:	ab2e      	add	r3, sp, #184	; 0xb8
 80073f2:	e893 0003 	ldmia.w	r3, {r0, r1}
 80073f6:	e88d 0003 	stmia.w	sp, {r0, r1}
 80073fa:	ab2a      	add	r3, sp, #168	; 0xa8
 80073fc:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80073fe:	f7ff ff8d 	bl	800731c <Bit_Compare>
      Bit_Compare(ATT.ATT5,ATT.data5,i);
 8007402:	f89d 30dc 	ldrb.w	r3, [sp, #220]	; 0xdc
 8007406:	9403      	str	r4, [sp, #12]
 8007408:	9302      	str	r3, [sp, #8]
 800740a:	ab35      	add	r3, sp, #212	; 0xd4
 800740c:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007410:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007414:	ab31      	add	r3, sp, #196	; 0xc4
 8007416:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007418:	f7ff ff80 	bl	800731c <Bit_Compare>
  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK
 800741c:	2201      	movs	r2, #1
 800741e:	4649      	mov	r1, r9
 8007420:	4640      	mov	r0, r8
 8007422:	f7fe fdcf 	bl	8005fc4 <HAL_GPIO_WritePin>
  		Pol_Delay_us(10);
 8007426:	200a      	movs	r0, #10
 8007428:	f000 fbe0 	bl	8007bec <Pol_Delay_us>
 800742c:	3701      	adds	r7, #1
  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 800742e:	2200      	movs	r2, #0
 8007430:	4649      	mov	r1, r9
 8007432:	4640      	mov	r0, r8
 8007434:	f7fe fdc6 	bl	8005fc4 <HAL_GPIO_WritePin>
    for(uint8_t i = 0; i < 8; i++){
 8007438:	2f08      	cmp	r7, #8
 800743a:	d19b      	bne.n	8007374 <PE43711_ALL_atten_ctrl+0x34>
    }
    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
 800743c:	2200      	movs	r2, #0
 800743e:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007442:	480a      	ldr	r0, [pc, #40]	; (800746c <PE43711_ALL_atten_ctrl+0x12c>)
 8007444:	f7fe fdbe 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_SET);//LE
 8007448:	4631      	mov	r1, r6
 800744a:	2201      	movs	r2, #1
 800744c:	4628      	mov	r0, r5
 800744e:	f7fe fdb9 	bl	8005fc4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8007452:	200a      	movs	r0, #10
 8007454:	f000 fbca 	bl	8007bec <Pol_Delay_us>
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8007458:	2200      	movs	r2, #0
 800745a:	4631      	mov	r1, r6
 800745c:	4628      	mov	r0, r5
}
 800745e:	b005      	add	sp, #20
 8007460:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007464:	b004      	add	sp, #16
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8007466:	f7fe bdad 	b.w	8005fc4 <HAL_GPIO_WritePin>
 800746a:	bf00      	nop
 800746c:	40010c00 	.word	0x40010c00

08007470 <PE43711_PinInit>:
void PE43711_PinInit(void){
 8007470:	b5f0      	push	{r4, r5, r6, r7, lr}
  ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1;
 8007472:	4c27      	ldr	r4, [pc, #156]	; (8007510 <PE43711_PinInit+0xa0>)
 8007474:	4e27      	ldr	r6, [pc, #156]	; (8007514 <PE43711_PinInit+0xa4>)
 8007476:	4625      	mov	r5, r4
 8007478:	ce0f      	ldmia	r6!, {r0, r1, r2, r3}
 800747a:	c50f      	stmia	r5!, {r0, r1, r2, r3}
 800747c:	e896 0003 	ldmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
 8007480:	4f25      	ldr	r7, [pc, #148]	; (8007518 <PE43711_PinInit+0xa8>)
 8007482:	f104 061c 	add.w	r6, r4, #28
  ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1;
 8007486:	e885 0003 	stmia.w	r5, {r0, r1}
  ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
 800748a:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 800748c:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 800748e:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 8007492:	4f22      	ldr	r7, [pc, #136]	; (800751c <PE43711_PinInit+0xac>)
  ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
 8007494:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 8007498:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 800749a:	f104 0638 	add.w	r6, r4, #56	; 0x38
 800749e:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80074a0:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2;
 80074a4:	4f1e      	ldr	r7, [pc, #120]	; (8007520 <PE43711_PinInit+0xb0>)
  ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 80074a6:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2;
 80074aa:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 80074ac:	f104 0654 	add.w	r6, r4, #84	; 0x54
 80074b0:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80074b2:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2;    
 80074b6:	4f1b      	ldr	r7, [pc, #108]	; (8007524 <PE43711_PinInit+0xb4>)
  ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2;
 80074b8:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2;    
 80074bc:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 80074be:	f104 0670 	add.w	r6, r4, #112	; 0x70
 80074c2:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80074c4:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2;
 80074c8:	4f17      	ldr	r7, [pc, #92]	; (8007528 <PE43711_PinInit+0xb8>)
  ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2;    
 80074ca:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2;
 80074ce:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 80074d0:	f104 068c 	add.w	r6, r4, #140	; 0x8c
 80074d4:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80074d6:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
 80074da:	2300      	movs	r3, #0
void PE43711_PinInit(void){
 80074dc:	b0a7      	sub	sp, #156	; 0x9c
  ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2;
 80074de:	e886 0003 	stmia.w	r6, {r0, r1}
  PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 80074e2:	2298      	movs	r2, #152	; 0x98
 80074e4:	4629      	mov	r1, r5
 80074e6:	4668      	mov	r0, sp
  ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
 80074e8:	7623      	strb	r3, [r4, #24]
  ALL_ATT_3_5G.data1 = ATTEN_3_5G_Initial_Val;
 80074ea:	f884 3034 	strb.w	r3, [r4, #52]	; 0x34
  ALL_ATT_3_5G.data2 = ATTEN_3_5G_Initial_Val;
 80074ee:	f884 3050 	strb.w	r3, [r4, #80]	; 0x50
  ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val;
 80074f2:	f884 306c 	strb.w	r3, [r4, #108]	; 0x6c
  ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
 80074f6:	f884 3088 	strb.w	r3, [r4, #136]	; 0x88
  ALL_ATT_3_5G.data5 = ATTEN_3_5G_Initial_Val;        
 80074fa:	f884 30a4 	strb.w	r3, [r4, #164]	; 0xa4
  PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 80074fe:	f001 ff0f 	bl	8009320 <memcpy>
 8007502:	e894 000f 	ldmia.w	r4, {r0, r1, r2, r3}
 8007506:	f7ff ff1b 	bl	8007340 <PE43711_ALL_atten_ctrl>
}
 800750a:	b027      	add	sp, #156	; 0x9c
 800750c:	bdf0      	pop	{r4, r5, r6, r7, pc}
 800750e:	bf00      	nop
 8007510:	200004d8 	.word	0x200004d8
 8007514:	20000188 	.word	0x20000188
 8007518:	20000158 	.word	0x20000158
 800751c:	20000128 	.word	0x20000128
 8007520:	200001a0 	.word	0x200001a0
 8007524:	20000170 	.word	0x20000170
 8007528:	20000140 	.word	0x20000140

0800752c <N_Divider_Reg_Create>:


double N_Reg_Value_Calc(double val){
    return  val / 1000;
}
uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){
 800752c:	b570      	push	{r4, r5, r6, lr}
 800752e:	2302      	movs	r3, #2
 8007530:	4604      	mov	r4, r0
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 14; i++){
        if(_FRAC & 0x01)
            ret += shift_bit << i;
 8007532:	2501      	movs	r5, #1
uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){
 8007534:	2000      	movs	r0, #0
        if(_FRAC & 0x01)
 8007536:	07e6      	lsls	r6, r4, #31
            ret += shift_bit << i;
 8007538:	bf48      	it	mi
 800753a:	fa05 f603 	lslmi.w	r6, r5, r3
 800753e:	f103 0301 	add.w	r3, r3, #1
 8007542:	bf48      	it	mi
 8007544:	1980      	addmi	r0, r0, r6
    for(i = 2; i < 14; i++){
 8007546:	2b0e      	cmp	r3, #14
        _FRAC = _FRAC >> 1;
 8007548:	ea4f 0454 	mov.w	r4, r4, lsr #1
    for(i = 2; i < 14; i++){
 800754c:	d1f3      	bne.n	8007536 <N_Divider_Reg_Create+0xa>
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
#endif /* DEBUG_PRINT */
    for(i = 14; i < 24; i++){
        if(_INT & 0x01)
            ret += shift_bit << i;
 800754e:	2401      	movs	r4, #1
        if(_INT & 0x01)
 8007550:	07cd      	lsls	r5, r1, #31
            ret += shift_bit << i;
 8007552:	bf48      	it	mi
 8007554:	fa04 f503 	lslmi.w	r5, r4, r3
 8007558:	f103 0301 	add.w	r3, r3, #1
 800755c:	bf48      	it	mi
 800755e:	1940      	addmi	r0, r0, r5
    for(i = 14; i < 24; i++){
 8007560:	2b18      	cmp	r3, #24
        _INT = _INT >> 1;
 8007562:	ea4f 0151 	mov.w	r1, r1, lsr #1
    for(i = 14; i < 24; i++){
 8007566:	d1f3      	bne.n	8007550 <N_Divider_Reg_Create+0x24>
    }  
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
#endif /* DEBUG_PRINT */
    if(_FASTLOCK & 0x01)
 8007568:	07d3      	lsls	r3, r2, #31
            ret += shift_bit << i;
 800756a:	bf48      	it	mi
 800756c:	f100 7080 	addmi.w	r0, r0, #16777216	; 0x1000000
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */

    return ret;
}
 8007570:	bd70      	pop	{r4, r5, r6, pc}

08007572 <R_Divider_Reg_Create>:
uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){
 8007572:	b5f0      	push	{r4, r5, r6, r7, lr}
 8007574:	4606      	mov	r6, r0
 8007576:	2001      	movs	r0, #1
 8007578:	2402      	movs	r4, #2
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 14; i++){
        if(_MOD & 0x01)
            ret += shift_bit << i;
 800757a:	4607      	mov	r7, r0
uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){
 800757c:	f89d 5014 	ldrb.w	r5, [sp, #20]
        if(_MOD & 0x01)
 8007580:	f016 0f01 	tst.w	r6, #1
            ret += shift_bit << i;
 8007584:	bf18      	it	ne
 8007586:	fa07 fe04 	lslne.w	lr, r7, r4
 800758a:	f104 0401 	add.w	r4, r4, #1
 800758e:	bf18      	it	ne
 8007590:	4470      	addne	r0, lr
    for(i = 2; i < 14; i++){
 8007592:	2c0e      	cmp	r4, #14
        _MOD = _MOD >> 1;
 8007594:	ea4f 0656 	mov.w	r6, r6, lsr #1
    for(i = 2; i < 14; i++){
 8007598:	d1f2      	bne.n	8007580 <R_Divider_Reg_Create+0xe>
    }
    for(i = 14; i < 18; i++){
        if(_RCOUNTER & 0x01)
            ret += shift_bit << i;
 800759a:	2601      	movs	r6, #1
        if(_RCOUNTER & 0x01)
 800759c:	07cf      	lsls	r7, r1, #31
            ret += shift_bit << i;
 800759e:	bf48      	it	mi
 80075a0:	fa06 f704 	lslmi.w	r7, r6, r4
 80075a4:	f104 0401 	add.w	r4, r4, #1
 80075a8:	bf48      	it	mi
 80075aa:	19c0      	addmi	r0, r0, r7
    for(i = 14; i < 18; i++){
 80075ac:	2c12      	cmp	r4, #18
        _RCOUNTER = _RCOUNTER >> 1;
 80075ae:	ea4f 0151 	mov.w	r1, r1, lsr #1
    for(i = 14; i < 18; i++){
 80075b2:	d1f3      	bne.n	800759c <R_Divider_Reg_Create+0x2a>
    }  
    if(_PRESCALER & 0x01)
 80075b4:	07d7      	lsls	r7, r2, #31
            ret += shift_bit << i++;
 80075b6:	bf44      	itt	mi
 80075b8:	f500 2080 	addmi.w	r0, r0, #262144	; 0x40000
 80075bc:	2413      	movmi	r4, #19
    if(_RESERVED & 0x01)
 80075be:	07de      	lsls	r6, r3, #31
            ret += shift_bit << i++;
 80075c0:	bf42      	ittt	mi
 80075c2:	2301      	movmi	r3, #1
 80075c4:	fa03 f404 	lslmi.w	r4, r3, r4
 80075c8:	1900      	addmi	r0, r0, r4
    for(i = 19; i < 22; i++){
        if(_MUXOUT & 0x01)
 80075ca:	07ec      	lsls	r4, r5, #31
            ret += shift_bit << i;
 80075cc:	bf48      	it	mi
 80075ce:	f500 2000 	addmi.w	r0, r0, #524288	; 0x80000
        _MUXOUT = _MUXOUT >> 1;
    }   
    if(LOAD_CONTROL & 0x01)
 80075d2:	f89d 3018 	ldrb.w	r3, [sp, #24]
        if(_MUXOUT & 0x01)
 80075d6:	07a9      	lsls	r1, r5, #30
            ret += shift_bit << i;
 80075d8:	bf48      	it	mi
 80075da:	f500 1080 	addmi.w	r0, r0, #1048576	; 0x100000
        if(_MUXOUT & 0x01)
 80075de:	076a      	lsls	r2, r5, #29
            ret += shift_bit << i;
 80075e0:	bf48      	it	mi
 80075e2:	f500 1000 	addmi.w	r0, r0, #2097152	; 0x200000
    if(LOAD_CONTROL & 0x01)
 80075e6:	07db      	lsls	r3, r3, #31
        ret += shift_bit << i++;
 80075e8:	bf48      	it	mi
 80075ea:	f500 0080 	addmi.w	r0, r0, #4194304	; 0x400000

    return ret;
}
 80075ee:	bdf0      	pop	{r4, r5, r6, r7, pc}

080075f0 <ADF4153_Freq_Calc>:

ADF4153_R_N_Reg_st ADF4153_Freq_Calc(uint32_t Freq,uint32_t REFin,uint8_t R_Counter,uint32_t chspacing){
 80075f0:	e92d 47f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
 80075f4:	4604      	mov	r4, r0
    adf4153_st temp_adf4153;
    double temp = 0;
    ADF4153_R_N_Reg_st temp_reg;
    temp_adf4153.PFD_Value  =  (REFin / R_Counter)* 0.01 ;
 80075f6:	fbb2 f0f3 	udiv	r0, r2, r3
ADF4153_R_N_Reg_st ADF4153_Freq_Calc(uint32_t Freq,uint32_t REFin,uint8_t R_Counter,uint32_t chspacing){
 80075fa:	469a      	mov	sl, r3
 80075fc:	4688      	mov	r8, r1
    temp_adf4153.PFD_Value  =  (REFin / R_Counter)* 0.01 ;
 80075fe:	f7fc ff69 	bl	80044d4 <__aeabi_ui2d>
 8007602:	a331      	add	r3, pc, #196	; (adr r3, 80076c8 <ADF4153_Freq_Calc+0xd8>)
 8007604:	e9d3 2300 	ldrd	r2, r3, [r3]
 8007608:	f7fc ffda 	bl	80045c0 <__aeabi_dmul>
 800760c:	4606      	mov	r6, r0
//    printf("chspacing : %d",chspacing);
//    printf("(temp_adf4153.PFD_Value / chspacing) : %f",((double)(temp_adf4153.PFD_Value / chspacing)));
    temp  =  ((double)(temp_adf4153.PFD_Value / chspacing));
 800760e:	980a      	ldr	r0, [sp, #40]	; 0x28
    temp_adf4153.PFD_Value  =  (REFin / R_Counter)* 0.01 ;
 8007610:	460f      	mov	r7, r1
    temp  =  ((double)(temp_adf4153.PFD_Value / chspacing));
 8007612:	f7fc ff5f 	bl	80044d4 <__aeabi_ui2d>
 8007616:	4602      	mov	r2, r0
 8007618:	460b      	mov	r3, r1
 800761a:	4630      	mov	r0, r6
 800761c:	4639      	mov	r1, r7
 800761e:	f7fd f8f9 	bl	8004814 <__aeabi_ddiv>
//    printf("temp : %f \r\n",temp);
    temp_adf4153.MOD_Value  = temp * 1000000;
 8007622:	a32b      	add	r3, pc, #172	; (adr r3, 80076d0 <ADF4153_Freq_Calc+0xe0>)
 8007624:	e9d3 2300 	ldrd	r2, r3, [r3]
 8007628:	f7fc ffca 	bl	80045c0 <__aeabi_dmul>
 800762c:	f7fd faa0 	bl	8004b70 <__aeabi_d2uiz>
 8007630:	4605      	mov	r5, r0
//    printf("temp_adf4153.MOD_Value : %d \r\n",temp_adf4153.MOD_Value);      
//    printf("Freq : %d \r\n",Freq);
    temp_adf4153.N_Value    =  N_Reg_Value_Calc(((Freq * 10) /  (temp_adf4153.PFD_Value / 1000)));
 8007632:	200a      	movs	r0, #10
 8007634:	fb00 f008 	mul.w	r0, r0, r8
 8007638:	f7fc ff4c 	bl	80044d4 <__aeabi_ui2d>
 800763c:	2200      	movs	r2, #0
 800763e:	4680      	mov	r8, r0
 8007640:	4689      	mov	r9, r1
 8007642:	4b25      	ldr	r3, [pc, #148]	; (80076d8 <ADF4153_Freq_Calc+0xe8>)
 8007644:	4630      	mov	r0, r6
 8007646:	4639      	mov	r1, r7
 8007648:	f7fd f8e4 	bl	8004814 <__aeabi_ddiv>
 800764c:	4602      	mov	r2, r0
 800764e:	460b      	mov	r3, r1
 8007650:	4640      	mov	r0, r8
 8007652:	4649      	mov	r1, r9
 8007654:	f7fd f8de 	bl	8004814 <__aeabi_ddiv>
    return  val / 1000;
 8007658:	2200      	movs	r2, #0
 800765a:	4b1f      	ldr	r3, [pc, #124]	; (80076d8 <ADF4153_Freq_Calc+0xe8>)
 800765c:	f7fd f8da 	bl	8004814 <__aeabi_ddiv>
    temp_adf4153.N_Value    /=  1000;
 8007660:	2200      	movs	r2, #0
 8007662:	4b1d      	ldr	r3, [pc, #116]	; (80076d8 <ADF4153_Freq_Calc+0xe8>)
 8007664:	f7fd f8d6 	bl	8004814 <__aeabi_ddiv>
 8007668:	460f      	mov	r7, r1
 800766a:	4606      	mov	r6, r0
//    printf("temp_adf4153.N_Value : %f \r\n",temp_adf4153.N_Value);      
    temp_adf4153.INT_Value  =   temp_adf4153.N_Value ;
 800766c:	f7fd fa80 	bl	8004b70 <__aeabi_d2uiz>
 8007670:	fa1f f880 	uxth.w	r8, r0
      printf("temp_adf4153.PFD_Value : %f \r\ntemp_adf4153.MOD_Value : %f \r\n temp_adf4153.N_Value   : %f \r\n  temp_adf4153.INT_Value : %f \r\n",temp_adf4153.PFD_Value,temp_adf4153.MOD_Value,temp_adf4153.N_Value,temp_adf4153.INT_Value);
    }    */
#ifdef DEBUG_PRINT
    printf("\r\ntemp_adf4153.N_Value : %f  temp_adf4153.INT_Value : %f  temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value);
#endif /* DEBUG_PRINT */
    temp = temp_adf4153.N_Value - (double)temp_adf4153.INT_Value;
 8007674:	4640      	mov	r0, r8
 8007676:	f7fc ff2d 	bl	80044d4 <__aeabi_ui2d>
 800767a:	460b      	mov	r3, r1
 800767c:	4602      	mov	r2, r0
 800767e:	4639      	mov	r1, r7
 8007680:	4630      	mov	r0, r6
 8007682:	f7fc fde9 	bl	8004258 <__aeabi_dsub>
#ifdef DEBUG_PRINT
    printf("\r\n temp_adf4153.N_Value - (double)temp_adf4153.INT_Value) : %f  temp * (double)temp_adf4153.MOD_Value : %f \r\n",temp,temp * (double)temp_adf4153.MOD_Value);
#endif /* DEBUG_PRINT */
    temp_adf4153.FRAC_Value =  (float)temp * temp_adf4153.MOD_Value;
 8007686:	f7fd fa93 	bl	8004bb0 <__aeabi_d2f>
 800768a:	4606      	mov	r6, r0
 800768c:	4628      	mov	r0, r5
 800768e:	f7fd fb95 	bl	8004dbc <__aeabi_ui2f>
 8007692:	4601      	mov	r1, r0
 8007694:	4630      	mov	r0, r6
 8007696:	f7fd fbe9 	bl	8004e6c <__aeabi_fmul>
 800769a:	f7fd fd37 	bl	800510c <__aeabi_f2uiz>
    printf("R0: %x  R1: %x \r\n",N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0),R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0));   
#endif /* DEBUG_PRINT */

//    printf("N_reg : %08x R_reg :%x\r\n",temp_reg.N_reg,temp_reg.R_reg);

    temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0);
 800769e:	4641      	mov	r1, r8
 80076a0:	2200      	movs	r2, #0
 80076a2:	b280      	uxth	r0, r0
 80076a4:	f7ff ff42 	bl	800752c <N_Divider_Reg_Create>
    temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0);
 80076a8:	2300      	movs	r3, #0
 80076aa:	2202      	movs	r2, #2
    temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0);
 80076ac:	4606      	mov	r6, r0
    temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0);
 80076ae:	e88d 000c 	stmia.w	sp, {r2, r3}
 80076b2:	4651      	mov	r1, sl
 80076b4:	2201      	movs	r2, #1
 80076b6:	b2a8      	uxth	r0, r5
 80076b8:	f7ff ff5b 	bl	8007572 <R_Divider_Reg_Create>

    return temp_reg;
 80076bc:	e884 0041 	stmia.w	r4, {r0, r6}
//    R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,1,0); //prescaler 1 : 8/9 0: 4/5
}
 80076c0:	4620      	mov	r0, r4
 80076c2:	b002      	add	sp, #8
 80076c4:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80076c8:	47ae147b 	.word	0x47ae147b
 80076cc:	3f847ae1 	.word	0x3f847ae1
 80076d0:	00000000 	.word	0x00000000
 80076d4:	412e8480 	.word	0x412e8480
 80076d8:	408f4000 	.word	0x408f4000

080076dc <ADF4153_Initialize>:
        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
        ADF4153_Module_Ctrl(Pll_test2,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);                  
    //  ADF4153_Module_Ctrl(Pll_test2,0x313840,0x14BE81,0x13C2,0x3);
      HAL_Delay(1);
#endif // PYJ.2019.08.09_END -- 
  if(  Flash_Save_data[INDEX_PLL_3_5G_LOW_H] == 0 
 80076dc:	4b0e      	ldr	r3, [pc, #56]	; (8007718 <ADF4153_Initialize+0x3c>)
 80076de:	7f9a      	ldrb	r2, [r3, #30]
 80076e0:	b94a      	cbnz	r2, 80076f6 <ADF4153_Initialize+0x1a>
    && Flash_Save_data[INDEX_PLL_3_5G_LOW_M] == 0
 80076e2:	7fda      	ldrb	r2, [r3, #31]
 80076e4:	b93a      	cbnz	r2, 80076f6 <ADF4153_Initialize+0x1a>
    &&Flash_Save_data[INDEX_PLL_3_5G_LOW_L] == 0)
 80076e6:	f893 2020 	ldrb.w	r2, [r3, #32]
 80076ea:	b922      	cbnz	r2, 80076f6 <ADF4153_Initialize+0x1a>
  {
    Flash_Save_data[INDEX_PLL_3_5G_LOW_H] = ((34655 & 0xFF0000) >> 16);
    Flash_Save_data[INDEX_PLL_3_5G_LOW_M] = ((34655 & 0x00FF00) >> 8);
 80076ec:	2287      	movs	r2, #135	; 0x87
 80076ee:	77da      	strb	r2, [r3, #31]
    Flash_Save_data[INDEX_PLL_3_5G_LOW_L] = (34655 & 0x0000FF);
 80076f0:	225f      	movs	r2, #95	; 0x5f
 80076f2:	f883 2020 	strb.w	r2, [r3, #32]
  }
  if(Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] == 0 
 80076f6:	f893 2021 	ldrb.w	r2, [r3, #33]	; 0x21
 80076fa:	b95a      	cbnz	r2, 8007714 <ADF4153_Initialize+0x38>
    && Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] == 0 
 80076fc:	f893 2022 	ldrb.w	r2, [r3, #34]	; 0x22
 8007700:	b942      	cbnz	r2, 8007714 <ADF4153_Initialize+0x38>
    && Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] == 0)
 8007702:	f893 2023 	ldrb.w	r2, [r3, #35]	; 0x23
 8007706:	b92a      	cbnz	r2, 8007714 <ADF4153_Initialize+0x38>
  {
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] = ((39345 & 0xFF0000) >> 16);
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] = ((39345 & 0x00FF00) >> 8);    
 8007708:	2299      	movs	r2, #153	; 0x99
 800770a:	f883 2022 	strb.w	r2, [r3, #34]	; 0x22
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] = (39345  & 0x0000FF);    
 800770e:	22b1      	movs	r2, #177	; 0xb1
 8007710:	f883 2023 	strb.w	r2, [r3, #35]	; 0x23
 8007714:	4770      	bx	lr
 8007716:	bf00      	nop
 8007718:	20000580 	.word	0x20000580

0800771c <ADF4153_Module_Ctrl>:
     }


}

void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
 800771c:	b084      	sub	sp, #16
 800771e:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007722:	b085      	sub	sp, #20
 8007724:	ac0e      	add	r4, sp, #56	; 0x38
 8007726:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
    R3  = R3  & 0x0007FF;
 800772a:	9b17      	ldr	r3, [sp, #92]	; 0x5c
 800772c:	f8bd 803c 	ldrh.w	r8, [sp, #60]	; 0x3c
 8007730:	f3c3 0a0a 	ubfx	sl, r3, #0, #11
    R2 = R2 & 0x00FFFF;
 8007734:	f8bd 3058 	ldrh.w	r3, [sp, #88]	; 0x58
 8007738:	9c10      	ldr	r4, [sp, #64]	; 0x40
 800773a:	9301      	str	r3, [sp, #4]
    R1 = R1 & 0xFFFFFF;
 800773c:	9b15      	ldr	r3, [sp, #84]	; 0x54
 800773e:	f8bd 5044 	ldrh.w	r5, [sp, #68]	; 0x44
 8007742:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007746:	9302      	str	r3, [sp, #8]
    R0 = R0 & 0xFFFFFF;
 8007748:	9b14      	ldr	r3, [sp, #80]	; 0x50
 800774a:	9e12      	ldr	r6, [sp, #72]	; 0x48
 800774c:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007750:	f8bd 704c 	ldrh.w	r7, [sp, #76]	; 0x4c
//    ADF4153_Freq_Calc(3461500000,40000000,2,5000);
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007754:	2200      	movs	r2, #0
 8007756:	4641      	mov	r1, r8
    R0 = R0 & 0xFFFFFF;
 8007758:	9303      	str	r3, [sp, #12]
 800775a:	4681      	mov	r9, r0
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 800775c:	f7fe fc32 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007760:	2200      	movs	r2, #0
 8007762:	4629      	mov	r1, r5
 8007764:	4620      	mov	r0, r4
 8007766:	f7fe fc2d 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800776a:	2200      	movs	r2, #0
 800776c:	4639      	mov	r1, r7
 800776e:	4630      	mov	r0, r6
 8007770:	f7fe fc28 	bl	8005fc4 <HAL_GPIO_WritePin>
 8007774:	f04f 0b0b 	mov.w	fp, #11
    printf("YJ :R0: %x  R1:  %x   R2 : %x R3 : %x ",R0,R1,R2,R3);
    printf("\r\n");
#endif /* DEBUG_PRINT */
    /*   R3 Ctrl    */
    for(int i =0; i < 11; i++){
        if(R3 & 0x000400){
 8007778:	f41a 6280 	ands.w	r2, sl, #1024	; 0x400
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 800777c:	bf18      	it	ne
 800777e:	2201      	movne	r2, #1
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007780:	4629      	mov	r1, r5
 8007782:	4620      	mov	r0, r4
 8007784:	f7fe fc1e 	bl	8005fc4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(10);
 8007788:	200a      	movs	r0, #10
 800778a:	f000 fa2f 	bl	8007bec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 800778e:	2201      	movs	r2, #1
 8007790:	4641      	mov	r1, r8
 8007792:	4648      	mov	r0, r9
 8007794:	f7fe fc16 	bl	8005fc4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 8007798:	200a      	movs	r0, #10
 800779a:	f000 fa27 	bl	8007bec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 800779e:	2200      	movs	r2, #0
 80077a0:	4641      	mov	r1, r8
 80077a2:	4648      	mov	r0, r9
 80077a4:	f7fe fc0e 	bl	8005fc4 <HAL_GPIO_WritePin>
    for(int i =0; i < 11; i++){
 80077a8:	f1bb 0b01 	subs.w	fp, fp, #1
        R3 = (R3 << 1);
 80077ac:	ea4f 0a4a 	mov.w	sl, sl, lsl #1
    for(int i =0; i < 11; i++){
 80077b0:	d1e2      	bne.n	8007778 <ADF4153_Module_Ctrl+0x5c>
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 80077b2:	2201      	movs	r2, #1
 80077b4:	4639      	mov	r1, r7
 80077b6:	4630      	mov	r0, r6
 80077b8:	f7fe fc04 	bl	8005fc4 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 80077bc:	200a      	movs	r0, #10
 80077be:	f000 fa15 	bl	8007bec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80077c2:	465a      	mov	r2, fp
 80077c4:	4639      	mov	r1, r7
 80077c6:	4630      	mov	r0, r6
 80077c8:	f7fe fbfc 	bl	8005fc4 <HAL_GPIO_WritePin>
 80077cc:	f04f 0a10 	mov.w	sl, #16
    
    /*   R2 Ctrl    */
     for(int i =0; i < 16; i++){
         if(R2 & 0x008000){
 80077d0:	9b01      	ldr	r3, [sp, #4]
#ifdef DEBUG_PRINT
             printf("1");
#endif /* DEBUG_PRINT */
         }
         else{
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80077d2:	4629      	mov	r1, r5
         if(R2 & 0x008000){
 80077d4:	f413 4200 	ands.w	r2, r3, #32768	; 0x8000
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 80077d8:	bf18      	it	ne
 80077da:	2201      	movne	r2, #1
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80077dc:	4620      	mov	r0, r4
 80077de:	f7fe fbf1 	bl	8005fc4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
             printf("0");
#endif /* DEBUG_PRINT */
         }
         Pol_Delay_us(10);
 80077e2:	200a      	movs	r0, #10
 80077e4:	f000 fa02 	bl	8007bec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 80077e8:	2201      	movs	r2, #1
 80077ea:	4641      	mov	r1, r8
 80077ec:	4648      	mov	r0, r9
 80077ee:	f7fe fbe9 	bl	8005fc4 <HAL_GPIO_WritePin>
         Pol_Delay_us(10);
 80077f2:	200a      	movs	r0, #10
 80077f4:	f000 f9fa 	bl	8007bec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 80077f8:	2200      	movs	r2, #0
 80077fa:	4641      	mov	r1, r8
 80077fc:	4648      	mov	r0, r9
 80077fe:	f7fe fbe1 	bl	8005fc4 <HAL_GPIO_WritePin>

         R2 = ((R2 << 1) & 0x00FFFF);
 8007802:	9b01      	ldr	r3, [sp, #4]
     for(int i =0; i < 16; i++){
 8007804:	f1ba 0a01 	subs.w	sl, sl, #1
         R2 = ((R2 << 1) & 0x00FFFF);
 8007808:	ea4f 0343 	mov.w	r3, r3, lsl #1
 800780c:	b29b      	uxth	r3, r3
 800780e:	9301      	str	r3, [sp, #4]
     for(int i =0; i < 16; i++){
 8007810:	d1de      	bne.n	80077d0 <ADF4153_Module_Ctrl+0xb4>
     }
#ifdef DEBUG_PRINT
     printf("\r\n");
#endif /* DEBUG_PRINT */
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007812:	2201      	movs	r2, #1
 8007814:	4639      	mov	r1, r7
 8007816:	4630      	mov	r0, r6
 8007818:	f7fe fbd4 	bl	8005fc4 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 800781c:	200a      	movs	r0, #10
 800781e:	f000 f9e5 	bl	8007bec <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007822:	4652      	mov	r2, sl
 8007824:	4639      	mov	r1, r7
 8007826:	4630      	mov	r0, r6
 8007828:	f7fe fbcc 	bl	8005fc4 <HAL_GPIO_WritePin>
 800782c:	f04f 0a18 	mov.w	sl, #24
    
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
 8007830:	9b02      	ldr	r3, [sp, #8]
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007832:	4629      	mov	r1, r5
        if(R1 & 0x800000){
 8007834:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007838:	bf18      	it	ne
 800783a:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800783c:	4620      	mov	r0, r4
 800783e:	f7fe fbc1 	bl	8005fc4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(10);
 8007842:	200a      	movs	r0, #10
 8007844:	f000 f9d2 	bl	8007bec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007848:	2201      	movs	r2, #1
 800784a:	4641      	mov	r1, r8
 800784c:	4648      	mov	r0, r9
 800784e:	f7fe fbb9 	bl	8005fc4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 8007852:	200a      	movs	r0, #10
 8007854:	f000 f9ca 	bl	8007bec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007858:	2200      	movs	r2, #0
 800785a:	4641      	mov	r1, r8
 800785c:	4648      	mov	r0, r9
 800785e:	f7fe fbb1 	bl	8005fc4 <HAL_GPIO_WritePin>

        R1 = ((R1 << 1) & 0xFFFFFF);
 8007862:	9b02      	ldr	r3, [sp, #8]
    for(int i =0; i < 24; i++){
 8007864:	f1ba 0a01 	subs.w	sl, sl, #1
        R1 = ((R1 << 1) & 0xFFFFFF);
 8007868:	ea4f 0343 	mov.w	r3, r3, lsl #1
 800786c:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007870:	9302      	str	r3, [sp, #8]
    for(int i =0; i < 24; i++){
 8007872:	d1dd      	bne.n	8007830 <ADF4153_Module_Ctrl+0x114>
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007874:	2201      	movs	r2, #1
 8007876:	4639      	mov	r1, r7
 8007878:	4630      	mov	r0, r6
 800787a:	f7fe fba3 	bl	8005fc4 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 800787e:	200a      	movs	r0, #10
 8007880:	f000 f9b4 	bl	8007bec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007884:	4652      	mov	r2, sl
 8007886:	4639      	mov	r1, r7
 8007888:	4630      	mov	r0, r6
 800788a:	f7fe fb9b 	bl	8005fc4 <HAL_GPIO_WritePin>
 800788e:	f04f 0a18 	mov.w	sl, #24


        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
 8007892:	9b03      	ldr	r3, [sp, #12]
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007894:	4629      	mov	r1, r5
        if(R0 & 0x800000){
 8007896:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 800789a:	bf18      	it	ne
 800789c:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800789e:	4620      	mov	r0, r4
 80078a0:	f7fe fb90 	bl	8005fc4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(10);
 80078a4:	200a      	movs	r0, #10
 80078a6:	f000 f9a1 	bl	8007bec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 80078aa:	2201      	movs	r2, #1
 80078ac:	4641      	mov	r1, r8
 80078ae:	4648      	mov	r0, r9
 80078b0:	f7fe fb88 	bl	8005fc4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 80078b4:	200a      	movs	r0, #10
 80078b6:	f000 f999 	bl	8007bec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 80078ba:	2200      	movs	r2, #0
 80078bc:	4641      	mov	r1, r8
 80078be:	4648      	mov	r0, r9
 80078c0:	f7fe fb80 	bl	8005fc4 <HAL_GPIO_WritePin>

        R0 = ((R0 << 1) & 0xFFFFFF);
 80078c4:	9b03      	ldr	r3, [sp, #12]
    for(int i =0; i < 24; i++){
 80078c6:	f1ba 0a01 	subs.w	sl, sl, #1
        R0 = ((R0 << 1) & 0xFFFFFF);
 80078ca:	ea4f 0343 	mov.w	r3, r3, lsl #1
 80078ce:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 80078d2:	9303      	str	r3, [sp, #12]
    for(int i =0; i < 24; i++){
 80078d4:	d1dd      	bne.n	8007892 <ADF4153_Module_Ctrl+0x176>
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80078d6:	4652      	mov	r2, sl
 80078d8:	4629      	mov	r1, r5
 80078da:	4620      	mov	r0, r4
 80078dc:	f7fe fb72 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 80078e0:	4639      	mov	r1, r7
 80078e2:	2201      	movs	r2, #1
 80078e4:	4630      	mov	r0, r6
 80078e6:	f7fe fb6d 	bl	8005fc4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 80078ea:	200a      	movs	r0, #10
 80078ec:	f000 f97e 	bl	8007bec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80078f0:	4652      	mov	r2, sl
 80078f2:	4639      	mov	r1, r7
 80078f4:	4630      	mov	r0, r6

}
 80078f6:	b005      	add	sp, #20
 80078f8:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80078fc:	b004      	add	sp, #16
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80078fe:	f7fe bb61 	b.w	8005fc4 <HAL_GPIO_WritePin>
	...

08007904 <FLASH_Byte_Write>:
#define USER_DATA2     (FLASH_USER_START_ADDR + 4)
#define USER_DATA3     (FLASH_USER_START_ADDR + 8)
#define USER_DATA4     (FLASH_USER_START_ADDR + 12)


void FLASH_Byte_Write(uint8_t* data){
 8007904:	b538      	push	{r3, r4, r5, lr}
  /*
  페이지 단위로 지울수 있도록 구조체변수를 선언해 주고 멤버변수값들을 정해줍니다.
  데이터를 새로 쓰기위해서는 먼저 페이지 단위로 메모리를 지워 줘야 합니다.
  */
  static FLASH_EraseInitTypeDef EraseInitStruct;
  EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;  //0x00
 8007906:	2300      	movs	r3, #0
 8007908:	4c1a      	ldr	r4, [pc, #104]	; (8007974 <FLASH_Byte_Write+0x70>)
  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;  // 지우기 페이지의 시작 어드레스
  EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; //지울 페이지 수
  static uint32_t PAGEError = 0;
//  printf("Flash Write Start \r\n");
    data[INDEX_BLUE_HEADER] = 0xbe;
 800790a:	22be      	movs	r2, #190	; 0xbe
  EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;  //0x00
 800790c:	6023      	str	r3, [r4, #0]
  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;  // 지우기 페이지의 시작 어드레스
 800790e:	4b1a      	ldr	r3, [pc, #104]	; (8007978 <FLASH_Byte_Write+0x74>)
void FLASH_Byte_Write(uint8_t* data){
 8007910:	4605      	mov	r5, r0
  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;  // 지우기 페이지의 시작 어드레스
 8007912:	60a3      	str	r3, [r4, #8]
  EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; //지울 페이지 수
 8007914:	2301      	movs	r3, #1
 8007916:	60e3      	str	r3, [r4, #12]
    data[INDEX_BLUE_TYPE] = 1;
 8007918:	7043      	strb	r3, [r0, #1]
    data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2;
 800791a:	2360      	movs	r3, #96	; 0x60
 800791c:	7083      	strb	r3, [r0, #2]
    data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_EOF - 1;    
 800791e:	2361      	movs	r3, #97	; 0x61
    data[INDEX_BLUE_HEADER] = 0xbe;
 8007920:	7002      	strb	r2, [r0, #0]
    data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_EOF - 1;    
 8007922:	70c3      	strb	r3, [r0, #3]
  /*
  Flash메모리를 조작 할 수 있도록 락을 풀어 줍니다.
  */
   HAL_FLASH_Unlock();
 8007924:	f7fe f95e 	bl	8005be4 <HAL_FLASH_Unlock>
  /*
  앞에서 설정한 페이지를 지워 줍니다.  페이지 지우기에 실패하면 무한루프에 빠지게 하여 기기의 오작동을 예방합니다.
  */
    if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK) {
 8007928:	4914      	ldr	r1, [pc, #80]	; (800797c <FLASH_Byte_Write+0x78>)
 800792a:	4620      	mov	r0, r4
 800792c:	f7fe fa0a 	bl	8005d44 <HAL_FLASHEx_Erase>
 8007930:	b118      	cbz	r0, 800793a <FLASH_Byte_Write+0x36>
    printf("Eraser Error\r\n");
 8007932:	4813      	ldr	r0, [pc, #76]	; (8007980 <FLASH_Byte_Write+0x7c>)
 8007934:	f002 f9dc 	bl	8009cf0 <puts>
 8007938:	e7fe      	b.n	8007938 <FLASH_Byte_Write+0x34>
 800793a:	4604      	mov	r4, r0
  */
   /////////유저가 설정한 페이지에 데이터 쓰기 ////////////////////////////////////////////////////
   //HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
   for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
        WriteData  = ((data[i]) & 0x00FF);
        WriteData  += ((data[i + 1] << 8) & 0xFF00);
 800793c:	192b      	adds	r3, r5, r4
 800793e:	785b      	ldrb	r3, [r3, #1]
        WriteData  = ((data[i]) & 0x00FF);
 8007940:	5d2a      	ldrb	r2, [r5, r4]
        if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, FLASH_USER_START_ADDR + i, ((uint16_t)WriteData)) != HAL_OK){
 8007942:	f104 6100 	add.w	r1, r4, #134217728	; 0x8000000
        WriteData  += ((data[i + 1] << 8) & 0xFF00);
 8007946:	eb02 2203 	add.w	r2, r2, r3, lsl #8
        if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, FLASH_USER_START_ADDR + i, ((uint16_t)WriteData)) != HAL_OK){
 800794a:	b292      	uxth	r2, r2
 800794c:	2300      	movs	r3, #0
 800794e:	f501 21ff 	add.w	r1, r1, #522240	; 0x7f800
 8007952:	2001      	movs	r0, #1
 8007954:	f7fe f98c 	bl	8005c70 <HAL_FLASH_Program>
 8007958:	b120      	cbz	r0, 8007964 <FLASH_Byte_Write+0x60>
            printf("Write Error %d\r\n",__LINE__);
 800795a:	21a5      	movs	r1, #165	; 0xa5
 800795c:	4809      	ldr	r0, [pc, #36]	; (8007984 <FLASH_Byte_Write+0x80>)
 800795e:	f002 f953 	bl	8009c08 <iprintf>
 8007962:	e7fe      	b.n	8007962 <FLASH_Byte_Write+0x5e>
   for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 8007964:	3402      	adds	r4, #2
 8007966:	2c64      	cmp	r4, #100	; 0x64
 8007968:	d1e8      	bne.n	800793c <FLASH_Byte_Write+0x38>
    printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i));
}
#endif // PYJ.2019.07.31_END -- 
/////////////////////////////////////////////////////////////////////////////////////////////////// 

}
 800796a:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
   HAL_FLASH_Lock();
 800796e:	f7fe b94b 	b.w	8005c08 <HAL_FLASH_Lock>
 8007972:	bf00      	nop
 8007974:	2000043c 	.word	0x2000043c
 8007978:	0807f800 	.word	0x0807f800
 800797c:	2000044c 	.word	0x2000044c
 8007980:	0800bc40 	.word	0x0800bc40
 8007984:	0800bc4e 	.word	0x0800bc4e

08007988 <Bluecell_Flash_Write>:
uint8_t Bluecell_Flash_Write(uint8_t* data){
 8007988:	b508      	push	{r3, lr}

  /*Variable used for Erase procedure*/
//  flashtest();
  FLASH_Byte_Write(&data[INDEX_BLUE_HEADER]);
 800798a:	f7ff ffbb 	bl	8007904 <FLASH_Byte_Write>
  return true;
}
 800798e:	2001      	movs	r0, #1
 8007990:	bd08      	pop	{r3, pc}

08007992 <Bluecell_Flash_Read>:
bool Bluecell_Flash_Read(uint8_t* data){
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 8007992:	2300      	movs	r3, #0
 8007994:	f103 6200 	add.w	r2, r3, #134217728	; 0x8000000
 8007998:	f502 22ff 	add.w	r2, r2, #522240	; 0x7f800
//        printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i));
        data[INDEX_BLUE_HEADER + i]     = *(__IO uint16_t *)(FLASH_USER_START_ADDR + i) &0x00FF;
 800799c:	8811      	ldrh	r1, [r2, #0]
 800799e:	54c1      	strb	r1, [r0, r3]
        data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8;           
 80079a0:	8812      	ldrh	r2, [r2, #0]
 80079a2:	18c1      	adds	r1, r0, r3
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 80079a4:	3302      	adds	r3, #2
        data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8;           
 80079a6:	f3c2 2207 	ubfx	r2, r2, #8, #8
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 80079aa:	2b64      	cmp	r3, #100	; 0x64
        data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8;           
 80079ac:	704a      	strb	r2, [r1, #1]
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 80079ae:	d1f1      	bne.n	8007994 <Bluecell_Flash_Read+0x2>
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){
        printf("Data = %x\r\n",  data[i]);
    }
#endif // PYJ.2019.07.31_END -- 
    return true;
}
 80079b0:	2001      	movs	r0, #1
 80079b2:	4770      	bx	lr

080079b4 <Path_Init>:
static void kConstPrinter(Bluecell_Prot_Index k)
{
    printf("%s", Bluecell_Prot_IndexStr[k]);
}
#endif /* DEBUG_PRINT */
void Path_Init(void){
 80079b4:	b570      	push	{r4, r5, r6, lr}
    Prev_data[INDEX_PATH_EN_1_8G_DL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin);
 80079b6:	4d24      	ldr	r5, [pc, #144]	; (8007a48 <Path_Init+0x94>)
 80079b8:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 80079bc:	4628      	mov	r0, r5
 80079be:	f7fe fafb 	bl	8005fb8 <HAL_GPIO_ReadPin>
 80079c2:	4c22      	ldr	r4, [pc, #136]	; (8007a4c <Path_Init+0x98>)
    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
 80079c4:	f44f 4100 	mov.w	r1, #32768	; 0x8000
    Prev_data[INDEX_PATH_EN_1_8G_DL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin);
 80079c8:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
 80079cc:	4628      	mov	r0, r5
 80079ce:	f7fe faf3 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
 80079d2:	4e1f      	ldr	r6, [pc, #124]	; (8007a50 <Path_Init+0x9c>)
    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
 80079d4:	f884 0044 	strb.w	r0, [r4, #68]	; 0x44
    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
 80079d8:	2101      	movs	r1, #1
 80079da:	4630      	mov	r0, r6
 80079dc:	f7fe faec 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
 80079e0:	2102      	movs	r1, #2
    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
 80079e2:	f884 0045 	strb.w	r0, [r4, #69]	; 0x45
    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
 80079e6:	4630      	mov	r0, r6
 80079e8:	f7fe fae6 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
 80079ec:	2180      	movs	r1, #128	; 0x80
    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
 80079ee:	f884 0046 	strb.w	r0, [r4, #70]	; 0x46
    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
 80079f2:	4818      	ldr	r0, [pc, #96]	; (8007a54 <Path_Init+0xa0>)
 80079f4:	f7fe fae0 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
 80079f8:	f506 6600 	add.w	r6, r6, #2048	; 0x800
    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
 80079fc:	f884 004a 	strb.w	r0, [r4, #74]	; 0x4a
    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
 8007a00:	f44f 7100 	mov.w	r1, #512	; 0x200
 8007a04:	4630      	mov	r0, r6
 8007a06:	f7fe fad7 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
 8007a0a:	f44f 6180 	mov.w	r1, #1024	; 0x400
    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
 8007a0e:	f884 0049 	strb.w	r0, [r4, #73]	; 0x49
    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
 8007a12:	4630      	mov	r0, r6
 8007a14:	f7fe fad0 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
 8007a18:	f44f 6100 	mov.w	r1, #2048	; 0x800
    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
 8007a1c:	f884 0047 	strb.w	r0, [r4, #71]	; 0x47
    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
 8007a20:	4630      	mov	r0, r6
 8007a22:	f7fe fac9 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
 8007a26:	f44f 5180 	mov.w	r1, #4096	; 0x1000
    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
 8007a2a:	f884 0048 	strb.w	r0, [r4, #72]	; 0x48
    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
 8007a2e:	4628      	mov	r0, r5
 8007a30:	f7fe fac2 	bl	8005fb8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin);
 8007a34:	f44f 6180 	mov.w	r1, #1024	; 0x400
    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
 8007a38:	f884 004b 	strb.w	r0, [r4, #75]	; 0x4b
    Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin);
 8007a3c:	4628      	mov	r0, r5
 8007a3e:	f7fe fabb 	bl	8005fb8 <HAL_GPIO_ReadPin>
 8007a42:	f884 004c 	strb.w	r0, [r4, #76]	; 0x4c
 8007a46:	bd70      	pop	{r4, r5, r6, pc}
 8007a48:	40011000 	.word	0x40011000
 8007a4c:	200005e3 	.word	0x200005e3
 8007a50:	40011800 	.word	0x40011800
 8007a54:	40011400 	.word	0x40011400

08007a58 <Power_ON_OFF_Ctrl>:
}
void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
	static uint32_t pinctrl = 0;
	static uint32_t pintemp = 0;
//    printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd);
    switch(type){
 8007a58:	3843      	subs	r0, #67	; 0x43
void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
 8007a5a:	460a      	mov	r2, r1
    switch(type){
 8007a5c:	280d      	cmp	r0, #13
 8007a5e:	d840      	bhi.n	8007ae2 <Power_ON_OFF_Ctrl+0x8a>
 8007a60:	e8df f000 	tbb	[pc, r0]
 8007a64:	18120d07 	.word	0x18120d07
 8007a68:	1c212c27 	.word	0x1c212c27
 8007a6c:	3b3b3631 	.word	0x3b3b3631
 8007a70:	3b3b      	.short	0x3b3b
        case INDEX_PATH_EN_1_8G_DL  : 
#if 0 // PYJ.2019.07.29_BEGIN -- 
            printf("\r\n LINE %d\r\n",__LINE__);
#endif // PYJ.2019.07.29_END -- 
            if(cmd)
 8007a72:	b101      	cbz	r1, 8007a76 <Power_ON_OFF_Ctrl+0x1e>
                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET);
 8007a74:	2201      	movs	r2, #1
            else
                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
 8007a76:	f44f 4180 	mov.w	r1, #16384	; 0x4000
        case INDEX_PLL_ON_OFF_3_5G_L: 
//            printf("\r\n LINE %d\r\n",__LINE__);
            if(cmd)
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
            else
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
 8007a7a:	481b      	ldr	r0, [pc, #108]	; (8007ae8 <Power_ON_OFF_Ctrl+0x90>)
 8007a7c:	e008      	b.n	8007a90 <Power_ON_OFF_Ctrl+0x38>
            if(cmd)
 8007a7e:	b101      	cbz	r1, 8007a82 <Power_ON_OFF_Ctrl+0x2a>
                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET);
 8007a80:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
 8007a82:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007a86:	e7f8      	b.n	8007a7a <Power_ON_OFF_Ctrl+0x22>
            if(cmd)
 8007a88:	b101      	cbz	r1, 8007a8c <Power_ON_OFF_Ctrl+0x34>
                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET);
 8007a8a:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);                
 8007a8c:	2101      	movs	r1, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
 8007a8e:	4817      	ldr	r0, [pc, #92]	; (8007aec <Power_ON_OFF_Ctrl+0x94>)
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
 8007a90:	f7fe ba98 	b.w	8005fc4 <HAL_GPIO_WritePin>
            if(cmd)
 8007a94:	b101      	cbz	r1, 8007a98 <Power_ON_OFF_Ctrl+0x40>
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET);
 8007a96:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
 8007a98:	2102      	movs	r1, #2
 8007a9a:	e7f8      	b.n	8007a8e <Power_ON_OFF_Ctrl+0x36>
            if(cmd){
 8007a9c:	b101      	cbz	r1, 8007aa0 <Power_ON_OFF_Ctrl+0x48>
                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);
 8007a9e:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
 8007aa0:	2180      	movs	r1, #128	; 0x80
 8007aa2:	4813      	ldr	r0, [pc, #76]	; (8007af0 <Power_ON_OFF_Ctrl+0x98>)
 8007aa4:	e7f4      	b.n	8007a90 <Power_ON_OFF_Ctrl+0x38>
            if(cmd){
 8007aa6:	b101      	cbz	r1, 8007aaa <Power_ON_OFF_Ctrl+0x52>
                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET);
 8007aa8:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
 8007aaa:	f44f 7100 	mov.w	r1, #512	; 0x200
                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
 8007aae:	4811      	ldr	r0, [pc, #68]	; (8007af4 <Power_ON_OFF_Ctrl+0x9c>)
 8007ab0:	e7ee      	b.n	8007a90 <Power_ON_OFF_Ctrl+0x38>
            if(cmd)
 8007ab2:	b101      	cbz	r1, 8007ab6 <Power_ON_OFF_Ctrl+0x5e>
                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET);
 8007ab4:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
 8007ab6:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007aba:	e7f8      	b.n	8007aae <Power_ON_OFF_Ctrl+0x56>
            if(cmd)
 8007abc:	b101      	cbz	r1, 8007ac0 <Power_ON_OFF_Ctrl+0x68>
                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
 8007abe:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
 8007ac0:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8007ac4:	e7f3      	b.n	8007aae <Power_ON_OFF_Ctrl+0x56>
            if(cmd)
 8007ac6:	b101      	cbz	r1, 8007aca <Power_ON_OFF_Ctrl+0x72>
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
 8007ac8:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
 8007aca:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8007ace:	e7d4      	b.n	8007a7a <Power_ON_OFF_Ctrl+0x22>
            if(cmd)
 8007ad0:	b101      	cbz	r1, 8007ad4 <Power_ON_OFF_Ctrl+0x7c>
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
 8007ad2:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
 8007ad4:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007ad8:	e7cf      	b.n	8007a7a <Power_ON_OFF_Ctrl+0x22>
 8007ada:	4b06      	ldr	r3, [pc, #24]	; (8007af4 <Power_ON_OFF_Ctrl+0x9c>)
            break;
        case INDEX_T_SYNC_DL:
        case INDEX__T_SYNC_UL:
        case INDEX_T_SYNC_UL:
        case INDEX__T_SYNC_DL:
            if(cmd)
 8007adc:	b111      	cbz	r1, 8007ae4 <Power_ON_OFF_Ctrl+0x8c>
                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET);                
            }
#else
        {
        	pintemp = (uint32_t)((_T_SYNC_DL_Pin | T_SYNC_DL_Pin) | ((uint32_t)_T_SYNC_UL_Pin << 16U) | ((uint32_t)T_SYNC_UL_Pin << 16U));
        	_T_SYNC_UL_GPIO_Port->BSRR = pintemp;
 8007ade:	4a06      	ldr	r2, [pc, #24]	; (8007af8 <Power_ON_OFF_Ctrl+0xa0>)
//            HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin|T_SYNC_DL_Pin, GPIO_PIN_SET);
        }
        else
        {
        	pintemp = (uint32_t)((_T_SYNC_UL_Pin | T_SYNC_UL_Pin) | ((uint32_t)_T_SYNC_DL_Pin << 16U) | ((uint32_t)T_SYNC_DL_Pin << 16U));
        	_T_SYNC_UL_GPIO_Port->BSRR = pintemp;
 8007ae0:	611a      	str	r2, [r3, #16]
 8007ae2:	4770      	bx	lr
 8007ae4:	4a05      	ldr	r2, [pc, #20]	; (8007afc <Power_ON_OFF_Ctrl+0xa4>)
 8007ae6:	e7fb      	b.n	8007ae0 <Power_ON_OFF_Ctrl+0x88>
 8007ae8:	40011000 	.word	0x40011000
 8007aec:	40011800 	.word	0x40011800
 8007af0:	40011400 	.word	0x40011400
 8007af4:	40012000 	.word	0x40012000
 8007af8:	00600180 	.word	0x00600180
 8007afc:	01800060 	.word	0x01800060

08007b00 <ATTEN_PLL_PATH_Initialize>:
#endif /* DEBUG_PRINT */
    break;

    }
}
void ATTEN_PLL_PATH_Initialize(void){
 8007b00:	b510      	push	{r4, lr}
#if 0 // PYJ.2019.07.31_BEGIN -- 
        for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){
            printf("Data = %x\r\n",  Flash_Save_data[i]);
        }
#endif // PYJ.2019.07.31_END -- 
    Flash_Save_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Flash_Save_data[Type], Flash_Save_data[Length]);
 8007b02:	4c07      	ldr	r4, [pc, #28]	; (8007b20 <ATTEN_PLL_PATH_Initialize+0x20>)
 8007b04:	78a1      	ldrb	r1, [r4, #2]
 8007b06:	1c60      	adds	r0, r4, #1
 8007b08:	f7ff fbd0 	bl	80072ac <STH30_CreateCrc>
 8007b0c:	f884 0061 	strb.w	r0, [r4, #97]	; 0x61
    RF_Ctrl_Main(&Flash_Save_data[INDEX_BLUE_HEADER]);
 8007b10:	4620      	mov	r0, r4
 8007b12:	f001 fb67 	bl	80091e4 <RF_Ctrl_Main>
    RF_Status_Get();
}
 8007b16:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    RF_Status_Get();
 8007b1a:	f000 be4b 	b.w	80087b4 <RF_Status_Get>
 8007b1e:	bf00      	nop
 8007b20:	20000580 	.word	0x20000580

08007b24 <Power_ON_OFF_Initialize>:
void Power_ON_OFF_Initialize(void){
 8007b24:	b570      	push	{r4, r5, r6, lr}
  /* * * PATH PLL ON OFF SECTION* * */
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);
 8007b26:	4d2e      	ldr	r5, [pc, #184]	; (8007be0 <Power_ON_OFF_Initialize+0xbc>)
  HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port   ,PATH_EN_3_5G_H_Pin   , GPIO_PIN_RESET);
 8007b28:	4c2e      	ldr	r4, [pc, #184]	; (8007be4 <Power_ON_OFF_Initialize+0xc0>)
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);
 8007b2a:	4628      	mov	r0, r5
 8007b2c:	2200      	movs	r2, #0
 8007b2e:	2180      	movs	r1, #128	; 0x80
 8007b30:	f7fe fa48 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port   ,PATH_EN_3_5G_H_Pin   , GPIO_PIN_RESET);
 8007b34:	4620      	mov	r0, r4
 8007b36:	2200      	movs	r2, #0
 8007b38:	f44f 7100 	mov.w	r1, #512	; 0x200
 8007b3c:	f7fe fa42 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port  ,PATH_EN_3_5G_DL_Pin  , GPIO_PIN_RESET);
 8007b40:	4620      	mov	r0, r4
 8007b42:	2200      	movs	r2, #0
 8007b44:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007b48:	f7fe fa3c 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port  ,PATH_EN_3_5G_UL_Pin  , GPIO_PIN_RESET);
 8007b4c:	4620      	mov	r0, r4
 8007b4e:	2200      	movs	r2, #0
 8007b50:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8007b54:	f7fe fa36 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);  
 8007b58:	4628      	mov	r0, r5
 8007b5a:	2200      	movs	r2, #0
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
 8007b5c:	f5a5 6580 	sub.w	r5, r5, #1024	; 0x400
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);  
 8007b60:	2180      	movs	r1, #128	; 0x80
 8007b62:	f7fe fa2f 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);  
  HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port  ,PATH_EN_2_1G_DL_Pin  , GPIO_PIN_RESET);
 8007b66:	4e20      	ldr	r6, [pc, #128]	; (8007be8 <Power_ON_OFF_Initialize+0xc4>)
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
 8007b68:	4628      	mov	r0, r5
 8007b6a:	2200      	movs	r2, #0
 8007b6c:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8007b70:	f7fe fa28 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);  
 8007b74:	4628      	mov	r0, r5
 8007b76:	2200      	movs	r2, #0
 8007b78:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007b7c:	f7fe fa22 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port  ,PATH_EN_2_1G_DL_Pin  , GPIO_PIN_RESET);
 8007b80:	4630      	mov	r0, r6
 8007b82:	2200      	movs	r2, #0
 8007b84:	2101      	movs	r1, #1
 8007b86:	f7fe fa1d 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port  ,PATH_EN_2_1G_UL_Pin  , GPIO_PIN_RESET);
 8007b8a:	4630      	mov	r0, r6
 8007b8c:	2200      	movs	r2, #0
 8007b8e:	2102      	movs	r1, #2
 8007b90:	f7fe fa18 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port  ,PATH_EN_1_8G_DL_Pin  , GPIO_PIN_RESET);
 8007b94:	4628      	mov	r0, r5
 8007b96:	2200      	movs	r2, #0
 8007b98:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007b9c:	f7fe fa12 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port  ,PATH_EN_1_8G_UL_Pin  , GPIO_PIN_RESET);
 8007ba0:	4628      	mov	r0, r5
 8007ba2:	2200      	movs	r2, #0
 8007ba4:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007ba8:	f7fe fa0c 	bl	8005fc4 <HAL_GPIO_WritePin>
  /* * * TDD SECTION* * */
  HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
 8007bac:	4620      	mov	r0, r4
 8007bae:	2200      	movs	r2, #0
 8007bb0:	2120      	movs	r1, #32
 8007bb2:	f7fe fa07 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
 8007bb6:	4620      	mov	r0, r4
 8007bb8:	2200      	movs	r2, #0
 8007bba:	2140      	movs	r1, #64	; 0x40
 8007bbc:	f7fe fa02 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
 8007bc0:	4620      	mov	r0, r4
 8007bc2:	2201      	movs	r2, #1
 8007bc4:	2180      	movs	r1, #128	; 0x80
 8007bc6:	f7fe f9fd 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);   
 8007bca:	4620      	mov	r0, r4
 8007bcc:	2201      	movs	r2, #1
 8007bce:	f44f 7180 	mov.w	r1, #256	; 0x100
 8007bd2:	f7fe f9f7 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_Delay(1);
}
 8007bd6:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
  HAL_Delay(1);
 8007bda:	2001      	movs	r0, #1
 8007bdc:	f7fd bafe 	b.w	80051dc <HAL_Delay>
 8007be0:	40011400 	.word	0x40011400
 8007be4:	40012000 	.word	0x40012000
 8007be8:	40011800 	.word	0x40011800

08007bec <Pol_Delay_us>:
  HAL_UART_Transmit_DMA(&huart1,&temp_data[INDEX_BLUE_HEADER],temp_data[INDEX_BLUE_LENGTH]  + 3); 
}
void Pol_Delay_us(volatile uint32_t microseconds)
{
  /* Go to number of cycles for system */
  microseconds *= (SystemCoreClock / 1000000);
 8007bec:	4a08      	ldr	r2, [pc, #32]	; (8007c10 <Pol_Delay_us+0x24>)
 8007bee:	4909      	ldr	r1, [pc, #36]	; (8007c14 <Pol_Delay_us+0x28>)
 8007bf0:	6812      	ldr	r2, [r2, #0]
{
 8007bf2:	b082      	sub	sp, #8
  microseconds *= (SystemCoreClock / 1000000);
 8007bf4:	fbb2 f2f1 	udiv	r2, r2, r1
{
 8007bf8:	9001      	str	r0, [sp, #4]
  microseconds *= (SystemCoreClock / 1000000);
 8007bfa:	9b01      	ldr	r3, [sp, #4]
 8007bfc:	4353      	muls	r3, r2
 8007bfe:	9301      	str	r3, [sp, #4]
 
  /* Delay till end */
  while (microseconds--);
 8007c00:	9b01      	ldr	r3, [sp, #4]
 8007c02:	1e5a      	subs	r2, r3, #1
 8007c04:	9201      	str	r2, [sp, #4]
 8007c06:	2b00      	cmp	r3, #0
 8007c08:	d1fa      	bne.n	8007c00 <Pol_Delay_us+0x14>
}
 8007c0a:	b002      	add	sp, #8
 8007c0c:	4770      	bx	lr
 8007c0e:	bf00      	nop
 8007c10:	20000218 	.word	0x20000218
 8007c14:	000f4240 	.word	0x000f4240

08007c18 <Boot_LED_Toggle>:
void Boot_LED_Toggle(void){
 8007c18:	b510      	push	{r4, lr}
  if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
 8007c1a:	4c06      	ldr	r4, [pc, #24]	; (8007c34 <Boot_LED_Toggle+0x1c>)
 8007c1c:	6823      	ldr	r3, [r4, #0]
 8007c1e:	f5b3 7ffa 	cmp.w	r3, #500	; 0x1f4
 8007c22:	d906      	bls.n	8007c32 <Boot_LED_Toggle+0x1a>
 8007c24:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007c28:	4803      	ldr	r0, [pc, #12]	; (8007c38 <Boot_LED_Toggle+0x20>)
 8007c2a:	f7fe f9d0 	bl	8005fce <HAL_GPIO_TogglePin>
 8007c2e:	2300      	movs	r3, #0
 8007c30:	6023      	str	r3, [r4, #0]
 8007c32:	bd10      	pop	{r4, pc}
 8007c34:	20000458 	.word	0x20000458
 8007c38:	40012000 	.word	0x40012000

08007c3c <ADC_Check>:
}
void ADC_Check(void){
      if(AdcTimerCnt > 2500){
 8007c3c:	f640 12c4 	movw	r2, #2500	; 0x9c4
 8007c40:	4b0b      	ldr	r3, [pc, #44]	; (8007c70 <ADC_Check+0x34>)
void ADC_Check(void){
 8007c42:	b5f0      	push	{r4, r5, r6, r7, lr}
      if(AdcTimerCnt > 2500){
 8007c44:	6819      	ldr	r1, [r3, #0]
 8007c46:	4291      	cmp	r1, r2
 8007c48:	461a      	mov	r2, r3
 8007c4a:	d90f      	bls.n	8007c6c <ADC_Check+0x30>
 8007c4c:	2300      	movs	r3, #0
          for(uint8_t i = 0; i< ADC_EA; i++ ){
          Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
          Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2]     = (uint16_t)(ADCvalue[i] & 0x00FF);
          AdcTimerCnt = 0;
 8007c4e:	461c      	mov	r4, r3
          Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
 8007c50:	4f08      	ldr	r7, [pc, #32]	; (8007c74 <ADC_Check+0x38>)
 8007c52:	4e09      	ldr	r6, [pc, #36]	; (8007c78 <ADC_Check+0x3c>)
 8007c54:	f857 0013 	ldr.w	r0, [r7, r3, lsl #1]
 8007c58:	1999      	adds	r1, r3, r6
 8007c5a:	3302      	adds	r3, #2
 8007c5c:	0a05      	lsrs	r5, r0, #8
          for(uint8_t i = 0; i< ADC_EA; i++ ){
 8007c5e:	2b1c      	cmp	r3, #28
          Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
 8007c60:	f881 5025 	strb.w	r5, [r1, #37]	; 0x25
          Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2]     = (uint16_t)(ADCvalue[i] & 0x00FF);
 8007c64:	f881 0026 	strb.w	r0, [r1, #38]	; 0x26
          AdcTimerCnt = 0;
 8007c68:	6014      	str	r4, [r2, #0]
          for(uint8_t i = 0; i< ADC_EA; i++ ){
 8007c6a:	d1f3      	bne.n	8007c54 <ADC_Check+0x18>
 8007c6c:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8007c6e:	bf00      	nop
 8007c70:	20000450 	.word	0x20000450
 8007c74:	200004a0 	.word	0x200004a0
 8007c78:	200005e3 	.word	0x200005e3

08007c7c <Uart_Check>:
          printf("%x\r\n",i,Prev_data[INDEX_DET_1_8G_DL_IN_L + i]);            
#endif // PYJ.2019.08.09_END -- 
         }
      }
}
void Uart_Check(void){
 8007c7c:	b570      	push	{r4, r5, r6, lr}
  while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
 8007c7e:	4d07      	ldr	r5, [pc, #28]	; (8007c9c <Uart_Check+0x20>)
 8007c80:	4c07      	ldr	r4, [pc, #28]	; (8007ca0 <Uart_Check+0x24>)
 8007c82:	4e08      	ldr	r6, [pc, #32]	; (8007ca4 <Uart_Check+0x28>)
 8007c84:	68ab      	ldr	r3, [r5, #8]
 8007c86:	2b00      	cmp	r3, #0
 8007c88:	dd02      	ble.n	8007c90 <Uart_Check+0x14>
 8007c8a:	6823      	ldr	r3, [r4, #0]
 8007c8c:	2b64      	cmp	r3, #100	; 0x64
 8007c8e:	d800      	bhi.n	8007c92 <Uart_Check+0x16>
 8007c90:	bd70      	pop	{r4, r5, r6, pc}
 8007c92:	4630      	mov	r0, r6
 8007c94:	f000 fd28 	bl	80086e8 <GetDataFromUartQueue>
 8007c98:	e7f4      	b.n	8007c84 <Uart_Check+0x8>
 8007c9a:	bf00      	nop
 8007c9c:	20000bc4 	.word	0x20000bc4
 8007ca0:	2000045c 	.word	0x2000045c
 8007ca4:	20000700 	.word	0x20000700

08007ca8 <HAL_TIM_PeriodElapsedCallback>:
/* USER CODE BEGIN 0 */


void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
    if(htim->Instance == TIM6){
 8007ca8:	6802      	ldr	r2, [r0, #0]
 8007caa:	4b0a      	ldr	r3, [pc, #40]	; (8007cd4 <HAL_TIM_PeriodElapsedCallback+0x2c>)
 8007cac:	429a      	cmp	r2, r3
 8007cae:	d10f      	bne.n	8007cd0 <HAL_TIM_PeriodElapsedCallback+0x28>
        UartRxTimerCnt++;
 8007cb0:	4a09      	ldr	r2, [pc, #36]	; (8007cd8 <HAL_TIM_PeriodElapsedCallback+0x30>)
 8007cb2:	6813      	ldr	r3, [r2, #0]
 8007cb4:	3301      	adds	r3, #1
 8007cb6:	6013      	str	r3, [r2, #0]
        LedTimerCnt++;
 8007cb8:	4a08      	ldr	r2, [pc, #32]	; (8007cdc <HAL_TIM_PeriodElapsedCallback+0x34>)
 8007cba:	6813      	ldr	r3, [r2, #0]
 8007cbc:	3301      	adds	r3, #1
 8007cbe:	6013      	str	r3, [r2, #0]
        AdcTimerCnt++;
 8007cc0:	4a07      	ldr	r2, [pc, #28]	; (8007ce0 <HAL_TIM_PeriodElapsedCallback+0x38>)
 8007cc2:	6813      	ldr	r3, [r2, #0]
 8007cc4:	3301      	adds	r3, #1
 8007cc6:	6013      	str	r3, [r2, #0]
        LDTimerCnt++;
 8007cc8:	4a06      	ldr	r2, [pc, #24]	; (8007ce4 <HAL_TIM_PeriodElapsedCallback+0x3c>)
 8007cca:	6813      	ldr	r3, [r2, #0]
 8007ccc:	3301      	adds	r3, #1
 8007cce:	6013      	str	r3, [r2, #0]
 8007cd0:	4770      	bx	lr
 8007cd2:	bf00      	nop
 8007cd4:	40001000 	.word	0x40001000
 8007cd8:	2000045c 	.word	0x2000045c
 8007cdc:	20000458 	.word	0x20000458
 8007ce0:	20000450 	.word	0x20000450
 8007ce4:	20000454 	.word	0x20000454

08007ce8 <_write>:
    }
} 
int _write (int file, uint8_t *ptr, uint16_t len)
{
 8007ce8:	b510      	push	{r4, lr}
 8007cea:	4614      	mov	r4, r2
    HAL_UART_Transmit(&huart1, ptr, len,10);
 8007cec:	230a      	movs	r3, #10
 8007cee:	4802      	ldr	r0, [pc, #8]	; (8007cf8 <_write+0x10>)
 8007cf0:	f7fe ff38 	bl	8006b64 <HAL_UART_Transmit>
    return len;
}
 8007cf4:	4620      	mov	r0, r4
 8007cf6:	bd10      	pop	{r4, pc}
 8007cf8:	20000700 	.word	0x20000700

08007cfc <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8007cfc:	b510      	push	{r4, lr}
 8007cfe:	b096      	sub	sp, #88	; 0x58
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8007d00:	2228      	movs	r2, #40	; 0x28
 8007d02:	2100      	movs	r1, #0
 8007d04:	a80c      	add	r0, sp, #48	; 0x30
 8007d06:	f001 fb16 	bl	8009336 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8007d0a:	2214      	movs	r2, #20
 8007d0c:	2100      	movs	r1, #0
 8007d0e:	a801      	add	r0, sp, #4
 8007d10:	f001 fb11 	bl	8009336 <memset>
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 8007d14:	2218      	movs	r2, #24
 8007d16:	2100      	movs	r1, #0
 8007d18:	eb0d 0002 	add.w	r0, sp, r2
 8007d1c:	f001 fb0b 	bl	8009336 <memset>

  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8007d20:	2301      	movs	r3, #1
 8007d22:	9310      	str	r3, [sp, #64]	; 0x40
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8007d24:	2310      	movs	r3, #16
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8007d26:	2402      	movs	r4, #2
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8007d28:	9311      	str	r3, [sp, #68]	; 0x44
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
 8007d2a:	f44f 1340 	mov.w	r3, #3145728	; 0x300000
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8007d2e:	a80c      	add	r0, sp, #48	; 0x30
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
 8007d30:	9315      	str	r3, [sp, #84]	; 0x54
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8007d32:	940c      	str	r4, [sp, #48]	; 0x30
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8007d34:	9413      	str	r4, [sp, #76]	; 0x4c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8007d36:	f7fe f94f 	bl	8005fd8 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8007d3a:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8007d3c:	f44f 6280 	mov.w	r2, #1024	; 0x400
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8007d40:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8007d42:	2300      	movs	r3, #0
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8007d44:	4621      	mov	r1, r4
 8007d46:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8007d48:	9303      	str	r3, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8007d4a:	9204      	str	r2, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 8007d4c:	9305      	str	r3, [sp, #20]
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8007d4e:	9402      	str	r4, [sp, #8]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8007d50:	f7fe fb0a 	bl	8006368 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
 8007d54:	f44f 4380 	mov.w	r3, #16384	; 0x4000
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 8007d58:	a806      	add	r0, sp, #24
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
 8007d5a:	9406      	str	r4, [sp, #24]
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
 8007d5c:	9308      	str	r3, [sp, #32]
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 8007d5e:	f7fe fbd5 	bl	800650c <HAL_RCCEx_PeriphCLKConfig>
  {
    Error_Handler();
  }
}
 8007d62:	b016      	add	sp, #88	; 0x58
 8007d64:	bd10      	pop	{r4, pc}
	...

08007d68 <main>:
{
 8007d68:	b580      	push	{r7, lr}
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8007d6a:	4db0      	ldr	r5, [pc, #704]	; (800802c <main+0x2c4>)
{
 8007d6c:	b08c      	sub	sp, #48	; 0x30
  HAL_Init();
 8007d6e:	f7fd fa11 	bl	8005194 <HAL_Init>
  SystemClock_Config();
 8007d72:	f7ff ffc3 	bl	8007cfc <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8007d76:	2210      	movs	r2, #16
 8007d78:	2100      	movs	r1, #0
 8007d7a:	a808      	add	r0, sp, #32
 8007d7c:	f001 fadb 	bl	8009336 <memset>
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8007d80:	69ab      	ldr	r3, [r5, #24]
  __HAL_RCC_GPIOB_CLK_ENABLE();
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOG_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8007d82:	2200      	movs	r2, #0
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8007d84:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8007d88:	61ab      	str	r3, [r5, #24]
 8007d8a:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8007d8c:	217f      	movs	r1, #127	; 0x7f
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8007d8e:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8007d92:	9301      	str	r3, [sp, #4]
 8007d94:	9b01      	ldr	r3, [sp, #4]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8007d96:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8007d98:	48a5      	ldr	r0, [pc, #660]	; (8008030 <main+0x2c8>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8007d9a:	f043 0310 	orr.w	r3, r3, #16
 8007d9e:	61ab      	str	r3, [r5, #24]
 8007da0:	69ab      	ldr	r3, [r5, #24]
  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007da2:	2400      	movs	r4, #0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8007da4:	f003 0310 	and.w	r3, r3, #16
 8007da8:	9302      	str	r3, [sp, #8]
 8007daa:	9b02      	ldr	r3, [sp, #8]
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8007dac:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007dae:	2601      	movs	r6, #1
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8007db0:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8007db4:	61ab      	str	r3, [r5, #24]
 8007db6:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007db8:	2702      	movs	r7, #2
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8007dba:	f003 0380 	and.w	r3, r3, #128	; 0x80
 8007dbe:	9303      	str	r3, [sp, #12]
 8007dc0:	9b03      	ldr	r3, [sp, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8007dc2:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);

  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 8007dc4:	f04f 090c 	mov.w	r9, #12
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8007dc8:	f043 0304 	orr.w	r3, r3, #4
 8007dcc:	61ab      	str	r3, [r5, #24]
 8007dce:	69ab      	ldr	r3, [r5, #24]
  hadc1.Init.NbrOfConversion = 14;
 8007dd0:	f04f 080e 	mov.w	r8, #14
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8007dd4:	f003 0304 	and.w	r3, r3, #4
 8007dd8:	9304      	str	r3, [sp, #16]
 8007dda:	9b04      	ldr	r3, [sp, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8007ddc:	69ab      	ldr	r3, [r5, #24]
  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
 8007dde:	f04f 0a07 	mov.w	sl, #7
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8007de2:	f043 0308 	orr.w	r3, r3, #8
 8007de6:	61ab      	str	r3, [r5, #24]
 8007de8:	69ab      	ldr	r3, [r5, #24]
 8007dea:	f003 0308 	and.w	r3, r3, #8
 8007dee:	9305      	str	r3, [sp, #20]
 8007df0:	9b05      	ldr	r3, [sp, #20]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8007df2:	69ab      	ldr	r3, [r5, #24]
 8007df4:	f043 0320 	orr.w	r3, r3, #32
 8007df8:	61ab      	str	r3, [r5, #24]
 8007dfa:	69ab      	ldr	r3, [r5, #24]
 8007dfc:	f003 0320 	and.w	r3, r3, #32
 8007e00:	9306      	str	r3, [sp, #24]
 8007e02:	9b06      	ldr	r3, [sp, #24]
  __HAL_RCC_GPIOG_CLK_ENABLE();
 8007e04:	69ab      	ldr	r3, [r5, #24]
 8007e06:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8007e0a:	61ab      	str	r3, [r5, #24]
 8007e0c:	69ab      	ldr	r3, [r5, #24]
 8007e0e:	f403 7380 	and.w	r3, r3, #256	; 0x100
 8007e12:	9307      	str	r3, [sp, #28]
 8007e14:	9b07      	ldr	r3, [sp, #28]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8007e16:	f7fe f8d5 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 8007e1a:	2200      	movs	r2, #0
 8007e1c:	f64f 41c0 	movw	r1, #64704	; 0xfcc0
 8007e20:	4884      	ldr	r0, [pc, #528]	; (8008034 <main+0x2cc>)
 8007e22:	f7fe f8cf 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 8007e26:	2200      	movs	r2, #0
 8007e28:	f240 31f3 	movw	r1, #1011	; 0x3f3
 8007e2c:	4882      	ldr	r0, [pc, #520]	; (8008038 <main+0x2d0>)
 8007e2e:	f7fe f8c9 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOD, PLL_DATA_3_5G_Pin|PLL_CLK_3_5G_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 8007e32:	2200      	movs	r2, #0
 8007e34:	f648 71ff 	movw	r1, #36863	; 0x8fff
 8007e38:	4880      	ldr	r0, [pc, #512]	; (800803c <main+0x2d4>)
 8007e3a:	f7fe f8c3 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 8007e3e:	2200      	movs	r2, #0
 8007e40:	f647 71fc 	movw	r1, #32764	; 0x7ffc
 8007e44:	487e      	ldr	r0, [pc, #504]	; (8008040 <main+0x2d8>)
 8007e46:	f7fe f8bd 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PLL_CLK_3_5G__GPIO_Port, PLL_CLK_3_5G__Pin, GPIO_PIN_RESET);
 8007e4a:	2200      	movs	r2, #0
 8007e4c:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007e50:	487c      	ldr	r0, [pc, #496]	; (8008044 <main+0x2dc>)
 8007e52:	f7fe f8b7 	bl	8005fc4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
 8007e56:	2200      	movs	r2, #0
 8007e58:	2118      	movs	r1, #24
 8007e5a:	487b      	ldr	r0, [pc, #492]	; (8008048 <main+0x2e0>)
 8007e5c:	f7fe f8b2 	bl	8005fc4 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8007e60:	237f      	movs	r3, #127	; 0x7f
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8007e62:	a908      	add	r1, sp, #32
 8007e64:	4872      	ldr	r0, [pc, #456]	; (8008030 <main+0x2c8>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8007e66:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007e68:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007e6a:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007e6c:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8007e6e:	f7fd ffb7 	bl	8005de0 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 8007e72:	f64f 43c0 	movw	r3, #64704	; 0xfcc0
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8007e76:	a908      	add	r1, sp, #32
 8007e78:	486e      	ldr	r0, [pc, #440]	; (8008034 <main+0x2cc>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 8007e7a:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007e7c:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007e7e:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007e80:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8007e82:	f7fd ffad 	bl	8005de0 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 8007e86:	f240 33f3 	movw	r3, #1011	; 0x3f3
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8007e8a:	a908      	add	r1, sp, #32
 8007e8c:	486a      	ldr	r0, [pc, #424]	; (8008038 <main+0x2d0>)
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 8007e8e:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007e90:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007e92:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007e94:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8007e96:	f7fd ffa3 	bl	8005de0 <HAL_GPIO_Init>
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8007e9a:	a908      	add	r1, sp, #32
 8007e9c:	4866      	ldr	r0, [pc, #408]	; (8008038 <main+0x2d0>)
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 8007e9e:	f8cd 9020 	str.w	r9, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007ea2:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007ea4:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8007ea6:	f7fd ff9b 	bl	8005de0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_DATA_3_5G_Pin PLL_CLK_3_5G_Pin ATT_DATA_Pin ATT_CLK_Pin 
                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin 
                           ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin 
                           PATH_EN_3_5G_L_Pin */
  GPIO_InitStruct.Pin = PLL_DATA_3_5G_Pin|PLL_CLK_3_5G_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 8007eaa:	f648 73ff 	movw	r3, #36863	; 0x8fff
                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
                          |PATH_EN_3_5G_L_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8007eae:	a908      	add	r1, sp, #32
 8007eb0:	4862      	ldr	r0, [pc, #392]	; (800803c <main+0x2d4>)
  GPIO_InitStruct.Pin = PLL_DATA_3_5G_Pin|PLL_CLK_3_5G_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 8007eb2:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007eb4:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007eb6:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007eb8:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8007eba:	f7fd ff91 	bl	8005de0 <HAL_GPIO_Init>

  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 8007ebe:	f44f 5340 	mov.w	r3, #12288	; 0x3000
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8007ec2:	a908      	add	r1, sp, #32
 8007ec4:	485d      	ldr	r0, [pc, #372]	; (800803c <main+0x2d4>)
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 8007ec6:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007ec8:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007eca:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8007ecc:	f7fd ff88 	bl	8005de0 <HAL_GPIO_Init>

  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin 
                           BOOT_LED_Pin */
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 8007ed0:	f647 73fc 	movw	r3, #32764	; 0x7ffc
                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
                          |BOOT_LED_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 8007ed4:	a908      	add	r1, sp, #32
 8007ed6:	485a      	ldr	r0, [pc, #360]	; (8008040 <main+0x2d8>)
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 8007ed8:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007eda:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007edc:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007ede:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 8007ee0:	f7fd ff7e 	bl	8005de0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 8007ee4:	f44f 7340 	mov.w	r3, #768	; 0x300
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8007ee8:	a908      	add	r1, sp, #32
 8007eea:	4852      	ldr	r0, [pc, #328]	; (8008034 <main+0x2cc>)
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 8007eec:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007eee:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007ef0:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8007ef2:	f7fd ff75 	bl	8005de0 <HAL_GPIO_Init>

  /*Configure GPIO pin : PLL_CLK_3_5G__Pin */
  GPIO_InitStruct.Pin = PLL_CLK_3_5G__Pin;
 8007ef6:	f44f 4300 	mov.w	r3, #32768	; 0x8000
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(PLL_CLK_3_5G__GPIO_Port, &GPIO_InitStruct);
 8007efa:	a908      	add	r1, sp, #32
 8007efc:	4851      	ldr	r0, [pc, #324]	; (8008044 <main+0x2dc>)
  GPIO_InitStruct.Pin = PLL_CLK_3_5G__Pin;
 8007efe:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007f00:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007f02:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007f04:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(PLL_CLK_3_5G__GPIO_Port, &GPIO_InitStruct);
 8007f06:	f7fd ff6b 	bl	8005de0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 8007f0a:	2318      	movs	r3, #24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007f0c:	a908      	add	r1, sp, #32
 8007f0e:	484e      	ldr	r0, [pc, #312]	; (8008048 <main+0x2e0>)
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 8007f10:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8007f12:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8007f14:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007f16:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007f18:	f7fd ff62 	bl	8005de0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 8007f1c:	2360      	movs	r3, #96	; 0x60
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007f1e:	a908      	add	r1, sp, #32
 8007f20:	4849      	ldr	r0, [pc, #292]	; (8008048 <main+0x2e0>)
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 8007f22:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8007f24:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8007f26:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8007f28:	f7fd ff5a 	bl	8005de0 <HAL_GPIO_Init>
  __HAL_RCC_DMA1_CLK_ENABLE();
 8007f2c:	696b      	ldr	r3, [r5, #20]
 8007f2e:	4333      	orrs	r3, r6
 8007f30:	616b      	str	r3, [r5, #20]
 8007f32:	696b      	ldr	r3, [r5, #20]
  hadc1.Instance = ADC1;
 8007f34:	4d45      	ldr	r5, [pc, #276]	; (800804c <main+0x2e4>)
  __HAL_RCC_DMA1_CLK_ENABLE();
 8007f36:	4033      	ands	r3, r6
 8007f38:	9300      	str	r3, [sp, #0]
 8007f3a:	9b00      	ldr	r3, [sp, #0]
  hadc1.Instance = ADC1;
 8007f3c:	4b44      	ldr	r3, [pc, #272]	; (8008050 <main+0x2e8>)
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 8007f3e:	4628      	mov	r0, r5
  hadc1.Instance = ADC1;
 8007f40:	602b      	str	r3, [r5, #0]
  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
 8007f42:	f44f 7380 	mov.w	r3, #256	; 0x100
 8007f46:	60ab      	str	r3, [r5, #8]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 8007f48:	f44f 2360 	mov.w	r3, #917504	; 0xe0000
  hadc1.Init.ContinuousConvMode = ENABLE;
 8007f4c:	60ee      	str	r6, [r5, #12]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 8007f4e:	61eb      	str	r3, [r5, #28]
  ADC_ChannelConfTypeDef sConfig = {0};
 8007f50:	9408      	str	r4, [sp, #32]
 8007f52:	9409      	str	r4, [sp, #36]	; 0x24
 8007f54:	940a      	str	r4, [sp, #40]	; 0x28
  hadc1.Init.DiscontinuousConvMode = DISABLE;
 8007f56:	616c      	str	r4, [r5, #20]
  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 8007f58:	606c      	str	r4, [r5, #4]
  hadc1.Init.NbrOfConversion = 14;
 8007f5a:	f8c5 8010 	str.w	r8, [r5, #16]
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 8007f5e:	f7fd faf7 	bl	8005550 <HAL_ADC_Init>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f62:	a908      	add	r1, sp, #32
 8007f64:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_1;
 8007f66:	9609      	str	r6, [sp, #36]	; 0x24
  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
 8007f68:	f8cd a028 	str.w	sl, [sp, #40]	; 0x28
  sConfig.Channel = ADC_CHANNEL_0;
 8007f6c:	9408      	str	r4, [sp, #32]
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f6e:	f7fd f983 	bl	8005278 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_1;
 8007f72:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_3;
 8007f74:	2603      	movs	r6, #3
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f76:	a908      	add	r1, sp, #32
 8007f78:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_2;
 8007f7a:	9709      	str	r7, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f7c:	f7fd f97c 	bl	8005278 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f80:	a908      	add	r1, sp, #32
 8007f82:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_2;
 8007f84:	9708      	str	r7, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_3;
 8007f86:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f88:	f7fd f976 	bl	8005278 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_3;
 8007f8c:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_4;
 8007f8e:	2604      	movs	r6, #4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f90:	a908      	add	r1, sp, #32
 8007f92:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_4;
 8007f94:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f96:	f7fd f96f 	bl	8005278 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_4;
 8007f9a:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_5;
 8007f9c:	2605      	movs	r6, #5
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007f9e:	a908      	add	r1, sp, #32
 8007fa0:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_5;
 8007fa2:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fa4:	f7fd f968 	bl	8005278 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_5;
 8007fa8:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_6;
 8007faa:	2606      	movs	r6, #6
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fac:	a908      	add	r1, sp, #32
 8007fae:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_6;
 8007fb0:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fb2:	f7fd f961 	bl	8005278 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_6;
 8007fb6:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_8;
 8007fb8:	2608      	movs	r6, #8
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fba:	a908      	add	r1, sp, #32
 8007fbc:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_7;
 8007fbe:	f8cd a024 	str.w	sl, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fc2:	f7fd f959 	bl	8005278 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fc6:	a908      	add	r1, sp, #32
 8007fc8:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_7;
 8007fca:	f8cd a020 	str.w	sl, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_8;
 8007fce:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fd0:	f7fd f952 	bl	8005278 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_8;
 8007fd4:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_9;
 8007fd6:	2609      	movs	r6, #9
  sConfig.Rank = ADC_REGULAR_RANK_10;
 8007fd8:	f04f 0a0a 	mov.w	sl, #10
  sConfig.Rank = ADC_REGULAR_RANK_11;
 8007fdc:	270b      	movs	r7, #11
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fde:	a908      	add	r1, sp, #32
 8007fe0:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_9;
 8007fe2:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fe4:	f7fd f948 	bl	8005278 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_9;
 8007fe8:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_13;
 8007fea:	260d      	movs	r6, #13
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007fec:	a908      	add	r1, sp, #32
 8007fee:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_10;
 8007ff0:	f8cd a024 	str.w	sl, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007ff4:	f7fd f940 	bl	8005278 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8007ff8:	a908      	add	r1, sp, #32
 8007ffa:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_10;
 8007ffc:	f8cd a020 	str.w	sl, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_11;
 8008000:	9709      	str	r7, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008002:	f7fd f939 	bl	8005278 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008006:	a908      	add	r1, sp, #32
 8008008:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_11;
 800800a:	9708      	str	r7, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_12;
 800800c:	f8cd 9024 	str.w	r9, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008010:	f7fd f932 	bl	8005278 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008014:	a908      	add	r1, sp, #32
 8008016:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_13;
 8008018:	9609      	str	r6, [sp, #36]	; 0x24
  sConfig.Channel = ADC_CHANNEL_12;
 800801a:	f8cd 9020 	str.w	r9, [sp, #32]
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 800801e:	f7fd f92b 	bl	8005278 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008022:	a908      	add	r1, sp, #32
 8008024:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_13;
 8008026:	9608      	str	r6, [sp, #32]
 8008028:	e014      	b.n	8008054 <main+0x2ec>
 800802a:	bf00      	nop
 800802c:	40021000 	.word	0x40021000
 8008030:	40011800 	.word	0x40011800
 8008034:	40011000 	.word	0x40011000
 8008038:	40011c00 	.word	0x40011c00
 800803c:	40011400 	.word	0x40011400
 8008040:	40012000 	.word	0x40012000
 8008044:	40010800 	.word	0x40010800
 8008048:	40010c00 	.word	0x40010c00
 800804c:	2000068c 	.word	0x2000068c
 8008050:	40012400 	.word	0x40012400
  sConfig.Rank = ADC_REGULAR_RANK_14;
 8008054:	f8cd 8024 	str.w	r8, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008058:	f7fd f90e 	bl	8005278 <HAL_ADC_ConfigChannel>
  huart1.Init.BaudRate = 115200;
 800805c:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
  huart1.Instance = USART1;
 8008060:	4838      	ldr	r0, [pc, #224]	; (8008144 <main+0x3dc>)
  huart1.Init.BaudRate = 115200;
 8008062:	4a39      	ldr	r2, [pc, #228]	; (8008148 <main+0x3e0>)
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8008064:	6084      	str	r4, [r0, #8]
  huart1.Init.BaudRate = 115200;
 8008066:	e880 000c 	stmia.w	r0, {r2, r3}
  huart1.Init.StopBits = UART_STOPBITS_1;
 800806a:	60c4      	str	r4, [r0, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 800806c:	6104      	str	r4, [r0, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 800806e:	f8c0 9014 	str.w	r9, [r0, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8008072:	6184      	str	r4, [r0, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8008074:	61c4      	str	r4, [r0, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8008076:	f7fe fd47 	bl	8006b08 <HAL_UART_Init>
  htim6.Init.Prescaler = 5600-1;
 800807a:	f241 53df 	movw	r3, #5599	; 0x15df
  htim6.Instance = TIM6;
 800807e:	4e33      	ldr	r6, [pc, #204]	; (800814c <main+0x3e4>)
  htim6.Init.Prescaler = 5600-1;
 8008080:	4933      	ldr	r1, [pc, #204]	; (8008150 <main+0x3e8>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8008082:	4630      	mov	r0, r6
  htim6.Init.Prescaler = 5600-1;
 8008084:	e886 000a 	stmia.w	r6, {r1, r3}
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8008088:	9408      	str	r4, [sp, #32]
 800808a:	9409      	str	r4, [sp, #36]	; 0x24
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 800808c:	60b4      	str	r4, [r6, #8]
  htim6.Init.Period = 10;
 800808e:	f8c6 a00c 	str.w	sl, [r6, #12]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8008092:	61b4      	str	r4, [r6, #24]
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8008094:	f7fe fc26 	bl	80068e4 <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8008098:	a908      	add	r1, sp, #32
 800809a:	4630      	mov	r0, r6
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 800809c:	9408      	str	r4, [sp, #32]
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 800809e:	9409      	str	r4, [sp, #36]	; 0x24
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 80080a0:	f7fe fc3a 	bl	8006918 <HAL_TIMEx_MasterConfigSynchronization>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 80080a4:	4622      	mov	r2, r4
 80080a6:	4621      	mov	r1, r4
 80080a8:	2025      	movs	r0, #37	; 0x25
 80080aa:	f7fd fb55 	bl	8005758 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 80080ae:	2025      	movs	r0, #37	; 0x25
 80080b0:	f7fd fb86 	bl	80057c0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 80080b4:	4622      	mov	r2, r4
 80080b6:	4621      	mov	r1, r4
 80080b8:	2036      	movs	r0, #54	; 0x36
 80080ba:	f7fd fb4d 	bl	8005758 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 80080be:	2036      	movs	r0, #54	; 0x36
 80080c0:	f7fd fb7e 	bl	80057c0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 80080c4:	4622      	mov	r2, r4
 80080c6:	4621      	mov	r1, r4
 80080c8:	4638      	mov	r0, r7
 80080ca:	f7fd fb45 	bl	8005758 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
 80080ce:	4638      	mov	r0, r7
 80080d0:	f7fd fb76 	bl	80057c0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
 80080d4:	4622      	mov	r2, r4
 80080d6:	4621      	mov	r1, r4
 80080d8:	4640      	mov	r0, r8
 80080da:	f7fd fb3d 	bl	8005758 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
 80080de:	4640      	mov	r0, r8
 80080e0:	f7fd fb6e 	bl	80057c0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
 80080e4:	4622      	mov	r2, r4
 80080e6:	4621      	mov	r1, r4
 80080e8:	200f      	movs	r0, #15
 80080ea:	f7fd fb35 	bl	8005758 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
 80080ee:	200f      	movs	r0, #15
 80080f0:	f7fd fb66 	bl	80057c0 <HAL_NVIC_EnableIRQ>
  InitUartQueue(&TerminalQueue);
 80080f4:	4817      	ldr	r0, [pc, #92]	; (8008154 <main+0x3ec>)
 80080f6:	f000 fad7 	bl	80086a8 <InitUartQueue>
  Power_ON_OFF_Initialize();  
 80080fa:	f7ff fd13 	bl	8007b24 <Power_ON_OFF_Initialize>
  Path_Init();
 80080fe:	f7ff fc59 	bl	80079b4 <Path_Init>
  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
 8008102:	4628      	mov	r0, r5
 8008104:	f7fd faae 	bl	8005664 <HAL_ADCEx_Calibration_Start>
 8008108:	2800      	cmp	r0, #0
 800810a:	d1fa      	bne.n	8008102 <main+0x39a>
  AD5318_Initialize();
 800810c:	f7fe ffa8 	bl	8007060 <AD5318_Initialize>
  Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
 8008110:	4811      	ldr	r0, [pc, #68]	; (8008158 <main+0x3f0>)
 8008112:	f7ff fc3e 	bl	8007992 <Bluecell_Flash_Read>
  ADF4153_Initialize();
 8008116:	f7ff fae1 	bl	80076dc <ADF4153_Initialize>
  ADF4113_Initialize();
 800811a:	f000 f825 	bl	8008168 <ADF4113_Initialize>
  PE43711_PinInit();
 800811e:	f7ff f9a7 	bl	8007470 <PE43711_PinInit>
  BDA4601_Initialize();
 8008122:	f7ff f823 	bl	800716c <BDA4601_Initialize>
  ATTEN_PLL_PATH_Initialize();
 8008126:	f7ff fceb 	bl	8007b00 <ATTEN_PLL_PATH_Initialize>
  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
 800812a:	220e      	movs	r2, #14
 800812c:	490b      	ldr	r1, [pc, #44]	; (800815c <main+0x3f4>)
 800812e:	480c      	ldr	r0, [pc, #48]	; (8008160 <main+0x3f8>)
 8008130:	f7fd f95e 	bl	80053f0 <HAL_ADC_Start_DMA>
    Boot_LED_Toggle();
 8008134:	f7ff fd70 	bl	8007c18 <Boot_LED_Toggle>
    Uart_Check();
 8008138:	f7ff fda0 	bl	8007c7c <Uart_Check>
    ADC_Check();
 800813c:	f7ff fd7e 	bl	8007c3c <ADC_Check>
 8008140:	e7f8      	b.n	8008134 <main+0x3cc>
 8008142:	bf00      	nop
 8008144:	20000700 	.word	0x20000700
 8008148:	40013800 	.word	0x40013800
 800814c:	20000784 	.word	0x20000784
 8008150:	40001000 	.word	0x40001000
 8008154:	20000bc4 	.word	0x20000bc4
 8008158:	20000580 	.word	0x20000580
 800815c:	200004a0 	.word	0x200004a0
 8008160:	2000068c 	.word	0x2000068c

08008164 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8008164:	4770      	bx	lr
	...

08008168 <ADF4113_Initialize>:
    uint16_t P;
    uint16_t A;   
    uint16_t N;       
}Adf4113_st;
void ADF4113_Initialize(void){
  if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
 8008168:	4b10      	ldr	r3, [pc, #64]	; (80081ac <ADF4113_Initialize+0x44>)
 800816a:	7d9a      	ldrb	r2, [r3, #22]
 800816c:	b92a      	cbnz	r2, 800817a <ADF4113_Initialize+0x12>
 800816e:	7dda      	ldrb	r2, [r3, #23]
 8008170:	b91a      	cbnz	r2, 800817a <ADF4113_Initialize+0x12>
    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47;
 8008172:	223e      	movs	r2, #62	; 0x3e
 8008174:	759a      	strb	r2, [r3, #22]
    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF);
 8008176:	2280      	movs	r2, #128	; 0x80
 8008178:	75da      	strb	r2, [r3, #23]
  }
  if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
 800817a:	7e1a      	ldrb	r2, [r3, #24]
 800817c:	b92a      	cbnz	r2, 800818a <ADF4113_Initialize+0x22>
 800817e:	7e5a      	ldrb	r2, [r3, #25]
 8008180:	b91a      	cbnz	r2, 800818a <ADF4113_Initialize+0x22>
    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8);
 8008182:	2238      	movs	r2, #56	; 0x38
 8008184:	761a      	strb	r2, [r3, #24]
    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF);
 8008186:	22d6      	movs	r2, #214	; 0xd6
 8008188:	765a      	strb	r2, [r3, #25]
  }
  if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
 800818a:	7e9a      	ldrb	r2, [r3, #26]
 800818c:	b92a      	cbnz	r2, 800819a <ADF4113_Initialize+0x32>
 800818e:	7eda      	ldrb	r2, [r3, #27]
 8008190:	b91a      	cbnz	r2, 800819a <ADF4113_Initialize+0x32>
    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8);
 8008192:	224d      	movs	r2, #77	; 0x4d
 8008194:	769a      	strb	r2, [r3, #26]
    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF);
 8008196:	22ee      	movs	r2, #238	; 0xee
 8008198:	76da      	strb	r2, [r3, #27]
  }
  if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
 800819a:	7f1a      	ldrb	r2, [r3, #28]
 800819c:	b92a      	cbnz	r2, 80081aa <ADF4113_Initialize+0x42>
 800819e:	7f5a      	ldrb	r2, [r3, #29]
 80081a0:	b91a      	cbnz	r2, 80081aa <ADF4113_Initialize+0x42>
    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8);
 80081a2:	2259      	movs	r2, #89	; 0x59
 80081a4:	771a      	strb	r2, [r3, #28]
    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF);    
 80081a6:	22a6      	movs	r2, #166	; 0xa6
 80081a8:	775a      	strb	r2, [r3, #29]
 80081aa:	4770      	bx	lr
 80081ac:	20000580 	.word	0x20000580

080081b0 <N_Counter_Latch_Create>:
    A = N_val -(B * P);
//    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
//    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
  return N_Counter_Latch_Create(A,B,0);
}
uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
 80081b0:	2301      	movs	r3, #1
 80081b2:	b570      	push	{r4, r5, r6, lr}
 80081b4:	2402      	movs	r4, #2
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 8; i++){
        if(_ACOUNTER & 0x01)
            ret += shift_bit << i;
 80081b6:	461d      	mov	r5, r3
        if(_ACOUNTER & 0x01)
 80081b8:	07c6      	lsls	r6, r0, #31
            ret += shift_bit << i;
 80081ba:	bf48      	it	mi
 80081bc:	fa05 f604 	lslmi.w	r6, r5, r4
 80081c0:	f104 0401 	add.w	r4, r4, #1
 80081c4:	bf48      	it	mi
 80081c6:	199b      	addmi	r3, r3, r6
    for(i = 2; i < 8; i++){
 80081c8:	2c08      	cmp	r4, #8
        _ACOUNTER = _ACOUNTER >> 1;
 80081ca:	ea4f 0050 	mov.w	r0, r0, lsr #1
    for(i = 2; i < 8; i++){
 80081ce:	d1f3      	bne.n	80081b8 <N_Counter_Latch_Create+0x8>
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 8; i < 21; i++){
        if(_BCOUNTER & 0x01)
            ret += shift_bit << i;
 80081d0:	2001      	movs	r0, #1
        if(_BCOUNTER & 0x01)
 80081d2:	07cd      	lsls	r5, r1, #31
            ret += shift_bit << i;
 80081d4:	bf48      	it	mi
 80081d6:	fa00 f504 	lslmi.w	r5, r0, r4
 80081da:	f104 0401 	add.w	r4, r4, #1
 80081de:	bf48      	it	mi
 80081e0:	195b      	addmi	r3, r3, r5
    for(i = 8; i < 21; i++){
 80081e2:	2c15      	cmp	r4, #21
        _BCOUNTER = _BCOUNTER >> 1;
 80081e4:	ea4f 0151 	mov.w	r1, r1, lsr #1
    for(i = 8; i < 21; i++){
 80081e8:	d1f3      	bne.n	80081d2 <N_Counter_Latch_Create+0x22>
    }      
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    if(_CPGAIN & 0x01)
 80081ea:	07d2      	lsls	r2, r2, #31
            ret += shift_bit << i++;
 80081ec:	bf48      	it	mi
 80081ee:	f503 1300 	addmi.w	r3, r3, #2097152	; 0x200000
    }   
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    return ret;
}
 80081f2:	4618      	mov	r0, r3
 80081f4:	bd70      	pop	{r4, r5, r6, pc}
	...

080081f8 <halSynSetFreq>:
    N_val = (rf_Freq / ADF4113_CH_STEP);
 80081f8:	f24c 3350 	movw	r3, #50000	; 0xc350
 80081fc:	fbb0 f3f3 	udiv	r3, r0, r3
    if( N_val < ADF4113_PRE8_MIN_N) { 
 8008200:	2b37      	cmp	r3, #55	; 0x37
 8008202:	d909      	bls.n	8008218 <halSynSetFreq+0x20>
    B = N_val / P;
 8008204:	4905      	ldr	r1, [pc, #20]	; (800821c <halSynSetFreq+0x24>)
  return N_Counter_Latch_Create(A,B,0);
 8008206:	2200      	movs	r2, #0
    B = N_val / P;
 8008208:	fbb0 f1f1 	udiv	r1, r0, r1
    A = N_val -(B * P);
 800820c:	eba3 1041 	sub.w	r0, r3, r1, lsl #5
  return N_Counter_Latch_Create(A,B,0);
 8008210:	b280      	uxth	r0, r0
 8008212:	b289      	uxth	r1, r1
 8008214:	f7ff bfcc 	b.w	80081b0 <N_Counter_Latch_Create>
}
 8008218:	2004      	movs	r0, #4
 800821a:	4770      	bx	lr
 800821c:	00186a00 	.word	0x00186a00

08008220 <ADF4113_Module_Ctrl>:
void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
 8008220:	b084      	sub	sp, #16
 8008222:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8008226:	ac0c      	add	r4, sp, #48	; 0x30
 8008228:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
    R2 = R2 & 0xFFFFFF;
    R1 = R1 & 0xFFFFFF;
 800822c:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 800822e:	f8bd 7034 	ldrh.w	r7, [sp, #52]	; 0x34
 8008232:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008236:	9301      	str	r3, [sp, #4]
    R0 = R0 & 0xFFFFFF;
 8008238:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800823a:	f8dd 8038 	ldr.w	r8, [sp, #56]	; 0x38
 800823e:	f8bd 903c 	ldrh.w	r9, [sp, #60]	; 0x3c
 8008242:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008246:	9d10      	ldr	r5, [sp, #64]	; 0x40
 8008248:	f8bd 6044 	ldrh.w	r6, [sp, #68]	; 0x44
    
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 800824c:	2200      	movs	r2, #0
 800824e:	4639      	mov	r1, r7
    R0 = R0 & 0xFFFFFF;
 8008250:	9300      	str	r3, [sp, #0]
 8008252:	4682      	mov	sl, r0
    R2 = R2 & 0xFFFFFF;
 8008254:	9c14      	ldr	r4, [sp, #80]	; 0x50
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8008256:	f7fd feb5 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800825a:	2200      	movs	r2, #0
 800825c:	4649      	mov	r1, r9
 800825e:	4640      	mov	r0, r8
 8008260:	f7fd feb0 	bl	8005fc4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8008264:	2200      	movs	r2, #0
 8008266:	4631      	mov	r1, r6
 8008268:	4628      	mov	r0, r5
 800826a:	f7fd feab 	bl	8005fc4 <HAL_GPIO_WritePin>
 800826e:	f04f 0b18 	mov.w	fp, #24
    R2 = R2 & 0xFFFFFF;
 8008272:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
    /*   R2 Ctrl    */
     for(int i =0; i < 24; i++){
         if(R2 & 0x800000){
 8008276:	f414 0200 	ands.w	r2, r4, #8388608	; 0x800000
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("1");
#endif // PYJ.2019.08.11_END -- 
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 800827a:	bf18      	it	ne
 800827c:	2201      	movne	r2, #1
         }
         else{
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");
#endif // PYJ.2019.08.11_END -- 
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800827e:	4649      	mov	r1, r9
 8008280:	4640      	mov	r0, r8
 8008282:	f7fd fe9f 	bl	8005fc4 <HAL_GPIO_WritePin>
         }
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8008286:	2201      	movs	r2, #1
 8008288:	4639      	mov	r1, r7
 800828a:	4650      	mov	r0, sl
 800828c:	f7fd fe9a 	bl	8005fc4 <HAL_GPIO_WritePin>
         Pol_Delay_us(10);
 8008290:	200a      	movs	r0, #10
 8008292:	f7ff fcab 	bl	8007bec <Pol_Delay_us>
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8008296:	2200      	movs	r2, #0
 8008298:	4639      	mov	r1, r7
 800829a:	4650      	mov	r0, sl
 800829c:	f7fd fe92 	bl	8005fc4 <HAL_GPIO_WritePin>
         R2 = ((R2 << 1) & 0xFFFFFF);
 80082a0:	0064      	lsls	r4, r4, #1
     for(int i =0; i < 24; i++){
 80082a2:	f1bb 0b01 	subs.w	fp, fp, #1
         R2 = ((R2 << 1) & 0xFFFFFF);
 80082a6:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
     for(int i =0; i < 24; i++){
 80082aa:	d1e4      	bne.n	8008276 <ADF4113_Module_Ctrl+0x56>
     }
#if 0 // PYJ.2019.08.11_BEGIN -- 
     printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 80082ac:	2201      	movs	r2, #1
 80082ae:	4631      	mov	r1, r6
 80082b0:	4628      	mov	r0, r5
 80082b2:	f7fd fe87 	bl	8005fc4 <HAL_GPIO_WritePin>
     Pol_Delay_us(10);
 80082b6:	200a      	movs	r0, #10
 80082b8:	f7ff fc98 	bl	8007bec <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80082bc:	465a      	mov	r2, fp
 80082be:	4631      	mov	r1, r6
 80082c0:	4628      	mov	r0, r5
 80082c2:	f7fd fe7f 	bl	8005fc4 <HAL_GPIO_WritePin>
 80082c6:	2418      	movs	r4, #24
        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
 80082c8:	9b00      	ldr	r3, [sp, #0]
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("1");
#endif // PYJ.2019.08.11_END -- 
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80082ca:	4649      	mov	r1, r9
        if(R0 & 0x800000){
 80082cc:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 80082d0:	bf18      	it	ne
 80082d2:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80082d4:	4640      	mov	r0, r8
 80082d6:	f7fd fe75 	bl	8005fc4 <HAL_GPIO_WritePin>
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");
#endif // PYJ.2019.08.11_END -- 
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 80082da:	2201      	movs	r2, #1
 80082dc:	4639      	mov	r1, r7
 80082de:	4650      	mov	r0, sl
 80082e0:	f7fd fe70 	bl	8005fc4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 80082e4:	200a      	movs	r0, #10
 80082e6:	f7ff fc81 	bl	8007bec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 80082ea:	2200      	movs	r2, #0
 80082ec:	4639      	mov	r1, r7
 80082ee:	4650      	mov	r0, sl
 80082f0:	f7fd fe68 	bl	8005fc4 <HAL_GPIO_WritePin>
        R0 = ((R0 << 1) & 0xFFFFFF);
 80082f4:	9b00      	ldr	r3, [sp, #0]
    for(int i =0; i < 24; i++){
 80082f6:	3c01      	subs	r4, #1
        R0 = ((R0 << 1) & 0xFFFFFF);
 80082f8:	ea4f 0343 	mov.w	r3, r3, lsl #1
 80082fc:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008300:	9300      	str	r3, [sp, #0]
    for(int i =0; i < 24; i++){
 8008302:	d1e1      	bne.n	80082c8 <ADF4113_Module_Ctrl+0xa8>
    }  
#if 0 // PYJ.2019.08.11_BEGIN -- 
        printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8008304:	2201      	movs	r2, #1
 8008306:	4631      	mov	r1, r6
 8008308:	4628      	mov	r0, r5
 800830a:	f7fd fe5b 	bl	8005fc4 <HAL_GPIO_WritePin>
     
     Pol_Delay_us(10);
 800830e:	200a      	movs	r0, #10
 8008310:	f7ff fc6c 	bl	8007bec <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);    
 8008314:	4622      	mov	r2, r4
 8008316:	4631      	mov	r1, r6
 8008318:	4628      	mov	r0, r5
 800831a:	f7fd fe53 	bl	8005fc4 <HAL_GPIO_WritePin>
 800831e:	2418      	movs	r4, #24
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
 8008320:	9b01      	ldr	r3, [sp, #4]
        }
        else{
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");            
#endif // PYJ.2019.08.11_END -- 
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8008322:	4649      	mov	r1, r9
        if(R1 & 0x800000){
 8008324:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8008328:	bf18      	it	ne
 800832a:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800832c:	4640      	mov	r0, r8
 800832e:	f7fd fe49 	bl	8005fc4 <HAL_GPIO_WritePin>
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8008332:	2201      	movs	r2, #1
 8008334:	4639      	mov	r1, r7
 8008336:	4650      	mov	r0, sl
 8008338:	f7fd fe44 	bl	8005fc4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 800833c:	200a      	movs	r0, #10
 800833e:	f7ff fc55 	bl	8007bec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8008342:	2200      	movs	r2, #0
 8008344:	4639      	mov	r1, r7
 8008346:	4650      	mov	r0, sl
 8008348:	f7fd fe3c 	bl	8005fc4 <HAL_GPIO_WritePin>
        R1 = ((R1 << 1) & 0xFFFFFF);
 800834c:	9b01      	ldr	r3, [sp, #4]
    for(int i =0; i < 24; i++){
 800834e:	3c01      	subs	r4, #1
        R1 = ((R1 << 1) & 0xFFFFFF);
 8008350:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8008354:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008358:	9301      	str	r3, [sp, #4]
    for(int i =0; i < 24; i++){
 800835a:	d1e1      	bne.n	8008320 <ADF4113_Module_Ctrl+0x100>
    }
#if 0 // PYJ.2019.08.11_BEGIN -- 
        printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 800835c:	4631      	mov	r1, r6
 800835e:	2201      	movs	r2, #1
 8008360:	4628      	mov	r0, r5
 8008362:	f7fd fe2f 	bl	8005fc4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8008366:	200a      	movs	r0, #10
 8008368:	f7ff fc40 	bl	8007bec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800836c:	4622      	mov	r2, r4
 800836e:	4631      	mov	r1, r6
 8008370:	4628      	mov	r0, r5

}
 8008372:	b003      	add	sp, #12
 8008374:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8008378:	b004      	add	sp, #16
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800837a:	f7fd be23 	b.w	8005fc4 <HAL_GPIO_WritePin>
	...

08008380 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8008380:	4b0e      	ldr	r3, [pc, #56]	; (80083bc <HAL_MspInit+0x3c>)
{
 8008382:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8008384:	699a      	ldr	r2, [r3, #24]
 8008386:	f042 0201 	orr.w	r2, r2, #1
 800838a:	619a      	str	r2, [r3, #24]
 800838c:	699a      	ldr	r2, [r3, #24]
 800838e:	f002 0201 	and.w	r2, r2, #1
 8008392:	9200      	str	r2, [sp, #0]
 8008394:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8008396:	69da      	ldr	r2, [r3, #28]
 8008398:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 800839c:	61da      	str	r2, [r3, #28]
 800839e:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled 
  */
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 80083a0:	4a07      	ldr	r2, [pc, #28]	; (80083c0 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 80083a2:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80083a6:	9301      	str	r3, [sp, #4]
 80083a8:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 80083aa:	6853      	ldr	r3, [r2, #4]
 80083ac:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 80083b0:	f043 7300 	orr.w	r3, r3, #33554432	; 0x2000000
 80083b4:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 80083b6:	b002      	add	sp, #8
 80083b8:	4770      	bx	lr
 80083ba:	bf00      	nop
 80083bc:	40021000 	.word	0x40021000
 80083c0:	40010000 	.word	0x40010000

080083c4 <HAL_ADC_MspInit>:
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80083c4:	2210      	movs	r2, #16
{
 80083c6:	b530      	push	{r4, r5, lr}
 80083c8:	4605      	mov	r5, r0
 80083ca:	b089      	sub	sp, #36	; 0x24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80083cc:	eb0d 0002 	add.w	r0, sp, r2
 80083d0:	2100      	movs	r1, #0
 80083d2:	f000 ffb0 	bl	8009336 <memset>
  if(hadc->Instance==ADC1)
 80083d6:	682a      	ldr	r2, [r5, #0]
 80083d8:	4b2c      	ldr	r3, [pc, #176]	; (800848c <HAL_ADC_MspInit+0xc8>)
 80083da:	429a      	cmp	r2, r3
 80083dc:	d153      	bne.n	8008486 <HAL_ADC_MspInit+0xc2>
  {
  /* USER CODE BEGIN ADC1_MspInit 0 */

  /* USER CODE END ADC1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_ADC1_CLK_ENABLE();
 80083de:	f503 436c 	add.w	r3, r3, #60416	; 0xec00
 80083e2:	699a      	ldr	r2, [r3, #24]
    PA7     ------> ADC1_IN7
    PB0     ------> ADC1_IN8
    PB1     ------> ADC1_IN9 
    */
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 80083e4:	2403      	movs	r4, #3
    __HAL_RCC_ADC1_CLK_ENABLE();
 80083e6:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 80083ea:	619a      	str	r2, [r3, #24]
 80083ec:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80083ee:	a904      	add	r1, sp, #16
    __HAL_RCC_ADC1_CLK_ENABLE();
 80083f0:	f402 7200 	and.w	r2, r2, #512	; 0x200
 80083f4:	9200      	str	r2, [sp, #0]
 80083f6:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 80083f8:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80083fa:	4825      	ldr	r0, [pc, #148]	; (8008490 <HAL_ADC_MspInit+0xcc>)
    __HAL_RCC_GPIOC_CLK_ENABLE();
 80083fc:	f042 0210 	orr.w	r2, r2, #16
 8008400:	619a      	str	r2, [r3, #24]
 8008402:	699a      	ldr	r2, [r3, #24]
 8008404:	f002 0210 	and.w	r2, r2, #16
 8008408:	9201      	str	r2, [sp, #4]
 800840a:	9a01      	ldr	r2, [sp, #4]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 800840c:	699a      	ldr	r2, [r3, #24]
 800840e:	f042 0204 	orr.w	r2, r2, #4
 8008412:	619a      	str	r2, [r3, #24]
 8008414:	699a      	ldr	r2, [r3, #24]
 8008416:	f002 0204 	and.w	r2, r2, #4
 800841a:	9202      	str	r2, [sp, #8]
 800841c:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 800841e:	699a      	ldr	r2, [r3, #24]
 8008420:	f042 0208 	orr.w	r2, r2, #8
 8008424:	619a      	str	r2, [r3, #24]
 8008426:	699b      	ldr	r3, [r3, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8008428:	9405      	str	r4, [sp, #20]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 800842a:	f003 0308 	and.w	r3, r3, #8
 800842e:	9303      	str	r3, [sp, #12]
 8008430:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
 8008432:	230f      	movs	r3, #15
 8008434:	9304      	str	r3, [sp, #16]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8008436:	f7fd fcd3 	bl	8005de0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 800843a:	23ff      	movs	r3, #255	; 0xff
                          |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800843c:	a904      	add	r1, sp, #16
 800843e:	4815      	ldr	r0, [pc, #84]	; (8008494 <HAL_ADC_MspInit+0xd0>)
    GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 8008440:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8008442:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008444:	f7fd fccc 	bl	8005de0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8008448:	4813      	ldr	r0, [pc, #76]	; (8008498 <HAL_ADC_MspInit+0xd4>)
 800844a:	a904      	add	r1, sp, #16
    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
 800844c:	9404      	str	r4, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 800844e:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8008450:	f7fd fcc6 	bl	8005de0 <HAL_GPIO_Init>
    /* ADC1 DMA Init */
    /* ADC1 Init */
    hdma_adc1.Instance = DMA1_Channel1;
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 8008454:	2280      	movs	r2, #128	; 0x80
    hdma_adc1.Instance = DMA1_Channel1;
 8008456:	4c11      	ldr	r4, [pc, #68]	; (800849c <HAL_ADC_MspInit+0xd8>)
 8008458:	4b11      	ldr	r3, [pc, #68]	; (80084a0 <HAL_ADC_MspInit+0xdc>)
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 800845a:	60e2      	str	r2, [r4, #12]
    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 800845c:	f44f 7200 	mov.w	r2, #512	; 0x200
 8008460:	6122      	str	r2, [r4, #16]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 8008462:	f44f 6200 	mov.w	r2, #2048	; 0x800
    hdma_adc1.Instance = DMA1_Channel1;
 8008466:	6023      	str	r3, [r4, #0]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 8008468:	6162      	str	r2, [r4, #20]
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 800846a:	2300      	movs	r3, #0
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 800846c:	2220      	movs	r2, #32
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 800846e:	4620      	mov	r0, r4
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8008470:	6063      	str	r3, [r4, #4]
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
 8008472:	60a3      	str	r3, [r4, #8]
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 8008474:	61a2      	str	r2, [r4, #24]
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 8008476:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 8008478:	f7fd f9c4 	bl	8005804 <HAL_DMA_Init>
 800847c:	b108      	cbz	r0, 8008482 <HAL_ADC_MspInit+0xbe>
    {
      Error_Handler();
 800847e:	f7ff fe71 	bl	8008164 <Error_Handler>
    }

    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
 8008482:	622c      	str	r4, [r5, #32]
 8008484:	6265      	str	r5, [r4, #36]	; 0x24
  /* USER CODE BEGIN ADC1_MspInit 1 */

  /* USER CODE END ADC1_MspInit 1 */
  }

}
 8008486:	b009      	add	sp, #36	; 0x24
 8008488:	bd30      	pop	{r4, r5, pc}
 800848a:	bf00      	nop
 800848c:	40012400 	.word	0x40012400
 8008490:	40011000 	.word	0x40011000
 8008494:	40010800 	.word	0x40010800
 8008498:	40010c00 	.word	0x40010c00
 800849c:	20000740 	.word	0x20000740
 80084a0:	40020008 	.word	0x40020008

080084a4 <HAL_TIM_Base_MspInit>:
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
  if(htim_base->Instance==TIM6)
 80084a4:	6802      	ldr	r2, [r0, #0]
 80084a6:	4b08      	ldr	r3, [pc, #32]	; (80084c8 <HAL_TIM_Base_MspInit+0x24>)
{
 80084a8:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 80084aa:	429a      	cmp	r2, r3
 80084ac:	d10a      	bne.n	80084c4 <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 80084ae:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 80084b2:	69da      	ldr	r2, [r3, #28]
 80084b4:	f042 0210 	orr.w	r2, r2, #16
 80084b8:	61da      	str	r2, [r3, #28]
 80084ba:	69db      	ldr	r3, [r3, #28]
 80084bc:	f003 0310 	and.w	r3, r3, #16
 80084c0:	9301      	str	r3, [sp, #4]
 80084c2:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 80084c4:	b002      	add	sp, #8
 80084c6:	4770      	bx	lr
 80084c8:	40001000 	.word	0x40001000

080084cc <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 80084cc:	b570      	push	{r4, r5, r6, lr}
 80084ce:	4606      	mov	r6, r0
 80084d0:	b086      	sub	sp, #24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80084d2:	2210      	movs	r2, #16
 80084d4:	2100      	movs	r1, #0
 80084d6:	a802      	add	r0, sp, #8
 80084d8:	f000 ff2d 	bl	8009336 <memset>
  if(huart->Instance==USART1)
 80084dc:	6832      	ldr	r2, [r6, #0]
 80084de:	4b2b      	ldr	r3, [pc, #172]	; (800858c <HAL_UART_MspInit+0xc0>)
 80084e0:	429a      	cmp	r2, r3
 80084e2:	d151      	bne.n	8008588 <HAL_UART_MspInit+0xbc>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 80084e4:	f503 4358 	add.w	r3, r3, #55296	; 0xd800
 80084e8:	699a      	ldr	r2, [r3, #24]
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80084ea:	a902      	add	r1, sp, #8
    __HAL_RCC_USART1_CLK_ENABLE();
 80084ec:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 80084f0:	619a      	str	r2, [r3, #24]
 80084f2:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80084f4:	4826      	ldr	r0, [pc, #152]	; (8008590 <HAL_UART_MspInit+0xc4>)
    __HAL_RCC_USART1_CLK_ENABLE();
 80084f6:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 80084fa:	9200      	str	r2, [sp, #0]
 80084fc:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 80084fe:	699a      	ldr	r2, [r3, #24]

    GPIO_InitStruct.Pin = GPIO_PIN_10;
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8008500:	2500      	movs	r5, #0
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8008502:	f042 0204 	orr.w	r2, r2, #4
 8008506:	619a      	str	r2, [r3, #24]
 8008508:	699b      	ldr	r3, [r3, #24]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

    /* USART1 DMA Init */
    /* USART1_RX Init */
    hdma_usart1_rx.Instance = DMA1_Channel5;
 800850a:	4c22      	ldr	r4, [pc, #136]	; (8008594 <HAL_UART_MspInit+0xc8>)
    __HAL_RCC_GPIOA_CLK_ENABLE();
 800850c:	f003 0304 	and.w	r3, r3, #4
 8008510:	9301      	str	r3, [sp, #4]
 8008512:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8008514:	f44f 7300 	mov.w	r3, #512	; 0x200
 8008518:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800851a:	2302      	movs	r3, #2
 800851c:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800851e:	2303      	movs	r3, #3
 8008520:	9305      	str	r3, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008522:	f7fd fc5d 	bl	8005de0 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8008526:	f44f 6380 	mov.w	r3, #1024	; 0x400
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800852a:	4819      	ldr	r0, [pc, #100]	; (8008590 <HAL_UART_MspInit+0xc4>)
 800852c:	a902      	add	r1, sp, #8
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 800852e:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8008530:	9503      	str	r5, [sp, #12]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008532:	9504      	str	r5, [sp, #16]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008534:	f7fd fc54 	bl	8005de0 <HAL_GPIO_Init>
    hdma_usart1_rx.Instance = DMA1_Channel5;
 8008538:	4b17      	ldr	r3, [pc, #92]	; (8008598 <HAL_UART_MspInit+0xcc>)
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 800853a:	4620      	mov	r0, r4
    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 800853c:	e884 0028 	stmia.w	r4, {r3, r5}
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 8008540:	2380      	movs	r3, #128	; 0x80
    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8008542:	60a5      	str	r5, [r4, #8]
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 8008544:	60e3      	str	r3, [r4, #12]
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8008546:	6125      	str	r5, [r4, #16]
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8008548:	6165      	str	r5, [r4, #20]
    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
 800854a:	61a5      	str	r5, [r4, #24]
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
 800854c:	61e5      	str	r5, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 800854e:	f7fd f959 	bl	8005804 <HAL_DMA_Init>
 8008552:	b108      	cbz	r0, 8008558 <HAL_UART_MspInit+0x8c>
    {
      Error_Handler();
 8008554:	f7ff fe06 	bl	8008164 <Error_Handler>

    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);

    /* USART1_TX Init */
    hdma_usart1_tx.Instance = DMA1_Channel4;
    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8008558:	f04f 0c10 	mov.w	ip, #16
 800855c:	4b0f      	ldr	r3, [pc, #60]	; (800859c <HAL_UART_MspInit+0xd0>)
    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
 800855e:	6374      	str	r4, [r6, #52]	; 0x34
 8008560:	6266      	str	r6, [r4, #36]	; 0x24
    hdma_usart1_tx.Instance = DMA1_Channel4;
 8008562:	4c0f      	ldr	r4, [pc, #60]	; (80085a0 <HAL_UART_MspInit+0xd4>)
    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 8008564:	2280      	movs	r2, #128	; 0x80
    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8008566:	e884 1008 	stmia.w	r4, {r3, ip}
    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 800856a:	2300      	movs	r3, #0
    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 800856c:	4620      	mov	r0, r4
    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 800856e:	60a3      	str	r3, [r4, #8]
    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 8008570:	60e2      	str	r2, [r4, #12]
    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8008572:	6123      	str	r3, [r4, #16]
    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8008574:	6163      	str	r3, [r4, #20]
    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
 8008576:	61a3      	str	r3, [r4, #24]
    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
 8008578:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 800857a:	f7fd f943 	bl	8005804 <HAL_DMA_Init>
 800857e:	b108      	cbz	r0, 8008584 <HAL_UART_MspInit+0xb8>
    {
      Error_Handler();
 8008580:	f7ff fdf0 	bl	8008164 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
 8008584:	6334      	str	r4, [r6, #48]	; 0x30
 8008586:	6266      	str	r6, [r4, #36]	; 0x24
  /* USER CODE BEGIN USART1_MspInit 1 */

  /* USER CODE END USART1_MspInit 1 */
  }

}
 8008588:	b006      	add	sp, #24
 800858a:	bd70      	pop	{r4, r5, r6, pc}
 800858c:	40013800 	.word	0x40013800
 8008590:	40010800 	.word	0x40010800
 8008594:	200006bc 	.word	0x200006bc
 8008598:	40020058 	.word	0x40020058
 800859c:	40020044 	.word	0x40020044
 80085a0:	20000648 	.word	0x20000648

080085a4 <NMI_Handler>:
 80085a4:	4770      	bx	lr

080085a6 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 80085a6:	e7fe      	b.n	80085a6 <HardFault_Handler>

080085a8 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 80085a8:	e7fe      	b.n	80085a8 <MemManage_Handler>

080085aa <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 80085aa:	e7fe      	b.n	80085aa <BusFault_Handler>

080085ac <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 80085ac:	e7fe      	b.n	80085ac <UsageFault_Handler>

080085ae <SVC_Handler>:
 80085ae:	4770      	bx	lr

080085b0 <DebugMon_Handler>:
 80085b0:	4770      	bx	lr

080085b2 <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 80085b2:	4770      	bx	lr

080085b4 <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 80085b4:	f7fc be00 	b.w	80051b8 <HAL_IncTick>

080085b8 <DMA1_Channel1_IRQHandler>:
void DMA1_Channel1_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */

  /* USER CODE END DMA1_Channel1_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_adc1);
 80085b8:	4801      	ldr	r0, [pc, #4]	; (80085c0 <DMA1_Channel1_IRQHandler+0x8>)
 80085ba:	f7fd ba0f 	b.w	80059dc <HAL_DMA_IRQHandler>
 80085be:	bf00      	nop
 80085c0:	20000740 	.word	0x20000740

080085c4 <DMA1_Channel4_IRQHandler>:
void DMA1_Channel4_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */

  /* USER CODE END DMA1_Channel4_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_tx);
 80085c4:	4801      	ldr	r0, [pc, #4]	; (80085cc <DMA1_Channel4_IRQHandler+0x8>)
 80085c6:	f7fd ba09 	b.w	80059dc <HAL_DMA_IRQHandler>
 80085ca:	bf00      	nop
 80085cc:	20000648 	.word	0x20000648

080085d0 <DMA1_Channel5_IRQHandler>:
void DMA1_Channel5_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */

  /* USER CODE END DMA1_Channel5_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_rx);
 80085d0:	4801      	ldr	r0, [pc, #4]	; (80085d8 <DMA1_Channel5_IRQHandler+0x8>)
 80085d2:	f7fd ba03 	b.w	80059dc <HAL_DMA_IRQHandler>
 80085d6:	bf00      	nop
 80085d8:	200006bc 	.word	0x200006bc

080085dc <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 80085dc:	4801      	ldr	r0, [pc, #4]	; (80085e4 <USART1_IRQHandler+0x8>)
 80085de:	f7fe bc45 	b.w	8006e6c <HAL_UART_IRQHandler>
 80085e2:	bf00      	nop
 80085e4:	20000700 	.word	0x20000700

080085e8 <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 80085e8:	4801      	ldr	r0, [pc, #4]	; (80085f0 <TIM6_IRQHandler+0x8>)
 80085ea:	f7fe b88d 	b.w	8006708 <HAL_TIM_IRQHandler>
 80085ee:	bf00      	nop
 80085f0:	20000784 	.word	0x20000784

080085f4 <_read>:
	_kill(status, -1);
	while (1) {}		/* Make sure we hang here */
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 80085f4:	b570      	push	{r4, r5, r6, lr}
 80085f6:	460e      	mov	r6, r1
 80085f8:	4615      	mov	r5, r2
	int DataIdx;

	for (DataIdx = 0; DataIdx < len; DataIdx++)
 80085fa:	460c      	mov	r4, r1
 80085fc:	1ba3      	subs	r3, r4, r6
 80085fe:	429d      	cmp	r5, r3
 8008600:	dc01      	bgt.n	8008606 <_read+0x12>
	{
		*ptr++ = __io_getchar();
	}

return len;
}
 8008602:	4628      	mov	r0, r5
 8008604:	bd70      	pop	{r4, r5, r6, pc}
		*ptr++ = __io_getchar();
 8008606:	f3af 8000 	nop.w
 800860a:	f804 0b01 	strb.w	r0, [r4], #1
 800860e:	e7f5      	b.n	80085fc <_read+0x8>

08008610 <_sbrk>:
	}
	return len;
}

caddr_t _sbrk(int incr)
{
 8008610:	b508      	push	{r3, lr}
	extern char end asm("end");
	static char *heap_end;
	char *prev_heap_end;

	if (heap_end == 0)
 8008612:	4b0a      	ldr	r3, [pc, #40]	; (800863c <_sbrk+0x2c>)
{
 8008614:	4602      	mov	r2, r0
	if (heap_end == 0)
 8008616:	6819      	ldr	r1, [r3, #0]
 8008618:	b909      	cbnz	r1, 800861e <_sbrk+0xe>
		heap_end = &end;
 800861a:	4909      	ldr	r1, [pc, #36]	; (8008640 <_sbrk+0x30>)
 800861c:	6019      	str	r1, [r3, #0]

	prev_heap_end = heap_end;
	if (heap_end + incr > stack_ptr)
 800861e:	4669      	mov	r1, sp
	prev_heap_end = heap_end;
 8008620:	6818      	ldr	r0, [r3, #0]
	if (heap_end + incr > stack_ptr)
 8008622:	4402      	add	r2, r0
 8008624:	428a      	cmp	r2, r1
 8008626:	d906      	bls.n	8008636 <_sbrk+0x26>
	{
//		write(1, "Heap and stack collision\n", 25);
//		abort();
		errno = ENOMEM;
 8008628:	f000 fe50 	bl	80092cc <__errno>
 800862c:	230c      	movs	r3, #12
 800862e:	6003      	str	r3, [r0, #0]
		return (caddr_t) -1;
 8008630:	f04f 30ff 	mov.w	r0, #4294967295
 8008634:	bd08      	pop	{r3, pc}
	}

	heap_end += incr;
 8008636:	601a      	str	r2, [r3, #0]

	return (caddr_t) prev_heap_end;
}
 8008638:	bd08      	pop	{r3, pc}
 800863a:	bf00      	nop
 800863c:	20000460 	.word	0x20000460
 8008640:	200017e4 	.word	0x200017e4

08008644 <_close>:

int _close(int file)
{
	return -1;
}
 8008644:	f04f 30ff 	mov.w	r0, #4294967295
 8008648:	4770      	bx	lr

0800864a <_fstat>:


int _fstat(int file, struct stat *st)
{
	st->st_mode = S_IFCHR;
 800864a:	f44f 5300 	mov.w	r3, #8192	; 0x2000
	return 0;
}
 800864e:	2000      	movs	r0, #0
	st->st_mode = S_IFCHR;
 8008650:	604b      	str	r3, [r1, #4]
}
 8008652:	4770      	bx	lr

08008654 <_isatty>:

int _isatty(int file)
{
	return 1;
}
 8008654:	2001      	movs	r0, #1
 8008656:	4770      	bx	lr

08008658 <_lseek>:

int _lseek(int file, int ptr, int dir)
{
	return 0;
}
 8008658:	2000      	movs	r0, #0
 800865a:	4770      	bx	lr

0800865c <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 800865c:	4b0e      	ldr	r3, [pc, #56]	; (8008698 <SystemInit+0x3c>)
 800865e:	681a      	ldr	r2, [r3, #0]
 8008660:	f042 0201 	orr.w	r2, r2, #1
 8008664:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8008666:	6859      	ldr	r1, [r3, #4]
 8008668:	4a0c      	ldr	r2, [pc, #48]	; (800869c <SystemInit+0x40>)
 800866a:	400a      	ands	r2, r1
 800866c:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 800866e:	681a      	ldr	r2, [r3, #0]
 8008670:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8008674:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8008678:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 800867a:	681a      	ldr	r2, [r3, #0]
 800867c:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8008680:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 8008682:	685a      	ldr	r2, [r3, #4]
 8008684:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8008688:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 800868a:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 800868e:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 8008690:	4a03      	ldr	r2, [pc, #12]	; (80086a0 <SystemInit+0x44>)
 8008692:	4b04      	ldr	r3, [pc, #16]	; (80086a4 <SystemInit+0x48>)
 8008694:	609a      	str	r2, [r3, #8]
 8008696:	4770      	bx	lr
 8008698:	40021000 	.word	0x40021000
 800869c:	f8ff0000 	.word	0xf8ff0000
 80086a0:	08004000 	.word	0x08004000
 80086a4:	e000ed00 	.word	0xe000ed00

080086a8 <InitUartQueue>:
UARTQUEUE WifiQueue;
uart_hal_tx_type uart_hal_tx;

void InitUartQueue(pUARTQUEUE pQueue)
{
  setbuf(stdout, NULL);
 80086a8:	4b0b      	ldr	r3, [pc, #44]	; (80086d8 <InitUartQueue+0x30>)
{
 80086aa:	b510      	push	{r4, lr}
  setbuf(stdout, NULL);
 80086ac:	681b      	ldr	r3, [r3, #0]
{
 80086ae:	4604      	mov	r4, r0
  setbuf(stdout, NULL);
 80086b0:	2100      	movs	r1, #0
 80086b2:	6898      	ldr	r0, [r3, #8]
 80086b4:	f001 fb24 	bl	8009d00 <setbuf>
  pQueue->data = pQueue->head = pQueue->tail = 0;
 80086b8:	2300      	movs	r3, #0
  uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
 80086ba:	4a08      	ldr	r2, [pc, #32]	; (80086dc <InitUartQueue+0x34>)
  pQueue->data = pQueue->head = pQueue->tail = 0;
 80086bc:	6063      	str	r3, [r4, #4]
 80086be:	6023      	str	r3, [r4, #0]
 80086c0:	60a3      	str	r3, [r4, #8]
  if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
 80086c2:	4907      	ldr	r1, [pc, #28]	; (80086e0 <InitUartQueue+0x38>)
  uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
 80086c4:	f8a2 3400 	strh.w	r3, [r2, #1024]	; 0x400
  if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
 80086c8:	4806      	ldr	r0, [pc, #24]	; (80086e4 <InitUartQueue+0x3c>)
  uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
 80086ca:	f8a2 3402 	strh.w	r3, [r2, #1026]	; 0x402
  {
    //_Error_Handler(__FILE__, __LINE__);
  }
  //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
  //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
}
 80086ce:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
  if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
 80086d2:	2201      	movs	r2, #1
 80086d4:	f7fe badc 	b.w	8006c90 <HAL_UART_Receive_DMA>
 80086d8:	2000024c 	.word	0x2000024c
 80086dc:	20000fd0 	.word	0x20000fd0
 80086e0:	20000bd0 	.word	0x20000bd0
 80086e4:	20000700 	.word	0x20000700

080086e8 <GetDataFromUartQueue>:
    pUARTQUEUE pQueue = &TerminalQueue;
//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
//    {
//       _Error_Handler(__FILE__, __LINE__);
//    }
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 80086e8:	4a14      	ldr	r2, [pc, #80]	; (800873c <GetDataFromUartQueue+0x54>)
{
 80086ea:	b538      	push	{r3, r4, r5, lr}
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 80086ec:	6810      	ldr	r0, [r2, #0]
 80086ee:	1c43      	adds	r3, r0, #1
 80086f0:	6013      	str	r3, [r2, #0]
 80086f2:	4b13      	ldr	r3, [pc, #76]	; (8008740 <GetDataFromUartQueue+0x58>)
 80086f4:	6859      	ldr	r1, [r3, #4]
 80086f6:	f103 040c 	add.w	r4, r3, #12
 80086fa:	5d0d      	ldrb	r5, [r1, r4]
 80086fc:	4c11      	ldr	r4, [pc, #68]	; (8008744 <GetDataFromUartQueue+0x5c>)
#ifdef DEBUG_PRINT
    printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ;
#endif /* DEBUG_PRINT */

    pQueue->tail++;
 80086fe:	3101      	adds	r1, #1
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 8008700:	f5b1 6f80 	cmp.w	r1, #1024	; 0x400
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 8008704:	5425      	strb	r5, [r4, r0]
 8008706:	4614      	mov	r4, r2
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 8008708:	bfa8      	it	ge
 800870a:	2200      	movge	r2, #0
    pQueue->data--;
 800870c:	689d      	ldr	r5, [r3, #8]
    pQueue->tail++;
 800870e:	bfb8      	it	lt
 8008710:	6059      	strlt	r1, [r3, #4]
    pQueue->data--;
 8008712:	f105 35ff 	add.w	r5, r5, #4294967295
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 8008716:	bfa8      	it	ge
 8008718:	605a      	strge	r2, [r3, #4]
    pQueue->data--;
 800871a:	609d      	str	r5, [r3, #8]
    
    if(pQueue->data == 0){
 800871c:	b96d      	cbnz	r5, 800873a <GetDataFromUartQueue+0x52>
//        printf("data cnt zero !!!  \r\n");
        RF_Ctrl_Main(&uart_buf[Header]);
 800871e:	4809      	ldr	r0, [pc, #36]	; (8008744 <GetDataFromUartQueue+0x5c>)
 8008720:	f000 fd60 	bl	80091e4 <RF_Ctrl_Main>
#if 0 // PYJ.2019.07.15_BEGIN -- 
            for(int i = 0; i < cnt; i++){
                printf("%02x ",uart_buf[i]);
            }
#endif // PYJ.2019.07.15_END -- 
        memset(uart_buf,0x00,cnt);
 8008724:	6822      	ldr	r2, [r4, #0]
 8008726:	4629      	mov	r1, r5
 8008728:	4806      	ldr	r0, [pc, #24]	; (8008744 <GetDataFromUartQueue+0x5c>)
 800872a:	f000 fe04 	bl	8009336 <memset>
        
//        for(int i  = 0; i < cnt; i++)
//            uart_buf[i] = 0;
        cnt = 0;
 800872e:	6025      	str	r5, [r4, #0]
        
        HAL_Delay(1);
 8008730:	2001      	movs	r0, #1
    }

}
 8008732:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
        HAL_Delay(1);
 8008736:	f7fc bd51 	b.w	80051dc <HAL_Delay>
 800873a:	bd38      	pop	{r3, r4, r5, pc}
 800873c:	20000464 	.word	0x20000464
 8008740:	20000bc4 	.word	0x20000bc4
 8008744:	200007c4 	.word	0x200007c4

08008748 <HAL_UART_RxCpltCallback>:
    AdcTimerCnt = UartRxTimerCnt = 0;
 8008748:	2300      	movs	r3, #0
 800874a:	4a0f      	ldr	r2, [pc, #60]	; (8008788 <HAL_UART_RxCpltCallback+0x40>)
{
 800874c:	b510      	push	{r4, lr}
    AdcTimerCnt = UartRxTimerCnt = 0;
 800874e:	6013      	str	r3, [r2, #0]
    pQueue->head++;
 8008750:	4c0e      	ldr	r4, [pc, #56]	; (800878c <HAL_UART_RxCpltCallback+0x44>)
    AdcTimerCnt = UartRxTimerCnt = 0;
 8008752:	4a0f      	ldr	r2, [pc, #60]	; (8008790 <HAL_UART_RxCpltCallback+0x48>)
 8008754:	6013      	str	r3, [r2, #0]
    pQueue->head++;
 8008756:	6822      	ldr	r2, [r4, #0]
 8008758:	3201      	adds	r2, #1
 800875a:	f5b2 6f80 	cmp.w	r2, #1024	; 0x400
 800875e:	bfb8      	it	lt
 8008760:	4613      	movlt	r3, r2
 8008762:	6023      	str	r3, [r4, #0]
    pQueue->data++;
 8008764:	68a3      	ldr	r3, [r4, #8]
 8008766:	3301      	adds	r3, #1
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 8008768:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
    pQueue->data++;
 800876c:	60a3      	str	r3, [r4, #8]
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 800876e:	db01      	blt.n	8008774 <HAL_UART_RxCpltCallback+0x2c>
        GetDataFromUartQueue(huart);
 8008770:	f7ff ffba 	bl	80086e8 <GetDataFromUartQueue>
    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
 8008774:	6823      	ldr	r3, [r4, #0]
 8008776:	4907      	ldr	r1, [pc, #28]	; (8008794 <HAL_UART_RxCpltCallback+0x4c>)
 8008778:	2201      	movs	r2, #1
}
 800877a:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
 800877e:	4419      	add	r1, r3
 8008780:	4805      	ldr	r0, [pc, #20]	; (8008798 <HAL_UART_RxCpltCallback+0x50>)
 8008782:	f7fe ba85 	b.w	8006c90 <HAL_UART_Receive_DMA>
 8008786:	bf00      	nop
 8008788:	2000045c 	.word	0x2000045c
 800878c:	20000bc4 	.word	0x20000bc4
 8008790:	20000450 	.word	0x20000450
 8008794:	20000bd0 	.word	0x20000bd0
 8008798:	20000700 	.word	0x20000700

0800879c <RF_Data_Check>:
    PATH_EN_2_1G_UL_GPIO_Port,
    PATH_EN_2_1G_UL_Pin,    
};


bool RF_Data_Check(uint8_t* data_buf){
 800879c:	b508      	push	{r3, lr}
    bool ret = false;
    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
 800879e:	78c3      	ldrb	r3, [r0, #3]
 80087a0:	7881      	ldrb	r1, [r0, #2]
 80087a2:	5cc2      	ldrb	r2, [r0, r3]
 80087a4:	3001      	adds	r0, #1
 80087a6:	f7fe fd9c 	bl	80072e2 <STH30_CheckCrc>
//        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
    }
//    printf("CRC Result : \"%d\"   \r\n",ret);
    return ret;

}
 80087aa:	3000      	adds	r0, #0
 80087ac:	bf18      	it	ne
 80087ae:	2001      	movne	r0, #1
 80087b0:	bd08      	pop	{r3, pc}
	...

080087b4 <RF_Status_Get>:
       PLL_EN_3_5G_L_GPIO_Port,    
       PLL_EN_3_5G_L_Pin,
 };
void RF_Status_Get(void){
//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
 80087b4:	23be      	movs	r3, #190	; 0xbe
void RF_Status_Get(void){
 80087b6:	b510      	push	{r4, lr}
    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
 80087b8:	4c0b      	ldr	r4, [pc, #44]	; (80087e8 <RF_Status_Get+0x34>)
    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
 80087ba:	2160      	movs	r1, #96	; 0x60
    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
 80087bc:	7023      	strb	r3, [r4, #0]
    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
 80087be:	2302      	movs	r3, #2
 80087c0:	7063      	strb	r3, [r4, #1]
    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
 80087c2:	2361      	movs	r3, #97	; 0x61
    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
 80087c4:	1c60      	adds	r0, r4, #1
    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
 80087c6:	70a1      	strb	r1, [r4, #2]
    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
 80087c8:	70e3      	strb	r3, [r4, #3]
    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
 80087ca:	f7fe fd6f 	bl	80072ac <STH30_CreateCrc>
    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
 80087ce:	23eb      	movs	r3, #235	; 0xeb
    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
 80087d0:	f884 0061 	strb.w	r0, [r4, #97]	; 0x61
    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
 80087d4:	f884 3062 	strb.w	r3, [r4, #98]	; 0x62
    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
 80087d8:	4621      	mov	r1, r4
//    printf("\r\nYJ : %x",ADCvalue[0]);
//    printf("\r\n");

}
 80087da:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
 80087de:	2263      	movs	r2, #99	; 0x63
 80087e0:	4802      	ldr	r0, [pc, #8]	; (80087ec <RF_Status_Get+0x38>)
 80087e2:	f7fe ba1b 	b.w	8006c1c <HAL_UART_Transmit_DMA>
 80087e6:	bf00      	nop
 80087e8:	200005e3 	.word	0x200005e3
 80087ec:	20000700 	.word	0x20000700

080087f0 <RF_Status_Ack>:
static uint8_t Ack_Buf[6];
void RF_Status_Ack(void){
//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
 80087f0:	23be      	movs	r3, #190	; 0xbe
void RF_Status_Ack(void){
 80087f2:	b510      	push	{r4, lr}
    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
 80087f4:	4c0a      	ldr	r4, [pc, #40]	; (8008820 <RF_Status_Ack+0x30>)
    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
    Ack_Buf[INDEX_BLUE_LENGTH]       = 3;
 80087f6:	2103      	movs	r1, #3
    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
 80087f8:	7023      	strb	r3, [r4, #0]
    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
 80087fa:	2304      	movs	r3, #4
    Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1;
    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
 80087fc:	1c60      	adds	r0, r4, #1
    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
 80087fe:	7063      	strb	r3, [r4, #1]
    Ack_Buf[INDEX_BLUE_LENGTH]       = 3;
 8008800:	70a1      	strb	r1, [r4, #2]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1;
 8008802:	70e3      	strb	r3, [r4, #3]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
 8008804:	f7fe fd52 	bl	80072ac <STH30_CreateCrc>
    Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER;
 8008808:	23eb      	movs	r3, #235	; 0xeb
    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
 800880a:	78a2      	ldrb	r2, [r4, #2]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
 800880c:	7120      	strb	r0, [r4, #4]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER;
 800880e:	7163      	strb	r3, [r4, #5]
    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
 8008810:	4621      	mov	r1, r4
//    printf("\r\nYJ : %x",ADCvalue[0]);
//    printf("\r\n");

}
 8008812:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
 8008816:	3203      	adds	r2, #3
 8008818:	4802      	ldr	r0, [pc, #8]	; (8008824 <RF_Status_Ack+0x34>)
 800881a:	f7fe b9ff 	b.w	8006c1c <HAL_UART_Transmit_DMA>
 800881e:	bf00      	nop
 8008820:	20000468 	.word	0x20000468
 8008824:	20000700 	.word	0x20000700

08008828 <RF_Operate>:

void RF_Operate(uint8_t* data_buf){
 8008828:	b5f0      	push	{r4, r5, r6, r7, lr}
    uint32_t temp_val = 0;
    uint8_t  ADC_Modify = 0;
    ADF4153_R_N_Reg_st temp_reg;
//    printf("Prev_data[INDEX_ATT_1_8G_DL1]  : %x  data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]);
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 800882a:	4db5      	ldr	r5, [pc, #724]	; (8008b00 <RF_Operate+0x2d8>)
 800882c:	7902      	ldrb	r2, [r0, #4]
 800882e:	792b      	ldrb	r3, [r5, #4]
void RF_Operate(uint8_t* data_buf){
 8008830:	b0a9      	sub	sp, #164	; 0xa4
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 8008832:	4293      	cmp	r3, r2
void RF_Operate(uint8_t* data_buf){
 8008834:	4604      	mov	r4, r0
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 8008836:	d00c      	beq.n	8008852 <RF_Operate+0x2a>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
 8008838:	4bb2      	ldr	r3, [pc, #712]	; (8008b04 <RF_Operate+0x2dc>)
 800883a:	9202      	str	r2, [sp, #8]
 800883c:	f103 0210 	add.w	r2, r3, #16
 8008840:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008844:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008848:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800884a:	f7fe fc37 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
 800884e:	7923      	ldrb	r3, [r4, #4]
 8008850:	712b      	strb	r3, [r5, #4]
    }
    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
 8008852:	7962      	ldrb	r2, [r4, #5]
 8008854:	796b      	ldrb	r3, [r5, #5]
 8008856:	4293      	cmp	r3, r2
 8008858:	d00c      	beq.n	8008874 <RF_Operate+0x4c>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
 800885a:	4bab      	ldr	r3, [pc, #684]	; (8008b08 <RF_Operate+0x2e0>)
 800885c:	9202      	str	r2, [sp, #8]
 800885e:	f103 0210 	add.w	r2, r3, #16
 8008862:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008866:	e88d 0003 	stmia.w	sp, {r0, r1}
 800886a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800886c:	f7fe fc26 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
 8008870:	7963      	ldrb	r3, [r4, #5]
 8008872:	716b      	strb	r3, [r5, #5]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
 8008874:	79a2      	ldrb	r2, [r4, #6]
 8008876:	79ab      	ldrb	r3, [r5, #6]
 8008878:	4293      	cmp	r3, r2
 800887a:	d00c      	beq.n	8008896 <RF_Operate+0x6e>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
 800887c:	4ba3      	ldr	r3, [pc, #652]	; (8008b0c <RF_Operate+0x2e4>)
 800887e:	9202      	str	r2, [sp, #8]
 8008880:	f103 0210 	add.w	r2, r3, #16
 8008884:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008888:	e88d 0003 	stmia.w	sp, {r0, r1}
 800888c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800888e:	f7fe fc15 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
 8008892:	79a3      	ldrb	r3, [r4, #6]
 8008894:	71ab      	strb	r3, [r5, #6]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
 8008896:	79e2      	ldrb	r2, [r4, #7]
 8008898:	79eb      	ldrb	r3, [r5, #7]
 800889a:	4293      	cmp	r3, r2
 800889c:	d00c      	beq.n	80088b8 <RF_Operate+0x90>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
 800889e:	4b9c      	ldr	r3, [pc, #624]	; (8008b10 <RF_Operate+0x2e8>)
 80088a0:	9202      	str	r2, [sp, #8]
 80088a2:	f103 0210 	add.w	r2, r3, #16
 80088a6:	e892 0003 	ldmia.w	r2, {r0, r1}
 80088aa:	e88d 0003 	stmia.w	sp, {r0, r1}
 80088ae:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80088b0:	f7fe fc04 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
 80088b4:	79e3      	ldrb	r3, [r4, #7]
 80088b6:	71eb      	strb	r3, [r5, #7]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
 80088b8:	7a22      	ldrb	r2, [r4, #8]
 80088ba:	7a2b      	ldrb	r3, [r5, #8]
 80088bc:	4293      	cmp	r3, r2
 80088be:	d00c      	beq.n	80088da <RF_Operate+0xb2>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
 80088c0:	4b94      	ldr	r3, [pc, #592]	; (8008b14 <RF_Operate+0x2ec>)
 80088c2:	9202      	str	r2, [sp, #8]
 80088c4:	f103 0210 	add.w	r2, r3, #16
 80088c8:	e892 0003 	ldmia.w	r2, {r0, r1}
 80088cc:	e88d 0003 	stmia.w	sp, {r0, r1}
 80088d0:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80088d2:	f7fe fbf3 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
 80088d6:	7a23      	ldrb	r3, [r4, #8]
 80088d8:	722b      	strb	r3, [r5, #8]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
 80088da:	7a62      	ldrb	r2, [r4, #9]
 80088dc:	7a6b      	ldrb	r3, [r5, #9]
 80088de:	4293      	cmp	r3, r2
 80088e0:	d00c      	beq.n	80088fc <RF_Operate+0xd4>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
 80088e2:	4b8d      	ldr	r3, [pc, #564]	; (8008b18 <RF_Operate+0x2f0>)
 80088e4:	9202      	str	r2, [sp, #8]
 80088e6:	f103 0210 	add.w	r2, r3, #16
 80088ea:	e892 0003 	ldmia.w	r2, {r0, r1}
 80088ee:	e88d 0003 	stmia.w	sp, {r0, r1}
 80088f2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80088f4:	f7fe fbe2 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
 80088f8:	7a63      	ldrb	r3, [r4, #9]
 80088fa:	726b      	strb	r3, [r5, #9]
    }
    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
 80088fc:	7aa2      	ldrb	r2, [r4, #10]
 80088fe:	7aab      	ldrb	r3, [r5, #10]
 8008900:	4293      	cmp	r3, r2
 8008902:	d00c      	beq.n	800891e <RF_Operate+0xf6>
        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
 8008904:	4b85      	ldr	r3, [pc, #532]	; (8008b1c <RF_Operate+0x2f4>)
 8008906:	9202      	str	r2, [sp, #8]
 8008908:	f103 0210 	add.w	r2, r3, #16
 800890c:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008910:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008914:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008916:	f7fe fbd1 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
 800891a:	7aa3      	ldrb	r3, [r4, #10]
 800891c:	72ab      	strb	r3, [r5, #10]

    }
    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
 800891e:	7ae2      	ldrb	r2, [r4, #11]
 8008920:	7aeb      	ldrb	r3, [r5, #11]
 8008922:	4293      	cmp	r3, r2
 8008924:	d00c      	beq.n	8008940 <RF_Operate+0x118>
        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
 8008926:	4b7e      	ldr	r3, [pc, #504]	; (8008b20 <RF_Operate+0x2f8>)
 8008928:	9202      	str	r2, [sp, #8]
 800892a:	f103 0210 	add.w	r2, r3, #16
 800892e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008932:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008936:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008938:	f7fe fbc0 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
 800893c:	7ae3      	ldrb	r3, [r4, #11]
 800893e:	72eb      	strb	r3, [r5, #11]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
 8008940:	7b22      	ldrb	r2, [r4, #12]
 8008942:	7b2b      	ldrb	r3, [r5, #12]
 8008944:	4293      	cmp	r3, r2
 8008946:	d00c      	beq.n	8008962 <RF_Operate+0x13a>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
 8008948:	4b76      	ldr	r3, [pc, #472]	; (8008b24 <RF_Operate+0x2fc>)
 800894a:	9202      	str	r2, [sp, #8]
 800894c:	f103 0210 	add.w	r2, r3, #16
 8008950:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008954:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008958:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800895a:	f7fe fbaf 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
 800895e:	7b23      	ldrb	r3, [r4, #12]
 8008960:	732b      	strb	r3, [r5, #12]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
 8008962:	7b62      	ldrb	r2, [r4, #13]
 8008964:	7b6b      	ldrb	r3, [r5, #13]
 8008966:	4293      	cmp	r3, r2
 8008968:	d00c      	beq.n	8008984 <RF_Operate+0x15c>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
 800896a:	4b6f      	ldr	r3, [pc, #444]	; (8008b28 <RF_Operate+0x300>)
 800896c:	9202      	str	r2, [sp, #8]
 800896e:	f103 0210 	add.w	r2, r3, #16
 8008972:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008976:	e88d 0003 	stmia.w	sp, {r0, r1}
 800897a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800897c:	f7fe fb9e 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
 8008980:	7b63      	ldrb	r3, [r4, #13]
 8008982:	736b      	strb	r3, [r5, #13]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
 8008984:	7ba2      	ldrb	r2, [r4, #14]
 8008986:	7bab      	ldrb	r3, [r5, #14]
 8008988:	4293      	cmp	r3, r2
 800898a:	d00c      	beq.n	80089a6 <RF_Operate+0x17e>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
 800898c:	4b67      	ldr	r3, [pc, #412]	; (8008b2c <RF_Operate+0x304>)
 800898e:	9202      	str	r2, [sp, #8]
 8008990:	f103 0210 	add.w	r2, r3, #16
 8008994:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008998:	e88d 0003 	stmia.w	sp, {r0, r1}
 800899c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800899e:	f7fe fb8d 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
 80089a2:	7ba3      	ldrb	r3, [r4, #14]
 80089a4:	73ab      	strb	r3, [r5, #14]
    }
    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
 80089a6:	7be2      	ldrb	r2, [r4, #15]
 80089a8:	7beb      	ldrb	r3, [r5, #15]
 80089aa:	4293      	cmp	r3, r2
 80089ac:	d00c      	beq.n	80089c8 <RF_Operate+0x1a0>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
 80089ae:	4b60      	ldr	r3, [pc, #384]	; (8008b30 <RF_Operate+0x308>)
 80089b0:	9202      	str	r2, [sp, #8]
 80089b2:	f103 0210 	add.w	r2, r3, #16
 80089b6:	e892 0003 	ldmia.w	r2, {r0, r1}
 80089ba:	e88d 0003 	stmia.w	sp, {r0, r1}
 80089be:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80089c0:	f7fe fb7c 	bl	80070bc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
 80089c4:	7be3      	ldrb	r3, [r4, #15]
 80089c6:	73eb      	strb	r3, [r5, #15]
    }
    if(   (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1])
 80089c8:	7c23      	ldrb	r3, [r4, #16]
 80089ca:	7c2a      	ldrb	r2, [r5, #16]
 80089cc:	429a      	cmp	r2, r3
 80089ce:	d113      	bne.n	80089f8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1])
 80089d0:	7c69      	ldrb	r1, [r5, #17]
 80089d2:	7c62      	ldrb	r2, [r4, #17]
 80089d4:	4291      	cmp	r1, r2
 80089d6:	d10f      	bne.n	80089f8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
 80089d8:	7ca9      	ldrb	r1, [r5, #18]
 80089da:	7ca2      	ldrb	r2, [r4, #18]
 80089dc:	4291      	cmp	r1, r2
 80089de:	d10b      	bne.n	80089f8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2])
 80089e0:	7ce9      	ldrb	r1, [r5, #19]
 80089e2:	7ce2      	ldrb	r2, [r4, #19]
 80089e4:	4291      	cmp	r1, r2
 80089e6:	d107      	bne.n	80089f8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2])
 80089e8:	7d29      	ldrb	r1, [r5, #20]
 80089ea:	7d22      	ldrb	r2, [r4, #20]
 80089ec:	4291      	cmp	r1, r2
 80089ee:	d103      	bne.n	80089f8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
 80089f0:	7d69      	ldrb	r1, [r5, #21]
 80089f2:	7d62      	ldrb	r2, [r4, #21]
 80089f4:	4291      	cmp	r1, r2
 80089f6:	d020      	beq.n	8008a3a <RF_Operate+0x212>
    ){
        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1]  = data_buf[INDEX_ATT_3_5G_LOW1];
 80089f8:	4e4e      	ldr	r6, [pc, #312]	; (8008b34 <RF_Operate+0x30c>)
 80089fa:	742b      	strb	r3, [r5, #16]
 80089fc:	7633      	strb	r3, [r6, #24]
        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
 80089fe:	7c63      	ldrb	r3, [r4, #17]
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008a00:	2298      	movs	r2, #152	; 0x98
        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
 8008a02:	746b      	strb	r3, [r5, #17]
 8008a04:	f886 3034 	strb.w	r3, [r6, #52]	; 0x34
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
 8008a08:	7ca3      	ldrb	r3, [r4, #18]
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008a0a:	f106 0110 	add.w	r1, r6, #16
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
 8008a0e:	74ab      	strb	r3, [r5, #18]
 8008a10:	f886 3050 	strb.w	r3, [r6, #80]	; 0x50
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
 8008a14:	7ce3      	ldrb	r3, [r4, #19]
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008a16:	4668      	mov	r0, sp
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
 8008a18:	74eb      	strb	r3, [r5, #19]
 8008a1a:	f886 306c 	strb.w	r3, [r6, #108]	; 0x6c
        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
 8008a1e:	7d23      	ldrb	r3, [r4, #20]
 8008a20:	752b      	strb	r3, [r5, #20]
 8008a22:	f886 3088 	strb.w	r3, [r6, #136]	; 0x88
        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
 8008a26:	7d63      	ldrb	r3, [r4, #21]
 8008a28:	756b      	strb	r3, [r5, #21]
 8008a2a:	f886 30a4 	strb.w	r3, [r6, #164]	; 0xa4
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008a2e:	f000 fc77 	bl	8009320 <memcpy>
 8008a32:	e896 000f 	ldmia.w	r6, {r0, r1, r2, r3}
 8008a36:	f7fe fc83 	bl	8007340 <PE43711_ALL_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
 8008a3a:	7da3      	ldrb	r3, [r4, #22]
 8008a3c:	7daa      	ldrb	r2, [r5, #22]
 8008a3e:	429a      	cmp	r2, r3
 8008a40:	d103      	bne.n	8008a4a <RF_Operate+0x222>
        || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
 8008a42:	7de9      	ldrb	r1, [r5, #23]
 8008a44:	7de2      	ldrb	r2, [r4, #23]
 8008a46:	4291      	cmp	r1, r2
 8008a48:	d035      	beq.n	8008ab6 <RF_Operate+0x28e>
    ){
        Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H];
 8008a4a:	75ab      	strb	r3, [r5, #22]
        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
 8008a4c:	7de3      	ldrb	r3, [r4, #23]
 8008a4e:	75eb      	strb	r3, [r5, #23]
//        printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]);
//        printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]);
        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
 8008a50:	7da0      	ldrb	r0, [r4, #22]
 8008a52:	7de3      	ldrb	r3, [r4, #23]
 8008a54:	ea43 2300 	orr.w	r3, r3, r0, lsl #8
        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
 8008a58:	4837      	ldr	r0, [pc, #220]	; (8008b38 <RF_Operate+0x310>)
 8008a5a:	4358      	muls	r0, r3
 8008a5c:	f7ff fbcc 	bl	80081f8 <halSynSetFreq>
 8008a60:	4a36      	ldr	r2, [pc, #216]	; (8008b3c <RF_Operate+0x314>)
 8008a62:	4b37      	ldr	r3, [pc, #220]	; (8008b40 <RF_Operate+0x318>)
 8008a64:	9204      	str	r2, [sp, #16]
 8008a66:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008a6a:	9003      	str	r0, [sp, #12]
 8008a6c:	9202      	str	r2, [sp, #8]
 8008a6e:	f103 0210 	add.w	r2, r3, #16
 8008a72:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008a76:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008a7a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008a7c:	f7ff fbd0 	bl	8008220 <ADF4113_Module_Ctrl>
//        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092);
        HAL_Delay(1);
 8008a80:	2001      	movs	r0, #1
 8008a82:	f7fc fbab 	bl	80051dc <HAL_Delay>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
 8008a86:	7922      	ldrb	r2, [r4, #4]
 8008a88:	4b1e      	ldr	r3, [pc, #120]	; (8008b04 <RF_Operate+0x2dc>)
 8008a8a:	9202      	str	r2, [sp, #8]
 8008a8c:	f103 0210 	add.w	r2, r3, #16
 8008a90:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008a94:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008a98:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008a9a:	f7fe fb0f 	bl	80070bc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
 8008a9e:	4b1a      	ldr	r3, [pc, #104]	; (8008b08 <RF_Operate+0x2e0>)
 8008aa0:	7962      	ldrb	r2, [r4, #5]
 8008aa2:	9202      	str	r2, [sp, #8]
 8008aa4:	f103 0210 	add.w	r2, r3, #16
 8008aa8:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008aac:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008ab0:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008ab2:	f7fe fb03 	bl	80070bc <BDA4601_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
 8008ab6:	7e23      	ldrb	r3, [r4, #24]
 8008ab8:	7e2a      	ldrb	r2, [r5, #24]
 8008aba:	7e60      	ldrb	r0, [r4, #25]
 8008abc:	429a      	cmp	r2, r3
 8008abe:	d102      	bne.n	8008ac6 <RF_Operate+0x29e>
        || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
 8008ac0:	7e6a      	ldrb	r2, [r5, #25]
 8008ac2:	4282      	cmp	r2, r0
 8008ac4:	d070      	beq.n	8008ba8 <RF_Operate+0x380>
        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
//        printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]);
//        printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]);
        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
 8008ac6:	762b      	strb	r3, [r5, #24]
        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
 8008ac8:	7668      	strb	r0, [r5, #25]
        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
 8008aca:	ea40 2003 	orr.w	r0, r0, r3, lsl #8
//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
 8008ace:	4b1a      	ldr	r3, [pc, #104]	; (8008b38 <RF_Operate+0x310>)
 8008ad0:	4358      	muls	r0, r3
 8008ad2:	f7ff fb91 	bl	80081f8 <halSynSetFreq>
 8008ad6:	4a19      	ldr	r2, [pc, #100]	; (8008b3c <RF_Operate+0x314>)
 8008ad8:	4b1a      	ldr	r3, [pc, #104]	; (8008b44 <RF_Operate+0x31c>)
 8008ada:	9204      	str	r2, [sp, #16]
 8008adc:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008ae0:	9003      	str	r0, [sp, #12]
 8008ae2:	9202      	str	r2, [sp, #8]
 8008ae4:	f103 0210 	add.w	r2, r3, #16
 8008ae8:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008aec:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008af0:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008af2:	f7ff fb95 	bl	8008220 <ADF4113_Module_Ctrl>
//        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092);

        HAL_Delay(1);
 8008af6:	2001      	movs	r0, #1
 8008af8:	f7fc fb70 	bl	80051dc <HAL_Delay>
 8008afc:	e024      	b.n	8008b48 <RF_Operate+0x320>
 8008afe:	bf00      	nop
 8008b00:	200005e3 	.word	0x200005e3
 8008b04:	20000008 	.word	0x20000008
 8008b08:	20000020 	.word	0x20000020
 8008b0c:	20000038 	.word	0x20000038
 8008b10:	20000050 	.word	0x20000050
 8008b14:	20000068 	.word	0x20000068
 8008b18:	20000080 	.word	0x20000080
 8008b1c:	20000098 	.word	0x20000098
 8008b20:	200000b0 	.word	0x200000b0
 8008b24:	200000c8 	.word	0x200000c8
 8008b28:	200000e0 	.word	0x200000e0
 8008b2c:	200000f8 	.word	0x200000f8
 8008b30:	20000110 	.word	0x20000110
 8008b34:	200004d8 	.word	0x200004d8
 8008b38:	000186a0 	.word	0x000186a0
 8008b3c:	009f8092 	.word	0x009f8092
 8008b40:	200001b8 	.word	0x200001b8
 8008b44:	200001d0 	.word	0x200001d0
        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
 8008b48:	79a2      	ldrb	r2, [r4, #6]
 8008b4a:	4bc5      	ldr	r3, [pc, #788]	; (8008e60 <RF_Operate+0x638>)
 8008b4c:	9202      	str	r2, [sp, #8]
 8008b4e:	f103 0210 	add.w	r2, r3, #16
 8008b52:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008b56:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008b5a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008b5c:	f7fe faae 	bl	80070bc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
 8008b60:	79e2      	ldrb	r2, [r4, #7]
 8008b62:	4bc0      	ldr	r3, [pc, #768]	; (8008e64 <RF_Operate+0x63c>)
 8008b64:	9202      	str	r2, [sp, #8]
 8008b66:	f103 0210 	add.w	r2, r3, #16
 8008b6a:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008b6e:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008b72:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008b74:	f7fe faa2 	bl	80070bc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
 8008b78:	7a22      	ldrb	r2, [r4, #8]
 8008b7a:	4bbb      	ldr	r3, [pc, #748]	; (8008e68 <RF_Operate+0x640>)
 8008b7c:	9202      	str	r2, [sp, #8]
 8008b7e:	f103 0210 	add.w	r2, r3, #16
 8008b82:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008b86:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008b8a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008b8c:	f7fe fa96 	bl	80070bc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
 8008b90:	4bb6      	ldr	r3, [pc, #728]	; (8008e6c <RF_Operate+0x644>)
 8008b92:	7a62      	ldrb	r2, [r4, #9]
 8008b94:	9202      	str	r2, [sp, #8]
 8008b96:	f103 0210 	add.w	r2, r3, #16
 8008b9a:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008b9e:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008ba2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008ba4:	f7fe fa8a 	bl	80070bc <BDA4601_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
 8008ba8:	7ea3      	ldrb	r3, [r4, #26]
 8008baa:	7eaa      	ldrb	r2, [r5, #26]
 8008bac:	7ee0      	ldrb	r0, [r4, #27]
 8008bae:	429a      	cmp	r2, r3
 8008bb0:	d102      	bne.n	8008bb8 <RF_Operate+0x390>
        || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
 8008bb2:	7eea      	ldrb	r2, [r5, #27]
 8008bb4:	4282      	cmp	r2, r0
 8008bb6:	d032      	beq.n	8008c1e <RF_Operate+0x3f6>
        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
//        printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]);
//        printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]);
        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
 8008bb8:	76ab      	strb	r3, [r5, #26]
        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
 8008bba:	76e8      	strb	r0, [r5, #27]
        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
 8008bbc:	ea40 2003 	orr.w	r0, r0, r3, lsl #8
//         ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
 8008bc0:	4bab      	ldr	r3, [pc, #684]	; (8008e70 <RF_Operate+0x648>)
 8008bc2:	4358      	muls	r0, r3
 8008bc4:	f7ff fb18 	bl	80081f8 <halSynSetFreq>
 8008bc8:	4aaa      	ldr	r2, [pc, #680]	; (8008e74 <RF_Operate+0x64c>)
 8008bca:	4bab      	ldr	r3, [pc, #684]	; (8008e78 <RF_Operate+0x650>)
 8008bcc:	9204      	str	r2, [sp, #16]
 8008bce:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008bd2:	9003      	str	r0, [sp, #12]
 8008bd4:	9202      	str	r2, [sp, #8]
 8008bd6:	f103 0210 	add.w	r2, r3, #16
 8008bda:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008bde:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008be2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008be4:	f7ff fb1c 	bl	8008220 <ADF4113_Module_Ctrl>
//      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092);

      HAL_Delay(1);
 8008be8:	2001      	movs	r0, #1
 8008bea:	f7fc faf7 	bl	80051dc <HAL_Delay>
      BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
 8008bee:	7aa2      	ldrb	r2, [r4, #10]
 8008bf0:	4ba2      	ldr	r3, [pc, #648]	; (8008e7c <RF_Operate+0x654>)
 8008bf2:	9202      	str	r2, [sp, #8]
 8008bf4:	f103 0210 	add.w	r2, r3, #16
 8008bf8:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008bfc:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c00:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c02:	f7fe fa5b 	bl	80070bc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
 8008c06:	4b9e      	ldr	r3, [pc, #632]	; (8008e80 <RF_Operate+0x658>)
 8008c08:	7ae2      	ldrb	r2, [r4, #11]
 8008c0a:	9202      	str	r2, [sp, #8]
 8008c0c:	f103 0210 	add.w	r2, r3, #16
 8008c10:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c14:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c18:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c1a:	f7fe fa4f 	bl	80070bc <BDA4601_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
 8008c1e:	7f23      	ldrb	r3, [r4, #28]
 8008c20:	7f2a      	ldrb	r2, [r5, #28]
 8008c22:	429a      	cmp	r2, r3
 8008c24:	d103      	bne.n	8008c2e <RF_Operate+0x406>
        || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
 8008c26:	7f69      	ldrb	r1, [r5, #29]
 8008c28:	7f62      	ldrb	r2, [r4, #29]
 8008c2a:	4291      	cmp	r1, r2
 8008c2c:	d04d      	beq.n	8008cca <RF_Operate+0x4a2>
        Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H];
 8008c2e:	772b      	strb	r3, [r5, #28]
        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];    
 8008c30:	7f63      	ldrb	r3, [r4, #29]
 8008c32:	776b      	strb	r3, [r5, #29]
//        printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]);
//        printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]);
        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
 8008c34:	7f20      	ldrb	r0, [r4, #28]
 8008c36:	7f63      	ldrb	r3, [r4, #29]
 8008c38:	ea43 2300 	orr.w	r3, r3, r0, lsl #8
//        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
 8008c3c:	488c      	ldr	r0, [pc, #560]	; (8008e70 <RF_Operate+0x648>)
 8008c3e:	4358      	muls	r0, r3
 8008c40:	f7ff fada 	bl	80081f8 <halSynSetFreq>
 8008c44:	4a8b      	ldr	r2, [pc, #556]	; (8008e74 <RF_Operate+0x64c>)
 8008c46:	4b8f      	ldr	r3, [pc, #572]	; (8008e84 <RF_Operate+0x65c>)
 8008c48:	9204      	str	r2, [sp, #16]
 8008c4a:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008c4e:	9003      	str	r0, [sp, #12]
 8008c50:	9202      	str	r2, [sp, #8]
 8008c52:	f103 0210 	add.w	r2, r3, #16
 8008c56:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c5a:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c5e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c60:	f7ff fade 	bl	8008220 <ADF4113_Module_Ctrl>
//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092);
      HAL_Delay(1);
 8008c64:	2001      	movs	r0, #1
 8008c66:	f7fc fab9 	bl	80051dc <HAL_Delay>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
 8008c6a:	7b22      	ldrb	r2, [r4, #12]
 8008c6c:	4b86      	ldr	r3, [pc, #536]	; (8008e88 <RF_Operate+0x660>)
 8008c6e:	9202      	str	r2, [sp, #8]
 8008c70:	f103 0210 	add.w	r2, r3, #16
 8008c74:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c78:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c7c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c7e:	f7fe fa1d 	bl	80070bc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
 8008c82:	7b62      	ldrb	r2, [r4, #13]
 8008c84:	4b81      	ldr	r3, [pc, #516]	; (8008e8c <RF_Operate+0x664>)
 8008c86:	9202      	str	r2, [sp, #8]
 8008c88:	f103 0210 	add.w	r2, r3, #16
 8008c8c:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c90:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c94:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c96:	f7fe fa11 	bl	80070bc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));      
 8008c9a:	7ba2      	ldrb	r2, [r4, #14]
 8008c9c:	4b7c      	ldr	r3, [pc, #496]	; (8008e90 <RF_Operate+0x668>)
 8008c9e:	9202      	str	r2, [sp, #8]
 8008ca0:	f103 0210 	add.w	r2, r3, #16
 8008ca4:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008ca8:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008cac:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008cae:	f7fe fa05 	bl	80070bc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));      
 8008cb2:	4b78      	ldr	r3, [pc, #480]	; (8008e94 <RF_Operate+0x66c>)
 8008cb4:	7be2      	ldrb	r2, [r4, #15]
 8008cb6:	9202      	str	r2, [sp, #8]
 8008cb8:	f103 0210 	add.w	r2, r3, #16
 8008cbc:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008cc0:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008cc4:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008cc6:	f7fe f9f9 	bl	80070bc <BDA4601_atten_ctrl>


    }
    if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H])
 8008cca:	7fa3      	ldrb	r3, [r4, #30]
 8008ccc:	7faa      	ldrb	r2, [r5, #30]
 8008cce:	429a      	cmp	r2, r3
 8008cd0:	d109      	bne.n	8008ce6 <RF_Operate+0x4be>
        ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M])
 8008cd2:	7fe9      	ldrb	r1, [r5, #31]
 8008cd4:	7fe2      	ldrb	r2, [r4, #31]
 8008cd6:	4291      	cmp	r1, r2
 8008cd8:	d105      	bne.n	8008ce6 <RF_Operate+0x4be>
        || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){
 8008cda:	f895 1020 	ldrb.w	r1, [r5, #32]
 8008cde:	f894 2020 	ldrb.w	r2, [r4, #32]
 8008ce2:	4291      	cmp	r1, r2
 8008ce4:	d02a      	beq.n	8008d3c <RF_Operate+0x514>
        Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H];
 8008ce6:	77ab      	strb	r3, [r5, #30]
        Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M];        
 8008ce8:	7fe3      	ldrb	r3, [r4, #31]
        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
                   (data_buf[INDEX_PLL_3_5G_LOW_L]);
#if 1 // PYJ.2019.08.12_BEGIN -- 
        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008cea:	f44f 5240 	mov.w	r2, #12288	; 0x3000
        Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M];        
 8008cee:	77eb      	strb	r3, [r5, #31]
        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
 8008cf0:	f894 3020 	ldrb.w	r3, [r4, #32]
 8008cf4:	f885 3020 	strb.w	r3, [r5, #32]
                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
 8008cf8:	7fe1      	ldrb	r1, [r4, #31]
        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
 8008cfa:	7fa3      	ldrb	r3, [r4, #30]
                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
 8008cfc:	0209      	lsls	r1, r1, #8
        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
 8008cfe:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008d02:	f241 3388 	movw	r3, #5000	; 0x1388
                   (data_buf[INDEX_PLL_3_5G_LOW_L]);
 8008d06:	f894 0020 	ldrb.w	r0, [r4, #32]
        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008d0a:	9300      	str	r3, [sp, #0]
 8008d0c:	4301      	orrs	r1, r0
 8008d0e:	2308      	movs	r3, #8
 8008d10:	a826      	add	r0, sp, #152	; 0x98
 8008d12:	f7fe fc6d 	bl	80075f0 <ADF4153_Freq_Calc>
#else
        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
#endif // PYJ.2019.08.12_END -- 
//        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
      ADF4153_Module_Ctrl(Pll_3_5_L,0x385E48,0x163001,0x1442,3);
 8008d16:	2203      	movs	r2, #3
 8008d18:	9205      	str	r2, [sp, #20]
 8008d1a:	f241 4242 	movw	r2, #5186	; 0x1442
 8008d1e:	9204      	str	r2, [sp, #16]
 8008d20:	4a5d      	ldr	r2, [pc, #372]	; (8008e98 <RF_Operate+0x670>)
 8008d22:	4b5e      	ldr	r3, [pc, #376]	; (8008e9c <RF_Operate+0x674>)
 8008d24:	9203      	str	r2, [sp, #12]
 8008d26:	4a5e      	ldr	r2, [pc, #376]	; (8008ea0 <RF_Operate+0x678>)
 8008d28:	9202      	str	r2, [sp, #8]
 8008d2a:	f103 0210 	add.w	r2, r3, #16
 8008d2e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008d32:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008d36:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008d38:	f7fe fcf0 	bl	800771c <ADF4153_Module_Ctrl>

    }
    if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H])
 8008d3c:	f894 3021 	ldrb.w	r3, [r4, #33]	; 0x21
 8008d40:	f895 2021 	ldrb.w	r2, [r5, #33]	; 0x21
 8008d44:	429a      	cmp	r2, r3
 8008d46:	d10b      	bne.n	8008d60 <RF_Operate+0x538>
        || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M])
 8008d48:	f895 1022 	ldrb.w	r1, [r5, #34]	; 0x22
 8008d4c:	f894 2022 	ldrb.w	r2, [r4, #34]	; 0x22
 8008d50:	4291      	cmp	r1, r2
 8008d52:	d105      	bne.n	8008d60 <RF_Operate+0x538>
        || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){
 8008d54:	f895 1023 	ldrb.w	r1, [r5, #35]	; 0x23
 8008d58:	f894 2023 	ldrb.w	r2, [r4, #35]	; 0x23
 8008d5c:	4291      	cmp	r1, r2
 8008d5e:	d02f      	beq.n	8008dc0 <RF_Operate+0x598>
        Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H];
 8008d60:	f885 3021 	strb.w	r3, [r5, #33]	; 0x21
        Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M];
 8008d64:	f894 3022 	ldrb.w	r3, [r4, #34]	; 0x22
        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
                   (data_buf[INDEX_PLL_3_5G_HIGH_L]);
#if 1 // PYJ.2019.08.12_BEGIN -- 
//        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008d68:	f44f 5240 	mov.w	r2, #12288	; 0x3000
        Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M];
 8008d6c:	f885 3022 	strb.w	r3, [r5, #34]	; 0x22
        Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L];
 8008d70:	f894 3023 	ldrb.w	r3, [r4, #35]	; 0x23
 8008d74:	f885 3023 	strb.w	r3, [r5, #35]	; 0x23
                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
 8008d78:	f894 1022 	ldrb.w	r1, [r4, #34]	; 0x22
        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
 8008d7c:	f894 3021 	ldrb.w	r3, [r4, #33]	; 0x21
                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
 8008d80:	0209      	lsls	r1, r1, #8
        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
 8008d82:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008d86:	f241 3388 	movw	r3, #5000	; 0x1388
                   (data_buf[INDEX_PLL_3_5G_HIGH_L]);
 8008d8a:	f894 0023 	ldrb.w	r0, [r4, #35]	; 0x23
        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008d8e:	9300      	str	r3, [sp, #0]
 8008d90:	4301      	orrs	r1, r0
 8008d92:	2308      	movs	r3, #8
 8008d94:	a826      	add	r0, sp, #152	; 0x98
 8008d96:	f7fe fc2b 	bl	80075f0 <ADF4153_Freq_Calc>
//        printf("N_reg : %08x R_reg :%x\r\n",temp_reg.N_reg,temp_reg.R_reg);

#else
        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
#endif // PYJ.2019.08.12_END -- 
        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x14C2,0x3);
 8008d9a:	2203      	movs	r2, #3
 8008d9c:	9205      	str	r2, [sp, #20]
 8008d9e:	f241 42c2 	movw	r2, #5314	; 0x14c2
 8008da2:	9204      	str	r2, [sp, #16]
 8008da4:	9a26      	ldr	r2, [sp, #152]	; 0x98
 8008da6:	4b3f      	ldr	r3, [pc, #252]	; (8008ea4 <RF_Operate+0x67c>)
 8008da8:	9203      	str	r2, [sp, #12]
 8008daa:	9a27      	ldr	r2, [sp, #156]	; 0x9c
 8008dac:	9202      	str	r2, [sp, #8]
 8008dae:	f103 0210 	add.w	r2, r3, #16
 8008db2:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008db6:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008dba:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008dbc:	f7fe fcae 	bl	800771c <ADF4153_Module_Ctrl>

    }
    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){

    }
    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
 8008dc0:	f894 1043 	ldrb.w	r1, [r4, #67]	; 0x43
 8008dc4:	f895 3043 	ldrb.w	r3, [r5, #67]	; 0x43
 8008dc8:	428b      	cmp	r3, r1
 8008dca:	d006      	beq.n	8008dda <RF_Operate+0x5b2>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 8008dcc:	2043      	movs	r0, #67	; 0x43
 8008dce:	f7fe fe43 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL];
 8008dd2:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 8008dd6:	f885 3043 	strb.w	r3, [r5, #67]	; 0x43
    }
    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
 8008dda:	f894 1044 	ldrb.w	r1, [r4, #68]	; 0x44
 8008dde:	f895 3044 	ldrb.w	r3, [r5, #68]	; 0x44
 8008de2:	428b      	cmp	r3, r1
 8008de4:	d006      	beq.n	8008df4 <RF_Operate+0x5cc>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]);
 8008de6:	2044      	movs	r0, #68	; 0x44
 8008de8:	f7fe fe36 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL];
 8008dec:	f894 3044 	ldrb.w	r3, [r4, #68]	; 0x44
 8008df0:	f885 3044 	strb.w	r3, [r5, #68]	; 0x44

    }

    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
 8008df4:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 8008df8:	f895 3045 	ldrb.w	r3, [r5, #69]	; 0x45
 8008dfc:	428b      	cmp	r3, r1
 8008dfe:	d006      	beq.n	8008e0e <RF_Operate+0x5e6>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
 8008e00:	2045      	movs	r0, #69	; 0x45
 8008e02:	f7fe fe29 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
 8008e06:	f894 3045 	ldrb.w	r3, [r4, #69]	; 0x45
 8008e0a:	f885 3045 	strb.w	r3, [r5, #69]	; 0x45
    }
    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
 8008e0e:	f894 1046 	ldrb.w	r1, [r4, #70]	; 0x46
 8008e12:	f895 3046 	ldrb.w	r3, [r5, #70]	; 0x46
 8008e16:	428b      	cmp	r3, r1
 8008e18:	d006      	beq.n	8008e28 <RF_Operate+0x600>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
 8008e1a:	2046      	movs	r0, #70	; 0x46
 8008e1c:	f7fe fe1c 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL];
 8008e20:	f894 3046 	ldrb.w	r3, [r4, #70]	; 0x46
 8008e24:	f885 3046 	strb.w	r3, [r5, #70]	; 0x46

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
 8008e28:	f894 104a 	ldrb.w	r1, [r4, #74]	; 0x4a
 8008e2c:	f895 304a 	ldrb.w	r3, [r5, #74]	; 0x4a
 8008e30:	428b      	cmp	r3, r1
 8008e32:	d006      	beq.n	8008e42 <RF_Operate+0x61a>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]);
 8008e34:	204a      	movs	r0, #74	; 0x4a
 8008e36:	f7fe fe0f 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L];
 8008e3a:	f894 304a 	ldrb.w	r3, [r4, #74]	; 0x4a
 8008e3e:	f885 304a 	strb.w	r3, [r5, #74]	; 0x4a

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
 8008e42:	f894 1049 	ldrb.w	r1, [r4, #73]	; 0x49
 8008e46:	f895 3049 	ldrb.w	r3, [r5, #73]	; 0x49
 8008e4a:	428b      	cmp	r3, r1
 8008e4c:	d02c      	beq.n	8008ea8 <RF_Operate+0x680>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
 8008e4e:	2049      	movs	r0, #73	; 0x49
 8008e50:	f7fe fe02 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
 8008e54:	f894 3049 	ldrb.w	r3, [r4, #73]	; 0x49
 8008e58:	f885 3049 	strb.w	r3, [r5, #73]	; 0x49
 8008e5c:	e024      	b.n	8008ea8 <RF_Operate+0x680>
 8008e5e:	bf00      	nop
 8008e60:	20000038 	.word	0x20000038
 8008e64:	20000050 	.word	0x20000050
 8008e68:	20000068 	.word	0x20000068
 8008e6c:	20000080 	.word	0x20000080
 8008e70:	000186a0 	.word	0x000186a0
 8008e74:	009f8092 	.word	0x009f8092
 8008e78:	200001e8 	.word	0x200001e8
 8008e7c:	20000098 	.word	0x20000098
 8008e80:	200000b0 	.word	0x200000b0
 8008e84:	20000200 	.word	0x20000200
 8008e88:	200000c8 	.word	0x200000c8
 8008e8c:	200000e0 	.word	0x200000e0
 8008e90:	200000f8 	.word	0x200000f8
 8008e94:	20000110 	.word	0x20000110
 8008e98:	00163001 	.word	0x00163001
 8008e9c:	20000234 	.word	0x20000234
 8008ea0:	00385e48 	.word	0x00385e48
 8008ea4:	2000021c 	.word	0x2000021c
    

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
 8008ea8:	f894 1047 	ldrb.w	r1, [r4, #71]	; 0x47
 8008eac:	f895 3047 	ldrb.w	r3, [r5, #71]	; 0x47
 8008eb0:	428b      	cmp	r3, r1
 8008eb2:	f000 818a 	beq.w	80091ca <RF_Operate+0x9a2>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
        ADC_Modify = 1;
 8008eb6:	2601      	movs	r6, #1
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
 8008eb8:	2047      	movs	r0, #71	; 0x47
 8008eba:	f7fe fdcd 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
 8008ebe:	f894 3047 	ldrb.w	r3, [r4, #71]	; 0x47
 8008ec2:	f885 3047 	strb.w	r3, [r5, #71]	; 0x47

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
 8008ec6:	f894 1048 	ldrb.w	r1, [r4, #72]	; 0x48
 8008eca:	f895 3048 	ldrb.w	r3, [r5, #72]	; 0x48
 8008ece:	428b      	cmp	r3, r1
 8008ed0:	d007      	beq.n	8008ee2 <RF_Operate+0x6ba>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
        ADC_Modify = 1;
 8008ed2:	2601      	movs	r6, #1
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
 8008ed4:	2048      	movs	r0, #72	; 0x48
 8008ed6:	f7fe fdbf 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
 8008eda:	f894 3048 	ldrb.w	r3, [r4, #72]	; 0x48
 8008ede:	f885 3048 	strb.w	r3, [r5, #72]	; 0x48
    }
    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
 8008ee2:	f894 104b 	ldrb.w	r1, [r4, #75]	; 0x4b
 8008ee6:	f895 304b 	ldrb.w	r3, [r5, #75]	; 0x4b
 8008eea:	428b      	cmp	r3, r1
 8008eec:	d02d      	beq.n	8008f4a <RF_Operate+0x722>
        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);
 8008eee:	204b      	movs	r0, #75	; 0x4b
 8008ef0:	f7fe fdb2 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
 8008ef4:	f894 304b 	ldrb.w	r3, [r4, #75]	; 0x4b
        HAL_Delay(1);
 8008ef8:	2001      	movs	r0, #1
        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
 8008efa:	f885 304b 	strb.w	r3, [r5, #75]	; 0x4b
        HAL_Delay(1);
 8008efe:	f7fc f96d 	bl	80051dc <HAL_Delay>
//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
        if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
 8008f02:	f894 304b 	ldrb.w	r3, [r4, #75]	; 0x4b
 8008f06:	b303      	cbz	r3, 8008f4a <RF_Operate+0x722>
#if 1 // PYJ.2019.08.12_BEGIN -- 
//            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
//                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
//                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
 8008f08:	f895 1022 	ldrb.w	r1, [r5, #34]	; 0x22
            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
 8008f0c:	f895 3021 	ldrb.w	r3, [r5, #33]	; 0x21
                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
 8008f10:	0209      	lsls	r1, r1, #8
            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
 8008f12:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
 8008f16:	f895 3023 	ldrb.w	r3, [r5, #35]	; 0x23


//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008f1a:	f242 7010 	movw	r0, #10000	; 0x2710
                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
 8008f1e:	4319      	orrs	r1, r3
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008f20:	f241 3388 	movw	r3, #5000	; 0x1388
            temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
#endif // PYJ.2019.08.12_END -- 
//            ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
//            ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3);

            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008f24:	4fac      	ldr	r7, [pc, #688]	; (80091d8 <RF_Operate+0x9b0>)
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008f26:	4341      	muls	r1, r0
 8008f28:	9300      	str	r3, [sp, #0]
 8008f2a:	f44f 5240 	mov.w	r2, #12288	; 0x3000
 8008f2e:	2308      	movs	r3, #8
 8008f30:	a826      	add	r0, sp, #152	; 0x98
 8008f32:	f7fe fb5d 	bl	80075f0 <ADF4153_Freq_Calc>
            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008f36:	2298      	movs	r2, #152	; 0x98
 8008f38:	f107 0110 	add.w	r1, r7, #16
 8008f3c:	4668      	mov	r0, sp
 8008f3e:	f000 f9ef 	bl	8009320 <memcpy>
 8008f42:	e897 000f 	ldmia.w	r7, {r0, r1, r2, r3}
 8008f46:	f7fe f9fb 	bl	8007340 <PE43711_ALL_atten_ctrl>
        }
    }
    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
 8008f4a:	f894 104c 	ldrb.w	r1, [r4, #76]	; 0x4c
 8008f4e:	f895 304c 	ldrb.w	r3, [r5, #76]	; 0x4c
 8008f52:	428b      	cmp	r3, r1
 8008f54:	d02a      	beq.n	8008fac <RF_Operate+0x784>
        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]);
 8008f56:	204c      	movs	r0, #76	; 0x4c
 8008f58:	f7fe fd7e 	bl	8007a58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
 8008f5c:	f894 304c 	ldrb.w	r3, [r4, #76]	; 0x4c
        HAL_Delay(1);
 8008f60:	2001      	movs	r0, #1
        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
 8008f62:	f885 304c 	strb.w	r3, [r5, #76]	; 0x4c
        HAL_Delay(1);
 8008f66:	f7fc f939 	bl	80051dc <HAL_Delay>
//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
        if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
 8008f6a:	f894 304c 	ldrb.w	r3, [r4, #76]	; 0x4c
 8008f6e:	b1eb      	cbz	r3, 8008fac <RF_Operate+0x784>
#if 1 // PYJ.2019.08.12_BEGIN -- 
//            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
//                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
//                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
 8008f70:	7fe9      	ldrb	r1, [r5, #31]
            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
 8008f72:	7fab      	ldrb	r3, [r5, #30]
                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
 8008f74:	0209      	lsls	r1, r1, #8
            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
 8008f76:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
 8008f7a:	f895 3020 	ldrb.w	r3, [r5, #32]
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008f7e:	f242 7010 	movw	r0, #10000	; 0x2710
                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
 8008f82:	4319      	orrs	r1, r3
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008f84:	f241 3388 	movw	r3, #5000	; 0x1388
//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
#else
          temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);            
#endif // PYJ.2019.08.12_END -- 
//            ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008f88:	4f93      	ldr	r7, [pc, #588]	; (80091d8 <RF_Operate+0x9b0>)
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008f8a:	4341      	muls	r1, r0
 8008f8c:	9300      	str	r3, [sp, #0]
 8008f8e:	4a93      	ldr	r2, [pc, #588]	; (80091dc <RF_Operate+0x9b4>)
 8008f90:	2302      	movs	r3, #2
 8008f92:	a826      	add	r0, sp, #152	; 0x98
 8008f94:	f7fe fb2c 	bl	80075f0 <ADF4153_Freq_Calc>
            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008f98:	2298      	movs	r2, #152	; 0x98
 8008f9a:	f107 0110 	add.w	r1, r7, #16
 8008f9e:	4668      	mov	r0, sp
 8008fa0:	f000 f9be 	bl	8009320 <memcpy>
 8008fa4:	e897 000f 	ldmia.w	r7, {r0, r1, r2, r3}
 8008fa8:	f7fe f9ca 	bl	8007340 <PE43711_ALL_atten_ctrl>
        }
    }

    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
 8008fac:	f894 304d 	ldrb.w	r3, [r4, #77]	; 0x4d
 8008fb0:	f895 204d 	ldrb.w	r2, [r5, #77]	; 0x4d
 8008fb4:	429a      	cmp	r2, r3
 8008fb6:	d006      	beq.n	8008fc6 <RF_Operate+0x79e>
        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
 8008fb8:	f885 304d 	strb.w	r3, [r5, #77]	; 0x4d
        Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]);
 8008fbc:	f894 104d 	ldrb.w	r1, [r4, #77]	; 0x4d
 8008fc0:	204d      	movs	r0, #77	; 0x4d
 8008fc2:	f7fe fd49 	bl	8007a58 <Power_ON_OFF_Ctrl>
    }
    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
 8008fc6:	f894 304e 	ldrb.w	r3, [r4, #78]	; 0x4e
 8008fca:	f895 204e 	ldrb.w	r2, [r5, #78]	; 0x4e
 8008fce:	429a      	cmp	r2, r3
 8008fd0:	d006      	beq.n	8008fe0 <RF_Operate+0x7b8>
        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
 8008fd2:	f885 304e 	strb.w	r3, [r5, #78]	; 0x4e
        Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]);
 8008fd6:	f894 104e 	ldrb.w	r1, [r4, #78]	; 0x4e
 8008fda:	204e      	movs	r0, #78	; 0x4e
 8008fdc:	f7fe fd3c 	bl	8007a58 <Power_ON_OFF_Ctrl>
    }
    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
 8008fe0:	4d7f      	ldr	r5, [pc, #508]	; (80091e0 <RF_Operate+0x9b8>)
 8008fe2:	f894 304f 	ldrb.w	r3, [r4, #79]	; 0x4f
 8008fe6:	f895 204f 	ldrb.w	r2, [r5, #79]	; 0x4f
 8008fea:	429a      	cmp	r2, r3
 8008fec:	d006      	beq.n	8008ffc <RF_Operate+0x7d4>
        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
 8008fee:	f885 304f 	strb.w	r3, [r5, #79]	; 0x4f
        Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]);
 8008ff2:	f894 104f 	ldrb.w	r1, [r4, #79]	; 0x4f
 8008ff6:	204f      	movs	r0, #79	; 0x4f
 8008ff8:	f7fe fd2e 	bl	8007a58 <Power_ON_OFF_Ctrl>
    }
    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
 8008ffc:	f894 3050 	ldrb.w	r3, [r4, #80]	; 0x50
 8009000:	f895 2050 	ldrb.w	r2, [r5, #80]	; 0x50
 8009004:	429a      	cmp	r2, r3
 8009006:	d006      	beq.n	8009016 <RF_Operate+0x7ee>
        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
 8009008:	f885 3050 	strb.w	r3, [r5, #80]	; 0x50
        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
 800900c:	f894 1050 	ldrb.w	r1, [r4, #80]	; 0x50
 8009010:	2050      	movs	r0, #80	; 0x50
 8009012:	f7fe fd21 	bl	8007a58 <Power_ON_OFF_Ctrl>
    }


    if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H])
 8009016:	f894 3051 	ldrb.w	r3, [r4, #81]	; 0x51
 800901a:	f895 2051 	ldrb.w	r2, [r5, #81]	; 0x51
 800901e:	429a      	cmp	r2, r3
 8009020:	d105      	bne.n	800902e <RF_Operate+0x806>
        ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){
 8009022:	f895 1052 	ldrb.w	r1, [r5, #82]	; 0x52
 8009026:	f894 2052 	ldrb.w	r2, [r4, #82]	; 0x52
 800902a:	4291      	cmp	r1, r2
 800902c:	d006      	beq.n	800903c <RF_Operate+0x814>
        ADC_Modify = 1;
 800902e:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H];
 8009030:	f885 3051 	strb.w	r3, [r5, #81]	; 0x51
        Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L];
 8009034:	f894 3052 	ldrb.w	r3, [r4, #82]	; 0x52
 8009038:	f885 3052 	strb.w	r3, [r5, #82]	; 0x52
    }
    if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H])
 800903c:	f894 3053 	ldrb.w	r3, [r4, #83]	; 0x53
 8009040:	f895 2053 	ldrb.w	r2, [r5, #83]	; 0x53
 8009044:	429a      	cmp	r2, r3
 8009046:	d105      	bne.n	8009054 <RF_Operate+0x82c>
        ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){
 8009048:	f895 1054 	ldrb.w	r1, [r5, #84]	; 0x54
 800904c:	f894 2054 	ldrb.w	r2, [r4, #84]	; 0x54
 8009050:	4291      	cmp	r1, r2
 8009052:	d006      	beq.n	8009062 <RF_Operate+0x83a>
        ADC_Modify = 1;
 8009054:	2601      	movs	r6, #1
        
        Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H];
 8009056:	f885 3053 	strb.w	r3, [r5, #83]	; 0x53
        Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L];        
 800905a:	f894 3054 	ldrb.w	r3, [r4, #84]	; 0x54
 800905e:	f885 3054 	strb.w	r3, [r5, #84]	; 0x54
    }    
    if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
 8009062:	f894 3055 	ldrb.w	r3, [r4, #85]	; 0x55
 8009066:	f895 2055 	ldrb.w	r2, [r5, #85]	; 0x55
 800906a:	429a      	cmp	r2, r3
 800906c:	d105      	bne.n	800907a <RF_Operate+0x852>
        ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
 800906e:	f895 1056 	ldrb.w	r1, [r5, #86]	; 0x56
 8009072:	f894 2056 	ldrb.w	r2, [r4, #86]	; 0x56
 8009076:	4291      	cmp	r1, r2
 8009078:	d006      	beq.n	8009088 <RF_Operate+0x860>
        ADC_Modify = 1;
 800907a:	2601      	movs	r6, #1
//        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
//        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);

        Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
 800907c:	f885 3055 	strb.w	r3, [r5, #85]	; 0x55
        Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
 8009080:	f894 3056 	ldrb.w	r3, [r4, #86]	; 0x56
 8009084:	f885 3056 	strb.w	r3, [r5, #86]	; 0x56
    }
    if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H])
 8009088:	f894 3057 	ldrb.w	r3, [r4, #87]	; 0x57
 800908c:	f895 2057 	ldrb.w	r2, [r5, #87]	; 0x57
 8009090:	429a      	cmp	r2, r3
 8009092:	d105      	bne.n	80090a0 <RF_Operate+0x878>
        ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){
 8009094:	f895 1058 	ldrb.w	r1, [r5, #88]	; 0x58
 8009098:	f894 2058 	ldrb.w	r2, [r4, #88]	; 0x58
 800909c:	4291      	cmp	r1, r2
 800909e:	d006      	beq.n	80090ae <RF_Operate+0x886>
        ADC_Modify = 1;
 80090a0:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H];
 80090a2:	f885 3057 	strb.w	r3, [r5, #87]	; 0x57
        Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L];
 80090a6:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
 80090aa:	f885 3058 	strb.w	r3, [r5, #88]	; 0x58
    }
    if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H])
 80090ae:	f894 3059 	ldrb.w	r3, [r4, #89]	; 0x59
 80090b2:	f895 2059 	ldrb.w	r2, [r5, #89]	; 0x59
 80090b6:	429a      	cmp	r2, r3
 80090b8:	d105      	bne.n	80090c6 <RF_Operate+0x89e>
        ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){
 80090ba:	f895 105a 	ldrb.w	r1, [r5, #90]	; 0x5a
 80090be:	f894 205a 	ldrb.w	r2, [r4, #90]	; 0x5a
 80090c2:	4291      	cmp	r1, r2
 80090c4:	d006      	beq.n	80090d4 <RF_Operate+0x8ac>
        ADC_Modify = 1;
 80090c6:	2601      	movs	r6, #1

        Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H];
 80090c8:	f885 3059 	strb.w	r3, [r5, #89]	; 0x59
        Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L];        
 80090cc:	f894 305a 	ldrb.w	r3, [r4, #90]	; 0x5a
 80090d0:	f885 305a 	strb.w	r3, [r5, #90]	; 0x5a
    }
    if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H])
 80090d4:	f894 305b 	ldrb.w	r3, [r4, #91]	; 0x5b
 80090d8:	f895 205b 	ldrb.w	r2, [r5, #91]	; 0x5b
 80090dc:	429a      	cmp	r2, r3
 80090de:	d105      	bne.n	80090ec <RF_Operate+0x8c4>
        ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){
 80090e0:	f895 105c 	ldrb.w	r1, [r5, #92]	; 0x5c
 80090e4:	f894 205c 	ldrb.w	r2, [r4, #92]	; 0x5c
 80090e8:	4291      	cmp	r1, r2
 80090ea:	d006      	beq.n	80090fa <RF_Operate+0x8d2>
        ADC_Modify = 1;
 80090ec:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H];
 80090ee:	f885 305b 	strb.w	r3, [r5, #91]	; 0x5b
        Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L];        
 80090f2:	f894 305c 	ldrb.w	r3, [r4, #92]	; 0x5c
 80090f6:	f885 305c 	strb.w	r3, [r5, #92]	; 0x5c
    }
    if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H])
 80090fa:	f894 305d 	ldrb.w	r3, [r4, #93]	; 0x5d
 80090fe:	f895 205d 	ldrb.w	r2, [r5, #93]	; 0x5d
 8009102:	429a      	cmp	r2, r3
 8009104:	d105      	bne.n	8009112 <RF_Operate+0x8ea>
        ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){
 8009106:	f895 105e 	ldrb.w	r1, [r5, #94]	; 0x5e
 800910a:	f894 205e 	ldrb.w	r2, [r4, #94]	; 0x5e
 800910e:	4291      	cmp	r1, r2
 8009110:	d006      	beq.n	8009120 <RF_Operate+0x8f8>
        ADC_Modify = 1;
 8009112:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H];
 8009114:	f885 305d 	strb.w	r3, [r5, #93]	; 0x5d
        Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L];        
 8009118:	f894 305e 	ldrb.w	r3, [r4, #94]	; 0x5e
 800911c:	f885 305e 	strb.w	r3, [r5, #94]	; 0x5e
    }    
    if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H])
 8009120:	f894 305f 	ldrb.w	r3, [r4, #95]	; 0x5f
 8009124:	f895 205f 	ldrb.w	r2, [r5, #95]	; 0x5f
 8009128:	429a      	cmp	r2, r3
 800912a:	d105      	bne.n	8009138 <RF_Operate+0x910>
        ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){
 800912c:	f895 1060 	ldrb.w	r1, [r5, #96]	; 0x60
 8009130:	f894 2060 	ldrb.w	r2, [r4, #96]	; 0x60
 8009134:	4291      	cmp	r1, r2
 8009136:	d04a      	beq.n	80091ce <RF_Operate+0x9a6>
        ADC_Modify = 1;
        Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H];
 8009138:	f885 305f 	strb.w	r3, [r5, #95]	; 0x5f
        Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L];        
 800913c:	f894 3060 	ldrb.w	r3, [r4, #96]	; 0x60
 8009140:	f885 3060 	strb.w	r3, [r5, #96]	; 0x60
//        AD5318_Ctrl(0xA000);
//        printf("DAC CTRL START \r\n");
//        AD5318_Ctrl(0x800C);
//        AD5318_Ctrl(0xA000);
//        printf("DAC Change\r\n");
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]));    
 8009144:	f895 3052 	ldrb.w	r3, [r5, #82]	; 0x52
 8009148:	f895 0051 	ldrb.w	r0, [r5, #81]	; 0x51
 800914c:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009150:	f7fd ff34 	bl	8006fbc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L]));    
 8009154:	f895 3054 	ldrb.w	r3, [r5, #84]	; 0x54
 8009158:	f895 0053 	ldrb.w	r0, [r5, #83]	; 0x53
 800915c:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009160:	f7fd ff2c 	bl	8006fbc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L]));
 8009164:	f895 3056 	ldrb.w	r3, [r5, #86]	; 0x56
 8009168:	f895 0055 	ldrb.w	r0, [r5, #85]	; 0x55
 800916c:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009170:	f7fd ff24 	bl	8006fbc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L]));
 8009174:	f895 3058 	ldrb.w	r3, [r5, #88]	; 0x58
 8009178:	f895 0057 	ldrb.w	r0, [r5, #87]	; 0x57
 800917c:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009180:	f7fd ff1c 	bl	8006fbc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L]));    
 8009184:	f895 305a 	ldrb.w	r3, [r5, #90]	; 0x5a
 8009188:	f895 0059 	ldrb.w	r0, [r5, #89]	; 0x59
 800918c:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009190:	f7fd ff14 	bl	8006fbc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L]));
 8009194:	f895 305c 	ldrb.w	r3, [r5, #92]	; 0x5c
 8009198:	f895 005b 	ldrb.w	r0, [r5, #91]	; 0x5b
 800919c:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 80091a0:	f7fd ff0c 	bl	8006fbc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
 80091a4:	f895 305e 	ldrb.w	r3, [r5, #94]	; 0x5e
 80091a8:	f895 005d 	ldrb.w	r0, [r5, #93]	; 0x5d
 80091ac:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 80091b0:	f7fd ff04 	bl	8006fbc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
 80091b4:	f895 005f 	ldrb.w	r0, [r5, #95]	; 0x5f
 80091b8:	f895 3060 	ldrb.w	r3, [r5, #96]	; 0x60
 80091bc:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
    }
    
}
 80091c0:	b029      	add	sp, #164	; 0xa4
 80091c2:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
 80091c6:	f7fd bef9 	b.w	8006fbc <AD5318_Ctrl>
    uint8_t  ADC_Modify = 0;
 80091ca:	2600      	movs	r6, #0
 80091cc:	e67b      	b.n	8008ec6 <RF_Operate+0x69e>
    if(ADC_Modify){
 80091ce:	2e00      	cmp	r6, #0
 80091d0:	d1b8      	bne.n	8009144 <RF_Operate+0x91c>
}
 80091d2:	b029      	add	sp, #164	; 0xa4
 80091d4:	bdf0      	pop	{r4, r5, r6, r7, pc}
 80091d6:	bf00      	nop
 80091d8:	200004d8 	.word	0x200004d8
 80091dc:	02625a00 	.word	0x02625a00
 80091e0:	200005e3 	.word	0x200005e3

080091e4 <RF_Ctrl_Main>:

uint8_t temp_crc = 0;
bool RF_Ctrl_Main(uint8_t* data_buf){
 80091e4:	b570      	push	{r4, r5, r6, lr}
 80091e6:	4604      	mov	r4, r0
    bool ret = false;
    Bluecell_Prot_t type = data_buf[Type];
 80091e8:	7846      	ldrb	r6, [r0, #1]
    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
 80091ea:	f7ff fad7 	bl	800879c <RF_Data_Check>
    if(ret == false){
 80091ee:	4605      	mov	r5, r0
 80091f0:	b948      	cbnz	r0, 8009206 <RF_Ctrl_Main+0x22>
        HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); 
 80091f2:	78a2      	ldrb	r2, [r4, #2]
 80091f4:	f640 33b8 	movw	r3, #3000	; 0xbb8
 80091f8:	3203      	adds	r2, #3
 80091fa:	4621      	mov	r1, r4
 80091fc:	481a      	ldr	r0, [pc, #104]	; (8009268 <RF_Ctrl_Main+0x84>)
 80091fe:	f7fd fcb1 	bl	8006b64 <HAL_UART_Transmit>
            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
#endif
            break;
    }
    return ret;
}
 8009202:	4628      	mov	r0, r5
 8009204:	bd70      	pop	{r4, r5, r6, pc}
    switch(type){
 8009206:	2e03      	cmp	r6, #3
 8009208:	d8fb      	bhi.n	8009202 <RF_Ctrl_Main+0x1e>
 800920a:	e8df f006 	tbb	[pc, r6]
 800920e:	2002      	.short	0x2002
 8009210:	2926      	.short	0x2926
 8009212:	2300      	movs	r3, #0
            printf("%02x ",data_buf[i]);
 8009214:	4e15      	ldr	r6, [pc, #84]	; (800926c <RF_Ctrl_Main+0x88>)
        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
 8009216:	78a2      	ldrb	r2, [r4, #2]
 8009218:	1c5d      	adds	r5, r3, #1
 800921a:	3205      	adds	r2, #5
 800921c:	b2db      	uxtb	r3, r3
 800921e:	429a      	cmp	r2, r3
 8009220:	da0f      	bge.n	8009242 <RF_Ctrl_Main+0x5e>
        printf("Reset Start \r\n");
 8009222:	4813      	ldr	r0, [pc, #76]	; (8009270 <RF_Ctrl_Main+0x8c>)
 8009224:	f000 fd64 	bl	8009cf0 <puts>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8009228:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 800922c:	4911      	ldr	r1, [pc, #68]	; (8009274 <RF_Ctrl_Main+0x90>)
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 800922e:	4b12      	ldr	r3, [pc, #72]	; (8009278 <RF_Ctrl_Main+0x94>)
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8009230:	68ca      	ldr	r2, [r1, #12]
 8009232:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 8009236:	4313      	orrs	r3, r2
 8009238:	60cb      	str	r3, [r1, #12]
 800923a:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("nop");
 800923e:	bf00      	nop
 8009240:	e7fd      	b.n	800923e <RF_Ctrl_Main+0x5a>
            printf("%02x ",data_buf[i]);
 8009242:	5ce1      	ldrb	r1, [r4, r3]
 8009244:	4630      	mov	r0, r6
 8009246:	f000 fcdf 	bl	8009c08 <iprintf>
 800924a:	462b      	mov	r3, r5
 800924c:	e7e3      	b.n	8009216 <RF_Ctrl_Main+0x32>
        RF_Operate(&data_buf[Header]);
 800924e:	4620      	mov	r0, r4
 8009250:	f7ff faea 	bl	8008828 <RF_Operate>
        RF_Status_Ack();
 8009254:	f7ff facc 	bl	80087f0 <RF_Status_Ack>
        break;
 8009258:	e7d3      	b.n	8009202 <RF_Ctrl_Main+0x1e>
        RF_Status_Get();
 800925a:	f7ff faab 	bl	80087b4 <RF_Status_Get>
        break;
 800925e:	e7d0      	b.n	8009202 <RF_Ctrl_Main+0x1e>
        Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]);
 8009260:	4806      	ldr	r0, [pc, #24]	; (800927c <RF_Ctrl_Main+0x98>)
 8009262:	f7fe fb91 	bl	8007988 <Bluecell_Flash_Write>
 8009266:	e7f5      	b.n	8009254 <RF_Ctrl_Main+0x70>
 8009268:	20000700 	.word	0x20000700
 800926c:	0800bc77 	.word	0x0800bc77
 8009270:	0800bc7d 	.word	0x0800bc7d
 8009274:	e000ed00 	.word	0xe000ed00
 8009278:	05fa0004 	.word	0x05fa0004
 800927c:	200005e3 	.word	0x200005e3

08009280 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8009280:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8009282:	e003      	b.n	800928c <LoopCopyDataInit>

08009284 <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8009284:	4b0b      	ldr	r3, [pc, #44]	; (80092b4 <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 8009286:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 8009288:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 800928a:	3104      	adds	r1, #4

0800928c <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 800928c:	480a      	ldr	r0, [pc, #40]	; (80092b8 <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 800928e:	4b0b      	ldr	r3, [pc, #44]	; (80092bc <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8009290:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8009292:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8009294:	d3f6      	bcc.n	8009284 <CopyDataInit>
  ldr r2, =_sbss
 8009296:	4a0a      	ldr	r2, [pc, #40]	; (80092c0 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 8009298:	e002      	b.n	80092a0 <LoopFillZerobss>

0800929a <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 800929a:	2300      	movs	r3, #0
  str r3, [r2], #4
 800929c:	f842 3b04 	str.w	r3, [r2], #4

080092a0 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 80092a0:	4b08      	ldr	r3, [pc, #32]	; (80092c4 <LoopFillZerobss+0x24>)
  cmp r2, r3
 80092a2:	429a      	cmp	r2, r3
  bcc FillZerobss
 80092a4:	d3f9      	bcc.n	800929a <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 80092a6:	f7ff f9d9 	bl	800865c <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 80092aa:	f000 f815 	bl	80092d8 <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 80092ae:	f7fe fd5b 	bl	8007d68 <main>
  bx lr
 80092b2:	4770      	bx	lr
  ldr r3, =_sidata
 80092b4:	0800bf58 	.word	0x0800bf58
  ldr r0, =_sdata
 80092b8:	20000000 	.word	0x20000000
  ldr r3, =_edata
 80092bc:	2000041c 	.word	0x2000041c
  ldr r2, =_sbss
 80092c0:	20000420 	.word	0x20000420
  ldr r3, = _ebss
 80092c4:	200017e4 	.word	0x200017e4

080092c8 <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 80092c8:	e7fe      	b.n	80092c8 <ADC1_2_IRQHandler>
	...

080092cc <__errno>:
 80092cc:	4b01      	ldr	r3, [pc, #4]	; (80092d4 <__errno+0x8>)
 80092ce:	6818      	ldr	r0, [r3, #0]
 80092d0:	4770      	bx	lr
 80092d2:	bf00      	nop
 80092d4:	2000024c 	.word	0x2000024c

080092d8 <__libc_init_array>:
 80092d8:	b570      	push	{r4, r5, r6, lr}
 80092da:	2500      	movs	r5, #0
 80092dc:	4e0c      	ldr	r6, [pc, #48]	; (8009310 <__libc_init_array+0x38>)
 80092de:	4c0d      	ldr	r4, [pc, #52]	; (8009314 <__libc_init_array+0x3c>)
 80092e0:	1ba4      	subs	r4, r4, r6
 80092e2:	10a4      	asrs	r4, r4, #2
 80092e4:	42a5      	cmp	r5, r4
 80092e6:	d109      	bne.n	80092fc <__libc_init_array+0x24>
 80092e8:	f002 fc8c 	bl	800bc04 <_init>
 80092ec:	2500      	movs	r5, #0
 80092ee:	4e0a      	ldr	r6, [pc, #40]	; (8009318 <__libc_init_array+0x40>)
 80092f0:	4c0a      	ldr	r4, [pc, #40]	; (800931c <__libc_init_array+0x44>)
 80092f2:	1ba4      	subs	r4, r4, r6
 80092f4:	10a4      	asrs	r4, r4, #2
 80092f6:	42a5      	cmp	r5, r4
 80092f8:	d105      	bne.n	8009306 <__libc_init_array+0x2e>
 80092fa:	bd70      	pop	{r4, r5, r6, pc}
 80092fc:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8009300:	4798      	blx	r3
 8009302:	3501      	adds	r5, #1
 8009304:	e7ee      	b.n	80092e4 <__libc_init_array+0xc>
 8009306:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 800930a:	4798      	blx	r3
 800930c:	3501      	adds	r5, #1
 800930e:	e7f2      	b.n	80092f6 <__libc_init_array+0x1e>
 8009310:	0800bf50 	.word	0x0800bf50
 8009314:	0800bf50 	.word	0x0800bf50
 8009318:	0800bf50 	.word	0x0800bf50
 800931c:	0800bf54 	.word	0x0800bf54

08009320 <memcpy>:
 8009320:	b510      	push	{r4, lr}
 8009322:	1e43      	subs	r3, r0, #1
 8009324:	440a      	add	r2, r1
 8009326:	4291      	cmp	r1, r2
 8009328:	d100      	bne.n	800932c <memcpy+0xc>
 800932a:	bd10      	pop	{r4, pc}
 800932c:	f811 4b01 	ldrb.w	r4, [r1], #1
 8009330:	f803 4f01 	strb.w	r4, [r3, #1]!
 8009334:	e7f7      	b.n	8009326 <memcpy+0x6>

08009336 <memset>:
 8009336:	4603      	mov	r3, r0
 8009338:	4402      	add	r2, r0
 800933a:	4293      	cmp	r3, r2
 800933c:	d100      	bne.n	8009340 <memset+0xa>
 800933e:	4770      	bx	lr
 8009340:	f803 1b01 	strb.w	r1, [r3], #1
 8009344:	e7f9      	b.n	800933a <memset+0x4>

08009346 <__cvt>:
 8009346:	2b00      	cmp	r3, #0
 8009348:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800934c:	461e      	mov	r6, r3
 800934e:	bfbb      	ittet	lt
 8009350:	f103 4300 	addlt.w	r3, r3, #2147483648	; 0x80000000
 8009354:	461e      	movlt	r6, r3
 8009356:	2300      	movge	r3, #0
 8009358:	232d      	movlt	r3, #45	; 0x2d
 800935a:	b088      	sub	sp, #32
 800935c:	9f14      	ldr	r7, [sp, #80]	; 0x50
 800935e:	9912      	ldr	r1, [sp, #72]	; 0x48
 8009360:	f027 0720 	bic.w	r7, r7, #32
 8009364:	2f46      	cmp	r7, #70	; 0x46
 8009366:	4614      	mov	r4, r2
 8009368:	9d10      	ldr	r5, [sp, #64]	; 0x40
 800936a:	f8dd a04c 	ldr.w	sl, [sp, #76]	; 0x4c
 800936e:	700b      	strb	r3, [r1, #0]
 8009370:	d004      	beq.n	800937c <__cvt+0x36>
 8009372:	2f45      	cmp	r7, #69	; 0x45
 8009374:	d100      	bne.n	8009378 <__cvt+0x32>
 8009376:	3501      	adds	r5, #1
 8009378:	2302      	movs	r3, #2
 800937a:	e000      	b.n	800937e <__cvt+0x38>
 800937c:	2303      	movs	r3, #3
 800937e:	aa07      	add	r2, sp, #28
 8009380:	9204      	str	r2, [sp, #16]
 8009382:	aa06      	add	r2, sp, #24
 8009384:	9203      	str	r2, [sp, #12]
 8009386:	e88d 0428 	stmia.w	sp, {r3, r5, sl}
 800938a:	4622      	mov	r2, r4
 800938c:	4633      	mov	r3, r6
 800938e:	f000 febb 	bl	800a108 <_dtoa_r>
 8009392:	2f47      	cmp	r7, #71	; 0x47
 8009394:	4680      	mov	r8, r0
 8009396:	d102      	bne.n	800939e <__cvt+0x58>
 8009398:	9b11      	ldr	r3, [sp, #68]	; 0x44
 800939a:	07db      	lsls	r3, r3, #31
 800939c:	d526      	bpl.n	80093ec <__cvt+0xa6>
 800939e:	2f46      	cmp	r7, #70	; 0x46
 80093a0:	eb08 0905 	add.w	r9, r8, r5
 80093a4:	d111      	bne.n	80093ca <__cvt+0x84>
 80093a6:	f898 3000 	ldrb.w	r3, [r8]
 80093aa:	2b30      	cmp	r3, #48	; 0x30
 80093ac:	d10a      	bne.n	80093c4 <__cvt+0x7e>
 80093ae:	2200      	movs	r2, #0
 80093b0:	2300      	movs	r3, #0
 80093b2:	4620      	mov	r0, r4
 80093b4:	4631      	mov	r1, r6
 80093b6:	f7fb fb6b 	bl	8004a90 <__aeabi_dcmpeq>
 80093ba:	b918      	cbnz	r0, 80093c4 <__cvt+0x7e>
 80093bc:	f1c5 0501 	rsb	r5, r5, #1
 80093c0:	f8ca 5000 	str.w	r5, [sl]
 80093c4:	f8da 3000 	ldr.w	r3, [sl]
 80093c8:	4499      	add	r9, r3
 80093ca:	2200      	movs	r2, #0
 80093cc:	2300      	movs	r3, #0
 80093ce:	4620      	mov	r0, r4
 80093d0:	4631      	mov	r1, r6
 80093d2:	f7fb fb5d 	bl	8004a90 <__aeabi_dcmpeq>
 80093d6:	b938      	cbnz	r0, 80093e8 <__cvt+0xa2>
 80093d8:	2230      	movs	r2, #48	; 0x30
 80093da:	9b07      	ldr	r3, [sp, #28]
 80093dc:	4599      	cmp	r9, r3
 80093de:	d905      	bls.n	80093ec <__cvt+0xa6>
 80093e0:	1c59      	adds	r1, r3, #1
 80093e2:	9107      	str	r1, [sp, #28]
 80093e4:	701a      	strb	r2, [r3, #0]
 80093e6:	e7f8      	b.n	80093da <__cvt+0x94>
 80093e8:	f8cd 901c 	str.w	r9, [sp, #28]
 80093ec:	4640      	mov	r0, r8
 80093ee:	9b07      	ldr	r3, [sp, #28]
 80093f0:	9a15      	ldr	r2, [sp, #84]	; 0x54
 80093f2:	eba3 0308 	sub.w	r3, r3, r8
 80093f6:	6013      	str	r3, [r2, #0]
 80093f8:	b008      	add	sp, #32
 80093fa:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}

080093fe <__exponent>:
 80093fe:	4603      	mov	r3, r0
 8009400:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 8009402:	2900      	cmp	r1, #0
 8009404:	f803 2b02 	strb.w	r2, [r3], #2
 8009408:	bfb6      	itet	lt
 800940a:	222d      	movlt	r2, #45	; 0x2d
 800940c:	222b      	movge	r2, #43	; 0x2b
 800940e:	4249      	neglt	r1, r1
 8009410:	2909      	cmp	r1, #9
 8009412:	7042      	strb	r2, [r0, #1]
 8009414:	dd21      	ble.n	800945a <__exponent+0x5c>
 8009416:	f10d 0207 	add.w	r2, sp, #7
 800941a:	4617      	mov	r7, r2
 800941c:	260a      	movs	r6, #10
 800941e:	fb91 f5f6 	sdiv	r5, r1, r6
 8009422:	fb06 1115 	mls	r1, r6, r5, r1
 8009426:	2d09      	cmp	r5, #9
 8009428:	f101 0130 	add.w	r1, r1, #48	; 0x30
 800942c:	f802 1c01 	strb.w	r1, [r2, #-1]
 8009430:	f102 34ff 	add.w	r4, r2, #4294967295
 8009434:	4629      	mov	r1, r5
 8009436:	dc09      	bgt.n	800944c <__exponent+0x4e>
 8009438:	3130      	adds	r1, #48	; 0x30
 800943a:	3a02      	subs	r2, #2
 800943c:	f804 1c01 	strb.w	r1, [r4, #-1]
 8009440:	42ba      	cmp	r2, r7
 8009442:	461c      	mov	r4, r3
 8009444:	d304      	bcc.n	8009450 <__exponent+0x52>
 8009446:	1a20      	subs	r0, r4, r0
 8009448:	b003      	add	sp, #12
 800944a:	bdf0      	pop	{r4, r5, r6, r7, pc}
 800944c:	4622      	mov	r2, r4
 800944e:	e7e6      	b.n	800941e <__exponent+0x20>
 8009450:	f812 1b01 	ldrb.w	r1, [r2], #1
 8009454:	f803 1b01 	strb.w	r1, [r3], #1
 8009458:	e7f2      	b.n	8009440 <__exponent+0x42>
 800945a:	2230      	movs	r2, #48	; 0x30
 800945c:	461c      	mov	r4, r3
 800945e:	4411      	add	r1, r2
 8009460:	f804 2b02 	strb.w	r2, [r4], #2
 8009464:	7059      	strb	r1, [r3, #1]
 8009466:	e7ee      	b.n	8009446 <__exponent+0x48>

08009468 <_printf_float>:
 8009468:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800946c:	b091      	sub	sp, #68	; 0x44
 800946e:	460c      	mov	r4, r1
 8009470:	9f1a      	ldr	r7, [sp, #104]	; 0x68
 8009472:	4693      	mov	fp, r2
 8009474:	461e      	mov	r6, r3
 8009476:	4605      	mov	r5, r0
 8009478:	f001 fd96 	bl	800afa8 <_localeconv_r>
 800947c:	6803      	ldr	r3, [r0, #0]
 800947e:	4618      	mov	r0, r3
 8009480:	9309      	str	r3, [sp, #36]	; 0x24
 8009482:	f7fa fed1 	bl	8004228 <strlen>
 8009486:	2300      	movs	r3, #0
 8009488:	930e      	str	r3, [sp, #56]	; 0x38
 800948a:	683b      	ldr	r3, [r7, #0]
 800948c:	900a      	str	r0, [sp, #40]	; 0x28
 800948e:	3307      	adds	r3, #7
 8009490:	f023 0307 	bic.w	r3, r3, #7
 8009494:	f103 0208 	add.w	r2, r3, #8
 8009498:	f894 8018 	ldrb.w	r8, [r4, #24]
 800949c:	f8d4 a000 	ldr.w	sl, [r4]
 80094a0:	603a      	str	r2, [r7, #0]
 80094a2:	e9d3 2300 	ldrd	r2, r3, [r3]
 80094a6:	e9c4 2312 	strd	r2, r3, [r4, #72]	; 0x48
 80094aa:	f8d4 904c 	ldr.w	r9, [r4, #76]	; 0x4c
 80094ae:	6ca7      	ldr	r7, [r4, #72]	; 0x48
 80094b0:	f029 4300 	bic.w	r3, r9, #2147483648	; 0x80000000
 80094b4:	930b      	str	r3, [sp, #44]	; 0x2c
 80094b6:	f04f 32ff 	mov.w	r2, #4294967295
 80094ba:	4ba6      	ldr	r3, [pc, #664]	; (8009754 <_printf_float+0x2ec>)
 80094bc:	4638      	mov	r0, r7
 80094be:	990b      	ldr	r1, [sp, #44]	; 0x2c
 80094c0:	f7fb fb18 	bl	8004af4 <__aeabi_dcmpun>
 80094c4:	2800      	cmp	r0, #0
 80094c6:	f040 81f7 	bne.w	80098b8 <_printf_float+0x450>
 80094ca:	f04f 32ff 	mov.w	r2, #4294967295
 80094ce:	4ba1      	ldr	r3, [pc, #644]	; (8009754 <_printf_float+0x2ec>)
 80094d0:	4638      	mov	r0, r7
 80094d2:	990b      	ldr	r1, [sp, #44]	; 0x2c
 80094d4:	f7fb faf0 	bl	8004ab8 <__aeabi_dcmple>
 80094d8:	2800      	cmp	r0, #0
 80094da:	f040 81ed 	bne.w	80098b8 <_printf_float+0x450>
 80094de:	2200      	movs	r2, #0
 80094e0:	2300      	movs	r3, #0
 80094e2:	4638      	mov	r0, r7
 80094e4:	4649      	mov	r1, r9
 80094e6:	f7fb fadd 	bl	8004aa4 <__aeabi_dcmplt>
 80094ea:	b110      	cbz	r0, 80094f2 <_printf_float+0x8a>
 80094ec:	232d      	movs	r3, #45	; 0x2d
 80094ee:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 80094f2:	4b99      	ldr	r3, [pc, #612]	; (8009758 <_printf_float+0x2f0>)
 80094f4:	4f99      	ldr	r7, [pc, #612]	; (800975c <_printf_float+0x2f4>)
 80094f6:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 80094fa:	bf98      	it	ls
 80094fc:	461f      	movls	r7, r3
 80094fe:	2303      	movs	r3, #3
 8009500:	f04f 0900 	mov.w	r9, #0
 8009504:	6123      	str	r3, [r4, #16]
 8009506:	f02a 0304 	bic.w	r3, sl, #4
 800950a:	6023      	str	r3, [r4, #0]
 800950c:	9600      	str	r6, [sp, #0]
 800950e:	465b      	mov	r3, fp
 8009510:	aa0f      	add	r2, sp, #60	; 0x3c
 8009512:	4621      	mov	r1, r4
 8009514:	4628      	mov	r0, r5
 8009516:	f000 f9df 	bl	80098d8 <_printf_common>
 800951a:	3001      	adds	r0, #1
 800951c:	f040 809a 	bne.w	8009654 <_printf_float+0x1ec>
 8009520:	f04f 30ff 	mov.w	r0, #4294967295
 8009524:	b011      	add	sp, #68	; 0x44
 8009526:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800952a:	6862      	ldr	r2, [r4, #4]
 800952c:	a80e      	add	r0, sp, #56	; 0x38
 800952e:	1c53      	adds	r3, r2, #1
 8009530:	f10d 0e34 	add.w	lr, sp, #52	; 0x34
 8009534:	f44a 6380 	orr.w	r3, sl, #1024	; 0x400
 8009538:	d141      	bne.n	80095be <_printf_float+0x156>
 800953a:	2206      	movs	r2, #6
 800953c:	6062      	str	r2, [r4, #4]
 800953e:	2100      	movs	r1, #0
 8009540:	6023      	str	r3, [r4, #0]
 8009542:	9301      	str	r3, [sp, #4]
 8009544:	6863      	ldr	r3, [r4, #4]
 8009546:	f10d 0233 	add.w	r2, sp, #51	; 0x33
 800954a:	9005      	str	r0, [sp, #20]
 800954c:	9202      	str	r2, [sp, #8]
 800954e:	9300      	str	r3, [sp, #0]
 8009550:	463a      	mov	r2, r7
 8009552:	464b      	mov	r3, r9
 8009554:	9106      	str	r1, [sp, #24]
 8009556:	f8cd 8010 	str.w	r8, [sp, #16]
 800955a:	f8cd e00c 	str.w	lr, [sp, #12]
 800955e:	4628      	mov	r0, r5
 8009560:	f7ff fef1 	bl	8009346 <__cvt>
 8009564:	f008 03df 	and.w	r3, r8, #223	; 0xdf
 8009568:	2b47      	cmp	r3, #71	; 0x47
 800956a:	4607      	mov	r7, r0
 800956c:	d109      	bne.n	8009582 <_printf_float+0x11a>
 800956e:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009570:	1cd8      	adds	r0, r3, #3
 8009572:	db02      	blt.n	800957a <_printf_float+0x112>
 8009574:	6862      	ldr	r2, [r4, #4]
 8009576:	4293      	cmp	r3, r2
 8009578:	dd59      	ble.n	800962e <_printf_float+0x1c6>
 800957a:	f1a8 0802 	sub.w	r8, r8, #2
 800957e:	fa5f f888 	uxtb.w	r8, r8
 8009582:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 8009586:	990d      	ldr	r1, [sp, #52]	; 0x34
 8009588:	d836      	bhi.n	80095f8 <_printf_float+0x190>
 800958a:	3901      	subs	r1, #1
 800958c:	4642      	mov	r2, r8
 800958e:	f104 0050 	add.w	r0, r4, #80	; 0x50
 8009592:	910d      	str	r1, [sp, #52]	; 0x34
 8009594:	f7ff ff33 	bl	80093fe <__exponent>
 8009598:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 800959a:	4681      	mov	r9, r0
 800959c:	1883      	adds	r3, r0, r2
 800959e:	2a01      	cmp	r2, #1
 80095a0:	6123      	str	r3, [r4, #16]
 80095a2:	dc02      	bgt.n	80095aa <_printf_float+0x142>
 80095a4:	6822      	ldr	r2, [r4, #0]
 80095a6:	07d1      	lsls	r1, r2, #31
 80095a8:	d501      	bpl.n	80095ae <_printf_float+0x146>
 80095aa:	3301      	adds	r3, #1
 80095ac:	6123      	str	r3, [r4, #16]
 80095ae:	f89d 3033 	ldrb.w	r3, [sp, #51]	; 0x33
 80095b2:	2b00      	cmp	r3, #0
 80095b4:	d0aa      	beq.n	800950c <_printf_float+0xa4>
 80095b6:	232d      	movs	r3, #45	; 0x2d
 80095b8:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 80095bc:	e7a6      	b.n	800950c <_printf_float+0xa4>
 80095be:	f1b8 0f67 	cmp.w	r8, #103	; 0x67
 80095c2:	d002      	beq.n	80095ca <_printf_float+0x162>
 80095c4:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 80095c8:	d1b9      	bne.n	800953e <_printf_float+0xd6>
 80095ca:	b19a      	cbz	r2, 80095f4 <_printf_float+0x18c>
 80095cc:	2100      	movs	r1, #0
 80095ce:	9106      	str	r1, [sp, #24]
 80095d0:	f10d 0133 	add.w	r1, sp, #51	; 0x33
 80095d4:	e88d 000c 	stmia.w	sp, {r2, r3}
 80095d8:	6023      	str	r3, [r4, #0]
 80095da:	9005      	str	r0, [sp, #20]
 80095dc:	463a      	mov	r2, r7
 80095de:	f8cd 8010 	str.w	r8, [sp, #16]
 80095e2:	f8cd e00c 	str.w	lr, [sp, #12]
 80095e6:	9102      	str	r1, [sp, #8]
 80095e8:	464b      	mov	r3, r9
 80095ea:	4628      	mov	r0, r5
 80095ec:	f7ff feab 	bl	8009346 <__cvt>
 80095f0:	4607      	mov	r7, r0
 80095f2:	e7bc      	b.n	800956e <_printf_float+0x106>
 80095f4:	2201      	movs	r2, #1
 80095f6:	e7a1      	b.n	800953c <_printf_float+0xd4>
 80095f8:	f1b8 0f66 	cmp.w	r8, #102	; 0x66
 80095fc:	d119      	bne.n	8009632 <_printf_float+0x1ca>
 80095fe:	2900      	cmp	r1, #0
 8009600:	6863      	ldr	r3, [r4, #4]
 8009602:	dd0c      	ble.n	800961e <_printf_float+0x1b6>
 8009604:	6121      	str	r1, [r4, #16]
 8009606:	b913      	cbnz	r3, 800960e <_printf_float+0x1a6>
 8009608:	6822      	ldr	r2, [r4, #0]
 800960a:	07d2      	lsls	r2, r2, #31
 800960c:	d502      	bpl.n	8009614 <_printf_float+0x1ac>
 800960e:	3301      	adds	r3, #1
 8009610:	440b      	add	r3, r1
 8009612:	6123      	str	r3, [r4, #16]
 8009614:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009616:	f04f 0900 	mov.w	r9, #0
 800961a:	65a3      	str	r3, [r4, #88]	; 0x58
 800961c:	e7c7      	b.n	80095ae <_printf_float+0x146>
 800961e:	b913      	cbnz	r3, 8009626 <_printf_float+0x1be>
 8009620:	6822      	ldr	r2, [r4, #0]
 8009622:	07d0      	lsls	r0, r2, #31
 8009624:	d501      	bpl.n	800962a <_printf_float+0x1c2>
 8009626:	3302      	adds	r3, #2
 8009628:	e7f3      	b.n	8009612 <_printf_float+0x1aa>
 800962a:	2301      	movs	r3, #1
 800962c:	e7f1      	b.n	8009612 <_printf_float+0x1aa>
 800962e:	f04f 0867 	mov.w	r8, #103	; 0x67
 8009632:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009634:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8009636:	4293      	cmp	r3, r2
 8009638:	db05      	blt.n	8009646 <_printf_float+0x1de>
 800963a:	6822      	ldr	r2, [r4, #0]
 800963c:	6123      	str	r3, [r4, #16]
 800963e:	07d1      	lsls	r1, r2, #31
 8009640:	d5e8      	bpl.n	8009614 <_printf_float+0x1ac>
 8009642:	3301      	adds	r3, #1
 8009644:	e7e5      	b.n	8009612 <_printf_float+0x1aa>
 8009646:	2b00      	cmp	r3, #0
 8009648:	bfcc      	ite	gt
 800964a:	2301      	movgt	r3, #1
 800964c:	f1c3 0302 	rsble	r3, r3, #2
 8009650:	4413      	add	r3, r2
 8009652:	e7de      	b.n	8009612 <_printf_float+0x1aa>
 8009654:	6823      	ldr	r3, [r4, #0]
 8009656:	055a      	lsls	r2, r3, #21
 8009658:	d407      	bmi.n	800966a <_printf_float+0x202>
 800965a:	6923      	ldr	r3, [r4, #16]
 800965c:	463a      	mov	r2, r7
 800965e:	4659      	mov	r1, fp
 8009660:	4628      	mov	r0, r5
 8009662:	47b0      	blx	r6
 8009664:	3001      	adds	r0, #1
 8009666:	d12a      	bne.n	80096be <_printf_float+0x256>
 8009668:	e75a      	b.n	8009520 <_printf_float+0xb8>
 800966a:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 800966e:	f240 80dc 	bls.w	800982a <_printf_float+0x3c2>
 8009672:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 8009676:	2200      	movs	r2, #0
 8009678:	2300      	movs	r3, #0
 800967a:	f7fb fa09 	bl	8004a90 <__aeabi_dcmpeq>
 800967e:	2800      	cmp	r0, #0
 8009680:	d039      	beq.n	80096f6 <_printf_float+0x28e>
 8009682:	2301      	movs	r3, #1
 8009684:	4a36      	ldr	r2, [pc, #216]	; (8009760 <_printf_float+0x2f8>)
 8009686:	4659      	mov	r1, fp
 8009688:	4628      	mov	r0, r5
 800968a:	47b0      	blx	r6
 800968c:	3001      	adds	r0, #1
 800968e:	f43f af47 	beq.w	8009520 <_printf_float+0xb8>
 8009692:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009694:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8009696:	429a      	cmp	r2, r3
 8009698:	db02      	blt.n	80096a0 <_printf_float+0x238>
 800969a:	6823      	ldr	r3, [r4, #0]
 800969c:	07d8      	lsls	r0, r3, #31
 800969e:	d50e      	bpl.n	80096be <_printf_float+0x256>
 80096a0:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 80096a2:	9a09      	ldr	r2, [sp, #36]	; 0x24
 80096a4:	4659      	mov	r1, fp
 80096a6:	4628      	mov	r0, r5
 80096a8:	47b0      	blx	r6
 80096aa:	3001      	adds	r0, #1
 80096ac:	f43f af38 	beq.w	8009520 <_printf_float+0xb8>
 80096b0:	2700      	movs	r7, #0
 80096b2:	f104 081a 	add.w	r8, r4, #26
 80096b6:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 80096b8:	3b01      	subs	r3, #1
 80096ba:	429f      	cmp	r7, r3
 80096bc:	db11      	blt.n	80096e2 <_printf_float+0x27a>
 80096be:	6823      	ldr	r3, [r4, #0]
 80096c0:	079f      	lsls	r7, r3, #30
 80096c2:	d508      	bpl.n	80096d6 <_printf_float+0x26e>
 80096c4:	2700      	movs	r7, #0
 80096c6:	f104 0819 	add.w	r8, r4, #25
 80096ca:	68e3      	ldr	r3, [r4, #12]
 80096cc:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
 80096ce:	1a9b      	subs	r3, r3, r2
 80096d0:	429f      	cmp	r7, r3
 80096d2:	f2c0 80e7 	blt.w	80098a4 <_printf_float+0x43c>
 80096d6:	68e0      	ldr	r0, [r4, #12]
 80096d8:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
 80096da:	4298      	cmp	r0, r3
 80096dc:	bfb8      	it	lt
 80096de:	4618      	movlt	r0, r3
 80096e0:	e720      	b.n	8009524 <_printf_float+0xbc>
 80096e2:	2301      	movs	r3, #1
 80096e4:	4642      	mov	r2, r8
 80096e6:	4659      	mov	r1, fp
 80096e8:	4628      	mov	r0, r5
 80096ea:	47b0      	blx	r6
 80096ec:	3001      	adds	r0, #1
 80096ee:	f43f af17 	beq.w	8009520 <_printf_float+0xb8>
 80096f2:	3701      	adds	r7, #1
 80096f4:	e7df      	b.n	80096b6 <_printf_float+0x24e>
 80096f6:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 80096f8:	2b00      	cmp	r3, #0
 80096fa:	dc33      	bgt.n	8009764 <_printf_float+0x2fc>
 80096fc:	2301      	movs	r3, #1
 80096fe:	4a18      	ldr	r2, [pc, #96]	; (8009760 <_printf_float+0x2f8>)
 8009700:	4659      	mov	r1, fp
 8009702:	4628      	mov	r0, r5
 8009704:	47b0      	blx	r6
 8009706:	3001      	adds	r0, #1
 8009708:	f43f af0a 	beq.w	8009520 <_printf_float+0xb8>
 800970c:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800970e:	b923      	cbnz	r3, 800971a <_printf_float+0x2b2>
 8009710:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009712:	b913      	cbnz	r3, 800971a <_printf_float+0x2b2>
 8009714:	6823      	ldr	r3, [r4, #0]
 8009716:	07d9      	lsls	r1, r3, #31
 8009718:	d5d1      	bpl.n	80096be <_printf_float+0x256>
 800971a:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 800971c:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800971e:	4659      	mov	r1, fp
 8009720:	4628      	mov	r0, r5
 8009722:	47b0      	blx	r6
 8009724:	3001      	adds	r0, #1
 8009726:	f43f aefb 	beq.w	8009520 <_printf_float+0xb8>
 800972a:	f04f 0800 	mov.w	r8, #0
 800972e:	f104 091a 	add.w	r9, r4, #26
 8009732:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009734:	425b      	negs	r3, r3
 8009736:	4598      	cmp	r8, r3
 8009738:	db01      	blt.n	800973e <_printf_float+0x2d6>
 800973a:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800973c:	e78e      	b.n	800965c <_printf_float+0x1f4>
 800973e:	2301      	movs	r3, #1
 8009740:	464a      	mov	r2, r9
 8009742:	4659      	mov	r1, fp
 8009744:	4628      	mov	r0, r5
 8009746:	47b0      	blx	r6
 8009748:	3001      	adds	r0, #1
 800974a:	f43f aee9 	beq.w	8009520 <_printf_float+0xb8>
 800974e:	f108 0801 	add.w	r8, r8, #1
 8009752:	e7ee      	b.n	8009732 <_printf_float+0x2ca>
 8009754:	7fefffff 	.word	0x7fefffff
 8009758:	0800bc90 	.word	0x0800bc90
 800975c:	0800bc94 	.word	0x0800bc94
 8009760:	0800bca0 	.word	0x0800bca0
 8009764:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8009766:	6da3      	ldr	r3, [r4, #88]	; 0x58
 8009768:	429a      	cmp	r2, r3
 800976a:	bfa8      	it	ge
 800976c:	461a      	movge	r2, r3
 800976e:	2a00      	cmp	r2, #0
 8009770:	4690      	mov	r8, r2
 8009772:	dc36      	bgt.n	80097e2 <_printf_float+0x37a>
 8009774:	f04f 0a00 	mov.w	sl, #0
 8009778:	f104 031a 	add.w	r3, r4, #26
 800977c:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 8009780:	930b      	str	r3, [sp, #44]	; 0x2c
 8009782:	f8d4 9058 	ldr.w	r9, [r4, #88]	; 0x58
 8009786:	eba9 0308 	sub.w	r3, r9, r8
 800978a:	459a      	cmp	sl, r3
 800978c:	db31      	blt.n	80097f2 <_printf_float+0x38a>
 800978e:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009790:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8009792:	429a      	cmp	r2, r3
 8009794:	db38      	blt.n	8009808 <_printf_float+0x3a0>
 8009796:	6823      	ldr	r3, [r4, #0]
 8009798:	07da      	lsls	r2, r3, #31
 800979a:	d435      	bmi.n	8009808 <_printf_float+0x3a0>
 800979c:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800979e:	990d      	ldr	r1, [sp, #52]	; 0x34
 80097a0:	eba3 0209 	sub.w	r2, r3, r9
 80097a4:	eba3 0801 	sub.w	r8, r3, r1
 80097a8:	4590      	cmp	r8, r2
 80097aa:	bfa8      	it	ge
 80097ac:	4690      	movge	r8, r2
 80097ae:	f1b8 0f00 	cmp.w	r8, #0
 80097b2:	dc31      	bgt.n	8009818 <_printf_float+0x3b0>
 80097b4:	2700      	movs	r7, #0
 80097b6:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 80097ba:	f104 091a 	add.w	r9, r4, #26
 80097be:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 80097c0:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 80097c2:	1a9b      	subs	r3, r3, r2
 80097c4:	eba3 0308 	sub.w	r3, r3, r8
 80097c8:	429f      	cmp	r7, r3
 80097ca:	f6bf af78 	bge.w	80096be <_printf_float+0x256>
 80097ce:	2301      	movs	r3, #1
 80097d0:	464a      	mov	r2, r9
 80097d2:	4659      	mov	r1, fp
 80097d4:	4628      	mov	r0, r5
 80097d6:	47b0      	blx	r6
 80097d8:	3001      	adds	r0, #1
 80097da:	f43f aea1 	beq.w	8009520 <_printf_float+0xb8>
 80097de:	3701      	adds	r7, #1
 80097e0:	e7ed      	b.n	80097be <_printf_float+0x356>
 80097e2:	4613      	mov	r3, r2
 80097e4:	4659      	mov	r1, fp
 80097e6:	463a      	mov	r2, r7
 80097e8:	4628      	mov	r0, r5
 80097ea:	47b0      	blx	r6
 80097ec:	3001      	adds	r0, #1
 80097ee:	d1c1      	bne.n	8009774 <_printf_float+0x30c>
 80097f0:	e696      	b.n	8009520 <_printf_float+0xb8>
 80097f2:	2301      	movs	r3, #1
 80097f4:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
 80097f6:	4659      	mov	r1, fp
 80097f8:	4628      	mov	r0, r5
 80097fa:	47b0      	blx	r6
 80097fc:	3001      	adds	r0, #1
 80097fe:	f43f ae8f 	beq.w	8009520 <_printf_float+0xb8>
 8009802:	f10a 0a01 	add.w	sl, sl, #1
 8009806:	e7bc      	b.n	8009782 <_printf_float+0x31a>
 8009808:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 800980a:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800980c:	4659      	mov	r1, fp
 800980e:	4628      	mov	r0, r5
 8009810:	47b0      	blx	r6
 8009812:	3001      	adds	r0, #1
 8009814:	d1c2      	bne.n	800979c <_printf_float+0x334>
 8009816:	e683      	b.n	8009520 <_printf_float+0xb8>
 8009818:	4643      	mov	r3, r8
 800981a:	eb07 0209 	add.w	r2, r7, r9
 800981e:	4659      	mov	r1, fp
 8009820:	4628      	mov	r0, r5
 8009822:	47b0      	blx	r6
 8009824:	3001      	adds	r0, #1
 8009826:	d1c5      	bne.n	80097b4 <_printf_float+0x34c>
 8009828:	e67a      	b.n	8009520 <_printf_float+0xb8>
 800982a:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 800982c:	2a01      	cmp	r2, #1
 800982e:	dc01      	bgt.n	8009834 <_printf_float+0x3cc>
 8009830:	07db      	lsls	r3, r3, #31
 8009832:	d534      	bpl.n	800989e <_printf_float+0x436>
 8009834:	2301      	movs	r3, #1
 8009836:	463a      	mov	r2, r7
 8009838:	4659      	mov	r1, fp
 800983a:	4628      	mov	r0, r5
 800983c:	47b0      	blx	r6
 800983e:	3001      	adds	r0, #1
 8009840:	f43f ae6e 	beq.w	8009520 <_printf_float+0xb8>
 8009844:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8009846:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009848:	4659      	mov	r1, fp
 800984a:	4628      	mov	r0, r5
 800984c:	47b0      	blx	r6
 800984e:	3001      	adds	r0, #1
 8009850:	f43f ae66 	beq.w	8009520 <_printf_float+0xb8>
 8009854:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 8009858:	2200      	movs	r2, #0
 800985a:	2300      	movs	r3, #0
 800985c:	f7fb f918 	bl	8004a90 <__aeabi_dcmpeq>
 8009860:	b150      	cbz	r0, 8009878 <_printf_float+0x410>
 8009862:	2700      	movs	r7, #0
 8009864:	f104 081a 	add.w	r8, r4, #26
 8009868:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800986a:	3b01      	subs	r3, #1
 800986c:	429f      	cmp	r7, r3
 800986e:	db0c      	blt.n	800988a <_printf_float+0x422>
 8009870:	464b      	mov	r3, r9
 8009872:	f104 0250 	add.w	r2, r4, #80	; 0x50
 8009876:	e6f2      	b.n	800965e <_printf_float+0x1f6>
 8009878:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 800987a:	1c7a      	adds	r2, r7, #1
 800987c:	3b01      	subs	r3, #1
 800987e:	4659      	mov	r1, fp
 8009880:	4628      	mov	r0, r5
 8009882:	47b0      	blx	r6
 8009884:	3001      	adds	r0, #1
 8009886:	d1f3      	bne.n	8009870 <_printf_float+0x408>
 8009888:	e64a      	b.n	8009520 <_printf_float+0xb8>
 800988a:	2301      	movs	r3, #1
 800988c:	4642      	mov	r2, r8
 800988e:	4659      	mov	r1, fp
 8009890:	4628      	mov	r0, r5
 8009892:	47b0      	blx	r6
 8009894:	3001      	adds	r0, #1
 8009896:	f43f ae43 	beq.w	8009520 <_printf_float+0xb8>
 800989a:	3701      	adds	r7, #1
 800989c:	e7e4      	b.n	8009868 <_printf_float+0x400>
 800989e:	2301      	movs	r3, #1
 80098a0:	463a      	mov	r2, r7
 80098a2:	e7ec      	b.n	800987e <_printf_float+0x416>
 80098a4:	2301      	movs	r3, #1
 80098a6:	4642      	mov	r2, r8
 80098a8:	4659      	mov	r1, fp
 80098aa:	4628      	mov	r0, r5
 80098ac:	47b0      	blx	r6
 80098ae:	3001      	adds	r0, #1
 80098b0:	f43f ae36 	beq.w	8009520 <_printf_float+0xb8>
 80098b4:	3701      	adds	r7, #1
 80098b6:	e708      	b.n	80096ca <_printf_float+0x262>
 80098b8:	463a      	mov	r2, r7
 80098ba:	464b      	mov	r3, r9
 80098bc:	4638      	mov	r0, r7
 80098be:	4649      	mov	r1, r9
 80098c0:	f7fb f918 	bl	8004af4 <__aeabi_dcmpun>
 80098c4:	2800      	cmp	r0, #0
 80098c6:	f43f ae30 	beq.w	800952a <_printf_float+0xc2>
 80098ca:	4b01      	ldr	r3, [pc, #4]	; (80098d0 <_printf_float+0x468>)
 80098cc:	4f01      	ldr	r7, [pc, #4]	; (80098d4 <_printf_float+0x46c>)
 80098ce:	e612      	b.n	80094f6 <_printf_float+0x8e>
 80098d0:	0800bc98 	.word	0x0800bc98
 80098d4:	0800bc9c 	.word	0x0800bc9c

080098d8 <_printf_common>:
 80098d8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80098dc:	4691      	mov	r9, r2
 80098de:	461f      	mov	r7, r3
 80098e0:	688a      	ldr	r2, [r1, #8]
 80098e2:	690b      	ldr	r3, [r1, #16]
 80098e4:	4606      	mov	r6, r0
 80098e6:	4293      	cmp	r3, r2
 80098e8:	bfb8      	it	lt
 80098ea:	4613      	movlt	r3, r2
 80098ec:	f8c9 3000 	str.w	r3, [r9]
 80098f0:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 80098f4:	460c      	mov	r4, r1
 80098f6:	f8dd 8020 	ldr.w	r8, [sp, #32]
 80098fa:	b112      	cbz	r2, 8009902 <_printf_common+0x2a>
 80098fc:	3301      	adds	r3, #1
 80098fe:	f8c9 3000 	str.w	r3, [r9]
 8009902:	6823      	ldr	r3, [r4, #0]
 8009904:	0699      	lsls	r1, r3, #26
 8009906:	bf42      	ittt	mi
 8009908:	f8d9 3000 	ldrmi.w	r3, [r9]
 800990c:	3302      	addmi	r3, #2
 800990e:	f8c9 3000 	strmi.w	r3, [r9]
 8009912:	6825      	ldr	r5, [r4, #0]
 8009914:	f015 0506 	ands.w	r5, r5, #6
 8009918:	d107      	bne.n	800992a <_printf_common+0x52>
 800991a:	f104 0a19 	add.w	sl, r4, #25
 800991e:	68e3      	ldr	r3, [r4, #12]
 8009920:	f8d9 2000 	ldr.w	r2, [r9]
 8009924:	1a9b      	subs	r3, r3, r2
 8009926:	429d      	cmp	r5, r3
 8009928:	db2a      	blt.n	8009980 <_printf_common+0xa8>
 800992a:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 800992e:	6822      	ldr	r2, [r4, #0]
 8009930:	3300      	adds	r3, #0
 8009932:	bf18      	it	ne
 8009934:	2301      	movne	r3, #1
 8009936:	0692      	lsls	r2, r2, #26
 8009938:	d42f      	bmi.n	800999a <_printf_common+0xc2>
 800993a:	f104 0243 	add.w	r2, r4, #67	; 0x43
 800993e:	4639      	mov	r1, r7
 8009940:	4630      	mov	r0, r6
 8009942:	47c0      	blx	r8
 8009944:	3001      	adds	r0, #1
 8009946:	d022      	beq.n	800998e <_printf_common+0xb6>
 8009948:	6823      	ldr	r3, [r4, #0]
 800994a:	68e5      	ldr	r5, [r4, #12]
 800994c:	f003 0306 	and.w	r3, r3, #6
 8009950:	2b04      	cmp	r3, #4
 8009952:	bf18      	it	ne
 8009954:	2500      	movne	r5, #0
 8009956:	f8d9 2000 	ldr.w	r2, [r9]
 800995a:	f04f 0900 	mov.w	r9, #0
 800995e:	bf08      	it	eq
 8009960:	1aad      	subeq	r5, r5, r2
 8009962:	68a3      	ldr	r3, [r4, #8]
 8009964:	6922      	ldr	r2, [r4, #16]
 8009966:	bf08      	it	eq
 8009968:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 800996c:	4293      	cmp	r3, r2
 800996e:	bfc4      	itt	gt
 8009970:	1a9b      	subgt	r3, r3, r2
 8009972:	18ed      	addgt	r5, r5, r3
 8009974:	341a      	adds	r4, #26
 8009976:	454d      	cmp	r5, r9
 8009978:	d11b      	bne.n	80099b2 <_printf_common+0xda>
 800997a:	2000      	movs	r0, #0
 800997c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8009980:	2301      	movs	r3, #1
 8009982:	4652      	mov	r2, sl
 8009984:	4639      	mov	r1, r7
 8009986:	4630      	mov	r0, r6
 8009988:	47c0      	blx	r8
 800998a:	3001      	adds	r0, #1
 800998c:	d103      	bne.n	8009996 <_printf_common+0xbe>
 800998e:	f04f 30ff 	mov.w	r0, #4294967295
 8009992:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8009996:	3501      	adds	r5, #1
 8009998:	e7c1      	b.n	800991e <_printf_common+0x46>
 800999a:	2030      	movs	r0, #48	; 0x30
 800999c:	18e1      	adds	r1, r4, r3
 800999e:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 80099a2:	1c5a      	adds	r2, r3, #1
 80099a4:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 80099a8:	4422      	add	r2, r4
 80099aa:	3302      	adds	r3, #2
 80099ac:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 80099b0:	e7c3      	b.n	800993a <_printf_common+0x62>
 80099b2:	2301      	movs	r3, #1
 80099b4:	4622      	mov	r2, r4
 80099b6:	4639      	mov	r1, r7
 80099b8:	4630      	mov	r0, r6
 80099ba:	47c0      	blx	r8
 80099bc:	3001      	adds	r0, #1
 80099be:	d0e6      	beq.n	800998e <_printf_common+0xb6>
 80099c0:	f109 0901 	add.w	r9, r9, #1
 80099c4:	e7d7      	b.n	8009976 <_printf_common+0x9e>
	...

080099c8 <_printf_i>:
 80099c8:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 80099cc:	4617      	mov	r7, r2
 80099ce:	7e0a      	ldrb	r2, [r1, #24]
 80099d0:	b085      	sub	sp, #20
 80099d2:	2a6e      	cmp	r2, #110	; 0x6e
 80099d4:	4698      	mov	r8, r3
 80099d6:	4606      	mov	r6, r0
 80099d8:	460c      	mov	r4, r1
 80099da:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 80099dc:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 80099e0:	f000 80bc 	beq.w	8009b5c <_printf_i+0x194>
 80099e4:	d81a      	bhi.n	8009a1c <_printf_i+0x54>
 80099e6:	2a63      	cmp	r2, #99	; 0x63
 80099e8:	d02e      	beq.n	8009a48 <_printf_i+0x80>
 80099ea:	d80a      	bhi.n	8009a02 <_printf_i+0x3a>
 80099ec:	2a00      	cmp	r2, #0
 80099ee:	f000 80c8 	beq.w	8009b82 <_printf_i+0x1ba>
 80099f2:	2a58      	cmp	r2, #88	; 0x58
 80099f4:	f000 808a 	beq.w	8009b0c <_printf_i+0x144>
 80099f8:	f104 0542 	add.w	r5, r4, #66	; 0x42
 80099fc:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 8009a00:	e02a      	b.n	8009a58 <_printf_i+0x90>
 8009a02:	2a64      	cmp	r2, #100	; 0x64
 8009a04:	d001      	beq.n	8009a0a <_printf_i+0x42>
 8009a06:	2a69      	cmp	r2, #105	; 0x69
 8009a08:	d1f6      	bne.n	80099f8 <_printf_i+0x30>
 8009a0a:	6821      	ldr	r1, [r4, #0]
 8009a0c:	681a      	ldr	r2, [r3, #0]
 8009a0e:	f011 0f80 	tst.w	r1, #128	; 0x80
 8009a12:	d023      	beq.n	8009a5c <_printf_i+0x94>
 8009a14:	1d11      	adds	r1, r2, #4
 8009a16:	6019      	str	r1, [r3, #0]
 8009a18:	6813      	ldr	r3, [r2, #0]
 8009a1a:	e027      	b.n	8009a6c <_printf_i+0xa4>
 8009a1c:	2a73      	cmp	r2, #115	; 0x73
 8009a1e:	f000 80b4 	beq.w	8009b8a <_printf_i+0x1c2>
 8009a22:	d808      	bhi.n	8009a36 <_printf_i+0x6e>
 8009a24:	2a6f      	cmp	r2, #111	; 0x6f
 8009a26:	d02a      	beq.n	8009a7e <_printf_i+0xb6>
 8009a28:	2a70      	cmp	r2, #112	; 0x70
 8009a2a:	d1e5      	bne.n	80099f8 <_printf_i+0x30>
 8009a2c:	680a      	ldr	r2, [r1, #0]
 8009a2e:	f042 0220 	orr.w	r2, r2, #32
 8009a32:	600a      	str	r2, [r1, #0]
 8009a34:	e003      	b.n	8009a3e <_printf_i+0x76>
 8009a36:	2a75      	cmp	r2, #117	; 0x75
 8009a38:	d021      	beq.n	8009a7e <_printf_i+0xb6>
 8009a3a:	2a78      	cmp	r2, #120	; 0x78
 8009a3c:	d1dc      	bne.n	80099f8 <_printf_i+0x30>
 8009a3e:	2278      	movs	r2, #120	; 0x78
 8009a40:	496f      	ldr	r1, [pc, #444]	; (8009c00 <_printf_i+0x238>)
 8009a42:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8009a46:	e064      	b.n	8009b12 <_printf_i+0x14a>
 8009a48:	681a      	ldr	r2, [r3, #0]
 8009a4a:	f101 0542 	add.w	r5, r1, #66	; 0x42
 8009a4e:	1d11      	adds	r1, r2, #4
 8009a50:	6019      	str	r1, [r3, #0]
 8009a52:	6813      	ldr	r3, [r2, #0]
 8009a54:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8009a58:	2301      	movs	r3, #1
 8009a5a:	e0a3      	b.n	8009ba4 <_printf_i+0x1dc>
 8009a5c:	f011 0f40 	tst.w	r1, #64	; 0x40
 8009a60:	f102 0104 	add.w	r1, r2, #4
 8009a64:	6019      	str	r1, [r3, #0]
 8009a66:	d0d7      	beq.n	8009a18 <_printf_i+0x50>
 8009a68:	f9b2 3000 	ldrsh.w	r3, [r2]
 8009a6c:	2b00      	cmp	r3, #0
 8009a6e:	da03      	bge.n	8009a78 <_printf_i+0xb0>
 8009a70:	222d      	movs	r2, #45	; 0x2d
 8009a72:	425b      	negs	r3, r3
 8009a74:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8009a78:	4962      	ldr	r1, [pc, #392]	; (8009c04 <_printf_i+0x23c>)
 8009a7a:	220a      	movs	r2, #10
 8009a7c:	e017      	b.n	8009aae <_printf_i+0xe6>
 8009a7e:	6820      	ldr	r0, [r4, #0]
 8009a80:	6819      	ldr	r1, [r3, #0]
 8009a82:	f010 0f80 	tst.w	r0, #128	; 0x80
 8009a86:	d003      	beq.n	8009a90 <_printf_i+0xc8>
 8009a88:	1d08      	adds	r0, r1, #4
 8009a8a:	6018      	str	r0, [r3, #0]
 8009a8c:	680b      	ldr	r3, [r1, #0]
 8009a8e:	e006      	b.n	8009a9e <_printf_i+0xd6>
 8009a90:	f010 0f40 	tst.w	r0, #64	; 0x40
 8009a94:	f101 0004 	add.w	r0, r1, #4
 8009a98:	6018      	str	r0, [r3, #0]
 8009a9a:	d0f7      	beq.n	8009a8c <_printf_i+0xc4>
 8009a9c:	880b      	ldrh	r3, [r1, #0]
 8009a9e:	2a6f      	cmp	r2, #111	; 0x6f
 8009aa0:	bf14      	ite	ne
 8009aa2:	220a      	movne	r2, #10
 8009aa4:	2208      	moveq	r2, #8
 8009aa6:	4957      	ldr	r1, [pc, #348]	; (8009c04 <_printf_i+0x23c>)
 8009aa8:	2000      	movs	r0, #0
 8009aaa:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 8009aae:	6865      	ldr	r5, [r4, #4]
 8009ab0:	2d00      	cmp	r5, #0
 8009ab2:	60a5      	str	r5, [r4, #8]
 8009ab4:	f2c0 809c 	blt.w	8009bf0 <_printf_i+0x228>
 8009ab8:	6820      	ldr	r0, [r4, #0]
 8009aba:	f020 0004 	bic.w	r0, r0, #4
 8009abe:	6020      	str	r0, [r4, #0]
 8009ac0:	2b00      	cmp	r3, #0
 8009ac2:	d13f      	bne.n	8009b44 <_printf_i+0x17c>
 8009ac4:	2d00      	cmp	r5, #0
 8009ac6:	f040 8095 	bne.w	8009bf4 <_printf_i+0x22c>
 8009aca:	4675      	mov	r5, lr
 8009acc:	2a08      	cmp	r2, #8
 8009ace:	d10b      	bne.n	8009ae8 <_printf_i+0x120>
 8009ad0:	6823      	ldr	r3, [r4, #0]
 8009ad2:	07da      	lsls	r2, r3, #31
 8009ad4:	d508      	bpl.n	8009ae8 <_printf_i+0x120>
 8009ad6:	6923      	ldr	r3, [r4, #16]
 8009ad8:	6862      	ldr	r2, [r4, #4]
 8009ada:	429a      	cmp	r2, r3
 8009adc:	bfde      	ittt	le
 8009ade:	2330      	movle	r3, #48	; 0x30
 8009ae0:	f805 3c01 	strble.w	r3, [r5, #-1]
 8009ae4:	f105 35ff 	addle.w	r5, r5, #4294967295
 8009ae8:	ebae 0305 	sub.w	r3, lr, r5
 8009aec:	6123      	str	r3, [r4, #16]
 8009aee:	f8cd 8000 	str.w	r8, [sp]
 8009af2:	463b      	mov	r3, r7
 8009af4:	aa03      	add	r2, sp, #12
 8009af6:	4621      	mov	r1, r4
 8009af8:	4630      	mov	r0, r6
 8009afa:	f7ff feed 	bl	80098d8 <_printf_common>
 8009afe:	3001      	adds	r0, #1
 8009b00:	d155      	bne.n	8009bae <_printf_i+0x1e6>
 8009b02:	f04f 30ff 	mov.w	r0, #4294967295
 8009b06:	b005      	add	sp, #20
 8009b08:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8009b0c:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8009b10:	493c      	ldr	r1, [pc, #240]	; (8009c04 <_printf_i+0x23c>)
 8009b12:	6822      	ldr	r2, [r4, #0]
 8009b14:	6818      	ldr	r0, [r3, #0]
 8009b16:	f012 0f80 	tst.w	r2, #128	; 0x80
 8009b1a:	f100 0504 	add.w	r5, r0, #4
 8009b1e:	601d      	str	r5, [r3, #0]
 8009b20:	d001      	beq.n	8009b26 <_printf_i+0x15e>
 8009b22:	6803      	ldr	r3, [r0, #0]
 8009b24:	e002      	b.n	8009b2c <_printf_i+0x164>
 8009b26:	0655      	lsls	r5, r2, #25
 8009b28:	d5fb      	bpl.n	8009b22 <_printf_i+0x15a>
 8009b2a:	8803      	ldrh	r3, [r0, #0]
 8009b2c:	07d0      	lsls	r0, r2, #31
 8009b2e:	bf44      	itt	mi
 8009b30:	f042 0220 	orrmi.w	r2, r2, #32
 8009b34:	6022      	strmi	r2, [r4, #0]
 8009b36:	b91b      	cbnz	r3, 8009b40 <_printf_i+0x178>
 8009b38:	6822      	ldr	r2, [r4, #0]
 8009b3a:	f022 0220 	bic.w	r2, r2, #32
 8009b3e:	6022      	str	r2, [r4, #0]
 8009b40:	2210      	movs	r2, #16
 8009b42:	e7b1      	b.n	8009aa8 <_printf_i+0xe0>
 8009b44:	4675      	mov	r5, lr
 8009b46:	fbb3 f0f2 	udiv	r0, r3, r2
 8009b4a:	fb02 3310 	mls	r3, r2, r0, r3
 8009b4e:	5ccb      	ldrb	r3, [r1, r3]
 8009b50:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8009b54:	4603      	mov	r3, r0
 8009b56:	2800      	cmp	r0, #0
 8009b58:	d1f5      	bne.n	8009b46 <_printf_i+0x17e>
 8009b5a:	e7b7      	b.n	8009acc <_printf_i+0x104>
 8009b5c:	6808      	ldr	r0, [r1, #0]
 8009b5e:	681a      	ldr	r2, [r3, #0]
 8009b60:	f010 0f80 	tst.w	r0, #128	; 0x80
 8009b64:	6949      	ldr	r1, [r1, #20]
 8009b66:	d004      	beq.n	8009b72 <_printf_i+0x1aa>
 8009b68:	1d10      	adds	r0, r2, #4
 8009b6a:	6018      	str	r0, [r3, #0]
 8009b6c:	6813      	ldr	r3, [r2, #0]
 8009b6e:	6019      	str	r1, [r3, #0]
 8009b70:	e007      	b.n	8009b82 <_printf_i+0x1ba>
 8009b72:	f010 0f40 	tst.w	r0, #64	; 0x40
 8009b76:	f102 0004 	add.w	r0, r2, #4
 8009b7a:	6018      	str	r0, [r3, #0]
 8009b7c:	6813      	ldr	r3, [r2, #0]
 8009b7e:	d0f6      	beq.n	8009b6e <_printf_i+0x1a6>
 8009b80:	8019      	strh	r1, [r3, #0]
 8009b82:	2300      	movs	r3, #0
 8009b84:	4675      	mov	r5, lr
 8009b86:	6123      	str	r3, [r4, #16]
 8009b88:	e7b1      	b.n	8009aee <_printf_i+0x126>
 8009b8a:	681a      	ldr	r2, [r3, #0]
 8009b8c:	1d11      	adds	r1, r2, #4
 8009b8e:	6019      	str	r1, [r3, #0]
 8009b90:	6815      	ldr	r5, [r2, #0]
 8009b92:	2100      	movs	r1, #0
 8009b94:	6862      	ldr	r2, [r4, #4]
 8009b96:	4628      	mov	r0, r5
 8009b98:	f001 fa80 	bl	800b09c <memchr>
 8009b9c:	b108      	cbz	r0, 8009ba2 <_printf_i+0x1da>
 8009b9e:	1b40      	subs	r0, r0, r5
 8009ba0:	6060      	str	r0, [r4, #4]
 8009ba2:	6863      	ldr	r3, [r4, #4]
 8009ba4:	6123      	str	r3, [r4, #16]
 8009ba6:	2300      	movs	r3, #0
 8009ba8:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8009bac:	e79f      	b.n	8009aee <_printf_i+0x126>
 8009bae:	6923      	ldr	r3, [r4, #16]
 8009bb0:	462a      	mov	r2, r5
 8009bb2:	4639      	mov	r1, r7
 8009bb4:	4630      	mov	r0, r6
 8009bb6:	47c0      	blx	r8
 8009bb8:	3001      	adds	r0, #1
 8009bba:	d0a2      	beq.n	8009b02 <_printf_i+0x13a>
 8009bbc:	6823      	ldr	r3, [r4, #0]
 8009bbe:	079b      	lsls	r3, r3, #30
 8009bc0:	d507      	bpl.n	8009bd2 <_printf_i+0x20a>
 8009bc2:	2500      	movs	r5, #0
 8009bc4:	f104 0919 	add.w	r9, r4, #25
 8009bc8:	68e3      	ldr	r3, [r4, #12]
 8009bca:	9a03      	ldr	r2, [sp, #12]
 8009bcc:	1a9b      	subs	r3, r3, r2
 8009bce:	429d      	cmp	r5, r3
 8009bd0:	db05      	blt.n	8009bde <_printf_i+0x216>
 8009bd2:	68e0      	ldr	r0, [r4, #12]
 8009bd4:	9b03      	ldr	r3, [sp, #12]
 8009bd6:	4298      	cmp	r0, r3
 8009bd8:	bfb8      	it	lt
 8009bda:	4618      	movlt	r0, r3
 8009bdc:	e793      	b.n	8009b06 <_printf_i+0x13e>
 8009bde:	2301      	movs	r3, #1
 8009be0:	464a      	mov	r2, r9
 8009be2:	4639      	mov	r1, r7
 8009be4:	4630      	mov	r0, r6
 8009be6:	47c0      	blx	r8
 8009be8:	3001      	adds	r0, #1
 8009bea:	d08a      	beq.n	8009b02 <_printf_i+0x13a>
 8009bec:	3501      	adds	r5, #1
 8009bee:	e7eb      	b.n	8009bc8 <_printf_i+0x200>
 8009bf0:	2b00      	cmp	r3, #0
 8009bf2:	d1a7      	bne.n	8009b44 <_printf_i+0x17c>
 8009bf4:	780b      	ldrb	r3, [r1, #0]
 8009bf6:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8009bfa:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8009bfe:	e765      	b.n	8009acc <_printf_i+0x104>
 8009c00:	0800bcb3 	.word	0x0800bcb3
 8009c04:	0800bca2 	.word	0x0800bca2

08009c08 <iprintf>:
 8009c08:	b40f      	push	{r0, r1, r2, r3}
 8009c0a:	4b0a      	ldr	r3, [pc, #40]	; (8009c34 <iprintf+0x2c>)
 8009c0c:	b513      	push	{r0, r1, r4, lr}
 8009c0e:	681c      	ldr	r4, [r3, #0]
 8009c10:	b124      	cbz	r4, 8009c1c <iprintf+0x14>
 8009c12:	69a3      	ldr	r3, [r4, #24]
 8009c14:	b913      	cbnz	r3, 8009c1c <iprintf+0x14>
 8009c16:	4620      	mov	r0, r4
 8009c18:	f001 f93c 	bl	800ae94 <__sinit>
 8009c1c:	ab05      	add	r3, sp, #20
 8009c1e:	9a04      	ldr	r2, [sp, #16]
 8009c20:	68a1      	ldr	r1, [r4, #8]
 8009c22:	4620      	mov	r0, r4
 8009c24:	9301      	str	r3, [sp, #4]
 8009c26:	f001 fdf9 	bl	800b81c <_vfiprintf_r>
 8009c2a:	b002      	add	sp, #8
 8009c2c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8009c30:	b004      	add	sp, #16
 8009c32:	4770      	bx	lr
 8009c34:	2000024c 	.word	0x2000024c

08009c38 <_puts_r>:
 8009c38:	b570      	push	{r4, r5, r6, lr}
 8009c3a:	460e      	mov	r6, r1
 8009c3c:	4605      	mov	r5, r0
 8009c3e:	b118      	cbz	r0, 8009c48 <_puts_r+0x10>
 8009c40:	6983      	ldr	r3, [r0, #24]
 8009c42:	b90b      	cbnz	r3, 8009c48 <_puts_r+0x10>
 8009c44:	f001 f926 	bl	800ae94 <__sinit>
 8009c48:	69ab      	ldr	r3, [r5, #24]
 8009c4a:	68ac      	ldr	r4, [r5, #8]
 8009c4c:	b913      	cbnz	r3, 8009c54 <_puts_r+0x1c>
 8009c4e:	4628      	mov	r0, r5
 8009c50:	f001 f920 	bl	800ae94 <__sinit>
 8009c54:	4b23      	ldr	r3, [pc, #140]	; (8009ce4 <_puts_r+0xac>)
 8009c56:	429c      	cmp	r4, r3
 8009c58:	d117      	bne.n	8009c8a <_puts_r+0x52>
 8009c5a:	686c      	ldr	r4, [r5, #4]
 8009c5c:	89a3      	ldrh	r3, [r4, #12]
 8009c5e:	071b      	lsls	r3, r3, #28
 8009c60:	d51d      	bpl.n	8009c9e <_puts_r+0x66>
 8009c62:	6923      	ldr	r3, [r4, #16]
 8009c64:	b1db      	cbz	r3, 8009c9e <_puts_r+0x66>
 8009c66:	3e01      	subs	r6, #1
 8009c68:	68a3      	ldr	r3, [r4, #8]
 8009c6a:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8009c6e:	3b01      	subs	r3, #1
 8009c70:	60a3      	str	r3, [r4, #8]
 8009c72:	b9e9      	cbnz	r1, 8009cb0 <_puts_r+0x78>
 8009c74:	2b00      	cmp	r3, #0
 8009c76:	da2e      	bge.n	8009cd6 <_puts_r+0x9e>
 8009c78:	4622      	mov	r2, r4
 8009c7a:	210a      	movs	r1, #10
 8009c7c:	4628      	mov	r0, r5
 8009c7e:	f000 f8f5 	bl	8009e6c <__swbuf_r>
 8009c82:	3001      	adds	r0, #1
 8009c84:	d011      	beq.n	8009caa <_puts_r+0x72>
 8009c86:	200a      	movs	r0, #10
 8009c88:	bd70      	pop	{r4, r5, r6, pc}
 8009c8a:	4b17      	ldr	r3, [pc, #92]	; (8009ce8 <_puts_r+0xb0>)
 8009c8c:	429c      	cmp	r4, r3
 8009c8e:	d101      	bne.n	8009c94 <_puts_r+0x5c>
 8009c90:	68ac      	ldr	r4, [r5, #8]
 8009c92:	e7e3      	b.n	8009c5c <_puts_r+0x24>
 8009c94:	4b15      	ldr	r3, [pc, #84]	; (8009cec <_puts_r+0xb4>)
 8009c96:	429c      	cmp	r4, r3
 8009c98:	bf08      	it	eq
 8009c9a:	68ec      	ldreq	r4, [r5, #12]
 8009c9c:	e7de      	b.n	8009c5c <_puts_r+0x24>
 8009c9e:	4621      	mov	r1, r4
 8009ca0:	4628      	mov	r0, r5
 8009ca2:	f000 f935 	bl	8009f10 <__swsetup_r>
 8009ca6:	2800      	cmp	r0, #0
 8009ca8:	d0dd      	beq.n	8009c66 <_puts_r+0x2e>
 8009caa:	f04f 30ff 	mov.w	r0, #4294967295
 8009cae:	bd70      	pop	{r4, r5, r6, pc}
 8009cb0:	2b00      	cmp	r3, #0
 8009cb2:	da04      	bge.n	8009cbe <_puts_r+0x86>
 8009cb4:	69a2      	ldr	r2, [r4, #24]
 8009cb6:	4293      	cmp	r3, r2
 8009cb8:	db06      	blt.n	8009cc8 <_puts_r+0x90>
 8009cba:	290a      	cmp	r1, #10
 8009cbc:	d004      	beq.n	8009cc8 <_puts_r+0x90>
 8009cbe:	6823      	ldr	r3, [r4, #0]
 8009cc0:	1c5a      	adds	r2, r3, #1
 8009cc2:	6022      	str	r2, [r4, #0]
 8009cc4:	7019      	strb	r1, [r3, #0]
 8009cc6:	e7cf      	b.n	8009c68 <_puts_r+0x30>
 8009cc8:	4622      	mov	r2, r4
 8009cca:	4628      	mov	r0, r5
 8009ccc:	f000 f8ce 	bl	8009e6c <__swbuf_r>
 8009cd0:	3001      	adds	r0, #1
 8009cd2:	d1c9      	bne.n	8009c68 <_puts_r+0x30>
 8009cd4:	e7e9      	b.n	8009caa <_puts_r+0x72>
 8009cd6:	200a      	movs	r0, #10
 8009cd8:	6823      	ldr	r3, [r4, #0]
 8009cda:	1c5a      	adds	r2, r3, #1
 8009cdc:	6022      	str	r2, [r4, #0]
 8009cde:	7018      	strb	r0, [r3, #0]
 8009ce0:	bd70      	pop	{r4, r5, r6, pc}
 8009ce2:	bf00      	nop
 8009ce4:	0800bcf4 	.word	0x0800bcf4
 8009ce8:	0800bd14 	.word	0x0800bd14
 8009cec:	0800bcd4 	.word	0x0800bcd4

08009cf0 <puts>:
 8009cf0:	4b02      	ldr	r3, [pc, #8]	; (8009cfc <puts+0xc>)
 8009cf2:	4601      	mov	r1, r0
 8009cf4:	6818      	ldr	r0, [r3, #0]
 8009cf6:	f7ff bf9f 	b.w	8009c38 <_puts_r>
 8009cfa:	bf00      	nop
 8009cfc:	2000024c 	.word	0x2000024c

08009d00 <setbuf>:
 8009d00:	2900      	cmp	r1, #0
 8009d02:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8009d06:	bf0c      	ite	eq
 8009d08:	2202      	moveq	r2, #2
 8009d0a:	2200      	movne	r2, #0
 8009d0c:	f000 b800 	b.w	8009d10 <setvbuf>

08009d10 <setvbuf>:
 8009d10:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 8009d14:	461d      	mov	r5, r3
 8009d16:	4b51      	ldr	r3, [pc, #324]	; (8009e5c <setvbuf+0x14c>)
 8009d18:	4604      	mov	r4, r0
 8009d1a:	681e      	ldr	r6, [r3, #0]
 8009d1c:	460f      	mov	r7, r1
 8009d1e:	4690      	mov	r8, r2
 8009d20:	b126      	cbz	r6, 8009d2c <setvbuf+0x1c>
 8009d22:	69b3      	ldr	r3, [r6, #24]
 8009d24:	b913      	cbnz	r3, 8009d2c <setvbuf+0x1c>
 8009d26:	4630      	mov	r0, r6
 8009d28:	f001 f8b4 	bl	800ae94 <__sinit>
 8009d2c:	4b4c      	ldr	r3, [pc, #304]	; (8009e60 <setvbuf+0x150>)
 8009d2e:	429c      	cmp	r4, r3
 8009d30:	d152      	bne.n	8009dd8 <setvbuf+0xc8>
 8009d32:	6874      	ldr	r4, [r6, #4]
 8009d34:	f1b8 0f02 	cmp.w	r8, #2
 8009d38:	d006      	beq.n	8009d48 <setvbuf+0x38>
 8009d3a:	f1b8 0f01 	cmp.w	r8, #1
 8009d3e:	f200 8089 	bhi.w	8009e54 <setvbuf+0x144>
 8009d42:	2d00      	cmp	r5, #0
 8009d44:	f2c0 8086 	blt.w	8009e54 <setvbuf+0x144>
 8009d48:	4621      	mov	r1, r4
 8009d4a:	4630      	mov	r0, r6
 8009d4c:	f001 f838 	bl	800adc0 <_fflush_r>
 8009d50:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8009d52:	b141      	cbz	r1, 8009d66 <setvbuf+0x56>
 8009d54:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8009d58:	4299      	cmp	r1, r3
 8009d5a:	d002      	beq.n	8009d62 <setvbuf+0x52>
 8009d5c:	4630      	mov	r0, r6
 8009d5e:	f001 fc8b 	bl	800b678 <_free_r>
 8009d62:	2300      	movs	r3, #0
 8009d64:	6363      	str	r3, [r4, #52]	; 0x34
 8009d66:	2300      	movs	r3, #0
 8009d68:	61a3      	str	r3, [r4, #24]
 8009d6a:	6063      	str	r3, [r4, #4]
 8009d6c:	89a3      	ldrh	r3, [r4, #12]
 8009d6e:	061b      	lsls	r3, r3, #24
 8009d70:	d503      	bpl.n	8009d7a <setvbuf+0x6a>
 8009d72:	6921      	ldr	r1, [r4, #16]
 8009d74:	4630      	mov	r0, r6
 8009d76:	f001 fc7f 	bl	800b678 <_free_r>
 8009d7a:	89a3      	ldrh	r3, [r4, #12]
 8009d7c:	f1b8 0f02 	cmp.w	r8, #2
 8009d80:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 8009d84:	f023 0303 	bic.w	r3, r3, #3
 8009d88:	81a3      	strh	r3, [r4, #12]
 8009d8a:	d05d      	beq.n	8009e48 <setvbuf+0x138>
 8009d8c:	ab01      	add	r3, sp, #4
 8009d8e:	466a      	mov	r2, sp
 8009d90:	4621      	mov	r1, r4
 8009d92:	4630      	mov	r0, r6
 8009d94:	f001 f916 	bl	800afc4 <__swhatbuf_r>
 8009d98:	89a3      	ldrh	r3, [r4, #12]
 8009d9a:	4318      	orrs	r0, r3
 8009d9c:	81a0      	strh	r0, [r4, #12]
 8009d9e:	bb2d      	cbnz	r5, 8009dec <setvbuf+0xdc>
 8009da0:	9d00      	ldr	r5, [sp, #0]
 8009da2:	4628      	mov	r0, r5
 8009da4:	f001 f972 	bl	800b08c <malloc>
 8009da8:	4607      	mov	r7, r0
 8009daa:	2800      	cmp	r0, #0
 8009dac:	d14e      	bne.n	8009e4c <setvbuf+0x13c>
 8009dae:	f8dd 9000 	ldr.w	r9, [sp]
 8009db2:	45a9      	cmp	r9, r5
 8009db4:	d13c      	bne.n	8009e30 <setvbuf+0x120>
 8009db6:	f04f 30ff 	mov.w	r0, #4294967295
 8009dba:	89a3      	ldrh	r3, [r4, #12]
 8009dbc:	f043 0302 	orr.w	r3, r3, #2
 8009dc0:	81a3      	strh	r3, [r4, #12]
 8009dc2:	2300      	movs	r3, #0
 8009dc4:	60a3      	str	r3, [r4, #8]
 8009dc6:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8009dca:	6023      	str	r3, [r4, #0]
 8009dcc:	6123      	str	r3, [r4, #16]
 8009dce:	2301      	movs	r3, #1
 8009dd0:	6163      	str	r3, [r4, #20]
 8009dd2:	b003      	add	sp, #12
 8009dd4:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8009dd8:	4b22      	ldr	r3, [pc, #136]	; (8009e64 <setvbuf+0x154>)
 8009dda:	429c      	cmp	r4, r3
 8009ddc:	d101      	bne.n	8009de2 <setvbuf+0xd2>
 8009dde:	68b4      	ldr	r4, [r6, #8]
 8009de0:	e7a8      	b.n	8009d34 <setvbuf+0x24>
 8009de2:	4b21      	ldr	r3, [pc, #132]	; (8009e68 <setvbuf+0x158>)
 8009de4:	429c      	cmp	r4, r3
 8009de6:	bf08      	it	eq
 8009de8:	68f4      	ldreq	r4, [r6, #12]
 8009dea:	e7a3      	b.n	8009d34 <setvbuf+0x24>
 8009dec:	2f00      	cmp	r7, #0
 8009dee:	d0d8      	beq.n	8009da2 <setvbuf+0x92>
 8009df0:	69b3      	ldr	r3, [r6, #24]
 8009df2:	b913      	cbnz	r3, 8009dfa <setvbuf+0xea>
 8009df4:	4630      	mov	r0, r6
 8009df6:	f001 f84d 	bl	800ae94 <__sinit>
 8009dfa:	f1b8 0f01 	cmp.w	r8, #1
 8009dfe:	bf08      	it	eq
 8009e00:	89a3      	ldrheq	r3, [r4, #12]
 8009e02:	6027      	str	r7, [r4, #0]
 8009e04:	bf04      	itt	eq
 8009e06:	f043 0301 	orreq.w	r3, r3, #1
 8009e0a:	81a3      	strheq	r3, [r4, #12]
 8009e0c:	89a3      	ldrh	r3, [r4, #12]
 8009e0e:	6127      	str	r7, [r4, #16]
 8009e10:	f013 0008 	ands.w	r0, r3, #8
 8009e14:	6165      	str	r5, [r4, #20]
 8009e16:	d01b      	beq.n	8009e50 <setvbuf+0x140>
 8009e18:	f013 0001 	ands.w	r0, r3, #1
 8009e1c:	f04f 0300 	mov.w	r3, #0
 8009e20:	bf1f      	itttt	ne
 8009e22:	426d      	negne	r5, r5
 8009e24:	60a3      	strne	r3, [r4, #8]
 8009e26:	61a5      	strne	r5, [r4, #24]
 8009e28:	4618      	movne	r0, r3
 8009e2a:	bf08      	it	eq
 8009e2c:	60a5      	streq	r5, [r4, #8]
 8009e2e:	e7d0      	b.n	8009dd2 <setvbuf+0xc2>
 8009e30:	4648      	mov	r0, r9
 8009e32:	f001 f92b 	bl	800b08c <malloc>
 8009e36:	4607      	mov	r7, r0
 8009e38:	2800      	cmp	r0, #0
 8009e3a:	d0bc      	beq.n	8009db6 <setvbuf+0xa6>
 8009e3c:	89a3      	ldrh	r3, [r4, #12]
 8009e3e:	464d      	mov	r5, r9
 8009e40:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8009e44:	81a3      	strh	r3, [r4, #12]
 8009e46:	e7d3      	b.n	8009df0 <setvbuf+0xe0>
 8009e48:	2000      	movs	r0, #0
 8009e4a:	e7b6      	b.n	8009dba <setvbuf+0xaa>
 8009e4c:	46a9      	mov	r9, r5
 8009e4e:	e7f5      	b.n	8009e3c <setvbuf+0x12c>
 8009e50:	60a0      	str	r0, [r4, #8]
 8009e52:	e7be      	b.n	8009dd2 <setvbuf+0xc2>
 8009e54:	f04f 30ff 	mov.w	r0, #4294967295
 8009e58:	e7bb      	b.n	8009dd2 <setvbuf+0xc2>
 8009e5a:	bf00      	nop
 8009e5c:	2000024c 	.word	0x2000024c
 8009e60:	0800bcf4 	.word	0x0800bcf4
 8009e64:	0800bd14 	.word	0x0800bd14
 8009e68:	0800bcd4 	.word	0x0800bcd4

08009e6c <__swbuf_r>:
 8009e6c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8009e6e:	460e      	mov	r6, r1
 8009e70:	4614      	mov	r4, r2
 8009e72:	4605      	mov	r5, r0
 8009e74:	b118      	cbz	r0, 8009e7e <__swbuf_r+0x12>
 8009e76:	6983      	ldr	r3, [r0, #24]
 8009e78:	b90b      	cbnz	r3, 8009e7e <__swbuf_r+0x12>
 8009e7a:	f001 f80b 	bl	800ae94 <__sinit>
 8009e7e:	4b21      	ldr	r3, [pc, #132]	; (8009f04 <__swbuf_r+0x98>)
 8009e80:	429c      	cmp	r4, r3
 8009e82:	d12a      	bne.n	8009eda <__swbuf_r+0x6e>
 8009e84:	686c      	ldr	r4, [r5, #4]
 8009e86:	69a3      	ldr	r3, [r4, #24]
 8009e88:	60a3      	str	r3, [r4, #8]
 8009e8a:	89a3      	ldrh	r3, [r4, #12]
 8009e8c:	071a      	lsls	r2, r3, #28
 8009e8e:	d52e      	bpl.n	8009eee <__swbuf_r+0x82>
 8009e90:	6923      	ldr	r3, [r4, #16]
 8009e92:	b363      	cbz	r3, 8009eee <__swbuf_r+0x82>
 8009e94:	6923      	ldr	r3, [r4, #16]
 8009e96:	6820      	ldr	r0, [r4, #0]
 8009e98:	b2f6      	uxtb	r6, r6
 8009e9a:	1ac0      	subs	r0, r0, r3
 8009e9c:	6963      	ldr	r3, [r4, #20]
 8009e9e:	4637      	mov	r7, r6
 8009ea0:	4298      	cmp	r0, r3
 8009ea2:	db04      	blt.n	8009eae <__swbuf_r+0x42>
 8009ea4:	4621      	mov	r1, r4
 8009ea6:	4628      	mov	r0, r5
 8009ea8:	f000 ff8a 	bl	800adc0 <_fflush_r>
 8009eac:	bb28      	cbnz	r0, 8009efa <__swbuf_r+0x8e>
 8009eae:	68a3      	ldr	r3, [r4, #8]
 8009eb0:	3001      	adds	r0, #1
 8009eb2:	3b01      	subs	r3, #1
 8009eb4:	60a3      	str	r3, [r4, #8]
 8009eb6:	6823      	ldr	r3, [r4, #0]
 8009eb8:	1c5a      	adds	r2, r3, #1
 8009eba:	6022      	str	r2, [r4, #0]
 8009ebc:	701e      	strb	r6, [r3, #0]
 8009ebe:	6963      	ldr	r3, [r4, #20]
 8009ec0:	4298      	cmp	r0, r3
 8009ec2:	d004      	beq.n	8009ece <__swbuf_r+0x62>
 8009ec4:	89a3      	ldrh	r3, [r4, #12]
 8009ec6:	07db      	lsls	r3, r3, #31
 8009ec8:	d519      	bpl.n	8009efe <__swbuf_r+0x92>
 8009eca:	2e0a      	cmp	r6, #10
 8009ecc:	d117      	bne.n	8009efe <__swbuf_r+0x92>
 8009ece:	4621      	mov	r1, r4
 8009ed0:	4628      	mov	r0, r5
 8009ed2:	f000 ff75 	bl	800adc0 <_fflush_r>
 8009ed6:	b190      	cbz	r0, 8009efe <__swbuf_r+0x92>
 8009ed8:	e00f      	b.n	8009efa <__swbuf_r+0x8e>
 8009eda:	4b0b      	ldr	r3, [pc, #44]	; (8009f08 <__swbuf_r+0x9c>)
 8009edc:	429c      	cmp	r4, r3
 8009ede:	d101      	bne.n	8009ee4 <__swbuf_r+0x78>
 8009ee0:	68ac      	ldr	r4, [r5, #8]
 8009ee2:	e7d0      	b.n	8009e86 <__swbuf_r+0x1a>
 8009ee4:	4b09      	ldr	r3, [pc, #36]	; (8009f0c <__swbuf_r+0xa0>)
 8009ee6:	429c      	cmp	r4, r3
 8009ee8:	bf08      	it	eq
 8009eea:	68ec      	ldreq	r4, [r5, #12]
 8009eec:	e7cb      	b.n	8009e86 <__swbuf_r+0x1a>
 8009eee:	4621      	mov	r1, r4
 8009ef0:	4628      	mov	r0, r5
 8009ef2:	f000 f80d 	bl	8009f10 <__swsetup_r>
 8009ef6:	2800      	cmp	r0, #0
 8009ef8:	d0cc      	beq.n	8009e94 <__swbuf_r+0x28>
 8009efa:	f04f 37ff 	mov.w	r7, #4294967295
 8009efe:	4638      	mov	r0, r7
 8009f00:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8009f02:	bf00      	nop
 8009f04:	0800bcf4 	.word	0x0800bcf4
 8009f08:	0800bd14 	.word	0x0800bd14
 8009f0c:	0800bcd4 	.word	0x0800bcd4

08009f10 <__swsetup_r>:
 8009f10:	4b32      	ldr	r3, [pc, #200]	; (8009fdc <__swsetup_r+0xcc>)
 8009f12:	b570      	push	{r4, r5, r6, lr}
 8009f14:	681d      	ldr	r5, [r3, #0]
 8009f16:	4606      	mov	r6, r0
 8009f18:	460c      	mov	r4, r1
 8009f1a:	b125      	cbz	r5, 8009f26 <__swsetup_r+0x16>
 8009f1c:	69ab      	ldr	r3, [r5, #24]
 8009f1e:	b913      	cbnz	r3, 8009f26 <__swsetup_r+0x16>
 8009f20:	4628      	mov	r0, r5
 8009f22:	f000 ffb7 	bl	800ae94 <__sinit>
 8009f26:	4b2e      	ldr	r3, [pc, #184]	; (8009fe0 <__swsetup_r+0xd0>)
 8009f28:	429c      	cmp	r4, r3
 8009f2a:	d10f      	bne.n	8009f4c <__swsetup_r+0x3c>
 8009f2c:	686c      	ldr	r4, [r5, #4]
 8009f2e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8009f32:	b29a      	uxth	r2, r3
 8009f34:	0715      	lsls	r5, r2, #28
 8009f36:	d42c      	bmi.n	8009f92 <__swsetup_r+0x82>
 8009f38:	06d0      	lsls	r0, r2, #27
 8009f3a:	d411      	bmi.n	8009f60 <__swsetup_r+0x50>
 8009f3c:	2209      	movs	r2, #9
 8009f3e:	6032      	str	r2, [r6, #0]
 8009f40:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8009f44:	81a3      	strh	r3, [r4, #12]
 8009f46:	f04f 30ff 	mov.w	r0, #4294967295
 8009f4a:	bd70      	pop	{r4, r5, r6, pc}
 8009f4c:	4b25      	ldr	r3, [pc, #148]	; (8009fe4 <__swsetup_r+0xd4>)
 8009f4e:	429c      	cmp	r4, r3
 8009f50:	d101      	bne.n	8009f56 <__swsetup_r+0x46>
 8009f52:	68ac      	ldr	r4, [r5, #8]
 8009f54:	e7eb      	b.n	8009f2e <__swsetup_r+0x1e>
 8009f56:	4b24      	ldr	r3, [pc, #144]	; (8009fe8 <__swsetup_r+0xd8>)
 8009f58:	429c      	cmp	r4, r3
 8009f5a:	bf08      	it	eq
 8009f5c:	68ec      	ldreq	r4, [r5, #12]
 8009f5e:	e7e6      	b.n	8009f2e <__swsetup_r+0x1e>
 8009f60:	0751      	lsls	r1, r2, #29
 8009f62:	d512      	bpl.n	8009f8a <__swsetup_r+0x7a>
 8009f64:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8009f66:	b141      	cbz	r1, 8009f7a <__swsetup_r+0x6a>
 8009f68:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8009f6c:	4299      	cmp	r1, r3
 8009f6e:	d002      	beq.n	8009f76 <__swsetup_r+0x66>
 8009f70:	4630      	mov	r0, r6
 8009f72:	f001 fb81 	bl	800b678 <_free_r>
 8009f76:	2300      	movs	r3, #0
 8009f78:	6363      	str	r3, [r4, #52]	; 0x34
 8009f7a:	89a3      	ldrh	r3, [r4, #12]
 8009f7c:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 8009f80:	81a3      	strh	r3, [r4, #12]
 8009f82:	2300      	movs	r3, #0
 8009f84:	6063      	str	r3, [r4, #4]
 8009f86:	6923      	ldr	r3, [r4, #16]
 8009f88:	6023      	str	r3, [r4, #0]
 8009f8a:	89a3      	ldrh	r3, [r4, #12]
 8009f8c:	f043 0308 	orr.w	r3, r3, #8
 8009f90:	81a3      	strh	r3, [r4, #12]
 8009f92:	6923      	ldr	r3, [r4, #16]
 8009f94:	b94b      	cbnz	r3, 8009faa <__swsetup_r+0x9a>
 8009f96:	89a3      	ldrh	r3, [r4, #12]
 8009f98:	f403 7320 	and.w	r3, r3, #640	; 0x280
 8009f9c:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 8009fa0:	d003      	beq.n	8009faa <__swsetup_r+0x9a>
 8009fa2:	4621      	mov	r1, r4
 8009fa4:	4630      	mov	r0, r6
 8009fa6:	f001 f831 	bl	800b00c <__smakebuf_r>
 8009faa:	89a2      	ldrh	r2, [r4, #12]
 8009fac:	f012 0301 	ands.w	r3, r2, #1
 8009fb0:	d00c      	beq.n	8009fcc <__swsetup_r+0xbc>
 8009fb2:	2300      	movs	r3, #0
 8009fb4:	60a3      	str	r3, [r4, #8]
 8009fb6:	6963      	ldr	r3, [r4, #20]
 8009fb8:	425b      	negs	r3, r3
 8009fba:	61a3      	str	r3, [r4, #24]
 8009fbc:	6923      	ldr	r3, [r4, #16]
 8009fbe:	b953      	cbnz	r3, 8009fd6 <__swsetup_r+0xc6>
 8009fc0:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8009fc4:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 8009fc8:	d1ba      	bne.n	8009f40 <__swsetup_r+0x30>
 8009fca:	bd70      	pop	{r4, r5, r6, pc}
 8009fcc:	0792      	lsls	r2, r2, #30
 8009fce:	bf58      	it	pl
 8009fd0:	6963      	ldrpl	r3, [r4, #20]
 8009fd2:	60a3      	str	r3, [r4, #8]
 8009fd4:	e7f2      	b.n	8009fbc <__swsetup_r+0xac>
 8009fd6:	2000      	movs	r0, #0
 8009fd8:	e7f7      	b.n	8009fca <__swsetup_r+0xba>
 8009fda:	bf00      	nop
 8009fdc:	2000024c 	.word	0x2000024c
 8009fe0:	0800bcf4 	.word	0x0800bcf4
 8009fe4:	0800bd14 	.word	0x0800bd14
 8009fe8:	0800bcd4 	.word	0x0800bcd4

08009fec <quorem>:
 8009fec:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8009ff0:	6903      	ldr	r3, [r0, #16]
 8009ff2:	690c      	ldr	r4, [r1, #16]
 8009ff4:	4680      	mov	r8, r0
 8009ff6:	429c      	cmp	r4, r3
 8009ff8:	f300 8082 	bgt.w	800a100 <quorem+0x114>
 8009ffc:	3c01      	subs	r4, #1
 8009ffe:	f101 0714 	add.w	r7, r1, #20
 800a002:	f100 0614 	add.w	r6, r0, #20
 800a006:	f857 5024 	ldr.w	r5, [r7, r4, lsl #2]
 800a00a:	f856 0024 	ldr.w	r0, [r6, r4, lsl #2]
 800a00e:	3501      	adds	r5, #1
 800a010:	fbb0 f5f5 	udiv	r5, r0, r5
 800a014:	ea4f 0e84 	mov.w	lr, r4, lsl #2
 800a018:	eb06 030e 	add.w	r3, r6, lr
 800a01c:	eb07 090e 	add.w	r9, r7, lr
 800a020:	9301      	str	r3, [sp, #4]
 800a022:	b38d      	cbz	r5, 800a088 <quorem+0x9c>
 800a024:	f04f 0a00 	mov.w	sl, #0
 800a028:	4638      	mov	r0, r7
 800a02a:	46b4      	mov	ip, r6
 800a02c:	46d3      	mov	fp, sl
 800a02e:	f850 2b04 	ldr.w	r2, [r0], #4
 800a032:	b293      	uxth	r3, r2
 800a034:	fb05 a303 	mla	r3, r5, r3, sl
 800a038:	0c12      	lsrs	r2, r2, #16
 800a03a:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 800a03e:	fb05 a202 	mla	r2, r5, r2, sl
 800a042:	b29b      	uxth	r3, r3
 800a044:	ebab 0303 	sub.w	r3, fp, r3
 800a048:	f8bc b000 	ldrh.w	fp, [ip]
 800a04c:	ea4f 4a12 	mov.w	sl, r2, lsr #16
 800a050:	445b      	add	r3, fp
 800a052:	fa1f fb82 	uxth.w	fp, r2
 800a056:	f8dc 2000 	ldr.w	r2, [ip]
 800a05a:	4581      	cmp	r9, r0
 800a05c:	ebcb 4212 	rsb	r2, fp, r2, lsr #16
 800a060:	eb02 4223 	add.w	r2, r2, r3, asr #16
 800a064:	b29b      	uxth	r3, r3
 800a066:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 800a06a:	ea4f 4b22 	mov.w	fp, r2, asr #16
 800a06e:	f84c 3b04 	str.w	r3, [ip], #4
 800a072:	d2dc      	bcs.n	800a02e <quorem+0x42>
 800a074:	f856 300e 	ldr.w	r3, [r6, lr]
 800a078:	b933      	cbnz	r3, 800a088 <quorem+0x9c>
 800a07a:	9b01      	ldr	r3, [sp, #4]
 800a07c:	3b04      	subs	r3, #4
 800a07e:	429e      	cmp	r6, r3
 800a080:	461a      	mov	r2, r3
 800a082:	d331      	bcc.n	800a0e8 <quorem+0xfc>
 800a084:	f8c8 4010 	str.w	r4, [r8, #16]
 800a088:	4640      	mov	r0, r8
 800a08a:	f001 fa1e 	bl	800b4ca <__mcmp>
 800a08e:	2800      	cmp	r0, #0
 800a090:	db26      	blt.n	800a0e0 <quorem+0xf4>
 800a092:	4630      	mov	r0, r6
 800a094:	f04f 0e00 	mov.w	lr, #0
 800a098:	3501      	adds	r5, #1
 800a09a:	f857 1b04 	ldr.w	r1, [r7], #4
 800a09e:	f8d0 c000 	ldr.w	ip, [r0]
 800a0a2:	b28b      	uxth	r3, r1
 800a0a4:	ebae 0303 	sub.w	r3, lr, r3
 800a0a8:	fa1f f28c 	uxth.w	r2, ip
 800a0ac:	4413      	add	r3, r2
 800a0ae:	0c0a      	lsrs	r2, r1, #16
 800a0b0:	ebc2 421c 	rsb	r2, r2, ip, lsr #16
 800a0b4:	eb02 4223 	add.w	r2, r2, r3, asr #16
 800a0b8:	b29b      	uxth	r3, r3
 800a0ba:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 800a0be:	45b9      	cmp	r9, r7
 800a0c0:	ea4f 4e22 	mov.w	lr, r2, asr #16
 800a0c4:	f840 3b04 	str.w	r3, [r0], #4
 800a0c8:	d2e7      	bcs.n	800a09a <quorem+0xae>
 800a0ca:	f856 2024 	ldr.w	r2, [r6, r4, lsl #2]
 800a0ce:	eb06 0384 	add.w	r3, r6, r4, lsl #2
 800a0d2:	b92a      	cbnz	r2, 800a0e0 <quorem+0xf4>
 800a0d4:	3b04      	subs	r3, #4
 800a0d6:	429e      	cmp	r6, r3
 800a0d8:	461a      	mov	r2, r3
 800a0da:	d30b      	bcc.n	800a0f4 <quorem+0x108>
 800a0dc:	f8c8 4010 	str.w	r4, [r8, #16]
 800a0e0:	4628      	mov	r0, r5
 800a0e2:	b003      	add	sp, #12
 800a0e4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800a0e8:	6812      	ldr	r2, [r2, #0]
 800a0ea:	3b04      	subs	r3, #4
 800a0ec:	2a00      	cmp	r2, #0
 800a0ee:	d1c9      	bne.n	800a084 <quorem+0x98>
 800a0f0:	3c01      	subs	r4, #1
 800a0f2:	e7c4      	b.n	800a07e <quorem+0x92>
 800a0f4:	6812      	ldr	r2, [r2, #0]
 800a0f6:	3b04      	subs	r3, #4
 800a0f8:	2a00      	cmp	r2, #0
 800a0fa:	d1ef      	bne.n	800a0dc <quorem+0xf0>
 800a0fc:	3c01      	subs	r4, #1
 800a0fe:	e7ea      	b.n	800a0d6 <quorem+0xea>
 800a100:	2000      	movs	r0, #0
 800a102:	e7ee      	b.n	800a0e2 <quorem+0xf6>
 800a104:	0000      	movs	r0, r0
	...

0800a108 <_dtoa_r>:
 800a108:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800a10c:	6a46      	ldr	r6, [r0, #36]	; 0x24
 800a10e:	b095      	sub	sp, #84	; 0x54
 800a110:	4604      	mov	r4, r0
 800a112:	9d21      	ldr	r5, [sp, #132]	; 0x84
 800a114:	e9cd 2302 	strd	r2, r3, [sp, #8]
 800a118:	b93e      	cbnz	r6, 800a12a <_dtoa_r+0x22>
 800a11a:	2010      	movs	r0, #16
 800a11c:	f000 ffb6 	bl	800b08c <malloc>
 800a120:	6260      	str	r0, [r4, #36]	; 0x24
 800a122:	6046      	str	r6, [r0, #4]
 800a124:	6086      	str	r6, [r0, #8]
 800a126:	6006      	str	r6, [r0, #0]
 800a128:	60c6      	str	r6, [r0, #12]
 800a12a:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800a12c:	6819      	ldr	r1, [r3, #0]
 800a12e:	b151      	cbz	r1, 800a146 <_dtoa_r+0x3e>
 800a130:	685a      	ldr	r2, [r3, #4]
 800a132:	2301      	movs	r3, #1
 800a134:	4093      	lsls	r3, r2
 800a136:	604a      	str	r2, [r1, #4]
 800a138:	608b      	str	r3, [r1, #8]
 800a13a:	4620      	mov	r0, r4
 800a13c:	f000 fff0 	bl	800b120 <_Bfree>
 800a140:	2200      	movs	r2, #0
 800a142:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800a144:	601a      	str	r2, [r3, #0]
 800a146:	9b03      	ldr	r3, [sp, #12]
 800a148:	2b00      	cmp	r3, #0
 800a14a:	bfb7      	itett	lt
 800a14c:	2301      	movlt	r3, #1
 800a14e:	2300      	movge	r3, #0
 800a150:	602b      	strlt	r3, [r5, #0]
 800a152:	9b03      	ldrlt	r3, [sp, #12]
 800a154:	bfae      	itee	ge
 800a156:	602b      	strge	r3, [r5, #0]
 800a158:	f023 4300 	biclt.w	r3, r3, #2147483648	; 0x80000000
 800a15c:	9303      	strlt	r3, [sp, #12]
 800a15e:	f8dd 900c 	ldr.w	r9, [sp, #12]
 800a162:	4bab      	ldr	r3, [pc, #684]	; (800a410 <_dtoa_r+0x308>)
 800a164:	ea33 0309 	bics.w	r3, r3, r9
 800a168:	d11b      	bne.n	800a1a2 <_dtoa_r+0x9a>
 800a16a:	f242 730f 	movw	r3, #9999	; 0x270f
 800a16e:	9a20      	ldr	r2, [sp, #128]	; 0x80
 800a170:	6013      	str	r3, [r2, #0]
 800a172:	9b02      	ldr	r3, [sp, #8]
 800a174:	b923      	cbnz	r3, 800a180 <_dtoa_r+0x78>
 800a176:	f3c9 0013 	ubfx	r0, r9, #0, #20
 800a17a:	2800      	cmp	r0, #0
 800a17c:	f000 8583 	beq.w	800ac86 <_dtoa_r+0xb7e>
 800a180:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800a182:	b953      	cbnz	r3, 800a19a <_dtoa_r+0x92>
 800a184:	4ba3      	ldr	r3, [pc, #652]	; (800a414 <_dtoa_r+0x30c>)
 800a186:	e021      	b.n	800a1cc <_dtoa_r+0xc4>
 800a188:	4ba3      	ldr	r3, [pc, #652]	; (800a418 <_dtoa_r+0x310>)
 800a18a:	9306      	str	r3, [sp, #24]
 800a18c:	3308      	adds	r3, #8
 800a18e:	9a22      	ldr	r2, [sp, #136]	; 0x88
 800a190:	6013      	str	r3, [r2, #0]
 800a192:	9806      	ldr	r0, [sp, #24]
 800a194:	b015      	add	sp, #84	; 0x54
 800a196:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800a19a:	4b9e      	ldr	r3, [pc, #632]	; (800a414 <_dtoa_r+0x30c>)
 800a19c:	9306      	str	r3, [sp, #24]
 800a19e:	3303      	adds	r3, #3
 800a1a0:	e7f5      	b.n	800a18e <_dtoa_r+0x86>
 800a1a2:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 800a1a6:	2200      	movs	r2, #0
 800a1a8:	2300      	movs	r3, #0
 800a1aa:	4630      	mov	r0, r6
 800a1ac:	4639      	mov	r1, r7
 800a1ae:	f7fa fc6f 	bl	8004a90 <__aeabi_dcmpeq>
 800a1b2:	4680      	mov	r8, r0
 800a1b4:	b160      	cbz	r0, 800a1d0 <_dtoa_r+0xc8>
 800a1b6:	2301      	movs	r3, #1
 800a1b8:	9a20      	ldr	r2, [sp, #128]	; 0x80
 800a1ba:	6013      	str	r3, [r2, #0]
 800a1bc:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800a1be:	2b00      	cmp	r3, #0
 800a1c0:	f000 855e 	beq.w	800ac80 <_dtoa_r+0xb78>
 800a1c4:	4b95      	ldr	r3, [pc, #596]	; (800a41c <_dtoa_r+0x314>)
 800a1c6:	9a22      	ldr	r2, [sp, #136]	; 0x88
 800a1c8:	6013      	str	r3, [r2, #0]
 800a1ca:	3b01      	subs	r3, #1
 800a1cc:	9306      	str	r3, [sp, #24]
 800a1ce:	e7e0      	b.n	800a192 <_dtoa_r+0x8a>
 800a1d0:	ab12      	add	r3, sp, #72	; 0x48
 800a1d2:	9301      	str	r3, [sp, #4]
 800a1d4:	ab13      	add	r3, sp, #76	; 0x4c
 800a1d6:	9300      	str	r3, [sp, #0]
 800a1d8:	4632      	mov	r2, r6
 800a1da:	463b      	mov	r3, r7
 800a1dc:	4620      	mov	r0, r4
 800a1de:	f001 f9ed 	bl	800b5bc <__d2b>
 800a1e2:	f3c9 550a 	ubfx	r5, r9, #20, #11
 800a1e6:	4682      	mov	sl, r0
 800a1e8:	2d00      	cmp	r5, #0
 800a1ea:	d07d      	beq.n	800a2e8 <_dtoa_r+0x1e0>
 800a1ec:	4630      	mov	r0, r6
 800a1ee:	f3c7 0313 	ubfx	r3, r7, #0, #20
 800a1f2:	f043 517f 	orr.w	r1, r3, #1069547520	; 0x3fc00000
 800a1f6:	f441 1140 	orr.w	r1, r1, #3145728	; 0x300000
 800a1fa:	f2a5 35ff 	subw	r5, r5, #1023	; 0x3ff
 800a1fe:	f8cd 8040 	str.w	r8, [sp, #64]	; 0x40
 800a202:	2200      	movs	r2, #0
 800a204:	4b86      	ldr	r3, [pc, #536]	; (800a420 <_dtoa_r+0x318>)
 800a206:	f7fa f827 	bl	8004258 <__aeabi_dsub>
 800a20a:	a37b      	add	r3, pc, #492	; (adr r3, 800a3f8 <_dtoa_r+0x2f0>)
 800a20c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a210:	f7fa f9d6 	bl	80045c0 <__aeabi_dmul>
 800a214:	a37a      	add	r3, pc, #488	; (adr r3, 800a400 <_dtoa_r+0x2f8>)
 800a216:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a21a:	f7fa f81f 	bl	800425c <__adddf3>
 800a21e:	4606      	mov	r6, r0
 800a220:	4628      	mov	r0, r5
 800a222:	460f      	mov	r7, r1
 800a224:	f7fa f966 	bl	80044f4 <__aeabi_i2d>
 800a228:	a377      	add	r3, pc, #476	; (adr r3, 800a408 <_dtoa_r+0x300>)
 800a22a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a22e:	f7fa f9c7 	bl	80045c0 <__aeabi_dmul>
 800a232:	4602      	mov	r2, r0
 800a234:	460b      	mov	r3, r1
 800a236:	4630      	mov	r0, r6
 800a238:	4639      	mov	r1, r7
 800a23a:	f7fa f80f 	bl	800425c <__adddf3>
 800a23e:	4606      	mov	r6, r0
 800a240:	460f      	mov	r7, r1
 800a242:	f7fa fc6d 	bl	8004b20 <__aeabi_d2iz>
 800a246:	2200      	movs	r2, #0
 800a248:	4683      	mov	fp, r0
 800a24a:	2300      	movs	r3, #0
 800a24c:	4630      	mov	r0, r6
 800a24e:	4639      	mov	r1, r7
 800a250:	f7fa fc28 	bl	8004aa4 <__aeabi_dcmplt>
 800a254:	b158      	cbz	r0, 800a26e <_dtoa_r+0x166>
 800a256:	4658      	mov	r0, fp
 800a258:	f7fa f94c 	bl	80044f4 <__aeabi_i2d>
 800a25c:	4602      	mov	r2, r0
 800a25e:	460b      	mov	r3, r1
 800a260:	4630      	mov	r0, r6
 800a262:	4639      	mov	r1, r7
 800a264:	f7fa fc14 	bl	8004a90 <__aeabi_dcmpeq>
 800a268:	b908      	cbnz	r0, 800a26e <_dtoa_r+0x166>
 800a26a:	f10b 3bff 	add.w	fp, fp, #4294967295
 800a26e:	f1bb 0f16 	cmp.w	fp, #22
 800a272:	d858      	bhi.n	800a326 <_dtoa_r+0x21e>
 800a274:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a278:	496a      	ldr	r1, [pc, #424]	; (800a424 <_dtoa_r+0x31c>)
 800a27a:	eb01 01cb 	add.w	r1, r1, fp, lsl #3
 800a27e:	e9d1 0100 	ldrd	r0, r1, [r1]
 800a282:	f7fa fc2d 	bl	8004ae0 <__aeabi_dcmpgt>
 800a286:	2800      	cmp	r0, #0
 800a288:	d04f      	beq.n	800a32a <_dtoa_r+0x222>
 800a28a:	2300      	movs	r3, #0
 800a28c:	f10b 3bff 	add.w	fp, fp, #4294967295
 800a290:	930d      	str	r3, [sp, #52]	; 0x34
 800a292:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800a294:	1b5d      	subs	r5, r3, r5
 800a296:	1e6b      	subs	r3, r5, #1
 800a298:	9307      	str	r3, [sp, #28]
 800a29a:	bf43      	ittte	mi
 800a29c:	2300      	movmi	r3, #0
 800a29e:	f1c5 0801 	rsbmi	r8, r5, #1
 800a2a2:	9307      	strmi	r3, [sp, #28]
 800a2a4:	f04f 0800 	movpl.w	r8, #0
 800a2a8:	f1bb 0f00 	cmp.w	fp, #0
 800a2ac:	db3f      	blt.n	800a32e <_dtoa_r+0x226>
 800a2ae:	9b07      	ldr	r3, [sp, #28]
 800a2b0:	f8cd b030 	str.w	fp, [sp, #48]	; 0x30
 800a2b4:	445b      	add	r3, fp
 800a2b6:	9307      	str	r3, [sp, #28]
 800a2b8:	2300      	movs	r3, #0
 800a2ba:	9308      	str	r3, [sp, #32]
 800a2bc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a2be:	2b09      	cmp	r3, #9
 800a2c0:	f200 80b4 	bhi.w	800a42c <_dtoa_r+0x324>
 800a2c4:	2b05      	cmp	r3, #5
 800a2c6:	bfc4      	itt	gt
 800a2c8:	3b04      	subgt	r3, #4
 800a2ca:	931e      	strgt	r3, [sp, #120]	; 0x78
 800a2cc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a2ce:	bfc8      	it	gt
 800a2d0:	2600      	movgt	r6, #0
 800a2d2:	f1a3 0302 	sub.w	r3, r3, #2
 800a2d6:	bfd8      	it	le
 800a2d8:	2601      	movle	r6, #1
 800a2da:	2b03      	cmp	r3, #3
 800a2dc:	f200 80b2 	bhi.w	800a444 <_dtoa_r+0x33c>
 800a2e0:	e8df f003 	tbb	[pc, r3]
 800a2e4:	782d8684 	.word	0x782d8684
 800a2e8:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 800a2ea:	9d12      	ldr	r5, [sp, #72]	; 0x48
 800a2ec:	441d      	add	r5, r3
 800a2ee:	f205 4332 	addw	r3, r5, #1074	; 0x432
 800a2f2:	2b20      	cmp	r3, #32
 800a2f4:	dd11      	ble.n	800a31a <_dtoa_r+0x212>
 800a2f6:	9a02      	ldr	r2, [sp, #8]
 800a2f8:	f205 4012 	addw	r0, r5, #1042	; 0x412
 800a2fc:	f1c3 0340 	rsb	r3, r3, #64	; 0x40
 800a300:	fa22 f000 	lsr.w	r0, r2, r0
 800a304:	fa09 f303 	lsl.w	r3, r9, r3
 800a308:	4318      	orrs	r0, r3
 800a30a:	f7fa f8e3 	bl	80044d4 <__aeabi_ui2d>
 800a30e:	2301      	movs	r3, #1
 800a310:	f1a1 71f8 	sub.w	r1, r1, #32505856	; 0x1f00000
 800a314:	3d01      	subs	r5, #1
 800a316:	9310      	str	r3, [sp, #64]	; 0x40
 800a318:	e773      	b.n	800a202 <_dtoa_r+0xfa>
 800a31a:	f1c3 0020 	rsb	r0, r3, #32
 800a31e:	9b02      	ldr	r3, [sp, #8]
 800a320:	fa03 f000 	lsl.w	r0, r3, r0
 800a324:	e7f1      	b.n	800a30a <_dtoa_r+0x202>
 800a326:	2301      	movs	r3, #1
 800a328:	e7b2      	b.n	800a290 <_dtoa_r+0x188>
 800a32a:	900d      	str	r0, [sp, #52]	; 0x34
 800a32c:	e7b1      	b.n	800a292 <_dtoa_r+0x18a>
 800a32e:	f1cb 0300 	rsb	r3, fp, #0
 800a332:	9308      	str	r3, [sp, #32]
 800a334:	2300      	movs	r3, #0
 800a336:	eba8 080b 	sub.w	r8, r8, fp
 800a33a:	930c      	str	r3, [sp, #48]	; 0x30
 800a33c:	e7be      	b.n	800a2bc <_dtoa_r+0x1b4>
 800a33e:	2301      	movs	r3, #1
 800a340:	9309      	str	r3, [sp, #36]	; 0x24
 800a342:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800a344:	2b00      	cmp	r3, #0
 800a346:	f340 8080 	ble.w	800a44a <_dtoa_r+0x342>
 800a34a:	4699      	mov	r9, r3
 800a34c:	9304      	str	r3, [sp, #16]
 800a34e:	2200      	movs	r2, #0
 800a350:	2104      	movs	r1, #4
 800a352:	6a65      	ldr	r5, [r4, #36]	; 0x24
 800a354:	606a      	str	r2, [r5, #4]
 800a356:	f101 0214 	add.w	r2, r1, #20
 800a35a:	429a      	cmp	r2, r3
 800a35c:	d97a      	bls.n	800a454 <_dtoa_r+0x34c>
 800a35e:	6869      	ldr	r1, [r5, #4]
 800a360:	4620      	mov	r0, r4
 800a362:	f000 fea9 	bl	800b0b8 <_Balloc>
 800a366:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800a368:	6028      	str	r0, [r5, #0]
 800a36a:	681b      	ldr	r3, [r3, #0]
 800a36c:	f1b9 0f0e 	cmp.w	r9, #14
 800a370:	9306      	str	r3, [sp, #24]
 800a372:	f200 80f0 	bhi.w	800a556 <_dtoa_r+0x44e>
 800a376:	2e00      	cmp	r6, #0
 800a378:	f000 80ed 	beq.w	800a556 <_dtoa_r+0x44e>
 800a37c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a380:	f1bb 0f00 	cmp.w	fp, #0
 800a384:	e9cd 230e 	strd	r2, r3, [sp, #56]	; 0x38
 800a388:	dd79      	ble.n	800a47e <_dtoa_r+0x376>
 800a38a:	4a26      	ldr	r2, [pc, #152]	; (800a424 <_dtoa_r+0x31c>)
 800a38c:	f00b 030f 	and.w	r3, fp, #15
 800a390:	ea4f 162b 	mov.w	r6, fp, asr #4
 800a394:	eb02 03c3 	add.w	r3, r2, r3, lsl #3
 800a398:	06f0      	lsls	r0, r6, #27
 800a39a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a39e:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 800a3a2:	d55c      	bpl.n	800a45e <_dtoa_r+0x356>
 800a3a4:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 800a3a8:	4b1f      	ldr	r3, [pc, #124]	; (800a428 <_dtoa_r+0x320>)
 800a3aa:	2503      	movs	r5, #3
 800a3ac:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
 800a3b0:	f7fa fa30 	bl	8004814 <__aeabi_ddiv>
 800a3b4:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a3b8:	f006 060f 	and.w	r6, r6, #15
 800a3bc:	4f1a      	ldr	r7, [pc, #104]	; (800a428 <_dtoa_r+0x320>)
 800a3be:	2e00      	cmp	r6, #0
 800a3c0:	d14f      	bne.n	800a462 <_dtoa_r+0x35a>
 800a3c2:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a3c6:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a3ca:	f7fa fa23 	bl	8004814 <__aeabi_ddiv>
 800a3ce:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a3d2:	e06e      	b.n	800a4b2 <_dtoa_r+0x3aa>
 800a3d4:	2301      	movs	r3, #1
 800a3d6:	9309      	str	r3, [sp, #36]	; 0x24
 800a3d8:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800a3da:	445b      	add	r3, fp
 800a3dc:	f103 0901 	add.w	r9, r3, #1
 800a3e0:	9304      	str	r3, [sp, #16]
 800a3e2:	464b      	mov	r3, r9
 800a3e4:	2b01      	cmp	r3, #1
 800a3e6:	bfb8      	it	lt
 800a3e8:	2301      	movlt	r3, #1
 800a3ea:	e7b0      	b.n	800a34e <_dtoa_r+0x246>
 800a3ec:	2300      	movs	r3, #0
 800a3ee:	e7a7      	b.n	800a340 <_dtoa_r+0x238>
 800a3f0:	2300      	movs	r3, #0
 800a3f2:	e7f0      	b.n	800a3d6 <_dtoa_r+0x2ce>
 800a3f4:	f3af 8000 	nop.w
 800a3f8:	636f4361 	.word	0x636f4361
 800a3fc:	3fd287a7 	.word	0x3fd287a7
 800a400:	8b60c8b3 	.word	0x8b60c8b3
 800a404:	3fc68a28 	.word	0x3fc68a28
 800a408:	509f79fb 	.word	0x509f79fb
 800a40c:	3fd34413 	.word	0x3fd34413
 800a410:	7ff00000 	.word	0x7ff00000
 800a414:	0800bccd 	.word	0x0800bccd
 800a418:	0800bcc4 	.word	0x0800bcc4
 800a41c:	0800bca1 	.word	0x0800bca1
 800a420:	3ff80000 	.word	0x3ff80000
 800a424:	0800bd60 	.word	0x0800bd60
 800a428:	0800bd38 	.word	0x0800bd38
 800a42c:	2601      	movs	r6, #1
 800a42e:	2300      	movs	r3, #0
 800a430:	9609      	str	r6, [sp, #36]	; 0x24
 800a432:	931e      	str	r3, [sp, #120]	; 0x78
 800a434:	f04f 33ff 	mov.w	r3, #4294967295
 800a438:	2200      	movs	r2, #0
 800a43a:	9304      	str	r3, [sp, #16]
 800a43c:	4699      	mov	r9, r3
 800a43e:	2312      	movs	r3, #18
 800a440:	921f      	str	r2, [sp, #124]	; 0x7c
 800a442:	e784      	b.n	800a34e <_dtoa_r+0x246>
 800a444:	2301      	movs	r3, #1
 800a446:	9309      	str	r3, [sp, #36]	; 0x24
 800a448:	e7f4      	b.n	800a434 <_dtoa_r+0x32c>
 800a44a:	2301      	movs	r3, #1
 800a44c:	9304      	str	r3, [sp, #16]
 800a44e:	4699      	mov	r9, r3
 800a450:	461a      	mov	r2, r3
 800a452:	e7f5      	b.n	800a440 <_dtoa_r+0x338>
 800a454:	686a      	ldr	r2, [r5, #4]
 800a456:	0049      	lsls	r1, r1, #1
 800a458:	3201      	adds	r2, #1
 800a45a:	606a      	str	r2, [r5, #4]
 800a45c:	e77b      	b.n	800a356 <_dtoa_r+0x24e>
 800a45e:	2502      	movs	r5, #2
 800a460:	e7ac      	b.n	800a3bc <_dtoa_r+0x2b4>
 800a462:	07f1      	lsls	r1, r6, #31
 800a464:	d508      	bpl.n	800a478 <_dtoa_r+0x370>
 800a466:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a46a:	e9d7 2300 	ldrd	r2, r3, [r7]
 800a46e:	f7fa f8a7 	bl	80045c0 <__aeabi_dmul>
 800a472:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a476:	3501      	adds	r5, #1
 800a478:	1076      	asrs	r6, r6, #1
 800a47a:	3708      	adds	r7, #8
 800a47c:	e79f      	b.n	800a3be <_dtoa_r+0x2b6>
 800a47e:	f000 80a5 	beq.w	800a5cc <_dtoa_r+0x4c4>
 800a482:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 800a486:	f1cb 0600 	rsb	r6, fp, #0
 800a48a:	4ba2      	ldr	r3, [pc, #648]	; (800a714 <_dtoa_r+0x60c>)
 800a48c:	f006 020f 	and.w	r2, r6, #15
 800a490:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 800a494:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a498:	f7fa f892 	bl	80045c0 <__aeabi_dmul>
 800a49c:	2502      	movs	r5, #2
 800a49e:	2300      	movs	r3, #0
 800a4a0:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a4a4:	4f9c      	ldr	r7, [pc, #624]	; (800a718 <_dtoa_r+0x610>)
 800a4a6:	1136      	asrs	r6, r6, #4
 800a4a8:	2e00      	cmp	r6, #0
 800a4aa:	f040 8084 	bne.w	800a5b6 <_dtoa_r+0x4ae>
 800a4ae:	2b00      	cmp	r3, #0
 800a4b0:	d18d      	bne.n	800a3ce <_dtoa_r+0x2c6>
 800a4b2:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800a4b4:	2b00      	cmp	r3, #0
 800a4b6:	f000 808b 	beq.w	800a5d0 <_dtoa_r+0x4c8>
 800a4ba:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a4be:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 800a4c2:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a4c6:	2200      	movs	r2, #0
 800a4c8:	4b94      	ldr	r3, [pc, #592]	; (800a71c <_dtoa_r+0x614>)
 800a4ca:	f7fa faeb 	bl	8004aa4 <__aeabi_dcmplt>
 800a4ce:	2800      	cmp	r0, #0
 800a4d0:	d07e      	beq.n	800a5d0 <_dtoa_r+0x4c8>
 800a4d2:	f1b9 0f00 	cmp.w	r9, #0
 800a4d6:	d07b      	beq.n	800a5d0 <_dtoa_r+0x4c8>
 800a4d8:	9b04      	ldr	r3, [sp, #16]
 800a4da:	2b00      	cmp	r3, #0
 800a4dc:	dd37      	ble.n	800a54e <_dtoa_r+0x446>
 800a4de:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a4e2:	2200      	movs	r2, #0
 800a4e4:	4b8e      	ldr	r3, [pc, #568]	; (800a720 <_dtoa_r+0x618>)
 800a4e6:	f7fa f86b 	bl	80045c0 <__aeabi_dmul>
 800a4ea:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a4ee:	9e04      	ldr	r6, [sp, #16]
 800a4f0:	f10b 37ff 	add.w	r7, fp, #4294967295
 800a4f4:	3501      	adds	r5, #1
 800a4f6:	4628      	mov	r0, r5
 800a4f8:	f7f9 fffc 	bl	80044f4 <__aeabi_i2d>
 800a4fc:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a500:	f7fa f85e 	bl	80045c0 <__aeabi_dmul>
 800a504:	4b87      	ldr	r3, [pc, #540]	; (800a724 <_dtoa_r+0x61c>)
 800a506:	2200      	movs	r2, #0
 800a508:	f7f9 fea8 	bl	800425c <__adddf3>
 800a50c:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a510:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
 800a512:	f1a3 7550 	sub.w	r5, r3, #54525952	; 0x3400000
 800a516:	950b      	str	r5, [sp, #44]	; 0x2c
 800a518:	2e00      	cmp	r6, #0
 800a51a:	d15c      	bne.n	800a5d6 <_dtoa_r+0x4ce>
 800a51c:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a520:	2200      	movs	r2, #0
 800a522:	4b81      	ldr	r3, [pc, #516]	; (800a728 <_dtoa_r+0x620>)
 800a524:	f7f9 fe98 	bl	8004258 <__aeabi_dsub>
 800a528:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 800a52a:	462b      	mov	r3, r5
 800a52c:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a530:	f7fa fad6 	bl	8004ae0 <__aeabi_dcmpgt>
 800a534:	2800      	cmp	r0, #0
 800a536:	f040 82f7 	bne.w	800ab28 <_dtoa_r+0xa20>
 800a53a:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a53e:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 800a540:	f105 4300 	add.w	r3, r5, #2147483648	; 0x80000000
 800a544:	f7fa faae 	bl	8004aa4 <__aeabi_dcmplt>
 800a548:	2800      	cmp	r0, #0
 800a54a:	f040 82eb 	bne.w	800ab24 <_dtoa_r+0xa1c>
 800a54e:	e9dd 230e 	ldrd	r2, r3, [sp, #56]	; 0x38
 800a552:	e9cd 2302 	strd	r2, r3, [sp, #8]
 800a556:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 800a558:	2b00      	cmp	r3, #0
 800a55a:	f2c0 8150 	blt.w	800a7fe <_dtoa_r+0x6f6>
 800a55e:	f1bb 0f0e 	cmp.w	fp, #14
 800a562:	f300 814c 	bgt.w	800a7fe <_dtoa_r+0x6f6>
 800a566:	4b6b      	ldr	r3, [pc, #428]	; (800a714 <_dtoa_r+0x60c>)
 800a568:	eb03 03cb 	add.w	r3, r3, fp, lsl #3
 800a56c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a570:	e9cd 2304 	strd	r2, r3, [sp, #16]
 800a574:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800a576:	2b00      	cmp	r3, #0
 800a578:	f280 80da 	bge.w	800a730 <_dtoa_r+0x628>
 800a57c:	f1b9 0f00 	cmp.w	r9, #0
 800a580:	f300 80d6 	bgt.w	800a730 <_dtoa_r+0x628>
 800a584:	f040 82cd 	bne.w	800ab22 <_dtoa_r+0xa1a>
 800a588:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800a58c:	2200      	movs	r2, #0
 800a58e:	4b66      	ldr	r3, [pc, #408]	; (800a728 <_dtoa_r+0x620>)
 800a590:	f7fa f816 	bl	80045c0 <__aeabi_dmul>
 800a594:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a598:	f7fa fa98 	bl	8004acc <__aeabi_dcmpge>
 800a59c:	464e      	mov	r6, r9
 800a59e:	464f      	mov	r7, r9
 800a5a0:	2800      	cmp	r0, #0
 800a5a2:	f040 82a4 	bne.w	800aaee <_dtoa_r+0x9e6>
 800a5a6:	9b06      	ldr	r3, [sp, #24]
 800a5a8:	9a06      	ldr	r2, [sp, #24]
 800a5aa:	1c5d      	adds	r5, r3, #1
 800a5ac:	2331      	movs	r3, #49	; 0x31
 800a5ae:	f10b 0b01 	add.w	fp, fp, #1
 800a5b2:	7013      	strb	r3, [r2, #0]
 800a5b4:	e29f      	b.n	800aaf6 <_dtoa_r+0x9ee>
 800a5b6:	07f2      	lsls	r2, r6, #31
 800a5b8:	d505      	bpl.n	800a5c6 <_dtoa_r+0x4be>
 800a5ba:	e9d7 2300 	ldrd	r2, r3, [r7]
 800a5be:	f7f9 ffff 	bl	80045c0 <__aeabi_dmul>
 800a5c2:	2301      	movs	r3, #1
 800a5c4:	3501      	adds	r5, #1
 800a5c6:	1076      	asrs	r6, r6, #1
 800a5c8:	3708      	adds	r7, #8
 800a5ca:	e76d      	b.n	800a4a8 <_dtoa_r+0x3a0>
 800a5cc:	2502      	movs	r5, #2
 800a5ce:	e770      	b.n	800a4b2 <_dtoa_r+0x3aa>
 800a5d0:	465f      	mov	r7, fp
 800a5d2:	464e      	mov	r6, r9
 800a5d4:	e78f      	b.n	800a4f6 <_dtoa_r+0x3ee>
 800a5d6:	9a06      	ldr	r2, [sp, #24]
 800a5d8:	4b4e      	ldr	r3, [pc, #312]	; (800a714 <_dtoa_r+0x60c>)
 800a5da:	4432      	add	r2, r6
 800a5dc:	9211      	str	r2, [sp, #68]	; 0x44
 800a5de:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800a5e0:	1e71      	subs	r1, r6, #1
 800a5e2:	2a00      	cmp	r2, #0
 800a5e4:	d048      	beq.n	800a678 <_dtoa_r+0x570>
 800a5e6:	eb03 03c1 	add.w	r3, r3, r1, lsl #3
 800a5ea:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a5ee:	2000      	movs	r0, #0
 800a5f0:	494e      	ldr	r1, [pc, #312]	; (800a72c <_dtoa_r+0x624>)
 800a5f2:	f7fa f90f 	bl	8004814 <__aeabi_ddiv>
 800a5f6:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a5fa:	f7f9 fe2d 	bl	8004258 <__aeabi_dsub>
 800a5fe:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a602:	9d06      	ldr	r5, [sp, #24]
 800a604:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a608:	f7fa fa8a 	bl	8004b20 <__aeabi_d2iz>
 800a60c:	4606      	mov	r6, r0
 800a60e:	f7f9 ff71 	bl	80044f4 <__aeabi_i2d>
 800a612:	4602      	mov	r2, r0
 800a614:	460b      	mov	r3, r1
 800a616:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a61a:	f7f9 fe1d 	bl	8004258 <__aeabi_dsub>
 800a61e:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a622:	3630      	adds	r6, #48	; 0x30
 800a624:	f805 6b01 	strb.w	r6, [r5], #1
 800a628:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a62c:	f7fa fa3a 	bl	8004aa4 <__aeabi_dcmplt>
 800a630:	2800      	cmp	r0, #0
 800a632:	d164      	bne.n	800a6fe <_dtoa_r+0x5f6>
 800a634:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a638:	2000      	movs	r0, #0
 800a63a:	4938      	ldr	r1, [pc, #224]	; (800a71c <_dtoa_r+0x614>)
 800a63c:	f7f9 fe0c 	bl	8004258 <__aeabi_dsub>
 800a640:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a644:	f7fa fa2e 	bl	8004aa4 <__aeabi_dcmplt>
 800a648:	2800      	cmp	r0, #0
 800a64a:	f040 80b9 	bne.w	800a7c0 <_dtoa_r+0x6b8>
 800a64e:	9b11      	ldr	r3, [sp, #68]	; 0x44
 800a650:	429d      	cmp	r5, r3
 800a652:	f43f af7c 	beq.w	800a54e <_dtoa_r+0x446>
 800a656:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a65a:	2200      	movs	r2, #0
 800a65c:	4b30      	ldr	r3, [pc, #192]	; (800a720 <_dtoa_r+0x618>)
 800a65e:	f7f9 ffaf 	bl	80045c0 <__aeabi_dmul>
 800a662:	2200      	movs	r2, #0
 800a664:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a668:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a66c:	4b2c      	ldr	r3, [pc, #176]	; (800a720 <_dtoa_r+0x618>)
 800a66e:	f7f9 ffa7 	bl	80045c0 <__aeabi_dmul>
 800a672:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a676:	e7c5      	b.n	800a604 <_dtoa_r+0x4fc>
 800a678:	eb03 01c1 	add.w	r1, r3, r1, lsl #3
 800a67c:	e9d1 0100 	ldrd	r0, r1, [r1]
 800a680:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a684:	f7f9 ff9c 	bl	80045c0 <__aeabi_dmul>
 800a688:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a68c:	9d06      	ldr	r5, [sp, #24]
 800a68e:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a692:	f7fa fa45 	bl	8004b20 <__aeabi_d2iz>
 800a696:	4606      	mov	r6, r0
 800a698:	f7f9 ff2c 	bl	80044f4 <__aeabi_i2d>
 800a69c:	4602      	mov	r2, r0
 800a69e:	460b      	mov	r3, r1
 800a6a0:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a6a4:	f7f9 fdd8 	bl	8004258 <__aeabi_dsub>
 800a6a8:	3630      	adds	r6, #48	; 0x30
 800a6aa:	9b11      	ldr	r3, [sp, #68]	; 0x44
 800a6ac:	f805 6b01 	strb.w	r6, [r5], #1
 800a6b0:	42ab      	cmp	r3, r5
 800a6b2:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a6b6:	f04f 0200 	mov.w	r2, #0
 800a6ba:	d124      	bne.n	800a706 <_dtoa_r+0x5fe>
 800a6bc:	4b1b      	ldr	r3, [pc, #108]	; (800a72c <_dtoa_r+0x624>)
 800a6be:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a6c2:	f7f9 fdcb 	bl	800425c <__adddf3>
 800a6c6:	4602      	mov	r2, r0
 800a6c8:	460b      	mov	r3, r1
 800a6ca:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a6ce:	f7fa fa07 	bl	8004ae0 <__aeabi_dcmpgt>
 800a6d2:	2800      	cmp	r0, #0
 800a6d4:	d174      	bne.n	800a7c0 <_dtoa_r+0x6b8>
 800a6d6:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a6da:	2000      	movs	r0, #0
 800a6dc:	4913      	ldr	r1, [pc, #76]	; (800a72c <_dtoa_r+0x624>)
 800a6de:	f7f9 fdbb 	bl	8004258 <__aeabi_dsub>
 800a6e2:	4602      	mov	r2, r0
 800a6e4:	460b      	mov	r3, r1
 800a6e6:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a6ea:	f7fa f9db 	bl	8004aa4 <__aeabi_dcmplt>
 800a6ee:	2800      	cmp	r0, #0
 800a6f0:	f43f af2d 	beq.w	800a54e <_dtoa_r+0x446>
 800a6f4:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800a6f8:	1e6a      	subs	r2, r5, #1
 800a6fa:	2b30      	cmp	r3, #48	; 0x30
 800a6fc:	d001      	beq.n	800a702 <_dtoa_r+0x5fa>
 800a6fe:	46bb      	mov	fp, r7
 800a700:	e04d      	b.n	800a79e <_dtoa_r+0x696>
 800a702:	4615      	mov	r5, r2
 800a704:	e7f6      	b.n	800a6f4 <_dtoa_r+0x5ec>
 800a706:	4b06      	ldr	r3, [pc, #24]	; (800a720 <_dtoa_r+0x618>)
 800a708:	f7f9 ff5a 	bl	80045c0 <__aeabi_dmul>
 800a70c:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a710:	e7bd      	b.n	800a68e <_dtoa_r+0x586>
 800a712:	bf00      	nop
 800a714:	0800bd60 	.word	0x0800bd60
 800a718:	0800bd38 	.word	0x0800bd38
 800a71c:	3ff00000 	.word	0x3ff00000
 800a720:	40240000 	.word	0x40240000
 800a724:	401c0000 	.word	0x401c0000
 800a728:	40140000 	.word	0x40140000
 800a72c:	3fe00000 	.word	0x3fe00000
 800a730:	9d06      	ldr	r5, [sp, #24]
 800a732:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 800a736:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 800a73a:	4630      	mov	r0, r6
 800a73c:	4639      	mov	r1, r7
 800a73e:	f7fa f869 	bl	8004814 <__aeabi_ddiv>
 800a742:	f7fa f9ed 	bl	8004b20 <__aeabi_d2iz>
 800a746:	4680      	mov	r8, r0
 800a748:	f7f9 fed4 	bl	80044f4 <__aeabi_i2d>
 800a74c:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 800a750:	f7f9 ff36 	bl	80045c0 <__aeabi_dmul>
 800a754:	4602      	mov	r2, r0
 800a756:	460b      	mov	r3, r1
 800a758:	4630      	mov	r0, r6
 800a75a:	4639      	mov	r1, r7
 800a75c:	f7f9 fd7c 	bl	8004258 <__aeabi_dsub>
 800a760:	f108 0630 	add.w	r6, r8, #48	; 0x30
 800a764:	f805 6b01 	strb.w	r6, [r5], #1
 800a768:	9e06      	ldr	r6, [sp, #24]
 800a76a:	4602      	mov	r2, r0
 800a76c:	1bae      	subs	r6, r5, r6
 800a76e:	45b1      	cmp	r9, r6
 800a770:	460b      	mov	r3, r1
 800a772:	d137      	bne.n	800a7e4 <_dtoa_r+0x6dc>
 800a774:	f7f9 fd72 	bl	800425c <__adddf3>
 800a778:	4606      	mov	r6, r0
 800a77a:	460f      	mov	r7, r1
 800a77c:	4602      	mov	r2, r0
 800a77e:	460b      	mov	r3, r1
 800a780:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800a784:	f7fa f98e 	bl	8004aa4 <__aeabi_dcmplt>
 800a788:	b9c8      	cbnz	r0, 800a7be <_dtoa_r+0x6b6>
 800a78a:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800a78e:	4632      	mov	r2, r6
 800a790:	463b      	mov	r3, r7
 800a792:	f7fa f97d 	bl	8004a90 <__aeabi_dcmpeq>
 800a796:	b110      	cbz	r0, 800a79e <_dtoa_r+0x696>
 800a798:	f018 0f01 	tst.w	r8, #1
 800a79c:	d10f      	bne.n	800a7be <_dtoa_r+0x6b6>
 800a79e:	4651      	mov	r1, sl
 800a7a0:	4620      	mov	r0, r4
 800a7a2:	f000 fcbd 	bl	800b120 <_Bfree>
 800a7a6:	2300      	movs	r3, #0
 800a7a8:	9a20      	ldr	r2, [sp, #128]	; 0x80
 800a7aa:	702b      	strb	r3, [r5, #0]
 800a7ac:	f10b 0301 	add.w	r3, fp, #1
 800a7b0:	6013      	str	r3, [r2, #0]
 800a7b2:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800a7b4:	2b00      	cmp	r3, #0
 800a7b6:	f43f acec 	beq.w	800a192 <_dtoa_r+0x8a>
 800a7ba:	601d      	str	r5, [r3, #0]
 800a7bc:	e4e9      	b.n	800a192 <_dtoa_r+0x8a>
 800a7be:	465f      	mov	r7, fp
 800a7c0:	f815 2c01 	ldrb.w	r2, [r5, #-1]
 800a7c4:	1e6b      	subs	r3, r5, #1
 800a7c6:	2a39      	cmp	r2, #57	; 0x39
 800a7c8:	d106      	bne.n	800a7d8 <_dtoa_r+0x6d0>
 800a7ca:	9a06      	ldr	r2, [sp, #24]
 800a7cc:	429a      	cmp	r2, r3
 800a7ce:	d107      	bne.n	800a7e0 <_dtoa_r+0x6d8>
 800a7d0:	2330      	movs	r3, #48	; 0x30
 800a7d2:	7013      	strb	r3, [r2, #0]
 800a7d4:	4613      	mov	r3, r2
 800a7d6:	3701      	adds	r7, #1
 800a7d8:	781a      	ldrb	r2, [r3, #0]
 800a7da:	3201      	adds	r2, #1
 800a7dc:	701a      	strb	r2, [r3, #0]
 800a7de:	e78e      	b.n	800a6fe <_dtoa_r+0x5f6>
 800a7e0:	461d      	mov	r5, r3
 800a7e2:	e7ed      	b.n	800a7c0 <_dtoa_r+0x6b8>
 800a7e4:	2200      	movs	r2, #0
 800a7e6:	4bb5      	ldr	r3, [pc, #724]	; (800aabc <_dtoa_r+0x9b4>)
 800a7e8:	f7f9 feea 	bl	80045c0 <__aeabi_dmul>
 800a7ec:	2200      	movs	r2, #0
 800a7ee:	2300      	movs	r3, #0
 800a7f0:	4606      	mov	r6, r0
 800a7f2:	460f      	mov	r7, r1
 800a7f4:	f7fa f94c 	bl	8004a90 <__aeabi_dcmpeq>
 800a7f8:	2800      	cmp	r0, #0
 800a7fa:	d09c      	beq.n	800a736 <_dtoa_r+0x62e>
 800a7fc:	e7cf      	b.n	800a79e <_dtoa_r+0x696>
 800a7fe:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800a800:	2a00      	cmp	r2, #0
 800a802:	f000 8129 	beq.w	800aa58 <_dtoa_r+0x950>
 800a806:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800a808:	2a01      	cmp	r2, #1
 800a80a:	f300 810e 	bgt.w	800aa2a <_dtoa_r+0x922>
 800a80e:	9a10      	ldr	r2, [sp, #64]	; 0x40
 800a810:	2a00      	cmp	r2, #0
 800a812:	f000 8106 	beq.w	800aa22 <_dtoa_r+0x91a>
 800a816:	f203 4333 	addw	r3, r3, #1075	; 0x433
 800a81a:	4645      	mov	r5, r8
 800a81c:	9e08      	ldr	r6, [sp, #32]
 800a81e:	9a07      	ldr	r2, [sp, #28]
 800a820:	2101      	movs	r1, #1
 800a822:	441a      	add	r2, r3
 800a824:	4620      	mov	r0, r4
 800a826:	4498      	add	r8, r3
 800a828:	9207      	str	r2, [sp, #28]
 800a82a:	f000 fd19 	bl	800b260 <__i2b>
 800a82e:	4607      	mov	r7, r0
 800a830:	2d00      	cmp	r5, #0
 800a832:	dd0b      	ble.n	800a84c <_dtoa_r+0x744>
 800a834:	9b07      	ldr	r3, [sp, #28]
 800a836:	2b00      	cmp	r3, #0
 800a838:	dd08      	ble.n	800a84c <_dtoa_r+0x744>
 800a83a:	42ab      	cmp	r3, r5
 800a83c:	bfa8      	it	ge
 800a83e:	462b      	movge	r3, r5
 800a840:	9a07      	ldr	r2, [sp, #28]
 800a842:	eba8 0803 	sub.w	r8, r8, r3
 800a846:	1aed      	subs	r5, r5, r3
 800a848:	1ad3      	subs	r3, r2, r3
 800a84a:	9307      	str	r3, [sp, #28]
 800a84c:	9b08      	ldr	r3, [sp, #32]
 800a84e:	b1fb      	cbz	r3, 800a890 <_dtoa_r+0x788>
 800a850:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800a852:	2b00      	cmp	r3, #0
 800a854:	f000 8104 	beq.w	800aa60 <_dtoa_r+0x958>
 800a858:	2e00      	cmp	r6, #0
 800a85a:	dd11      	ble.n	800a880 <_dtoa_r+0x778>
 800a85c:	4639      	mov	r1, r7
 800a85e:	4632      	mov	r2, r6
 800a860:	4620      	mov	r0, r4
 800a862:	f000 fd93 	bl	800b38c <__pow5mult>
 800a866:	4652      	mov	r2, sl
 800a868:	4601      	mov	r1, r0
 800a86a:	4607      	mov	r7, r0
 800a86c:	4620      	mov	r0, r4
 800a86e:	f000 fd00 	bl	800b272 <__multiply>
 800a872:	4651      	mov	r1, sl
 800a874:	900a      	str	r0, [sp, #40]	; 0x28
 800a876:	4620      	mov	r0, r4
 800a878:	f000 fc52 	bl	800b120 <_Bfree>
 800a87c:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 800a87e:	469a      	mov	sl, r3
 800a880:	9b08      	ldr	r3, [sp, #32]
 800a882:	1b9a      	subs	r2, r3, r6
 800a884:	d004      	beq.n	800a890 <_dtoa_r+0x788>
 800a886:	4651      	mov	r1, sl
 800a888:	4620      	mov	r0, r4
 800a88a:	f000 fd7f 	bl	800b38c <__pow5mult>
 800a88e:	4682      	mov	sl, r0
 800a890:	2101      	movs	r1, #1
 800a892:	4620      	mov	r0, r4
 800a894:	f000 fce4 	bl	800b260 <__i2b>
 800a898:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800a89a:	4606      	mov	r6, r0
 800a89c:	2b00      	cmp	r3, #0
 800a89e:	f340 80e1 	ble.w	800aa64 <_dtoa_r+0x95c>
 800a8a2:	461a      	mov	r2, r3
 800a8a4:	4601      	mov	r1, r0
 800a8a6:	4620      	mov	r0, r4
 800a8a8:	f000 fd70 	bl	800b38c <__pow5mult>
 800a8ac:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a8ae:	4606      	mov	r6, r0
 800a8b0:	2b01      	cmp	r3, #1
 800a8b2:	f340 80da 	ble.w	800aa6a <_dtoa_r+0x962>
 800a8b6:	2300      	movs	r3, #0
 800a8b8:	9308      	str	r3, [sp, #32]
 800a8ba:	6933      	ldr	r3, [r6, #16]
 800a8bc:	eb06 0383 	add.w	r3, r6, r3, lsl #2
 800a8c0:	6918      	ldr	r0, [r3, #16]
 800a8c2:	f000 fc7f 	bl	800b1c4 <__hi0bits>
 800a8c6:	f1c0 0020 	rsb	r0, r0, #32
 800a8ca:	9b07      	ldr	r3, [sp, #28]
 800a8cc:	4418      	add	r0, r3
 800a8ce:	f010 001f 	ands.w	r0, r0, #31
 800a8d2:	f000 80f0 	beq.w	800aab6 <_dtoa_r+0x9ae>
 800a8d6:	f1c0 0320 	rsb	r3, r0, #32
 800a8da:	2b04      	cmp	r3, #4
 800a8dc:	f340 80e2 	ble.w	800aaa4 <_dtoa_r+0x99c>
 800a8e0:	9b07      	ldr	r3, [sp, #28]
 800a8e2:	f1c0 001c 	rsb	r0, r0, #28
 800a8e6:	4480      	add	r8, r0
 800a8e8:	4405      	add	r5, r0
 800a8ea:	4403      	add	r3, r0
 800a8ec:	9307      	str	r3, [sp, #28]
 800a8ee:	f1b8 0f00 	cmp.w	r8, #0
 800a8f2:	dd05      	ble.n	800a900 <_dtoa_r+0x7f8>
 800a8f4:	4651      	mov	r1, sl
 800a8f6:	4642      	mov	r2, r8
 800a8f8:	4620      	mov	r0, r4
 800a8fa:	f000 fd95 	bl	800b428 <__lshift>
 800a8fe:	4682      	mov	sl, r0
 800a900:	9b07      	ldr	r3, [sp, #28]
 800a902:	2b00      	cmp	r3, #0
 800a904:	dd05      	ble.n	800a912 <_dtoa_r+0x80a>
 800a906:	4631      	mov	r1, r6
 800a908:	461a      	mov	r2, r3
 800a90a:	4620      	mov	r0, r4
 800a90c:	f000 fd8c 	bl	800b428 <__lshift>
 800a910:	4606      	mov	r6, r0
 800a912:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800a914:	2b00      	cmp	r3, #0
 800a916:	f000 80d3 	beq.w	800aac0 <_dtoa_r+0x9b8>
 800a91a:	4631      	mov	r1, r6
 800a91c:	4650      	mov	r0, sl
 800a91e:	f000 fdd4 	bl	800b4ca <__mcmp>
 800a922:	2800      	cmp	r0, #0
 800a924:	f280 80cc 	bge.w	800aac0 <_dtoa_r+0x9b8>
 800a928:	2300      	movs	r3, #0
 800a92a:	4651      	mov	r1, sl
 800a92c:	220a      	movs	r2, #10
 800a92e:	4620      	mov	r0, r4
 800a930:	f000 fc0d 	bl	800b14e <__multadd>
 800a934:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800a936:	f10b 3bff 	add.w	fp, fp, #4294967295
 800a93a:	4682      	mov	sl, r0
 800a93c:	2b00      	cmp	r3, #0
 800a93e:	f000 81a9 	beq.w	800ac94 <_dtoa_r+0xb8c>
 800a942:	2300      	movs	r3, #0
 800a944:	4639      	mov	r1, r7
 800a946:	220a      	movs	r2, #10
 800a948:	4620      	mov	r0, r4
 800a94a:	f000 fc00 	bl	800b14e <__multadd>
 800a94e:	9b04      	ldr	r3, [sp, #16]
 800a950:	4607      	mov	r7, r0
 800a952:	2b00      	cmp	r3, #0
 800a954:	dc03      	bgt.n	800a95e <_dtoa_r+0x856>
 800a956:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a958:	2b02      	cmp	r3, #2
 800a95a:	f300 80b9 	bgt.w	800aad0 <_dtoa_r+0x9c8>
 800a95e:	2d00      	cmp	r5, #0
 800a960:	dd05      	ble.n	800a96e <_dtoa_r+0x866>
 800a962:	4639      	mov	r1, r7
 800a964:	462a      	mov	r2, r5
 800a966:	4620      	mov	r0, r4
 800a968:	f000 fd5e 	bl	800b428 <__lshift>
 800a96c:	4607      	mov	r7, r0
 800a96e:	9b08      	ldr	r3, [sp, #32]
 800a970:	2b00      	cmp	r3, #0
 800a972:	f000 8110 	beq.w	800ab96 <_dtoa_r+0xa8e>
 800a976:	6879      	ldr	r1, [r7, #4]
 800a978:	4620      	mov	r0, r4
 800a97a:	f000 fb9d 	bl	800b0b8 <_Balloc>
 800a97e:	4605      	mov	r5, r0
 800a980:	693a      	ldr	r2, [r7, #16]
 800a982:	f107 010c 	add.w	r1, r7, #12
 800a986:	3202      	adds	r2, #2
 800a988:	0092      	lsls	r2, r2, #2
 800a98a:	300c      	adds	r0, #12
 800a98c:	f7fe fcc8 	bl	8009320 <memcpy>
 800a990:	2201      	movs	r2, #1
 800a992:	4629      	mov	r1, r5
 800a994:	4620      	mov	r0, r4
 800a996:	f000 fd47 	bl	800b428 <__lshift>
 800a99a:	9707      	str	r7, [sp, #28]
 800a99c:	4607      	mov	r7, r0
 800a99e:	9b02      	ldr	r3, [sp, #8]
 800a9a0:	f8dd 8018 	ldr.w	r8, [sp, #24]
 800a9a4:	f003 0301 	and.w	r3, r3, #1
 800a9a8:	9308      	str	r3, [sp, #32]
 800a9aa:	4631      	mov	r1, r6
 800a9ac:	4650      	mov	r0, sl
 800a9ae:	f7ff fb1d 	bl	8009fec <quorem>
 800a9b2:	9907      	ldr	r1, [sp, #28]
 800a9b4:	4605      	mov	r5, r0
 800a9b6:	f100 0930 	add.w	r9, r0, #48	; 0x30
 800a9ba:	4650      	mov	r0, sl
 800a9bc:	f000 fd85 	bl	800b4ca <__mcmp>
 800a9c0:	463a      	mov	r2, r7
 800a9c2:	9002      	str	r0, [sp, #8]
 800a9c4:	4631      	mov	r1, r6
 800a9c6:	4620      	mov	r0, r4
 800a9c8:	f000 fd99 	bl	800b4fe <__mdiff>
 800a9cc:	68c3      	ldr	r3, [r0, #12]
 800a9ce:	4602      	mov	r2, r0
 800a9d0:	2b00      	cmp	r3, #0
 800a9d2:	f040 80e2 	bne.w	800ab9a <_dtoa_r+0xa92>
 800a9d6:	4601      	mov	r1, r0
 800a9d8:	9009      	str	r0, [sp, #36]	; 0x24
 800a9da:	4650      	mov	r0, sl
 800a9dc:	f000 fd75 	bl	800b4ca <__mcmp>
 800a9e0:	4603      	mov	r3, r0
 800a9e2:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800a9e4:	4611      	mov	r1, r2
 800a9e6:	4620      	mov	r0, r4
 800a9e8:	9309      	str	r3, [sp, #36]	; 0x24
 800a9ea:	f000 fb99 	bl	800b120 <_Bfree>
 800a9ee:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800a9f0:	2b00      	cmp	r3, #0
 800a9f2:	f040 80d4 	bne.w	800ab9e <_dtoa_r+0xa96>
 800a9f6:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800a9f8:	2a00      	cmp	r2, #0
 800a9fa:	f040 80d0 	bne.w	800ab9e <_dtoa_r+0xa96>
 800a9fe:	9a08      	ldr	r2, [sp, #32]
 800aa00:	2a00      	cmp	r2, #0
 800aa02:	f040 80cc 	bne.w	800ab9e <_dtoa_r+0xa96>
 800aa06:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800aa0a:	f000 80e8 	beq.w	800abde <_dtoa_r+0xad6>
 800aa0e:	9b02      	ldr	r3, [sp, #8]
 800aa10:	2b00      	cmp	r3, #0
 800aa12:	dd01      	ble.n	800aa18 <_dtoa_r+0x910>
 800aa14:	f105 0931 	add.w	r9, r5, #49	; 0x31
 800aa18:	f108 0501 	add.w	r5, r8, #1
 800aa1c:	f888 9000 	strb.w	r9, [r8]
 800aa20:	e06b      	b.n	800aafa <_dtoa_r+0x9f2>
 800aa22:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800aa24:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
 800aa28:	e6f7      	b.n	800a81a <_dtoa_r+0x712>
 800aa2a:	9b08      	ldr	r3, [sp, #32]
 800aa2c:	f109 36ff 	add.w	r6, r9, #4294967295
 800aa30:	42b3      	cmp	r3, r6
 800aa32:	bfb7      	itett	lt
 800aa34:	9b08      	ldrlt	r3, [sp, #32]
 800aa36:	1b9e      	subge	r6, r3, r6
 800aa38:	1af2      	sublt	r2, r6, r3
 800aa3a:	9b0c      	ldrlt	r3, [sp, #48]	; 0x30
 800aa3c:	bfbf      	itttt	lt
 800aa3e:	9608      	strlt	r6, [sp, #32]
 800aa40:	189b      	addlt	r3, r3, r2
 800aa42:	930c      	strlt	r3, [sp, #48]	; 0x30
 800aa44:	2600      	movlt	r6, #0
 800aa46:	f1b9 0f00 	cmp.w	r9, #0
 800aa4a:	bfb9      	ittee	lt
 800aa4c:	eba8 0509 	sublt.w	r5, r8, r9
 800aa50:	2300      	movlt	r3, #0
 800aa52:	4645      	movge	r5, r8
 800aa54:	464b      	movge	r3, r9
 800aa56:	e6e2      	b.n	800a81e <_dtoa_r+0x716>
 800aa58:	9e08      	ldr	r6, [sp, #32]
 800aa5a:	4645      	mov	r5, r8
 800aa5c:	9f09      	ldr	r7, [sp, #36]	; 0x24
 800aa5e:	e6e7      	b.n	800a830 <_dtoa_r+0x728>
 800aa60:	9a08      	ldr	r2, [sp, #32]
 800aa62:	e710      	b.n	800a886 <_dtoa_r+0x77e>
 800aa64:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800aa66:	2b01      	cmp	r3, #1
 800aa68:	dc18      	bgt.n	800aa9c <_dtoa_r+0x994>
 800aa6a:	9b02      	ldr	r3, [sp, #8]
 800aa6c:	b9b3      	cbnz	r3, 800aa9c <_dtoa_r+0x994>
 800aa6e:	9b03      	ldr	r3, [sp, #12]
 800aa70:	f3c3 0313 	ubfx	r3, r3, #0, #20
 800aa74:	b9a3      	cbnz	r3, 800aaa0 <_dtoa_r+0x998>
 800aa76:	9b03      	ldr	r3, [sp, #12]
 800aa78:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 800aa7c:	0d1b      	lsrs	r3, r3, #20
 800aa7e:	051b      	lsls	r3, r3, #20
 800aa80:	b12b      	cbz	r3, 800aa8e <_dtoa_r+0x986>
 800aa82:	9b07      	ldr	r3, [sp, #28]
 800aa84:	f108 0801 	add.w	r8, r8, #1
 800aa88:	3301      	adds	r3, #1
 800aa8a:	9307      	str	r3, [sp, #28]
 800aa8c:	2301      	movs	r3, #1
 800aa8e:	9308      	str	r3, [sp, #32]
 800aa90:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800aa92:	2b00      	cmp	r3, #0
 800aa94:	f47f af11 	bne.w	800a8ba <_dtoa_r+0x7b2>
 800aa98:	2001      	movs	r0, #1
 800aa9a:	e716      	b.n	800a8ca <_dtoa_r+0x7c2>
 800aa9c:	2300      	movs	r3, #0
 800aa9e:	e7f6      	b.n	800aa8e <_dtoa_r+0x986>
 800aaa0:	9b02      	ldr	r3, [sp, #8]
 800aaa2:	e7f4      	b.n	800aa8e <_dtoa_r+0x986>
 800aaa4:	f43f af23 	beq.w	800a8ee <_dtoa_r+0x7e6>
 800aaa8:	9a07      	ldr	r2, [sp, #28]
 800aaaa:	331c      	adds	r3, #28
 800aaac:	441a      	add	r2, r3
 800aaae:	4498      	add	r8, r3
 800aab0:	441d      	add	r5, r3
 800aab2:	4613      	mov	r3, r2
 800aab4:	e71a      	b.n	800a8ec <_dtoa_r+0x7e4>
 800aab6:	4603      	mov	r3, r0
 800aab8:	e7f6      	b.n	800aaa8 <_dtoa_r+0x9a0>
 800aaba:	bf00      	nop
 800aabc:	40240000 	.word	0x40240000
 800aac0:	f1b9 0f00 	cmp.w	r9, #0
 800aac4:	dc33      	bgt.n	800ab2e <_dtoa_r+0xa26>
 800aac6:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800aac8:	2b02      	cmp	r3, #2
 800aaca:	dd30      	ble.n	800ab2e <_dtoa_r+0xa26>
 800aacc:	f8cd 9010 	str.w	r9, [sp, #16]
 800aad0:	9b04      	ldr	r3, [sp, #16]
 800aad2:	b963      	cbnz	r3, 800aaee <_dtoa_r+0x9e6>
 800aad4:	4631      	mov	r1, r6
 800aad6:	2205      	movs	r2, #5
 800aad8:	4620      	mov	r0, r4
 800aada:	f000 fb38 	bl	800b14e <__multadd>
 800aade:	4601      	mov	r1, r0
 800aae0:	4606      	mov	r6, r0
 800aae2:	4650      	mov	r0, sl
 800aae4:	f000 fcf1 	bl	800b4ca <__mcmp>
 800aae8:	2800      	cmp	r0, #0
 800aaea:	f73f ad5c 	bgt.w	800a5a6 <_dtoa_r+0x49e>
 800aaee:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800aaf0:	9d06      	ldr	r5, [sp, #24]
 800aaf2:	ea6f 0b03 	mvn.w	fp, r3
 800aaf6:	2300      	movs	r3, #0
 800aaf8:	9307      	str	r3, [sp, #28]
 800aafa:	4631      	mov	r1, r6
 800aafc:	4620      	mov	r0, r4
 800aafe:	f000 fb0f 	bl	800b120 <_Bfree>
 800ab02:	2f00      	cmp	r7, #0
 800ab04:	f43f ae4b 	beq.w	800a79e <_dtoa_r+0x696>
 800ab08:	9b07      	ldr	r3, [sp, #28]
 800ab0a:	b12b      	cbz	r3, 800ab18 <_dtoa_r+0xa10>
 800ab0c:	42bb      	cmp	r3, r7
 800ab0e:	d003      	beq.n	800ab18 <_dtoa_r+0xa10>
 800ab10:	4619      	mov	r1, r3
 800ab12:	4620      	mov	r0, r4
 800ab14:	f000 fb04 	bl	800b120 <_Bfree>
 800ab18:	4639      	mov	r1, r7
 800ab1a:	4620      	mov	r0, r4
 800ab1c:	f000 fb00 	bl	800b120 <_Bfree>
 800ab20:	e63d      	b.n	800a79e <_dtoa_r+0x696>
 800ab22:	2600      	movs	r6, #0
 800ab24:	4637      	mov	r7, r6
 800ab26:	e7e2      	b.n	800aaee <_dtoa_r+0x9e6>
 800ab28:	46bb      	mov	fp, r7
 800ab2a:	4637      	mov	r7, r6
 800ab2c:	e53b      	b.n	800a5a6 <_dtoa_r+0x49e>
 800ab2e:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800ab30:	f8cd 9010 	str.w	r9, [sp, #16]
 800ab34:	2b00      	cmp	r3, #0
 800ab36:	f47f af12 	bne.w	800a95e <_dtoa_r+0x856>
 800ab3a:	9d06      	ldr	r5, [sp, #24]
 800ab3c:	4631      	mov	r1, r6
 800ab3e:	4650      	mov	r0, sl
 800ab40:	f7ff fa54 	bl	8009fec <quorem>
 800ab44:	9b06      	ldr	r3, [sp, #24]
 800ab46:	f100 0930 	add.w	r9, r0, #48	; 0x30
 800ab4a:	f805 9b01 	strb.w	r9, [r5], #1
 800ab4e:	9a04      	ldr	r2, [sp, #16]
 800ab50:	1aeb      	subs	r3, r5, r3
 800ab52:	429a      	cmp	r2, r3
 800ab54:	f300 8081 	bgt.w	800ac5a <_dtoa_r+0xb52>
 800ab58:	9b06      	ldr	r3, [sp, #24]
 800ab5a:	2a01      	cmp	r2, #1
 800ab5c:	bfac      	ite	ge
 800ab5e:	189b      	addge	r3, r3, r2
 800ab60:	3301      	addlt	r3, #1
 800ab62:	4698      	mov	r8, r3
 800ab64:	2300      	movs	r3, #0
 800ab66:	9307      	str	r3, [sp, #28]
 800ab68:	4651      	mov	r1, sl
 800ab6a:	2201      	movs	r2, #1
 800ab6c:	4620      	mov	r0, r4
 800ab6e:	f000 fc5b 	bl	800b428 <__lshift>
 800ab72:	4631      	mov	r1, r6
 800ab74:	4682      	mov	sl, r0
 800ab76:	f000 fca8 	bl	800b4ca <__mcmp>
 800ab7a:	2800      	cmp	r0, #0
 800ab7c:	dc34      	bgt.n	800abe8 <_dtoa_r+0xae0>
 800ab7e:	d102      	bne.n	800ab86 <_dtoa_r+0xa7e>
 800ab80:	f019 0f01 	tst.w	r9, #1
 800ab84:	d130      	bne.n	800abe8 <_dtoa_r+0xae0>
 800ab86:	4645      	mov	r5, r8
 800ab88:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800ab8c:	1e6a      	subs	r2, r5, #1
 800ab8e:	2b30      	cmp	r3, #48	; 0x30
 800ab90:	d1b3      	bne.n	800aafa <_dtoa_r+0x9f2>
 800ab92:	4615      	mov	r5, r2
 800ab94:	e7f8      	b.n	800ab88 <_dtoa_r+0xa80>
 800ab96:	4638      	mov	r0, r7
 800ab98:	e6ff      	b.n	800a99a <_dtoa_r+0x892>
 800ab9a:	2301      	movs	r3, #1
 800ab9c:	e722      	b.n	800a9e4 <_dtoa_r+0x8dc>
 800ab9e:	9a02      	ldr	r2, [sp, #8]
 800aba0:	2a00      	cmp	r2, #0
 800aba2:	db04      	blt.n	800abae <_dtoa_r+0xaa6>
 800aba4:	d128      	bne.n	800abf8 <_dtoa_r+0xaf0>
 800aba6:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800aba8:	bb32      	cbnz	r2, 800abf8 <_dtoa_r+0xaf0>
 800abaa:	9a08      	ldr	r2, [sp, #32]
 800abac:	bb22      	cbnz	r2, 800abf8 <_dtoa_r+0xaf0>
 800abae:	2b00      	cmp	r3, #0
 800abb0:	f77f af32 	ble.w	800aa18 <_dtoa_r+0x910>
 800abb4:	4651      	mov	r1, sl
 800abb6:	2201      	movs	r2, #1
 800abb8:	4620      	mov	r0, r4
 800abba:	f000 fc35 	bl	800b428 <__lshift>
 800abbe:	4631      	mov	r1, r6
 800abc0:	4682      	mov	sl, r0
 800abc2:	f000 fc82 	bl	800b4ca <__mcmp>
 800abc6:	2800      	cmp	r0, #0
 800abc8:	dc05      	bgt.n	800abd6 <_dtoa_r+0xace>
 800abca:	f47f af25 	bne.w	800aa18 <_dtoa_r+0x910>
 800abce:	f019 0f01 	tst.w	r9, #1
 800abd2:	f43f af21 	beq.w	800aa18 <_dtoa_r+0x910>
 800abd6:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800abda:	f47f af1b 	bne.w	800aa14 <_dtoa_r+0x90c>
 800abde:	2339      	movs	r3, #57	; 0x39
 800abe0:	f108 0801 	add.w	r8, r8, #1
 800abe4:	f808 3c01 	strb.w	r3, [r8, #-1]
 800abe8:	4645      	mov	r5, r8
 800abea:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800abee:	1e6a      	subs	r2, r5, #1
 800abf0:	2b39      	cmp	r3, #57	; 0x39
 800abf2:	d03a      	beq.n	800ac6a <_dtoa_r+0xb62>
 800abf4:	3301      	adds	r3, #1
 800abf6:	e03f      	b.n	800ac78 <_dtoa_r+0xb70>
 800abf8:	2b00      	cmp	r3, #0
 800abfa:	f108 0501 	add.w	r5, r8, #1
 800abfe:	dd05      	ble.n	800ac0c <_dtoa_r+0xb04>
 800ac00:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800ac04:	d0eb      	beq.n	800abde <_dtoa_r+0xad6>
 800ac06:	f109 0901 	add.w	r9, r9, #1
 800ac0a:	e707      	b.n	800aa1c <_dtoa_r+0x914>
 800ac0c:	9b06      	ldr	r3, [sp, #24]
 800ac0e:	9a04      	ldr	r2, [sp, #16]
 800ac10:	1aeb      	subs	r3, r5, r3
 800ac12:	4293      	cmp	r3, r2
 800ac14:	46a8      	mov	r8, r5
 800ac16:	f805 9c01 	strb.w	r9, [r5, #-1]
 800ac1a:	d0a5      	beq.n	800ab68 <_dtoa_r+0xa60>
 800ac1c:	4651      	mov	r1, sl
 800ac1e:	2300      	movs	r3, #0
 800ac20:	220a      	movs	r2, #10
 800ac22:	4620      	mov	r0, r4
 800ac24:	f000 fa93 	bl	800b14e <__multadd>
 800ac28:	9b07      	ldr	r3, [sp, #28]
 800ac2a:	4682      	mov	sl, r0
 800ac2c:	42bb      	cmp	r3, r7
 800ac2e:	f04f 020a 	mov.w	r2, #10
 800ac32:	f04f 0300 	mov.w	r3, #0
 800ac36:	9907      	ldr	r1, [sp, #28]
 800ac38:	4620      	mov	r0, r4
 800ac3a:	d104      	bne.n	800ac46 <_dtoa_r+0xb3e>
 800ac3c:	f000 fa87 	bl	800b14e <__multadd>
 800ac40:	9007      	str	r0, [sp, #28]
 800ac42:	4607      	mov	r7, r0
 800ac44:	e6b1      	b.n	800a9aa <_dtoa_r+0x8a2>
 800ac46:	f000 fa82 	bl	800b14e <__multadd>
 800ac4a:	2300      	movs	r3, #0
 800ac4c:	9007      	str	r0, [sp, #28]
 800ac4e:	220a      	movs	r2, #10
 800ac50:	4639      	mov	r1, r7
 800ac52:	4620      	mov	r0, r4
 800ac54:	f000 fa7b 	bl	800b14e <__multadd>
 800ac58:	e7f3      	b.n	800ac42 <_dtoa_r+0xb3a>
 800ac5a:	4651      	mov	r1, sl
 800ac5c:	2300      	movs	r3, #0
 800ac5e:	220a      	movs	r2, #10
 800ac60:	4620      	mov	r0, r4
 800ac62:	f000 fa74 	bl	800b14e <__multadd>
 800ac66:	4682      	mov	sl, r0
 800ac68:	e768      	b.n	800ab3c <_dtoa_r+0xa34>
 800ac6a:	9b06      	ldr	r3, [sp, #24]
 800ac6c:	4293      	cmp	r3, r2
 800ac6e:	d105      	bne.n	800ac7c <_dtoa_r+0xb74>
 800ac70:	2331      	movs	r3, #49	; 0x31
 800ac72:	9a06      	ldr	r2, [sp, #24]
 800ac74:	f10b 0b01 	add.w	fp, fp, #1
 800ac78:	7013      	strb	r3, [r2, #0]
 800ac7a:	e73e      	b.n	800aafa <_dtoa_r+0x9f2>
 800ac7c:	4615      	mov	r5, r2
 800ac7e:	e7b4      	b.n	800abea <_dtoa_r+0xae2>
 800ac80:	4b09      	ldr	r3, [pc, #36]	; (800aca8 <_dtoa_r+0xba0>)
 800ac82:	f7ff baa3 	b.w	800a1cc <_dtoa_r+0xc4>
 800ac86:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800ac88:	2b00      	cmp	r3, #0
 800ac8a:	f47f aa7d 	bne.w	800a188 <_dtoa_r+0x80>
 800ac8e:	4b07      	ldr	r3, [pc, #28]	; (800acac <_dtoa_r+0xba4>)
 800ac90:	f7ff ba9c 	b.w	800a1cc <_dtoa_r+0xc4>
 800ac94:	9b04      	ldr	r3, [sp, #16]
 800ac96:	2b00      	cmp	r3, #0
 800ac98:	f73f af4f 	bgt.w	800ab3a <_dtoa_r+0xa32>
 800ac9c:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800ac9e:	2b02      	cmp	r3, #2
 800aca0:	f77f af4b 	ble.w	800ab3a <_dtoa_r+0xa32>
 800aca4:	e714      	b.n	800aad0 <_dtoa_r+0x9c8>
 800aca6:	bf00      	nop
 800aca8:	0800bca0 	.word	0x0800bca0
 800acac:	0800bcc4 	.word	0x0800bcc4

0800acb0 <__sflush_r>:
 800acb0:	898a      	ldrh	r2, [r1, #12]
 800acb2:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800acb6:	4605      	mov	r5, r0
 800acb8:	0710      	lsls	r0, r2, #28
 800acba:	460c      	mov	r4, r1
 800acbc:	d45a      	bmi.n	800ad74 <__sflush_r+0xc4>
 800acbe:	684b      	ldr	r3, [r1, #4]
 800acc0:	2b00      	cmp	r3, #0
 800acc2:	dc05      	bgt.n	800acd0 <__sflush_r+0x20>
 800acc4:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 800acc6:	2b00      	cmp	r3, #0
 800acc8:	dc02      	bgt.n	800acd0 <__sflush_r+0x20>
 800acca:	2000      	movs	r0, #0
 800accc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800acd0:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800acd2:	2e00      	cmp	r6, #0
 800acd4:	d0f9      	beq.n	800acca <__sflush_r+0x1a>
 800acd6:	2300      	movs	r3, #0
 800acd8:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 800acdc:	682f      	ldr	r7, [r5, #0]
 800acde:	602b      	str	r3, [r5, #0]
 800ace0:	d033      	beq.n	800ad4a <__sflush_r+0x9a>
 800ace2:	6d60      	ldr	r0, [r4, #84]	; 0x54
 800ace4:	89a3      	ldrh	r3, [r4, #12]
 800ace6:	075a      	lsls	r2, r3, #29
 800ace8:	d505      	bpl.n	800acf6 <__sflush_r+0x46>
 800acea:	6863      	ldr	r3, [r4, #4]
 800acec:	1ac0      	subs	r0, r0, r3
 800acee:	6b63      	ldr	r3, [r4, #52]	; 0x34
 800acf0:	b10b      	cbz	r3, 800acf6 <__sflush_r+0x46>
 800acf2:	6c23      	ldr	r3, [r4, #64]	; 0x40
 800acf4:	1ac0      	subs	r0, r0, r3
 800acf6:	2300      	movs	r3, #0
 800acf8:	4602      	mov	r2, r0
 800acfa:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800acfc:	6a21      	ldr	r1, [r4, #32]
 800acfe:	4628      	mov	r0, r5
 800ad00:	47b0      	blx	r6
 800ad02:	1c43      	adds	r3, r0, #1
 800ad04:	89a3      	ldrh	r3, [r4, #12]
 800ad06:	d106      	bne.n	800ad16 <__sflush_r+0x66>
 800ad08:	6829      	ldr	r1, [r5, #0]
 800ad0a:	291d      	cmp	r1, #29
 800ad0c:	d84b      	bhi.n	800ada6 <__sflush_r+0xf6>
 800ad0e:	4a2b      	ldr	r2, [pc, #172]	; (800adbc <__sflush_r+0x10c>)
 800ad10:	40ca      	lsrs	r2, r1
 800ad12:	07d6      	lsls	r6, r2, #31
 800ad14:	d547      	bpl.n	800ada6 <__sflush_r+0xf6>
 800ad16:	2200      	movs	r2, #0
 800ad18:	6062      	str	r2, [r4, #4]
 800ad1a:	6922      	ldr	r2, [r4, #16]
 800ad1c:	04d9      	lsls	r1, r3, #19
 800ad1e:	6022      	str	r2, [r4, #0]
 800ad20:	d504      	bpl.n	800ad2c <__sflush_r+0x7c>
 800ad22:	1c42      	adds	r2, r0, #1
 800ad24:	d101      	bne.n	800ad2a <__sflush_r+0x7a>
 800ad26:	682b      	ldr	r3, [r5, #0]
 800ad28:	b903      	cbnz	r3, 800ad2c <__sflush_r+0x7c>
 800ad2a:	6560      	str	r0, [r4, #84]	; 0x54
 800ad2c:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800ad2e:	602f      	str	r7, [r5, #0]
 800ad30:	2900      	cmp	r1, #0
 800ad32:	d0ca      	beq.n	800acca <__sflush_r+0x1a>
 800ad34:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800ad38:	4299      	cmp	r1, r3
 800ad3a:	d002      	beq.n	800ad42 <__sflush_r+0x92>
 800ad3c:	4628      	mov	r0, r5
 800ad3e:	f000 fc9b 	bl	800b678 <_free_r>
 800ad42:	2000      	movs	r0, #0
 800ad44:	6360      	str	r0, [r4, #52]	; 0x34
 800ad46:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800ad4a:	6a21      	ldr	r1, [r4, #32]
 800ad4c:	2301      	movs	r3, #1
 800ad4e:	4628      	mov	r0, r5
 800ad50:	47b0      	blx	r6
 800ad52:	1c41      	adds	r1, r0, #1
 800ad54:	d1c6      	bne.n	800ace4 <__sflush_r+0x34>
 800ad56:	682b      	ldr	r3, [r5, #0]
 800ad58:	2b00      	cmp	r3, #0
 800ad5a:	d0c3      	beq.n	800ace4 <__sflush_r+0x34>
 800ad5c:	2b1d      	cmp	r3, #29
 800ad5e:	d001      	beq.n	800ad64 <__sflush_r+0xb4>
 800ad60:	2b16      	cmp	r3, #22
 800ad62:	d101      	bne.n	800ad68 <__sflush_r+0xb8>
 800ad64:	602f      	str	r7, [r5, #0]
 800ad66:	e7b0      	b.n	800acca <__sflush_r+0x1a>
 800ad68:	89a3      	ldrh	r3, [r4, #12]
 800ad6a:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800ad6e:	81a3      	strh	r3, [r4, #12]
 800ad70:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800ad74:	690f      	ldr	r7, [r1, #16]
 800ad76:	2f00      	cmp	r7, #0
 800ad78:	d0a7      	beq.n	800acca <__sflush_r+0x1a>
 800ad7a:	0793      	lsls	r3, r2, #30
 800ad7c:	bf18      	it	ne
 800ad7e:	2300      	movne	r3, #0
 800ad80:	680e      	ldr	r6, [r1, #0]
 800ad82:	bf08      	it	eq
 800ad84:	694b      	ldreq	r3, [r1, #20]
 800ad86:	eba6 0807 	sub.w	r8, r6, r7
 800ad8a:	600f      	str	r7, [r1, #0]
 800ad8c:	608b      	str	r3, [r1, #8]
 800ad8e:	f1b8 0f00 	cmp.w	r8, #0
 800ad92:	dd9a      	ble.n	800acca <__sflush_r+0x1a>
 800ad94:	4643      	mov	r3, r8
 800ad96:	463a      	mov	r2, r7
 800ad98:	6a21      	ldr	r1, [r4, #32]
 800ad9a:	4628      	mov	r0, r5
 800ad9c:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 800ad9e:	47b0      	blx	r6
 800ada0:	2800      	cmp	r0, #0
 800ada2:	dc07      	bgt.n	800adb4 <__sflush_r+0x104>
 800ada4:	89a3      	ldrh	r3, [r4, #12]
 800ada6:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800adaa:	81a3      	strh	r3, [r4, #12]
 800adac:	f04f 30ff 	mov.w	r0, #4294967295
 800adb0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800adb4:	4407      	add	r7, r0
 800adb6:	eba8 0800 	sub.w	r8, r8, r0
 800adba:	e7e8      	b.n	800ad8e <__sflush_r+0xde>
 800adbc:	20400001 	.word	0x20400001

0800adc0 <_fflush_r>:
 800adc0:	b538      	push	{r3, r4, r5, lr}
 800adc2:	690b      	ldr	r3, [r1, #16]
 800adc4:	4605      	mov	r5, r0
 800adc6:	460c      	mov	r4, r1
 800adc8:	b1db      	cbz	r3, 800ae02 <_fflush_r+0x42>
 800adca:	b118      	cbz	r0, 800add4 <_fflush_r+0x14>
 800adcc:	6983      	ldr	r3, [r0, #24]
 800adce:	b90b      	cbnz	r3, 800add4 <_fflush_r+0x14>
 800add0:	f000 f860 	bl	800ae94 <__sinit>
 800add4:	4b0c      	ldr	r3, [pc, #48]	; (800ae08 <_fflush_r+0x48>)
 800add6:	429c      	cmp	r4, r3
 800add8:	d109      	bne.n	800adee <_fflush_r+0x2e>
 800adda:	686c      	ldr	r4, [r5, #4]
 800addc:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800ade0:	b17b      	cbz	r3, 800ae02 <_fflush_r+0x42>
 800ade2:	4621      	mov	r1, r4
 800ade4:	4628      	mov	r0, r5
 800ade6:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800adea:	f7ff bf61 	b.w	800acb0 <__sflush_r>
 800adee:	4b07      	ldr	r3, [pc, #28]	; (800ae0c <_fflush_r+0x4c>)
 800adf0:	429c      	cmp	r4, r3
 800adf2:	d101      	bne.n	800adf8 <_fflush_r+0x38>
 800adf4:	68ac      	ldr	r4, [r5, #8]
 800adf6:	e7f1      	b.n	800addc <_fflush_r+0x1c>
 800adf8:	4b05      	ldr	r3, [pc, #20]	; (800ae10 <_fflush_r+0x50>)
 800adfa:	429c      	cmp	r4, r3
 800adfc:	bf08      	it	eq
 800adfe:	68ec      	ldreq	r4, [r5, #12]
 800ae00:	e7ec      	b.n	800addc <_fflush_r+0x1c>
 800ae02:	2000      	movs	r0, #0
 800ae04:	bd38      	pop	{r3, r4, r5, pc}
 800ae06:	bf00      	nop
 800ae08:	0800bcf4 	.word	0x0800bcf4
 800ae0c:	0800bd14 	.word	0x0800bd14
 800ae10:	0800bcd4 	.word	0x0800bcd4

0800ae14 <_cleanup_r>:
 800ae14:	4901      	ldr	r1, [pc, #4]	; (800ae1c <_cleanup_r+0x8>)
 800ae16:	f000 b8a9 	b.w	800af6c <_fwalk_reent>
 800ae1a:	bf00      	nop
 800ae1c:	0800adc1 	.word	0x0800adc1

0800ae20 <std.isra.0>:
 800ae20:	2300      	movs	r3, #0
 800ae22:	b510      	push	{r4, lr}
 800ae24:	4604      	mov	r4, r0
 800ae26:	6003      	str	r3, [r0, #0]
 800ae28:	6043      	str	r3, [r0, #4]
 800ae2a:	6083      	str	r3, [r0, #8]
 800ae2c:	8181      	strh	r1, [r0, #12]
 800ae2e:	6643      	str	r3, [r0, #100]	; 0x64
 800ae30:	81c2      	strh	r2, [r0, #14]
 800ae32:	6103      	str	r3, [r0, #16]
 800ae34:	6143      	str	r3, [r0, #20]
 800ae36:	6183      	str	r3, [r0, #24]
 800ae38:	4619      	mov	r1, r3
 800ae3a:	2208      	movs	r2, #8
 800ae3c:	305c      	adds	r0, #92	; 0x5c
 800ae3e:	f7fe fa7a 	bl	8009336 <memset>
 800ae42:	4b05      	ldr	r3, [pc, #20]	; (800ae58 <std.isra.0+0x38>)
 800ae44:	6224      	str	r4, [r4, #32]
 800ae46:	6263      	str	r3, [r4, #36]	; 0x24
 800ae48:	4b04      	ldr	r3, [pc, #16]	; (800ae5c <std.isra.0+0x3c>)
 800ae4a:	62a3      	str	r3, [r4, #40]	; 0x28
 800ae4c:	4b04      	ldr	r3, [pc, #16]	; (800ae60 <std.isra.0+0x40>)
 800ae4e:	62e3      	str	r3, [r4, #44]	; 0x2c
 800ae50:	4b04      	ldr	r3, [pc, #16]	; (800ae64 <std.isra.0+0x44>)
 800ae52:	6323      	str	r3, [r4, #48]	; 0x30
 800ae54:	bd10      	pop	{r4, pc}
 800ae56:	bf00      	nop
 800ae58:	0800ba69 	.word	0x0800ba69
 800ae5c:	0800ba8b 	.word	0x0800ba8b
 800ae60:	0800bac3 	.word	0x0800bac3
 800ae64:	0800bae7 	.word	0x0800bae7

0800ae68 <__sfmoreglue>:
 800ae68:	b570      	push	{r4, r5, r6, lr}
 800ae6a:	2568      	movs	r5, #104	; 0x68
 800ae6c:	1e4a      	subs	r2, r1, #1
 800ae6e:	4355      	muls	r5, r2
 800ae70:	460e      	mov	r6, r1
 800ae72:	f105 0174 	add.w	r1, r5, #116	; 0x74
 800ae76:	f000 fc4b 	bl	800b710 <_malloc_r>
 800ae7a:	4604      	mov	r4, r0
 800ae7c:	b140      	cbz	r0, 800ae90 <__sfmoreglue+0x28>
 800ae7e:	2100      	movs	r1, #0
 800ae80:	e880 0042 	stmia.w	r0, {r1, r6}
 800ae84:	300c      	adds	r0, #12
 800ae86:	60a0      	str	r0, [r4, #8]
 800ae88:	f105 0268 	add.w	r2, r5, #104	; 0x68
 800ae8c:	f7fe fa53 	bl	8009336 <memset>
 800ae90:	4620      	mov	r0, r4
 800ae92:	bd70      	pop	{r4, r5, r6, pc}

0800ae94 <__sinit>:
 800ae94:	6983      	ldr	r3, [r0, #24]
 800ae96:	b510      	push	{r4, lr}
 800ae98:	4604      	mov	r4, r0
 800ae9a:	bb33      	cbnz	r3, 800aeea <__sinit+0x56>
 800ae9c:	6483      	str	r3, [r0, #72]	; 0x48
 800ae9e:	64c3      	str	r3, [r0, #76]	; 0x4c
 800aea0:	6503      	str	r3, [r0, #80]	; 0x50
 800aea2:	4b12      	ldr	r3, [pc, #72]	; (800aeec <__sinit+0x58>)
 800aea4:	4a12      	ldr	r2, [pc, #72]	; (800aef0 <__sinit+0x5c>)
 800aea6:	681b      	ldr	r3, [r3, #0]
 800aea8:	6282      	str	r2, [r0, #40]	; 0x28
 800aeaa:	4298      	cmp	r0, r3
 800aeac:	bf04      	itt	eq
 800aeae:	2301      	moveq	r3, #1
 800aeb0:	6183      	streq	r3, [r0, #24]
 800aeb2:	f000 f81f 	bl	800aef4 <__sfp>
 800aeb6:	6060      	str	r0, [r4, #4]
 800aeb8:	4620      	mov	r0, r4
 800aeba:	f000 f81b 	bl	800aef4 <__sfp>
 800aebe:	60a0      	str	r0, [r4, #8]
 800aec0:	4620      	mov	r0, r4
 800aec2:	f000 f817 	bl	800aef4 <__sfp>
 800aec6:	2200      	movs	r2, #0
 800aec8:	60e0      	str	r0, [r4, #12]
 800aeca:	2104      	movs	r1, #4
 800aecc:	6860      	ldr	r0, [r4, #4]
 800aece:	f7ff ffa7 	bl	800ae20 <std.isra.0>
 800aed2:	2201      	movs	r2, #1
 800aed4:	2109      	movs	r1, #9
 800aed6:	68a0      	ldr	r0, [r4, #8]
 800aed8:	f7ff ffa2 	bl	800ae20 <std.isra.0>
 800aedc:	2202      	movs	r2, #2
 800aede:	2112      	movs	r1, #18
 800aee0:	68e0      	ldr	r0, [r4, #12]
 800aee2:	f7ff ff9d 	bl	800ae20 <std.isra.0>
 800aee6:	2301      	movs	r3, #1
 800aee8:	61a3      	str	r3, [r4, #24]
 800aeea:	bd10      	pop	{r4, pc}
 800aeec:	0800bc8c 	.word	0x0800bc8c
 800aef0:	0800ae15 	.word	0x0800ae15

0800aef4 <__sfp>:
 800aef4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800aef6:	4b1c      	ldr	r3, [pc, #112]	; (800af68 <__sfp+0x74>)
 800aef8:	4607      	mov	r7, r0
 800aefa:	681e      	ldr	r6, [r3, #0]
 800aefc:	69b3      	ldr	r3, [r6, #24]
 800aefe:	b913      	cbnz	r3, 800af06 <__sfp+0x12>
 800af00:	4630      	mov	r0, r6
 800af02:	f7ff ffc7 	bl	800ae94 <__sinit>
 800af06:	3648      	adds	r6, #72	; 0x48
 800af08:	68b4      	ldr	r4, [r6, #8]
 800af0a:	6873      	ldr	r3, [r6, #4]
 800af0c:	3b01      	subs	r3, #1
 800af0e:	d503      	bpl.n	800af18 <__sfp+0x24>
 800af10:	6833      	ldr	r3, [r6, #0]
 800af12:	b133      	cbz	r3, 800af22 <__sfp+0x2e>
 800af14:	6836      	ldr	r6, [r6, #0]
 800af16:	e7f7      	b.n	800af08 <__sfp+0x14>
 800af18:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 800af1c:	b16d      	cbz	r5, 800af3a <__sfp+0x46>
 800af1e:	3468      	adds	r4, #104	; 0x68
 800af20:	e7f4      	b.n	800af0c <__sfp+0x18>
 800af22:	2104      	movs	r1, #4
 800af24:	4638      	mov	r0, r7
 800af26:	f7ff ff9f 	bl	800ae68 <__sfmoreglue>
 800af2a:	6030      	str	r0, [r6, #0]
 800af2c:	2800      	cmp	r0, #0
 800af2e:	d1f1      	bne.n	800af14 <__sfp+0x20>
 800af30:	230c      	movs	r3, #12
 800af32:	4604      	mov	r4, r0
 800af34:	603b      	str	r3, [r7, #0]
 800af36:	4620      	mov	r0, r4
 800af38:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 800af3a:	f64f 73ff 	movw	r3, #65535	; 0xffff
 800af3e:	81e3      	strh	r3, [r4, #14]
 800af40:	2301      	movs	r3, #1
 800af42:	6665      	str	r5, [r4, #100]	; 0x64
 800af44:	81a3      	strh	r3, [r4, #12]
 800af46:	6025      	str	r5, [r4, #0]
 800af48:	60a5      	str	r5, [r4, #8]
 800af4a:	6065      	str	r5, [r4, #4]
 800af4c:	6125      	str	r5, [r4, #16]
 800af4e:	6165      	str	r5, [r4, #20]
 800af50:	61a5      	str	r5, [r4, #24]
 800af52:	2208      	movs	r2, #8
 800af54:	4629      	mov	r1, r5
 800af56:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 800af5a:	f7fe f9ec 	bl	8009336 <memset>
 800af5e:	6365      	str	r5, [r4, #52]	; 0x34
 800af60:	63a5      	str	r5, [r4, #56]	; 0x38
 800af62:	64a5      	str	r5, [r4, #72]	; 0x48
 800af64:	64e5      	str	r5, [r4, #76]	; 0x4c
 800af66:	e7e6      	b.n	800af36 <__sfp+0x42>
 800af68:	0800bc8c 	.word	0x0800bc8c

0800af6c <_fwalk_reent>:
 800af6c:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800af70:	4680      	mov	r8, r0
 800af72:	4689      	mov	r9, r1
 800af74:	2600      	movs	r6, #0
 800af76:	f100 0448 	add.w	r4, r0, #72	; 0x48
 800af7a:	b914      	cbnz	r4, 800af82 <_fwalk_reent+0x16>
 800af7c:	4630      	mov	r0, r6
 800af7e:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800af82:	68a5      	ldr	r5, [r4, #8]
 800af84:	6867      	ldr	r7, [r4, #4]
 800af86:	3f01      	subs	r7, #1
 800af88:	d501      	bpl.n	800af8e <_fwalk_reent+0x22>
 800af8a:	6824      	ldr	r4, [r4, #0]
 800af8c:	e7f5      	b.n	800af7a <_fwalk_reent+0xe>
 800af8e:	89ab      	ldrh	r3, [r5, #12]
 800af90:	2b01      	cmp	r3, #1
 800af92:	d907      	bls.n	800afa4 <_fwalk_reent+0x38>
 800af94:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 800af98:	3301      	adds	r3, #1
 800af9a:	d003      	beq.n	800afa4 <_fwalk_reent+0x38>
 800af9c:	4629      	mov	r1, r5
 800af9e:	4640      	mov	r0, r8
 800afa0:	47c8      	blx	r9
 800afa2:	4306      	orrs	r6, r0
 800afa4:	3568      	adds	r5, #104	; 0x68
 800afa6:	e7ee      	b.n	800af86 <_fwalk_reent+0x1a>

0800afa8 <_localeconv_r>:
 800afa8:	4b04      	ldr	r3, [pc, #16]	; (800afbc <_localeconv_r+0x14>)
 800afaa:	681b      	ldr	r3, [r3, #0]
 800afac:	6a18      	ldr	r0, [r3, #32]
 800afae:	4b04      	ldr	r3, [pc, #16]	; (800afc0 <_localeconv_r+0x18>)
 800afb0:	2800      	cmp	r0, #0
 800afb2:	bf08      	it	eq
 800afb4:	4618      	moveq	r0, r3
 800afb6:	30f0      	adds	r0, #240	; 0xf0
 800afb8:	4770      	bx	lr
 800afba:	bf00      	nop
 800afbc:	2000024c 	.word	0x2000024c
 800afc0:	200002b0 	.word	0x200002b0

0800afc4 <__swhatbuf_r>:
 800afc4:	b570      	push	{r4, r5, r6, lr}
 800afc6:	460e      	mov	r6, r1
 800afc8:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800afcc:	b090      	sub	sp, #64	; 0x40
 800afce:	2900      	cmp	r1, #0
 800afd0:	4614      	mov	r4, r2
 800afd2:	461d      	mov	r5, r3
 800afd4:	da07      	bge.n	800afe6 <__swhatbuf_r+0x22>
 800afd6:	2300      	movs	r3, #0
 800afd8:	602b      	str	r3, [r5, #0]
 800afda:	89b3      	ldrh	r3, [r6, #12]
 800afdc:	061a      	lsls	r2, r3, #24
 800afde:	d410      	bmi.n	800b002 <__swhatbuf_r+0x3e>
 800afe0:	f44f 6380 	mov.w	r3, #1024	; 0x400
 800afe4:	e00e      	b.n	800b004 <__swhatbuf_r+0x40>
 800afe6:	aa01      	add	r2, sp, #4
 800afe8:	f000 fda4 	bl	800bb34 <_fstat_r>
 800afec:	2800      	cmp	r0, #0
 800afee:	dbf2      	blt.n	800afd6 <__swhatbuf_r+0x12>
 800aff0:	9a02      	ldr	r2, [sp, #8]
 800aff2:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 800aff6:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 800affa:	425a      	negs	r2, r3
 800affc:	415a      	adcs	r2, r3
 800affe:	602a      	str	r2, [r5, #0]
 800b000:	e7ee      	b.n	800afe0 <__swhatbuf_r+0x1c>
 800b002:	2340      	movs	r3, #64	; 0x40
 800b004:	2000      	movs	r0, #0
 800b006:	6023      	str	r3, [r4, #0]
 800b008:	b010      	add	sp, #64	; 0x40
 800b00a:	bd70      	pop	{r4, r5, r6, pc}

0800b00c <__smakebuf_r>:
 800b00c:	898b      	ldrh	r3, [r1, #12]
 800b00e:	b573      	push	{r0, r1, r4, r5, r6, lr}
 800b010:	079d      	lsls	r5, r3, #30
 800b012:	4606      	mov	r6, r0
 800b014:	460c      	mov	r4, r1
 800b016:	d507      	bpl.n	800b028 <__smakebuf_r+0x1c>
 800b018:	f104 0347 	add.w	r3, r4, #71	; 0x47
 800b01c:	6023      	str	r3, [r4, #0]
 800b01e:	6123      	str	r3, [r4, #16]
 800b020:	2301      	movs	r3, #1
 800b022:	6163      	str	r3, [r4, #20]
 800b024:	b002      	add	sp, #8
 800b026:	bd70      	pop	{r4, r5, r6, pc}
 800b028:	ab01      	add	r3, sp, #4
 800b02a:	466a      	mov	r2, sp
 800b02c:	f7ff ffca 	bl	800afc4 <__swhatbuf_r>
 800b030:	9900      	ldr	r1, [sp, #0]
 800b032:	4605      	mov	r5, r0
 800b034:	4630      	mov	r0, r6
 800b036:	f000 fb6b 	bl	800b710 <_malloc_r>
 800b03a:	b948      	cbnz	r0, 800b050 <__smakebuf_r+0x44>
 800b03c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800b040:	059a      	lsls	r2, r3, #22
 800b042:	d4ef      	bmi.n	800b024 <__smakebuf_r+0x18>
 800b044:	f023 0303 	bic.w	r3, r3, #3
 800b048:	f043 0302 	orr.w	r3, r3, #2
 800b04c:	81a3      	strh	r3, [r4, #12]
 800b04e:	e7e3      	b.n	800b018 <__smakebuf_r+0xc>
 800b050:	4b0d      	ldr	r3, [pc, #52]	; (800b088 <__smakebuf_r+0x7c>)
 800b052:	62b3      	str	r3, [r6, #40]	; 0x28
 800b054:	89a3      	ldrh	r3, [r4, #12]
 800b056:	6020      	str	r0, [r4, #0]
 800b058:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800b05c:	81a3      	strh	r3, [r4, #12]
 800b05e:	9b00      	ldr	r3, [sp, #0]
 800b060:	6120      	str	r0, [r4, #16]
 800b062:	6163      	str	r3, [r4, #20]
 800b064:	9b01      	ldr	r3, [sp, #4]
 800b066:	b15b      	cbz	r3, 800b080 <__smakebuf_r+0x74>
 800b068:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800b06c:	4630      	mov	r0, r6
 800b06e:	f000 fd73 	bl	800bb58 <_isatty_r>
 800b072:	b128      	cbz	r0, 800b080 <__smakebuf_r+0x74>
 800b074:	89a3      	ldrh	r3, [r4, #12]
 800b076:	f023 0303 	bic.w	r3, r3, #3
 800b07a:	f043 0301 	orr.w	r3, r3, #1
 800b07e:	81a3      	strh	r3, [r4, #12]
 800b080:	89a3      	ldrh	r3, [r4, #12]
 800b082:	431d      	orrs	r5, r3
 800b084:	81a5      	strh	r5, [r4, #12]
 800b086:	e7cd      	b.n	800b024 <__smakebuf_r+0x18>
 800b088:	0800ae15 	.word	0x0800ae15

0800b08c <malloc>:
 800b08c:	4b02      	ldr	r3, [pc, #8]	; (800b098 <malloc+0xc>)
 800b08e:	4601      	mov	r1, r0
 800b090:	6818      	ldr	r0, [r3, #0]
 800b092:	f000 bb3d 	b.w	800b710 <_malloc_r>
 800b096:	bf00      	nop
 800b098:	2000024c 	.word	0x2000024c

0800b09c <memchr>:
 800b09c:	b510      	push	{r4, lr}
 800b09e:	b2c9      	uxtb	r1, r1
 800b0a0:	4402      	add	r2, r0
 800b0a2:	4290      	cmp	r0, r2
 800b0a4:	4603      	mov	r3, r0
 800b0a6:	d101      	bne.n	800b0ac <memchr+0x10>
 800b0a8:	2000      	movs	r0, #0
 800b0aa:	bd10      	pop	{r4, pc}
 800b0ac:	781c      	ldrb	r4, [r3, #0]
 800b0ae:	3001      	adds	r0, #1
 800b0b0:	428c      	cmp	r4, r1
 800b0b2:	d1f6      	bne.n	800b0a2 <memchr+0x6>
 800b0b4:	4618      	mov	r0, r3
 800b0b6:	bd10      	pop	{r4, pc}

0800b0b8 <_Balloc>:
 800b0b8:	b570      	push	{r4, r5, r6, lr}
 800b0ba:	6a45      	ldr	r5, [r0, #36]	; 0x24
 800b0bc:	4604      	mov	r4, r0
 800b0be:	460e      	mov	r6, r1
 800b0c0:	b93d      	cbnz	r5, 800b0d2 <_Balloc+0x1a>
 800b0c2:	2010      	movs	r0, #16
 800b0c4:	f7ff ffe2 	bl	800b08c <malloc>
 800b0c8:	6260      	str	r0, [r4, #36]	; 0x24
 800b0ca:	6045      	str	r5, [r0, #4]
 800b0cc:	6085      	str	r5, [r0, #8]
 800b0ce:	6005      	str	r5, [r0, #0]
 800b0d0:	60c5      	str	r5, [r0, #12]
 800b0d2:	6a65      	ldr	r5, [r4, #36]	; 0x24
 800b0d4:	68eb      	ldr	r3, [r5, #12]
 800b0d6:	b183      	cbz	r3, 800b0fa <_Balloc+0x42>
 800b0d8:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800b0da:	68db      	ldr	r3, [r3, #12]
 800b0dc:	f853 0026 	ldr.w	r0, [r3, r6, lsl #2]
 800b0e0:	b9b8      	cbnz	r0, 800b112 <_Balloc+0x5a>
 800b0e2:	2101      	movs	r1, #1
 800b0e4:	fa01 f506 	lsl.w	r5, r1, r6
 800b0e8:	1d6a      	adds	r2, r5, #5
 800b0ea:	0092      	lsls	r2, r2, #2
 800b0ec:	4620      	mov	r0, r4
 800b0ee:	f000 fab4 	bl	800b65a <_calloc_r>
 800b0f2:	b160      	cbz	r0, 800b10e <_Balloc+0x56>
 800b0f4:	6046      	str	r6, [r0, #4]
 800b0f6:	6085      	str	r5, [r0, #8]
 800b0f8:	e00e      	b.n	800b118 <_Balloc+0x60>
 800b0fa:	2221      	movs	r2, #33	; 0x21
 800b0fc:	2104      	movs	r1, #4
 800b0fe:	4620      	mov	r0, r4
 800b100:	f000 faab 	bl	800b65a <_calloc_r>
 800b104:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800b106:	60e8      	str	r0, [r5, #12]
 800b108:	68db      	ldr	r3, [r3, #12]
 800b10a:	2b00      	cmp	r3, #0
 800b10c:	d1e4      	bne.n	800b0d8 <_Balloc+0x20>
 800b10e:	2000      	movs	r0, #0
 800b110:	bd70      	pop	{r4, r5, r6, pc}
 800b112:	6802      	ldr	r2, [r0, #0]
 800b114:	f843 2026 	str.w	r2, [r3, r6, lsl #2]
 800b118:	2300      	movs	r3, #0
 800b11a:	6103      	str	r3, [r0, #16]
 800b11c:	60c3      	str	r3, [r0, #12]
 800b11e:	bd70      	pop	{r4, r5, r6, pc}

0800b120 <_Bfree>:
 800b120:	b570      	push	{r4, r5, r6, lr}
 800b122:	6a44      	ldr	r4, [r0, #36]	; 0x24
 800b124:	4606      	mov	r6, r0
 800b126:	460d      	mov	r5, r1
 800b128:	b93c      	cbnz	r4, 800b13a <_Bfree+0x1a>
 800b12a:	2010      	movs	r0, #16
 800b12c:	f7ff ffae 	bl	800b08c <malloc>
 800b130:	6270      	str	r0, [r6, #36]	; 0x24
 800b132:	6044      	str	r4, [r0, #4]
 800b134:	6084      	str	r4, [r0, #8]
 800b136:	6004      	str	r4, [r0, #0]
 800b138:	60c4      	str	r4, [r0, #12]
 800b13a:	b13d      	cbz	r5, 800b14c <_Bfree+0x2c>
 800b13c:	6a73      	ldr	r3, [r6, #36]	; 0x24
 800b13e:	686a      	ldr	r2, [r5, #4]
 800b140:	68db      	ldr	r3, [r3, #12]
 800b142:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 800b146:	6029      	str	r1, [r5, #0]
 800b148:	f843 5022 	str.w	r5, [r3, r2, lsl #2]
 800b14c:	bd70      	pop	{r4, r5, r6, pc}

0800b14e <__multadd>:
 800b14e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800b152:	461f      	mov	r7, r3
 800b154:	4606      	mov	r6, r0
 800b156:	460c      	mov	r4, r1
 800b158:	2300      	movs	r3, #0
 800b15a:	690d      	ldr	r5, [r1, #16]
 800b15c:	f101 0e14 	add.w	lr, r1, #20
 800b160:	f8de 0000 	ldr.w	r0, [lr]
 800b164:	3301      	adds	r3, #1
 800b166:	b281      	uxth	r1, r0
 800b168:	fb02 7101 	mla	r1, r2, r1, r7
 800b16c:	0c00      	lsrs	r0, r0, #16
 800b16e:	0c0f      	lsrs	r7, r1, #16
 800b170:	fb02 7000 	mla	r0, r2, r0, r7
 800b174:	b289      	uxth	r1, r1
 800b176:	eb01 4100 	add.w	r1, r1, r0, lsl #16
 800b17a:	429d      	cmp	r5, r3
 800b17c:	ea4f 4710 	mov.w	r7, r0, lsr #16
 800b180:	f84e 1b04 	str.w	r1, [lr], #4
 800b184:	dcec      	bgt.n	800b160 <__multadd+0x12>
 800b186:	b1d7      	cbz	r7, 800b1be <__multadd+0x70>
 800b188:	68a3      	ldr	r3, [r4, #8]
 800b18a:	429d      	cmp	r5, r3
 800b18c:	db12      	blt.n	800b1b4 <__multadd+0x66>
 800b18e:	6861      	ldr	r1, [r4, #4]
 800b190:	4630      	mov	r0, r6
 800b192:	3101      	adds	r1, #1
 800b194:	f7ff ff90 	bl	800b0b8 <_Balloc>
 800b198:	4680      	mov	r8, r0
 800b19a:	6922      	ldr	r2, [r4, #16]
 800b19c:	f104 010c 	add.w	r1, r4, #12
 800b1a0:	3202      	adds	r2, #2
 800b1a2:	0092      	lsls	r2, r2, #2
 800b1a4:	300c      	adds	r0, #12
 800b1a6:	f7fe f8bb 	bl	8009320 <memcpy>
 800b1aa:	4621      	mov	r1, r4
 800b1ac:	4630      	mov	r0, r6
 800b1ae:	f7ff ffb7 	bl	800b120 <_Bfree>
 800b1b2:	4644      	mov	r4, r8
 800b1b4:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 800b1b8:	3501      	adds	r5, #1
 800b1ba:	615f      	str	r7, [r3, #20]
 800b1bc:	6125      	str	r5, [r4, #16]
 800b1be:	4620      	mov	r0, r4
 800b1c0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

0800b1c4 <__hi0bits>:
 800b1c4:	0c02      	lsrs	r2, r0, #16
 800b1c6:	0412      	lsls	r2, r2, #16
 800b1c8:	4603      	mov	r3, r0
 800b1ca:	b9b2      	cbnz	r2, 800b1fa <__hi0bits+0x36>
 800b1cc:	0403      	lsls	r3, r0, #16
 800b1ce:	2010      	movs	r0, #16
 800b1d0:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
 800b1d4:	bf04      	itt	eq
 800b1d6:	021b      	lsleq	r3, r3, #8
 800b1d8:	3008      	addeq	r0, #8
 800b1da:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
 800b1de:	bf04      	itt	eq
 800b1e0:	011b      	lsleq	r3, r3, #4
 800b1e2:	3004      	addeq	r0, #4
 800b1e4:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
 800b1e8:	bf04      	itt	eq
 800b1ea:	009b      	lsleq	r3, r3, #2
 800b1ec:	3002      	addeq	r0, #2
 800b1ee:	2b00      	cmp	r3, #0
 800b1f0:	db06      	blt.n	800b200 <__hi0bits+0x3c>
 800b1f2:	005b      	lsls	r3, r3, #1
 800b1f4:	d503      	bpl.n	800b1fe <__hi0bits+0x3a>
 800b1f6:	3001      	adds	r0, #1
 800b1f8:	4770      	bx	lr
 800b1fa:	2000      	movs	r0, #0
 800b1fc:	e7e8      	b.n	800b1d0 <__hi0bits+0xc>
 800b1fe:	2020      	movs	r0, #32
 800b200:	4770      	bx	lr

0800b202 <__lo0bits>:
 800b202:	6803      	ldr	r3, [r0, #0]
 800b204:	4601      	mov	r1, r0
 800b206:	f013 0207 	ands.w	r2, r3, #7
 800b20a:	d00b      	beq.n	800b224 <__lo0bits+0x22>
 800b20c:	07da      	lsls	r2, r3, #31
 800b20e:	d423      	bmi.n	800b258 <__lo0bits+0x56>
 800b210:	0798      	lsls	r0, r3, #30
 800b212:	bf49      	itett	mi
 800b214:	085b      	lsrmi	r3, r3, #1
 800b216:	089b      	lsrpl	r3, r3, #2
 800b218:	2001      	movmi	r0, #1
 800b21a:	600b      	strmi	r3, [r1, #0]
 800b21c:	bf5c      	itt	pl
 800b21e:	600b      	strpl	r3, [r1, #0]
 800b220:	2002      	movpl	r0, #2
 800b222:	4770      	bx	lr
 800b224:	b298      	uxth	r0, r3
 800b226:	b9a8      	cbnz	r0, 800b254 <__lo0bits+0x52>
 800b228:	2010      	movs	r0, #16
 800b22a:	0c1b      	lsrs	r3, r3, #16
 800b22c:	f013 0fff 	tst.w	r3, #255	; 0xff
 800b230:	bf04      	itt	eq
 800b232:	0a1b      	lsreq	r3, r3, #8
 800b234:	3008      	addeq	r0, #8
 800b236:	071a      	lsls	r2, r3, #28
 800b238:	bf04      	itt	eq
 800b23a:	091b      	lsreq	r3, r3, #4
 800b23c:	3004      	addeq	r0, #4
 800b23e:	079a      	lsls	r2, r3, #30
 800b240:	bf04      	itt	eq
 800b242:	089b      	lsreq	r3, r3, #2
 800b244:	3002      	addeq	r0, #2
 800b246:	07da      	lsls	r2, r3, #31
 800b248:	d402      	bmi.n	800b250 <__lo0bits+0x4e>
 800b24a:	085b      	lsrs	r3, r3, #1
 800b24c:	d006      	beq.n	800b25c <__lo0bits+0x5a>
 800b24e:	3001      	adds	r0, #1
 800b250:	600b      	str	r3, [r1, #0]
 800b252:	4770      	bx	lr
 800b254:	4610      	mov	r0, r2
 800b256:	e7e9      	b.n	800b22c <__lo0bits+0x2a>
 800b258:	2000      	movs	r0, #0
 800b25a:	4770      	bx	lr
 800b25c:	2020      	movs	r0, #32
 800b25e:	4770      	bx	lr

0800b260 <__i2b>:
 800b260:	b510      	push	{r4, lr}
 800b262:	460c      	mov	r4, r1
 800b264:	2101      	movs	r1, #1
 800b266:	f7ff ff27 	bl	800b0b8 <_Balloc>
 800b26a:	2201      	movs	r2, #1
 800b26c:	6144      	str	r4, [r0, #20]
 800b26e:	6102      	str	r2, [r0, #16]
 800b270:	bd10      	pop	{r4, pc}

0800b272 <__multiply>:
 800b272:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800b276:	4614      	mov	r4, r2
 800b278:	690a      	ldr	r2, [r1, #16]
 800b27a:	6923      	ldr	r3, [r4, #16]
 800b27c:	4689      	mov	r9, r1
 800b27e:	429a      	cmp	r2, r3
 800b280:	bfbe      	ittt	lt
 800b282:	460b      	movlt	r3, r1
 800b284:	46a1      	movlt	r9, r4
 800b286:	461c      	movlt	r4, r3
 800b288:	f8d9 7010 	ldr.w	r7, [r9, #16]
 800b28c:	f8d4 a010 	ldr.w	sl, [r4, #16]
 800b290:	f8d9 3008 	ldr.w	r3, [r9, #8]
 800b294:	f8d9 1004 	ldr.w	r1, [r9, #4]
 800b298:	eb07 060a 	add.w	r6, r7, sl
 800b29c:	429e      	cmp	r6, r3
 800b29e:	bfc8      	it	gt
 800b2a0:	3101      	addgt	r1, #1
 800b2a2:	f7ff ff09 	bl	800b0b8 <_Balloc>
 800b2a6:	f100 0514 	add.w	r5, r0, #20
 800b2aa:	462b      	mov	r3, r5
 800b2ac:	2200      	movs	r2, #0
 800b2ae:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 800b2b2:	4543      	cmp	r3, r8
 800b2b4:	d316      	bcc.n	800b2e4 <__multiply+0x72>
 800b2b6:	f104 0214 	add.w	r2, r4, #20
 800b2ba:	f109 0114 	add.w	r1, r9, #20
 800b2be:	eb02 038a 	add.w	r3, r2, sl, lsl #2
 800b2c2:	eb01 0787 	add.w	r7, r1, r7, lsl #2
 800b2c6:	9301      	str	r3, [sp, #4]
 800b2c8:	9c01      	ldr	r4, [sp, #4]
 800b2ca:	4613      	mov	r3, r2
 800b2cc:	4294      	cmp	r4, r2
 800b2ce:	d80c      	bhi.n	800b2ea <__multiply+0x78>
 800b2d0:	2e00      	cmp	r6, #0
 800b2d2:	dd03      	ble.n	800b2dc <__multiply+0x6a>
 800b2d4:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 800b2d8:	2b00      	cmp	r3, #0
 800b2da:	d054      	beq.n	800b386 <__multiply+0x114>
 800b2dc:	6106      	str	r6, [r0, #16]
 800b2de:	b003      	add	sp, #12
 800b2e0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800b2e4:	f843 2b04 	str.w	r2, [r3], #4
 800b2e8:	e7e3      	b.n	800b2b2 <__multiply+0x40>
 800b2ea:	f8b3 a000 	ldrh.w	sl, [r3]
 800b2ee:	3204      	adds	r2, #4
 800b2f0:	f1ba 0f00 	cmp.w	sl, #0
 800b2f4:	d020      	beq.n	800b338 <__multiply+0xc6>
 800b2f6:	46ae      	mov	lr, r5
 800b2f8:	4689      	mov	r9, r1
 800b2fa:	f04f 0c00 	mov.w	ip, #0
 800b2fe:	f859 4b04 	ldr.w	r4, [r9], #4
 800b302:	f8be b000 	ldrh.w	fp, [lr]
 800b306:	b2a3      	uxth	r3, r4
 800b308:	fb0a b303 	mla	r3, sl, r3, fp
 800b30c:	ea4f 4b14 	mov.w	fp, r4, lsr #16
 800b310:	f8de 4000 	ldr.w	r4, [lr]
 800b314:	4463      	add	r3, ip
 800b316:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 800b31a:	fb0a c40b 	mla	r4, sl, fp, ip
 800b31e:	eb04 4413 	add.w	r4, r4, r3, lsr #16
 800b322:	b29b      	uxth	r3, r3
 800b324:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 800b328:	454f      	cmp	r7, r9
 800b32a:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 800b32e:	f84e 3b04 	str.w	r3, [lr], #4
 800b332:	d8e4      	bhi.n	800b2fe <__multiply+0x8c>
 800b334:	f8ce c000 	str.w	ip, [lr]
 800b338:	f832 9c02 	ldrh.w	r9, [r2, #-2]
 800b33c:	f1b9 0f00 	cmp.w	r9, #0
 800b340:	d01f      	beq.n	800b382 <__multiply+0x110>
 800b342:	46ae      	mov	lr, r5
 800b344:	468c      	mov	ip, r1
 800b346:	f04f 0a00 	mov.w	sl, #0
 800b34a:	682b      	ldr	r3, [r5, #0]
 800b34c:	f8bc 4000 	ldrh.w	r4, [ip]
 800b350:	f8be b002 	ldrh.w	fp, [lr, #2]
 800b354:	b29b      	uxth	r3, r3
 800b356:	fb09 b404 	mla	r4, r9, r4, fp
 800b35a:	44a2      	add	sl, r4
 800b35c:	ea43 430a 	orr.w	r3, r3, sl, lsl #16
 800b360:	f84e 3b04 	str.w	r3, [lr], #4
 800b364:	f85c 3b04 	ldr.w	r3, [ip], #4
 800b368:	f8be 4000 	ldrh.w	r4, [lr]
 800b36c:	0c1b      	lsrs	r3, r3, #16
 800b36e:	fb09 4303 	mla	r3, r9, r3, r4
 800b372:	4567      	cmp	r7, ip
 800b374:	eb03 431a 	add.w	r3, r3, sl, lsr #16
 800b378:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 800b37c:	d8e6      	bhi.n	800b34c <__multiply+0xda>
 800b37e:	f8ce 3000 	str.w	r3, [lr]
 800b382:	3504      	adds	r5, #4
 800b384:	e7a0      	b.n	800b2c8 <__multiply+0x56>
 800b386:	3e01      	subs	r6, #1
 800b388:	e7a2      	b.n	800b2d0 <__multiply+0x5e>
	...

0800b38c <__pow5mult>:
 800b38c:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800b390:	4615      	mov	r5, r2
 800b392:	f012 0203 	ands.w	r2, r2, #3
 800b396:	4606      	mov	r6, r0
 800b398:	460f      	mov	r7, r1
 800b39a:	d007      	beq.n	800b3ac <__pow5mult+0x20>
 800b39c:	4c21      	ldr	r4, [pc, #132]	; (800b424 <__pow5mult+0x98>)
 800b39e:	3a01      	subs	r2, #1
 800b3a0:	2300      	movs	r3, #0
 800b3a2:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 800b3a6:	f7ff fed2 	bl	800b14e <__multadd>
 800b3aa:	4607      	mov	r7, r0
 800b3ac:	10ad      	asrs	r5, r5, #2
 800b3ae:	d035      	beq.n	800b41c <__pow5mult+0x90>
 800b3b0:	6a74      	ldr	r4, [r6, #36]	; 0x24
 800b3b2:	b93c      	cbnz	r4, 800b3c4 <__pow5mult+0x38>
 800b3b4:	2010      	movs	r0, #16
 800b3b6:	f7ff fe69 	bl	800b08c <malloc>
 800b3ba:	6270      	str	r0, [r6, #36]	; 0x24
 800b3bc:	6044      	str	r4, [r0, #4]
 800b3be:	6084      	str	r4, [r0, #8]
 800b3c0:	6004      	str	r4, [r0, #0]
 800b3c2:	60c4      	str	r4, [r0, #12]
 800b3c4:	f8d6 8024 	ldr.w	r8, [r6, #36]	; 0x24
 800b3c8:	f8d8 4008 	ldr.w	r4, [r8, #8]
 800b3cc:	b94c      	cbnz	r4, 800b3e2 <__pow5mult+0x56>
 800b3ce:	f240 2171 	movw	r1, #625	; 0x271
 800b3d2:	4630      	mov	r0, r6
 800b3d4:	f7ff ff44 	bl	800b260 <__i2b>
 800b3d8:	2300      	movs	r3, #0
 800b3da:	4604      	mov	r4, r0
 800b3dc:	f8c8 0008 	str.w	r0, [r8, #8]
 800b3e0:	6003      	str	r3, [r0, #0]
 800b3e2:	f04f 0800 	mov.w	r8, #0
 800b3e6:	07eb      	lsls	r3, r5, #31
 800b3e8:	d50a      	bpl.n	800b400 <__pow5mult+0x74>
 800b3ea:	4639      	mov	r1, r7
 800b3ec:	4622      	mov	r2, r4
 800b3ee:	4630      	mov	r0, r6
 800b3f0:	f7ff ff3f 	bl	800b272 <__multiply>
 800b3f4:	4681      	mov	r9, r0
 800b3f6:	4639      	mov	r1, r7
 800b3f8:	4630      	mov	r0, r6
 800b3fa:	f7ff fe91 	bl	800b120 <_Bfree>
 800b3fe:	464f      	mov	r7, r9
 800b400:	106d      	asrs	r5, r5, #1
 800b402:	d00b      	beq.n	800b41c <__pow5mult+0x90>
 800b404:	6820      	ldr	r0, [r4, #0]
 800b406:	b938      	cbnz	r0, 800b418 <__pow5mult+0x8c>
 800b408:	4622      	mov	r2, r4
 800b40a:	4621      	mov	r1, r4
 800b40c:	4630      	mov	r0, r6
 800b40e:	f7ff ff30 	bl	800b272 <__multiply>
 800b412:	6020      	str	r0, [r4, #0]
 800b414:	f8c0 8000 	str.w	r8, [r0]
 800b418:	4604      	mov	r4, r0
 800b41a:	e7e4      	b.n	800b3e6 <__pow5mult+0x5a>
 800b41c:	4638      	mov	r0, r7
 800b41e:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800b422:	bf00      	nop
 800b424:	0800be28 	.word	0x0800be28

0800b428 <__lshift>:
 800b428:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800b42c:	460c      	mov	r4, r1
 800b42e:	4607      	mov	r7, r0
 800b430:	4616      	mov	r6, r2
 800b432:	6923      	ldr	r3, [r4, #16]
 800b434:	ea4f 1a62 	mov.w	sl, r2, asr #5
 800b438:	eb0a 0903 	add.w	r9, sl, r3
 800b43c:	6849      	ldr	r1, [r1, #4]
 800b43e:	68a3      	ldr	r3, [r4, #8]
 800b440:	f109 0501 	add.w	r5, r9, #1
 800b444:	42ab      	cmp	r3, r5
 800b446:	db31      	blt.n	800b4ac <__lshift+0x84>
 800b448:	4638      	mov	r0, r7
 800b44a:	f7ff fe35 	bl	800b0b8 <_Balloc>
 800b44e:	2200      	movs	r2, #0
 800b450:	4680      	mov	r8, r0
 800b452:	4611      	mov	r1, r2
 800b454:	f100 0314 	add.w	r3, r0, #20
 800b458:	4552      	cmp	r2, sl
 800b45a:	db2a      	blt.n	800b4b2 <__lshift+0x8a>
 800b45c:	6920      	ldr	r0, [r4, #16]
 800b45e:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 800b462:	f104 0114 	add.w	r1, r4, #20
 800b466:	f016 021f 	ands.w	r2, r6, #31
 800b46a:	eb03 038a 	add.w	r3, r3, sl, lsl #2
 800b46e:	eb01 0e80 	add.w	lr, r1, r0, lsl #2
 800b472:	d022      	beq.n	800b4ba <__lshift+0x92>
 800b474:	2000      	movs	r0, #0
 800b476:	f1c2 0c20 	rsb	ip, r2, #32
 800b47a:	680e      	ldr	r6, [r1, #0]
 800b47c:	4096      	lsls	r6, r2
 800b47e:	4330      	orrs	r0, r6
 800b480:	f843 0b04 	str.w	r0, [r3], #4
 800b484:	f851 0b04 	ldr.w	r0, [r1], #4
 800b488:	458e      	cmp	lr, r1
 800b48a:	fa20 f00c 	lsr.w	r0, r0, ip
 800b48e:	d8f4      	bhi.n	800b47a <__lshift+0x52>
 800b490:	6018      	str	r0, [r3, #0]
 800b492:	b108      	cbz	r0, 800b498 <__lshift+0x70>
 800b494:	f109 0502 	add.w	r5, r9, #2
 800b498:	3d01      	subs	r5, #1
 800b49a:	4638      	mov	r0, r7
 800b49c:	f8c8 5010 	str.w	r5, [r8, #16]
 800b4a0:	4621      	mov	r1, r4
 800b4a2:	f7ff fe3d 	bl	800b120 <_Bfree>
 800b4a6:	4640      	mov	r0, r8
 800b4a8:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800b4ac:	3101      	adds	r1, #1
 800b4ae:	005b      	lsls	r3, r3, #1
 800b4b0:	e7c8      	b.n	800b444 <__lshift+0x1c>
 800b4b2:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
 800b4b6:	3201      	adds	r2, #1
 800b4b8:	e7ce      	b.n	800b458 <__lshift+0x30>
 800b4ba:	3b04      	subs	r3, #4
 800b4bc:	f851 2b04 	ldr.w	r2, [r1], #4
 800b4c0:	458e      	cmp	lr, r1
 800b4c2:	f843 2f04 	str.w	r2, [r3, #4]!
 800b4c6:	d8f9      	bhi.n	800b4bc <__lshift+0x94>
 800b4c8:	e7e6      	b.n	800b498 <__lshift+0x70>

0800b4ca <__mcmp>:
 800b4ca:	6903      	ldr	r3, [r0, #16]
 800b4cc:	690a      	ldr	r2, [r1, #16]
 800b4ce:	b530      	push	{r4, r5, lr}
 800b4d0:	1a9b      	subs	r3, r3, r2
 800b4d2:	d10c      	bne.n	800b4ee <__mcmp+0x24>
 800b4d4:	0092      	lsls	r2, r2, #2
 800b4d6:	3014      	adds	r0, #20
 800b4d8:	3114      	adds	r1, #20
 800b4da:	1884      	adds	r4, r0, r2
 800b4dc:	4411      	add	r1, r2
 800b4de:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 800b4e2:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 800b4e6:	4295      	cmp	r5, r2
 800b4e8:	d003      	beq.n	800b4f2 <__mcmp+0x28>
 800b4ea:	d305      	bcc.n	800b4f8 <__mcmp+0x2e>
 800b4ec:	2301      	movs	r3, #1
 800b4ee:	4618      	mov	r0, r3
 800b4f0:	bd30      	pop	{r4, r5, pc}
 800b4f2:	42a0      	cmp	r0, r4
 800b4f4:	d3f3      	bcc.n	800b4de <__mcmp+0x14>
 800b4f6:	e7fa      	b.n	800b4ee <__mcmp+0x24>
 800b4f8:	f04f 33ff 	mov.w	r3, #4294967295
 800b4fc:	e7f7      	b.n	800b4ee <__mcmp+0x24>

0800b4fe <__mdiff>:
 800b4fe:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800b502:	460d      	mov	r5, r1
 800b504:	4607      	mov	r7, r0
 800b506:	4611      	mov	r1, r2
 800b508:	4628      	mov	r0, r5
 800b50a:	4614      	mov	r4, r2
 800b50c:	f7ff ffdd 	bl	800b4ca <__mcmp>
 800b510:	1e06      	subs	r6, r0, #0
 800b512:	d108      	bne.n	800b526 <__mdiff+0x28>
 800b514:	4631      	mov	r1, r6
 800b516:	4638      	mov	r0, r7
 800b518:	f7ff fdce 	bl	800b0b8 <_Balloc>
 800b51c:	2301      	movs	r3, #1
 800b51e:	6146      	str	r6, [r0, #20]
 800b520:	6103      	str	r3, [r0, #16]
 800b522:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800b526:	bfa4      	itt	ge
 800b528:	4623      	movge	r3, r4
 800b52a:	462c      	movge	r4, r5
 800b52c:	4638      	mov	r0, r7
 800b52e:	6861      	ldr	r1, [r4, #4]
 800b530:	bfa6      	itte	ge
 800b532:	461d      	movge	r5, r3
 800b534:	2600      	movge	r6, #0
 800b536:	2601      	movlt	r6, #1
 800b538:	f7ff fdbe 	bl	800b0b8 <_Balloc>
 800b53c:	f04f 0c00 	mov.w	ip, #0
 800b540:	60c6      	str	r6, [r0, #12]
 800b542:	692b      	ldr	r3, [r5, #16]
 800b544:	6926      	ldr	r6, [r4, #16]
 800b546:	f104 0214 	add.w	r2, r4, #20
 800b54a:	f105 0914 	add.w	r9, r5, #20
 800b54e:	eb02 0786 	add.w	r7, r2, r6, lsl #2
 800b552:	eb09 0883 	add.w	r8, r9, r3, lsl #2
 800b556:	f100 0114 	add.w	r1, r0, #20
 800b55a:	f852 ab04 	ldr.w	sl, [r2], #4
 800b55e:	f859 5b04 	ldr.w	r5, [r9], #4
 800b562:	fa1f f38a 	uxth.w	r3, sl
 800b566:	4463      	add	r3, ip
 800b568:	b2ac      	uxth	r4, r5
 800b56a:	1b1b      	subs	r3, r3, r4
 800b56c:	0c2c      	lsrs	r4, r5, #16
 800b56e:	ebc4 441a 	rsb	r4, r4, sl, lsr #16
 800b572:	eb04 4423 	add.w	r4, r4, r3, asr #16
 800b576:	b29b      	uxth	r3, r3
 800b578:	ea4f 4c24 	mov.w	ip, r4, asr #16
 800b57c:	45c8      	cmp	r8, r9
 800b57e:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
 800b582:	4696      	mov	lr, r2
 800b584:	f841 4b04 	str.w	r4, [r1], #4
 800b588:	d8e7      	bhi.n	800b55a <__mdiff+0x5c>
 800b58a:	45be      	cmp	lr, r7
 800b58c:	d305      	bcc.n	800b59a <__mdiff+0x9c>
 800b58e:	f851 3d04 	ldr.w	r3, [r1, #-4]!
 800b592:	b18b      	cbz	r3, 800b5b8 <__mdiff+0xba>
 800b594:	6106      	str	r6, [r0, #16]
 800b596:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800b59a:	f85e 4b04 	ldr.w	r4, [lr], #4
 800b59e:	b2a2      	uxth	r2, r4
 800b5a0:	4462      	add	r2, ip
 800b5a2:	1413      	asrs	r3, r2, #16
 800b5a4:	eb03 4314 	add.w	r3, r3, r4, lsr #16
 800b5a8:	b292      	uxth	r2, r2
 800b5aa:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 800b5ae:	ea4f 4c23 	mov.w	ip, r3, asr #16
 800b5b2:	f841 2b04 	str.w	r2, [r1], #4
 800b5b6:	e7e8      	b.n	800b58a <__mdiff+0x8c>
 800b5b8:	3e01      	subs	r6, #1
 800b5ba:	e7e8      	b.n	800b58e <__mdiff+0x90>

0800b5bc <__d2b>:
 800b5bc:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
 800b5c0:	461c      	mov	r4, r3
 800b5c2:	2101      	movs	r1, #1
 800b5c4:	4690      	mov	r8, r2
 800b5c6:	9e08      	ldr	r6, [sp, #32]
 800b5c8:	9d09      	ldr	r5, [sp, #36]	; 0x24
 800b5ca:	f7ff fd75 	bl	800b0b8 <_Balloc>
 800b5ce:	f3c4 0213 	ubfx	r2, r4, #0, #20
 800b5d2:	f3c4 540a 	ubfx	r4, r4, #20, #11
 800b5d6:	4607      	mov	r7, r0
 800b5d8:	bb34      	cbnz	r4, 800b628 <__d2b+0x6c>
 800b5da:	9201      	str	r2, [sp, #4]
 800b5dc:	f1b8 0f00 	cmp.w	r8, #0
 800b5e0:	d027      	beq.n	800b632 <__d2b+0x76>
 800b5e2:	a802      	add	r0, sp, #8
 800b5e4:	f840 8d08 	str.w	r8, [r0, #-8]!
 800b5e8:	f7ff fe0b 	bl	800b202 <__lo0bits>
 800b5ec:	9900      	ldr	r1, [sp, #0]
 800b5ee:	b1f0      	cbz	r0, 800b62e <__d2b+0x72>
 800b5f0:	9a01      	ldr	r2, [sp, #4]
 800b5f2:	f1c0 0320 	rsb	r3, r0, #32
 800b5f6:	fa02 f303 	lsl.w	r3, r2, r3
 800b5fa:	430b      	orrs	r3, r1
 800b5fc:	40c2      	lsrs	r2, r0
 800b5fe:	617b      	str	r3, [r7, #20]
 800b600:	9201      	str	r2, [sp, #4]
 800b602:	9b01      	ldr	r3, [sp, #4]
 800b604:	2b00      	cmp	r3, #0
 800b606:	bf14      	ite	ne
 800b608:	2102      	movne	r1, #2
 800b60a:	2101      	moveq	r1, #1
 800b60c:	61bb      	str	r3, [r7, #24]
 800b60e:	6139      	str	r1, [r7, #16]
 800b610:	b1c4      	cbz	r4, 800b644 <__d2b+0x88>
 800b612:	f2a4 4433 	subw	r4, r4, #1075	; 0x433
 800b616:	4404      	add	r4, r0
 800b618:	6034      	str	r4, [r6, #0]
 800b61a:	f1c0 0035 	rsb	r0, r0, #53	; 0x35
 800b61e:	6028      	str	r0, [r5, #0]
 800b620:	4638      	mov	r0, r7
 800b622:	b002      	add	sp, #8
 800b624:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800b628:	f442 1280 	orr.w	r2, r2, #1048576	; 0x100000
 800b62c:	e7d5      	b.n	800b5da <__d2b+0x1e>
 800b62e:	6179      	str	r1, [r7, #20]
 800b630:	e7e7      	b.n	800b602 <__d2b+0x46>
 800b632:	a801      	add	r0, sp, #4
 800b634:	f7ff fde5 	bl	800b202 <__lo0bits>
 800b638:	2101      	movs	r1, #1
 800b63a:	9b01      	ldr	r3, [sp, #4]
 800b63c:	6139      	str	r1, [r7, #16]
 800b63e:	617b      	str	r3, [r7, #20]
 800b640:	3020      	adds	r0, #32
 800b642:	e7e5      	b.n	800b610 <__d2b+0x54>
 800b644:	f2a0 4032 	subw	r0, r0, #1074	; 0x432
 800b648:	eb07 0381 	add.w	r3, r7, r1, lsl #2
 800b64c:	6030      	str	r0, [r6, #0]
 800b64e:	6918      	ldr	r0, [r3, #16]
 800b650:	f7ff fdb8 	bl	800b1c4 <__hi0bits>
 800b654:	ebc0 1041 	rsb	r0, r0, r1, lsl #5
 800b658:	e7e1      	b.n	800b61e <__d2b+0x62>

0800b65a <_calloc_r>:
 800b65a:	b538      	push	{r3, r4, r5, lr}
 800b65c:	fb02 f401 	mul.w	r4, r2, r1
 800b660:	4621      	mov	r1, r4
 800b662:	f000 f855 	bl	800b710 <_malloc_r>
 800b666:	4605      	mov	r5, r0
 800b668:	b118      	cbz	r0, 800b672 <_calloc_r+0x18>
 800b66a:	4622      	mov	r2, r4
 800b66c:	2100      	movs	r1, #0
 800b66e:	f7fd fe62 	bl	8009336 <memset>
 800b672:	4628      	mov	r0, r5
 800b674:	bd38      	pop	{r3, r4, r5, pc}
	...

0800b678 <_free_r>:
 800b678:	b538      	push	{r3, r4, r5, lr}
 800b67a:	4605      	mov	r5, r0
 800b67c:	2900      	cmp	r1, #0
 800b67e:	d043      	beq.n	800b708 <_free_r+0x90>
 800b680:	f851 3c04 	ldr.w	r3, [r1, #-4]
 800b684:	1f0c      	subs	r4, r1, #4
 800b686:	2b00      	cmp	r3, #0
 800b688:	bfb8      	it	lt
 800b68a:	18e4      	addlt	r4, r4, r3
 800b68c:	f000 fa98 	bl	800bbc0 <__malloc_lock>
 800b690:	4a1e      	ldr	r2, [pc, #120]	; (800b70c <_free_r+0x94>)
 800b692:	6813      	ldr	r3, [r2, #0]
 800b694:	4610      	mov	r0, r2
 800b696:	b933      	cbnz	r3, 800b6a6 <_free_r+0x2e>
 800b698:	6063      	str	r3, [r4, #4]
 800b69a:	6014      	str	r4, [r2, #0]
 800b69c:	4628      	mov	r0, r5
 800b69e:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800b6a2:	f000 ba8e 	b.w	800bbc2 <__malloc_unlock>
 800b6a6:	42a3      	cmp	r3, r4
 800b6a8:	d90b      	bls.n	800b6c2 <_free_r+0x4a>
 800b6aa:	6821      	ldr	r1, [r4, #0]
 800b6ac:	1862      	adds	r2, r4, r1
 800b6ae:	4293      	cmp	r3, r2
 800b6b0:	bf01      	itttt	eq
 800b6b2:	681a      	ldreq	r2, [r3, #0]
 800b6b4:	685b      	ldreq	r3, [r3, #4]
 800b6b6:	1852      	addeq	r2, r2, r1
 800b6b8:	6022      	streq	r2, [r4, #0]
 800b6ba:	6063      	str	r3, [r4, #4]
 800b6bc:	6004      	str	r4, [r0, #0]
 800b6be:	e7ed      	b.n	800b69c <_free_r+0x24>
 800b6c0:	4613      	mov	r3, r2
 800b6c2:	685a      	ldr	r2, [r3, #4]
 800b6c4:	b10a      	cbz	r2, 800b6ca <_free_r+0x52>
 800b6c6:	42a2      	cmp	r2, r4
 800b6c8:	d9fa      	bls.n	800b6c0 <_free_r+0x48>
 800b6ca:	6819      	ldr	r1, [r3, #0]
 800b6cc:	1858      	adds	r0, r3, r1
 800b6ce:	42a0      	cmp	r0, r4
 800b6d0:	d10b      	bne.n	800b6ea <_free_r+0x72>
 800b6d2:	6820      	ldr	r0, [r4, #0]
 800b6d4:	4401      	add	r1, r0
 800b6d6:	1858      	adds	r0, r3, r1
 800b6d8:	4282      	cmp	r2, r0
 800b6da:	6019      	str	r1, [r3, #0]
 800b6dc:	d1de      	bne.n	800b69c <_free_r+0x24>
 800b6de:	6810      	ldr	r0, [r2, #0]
 800b6e0:	6852      	ldr	r2, [r2, #4]
 800b6e2:	4401      	add	r1, r0
 800b6e4:	6019      	str	r1, [r3, #0]
 800b6e6:	605a      	str	r2, [r3, #4]
 800b6e8:	e7d8      	b.n	800b69c <_free_r+0x24>
 800b6ea:	d902      	bls.n	800b6f2 <_free_r+0x7a>
 800b6ec:	230c      	movs	r3, #12
 800b6ee:	602b      	str	r3, [r5, #0]
 800b6f0:	e7d4      	b.n	800b69c <_free_r+0x24>
 800b6f2:	6820      	ldr	r0, [r4, #0]
 800b6f4:	1821      	adds	r1, r4, r0
 800b6f6:	428a      	cmp	r2, r1
 800b6f8:	bf01      	itttt	eq
 800b6fa:	6811      	ldreq	r1, [r2, #0]
 800b6fc:	6852      	ldreq	r2, [r2, #4]
 800b6fe:	1809      	addeq	r1, r1, r0
 800b700:	6021      	streq	r1, [r4, #0]
 800b702:	6062      	str	r2, [r4, #4]
 800b704:	605c      	str	r4, [r3, #4]
 800b706:	e7c9      	b.n	800b69c <_free_r+0x24>
 800b708:	bd38      	pop	{r3, r4, r5, pc}
 800b70a:	bf00      	nop
 800b70c:	20000470 	.word	0x20000470

0800b710 <_malloc_r>:
 800b710:	b570      	push	{r4, r5, r6, lr}
 800b712:	1ccd      	adds	r5, r1, #3
 800b714:	f025 0503 	bic.w	r5, r5, #3
 800b718:	3508      	adds	r5, #8
 800b71a:	2d0c      	cmp	r5, #12
 800b71c:	bf38      	it	cc
 800b71e:	250c      	movcc	r5, #12
 800b720:	2d00      	cmp	r5, #0
 800b722:	4606      	mov	r6, r0
 800b724:	db01      	blt.n	800b72a <_malloc_r+0x1a>
 800b726:	42a9      	cmp	r1, r5
 800b728:	d903      	bls.n	800b732 <_malloc_r+0x22>
 800b72a:	230c      	movs	r3, #12
 800b72c:	6033      	str	r3, [r6, #0]
 800b72e:	2000      	movs	r0, #0
 800b730:	bd70      	pop	{r4, r5, r6, pc}
 800b732:	f000 fa45 	bl	800bbc0 <__malloc_lock>
 800b736:	4a23      	ldr	r2, [pc, #140]	; (800b7c4 <_malloc_r+0xb4>)
 800b738:	6814      	ldr	r4, [r2, #0]
 800b73a:	4621      	mov	r1, r4
 800b73c:	b991      	cbnz	r1, 800b764 <_malloc_r+0x54>
 800b73e:	4c22      	ldr	r4, [pc, #136]	; (800b7c8 <_malloc_r+0xb8>)
 800b740:	6823      	ldr	r3, [r4, #0]
 800b742:	b91b      	cbnz	r3, 800b74c <_malloc_r+0x3c>
 800b744:	4630      	mov	r0, r6
 800b746:	f000 f97f 	bl	800ba48 <_sbrk_r>
 800b74a:	6020      	str	r0, [r4, #0]
 800b74c:	4629      	mov	r1, r5
 800b74e:	4630      	mov	r0, r6
 800b750:	f000 f97a 	bl	800ba48 <_sbrk_r>
 800b754:	1c43      	adds	r3, r0, #1
 800b756:	d126      	bne.n	800b7a6 <_malloc_r+0x96>
 800b758:	230c      	movs	r3, #12
 800b75a:	4630      	mov	r0, r6
 800b75c:	6033      	str	r3, [r6, #0]
 800b75e:	f000 fa30 	bl	800bbc2 <__malloc_unlock>
 800b762:	e7e4      	b.n	800b72e <_malloc_r+0x1e>
 800b764:	680b      	ldr	r3, [r1, #0]
 800b766:	1b5b      	subs	r3, r3, r5
 800b768:	d41a      	bmi.n	800b7a0 <_malloc_r+0x90>
 800b76a:	2b0b      	cmp	r3, #11
 800b76c:	d90f      	bls.n	800b78e <_malloc_r+0x7e>
 800b76e:	600b      	str	r3, [r1, #0]
 800b770:	18cc      	adds	r4, r1, r3
 800b772:	50cd      	str	r5, [r1, r3]
 800b774:	4630      	mov	r0, r6
 800b776:	f000 fa24 	bl	800bbc2 <__malloc_unlock>
 800b77a:	f104 000b 	add.w	r0, r4, #11
 800b77e:	1d23      	adds	r3, r4, #4
 800b780:	f020 0007 	bic.w	r0, r0, #7
 800b784:	1ac3      	subs	r3, r0, r3
 800b786:	d01b      	beq.n	800b7c0 <_malloc_r+0xb0>
 800b788:	425a      	negs	r2, r3
 800b78a:	50e2      	str	r2, [r4, r3]
 800b78c:	bd70      	pop	{r4, r5, r6, pc}
 800b78e:	428c      	cmp	r4, r1
 800b790:	bf0b      	itete	eq
 800b792:	6863      	ldreq	r3, [r4, #4]
 800b794:	684b      	ldrne	r3, [r1, #4]
 800b796:	6013      	streq	r3, [r2, #0]
 800b798:	6063      	strne	r3, [r4, #4]
 800b79a:	bf18      	it	ne
 800b79c:	460c      	movne	r4, r1
 800b79e:	e7e9      	b.n	800b774 <_malloc_r+0x64>
 800b7a0:	460c      	mov	r4, r1
 800b7a2:	6849      	ldr	r1, [r1, #4]
 800b7a4:	e7ca      	b.n	800b73c <_malloc_r+0x2c>
 800b7a6:	1cc4      	adds	r4, r0, #3
 800b7a8:	f024 0403 	bic.w	r4, r4, #3
 800b7ac:	42a0      	cmp	r0, r4
 800b7ae:	d005      	beq.n	800b7bc <_malloc_r+0xac>
 800b7b0:	1a21      	subs	r1, r4, r0
 800b7b2:	4630      	mov	r0, r6
 800b7b4:	f000 f948 	bl	800ba48 <_sbrk_r>
 800b7b8:	3001      	adds	r0, #1
 800b7ba:	d0cd      	beq.n	800b758 <_malloc_r+0x48>
 800b7bc:	6025      	str	r5, [r4, #0]
 800b7be:	e7d9      	b.n	800b774 <_malloc_r+0x64>
 800b7c0:	bd70      	pop	{r4, r5, r6, pc}
 800b7c2:	bf00      	nop
 800b7c4:	20000470 	.word	0x20000470
 800b7c8:	20000474 	.word	0x20000474

0800b7cc <__sfputc_r>:
 800b7cc:	6893      	ldr	r3, [r2, #8]
 800b7ce:	b410      	push	{r4}
 800b7d0:	3b01      	subs	r3, #1
 800b7d2:	2b00      	cmp	r3, #0
 800b7d4:	6093      	str	r3, [r2, #8]
 800b7d6:	da08      	bge.n	800b7ea <__sfputc_r+0x1e>
 800b7d8:	6994      	ldr	r4, [r2, #24]
 800b7da:	42a3      	cmp	r3, r4
 800b7dc:	db02      	blt.n	800b7e4 <__sfputc_r+0x18>
 800b7de:	b2cb      	uxtb	r3, r1
 800b7e0:	2b0a      	cmp	r3, #10
 800b7e2:	d102      	bne.n	800b7ea <__sfputc_r+0x1e>
 800b7e4:	bc10      	pop	{r4}
 800b7e6:	f7fe bb41 	b.w	8009e6c <__swbuf_r>
 800b7ea:	6813      	ldr	r3, [r2, #0]
 800b7ec:	1c58      	adds	r0, r3, #1
 800b7ee:	6010      	str	r0, [r2, #0]
 800b7f0:	7019      	strb	r1, [r3, #0]
 800b7f2:	b2c8      	uxtb	r0, r1
 800b7f4:	bc10      	pop	{r4}
 800b7f6:	4770      	bx	lr

0800b7f8 <__sfputs_r>:
 800b7f8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800b7fa:	4606      	mov	r6, r0
 800b7fc:	460f      	mov	r7, r1
 800b7fe:	4614      	mov	r4, r2
 800b800:	18d5      	adds	r5, r2, r3
 800b802:	42ac      	cmp	r4, r5
 800b804:	d101      	bne.n	800b80a <__sfputs_r+0x12>
 800b806:	2000      	movs	r0, #0
 800b808:	e007      	b.n	800b81a <__sfputs_r+0x22>
 800b80a:	463a      	mov	r2, r7
 800b80c:	f814 1b01 	ldrb.w	r1, [r4], #1
 800b810:	4630      	mov	r0, r6
 800b812:	f7ff ffdb 	bl	800b7cc <__sfputc_r>
 800b816:	1c43      	adds	r3, r0, #1
 800b818:	d1f3      	bne.n	800b802 <__sfputs_r+0xa>
 800b81a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

0800b81c <_vfiprintf_r>:
 800b81c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800b820:	b09d      	sub	sp, #116	; 0x74
 800b822:	460c      	mov	r4, r1
 800b824:	4617      	mov	r7, r2
 800b826:	9303      	str	r3, [sp, #12]
 800b828:	4606      	mov	r6, r0
 800b82a:	b118      	cbz	r0, 800b834 <_vfiprintf_r+0x18>
 800b82c:	6983      	ldr	r3, [r0, #24]
 800b82e:	b90b      	cbnz	r3, 800b834 <_vfiprintf_r+0x18>
 800b830:	f7ff fb30 	bl	800ae94 <__sinit>
 800b834:	4b7c      	ldr	r3, [pc, #496]	; (800ba28 <_vfiprintf_r+0x20c>)
 800b836:	429c      	cmp	r4, r3
 800b838:	d157      	bne.n	800b8ea <_vfiprintf_r+0xce>
 800b83a:	6874      	ldr	r4, [r6, #4]
 800b83c:	89a3      	ldrh	r3, [r4, #12]
 800b83e:	0718      	lsls	r0, r3, #28
 800b840:	d55d      	bpl.n	800b8fe <_vfiprintf_r+0xe2>
 800b842:	6923      	ldr	r3, [r4, #16]
 800b844:	2b00      	cmp	r3, #0
 800b846:	d05a      	beq.n	800b8fe <_vfiprintf_r+0xe2>
 800b848:	2300      	movs	r3, #0
 800b84a:	9309      	str	r3, [sp, #36]	; 0x24
 800b84c:	2320      	movs	r3, #32
 800b84e:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 800b852:	2330      	movs	r3, #48	; 0x30
 800b854:	f04f 0b01 	mov.w	fp, #1
 800b858:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 800b85c:	46b8      	mov	r8, r7
 800b85e:	4645      	mov	r5, r8
 800b860:	f815 3b01 	ldrb.w	r3, [r5], #1
 800b864:	2b00      	cmp	r3, #0
 800b866:	d155      	bne.n	800b914 <_vfiprintf_r+0xf8>
 800b868:	ebb8 0a07 	subs.w	sl, r8, r7
 800b86c:	d00b      	beq.n	800b886 <_vfiprintf_r+0x6a>
 800b86e:	4653      	mov	r3, sl
 800b870:	463a      	mov	r2, r7
 800b872:	4621      	mov	r1, r4
 800b874:	4630      	mov	r0, r6
 800b876:	f7ff ffbf 	bl	800b7f8 <__sfputs_r>
 800b87a:	3001      	adds	r0, #1
 800b87c:	f000 80c4 	beq.w	800ba08 <_vfiprintf_r+0x1ec>
 800b880:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800b882:	4453      	add	r3, sl
 800b884:	9309      	str	r3, [sp, #36]	; 0x24
 800b886:	f898 3000 	ldrb.w	r3, [r8]
 800b88a:	2b00      	cmp	r3, #0
 800b88c:	f000 80bc 	beq.w	800ba08 <_vfiprintf_r+0x1ec>
 800b890:	2300      	movs	r3, #0
 800b892:	f04f 32ff 	mov.w	r2, #4294967295
 800b896:	9304      	str	r3, [sp, #16]
 800b898:	9307      	str	r3, [sp, #28]
 800b89a:	9205      	str	r2, [sp, #20]
 800b89c:	9306      	str	r3, [sp, #24]
 800b89e:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 800b8a2:	931a      	str	r3, [sp, #104]	; 0x68
 800b8a4:	2205      	movs	r2, #5
 800b8a6:	7829      	ldrb	r1, [r5, #0]
 800b8a8:	4860      	ldr	r0, [pc, #384]	; (800ba2c <_vfiprintf_r+0x210>)
 800b8aa:	f7ff fbf7 	bl	800b09c <memchr>
 800b8ae:	f105 0801 	add.w	r8, r5, #1
 800b8b2:	9b04      	ldr	r3, [sp, #16]
 800b8b4:	2800      	cmp	r0, #0
 800b8b6:	d131      	bne.n	800b91c <_vfiprintf_r+0x100>
 800b8b8:	06d9      	lsls	r1, r3, #27
 800b8ba:	bf44      	itt	mi
 800b8bc:	2220      	movmi	r2, #32
 800b8be:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800b8c2:	071a      	lsls	r2, r3, #28
 800b8c4:	bf44      	itt	mi
 800b8c6:	222b      	movmi	r2, #43	; 0x2b
 800b8c8:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800b8cc:	782a      	ldrb	r2, [r5, #0]
 800b8ce:	2a2a      	cmp	r2, #42	; 0x2a
 800b8d0:	d02c      	beq.n	800b92c <_vfiprintf_r+0x110>
 800b8d2:	2100      	movs	r1, #0
 800b8d4:	200a      	movs	r0, #10
 800b8d6:	9a07      	ldr	r2, [sp, #28]
 800b8d8:	46a8      	mov	r8, r5
 800b8da:	f898 3000 	ldrb.w	r3, [r8]
 800b8de:	3501      	adds	r5, #1
 800b8e0:	3b30      	subs	r3, #48	; 0x30
 800b8e2:	2b09      	cmp	r3, #9
 800b8e4:	d96d      	bls.n	800b9c2 <_vfiprintf_r+0x1a6>
 800b8e6:	b371      	cbz	r1, 800b946 <_vfiprintf_r+0x12a>
 800b8e8:	e026      	b.n	800b938 <_vfiprintf_r+0x11c>
 800b8ea:	4b51      	ldr	r3, [pc, #324]	; (800ba30 <_vfiprintf_r+0x214>)
 800b8ec:	429c      	cmp	r4, r3
 800b8ee:	d101      	bne.n	800b8f4 <_vfiprintf_r+0xd8>
 800b8f0:	68b4      	ldr	r4, [r6, #8]
 800b8f2:	e7a3      	b.n	800b83c <_vfiprintf_r+0x20>
 800b8f4:	4b4f      	ldr	r3, [pc, #316]	; (800ba34 <_vfiprintf_r+0x218>)
 800b8f6:	429c      	cmp	r4, r3
 800b8f8:	bf08      	it	eq
 800b8fa:	68f4      	ldreq	r4, [r6, #12]
 800b8fc:	e79e      	b.n	800b83c <_vfiprintf_r+0x20>
 800b8fe:	4621      	mov	r1, r4
 800b900:	4630      	mov	r0, r6
 800b902:	f7fe fb05 	bl	8009f10 <__swsetup_r>
 800b906:	2800      	cmp	r0, #0
 800b908:	d09e      	beq.n	800b848 <_vfiprintf_r+0x2c>
 800b90a:	f04f 30ff 	mov.w	r0, #4294967295
 800b90e:	b01d      	add	sp, #116	; 0x74
 800b910:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800b914:	2b25      	cmp	r3, #37	; 0x25
 800b916:	d0a7      	beq.n	800b868 <_vfiprintf_r+0x4c>
 800b918:	46a8      	mov	r8, r5
 800b91a:	e7a0      	b.n	800b85e <_vfiprintf_r+0x42>
 800b91c:	4a43      	ldr	r2, [pc, #268]	; (800ba2c <_vfiprintf_r+0x210>)
 800b91e:	4645      	mov	r5, r8
 800b920:	1a80      	subs	r0, r0, r2
 800b922:	fa0b f000 	lsl.w	r0, fp, r0
 800b926:	4318      	orrs	r0, r3
 800b928:	9004      	str	r0, [sp, #16]
 800b92a:	e7bb      	b.n	800b8a4 <_vfiprintf_r+0x88>
 800b92c:	9a03      	ldr	r2, [sp, #12]
 800b92e:	1d11      	adds	r1, r2, #4
 800b930:	6812      	ldr	r2, [r2, #0]
 800b932:	9103      	str	r1, [sp, #12]
 800b934:	2a00      	cmp	r2, #0
 800b936:	db01      	blt.n	800b93c <_vfiprintf_r+0x120>
 800b938:	9207      	str	r2, [sp, #28]
 800b93a:	e004      	b.n	800b946 <_vfiprintf_r+0x12a>
 800b93c:	4252      	negs	r2, r2
 800b93e:	f043 0302 	orr.w	r3, r3, #2
 800b942:	9207      	str	r2, [sp, #28]
 800b944:	9304      	str	r3, [sp, #16]
 800b946:	f898 3000 	ldrb.w	r3, [r8]
 800b94a:	2b2e      	cmp	r3, #46	; 0x2e
 800b94c:	d110      	bne.n	800b970 <_vfiprintf_r+0x154>
 800b94e:	f898 3001 	ldrb.w	r3, [r8, #1]
 800b952:	f108 0101 	add.w	r1, r8, #1
 800b956:	2b2a      	cmp	r3, #42	; 0x2a
 800b958:	d137      	bne.n	800b9ca <_vfiprintf_r+0x1ae>
 800b95a:	9b03      	ldr	r3, [sp, #12]
 800b95c:	f108 0802 	add.w	r8, r8, #2
 800b960:	1d1a      	adds	r2, r3, #4
 800b962:	681b      	ldr	r3, [r3, #0]
 800b964:	9203      	str	r2, [sp, #12]
 800b966:	2b00      	cmp	r3, #0
 800b968:	bfb8      	it	lt
 800b96a:	f04f 33ff 	movlt.w	r3, #4294967295
 800b96e:	9305      	str	r3, [sp, #20]
 800b970:	4d31      	ldr	r5, [pc, #196]	; (800ba38 <_vfiprintf_r+0x21c>)
 800b972:	2203      	movs	r2, #3
 800b974:	f898 1000 	ldrb.w	r1, [r8]
 800b978:	4628      	mov	r0, r5
 800b97a:	f7ff fb8f 	bl	800b09c <memchr>
 800b97e:	b140      	cbz	r0, 800b992 <_vfiprintf_r+0x176>
 800b980:	2340      	movs	r3, #64	; 0x40
 800b982:	1b40      	subs	r0, r0, r5
 800b984:	fa03 f000 	lsl.w	r0, r3, r0
 800b988:	9b04      	ldr	r3, [sp, #16]
 800b98a:	f108 0801 	add.w	r8, r8, #1
 800b98e:	4303      	orrs	r3, r0
 800b990:	9304      	str	r3, [sp, #16]
 800b992:	f898 1000 	ldrb.w	r1, [r8]
 800b996:	2206      	movs	r2, #6
 800b998:	4828      	ldr	r0, [pc, #160]	; (800ba3c <_vfiprintf_r+0x220>)
 800b99a:	f108 0701 	add.w	r7, r8, #1
 800b99e:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 800b9a2:	f7ff fb7b 	bl	800b09c <memchr>
 800b9a6:	2800      	cmp	r0, #0
 800b9a8:	d034      	beq.n	800ba14 <_vfiprintf_r+0x1f8>
 800b9aa:	4b25      	ldr	r3, [pc, #148]	; (800ba40 <_vfiprintf_r+0x224>)
 800b9ac:	bb03      	cbnz	r3, 800b9f0 <_vfiprintf_r+0x1d4>
 800b9ae:	9b03      	ldr	r3, [sp, #12]
 800b9b0:	3307      	adds	r3, #7
 800b9b2:	f023 0307 	bic.w	r3, r3, #7
 800b9b6:	3308      	adds	r3, #8
 800b9b8:	9303      	str	r3, [sp, #12]
 800b9ba:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800b9bc:	444b      	add	r3, r9
 800b9be:	9309      	str	r3, [sp, #36]	; 0x24
 800b9c0:	e74c      	b.n	800b85c <_vfiprintf_r+0x40>
 800b9c2:	fb00 3202 	mla	r2, r0, r2, r3
 800b9c6:	2101      	movs	r1, #1
 800b9c8:	e786      	b.n	800b8d8 <_vfiprintf_r+0xbc>
 800b9ca:	2300      	movs	r3, #0
 800b9cc:	250a      	movs	r5, #10
 800b9ce:	4618      	mov	r0, r3
 800b9d0:	9305      	str	r3, [sp, #20]
 800b9d2:	4688      	mov	r8, r1
 800b9d4:	f898 2000 	ldrb.w	r2, [r8]
 800b9d8:	3101      	adds	r1, #1
 800b9da:	3a30      	subs	r2, #48	; 0x30
 800b9dc:	2a09      	cmp	r2, #9
 800b9de:	d903      	bls.n	800b9e8 <_vfiprintf_r+0x1cc>
 800b9e0:	2b00      	cmp	r3, #0
 800b9e2:	d0c5      	beq.n	800b970 <_vfiprintf_r+0x154>
 800b9e4:	9005      	str	r0, [sp, #20]
 800b9e6:	e7c3      	b.n	800b970 <_vfiprintf_r+0x154>
 800b9e8:	fb05 2000 	mla	r0, r5, r0, r2
 800b9ec:	2301      	movs	r3, #1
 800b9ee:	e7f0      	b.n	800b9d2 <_vfiprintf_r+0x1b6>
 800b9f0:	ab03      	add	r3, sp, #12
 800b9f2:	9300      	str	r3, [sp, #0]
 800b9f4:	4622      	mov	r2, r4
 800b9f6:	4b13      	ldr	r3, [pc, #76]	; (800ba44 <_vfiprintf_r+0x228>)
 800b9f8:	a904      	add	r1, sp, #16
 800b9fa:	4630      	mov	r0, r6
 800b9fc:	f7fd fd34 	bl	8009468 <_printf_float>
 800ba00:	f1b0 3fff 	cmp.w	r0, #4294967295
 800ba04:	4681      	mov	r9, r0
 800ba06:	d1d8      	bne.n	800b9ba <_vfiprintf_r+0x19e>
 800ba08:	89a3      	ldrh	r3, [r4, #12]
 800ba0a:	065b      	lsls	r3, r3, #25
 800ba0c:	f53f af7d 	bmi.w	800b90a <_vfiprintf_r+0xee>
 800ba10:	9809      	ldr	r0, [sp, #36]	; 0x24
 800ba12:	e77c      	b.n	800b90e <_vfiprintf_r+0xf2>
 800ba14:	ab03      	add	r3, sp, #12
 800ba16:	9300      	str	r3, [sp, #0]
 800ba18:	4622      	mov	r2, r4
 800ba1a:	4b0a      	ldr	r3, [pc, #40]	; (800ba44 <_vfiprintf_r+0x228>)
 800ba1c:	a904      	add	r1, sp, #16
 800ba1e:	4630      	mov	r0, r6
 800ba20:	f7fd ffd2 	bl	80099c8 <_printf_i>
 800ba24:	e7ec      	b.n	800ba00 <_vfiprintf_r+0x1e4>
 800ba26:	bf00      	nop
 800ba28:	0800bcf4 	.word	0x0800bcf4
 800ba2c:	0800be34 	.word	0x0800be34
 800ba30:	0800bd14 	.word	0x0800bd14
 800ba34:	0800bcd4 	.word	0x0800bcd4
 800ba38:	0800be3a 	.word	0x0800be3a
 800ba3c:	0800be3e 	.word	0x0800be3e
 800ba40:	08009469 	.word	0x08009469
 800ba44:	0800b7f9 	.word	0x0800b7f9

0800ba48 <_sbrk_r>:
 800ba48:	b538      	push	{r3, r4, r5, lr}
 800ba4a:	2300      	movs	r3, #0
 800ba4c:	4c05      	ldr	r4, [pc, #20]	; (800ba64 <_sbrk_r+0x1c>)
 800ba4e:	4605      	mov	r5, r0
 800ba50:	4608      	mov	r0, r1
 800ba52:	6023      	str	r3, [r4, #0]
 800ba54:	f7fc fddc 	bl	8008610 <_sbrk>
 800ba58:	1c43      	adds	r3, r0, #1
 800ba5a:	d102      	bne.n	800ba62 <_sbrk_r+0x1a>
 800ba5c:	6823      	ldr	r3, [r4, #0]
 800ba5e:	b103      	cbz	r3, 800ba62 <_sbrk_r+0x1a>
 800ba60:	602b      	str	r3, [r5, #0]
 800ba62:	bd38      	pop	{r3, r4, r5, pc}
 800ba64:	200017e0 	.word	0x200017e0

0800ba68 <__sread>:
 800ba68:	b510      	push	{r4, lr}
 800ba6a:	460c      	mov	r4, r1
 800ba6c:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800ba70:	f000 f8a8 	bl	800bbc4 <_read_r>
 800ba74:	2800      	cmp	r0, #0
 800ba76:	bfab      	itete	ge
 800ba78:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 800ba7a:	89a3      	ldrhlt	r3, [r4, #12]
 800ba7c:	181b      	addge	r3, r3, r0
 800ba7e:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 800ba82:	bfac      	ite	ge
 800ba84:	6563      	strge	r3, [r4, #84]	; 0x54
 800ba86:	81a3      	strhlt	r3, [r4, #12]
 800ba88:	bd10      	pop	{r4, pc}

0800ba8a <__swrite>:
 800ba8a:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800ba8e:	461f      	mov	r7, r3
 800ba90:	898b      	ldrh	r3, [r1, #12]
 800ba92:	4605      	mov	r5, r0
 800ba94:	05db      	lsls	r3, r3, #23
 800ba96:	460c      	mov	r4, r1
 800ba98:	4616      	mov	r6, r2
 800ba9a:	d505      	bpl.n	800baa8 <__swrite+0x1e>
 800ba9c:	2302      	movs	r3, #2
 800ba9e:	2200      	movs	r2, #0
 800baa0:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800baa4:	f000 f868 	bl	800bb78 <_lseek_r>
 800baa8:	89a3      	ldrh	r3, [r4, #12]
 800baaa:	4632      	mov	r2, r6
 800baac:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 800bab0:	81a3      	strh	r3, [r4, #12]
 800bab2:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800bab6:	463b      	mov	r3, r7
 800bab8:	4628      	mov	r0, r5
 800baba:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 800babe:	f000 b817 	b.w	800baf0 <_write_r>

0800bac2 <__sseek>:
 800bac2:	b510      	push	{r4, lr}
 800bac4:	460c      	mov	r4, r1
 800bac6:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800baca:	f000 f855 	bl	800bb78 <_lseek_r>
 800bace:	1c43      	adds	r3, r0, #1
 800bad0:	89a3      	ldrh	r3, [r4, #12]
 800bad2:	bf15      	itete	ne
 800bad4:	6560      	strne	r0, [r4, #84]	; 0x54
 800bad6:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 800bada:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 800bade:	81a3      	strheq	r3, [r4, #12]
 800bae0:	bf18      	it	ne
 800bae2:	81a3      	strhne	r3, [r4, #12]
 800bae4:	bd10      	pop	{r4, pc}

0800bae6 <__sclose>:
 800bae6:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800baea:	f000 b813 	b.w	800bb14 <_close_r>
	...

0800baf0 <_write_r>:
 800baf0:	b538      	push	{r3, r4, r5, lr}
 800baf2:	4605      	mov	r5, r0
 800baf4:	4608      	mov	r0, r1
 800baf6:	4611      	mov	r1, r2
 800baf8:	2200      	movs	r2, #0
 800bafa:	4c05      	ldr	r4, [pc, #20]	; (800bb10 <_write_r+0x20>)
 800bafc:	6022      	str	r2, [r4, #0]
 800bafe:	461a      	mov	r2, r3
 800bb00:	f7fc f8f2 	bl	8007ce8 <_write>
 800bb04:	1c43      	adds	r3, r0, #1
 800bb06:	d102      	bne.n	800bb0e <_write_r+0x1e>
 800bb08:	6823      	ldr	r3, [r4, #0]
 800bb0a:	b103      	cbz	r3, 800bb0e <_write_r+0x1e>
 800bb0c:	602b      	str	r3, [r5, #0]
 800bb0e:	bd38      	pop	{r3, r4, r5, pc}
 800bb10:	200017e0 	.word	0x200017e0

0800bb14 <_close_r>:
 800bb14:	b538      	push	{r3, r4, r5, lr}
 800bb16:	2300      	movs	r3, #0
 800bb18:	4c05      	ldr	r4, [pc, #20]	; (800bb30 <_close_r+0x1c>)
 800bb1a:	4605      	mov	r5, r0
 800bb1c:	4608      	mov	r0, r1
 800bb1e:	6023      	str	r3, [r4, #0]
 800bb20:	f7fc fd90 	bl	8008644 <_close>
 800bb24:	1c43      	adds	r3, r0, #1
 800bb26:	d102      	bne.n	800bb2e <_close_r+0x1a>
 800bb28:	6823      	ldr	r3, [r4, #0]
 800bb2a:	b103      	cbz	r3, 800bb2e <_close_r+0x1a>
 800bb2c:	602b      	str	r3, [r5, #0]
 800bb2e:	bd38      	pop	{r3, r4, r5, pc}
 800bb30:	200017e0 	.word	0x200017e0

0800bb34 <_fstat_r>:
 800bb34:	b538      	push	{r3, r4, r5, lr}
 800bb36:	2300      	movs	r3, #0
 800bb38:	4c06      	ldr	r4, [pc, #24]	; (800bb54 <_fstat_r+0x20>)
 800bb3a:	4605      	mov	r5, r0
 800bb3c:	4608      	mov	r0, r1
 800bb3e:	4611      	mov	r1, r2
 800bb40:	6023      	str	r3, [r4, #0]
 800bb42:	f7fc fd82 	bl	800864a <_fstat>
 800bb46:	1c43      	adds	r3, r0, #1
 800bb48:	d102      	bne.n	800bb50 <_fstat_r+0x1c>
 800bb4a:	6823      	ldr	r3, [r4, #0]
 800bb4c:	b103      	cbz	r3, 800bb50 <_fstat_r+0x1c>
 800bb4e:	602b      	str	r3, [r5, #0]
 800bb50:	bd38      	pop	{r3, r4, r5, pc}
 800bb52:	bf00      	nop
 800bb54:	200017e0 	.word	0x200017e0

0800bb58 <_isatty_r>:
 800bb58:	b538      	push	{r3, r4, r5, lr}
 800bb5a:	2300      	movs	r3, #0
 800bb5c:	4c05      	ldr	r4, [pc, #20]	; (800bb74 <_isatty_r+0x1c>)
 800bb5e:	4605      	mov	r5, r0
 800bb60:	4608      	mov	r0, r1
 800bb62:	6023      	str	r3, [r4, #0]
 800bb64:	f7fc fd76 	bl	8008654 <_isatty>
 800bb68:	1c43      	adds	r3, r0, #1
 800bb6a:	d102      	bne.n	800bb72 <_isatty_r+0x1a>
 800bb6c:	6823      	ldr	r3, [r4, #0]
 800bb6e:	b103      	cbz	r3, 800bb72 <_isatty_r+0x1a>
 800bb70:	602b      	str	r3, [r5, #0]
 800bb72:	bd38      	pop	{r3, r4, r5, pc}
 800bb74:	200017e0 	.word	0x200017e0

0800bb78 <_lseek_r>:
 800bb78:	b538      	push	{r3, r4, r5, lr}
 800bb7a:	4605      	mov	r5, r0
 800bb7c:	4608      	mov	r0, r1
 800bb7e:	4611      	mov	r1, r2
 800bb80:	2200      	movs	r2, #0
 800bb82:	4c05      	ldr	r4, [pc, #20]	; (800bb98 <_lseek_r+0x20>)
 800bb84:	6022      	str	r2, [r4, #0]
 800bb86:	461a      	mov	r2, r3
 800bb88:	f7fc fd66 	bl	8008658 <_lseek>
 800bb8c:	1c43      	adds	r3, r0, #1
 800bb8e:	d102      	bne.n	800bb96 <_lseek_r+0x1e>
 800bb90:	6823      	ldr	r3, [r4, #0]
 800bb92:	b103      	cbz	r3, 800bb96 <_lseek_r+0x1e>
 800bb94:	602b      	str	r3, [r5, #0]
 800bb96:	bd38      	pop	{r3, r4, r5, pc}
 800bb98:	200017e0 	.word	0x200017e0

0800bb9c <__ascii_mbtowc>:
 800bb9c:	b082      	sub	sp, #8
 800bb9e:	b901      	cbnz	r1, 800bba2 <__ascii_mbtowc+0x6>
 800bba0:	a901      	add	r1, sp, #4
 800bba2:	b142      	cbz	r2, 800bbb6 <__ascii_mbtowc+0x1a>
 800bba4:	b14b      	cbz	r3, 800bbba <__ascii_mbtowc+0x1e>
 800bba6:	7813      	ldrb	r3, [r2, #0]
 800bba8:	600b      	str	r3, [r1, #0]
 800bbaa:	7812      	ldrb	r2, [r2, #0]
 800bbac:	1c10      	adds	r0, r2, #0
 800bbae:	bf18      	it	ne
 800bbb0:	2001      	movne	r0, #1
 800bbb2:	b002      	add	sp, #8
 800bbb4:	4770      	bx	lr
 800bbb6:	4610      	mov	r0, r2
 800bbb8:	e7fb      	b.n	800bbb2 <__ascii_mbtowc+0x16>
 800bbba:	f06f 0001 	mvn.w	r0, #1
 800bbbe:	e7f8      	b.n	800bbb2 <__ascii_mbtowc+0x16>

0800bbc0 <__malloc_lock>:
 800bbc0:	4770      	bx	lr

0800bbc2 <__malloc_unlock>:
 800bbc2:	4770      	bx	lr

0800bbc4 <_read_r>:
 800bbc4:	b538      	push	{r3, r4, r5, lr}
 800bbc6:	4605      	mov	r5, r0
 800bbc8:	4608      	mov	r0, r1
 800bbca:	4611      	mov	r1, r2
 800bbcc:	2200      	movs	r2, #0
 800bbce:	4c05      	ldr	r4, [pc, #20]	; (800bbe4 <_read_r+0x20>)
 800bbd0:	6022      	str	r2, [r4, #0]
 800bbd2:	461a      	mov	r2, r3
 800bbd4:	f7fc fd0e 	bl	80085f4 <_read>
 800bbd8:	1c43      	adds	r3, r0, #1
 800bbda:	d102      	bne.n	800bbe2 <_read_r+0x1e>
 800bbdc:	6823      	ldr	r3, [r4, #0]
 800bbde:	b103      	cbz	r3, 800bbe2 <_read_r+0x1e>
 800bbe0:	602b      	str	r3, [r5, #0]
 800bbe2:	bd38      	pop	{r3, r4, r5, pc}
 800bbe4:	200017e0 	.word	0x200017e0

0800bbe8 <__ascii_wctomb>:
 800bbe8:	b149      	cbz	r1, 800bbfe <__ascii_wctomb+0x16>
 800bbea:	2aff      	cmp	r2, #255	; 0xff
 800bbec:	bf8b      	itete	hi
 800bbee:	238a      	movhi	r3, #138	; 0x8a
 800bbf0:	700a      	strbls	r2, [r1, #0]
 800bbf2:	6003      	strhi	r3, [r0, #0]
 800bbf4:	2001      	movls	r0, #1
 800bbf6:	bf88      	it	hi
 800bbf8:	f04f 30ff 	movhi.w	r0, #4294967295
 800bbfc:	4770      	bx	lr
 800bbfe:	4608      	mov	r0, r1
 800bc00:	4770      	bx	lr
	...

0800bc04 <_init>:
 800bc04:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800bc06:	bf00      	nop
 800bc08:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800bc0a:	bc08      	pop	{r3}
 800bc0c:	469e      	mov	lr, r3
 800bc0e:	4770      	bx	lr

0800bc10 <_fini>:
 800bc10:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800bc12:	bf00      	nop
 800bc14:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800bc16:	bc08      	pop	{r3}
 800bc18:	469e      	mov	lr, r3
 800bc1a:	4770      	bx	lr