STM32F103_ATTEN_PLL_Zig/Debug/STM32F103_ATTEN_PLL_Zig.list

STM32F103_ATTEN_PLL_Zig.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08004000  08004000  00004000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00007d4c  080041e8  080041e8  000041e8  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00000330  0800bf38  0800bf38  0000bf38  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  0800c268  0800c268  0000c268  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  0800c270  0800c270  0000c270  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .fini_array   00000004  0800c274  0800c274  0000c274  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .data         0000041c  20000000  0800c278  00010000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          000013c4  20000420  0800c694  00010420  2**3
                  ALLOC
  8 ._user_heap_stack 00000600  200017e4  0800c694  000117e4  2**0
                  ALLOC
  9 .ARM.attributes 00000029  00000000  00000000  0001041c  2**0
                  CONTENTS, READONLY
 10 .debug_info   00025572  00000000  00000000  00010445  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_abbrev 00005055  00000000  00000000  000359b7  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_loc    00009c9c  00000000  00000000  0003aa0c  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_aranges 00000e38  00000000  00000000  000446a8  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_ranges 00001218  00000000  00000000  000454e0  2**3
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_line   0000990e  00000000  00000000  000466f8  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .debug_str    000058a5  00000000  00000000  00050006  2**0
                  CONTENTS, READONLY, DEBUGGING
 17 .comment      0000007c  00000000  00000000  000558ab  2**0
                  CONTENTS, READONLY
 18 .debug_frame  00003840  00000000  00000000  00055928  2**2
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080041e8 <__do_global_dtors_aux>:
 80041e8:	b510      	push	{r4, lr}
 80041ea:	4c05      	ldr	r4, [pc, #20]	; (8004200 <__do_global_dtors_aux+0x18>)
 80041ec:	7823      	ldrb	r3, [r4, #0]
 80041ee:	b933      	cbnz	r3, 80041fe <__do_global_dtors_aux+0x16>
 80041f0:	4b04      	ldr	r3, [pc, #16]	; (8004204 <__do_global_dtors_aux+0x1c>)
 80041f2:	b113      	cbz	r3, 80041fa <__do_global_dtors_aux+0x12>
 80041f4:	4804      	ldr	r0, [pc, #16]	; (8004208 <__do_global_dtors_aux+0x20>)
 80041f6:	f3af 8000 	nop.w
 80041fa:	2301      	movs	r3, #1
 80041fc:	7023      	strb	r3, [r4, #0]
 80041fe:	bd10      	pop	{r4, pc}
 8004200:	20000420 	.word	0x20000420
 8004204:	00000000 	.word	0x00000000
 8004208:	0800bf1c 	.word	0x0800bf1c

0800420c <frame_dummy>:
 800420c:	b508      	push	{r3, lr}
 800420e:	4b03      	ldr	r3, [pc, #12]	; (800421c <frame_dummy+0x10>)
 8004210:	b11b      	cbz	r3, 800421a <frame_dummy+0xe>
 8004212:	4903      	ldr	r1, [pc, #12]	; (8004220 <frame_dummy+0x14>)
 8004214:	4803      	ldr	r0, [pc, #12]	; (8004224 <frame_dummy+0x18>)
 8004216:	f3af 8000 	nop.w
 800421a:	bd08      	pop	{r3, pc}
 800421c:	00000000 	.word	0x00000000
 8004220:	20000424 	.word	0x20000424
 8004224:	0800bf1c 	.word	0x0800bf1c

08004228 <strlen>:
 8004228:	4603      	mov	r3, r0
 800422a:	f813 2b01 	ldrb.w	r2, [r3], #1
 800422e:	2a00      	cmp	r2, #0
 8004230:	d1fb      	bne.n	800422a <strlen+0x2>
 8004232:	1a18      	subs	r0, r3, r0
 8004234:	3801      	subs	r0, #1
 8004236:	4770      	bx	lr

08004238 <__aeabi_llsr>:
 8004238:	40d0      	lsrs	r0, r2
 800423a:	1c0b      	adds	r3, r1, #0
 800423c:	40d1      	lsrs	r1, r2
 800423e:	469c      	mov	ip, r3
 8004240:	3a20      	subs	r2, #32
 8004242:	40d3      	lsrs	r3, r2
 8004244:	4318      	orrs	r0, r3
 8004246:	4252      	negs	r2, r2
 8004248:	4663      	mov	r3, ip
 800424a:	4093      	lsls	r3, r2
 800424c:	4318      	orrs	r0, r3
 800424e:	4770      	bx	lr

08004250 <__aeabi_drsub>:
 8004250:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
 8004254:	e002      	b.n	800425c <__adddf3>
 8004256:	bf00      	nop

08004258 <__aeabi_dsub>:
 8004258:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000

0800425c <__adddf3>:
 800425c:	b530      	push	{r4, r5, lr}
 800425e:	ea4f 0441 	mov.w	r4, r1, lsl #1
 8004262:	ea4f 0543 	mov.w	r5, r3, lsl #1
 8004266:	ea94 0f05 	teq	r4, r5
 800426a:	bf08      	it	eq
 800426c:	ea90 0f02 	teqeq	r0, r2
 8004270:	bf1f      	itttt	ne
 8004272:	ea54 0c00 	orrsne.w	ip, r4, r0
 8004276:	ea55 0c02 	orrsne.w	ip, r5, r2
 800427a:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 800427e:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 8004282:	f000 80e2 	beq.w	800444a <__adddf3+0x1ee>
 8004286:	ea4f 5454 	mov.w	r4, r4, lsr #21
 800428a:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 800428e:	bfb8      	it	lt
 8004290:	426d      	neglt	r5, r5
 8004292:	dd0c      	ble.n	80042ae <__adddf3+0x52>
 8004294:	442c      	add	r4, r5
 8004296:	ea80 0202 	eor.w	r2, r0, r2
 800429a:	ea81 0303 	eor.w	r3, r1, r3
 800429e:	ea82 0000 	eor.w	r0, r2, r0
 80042a2:	ea83 0101 	eor.w	r1, r3, r1
 80042a6:	ea80 0202 	eor.w	r2, r0, r2
 80042aa:	ea81 0303 	eor.w	r3, r1, r3
 80042ae:	2d36      	cmp	r5, #54	; 0x36
 80042b0:	bf88      	it	hi
 80042b2:	bd30      	pophi	{r4, r5, pc}
 80042b4:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 80042b8:	ea4f 3101 	mov.w	r1, r1, lsl #12
 80042bc:	f44f 1c80 	mov.w	ip, #1048576	; 0x100000
 80042c0:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 80042c4:	d002      	beq.n	80042cc <__adddf3+0x70>
 80042c6:	4240      	negs	r0, r0
 80042c8:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80042cc:	f013 4f00 	tst.w	r3, #2147483648	; 0x80000000
 80042d0:	ea4f 3303 	mov.w	r3, r3, lsl #12
 80042d4:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 80042d8:	d002      	beq.n	80042e0 <__adddf3+0x84>
 80042da:	4252      	negs	r2, r2
 80042dc:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 80042e0:	ea94 0f05 	teq	r4, r5
 80042e4:	f000 80a7 	beq.w	8004436 <__adddf3+0x1da>
 80042e8:	f1a4 0401 	sub.w	r4, r4, #1
 80042ec:	f1d5 0e20 	rsbs	lr, r5, #32
 80042f0:	db0d      	blt.n	800430e <__adddf3+0xb2>
 80042f2:	fa02 fc0e 	lsl.w	ip, r2, lr
 80042f6:	fa22 f205 	lsr.w	r2, r2, r5
 80042fa:	1880      	adds	r0, r0, r2
 80042fc:	f141 0100 	adc.w	r1, r1, #0
 8004300:	fa03 f20e 	lsl.w	r2, r3, lr
 8004304:	1880      	adds	r0, r0, r2
 8004306:	fa43 f305 	asr.w	r3, r3, r5
 800430a:	4159      	adcs	r1, r3
 800430c:	e00e      	b.n	800432c <__adddf3+0xd0>
 800430e:	f1a5 0520 	sub.w	r5, r5, #32
 8004312:	f10e 0e20 	add.w	lr, lr, #32
 8004316:	2a01      	cmp	r2, #1
 8004318:	fa03 fc0e 	lsl.w	ip, r3, lr
 800431c:	bf28      	it	cs
 800431e:	f04c 0c02 	orrcs.w	ip, ip, #2
 8004322:	fa43 f305 	asr.w	r3, r3, r5
 8004326:	18c0      	adds	r0, r0, r3
 8004328:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 800432c:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 8004330:	d507      	bpl.n	8004342 <__adddf3+0xe6>
 8004332:	f04f 0e00 	mov.w	lr, #0
 8004336:	f1dc 0c00 	rsbs	ip, ip, #0
 800433a:	eb7e 0000 	sbcs.w	r0, lr, r0
 800433e:	eb6e 0101 	sbc.w	r1, lr, r1
 8004342:	f5b1 1f80 	cmp.w	r1, #1048576	; 0x100000
 8004346:	d31b      	bcc.n	8004380 <__adddf3+0x124>
 8004348:	f5b1 1f00 	cmp.w	r1, #2097152	; 0x200000
 800434c:	d30c      	bcc.n	8004368 <__adddf3+0x10c>
 800434e:	0849      	lsrs	r1, r1, #1
 8004350:	ea5f 0030 	movs.w	r0, r0, rrx
 8004354:	ea4f 0c3c 	mov.w	ip, ip, rrx
 8004358:	f104 0401 	add.w	r4, r4, #1
 800435c:	ea4f 5244 	mov.w	r2, r4, lsl #21
 8004360:	f512 0f80 	cmn.w	r2, #4194304	; 0x400000
 8004364:	f080 809a 	bcs.w	800449c <__adddf3+0x240>
 8004368:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
 800436c:	bf08      	it	eq
 800436e:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 8004372:	f150 0000 	adcs.w	r0, r0, #0
 8004376:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 800437a:	ea41 0105 	orr.w	r1, r1, r5
 800437e:	bd30      	pop	{r4, r5, pc}
 8004380:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 8004384:	4140      	adcs	r0, r0
 8004386:	eb41 0101 	adc.w	r1, r1, r1
 800438a:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 800438e:	f1a4 0401 	sub.w	r4, r4, #1
 8004392:	d1e9      	bne.n	8004368 <__adddf3+0x10c>
 8004394:	f091 0f00 	teq	r1, #0
 8004398:	bf04      	itt	eq
 800439a:	4601      	moveq	r1, r0
 800439c:	2000      	moveq	r0, #0
 800439e:	fab1 f381 	clz	r3, r1
 80043a2:	bf08      	it	eq
 80043a4:	3320      	addeq	r3, #32
 80043a6:	f1a3 030b 	sub.w	r3, r3, #11
 80043aa:	f1b3 0220 	subs.w	r2, r3, #32
 80043ae:	da0c      	bge.n	80043ca <__adddf3+0x16e>
 80043b0:	320c      	adds	r2, #12
 80043b2:	dd08      	ble.n	80043c6 <__adddf3+0x16a>
 80043b4:	f102 0c14 	add.w	ip, r2, #20
 80043b8:	f1c2 020c 	rsb	r2, r2, #12
 80043bc:	fa01 f00c 	lsl.w	r0, r1, ip
 80043c0:	fa21 f102 	lsr.w	r1, r1, r2
 80043c4:	e00c      	b.n	80043e0 <__adddf3+0x184>
 80043c6:	f102 0214 	add.w	r2, r2, #20
 80043ca:	bfd8      	it	le
 80043cc:	f1c2 0c20 	rsble	ip, r2, #32
 80043d0:	fa01 f102 	lsl.w	r1, r1, r2
 80043d4:	fa20 fc0c 	lsr.w	ip, r0, ip
 80043d8:	bfdc      	itt	le
 80043da:	ea41 010c 	orrle.w	r1, r1, ip
 80043de:	4090      	lslle	r0, r2
 80043e0:	1ae4      	subs	r4, r4, r3
 80043e2:	bfa2      	ittt	ge
 80043e4:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 80043e8:	4329      	orrge	r1, r5
 80043ea:	bd30      	popge	{r4, r5, pc}
 80043ec:	ea6f 0404 	mvn.w	r4, r4
 80043f0:	3c1f      	subs	r4, #31
 80043f2:	da1c      	bge.n	800442e <__adddf3+0x1d2>
 80043f4:	340c      	adds	r4, #12
 80043f6:	dc0e      	bgt.n	8004416 <__adddf3+0x1ba>
 80043f8:	f104 0414 	add.w	r4, r4, #20
 80043fc:	f1c4 0220 	rsb	r2, r4, #32
 8004400:	fa20 f004 	lsr.w	r0, r0, r4
 8004404:	fa01 f302 	lsl.w	r3, r1, r2
 8004408:	ea40 0003 	orr.w	r0, r0, r3
 800440c:	fa21 f304 	lsr.w	r3, r1, r4
 8004410:	ea45 0103 	orr.w	r1, r5, r3
 8004414:	bd30      	pop	{r4, r5, pc}
 8004416:	f1c4 040c 	rsb	r4, r4, #12
 800441a:	f1c4 0220 	rsb	r2, r4, #32
 800441e:	fa20 f002 	lsr.w	r0, r0, r2
 8004422:	fa01 f304 	lsl.w	r3, r1, r4
 8004426:	ea40 0003 	orr.w	r0, r0, r3
 800442a:	4629      	mov	r1, r5
 800442c:	bd30      	pop	{r4, r5, pc}
 800442e:	fa21 f004 	lsr.w	r0, r1, r4
 8004432:	4629      	mov	r1, r5
 8004434:	bd30      	pop	{r4, r5, pc}
 8004436:	f094 0f00 	teq	r4, #0
 800443a:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
 800443e:	bf06      	itte	eq
 8004440:	f481 1180 	eoreq.w	r1, r1, #1048576	; 0x100000
 8004444:	3401      	addeq	r4, #1
 8004446:	3d01      	subne	r5, #1
 8004448:	e74e      	b.n	80042e8 <__adddf3+0x8c>
 800444a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 800444e:	bf18      	it	ne
 8004450:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 8004454:	d029      	beq.n	80044aa <__adddf3+0x24e>
 8004456:	ea94 0f05 	teq	r4, r5
 800445a:	bf08      	it	eq
 800445c:	ea90 0f02 	teqeq	r0, r2
 8004460:	d005      	beq.n	800446e <__adddf3+0x212>
 8004462:	ea54 0c00 	orrs.w	ip, r4, r0
 8004466:	bf04      	itt	eq
 8004468:	4619      	moveq	r1, r3
 800446a:	4610      	moveq	r0, r2
 800446c:	bd30      	pop	{r4, r5, pc}
 800446e:	ea91 0f03 	teq	r1, r3
 8004472:	bf1e      	ittt	ne
 8004474:	2100      	movne	r1, #0
 8004476:	2000      	movne	r0, #0
 8004478:	bd30      	popne	{r4, r5, pc}
 800447a:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 800447e:	d105      	bne.n	800448c <__adddf3+0x230>
 8004480:	0040      	lsls	r0, r0, #1
 8004482:	4149      	adcs	r1, r1
 8004484:	bf28      	it	cs
 8004486:	f041 4100 	orrcs.w	r1, r1, #2147483648	; 0x80000000
 800448a:	bd30      	pop	{r4, r5, pc}
 800448c:	f514 0480 	adds.w	r4, r4, #4194304	; 0x400000
 8004490:	bf3c      	itt	cc
 8004492:	f501 1180 	addcc.w	r1, r1, #1048576	; 0x100000
 8004496:	bd30      	popcc	{r4, r5, pc}
 8004498:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 800449c:	f045 41fe 	orr.w	r1, r5, #2130706432	; 0x7f000000
 80044a0:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 80044a4:	f04f 0000 	mov.w	r0, #0
 80044a8:	bd30      	pop	{r4, r5, pc}
 80044aa:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 80044ae:	bf1a      	itte	ne
 80044b0:	4619      	movne	r1, r3
 80044b2:	4610      	movne	r0, r2
 80044b4:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 80044b8:	bf1c      	itt	ne
 80044ba:	460b      	movne	r3, r1
 80044bc:	4602      	movne	r2, r0
 80044be:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 80044c2:	bf06      	itte	eq
 80044c4:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 80044c8:	ea91 0f03 	teqeq	r1, r3
 80044cc:	f441 2100 	orrne.w	r1, r1, #524288	; 0x80000
 80044d0:	bd30      	pop	{r4, r5, pc}
 80044d2:	bf00      	nop

080044d4 <__aeabi_ui2d>:
 80044d4:	f090 0f00 	teq	r0, #0
 80044d8:	bf04      	itt	eq
 80044da:	2100      	moveq	r1, #0
 80044dc:	4770      	bxeq	lr
 80044de:	b530      	push	{r4, r5, lr}
 80044e0:	f44f 6480 	mov.w	r4, #1024	; 0x400
 80044e4:	f104 0432 	add.w	r4, r4, #50	; 0x32
 80044e8:	f04f 0500 	mov.w	r5, #0
 80044ec:	f04f 0100 	mov.w	r1, #0
 80044f0:	e750      	b.n	8004394 <__adddf3+0x138>
 80044f2:	bf00      	nop

080044f4 <__aeabi_i2d>:
 80044f4:	f090 0f00 	teq	r0, #0
 80044f8:	bf04      	itt	eq
 80044fa:	2100      	moveq	r1, #0
 80044fc:	4770      	bxeq	lr
 80044fe:	b530      	push	{r4, r5, lr}
 8004500:	f44f 6480 	mov.w	r4, #1024	; 0x400
 8004504:	f104 0432 	add.w	r4, r4, #50	; 0x32
 8004508:	f010 4500 	ands.w	r5, r0, #2147483648	; 0x80000000
 800450c:	bf48      	it	mi
 800450e:	4240      	negmi	r0, r0
 8004510:	f04f 0100 	mov.w	r1, #0
 8004514:	e73e      	b.n	8004394 <__adddf3+0x138>
 8004516:	bf00      	nop

08004518 <__aeabi_f2d>:
 8004518:	0042      	lsls	r2, r0, #1
 800451a:	ea4f 01e2 	mov.w	r1, r2, asr #3
 800451e:	ea4f 0131 	mov.w	r1, r1, rrx
 8004522:	ea4f 7002 	mov.w	r0, r2, lsl #28
 8004526:	bf1f      	itttt	ne
 8004528:	f012 437f 	andsne.w	r3, r2, #4278190080	; 0xff000000
 800452c:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004530:	f081 5160 	eorne.w	r1, r1, #939524096	; 0x38000000
 8004534:	4770      	bxne	lr
 8004536:	f092 0f00 	teq	r2, #0
 800453a:	bf14      	ite	ne
 800453c:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
 8004540:	4770      	bxeq	lr
 8004542:	b530      	push	{r4, r5, lr}
 8004544:	f44f 7460 	mov.w	r4, #896	; 0x380
 8004548:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
 800454c:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 8004550:	e720      	b.n	8004394 <__adddf3+0x138>
 8004552:	bf00      	nop

08004554 <__aeabi_ul2d>:
 8004554:	ea50 0201 	orrs.w	r2, r0, r1
 8004558:	bf08      	it	eq
 800455a:	4770      	bxeq	lr
 800455c:	b530      	push	{r4, r5, lr}
 800455e:	f04f 0500 	mov.w	r5, #0
 8004562:	e00a      	b.n	800457a <__aeabi_l2d+0x16>

08004564 <__aeabi_l2d>:
 8004564:	ea50 0201 	orrs.w	r2, r0, r1
 8004568:	bf08      	it	eq
 800456a:	4770      	bxeq	lr
 800456c:	b530      	push	{r4, r5, lr}
 800456e:	f011 4500 	ands.w	r5, r1, #2147483648	; 0x80000000
 8004572:	d502      	bpl.n	800457a <__aeabi_l2d+0x16>
 8004574:	4240      	negs	r0, r0
 8004576:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 800457a:	f44f 6480 	mov.w	r4, #1024	; 0x400
 800457e:	f104 0432 	add.w	r4, r4, #50	; 0x32
 8004582:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 8004586:	f43f aedc 	beq.w	8004342 <__adddf3+0xe6>
 800458a:	f04f 0203 	mov.w	r2, #3
 800458e:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8004592:	bf18      	it	ne
 8004594:	3203      	addne	r2, #3
 8004596:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 800459a:	bf18      	it	ne
 800459c:	3203      	addne	r2, #3
 800459e:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 80045a2:	f1c2 0320 	rsb	r3, r2, #32
 80045a6:	fa00 fc03 	lsl.w	ip, r0, r3
 80045aa:	fa20 f002 	lsr.w	r0, r0, r2
 80045ae:	fa01 fe03 	lsl.w	lr, r1, r3
 80045b2:	ea40 000e 	orr.w	r0, r0, lr
 80045b6:	fa21 f102 	lsr.w	r1, r1, r2
 80045ba:	4414      	add	r4, r2
 80045bc:	e6c1      	b.n	8004342 <__adddf3+0xe6>
 80045be:	bf00      	nop

080045c0 <__aeabi_dmul>:
 80045c0:	b570      	push	{r4, r5, r6, lr}
 80045c2:	f04f 0cff 	mov.w	ip, #255	; 0xff
 80045c6:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 80045ca:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 80045ce:	bf1d      	ittte	ne
 80045d0:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 80045d4:	ea94 0f0c 	teqne	r4, ip
 80045d8:	ea95 0f0c 	teqne	r5, ip
 80045dc:	f000 f8de 	bleq	800479c <__aeabi_dmul+0x1dc>
 80045e0:	442c      	add	r4, r5
 80045e2:	ea81 0603 	eor.w	r6, r1, r3
 80045e6:	ea21 514c 	bic.w	r1, r1, ip, lsl #21
 80045ea:	ea23 534c 	bic.w	r3, r3, ip, lsl #21
 80045ee:	ea50 3501 	orrs.w	r5, r0, r1, lsl #12
 80045f2:	bf18      	it	ne
 80045f4:	ea52 3503 	orrsne.w	r5, r2, r3, lsl #12
 80045f8:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 80045fc:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
 8004600:	d038      	beq.n	8004674 <__aeabi_dmul+0xb4>
 8004602:	fba0 ce02 	umull	ip, lr, r0, r2
 8004606:	f04f 0500 	mov.w	r5, #0
 800460a:	fbe1 e502 	umlal	lr, r5, r1, r2
 800460e:	f006 4200 	and.w	r2, r6, #2147483648	; 0x80000000
 8004612:	fbe0 e503 	umlal	lr, r5, r0, r3
 8004616:	f04f 0600 	mov.w	r6, #0
 800461a:	fbe1 5603 	umlal	r5, r6, r1, r3
 800461e:	f09c 0f00 	teq	ip, #0
 8004622:	bf18      	it	ne
 8004624:	f04e 0e01 	orrne.w	lr, lr, #1
 8004628:	f1a4 04ff 	sub.w	r4, r4, #255	; 0xff
 800462c:	f5b6 7f00 	cmp.w	r6, #512	; 0x200
 8004630:	f564 7440 	sbc.w	r4, r4, #768	; 0x300
 8004634:	d204      	bcs.n	8004640 <__aeabi_dmul+0x80>
 8004636:	ea5f 0e4e 	movs.w	lr, lr, lsl #1
 800463a:	416d      	adcs	r5, r5
 800463c:	eb46 0606 	adc.w	r6, r6, r6
 8004640:	ea42 21c6 	orr.w	r1, r2, r6, lsl #11
 8004644:	ea41 5155 	orr.w	r1, r1, r5, lsr #21
 8004648:	ea4f 20c5 	mov.w	r0, r5, lsl #11
 800464c:	ea40 505e 	orr.w	r0, r0, lr, lsr #21
 8004650:	ea4f 2ece 	mov.w	lr, lr, lsl #11
 8004654:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 8004658:	bf88      	it	hi
 800465a:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 800465e:	d81e      	bhi.n	800469e <__aeabi_dmul+0xde>
 8004660:	f1be 4f00 	cmp.w	lr, #2147483648	; 0x80000000
 8004664:	bf08      	it	eq
 8004666:	ea5f 0e50 	movseq.w	lr, r0, lsr #1
 800466a:	f150 0000 	adcs.w	r0, r0, #0
 800466e:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 8004672:	bd70      	pop	{r4, r5, r6, pc}
 8004674:	f006 4600 	and.w	r6, r6, #2147483648	; 0x80000000
 8004678:	ea46 0101 	orr.w	r1, r6, r1
 800467c:	ea40 0002 	orr.w	r0, r0, r2
 8004680:	ea81 0103 	eor.w	r1, r1, r3
 8004684:	ebb4 045c 	subs.w	r4, r4, ip, lsr #1
 8004688:	bfc2      	ittt	gt
 800468a:	ebd4 050c 	rsbsgt	r5, r4, ip
 800468e:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 8004692:	bd70      	popgt	{r4, r5, r6, pc}
 8004694:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004698:	f04f 0e00 	mov.w	lr, #0
 800469c:	3c01      	subs	r4, #1
 800469e:	f300 80ab 	bgt.w	80047f8 <__aeabi_dmul+0x238>
 80046a2:	f114 0f36 	cmn.w	r4, #54	; 0x36
 80046a6:	bfde      	ittt	le
 80046a8:	2000      	movle	r0, #0
 80046aa:	f001 4100 	andle.w	r1, r1, #2147483648	; 0x80000000
 80046ae:	bd70      	pople	{r4, r5, r6, pc}
 80046b0:	f1c4 0400 	rsb	r4, r4, #0
 80046b4:	3c20      	subs	r4, #32
 80046b6:	da35      	bge.n	8004724 <__aeabi_dmul+0x164>
 80046b8:	340c      	adds	r4, #12
 80046ba:	dc1b      	bgt.n	80046f4 <__aeabi_dmul+0x134>
 80046bc:	f104 0414 	add.w	r4, r4, #20
 80046c0:	f1c4 0520 	rsb	r5, r4, #32
 80046c4:	fa00 f305 	lsl.w	r3, r0, r5
 80046c8:	fa20 f004 	lsr.w	r0, r0, r4
 80046cc:	fa01 f205 	lsl.w	r2, r1, r5
 80046d0:	ea40 0002 	orr.w	r0, r0, r2
 80046d4:	f001 4200 	and.w	r2, r1, #2147483648	; 0x80000000
 80046d8:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
 80046dc:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 80046e0:	fa21 f604 	lsr.w	r6, r1, r4
 80046e4:	eb42 0106 	adc.w	r1, r2, r6
 80046e8:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 80046ec:	bf08      	it	eq
 80046ee:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 80046f2:	bd70      	pop	{r4, r5, r6, pc}
 80046f4:	f1c4 040c 	rsb	r4, r4, #12
 80046f8:	f1c4 0520 	rsb	r5, r4, #32
 80046fc:	fa00 f304 	lsl.w	r3, r0, r4
 8004700:	fa20 f005 	lsr.w	r0, r0, r5
 8004704:	fa01 f204 	lsl.w	r2, r1, r4
 8004708:	ea40 0002 	orr.w	r0, r0, r2
 800470c:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 8004710:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
 8004714:	f141 0100 	adc.w	r1, r1, #0
 8004718:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 800471c:	bf08      	it	eq
 800471e:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 8004722:	bd70      	pop	{r4, r5, r6, pc}
 8004724:	f1c4 0520 	rsb	r5, r4, #32
 8004728:	fa00 f205 	lsl.w	r2, r0, r5
 800472c:	ea4e 0e02 	orr.w	lr, lr, r2
 8004730:	fa20 f304 	lsr.w	r3, r0, r4
 8004734:	fa01 f205 	lsl.w	r2, r1, r5
 8004738:	ea43 0302 	orr.w	r3, r3, r2
 800473c:	fa21 f004 	lsr.w	r0, r1, r4
 8004740:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 8004744:	fa21 f204 	lsr.w	r2, r1, r4
 8004748:	ea20 0002 	bic.w	r0, r0, r2
 800474c:	eb00 70d3 	add.w	r0, r0, r3, lsr #31
 8004750:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
 8004754:	bf08      	it	eq
 8004756:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
 800475a:	bd70      	pop	{r4, r5, r6, pc}
 800475c:	f094 0f00 	teq	r4, #0
 8004760:	d10f      	bne.n	8004782 <__aeabi_dmul+0x1c2>
 8004762:	f001 4600 	and.w	r6, r1, #2147483648	; 0x80000000
 8004766:	0040      	lsls	r0, r0, #1
 8004768:	eb41 0101 	adc.w	r1, r1, r1
 800476c:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004770:	bf08      	it	eq
 8004772:	3c01      	subeq	r4, #1
 8004774:	d0f7      	beq.n	8004766 <__aeabi_dmul+0x1a6>
 8004776:	ea41 0106 	orr.w	r1, r1, r6
 800477a:	f095 0f00 	teq	r5, #0
 800477e:	bf18      	it	ne
 8004780:	4770      	bxne	lr
 8004782:	f003 4600 	and.w	r6, r3, #2147483648	; 0x80000000
 8004786:	0052      	lsls	r2, r2, #1
 8004788:	eb43 0303 	adc.w	r3, r3, r3
 800478c:	f413 1f80 	tst.w	r3, #1048576	; 0x100000
 8004790:	bf08      	it	eq
 8004792:	3d01      	subeq	r5, #1
 8004794:	d0f7      	beq.n	8004786 <__aeabi_dmul+0x1c6>
 8004796:	ea43 0306 	orr.w	r3, r3, r6
 800479a:	4770      	bx	lr
 800479c:	ea94 0f0c 	teq	r4, ip
 80047a0:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 80047a4:	bf18      	it	ne
 80047a6:	ea95 0f0c 	teqne	r5, ip
 80047aa:	d00c      	beq.n	80047c6 <__aeabi_dmul+0x206>
 80047ac:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80047b0:	bf18      	it	ne
 80047b2:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80047b6:	d1d1      	bne.n	800475c <__aeabi_dmul+0x19c>
 80047b8:	ea81 0103 	eor.w	r1, r1, r3
 80047bc:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047c0:	f04f 0000 	mov.w	r0, #0
 80047c4:	bd70      	pop	{r4, r5, r6, pc}
 80047c6:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80047ca:	bf06      	itte	eq
 80047cc:	4610      	moveq	r0, r2
 80047ce:	4619      	moveq	r1, r3
 80047d0:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80047d4:	d019      	beq.n	800480a <__aeabi_dmul+0x24a>
 80047d6:	ea94 0f0c 	teq	r4, ip
 80047da:	d102      	bne.n	80047e2 <__aeabi_dmul+0x222>
 80047dc:	ea50 3601 	orrs.w	r6, r0, r1, lsl #12
 80047e0:	d113      	bne.n	800480a <__aeabi_dmul+0x24a>
 80047e2:	ea95 0f0c 	teq	r5, ip
 80047e6:	d105      	bne.n	80047f4 <__aeabi_dmul+0x234>
 80047e8:	ea52 3603 	orrs.w	r6, r2, r3, lsl #12
 80047ec:	bf1c      	itt	ne
 80047ee:	4610      	movne	r0, r2
 80047f0:	4619      	movne	r1, r3
 80047f2:	d10a      	bne.n	800480a <__aeabi_dmul+0x24a>
 80047f4:	ea81 0103 	eor.w	r1, r1, r3
 80047f8:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 80047fc:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 8004800:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
 8004804:	f04f 0000 	mov.w	r0, #0
 8004808:	bd70      	pop	{r4, r5, r6, pc}
 800480a:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
 800480e:	f441 0178 	orr.w	r1, r1, #16252928	; 0xf80000
 8004812:	bd70      	pop	{r4, r5, r6, pc}

08004814 <__aeabi_ddiv>:
 8004814:	b570      	push	{r4, r5, r6, lr}
 8004816:	f04f 0cff 	mov.w	ip, #255	; 0xff
 800481a:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
 800481e:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
 8004822:	bf1d      	ittte	ne
 8004824:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
 8004828:	ea94 0f0c 	teqne	r4, ip
 800482c:	ea95 0f0c 	teqne	r5, ip
 8004830:	f000 f8a7 	bleq	8004982 <__aeabi_ddiv+0x16e>
 8004834:	eba4 0405 	sub.w	r4, r4, r5
 8004838:	ea81 0e03 	eor.w	lr, r1, r3
 800483c:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 8004840:	ea4f 3101 	mov.w	r1, r1, lsl #12
 8004844:	f000 8088 	beq.w	8004958 <__aeabi_ddiv+0x144>
 8004848:	ea4f 3303 	mov.w	r3, r3, lsl #12
 800484c:	f04f 5580 	mov.w	r5, #268435456	; 0x10000000
 8004850:	ea45 1313 	orr.w	r3, r5, r3, lsr #4
 8004854:	ea43 6312 	orr.w	r3, r3, r2, lsr #24
 8004858:	ea4f 2202 	mov.w	r2, r2, lsl #8
 800485c:	ea45 1511 	orr.w	r5, r5, r1, lsr #4
 8004860:	ea45 6510 	orr.w	r5, r5, r0, lsr #24
 8004864:	ea4f 2600 	mov.w	r6, r0, lsl #8
 8004868:	f00e 4100 	and.w	r1, lr, #2147483648	; 0x80000000
 800486c:	429d      	cmp	r5, r3
 800486e:	bf08      	it	eq
 8004870:	4296      	cmpeq	r6, r2
 8004872:	f144 04fd 	adc.w	r4, r4, #253	; 0xfd
 8004876:	f504 7440 	add.w	r4, r4, #768	; 0x300
 800487a:	d202      	bcs.n	8004882 <__aeabi_ddiv+0x6e>
 800487c:	085b      	lsrs	r3, r3, #1
 800487e:	ea4f 0232 	mov.w	r2, r2, rrx
 8004882:	1ab6      	subs	r6, r6, r2
 8004884:	eb65 0503 	sbc.w	r5, r5, r3
 8004888:	085b      	lsrs	r3, r3, #1
 800488a:	ea4f 0232 	mov.w	r2, r2, rrx
 800488e:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
 8004892:	f44f 2c00 	mov.w	ip, #524288	; 0x80000
 8004896:	ebb6 0e02 	subs.w	lr, r6, r2
 800489a:	eb75 0e03 	sbcs.w	lr, r5, r3
 800489e:	bf22      	ittt	cs
 80048a0:	1ab6      	subcs	r6, r6, r2
 80048a2:	4675      	movcs	r5, lr
 80048a4:	ea40 000c 	orrcs.w	r0, r0, ip
 80048a8:	085b      	lsrs	r3, r3, #1
 80048aa:	ea4f 0232 	mov.w	r2, r2, rrx
 80048ae:	ebb6 0e02 	subs.w	lr, r6, r2
 80048b2:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048b6:	bf22      	ittt	cs
 80048b8:	1ab6      	subcs	r6, r6, r2
 80048ba:	4675      	movcs	r5, lr
 80048bc:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
 80048c0:	085b      	lsrs	r3, r3, #1
 80048c2:	ea4f 0232 	mov.w	r2, r2, rrx
 80048c6:	ebb6 0e02 	subs.w	lr, r6, r2
 80048ca:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048ce:	bf22      	ittt	cs
 80048d0:	1ab6      	subcs	r6, r6, r2
 80048d2:	4675      	movcs	r5, lr
 80048d4:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
 80048d8:	085b      	lsrs	r3, r3, #1
 80048da:	ea4f 0232 	mov.w	r2, r2, rrx
 80048de:	ebb6 0e02 	subs.w	lr, r6, r2
 80048e2:	eb75 0e03 	sbcs.w	lr, r5, r3
 80048e6:	bf22      	ittt	cs
 80048e8:	1ab6      	subcs	r6, r6, r2
 80048ea:	4675      	movcs	r5, lr
 80048ec:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
 80048f0:	ea55 0e06 	orrs.w	lr, r5, r6
 80048f4:	d018      	beq.n	8004928 <__aeabi_ddiv+0x114>
 80048f6:	ea4f 1505 	mov.w	r5, r5, lsl #4
 80048fa:	ea45 7516 	orr.w	r5, r5, r6, lsr #28
 80048fe:	ea4f 1606 	mov.w	r6, r6, lsl #4
 8004902:	ea4f 03c3 	mov.w	r3, r3, lsl #3
 8004906:	ea43 7352 	orr.w	r3, r3, r2, lsr #29
 800490a:	ea4f 02c2 	mov.w	r2, r2, lsl #3
 800490e:	ea5f 1c1c 	movs.w	ip, ip, lsr #4
 8004912:	d1c0      	bne.n	8004896 <__aeabi_ddiv+0x82>
 8004914:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 8004918:	d10b      	bne.n	8004932 <__aeabi_ddiv+0x11e>
 800491a:	ea41 0100 	orr.w	r1, r1, r0
 800491e:	f04f 0000 	mov.w	r0, #0
 8004922:	f04f 4c00 	mov.w	ip, #2147483648	; 0x80000000
 8004926:	e7b6      	b.n	8004896 <__aeabi_ddiv+0x82>
 8004928:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
 800492c:	bf04      	itt	eq
 800492e:	4301      	orreq	r1, r0
 8004930:	2000      	moveq	r0, #0
 8004932:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
 8004936:	bf88      	it	hi
 8004938:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
 800493c:	f63f aeaf 	bhi.w	800469e <__aeabi_dmul+0xde>
 8004940:	ebb5 0c03 	subs.w	ip, r5, r3
 8004944:	bf04      	itt	eq
 8004946:	ebb6 0c02 	subseq.w	ip, r6, r2
 800494a:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 800494e:	f150 0000 	adcs.w	r0, r0, #0
 8004952:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 8004956:	bd70      	pop	{r4, r5, r6, pc}
 8004958:	f00e 4e00 	and.w	lr, lr, #2147483648	; 0x80000000
 800495c:	ea4e 3111 	orr.w	r1, lr, r1, lsr #12
 8004960:	eb14 045c 	adds.w	r4, r4, ip, lsr #1
 8004964:	bfc2      	ittt	gt
 8004966:	ebd4 050c 	rsbsgt	r5, r4, ip
 800496a:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
 800496e:	bd70      	popgt	{r4, r5, r6, pc}
 8004970:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004974:	f04f 0e00 	mov.w	lr, #0
 8004978:	3c01      	subs	r4, #1
 800497a:	e690      	b.n	800469e <__aeabi_dmul+0xde>
 800497c:	ea45 0e06 	orr.w	lr, r5, r6
 8004980:	e68d      	b.n	800469e <__aeabi_dmul+0xde>
 8004982:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
 8004986:	ea94 0f0c 	teq	r4, ip
 800498a:	bf08      	it	eq
 800498c:	ea95 0f0c 	teqeq	r5, ip
 8004990:	f43f af3b 	beq.w	800480a <__aeabi_dmul+0x24a>
 8004994:	ea94 0f0c 	teq	r4, ip
 8004998:	d10a      	bne.n	80049b0 <__aeabi_ddiv+0x19c>
 800499a:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 800499e:	f47f af34 	bne.w	800480a <__aeabi_dmul+0x24a>
 80049a2:	ea95 0f0c 	teq	r5, ip
 80049a6:	f47f af25 	bne.w	80047f4 <__aeabi_dmul+0x234>
 80049aa:	4610      	mov	r0, r2
 80049ac:	4619      	mov	r1, r3
 80049ae:	e72c      	b.n	800480a <__aeabi_dmul+0x24a>
 80049b0:	ea95 0f0c 	teq	r5, ip
 80049b4:	d106      	bne.n	80049c4 <__aeabi_ddiv+0x1b0>
 80049b6:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
 80049ba:	f43f aefd 	beq.w	80047b8 <__aeabi_dmul+0x1f8>
 80049be:	4610      	mov	r0, r2
 80049c0:	4619      	mov	r1, r3
 80049c2:	e722      	b.n	800480a <__aeabi_dmul+0x24a>
 80049c4:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
 80049c8:	bf18      	it	ne
 80049ca:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
 80049ce:	f47f aec5 	bne.w	800475c <__aeabi_dmul+0x19c>
 80049d2:	ea50 0441 	orrs.w	r4, r0, r1, lsl #1
 80049d6:	f47f af0d 	bne.w	80047f4 <__aeabi_dmul+0x234>
 80049da:	ea52 0543 	orrs.w	r5, r2, r3, lsl #1
 80049de:	f47f aeeb 	bne.w	80047b8 <__aeabi_dmul+0x1f8>
 80049e2:	e712      	b.n	800480a <__aeabi_dmul+0x24a>

080049e4 <__gedf2>:
 80049e4:	f04f 3cff 	mov.w	ip, #4294967295
 80049e8:	e006      	b.n	80049f8 <__cmpdf2+0x4>
 80049ea:	bf00      	nop

080049ec <__ledf2>:
 80049ec:	f04f 0c01 	mov.w	ip, #1
 80049f0:	e002      	b.n	80049f8 <__cmpdf2+0x4>
 80049f2:	bf00      	nop

080049f4 <__cmpdf2>:
 80049f4:	f04f 0c01 	mov.w	ip, #1
 80049f8:	f84d cd04 	str.w	ip, [sp, #-4]!
 80049fc:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004a00:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a04:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004a08:	bf18      	it	ne
 8004a0a:	ea7f 5c6c 	mvnsne.w	ip, ip, asr #21
 8004a0e:	d01b      	beq.n	8004a48 <__cmpdf2+0x54>
 8004a10:	b001      	add	sp, #4
 8004a12:	ea50 0c41 	orrs.w	ip, r0, r1, lsl #1
 8004a16:	bf0c      	ite	eq
 8004a18:	ea52 0c43 	orrseq.w	ip, r2, r3, lsl #1
 8004a1c:	ea91 0f03 	teqne	r1, r3
 8004a20:	bf02      	ittt	eq
 8004a22:	ea90 0f02 	teqeq	r0, r2
 8004a26:	2000      	moveq	r0, #0
 8004a28:	4770      	bxeq	lr
 8004a2a:	f110 0f00 	cmn.w	r0, #0
 8004a2e:	ea91 0f03 	teq	r1, r3
 8004a32:	bf58      	it	pl
 8004a34:	4299      	cmppl	r1, r3
 8004a36:	bf08      	it	eq
 8004a38:	4290      	cmpeq	r0, r2
 8004a3a:	bf2c      	ite	cs
 8004a3c:	17d8      	asrcs	r0, r3, #31
 8004a3e:	ea6f 70e3 	mvncc.w	r0, r3, asr #31
 8004a42:	f040 0001 	orr.w	r0, r0, #1
 8004a46:	4770      	bx	lr
 8004a48:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004a4c:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a50:	d102      	bne.n	8004a58 <__cmpdf2+0x64>
 8004a52:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004a56:	d107      	bne.n	8004a68 <__cmpdf2+0x74>
 8004a58:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004a5c:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004a60:	d1d6      	bne.n	8004a10 <__cmpdf2+0x1c>
 8004a62:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004a66:	d0d3      	beq.n	8004a10 <__cmpdf2+0x1c>
 8004a68:	f85d 0b04 	ldr.w	r0, [sp], #4
 8004a6c:	4770      	bx	lr
 8004a6e:	bf00      	nop

08004a70 <__aeabi_cdrcmple>:
 8004a70:	4684      	mov	ip, r0
 8004a72:	4610      	mov	r0, r2
 8004a74:	4662      	mov	r2, ip
 8004a76:	468c      	mov	ip, r1
 8004a78:	4619      	mov	r1, r3
 8004a7a:	4663      	mov	r3, ip
 8004a7c:	e000      	b.n	8004a80 <__aeabi_cdcmpeq>
 8004a7e:	bf00      	nop

08004a80 <__aeabi_cdcmpeq>:
 8004a80:	b501      	push	{r0, lr}
 8004a82:	f7ff ffb7 	bl	80049f4 <__cmpdf2>
 8004a86:	2800      	cmp	r0, #0
 8004a88:	bf48      	it	mi
 8004a8a:	f110 0f00 	cmnmi.w	r0, #0
 8004a8e:	bd01      	pop	{r0, pc}

08004a90 <__aeabi_dcmpeq>:
 8004a90:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004a94:	f7ff fff4 	bl	8004a80 <__aeabi_cdcmpeq>
 8004a98:	bf0c      	ite	eq
 8004a9a:	2001      	moveq	r0, #1
 8004a9c:	2000      	movne	r0, #0
 8004a9e:	f85d fb08 	ldr.w	pc, [sp], #8
 8004aa2:	bf00      	nop

08004aa4 <__aeabi_dcmplt>:
 8004aa4:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004aa8:	f7ff ffea 	bl	8004a80 <__aeabi_cdcmpeq>
 8004aac:	bf34      	ite	cc
 8004aae:	2001      	movcc	r0, #1
 8004ab0:	2000      	movcs	r0, #0
 8004ab2:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ab6:	bf00      	nop

08004ab8 <__aeabi_dcmple>:
 8004ab8:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004abc:	f7ff ffe0 	bl	8004a80 <__aeabi_cdcmpeq>
 8004ac0:	bf94      	ite	ls
 8004ac2:	2001      	movls	r0, #1
 8004ac4:	2000      	movhi	r0, #0
 8004ac6:	f85d fb08 	ldr.w	pc, [sp], #8
 8004aca:	bf00      	nop

08004acc <__aeabi_dcmpge>:
 8004acc:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004ad0:	f7ff ffce 	bl	8004a70 <__aeabi_cdrcmple>
 8004ad4:	bf94      	ite	ls
 8004ad6:	2001      	movls	r0, #1
 8004ad8:	2000      	movhi	r0, #0
 8004ada:	f85d fb08 	ldr.w	pc, [sp], #8
 8004ade:	bf00      	nop

08004ae0 <__aeabi_dcmpgt>:
 8004ae0:	f84d ed08 	str.w	lr, [sp, #-8]!
 8004ae4:	f7ff ffc4 	bl	8004a70 <__aeabi_cdrcmple>
 8004ae8:	bf34      	ite	cc
 8004aea:	2001      	movcc	r0, #1
 8004aec:	2000      	movcs	r0, #0
 8004aee:	f85d fb08 	ldr.w	pc, [sp], #8
 8004af2:	bf00      	nop

08004af4 <__aeabi_dcmpun>:
 8004af4:	ea4f 0c41 	mov.w	ip, r1, lsl #1
 8004af8:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004afc:	d102      	bne.n	8004b04 <__aeabi_dcmpun+0x10>
 8004afe:	ea50 3c01 	orrs.w	ip, r0, r1, lsl #12
 8004b02:	d10a      	bne.n	8004b1a <__aeabi_dcmpun+0x26>
 8004b04:	ea4f 0c43 	mov.w	ip, r3, lsl #1
 8004b08:	ea7f 5c6c 	mvns.w	ip, ip, asr #21
 8004b0c:	d102      	bne.n	8004b14 <__aeabi_dcmpun+0x20>
 8004b0e:	ea52 3c03 	orrs.w	ip, r2, r3, lsl #12
 8004b12:	d102      	bne.n	8004b1a <__aeabi_dcmpun+0x26>
 8004b14:	f04f 0000 	mov.w	r0, #0
 8004b18:	4770      	bx	lr
 8004b1a:	f04f 0001 	mov.w	r0, #1
 8004b1e:	4770      	bx	lr

08004b20 <__aeabi_d2iz>:
 8004b20:	ea4f 0241 	mov.w	r2, r1, lsl #1
 8004b24:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
 8004b28:	d215      	bcs.n	8004b56 <__aeabi_d2iz+0x36>
 8004b2a:	d511      	bpl.n	8004b50 <__aeabi_d2iz+0x30>
 8004b2c:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
 8004b30:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
 8004b34:	d912      	bls.n	8004b5c <__aeabi_d2iz+0x3c>
 8004b36:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004b3a:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8004b3e:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
 8004b42:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 8004b46:	fa23 f002 	lsr.w	r0, r3, r2
 8004b4a:	bf18      	it	ne
 8004b4c:	4240      	negne	r0, r0
 8004b4e:	4770      	bx	lr
 8004b50:	f04f 0000 	mov.w	r0, #0
 8004b54:	4770      	bx	lr
 8004b56:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
 8004b5a:	d105      	bne.n	8004b68 <__aeabi_d2iz+0x48>
 8004b5c:	f011 4000 	ands.w	r0, r1, #2147483648	; 0x80000000
 8004b60:	bf08      	it	eq
 8004b62:	f06f 4000 	mvneq.w	r0, #2147483648	; 0x80000000
 8004b66:	4770      	bx	lr
 8004b68:	f04f 0000 	mov.w	r0, #0
 8004b6c:	4770      	bx	lr
 8004b6e:	bf00      	nop

08004b70 <__aeabi_d2uiz>:
 8004b70:	004a      	lsls	r2, r1, #1
 8004b72:	d211      	bcs.n	8004b98 <__aeabi_d2uiz+0x28>
 8004b74:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
 8004b78:	d211      	bcs.n	8004b9e <__aeabi_d2uiz+0x2e>
 8004b7a:	d50d      	bpl.n	8004b98 <__aeabi_d2uiz+0x28>
 8004b7c:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
 8004b80:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
 8004b84:	d40e      	bmi.n	8004ba4 <__aeabi_d2uiz+0x34>
 8004b86:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004b8a:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8004b8e:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
 8004b92:	fa23 f002 	lsr.w	r0, r3, r2
 8004b96:	4770      	bx	lr
 8004b98:	f04f 0000 	mov.w	r0, #0
 8004b9c:	4770      	bx	lr
 8004b9e:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
 8004ba2:	d102      	bne.n	8004baa <__aeabi_d2uiz+0x3a>
 8004ba4:	f04f 30ff 	mov.w	r0, #4294967295
 8004ba8:	4770      	bx	lr
 8004baa:	f04f 0000 	mov.w	r0, #0
 8004bae:	4770      	bx	lr

08004bb0 <__aeabi_d2f>:
 8004bb0:	ea4f 0241 	mov.w	r2, r1, lsl #1
 8004bb4:	f1b2 43e0 	subs.w	r3, r2, #1879048192	; 0x70000000
 8004bb8:	bf24      	itt	cs
 8004bba:	f5b3 1c00 	subscs.w	ip, r3, #2097152	; 0x200000
 8004bbe:	f1dc 5cfe 	rsbscs	ip, ip, #532676608	; 0x1fc00000
 8004bc2:	d90d      	bls.n	8004be0 <__aeabi_d2f+0x30>
 8004bc4:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 8004bc8:	ea4f 02c0 	mov.w	r2, r0, lsl #3
 8004bcc:	ea4c 7050 	orr.w	r0, ip, r0, lsr #29
 8004bd0:	f1b2 4f00 	cmp.w	r2, #2147483648	; 0x80000000
 8004bd4:	eb40 0083 	adc.w	r0, r0, r3, lsl #2
 8004bd8:	bf08      	it	eq
 8004bda:	f020 0001 	biceq.w	r0, r0, #1
 8004bde:	4770      	bx	lr
 8004be0:	f011 4f80 	tst.w	r1, #1073741824	; 0x40000000
 8004be4:	d121      	bne.n	8004c2a <__aeabi_d2f+0x7a>
 8004be6:	f113 7238 	adds.w	r2, r3, #48234496	; 0x2e00000
 8004bea:	bfbc      	itt	lt
 8004bec:	f001 4000 	andlt.w	r0, r1, #2147483648	; 0x80000000
 8004bf0:	4770      	bxlt	lr
 8004bf2:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
 8004bf6:	ea4f 5252 	mov.w	r2, r2, lsr #21
 8004bfa:	f1c2 0218 	rsb	r2, r2, #24
 8004bfe:	f1c2 0c20 	rsb	ip, r2, #32
 8004c02:	fa10 f30c 	lsls.w	r3, r0, ip
 8004c06:	fa20 f002 	lsr.w	r0, r0, r2
 8004c0a:	bf18      	it	ne
 8004c0c:	f040 0001 	orrne.w	r0, r0, #1
 8004c10:	ea4f 23c1 	mov.w	r3, r1, lsl #11
 8004c14:	ea4f 23d3 	mov.w	r3, r3, lsr #11
 8004c18:	fa03 fc0c 	lsl.w	ip, r3, ip
 8004c1c:	ea40 000c 	orr.w	r0, r0, ip
 8004c20:	fa23 f302 	lsr.w	r3, r3, r2
 8004c24:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8004c28:	e7cc      	b.n	8004bc4 <__aeabi_d2f+0x14>
 8004c2a:	ea7f 5362 	mvns.w	r3, r2, asr #21
 8004c2e:	d107      	bne.n	8004c40 <__aeabi_d2f+0x90>
 8004c30:	ea50 3301 	orrs.w	r3, r0, r1, lsl #12
 8004c34:	bf1e      	ittt	ne
 8004c36:	f04f 40fe 	movne.w	r0, #2130706432	; 0x7f000000
 8004c3a:	f440 0040 	orrne.w	r0, r0, #12582912	; 0xc00000
 8004c3e:	4770      	bxne	lr
 8004c40:	f001 4000 	and.w	r0, r1, #2147483648	; 0x80000000
 8004c44:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004c48:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004c4c:	4770      	bx	lr
 8004c4e:	bf00      	nop

08004c50 <__aeabi_frsub>:
 8004c50:	f080 4000 	eor.w	r0, r0, #2147483648	; 0x80000000
 8004c54:	e002      	b.n	8004c5c <__addsf3>
 8004c56:	bf00      	nop

08004c58 <__aeabi_fsub>:
 8004c58:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000

08004c5c <__addsf3>:
 8004c5c:	0042      	lsls	r2, r0, #1
 8004c5e:	bf1f      	itttt	ne
 8004c60:	ea5f 0341 	movsne.w	r3, r1, lsl #1
 8004c64:	ea92 0f03 	teqne	r2, r3
 8004c68:	ea7f 6c22 	mvnsne.w	ip, r2, asr #24
 8004c6c:	ea7f 6c23 	mvnsne.w	ip, r3, asr #24
 8004c70:	d06a      	beq.n	8004d48 <__addsf3+0xec>
 8004c72:	ea4f 6212 	mov.w	r2, r2, lsr #24
 8004c76:	ebd2 6313 	rsbs	r3, r2, r3, lsr #24
 8004c7a:	bfc1      	itttt	gt
 8004c7c:	18d2      	addgt	r2, r2, r3
 8004c7e:	4041      	eorgt	r1, r0
 8004c80:	4048      	eorgt	r0, r1
 8004c82:	4041      	eorgt	r1, r0
 8004c84:	bfb8      	it	lt
 8004c86:	425b      	neglt	r3, r3
 8004c88:	2b19      	cmp	r3, #25
 8004c8a:	bf88      	it	hi
 8004c8c:	4770      	bxhi	lr
 8004c8e:	f010 4f00 	tst.w	r0, #2147483648	; 0x80000000
 8004c92:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004c96:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
 8004c9a:	bf18      	it	ne
 8004c9c:	4240      	negne	r0, r0
 8004c9e:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
 8004ca2:	f441 0100 	orr.w	r1, r1, #8388608	; 0x800000
 8004ca6:	f021 417f 	bic.w	r1, r1, #4278190080	; 0xff000000
 8004caa:	bf18      	it	ne
 8004cac:	4249      	negne	r1, r1
 8004cae:	ea92 0f03 	teq	r2, r3
 8004cb2:	d03f      	beq.n	8004d34 <__addsf3+0xd8>
 8004cb4:	f1a2 0201 	sub.w	r2, r2, #1
 8004cb8:	fa41 fc03 	asr.w	ip, r1, r3
 8004cbc:	eb10 000c 	adds.w	r0, r0, ip
 8004cc0:	f1c3 0320 	rsb	r3, r3, #32
 8004cc4:	fa01 f103 	lsl.w	r1, r1, r3
 8004cc8:	f000 4300 	and.w	r3, r0, #2147483648	; 0x80000000
 8004ccc:	d502      	bpl.n	8004cd4 <__addsf3+0x78>
 8004cce:	4249      	negs	r1, r1
 8004cd0:	eb60 0040 	sbc.w	r0, r0, r0, lsl #1
 8004cd4:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
 8004cd8:	d313      	bcc.n	8004d02 <__addsf3+0xa6>
 8004cda:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8004cde:	d306      	bcc.n	8004cee <__addsf3+0x92>
 8004ce0:	0840      	lsrs	r0, r0, #1
 8004ce2:	ea4f 0131 	mov.w	r1, r1, rrx
 8004ce6:	f102 0201 	add.w	r2, r2, #1
 8004cea:	2afe      	cmp	r2, #254	; 0xfe
 8004cec:	d251      	bcs.n	8004d92 <__addsf3+0x136>
 8004cee:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
 8004cf2:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8004cf6:	bf08      	it	eq
 8004cf8:	f020 0001 	biceq.w	r0, r0, #1
 8004cfc:	ea40 0003 	orr.w	r0, r0, r3
 8004d00:	4770      	bx	lr
 8004d02:	0049      	lsls	r1, r1, #1
 8004d04:	eb40 0000 	adc.w	r0, r0, r0
 8004d08:	f410 0f00 	tst.w	r0, #8388608	; 0x800000
 8004d0c:	f1a2 0201 	sub.w	r2, r2, #1
 8004d10:	d1ed      	bne.n	8004cee <__addsf3+0x92>
 8004d12:	fab0 fc80 	clz	ip, r0
 8004d16:	f1ac 0c08 	sub.w	ip, ip, #8
 8004d1a:	ebb2 020c 	subs.w	r2, r2, ip
 8004d1e:	fa00 f00c 	lsl.w	r0, r0, ip
 8004d22:	bfaa      	itet	ge
 8004d24:	eb00 50c2 	addge.w	r0, r0, r2, lsl #23
 8004d28:	4252      	neglt	r2, r2
 8004d2a:	4318      	orrge	r0, r3
 8004d2c:	bfbc      	itt	lt
 8004d2e:	40d0      	lsrlt	r0, r2
 8004d30:	4318      	orrlt	r0, r3
 8004d32:	4770      	bx	lr
 8004d34:	f092 0f00 	teq	r2, #0
 8004d38:	f481 0100 	eor.w	r1, r1, #8388608	; 0x800000
 8004d3c:	bf06      	itte	eq
 8004d3e:	f480 0000 	eoreq.w	r0, r0, #8388608	; 0x800000
 8004d42:	3201      	addeq	r2, #1
 8004d44:	3b01      	subne	r3, #1
 8004d46:	e7b5      	b.n	8004cb4 <__addsf3+0x58>
 8004d48:	ea4f 0341 	mov.w	r3, r1, lsl #1
 8004d4c:	ea7f 6c22 	mvns.w	ip, r2, asr #24
 8004d50:	bf18      	it	ne
 8004d52:	ea7f 6c23 	mvnsne.w	ip, r3, asr #24
 8004d56:	d021      	beq.n	8004d9c <__addsf3+0x140>
 8004d58:	ea92 0f03 	teq	r2, r3
 8004d5c:	d004      	beq.n	8004d68 <__addsf3+0x10c>
 8004d5e:	f092 0f00 	teq	r2, #0
 8004d62:	bf08      	it	eq
 8004d64:	4608      	moveq	r0, r1
 8004d66:	4770      	bx	lr
 8004d68:	ea90 0f01 	teq	r0, r1
 8004d6c:	bf1c      	itt	ne
 8004d6e:	2000      	movne	r0, #0
 8004d70:	4770      	bxne	lr
 8004d72:	f012 4f7f 	tst.w	r2, #4278190080	; 0xff000000
 8004d76:	d104      	bne.n	8004d82 <__addsf3+0x126>
 8004d78:	0040      	lsls	r0, r0, #1
 8004d7a:	bf28      	it	cs
 8004d7c:	f040 4000 	orrcs.w	r0, r0, #2147483648	; 0x80000000
 8004d80:	4770      	bx	lr
 8004d82:	f112 7200 	adds.w	r2, r2, #33554432	; 0x2000000
 8004d86:	bf3c      	itt	cc
 8004d88:	f500 0000 	addcc.w	r0, r0, #8388608	; 0x800000
 8004d8c:	4770      	bxcc	lr
 8004d8e:	f000 4300 	and.w	r3, r0, #2147483648	; 0x80000000
 8004d92:	f043 40fe 	orr.w	r0, r3, #2130706432	; 0x7f000000
 8004d96:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004d9a:	4770      	bx	lr
 8004d9c:	ea7f 6222 	mvns.w	r2, r2, asr #24
 8004da0:	bf16      	itet	ne
 8004da2:	4608      	movne	r0, r1
 8004da4:	ea7f 6323 	mvnseq.w	r3, r3, asr #24
 8004da8:	4601      	movne	r1, r0
 8004daa:	0242      	lsls	r2, r0, #9
 8004dac:	bf06      	itte	eq
 8004dae:	ea5f 2341 	movseq.w	r3, r1, lsl #9
 8004db2:	ea90 0f01 	teqeq	r0, r1
 8004db6:	f440 0080 	orrne.w	r0, r0, #4194304	; 0x400000
 8004dba:	4770      	bx	lr

08004dbc <__aeabi_ui2f>:
 8004dbc:	f04f 0300 	mov.w	r3, #0
 8004dc0:	e004      	b.n	8004dcc <__aeabi_i2f+0x8>
 8004dc2:	bf00      	nop

08004dc4 <__aeabi_i2f>:
 8004dc4:	f010 4300 	ands.w	r3, r0, #2147483648	; 0x80000000
 8004dc8:	bf48      	it	mi
 8004dca:	4240      	negmi	r0, r0
 8004dcc:	ea5f 0c00 	movs.w	ip, r0
 8004dd0:	bf08      	it	eq
 8004dd2:	4770      	bxeq	lr
 8004dd4:	f043 4396 	orr.w	r3, r3, #1258291200	; 0x4b000000
 8004dd8:	4601      	mov	r1, r0
 8004dda:	f04f 0000 	mov.w	r0, #0
 8004dde:	e01c      	b.n	8004e1a <__aeabi_l2f+0x2a>

08004de0 <__aeabi_ul2f>:
 8004de0:	ea50 0201 	orrs.w	r2, r0, r1
 8004de4:	bf08      	it	eq
 8004de6:	4770      	bxeq	lr
 8004de8:	f04f 0300 	mov.w	r3, #0
 8004dec:	e00a      	b.n	8004e04 <__aeabi_l2f+0x14>
 8004dee:	bf00      	nop

08004df0 <__aeabi_l2f>:
 8004df0:	ea50 0201 	orrs.w	r2, r0, r1
 8004df4:	bf08      	it	eq
 8004df6:	4770      	bxeq	lr
 8004df8:	f011 4300 	ands.w	r3, r1, #2147483648	; 0x80000000
 8004dfc:	d502      	bpl.n	8004e04 <__aeabi_l2f+0x14>
 8004dfe:	4240      	negs	r0, r0
 8004e00:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8004e04:	ea5f 0c01 	movs.w	ip, r1
 8004e08:	bf02      	ittt	eq
 8004e0a:	4684      	moveq	ip, r0
 8004e0c:	4601      	moveq	r1, r0
 8004e0e:	2000      	moveq	r0, #0
 8004e10:	f043 43b6 	orr.w	r3, r3, #1526726656	; 0x5b000000
 8004e14:	bf08      	it	eq
 8004e16:	f1a3 5380 	subeq.w	r3, r3, #268435456	; 0x10000000
 8004e1a:	f5a3 0300 	sub.w	r3, r3, #8388608	; 0x800000
 8004e1e:	fabc f28c 	clz	r2, ip
 8004e22:	3a08      	subs	r2, #8
 8004e24:	eba3 53c2 	sub.w	r3, r3, r2, lsl #23
 8004e28:	db10      	blt.n	8004e4c <__aeabi_l2f+0x5c>
 8004e2a:	fa01 fc02 	lsl.w	ip, r1, r2
 8004e2e:	4463      	add	r3, ip
 8004e30:	fa00 fc02 	lsl.w	ip, r0, r2
 8004e34:	f1c2 0220 	rsb	r2, r2, #32
 8004e38:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
 8004e3c:	fa20 f202 	lsr.w	r2, r0, r2
 8004e40:	eb43 0002 	adc.w	r0, r3, r2
 8004e44:	bf08      	it	eq
 8004e46:	f020 0001 	biceq.w	r0, r0, #1
 8004e4a:	4770      	bx	lr
 8004e4c:	f102 0220 	add.w	r2, r2, #32
 8004e50:	fa01 fc02 	lsl.w	ip, r1, r2
 8004e54:	f1c2 0220 	rsb	r2, r2, #32
 8004e58:	ea50 004c 	orrs.w	r0, r0, ip, lsl #1
 8004e5c:	fa21 f202 	lsr.w	r2, r1, r2
 8004e60:	eb43 0002 	adc.w	r0, r3, r2
 8004e64:	bf08      	it	eq
 8004e66:	ea20 70dc 	biceq.w	r0, r0, ip, lsr #31
 8004e6a:	4770      	bx	lr

08004e6c <__aeabi_fmul>:
 8004e6c:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004e70:	ea1c 52d0 	ands.w	r2, ip, r0, lsr #23
 8004e74:	bf1e      	ittt	ne
 8004e76:	ea1c 53d1 	andsne.w	r3, ip, r1, lsr #23
 8004e7a:	ea92 0f0c 	teqne	r2, ip
 8004e7e:	ea93 0f0c 	teqne	r3, ip
 8004e82:	d06f      	beq.n	8004f64 <__aeabi_fmul+0xf8>
 8004e84:	441a      	add	r2, r3
 8004e86:	ea80 0c01 	eor.w	ip, r0, r1
 8004e8a:	0240      	lsls	r0, r0, #9
 8004e8c:	bf18      	it	ne
 8004e8e:	ea5f 2141 	movsne.w	r1, r1, lsl #9
 8004e92:	d01e      	beq.n	8004ed2 <__aeabi_fmul+0x66>
 8004e94:	f04f 6300 	mov.w	r3, #134217728	; 0x8000000
 8004e98:	ea43 1050 	orr.w	r0, r3, r0, lsr #5
 8004e9c:	ea43 1151 	orr.w	r1, r3, r1, lsr #5
 8004ea0:	fba0 3101 	umull	r3, r1, r0, r1
 8004ea4:	f00c 4000 	and.w	r0, ip, #2147483648	; 0x80000000
 8004ea8:	f5b1 0f00 	cmp.w	r1, #8388608	; 0x800000
 8004eac:	bf3e      	ittt	cc
 8004eae:	0049      	lslcc	r1, r1, #1
 8004eb0:	ea41 71d3 	orrcc.w	r1, r1, r3, lsr #31
 8004eb4:	005b      	lslcc	r3, r3, #1
 8004eb6:	ea40 0001 	orr.w	r0, r0, r1
 8004eba:	f162 027f 	sbc.w	r2, r2, #127	; 0x7f
 8004ebe:	2afd      	cmp	r2, #253	; 0xfd
 8004ec0:	d81d      	bhi.n	8004efe <__aeabi_fmul+0x92>
 8004ec2:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
 8004ec6:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8004eca:	bf08      	it	eq
 8004ecc:	f020 0001 	biceq.w	r0, r0, #1
 8004ed0:	4770      	bx	lr
 8004ed2:	f090 0f00 	teq	r0, #0
 8004ed6:	f00c 4c00 	and.w	ip, ip, #2147483648	; 0x80000000
 8004eda:	bf08      	it	eq
 8004edc:	0249      	lsleq	r1, r1, #9
 8004ede:	ea4c 2050 	orr.w	r0, ip, r0, lsr #9
 8004ee2:	ea40 2051 	orr.w	r0, r0, r1, lsr #9
 8004ee6:	3a7f      	subs	r2, #127	; 0x7f
 8004ee8:	bfc2      	ittt	gt
 8004eea:	f1d2 03ff 	rsbsgt	r3, r2, #255	; 0xff
 8004eee:	ea40 50c2 	orrgt.w	r0, r0, r2, lsl #23
 8004ef2:	4770      	bxgt	lr
 8004ef4:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004ef8:	f04f 0300 	mov.w	r3, #0
 8004efc:	3a01      	subs	r2, #1
 8004efe:	dc5d      	bgt.n	8004fbc <__aeabi_fmul+0x150>
 8004f00:	f112 0f19 	cmn.w	r2, #25
 8004f04:	bfdc      	itt	le
 8004f06:	f000 4000 	andle.w	r0, r0, #2147483648	; 0x80000000
 8004f0a:	4770      	bxle	lr
 8004f0c:	f1c2 0200 	rsb	r2, r2, #0
 8004f10:	0041      	lsls	r1, r0, #1
 8004f12:	fa21 f102 	lsr.w	r1, r1, r2
 8004f16:	f1c2 0220 	rsb	r2, r2, #32
 8004f1a:	fa00 fc02 	lsl.w	ip, r0, r2
 8004f1e:	ea5f 0031 	movs.w	r0, r1, rrx
 8004f22:	f140 0000 	adc.w	r0, r0, #0
 8004f26:	ea53 034c 	orrs.w	r3, r3, ip, lsl #1
 8004f2a:	bf08      	it	eq
 8004f2c:	ea20 70dc 	biceq.w	r0, r0, ip, lsr #31
 8004f30:	4770      	bx	lr
 8004f32:	f092 0f00 	teq	r2, #0
 8004f36:	f000 4c00 	and.w	ip, r0, #2147483648	; 0x80000000
 8004f3a:	bf02      	ittt	eq
 8004f3c:	0040      	lsleq	r0, r0, #1
 8004f3e:	f410 0f00 	tsteq.w	r0, #8388608	; 0x800000
 8004f42:	3a01      	subeq	r2, #1
 8004f44:	d0f9      	beq.n	8004f3a <__aeabi_fmul+0xce>
 8004f46:	ea40 000c 	orr.w	r0, r0, ip
 8004f4a:	f093 0f00 	teq	r3, #0
 8004f4e:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 8004f52:	bf02      	ittt	eq
 8004f54:	0049      	lsleq	r1, r1, #1
 8004f56:	f411 0f00 	tsteq.w	r1, #8388608	; 0x800000
 8004f5a:	3b01      	subeq	r3, #1
 8004f5c:	d0f9      	beq.n	8004f52 <__aeabi_fmul+0xe6>
 8004f5e:	ea41 010c 	orr.w	r1, r1, ip
 8004f62:	e78f      	b.n	8004e84 <__aeabi_fmul+0x18>
 8004f64:	ea0c 53d1 	and.w	r3, ip, r1, lsr #23
 8004f68:	ea92 0f0c 	teq	r2, ip
 8004f6c:	bf18      	it	ne
 8004f6e:	ea93 0f0c 	teqne	r3, ip
 8004f72:	d00a      	beq.n	8004f8a <__aeabi_fmul+0x11e>
 8004f74:	f030 4c00 	bics.w	ip, r0, #2147483648	; 0x80000000
 8004f78:	bf18      	it	ne
 8004f7a:	f031 4c00 	bicsne.w	ip, r1, #2147483648	; 0x80000000
 8004f7e:	d1d8      	bne.n	8004f32 <__aeabi_fmul+0xc6>
 8004f80:	ea80 0001 	eor.w	r0, r0, r1
 8004f84:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
 8004f88:	4770      	bx	lr
 8004f8a:	f090 0f00 	teq	r0, #0
 8004f8e:	bf17      	itett	ne
 8004f90:	f090 4f00 	teqne	r0, #2147483648	; 0x80000000
 8004f94:	4608      	moveq	r0, r1
 8004f96:	f091 0f00 	teqne	r1, #0
 8004f9a:	f091 4f00 	teqne	r1, #2147483648	; 0x80000000
 8004f9e:	d014      	beq.n	8004fca <__aeabi_fmul+0x15e>
 8004fa0:	ea92 0f0c 	teq	r2, ip
 8004fa4:	d101      	bne.n	8004faa <__aeabi_fmul+0x13e>
 8004fa6:	0242      	lsls	r2, r0, #9
 8004fa8:	d10f      	bne.n	8004fca <__aeabi_fmul+0x15e>
 8004faa:	ea93 0f0c 	teq	r3, ip
 8004fae:	d103      	bne.n	8004fb8 <__aeabi_fmul+0x14c>
 8004fb0:	024b      	lsls	r3, r1, #9
 8004fb2:	bf18      	it	ne
 8004fb4:	4608      	movne	r0, r1
 8004fb6:	d108      	bne.n	8004fca <__aeabi_fmul+0x15e>
 8004fb8:	ea80 0001 	eor.w	r0, r0, r1
 8004fbc:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
 8004fc0:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004fc4:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8004fc8:	4770      	bx	lr
 8004fca:	f040 40fe 	orr.w	r0, r0, #2130706432	; 0x7f000000
 8004fce:	f440 0040 	orr.w	r0, r0, #12582912	; 0xc00000
 8004fd2:	4770      	bx	lr

08004fd4 <__aeabi_fdiv>:
 8004fd4:	f04f 0cff 	mov.w	ip, #255	; 0xff
 8004fd8:	ea1c 52d0 	ands.w	r2, ip, r0, lsr #23
 8004fdc:	bf1e      	ittt	ne
 8004fde:	ea1c 53d1 	andsne.w	r3, ip, r1, lsr #23
 8004fe2:	ea92 0f0c 	teqne	r2, ip
 8004fe6:	ea93 0f0c 	teqne	r3, ip
 8004fea:	d069      	beq.n	80050c0 <__aeabi_fdiv+0xec>
 8004fec:	eba2 0203 	sub.w	r2, r2, r3
 8004ff0:	ea80 0c01 	eor.w	ip, r0, r1
 8004ff4:	0249      	lsls	r1, r1, #9
 8004ff6:	ea4f 2040 	mov.w	r0, r0, lsl #9
 8004ffa:	d037      	beq.n	800506c <__aeabi_fdiv+0x98>
 8004ffc:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
 8005000:	ea43 1111 	orr.w	r1, r3, r1, lsr #4
 8005004:	ea43 1310 	orr.w	r3, r3, r0, lsr #4
 8005008:	f00c 4000 	and.w	r0, ip, #2147483648	; 0x80000000
 800500c:	428b      	cmp	r3, r1
 800500e:	bf38      	it	cc
 8005010:	005b      	lslcc	r3, r3, #1
 8005012:	f142 027d 	adc.w	r2, r2, #125	; 0x7d
 8005016:	f44f 0c00 	mov.w	ip, #8388608	; 0x800000
 800501a:	428b      	cmp	r3, r1
 800501c:	bf24      	itt	cs
 800501e:	1a5b      	subcs	r3, r3, r1
 8005020:	ea40 000c 	orrcs.w	r0, r0, ip
 8005024:	ebb3 0f51 	cmp.w	r3, r1, lsr #1
 8005028:	bf24      	itt	cs
 800502a:	eba3 0351 	subcs.w	r3, r3, r1, lsr #1
 800502e:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
 8005032:	ebb3 0f91 	cmp.w	r3, r1, lsr #2
 8005036:	bf24      	itt	cs
 8005038:	eba3 0391 	subcs.w	r3, r3, r1, lsr #2
 800503c:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
 8005040:	ebb3 0fd1 	cmp.w	r3, r1, lsr #3
 8005044:	bf24      	itt	cs
 8005046:	eba3 03d1 	subcs.w	r3, r3, r1, lsr #3
 800504a:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
 800504e:	011b      	lsls	r3, r3, #4
 8005050:	bf18      	it	ne
 8005052:	ea5f 1c1c 	movsne.w	ip, ip, lsr #4
 8005056:	d1e0      	bne.n	800501a <__aeabi_fdiv+0x46>
 8005058:	2afd      	cmp	r2, #253	; 0xfd
 800505a:	f63f af50 	bhi.w	8004efe <__aeabi_fmul+0x92>
 800505e:	428b      	cmp	r3, r1
 8005060:	eb40 50c2 	adc.w	r0, r0, r2, lsl #23
 8005064:	bf08      	it	eq
 8005066:	f020 0001 	biceq.w	r0, r0, #1
 800506a:	4770      	bx	lr
 800506c:	f00c 4c00 	and.w	ip, ip, #2147483648	; 0x80000000
 8005070:	ea4c 2050 	orr.w	r0, ip, r0, lsr #9
 8005074:	327f      	adds	r2, #127	; 0x7f
 8005076:	bfc2      	ittt	gt
 8005078:	f1d2 03ff 	rsbsgt	r3, r2, #255	; 0xff
 800507c:	ea40 50c2 	orrgt.w	r0, r0, r2, lsl #23
 8005080:	4770      	bxgt	lr
 8005082:	f440 0000 	orr.w	r0, r0, #8388608	; 0x800000
 8005086:	f04f 0300 	mov.w	r3, #0
 800508a:	3a01      	subs	r2, #1
 800508c:	e737      	b.n	8004efe <__aeabi_fmul+0x92>
 800508e:	f092 0f00 	teq	r2, #0
 8005092:	f000 4c00 	and.w	ip, r0, #2147483648	; 0x80000000
 8005096:	bf02      	ittt	eq
 8005098:	0040      	lsleq	r0, r0, #1
 800509a:	f410 0f00 	tsteq.w	r0, #8388608	; 0x800000
 800509e:	3a01      	subeq	r2, #1
 80050a0:	d0f9      	beq.n	8005096 <__aeabi_fdiv+0xc2>
 80050a2:	ea40 000c 	orr.w	r0, r0, ip
 80050a6:	f093 0f00 	teq	r3, #0
 80050aa:	f001 4c00 	and.w	ip, r1, #2147483648	; 0x80000000
 80050ae:	bf02      	ittt	eq
 80050b0:	0049      	lsleq	r1, r1, #1
 80050b2:	f411 0f00 	tsteq.w	r1, #8388608	; 0x800000
 80050b6:	3b01      	subeq	r3, #1
 80050b8:	d0f9      	beq.n	80050ae <__aeabi_fdiv+0xda>
 80050ba:	ea41 010c 	orr.w	r1, r1, ip
 80050be:	e795      	b.n	8004fec <__aeabi_fdiv+0x18>
 80050c0:	ea0c 53d1 	and.w	r3, ip, r1, lsr #23
 80050c4:	ea92 0f0c 	teq	r2, ip
 80050c8:	d108      	bne.n	80050dc <__aeabi_fdiv+0x108>
 80050ca:	0242      	lsls	r2, r0, #9
 80050cc:	f47f af7d 	bne.w	8004fca <__aeabi_fmul+0x15e>
 80050d0:	ea93 0f0c 	teq	r3, ip
 80050d4:	f47f af70 	bne.w	8004fb8 <__aeabi_fmul+0x14c>
 80050d8:	4608      	mov	r0, r1
 80050da:	e776      	b.n	8004fca <__aeabi_fmul+0x15e>
 80050dc:	ea93 0f0c 	teq	r3, ip
 80050e0:	d104      	bne.n	80050ec <__aeabi_fdiv+0x118>
 80050e2:	024b      	lsls	r3, r1, #9
 80050e4:	f43f af4c 	beq.w	8004f80 <__aeabi_fmul+0x114>
 80050e8:	4608      	mov	r0, r1
 80050ea:	e76e      	b.n	8004fca <__aeabi_fmul+0x15e>
 80050ec:	f030 4c00 	bics.w	ip, r0, #2147483648	; 0x80000000
 80050f0:	bf18      	it	ne
 80050f2:	f031 4c00 	bicsne.w	ip, r1, #2147483648	; 0x80000000
 80050f6:	d1ca      	bne.n	800508e <__aeabi_fdiv+0xba>
 80050f8:	f030 4200 	bics.w	r2, r0, #2147483648	; 0x80000000
 80050fc:	f47f af5c 	bne.w	8004fb8 <__aeabi_fmul+0x14c>
 8005100:	f031 4300 	bics.w	r3, r1, #2147483648	; 0x80000000
 8005104:	f47f af3c 	bne.w	8004f80 <__aeabi_fmul+0x114>
 8005108:	e75f      	b.n	8004fca <__aeabi_fmul+0x15e>
 800510a:	bf00      	nop

0800510c <__aeabi_f2uiz>:
 800510c:	0042      	lsls	r2, r0, #1
 800510e:	d20e      	bcs.n	800512e <__aeabi_f2uiz+0x22>
 8005110:	f1b2 4ffe 	cmp.w	r2, #2130706432	; 0x7f000000
 8005114:	d30b      	bcc.n	800512e <__aeabi_f2uiz+0x22>
 8005116:	f04f 039e 	mov.w	r3, #158	; 0x9e
 800511a:	ebb3 6212 	subs.w	r2, r3, r2, lsr #24
 800511e:	d409      	bmi.n	8005134 <__aeabi_f2uiz+0x28>
 8005120:	ea4f 2300 	mov.w	r3, r0, lsl #8
 8005124:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
 8005128:	fa23 f002 	lsr.w	r0, r3, r2
 800512c:	4770      	bx	lr
 800512e:	f04f 0000 	mov.w	r0, #0
 8005132:	4770      	bx	lr
 8005134:	f112 0f61 	cmn.w	r2, #97	; 0x61
 8005138:	d101      	bne.n	800513e <__aeabi_f2uiz+0x32>
 800513a:	0242      	lsls	r2, r0, #9
 800513c:	d102      	bne.n	8005144 <__aeabi_f2uiz+0x38>
 800513e:	f04f 30ff 	mov.w	r0, #4294967295
 8005142:	4770      	bx	lr
 8005144:	f04f 0000 	mov.w	r0, #0
 8005148:	4770      	bx	lr
 800514a:	bf00      	nop

0800514c <__aeabi_uldivmod>:
 800514c:	b953      	cbnz	r3, 8005164 <__aeabi_uldivmod+0x18>
 800514e:	b94a      	cbnz	r2, 8005164 <__aeabi_uldivmod+0x18>
 8005150:	2900      	cmp	r1, #0
 8005152:	bf08      	it	eq
 8005154:	2800      	cmpeq	r0, #0
 8005156:	bf1c      	itt	ne
 8005158:	f04f 31ff 	movne.w	r1, #4294967295
 800515c:	f04f 30ff 	movne.w	r0, #4294967295
 8005160:	f000 b97a 	b.w	8005458 <__aeabi_idiv0>
 8005164:	f1ad 0c08 	sub.w	ip, sp, #8
 8005168:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 800516c:	f000 f806 	bl	800517c <__udivmoddi4>
 8005170:	f8dd e004 	ldr.w	lr, [sp, #4]
 8005174:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8005178:	b004      	add	sp, #16
 800517a:	4770      	bx	lr

0800517c <__udivmoddi4>:
 800517c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8005180:	468c      	mov	ip, r1
 8005182:	460e      	mov	r6, r1
 8005184:	4604      	mov	r4, r0
 8005186:	9d08      	ldr	r5, [sp, #32]
 8005188:	2b00      	cmp	r3, #0
 800518a:	d150      	bne.n	800522e <__udivmoddi4+0xb2>
 800518c:	428a      	cmp	r2, r1
 800518e:	4617      	mov	r7, r2
 8005190:	d96c      	bls.n	800526c <__udivmoddi4+0xf0>
 8005192:	fab2 fe82 	clz	lr, r2
 8005196:	f1be 0f00 	cmp.w	lr, #0
 800519a:	d00b      	beq.n	80051b4 <__udivmoddi4+0x38>
 800519c:	f1ce 0c20 	rsb	ip, lr, #32
 80051a0:	fa01 f60e 	lsl.w	r6, r1, lr
 80051a4:	fa20 fc0c 	lsr.w	ip, r0, ip
 80051a8:	fa02 f70e 	lsl.w	r7, r2, lr
 80051ac:	ea4c 0c06 	orr.w	ip, ip, r6
 80051b0:	fa00 f40e 	lsl.w	r4, r0, lr
 80051b4:	0c3a      	lsrs	r2, r7, #16
 80051b6:	fbbc f9f2 	udiv	r9, ip, r2
 80051ba:	b2bb      	uxth	r3, r7
 80051bc:	fb02 cc19 	mls	ip, r2, r9, ip
 80051c0:	fb09 fa03 	mul.w	sl, r9, r3
 80051c4:	ea4f 4814 	mov.w	r8, r4, lsr #16
 80051c8:	ea48 460c 	orr.w	r6, r8, ip, lsl #16
 80051cc:	45b2      	cmp	sl, r6
 80051ce:	d90a      	bls.n	80051e6 <__udivmoddi4+0x6a>
 80051d0:	19f6      	adds	r6, r6, r7
 80051d2:	f109 31ff 	add.w	r1, r9, #4294967295
 80051d6:	f080 8125 	bcs.w	8005424 <__udivmoddi4+0x2a8>
 80051da:	45b2      	cmp	sl, r6
 80051dc:	f240 8122 	bls.w	8005424 <__udivmoddi4+0x2a8>
 80051e0:	f1a9 0902 	sub.w	r9, r9, #2
 80051e4:	443e      	add	r6, r7
 80051e6:	eba6 060a 	sub.w	r6, r6, sl
 80051ea:	fbb6 f0f2 	udiv	r0, r6, r2
 80051ee:	fb02 6610 	mls	r6, r2, r0, r6
 80051f2:	fb00 f303 	mul.w	r3, r0, r3
 80051f6:	b2a4      	uxth	r4, r4
 80051f8:	ea44 4406 	orr.w	r4, r4, r6, lsl #16
 80051fc:	42a3      	cmp	r3, r4
 80051fe:	d909      	bls.n	8005214 <__udivmoddi4+0x98>
 8005200:	19e4      	adds	r4, r4, r7
 8005202:	f100 32ff 	add.w	r2, r0, #4294967295
 8005206:	f080 810b 	bcs.w	8005420 <__udivmoddi4+0x2a4>
 800520a:	42a3      	cmp	r3, r4
 800520c:	f240 8108 	bls.w	8005420 <__udivmoddi4+0x2a4>
 8005210:	3802      	subs	r0, #2
 8005212:	443c      	add	r4, r7
 8005214:	2100      	movs	r1, #0
 8005216:	1ae4      	subs	r4, r4, r3
 8005218:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
 800521c:	2d00      	cmp	r5, #0
 800521e:	d062      	beq.n	80052e6 <__udivmoddi4+0x16a>
 8005220:	2300      	movs	r3, #0
 8005222:	fa24 f40e 	lsr.w	r4, r4, lr
 8005226:	602c      	str	r4, [r5, #0]
 8005228:	606b      	str	r3, [r5, #4]
 800522a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800522e:	428b      	cmp	r3, r1
 8005230:	d907      	bls.n	8005242 <__udivmoddi4+0xc6>
 8005232:	2d00      	cmp	r5, #0
 8005234:	d055      	beq.n	80052e2 <__udivmoddi4+0x166>
 8005236:	2100      	movs	r1, #0
 8005238:	e885 0041 	stmia.w	r5, {r0, r6}
 800523c:	4608      	mov	r0, r1
 800523e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8005242:	fab3 f183 	clz	r1, r3
 8005246:	2900      	cmp	r1, #0
 8005248:	f040 808f 	bne.w	800536a <__udivmoddi4+0x1ee>
 800524c:	42b3      	cmp	r3, r6
 800524e:	d302      	bcc.n	8005256 <__udivmoddi4+0xda>
 8005250:	4282      	cmp	r2, r0
 8005252:	f200 80fc 	bhi.w	800544e <__udivmoddi4+0x2d2>
 8005256:	1a84      	subs	r4, r0, r2
 8005258:	eb66 0603 	sbc.w	r6, r6, r3
 800525c:	2001      	movs	r0, #1
 800525e:	46b4      	mov	ip, r6
 8005260:	2d00      	cmp	r5, #0
 8005262:	d040      	beq.n	80052e6 <__udivmoddi4+0x16a>
 8005264:	e885 1010 	stmia.w	r5, {r4, ip}
 8005268:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800526c:	b912      	cbnz	r2, 8005274 <__udivmoddi4+0xf8>
 800526e:	2701      	movs	r7, #1
 8005270:	fbb7 f7f2 	udiv	r7, r7, r2
 8005274:	fab7 fe87 	clz	lr, r7
 8005278:	f1be 0f00 	cmp.w	lr, #0
 800527c:	d135      	bne.n	80052ea <__udivmoddi4+0x16e>
 800527e:	2101      	movs	r1, #1
 8005280:	1bf6      	subs	r6, r6, r7
 8005282:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 8005286:	fa1f f887 	uxth.w	r8, r7
 800528a:	fbb6 f2fc 	udiv	r2, r6, ip
 800528e:	fb0c 6612 	mls	r6, ip, r2, r6
 8005292:	fb08 f002 	mul.w	r0, r8, r2
 8005296:	0c23      	lsrs	r3, r4, #16
 8005298:	ea43 4606 	orr.w	r6, r3, r6, lsl #16
 800529c:	42b0      	cmp	r0, r6
 800529e:	d907      	bls.n	80052b0 <__udivmoddi4+0x134>
 80052a0:	19f6      	adds	r6, r6, r7
 80052a2:	f102 33ff 	add.w	r3, r2, #4294967295
 80052a6:	d202      	bcs.n	80052ae <__udivmoddi4+0x132>
 80052a8:	42b0      	cmp	r0, r6
 80052aa:	f200 80d2 	bhi.w	8005452 <__udivmoddi4+0x2d6>
 80052ae:	461a      	mov	r2, r3
 80052b0:	1a36      	subs	r6, r6, r0
 80052b2:	fbb6 f0fc 	udiv	r0, r6, ip
 80052b6:	fb0c 6610 	mls	r6, ip, r0, r6
 80052ba:	fb08 f800 	mul.w	r8, r8, r0
 80052be:	b2a3      	uxth	r3, r4
 80052c0:	ea43 4406 	orr.w	r4, r3, r6, lsl #16
 80052c4:	45a0      	cmp	r8, r4
 80052c6:	d907      	bls.n	80052d8 <__udivmoddi4+0x15c>
 80052c8:	19e4      	adds	r4, r4, r7
 80052ca:	f100 33ff 	add.w	r3, r0, #4294967295
 80052ce:	d202      	bcs.n	80052d6 <__udivmoddi4+0x15a>
 80052d0:	45a0      	cmp	r8, r4
 80052d2:	f200 80b9 	bhi.w	8005448 <__udivmoddi4+0x2cc>
 80052d6:	4618      	mov	r0, r3
 80052d8:	eba4 0408 	sub.w	r4, r4, r8
 80052dc:	ea40 4002 	orr.w	r0, r0, r2, lsl #16
 80052e0:	e79c      	b.n	800521c <__udivmoddi4+0xa0>
 80052e2:	4629      	mov	r1, r5
 80052e4:	4628      	mov	r0, r5
 80052e6:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80052ea:	fa07 f70e 	lsl.w	r7, r7, lr
 80052ee:	f1ce 0320 	rsb	r3, lr, #32
 80052f2:	fa26 f203 	lsr.w	r2, r6, r3
 80052f6:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 80052fa:	fbb2 f1fc 	udiv	r1, r2, ip
 80052fe:	fa1f f887 	uxth.w	r8, r7
 8005302:	fb0c 2211 	mls	r2, ip, r1, r2
 8005306:	fa06 f60e 	lsl.w	r6, r6, lr
 800530a:	fa20 f303 	lsr.w	r3, r0, r3
 800530e:	fb01 f908 	mul.w	r9, r1, r8
 8005312:	4333      	orrs	r3, r6
 8005314:	0c1e      	lsrs	r6, r3, #16
 8005316:	ea46 4602 	orr.w	r6, r6, r2, lsl #16
 800531a:	45b1      	cmp	r9, r6
 800531c:	fa00 f40e 	lsl.w	r4, r0, lr
 8005320:	d909      	bls.n	8005336 <__udivmoddi4+0x1ba>
 8005322:	19f6      	adds	r6, r6, r7
 8005324:	f101 32ff 	add.w	r2, r1, #4294967295
 8005328:	f080 808c 	bcs.w	8005444 <__udivmoddi4+0x2c8>
 800532c:	45b1      	cmp	r9, r6
 800532e:	f240 8089 	bls.w	8005444 <__udivmoddi4+0x2c8>
 8005332:	3902      	subs	r1, #2
 8005334:	443e      	add	r6, r7
 8005336:	eba6 0609 	sub.w	r6, r6, r9
 800533a:	fbb6 f0fc 	udiv	r0, r6, ip
 800533e:	fb0c 6210 	mls	r2, ip, r0, r6
 8005342:	fb00 f908 	mul.w	r9, r0, r8
 8005346:	b29e      	uxth	r6, r3
 8005348:	ea46 4602 	orr.w	r6, r6, r2, lsl #16
 800534c:	45b1      	cmp	r9, r6
 800534e:	d907      	bls.n	8005360 <__udivmoddi4+0x1e4>
 8005350:	19f6      	adds	r6, r6, r7
 8005352:	f100 33ff 	add.w	r3, r0, #4294967295
 8005356:	d271      	bcs.n	800543c <__udivmoddi4+0x2c0>
 8005358:	45b1      	cmp	r9, r6
 800535a:	d96f      	bls.n	800543c <__udivmoddi4+0x2c0>
 800535c:	3802      	subs	r0, #2
 800535e:	443e      	add	r6, r7
 8005360:	eba6 0609 	sub.w	r6, r6, r9
 8005364:	ea40 4101 	orr.w	r1, r0, r1, lsl #16
 8005368:	e78f      	b.n	800528a <__udivmoddi4+0x10e>
 800536a:	f1c1 0720 	rsb	r7, r1, #32
 800536e:	fa22 f807 	lsr.w	r8, r2, r7
 8005372:	408b      	lsls	r3, r1
 8005374:	ea48 0303 	orr.w	r3, r8, r3
 8005378:	fa26 f407 	lsr.w	r4, r6, r7
 800537c:	ea4f 4e13 	mov.w	lr, r3, lsr #16
 8005380:	fbb4 f9fe 	udiv	r9, r4, lr
 8005384:	fa1f fc83 	uxth.w	ip, r3
 8005388:	fb0e 4419 	mls	r4, lr, r9, r4
 800538c:	408e      	lsls	r6, r1
 800538e:	fa20 f807 	lsr.w	r8, r0, r7
 8005392:	fb09 fa0c 	mul.w	sl, r9, ip
 8005396:	ea48 0806 	orr.w	r8, r8, r6
 800539a:	ea4f 4618 	mov.w	r6, r8, lsr #16
 800539e:	ea46 4404 	orr.w	r4, r6, r4, lsl #16
 80053a2:	45a2      	cmp	sl, r4
 80053a4:	fa02 f201 	lsl.w	r2, r2, r1
 80053a8:	fa00 f601 	lsl.w	r6, r0, r1
 80053ac:	d908      	bls.n	80053c0 <__udivmoddi4+0x244>
 80053ae:	18e4      	adds	r4, r4, r3
 80053b0:	f109 30ff 	add.w	r0, r9, #4294967295
 80053b4:	d244      	bcs.n	8005440 <__udivmoddi4+0x2c4>
 80053b6:	45a2      	cmp	sl, r4
 80053b8:	d942      	bls.n	8005440 <__udivmoddi4+0x2c4>
 80053ba:	f1a9 0902 	sub.w	r9, r9, #2
 80053be:	441c      	add	r4, r3
 80053c0:	eba4 040a 	sub.w	r4, r4, sl
 80053c4:	fbb4 f0fe 	udiv	r0, r4, lr
 80053c8:	fb0e 4410 	mls	r4, lr, r0, r4
 80053cc:	fb00 fc0c 	mul.w	ip, r0, ip
 80053d0:	fa1f f888 	uxth.w	r8, r8
 80053d4:	ea48 4404 	orr.w	r4, r8, r4, lsl #16
 80053d8:	45a4      	cmp	ip, r4
 80053da:	d907      	bls.n	80053ec <__udivmoddi4+0x270>
 80053dc:	18e4      	adds	r4, r4, r3
 80053de:	f100 3eff 	add.w	lr, r0, #4294967295
 80053e2:	d229      	bcs.n	8005438 <__udivmoddi4+0x2bc>
 80053e4:	45a4      	cmp	ip, r4
 80053e6:	d927      	bls.n	8005438 <__udivmoddi4+0x2bc>
 80053e8:	3802      	subs	r0, #2
 80053ea:	441c      	add	r4, r3
 80053ec:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
 80053f0:	fba0 8902 	umull	r8, r9, r0, r2
 80053f4:	eba4 0c0c 	sub.w	ip, r4, ip
 80053f8:	45cc      	cmp	ip, r9
 80053fa:	46c2      	mov	sl, r8
 80053fc:	46ce      	mov	lr, r9
 80053fe:	d315      	bcc.n	800542c <__udivmoddi4+0x2b0>
 8005400:	d012      	beq.n	8005428 <__udivmoddi4+0x2ac>
 8005402:	b155      	cbz	r5, 800541a <__udivmoddi4+0x29e>
 8005404:	ebb6 030a 	subs.w	r3, r6, sl
 8005408:	eb6c 060e 	sbc.w	r6, ip, lr
 800540c:	fa06 f707 	lsl.w	r7, r6, r7
 8005410:	40cb      	lsrs	r3, r1
 8005412:	431f      	orrs	r7, r3
 8005414:	40ce      	lsrs	r6, r1
 8005416:	602f      	str	r7, [r5, #0]
 8005418:	606e      	str	r6, [r5, #4]
 800541a:	2100      	movs	r1, #0
 800541c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8005420:	4610      	mov	r0, r2
 8005422:	e6f7      	b.n	8005214 <__udivmoddi4+0x98>
 8005424:	4689      	mov	r9, r1
 8005426:	e6de      	b.n	80051e6 <__udivmoddi4+0x6a>
 8005428:	4546      	cmp	r6, r8
 800542a:	d2ea      	bcs.n	8005402 <__udivmoddi4+0x286>
 800542c:	ebb8 0a02 	subs.w	sl, r8, r2
 8005430:	eb69 0e03 	sbc.w	lr, r9, r3
 8005434:	3801      	subs	r0, #1
 8005436:	e7e4      	b.n	8005402 <__udivmoddi4+0x286>
 8005438:	4670      	mov	r0, lr
 800543a:	e7d7      	b.n	80053ec <__udivmoddi4+0x270>
 800543c:	4618      	mov	r0, r3
 800543e:	e78f      	b.n	8005360 <__udivmoddi4+0x1e4>
 8005440:	4681      	mov	r9, r0
 8005442:	e7bd      	b.n	80053c0 <__udivmoddi4+0x244>
 8005444:	4611      	mov	r1, r2
 8005446:	e776      	b.n	8005336 <__udivmoddi4+0x1ba>
 8005448:	3802      	subs	r0, #2
 800544a:	443c      	add	r4, r7
 800544c:	e744      	b.n	80052d8 <__udivmoddi4+0x15c>
 800544e:	4608      	mov	r0, r1
 8005450:	e706      	b.n	8005260 <__udivmoddi4+0xe4>
 8005452:	3a02      	subs	r2, #2
 8005454:	443e      	add	r6, r7
 8005456:	e72b      	b.n	80052b0 <__udivmoddi4+0x134>

08005458 <__aeabi_idiv0>:
 8005458:	4770      	bx	lr
 800545a:	bf00      	nop

0800545c <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 800545c:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800545e:	4b0e      	ldr	r3, [pc, #56]	; (8005498 <HAL_InitTick+0x3c>)
{
 8005460:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8005462:	7818      	ldrb	r0, [r3, #0]
 8005464:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8005468:	fbb3 f3f0 	udiv	r3, r3, r0
 800546c:	4a0b      	ldr	r2, [pc, #44]	; (800549c <HAL_InitTick+0x40>)
 800546e:	6810      	ldr	r0, [r2, #0]
 8005470:	fbb0 f0f3 	udiv	r0, r0, r3
 8005474:	f000 fb38 	bl	8005ae8 <HAL_SYSTICK_Config>
 8005478:	4604      	mov	r4, r0
 800547a:	b958      	cbnz	r0, 8005494 <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 800547c:	2d0f      	cmp	r5, #15
 800547e:	d809      	bhi.n	8005494 <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8005480:	4602      	mov	r2, r0
 8005482:	4629      	mov	r1, r5
 8005484:	f04f 30ff 	mov.w	r0, #4294967295
 8005488:	f000 faee 	bl	8005a68 <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 800548c:	4b04      	ldr	r3, [pc, #16]	; (80054a0 <HAL_InitTick+0x44>)
 800548e:	4620      	mov	r0, r4
 8005490:	601d      	str	r5, [r3, #0]
 8005492:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 8005494:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 8005496:	bd38      	pop	{r3, r4, r5, pc}
 8005498:	20000000 	.word	0x20000000
 800549c:	20000218 	.word	0x20000218
 80054a0:	20000004 	.word	0x20000004

080054a4 <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 80054a4:	4a07      	ldr	r2, [pc, #28]	; (80054c4 <HAL_Init+0x20>)
{
 80054a6:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 80054a8:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 80054aa:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 80054ac:	f043 0310 	orr.w	r3, r3, #16
 80054b0:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 80054b2:	f000 fac7 	bl	8005a44 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 80054b6:	2000      	movs	r0, #0
 80054b8:	f7ff ffd0 	bl	800545c <HAL_InitTick>
  HAL_MspInit();
 80054bc:	f003 f8e0 	bl	8008680 <HAL_MspInit>
}
 80054c0:	2000      	movs	r0, #0
 80054c2:	bd08      	pop	{r3, pc}
 80054c4:	40022000 	.word	0x40022000

080054c8 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 80054c8:	4a03      	ldr	r2, [pc, #12]	; (80054d8 <HAL_IncTick+0x10>)
 80054ca:	4b04      	ldr	r3, [pc, #16]	; (80054dc <HAL_IncTick+0x14>)
 80054cc:	6811      	ldr	r1, [r2, #0]
 80054ce:	781b      	ldrb	r3, [r3, #0]
 80054d0:	440b      	add	r3, r1
 80054d2:	6013      	str	r3, [r2, #0]
 80054d4:	4770      	bx	lr
 80054d6:	bf00      	nop
 80054d8:	20000478 	.word	0x20000478
 80054dc:	20000000 	.word	0x20000000

080054e0 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80054e0:	4b01      	ldr	r3, [pc, #4]	; (80054e8 <HAL_GetTick+0x8>)
 80054e2:	6818      	ldr	r0, [r3, #0]
}
 80054e4:	4770      	bx	lr
 80054e6:	bf00      	nop
 80054e8:	20000478 	.word	0x20000478

080054ec <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80054ec:	b538      	push	{r3, r4, r5, lr}
 80054ee:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80054f0:	f7ff fff6 	bl	80054e0 <HAL_GetTick>
 80054f4:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80054f6:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80054f8:	bf1e      	ittt	ne
 80054fa:	4b04      	ldrne	r3, [pc, #16]	; (800550c <HAL_Delay+0x20>)
 80054fc:	781b      	ldrbne	r3, [r3, #0]
 80054fe:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 8005500:	f7ff ffee 	bl	80054e0 <HAL_GetTick>
 8005504:	1b40      	subs	r0, r0, r5
 8005506:	4284      	cmp	r4, r0
 8005508:	d8fa      	bhi.n	8005500 <HAL_Delay+0x14>
  {
  }
}
 800550a:	bd38      	pop	{r3, r4, r5, pc}
 800550c:	20000000 	.word	0x20000000

08005510 <HAL_ADC_ConvCpltCallback>:
 8005510:	4770      	bx	lr

08005512 <ADC_DMAConvCplt>:
  * @retval None
  */
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8005512:	6a43      	ldr	r3, [r0, #36]	; 0x24
{
 8005514:	b510      	push	{r4, lr}
 
  /* Update state machine on conversion status if not in error state */
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
 8005516:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8005518:	f012 0f50 	tst.w	r2, #80	; 0x50
 800551c:	d11b      	bne.n	8005556 <ADC_DMAConvCplt+0x44>
  {
    /* Update ADC state machine */
    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
 800551e:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8005520:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 8005524:	629a      	str	r2, [r3, #40]	; 0x28
    /* Determine whether any further conversion upcoming on group regular     */
    /* by external trigger, continuous mode or scan sequence on going.        */
    /* Note: On STM32F1 devices, in case of sequencer enabled                 */
    /*       (several ranks selected), end of conversion flag is raised       */
    /*       at the end of the sequence.                                      */
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
 8005526:	681a      	ldr	r2, [r3, #0]
 8005528:	6892      	ldr	r2, [r2, #8]
 800552a:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
 800552e:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
 8005532:	d10c      	bne.n	800554e <ADC_DMAConvCplt+0x3c>
 8005534:	68da      	ldr	r2, [r3, #12]
 8005536:	b952      	cbnz	r2, 800554e <ADC_DMAConvCplt+0x3c>
       (hadc->Init.ContinuousConvMode == DISABLE)   )
    {
      /* Set ADC state */
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);   
 8005538:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 800553a:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 800553e:	629a      	str	r2, [r3, #40]	; 0x28
      
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8005540:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8005542:	04d2      	lsls	r2, r2, #19
      {
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 8005544:	bf5e      	ittt	pl
 8005546:	6a9a      	ldrpl	r2, [r3, #40]	; 0x28
 8005548:	f042 0201 	orrpl.w	r2, r2, #1
 800554c:	629a      	strpl	r2, [r3, #40]	; 0x28
      }
    }
    
    /* Conversion complete callback */
    HAL_ADC_ConvCpltCallback(hadc); 
 800554e:	4618      	mov	r0, r3
 8005550:	f7ff ffde 	bl	8005510 <HAL_ADC_ConvCpltCallback>
 8005554:	bd10      	pop	{r4, pc}
  }
  else
  {
    /* Call DMA error callback */
    hadc->DMA_Handle->XferErrorCallback(hdma);
 8005556:	6a1b      	ldr	r3, [r3, #32]
  }
}
 8005558:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    hadc->DMA_Handle->XferErrorCallback(hdma);
 800555c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 800555e:	4718      	bx	r3

08005560 <HAL_ADC_ConvHalfCpltCallback>:
 8005560:	4770      	bx	lr

08005562 <ADC_DMAHalfConvCplt>:
  * @brief  DMA half transfer complete callback. 
  * @param  hdma: pointer to DMA handle.
  * @retval None
  */
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)   
{
 8005562:	b508      	push	{r3, lr}
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  
  /* Half conversion callback */
  HAL_ADC_ConvHalfCpltCallback(hadc); 
 8005564:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8005566:	f7ff fffb 	bl	8005560 <HAL_ADC_ConvHalfCpltCallback>
 800556a:	bd08      	pop	{r3, pc}

0800556c <HAL_ADC_ErrorCallback>:
{
 800556c:	4770      	bx	lr

0800556e <ADC_DMAError>:
  * @retval None
  */
void ADC_DMAError(DMA_HandleTypeDef *hdma)   
{
  /* Retrieve ADC handle corresponding to current DMA handle */
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 800556e:	6a40      	ldr	r0, [r0, #36]	; 0x24
{
 8005570:	b508      	push	{r3, lr}
  
  /* Set ADC state */
  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
 8005572:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005574:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8005578:	6283      	str	r3, [r0, #40]	; 0x28
  
  /* Set ADC error code to DMA error */
  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
 800557a:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
 800557c:	f043 0304 	orr.w	r3, r3, #4
 8005580:	62c3      	str	r3, [r0, #44]	; 0x2c
  
  /* Error callback */
  HAL_ADC_ErrorCallback(hadc); 
 8005582:	f7ff fff3 	bl	800556c <HAL_ADC_ErrorCallback>
 8005586:	bd08      	pop	{r3, pc}

08005588 <HAL_ADC_ConfigChannel>:
  __IO uint32_t wait_loop_index = 0U;
 8005588:	2300      	movs	r3, #0
{ 
 800558a:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 800558c:	9301      	str	r3, [sp, #4]
  __HAL_LOCK(hadc);
 800558e:	f890 3024 	ldrb.w	r3, [r0, #36]	; 0x24
 8005592:	2b01      	cmp	r3, #1
 8005594:	d074      	beq.n	8005680 <HAL_ADC_ConfigChannel+0xf8>
 8005596:	2301      	movs	r3, #1
  if (sConfig->Rank < 7U)
 8005598:	684d      	ldr	r5, [r1, #4]
  __HAL_LOCK(hadc);
 800559a:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
  if (sConfig->Rank < 7U)
 800559e:	2d06      	cmp	r5, #6
 80055a0:	6802      	ldr	r2, [r0, #0]
 80055a2:	ea4f 0385 	mov.w	r3, r5, lsl #2
 80055a6:	680c      	ldr	r4, [r1, #0]
 80055a8:	d825      	bhi.n	80055f6 <HAL_ADC_ConfigChannel+0x6e>
    MODIFY_REG(hadc->Instance->SQR3                        ,
 80055aa:	442b      	add	r3, r5
 80055ac:	251f      	movs	r5, #31
 80055ae:	6b56      	ldr	r6, [r2, #52]	; 0x34
 80055b0:	3b05      	subs	r3, #5
 80055b2:	409d      	lsls	r5, r3
 80055b4:	ea26 0505 	bic.w	r5, r6, r5
 80055b8:	fa04 f303 	lsl.w	r3, r4, r3
 80055bc:	432b      	orrs	r3, r5
 80055be:	6353      	str	r3, [r2, #52]	; 0x34
  if (sConfig->Channel >= ADC_CHANNEL_10)
 80055c0:	2c09      	cmp	r4, #9
 80055c2:	ea4f 0344 	mov.w	r3, r4, lsl #1
 80055c6:	688d      	ldr	r5, [r1, #8]
 80055c8:	d92f      	bls.n	800562a <HAL_ADC_ConfigChannel+0xa2>
    MODIFY_REG(hadc->Instance->SMPR1                             ,
 80055ca:	2607      	movs	r6, #7
 80055cc:	4423      	add	r3, r4
 80055ce:	68d1      	ldr	r1, [r2, #12]
 80055d0:	3b1e      	subs	r3, #30
 80055d2:	409e      	lsls	r6, r3
 80055d4:	ea21 0106 	bic.w	r1, r1, r6
 80055d8:	fa05 f303 	lsl.w	r3, r5, r3
 80055dc:	430b      	orrs	r3, r1
 80055de:	60d3      	str	r3, [r2, #12]
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
 80055e0:	f1a4 0310 	sub.w	r3, r4, #16
 80055e4:	2b01      	cmp	r3, #1
 80055e6:	d92b      	bls.n	8005640 <HAL_ADC_ConfigChannel+0xb8>
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 80055e8:	2300      	movs	r3, #0
  __HAL_UNLOCK(hadc);
 80055ea:	2200      	movs	r2, #0
 80055ec:	f880 2024 	strb.w	r2, [r0, #36]	; 0x24
}
 80055f0:	4618      	mov	r0, r3
 80055f2:	b002      	add	sp, #8
 80055f4:	bd70      	pop	{r4, r5, r6, pc}
  else if (sConfig->Rank < 13U)
 80055f6:	2d0c      	cmp	r5, #12
 80055f8:	d80b      	bhi.n	8005612 <HAL_ADC_ConfigChannel+0x8a>
    MODIFY_REG(hadc->Instance->SQR2                        ,
 80055fa:	442b      	add	r3, r5
 80055fc:	251f      	movs	r5, #31
 80055fe:	6b16      	ldr	r6, [r2, #48]	; 0x30
 8005600:	3b23      	subs	r3, #35	; 0x23
 8005602:	409d      	lsls	r5, r3
 8005604:	ea26 0505 	bic.w	r5, r6, r5
 8005608:	fa04 f303 	lsl.w	r3, r4, r3
 800560c:	432b      	orrs	r3, r5
 800560e:	6313      	str	r3, [r2, #48]	; 0x30
 8005610:	e7d6      	b.n	80055c0 <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SQR1                        ,
 8005612:	442b      	add	r3, r5
 8005614:	251f      	movs	r5, #31
 8005616:	6ad6      	ldr	r6, [r2, #44]	; 0x2c
 8005618:	3b41      	subs	r3, #65	; 0x41
 800561a:	409d      	lsls	r5, r3
 800561c:	ea26 0505 	bic.w	r5, r6, r5
 8005620:	fa04 f303 	lsl.w	r3, r4, r3
 8005624:	432b      	orrs	r3, r5
 8005626:	62d3      	str	r3, [r2, #44]	; 0x2c
 8005628:	e7ca      	b.n	80055c0 <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SMPR2                             ,
 800562a:	2607      	movs	r6, #7
 800562c:	6911      	ldr	r1, [r2, #16]
 800562e:	4423      	add	r3, r4
 8005630:	409e      	lsls	r6, r3
 8005632:	ea21 0106 	bic.w	r1, r1, r6
 8005636:	fa05 f303 	lsl.w	r3, r5, r3
 800563a:	430b      	orrs	r3, r1
 800563c:	6113      	str	r3, [r2, #16]
 800563e:	e7cf      	b.n	80055e0 <HAL_ADC_ConfigChannel+0x58>
    if (hadc->Instance == ADC1)
 8005640:	4b10      	ldr	r3, [pc, #64]	; (8005684 <HAL_ADC_ConfigChannel+0xfc>)
 8005642:	429a      	cmp	r2, r3
 8005644:	d116      	bne.n	8005674 <HAL_ADC_ConfigChannel+0xec>
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
 8005646:	6893      	ldr	r3, [r2, #8]
 8005648:	021b      	lsls	r3, r3, #8
 800564a:	d4cd      	bmi.n	80055e8 <HAL_ADC_ConfigChannel+0x60>
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 800564c:	6893      	ldr	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 800564e:	2c10      	cmp	r4, #16
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 8005650:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
 8005654:	6093      	str	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 8005656:	d1c7      	bne.n	80055e8 <HAL_ADC_ConfigChannel+0x60>
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
 8005658:	4b0b      	ldr	r3, [pc, #44]	; (8005688 <HAL_ADC_ConfigChannel+0x100>)
 800565a:	4a0c      	ldr	r2, [pc, #48]	; (800568c <HAL_ADC_ConfigChannel+0x104>)
 800565c:	681b      	ldr	r3, [r3, #0]
 800565e:	fbb3 f2f2 	udiv	r2, r3, r2
 8005662:	230a      	movs	r3, #10
 8005664:	4353      	muls	r3, r2
            wait_loop_index--;
 8005666:	9301      	str	r3, [sp, #4]
          while(wait_loop_index != 0U)
 8005668:	9b01      	ldr	r3, [sp, #4]
 800566a:	2b00      	cmp	r3, #0
 800566c:	d0bc      	beq.n	80055e8 <HAL_ADC_ConfigChannel+0x60>
            wait_loop_index--;
 800566e:	9b01      	ldr	r3, [sp, #4]
 8005670:	3b01      	subs	r3, #1
 8005672:	e7f8      	b.n	8005666 <HAL_ADC_ConfigChannel+0xde>
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 8005674:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005676:	f043 0320 	orr.w	r3, r3, #32
 800567a:	6283      	str	r3, [r0, #40]	; 0x28
      tmp_hal_status = HAL_ERROR;
 800567c:	2301      	movs	r3, #1
 800567e:	e7b4      	b.n	80055ea <HAL_ADC_ConfigChannel+0x62>
  __HAL_LOCK(hadc);
 8005680:	2302      	movs	r3, #2
 8005682:	e7b5      	b.n	80055f0 <HAL_ADC_ConfigChannel+0x68>
 8005684:	40012400 	.word	0x40012400
 8005688:	20000218 	.word	0x20000218
 800568c:	000f4240 	.word	0x000f4240

08005690 <ADC_Enable>:
  __IO uint32_t wait_loop_index = 0U;
 8005690:	2300      	movs	r3, #0
{
 8005692:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 8005694:	9301      	str	r3, [sp, #4]
  if (ADC_IS_ENABLE(hadc) == RESET)
 8005696:	6803      	ldr	r3, [r0, #0]
{
 8005698:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) == RESET)
 800569a:	689a      	ldr	r2, [r3, #8]
 800569c:	07d2      	lsls	r2, r2, #31
 800569e:	d502      	bpl.n	80056a6 <ADC_Enable+0x16>
  return HAL_OK;
 80056a0:	2000      	movs	r0, #0
}
 80056a2:	b002      	add	sp, #8
 80056a4:	bd70      	pop	{r4, r5, r6, pc}
    __HAL_ADC_ENABLE(hadc);
 80056a6:	689a      	ldr	r2, [r3, #8]
 80056a8:	f042 0201 	orr.w	r2, r2, #1
 80056ac:	609a      	str	r2, [r3, #8]
    wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
 80056ae:	4b12      	ldr	r3, [pc, #72]	; (80056f8 <ADC_Enable+0x68>)
 80056b0:	4a12      	ldr	r2, [pc, #72]	; (80056fc <ADC_Enable+0x6c>)
 80056b2:	681b      	ldr	r3, [r3, #0]
 80056b4:	fbb3 f3f2 	udiv	r3, r3, r2
      wait_loop_index--;
 80056b8:	9301      	str	r3, [sp, #4]
    while(wait_loop_index != 0U)
 80056ba:	9b01      	ldr	r3, [sp, #4]
 80056bc:	b9c3      	cbnz	r3, 80056f0 <ADC_Enable+0x60>
    tickstart = HAL_GetTick();
 80056be:	f7ff ff0f 	bl	80054e0 <HAL_GetTick>
 80056c2:	4606      	mov	r6, r0
    while(ADC_IS_ENABLE(hadc) == RESET)
 80056c4:	6823      	ldr	r3, [r4, #0]
 80056c6:	689d      	ldr	r5, [r3, #8]
 80056c8:	f015 0501 	ands.w	r5, r5, #1
 80056cc:	d1e8      	bne.n	80056a0 <ADC_Enable+0x10>
      if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
 80056ce:	f7ff ff07 	bl	80054e0 <HAL_GetTick>
 80056d2:	1b80      	subs	r0, r0, r6
 80056d4:	2802      	cmp	r0, #2
 80056d6:	d9f5      	bls.n	80056c4 <ADC_Enable+0x34>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 80056d8:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        __HAL_UNLOCK(hadc);
 80056da:	f884 5024 	strb.w	r5, [r4, #36]	; 0x24
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 80056de:	f043 0310 	orr.w	r3, r3, #16
 80056e2:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80056e4:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
        __HAL_UNLOCK(hadc);
 80056e6:	2001      	movs	r0, #1
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80056e8:	f043 0301 	orr.w	r3, r3, #1
 80056ec:	62e3      	str	r3, [r4, #44]	; 0x2c
 80056ee:	e7d8      	b.n	80056a2 <ADC_Enable+0x12>
      wait_loop_index--;
 80056f0:	9b01      	ldr	r3, [sp, #4]
 80056f2:	3b01      	subs	r3, #1
 80056f4:	e7e0      	b.n	80056b8 <ADC_Enable+0x28>
 80056f6:	bf00      	nop
 80056f8:	20000218 	.word	0x20000218
 80056fc:	000f4240 	.word	0x000f4240

08005700 <HAL_ADC_Start_DMA>:
{
 8005700:	e92d 41d8 	stmdb	sp!, {r3, r4, r6, r7, r8, lr}
 8005704:	4690      	mov	r8, r2
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 8005706:	4b40      	ldr	r3, [pc, #256]	; (8005808 <HAL_ADC_Start_DMA+0x108>)
 8005708:	6802      	ldr	r2, [r0, #0]
{
 800570a:	4604      	mov	r4, r0
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 800570c:	429a      	cmp	r2, r3
{
 800570e:	460f      	mov	r7, r1
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
 8005710:	d002      	beq.n	8005718 <HAL_ADC_Start_DMA+0x18>
 8005712:	493e      	ldr	r1, [pc, #248]	; (800580c <HAL_ADC_Start_DMA+0x10c>)
 8005714:	428a      	cmp	r2, r1
 8005716:	d103      	bne.n	8005720 <HAL_ADC_Start_DMA+0x20>
 8005718:	685b      	ldr	r3, [r3, #4]
 800571a:	f413 2f70 	tst.w	r3, #983040	; 0xf0000
 800571e:	d16e      	bne.n	80057fe <HAL_ADC_Start_DMA+0xfe>
    __HAL_LOCK(hadc);
 8005720:	f894 3024 	ldrb.w	r3, [r4, #36]	; 0x24
 8005724:	2b01      	cmp	r3, #1
 8005726:	d06c      	beq.n	8005802 <HAL_ADC_Start_DMA+0x102>
 8005728:	2301      	movs	r3, #1
    tmp_hal_status = ADC_Enable(hadc);
 800572a:	4620      	mov	r0, r4
    __HAL_LOCK(hadc);
 800572c:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
    tmp_hal_status = ADC_Enable(hadc);
 8005730:	f7ff ffae 	bl	8005690 <ADC_Enable>
    if (tmp_hal_status == HAL_OK)
 8005734:	4606      	mov	r6, r0
 8005736:	2800      	cmp	r0, #0
 8005738:	d15d      	bne.n	80057f6 <HAL_ADC_Start_DMA+0xf6>
      ADC_STATE_CLR_SET(hadc->State,
 800573a:	6aa0      	ldr	r0, [r4, #40]	; 0x28
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 800573c:	6821      	ldr	r1, [r4, #0]
      ADC_STATE_CLR_SET(hadc->State,
 800573e:	f420 6070 	bic.w	r0, r0, #3840	; 0xf00
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8005742:	4b32      	ldr	r3, [pc, #200]	; (800580c <HAL_ADC_Start_DMA+0x10c>)
      ADC_STATE_CLR_SET(hadc->State,
 8005744:	f020 0001 	bic.w	r0, r0, #1
 8005748:	f440 7080 	orr.w	r0, r0, #256	; 0x100
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 800574c:	4299      	cmp	r1, r3
      ADC_STATE_CLR_SET(hadc->State,
 800574e:	62a0      	str	r0, [r4, #40]	; 0x28
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 8005750:	d104      	bne.n	800575c <HAL_ADC_Start_DMA+0x5c>
 8005752:	4a2d      	ldr	r2, [pc, #180]	; (8005808 <HAL_ADC_Start_DMA+0x108>)
 8005754:	6853      	ldr	r3, [r2, #4]
 8005756:	f413 2f70 	tst.w	r3, #983040	; 0xf0000
 800575a:	d13e      	bne.n	80057da <HAL_ADC_Start_DMA+0xda>
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 800575c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800575e:	f423 1380 	bic.w	r3, r3, #1048576	; 0x100000
 8005762:	62a3      	str	r3, [r4, #40]	; 0x28
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
 8005764:	684b      	ldr	r3, [r1, #4]
 8005766:	055a      	lsls	r2, r3, #21
 8005768:	d505      	bpl.n	8005776 <HAL_ADC_Start_DMA+0x76>
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
 800576a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800576c:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8005770:	f443 5380 	orr.w	r3, r3, #4096	; 0x1000
 8005774:	62a3      	str	r3, [r4, #40]	; 0x28
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 8005776:	6aa3      	ldr	r3, [r4, #40]	; 0x28
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8005778:	6a20      	ldr	r0, [r4, #32]
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 800577a:	f413 5380 	ands.w	r3, r3, #4096	; 0x1000
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
 800577e:	bf18      	it	ne
 8005780:	6ae3      	ldrne	r3, [r4, #44]	; 0x2c
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 8005782:	463a      	mov	r2, r7
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
 8005784:	bf18      	it	ne
 8005786:	f023 0306 	bicne.w	r3, r3, #6
        ADC_CLEAR_ERRORCODE(hadc);
 800578a:	62e3      	str	r3, [r4, #44]	; 0x2c
      __HAL_UNLOCK(hadc);
 800578c:	2300      	movs	r3, #0
 800578e:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8005792:	4b1f      	ldr	r3, [pc, #124]	; (8005810 <HAL_ADC_Start_DMA+0x110>)
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 8005794:	314c      	adds	r1, #76	; 0x4c
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 8005796:	6283      	str	r3, [r0, #40]	; 0x28
      hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
 8005798:	4b1e      	ldr	r3, [pc, #120]	; (8005814 <HAL_ADC_Start_DMA+0x114>)
 800579a:	62c3      	str	r3, [r0, #44]	; 0x2c
      hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
 800579c:	4b1e      	ldr	r3, [pc, #120]	; (8005818 <HAL_ADC_Start_DMA+0x118>)
 800579e:	6303      	str	r3, [r0, #48]	; 0x30
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
 80057a0:	f06f 0302 	mvn.w	r3, #2
 80057a4:	f841 3c4c 	str.w	r3, [r1, #-76]
      SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
 80057a8:	f851 3c44 	ldr.w	r3, [r1, #-68]
 80057ac:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80057b0:	f841 3c44 	str.w	r3, [r1, #-68]
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 80057b4:	4643      	mov	r3, r8
 80057b6:	f000 f9ed 	bl	8005b94 <HAL_DMA_Start_IT>
      if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
 80057ba:	6823      	ldr	r3, [r4, #0]
 80057bc:	689a      	ldr	r2, [r3, #8]
 80057be:	f402 2260 	and.w	r2, r2, #917504	; 0xe0000
 80057c2:	f5b2 2f60 	cmp.w	r2, #917504	; 0xe0000
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
 80057c6:	689a      	ldr	r2, [r3, #8]
 80057c8:	bf0c      	ite	eq
 80057ca:	f442 02a0 	orreq.w	r2, r2, #5242880	; 0x500000
        SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
 80057ce:	f442 1280 	orrne.w	r2, r2, #1048576	; 0x100000
 80057d2:	609a      	str	r2, [r3, #8]
}
 80057d4:	4630      	mov	r0, r6
 80057d6:	e8bd 81d8 	ldmia.w	sp!, {r3, r4, r6, r7, r8, pc}
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 80057da:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 80057dc:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
 80057e0:	62a3      	str	r3, [r4, #40]	; 0x28
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
 80057e2:	6853      	ldr	r3, [r2, #4]
 80057e4:	055b      	lsls	r3, r3, #21
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
 80057e6:	bf41      	itttt	mi
 80057e8:	6aa0      	ldrmi	r0, [r4, #40]	; 0x28
 80057ea:	f420 5040 	bicmi.w	r0, r0, #12288	; 0x3000
 80057ee:	f440 5080 	orrmi.w	r0, r0, #4096	; 0x1000
 80057f2:	62a0      	strmi	r0, [r4, #40]	; 0x28
 80057f4:	e7bf      	b.n	8005776 <HAL_ADC_Start_DMA+0x76>
      __HAL_UNLOCK(hadc);
 80057f6:	2300      	movs	r3, #0
 80057f8:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
 80057fc:	e7ea      	b.n	80057d4 <HAL_ADC_Start_DMA+0xd4>
    tmp_hal_status = HAL_ERROR;
 80057fe:	2601      	movs	r6, #1
 8005800:	e7e8      	b.n	80057d4 <HAL_ADC_Start_DMA+0xd4>
    __HAL_LOCK(hadc);
 8005802:	2602      	movs	r6, #2
 8005804:	e7e6      	b.n	80057d4 <HAL_ADC_Start_DMA+0xd4>
 8005806:	bf00      	nop
 8005808:	40012400 	.word	0x40012400
 800580c:	40012800 	.word	0x40012800
 8005810:	08005513 	.word	0x08005513
 8005814:	08005563 	.word	0x08005563
 8005818:	0800556f 	.word	0x0800556f

0800581c <ADC_ConversionStop_Disable>:
{
 800581c:	b538      	push	{r3, r4, r5, lr}
  if (ADC_IS_ENABLE(hadc) != RESET)
 800581e:	6803      	ldr	r3, [r0, #0]
{
 8005820:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) != RESET)
 8005822:	689a      	ldr	r2, [r3, #8]
 8005824:	07d2      	lsls	r2, r2, #31
 8005826:	d401      	bmi.n	800582c <ADC_ConversionStop_Disable+0x10>
  return HAL_OK;
 8005828:	2000      	movs	r0, #0
 800582a:	bd38      	pop	{r3, r4, r5, pc}
    __HAL_ADC_DISABLE(hadc);
 800582c:	689a      	ldr	r2, [r3, #8]
 800582e:	f022 0201 	bic.w	r2, r2, #1
 8005832:	609a      	str	r2, [r3, #8]
    tickstart = HAL_GetTick();
 8005834:	f7ff fe54 	bl	80054e0 <HAL_GetTick>
 8005838:	4605      	mov	r5, r0
    while(ADC_IS_ENABLE(hadc) != RESET)
 800583a:	6823      	ldr	r3, [r4, #0]
 800583c:	689b      	ldr	r3, [r3, #8]
 800583e:	07db      	lsls	r3, r3, #31
 8005840:	d5f2      	bpl.n	8005828 <ADC_ConversionStop_Disable+0xc>
      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
 8005842:	f7ff fe4d 	bl	80054e0 <HAL_GetTick>
 8005846:	1b40      	subs	r0, r0, r5
 8005848:	2802      	cmp	r0, #2
 800584a:	d9f6      	bls.n	800583a <ADC_ConversionStop_Disable+0x1e>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 800584c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 800584e:	2001      	movs	r0, #1
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 8005850:	f043 0310 	orr.w	r3, r3, #16
 8005854:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005856:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 8005858:	f043 0301 	orr.w	r3, r3, #1
 800585c:	62e3      	str	r3, [r4, #44]	; 0x2c
 800585e:	bd38      	pop	{r3, r4, r5, pc}

08005860 <HAL_ADC_Init>:
{
 8005860:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  if(hadc == NULL)
 8005862:	4604      	mov	r4, r0
 8005864:	2800      	cmp	r0, #0
 8005866:	d077      	beq.n	8005958 <HAL_ADC_Init+0xf8>
  if (hadc->State == HAL_ADC_STATE_RESET)
 8005868:	6a83      	ldr	r3, [r0, #40]	; 0x28
 800586a:	b923      	cbnz	r3, 8005876 <HAL_ADC_Init+0x16>
    ADC_CLEAR_ERRORCODE(hadc);
 800586c:	62c3      	str	r3, [r0, #44]	; 0x2c
    hadc->Lock = HAL_UNLOCKED;
 800586e:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
    HAL_ADC_MspInit(hadc);
 8005872:	f002 ff27 	bl	80086c4 <HAL_ADC_MspInit>
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 8005876:	4620      	mov	r0, r4
 8005878:	f7ff ffd0 	bl	800581c <ADC_ConversionStop_Disable>
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
 800587c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800587e:	f013 0310 	ands.w	r3, r3, #16
 8005882:	d16b      	bne.n	800595c <HAL_ADC_Init+0xfc>
 8005884:	2800      	cmp	r0, #0
 8005886:	d169      	bne.n	800595c <HAL_ADC_Init+0xfc>
    ADC_STATE_CLR_SET(hadc->State,
 8005888:	6aa2      	ldr	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800588a:	4937      	ldr	r1, [pc, #220]	; (8005968 <HAL_ADC_Init+0x108>)
    ADC_STATE_CLR_SET(hadc->State,
 800588c:	f422 5288 	bic.w	r2, r2, #4352	; 0x1100
 8005890:	f022 0202 	bic.w	r2, r2, #2
 8005894:	f042 0202 	orr.w	r2, r2, #2
 8005898:	62a2      	str	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800589a:	e894 0024 	ldmia.w	r4, {r2, r5}
 800589e:	428a      	cmp	r2, r1
 80058a0:	69e1      	ldr	r1, [r4, #28]
 80058a2:	d104      	bne.n	80058ae <HAL_ADC_Init+0x4e>
 80058a4:	f5b1 2f40 	cmp.w	r1, #786432	; 0xc0000
 80058a8:	bf08      	it	eq
 80058aa:	f44f 2100 	moveq.w	r1, #524288	; 0x80000
                ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode)   );
 80058ae:	68e6      	ldr	r6, [r4, #12]
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 80058b0:	ea45 0546 	orr.w	r5, r5, r6, lsl #1
 80058b4:	4329      	orrs	r1, r5
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 80058b6:	68a5      	ldr	r5, [r4, #8]
 80058b8:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
 80058bc:	d035      	beq.n	800592a <HAL_ADC_Init+0xca>
 80058be:	2d01      	cmp	r5, #1
 80058c0:	bf08      	it	eq
 80058c2:	f44f 7380 	moveq.w	r3, #256	; 0x100
    if (hadc->Init.DiscontinuousConvMode == ENABLE)
 80058c6:	6967      	ldr	r7, [r4, #20]
 80058c8:	2f01      	cmp	r7, #1
 80058ca:	d106      	bne.n	80058da <HAL_ADC_Init+0x7a>
      if (hadc->Init.ContinuousConvMode == DISABLE)
 80058cc:	bb7e      	cbnz	r6, 800592e <HAL_ADC_Init+0xce>
        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
 80058ce:	69a6      	ldr	r6, [r4, #24]
 80058d0:	3e01      	subs	r6, #1
 80058d2:	ea43 3346 	orr.w	r3, r3, r6, lsl #13
 80058d6:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
      MODIFY_REG(hadc->Instance->CR1,
 80058da:	6856      	ldr	r6, [r2, #4]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80058dc:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
      MODIFY_REG(hadc->Instance->CR1,
 80058e0:	f426 4669 	bic.w	r6, r6, #59648	; 0xe900
 80058e4:	ea43 0306 	orr.w	r3, r3, r6
 80058e8:	6053      	str	r3, [r2, #4]
      MODIFY_REG(hadc->Instance->CR2,
 80058ea:	6896      	ldr	r6, [r2, #8]
 80058ec:	4b1f      	ldr	r3, [pc, #124]	; (800596c <HAL_ADC_Init+0x10c>)
 80058ee:	ea03 0306 	and.w	r3, r3, r6
 80058f2:	ea43 0301 	orr.w	r3, r3, r1
 80058f6:	6093      	str	r3, [r2, #8]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 80058f8:	d001      	beq.n	80058fe <HAL_ADC_Init+0x9e>
 80058fa:	2d01      	cmp	r5, #1
 80058fc:	d120      	bne.n	8005940 <HAL_ADC_Init+0xe0>
      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
 80058fe:	6923      	ldr	r3, [r4, #16]
 8005900:	3b01      	subs	r3, #1
 8005902:	051b      	lsls	r3, r3, #20
    MODIFY_REG(hadc->Instance->SQR1,
 8005904:	6ad5      	ldr	r5, [r2, #44]	; 0x2c
 8005906:	f425 0570 	bic.w	r5, r5, #15728640	; 0xf00000
 800590a:	432b      	orrs	r3, r5
 800590c:	62d3      	str	r3, [r2, #44]	; 0x2c
    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
 800590e:	6892      	ldr	r2, [r2, #8]
 8005910:	4b17      	ldr	r3, [pc, #92]	; (8005970 <HAL_ADC_Init+0x110>)
 8005912:	4013      	ands	r3, r2
 8005914:	4299      	cmp	r1, r3
 8005916:	d115      	bne.n	8005944 <HAL_ADC_Init+0xe4>
      ADC_CLEAR_ERRORCODE(hadc);
 8005918:	2300      	movs	r3, #0
 800591a:	62e3      	str	r3, [r4, #44]	; 0x2c
      ADC_STATE_CLR_SET(hadc->State,
 800591c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800591e:	f023 0303 	bic.w	r3, r3, #3
 8005922:	f043 0301 	orr.w	r3, r3, #1
 8005926:	62a3      	str	r3, [r4, #40]	; 0x28
 8005928:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 800592a:	462b      	mov	r3, r5
 800592c:	e7cb      	b.n	80058c6 <HAL_ADC_Init+0x66>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 800592e:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 8005930:	f046 0620 	orr.w	r6, r6, #32
 8005934:	62a6      	str	r6, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005936:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8005938:	f046 0601 	orr.w	r6, r6, #1
 800593c:	62e6      	str	r6, [r4, #44]	; 0x2c
 800593e:	e7cc      	b.n	80058da <HAL_ADC_Init+0x7a>
  uint32_t tmp_sqr1 = 0U;
 8005940:	2300      	movs	r3, #0
 8005942:	e7df      	b.n	8005904 <HAL_ADC_Init+0xa4>
      ADC_STATE_CLR_SET(hadc->State,
 8005944:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 8005946:	f023 0312 	bic.w	r3, r3, #18
 800594a:	f043 0310 	orr.w	r3, r3, #16
 800594e:	62a3      	str	r3, [r4, #40]	; 0x28
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 8005950:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 8005952:	f043 0301 	orr.w	r3, r3, #1
 8005956:	62e3      	str	r3, [r4, #44]	; 0x2c
    return HAL_ERROR;
 8005958:	2001      	movs	r0, #1
}
 800595a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 800595c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800595e:	f043 0310 	orr.w	r3, r3, #16
 8005962:	62a3      	str	r3, [r4, #40]	; 0x28
 8005964:	e7f8      	b.n	8005958 <HAL_ADC_Init+0xf8>
 8005966:	bf00      	nop
 8005968:	40013c00 	.word	0x40013c00
 800596c:	ffe1f7fd 	.word	0xffe1f7fd
 8005970:	ff1f0efe 	.word	0xff1f0efe

08005974 <HAL_ADCEx_Calibration_Start>:
  */
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
{
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  uint32_t tickstart;
  __IO uint32_t wait_loop_index = 0U;
 8005974:	2300      	movs	r3, #0
{
 8005976:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 8005978:	9301      	str	r3, [sp, #4]
  
  /* Check the parameters */
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));

  /* Process locked */
  __HAL_LOCK(hadc);
 800597a:	f890 3024 	ldrb.w	r3, [r0, #36]	; 0x24
{
 800597e:	4604      	mov	r4, r0
  __HAL_LOCK(hadc);
 8005980:	2b01      	cmp	r3, #1
 8005982:	d05a      	beq.n	8005a3a <HAL_ADCEx_Calibration_Start+0xc6>
 8005984:	2301      	movs	r3, #1
 8005986:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
  /* 1. Calibration prerequisite:                                             */
  /*    - ADC must be disabled for at least two ADC clock cycles in disable   */
  /*      mode before ADC enable                                              */
  /* Stop potential conversion on going, on regular and injected groups       */
  /* Disable ADC peripheral */
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 800598a:	f7ff ff47 	bl	800581c <ADC_ConversionStop_Disable>
  
  /* Check if ADC is effectively disabled */
  if (tmp_hal_status == HAL_OK)
 800598e:	4605      	mov	r5, r0
 8005990:	2800      	cmp	r0, #0
 8005992:	d132      	bne.n	80059fa <HAL_ADCEx_Calibration_Start+0x86>
  {
    /* Set ADC state */
    ADC_STATE_CLR_SET(hadc->State,
 8005994:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    
    /* Hardware prerequisite: delay before starting the calibration.          */
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles.  */
    /*  - Wait for the expected ADC clock cycles delay */
    wait_loop_index = ((SystemCoreClock
                        / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
 8005996:	2002      	movs	r0, #2
    ADC_STATE_CLR_SET(hadc->State,
 8005998:	f423 5388 	bic.w	r3, r3, #4352	; 0x1100
 800599c:	f023 0302 	bic.w	r3, r3, #2
 80059a0:	f043 0302 	orr.w	r3, r3, #2
 80059a4:	62a3      	str	r3, [r4, #40]	; 0x28
                        / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
 80059a6:	4b26      	ldr	r3, [pc, #152]	; (8005a40 <HAL_ADCEx_Calibration_Start+0xcc>)
 80059a8:	681e      	ldr	r6, [r3, #0]
 80059aa:	f000 ffaf 	bl	800690c <HAL_RCCEx_GetPeriphCLKFreq>
 80059ae:	fbb6 f0f0 	udiv	r0, r6, r0
                       * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES        );
 80059b2:	0040      	lsls	r0, r0, #1
    wait_loop_index = ((SystemCoreClock
 80059b4:	9001      	str	r0, [sp, #4]

    while(wait_loop_index != 0U)
 80059b6:	9b01      	ldr	r3, [sp, #4]
 80059b8:	bb1b      	cbnz	r3, 8005a02 <HAL_ADCEx_Calibration_Start+0x8e>
    {
      wait_loop_index--;
    }
    
    /* 2. Enable the ADC peripheral */
    ADC_Enable(hadc);
 80059ba:	4620      	mov	r0, r4
 80059bc:	f7ff fe68 	bl	8005690 <ADC_Enable>
    
    /* 3. Resets ADC calibration registers */  
    SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL);
 80059c0:	6822      	ldr	r2, [r4, #0]
 80059c2:	6893      	ldr	r3, [r2, #8]
 80059c4:	f043 0308 	orr.w	r3, r3, #8
 80059c8:	6093      	str	r3, [r2, #8]
    
    tickstart = HAL_GetTick();  
 80059ca:	f7ff fd89 	bl	80054e0 <HAL_GetTick>
 80059ce:	4606      	mov	r6, r0

    /* Wait for calibration reset completion */
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
 80059d0:	6823      	ldr	r3, [r4, #0]
 80059d2:	689a      	ldr	r2, [r3, #8]
 80059d4:	0712      	lsls	r2, r2, #28
 80059d6:	d418      	bmi.n	8005a0a <HAL_ADCEx_Calibration_Start+0x96>
      }
    }
    
    
    /* 4. Start ADC calibration */
    SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL);
 80059d8:	689a      	ldr	r2, [r3, #8]
 80059da:	f042 0204 	orr.w	r2, r2, #4
 80059de:	609a      	str	r2, [r3, #8]
    
    tickstart = HAL_GetTick();  
 80059e0:	f7ff fd7e 	bl	80054e0 <HAL_GetTick>
 80059e4:	4606      	mov	r6, r0

    /* Wait for calibration completion */
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
 80059e6:	6823      	ldr	r3, [r4, #0]
 80059e8:	689b      	ldr	r3, [r3, #8]
 80059ea:	075b      	lsls	r3, r3, #29
 80059ec:	d41f      	bmi.n	8005a2e <HAL_ADCEx_Calibration_Start+0xba>
        return HAL_ERROR;
      }
    }
    
    /* Set ADC state */
    ADC_STATE_CLR_SET(hadc->State,
 80059ee:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 80059f0:	f023 0303 	bic.w	r3, r3, #3
 80059f4:	f043 0301 	orr.w	r3, r3, #1
 80059f8:	62a3      	str	r3, [r4, #40]	; 0x28
                      HAL_ADC_STATE_BUSY_INTERNAL,
                      HAL_ADC_STATE_READY);
  }
  
  /* Process unlocked */
  __HAL_UNLOCK(hadc);
 80059fa:	2300      	movs	r3, #0
 80059fc:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
  
  /* Return function status */
  return tmp_hal_status;
 8005a00:	e012      	b.n	8005a28 <HAL_ADCEx_Calibration_Start+0xb4>
      wait_loop_index--;
 8005a02:	9b01      	ldr	r3, [sp, #4]
 8005a04:	3b01      	subs	r3, #1
 8005a06:	9301      	str	r3, [sp, #4]
 8005a08:	e7d5      	b.n	80059b6 <HAL_ADCEx_Calibration_Start+0x42>
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
 8005a0a:	f7ff fd69 	bl	80054e0 <HAL_GetTick>
 8005a0e:	1b80      	subs	r0, r0, r6
 8005a10:	280a      	cmp	r0, #10
 8005a12:	d9dd      	bls.n	80059d0 <HAL_ADCEx_Calibration_Start+0x5c>
        ADC_STATE_CLR_SET(hadc->State,
 8005a14:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        return HAL_ERROR;
 8005a16:	2501      	movs	r5, #1
        ADC_STATE_CLR_SET(hadc->State,
 8005a18:	f023 0312 	bic.w	r3, r3, #18
 8005a1c:	f043 0310 	orr.w	r3, r3, #16
 8005a20:	62a3      	str	r3, [r4, #40]	; 0x28
        __HAL_UNLOCK(hadc);
 8005a22:	2300      	movs	r3, #0
 8005a24:	f884 3024 	strb.w	r3, [r4, #36]	; 0x24
}
 8005a28:	4628      	mov	r0, r5
 8005a2a:	b002      	add	sp, #8
 8005a2c:	bd70      	pop	{r4, r5, r6, pc}
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
 8005a2e:	f7ff fd57 	bl	80054e0 <HAL_GetTick>
 8005a32:	1b80      	subs	r0, r0, r6
 8005a34:	280a      	cmp	r0, #10
 8005a36:	d9d6      	bls.n	80059e6 <HAL_ADCEx_Calibration_Start+0x72>
 8005a38:	e7ec      	b.n	8005a14 <HAL_ADCEx_Calibration_Start+0xa0>
  __HAL_LOCK(hadc);
 8005a3a:	2502      	movs	r5, #2
 8005a3c:	e7f4      	b.n	8005a28 <HAL_ADCEx_Calibration_Start+0xb4>
 8005a3e:	bf00      	nop
 8005a40:	20000218 	.word	0x20000218

08005a44 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005a44:	4a07      	ldr	r2, [pc, #28]	; (8005a64 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 8005a46:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005a48:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 8005a4a:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 8005a4e:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8005a52:	041b      	lsls	r3, r3, #16
 8005a54:	0c1b      	lsrs	r3, r3, #16
 8005a56:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 8005a5a:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 8005a5e:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 8005a60:	60d3      	str	r3, [r2, #12]
 8005a62:	4770      	bx	lr
 8005a64:	e000ed00 	.word	0xe000ed00

08005a68 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8005a68:	4b17      	ldr	r3, [pc, #92]	; (8005ac8 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 8005a6a:	b530      	push	{r4, r5, lr}
 8005a6c:	68dc      	ldr	r4, [r3, #12]
 8005a6e:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005a72:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005a76:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005a78:	2b04      	cmp	r3, #4
 8005a7a:	bf28      	it	cs
 8005a7c:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005a7e:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005a80:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005a84:	bf98      	it	ls
 8005a86:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005a88:	fa05 f303 	lsl.w	r3, r5, r3
 8005a8c:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005a90:	bf88      	it	hi
 8005a92:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005a94:	4019      	ands	r1, r3
 8005a96:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8005a98:	fa05 f404 	lsl.w	r4, r5, r4
 8005a9c:	3c01      	subs	r4, #1
 8005a9e:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 8005aa0:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005aa2:	ea42 0201 	orr.w	r2, r2, r1
 8005aa6:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005aaa:	bfaf      	iteee	ge
 8005aac:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005ab0:	4b06      	ldrlt	r3, [pc, #24]	; (8005acc <HAL_NVIC_SetPriority+0x64>)
 8005ab2:	f000 000f 	andlt.w	r0, r0, #15
 8005ab6:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005ab8:	bfa5      	ittet	ge
 8005aba:	b2d2      	uxtbge	r2, r2
 8005abc:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005ac0:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005ac2:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 8005ac6:	bd30      	pop	{r4, r5, pc}
 8005ac8:	e000ed00 	.word	0xe000ed00
 8005acc:	e000ed14 	.word	0xe000ed14

08005ad0 <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 8005ad0:	2301      	movs	r3, #1
 8005ad2:	0942      	lsrs	r2, r0, #5
 8005ad4:	f000 001f 	and.w	r0, r0, #31
 8005ad8:	fa03 f000 	lsl.w	r0, r3, r0
 8005adc:	4b01      	ldr	r3, [pc, #4]	; (8005ae4 <HAL_NVIC_EnableIRQ+0x14>)
 8005ade:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 8005ae2:	4770      	bx	lr
 8005ae4:	e000e100 	.word	0xe000e100

08005ae8 <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 8005ae8:	3801      	subs	r0, #1
 8005aea:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 8005aee:	d20a      	bcs.n	8005b06 <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005af0:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8005af2:	4b06      	ldr	r3, [pc, #24]	; (8005b0c <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005af4:	4a06      	ldr	r2, [pc, #24]	; (8005b10 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8005af6:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005af8:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8005afc:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8005afe:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8005b00:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8005b02:	601a      	str	r2, [r3, #0]
 8005b04:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 8005b06:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 8005b08:	4770      	bx	lr
 8005b0a:	bf00      	nop
 8005b0c:	e000e010 	.word	0xe000e010
 8005b10:	e000ed00 	.word	0xe000ed00

08005b14 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Channel.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 8005b14:	b510      	push	{r4, lr}
  uint32_t tmp = 0U;

  /* Check the DMA handle allocation */
  if(hdma == NULL)
 8005b16:	2800      	cmp	r0, #0
 8005b18:	d032      	beq.n	8005b80 <HAL_DMA_Init+0x6c>
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

#if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC)
  /* calculation of the channel index */
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 8005b1a:	6801      	ldr	r1, [r0, #0]
 8005b1c:	4b19      	ldr	r3, [pc, #100]	; (8005b84 <HAL_DMA_Init+0x70>)
 8005b1e:	2414      	movs	r4, #20
 8005b20:	4299      	cmp	r1, r3
 8005b22:	d825      	bhi.n	8005b70 <HAL_DMA_Init+0x5c>
  {
    /* DMA1 */
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 8005b24:	4a18      	ldr	r2, [pc, #96]	; (8005b88 <HAL_DMA_Init+0x74>)
    hdma->DmaBaseAddress = DMA1;
 8005b26:	f2a3 4307 	subw	r3, r3, #1031	; 0x407
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 8005b2a:	440a      	add	r2, r1
 8005b2c:	fbb2 f2f4 	udiv	r2, r2, r4
 8005b30:	0092      	lsls	r2, r2, #2
 8005b32:	6402      	str	r2, [r0, #64]	; 0x40
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
                      DMA_CCR_DIR));

  /* Prepare the DMA Channel configuration */
  tmp |=  hdma->Init.Direction        |
 8005b34:	6884      	ldr	r4, [r0, #8]
    hdma->DmaBaseAddress = DMA2;
 8005b36:	63c3      	str	r3, [r0, #60]	; 0x3c
  tmp |=  hdma->Init.Direction        |
 8005b38:	6843      	ldr	r3, [r0, #4]
  tmp = hdma->Instance->CCR;
 8005b3a:	680a      	ldr	r2, [r1, #0]
  tmp |=  hdma->Init.Direction        |
 8005b3c:	4323      	orrs	r3, r4
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005b3e:	68c4      	ldr	r4, [r0, #12]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8005b40:	f422 527f 	bic.w	r2, r2, #16320	; 0x3fc0
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005b44:	4323      	orrs	r3, r4
 8005b46:	6904      	ldr	r4, [r0, #16]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8005b48:	f022 0230 	bic.w	r2, r2, #48	; 0x30
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005b4c:	4323      	orrs	r3, r4
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005b4e:	6944      	ldr	r4, [r0, #20]
 8005b50:	4323      	orrs	r3, r4
 8005b52:	6984      	ldr	r4, [r0, #24]
 8005b54:	4323      	orrs	r3, r4
          hdma->Init.Mode                | hdma->Init.Priority;
 8005b56:	69c4      	ldr	r4, [r0, #28]
 8005b58:	4323      	orrs	r3, r4
  tmp |=  hdma->Init.Direction        |
 8005b5a:	4313      	orrs	r3, r2

  /* Write to DMA Channel CR register */
  hdma->Instance->CCR = tmp;
 8005b5c:	600b      	str	r3, [r1, #0]

  /* Initialise the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;

  /* Initialize the DMA state*/
  hdma->State = HAL_DMA_STATE_READY;
 8005b5e:	2201      	movs	r2, #1
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005b60:	2300      	movs	r3, #0
  hdma->State = HAL_DMA_STATE_READY;
 8005b62:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005b66:	6383      	str	r3, [r0, #56]	; 0x38
  /* Allocate lock resource and initialize it */
  hdma->Lock = HAL_UNLOCKED;
 8005b68:	f880 3020 	strb.w	r3, [r0, #32]

  return HAL_OK;
 8005b6c:	4618      	mov	r0, r3
 8005b6e:	bd10      	pop	{r4, pc}
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 8005b70:	4b06      	ldr	r3, [pc, #24]	; (8005b8c <HAL_DMA_Init+0x78>)
 8005b72:	440b      	add	r3, r1
 8005b74:	fbb3 f3f4 	udiv	r3, r3, r4
 8005b78:	009b      	lsls	r3, r3, #2
 8005b7a:	6403      	str	r3, [r0, #64]	; 0x40
    hdma->DmaBaseAddress = DMA2;
 8005b7c:	4b04      	ldr	r3, [pc, #16]	; (8005b90 <HAL_DMA_Init+0x7c>)
 8005b7e:	e7d9      	b.n	8005b34 <HAL_DMA_Init+0x20>
    return HAL_ERROR;
 8005b80:	2001      	movs	r0, #1
}
 8005b82:	bd10      	pop	{r4, pc}
 8005b84:	40020407 	.word	0x40020407
 8005b88:	bffdfff8 	.word	0xbffdfff8
 8005b8c:	bffdfbf8 	.word	0xbffdfbf8
 8005b90:	40020400 	.word	0x40020400

08005b94 <HAL_DMA_Start_IT>:
  * @param  DstAddress: The destination memory Buffer address
  * @param  DataLength: The length of data to be transferred from source to destination
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
 8005b94:	b5f0      	push	{r4, r5, r6, r7, lr}

  /* Check the parameters */
  assert_param(IS_DMA_BUFFER_SIZE(DataLength));

  /* Process locked */
  __HAL_LOCK(hdma);
 8005b96:	f890 4020 	ldrb.w	r4, [r0, #32]
 8005b9a:	2c01      	cmp	r4, #1
 8005b9c:	d035      	beq.n	8005c0a <HAL_DMA_Start_IT+0x76>
 8005b9e:	2401      	movs	r4, #1
  
  if(HAL_DMA_STATE_READY == hdma->State)
 8005ba0:	f890 5021 	ldrb.w	r5, [r0, #33]	; 0x21
  __HAL_LOCK(hdma);
 8005ba4:	f880 4020 	strb.w	r4, [r0, #32]
  if(HAL_DMA_STATE_READY == hdma->State)
 8005ba8:	42a5      	cmp	r5, r4
 8005baa:	f04f 0600 	mov.w	r6, #0
 8005bae:	f04f 0402 	mov.w	r4, #2
 8005bb2:	d128      	bne.n	8005c06 <HAL_DMA_Start_IT+0x72>
  {
    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8005bb4:	f880 4021 	strb.w	r4, [r0, #33]	; 0x21
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
    
    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 8005bb8:	6804      	ldr	r4, [r0, #0]
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005bba:	6386      	str	r6, [r0, #56]	; 0x38
    __HAL_DMA_DISABLE(hdma);
 8005bbc:	6826      	ldr	r6, [r4, #0]
  * @retval HAL status
  */
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
  /* Clear all flags */
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 8005bbe:	6c07      	ldr	r7, [r0, #64]	; 0x40
    __HAL_DMA_DISABLE(hdma);
 8005bc0:	f026 0601 	bic.w	r6, r6, #1
 8005bc4:	6026      	str	r6, [r4, #0]
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 8005bc6:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
 8005bc8:	40bd      	lsls	r5, r7
 8005bca:	6075      	str	r5, [r6, #4]

  /* Configure DMA Channel data length */
  hdma->Instance->CNDTR = DataLength;
 8005bcc:	6063      	str	r3, [r4, #4]

  /* Memory to Peripheral */
  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
 8005bce:	6843      	ldr	r3, [r0, #4]
 8005bd0:	6805      	ldr	r5, [r0, #0]
 8005bd2:	2b10      	cmp	r3, #16
    if(NULL != hdma->XferHalfCpltCallback)
 8005bd4:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
  {
    /* Configure DMA Channel destination address */
    hdma->Instance->CPAR = DstAddress;
 8005bd6:	bf0b      	itete	eq
 8005bd8:	60a2      	streq	r2, [r4, #8]
  }
  /* Peripheral to Memory */
  else
  {
    /* Configure DMA Channel source address */
    hdma->Instance->CPAR = SrcAddress;
 8005bda:	60a1      	strne	r1, [r4, #8]
    hdma->Instance->CMAR = SrcAddress;
 8005bdc:	60e1      	streq	r1, [r4, #12]

    /* Configure DMA Channel destination address */
    hdma->Instance->CMAR = DstAddress;
 8005bde:	60e2      	strne	r2, [r4, #12]
    if(NULL != hdma->XferHalfCpltCallback)
 8005be0:	b14b      	cbz	r3, 8005bf6 <HAL_DMA_Start_IT+0x62>
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005be2:	6823      	ldr	r3, [r4, #0]
 8005be4:	f043 030e 	orr.w	r3, r3, #14
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 8005be8:	6023      	str	r3, [r4, #0]
    __HAL_DMA_ENABLE(hdma);
 8005bea:	682b      	ldr	r3, [r5, #0]
  HAL_StatusTypeDef status = HAL_OK;
 8005bec:	2000      	movs	r0, #0
    __HAL_DMA_ENABLE(hdma);
 8005bee:	f043 0301 	orr.w	r3, r3, #1
 8005bf2:	602b      	str	r3, [r5, #0]
 8005bf4:	bdf0      	pop	{r4, r5, r6, r7, pc}
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 8005bf6:	6823      	ldr	r3, [r4, #0]
 8005bf8:	f023 0304 	bic.w	r3, r3, #4
 8005bfc:	6023      	str	r3, [r4, #0]
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
 8005bfe:	6823      	ldr	r3, [r4, #0]
 8005c00:	f043 030a 	orr.w	r3, r3, #10
 8005c04:	e7f0      	b.n	8005be8 <HAL_DMA_Start_IT+0x54>
    __HAL_UNLOCK(hdma); 
 8005c06:	f880 6020 	strb.w	r6, [r0, #32]
  __HAL_LOCK(hdma);
 8005c0a:	2002      	movs	r0, #2
}
 8005c0c:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08005c10 <HAL_DMA_Abort_IT>:
  if(HAL_DMA_STATE_BUSY != hdma->State)
 8005c10:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 8005c14:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 8005c16:	2b02      	cmp	r3, #2
 8005c18:	d003      	beq.n	8005c22 <HAL_DMA_Abort_IT+0x12>
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8005c1a:	2304      	movs	r3, #4
 8005c1c:	6383      	str	r3, [r0, #56]	; 0x38
    status = HAL_ERROR;
 8005c1e:	2001      	movs	r0, #1
 8005c20:	bd10      	pop	{r4, pc}
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005c22:	6803      	ldr	r3, [r0, #0]
 8005c24:	681a      	ldr	r2, [r3, #0]
 8005c26:	f022 020e 	bic.w	r2, r2, #14
 8005c2a:	601a      	str	r2, [r3, #0]
    __HAL_DMA_DISABLE(hdma);
 8005c2c:	681a      	ldr	r2, [r3, #0]
 8005c2e:	f022 0201 	bic.w	r2, r2, #1
 8005c32:	601a      	str	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8005c34:	4a29      	ldr	r2, [pc, #164]	; (8005cdc <HAL_DMA_Abort_IT+0xcc>)
 8005c36:	4293      	cmp	r3, r2
 8005c38:	d924      	bls.n	8005c84 <HAL_DMA_Abort_IT+0x74>
 8005c3a:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005c3e:	4293      	cmp	r3, r2
 8005c40:	d019      	beq.n	8005c76 <HAL_DMA_Abort_IT+0x66>
 8005c42:	3214      	adds	r2, #20
 8005c44:	4293      	cmp	r3, r2
 8005c46:	d018      	beq.n	8005c7a <HAL_DMA_Abort_IT+0x6a>
 8005c48:	3214      	adds	r2, #20
 8005c4a:	4293      	cmp	r3, r2
 8005c4c:	d017      	beq.n	8005c7e <HAL_DMA_Abort_IT+0x6e>
 8005c4e:	3214      	adds	r2, #20
 8005c50:	4293      	cmp	r3, r2
 8005c52:	bf0c      	ite	eq
 8005c54:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 8005c58:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8005c5c:	4a20      	ldr	r2, [pc, #128]	; (8005ce0 <HAL_DMA_Abort_IT+0xd0>)
 8005c5e:	6053      	str	r3, [r2, #4]
    hdma->State = HAL_DMA_STATE_READY;
 8005c60:	2301      	movs	r3, #1
    __HAL_UNLOCK(hdma);
 8005c62:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 8005c64:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    if(hdma->XferAbortCallback != NULL)
 8005c68:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 8005c6a:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 8005c6e:	b39b      	cbz	r3, 8005cd8 <HAL_DMA_Abort_IT+0xc8>
      hdma->XferAbortCallback(hdma);
 8005c70:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8005c72:	4620      	mov	r0, r4
 8005c74:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8005c76:	2301      	movs	r3, #1
 8005c78:	e7f0      	b.n	8005c5c <HAL_DMA_Abort_IT+0x4c>
 8005c7a:	2310      	movs	r3, #16
 8005c7c:	e7ee      	b.n	8005c5c <HAL_DMA_Abort_IT+0x4c>
 8005c7e:	f44f 7380 	mov.w	r3, #256	; 0x100
 8005c82:	e7eb      	b.n	8005c5c <HAL_DMA_Abort_IT+0x4c>
 8005c84:	4917      	ldr	r1, [pc, #92]	; (8005ce4 <HAL_DMA_Abort_IT+0xd4>)
 8005c86:	428b      	cmp	r3, r1
 8005c88:	d016      	beq.n	8005cb8 <HAL_DMA_Abort_IT+0xa8>
 8005c8a:	3114      	adds	r1, #20
 8005c8c:	428b      	cmp	r3, r1
 8005c8e:	d015      	beq.n	8005cbc <HAL_DMA_Abort_IT+0xac>
 8005c90:	3114      	adds	r1, #20
 8005c92:	428b      	cmp	r3, r1
 8005c94:	d014      	beq.n	8005cc0 <HAL_DMA_Abort_IT+0xb0>
 8005c96:	3114      	adds	r1, #20
 8005c98:	428b      	cmp	r3, r1
 8005c9a:	d014      	beq.n	8005cc6 <HAL_DMA_Abort_IT+0xb6>
 8005c9c:	3114      	adds	r1, #20
 8005c9e:	428b      	cmp	r3, r1
 8005ca0:	d014      	beq.n	8005ccc <HAL_DMA_Abort_IT+0xbc>
 8005ca2:	3114      	adds	r1, #20
 8005ca4:	428b      	cmp	r3, r1
 8005ca6:	d014      	beq.n	8005cd2 <HAL_DMA_Abort_IT+0xc2>
 8005ca8:	4293      	cmp	r3, r2
 8005caa:	bf14      	ite	ne
 8005cac:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8005cb0:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 8005cb4:	4a0c      	ldr	r2, [pc, #48]	; (8005ce8 <HAL_DMA_Abort_IT+0xd8>)
 8005cb6:	e7d2      	b.n	8005c5e <HAL_DMA_Abort_IT+0x4e>
 8005cb8:	2301      	movs	r3, #1
 8005cba:	e7fb      	b.n	8005cb4 <HAL_DMA_Abort_IT+0xa4>
 8005cbc:	2310      	movs	r3, #16
 8005cbe:	e7f9      	b.n	8005cb4 <HAL_DMA_Abort_IT+0xa4>
 8005cc0:	f44f 7380 	mov.w	r3, #256	; 0x100
 8005cc4:	e7f6      	b.n	8005cb4 <HAL_DMA_Abort_IT+0xa4>
 8005cc6:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 8005cca:	e7f3      	b.n	8005cb4 <HAL_DMA_Abort_IT+0xa4>
 8005ccc:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 8005cd0:	e7f0      	b.n	8005cb4 <HAL_DMA_Abort_IT+0xa4>
 8005cd2:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 8005cd6:	e7ed      	b.n	8005cb4 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 8005cd8:	4618      	mov	r0, r3
}
 8005cda:	bd10      	pop	{r4, pc}
 8005cdc:	40020080 	.word	0x40020080
 8005ce0:	40020400 	.word	0x40020400
 8005ce4:	40020008 	.word	0x40020008
 8005ce8:	40020000 	.word	0x40020000

08005cec <HAL_DMA_IRQHandler>:
{
 8005cec:	b470      	push	{r4, r5, r6}
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005cee:	2504      	movs	r5, #4
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8005cf0:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005cf2:	6c02      	ldr	r2, [r0, #64]	; 0x40
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8005cf4:	6834      	ldr	r4, [r6, #0]
  uint32_t source_it = hdma->Instance->CCR;
 8005cf6:	6803      	ldr	r3, [r0, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005cf8:	4095      	lsls	r5, r2
 8005cfa:	4225      	tst	r5, r4
  uint32_t source_it = hdma->Instance->CCR;
 8005cfc:	6819      	ldr	r1, [r3, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8005cfe:	d055      	beq.n	8005dac <HAL_DMA_IRQHandler+0xc0>
 8005d00:	074d      	lsls	r5, r1, #29
 8005d02:	d553      	bpl.n	8005dac <HAL_DMA_IRQHandler+0xc0>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005d04:	681a      	ldr	r2, [r3, #0]
 8005d06:	0696      	lsls	r6, r2, #26
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 8005d08:	bf5e      	ittt	pl
 8005d0a:	681a      	ldrpl	r2, [r3, #0]
 8005d0c:	f022 0204 	bicpl.w	r2, r2, #4
 8005d10:	601a      	strpl	r2, [r3, #0]
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8005d12:	4a60      	ldr	r2, [pc, #384]	; (8005e94 <HAL_DMA_IRQHandler+0x1a8>)
 8005d14:	4293      	cmp	r3, r2
 8005d16:	d91f      	bls.n	8005d58 <HAL_DMA_IRQHandler+0x6c>
 8005d18:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005d1c:	4293      	cmp	r3, r2
 8005d1e:	d014      	beq.n	8005d4a <HAL_DMA_IRQHandler+0x5e>
 8005d20:	3214      	adds	r2, #20
 8005d22:	4293      	cmp	r3, r2
 8005d24:	d013      	beq.n	8005d4e <HAL_DMA_IRQHandler+0x62>
 8005d26:	3214      	adds	r2, #20
 8005d28:	4293      	cmp	r3, r2
 8005d2a:	d012      	beq.n	8005d52 <HAL_DMA_IRQHandler+0x66>
 8005d2c:	3214      	adds	r2, #20
 8005d2e:	4293      	cmp	r3, r2
 8005d30:	bf0c      	ite	eq
 8005d32:	f44f 4380 	moveq.w	r3, #16384	; 0x4000
 8005d36:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 8005d3a:	4a57      	ldr	r2, [pc, #348]	; (8005e98 <HAL_DMA_IRQHandler+0x1ac>)
 8005d3c:	6053      	str	r3, [r2, #4]
    if(hdma->XferHalfCpltCallback != NULL)
 8005d3e:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
    if (hdma->XferErrorCallback != NULL)
 8005d40:	2b00      	cmp	r3, #0
 8005d42:	f000 80a5 	beq.w	8005e90 <HAL_DMA_IRQHandler+0x1a4>
}
 8005d46:	bc70      	pop	{r4, r5, r6}
      hdma->XferErrorCallback(hdma);
 8005d48:	4718      	bx	r3
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8005d4a:	2304      	movs	r3, #4
 8005d4c:	e7f5      	b.n	8005d3a <HAL_DMA_IRQHandler+0x4e>
 8005d4e:	2340      	movs	r3, #64	; 0x40
 8005d50:	e7f3      	b.n	8005d3a <HAL_DMA_IRQHandler+0x4e>
 8005d52:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005d56:	e7f0      	b.n	8005d3a <HAL_DMA_IRQHandler+0x4e>
 8005d58:	4950      	ldr	r1, [pc, #320]	; (8005e9c <HAL_DMA_IRQHandler+0x1b0>)
 8005d5a:	428b      	cmp	r3, r1
 8005d5c:	d016      	beq.n	8005d8c <HAL_DMA_IRQHandler+0xa0>
 8005d5e:	3114      	adds	r1, #20
 8005d60:	428b      	cmp	r3, r1
 8005d62:	d015      	beq.n	8005d90 <HAL_DMA_IRQHandler+0xa4>
 8005d64:	3114      	adds	r1, #20
 8005d66:	428b      	cmp	r3, r1
 8005d68:	d014      	beq.n	8005d94 <HAL_DMA_IRQHandler+0xa8>
 8005d6a:	3114      	adds	r1, #20
 8005d6c:	428b      	cmp	r3, r1
 8005d6e:	d014      	beq.n	8005d9a <HAL_DMA_IRQHandler+0xae>
 8005d70:	3114      	adds	r1, #20
 8005d72:	428b      	cmp	r3, r1
 8005d74:	d014      	beq.n	8005da0 <HAL_DMA_IRQHandler+0xb4>
 8005d76:	3114      	adds	r1, #20
 8005d78:	428b      	cmp	r3, r1
 8005d7a:	d014      	beq.n	8005da6 <HAL_DMA_IRQHandler+0xba>
 8005d7c:	4293      	cmp	r3, r2
 8005d7e:	bf14      	ite	ne
 8005d80:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 8005d84:	f04f 6380 	moveq.w	r3, #67108864	; 0x4000000
 8005d88:	4a45      	ldr	r2, [pc, #276]	; (8005ea0 <HAL_DMA_IRQHandler+0x1b4>)
 8005d8a:	e7d7      	b.n	8005d3c <HAL_DMA_IRQHandler+0x50>
 8005d8c:	2304      	movs	r3, #4
 8005d8e:	e7fb      	b.n	8005d88 <HAL_DMA_IRQHandler+0x9c>
 8005d90:	2340      	movs	r3, #64	; 0x40
 8005d92:	e7f9      	b.n	8005d88 <HAL_DMA_IRQHandler+0x9c>
 8005d94:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8005d98:	e7f6      	b.n	8005d88 <HAL_DMA_IRQHandler+0x9c>
 8005d9a:	f44f 4380 	mov.w	r3, #16384	; 0x4000
 8005d9e:	e7f3      	b.n	8005d88 <HAL_DMA_IRQHandler+0x9c>
 8005da0:	f44f 2380 	mov.w	r3, #262144	; 0x40000
 8005da4:	e7f0      	b.n	8005d88 <HAL_DMA_IRQHandler+0x9c>
 8005da6:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
 8005daa:	e7ed      	b.n	8005d88 <HAL_DMA_IRQHandler+0x9c>
  else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
 8005dac:	2502      	movs	r5, #2
 8005dae:	4095      	lsls	r5, r2
 8005db0:	4225      	tst	r5, r4
 8005db2:	d057      	beq.n	8005e64 <HAL_DMA_IRQHandler+0x178>
 8005db4:	078d      	lsls	r5, r1, #30
 8005db6:	d555      	bpl.n	8005e64 <HAL_DMA_IRQHandler+0x178>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8005db8:	681a      	ldr	r2, [r3, #0]
 8005dba:	0694      	lsls	r4, r2, #26
 8005dbc:	d406      	bmi.n	8005dcc <HAL_DMA_IRQHandler+0xe0>
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  
 8005dbe:	681a      	ldr	r2, [r3, #0]
 8005dc0:	f022 020a 	bic.w	r2, r2, #10
 8005dc4:	601a      	str	r2, [r3, #0]
      hdma->State = HAL_DMA_STATE_READY;
 8005dc6:	2201      	movs	r2, #1
 8005dc8:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8005dcc:	4a31      	ldr	r2, [pc, #196]	; (8005e94 <HAL_DMA_IRQHandler+0x1a8>)
 8005dce:	4293      	cmp	r3, r2
 8005dd0:	d91e      	bls.n	8005e10 <HAL_DMA_IRQHandler+0x124>
 8005dd2:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8005dd6:	4293      	cmp	r3, r2
 8005dd8:	d013      	beq.n	8005e02 <HAL_DMA_IRQHandler+0x116>
 8005dda:	3214      	adds	r2, #20
 8005ddc:	4293      	cmp	r3, r2
 8005dde:	d012      	beq.n	8005e06 <HAL_DMA_IRQHandler+0x11a>
 8005de0:	3214      	adds	r2, #20
 8005de2:	4293      	cmp	r3, r2
 8005de4:	d011      	beq.n	8005e0a <HAL_DMA_IRQHandler+0x11e>
 8005de6:	3214      	adds	r2, #20
 8005de8:	4293      	cmp	r3, r2
 8005dea:	bf0c      	ite	eq
 8005dec:	f44f 5300 	moveq.w	r3, #8192	; 0x2000
 8005df0:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005df4:	4a28      	ldr	r2, [pc, #160]	; (8005e98 <HAL_DMA_IRQHandler+0x1ac>)
 8005df6:	6053      	str	r3, [r2, #4]
    __HAL_UNLOCK(hdma);
 8005df8:	2300      	movs	r3, #0
 8005dfa:	f880 3020 	strb.w	r3, [r0, #32]
    if(hdma->XferCpltCallback != NULL)
 8005dfe:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8005e00:	e79e      	b.n	8005d40 <HAL_DMA_IRQHandler+0x54>
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8005e02:	2302      	movs	r3, #2
 8005e04:	e7f6      	b.n	8005df4 <HAL_DMA_IRQHandler+0x108>
 8005e06:	2320      	movs	r3, #32
 8005e08:	e7f4      	b.n	8005df4 <HAL_DMA_IRQHandler+0x108>
 8005e0a:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005e0e:	e7f1      	b.n	8005df4 <HAL_DMA_IRQHandler+0x108>
 8005e10:	4922      	ldr	r1, [pc, #136]	; (8005e9c <HAL_DMA_IRQHandler+0x1b0>)
 8005e12:	428b      	cmp	r3, r1
 8005e14:	d016      	beq.n	8005e44 <HAL_DMA_IRQHandler+0x158>
 8005e16:	3114      	adds	r1, #20
 8005e18:	428b      	cmp	r3, r1
 8005e1a:	d015      	beq.n	8005e48 <HAL_DMA_IRQHandler+0x15c>
 8005e1c:	3114      	adds	r1, #20
 8005e1e:	428b      	cmp	r3, r1
 8005e20:	d014      	beq.n	8005e4c <HAL_DMA_IRQHandler+0x160>
 8005e22:	3114      	adds	r1, #20
 8005e24:	428b      	cmp	r3, r1
 8005e26:	d014      	beq.n	8005e52 <HAL_DMA_IRQHandler+0x166>
 8005e28:	3114      	adds	r1, #20
 8005e2a:	428b      	cmp	r3, r1
 8005e2c:	d014      	beq.n	8005e58 <HAL_DMA_IRQHandler+0x16c>
 8005e2e:	3114      	adds	r1, #20
 8005e30:	428b      	cmp	r3, r1
 8005e32:	d014      	beq.n	8005e5e <HAL_DMA_IRQHandler+0x172>
 8005e34:	4293      	cmp	r3, r2
 8005e36:	bf14      	ite	ne
 8005e38:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8005e3c:	f04f 7300 	moveq.w	r3, #33554432	; 0x2000000
 8005e40:	4a17      	ldr	r2, [pc, #92]	; (8005ea0 <HAL_DMA_IRQHandler+0x1b4>)
 8005e42:	e7d8      	b.n	8005df6 <HAL_DMA_IRQHandler+0x10a>
 8005e44:	2302      	movs	r3, #2
 8005e46:	e7fb      	b.n	8005e40 <HAL_DMA_IRQHandler+0x154>
 8005e48:	2320      	movs	r3, #32
 8005e4a:	e7f9      	b.n	8005e40 <HAL_DMA_IRQHandler+0x154>
 8005e4c:	f44f 7300 	mov.w	r3, #512	; 0x200
 8005e50:	e7f6      	b.n	8005e40 <HAL_DMA_IRQHandler+0x154>
 8005e52:	f44f 5300 	mov.w	r3, #8192	; 0x2000
 8005e56:	e7f3      	b.n	8005e40 <HAL_DMA_IRQHandler+0x154>
 8005e58:	f44f 3300 	mov.w	r3, #131072	; 0x20000
 8005e5c:	e7f0      	b.n	8005e40 <HAL_DMA_IRQHandler+0x154>
 8005e5e:	f44f 1300 	mov.w	r3, #2097152	; 0x200000
 8005e62:	e7ed      	b.n	8005e40 <HAL_DMA_IRQHandler+0x154>
  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
 8005e64:	2508      	movs	r5, #8
 8005e66:	4095      	lsls	r5, r2
 8005e68:	4225      	tst	r5, r4
 8005e6a:	d011      	beq.n	8005e90 <HAL_DMA_IRQHandler+0x1a4>
 8005e6c:	0709      	lsls	r1, r1, #28
 8005e6e:	d50f      	bpl.n	8005e90 <HAL_DMA_IRQHandler+0x1a4>
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8005e70:	6819      	ldr	r1, [r3, #0]
 8005e72:	f021 010e 	bic.w	r1, r1, #14
 8005e76:	6019      	str	r1, [r3, #0]
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 8005e78:	2301      	movs	r3, #1
 8005e7a:	fa03 f202 	lsl.w	r2, r3, r2
 8005e7e:	6072      	str	r2, [r6, #4]
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
 8005e80:	6383      	str	r3, [r0, #56]	; 0x38
    hdma->State = HAL_DMA_STATE_READY;
 8005e82:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    __HAL_UNLOCK(hdma);
 8005e86:	2300      	movs	r3, #0
 8005e88:	f880 3020 	strb.w	r3, [r0, #32]
    if (hdma->XferErrorCallback != NULL)
 8005e8c:	6b03      	ldr	r3, [r0, #48]	; 0x30
 8005e8e:	e757      	b.n	8005d40 <HAL_DMA_IRQHandler+0x54>
}
 8005e90:	bc70      	pop	{r4, r5, r6}
 8005e92:	4770      	bx	lr
 8005e94:	40020080 	.word	0x40020080
 8005e98:	40020400 	.word	0x40020400
 8005e9c:	40020008 	.word	0x40020008
 8005ea0:	40020000 	.word	0x40020000

08005ea4 <FLASH_SetErrorCode>:
  uint32_t flags = 0U;
  
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
 8005ea4:	4a11      	ldr	r2, [pc, #68]	; (8005eec <FLASH_SetErrorCode+0x48>)
 8005ea6:	68d3      	ldr	r3, [r2, #12]
 8005ea8:	f013 0310 	ands.w	r3, r3, #16
 8005eac:	d005      	beq.n	8005eba <FLASH_SetErrorCode+0x16>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
 8005eae:	4910      	ldr	r1, [pc, #64]	; (8005ef0 <FLASH_SetErrorCode+0x4c>)
 8005eb0:	69cb      	ldr	r3, [r1, #28]
 8005eb2:	f043 0302 	orr.w	r3, r3, #2
 8005eb6:	61cb      	str	r3, [r1, #28]
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
    flags |= FLASH_FLAG_WRPERR;
 8005eb8:	2310      	movs	r3, #16
#endif /* FLASH_BANK2_END */
  }
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 8005eba:	68d2      	ldr	r2, [r2, #12]
 8005ebc:	0750      	lsls	r0, r2, #29
 8005ebe:	d506      	bpl.n	8005ece <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 8005ec0:	490b      	ldr	r1, [pc, #44]	; (8005ef0 <FLASH_SetErrorCode+0x4c>)
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
    flags |= FLASH_FLAG_PGERR;
 8005ec2:	f043 0304 	orr.w	r3, r3, #4
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 8005ec6:	69ca      	ldr	r2, [r1, #28]
 8005ec8:	f042 0201 	orr.w	r2, r2, #1
 8005ecc:	61ca      	str	r2, [r1, #28]
#endif /* FLASH_BANK2_END */
  }
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
 8005ece:	4a07      	ldr	r2, [pc, #28]	; (8005eec <FLASH_SetErrorCode+0x48>)
 8005ed0:	69d1      	ldr	r1, [r2, #28]
 8005ed2:	07c9      	lsls	r1, r1, #31
 8005ed4:	d508      	bpl.n	8005ee8 <FLASH_SetErrorCode+0x44>
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
 8005ed6:	4806      	ldr	r0, [pc, #24]	; (8005ef0 <FLASH_SetErrorCode+0x4c>)
 8005ed8:	69c1      	ldr	r1, [r0, #28]
 8005eda:	f041 0104 	orr.w	r1, r1, #4
 8005ede:	61c1      	str	r1, [r0, #28]
  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
 8005ee0:	69d1      	ldr	r1, [r2, #28]
 8005ee2:	f021 0101 	bic.w	r1, r1, #1
 8005ee6:	61d1      	str	r1, [r2, #28]
  }

  /* Clear FLASH error pending bits */
  __HAL_FLASH_CLEAR_FLAG(flags);
 8005ee8:	60d3      	str	r3, [r2, #12]
 8005eea:	4770      	bx	lr
 8005eec:	40022000 	.word	0x40022000
 8005ef0:	20000480 	.word	0x20000480

08005ef4 <HAL_FLASH_Unlock>:
  if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8005ef4:	4b06      	ldr	r3, [pc, #24]	; (8005f10 <HAL_FLASH_Unlock+0x1c>)
 8005ef6:	6918      	ldr	r0, [r3, #16]
 8005ef8:	f010 0080 	ands.w	r0, r0, #128	; 0x80
 8005efc:	d007      	beq.n	8005f0e <HAL_FLASH_Unlock+0x1a>
    WRITE_REG(FLASH->KEYR, FLASH_KEY1);
 8005efe:	4a05      	ldr	r2, [pc, #20]	; (8005f14 <HAL_FLASH_Unlock+0x20>)
 8005f00:	605a      	str	r2, [r3, #4]
    WRITE_REG(FLASH->KEYR, FLASH_KEY2);
 8005f02:	f102 3288 	add.w	r2, r2, #2290649224	; 0x88888888
 8005f06:	605a      	str	r2, [r3, #4]
    if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8005f08:	6918      	ldr	r0, [r3, #16]
  HAL_StatusTypeDef status = HAL_OK;
 8005f0a:	f3c0 10c0 	ubfx	r0, r0, #7, #1
}
 8005f0e:	4770      	bx	lr
 8005f10:	40022000 	.word	0x40022000
 8005f14:	45670123 	.word	0x45670123

08005f18 <HAL_FLASH_Lock>:
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8005f18:	4a03      	ldr	r2, [pc, #12]	; (8005f28 <HAL_FLASH_Lock+0x10>)
}
 8005f1a:	2000      	movs	r0, #0
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 8005f1c:	6913      	ldr	r3, [r2, #16]
 8005f1e:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8005f22:	6113      	str	r3, [r2, #16]
}
 8005f24:	4770      	bx	lr
 8005f26:	bf00      	nop
 8005f28:	40022000 	.word	0x40022000

08005f2c <FLASH_WaitForLastOperation>:
{
 8005f2c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8005f2e:	4606      	mov	r6, r0
  uint32_t tickstart = HAL_GetTick();
 8005f30:	f7ff fad6 	bl	80054e0 <HAL_GetTick>
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 8005f34:	4c11      	ldr	r4, [pc, #68]	; (8005f7c <FLASH_WaitForLastOperation+0x50>)
  uint32_t tickstart = HAL_GetTick();
 8005f36:	4607      	mov	r7, r0
 8005f38:	4625      	mov	r5, r4
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 8005f3a:	68e3      	ldr	r3, [r4, #12]
 8005f3c:	07d8      	lsls	r0, r3, #31
 8005f3e:	d412      	bmi.n	8005f66 <FLASH_WaitForLastOperation+0x3a>
  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
 8005f40:	68e3      	ldr	r3, [r4, #12]
 8005f42:	0699      	lsls	r1, r3, #26
    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
 8005f44:	bf44      	itt	mi
 8005f46:	2320      	movmi	r3, #32
 8005f48:	60e3      	strmi	r3, [r4, #12]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 8005f4a:	68eb      	ldr	r3, [r5, #12]
 8005f4c:	06da      	lsls	r2, r3, #27
 8005f4e:	d406      	bmi.n	8005f5e <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8005f50:	69eb      	ldr	r3, [r5, #28]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 8005f52:	07db      	lsls	r3, r3, #31
 8005f54:	d403      	bmi.n	8005f5e <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 8005f56:	68e8      	ldr	r0, [r5, #12]
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 8005f58:	f010 0004 	ands.w	r0, r0, #4
 8005f5c:	d002      	beq.n	8005f64 <FLASH_WaitForLastOperation+0x38>
    FLASH_SetErrorCode();
 8005f5e:	f7ff ffa1 	bl	8005ea4 <FLASH_SetErrorCode>
    return HAL_ERROR;
 8005f62:	2001      	movs	r0, #1
}
 8005f64:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if (Timeout != HAL_MAX_DELAY)
 8005f66:	1c73      	adds	r3, r6, #1
 8005f68:	d0e7      	beq.n	8005f3a <FLASH_WaitForLastOperation+0xe>
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8005f6a:	b90e      	cbnz	r6, 8005f70 <FLASH_WaitForLastOperation+0x44>
        return HAL_TIMEOUT;
 8005f6c:	2003      	movs	r0, #3
 8005f6e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 8005f70:	f7ff fab6 	bl	80054e0 <HAL_GetTick>
 8005f74:	1bc0      	subs	r0, r0, r7
 8005f76:	4286      	cmp	r6, r0
 8005f78:	d2df      	bcs.n	8005f3a <FLASH_WaitForLastOperation+0xe>
 8005f7a:	e7f7      	b.n	8005f6c <FLASH_WaitForLastOperation+0x40>
 8005f7c:	40022000 	.word	0x40022000

08005f80 <HAL_FLASH_Program>:
{
 8005f80:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  __HAL_LOCK(&pFlash);
 8005f84:	4c1f      	ldr	r4, [pc, #124]	; (8006004 <HAL_FLASH_Program+0x84>)
{
 8005f86:	4699      	mov	r9, r3
  __HAL_LOCK(&pFlash);
 8005f88:	7e23      	ldrb	r3, [r4, #24]
{
 8005f8a:	4605      	mov	r5, r0
  __HAL_LOCK(&pFlash);
 8005f8c:	2b01      	cmp	r3, #1
{
 8005f8e:	460f      	mov	r7, r1
 8005f90:	4690      	mov	r8, r2
  __HAL_LOCK(&pFlash);
 8005f92:	d033      	beq.n	8005ffc <HAL_FLASH_Program+0x7c>
 8005f94:	2301      	movs	r3, #1
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8005f96:	f24c 3050 	movw	r0, #50000	; 0xc350
  __HAL_LOCK(&pFlash);
 8005f9a:	7623      	strb	r3, [r4, #24]
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8005f9c:	f7ff ffc6 	bl	8005f2c <FLASH_WaitForLastOperation>
  if(status == HAL_OK)
 8005fa0:	bb40      	cbnz	r0, 8005ff4 <HAL_FLASH_Program+0x74>
    if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
 8005fa2:	2d01      	cmp	r5, #1
 8005fa4:	d003      	beq.n	8005fae <HAL_FLASH_Program+0x2e>
      nbiterations = 4U;
 8005fa6:	2d02      	cmp	r5, #2
 8005fa8:	bf0c      	ite	eq
 8005faa:	2502      	moveq	r5, #2
 8005fac:	2504      	movne	r5, #4
 8005fae:	2600      	movs	r6, #0
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8005fb0:	46b2      	mov	sl, r6
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8005fb2:	f8df b054 	ldr.w	fp, [pc, #84]	; 8006008 <HAL_FLASH_Program+0x88>
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 8005fb6:	0132      	lsls	r2, r6, #4
 8005fb8:	4640      	mov	r0, r8
 8005fba:	4649      	mov	r1, r9
 8005fbc:	f7fe f93c 	bl	8004238 <__aeabi_llsr>
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8005fc0:	f8c4 a01c 	str.w	sl, [r4, #28]
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8005fc4:	f8db 3010 	ldr.w	r3, [fp, #16]
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 8005fc8:	b280      	uxth	r0, r0
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8005fca:	f043 0301 	orr.w	r3, r3, #1
 8005fce:	f8cb 3010 	str.w	r3, [fp, #16]
  *(__IO uint16_t*)Address = Data;
 8005fd2:	f827 0016 	strh.w	r0, [r7, r6, lsl #1]
        status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8005fd6:	f24c 3050 	movw	r0, #50000	; 0xc350
 8005fda:	f7ff ffa7 	bl	8005f2c <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
 8005fde:	f8db 3010 	ldr.w	r3, [fp, #16]
 8005fe2:	f023 0301 	bic.w	r3, r3, #1
 8005fe6:	f8cb 3010 	str.w	r3, [fp, #16]
      if (status != HAL_OK)
 8005fea:	b918      	cbnz	r0, 8005ff4 <HAL_FLASH_Program+0x74>
 8005fec:	3601      	adds	r6, #1
    for (index = 0U; index < nbiterations; index++)
 8005fee:	b2f3      	uxtb	r3, r6
 8005ff0:	429d      	cmp	r5, r3
 8005ff2:	d8e0      	bhi.n	8005fb6 <HAL_FLASH_Program+0x36>
  __HAL_UNLOCK(&pFlash);
 8005ff4:	2300      	movs	r3, #0
 8005ff6:	7623      	strb	r3, [r4, #24]
  return status;
 8005ff8:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
  __HAL_LOCK(&pFlash);
 8005ffc:	2002      	movs	r0, #2
}
 8005ffe:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8006002:	bf00      	nop
 8006004:	20000480 	.word	0x20000480
 8006008:	40022000 	.word	0x40022000

0800600c <FLASH_MassErase.isra.0>:
{
  /* Check the parameters */
  assert_param(IS_FLASH_BANK(Banks));

  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 800600c:	2200      	movs	r2, #0
 800600e:	4b06      	ldr	r3, [pc, #24]	; (8006028 <FLASH_MassErase.isra.0+0x1c>)
 8006010:	61da      	str	r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
  /* Prevent unused argument(s) compilation warning */
  UNUSED(Banks);
#endif /* FLASH_BANK2_END */  
    /* Only bank1 will be erased*/
    SET_BIT(FLASH->CR, FLASH_CR_MER);
 8006012:	4b06      	ldr	r3, [pc, #24]	; (800602c <FLASH_MassErase.isra.0+0x20>)
 8006014:	691a      	ldr	r2, [r3, #16]
 8006016:	f042 0204 	orr.w	r2, r2, #4
 800601a:	611a      	str	r2, [r3, #16]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 800601c:	691a      	ldr	r2, [r3, #16]
 800601e:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8006022:	611a      	str	r2, [r3, #16]
 8006024:	4770      	bx	lr
 8006026:	bf00      	nop
 8006028:	20000480 	.word	0x20000480
 800602c:	40022000 	.word	0x40022000

08006030 <FLASH_PageErase>:
  * @retval None
  */
void FLASH_PageErase(uint32_t PageAddress)
{
  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8006030:	2200      	movs	r2, #0
 8006032:	4b06      	ldr	r3, [pc, #24]	; (800604c <FLASH_PageErase+0x1c>)
 8006034:	61da      	str	r2, [r3, #28]
  }
  else
  {
#endif /* FLASH_BANK2_END */
    /* Proceed to erase the page */
    SET_BIT(FLASH->CR, FLASH_CR_PER);
 8006036:	4b06      	ldr	r3, [pc, #24]	; (8006050 <FLASH_PageErase+0x20>)
 8006038:	691a      	ldr	r2, [r3, #16]
 800603a:	f042 0202 	orr.w	r2, r2, #2
 800603e:	611a      	str	r2, [r3, #16]
    WRITE_REG(FLASH->AR, PageAddress);
 8006040:	6158      	str	r0, [r3, #20]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 8006042:	691a      	ldr	r2, [r3, #16]
 8006044:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8006048:	611a      	str	r2, [r3, #16]
 800604a:	4770      	bx	lr
 800604c:	20000480 	.word	0x20000480
 8006050:	40022000 	.word	0x40022000

08006054 <HAL_FLASHEx_Erase>:
{
 8006054:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  __HAL_LOCK(&pFlash);
 8006058:	4d23      	ldr	r5, [pc, #140]	; (80060e8 <HAL_FLASHEx_Erase+0x94>)
{
 800605a:	4607      	mov	r7, r0
  __HAL_LOCK(&pFlash);
 800605c:	7e2b      	ldrb	r3, [r5, #24]
{
 800605e:	4688      	mov	r8, r1
  __HAL_LOCK(&pFlash);
 8006060:	2b01      	cmp	r3, #1
 8006062:	d03d      	beq.n	80060e0 <HAL_FLASHEx_Erase+0x8c>
 8006064:	2401      	movs	r4, #1
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 8006066:	6803      	ldr	r3, [r0, #0]
  __HAL_LOCK(&pFlash);
 8006068:	762c      	strb	r4, [r5, #24]
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 800606a:	2b02      	cmp	r3, #2
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 800606c:	f24c 3050 	movw	r0, #50000	; 0xc350
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 8006070:	d113      	bne.n	800609a <HAL_FLASHEx_Erase+0x46>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 8006072:	f7ff ff5b 	bl	8005f2c <FLASH_WaitForLastOperation>
 8006076:	b120      	cbz	r0, 8006082 <HAL_FLASHEx_Erase+0x2e>
  HAL_StatusTypeDef status = HAL_ERROR;
 8006078:	2001      	movs	r0, #1
  __HAL_UNLOCK(&pFlash);
 800607a:	2300      	movs	r3, #0
 800607c:	762b      	strb	r3, [r5, #24]
  return status;
 800607e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        FLASH_MassErase(FLASH_BANK_1);
 8006082:	f7ff ffc3 	bl	800600c <FLASH_MassErase.isra.0>
        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 8006086:	f24c 3050 	movw	r0, #50000	; 0xc350
 800608a:	f7ff ff4f 	bl	8005f2c <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
 800608e:	4a17      	ldr	r2, [pc, #92]	; (80060ec <HAL_FLASHEx_Erase+0x98>)
 8006090:	6913      	ldr	r3, [r2, #16]
 8006092:	f023 0304 	bic.w	r3, r3, #4
 8006096:	6113      	str	r3, [r2, #16]
 8006098:	e7ef      	b.n	800607a <HAL_FLASHEx_Erase+0x26>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 800609a:	f7ff ff47 	bl	8005f2c <FLASH_WaitForLastOperation>
 800609e:	2800      	cmp	r0, #0
 80060a0:	d1ea      	bne.n	8006078 <HAL_FLASHEx_Erase+0x24>
        *PageError = 0xFFFFFFFFU;
 80060a2:	f04f 33ff 	mov.w	r3, #4294967295
 80060a6:	f8c8 3000 	str.w	r3, [r8]
  HAL_StatusTypeDef status = HAL_ERROR;
 80060aa:	4620      	mov	r0, r4
        for(address = pEraseInit->PageAddress;
 80060ac:	68be      	ldr	r6, [r7, #8]
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 80060ae:	4c0f      	ldr	r4, [pc, #60]	; (80060ec <HAL_FLASHEx_Erase+0x98>)
            address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
 80060b0:	68fa      	ldr	r2, [r7, #12]
 80060b2:	68bb      	ldr	r3, [r7, #8]
 80060b4:	eb03 23c2 	add.w	r3, r3, r2, lsl #11
        for(address = pEraseInit->PageAddress;
 80060b8:	429e      	cmp	r6, r3
 80060ba:	d2de      	bcs.n	800607a <HAL_FLASHEx_Erase+0x26>
          FLASH_PageErase(address);
 80060bc:	4630      	mov	r0, r6
 80060be:	f7ff ffb7 	bl	8006030 <FLASH_PageErase>
          status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 80060c2:	f24c 3050 	movw	r0, #50000	; 0xc350
 80060c6:	f7ff ff31 	bl	8005f2c <FLASH_WaitForLastOperation>
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 80060ca:	6923      	ldr	r3, [r4, #16]
 80060cc:	f023 0302 	bic.w	r3, r3, #2
 80060d0:	6123      	str	r3, [r4, #16]
          if (status != HAL_OK)
 80060d2:	b110      	cbz	r0, 80060da <HAL_FLASHEx_Erase+0x86>
            *PageError = address;
 80060d4:	f8c8 6000 	str.w	r6, [r8]
            break;
 80060d8:	e7cf      	b.n	800607a <HAL_FLASHEx_Erase+0x26>
            address += FLASH_PAGE_SIZE)
 80060da:	f506 6600 	add.w	r6, r6, #2048	; 0x800
 80060de:	e7e7      	b.n	80060b0 <HAL_FLASHEx_Erase+0x5c>
  __HAL_LOCK(&pFlash);
 80060e0:	2002      	movs	r0, #2
}
 80060e2:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80060e6:	bf00      	nop
 80060e8:	20000480 	.word	0x20000480
 80060ec:	40022000 	.word	0x40022000

080060f0 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 80060f0:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 80060f4:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 80060f6:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 80060f8:	4f6c      	ldr	r7, [pc, #432]	; (80062ac <HAL_GPIO_Init+0x1bc>)
 80060fa:	4b6d      	ldr	r3, [pc, #436]	; (80062b0 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80060fc:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 80062b8 <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 8006100:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 80062bc <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 8006104:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8006108:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 800610a:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 800610e:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 8006112:	45a0      	cmp	r8, r4
 8006114:	f040 8085 	bne.w	8006222 <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 8006118:	684d      	ldr	r5, [r1, #4]
 800611a:	2d12      	cmp	r5, #18
 800611c:	f000 80b7 	beq.w	800628e <HAL_GPIO_Init+0x19e>
 8006120:	f200 808d 	bhi.w	800623e <HAL_GPIO_Init+0x14e>
 8006124:	2d02      	cmp	r5, #2
 8006126:	f000 80af 	beq.w	8006288 <HAL_GPIO_Init+0x198>
 800612a:	f200 8081 	bhi.w	8006230 <HAL_GPIO_Init+0x140>
 800612e:	2d00      	cmp	r5, #0
 8006130:	f000 8091 	beq.w	8006256 <HAL_GPIO_Init+0x166>
 8006134:	2d01      	cmp	r5, #1
 8006136:	f000 80a5 	beq.w	8006284 <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800613a:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 800613e:	2cff      	cmp	r4, #255	; 0xff
 8006140:	bf93      	iteet	ls
 8006142:	4682      	movls	sl, r0
 8006144:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 8006148:	3d08      	subhi	r5, #8
 800614a:	f8d0 b000 	ldrls.w	fp, [r0]
 800614e:	bf92      	itee	ls
 8006150:	00b5      	lslls	r5, r6, #2
 8006152:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 8006156:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8006158:	fa09 f805 	lsl.w	r8, r9, r5
 800615c:	ea2b 0808 	bic.w	r8, fp, r8
 8006160:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8006164:	bf88      	it	hi
 8006166:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 800616a:	ea48 0505 	orr.w	r5, r8, r5
 800616e:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 8006172:	f8d1 a004 	ldr.w	sl, [r1, #4]
 8006176:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 800617a:	d052      	beq.n	8006222 <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 800617c:	69bd      	ldr	r5, [r7, #24]
 800617e:	f026 0803 	bic.w	r8, r6, #3
 8006182:	f045 0501 	orr.w	r5, r5, #1
 8006186:	61bd      	str	r5, [r7, #24]
 8006188:	69bd      	ldr	r5, [r7, #24]
 800618a:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 800618e:	f005 0501 	and.w	r5, r5, #1
 8006192:	9501      	str	r5, [sp, #4]
 8006194:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8006198:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 800619c:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 800619e:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 80061a2:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80061a6:	fa09 f90b 	lsl.w	r9, r9, fp
 80061aa:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80061ae:	4d41      	ldr	r5, [pc, #260]	; (80062b4 <HAL_GPIO_Init+0x1c4>)
 80061b0:	42a8      	cmp	r0, r5
 80061b2:	d071      	beq.n	8006298 <HAL_GPIO_Init+0x1a8>
 80061b4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80061b8:	42a8      	cmp	r0, r5
 80061ba:	d06f      	beq.n	800629c <HAL_GPIO_Init+0x1ac>
 80061bc:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80061c0:	42a8      	cmp	r0, r5
 80061c2:	d06d      	beq.n	80062a0 <HAL_GPIO_Init+0x1b0>
 80061c4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80061c8:	42a8      	cmp	r0, r5
 80061ca:	d06b      	beq.n	80062a4 <HAL_GPIO_Init+0x1b4>
 80061cc:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80061d0:	42a8      	cmp	r0, r5
 80061d2:	d069      	beq.n	80062a8 <HAL_GPIO_Init+0x1b8>
 80061d4:	4570      	cmp	r0, lr
 80061d6:	bf0c      	ite	eq
 80061d8:	2505      	moveq	r5, #5
 80061da:	2506      	movne	r5, #6
 80061dc:	fa05 f50b 	lsl.w	r5, r5, fp
 80061e0:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 80061e4:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 80061e8:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 80061ea:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 80061ee:	bf14      	ite	ne
 80061f0:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 80061f2:	43a5      	biceq	r5, r4
 80061f4:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 80061f6:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 80061f8:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 80061fc:	bf14      	ite	ne
 80061fe:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 8006200:	43a5      	biceq	r5, r4
 8006202:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 8006204:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 8006206:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 800620a:	bf14      	ite	ne
 800620c:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 800620e:	43a5      	biceq	r5, r4
 8006210:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 8006212:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 8006214:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 8006218:	bf14      	ite	ne
 800621a:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 800621c:	ea25 0404 	biceq.w	r4, r5, r4
 8006220:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 8006222:	3601      	adds	r6, #1
 8006224:	2e10      	cmp	r6, #16
 8006226:	f47f af6d 	bne.w	8006104 <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 800622a:	b003      	add	sp, #12
 800622c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 8006230:	2d03      	cmp	r5, #3
 8006232:	d025      	beq.n	8006280 <HAL_GPIO_Init+0x190>
 8006234:	2d11      	cmp	r5, #17
 8006236:	d180      	bne.n	800613a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 8006238:	68ca      	ldr	r2, [r1, #12]
 800623a:	3204      	adds	r2, #4
          break;
 800623c:	e77d      	b.n	800613a <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 800623e:	4565      	cmp	r5, ip
 8006240:	d009      	beq.n	8006256 <HAL_GPIO_Init+0x166>
 8006242:	d812      	bhi.n	800626a <HAL_GPIO_Init+0x17a>
 8006244:	f8df 9078 	ldr.w	r9, [pc, #120]	; 80062c0 <HAL_GPIO_Init+0x1d0>
 8006248:	454d      	cmp	r5, r9
 800624a:	d004      	beq.n	8006256 <HAL_GPIO_Init+0x166>
 800624c:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8006250:	454d      	cmp	r5, r9
 8006252:	f47f af72 	bne.w	800613a <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 8006256:	688a      	ldr	r2, [r1, #8]
 8006258:	b1e2      	cbz	r2, 8006294 <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 800625a:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 800625c:	bf0c      	ite	eq
 800625e:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 8006262:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 8006266:	2208      	movs	r2, #8
 8006268:	e767      	b.n	800613a <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 800626a:	f8df 9058 	ldr.w	r9, [pc, #88]	; 80062c4 <HAL_GPIO_Init+0x1d4>
 800626e:	454d      	cmp	r5, r9
 8006270:	d0f1      	beq.n	8006256 <HAL_GPIO_Init+0x166>
 8006272:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8006276:	454d      	cmp	r5, r9
 8006278:	d0ed      	beq.n	8006256 <HAL_GPIO_Init+0x166>
 800627a:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 800627e:	e7e7      	b.n	8006250 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8006280:	2200      	movs	r2, #0
 8006282:	e75a      	b.n	800613a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 8006284:	68ca      	ldr	r2, [r1, #12]
          break;
 8006286:	e758      	b.n	800613a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 8006288:	68ca      	ldr	r2, [r1, #12]
 800628a:	3208      	adds	r2, #8
          break;
 800628c:	e755      	b.n	800613a <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 800628e:	68ca      	ldr	r2, [r1, #12]
 8006290:	320c      	adds	r2, #12
          break;
 8006292:	e752      	b.n	800613a <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 8006294:	2204      	movs	r2, #4
 8006296:	e750      	b.n	800613a <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8006298:	2500      	movs	r5, #0
 800629a:	e79f      	b.n	80061dc <HAL_GPIO_Init+0xec>
 800629c:	2501      	movs	r5, #1
 800629e:	e79d      	b.n	80061dc <HAL_GPIO_Init+0xec>
 80062a0:	2502      	movs	r5, #2
 80062a2:	e79b      	b.n	80061dc <HAL_GPIO_Init+0xec>
 80062a4:	2503      	movs	r5, #3
 80062a6:	e799      	b.n	80061dc <HAL_GPIO_Init+0xec>
 80062a8:	2504      	movs	r5, #4
 80062aa:	e797      	b.n	80061dc <HAL_GPIO_Init+0xec>
 80062ac:	40021000 	.word	0x40021000
 80062b0:	40010400 	.word	0x40010400
 80062b4:	40010800 	.word	0x40010800
 80062b8:	40011c00 	.word	0x40011c00
 80062bc:	10210000 	.word	0x10210000
 80062c0:	10110000 	.word	0x10110000
 80062c4:	10310000 	.word	0x10310000

080062c8 <HAL_GPIO_ReadPin>:
  GPIO_PinState bitstatus;

  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
 80062c8:	6883      	ldr	r3, [r0, #8]
 80062ca:	4219      	tst	r1, r3
  else
  {
    bitstatus = GPIO_PIN_RESET;
  }
  return bitstatus;
}
 80062cc:	bf14      	ite	ne
 80062ce:	2001      	movne	r0, #1
 80062d0:	2000      	moveq	r0, #0
 80062d2:	4770      	bx	lr

080062d4 <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 80062d4:	b10a      	cbz	r2, 80062da <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 80062d6:	6101      	str	r1, [r0, #16]
 80062d8:	4770      	bx	lr
 80062da:	0409      	lsls	r1, r1, #16
 80062dc:	e7fb      	b.n	80062d6 <HAL_GPIO_WritePin+0x2>

080062de <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 80062de:	68c3      	ldr	r3, [r0, #12]
 80062e0:	4059      	eors	r1, r3
 80062e2:	60c1      	str	r1, [r0, #12]
 80062e4:	4770      	bx	lr
	...

080062e8 <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80062e8:	6803      	ldr	r3, [r0, #0]
{
 80062ea:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80062ee:	07db      	lsls	r3, r3, #31
{
 80062f0:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 80062f2:	d410      	bmi.n	8006316 <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 80062f4:	682b      	ldr	r3, [r5, #0]
 80062f6:	079f      	lsls	r7, r3, #30
 80062f8:	d45e      	bmi.n	80063b8 <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 80062fa:	682b      	ldr	r3, [r5, #0]
 80062fc:	0719      	lsls	r1, r3, #28
 80062fe:	f100 8095 	bmi.w	800642c <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8006302:	682b      	ldr	r3, [r5, #0]
 8006304:	075a      	lsls	r2, r3, #29
 8006306:	f100 80bf 	bmi.w	8006488 <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 800630a:	69ea      	ldr	r2, [r5, #28]
 800630c:	2a00      	cmp	r2, #0
 800630e:	f040 812d 	bne.w	800656c <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 8006312:	2000      	movs	r0, #0
 8006314:	e014      	b.n	8006340 <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 8006316:	4c90      	ldr	r4, [pc, #576]	; (8006558 <HAL_RCC_OscConfig+0x270>)
 8006318:	6863      	ldr	r3, [r4, #4]
 800631a:	f003 030c 	and.w	r3, r3, #12
 800631e:	2b04      	cmp	r3, #4
 8006320:	d007      	beq.n	8006332 <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 8006322:	6863      	ldr	r3, [r4, #4]
 8006324:	f003 030c 	and.w	r3, r3, #12
 8006328:	2b08      	cmp	r3, #8
 800632a:	d10c      	bne.n	8006346 <HAL_RCC_OscConfig+0x5e>
 800632c:	6863      	ldr	r3, [r4, #4]
 800632e:	03de      	lsls	r6, r3, #15
 8006330:	d509      	bpl.n	8006346 <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8006332:	6823      	ldr	r3, [r4, #0]
 8006334:	039c      	lsls	r4, r3, #14
 8006336:	d5dd      	bpl.n	80062f4 <HAL_RCC_OscConfig+0xc>
 8006338:	686b      	ldr	r3, [r5, #4]
 800633a:	2b00      	cmp	r3, #0
 800633c:	d1da      	bne.n	80062f4 <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 800633e:	2001      	movs	r0, #1
}
 8006340:	b002      	add	sp, #8
 8006342:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8006346:	686b      	ldr	r3, [r5, #4]
 8006348:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 800634c:	d110      	bne.n	8006370 <HAL_RCC_OscConfig+0x88>
 800634e:	6823      	ldr	r3, [r4, #0]
 8006350:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8006354:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8006356:	f7ff f8c3 	bl	80054e0 <HAL_GetTick>
 800635a:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 800635c:	6823      	ldr	r3, [r4, #0]
 800635e:	0398      	lsls	r0, r3, #14
 8006360:	d4c8      	bmi.n	80062f4 <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8006362:	f7ff f8bd 	bl	80054e0 <HAL_GetTick>
 8006366:	1b80      	subs	r0, r0, r6
 8006368:	2864      	cmp	r0, #100	; 0x64
 800636a:	d9f7      	bls.n	800635c <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 800636c:	2003      	movs	r0, #3
 800636e:	e7e7      	b.n	8006340 <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8006370:	b99b      	cbnz	r3, 800639a <HAL_RCC_OscConfig+0xb2>
 8006372:	6823      	ldr	r3, [r4, #0]
 8006374:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8006378:	6023      	str	r3, [r4, #0]
 800637a:	6823      	ldr	r3, [r4, #0]
 800637c:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8006380:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8006382:	f7ff f8ad 	bl	80054e0 <HAL_GetTick>
 8006386:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8006388:	6823      	ldr	r3, [r4, #0]
 800638a:	0399      	lsls	r1, r3, #14
 800638c:	d5b2      	bpl.n	80062f4 <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 800638e:	f7ff f8a7 	bl	80054e0 <HAL_GetTick>
 8006392:	1b80      	subs	r0, r0, r6
 8006394:	2864      	cmp	r0, #100	; 0x64
 8006396:	d9f7      	bls.n	8006388 <HAL_RCC_OscConfig+0xa0>
 8006398:	e7e8      	b.n	800636c <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800639a:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 800639e:	6823      	ldr	r3, [r4, #0]
 80063a0:	d103      	bne.n	80063aa <HAL_RCC_OscConfig+0xc2>
 80063a2:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 80063a6:	6023      	str	r3, [r4, #0]
 80063a8:	e7d1      	b.n	800634e <HAL_RCC_OscConfig+0x66>
 80063aa:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 80063ae:	6023      	str	r3, [r4, #0]
 80063b0:	6823      	ldr	r3, [r4, #0]
 80063b2:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 80063b6:	e7cd      	b.n	8006354 <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 80063b8:	4c67      	ldr	r4, [pc, #412]	; (8006558 <HAL_RCC_OscConfig+0x270>)
 80063ba:	6863      	ldr	r3, [r4, #4]
 80063bc:	f013 0f0c 	tst.w	r3, #12
 80063c0:	d007      	beq.n	80063d2 <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 80063c2:	6863      	ldr	r3, [r4, #4]
 80063c4:	f003 030c 	and.w	r3, r3, #12
 80063c8:	2b08      	cmp	r3, #8
 80063ca:	d110      	bne.n	80063ee <HAL_RCC_OscConfig+0x106>
 80063cc:	6863      	ldr	r3, [r4, #4]
 80063ce:	03da      	lsls	r2, r3, #15
 80063d0:	d40d      	bmi.n	80063ee <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 80063d2:	6823      	ldr	r3, [r4, #0]
 80063d4:	079b      	lsls	r3, r3, #30
 80063d6:	d502      	bpl.n	80063de <HAL_RCC_OscConfig+0xf6>
 80063d8:	692b      	ldr	r3, [r5, #16]
 80063da:	2b01      	cmp	r3, #1
 80063dc:	d1af      	bne.n	800633e <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80063de:	6823      	ldr	r3, [r4, #0]
 80063e0:	696a      	ldr	r2, [r5, #20]
 80063e2:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 80063e6:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 80063ea:	6023      	str	r3, [r4, #0]
 80063ec:	e785      	b.n	80062fa <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 80063ee:	692a      	ldr	r2, [r5, #16]
 80063f0:	4b5a      	ldr	r3, [pc, #360]	; (800655c <HAL_RCC_OscConfig+0x274>)
 80063f2:	b16a      	cbz	r2, 8006410 <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 80063f4:	2201      	movs	r2, #1
 80063f6:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 80063f8:	f7ff f872 	bl	80054e0 <HAL_GetTick>
 80063fc:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80063fe:	6823      	ldr	r3, [r4, #0]
 8006400:	079f      	lsls	r7, r3, #30
 8006402:	d4ec      	bmi.n	80063de <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8006404:	f7ff f86c 	bl	80054e0 <HAL_GetTick>
 8006408:	1b80      	subs	r0, r0, r6
 800640a:	2802      	cmp	r0, #2
 800640c:	d9f7      	bls.n	80063fe <HAL_RCC_OscConfig+0x116>
 800640e:	e7ad      	b.n	800636c <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8006410:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8006412:	f7ff f865 	bl	80054e0 <HAL_GetTick>
 8006416:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8006418:	6823      	ldr	r3, [r4, #0]
 800641a:	0798      	lsls	r0, r3, #30
 800641c:	f57f af6d 	bpl.w	80062fa <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8006420:	f7ff f85e 	bl	80054e0 <HAL_GetTick>
 8006424:	1b80      	subs	r0, r0, r6
 8006426:	2802      	cmp	r0, #2
 8006428:	d9f6      	bls.n	8006418 <HAL_RCC_OscConfig+0x130>
 800642a:	e79f      	b.n	800636c <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 800642c:	69aa      	ldr	r2, [r5, #24]
 800642e:	4c4a      	ldr	r4, [pc, #296]	; (8006558 <HAL_RCC_OscConfig+0x270>)
 8006430:	4b4b      	ldr	r3, [pc, #300]	; (8006560 <HAL_RCC_OscConfig+0x278>)
 8006432:	b1da      	cbz	r2, 800646c <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 8006434:	2201      	movs	r2, #1
 8006436:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8006438:	f7ff f852 	bl	80054e0 <HAL_GetTick>
 800643c:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 800643e:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8006440:	079b      	lsls	r3, r3, #30
 8006442:	d50d      	bpl.n	8006460 <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 8006444:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 8006448:	4b46      	ldr	r3, [pc, #280]	; (8006564 <HAL_RCC_OscConfig+0x27c>)
 800644a:	681b      	ldr	r3, [r3, #0]
 800644c:	fbb3 f3f2 	udiv	r3, r3, r2
 8006450:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 8006452:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 8006454:	9b01      	ldr	r3, [sp, #4]
 8006456:	1e5a      	subs	r2, r3, #1
 8006458:	9201      	str	r2, [sp, #4]
 800645a:	2b00      	cmp	r3, #0
 800645c:	d1f9      	bne.n	8006452 <HAL_RCC_OscConfig+0x16a>
 800645e:	e750      	b.n	8006302 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8006460:	f7ff f83e 	bl	80054e0 <HAL_GetTick>
 8006464:	1b80      	subs	r0, r0, r6
 8006466:	2802      	cmp	r0, #2
 8006468:	d9e9      	bls.n	800643e <HAL_RCC_OscConfig+0x156>
 800646a:	e77f      	b.n	800636c <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 800646c:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 800646e:	f7ff f837 	bl	80054e0 <HAL_GetTick>
 8006472:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8006474:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8006476:	079f      	lsls	r7, r3, #30
 8006478:	f57f af43 	bpl.w	8006302 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 800647c:	f7ff f830 	bl	80054e0 <HAL_GetTick>
 8006480:	1b80      	subs	r0, r0, r6
 8006482:	2802      	cmp	r0, #2
 8006484:	d9f6      	bls.n	8006474 <HAL_RCC_OscConfig+0x18c>
 8006486:	e771      	b.n	800636c <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8006488:	4c33      	ldr	r4, [pc, #204]	; (8006558 <HAL_RCC_OscConfig+0x270>)
 800648a:	69e3      	ldr	r3, [r4, #28]
 800648c:	00d8      	lsls	r0, r3, #3
 800648e:	d424      	bmi.n	80064da <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 8006490:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 8006492:	69e3      	ldr	r3, [r4, #28]
 8006494:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8006498:	61e3      	str	r3, [r4, #28]
 800649a:	69e3      	ldr	r3, [r4, #28]
 800649c:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80064a0:	9300      	str	r3, [sp, #0]
 80064a2:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80064a4:	4e30      	ldr	r6, [pc, #192]	; (8006568 <HAL_RCC_OscConfig+0x280>)
 80064a6:	6833      	ldr	r3, [r6, #0]
 80064a8:	05d9      	lsls	r1, r3, #23
 80064aa:	d518      	bpl.n	80064de <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 80064ac:	68eb      	ldr	r3, [r5, #12]
 80064ae:	2b01      	cmp	r3, #1
 80064b0:	d126      	bne.n	8006500 <HAL_RCC_OscConfig+0x218>
 80064b2:	6a23      	ldr	r3, [r4, #32]
 80064b4:	f043 0301 	orr.w	r3, r3, #1
 80064b8:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 80064ba:	f7ff f811 	bl	80054e0 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80064be:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 80064c2:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80064c4:	6a23      	ldr	r3, [r4, #32]
 80064c6:	079b      	lsls	r3, r3, #30
 80064c8:	d53f      	bpl.n	800654a <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 80064ca:	2f00      	cmp	r7, #0
 80064cc:	f43f af1d 	beq.w	800630a <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 80064d0:	69e3      	ldr	r3, [r4, #28]
 80064d2:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 80064d6:	61e3      	str	r3, [r4, #28]
 80064d8:	e717      	b.n	800630a <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 80064da:	2700      	movs	r7, #0
 80064dc:	e7e2      	b.n	80064a4 <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 80064de:	6833      	ldr	r3, [r6, #0]
 80064e0:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80064e4:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 80064e6:	f7fe fffb 	bl	80054e0 <HAL_GetTick>
 80064ea:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80064ec:	6833      	ldr	r3, [r6, #0]
 80064ee:	05da      	lsls	r2, r3, #23
 80064f0:	d4dc      	bmi.n	80064ac <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 80064f2:	f7fe fff5 	bl	80054e0 <HAL_GetTick>
 80064f6:	eba0 0008 	sub.w	r0, r0, r8
 80064fa:	2864      	cmp	r0, #100	; 0x64
 80064fc:	d9f6      	bls.n	80064ec <HAL_RCC_OscConfig+0x204>
 80064fe:	e735      	b.n	800636c <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8006500:	b9ab      	cbnz	r3, 800652e <HAL_RCC_OscConfig+0x246>
 8006502:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8006504:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8006508:	f023 0301 	bic.w	r3, r3, #1
 800650c:	6223      	str	r3, [r4, #32]
 800650e:	6a23      	ldr	r3, [r4, #32]
 8006510:	f023 0304 	bic.w	r3, r3, #4
 8006514:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8006516:	f7fe ffe3 	bl	80054e0 <HAL_GetTick>
 800651a:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 800651c:	6a23      	ldr	r3, [r4, #32]
 800651e:	0798      	lsls	r0, r3, #30
 8006520:	d5d3      	bpl.n	80064ca <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8006522:	f7fe ffdd 	bl	80054e0 <HAL_GetTick>
 8006526:	1b80      	subs	r0, r0, r6
 8006528:	4540      	cmp	r0, r8
 800652a:	d9f7      	bls.n	800651c <HAL_RCC_OscConfig+0x234>
 800652c:	e71e      	b.n	800636c <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800652e:	2b05      	cmp	r3, #5
 8006530:	6a23      	ldr	r3, [r4, #32]
 8006532:	d103      	bne.n	800653c <HAL_RCC_OscConfig+0x254>
 8006534:	f043 0304 	orr.w	r3, r3, #4
 8006538:	6223      	str	r3, [r4, #32]
 800653a:	e7ba      	b.n	80064b2 <HAL_RCC_OscConfig+0x1ca>
 800653c:	f023 0301 	bic.w	r3, r3, #1
 8006540:	6223      	str	r3, [r4, #32]
 8006542:	6a23      	ldr	r3, [r4, #32]
 8006544:	f023 0304 	bic.w	r3, r3, #4
 8006548:	e7b6      	b.n	80064b8 <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 800654a:	f7fe ffc9 	bl	80054e0 <HAL_GetTick>
 800654e:	eba0 0008 	sub.w	r0, r0, r8
 8006552:	42b0      	cmp	r0, r6
 8006554:	d9b6      	bls.n	80064c4 <HAL_RCC_OscConfig+0x1dc>
 8006556:	e709      	b.n	800636c <HAL_RCC_OscConfig+0x84>
 8006558:	40021000 	.word	0x40021000
 800655c:	42420000 	.word	0x42420000
 8006560:	42420480 	.word	0x42420480
 8006564:	20000218 	.word	0x20000218
 8006568:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 800656c:	4c22      	ldr	r4, [pc, #136]	; (80065f8 <HAL_RCC_OscConfig+0x310>)
 800656e:	6863      	ldr	r3, [r4, #4]
 8006570:	f003 030c 	and.w	r3, r3, #12
 8006574:	2b08      	cmp	r3, #8
 8006576:	f43f aee2 	beq.w	800633e <HAL_RCC_OscConfig+0x56>
 800657a:	2300      	movs	r3, #0
 800657c:	4e1f      	ldr	r6, [pc, #124]	; (80065fc <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800657e:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8006580:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8006582:	d12b      	bne.n	80065dc <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 8006584:	f7fe ffac 	bl	80054e0 <HAL_GetTick>
 8006588:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 800658a:	6823      	ldr	r3, [r4, #0]
 800658c:	0199      	lsls	r1, r3, #6
 800658e:	d41f      	bmi.n	80065d0 <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8006590:	6a2b      	ldr	r3, [r5, #32]
 8006592:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8006596:	d105      	bne.n	80065a4 <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8006598:	6862      	ldr	r2, [r4, #4]
 800659a:	68a9      	ldr	r1, [r5, #8]
 800659c:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 80065a0:	430a      	orrs	r2, r1
 80065a2:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 80065a4:	6a69      	ldr	r1, [r5, #36]	; 0x24
 80065a6:	6862      	ldr	r2, [r4, #4]
 80065a8:	430b      	orrs	r3, r1
 80065aa:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 80065ae:	4313      	orrs	r3, r2
 80065b0:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 80065b2:	2301      	movs	r3, #1
 80065b4:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 80065b6:	f7fe ff93 	bl	80054e0 <HAL_GetTick>
 80065ba:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 80065bc:	6823      	ldr	r3, [r4, #0]
 80065be:	019a      	lsls	r2, r3, #6
 80065c0:	f53f aea7 	bmi.w	8006312 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80065c4:	f7fe ff8c 	bl	80054e0 <HAL_GetTick>
 80065c8:	1b40      	subs	r0, r0, r5
 80065ca:	2802      	cmp	r0, #2
 80065cc:	d9f6      	bls.n	80065bc <HAL_RCC_OscConfig+0x2d4>
 80065ce:	e6cd      	b.n	800636c <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80065d0:	f7fe ff86 	bl	80054e0 <HAL_GetTick>
 80065d4:	1bc0      	subs	r0, r0, r7
 80065d6:	2802      	cmp	r0, #2
 80065d8:	d9d7      	bls.n	800658a <HAL_RCC_OscConfig+0x2a2>
 80065da:	e6c7      	b.n	800636c <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 80065dc:	f7fe ff80 	bl	80054e0 <HAL_GetTick>
 80065e0:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 80065e2:	6823      	ldr	r3, [r4, #0]
 80065e4:	019b      	lsls	r3, r3, #6
 80065e6:	f57f ae94 	bpl.w	8006312 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80065ea:	f7fe ff79 	bl	80054e0 <HAL_GetTick>
 80065ee:	1b40      	subs	r0, r0, r5
 80065f0:	2802      	cmp	r0, #2
 80065f2:	d9f6      	bls.n	80065e2 <HAL_RCC_OscConfig+0x2fa>
 80065f4:	e6ba      	b.n	800636c <HAL_RCC_OscConfig+0x84>
 80065f6:	bf00      	nop
 80065f8:	40021000 	.word	0x40021000
 80065fc:	42420060 	.word	0x42420060

08006600 <HAL_RCC_GetSysClockFreq>:
{
 8006600:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8006602:	4b19      	ldr	r3, [pc, #100]	; (8006668 <HAL_RCC_GetSysClockFreq+0x68>)
{
 8006604:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8006606:	ac02      	add	r4, sp, #8
 8006608:	f103 0510 	add.w	r5, r3, #16
 800660c:	4622      	mov	r2, r4
 800660e:	6818      	ldr	r0, [r3, #0]
 8006610:	6859      	ldr	r1, [r3, #4]
 8006612:	3308      	adds	r3, #8
 8006614:	c203      	stmia	r2!, {r0, r1}
 8006616:	42ab      	cmp	r3, r5
 8006618:	4614      	mov	r4, r2
 800661a:	d1f7      	bne.n	800660c <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 800661c:	2301      	movs	r3, #1
 800661e:	f88d 3004 	strb.w	r3, [sp, #4]
 8006622:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 8006624:	4911      	ldr	r1, [pc, #68]	; (800666c <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8006626:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 800662a:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 800662c:	f003 020c 	and.w	r2, r3, #12
 8006630:	2a08      	cmp	r2, #8
 8006632:	d117      	bne.n	8006664 <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8006634:	f3c3 4283 	ubfx	r2, r3, #18, #4
 8006638:	a806      	add	r0, sp, #24
 800663a:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 800663c:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 800663e:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8006642:	d50c      	bpl.n	800665e <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8006644:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8006646:	480a      	ldr	r0, [pc, #40]	; (8006670 <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8006648:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 800664c:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 800664e:	aa06      	add	r2, sp, #24
 8006650:	4413      	add	r3, r2
 8006652:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8006656:	fbb0 f0f3 	udiv	r0, r0, r3
}
 800665a:	b007      	add	sp, #28
 800665c:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 800665e:	4805      	ldr	r0, [pc, #20]	; (8006674 <HAL_RCC_GetSysClockFreq+0x74>)
 8006660:	4350      	muls	r0, r2
 8006662:	e7fa      	b.n	800665a <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 8006664:	4802      	ldr	r0, [pc, #8]	; (8006670 <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 8006666:	e7f8      	b.n	800665a <HAL_RCC_GetSysClockFreq+0x5a>
 8006668:	0800bf38 	.word	0x0800bf38
 800666c:	40021000 	.word	0x40021000
 8006670:	007a1200 	.word	0x007a1200
 8006674:	003d0900 	.word	0x003d0900

08006678 <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8006678:	4a54      	ldr	r2, [pc, #336]	; (80067cc <HAL_RCC_ClockConfig+0x154>)
{
 800667a:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 800667e:	6813      	ldr	r3, [r2, #0]
{
 8006680:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8006682:	f003 0307 	and.w	r3, r3, #7
 8006686:	428b      	cmp	r3, r1
{
 8006688:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 800668a:	d32a      	bcc.n	80066e2 <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800668c:	6829      	ldr	r1, [r5, #0]
 800668e:	078c      	lsls	r4, r1, #30
 8006690:	d434      	bmi.n	80066fc <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8006692:	07ca      	lsls	r2, r1, #31
 8006694:	d447      	bmi.n	8006726 <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 8006696:	4a4d      	ldr	r2, [pc, #308]	; (80067cc <HAL_RCC_ClockConfig+0x154>)
 8006698:	6813      	ldr	r3, [r2, #0]
 800669a:	f003 0307 	and.w	r3, r3, #7
 800669e:	429e      	cmp	r6, r3
 80066a0:	f0c0 8082 	bcc.w	80067a8 <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 80066a4:	682a      	ldr	r2, [r5, #0]
 80066a6:	4c4a      	ldr	r4, [pc, #296]	; (80067d0 <HAL_RCC_ClockConfig+0x158>)
 80066a8:	f012 0f04 	tst.w	r2, #4
 80066ac:	f040 8087 	bne.w	80067be <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 80066b0:	0713      	lsls	r3, r2, #28
 80066b2:	d506      	bpl.n	80066c2 <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 80066b4:	6863      	ldr	r3, [r4, #4]
 80066b6:	692a      	ldr	r2, [r5, #16]
 80066b8:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 80066bc:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 80066c0:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 80066c2:	f7ff ff9d 	bl	8006600 <HAL_RCC_GetSysClockFreq>
 80066c6:	6863      	ldr	r3, [r4, #4]
 80066c8:	4a42      	ldr	r2, [pc, #264]	; (80067d4 <HAL_RCC_ClockConfig+0x15c>)
 80066ca:	f3c3 1303 	ubfx	r3, r3, #4, #4
 80066ce:	5cd3      	ldrb	r3, [r2, r3]
 80066d0:	40d8      	lsrs	r0, r3
 80066d2:	4b41      	ldr	r3, [pc, #260]	; (80067d8 <HAL_RCC_ClockConfig+0x160>)
 80066d4:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 80066d6:	2000      	movs	r0, #0
 80066d8:	f7fe fec0 	bl	800545c <HAL_InitTick>
  return HAL_OK;
 80066dc:	2000      	movs	r0, #0
}
 80066de:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 80066e2:	6813      	ldr	r3, [r2, #0]
 80066e4:	f023 0307 	bic.w	r3, r3, #7
 80066e8:	430b      	orrs	r3, r1
 80066ea:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 80066ec:	6813      	ldr	r3, [r2, #0]
 80066ee:	f003 0307 	and.w	r3, r3, #7
 80066f2:	4299      	cmp	r1, r3
 80066f4:	d0ca      	beq.n	800668c <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 80066f6:	2001      	movs	r0, #1
 80066f8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80066fc:	4b34      	ldr	r3, [pc, #208]	; (80067d0 <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 80066fe:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8006702:	bf1e      	ittt	ne
 8006704:	685a      	ldrne	r2, [r3, #4]
 8006706:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 800670a:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800670c:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 800670e:	bf42      	ittt	mi
 8006710:	685a      	ldrmi	r2, [r3, #4]
 8006712:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 8006716:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8006718:	685a      	ldr	r2, [r3, #4]
 800671a:	68a8      	ldr	r0, [r5, #8]
 800671c:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8006720:	4302      	orrs	r2, r0
 8006722:	605a      	str	r2, [r3, #4]
 8006724:	e7b5      	b.n	8006692 <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8006726:	686a      	ldr	r2, [r5, #4]
 8006728:	4c29      	ldr	r4, [pc, #164]	; (80067d0 <HAL_RCC_ClockConfig+0x158>)
 800672a:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 800672c:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800672e:	d11c      	bne.n	800676a <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8006730:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8006734:	d0df      	beq.n	80066f6 <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8006736:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006738:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 800673c:	f023 0303 	bic.w	r3, r3, #3
 8006740:	4313      	orrs	r3, r2
 8006742:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8006744:	f7fe fecc 	bl	80054e0 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8006748:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 800674a:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800674c:	2b01      	cmp	r3, #1
 800674e:	d114      	bne.n	800677a <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8006750:	6863      	ldr	r3, [r4, #4]
 8006752:	f003 030c 	and.w	r3, r3, #12
 8006756:	2b04      	cmp	r3, #4
 8006758:	d09d      	beq.n	8006696 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 800675a:	f7fe fec1 	bl	80054e0 <HAL_GetTick>
 800675e:	1bc0      	subs	r0, r0, r7
 8006760:	4540      	cmp	r0, r8
 8006762:	d9f5      	bls.n	8006750 <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 8006764:	2003      	movs	r0, #3
 8006766:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800676a:	2a02      	cmp	r2, #2
 800676c:	d102      	bne.n	8006774 <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 800676e:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 8006772:	e7df      	b.n	8006734 <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8006774:	f013 0f02 	tst.w	r3, #2
 8006778:	e7dc      	b.n	8006734 <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800677a:	2b02      	cmp	r3, #2
 800677c:	d10f      	bne.n	800679e <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 800677e:	6863      	ldr	r3, [r4, #4]
 8006780:	f003 030c 	and.w	r3, r3, #12
 8006784:	2b08      	cmp	r3, #8
 8006786:	d086      	beq.n	8006696 <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006788:	f7fe feaa 	bl	80054e0 <HAL_GetTick>
 800678c:	1bc0      	subs	r0, r0, r7
 800678e:	4540      	cmp	r0, r8
 8006790:	d9f5      	bls.n	800677e <HAL_RCC_ClockConfig+0x106>
 8006792:	e7e7      	b.n	8006764 <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8006794:	f7fe fea4 	bl	80054e0 <HAL_GetTick>
 8006798:	1bc0      	subs	r0, r0, r7
 800679a:	4540      	cmp	r0, r8
 800679c:	d8e2      	bhi.n	8006764 <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 800679e:	6863      	ldr	r3, [r4, #4]
 80067a0:	f013 0f0c 	tst.w	r3, #12
 80067a4:	d1f6      	bne.n	8006794 <HAL_RCC_ClockConfig+0x11c>
 80067a6:	e776      	b.n	8006696 <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 80067a8:	6813      	ldr	r3, [r2, #0]
 80067aa:	f023 0307 	bic.w	r3, r3, #7
 80067ae:	4333      	orrs	r3, r6
 80067b0:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 80067b2:	6813      	ldr	r3, [r2, #0]
 80067b4:	f003 0307 	and.w	r3, r3, #7
 80067b8:	429e      	cmp	r6, r3
 80067ba:	d19c      	bne.n	80066f6 <HAL_RCC_ClockConfig+0x7e>
 80067bc:	e772      	b.n	80066a4 <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 80067be:	6863      	ldr	r3, [r4, #4]
 80067c0:	68e9      	ldr	r1, [r5, #12]
 80067c2:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 80067c6:	430b      	orrs	r3, r1
 80067c8:	6063      	str	r3, [r4, #4]
 80067ca:	e771      	b.n	80066b0 <HAL_RCC_ClockConfig+0x38>
 80067cc:	40022000 	.word	0x40022000
 80067d0:	40021000 	.word	0x40021000
 80067d4:	0800bf77 	.word	0x0800bf77
 80067d8:	20000218 	.word	0x20000218

080067dc <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 80067dc:	4b04      	ldr	r3, [pc, #16]	; (80067f0 <HAL_RCC_GetPCLK1Freq+0x14>)
 80067de:	4a05      	ldr	r2, [pc, #20]	; (80067f4 <HAL_RCC_GetPCLK1Freq+0x18>)
 80067e0:	685b      	ldr	r3, [r3, #4]
 80067e2:	f3c3 2302 	ubfx	r3, r3, #8, #3
 80067e6:	5cd3      	ldrb	r3, [r2, r3]
 80067e8:	4a03      	ldr	r2, [pc, #12]	; (80067f8 <HAL_RCC_GetPCLK1Freq+0x1c>)
 80067ea:	6810      	ldr	r0, [r2, #0]
}    
 80067ec:	40d8      	lsrs	r0, r3
 80067ee:	4770      	bx	lr
 80067f0:	40021000 	.word	0x40021000
 80067f4:	0800bf87 	.word	0x0800bf87
 80067f8:	20000218 	.word	0x20000218

080067fc <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 80067fc:	4b04      	ldr	r3, [pc, #16]	; (8006810 <HAL_RCC_GetPCLK2Freq+0x14>)
 80067fe:	4a05      	ldr	r2, [pc, #20]	; (8006814 <HAL_RCC_GetPCLK2Freq+0x18>)
 8006800:	685b      	ldr	r3, [r3, #4]
 8006802:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 8006806:	5cd3      	ldrb	r3, [r2, r3]
 8006808:	4a03      	ldr	r2, [pc, #12]	; (8006818 <HAL_RCC_GetPCLK2Freq+0x1c>)
 800680a:	6810      	ldr	r0, [r2, #0]
} 
 800680c:	40d8      	lsrs	r0, r3
 800680e:	4770      	bx	lr
 8006810:	40021000 	.word	0x40021000
 8006814:	0800bf87 	.word	0x0800bf87
 8006818:	20000218 	.word	0x20000218

0800681c <HAL_RCCEx_PeriphCLKConfig>:

  /* Check the parameters */
  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
  
  /*------------------------------- RTC/LCD Configuration ------------------------*/ 
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 800681c:	6803      	ldr	r3, [r0, #0]
{
 800681e:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8006822:	07d9      	lsls	r1, r3, #31
{
 8006824:	4605      	mov	r5, r0
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8006826:	d520      	bpl.n	800686a <HAL_RCCEx_PeriphCLKConfig+0x4e>
    FlagStatus       pwrclkchanged = RESET;

    /* As soon as function is called to change RTC clock source, activation of the 
       power domain is done. */
    /* Requires to enable write access to Backup Domain of necessary */
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8006828:	4c35      	ldr	r4, [pc, #212]	; (8006900 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 800682a:	69e3      	ldr	r3, [r4, #28]
 800682c:	00da      	lsls	r2, r3, #3
 800682e:	d432      	bmi.n	8006896 <HAL_RCCEx_PeriphCLKConfig+0x7a>
    {
    __HAL_RCC_PWR_CLK_ENABLE();
      pwrclkchanged = SET;
 8006830:	2701      	movs	r7, #1
    __HAL_RCC_PWR_CLK_ENABLE();
 8006832:	69e3      	ldr	r3, [r4, #28]
 8006834:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8006838:	61e3      	str	r3, [r4, #28]
 800683a:	69e3      	ldr	r3, [r4, #28]
 800683c:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8006840:	9301      	str	r3, [sp, #4]
 8006842:	9b01      	ldr	r3, [sp, #4]
    }
    
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8006844:	4e2f      	ldr	r6, [pc, #188]	; (8006904 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 8006846:	6833      	ldr	r3, [r6, #0]
 8006848:	05db      	lsls	r3, r3, #23
 800684a:	d526      	bpl.n	800689a <HAL_RCCEx_PeriphCLKConfig+0x7e>
        }
      }
    }
      
    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ 
    temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
 800684c:	6a23      	ldr	r3, [r4, #32]
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 800684e:	f413 7340 	ands.w	r3, r3, #768	; 0x300
 8006852:	d136      	bne.n	80068c2 <HAL_RCCEx_PeriphCLKConfig+0xa6>
            return HAL_TIMEOUT;
          }      
        }  
      }
    }
    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
 8006854:	6a23      	ldr	r3, [r4, #32]
 8006856:	686a      	ldr	r2, [r5, #4]
 8006858:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 800685c:	4313      	orrs	r3, r2
 800685e:	6223      	str	r3, [r4, #32]

    /* Require to disable power clock if necessary */
    if(pwrclkchanged == SET)
 8006860:	b11f      	cbz	r7, 800686a <HAL_RCCEx_PeriphCLKConfig+0x4e>
    {
      __HAL_RCC_PWR_CLK_DISABLE();
 8006862:	69e3      	ldr	r3, [r4, #28]
 8006864:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8006868:	61e3      	str	r3, [r4, #28]
    }
  }

  /*------------------------------ ADC clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800686a:	6828      	ldr	r0, [r5, #0]
 800686c:	0783      	lsls	r3, r0, #30
 800686e:	d506      	bpl.n	800687e <HAL_RCCEx_PeriphCLKConfig+0x62>
  {
    /* Check the parameters */
    assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
    
    /* Configure the ADC clock source */
    __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 8006870:	4a23      	ldr	r2, [pc, #140]	; (8006900 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8006872:	68a9      	ldr	r1, [r5, #8]
 8006874:	6853      	ldr	r3, [r2, #4]
 8006876:	f423 4340 	bic.w	r3, r3, #49152	; 0xc000
 800687a:	430b      	orrs	r3, r1
 800687c:	6053      	str	r3, [r2, #4]

#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
 || defined(STM32F105xC) || defined(STM32F107xC)
  /*------------------------------ USB clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800687e:	f010 0010 	ands.w	r0, r0, #16
 8006882:	d01b      	beq.n	80068bc <HAL_RCCEx_PeriphCLKConfig+0xa0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
    
    /* Configure the USB clock source */
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8006884:	4a1e      	ldr	r2, [pc, #120]	; (8006900 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8006886:	6969      	ldr	r1, [r5, #20]
 8006888:	6853      	ldr	r3, [r2, #4]
  }
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */

  return HAL_OK;
 800688a:	2000      	movs	r0, #0
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 800688c:	f423 0380 	bic.w	r3, r3, #4194304	; 0x400000
 8006890:	430b      	orrs	r3, r1
 8006892:	6053      	str	r3, [r2, #4]
 8006894:	e012      	b.n	80068bc <HAL_RCCEx_PeriphCLKConfig+0xa0>
    FlagStatus       pwrclkchanged = RESET;
 8006896:	2700      	movs	r7, #0
 8006898:	e7d4      	b.n	8006844 <HAL_RCCEx_PeriphCLKConfig+0x28>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 800689a:	6833      	ldr	r3, [r6, #0]
 800689c:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 80068a0:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 80068a2:	f7fe fe1d 	bl	80054e0 <HAL_GetTick>
 80068a6:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80068a8:	6833      	ldr	r3, [r6, #0]
 80068aa:	05d8      	lsls	r0, r3, #23
 80068ac:	d4ce      	bmi.n	800684c <HAL_RCCEx_PeriphCLKConfig+0x30>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 80068ae:	f7fe fe17 	bl	80054e0 <HAL_GetTick>
 80068b2:	eba0 0008 	sub.w	r0, r0, r8
 80068b6:	2864      	cmp	r0, #100	; 0x64
 80068b8:	d9f6      	bls.n	80068a8 <HAL_RCCEx_PeriphCLKConfig+0x8c>
          return HAL_TIMEOUT;
 80068ba:	2003      	movs	r0, #3
}
 80068bc:	b002      	add	sp, #8
 80068be:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 80068c2:	686a      	ldr	r2, [r5, #4]
 80068c4:	f402 7240 	and.w	r2, r2, #768	; 0x300
 80068c8:	4293      	cmp	r3, r2
 80068ca:	d0c3      	beq.n	8006854 <HAL_RCCEx_PeriphCLKConfig+0x38>
      __HAL_RCC_BACKUPRESET_FORCE();
 80068cc:	2001      	movs	r0, #1
 80068ce:	4a0e      	ldr	r2, [pc, #56]	; (8006908 <HAL_RCCEx_PeriphCLKConfig+0xec>)
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 80068d0:	6a23      	ldr	r3, [r4, #32]
      __HAL_RCC_BACKUPRESET_FORCE();
 80068d2:	6010      	str	r0, [r2, #0]
      __HAL_RCC_BACKUPRESET_RELEASE();
 80068d4:	2000      	movs	r0, #0
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 80068d6:	f423 7140 	bic.w	r1, r3, #768	; 0x300
      __HAL_RCC_BACKUPRESET_RELEASE();
 80068da:	6010      	str	r0, [r2, #0]
      RCC->BDCR = temp_reg;
 80068dc:	6221      	str	r1, [r4, #32]
      if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
 80068de:	07d9      	lsls	r1, r3, #31
 80068e0:	d5b8      	bpl.n	8006854 <HAL_RCCEx_PeriphCLKConfig+0x38>
        tickstart = HAL_GetTick();
 80068e2:	f7fe fdfd 	bl	80054e0 <HAL_GetTick>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80068e6:	f241 3888 	movw	r8, #5000	; 0x1388
        tickstart = HAL_GetTick();
 80068ea:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80068ec:	6a23      	ldr	r3, [r4, #32]
 80068ee:	079a      	lsls	r2, r3, #30
 80068f0:	d4b0      	bmi.n	8006854 <HAL_RCCEx_PeriphCLKConfig+0x38>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80068f2:	f7fe fdf5 	bl	80054e0 <HAL_GetTick>
 80068f6:	1b80      	subs	r0, r0, r6
 80068f8:	4540      	cmp	r0, r8
 80068fa:	d9f7      	bls.n	80068ec <HAL_RCCEx_PeriphCLKConfig+0xd0>
 80068fc:	e7dd      	b.n	80068ba <HAL_RCCEx_PeriphCLKConfig+0x9e>
 80068fe:	bf00      	nop
 8006900:	40021000 	.word	0x40021000
 8006904:	40007000 	.word	0x40007000
 8006908:	42420440 	.word	0x42420440

0800690c <HAL_RCCEx_GetPeriphCLKFreq>:
  *            @arg @ref RCC_PERIPHCLK_USB  USB peripheral clock
  @endif
  * @retval Frequency in Hz (0: means that no available frequency for the peripheral)
  */
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
{
 800690c:	4602      	mov	r2, r0
 800690e:	b570      	push	{r4, r5, r6, lr}
  uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U;
  uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U;
#endif /* STM32F105xC || STM32F107xC */
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || \
    defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8006910:	4b3b      	ldr	r3, [pc, #236]	; (8006a00 <HAL_RCCEx_GetPeriphCLKFreq+0xf4>)
{
 8006912:	b086      	sub	sp, #24
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8006914:	ad02      	add	r5, sp, #8
 8006916:	f103 0610 	add.w	r6, r3, #16
 800691a:	462c      	mov	r4, r5
 800691c:	6818      	ldr	r0, [r3, #0]
 800691e:	6859      	ldr	r1, [r3, #4]
 8006920:	3308      	adds	r3, #8
 8006922:	c403      	stmia	r4!, {r0, r1}
 8006924:	42b3      	cmp	r3, r6
 8006926:	4625      	mov	r5, r4
 8006928:	d1f7      	bne.n	800691a <HAL_RCCEx_GetPeriphCLKFreq+0xe>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 800692a:	2301      	movs	r3, #1
 800692c:	f88d 3004 	strb.w	r3, [sp, #4]
 8006930:	2302      	movs	r3, #2
  uint32_t temp_reg = 0U, frequency = 0U;

  /* Check the parameters */
  assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
  
  switch (PeriphClk)
 8006932:	1e50      	subs	r0, r2, #1
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8006934:	f88d 3005 	strb.w	r3, [sp, #5]
  switch (PeriphClk)
 8006938:	280f      	cmp	r0, #15
 800693a:	d85e      	bhi.n	80069fa <HAL_RCCEx_GetPeriphCLKFreq+0xee>
 800693c:	e8df f000 	tbb	[pc, r0]
 8006940:	2d5d5132 	.word	0x2d5d5132
 8006944:	2d5d5d5d 	.word	0x2d5d5d5d
 8006948:	5d5d5d5d 	.word	0x5d5d5d5d
 800694c:	085d5d5d 	.word	0x085d5d5d
 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
 || defined(STM32F105xC) || defined(STM32F107xC)
  case RCC_PERIPHCLK_USB:  
    {
      /* Get RCC configuration ------------------------------------------------------*/
      temp_reg = RCC->CFGR;
 8006950:	4b2c      	ldr	r3, [pc, #176]	; (8006a04 <HAL_RCCEx_GetPeriphCLKFreq+0xf8>)
 8006952:	6859      	ldr	r1, [r3, #4]
  
      /* Check if PLL is enabled */
      if (HAL_IS_BIT_SET(RCC->CR,RCC_CR_PLLON))
 8006954:	6818      	ldr	r0, [r3, #0]
 8006956:	f010 7080 	ands.w	r0, r0, #16777216	; 0x1000000
 800695a:	d037      	beq.n	80069cc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
      {
        pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 800695c:	f3c1 4283 	ubfx	r2, r1, #18, #4
 8006960:	a806      	add	r0, sp, #24
 8006962:	4402      	add	r2, r0
 8006964:	f812 0c10 	ldrb.w	r0, [r2, #-16]
        if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8006968:	03ca      	lsls	r2, r1, #15
        {
#if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\
 || defined(STM32F100xE)
          prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
          prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 800696a:	bf41      	itttt	mi
 800696c:	685a      	ldrmi	r2, [r3, #4]
 800696e:	a906      	addmi	r1, sp, #24
 8006970:	f3c2 4240 	ubfxmi	r2, r2, #17, #1
 8006974:	1852      	addmi	r2, r2, r1
 8006976:	bf44      	itt	mi
 8006978:	f812 1c14 	ldrbmi.w	r1, [r2, #-20]
          }
#else
          if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
          {
            /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
            pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul);
 800697c:	4a22      	ldrmi	r2, [pc, #136]	; (8006a08 <HAL_RCCEx_GetPeriphCLKFreq+0xfc>)
          /* Prescaler of 3 selected for USB */ 
          frequency = (2 * pllclk) / 3;
        }
#else
        /* USBCLK = PLLCLK / USB prescaler */
        if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
 800697e:	685b      	ldr	r3, [r3, #4]
            pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul);
 8006980:	bf4c      	ite	mi
 8006982:	fbb2 f2f1 	udivmi	r2, r2, r1
          pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 8006986:	4a21      	ldrpl	r2, [pc, #132]	; (8006a0c <HAL_RCCEx_GetPeriphCLKFreq+0x100>)
        if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
 8006988:	025b      	lsls	r3, r3, #9
          pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 800698a:	fb02 f000 	mul.w	r0, r2, r0
        if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
 800698e:	d41d      	bmi.n	80069cc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
          frequency = pllclk;
        }
        else
        {
          /* Prescaler of 1.5 selected for USB */ 
          frequency = (pllclk * 2) / 3;
 8006990:	2303      	movs	r3, #3
 8006992:	0040      	lsls	r0, r0, #1
      }
      break;
    }
  case RCC_PERIPHCLK_ADC:  
    {
      frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2);
 8006994:	fbb0 f0f3 	udiv	r0, r0, r3
      break;
 8006998:	e018      	b.n	80069cc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
    {
      break;
    }
  }
  return(frequency);
}
 800699a:	b006      	add	sp, #24
 800699c:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      frequency = HAL_RCC_GetSysClockFreq();
 80069a0:	f7ff be2e 	b.w	8006600 <HAL_RCC_GetSysClockFreq>
      if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY)))
 80069a4:	f240 3102 	movw	r1, #770	; 0x302
      temp_reg = RCC->BDCR;
 80069a8:	4a16      	ldr	r2, [pc, #88]	; (8006a04 <HAL_RCCEx_GetPeriphCLKFreq+0xf8>)
 80069aa:	6a13      	ldr	r3, [r2, #32]
      if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY)))
 80069ac:	4019      	ands	r1, r3
 80069ae:	f5b1 7f81 	cmp.w	r1, #258	; 0x102
 80069b2:	d01f      	beq.n	80069f4 <HAL_RCCEx_GetPeriphCLKFreq+0xe8>
      else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
 80069b4:	f403 7340 	and.w	r3, r3, #768	; 0x300
 80069b8:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 80069bc:	d108      	bne.n	80069d0 <HAL_RCCEx_GetPeriphCLKFreq+0xc4>
        frequency = LSI_VALUE;
 80069be:	f649 4040 	movw	r0, #40000	; 0x9c40
      else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
 80069c2:	6a53      	ldr	r3, [r2, #36]	; 0x24
        frequency = LSI_VALUE;
 80069c4:	f013 0f02 	tst.w	r3, #2
        frequency = HSE_VALUE / 128U;
 80069c8:	bf08      	it	eq
 80069ca:	2000      	moveq	r0, #0
}
 80069cc:	b006      	add	sp, #24
 80069ce:	bd70      	pop	{r4, r5, r6, pc}
      else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
 80069d0:	f5b3 7f40 	cmp.w	r3, #768	; 0x300
 80069d4:	d111      	bne.n	80069fa <HAL_RCCEx_GetPeriphCLKFreq+0xee>
 80069d6:	6813      	ldr	r3, [r2, #0]
        frequency = HSE_VALUE / 128U;
 80069d8:	f24f 4024 	movw	r0, #62500	; 0xf424
 80069dc:	f413 3f00 	tst.w	r3, #131072	; 0x20000
 80069e0:	e7f2      	b.n	80069c8 <HAL_RCCEx_GetPeriphCLKFreq+0xbc>
      frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2);
 80069e2:	f7ff ff0b 	bl	80067fc <HAL_RCC_GetPCLK2Freq>
 80069e6:	4b07      	ldr	r3, [pc, #28]	; (8006a04 <HAL_RCCEx_GetPeriphCLKFreq+0xf8>)
 80069e8:	685b      	ldr	r3, [r3, #4]
 80069ea:	f3c3 3381 	ubfx	r3, r3, #14, #2
 80069ee:	3301      	adds	r3, #1
 80069f0:	005b      	lsls	r3, r3, #1
 80069f2:	e7cf      	b.n	8006994 <HAL_RCCEx_GetPeriphCLKFreq+0x88>
        frequency = LSE_VALUE;
 80069f4:	f44f 4000 	mov.w	r0, #32768	; 0x8000
 80069f8:	e7e8      	b.n	80069cc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
        frequency = 0U;
 80069fa:	2000      	movs	r0, #0
 80069fc:	e7e6      	b.n	80069cc <HAL_RCCEx_GetPeriphCLKFreq+0xc0>
 80069fe:	bf00      	nop
 8006a00:	0800bf48 	.word	0x0800bf48
 8006a04:	40021000 	.word	0x40021000
 8006a08:	007a1200 	.word	0x007a1200
 8006a0c:	003d0900 	.word	0x003d0900

08006a10 <HAL_TIM_OC_DelayElapsedCallback>:
 8006a10:	4770      	bx	lr

08006a12 <HAL_TIM_IC_CaptureCallback>:
 8006a12:	4770      	bx	lr

08006a14 <HAL_TIM_PWM_PulseFinishedCallback>:
 8006a14:	4770      	bx	lr

08006a16 <HAL_TIM_TriggerCallback>:
 8006a16:	4770      	bx	lr

08006a18 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8006a18:	6803      	ldr	r3, [r0, #0]
{
 8006a1a:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8006a1c:	691a      	ldr	r2, [r3, #16]
{
 8006a1e:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8006a20:	0791      	lsls	r1, r2, #30
 8006a22:	d50e      	bpl.n	8006a42 <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 8006a24:	68da      	ldr	r2, [r3, #12]
 8006a26:	0792      	lsls	r2, r2, #30
 8006a28:	d50b      	bpl.n	8006a42 <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8006a2a:	f06f 0202 	mvn.w	r2, #2
 8006a2e:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8006a30:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8006a32:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8006a34:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8006a36:	079b      	lsls	r3, r3, #30
 8006a38:	d077      	beq.n	8006b2a <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 8006a3a:	f7ff ffea 	bl	8006a12 <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006a3e:	2300      	movs	r3, #0
 8006a40:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8006a42:	6823      	ldr	r3, [r4, #0]
 8006a44:	691a      	ldr	r2, [r3, #16]
 8006a46:	0750      	lsls	r0, r2, #29
 8006a48:	d510      	bpl.n	8006a6c <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 8006a4a:	68da      	ldr	r2, [r3, #12]
 8006a4c:	0751      	lsls	r1, r2, #29
 8006a4e:	d50d      	bpl.n	8006a6c <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8006a50:	f06f 0204 	mvn.w	r2, #4
 8006a54:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8006a56:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8006a58:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8006a5a:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8006a5c:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8006a60:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8006a62:	d068      	beq.n	8006b36 <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 8006a64:	f7ff ffd5 	bl	8006a12 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006a68:	2300      	movs	r3, #0
 8006a6a:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8006a6c:	6823      	ldr	r3, [r4, #0]
 8006a6e:	691a      	ldr	r2, [r3, #16]
 8006a70:	0712      	lsls	r2, r2, #28
 8006a72:	d50f      	bpl.n	8006a94 <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 8006a74:	68da      	ldr	r2, [r3, #12]
 8006a76:	0710      	lsls	r0, r2, #28
 8006a78:	d50c      	bpl.n	8006a94 <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8006a7a:	f06f 0208 	mvn.w	r2, #8
 8006a7e:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8006a80:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8006a82:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8006a84:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8006a86:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8006a88:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8006a8a:	d05a      	beq.n	8006b42 <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8006a8c:	f7ff ffc1 	bl	8006a12 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006a90:	2300      	movs	r3, #0
 8006a92:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8006a94:	6823      	ldr	r3, [r4, #0]
 8006a96:	691a      	ldr	r2, [r3, #16]
 8006a98:	06d2      	lsls	r2, r2, #27
 8006a9a:	d510      	bpl.n	8006abe <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8006a9c:	68da      	ldr	r2, [r3, #12]
 8006a9e:	06d0      	lsls	r0, r2, #27
 8006aa0:	d50d      	bpl.n	8006abe <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8006aa2:	f06f 0210 	mvn.w	r2, #16
 8006aa6:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8006aa8:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8006aaa:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8006aac:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8006aae:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8006ab2:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8006ab4:	d04b      	beq.n	8006b4e <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 8006ab6:	f7ff ffac 	bl	8006a12 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8006aba:	2300      	movs	r3, #0
 8006abc:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8006abe:	6823      	ldr	r3, [r4, #0]
 8006ac0:	691a      	ldr	r2, [r3, #16]
 8006ac2:	07d1      	lsls	r1, r2, #31
 8006ac4:	d508      	bpl.n	8006ad8 <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 8006ac6:	68da      	ldr	r2, [r3, #12]
 8006ac8:	07d2      	lsls	r2, r2, #31
 8006aca:	d505      	bpl.n	8006ad8 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8006acc:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 8006ad0:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8006ad2:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 8006ad4:	f001 fa68 	bl	8007fa8 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 8006ad8:	6823      	ldr	r3, [r4, #0]
 8006ada:	691a      	ldr	r2, [r3, #16]
 8006adc:	0610      	lsls	r0, r2, #24
 8006ade:	d508      	bpl.n	8006af2 <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 8006ae0:	68da      	ldr	r2, [r3, #12]
 8006ae2:	0611      	lsls	r1, r2, #24
 8006ae4:	d505      	bpl.n	8006af2 <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8006ae6:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 8006aea:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8006aec:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 8006aee:	f000 f8be 	bl	8006c6e <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 8006af2:	6823      	ldr	r3, [r4, #0]
 8006af4:	691a      	ldr	r2, [r3, #16]
 8006af6:	0652      	lsls	r2, r2, #25
 8006af8:	d508      	bpl.n	8006b0c <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 8006afa:	68da      	ldr	r2, [r3, #12]
 8006afc:	0650      	lsls	r0, r2, #25
 8006afe:	d505      	bpl.n	8006b0c <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8006b00:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 8006b04:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8006b06:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 8006b08:	f7ff ff85 	bl	8006a16 <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 8006b0c:	6823      	ldr	r3, [r4, #0]
 8006b0e:	691a      	ldr	r2, [r3, #16]
 8006b10:	0691      	lsls	r1, r2, #26
 8006b12:	d522      	bpl.n	8006b5a <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 8006b14:	68da      	ldr	r2, [r3, #12]
 8006b16:	0692      	lsls	r2, r2, #26
 8006b18:	d51f      	bpl.n	8006b5a <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8006b1a:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 8006b1e:	4620      	mov	r0, r4
    }
  }
}
 8006b20:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8006b24:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 8006b26:	f000 b8a1 	b.w	8006c6c <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8006b2a:	f7ff ff71 	bl	8006a10 <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8006b2e:	4620      	mov	r0, r4
 8006b30:	f7ff ff70 	bl	8006a14 <HAL_TIM_PWM_PulseFinishedCallback>
 8006b34:	e783      	b.n	8006a3e <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8006b36:	f7ff ff6b 	bl	8006a10 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8006b3a:	4620      	mov	r0, r4
 8006b3c:	f7ff ff6a 	bl	8006a14 <HAL_TIM_PWM_PulseFinishedCallback>
 8006b40:	e792      	b.n	8006a68 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8006b42:	f7ff ff65 	bl	8006a10 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8006b46:	4620      	mov	r0, r4
 8006b48:	f7ff ff64 	bl	8006a14 <HAL_TIM_PWM_PulseFinishedCallback>
 8006b4c:	e7a0      	b.n	8006a90 <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8006b4e:	f7ff ff5f 	bl	8006a10 <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8006b52:	4620      	mov	r0, r4
 8006b54:	f7ff ff5e 	bl	8006a14 <HAL_TIM_PWM_PulseFinishedCallback>
 8006b58:	e7af      	b.n	8006aba <HAL_TIM_IRQHandler+0xa2>
 8006b5a:	bd10      	pop	{r4, pc}

08006b5c <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8006b5c:	4a24      	ldr	r2, [pc, #144]	; (8006bf0 <TIM_Base_SetConfig+0x94>)
  tmpcr1 = TIMx->CR1;
 8006b5e:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8006b60:	4290      	cmp	r0, r2
 8006b62:	d012      	beq.n	8006b8a <TIM_Base_SetConfig+0x2e>
 8006b64:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8006b68:	4290      	cmp	r0, r2
 8006b6a:	d00e      	beq.n	8006b8a <TIM_Base_SetConfig+0x2e>
 8006b6c:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8006b70:	d00b      	beq.n	8006b8a <TIM_Base_SetConfig+0x2e>
 8006b72:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8006b76:	4290      	cmp	r0, r2
 8006b78:	d007      	beq.n	8006b8a <TIM_Base_SetConfig+0x2e>
 8006b7a:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8006b7e:	4290      	cmp	r0, r2
 8006b80:	d003      	beq.n	8006b8a <TIM_Base_SetConfig+0x2e>
 8006b82:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8006b86:	4290      	cmp	r0, r2
 8006b88:	d11d      	bne.n	8006bc6 <TIM_Base_SetConfig+0x6a>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8006b8a:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8006b8c:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8006b90:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 8006b92:	4a17      	ldr	r2, [pc, #92]	; (8006bf0 <TIM_Base_SetConfig+0x94>)
 8006b94:	4290      	cmp	r0, r2
 8006b96:	d012      	beq.n	8006bbe <TIM_Base_SetConfig+0x62>
 8006b98:	f502 6200 	add.w	r2, r2, #2048	; 0x800
 8006b9c:	4290      	cmp	r0, r2
 8006b9e:	d00e      	beq.n	8006bbe <TIM_Base_SetConfig+0x62>
 8006ba0:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8006ba4:	d00b      	beq.n	8006bbe <TIM_Base_SetConfig+0x62>
 8006ba6:	f5a2 3298 	sub.w	r2, r2, #77824	; 0x13000
 8006baa:	4290      	cmp	r0, r2
 8006bac:	d007      	beq.n	8006bbe <TIM_Base_SetConfig+0x62>
 8006bae:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8006bb2:	4290      	cmp	r0, r2
 8006bb4:	d003      	beq.n	8006bbe <TIM_Base_SetConfig+0x62>
 8006bb6:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8006bba:	4290      	cmp	r0, r2
 8006bbc:	d103      	bne.n	8006bc6 <TIM_Base_SetConfig+0x6a>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8006bbe:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8006bc0:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8006bc4:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8006bc6:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 8006bc8:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8006bcc:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8006bce:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8006bd0:	688b      	ldr	r3, [r1, #8]
 8006bd2:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 8006bd4:	680b      	ldr	r3, [r1, #0]
 8006bd6:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8006bd8:	4b05      	ldr	r3, [pc, #20]	; (8006bf0 <TIM_Base_SetConfig+0x94>)
 8006bda:	4298      	cmp	r0, r3
 8006bdc:	d003      	beq.n	8006be6 <TIM_Base_SetConfig+0x8a>
 8006bde:	f503 6300 	add.w	r3, r3, #2048	; 0x800
 8006be2:	4298      	cmp	r0, r3
 8006be4:	d101      	bne.n	8006bea <TIM_Base_SetConfig+0x8e>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 8006be6:	690b      	ldr	r3, [r1, #16]
 8006be8:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 8006bea:	2301      	movs	r3, #1
 8006bec:	6143      	str	r3, [r0, #20]
 8006bee:	4770      	bx	lr
 8006bf0:	40012c00 	.word	0x40012c00

08006bf4 <HAL_TIM_Base_Init>:
{
 8006bf4:	b510      	push	{r4, lr}
  if(htim == NULL)
 8006bf6:	4604      	mov	r4, r0
 8006bf8:	b1a0      	cbz	r0, 8006c24 <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 8006bfa:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8006bfe:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8006c02:	b91b      	cbnz	r3, 8006c0c <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 8006c04:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8006c08:	f001 fdcc 	bl	80087a4 <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 8006c0c:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8006c0e:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8006c10:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8006c14:	1d21      	adds	r1, r4, #4
 8006c16:	f7ff ffa1 	bl	8006b5c <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 8006c1a:	2301      	movs	r3, #1
  return HAL_OK;
 8006c1c:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 8006c1e:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 8006c22:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8006c24:	2001      	movs	r0, #1
}
 8006c26:	bd10      	pop	{r4, pc}

08006c28 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 8006c28:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 8006c2c:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 8006c2e:	2b01      	cmp	r3, #1
 8006c30:	f04f 0302 	mov.w	r3, #2
 8006c34:	d018      	beq.n	8006c68 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 8006c36:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8006c3a:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8006c3c:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8006c3e:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8006c40:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8006c42:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 8006c46:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8006c48:	685a      	ldr	r2, [r3, #4]
 8006c4a:	4322      	orrs	r2, r4
 8006c4c:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 8006c4e:	689a      	ldr	r2, [r3, #8]
 8006c50:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8006c54:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8006c56:	689a      	ldr	r2, [r3, #8]
 8006c58:	430a      	orrs	r2, r1
 8006c5a:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 8006c5c:	2301      	movs	r3, #1
 8006c5e:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 8006c62:	2300      	movs	r3, #0
 8006c64:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8006c68:	4618      	mov	r0, r3

  return HAL_OK;
}
 8006c6a:	bd10      	pop	{r4, pc}

08006c6c <HAL_TIMEx_CommutationCallback>:
 8006c6c:	4770      	bx	lr

08006c6e <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 8006c6e:	4770      	bx	lr

08006c70 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8006c70:	6803      	ldr	r3, [r0, #0]
 8006c72:	68da      	ldr	r2, [r3, #12]
 8006c74:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8006c78:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006c7a:	695a      	ldr	r2, [r3, #20]
 8006c7c:	f022 0201 	bic.w	r2, r2, #1
 8006c80:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8006c82:	2320      	movs	r3, #32
 8006c84:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8006c88:	4770      	bx	lr
	...

08006c8c <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 8006c8c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8006c90:	6805      	ldr	r5, [r0, #0]
 8006c92:	68c2      	ldr	r2, [r0, #12]
 8006c94:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006c96:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8006c98:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8006c9c:	4313      	orrs	r3, r2
 8006c9e:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006ca0:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 8006ca2:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006ca4:	430b      	orrs	r3, r1
 8006ca6:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8006ca8:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 8006cac:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8006cb0:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 8006cb2:	4313      	orrs	r3, r2
 8006cb4:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 8006cb6:	696b      	ldr	r3, [r5, #20]
 8006cb8:	6982      	ldr	r2, [r0, #24]
 8006cba:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8006cbe:	4313      	orrs	r3, r2
 8006cc0:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 8006cc2:	4b40      	ldr	r3, [pc, #256]	; (8006dc4 <UART_SetConfig+0x138>)
{
 8006cc4:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 8006cc6:	429d      	cmp	r5, r3
 8006cc8:	f04f 0419 	mov.w	r4, #25
 8006ccc:	d146      	bne.n	8006d5c <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 8006cce:	f7ff fd95 	bl	80067fc <HAL_RCC_GetPCLK2Freq>
 8006cd2:	fb04 f300 	mul.w	r3, r4, r0
 8006cd6:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8006cda:	f04f 0864 	mov.w	r8, #100	; 0x64
 8006cde:	00b6      	lsls	r6, r6, #2
 8006ce0:	fbb3 f3f6 	udiv	r3, r3, r6
 8006ce4:	fbb3 f3f8 	udiv	r3, r3, r8
 8006ce8:	011e      	lsls	r6, r3, #4
 8006cea:	f7ff fd87 	bl	80067fc <HAL_RCC_GetPCLK2Freq>
 8006cee:	4360      	muls	r0, r4
 8006cf0:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006cf4:	009b      	lsls	r3, r3, #2
 8006cf6:	fbb0 f7f3 	udiv	r7, r0, r3
 8006cfa:	f7ff fd7f 	bl	80067fc <HAL_RCC_GetPCLK2Freq>
 8006cfe:	4360      	muls	r0, r4
 8006d00:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006d04:	009b      	lsls	r3, r3, #2
 8006d06:	fbb0 f3f3 	udiv	r3, r0, r3
 8006d0a:	fbb3 f3f8 	udiv	r3, r3, r8
 8006d0e:	fb08 7313 	mls	r3, r8, r3, r7
 8006d12:	011b      	lsls	r3, r3, #4
 8006d14:	3332      	adds	r3, #50	; 0x32
 8006d16:	fbb3 f3f8 	udiv	r3, r3, r8
 8006d1a:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8006d1e:	f7ff fd6d 	bl	80067fc <HAL_RCC_GetPCLK2Freq>
 8006d22:	4360      	muls	r0, r4
 8006d24:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8006d28:	0092      	lsls	r2, r2, #2
 8006d2a:	fbb0 faf2 	udiv	sl, r0, r2
 8006d2e:	f7ff fd65 	bl	80067fc <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 8006d32:	4360      	muls	r0, r4
 8006d34:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006d38:	009b      	lsls	r3, r3, #2
 8006d3a:	fbb0 f3f3 	udiv	r3, r0, r3
 8006d3e:	fbb3 f3f8 	udiv	r3, r3, r8
 8006d42:	fb08 a313 	mls	r3, r8, r3, sl
 8006d46:	011b      	lsls	r3, r3, #4
 8006d48:	3332      	adds	r3, #50	; 0x32
 8006d4a:	fbb3 f3f8 	udiv	r3, r3, r8
 8006d4e:	f003 030f 	and.w	r3, r3, #15
 8006d52:	433b      	orrs	r3, r7
 8006d54:	4433      	add	r3, r6
 8006d56:	60ab      	str	r3, [r5, #8]
 8006d58:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8006d5c:	f7ff fd3e 	bl	80067dc <HAL_RCC_GetPCLK1Freq>
 8006d60:	fb04 f300 	mul.w	r3, r4, r0
 8006d64:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8006d68:	f04f 0864 	mov.w	r8, #100	; 0x64
 8006d6c:	00b6      	lsls	r6, r6, #2
 8006d6e:	fbb3 f3f6 	udiv	r3, r3, r6
 8006d72:	fbb3 f3f8 	udiv	r3, r3, r8
 8006d76:	011e      	lsls	r6, r3, #4
 8006d78:	f7ff fd30 	bl	80067dc <HAL_RCC_GetPCLK1Freq>
 8006d7c:	4360      	muls	r0, r4
 8006d7e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006d82:	009b      	lsls	r3, r3, #2
 8006d84:	fbb0 f7f3 	udiv	r7, r0, r3
 8006d88:	f7ff fd28 	bl	80067dc <HAL_RCC_GetPCLK1Freq>
 8006d8c:	4360      	muls	r0, r4
 8006d8e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8006d92:	009b      	lsls	r3, r3, #2
 8006d94:	fbb0 f3f3 	udiv	r3, r0, r3
 8006d98:	fbb3 f3f8 	udiv	r3, r3, r8
 8006d9c:	fb08 7313 	mls	r3, r8, r3, r7
 8006da0:	011b      	lsls	r3, r3, #4
 8006da2:	3332      	adds	r3, #50	; 0x32
 8006da4:	fbb3 f3f8 	udiv	r3, r3, r8
 8006da8:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8006dac:	f7ff fd16 	bl	80067dc <HAL_RCC_GetPCLK1Freq>
 8006db0:	4360      	muls	r0, r4
 8006db2:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8006db6:	0092      	lsls	r2, r2, #2
 8006db8:	fbb0 faf2 	udiv	sl, r0, r2
 8006dbc:	f7ff fd0e 	bl	80067dc <HAL_RCC_GetPCLK1Freq>
 8006dc0:	e7b7      	b.n	8006d32 <UART_SetConfig+0xa6>
 8006dc2:	bf00      	nop
 8006dc4:	40013800 	.word	0x40013800

08006dc8 <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 8006dc8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8006dca:	4604      	mov	r4, r0
 8006dcc:	460e      	mov	r6, r1
 8006dce:	4617      	mov	r7, r2
 8006dd0:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 8006dd2:	6821      	ldr	r1, [r4, #0]
 8006dd4:	680b      	ldr	r3, [r1, #0]
 8006dd6:	ea36 0303 	bics.w	r3, r6, r3
 8006dda:	d101      	bne.n	8006de0 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 8006ddc:	2000      	movs	r0, #0
}
 8006dde:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 8006de0:	1c6b      	adds	r3, r5, #1
 8006de2:	d0f7      	beq.n	8006dd4 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8006de4:	b995      	cbnz	r5, 8006e0c <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8006de6:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 8006de8:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 8006dea:	68da      	ldr	r2, [r3, #12]
 8006dec:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 8006df0:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8006df2:	695a      	ldr	r2, [r3, #20]
 8006df4:	f022 0201 	bic.w	r2, r2, #1
 8006df8:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 8006dfa:	2320      	movs	r3, #32
 8006dfc:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8006e00:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8006e04:	2300      	movs	r3, #0
 8006e06:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 8006e0a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8006e0c:	f7fe fb68 	bl	80054e0 <HAL_GetTick>
 8006e10:	1bc0      	subs	r0, r0, r7
 8006e12:	4285      	cmp	r5, r0
 8006e14:	d2dd      	bcs.n	8006dd2 <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 8006e16:	e7e6      	b.n	8006de6 <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

08006e18 <HAL_UART_Init>:
{
 8006e18:	b510      	push	{r4, lr}
  if(huart == NULL)
 8006e1a:	4604      	mov	r4, r0
 8006e1c:	b340      	cbz	r0, 8006e70 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 8006e1e:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8006e22:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8006e26:	b91b      	cbnz	r3, 8006e30 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8006e28:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8006e2c:	f001 fcce 	bl	80087cc <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8006e30:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8006e32:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8006e34:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8006e38:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 8006e3a:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8006e3c:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8006e40:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8006e42:	f7ff ff23 	bl	8006c8c <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8006e46:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006e48:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8006e4a:	691a      	ldr	r2, [r3, #16]
 8006e4c:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8006e50:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 8006e52:	695a      	ldr	r2, [r3, #20]
 8006e54:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8006e58:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 8006e5a:	68da      	ldr	r2, [r3, #12]
 8006e5c:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8006e60:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 8006e62:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006e64:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 8006e66:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 8006e6a:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 8006e6e:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8006e70:	2001      	movs	r0, #1
}
 8006e72:	bd10      	pop	{r4, pc}

08006e74 <HAL_UART_Transmit>:
{
 8006e74:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8006e78:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 8006e7a:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 8006e7e:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 8006e80:	2b20      	cmp	r3, #32
{
 8006e82:	460d      	mov	r5, r1
 8006e84:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 8006e86:	d14e      	bne.n	8006f26 <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 8006e88:	2900      	cmp	r1, #0
 8006e8a:	d049      	beq.n	8006f20 <HAL_UART_Transmit+0xac>
 8006e8c:	2a00      	cmp	r2, #0
 8006e8e:	d047      	beq.n	8006f20 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 8006e90:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8006e94:	2b01      	cmp	r3, #1
 8006e96:	d046      	beq.n	8006f26 <HAL_UART_Transmit+0xb2>
 8006e98:	2301      	movs	r3, #1
 8006e9a:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006e9e:	2300      	movs	r3, #0
 8006ea0:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8006ea2:	2321      	movs	r3, #33	; 0x21
 8006ea4:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 8006ea8:	f7fe fb1a 	bl	80054e0 <HAL_GetTick>
 8006eac:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 8006eae:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 8006eb2:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 8006eb6:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 8006eb8:	b29b      	uxth	r3, r3
 8006eba:	b96b      	cbnz	r3, 8006ed8 <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8006ebc:	463b      	mov	r3, r7
 8006ebe:	4632      	mov	r2, r6
 8006ec0:	2140      	movs	r1, #64	; 0x40
 8006ec2:	4620      	mov	r0, r4
 8006ec4:	f7ff ff80 	bl	8006dc8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8006ec8:	b9a8      	cbnz	r0, 8006ef6 <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 8006eca:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 8006ecc:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 8006ed0:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 8006ed4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 8006ed8:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006eda:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8006edc:	3b01      	subs	r3, #1
 8006ede:	b29b      	uxth	r3, r3
 8006ee0:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006ee2:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006ee4:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006ee6:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006eea:	4620      	mov	r0, r4
 8006eec:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8006eee:	d10e      	bne.n	8006f0e <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006ef0:	f7ff ff6a 	bl	8006dc8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8006ef4:	b110      	cbz	r0, 8006efc <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 8006ef6:	2003      	movs	r0, #3
 8006ef8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8006efc:	882b      	ldrh	r3, [r5, #0]
 8006efe:	6822      	ldr	r2, [r4, #0]
 8006f00:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8006f04:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 8006f06:	6923      	ldr	r3, [r4, #16]
 8006f08:	b943      	cbnz	r3, 8006f1c <HAL_UART_Transmit+0xa8>
          pData +=2U;
 8006f0a:	3502      	adds	r5, #2
 8006f0c:	e7d3      	b.n	8006eb6 <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8006f0e:	f7ff ff5b 	bl	8006dc8 <UART_WaitOnFlagUntilTimeout.constprop.3>
 8006f12:	2800      	cmp	r0, #0
 8006f14:	d1ef      	bne.n	8006ef6 <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 8006f16:	6823      	ldr	r3, [r4, #0]
 8006f18:	782a      	ldrb	r2, [r5, #0]
 8006f1a:	605a      	str	r2, [r3, #4]
 8006f1c:	3501      	adds	r5, #1
 8006f1e:	e7ca      	b.n	8006eb6 <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 8006f20:	2001      	movs	r0, #1
 8006f22:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 8006f26:	2002      	movs	r0, #2
}
 8006f28:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

08006f2c <HAL_UART_Transmit_DMA>:
{
 8006f2c:	b538      	push	{r3, r4, r5, lr}
 8006f2e:	4604      	mov	r4, r0
 8006f30:	4613      	mov	r3, r2
  if(huart->gState == HAL_UART_STATE_READY)
 8006f32:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8006f36:	2a20      	cmp	r2, #32
 8006f38:	d12a      	bne.n	8006f90 <HAL_UART_Transmit_DMA+0x64>
    if((pData == NULL) || (Size == 0U))
 8006f3a:	b339      	cbz	r1, 8006f8c <HAL_UART_Transmit_DMA+0x60>
 8006f3c:	b333      	cbz	r3, 8006f8c <HAL_UART_Transmit_DMA+0x60>
    __HAL_LOCK(huart);
 8006f3e:	f894 2038 	ldrb.w	r2, [r4, #56]	; 0x38
 8006f42:	2a01      	cmp	r2, #1
 8006f44:	d024      	beq.n	8006f90 <HAL_UART_Transmit_DMA+0x64>
 8006f46:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006f48:	2500      	movs	r5, #0
    __HAL_LOCK(huart);
 8006f4a:	f884 2038 	strb.w	r2, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8006f4e:	2221      	movs	r2, #33	; 0x21
    huart->TxXferCount = Size;
 8006f50:	84e3      	strh	r3, [r4, #38]	; 0x26
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006f52:	6b20      	ldr	r0, [r4, #48]	; 0x30
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006f54:	63e5      	str	r5, [r4, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 8006f56:	f884 2039 	strb.w	r2, [r4, #57]	; 0x39
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006f5a:	4a0e      	ldr	r2, [pc, #56]	; (8006f94 <HAL_UART_Transmit_DMA+0x68>)
    huart->TxXferSize = Size;
 8006f5c:	84a3      	strh	r3, [r4, #36]	; 0x24
    huart->pTxBuffPtr = pData;
 8006f5e:	6221      	str	r1, [r4, #32]
    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
 8006f60:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
 8006f62:	4a0d      	ldr	r2, [pc, #52]	; (8006f98 <HAL_UART_Transmit_DMA+0x6c>)
    huart->hdmatx->XferAbortCallback = NULL;
 8006f64:	6345      	str	r5, [r0, #52]	; 0x34
    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
 8006f66:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmatx->XferErrorCallback = UART_DMAError;
 8006f68:	4a0c      	ldr	r2, [pc, #48]	; (8006f9c <HAL_UART_Transmit_DMA+0x70>)
 8006f6a:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size);
 8006f6c:	6822      	ldr	r2, [r4, #0]
 8006f6e:	3204      	adds	r2, #4
 8006f70:	f7fe fe10 	bl	8005b94 <HAL_DMA_Start_IT>
    __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
 8006f74:	f06f 0240 	mvn.w	r2, #64	; 0x40
 8006f78:	6823      	ldr	r3, [r4, #0]
    return HAL_OK;
 8006f7a:	4628      	mov	r0, r5
    __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
 8006f7c:	601a      	str	r2, [r3, #0]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 8006f7e:	695a      	ldr	r2, [r3, #20]
    __HAL_UNLOCK(huart);
 8006f80:	f884 5038 	strb.w	r5, [r4, #56]	; 0x38
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 8006f84:	f042 0280 	orr.w	r2, r2, #128	; 0x80
 8006f88:	615a      	str	r2, [r3, #20]
    return HAL_OK;
 8006f8a:	bd38      	pop	{r3, r4, r5, pc}
      return HAL_ERROR;
 8006f8c:	2001      	movs	r0, #1
 8006f8e:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_BUSY;
 8006f90:	2002      	movs	r0, #2
}
 8006f92:	bd38      	pop	{r3, r4, r5, pc}
 8006f94:	08007033 	.word	0x08007033
 8006f98:	08007061 	.word	0x08007061
 8006f9c:	0800712d 	.word	0x0800712d

08006fa0 <HAL_UART_Receive_DMA>:
{
 8006fa0:	4613      	mov	r3, r2
  if(huart->RxState == HAL_UART_STATE_READY) 
 8006fa2:	f890 203a 	ldrb.w	r2, [r0, #58]	; 0x3a
{
 8006fa6:	b573      	push	{r0, r1, r4, r5, r6, lr}
  if(huart->RxState == HAL_UART_STATE_READY) 
 8006fa8:	2a20      	cmp	r2, #32
{
 8006faa:	4605      	mov	r5, r0
  if(huart->RxState == HAL_UART_STATE_READY) 
 8006fac:	d138      	bne.n	8007020 <HAL_UART_Receive_DMA+0x80>
    if((pData == NULL) || (Size == 0U))
 8006fae:	2900      	cmp	r1, #0
 8006fb0:	d034      	beq.n	800701c <HAL_UART_Receive_DMA+0x7c>
 8006fb2:	2b00      	cmp	r3, #0
 8006fb4:	d032      	beq.n	800701c <HAL_UART_Receive_DMA+0x7c>
    __HAL_LOCK(huart);
 8006fb6:	f890 2038 	ldrb.w	r2, [r0, #56]	; 0x38
 8006fba:	2a01      	cmp	r2, #1
 8006fbc:	d030      	beq.n	8007020 <HAL_UART_Receive_DMA+0x80>
 8006fbe:	2201      	movs	r2, #1
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006fc0:	2400      	movs	r4, #0
    __HAL_LOCK(huart);
 8006fc2:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8006fc6:	2222      	movs	r2, #34	; 0x22
    huart->pRxBuffPtr = pData;
 8006fc8:	6281      	str	r1, [r0, #40]	; 0x28
    huart->RxXferSize = Size;
 8006fca:	8583      	strh	r3, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8006fcc:	63c4      	str	r4, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 8006fce:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 8006fd2:	6b40      	ldr	r0, [r0, #52]	; 0x34
 8006fd4:	4a13      	ldr	r2, [pc, #76]	; (8007024 <HAL_UART_Receive_DMA+0x84>)
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 8006fd6:	682e      	ldr	r6, [r5, #0]
    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
 8006fd8:	6282      	str	r2, [r0, #40]	; 0x28
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 8006fda:	4a13      	ldr	r2, [pc, #76]	; (8007028 <HAL_UART_Receive_DMA+0x88>)
    huart->hdmarx->XferAbortCallback = NULL;
 8006fdc:	6344      	str	r4, [r0, #52]	; 0x34
    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
 8006fde:	62c2      	str	r2, [r0, #44]	; 0x2c
    huart->hdmarx->XferErrorCallback = UART_DMAError;
 8006fe0:	4a12      	ldr	r2, [pc, #72]	; (800702c <HAL_UART_Receive_DMA+0x8c>)
 8006fe2:	6302      	str	r2, [r0, #48]	; 0x30
    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
 8006fe4:	460a      	mov	r2, r1
 8006fe6:	1d31      	adds	r1, r6, #4
 8006fe8:	f7fe fdd4 	bl	8005b94 <HAL_DMA_Start_IT>
    return HAL_OK;
 8006fec:	4620      	mov	r0, r4
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006fee:	682b      	ldr	r3, [r5, #0]
 8006ff0:	9401      	str	r4, [sp, #4]
 8006ff2:	681a      	ldr	r2, [r3, #0]
 8006ff4:	9201      	str	r2, [sp, #4]
 8006ff6:	685a      	ldr	r2, [r3, #4]
    __HAL_UNLOCK(huart);
 8006ff8:	f885 4038 	strb.w	r4, [r5, #56]	; 0x38
    __HAL_UART_CLEAR_OREFLAG(huart);
 8006ffc:	9201      	str	r2, [sp, #4]
 8006ffe:	9a01      	ldr	r2, [sp, #4]
    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8007000:	68da      	ldr	r2, [r3, #12]
 8007002:	f442 7280 	orr.w	r2, r2, #256	; 0x100
 8007006:	60da      	str	r2, [r3, #12]
    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8007008:	695a      	ldr	r2, [r3, #20]
 800700a:	f042 0201 	orr.w	r2, r2, #1
 800700e:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8007010:	695a      	ldr	r2, [r3, #20]
 8007012:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8007016:	615a      	str	r2, [r3, #20]
}
 8007018:	b002      	add	sp, #8
 800701a:	bd70      	pop	{r4, r5, r6, pc}
      return HAL_ERROR;
 800701c:	2001      	movs	r0, #1
 800701e:	e7fb      	b.n	8007018 <HAL_UART_Receive_DMA+0x78>
    return HAL_BUSY;
 8007020:	2002      	movs	r0, #2
 8007022:	e7f9      	b.n	8007018 <HAL_UART_Receive_DMA+0x78>
 8007024:	0800706b 	.word	0x0800706b
 8007028:	08007121 	.word	0x08007121
 800702c:	0800712d 	.word	0x0800712d

08007030 <HAL_UART_TxCpltCallback>:
 8007030:	4770      	bx	lr

08007032 <UART_DMATransmitCplt>:
{
 8007032:	b508      	push	{r3, lr}
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8007034:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8007036:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8007038:	681b      	ldr	r3, [r3, #0]
 800703a:	f013 0320 	ands.w	r3, r3, #32
 800703e:	d10a      	bne.n	8007056 <UART_DMATransmitCplt+0x24>
    huart->TxXferCount = 0U;
 8007040:	84d3      	strh	r3, [r2, #38]	; 0x26
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
 8007042:	6813      	ldr	r3, [r2, #0]
 8007044:	695a      	ldr	r2, [r3, #20]
 8007046:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 800704a:	615a      	str	r2, [r3, #20]
    SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800704c:	68da      	ldr	r2, [r3, #12]
 800704e:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8007052:	60da      	str	r2, [r3, #12]
 8007054:	bd08      	pop	{r3, pc}
    HAL_UART_TxCpltCallback(huart);
 8007056:	4610      	mov	r0, r2
 8007058:	f7ff ffea 	bl	8007030 <HAL_UART_TxCpltCallback>
 800705c:	bd08      	pop	{r3, pc}

0800705e <HAL_UART_TxHalfCpltCallback>:
 800705e:	4770      	bx	lr

08007060 <UART_DMATxHalfCplt>:
{
 8007060:	b508      	push	{r3, lr}
  HAL_UART_TxHalfCpltCallback(huart);
 8007062:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8007064:	f7ff fffb 	bl	800705e <HAL_UART_TxHalfCpltCallback>
 8007068:	bd08      	pop	{r3, pc}

0800706a <UART_DMAReceiveCplt>:
{
 800706a:	b508      	push	{r3, lr}
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 800706c:	6803      	ldr	r3, [r0, #0]
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 800706e:	6a42      	ldr	r2, [r0, #36]	; 0x24
  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8007070:	681b      	ldr	r3, [r3, #0]
 8007072:	f013 0320 	ands.w	r3, r3, #32
 8007076:	d110      	bne.n	800709a <UART_DMAReceiveCplt+0x30>
    huart->RxXferCount = 0U;
 8007078:	85d3      	strh	r3, [r2, #46]	; 0x2e
    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800707a:	6813      	ldr	r3, [r2, #0]
 800707c:	68d9      	ldr	r1, [r3, #12]
 800707e:	f421 7180 	bic.w	r1, r1, #256	; 0x100
 8007082:	60d9      	str	r1, [r3, #12]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8007084:	6959      	ldr	r1, [r3, #20]
 8007086:	f021 0101 	bic.w	r1, r1, #1
 800708a:	6159      	str	r1, [r3, #20]
    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800708c:	6959      	ldr	r1, [r3, #20]
 800708e:	f021 0140 	bic.w	r1, r1, #64	; 0x40
 8007092:	6159      	str	r1, [r3, #20]
    huart->RxState = HAL_UART_STATE_READY;
 8007094:	2320      	movs	r3, #32
 8007096:	f882 303a 	strb.w	r3, [r2, #58]	; 0x3a
  HAL_UART_RxCpltCallback(huart);
 800709a:	4610      	mov	r0, r2
 800709c:	f001 fcd4 	bl	8008a48 <HAL_UART_RxCpltCallback>
 80070a0:	bd08      	pop	{r3, pc}

080070a2 <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80070a2:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 80070a6:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80070a8:	2b22      	cmp	r3, #34	; 0x22
 80070aa:	d136      	bne.n	800711a <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80070ac:	6883      	ldr	r3, [r0, #8]
 80070ae:	6901      	ldr	r1, [r0, #16]
 80070b0:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 80070b4:	6802      	ldr	r2, [r0, #0]
 80070b6:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80070b8:	d123      	bne.n	8007102 <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80070ba:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 80070bc:	b9e9      	cbnz	r1, 80070fa <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80070be:	f3c2 0208 	ubfx	r2, r2, #0, #9
 80070c2:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 80070c6:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 80070c8:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 80070ca:	3c01      	subs	r4, #1
 80070cc:	b2a4      	uxth	r4, r4
 80070ce:	85c4      	strh	r4, [r0, #46]	; 0x2e
 80070d0:	b98c      	cbnz	r4, 80070f6 <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 80070d2:	6803      	ldr	r3, [r0, #0]
 80070d4:	68da      	ldr	r2, [r3, #12]
 80070d6:	f022 0220 	bic.w	r2, r2, #32
 80070da:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 80070dc:	68da      	ldr	r2, [r3, #12]
 80070de:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 80070e2:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 80070e4:	695a      	ldr	r2, [r3, #20]
 80070e6:	f022 0201 	bic.w	r2, r2, #1
 80070ea:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 80070ec:	2320      	movs	r3, #32
 80070ee:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 80070f2:	f001 fca9 	bl	8008a48 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 80070f6:	2000      	movs	r0, #0
}
 80070f8:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 80070fa:	b2d2      	uxtb	r2, r2
 80070fc:	f823 2b01 	strh.w	r2, [r3], #1
 8007100:	e7e1      	b.n	80070c6 <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8007102:	b921      	cbnz	r1, 800710e <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 8007104:	1c59      	adds	r1, r3, #1
 8007106:	6852      	ldr	r2, [r2, #4]
 8007108:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 800710a:	701a      	strb	r2, [r3, #0]
 800710c:	e7dc      	b.n	80070c8 <UART_Receive_IT+0x26>
 800710e:	6852      	ldr	r2, [r2, #4]
 8007110:	1c59      	adds	r1, r3, #1
 8007112:	6281      	str	r1, [r0, #40]	; 0x28
 8007114:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8007118:	e7f7      	b.n	800710a <UART_Receive_IT+0x68>
    return HAL_BUSY;
 800711a:	2002      	movs	r0, #2
 800711c:	bd10      	pop	{r4, pc}

0800711e <HAL_UART_RxHalfCpltCallback>:
 800711e:	4770      	bx	lr

08007120 <UART_DMARxHalfCplt>:
{
 8007120:	b508      	push	{r3, lr}
  HAL_UART_RxHalfCpltCallback(huart); 
 8007122:	6a40      	ldr	r0, [r0, #36]	; 0x24
 8007124:	f7ff fffb 	bl	800711e <HAL_UART_RxHalfCpltCallback>
 8007128:	bd08      	pop	{r3, pc}

0800712a <HAL_UART_ErrorCallback>:
 800712a:	4770      	bx	lr

0800712c <UART_DMAError>:
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 800712c:	6a41      	ldr	r1, [r0, #36]	; 0x24
{
 800712e:	b508      	push	{r3, lr}
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
 8007130:	680b      	ldr	r3, [r1, #0]
 8007132:	695a      	ldr	r2, [r3, #20]
  if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
 8007134:	f891 0039 	ldrb.w	r0, [r1, #57]	; 0x39
 8007138:	2821      	cmp	r0, #33	; 0x21
 800713a:	d10a      	bne.n	8007152 <UART_DMAError+0x26>
 800713c:	0612      	lsls	r2, r2, #24
 800713e:	d508      	bpl.n	8007152 <UART_DMAError+0x26>
    huart->TxXferCount = 0U;
 8007140:	2200      	movs	r2, #0
 8007142:	84ca      	strh	r2, [r1, #38]	; 0x26
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
 8007144:	68da      	ldr	r2, [r3, #12]
 8007146:	f022 02c0 	bic.w	r2, r2, #192	; 0xc0
 800714a:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 800714c:	2220      	movs	r2, #32
 800714e:	f881 2039 	strb.w	r2, [r1, #57]	; 0x39
  dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 
 8007152:	695b      	ldr	r3, [r3, #20]
  if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
 8007154:	f891 203a 	ldrb.w	r2, [r1, #58]	; 0x3a
 8007158:	2a22      	cmp	r2, #34	; 0x22
 800715a:	d106      	bne.n	800716a <UART_DMAError+0x3e>
 800715c:	065b      	lsls	r3, r3, #25
 800715e:	d504      	bpl.n	800716a <UART_DMAError+0x3e>
    huart->RxXferCount = 0U;
 8007160:	2300      	movs	r3, #0
    UART_EndRxTransfer(huart);
 8007162:	4608      	mov	r0, r1
    huart->RxXferCount = 0U;
 8007164:	85cb      	strh	r3, [r1, #46]	; 0x2e
    UART_EndRxTransfer(huart);
 8007166:	f7ff fd83 	bl	8006c70 <UART_EndRxTransfer>
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 800716a:	6bcb      	ldr	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 800716c:	4608      	mov	r0, r1
  huart->ErrorCode |= HAL_UART_ERROR_DMA;
 800716e:	f043 0310 	orr.w	r3, r3, #16
 8007172:	63cb      	str	r3, [r1, #60]	; 0x3c
  HAL_UART_ErrorCallback(huart);
 8007174:	f7ff ffd9 	bl	800712a <HAL_UART_ErrorCallback>
 8007178:	bd08      	pop	{r3, pc}
	...

0800717c <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 800717c:	6803      	ldr	r3, [r0, #0]
{
 800717e:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8007180:	681a      	ldr	r2, [r3, #0]
{
 8007182:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8007184:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8007186:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8007188:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 800718a:	d107      	bne.n	800719c <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 800718c:	0696      	lsls	r6, r2, #26
 800718e:	d55a      	bpl.n	8007246 <HAL_UART_IRQHandler+0xca>
 8007190:	068d      	lsls	r5, r1, #26
 8007192:	d558      	bpl.n	8007246 <HAL_UART_IRQHandler+0xca>
}
 8007194:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8007198:	f7ff bf83 	b.w	80070a2 <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 800719c:	f015 0501 	ands.w	r5, r5, #1
 80071a0:	d102      	bne.n	80071a8 <HAL_UART_IRQHandler+0x2c>
 80071a2:	f411 7f90 	tst.w	r1, #288	; 0x120
 80071a6:	d04e      	beq.n	8007246 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 80071a8:	07d3      	lsls	r3, r2, #31
 80071aa:	d505      	bpl.n	80071b8 <HAL_UART_IRQHandler+0x3c>
 80071ac:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 80071ae:	bf42      	ittt	mi
 80071b0:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 80071b2:	f043 0301 	orrmi.w	r3, r3, #1
 80071b6:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80071b8:	0750      	lsls	r0, r2, #29
 80071ba:	d504      	bpl.n	80071c6 <HAL_UART_IRQHandler+0x4a>
 80071bc:	b11d      	cbz	r5, 80071c6 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 80071be:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80071c0:	f043 0302 	orr.w	r3, r3, #2
 80071c4:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80071c6:	0793      	lsls	r3, r2, #30
 80071c8:	d504      	bpl.n	80071d4 <HAL_UART_IRQHandler+0x58>
 80071ca:	b11d      	cbz	r5, 80071d4 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 80071cc:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80071ce:	f043 0304 	orr.w	r3, r3, #4
 80071d2:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80071d4:	0716      	lsls	r6, r2, #28
 80071d6:	d504      	bpl.n	80071e2 <HAL_UART_IRQHandler+0x66>
 80071d8:	b11d      	cbz	r5, 80071e2 <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 80071da:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80071dc:	f043 0308 	orr.w	r3, r3, #8
 80071e0:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 80071e2:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80071e4:	2b00      	cmp	r3, #0
 80071e6:	d066      	beq.n	80072b6 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 80071e8:	0695      	lsls	r5, r2, #26
 80071ea:	d504      	bpl.n	80071f6 <HAL_UART_IRQHandler+0x7a>
 80071ec:	0688      	lsls	r0, r1, #26
 80071ee:	d502      	bpl.n	80071f6 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 80071f0:	4620      	mov	r0, r4
 80071f2:	f7ff ff56 	bl	80070a2 <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80071f6:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 80071f8:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80071fa:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 80071fc:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 80071fe:	0711      	lsls	r1, r2, #28
 8007200:	d402      	bmi.n	8007208 <HAL_UART_IRQHandler+0x8c>
 8007202:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 8007206:	d01a      	beq.n	800723e <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 8007208:	f7ff fd32 	bl	8006c70 <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800720c:	6823      	ldr	r3, [r4, #0]
 800720e:	695a      	ldr	r2, [r3, #20]
 8007210:	0652      	lsls	r2, r2, #25
 8007212:	d510      	bpl.n	8007236 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8007214:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 8007216:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 8007218:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 800721c:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 800721e:	b150      	cbz	r0, 8007236 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 8007220:	4b25      	ldr	r3, [pc, #148]	; (80072b8 <HAL_UART_IRQHandler+0x13c>)
 8007222:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 8007224:	f7fe fcf4 	bl	8005c10 <HAL_DMA_Abort_IT>
 8007228:	2800      	cmp	r0, #0
 800722a:	d044      	beq.n	80072b6 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800722c:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 800722e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8007232:	6b43      	ldr	r3, [r0, #52]	; 0x34
 8007234:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 8007236:	4620      	mov	r0, r4
 8007238:	f7ff ff77 	bl	800712a <HAL_UART_ErrorCallback>
 800723c:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 800723e:	f7ff ff74 	bl	800712a <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 8007242:	63e5      	str	r5, [r4, #60]	; 0x3c
 8007244:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 8007246:	0616      	lsls	r6, r2, #24
 8007248:	d527      	bpl.n	800729a <HAL_UART_IRQHandler+0x11e>
 800724a:	060d      	lsls	r5, r1, #24
 800724c:	d525      	bpl.n	800729a <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 800724e:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8007252:	2a21      	cmp	r2, #33	; 0x21
 8007254:	d12f      	bne.n	80072b6 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8007256:	68a2      	ldr	r2, [r4, #8]
 8007258:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 800725c:	6a22      	ldr	r2, [r4, #32]
 800725e:	d117      	bne.n	8007290 <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 8007260:	8811      	ldrh	r1, [r2, #0]
 8007262:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8007266:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8007268:	6921      	ldr	r1, [r4, #16]
 800726a:	b979      	cbnz	r1, 800728c <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 800726c:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 800726e:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 8007270:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 8007272:	3a01      	subs	r2, #1
 8007274:	b292      	uxth	r2, r2
 8007276:	84e2      	strh	r2, [r4, #38]	; 0x26
 8007278:	b9ea      	cbnz	r2, 80072b6 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 800727a:	68da      	ldr	r2, [r3, #12]
 800727c:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8007280:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 8007282:	68da      	ldr	r2, [r3, #12]
 8007284:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8007288:	60da      	str	r2, [r3, #12]
 800728a:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 800728c:	3201      	adds	r2, #1
 800728e:	e7ee      	b.n	800726e <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 8007290:	1c51      	adds	r1, r2, #1
 8007292:	6221      	str	r1, [r4, #32]
 8007294:	7812      	ldrb	r2, [r2, #0]
 8007296:	605a      	str	r2, [r3, #4]
 8007298:	e7ea      	b.n	8007270 <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 800729a:	0650      	lsls	r0, r2, #25
 800729c:	d50b      	bpl.n	80072b6 <HAL_UART_IRQHandler+0x13a>
 800729e:	064a      	lsls	r2, r1, #25
 80072a0:	d509      	bpl.n	80072b6 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 80072a2:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 80072a4:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 80072a6:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 80072aa:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 80072ac:	2320      	movs	r3, #32
 80072ae:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 80072b2:	f7ff febd 	bl	8007030 <HAL_UART_TxCpltCallback>
 80072b6:	bd70      	pop	{r4, r5, r6, pc}
 80072b8:	080072bd 	.word	0x080072bd

080072bc <UART_DMAAbortOnError>:
{
 80072bc:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 80072be:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 80072c0:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 80072c2:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 80072c4:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 80072c6:	f7ff ff30 	bl	800712a <HAL_UART_ErrorCallback>
 80072ca:	bd08      	pop	{r3, pc}

080072cc <AD5318_Ctrl>:
    AD5318_Ctrl(0x57FF);
    AD5318_Ctrl(0x68FF);
    AD5318_Ctrl(0x79FF);
    HAL_Delay(1);
 }
void AD5318_Ctrl(uint16_t ShiftTarget) {
 80072cc:	b570      	push	{r4, r5, r6, lr}
    char i; /* serial counter */
//    printf("ShiftTarget : %x \r\n",ShiftTarget);
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
 80072ce:	2200      	movs	r2, #0
void AD5318_Ctrl(uint16_t ShiftTarget) {
 80072d0:	4605      	mov	r5, r0
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
 80072d2:	2104      	movs	r1, #4
 80072d4:	4824      	ldr	r0, [pc, #144]	; (8007368 <AD5318_Ctrl+0x9c>)
 80072d6:	f7fe fffd 	bl	80062d4 <HAL_GPIO_WritePin>
 80072da:	2410      	movs	r4, #16
    for (i=0;i < 16;i++) { /* loop through all 16 data bits */
        HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_SET); /* rise clk line again */
 80072dc:	4e22      	ldr	r6, [pc, #136]	; (8007368 <AD5318_Ctrl+0x9c>)
 80072de:	2201      	movs	r2, #1
 80072e0:	2108      	movs	r1, #8
 80072e2:	4630      	mov	r0, r6
 80072e4:	f7fe fff6 	bl	80062d4 <HAL_GPIO_WritePin>
        if (ShiftTarget & 0x8000) HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_SET);
 80072e8:	042b      	lsls	r3, r5, #16
 80072ea:	bf4c      	ite	mi
 80072ec:	2201      	movmi	r2, #1
        else HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET); /* set data bit */
 80072ee:	2200      	movpl	r2, #0
 80072f0:	2110      	movs	r1, #16
 80072f2:	4630      	mov	r0, r6
 80072f4:	f7fe ffee 	bl	80062d4 <HAL_GPIO_WritePin>
 80072f8:	3c01      	subs	r4, #1
        HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_RESET); /* lower clock line */
 80072fa:	2200      	movs	r2, #0
 80072fc:	2108      	movs	r1, #8
 80072fe:	4630      	mov	r0, r6
 8007300:	f7fe ffe8 	bl	80062d4 <HAL_GPIO_WritePin>
        ShiftTarget <<= 1;
 8007304:	006d      	lsls	r5, r5, #1
    for (i=0;i < 16;i++) { /* loop through all 16 data bits */
 8007306:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
        ShiftTarget <<= 1;
 800730a:	b2ad      	uxth	r5, r5
    for (i=0;i < 16;i++) { /* loop through all 16 data bits */
 800730c:	d1e7      	bne.n	80072de <AD5318_Ctrl+0x12>
    }
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET);        
 800730e:	2201      	movs	r2, #1
 8007310:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007314:	4815      	ldr	r0, [pc, #84]	; (800736c <AD5318_Ctrl+0xa0>)
 8007316:	f7fe ffdd 	bl	80062d4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 800731a:	200a      	movs	r0, #10
 800731c:	f000 fde6 	bl	8007eec <Pol_Delay_us>
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);    
 8007320:	4622      	mov	r2, r4
 8007322:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007326:	4811      	ldr	r0, [pc, #68]	; (800736c <AD5318_Ctrl+0xa0>)
 8007328:	f7fe ffd4 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_SET);    
 800732c:	2201      	movs	r2, #1
 800732e:	2104      	movs	r1, #4
 8007330:	480d      	ldr	r0, [pc, #52]	; (8007368 <AD5318_Ctrl+0x9c>)
 8007332:	f7fe ffcf 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET);
 8007336:	4622      	mov	r2, r4
 8007338:	2110      	movs	r1, #16
 800733a:	480b      	ldr	r0, [pc, #44]	; (8007368 <AD5318_Ctrl+0x9c>)
 800733c:	f7fe ffca 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET);            
 8007340:	2201      	movs	r2, #1
 8007342:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007346:	4809      	ldr	r0, [pc, #36]	; (800736c <AD5318_Ctrl+0xa0>)
 8007348:	f7fe ffc4 	bl	80062d4 <HAL_GPIO_WritePin>
    /* rise DAC SYNC line again */
    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
 800734c:	4622      	mov	r2, r4
 800734e:	2104      	movs	r1, #4
 8007350:	4805      	ldr	r0, [pc, #20]	; (8007368 <AD5318_Ctrl+0x9c>)
 8007352:	f7fe ffbf 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);            
 8007356:	4622      	mov	r2, r4
    
}
 8007358:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);            
 800735c:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007360:	4802      	ldr	r0, [pc, #8]	; (800736c <AD5318_Ctrl+0xa0>)
 8007362:	f7fe bfb7 	b.w	80062d4 <HAL_GPIO_WritePin>
 8007366:	bf00      	nop
 8007368:	40012000 	.word	0x40012000
 800736c:	40011400 	.word	0x40011400

08007370 <AD5318_Initialize>:
 void AD5318_Initialize(void){
 8007370:	b508      	push	{r3, lr}
    AD5318_Ctrl(0x800C);
 8007372:	f248 000c 	movw	r0, #32780	; 0x800c
 8007376:	f7ff ffa9 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0xA000);
 800737a:	f44f 4020 	mov.w	r0, #40960	; 0xa000
 800737e:	f7ff ffa5 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x0FFF);
 8007382:	f640 70ff 	movw	r0, #4095	; 0xfff
 8007386:	f7ff ffa1 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x13FF);
 800738a:	f241 30ff 	movw	r0, #5119	; 0x13ff
 800738e:	f7ff ff9d 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x24FF);
 8007392:	f242 40ff 	movw	r0, #9471	; 0x24ff
 8007396:	f7ff ff99 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x35FF);
 800739a:	f243 50ff 	movw	r0, #13823	; 0x35ff
 800739e:	f7ff ff95 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x46FF);
 80073a2:	f244 60ff 	movw	r0, #18175	; 0x46ff
 80073a6:	f7ff ff91 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x57FF);
 80073aa:	f245 70ff 	movw	r0, #22527	; 0x57ff
 80073ae:	f7ff ff8d 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x68FF);
 80073b2:	f646 00ff 	movw	r0, #26879	; 0x68ff
 80073b6:	f7ff ff89 	bl	80072cc <AD5318_Ctrl>
    AD5318_Ctrl(0x79FF);
 80073ba:	f647 10ff 	movw	r0, #31231	; 0x79ff
 80073be:	f7ff ff85 	bl	80072cc <AD5318_Ctrl>
 }
 80073c2:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    HAL_Delay(1);
 80073c6:	2001      	movs	r0, #1
 80073c8:	f7fe b890 	b.w	80054ec <HAL_Delay>

080073cc <BDA4601_atten_ctrl>:
    BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0);           
    BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0);               
}


void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
 80073cc:	b084      	sub	sp, #16
 80073ce:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80073d2:	ac0a      	add	r4, sp, #40	; 0x28
 80073d4:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 80073d8:	9e0e      	ldr	r6, [sp, #56]	; 0x38
 80073da:	f8bd 703c 	ldrh.w	r7, [sp, #60]	; 0x3c
    uint8_t i = 0;
//    uint8_t temp = 0;
//    printf("BDA4601_atten_ctrl : %x \r\n",data);
//    temp = 4|data;
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 80073de:	2200      	movs	r2, #0
 80073e0:	4639      	mov	r1, r7
 80073e2:	4681      	mov	r9, r0
 80073e4:	4630      	mov	r0, r6
void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
 80073e6:	f89d 5040 	ldrb.w	r5, [sp, #64]	; 0x40
 80073ea:	f8bd a02c 	ldrh.w	sl, [sp, #44]	; 0x2c
 80073ee:	f8dd 8030 	ldr.w	r8, [sp, #48]	; 0x30
 80073f2:	f8bd b034 	ldrh.w	fp, [sp, #52]	; 0x34
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 80073f6:	f7fe ff6d 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 80073fa:	2001      	movs	r0, #1
 80073fc:	f7fe f876 	bl	80054ec <HAL_Delay>
 8007400:	2406      	movs	r4, #6
    for(i = 0; i < 6; i++){
        if(data & 0x01){
 8007402:	f015 0201 	ands.w	r2, r5, #1
           HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_SET);//DATA
 8007406:	bf18      	it	ne
 8007408:	2201      	movne	r2, #1
//                     HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_SET);//DATA
//                     printf("1");

        }
       else{
       HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_RESET);//DATA
 800740a:	4659      	mov	r1, fp
 800740c:	4640      	mov	r0, r8
 800740e:	f7fe ff61 	bl	80062d4 <HAL_GPIO_WritePin>
//                HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA
//                printf("0");

       }

        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_SET);//CLOCK
 8007412:	2201      	movs	r2, #1
 8007414:	4651      	mov	r1, sl
 8007416:	4648      	mov	r0, r9
 8007418:	f7fe ff5c 	bl	80062d4 <HAL_GPIO_WritePin>
        HAL_Delay(1);
 800741c:	2001      	movs	r0, #1
 800741e:	f7fe f865 	bl	80054ec <HAL_Delay>
        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 8007422:	2200      	movs	r2, #0
 8007424:	4651      	mov	r1, sl
 8007426:	4648      	mov	r0, r9
 8007428:	f7fe ff54 	bl	80062d4 <HAL_GPIO_WritePin>
 800742c:	3c01      	subs	r4, #1
        HAL_Delay(1);
 800742e:	2001      	movs	r0, #1
 8007430:	f7fe f85c 	bl	80054ec <HAL_Delay>
    for(i = 0; i < 6; i++){
 8007434:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
        data >>= 1;
 8007438:	ea4f 0555 	mov.w	r5, r5, lsr #1
    for(i = 0; i < 6; i++){
 800743c:	d1e1      	bne.n	8007402 <BDA4601_atten_ctrl+0x36>
    }
    HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 800743e:	4622      	mov	r2, r4
 8007440:	4651      	mov	r1, sl
 8007442:	4648      	mov	r0, r9
 8007444:	f7fe ff46 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA
 8007448:	4622      	mov	r2, r4
 800744a:	f44f 6180 	mov.w	r1, #1024	; 0x400
 800744e:	4640      	mov	r0, r8
 8007450:	f7fe ff40 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8007454:	2001      	movs	r0, #1
 8007456:	f7fe f849 	bl	80054ec <HAL_Delay>
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_SET);//LE
 800745a:	4639      	mov	r1, r7
 800745c:	2201      	movs	r2, #1
 800745e:	4630      	mov	r0, r6
 8007460:	f7fe ff38 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_Delay(1);
 8007464:	2001      	movs	r0, #1
 8007466:	f7fe f841 	bl	80054ec <HAL_Delay>
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 800746a:	4622      	mov	r2, r4
 800746c:	4639      	mov	r1, r7
 800746e:	4630      	mov	r0, r6
}
 8007470:	e8bd 4ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007474:	b004      	add	sp, #16
    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
 8007476:	f7fe bf2d 	b.w	80062d4 <HAL_GPIO_WritePin>
	...

0800747c <BDA4601_Initialize>:
void BDA4601_Initialize(void){
 800747c:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    BDA4601_atten_ctrl(BDA4601_1_8G_DL1,0);           
 800747e:	2400      	movs	r4, #0
 8007480:	4b42      	ldr	r3, [pc, #264]	; (800758c <BDA4601_Initialize+0x110>)
 8007482:	9402      	str	r4, [sp, #8]
 8007484:	f103 0210 	add.w	r2, r3, #16
 8007488:	e892 0003 	ldmia.w	r2, {r0, r1}
 800748c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007490:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007492:	f7ff ff9b 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_DL2,0);           
 8007496:	4b3e      	ldr	r3, [pc, #248]	; (8007590 <BDA4601_Initialize+0x114>)
 8007498:	9402      	str	r4, [sp, #8]
 800749a:	f103 0210 	add.w	r2, r3, #16
 800749e:	e892 0003 	ldmia.w	r2, {r0, r1}
 80074a2:	e88d 0003 	stmia.w	sp, {r0, r1}
 80074a6:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80074a8:	f7ff ff90 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL1,0);           
 80074ac:	4b39      	ldr	r3, [pc, #228]	; (8007594 <BDA4601_Initialize+0x118>)
 80074ae:	9402      	str	r4, [sp, #8]
 80074b0:	f103 0210 	add.w	r2, r3, #16
 80074b4:	e892 0003 	ldmia.w	r2, {r0, r1}
 80074b8:	e88d 0003 	stmia.w	sp, {r0, r1}
 80074bc:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80074be:	f7ff ff85 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL2,0);           
 80074c2:	4b35      	ldr	r3, [pc, #212]	; (8007598 <BDA4601_Initialize+0x11c>)
 80074c4:	9402      	str	r4, [sp, #8]
 80074c6:	f103 0210 	add.w	r2, r3, #16
 80074ca:	e892 0003 	ldmia.w	r2, {r0, r1}
 80074ce:	e88d 0003 	stmia.w	sp, {r0, r1}
 80074d2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80074d4:	f7ff ff7a 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL3,0);           
 80074d8:	4b30      	ldr	r3, [pc, #192]	; (800759c <BDA4601_Initialize+0x120>)
 80074da:	9402      	str	r4, [sp, #8]
 80074dc:	f103 0210 	add.w	r2, r3, #16
 80074e0:	e892 0003 	ldmia.w	r2, {r0, r1}
 80074e4:	e88d 0003 	stmia.w	sp, {r0, r1}
 80074e8:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80074ea:	f7ff ff6f 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_1_8G_UL4,0);           
 80074ee:	4b2c      	ldr	r3, [pc, #176]	; (80075a0 <BDA4601_Initialize+0x124>)
 80074f0:	9402      	str	r4, [sp, #8]
 80074f2:	f103 0210 	add.w	r2, r3, #16
 80074f6:	e892 0003 	ldmia.w	r2, {r0, r1}
 80074fa:	e88d 0003 	stmia.w	sp, {r0, r1}
 80074fe:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007500:	f7ff ff64 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_DL1,0);           
 8007504:	4b27      	ldr	r3, [pc, #156]	; (80075a4 <BDA4601_Initialize+0x128>)
 8007506:	9402      	str	r4, [sp, #8]
 8007508:	f103 0210 	add.w	r2, r3, #16
 800750c:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007510:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007514:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007516:	f7ff ff59 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_DL2,0);           
 800751a:	4b23      	ldr	r3, [pc, #140]	; (80075a8 <BDA4601_Initialize+0x12c>)
 800751c:	9402      	str	r4, [sp, #8]
 800751e:	f103 0210 	add.w	r2, r3, #16
 8007522:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007526:	e88d 0003 	stmia.w	sp, {r0, r1}
 800752a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800752c:	f7ff ff4e 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL1,0);           
 8007530:	4b1e      	ldr	r3, [pc, #120]	; (80075ac <BDA4601_Initialize+0x130>)
 8007532:	9402      	str	r4, [sp, #8]
 8007534:	f103 0210 	add.w	r2, r3, #16
 8007538:	e892 0003 	ldmia.w	r2, {r0, r1}
 800753c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007540:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007542:	f7ff ff43 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL2,0);
 8007546:	4b1a      	ldr	r3, [pc, #104]	; (80075b0 <BDA4601_Initialize+0x134>)
 8007548:	9402      	str	r4, [sp, #8]
 800754a:	f103 0210 	add.w	r2, r3, #16
 800754e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007552:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007556:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007558:	f7ff ff38 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0);           
 800755c:	4b15      	ldr	r3, [pc, #84]	; (80075b4 <BDA4601_Initialize+0x138>)
 800755e:	9402      	str	r4, [sp, #8]
 8007560:	f103 0210 	add.w	r2, r3, #16
 8007564:	e892 0003 	ldmia.w	r2, {r0, r1}
 8007568:	e88d 0003 	stmia.w	sp, {r0, r1}
 800756c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800756e:	f7ff ff2d 	bl	80073cc <BDA4601_atten_ctrl>
    BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0);               
 8007572:	4b11      	ldr	r3, [pc, #68]	; (80075b8 <BDA4601_Initialize+0x13c>)
 8007574:	9402      	str	r4, [sp, #8]
 8007576:	f103 0210 	add.w	r2, r3, #16
 800757a:	e892 0003 	ldmia.w	r2, {r0, r1}
 800757e:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007582:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007584:	f7ff ff22 	bl	80073cc <BDA4601_atten_ctrl>
}
 8007588:	b004      	add	sp, #16
 800758a:	bd10      	pop	{r4, pc}
 800758c:	20000008 	.word	0x20000008
 8007590:	20000020 	.word	0x20000020
 8007594:	20000038 	.word	0x20000038
 8007598:	20000050 	.word	0x20000050
 800759c:	20000068 	.word	0x20000068
 80075a0:	20000080 	.word	0x20000080
 80075a4:	20000098 	.word	0x20000098
 80075a8:	200000b0 	.word	0x200000b0
 80075ac:	200000c8 	.word	0x200000c8
 80075b0:	200000e0 	.word	0x200000e0
 80075b4:	200000f8 	.word	0x200000f8
 80075b8:	20000110 	.word	0x20000110

080075bc <STH30_CreateCrc>:
	}
	return(crc16);
}

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 80075bc:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 80075be:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 80075c0:	4604      	mov	r4, r0
 80075c2:	1a22      	subs	r2, r4, r0
 80075c4:	b2d2      	uxtb	r2, r2
 80075c6:	4291      	cmp	r1, r2
 80075c8:	d801      	bhi.n	80075ce <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 80075ca:	4618      	mov	r0, r3
 80075cc:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 80075ce:	f814 2b01 	ldrb.w	r2, [r4], #1
 80075d2:	4053      	eors	r3, r2
 80075d4:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 80075d6:	f013 0f80 	tst.w	r3, #128	; 0x80
 80075da:	f102 32ff 	add.w	r2, r2, #4294967295
 80075de:	ea4f 0343 	mov.w	r3, r3, lsl #1
 80075e2:	bf18      	it	ne
 80075e4:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 80075e8:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 80075ec:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 80075ee:	d1f2      	bne.n	80075d6 <STH30_CreateCrc+0x1a>
 80075f0:	e7e7      	b.n	80075c2 <STH30_CreateCrc+0x6>

080075f2 <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 80075f2:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 80075f4:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 80075f6:	4605      	mov	r5, r0
 80075f8:	1a2c      	subs	r4, r5, r0
 80075fa:	b2e4      	uxtb	r4, r4
 80075fc:	42a1      	cmp	r1, r4
 80075fe:	d803      	bhi.n	8007608 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8007600:	1a9b      	subs	r3, r3, r2
 8007602:	4258      	negs	r0, r3
 8007604:	4158      	adcs	r0, r3
 8007606:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 8007608:	f815 4b01 	ldrb.w	r4, [r5], #1
 800760c:	4063      	eors	r3, r4
 800760e:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8007610:	f013 0f80 	tst.w	r3, #128	; 0x80
 8007614:	f104 34ff 	add.w	r4, r4, #4294967295
 8007618:	ea4f 0343 	mov.w	r3, r3, lsl #1
 800761c:	bf18      	it	ne
 800761e:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8007622:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8007626:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8007628:	d1f2      	bne.n	8007610 <STH30_CheckCrc+0x1e>
 800762a:	e7e5      	b.n	80075f8 <STH30_CheckCrc+0x6>

0800762c <Bit_Compare>:
  ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
  ALL_ATT_3_5G.data5 = ATTEN_3_5G_Initial_Val;        
  PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
}
#endif // PYJ.2019.07.26_END -- 
void Bit_Compare(PE43711_st ATT,uint8_t data,uint8_t Shift_Index){
 800762c:	b084      	sub	sp, #16
 800762e:	e88d 000f 	stmia.w	sp, {r0, r1, r2, r3}
 8007632:	f89d 2018 	ldrb.w	r2, [sp, #24]
 8007636:	f89d 301c 	ldrb.w	r3, [sp, #28]
 800763a:	9802      	ldr	r0, [sp, #8]
    if(data & (0x01 << Shift_Index)){
 800763c:	411a      	asrs	r2, r3
 800763e:	f012 0201 	ands.w	r2, r2, #1
 8007642:	f8bd 100c 	ldrh.w	r1, [sp, #12]
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_SET);//DATA
 8007646:	bf18      	it	ne
 8007648:	2201      	movne	r2, #1
    }
    else{
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
    }
}
 800764a:	b004      	add	sp, #16
        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
 800764c:	f7fe be42 	b.w	80062d4 <HAL_GPIO_WritePin>

08007650 <PE43711_ALL_atten_ctrl>:
void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){
 8007650:	b084      	sub	sp, #16
 8007652:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007656:	b085      	sub	sp, #20
 8007658:	ac0e      	add	r4, sp, #56	; 0x38
 800765a:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 800765e:	9d12      	ldr	r5, [sp, #72]	; 0x48
 8007660:	f8bd 604c 	ldrh.w	r6, [sp, #76]	; 0x4c
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8007664:	2200      	movs	r2, #0
 8007666:	4631      	mov	r1, r6
 8007668:	4680      	mov	r8, r0
 800766a:	4628      	mov	r0, r5
 800766c:	f8bd 903c 	ldrh.w	r9, [sp, #60]	; 0x3c
 8007670:	f7fe fe30 	bl	80062d4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8007674:	200a      	movs	r0, #10
 8007676:	f000 fc39 	bl	8007eec <Pol_Delay_us>
 800767a:	2700      	movs	r7, #0
//    printf("why not? \r\n");
    for(uint8_t i = 0; i < 8; i++){
      Bit_Compare(ATT.ATT0,ATT.data0,i);
 800767c:	f10d 0b48 	add.w	fp, sp, #72	; 0x48
      Bit_Compare(ATT.ATT1,ATT.data1,i);
 8007680:	f10d 0a64 	add.w	sl, sp, #100	; 0x64
      Bit_Compare(ATT.ATT0,ATT.data0,i);
 8007684:	f89d 3050 	ldrb.w	r3, [sp, #80]	; 0x50
 8007688:	b2fc      	uxtb	r4, r7
 800768a:	9302      	str	r3, [sp, #8]
 800768c:	9512      	str	r5, [sp, #72]	; 0x48
 800768e:	f8ad 604c 	strh.w	r6, [sp, #76]	; 0x4c
 8007692:	9403      	str	r4, [sp, #12]
 8007694:	e89b 0003 	ldmia.w	fp, {r0, r1}
 8007698:	e88d 0003 	stmia.w	sp, {r0, r1}
 800769c:	f8cd 8038 	str.w	r8, [sp, #56]	; 0x38
 80076a0:	f8ad 903c 	strh.w	r9, [sp, #60]	; 0x3c
 80076a4:	ab0e      	add	r3, sp, #56	; 0x38
 80076a6:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80076a8:	f7ff ffc0 	bl	800762c <Bit_Compare>
      Bit_Compare(ATT.ATT1,ATT.data1,i);
 80076ac:	f89d 306c 	ldrb.w	r3, [sp, #108]	; 0x6c
 80076b0:	9403      	str	r4, [sp, #12]
 80076b2:	9302      	str	r3, [sp, #8]
 80076b4:	e89a 0003 	ldmia.w	sl, {r0, r1}
 80076b8:	e88d 0003 	stmia.w	sp, {r0, r1}
 80076bc:	ab15      	add	r3, sp, #84	; 0x54
 80076be:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80076c0:	f7ff ffb4 	bl	800762c <Bit_Compare>
      Bit_Compare(ATT.ATT2,ATT.data2,i);
 80076c4:	f89d 3088 	ldrb.w	r3, [sp, #136]	; 0x88
 80076c8:	9403      	str	r4, [sp, #12]
 80076ca:	9302      	str	r3, [sp, #8]
 80076cc:	ab20      	add	r3, sp, #128	; 0x80
 80076ce:	e893 0003 	ldmia.w	r3, {r0, r1}
 80076d2:	e88d 0003 	stmia.w	sp, {r0, r1}
 80076d6:	ab1c      	add	r3, sp, #112	; 0x70
 80076d8:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80076da:	f7ff ffa7 	bl	800762c <Bit_Compare>
      Bit_Compare(ATT.ATT3,ATT.data3,i);
 80076de:	f89d 30a4 	ldrb.w	r3, [sp, #164]	; 0xa4
 80076e2:	9403      	str	r4, [sp, #12]
 80076e4:	9302      	str	r3, [sp, #8]
 80076e6:	ab27      	add	r3, sp, #156	; 0x9c
 80076e8:	e893 0003 	ldmia.w	r3, {r0, r1}
 80076ec:	e88d 0003 	stmia.w	sp, {r0, r1}
 80076f0:	ab23      	add	r3, sp, #140	; 0x8c
 80076f2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80076f4:	f7ff ff9a 	bl	800762c <Bit_Compare>
      Bit_Compare(ATT.ATT4,ATT.data4,i);
 80076f8:	f89d 30c0 	ldrb.w	r3, [sp, #192]	; 0xc0
 80076fc:	9403      	str	r4, [sp, #12]
 80076fe:	9302      	str	r3, [sp, #8]
 8007700:	ab2e      	add	r3, sp, #184	; 0xb8
 8007702:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007706:	e88d 0003 	stmia.w	sp, {r0, r1}
 800770a:	ab2a      	add	r3, sp, #168	; 0xa8
 800770c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 800770e:	f7ff ff8d 	bl	800762c <Bit_Compare>
      Bit_Compare(ATT.ATT5,ATT.data5,i);
 8007712:	f89d 30dc 	ldrb.w	r3, [sp, #220]	; 0xdc
 8007716:	9403      	str	r4, [sp, #12]
 8007718:	9302      	str	r3, [sp, #8]
 800771a:	ab35      	add	r3, sp, #212	; 0xd4
 800771c:	e893 0003 	ldmia.w	r3, {r0, r1}
 8007720:	e88d 0003 	stmia.w	sp, {r0, r1}
 8007724:	ab31      	add	r3, sp, #196	; 0xc4
 8007726:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8007728:	f7ff ff80 	bl	800762c <Bit_Compare>
  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK
 800772c:	2201      	movs	r2, #1
 800772e:	4649      	mov	r1, r9
 8007730:	4640      	mov	r0, r8
 8007732:	f7fe fdcf 	bl	80062d4 <HAL_GPIO_WritePin>
  		Pol_Delay_us(10);
 8007736:	200a      	movs	r0, #10
 8007738:	f000 fbd8 	bl	8007eec <Pol_Delay_us>
 800773c:	3701      	adds	r7, #1
  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK
 800773e:	2200      	movs	r2, #0
 8007740:	4649      	mov	r1, r9
 8007742:	4640      	mov	r0, r8
 8007744:	f7fe fdc6 	bl	80062d4 <HAL_GPIO_WritePin>
    for(uint8_t i = 0; i < 8; i++){
 8007748:	2f08      	cmp	r7, #8
 800774a:	d19b      	bne.n	8007684 <PE43711_ALL_atten_ctrl+0x34>
    }
    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
 800774c:	2200      	movs	r2, #0
 800774e:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007752:	480a      	ldr	r0, [pc, #40]	; (800777c <PE43711_ALL_atten_ctrl+0x12c>)
 8007754:	f7fe fdbe 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_SET);//LE
 8007758:	4631      	mov	r1, r6
 800775a:	2201      	movs	r2, #1
 800775c:	4628      	mov	r0, r5
 800775e:	f7fe fdb9 	bl	80062d4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8007762:	200a      	movs	r0, #10
 8007764:	f000 fbc2 	bl	8007eec <Pol_Delay_us>
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8007768:	2200      	movs	r2, #0
 800776a:	4631      	mov	r1, r6
 800776c:	4628      	mov	r0, r5
}
 800776e:	b005      	add	sp, #20
 8007770:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007774:	b004      	add	sp, #16
    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
 8007776:	f7fe bdad 	b.w	80062d4 <HAL_GPIO_WritePin>
 800777a:	bf00      	nop
 800777c:	40010c00 	.word	0x40010c00

08007780 <PE43711_PinInit>:
void PE43711_PinInit(void){
 8007780:	b5f0      	push	{r4, r5, r6, r7, lr}
  ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1;
 8007782:	4c27      	ldr	r4, [pc, #156]	; (8007820 <PE43711_PinInit+0xa0>)
 8007784:	4e27      	ldr	r6, [pc, #156]	; (8007824 <PE43711_PinInit+0xa4>)
 8007786:	4625      	mov	r5, r4
 8007788:	ce0f      	ldmia	r6!, {r0, r1, r2, r3}
 800778a:	c50f      	stmia	r5!, {r0, r1, r2, r3}
 800778c:	e896 0003 	ldmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
 8007790:	4f25      	ldr	r7, [pc, #148]	; (8007828 <PE43711_PinInit+0xa8>)
 8007792:	f104 061c 	add.w	r6, r4, #28
  ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1;
 8007796:	e885 0003 	stmia.w	r5, {r0, r1}
  ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
 800779a:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 800779c:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 800779e:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 80077a2:	4f22      	ldr	r7, [pc, #136]	; (800782c <PE43711_PinInit+0xac>)
  ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
 80077a4:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 80077a8:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 80077aa:	f104 0638 	add.w	r6, r4, #56	; 0x38
 80077ae:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80077b0:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2;
 80077b4:	4f1e      	ldr	r7, [pc, #120]	; (8007830 <PE43711_PinInit+0xb0>)
  ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
 80077b6:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2;
 80077ba:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 80077bc:	f104 0654 	add.w	r6, r4, #84	; 0x54
 80077c0:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80077c2:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2;    
 80077c6:	4f1b      	ldr	r7, [pc, #108]	; (8007834 <PE43711_PinInit+0xb4>)
  ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2;
 80077c8:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2;    
 80077cc:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 80077ce:	f104 0670 	add.w	r6, r4, #112	; 0x70
 80077d2:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80077d4:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2;
 80077d8:	4f17      	ldr	r7, [pc, #92]	; (8007838 <PE43711_PinInit+0xb8>)
  ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2;    
 80077da:	e886 0003 	stmia.w	r6, {r0, r1}
  ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2;
 80077de:	cf0f      	ldmia	r7!, {r0, r1, r2, r3}
 80077e0:	f104 068c 	add.w	r6, r4, #140	; 0x8c
 80077e4:	c60f      	stmia	r6!, {r0, r1, r2, r3}
 80077e6:	e897 0003 	ldmia.w	r7, {r0, r1}
  ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
 80077ea:	2300      	movs	r3, #0
void PE43711_PinInit(void){
 80077ec:	b0a7      	sub	sp, #156	; 0x9c
  ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2;
 80077ee:	e886 0003 	stmia.w	r6, {r0, r1}
  PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 80077f2:	2298      	movs	r2, #152	; 0x98
 80077f4:	4629      	mov	r1, r5
 80077f6:	4668      	mov	r0, sp
  ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
 80077f8:	7623      	strb	r3, [r4, #24]
  ALL_ATT_3_5G.data1 = ATTEN_3_5G_Initial_Val;
 80077fa:	f884 3034 	strb.w	r3, [r4, #52]	; 0x34
  ALL_ATT_3_5G.data2 = ATTEN_3_5G_Initial_Val;
 80077fe:	f884 3050 	strb.w	r3, [r4, #80]	; 0x50
  ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val;
 8007802:	f884 306c 	strb.w	r3, [r4, #108]	; 0x6c
  ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
 8007806:	f884 3088 	strb.w	r3, [r4, #136]	; 0x88
  ALL_ATT_3_5G.data5 = ATTEN_3_5G_Initial_Val;        
 800780a:	f884 30a4 	strb.w	r3, [r4, #164]	; 0xa4
  PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 800780e:	f001 ff13 	bl	8009638 <memcpy>
 8007812:	e894 000f 	ldmia.w	r4, {r0, r1, r2, r3}
 8007816:	f7ff ff1b 	bl	8007650 <PE43711_ALL_atten_ctrl>
}
 800781a:	b027      	add	sp, #156	; 0x9c
 800781c:	bdf0      	pop	{r4, r5, r6, r7, pc}
 800781e:	bf00      	nop
 8007820:	200004d8 	.word	0x200004d8
 8007824:	20000188 	.word	0x20000188
 8007828:	20000158 	.word	0x20000158
 800782c:	20000128 	.word	0x20000128
 8007830:	200001a0 	.word	0x200001a0
 8007834:	20000170 	.word	0x20000170
 8007838:	20000140 	.word	0x20000140

0800783c <N_Divider_Reg_Create>:


double N_Reg_Value_Calc(double val){
    return  val / 1000;
}
uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){
 800783c:	b570      	push	{r4, r5, r6, lr}
 800783e:	2302      	movs	r3, #2
 8007840:	4604      	mov	r4, r0
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 14; i++){
        if(_FRAC & 0x01)
            ret += shift_bit << i;
 8007842:	2501      	movs	r5, #1
uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){
 8007844:	2000      	movs	r0, #0
        if(_FRAC & 0x01)
 8007846:	07e6      	lsls	r6, r4, #31
            ret += shift_bit << i;
 8007848:	bf48      	it	mi
 800784a:	fa05 f603 	lslmi.w	r6, r5, r3
 800784e:	f103 0301 	add.w	r3, r3, #1
 8007852:	bf48      	it	mi
 8007854:	1980      	addmi	r0, r0, r6
    for(i = 2; i < 14; i++){
 8007856:	2b0e      	cmp	r3, #14
        _FRAC = _FRAC >> 1;
 8007858:	ea4f 0454 	mov.w	r4, r4, lsr #1
    for(i = 2; i < 14; i++){
 800785c:	d1f3      	bne.n	8007846 <N_Divider_Reg_Create+0xa>
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
#endif /* DEBUG_PRINT */
    for(i = 14; i < 22; i++){
        if(_INT & 0x01)
            ret += shift_bit << i;
 800785e:	2401      	movs	r4, #1
        if(_INT & 0x01)
 8007860:	07cd      	lsls	r5, r1, #31
            ret += shift_bit << i;
 8007862:	bf48      	it	mi
 8007864:	fa04 f503 	lslmi.w	r5, r4, r3
 8007868:	f103 0301 	add.w	r3, r3, #1
 800786c:	bf48      	it	mi
 800786e:	1940      	addmi	r0, r0, r5
    for(i = 14; i < 22; i++){
 8007870:	2b16      	cmp	r3, #22
        _INT = _INT >> 1;
 8007872:	ea4f 0151 	mov.w	r1, r1, lsr #1
    for(i = 14; i < 22; i++){
 8007876:	d1f3      	bne.n	8007860 <N_Divider_Reg_Create+0x24>
    }  
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
#endif /* DEBUG_PRINT */
    if(_FASTLOCK & 0x01)
 8007878:	07d3      	lsls	r3, r2, #31
            ret += shift_bit << i;
 800787a:	bf48      	it	mi
 800787c:	f500 0080 	addmi.w	r0, r0, #4194304	; 0x400000
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */

    return ret;
}
 8007880:	bd70      	pop	{r4, r5, r6, pc}

08007882 <R_Divider_Reg_Create>:
uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){
 8007882:	b5f0      	push	{r4, r5, r6, r7, lr}
 8007884:	4606      	mov	r6, r0
 8007886:	2001      	movs	r0, #1
 8007888:	2402      	movs	r4, #2
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 14; i++){
        if(_MOD & 0x01)
            ret += shift_bit << i;
 800788a:	4607      	mov	r7, r0
uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){
 800788c:	f89d 5014 	ldrb.w	r5, [sp, #20]
        if(_MOD & 0x01)
 8007890:	f016 0f01 	tst.w	r6, #1
            ret += shift_bit << i;
 8007894:	bf18      	it	ne
 8007896:	fa07 fe04 	lslne.w	lr, r7, r4
 800789a:	f104 0401 	add.w	r4, r4, #1
 800789e:	bf18      	it	ne
 80078a0:	4470      	addne	r0, lr
    for(i = 2; i < 14; i++){
 80078a2:	2c0e      	cmp	r4, #14
        _MOD = _MOD >> 1;
 80078a4:	ea4f 0656 	mov.w	r6, r6, lsr #1
    for(i = 2; i < 14; i++){
 80078a8:	d1f2      	bne.n	8007890 <R_Divider_Reg_Create+0xe>
    }
    for(i = 14; i < 18; i++){
        if(_RCOUNTER & 0x01)
            ret += shift_bit << i;
 80078aa:	2601      	movs	r6, #1
        if(_RCOUNTER & 0x01)
 80078ac:	07cf      	lsls	r7, r1, #31
            ret += shift_bit << i;
 80078ae:	bf48      	it	mi
 80078b0:	fa06 f704 	lslmi.w	r7, r6, r4
 80078b4:	f104 0401 	add.w	r4, r4, #1
 80078b8:	bf48      	it	mi
 80078ba:	19c0      	addmi	r0, r0, r7
    for(i = 14; i < 18; i++){
 80078bc:	2c12      	cmp	r4, #18
        _RCOUNTER = _RCOUNTER >> 1;
 80078be:	ea4f 0151 	mov.w	r1, r1, lsr #1
    for(i = 14; i < 18; i++){
 80078c2:	d1f3      	bne.n	80078ac <R_Divider_Reg_Create+0x2a>
    }  
    if(_PRESCALER & 0x01)
 80078c4:	07d7      	lsls	r7, r2, #31
            ret += shift_bit << i++;
 80078c6:	bf44      	itt	mi
 80078c8:	f500 2080 	addmi.w	r0, r0, #262144	; 0x40000
 80078cc:	2413      	movmi	r4, #19
    if(_RESERVED & 0x01)
 80078ce:	07de      	lsls	r6, r3, #31
            ret += shift_bit << i++;
 80078d0:	bf42      	ittt	mi
 80078d2:	2301      	movmi	r3, #1
 80078d4:	fa03 f404 	lslmi.w	r4, r3, r4
 80078d8:	1900      	addmi	r0, r0, r4
    for(i = 19; i < 22; i++){
        if(_MUXOUT & 0x01)
 80078da:	07ec      	lsls	r4, r5, #31
            ret += shift_bit << i;
 80078dc:	bf48      	it	mi
 80078de:	f500 2000 	addmi.w	r0, r0, #524288	; 0x80000
        _MUXOUT = _MUXOUT >> 1;
    }   
    if(LOAD_CONTROL & 0x01)
 80078e2:	f89d 3018 	ldrb.w	r3, [sp, #24]
        if(_MUXOUT & 0x01)
 80078e6:	07a9      	lsls	r1, r5, #30
            ret += shift_bit << i;
 80078e8:	bf48      	it	mi
 80078ea:	f500 1080 	addmi.w	r0, r0, #1048576	; 0x100000
        if(_MUXOUT & 0x01)
 80078ee:	076a      	lsls	r2, r5, #29
            ret += shift_bit << i;
 80078f0:	bf48      	it	mi
 80078f2:	f500 1000 	addmi.w	r0, r0, #2097152	; 0x200000
    if(LOAD_CONTROL & 0x01)
 80078f6:	07db      	lsls	r3, r3, #31
        ret += shift_bit << i++;
 80078f8:	bf48      	it	mi
 80078fa:	f500 0080 	addmi.w	r0, r0, #4194304	; 0x400000

    return ret;
}
 80078fe:	bdf0      	pop	{r4, r5, r6, r7, pc}

08007900 <ADF4153_Freq_Calc>:

ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
 8007900:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007904:	4616      	mov	r6, r2
    adf4153_st temp_adf4153;
    double temp = 0;
    ADF4153_R_N_Reg_st temp_reg;
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 8007906:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
 800790a:	f89d b038 	ldrb.w	fp, [sp, #56]	; 0x38
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 800790e:	2500      	movs	r5, #0
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 8007910:	fb02 f20b 	mul.w	r2, r2, fp
ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
 8007914:	4682      	mov	sl, r0
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 8007916:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){
 800791a:	461f      	mov	r7, r3
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 800791c:	17d3      	asrs	r3, r2, #31
 800791e:	f7fd fc15 	bl	800514c <__aeabi_uldivmod>
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 8007922:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
 8007924:	462b      	mov	r3, r5
    temp_adf4153.PFD_Value  =  REFin / (R_Counter * 1000);
 8007926:	4680      	mov	r8, r0
 8007928:	4689      	mov	r9, r1
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 800792a:	f7fd fc0f 	bl	800514c <__aeabi_uldivmod>
 800792e:	ebc0 1440 	rsb	r4, r0, r0, lsl #5
    temp_adf4153.N_Value    =  N_Reg_Value_Calc(((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)));
 8007932:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
 8007936:	2300      	movs	r3, #0
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 8007938:	eb00 0484 	add.w	r4, r0, r4, lsl #2
    temp_adf4153.N_Value    =  N_Reg_Value_Calc(((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)));
 800793c:	4639      	mov	r1, r7
 800793e:	4630      	mov	r0, r6
 8007940:	f7fd fc04 	bl	800514c <__aeabi_uldivmod>
 8007944:	f7fc fe06 	bl	8004554 <__aeabi_ul2d>
 8007948:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
 800794c:	4606      	mov	r6, r0
 800794e:	460f      	mov	r7, r1
 8007950:	2300      	movs	r3, #0
 8007952:	4640      	mov	r0, r8
 8007954:	4649      	mov	r1, r9
 8007956:	f7fd fbf9 	bl	800514c <__aeabi_uldivmod>
 800795a:	f7fc fdfb 	bl	8004554 <__aeabi_ul2d>
 800795e:	4602      	mov	r2, r0
 8007960:	460b      	mov	r3, r1
 8007962:	4630      	mov	r0, r6
 8007964:	4639      	mov	r1, r7
 8007966:	f7fc ff55 	bl	8004814 <__aeabi_ddiv>
    return  val / 1000;
 800796a:	2200      	movs	r2, #0
 800796c:	4b1a      	ldr	r3, [pc, #104]	; (80079d8 <ADF4153_Freq_Calc+0xd8>)
 800796e:	f7fc ff51 	bl	8004814 <__aeabi_ddiv>
 8007972:	460f      	mov	r7, r1
 8007974:	4606      	mov	r6, r0
    temp_adf4153.INT_Value  =   temp_adf4153.N_Value ;
 8007976:	f7fd f8fb 	bl	8004b70 <__aeabi_d2uiz>
 800797a:	fa1f f880 	uxth.w	r8, r0
#ifdef DEBUG_PRINT
    printf("\r\ntemp_adf4153.N_Value : %f  temp_adf4153.INT_Value : %f  temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value);
#endif /* DEBUG_PRINT */
    temp = temp_adf4153.N_Value - (double)temp_adf4153.INT_Value;
 800797e:	4640      	mov	r0, r8
 8007980:	f7fc fda8 	bl	80044d4 <__aeabi_ui2d>
 8007984:	460b      	mov	r3, r1
 8007986:	4602      	mov	r2, r0
 8007988:	4639      	mov	r1, r7
 800798a:	4630      	mov	r0, r6
 800798c:	f7fc fc64 	bl	8004258 <__aeabi_dsub>
#ifdef DEBUG_PRINT
    printf("\r\n temp_adf4153.N_Value - (double)temp_adf4153.INT_Value) : %f  temp * (double)temp_adf4153.MOD_Value : %f \r\n",temp,temp * (double)temp_adf4153.MOD_Value);
#endif /* DEBUG_PRINT */
    temp_adf4153.FRAC_Value =  (float)temp * temp_adf4153.MOD_Value;
 8007990:	f7fd f90e 	bl	8004bb0 <__aeabi_d2f>
    temp_adf4153.MOD_Value  =  (temp_adf4153.PFD_Value / chspacing) * 1000;
 8007994:	00e4      	lsls	r4, r4, #3
 8007996:	b2a4      	uxth	r4, r4
    temp_adf4153.FRAC_Value =  (float)temp * temp_adf4153.MOD_Value;
 8007998:	4606      	mov	r6, r0
 800799a:	4620      	mov	r0, r4
 800799c:	f7fd fa12 	bl	8004dc4 <__aeabi_i2f>
 80079a0:	4601      	mov	r1, r0
 80079a2:	4630      	mov	r0, r6
 80079a4:	f7fd fa62 	bl	8004e6c <__aeabi_fmul>
 80079a8:	f7fd fbb0 	bl	800510c <__aeabi_f2uiz>
#ifdef DEBUG_PRINT
    printf("\r\n");    

    printf("R0: %x  R1: %x \r\n",N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0),R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0));   
#endif /* DEBUG_PRINT */
    temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0);
 80079ac:	462a      	mov	r2, r5
 80079ae:	4641      	mov	r1, r8
 80079b0:	b280      	uxth	r0, r0
 80079b2:	f7ff ff43 	bl	800783c <N_Divider_Reg_Create>
    temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0);
 80079b6:	2302      	movs	r3, #2
    temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0);
 80079b8:	4606      	mov	r6, r0
    temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0);
 80079ba:	9300      	str	r3, [sp, #0]
 80079bc:	9501      	str	r5, [sp, #4]
 80079be:	462b      	mov	r3, r5
 80079c0:	2201      	movs	r2, #1
 80079c2:	4659      	mov	r1, fp
 80079c4:	4620      	mov	r0, r4
 80079c6:	f7ff ff5c 	bl	8007882 <R_Divider_Reg_Create>

    return temp_reg;
 80079ca:	e88a 0041 	stmia.w	sl, {r0, r6}
//    R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,1,0); //prescaler 1 : 8/9 0: 4/5
}
 80079ce:	4650      	mov	r0, sl
 80079d0:	b003      	add	sp, #12
 80079d2:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80079d6:	bf00      	nop
 80079d8:	408f4000 	.word	0x408f4000

080079dc <ADF4153_Initialize>:
        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
        ADF4153_Module_Ctrl(Pll_test2,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);                  
    //  ADF4153_Module_Ctrl(Pll_test2,0x313840,0x14BE81,0x13C2,0x3);
      HAL_Delay(1);
#endif // PYJ.2019.08.09_END -- 
  if(  Flash_Save_data[INDEX_PLL_3_5G_LOW_H] == 0 
 80079dc:	4b0e      	ldr	r3, [pc, #56]	; (8007a18 <ADF4153_Initialize+0x3c>)
 80079de:	7f9a      	ldrb	r2, [r3, #30]
 80079e0:	b94a      	cbnz	r2, 80079f6 <ADF4153_Initialize+0x1a>
    && Flash_Save_data[INDEX_PLL_3_5G_LOW_M] == 0
 80079e2:	7fda      	ldrb	r2, [r3, #31]
 80079e4:	b93a      	cbnz	r2, 80079f6 <ADF4153_Initialize+0x1a>
    &&Flash_Save_data[INDEX_PLL_3_5G_LOW_L] == 0)
 80079e6:	f893 2020 	ldrb.w	r2, [r3, #32]
 80079ea:	b922      	cbnz	r2, 80079f6 <ADF4153_Initialize+0x1a>
  {
    Flash_Save_data[INDEX_PLL_3_5G_LOW_H] = ((34655 & 0xFF0000) >> 16);
    Flash_Save_data[INDEX_PLL_3_5G_LOW_M] = ((34655 & 0x00FF00) >> 8);
 80079ec:	2287      	movs	r2, #135	; 0x87
 80079ee:	77da      	strb	r2, [r3, #31]
    Flash_Save_data[INDEX_PLL_3_5G_LOW_L] = (34655 & 0x0000FF);
 80079f0:	225f      	movs	r2, #95	; 0x5f
 80079f2:	f883 2020 	strb.w	r2, [r3, #32]
  }
  if(Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] == 0 
 80079f6:	f893 2021 	ldrb.w	r2, [r3, #33]	; 0x21
 80079fa:	b95a      	cbnz	r2, 8007a14 <ADF4153_Initialize+0x38>
    && Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] == 0 
 80079fc:	f893 2022 	ldrb.w	r2, [r3, #34]	; 0x22
 8007a00:	b942      	cbnz	r2, 8007a14 <ADF4153_Initialize+0x38>
    && Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] == 0)
 8007a02:	f893 2023 	ldrb.w	r2, [r3, #35]	; 0x23
 8007a06:	b92a      	cbnz	r2, 8007a14 <ADF4153_Initialize+0x38>
  {
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] = ((39345 & 0xFF0000) >> 16);
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] = ((39345 & 0x00FF00) >> 8);    
 8007a08:	2299      	movs	r2, #153	; 0x99
 8007a0a:	f883 2022 	strb.w	r2, [r3, #34]	; 0x22
    Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] = (39345  & 0x0000FF);    
 8007a0e:	22b1      	movs	r2, #177	; 0xb1
 8007a10:	f883 2023 	strb.w	r2, [r3, #35]	; 0x23
 8007a14:	4770      	bx	lr
 8007a16:	bf00      	nop
 8007a18:	20000580 	.word	0x20000580

08007a1c <ADF4153_Module_Ctrl>:
     }


}

void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){
 8007a1c:	b084      	sub	sp, #16
 8007a1e:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007a22:	b085      	sub	sp, #20
 8007a24:	ac0e      	add	r4, sp, #56	; 0x38
 8007a26:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
    R3  = R3  & 0x0007FF;
 8007a2a:	9b17      	ldr	r3, [sp, #92]	; 0x5c
 8007a2c:	f8bd 803c 	ldrh.w	r8, [sp, #60]	; 0x3c
 8007a30:	f3c3 0a0a 	ubfx	sl, r3, #0, #11
    R2 = R2 & 0x00FFFF;
 8007a34:	f8bd 3058 	ldrh.w	r3, [sp, #88]	; 0x58
 8007a38:	9c10      	ldr	r4, [sp, #64]	; 0x40
 8007a3a:	9301      	str	r3, [sp, #4]
    R1 = R1 & 0xFFFFFF;
 8007a3c:	9b15      	ldr	r3, [sp, #84]	; 0x54
 8007a3e:	f8bd 5044 	ldrh.w	r5, [sp, #68]	; 0x44
 8007a42:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007a46:	9302      	str	r3, [sp, #8]
    R0 = R0 & 0xFFFFFF;
 8007a48:	9b14      	ldr	r3, [sp, #80]	; 0x50
 8007a4a:	9e12      	ldr	r6, [sp, #72]	; 0x48
 8007a4c:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007a50:	f8bd 704c 	ldrh.w	r7, [sp, #76]	; 0x4c
//    ADF4153_Freq_Calc(3461500000,40000000,2,5000);
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007a54:	2200      	movs	r2, #0
 8007a56:	4641      	mov	r1, r8
    R0 = R0 & 0xFFFFFF;
 8007a58:	9303      	str	r3, [sp, #12]
 8007a5a:	4681      	mov	r9, r0
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007a5c:	f7fe fc3a 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007a60:	2200      	movs	r2, #0
 8007a62:	4629      	mov	r1, r5
 8007a64:	4620      	mov	r0, r4
 8007a66:	f7fe fc35 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007a6a:	2200      	movs	r2, #0
 8007a6c:	4639      	mov	r1, r7
 8007a6e:	4630      	mov	r0, r6
 8007a70:	f7fe fc30 	bl	80062d4 <HAL_GPIO_WritePin>
 8007a74:	f04f 0b0b 	mov.w	fp, #11
    printf("YJ :R0: %x  R1:  %x   R2 : %x R3 : %x ",R0,R1,R2,R3);
    printf("\r\n");
#endif /* DEBUG_PRINT */
    /*   R3 Ctrl    */
    for(int i =0; i < 11; i++){
        if(R3 & 0x000400){
 8007a78:	f41a 6280 	ands.w	r2, sl, #1024	; 0x400
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007a7c:	bf18      	it	ne
 8007a7e:	2201      	movne	r2, #1
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007a80:	4629      	mov	r1, r5
 8007a82:	4620      	mov	r0, r4
 8007a84:	f7fe fc26 	bl	80062d4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(10);
 8007a88:	200a      	movs	r0, #10
 8007a8a:	f000 fa2f 	bl	8007eec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007a8e:	2201      	movs	r2, #1
 8007a90:	4641      	mov	r1, r8
 8007a92:	4648      	mov	r0, r9
 8007a94:	f7fe fc1e 	bl	80062d4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 8007a98:	200a      	movs	r0, #10
 8007a9a:	f000 fa27 	bl	8007eec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007a9e:	2200      	movs	r2, #0
 8007aa0:	4641      	mov	r1, r8
 8007aa2:	4648      	mov	r0, r9
 8007aa4:	f7fe fc16 	bl	80062d4 <HAL_GPIO_WritePin>
    for(int i =0; i < 11; i++){
 8007aa8:	f1bb 0b01 	subs.w	fp, fp, #1
        R3 = (R3 << 1);
 8007aac:	ea4f 0a4a 	mov.w	sl, sl, lsl #1
    for(int i =0; i < 11; i++){
 8007ab0:	d1e2      	bne.n	8007a78 <ADF4153_Module_Ctrl+0x5c>
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007ab2:	2201      	movs	r2, #1
 8007ab4:	4639      	mov	r1, r7
 8007ab6:	4630      	mov	r0, r6
 8007ab8:	f7fe fc0c 	bl	80062d4 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 8007abc:	200a      	movs	r0, #10
 8007abe:	f000 fa15 	bl	8007eec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007ac2:	465a      	mov	r2, fp
 8007ac4:	4639      	mov	r1, r7
 8007ac6:	4630      	mov	r0, r6
 8007ac8:	f7fe fc04 	bl	80062d4 <HAL_GPIO_WritePin>
 8007acc:	f04f 0a10 	mov.w	sl, #16
    
    /*   R2 Ctrl    */
     for(int i =0; i < 16; i++){
         if(R2 & 0x008000){
 8007ad0:	9b01      	ldr	r3, [sp, #4]
#ifdef DEBUG_PRINT
             printf("1");
#endif /* DEBUG_PRINT */
         }
         else{
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007ad2:	4629      	mov	r1, r5
         if(R2 & 0x008000){
 8007ad4:	f413 4200 	ands.w	r2, r3, #32768	; 0x8000
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007ad8:	bf18      	it	ne
 8007ada:	2201      	movne	r2, #1
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007adc:	4620      	mov	r0, r4
 8007ade:	f7fe fbf9 	bl	80062d4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
             printf("0");
#endif /* DEBUG_PRINT */
         }
         Pol_Delay_us(10);
 8007ae2:	200a      	movs	r0, #10
 8007ae4:	f000 fa02 	bl	8007eec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007ae8:	2201      	movs	r2, #1
 8007aea:	4641      	mov	r1, r8
 8007aec:	4648      	mov	r0, r9
 8007aee:	f7fe fbf1 	bl	80062d4 <HAL_GPIO_WritePin>
         Pol_Delay_us(10);
 8007af2:	200a      	movs	r0, #10
 8007af4:	f000 f9fa 	bl	8007eec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007af8:	2200      	movs	r2, #0
 8007afa:	4641      	mov	r1, r8
 8007afc:	4648      	mov	r0, r9
 8007afe:	f7fe fbe9 	bl	80062d4 <HAL_GPIO_WritePin>

         R2 = ((R2 << 1) & 0x00FFFF);
 8007b02:	9b01      	ldr	r3, [sp, #4]
     for(int i =0; i < 16; i++){
 8007b04:	f1ba 0a01 	subs.w	sl, sl, #1
         R2 = ((R2 << 1) & 0x00FFFF);
 8007b08:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8007b0c:	b29b      	uxth	r3, r3
 8007b0e:	9301      	str	r3, [sp, #4]
     for(int i =0; i < 16; i++){
 8007b10:	d1de      	bne.n	8007ad0 <ADF4153_Module_Ctrl+0xb4>
     }
#ifdef DEBUG_PRINT
     printf("\r\n");
#endif /* DEBUG_PRINT */
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007b12:	2201      	movs	r2, #1
 8007b14:	4639      	mov	r1, r7
 8007b16:	4630      	mov	r0, r6
 8007b18:	f7fe fbdc 	bl	80062d4 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 8007b1c:	200a      	movs	r0, #10
 8007b1e:	f000 f9e5 	bl	8007eec <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007b22:	4652      	mov	r2, sl
 8007b24:	4639      	mov	r1, r7
 8007b26:	4630      	mov	r0, r6
 8007b28:	f7fe fbd4 	bl	80062d4 <HAL_GPIO_WritePin>
 8007b2c:	f04f 0a18 	mov.w	sl, #24
    
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
 8007b30:	9b02      	ldr	r3, [sp, #8]
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007b32:	4629      	mov	r1, r5
        if(R1 & 0x800000){
 8007b34:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007b38:	bf18      	it	ne
 8007b3a:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007b3c:	4620      	mov	r0, r4
 8007b3e:	f7fe fbc9 	bl	80062d4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(10);
 8007b42:	200a      	movs	r0, #10
 8007b44:	f000 f9d2 	bl	8007eec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007b48:	2201      	movs	r2, #1
 8007b4a:	4641      	mov	r1, r8
 8007b4c:	4648      	mov	r0, r9
 8007b4e:	f7fe fbc1 	bl	80062d4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 8007b52:	200a      	movs	r0, #10
 8007b54:	f000 f9ca 	bl	8007eec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007b58:	2200      	movs	r2, #0
 8007b5a:	4641      	mov	r1, r8
 8007b5c:	4648      	mov	r0, r9
 8007b5e:	f7fe fbb9 	bl	80062d4 <HAL_GPIO_WritePin>

        R1 = ((R1 << 1) & 0xFFFFFF);
 8007b62:	9b02      	ldr	r3, [sp, #8]
    for(int i =0; i < 24; i++){
 8007b64:	f1ba 0a01 	subs.w	sl, sl, #1
        R1 = ((R1 << 1) & 0xFFFFFF);
 8007b68:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8007b6c:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007b70:	9302      	str	r3, [sp, #8]
    for(int i =0; i < 24; i++){
 8007b72:	d1dd      	bne.n	8007b30 <ADF4153_Module_Ctrl+0x114>
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007b74:	2201      	movs	r2, #1
 8007b76:	4639      	mov	r1, r7
 8007b78:	4630      	mov	r0, r6
 8007b7a:	f7fe fbab 	bl	80062d4 <HAL_GPIO_WritePin>
      Pol_Delay_us(10);
 8007b7e:	200a      	movs	r0, #10
 8007b80:	f000 f9b4 	bl	8007eec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007b84:	4652      	mov	r2, sl
 8007b86:	4639      	mov	r1, r7
 8007b88:	4630      	mov	r0, r6
 8007b8a:	f7fe fba3 	bl	80062d4 <HAL_GPIO_WritePin>
 8007b8e:	f04f 0a18 	mov.w	sl, #24


        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
 8007b92:	9b03      	ldr	r3, [sp, #12]
#ifdef DEBUG_PRINT
            printf("1");
#endif /* DEBUG_PRINT */
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007b94:	4629      	mov	r1, r5
        if(R0 & 0x800000){
 8007b96:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8007b9a:	bf18      	it	ne
 8007b9c:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007b9e:	4620      	mov	r0, r4
 8007ba0:	f7fe fb98 	bl	80062d4 <HAL_GPIO_WritePin>
#ifdef DEBUG_PRINT
            printf("0");
#endif /* DEBUG_PRINT */
        }
        Pol_Delay_us(10);
 8007ba4:	200a      	movs	r0, #10
 8007ba6:	f000 f9a1 	bl	8007eec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8007baa:	2201      	movs	r2, #1
 8007bac:	4641      	mov	r1, r8
 8007bae:	4648      	mov	r0, r9
 8007bb0:	f7fe fb90 	bl	80062d4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 8007bb4:	200a      	movs	r0, #10
 8007bb6:	f000 f999 	bl	8007eec <Pol_Delay_us>
        HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8007bba:	2200      	movs	r2, #0
 8007bbc:	4641      	mov	r1, r8
 8007bbe:	4648      	mov	r0, r9
 8007bc0:	f7fe fb88 	bl	80062d4 <HAL_GPIO_WritePin>

        R0 = ((R0 << 1) & 0xFFFFFF);
 8007bc4:	9b03      	ldr	r3, [sp, #12]
    for(int i =0; i < 24; i++){
 8007bc6:	f1ba 0a01 	subs.w	sl, sl, #1
        R0 = ((R0 << 1) & 0xFFFFFF);
 8007bca:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8007bce:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8007bd2:	9303      	str	r3, [sp, #12]
    for(int i =0; i < 24; i++){
 8007bd4:	d1dd      	bne.n	8007b92 <ADF4153_Module_Ctrl+0x176>
    }
#ifdef DEBUG_PRINT
    printf("\r\n");
#endif /* DEBUG_PRINT */
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8007bd6:	4652      	mov	r2, sl
 8007bd8:	4629      	mov	r1, r5
 8007bda:	4620      	mov	r0, r4
 8007bdc:	f7fe fb7a 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8007be0:	4639      	mov	r1, r7
 8007be2:	2201      	movs	r2, #1
 8007be4:	4630      	mov	r0, r6
 8007be6:	f7fe fb75 	bl	80062d4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8007bea:	200a      	movs	r0, #10
 8007bec:	f000 f97e 	bl	8007eec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007bf0:	4652      	mov	r2, sl
 8007bf2:	4639      	mov	r1, r7
 8007bf4:	4630      	mov	r0, r6

}
 8007bf6:	b005      	add	sp, #20
 8007bf8:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8007bfc:	b004      	add	sp, #16
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8007bfe:	f7fe bb69 	b.w	80062d4 <HAL_GPIO_WritePin>
	...

08007c04 <FLASH_Byte_Write>:
#define USER_DATA2     (FLASH_USER_START_ADDR + 4)
#define USER_DATA3     (FLASH_USER_START_ADDR + 8)
#define USER_DATA4     (FLASH_USER_START_ADDR + 12)


void FLASH_Byte_Write(uint8_t* data){
 8007c04:	b538      	push	{r3, r4, r5, lr}
  /*
  페이지 단위로 지울수 있도록 구조체변수를 선언해 주고 멤버변수값들을 정해줍니다.
  데이터를 새로 쓰기위해서는 먼저 페이지 단위로 메모리를 지워 줘야 합니다.
  */
  static FLASH_EraseInitTypeDef EraseInitStruct;
  EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;  //0x00
 8007c06:	2300      	movs	r3, #0
 8007c08:	4c1a      	ldr	r4, [pc, #104]	; (8007c74 <FLASH_Byte_Write+0x70>)
  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;  // 지우기 페이지의 시작 어드레스
  EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; //지울 페이지 수
  static uint32_t PAGEError = 0;
//  printf("Flash Write Start \r\n");
    data[INDEX_BLUE_HEADER] = 0xbe;
 8007c0a:	22be      	movs	r2, #190	; 0xbe
  EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;  //0x00
 8007c0c:	6023      	str	r3, [r4, #0]
  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;  // 지우기 페이지의 시작 어드레스
 8007c0e:	4b1a      	ldr	r3, [pc, #104]	; (8007c78 <FLASH_Byte_Write+0x74>)
void FLASH_Byte_Write(uint8_t* data){
 8007c10:	4605      	mov	r5, r0
  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;  // 지우기 페이지의 시작 어드레스
 8007c12:	60a3      	str	r3, [r4, #8]
  EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; //지울 페이지 수
 8007c14:	2301      	movs	r3, #1
 8007c16:	60e3      	str	r3, [r4, #12]
    data[INDEX_BLUE_TYPE] = 1;
 8007c18:	7043      	strb	r3, [r0, #1]
    data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2;
 8007c1a:	2360      	movs	r3, #96	; 0x60
 8007c1c:	7083      	strb	r3, [r0, #2]
    data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_EOF - 1;    
 8007c1e:	2361      	movs	r3, #97	; 0x61
    data[INDEX_BLUE_HEADER] = 0xbe;
 8007c20:	7002      	strb	r2, [r0, #0]
    data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_EOF - 1;    
 8007c22:	70c3      	strb	r3, [r0, #3]
  /*
  Flash메모리를 조작 할 수 있도록 락을 풀어 줍니다.
  */
   HAL_FLASH_Unlock();
 8007c24:	f7fe f966 	bl	8005ef4 <HAL_FLASH_Unlock>
  /*
  앞에서 설정한 페이지를 지워 줍니다.  페이지 지우기에 실패하면 무한루프에 빠지게 하여 기기의 오작동을 예방합니다.
  */
    if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK) {
 8007c28:	4914      	ldr	r1, [pc, #80]	; (8007c7c <FLASH_Byte_Write+0x78>)
 8007c2a:	4620      	mov	r0, r4
 8007c2c:	f7fe fa12 	bl	8006054 <HAL_FLASHEx_Erase>
 8007c30:	b118      	cbz	r0, 8007c3a <FLASH_Byte_Write+0x36>
    printf("Eraser Error\r\n");
 8007c32:	4813      	ldr	r0, [pc, #76]	; (8007c80 <FLASH_Byte_Write+0x7c>)
 8007c34:	f002 f9e8 	bl	800a008 <puts>
 8007c38:	e7fe      	b.n	8007c38 <FLASH_Byte_Write+0x34>
 8007c3a:	4604      	mov	r4, r0
  */
   /////////유저가 설정한 페이지에 데이터 쓰기 ////////////////////////////////////////////////////
   //HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
   for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
        WriteData  = ((data[i]) & 0x00FF);
        WriteData  += ((data[i + 1] << 8) & 0xFF00);
 8007c3c:	192b      	adds	r3, r5, r4
 8007c3e:	785b      	ldrb	r3, [r3, #1]
        WriteData  = ((data[i]) & 0x00FF);
 8007c40:	5d2a      	ldrb	r2, [r5, r4]
        if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, FLASH_USER_START_ADDR + i, ((uint16_t)WriteData)) != HAL_OK){
 8007c42:	f104 6100 	add.w	r1, r4, #134217728	; 0x8000000
        WriteData  += ((data[i + 1] << 8) & 0xFF00);
 8007c46:	eb02 2203 	add.w	r2, r2, r3, lsl #8
        if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, FLASH_USER_START_ADDR + i, ((uint16_t)WriteData)) != HAL_OK){
 8007c4a:	b292      	uxth	r2, r2
 8007c4c:	2300      	movs	r3, #0
 8007c4e:	f501 21ff 	add.w	r1, r1, #522240	; 0x7f800
 8007c52:	2001      	movs	r0, #1
 8007c54:	f7fe f994 	bl	8005f80 <HAL_FLASH_Program>
 8007c58:	b120      	cbz	r0, 8007c64 <FLASH_Byte_Write+0x60>
            printf("Write Error %d\r\n",__LINE__);
 8007c5a:	21a5      	movs	r1, #165	; 0xa5
 8007c5c:	4809      	ldr	r0, [pc, #36]	; (8007c84 <FLASH_Byte_Write+0x80>)
 8007c5e:	f002 f95f 	bl	8009f20 <iprintf>
 8007c62:	e7fe      	b.n	8007c62 <FLASH_Byte_Write+0x5e>
   for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 8007c64:	3402      	adds	r4, #2
 8007c66:	2c64      	cmp	r4, #100	; 0x64
 8007c68:	d1e8      	bne.n	8007c3c <FLASH_Byte_Write+0x38>
    printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i));
}
#endif // PYJ.2019.07.31_END -- 
/////////////////////////////////////////////////////////////////////////////////////////////////// 

}
 8007c6a:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
   HAL_FLASH_Lock();
 8007c6e:	f7fe b953 	b.w	8005f18 <HAL_FLASH_Lock>
 8007c72:	bf00      	nop
 8007c74:	2000043c 	.word	0x2000043c
 8007c78:	0807f800 	.word	0x0807f800
 8007c7c:	2000044c 	.word	0x2000044c
 8007c80:	0800bf58 	.word	0x0800bf58
 8007c84:	0800bf66 	.word	0x0800bf66

08007c88 <Bluecell_Flash_Write>:
uint8_t Bluecell_Flash_Write(uint8_t* data){
 8007c88:	b508      	push	{r3, lr}

  /*Variable used for Erase procedure*/
//  flashtest();
  FLASH_Byte_Write(&data[INDEX_BLUE_HEADER]);
 8007c8a:	f7ff ffbb 	bl	8007c04 <FLASH_Byte_Write>
  return true;
}
 8007c8e:	2001      	movs	r0, #1
 8007c90:	bd08      	pop	{r3, pc}

08007c92 <Bluecell_Flash_Read>:
bool Bluecell_Flash_Read(uint8_t* data){
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 8007c92:	2300      	movs	r3, #0
 8007c94:	f103 6200 	add.w	r2, r3, #134217728	; 0x8000000
 8007c98:	f502 22ff 	add.w	r2, r2, #522240	; 0x7f800
//        printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i));
        data[INDEX_BLUE_HEADER + i]     = *(__IO uint16_t *)(FLASH_USER_START_ADDR + i) &0x00FF;
 8007c9c:	8811      	ldrh	r1, [r2, #0]
 8007c9e:	54c1      	strb	r1, [r0, r3]
        data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8;           
 8007ca0:	8812      	ldrh	r2, [r2, #0]
 8007ca2:	18c1      	adds	r1, r0, r3
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 8007ca4:	3302      	adds	r3, #2
        data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8;           
 8007ca6:	f3c2 2207 	ubfx	r2, r2, #8, #8
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 8007caa:	2b64      	cmp	r3, #100	; 0x64
        data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8;           
 8007cac:	704a      	strb	r2, [r1, #1]
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
 8007cae:	d1f1      	bne.n	8007c94 <Bluecell_Flash_Read+0x2>
    for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){
        printf("Data = %x\r\n",  data[i]);
    }
#endif // PYJ.2019.07.31_END -- 
    return true;
}
 8007cb0:	2001      	movs	r0, #1
 8007cb2:	4770      	bx	lr

08007cb4 <Path_Init>:
static void kConstPrinter(Bluecell_Prot_Index k)
{
    printf("%s", Bluecell_Prot_IndexStr[k]);
}
#endif /* DEBUG_PRINT */
void Path_Init(void){
 8007cb4:	b570      	push	{r4, r5, r6, lr}
    Prev_data[INDEX_PATH_EN_1_8G_DL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin);
 8007cb6:	4d24      	ldr	r5, [pc, #144]	; (8007d48 <Path_Init+0x94>)
 8007cb8:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007cbc:	4628      	mov	r0, r5
 8007cbe:	f7fe fb03 	bl	80062c8 <HAL_GPIO_ReadPin>
 8007cc2:	4c22      	ldr	r4, [pc, #136]	; (8007d4c <Path_Init+0x98>)
    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
 8007cc4:	f44f 4100 	mov.w	r1, #32768	; 0x8000
    Prev_data[INDEX_PATH_EN_1_8G_DL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin);
 8007cc8:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
 8007ccc:	4628      	mov	r0, r5
 8007cce:	f7fe fafb 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
 8007cd2:	4e1f      	ldr	r6, [pc, #124]	; (8007d50 <Path_Init+0x9c>)
    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
 8007cd4:	f884 0044 	strb.w	r0, [r4, #68]	; 0x44
    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
 8007cd8:	2101      	movs	r1, #1
 8007cda:	4630      	mov	r0, r6
 8007cdc:	f7fe faf4 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
 8007ce0:	2102      	movs	r1, #2
    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
 8007ce2:	f884 0045 	strb.w	r0, [r4, #69]	; 0x45
    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
 8007ce6:	4630      	mov	r0, r6
 8007ce8:	f7fe faee 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
 8007cec:	2180      	movs	r1, #128	; 0x80
    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
 8007cee:	f884 0046 	strb.w	r0, [r4, #70]	; 0x46
    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
 8007cf2:	4818      	ldr	r0, [pc, #96]	; (8007d54 <Path_Init+0xa0>)
 8007cf4:	f7fe fae8 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
 8007cf8:	f506 6600 	add.w	r6, r6, #2048	; 0x800
    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
 8007cfc:	f884 004a 	strb.w	r0, [r4, #74]	; 0x4a
    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
 8007d00:	f44f 7100 	mov.w	r1, #512	; 0x200
 8007d04:	4630      	mov	r0, r6
 8007d06:	f7fe fadf 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
 8007d0a:	f44f 6180 	mov.w	r1, #1024	; 0x400
    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
 8007d0e:	f884 0049 	strb.w	r0, [r4, #73]	; 0x49
    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
 8007d12:	4630      	mov	r0, r6
 8007d14:	f7fe fad8 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
 8007d18:	f44f 6100 	mov.w	r1, #2048	; 0x800
    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
 8007d1c:	f884 0047 	strb.w	r0, [r4, #71]	; 0x47
    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
 8007d20:	4630      	mov	r0, r6
 8007d22:	f7fe fad1 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
 8007d26:	f44f 5180 	mov.w	r1, #4096	; 0x1000
    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
 8007d2a:	f884 0048 	strb.w	r0, [r4, #72]	; 0x48
    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
 8007d2e:	4628      	mov	r0, r5
 8007d30:	f7fe faca 	bl	80062c8 <HAL_GPIO_ReadPin>
    Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin);
 8007d34:	f44f 6180 	mov.w	r1, #1024	; 0x400
    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
 8007d38:	f884 004b 	strb.w	r0, [r4, #75]	; 0x4b
    Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin);
 8007d3c:	4628      	mov	r0, r5
 8007d3e:	f7fe fac3 	bl	80062c8 <HAL_GPIO_ReadPin>
 8007d42:	f884 004c 	strb.w	r0, [r4, #76]	; 0x4c
 8007d46:	bd70      	pop	{r4, r5, r6, pc}
 8007d48:	40011000 	.word	0x40011000
 8007d4c:	200005e3 	.word	0x200005e3
 8007d50:	40011800 	.word	0x40011800
 8007d54:	40011400 	.word	0x40011400

08007d58 <Power_ON_OFF_Ctrl>:
}
void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
	static uint32_t pinctrl = 0;
	static uint32_t pintemp = 0;
//    printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd);
    switch(type){
 8007d58:	3843      	subs	r0, #67	; 0x43
void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
 8007d5a:	460a      	mov	r2, r1
    switch(type){
 8007d5c:	280d      	cmp	r0, #13
 8007d5e:	d840      	bhi.n	8007de2 <Power_ON_OFF_Ctrl+0x8a>
 8007d60:	e8df f000 	tbb	[pc, r0]
 8007d64:	18120d07 	.word	0x18120d07
 8007d68:	1c212c27 	.word	0x1c212c27
 8007d6c:	3b3b3631 	.word	0x3b3b3631
 8007d70:	3b3b      	.short	0x3b3b
        case INDEX_PATH_EN_1_8G_DL  : 
#if 0 // PYJ.2019.07.29_BEGIN -- 
            printf("\r\n LINE %d\r\n",__LINE__);
#endif // PYJ.2019.07.29_END -- 
            if(cmd)
 8007d72:	b101      	cbz	r1, 8007d76 <Power_ON_OFF_Ctrl+0x1e>
                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET);
 8007d74:	2201      	movs	r2, #1
            else
                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
 8007d76:	f44f 4180 	mov.w	r1, #16384	; 0x4000
        case INDEX_PLL_ON_OFF_3_5G_L: 
//            printf("\r\n LINE %d\r\n",__LINE__);
            if(cmd)
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
            else
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
 8007d7a:	481b      	ldr	r0, [pc, #108]	; (8007de8 <Power_ON_OFF_Ctrl+0x90>)
 8007d7c:	e008      	b.n	8007d90 <Power_ON_OFF_Ctrl+0x38>
            if(cmd)
 8007d7e:	b101      	cbz	r1, 8007d82 <Power_ON_OFF_Ctrl+0x2a>
                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET);
 8007d80:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
 8007d82:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007d86:	e7f8      	b.n	8007d7a <Power_ON_OFF_Ctrl+0x22>
            if(cmd)
 8007d88:	b101      	cbz	r1, 8007d8c <Power_ON_OFF_Ctrl+0x34>
                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET);
 8007d8a:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);                
 8007d8c:	2101      	movs	r1, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
 8007d8e:	4817      	ldr	r0, [pc, #92]	; (8007dec <Power_ON_OFF_Ctrl+0x94>)
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
 8007d90:	f7fe baa0 	b.w	80062d4 <HAL_GPIO_WritePin>
            if(cmd)
 8007d94:	b101      	cbz	r1, 8007d98 <Power_ON_OFF_Ctrl+0x40>
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET);
 8007d96:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
 8007d98:	2102      	movs	r1, #2
 8007d9a:	e7f8      	b.n	8007d8e <Power_ON_OFF_Ctrl+0x36>
            if(cmd){
 8007d9c:	b101      	cbz	r1, 8007da0 <Power_ON_OFF_Ctrl+0x48>
                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);
 8007d9e:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
 8007da0:	2180      	movs	r1, #128	; 0x80
 8007da2:	4813      	ldr	r0, [pc, #76]	; (8007df0 <Power_ON_OFF_Ctrl+0x98>)
 8007da4:	e7f4      	b.n	8007d90 <Power_ON_OFF_Ctrl+0x38>
            if(cmd){
 8007da6:	b101      	cbz	r1, 8007daa <Power_ON_OFF_Ctrl+0x52>
                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET);
 8007da8:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
 8007daa:	f44f 7100 	mov.w	r1, #512	; 0x200
                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
 8007dae:	4811      	ldr	r0, [pc, #68]	; (8007df4 <Power_ON_OFF_Ctrl+0x9c>)
 8007db0:	e7ee      	b.n	8007d90 <Power_ON_OFF_Ctrl+0x38>
            if(cmd)
 8007db2:	b101      	cbz	r1, 8007db6 <Power_ON_OFF_Ctrl+0x5e>
                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET);
 8007db4:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
 8007db6:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007dba:	e7f8      	b.n	8007dae <Power_ON_OFF_Ctrl+0x56>
            if(cmd)
 8007dbc:	b101      	cbz	r1, 8007dc0 <Power_ON_OFF_Ctrl+0x68>
                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
 8007dbe:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
 8007dc0:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8007dc4:	e7f3      	b.n	8007dae <Power_ON_OFF_Ctrl+0x56>
            if(cmd)
 8007dc6:	b101      	cbz	r1, 8007dca <Power_ON_OFF_Ctrl+0x72>
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
 8007dc8:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
 8007dca:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8007dce:	e7d4      	b.n	8007d7a <Power_ON_OFF_Ctrl+0x22>
            if(cmd)
 8007dd0:	b101      	cbz	r1, 8007dd4 <Power_ON_OFF_Ctrl+0x7c>
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
 8007dd2:	2201      	movs	r2, #1
                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
 8007dd4:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007dd8:	e7cf      	b.n	8007d7a <Power_ON_OFF_Ctrl+0x22>
 8007dda:	4b06      	ldr	r3, [pc, #24]	; (8007df4 <Power_ON_OFF_Ctrl+0x9c>)
            break;
        case INDEX_T_SYNC_DL:
        case INDEX__T_SYNC_UL:
        case INDEX_T_SYNC_UL:
        case INDEX__T_SYNC_DL:
            if(cmd)
 8007ddc:	b111      	cbz	r1, 8007de4 <Power_ON_OFF_Ctrl+0x8c>
                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET);                
            }
#else
        {
        	pintemp = (uint32_t)((_T_SYNC_DL_Pin | T_SYNC_DL_Pin) | ((uint32_t)_T_SYNC_UL_Pin << 16U) | ((uint32_t)T_SYNC_UL_Pin << 16U));
        	_T_SYNC_UL_GPIO_Port->BSRR = pintemp;
 8007dde:	4a06      	ldr	r2, [pc, #24]	; (8007df8 <Power_ON_OFF_Ctrl+0xa0>)
//            HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin|T_SYNC_DL_Pin, GPIO_PIN_SET);
        }
        else
        {
        	pintemp = (uint32_t)((_T_SYNC_UL_Pin | T_SYNC_UL_Pin) | ((uint32_t)_T_SYNC_DL_Pin << 16U) | ((uint32_t)T_SYNC_DL_Pin << 16U));
        	_T_SYNC_UL_GPIO_Port->BSRR = pintemp;
 8007de0:	611a      	str	r2, [r3, #16]
 8007de2:	4770      	bx	lr
 8007de4:	4a05      	ldr	r2, [pc, #20]	; (8007dfc <Power_ON_OFF_Ctrl+0xa4>)
 8007de6:	e7fb      	b.n	8007de0 <Power_ON_OFF_Ctrl+0x88>
 8007de8:	40011000 	.word	0x40011000
 8007dec:	40011800 	.word	0x40011800
 8007df0:	40011400 	.word	0x40011400
 8007df4:	40012000 	.word	0x40012000
 8007df8:	00600180 	.word	0x00600180
 8007dfc:	01800060 	.word	0x01800060

08007e00 <ATTEN_PLL_PATH_Initialize>:
#endif /* DEBUG_PRINT */
    break;

    }
}
void ATTEN_PLL_PATH_Initialize(void){
 8007e00:	b510      	push	{r4, lr}
#if 0 // PYJ.2019.07.31_BEGIN -- 
        for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){
            printf("Data = %x\r\n",  Flash_Save_data[i]);
        }
#endif // PYJ.2019.07.31_END -- 
    Flash_Save_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Flash_Save_data[Type], Flash_Save_data[Length]);
 8007e02:	4c07      	ldr	r4, [pc, #28]	; (8007e20 <ATTEN_PLL_PATH_Initialize+0x20>)
 8007e04:	78a1      	ldrb	r1, [r4, #2]
 8007e06:	1c60      	adds	r0, r4, #1
 8007e08:	f7ff fbd8 	bl	80075bc <STH30_CreateCrc>
 8007e0c:	f884 0061 	strb.w	r0, [r4, #97]	; 0x61
    RF_Ctrl_Main(&Flash_Save_data[INDEX_BLUE_HEADER]);
 8007e10:	4620      	mov	r0, r4
 8007e12:	f001 fb73 	bl	80094fc <RF_Ctrl_Main>
    RF_Status_Get();
}
 8007e16:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    RF_Status_Get();
 8007e1a:	f000 be4b 	b.w	8008ab4 <RF_Status_Get>
 8007e1e:	bf00      	nop
 8007e20:	20000580 	.word	0x20000580

08007e24 <Power_ON_OFF_Initialize>:
void Power_ON_OFF_Initialize(void){
 8007e24:	b570      	push	{r4, r5, r6, lr}
  /* * * PATH PLL ON OFF SECTION* * */
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);
 8007e26:	4d2e      	ldr	r5, [pc, #184]	; (8007ee0 <Power_ON_OFF_Initialize+0xbc>)
  HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port   ,PATH_EN_3_5G_H_Pin   , GPIO_PIN_RESET);
 8007e28:	4c2e      	ldr	r4, [pc, #184]	; (8007ee4 <Power_ON_OFF_Initialize+0xc0>)
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);
 8007e2a:	4628      	mov	r0, r5
 8007e2c:	2200      	movs	r2, #0
 8007e2e:	2180      	movs	r1, #128	; 0x80
 8007e30:	f7fe fa50 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port   ,PATH_EN_3_5G_H_Pin   , GPIO_PIN_RESET);
 8007e34:	4620      	mov	r0, r4
 8007e36:	2200      	movs	r2, #0
 8007e38:	f44f 7100 	mov.w	r1, #512	; 0x200
 8007e3c:	f7fe fa4a 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port  ,PATH_EN_3_5G_DL_Pin  , GPIO_PIN_RESET);
 8007e40:	4620      	mov	r0, r4
 8007e42:	2200      	movs	r2, #0
 8007e44:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007e48:	f7fe fa44 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port  ,PATH_EN_3_5G_UL_Pin  , GPIO_PIN_RESET);
 8007e4c:	4620      	mov	r0, r4
 8007e4e:	2200      	movs	r2, #0
 8007e50:	f44f 6100 	mov.w	r1, #2048	; 0x800
 8007e54:	f7fe fa3e 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);  
 8007e58:	4628      	mov	r0, r5
 8007e5a:	2200      	movs	r2, #0
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
 8007e5c:	f5a5 6580 	sub.w	r5, r5, #1024	; 0x400
  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);  
 8007e60:	2180      	movs	r1, #128	; 0x80
 8007e62:	f7fe fa37 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);  
  HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port  ,PATH_EN_2_1G_DL_Pin  , GPIO_PIN_RESET);
 8007e66:	4e20      	ldr	r6, [pc, #128]	; (8007ee8 <Power_ON_OFF_Initialize+0xc4>)
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
 8007e68:	4628      	mov	r0, r5
 8007e6a:	2200      	movs	r2, #0
 8007e6c:	f44f 5180 	mov.w	r1, #4096	; 0x1000
 8007e70:	f7fe fa30 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);  
 8007e74:	4628      	mov	r0, r5
 8007e76:	2200      	movs	r2, #0
 8007e78:	f44f 6180 	mov.w	r1, #1024	; 0x400
 8007e7c:	f7fe fa2a 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port  ,PATH_EN_2_1G_DL_Pin  , GPIO_PIN_RESET);
 8007e80:	4630      	mov	r0, r6
 8007e82:	2200      	movs	r2, #0
 8007e84:	2101      	movs	r1, #1
 8007e86:	f7fe fa25 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port  ,PATH_EN_2_1G_UL_Pin  , GPIO_PIN_RESET);
 8007e8a:	4630      	mov	r0, r6
 8007e8c:	2200      	movs	r2, #0
 8007e8e:	2102      	movs	r1, #2
 8007e90:	f7fe fa20 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port  ,PATH_EN_1_8G_DL_Pin  , GPIO_PIN_RESET);
 8007e94:	4628      	mov	r0, r5
 8007e96:	2200      	movs	r2, #0
 8007e98:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007e9c:	f7fe fa1a 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port  ,PATH_EN_1_8G_UL_Pin  , GPIO_PIN_RESET);
 8007ea0:	4628      	mov	r0, r5
 8007ea2:	2200      	movs	r2, #0
 8007ea4:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8007ea8:	f7fe fa14 	bl	80062d4 <HAL_GPIO_WritePin>
  /* * * TDD SECTION* * */
  HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
 8007eac:	4620      	mov	r0, r4
 8007eae:	2200      	movs	r2, #0
 8007eb0:	2120      	movs	r1, #32
 8007eb2:	f7fe fa0f 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
 8007eb6:	4620      	mov	r0, r4
 8007eb8:	2200      	movs	r2, #0
 8007eba:	2140      	movs	r1, #64	; 0x40
 8007ebc:	f7fe fa0a 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
 8007ec0:	4620      	mov	r0, r4
 8007ec2:	2201      	movs	r2, #1
 8007ec4:	2180      	movs	r1, #128	; 0x80
 8007ec6:	f7fe fa05 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);   
 8007eca:	4620      	mov	r0, r4
 8007ecc:	2201      	movs	r2, #1
 8007ece:	f44f 7180 	mov.w	r1, #256	; 0x100
 8007ed2:	f7fe f9ff 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_Delay(1);
}
 8007ed6:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
  HAL_Delay(1);
 8007eda:	2001      	movs	r0, #1
 8007edc:	f7fd bb06 	b.w	80054ec <HAL_Delay>
 8007ee0:	40011400 	.word	0x40011400
 8007ee4:	40012000 	.word	0x40012000
 8007ee8:	40011800 	.word	0x40011800

08007eec <Pol_Delay_us>:
  HAL_UART_Transmit_DMA(&huart1,&temp_data[INDEX_BLUE_HEADER],temp_data[INDEX_BLUE_LENGTH]  + 3); 
}
void Pol_Delay_us(volatile uint32_t microseconds)
{
  /* Go to number of cycles for system */
  microseconds *= (SystemCoreClock / 1000000);
 8007eec:	4a08      	ldr	r2, [pc, #32]	; (8007f10 <Pol_Delay_us+0x24>)
 8007eee:	4909      	ldr	r1, [pc, #36]	; (8007f14 <Pol_Delay_us+0x28>)
 8007ef0:	6812      	ldr	r2, [r2, #0]
{
 8007ef2:	b082      	sub	sp, #8
  microseconds *= (SystemCoreClock / 1000000);
 8007ef4:	fbb2 f2f1 	udiv	r2, r2, r1
{
 8007ef8:	9001      	str	r0, [sp, #4]
  microseconds *= (SystemCoreClock / 1000000);
 8007efa:	9b01      	ldr	r3, [sp, #4]
 8007efc:	4353      	muls	r3, r2
 8007efe:	9301      	str	r3, [sp, #4]
 
  /* Delay till end */
  while (microseconds--);
 8007f00:	9b01      	ldr	r3, [sp, #4]
 8007f02:	1e5a      	subs	r2, r3, #1
 8007f04:	9201      	str	r2, [sp, #4]
 8007f06:	2b00      	cmp	r3, #0
 8007f08:	d1fa      	bne.n	8007f00 <Pol_Delay_us+0x14>
}
 8007f0a:	b002      	add	sp, #8
 8007f0c:	4770      	bx	lr
 8007f0e:	bf00      	nop
 8007f10:	20000218 	.word	0x20000218
 8007f14:	000f4240 	.word	0x000f4240

08007f18 <Boot_LED_Toggle>:
void Boot_LED_Toggle(void){
 8007f18:	b510      	push	{r4, lr}
  if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
 8007f1a:	4c06      	ldr	r4, [pc, #24]	; (8007f34 <Boot_LED_Toggle+0x1c>)
 8007f1c:	6823      	ldr	r3, [r4, #0]
 8007f1e:	f5b3 7ffa 	cmp.w	r3, #500	; 0x1f4
 8007f22:	d906      	bls.n	8007f32 <Boot_LED_Toggle+0x1a>
 8007f24:	f44f 4180 	mov.w	r1, #16384	; 0x4000
 8007f28:	4803      	ldr	r0, [pc, #12]	; (8007f38 <Boot_LED_Toggle+0x20>)
 8007f2a:	f7fe f9d8 	bl	80062de <HAL_GPIO_TogglePin>
 8007f2e:	2300      	movs	r3, #0
 8007f30:	6023      	str	r3, [r4, #0]
 8007f32:	bd10      	pop	{r4, pc}
 8007f34:	20000458 	.word	0x20000458
 8007f38:	40012000 	.word	0x40012000

08007f3c <ADC_Check>:
}
void ADC_Check(void){
      if(AdcTimerCnt > 2500){
 8007f3c:	f640 12c4 	movw	r2, #2500	; 0x9c4
 8007f40:	4b0b      	ldr	r3, [pc, #44]	; (8007f70 <ADC_Check+0x34>)
void ADC_Check(void){
 8007f42:	b5f0      	push	{r4, r5, r6, r7, lr}
      if(AdcTimerCnt > 2500){
 8007f44:	6819      	ldr	r1, [r3, #0]
 8007f46:	4291      	cmp	r1, r2
 8007f48:	461a      	mov	r2, r3
 8007f4a:	d90f      	bls.n	8007f6c <ADC_Check+0x30>
 8007f4c:	2300      	movs	r3, #0
          for(uint8_t i = 0; i< ADC_EA; i++ ){
          Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
          Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2]     = (uint16_t)(ADCvalue[i] & 0x00FF);
          AdcTimerCnt = 0;
 8007f4e:	461c      	mov	r4, r3
          Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
 8007f50:	4f08      	ldr	r7, [pc, #32]	; (8007f74 <ADC_Check+0x38>)
 8007f52:	4e09      	ldr	r6, [pc, #36]	; (8007f78 <ADC_Check+0x3c>)
 8007f54:	f857 0013 	ldr.w	r0, [r7, r3, lsl #1]
 8007f58:	1999      	adds	r1, r3, r6
 8007f5a:	3302      	adds	r3, #2
 8007f5c:	0a05      	lsrs	r5, r0, #8
          for(uint8_t i = 0; i< ADC_EA; i++ ){
 8007f5e:	2b1c      	cmp	r3, #28
          Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
 8007f60:	f881 5025 	strb.w	r5, [r1, #37]	; 0x25
          Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2]     = (uint16_t)(ADCvalue[i] & 0x00FF);
 8007f64:	f881 0026 	strb.w	r0, [r1, #38]	; 0x26
          AdcTimerCnt = 0;
 8007f68:	6014      	str	r4, [r2, #0]
          for(uint8_t i = 0; i< ADC_EA; i++ ){
 8007f6a:	d1f3      	bne.n	8007f54 <ADC_Check+0x18>
 8007f6c:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8007f6e:	bf00      	nop
 8007f70:	20000450 	.word	0x20000450
 8007f74:	200004a0 	.word	0x200004a0
 8007f78:	200005e3 	.word	0x200005e3

08007f7c <Uart_Check>:
          printf("%x\r\n",i,Prev_data[INDEX_DET_1_8G_DL_IN_L + i]);            
#endif // PYJ.2019.08.09_END -- 
         }
      }
}
void Uart_Check(void){
 8007f7c:	b570      	push	{r4, r5, r6, lr}
  while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
 8007f7e:	4d07      	ldr	r5, [pc, #28]	; (8007f9c <Uart_Check+0x20>)
 8007f80:	4c07      	ldr	r4, [pc, #28]	; (8007fa0 <Uart_Check+0x24>)
 8007f82:	4e08      	ldr	r6, [pc, #32]	; (8007fa4 <Uart_Check+0x28>)
 8007f84:	68ab      	ldr	r3, [r5, #8]
 8007f86:	2b00      	cmp	r3, #0
 8007f88:	dd02      	ble.n	8007f90 <Uart_Check+0x14>
 8007f8a:	6823      	ldr	r3, [r4, #0]
 8007f8c:	2b64      	cmp	r3, #100	; 0x64
 8007f8e:	d800      	bhi.n	8007f92 <Uart_Check+0x16>
 8007f90:	bd70      	pop	{r4, r5, r6, pc}
 8007f92:	4630      	mov	r0, r6
 8007f94:	f000 fd28 	bl	80089e8 <GetDataFromUartQueue>
 8007f98:	e7f4      	b.n	8007f84 <Uart_Check+0x8>
 8007f9a:	bf00      	nop
 8007f9c:	20000bc4 	.word	0x20000bc4
 8007fa0:	2000045c 	.word	0x2000045c
 8007fa4:	20000700 	.word	0x20000700

08007fa8 <HAL_TIM_PeriodElapsedCallback>:
/* USER CODE BEGIN 0 */


void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
    if(htim->Instance == TIM6){
 8007fa8:	6802      	ldr	r2, [r0, #0]
 8007faa:	4b0a      	ldr	r3, [pc, #40]	; (8007fd4 <HAL_TIM_PeriodElapsedCallback+0x2c>)
 8007fac:	429a      	cmp	r2, r3
 8007fae:	d10f      	bne.n	8007fd0 <HAL_TIM_PeriodElapsedCallback+0x28>
        UartRxTimerCnt++;
 8007fb0:	4a09      	ldr	r2, [pc, #36]	; (8007fd8 <HAL_TIM_PeriodElapsedCallback+0x30>)
 8007fb2:	6813      	ldr	r3, [r2, #0]
 8007fb4:	3301      	adds	r3, #1
 8007fb6:	6013      	str	r3, [r2, #0]
        LedTimerCnt++;
 8007fb8:	4a08      	ldr	r2, [pc, #32]	; (8007fdc <HAL_TIM_PeriodElapsedCallback+0x34>)
 8007fba:	6813      	ldr	r3, [r2, #0]
 8007fbc:	3301      	adds	r3, #1
 8007fbe:	6013      	str	r3, [r2, #0]
        AdcTimerCnt++;
 8007fc0:	4a07      	ldr	r2, [pc, #28]	; (8007fe0 <HAL_TIM_PeriodElapsedCallback+0x38>)
 8007fc2:	6813      	ldr	r3, [r2, #0]
 8007fc4:	3301      	adds	r3, #1
 8007fc6:	6013      	str	r3, [r2, #0]
        LDTimerCnt++;
 8007fc8:	4a06      	ldr	r2, [pc, #24]	; (8007fe4 <HAL_TIM_PeriodElapsedCallback+0x3c>)
 8007fca:	6813      	ldr	r3, [r2, #0]
 8007fcc:	3301      	adds	r3, #1
 8007fce:	6013      	str	r3, [r2, #0]
 8007fd0:	4770      	bx	lr
 8007fd2:	bf00      	nop
 8007fd4:	40001000 	.word	0x40001000
 8007fd8:	2000045c 	.word	0x2000045c
 8007fdc:	20000458 	.word	0x20000458
 8007fe0:	20000450 	.word	0x20000450
 8007fe4:	20000454 	.word	0x20000454

08007fe8 <_write>:
    }
} 
int _write (int file, uint8_t *ptr, uint16_t len)
{
 8007fe8:	b510      	push	{r4, lr}
 8007fea:	4614      	mov	r4, r2
    HAL_UART_Transmit(&huart1, ptr, len,10);
 8007fec:	230a      	movs	r3, #10
 8007fee:	4802      	ldr	r0, [pc, #8]	; (8007ff8 <_write+0x10>)
 8007ff0:	f7fe ff40 	bl	8006e74 <HAL_UART_Transmit>
    return len;
}
 8007ff4:	4620      	mov	r0, r4
 8007ff6:	bd10      	pop	{r4, pc}
 8007ff8:	20000700 	.word	0x20000700

08007ffc <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8007ffc:	b510      	push	{r4, lr}
 8007ffe:	b096      	sub	sp, #88	; 0x58
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8008000:	2228      	movs	r2, #40	; 0x28
 8008002:	2100      	movs	r1, #0
 8008004:	a80c      	add	r0, sp, #48	; 0x30
 8008006:	f001 fb22 	bl	800964e <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 800800a:	2214      	movs	r2, #20
 800800c:	2100      	movs	r1, #0
 800800e:	a801      	add	r0, sp, #4
 8008010:	f001 fb1d 	bl	800964e <memset>
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 8008014:	2218      	movs	r2, #24
 8008016:	2100      	movs	r1, #0
 8008018:	eb0d 0002 	add.w	r0, sp, r2
 800801c:	f001 fb17 	bl	800964e <memset>

  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8008020:	2301      	movs	r3, #1
 8008022:	9310      	str	r3, [sp, #64]	; 0x40
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8008024:	2310      	movs	r3, #16
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8008026:	2402      	movs	r4, #2
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8008028:	9311      	str	r3, [sp, #68]	; 0x44
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
 800802a:	f44f 1340 	mov.w	r3, #3145728	; 0x300000
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 800802e:	a80c      	add	r0, sp, #48	; 0x30
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
 8008030:	9315      	str	r3, [sp, #84]	; 0x54
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8008032:	940c      	str	r4, [sp, #48]	; 0x30
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8008034:	9413      	str	r4, [sp, #76]	; 0x4c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8008036:	f7fe f957 	bl	80062e8 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 800803a:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 800803c:	f44f 6280 	mov.w	r2, #1024	; 0x400
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8008040:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8008042:	2300      	movs	r3, #0
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8008044:	4621      	mov	r1, r4
 8008046:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8008048:	9303      	str	r3, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 800804a:	9204      	str	r2, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 800804c:	9305      	str	r3, [sp, #20]
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 800804e:	9402      	str	r4, [sp, #8]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8008050:	f7fe fb12 	bl	8006678 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
 8008054:	f44f 4380 	mov.w	r3, #16384	; 0x4000
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 8008058:	a806      	add	r0, sp, #24
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
 800805a:	9406      	str	r4, [sp, #24]
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
 800805c:	9308      	str	r3, [sp, #32]
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 800805e:	f7fe fbdd 	bl	800681c <HAL_RCCEx_PeriphCLKConfig>
  {
    Error_Handler();
  }
}
 8008062:	b016      	add	sp, #88	; 0x58
 8008064:	bd10      	pop	{r4, pc}
	...

08008068 <main>:
{
 8008068:	b580      	push	{r7, lr}
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 800806a:	4db0      	ldr	r5, [pc, #704]	; (800832c <main+0x2c4>)
{
 800806c:	b08c      	sub	sp, #48	; 0x30
  HAL_Init();
 800806e:	f7fd fa19 	bl	80054a4 <HAL_Init>
  SystemClock_Config();
 8008072:	f7ff ffc3 	bl	8007ffc <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8008076:	2210      	movs	r2, #16
 8008078:	2100      	movs	r1, #0
 800807a:	a808      	add	r0, sp, #32
 800807c:	f001 fae7 	bl	800964e <memset>
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8008080:	69ab      	ldr	r3, [r5, #24]
  __HAL_RCC_GPIOB_CLK_ENABLE();
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOG_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8008082:	2200      	movs	r2, #0
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8008084:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8008088:	61ab      	str	r3, [r5, #24]
 800808a:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 800808c:	217f      	movs	r1, #127	; 0x7f
  __HAL_RCC_GPIOE_CLK_ENABLE();
 800808e:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8008092:	9301      	str	r3, [sp, #4]
 8008094:	9b01      	ldr	r3, [sp, #4]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8008096:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8008098:	48a5      	ldr	r0, [pc, #660]	; (8008330 <main+0x2c8>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 800809a:	f043 0310 	orr.w	r3, r3, #16
 800809e:	61ab      	str	r3, [r5, #24]
 80080a0:	69ab      	ldr	r3, [r5, #24]
  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80080a2:	2400      	movs	r4, #0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80080a4:	f003 0310 	and.w	r3, r3, #16
 80080a8:	9302      	str	r3, [sp, #8]
 80080aa:	9b02      	ldr	r3, [sp, #8]
  __HAL_RCC_GPIOF_CLK_ENABLE();
 80080ac:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80080ae:	2601      	movs	r6, #1
  __HAL_RCC_GPIOF_CLK_ENABLE();
 80080b0:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80080b4:	61ab      	str	r3, [r5, #24]
 80080b6:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80080b8:	2702      	movs	r7, #2
  __HAL_RCC_GPIOF_CLK_ENABLE();
 80080ba:	f003 0380 	and.w	r3, r3, #128	; 0x80
 80080be:	9303      	str	r3, [sp, #12]
 80080c0:	9b03      	ldr	r3, [sp, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80080c2:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);

  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 80080c4:	f04f 090c 	mov.w	r9, #12
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80080c8:	f043 0304 	orr.w	r3, r3, #4
 80080cc:	61ab      	str	r3, [r5, #24]
 80080ce:	69ab      	ldr	r3, [r5, #24]
  hadc1.Init.NbrOfConversion = 14;
 80080d0:	f04f 080e 	mov.w	r8, #14
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80080d4:	f003 0304 	and.w	r3, r3, #4
 80080d8:	9304      	str	r3, [sp, #16]
 80080da:	9b04      	ldr	r3, [sp, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80080dc:	69ab      	ldr	r3, [r5, #24]
  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
 80080de:	f04f 0a07 	mov.w	sl, #7
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80080e2:	f043 0308 	orr.w	r3, r3, #8
 80080e6:	61ab      	str	r3, [r5, #24]
 80080e8:	69ab      	ldr	r3, [r5, #24]
 80080ea:	f003 0308 	and.w	r3, r3, #8
 80080ee:	9305      	str	r3, [sp, #20]
 80080f0:	9b05      	ldr	r3, [sp, #20]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 80080f2:	69ab      	ldr	r3, [r5, #24]
 80080f4:	f043 0320 	orr.w	r3, r3, #32
 80080f8:	61ab      	str	r3, [r5, #24]
 80080fa:	69ab      	ldr	r3, [r5, #24]
 80080fc:	f003 0320 	and.w	r3, r3, #32
 8008100:	9306      	str	r3, [sp, #24]
 8008102:	9b06      	ldr	r3, [sp, #24]
  __HAL_RCC_GPIOG_CLK_ENABLE();
 8008104:	69ab      	ldr	r3, [r5, #24]
 8008106:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 800810a:	61ab      	str	r3, [r5, #24]
 800810c:	69ab      	ldr	r3, [r5, #24]
 800810e:	f403 7380 	and.w	r3, r3, #256	; 0x100
 8008112:	9307      	str	r3, [sp, #28]
 8008114:	9b07      	ldr	r3, [sp, #28]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8008116:	f7fe f8dd 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 800811a:	2200      	movs	r2, #0
 800811c:	f64f 41c0 	movw	r1, #64704	; 0xfcc0
 8008120:	4884      	ldr	r0, [pc, #528]	; (8008334 <main+0x2cc>)
 8008122:	f7fe f8d7 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 8008126:	2200      	movs	r2, #0
 8008128:	f240 31f3 	movw	r1, #1011	; 0x3f3
 800812c:	4882      	ldr	r0, [pc, #520]	; (8008338 <main+0x2d0>)
 800812e:	f7fe f8d1 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 8008132:	2200      	movs	r2, #0
 8008134:	f648 71ff 	movw	r1, #36863	; 0x8fff
 8008138:	4880      	ldr	r0, [pc, #512]	; (800833c <main+0x2d4>)
 800813a:	f7fe f8cb 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 800813e:	2200      	movs	r2, #0
 8008140:	f647 71fc 	movw	r1, #32764	; 0x7ffc
 8008144:	487e      	ldr	r0, [pc, #504]	; (8008340 <main+0x2d8>)
 8008146:	f7fe f8c5 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
 800814a:	2200      	movs	r2, #0
 800814c:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8008150:	487c      	ldr	r0, [pc, #496]	; (8008344 <main+0x2dc>)
 8008152:	f7fe f8bf 	bl	80062d4 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
 8008156:	2200      	movs	r2, #0
 8008158:	2118      	movs	r1, #24
 800815a:	487b      	ldr	r0, [pc, #492]	; (8008348 <main+0x2e0>)
 800815c:	f7fe f8ba 	bl	80062d4 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8008160:	237f      	movs	r3, #127	; 0x7f
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8008162:	a908      	add	r1, sp, #32
 8008164:	4872      	ldr	r0, [pc, #456]	; (8008330 <main+0x2c8>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8008166:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8008168:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800816a:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800816c:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 800816e:	f7fd ffbf 	bl	80060f0 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 8008172:	f64f 43c0 	movw	r3, #64704	; 0xfcc0
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8008176:	a908      	add	r1, sp, #32
 8008178:	486e      	ldr	r0, [pc, #440]	; (8008334 <main+0x2cc>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 800817a:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800817c:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800817e:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008180:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8008182:	f7fd ffb5 	bl	80060f0 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 8008186:	f240 33f3 	movw	r3, #1011	; 0x3f3
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 800818a:	a908      	add	r1, sp, #32
 800818c:	486a      	ldr	r0, [pc, #424]	; (8008338 <main+0x2d0>)
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 800818e:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8008190:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8008192:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008194:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8008196:	f7fd ffab 	bl	80060f0 <HAL_GPIO_Init>
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 800819a:	a908      	add	r1, sp, #32
 800819c:	4866      	ldr	r0, [pc, #408]	; (8008338 <main+0x2d0>)
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 800819e:	f8cd 9020 	str.w	r9, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80081a2:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80081a4:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 80081a6:	f7fd ffa3 	bl	80060f0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin 
                           ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin 
                           PATH_EN_3_5G_L_Pin */
  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 80081aa:	f648 73ff 	movw	r3, #36863	; 0x8fff
                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
                          |PATH_EN_3_5G_L_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80081ae:	a908      	add	r1, sp, #32
 80081b0:	4862      	ldr	r0, [pc, #392]	; (800833c <main+0x2d4>)
  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 80081b2:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80081b4:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80081b6:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80081b8:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80081ba:	f7fd ff99 	bl	80060f0 <HAL_GPIO_Init>

  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 80081be:	f44f 5340 	mov.w	r3, #12288	; 0x3000
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80081c2:	a908      	add	r1, sp, #32
 80081c4:	485d      	ldr	r0, [pc, #372]	; (800833c <main+0x2d4>)
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 80081c6:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80081c8:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80081ca:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80081cc:	f7fd ff90 	bl	80060f0 <HAL_GPIO_Init>

  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin 
                           BOOT_LED_Pin */
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 80081d0:	f647 73fc 	movw	r3, #32764	; 0x7ffc
                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
                          |BOOT_LED_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 80081d4:	a908      	add	r1, sp, #32
 80081d6:	485a      	ldr	r0, [pc, #360]	; (8008340 <main+0x2d8>)
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 80081d8:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80081da:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80081dc:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80081de:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 80081e0:	f7fd ff86 	bl	80060f0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 80081e4:	f44f 7340 	mov.w	r3, #768	; 0x300
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80081e8:	a908      	add	r1, sp, #32
 80081ea:	4852      	ldr	r0, [pc, #328]	; (8008334 <main+0x2cc>)
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 80081ec:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80081ee:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80081f0:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80081f2:	f7fd ff7d 	bl	80060f0 <HAL_GPIO_Init>

  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
 80081f6:	f44f 4300 	mov.w	r3, #32768	; 0x8000
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
 80081fa:	a908      	add	r1, sp, #32
 80081fc:	4851      	ldr	r0, [pc, #324]	; (8008344 <main+0x2dc>)
  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
 80081fe:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8008200:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8008202:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008204:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
 8008206:	f7fd ff73 	bl	80060f0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 800820a:	2318      	movs	r3, #24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800820c:	a908      	add	r1, sp, #32
 800820e:	484e      	ldr	r0, [pc, #312]	; (8008348 <main+0x2e0>)
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 8008210:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8008212:	9609      	str	r6, [sp, #36]	; 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8008214:	970b      	str	r7, [sp, #44]	; 0x2c
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008216:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8008218:	f7fd ff6a 	bl	80060f0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 800821c:	2360      	movs	r3, #96	; 0x60
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800821e:	a908      	add	r1, sp, #32
 8008220:	4849      	ldr	r0, [pc, #292]	; (8008348 <main+0x2e0>)
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 8008222:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8008224:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008226:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8008228:	f7fd ff62 	bl	80060f0 <HAL_GPIO_Init>
  __HAL_RCC_DMA1_CLK_ENABLE();
 800822c:	696b      	ldr	r3, [r5, #20]
 800822e:	4333      	orrs	r3, r6
 8008230:	616b      	str	r3, [r5, #20]
 8008232:	696b      	ldr	r3, [r5, #20]
  hadc1.Instance = ADC1;
 8008234:	4d45      	ldr	r5, [pc, #276]	; (800834c <main+0x2e4>)
  __HAL_RCC_DMA1_CLK_ENABLE();
 8008236:	4033      	ands	r3, r6
 8008238:	9300      	str	r3, [sp, #0]
 800823a:	9b00      	ldr	r3, [sp, #0]
  hadc1.Instance = ADC1;
 800823c:	4b44      	ldr	r3, [pc, #272]	; (8008350 <main+0x2e8>)
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 800823e:	4628      	mov	r0, r5
  hadc1.Instance = ADC1;
 8008240:	602b      	str	r3, [r5, #0]
  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
 8008242:	f44f 7380 	mov.w	r3, #256	; 0x100
 8008246:	60ab      	str	r3, [r5, #8]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 8008248:	f44f 2360 	mov.w	r3, #917504	; 0xe0000
  hadc1.Init.ContinuousConvMode = ENABLE;
 800824c:	60ee      	str	r6, [r5, #12]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 800824e:	61eb      	str	r3, [r5, #28]
  ADC_ChannelConfTypeDef sConfig = {0};
 8008250:	9408      	str	r4, [sp, #32]
 8008252:	9409      	str	r4, [sp, #36]	; 0x24
 8008254:	940a      	str	r4, [sp, #40]	; 0x28
  hadc1.Init.DiscontinuousConvMode = DISABLE;
 8008256:	616c      	str	r4, [r5, #20]
  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 8008258:	606c      	str	r4, [r5, #4]
  hadc1.Init.NbrOfConversion = 14;
 800825a:	f8c5 8010 	str.w	r8, [r5, #16]
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 800825e:	f7fd faff 	bl	8005860 <HAL_ADC_Init>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008262:	a908      	add	r1, sp, #32
 8008264:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_1;
 8008266:	9609      	str	r6, [sp, #36]	; 0x24
  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
 8008268:	f8cd a028 	str.w	sl, [sp, #40]	; 0x28
  sConfig.Channel = ADC_CHANNEL_0;
 800826c:	9408      	str	r4, [sp, #32]
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 800826e:	f7fd f98b 	bl	8005588 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_1;
 8008272:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_3;
 8008274:	2603      	movs	r6, #3
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008276:	a908      	add	r1, sp, #32
 8008278:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_2;
 800827a:	9709      	str	r7, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 800827c:	f7fd f984 	bl	8005588 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008280:	a908      	add	r1, sp, #32
 8008282:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_2;
 8008284:	9708      	str	r7, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_3;
 8008286:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008288:	f7fd f97e 	bl	8005588 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_3;
 800828c:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_4;
 800828e:	2604      	movs	r6, #4
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008290:	a908      	add	r1, sp, #32
 8008292:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_4;
 8008294:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008296:	f7fd f977 	bl	8005588 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_4;
 800829a:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_5;
 800829c:	2605      	movs	r6, #5
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 800829e:	a908      	add	r1, sp, #32
 80082a0:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_5;
 80082a2:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082a4:	f7fd f970 	bl	8005588 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_5;
 80082a8:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_6;
 80082aa:	2606      	movs	r6, #6
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082ac:	a908      	add	r1, sp, #32
 80082ae:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_6;
 80082b0:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082b2:	f7fd f969 	bl	8005588 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_6;
 80082b6:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_8;
 80082b8:	2608      	movs	r6, #8
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082ba:	a908      	add	r1, sp, #32
 80082bc:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_7;
 80082be:	f8cd a024 	str.w	sl, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082c2:	f7fd f961 	bl	8005588 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082c6:	a908      	add	r1, sp, #32
 80082c8:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_7;
 80082ca:	f8cd a020 	str.w	sl, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_8;
 80082ce:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082d0:	f7fd f95a 	bl	8005588 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_8;
 80082d4:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_9;
 80082d6:	2609      	movs	r6, #9
  sConfig.Rank = ADC_REGULAR_RANK_10;
 80082d8:	f04f 0a0a 	mov.w	sl, #10
  sConfig.Rank = ADC_REGULAR_RANK_11;
 80082dc:	270b      	movs	r7, #11
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082de:	a908      	add	r1, sp, #32
 80082e0:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_9;
 80082e2:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082e4:	f7fd f950 	bl	8005588 <HAL_ADC_ConfigChannel>
  sConfig.Channel = ADC_CHANNEL_9;
 80082e8:	9608      	str	r6, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_13;
 80082ea:	260d      	movs	r6, #13
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082ec:	a908      	add	r1, sp, #32
 80082ee:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_10;
 80082f0:	f8cd a024 	str.w	sl, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082f4:	f7fd f948 	bl	8005588 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80082f8:	a908      	add	r1, sp, #32
 80082fa:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_10;
 80082fc:	f8cd a020 	str.w	sl, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_11;
 8008300:	9709      	str	r7, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008302:	f7fd f941 	bl	8005588 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008306:	a908      	add	r1, sp, #32
 8008308:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_11;
 800830a:	9708      	str	r7, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_12;
 800830c:	f8cd 9024 	str.w	r9, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008310:	f7fd f93a 	bl	8005588 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008314:	a908      	add	r1, sp, #32
 8008316:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_13;
 8008318:	9609      	str	r6, [sp, #36]	; 0x24
  sConfig.Channel = ADC_CHANNEL_12;
 800831a:	f8cd 9020 	str.w	r9, [sp, #32]
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 800831e:	f7fd f933 	bl	8005588 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008322:	a908      	add	r1, sp, #32
 8008324:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_13;
 8008326:	9608      	str	r6, [sp, #32]
 8008328:	e014      	b.n	8008354 <main+0x2ec>
 800832a:	bf00      	nop
 800832c:	40021000 	.word	0x40021000
 8008330:	40011800 	.word	0x40011800
 8008334:	40011000 	.word	0x40011000
 8008338:	40011c00 	.word	0x40011c00
 800833c:	40011400 	.word	0x40011400
 8008340:	40012000 	.word	0x40012000
 8008344:	40010800 	.word	0x40010800
 8008348:	40010c00 	.word	0x40010c00
 800834c:	2000068c 	.word	0x2000068c
 8008350:	40012400 	.word	0x40012400
  sConfig.Rank = ADC_REGULAR_RANK_14;
 8008354:	f8cd 8024 	str.w	r8, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 8008358:	f7fd f916 	bl	8005588 <HAL_ADC_ConfigChannel>
  huart1.Init.BaudRate = 115200;
 800835c:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
  huart1.Instance = USART1;
 8008360:	4838      	ldr	r0, [pc, #224]	; (8008444 <main+0x3dc>)
  huart1.Init.BaudRate = 115200;
 8008362:	4a39      	ldr	r2, [pc, #228]	; (8008448 <main+0x3e0>)
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8008364:	6084      	str	r4, [r0, #8]
  huart1.Init.BaudRate = 115200;
 8008366:	e880 000c 	stmia.w	r0, {r2, r3}
  huart1.Init.StopBits = UART_STOPBITS_1;
 800836a:	60c4      	str	r4, [r0, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 800836c:	6104      	str	r4, [r0, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 800836e:	f8c0 9014 	str.w	r9, [r0, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8008372:	6184      	str	r4, [r0, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8008374:	61c4      	str	r4, [r0, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8008376:	f7fe fd4f 	bl	8006e18 <HAL_UART_Init>
  htim6.Init.Prescaler = 5600-1;
 800837a:	f241 53df 	movw	r3, #5599	; 0x15df
  htim6.Instance = TIM6;
 800837e:	4e33      	ldr	r6, [pc, #204]	; (800844c <main+0x3e4>)
  htim6.Init.Prescaler = 5600-1;
 8008380:	4933      	ldr	r1, [pc, #204]	; (8008450 <main+0x3e8>)
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8008382:	4630      	mov	r0, r6
  htim6.Init.Prescaler = 5600-1;
 8008384:	e886 000a 	stmia.w	r6, {r1, r3}
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 8008388:	9408      	str	r4, [sp, #32]
 800838a:	9409      	str	r4, [sp, #36]	; 0x24
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 800838c:	60b4      	str	r4, [r6, #8]
  htim6.Init.Period = 10;
 800838e:	f8c6 a00c 	str.w	sl, [r6, #12]
  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 8008392:	61b4      	str	r4, [r6, #24]
  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
 8008394:	f7fe fc2e 	bl	8006bf4 <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 8008398:	a908      	add	r1, sp, #32
 800839a:	4630      	mov	r0, r6
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 800839c:	9408      	str	r4, [sp, #32]
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 800839e:	9409      	str	r4, [sp, #36]	; 0x24
  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
 80083a0:	f7fe fc42 	bl	8006c28 <HAL_TIMEx_MasterConfigSynchronization>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 80083a4:	4622      	mov	r2, r4
 80083a6:	4621      	mov	r1, r4
 80083a8:	2025      	movs	r0, #37	; 0x25
 80083aa:	f7fd fb5d 	bl	8005a68 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 80083ae:	2025      	movs	r0, #37	; 0x25
 80083b0:	f7fd fb8e 	bl	8005ad0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
 80083b4:	4622      	mov	r2, r4
 80083b6:	4621      	mov	r1, r4
 80083b8:	2036      	movs	r0, #54	; 0x36
 80083ba:	f7fd fb55 	bl	8005a68 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM6_IRQn);
 80083be:	2036      	movs	r0, #54	; 0x36
 80083c0:	f7fd fb86 	bl	8005ad0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 80083c4:	4622      	mov	r2, r4
 80083c6:	4621      	mov	r1, r4
 80083c8:	4638      	mov	r0, r7
 80083ca:	f7fd fb4d 	bl	8005a68 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
 80083ce:	4638      	mov	r0, r7
 80083d0:	f7fd fb7e 	bl	8005ad0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
 80083d4:	4622      	mov	r2, r4
 80083d6:	4621      	mov	r1, r4
 80083d8:	4640      	mov	r0, r8
 80083da:	f7fd fb45 	bl	8005a68 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
 80083de:	4640      	mov	r0, r8
 80083e0:	f7fd fb76 	bl	8005ad0 <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
 80083e4:	4622      	mov	r2, r4
 80083e6:	4621      	mov	r1, r4
 80083e8:	200f      	movs	r0, #15
 80083ea:	f7fd fb3d 	bl	8005a68 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
 80083ee:	200f      	movs	r0, #15
 80083f0:	f7fd fb6e 	bl	8005ad0 <HAL_NVIC_EnableIRQ>
  InitUartQueue(&TerminalQueue);
 80083f4:	4817      	ldr	r0, [pc, #92]	; (8008454 <main+0x3ec>)
 80083f6:	f000 fad7 	bl	80089a8 <InitUartQueue>
  Power_ON_OFF_Initialize();  
 80083fa:	f7ff fd13 	bl	8007e24 <Power_ON_OFF_Initialize>
  Path_Init();
 80083fe:	f7ff fc59 	bl	8007cb4 <Path_Init>
  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
 8008402:	4628      	mov	r0, r5
 8008404:	f7fd fab6 	bl	8005974 <HAL_ADCEx_Calibration_Start>
 8008408:	2800      	cmp	r0, #0
 800840a:	d1fa      	bne.n	8008402 <main+0x39a>
  AD5318_Initialize();
 800840c:	f7fe ffb0 	bl	8007370 <AD5318_Initialize>
  Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
 8008410:	4811      	ldr	r0, [pc, #68]	; (8008458 <main+0x3f0>)
 8008412:	f7ff fc3e 	bl	8007c92 <Bluecell_Flash_Read>
  ADF4153_Initialize();
 8008416:	f7ff fae1 	bl	80079dc <ADF4153_Initialize>
  ADF4113_Initialize();
 800841a:	f000 f825 	bl	8008468 <ADF4113_Initialize>
  PE43711_PinInit();
 800841e:	f7ff f9af 	bl	8007780 <PE43711_PinInit>
  BDA4601_Initialize();
 8008422:	f7ff f82b 	bl	800747c <BDA4601_Initialize>
  ATTEN_PLL_PATH_Initialize();
 8008426:	f7ff fceb 	bl	8007e00 <ATTEN_PLL_PATH_Initialize>
  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
 800842a:	220e      	movs	r2, #14
 800842c:	490b      	ldr	r1, [pc, #44]	; (800845c <main+0x3f4>)
 800842e:	480c      	ldr	r0, [pc, #48]	; (8008460 <main+0x3f8>)
 8008430:	f7fd f966 	bl	8005700 <HAL_ADC_Start_DMA>
    Boot_LED_Toggle();
 8008434:	f7ff fd70 	bl	8007f18 <Boot_LED_Toggle>
    Uart_Check();
 8008438:	f7ff fda0 	bl	8007f7c <Uart_Check>
    ADC_Check();
 800843c:	f7ff fd7e 	bl	8007f3c <ADC_Check>
 8008440:	e7f8      	b.n	8008434 <main+0x3cc>
 8008442:	bf00      	nop
 8008444:	20000700 	.word	0x20000700
 8008448:	40013800 	.word	0x40013800
 800844c:	20000784 	.word	0x20000784
 8008450:	40001000 	.word	0x40001000
 8008454:	20000bc4 	.word	0x20000bc4
 8008458:	20000580 	.word	0x20000580
 800845c:	200004a0 	.word	0x200004a0
 8008460:	2000068c 	.word	0x2000068c

08008464 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8008464:	4770      	bx	lr
	...

08008468 <ADF4113_Initialize>:
    uint16_t P;
    uint16_t A;   
    uint16_t N;       
}Adf4113_st;
void ADF4113_Initialize(void){
  if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
 8008468:	4b10      	ldr	r3, [pc, #64]	; (80084ac <ADF4113_Initialize+0x44>)
 800846a:	7d9a      	ldrb	r2, [r3, #22]
 800846c:	b92a      	cbnz	r2, 800847a <ADF4113_Initialize+0x12>
 800846e:	7dda      	ldrb	r2, [r3, #23]
 8008470:	b91a      	cbnz	r2, 800847a <ADF4113_Initialize+0x12>
    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47;
 8008472:	223e      	movs	r2, #62	; 0x3e
 8008474:	759a      	strb	r2, [r3, #22]
    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF);
 8008476:	2280      	movs	r2, #128	; 0x80
 8008478:	75da      	strb	r2, [r3, #23]
  }
  if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
 800847a:	7e1a      	ldrb	r2, [r3, #24]
 800847c:	b92a      	cbnz	r2, 800848a <ADF4113_Initialize+0x22>
 800847e:	7e5a      	ldrb	r2, [r3, #25]
 8008480:	b91a      	cbnz	r2, 800848a <ADF4113_Initialize+0x22>
    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8);
 8008482:	2238      	movs	r2, #56	; 0x38
 8008484:	761a      	strb	r2, [r3, #24]
    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF);
 8008486:	22d6      	movs	r2, #214	; 0xd6
 8008488:	765a      	strb	r2, [r3, #25]
  }
  if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
 800848a:	7e9a      	ldrb	r2, [r3, #26]
 800848c:	b92a      	cbnz	r2, 800849a <ADF4113_Initialize+0x32>
 800848e:	7eda      	ldrb	r2, [r3, #27]
 8008490:	b91a      	cbnz	r2, 800849a <ADF4113_Initialize+0x32>
    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8);
 8008492:	224d      	movs	r2, #77	; 0x4d
 8008494:	769a      	strb	r2, [r3, #26]
    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF);
 8008496:	22ee      	movs	r2, #238	; 0xee
 8008498:	76da      	strb	r2, [r3, #27]
  }
  if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
 800849a:	7f1a      	ldrb	r2, [r3, #28]
 800849c:	b92a      	cbnz	r2, 80084aa <ADF4113_Initialize+0x42>
 800849e:	7f5a      	ldrb	r2, [r3, #29]
 80084a0:	b91a      	cbnz	r2, 80084aa <ADF4113_Initialize+0x42>
    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8);
 80084a2:	2259      	movs	r2, #89	; 0x59
 80084a4:	771a      	strb	r2, [r3, #28]
    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF);    
 80084a6:	22a6      	movs	r2, #166	; 0xa6
 80084a8:	775a      	strb	r2, [r3, #29]
 80084aa:	4770      	bx	lr
 80084ac:	20000580 	.word	0x20000580

080084b0 <N_Counter_Latch_Create>:
    A = N_val -(B * P);
//    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
//    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
  return N_Counter_Latch_Create(A,B,0);
}
uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
 80084b0:	2301      	movs	r3, #1
 80084b2:	b570      	push	{r4, r5, r6, lr}
 80084b4:	2402      	movs	r4, #2
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 2; i < 8; i++){
        if(_ACOUNTER & 0x01)
            ret += shift_bit << i;
 80084b6:	461d      	mov	r5, r3
        if(_ACOUNTER & 0x01)
 80084b8:	07c6      	lsls	r6, r0, #31
            ret += shift_bit << i;
 80084ba:	bf48      	it	mi
 80084bc:	fa05 f604 	lslmi.w	r6, r5, r4
 80084c0:	f104 0401 	add.w	r4, r4, #1
 80084c4:	bf48      	it	mi
 80084c6:	199b      	addmi	r3, r3, r6
    for(i = 2; i < 8; i++){
 80084c8:	2c08      	cmp	r4, #8
        _ACOUNTER = _ACOUNTER >> 1;
 80084ca:	ea4f 0050 	mov.w	r0, r0, lsr #1
    for(i = 2; i < 8; i++){
 80084ce:	d1f3      	bne.n	80084b8 <N_Counter_Latch_Create+0x8>
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    for(i = 8; i < 21; i++){
        if(_BCOUNTER & 0x01)
            ret += shift_bit << i;
 80084d0:	2001      	movs	r0, #1
        if(_BCOUNTER & 0x01)
 80084d2:	07cd      	lsls	r5, r1, #31
            ret += shift_bit << i;
 80084d4:	bf48      	it	mi
 80084d6:	fa00 f504 	lslmi.w	r5, r0, r4
 80084da:	f104 0401 	add.w	r4, r4, #1
 80084de:	bf48      	it	mi
 80084e0:	195b      	addmi	r3, r3, r5
    for(i = 8; i < 21; i++){
 80084e2:	2c15      	cmp	r4, #21
        _BCOUNTER = _BCOUNTER >> 1;
 80084e4:	ea4f 0151 	mov.w	r1, r1, lsr #1
    for(i = 8; i < 21; i++){
 80084e8:	d1f3      	bne.n	80084d2 <N_Counter_Latch_Create+0x22>
    }      
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    if(_CPGAIN & 0x01)
 80084ea:	07d2      	lsls	r2, r2, #31
            ret += shift_bit << i++;
 80084ec:	bf48      	it	mi
 80084ee:	f503 1300 	addmi.w	r3, r3, #2097152	; 0x200000
    }   
#ifdef DEBUG_PRINT
    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
#endif /* DEBUG_PRINT */
    return ret;
}
 80084f2:	4618      	mov	r0, r3
 80084f4:	bd70      	pop	{r4, r5, r6, pc}
	...

080084f8 <halSynSetFreq>:
    N_val = (rf_Freq / ADF4113_CH_STEP);
 80084f8:	f24c 3350 	movw	r3, #50000	; 0xc350
 80084fc:	fbb0 f3f3 	udiv	r3, r0, r3
    if( N_val < ADF4113_PRE8_MIN_N) { 
 8008500:	2b37      	cmp	r3, #55	; 0x37
 8008502:	d909      	bls.n	8008518 <halSynSetFreq+0x20>
    B = N_val / P;
 8008504:	4905      	ldr	r1, [pc, #20]	; (800851c <halSynSetFreq+0x24>)
  return N_Counter_Latch_Create(A,B,0);
 8008506:	2200      	movs	r2, #0
    B = N_val / P;
 8008508:	fbb0 f1f1 	udiv	r1, r0, r1
    A = N_val -(B * P);
 800850c:	eba3 1041 	sub.w	r0, r3, r1, lsl #5
  return N_Counter_Latch_Create(A,B,0);
 8008510:	b280      	uxth	r0, r0
 8008512:	b289      	uxth	r1, r1
 8008514:	f7ff bfcc 	b.w	80084b0 <N_Counter_Latch_Create>
}
 8008518:	2004      	movs	r0, #4
 800851a:	4770      	bx	lr
 800851c:	00186a00 	.word	0x00186a00

08008520 <ADF4113_Module_Ctrl>:
void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
 8008520:	b084      	sub	sp, #16
 8008522:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8008526:	ac0c      	add	r4, sp, #48	; 0x30
 8008528:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
    R2 = R2 & 0xFFFFFF;
    R1 = R1 & 0xFFFFFF;
 800852c:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 800852e:	f8bd 7034 	ldrh.w	r7, [sp, #52]	; 0x34
 8008532:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008536:	9301      	str	r3, [sp, #4]
    R0 = R0 & 0xFFFFFF;
 8008538:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800853a:	f8dd 8038 	ldr.w	r8, [sp, #56]	; 0x38
 800853e:	f8bd 903c 	ldrh.w	r9, [sp, #60]	; 0x3c
 8008542:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008546:	9d10      	ldr	r5, [sp, #64]	; 0x40
 8008548:	f8bd 6044 	ldrh.w	r6, [sp, #68]	; 0x44
    
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 800854c:	2200      	movs	r2, #0
 800854e:	4639      	mov	r1, r7
    R0 = R0 & 0xFFFFFF;
 8008550:	9300      	str	r3, [sp, #0]
 8008552:	4682      	mov	sl, r0
    R2 = R2 & 0xFFFFFF;
 8008554:	9c14      	ldr	r4, [sp, #80]	; 0x50
    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8008556:	f7fd febd 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800855a:	2200      	movs	r2, #0
 800855c:	4649      	mov	r1, r9
 800855e:	4640      	mov	r0, r8
 8008560:	f7fd feb8 	bl	80062d4 <HAL_GPIO_WritePin>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 8008564:	2200      	movs	r2, #0
 8008566:	4631      	mov	r1, r6
 8008568:	4628      	mov	r0, r5
 800856a:	f7fd feb3 	bl	80062d4 <HAL_GPIO_WritePin>
 800856e:	f04f 0b18 	mov.w	fp, #24
    R2 = R2 & 0xFFFFFF;
 8008572:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
    /*   R2 Ctrl    */
     for(int i =0; i < 24; i++){
         if(R2 & 0x800000){
 8008576:	f414 0200 	ands.w	r2, r4, #8388608	; 0x800000
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("1");
#endif // PYJ.2019.08.11_END -- 
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 800857a:	bf18      	it	ne
 800857c:	2201      	movne	r2, #1
         }
         else{
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");
#endif // PYJ.2019.08.11_END -- 
             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800857e:	4649      	mov	r1, r9
 8008580:	4640      	mov	r0, r8
 8008582:	f7fd fea7 	bl	80062d4 <HAL_GPIO_WritePin>
         }
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8008586:	2201      	movs	r2, #1
 8008588:	4639      	mov	r1, r7
 800858a:	4650      	mov	r0, sl
 800858c:	f7fd fea2 	bl	80062d4 <HAL_GPIO_WritePin>
         Pol_Delay_us(10);
 8008590:	200a      	movs	r0, #10
 8008592:	f7ff fcab 	bl	8007eec <Pol_Delay_us>
          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8008596:	2200      	movs	r2, #0
 8008598:	4639      	mov	r1, r7
 800859a:	4650      	mov	r0, sl
 800859c:	f7fd fe9a 	bl	80062d4 <HAL_GPIO_WritePin>
         R2 = ((R2 << 1) & 0xFFFFFF);
 80085a0:	0064      	lsls	r4, r4, #1
     for(int i =0; i < 24; i++){
 80085a2:	f1bb 0b01 	subs.w	fp, fp, #1
         R2 = ((R2 << 1) & 0xFFFFFF);
 80085a6:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
     for(int i =0; i < 24; i++){
 80085aa:	d1e4      	bne.n	8008576 <ADF4113_Module_Ctrl+0x56>
     }
#if 0 // PYJ.2019.08.11_BEGIN -- 
     printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 80085ac:	2201      	movs	r2, #1
 80085ae:	4631      	mov	r1, r6
 80085b0:	4628      	mov	r0, r5
 80085b2:	f7fd fe8f 	bl	80062d4 <HAL_GPIO_WritePin>
     Pol_Delay_us(10);
 80085b6:	200a      	movs	r0, #10
 80085b8:	f7ff fc98 	bl	8007eec <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 80085bc:	465a      	mov	r2, fp
 80085be:	4631      	mov	r1, r6
 80085c0:	4628      	mov	r0, r5
 80085c2:	f7fd fe87 	bl	80062d4 <HAL_GPIO_WritePin>
 80085c6:	2418      	movs	r4, #24
        /*   R0 Ctrl    */
   
    for(int i =0; i < 24; i++){
        if(R0 & 0x800000){
 80085c8:	9b00      	ldr	r3, [sp, #0]
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("1");
#endif // PYJ.2019.08.11_END -- 
        }
        else{
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80085ca:	4649      	mov	r1, r9
        if(R0 & 0x800000){
 80085cc:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 80085d0:	bf18      	it	ne
 80085d2:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 80085d4:	4640      	mov	r0, r8
 80085d6:	f7fd fe7d 	bl	80062d4 <HAL_GPIO_WritePin>
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");
#endif // PYJ.2019.08.11_END -- 
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 80085da:	2201      	movs	r2, #1
 80085dc:	4639      	mov	r1, r7
 80085de:	4650      	mov	r0, sl
 80085e0:	f7fd fe78 	bl	80062d4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 80085e4:	200a      	movs	r0, #10
 80085e6:	f7ff fc81 	bl	8007eec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 80085ea:	2200      	movs	r2, #0
 80085ec:	4639      	mov	r1, r7
 80085ee:	4650      	mov	r0, sl
 80085f0:	f7fd fe70 	bl	80062d4 <HAL_GPIO_WritePin>
        R0 = ((R0 << 1) & 0xFFFFFF);
 80085f4:	9b00      	ldr	r3, [sp, #0]
    for(int i =0; i < 24; i++){
 80085f6:	3c01      	subs	r4, #1
        R0 = ((R0 << 1) & 0xFFFFFF);
 80085f8:	ea4f 0343 	mov.w	r3, r3, lsl #1
 80085fc:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008600:	9300      	str	r3, [sp, #0]
    for(int i =0; i < 24; i++){
 8008602:	d1e1      	bne.n	80085c8 <ADF4113_Module_Ctrl+0xa8>
    }  
#if 0 // PYJ.2019.08.11_BEGIN -- 
        printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 8008604:	2201      	movs	r2, #1
 8008606:	4631      	mov	r1, r6
 8008608:	4628      	mov	r0, r5
 800860a:	f7fd fe63 	bl	80062d4 <HAL_GPIO_WritePin>
     
     Pol_Delay_us(10);
 800860e:	200a      	movs	r0, #10
 8008610:	f7ff fc6c 	bl	8007eec <Pol_Delay_us>
     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);    
 8008614:	4622      	mov	r2, r4
 8008616:	4631      	mov	r1, r6
 8008618:	4628      	mov	r0, r5
 800861a:	f7fd fe5b 	bl	80062d4 <HAL_GPIO_WritePin>
 800861e:	2418      	movs	r4, #24
     /*   R1 Ctrl    */
    for(int i =0; i < 24; i++){
        if(R1 & 0x800000){
 8008620:	9b01      	ldr	r3, [sp, #4]
        }
        else{
#if 0 // PYJ.2019.08.11_BEGIN -- 
            printf("0");            
#endif // PYJ.2019.08.11_END -- 
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 8008622:	4649      	mov	r1, r9
        if(R1 & 0x800000){
 8008624:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
 8008628:	bf18      	it	ne
 800862a:	2201      	movne	r2, #1
            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
 800862c:	4640      	mov	r0, r8
 800862e:	f7fd fe51 	bl	80062d4 <HAL_GPIO_WritePin>
        }
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
 8008632:	2201      	movs	r2, #1
 8008634:	4639      	mov	r1, r7
 8008636:	4650      	mov	r0, sl
 8008638:	f7fd fe4c 	bl	80062d4 <HAL_GPIO_WritePin>
        Pol_Delay_us(10);
 800863c:	200a      	movs	r0, #10
 800863e:	f7ff fc55 	bl	8007eec <Pol_Delay_us>
         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
 8008642:	2200      	movs	r2, #0
 8008644:	4639      	mov	r1, r7
 8008646:	4650      	mov	r0, sl
 8008648:	f7fd fe44 	bl	80062d4 <HAL_GPIO_WritePin>
        R1 = ((R1 << 1) & 0xFFFFFF);
 800864c:	9b01      	ldr	r3, [sp, #4]
    for(int i =0; i < 24; i++){
 800864e:	3c01      	subs	r4, #1
        R1 = ((R1 << 1) & 0xFFFFFF);
 8008650:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8008654:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8008658:	9301      	str	r3, [sp, #4]
    for(int i =0; i < 24; i++){
 800865a:	d1e1      	bne.n	8008620 <ADF4113_Module_Ctrl+0x100>
    }
#if 0 // PYJ.2019.08.11_BEGIN -- 
        printf("\r\n");
#endif // PYJ.2019.08.11_END -- 
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
 800865c:	4631      	mov	r1, r6
 800865e:	2201      	movs	r2, #1
 8008660:	4628      	mov	r0, r5
 8008662:	f7fd fe37 	bl	80062d4 <HAL_GPIO_WritePin>
    Pol_Delay_us(10);
 8008666:	200a      	movs	r0, #10
 8008668:	f7ff fc40 	bl	8007eec <Pol_Delay_us>
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800866c:	4622      	mov	r2, r4
 800866e:	4631      	mov	r1, r6
 8008670:	4628      	mov	r0, r5

}
 8008672:	b003      	add	sp, #12
 8008674:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8008678:	b004      	add	sp, #16
    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
 800867a:	f7fd be2b 	b.w	80062d4 <HAL_GPIO_WritePin>
	...

08008680 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8008680:	4b0e      	ldr	r3, [pc, #56]	; (80086bc <HAL_MspInit+0x3c>)
{
 8008682:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8008684:	699a      	ldr	r2, [r3, #24]
 8008686:	f042 0201 	orr.w	r2, r2, #1
 800868a:	619a      	str	r2, [r3, #24]
 800868c:	699a      	ldr	r2, [r3, #24]
 800868e:	f002 0201 	and.w	r2, r2, #1
 8008692:	9200      	str	r2, [sp, #0]
 8008694:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8008696:	69da      	ldr	r2, [r3, #28]
 8008698:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 800869c:	61da      	str	r2, [r3, #28]
 800869e:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled 
  */
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 80086a0:	4a07      	ldr	r2, [pc, #28]	; (80086c0 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 80086a2:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80086a6:	9301      	str	r3, [sp, #4]
 80086a8:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_NOJTAG();
 80086aa:	6853      	ldr	r3, [r2, #4]
 80086ac:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 80086b0:	f043 7300 	orr.w	r3, r3, #33554432	; 0x2000000
 80086b4:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 80086b6:	b002      	add	sp, #8
 80086b8:	4770      	bx	lr
 80086ba:	bf00      	nop
 80086bc:	40021000 	.word	0x40021000
 80086c0:	40010000 	.word	0x40010000

080086c4 <HAL_ADC_MspInit>:
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80086c4:	2210      	movs	r2, #16
{
 80086c6:	b530      	push	{r4, r5, lr}
 80086c8:	4605      	mov	r5, r0
 80086ca:	b089      	sub	sp, #36	; 0x24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80086cc:	eb0d 0002 	add.w	r0, sp, r2
 80086d0:	2100      	movs	r1, #0
 80086d2:	f000 ffbc 	bl	800964e <memset>
  if(hadc->Instance==ADC1)
 80086d6:	682a      	ldr	r2, [r5, #0]
 80086d8:	4b2c      	ldr	r3, [pc, #176]	; (800878c <HAL_ADC_MspInit+0xc8>)
 80086da:	429a      	cmp	r2, r3
 80086dc:	d153      	bne.n	8008786 <HAL_ADC_MspInit+0xc2>
  {
  /* USER CODE BEGIN ADC1_MspInit 0 */

  /* USER CODE END ADC1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_ADC1_CLK_ENABLE();
 80086de:	f503 436c 	add.w	r3, r3, #60416	; 0xec00
 80086e2:	699a      	ldr	r2, [r3, #24]
    PA7     ------> ADC1_IN7
    PB0     ------> ADC1_IN8
    PB1     ------> ADC1_IN9 
    */
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 80086e4:	2403      	movs	r4, #3
    __HAL_RCC_ADC1_CLK_ENABLE();
 80086e6:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 80086ea:	619a      	str	r2, [r3, #24]
 80086ec:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80086ee:	a904      	add	r1, sp, #16
    __HAL_RCC_ADC1_CLK_ENABLE();
 80086f0:	f402 7200 	and.w	r2, r2, #512	; 0x200
 80086f4:	9200      	str	r2, [sp, #0]
 80086f6:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 80086f8:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80086fa:	4825      	ldr	r0, [pc, #148]	; (8008790 <HAL_ADC_MspInit+0xcc>)
    __HAL_RCC_GPIOC_CLK_ENABLE();
 80086fc:	f042 0210 	orr.w	r2, r2, #16
 8008700:	619a      	str	r2, [r3, #24]
 8008702:	699a      	ldr	r2, [r3, #24]
 8008704:	f002 0210 	and.w	r2, r2, #16
 8008708:	9201      	str	r2, [sp, #4]
 800870a:	9a01      	ldr	r2, [sp, #4]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 800870c:	699a      	ldr	r2, [r3, #24]
 800870e:	f042 0204 	orr.w	r2, r2, #4
 8008712:	619a      	str	r2, [r3, #24]
 8008714:	699a      	ldr	r2, [r3, #24]
 8008716:	f002 0204 	and.w	r2, r2, #4
 800871a:	9202      	str	r2, [sp, #8]
 800871c:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 800871e:	699a      	ldr	r2, [r3, #24]
 8008720:	f042 0208 	orr.w	r2, r2, #8
 8008724:	619a      	str	r2, [r3, #24]
 8008726:	699b      	ldr	r3, [r3, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8008728:	9405      	str	r4, [sp, #20]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 800872a:	f003 0308 	and.w	r3, r3, #8
 800872e:	9303      	str	r3, [sp, #12]
 8008730:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
 8008732:	230f      	movs	r3, #15
 8008734:	9304      	str	r3, [sp, #16]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8008736:	f7fd fcdb 	bl	80060f0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 800873a:	23ff      	movs	r3, #255	; 0xff
                          |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800873c:	a904      	add	r1, sp, #16
 800873e:	4815      	ldr	r0, [pc, #84]	; (8008794 <HAL_ADC_MspInit+0xd0>)
    GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 8008740:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8008742:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008744:	f7fd fcd4 	bl	80060f0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8008748:	4813      	ldr	r0, [pc, #76]	; (8008798 <HAL_ADC_MspInit+0xd4>)
 800874a:	a904      	add	r1, sp, #16
    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
 800874c:	9404      	str	r4, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 800874e:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8008750:	f7fd fcce 	bl	80060f0 <HAL_GPIO_Init>
    /* ADC1 DMA Init */
    /* ADC1 Init */
    hdma_adc1.Instance = DMA1_Channel1;
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 8008754:	2280      	movs	r2, #128	; 0x80
    hdma_adc1.Instance = DMA1_Channel1;
 8008756:	4c11      	ldr	r4, [pc, #68]	; (800879c <HAL_ADC_MspInit+0xd8>)
 8008758:	4b11      	ldr	r3, [pc, #68]	; (80087a0 <HAL_ADC_MspInit+0xdc>)
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 800875a:	60e2      	str	r2, [r4, #12]
    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 800875c:	f44f 7200 	mov.w	r2, #512	; 0x200
 8008760:	6122      	str	r2, [r4, #16]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 8008762:	f44f 6200 	mov.w	r2, #2048	; 0x800
    hdma_adc1.Instance = DMA1_Channel1;
 8008766:	6023      	str	r3, [r4, #0]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 8008768:	6162      	str	r2, [r4, #20]
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 800876a:	2300      	movs	r3, #0
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 800876c:	2220      	movs	r2, #32
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 800876e:	4620      	mov	r0, r4
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8008770:	6063      	str	r3, [r4, #4]
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
 8008772:	60a3      	str	r3, [r4, #8]
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 8008774:	61a2      	str	r2, [r4, #24]
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 8008776:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 8008778:	f7fd f9cc 	bl	8005b14 <HAL_DMA_Init>
 800877c:	b108      	cbz	r0, 8008782 <HAL_ADC_MspInit+0xbe>
    {
      Error_Handler();
 800877e:	f7ff fe71 	bl	8008464 <Error_Handler>
    }

    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
 8008782:	622c      	str	r4, [r5, #32]
 8008784:	6265      	str	r5, [r4, #36]	; 0x24
  /* USER CODE BEGIN ADC1_MspInit 1 */

  /* USER CODE END ADC1_MspInit 1 */
  }

}
 8008786:	b009      	add	sp, #36	; 0x24
 8008788:	bd30      	pop	{r4, r5, pc}
 800878a:	bf00      	nop
 800878c:	40012400 	.word	0x40012400
 8008790:	40011000 	.word	0x40011000
 8008794:	40010800 	.word	0x40010800
 8008798:	40010c00 	.word	0x40010c00
 800879c:	20000740 	.word	0x20000740
 80087a0:	40020008 	.word	0x40020008

080087a4 <HAL_TIM_Base_MspInit>:
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
  if(htim_base->Instance==TIM6)
 80087a4:	6802      	ldr	r2, [r0, #0]
 80087a6:	4b08      	ldr	r3, [pc, #32]	; (80087c8 <HAL_TIM_Base_MspInit+0x24>)
{
 80087a8:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM6)
 80087aa:	429a      	cmp	r2, r3
 80087ac:	d10a      	bne.n	80087c4 <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM6_MspInit 0 */

  /* USER CODE END TIM6_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM6_CLK_ENABLE();
 80087ae:	f503 3300 	add.w	r3, r3, #131072	; 0x20000
 80087b2:	69da      	ldr	r2, [r3, #28]
 80087b4:	f042 0210 	orr.w	r2, r2, #16
 80087b8:	61da      	str	r2, [r3, #28]
 80087ba:	69db      	ldr	r3, [r3, #28]
 80087bc:	f003 0310 	and.w	r3, r3, #16
 80087c0:	9301      	str	r3, [sp, #4]
 80087c2:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM6_MspInit 1 */

  /* USER CODE END TIM6_MspInit 1 */
  }

}
 80087c4:	b002      	add	sp, #8
 80087c6:	4770      	bx	lr
 80087c8:	40001000 	.word	0x40001000

080087cc <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 80087cc:	b570      	push	{r4, r5, r6, lr}
 80087ce:	4606      	mov	r6, r0
 80087d0:	b086      	sub	sp, #24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80087d2:	2210      	movs	r2, #16
 80087d4:	2100      	movs	r1, #0
 80087d6:	a802      	add	r0, sp, #8
 80087d8:	f000 ff39 	bl	800964e <memset>
  if(huart->Instance==USART1)
 80087dc:	6832      	ldr	r2, [r6, #0]
 80087de:	4b2b      	ldr	r3, [pc, #172]	; (800888c <HAL_UART_MspInit+0xc0>)
 80087e0:	429a      	cmp	r2, r3
 80087e2:	d151      	bne.n	8008888 <HAL_UART_MspInit+0xbc>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 80087e4:	f503 4358 	add.w	r3, r3, #55296	; 0xd800
 80087e8:	699a      	ldr	r2, [r3, #24]
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80087ea:	a902      	add	r1, sp, #8
    __HAL_RCC_USART1_CLK_ENABLE();
 80087ec:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 80087f0:	619a      	str	r2, [r3, #24]
 80087f2:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80087f4:	4826      	ldr	r0, [pc, #152]	; (8008890 <HAL_UART_MspInit+0xc4>)
    __HAL_RCC_USART1_CLK_ENABLE();
 80087f6:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 80087fa:	9200      	str	r2, [sp, #0]
 80087fc:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 80087fe:	699a      	ldr	r2, [r3, #24]

    GPIO_InitStruct.Pin = GPIO_PIN_10;
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8008800:	2500      	movs	r5, #0
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8008802:	f042 0204 	orr.w	r2, r2, #4
 8008806:	619a      	str	r2, [r3, #24]
 8008808:	699b      	ldr	r3, [r3, #24]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

    /* USART1 DMA Init */
    /* USART1_RX Init */
    hdma_usart1_rx.Instance = DMA1_Channel5;
 800880a:	4c22      	ldr	r4, [pc, #136]	; (8008894 <HAL_UART_MspInit+0xc8>)
    __HAL_RCC_GPIOA_CLK_ENABLE();
 800880c:	f003 0304 	and.w	r3, r3, #4
 8008810:	9301      	str	r3, [sp, #4]
 8008812:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8008814:	f44f 7300 	mov.w	r3, #512	; 0x200
 8008818:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800881a:	2302      	movs	r3, #2
 800881c:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800881e:	2303      	movs	r3, #3
 8008820:	9305      	str	r3, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008822:	f7fd fc65 	bl	80060f0 <HAL_GPIO_Init>
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8008826:	f44f 6380 	mov.w	r3, #1024	; 0x400
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800882a:	4819      	ldr	r0, [pc, #100]	; (8008890 <HAL_UART_MspInit+0xc4>)
 800882c:	a902      	add	r1, sp, #8
    GPIO_InitStruct.Pin = GPIO_PIN_10;
 800882e:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8008830:	9503      	str	r5, [sp, #12]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8008832:	9504      	str	r5, [sp, #16]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8008834:	f7fd fc5c 	bl	80060f0 <HAL_GPIO_Init>
    hdma_usart1_rx.Instance = DMA1_Channel5;
 8008838:	4b17      	ldr	r3, [pc, #92]	; (8008898 <HAL_UART_MspInit+0xcc>)
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 800883a:	4620      	mov	r0, r4
    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 800883c:	e884 0028 	stmia.w	r4, {r3, r5}
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 8008840:	2380      	movs	r3, #128	; 0x80
    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8008842:	60a5      	str	r5, [r4, #8]
    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 8008844:	60e3      	str	r3, [r4, #12]
    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8008846:	6125      	str	r5, [r4, #16]
    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8008848:	6165      	str	r5, [r4, #20]
    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
 800884a:	61a5      	str	r5, [r4, #24]
    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
 800884c:	61e5      	str	r5, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 800884e:	f7fd f961 	bl	8005b14 <HAL_DMA_Init>
 8008852:	b108      	cbz	r0, 8008858 <HAL_UART_MspInit+0x8c>
    {
      Error_Handler();
 8008854:	f7ff fe06 	bl	8008464 <Error_Handler>

    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);

    /* USART1_TX Init */
    hdma_usart1_tx.Instance = DMA1_Channel4;
    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8008858:	f04f 0c10 	mov.w	ip, #16
 800885c:	4b0f      	ldr	r3, [pc, #60]	; (800889c <HAL_UART_MspInit+0xd0>)
    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
 800885e:	6374      	str	r4, [r6, #52]	; 0x34
 8008860:	6266      	str	r6, [r4, #36]	; 0x24
    hdma_usart1_tx.Instance = DMA1_Channel4;
 8008862:	4c0f      	ldr	r4, [pc, #60]	; (80088a0 <HAL_UART_MspInit+0xd4>)
    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 8008864:	2280      	movs	r2, #128	; 0x80
    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8008866:	e884 1008 	stmia.w	r4, {r3, ip}
    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 800886a:	2300      	movs	r3, #0
    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 800886c:	4620      	mov	r0, r4
    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 800886e:	60a3      	str	r3, [r4, #8]
    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 8008870:	60e2      	str	r2, [r4, #12]
    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8008872:	6123      	str	r3, [r4, #16]
    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8008874:	6163      	str	r3, [r4, #20]
    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
 8008876:	61a3      	str	r3, [r4, #24]
    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
 8008878:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 800887a:	f7fd f94b 	bl	8005b14 <HAL_DMA_Init>
 800887e:	b108      	cbz	r0, 8008884 <HAL_UART_MspInit+0xb8>
    {
      Error_Handler();
 8008880:	f7ff fdf0 	bl	8008464 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
 8008884:	6334      	str	r4, [r6, #48]	; 0x30
 8008886:	6266      	str	r6, [r4, #36]	; 0x24
  /* USER CODE BEGIN USART1_MspInit 1 */

  /* USER CODE END USART1_MspInit 1 */
  }

}
 8008888:	b006      	add	sp, #24
 800888a:	bd70      	pop	{r4, r5, r6, pc}
 800888c:	40013800 	.word	0x40013800
 8008890:	40010800 	.word	0x40010800
 8008894:	200006bc 	.word	0x200006bc
 8008898:	40020058 	.word	0x40020058
 800889c:	40020044 	.word	0x40020044
 80088a0:	20000648 	.word	0x20000648

080088a4 <NMI_Handler>:
 80088a4:	4770      	bx	lr

080088a6 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 80088a6:	e7fe      	b.n	80088a6 <HardFault_Handler>

080088a8 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 80088a8:	e7fe      	b.n	80088a8 <MemManage_Handler>

080088aa <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 80088aa:	e7fe      	b.n	80088aa <BusFault_Handler>

080088ac <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 80088ac:	e7fe      	b.n	80088ac <UsageFault_Handler>

080088ae <SVC_Handler>:
 80088ae:	4770      	bx	lr

080088b0 <DebugMon_Handler>:
 80088b0:	4770      	bx	lr

080088b2 <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 80088b2:	4770      	bx	lr

080088b4 <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 80088b4:	f7fc be08 	b.w	80054c8 <HAL_IncTick>

080088b8 <DMA1_Channel1_IRQHandler>:
void DMA1_Channel1_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */

  /* USER CODE END DMA1_Channel1_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_adc1);
 80088b8:	4801      	ldr	r0, [pc, #4]	; (80088c0 <DMA1_Channel1_IRQHandler+0x8>)
 80088ba:	f7fd ba17 	b.w	8005cec <HAL_DMA_IRQHandler>
 80088be:	bf00      	nop
 80088c0:	20000740 	.word	0x20000740

080088c4 <DMA1_Channel4_IRQHandler>:
void DMA1_Channel4_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */

  /* USER CODE END DMA1_Channel4_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_tx);
 80088c4:	4801      	ldr	r0, [pc, #4]	; (80088cc <DMA1_Channel4_IRQHandler+0x8>)
 80088c6:	f7fd ba11 	b.w	8005cec <HAL_DMA_IRQHandler>
 80088ca:	bf00      	nop
 80088cc:	20000648 	.word	0x20000648

080088d0 <DMA1_Channel5_IRQHandler>:
void DMA1_Channel5_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */

  /* USER CODE END DMA1_Channel5_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_usart1_rx);
 80088d0:	4801      	ldr	r0, [pc, #4]	; (80088d8 <DMA1_Channel5_IRQHandler+0x8>)
 80088d2:	f7fd ba0b 	b.w	8005cec <HAL_DMA_IRQHandler>
 80088d6:	bf00      	nop
 80088d8:	200006bc 	.word	0x200006bc

080088dc <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 80088dc:	4801      	ldr	r0, [pc, #4]	; (80088e4 <USART1_IRQHandler+0x8>)
 80088de:	f7fe bc4d 	b.w	800717c <HAL_UART_IRQHandler>
 80088e2:	bf00      	nop
 80088e4:	20000700 	.word	0x20000700

080088e8 <TIM6_IRQHandler>:
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */

  /* USER CODE END TIM6_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 80088e8:	4801      	ldr	r0, [pc, #4]	; (80088f0 <TIM6_IRQHandler+0x8>)
 80088ea:	f7fe b895 	b.w	8006a18 <HAL_TIM_IRQHandler>
 80088ee:	bf00      	nop
 80088f0:	20000784 	.word	0x20000784

080088f4 <_read>:
	_kill(status, -1);
	while (1) {}		/* Make sure we hang here */
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 80088f4:	b570      	push	{r4, r5, r6, lr}
 80088f6:	460e      	mov	r6, r1
 80088f8:	4615      	mov	r5, r2
	int DataIdx;

	for (DataIdx = 0; DataIdx < len; DataIdx++)
 80088fa:	460c      	mov	r4, r1
 80088fc:	1ba3      	subs	r3, r4, r6
 80088fe:	429d      	cmp	r5, r3
 8008900:	dc01      	bgt.n	8008906 <_read+0x12>
	{
		*ptr++ = __io_getchar();
	}

return len;
}
 8008902:	4628      	mov	r0, r5
 8008904:	bd70      	pop	{r4, r5, r6, pc}
		*ptr++ = __io_getchar();
 8008906:	f3af 8000 	nop.w
 800890a:	f804 0b01 	strb.w	r0, [r4], #1
 800890e:	e7f5      	b.n	80088fc <_read+0x8>

08008910 <_sbrk>:
	}
	return len;
}

caddr_t _sbrk(int incr)
{
 8008910:	b508      	push	{r3, lr}
	extern char end asm("end");
	static char *heap_end;
	char *prev_heap_end;

	if (heap_end == 0)
 8008912:	4b0a      	ldr	r3, [pc, #40]	; (800893c <_sbrk+0x2c>)
{
 8008914:	4602      	mov	r2, r0
	if (heap_end == 0)
 8008916:	6819      	ldr	r1, [r3, #0]
 8008918:	b909      	cbnz	r1, 800891e <_sbrk+0xe>
		heap_end = &end;
 800891a:	4909      	ldr	r1, [pc, #36]	; (8008940 <_sbrk+0x30>)
 800891c:	6019      	str	r1, [r3, #0]

	prev_heap_end = heap_end;
	if (heap_end + incr > stack_ptr)
 800891e:	4669      	mov	r1, sp
	prev_heap_end = heap_end;
 8008920:	6818      	ldr	r0, [r3, #0]
	if (heap_end + incr > stack_ptr)
 8008922:	4402      	add	r2, r0
 8008924:	428a      	cmp	r2, r1
 8008926:	d906      	bls.n	8008936 <_sbrk+0x26>
	{
//		write(1, "Heap and stack collision\n", 25);
//		abort();
		errno = ENOMEM;
 8008928:	f000 fe5c 	bl	80095e4 <__errno>
 800892c:	230c      	movs	r3, #12
 800892e:	6003      	str	r3, [r0, #0]
		return (caddr_t) -1;
 8008930:	f04f 30ff 	mov.w	r0, #4294967295
 8008934:	bd08      	pop	{r3, pc}
	}

	heap_end += incr;
 8008936:	601a      	str	r2, [r3, #0]

	return (caddr_t) prev_heap_end;
}
 8008938:	bd08      	pop	{r3, pc}
 800893a:	bf00      	nop
 800893c:	20000460 	.word	0x20000460
 8008940:	200017e4 	.word	0x200017e4

08008944 <_close>:

int _close(int file)
{
	return -1;
}
 8008944:	f04f 30ff 	mov.w	r0, #4294967295
 8008948:	4770      	bx	lr

0800894a <_fstat>:


int _fstat(int file, struct stat *st)
{
	st->st_mode = S_IFCHR;
 800894a:	f44f 5300 	mov.w	r3, #8192	; 0x2000
	return 0;
}
 800894e:	2000      	movs	r0, #0
	st->st_mode = S_IFCHR;
 8008950:	604b      	str	r3, [r1, #4]
}
 8008952:	4770      	bx	lr

08008954 <_isatty>:

int _isatty(int file)
{
	return 1;
}
 8008954:	2001      	movs	r0, #1
 8008956:	4770      	bx	lr

08008958 <_lseek>:

int _lseek(int file, int ptr, int dir)
{
	return 0;
}
 8008958:	2000      	movs	r0, #0
 800895a:	4770      	bx	lr

0800895c <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 800895c:	4b0e      	ldr	r3, [pc, #56]	; (8008998 <SystemInit+0x3c>)
 800895e:	681a      	ldr	r2, [r3, #0]
 8008960:	f042 0201 	orr.w	r2, r2, #1
 8008964:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8008966:	6859      	ldr	r1, [r3, #4]
 8008968:	4a0c      	ldr	r2, [pc, #48]	; (800899c <SystemInit+0x40>)
 800896a:	400a      	ands	r2, r1
 800896c:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 800896e:	681a      	ldr	r2, [r3, #0]
 8008970:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8008974:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8008978:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 800897a:	681a      	ldr	r2, [r3, #0]
 800897c:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8008980:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 8008982:	685a      	ldr	r2, [r3, #4]
 8008984:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8008988:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 800898a:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 800898e:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 8008990:	4a03      	ldr	r2, [pc, #12]	; (80089a0 <SystemInit+0x44>)
 8008992:	4b04      	ldr	r3, [pc, #16]	; (80089a4 <SystemInit+0x48>)
 8008994:	609a      	str	r2, [r3, #8]
 8008996:	4770      	bx	lr
 8008998:	40021000 	.word	0x40021000
 800899c:	f8ff0000 	.word	0xf8ff0000
 80089a0:	08004000 	.word	0x08004000
 80089a4:	e000ed00 	.word	0xe000ed00

080089a8 <InitUartQueue>:
UARTQUEUE WifiQueue;
uart_hal_tx_type uart_hal_tx;

void InitUartQueue(pUARTQUEUE pQueue)
{
  setbuf(stdout, NULL);
 80089a8:	4b0b      	ldr	r3, [pc, #44]	; (80089d8 <InitUartQueue+0x30>)
{
 80089aa:	b510      	push	{r4, lr}
  setbuf(stdout, NULL);
 80089ac:	681b      	ldr	r3, [r3, #0]
{
 80089ae:	4604      	mov	r4, r0
  setbuf(stdout, NULL);
 80089b0:	2100      	movs	r1, #0
 80089b2:	6898      	ldr	r0, [r3, #8]
 80089b4:	f001 fb30 	bl	800a018 <setbuf>
  pQueue->data = pQueue->head = pQueue->tail = 0;
 80089b8:	2300      	movs	r3, #0
  uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
 80089ba:	4a08      	ldr	r2, [pc, #32]	; (80089dc <InitUartQueue+0x34>)
  pQueue->data = pQueue->head = pQueue->tail = 0;
 80089bc:	6063      	str	r3, [r4, #4]
 80089be:	6023      	str	r3, [r4, #0]
 80089c0:	60a3      	str	r3, [r4, #8]
  if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
 80089c2:	4907      	ldr	r1, [pc, #28]	; (80089e0 <InitUartQueue+0x38>)
  uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
 80089c4:	f8a2 3400 	strh.w	r3, [r2, #1024]	; 0x400
  if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
 80089c8:	4806      	ldr	r0, [pc, #24]	; (80089e4 <InitUartQueue+0x3c>)
  uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
 80089ca:	f8a2 3402 	strh.w	r3, [r2, #1026]	; 0x402
  {
    //_Error_Handler(__FILE__, __LINE__);
  }
  //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
  //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
}
 80089ce:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
  if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
 80089d2:	2201      	movs	r2, #1
 80089d4:	f7fe bae4 	b.w	8006fa0 <HAL_UART_Receive_DMA>
 80089d8:	2000024c 	.word	0x2000024c
 80089dc:	20000fd0 	.word	0x20000fd0
 80089e0:	20000bd0 	.word	0x20000bd0
 80089e4:	20000700 	.word	0x20000700

080089e8 <GetDataFromUartQueue>:
    pUARTQUEUE pQueue = &TerminalQueue;
//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
//    {
//       _Error_Handler(__FILE__, __LINE__);
//    }
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 80089e8:	4a14      	ldr	r2, [pc, #80]	; (8008a3c <GetDataFromUartQueue+0x54>)
{
 80089ea:	b538      	push	{r3, r4, r5, lr}
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 80089ec:	6810      	ldr	r0, [r2, #0]
 80089ee:	1c43      	adds	r3, r0, #1
 80089f0:	6013      	str	r3, [r2, #0]
 80089f2:	4b13      	ldr	r3, [pc, #76]	; (8008a40 <GetDataFromUartQueue+0x58>)
 80089f4:	6859      	ldr	r1, [r3, #4]
 80089f6:	f103 040c 	add.w	r4, r3, #12
 80089fa:	5d0d      	ldrb	r5, [r1, r4]
 80089fc:	4c11      	ldr	r4, [pc, #68]	; (8008a44 <GetDataFromUartQueue+0x5c>)
#ifdef DEBUG_PRINT
    printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ;
#endif /* DEBUG_PRINT */

    pQueue->tail++;
 80089fe:	3101      	adds	r1, #1
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 8008a00:	f5b1 6f80 	cmp.w	r1, #1024	; 0x400
    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
 8008a04:	5425      	strb	r5, [r4, r0]
 8008a06:	4614      	mov	r4, r2
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 8008a08:	bfa8      	it	ge
 8008a0a:	2200      	movge	r2, #0
    pQueue->data--;
 8008a0c:	689d      	ldr	r5, [r3, #8]
    pQueue->tail++;
 8008a0e:	bfb8      	it	lt
 8008a10:	6059      	strlt	r1, [r3, #4]
    pQueue->data--;
 8008a12:	f105 35ff 	add.w	r5, r5, #4294967295
    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
 8008a16:	bfa8      	it	ge
 8008a18:	605a      	strge	r2, [r3, #4]
    pQueue->data--;
 8008a1a:	609d      	str	r5, [r3, #8]
    
    if(pQueue->data == 0){
 8008a1c:	b96d      	cbnz	r5, 8008a3a <GetDataFromUartQueue+0x52>
//        printf("data cnt zero !!!  \r\n");
        RF_Ctrl_Main(&uart_buf[Header]);
 8008a1e:	4809      	ldr	r0, [pc, #36]	; (8008a44 <GetDataFromUartQueue+0x5c>)
 8008a20:	f000 fd6c 	bl	80094fc <RF_Ctrl_Main>
#if 0 // PYJ.2019.07.15_BEGIN -- 
            for(int i = 0; i < cnt; i++){
                printf("%02x ",uart_buf[i]);
            }
#endif // PYJ.2019.07.15_END -- 
        memset(uart_buf,0x00,cnt);
 8008a24:	6822      	ldr	r2, [r4, #0]
 8008a26:	4629      	mov	r1, r5
 8008a28:	4806      	ldr	r0, [pc, #24]	; (8008a44 <GetDataFromUartQueue+0x5c>)
 8008a2a:	f000 fe10 	bl	800964e <memset>
        
//        for(int i  = 0; i < cnt; i++)
//            uart_buf[i] = 0;
        cnt = 0;
 8008a2e:	6025      	str	r5, [r4, #0]
        
        HAL_Delay(1);
 8008a30:	2001      	movs	r0, #1
    }

}
 8008a32:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
        HAL_Delay(1);
 8008a36:	f7fc bd59 	b.w	80054ec <HAL_Delay>
 8008a3a:	bd38      	pop	{r3, r4, r5, pc}
 8008a3c:	20000464 	.word	0x20000464
 8008a40:	20000bc4 	.word	0x20000bc4
 8008a44:	200007c4 	.word	0x200007c4

08008a48 <HAL_UART_RxCpltCallback>:
    AdcTimerCnt = UartRxTimerCnt = 0;
 8008a48:	2300      	movs	r3, #0
 8008a4a:	4a0f      	ldr	r2, [pc, #60]	; (8008a88 <HAL_UART_RxCpltCallback+0x40>)
{
 8008a4c:	b510      	push	{r4, lr}
    AdcTimerCnt = UartRxTimerCnt = 0;
 8008a4e:	6013      	str	r3, [r2, #0]
    pQueue->head++;
 8008a50:	4c0e      	ldr	r4, [pc, #56]	; (8008a8c <HAL_UART_RxCpltCallback+0x44>)
    AdcTimerCnt = UartRxTimerCnt = 0;
 8008a52:	4a0f      	ldr	r2, [pc, #60]	; (8008a90 <HAL_UART_RxCpltCallback+0x48>)
 8008a54:	6013      	str	r3, [r2, #0]
    pQueue->head++;
 8008a56:	6822      	ldr	r2, [r4, #0]
 8008a58:	3201      	adds	r2, #1
 8008a5a:	f5b2 6f80 	cmp.w	r2, #1024	; 0x400
 8008a5e:	bfb8      	it	lt
 8008a60:	4613      	movlt	r3, r2
 8008a62:	6023      	str	r3, [r4, #0]
    pQueue->data++;
 8008a64:	68a3      	ldr	r3, [r4, #8]
 8008a66:	3301      	adds	r3, #1
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 8008a68:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
    pQueue->data++;
 8008a6c:	60a3      	str	r3, [r4, #8]
    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
 8008a6e:	db01      	blt.n	8008a74 <HAL_UART_RxCpltCallback+0x2c>
        GetDataFromUartQueue(huart);
 8008a70:	f7ff ffba 	bl	80089e8 <GetDataFromUartQueue>
    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
 8008a74:	6823      	ldr	r3, [r4, #0]
 8008a76:	4907      	ldr	r1, [pc, #28]	; (8008a94 <HAL_UART_RxCpltCallback+0x4c>)
 8008a78:	2201      	movs	r2, #1
}
 8008a7a:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
 8008a7e:	4419      	add	r1, r3
 8008a80:	4805      	ldr	r0, [pc, #20]	; (8008a98 <HAL_UART_RxCpltCallback+0x50>)
 8008a82:	f7fe ba8d 	b.w	8006fa0 <HAL_UART_Receive_DMA>
 8008a86:	bf00      	nop
 8008a88:	2000045c 	.word	0x2000045c
 8008a8c:	20000bc4 	.word	0x20000bc4
 8008a90:	20000450 	.word	0x20000450
 8008a94:	20000bd0 	.word	0x20000bd0
 8008a98:	20000700 	.word	0x20000700

08008a9c <RF_Data_Check>:
    PATH_EN_2_1G_UL_GPIO_Port,
    PATH_EN_2_1G_UL_Pin,    
};


bool RF_Data_Check(uint8_t* data_buf){
 8008a9c:	b508      	push	{r3, lr}
    bool ret = false;
    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
 8008a9e:	78c3      	ldrb	r3, [r0, #3]
 8008aa0:	7881      	ldrb	r1, [r0, #2]
 8008aa2:	5cc2      	ldrb	r2, [r0, r3]
 8008aa4:	3001      	adds	r0, #1
 8008aa6:	f7fe fda4 	bl	80075f2 <STH30_CheckCrc>
//        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
    }
//    printf("CRC Result : \"%d\"   \r\n",ret);
    return ret;

}
 8008aaa:	3000      	adds	r0, #0
 8008aac:	bf18      	it	ne
 8008aae:	2001      	movne	r0, #1
 8008ab0:	bd08      	pop	{r3, pc}
	...

08008ab4 <RF_Status_Get>:
       PLL_EN_3_5G_L_GPIO_Port,    
       PLL_EN_3_5G_L_Pin,
 };
void RF_Status_Get(void){
//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
 8008ab4:	23be      	movs	r3, #190	; 0xbe
void RF_Status_Get(void){
 8008ab6:	b510      	push	{r4, lr}
    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
 8008ab8:	4c0b      	ldr	r4, [pc, #44]	; (8008ae8 <RF_Status_Get+0x34>)
    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
 8008aba:	2160      	movs	r1, #96	; 0x60
    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
 8008abc:	7023      	strb	r3, [r4, #0]
    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
 8008abe:	2302      	movs	r3, #2
 8008ac0:	7063      	strb	r3, [r4, #1]
    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
 8008ac2:	2361      	movs	r3, #97	; 0x61
    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
 8008ac4:	1c60      	adds	r0, r4, #1
    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
 8008ac6:	70a1      	strb	r1, [r4, #2]
    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
 8008ac8:	70e3      	strb	r3, [r4, #3]
    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
 8008aca:	f7fe fd77 	bl	80075bc <STH30_CreateCrc>
    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
 8008ace:	23eb      	movs	r3, #235	; 0xeb
    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
 8008ad0:	f884 0061 	strb.w	r0, [r4, #97]	; 0x61
    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
 8008ad4:	f884 3062 	strb.w	r3, [r4, #98]	; 0x62
    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
 8008ad8:	4621      	mov	r1, r4
//    printf("\r\nYJ : %x",ADCvalue[0]);
//    printf("\r\n");

}
 8008ada:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
 8008ade:	2263      	movs	r2, #99	; 0x63
 8008ae0:	4802      	ldr	r0, [pc, #8]	; (8008aec <RF_Status_Get+0x38>)
 8008ae2:	f7fe ba23 	b.w	8006f2c <HAL_UART_Transmit_DMA>
 8008ae6:	bf00      	nop
 8008ae8:	200005e3 	.word	0x200005e3
 8008aec:	20000700 	.word	0x20000700

08008af0 <RF_Status_Ack>:
static uint8_t Ack_Buf[6];
void RF_Status_Ack(void){
//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
 8008af0:	23be      	movs	r3, #190	; 0xbe
void RF_Status_Ack(void){
 8008af2:	b510      	push	{r4, lr}
    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
 8008af4:	4c0a      	ldr	r4, [pc, #40]	; (8008b20 <RF_Status_Ack+0x30>)
    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
    Ack_Buf[INDEX_BLUE_LENGTH]       = 3;
 8008af6:	2103      	movs	r1, #3
    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
 8008af8:	7023      	strb	r3, [r4, #0]
    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
 8008afa:	2304      	movs	r3, #4
    Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1;
    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
 8008afc:	1c60      	adds	r0, r4, #1
    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
 8008afe:	7063      	strb	r3, [r4, #1]
    Ack_Buf[INDEX_BLUE_LENGTH]       = 3;
 8008b00:	70a1      	strb	r1, [r4, #2]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1;
 8008b02:	70e3      	strb	r3, [r4, #3]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
 8008b04:	f7fe fd5a 	bl	80075bc <STH30_CreateCrc>
    Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER;
 8008b08:	23eb      	movs	r3, #235	; 0xeb
    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
 8008b0a:	78a2      	ldrb	r2, [r4, #2]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
 8008b0c:	7120      	strb	r0, [r4, #4]
    Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER;
 8008b0e:	7163      	strb	r3, [r4, #5]
    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
 8008b10:	4621      	mov	r1, r4
//    printf("\r\nYJ : %x",ADCvalue[0]);
//    printf("\r\n");

}
 8008b12:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
 8008b16:	3203      	adds	r2, #3
 8008b18:	4802      	ldr	r0, [pc, #8]	; (8008b24 <RF_Status_Ack+0x34>)
 8008b1a:	f7fe ba07 	b.w	8006f2c <HAL_UART_Transmit_DMA>
 8008b1e:	bf00      	nop
 8008b20:	20000468 	.word	0x20000468
 8008b24:	20000700 	.word	0x20000700

08008b28 <RF_Operate>:

void RF_Operate(uint8_t* data_buf){
 8008b28:	b5f0      	push	{r4, r5, r6, r7, lr}
    uint32_t temp_val = 0;
    uint8_t  ADC_Modify = 0;
    ADF4153_R_N_Reg_st temp_reg;
//    printf("Prev_data[INDEX_ATT_1_8G_DL1]  : %x  data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]);
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 8008b2a:	4db4      	ldr	r5, [pc, #720]	; (8008dfc <RF_Operate+0x2d4>)
 8008b2c:	7902      	ldrb	r2, [r0, #4]
 8008b2e:	792b      	ldrb	r3, [r5, #4]
void RF_Operate(uint8_t* data_buf){
 8008b30:	b0a9      	sub	sp, #164	; 0xa4
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 8008b32:	4293      	cmp	r3, r2
void RF_Operate(uint8_t* data_buf){
 8008b34:	4604      	mov	r4, r0
    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
 8008b36:	d00c      	beq.n	8008b52 <RF_Operate+0x2a>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
 8008b38:	4bb1      	ldr	r3, [pc, #708]	; (8008e00 <RF_Operate+0x2d8>)
 8008b3a:	9202      	str	r2, [sp, #8]
 8008b3c:	f103 0210 	add.w	r2, r3, #16
 8008b40:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008b44:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008b48:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008b4a:	f7fe fc3f 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
 8008b4e:	7923      	ldrb	r3, [r4, #4]
 8008b50:	712b      	strb	r3, [r5, #4]
    }
    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
 8008b52:	7962      	ldrb	r2, [r4, #5]
 8008b54:	796b      	ldrb	r3, [r5, #5]
 8008b56:	4293      	cmp	r3, r2
 8008b58:	d00c      	beq.n	8008b74 <RF_Operate+0x4c>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
 8008b5a:	4baa      	ldr	r3, [pc, #680]	; (8008e04 <RF_Operate+0x2dc>)
 8008b5c:	9202      	str	r2, [sp, #8]
 8008b5e:	f103 0210 	add.w	r2, r3, #16
 8008b62:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008b66:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008b6a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008b6c:	f7fe fc2e 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
 8008b70:	7963      	ldrb	r3, [r4, #5]
 8008b72:	716b      	strb	r3, [r5, #5]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
 8008b74:	79a2      	ldrb	r2, [r4, #6]
 8008b76:	79ab      	ldrb	r3, [r5, #6]
 8008b78:	4293      	cmp	r3, r2
 8008b7a:	d00c      	beq.n	8008b96 <RF_Operate+0x6e>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
 8008b7c:	4ba2      	ldr	r3, [pc, #648]	; (8008e08 <RF_Operate+0x2e0>)
 8008b7e:	9202      	str	r2, [sp, #8]
 8008b80:	f103 0210 	add.w	r2, r3, #16
 8008b84:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008b88:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008b8c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008b8e:	f7fe fc1d 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
 8008b92:	79a3      	ldrb	r3, [r4, #6]
 8008b94:	71ab      	strb	r3, [r5, #6]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
 8008b96:	79e2      	ldrb	r2, [r4, #7]
 8008b98:	79eb      	ldrb	r3, [r5, #7]
 8008b9a:	4293      	cmp	r3, r2
 8008b9c:	d00c      	beq.n	8008bb8 <RF_Operate+0x90>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
 8008b9e:	4b9b      	ldr	r3, [pc, #620]	; (8008e0c <RF_Operate+0x2e4>)
 8008ba0:	9202      	str	r2, [sp, #8]
 8008ba2:	f103 0210 	add.w	r2, r3, #16
 8008ba6:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008baa:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008bae:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008bb0:	f7fe fc0c 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
 8008bb4:	79e3      	ldrb	r3, [r4, #7]
 8008bb6:	71eb      	strb	r3, [r5, #7]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
 8008bb8:	7a22      	ldrb	r2, [r4, #8]
 8008bba:	7a2b      	ldrb	r3, [r5, #8]
 8008bbc:	4293      	cmp	r3, r2
 8008bbe:	d00c      	beq.n	8008bda <RF_Operate+0xb2>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
 8008bc0:	4b93      	ldr	r3, [pc, #588]	; (8008e10 <RF_Operate+0x2e8>)
 8008bc2:	9202      	str	r2, [sp, #8]
 8008bc4:	f103 0210 	add.w	r2, r3, #16
 8008bc8:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008bcc:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008bd0:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008bd2:	f7fe fbfb 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
 8008bd6:	7a23      	ldrb	r3, [r4, #8]
 8008bd8:	722b      	strb	r3, [r5, #8]
    }
    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
 8008bda:	7a62      	ldrb	r2, [r4, #9]
 8008bdc:	7a6b      	ldrb	r3, [r5, #9]
 8008bde:	4293      	cmp	r3, r2
 8008be0:	d00c      	beq.n	8008bfc <RF_Operate+0xd4>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
 8008be2:	4b8c      	ldr	r3, [pc, #560]	; (8008e14 <RF_Operate+0x2ec>)
 8008be4:	9202      	str	r2, [sp, #8]
 8008be6:	f103 0210 	add.w	r2, r3, #16
 8008bea:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008bee:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008bf2:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008bf4:	f7fe fbea 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
 8008bf8:	7a63      	ldrb	r3, [r4, #9]
 8008bfa:	726b      	strb	r3, [r5, #9]
    }
    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
 8008bfc:	7aa2      	ldrb	r2, [r4, #10]
 8008bfe:	7aab      	ldrb	r3, [r5, #10]
 8008c00:	4293      	cmp	r3, r2
 8008c02:	d00c      	beq.n	8008c1e <RF_Operate+0xf6>
        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
 8008c04:	4b84      	ldr	r3, [pc, #528]	; (8008e18 <RF_Operate+0x2f0>)
 8008c06:	9202      	str	r2, [sp, #8]
 8008c08:	f103 0210 	add.w	r2, r3, #16
 8008c0c:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c10:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c14:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c16:	f7fe fbd9 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
 8008c1a:	7aa3      	ldrb	r3, [r4, #10]
 8008c1c:	72ab      	strb	r3, [r5, #10]

    }
    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
 8008c1e:	7ae2      	ldrb	r2, [r4, #11]
 8008c20:	7aeb      	ldrb	r3, [r5, #11]
 8008c22:	4293      	cmp	r3, r2
 8008c24:	d00c      	beq.n	8008c40 <RF_Operate+0x118>
        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
 8008c26:	4b7d      	ldr	r3, [pc, #500]	; (8008e1c <RF_Operate+0x2f4>)
 8008c28:	9202      	str	r2, [sp, #8]
 8008c2a:	f103 0210 	add.w	r2, r3, #16
 8008c2e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c32:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c36:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c38:	f7fe fbc8 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
 8008c3c:	7ae3      	ldrb	r3, [r4, #11]
 8008c3e:	72eb      	strb	r3, [r5, #11]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
 8008c40:	7b22      	ldrb	r2, [r4, #12]
 8008c42:	7b2b      	ldrb	r3, [r5, #12]
 8008c44:	4293      	cmp	r3, r2
 8008c46:	d00c      	beq.n	8008c62 <RF_Operate+0x13a>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
 8008c48:	4b75      	ldr	r3, [pc, #468]	; (8008e20 <RF_Operate+0x2f8>)
 8008c4a:	9202      	str	r2, [sp, #8]
 8008c4c:	f103 0210 	add.w	r2, r3, #16
 8008c50:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c54:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c58:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c5a:	f7fe fbb7 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
 8008c5e:	7b23      	ldrb	r3, [r4, #12]
 8008c60:	732b      	strb	r3, [r5, #12]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
 8008c62:	7b62      	ldrb	r2, [r4, #13]
 8008c64:	7b6b      	ldrb	r3, [r5, #13]
 8008c66:	4293      	cmp	r3, r2
 8008c68:	d00c      	beq.n	8008c84 <RF_Operate+0x15c>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
 8008c6a:	4b6e      	ldr	r3, [pc, #440]	; (8008e24 <RF_Operate+0x2fc>)
 8008c6c:	9202      	str	r2, [sp, #8]
 8008c6e:	f103 0210 	add.w	r2, r3, #16
 8008c72:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c76:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c7a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c7c:	f7fe fba6 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
 8008c80:	7b63      	ldrb	r3, [r4, #13]
 8008c82:	736b      	strb	r3, [r5, #13]

    }
    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
 8008c84:	7ba2      	ldrb	r2, [r4, #14]
 8008c86:	7bab      	ldrb	r3, [r5, #14]
 8008c88:	4293      	cmp	r3, r2
 8008c8a:	d00c      	beq.n	8008ca6 <RF_Operate+0x17e>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
 8008c8c:	4b66      	ldr	r3, [pc, #408]	; (8008e28 <RF_Operate+0x300>)
 8008c8e:	9202      	str	r2, [sp, #8]
 8008c90:	f103 0210 	add.w	r2, r3, #16
 8008c94:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008c98:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008c9c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008c9e:	f7fe fb95 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
 8008ca2:	7ba3      	ldrb	r3, [r4, #14]
 8008ca4:	73ab      	strb	r3, [r5, #14]
    }
    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
 8008ca6:	7be2      	ldrb	r2, [r4, #15]
 8008ca8:	7beb      	ldrb	r3, [r5, #15]
 8008caa:	4293      	cmp	r3, r2
 8008cac:	d00c      	beq.n	8008cc8 <RF_Operate+0x1a0>
        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
 8008cae:	4b5f      	ldr	r3, [pc, #380]	; (8008e2c <RF_Operate+0x304>)
 8008cb0:	9202      	str	r2, [sp, #8]
 8008cb2:	f103 0210 	add.w	r2, r3, #16
 8008cb6:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008cba:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008cbe:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008cc0:	f7fe fb84 	bl	80073cc <BDA4601_atten_ctrl>
        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
 8008cc4:	7be3      	ldrb	r3, [r4, #15]
 8008cc6:	73eb      	strb	r3, [r5, #15]
    }
    if(   (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1])
 8008cc8:	7c23      	ldrb	r3, [r4, #16]
 8008cca:	7c2a      	ldrb	r2, [r5, #16]
 8008ccc:	429a      	cmp	r2, r3
 8008cce:	d113      	bne.n	8008cf8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1])
 8008cd0:	7c69      	ldrb	r1, [r5, #17]
 8008cd2:	7c62      	ldrb	r2, [r4, #17]
 8008cd4:	4291      	cmp	r1, r2
 8008cd6:	d10f      	bne.n	8008cf8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
 8008cd8:	7ca9      	ldrb	r1, [r5, #18]
 8008cda:	7ca2      	ldrb	r2, [r4, #18]
 8008cdc:	4291      	cmp	r1, r2
 8008cde:	d10b      	bne.n	8008cf8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2])
 8008ce0:	7ce9      	ldrb	r1, [r5, #19]
 8008ce2:	7ce2      	ldrb	r2, [r4, #19]
 8008ce4:	4291      	cmp	r1, r2
 8008ce6:	d107      	bne.n	8008cf8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2])
 8008ce8:	7d29      	ldrb	r1, [r5, #20]
 8008cea:	7d22      	ldrb	r2, [r4, #20]
 8008cec:	4291      	cmp	r1, r2
 8008cee:	d103      	bne.n	8008cf8 <RF_Operate+0x1d0>
        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
 8008cf0:	7d69      	ldrb	r1, [r5, #21]
 8008cf2:	7d62      	ldrb	r2, [r4, #21]
 8008cf4:	4291      	cmp	r1, r2
 8008cf6:	d020      	beq.n	8008d3a <RF_Operate+0x212>
    ){
        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1]  = data_buf[INDEX_ATT_3_5G_LOW1];
 8008cf8:	4e4d      	ldr	r6, [pc, #308]	; (8008e30 <RF_Operate+0x308>)
 8008cfa:	742b      	strb	r3, [r5, #16]
 8008cfc:	7633      	strb	r3, [r6, #24]
        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
 8008cfe:	7c63      	ldrb	r3, [r4, #17]
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008d00:	2298      	movs	r2, #152	; 0x98
        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
 8008d02:	746b      	strb	r3, [r5, #17]
 8008d04:	f886 3034 	strb.w	r3, [r6, #52]	; 0x34
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
 8008d08:	7ca3      	ldrb	r3, [r4, #18]
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008d0a:	f106 0110 	add.w	r1, r6, #16
        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
 8008d0e:	74ab      	strb	r3, [r5, #18]
 8008d10:	f886 3050 	strb.w	r3, [r6, #80]	; 0x50
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
 8008d14:	7ce3      	ldrb	r3, [r4, #19]
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008d16:	4668      	mov	r0, sp
        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
 8008d18:	74eb      	strb	r3, [r5, #19]
 8008d1a:	f886 306c 	strb.w	r3, [r6, #108]	; 0x6c
        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
 8008d1e:	7d23      	ldrb	r3, [r4, #20]
 8008d20:	752b      	strb	r3, [r5, #20]
 8008d22:	f886 3088 	strb.w	r3, [r6, #136]	; 0x88
        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
 8008d26:	7d63      	ldrb	r3, [r4, #21]
 8008d28:	756b      	strb	r3, [r5, #21]
 8008d2a:	f886 30a4 	strb.w	r3, [r6, #164]	; 0xa4
        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8008d2e:	f000 fc83 	bl	8009638 <memcpy>
 8008d32:	e896 000f 	ldmia.w	r6, {r0, r1, r2, r3}
 8008d36:	f7fe fc8b 	bl	8007650 <PE43711_ALL_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
 8008d3a:	7da3      	ldrb	r3, [r4, #22]
 8008d3c:	7daa      	ldrb	r2, [r5, #22]
 8008d3e:	429a      	cmp	r2, r3
 8008d40:	d103      	bne.n	8008d4a <RF_Operate+0x222>
        || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
 8008d42:	7de9      	ldrb	r1, [r5, #23]
 8008d44:	7de2      	ldrb	r2, [r4, #23]
 8008d46:	4291      	cmp	r1, r2
 8008d48:	d030      	beq.n	8008dac <RF_Operate+0x284>
    ){
        Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H];
 8008d4a:	75ab      	strb	r3, [r5, #22]
        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
 8008d4c:	7de3      	ldrb	r3, [r4, #23]
//        printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]);
//        printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]);
        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
//        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092);
 8008d4e:	4839      	ldr	r0, [pc, #228]	; (8008e34 <RF_Operate+0x30c>)
        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
 8008d50:	75eb      	strb	r3, [r5, #23]
        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092);
 8008d52:	f7ff fbd1 	bl	80084f8 <halSynSetFreq>
 8008d56:	4a38      	ldr	r2, [pc, #224]	; (8008e38 <RF_Operate+0x310>)
 8008d58:	4b38      	ldr	r3, [pc, #224]	; (8008e3c <RF_Operate+0x314>)
 8008d5a:	9204      	str	r2, [sp, #16]
 8008d5c:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008d60:	9003      	str	r0, [sp, #12]
 8008d62:	9202      	str	r2, [sp, #8]
 8008d64:	f103 0210 	add.w	r2, r3, #16
 8008d68:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008d6c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008d70:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008d72:	f7ff fbd5 	bl	8008520 <ADF4113_Module_Ctrl>
        HAL_Delay(1);
 8008d76:	2001      	movs	r0, #1
 8008d78:	f7fc fbb8 	bl	80054ec <HAL_Delay>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
 8008d7c:	7922      	ldrb	r2, [r4, #4]
 8008d7e:	4b20      	ldr	r3, [pc, #128]	; (8008e00 <RF_Operate+0x2d8>)
 8008d80:	9202      	str	r2, [sp, #8]
 8008d82:	f103 0210 	add.w	r2, r3, #16
 8008d86:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008d8a:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008d8e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008d90:	f7fe fb1c 	bl	80073cc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
 8008d94:	4b1b      	ldr	r3, [pc, #108]	; (8008e04 <RF_Operate+0x2dc>)
 8008d96:	7962      	ldrb	r2, [r4, #5]
 8008d98:	9202      	str	r2, [sp, #8]
 8008d9a:	f103 0210 	add.w	r2, r3, #16
 8008d9e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008da2:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008da6:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008da8:	f7fe fb10 	bl	80073cc <BDA4601_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
 8008dac:	7e2b      	ldrb	r3, [r5, #24]
 8008dae:	7e22      	ldrb	r2, [r4, #24]
 8008db0:	4293      	cmp	r3, r2
 8008db2:	7e63      	ldrb	r3, [r4, #25]
 8008db4:	d102      	bne.n	8008dbc <RF_Operate+0x294>
        || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
 8008db6:	7e69      	ldrb	r1, [r5, #25]
 8008db8:	4299      	cmp	r1, r3
 8008dba:	d06e      	beq.n	8008e9a <RF_Operate+0x372>
//        printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]);
        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092);
 8008dbc:	4820      	ldr	r0, [pc, #128]	; (8008e40 <RF_Operate+0x318>)
        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
 8008dbe:	762a      	strb	r2, [r5, #24]
        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
 8008dc0:	766b      	strb	r3, [r5, #25]
        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092);
 8008dc2:	f7ff fb99 	bl	80084f8 <halSynSetFreq>
 8008dc6:	4a1c      	ldr	r2, [pc, #112]	; (8008e38 <RF_Operate+0x310>)
 8008dc8:	4b1e      	ldr	r3, [pc, #120]	; (8008e44 <RF_Operate+0x31c>)
 8008dca:	9204      	str	r2, [sp, #16]
 8008dcc:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008dd0:	9003      	str	r0, [sp, #12]
 8008dd2:	9202      	str	r2, [sp, #8]
 8008dd4:	f103 0210 	add.w	r2, r3, #16
 8008dd8:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008ddc:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008de0:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008de2:	f7ff fb9d 	bl	8008520 <ADF4113_Module_Ctrl>

        HAL_Delay(1);
 8008de6:	2001      	movs	r0, #1
 8008de8:	f7fc fb80 	bl	80054ec <HAL_Delay>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
 8008dec:	79a2      	ldrb	r2, [r4, #6]
 8008dee:	4b06      	ldr	r3, [pc, #24]	; (8008e08 <RF_Operate+0x2e0>)
 8008df0:	9202      	str	r2, [sp, #8]
 8008df2:	f103 0210 	add.w	r2, r3, #16
 8008df6:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008dfa:	e025      	b.n	8008e48 <RF_Operate+0x320>
 8008dfc:	200005e3 	.word	0x200005e3
 8008e00:	20000008 	.word	0x20000008
 8008e04:	20000020 	.word	0x20000020
 8008e08:	20000038 	.word	0x20000038
 8008e0c:	20000050 	.word	0x20000050
 8008e10:	20000068 	.word	0x20000068
 8008e14:	20000080 	.word	0x20000080
 8008e18:	20000098 	.word	0x20000098
 8008e1c:	200000b0 	.word	0x200000b0
 8008e20:	200000c8 	.word	0x200000c8
 8008e24:	200000e0 	.word	0x200000e0
 8008e28:	200000f8 	.word	0x200000f8
 8008e2c:	20000110 	.word	0x20000110
 8008e30:	200004d8 	.word	0x200004d8
 8008e34:	5faa5b40 	.word	0x5faa5b40
 8008e38:	009f8092 	.word	0x009f8092
 8008e3c:	200001b8 	.word	0x200001b8
 8008e40:	56565b20 	.word	0x56565b20
 8008e44:	200001d0 	.word	0x200001d0
 8008e48:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008e4c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008e4e:	f7fe fabd 	bl	80073cc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
 8008e52:	79e2      	ldrb	r2, [r4, #7]
 8008e54:	4bc1      	ldr	r3, [pc, #772]	; (800915c <RF_Operate+0x634>)
 8008e56:	9202      	str	r2, [sp, #8]
 8008e58:	f103 0210 	add.w	r2, r3, #16
 8008e5c:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008e60:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008e64:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008e66:	f7fe fab1 	bl	80073cc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
 8008e6a:	7a22      	ldrb	r2, [r4, #8]
 8008e6c:	4bbc      	ldr	r3, [pc, #752]	; (8009160 <RF_Operate+0x638>)
 8008e6e:	9202      	str	r2, [sp, #8]
 8008e70:	f103 0210 	add.w	r2, r3, #16
 8008e74:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008e78:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008e7c:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008e7e:	f7fe faa5 	bl	80073cc <BDA4601_atten_ctrl>
        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
 8008e82:	4bb8      	ldr	r3, [pc, #736]	; (8009164 <RF_Operate+0x63c>)
 8008e84:	7a62      	ldrb	r2, [r4, #9]
 8008e86:	9202      	str	r2, [sp, #8]
 8008e88:	f103 0210 	add.w	r2, r3, #16
 8008e8c:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008e90:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008e94:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008e96:	f7fe fa99 	bl	80073cc <BDA4601_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
 8008e9a:	7eab      	ldrb	r3, [r5, #26]
 8008e9c:	7ea2      	ldrb	r2, [r4, #26]
 8008e9e:	4293      	cmp	r3, r2
 8008ea0:	7ee3      	ldrb	r3, [r4, #27]
 8008ea2:	d102      	bne.n	8008eaa <RF_Operate+0x382>
        || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
 8008ea4:	7ee9      	ldrb	r1, [r5, #27]
 8008ea6:	4299      	cmp	r1, r3
 8008ea8:	d02f      	beq.n	8008f0a <RF_Operate+0x3e2>
//        printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]);
        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
//         ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
//        ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092);
 8008eaa:	48af      	ldr	r0, [pc, #700]	; (8009168 <RF_Operate+0x640>)
        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
 8008eac:	76aa      	strb	r2, [r5, #26]
        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
 8008eae:	76eb      	strb	r3, [r5, #27]
      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092);
 8008eb0:	f7ff fb22 	bl	80084f8 <halSynSetFreq>
 8008eb4:	4aad      	ldr	r2, [pc, #692]	; (800916c <RF_Operate+0x644>)
 8008eb6:	4bae      	ldr	r3, [pc, #696]	; (8009170 <RF_Operate+0x648>)
 8008eb8:	9204      	str	r2, [sp, #16]
 8008eba:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008ebe:	9003      	str	r0, [sp, #12]
 8008ec0:	9202      	str	r2, [sp, #8]
 8008ec2:	f103 0210 	add.w	r2, r3, #16
 8008ec6:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008eca:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008ece:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008ed0:	f7ff fb26 	bl	8008520 <ADF4113_Module_Ctrl>

      HAL_Delay(1);
 8008ed4:	2001      	movs	r0, #1
 8008ed6:	f7fc fb09 	bl	80054ec <HAL_Delay>
      BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
 8008eda:	7aa2      	ldrb	r2, [r4, #10]
 8008edc:	4ba5      	ldr	r3, [pc, #660]	; (8009174 <RF_Operate+0x64c>)
 8008ede:	9202      	str	r2, [sp, #8]
 8008ee0:	f103 0210 	add.w	r2, r3, #16
 8008ee4:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008ee8:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008eec:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008eee:	f7fe fa6d 	bl	80073cc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
 8008ef2:	4ba1      	ldr	r3, [pc, #644]	; (8009178 <RF_Operate+0x650>)
 8008ef4:	7ae2      	ldrb	r2, [r4, #11]
 8008ef6:	9202      	str	r2, [sp, #8]
 8008ef8:	f103 0210 	add.w	r2, r3, #16
 8008efc:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008f00:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008f04:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008f06:	f7fe fa61 	bl	80073cc <BDA4601_atten_ctrl>
    }
    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
 8008f0a:	7f23      	ldrb	r3, [r4, #28]
 8008f0c:	7f2a      	ldrb	r2, [r5, #28]
 8008f0e:	429a      	cmp	r2, r3
 8008f10:	d103      	bne.n	8008f1a <RF_Operate+0x3f2>
        || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
 8008f12:	7f69      	ldrb	r1, [r5, #29]
 8008f14:	7f62      	ldrb	r2, [r4, #29]
 8008f16:	4291      	cmp	r1, r2
 8008f18:	d048      	beq.n	8008fac <RF_Operate+0x484>
        Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H];
 8008f1a:	772b      	strb	r3, [r5, #28]
        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];    
 8008f1c:	7f63      	ldrb	r3, [r4, #29]
//        printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]);
//        printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]);
        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
//        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092);
 8008f1e:	4897      	ldr	r0, [pc, #604]	; (800917c <RF_Operate+0x654>)
        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];    
 8008f20:	776b      	strb	r3, [r5, #29]
      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092);
 8008f22:	f7ff fae9 	bl	80084f8 <halSynSetFreq>
 8008f26:	4a91      	ldr	r2, [pc, #580]	; (800916c <RF_Operate+0x644>)
 8008f28:	4b95      	ldr	r3, [pc, #596]	; (8009180 <RF_Operate+0x658>)
 8008f2a:	9204      	str	r2, [sp, #16]
 8008f2c:	f44f 6282 	mov.w	r2, #1040	; 0x410
 8008f30:	9003      	str	r0, [sp, #12]
 8008f32:	9202      	str	r2, [sp, #8]
 8008f34:	f103 0210 	add.w	r2, r3, #16
 8008f38:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008f3c:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008f40:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008f42:	f7ff faed 	bl	8008520 <ADF4113_Module_Ctrl>
      HAL_Delay(1);
 8008f46:	2001      	movs	r0, #1
 8008f48:	f7fc fad0 	bl	80054ec <HAL_Delay>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
 8008f4c:	7b22      	ldrb	r2, [r4, #12]
 8008f4e:	4b8d      	ldr	r3, [pc, #564]	; (8009184 <RF_Operate+0x65c>)
 8008f50:	9202      	str	r2, [sp, #8]
 8008f52:	f103 0210 	add.w	r2, r3, #16
 8008f56:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008f5a:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008f5e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008f60:	f7fe fa34 	bl	80073cc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
 8008f64:	7b62      	ldrb	r2, [r4, #13]
 8008f66:	4b88      	ldr	r3, [pc, #544]	; (8009188 <RF_Operate+0x660>)
 8008f68:	9202      	str	r2, [sp, #8]
 8008f6a:	f103 0210 	add.w	r2, r3, #16
 8008f6e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008f72:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008f76:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008f78:	f7fe fa28 	bl	80073cc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));      
 8008f7c:	7ba2      	ldrb	r2, [r4, #14]
 8008f7e:	4b83      	ldr	r3, [pc, #524]	; (800918c <RF_Operate+0x664>)
 8008f80:	9202      	str	r2, [sp, #8]
 8008f82:	f103 0210 	add.w	r2, r3, #16
 8008f86:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008f8a:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008f8e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008f90:	f7fe fa1c 	bl	80073cc <BDA4601_atten_ctrl>
      BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));      
 8008f94:	4b7e      	ldr	r3, [pc, #504]	; (8009190 <RF_Operate+0x668>)
 8008f96:	7be2      	ldrb	r2, [r4, #15]
 8008f98:	9202      	str	r2, [sp, #8]
 8008f9a:	f103 0210 	add.w	r2, r3, #16
 8008f9e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8008fa2:	e88d 0003 	stmia.w	sp, {r0, r1}
 8008fa6:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8008fa8:	f7fe fa10 	bl	80073cc <BDA4601_atten_ctrl>


    }
    if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H])
 8008fac:	7fa3      	ldrb	r3, [r4, #30]
 8008fae:	7faa      	ldrb	r2, [r5, #30]
 8008fb0:	429a      	cmp	r2, r3
 8008fb2:	d109      	bne.n	8008fc8 <RF_Operate+0x4a0>
        ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M])
 8008fb4:	7fe9      	ldrb	r1, [r5, #31]
 8008fb6:	7fe2      	ldrb	r2, [r4, #31]
 8008fb8:	4291      	cmp	r1, r2
 8008fba:	d105      	bne.n	8008fc8 <RF_Operate+0x4a0>
        || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){
 8008fbc:	f895 1020 	ldrb.w	r1, [r5, #32]
 8008fc0:	f894 2020 	ldrb.w	r2, [r4, #32]
 8008fc4:	4291      	cmp	r1, r2
 8008fc6:	d031      	beq.n	800902c <RF_Operate+0x504>
        Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H];
 8008fc8:	77ab      	strb	r3, [r5, #30]
        Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M];        
 8008fca:	7fe3      	ldrb	r3, [r4, #31]
        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
                   (data_buf[INDEX_PLL_3_5G_LOW_L]);
#if 1 // PYJ.2019.08.12_BEGIN -- 
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008fcc:	2100      	movs	r1, #0
        Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M];        
 8008fce:	77eb      	strb	r3, [r5, #31]
        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
 8008fd0:	f894 3020 	ldrb.w	r3, [r4, #32]
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008fd4:	486f      	ldr	r0, [pc, #444]	; (8009194 <RF_Operate+0x66c>)
        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
 8008fd6:	f885 3020 	strb.w	r3, [r5, #32]
                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
 8008fda:	7fe3      	ldrb	r3, [r4, #31]
        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
 8008fdc:	7fa2      	ldrb	r2, [r4, #30]
                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
 8008fde:	021b      	lsls	r3, r3, #8
        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
 8008fe0:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
                   (data_buf[INDEX_PLL_3_5G_LOW_L]);
 8008fe4:	f894 2020 	ldrb.w	r2, [r4, #32]
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008fe8:	e9cd 0100 	strd	r0, r1, [sp]
                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
 8008fec:	4313      	orrs	r3, r2
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8008fee:	f241 3288 	movw	r2, #5000	; 0x1388
 8008ff2:	9203      	str	r2, [sp, #12]
 8008ff4:	2202      	movs	r2, #2
 8008ff6:	9202      	str	r2, [sp, #8]
 8008ff8:	f242 7210 	movw	r2, #10000	; 0x2710
 8008ffc:	a826      	add	r0, sp, #152	; 0x98
 8008ffe:	435a      	muls	r2, r3
 8009000:	2300      	movs	r3, #0
 8009002:	f7fe fc7d 	bl	8007900 <ADF4153_Freq_Calc>
#else
        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
#endif // PYJ.2019.08.12_END -- 
//        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
      ADF4153_Module_Ctrl(Pll_3_5_L,0x385E48,0x163001,0x1442,3);
 8009006:	2203      	movs	r2, #3
 8009008:	9205      	str	r2, [sp, #20]
 800900a:	f241 4242 	movw	r2, #5186	; 0x1442
 800900e:	9204      	str	r2, [sp, #16]
 8009010:	4a61      	ldr	r2, [pc, #388]	; (8009198 <RF_Operate+0x670>)
 8009012:	4b62      	ldr	r3, [pc, #392]	; (800919c <RF_Operate+0x674>)
 8009014:	9203      	str	r2, [sp, #12]
 8009016:	4a62      	ldr	r2, [pc, #392]	; (80091a0 <RF_Operate+0x678>)
 8009018:	9202      	str	r2, [sp, #8]
 800901a:	f103 0210 	add.w	r2, r3, #16
 800901e:	e892 0003 	ldmia.w	r2, {r0, r1}
 8009022:	e88d 0003 	stmia.w	sp, {r0, r1}
 8009026:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 8009028:	f7fe fcf8 	bl	8007a1c <ADF4153_Module_Ctrl>

    }
    if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H])
 800902c:	f894 3021 	ldrb.w	r3, [r4, #33]	; 0x21
 8009030:	f895 2021 	ldrb.w	r2, [r5, #33]	; 0x21
 8009034:	429a      	cmp	r2, r3
 8009036:	d10b      	bne.n	8009050 <RF_Operate+0x528>
        || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M])
 8009038:	f895 1022 	ldrb.w	r1, [r5, #34]	; 0x22
 800903c:	f894 2022 	ldrb.w	r2, [r4, #34]	; 0x22
 8009040:	4291      	cmp	r1, r2
 8009042:	d105      	bne.n	8009050 <RF_Operate+0x528>
        || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){
 8009044:	f895 1023 	ldrb.w	r1, [r5, #35]	; 0x23
 8009048:	f894 2023 	ldrb.w	r2, [r4, #35]	; 0x23
 800904c:	4291      	cmp	r1, r2
 800904e:	d036      	beq.n	80090be <RF_Operate+0x596>
        Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H];
 8009050:	f885 3021 	strb.w	r3, [r5, #33]	; 0x21
        Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M];
 8009054:	f894 3022 	ldrb.w	r3, [r4, #34]	; 0x22
        Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L];
        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
                   (data_buf[INDEX_PLL_3_5G_HIGH_L]);
#if 1 // PYJ.2019.08.12_BEGIN -- 
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8009058:	2100      	movs	r1, #0
        Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M];
 800905a:	f885 3022 	strb.w	r3, [r5, #34]	; 0x22
        Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L];
 800905e:	f894 3023 	ldrb.w	r3, [r4, #35]	; 0x23
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8009062:	484c      	ldr	r0, [pc, #304]	; (8009194 <RF_Operate+0x66c>)
        Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L];
 8009064:	f885 3023 	strb.w	r3, [r5, #35]	; 0x23
                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
 8009068:	f894 3022 	ldrb.w	r3, [r4, #34]	; 0x22
        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
 800906c:	f894 2021 	ldrb.w	r2, [r4, #33]	; 0x21
                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
 8009070:	021b      	lsls	r3, r3, #8
        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
 8009072:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
                   (data_buf[INDEX_PLL_3_5G_HIGH_L]);
 8009076:	f894 2023 	ldrb.w	r2, [r4, #35]	; 0x23
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 800907a:	e9cd 0100 	strd	r0, r1, [sp]
                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
 800907e:	4313      	orrs	r3, r2
        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 8009080:	f241 3288 	movw	r2, #5000	; 0x1388
 8009084:	9203      	str	r2, [sp, #12]
 8009086:	2202      	movs	r2, #2
 8009088:	9202      	str	r2, [sp, #8]
 800908a:	f242 7210 	movw	r2, #10000	; 0x2710
 800908e:	a826      	add	r0, sp, #152	; 0x98
 8009090:	435a      	muls	r2, r3
 8009092:	2300      	movs	r3, #0
 8009094:	f7fe fc34 	bl	8007900 <ADF4153_Freq_Calc>
#else
        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
#endif // PYJ.2019.08.12_END -- 
//        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
        ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3);
 8009098:	2203      	movs	r2, #3
 800909a:	9205      	str	r2, [sp, #20]
 800909c:	f241 42c2 	movw	r2, #5314	; 0x14c2
 80090a0:	9204      	str	r2, [sp, #16]
 80090a2:	4a3d      	ldr	r2, [pc, #244]	; (8009198 <RF_Operate+0x670>)
 80090a4:	4b3f      	ldr	r3, [pc, #252]	; (80091a4 <RF_Operate+0x67c>)
 80090a6:	9203      	str	r2, [sp, #12]
 80090a8:	4a3f      	ldr	r2, [pc, #252]	; (80091a8 <RF_Operate+0x680>)
 80090aa:	9202      	str	r2, [sp, #8]
 80090ac:	f103 0210 	add.w	r2, r3, #16
 80090b0:	e892 0003 	ldmia.w	r2, {r0, r1}
 80090b4:	e88d 0003 	stmia.w	sp, {r0, r1}
 80090b8:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
 80090ba:	f7fe fcaf 	bl	8007a1c <ADF4153_Module_Ctrl>

    }
    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){

    }
    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
 80090be:	f894 1043 	ldrb.w	r1, [r4, #67]	; 0x43
 80090c2:	f895 3043 	ldrb.w	r3, [r5, #67]	; 0x43
 80090c6:	428b      	cmp	r3, r1
 80090c8:	d006      	beq.n	80090d8 <RF_Operate+0x5b0>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
 80090ca:	2043      	movs	r0, #67	; 0x43
 80090cc:	f7fe fe44 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL];
 80090d0:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 80090d4:	f885 3043 	strb.w	r3, [r5, #67]	; 0x43
    }
    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
 80090d8:	f894 1044 	ldrb.w	r1, [r4, #68]	; 0x44
 80090dc:	f895 3044 	ldrb.w	r3, [r5, #68]	; 0x44
 80090e0:	428b      	cmp	r3, r1
 80090e2:	d006      	beq.n	80090f2 <RF_Operate+0x5ca>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]);
 80090e4:	2044      	movs	r0, #68	; 0x44
 80090e6:	f7fe fe37 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL];
 80090ea:	f894 3044 	ldrb.w	r3, [r4, #68]	; 0x44
 80090ee:	f885 3044 	strb.w	r3, [r5, #68]	; 0x44

    }

    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
 80090f2:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 80090f6:	f895 3045 	ldrb.w	r3, [r5, #69]	; 0x45
 80090fa:	428b      	cmp	r3, r1
 80090fc:	d006      	beq.n	800910c <RF_Operate+0x5e4>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
 80090fe:	2045      	movs	r0, #69	; 0x45
 8009100:	f7fe fe2a 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
 8009104:	f894 3045 	ldrb.w	r3, [r4, #69]	; 0x45
 8009108:	f885 3045 	strb.w	r3, [r5, #69]	; 0x45
    }
    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
 800910c:	f894 1046 	ldrb.w	r1, [r4, #70]	; 0x46
 8009110:	f895 3046 	ldrb.w	r3, [r5, #70]	; 0x46
 8009114:	428b      	cmp	r3, r1
 8009116:	d006      	beq.n	8009126 <RF_Operate+0x5fe>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
 8009118:	2046      	movs	r0, #70	; 0x46
 800911a:	f7fe fe1d 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL];
 800911e:	f894 3046 	ldrb.w	r3, [r4, #70]	; 0x46
 8009122:	f885 3046 	strb.w	r3, [r5, #70]	; 0x46

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
 8009126:	f894 104a 	ldrb.w	r1, [r4, #74]	; 0x4a
 800912a:	f895 304a 	ldrb.w	r3, [r5, #74]	; 0x4a
 800912e:	428b      	cmp	r3, r1
 8009130:	d006      	beq.n	8009140 <RF_Operate+0x618>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]);
 8009132:	204a      	movs	r0, #74	; 0x4a
 8009134:	f7fe fe10 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L];
 8009138:	f894 304a 	ldrb.w	r3, [r4, #74]	; 0x4a
 800913c:	f885 304a 	strb.w	r3, [r5, #74]	; 0x4a

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
 8009140:	f894 1049 	ldrb.w	r1, [r4, #73]	; 0x49
 8009144:	f895 3049 	ldrb.w	r3, [r5, #73]	; 0x49
 8009148:	428b      	cmp	r3, r1
 800914a:	d02f      	beq.n	80091ac <RF_Operate+0x684>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
 800914c:	2049      	movs	r0, #73	; 0x49
 800914e:	f7fe fe03 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
 8009152:	f894 3049 	ldrb.w	r3, [r4, #73]	; 0x49
 8009156:	f885 3049 	strb.w	r3, [r5, #73]	; 0x49
 800915a:	e027      	b.n	80091ac <RF_Operate+0x684>
 800915c:	20000050 	.word	0x20000050
 8009160:	20000068 	.word	0x20000068
 8009164:	20000080 	.word	0x20000080
 8009168:	76660f00 	.word	0x76660f00
 800916c:	009f8092 	.word	0x009f8092
 8009170:	200001e8 	.word	0x200001e8
 8009174:	20000098 	.word	0x20000098
 8009178:	200000b0 	.word	0x200000b0
 800917c:	885e9560 	.word	0x885e9560
 8009180:	20000200 	.word	0x20000200
 8009184:	200000c8 	.word	0x200000c8
 8009188:	200000e0 	.word	0x200000e0
 800918c:	200000f8 	.word	0x200000f8
 8009190:	20000110 	.word	0x20000110
 8009194:	02625a00 	.word	0x02625a00
 8009198:	00163001 	.word	0x00163001
 800919c:	20000234 	.word	0x20000234
 80091a0:	00385e48 	.word	0x00385e48
 80091a4:	2000021c 	.word	0x2000021c
 80091a8:	004006c0 	.word	0x004006c0
    

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
 80091ac:	f894 1047 	ldrb.w	r1, [r4, #71]	; 0x47
 80091b0:	f895 3047 	ldrb.w	r3, [r5, #71]	; 0x47
 80091b4:	428b      	cmp	r3, r1
 80091b6:	f000 8193 	beq.w	80094e0 <RF_Operate+0x9b8>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
        ADC_Modify = 1;
 80091ba:	2601      	movs	r6, #1
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
 80091bc:	2047      	movs	r0, #71	; 0x47
 80091be:	f7fe fdcb 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
 80091c2:	f894 3047 	ldrb.w	r3, [r4, #71]	; 0x47
 80091c6:	f885 3047 	strb.w	r3, [r5, #71]	; 0x47

    }
    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
 80091ca:	f894 1048 	ldrb.w	r1, [r4, #72]	; 0x48
 80091ce:	f895 3048 	ldrb.w	r3, [r5, #72]	; 0x48
 80091d2:	428b      	cmp	r3, r1
 80091d4:	d007      	beq.n	80091e6 <RF_Operate+0x6be>
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
        ADC_Modify = 1;
 80091d6:	2601      	movs	r6, #1
        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
 80091d8:	2048      	movs	r0, #72	; 0x48
 80091da:	f7fe fdbd 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
 80091de:	f894 3048 	ldrb.w	r3, [r4, #72]	; 0x48
 80091e2:	f885 3048 	strb.w	r3, [r5, #72]	; 0x48
    }
    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
 80091e6:	f894 104b 	ldrb.w	r1, [r4, #75]	; 0x4b
 80091ea:	f895 304b 	ldrb.w	r3, [r5, #75]	; 0x4b
 80091ee:	428b      	cmp	r3, r1
 80091f0:	d031      	beq.n	8009256 <RF_Operate+0x72e>
        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);
 80091f2:	204b      	movs	r0, #75	; 0x4b
 80091f4:	f7fe fdb0 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
 80091f8:	f894 304b 	ldrb.w	r3, [r4, #75]	; 0x4b
        HAL_Delay(1);
 80091fc:	2001      	movs	r0, #1
        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
 80091fe:	f885 304b 	strb.w	r3, [r5, #75]	; 0x4b
        HAL_Delay(1);
 8009202:	f7fc f973 	bl	80054ec <HAL_Delay>
//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
        if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
 8009206:	f894 304b 	ldrb.w	r3, [r4, #75]	; 0x4b
 800920a:	b323      	cbz	r3, 8009256 <RF_Operate+0x72e>
#if 1 // PYJ.2019.08.12_BEGIN -- 
//            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
//                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
//                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
 800920c:	f895 3022 	ldrb.w	r3, [r5, #34]	; 0x22
            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
 8009210:	f895 2021 	ldrb.w	r2, [r5, #33]	; 0x21
                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
 8009214:	021b      	lsls	r3, r3, #8
            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
 8009216:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
 800921a:	f895 2023 	ldrb.w	r2, [r5, #35]	; 0x23


//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 800921e:	2100      	movs	r1, #0
                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
 8009220:	4313      	orrs	r3, r2
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8009222:	f241 3288 	movw	r2, #5000	; 0x1388
 8009226:	9203      	str	r2, [sp, #12]
 8009228:	2208      	movs	r2, #8
 800922a:	9202      	str	r2, [sp, #8]
 800922c:	f242 7210 	movw	r2, #10000	; 0x2710
 8009230:	48ae      	ldr	r0, [pc, #696]	; (80094ec <RF_Operate+0x9c4>)
            temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
#endif // PYJ.2019.08.12_END -- 
//            ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
//            ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3);

            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8009232:	4faf      	ldr	r7, [pc, #700]	; (80094f0 <RF_Operate+0x9c8>)
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
 8009234:	e9cd 0100 	strd	r0, r1, [sp]
 8009238:	435a      	muls	r2, r3
 800923a:	a826      	add	r0, sp, #152	; 0x98
 800923c:	2300      	movs	r3, #0
 800923e:	f7fe fb5f 	bl	8007900 <ADF4153_Freq_Calc>
            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 8009242:	2298      	movs	r2, #152	; 0x98
 8009244:	f107 0110 	add.w	r1, r7, #16
 8009248:	4668      	mov	r0, sp
 800924a:	f000 f9f5 	bl	8009638 <memcpy>
 800924e:	e897 000f 	ldmia.w	r7, {r0, r1, r2, r3}
 8009252:	f7fe f9fd 	bl	8007650 <PE43711_ALL_atten_ctrl>
        }
    }
    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
 8009256:	f894 104c 	ldrb.w	r1, [r4, #76]	; 0x4c
 800925a:	f895 304c 	ldrb.w	r3, [r5, #76]	; 0x4c
 800925e:	428b      	cmp	r3, r1
 8009260:	d02f      	beq.n	80092c2 <RF_Operate+0x79a>
        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]);
 8009262:	204c      	movs	r0, #76	; 0x4c
 8009264:	f7fe fd78 	bl	8007d58 <Power_ON_OFF_Ctrl>
        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
 8009268:	f894 304c 	ldrb.w	r3, [r4, #76]	; 0x4c
        HAL_Delay(1);
 800926c:	2001      	movs	r0, #1
        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
 800926e:	f885 304c 	strb.w	r3, [r5, #76]	; 0x4c
        HAL_Delay(1);
 8009272:	f7fc f93b 	bl	80054ec <HAL_Delay>
//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
        if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
 8009276:	f894 304c 	ldrb.w	r3, [r4, #76]	; 0x4c
 800927a:	b313      	cbz	r3, 80092c2 <RF_Operate+0x79a>
#if 1 // PYJ.2019.08.12_BEGIN -- 
//            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
//                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
//                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
 800927c:	7feb      	ldrb	r3, [r5, #31]
            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
 800927e:	7faa      	ldrb	r2, [r5, #30]
                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
 8009280:	021b      	lsls	r3, r3, #8
            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
 8009282:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
 8009286:	f895 2020 	ldrb.w	r2, [r5, #32]
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 800928a:	2100      	movs	r1, #0
                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
 800928c:	4313      	orrs	r3, r2
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 800928e:	f241 3288 	movw	r2, #5000	; 0x1388
 8009292:	9203      	str	r2, [sp, #12]
 8009294:	2202      	movs	r2, #2
 8009296:	9202      	str	r2, [sp, #8]
 8009298:	f242 7210 	movw	r2, #10000	; 0x2710
 800929c:	4895      	ldr	r0, [pc, #596]	; (80094f4 <RF_Operate+0x9cc>)
//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
#else
          temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);            
#endif // PYJ.2019.08.12_END -- 
//            ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 800929e:	4f94      	ldr	r7, [pc, #592]	; (80094f0 <RF_Operate+0x9c8>)
            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
 80092a0:	e9cd 0100 	strd	r0, r1, [sp]
 80092a4:	435a      	muls	r2, r3
 80092a6:	a826      	add	r0, sp, #152	; 0x98
 80092a8:	2300      	movs	r3, #0
 80092aa:	f7fe fb29 	bl	8007900 <ADF4153_Freq_Calc>
            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 80092ae:	2298      	movs	r2, #152	; 0x98
 80092b0:	f107 0110 	add.w	r1, r7, #16
 80092b4:	4668      	mov	r0, sp
 80092b6:	f000 f9bf 	bl	8009638 <memcpy>
 80092ba:	e897 000f 	ldmia.w	r7, {r0, r1, r2, r3}
 80092be:	f7fe f9c7 	bl	8007650 <PE43711_ALL_atten_ctrl>
        }
    }

    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
 80092c2:	f894 304d 	ldrb.w	r3, [r4, #77]	; 0x4d
 80092c6:	f895 204d 	ldrb.w	r2, [r5, #77]	; 0x4d
 80092ca:	429a      	cmp	r2, r3
 80092cc:	d006      	beq.n	80092dc <RF_Operate+0x7b4>
        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
 80092ce:	f885 304d 	strb.w	r3, [r5, #77]	; 0x4d
        Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]);
 80092d2:	f894 104d 	ldrb.w	r1, [r4, #77]	; 0x4d
 80092d6:	204d      	movs	r0, #77	; 0x4d
 80092d8:	f7fe fd3e 	bl	8007d58 <Power_ON_OFF_Ctrl>
    }
    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
 80092dc:	f894 304e 	ldrb.w	r3, [r4, #78]	; 0x4e
 80092e0:	f895 204e 	ldrb.w	r2, [r5, #78]	; 0x4e
 80092e4:	429a      	cmp	r2, r3
 80092e6:	d006      	beq.n	80092f6 <RF_Operate+0x7ce>
        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
 80092e8:	f885 304e 	strb.w	r3, [r5, #78]	; 0x4e
        Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]);
 80092ec:	f894 104e 	ldrb.w	r1, [r4, #78]	; 0x4e
 80092f0:	204e      	movs	r0, #78	; 0x4e
 80092f2:	f7fe fd31 	bl	8007d58 <Power_ON_OFF_Ctrl>
    }
    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
 80092f6:	4d80      	ldr	r5, [pc, #512]	; (80094f8 <RF_Operate+0x9d0>)
 80092f8:	f894 304f 	ldrb.w	r3, [r4, #79]	; 0x4f
 80092fc:	f895 204f 	ldrb.w	r2, [r5, #79]	; 0x4f
 8009300:	429a      	cmp	r2, r3
 8009302:	d006      	beq.n	8009312 <RF_Operate+0x7ea>
        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
 8009304:	f885 304f 	strb.w	r3, [r5, #79]	; 0x4f
        Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]);
 8009308:	f894 104f 	ldrb.w	r1, [r4, #79]	; 0x4f
 800930c:	204f      	movs	r0, #79	; 0x4f
 800930e:	f7fe fd23 	bl	8007d58 <Power_ON_OFF_Ctrl>
    }
    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
 8009312:	f894 3050 	ldrb.w	r3, [r4, #80]	; 0x50
 8009316:	f895 2050 	ldrb.w	r2, [r5, #80]	; 0x50
 800931a:	429a      	cmp	r2, r3
 800931c:	d006      	beq.n	800932c <RF_Operate+0x804>
        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
 800931e:	f885 3050 	strb.w	r3, [r5, #80]	; 0x50
        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
 8009322:	f894 1050 	ldrb.w	r1, [r4, #80]	; 0x50
 8009326:	2050      	movs	r0, #80	; 0x50
 8009328:	f7fe fd16 	bl	8007d58 <Power_ON_OFF_Ctrl>
    }


    if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H])
 800932c:	f894 3051 	ldrb.w	r3, [r4, #81]	; 0x51
 8009330:	f895 2051 	ldrb.w	r2, [r5, #81]	; 0x51
 8009334:	429a      	cmp	r2, r3
 8009336:	d105      	bne.n	8009344 <RF_Operate+0x81c>
        ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){
 8009338:	f895 1052 	ldrb.w	r1, [r5, #82]	; 0x52
 800933c:	f894 2052 	ldrb.w	r2, [r4, #82]	; 0x52
 8009340:	4291      	cmp	r1, r2
 8009342:	d006      	beq.n	8009352 <RF_Operate+0x82a>
        ADC_Modify = 1;
 8009344:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H];
 8009346:	f885 3051 	strb.w	r3, [r5, #81]	; 0x51
        Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L];
 800934a:	f894 3052 	ldrb.w	r3, [r4, #82]	; 0x52
 800934e:	f885 3052 	strb.w	r3, [r5, #82]	; 0x52
    }
    if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H])
 8009352:	f894 3053 	ldrb.w	r3, [r4, #83]	; 0x53
 8009356:	f895 2053 	ldrb.w	r2, [r5, #83]	; 0x53
 800935a:	429a      	cmp	r2, r3
 800935c:	d105      	bne.n	800936a <RF_Operate+0x842>
        ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){
 800935e:	f895 1054 	ldrb.w	r1, [r5, #84]	; 0x54
 8009362:	f894 2054 	ldrb.w	r2, [r4, #84]	; 0x54
 8009366:	4291      	cmp	r1, r2
 8009368:	d006      	beq.n	8009378 <RF_Operate+0x850>
        ADC_Modify = 1;
 800936a:	2601      	movs	r6, #1
        
        Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H];
 800936c:	f885 3053 	strb.w	r3, [r5, #83]	; 0x53
        Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L];        
 8009370:	f894 3054 	ldrb.w	r3, [r4, #84]	; 0x54
 8009374:	f885 3054 	strb.w	r3, [r5, #84]	; 0x54
    }    
    if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
 8009378:	f894 3055 	ldrb.w	r3, [r4, #85]	; 0x55
 800937c:	f895 2055 	ldrb.w	r2, [r5, #85]	; 0x55
 8009380:	429a      	cmp	r2, r3
 8009382:	d105      	bne.n	8009390 <RF_Operate+0x868>
        ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
 8009384:	f895 1056 	ldrb.w	r1, [r5, #86]	; 0x56
 8009388:	f894 2056 	ldrb.w	r2, [r4, #86]	; 0x56
 800938c:	4291      	cmp	r1, r2
 800938e:	d006      	beq.n	800939e <RF_Operate+0x876>
        ADC_Modify = 1;
 8009390:	2601      	movs	r6, #1
//        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
//        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);

        Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
 8009392:	f885 3055 	strb.w	r3, [r5, #85]	; 0x55
        Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
 8009396:	f894 3056 	ldrb.w	r3, [r4, #86]	; 0x56
 800939a:	f885 3056 	strb.w	r3, [r5, #86]	; 0x56
    }
    if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H])
 800939e:	f894 3057 	ldrb.w	r3, [r4, #87]	; 0x57
 80093a2:	f895 2057 	ldrb.w	r2, [r5, #87]	; 0x57
 80093a6:	429a      	cmp	r2, r3
 80093a8:	d105      	bne.n	80093b6 <RF_Operate+0x88e>
        ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){
 80093aa:	f895 1058 	ldrb.w	r1, [r5, #88]	; 0x58
 80093ae:	f894 2058 	ldrb.w	r2, [r4, #88]	; 0x58
 80093b2:	4291      	cmp	r1, r2
 80093b4:	d006      	beq.n	80093c4 <RF_Operate+0x89c>
        ADC_Modify = 1;
 80093b6:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H];
 80093b8:	f885 3057 	strb.w	r3, [r5, #87]	; 0x57
        Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L];
 80093bc:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
 80093c0:	f885 3058 	strb.w	r3, [r5, #88]	; 0x58
    }
    if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H])
 80093c4:	f894 3059 	ldrb.w	r3, [r4, #89]	; 0x59
 80093c8:	f895 2059 	ldrb.w	r2, [r5, #89]	; 0x59
 80093cc:	429a      	cmp	r2, r3
 80093ce:	d105      	bne.n	80093dc <RF_Operate+0x8b4>
        ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){
 80093d0:	f895 105a 	ldrb.w	r1, [r5, #90]	; 0x5a
 80093d4:	f894 205a 	ldrb.w	r2, [r4, #90]	; 0x5a
 80093d8:	4291      	cmp	r1, r2
 80093da:	d006      	beq.n	80093ea <RF_Operate+0x8c2>
        ADC_Modify = 1;
 80093dc:	2601      	movs	r6, #1

        Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H];
 80093de:	f885 3059 	strb.w	r3, [r5, #89]	; 0x59
        Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L];        
 80093e2:	f894 305a 	ldrb.w	r3, [r4, #90]	; 0x5a
 80093e6:	f885 305a 	strb.w	r3, [r5, #90]	; 0x5a
    }
    if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H])
 80093ea:	f894 305b 	ldrb.w	r3, [r4, #91]	; 0x5b
 80093ee:	f895 205b 	ldrb.w	r2, [r5, #91]	; 0x5b
 80093f2:	429a      	cmp	r2, r3
 80093f4:	d105      	bne.n	8009402 <RF_Operate+0x8da>
        ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){
 80093f6:	f895 105c 	ldrb.w	r1, [r5, #92]	; 0x5c
 80093fa:	f894 205c 	ldrb.w	r2, [r4, #92]	; 0x5c
 80093fe:	4291      	cmp	r1, r2
 8009400:	d006      	beq.n	8009410 <RF_Operate+0x8e8>
        ADC_Modify = 1;
 8009402:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H];
 8009404:	f885 305b 	strb.w	r3, [r5, #91]	; 0x5b
        Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L];        
 8009408:	f894 305c 	ldrb.w	r3, [r4, #92]	; 0x5c
 800940c:	f885 305c 	strb.w	r3, [r5, #92]	; 0x5c
    }
    if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H])
 8009410:	f894 305d 	ldrb.w	r3, [r4, #93]	; 0x5d
 8009414:	f895 205d 	ldrb.w	r2, [r5, #93]	; 0x5d
 8009418:	429a      	cmp	r2, r3
 800941a:	d105      	bne.n	8009428 <RF_Operate+0x900>
        ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){
 800941c:	f895 105e 	ldrb.w	r1, [r5, #94]	; 0x5e
 8009420:	f894 205e 	ldrb.w	r2, [r4, #94]	; 0x5e
 8009424:	4291      	cmp	r1, r2
 8009426:	d006      	beq.n	8009436 <RF_Operate+0x90e>
        ADC_Modify = 1;
 8009428:	2601      	movs	r6, #1
        Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H];
 800942a:	f885 305d 	strb.w	r3, [r5, #93]	; 0x5d
        Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L];        
 800942e:	f894 305e 	ldrb.w	r3, [r4, #94]	; 0x5e
 8009432:	f885 305e 	strb.w	r3, [r5, #94]	; 0x5e
    }    
    if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H])
 8009436:	f894 305f 	ldrb.w	r3, [r4, #95]	; 0x5f
 800943a:	f895 205f 	ldrb.w	r2, [r5, #95]	; 0x5f
 800943e:	429a      	cmp	r2, r3
 8009440:	d105      	bne.n	800944e <RF_Operate+0x926>
        ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){
 8009442:	f895 1060 	ldrb.w	r1, [r5, #96]	; 0x60
 8009446:	f894 2060 	ldrb.w	r2, [r4, #96]	; 0x60
 800944a:	4291      	cmp	r1, r2
 800944c:	d04a      	beq.n	80094e4 <RF_Operate+0x9bc>
        ADC_Modify = 1;
        Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H];
 800944e:	f885 305f 	strb.w	r3, [r5, #95]	; 0x5f
        Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L];        
 8009452:	f894 3060 	ldrb.w	r3, [r4, #96]	; 0x60
 8009456:	f885 3060 	strb.w	r3, [r5, #96]	; 0x60
//        AD5318_Ctrl(0xA000);
//        printf("DAC CTRL START \r\n");
//        AD5318_Ctrl(0x800C);
//        AD5318_Ctrl(0xA000);
//        printf("DAC Change\r\n");
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]));    
 800945a:	f895 3052 	ldrb.w	r3, [r5, #82]	; 0x52
 800945e:	f895 0051 	ldrb.w	r0, [r5, #81]	; 0x51
 8009462:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009466:	f7fd ff31 	bl	80072cc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L]));    
 800946a:	f895 3054 	ldrb.w	r3, [r5, #84]	; 0x54
 800946e:	f895 0053 	ldrb.w	r0, [r5, #83]	; 0x53
 8009472:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009476:	f7fd ff29 	bl	80072cc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L]));
 800947a:	f895 3056 	ldrb.w	r3, [r5, #86]	; 0x56
 800947e:	f895 0055 	ldrb.w	r0, [r5, #85]	; 0x55
 8009482:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009486:	f7fd ff21 	bl	80072cc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L]));
 800948a:	f895 3058 	ldrb.w	r3, [r5, #88]	; 0x58
 800948e:	f895 0057 	ldrb.w	r0, [r5, #87]	; 0x57
 8009492:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 8009496:	f7fd ff19 	bl	80072cc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L]));    
 800949a:	f895 305a 	ldrb.w	r3, [r5, #90]	; 0x5a
 800949e:	f895 0059 	ldrb.w	r0, [r5, #89]	; 0x59
 80094a2:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 80094a6:	f7fd ff11 	bl	80072cc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L]));
 80094aa:	f895 305c 	ldrb.w	r3, [r5, #92]	; 0x5c
 80094ae:	f895 005b 	ldrb.w	r0, [r5, #91]	; 0x5b
 80094b2:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 80094b6:	f7fd ff09 	bl	80072cc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
 80094ba:	f895 305e 	ldrb.w	r3, [r5, #94]	; 0x5e
 80094be:	f895 005d 	ldrb.w	r0, [r5, #93]	; 0x5d
 80094c2:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
 80094c6:	f7fd ff01 	bl	80072cc <AD5318_Ctrl>
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
 80094ca:	f895 005f 	ldrb.w	r0, [r5, #95]	; 0x5f
 80094ce:	f895 3060 	ldrb.w	r3, [r5, #96]	; 0x60
 80094d2:	ea43 2000 	orr.w	r0, r3, r0, lsl #8
    }
    
}
 80094d6:	b029      	add	sp, #164	; 0xa4
 80094d8:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
 80094dc:	f7fd bef6 	b.w	80072cc <AD5318_Ctrl>
    uint8_t  ADC_Modify = 0;
 80094e0:	2600      	movs	r6, #0
 80094e2:	e672      	b.n	80091ca <RF_Operate+0x6a2>
    if(ADC_Modify){
 80094e4:	2e00      	cmp	r6, #0
 80094e6:	d1b8      	bne.n	800945a <RF_Operate+0x932>
}
 80094e8:	b029      	add	sp, #164	; 0xa4
 80094ea:	bdf0      	pop	{r4, r5, r6, r7, pc}
 80094ec:	07530000 	.word	0x07530000
 80094f0:	200004d8 	.word	0x200004d8
 80094f4:	02625a00 	.word	0x02625a00
 80094f8:	200005e3 	.word	0x200005e3

080094fc <RF_Ctrl_Main>:

uint8_t temp_crc = 0;
bool RF_Ctrl_Main(uint8_t* data_buf){
 80094fc:	b570      	push	{r4, r5, r6, lr}
 80094fe:	4604      	mov	r4, r0
    bool ret = false;
    Bluecell_Prot_t type = data_buf[Type];
 8009500:	7846      	ldrb	r6, [r0, #1]
    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
 8009502:	f7ff facb 	bl	8008a9c <RF_Data_Check>
    if(ret == false){
 8009506:	4605      	mov	r5, r0
 8009508:	b948      	cbnz	r0, 800951e <RF_Ctrl_Main+0x22>
        HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); 
 800950a:	78a2      	ldrb	r2, [r4, #2]
 800950c:	f640 33b8 	movw	r3, #3000	; 0xbb8
 8009510:	3203      	adds	r2, #3
 8009512:	4621      	mov	r1, r4
 8009514:	481a      	ldr	r0, [pc, #104]	; (8009580 <RF_Ctrl_Main+0x84>)
 8009516:	f7fd fcad 	bl	8006e74 <HAL_UART_Transmit>
            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
#endif
            break;
    }
    return ret;
}
 800951a:	4628      	mov	r0, r5
 800951c:	bd70      	pop	{r4, r5, r6, pc}
    switch(type){
 800951e:	2e03      	cmp	r6, #3
 8009520:	d8fb      	bhi.n	800951a <RF_Ctrl_Main+0x1e>
 8009522:	e8df f006 	tbb	[pc, r6]
 8009526:	2002      	.short	0x2002
 8009528:	2926      	.short	0x2926
 800952a:	2300      	movs	r3, #0
            printf("%02x ",data_buf[i]);
 800952c:	4e15      	ldr	r6, [pc, #84]	; (8009584 <RF_Ctrl_Main+0x88>)
        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
 800952e:	78a2      	ldrb	r2, [r4, #2]
 8009530:	1c5d      	adds	r5, r3, #1
 8009532:	3205      	adds	r2, #5
 8009534:	b2db      	uxtb	r3, r3
 8009536:	429a      	cmp	r2, r3
 8009538:	da0f      	bge.n	800955a <RF_Ctrl_Main+0x5e>
        printf("Reset Start \r\n");
 800953a:	4813      	ldr	r0, [pc, #76]	; (8009588 <RF_Ctrl_Main+0x8c>)
 800953c:	f000 fd64 	bl	800a008 <puts>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8009540:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8009544:	4911      	ldr	r1, [pc, #68]	; (800958c <RF_Ctrl_Main+0x90>)
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 8009546:	4b12      	ldr	r3, [pc, #72]	; (8009590 <RF_Ctrl_Main+0x94>)
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8009548:	68ca      	ldr	r2, [r1, #12]
 800954a:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 800954e:	4313      	orrs	r3, r2
 8009550:	60cb      	str	r3, [r1, #12]
 8009552:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("nop");
 8009556:	bf00      	nop
 8009558:	e7fd      	b.n	8009556 <RF_Ctrl_Main+0x5a>
            printf("%02x ",data_buf[i]);
 800955a:	5ce1      	ldrb	r1, [r4, r3]
 800955c:	4630      	mov	r0, r6
 800955e:	f000 fcdf 	bl	8009f20 <iprintf>
 8009562:	462b      	mov	r3, r5
 8009564:	e7e3      	b.n	800952e <RF_Ctrl_Main+0x32>
        RF_Operate(&data_buf[Header]);
 8009566:	4620      	mov	r0, r4
 8009568:	f7ff fade 	bl	8008b28 <RF_Operate>
        RF_Status_Ack();
 800956c:	f7ff fac0 	bl	8008af0 <RF_Status_Ack>
        break;
 8009570:	e7d3      	b.n	800951a <RF_Ctrl_Main+0x1e>
        RF_Status_Get();
 8009572:	f7ff fa9f 	bl	8008ab4 <RF_Status_Get>
        break;
 8009576:	e7d0      	b.n	800951a <RF_Ctrl_Main+0x1e>
        Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]);
 8009578:	4806      	ldr	r0, [pc, #24]	; (8009594 <RF_Ctrl_Main+0x98>)
 800957a:	f7fe fb85 	bl	8007c88 <Bluecell_Flash_Write>
 800957e:	e7f5      	b.n	800956c <RF_Ctrl_Main+0x70>
 8009580:	20000700 	.word	0x20000700
 8009584:	0800bf8f 	.word	0x0800bf8f
 8009588:	0800bf95 	.word	0x0800bf95
 800958c:	e000ed00 	.word	0xe000ed00
 8009590:	05fa0004 	.word	0x05fa0004
 8009594:	200005e3 	.word	0x200005e3

08009598 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8009598:	2100      	movs	r1, #0
  b LoopCopyDataInit
 800959a:	e003      	b.n	80095a4 <LoopCopyDataInit>

0800959c <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 800959c:	4b0b      	ldr	r3, [pc, #44]	; (80095cc <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 800959e:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 80095a0:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 80095a2:	3104      	adds	r1, #4

080095a4 <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 80095a4:	480a      	ldr	r0, [pc, #40]	; (80095d0 <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 80095a6:	4b0b      	ldr	r3, [pc, #44]	; (80095d4 <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 80095a8:	1842      	adds	r2, r0, r1
  cmp r2, r3
 80095aa:	429a      	cmp	r2, r3
  bcc CopyDataInit
 80095ac:	d3f6      	bcc.n	800959c <CopyDataInit>
  ldr r2, =_sbss
 80095ae:	4a0a      	ldr	r2, [pc, #40]	; (80095d8 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 80095b0:	e002      	b.n	80095b8 <LoopFillZerobss>

080095b2 <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 80095b2:	2300      	movs	r3, #0
  str r3, [r2], #4
 80095b4:	f842 3b04 	str.w	r3, [r2], #4

080095b8 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 80095b8:	4b08      	ldr	r3, [pc, #32]	; (80095dc <LoopFillZerobss+0x24>)
  cmp r2, r3
 80095ba:	429a      	cmp	r2, r3
  bcc FillZerobss
 80095bc:	d3f9      	bcc.n	80095b2 <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 80095be:	f7ff f9cd 	bl	800895c <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 80095c2:	f000 f815 	bl	80095f0 <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 80095c6:	f7fe fd4f 	bl	8008068 <main>
  bx lr
 80095ca:	4770      	bx	lr
  ldr r3, =_sidata
 80095cc:	0800c278 	.word	0x0800c278
  ldr r0, =_sdata
 80095d0:	20000000 	.word	0x20000000
  ldr r3, =_edata
 80095d4:	2000041c 	.word	0x2000041c
  ldr r2, =_sbss
 80095d8:	20000420 	.word	0x20000420
  ldr r3, = _ebss
 80095dc:	200017e4 	.word	0x200017e4

080095e0 <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 80095e0:	e7fe      	b.n	80095e0 <ADC1_2_IRQHandler>
	...

080095e4 <__errno>:
 80095e4:	4b01      	ldr	r3, [pc, #4]	; (80095ec <__errno+0x8>)
 80095e6:	6818      	ldr	r0, [r3, #0]
 80095e8:	4770      	bx	lr
 80095ea:	bf00      	nop
 80095ec:	2000024c 	.word	0x2000024c

080095f0 <__libc_init_array>:
 80095f0:	b570      	push	{r4, r5, r6, lr}
 80095f2:	2500      	movs	r5, #0
 80095f4:	4e0c      	ldr	r6, [pc, #48]	; (8009628 <__libc_init_array+0x38>)
 80095f6:	4c0d      	ldr	r4, [pc, #52]	; (800962c <__libc_init_array+0x3c>)
 80095f8:	1ba4      	subs	r4, r4, r6
 80095fa:	10a4      	asrs	r4, r4, #2
 80095fc:	42a5      	cmp	r5, r4
 80095fe:	d109      	bne.n	8009614 <__libc_init_array+0x24>
 8009600:	f002 fc8c 	bl	800bf1c <_init>
 8009604:	2500      	movs	r5, #0
 8009606:	4e0a      	ldr	r6, [pc, #40]	; (8009630 <__libc_init_array+0x40>)
 8009608:	4c0a      	ldr	r4, [pc, #40]	; (8009634 <__libc_init_array+0x44>)
 800960a:	1ba4      	subs	r4, r4, r6
 800960c:	10a4      	asrs	r4, r4, #2
 800960e:	42a5      	cmp	r5, r4
 8009610:	d105      	bne.n	800961e <__libc_init_array+0x2e>
 8009612:	bd70      	pop	{r4, r5, r6, pc}
 8009614:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8009618:	4798      	blx	r3
 800961a:	3501      	adds	r5, #1
 800961c:	e7ee      	b.n	80095fc <__libc_init_array+0xc>
 800961e:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8009622:	4798      	blx	r3
 8009624:	3501      	adds	r5, #1
 8009626:	e7f2      	b.n	800960e <__libc_init_array+0x1e>
 8009628:	0800c270 	.word	0x0800c270
 800962c:	0800c270 	.word	0x0800c270
 8009630:	0800c270 	.word	0x0800c270
 8009634:	0800c274 	.word	0x0800c274

08009638 <memcpy>:
 8009638:	b510      	push	{r4, lr}
 800963a:	1e43      	subs	r3, r0, #1
 800963c:	440a      	add	r2, r1
 800963e:	4291      	cmp	r1, r2
 8009640:	d100      	bne.n	8009644 <memcpy+0xc>
 8009642:	bd10      	pop	{r4, pc}
 8009644:	f811 4b01 	ldrb.w	r4, [r1], #1
 8009648:	f803 4f01 	strb.w	r4, [r3, #1]!
 800964c:	e7f7      	b.n	800963e <memcpy+0x6>

0800964e <memset>:
 800964e:	4603      	mov	r3, r0
 8009650:	4402      	add	r2, r0
 8009652:	4293      	cmp	r3, r2
 8009654:	d100      	bne.n	8009658 <memset+0xa>
 8009656:	4770      	bx	lr
 8009658:	f803 1b01 	strb.w	r1, [r3], #1
 800965c:	e7f9      	b.n	8009652 <memset+0x4>

0800965e <__cvt>:
 800965e:	2b00      	cmp	r3, #0
 8009660:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8009664:	461e      	mov	r6, r3
 8009666:	bfbb      	ittet	lt
 8009668:	f103 4300 	addlt.w	r3, r3, #2147483648	; 0x80000000
 800966c:	461e      	movlt	r6, r3
 800966e:	2300      	movge	r3, #0
 8009670:	232d      	movlt	r3, #45	; 0x2d
 8009672:	b088      	sub	sp, #32
 8009674:	9f14      	ldr	r7, [sp, #80]	; 0x50
 8009676:	9912      	ldr	r1, [sp, #72]	; 0x48
 8009678:	f027 0720 	bic.w	r7, r7, #32
 800967c:	2f46      	cmp	r7, #70	; 0x46
 800967e:	4614      	mov	r4, r2
 8009680:	9d10      	ldr	r5, [sp, #64]	; 0x40
 8009682:	f8dd a04c 	ldr.w	sl, [sp, #76]	; 0x4c
 8009686:	700b      	strb	r3, [r1, #0]
 8009688:	d004      	beq.n	8009694 <__cvt+0x36>
 800968a:	2f45      	cmp	r7, #69	; 0x45
 800968c:	d100      	bne.n	8009690 <__cvt+0x32>
 800968e:	3501      	adds	r5, #1
 8009690:	2302      	movs	r3, #2
 8009692:	e000      	b.n	8009696 <__cvt+0x38>
 8009694:	2303      	movs	r3, #3
 8009696:	aa07      	add	r2, sp, #28
 8009698:	9204      	str	r2, [sp, #16]
 800969a:	aa06      	add	r2, sp, #24
 800969c:	9203      	str	r2, [sp, #12]
 800969e:	e88d 0428 	stmia.w	sp, {r3, r5, sl}
 80096a2:	4622      	mov	r2, r4
 80096a4:	4633      	mov	r3, r6
 80096a6:	f000 febb 	bl	800a420 <_dtoa_r>
 80096aa:	2f47      	cmp	r7, #71	; 0x47
 80096ac:	4680      	mov	r8, r0
 80096ae:	d102      	bne.n	80096b6 <__cvt+0x58>
 80096b0:	9b11      	ldr	r3, [sp, #68]	; 0x44
 80096b2:	07db      	lsls	r3, r3, #31
 80096b4:	d526      	bpl.n	8009704 <__cvt+0xa6>
 80096b6:	2f46      	cmp	r7, #70	; 0x46
 80096b8:	eb08 0905 	add.w	r9, r8, r5
 80096bc:	d111      	bne.n	80096e2 <__cvt+0x84>
 80096be:	f898 3000 	ldrb.w	r3, [r8]
 80096c2:	2b30      	cmp	r3, #48	; 0x30
 80096c4:	d10a      	bne.n	80096dc <__cvt+0x7e>
 80096c6:	2200      	movs	r2, #0
 80096c8:	2300      	movs	r3, #0
 80096ca:	4620      	mov	r0, r4
 80096cc:	4631      	mov	r1, r6
 80096ce:	f7fb f9df 	bl	8004a90 <__aeabi_dcmpeq>
 80096d2:	b918      	cbnz	r0, 80096dc <__cvt+0x7e>
 80096d4:	f1c5 0501 	rsb	r5, r5, #1
 80096d8:	f8ca 5000 	str.w	r5, [sl]
 80096dc:	f8da 3000 	ldr.w	r3, [sl]
 80096e0:	4499      	add	r9, r3
 80096e2:	2200      	movs	r2, #0
 80096e4:	2300      	movs	r3, #0
 80096e6:	4620      	mov	r0, r4
 80096e8:	4631      	mov	r1, r6
 80096ea:	f7fb f9d1 	bl	8004a90 <__aeabi_dcmpeq>
 80096ee:	b938      	cbnz	r0, 8009700 <__cvt+0xa2>
 80096f0:	2230      	movs	r2, #48	; 0x30
 80096f2:	9b07      	ldr	r3, [sp, #28]
 80096f4:	4599      	cmp	r9, r3
 80096f6:	d905      	bls.n	8009704 <__cvt+0xa6>
 80096f8:	1c59      	adds	r1, r3, #1
 80096fa:	9107      	str	r1, [sp, #28]
 80096fc:	701a      	strb	r2, [r3, #0]
 80096fe:	e7f8      	b.n	80096f2 <__cvt+0x94>
 8009700:	f8cd 901c 	str.w	r9, [sp, #28]
 8009704:	4640      	mov	r0, r8
 8009706:	9b07      	ldr	r3, [sp, #28]
 8009708:	9a15      	ldr	r2, [sp, #84]	; 0x54
 800970a:	eba3 0308 	sub.w	r3, r3, r8
 800970e:	6013      	str	r3, [r2, #0]
 8009710:	b008      	add	sp, #32
 8009712:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}

08009716 <__exponent>:
 8009716:	4603      	mov	r3, r0
 8009718:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 800971a:	2900      	cmp	r1, #0
 800971c:	f803 2b02 	strb.w	r2, [r3], #2
 8009720:	bfb6      	itet	lt
 8009722:	222d      	movlt	r2, #45	; 0x2d
 8009724:	222b      	movge	r2, #43	; 0x2b
 8009726:	4249      	neglt	r1, r1
 8009728:	2909      	cmp	r1, #9
 800972a:	7042      	strb	r2, [r0, #1]
 800972c:	dd21      	ble.n	8009772 <__exponent+0x5c>
 800972e:	f10d 0207 	add.w	r2, sp, #7
 8009732:	4617      	mov	r7, r2
 8009734:	260a      	movs	r6, #10
 8009736:	fb91 f5f6 	sdiv	r5, r1, r6
 800973a:	fb06 1115 	mls	r1, r6, r5, r1
 800973e:	2d09      	cmp	r5, #9
 8009740:	f101 0130 	add.w	r1, r1, #48	; 0x30
 8009744:	f802 1c01 	strb.w	r1, [r2, #-1]
 8009748:	f102 34ff 	add.w	r4, r2, #4294967295
 800974c:	4629      	mov	r1, r5
 800974e:	dc09      	bgt.n	8009764 <__exponent+0x4e>
 8009750:	3130      	adds	r1, #48	; 0x30
 8009752:	3a02      	subs	r2, #2
 8009754:	f804 1c01 	strb.w	r1, [r4, #-1]
 8009758:	42ba      	cmp	r2, r7
 800975a:	461c      	mov	r4, r3
 800975c:	d304      	bcc.n	8009768 <__exponent+0x52>
 800975e:	1a20      	subs	r0, r4, r0
 8009760:	b003      	add	sp, #12
 8009762:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8009764:	4622      	mov	r2, r4
 8009766:	e7e6      	b.n	8009736 <__exponent+0x20>
 8009768:	f812 1b01 	ldrb.w	r1, [r2], #1
 800976c:	f803 1b01 	strb.w	r1, [r3], #1
 8009770:	e7f2      	b.n	8009758 <__exponent+0x42>
 8009772:	2230      	movs	r2, #48	; 0x30
 8009774:	461c      	mov	r4, r3
 8009776:	4411      	add	r1, r2
 8009778:	f804 2b02 	strb.w	r2, [r4], #2
 800977c:	7059      	strb	r1, [r3, #1]
 800977e:	e7ee      	b.n	800975e <__exponent+0x48>

08009780 <_printf_float>:
 8009780:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8009784:	b091      	sub	sp, #68	; 0x44
 8009786:	460c      	mov	r4, r1
 8009788:	9f1a      	ldr	r7, [sp, #104]	; 0x68
 800978a:	4693      	mov	fp, r2
 800978c:	461e      	mov	r6, r3
 800978e:	4605      	mov	r5, r0
 8009790:	f001 fd96 	bl	800b2c0 <_localeconv_r>
 8009794:	6803      	ldr	r3, [r0, #0]
 8009796:	4618      	mov	r0, r3
 8009798:	9309      	str	r3, [sp, #36]	; 0x24
 800979a:	f7fa fd45 	bl	8004228 <strlen>
 800979e:	2300      	movs	r3, #0
 80097a0:	930e      	str	r3, [sp, #56]	; 0x38
 80097a2:	683b      	ldr	r3, [r7, #0]
 80097a4:	900a      	str	r0, [sp, #40]	; 0x28
 80097a6:	3307      	adds	r3, #7
 80097a8:	f023 0307 	bic.w	r3, r3, #7
 80097ac:	f103 0208 	add.w	r2, r3, #8
 80097b0:	f894 8018 	ldrb.w	r8, [r4, #24]
 80097b4:	f8d4 a000 	ldr.w	sl, [r4]
 80097b8:	603a      	str	r2, [r7, #0]
 80097ba:	e9d3 2300 	ldrd	r2, r3, [r3]
 80097be:	e9c4 2312 	strd	r2, r3, [r4, #72]	; 0x48
 80097c2:	f8d4 904c 	ldr.w	r9, [r4, #76]	; 0x4c
 80097c6:	6ca7      	ldr	r7, [r4, #72]	; 0x48
 80097c8:	f029 4300 	bic.w	r3, r9, #2147483648	; 0x80000000
 80097cc:	930b      	str	r3, [sp, #44]	; 0x2c
 80097ce:	f04f 32ff 	mov.w	r2, #4294967295
 80097d2:	4ba6      	ldr	r3, [pc, #664]	; (8009a6c <_printf_float+0x2ec>)
 80097d4:	4638      	mov	r0, r7
 80097d6:	990b      	ldr	r1, [sp, #44]	; 0x2c
 80097d8:	f7fb f98c 	bl	8004af4 <__aeabi_dcmpun>
 80097dc:	2800      	cmp	r0, #0
 80097de:	f040 81f7 	bne.w	8009bd0 <_printf_float+0x450>
 80097e2:	f04f 32ff 	mov.w	r2, #4294967295
 80097e6:	4ba1      	ldr	r3, [pc, #644]	; (8009a6c <_printf_float+0x2ec>)
 80097e8:	4638      	mov	r0, r7
 80097ea:	990b      	ldr	r1, [sp, #44]	; 0x2c
 80097ec:	f7fb f964 	bl	8004ab8 <__aeabi_dcmple>
 80097f0:	2800      	cmp	r0, #0
 80097f2:	f040 81ed 	bne.w	8009bd0 <_printf_float+0x450>
 80097f6:	2200      	movs	r2, #0
 80097f8:	2300      	movs	r3, #0
 80097fa:	4638      	mov	r0, r7
 80097fc:	4649      	mov	r1, r9
 80097fe:	f7fb f951 	bl	8004aa4 <__aeabi_dcmplt>
 8009802:	b110      	cbz	r0, 800980a <_printf_float+0x8a>
 8009804:	232d      	movs	r3, #45	; 0x2d
 8009806:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 800980a:	4b99      	ldr	r3, [pc, #612]	; (8009a70 <_printf_float+0x2f0>)
 800980c:	4f99      	ldr	r7, [pc, #612]	; (8009a74 <_printf_float+0x2f4>)
 800980e:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 8009812:	bf98      	it	ls
 8009814:	461f      	movls	r7, r3
 8009816:	2303      	movs	r3, #3
 8009818:	f04f 0900 	mov.w	r9, #0
 800981c:	6123      	str	r3, [r4, #16]
 800981e:	f02a 0304 	bic.w	r3, sl, #4
 8009822:	6023      	str	r3, [r4, #0]
 8009824:	9600      	str	r6, [sp, #0]
 8009826:	465b      	mov	r3, fp
 8009828:	aa0f      	add	r2, sp, #60	; 0x3c
 800982a:	4621      	mov	r1, r4
 800982c:	4628      	mov	r0, r5
 800982e:	f000 f9df 	bl	8009bf0 <_printf_common>
 8009832:	3001      	adds	r0, #1
 8009834:	f040 809a 	bne.w	800996c <_printf_float+0x1ec>
 8009838:	f04f 30ff 	mov.w	r0, #4294967295
 800983c:	b011      	add	sp, #68	; 0x44
 800983e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8009842:	6862      	ldr	r2, [r4, #4]
 8009844:	a80e      	add	r0, sp, #56	; 0x38
 8009846:	1c53      	adds	r3, r2, #1
 8009848:	f10d 0e34 	add.w	lr, sp, #52	; 0x34
 800984c:	f44a 6380 	orr.w	r3, sl, #1024	; 0x400
 8009850:	d141      	bne.n	80098d6 <_printf_float+0x156>
 8009852:	2206      	movs	r2, #6
 8009854:	6062      	str	r2, [r4, #4]
 8009856:	2100      	movs	r1, #0
 8009858:	6023      	str	r3, [r4, #0]
 800985a:	9301      	str	r3, [sp, #4]
 800985c:	6863      	ldr	r3, [r4, #4]
 800985e:	f10d 0233 	add.w	r2, sp, #51	; 0x33
 8009862:	9005      	str	r0, [sp, #20]
 8009864:	9202      	str	r2, [sp, #8]
 8009866:	9300      	str	r3, [sp, #0]
 8009868:	463a      	mov	r2, r7
 800986a:	464b      	mov	r3, r9
 800986c:	9106      	str	r1, [sp, #24]
 800986e:	f8cd 8010 	str.w	r8, [sp, #16]
 8009872:	f8cd e00c 	str.w	lr, [sp, #12]
 8009876:	4628      	mov	r0, r5
 8009878:	f7ff fef1 	bl	800965e <__cvt>
 800987c:	f008 03df 	and.w	r3, r8, #223	; 0xdf
 8009880:	2b47      	cmp	r3, #71	; 0x47
 8009882:	4607      	mov	r7, r0
 8009884:	d109      	bne.n	800989a <_printf_float+0x11a>
 8009886:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009888:	1cd8      	adds	r0, r3, #3
 800988a:	db02      	blt.n	8009892 <_printf_float+0x112>
 800988c:	6862      	ldr	r2, [r4, #4]
 800988e:	4293      	cmp	r3, r2
 8009890:	dd59      	ble.n	8009946 <_printf_float+0x1c6>
 8009892:	f1a8 0802 	sub.w	r8, r8, #2
 8009896:	fa5f f888 	uxtb.w	r8, r8
 800989a:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 800989e:	990d      	ldr	r1, [sp, #52]	; 0x34
 80098a0:	d836      	bhi.n	8009910 <_printf_float+0x190>
 80098a2:	3901      	subs	r1, #1
 80098a4:	4642      	mov	r2, r8
 80098a6:	f104 0050 	add.w	r0, r4, #80	; 0x50
 80098aa:	910d      	str	r1, [sp, #52]	; 0x34
 80098ac:	f7ff ff33 	bl	8009716 <__exponent>
 80098b0:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 80098b2:	4681      	mov	r9, r0
 80098b4:	1883      	adds	r3, r0, r2
 80098b6:	2a01      	cmp	r2, #1
 80098b8:	6123      	str	r3, [r4, #16]
 80098ba:	dc02      	bgt.n	80098c2 <_printf_float+0x142>
 80098bc:	6822      	ldr	r2, [r4, #0]
 80098be:	07d1      	lsls	r1, r2, #31
 80098c0:	d501      	bpl.n	80098c6 <_printf_float+0x146>
 80098c2:	3301      	adds	r3, #1
 80098c4:	6123      	str	r3, [r4, #16]
 80098c6:	f89d 3033 	ldrb.w	r3, [sp, #51]	; 0x33
 80098ca:	2b00      	cmp	r3, #0
 80098cc:	d0aa      	beq.n	8009824 <_printf_float+0xa4>
 80098ce:	232d      	movs	r3, #45	; 0x2d
 80098d0:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 80098d4:	e7a6      	b.n	8009824 <_printf_float+0xa4>
 80098d6:	f1b8 0f67 	cmp.w	r8, #103	; 0x67
 80098da:	d002      	beq.n	80098e2 <_printf_float+0x162>
 80098dc:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
 80098e0:	d1b9      	bne.n	8009856 <_printf_float+0xd6>
 80098e2:	b19a      	cbz	r2, 800990c <_printf_float+0x18c>
 80098e4:	2100      	movs	r1, #0
 80098e6:	9106      	str	r1, [sp, #24]
 80098e8:	f10d 0133 	add.w	r1, sp, #51	; 0x33
 80098ec:	e88d 000c 	stmia.w	sp, {r2, r3}
 80098f0:	6023      	str	r3, [r4, #0]
 80098f2:	9005      	str	r0, [sp, #20]
 80098f4:	463a      	mov	r2, r7
 80098f6:	f8cd 8010 	str.w	r8, [sp, #16]
 80098fa:	f8cd e00c 	str.w	lr, [sp, #12]
 80098fe:	9102      	str	r1, [sp, #8]
 8009900:	464b      	mov	r3, r9
 8009902:	4628      	mov	r0, r5
 8009904:	f7ff feab 	bl	800965e <__cvt>
 8009908:	4607      	mov	r7, r0
 800990a:	e7bc      	b.n	8009886 <_printf_float+0x106>
 800990c:	2201      	movs	r2, #1
 800990e:	e7a1      	b.n	8009854 <_printf_float+0xd4>
 8009910:	f1b8 0f66 	cmp.w	r8, #102	; 0x66
 8009914:	d119      	bne.n	800994a <_printf_float+0x1ca>
 8009916:	2900      	cmp	r1, #0
 8009918:	6863      	ldr	r3, [r4, #4]
 800991a:	dd0c      	ble.n	8009936 <_printf_float+0x1b6>
 800991c:	6121      	str	r1, [r4, #16]
 800991e:	b913      	cbnz	r3, 8009926 <_printf_float+0x1a6>
 8009920:	6822      	ldr	r2, [r4, #0]
 8009922:	07d2      	lsls	r2, r2, #31
 8009924:	d502      	bpl.n	800992c <_printf_float+0x1ac>
 8009926:	3301      	adds	r3, #1
 8009928:	440b      	add	r3, r1
 800992a:	6123      	str	r3, [r4, #16]
 800992c:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800992e:	f04f 0900 	mov.w	r9, #0
 8009932:	65a3      	str	r3, [r4, #88]	; 0x58
 8009934:	e7c7      	b.n	80098c6 <_printf_float+0x146>
 8009936:	b913      	cbnz	r3, 800993e <_printf_float+0x1be>
 8009938:	6822      	ldr	r2, [r4, #0]
 800993a:	07d0      	lsls	r0, r2, #31
 800993c:	d501      	bpl.n	8009942 <_printf_float+0x1c2>
 800993e:	3302      	adds	r3, #2
 8009940:	e7f3      	b.n	800992a <_printf_float+0x1aa>
 8009942:	2301      	movs	r3, #1
 8009944:	e7f1      	b.n	800992a <_printf_float+0x1aa>
 8009946:	f04f 0867 	mov.w	r8, #103	; 0x67
 800994a:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800994c:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 800994e:	4293      	cmp	r3, r2
 8009950:	db05      	blt.n	800995e <_printf_float+0x1de>
 8009952:	6822      	ldr	r2, [r4, #0]
 8009954:	6123      	str	r3, [r4, #16]
 8009956:	07d1      	lsls	r1, r2, #31
 8009958:	d5e8      	bpl.n	800992c <_printf_float+0x1ac>
 800995a:	3301      	adds	r3, #1
 800995c:	e7e5      	b.n	800992a <_printf_float+0x1aa>
 800995e:	2b00      	cmp	r3, #0
 8009960:	bfcc      	ite	gt
 8009962:	2301      	movgt	r3, #1
 8009964:	f1c3 0302 	rsble	r3, r3, #2
 8009968:	4413      	add	r3, r2
 800996a:	e7de      	b.n	800992a <_printf_float+0x1aa>
 800996c:	6823      	ldr	r3, [r4, #0]
 800996e:	055a      	lsls	r2, r3, #21
 8009970:	d407      	bmi.n	8009982 <_printf_float+0x202>
 8009972:	6923      	ldr	r3, [r4, #16]
 8009974:	463a      	mov	r2, r7
 8009976:	4659      	mov	r1, fp
 8009978:	4628      	mov	r0, r5
 800997a:	47b0      	blx	r6
 800997c:	3001      	adds	r0, #1
 800997e:	d12a      	bne.n	80099d6 <_printf_float+0x256>
 8009980:	e75a      	b.n	8009838 <_printf_float+0xb8>
 8009982:	f1b8 0f65 	cmp.w	r8, #101	; 0x65
 8009986:	f240 80dc 	bls.w	8009b42 <_printf_float+0x3c2>
 800998a:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 800998e:	2200      	movs	r2, #0
 8009990:	2300      	movs	r3, #0
 8009992:	f7fb f87d 	bl	8004a90 <__aeabi_dcmpeq>
 8009996:	2800      	cmp	r0, #0
 8009998:	d039      	beq.n	8009a0e <_printf_float+0x28e>
 800999a:	2301      	movs	r3, #1
 800999c:	4a36      	ldr	r2, [pc, #216]	; (8009a78 <_printf_float+0x2f8>)
 800999e:	4659      	mov	r1, fp
 80099a0:	4628      	mov	r0, r5
 80099a2:	47b0      	blx	r6
 80099a4:	3001      	adds	r0, #1
 80099a6:	f43f af47 	beq.w	8009838 <_printf_float+0xb8>
 80099aa:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 80099ac:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 80099ae:	429a      	cmp	r2, r3
 80099b0:	db02      	blt.n	80099b8 <_printf_float+0x238>
 80099b2:	6823      	ldr	r3, [r4, #0]
 80099b4:	07d8      	lsls	r0, r3, #31
 80099b6:	d50e      	bpl.n	80099d6 <_printf_float+0x256>
 80099b8:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 80099ba:	9a09      	ldr	r2, [sp, #36]	; 0x24
 80099bc:	4659      	mov	r1, fp
 80099be:	4628      	mov	r0, r5
 80099c0:	47b0      	blx	r6
 80099c2:	3001      	adds	r0, #1
 80099c4:	f43f af38 	beq.w	8009838 <_printf_float+0xb8>
 80099c8:	2700      	movs	r7, #0
 80099ca:	f104 081a 	add.w	r8, r4, #26
 80099ce:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 80099d0:	3b01      	subs	r3, #1
 80099d2:	429f      	cmp	r7, r3
 80099d4:	db11      	blt.n	80099fa <_printf_float+0x27a>
 80099d6:	6823      	ldr	r3, [r4, #0]
 80099d8:	079f      	lsls	r7, r3, #30
 80099da:	d508      	bpl.n	80099ee <_printf_float+0x26e>
 80099dc:	2700      	movs	r7, #0
 80099de:	f104 0819 	add.w	r8, r4, #25
 80099e2:	68e3      	ldr	r3, [r4, #12]
 80099e4:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
 80099e6:	1a9b      	subs	r3, r3, r2
 80099e8:	429f      	cmp	r7, r3
 80099ea:	f2c0 80e7 	blt.w	8009bbc <_printf_float+0x43c>
 80099ee:	68e0      	ldr	r0, [r4, #12]
 80099f0:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
 80099f2:	4298      	cmp	r0, r3
 80099f4:	bfb8      	it	lt
 80099f6:	4618      	movlt	r0, r3
 80099f8:	e720      	b.n	800983c <_printf_float+0xbc>
 80099fa:	2301      	movs	r3, #1
 80099fc:	4642      	mov	r2, r8
 80099fe:	4659      	mov	r1, fp
 8009a00:	4628      	mov	r0, r5
 8009a02:	47b0      	blx	r6
 8009a04:	3001      	adds	r0, #1
 8009a06:	f43f af17 	beq.w	8009838 <_printf_float+0xb8>
 8009a0a:	3701      	adds	r7, #1
 8009a0c:	e7df      	b.n	80099ce <_printf_float+0x24e>
 8009a0e:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009a10:	2b00      	cmp	r3, #0
 8009a12:	dc33      	bgt.n	8009a7c <_printf_float+0x2fc>
 8009a14:	2301      	movs	r3, #1
 8009a16:	4a18      	ldr	r2, [pc, #96]	; (8009a78 <_printf_float+0x2f8>)
 8009a18:	4659      	mov	r1, fp
 8009a1a:	4628      	mov	r0, r5
 8009a1c:	47b0      	blx	r6
 8009a1e:	3001      	adds	r0, #1
 8009a20:	f43f af0a 	beq.w	8009838 <_printf_float+0xb8>
 8009a24:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009a26:	b923      	cbnz	r3, 8009a32 <_printf_float+0x2b2>
 8009a28:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009a2a:	b913      	cbnz	r3, 8009a32 <_printf_float+0x2b2>
 8009a2c:	6823      	ldr	r3, [r4, #0]
 8009a2e:	07d9      	lsls	r1, r3, #31
 8009a30:	d5d1      	bpl.n	80099d6 <_printf_float+0x256>
 8009a32:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8009a34:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009a36:	4659      	mov	r1, fp
 8009a38:	4628      	mov	r0, r5
 8009a3a:	47b0      	blx	r6
 8009a3c:	3001      	adds	r0, #1
 8009a3e:	f43f aefb 	beq.w	8009838 <_printf_float+0xb8>
 8009a42:	f04f 0800 	mov.w	r8, #0
 8009a46:	f104 091a 	add.w	r9, r4, #26
 8009a4a:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 8009a4c:	425b      	negs	r3, r3
 8009a4e:	4598      	cmp	r8, r3
 8009a50:	db01      	blt.n	8009a56 <_printf_float+0x2d6>
 8009a52:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009a54:	e78e      	b.n	8009974 <_printf_float+0x1f4>
 8009a56:	2301      	movs	r3, #1
 8009a58:	464a      	mov	r2, r9
 8009a5a:	4659      	mov	r1, fp
 8009a5c:	4628      	mov	r0, r5
 8009a5e:	47b0      	blx	r6
 8009a60:	3001      	adds	r0, #1
 8009a62:	f43f aee9 	beq.w	8009838 <_printf_float+0xb8>
 8009a66:	f108 0801 	add.w	r8, r8, #1
 8009a6a:	e7ee      	b.n	8009a4a <_printf_float+0x2ca>
 8009a6c:	7fefffff 	.word	0x7fefffff
 8009a70:	0800bfa8 	.word	0x0800bfa8
 8009a74:	0800bfac 	.word	0x0800bfac
 8009a78:	0800bfb8 	.word	0x0800bfb8
 8009a7c:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8009a7e:	6da3      	ldr	r3, [r4, #88]	; 0x58
 8009a80:	429a      	cmp	r2, r3
 8009a82:	bfa8      	it	ge
 8009a84:	461a      	movge	r2, r3
 8009a86:	2a00      	cmp	r2, #0
 8009a88:	4690      	mov	r8, r2
 8009a8a:	dc36      	bgt.n	8009afa <_printf_float+0x37a>
 8009a8c:	f04f 0a00 	mov.w	sl, #0
 8009a90:	f104 031a 	add.w	r3, r4, #26
 8009a94:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 8009a98:	930b      	str	r3, [sp, #44]	; 0x2c
 8009a9a:	f8d4 9058 	ldr.w	r9, [r4, #88]	; 0x58
 8009a9e:	eba9 0308 	sub.w	r3, r9, r8
 8009aa2:	459a      	cmp	sl, r3
 8009aa4:	db31      	blt.n	8009b0a <_printf_float+0x38a>
 8009aa6:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009aa8:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8009aaa:	429a      	cmp	r2, r3
 8009aac:	db38      	blt.n	8009b20 <_printf_float+0x3a0>
 8009aae:	6823      	ldr	r3, [r4, #0]
 8009ab0:	07da      	lsls	r2, r3, #31
 8009ab2:	d435      	bmi.n	8009b20 <_printf_float+0x3a0>
 8009ab4:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009ab6:	990d      	ldr	r1, [sp, #52]	; 0x34
 8009ab8:	eba3 0209 	sub.w	r2, r3, r9
 8009abc:	eba3 0801 	sub.w	r8, r3, r1
 8009ac0:	4590      	cmp	r8, r2
 8009ac2:	bfa8      	it	ge
 8009ac4:	4690      	movge	r8, r2
 8009ac6:	f1b8 0f00 	cmp.w	r8, #0
 8009aca:	dc31      	bgt.n	8009b30 <_printf_float+0x3b0>
 8009acc:	2700      	movs	r7, #0
 8009ace:	ea28 78e8 	bic.w	r8, r8, r8, asr #31
 8009ad2:	f104 091a 	add.w	r9, r4, #26
 8009ad6:	9a0d      	ldr	r2, [sp, #52]	; 0x34
 8009ad8:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009ada:	1a9b      	subs	r3, r3, r2
 8009adc:	eba3 0308 	sub.w	r3, r3, r8
 8009ae0:	429f      	cmp	r7, r3
 8009ae2:	f6bf af78 	bge.w	80099d6 <_printf_float+0x256>
 8009ae6:	2301      	movs	r3, #1
 8009ae8:	464a      	mov	r2, r9
 8009aea:	4659      	mov	r1, fp
 8009aec:	4628      	mov	r0, r5
 8009aee:	47b0      	blx	r6
 8009af0:	3001      	adds	r0, #1
 8009af2:	f43f aea1 	beq.w	8009838 <_printf_float+0xb8>
 8009af6:	3701      	adds	r7, #1
 8009af8:	e7ed      	b.n	8009ad6 <_printf_float+0x356>
 8009afa:	4613      	mov	r3, r2
 8009afc:	4659      	mov	r1, fp
 8009afe:	463a      	mov	r2, r7
 8009b00:	4628      	mov	r0, r5
 8009b02:	47b0      	blx	r6
 8009b04:	3001      	adds	r0, #1
 8009b06:	d1c1      	bne.n	8009a8c <_printf_float+0x30c>
 8009b08:	e696      	b.n	8009838 <_printf_float+0xb8>
 8009b0a:	2301      	movs	r3, #1
 8009b0c:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
 8009b0e:	4659      	mov	r1, fp
 8009b10:	4628      	mov	r0, r5
 8009b12:	47b0      	blx	r6
 8009b14:	3001      	adds	r0, #1
 8009b16:	f43f ae8f 	beq.w	8009838 <_printf_float+0xb8>
 8009b1a:	f10a 0a01 	add.w	sl, sl, #1
 8009b1e:	e7bc      	b.n	8009a9a <_printf_float+0x31a>
 8009b20:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8009b22:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009b24:	4659      	mov	r1, fp
 8009b26:	4628      	mov	r0, r5
 8009b28:	47b0      	blx	r6
 8009b2a:	3001      	adds	r0, #1
 8009b2c:	d1c2      	bne.n	8009ab4 <_printf_float+0x334>
 8009b2e:	e683      	b.n	8009838 <_printf_float+0xb8>
 8009b30:	4643      	mov	r3, r8
 8009b32:	eb07 0209 	add.w	r2, r7, r9
 8009b36:	4659      	mov	r1, fp
 8009b38:	4628      	mov	r0, r5
 8009b3a:	47b0      	blx	r6
 8009b3c:	3001      	adds	r0, #1
 8009b3e:	d1c5      	bne.n	8009acc <_printf_float+0x34c>
 8009b40:	e67a      	b.n	8009838 <_printf_float+0xb8>
 8009b42:	9a0e      	ldr	r2, [sp, #56]	; 0x38
 8009b44:	2a01      	cmp	r2, #1
 8009b46:	dc01      	bgt.n	8009b4c <_printf_float+0x3cc>
 8009b48:	07db      	lsls	r3, r3, #31
 8009b4a:	d534      	bpl.n	8009bb6 <_printf_float+0x436>
 8009b4c:	2301      	movs	r3, #1
 8009b4e:	463a      	mov	r2, r7
 8009b50:	4659      	mov	r1, fp
 8009b52:	4628      	mov	r0, r5
 8009b54:	47b0      	blx	r6
 8009b56:	3001      	adds	r0, #1
 8009b58:	f43f ae6e 	beq.w	8009838 <_printf_float+0xb8>
 8009b5c:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 8009b5e:	9a09      	ldr	r2, [sp, #36]	; 0x24
 8009b60:	4659      	mov	r1, fp
 8009b62:	4628      	mov	r0, r5
 8009b64:	47b0      	blx	r6
 8009b66:	3001      	adds	r0, #1
 8009b68:	f43f ae66 	beq.w	8009838 <_printf_float+0xb8>
 8009b6c:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
 8009b70:	2200      	movs	r2, #0
 8009b72:	2300      	movs	r3, #0
 8009b74:	f7fa ff8c 	bl	8004a90 <__aeabi_dcmpeq>
 8009b78:	b150      	cbz	r0, 8009b90 <_printf_float+0x410>
 8009b7a:	2700      	movs	r7, #0
 8009b7c:	f104 081a 	add.w	r8, r4, #26
 8009b80:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009b82:	3b01      	subs	r3, #1
 8009b84:	429f      	cmp	r7, r3
 8009b86:	db0c      	blt.n	8009ba2 <_printf_float+0x422>
 8009b88:	464b      	mov	r3, r9
 8009b8a:	f104 0250 	add.w	r2, r4, #80	; 0x50
 8009b8e:	e6f2      	b.n	8009976 <_printf_float+0x1f6>
 8009b90:	9b0e      	ldr	r3, [sp, #56]	; 0x38
 8009b92:	1c7a      	adds	r2, r7, #1
 8009b94:	3b01      	subs	r3, #1
 8009b96:	4659      	mov	r1, fp
 8009b98:	4628      	mov	r0, r5
 8009b9a:	47b0      	blx	r6
 8009b9c:	3001      	adds	r0, #1
 8009b9e:	d1f3      	bne.n	8009b88 <_printf_float+0x408>
 8009ba0:	e64a      	b.n	8009838 <_printf_float+0xb8>
 8009ba2:	2301      	movs	r3, #1
 8009ba4:	4642      	mov	r2, r8
 8009ba6:	4659      	mov	r1, fp
 8009ba8:	4628      	mov	r0, r5
 8009baa:	47b0      	blx	r6
 8009bac:	3001      	adds	r0, #1
 8009bae:	f43f ae43 	beq.w	8009838 <_printf_float+0xb8>
 8009bb2:	3701      	adds	r7, #1
 8009bb4:	e7e4      	b.n	8009b80 <_printf_float+0x400>
 8009bb6:	2301      	movs	r3, #1
 8009bb8:	463a      	mov	r2, r7
 8009bba:	e7ec      	b.n	8009b96 <_printf_float+0x416>
 8009bbc:	2301      	movs	r3, #1
 8009bbe:	4642      	mov	r2, r8
 8009bc0:	4659      	mov	r1, fp
 8009bc2:	4628      	mov	r0, r5
 8009bc4:	47b0      	blx	r6
 8009bc6:	3001      	adds	r0, #1
 8009bc8:	f43f ae36 	beq.w	8009838 <_printf_float+0xb8>
 8009bcc:	3701      	adds	r7, #1
 8009bce:	e708      	b.n	80099e2 <_printf_float+0x262>
 8009bd0:	463a      	mov	r2, r7
 8009bd2:	464b      	mov	r3, r9
 8009bd4:	4638      	mov	r0, r7
 8009bd6:	4649      	mov	r1, r9
 8009bd8:	f7fa ff8c 	bl	8004af4 <__aeabi_dcmpun>
 8009bdc:	2800      	cmp	r0, #0
 8009bde:	f43f ae30 	beq.w	8009842 <_printf_float+0xc2>
 8009be2:	4b01      	ldr	r3, [pc, #4]	; (8009be8 <_printf_float+0x468>)
 8009be4:	4f01      	ldr	r7, [pc, #4]	; (8009bec <_printf_float+0x46c>)
 8009be6:	e612      	b.n	800980e <_printf_float+0x8e>
 8009be8:	0800bfb0 	.word	0x0800bfb0
 8009bec:	0800bfb4 	.word	0x0800bfb4

08009bf0 <_printf_common>:
 8009bf0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8009bf4:	4691      	mov	r9, r2
 8009bf6:	461f      	mov	r7, r3
 8009bf8:	688a      	ldr	r2, [r1, #8]
 8009bfa:	690b      	ldr	r3, [r1, #16]
 8009bfc:	4606      	mov	r6, r0
 8009bfe:	4293      	cmp	r3, r2
 8009c00:	bfb8      	it	lt
 8009c02:	4613      	movlt	r3, r2
 8009c04:	f8c9 3000 	str.w	r3, [r9]
 8009c08:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 8009c0c:	460c      	mov	r4, r1
 8009c0e:	f8dd 8020 	ldr.w	r8, [sp, #32]
 8009c12:	b112      	cbz	r2, 8009c1a <_printf_common+0x2a>
 8009c14:	3301      	adds	r3, #1
 8009c16:	f8c9 3000 	str.w	r3, [r9]
 8009c1a:	6823      	ldr	r3, [r4, #0]
 8009c1c:	0699      	lsls	r1, r3, #26
 8009c1e:	bf42      	ittt	mi
 8009c20:	f8d9 3000 	ldrmi.w	r3, [r9]
 8009c24:	3302      	addmi	r3, #2
 8009c26:	f8c9 3000 	strmi.w	r3, [r9]
 8009c2a:	6825      	ldr	r5, [r4, #0]
 8009c2c:	f015 0506 	ands.w	r5, r5, #6
 8009c30:	d107      	bne.n	8009c42 <_printf_common+0x52>
 8009c32:	f104 0a19 	add.w	sl, r4, #25
 8009c36:	68e3      	ldr	r3, [r4, #12]
 8009c38:	f8d9 2000 	ldr.w	r2, [r9]
 8009c3c:	1a9b      	subs	r3, r3, r2
 8009c3e:	429d      	cmp	r5, r3
 8009c40:	db2a      	blt.n	8009c98 <_printf_common+0xa8>
 8009c42:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 8009c46:	6822      	ldr	r2, [r4, #0]
 8009c48:	3300      	adds	r3, #0
 8009c4a:	bf18      	it	ne
 8009c4c:	2301      	movne	r3, #1
 8009c4e:	0692      	lsls	r2, r2, #26
 8009c50:	d42f      	bmi.n	8009cb2 <_printf_common+0xc2>
 8009c52:	f104 0243 	add.w	r2, r4, #67	; 0x43
 8009c56:	4639      	mov	r1, r7
 8009c58:	4630      	mov	r0, r6
 8009c5a:	47c0      	blx	r8
 8009c5c:	3001      	adds	r0, #1
 8009c5e:	d022      	beq.n	8009ca6 <_printf_common+0xb6>
 8009c60:	6823      	ldr	r3, [r4, #0]
 8009c62:	68e5      	ldr	r5, [r4, #12]
 8009c64:	f003 0306 	and.w	r3, r3, #6
 8009c68:	2b04      	cmp	r3, #4
 8009c6a:	bf18      	it	ne
 8009c6c:	2500      	movne	r5, #0
 8009c6e:	f8d9 2000 	ldr.w	r2, [r9]
 8009c72:	f04f 0900 	mov.w	r9, #0
 8009c76:	bf08      	it	eq
 8009c78:	1aad      	subeq	r5, r5, r2
 8009c7a:	68a3      	ldr	r3, [r4, #8]
 8009c7c:	6922      	ldr	r2, [r4, #16]
 8009c7e:	bf08      	it	eq
 8009c80:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8009c84:	4293      	cmp	r3, r2
 8009c86:	bfc4      	itt	gt
 8009c88:	1a9b      	subgt	r3, r3, r2
 8009c8a:	18ed      	addgt	r5, r5, r3
 8009c8c:	341a      	adds	r4, #26
 8009c8e:	454d      	cmp	r5, r9
 8009c90:	d11b      	bne.n	8009cca <_printf_common+0xda>
 8009c92:	2000      	movs	r0, #0
 8009c94:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8009c98:	2301      	movs	r3, #1
 8009c9a:	4652      	mov	r2, sl
 8009c9c:	4639      	mov	r1, r7
 8009c9e:	4630      	mov	r0, r6
 8009ca0:	47c0      	blx	r8
 8009ca2:	3001      	adds	r0, #1
 8009ca4:	d103      	bne.n	8009cae <_printf_common+0xbe>
 8009ca6:	f04f 30ff 	mov.w	r0, #4294967295
 8009caa:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8009cae:	3501      	adds	r5, #1
 8009cb0:	e7c1      	b.n	8009c36 <_printf_common+0x46>
 8009cb2:	2030      	movs	r0, #48	; 0x30
 8009cb4:	18e1      	adds	r1, r4, r3
 8009cb6:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 8009cba:	1c5a      	adds	r2, r3, #1
 8009cbc:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 8009cc0:	4422      	add	r2, r4
 8009cc2:	3302      	adds	r3, #2
 8009cc4:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 8009cc8:	e7c3      	b.n	8009c52 <_printf_common+0x62>
 8009cca:	2301      	movs	r3, #1
 8009ccc:	4622      	mov	r2, r4
 8009cce:	4639      	mov	r1, r7
 8009cd0:	4630      	mov	r0, r6
 8009cd2:	47c0      	blx	r8
 8009cd4:	3001      	adds	r0, #1
 8009cd6:	d0e6      	beq.n	8009ca6 <_printf_common+0xb6>
 8009cd8:	f109 0901 	add.w	r9, r9, #1
 8009cdc:	e7d7      	b.n	8009c8e <_printf_common+0x9e>
	...

08009ce0 <_printf_i>:
 8009ce0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 8009ce4:	4617      	mov	r7, r2
 8009ce6:	7e0a      	ldrb	r2, [r1, #24]
 8009ce8:	b085      	sub	sp, #20
 8009cea:	2a6e      	cmp	r2, #110	; 0x6e
 8009cec:	4698      	mov	r8, r3
 8009cee:	4606      	mov	r6, r0
 8009cf0:	460c      	mov	r4, r1
 8009cf2:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 8009cf4:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 8009cf8:	f000 80bc 	beq.w	8009e74 <_printf_i+0x194>
 8009cfc:	d81a      	bhi.n	8009d34 <_printf_i+0x54>
 8009cfe:	2a63      	cmp	r2, #99	; 0x63
 8009d00:	d02e      	beq.n	8009d60 <_printf_i+0x80>
 8009d02:	d80a      	bhi.n	8009d1a <_printf_i+0x3a>
 8009d04:	2a00      	cmp	r2, #0
 8009d06:	f000 80c8 	beq.w	8009e9a <_printf_i+0x1ba>
 8009d0a:	2a58      	cmp	r2, #88	; 0x58
 8009d0c:	f000 808a 	beq.w	8009e24 <_printf_i+0x144>
 8009d10:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8009d14:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 8009d18:	e02a      	b.n	8009d70 <_printf_i+0x90>
 8009d1a:	2a64      	cmp	r2, #100	; 0x64
 8009d1c:	d001      	beq.n	8009d22 <_printf_i+0x42>
 8009d1e:	2a69      	cmp	r2, #105	; 0x69
 8009d20:	d1f6      	bne.n	8009d10 <_printf_i+0x30>
 8009d22:	6821      	ldr	r1, [r4, #0]
 8009d24:	681a      	ldr	r2, [r3, #0]
 8009d26:	f011 0f80 	tst.w	r1, #128	; 0x80
 8009d2a:	d023      	beq.n	8009d74 <_printf_i+0x94>
 8009d2c:	1d11      	adds	r1, r2, #4
 8009d2e:	6019      	str	r1, [r3, #0]
 8009d30:	6813      	ldr	r3, [r2, #0]
 8009d32:	e027      	b.n	8009d84 <_printf_i+0xa4>
 8009d34:	2a73      	cmp	r2, #115	; 0x73
 8009d36:	f000 80b4 	beq.w	8009ea2 <_printf_i+0x1c2>
 8009d3a:	d808      	bhi.n	8009d4e <_printf_i+0x6e>
 8009d3c:	2a6f      	cmp	r2, #111	; 0x6f
 8009d3e:	d02a      	beq.n	8009d96 <_printf_i+0xb6>
 8009d40:	2a70      	cmp	r2, #112	; 0x70
 8009d42:	d1e5      	bne.n	8009d10 <_printf_i+0x30>
 8009d44:	680a      	ldr	r2, [r1, #0]
 8009d46:	f042 0220 	orr.w	r2, r2, #32
 8009d4a:	600a      	str	r2, [r1, #0]
 8009d4c:	e003      	b.n	8009d56 <_printf_i+0x76>
 8009d4e:	2a75      	cmp	r2, #117	; 0x75
 8009d50:	d021      	beq.n	8009d96 <_printf_i+0xb6>
 8009d52:	2a78      	cmp	r2, #120	; 0x78
 8009d54:	d1dc      	bne.n	8009d10 <_printf_i+0x30>
 8009d56:	2278      	movs	r2, #120	; 0x78
 8009d58:	496f      	ldr	r1, [pc, #444]	; (8009f18 <_printf_i+0x238>)
 8009d5a:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8009d5e:	e064      	b.n	8009e2a <_printf_i+0x14a>
 8009d60:	681a      	ldr	r2, [r3, #0]
 8009d62:	f101 0542 	add.w	r5, r1, #66	; 0x42
 8009d66:	1d11      	adds	r1, r2, #4
 8009d68:	6019      	str	r1, [r3, #0]
 8009d6a:	6813      	ldr	r3, [r2, #0]
 8009d6c:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8009d70:	2301      	movs	r3, #1
 8009d72:	e0a3      	b.n	8009ebc <_printf_i+0x1dc>
 8009d74:	f011 0f40 	tst.w	r1, #64	; 0x40
 8009d78:	f102 0104 	add.w	r1, r2, #4
 8009d7c:	6019      	str	r1, [r3, #0]
 8009d7e:	d0d7      	beq.n	8009d30 <_printf_i+0x50>
 8009d80:	f9b2 3000 	ldrsh.w	r3, [r2]
 8009d84:	2b00      	cmp	r3, #0
 8009d86:	da03      	bge.n	8009d90 <_printf_i+0xb0>
 8009d88:	222d      	movs	r2, #45	; 0x2d
 8009d8a:	425b      	negs	r3, r3
 8009d8c:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8009d90:	4962      	ldr	r1, [pc, #392]	; (8009f1c <_printf_i+0x23c>)
 8009d92:	220a      	movs	r2, #10
 8009d94:	e017      	b.n	8009dc6 <_printf_i+0xe6>
 8009d96:	6820      	ldr	r0, [r4, #0]
 8009d98:	6819      	ldr	r1, [r3, #0]
 8009d9a:	f010 0f80 	tst.w	r0, #128	; 0x80
 8009d9e:	d003      	beq.n	8009da8 <_printf_i+0xc8>
 8009da0:	1d08      	adds	r0, r1, #4
 8009da2:	6018      	str	r0, [r3, #0]
 8009da4:	680b      	ldr	r3, [r1, #0]
 8009da6:	e006      	b.n	8009db6 <_printf_i+0xd6>
 8009da8:	f010 0f40 	tst.w	r0, #64	; 0x40
 8009dac:	f101 0004 	add.w	r0, r1, #4
 8009db0:	6018      	str	r0, [r3, #0]
 8009db2:	d0f7      	beq.n	8009da4 <_printf_i+0xc4>
 8009db4:	880b      	ldrh	r3, [r1, #0]
 8009db6:	2a6f      	cmp	r2, #111	; 0x6f
 8009db8:	bf14      	ite	ne
 8009dba:	220a      	movne	r2, #10
 8009dbc:	2208      	moveq	r2, #8
 8009dbe:	4957      	ldr	r1, [pc, #348]	; (8009f1c <_printf_i+0x23c>)
 8009dc0:	2000      	movs	r0, #0
 8009dc2:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 8009dc6:	6865      	ldr	r5, [r4, #4]
 8009dc8:	2d00      	cmp	r5, #0
 8009dca:	60a5      	str	r5, [r4, #8]
 8009dcc:	f2c0 809c 	blt.w	8009f08 <_printf_i+0x228>
 8009dd0:	6820      	ldr	r0, [r4, #0]
 8009dd2:	f020 0004 	bic.w	r0, r0, #4
 8009dd6:	6020      	str	r0, [r4, #0]
 8009dd8:	2b00      	cmp	r3, #0
 8009dda:	d13f      	bne.n	8009e5c <_printf_i+0x17c>
 8009ddc:	2d00      	cmp	r5, #0
 8009dde:	f040 8095 	bne.w	8009f0c <_printf_i+0x22c>
 8009de2:	4675      	mov	r5, lr
 8009de4:	2a08      	cmp	r2, #8
 8009de6:	d10b      	bne.n	8009e00 <_printf_i+0x120>
 8009de8:	6823      	ldr	r3, [r4, #0]
 8009dea:	07da      	lsls	r2, r3, #31
 8009dec:	d508      	bpl.n	8009e00 <_printf_i+0x120>
 8009dee:	6923      	ldr	r3, [r4, #16]
 8009df0:	6862      	ldr	r2, [r4, #4]
 8009df2:	429a      	cmp	r2, r3
 8009df4:	bfde      	ittt	le
 8009df6:	2330      	movle	r3, #48	; 0x30
 8009df8:	f805 3c01 	strble.w	r3, [r5, #-1]
 8009dfc:	f105 35ff 	addle.w	r5, r5, #4294967295
 8009e00:	ebae 0305 	sub.w	r3, lr, r5
 8009e04:	6123      	str	r3, [r4, #16]
 8009e06:	f8cd 8000 	str.w	r8, [sp]
 8009e0a:	463b      	mov	r3, r7
 8009e0c:	aa03      	add	r2, sp, #12
 8009e0e:	4621      	mov	r1, r4
 8009e10:	4630      	mov	r0, r6
 8009e12:	f7ff feed 	bl	8009bf0 <_printf_common>
 8009e16:	3001      	adds	r0, #1
 8009e18:	d155      	bne.n	8009ec6 <_printf_i+0x1e6>
 8009e1a:	f04f 30ff 	mov.w	r0, #4294967295
 8009e1e:	b005      	add	sp, #20
 8009e20:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8009e24:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8009e28:	493c      	ldr	r1, [pc, #240]	; (8009f1c <_printf_i+0x23c>)
 8009e2a:	6822      	ldr	r2, [r4, #0]
 8009e2c:	6818      	ldr	r0, [r3, #0]
 8009e2e:	f012 0f80 	tst.w	r2, #128	; 0x80
 8009e32:	f100 0504 	add.w	r5, r0, #4
 8009e36:	601d      	str	r5, [r3, #0]
 8009e38:	d001      	beq.n	8009e3e <_printf_i+0x15e>
 8009e3a:	6803      	ldr	r3, [r0, #0]
 8009e3c:	e002      	b.n	8009e44 <_printf_i+0x164>
 8009e3e:	0655      	lsls	r5, r2, #25
 8009e40:	d5fb      	bpl.n	8009e3a <_printf_i+0x15a>
 8009e42:	8803      	ldrh	r3, [r0, #0]
 8009e44:	07d0      	lsls	r0, r2, #31
 8009e46:	bf44      	itt	mi
 8009e48:	f042 0220 	orrmi.w	r2, r2, #32
 8009e4c:	6022      	strmi	r2, [r4, #0]
 8009e4e:	b91b      	cbnz	r3, 8009e58 <_printf_i+0x178>
 8009e50:	6822      	ldr	r2, [r4, #0]
 8009e52:	f022 0220 	bic.w	r2, r2, #32
 8009e56:	6022      	str	r2, [r4, #0]
 8009e58:	2210      	movs	r2, #16
 8009e5a:	e7b1      	b.n	8009dc0 <_printf_i+0xe0>
 8009e5c:	4675      	mov	r5, lr
 8009e5e:	fbb3 f0f2 	udiv	r0, r3, r2
 8009e62:	fb02 3310 	mls	r3, r2, r0, r3
 8009e66:	5ccb      	ldrb	r3, [r1, r3]
 8009e68:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8009e6c:	4603      	mov	r3, r0
 8009e6e:	2800      	cmp	r0, #0
 8009e70:	d1f5      	bne.n	8009e5e <_printf_i+0x17e>
 8009e72:	e7b7      	b.n	8009de4 <_printf_i+0x104>
 8009e74:	6808      	ldr	r0, [r1, #0]
 8009e76:	681a      	ldr	r2, [r3, #0]
 8009e78:	f010 0f80 	tst.w	r0, #128	; 0x80
 8009e7c:	6949      	ldr	r1, [r1, #20]
 8009e7e:	d004      	beq.n	8009e8a <_printf_i+0x1aa>
 8009e80:	1d10      	adds	r0, r2, #4
 8009e82:	6018      	str	r0, [r3, #0]
 8009e84:	6813      	ldr	r3, [r2, #0]
 8009e86:	6019      	str	r1, [r3, #0]
 8009e88:	e007      	b.n	8009e9a <_printf_i+0x1ba>
 8009e8a:	f010 0f40 	tst.w	r0, #64	; 0x40
 8009e8e:	f102 0004 	add.w	r0, r2, #4
 8009e92:	6018      	str	r0, [r3, #0]
 8009e94:	6813      	ldr	r3, [r2, #0]
 8009e96:	d0f6      	beq.n	8009e86 <_printf_i+0x1a6>
 8009e98:	8019      	strh	r1, [r3, #0]
 8009e9a:	2300      	movs	r3, #0
 8009e9c:	4675      	mov	r5, lr
 8009e9e:	6123      	str	r3, [r4, #16]
 8009ea0:	e7b1      	b.n	8009e06 <_printf_i+0x126>
 8009ea2:	681a      	ldr	r2, [r3, #0]
 8009ea4:	1d11      	adds	r1, r2, #4
 8009ea6:	6019      	str	r1, [r3, #0]
 8009ea8:	6815      	ldr	r5, [r2, #0]
 8009eaa:	2100      	movs	r1, #0
 8009eac:	6862      	ldr	r2, [r4, #4]
 8009eae:	4628      	mov	r0, r5
 8009eb0:	f001 fa80 	bl	800b3b4 <memchr>
 8009eb4:	b108      	cbz	r0, 8009eba <_printf_i+0x1da>
 8009eb6:	1b40      	subs	r0, r0, r5
 8009eb8:	6060      	str	r0, [r4, #4]
 8009eba:	6863      	ldr	r3, [r4, #4]
 8009ebc:	6123      	str	r3, [r4, #16]
 8009ebe:	2300      	movs	r3, #0
 8009ec0:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8009ec4:	e79f      	b.n	8009e06 <_printf_i+0x126>
 8009ec6:	6923      	ldr	r3, [r4, #16]
 8009ec8:	462a      	mov	r2, r5
 8009eca:	4639      	mov	r1, r7
 8009ecc:	4630      	mov	r0, r6
 8009ece:	47c0      	blx	r8
 8009ed0:	3001      	adds	r0, #1
 8009ed2:	d0a2      	beq.n	8009e1a <_printf_i+0x13a>
 8009ed4:	6823      	ldr	r3, [r4, #0]
 8009ed6:	079b      	lsls	r3, r3, #30
 8009ed8:	d507      	bpl.n	8009eea <_printf_i+0x20a>
 8009eda:	2500      	movs	r5, #0
 8009edc:	f104 0919 	add.w	r9, r4, #25
 8009ee0:	68e3      	ldr	r3, [r4, #12]
 8009ee2:	9a03      	ldr	r2, [sp, #12]
 8009ee4:	1a9b      	subs	r3, r3, r2
 8009ee6:	429d      	cmp	r5, r3
 8009ee8:	db05      	blt.n	8009ef6 <_printf_i+0x216>
 8009eea:	68e0      	ldr	r0, [r4, #12]
 8009eec:	9b03      	ldr	r3, [sp, #12]
 8009eee:	4298      	cmp	r0, r3
 8009ef0:	bfb8      	it	lt
 8009ef2:	4618      	movlt	r0, r3
 8009ef4:	e793      	b.n	8009e1e <_printf_i+0x13e>
 8009ef6:	2301      	movs	r3, #1
 8009ef8:	464a      	mov	r2, r9
 8009efa:	4639      	mov	r1, r7
 8009efc:	4630      	mov	r0, r6
 8009efe:	47c0      	blx	r8
 8009f00:	3001      	adds	r0, #1
 8009f02:	d08a      	beq.n	8009e1a <_printf_i+0x13a>
 8009f04:	3501      	adds	r5, #1
 8009f06:	e7eb      	b.n	8009ee0 <_printf_i+0x200>
 8009f08:	2b00      	cmp	r3, #0
 8009f0a:	d1a7      	bne.n	8009e5c <_printf_i+0x17c>
 8009f0c:	780b      	ldrb	r3, [r1, #0]
 8009f0e:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8009f12:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8009f16:	e765      	b.n	8009de4 <_printf_i+0x104>
 8009f18:	0800bfcb 	.word	0x0800bfcb
 8009f1c:	0800bfba 	.word	0x0800bfba

08009f20 <iprintf>:
 8009f20:	b40f      	push	{r0, r1, r2, r3}
 8009f22:	4b0a      	ldr	r3, [pc, #40]	; (8009f4c <iprintf+0x2c>)
 8009f24:	b513      	push	{r0, r1, r4, lr}
 8009f26:	681c      	ldr	r4, [r3, #0]
 8009f28:	b124      	cbz	r4, 8009f34 <iprintf+0x14>
 8009f2a:	69a3      	ldr	r3, [r4, #24]
 8009f2c:	b913      	cbnz	r3, 8009f34 <iprintf+0x14>
 8009f2e:	4620      	mov	r0, r4
 8009f30:	f001 f93c 	bl	800b1ac <__sinit>
 8009f34:	ab05      	add	r3, sp, #20
 8009f36:	9a04      	ldr	r2, [sp, #16]
 8009f38:	68a1      	ldr	r1, [r4, #8]
 8009f3a:	4620      	mov	r0, r4
 8009f3c:	9301      	str	r3, [sp, #4]
 8009f3e:	f001 fdf9 	bl	800bb34 <_vfiprintf_r>
 8009f42:	b002      	add	sp, #8
 8009f44:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8009f48:	b004      	add	sp, #16
 8009f4a:	4770      	bx	lr
 8009f4c:	2000024c 	.word	0x2000024c

08009f50 <_puts_r>:
 8009f50:	b570      	push	{r4, r5, r6, lr}
 8009f52:	460e      	mov	r6, r1
 8009f54:	4605      	mov	r5, r0
 8009f56:	b118      	cbz	r0, 8009f60 <_puts_r+0x10>
 8009f58:	6983      	ldr	r3, [r0, #24]
 8009f5a:	b90b      	cbnz	r3, 8009f60 <_puts_r+0x10>
 8009f5c:	f001 f926 	bl	800b1ac <__sinit>
 8009f60:	69ab      	ldr	r3, [r5, #24]
 8009f62:	68ac      	ldr	r4, [r5, #8]
 8009f64:	b913      	cbnz	r3, 8009f6c <_puts_r+0x1c>
 8009f66:	4628      	mov	r0, r5
 8009f68:	f001 f920 	bl	800b1ac <__sinit>
 8009f6c:	4b23      	ldr	r3, [pc, #140]	; (8009ffc <_puts_r+0xac>)
 8009f6e:	429c      	cmp	r4, r3
 8009f70:	d117      	bne.n	8009fa2 <_puts_r+0x52>
 8009f72:	686c      	ldr	r4, [r5, #4]
 8009f74:	89a3      	ldrh	r3, [r4, #12]
 8009f76:	071b      	lsls	r3, r3, #28
 8009f78:	d51d      	bpl.n	8009fb6 <_puts_r+0x66>
 8009f7a:	6923      	ldr	r3, [r4, #16]
 8009f7c:	b1db      	cbz	r3, 8009fb6 <_puts_r+0x66>
 8009f7e:	3e01      	subs	r6, #1
 8009f80:	68a3      	ldr	r3, [r4, #8]
 8009f82:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8009f86:	3b01      	subs	r3, #1
 8009f88:	60a3      	str	r3, [r4, #8]
 8009f8a:	b9e9      	cbnz	r1, 8009fc8 <_puts_r+0x78>
 8009f8c:	2b00      	cmp	r3, #0
 8009f8e:	da2e      	bge.n	8009fee <_puts_r+0x9e>
 8009f90:	4622      	mov	r2, r4
 8009f92:	210a      	movs	r1, #10
 8009f94:	4628      	mov	r0, r5
 8009f96:	f000 f8f5 	bl	800a184 <__swbuf_r>
 8009f9a:	3001      	adds	r0, #1
 8009f9c:	d011      	beq.n	8009fc2 <_puts_r+0x72>
 8009f9e:	200a      	movs	r0, #10
 8009fa0:	bd70      	pop	{r4, r5, r6, pc}
 8009fa2:	4b17      	ldr	r3, [pc, #92]	; (800a000 <_puts_r+0xb0>)
 8009fa4:	429c      	cmp	r4, r3
 8009fa6:	d101      	bne.n	8009fac <_puts_r+0x5c>
 8009fa8:	68ac      	ldr	r4, [r5, #8]
 8009faa:	e7e3      	b.n	8009f74 <_puts_r+0x24>
 8009fac:	4b15      	ldr	r3, [pc, #84]	; (800a004 <_puts_r+0xb4>)
 8009fae:	429c      	cmp	r4, r3
 8009fb0:	bf08      	it	eq
 8009fb2:	68ec      	ldreq	r4, [r5, #12]
 8009fb4:	e7de      	b.n	8009f74 <_puts_r+0x24>
 8009fb6:	4621      	mov	r1, r4
 8009fb8:	4628      	mov	r0, r5
 8009fba:	f000 f935 	bl	800a228 <__swsetup_r>
 8009fbe:	2800      	cmp	r0, #0
 8009fc0:	d0dd      	beq.n	8009f7e <_puts_r+0x2e>
 8009fc2:	f04f 30ff 	mov.w	r0, #4294967295
 8009fc6:	bd70      	pop	{r4, r5, r6, pc}
 8009fc8:	2b00      	cmp	r3, #0
 8009fca:	da04      	bge.n	8009fd6 <_puts_r+0x86>
 8009fcc:	69a2      	ldr	r2, [r4, #24]
 8009fce:	4293      	cmp	r3, r2
 8009fd0:	db06      	blt.n	8009fe0 <_puts_r+0x90>
 8009fd2:	290a      	cmp	r1, #10
 8009fd4:	d004      	beq.n	8009fe0 <_puts_r+0x90>
 8009fd6:	6823      	ldr	r3, [r4, #0]
 8009fd8:	1c5a      	adds	r2, r3, #1
 8009fda:	6022      	str	r2, [r4, #0]
 8009fdc:	7019      	strb	r1, [r3, #0]
 8009fde:	e7cf      	b.n	8009f80 <_puts_r+0x30>
 8009fe0:	4622      	mov	r2, r4
 8009fe2:	4628      	mov	r0, r5
 8009fe4:	f000 f8ce 	bl	800a184 <__swbuf_r>
 8009fe8:	3001      	adds	r0, #1
 8009fea:	d1c9      	bne.n	8009f80 <_puts_r+0x30>
 8009fec:	e7e9      	b.n	8009fc2 <_puts_r+0x72>
 8009fee:	200a      	movs	r0, #10
 8009ff0:	6823      	ldr	r3, [r4, #0]
 8009ff2:	1c5a      	adds	r2, r3, #1
 8009ff4:	6022      	str	r2, [r4, #0]
 8009ff6:	7018      	strb	r0, [r3, #0]
 8009ff8:	bd70      	pop	{r4, r5, r6, pc}
 8009ffa:	bf00      	nop
 8009ffc:	0800c00c 	.word	0x0800c00c
 800a000:	0800c02c 	.word	0x0800c02c
 800a004:	0800bfec 	.word	0x0800bfec

0800a008 <puts>:
 800a008:	4b02      	ldr	r3, [pc, #8]	; (800a014 <puts+0xc>)
 800a00a:	4601      	mov	r1, r0
 800a00c:	6818      	ldr	r0, [r3, #0]
 800a00e:	f7ff bf9f 	b.w	8009f50 <_puts_r>
 800a012:	bf00      	nop
 800a014:	2000024c 	.word	0x2000024c

0800a018 <setbuf>:
 800a018:	2900      	cmp	r1, #0
 800a01a:	f44f 6380 	mov.w	r3, #1024	; 0x400
 800a01e:	bf0c      	ite	eq
 800a020:	2202      	moveq	r2, #2
 800a022:	2200      	movne	r2, #0
 800a024:	f000 b800 	b.w	800a028 <setvbuf>

0800a028 <setvbuf>:
 800a028:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 800a02c:	461d      	mov	r5, r3
 800a02e:	4b51      	ldr	r3, [pc, #324]	; (800a174 <setvbuf+0x14c>)
 800a030:	4604      	mov	r4, r0
 800a032:	681e      	ldr	r6, [r3, #0]
 800a034:	460f      	mov	r7, r1
 800a036:	4690      	mov	r8, r2
 800a038:	b126      	cbz	r6, 800a044 <setvbuf+0x1c>
 800a03a:	69b3      	ldr	r3, [r6, #24]
 800a03c:	b913      	cbnz	r3, 800a044 <setvbuf+0x1c>
 800a03e:	4630      	mov	r0, r6
 800a040:	f001 f8b4 	bl	800b1ac <__sinit>
 800a044:	4b4c      	ldr	r3, [pc, #304]	; (800a178 <setvbuf+0x150>)
 800a046:	429c      	cmp	r4, r3
 800a048:	d152      	bne.n	800a0f0 <setvbuf+0xc8>
 800a04a:	6874      	ldr	r4, [r6, #4]
 800a04c:	f1b8 0f02 	cmp.w	r8, #2
 800a050:	d006      	beq.n	800a060 <setvbuf+0x38>
 800a052:	f1b8 0f01 	cmp.w	r8, #1
 800a056:	f200 8089 	bhi.w	800a16c <setvbuf+0x144>
 800a05a:	2d00      	cmp	r5, #0
 800a05c:	f2c0 8086 	blt.w	800a16c <setvbuf+0x144>
 800a060:	4621      	mov	r1, r4
 800a062:	4630      	mov	r0, r6
 800a064:	f001 f838 	bl	800b0d8 <_fflush_r>
 800a068:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800a06a:	b141      	cbz	r1, 800a07e <setvbuf+0x56>
 800a06c:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800a070:	4299      	cmp	r1, r3
 800a072:	d002      	beq.n	800a07a <setvbuf+0x52>
 800a074:	4630      	mov	r0, r6
 800a076:	f001 fc8b 	bl	800b990 <_free_r>
 800a07a:	2300      	movs	r3, #0
 800a07c:	6363      	str	r3, [r4, #52]	; 0x34
 800a07e:	2300      	movs	r3, #0
 800a080:	61a3      	str	r3, [r4, #24]
 800a082:	6063      	str	r3, [r4, #4]
 800a084:	89a3      	ldrh	r3, [r4, #12]
 800a086:	061b      	lsls	r3, r3, #24
 800a088:	d503      	bpl.n	800a092 <setvbuf+0x6a>
 800a08a:	6921      	ldr	r1, [r4, #16]
 800a08c:	4630      	mov	r0, r6
 800a08e:	f001 fc7f 	bl	800b990 <_free_r>
 800a092:	89a3      	ldrh	r3, [r4, #12]
 800a094:	f1b8 0f02 	cmp.w	r8, #2
 800a098:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 800a09c:	f023 0303 	bic.w	r3, r3, #3
 800a0a0:	81a3      	strh	r3, [r4, #12]
 800a0a2:	d05d      	beq.n	800a160 <setvbuf+0x138>
 800a0a4:	ab01      	add	r3, sp, #4
 800a0a6:	466a      	mov	r2, sp
 800a0a8:	4621      	mov	r1, r4
 800a0aa:	4630      	mov	r0, r6
 800a0ac:	f001 f916 	bl	800b2dc <__swhatbuf_r>
 800a0b0:	89a3      	ldrh	r3, [r4, #12]
 800a0b2:	4318      	orrs	r0, r3
 800a0b4:	81a0      	strh	r0, [r4, #12]
 800a0b6:	bb2d      	cbnz	r5, 800a104 <setvbuf+0xdc>
 800a0b8:	9d00      	ldr	r5, [sp, #0]
 800a0ba:	4628      	mov	r0, r5
 800a0bc:	f001 f972 	bl	800b3a4 <malloc>
 800a0c0:	4607      	mov	r7, r0
 800a0c2:	2800      	cmp	r0, #0
 800a0c4:	d14e      	bne.n	800a164 <setvbuf+0x13c>
 800a0c6:	f8dd 9000 	ldr.w	r9, [sp]
 800a0ca:	45a9      	cmp	r9, r5
 800a0cc:	d13c      	bne.n	800a148 <setvbuf+0x120>
 800a0ce:	f04f 30ff 	mov.w	r0, #4294967295
 800a0d2:	89a3      	ldrh	r3, [r4, #12]
 800a0d4:	f043 0302 	orr.w	r3, r3, #2
 800a0d8:	81a3      	strh	r3, [r4, #12]
 800a0da:	2300      	movs	r3, #0
 800a0dc:	60a3      	str	r3, [r4, #8]
 800a0de:	f104 0347 	add.w	r3, r4, #71	; 0x47
 800a0e2:	6023      	str	r3, [r4, #0]
 800a0e4:	6123      	str	r3, [r4, #16]
 800a0e6:	2301      	movs	r3, #1
 800a0e8:	6163      	str	r3, [r4, #20]
 800a0ea:	b003      	add	sp, #12
 800a0ec:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 800a0f0:	4b22      	ldr	r3, [pc, #136]	; (800a17c <setvbuf+0x154>)
 800a0f2:	429c      	cmp	r4, r3
 800a0f4:	d101      	bne.n	800a0fa <setvbuf+0xd2>
 800a0f6:	68b4      	ldr	r4, [r6, #8]
 800a0f8:	e7a8      	b.n	800a04c <setvbuf+0x24>
 800a0fa:	4b21      	ldr	r3, [pc, #132]	; (800a180 <setvbuf+0x158>)
 800a0fc:	429c      	cmp	r4, r3
 800a0fe:	bf08      	it	eq
 800a100:	68f4      	ldreq	r4, [r6, #12]
 800a102:	e7a3      	b.n	800a04c <setvbuf+0x24>
 800a104:	2f00      	cmp	r7, #0
 800a106:	d0d8      	beq.n	800a0ba <setvbuf+0x92>
 800a108:	69b3      	ldr	r3, [r6, #24]
 800a10a:	b913      	cbnz	r3, 800a112 <setvbuf+0xea>
 800a10c:	4630      	mov	r0, r6
 800a10e:	f001 f84d 	bl	800b1ac <__sinit>
 800a112:	f1b8 0f01 	cmp.w	r8, #1
 800a116:	bf08      	it	eq
 800a118:	89a3      	ldrheq	r3, [r4, #12]
 800a11a:	6027      	str	r7, [r4, #0]
 800a11c:	bf04      	itt	eq
 800a11e:	f043 0301 	orreq.w	r3, r3, #1
 800a122:	81a3      	strheq	r3, [r4, #12]
 800a124:	89a3      	ldrh	r3, [r4, #12]
 800a126:	6127      	str	r7, [r4, #16]
 800a128:	f013 0008 	ands.w	r0, r3, #8
 800a12c:	6165      	str	r5, [r4, #20]
 800a12e:	d01b      	beq.n	800a168 <setvbuf+0x140>
 800a130:	f013 0001 	ands.w	r0, r3, #1
 800a134:	f04f 0300 	mov.w	r3, #0
 800a138:	bf1f      	itttt	ne
 800a13a:	426d      	negne	r5, r5
 800a13c:	60a3      	strne	r3, [r4, #8]
 800a13e:	61a5      	strne	r5, [r4, #24]
 800a140:	4618      	movne	r0, r3
 800a142:	bf08      	it	eq
 800a144:	60a5      	streq	r5, [r4, #8]
 800a146:	e7d0      	b.n	800a0ea <setvbuf+0xc2>
 800a148:	4648      	mov	r0, r9
 800a14a:	f001 f92b 	bl	800b3a4 <malloc>
 800a14e:	4607      	mov	r7, r0
 800a150:	2800      	cmp	r0, #0
 800a152:	d0bc      	beq.n	800a0ce <setvbuf+0xa6>
 800a154:	89a3      	ldrh	r3, [r4, #12]
 800a156:	464d      	mov	r5, r9
 800a158:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800a15c:	81a3      	strh	r3, [r4, #12]
 800a15e:	e7d3      	b.n	800a108 <setvbuf+0xe0>
 800a160:	2000      	movs	r0, #0
 800a162:	e7b6      	b.n	800a0d2 <setvbuf+0xaa>
 800a164:	46a9      	mov	r9, r5
 800a166:	e7f5      	b.n	800a154 <setvbuf+0x12c>
 800a168:	60a0      	str	r0, [r4, #8]
 800a16a:	e7be      	b.n	800a0ea <setvbuf+0xc2>
 800a16c:	f04f 30ff 	mov.w	r0, #4294967295
 800a170:	e7bb      	b.n	800a0ea <setvbuf+0xc2>
 800a172:	bf00      	nop
 800a174:	2000024c 	.word	0x2000024c
 800a178:	0800c00c 	.word	0x0800c00c
 800a17c:	0800c02c 	.word	0x0800c02c
 800a180:	0800bfec 	.word	0x0800bfec

0800a184 <__swbuf_r>:
 800a184:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800a186:	460e      	mov	r6, r1
 800a188:	4614      	mov	r4, r2
 800a18a:	4605      	mov	r5, r0
 800a18c:	b118      	cbz	r0, 800a196 <__swbuf_r+0x12>
 800a18e:	6983      	ldr	r3, [r0, #24]
 800a190:	b90b      	cbnz	r3, 800a196 <__swbuf_r+0x12>
 800a192:	f001 f80b 	bl	800b1ac <__sinit>
 800a196:	4b21      	ldr	r3, [pc, #132]	; (800a21c <__swbuf_r+0x98>)
 800a198:	429c      	cmp	r4, r3
 800a19a:	d12a      	bne.n	800a1f2 <__swbuf_r+0x6e>
 800a19c:	686c      	ldr	r4, [r5, #4]
 800a19e:	69a3      	ldr	r3, [r4, #24]
 800a1a0:	60a3      	str	r3, [r4, #8]
 800a1a2:	89a3      	ldrh	r3, [r4, #12]
 800a1a4:	071a      	lsls	r2, r3, #28
 800a1a6:	d52e      	bpl.n	800a206 <__swbuf_r+0x82>
 800a1a8:	6923      	ldr	r3, [r4, #16]
 800a1aa:	b363      	cbz	r3, 800a206 <__swbuf_r+0x82>
 800a1ac:	6923      	ldr	r3, [r4, #16]
 800a1ae:	6820      	ldr	r0, [r4, #0]
 800a1b0:	b2f6      	uxtb	r6, r6
 800a1b2:	1ac0      	subs	r0, r0, r3
 800a1b4:	6963      	ldr	r3, [r4, #20]
 800a1b6:	4637      	mov	r7, r6
 800a1b8:	4298      	cmp	r0, r3
 800a1ba:	db04      	blt.n	800a1c6 <__swbuf_r+0x42>
 800a1bc:	4621      	mov	r1, r4
 800a1be:	4628      	mov	r0, r5
 800a1c0:	f000 ff8a 	bl	800b0d8 <_fflush_r>
 800a1c4:	bb28      	cbnz	r0, 800a212 <__swbuf_r+0x8e>
 800a1c6:	68a3      	ldr	r3, [r4, #8]
 800a1c8:	3001      	adds	r0, #1
 800a1ca:	3b01      	subs	r3, #1
 800a1cc:	60a3      	str	r3, [r4, #8]
 800a1ce:	6823      	ldr	r3, [r4, #0]
 800a1d0:	1c5a      	adds	r2, r3, #1
 800a1d2:	6022      	str	r2, [r4, #0]
 800a1d4:	701e      	strb	r6, [r3, #0]
 800a1d6:	6963      	ldr	r3, [r4, #20]
 800a1d8:	4298      	cmp	r0, r3
 800a1da:	d004      	beq.n	800a1e6 <__swbuf_r+0x62>
 800a1dc:	89a3      	ldrh	r3, [r4, #12]
 800a1de:	07db      	lsls	r3, r3, #31
 800a1e0:	d519      	bpl.n	800a216 <__swbuf_r+0x92>
 800a1e2:	2e0a      	cmp	r6, #10
 800a1e4:	d117      	bne.n	800a216 <__swbuf_r+0x92>
 800a1e6:	4621      	mov	r1, r4
 800a1e8:	4628      	mov	r0, r5
 800a1ea:	f000 ff75 	bl	800b0d8 <_fflush_r>
 800a1ee:	b190      	cbz	r0, 800a216 <__swbuf_r+0x92>
 800a1f0:	e00f      	b.n	800a212 <__swbuf_r+0x8e>
 800a1f2:	4b0b      	ldr	r3, [pc, #44]	; (800a220 <__swbuf_r+0x9c>)
 800a1f4:	429c      	cmp	r4, r3
 800a1f6:	d101      	bne.n	800a1fc <__swbuf_r+0x78>
 800a1f8:	68ac      	ldr	r4, [r5, #8]
 800a1fa:	e7d0      	b.n	800a19e <__swbuf_r+0x1a>
 800a1fc:	4b09      	ldr	r3, [pc, #36]	; (800a224 <__swbuf_r+0xa0>)
 800a1fe:	429c      	cmp	r4, r3
 800a200:	bf08      	it	eq
 800a202:	68ec      	ldreq	r4, [r5, #12]
 800a204:	e7cb      	b.n	800a19e <__swbuf_r+0x1a>
 800a206:	4621      	mov	r1, r4
 800a208:	4628      	mov	r0, r5
 800a20a:	f000 f80d 	bl	800a228 <__swsetup_r>
 800a20e:	2800      	cmp	r0, #0
 800a210:	d0cc      	beq.n	800a1ac <__swbuf_r+0x28>
 800a212:	f04f 37ff 	mov.w	r7, #4294967295
 800a216:	4638      	mov	r0, r7
 800a218:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 800a21a:	bf00      	nop
 800a21c:	0800c00c 	.word	0x0800c00c
 800a220:	0800c02c 	.word	0x0800c02c
 800a224:	0800bfec 	.word	0x0800bfec

0800a228 <__swsetup_r>:
 800a228:	4b32      	ldr	r3, [pc, #200]	; (800a2f4 <__swsetup_r+0xcc>)
 800a22a:	b570      	push	{r4, r5, r6, lr}
 800a22c:	681d      	ldr	r5, [r3, #0]
 800a22e:	4606      	mov	r6, r0
 800a230:	460c      	mov	r4, r1
 800a232:	b125      	cbz	r5, 800a23e <__swsetup_r+0x16>
 800a234:	69ab      	ldr	r3, [r5, #24]
 800a236:	b913      	cbnz	r3, 800a23e <__swsetup_r+0x16>
 800a238:	4628      	mov	r0, r5
 800a23a:	f000 ffb7 	bl	800b1ac <__sinit>
 800a23e:	4b2e      	ldr	r3, [pc, #184]	; (800a2f8 <__swsetup_r+0xd0>)
 800a240:	429c      	cmp	r4, r3
 800a242:	d10f      	bne.n	800a264 <__swsetup_r+0x3c>
 800a244:	686c      	ldr	r4, [r5, #4]
 800a246:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800a24a:	b29a      	uxth	r2, r3
 800a24c:	0715      	lsls	r5, r2, #28
 800a24e:	d42c      	bmi.n	800a2aa <__swsetup_r+0x82>
 800a250:	06d0      	lsls	r0, r2, #27
 800a252:	d411      	bmi.n	800a278 <__swsetup_r+0x50>
 800a254:	2209      	movs	r2, #9
 800a256:	6032      	str	r2, [r6, #0]
 800a258:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800a25c:	81a3      	strh	r3, [r4, #12]
 800a25e:	f04f 30ff 	mov.w	r0, #4294967295
 800a262:	bd70      	pop	{r4, r5, r6, pc}
 800a264:	4b25      	ldr	r3, [pc, #148]	; (800a2fc <__swsetup_r+0xd4>)
 800a266:	429c      	cmp	r4, r3
 800a268:	d101      	bne.n	800a26e <__swsetup_r+0x46>
 800a26a:	68ac      	ldr	r4, [r5, #8]
 800a26c:	e7eb      	b.n	800a246 <__swsetup_r+0x1e>
 800a26e:	4b24      	ldr	r3, [pc, #144]	; (800a300 <__swsetup_r+0xd8>)
 800a270:	429c      	cmp	r4, r3
 800a272:	bf08      	it	eq
 800a274:	68ec      	ldreq	r4, [r5, #12]
 800a276:	e7e6      	b.n	800a246 <__swsetup_r+0x1e>
 800a278:	0751      	lsls	r1, r2, #29
 800a27a:	d512      	bpl.n	800a2a2 <__swsetup_r+0x7a>
 800a27c:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800a27e:	b141      	cbz	r1, 800a292 <__swsetup_r+0x6a>
 800a280:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800a284:	4299      	cmp	r1, r3
 800a286:	d002      	beq.n	800a28e <__swsetup_r+0x66>
 800a288:	4630      	mov	r0, r6
 800a28a:	f001 fb81 	bl	800b990 <_free_r>
 800a28e:	2300      	movs	r3, #0
 800a290:	6363      	str	r3, [r4, #52]	; 0x34
 800a292:	89a3      	ldrh	r3, [r4, #12]
 800a294:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 800a298:	81a3      	strh	r3, [r4, #12]
 800a29a:	2300      	movs	r3, #0
 800a29c:	6063      	str	r3, [r4, #4]
 800a29e:	6923      	ldr	r3, [r4, #16]
 800a2a0:	6023      	str	r3, [r4, #0]
 800a2a2:	89a3      	ldrh	r3, [r4, #12]
 800a2a4:	f043 0308 	orr.w	r3, r3, #8
 800a2a8:	81a3      	strh	r3, [r4, #12]
 800a2aa:	6923      	ldr	r3, [r4, #16]
 800a2ac:	b94b      	cbnz	r3, 800a2c2 <__swsetup_r+0x9a>
 800a2ae:	89a3      	ldrh	r3, [r4, #12]
 800a2b0:	f403 7320 	and.w	r3, r3, #640	; 0x280
 800a2b4:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 800a2b8:	d003      	beq.n	800a2c2 <__swsetup_r+0x9a>
 800a2ba:	4621      	mov	r1, r4
 800a2bc:	4630      	mov	r0, r6
 800a2be:	f001 f831 	bl	800b324 <__smakebuf_r>
 800a2c2:	89a2      	ldrh	r2, [r4, #12]
 800a2c4:	f012 0301 	ands.w	r3, r2, #1
 800a2c8:	d00c      	beq.n	800a2e4 <__swsetup_r+0xbc>
 800a2ca:	2300      	movs	r3, #0
 800a2cc:	60a3      	str	r3, [r4, #8]
 800a2ce:	6963      	ldr	r3, [r4, #20]
 800a2d0:	425b      	negs	r3, r3
 800a2d2:	61a3      	str	r3, [r4, #24]
 800a2d4:	6923      	ldr	r3, [r4, #16]
 800a2d6:	b953      	cbnz	r3, 800a2ee <__swsetup_r+0xc6>
 800a2d8:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800a2dc:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 800a2e0:	d1ba      	bne.n	800a258 <__swsetup_r+0x30>
 800a2e2:	bd70      	pop	{r4, r5, r6, pc}
 800a2e4:	0792      	lsls	r2, r2, #30
 800a2e6:	bf58      	it	pl
 800a2e8:	6963      	ldrpl	r3, [r4, #20]
 800a2ea:	60a3      	str	r3, [r4, #8]
 800a2ec:	e7f2      	b.n	800a2d4 <__swsetup_r+0xac>
 800a2ee:	2000      	movs	r0, #0
 800a2f0:	e7f7      	b.n	800a2e2 <__swsetup_r+0xba>
 800a2f2:	bf00      	nop
 800a2f4:	2000024c 	.word	0x2000024c
 800a2f8:	0800c00c 	.word	0x0800c00c
 800a2fc:	0800c02c 	.word	0x0800c02c
 800a300:	0800bfec 	.word	0x0800bfec

0800a304 <quorem>:
 800a304:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800a308:	6903      	ldr	r3, [r0, #16]
 800a30a:	690c      	ldr	r4, [r1, #16]
 800a30c:	4680      	mov	r8, r0
 800a30e:	429c      	cmp	r4, r3
 800a310:	f300 8082 	bgt.w	800a418 <quorem+0x114>
 800a314:	3c01      	subs	r4, #1
 800a316:	f101 0714 	add.w	r7, r1, #20
 800a31a:	f100 0614 	add.w	r6, r0, #20
 800a31e:	f857 5024 	ldr.w	r5, [r7, r4, lsl #2]
 800a322:	f856 0024 	ldr.w	r0, [r6, r4, lsl #2]
 800a326:	3501      	adds	r5, #1
 800a328:	fbb0 f5f5 	udiv	r5, r0, r5
 800a32c:	ea4f 0e84 	mov.w	lr, r4, lsl #2
 800a330:	eb06 030e 	add.w	r3, r6, lr
 800a334:	eb07 090e 	add.w	r9, r7, lr
 800a338:	9301      	str	r3, [sp, #4]
 800a33a:	b38d      	cbz	r5, 800a3a0 <quorem+0x9c>
 800a33c:	f04f 0a00 	mov.w	sl, #0
 800a340:	4638      	mov	r0, r7
 800a342:	46b4      	mov	ip, r6
 800a344:	46d3      	mov	fp, sl
 800a346:	f850 2b04 	ldr.w	r2, [r0], #4
 800a34a:	b293      	uxth	r3, r2
 800a34c:	fb05 a303 	mla	r3, r5, r3, sl
 800a350:	0c12      	lsrs	r2, r2, #16
 800a352:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 800a356:	fb05 a202 	mla	r2, r5, r2, sl
 800a35a:	b29b      	uxth	r3, r3
 800a35c:	ebab 0303 	sub.w	r3, fp, r3
 800a360:	f8bc b000 	ldrh.w	fp, [ip]
 800a364:	ea4f 4a12 	mov.w	sl, r2, lsr #16
 800a368:	445b      	add	r3, fp
 800a36a:	fa1f fb82 	uxth.w	fp, r2
 800a36e:	f8dc 2000 	ldr.w	r2, [ip]
 800a372:	4581      	cmp	r9, r0
 800a374:	ebcb 4212 	rsb	r2, fp, r2, lsr #16
 800a378:	eb02 4223 	add.w	r2, r2, r3, asr #16
 800a37c:	b29b      	uxth	r3, r3
 800a37e:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 800a382:	ea4f 4b22 	mov.w	fp, r2, asr #16
 800a386:	f84c 3b04 	str.w	r3, [ip], #4
 800a38a:	d2dc      	bcs.n	800a346 <quorem+0x42>
 800a38c:	f856 300e 	ldr.w	r3, [r6, lr]
 800a390:	b933      	cbnz	r3, 800a3a0 <quorem+0x9c>
 800a392:	9b01      	ldr	r3, [sp, #4]
 800a394:	3b04      	subs	r3, #4
 800a396:	429e      	cmp	r6, r3
 800a398:	461a      	mov	r2, r3
 800a39a:	d331      	bcc.n	800a400 <quorem+0xfc>
 800a39c:	f8c8 4010 	str.w	r4, [r8, #16]
 800a3a0:	4640      	mov	r0, r8
 800a3a2:	f001 fa1e 	bl	800b7e2 <__mcmp>
 800a3a6:	2800      	cmp	r0, #0
 800a3a8:	db26      	blt.n	800a3f8 <quorem+0xf4>
 800a3aa:	4630      	mov	r0, r6
 800a3ac:	f04f 0e00 	mov.w	lr, #0
 800a3b0:	3501      	adds	r5, #1
 800a3b2:	f857 1b04 	ldr.w	r1, [r7], #4
 800a3b6:	f8d0 c000 	ldr.w	ip, [r0]
 800a3ba:	b28b      	uxth	r3, r1
 800a3bc:	ebae 0303 	sub.w	r3, lr, r3
 800a3c0:	fa1f f28c 	uxth.w	r2, ip
 800a3c4:	4413      	add	r3, r2
 800a3c6:	0c0a      	lsrs	r2, r1, #16
 800a3c8:	ebc2 421c 	rsb	r2, r2, ip, lsr #16
 800a3cc:	eb02 4223 	add.w	r2, r2, r3, asr #16
 800a3d0:	b29b      	uxth	r3, r3
 800a3d2:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 800a3d6:	45b9      	cmp	r9, r7
 800a3d8:	ea4f 4e22 	mov.w	lr, r2, asr #16
 800a3dc:	f840 3b04 	str.w	r3, [r0], #4
 800a3e0:	d2e7      	bcs.n	800a3b2 <quorem+0xae>
 800a3e2:	f856 2024 	ldr.w	r2, [r6, r4, lsl #2]
 800a3e6:	eb06 0384 	add.w	r3, r6, r4, lsl #2
 800a3ea:	b92a      	cbnz	r2, 800a3f8 <quorem+0xf4>
 800a3ec:	3b04      	subs	r3, #4
 800a3ee:	429e      	cmp	r6, r3
 800a3f0:	461a      	mov	r2, r3
 800a3f2:	d30b      	bcc.n	800a40c <quorem+0x108>
 800a3f4:	f8c8 4010 	str.w	r4, [r8, #16]
 800a3f8:	4628      	mov	r0, r5
 800a3fa:	b003      	add	sp, #12
 800a3fc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800a400:	6812      	ldr	r2, [r2, #0]
 800a402:	3b04      	subs	r3, #4
 800a404:	2a00      	cmp	r2, #0
 800a406:	d1c9      	bne.n	800a39c <quorem+0x98>
 800a408:	3c01      	subs	r4, #1
 800a40a:	e7c4      	b.n	800a396 <quorem+0x92>
 800a40c:	6812      	ldr	r2, [r2, #0]
 800a40e:	3b04      	subs	r3, #4
 800a410:	2a00      	cmp	r2, #0
 800a412:	d1ef      	bne.n	800a3f4 <quorem+0xf0>
 800a414:	3c01      	subs	r4, #1
 800a416:	e7ea      	b.n	800a3ee <quorem+0xea>
 800a418:	2000      	movs	r0, #0
 800a41a:	e7ee      	b.n	800a3fa <quorem+0xf6>
 800a41c:	0000      	movs	r0, r0
	...

0800a420 <_dtoa_r>:
 800a420:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800a424:	6a46      	ldr	r6, [r0, #36]	; 0x24
 800a426:	b095      	sub	sp, #84	; 0x54
 800a428:	4604      	mov	r4, r0
 800a42a:	9d21      	ldr	r5, [sp, #132]	; 0x84
 800a42c:	e9cd 2302 	strd	r2, r3, [sp, #8]
 800a430:	b93e      	cbnz	r6, 800a442 <_dtoa_r+0x22>
 800a432:	2010      	movs	r0, #16
 800a434:	f000 ffb6 	bl	800b3a4 <malloc>
 800a438:	6260      	str	r0, [r4, #36]	; 0x24
 800a43a:	6046      	str	r6, [r0, #4]
 800a43c:	6086      	str	r6, [r0, #8]
 800a43e:	6006      	str	r6, [r0, #0]
 800a440:	60c6      	str	r6, [r0, #12]
 800a442:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800a444:	6819      	ldr	r1, [r3, #0]
 800a446:	b151      	cbz	r1, 800a45e <_dtoa_r+0x3e>
 800a448:	685a      	ldr	r2, [r3, #4]
 800a44a:	2301      	movs	r3, #1
 800a44c:	4093      	lsls	r3, r2
 800a44e:	604a      	str	r2, [r1, #4]
 800a450:	608b      	str	r3, [r1, #8]
 800a452:	4620      	mov	r0, r4
 800a454:	f000 fff0 	bl	800b438 <_Bfree>
 800a458:	2200      	movs	r2, #0
 800a45a:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800a45c:	601a      	str	r2, [r3, #0]
 800a45e:	9b03      	ldr	r3, [sp, #12]
 800a460:	2b00      	cmp	r3, #0
 800a462:	bfb7      	itett	lt
 800a464:	2301      	movlt	r3, #1
 800a466:	2300      	movge	r3, #0
 800a468:	602b      	strlt	r3, [r5, #0]
 800a46a:	9b03      	ldrlt	r3, [sp, #12]
 800a46c:	bfae      	itee	ge
 800a46e:	602b      	strge	r3, [r5, #0]
 800a470:	f023 4300 	biclt.w	r3, r3, #2147483648	; 0x80000000
 800a474:	9303      	strlt	r3, [sp, #12]
 800a476:	f8dd 900c 	ldr.w	r9, [sp, #12]
 800a47a:	4bab      	ldr	r3, [pc, #684]	; (800a728 <_dtoa_r+0x308>)
 800a47c:	ea33 0309 	bics.w	r3, r3, r9
 800a480:	d11b      	bne.n	800a4ba <_dtoa_r+0x9a>
 800a482:	f242 730f 	movw	r3, #9999	; 0x270f
 800a486:	9a20      	ldr	r2, [sp, #128]	; 0x80
 800a488:	6013      	str	r3, [r2, #0]
 800a48a:	9b02      	ldr	r3, [sp, #8]
 800a48c:	b923      	cbnz	r3, 800a498 <_dtoa_r+0x78>
 800a48e:	f3c9 0013 	ubfx	r0, r9, #0, #20
 800a492:	2800      	cmp	r0, #0
 800a494:	f000 8583 	beq.w	800af9e <_dtoa_r+0xb7e>
 800a498:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800a49a:	b953      	cbnz	r3, 800a4b2 <_dtoa_r+0x92>
 800a49c:	4ba3      	ldr	r3, [pc, #652]	; (800a72c <_dtoa_r+0x30c>)
 800a49e:	e021      	b.n	800a4e4 <_dtoa_r+0xc4>
 800a4a0:	4ba3      	ldr	r3, [pc, #652]	; (800a730 <_dtoa_r+0x310>)
 800a4a2:	9306      	str	r3, [sp, #24]
 800a4a4:	3308      	adds	r3, #8
 800a4a6:	9a22      	ldr	r2, [sp, #136]	; 0x88
 800a4a8:	6013      	str	r3, [r2, #0]
 800a4aa:	9806      	ldr	r0, [sp, #24]
 800a4ac:	b015      	add	sp, #84	; 0x54
 800a4ae:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800a4b2:	4b9e      	ldr	r3, [pc, #632]	; (800a72c <_dtoa_r+0x30c>)
 800a4b4:	9306      	str	r3, [sp, #24]
 800a4b6:	3303      	adds	r3, #3
 800a4b8:	e7f5      	b.n	800a4a6 <_dtoa_r+0x86>
 800a4ba:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 800a4be:	2200      	movs	r2, #0
 800a4c0:	2300      	movs	r3, #0
 800a4c2:	4630      	mov	r0, r6
 800a4c4:	4639      	mov	r1, r7
 800a4c6:	f7fa fae3 	bl	8004a90 <__aeabi_dcmpeq>
 800a4ca:	4680      	mov	r8, r0
 800a4cc:	b160      	cbz	r0, 800a4e8 <_dtoa_r+0xc8>
 800a4ce:	2301      	movs	r3, #1
 800a4d0:	9a20      	ldr	r2, [sp, #128]	; 0x80
 800a4d2:	6013      	str	r3, [r2, #0]
 800a4d4:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800a4d6:	2b00      	cmp	r3, #0
 800a4d8:	f000 855e 	beq.w	800af98 <_dtoa_r+0xb78>
 800a4dc:	4b95      	ldr	r3, [pc, #596]	; (800a734 <_dtoa_r+0x314>)
 800a4de:	9a22      	ldr	r2, [sp, #136]	; 0x88
 800a4e0:	6013      	str	r3, [r2, #0]
 800a4e2:	3b01      	subs	r3, #1
 800a4e4:	9306      	str	r3, [sp, #24]
 800a4e6:	e7e0      	b.n	800a4aa <_dtoa_r+0x8a>
 800a4e8:	ab12      	add	r3, sp, #72	; 0x48
 800a4ea:	9301      	str	r3, [sp, #4]
 800a4ec:	ab13      	add	r3, sp, #76	; 0x4c
 800a4ee:	9300      	str	r3, [sp, #0]
 800a4f0:	4632      	mov	r2, r6
 800a4f2:	463b      	mov	r3, r7
 800a4f4:	4620      	mov	r0, r4
 800a4f6:	f001 f9ed 	bl	800b8d4 <__d2b>
 800a4fa:	f3c9 550a 	ubfx	r5, r9, #20, #11
 800a4fe:	4682      	mov	sl, r0
 800a500:	2d00      	cmp	r5, #0
 800a502:	d07d      	beq.n	800a600 <_dtoa_r+0x1e0>
 800a504:	4630      	mov	r0, r6
 800a506:	f3c7 0313 	ubfx	r3, r7, #0, #20
 800a50a:	f043 517f 	orr.w	r1, r3, #1069547520	; 0x3fc00000
 800a50e:	f441 1140 	orr.w	r1, r1, #3145728	; 0x300000
 800a512:	f2a5 35ff 	subw	r5, r5, #1023	; 0x3ff
 800a516:	f8cd 8040 	str.w	r8, [sp, #64]	; 0x40
 800a51a:	2200      	movs	r2, #0
 800a51c:	4b86      	ldr	r3, [pc, #536]	; (800a738 <_dtoa_r+0x318>)
 800a51e:	f7f9 fe9b 	bl	8004258 <__aeabi_dsub>
 800a522:	a37b      	add	r3, pc, #492	; (adr r3, 800a710 <_dtoa_r+0x2f0>)
 800a524:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a528:	f7fa f84a 	bl	80045c0 <__aeabi_dmul>
 800a52c:	a37a      	add	r3, pc, #488	; (adr r3, 800a718 <_dtoa_r+0x2f8>)
 800a52e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a532:	f7f9 fe93 	bl	800425c <__adddf3>
 800a536:	4606      	mov	r6, r0
 800a538:	4628      	mov	r0, r5
 800a53a:	460f      	mov	r7, r1
 800a53c:	f7f9 ffda 	bl	80044f4 <__aeabi_i2d>
 800a540:	a377      	add	r3, pc, #476	; (adr r3, 800a720 <_dtoa_r+0x300>)
 800a542:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a546:	f7fa f83b 	bl	80045c0 <__aeabi_dmul>
 800a54a:	4602      	mov	r2, r0
 800a54c:	460b      	mov	r3, r1
 800a54e:	4630      	mov	r0, r6
 800a550:	4639      	mov	r1, r7
 800a552:	f7f9 fe83 	bl	800425c <__adddf3>
 800a556:	4606      	mov	r6, r0
 800a558:	460f      	mov	r7, r1
 800a55a:	f7fa fae1 	bl	8004b20 <__aeabi_d2iz>
 800a55e:	2200      	movs	r2, #0
 800a560:	4683      	mov	fp, r0
 800a562:	2300      	movs	r3, #0
 800a564:	4630      	mov	r0, r6
 800a566:	4639      	mov	r1, r7
 800a568:	f7fa fa9c 	bl	8004aa4 <__aeabi_dcmplt>
 800a56c:	b158      	cbz	r0, 800a586 <_dtoa_r+0x166>
 800a56e:	4658      	mov	r0, fp
 800a570:	f7f9 ffc0 	bl	80044f4 <__aeabi_i2d>
 800a574:	4602      	mov	r2, r0
 800a576:	460b      	mov	r3, r1
 800a578:	4630      	mov	r0, r6
 800a57a:	4639      	mov	r1, r7
 800a57c:	f7fa fa88 	bl	8004a90 <__aeabi_dcmpeq>
 800a580:	b908      	cbnz	r0, 800a586 <_dtoa_r+0x166>
 800a582:	f10b 3bff 	add.w	fp, fp, #4294967295
 800a586:	f1bb 0f16 	cmp.w	fp, #22
 800a58a:	d858      	bhi.n	800a63e <_dtoa_r+0x21e>
 800a58c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a590:	496a      	ldr	r1, [pc, #424]	; (800a73c <_dtoa_r+0x31c>)
 800a592:	eb01 01cb 	add.w	r1, r1, fp, lsl #3
 800a596:	e9d1 0100 	ldrd	r0, r1, [r1]
 800a59a:	f7fa faa1 	bl	8004ae0 <__aeabi_dcmpgt>
 800a59e:	2800      	cmp	r0, #0
 800a5a0:	d04f      	beq.n	800a642 <_dtoa_r+0x222>
 800a5a2:	2300      	movs	r3, #0
 800a5a4:	f10b 3bff 	add.w	fp, fp, #4294967295
 800a5a8:	930d      	str	r3, [sp, #52]	; 0x34
 800a5aa:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800a5ac:	1b5d      	subs	r5, r3, r5
 800a5ae:	1e6b      	subs	r3, r5, #1
 800a5b0:	9307      	str	r3, [sp, #28]
 800a5b2:	bf43      	ittte	mi
 800a5b4:	2300      	movmi	r3, #0
 800a5b6:	f1c5 0801 	rsbmi	r8, r5, #1
 800a5ba:	9307      	strmi	r3, [sp, #28]
 800a5bc:	f04f 0800 	movpl.w	r8, #0
 800a5c0:	f1bb 0f00 	cmp.w	fp, #0
 800a5c4:	db3f      	blt.n	800a646 <_dtoa_r+0x226>
 800a5c6:	9b07      	ldr	r3, [sp, #28]
 800a5c8:	f8cd b030 	str.w	fp, [sp, #48]	; 0x30
 800a5cc:	445b      	add	r3, fp
 800a5ce:	9307      	str	r3, [sp, #28]
 800a5d0:	2300      	movs	r3, #0
 800a5d2:	9308      	str	r3, [sp, #32]
 800a5d4:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a5d6:	2b09      	cmp	r3, #9
 800a5d8:	f200 80b4 	bhi.w	800a744 <_dtoa_r+0x324>
 800a5dc:	2b05      	cmp	r3, #5
 800a5de:	bfc4      	itt	gt
 800a5e0:	3b04      	subgt	r3, #4
 800a5e2:	931e      	strgt	r3, [sp, #120]	; 0x78
 800a5e4:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800a5e6:	bfc8      	it	gt
 800a5e8:	2600      	movgt	r6, #0
 800a5ea:	f1a3 0302 	sub.w	r3, r3, #2
 800a5ee:	bfd8      	it	le
 800a5f0:	2601      	movle	r6, #1
 800a5f2:	2b03      	cmp	r3, #3
 800a5f4:	f200 80b2 	bhi.w	800a75c <_dtoa_r+0x33c>
 800a5f8:	e8df f003 	tbb	[pc, r3]
 800a5fc:	782d8684 	.word	0x782d8684
 800a600:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 800a602:	9d12      	ldr	r5, [sp, #72]	; 0x48
 800a604:	441d      	add	r5, r3
 800a606:	f205 4332 	addw	r3, r5, #1074	; 0x432
 800a60a:	2b20      	cmp	r3, #32
 800a60c:	dd11      	ble.n	800a632 <_dtoa_r+0x212>
 800a60e:	9a02      	ldr	r2, [sp, #8]
 800a610:	f205 4012 	addw	r0, r5, #1042	; 0x412
 800a614:	f1c3 0340 	rsb	r3, r3, #64	; 0x40
 800a618:	fa22 f000 	lsr.w	r0, r2, r0
 800a61c:	fa09 f303 	lsl.w	r3, r9, r3
 800a620:	4318      	orrs	r0, r3
 800a622:	f7f9 ff57 	bl	80044d4 <__aeabi_ui2d>
 800a626:	2301      	movs	r3, #1
 800a628:	f1a1 71f8 	sub.w	r1, r1, #32505856	; 0x1f00000
 800a62c:	3d01      	subs	r5, #1
 800a62e:	9310      	str	r3, [sp, #64]	; 0x40
 800a630:	e773      	b.n	800a51a <_dtoa_r+0xfa>
 800a632:	f1c3 0020 	rsb	r0, r3, #32
 800a636:	9b02      	ldr	r3, [sp, #8]
 800a638:	fa03 f000 	lsl.w	r0, r3, r0
 800a63c:	e7f1      	b.n	800a622 <_dtoa_r+0x202>
 800a63e:	2301      	movs	r3, #1
 800a640:	e7b2      	b.n	800a5a8 <_dtoa_r+0x188>
 800a642:	900d      	str	r0, [sp, #52]	; 0x34
 800a644:	e7b1      	b.n	800a5aa <_dtoa_r+0x18a>
 800a646:	f1cb 0300 	rsb	r3, fp, #0
 800a64a:	9308      	str	r3, [sp, #32]
 800a64c:	2300      	movs	r3, #0
 800a64e:	eba8 080b 	sub.w	r8, r8, fp
 800a652:	930c      	str	r3, [sp, #48]	; 0x30
 800a654:	e7be      	b.n	800a5d4 <_dtoa_r+0x1b4>
 800a656:	2301      	movs	r3, #1
 800a658:	9309      	str	r3, [sp, #36]	; 0x24
 800a65a:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800a65c:	2b00      	cmp	r3, #0
 800a65e:	f340 8080 	ble.w	800a762 <_dtoa_r+0x342>
 800a662:	4699      	mov	r9, r3
 800a664:	9304      	str	r3, [sp, #16]
 800a666:	2200      	movs	r2, #0
 800a668:	2104      	movs	r1, #4
 800a66a:	6a65      	ldr	r5, [r4, #36]	; 0x24
 800a66c:	606a      	str	r2, [r5, #4]
 800a66e:	f101 0214 	add.w	r2, r1, #20
 800a672:	429a      	cmp	r2, r3
 800a674:	d97a      	bls.n	800a76c <_dtoa_r+0x34c>
 800a676:	6869      	ldr	r1, [r5, #4]
 800a678:	4620      	mov	r0, r4
 800a67a:	f000 fea9 	bl	800b3d0 <_Balloc>
 800a67e:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800a680:	6028      	str	r0, [r5, #0]
 800a682:	681b      	ldr	r3, [r3, #0]
 800a684:	f1b9 0f0e 	cmp.w	r9, #14
 800a688:	9306      	str	r3, [sp, #24]
 800a68a:	f200 80f0 	bhi.w	800a86e <_dtoa_r+0x44e>
 800a68e:	2e00      	cmp	r6, #0
 800a690:	f000 80ed 	beq.w	800a86e <_dtoa_r+0x44e>
 800a694:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a698:	f1bb 0f00 	cmp.w	fp, #0
 800a69c:	e9cd 230e 	strd	r2, r3, [sp, #56]	; 0x38
 800a6a0:	dd79      	ble.n	800a796 <_dtoa_r+0x376>
 800a6a2:	4a26      	ldr	r2, [pc, #152]	; (800a73c <_dtoa_r+0x31c>)
 800a6a4:	f00b 030f 	and.w	r3, fp, #15
 800a6a8:	ea4f 162b 	mov.w	r6, fp, asr #4
 800a6ac:	eb02 03c3 	add.w	r3, r2, r3, lsl #3
 800a6b0:	06f0      	lsls	r0, r6, #27
 800a6b2:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a6b6:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 800a6ba:	d55c      	bpl.n	800a776 <_dtoa_r+0x356>
 800a6bc:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 800a6c0:	4b1f      	ldr	r3, [pc, #124]	; (800a740 <_dtoa_r+0x320>)
 800a6c2:	2503      	movs	r5, #3
 800a6c4:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
 800a6c8:	f7fa f8a4 	bl	8004814 <__aeabi_ddiv>
 800a6cc:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a6d0:	f006 060f 	and.w	r6, r6, #15
 800a6d4:	4f1a      	ldr	r7, [pc, #104]	; (800a740 <_dtoa_r+0x320>)
 800a6d6:	2e00      	cmp	r6, #0
 800a6d8:	d14f      	bne.n	800a77a <_dtoa_r+0x35a>
 800a6da:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a6de:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a6e2:	f7fa f897 	bl	8004814 <__aeabi_ddiv>
 800a6e6:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a6ea:	e06e      	b.n	800a7ca <_dtoa_r+0x3aa>
 800a6ec:	2301      	movs	r3, #1
 800a6ee:	9309      	str	r3, [sp, #36]	; 0x24
 800a6f0:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800a6f2:	445b      	add	r3, fp
 800a6f4:	f103 0901 	add.w	r9, r3, #1
 800a6f8:	9304      	str	r3, [sp, #16]
 800a6fa:	464b      	mov	r3, r9
 800a6fc:	2b01      	cmp	r3, #1
 800a6fe:	bfb8      	it	lt
 800a700:	2301      	movlt	r3, #1
 800a702:	e7b0      	b.n	800a666 <_dtoa_r+0x246>
 800a704:	2300      	movs	r3, #0
 800a706:	e7a7      	b.n	800a658 <_dtoa_r+0x238>
 800a708:	2300      	movs	r3, #0
 800a70a:	e7f0      	b.n	800a6ee <_dtoa_r+0x2ce>
 800a70c:	f3af 8000 	nop.w
 800a710:	636f4361 	.word	0x636f4361
 800a714:	3fd287a7 	.word	0x3fd287a7
 800a718:	8b60c8b3 	.word	0x8b60c8b3
 800a71c:	3fc68a28 	.word	0x3fc68a28
 800a720:	509f79fb 	.word	0x509f79fb
 800a724:	3fd34413 	.word	0x3fd34413
 800a728:	7ff00000 	.word	0x7ff00000
 800a72c:	0800bfe5 	.word	0x0800bfe5
 800a730:	0800bfdc 	.word	0x0800bfdc
 800a734:	0800bfb9 	.word	0x0800bfb9
 800a738:	3ff80000 	.word	0x3ff80000
 800a73c:	0800c078 	.word	0x0800c078
 800a740:	0800c050 	.word	0x0800c050
 800a744:	2601      	movs	r6, #1
 800a746:	2300      	movs	r3, #0
 800a748:	9609      	str	r6, [sp, #36]	; 0x24
 800a74a:	931e      	str	r3, [sp, #120]	; 0x78
 800a74c:	f04f 33ff 	mov.w	r3, #4294967295
 800a750:	2200      	movs	r2, #0
 800a752:	9304      	str	r3, [sp, #16]
 800a754:	4699      	mov	r9, r3
 800a756:	2312      	movs	r3, #18
 800a758:	921f      	str	r2, [sp, #124]	; 0x7c
 800a75a:	e784      	b.n	800a666 <_dtoa_r+0x246>
 800a75c:	2301      	movs	r3, #1
 800a75e:	9309      	str	r3, [sp, #36]	; 0x24
 800a760:	e7f4      	b.n	800a74c <_dtoa_r+0x32c>
 800a762:	2301      	movs	r3, #1
 800a764:	9304      	str	r3, [sp, #16]
 800a766:	4699      	mov	r9, r3
 800a768:	461a      	mov	r2, r3
 800a76a:	e7f5      	b.n	800a758 <_dtoa_r+0x338>
 800a76c:	686a      	ldr	r2, [r5, #4]
 800a76e:	0049      	lsls	r1, r1, #1
 800a770:	3201      	adds	r2, #1
 800a772:	606a      	str	r2, [r5, #4]
 800a774:	e77b      	b.n	800a66e <_dtoa_r+0x24e>
 800a776:	2502      	movs	r5, #2
 800a778:	e7ac      	b.n	800a6d4 <_dtoa_r+0x2b4>
 800a77a:	07f1      	lsls	r1, r6, #31
 800a77c:	d508      	bpl.n	800a790 <_dtoa_r+0x370>
 800a77e:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a782:	e9d7 2300 	ldrd	r2, r3, [r7]
 800a786:	f7f9 ff1b 	bl	80045c0 <__aeabi_dmul>
 800a78a:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a78e:	3501      	adds	r5, #1
 800a790:	1076      	asrs	r6, r6, #1
 800a792:	3708      	adds	r7, #8
 800a794:	e79f      	b.n	800a6d6 <_dtoa_r+0x2b6>
 800a796:	f000 80a5 	beq.w	800a8e4 <_dtoa_r+0x4c4>
 800a79a:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 800a79e:	f1cb 0600 	rsb	r6, fp, #0
 800a7a2:	4ba2      	ldr	r3, [pc, #648]	; (800aa2c <_dtoa_r+0x60c>)
 800a7a4:	f006 020f 	and.w	r2, r6, #15
 800a7a8:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 800a7ac:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a7b0:	f7f9 ff06 	bl	80045c0 <__aeabi_dmul>
 800a7b4:	2502      	movs	r5, #2
 800a7b6:	2300      	movs	r3, #0
 800a7b8:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a7bc:	4f9c      	ldr	r7, [pc, #624]	; (800aa30 <_dtoa_r+0x610>)
 800a7be:	1136      	asrs	r6, r6, #4
 800a7c0:	2e00      	cmp	r6, #0
 800a7c2:	f040 8084 	bne.w	800a8ce <_dtoa_r+0x4ae>
 800a7c6:	2b00      	cmp	r3, #0
 800a7c8:	d18d      	bne.n	800a6e6 <_dtoa_r+0x2c6>
 800a7ca:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800a7cc:	2b00      	cmp	r3, #0
 800a7ce:	f000 808b 	beq.w	800a8e8 <_dtoa_r+0x4c8>
 800a7d2:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a7d6:	e9cd 230a 	strd	r2, r3, [sp, #40]	; 0x28
 800a7da:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a7de:	2200      	movs	r2, #0
 800a7e0:	4b94      	ldr	r3, [pc, #592]	; (800aa34 <_dtoa_r+0x614>)
 800a7e2:	f7fa f95f 	bl	8004aa4 <__aeabi_dcmplt>
 800a7e6:	2800      	cmp	r0, #0
 800a7e8:	d07e      	beq.n	800a8e8 <_dtoa_r+0x4c8>
 800a7ea:	f1b9 0f00 	cmp.w	r9, #0
 800a7ee:	d07b      	beq.n	800a8e8 <_dtoa_r+0x4c8>
 800a7f0:	9b04      	ldr	r3, [sp, #16]
 800a7f2:	2b00      	cmp	r3, #0
 800a7f4:	dd37      	ble.n	800a866 <_dtoa_r+0x446>
 800a7f6:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a7fa:	2200      	movs	r2, #0
 800a7fc:	4b8e      	ldr	r3, [pc, #568]	; (800aa38 <_dtoa_r+0x618>)
 800a7fe:	f7f9 fedf 	bl	80045c0 <__aeabi_dmul>
 800a802:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a806:	9e04      	ldr	r6, [sp, #16]
 800a808:	f10b 37ff 	add.w	r7, fp, #4294967295
 800a80c:	3501      	adds	r5, #1
 800a80e:	4628      	mov	r0, r5
 800a810:	f7f9 fe70 	bl	80044f4 <__aeabi_i2d>
 800a814:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a818:	f7f9 fed2 	bl	80045c0 <__aeabi_dmul>
 800a81c:	4b87      	ldr	r3, [pc, #540]	; (800aa3c <_dtoa_r+0x61c>)
 800a81e:	2200      	movs	r2, #0
 800a820:	f7f9 fd1c 	bl	800425c <__adddf3>
 800a824:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a828:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
 800a82a:	f1a3 7550 	sub.w	r5, r3, #54525952	; 0x3400000
 800a82e:	950b      	str	r5, [sp, #44]	; 0x2c
 800a830:	2e00      	cmp	r6, #0
 800a832:	d15c      	bne.n	800a8ee <_dtoa_r+0x4ce>
 800a834:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a838:	2200      	movs	r2, #0
 800a83a:	4b81      	ldr	r3, [pc, #516]	; (800aa40 <_dtoa_r+0x620>)
 800a83c:	f7f9 fd0c 	bl	8004258 <__aeabi_dsub>
 800a840:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 800a842:	462b      	mov	r3, r5
 800a844:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a848:	f7fa f94a 	bl	8004ae0 <__aeabi_dcmpgt>
 800a84c:	2800      	cmp	r0, #0
 800a84e:	f040 82f7 	bne.w	800ae40 <_dtoa_r+0xa20>
 800a852:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a856:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 800a858:	f105 4300 	add.w	r3, r5, #2147483648	; 0x80000000
 800a85c:	f7fa f922 	bl	8004aa4 <__aeabi_dcmplt>
 800a860:	2800      	cmp	r0, #0
 800a862:	f040 82eb 	bne.w	800ae3c <_dtoa_r+0xa1c>
 800a866:	e9dd 230e 	ldrd	r2, r3, [sp, #56]	; 0x38
 800a86a:	e9cd 2302 	strd	r2, r3, [sp, #8]
 800a86e:	9b13      	ldr	r3, [sp, #76]	; 0x4c
 800a870:	2b00      	cmp	r3, #0
 800a872:	f2c0 8150 	blt.w	800ab16 <_dtoa_r+0x6f6>
 800a876:	f1bb 0f0e 	cmp.w	fp, #14
 800a87a:	f300 814c 	bgt.w	800ab16 <_dtoa_r+0x6f6>
 800a87e:	4b6b      	ldr	r3, [pc, #428]	; (800aa2c <_dtoa_r+0x60c>)
 800a880:	eb03 03cb 	add.w	r3, r3, fp, lsl #3
 800a884:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a888:	e9cd 2304 	strd	r2, r3, [sp, #16]
 800a88c:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800a88e:	2b00      	cmp	r3, #0
 800a890:	f280 80da 	bge.w	800aa48 <_dtoa_r+0x628>
 800a894:	f1b9 0f00 	cmp.w	r9, #0
 800a898:	f300 80d6 	bgt.w	800aa48 <_dtoa_r+0x628>
 800a89c:	f040 82cd 	bne.w	800ae3a <_dtoa_r+0xa1a>
 800a8a0:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800a8a4:	2200      	movs	r2, #0
 800a8a6:	4b66      	ldr	r3, [pc, #408]	; (800aa40 <_dtoa_r+0x620>)
 800a8a8:	f7f9 fe8a 	bl	80045c0 <__aeabi_dmul>
 800a8ac:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a8b0:	f7fa f90c 	bl	8004acc <__aeabi_dcmpge>
 800a8b4:	464e      	mov	r6, r9
 800a8b6:	464f      	mov	r7, r9
 800a8b8:	2800      	cmp	r0, #0
 800a8ba:	f040 82a4 	bne.w	800ae06 <_dtoa_r+0x9e6>
 800a8be:	9b06      	ldr	r3, [sp, #24]
 800a8c0:	9a06      	ldr	r2, [sp, #24]
 800a8c2:	1c5d      	adds	r5, r3, #1
 800a8c4:	2331      	movs	r3, #49	; 0x31
 800a8c6:	f10b 0b01 	add.w	fp, fp, #1
 800a8ca:	7013      	strb	r3, [r2, #0]
 800a8cc:	e29f      	b.n	800ae0e <_dtoa_r+0x9ee>
 800a8ce:	07f2      	lsls	r2, r6, #31
 800a8d0:	d505      	bpl.n	800a8de <_dtoa_r+0x4be>
 800a8d2:	e9d7 2300 	ldrd	r2, r3, [r7]
 800a8d6:	f7f9 fe73 	bl	80045c0 <__aeabi_dmul>
 800a8da:	2301      	movs	r3, #1
 800a8dc:	3501      	adds	r5, #1
 800a8de:	1076      	asrs	r6, r6, #1
 800a8e0:	3708      	adds	r7, #8
 800a8e2:	e76d      	b.n	800a7c0 <_dtoa_r+0x3a0>
 800a8e4:	2502      	movs	r5, #2
 800a8e6:	e770      	b.n	800a7ca <_dtoa_r+0x3aa>
 800a8e8:	465f      	mov	r7, fp
 800a8ea:	464e      	mov	r6, r9
 800a8ec:	e78f      	b.n	800a80e <_dtoa_r+0x3ee>
 800a8ee:	9a06      	ldr	r2, [sp, #24]
 800a8f0:	4b4e      	ldr	r3, [pc, #312]	; (800aa2c <_dtoa_r+0x60c>)
 800a8f2:	4432      	add	r2, r6
 800a8f4:	9211      	str	r2, [sp, #68]	; 0x44
 800a8f6:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800a8f8:	1e71      	subs	r1, r6, #1
 800a8fa:	2a00      	cmp	r2, #0
 800a8fc:	d048      	beq.n	800a990 <_dtoa_r+0x570>
 800a8fe:	eb03 03c1 	add.w	r3, r3, r1, lsl #3
 800a902:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a906:	2000      	movs	r0, #0
 800a908:	494e      	ldr	r1, [pc, #312]	; (800aa44 <_dtoa_r+0x624>)
 800a90a:	f7f9 ff83 	bl	8004814 <__aeabi_ddiv>
 800a90e:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a912:	f7f9 fca1 	bl	8004258 <__aeabi_dsub>
 800a916:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a91a:	9d06      	ldr	r5, [sp, #24]
 800a91c:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a920:	f7fa f8fe 	bl	8004b20 <__aeabi_d2iz>
 800a924:	4606      	mov	r6, r0
 800a926:	f7f9 fde5 	bl	80044f4 <__aeabi_i2d>
 800a92a:	4602      	mov	r2, r0
 800a92c:	460b      	mov	r3, r1
 800a92e:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a932:	f7f9 fc91 	bl	8004258 <__aeabi_dsub>
 800a936:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a93a:	3630      	adds	r6, #48	; 0x30
 800a93c:	f805 6b01 	strb.w	r6, [r5], #1
 800a940:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a944:	f7fa f8ae 	bl	8004aa4 <__aeabi_dcmplt>
 800a948:	2800      	cmp	r0, #0
 800a94a:	d164      	bne.n	800aa16 <_dtoa_r+0x5f6>
 800a94c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 800a950:	2000      	movs	r0, #0
 800a952:	4938      	ldr	r1, [pc, #224]	; (800aa34 <_dtoa_r+0x614>)
 800a954:	f7f9 fc80 	bl	8004258 <__aeabi_dsub>
 800a958:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a95c:	f7fa f8a2 	bl	8004aa4 <__aeabi_dcmplt>
 800a960:	2800      	cmp	r0, #0
 800a962:	f040 80b9 	bne.w	800aad8 <_dtoa_r+0x6b8>
 800a966:	9b11      	ldr	r3, [sp, #68]	; 0x44
 800a968:	429d      	cmp	r5, r3
 800a96a:	f43f af7c 	beq.w	800a866 <_dtoa_r+0x446>
 800a96e:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a972:	2200      	movs	r2, #0
 800a974:	4b30      	ldr	r3, [pc, #192]	; (800aa38 <_dtoa_r+0x618>)
 800a976:	f7f9 fe23 	bl	80045c0 <__aeabi_dmul>
 800a97a:	2200      	movs	r2, #0
 800a97c:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a980:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a984:	4b2c      	ldr	r3, [pc, #176]	; (800aa38 <_dtoa_r+0x618>)
 800a986:	f7f9 fe1b 	bl	80045c0 <__aeabi_dmul>
 800a98a:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a98e:	e7c5      	b.n	800a91c <_dtoa_r+0x4fc>
 800a990:	eb03 01c1 	add.w	r1, r3, r1, lsl #3
 800a994:	e9d1 0100 	ldrd	r0, r1, [r1]
 800a998:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a99c:	f7f9 fe10 	bl	80045c0 <__aeabi_dmul>
 800a9a0:	e9cd 010a 	strd	r0, r1, [sp, #40]	; 0x28
 800a9a4:	9d06      	ldr	r5, [sp, #24]
 800a9a6:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a9aa:	f7fa f8b9 	bl	8004b20 <__aeabi_d2iz>
 800a9ae:	4606      	mov	r6, r0
 800a9b0:	f7f9 fda0 	bl	80044f4 <__aeabi_i2d>
 800a9b4:	4602      	mov	r2, r0
 800a9b6:	460b      	mov	r3, r1
 800a9b8:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a9bc:	f7f9 fc4c 	bl	8004258 <__aeabi_dsub>
 800a9c0:	3630      	adds	r6, #48	; 0x30
 800a9c2:	9b11      	ldr	r3, [sp, #68]	; 0x44
 800a9c4:	f805 6b01 	strb.w	r6, [r5], #1
 800a9c8:	42ab      	cmp	r3, r5
 800a9ca:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800a9ce:	f04f 0200 	mov.w	r2, #0
 800a9d2:	d124      	bne.n	800aa1e <_dtoa_r+0x5fe>
 800a9d4:	4b1b      	ldr	r3, [pc, #108]	; (800aa44 <_dtoa_r+0x624>)
 800a9d6:	e9dd 010a 	ldrd	r0, r1, [sp, #40]	; 0x28
 800a9da:	f7f9 fc3f 	bl	800425c <__adddf3>
 800a9de:	4602      	mov	r2, r0
 800a9e0:	460b      	mov	r3, r1
 800a9e2:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800a9e6:	f7fa f87b 	bl	8004ae0 <__aeabi_dcmpgt>
 800a9ea:	2800      	cmp	r0, #0
 800a9ec:	d174      	bne.n	800aad8 <_dtoa_r+0x6b8>
 800a9ee:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
 800a9f2:	2000      	movs	r0, #0
 800a9f4:	4913      	ldr	r1, [pc, #76]	; (800aa44 <_dtoa_r+0x624>)
 800a9f6:	f7f9 fc2f 	bl	8004258 <__aeabi_dsub>
 800a9fa:	4602      	mov	r2, r0
 800a9fc:	460b      	mov	r3, r1
 800a9fe:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 800aa02:	f7fa f84f 	bl	8004aa4 <__aeabi_dcmplt>
 800aa06:	2800      	cmp	r0, #0
 800aa08:	f43f af2d 	beq.w	800a866 <_dtoa_r+0x446>
 800aa0c:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800aa10:	1e6a      	subs	r2, r5, #1
 800aa12:	2b30      	cmp	r3, #48	; 0x30
 800aa14:	d001      	beq.n	800aa1a <_dtoa_r+0x5fa>
 800aa16:	46bb      	mov	fp, r7
 800aa18:	e04d      	b.n	800aab6 <_dtoa_r+0x696>
 800aa1a:	4615      	mov	r5, r2
 800aa1c:	e7f6      	b.n	800aa0c <_dtoa_r+0x5ec>
 800aa1e:	4b06      	ldr	r3, [pc, #24]	; (800aa38 <_dtoa_r+0x618>)
 800aa20:	f7f9 fdce 	bl	80045c0 <__aeabi_dmul>
 800aa24:	e9cd 0102 	strd	r0, r1, [sp, #8]
 800aa28:	e7bd      	b.n	800a9a6 <_dtoa_r+0x586>
 800aa2a:	bf00      	nop
 800aa2c:	0800c078 	.word	0x0800c078
 800aa30:	0800c050 	.word	0x0800c050
 800aa34:	3ff00000 	.word	0x3ff00000
 800aa38:	40240000 	.word	0x40240000
 800aa3c:	401c0000 	.word	0x401c0000
 800aa40:	40140000 	.word	0x40140000
 800aa44:	3fe00000 	.word	0x3fe00000
 800aa48:	9d06      	ldr	r5, [sp, #24]
 800aa4a:	e9dd 6702 	ldrd	r6, r7, [sp, #8]
 800aa4e:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 800aa52:	4630      	mov	r0, r6
 800aa54:	4639      	mov	r1, r7
 800aa56:	f7f9 fedd 	bl	8004814 <__aeabi_ddiv>
 800aa5a:	f7fa f861 	bl	8004b20 <__aeabi_d2iz>
 800aa5e:	4680      	mov	r8, r0
 800aa60:	f7f9 fd48 	bl	80044f4 <__aeabi_i2d>
 800aa64:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
 800aa68:	f7f9 fdaa 	bl	80045c0 <__aeabi_dmul>
 800aa6c:	4602      	mov	r2, r0
 800aa6e:	460b      	mov	r3, r1
 800aa70:	4630      	mov	r0, r6
 800aa72:	4639      	mov	r1, r7
 800aa74:	f7f9 fbf0 	bl	8004258 <__aeabi_dsub>
 800aa78:	f108 0630 	add.w	r6, r8, #48	; 0x30
 800aa7c:	f805 6b01 	strb.w	r6, [r5], #1
 800aa80:	9e06      	ldr	r6, [sp, #24]
 800aa82:	4602      	mov	r2, r0
 800aa84:	1bae      	subs	r6, r5, r6
 800aa86:	45b1      	cmp	r9, r6
 800aa88:	460b      	mov	r3, r1
 800aa8a:	d137      	bne.n	800aafc <_dtoa_r+0x6dc>
 800aa8c:	f7f9 fbe6 	bl	800425c <__adddf3>
 800aa90:	4606      	mov	r6, r0
 800aa92:	460f      	mov	r7, r1
 800aa94:	4602      	mov	r2, r0
 800aa96:	460b      	mov	r3, r1
 800aa98:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800aa9c:	f7fa f802 	bl	8004aa4 <__aeabi_dcmplt>
 800aaa0:	b9c8      	cbnz	r0, 800aad6 <_dtoa_r+0x6b6>
 800aaa2:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
 800aaa6:	4632      	mov	r2, r6
 800aaa8:	463b      	mov	r3, r7
 800aaaa:	f7f9 fff1 	bl	8004a90 <__aeabi_dcmpeq>
 800aaae:	b110      	cbz	r0, 800aab6 <_dtoa_r+0x696>
 800aab0:	f018 0f01 	tst.w	r8, #1
 800aab4:	d10f      	bne.n	800aad6 <_dtoa_r+0x6b6>
 800aab6:	4651      	mov	r1, sl
 800aab8:	4620      	mov	r0, r4
 800aaba:	f000 fcbd 	bl	800b438 <_Bfree>
 800aabe:	2300      	movs	r3, #0
 800aac0:	9a20      	ldr	r2, [sp, #128]	; 0x80
 800aac2:	702b      	strb	r3, [r5, #0]
 800aac4:	f10b 0301 	add.w	r3, fp, #1
 800aac8:	6013      	str	r3, [r2, #0]
 800aaca:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800aacc:	2b00      	cmp	r3, #0
 800aace:	f43f acec 	beq.w	800a4aa <_dtoa_r+0x8a>
 800aad2:	601d      	str	r5, [r3, #0]
 800aad4:	e4e9      	b.n	800a4aa <_dtoa_r+0x8a>
 800aad6:	465f      	mov	r7, fp
 800aad8:	f815 2c01 	ldrb.w	r2, [r5, #-1]
 800aadc:	1e6b      	subs	r3, r5, #1
 800aade:	2a39      	cmp	r2, #57	; 0x39
 800aae0:	d106      	bne.n	800aaf0 <_dtoa_r+0x6d0>
 800aae2:	9a06      	ldr	r2, [sp, #24]
 800aae4:	429a      	cmp	r2, r3
 800aae6:	d107      	bne.n	800aaf8 <_dtoa_r+0x6d8>
 800aae8:	2330      	movs	r3, #48	; 0x30
 800aaea:	7013      	strb	r3, [r2, #0]
 800aaec:	4613      	mov	r3, r2
 800aaee:	3701      	adds	r7, #1
 800aaf0:	781a      	ldrb	r2, [r3, #0]
 800aaf2:	3201      	adds	r2, #1
 800aaf4:	701a      	strb	r2, [r3, #0]
 800aaf6:	e78e      	b.n	800aa16 <_dtoa_r+0x5f6>
 800aaf8:	461d      	mov	r5, r3
 800aafa:	e7ed      	b.n	800aad8 <_dtoa_r+0x6b8>
 800aafc:	2200      	movs	r2, #0
 800aafe:	4bb5      	ldr	r3, [pc, #724]	; (800add4 <_dtoa_r+0x9b4>)
 800ab00:	f7f9 fd5e 	bl	80045c0 <__aeabi_dmul>
 800ab04:	2200      	movs	r2, #0
 800ab06:	2300      	movs	r3, #0
 800ab08:	4606      	mov	r6, r0
 800ab0a:	460f      	mov	r7, r1
 800ab0c:	f7f9 ffc0 	bl	8004a90 <__aeabi_dcmpeq>
 800ab10:	2800      	cmp	r0, #0
 800ab12:	d09c      	beq.n	800aa4e <_dtoa_r+0x62e>
 800ab14:	e7cf      	b.n	800aab6 <_dtoa_r+0x696>
 800ab16:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800ab18:	2a00      	cmp	r2, #0
 800ab1a:	f000 8129 	beq.w	800ad70 <_dtoa_r+0x950>
 800ab1e:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800ab20:	2a01      	cmp	r2, #1
 800ab22:	f300 810e 	bgt.w	800ad42 <_dtoa_r+0x922>
 800ab26:	9a10      	ldr	r2, [sp, #64]	; 0x40
 800ab28:	2a00      	cmp	r2, #0
 800ab2a:	f000 8106 	beq.w	800ad3a <_dtoa_r+0x91a>
 800ab2e:	f203 4333 	addw	r3, r3, #1075	; 0x433
 800ab32:	4645      	mov	r5, r8
 800ab34:	9e08      	ldr	r6, [sp, #32]
 800ab36:	9a07      	ldr	r2, [sp, #28]
 800ab38:	2101      	movs	r1, #1
 800ab3a:	441a      	add	r2, r3
 800ab3c:	4620      	mov	r0, r4
 800ab3e:	4498      	add	r8, r3
 800ab40:	9207      	str	r2, [sp, #28]
 800ab42:	f000 fd19 	bl	800b578 <__i2b>
 800ab46:	4607      	mov	r7, r0
 800ab48:	2d00      	cmp	r5, #0
 800ab4a:	dd0b      	ble.n	800ab64 <_dtoa_r+0x744>
 800ab4c:	9b07      	ldr	r3, [sp, #28]
 800ab4e:	2b00      	cmp	r3, #0
 800ab50:	dd08      	ble.n	800ab64 <_dtoa_r+0x744>
 800ab52:	42ab      	cmp	r3, r5
 800ab54:	bfa8      	it	ge
 800ab56:	462b      	movge	r3, r5
 800ab58:	9a07      	ldr	r2, [sp, #28]
 800ab5a:	eba8 0803 	sub.w	r8, r8, r3
 800ab5e:	1aed      	subs	r5, r5, r3
 800ab60:	1ad3      	subs	r3, r2, r3
 800ab62:	9307      	str	r3, [sp, #28]
 800ab64:	9b08      	ldr	r3, [sp, #32]
 800ab66:	b1fb      	cbz	r3, 800aba8 <_dtoa_r+0x788>
 800ab68:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800ab6a:	2b00      	cmp	r3, #0
 800ab6c:	f000 8104 	beq.w	800ad78 <_dtoa_r+0x958>
 800ab70:	2e00      	cmp	r6, #0
 800ab72:	dd11      	ble.n	800ab98 <_dtoa_r+0x778>
 800ab74:	4639      	mov	r1, r7
 800ab76:	4632      	mov	r2, r6
 800ab78:	4620      	mov	r0, r4
 800ab7a:	f000 fd93 	bl	800b6a4 <__pow5mult>
 800ab7e:	4652      	mov	r2, sl
 800ab80:	4601      	mov	r1, r0
 800ab82:	4607      	mov	r7, r0
 800ab84:	4620      	mov	r0, r4
 800ab86:	f000 fd00 	bl	800b58a <__multiply>
 800ab8a:	4651      	mov	r1, sl
 800ab8c:	900a      	str	r0, [sp, #40]	; 0x28
 800ab8e:	4620      	mov	r0, r4
 800ab90:	f000 fc52 	bl	800b438 <_Bfree>
 800ab94:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 800ab96:	469a      	mov	sl, r3
 800ab98:	9b08      	ldr	r3, [sp, #32]
 800ab9a:	1b9a      	subs	r2, r3, r6
 800ab9c:	d004      	beq.n	800aba8 <_dtoa_r+0x788>
 800ab9e:	4651      	mov	r1, sl
 800aba0:	4620      	mov	r0, r4
 800aba2:	f000 fd7f 	bl	800b6a4 <__pow5mult>
 800aba6:	4682      	mov	sl, r0
 800aba8:	2101      	movs	r1, #1
 800abaa:	4620      	mov	r0, r4
 800abac:	f000 fce4 	bl	800b578 <__i2b>
 800abb0:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800abb2:	4606      	mov	r6, r0
 800abb4:	2b00      	cmp	r3, #0
 800abb6:	f340 80e1 	ble.w	800ad7c <_dtoa_r+0x95c>
 800abba:	461a      	mov	r2, r3
 800abbc:	4601      	mov	r1, r0
 800abbe:	4620      	mov	r0, r4
 800abc0:	f000 fd70 	bl	800b6a4 <__pow5mult>
 800abc4:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800abc6:	4606      	mov	r6, r0
 800abc8:	2b01      	cmp	r3, #1
 800abca:	f340 80da 	ble.w	800ad82 <_dtoa_r+0x962>
 800abce:	2300      	movs	r3, #0
 800abd0:	9308      	str	r3, [sp, #32]
 800abd2:	6933      	ldr	r3, [r6, #16]
 800abd4:	eb06 0383 	add.w	r3, r6, r3, lsl #2
 800abd8:	6918      	ldr	r0, [r3, #16]
 800abda:	f000 fc7f 	bl	800b4dc <__hi0bits>
 800abde:	f1c0 0020 	rsb	r0, r0, #32
 800abe2:	9b07      	ldr	r3, [sp, #28]
 800abe4:	4418      	add	r0, r3
 800abe6:	f010 001f 	ands.w	r0, r0, #31
 800abea:	f000 80f0 	beq.w	800adce <_dtoa_r+0x9ae>
 800abee:	f1c0 0320 	rsb	r3, r0, #32
 800abf2:	2b04      	cmp	r3, #4
 800abf4:	f340 80e2 	ble.w	800adbc <_dtoa_r+0x99c>
 800abf8:	9b07      	ldr	r3, [sp, #28]
 800abfa:	f1c0 001c 	rsb	r0, r0, #28
 800abfe:	4480      	add	r8, r0
 800ac00:	4405      	add	r5, r0
 800ac02:	4403      	add	r3, r0
 800ac04:	9307      	str	r3, [sp, #28]
 800ac06:	f1b8 0f00 	cmp.w	r8, #0
 800ac0a:	dd05      	ble.n	800ac18 <_dtoa_r+0x7f8>
 800ac0c:	4651      	mov	r1, sl
 800ac0e:	4642      	mov	r2, r8
 800ac10:	4620      	mov	r0, r4
 800ac12:	f000 fd95 	bl	800b740 <__lshift>
 800ac16:	4682      	mov	sl, r0
 800ac18:	9b07      	ldr	r3, [sp, #28]
 800ac1a:	2b00      	cmp	r3, #0
 800ac1c:	dd05      	ble.n	800ac2a <_dtoa_r+0x80a>
 800ac1e:	4631      	mov	r1, r6
 800ac20:	461a      	mov	r2, r3
 800ac22:	4620      	mov	r0, r4
 800ac24:	f000 fd8c 	bl	800b740 <__lshift>
 800ac28:	4606      	mov	r6, r0
 800ac2a:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 800ac2c:	2b00      	cmp	r3, #0
 800ac2e:	f000 80d3 	beq.w	800add8 <_dtoa_r+0x9b8>
 800ac32:	4631      	mov	r1, r6
 800ac34:	4650      	mov	r0, sl
 800ac36:	f000 fdd4 	bl	800b7e2 <__mcmp>
 800ac3a:	2800      	cmp	r0, #0
 800ac3c:	f280 80cc 	bge.w	800add8 <_dtoa_r+0x9b8>
 800ac40:	2300      	movs	r3, #0
 800ac42:	4651      	mov	r1, sl
 800ac44:	220a      	movs	r2, #10
 800ac46:	4620      	mov	r0, r4
 800ac48:	f000 fc0d 	bl	800b466 <__multadd>
 800ac4c:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800ac4e:	f10b 3bff 	add.w	fp, fp, #4294967295
 800ac52:	4682      	mov	sl, r0
 800ac54:	2b00      	cmp	r3, #0
 800ac56:	f000 81a9 	beq.w	800afac <_dtoa_r+0xb8c>
 800ac5a:	2300      	movs	r3, #0
 800ac5c:	4639      	mov	r1, r7
 800ac5e:	220a      	movs	r2, #10
 800ac60:	4620      	mov	r0, r4
 800ac62:	f000 fc00 	bl	800b466 <__multadd>
 800ac66:	9b04      	ldr	r3, [sp, #16]
 800ac68:	4607      	mov	r7, r0
 800ac6a:	2b00      	cmp	r3, #0
 800ac6c:	dc03      	bgt.n	800ac76 <_dtoa_r+0x856>
 800ac6e:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800ac70:	2b02      	cmp	r3, #2
 800ac72:	f300 80b9 	bgt.w	800ade8 <_dtoa_r+0x9c8>
 800ac76:	2d00      	cmp	r5, #0
 800ac78:	dd05      	ble.n	800ac86 <_dtoa_r+0x866>
 800ac7a:	4639      	mov	r1, r7
 800ac7c:	462a      	mov	r2, r5
 800ac7e:	4620      	mov	r0, r4
 800ac80:	f000 fd5e 	bl	800b740 <__lshift>
 800ac84:	4607      	mov	r7, r0
 800ac86:	9b08      	ldr	r3, [sp, #32]
 800ac88:	2b00      	cmp	r3, #0
 800ac8a:	f000 8110 	beq.w	800aeae <_dtoa_r+0xa8e>
 800ac8e:	6879      	ldr	r1, [r7, #4]
 800ac90:	4620      	mov	r0, r4
 800ac92:	f000 fb9d 	bl	800b3d0 <_Balloc>
 800ac96:	4605      	mov	r5, r0
 800ac98:	693a      	ldr	r2, [r7, #16]
 800ac9a:	f107 010c 	add.w	r1, r7, #12
 800ac9e:	3202      	adds	r2, #2
 800aca0:	0092      	lsls	r2, r2, #2
 800aca2:	300c      	adds	r0, #12
 800aca4:	f7fe fcc8 	bl	8009638 <memcpy>
 800aca8:	2201      	movs	r2, #1
 800acaa:	4629      	mov	r1, r5
 800acac:	4620      	mov	r0, r4
 800acae:	f000 fd47 	bl	800b740 <__lshift>
 800acb2:	9707      	str	r7, [sp, #28]
 800acb4:	4607      	mov	r7, r0
 800acb6:	9b02      	ldr	r3, [sp, #8]
 800acb8:	f8dd 8018 	ldr.w	r8, [sp, #24]
 800acbc:	f003 0301 	and.w	r3, r3, #1
 800acc0:	9308      	str	r3, [sp, #32]
 800acc2:	4631      	mov	r1, r6
 800acc4:	4650      	mov	r0, sl
 800acc6:	f7ff fb1d 	bl	800a304 <quorem>
 800acca:	9907      	ldr	r1, [sp, #28]
 800accc:	4605      	mov	r5, r0
 800acce:	f100 0930 	add.w	r9, r0, #48	; 0x30
 800acd2:	4650      	mov	r0, sl
 800acd4:	f000 fd85 	bl	800b7e2 <__mcmp>
 800acd8:	463a      	mov	r2, r7
 800acda:	9002      	str	r0, [sp, #8]
 800acdc:	4631      	mov	r1, r6
 800acde:	4620      	mov	r0, r4
 800ace0:	f000 fd99 	bl	800b816 <__mdiff>
 800ace4:	68c3      	ldr	r3, [r0, #12]
 800ace6:	4602      	mov	r2, r0
 800ace8:	2b00      	cmp	r3, #0
 800acea:	f040 80e2 	bne.w	800aeb2 <_dtoa_r+0xa92>
 800acee:	4601      	mov	r1, r0
 800acf0:	9009      	str	r0, [sp, #36]	; 0x24
 800acf2:	4650      	mov	r0, sl
 800acf4:	f000 fd75 	bl	800b7e2 <__mcmp>
 800acf8:	4603      	mov	r3, r0
 800acfa:	9a09      	ldr	r2, [sp, #36]	; 0x24
 800acfc:	4611      	mov	r1, r2
 800acfe:	4620      	mov	r0, r4
 800ad00:	9309      	str	r3, [sp, #36]	; 0x24
 800ad02:	f000 fb99 	bl	800b438 <_Bfree>
 800ad06:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800ad08:	2b00      	cmp	r3, #0
 800ad0a:	f040 80d4 	bne.w	800aeb6 <_dtoa_r+0xa96>
 800ad0e:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800ad10:	2a00      	cmp	r2, #0
 800ad12:	f040 80d0 	bne.w	800aeb6 <_dtoa_r+0xa96>
 800ad16:	9a08      	ldr	r2, [sp, #32]
 800ad18:	2a00      	cmp	r2, #0
 800ad1a:	f040 80cc 	bne.w	800aeb6 <_dtoa_r+0xa96>
 800ad1e:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800ad22:	f000 80e8 	beq.w	800aef6 <_dtoa_r+0xad6>
 800ad26:	9b02      	ldr	r3, [sp, #8]
 800ad28:	2b00      	cmp	r3, #0
 800ad2a:	dd01      	ble.n	800ad30 <_dtoa_r+0x910>
 800ad2c:	f105 0931 	add.w	r9, r5, #49	; 0x31
 800ad30:	f108 0501 	add.w	r5, r8, #1
 800ad34:	f888 9000 	strb.w	r9, [r8]
 800ad38:	e06b      	b.n	800ae12 <_dtoa_r+0x9f2>
 800ad3a:	9b12      	ldr	r3, [sp, #72]	; 0x48
 800ad3c:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
 800ad40:	e6f7      	b.n	800ab32 <_dtoa_r+0x712>
 800ad42:	9b08      	ldr	r3, [sp, #32]
 800ad44:	f109 36ff 	add.w	r6, r9, #4294967295
 800ad48:	42b3      	cmp	r3, r6
 800ad4a:	bfb7      	itett	lt
 800ad4c:	9b08      	ldrlt	r3, [sp, #32]
 800ad4e:	1b9e      	subge	r6, r3, r6
 800ad50:	1af2      	sublt	r2, r6, r3
 800ad52:	9b0c      	ldrlt	r3, [sp, #48]	; 0x30
 800ad54:	bfbf      	itttt	lt
 800ad56:	9608      	strlt	r6, [sp, #32]
 800ad58:	189b      	addlt	r3, r3, r2
 800ad5a:	930c      	strlt	r3, [sp, #48]	; 0x30
 800ad5c:	2600      	movlt	r6, #0
 800ad5e:	f1b9 0f00 	cmp.w	r9, #0
 800ad62:	bfb9      	ittee	lt
 800ad64:	eba8 0509 	sublt.w	r5, r8, r9
 800ad68:	2300      	movlt	r3, #0
 800ad6a:	4645      	movge	r5, r8
 800ad6c:	464b      	movge	r3, r9
 800ad6e:	e6e2      	b.n	800ab36 <_dtoa_r+0x716>
 800ad70:	9e08      	ldr	r6, [sp, #32]
 800ad72:	4645      	mov	r5, r8
 800ad74:	9f09      	ldr	r7, [sp, #36]	; 0x24
 800ad76:	e6e7      	b.n	800ab48 <_dtoa_r+0x728>
 800ad78:	9a08      	ldr	r2, [sp, #32]
 800ad7a:	e710      	b.n	800ab9e <_dtoa_r+0x77e>
 800ad7c:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800ad7e:	2b01      	cmp	r3, #1
 800ad80:	dc18      	bgt.n	800adb4 <_dtoa_r+0x994>
 800ad82:	9b02      	ldr	r3, [sp, #8]
 800ad84:	b9b3      	cbnz	r3, 800adb4 <_dtoa_r+0x994>
 800ad86:	9b03      	ldr	r3, [sp, #12]
 800ad88:	f3c3 0313 	ubfx	r3, r3, #0, #20
 800ad8c:	b9a3      	cbnz	r3, 800adb8 <_dtoa_r+0x998>
 800ad8e:	9b03      	ldr	r3, [sp, #12]
 800ad90:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 800ad94:	0d1b      	lsrs	r3, r3, #20
 800ad96:	051b      	lsls	r3, r3, #20
 800ad98:	b12b      	cbz	r3, 800ada6 <_dtoa_r+0x986>
 800ad9a:	9b07      	ldr	r3, [sp, #28]
 800ad9c:	f108 0801 	add.w	r8, r8, #1
 800ada0:	3301      	adds	r3, #1
 800ada2:	9307      	str	r3, [sp, #28]
 800ada4:	2301      	movs	r3, #1
 800ada6:	9308      	str	r3, [sp, #32]
 800ada8:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 800adaa:	2b00      	cmp	r3, #0
 800adac:	f47f af11 	bne.w	800abd2 <_dtoa_r+0x7b2>
 800adb0:	2001      	movs	r0, #1
 800adb2:	e716      	b.n	800abe2 <_dtoa_r+0x7c2>
 800adb4:	2300      	movs	r3, #0
 800adb6:	e7f6      	b.n	800ada6 <_dtoa_r+0x986>
 800adb8:	9b02      	ldr	r3, [sp, #8]
 800adba:	e7f4      	b.n	800ada6 <_dtoa_r+0x986>
 800adbc:	f43f af23 	beq.w	800ac06 <_dtoa_r+0x7e6>
 800adc0:	9a07      	ldr	r2, [sp, #28]
 800adc2:	331c      	adds	r3, #28
 800adc4:	441a      	add	r2, r3
 800adc6:	4498      	add	r8, r3
 800adc8:	441d      	add	r5, r3
 800adca:	4613      	mov	r3, r2
 800adcc:	e71a      	b.n	800ac04 <_dtoa_r+0x7e4>
 800adce:	4603      	mov	r3, r0
 800add0:	e7f6      	b.n	800adc0 <_dtoa_r+0x9a0>
 800add2:	bf00      	nop
 800add4:	40240000 	.word	0x40240000
 800add8:	f1b9 0f00 	cmp.w	r9, #0
 800addc:	dc33      	bgt.n	800ae46 <_dtoa_r+0xa26>
 800adde:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800ade0:	2b02      	cmp	r3, #2
 800ade2:	dd30      	ble.n	800ae46 <_dtoa_r+0xa26>
 800ade4:	f8cd 9010 	str.w	r9, [sp, #16]
 800ade8:	9b04      	ldr	r3, [sp, #16]
 800adea:	b963      	cbnz	r3, 800ae06 <_dtoa_r+0x9e6>
 800adec:	4631      	mov	r1, r6
 800adee:	2205      	movs	r2, #5
 800adf0:	4620      	mov	r0, r4
 800adf2:	f000 fb38 	bl	800b466 <__multadd>
 800adf6:	4601      	mov	r1, r0
 800adf8:	4606      	mov	r6, r0
 800adfa:	4650      	mov	r0, sl
 800adfc:	f000 fcf1 	bl	800b7e2 <__mcmp>
 800ae00:	2800      	cmp	r0, #0
 800ae02:	f73f ad5c 	bgt.w	800a8be <_dtoa_r+0x49e>
 800ae06:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
 800ae08:	9d06      	ldr	r5, [sp, #24]
 800ae0a:	ea6f 0b03 	mvn.w	fp, r3
 800ae0e:	2300      	movs	r3, #0
 800ae10:	9307      	str	r3, [sp, #28]
 800ae12:	4631      	mov	r1, r6
 800ae14:	4620      	mov	r0, r4
 800ae16:	f000 fb0f 	bl	800b438 <_Bfree>
 800ae1a:	2f00      	cmp	r7, #0
 800ae1c:	f43f ae4b 	beq.w	800aab6 <_dtoa_r+0x696>
 800ae20:	9b07      	ldr	r3, [sp, #28]
 800ae22:	b12b      	cbz	r3, 800ae30 <_dtoa_r+0xa10>
 800ae24:	42bb      	cmp	r3, r7
 800ae26:	d003      	beq.n	800ae30 <_dtoa_r+0xa10>
 800ae28:	4619      	mov	r1, r3
 800ae2a:	4620      	mov	r0, r4
 800ae2c:	f000 fb04 	bl	800b438 <_Bfree>
 800ae30:	4639      	mov	r1, r7
 800ae32:	4620      	mov	r0, r4
 800ae34:	f000 fb00 	bl	800b438 <_Bfree>
 800ae38:	e63d      	b.n	800aab6 <_dtoa_r+0x696>
 800ae3a:	2600      	movs	r6, #0
 800ae3c:	4637      	mov	r7, r6
 800ae3e:	e7e2      	b.n	800ae06 <_dtoa_r+0x9e6>
 800ae40:	46bb      	mov	fp, r7
 800ae42:	4637      	mov	r7, r6
 800ae44:	e53b      	b.n	800a8be <_dtoa_r+0x49e>
 800ae46:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800ae48:	f8cd 9010 	str.w	r9, [sp, #16]
 800ae4c:	2b00      	cmp	r3, #0
 800ae4e:	f47f af12 	bne.w	800ac76 <_dtoa_r+0x856>
 800ae52:	9d06      	ldr	r5, [sp, #24]
 800ae54:	4631      	mov	r1, r6
 800ae56:	4650      	mov	r0, sl
 800ae58:	f7ff fa54 	bl	800a304 <quorem>
 800ae5c:	9b06      	ldr	r3, [sp, #24]
 800ae5e:	f100 0930 	add.w	r9, r0, #48	; 0x30
 800ae62:	f805 9b01 	strb.w	r9, [r5], #1
 800ae66:	9a04      	ldr	r2, [sp, #16]
 800ae68:	1aeb      	subs	r3, r5, r3
 800ae6a:	429a      	cmp	r2, r3
 800ae6c:	f300 8081 	bgt.w	800af72 <_dtoa_r+0xb52>
 800ae70:	9b06      	ldr	r3, [sp, #24]
 800ae72:	2a01      	cmp	r2, #1
 800ae74:	bfac      	ite	ge
 800ae76:	189b      	addge	r3, r3, r2
 800ae78:	3301      	addlt	r3, #1
 800ae7a:	4698      	mov	r8, r3
 800ae7c:	2300      	movs	r3, #0
 800ae7e:	9307      	str	r3, [sp, #28]
 800ae80:	4651      	mov	r1, sl
 800ae82:	2201      	movs	r2, #1
 800ae84:	4620      	mov	r0, r4
 800ae86:	f000 fc5b 	bl	800b740 <__lshift>
 800ae8a:	4631      	mov	r1, r6
 800ae8c:	4682      	mov	sl, r0
 800ae8e:	f000 fca8 	bl	800b7e2 <__mcmp>
 800ae92:	2800      	cmp	r0, #0
 800ae94:	dc34      	bgt.n	800af00 <_dtoa_r+0xae0>
 800ae96:	d102      	bne.n	800ae9e <_dtoa_r+0xa7e>
 800ae98:	f019 0f01 	tst.w	r9, #1
 800ae9c:	d130      	bne.n	800af00 <_dtoa_r+0xae0>
 800ae9e:	4645      	mov	r5, r8
 800aea0:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800aea4:	1e6a      	subs	r2, r5, #1
 800aea6:	2b30      	cmp	r3, #48	; 0x30
 800aea8:	d1b3      	bne.n	800ae12 <_dtoa_r+0x9f2>
 800aeaa:	4615      	mov	r5, r2
 800aeac:	e7f8      	b.n	800aea0 <_dtoa_r+0xa80>
 800aeae:	4638      	mov	r0, r7
 800aeb0:	e6ff      	b.n	800acb2 <_dtoa_r+0x892>
 800aeb2:	2301      	movs	r3, #1
 800aeb4:	e722      	b.n	800acfc <_dtoa_r+0x8dc>
 800aeb6:	9a02      	ldr	r2, [sp, #8]
 800aeb8:	2a00      	cmp	r2, #0
 800aeba:	db04      	blt.n	800aec6 <_dtoa_r+0xaa6>
 800aebc:	d128      	bne.n	800af10 <_dtoa_r+0xaf0>
 800aebe:	9a1e      	ldr	r2, [sp, #120]	; 0x78
 800aec0:	bb32      	cbnz	r2, 800af10 <_dtoa_r+0xaf0>
 800aec2:	9a08      	ldr	r2, [sp, #32]
 800aec4:	bb22      	cbnz	r2, 800af10 <_dtoa_r+0xaf0>
 800aec6:	2b00      	cmp	r3, #0
 800aec8:	f77f af32 	ble.w	800ad30 <_dtoa_r+0x910>
 800aecc:	4651      	mov	r1, sl
 800aece:	2201      	movs	r2, #1
 800aed0:	4620      	mov	r0, r4
 800aed2:	f000 fc35 	bl	800b740 <__lshift>
 800aed6:	4631      	mov	r1, r6
 800aed8:	4682      	mov	sl, r0
 800aeda:	f000 fc82 	bl	800b7e2 <__mcmp>
 800aede:	2800      	cmp	r0, #0
 800aee0:	dc05      	bgt.n	800aeee <_dtoa_r+0xace>
 800aee2:	f47f af25 	bne.w	800ad30 <_dtoa_r+0x910>
 800aee6:	f019 0f01 	tst.w	r9, #1
 800aeea:	f43f af21 	beq.w	800ad30 <_dtoa_r+0x910>
 800aeee:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800aef2:	f47f af1b 	bne.w	800ad2c <_dtoa_r+0x90c>
 800aef6:	2339      	movs	r3, #57	; 0x39
 800aef8:	f108 0801 	add.w	r8, r8, #1
 800aefc:	f808 3c01 	strb.w	r3, [r8, #-1]
 800af00:	4645      	mov	r5, r8
 800af02:	f815 3c01 	ldrb.w	r3, [r5, #-1]
 800af06:	1e6a      	subs	r2, r5, #1
 800af08:	2b39      	cmp	r3, #57	; 0x39
 800af0a:	d03a      	beq.n	800af82 <_dtoa_r+0xb62>
 800af0c:	3301      	adds	r3, #1
 800af0e:	e03f      	b.n	800af90 <_dtoa_r+0xb70>
 800af10:	2b00      	cmp	r3, #0
 800af12:	f108 0501 	add.w	r5, r8, #1
 800af16:	dd05      	ble.n	800af24 <_dtoa_r+0xb04>
 800af18:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
 800af1c:	d0eb      	beq.n	800aef6 <_dtoa_r+0xad6>
 800af1e:	f109 0901 	add.w	r9, r9, #1
 800af22:	e707      	b.n	800ad34 <_dtoa_r+0x914>
 800af24:	9b06      	ldr	r3, [sp, #24]
 800af26:	9a04      	ldr	r2, [sp, #16]
 800af28:	1aeb      	subs	r3, r5, r3
 800af2a:	4293      	cmp	r3, r2
 800af2c:	46a8      	mov	r8, r5
 800af2e:	f805 9c01 	strb.w	r9, [r5, #-1]
 800af32:	d0a5      	beq.n	800ae80 <_dtoa_r+0xa60>
 800af34:	4651      	mov	r1, sl
 800af36:	2300      	movs	r3, #0
 800af38:	220a      	movs	r2, #10
 800af3a:	4620      	mov	r0, r4
 800af3c:	f000 fa93 	bl	800b466 <__multadd>
 800af40:	9b07      	ldr	r3, [sp, #28]
 800af42:	4682      	mov	sl, r0
 800af44:	42bb      	cmp	r3, r7
 800af46:	f04f 020a 	mov.w	r2, #10
 800af4a:	f04f 0300 	mov.w	r3, #0
 800af4e:	9907      	ldr	r1, [sp, #28]
 800af50:	4620      	mov	r0, r4
 800af52:	d104      	bne.n	800af5e <_dtoa_r+0xb3e>
 800af54:	f000 fa87 	bl	800b466 <__multadd>
 800af58:	9007      	str	r0, [sp, #28]
 800af5a:	4607      	mov	r7, r0
 800af5c:	e6b1      	b.n	800acc2 <_dtoa_r+0x8a2>
 800af5e:	f000 fa82 	bl	800b466 <__multadd>
 800af62:	2300      	movs	r3, #0
 800af64:	9007      	str	r0, [sp, #28]
 800af66:	220a      	movs	r2, #10
 800af68:	4639      	mov	r1, r7
 800af6a:	4620      	mov	r0, r4
 800af6c:	f000 fa7b 	bl	800b466 <__multadd>
 800af70:	e7f3      	b.n	800af5a <_dtoa_r+0xb3a>
 800af72:	4651      	mov	r1, sl
 800af74:	2300      	movs	r3, #0
 800af76:	220a      	movs	r2, #10
 800af78:	4620      	mov	r0, r4
 800af7a:	f000 fa74 	bl	800b466 <__multadd>
 800af7e:	4682      	mov	sl, r0
 800af80:	e768      	b.n	800ae54 <_dtoa_r+0xa34>
 800af82:	9b06      	ldr	r3, [sp, #24]
 800af84:	4293      	cmp	r3, r2
 800af86:	d105      	bne.n	800af94 <_dtoa_r+0xb74>
 800af88:	2331      	movs	r3, #49	; 0x31
 800af8a:	9a06      	ldr	r2, [sp, #24]
 800af8c:	f10b 0b01 	add.w	fp, fp, #1
 800af90:	7013      	strb	r3, [r2, #0]
 800af92:	e73e      	b.n	800ae12 <_dtoa_r+0x9f2>
 800af94:	4615      	mov	r5, r2
 800af96:	e7b4      	b.n	800af02 <_dtoa_r+0xae2>
 800af98:	4b09      	ldr	r3, [pc, #36]	; (800afc0 <_dtoa_r+0xba0>)
 800af9a:	f7ff baa3 	b.w	800a4e4 <_dtoa_r+0xc4>
 800af9e:	9b22      	ldr	r3, [sp, #136]	; 0x88
 800afa0:	2b00      	cmp	r3, #0
 800afa2:	f47f aa7d 	bne.w	800a4a0 <_dtoa_r+0x80>
 800afa6:	4b07      	ldr	r3, [pc, #28]	; (800afc4 <_dtoa_r+0xba4>)
 800afa8:	f7ff ba9c 	b.w	800a4e4 <_dtoa_r+0xc4>
 800afac:	9b04      	ldr	r3, [sp, #16]
 800afae:	2b00      	cmp	r3, #0
 800afb0:	f73f af4f 	bgt.w	800ae52 <_dtoa_r+0xa32>
 800afb4:	9b1e      	ldr	r3, [sp, #120]	; 0x78
 800afb6:	2b02      	cmp	r3, #2
 800afb8:	f77f af4b 	ble.w	800ae52 <_dtoa_r+0xa32>
 800afbc:	e714      	b.n	800ade8 <_dtoa_r+0x9c8>
 800afbe:	bf00      	nop
 800afc0:	0800bfb8 	.word	0x0800bfb8
 800afc4:	0800bfdc 	.word	0x0800bfdc

0800afc8 <__sflush_r>:
 800afc8:	898a      	ldrh	r2, [r1, #12]
 800afca:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800afce:	4605      	mov	r5, r0
 800afd0:	0710      	lsls	r0, r2, #28
 800afd2:	460c      	mov	r4, r1
 800afd4:	d45a      	bmi.n	800b08c <__sflush_r+0xc4>
 800afd6:	684b      	ldr	r3, [r1, #4]
 800afd8:	2b00      	cmp	r3, #0
 800afda:	dc05      	bgt.n	800afe8 <__sflush_r+0x20>
 800afdc:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 800afde:	2b00      	cmp	r3, #0
 800afe0:	dc02      	bgt.n	800afe8 <__sflush_r+0x20>
 800afe2:	2000      	movs	r0, #0
 800afe4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800afe8:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800afea:	2e00      	cmp	r6, #0
 800afec:	d0f9      	beq.n	800afe2 <__sflush_r+0x1a>
 800afee:	2300      	movs	r3, #0
 800aff0:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 800aff4:	682f      	ldr	r7, [r5, #0]
 800aff6:	602b      	str	r3, [r5, #0]
 800aff8:	d033      	beq.n	800b062 <__sflush_r+0x9a>
 800affa:	6d60      	ldr	r0, [r4, #84]	; 0x54
 800affc:	89a3      	ldrh	r3, [r4, #12]
 800affe:	075a      	lsls	r2, r3, #29
 800b000:	d505      	bpl.n	800b00e <__sflush_r+0x46>
 800b002:	6863      	ldr	r3, [r4, #4]
 800b004:	1ac0      	subs	r0, r0, r3
 800b006:	6b63      	ldr	r3, [r4, #52]	; 0x34
 800b008:	b10b      	cbz	r3, 800b00e <__sflush_r+0x46>
 800b00a:	6c23      	ldr	r3, [r4, #64]	; 0x40
 800b00c:	1ac0      	subs	r0, r0, r3
 800b00e:	2300      	movs	r3, #0
 800b010:	4602      	mov	r2, r0
 800b012:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800b014:	6a21      	ldr	r1, [r4, #32]
 800b016:	4628      	mov	r0, r5
 800b018:	47b0      	blx	r6
 800b01a:	1c43      	adds	r3, r0, #1
 800b01c:	89a3      	ldrh	r3, [r4, #12]
 800b01e:	d106      	bne.n	800b02e <__sflush_r+0x66>
 800b020:	6829      	ldr	r1, [r5, #0]
 800b022:	291d      	cmp	r1, #29
 800b024:	d84b      	bhi.n	800b0be <__sflush_r+0xf6>
 800b026:	4a2b      	ldr	r2, [pc, #172]	; (800b0d4 <__sflush_r+0x10c>)
 800b028:	40ca      	lsrs	r2, r1
 800b02a:	07d6      	lsls	r6, r2, #31
 800b02c:	d547      	bpl.n	800b0be <__sflush_r+0xf6>
 800b02e:	2200      	movs	r2, #0
 800b030:	6062      	str	r2, [r4, #4]
 800b032:	6922      	ldr	r2, [r4, #16]
 800b034:	04d9      	lsls	r1, r3, #19
 800b036:	6022      	str	r2, [r4, #0]
 800b038:	d504      	bpl.n	800b044 <__sflush_r+0x7c>
 800b03a:	1c42      	adds	r2, r0, #1
 800b03c:	d101      	bne.n	800b042 <__sflush_r+0x7a>
 800b03e:	682b      	ldr	r3, [r5, #0]
 800b040:	b903      	cbnz	r3, 800b044 <__sflush_r+0x7c>
 800b042:	6560      	str	r0, [r4, #84]	; 0x54
 800b044:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800b046:	602f      	str	r7, [r5, #0]
 800b048:	2900      	cmp	r1, #0
 800b04a:	d0ca      	beq.n	800afe2 <__sflush_r+0x1a>
 800b04c:	f104 0344 	add.w	r3, r4, #68	; 0x44
 800b050:	4299      	cmp	r1, r3
 800b052:	d002      	beq.n	800b05a <__sflush_r+0x92>
 800b054:	4628      	mov	r0, r5
 800b056:	f000 fc9b 	bl	800b990 <_free_r>
 800b05a:	2000      	movs	r0, #0
 800b05c:	6360      	str	r0, [r4, #52]	; 0x34
 800b05e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800b062:	6a21      	ldr	r1, [r4, #32]
 800b064:	2301      	movs	r3, #1
 800b066:	4628      	mov	r0, r5
 800b068:	47b0      	blx	r6
 800b06a:	1c41      	adds	r1, r0, #1
 800b06c:	d1c6      	bne.n	800affc <__sflush_r+0x34>
 800b06e:	682b      	ldr	r3, [r5, #0]
 800b070:	2b00      	cmp	r3, #0
 800b072:	d0c3      	beq.n	800affc <__sflush_r+0x34>
 800b074:	2b1d      	cmp	r3, #29
 800b076:	d001      	beq.n	800b07c <__sflush_r+0xb4>
 800b078:	2b16      	cmp	r3, #22
 800b07a:	d101      	bne.n	800b080 <__sflush_r+0xb8>
 800b07c:	602f      	str	r7, [r5, #0]
 800b07e:	e7b0      	b.n	800afe2 <__sflush_r+0x1a>
 800b080:	89a3      	ldrh	r3, [r4, #12]
 800b082:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800b086:	81a3      	strh	r3, [r4, #12]
 800b088:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800b08c:	690f      	ldr	r7, [r1, #16]
 800b08e:	2f00      	cmp	r7, #0
 800b090:	d0a7      	beq.n	800afe2 <__sflush_r+0x1a>
 800b092:	0793      	lsls	r3, r2, #30
 800b094:	bf18      	it	ne
 800b096:	2300      	movne	r3, #0
 800b098:	680e      	ldr	r6, [r1, #0]
 800b09a:	bf08      	it	eq
 800b09c:	694b      	ldreq	r3, [r1, #20]
 800b09e:	eba6 0807 	sub.w	r8, r6, r7
 800b0a2:	600f      	str	r7, [r1, #0]
 800b0a4:	608b      	str	r3, [r1, #8]
 800b0a6:	f1b8 0f00 	cmp.w	r8, #0
 800b0aa:	dd9a      	ble.n	800afe2 <__sflush_r+0x1a>
 800b0ac:	4643      	mov	r3, r8
 800b0ae:	463a      	mov	r2, r7
 800b0b0:	6a21      	ldr	r1, [r4, #32]
 800b0b2:	4628      	mov	r0, r5
 800b0b4:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 800b0b6:	47b0      	blx	r6
 800b0b8:	2800      	cmp	r0, #0
 800b0ba:	dc07      	bgt.n	800b0cc <__sflush_r+0x104>
 800b0bc:	89a3      	ldrh	r3, [r4, #12]
 800b0be:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800b0c2:	81a3      	strh	r3, [r4, #12]
 800b0c4:	f04f 30ff 	mov.w	r0, #4294967295
 800b0c8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800b0cc:	4407      	add	r7, r0
 800b0ce:	eba8 0800 	sub.w	r8, r8, r0
 800b0d2:	e7e8      	b.n	800b0a6 <__sflush_r+0xde>
 800b0d4:	20400001 	.word	0x20400001

0800b0d8 <_fflush_r>:
 800b0d8:	b538      	push	{r3, r4, r5, lr}
 800b0da:	690b      	ldr	r3, [r1, #16]
 800b0dc:	4605      	mov	r5, r0
 800b0de:	460c      	mov	r4, r1
 800b0e0:	b1db      	cbz	r3, 800b11a <_fflush_r+0x42>
 800b0e2:	b118      	cbz	r0, 800b0ec <_fflush_r+0x14>
 800b0e4:	6983      	ldr	r3, [r0, #24]
 800b0e6:	b90b      	cbnz	r3, 800b0ec <_fflush_r+0x14>
 800b0e8:	f000 f860 	bl	800b1ac <__sinit>
 800b0ec:	4b0c      	ldr	r3, [pc, #48]	; (800b120 <_fflush_r+0x48>)
 800b0ee:	429c      	cmp	r4, r3
 800b0f0:	d109      	bne.n	800b106 <_fflush_r+0x2e>
 800b0f2:	686c      	ldr	r4, [r5, #4]
 800b0f4:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800b0f8:	b17b      	cbz	r3, 800b11a <_fflush_r+0x42>
 800b0fa:	4621      	mov	r1, r4
 800b0fc:	4628      	mov	r0, r5
 800b0fe:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800b102:	f7ff bf61 	b.w	800afc8 <__sflush_r>
 800b106:	4b07      	ldr	r3, [pc, #28]	; (800b124 <_fflush_r+0x4c>)
 800b108:	429c      	cmp	r4, r3
 800b10a:	d101      	bne.n	800b110 <_fflush_r+0x38>
 800b10c:	68ac      	ldr	r4, [r5, #8]
 800b10e:	e7f1      	b.n	800b0f4 <_fflush_r+0x1c>
 800b110:	4b05      	ldr	r3, [pc, #20]	; (800b128 <_fflush_r+0x50>)
 800b112:	429c      	cmp	r4, r3
 800b114:	bf08      	it	eq
 800b116:	68ec      	ldreq	r4, [r5, #12]
 800b118:	e7ec      	b.n	800b0f4 <_fflush_r+0x1c>
 800b11a:	2000      	movs	r0, #0
 800b11c:	bd38      	pop	{r3, r4, r5, pc}
 800b11e:	bf00      	nop
 800b120:	0800c00c 	.word	0x0800c00c
 800b124:	0800c02c 	.word	0x0800c02c
 800b128:	0800bfec 	.word	0x0800bfec

0800b12c <_cleanup_r>:
 800b12c:	4901      	ldr	r1, [pc, #4]	; (800b134 <_cleanup_r+0x8>)
 800b12e:	f000 b8a9 	b.w	800b284 <_fwalk_reent>
 800b132:	bf00      	nop
 800b134:	0800b0d9 	.word	0x0800b0d9

0800b138 <std.isra.0>:
 800b138:	2300      	movs	r3, #0
 800b13a:	b510      	push	{r4, lr}
 800b13c:	4604      	mov	r4, r0
 800b13e:	6003      	str	r3, [r0, #0]
 800b140:	6043      	str	r3, [r0, #4]
 800b142:	6083      	str	r3, [r0, #8]
 800b144:	8181      	strh	r1, [r0, #12]
 800b146:	6643      	str	r3, [r0, #100]	; 0x64
 800b148:	81c2      	strh	r2, [r0, #14]
 800b14a:	6103      	str	r3, [r0, #16]
 800b14c:	6143      	str	r3, [r0, #20]
 800b14e:	6183      	str	r3, [r0, #24]
 800b150:	4619      	mov	r1, r3
 800b152:	2208      	movs	r2, #8
 800b154:	305c      	adds	r0, #92	; 0x5c
 800b156:	f7fe fa7a 	bl	800964e <memset>
 800b15a:	4b05      	ldr	r3, [pc, #20]	; (800b170 <std.isra.0+0x38>)
 800b15c:	6224      	str	r4, [r4, #32]
 800b15e:	6263      	str	r3, [r4, #36]	; 0x24
 800b160:	4b04      	ldr	r3, [pc, #16]	; (800b174 <std.isra.0+0x3c>)
 800b162:	62a3      	str	r3, [r4, #40]	; 0x28
 800b164:	4b04      	ldr	r3, [pc, #16]	; (800b178 <std.isra.0+0x40>)
 800b166:	62e3      	str	r3, [r4, #44]	; 0x2c
 800b168:	4b04      	ldr	r3, [pc, #16]	; (800b17c <std.isra.0+0x44>)
 800b16a:	6323      	str	r3, [r4, #48]	; 0x30
 800b16c:	bd10      	pop	{r4, pc}
 800b16e:	bf00      	nop
 800b170:	0800bd81 	.word	0x0800bd81
 800b174:	0800bda3 	.word	0x0800bda3
 800b178:	0800bddb 	.word	0x0800bddb
 800b17c:	0800bdff 	.word	0x0800bdff

0800b180 <__sfmoreglue>:
 800b180:	b570      	push	{r4, r5, r6, lr}
 800b182:	2568      	movs	r5, #104	; 0x68
 800b184:	1e4a      	subs	r2, r1, #1
 800b186:	4355      	muls	r5, r2
 800b188:	460e      	mov	r6, r1
 800b18a:	f105 0174 	add.w	r1, r5, #116	; 0x74
 800b18e:	f000 fc4b 	bl	800ba28 <_malloc_r>
 800b192:	4604      	mov	r4, r0
 800b194:	b140      	cbz	r0, 800b1a8 <__sfmoreglue+0x28>
 800b196:	2100      	movs	r1, #0
 800b198:	e880 0042 	stmia.w	r0, {r1, r6}
 800b19c:	300c      	adds	r0, #12
 800b19e:	60a0      	str	r0, [r4, #8]
 800b1a0:	f105 0268 	add.w	r2, r5, #104	; 0x68
 800b1a4:	f7fe fa53 	bl	800964e <memset>
 800b1a8:	4620      	mov	r0, r4
 800b1aa:	bd70      	pop	{r4, r5, r6, pc}

0800b1ac <__sinit>:
 800b1ac:	6983      	ldr	r3, [r0, #24]
 800b1ae:	b510      	push	{r4, lr}
 800b1b0:	4604      	mov	r4, r0
 800b1b2:	bb33      	cbnz	r3, 800b202 <__sinit+0x56>
 800b1b4:	6483      	str	r3, [r0, #72]	; 0x48
 800b1b6:	64c3      	str	r3, [r0, #76]	; 0x4c
 800b1b8:	6503      	str	r3, [r0, #80]	; 0x50
 800b1ba:	4b12      	ldr	r3, [pc, #72]	; (800b204 <__sinit+0x58>)
 800b1bc:	4a12      	ldr	r2, [pc, #72]	; (800b208 <__sinit+0x5c>)
 800b1be:	681b      	ldr	r3, [r3, #0]
 800b1c0:	6282      	str	r2, [r0, #40]	; 0x28
 800b1c2:	4298      	cmp	r0, r3
 800b1c4:	bf04      	itt	eq
 800b1c6:	2301      	moveq	r3, #1
 800b1c8:	6183      	streq	r3, [r0, #24]
 800b1ca:	f000 f81f 	bl	800b20c <__sfp>
 800b1ce:	6060      	str	r0, [r4, #4]
 800b1d0:	4620      	mov	r0, r4
 800b1d2:	f000 f81b 	bl	800b20c <__sfp>
 800b1d6:	60a0      	str	r0, [r4, #8]
 800b1d8:	4620      	mov	r0, r4
 800b1da:	f000 f817 	bl	800b20c <__sfp>
 800b1de:	2200      	movs	r2, #0
 800b1e0:	60e0      	str	r0, [r4, #12]
 800b1e2:	2104      	movs	r1, #4
 800b1e4:	6860      	ldr	r0, [r4, #4]
 800b1e6:	f7ff ffa7 	bl	800b138 <std.isra.0>
 800b1ea:	2201      	movs	r2, #1
 800b1ec:	2109      	movs	r1, #9
 800b1ee:	68a0      	ldr	r0, [r4, #8]
 800b1f0:	f7ff ffa2 	bl	800b138 <std.isra.0>
 800b1f4:	2202      	movs	r2, #2
 800b1f6:	2112      	movs	r1, #18
 800b1f8:	68e0      	ldr	r0, [r4, #12]
 800b1fa:	f7ff ff9d 	bl	800b138 <std.isra.0>
 800b1fe:	2301      	movs	r3, #1
 800b200:	61a3      	str	r3, [r4, #24]
 800b202:	bd10      	pop	{r4, pc}
 800b204:	0800bfa4 	.word	0x0800bfa4
 800b208:	0800b12d 	.word	0x0800b12d

0800b20c <__sfp>:
 800b20c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800b20e:	4b1c      	ldr	r3, [pc, #112]	; (800b280 <__sfp+0x74>)
 800b210:	4607      	mov	r7, r0
 800b212:	681e      	ldr	r6, [r3, #0]
 800b214:	69b3      	ldr	r3, [r6, #24]
 800b216:	b913      	cbnz	r3, 800b21e <__sfp+0x12>
 800b218:	4630      	mov	r0, r6
 800b21a:	f7ff ffc7 	bl	800b1ac <__sinit>
 800b21e:	3648      	adds	r6, #72	; 0x48
 800b220:	68b4      	ldr	r4, [r6, #8]
 800b222:	6873      	ldr	r3, [r6, #4]
 800b224:	3b01      	subs	r3, #1
 800b226:	d503      	bpl.n	800b230 <__sfp+0x24>
 800b228:	6833      	ldr	r3, [r6, #0]
 800b22a:	b133      	cbz	r3, 800b23a <__sfp+0x2e>
 800b22c:	6836      	ldr	r6, [r6, #0]
 800b22e:	e7f7      	b.n	800b220 <__sfp+0x14>
 800b230:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 800b234:	b16d      	cbz	r5, 800b252 <__sfp+0x46>
 800b236:	3468      	adds	r4, #104	; 0x68
 800b238:	e7f4      	b.n	800b224 <__sfp+0x18>
 800b23a:	2104      	movs	r1, #4
 800b23c:	4638      	mov	r0, r7
 800b23e:	f7ff ff9f 	bl	800b180 <__sfmoreglue>
 800b242:	6030      	str	r0, [r6, #0]
 800b244:	2800      	cmp	r0, #0
 800b246:	d1f1      	bne.n	800b22c <__sfp+0x20>
 800b248:	230c      	movs	r3, #12
 800b24a:	4604      	mov	r4, r0
 800b24c:	603b      	str	r3, [r7, #0]
 800b24e:	4620      	mov	r0, r4
 800b250:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 800b252:	f64f 73ff 	movw	r3, #65535	; 0xffff
 800b256:	81e3      	strh	r3, [r4, #14]
 800b258:	2301      	movs	r3, #1
 800b25a:	6665      	str	r5, [r4, #100]	; 0x64
 800b25c:	81a3      	strh	r3, [r4, #12]
 800b25e:	6025      	str	r5, [r4, #0]
 800b260:	60a5      	str	r5, [r4, #8]
 800b262:	6065      	str	r5, [r4, #4]
 800b264:	6125      	str	r5, [r4, #16]
 800b266:	6165      	str	r5, [r4, #20]
 800b268:	61a5      	str	r5, [r4, #24]
 800b26a:	2208      	movs	r2, #8
 800b26c:	4629      	mov	r1, r5
 800b26e:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 800b272:	f7fe f9ec 	bl	800964e <memset>
 800b276:	6365      	str	r5, [r4, #52]	; 0x34
 800b278:	63a5      	str	r5, [r4, #56]	; 0x38
 800b27a:	64a5      	str	r5, [r4, #72]	; 0x48
 800b27c:	64e5      	str	r5, [r4, #76]	; 0x4c
 800b27e:	e7e6      	b.n	800b24e <__sfp+0x42>
 800b280:	0800bfa4 	.word	0x0800bfa4

0800b284 <_fwalk_reent>:
 800b284:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800b288:	4680      	mov	r8, r0
 800b28a:	4689      	mov	r9, r1
 800b28c:	2600      	movs	r6, #0
 800b28e:	f100 0448 	add.w	r4, r0, #72	; 0x48
 800b292:	b914      	cbnz	r4, 800b29a <_fwalk_reent+0x16>
 800b294:	4630      	mov	r0, r6
 800b296:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800b29a:	68a5      	ldr	r5, [r4, #8]
 800b29c:	6867      	ldr	r7, [r4, #4]
 800b29e:	3f01      	subs	r7, #1
 800b2a0:	d501      	bpl.n	800b2a6 <_fwalk_reent+0x22>
 800b2a2:	6824      	ldr	r4, [r4, #0]
 800b2a4:	e7f5      	b.n	800b292 <_fwalk_reent+0xe>
 800b2a6:	89ab      	ldrh	r3, [r5, #12]
 800b2a8:	2b01      	cmp	r3, #1
 800b2aa:	d907      	bls.n	800b2bc <_fwalk_reent+0x38>
 800b2ac:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 800b2b0:	3301      	adds	r3, #1
 800b2b2:	d003      	beq.n	800b2bc <_fwalk_reent+0x38>
 800b2b4:	4629      	mov	r1, r5
 800b2b6:	4640      	mov	r0, r8
 800b2b8:	47c8      	blx	r9
 800b2ba:	4306      	orrs	r6, r0
 800b2bc:	3568      	adds	r5, #104	; 0x68
 800b2be:	e7ee      	b.n	800b29e <_fwalk_reent+0x1a>

0800b2c0 <_localeconv_r>:
 800b2c0:	4b04      	ldr	r3, [pc, #16]	; (800b2d4 <_localeconv_r+0x14>)
 800b2c2:	681b      	ldr	r3, [r3, #0]
 800b2c4:	6a18      	ldr	r0, [r3, #32]
 800b2c6:	4b04      	ldr	r3, [pc, #16]	; (800b2d8 <_localeconv_r+0x18>)
 800b2c8:	2800      	cmp	r0, #0
 800b2ca:	bf08      	it	eq
 800b2cc:	4618      	moveq	r0, r3
 800b2ce:	30f0      	adds	r0, #240	; 0xf0
 800b2d0:	4770      	bx	lr
 800b2d2:	bf00      	nop
 800b2d4:	2000024c 	.word	0x2000024c
 800b2d8:	200002b0 	.word	0x200002b0

0800b2dc <__swhatbuf_r>:
 800b2dc:	b570      	push	{r4, r5, r6, lr}
 800b2de:	460e      	mov	r6, r1
 800b2e0:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800b2e4:	b090      	sub	sp, #64	; 0x40
 800b2e6:	2900      	cmp	r1, #0
 800b2e8:	4614      	mov	r4, r2
 800b2ea:	461d      	mov	r5, r3
 800b2ec:	da07      	bge.n	800b2fe <__swhatbuf_r+0x22>
 800b2ee:	2300      	movs	r3, #0
 800b2f0:	602b      	str	r3, [r5, #0]
 800b2f2:	89b3      	ldrh	r3, [r6, #12]
 800b2f4:	061a      	lsls	r2, r3, #24
 800b2f6:	d410      	bmi.n	800b31a <__swhatbuf_r+0x3e>
 800b2f8:	f44f 6380 	mov.w	r3, #1024	; 0x400
 800b2fc:	e00e      	b.n	800b31c <__swhatbuf_r+0x40>
 800b2fe:	aa01      	add	r2, sp, #4
 800b300:	f000 fda4 	bl	800be4c <_fstat_r>
 800b304:	2800      	cmp	r0, #0
 800b306:	dbf2      	blt.n	800b2ee <__swhatbuf_r+0x12>
 800b308:	9a02      	ldr	r2, [sp, #8]
 800b30a:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 800b30e:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 800b312:	425a      	negs	r2, r3
 800b314:	415a      	adcs	r2, r3
 800b316:	602a      	str	r2, [r5, #0]
 800b318:	e7ee      	b.n	800b2f8 <__swhatbuf_r+0x1c>
 800b31a:	2340      	movs	r3, #64	; 0x40
 800b31c:	2000      	movs	r0, #0
 800b31e:	6023      	str	r3, [r4, #0]
 800b320:	b010      	add	sp, #64	; 0x40
 800b322:	bd70      	pop	{r4, r5, r6, pc}

0800b324 <__smakebuf_r>:
 800b324:	898b      	ldrh	r3, [r1, #12]
 800b326:	b573      	push	{r0, r1, r4, r5, r6, lr}
 800b328:	079d      	lsls	r5, r3, #30
 800b32a:	4606      	mov	r6, r0
 800b32c:	460c      	mov	r4, r1
 800b32e:	d507      	bpl.n	800b340 <__smakebuf_r+0x1c>
 800b330:	f104 0347 	add.w	r3, r4, #71	; 0x47
 800b334:	6023      	str	r3, [r4, #0]
 800b336:	6123      	str	r3, [r4, #16]
 800b338:	2301      	movs	r3, #1
 800b33a:	6163      	str	r3, [r4, #20]
 800b33c:	b002      	add	sp, #8
 800b33e:	bd70      	pop	{r4, r5, r6, pc}
 800b340:	ab01      	add	r3, sp, #4
 800b342:	466a      	mov	r2, sp
 800b344:	f7ff ffca 	bl	800b2dc <__swhatbuf_r>
 800b348:	9900      	ldr	r1, [sp, #0]
 800b34a:	4605      	mov	r5, r0
 800b34c:	4630      	mov	r0, r6
 800b34e:	f000 fb6b 	bl	800ba28 <_malloc_r>
 800b352:	b948      	cbnz	r0, 800b368 <__smakebuf_r+0x44>
 800b354:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 800b358:	059a      	lsls	r2, r3, #22
 800b35a:	d4ef      	bmi.n	800b33c <__smakebuf_r+0x18>
 800b35c:	f023 0303 	bic.w	r3, r3, #3
 800b360:	f043 0302 	orr.w	r3, r3, #2
 800b364:	81a3      	strh	r3, [r4, #12]
 800b366:	e7e3      	b.n	800b330 <__smakebuf_r+0xc>
 800b368:	4b0d      	ldr	r3, [pc, #52]	; (800b3a0 <__smakebuf_r+0x7c>)
 800b36a:	62b3      	str	r3, [r6, #40]	; 0x28
 800b36c:	89a3      	ldrh	r3, [r4, #12]
 800b36e:	6020      	str	r0, [r4, #0]
 800b370:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 800b374:	81a3      	strh	r3, [r4, #12]
 800b376:	9b00      	ldr	r3, [sp, #0]
 800b378:	6120      	str	r0, [r4, #16]
 800b37a:	6163      	str	r3, [r4, #20]
 800b37c:	9b01      	ldr	r3, [sp, #4]
 800b37e:	b15b      	cbz	r3, 800b398 <__smakebuf_r+0x74>
 800b380:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800b384:	4630      	mov	r0, r6
 800b386:	f000 fd73 	bl	800be70 <_isatty_r>
 800b38a:	b128      	cbz	r0, 800b398 <__smakebuf_r+0x74>
 800b38c:	89a3      	ldrh	r3, [r4, #12]
 800b38e:	f023 0303 	bic.w	r3, r3, #3
 800b392:	f043 0301 	orr.w	r3, r3, #1
 800b396:	81a3      	strh	r3, [r4, #12]
 800b398:	89a3      	ldrh	r3, [r4, #12]
 800b39a:	431d      	orrs	r5, r3
 800b39c:	81a5      	strh	r5, [r4, #12]
 800b39e:	e7cd      	b.n	800b33c <__smakebuf_r+0x18>
 800b3a0:	0800b12d 	.word	0x0800b12d

0800b3a4 <malloc>:
 800b3a4:	4b02      	ldr	r3, [pc, #8]	; (800b3b0 <malloc+0xc>)
 800b3a6:	4601      	mov	r1, r0
 800b3a8:	6818      	ldr	r0, [r3, #0]
 800b3aa:	f000 bb3d 	b.w	800ba28 <_malloc_r>
 800b3ae:	bf00      	nop
 800b3b0:	2000024c 	.word	0x2000024c

0800b3b4 <memchr>:
 800b3b4:	b510      	push	{r4, lr}
 800b3b6:	b2c9      	uxtb	r1, r1
 800b3b8:	4402      	add	r2, r0
 800b3ba:	4290      	cmp	r0, r2
 800b3bc:	4603      	mov	r3, r0
 800b3be:	d101      	bne.n	800b3c4 <memchr+0x10>
 800b3c0:	2000      	movs	r0, #0
 800b3c2:	bd10      	pop	{r4, pc}
 800b3c4:	781c      	ldrb	r4, [r3, #0]
 800b3c6:	3001      	adds	r0, #1
 800b3c8:	428c      	cmp	r4, r1
 800b3ca:	d1f6      	bne.n	800b3ba <memchr+0x6>
 800b3cc:	4618      	mov	r0, r3
 800b3ce:	bd10      	pop	{r4, pc}

0800b3d0 <_Balloc>:
 800b3d0:	b570      	push	{r4, r5, r6, lr}
 800b3d2:	6a45      	ldr	r5, [r0, #36]	; 0x24
 800b3d4:	4604      	mov	r4, r0
 800b3d6:	460e      	mov	r6, r1
 800b3d8:	b93d      	cbnz	r5, 800b3ea <_Balloc+0x1a>
 800b3da:	2010      	movs	r0, #16
 800b3dc:	f7ff ffe2 	bl	800b3a4 <malloc>
 800b3e0:	6260      	str	r0, [r4, #36]	; 0x24
 800b3e2:	6045      	str	r5, [r0, #4]
 800b3e4:	6085      	str	r5, [r0, #8]
 800b3e6:	6005      	str	r5, [r0, #0]
 800b3e8:	60c5      	str	r5, [r0, #12]
 800b3ea:	6a65      	ldr	r5, [r4, #36]	; 0x24
 800b3ec:	68eb      	ldr	r3, [r5, #12]
 800b3ee:	b183      	cbz	r3, 800b412 <_Balloc+0x42>
 800b3f0:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800b3f2:	68db      	ldr	r3, [r3, #12]
 800b3f4:	f853 0026 	ldr.w	r0, [r3, r6, lsl #2]
 800b3f8:	b9b8      	cbnz	r0, 800b42a <_Balloc+0x5a>
 800b3fa:	2101      	movs	r1, #1
 800b3fc:	fa01 f506 	lsl.w	r5, r1, r6
 800b400:	1d6a      	adds	r2, r5, #5
 800b402:	0092      	lsls	r2, r2, #2
 800b404:	4620      	mov	r0, r4
 800b406:	f000 fab4 	bl	800b972 <_calloc_r>
 800b40a:	b160      	cbz	r0, 800b426 <_Balloc+0x56>
 800b40c:	6046      	str	r6, [r0, #4]
 800b40e:	6085      	str	r5, [r0, #8]
 800b410:	e00e      	b.n	800b430 <_Balloc+0x60>
 800b412:	2221      	movs	r2, #33	; 0x21
 800b414:	2104      	movs	r1, #4
 800b416:	4620      	mov	r0, r4
 800b418:	f000 faab 	bl	800b972 <_calloc_r>
 800b41c:	6a63      	ldr	r3, [r4, #36]	; 0x24
 800b41e:	60e8      	str	r0, [r5, #12]
 800b420:	68db      	ldr	r3, [r3, #12]
 800b422:	2b00      	cmp	r3, #0
 800b424:	d1e4      	bne.n	800b3f0 <_Balloc+0x20>
 800b426:	2000      	movs	r0, #0
 800b428:	bd70      	pop	{r4, r5, r6, pc}
 800b42a:	6802      	ldr	r2, [r0, #0]
 800b42c:	f843 2026 	str.w	r2, [r3, r6, lsl #2]
 800b430:	2300      	movs	r3, #0
 800b432:	6103      	str	r3, [r0, #16]
 800b434:	60c3      	str	r3, [r0, #12]
 800b436:	bd70      	pop	{r4, r5, r6, pc}

0800b438 <_Bfree>:
 800b438:	b570      	push	{r4, r5, r6, lr}
 800b43a:	6a44      	ldr	r4, [r0, #36]	; 0x24
 800b43c:	4606      	mov	r6, r0
 800b43e:	460d      	mov	r5, r1
 800b440:	b93c      	cbnz	r4, 800b452 <_Bfree+0x1a>
 800b442:	2010      	movs	r0, #16
 800b444:	f7ff ffae 	bl	800b3a4 <malloc>
 800b448:	6270      	str	r0, [r6, #36]	; 0x24
 800b44a:	6044      	str	r4, [r0, #4]
 800b44c:	6084      	str	r4, [r0, #8]
 800b44e:	6004      	str	r4, [r0, #0]
 800b450:	60c4      	str	r4, [r0, #12]
 800b452:	b13d      	cbz	r5, 800b464 <_Bfree+0x2c>
 800b454:	6a73      	ldr	r3, [r6, #36]	; 0x24
 800b456:	686a      	ldr	r2, [r5, #4]
 800b458:	68db      	ldr	r3, [r3, #12]
 800b45a:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 800b45e:	6029      	str	r1, [r5, #0]
 800b460:	f843 5022 	str.w	r5, [r3, r2, lsl #2]
 800b464:	bd70      	pop	{r4, r5, r6, pc}

0800b466 <__multadd>:
 800b466:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800b46a:	461f      	mov	r7, r3
 800b46c:	4606      	mov	r6, r0
 800b46e:	460c      	mov	r4, r1
 800b470:	2300      	movs	r3, #0
 800b472:	690d      	ldr	r5, [r1, #16]
 800b474:	f101 0e14 	add.w	lr, r1, #20
 800b478:	f8de 0000 	ldr.w	r0, [lr]
 800b47c:	3301      	adds	r3, #1
 800b47e:	b281      	uxth	r1, r0
 800b480:	fb02 7101 	mla	r1, r2, r1, r7
 800b484:	0c00      	lsrs	r0, r0, #16
 800b486:	0c0f      	lsrs	r7, r1, #16
 800b488:	fb02 7000 	mla	r0, r2, r0, r7
 800b48c:	b289      	uxth	r1, r1
 800b48e:	eb01 4100 	add.w	r1, r1, r0, lsl #16
 800b492:	429d      	cmp	r5, r3
 800b494:	ea4f 4710 	mov.w	r7, r0, lsr #16
 800b498:	f84e 1b04 	str.w	r1, [lr], #4
 800b49c:	dcec      	bgt.n	800b478 <__multadd+0x12>
 800b49e:	b1d7      	cbz	r7, 800b4d6 <__multadd+0x70>
 800b4a0:	68a3      	ldr	r3, [r4, #8]
 800b4a2:	429d      	cmp	r5, r3
 800b4a4:	db12      	blt.n	800b4cc <__multadd+0x66>
 800b4a6:	6861      	ldr	r1, [r4, #4]
 800b4a8:	4630      	mov	r0, r6
 800b4aa:	3101      	adds	r1, #1
 800b4ac:	f7ff ff90 	bl	800b3d0 <_Balloc>
 800b4b0:	4680      	mov	r8, r0
 800b4b2:	6922      	ldr	r2, [r4, #16]
 800b4b4:	f104 010c 	add.w	r1, r4, #12
 800b4b8:	3202      	adds	r2, #2
 800b4ba:	0092      	lsls	r2, r2, #2
 800b4bc:	300c      	adds	r0, #12
 800b4be:	f7fe f8bb 	bl	8009638 <memcpy>
 800b4c2:	4621      	mov	r1, r4
 800b4c4:	4630      	mov	r0, r6
 800b4c6:	f7ff ffb7 	bl	800b438 <_Bfree>
 800b4ca:	4644      	mov	r4, r8
 800b4cc:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 800b4d0:	3501      	adds	r5, #1
 800b4d2:	615f      	str	r7, [r3, #20]
 800b4d4:	6125      	str	r5, [r4, #16]
 800b4d6:	4620      	mov	r0, r4
 800b4d8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

0800b4dc <__hi0bits>:
 800b4dc:	0c02      	lsrs	r2, r0, #16
 800b4de:	0412      	lsls	r2, r2, #16
 800b4e0:	4603      	mov	r3, r0
 800b4e2:	b9b2      	cbnz	r2, 800b512 <__hi0bits+0x36>
 800b4e4:	0403      	lsls	r3, r0, #16
 800b4e6:	2010      	movs	r0, #16
 800b4e8:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
 800b4ec:	bf04      	itt	eq
 800b4ee:	021b      	lsleq	r3, r3, #8
 800b4f0:	3008      	addeq	r0, #8
 800b4f2:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
 800b4f6:	bf04      	itt	eq
 800b4f8:	011b      	lsleq	r3, r3, #4
 800b4fa:	3004      	addeq	r0, #4
 800b4fc:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
 800b500:	bf04      	itt	eq
 800b502:	009b      	lsleq	r3, r3, #2
 800b504:	3002      	addeq	r0, #2
 800b506:	2b00      	cmp	r3, #0
 800b508:	db06      	blt.n	800b518 <__hi0bits+0x3c>
 800b50a:	005b      	lsls	r3, r3, #1
 800b50c:	d503      	bpl.n	800b516 <__hi0bits+0x3a>
 800b50e:	3001      	adds	r0, #1
 800b510:	4770      	bx	lr
 800b512:	2000      	movs	r0, #0
 800b514:	e7e8      	b.n	800b4e8 <__hi0bits+0xc>
 800b516:	2020      	movs	r0, #32
 800b518:	4770      	bx	lr

0800b51a <__lo0bits>:
 800b51a:	6803      	ldr	r3, [r0, #0]
 800b51c:	4601      	mov	r1, r0
 800b51e:	f013 0207 	ands.w	r2, r3, #7
 800b522:	d00b      	beq.n	800b53c <__lo0bits+0x22>
 800b524:	07da      	lsls	r2, r3, #31
 800b526:	d423      	bmi.n	800b570 <__lo0bits+0x56>
 800b528:	0798      	lsls	r0, r3, #30
 800b52a:	bf49      	itett	mi
 800b52c:	085b      	lsrmi	r3, r3, #1
 800b52e:	089b      	lsrpl	r3, r3, #2
 800b530:	2001      	movmi	r0, #1
 800b532:	600b      	strmi	r3, [r1, #0]
 800b534:	bf5c      	itt	pl
 800b536:	600b      	strpl	r3, [r1, #0]
 800b538:	2002      	movpl	r0, #2
 800b53a:	4770      	bx	lr
 800b53c:	b298      	uxth	r0, r3
 800b53e:	b9a8      	cbnz	r0, 800b56c <__lo0bits+0x52>
 800b540:	2010      	movs	r0, #16
 800b542:	0c1b      	lsrs	r3, r3, #16
 800b544:	f013 0fff 	tst.w	r3, #255	; 0xff
 800b548:	bf04      	itt	eq
 800b54a:	0a1b      	lsreq	r3, r3, #8
 800b54c:	3008      	addeq	r0, #8
 800b54e:	071a      	lsls	r2, r3, #28
 800b550:	bf04      	itt	eq
 800b552:	091b      	lsreq	r3, r3, #4
 800b554:	3004      	addeq	r0, #4
 800b556:	079a      	lsls	r2, r3, #30
 800b558:	bf04      	itt	eq
 800b55a:	089b      	lsreq	r3, r3, #2
 800b55c:	3002      	addeq	r0, #2
 800b55e:	07da      	lsls	r2, r3, #31
 800b560:	d402      	bmi.n	800b568 <__lo0bits+0x4e>
 800b562:	085b      	lsrs	r3, r3, #1
 800b564:	d006      	beq.n	800b574 <__lo0bits+0x5a>
 800b566:	3001      	adds	r0, #1
 800b568:	600b      	str	r3, [r1, #0]
 800b56a:	4770      	bx	lr
 800b56c:	4610      	mov	r0, r2
 800b56e:	e7e9      	b.n	800b544 <__lo0bits+0x2a>
 800b570:	2000      	movs	r0, #0
 800b572:	4770      	bx	lr
 800b574:	2020      	movs	r0, #32
 800b576:	4770      	bx	lr

0800b578 <__i2b>:
 800b578:	b510      	push	{r4, lr}
 800b57a:	460c      	mov	r4, r1
 800b57c:	2101      	movs	r1, #1
 800b57e:	f7ff ff27 	bl	800b3d0 <_Balloc>
 800b582:	2201      	movs	r2, #1
 800b584:	6144      	str	r4, [r0, #20]
 800b586:	6102      	str	r2, [r0, #16]
 800b588:	bd10      	pop	{r4, pc}

0800b58a <__multiply>:
 800b58a:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800b58e:	4614      	mov	r4, r2
 800b590:	690a      	ldr	r2, [r1, #16]
 800b592:	6923      	ldr	r3, [r4, #16]
 800b594:	4689      	mov	r9, r1
 800b596:	429a      	cmp	r2, r3
 800b598:	bfbe      	ittt	lt
 800b59a:	460b      	movlt	r3, r1
 800b59c:	46a1      	movlt	r9, r4
 800b59e:	461c      	movlt	r4, r3
 800b5a0:	f8d9 7010 	ldr.w	r7, [r9, #16]
 800b5a4:	f8d4 a010 	ldr.w	sl, [r4, #16]
 800b5a8:	f8d9 3008 	ldr.w	r3, [r9, #8]
 800b5ac:	f8d9 1004 	ldr.w	r1, [r9, #4]
 800b5b0:	eb07 060a 	add.w	r6, r7, sl
 800b5b4:	429e      	cmp	r6, r3
 800b5b6:	bfc8      	it	gt
 800b5b8:	3101      	addgt	r1, #1
 800b5ba:	f7ff ff09 	bl	800b3d0 <_Balloc>
 800b5be:	f100 0514 	add.w	r5, r0, #20
 800b5c2:	462b      	mov	r3, r5
 800b5c4:	2200      	movs	r2, #0
 800b5c6:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 800b5ca:	4543      	cmp	r3, r8
 800b5cc:	d316      	bcc.n	800b5fc <__multiply+0x72>
 800b5ce:	f104 0214 	add.w	r2, r4, #20
 800b5d2:	f109 0114 	add.w	r1, r9, #20
 800b5d6:	eb02 038a 	add.w	r3, r2, sl, lsl #2
 800b5da:	eb01 0787 	add.w	r7, r1, r7, lsl #2
 800b5de:	9301      	str	r3, [sp, #4]
 800b5e0:	9c01      	ldr	r4, [sp, #4]
 800b5e2:	4613      	mov	r3, r2
 800b5e4:	4294      	cmp	r4, r2
 800b5e6:	d80c      	bhi.n	800b602 <__multiply+0x78>
 800b5e8:	2e00      	cmp	r6, #0
 800b5ea:	dd03      	ble.n	800b5f4 <__multiply+0x6a>
 800b5ec:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 800b5f0:	2b00      	cmp	r3, #0
 800b5f2:	d054      	beq.n	800b69e <__multiply+0x114>
 800b5f4:	6106      	str	r6, [r0, #16]
 800b5f6:	b003      	add	sp, #12
 800b5f8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800b5fc:	f843 2b04 	str.w	r2, [r3], #4
 800b600:	e7e3      	b.n	800b5ca <__multiply+0x40>
 800b602:	f8b3 a000 	ldrh.w	sl, [r3]
 800b606:	3204      	adds	r2, #4
 800b608:	f1ba 0f00 	cmp.w	sl, #0
 800b60c:	d020      	beq.n	800b650 <__multiply+0xc6>
 800b60e:	46ae      	mov	lr, r5
 800b610:	4689      	mov	r9, r1
 800b612:	f04f 0c00 	mov.w	ip, #0
 800b616:	f859 4b04 	ldr.w	r4, [r9], #4
 800b61a:	f8be b000 	ldrh.w	fp, [lr]
 800b61e:	b2a3      	uxth	r3, r4
 800b620:	fb0a b303 	mla	r3, sl, r3, fp
 800b624:	ea4f 4b14 	mov.w	fp, r4, lsr #16
 800b628:	f8de 4000 	ldr.w	r4, [lr]
 800b62c:	4463      	add	r3, ip
 800b62e:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 800b632:	fb0a c40b 	mla	r4, sl, fp, ip
 800b636:	eb04 4413 	add.w	r4, r4, r3, lsr #16
 800b63a:	b29b      	uxth	r3, r3
 800b63c:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 800b640:	454f      	cmp	r7, r9
 800b642:	ea4f 4c14 	mov.w	ip, r4, lsr #16
 800b646:	f84e 3b04 	str.w	r3, [lr], #4
 800b64a:	d8e4      	bhi.n	800b616 <__multiply+0x8c>
 800b64c:	f8ce c000 	str.w	ip, [lr]
 800b650:	f832 9c02 	ldrh.w	r9, [r2, #-2]
 800b654:	f1b9 0f00 	cmp.w	r9, #0
 800b658:	d01f      	beq.n	800b69a <__multiply+0x110>
 800b65a:	46ae      	mov	lr, r5
 800b65c:	468c      	mov	ip, r1
 800b65e:	f04f 0a00 	mov.w	sl, #0
 800b662:	682b      	ldr	r3, [r5, #0]
 800b664:	f8bc 4000 	ldrh.w	r4, [ip]
 800b668:	f8be b002 	ldrh.w	fp, [lr, #2]
 800b66c:	b29b      	uxth	r3, r3
 800b66e:	fb09 b404 	mla	r4, r9, r4, fp
 800b672:	44a2      	add	sl, r4
 800b674:	ea43 430a 	orr.w	r3, r3, sl, lsl #16
 800b678:	f84e 3b04 	str.w	r3, [lr], #4
 800b67c:	f85c 3b04 	ldr.w	r3, [ip], #4
 800b680:	f8be 4000 	ldrh.w	r4, [lr]
 800b684:	0c1b      	lsrs	r3, r3, #16
 800b686:	fb09 4303 	mla	r3, r9, r3, r4
 800b68a:	4567      	cmp	r7, ip
 800b68c:	eb03 431a 	add.w	r3, r3, sl, lsr #16
 800b690:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 800b694:	d8e6      	bhi.n	800b664 <__multiply+0xda>
 800b696:	f8ce 3000 	str.w	r3, [lr]
 800b69a:	3504      	adds	r5, #4
 800b69c:	e7a0      	b.n	800b5e0 <__multiply+0x56>
 800b69e:	3e01      	subs	r6, #1
 800b6a0:	e7a2      	b.n	800b5e8 <__multiply+0x5e>
	...

0800b6a4 <__pow5mult>:
 800b6a4:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 800b6a8:	4615      	mov	r5, r2
 800b6aa:	f012 0203 	ands.w	r2, r2, #3
 800b6ae:	4606      	mov	r6, r0
 800b6b0:	460f      	mov	r7, r1
 800b6b2:	d007      	beq.n	800b6c4 <__pow5mult+0x20>
 800b6b4:	4c21      	ldr	r4, [pc, #132]	; (800b73c <__pow5mult+0x98>)
 800b6b6:	3a01      	subs	r2, #1
 800b6b8:	2300      	movs	r3, #0
 800b6ba:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 800b6be:	f7ff fed2 	bl	800b466 <__multadd>
 800b6c2:	4607      	mov	r7, r0
 800b6c4:	10ad      	asrs	r5, r5, #2
 800b6c6:	d035      	beq.n	800b734 <__pow5mult+0x90>
 800b6c8:	6a74      	ldr	r4, [r6, #36]	; 0x24
 800b6ca:	b93c      	cbnz	r4, 800b6dc <__pow5mult+0x38>
 800b6cc:	2010      	movs	r0, #16
 800b6ce:	f7ff fe69 	bl	800b3a4 <malloc>
 800b6d2:	6270      	str	r0, [r6, #36]	; 0x24
 800b6d4:	6044      	str	r4, [r0, #4]
 800b6d6:	6084      	str	r4, [r0, #8]
 800b6d8:	6004      	str	r4, [r0, #0]
 800b6da:	60c4      	str	r4, [r0, #12]
 800b6dc:	f8d6 8024 	ldr.w	r8, [r6, #36]	; 0x24
 800b6e0:	f8d8 4008 	ldr.w	r4, [r8, #8]
 800b6e4:	b94c      	cbnz	r4, 800b6fa <__pow5mult+0x56>
 800b6e6:	f240 2171 	movw	r1, #625	; 0x271
 800b6ea:	4630      	mov	r0, r6
 800b6ec:	f7ff ff44 	bl	800b578 <__i2b>
 800b6f0:	2300      	movs	r3, #0
 800b6f2:	4604      	mov	r4, r0
 800b6f4:	f8c8 0008 	str.w	r0, [r8, #8]
 800b6f8:	6003      	str	r3, [r0, #0]
 800b6fa:	f04f 0800 	mov.w	r8, #0
 800b6fe:	07eb      	lsls	r3, r5, #31
 800b700:	d50a      	bpl.n	800b718 <__pow5mult+0x74>
 800b702:	4639      	mov	r1, r7
 800b704:	4622      	mov	r2, r4
 800b706:	4630      	mov	r0, r6
 800b708:	f7ff ff3f 	bl	800b58a <__multiply>
 800b70c:	4681      	mov	r9, r0
 800b70e:	4639      	mov	r1, r7
 800b710:	4630      	mov	r0, r6
 800b712:	f7ff fe91 	bl	800b438 <_Bfree>
 800b716:	464f      	mov	r7, r9
 800b718:	106d      	asrs	r5, r5, #1
 800b71a:	d00b      	beq.n	800b734 <__pow5mult+0x90>
 800b71c:	6820      	ldr	r0, [r4, #0]
 800b71e:	b938      	cbnz	r0, 800b730 <__pow5mult+0x8c>
 800b720:	4622      	mov	r2, r4
 800b722:	4621      	mov	r1, r4
 800b724:	4630      	mov	r0, r6
 800b726:	f7ff ff30 	bl	800b58a <__multiply>
 800b72a:	6020      	str	r0, [r4, #0]
 800b72c:	f8c0 8000 	str.w	r8, [r0]
 800b730:	4604      	mov	r4, r0
 800b732:	e7e4      	b.n	800b6fe <__pow5mult+0x5a>
 800b734:	4638      	mov	r0, r7
 800b736:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 800b73a:	bf00      	nop
 800b73c:	0800c140 	.word	0x0800c140

0800b740 <__lshift>:
 800b740:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800b744:	460c      	mov	r4, r1
 800b746:	4607      	mov	r7, r0
 800b748:	4616      	mov	r6, r2
 800b74a:	6923      	ldr	r3, [r4, #16]
 800b74c:	ea4f 1a62 	mov.w	sl, r2, asr #5
 800b750:	eb0a 0903 	add.w	r9, sl, r3
 800b754:	6849      	ldr	r1, [r1, #4]
 800b756:	68a3      	ldr	r3, [r4, #8]
 800b758:	f109 0501 	add.w	r5, r9, #1
 800b75c:	42ab      	cmp	r3, r5
 800b75e:	db31      	blt.n	800b7c4 <__lshift+0x84>
 800b760:	4638      	mov	r0, r7
 800b762:	f7ff fe35 	bl	800b3d0 <_Balloc>
 800b766:	2200      	movs	r2, #0
 800b768:	4680      	mov	r8, r0
 800b76a:	4611      	mov	r1, r2
 800b76c:	f100 0314 	add.w	r3, r0, #20
 800b770:	4552      	cmp	r2, sl
 800b772:	db2a      	blt.n	800b7ca <__lshift+0x8a>
 800b774:	6920      	ldr	r0, [r4, #16]
 800b776:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 800b77a:	f104 0114 	add.w	r1, r4, #20
 800b77e:	f016 021f 	ands.w	r2, r6, #31
 800b782:	eb03 038a 	add.w	r3, r3, sl, lsl #2
 800b786:	eb01 0e80 	add.w	lr, r1, r0, lsl #2
 800b78a:	d022      	beq.n	800b7d2 <__lshift+0x92>
 800b78c:	2000      	movs	r0, #0
 800b78e:	f1c2 0c20 	rsb	ip, r2, #32
 800b792:	680e      	ldr	r6, [r1, #0]
 800b794:	4096      	lsls	r6, r2
 800b796:	4330      	orrs	r0, r6
 800b798:	f843 0b04 	str.w	r0, [r3], #4
 800b79c:	f851 0b04 	ldr.w	r0, [r1], #4
 800b7a0:	458e      	cmp	lr, r1
 800b7a2:	fa20 f00c 	lsr.w	r0, r0, ip
 800b7a6:	d8f4      	bhi.n	800b792 <__lshift+0x52>
 800b7a8:	6018      	str	r0, [r3, #0]
 800b7aa:	b108      	cbz	r0, 800b7b0 <__lshift+0x70>
 800b7ac:	f109 0502 	add.w	r5, r9, #2
 800b7b0:	3d01      	subs	r5, #1
 800b7b2:	4638      	mov	r0, r7
 800b7b4:	f8c8 5010 	str.w	r5, [r8, #16]
 800b7b8:	4621      	mov	r1, r4
 800b7ba:	f7ff fe3d 	bl	800b438 <_Bfree>
 800b7be:	4640      	mov	r0, r8
 800b7c0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800b7c4:	3101      	adds	r1, #1
 800b7c6:	005b      	lsls	r3, r3, #1
 800b7c8:	e7c8      	b.n	800b75c <__lshift+0x1c>
 800b7ca:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
 800b7ce:	3201      	adds	r2, #1
 800b7d0:	e7ce      	b.n	800b770 <__lshift+0x30>
 800b7d2:	3b04      	subs	r3, #4
 800b7d4:	f851 2b04 	ldr.w	r2, [r1], #4
 800b7d8:	458e      	cmp	lr, r1
 800b7da:	f843 2f04 	str.w	r2, [r3, #4]!
 800b7de:	d8f9      	bhi.n	800b7d4 <__lshift+0x94>
 800b7e0:	e7e6      	b.n	800b7b0 <__lshift+0x70>

0800b7e2 <__mcmp>:
 800b7e2:	6903      	ldr	r3, [r0, #16]
 800b7e4:	690a      	ldr	r2, [r1, #16]
 800b7e6:	b530      	push	{r4, r5, lr}
 800b7e8:	1a9b      	subs	r3, r3, r2
 800b7ea:	d10c      	bne.n	800b806 <__mcmp+0x24>
 800b7ec:	0092      	lsls	r2, r2, #2
 800b7ee:	3014      	adds	r0, #20
 800b7f0:	3114      	adds	r1, #20
 800b7f2:	1884      	adds	r4, r0, r2
 800b7f4:	4411      	add	r1, r2
 800b7f6:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 800b7fa:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 800b7fe:	4295      	cmp	r5, r2
 800b800:	d003      	beq.n	800b80a <__mcmp+0x28>
 800b802:	d305      	bcc.n	800b810 <__mcmp+0x2e>
 800b804:	2301      	movs	r3, #1
 800b806:	4618      	mov	r0, r3
 800b808:	bd30      	pop	{r4, r5, pc}
 800b80a:	42a0      	cmp	r0, r4
 800b80c:	d3f3      	bcc.n	800b7f6 <__mcmp+0x14>
 800b80e:	e7fa      	b.n	800b806 <__mcmp+0x24>
 800b810:	f04f 33ff 	mov.w	r3, #4294967295
 800b814:	e7f7      	b.n	800b806 <__mcmp+0x24>

0800b816 <__mdiff>:
 800b816:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 800b81a:	460d      	mov	r5, r1
 800b81c:	4607      	mov	r7, r0
 800b81e:	4611      	mov	r1, r2
 800b820:	4628      	mov	r0, r5
 800b822:	4614      	mov	r4, r2
 800b824:	f7ff ffdd 	bl	800b7e2 <__mcmp>
 800b828:	1e06      	subs	r6, r0, #0
 800b82a:	d108      	bne.n	800b83e <__mdiff+0x28>
 800b82c:	4631      	mov	r1, r6
 800b82e:	4638      	mov	r0, r7
 800b830:	f7ff fdce 	bl	800b3d0 <_Balloc>
 800b834:	2301      	movs	r3, #1
 800b836:	6146      	str	r6, [r0, #20]
 800b838:	6103      	str	r3, [r0, #16]
 800b83a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800b83e:	bfa4      	itt	ge
 800b840:	4623      	movge	r3, r4
 800b842:	462c      	movge	r4, r5
 800b844:	4638      	mov	r0, r7
 800b846:	6861      	ldr	r1, [r4, #4]
 800b848:	bfa6      	itte	ge
 800b84a:	461d      	movge	r5, r3
 800b84c:	2600      	movge	r6, #0
 800b84e:	2601      	movlt	r6, #1
 800b850:	f7ff fdbe 	bl	800b3d0 <_Balloc>
 800b854:	f04f 0c00 	mov.w	ip, #0
 800b858:	60c6      	str	r6, [r0, #12]
 800b85a:	692b      	ldr	r3, [r5, #16]
 800b85c:	6926      	ldr	r6, [r4, #16]
 800b85e:	f104 0214 	add.w	r2, r4, #20
 800b862:	f105 0914 	add.w	r9, r5, #20
 800b866:	eb02 0786 	add.w	r7, r2, r6, lsl #2
 800b86a:	eb09 0883 	add.w	r8, r9, r3, lsl #2
 800b86e:	f100 0114 	add.w	r1, r0, #20
 800b872:	f852 ab04 	ldr.w	sl, [r2], #4
 800b876:	f859 5b04 	ldr.w	r5, [r9], #4
 800b87a:	fa1f f38a 	uxth.w	r3, sl
 800b87e:	4463      	add	r3, ip
 800b880:	b2ac      	uxth	r4, r5
 800b882:	1b1b      	subs	r3, r3, r4
 800b884:	0c2c      	lsrs	r4, r5, #16
 800b886:	ebc4 441a 	rsb	r4, r4, sl, lsr #16
 800b88a:	eb04 4423 	add.w	r4, r4, r3, asr #16
 800b88e:	b29b      	uxth	r3, r3
 800b890:	ea4f 4c24 	mov.w	ip, r4, asr #16
 800b894:	45c8      	cmp	r8, r9
 800b896:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
 800b89a:	4696      	mov	lr, r2
 800b89c:	f841 4b04 	str.w	r4, [r1], #4
 800b8a0:	d8e7      	bhi.n	800b872 <__mdiff+0x5c>
 800b8a2:	45be      	cmp	lr, r7
 800b8a4:	d305      	bcc.n	800b8b2 <__mdiff+0x9c>
 800b8a6:	f851 3d04 	ldr.w	r3, [r1, #-4]!
 800b8aa:	b18b      	cbz	r3, 800b8d0 <__mdiff+0xba>
 800b8ac:	6106      	str	r6, [r0, #16]
 800b8ae:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800b8b2:	f85e 4b04 	ldr.w	r4, [lr], #4
 800b8b6:	b2a2      	uxth	r2, r4
 800b8b8:	4462      	add	r2, ip
 800b8ba:	1413      	asrs	r3, r2, #16
 800b8bc:	eb03 4314 	add.w	r3, r3, r4, lsr #16
 800b8c0:	b292      	uxth	r2, r2
 800b8c2:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 800b8c6:	ea4f 4c23 	mov.w	ip, r3, asr #16
 800b8ca:	f841 2b04 	str.w	r2, [r1], #4
 800b8ce:	e7e8      	b.n	800b8a2 <__mdiff+0x8c>
 800b8d0:	3e01      	subs	r6, #1
 800b8d2:	e7e8      	b.n	800b8a6 <__mdiff+0x90>

0800b8d4 <__d2b>:
 800b8d4:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
 800b8d8:	461c      	mov	r4, r3
 800b8da:	2101      	movs	r1, #1
 800b8dc:	4690      	mov	r8, r2
 800b8de:	9e08      	ldr	r6, [sp, #32]
 800b8e0:	9d09      	ldr	r5, [sp, #36]	; 0x24
 800b8e2:	f7ff fd75 	bl	800b3d0 <_Balloc>
 800b8e6:	f3c4 0213 	ubfx	r2, r4, #0, #20
 800b8ea:	f3c4 540a 	ubfx	r4, r4, #20, #11
 800b8ee:	4607      	mov	r7, r0
 800b8f0:	bb34      	cbnz	r4, 800b940 <__d2b+0x6c>
 800b8f2:	9201      	str	r2, [sp, #4]
 800b8f4:	f1b8 0f00 	cmp.w	r8, #0
 800b8f8:	d027      	beq.n	800b94a <__d2b+0x76>
 800b8fa:	a802      	add	r0, sp, #8
 800b8fc:	f840 8d08 	str.w	r8, [r0, #-8]!
 800b900:	f7ff fe0b 	bl	800b51a <__lo0bits>
 800b904:	9900      	ldr	r1, [sp, #0]
 800b906:	b1f0      	cbz	r0, 800b946 <__d2b+0x72>
 800b908:	9a01      	ldr	r2, [sp, #4]
 800b90a:	f1c0 0320 	rsb	r3, r0, #32
 800b90e:	fa02 f303 	lsl.w	r3, r2, r3
 800b912:	430b      	orrs	r3, r1
 800b914:	40c2      	lsrs	r2, r0
 800b916:	617b      	str	r3, [r7, #20]
 800b918:	9201      	str	r2, [sp, #4]
 800b91a:	9b01      	ldr	r3, [sp, #4]
 800b91c:	2b00      	cmp	r3, #0
 800b91e:	bf14      	ite	ne
 800b920:	2102      	movne	r1, #2
 800b922:	2101      	moveq	r1, #1
 800b924:	61bb      	str	r3, [r7, #24]
 800b926:	6139      	str	r1, [r7, #16]
 800b928:	b1c4      	cbz	r4, 800b95c <__d2b+0x88>
 800b92a:	f2a4 4433 	subw	r4, r4, #1075	; 0x433
 800b92e:	4404      	add	r4, r0
 800b930:	6034      	str	r4, [r6, #0]
 800b932:	f1c0 0035 	rsb	r0, r0, #53	; 0x35
 800b936:	6028      	str	r0, [r5, #0]
 800b938:	4638      	mov	r0, r7
 800b93a:	b002      	add	sp, #8
 800b93c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 800b940:	f442 1280 	orr.w	r2, r2, #1048576	; 0x100000
 800b944:	e7d5      	b.n	800b8f2 <__d2b+0x1e>
 800b946:	6179      	str	r1, [r7, #20]
 800b948:	e7e7      	b.n	800b91a <__d2b+0x46>
 800b94a:	a801      	add	r0, sp, #4
 800b94c:	f7ff fde5 	bl	800b51a <__lo0bits>
 800b950:	2101      	movs	r1, #1
 800b952:	9b01      	ldr	r3, [sp, #4]
 800b954:	6139      	str	r1, [r7, #16]
 800b956:	617b      	str	r3, [r7, #20]
 800b958:	3020      	adds	r0, #32
 800b95a:	e7e5      	b.n	800b928 <__d2b+0x54>
 800b95c:	f2a0 4032 	subw	r0, r0, #1074	; 0x432
 800b960:	eb07 0381 	add.w	r3, r7, r1, lsl #2
 800b964:	6030      	str	r0, [r6, #0]
 800b966:	6918      	ldr	r0, [r3, #16]
 800b968:	f7ff fdb8 	bl	800b4dc <__hi0bits>
 800b96c:	ebc0 1041 	rsb	r0, r0, r1, lsl #5
 800b970:	e7e1      	b.n	800b936 <__d2b+0x62>

0800b972 <_calloc_r>:
 800b972:	b538      	push	{r3, r4, r5, lr}
 800b974:	fb02 f401 	mul.w	r4, r2, r1
 800b978:	4621      	mov	r1, r4
 800b97a:	f000 f855 	bl	800ba28 <_malloc_r>
 800b97e:	4605      	mov	r5, r0
 800b980:	b118      	cbz	r0, 800b98a <_calloc_r+0x18>
 800b982:	4622      	mov	r2, r4
 800b984:	2100      	movs	r1, #0
 800b986:	f7fd fe62 	bl	800964e <memset>
 800b98a:	4628      	mov	r0, r5
 800b98c:	bd38      	pop	{r3, r4, r5, pc}
	...

0800b990 <_free_r>:
 800b990:	b538      	push	{r3, r4, r5, lr}
 800b992:	4605      	mov	r5, r0
 800b994:	2900      	cmp	r1, #0
 800b996:	d043      	beq.n	800ba20 <_free_r+0x90>
 800b998:	f851 3c04 	ldr.w	r3, [r1, #-4]
 800b99c:	1f0c      	subs	r4, r1, #4
 800b99e:	2b00      	cmp	r3, #0
 800b9a0:	bfb8      	it	lt
 800b9a2:	18e4      	addlt	r4, r4, r3
 800b9a4:	f000 fa98 	bl	800bed8 <__malloc_lock>
 800b9a8:	4a1e      	ldr	r2, [pc, #120]	; (800ba24 <_free_r+0x94>)
 800b9aa:	6813      	ldr	r3, [r2, #0]
 800b9ac:	4610      	mov	r0, r2
 800b9ae:	b933      	cbnz	r3, 800b9be <_free_r+0x2e>
 800b9b0:	6063      	str	r3, [r4, #4]
 800b9b2:	6014      	str	r4, [r2, #0]
 800b9b4:	4628      	mov	r0, r5
 800b9b6:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800b9ba:	f000 ba8e 	b.w	800beda <__malloc_unlock>
 800b9be:	42a3      	cmp	r3, r4
 800b9c0:	d90b      	bls.n	800b9da <_free_r+0x4a>
 800b9c2:	6821      	ldr	r1, [r4, #0]
 800b9c4:	1862      	adds	r2, r4, r1
 800b9c6:	4293      	cmp	r3, r2
 800b9c8:	bf01      	itttt	eq
 800b9ca:	681a      	ldreq	r2, [r3, #0]
 800b9cc:	685b      	ldreq	r3, [r3, #4]
 800b9ce:	1852      	addeq	r2, r2, r1
 800b9d0:	6022      	streq	r2, [r4, #0]
 800b9d2:	6063      	str	r3, [r4, #4]
 800b9d4:	6004      	str	r4, [r0, #0]
 800b9d6:	e7ed      	b.n	800b9b4 <_free_r+0x24>
 800b9d8:	4613      	mov	r3, r2
 800b9da:	685a      	ldr	r2, [r3, #4]
 800b9dc:	b10a      	cbz	r2, 800b9e2 <_free_r+0x52>
 800b9de:	42a2      	cmp	r2, r4
 800b9e0:	d9fa      	bls.n	800b9d8 <_free_r+0x48>
 800b9e2:	6819      	ldr	r1, [r3, #0]
 800b9e4:	1858      	adds	r0, r3, r1
 800b9e6:	42a0      	cmp	r0, r4
 800b9e8:	d10b      	bne.n	800ba02 <_free_r+0x72>
 800b9ea:	6820      	ldr	r0, [r4, #0]
 800b9ec:	4401      	add	r1, r0
 800b9ee:	1858      	adds	r0, r3, r1
 800b9f0:	4282      	cmp	r2, r0
 800b9f2:	6019      	str	r1, [r3, #0]
 800b9f4:	d1de      	bne.n	800b9b4 <_free_r+0x24>
 800b9f6:	6810      	ldr	r0, [r2, #0]
 800b9f8:	6852      	ldr	r2, [r2, #4]
 800b9fa:	4401      	add	r1, r0
 800b9fc:	6019      	str	r1, [r3, #0]
 800b9fe:	605a      	str	r2, [r3, #4]
 800ba00:	e7d8      	b.n	800b9b4 <_free_r+0x24>
 800ba02:	d902      	bls.n	800ba0a <_free_r+0x7a>
 800ba04:	230c      	movs	r3, #12
 800ba06:	602b      	str	r3, [r5, #0]
 800ba08:	e7d4      	b.n	800b9b4 <_free_r+0x24>
 800ba0a:	6820      	ldr	r0, [r4, #0]
 800ba0c:	1821      	adds	r1, r4, r0
 800ba0e:	428a      	cmp	r2, r1
 800ba10:	bf01      	itttt	eq
 800ba12:	6811      	ldreq	r1, [r2, #0]
 800ba14:	6852      	ldreq	r2, [r2, #4]
 800ba16:	1809      	addeq	r1, r1, r0
 800ba18:	6021      	streq	r1, [r4, #0]
 800ba1a:	6062      	str	r2, [r4, #4]
 800ba1c:	605c      	str	r4, [r3, #4]
 800ba1e:	e7c9      	b.n	800b9b4 <_free_r+0x24>
 800ba20:	bd38      	pop	{r3, r4, r5, pc}
 800ba22:	bf00      	nop
 800ba24:	20000470 	.word	0x20000470

0800ba28 <_malloc_r>:
 800ba28:	b570      	push	{r4, r5, r6, lr}
 800ba2a:	1ccd      	adds	r5, r1, #3
 800ba2c:	f025 0503 	bic.w	r5, r5, #3
 800ba30:	3508      	adds	r5, #8
 800ba32:	2d0c      	cmp	r5, #12
 800ba34:	bf38      	it	cc
 800ba36:	250c      	movcc	r5, #12
 800ba38:	2d00      	cmp	r5, #0
 800ba3a:	4606      	mov	r6, r0
 800ba3c:	db01      	blt.n	800ba42 <_malloc_r+0x1a>
 800ba3e:	42a9      	cmp	r1, r5
 800ba40:	d903      	bls.n	800ba4a <_malloc_r+0x22>
 800ba42:	230c      	movs	r3, #12
 800ba44:	6033      	str	r3, [r6, #0]
 800ba46:	2000      	movs	r0, #0
 800ba48:	bd70      	pop	{r4, r5, r6, pc}
 800ba4a:	f000 fa45 	bl	800bed8 <__malloc_lock>
 800ba4e:	4a23      	ldr	r2, [pc, #140]	; (800badc <_malloc_r+0xb4>)
 800ba50:	6814      	ldr	r4, [r2, #0]
 800ba52:	4621      	mov	r1, r4
 800ba54:	b991      	cbnz	r1, 800ba7c <_malloc_r+0x54>
 800ba56:	4c22      	ldr	r4, [pc, #136]	; (800bae0 <_malloc_r+0xb8>)
 800ba58:	6823      	ldr	r3, [r4, #0]
 800ba5a:	b91b      	cbnz	r3, 800ba64 <_malloc_r+0x3c>
 800ba5c:	4630      	mov	r0, r6
 800ba5e:	f000 f97f 	bl	800bd60 <_sbrk_r>
 800ba62:	6020      	str	r0, [r4, #0]
 800ba64:	4629      	mov	r1, r5
 800ba66:	4630      	mov	r0, r6
 800ba68:	f000 f97a 	bl	800bd60 <_sbrk_r>
 800ba6c:	1c43      	adds	r3, r0, #1
 800ba6e:	d126      	bne.n	800babe <_malloc_r+0x96>
 800ba70:	230c      	movs	r3, #12
 800ba72:	4630      	mov	r0, r6
 800ba74:	6033      	str	r3, [r6, #0]
 800ba76:	f000 fa30 	bl	800beda <__malloc_unlock>
 800ba7a:	e7e4      	b.n	800ba46 <_malloc_r+0x1e>
 800ba7c:	680b      	ldr	r3, [r1, #0]
 800ba7e:	1b5b      	subs	r3, r3, r5
 800ba80:	d41a      	bmi.n	800bab8 <_malloc_r+0x90>
 800ba82:	2b0b      	cmp	r3, #11
 800ba84:	d90f      	bls.n	800baa6 <_malloc_r+0x7e>
 800ba86:	600b      	str	r3, [r1, #0]
 800ba88:	18cc      	adds	r4, r1, r3
 800ba8a:	50cd      	str	r5, [r1, r3]
 800ba8c:	4630      	mov	r0, r6
 800ba8e:	f000 fa24 	bl	800beda <__malloc_unlock>
 800ba92:	f104 000b 	add.w	r0, r4, #11
 800ba96:	1d23      	adds	r3, r4, #4
 800ba98:	f020 0007 	bic.w	r0, r0, #7
 800ba9c:	1ac3      	subs	r3, r0, r3
 800ba9e:	d01b      	beq.n	800bad8 <_malloc_r+0xb0>
 800baa0:	425a      	negs	r2, r3
 800baa2:	50e2      	str	r2, [r4, r3]
 800baa4:	bd70      	pop	{r4, r5, r6, pc}
 800baa6:	428c      	cmp	r4, r1
 800baa8:	bf0b      	itete	eq
 800baaa:	6863      	ldreq	r3, [r4, #4]
 800baac:	684b      	ldrne	r3, [r1, #4]
 800baae:	6013      	streq	r3, [r2, #0]
 800bab0:	6063      	strne	r3, [r4, #4]
 800bab2:	bf18      	it	ne
 800bab4:	460c      	movne	r4, r1
 800bab6:	e7e9      	b.n	800ba8c <_malloc_r+0x64>
 800bab8:	460c      	mov	r4, r1
 800baba:	6849      	ldr	r1, [r1, #4]
 800babc:	e7ca      	b.n	800ba54 <_malloc_r+0x2c>
 800babe:	1cc4      	adds	r4, r0, #3
 800bac0:	f024 0403 	bic.w	r4, r4, #3
 800bac4:	42a0      	cmp	r0, r4
 800bac6:	d005      	beq.n	800bad4 <_malloc_r+0xac>
 800bac8:	1a21      	subs	r1, r4, r0
 800baca:	4630      	mov	r0, r6
 800bacc:	f000 f948 	bl	800bd60 <_sbrk_r>
 800bad0:	3001      	adds	r0, #1
 800bad2:	d0cd      	beq.n	800ba70 <_malloc_r+0x48>
 800bad4:	6025      	str	r5, [r4, #0]
 800bad6:	e7d9      	b.n	800ba8c <_malloc_r+0x64>
 800bad8:	bd70      	pop	{r4, r5, r6, pc}
 800bada:	bf00      	nop
 800badc:	20000470 	.word	0x20000470
 800bae0:	20000474 	.word	0x20000474

0800bae4 <__sfputc_r>:
 800bae4:	6893      	ldr	r3, [r2, #8]
 800bae6:	b410      	push	{r4}
 800bae8:	3b01      	subs	r3, #1
 800baea:	2b00      	cmp	r3, #0
 800baec:	6093      	str	r3, [r2, #8]
 800baee:	da08      	bge.n	800bb02 <__sfputc_r+0x1e>
 800baf0:	6994      	ldr	r4, [r2, #24]
 800baf2:	42a3      	cmp	r3, r4
 800baf4:	db02      	blt.n	800bafc <__sfputc_r+0x18>
 800baf6:	b2cb      	uxtb	r3, r1
 800baf8:	2b0a      	cmp	r3, #10
 800bafa:	d102      	bne.n	800bb02 <__sfputc_r+0x1e>
 800bafc:	bc10      	pop	{r4}
 800bafe:	f7fe bb41 	b.w	800a184 <__swbuf_r>
 800bb02:	6813      	ldr	r3, [r2, #0]
 800bb04:	1c58      	adds	r0, r3, #1
 800bb06:	6010      	str	r0, [r2, #0]
 800bb08:	7019      	strb	r1, [r3, #0]
 800bb0a:	b2c8      	uxtb	r0, r1
 800bb0c:	bc10      	pop	{r4}
 800bb0e:	4770      	bx	lr

0800bb10 <__sfputs_r>:
 800bb10:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800bb12:	4606      	mov	r6, r0
 800bb14:	460f      	mov	r7, r1
 800bb16:	4614      	mov	r4, r2
 800bb18:	18d5      	adds	r5, r2, r3
 800bb1a:	42ac      	cmp	r4, r5
 800bb1c:	d101      	bne.n	800bb22 <__sfputs_r+0x12>
 800bb1e:	2000      	movs	r0, #0
 800bb20:	e007      	b.n	800bb32 <__sfputs_r+0x22>
 800bb22:	463a      	mov	r2, r7
 800bb24:	f814 1b01 	ldrb.w	r1, [r4], #1
 800bb28:	4630      	mov	r0, r6
 800bb2a:	f7ff ffdb 	bl	800bae4 <__sfputc_r>
 800bb2e:	1c43      	adds	r3, r0, #1
 800bb30:	d1f3      	bne.n	800bb1a <__sfputs_r+0xa>
 800bb32:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

0800bb34 <_vfiprintf_r>:
 800bb34:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 800bb38:	b09d      	sub	sp, #116	; 0x74
 800bb3a:	460c      	mov	r4, r1
 800bb3c:	4617      	mov	r7, r2
 800bb3e:	9303      	str	r3, [sp, #12]
 800bb40:	4606      	mov	r6, r0
 800bb42:	b118      	cbz	r0, 800bb4c <_vfiprintf_r+0x18>
 800bb44:	6983      	ldr	r3, [r0, #24]
 800bb46:	b90b      	cbnz	r3, 800bb4c <_vfiprintf_r+0x18>
 800bb48:	f7ff fb30 	bl	800b1ac <__sinit>
 800bb4c:	4b7c      	ldr	r3, [pc, #496]	; (800bd40 <_vfiprintf_r+0x20c>)
 800bb4e:	429c      	cmp	r4, r3
 800bb50:	d157      	bne.n	800bc02 <_vfiprintf_r+0xce>
 800bb52:	6874      	ldr	r4, [r6, #4]
 800bb54:	89a3      	ldrh	r3, [r4, #12]
 800bb56:	0718      	lsls	r0, r3, #28
 800bb58:	d55d      	bpl.n	800bc16 <_vfiprintf_r+0xe2>
 800bb5a:	6923      	ldr	r3, [r4, #16]
 800bb5c:	2b00      	cmp	r3, #0
 800bb5e:	d05a      	beq.n	800bc16 <_vfiprintf_r+0xe2>
 800bb60:	2300      	movs	r3, #0
 800bb62:	9309      	str	r3, [sp, #36]	; 0x24
 800bb64:	2320      	movs	r3, #32
 800bb66:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 800bb6a:	2330      	movs	r3, #48	; 0x30
 800bb6c:	f04f 0b01 	mov.w	fp, #1
 800bb70:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 800bb74:	46b8      	mov	r8, r7
 800bb76:	4645      	mov	r5, r8
 800bb78:	f815 3b01 	ldrb.w	r3, [r5], #1
 800bb7c:	2b00      	cmp	r3, #0
 800bb7e:	d155      	bne.n	800bc2c <_vfiprintf_r+0xf8>
 800bb80:	ebb8 0a07 	subs.w	sl, r8, r7
 800bb84:	d00b      	beq.n	800bb9e <_vfiprintf_r+0x6a>
 800bb86:	4653      	mov	r3, sl
 800bb88:	463a      	mov	r2, r7
 800bb8a:	4621      	mov	r1, r4
 800bb8c:	4630      	mov	r0, r6
 800bb8e:	f7ff ffbf 	bl	800bb10 <__sfputs_r>
 800bb92:	3001      	adds	r0, #1
 800bb94:	f000 80c4 	beq.w	800bd20 <_vfiprintf_r+0x1ec>
 800bb98:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800bb9a:	4453      	add	r3, sl
 800bb9c:	9309      	str	r3, [sp, #36]	; 0x24
 800bb9e:	f898 3000 	ldrb.w	r3, [r8]
 800bba2:	2b00      	cmp	r3, #0
 800bba4:	f000 80bc 	beq.w	800bd20 <_vfiprintf_r+0x1ec>
 800bba8:	2300      	movs	r3, #0
 800bbaa:	f04f 32ff 	mov.w	r2, #4294967295
 800bbae:	9304      	str	r3, [sp, #16]
 800bbb0:	9307      	str	r3, [sp, #28]
 800bbb2:	9205      	str	r2, [sp, #20]
 800bbb4:	9306      	str	r3, [sp, #24]
 800bbb6:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 800bbba:	931a      	str	r3, [sp, #104]	; 0x68
 800bbbc:	2205      	movs	r2, #5
 800bbbe:	7829      	ldrb	r1, [r5, #0]
 800bbc0:	4860      	ldr	r0, [pc, #384]	; (800bd44 <_vfiprintf_r+0x210>)
 800bbc2:	f7ff fbf7 	bl	800b3b4 <memchr>
 800bbc6:	f105 0801 	add.w	r8, r5, #1
 800bbca:	9b04      	ldr	r3, [sp, #16]
 800bbcc:	2800      	cmp	r0, #0
 800bbce:	d131      	bne.n	800bc34 <_vfiprintf_r+0x100>
 800bbd0:	06d9      	lsls	r1, r3, #27
 800bbd2:	bf44      	itt	mi
 800bbd4:	2220      	movmi	r2, #32
 800bbd6:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800bbda:	071a      	lsls	r2, r3, #28
 800bbdc:	bf44      	itt	mi
 800bbde:	222b      	movmi	r2, #43	; 0x2b
 800bbe0:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800bbe4:	782a      	ldrb	r2, [r5, #0]
 800bbe6:	2a2a      	cmp	r2, #42	; 0x2a
 800bbe8:	d02c      	beq.n	800bc44 <_vfiprintf_r+0x110>
 800bbea:	2100      	movs	r1, #0
 800bbec:	200a      	movs	r0, #10
 800bbee:	9a07      	ldr	r2, [sp, #28]
 800bbf0:	46a8      	mov	r8, r5
 800bbf2:	f898 3000 	ldrb.w	r3, [r8]
 800bbf6:	3501      	adds	r5, #1
 800bbf8:	3b30      	subs	r3, #48	; 0x30
 800bbfa:	2b09      	cmp	r3, #9
 800bbfc:	d96d      	bls.n	800bcda <_vfiprintf_r+0x1a6>
 800bbfe:	b371      	cbz	r1, 800bc5e <_vfiprintf_r+0x12a>
 800bc00:	e026      	b.n	800bc50 <_vfiprintf_r+0x11c>
 800bc02:	4b51      	ldr	r3, [pc, #324]	; (800bd48 <_vfiprintf_r+0x214>)
 800bc04:	429c      	cmp	r4, r3
 800bc06:	d101      	bne.n	800bc0c <_vfiprintf_r+0xd8>
 800bc08:	68b4      	ldr	r4, [r6, #8]
 800bc0a:	e7a3      	b.n	800bb54 <_vfiprintf_r+0x20>
 800bc0c:	4b4f      	ldr	r3, [pc, #316]	; (800bd4c <_vfiprintf_r+0x218>)
 800bc0e:	429c      	cmp	r4, r3
 800bc10:	bf08      	it	eq
 800bc12:	68f4      	ldreq	r4, [r6, #12]
 800bc14:	e79e      	b.n	800bb54 <_vfiprintf_r+0x20>
 800bc16:	4621      	mov	r1, r4
 800bc18:	4630      	mov	r0, r6
 800bc1a:	f7fe fb05 	bl	800a228 <__swsetup_r>
 800bc1e:	2800      	cmp	r0, #0
 800bc20:	d09e      	beq.n	800bb60 <_vfiprintf_r+0x2c>
 800bc22:	f04f 30ff 	mov.w	r0, #4294967295
 800bc26:	b01d      	add	sp, #116	; 0x74
 800bc28:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800bc2c:	2b25      	cmp	r3, #37	; 0x25
 800bc2e:	d0a7      	beq.n	800bb80 <_vfiprintf_r+0x4c>
 800bc30:	46a8      	mov	r8, r5
 800bc32:	e7a0      	b.n	800bb76 <_vfiprintf_r+0x42>
 800bc34:	4a43      	ldr	r2, [pc, #268]	; (800bd44 <_vfiprintf_r+0x210>)
 800bc36:	4645      	mov	r5, r8
 800bc38:	1a80      	subs	r0, r0, r2
 800bc3a:	fa0b f000 	lsl.w	r0, fp, r0
 800bc3e:	4318      	orrs	r0, r3
 800bc40:	9004      	str	r0, [sp, #16]
 800bc42:	e7bb      	b.n	800bbbc <_vfiprintf_r+0x88>
 800bc44:	9a03      	ldr	r2, [sp, #12]
 800bc46:	1d11      	adds	r1, r2, #4
 800bc48:	6812      	ldr	r2, [r2, #0]
 800bc4a:	9103      	str	r1, [sp, #12]
 800bc4c:	2a00      	cmp	r2, #0
 800bc4e:	db01      	blt.n	800bc54 <_vfiprintf_r+0x120>
 800bc50:	9207      	str	r2, [sp, #28]
 800bc52:	e004      	b.n	800bc5e <_vfiprintf_r+0x12a>
 800bc54:	4252      	negs	r2, r2
 800bc56:	f043 0302 	orr.w	r3, r3, #2
 800bc5a:	9207      	str	r2, [sp, #28]
 800bc5c:	9304      	str	r3, [sp, #16]
 800bc5e:	f898 3000 	ldrb.w	r3, [r8]
 800bc62:	2b2e      	cmp	r3, #46	; 0x2e
 800bc64:	d110      	bne.n	800bc88 <_vfiprintf_r+0x154>
 800bc66:	f898 3001 	ldrb.w	r3, [r8, #1]
 800bc6a:	f108 0101 	add.w	r1, r8, #1
 800bc6e:	2b2a      	cmp	r3, #42	; 0x2a
 800bc70:	d137      	bne.n	800bce2 <_vfiprintf_r+0x1ae>
 800bc72:	9b03      	ldr	r3, [sp, #12]
 800bc74:	f108 0802 	add.w	r8, r8, #2
 800bc78:	1d1a      	adds	r2, r3, #4
 800bc7a:	681b      	ldr	r3, [r3, #0]
 800bc7c:	9203      	str	r2, [sp, #12]
 800bc7e:	2b00      	cmp	r3, #0
 800bc80:	bfb8      	it	lt
 800bc82:	f04f 33ff 	movlt.w	r3, #4294967295
 800bc86:	9305      	str	r3, [sp, #20]
 800bc88:	4d31      	ldr	r5, [pc, #196]	; (800bd50 <_vfiprintf_r+0x21c>)
 800bc8a:	2203      	movs	r2, #3
 800bc8c:	f898 1000 	ldrb.w	r1, [r8]
 800bc90:	4628      	mov	r0, r5
 800bc92:	f7ff fb8f 	bl	800b3b4 <memchr>
 800bc96:	b140      	cbz	r0, 800bcaa <_vfiprintf_r+0x176>
 800bc98:	2340      	movs	r3, #64	; 0x40
 800bc9a:	1b40      	subs	r0, r0, r5
 800bc9c:	fa03 f000 	lsl.w	r0, r3, r0
 800bca0:	9b04      	ldr	r3, [sp, #16]
 800bca2:	f108 0801 	add.w	r8, r8, #1
 800bca6:	4303      	orrs	r3, r0
 800bca8:	9304      	str	r3, [sp, #16]
 800bcaa:	f898 1000 	ldrb.w	r1, [r8]
 800bcae:	2206      	movs	r2, #6
 800bcb0:	4828      	ldr	r0, [pc, #160]	; (800bd54 <_vfiprintf_r+0x220>)
 800bcb2:	f108 0701 	add.w	r7, r8, #1
 800bcb6:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 800bcba:	f7ff fb7b 	bl	800b3b4 <memchr>
 800bcbe:	2800      	cmp	r0, #0
 800bcc0:	d034      	beq.n	800bd2c <_vfiprintf_r+0x1f8>
 800bcc2:	4b25      	ldr	r3, [pc, #148]	; (800bd58 <_vfiprintf_r+0x224>)
 800bcc4:	bb03      	cbnz	r3, 800bd08 <_vfiprintf_r+0x1d4>
 800bcc6:	9b03      	ldr	r3, [sp, #12]
 800bcc8:	3307      	adds	r3, #7
 800bcca:	f023 0307 	bic.w	r3, r3, #7
 800bcce:	3308      	adds	r3, #8
 800bcd0:	9303      	str	r3, [sp, #12]
 800bcd2:	9b09      	ldr	r3, [sp, #36]	; 0x24
 800bcd4:	444b      	add	r3, r9
 800bcd6:	9309      	str	r3, [sp, #36]	; 0x24
 800bcd8:	e74c      	b.n	800bb74 <_vfiprintf_r+0x40>
 800bcda:	fb00 3202 	mla	r2, r0, r2, r3
 800bcde:	2101      	movs	r1, #1
 800bce0:	e786      	b.n	800bbf0 <_vfiprintf_r+0xbc>
 800bce2:	2300      	movs	r3, #0
 800bce4:	250a      	movs	r5, #10
 800bce6:	4618      	mov	r0, r3
 800bce8:	9305      	str	r3, [sp, #20]
 800bcea:	4688      	mov	r8, r1
 800bcec:	f898 2000 	ldrb.w	r2, [r8]
 800bcf0:	3101      	adds	r1, #1
 800bcf2:	3a30      	subs	r2, #48	; 0x30
 800bcf4:	2a09      	cmp	r2, #9
 800bcf6:	d903      	bls.n	800bd00 <_vfiprintf_r+0x1cc>
 800bcf8:	2b00      	cmp	r3, #0
 800bcfa:	d0c5      	beq.n	800bc88 <_vfiprintf_r+0x154>
 800bcfc:	9005      	str	r0, [sp, #20]
 800bcfe:	e7c3      	b.n	800bc88 <_vfiprintf_r+0x154>
 800bd00:	fb05 2000 	mla	r0, r5, r0, r2
 800bd04:	2301      	movs	r3, #1
 800bd06:	e7f0      	b.n	800bcea <_vfiprintf_r+0x1b6>
 800bd08:	ab03      	add	r3, sp, #12
 800bd0a:	9300      	str	r3, [sp, #0]
 800bd0c:	4622      	mov	r2, r4
 800bd0e:	4b13      	ldr	r3, [pc, #76]	; (800bd5c <_vfiprintf_r+0x228>)
 800bd10:	a904      	add	r1, sp, #16
 800bd12:	4630      	mov	r0, r6
 800bd14:	f7fd fd34 	bl	8009780 <_printf_float>
 800bd18:	f1b0 3fff 	cmp.w	r0, #4294967295
 800bd1c:	4681      	mov	r9, r0
 800bd1e:	d1d8      	bne.n	800bcd2 <_vfiprintf_r+0x19e>
 800bd20:	89a3      	ldrh	r3, [r4, #12]
 800bd22:	065b      	lsls	r3, r3, #25
 800bd24:	f53f af7d 	bmi.w	800bc22 <_vfiprintf_r+0xee>
 800bd28:	9809      	ldr	r0, [sp, #36]	; 0x24
 800bd2a:	e77c      	b.n	800bc26 <_vfiprintf_r+0xf2>
 800bd2c:	ab03      	add	r3, sp, #12
 800bd2e:	9300      	str	r3, [sp, #0]
 800bd30:	4622      	mov	r2, r4
 800bd32:	4b0a      	ldr	r3, [pc, #40]	; (800bd5c <_vfiprintf_r+0x228>)
 800bd34:	a904      	add	r1, sp, #16
 800bd36:	4630      	mov	r0, r6
 800bd38:	f7fd ffd2 	bl	8009ce0 <_printf_i>
 800bd3c:	e7ec      	b.n	800bd18 <_vfiprintf_r+0x1e4>
 800bd3e:	bf00      	nop
 800bd40:	0800c00c 	.word	0x0800c00c
 800bd44:	0800c14c 	.word	0x0800c14c
 800bd48:	0800c02c 	.word	0x0800c02c
 800bd4c:	0800bfec 	.word	0x0800bfec
 800bd50:	0800c152 	.word	0x0800c152
 800bd54:	0800c156 	.word	0x0800c156
 800bd58:	08009781 	.word	0x08009781
 800bd5c:	0800bb11 	.word	0x0800bb11

0800bd60 <_sbrk_r>:
 800bd60:	b538      	push	{r3, r4, r5, lr}
 800bd62:	2300      	movs	r3, #0
 800bd64:	4c05      	ldr	r4, [pc, #20]	; (800bd7c <_sbrk_r+0x1c>)
 800bd66:	4605      	mov	r5, r0
 800bd68:	4608      	mov	r0, r1
 800bd6a:	6023      	str	r3, [r4, #0]
 800bd6c:	f7fc fdd0 	bl	8008910 <_sbrk>
 800bd70:	1c43      	adds	r3, r0, #1
 800bd72:	d102      	bne.n	800bd7a <_sbrk_r+0x1a>
 800bd74:	6823      	ldr	r3, [r4, #0]
 800bd76:	b103      	cbz	r3, 800bd7a <_sbrk_r+0x1a>
 800bd78:	602b      	str	r3, [r5, #0]
 800bd7a:	bd38      	pop	{r3, r4, r5, pc}
 800bd7c:	200017e0 	.word	0x200017e0

0800bd80 <__sread>:
 800bd80:	b510      	push	{r4, lr}
 800bd82:	460c      	mov	r4, r1
 800bd84:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800bd88:	f000 f8a8 	bl	800bedc <_read_r>
 800bd8c:	2800      	cmp	r0, #0
 800bd8e:	bfab      	itete	ge
 800bd90:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 800bd92:	89a3      	ldrhlt	r3, [r4, #12]
 800bd94:	181b      	addge	r3, r3, r0
 800bd96:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 800bd9a:	bfac      	ite	ge
 800bd9c:	6563      	strge	r3, [r4, #84]	; 0x54
 800bd9e:	81a3      	strhlt	r3, [r4, #12]
 800bda0:	bd10      	pop	{r4, pc}

0800bda2 <__swrite>:
 800bda2:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 800bda6:	461f      	mov	r7, r3
 800bda8:	898b      	ldrh	r3, [r1, #12]
 800bdaa:	4605      	mov	r5, r0
 800bdac:	05db      	lsls	r3, r3, #23
 800bdae:	460c      	mov	r4, r1
 800bdb0:	4616      	mov	r6, r2
 800bdb2:	d505      	bpl.n	800bdc0 <__swrite+0x1e>
 800bdb4:	2302      	movs	r3, #2
 800bdb6:	2200      	movs	r2, #0
 800bdb8:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800bdbc:	f000 f868 	bl	800be90 <_lseek_r>
 800bdc0:	89a3      	ldrh	r3, [r4, #12]
 800bdc2:	4632      	mov	r2, r6
 800bdc4:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 800bdc8:	81a3      	strh	r3, [r4, #12]
 800bdca:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 800bdce:	463b      	mov	r3, r7
 800bdd0:	4628      	mov	r0, r5
 800bdd2:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 800bdd6:	f000 b817 	b.w	800be08 <_write_r>

0800bdda <__sseek>:
 800bdda:	b510      	push	{r4, lr}
 800bddc:	460c      	mov	r4, r1
 800bdde:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800bde2:	f000 f855 	bl	800be90 <_lseek_r>
 800bde6:	1c43      	adds	r3, r0, #1
 800bde8:	89a3      	ldrh	r3, [r4, #12]
 800bdea:	bf15      	itete	ne
 800bdec:	6560      	strne	r0, [r4, #84]	; 0x54
 800bdee:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 800bdf2:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 800bdf6:	81a3      	strheq	r3, [r4, #12]
 800bdf8:	bf18      	it	ne
 800bdfa:	81a3      	strhne	r3, [r4, #12]
 800bdfc:	bd10      	pop	{r4, pc}

0800bdfe <__sclose>:
 800bdfe:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 800be02:	f000 b813 	b.w	800be2c <_close_r>
	...

0800be08 <_write_r>:
 800be08:	b538      	push	{r3, r4, r5, lr}
 800be0a:	4605      	mov	r5, r0
 800be0c:	4608      	mov	r0, r1
 800be0e:	4611      	mov	r1, r2
 800be10:	2200      	movs	r2, #0
 800be12:	4c05      	ldr	r4, [pc, #20]	; (800be28 <_write_r+0x20>)
 800be14:	6022      	str	r2, [r4, #0]
 800be16:	461a      	mov	r2, r3
 800be18:	f7fc f8e6 	bl	8007fe8 <_write>
 800be1c:	1c43      	adds	r3, r0, #1
 800be1e:	d102      	bne.n	800be26 <_write_r+0x1e>
 800be20:	6823      	ldr	r3, [r4, #0]
 800be22:	b103      	cbz	r3, 800be26 <_write_r+0x1e>
 800be24:	602b      	str	r3, [r5, #0]
 800be26:	bd38      	pop	{r3, r4, r5, pc}
 800be28:	200017e0 	.word	0x200017e0

0800be2c <_close_r>:
 800be2c:	b538      	push	{r3, r4, r5, lr}
 800be2e:	2300      	movs	r3, #0
 800be30:	4c05      	ldr	r4, [pc, #20]	; (800be48 <_close_r+0x1c>)
 800be32:	4605      	mov	r5, r0
 800be34:	4608      	mov	r0, r1
 800be36:	6023      	str	r3, [r4, #0]
 800be38:	f7fc fd84 	bl	8008944 <_close>
 800be3c:	1c43      	adds	r3, r0, #1
 800be3e:	d102      	bne.n	800be46 <_close_r+0x1a>
 800be40:	6823      	ldr	r3, [r4, #0]
 800be42:	b103      	cbz	r3, 800be46 <_close_r+0x1a>
 800be44:	602b      	str	r3, [r5, #0]
 800be46:	bd38      	pop	{r3, r4, r5, pc}
 800be48:	200017e0 	.word	0x200017e0

0800be4c <_fstat_r>:
 800be4c:	b538      	push	{r3, r4, r5, lr}
 800be4e:	2300      	movs	r3, #0
 800be50:	4c06      	ldr	r4, [pc, #24]	; (800be6c <_fstat_r+0x20>)
 800be52:	4605      	mov	r5, r0
 800be54:	4608      	mov	r0, r1
 800be56:	4611      	mov	r1, r2
 800be58:	6023      	str	r3, [r4, #0]
 800be5a:	f7fc fd76 	bl	800894a <_fstat>
 800be5e:	1c43      	adds	r3, r0, #1
 800be60:	d102      	bne.n	800be68 <_fstat_r+0x1c>
 800be62:	6823      	ldr	r3, [r4, #0]
 800be64:	b103      	cbz	r3, 800be68 <_fstat_r+0x1c>
 800be66:	602b      	str	r3, [r5, #0]
 800be68:	bd38      	pop	{r3, r4, r5, pc}
 800be6a:	bf00      	nop
 800be6c:	200017e0 	.word	0x200017e0

0800be70 <_isatty_r>:
 800be70:	b538      	push	{r3, r4, r5, lr}
 800be72:	2300      	movs	r3, #0
 800be74:	4c05      	ldr	r4, [pc, #20]	; (800be8c <_isatty_r+0x1c>)
 800be76:	4605      	mov	r5, r0
 800be78:	4608      	mov	r0, r1
 800be7a:	6023      	str	r3, [r4, #0]
 800be7c:	f7fc fd6a 	bl	8008954 <_isatty>
 800be80:	1c43      	adds	r3, r0, #1
 800be82:	d102      	bne.n	800be8a <_isatty_r+0x1a>
 800be84:	6823      	ldr	r3, [r4, #0]
 800be86:	b103      	cbz	r3, 800be8a <_isatty_r+0x1a>
 800be88:	602b      	str	r3, [r5, #0]
 800be8a:	bd38      	pop	{r3, r4, r5, pc}
 800be8c:	200017e0 	.word	0x200017e0

0800be90 <_lseek_r>:
 800be90:	b538      	push	{r3, r4, r5, lr}
 800be92:	4605      	mov	r5, r0
 800be94:	4608      	mov	r0, r1
 800be96:	4611      	mov	r1, r2
 800be98:	2200      	movs	r2, #0
 800be9a:	4c05      	ldr	r4, [pc, #20]	; (800beb0 <_lseek_r+0x20>)
 800be9c:	6022      	str	r2, [r4, #0]
 800be9e:	461a      	mov	r2, r3
 800bea0:	f7fc fd5a 	bl	8008958 <_lseek>
 800bea4:	1c43      	adds	r3, r0, #1
 800bea6:	d102      	bne.n	800beae <_lseek_r+0x1e>
 800bea8:	6823      	ldr	r3, [r4, #0]
 800beaa:	b103      	cbz	r3, 800beae <_lseek_r+0x1e>
 800beac:	602b      	str	r3, [r5, #0]
 800beae:	bd38      	pop	{r3, r4, r5, pc}
 800beb0:	200017e0 	.word	0x200017e0

0800beb4 <__ascii_mbtowc>:
 800beb4:	b082      	sub	sp, #8
 800beb6:	b901      	cbnz	r1, 800beba <__ascii_mbtowc+0x6>
 800beb8:	a901      	add	r1, sp, #4
 800beba:	b142      	cbz	r2, 800bece <__ascii_mbtowc+0x1a>
 800bebc:	b14b      	cbz	r3, 800bed2 <__ascii_mbtowc+0x1e>
 800bebe:	7813      	ldrb	r3, [r2, #0]
 800bec0:	600b      	str	r3, [r1, #0]
 800bec2:	7812      	ldrb	r2, [r2, #0]
 800bec4:	1c10      	adds	r0, r2, #0
 800bec6:	bf18      	it	ne
 800bec8:	2001      	movne	r0, #1
 800beca:	b002      	add	sp, #8
 800becc:	4770      	bx	lr
 800bece:	4610      	mov	r0, r2
 800bed0:	e7fb      	b.n	800beca <__ascii_mbtowc+0x16>
 800bed2:	f06f 0001 	mvn.w	r0, #1
 800bed6:	e7f8      	b.n	800beca <__ascii_mbtowc+0x16>

0800bed8 <__malloc_lock>:
 800bed8:	4770      	bx	lr

0800beda <__malloc_unlock>:
 800beda:	4770      	bx	lr

0800bedc <_read_r>:
 800bedc:	b538      	push	{r3, r4, r5, lr}
 800bede:	4605      	mov	r5, r0
 800bee0:	4608      	mov	r0, r1
 800bee2:	4611      	mov	r1, r2
 800bee4:	2200      	movs	r2, #0
 800bee6:	4c05      	ldr	r4, [pc, #20]	; (800befc <_read_r+0x20>)
 800bee8:	6022      	str	r2, [r4, #0]
 800beea:	461a      	mov	r2, r3
 800beec:	f7fc fd02 	bl	80088f4 <_read>
 800bef0:	1c43      	adds	r3, r0, #1
 800bef2:	d102      	bne.n	800befa <_read_r+0x1e>
 800bef4:	6823      	ldr	r3, [r4, #0]
 800bef6:	b103      	cbz	r3, 800befa <_read_r+0x1e>
 800bef8:	602b      	str	r3, [r5, #0]
 800befa:	bd38      	pop	{r3, r4, r5, pc}
 800befc:	200017e0 	.word	0x200017e0

0800bf00 <__ascii_wctomb>:
 800bf00:	b149      	cbz	r1, 800bf16 <__ascii_wctomb+0x16>
 800bf02:	2aff      	cmp	r2, #255	; 0xff
 800bf04:	bf8b      	itete	hi
 800bf06:	238a      	movhi	r3, #138	; 0x8a
 800bf08:	700a      	strbls	r2, [r1, #0]
 800bf0a:	6003      	strhi	r3, [r0, #0]
 800bf0c:	2001      	movls	r0, #1
 800bf0e:	bf88      	it	hi
 800bf10:	f04f 30ff 	movhi.w	r0, #4294967295
 800bf14:	4770      	bx	lr
 800bf16:	4608      	mov	r0, r1
 800bf18:	4770      	bx	lr
	...

0800bf1c <_init>:
 800bf1c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800bf1e:	bf00      	nop
 800bf20:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800bf22:	bc08      	pop	{r3}
 800bf24:	469e      	mov	lr, r3
 800bf26:	4770      	bx	lr

0800bf28 <_fini>:
 800bf28:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800bf2a:	bf00      	nop
 800bf2c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 800bf2e:	bc08      	pop	{r3}
 800bf30:	469e      	mov	lr, r3
 800bf32:	4770      	bx	lr