pll_4113.c 11 KB

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  1. /**************************************************************************************************
  2. Filename: hal_adf4113.c
  3. Revised: $Date: 2013-11-17 $
  4. Revision: $Revision: $
  5. Description: This file contains the interface to the ADF4113 frequency synthesizer.
  6. **************************************************************************************************/
  7. #include "pll_4113.h"
  8. void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2);
  9. uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN);
  10. #define ADF4113_PRESCALE8 0
  11. #define ADF4113_PRESCALE16 1
  12. #define ADF4113_PRESCALE32 2
  13. #define ADF4113_PRESCALE64 3
  14. // ADF4113 Prescale value for minimum required division ratio
  15. #define ADF4113_PRE8_MIN_N 56
  16. #define ADF4113_PRE16_MIN_N 240
  17. #define ADF4113_PRE32_MIN_N 992
  18. #define ADF4113_PRE64_MIN_N 4032
  19. // Frequency Settings
  20. // Initally, the synthesizer will operate at 2450 MHz
  21. #define ADF4113_CH_STEP 50000
  22. #define HAL_SYN_INVALID_PRESCALE 0x04
  23. #define ADF4113_REF_FREQ_MHZ 13000000
  24. uint8_t PLL_1_8_DL_Error_Cnt = 0;
  25. uint8_t PLL_1_8_UL_Error_Cnt = 0;
  26. uint8_t PLL_2_1_DL_Error_Cnt = 0;
  27. uint8_t PLL_2_1_UL_Error_Cnt = 0;
  28. PLL_Setting_st ADF4113_1_8G_DL = {
  29. PLL_CLK_GPIO_Port,
  30. PLL_CLK_Pin,
  31. PLL_DATA_GPIO_Port,
  32. PLL_DATA_Pin,
  33. PLL_EN_1_8G_DL_GPIO_Port,
  34. PLL_EN_1_8G_DL_Pin,
  35. };
  36. PLL_Setting_st ADF4113_1_8G_UL = {
  37. PLL_CLK_GPIO_Port,
  38. PLL_CLK_Pin,
  39. PLL_DATA_GPIO_Port,
  40. PLL_DATA_Pin,
  41. PLL_EN_1_8G_UL_GPIO_Port,
  42. PLL_EN_1_8G_UL_Pin,
  43. };
  44. PLL_Setting_st ADF4113_2_1G_DL = {
  45. PLL_CLK_GPIO_Port,
  46. PLL_CLK_Pin,
  47. PLL_DATA_GPIO_Port,
  48. PLL_DATA_Pin,
  49. PLL_EN_2_1G_DL_GPIO_Port,
  50. PLL_EN_2_1G_DL_Pin,
  51. };
  52. PLL_Setting_st ADF4113_2_1G_UL = {
  53. PLL_CLK_GPIO_Port,
  54. PLL_CLK_Pin,
  55. PLL_DATA_GPIO_Port,
  56. PLL_DATA_Pin,
  57. PLL_EN_2_1G_UL_GPIO_Port,
  58. PLL_EN_2_1G_UL_Pin,
  59. };
  60. // Error Code
  61. typedef struct{
  62. uint16_t B;
  63. uint16_t P;
  64. uint16_t A;
  65. uint16_t N;
  66. }Adf4113_st;
  67. void ADF4113_Initialize(void){
  68. if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
  69. Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((18425 & 0xFF00) >> 8);//0x47;
  70. Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (18425 & 0x00FF);
  71. }
  72. if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
  73. Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((17475 & 0xFF00) >> 8);
  74. Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (17475 & 0x00FF);
  75. }
  76. if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
  77. Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((21400 & 0xFF00) >> 8);
  78. Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (21400 & 0x00FF);
  79. }
  80. if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
  81. Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((19500 & 0xFF00) >> 8);
  82. Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (19500 & 0x00FF);
  83. }
  84. // ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
  85. // HAL_Delay(1);
  86. // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
  87. // HAL_Delay(1);
  88. // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
  89. // HAL_Delay(1);
  90. // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
  91. }
  92. void ADF4113_Check(void){
  93. uint16_t temp_val = 0;
  94. if(HAL_GPIO_ReadPin(PLL_LD_1_8G_DL_GPIO_Port, PLL_LD_1_8G_DL_Pin) == GPIO_PIN_RESET){
  95. temp_val = (Prev_data[INDEX_PLL_1_8G_DL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_DL_L]);
  96. ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
  97. // ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
  98. if(PLL_1_8_DL_Error_Cnt == 3){
  99. Error_Message_Occur(DL_1_8);
  100. }
  101. if(PLL_1_8_DL_Error_Cnt < 4)
  102. PLL_1_8_DL_Error_Cnt++;
  103. HAL_Delay(1);
  104. }else{
  105. PLL_1_8_DL_Error_Cnt = 0;
  106. }
  107. if(HAL_GPIO_ReadPin(PLL_LD_1_8G_UL_GPIO_Port, PLL_LD_1_8G_UL_Pin) == GPIO_PIN_RESET){
  108. temp_val = (Prev_data[INDEX_PLL_1_8G_UL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_UL_L]);
  109. ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
  110. // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
  111. if(PLL_1_8_UL_Error_Cnt == 3){
  112. Error_Message_Occur(UL_1_8);
  113. }
  114. if(PLL_1_8_UL_Error_Cnt < 4)
  115. PLL_1_8_UL_Error_Cnt++;
  116. HAL_Delay(1);
  117. }else{
  118. PLL_1_8_UL_Error_Cnt = 0;
  119. }
  120. if(HAL_GPIO_ReadPin(PLL_LD_2_1G_DL_GPIO_Port, PLL_LD_2_1G_DL_Pin) == GPIO_PIN_RESET){
  121. temp_val = (Prev_data[INDEX_PLL_2_1G_DL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_DL_L]);
  122. ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
  123. // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
  124. if(PLL_2_1_DL_Error_Cnt == 3){
  125. Error_Message_Occur(DL_2_1);
  126. }
  127. if(PLL_2_1_DL_Error_Cnt < 4)
  128. PLL_2_1_DL_Error_Cnt++;
  129. HAL_Delay(1);
  130. }else{
  131. PLL_2_1_DL_Error_Cnt = 0;
  132. }
  133. if(HAL_GPIO_ReadPin(PLL_LD_2_1G_UL_GPIO_Port, PLL_LD_2_1G_UL_Pin) == GPIO_PIN_RESET){
  134. temp_val = (Prev_data[INDEX_PLL_2_1G_UL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_UL_L]);
  135. ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
  136. // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
  137. if(PLL_2_1_UL_Error_Cnt == 3){
  138. Error_Message_Occur(UL_2_1);
  139. }
  140. if(PLL_2_1_UL_Error_Cnt < 4)
  141. PLL_2_1_UL_Error_Cnt++;
  142. HAL_Delay(1);
  143. }else{
  144. PLL_2_1_UL_Error_Cnt = 0;
  145. }
  146. }
  147. uint8_t halSynSetFreq(uint32_t rf_Freq)
  148. {
  149. uint32_t R, B;
  150. uint32_t A, P, p_mode;
  151. uint32_t N_val = 0;
  152. N_val = (rf_Freq / ADF4113_CH_STEP);
  153. if( N_val < ADF4113_PRE8_MIN_N) {
  154. return HAL_SYN_INVALID_PRESCALE;
  155. } else if(( N_val> ADF4113_PRE8_MIN_N) && (N_val < ADF4113_PRE16_MIN_N)) {
  156. P = 8;
  157. p_mode = ADF4113_PRESCALE8;
  158. } else if(( N_val > ADF4113_PRE16_MIN_N) && (N_val < ADF4113_PRE32_MIN_N)) {
  159. P = 16;
  160. p_mode = ADF4113_PRESCALE16;
  161. } else if((N_val > ADF4113_PRE32_MIN_N) && ( N_val < ADF4113_PRE64_MIN_N)) {
  162. P = 32;
  163. p_mode = ADF4113_PRESCALE32;
  164. } else if( N_val > ADF4113_PRE64_MIN_N) {
  165. P = 64;
  166. p_mode = ADF4113_PRESCALE64;
  167. }
  168. P = 32;
  169. B = N_val / P;
  170. A = N_val -(B * P);
  171. #ifdef DEBUG_PRINT
  172. printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
  173. printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
  174. #endif /* DEBUG_PRINT */
  175. }
  176. uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
  177. uint32_t ret = 0;
  178. uint32_t shift_bit = 0x01;
  179. uint8_t control_bit = 1;
  180. uint8_t i = 0;
  181. uint8_t reserve = 0;
  182. #ifdef DEBUG_PRINT
  183. printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
  184. printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret);
  185. #endif /* DEBUG_PRINT */
  186. for(i = 0; i < 2; i++){
  187. if(control_bit & 0x01)
  188. ret += shift_bit << i;
  189. control_bit = control_bit >> 1;
  190. }
  191. #ifdef DEBUG_PRINT
  192. printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret);
  193. #endif /* DEBUG_PRINT */
  194. for(i = 2; i < 8; i++){
  195. if(_ACOUNTER & 0x01)
  196. ret += shift_bit << i;
  197. _ACOUNTER = _ACOUNTER >> 1;
  198. }
  199. #ifdef DEBUG_PRINT
  200. printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret);
  201. #endif /* DEBUG_PRINT */
  202. for(i = 8; i < 21; i++){
  203. if(_BCOUNTER & 0x01)
  204. ret += shift_bit << i;
  205. _BCOUNTER = _BCOUNTER >> 1;
  206. }
  207. #ifdef DEBUG_PRINT
  208. printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret);
  209. #endif /* DEBUG_PRINT */
  210. if(_CPGAIN & 0x01)
  211. ret += shift_bit << i++;
  212. for(i = 22; i < 24; i++){
  213. if(reserve & 0x01)
  214. ret += shift_bit << i;
  215. reserve = reserve >> 1;
  216. }
  217. #ifdef DEBUG_PRINT
  218. printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret);
  219. #endif /* DEBUG_PRINT */
  220. return ret;
  221. }
  222. void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
  223. R2 = R2 & 0xFFFFFF;
  224. R1 = R1 & 0xFFFFFF;
  225. R0 = R0 & 0xFFFFFF;
  226. HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
  227. HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
  228. HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
  229. /* R2 Ctrl */
  230. for(int i =0; i < 24; i++){
  231. if(R2 & 0x800000){
  232. #ifdef DEBUG_PRINT
  233. printf("1");
  234. #endif /* DEBUG_PRINT */
  235. HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
  236. }
  237. else{
  238. #ifdef DEBUG_PRINT
  239. printf("0");
  240. #endif /* DEBUG_PRINT */
  241. HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
  242. }
  243. HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
  244. Pol_Delay_us(10);
  245. HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
  246. R2 = ((R2 << 1) & 0xFFFFFF);
  247. }
  248. #ifdef DEBUG_PRINT
  249. printf("\r\n");
  250. #endif /* DEBUG_PRINT */
  251. HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
  252. Pol_Delay_us(10);
  253. HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
  254. /* R0 Ctrl */
  255. for(int i =0; i < 24; i++){
  256. if(R0 & 0x800000){
  257. HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
  258. #ifdef DEBUG_PRINT
  259. printf("1");
  260. #endif /* DEBUG_PRINT */
  261. }
  262. else{
  263. HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
  264. #ifdef DEBUG_PRINT
  265. printf("0");
  266. #endif /* DEBUG_PRINT */
  267. }
  268. HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
  269. Pol_Delay_us(10);
  270. HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
  271. R0 = ((R0 << 1) & 0xFFFFFF);
  272. }
  273. #ifdef DEBUG_PRINT
  274. printf("\r\n");
  275. #endif /* DEBUG_PRINT */
  276. HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
  277. Pol_Delay_us(10);
  278. HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
  279. /* R1 Ctrl */
  280. for(int i =0; i < 24; i++){
  281. if(R1 & 0x800000){
  282. #ifdef DEBUG_PRINT
  283. printf("1");
  284. #endif /* DEBUG_PRINT */
  285. HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
  286. }
  287. else{
  288. #ifdef DEBUG_PRINT
  289. printf("0");
  290. #endif /* DEBUG_PRINT */
  291. HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
  292. }
  293. HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
  294. Pol_Delay_us(10);
  295. HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
  296. R1 = ((R1 << 1) & 0xFFFFFF);
  297. }
  298. #ifdef DEBUG_PRINT
  299. printf("\r\n");
  300. #endif /* DEBUG_PRINT */
  301. HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
  302. Pol_Delay_us(10);
  303. HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
  304. }