: { 8008068: b580 push {r7, lr} static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 800806a: 4db0 ldr r5, [pc, #704] ; (800832c ) { 800806c: b08c sub sp, #48 ; 0x30 HAL_Init(); 800806e: f7fd fa19 bl 80054a4 SystemClock_Config(); 8008072: f7ff ffc3 bl 8007ffc GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008076: 2210 movs r2, #16 8008078: 2100 movs r1, #0 800807a: a808 add r0, sp, #32 800807c: f001 fb1b bl 80096b6 __HAL_RCC_GPIOE_CLK_ENABLE(); 8008080: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8008082: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 8008084: f043 0340 orr.w r3, r3, #64 ; 0x40 8008088: 61ab str r3, [r5, #24] 800808a: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 800808c: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 800808e: f003 0340 and.w r3, r3, #64 ; 0x40 8008092: 9301 str r3, [sp, #4] 8008094: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOC_CLK_ENABLE(); 8008096: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8008098: 48a5 ldr r0, [pc, #660] ; (8008330 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 800809a: f043 0310 orr.w r3, r3, #16 800809e: 61ab str r3, [r5, #24] 80080a0: 69ab ldr r3, [r5, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 80080a2: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 80080a4: f003 0310 and.w r3, r3, #16 80080a8: 9302 str r3, [sp, #8] 80080aa: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOF_CLK_ENABLE(); 80080ac: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80080ae: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 80080b0: f043 0380 orr.w r3, r3, #128 ; 0x80 80080b4: 61ab str r3, [r5, #24] 80080b6: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80080b8: 2702 movs r7, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 80080ba: f003 0380 and.w r3, r3, #128 ; 0x80 80080be: 9303 str r3, [sp, #12] 80080c0: 9b03 ldr r3, [sp, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 80080c2: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 80080c4: f04f 090c mov.w r9, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 80080c8: f043 0304 orr.w r3, r3, #4 80080cc: 61ab str r3, [r5, #24] 80080ce: 69ab ldr r3, [r5, #24] hadc1.Init.NbrOfConversion = 14; 80080d0: f04f 080e mov.w r8, #14 __HAL_RCC_GPIOA_CLK_ENABLE(); 80080d4: f003 0304 and.w r3, r3, #4 80080d8: 9304 str r3, [sp, #16] 80080da: 9b04 ldr r3, [sp, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 80080dc: 69ab ldr r3, [r5, #24] sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 80080de: f04f 0a07 mov.w sl, #7 __HAL_RCC_GPIOB_CLK_ENABLE(); 80080e2: f043 0308 orr.w r3, r3, #8 80080e6: 61ab str r3, [r5, #24] 80080e8: 69ab ldr r3, [r5, #24] 80080ea: f003 0308 and.w r3, r3, #8 80080ee: 9305 str r3, [sp, #20] 80080f0: 9b05 ldr r3, [sp, #20] __HAL_RCC_GPIOD_CLK_ENABLE(); 80080f2: 69ab ldr r3, [r5, #24] 80080f4: f043 0320 orr.w r3, r3, #32 80080f8: 61ab str r3, [r5, #24] 80080fa: 69ab ldr r3, [r5, #24] 80080fc: f003 0320 and.w r3, r3, #32 8008100: 9306 str r3, [sp, #24] 8008102: 9b06 ldr r3, [sp, #24] __HAL_RCC_GPIOG_CLK_ENABLE(); 8008104: 69ab ldr r3, [r5, #24] 8008106: f443 7380 orr.w r3, r3, #256 ; 0x100 800810a: 61ab str r3, [r5, #24] 800810c: 69ab ldr r3, [r5, #24] 800810e: f403 7380 and.w r3, r3, #256 ; 0x100 8008112: 9307 str r3, [sp, #28] 8008114: 9b07 ldr r3, [sp, #28] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8008116: f7fe f8dd bl 80062d4 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 800811a: 2200 movs r2, #0 800811c: f64f 41c0 movw r1, #64704 ; 0xfcc0 8008120: 4884 ldr r0, [pc, #528] ; (8008334 ) 8008122: f7fe f8d7 bl 80062d4 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8008126: 2200 movs r2, #0 8008128: f240 31f3 movw r1, #1011 ; 0x3f3 800812c: 4882 ldr r0, [pc, #520] ; (8008338 ) 800812e: f7fe f8d1 bl 80062d4 HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8008132: 2200 movs r2, #0 8008134: f648 71ff movw r1, #36863 ; 0x8fff 8008138: 4880 ldr r0, [pc, #512] ; (800833c ) 800813a: f7fe f8cb bl 80062d4 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 800813e: 2200 movs r2, #0 8008140: f647 71fc movw r1, #32764 ; 0x7ffc 8008144: 487e ldr r0, [pc, #504] ; (8008340 ) 8008146: f7fe f8c5 bl 80062d4 HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET); 800814a: 2200 movs r2, #0 800814c: f44f 4100 mov.w r1, #32768 ; 0x8000 8008150: 487c ldr r0, [pc, #496] ; (8008344 ) 8008152: f7fe f8bf bl 80062d4 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8008156: 2200 movs r2, #0 8008158: 2118 movs r1, #24 800815a: 487b ldr r0, [pc, #492] ; (8008348 ) 800815c: f7fe f8ba bl 80062d4 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8008160: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8008162: a908 add r1, sp, #32 8008164: 4872 ldr r0, [pc, #456] ; (8008330 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8008166: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008168: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800816a: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 800816c: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800816e: f7fd ffbf bl 80060f0 GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8008172: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008176: a908 add r1, sp, #32 8008178: 486e ldr r0, [pc, #440] ; (8008334 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 800817a: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800817c: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800817e: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008180: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008182: f7fd ffb5 bl 80060f0 GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8008186: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 800818a: a908 add r1, sp, #32 800818c: 486a ldr r0, [pc, #424] ; (8008338 ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 800818e: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008190: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008192: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008194: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8008196: f7fd ffab bl 80060f0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 800819a: a908 add r1, sp, #32 800819c: 4866 ldr r0, [pc, #408] ; (8008338 ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 800819e: f8cd 9020 str.w r9, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80081a2: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80081a4: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80081a6: f7fd ffa3 bl 80060f0 /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin PATH_EN_3_5G_L_Pin */ GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 80081aa: f648 73ff movw r3, #36863 ; 0x8fff |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin |PATH_EN_3_5G_L_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80081ae: a908 add r1, sp, #32 80081b0: 4862 ldr r0, [pc, #392] ; (800833c ) GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 80081b2: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081b4: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081b6: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081b8: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80081ba: f7fd ff99 bl 80060f0 /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */ GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 80081be: f44f 5340 mov.w r3, #12288 ; 0x3000 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80081c2: a908 add r1, sp, #32 80081c4: 485d ldr r0, [pc, #372] ; (800833c ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 80081c6: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80081c8: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80081ca: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80081cc: f7fd ff90 bl 80060f0 /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin BOOT_LED_Pin */ GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 80081d0: f647 73fc movw r3, #32764 ; 0x7ffc |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin |BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 80081d4: a908 add r1, sp, #32 80081d6: 485a ldr r0, [pc, #360] ; (8008340 ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 80081d8: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081da: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081dc: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081de: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 80081e0: f7fd ff86 bl 80060f0 /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */ GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 80081e4: f44f 7340 mov.w r3, #768 ; 0x300 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80081e8: a908 add r1, sp, #32 80081ea: 4852 ldr r0, [pc, #328] ; (8008334 ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 80081ec: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80081ee: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80081f0: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80081f2: f7fd ff7d bl 80060f0 /*Configure GPIO pin : PLL_CLK_3_5G_Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 80081f6: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 80081fa: a908 add r1, sp, #32 80081fc: 4851 ldr r0, [pc, #324] ; (8008344 ) GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 80081fe: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008200: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008202: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008204: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8008206: f7fd ff73 bl 80060f0 /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 800820a: 2318 movs r3, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800820c: a908 add r1, sp, #32 800820e: 484e ldr r0, [pc, #312] ; (8008348 ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8008210: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008212: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008214: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008216: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008218: f7fd ff6a bl 80060f0 /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 800821c: 2360 movs r3, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800821e: a908 add r1, sp, #32 8008220: 4849 ldr r0, [pc, #292] ; (8008348 ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8008222: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008224: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008226: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008228: f7fd ff62 bl 80060f0 __HAL_RCC_DMA1_CLK_ENABLE(); 800822c: 696b ldr r3, [r5, #20] 800822e: 4333 orrs r3, r6 8008230: 616b str r3, [r5, #20] 8008232: 696b ldr r3, [r5, #20] hadc1.Instance = ADC1; 8008234: 4d45 ldr r5, [pc, #276] ; (800834c ) __HAL_RCC_DMA1_CLK_ENABLE(); 8008236: 4033 ands r3, r6 8008238: 9300 str r3, [sp, #0] 800823a: 9b00 ldr r3, [sp, #0] hadc1.Instance = ADC1; 800823c: 4b44 ldr r3, [pc, #272] ; (8008350 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 800823e: 4628 mov r0, r5 hadc1.Instance = ADC1; 8008240: 602b str r3, [r5, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8008242: f44f 7380 mov.w r3, #256 ; 0x100 8008246: 60ab str r3, [r5, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8008248: f44f 2360 mov.w r3, #917504 ; 0xe0000 hadc1.Init.ContinuousConvMode = ENABLE; 800824c: 60ee str r6, [r5, #12] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 800824e: 61eb str r3, [r5, #28] ADC_ChannelConfTypeDef sConfig = {0}; 8008250: 9408 str r4, [sp, #32] 8008252: 9409 str r4, [sp, #36] ; 0x24 8008254: 940a str r4, [sp, #40] ; 0x28 hadc1.Init.DiscontinuousConvMode = DISABLE; 8008256: 616c str r4, [r5, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8008258: 606c str r4, [r5, #4] hadc1.Init.NbrOfConversion = 14; 800825a: f8c5 8010 str.w r8, [r5, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 800825e: f7fd faff bl 8005860 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008262: a908 add r1, sp, #32 8008264: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_1; 8008266: 9609 str r6, [sp, #36] ; 0x24 sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 8008268: f8cd a028 str.w sl, [sp, #40] ; 0x28 sConfig.Channel = ADC_CHANNEL_0; 800826c: 9408 str r4, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800826e: f7fd f98b bl 8005588 sConfig.Channel = ADC_CHANNEL_1; 8008272: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 8008274: 2603 movs r6, #3 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008276: a908 add r1, sp, #32 8008278: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_2; 800827a: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800827c: f7fd f984 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008280: a908 add r1, sp, #32 8008282: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_2; 8008284: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 8008286: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008288: f7fd f97e bl 8005588 sConfig.Channel = ADC_CHANNEL_3; 800828c: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_4; 800828e: 2604 movs r6, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008290: a908 add r1, sp, #32 8008292: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_4; 8008294: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008296: f7fd f977 bl 8005588 sConfig.Channel = ADC_CHANNEL_4; 800829a: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_5; 800829c: 2605 movs r6, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800829e: a908 add r1, sp, #32 80082a0: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_5; 80082a2: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082a4: f7fd f970 bl 8005588 sConfig.Channel = ADC_CHANNEL_5; 80082a8: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_6; 80082aa: 2606 movs r6, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082ac: a908 add r1, sp, #32 80082ae: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_6; 80082b0: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082b2: f7fd f969 bl 8005588 sConfig.Channel = ADC_CHANNEL_6; 80082b6: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 80082b8: 2608 movs r6, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082ba: a908 add r1, sp, #32 80082bc: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_7; 80082be: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082c2: f7fd f961 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082c6: a908 add r1, sp, #32 80082c8: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_7; 80082ca: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 80082ce: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082d0: f7fd f95a bl 8005588 sConfig.Channel = ADC_CHANNEL_8; 80082d4: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_9; 80082d6: 2609 movs r6, #9 sConfig.Rank = ADC_REGULAR_RANK_10; 80082d8: f04f 0a0a mov.w sl, #10 sConfig.Rank = ADC_REGULAR_RANK_11; 80082dc: 270b movs r7, #11 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082de: a908 add r1, sp, #32 80082e0: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_9; 80082e2: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082e4: f7fd f950 bl 8005588 sConfig.Channel = ADC_CHANNEL_9; 80082e8: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_13; 80082ea: 260d movs r6, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082ec: a908 add r1, sp, #32 80082ee: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_10; 80082f0: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082f4: f7fd f948 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082f8: a908 add r1, sp, #32 80082fa: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_10; 80082fc: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_11; 8008300: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008302: f7fd f941 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008306: a908 add r1, sp, #32 8008308: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_11; 800830a: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_12; 800830c: f8cd 9024 str.w r9, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008310: f7fd f93a bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008314: a908 add r1, sp, #32 8008316: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_13; 8008318: 9609 str r6, [sp, #36] ; 0x24 sConfig.Channel = ADC_CHANNEL_12; 800831a: f8cd 9020 str.w r9, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800831e: f7fd f933 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008322: a908 add r1, sp, #32 8008324: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_13; 8008326: 9608 str r6, [sp, #32] 8008328: e014 b.n 8008354 800832a: bf00 nop 800832c: 40021000 .word 0x40021000 8008330: 40011800 .word 0x40011800 8008334: 40011000 .word 0x40011000 8008338: 40011c00 .word 0x40011c00 800833c: 40011400 .word 0x40011400 8008340: 40012000 .word 0x40012000 8008344: 40010800 .word 0x40010800 8008348: 40010c00 .word 0x40010c00 800834c: 2000068c .word 0x2000068c 8008350: 40012400 .word 0x40012400 sConfig.Rank = ADC_REGULAR_RANK_14; 8008354: f8cd 8024 str.w r8, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008358: f7fd f916 bl 8005588 huart1.Init.BaudRate = 115200; 800835c: f44f 33e1 mov.w r3, #115200 ; 0x1c200 huart1.Instance = USART1; 8008360: 4838 ldr r0, [pc, #224] ; (8008444 ) huart1.Init.BaudRate = 115200; 8008362: 4a39 ldr r2, [pc, #228] ; (8008448 ) huart1.Init.WordLength = UART_WORDLENGTH_8B; 8008364: 6084 str r4, [r0, #8] huart1.Init.BaudRate = 115200; 8008366: e880 000c stmia.w r0, {r2, r3} huart1.Init.StopBits = UART_STOPBITS_1; 800836a: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 800836c: 6104 str r4, [r0, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800836e: f8c0 9014 str.w r9, [r0, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8008372: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8008374: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8008376: f7fe fd4f bl 8006e18 htim6.Init.Prescaler = 5600-1; 800837a: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 800837e: 4e33 ldr r6, [pc, #204] ; (800844c ) htim6.Init.Prescaler = 5600-1; 8008380: 4933 ldr r1, [pc, #204] ; (8008450 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8008382: 4630 mov r0, r6 htim6.Init.Prescaler = 5600-1; 8008384: e886 000a stmia.w r6, {r1, r3} TIM_MasterConfigTypeDef sMasterConfig = {0}; 8008388: 9408 str r4, [sp, #32] 800838a: 9409 str r4, [sp, #36] ; 0x24 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 800838c: 60b4 str r4, [r6, #8] htim6.Init.Period = 10; 800838e: f8c6 a00c str.w sl, [r6, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8008392: 61b4 str r4, [r6, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8008394: f7fe fc2e bl 8006bf4 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8008398: a908 add r1, sp, #32 800839a: 4630 mov r0, r6 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800839c: 9408 str r4, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800839e: 9409 str r4, [sp, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80083a0: f7fe fc42 bl 8006c28 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80083a4: 4622 mov r2, r4 80083a6: 4621 mov r1, r4 80083a8: 2025 movs r0, #37 ; 0x25 80083aa: f7fd fb5d bl 8005a68 HAL_NVIC_EnableIRQ(USART1_IRQn); 80083ae: 2025 movs r0, #37 ; 0x25 80083b0: f7fd fb8e bl 8005ad0 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 80083b4: 4622 mov r2, r4 80083b6: 4621 mov r1, r4 80083b8: 2036 movs r0, #54 ; 0x36 80083ba: f7fd fb55 bl 8005a68 HAL_NVIC_EnableIRQ(TIM6_IRQn); 80083be: 2036 movs r0, #54 ; 0x36 80083c0: f7fd fb86 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 80083c4: 4622 mov r2, r4 80083c6: 4621 mov r1, r4 80083c8: 4638 mov r0, r7 80083ca: f7fd fb4d bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 80083ce: 4638 mov r0, r7 80083d0: f7fd fb7e bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 80083d4: 4622 mov r2, r4 80083d6: 4621 mov r1, r4 80083d8: 4640 mov r0, r8 80083da: f7fd fb45 bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 80083de: 4640 mov r0, r8 80083e0: f7fd fb76 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 80083e4: 4622 mov r2, r4 80083e6: 4621 mov r1, r4 80083e8: 200f movs r0, #15 80083ea: f7fd fb3d bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80083ee: 200f movs r0, #15 80083f0: f7fd fb6e bl 8005ad0 InitUartQueue(&TerminalQueue); 80083f4: 4817 ldr r0, [pc, #92] ; (8008454 ) 80083f6: f000 fad7 bl 80089a8 Power_ON_OFF_Initialize(); 80083fa: f7ff fd13 bl 8007e24 Path_Init(); 80083fe: f7ff fc59 bl 8007cb4 while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK)); 8008402: 4628 mov r0, r5 8008404: f7fd fab6 bl 8005974 8008408: 2800 cmp r0, #0 800840a: d1fa bne.n 8008402 AD5318_Initialize(); 800840c: f7fe ffb0 bl 8007370 Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]); 8008410: 4811 ldr r0, [pc, #68] ; (8008458 ) 8008412: f7ff fc3e bl 8007c92 ADF4153_Initialize(); 8008416: f7ff fae1 bl 80079dc ADF4113_Initialize(); 800841a: f000 f825 bl 8008468 PE43711_PinInit(); 800841e: f7ff f9af bl 8007780 BDA4601_Initialize(); 8008422: f7ff f82b bl 800747c ATTEN_PLL_PATH_Initialize(); 8008426: f7ff fceb bl 8007e00 HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14); 800842a: 220e movs r2, #14 800842c: 490b ldr r1, [pc, #44] ; (800845c ) 800842e: 480c ldr r0, [pc, #48] ; (8008460 ) 8008430: f7fd f966 bl 8005700 Boot_LED_Toggle(); 8008434: f7ff fd70 bl 8007f18 Uart_Check(); 8008438: f7ff fda0 bl 8007f7c ADC_Check(); 800843c: f7ff fd7e bl 8007f3c 8008440: e7f8 b.n 8008434 8008442: bf00 nop 8008444: 20000700 .word 0x20000700 8008448: 40013800 .word 0x40013800 800844c: 20000784 .word 0x20000784 8008450: 40001000 .word 0x40001000 8008454: 20000bc4 .word 0x20000bc4 8008458: 20000580 .word 0x20000580 800845c: 200004a0 .word 0x200004a0 8008460: 2000068c .word 0x2000068c 08008464 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8008464: 4770 bx lr ... 08008468 : uint16_t P; uint16_t A; uint16_t N; }Adf4113_st; void ADF4113_Initialize(void){ if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){ 8008468: 4b10 ldr r3, [pc, #64] ; (80084ac ) 800846a: 7d9a ldrb r2, [r3, #22] 800846c: b92a cbnz r2, 800847a 800846e: 7dda ldrb r2, [r3, #23] 8008470: b91a cbnz r2, 800847a Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47; 8008472: 223e movs r2, #62 ; 0x3e 8008474: 759a strb r2, [r3, #22] Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF); 8008476: 2280 movs r2, #128 ; 0x80 8008478: 75da strb r2, [r3, #23] } if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){ 800847a: 7e1a ldrb r2, [r3, #24] 800847c: b92a cbnz r2, 800848a 800847e: 7e5a ldrb r2, [r3, #25] 8008480: b91a cbnz r2, 800848a Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8); 8008482: 2238 movs r2, #56 ; 0x38 8008484: 761a strb r2, [r3, #24] Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF); 8008486: 22d6 movs r2, #214 ; 0xd6 8008488: 765a strb r2, [r3, #25] } if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){ 800848a: 7e9a ldrb r2, [r3, #26] 800848c: b92a cbnz r2, 800849a 800848e: 7eda ldrb r2, [r3, #27] 8008490: b91a cbnz r2, 800849a Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8); 8008492: 224d movs r2, #77 ; 0x4d 8008494: 769a strb r2, [r3, #26] Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF); 8008496: 22ee movs r2, #238 ; 0xee 8008498: 76da strb r2, [r3, #27] } if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){ 800849a: 7f1a ldrb r2, [r3, #28] 800849c: b92a cbnz r2, 80084aa 800849e: 7f5a ldrb r2, [r3, #29] 80084a0: b91a cbnz r2, 80084aa Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8); 80084a2: 2259 movs r2, #89 ; 0x59 80084a4: 771a strb r2, [r3, #28] Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF); 80084a6: 22a6 movs r2, #166 ; 0xa6 80084a8: 775a strb r2, [r3, #29] 80084aa: 4770 bx lr 80084ac: 20000580 .word 0x20000580 080084b0 : A = N_val -(B * P); // printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); // printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); return N_Counter_Latch_Create(A,B,0); } uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){ 80084b0: 2301 movs r3, #1 80084b2: b570 push {r4, r5, r6, lr} 80084b4: 2402 movs r4, #2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 8; i++){ if(_ACOUNTER & 0x01) ret += shift_bit << i; 80084b6: 461d mov r5, r3 if(_ACOUNTER & 0x01) 80084b8: 07c6 lsls r6, r0, #31 ret += shift_bit << i; 80084ba: bf48 it mi 80084bc: fa05 f604 lslmi.w r6, r5, r4 80084c0: f104 0401 add.w r4, r4, #1 80084c4: bf48 it mi 80084c6: 199b addmi r3, r3, r6 for(i = 2; i < 8; i++){ 80084c8: 2c08 cmp r4, #8 _ACOUNTER = _ACOUNTER >> 1; 80084ca: ea4f 0050 mov.w r0, r0, lsr #1 for(i = 2; i < 8; i++){ 80084ce: d1f3 bne.n 80084b8 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 8; i < 21; i++){ if(_BCOUNTER & 0x01) ret += shift_bit << i; 80084d0: 2001 movs r0, #1 if(_BCOUNTER & 0x01) 80084d2: 07cd lsls r5, r1, #31 ret += shift_bit << i; 80084d4: bf48 it mi 80084d6: fa00 f504 lslmi.w r5, r0, r4 80084da: f104 0401 add.w r4, r4, #1 80084de: bf48 it mi 80084e0: 195b addmi r3, r3, r5 for(i = 8; i < 21; i++){ 80084e2: 2c15 cmp r4, #21 _BCOUNTER = _BCOUNTER >> 1; 80084e4: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 8; i < 21; i++){ 80084e8: d1f3 bne.n 80084d2 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ if(_CPGAIN & 0x01) 80084ea: 07d2 lsls r2, r2, #31 ret += shift_bit << i++; 80084ec: bf48 it mi 80084ee: f503 1300 addmi.w r3, r3, #2097152 ; 0x200000 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } 80084f2: 4618 mov r0, r3 80084f4: bd70 pop {r4, r5, r6, pc} ... 080084f8 : N_val = (rf_Freq / ADF4113_CH_STEP); 80084f8: f24c 3350 movw r3, #50000 ; 0xc350 80084fc: fbb0 f3f3 udiv r3, r0, r3 if( N_val < ADF4113_PRE8_MIN_N) { 8008500: 2b37 cmp r3, #55 ; 0x37 8008502: d909 bls.n 8008518 B = N_val / P; 8008504: 4905 ldr r1, [pc, #20] ; (800851c ) return N_Counter_Latch_Create(A,B,0); 8008506: 2200 movs r2, #0 B = N_val / P; 8008508: fbb0 f1f1 udiv r1, r0, r1 A = N_val -(B * P); 800850c: eba3 1041 sub.w r0, r3, r1, lsl #5 return N_Counter_Latch_Create(A,B,0); 8008510: b280 uxth r0, r0 8008512: b289 uxth r1, r1 8008514: f7ff bfcc b.w 80084b0 } 8008518: 2004 movs r0, #4 800851a: 4770 bx lr 800851c: 00186a00 .word 0x00186a00 08008520 : void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 8008520: b084 sub sp, #16 8008522: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008526: ac0c add r4, sp, #48 ; 0x30 8008528: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 800852c: 9b13 ldr r3, [sp, #76] ; 0x4c 800852e: f8bd 7034 ldrh.w r7, [sp, #52] ; 0x34 8008532: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008536: 9301 str r3, [sp, #4] R0 = R0 & 0xFFFFFF; 8008538: 9b12 ldr r3, [sp, #72] ; 0x48 800853a: f8dd 8038 ldr.w r8, [sp, #56] ; 0x38 800853e: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 8008542: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008546: 9d10 ldr r5, [sp, #64] ; 0x40 8008548: f8bd 6044 ldrh.w r6, [sp, #68] ; 0x44 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800854c: 2200 movs r2, #0 800854e: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 8008550: 9300 str r3, [sp, #0] 8008552: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 8008554: 9c14 ldr r4, [sp, #80] ; 0x50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008556: f7fd febd bl 80062d4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800855a: 2200 movs r2, #0 800855c: 4649 mov r1, r9 800855e: 4640 mov r0, r8 8008560: f7fd feb8 bl 80062d4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008564: 2200 movs r2, #0 8008566: 4631 mov r1, r6 8008568: 4628 mov r0, r5 800856a: f7fd feb3 bl 80062d4 800856e: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 8008572: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 8008576: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 800857a: bf18 it ne 800857c: 2201 movne r2, #1 } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800857e: 4649 mov r1, r9 8008580: 4640 mov r0, r8 8008582: f7fd fea7 bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8008586: 2201 movs r2, #1 8008588: 4639 mov r1, r7 800858a: 4650 mov r0, sl 800858c: f7fd fea2 bl 80062d4 Pol_Delay_us(10); 8008590: 200a movs r0, #10 8008592: f7ff fcab bl 8007eec HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008596: 2200 movs r2, #0 8008598: 4639 mov r1, r7 800859a: 4650 mov r0, sl 800859c: f7fd fe9a bl 80062d4 R2 = ((R2 << 1) & 0xFFFFFF); 80085a0: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 80085a2: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 80085a6: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 80085aa: d1e4 bne.n 8008576 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80085ac: 2201 movs r2, #1 80085ae: 4631 mov r1, r6 80085b0: 4628 mov r0, r5 80085b2: f7fd fe8f bl 80062d4 Pol_Delay_us(10); 80085b6: 200a movs r0, #10 80085b8: f7ff fc98 bl 8007eec HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80085bc: 465a mov r2, fp 80085be: 4631 mov r1, r6 80085c0: 4628 mov r0, r5 80085c2: f7fd fe87 bl 80062d4 80085c6: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 80085c8: 9b00 ldr r3, [sp, #0] #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085ca: 4649 mov r1, r9 if(R0 & 0x800000){ 80085cc: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80085d0: bf18 it ne 80085d2: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085d4: 4640 mov r0, r8 80085d6: f7fd fe7d bl 80062d4 #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80085da: 2201 movs r2, #1 80085dc: 4639 mov r1, r7 80085de: 4650 mov r0, sl 80085e0: f7fd fe78 bl 80062d4 Pol_Delay_us(10); 80085e4: 200a movs r0, #10 80085e6: f7ff fc81 bl 8007eec HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085ea: 2200 movs r2, #0 80085ec: 4639 mov r1, r7 80085ee: 4650 mov r0, sl 80085f0: f7fd fe70 bl 80062d4 R0 = ((R0 << 1) & 0xFFFFFF); 80085f4: 9b00 ldr r3, [sp, #0] for(int i =0; i < 24; i++){ 80085f6: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 80085f8: ea4f 0343 mov.w r3, r3, lsl #1 80085fc: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008600: 9300 str r3, [sp, #0] for(int i =0; i < 24; i++){ 8008602: d1e1 bne.n 80085c8 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008604: 2201 movs r2, #1 8008606: 4631 mov r1, r6 8008608: 4628 mov r0, r5 800860a: f7fd fe63 bl 80062d4 Pol_Delay_us(10); 800860e: 200a movs r0, #10 8008610: f7ff fc6c bl 8007eec HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008614: 4622 mov r2, r4 8008616: 4631 mov r1, r6 8008618: 4628 mov r0, r5 800861a: f7fd fe5b bl 80062d4 800861e: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 8008620: 9b01 ldr r3, [sp, #4] } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008622: 4649 mov r1, r9 if(R1 & 0x800000){ 8008624: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008628: bf18 it ne 800862a: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800862c: 4640 mov r0, r8 800862e: f7fd fe51 bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8008632: 2201 movs r2, #1 8008634: 4639 mov r1, r7 8008636: 4650 mov r0, sl 8008638: f7fd fe4c bl 80062d4 Pol_Delay_us(10); 800863c: 200a movs r0, #10 800863e: f7ff fc55 bl 8007eec HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008642: 2200 movs r2, #0 8008644: 4639 mov r1, r7 8008646: 4650 mov r0, sl 8008648: f7fd fe44 bl 80062d4 R1 = ((R1 << 1) & 0xFFFFFF); 800864c: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 800864e: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 8008650: ea4f 0343 mov.w r3, r3, lsl #1 8008654: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008658: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 800865a: d1e1 bne.n 8008620 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800865c: 4631 mov r1, r6 800865e: 2201 movs r2, #1 8008660: 4628 mov r0, r5 8008662: f7fd fe37 bl 80062d4 Pol_Delay_us(10); 8008666: 200a movs r0, #10 8008668: f7ff fc40 bl 8007eec HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800866c: 4622 mov r2, r4 800866e: 4631 mov r1, r6 8008670: 4628 mov r0, r5 } 8008672: b003 add sp, #12 8008674: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008678: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800867a: f7fd be2b b.w 80062d4 ... 08008680 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8008680: 4b0e ldr r3, [pc, #56] ; (80086bc ) { 8008682: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8008684: 699a ldr r2, [r3, #24] 8008686: f042 0201 orr.w r2, r2, #1 800868a: 619a str r2, [r3, #24] 800868c: 699a ldr r2, [r3, #24] 800868e: f002 0201 and.w r2, r2, #1 8008692: 9200 str r2, [sp, #0] 8008694: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8008696: 69da ldr r2, [r3, #28] 8008698: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 800869c: 61da str r2, [r3, #28] 800869e: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80086a0: 4a07 ldr r2, [pc, #28] ; (80086c0 ) __HAL_RCC_PWR_CLK_ENABLE(); 80086a2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80086a6: 9301 str r3, [sp, #4] 80086a8: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80086aa: 6853 ldr r3, [r2, #4] 80086ac: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80086b0: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 80086b4: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80086b6: b002 add sp, #8 80086b8: 4770 bx lr 80086ba: bf00 nop 80086bc: 40021000 .word 0x40021000 80086c0: 40010000 .word 0x40010000 080086c4 : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80086c4: 2210 movs r2, #16 { 80086c6: b530 push {r4, r5, lr} 80086c8: 4605 mov r5, r0 80086ca: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80086cc: eb0d 0002 add.w r0, sp, r2 80086d0: 2100 movs r1, #0 80086d2: f000 fff0 bl 80096b6 if(hadc->Instance==ADC1) 80086d6: 682a ldr r2, [r5, #0] 80086d8: 4b2c ldr r3, [pc, #176] ; (800878c ) 80086da: 429a cmp r2, r3 80086dc: d153 bne.n 8008786 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 80086de: f503 436c add.w r3, r3, #60416 ; 0xec00 80086e2: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80086e4: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 80086e6: f442 7200 orr.w r2, r2, #512 ; 0x200 80086ea: 619a str r2, [r3, #24] 80086ec: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80086ee: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 80086f0: f402 7200 and.w r2, r2, #512 ; 0x200 80086f4: 9200 str r2, [sp, #0] 80086f6: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 80086f8: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80086fa: 4825 ldr r0, [pc, #148] ; (8008790 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 80086fc: f042 0210 orr.w r2, r2, #16 8008700: 619a str r2, [r3, #24] 8008702: 699a ldr r2, [r3, #24] 8008704: f002 0210 and.w r2, r2, #16 8008708: 9201 str r2, [sp, #4] 800870a: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 800870c: 699a ldr r2, [r3, #24] 800870e: f042 0204 orr.w r2, r2, #4 8008712: 619a str r2, [r3, #24] 8008714: 699a ldr r2, [r3, #24] 8008716: f002 0204 and.w r2, r2, #4 800871a: 9202 str r2, [sp, #8] 800871c: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 800871e: 699a ldr r2, [r3, #24] 8008720: f042 0208 orr.w r2, r2, #8 8008724: 619a str r2, [r3, #24] 8008726: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008728: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 800872a: f003 0308 and.w r3, r3, #8 800872e: 9303 str r3, [sp, #12] 8008730: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 8008732: 230f movs r3, #15 8008734: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008736: f7fd fcdb bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 800873a: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800873c: a904 add r1, sp, #16 800873e: 4815 ldr r0, [pc, #84] ; (8008794 ) GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 8008740: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008742: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008744: f7fd fcd4 bl 80060f0 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008748: 4813 ldr r0, [pc, #76] ; (8008798 ) 800874a: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 800874c: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800874e: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008750: f7fd fcce bl 80060f0 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8008754: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 8008756: 4c11 ldr r4, [pc, #68] ; (800879c ) 8008758: 4b11 ldr r3, [pc, #68] ; (80087a0 ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 800875a: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 800875c: f44f 7200 mov.w r2, #512 ; 0x200 8008760: 6122 str r2, [r4, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 8008762: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Instance = DMA1_Channel1; 8008766: 6023 str r3, [r4, #0] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 8008768: 6162 str r2, [r4, #20] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 800876a: 2300 movs r3, #0 hdma_adc1.Init.Mode = DMA_CIRCULAR; 800876c: 2220 movs r2, #32 hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 800876e: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008770: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 8008772: 60a3 str r3, [r4, #8] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8008774: 61a2 str r2, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8008776: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8008778: f7fd f9cc bl 8005b14 800877c: b108 cbz r0, 8008782 { Error_Handler(); 800877e: f7ff fe71 bl 8008464 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 8008782: 622c str r4, [r5, #32] 8008784: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 8008786: b009 add sp, #36 ; 0x24 8008788: bd30 pop {r4, r5, pc} 800878a: bf00 nop 800878c: 40012400 .word 0x40012400 8008790: 40011000 .word 0x40011000 8008794: 40010800 .word 0x40010800 8008798: 40010c00 .word 0x40010c00 800879c: 20000740 .word 0x20000740 80087a0: 40020008 .word 0x40020008 080087a4 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 80087a4: 6802 ldr r2, [r0, #0] 80087a6: 4b08 ldr r3, [pc, #32] ; (80087c8 ) { 80087a8: b082 sub sp, #8 if(htim_base->Instance==TIM6) 80087aa: 429a cmp r2, r3 80087ac: d10a bne.n 80087c4 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80087ae: f503 3300 add.w r3, r3, #131072 ; 0x20000 80087b2: 69da ldr r2, [r3, #28] 80087b4: f042 0210 orr.w r2, r2, #16 80087b8: 61da str r2, [r3, #28] 80087ba: 69db ldr r3, [r3, #28] 80087bc: f003 0310 and.w r3, r3, #16 80087c0: 9301 str r3, [sp, #4] 80087c2: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 80087c4: b002 add sp, #8 80087c6: 4770 bx lr 80087c8: 40001000 .word 0x40001000 080087cc : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 80087cc: b570 push {r4, r5, r6, lr} 80087ce: 4606 mov r6, r0 80087d0: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80087d2: 2210 movs r2, #16 80087d4: 2100 movs r1, #0 80087d6: a802 add r0, sp, #8 80087d8: f000 ff6d bl 80096b6 if(huart->Instance==USART1) 80087dc: 6832 ldr r2, [r6, #0] 80087de: 4b2b ldr r3, [pc, #172] ; (800888c ) 80087e0: 429a cmp r2, r3 80087e2: d151 bne.n 8008888 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 80087e4: f503 4358 add.w r3, r3, #55296 ; 0xd800 80087e8: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80087ea: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 80087ec: f442 4280 orr.w r2, r2, #16384 ; 0x4000 80087f0: 619a str r2, [r3, #24] 80087f2: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80087f4: 4826 ldr r0, [pc, #152] ; (8008890 ) __HAL_RCC_USART1_CLK_ENABLE(); 80087f6: f402 4280 and.w r2, r2, #16384 ; 0x4000 80087fa: 9200 str r2, [sp, #0] 80087fc: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 80087fe: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008800: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8008802: f042 0204 orr.w r2, r2, #4 8008806: 619a str r2, [r3, #24] 8008808: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 800880a: 4c22 ldr r4, [pc, #136] ; (8008894 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 800880c: f003 0304 and.w r3, r3, #4 8008810: 9301 str r3, [sp, #4] 8008812: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8008814: f44f 7300 mov.w r3, #512 ; 0x200 8008818: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800881a: 2302 movs r3, #2 800881c: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800881e: 2303 movs r3, #3 8008820: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008822: f7fd fc65 bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_10; 8008826: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800882a: 4819 ldr r0, [pc, #100] ; (8008890 ) 800882c: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 800882e: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008830: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8008832: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008834: f7fd fc5c bl 80060f0 hdma_usart1_rx.Instance = DMA1_Channel5; 8008838: 4b17 ldr r3, [pc, #92] ; (8008898 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 800883a: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 800883c: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8008840: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 8008842: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8008844: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8008846: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8008848: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 800884a: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 800884c: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 800884e: f7fd f961 bl 8005b14 8008852: b108 cbz r0, 8008858 { Error_Handler(); 8008854: f7ff fe06 bl 8008464 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8008858: f04f 0c10 mov.w ip, #16 800885c: 4b0f ldr r3, [pc, #60] ; (800889c ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 800885e: 6374 str r4, [r6, #52] ; 0x34 8008860: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 8008862: 4c0f ldr r4, [pc, #60] ; (80088a0 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8008864: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8008866: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800886a: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 800886c: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800886e: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8008870: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8008872: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8008874: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 8008876: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8008878: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 800887a: f7fd f94b bl 8005b14 800887e: b108 cbz r0, 8008884 { Error_Handler(); 8008880: f7ff fdf0 bl 8008464 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 8008884: 6334 str r4, [r6, #48] ; 0x30 8008886: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8008888: b006 add sp, #24 800888a: bd70 pop {r4, r5, r6, pc} 800888c: 40013800 .word 0x40013800 8008890: 40010800 .word 0x40010800 8008894: 200006bc .word 0x200006bc 8008898: 40020058 .word 0x40020058 800889c: 40020044 .word 0x40020044 80088a0: 20000648 .word 0x20000648 080088a4 : 80088a4: 4770 bx lr 080088a6 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80088a6: e7fe b.n 80088a6 080088a8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80088a8: e7fe b.n 80088a8 080088aa : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80088aa: e7fe b.n 80088aa 080088ac : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80088ac: e7fe b.n 80088ac 080088ae : 80088ae: 4770 bx lr 080088b0 : 80088b0: 4770 bx lr 080088b2 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80088b2: 4770 bx lr 080088b4 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80088b4: f7fc be08 b.w 80054c8 080088b8 : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 80088b8: 4801 ldr r0, [pc, #4] ; (80088c0 ) 80088ba: f7fd ba17 b.w 8005cec 80088be: bf00 nop 80088c0: 20000740 .word 0x20000740 080088c4 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 80088c4: 4801 ldr r0, [pc, #4] ; (80088cc ) 80088c6: f7fd ba11 b.w 8005cec 80088ca: bf00 nop 80088cc: 20000648 .word 0x20000648 080088d0 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 80088d0: 4801 ldr r0, [pc, #4] ; (80088d8 ) 80088d2: f7fd ba0b b.w 8005cec 80088d6: bf00 nop 80088d8: 200006bc .word 0x200006bc 080088dc : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 80088dc: 4801 ldr r0, [pc, #4] ; (80088e4 ) 80088de: f7fe bc4d b.w 800717c 80088e2: bf00 nop 80088e4: 20000700 .word 0x20000700 080088e8 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 80088e8: 4801 ldr r0, [pc, #4] ; (80088f0 ) 80088ea: f7fe b895 b.w 8006a18 80088ee: bf00 nop 80088f0: 20000784 .word 0x20000784 080088f4 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 80088f4: b570 push {r4, r5, r6, lr} 80088f6: 460e mov r6, r1 80088f8: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 80088fa: 460c mov r4, r1 80088fc: 1ba3 subs r3, r4, r6 80088fe: 429d cmp r5, r3 8008900: dc01 bgt.n 8008906 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8008902: 4628 mov r0, r5 8008904: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 8008906: f3af 8000 nop.w 800890a: f804 0b01 strb.w r0, [r4], #1 800890e: e7f5 b.n 80088fc <_read+0x8> 08008910 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8008910: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8008912: 4b0a ldr r3, [pc, #40] ; (800893c <_sbrk+0x2c>) { 8008914: 4602 mov r2, r0 if (heap_end == 0) 8008916: 6819 ldr r1, [r3, #0] 8008918: b909 cbnz r1, 800891e <_sbrk+0xe> heap_end = &end; 800891a: 4909 ldr r1, [pc, #36] ; (8008940 <_sbrk+0x30>) 800891c: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 800891e: 4669 mov r1, sp prev_heap_end = heap_end; 8008920: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8008922: 4402 add r2, r0 8008924: 428a cmp r2, r1 8008926: d906 bls.n 8008936 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8008928: f000 fe90 bl 800964c <__errno> 800892c: 230c movs r3, #12 800892e: 6003 str r3, [r0, #0] return (caddr_t) -1; 8008930: f04f 30ff mov.w r0, #4294967295 8008934: bd08 pop {r3, pc} } heap_end += incr; 8008936: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8008938: bd08 pop {r3, pc} 800893a: bf00 nop 800893c: 20000460 .word 0x20000460 8008940: 200017e4 .word 0x200017e4 08008944 <_close>: int _close(int file) { return -1; } 8008944: f04f 30ff mov.w r0, #4294967295 8008948: 4770 bx lr 0800894a <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 800894a: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 800894e: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8008950: 604b str r3, [r1, #4] } 8008952: 4770 bx lr 08008954 <_isatty>: int _isatty(int file) { return 1; } 8008954: 2001 movs r0, #1 8008956: 4770 bx lr 08008958 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 8008958: 2000 movs r0, #0 800895a: 4770 bx lr 0800895c : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 800895c: 4b0e ldr r3, [pc, #56] ; (8008998 ) 800895e: 681a ldr r2, [r3, #0] 8008960: f042 0201 orr.w r2, r2, #1 8008964: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8008966: 6859 ldr r1, [r3, #4] 8008968: 4a0c ldr r2, [pc, #48] ; (800899c ) 800896a: 400a ands r2, r1 800896c: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 800896e: 681a ldr r2, [r3, #0] 8008970: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8008974: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8008978: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 800897a: 681a ldr r2, [r3, #0] 800897c: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8008980: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8008982: 685a ldr r2, [r3, #4] 8008984: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8008988: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 800898a: f44f 021f mov.w r2, #10420224 ; 0x9f0000 800898e: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8008990: 4a03 ldr r2, [pc, #12] ; (80089a0 ) 8008992: 4b04 ldr r3, [pc, #16] ; (80089a4 ) 8008994: 609a str r2, [r3, #8] 8008996: 4770 bx lr 8008998: 40021000 .word 0x40021000 800899c: f8ff0000 .word 0xf8ff0000 80089a0: 08004000 .word 0x08004000 80089a4: e000ed00 .word 0xe000ed00 080089a8 : UARTQUEUE WifiQueue; uart_hal_tx_type uart_hal_tx; void InitUartQueue(pUARTQUEUE pQueue) { setbuf(stdout, NULL); 80089a8: 4b0b ldr r3, [pc, #44] ; (80089d8 ) { 80089aa: b510 push {r4, lr} setbuf(stdout, NULL); 80089ac: 681b ldr r3, [r3, #0] { 80089ae: 4604 mov r4, r0 setbuf(stdout, NULL); 80089b0: 2100 movs r1, #0 80089b2: 6898 ldr r0, [r3, #8] 80089b4: f001 fb64 bl 800a080 pQueue->data = pQueue->head = pQueue->tail = 0; 80089b8: 2300 movs r3, #0 uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 80089ba: 4a08 ldr r2, [pc, #32] ; (80089dc ) pQueue->data = pQueue->head = pQueue->tail = 0; 80089bc: 6063 str r3, [r4, #4] 80089be: 6023 str r3, [r4, #0] 80089c0: 60a3 str r3, [r4, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80089c2: 4907 ldr r1, [pc, #28] ; (80089e0 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 80089c4: f8a2 3400 strh.w r3, [r2, #1024] ; 0x400 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80089c8: 4806 ldr r0, [pc, #24] ; (80089e4 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 80089ca: f8a2 3402 strh.w r3, [r2, #1026] ; 0x402 { //_Error_Handler(__FILE__, __LINE__); } //HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1); //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1); } 80089ce: e8bd 4010 ldmia.w sp!, {r4, lr} if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80089d2: 2201 movs r2, #1 80089d4: f7fe bae4 b.w 8006fa0 80089d8: 2000024c .word 0x2000024c 80089dc: 20000fd0 .word 0x20000fd0 80089e0: 20000bd0 .word 0x20000bd0 80089e4: 20000700 .word 0x20000700 080089e8 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80089e8: 4a14 ldr r2, [pc, #80] ; (8008a3c ) { 80089ea: b538 push {r3, r4, r5, lr} uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80089ec: 6810 ldr r0, [r2, #0] 80089ee: 1c43 adds r3, r0, #1 80089f0: 6013 str r3, [r2, #0] 80089f2: 4b13 ldr r3, [pc, #76] ; (8008a40 ) 80089f4: 6859 ldr r1, [r3, #4] 80089f6: f103 040c add.w r4, r3, #12 80089fa: 5d0d ldrb r5, [r1, r4] 80089fc: 4c11 ldr r4, [pc, #68] ; (8008a44 ) #ifdef DEBUG_PRINT printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; #endif /* DEBUG_PRINT */ pQueue->tail++; 80089fe: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a00: f5b1 6f80 cmp.w r1, #1024 ; 0x400 uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a04: 5425 strb r5, [r4, r0] 8008a06: 4614 mov r4, r2 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a08: bfa8 it ge 8008a0a: 2200 movge r2, #0 pQueue->data--; 8008a0c: 689d ldr r5, [r3, #8] pQueue->tail++; 8008a0e: bfb8 it lt 8008a10: 6059 strlt r1, [r3, #4] pQueue->data--; 8008a12: f105 35ff add.w r5, r5, #4294967295 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a16: bfa8 it ge 8008a18: 605a strge r2, [r3, #4] pQueue->data--; 8008a1a: 609d str r5, [r3, #8] if(pQueue->data == 0){ 8008a1c: b96d cbnz r5, 8008a3a // printf("data cnt zero !!! \r\n"); RF_Ctrl_Main(&uart_buf[Header]); 8008a1e: 4809 ldr r0, [pc, #36] ; (8008a44 ) 8008a20: f000 fda0 bl 8009564 #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 8008a24: 6822 ldr r2, [r4, #0] 8008a26: 4629 mov r1, r5 8008a28: 4806 ldr r0, [pc, #24] ; (8008a44 ) 8008a2a: f000 fe44 bl 80096b6 // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 8008a2e: 6025 str r5, [r4, #0] HAL_Delay(1); 8008a30: 2001 movs r0, #1 } } 8008a32: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_Delay(1); 8008a36: f7fc bd59 b.w 80054ec 8008a3a: bd38 pop {r3, r4, r5, pc} 8008a3c: 20000464 .word 0x20000464 8008a40: 20000bc4 .word 0x20000bc4 8008a44: 200007c4 .word 0x200007c4 08008a48 : AdcTimerCnt = UartRxTimerCnt = 0; 8008a48: 2300 movs r3, #0 8008a4a: 4a0f ldr r2, [pc, #60] ; (8008a88 ) { 8008a4c: b510 push {r4, lr} AdcTimerCnt = UartRxTimerCnt = 0; 8008a4e: 6013 str r3, [r2, #0] pQueue->head++; 8008a50: 4c0e ldr r4, [pc, #56] ; (8008a8c ) AdcTimerCnt = UartRxTimerCnt = 0; 8008a52: 4a0f ldr r2, [pc, #60] ; (8008a90 ) 8008a54: 6013 str r3, [r2, #0] pQueue->head++; 8008a56: 6822 ldr r2, [r4, #0] 8008a58: 3201 adds r2, #1 8008a5a: f5b2 6f80 cmp.w r2, #1024 ; 0x400 8008a5e: bfb8 it lt 8008a60: 4613 movlt r3, r2 8008a62: 6023 str r3, [r4, #0] pQueue->data++; 8008a64: 68a3 ldr r3, [r4, #8] 8008a66: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008a68: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 8008a6c: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008a6e: db01 blt.n 8008a74 GetDataFromUartQueue(huart); 8008a70: f7ff ffba bl 80089e8 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008a74: 6823 ldr r3, [r4, #0] 8008a76: 4907 ldr r1, [pc, #28] ; (8008a94 ) 8008a78: 2201 movs r2, #1 } 8008a7a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008a7e: 4419 add r1, r3 8008a80: 4805 ldr r0, [pc, #20] ; (8008a98 ) 8008a82: f7fe ba8d b.w 8006fa0 8008a86: bf00 nop 8008a88: 2000045c .word 0x2000045c 8008a8c: 20000bc4 .word 0x20000bc4 8008a90: 20000450 .word 0x20000450 8008a94: 20000bd0 .word 0x20000bd0 8008a98: 20000700 .word 0x20000700 08008a9c : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ 8008a9c: b508 push {r3, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 8008a9e: 78c3 ldrb r3, [r0, #3] 8008aa0: 7881 ldrb r1, [r0, #2] 8008aa2: 5cc2 ldrb r2, [r0, r3] 8008aa4: 3001 adds r0, #1 8008aa6: f7fe fda4 bl 80075f2 // printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); } // printf("CRC Result : \"%d\" \r\n",ret); return ret; } 8008aaa: 3000 adds r0, #0 8008aac: bf18 it ne 8008aae: 2001 movne r0, #1 8008ab0: bd08 pop {r3, pc} ... 08008ab4 : PLL_EN_3_5G_L_GPIO_Port, PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008ab4: 23be movs r3, #190 ; 0xbe void RF_Status_Get(void){ 8008ab6: b510 push {r4, lr} Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008ab8: 4c0b ldr r4, [pc, #44] ; (8008ae8 ) Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008aba: 2160 movs r1, #96 ; 0x60 Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008abc: 7023 strb r3, [r4, #0] Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; 8008abe: 2302 movs r3, #2 8008ac0: 7063 strb r3, [r4, #1] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008ac2: 2361 movs r3, #97 ; 0x61 Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008ac4: 1c60 adds r0, r4, #1 Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008ac6: 70a1 strb r1, [r4, #2] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008ac8: 70e3 strb r3, [r4, #3] Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008aca: f7fe fd77 bl 80075bc Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008ace: 23eb movs r3, #235 ; 0xeb Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008ad0: f884 0061 strb.w r0, [r4, #97] ; 0x61 Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008ad4: f884 3062 strb.w r3, [r4, #98] ; 0x62 HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008ad8: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008ada: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008ade: 2263 movs r2, #99 ; 0x63 8008ae0: 4802 ldr r0, [pc, #8] ; (8008aec ) 8008ae2: f7fe ba23 b.w 8006f2c 8008ae6: bf00 nop 8008ae8: 200005e3 .word 0x200005e3 8008aec: 20000700 .word 0x20000700 08008af0 : static uint8_t Ack_Buf[6]; void RF_Status_Ack(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008af0: 23be movs r3, #190 ; 0xbe void RF_Status_Ack(void){ 8008af2: b510 push {r4, lr} Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008af4: 4c0a ldr r4, [pc, #40] ; (8008b20 ) Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008af6: 2103 movs r1, #3 Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008af8: 7023 strb r3, [r4, #0] Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008afa: 2304 movs r3, #4 Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008afc: 1c60 adds r0, r4, #1 Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008afe: 7063 strb r3, [r4, #1] Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008b00: 70a1 strb r1, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; 8008b02: 70e3 strb r3, [r4, #3] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b04: f7fe fd5a bl 80075bc Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b08: 23eb movs r3, #235 ; 0xeb HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b0a: 78a2 ldrb r2, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b0c: 7120 strb r0, [r4, #4] Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b0e: 7163 strb r3, [r4, #5] HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b10: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008b12: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b16: 3203 adds r2, #3 8008b18: 4802 ldr r0, [pc, #8] ; (8008b24 ) 8008b1a: f7fe ba07 b.w 8006f2c 8008b1e: bf00 nop 8008b20: 20000468 .word 0x20000468 8008b24: 20000700 .word 0x20000700 08008b28 : void RF_Operate(uint8_t* data_buf){ 8008b28: b5f0 push {r4, r5, r6, r7, lr} uint32_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; // printf("Prev_data[INDEX_ATT_1_8G_DL1] : %x data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]); if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b2a: 4db5 ldr r5, [pc, #724] ; (8008e00 ) 8008b2c: 7902 ldrb r2, [r0, #4] 8008b2e: 792b ldrb r3, [r5, #4] void RF_Operate(uint8_t* data_buf){ 8008b30: b0a9 sub sp, #164 ; 0xa4 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b32: 4293 cmp r3, r2 void RF_Operate(uint8_t* data_buf){ 8008b34: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b36: d00c beq.n 8008b52 BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008b38: 4bb2 ldr r3, [pc, #712] ; (8008e04 ) 8008b3a: 9202 str r2, [sp, #8] 8008b3c: f103 0210 add.w r2, r3, #16 8008b40: e892 0003 ldmia.w r2, {r0, r1} 8008b44: e88d 0003 stmia.w sp, {r0, r1} 8008b48: cb0f ldmia r3, {r0, r1, r2, r3} 8008b4a: f7fe fc3f bl 80073cc Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 8008b4e: 7923 ldrb r3, [r4, #4] 8008b50: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 8008b52: 7962 ldrb r2, [r4, #5] 8008b54: 796b ldrb r3, [r5, #5] 8008b56: 4293 cmp r3, r2 8008b58: d00c beq.n 8008b74 BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008b5a: 4bab ldr r3, [pc, #684] ; (8008e08 ) 8008b5c: 9202 str r2, [sp, #8] 8008b5e: f103 0210 add.w r2, r3, #16 8008b62: e892 0003 ldmia.w r2, {r0, r1} 8008b66: e88d 0003 stmia.w sp, {r0, r1} 8008b6a: cb0f ldmia r3, {r0, r1, r2, r3} 8008b6c: f7fe fc2e bl 80073cc Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 8008b70: 7963 ldrb r3, [r4, #5] 8008b72: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 8008b74: 79a2 ldrb r2, [r4, #6] 8008b76: 79ab ldrb r3, [r5, #6] 8008b78: 4293 cmp r3, r2 8008b7a: d00c beq.n 8008b96 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008b7c: 4ba3 ldr r3, [pc, #652] ; (8008e0c ) 8008b7e: 9202 str r2, [sp, #8] 8008b80: f103 0210 add.w r2, r3, #16 8008b84: e892 0003 ldmia.w r2, {r0, r1} 8008b88: e88d 0003 stmia.w sp, {r0, r1} 8008b8c: cb0f ldmia r3, {r0, r1, r2, r3} 8008b8e: f7fe fc1d bl 80073cc Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 8008b92: 79a3 ldrb r3, [r4, #6] 8008b94: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 8008b96: 79e2 ldrb r2, [r4, #7] 8008b98: 79eb ldrb r3, [r5, #7] 8008b9a: 4293 cmp r3, r2 8008b9c: d00c beq.n 8008bb8 BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008b9e: 4b9c ldr r3, [pc, #624] ; (8008e10 ) 8008ba0: 9202 str r2, [sp, #8] 8008ba2: f103 0210 add.w r2, r3, #16 8008ba6: e892 0003 ldmia.w r2, {r0, r1} 8008baa: e88d 0003 stmia.w sp, {r0, r1} 8008bae: cb0f ldmia r3, {r0, r1, r2, r3} 8008bb0: f7fe fc0c bl 80073cc Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 8008bb4: 79e3 ldrb r3, [r4, #7] 8008bb6: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 8008bb8: 7a22 ldrb r2, [r4, #8] 8008bba: 7a2b ldrb r3, [r5, #8] 8008bbc: 4293 cmp r3, r2 8008bbe: d00c beq.n 8008bda BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008bc0: 4b94 ldr r3, [pc, #592] ; (8008e14 ) 8008bc2: 9202 str r2, [sp, #8] 8008bc4: f103 0210 add.w r2, r3, #16 8008bc8: e892 0003 ldmia.w r2, {r0, r1} 8008bcc: e88d 0003 stmia.w sp, {r0, r1} 8008bd0: cb0f ldmia r3, {r0, r1, r2, r3} 8008bd2: f7fe fbfb bl 80073cc Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 8008bd6: 7a23 ldrb r3, [r4, #8] 8008bd8: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 8008bda: 7a62 ldrb r2, [r4, #9] 8008bdc: 7a6b ldrb r3, [r5, #9] 8008bde: 4293 cmp r3, r2 8008be0: d00c beq.n 8008bfc BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008be2: 4b8d ldr r3, [pc, #564] ; (8008e18 ) 8008be4: 9202 str r2, [sp, #8] 8008be6: f103 0210 add.w r2, r3, #16 8008bea: e892 0003 ldmia.w r2, {r0, r1} 8008bee: e88d 0003 stmia.w sp, {r0, r1} 8008bf2: cb0f ldmia r3, {r0, r1, r2, r3} 8008bf4: f7fe fbea bl 80073cc Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 8008bf8: 7a63 ldrb r3, [r4, #9] 8008bfa: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 8008bfc: 7aa2 ldrb r2, [r4, #10] 8008bfe: 7aab ldrb r3, [r5, #10] 8008c00: 4293 cmp r3, r2 8008c02: d00c beq.n 8008c1e BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008c04: 4b85 ldr r3, [pc, #532] ; (8008e1c ) 8008c06: 9202 str r2, [sp, #8] 8008c08: f103 0210 add.w r2, r3, #16 8008c0c: e892 0003 ldmia.w r2, {r0, r1} 8008c10: e88d 0003 stmia.w sp, {r0, r1} 8008c14: cb0f ldmia r3, {r0, r1, r2, r3} 8008c16: f7fe fbd9 bl 80073cc Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 8008c1a: 7aa3 ldrb r3, [r4, #10] 8008c1c: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 8008c1e: 7ae2 ldrb r2, [r4, #11] 8008c20: 7aeb ldrb r3, [r5, #11] 8008c22: 4293 cmp r3, r2 8008c24: d00c beq.n 8008c40 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008c26: 4b7e ldr r3, [pc, #504] ; (8008e20 ) 8008c28: 9202 str r2, [sp, #8] 8008c2a: f103 0210 add.w r2, r3, #16 8008c2e: e892 0003 ldmia.w r2, {r0, r1} 8008c32: e88d 0003 stmia.w sp, {r0, r1} 8008c36: cb0f ldmia r3, {r0, r1, r2, r3} 8008c38: f7fe fbc8 bl 80073cc Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008c3c: 7ae3 ldrb r3, [r4, #11] 8008c3e: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008c40: 7b22 ldrb r2, [r4, #12] 8008c42: 7b2b ldrb r3, [r5, #12] 8008c44: 4293 cmp r3, r2 8008c46: d00c beq.n 8008c62 BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008c48: 4b76 ldr r3, [pc, #472] ; (8008e24 ) 8008c4a: 9202 str r2, [sp, #8] 8008c4c: f103 0210 add.w r2, r3, #16 8008c50: e892 0003 ldmia.w r2, {r0, r1} 8008c54: e88d 0003 stmia.w sp, {r0, r1} 8008c58: cb0f ldmia r3, {r0, r1, r2, r3} 8008c5a: f7fe fbb7 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008c5e: 7b23 ldrb r3, [r4, #12] 8008c60: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 8008c62: 7b62 ldrb r2, [r4, #13] 8008c64: 7b6b ldrb r3, [r5, #13] 8008c66: 4293 cmp r3, r2 8008c68: d00c beq.n 8008c84 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008c6a: 4b6f ldr r3, [pc, #444] ; (8008e28 ) 8008c6c: 9202 str r2, [sp, #8] 8008c6e: f103 0210 add.w r2, r3, #16 8008c72: e892 0003 ldmia.w r2, {r0, r1} 8008c76: e88d 0003 stmia.w sp, {r0, r1} 8008c7a: cb0f ldmia r3, {r0, r1, r2, r3} 8008c7c: f7fe fba6 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008c80: 7b63 ldrb r3, [r4, #13] 8008c82: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 8008c84: 7ba2 ldrb r2, [r4, #14] 8008c86: 7bab ldrb r3, [r5, #14] 8008c88: 4293 cmp r3, r2 8008c8a: d00c beq.n 8008ca6 BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008c8c: 4b67 ldr r3, [pc, #412] ; (8008e2c ) 8008c8e: 9202 str r2, [sp, #8] 8008c90: f103 0210 add.w r2, r3, #16 8008c94: e892 0003 ldmia.w r2, {r0, r1} 8008c98: e88d 0003 stmia.w sp, {r0, r1} 8008c9c: cb0f ldmia r3, {r0, r1, r2, r3} 8008c9e: f7fe fb95 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 8008ca2: 7ba3 ldrb r3, [r4, #14] 8008ca4: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 8008ca6: 7be2 ldrb r2, [r4, #15] 8008ca8: 7beb ldrb r3, [r5, #15] 8008caa: 4293 cmp r3, r2 8008cac: d00c beq.n 8008cc8 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008cae: 4b60 ldr r3, [pc, #384] ; (8008e30 ) 8008cb0: 9202 str r2, [sp, #8] 8008cb2: f103 0210 add.w r2, r3, #16 8008cb6: e892 0003 ldmia.w r2, {r0, r1} 8008cba: e88d 0003 stmia.w sp, {r0, r1} 8008cbe: cb0f ldmia r3, {r0, r1, r2, r3} 8008cc0: f7fe fb84 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 8008cc4: 7be3 ldrb r3, [r4, #15] 8008cc6: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1]) 8008cc8: 7c23 ldrb r3, [r4, #16] 8008cca: 7c2a ldrb r2, [r5, #16] 8008ccc: 429a cmp r2, r3 8008cce: d113 bne.n 8008cf8 ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1]) 8008cd0: 7c69 ldrb r1, [r5, #17] 8008cd2: 7c62 ldrb r2, [r4, #17] 8008cd4: 4291 cmp r1, r2 8008cd6: d10f bne.n 8008cf8 ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 8008cd8: 7ca9 ldrb r1, [r5, #18] 8008cda: 7ca2 ldrb r2, [r4, #18] 8008cdc: 4291 cmp r1, r2 8008cde: d10b bne.n 8008cf8 ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2]) 8008ce0: 7ce9 ldrb r1, [r5, #19] 8008ce2: 7ce2 ldrb r2, [r4, #19] 8008ce4: 4291 cmp r1, r2 8008ce6: d107 bne.n 8008cf8 ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2]) 8008ce8: 7d29 ldrb r1, [r5, #20] 8008cea: 7d22 ldrb r2, [r4, #20] 8008cec: 4291 cmp r1, r2 8008cee: d103 bne.n 8008cf8 ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 8008cf0: 7d69 ldrb r1, [r5, #21] 8008cf2: 7d62 ldrb r2, [r4, #21] 8008cf4: 4291 cmp r1, r2 8008cf6: d020 beq.n 8008d3a ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1] = data_buf[INDEX_ATT_3_5G_LOW1]; 8008cf8: 4e4e ldr r6, [pc, #312] ; (8008e34 ) 8008cfa: 742b strb r3, [r5, #16] 8008cfc: 7633 strb r3, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008cfe: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d00: 2298 movs r2, #152 ; 0x98 ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008d02: 746b strb r3, [r5, #17] 8008d04: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d08: 7ca3 ldrb r3, [r4, #18] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d0a: f106 0110 add.w r1, r6, #16 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d0e: 74ab strb r3, [r5, #18] 8008d10: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008d14: 7ce3 ldrb r3, [r4, #19] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d16: 4668 mov r0, sp ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008d18: 74eb strb r3, [r5, #19] 8008d1a: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; 8008d1e: 7d23 ldrb r3, [r4, #20] 8008d20: 752b strb r3, [r5, #20] 8008d22: f886 3088 strb.w r3, [r6, #136] ; 0x88 ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008d26: 7d63 ldrb r3, [r4, #21] 8008d28: 756b strb r3, [r5, #21] 8008d2a: f886 30a4 strb.w r3, [r6, #164] ; 0xa4 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d2e: f000 fcb7 bl 80096a0 8008d32: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008d36: f7fe fc8b bl 8007650 } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 8008d3a: 7da3 ldrb r3, [r4, #22] 8008d3c: 7daa ldrb r2, [r5, #22] 8008d3e: 429a cmp r2, r3 8008d40: d103 bne.n 8008d4a || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008d42: 7de9 ldrb r1, [r5, #23] 8008d44: 7de2 ldrb r2, [r4, #23] 8008d46: 4291 cmp r1, r2 8008d48: d035 beq.n 8008db6 ){ Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H]; 8008d4a: 75ab strb r3, [r5, #22] Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L]; 8008d4c: 7de3 ldrb r3, [r4, #23] 8008d4e: 75eb strb r3, [r5, #23] // printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]); // printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]); temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); 8008d50: 7da0 ldrb r0, [r4, #22] 8008d52: 7de3 ldrb r3, [r4, #23] 8008d54: ea43 2300 orr.w r3, r3, r0, lsl #8 ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008d58: 4837 ldr r0, [pc, #220] ; (8008e38 ) 8008d5a: 4358 muls r0, r3 8008d5c: f7ff fbcc bl 80084f8 8008d60: 4a36 ldr r2, [pc, #216] ; (8008e3c ) 8008d62: 4b37 ldr r3, [pc, #220] ; (8008e40 ) 8008d64: 9204 str r2, [sp, #16] 8008d66: f44f 6282 mov.w r2, #1040 ; 0x410 8008d6a: 9003 str r0, [sp, #12] 8008d6c: 9202 str r2, [sp, #8] 8008d6e: f103 0210 add.w r2, r3, #16 8008d72: e892 0003 ldmia.w r2, {r0, r1} 8008d76: e88d 0003 stmia.w sp, {r0, r1} 8008d7a: cb0f ldmia r3, {r0, r1, r2, r3} 8008d7c: f7ff fbd0 bl 8008520 HAL_Delay(1); 8008d80: 2001 movs r0, #1 8008d82: f7fc fbb3 bl 80054ec BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008d86: 7922 ldrb r2, [r4, #4] 8008d88: 4b1e ldr r3, [pc, #120] ; (8008e04 ) 8008d8a: 9202 str r2, [sp, #8] 8008d8c: f103 0210 add.w r2, r3, #16 8008d90: e892 0003 ldmia.w r2, {r0, r1} 8008d94: e88d 0003 stmia.w sp, {r0, r1} 8008d98: cb0f ldmia r3, {r0, r1, r2, r3} 8008d9a: f7fe fb17 bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008d9e: 4b1a ldr r3, [pc, #104] ; (8008e08 ) 8008da0: 7962 ldrb r2, [r4, #5] 8008da2: 9202 str r2, [sp, #8] 8008da4: f103 0210 add.w r2, r3, #16 8008da8: e892 0003 ldmia.w r2, {r0, r1} 8008dac: e88d 0003 stmia.w sp, {r0, r1} 8008db0: cb0f ldmia r3, {r0, r1, r2, r3} 8008db2: f7fe fb0b bl 80073cc } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 8008db6: 7e23 ldrb r3, [r4, #24] 8008db8: 7e2a ldrb r2, [r5, #24] 8008dba: 7e60 ldrb r0, [r4, #25] 8008dbc: 429a cmp r2, r3 8008dbe: d102 bne.n 8008dc6 || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 8008dc0: 7e6a ldrb r2, [r5, #25] 8008dc2: 4282 cmp r2, r0 8008dc4: d070 beq.n 8008ea8 temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); // printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]); // printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]); Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H]; 8008dc6: 762b strb r3, [r5, #24] Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L]; 8008dc8: 7668 strb r0, [r5, #25] temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); 8008dca: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008dce: 4b1a ldr r3, [pc, #104] ; (8008e38 ) 8008dd0: 4358 muls r0, r3 8008dd2: f7ff fb91 bl 80084f8 8008dd6: 4a19 ldr r2, [pc, #100] ; (8008e3c ) 8008dd8: 4b1a ldr r3, [pc, #104] ; (8008e44 ) 8008dda: 9204 str r2, [sp, #16] 8008ddc: f44f 6282 mov.w r2, #1040 ; 0x410 8008de0: 9003 str r0, [sp, #12] 8008de2: 9202 str r2, [sp, #8] 8008de4: f103 0210 add.w r2, r3, #16 8008de8: e892 0003 ldmia.w r2, {r0, r1} 8008dec: e88d 0003 stmia.w sp, {r0, r1} 8008df0: cb0f ldmia r3, {r0, r1, r2, r3} 8008df2: f7ff fb95 bl 8008520 HAL_Delay(1); 8008df6: 2001 movs r0, #1 8008df8: f7fc fb78 bl 80054ec 8008dfc: e024 b.n 8008e48 8008dfe: bf00 nop 8008e00: 200005e3 .word 0x200005e3 8008e04: 20000008 .word 0x20000008 8008e08: 20000020 .word 0x20000020 8008e0c: 20000038 .word 0x20000038 8008e10: 20000050 .word 0x20000050 8008e14: 20000068 .word 0x20000068 8008e18: 20000080 .word 0x20000080 8008e1c: 20000098 .word 0x20000098 8008e20: 200000b0 .word 0x200000b0 8008e24: 200000c8 .word 0x200000c8 8008e28: 200000e0 .word 0x200000e0 8008e2c: 200000f8 .word 0x200000f8 8008e30: 20000110 .word 0x20000110 8008e34: 200004d8 .word 0x200004d8 8008e38: 000186a0 .word 0x000186a0 8008e3c: 009f8092 .word 0x009f8092 8008e40: 200001b8 .word 0x200001b8 8008e44: 200001d0 .word 0x200001d0 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008e48: 79a2 ldrb r2, [r4, #6] 8008e4a: 4bc5 ldr r3, [pc, #788] ; (8009160 ) 8008e4c: 9202 str r2, [sp, #8] 8008e4e: f103 0210 add.w r2, r3, #16 8008e52: e892 0003 ldmia.w r2, {r0, r1} 8008e56: e88d 0003 stmia.w sp, {r0, r1} 8008e5a: cb0f ldmia r3, {r0, r1, r2, r3} 8008e5c: f7fe fab6 bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008e60: 79e2 ldrb r2, [r4, #7] 8008e62: 4bc0 ldr r3, [pc, #768] ; (8009164 ) 8008e64: 9202 str r2, [sp, #8] 8008e66: f103 0210 add.w r2, r3, #16 8008e6a: e892 0003 ldmia.w r2, {r0, r1} 8008e6e: e88d 0003 stmia.w sp, {r0, r1} 8008e72: cb0f ldmia r3, {r0, r1, r2, r3} 8008e74: f7fe faaa bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008e78: 7a22 ldrb r2, [r4, #8] 8008e7a: 4bbb ldr r3, [pc, #748] ; (8009168 ) 8008e7c: 9202 str r2, [sp, #8] 8008e7e: f103 0210 add.w r2, r3, #16 8008e82: e892 0003 ldmia.w r2, {r0, r1} 8008e86: e88d 0003 stmia.w sp, {r0, r1} 8008e8a: cb0f ldmia r3, {r0, r1, r2, r3} 8008e8c: f7fe fa9e bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008e90: 4bb6 ldr r3, [pc, #728] ; (800916c ) 8008e92: 7a62 ldrb r2, [r4, #9] 8008e94: 9202 str r2, [sp, #8] 8008e96: f103 0210 add.w r2, r3, #16 8008e9a: e892 0003 ldmia.w r2, {r0, r1} 8008e9e: e88d 0003 stmia.w sp, {r0, r1} 8008ea2: cb0f ldmia r3, {r0, r1, r2, r3} 8008ea4: f7fe fa92 bl 80073cc } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) 8008ea8: 7ea3 ldrb r3, [r4, #26] 8008eaa: 7eaa ldrb r2, [r5, #26] 8008eac: 7ee0 ldrb r0, [r4, #27] 8008eae: 429a cmp r2, r3 8008eb0: d102 bne.n 8008eb8 || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ 8008eb2: 7eea ldrb r2, [r5, #27] 8008eb4: 4282 cmp r2, r0 8008eb6: d032 beq.n 8008f1e temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); // printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]); // printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]); Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H]; 8008eb8: 76ab strb r3, [r5, #26] Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L]; 8008eba: 76e8 strb r0, [r5, #27] temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); 8008ebc: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092); ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008ec0: 4bab ldr r3, [pc, #684] ; (8009170 ) 8008ec2: 4358 muls r0, r3 8008ec4: f7ff fb18 bl 80084f8 8008ec8: 4aaa ldr r2, [pc, #680] ; (8009174 ) 8008eca: 4bab ldr r3, [pc, #684] ; (8009178 ) 8008ecc: 9204 str r2, [sp, #16] 8008ece: f44f 6282 mov.w r2, #1040 ; 0x410 8008ed2: 9003 str r0, [sp, #12] 8008ed4: 9202 str r2, [sp, #8] 8008ed6: f103 0210 add.w r2, r3, #16 8008eda: e892 0003 ldmia.w r2, {r0, r1} 8008ede: e88d 0003 stmia.w sp, {r0, r1} 8008ee2: cb0f ldmia r3, {r0, r1, r2, r3} 8008ee4: f7ff fb1c bl 8008520 HAL_Delay(1); 8008ee8: 2001 movs r0, #1 8008eea: f7fc faff bl 80054ec BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008eee: 7aa2 ldrb r2, [r4, #10] 8008ef0: 4ba2 ldr r3, [pc, #648] ; (800917c ) 8008ef2: 9202 str r2, [sp, #8] 8008ef4: f103 0210 add.w r2, r3, #16 8008ef8: e892 0003 ldmia.w r2, {r0, r1} 8008efc: e88d 0003 stmia.w sp, {r0, r1} 8008f00: cb0f ldmia r3, {r0, r1, r2, r3} 8008f02: f7fe fa63 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008f06: 4b9e ldr r3, [pc, #632] ; (8009180 ) 8008f08: 7ae2 ldrb r2, [r4, #11] 8008f0a: 9202 str r2, [sp, #8] 8008f0c: f103 0210 add.w r2, r3, #16 8008f10: e892 0003 ldmia.w r2, {r0, r1} 8008f14: e88d 0003 stmia.w sp, {r0, r1} 8008f18: cb0f ldmia r3, {r0, r1, r2, r3} 8008f1a: f7fe fa57 bl 80073cc } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) 8008f1e: 7f23 ldrb r3, [r4, #28] 8008f20: 7f2a ldrb r2, [r5, #28] 8008f22: 429a cmp r2, r3 8008f24: d103 bne.n 8008f2e || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ 8008f26: 7f69 ldrb r1, [r5, #29] 8008f28: 7f62 ldrb r2, [r4, #29] 8008f2a: 4291 cmp r1, r2 8008f2c: d04d beq.n 8008fca Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H]; 8008f2e: 772b strb r3, [r5, #28] Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L]; 8008f30: 7f63 ldrb r3, [r4, #29] 8008f32: 776b strb r3, [r5, #29] // printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]); // printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]); temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); 8008f34: 7f20 ldrb r0, [r4, #28] 8008f36: 7f63 ldrb r3, [r4, #29] 8008f38: ea43 2300 orr.w r3, r3, r0, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008f3c: 488c ldr r0, [pc, #560] ; (8009170 ) 8008f3e: 4358 muls r0, r3 8008f40: f7ff fada bl 80084f8 8008f44: 4a8b ldr r2, [pc, #556] ; (8009174 ) 8008f46: 4b8f ldr r3, [pc, #572] ; (8009184 ) 8008f48: 9204 str r2, [sp, #16] 8008f4a: f44f 6282 mov.w r2, #1040 ; 0x410 8008f4e: 9003 str r0, [sp, #12] 8008f50: 9202 str r2, [sp, #8] 8008f52: f103 0210 add.w r2, r3, #16 8008f56: e892 0003 ldmia.w r2, {r0, r1} 8008f5a: e88d 0003 stmia.w sp, {r0, r1} 8008f5e: cb0f ldmia r3, {r0, r1, r2, r3} 8008f60: f7ff fade bl 8008520 HAL_Delay(1); 8008f64: 2001 movs r0, #1 8008f66: f7fc fac1 bl 80054ec BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008f6a: 7b22 ldrb r2, [r4, #12] 8008f6c: 4b86 ldr r3, [pc, #536] ; (8009188 ) 8008f6e: 9202 str r2, [sp, #8] 8008f70: f103 0210 add.w r2, r3, #16 8008f74: e892 0003 ldmia.w r2, {r0, r1} 8008f78: e88d 0003 stmia.w sp, {r0, r1} 8008f7c: cb0f ldmia r3, {r0, r1, r2, r3} 8008f7e: f7fe fa25 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008f82: 7b62 ldrb r2, [r4, #13] 8008f84: 4b81 ldr r3, [pc, #516] ; (800918c ) 8008f86: 9202 str r2, [sp, #8] 8008f88: f103 0210 add.w r2, r3, #16 8008f8c: e892 0003 ldmia.w r2, {r0, r1} 8008f90: e88d 0003 stmia.w sp, {r0, r1} 8008f94: cb0f ldmia r3, {r0, r1, r2, r3} 8008f96: f7fe fa19 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008f9a: 7ba2 ldrb r2, [r4, #14] 8008f9c: 4b7c ldr r3, [pc, #496] ; (8009190 ) 8008f9e: 9202 str r2, [sp, #8] 8008fa0: f103 0210 add.w r2, r3, #16 8008fa4: e892 0003 ldmia.w r2, {r0, r1} 8008fa8: e88d 0003 stmia.w sp, {r0, r1} 8008fac: cb0f ldmia r3, {r0, r1, r2, r3} 8008fae: f7fe fa0d bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008fb2: 4b78 ldr r3, [pc, #480] ; (8009194 ) 8008fb4: 7be2 ldrb r2, [r4, #15] 8008fb6: 9202 str r2, [sp, #8] 8008fb8: f103 0210 add.w r2, r3, #16 8008fbc: e892 0003 ldmia.w r2, {r0, r1} 8008fc0: e88d 0003 stmia.w sp, {r0, r1} 8008fc4: cb0f ldmia r3, {r0, r1, r2, r3} 8008fc6: f7fe fa01 bl 80073cc } if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H]) 8008fca: 7fa3 ldrb r3, [r4, #30] 8008fcc: 7faa ldrb r2, [r5, #30] 8008fce: 429a cmp r2, r3 8008fd0: d109 bne.n 8008fe6 ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M]) 8008fd2: 7fe9 ldrb r1, [r5, #31] 8008fd4: 7fe2 ldrb r2, [r4, #31] 8008fd6: 4291 cmp r1, r2 8008fd8: d105 bne.n 8008fe6 || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){ 8008fda: f895 1020 ldrb.w r1, [r5, #32] 8008fde: f894 2020 ldrb.w r2, [r4, #32] 8008fe2: 4291 cmp r1, r2 8008fe4: d031 beq.n 800904a Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H]; 8008fe6: 77ab strb r3, [r5, #30] Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 8008fe8: 7fe3 ldrb r3, [r4, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | (data_buf[INDEX_PLL_3_5G_LOW_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8008fea: 2100 movs r1, #0 Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 8008fec: 77eb strb r3, [r5, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; 8008fee: f894 3020 ldrb.w r3, [r4, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8008ff2: 4869 ldr r0, [pc, #420] ; (8009198 ) Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; 8008ff4: f885 3020 strb.w r3, [r5, #32] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 8008ff8: 7fe3 ldrb r3, [r4, #31] temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 8008ffa: 7fa2 ldrb r2, [r4, #30] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 8008ffc: 021b lsls r3, r3, #8 temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 8008ffe: ea43 4302 orr.w r3, r3, r2, lsl #16 (data_buf[INDEX_PLL_3_5G_LOW_L]); 8009002: f894 2020 ldrb.w r2, [r4, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8009006: e9cd 0100 strd r0, r1, [sp] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 800900a: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 800900c: f241 3288 movw r2, #5000 ; 0x1388 8009010: 9203 str r2, [sp, #12] 8009012: 2202 movs r2, #2 8009014: 9202 str r2, [sp, #8] 8009016: f242 7210 movw r2, #10000 ; 0x2710 800901a: a826 add r0, sp, #152 ; 0x98 800901c: 435a muls r2, r3 800901e: 2300 movs r3, #0 8009020: f7fe fc6e bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8009024: 2203 movs r2, #3 8009026: 9205 str r2, [sp, #20] 8009028: f241 32c2 movw r2, #5058 ; 0x13c2 800902c: 9204 str r2, [sp, #16] 800902e: 9a26 ldr r2, [sp, #152] ; 0x98 8009030: 4b5a ldr r3, [pc, #360] ; (800919c ) 8009032: 9203 str r2, [sp, #12] 8009034: 9a27 ldr r2, [sp, #156] ; 0x9c 8009036: 9202 str r2, [sp, #8] 8009038: f103 0210 add.w r2, r3, #16 800903c: e892 0003 ldmia.w r2, {r0, r1} 8009040: e88d 0003 stmia.w sp, {r0, r1} 8009044: cb0f ldmia r3, {r0, r1, r2, r3} 8009046: f7fe fce9 bl 8007a1c } if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H]) 800904a: f894 3021 ldrb.w r3, [r4, #33] ; 0x21 800904e: f895 2021 ldrb.w r2, [r5, #33] ; 0x21 8009052: 429a cmp r2, r3 8009054: d10b bne.n 800906e || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M]) 8009056: f895 1022 ldrb.w r1, [r5, #34] ; 0x22 800905a: f894 2022 ldrb.w r2, [r4, #34] ; 0x22 800905e: 4291 cmp r1, r2 8009060: d105 bne.n 800906e || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){ 8009062: f895 1023 ldrb.w r1, [r5, #35] ; 0x23 8009066: f894 2023 ldrb.w r2, [r4, #35] ; 0x23 800906a: 4291 cmp r1, r2 800906c: d036 beq.n 80090dc Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H]; 800906e: f885 3021 strb.w r3, [r5, #33] ; 0x21 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 8009072: f894 3022 ldrb.w r3, [r4, #34] ; 0x22 Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | (data_buf[INDEX_PLL_3_5G_HIGH_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8009076: 2100 movs r1, #0 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 8009078: f885 3022 strb.w r3, [r5, #34] ; 0x22 Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; 800907c: f894 3023 ldrb.w r3, [r4, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8009080: 4845 ldr r0, [pc, #276] ; (8009198 ) Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; 8009082: f885 3023 strb.w r3, [r5, #35] ; 0x23 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 8009086: f894 3022 ldrb.w r3, [r4, #34] ; 0x22 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 800908a: f894 2021 ldrb.w r2, [r4, #33] ; 0x21 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 800908e: 021b lsls r3, r3, #8 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 8009090: ea43 4302 orr.w r3, r3, r2, lsl #16 (data_buf[INDEX_PLL_3_5G_HIGH_L]); 8009094: f894 2023 ldrb.w r2, [r4, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8009098: e9cd 0100 strd r0, r1, [sp] (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 800909c: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 800909e: f241 3288 movw r2, #5000 ; 0x1388 80090a2: 9203 str r2, [sp, #12] 80090a4: 2202 movs r2, #2 80090a6: 9202 str r2, [sp, #8] 80090a8: f242 7210 movw r2, #10000 ; 0x2710 80090ac: a826 add r0, sp, #152 ; 0x98 80090ae: 435a muls r2, r3 80090b0: 2300 movs r3, #0 80090b2: f7fe fc25 bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80090b6: 2203 movs r2, #3 80090b8: 9205 str r2, [sp, #20] 80090ba: f241 32c2 movw r2, #5058 ; 0x13c2 80090be: 9204 str r2, [sp, #16] 80090c0: 9a26 ldr r2, [sp, #152] ; 0x98 80090c2: 4b37 ldr r3, [pc, #220] ; (80091a0 ) 80090c4: 9203 str r2, [sp, #12] 80090c6: 9a27 ldr r2, [sp, #156] ; 0x9c 80090c8: 9202 str r2, [sp, #8] 80090ca: f103 0210 add.w r2, r3, #16 80090ce: e892 0003 ldmia.w r2, {r0, r1} 80090d2: e88d 0003 stmia.w sp, {r0, r1} 80090d6: cb0f ldmia r3, {r0, r1, r2, r3} 80090d8: f7fe fca0 bl 8007a1c } if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){ } if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){ 80090dc: f894 1043 ldrb.w r1, [r4, #67] ; 0x43 80090e0: f895 3043 ldrb.w r3, [r5, #67] ; 0x43 80090e4: 428b cmp r3, r1 80090e6: d006 beq.n 80090f6 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]); 80090e8: 2043 movs r0, #67 ; 0x43 80090ea: f7fe fe35 bl 8007d58 Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL]; 80090ee: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 80090f2: f885 3043 strb.w r3, [r5, #67] ; 0x43 } if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){ 80090f6: f894 1044 ldrb.w r1, [r4, #68] ; 0x44 80090fa: f895 3044 ldrb.w r3, [r5, #68] ; 0x44 80090fe: 428b cmp r3, r1 8009100: d006 beq.n 8009110 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]); 8009102: 2044 movs r0, #68 ; 0x44 8009104: f7fe fe28 bl 8007d58 Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL]; 8009108: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 800910c: f885 3044 strb.w r3, [r5, #68] ; 0x44 } if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){ 8009110: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8009114: f895 3045 ldrb.w r3, [r5, #69] ; 0x45 8009118: 428b cmp r3, r1 800911a: d006 beq.n 800912a Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]); 800911c: 2045 movs r0, #69 ; 0x45 800911e: f7fe fe1b bl 8007d58 Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL]; 8009122: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 8009126: f885 3045 strb.w r3, [r5, #69] ; 0x45 } if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){ 800912a: f894 1046 ldrb.w r1, [r4, #70] ; 0x46 800912e: f895 3046 ldrb.w r3, [r5, #70] ; 0x46 8009132: 428b cmp r3, r1 8009134: d006 beq.n 8009144 Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]); 8009136: 2046 movs r0, #70 ; 0x46 8009138: f7fe fe0e bl 8007d58 Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL]; 800913c: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 8009140: f885 3046 strb.w r3, [r5, #70] ; 0x46 } if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){ 8009144: f894 104a ldrb.w r1, [r4, #74] ; 0x4a 8009148: f895 304a ldrb.w r3, [r5, #74] ; 0x4a 800914c: 428b cmp r3, r1 800914e: d029 beq.n 80091a4 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]); 8009150: 204a movs r0, #74 ; 0x4a 8009152: f7fe fe01 bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L]; 8009156: f894 304a ldrb.w r3, [r4, #74] ; 0x4a 800915a: f885 304a strb.w r3, [r5, #74] ; 0x4a 800915e: e021 b.n 80091a4 8009160: 20000038 .word 0x20000038 8009164: 20000050 .word 0x20000050 8009168: 20000068 .word 0x20000068 800916c: 20000080 .word 0x20000080 8009170: 000186a0 .word 0x000186a0 8009174: 009f8092 .word 0x009f8092 8009178: 200001e8 .word 0x200001e8 800917c: 20000098 .word 0x20000098 8009180: 200000b0 .word 0x200000b0 8009184: 20000200 .word 0x20000200 8009188: 200000c8 .word 0x200000c8 800918c: 200000e0 .word 0x200000e0 8009190: 200000f8 .word 0x200000f8 8009194: 20000110 .word 0x20000110 8009198: 02625a00 .word 0x02625a00 800919c: 20000234 .word 0x20000234 80091a0: 2000021c .word 0x2000021c } if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){ 80091a4: f894 1049 ldrb.w r1, [r4, #73] ; 0x49 80091a8: f895 3049 ldrb.w r3, [r5, #73] ; 0x49 80091ac: 428b cmp r3, r1 80091ae: d006 beq.n 80091be Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]); 80091b0: 2049 movs r0, #73 ; 0x49 80091b2: f7fe fdd1 bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H]; 80091b6: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 80091ba: f885 3049 strb.w r3, [r5, #73] ; 0x49 } if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){ 80091be: f894 1047 ldrb.w r1, [r4, #71] ; 0x47 80091c2: f895 3047 ldrb.w r3, [r5, #71] ; 0x47 80091c6: 428b cmp r3, r1 80091c8: f000 81bb beq.w 8009542 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; ADC_Modify = 1; 80091cc: 2601 movs r6, #1 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); 80091ce: 2047 movs r0, #71 ; 0x47 80091d0: f7fe fdc2 bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; 80091d4: f894 3047 ldrb.w r3, [r4, #71] ; 0x47 80091d8: f885 3047 strb.w r3, [r5, #71] ; 0x47 } if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){ 80091dc: f894 1048 ldrb.w r1, [r4, #72] ; 0x48 80091e0: f895 3048 ldrb.w r3, [r5, #72] ; 0x48 80091e4: 428b cmp r3, r1 80091e6: d007 beq.n 80091f8 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; ADC_Modify = 1; 80091e8: 2601 movs r6, #1 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); 80091ea: 2048 movs r0, #72 ; 0x48 80091ec: f7fe fdb4 bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; 80091f0: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 80091f4: f885 3048 strb.w r3, [r5, #72] ; 0x48 } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 80091f8: f894 104b ldrb.w r1, [r4, #75] ; 0x4b 80091fc: f895 304b ldrb.w r3, [r5, #75] ; 0x4b 8009200: 428b cmp r3, r1 8009202: d045 beq.n 8009290 Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]); 8009204: 204b movs r0, #75 ; 0x4b 8009206: f7fe fda7 bl 8007d58 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 800920a: f894 304b ldrb.w r3, [r4, #75] ; 0x4b HAL_Delay(1); 800920e: 2001 movs r0, #1 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8009210: f885 304b strb.w r3, [r5, #75] ; 0x4b HAL_Delay(1); 8009214: f7fc f96a bl 80054ec // printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]); if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8009218: f894 304b ldrb.w r3, [r4, #75] ; 0x4b 800921c: 2b00 cmp r3, #0 800921e: d037 beq.n 8009290 #if 1 // PYJ.2019.08.12_BEGIN -- // temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | // (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | // (Prev_data[INDEX_PLL_3_5G_LOW_L]); temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8009220: f895 3022 ldrb.w r3, [r5, #34] ; 0x22 temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 8009224: f895 2021 ldrb.w r2, [r5, #33] ; 0x21 (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8009228: 021b lsls r3, r3, #8 temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 800922a: ea43 4302 orr.w r3, r3, r2, lsl #16 (Prev_data[INDEX_PLL_3_5G_HIGH_L]); 800922e: f895 2023 ldrb.w r2, [r5, #35] ; 0x23 // temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8009232: 2100 movs r1, #0 (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8009234: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8009236: f241 3288 movw r2, #5000 ; 0x1388 800923a: 9203 str r2, [sp, #12] 800923c: 2202 movs r2, #2 800923e: 9202 str r2, [sp, #8] 8009240: f242 7210 movw r2, #10000 ; 0x2710 8009244: 48c2 ldr r0, [pc, #776] ; (8009550 ) 8009246: 435a muls r2, r3 8009248: e9cd 0100 strd r0, r1, [sp] 800924c: 2300 movs r3, #0 800924e: a826 add r0, sp, #152 ; 0x98 8009250: f7fe fb56 bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8009254: 2203 movs r2, #3 8009256: 9205 str r2, [sp, #20] 8009258: f241 32c2 movw r2, #5058 ; 0x13c2 800925c: 9204 str r2, [sp, #16] 800925e: 9a26 ldr r2, [sp, #152] ; 0x98 8009260: 4bbc ldr r3, [pc, #752] ; (8009554 ) 8009262: 9203 str r2, [sp, #12] 8009264: 9a27 ldr r2, [sp, #156] ; 0x9c PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8009266: 4fbc ldr r7, [pc, #752] ; (8009558 ) ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8009268: 9202 str r2, [sp, #8] 800926a: f103 0210 add.w r2, r3, #16 800926e: e892 0003 ldmia.w r2, {r0, r1} 8009272: e88d 0003 stmia.w sp, {r0, r1} 8009276: cb0f ldmia r3, {r0, r1, r2, r3} 8009278: f7fe fbd0 bl 8007a1c PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 800927c: 2298 movs r2, #152 ; 0x98 800927e: f107 0110 add.w r1, r7, #16 8009282: 4668 mov r0, sp 8009284: f000 fa0c bl 80096a0 8009288: e897 000f ldmia.w r7, {r0, r1, r2, r3} 800928c: f7fe f9e0 bl 8007650 } } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 8009290: f894 104c ldrb.w r1, [r4, #76] ; 0x4c 8009294: f895 304c ldrb.w r3, [r5, #76] ; 0x4c 8009298: 428b cmp r3, r1 800929a: d043 beq.n 8009324 Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]); 800929c: 204c movs r0, #76 ; 0x4c 800929e: f7fe fd5b bl 8007d58