/* * zig_operate.c * * Created on: 2019. 7. 26. * Author: parkyj */ #include "zig_operate.h" #include "main.h" #include "pll_4113.h" #include "ADF4153.h" #include "PE43711.h" #include "BDA4601.h" #include "uart.h" #include "CRC16.h" extern void AD5318_Ctrl(uint16_t ShiftTarget) ; extern etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum); extern void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3); extern bool Bluecell_Flash_Read(uint8_t* data); extern void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT); extern void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd); extern uint8_t Bluecell_Flash_Write(uint8_t* data); uint8_t Prev_data[INDEX_BLUE_EOF + 1]; uint8_t Flash_Save_data[INDEX_BLUE_EOF + 1]; /* * * * * * * #define Struct* * * * * * * */ PLL_Setting_st Pll_1_8GHz_DL = { PLL_CLK_GPIO_Port, PLL_CLK_Pin, PLL_DATA_GPIO_Port, PLL_DATA_Pin, PLL_EN_1_8G_DL_GPIO_Port, PLL_EN_1_8G_DL_Pin, }; PLL_Setting_st Pll_1_8GHz_UL = { PLL_CLK_GPIO_Port, PLL_CLK_Pin, PLL_DATA_GPIO_Port, PLL_DATA_Pin, PLL_EN_1_8G_UL_GPIO_Port, PLL_EN_1_8G_UL_Pin, }; PLL_Setting_st Pll_2_1GHz_DL = { PLL_CLK_GPIO_Port, PLL_CLK_Pin, PLL_DATA_GPIO_Port, PLL_DATA_Pin, PLL_EN_2_1G_DL_GPIO_Port, PLL_EN_2_1G_DL_Pin, }; PLL_Setting_st Pll_2_1GHz_UL = { PLL_CLK_GPIO_Port, PLL_CLK_Pin, PLL_DATA_GPIO_Port, PLL_DATA_Pin, PLL_EN_2_1G_UL_GPIO_Port, PLL_EN_2_1G_UL_Pin, }; /* * * * * * * * NOT YET * * * * * * * */ PLL_Setting_st Pll_3_5GHz_DL = { ATT_CLK_3_5G_GPIO_Port, ATT_EN_3_5G_Pin, PLL_DATA_GPIO_Port, PLL_DATA_Pin, PLL_EN_2_1G_DL_GPIO_Port, PLL_EN_2_1G_DL_Pin, }; PLL_Setting_st Pll_3_5GHz_UL = { PLL_CLK_GPIO_Port, PLL_CLK_Pin, PLL_DATA_GPIO_Port, PLL_DATA_Pin, PLL_EN_2_1G_UL_GPIO_Port, PLL_EN_2_1G_UL_Pin, }; /* * * * * * * * ATTEN * * * * * * * */ ATTEN_Setting_st Atten_1_8Ghz_DL1 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_1_8G_DL1_GPIO_Port, ATT_EN_1_8G_DL1_Pin, PATH_EN_1_8G_DL_GPIO_Port, PATH_EN_1_8G_DL_Pin, }; ATTEN_Setting_st Atten_1_8Ghz_DL2 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_1_8G_DL2_GPIO_Port, ATT_EN_1_8G_DL2_Pin, PATH_EN_1_8G_DL_GPIO_Port, PATH_EN_1_8G_DL_Pin, }; ATTEN_Setting_st Atten_1_8Ghz_UL1 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_1_8G_UL1_GPIO_Port, ATT_EN_1_8G_UL1_Pin, PATH_EN_1_8G_UL_GPIO_Port, PATH_EN_1_8G_UL_Pin, }; ATTEN_Setting_st Atten_1_8Ghz_UL2 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_1_8G_UL2_GPIO_Port, ATT_EN_1_8G_UL2_Pin, PATH_EN_1_8G_UL_GPIO_Port, PATH_EN_1_8G_UL_Pin, }; ATTEN_Setting_st Atten_1_8Ghz_UL3 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_1_8G_UL3_GPIO_Port, ATT_EN_1_8G_UL3_Pin, PATH_EN_1_8G_UL_GPIO_Port, PATH_EN_1_8G_UL_Pin, }; ATTEN_Setting_st Atten_1_8Ghz_UL4 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_1_8G_UL4_GPIO_Port, ATT_EN_1_8G_UL4_Pin, PATH_EN_1_8G_UL_GPIO_Port, PATH_EN_1_8G_UL_Pin, }; ATTEN_Setting_st Atten_2_1Ghz_DL1 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_2_1G_DL1_GPIO_Port, ATT_EN_2_1G_DL1_Pin, PATH_EN_2_1G_DL_GPIO_Port, PATH_EN_2_1G_DL_Pin, }; ATTEN_Setting_st Atten_2_1Ghz_DL2 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_2_1G_DL2_GPIO_Port, ATT_EN_2_1G_DL2_Pin, PATH_EN_2_1G_DL_GPIO_Port, PATH_EN_2_1G_DL_Pin, }; ATTEN_Setting_st Atten_2_1Ghz_UL1 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_2_1G_UL1_GPIO_Port, ATT_EN_2_1G_UL1_Pin, PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; ATTEN_Setting_st Atten_2_1Ghz_UL2 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_2_1G_UL2_GPIO_Port, ATT_EN_2_1G_UL2_Pin, PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; ATTEN_Setting_st Atten_2_1Ghz_UL3 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_2_1G_UL3_GPIO_Port, ATT_EN_2_1G_UL3_Pin, PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; ATTEN_Setting_st Atten_2_1Ghz_UL4 ={ ATT_CLK_GPIO_Port, ATT_CLK_Pin, ATT_DATA_GPIO_Port, ATT_DATA_Pin, ATT_EN_2_1G_UL4_GPIO_Port, ATT_EN_2_1G_UL4_Pin, PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/ ret= true; } if(crcret == true){/*CRC CHECK*/ ret = true; }else{ ret = false; // printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); } // printf("CRC Result : \"%d\" \r\n",ret); return ret; } PLL_Setting_st Pll_3_5_H = { PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, PLL_DATA_3_5G_GPIO_Port, PLL_DATA_3_5G_Pin, PLL_EN_3_5G_H_GPIO_Port, PLL_EN_3_5G_H_Pin, }; PLL_Setting_st Pll_3_5_L = { PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, PLL_DATA_3_5G_GPIO_Port, PLL_DATA_3_5G_Pin, PLL_EN_3_5G_L_GPIO_Port, PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } static uint8_t Ack_Buf[6]; void RF_Status_Ack(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; Ack_Buf[INDEX_BLUE_LENGTH] = 3; Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } void RF_Operate(uint8_t* data_buf){ uint32_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; // printf("Prev_data[INDEX_ATT_1_8G_DL1] : %x data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]); if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; } if( (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1]) ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1]) ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2]) ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2]) ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1] = data_buf[INDEX_ATT_3_5G_LOW1]; ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) ){ Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H]; Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L]; // printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]); // printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]); temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); HAL_Delay(1); BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); // printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]); // printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]); Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H]; Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L]; // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); HAL_Delay(1); BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); // printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]); // printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]); Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H]; Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L]; // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092); ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); HAL_Delay(1); BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H]; Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L]; // printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]); // printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]); temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); HAL_Delay(1); BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); } if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H]) ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M]) || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){ Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H]; Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | (data_buf[INDEX_PLL_3_5G_LOW_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #else temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); } if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H]) || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M]) || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){ Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H]; Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | (data_buf[INDEX_PLL_3_5G_HIGH_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); } if(Prev_data[INDEX_PLL_LD_6_BIT] != data_buf[INDEX_PLL_LD_6_BIT]){ } #if 0 // PYJ.2019.07.28_BEGIN -- if(Prev_data[INDEX_DET_1_8G_DL_IN_H] != data_buf[INDEX_DET_1_8G_DL_IN_H]){ } if(Prev_data[INDEX_DET_1_8G_DL_IN_L] != data_buf[INDEX_DET_1_8G_DL_IN_L]){ } if(Prev_data[INDEX_DET_1_8G_DL_OUT_H] != data_buf[INDEX_DET_1_8G_DL_OUT_H]){ } if(Prev_data[INDEX_DET_1_8G_DL_OUT_L] != data_buf[INDEX_DET_1_8G_DL_OUT_L]){ } if(Prev_data[INDEX_DET_1_8G_UL_IN_H] != data_buf[INDEX_DET_1_8G_UL_IN_H]){ } if(Prev_data[INDEX_DET_1_8G_UL_IN_L] != data_buf[INDEX_DET_1_8G_UL_IN_L]){ } if(Prev_data[INDEX_DET_1_8G_UL_OUT_H] != data_buf[INDEX_DET_1_8G_UL_OUT_H]){ } if(Prev_data[INDEX_DET_1_8G_UL_OUT_L] != data_buf[INDEX_DET_1_8G_UL_OUT_L]){ } if(Prev_data[INDEX_DET_2_1G_DL_IN_H] != data_buf[INDEX_DET_2_1G_DL_IN_H]){ } if(Prev_data[INDEX_DET_2_1G_DL_IN_L] != data_buf[INDEX_DET_2_1G_DL_IN_L]){ } if(Prev_data[INDEX_DET_2_1G_DL_OUT_H] != data_buf[INDEX_DET_2_1G_DL_OUT_H]){ } if(Prev_data[INDEX_DET_2_1G_DL_OUT_L] != data_buf[INDEX_DET_2_1G_DL_OUT_L]){ } if(Prev_data[INDEX_DET_2_1G_UL_IN_H] != data_buf[INDEX_DET_2_1G_UL_IN_H]){ } if(Prev_data[INDEX_DET_2_1G_UL_IN_L] != data_buf[INDEX_DET_2_1G_UL_IN_L]){ } if(Prev_data[INDEX_DET_2_1G_UL_OUT_H] != data_buf[INDEX_DET_2_1G_UL_OUT_H]){ } if(Prev_data[INDEX_DET_2_1G_UL_OUT_L] != data_buf[INDEX_DET_2_1G_UL_OUT_L]){ } if(Prev_data[INDEX_DET_3_5G_DL_IN_H] != data_buf[INDEX_DET_3_5G_DL_IN_H]){ } if(Prev_data[INDEX_DET_3_5G_DL_IN_L] != data_buf[INDEX_DET_3_5G_DL_IN_L]){ } if(Prev_data[INDEX_DET_3_5G_DL_OUT_L] != data_buf[INDEX_DET_3_5G_DL_OUT_L]){ } if(Prev_data[INDEX_DET_3_5G_DL_OUT_H] != data_buf[INDEX_DET_3_5G_DL_OUT_H]){ } if(Prev_data[INDEX_DET_3_5G_UL_IN_H] != data_buf[INDEX_DET_3_5G_UL_IN_H]){ } if(Prev_data[INDEX_DET_3_5G_UL_IN_L] != data_buf[INDEX_DET_3_5G_UL_IN_L]){ } if(Prev_data[INDEX_DET_3_5G_UL_OUT_H] != data_buf[INDEX_DET_3_5G_UL_OUT_H]){ } if(Prev_data[INDEX_DET_3_5G_UL_OUT_L] != data_buf[INDEX_DET_3_5G_UL_OUT_L]){ } if(Prev_data[INDEX_RFU_TEMP_H] != data_buf[INDEX_RFU_TEMP_H]){ } if(Prev_data[INDEX_RFU_TEMP_L] != data_buf[INDEX_RFU_TEMP_L]){ } if(Prev_data[INDEX__28V_DET_H] != data_buf[INDEX__28V_DET_H]){ } if(Prev_data[INDEX__28V_DET_L] != data_buf[INDEX__28V_DET_L]){ } #endif // PYJ.2019.07.28_END -- if(Prev_data[INDEX_ALARM_AC] != data_buf[INDEX_ALARM_AC]){ } if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){ } if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]); Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL]; } if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]); Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL]; } if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]); Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL]; } if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]); Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL]; } if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]); Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L]; } if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]); Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H]; } if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; } if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){ Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]); Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; HAL_Delay(1); // printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]); if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ // printf("PLL CTRL START !! \r\n"); #if 1 // PYJ.2019.08.12_BEGIN -- // temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | // (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | // (Prev_data[INDEX_PLL_3_5G_LOW_L]); temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | (Prev_data[INDEX_PLL_3_5G_HIGH_L]); temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); } } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]); Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L]; HAL_Delay(1); // printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]); if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ // printf("PLL CTRL START !! \r\n"); #if 1 // PYJ.2019.08.12_BEGIN -- // temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | // (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | // (Prev_data[INDEX_PLL_3_5G_HIGH_L]); temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | (Prev_data[INDEX_PLL_3_5G_LOW_L]); temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #else temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); } } if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){ Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL]; Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]); } if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){ Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL]; Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]); } if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){ Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL]; Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]); } if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){ Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL]; Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]); } if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H]) ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){ ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H]; Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L]; } if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H]) ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){ ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H]; Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L]; } if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H]) ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){ ADC_Modify = 1; // printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]); // printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]); Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H]; Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L]; } if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H]) ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){ ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H]; Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L]; } if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H]) ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){ ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H]; Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L]; } if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H]) ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){ ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H]; Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L]; } if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H]) ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){ ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H]; Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L]; } if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H]) ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){ ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H]; Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L]; } if(ADC_Modify){ // AD5318_Ctrl(0xF000); // HAL_Delay(1); // AD5318_Ctrl(0x800C); // AD5318_Ctrl(0x2FFF ); // AD5318_Ctrl(0xA000); // printf("DAC CTRL START \r\n"); // AD5318_Ctrl(0x800C); // AD5318_Ctrl(0xA000); // printf("DAC Change\r\n"); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L])); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L])); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L])); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L])); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L])); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L])); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L])); AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L])); } } uint8_t temp_crc = 0; bool RF_Ctrl_Main(uint8_t* data_buf){ bool ret = false; Bluecell_Prot_t type = data_buf[Type]; ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */ if(ret == false){ HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); return ret; } switch(type){ case TYPE_BLUECELL_RESET: for(uint8_t i =0 ; i < data_buf[Length] + 6; i++) printf("%02x ",data_buf[i]); printf("Reset Start \r\n"); NVIC_SystemReset(); break; case TYPE_BLUECELL_SET: #if 0 // PYJ.2019.07.31_BEGIN -- printf("TYPE_BLUECELL_SET : "); for(uint8_t i =0 ; i < INDEX_BLUE_EOF + 1; i++) printf("%02x ",data_buf[i]); #endif // PYJ.2019.07.31_END -- RF_Operate(&data_buf[Header]); RF_Status_Ack(); // ADF4153_Freq_Calc(3465500000,40000000,2,5000); // ADF4153_Freq_Calc(3993450000,40000000,2,5000); // halSynSetFreq(1995000000); // halSynSetFreq(1600000000); // halSynSetFreq(1455000000); break; case TYPE_BLUECELL_GET: #if 0 // PYJ.2019.08.01_BEGIN -- printf("\r\nTYPE_BLUECELL_GET : \r\n"); #endif // PYJ.2019.08.01_END -- RF_Status_Get(); break; case TYPE_BLUECELL_SAVE: // printf("\r\nFLASH Write\r\n"); Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]); RF_Status_Ack(); break; default: #ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN -- printf("Function : %s LINE : %d type : %d \r\n",__func__,__LINE__,type); #endif break; } return ret; }