: { 80080cc: b580 push {r7, lr} static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 80080ce: 4db0 ldr r5, [pc, #704] ; (8008390 ) { 80080d0: b08c sub sp, #48 ; 0x30 HAL_Init(); 80080d2: f7fd f9e7 bl 80054a4 SystemClock_Config(); 80080d6: f7ff ffc3 bl 8008060 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80080da: 2210 movs r2, #16 80080dc: 2100 movs r1, #0 80080de: a808 add r0, sp, #32 80080e0: f001 fb19 bl 8009716 __HAL_RCC_GPIOE_CLK_ENABLE(); 80080e4: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80080e6: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 80080e8: f043 0340 orr.w r3, r3, #64 ; 0x40 80080ec: 61ab str r3, [r5, #24] 80080ee: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80080f0: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 80080f2: f003 0340 and.w r3, r3, #64 ; 0x40 80080f6: 9301 str r3, [sp, #4] 80080f8: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOC_CLK_ENABLE(); 80080fa: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80080fc: 48a5 ldr r0, [pc, #660] ; (8008394 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 80080fe: f043 0310 orr.w r3, r3, #16 8008102: 61ab str r3, [r5, #24] 8008104: 69ab ldr r3, [r5, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8008106: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8008108: f003 0310 and.w r3, r3, #16 800810c: 9302 str r3, [sp, #8] 800810e: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOF_CLK_ENABLE(); 8008110: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008112: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 8008114: f043 0380 orr.w r3, r3, #128 ; 0x80 8008118: 61ab str r3, [r5, #24] 800811a: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800811c: 2702 movs r7, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 800811e: f003 0380 and.w r3, r3, #128 ; 0x80 8008122: 9303 str r3, [sp, #12] 8008124: 9b03 ldr r3, [sp, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008126: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8008128: f04f 090c mov.w r9, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 800812c: f043 0304 orr.w r3, r3, #4 8008130: 61ab str r3, [r5, #24] 8008132: 69ab ldr r3, [r5, #24] hadc1.Init.NbrOfConversion = 14; 8008134: f04f 080e mov.w r8, #14 __HAL_RCC_GPIOA_CLK_ENABLE(); 8008138: f003 0304 and.w r3, r3, #4 800813c: 9304 str r3, [sp, #16] 800813e: 9b04 ldr r3, [sp, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8008140: 69ab ldr r3, [r5, #24] sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 8008142: f04f 0a07 mov.w sl, #7 __HAL_RCC_GPIOB_CLK_ENABLE(); 8008146: f043 0308 orr.w r3, r3, #8 800814a: 61ab str r3, [r5, #24] 800814c: 69ab ldr r3, [r5, #24] 800814e: f003 0308 and.w r3, r3, #8 8008152: 9305 str r3, [sp, #20] 8008154: 9b05 ldr r3, [sp, #20] __HAL_RCC_GPIOD_CLK_ENABLE(); 8008156: 69ab ldr r3, [r5, #24] 8008158: f043 0320 orr.w r3, r3, #32 800815c: 61ab str r3, [r5, #24] 800815e: 69ab ldr r3, [r5, #24] 8008160: f003 0320 and.w r3, r3, #32 8008164: 9306 str r3, [sp, #24] 8008166: 9b06 ldr r3, [sp, #24] __HAL_RCC_GPIOG_CLK_ENABLE(); 8008168: 69ab ldr r3, [r5, #24] 800816a: f443 7380 orr.w r3, r3, #256 ; 0x100 800816e: 61ab str r3, [r5, #24] 8008170: 69ab ldr r3, [r5, #24] 8008172: f403 7380 and.w r3, r3, #256 ; 0x100 8008176: 9307 str r3, [sp, #28] 8008178: 9b07 ldr r3, [sp, #28] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 800817a: f7fe f8ab bl 80062d4 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 800817e: 2200 movs r2, #0 8008180: f64f 41c0 movw r1, #64704 ; 0xfcc0 8008184: 4884 ldr r0, [pc, #528] ; (8008398 ) 8008186: f7fe f8a5 bl 80062d4 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 800818a: 2200 movs r2, #0 800818c: f240 31f3 movw r1, #1011 ; 0x3f3 8008190: 4882 ldr r0, [pc, #520] ; (800839c ) 8008192: f7fe f89f bl 80062d4 HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8008196: 2200 movs r2, #0 8008198: f648 71ff movw r1, #36863 ; 0x8fff 800819c: 4880 ldr r0, [pc, #512] ; (80083a0 ) 800819e: f7fe f899 bl 80062d4 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 80081a2: 2200 movs r2, #0 80081a4: f647 71fc movw r1, #32764 ; 0x7ffc 80081a8: 487e ldr r0, [pc, #504] ; (80083a4 ) 80081aa: f7fe f893 bl 80062d4 HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET); 80081ae: 2200 movs r2, #0 80081b0: f44f 4100 mov.w r1, #32768 ; 0x8000 80081b4: 487c ldr r0, [pc, #496] ; (80083a8 ) 80081b6: f7fe f88d bl 80062d4 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 80081ba: 2200 movs r2, #0 80081bc: 2118 movs r1, #24 80081be: 487b ldr r0, [pc, #492] ; (80083ac ) 80081c0: f7fe f888 bl 80062d4 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80081c4: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80081c6: a908 add r1, sp, #32 80081c8: 4872 ldr r0, [pc, #456] ; (8008394 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80081ca: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081cc: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081ce: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081d0: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80081d2: f7fd ff8d bl 80060f0 GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 80081d6: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80081da: a908 add r1, sp, #32 80081dc: 486e ldr r0, [pc, #440] ; (8008398 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 80081de: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081e0: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081e2: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081e4: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80081e6: f7fd ff83 bl 80060f0 GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 80081ea: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80081ee: a908 add r1, sp, #32 80081f0: 486a ldr r0, [pc, #424] ; (800839c ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 80081f2: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081f4: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081f6: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081f8: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80081fa: f7fd ff79 bl 80060f0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80081fe: a908 add r1, sp, #32 8008200: 4866 ldr r0, [pc, #408] ; (800839c ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8008202: f8cd 9020 str.w r9, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008206: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008208: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 800820a: f7fd ff71 bl 80060f0 /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin PATH_EN_3_5G_L_Pin */ GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 800820e: f648 73ff movw r3, #36863 ; 0x8fff |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin |PATH_EN_3_5G_L_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8008212: a908 add r1, sp, #32 8008214: 4862 ldr r0, [pc, #392] ; (80083a0 ) GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8008216: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008218: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800821a: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 800821c: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800821e: f7fd ff67 bl 80060f0 /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */ GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8008222: f44f 5340 mov.w r3, #12288 ; 0x3000 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8008226: a908 add r1, sp, #32 8008228: 485d ldr r0, [pc, #372] ; (80083a0 ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 800822a: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800822c: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 800822e: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8008230: f7fd ff5e bl 80060f0 /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin BOOT_LED_Pin */ GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8008234: f647 73fc movw r3, #32764 ; 0x7ffc |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin |BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8008238: a908 add r1, sp, #32 800823a: 485a ldr r0, [pc, #360] ; (80083a4 ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 800823c: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800823e: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008240: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008242: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8008244: f7fd ff54 bl 80060f0 /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */ GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8008248: f44f 7340 mov.w r3, #768 ; 0x300 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800824c: a908 add r1, sp, #32 800824e: 4852 ldr r0, [pc, #328] ; (8008398 ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8008250: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008252: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008254: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008256: f7fd ff4b bl 80060f0 /*Configure GPIO pin : PLL_CLK_3_5G_Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 800825a: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 800825e: a908 add r1, sp, #32 8008260: 4851 ldr r0, [pc, #324] ; (80083a8 ) GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8008262: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008264: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008266: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008268: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 800826a: f7fd ff41 bl 80060f0 /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 800826e: 2318 movs r3, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008270: a908 add r1, sp, #32 8008272: 484e ldr r0, [pc, #312] ; (80083ac ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8008274: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008276: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008278: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 800827a: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800827c: f7fd ff38 bl 80060f0 /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8008280: 2360 movs r3, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008282: a908 add r1, sp, #32 8008284: 4849 ldr r0, [pc, #292] ; (80083ac ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8008286: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008288: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 800828a: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800828c: f7fd ff30 bl 80060f0 __HAL_RCC_DMA1_CLK_ENABLE(); 8008290: 696b ldr r3, [r5, #20] 8008292: 4333 orrs r3, r6 8008294: 616b str r3, [r5, #20] 8008296: 696b ldr r3, [r5, #20] hadc1.Instance = ADC1; 8008298: 4d45 ldr r5, [pc, #276] ; (80083b0 ) __HAL_RCC_DMA1_CLK_ENABLE(); 800829a: 4033 ands r3, r6 800829c: 9300 str r3, [sp, #0] 800829e: 9b00 ldr r3, [sp, #0] hadc1.Instance = ADC1; 80082a0: 4b44 ldr r3, [pc, #272] ; (80083b4 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 80082a2: 4628 mov r0, r5 hadc1.Instance = ADC1; 80082a4: 602b str r3, [r5, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 80082a6: f44f 7380 mov.w r3, #256 ; 0x100 80082aa: 60ab str r3, [r5, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80082ac: f44f 2360 mov.w r3, #917504 ; 0xe0000 hadc1.Init.ContinuousConvMode = ENABLE; 80082b0: 60ee str r6, [r5, #12] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80082b2: 61eb str r3, [r5, #28] ADC_ChannelConfTypeDef sConfig = {0}; 80082b4: 9408 str r4, [sp, #32] 80082b6: 9409 str r4, [sp, #36] ; 0x24 80082b8: 940a str r4, [sp, #40] ; 0x28 hadc1.Init.DiscontinuousConvMode = DISABLE; 80082ba: 616c str r4, [r5, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80082bc: 606c str r4, [r5, #4] hadc1.Init.NbrOfConversion = 14; 80082be: f8c5 8010 str.w r8, [r5, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 80082c2: f7fd facd bl 8005860 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082c6: a908 add r1, sp, #32 80082c8: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_1; 80082ca: 9609 str r6, [sp, #36] ; 0x24 sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 80082cc: f8cd a028 str.w sl, [sp, #40] ; 0x28 sConfig.Channel = ADC_CHANNEL_0; 80082d0: 9408 str r4, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082d2: f7fd f959 bl 8005588 sConfig.Channel = ADC_CHANNEL_1; 80082d6: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 80082d8: 2603 movs r6, #3 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082da: a908 add r1, sp, #32 80082dc: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_2; 80082de: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082e0: f7fd f952 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082e4: a908 add r1, sp, #32 80082e6: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_2; 80082e8: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 80082ea: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082ec: f7fd f94c bl 8005588 sConfig.Channel = ADC_CHANNEL_3; 80082f0: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_4; 80082f2: 2604 movs r6, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082f4: a908 add r1, sp, #32 80082f6: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_4; 80082f8: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082fa: f7fd f945 bl 8005588 sConfig.Channel = ADC_CHANNEL_4; 80082fe: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_5; 8008300: 2605 movs r6, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008302: a908 add r1, sp, #32 8008304: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_5; 8008306: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008308: f7fd f93e bl 8005588 sConfig.Channel = ADC_CHANNEL_5; 800830c: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_6; 800830e: 2606 movs r6, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008310: a908 add r1, sp, #32 8008312: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_6; 8008314: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008316: f7fd f937 bl 8005588 sConfig.Channel = ADC_CHANNEL_6; 800831a: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 800831c: 2608 movs r6, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800831e: a908 add r1, sp, #32 8008320: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_7; 8008322: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008326: f7fd f92f bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800832a: a908 add r1, sp, #32 800832c: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_7; 800832e: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 8008332: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008334: f7fd f928 bl 8005588 sConfig.Channel = ADC_CHANNEL_8; 8008338: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_9; 800833a: 2609 movs r6, #9 sConfig.Rank = ADC_REGULAR_RANK_10; 800833c: f04f 0a0a mov.w sl, #10 sConfig.Rank = ADC_REGULAR_RANK_11; 8008340: 270b movs r7, #11 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008342: a908 add r1, sp, #32 8008344: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_9; 8008346: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008348: f7fd f91e bl 8005588 sConfig.Channel = ADC_CHANNEL_9; 800834c: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_13; 800834e: 260d movs r6, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008350: a908 add r1, sp, #32 8008352: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_10; 8008354: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008358: f7fd f916 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800835c: a908 add r1, sp, #32 800835e: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_10; 8008360: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_11; 8008364: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008366: f7fd f90f bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800836a: a908 add r1, sp, #32 800836c: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_11; 800836e: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_12; 8008370: f8cd 9024 str.w r9, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008374: f7fd f908 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008378: a908 add r1, sp, #32 800837a: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_13; 800837c: 9609 str r6, [sp, #36] ; 0x24 sConfig.Channel = ADC_CHANNEL_12; 800837e: f8cd 9020 str.w r9, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008382: f7fd f901 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008386: a908 add r1, sp, #32 8008388: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_13; 800838a: 9608 str r6, [sp, #32] 800838c: e014 b.n 80083b8 800838e: bf00 nop 8008390: 40021000 .word 0x40021000 8008394: 40011800 .word 0x40011800 8008398: 40011000 .word 0x40011000 800839c: 40011c00 .word 0x40011c00 80083a0: 40011400 .word 0x40011400 80083a4: 40012000 .word 0x40012000 80083a8: 40010800 .word 0x40010800 80083ac: 40010c00 .word 0x40010c00 80083b0: 2000068c .word 0x2000068c 80083b4: 40012400 .word 0x40012400 sConfig.Rank = ADC_REGULAR_RANK_14; 80083b8: f8cd 8024 str.w r8, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80083bc: f7fd f8e4 bl 8005588 huart1.Init.BaudRate = 115200; 80083c0: f44f 33e1 mov.w r3, #115200 ; 0x1c200 huart1.Instance = USART1; 80083c4: 4838 ldr r0, [pc, #224] ; (80084a8 ) huart1.Init.BaudRate = 115200; 80083c6: 4a39 ldr r2, [pc, #228] ; (80084ac ) huart1.Init.WordLength = UART_WORDLENGTH_8B; 80083c8: 6084 str r4, [r0, #8] huart1.Init.BaudRate = 115200; 80083ca: e880 000c stmia.w r0, {r2, r3} huart1.Init.StopBits = UART_STOPBITS_1; 80083ce: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 80083d0: 6104 str r4, [r0, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80083d2: f8c0 9014 str.w r9, [r0, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80083d6: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80083d8: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 80083da: f7fe fd1d bl 8006e18 htim6.Init.Prescaler = 5600-1; 80083de: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 80083e2: 4e33 ldr r6, [pc, #204] ; (80084b0 ) htim6.Init.Prescaler = 5600-1; 80083e4: 4933 ldr r1, [pc, #204] ; (80084b4 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80083e6: 4630 mov r0, r6 htim6.Init.Prescaler = 5600-1; 80083e8: e886 000a stmia.w r6, {r1, r3} TIM_MasterConfigTypeDef sMasterConfig = {0}; 80083ec: 9408 str r4, [sp, #32] 80083ee: 9409 str r4, [sp, #36] ; 0x24 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 80083f0: 60b4 str r4, [r6, #8] htim6.Init.Period = 10; 80083f2: f8c6 a00c str.w sl, [r6, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80083f6: 61b4 str r4, [r6, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80083f8: f7fe fbfc bl 8006bf4 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80083fc: a908 add r1, sp, #32 80083fe: 4630 mov r0, r6 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8008400: 9408 str r4, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8008402: 9409 str r4, [sp, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8008404: f7fe fc10 bl 8006c28 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8008408: 4622 mov r2, r4 800840a: 4621 mov r1, r4 800840c: 2025 movs r0, #37 ; 0x25 800840e: f7fd fb2b bl 8005a68 HAL_NVIC_EnableIRQ(USART1_IRQn); 8008412: 2025 movs r0, #37 ; 0x25 8008414: f7fd fb5c bl 8005ad0 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8008418: 4622 mov r2, r4 800841a: 4621 mov r1, r4 800841c: 2036 movs r0, #54 ; 0x36 800841e: f7fd fb23 bl 8005a68 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8008422: 2036 movs r0, #54 ; 0x36 8008424: f7fd fb54 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8008428: 4622 mov r2, r4 800842a: 4621 mov r1, r4 800842c: 4638 mov r0, r7 800842e: f7fd fb1b bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 8008432: 4638 mov r0, r7 8008434: f7fd fb4c bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 8008438: 4622 mov r2, r4 800843a: 4621 mov r1, r4 800843c: 4640 mov r0, r8 800843e: f7fd fb13 bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 8008442: 4640 mov r0, r8 8008444: f7fd fb44 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8008448: 4622 mov r2, r4 800844a: 4621 mov r1, r4 800844c: 200f movs r0, #15 800844e: f7fd fb0b bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 8008452: 200f movs r0, #15 8008454: f7fd fb3c bl 8005ad0 InitUartQueue(&TerminalQueue); 8008458: 4817 ldr r0, [pc, #92] ; (80084b8 ) 800845a: f000 fad7 bl 8008a0c Power_ON_OFF_Initialize(); 800845e: f7ff fd13 bl 8007e88 Path_Init(); 8008462: f7ff fc27 bl 8007cb4 while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK)); 8008466: 4628 mov r0, r5 8008468: f7fd fa84 bl 8005974 800846c: 2800 cmp r0, #0 800846e: d1fa bne.n 8008466 AD5318_Initialize(); 8008470: f7fe ff7e bl 8007370 Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]); 8008474: 4811 ldr r0, [pc, #68] ; (80084bc ) 8008476: f7ff fc0c bl 8007c92 ADF4153_Initialize(); 800847a: f7ff faaf bl 80079dc ADF4113_Initialize(); 800847e: f000 f825 bl 80084cc PE43711_PinInit(); 8008482: f7ff f97d bl 8007780 BDA4601_Initialize(); 8008486: f7fe fff9 bl 800747c ATTEN_PLL_PATH_Initialize(); 800848a: f7ff fceb bl 8007e64 HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14); 800848e: 220e movs r2, #14 8008490: 490b ldr r1, [pc, #44] ; (80084c0 ) 8008492: 480c ldr r0, [pc, #48] ; (80084c4 ) 8008494: f7fd f934 bl 8005700 Boot_LED_Toggle(); 8008498: f7ff fd70 bl 8007f7c Uart_Check(); 800849c: f7ff fda0 bl 8007fe0 ADC_Check(); 80084a0: f7ff fd7e bl 8007fa0 80084a4: e7f8 b.n 8008498 80084a6: bf00 nop 80084a8: 20000700 .word 0x20000700 80084ac: 40013800 .word 0x40013800 80084b0: 20000784 .word 0x20000784 80084b4: 40001000 .word 0x40001000 80084b8: 20000bc4 .word 0x20000bc4 80084bc: 20000580 .word 0x20000580 80084c0: 200004a0 .word 0x200004a0 80084c4: 2000068c .word 0x2000068c 080084c8 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80084c8: 4770 bx lr ... 080084cc : uint16_t P; uint16_t A; uint16_t N; }Adf4113_st; void ADF4113_Initialize(void){ if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){ 80084cc: 4b10 ldr r3, [pc, #64] ; (8008510 ) 80084ce: 7d9a ldrb r2, [r3, #22] 80084d0: b92a cbnz r2, 80084de 80084d2: 7dda ldrb r2, [r3, #23] 80084d4: b91a cbnz r2, 80084de Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47; 80084d6: 223e movs r2, #62 ; 0x3e 80084d8: 759a strb r2, [r3, #22] Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF); 80084da: 2280 movs r2, #128 ; 0x80 80084dc: 75da strb r2, [r3, #23] } if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){ 80084de: 7e1a ldrb r2, [r3, #24] 80084e0: b92a cbnz r2, 80084ee 80084e2: 7e5a ldrb r2, [r3, #25] 80084e4: b91a cbnz r2, 80084ee Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8); 80084e6: 2238 movs r2, #56 ; 0x38 80084e8: 761a strb r2, [r3, #24] Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF); 80084ea: 22d6 movs r2, #214 ; 0xd6 80084ec: 765a strb r2, [r3, #25] } if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){ 80084ee: 7e9a ldrb r2, [r3, #26] 80084f0: b92a cbnz r2, 80084fe 80084f2: 7eda ldrb r2, [r3, #27] 80084f4: b91a cbnz r2, 80084fe Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8); 80084f6: 224d movs r2, #77 ; 0x4d 80084f8: 769a strb r2, [r3, #26] Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF); 80084fa: 22ee movs r2, #238 ; 0xee 80084fc: 76da strb r2, [r3, #27] } if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){ 80084fe: 7f1a ldrb r2, [r3, #28] 8008500: b92a cbnz r2, 800850e 8008502: 7f5a ldrb r2, [r3, #29] 8008504: b91a cbnz r2, 800850e Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8); 8008506: 2259 movs r2, #89 ; 0x59 8008508: 771a strb r2, [r3, #28] Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF); 800850a: 22a6 movs r2, #166 ; 0xa6 800850c: 775a strb r2, [r3, #29] 800850e: 4770 bx lr 8008510: 20000580 .word 0x20000580 08008514 : A = N_val -(B * P); // printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); // printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); return N_Counter_Latch_Create(A,B,0); } uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){ 8008514: 2301 movs r3, #1 8008516: b570 push {r4, r5, r6, lr} 8008518: 2402 movs r4, #2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 8; i++){ if(_ACOUNTER & 0x01) ret += shift_bit << i; 800851a: 461d mov r5, r3 if(_ACOUNTER & 0x01) 800851c: 07c6 lsls r6, r0, #31 ret += shift_bit << i; 800851e: bf48 it mi 8008520: fa05 f604 lslmi.w r6, r5, r4 8008524: f104 0401 add.w r4, r4, #1 8008528: bf48 it mi 800852a: 199b addmi r3, r3, r6 for(i = 2; i < 8; i++){ 800852c: 2c08 cmp r4, #8 _ACOUNTER = _ACOUNTER >> 1; 800852e: ea4f 0050 mov.w r0, r0, lsr #1 for(i = 2; i < 8; i++){ 8008532: d1f3 bne.n 800851c #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 8; i < 21; i++){ if(_BCOUNTER & 0x01) ret += shift_bit << i; 8008534: 2001 movs r0, #1 if(_BCOUNTER & 0x01) 8008536: 07cd lsls r5, r1, #31 ret += shift_bit << i; 8008538: bf48 it mi 800853a: fa00 f504 lslmi.w r5, r0, r4 800853e: f104 0401 add.w r4, r4, #1 8008542: bf48 it mi 8008544: 195b addmi r3, r3, r5 for(i = 8; i < 21; i++){ 8008546: 2c15 cmp r4, #21 _BCOUNTER = _BCOUNTER >> 1; 8008548: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 8; i < 21; i++){ 800854c: d1f3 bne.n 8008536 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ if(_CPGAIN & 0x01) 800854e: 07d2 lsls r2, r2, #31 ret += shift_bit << i++; 8008550: bf48 it mi 8008552: f503 1300 addmi.w r3, r3, #2097152 ; 0x200000 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } 8008556: 4618 mov r0, r3 8008558: bd70 pop {r4, r5, r6, pc} ... 0800855c : N_val = (rf_Freq / ADF4113_CH_STEP); 800855c: f24c 3350 movw r3, #50000 ; 0xc350 8008560: fbb0 f3f3 udiv r3, r0, r3 if( N_val < ADF4113_PRE8_MIN_N) { 8008564: 2b37 cmp r3, #55 ; 0x37 8008566: d909 bls.n 800857c B = N_val / P; 8008568: 4905 ldr r1, [pc, #20] ; (8008580 ) return N_Counter_Latch_Create(A,B,0); 800856a: 2200 movs r2, #0 B = N_val / P; 800856c: fbb0 f1f1 udiv r1, r0, r1 A = N_val -(B * P); 8008570: eba3 1041 sub.w r0, r3, r1, lsl #5 return N_Counter_Latch_Create(A,B,0); 8008574: b280 uxth r0, r0 8008576: b289 uxth r1, r1 8008578: f7ff bfcc b.w 8008514 } 800857c: 2004 movs r0, #4 800857e: 4770 bx lr 8008580: 00186a00 .word 0x00186a00 08008584 : void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 8008584: b084 sub sp, #16 8008586: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800858a: ac0c add r4, sp, #48 ; 0x30 800858c: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 8008590: 9b13 ldr r3, [sp, #76] ; 0x4c 8008592: f8bd 7034 ldrh.w r7, [sp, #52] ; 0x34 8008596: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 800859a: 9301 str r3, [sp, #4] R0 = R0 & 0xFFFFFF; 800859c: 9b12 ldr r3, [sp, #72] ; 0x48 800859e: f8dd 8038 ldr.w r8, [sp, #56] ; 0x38 80085a2: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 80085a6: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80085aa: 9d10 ldr r5, [sp, #64] ; 0x40 80085ac: f8bd 6044 ldrh.w r6, [sp, #68] ; 0x44 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085b0: 2200 movs r2, #0 80085b2: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 80085b4: 9300 str r3, [sp, #0] 80085b6: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 80085b8: 9c14 ldr r4, [sp, #80] ; 0x50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085ba: f7fd fe8b bl 80062d4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085be: 2200 movs r2, #0 80085c0: 4649 mov r1, r9 80085c2: 4640 mov r0, r8 80085c4: f7fd fe86 bl 80062d4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80085c8: 2200 movs r2, #0 80085ca: 4631 mov r1, r6 80085cc: 4628 mov r0, r5 80085ce: f7fd fe81 bl 80062d4 80085d2: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 80085d6: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 80085da: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80085de: bf18 it ne 80085e0: 2201 movne r2, #1 } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085e2: 4649 mov r1, r9 80085e4: 4640 mov r0, r8 80085e6: f7fd fe75 bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80085ea: 2201 movs r2, #1 80085ec: 4639 mov r1, r7 80085ee: 4650 mov r0, sl 80085f0: f7fd fe70 bl 80062d4 Pol_Delay_us(10); 80085f4: 200a movs r0, #10 80085f6: f7ff fcab bl 8007f50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085fa: 2200 movs r2, #0 80085fc: 4639 mov r1, r7 80085fe: 4650 mov r0, sl 8008600: f7fd fe68 bl 80062d4 R2 = ((R2 << 1) & 0xFFFFFF); 8008604: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 8008606: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 800860a: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 800860e: d1e4 bne.n 80085da } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008610: 2201 movs r2, #1 8008612: 4631 mov r1, r6 8008614: 4628 mov r0, r5 8008616: f7fd fe5d bl 80062d4 Pol_Delay_us(10); 800861a: 200a movs r0, #10 800861c: f7ff fc98 bl 8007f50 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008620: 465a mov r2, fp 8008622: 4631 mov r1, r6 8008624: 4628 mov r0, r5 8008626: f7fd fe55 bl 80062d4 800862a: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 800862c: 9b00 ldr r3, [sp, #0] #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800862e: 4649 mov r1, r9 if(R0 & 0x800000){ 8008630: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008634: bf18 it ne 8008636: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008638: 4640 mov r0, r8 800863a: f7fd fe4b bl 80062d4 #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800863e: 2201 movs r2, #1 8008640: 4639 mov r1, r7 8008642: 4650 mov r0, sl 8008644: f7fd fe46 bl 80062d4 Pol_Delay_us(10); 8008648: 200a movs r0, #10 800864a: f7ff fc81 bl 8007f50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800864e: 2200 movs r2, #0 8008650: 4639 mov r1, r7 8008652: 4650 mov r0, sl 8008654: f7fd fe3e bl 80062d4 R0 = ((R0 << 1) & 0xFFFFFF); 8008658: 9b00 ldr r3, [sp, #0] for(int i =0; i < 24; i++){ 800865a: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 800865c: ea4f 0343 mov.w r3, r3, lsl #1 8008660: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008664: 9300 str r3, [sp, #0] for(int i =0; i < 24; i++){ 8008666: d1e1 bne.n 800862c } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008668: 2201 movs r2, #1 800866a: 4631 mov r1, r6 800866c: 4628 mov r0, r5 800866e: f7fd fe31 bl 80062d4 Pol_Delay_us(10); 8008672: 200a movs r0, #10 8008674: f7ff fc6c bl 8007f50 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008678: 4622 mov r2, r4 800867a: 4631 mov r1, r6 800867c: 4628 mov r0, r5 800867e: f7fd fe29 bl 80062d4 8008682: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 8008684: 9b01 ldr r3, [sp, #4] } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008686: 4649 mov r1, r9 if(R1 & 0x800000){ 8008688: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 800868c: bf18 it ne 800868e: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008690: 4640 mov r0, r8 8008692: f7fd fe1f bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8008696: 2201 movs r2, #1 8008698: 4639 mov r1, r7 800869a: 4650 mov r0, sl 800869c: f7fd fe1a bl 80062d4 Pol_Delay_us(10); 80086a0: 200a movs r0, #10 80086a2: f7ff fc55 bl 8007f50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80086a6: 2200 movs r2, #0 80086a8: 4639 mov r1, r7 80086aa: 4650 mov r0, sl 80086ac: f7fd fe12 bl 80062d4 R1 = ((R1 << 1) & 0xFFFFFF); 80086b0: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 80086b2: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 80086b4: ea4f 0343 mov.w r3, r3, lsl #1 80086b8: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80086bc: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 80086be: d1e1 bne.n 8008684 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80086c0: 4631 mov r1, r6 80086c2: 2201 movs r2, #1 80086c4: 4628 mov r0, r5 80086c6: f7fd fe05 bl 80062d4 Pol_Delay_us(10); 80086ca: 200a movs r0, #10 80086cc: f7ff fc40 bl 8007f50 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80086d0: 4622 mov r2, r4 80086d2: 4631 mov r1, r6 80086d4: 4628 mov r0, r5 } 80086d6: b003 add sp, #12 80086d8: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80086dc: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80086de: f7fd bdf9 b.w 80062d4 ... 080086e4 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80086e4: 4b0e ldr r3, [pc, #56] ; (8008720 ) { 80086e6: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 80086e8: 699a ldr r2, [r3, #24] 80086ea: f042 0201 orr.w r2, r2, #1 80086ee: 619a str r2, [r3, #24] 80086f0: 699a ldr r2, [r3, #24] 80086f2: f002 0201 and.w r2, r2, #1 80086f6: 9200 str r2, [sp, #0] 80086f8: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 80086fa: 69da ldr r2, [r3, #28] 80086fc: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8008700: 61da str r2, [r3, #28] 8008702: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8008704: 4a07 ldr r2, [pc, #28] ; (8008724 ) __HAL_RCC_PWR_CLK_ENABLE(); 8008706: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800870a: 9301 str r3, [sp, #4] 800870c: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800870e: 6853 ldr r3, [r2, #4] 8008710: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8008714: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 8008718: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800871a: b002 add sp, #8 800871c: 4770 bx lr 800871e: bf00 nop 8008720: 40021000 .word 0x40021000 8008724: 40010000 .word 0x40010000 08008728 : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008728: 2210 movs r2, #16 { 800872a: b530 push {r4, r5, lr} 800872c: 4605 mov r5, r0 800872e: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008730: eb0d 0002 add.w r0, sp, r2 8008734: 2100 movs r1, #0 8008736: f000 ffee bl 8009716 if(hadc->Instance==ADC1) 800873a: 682a ldr r2, [r5, #0] 800873c: 4b2c ldr r3, [pc, #176] ; (80087f0 ) 800873e: 429a cmp r2, r3 8008740: d153 bne.n 80087ea { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8008742: f503 436c add.w r3, r3, #60416 ; 0xec00 8008746: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008748: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 800874a: f442 7200 orr.w r2, r2, #512 ; 0x200 800874e: 619a str r2, [r3, #24] 8008750: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008752: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 8008754: f402 7200 and.w r2, r2, #512 ; 0x200 8008758: 9200 str r2, [sp, #0] 800875a: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 800875c: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800875e: 4825 ldr r0, [pc, #148] ; (80087f4 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8008760: f042 0210 orr.w r2, r2, #16 8008764: 619a str r2, [r3, #24] 8008766: 699a ldr r2, [r3, #24] 8008768: f002 0210 and.w r2, r2, #16 800876c: 9201 str r2, [sp, #4] 800876e: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008770: 699a ldr r2, [r3, #24] 8008772: f042 0204 orr.w r2, r2, #4 8008776: 619a str r2, [r3, #24] 8008778: 699a ldr r2, [r3, #24] 800877a: f002 0204 and.w r2, r2, #4 800877e: 9202 str r2, [sp, #8] 8008780: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8008782: 699a ldr r2, [r3, #24] 8008784: f042 0208 orr.w r2, r2, #8 8008788: 619a str r2, [r3, #24] 800878a: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800878c: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 800878e: f003 0308 and.w r3, r3, #8 8008792: 9303 str r3, [sp, #12] 8008794: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 8008796: 230f movs r3, #15 8008798: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800879a: f7fd fca9 bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 800879e: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80087a0: a904 add r1, sp, #16 80087a2: 4815 ldr r0, [pc, #84] ; (80087f8 ) GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80087a4: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80087a6: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80087a8: f7fd fca2 bl 80060f0 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80087ac: 4813 ldr r0, [pc, #76] ; (80087fc ) 80087ae: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 80087b0: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80087b2: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80087b4: f7fd fc9c bl 80060f0 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80087b8: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 80087ba: 4c11 ldr r4, [pc, #68] ; (8008800 ) 80087bc: 4b11 ldr r3, [pc, #68] ; (8008804 ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80087be: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 80087c0: f44f 7200 mov.w r2, #512 ; 0x200 80087c4: 6122 str r2, [r4, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 80087c6: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Instance = DMA1_Channel1; 80087ca: 6023 str r3, [r4, #0] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 80087cc: 6162 str r2, [r4, #20] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 80087ce: 2300 movs r3, #0 hdma_adc1.Init.Mode = DMA_CIRCULAR; 80087d0: 2220 movs r2, #32 hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 80087d2: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 80087d4: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 80087d6: 60a3 str r3, [r4, #8] hdma_adc1.Init.Mode = DMA_CIRCULAR; 80087d8: 61a2 str r2, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 80087da: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 80087dc: f7fd f99a bl 8005b14 80087e0: b108 cbz r0, 80087e6 { Error_Handler(); 80087e2: f7ff fe71 bl 80084c8 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 80087e6: 622c str r4, [r5, #32] 80087e8: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 80087ea: b009 add sp, #36 ; 0x24 80087ec: bd30 pop {r4, r5, pc} 80087ee: bf00 nop 80087f0: 40012400 .word 0x40012400 80087f4: 40011000 .word 0x40011000 80087f8: 40010800 .word 0x40010800 80087fc: 40010c00 .word 0x40010c00 8008800: 20000740 .word 0x20000740 8008804: 40020008 .word 0x40020008 08008808 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8008808: 6802 ldr r2, [r0, #0] 800880a: 4b08 ldr r3, [pc, #32] ; (800882c ) { 800880c: b082 sub sp, #8 if(htim_base->Instance==TIM6) 800880e: 429a cmp r2, r3 8008810: d10a bne.n 8008828 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8008812: f503 3300 add.w r3, r3, #131072 ; 0x20000 8008816: 69da ldr r2, [r3, #28] 8008818: f042 0210 orr.w r2, r2, #16 800881c: 61da str r2, [r3, #28] 800881e: 69db ldr r3, [r3, #28] 8008820: f003 0310 and.w r3, r3, #16 8008824: 9301 str r3, [sp, #4] 8008826: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8008828: b002 add sp, #8 800882a: 4770 bx lr 800882c: 40001000 .word 0x40001000 08008830 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8008830: b570 push {r4, r5, r6, lr} 8008832: 4606 mov r6, r0 8008834: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008836: 2210 movs r2, #16 8008838: 2100 movs r1, #0 800883a: a802 add r0, sp, #8 800883c: f000 ff6b bl 8009716 if(huart->Instance==USART1) 8008840: 6832 ldr r2, [r6, #0] 8008842: 4b2b ldr r3, [pc, #172] ; (80088f0 ) 8008844: 429a cmp r2, r3 8008846: d151 bne.n 80088ec { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8008848: f503 4358 add.w r3, r3, #55296 ; 0xd800 800884c: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800884e: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8008850: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8008854: 619a str r2, [r3, #24] 8008856: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008858: 4826 ldr r0, [pc, #152] ; (80088f4 ) __HAL_RCC_USART1_CLK_ENABLE(); 800885a: f402 4280 and.w r2, r2, #16384 ; 0x4000 800885e: 9200 str r2, [sp, #0] 8008860: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008862: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008864: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8008866: f042 0204 orr.w r2, r2, #4 800886a: 619a str r2, [r3, #24] 800886c: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 800886e: 4c22 ldr r4, [pc, #136] ; (80088f8 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8008870: f003 0304 and.w r3, r3, #4 8008874: 9301 str r3, [sp, #4] 8008876: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8008878: f44f 7300 mov.w r3, #512 ; 0x200 800887c: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800887e: 2302 movs r3, #2 8008880: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8008882: 2303 movs r3, #3 8008884: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008886: f7fd fc33 bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_10; 800888a: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800888e: 4819 ldr r0, [pc, #100] ; (80088f4 ) 8008890: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8008892: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008894: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8008896: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008898: f7fd fc2a bl 80060f0 hdma_usart1_rx.Instance = DMA1_Channel5; 800889c: 4b17 ldr r3, [pc, #92] ; (80088fc ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 800889e: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 80088a0: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80088a4: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80088a6: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80088a8: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80088aa: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80088ac: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 80088ae: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 80088b0: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80088b2: f7fd f92f bl 8005b14 80088b6: b108 cbz r0, 80088bc { Error_Handler(); 80088b8: f7ff fe06 bl 80084c8 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80088bc: f04f 0c10 mov.w ip, #16 80088c0: 4b0f ldr r3, [pc, #60] ; (8008900 ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 80088c2: 6374 str r4, [r6, #52] ; 0x34 80088c4: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 80088c6: 4c0f ldr r4, [pc, #60] ; (8008904 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80088c8: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80088ca: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 80088ce: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80088d0: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 80088d2: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80088d4: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80088d6: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80088d8: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 80088da: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 80088dc: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80088de: f7fd f919 bl 8005b14 80088e2: b108 cbz r0, 80088e8 { Error_Handler(); 80088e4: f7ff fdf0 bl 80084c8 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 80088e8: 6334 str r4, [r6, #48] ; 0x30 80088ea: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 80088ec: b006 add sp, #24 80088ee: bd70 pop {r4, r5, r6, pc} 80088f0: 40013800 .word 0x40013800 80088f4: 40010800 .word 0x40010800 80088f8: 200006bc .word 0x200006bc 80088fc: 40020058 .word 0x40020058 8008900: 40020044 .word 0x40020044 8008904: 20000648 .word 0x20000648 08008908 : 8008908: 4770 bx lr 0800890a : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 800890a: e7fe b.n 800890a 0800890c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 800890c: e7fe b.n 800890c 0800890e : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800890e: e7fe b.n 800890e 08008910 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8008910: e7fe b.n 8008910 08008912 : 8008912: 4770 bx lr 08008914 : 8008914: 4770 bx lr 08008916 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8008916: 4770 bx lr 08008918 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8008918: f7fc bdd6 b.w 80054c8 0800891c : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 800891c: 4801 ldr r0, [pc, #4] ; (8008924 ) 800891e: f7fd b9e5 b.w 8005cec 8008922: bf00 nop 8008924: 20000740 .word 0x20000740 08008928 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8008928: 4801 ldr r0, [pc, #4] ; (8008930 ) 800892a: f7fd b9df b.w 8005cec 800892e: bf00 nop 8008930: 20000648 .word 0x20000648 08008934 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8008934: 4801 ldr r0, [pc, #4] ; (800893c ) 8008936: f7fd b9d9 b.w 8005cec 800893a: bf00 nop 800893c: 200006bc .word 0x200006bc 08008940 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8008940: 4801 ldr r0, [pc, #4] ; (8008948 ) 8008942: f7fe bc1b b.w 800717c 8008946: bf00 nop 8008948: 20000700 .word 0x20000700 0800894c : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 800894c: 4801 ldr r0, [pc, #4] ; (8008954 ) 800894e: f7fe b863 b.w 8006a18 8008952: bf00 nop 8008954: 20000784 .word 0x20000784 08008958 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8008958: b570 push {r4, r5, r6, lr} 800895a: 460e mov r6, r1 800895c: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800895e: 460c mov r4, r1 8008960: 1ba3 subs r3, r4, r6 8008962: 429d cmp r5, r3 8008964: dc01 bgt.n 800896a <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8008966: 4628 mov r0, r5 8008968: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 800896a: f3af 8000 nop.w 800896e: f804 0b01 strb.w r0, [r4], #1 8008972: e7f5 b.n 8008960 <_read+0x8> 08008974 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8008974: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8008976: 4b0a ldr r3, [pc, #40] ; (80089a0 <_sbrk+0x2c>) { 8008978: 4602 mov r2, r0 if (heap_end == 0) 800897a: 6819 ldr r1, [r3, #0] 800897c: b909 cbnz r1, 8008982 <_sbrk+0xe> heap_end = &end; 800897e: 4909 ldr r1, [pc, #36] ; (80089a4 <_sbrk+0x30>) 8008980: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8008982: 4669 mov r1, sp prev_heap_end = heap_end; 8008984: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8008986: 4402 add r2, r0 8008988: 428a cmp r2, r1 800898a: d906 bls.n 800899a <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 800898c: f000 fe8e bl 80096ac <__errno> 8008990: 230c movs r3, #12 8008992: 6003 str r3, [r0, #0] return (caddr_t) -1; 8008994: f04f 30ff mov.w r0, #4294967295 8008998: bd08 pop {r3, pc} } heap_end += incr; 800899a: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 800899c: bd08 pop {r3, pc} 800899e: bf00 nop 80089a0: 20000460 .word 0x20000460 80089a4: 200017e4 .word 0x200017e4 080089a8 <_close>: int _close(int file) { return -1; } 80089a8: f04f 30ff mov.w r0, #4294967295 80089ac: 4770 bx lr 080089ae <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 80089ae: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 80089b2: 2000 movs r0, #0 st->st_mode = S_IFCHR; 80089b4: 604b str r3, [r1, #4] } 80089b6: 4770 bx lr 080089b8 <_isatty>: int _isatty(int file) { return 1; } 80089b8: 2001 movs r0, #1 80089ba: 4770 bx lr 080089bc <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 80089bc: 2000 movs r0, #0 80089be: 4770 bx lr 080089c0 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 80089c0: 4b0e ldr r3, [pc, #56] ; (80089fc ) 80089c2: 681a ldr r2, [r3, #0] 80089c4: f042 0201 orr.w r2, r2, #1 80089c8: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 80089ca: 6859 ldr r1, [r3, #4] 80089cc: 4a0c ldr r2, [pc, #48] ; (8008a00 ) 80089ce: 400a ands r2, r1 80089d0: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 80089d2: 681a ldr r2, [r3, #0] 80089d4: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 80089d8: f422 3280 bic.w r2, r2, #65536 ; 0x10000 80089dc: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 80089de: 681a ldr r2, [r3, #0] 80089e0: f422 2280 bic.w r2, r2, #262144 ; 0x40000 80089e4: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 80089e6: 685a ldr r2, [r3, #4] 80089e8: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80089ec: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80089ee: f44f 021f mov.w r2, #10420224 ; 0x9f0000 80089f2: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80089f4: 4a03 ldr r2, [pc, #12] ; (8008a04 ) 80089f6: 4b04 ldr r3, [pc, #16] ; (8008a08 ) 80089f8: 609a str r2, [r3, #8] 80089fa: 4770 bx lr 80089fc: 40021000 .word 0x40021000 8008a00: f8ff0000 .word 0xf8ff0000 8008a04: 08004000 .word 0x08004000 8008a08: e000ed00 .word 0xe000ed00 08008a0c : UARTQUEUE WifiQueue; uart_hal_tx_type uart_hal_tx; void InitUartQueue(pUARTQUEUE pQueue) { setbuf(stdout, NULL); 8008a0c: 4b0b ldr r3, [pc, #44] ; (8008a3c ) { 8008a0e: b510 push {r4, lr} setbuf(stdout, NULL); 8008a10: 681b ldr r3, [r3, #0] { 8008a12: 4604 mov r4, r0 setbuf(stdout, NULL); 8008a14: 2100 movs r1, #0 8008a16: 6898 ldr r0, [r3, #8] 8008a18: f001 fb62 bl 800a0e0 pQueue->data = pQueue->head = pQueue->tail = 0; 8008a1c: 2300 movs r3, #0 uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 8008a1e: 4a08 ldr r2, [pc, #32] ; (8008a40 ) pQueue->data = pQueue->head = pQueue->tail = 0; 8008a20: 6063 str r3, [r4, #4] 8008a22: 6023 str r3, [r4, #0] 8008a24: 60a3 str r3, [r4, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008a26: 4907 ldr r1, [pc, #28] ; (8008a44 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 8008a28: f8a2 3400 strh.w r3, [r2, #1024] ; 0x400 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008a2c: 4806 ldr r0, [pc, #24] ; (8008a48 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 8008a2e: f8a2 3402 strh.w r3, [r2, #1026] ; 0x402 { //_Error_Handler(__FILE__, __LINE__); } //HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1); //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1); } 8008a32: e8bd 4010 ldmia.w sp!, {r4, lr} if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008a36: 2201 movs r2, #1 8008a38: f7fe bab2 b.w 8006fa0 8008a3c: 2000024c .word 0x2000024c 8008a40: 20000fd0 .word 0x20000fd0 8008a44: 20000bd0 .word 0x20000bd0 8008a48: 20000700 .word 0x20000700 08008a4c : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a4c: 4a14 ldr r2, [pc, #80] ; (8008aa0 ) { 8008a4e: b538 push {r3, r4, r5, lr} uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a50: 6810 ldr r0, [r2, #0] 8008a52: 1c43 adds r3, r0, #1 8008a54: 6013 str r3, [r2, #0] 8008a56: 4b13 ldr r3, [pc, #76] ; (8008aa4 ) 8008a58: 6859 ldr r1, [r3, #4] 8008a5a: f103 040c add.w r4, r3, #12 8008a5e: 5d0d ldrb r5, [r1, r4] 8008a60: 4c11 ldr r4, [pc, #68] ; (8008aa8 ) #ifdef DEBUG_PRINT printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; #endif /* DEBUG_PRINT */ pQueue->tail++; 8008a62: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a64: f5b1 6f80 cmp.w r1, #1024 ; 0x400 uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a68: 5425 strb r5, [r4, r0] 8008a6a: 4614 mov r4, r2 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a6c: bfa8 it ge 8008a6e: 2200 movge r2, #0 pQueue->data--; 8008a70: 689d ldr r5, [r3, #8] pQueue->tail++; 8008a72: bfb8 it lt 8008a74: 6059 strlt r1, [r3, #4] pQueue->data--; 8008a76: f105 35ff add.w r5, r5, #4294967295 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a7a: bfa8 it ge 8008a7c: 605a strge r2, [r3, #4] pQueue->data--; 8008a7e: 609d str r5, [r3, #8] if(pQueue->data == 0){ 8008a80: b96d cbnz r5, 8008a9e // printf("data cnt zero !!! \r\n"); RF_Ctrl_Main(&uart_buf[Header]); 8008a82: 4809 ldr r0, [pc, #36] ; (8008aa8 ) 8008a84: f000 fd9e bl 80095c4 #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 8008a88: 6822 ldr r2, [r4, #0] 8008a8a: 4629 mov r1, r5 8008a8c: 4806 ldr r0, [pc, #24] ; (8008aa8 ) 8008a8e: f000 fe42 bl 8009716 // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 8008a92: 6025 str r5, [r4, #0] HAL_Delay(1); 8008a94: 2001 movs r0, #1 } } 8008a96: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_Delay(1); 8008a9a: f7fc bd27 b.w 80054ec 8008a9e: bd38 pop {r3, r4, r5, pc} 8008aa0: 20000464 .word 0x20000464 8008aa4: 20000bc4 .word 0x20000bc4 8008aa8: 200007c4 .word 0x200007c4 08008aac : AdcTimerCnt = UartRxTimerCnt = 0; 8008aac: 2300 movs r3, #0 8008aae: 4a0f ldr r2, [pc, #60] ; (8008aec ) { 8008ab0: b510 push {r4, lr} AdcTimerCnt = UartRxTimerCnt = 0; 8008ab2: 6013 str r3, [r2, #0] pQueue->head++; 8008ab4: 4c0e ldr r4, [pc, #56] ; (8008af0 ) AdcTimerCnt = UartRxTimerCnt = 0; 8008ab6: 4a0f ldr r2, [pc, #60] ; (8008af4 ) 8008ab8: 6013 str r3, [r2, #0] pQueue->head++; 8008aba: 6822 ldr r2, [r4, #0] 8008abc: 3201 adds r2, #1 8008abe: f5b2 6f80 cmp.w r2, #1024 ; 0x400 8008ac2: bfb8 it lt 8008ac4: 4613 movlt r3, r2 8008ac6: 6023 str r3, [r4, #0] pQueue->data++; 8008ac8: 68a3 ldr r3, [r4, #8] 8008aca: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008acc: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 8008ad0: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008ad2: db01 blt.n 8008ad8 GetDataFromUartQueue(huart); 8008ad4: f7ff ffba bl 8008a4c HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008ad8: 6823 ldr r3, [r4, #0] 8008ada: 4907 ldr r1, [pc, #28] ; (8008af8 ) 8008adc: 2201 movs r2, #1 } 8008ade: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008ae2: 4419 add r1, r3 8008ae4: 4805 ldr r0, [pc, #20] ; (8008afc ) 8008ae6: f7fe ba5b b.w 8006fa0 8008aea: bf00 nop 8008aec: 2000045c .word 0x2000045c 8008af0: 20000bc4 .word 0x20000bc4 8008af4: 20000450 .word 0x20000450 8008af8: 20000bd0 .word 0x20000bd0 8008afc: 20000700 .word 0x20000700 08008b00 : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ 8008b00: b508 push {r3, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 8008b02: 78c3 ldrb r3, [r0, #3] 8008b04: 7881 ldrb r1, [r0, #2] 8008b06: 5cc2 ldrb r2, [r0, r3] 8008b08: 3001 adds r0, #1 8008b0a: f7fe fd72 bl 80075f2 // printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); } // printf("CRC Result : \"%d\" \r\n",ret); return ret; } 8008b0e: 3000 adds r0, #0 8008b10: bf18 it ne 8008b12: 2001 movne r0, #1 8008b14: bd08 pop {r3, pc} ... 08008b18 : PLL_EN_3_5G_L_GPIO_Port, PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b18: 23be movs r3, #190 ; 0xbe void RF_Status_Get(void){ 8008b1a: b510 push {r4, lr} Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b1c: 4c0b ldr r4, [pc, #44] ; (8008b4c ) Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008b1e: 2160 movs r1, #96 ; 0x60 Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b20: 7023 strb r3, [r4, #0] Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; 8008b22: 2302 movs r3, #2 8008b24: 7063 strb r3, [r4, #1] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008b26: 2361 movs r3, #97 ; 0x61 Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b28: 1c60 adds r0, r4, #1 Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008b2a: 70a1 strb r1, [r4, #2] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008b2c: 70e3 strb r3, [r4, #3] Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b2e: f7fe fd45 bl 80075bc Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008b32: 23eb movs r3, #235 ; 0xeb Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b34: f884 0061 strb.w r0, [r4, #97] ; 0x61 Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008b38: f884 3062 strb.w r3, [r4, #98] ; 0x62 HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008b3c: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008b3e: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008b42: 2263 movs r2, #99 ; 0x63 8008b44: 4802 ldr r0, [pc, #8] ; (8008b50 ) 8008b46: f7fe b9f1 b.w 8006f2c 8008b4a: bf00 nop 8008b4c: 200005e3 .word 0x200005e3 8008b50: 20000700 .word 0x20000700 08008b54 : static uint8_t Ack_Buf[6]; void RF_Status_Ack(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b54: 23be movs r3, #190 ; 0xbe void RF_Status_Ack(void){ 8008b56: b510 push {r4, lr} Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b58: 4c0a ldr r4, [pc, #40] ; (8008b84 ) Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008b5a: 2103 movs r1, #3 Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b5c: 7023 strb r3, [r4, #0] Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008b5e: 2304 movs r3, #4 Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b60: 1c60 adds r0, r4, #1 Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008b62: 7063 strb r3, [r4, #1] Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008b64: 70a1 strb r1, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; 8008b66: 70e3 strb r3, [r4, #3] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b68: f7fe fd28 bl 80075bc Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b6c: 23eb movs r3, #235 ; 0xeb HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b6e: 78a2 ldrb r2, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b70: 7120 strb r0, [r4, #4] Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b72: 7163 strb r3, [r4, #5] HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b74: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008b76: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b7a: 3203 adds r2, #3 8008b7c: 4802 ldr r0, [pc, #8] ; (8008b88 ) 8008b7e: f7fe b9d5 b.w 8006f2c 8008b82: bf00 nop 8008b84: 20000468 .word 0x20000468 8008b88: 20000700 .word 0x20000700 08008b8c : void RF_Operate(uint8_t* data_buf){ 8008b8c: b570 push {r4, r5, r6, lr} uint32_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; // printf("Prev_data[INDEX_ATT_1_8G_DL1] : %x data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]); if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b8e: 4db5 ldr r5, [pc, #724] ; (8008e64 ) 8008b90: 7902 ldrb r2, [r0, #4] 8008b92: 792b ldrb r3, [r5, #4] void RF_Operate(uint8_t* data_buf){ 8008b94: b0a8 sub sp, #160 ; 0xa0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b96: 4293 cmp r3, r2 void RF_Operate(uint8_t* data_buf){ 8008b98: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b9a: d00c beq.n 8008bb6 BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008b9c: 4bb2 ldr r3, [pc, #712] ; (8008e68 ) 8008b9e: 9202 str r2, [sp, #8] 8008ba0: f103 0210 add.w r2, r3, #16 8008ba4: e892 0003 ldmia.w r2, {r0, r1} 8008ba8: e88d 0003 stmia.w sp, {r0, r1} 8008bac: cb0f ldmia r3, {r0, r1, r2, r3} 8008bae: f7fe fc0d bl 80073cc Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 8008bb2: 7923 ldrb r3, [r4, #4] 8008bb4: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 8008bb6: 7962 ldrb r2, [r4, #5] 8008bb8: 796b ldrb r3, [r5, #5] 8008bba: 4293 cmp r3, r2 8008bbc: d00c beq.n 8008bd8 BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008bbe: 4bab ldr r3, [pc, #684] ; (8008e6c ) 8008bc0: 9202 str r2, [sp, #8] 8008bc2: f103 0210 add.w r2, r3, #16 8008bc6: e892 0003 ldmia.w r2, {r0, r1} 8008bca: e88d 0003 stmia.w sp, {r0, r1} 8008bce: cb0f ldmia r3, {r0, r1, r2, r3} 8008bd0: f7fe fbfc bl 80073cc Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 8008bd4: 7963 ldrb r3, [r4, #5] 8008bd6: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 8008bd8: 79a2 ldrb r2, [r4, #6] 8008bda: 79ab ldrb r3, [r5, #6] 8008bdc: 4293 cmp r3, r2 8008bde: d00c beq.n 8008bfa BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008be0: 4ba3 ldr r3, [pc, #652] ; (8008e70 ) 8008be2: 9202 str r2, [sp, #8] 8008be4: f103 0210 add.w r2, r3, #16 8008be8: e892 0003 ldmia.w r2, {r0, r1} 8008bec: e88d 0003 stmia.w sp, {r0, r1} 8008bf0: cb0f ldmia r3, {r0, r1, r2, r3} 8008bf2: f7fe fbeb bl 80073cc Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 8008bf6: 79a3 ldrb r3, [r4, #6] 8008bf8: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 8008bfa: 79e2 ldrb r2, [r4, #7] 8008bfc: 79eb ldrb r3, [r5, #7] 8008bfe: 4293 cmp r3, r2 8008c00: d00c beq.n 8008c1c BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008c02: 4b9c ldr r3, [pc, #624] ; (8008e74 ) 8008c04: 9202 str r2, [sp, #8] 8008c06: f103 0210 add.w r2, r3, #16 8008c0a: e892 0003 ldmia.w r2, {r0, r1} 8008c0e: e88d 0003 stmia.w sp, {r0, r1} 8008c12: cb0f ldmia r3, {r0, r1, r2, r3} 8008c14: f7fe fbda bl 80073cc Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 8008c18: 79e3 ldrb r3, [r4, #7] 8008c1a: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 8008c1c: 7a22 ldrb r2, [r4, #8] 8008c1e: 7a2b ldrb r3, [r5, #8] 8008c20: 4293 cmp r3, r2 8008c22: d00c beq.n 8008c3e BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008c24: 4b94 ldr r3, [pc, #592] ; (8008e78 ) 8008c26: 9202 str r2, [sp, #8] 8008c28: f103 0210 add.w r2, r3, #16 8008c2c: e892 0003 ldmia.w r2, {r0, r1} 8008c30: e88d 0003 stmia.w sp, {r0, r1} 8008c34: cb0f ldmia r3, {r0, r1, r2, r3} 8008c36: f7fe fbc9 bl 80073cc Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 8008c3a: 7a23 ldrb r3, [r4, #8] 8008c3c: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 8008c3e: 7a62 ldrb r2, [r4, #9] 8008c40: 7a6b ldrb r3, [r5, #9] 8008c42: 4293 cmp r3, r2 8008c44: d00c beq.n 8008c60 BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008c46: 4b8d ldr r3, [pc, #564] ; (8008e7c ) 8008c48: 9202 str r2, [sp, #8] 8008c4a: f103 0210 add.w r2, r3, #16 8008c4e: e892 0003 ldmia.w r2, {r0, r1} 8008c52: e88d 0003 stmia.w sp, {r0, r1} 8008c56: cb0f ldmia r3, {r0, r1, r2, r3} 8008c58: f7fe fbb8 bl 80073cc Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 8008c5c: 7a63 ldrb r3, [r4, #9] 8008c5e: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 8008c60: 7aa2 ldrb r2, [r4, #10] 8008c62: 7aab ldrb r3, [r5, #10] 8008c64: 4293 cmp r3, r2 8008c66: d00c beq.n 8008c82 BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008c68: 4b85 ldr r3, [pc, #532] ; (8008e80 ) 8008c6a: 9202 str r2, [sp, #8] 8008c6c: f103 0210 add.w r2, r3, #16 8008c70: e892 0003 ldmia.w r2, {r0, r1} 8008c74: e88d 0003 stmia.w sp, {r0, r1} 8008c78: cb0f ldmia r3, {r0, r1, r2, r3} 8008c7a: f7fe fba7 bl 80073cc Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 8008c7e: 7aa3 ldrb r3, [r4, #10] 8008c80: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 8008c82: 7ae2 ldrb r2, [r4, #11] 8008c84: 7aeb ldrb r3, [r5, #11] 8008c86: 4293 cmp r3, r2 8008c88: d00c beq.n 8008ca4 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008c8a: 4b7e ldr r3, [pc, #504] ; (8008e84 ) 8008c8c: 9202 str r2, [sp, #8] 8008c8e: f103 0210 add.w r2, r3, #16 8008c92: e892 0003 ldmia.w r2, {r0, r1} 8008c96: e88d 0003 stmia.w sp, {r0, r1} 8008c9a: cb0f ldmia r3, {r0, r1, r2, r3} 8008c9c: f7fe fb96 bl 80073cc Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008ca0: 7ae3 ldrb r3, [r4, #11] 8008ca2: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008ca4: 7b22 ldrb r2, [r4, #12] 8008ca6: 7b2b ldrb r3, [r5, #12] 8008ca8: 4293 cmp r3, r2 8008caa: d00c beq.n 8008cc6 BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008cac: 4b76 ldr r3, [pc, #472] ; (8008e88 ) 8008cae: 9202 str r2, [sp, #8] 8008cb0: f103 0210 add.w r2, r3, #16 8008cb4: e892 0003 ldmia.w r2, {r0, r1} 8008cb8: e88d 0003 stmia.w sp, {r0, r1} 8008cbc: cb0f ldmia r3, {r0, r1, r2, r3} 8008cbe: f7fe fb85 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008cc2: 7b23 ldrb r3, [r4, #12] 8008cc4: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 8008cc6: 7b62 ldrb r2, [r4, #13] 8008cc8: 7b6b ldrb r3, [r5, #13] 8008cca: 4293 cmp r3, r2 8008ccc: d00c beq.n 8008ce8 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008cce: 4b6f ldr r3, [pc, #444] ; (8008e8c ) 8008cd0: 9202 str r2, [sp, #8] 8008cd2: f103 0210 add.w r2, r3, #16 8008cd6: e892 0003 ldmia.w r2, {r0, r1} 8008cda: e88d 0003 stmia.w sp, {r0, r1} 8008cde: cb0f ldmia r3, {r0, r1, r2, r3} 8008ce0: f7fe fb74 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008ce4: 7b63 ldrb r3, [r4, #13] 8008ce6: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 8008ce8: 7ba2 ldrb r2, [r4, #14] 8008cea: 7bab ldrb r3, [r5, #14] 8008cec: 4293 cmp r3, r2 8008cee: d00c beq.n 8008d0a BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008cf0: 4b67 ldr r3, [pc, #412] ; (8008e90 ) 8008cf2: 9202 str r2, [sp, #8] 8008cf4: f103 0210 add.w r2, r3, #16 8008cf8: e892 0003 ldmia.w r2, {r0, r1} 8008cfc: e88d 0003 stmia.w sp, {r0, r1} 8008d00: cb0f ldmia r3, {r0, r1, r2, r3} 8008d02: f7fe fb63 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 8008d06: 7ba3 ldrb r3, [r4, #14] 8008d08: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 8008d0a: 7be2 ldrb r2, [r4, #15] 8008d0c: 7beb ldrb r3, [r5, #15] 8008d0e: 4293 cmp r3, r2 8008d10: d00c beq.n 8008d2c BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008d12: 4b60 ldr r3, [pc, #384] ; (8008e94 ) 8008d14: 9202 str r2, [sp, #8] 8008d16: f103 0210 add.w r2, r3, #16 8008d1a: e892 0003 ldmia.w r2, {r0, r1} 8008d1e: e88d 0003 stmia.w sp, {r0, r1} 8008d22: cb0f ldmia r3, {r0, r1, r2, r3} 8008d24: f7fe fb52 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 8008d28: 7be3 ldrb r3, [r4, #15] 8008d2a: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1]) 8008d2c: 7c23 ldrb r3, [r4, #16] 8008d2e: 7c2a ldrb r2, [r5, #16] 8008d30: 429a cmp r2, r3 8008d32: d113 bne.n 8008d5c ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1]) 8008d34: 7c69 ldrb r1, [r5, #17] 8008d36: 7c62 ldrb r2, [r4, #17] 8008d38: 4291 cmp r1, r2 8008d3a: d10f bne.n 8008d5c ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 8008d3c: 7ca9 ldrb r1, [r5, #18] 8008d3e: 7ca2 ldrb r2, [r4, #18] 8008d40: 4291 cmp r1, r2 8008d42: d10b bne.n 8008d5c ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2]) 8008d44: 7ce9 ldrb r1, [r5, #19] 8008d46: 7ce2 ldrb r2, [r4, #19] 8008d48: 4291 cmp r1, r2 8008d4a: d107 bne.n 8008d5c ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2]) 8008d4c: 7d29 ldrb r1, [r5, #20] 8008d4e: 7d22 ldrb r2, [r4, #20] 8008d50: 4291 cmp r1, r2 8008d52: d103 bne.n 8008d5c ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 8008d54: 7d69 ldrb r1, [r5, #21] 8008d56: 7d62 ldrb r2, [r4, #21] 8008d58: 4291 cmp r1, r2 8008d5a: d020 beq.n 8008d9e ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1] = data_buf[INDEX_ATT_3_5G_LOW1]; 8008d5c: 4e4e ldr r6, [pc, #312] ; (8008e98 ) 8008d5e: 742b strb r3, [r5, #16] 8008d60: 7633 strb r3, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008d62: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d64: 2298 movs r2, #152 ; 0x98 ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008d66: 746b strb r3, [r5, #17] 8008d68: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d6c: 7ca3 ldrb r3, [r4, #18] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d6e: f106 0110 add.w r1, r6, #16 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d72: 74ab strb r3, [r5, #18] 8008d74: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008d78: 7ce3 ldrb r3, [r4, #19] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d7a: 4668 mov r0, sp ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008d7c: 74eb strb r3, [r5, #19] 8008d7e: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; 8008d82: 7d23 ldrb r3, [r4, #20] 8008d84: 752b strb r3, [r5, #20] 8008d86: f886 3088 strb.w r3, [r6, #136] ; 0x88 ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008d8a: 7d63 ldrb r3, [r4, #21] 8008d8c: 756b strb r3, [r5, #21] 8008d8e: f886 30a4 strb.w r3, [r6, #164] ; 0xa4 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d92: f000 fcb5 bl 8009700 8008d96: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008d9a: f7fe fc59 bl 8007650 } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 8008d9e: 7da3 ldrb r3, [r4, #22] 8008da0: 7daa ldrb r2, [r5, #22] 8008da2: 429a cmp r2, r3 8008da4: d103 bne.n 8008dae || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008da6: 7de9 ldrb r1, [r5, #23] 8008da8: 7de2 ldrb r2, [r4, #23] 8008daa: 4291 cmp r1, r2 8008dac: d035 beq.n 8008e1a ){ Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H]; 8008dae: 75ab strb r3, [r5, #22] Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L]; 8008db0: 7de3 ldrb r3, [r4, #23] 8008db2: 75eb strb r3, [r5, #23] // printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]); // printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]); temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); 8008db4: 7da0 ldrb r0, [r4, #22] 8008db6: 7de3 ldrb r3, [r4, #23] 8008db8: ea43 2300 orr.w r3, r3, r0, lsl #8 ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008dbc: 4837 ldr r0, [pc, #220] ; (8008e9c ) 8008dbe: 4358 muls r0, r3 8008dc0: f7ff fbcc bl 800855c 8008dc4: 4a36 ldr r2, [pc, #216] ; (8008ea0 ) 8008dc6: 4b37 ldr r3, [pc, #220] ; (8008ea4 ) 8008dc8: 9204 str r2, [sp, #16] 8008dca: f44f 6282 mov.w r2, #1040 ; 0x410 8008dce: 9003 str r0, [sp, #12] 8008dd0: 9202 str r2, [sp, #8] 8008dd2: f103 0210 add.w r2, r3, #16 8008dd6: e892 0003 ldmia.w r2, {r0, r1} 8008dda: e88d 0003 stmia.w sp, {r0, r1} 8008dde: cb0f ldmia r3, {r0, r1, r2, r3} 8008de0: f7ff fbd0 bl 8008584 HAL_Delay(1); 8008de4: 2001 movs r0, #1 8008de6: f7fc fb81 bl 80054ec BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008dea: 7922 ldrb r2, [r4, #4] 8008dec: 4b1e ldr r3, [pc, #120] ; (8008e68 ) 8008dee: 9202 str r2, [sp, #8] 8008df0: f103 0210 add.w r2, r3, #16 8008df4: e892 0003 ldmia.w r2, {r0, r1} 8008df8: e88d 0003 stmia.w sp, {r0, r1} 8008dfc: cb0f ldmia r3, {r0, r1, r2, r3} 8008dfe: f7fe fae5 bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008e02: 4b1a ldr r3, [pc, #104] ; (8008e6c ) 8008e04: 7962 ldrb r2, [r4, #5] 8008e06: 9202 str r2, [sp, #8] 8008e08: f103 0210 add.w r2, r3, #16 8008e0c: e892 0003 ldmia.w r2, {r0, r1} 8008e10: e88d 0003 stmia.w sp, {r0, r1} 8008e14: cb0f ldmia r3, {r0, r1, r2, r3} 8008e16: f7fe fad9 bl 80073cc } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 8008e1a: 7e23 ldrb r3, [r4, #24] 8008e1c: 7e2a ldrb r2, [r5, #24] 8008e1e: 7e60 ldrb r0, [r4, #25] 8008e20: 429a cmp r2, r3 8008e22: d102 bne.n 8008e2a || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 8008e24: 7e6a ldrb r2, [r5, #25] 8008e26: 4282 cmp r2, r0 8008e28: d070 beq.n 8008f0c temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); // printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]); // printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]); Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H]; 8008e2a: 762b strb r3, [r5, #24] Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L]; 8008e2c: 7668 strb r0, [r5, #25] temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); 8008e2e: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008e32: 4b1a ldr r3, [pc, #104] ; (8008e9c ) 8008e34: 4358 muls r0, r3 8008e36: f7ff fb91 bl 800855c 8008e3a: 4a19 ldr r2, [pc, #100] ; (8008ea0 ) 8008e3c: 4b1a ldr r3, [pc, #104] ; (8008ea8 ) 8008e3e: 9204 str r2, [sp, #16] 8008e40: f44f 6282 mov.w r2, #1040 ; 0x410 8008e44: 9003 str r0, [sp, #12] 8008e46: 9202 str r2, [sp, #8] 8008e48: f103 0210 add.w r2, r3, #16 8008e4c: e892 0003 ldmia.w r2, {r0, r1} 8008e50: e88d 0003 stmia.w sp, {r0, r1} 8008e54: cb0f ldmia r3, {r0, r1, r2, r3} 8008e56: f7ff fb95 bl 8008584 HAL_Delay(1); 8008e5a: 2001 movs r0, #1 8008e5c: f7fc fb46 bl 80054ec 8008e60: e024 b.n 8008eac 8008e62: bf00 nop 8008e64: 200005e3 .word 0x200005e3 8008e68: 20000008 .word 0x20000008 8008e6c: 20000020 .word 0x20000020 8008e70: 20000038 .word 0x20000038 8008e74: 20000050 .word 0x20000050 8008e78: 20000068 .word 0x20000068 8008e7c: 20000080 .word 0x20000080 8008e80: 20000098 .word 0x20000098 8008e84: 200000b0 .word 0x200000b0 8008e88: 200000c8 .word 0x200000c8 8008e8c: 200000e0 .word 0x200000e0 8008e90: 200000f8 .word 0x200000f8 8008e94: 20000110 .word 0x20000110 8008e98: 200004d8 .word 0x200004d8 8008e9c: 000186a0 .word 0x000186a0 8008ea0: 009f8092 .word 0x009f8092 8008ea4: 200001b8 .word 0x200001b8 8008ea8: 200001d0 .word 0x200001d0 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008eac: 79a2 ldrb r2, [r4, #6] 8008eae: 4bc5 ldr r3, [pc, #788] ; (80091c4 ) 8008eb0: 9202 str r2, [sp, #8] 8008eb2: f103 0210 add.w r2, r3, #16 8008eb6: e892 0003 ldmia.w r2, {r0, r1} 8008eba: e88d 0003 stmia.w sp, {r0, r1} 8008ebe: cb0f ldmia r3, {r0, r1, r2, r3} 8008ec0: f7fe fa84 bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008ec4: 79e2 ldrb r2, [r4, #7] 8008ec6: 4bc0 ldr r3, [pc, #768] ; (80091c8 ) 8008ec8: 9202 str r2, [sp, #8] 8008eca: f103 0210 add.w r2, r3, #16 8008ece: e892 0003 ldmia.w r2, {r0, r1} 8008ed2: e88d 0003 stmia.w sp, {r0, r1} 8008ed6: cb0f ldmia r3, {r0, r1, r2, r3} 8008ed8: f7fe fa78 bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008edc: 7a22 ldrb r2, [r4, #8] 8008ede: 4bbb ldr r3, [pc, #748] ; (80091cc ) 8008ee0: 9202 str r2, [sp, #8] 8008ee2: f103 0210 add.w r2, r3, #16 8008ee6: e892 0003 ldmia.w r2, {r0, r1} 8008eea: e88d 0003 stmia.w sp, {r0, r1} 8008eee: cb0f ldmia r3, {r0, r1, r2, r3} 8008ef0: f7fe fa6c bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008ef4: 4bb6 ldr r3, [pc, #728] ; (80091d0 ) 8008ef6: 7a62 ldrb r2, [r4, #9] 8008ef8: 9202 str r2, [sp, #8] 8008efa: f103 0210 add.w r2, r3, #16 8008efe: e892 0003 ldmia.w r2, {r0, r1} 8008f02: e88d 0003 stmia.w sp, {r0, r1} 8008f06: cb0f ldmia r3, {r0, r1, r2, r3} 8008f08: f7fe fa60 bl 80073cc } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) 8008f0c: 7ea3 ldrb r3, [r4, #26] 8008f0e: 7eaa ldrb r2, [r5, #26] 8008f10: 7ee0 ldrb r0, [r4, #27] 8008f12: 429a cmp r2, r3 8008f14: d102 bne.n 8008f1c || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ 8008f16: 7eea ldrb r2, [r5, #27] 8008f18: 4282 cmp r2, r0 8008f1a: d032 beq.n 8008f82 temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); // printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]); // printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]); Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H]; 8008f1c: 76ab strb r3, [r5, #26] Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L]; 8008f1e: 76e8 strb r0, [r5, #27] temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); 8008f20: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092); ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008f24: 4bab ldr r3, [pc, #684] ; (80091d4 ) 8008f26: 4358 muls r0, r3 8008f28: f7ff fb18 bl 800855c 8008f2c: 4aaa ldr r2, [pc, #680] ; (80091d8 ) 8008f2e: 4bab ldr r3, [pc, #684] ; (80091dc ) 8008f30: 9204 str r2, [sp, #16] 8008f32: f44f 6282 mov.w r2, #1040 ; 0x410 8008f36: 9003 str r0, [sp, #12] 8008f38: 9202 str r2, [sp, #8] 8008f3a: f103 0210 add.w r2, r3, #16 8008f3e: e892 0003 ldmia.w r2, {r0, r1} 8008f42: e88d 0003 stmia.w sp, {r0, r1} 8008f46: cb0f ldmia r3, {r0, r1, r2, r3} 8008f48: f7ff fb1c bl 8008584 HAL_Delay(1); 8008f4c: 2001 movs r0, #1 8008f4e: f7fc facd bl 80054ec BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008f52: 7aa2 ldrb r2, [r4, #10] 8008f54: 4ba2 ldr r3, [pc, #648] ; (80091e0 ) 8008f56: 9202 str r2, [sp, #8] 8008f58: f103 0210 add.w r2, r3, #16 8008f5c: e892 0003 ldmia.w r2, {r0, r1} 8008f60: e88d 0003 stmia.w sp, {r0, r1} 8008f64: cb0f ldmia r3, {r0, r1, r2, r3} 8008f66: f7fe fa31 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008f6a: 4b9e ldr r3, [pc, #632] ; (80091e4 ) 8008f6c: 7ae2 ldrb r2, [r4, #11] 8008f6e: 9202 str r2, [sp, #8] 8008f70: f103 0210 add.w r2, r3, #16 8008f74: e892 0003 ldmia.w r2, {r0, r1} 8008f78: e88d 0003 stmia.w sp, {r0, r1} 8008f7c: cb0f ldmia r3, {r0, r1, r2, r3} 8008f7e: f7fe fa25 bl 80073cc } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) 8008f82: 7f23 ldrb r3, [r4, #28] 8008f84: 7f2a ldrb r2, [r5, #28] 8008f86: 429a cmp r2, r3 8008f88: d103 bne.n 8008f92 || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ 8008f8a: 7f69 ldrb r1, [r5, #29] 8008f8c: 7f62 ldrb r2, [r4, #29] 8008f8e: 4291 cmp r1, r2 8008f90: d04d beq.n 800902e Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H]; 8008f92: 772b strb r3, [r5, #28] Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L]; 8008f94: 7f63 ldrb r3, [r4, #29] 8008f96: 776b strb r3, [r5, #29] // printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]); // printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]); temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); 8008f98: 7f20 ldrb r0, [r4, #28] 8008f9a: 7f63 ldrb r3, [r4, #29] 8008f9c: ea43 2300 orr.w r3, r3, r0, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008fa0: 488c ldr r0, [pc, #560] ; (80091d4 ) 8008fa2: 4358 muls r0, r3 8008fa4: f7ff fada bl 800855c 8008fa8: 4a8b ldr r2, [pc, #556] ; (80091d8 ) 8008faa: 4b8f ldr r3, [pc, #572] ; (80091e8 ) 8008fac: 9204 str r2, [sp, #16] 8008fae: f44f 6282 mov.w r2, #1040 ; 0x410 8008fb2: 9003 str r0, [sp, #12] 8008fb4: 9202 str r2, [sp, #8] 8008fb6: f103 0210 add.w r2, r3, #16 8008fba: e892 0003 ldmia.w r2, {r0, r1} 8008fbe: e88d 0003 stmia.w sp, {r0, r1} 8008fc2: cb0f ldmia r3, {r0, r1, r2, r3} 8008fc4: f7ff fade bl 8008584 HAL_Delay(1); 8008fc8: 2001 movs r0, #1 8008fca: f7fc fa8f bl 80054ec BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008fce: 7b22 ldrb r2, [r4, #12] 8008fd0: 4b86 ldr r3, [pc, #536] ; (80091ec ) 8008fd2: 9202 str r2, [sp, #8] 8008fd4: f103 0210 add.w r2, r3, #16 8008fd8: e892 0003 ldmia.w r2, {r0, r1} 8008fdc: e88d 0003 stmia.w sp, {r0, r1} 8008fe0: cb0f ldmia r3, {r0, r1, r2, r3} 8008fe2: f7fe f9f3 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008fe6: 7b62 ldrb r2, [r4, #13] 8008fe8: 4b81 ldr r3, [pc, #516] ; (80091f0 ) 8008fea: 9202 str r2, [sp, #8] 8008fec: f103 0210 add.w r2, r3, #16 8008ff0: e892 0003 ldmia.w r2, {r0, r1} 8008ff4: e88d 0003 stmia.w sp, {r0, r1} 8008ff8: cb0f ldmia r3, {r0, r1, r2, r3} 8008ffa: f7fe f9e7 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008ffe: 7ba2 ldrb r2, [r4, #14] 8009000: 4b7c ldr r3, [pc, #496] ; (80091f4 ) 8009002: 9202 str r2, [sp, #8] 8009004: f103 0210 add.w r2, r3, #16 8009008: e892 0003 ldmia.w r2, {r0, r1} 800900c: e88d 0003 stmia.w sp, {r0, r1} 8009010: cb0f ldmia r3, {r0, r1, r2, r3} 8009012: f7fe f9db bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8009016: 4b78 ldr r3, [pc, #480] ; (80091f8 ) 8009018: 7be2 ldrb r2, [r4, #15] 800901a: 9202 str r2, [sp, #8] 800901c: f103 0210 add.w r2, r3, #16 8009020: e892 0003 ldmia.w r2, {r0, r1} 8009024: e88d 0003 stmia.w sp, {r0, r1} 8009028: cb0f ldmia r3, {r0, r1, r2, r3} 800902a: f7fe f9cf bl 80073cc } if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H]) 800902e: 7fa3 ldrb r3, [r4, #30] 8009030: 7faa ldrb r2, [r5, #30] 8009032: 429a cmp r2, r3 8009034: d109 bne.n 800904a ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M]) 8009036: 7fe9 ldrb r1, [r5, #31] 8009038: 7fe2 ldrb r2, [r4, #31] 800903a: 4291 cmp r1, r2 800903c: d105 bne.n 800904a || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){ 800903e: f895 1020 ldrb.w r1, [r5, #32] 8009042: f894 2020 ldrb.w r2, [r4, #32] 8009046: 4291 cmp r1, r2 8009048: d031 beq.n 80090ae Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H]; 800904a: 77ab strb r3, [r5, #30] Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 800904c: 7fe3 ldrb r3, [r4, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | (data_buf[INDEX_PLL_3_5G_LOW_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 800904e: 2100 movs r1, #0 Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 8009050: 77eb strb r3, [r5, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; 8009052: f894 3020 ldrb.w r3, [r4, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009056: 4869 ldr r0, [pc, #420] ; (80091fc ) Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; 8009058: f885 3020 strb.w r3, [r5, #32] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 800905c: 7fe3 ldrb r3, [r4, #31] temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 800905e: 7fa2 ldrb r2, [r4, #30] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 8009060: 021b lsls r3, r3, #8 temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 8009062: ea43 4302 orr.w r3, r3, r2, lsl #16 (data_buf[INDEX_PLL_3_5G_LOW_L]); 8009066: f894 2020 ldrb.w r2, [r4, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 800906a: e9cd 0100 strd r0, r1, [sp] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 800906e: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009070: f241 3288 movw r2, #5000 ; 0x1388 8009074: 9203 str r2, [sp, #12] 8009076: 2202 movs r2, #2 8009078: 9202 str r2, [sp, #8] 800907a: f242 7210 movw r2, #10000 ; 0x2710 800907e: a826 add r0, sp, #152 ; 0x98 8009080: 435a muls r2, r3 8009082: 2300 movs r3, #0 8009084: f7fe fc3c bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8009088: 2203 movs r2, #3 800908a: 9205 str r2, [sp, #20] 800908c: f241 32c2 movw r2, #5058 ; 0x13c2 8009090: 9204 str r2, [sp, #16] 8009092: 9a26 ldr r2, [sp, #152] ; 0x98 8009094: 4b5a ldr r3, [pc, #360] ; (8009200 ) 8009096: 9203 str r2, [sp, #12] 8009098: 9a27 ldr r2, [sp, #156] ; 0x9c 800909a: 9202 str r2, [sp, #8] 800909c: f103 0210 add.w r2, r3, #16 80090a0: e892 0003 ldmia.w r2, {r0, r1} 80090a4: e88d 0003 stmia.w sp, {r0, r1} 80090a8: cb0f ldmia r3, {r0, r1, r2, r3} 80090aa: f7fe fcb7 bl 8007a1c } if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H]) 80090ae: f894 3021 ldrb.w r3, [r4, #33] ; 0x21 80090b2: f895 2021 ldrb.w r2, [r5, #33] ; 0x21 80090b6: 429a cmp r2, r3 80090b8: d10b bne.n 80090d2 || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M]) 80090ba: f895 1022 ldrb.w r1, [r5, #34] ; 0x22 80090be: f894 2022 ldrb.w r2, [r4, #34] ; 0x22 80090c2: 4291 cmp r1, r2 80090c4: d105 bne.n 80090d2 || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){ 80090c6: f895 1023 ldrb.w r1, [r5, #35] ; 0x23 80090ca: f894 2023 ldrb.w r2, [r4, #35] ; 0x23 80090ce: 4291 cmp r1, r2 80090d0: d036 beq.n 8009140 Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H]; 80090d2: f885 3021 strb.w r3, [r5, #33] ; 0x21 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 80090d6: f894 3022 ldrb.w r3, [r4, #34] ; 0x22 Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | (data_buf[INDEX_PLL_3_5G_HIGH_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80090da: 2100 movs r1, #0 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 80090dc: f885 3022 strb.w r3, [r5, #34] ; 0x22 Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; 80090e0: f894 3023 ldrb.w r3, [r4, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80090e4: 4845 ldr r0, [pc, #276] ; (80091fc ) Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; 80090e6: f885 3023 strb.w r3, [r5, #35] ; 0x23 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 80090ea: f894 3022 ldrb.w r3, [r4, #34] ; 0x22 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 80090ee: f894 2021 ldrb.w r2, [r4, #33] ; 0x21 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 80090f2: 021b lsls r3, r3, #8 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 80090f4: ea43 4302 orr.w r3, r3, r2, lsl #16 (data_buf[INDEX_PLL_3_5G_HIGH_L]); 80090f8: f894 2023 ldrb.w r2, [r4, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80090fc: e9cd 0100 strd r0, r1, [sp] (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 8009100: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009102: f241 3288 movw r2, #5000 ; 0x1388 8009106: 9203 str r2, [sp, #12] 8009108: 2202 movs r2, #2 800910a: 9202 str r2, [sp, #8] 800910c: f242 7210 movw r2, #10000 ; 0x2710 8009110: a826 add r0, sp, #152 ; 0x98 8009112: 435a muls r2, r3 8009114: 2300 movs r3, #0 8009116: f7fe fbf3 bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 800911a: 2203 movs r2, #3 800911c: 9205 str r2, [sp, #20] 800911e: f241 32c2 movw r2, #5058 ; 0x13c2 8009122: 9204 str r2, [sp, #16] 8009124: 9a26 ldr r2, [sp, #152] ; 0x98 8009126: 4b37 ldr r3, [pc, #220] ; (8009204 ) 8009128: 9203 str r2, [sp, #12] 800912a: 9a27 ldr r2, [sp, #156] ; 0x9c 800912c: 9202 str r2, [sp, #8] 800912e: f103 0210 add.w r2, r3, #16 8009132: e892 0003 ldmia.w r2, {r0, r1} 8009136: e88d 0003 stmia.w sp, {r0, r1} 800913a: cb0f ldmia r3, {r0, r1, r2, r3} 800913c: f7fe fc6e bl 8007a1c } if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){ } if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){ 8009140: f894 1043 ldrb.w r1, [r4, #67] ; 0x43 8009144: f895 3043 ldrb.w r3, [r5, #67] ; 0x43 8009148: 428b cmp r3, r1 800914a: d006 beq.n 800915a Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]); 800914c: 2043 movs r0, #67 ; 0x43 800914e: f7fe fe03 bl 8007d58 Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL]; 8009152: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8009156: f885 3043 strb.w r3, [r5, #67] ; 0x43 } if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){ 800915a: f894 1044 ldrb.w r1, [r4, #68] ; 0x44 800915e: f895 3044 ldrb.w r3, [r5, #68] ; 0x44 8009162: 428b cmp r3, r1 8009164: d006 beq.n 8009174 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]); 8009166: 2044 movs r0, #68 ; 0x44 8009168: f7fe fdf6 bl 8007d58 Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL]; 800916c: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 8009170: f885 3044 strb.w r3, [r5, #68] ; 0x44 } if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){ 8009174: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8009178: f895 3045 ldrb.w r3, [r5, #69] ; 0x45 800917c: 428b cmp r3, r1 800917e: d006 beq.n 800918e Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]); 8009180: 2045 movs r0, #69 ; 0x45 8009182: f7fe fde9 bl 8007d58 Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL]; 8009186: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 800918a: f885 3045 strb.w r3, [r5, #69] ; 0x45 } if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){ 800918e: f894 1046 ldrb.w r1, [r4, #70] ; 0x46 8009192: f895 3046 ldrb.w r3, [r5, #70] ; 0x46 8009196: 428b cmp r3, r1 8009198: d006 beq.n 80091a8 Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]); 800919a: 2046 movs r0, #70 ; 0x46 800919c: f7fe fddc bl 8007d58 Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL]; 80091a0: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 80091a4: f885 3046 strb.w r3, [r5, #70] ; 0x46 } if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){ 80091a8: f894 104a ldrb.w r1, [r4, #74] ; 0x4a 80091ac: f895 304a ldrb.w r3, [r5, #74] ; 0x4a 80091b0: 428b cmp r3, r1 80091b2: d029 beq.n 8009208 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]); 80091b4: 204a movs r0, #74 ; 0x4a 80091b6: f7fe fdcf bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L]; 80091ba: f894 304a ldrb.w r3, [r4, #74] ; 0x4a 80091be: f885 304a strb.w r3, [r5, #74] ; 0x4a 80091c2: e021 b.n 8009208 80091c4: 20000038 .word 0x20000038 80091c8: 20000050 .word 0x20000050 80091cc: 20000068 .word 0x20000068 80091d0: 20000080 .word 0x20000080 80091d4: 000186a0 .word 0x000186a0 80091d8: 009f8092 .word 0x009f8092 80091dc: 200001e8 .word 0x200001e8 80091e0: 20000098 .word 0x20000098 80091e4: 200000b0 .word 0x200000b0 80091e8: 20000200 .word 0x20000200 80091ec: 200000c8 .word 0x200000c8 80091f0: 200000e0 .word 0x200000e0 80091f4: 200000f8 .word 0x200000f8 80091f8: 20000110 .word 0x20000110 80091fc: 02625a00 .word 0x02625a00 8009200: 20000234 .word 0x20000234 8009204: 2000021c .word 0x2000021c } if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){ 8009208: f894 1049 ldrb.w r1, [r4, #73] ; 0x49 800920c: f895 3049 ldrb.w r3, [r5, #73] ; 0x49 8009210: 428b cmp r3, r1 8009212: d006 beq.n 8009222 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]); 8009214: 2049 movs r0, #73 ; 0x49 8009216: f7fe fd9f bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H]; 800921a: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 800921e: f885 3049 strb.w r3, [r5, #73] ; 0x49 } if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){ 8009222: f894 1047 ldrb.w r1, [r4, #71] ; 0x47 8009226: f895 3047 ldrb.w r3, [r5, #71] ; 0x47 800922a: 428b cmp r3, r1 800922c: d006 beq.n 800923c Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); 800922e: 2047 movs r0, #71 ; 0x47 8009230: f7fe fd92 bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; 8009234: f894 3047 ldrb.w r3, [r4, #71] ; 0x47 8009238: f885 3047 strb.w r3, [r5, #71] ; 0x47 } if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){ 800923c: f894 1048 ldrb.w r1, [r4, #72] ; 0x48 8009240: f895 3048 ldrb.w r3, [r5, #72] ; 0x48 8009244: 428b cmp r3, r1 8009246: d006 beq.n 8009256 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); 8009248: 2048 movs r0, #72 ; 0x48 800924a: f7fe fd85 bl 8007d58 Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; 800924e: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 8009252: f885 3048 strb.w r3, [r5, #72] ; 0x48 } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8009256: f894 104b ldrb.w r1, [r4, #75] ; 0x4b 800925a: f895 304b ldrb.w r3, [r5, #75] ; 0x4b 800925e: 428b cmp r3, r1 8009260: d045 beq.n 80092ee Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]); 8009262: 204b movs r0, #75 ; 0x4b 8009264: f7fe fd78 bl 8007d58 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8009268: f894 304b ldrb.w r3, [r4, #75] ; 0x4b HAL_Delay(1); 800926c: 2001 movs r0, #1 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 800926e: f885 304b strb.w r3, [r5, #75] ; 0x4b HAL_Delay(1); 8009272: f7fc f93b bl 80054ec // printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]); if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8009276: f894 304b ldrb.w r3, [r4, #75] ; 0x4b 800927a: 2b00 cmp r3, #0 800927c: d037 beq.n 80092ee #if 1 // PYJ.2019.08.12_BEGIN -- // temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | // (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | // (Prev_data[INDEX_PLL_3_5G_LOW_L]); temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 800927e: f895 3022 ldrb.w r3, [r5, #34] ; 0x22 temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 8009282: f895 2021 ldrb.w r2, [r5, #33] ; 0x21 (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8009286: 021b lsls r3, r3, #8 temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 8009288: ea43 4302 orr.w r3, r3, r2, lsl #16 (Prev_data[INDEX_PLL_3_5G_HIGH_L]); 800928c: f895 2023 ldrb.w r2, [r5, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009290: 2100 movs r1, #0 (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8009292: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009294: f241 3288 movw r2, #5000 ; 0x1388 8009298: 9203 str r2, [sp, #12] 800929a: 2202 movs r2, #2 800929c: 9202 str r2, [sp, #8] 800929e: f242 7210 movw r2, #10000 ; 0x2710 80092a2: 48c3 ldr r0, [pc, #780] ; (80095b0 ) 80092a4: 435a muls r2, r3 80092a6: e9cd 0100 strd r0, r1, [sp] 80092aa: 2300 movs r3, #0 80092ac: a826 add r0, sp, #152 ; 0x98 80092ae: f7fe fb27 bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80092b2: 2203 movs r2, #3 80092b4: 9205 str r2, [sp, #20] 80092b6: f241 32c2 movw r2, #5058 ; 0x13c2 80092ba: 9204 str r2, [sp, #16] 80092bc: 9a26 ldr r2, [sp, #152] ; 0x98 80092be: 4bbd ldr r3, [pc, #756] ; (80095b4 ) 80092c0: 9203 str r2, [sp, #12] 80092c2: 9a27 ldr r2, [sp, #156] ; 0x9c PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80092c4: 4ebc ldr r6, [pc, #752] ; (80095b8 ) ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80092c6: 9202 str r2, [sp, #8] 80092c8: f103 0210 add.w r2, r3, #16 80092cc: e892 0003 ldmia.w r2, {r0, r1} 80092d0: e88d 0003 stmia.w sp, {r0, r1} 80092d4: cb0f ldmia r3, {r0, r1, r2, r3} 80092d6: f7fe fba1 bl 8007a1c PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80092da: 2298 movs r2, #152 ; 0x98 80092dc: f106 0110 add.w r1, r6, #16 80092e0: 4668 mov r0, sp 80092e2: f000 fa0d bl 8009700 80092e6: e896 000f ldmia.w r6, {r0, r1, r2, r3} 80092ea: f7fe f9b1 bl 8007650 } } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 80092ee: f894 104c ldrb.w r1, [r4, #76] ; 0x4c 80092f2: f895 304c ldrb.w r3, [r5, #76] ; 0x4c 80092f6: 428b cmp r3, r1 80092f8: d043 beq.n 8009382 Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]); 80092fa: 204c movs r0, #76 ; 0x4c 80092fc: f7fe fd2c bl 8007d58