: { 8007e28: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8007e2c: 4db4 ldr r5, [pc, #720] ; (8008100 ) { 8007e2e: b095 sub sp, #84 ; 0x54 HAL_Init(); 8007e30: f7fd fb38 bl 80054a4 SystemClock_Config(); 8007e34: f7ff ffc2 bl 8007dbc GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007e38: 2210 movs r2, #16 8007e3a: 2100 movs r1, #0 8007e3c: a810 add r0, sp, #64 ; 0x40 8007e3e: f001 fb68 bl 8009512 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007e42: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007e44: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007e46: f043 0340 orr.w r3, r3, #64 ; 0x40 8007e4a: 61ab str r3, [r5, #24] 8007e4c: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007e4e: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 8007e50: f003 0340 and.w r3, r3, #64 ; 0x40 8007e54: 9309 str r3, [sp, #36] ; 0x24 8007e56: 9b09 ldr r3, [sp, #36] ; 0x24 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007e58: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007e5a: 48aa ldr r0, [pc, #680] ; (8008104 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8007e5c: f043 0310 orr.w r3, r3, #16 8007e60: 61ab str r3, [r5, #24] 8007e62: 69ab ldr r3, [r5, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e64: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007e66: f003 0310 and.w r3, r3, #16 8007e6a: 930a str r3, [sp, #40] ; 0x28 8007e6c: 9b0a ldr r3, [sp, #40] ; 0x28 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007e6e: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007e70: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007e72: f043 0380 orr.w r3, r3, #128 ; 0x80 8007e76: 61ab str r3, [r5, #24] 8007e78: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007e7a: 2702 movs r7, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007e7c: f003 0380 and.w r3, r3, #128 ; 0x80 8007e80: 930b str r3, [sp, #44] ; 0x2c 8007e82: 9b0b ldr r3, [sp, #44] ; 0x2c __HAL_RCC_GPIOA_CLK_ENABLE(); 8007e84: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8007e86: f04f 0b0c mov.w fp, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007e8a: f043 0304 orr.w r3, r3, #4 8007e8e: 61ab str r3, [r5, #24] 8007e90: 69ab ldr r3, [r5, #24] hadc1.Init.NbrOfConversion = 14; 8007e92: f04f 090e mov.w r9, #14 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007e96: f003 0304 and.w r3, r3, #4 8007e9a: 930c str r3, [sp, #48] ; 0x30 8007e9c: 9b0c ldr r3, [sp, #48] ; 0x30 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007e9e: 69ab ldr r3, [r5, #24] sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 8007ea0: f04f 0807 mov.w r8, #7 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007ea4: f043 0308 orr.w r3, r3, #8 8007ea8: 61ab str r3, [r5, #24] 8007eaa: 69ab ldr r3, [r5, #24] sConfig.Rank = ADC_REGULAR_RANK_3; 8007eac: f04f 0a03 mov.w sl, #3 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007eb0: f003 0308 and.w r3, r3, #8 8007eb4: 930d str r3, [sp, #52] ; 0x34 8007eb6: 9b0d ldr r3, [sp, #52] ; 0x34 __HAL_RCC_GPIOD_CLK_ENABLE(); 8007eb8: 69ab ldr r3, [r5, #24] 8007eba: f043 0320 orr.w r3, r3, #32 8007ebe: 61ab str r3, [r5, #24] 8007ec0: 69ab ldr r3, [r5, #24] 8007ec2: f003 0320 and.w r3, r3, #32 8007ec6: 930e str r3, [sp, #56] ; 0x38 8007ec8: 9b0e ldr r3, [sp, #56] ; 0x38 __HAL_RCC_GPIOG_CLK_ENABLE(); 8007eca: 69ab ldr r3, [r5, #24] 8007ecc: f443 7380 orr.w r3, r3, #256 ; 0x100 8007ed0: 61ab str r3, [r5, #24] 8007ed2: 69ab ldr r3, [r5, #24] 8007ed4: f403 7380 and.w r3, r3, #256 ; 0x100 8007ed8: 930f str r3, [sp, #60] ; 0x3c 8007eda: 9b0f ldr r3, [sp, #60] ; 0x3c HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007edc: f7fe f9fa bl 80062d4 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007ee0: 2200 movs r2, #0 8007ee2: f64f 41c0 movw r1, #64704 ; 0xfcc0 8007ee6: 4888 ldr r0, [pc, #544] ; (8008108 ) 8007ee8: f7fe f9f4 bl 80062d4 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007eec: 2200 movs r2, #0 8007eee: f240 31f3 movw r1, #1011 ; 0x3f3 8007ef2: 4886 ldr r0, [pc, #536] ; (800810c ) 8007ef4: f7fe f9ee bl 80062d4 HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007ef8: 2200 movs r2, #0 8007efa: f648 71ff movw r1, #36863 ; 0x8fff 8007efe: 4884 ldr r0, [pc, #528] ; (8008110 ) 8007f00: f7fe f9e8 bl 80062d4 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007f04: 2200 movs r2, #0 8007f06: f647 71fc movw r1, #32764 ; 0x7ffc 8007f0a: 4882 ldr r0, [pc, #520] ; (8008114 ) 8007f0c: f7fe f9e2 bl 80062d4 HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET); 8007f10: 2200 movs r2, #0 8007f12: f44f 4100 mov.w r1, #32768 ; 0x8000 8007f16: 4880 ldr r0, [pc, #512] ; (8008118 ) 8007f18: f7fe f9dc bl 80062d4 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007f1c: 2200 movs r2, #0 8007f1e: 2118 movs r1, #24 8007f20: 487e ldr r0, [pc, #504] ; (800811c ) 8007f22: f7fe f9d7 bl 80062d4 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007f26: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007f28: a910 add r1, sp, #64 ; 0x40 8007f2a: 4876 ldr r0, [pc, #472] ; (8008104 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007f2c: 9310 str r3, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007f2e: 9611 str r6, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007f30: 9412 str r4, [sp, #72] ; 0x48 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007f32: 9713 str r7, [sp, #76] ; 0x4c HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007f34: f7fe f8dc bl 80060f0 GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007f38: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007f3c: a910 add r1, sp, #64 ; 0x40 8007f3e: 4872 ldr r0, [pc, #456] ; (8008108 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007f40: 9310 str r3, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007f42: 9611 str r6, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007f44: 9412 str r4, [sp, #72] ; 0x48 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007f46: 9713 str r7, [sp, #76] ; 0x4c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007f48: f7fe f8d2 bl 80060f0 GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007f4c: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007f50: a910 add r1, sp, #64 ; 0x40 8007f52: 486e ldr r0, [pc, #440] ; (800810c ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007f54: 9310 str r3, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007f56: 9611 str r6, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007f58: 9412 str r4, [sp, #72] ; 0x48 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007f5a: 9713 str r7, [sp, #76] ; 0x4c HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007f5c: f7fe f8c8 bl 80060f0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007f60: a910 add r1, sp, #64 ; 0x40 8007f62: 486a ldr r0, [pc, #424] ; (800810c ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8007f64: f8cd b040 str.w fp, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007f68: 9411 str r4, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007f6a: 9412 str r4, [sp, #72] ; 0x48 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007f6c: f7fe f8c0 bl 80060f0 /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin PATH_EN_3_5G_L_Pin */ GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007f70: f648 73ff movw r3, #36863 ; 0x8fff |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin |PATH_EN_3_5G_L_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007f74: a910 add r1, sp, #64 ; 0x40 8007f76: 4866 ldr r0, [pc, #408] ; (8008110 ) GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007f78: 9310 str r3, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007f7a: 9611 str r6, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007f7c: 9412 str r4, [sp, #72] ; 0x48 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007f7e: 9713 str r7, [sp, #76] ; 0x4c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007f80: f7fe f8b6 bl 80060f0 /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */ GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8007f84: f44f 5340 mov.w r3, #12288 ; 0x3000 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007f88: a910 add r1, sp, #64 ; 0x40 8007f8a: 4861 ldr r0, [pc, #388] ; (8008110 ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8007f8c: 9310 str r3, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007f8e: 9411 str r4, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007f90: 9412 str r4, [sp, #72] ; 0x48 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007f92: f7fe f8ad bl 80060f0 /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin BOOT_LED_Pin */ GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007f96: f647 73fc movw r3, #32764 ; 0x7ffc |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin |BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007f9a: a910 add r1, sp, #64 ; 0x40 8007f9c: 485d ldr r0, [pc, #372] ; (8008114 ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007f9e: 9310 str r3, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007fa0: 9611 str r6, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007fa2: 9412 str r4, [sp, #72] ; 0x48 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007fa4: 9713 str r7, [sp, #76] ; 0x4c HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007fa6: f7fe f8a3 bl 80060f0 /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */ GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8007faa: f44f 7340 mov.w r3, #768 ; 0x300 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007fae: a910 add r1, sp, #64 ; 0x40 8007fb0: 4855 ldr r0, [pc, #340] ; (8008108 ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8007fb2: 9310 str r3, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007fb4: 9411 str r4, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007fb6: 9412 str r4, [sp, #72] ; 0x48 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007fb8: f7fe f89a bl 80060f0 /*Configure GPIO pin : PLL_CLK_3_5G_Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8007fbc: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8007fc0: a910 add r1, sp, #64 ; 0x40 8007fc2: 4855 ldr r0, [pc, #340] ; (8008118 ) GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8007fc4: 9310 str r3, [sp, #64] ; 0x40 8007fc6: 9307 str r3, [sp, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007fc8: 9611 str r6, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007fca: 9412 str r4, [sp, #72] ; 0x48 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007fcc: 9713 str r7, [sp, #76] ; 0x4c HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8007fce: f7fe f88f bl 80060f0 /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8007fd2: 2218 movs r2, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007fd4: a910 add r1, sp, #64 ; 0x40 8007fd6: 4851 ldr r0, [pc, #324] ; (800811c ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8007fd8: 9210 str r2, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007fda: 9611 str r6, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007fdc: 9412 str r4, [sp, #72] ; 0x48 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007fde: 9713 str r7, [sp, #76] ; 0x4c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007fe0: f7fe f886 bl 80060f0 /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007fe4: 2260 movs r2, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007fe6: a910 add r1, sp, #64 ; 0x40 8007fe8: 484c ldr r0, [pc, #304] ; (800811c ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007fea: 9210 str r2, [sp, #64] ; 0x40 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007fec: 9411 str r4, [sp, #68] ; 0x44 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007fee: 9412 str r4, [sp, #72] ; 0x48 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007ff0: f7fe f87e bl 80060f0 __HAL_RCC_DMA1_CLK_ENABLE(); 8007ff4: 696a ldr r2, [r5, #20] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8007ff6: f44f 7380 mov.w r3, #256 ; 0x100 __HAL_RCC_DMA1_CLK_ENABLE(); 8007ffa: 4332 orrs r2, r6 8007ffc: 616a str r2, [r5, #20] 8007ffe: 696a ldr r2, [r5, #20] hadc1.Instance = ADC1; 8008000: 4d47 ldr r5, [pc, #284] ; (8008120 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8008002: 4032 ands r2, r6 8008004: 9208 str r2, [sp, #32] 8008006: 9a08 ldr r2, [sp, #32] hadc1.Instance = ADC1; 8008008: 4a46 ldr r2, [pc, #280] ; (8008124 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 800800a: 4628 mov r0, r5 hadc1.Instance = ADC1; 800800c: 602a str r2, [r5, #0] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 800800e: f44f 2260 mov.w r2, #917504 ; 0xe0000 hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8008012: 60ab str r3, [r5, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8008014: 61ea str r2, [r5, #28] ADC_ChannelConfTypeDef sConfig = {0}; 8008016: 9410 str r4, [sp, #64] ; 0x40 8008018: 9411 str r4, [sp, #68] ; 0x44 800801a: 9412 str r4, [sp, #72] ; 0x48 hadc1.Init.ContinuousConvMode = ENABLE; 800801c: 60ee str r6, [r5, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 800801e: 616c str r4, [r5, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8008020: 606c str r4, [r5, #4] hadc1.Init.NbrOfConversion = 14; 8008022: f8c5 9010 str.w r9, [r5, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8008026: f7fd fc1b bl 8005860 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800802a: a910 add r1, sp, #64 ; 0x40 800802c: 4628 mov r0, r5 sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 800802e: f8cd 8048 str.w r8, [sp, #72] ; 0x48 sConfig.Channel = ADC_CHANNEL_0; 8008032: 9410 str r4, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_1; 8008034: 9611 str r6, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008036: f7fd faa7 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800803a: a910 add r1, sp, #64 ; 0x40 800803c: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_1; 800803e: 9610 str r6, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_2; 8008040: 9711 str r7, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008042: f7fd faa1 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008046: a910 add r1, sp, #64 ; 0x40 8008048: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_3; 800804a: f8cd a044 str.w sl, [sp, #68] ; 0x44 sConfig.Channel = ADC_CHANNEL_2; 800804e: 9710 str r7, [sp, #64] ; 0x40 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008050: f7fd fa9a bl 8005588 sConfig.Channel = ADC_CHANNEL_3; 8008054: f8cd a040 str.w sl, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_4; 8008058: f04f 0a04 mov.w sl, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800805c: a910 add r1, sp, #64 ; 0x40 800805e: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_4; 8008060: f8cd a044 str.w sl, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008064: f7fd fa90 bl 8005588 sConfig.Channel = ADC_CHANNEL_4; 8008068: f8cd a040 str.w sl, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_5; 800806c: f04f 0a05 mov.w sl, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008070: a910 add r1, sp, #64 ; 0x40 8008072: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_5; 8008074: f8cd a044 str.w sl, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008078: f7fd fa86 bl 8005588 sConfig.Channel = ADC_CHANNEL_5; 800807c: f8cd a040 str.w sl, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_6; 8008080: f04f 0a06 mov.w sl, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008084: a910 add r1, sp, #64 ; 0x40 8008086: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_6; 8008088: f8cd a044 str.w sl, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800808c: f7fd fa7c bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008090: a910 add r1, sp, #64 ; 0x40 8008092: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_6; 8008094: f8cd a040 str.w sl, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_7; 8008098: f8cd 8044 str.w r8, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800809c: f7fd fa74 bl 8005588 sConfig.Channel = ADC_CHANNEL_7; 80080a0: f8cd 8040 str.w r8, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_8; 80080a4: f04f 0808 mov.w r8, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080a8: a910 add r1, sp, #64 ; 0x40 80080aa: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_8; 80080ac: f8cd 8044 str.w r8, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080b0: f7fd fa6a bl 8005588 sConfig.Channel = ADC_CHANNEL_8; 80080b4: f8cd 8040 str.w r8, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_9; 80080b8: f04f 0809 mov.w r8, #9 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080bc: a910 add r1, sp, #64 ; 0x40 80080be: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_9; 80080c0: f8cd 8044 str.w r8, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080c4: f7fd fa60 bl 8005588 sConfig.Rank = ADC_REGULAR_RANK_10; 80080c8: 220a movs r2, #10 sConfig.Rank = ADC_REGULAR_RANK_11; 80080ca: f04f 0a0b mov.w sl, #11 sConfig.Channel = ADC_CHANNEL_9; 80080ce: f8cd 8040 str.w r8, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_13; 80080d2: f04f 080d mov.w r8, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080d6: a910 add r1, sp, #64 ; 0x40 80080d8: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_10; 80080da: 9211 str r2, [sp, #68] ; 0x44 80080dc: 9206 str r2, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080de: f7fd fa53 bl 8005588 sConfig.Channel = ADC_CHANNEL_10; 80080e2: 9a06 ldr r2, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080e4: a910 add r1, sp, #64 ; 0x40 80080e6: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_10; 80080e8: 9210 str r2, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_11; 80080ea: f8cd a044 str.w sl, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080ee: f7fd fa4b bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080f2: a910 add r1, sp, #64 ; 0x40 80080f4: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_12; 80080f6: f8cd b044 str.w fp, [sp, #68] ; 0x44 sConfig.Channel = ADC_CHANNEL_11; 80080fa: f8cd a040 str.w sl, [sp, #64] ; 0x40 80080fe: e013 b.n 8008128 8008100: 40021000 .word 0x40021000 8008104: 40011800 .word 0x40011800 8008108: 40011000 .word 0x40011000 800810c: 40011c00 .word 0x40011c00 8008110: 40011400 .word 0x40011400 8008114: 40012000 .word 0x40012000 8008118: 40010800 .word 0x40010800 800811c: 40010c00 .word 0x40010c00 8008120: 20000648 .word 0x20000648 8008124: 40012400 .word 0x40012400 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008128: f7fd fa2e bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800812c: a910 add r1, sp, #64 ; 0x40 800812e: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_12; 8008130: f8cd b040 str.w fp, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_13; 8008134: f8cd 8044 str.w r8, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008138: f7fd fa26 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800813c: a910 add r1, sp, #64 ; 0x40 800813e: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_13; 8008140: f8cd 8040 str.w r8, [sp, #64] ; 0x40 sConfig.Rank = ADC_REGULAR_RANK_14; 8008144: f8cd 9044 str.w r9, [sp, #68] ; 0x44 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008148: f7fd fa1e bl 8005588 huart1.Init.BaudRate = 115200; 800814c: f44f 33e1 mov.w r3, #115200 ; 0x1c200 huart1.Instance = USART1; 8008150: f8df 8388 ldr.w r8, [pc, #904] ; 80084dc huart1.Init.BaudRate = 115200; 8008154: 49d2 ldr r1, [pc, #840] ; (80084a0 ) if (HAL_UART_Init(&huart1) != HAL_OK) 8008156: 4640 mov r0, r8 huart1.Init.BaudRate = 115200; 8008158: e888 000a stmia.w r8, {r1, r3} huart1.Init.Mode = UART_MODE_TX_RX; 800815c: f8c8 b014 str.w fp, [r8, #20] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8008160: f8c8 4008 str.w r4, [r8, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8008164: f8c8 400c str.w r4, [r8, #12] huart1.Init.Parity = UART_PARITY_NONE; 8008168: f8c8 4010 str.w r4, [r8, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800816c: f8c8 4018 str.w r4, [r8, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8008170: f8c8 401c str.w r4, [r8, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8008174: f7fe fe50 bl 8006e18 htim6.Init.Prescaler = 5600-1; 8008178: f241 52df movw r2, #5599 ; 0x15df htim6.Instance = TIM6; 800817c: f8df b360 ldr.w fp, [pc, #864] ; 80084e0 htim6.Init.Prescaler = 5600-1; 8008180: 49c8 ldr r1, [pc, #800] ; (80084a4 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8008182: 4658 mov r0, fp htim6.Init.Prescaler = 5600-1; 8008184: e88b 0006 stmia.w fp, {r1, r2} htim6.Init.Period = 10; 8008188: 9a06 ldr r2, [sp, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800818a: 9410 str r4, [sp, #64] ; 0x40 htim6.Init.Period = 10; 800818c: f8cb 200c str.w r2, [fp, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8008190: 9411 str r4, [sp, #68] ; 0x44 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8008192: f8cb 4008 str.w r4, [fp, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8008196: f8cb 4018 str.w r4, [fp, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 800819a: f7fe fd2b bl 8006bf4 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800819e: a910 add r1, sp, #64 ; 0x40 80081a0: 4658 mov r0, fp sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80081a2: 9410 str r4, [sp, #64] ; 0x40 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80081a4: 9411 str r4, [sp, #68] ; 0x44 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80081a6: f7fe fd3f bl 8006c28 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80081aa: 4622 mov r2, r4 80081ac: 4621 mov r1, r4 80081ae: 2025 movs r0, #37 ; 0x25 80081b0: f7fd fc5a bl 8005a68 HAL_NVIC_EnableIRQ(USART1_IRQn); 80081b4: 2025 movs r0, #37 ; 0x25 80081b6: f7fd fc8b bl 8005ad0 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 80081ba: 4622 mov r2, r4 80081bc: 4621 mov r1, r4 80081be: 2036 movs r0, #54 ; 0x36 80081c0: f7fd fc52 bl 8005a68 HAL_NVIC_EnableIRQ(TIM6_IRQn); 80081c4: 2036 movs r0, #54 ; 0x36 80081c6: f7fd fc83 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 80081ca: 4622 mov r2, r4 80081cc: 4621 mov r1, r4 80081ce: 4650 mov r0, sl 80081d0: f7fd fc4a bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 80081d4: 4650 mov r0, sl 80081d6: f7fd fc7b bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 80081da: 4622 mov r2, r4 80081dc: 4621 mov r1, r4 80081de: 4648 mov r0, r9 80081e0: f7fd fc42 bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 80081e4: 4648 mov r0, r9 80081e6: f7fd fc73 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 80081ea: 4622 mov r2, r4 80081ec: 4621 mov r1, r4 80081ee: 200f movs r0, #15 80081f0: f7fd fc3a bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80081f4: 200f movs r0, #15 80081f6: f7fd fc6b bl 8005ad0 setbuf(stdout, NULL); 80081fa: 4aab ldr r2, [pc, #684] ; (80084a8 ) 80081fc: 4621 mov r1, r4 80081fe: 6812 ldr r2, [r2, #0] 8008200: 6890 ldr r0, [r2, #8] 8008202: f001 fe6b bl 8009edc HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1); 8008206: 4632 mov r2, r6 8008208: 49a8 ldr r1, [pc, #672] ; (80084ac ) 800820a: 4640 mov r0, r8 800820c: f7fe fec8 bl 8006fa0 PE43711_PinInit(); 8008210: f7ff f9dc bl 80075cc HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET); 8008214: 4622 mov r2, r4 8008216: f44f 4180 mov.w r1, #16384 ; 0x4000 800821a: 48a5 ldr r0, [pc, #660] ; (80084b0 ) 800821c: f7fe f85a bl 80062d4 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET); 8008220: 9b07 ldr r3, [sp, #28] 8008222: 4622 mov r2, r4 8008224: 4619 mov r1, r3 8008226: 48a2 ldr r0, [pc, #648] ; (80084b0 ) 8008228: f7fe f854 bl 80062d4 HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET); 800822c: 4622 mov r2, r4 800822e: 4631 mov r1, r6 8008230: 48a0 ldr r0, [pc, #640] ; (80084b4 ) 8008232: f7fe f84f bl 80062d4 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8008236: 4622 mov r2, r4 8008238: 4639 mov r1, r7 800823a: 489e ldr r0, [pc, #632] ; (80084b4 ) 800823c: f7fe f84a bl 80062d4 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET); 8008240: 4622 mov r2, r4 8008242: f44f 6180 mov.w r1, #1024 ; 0x400 8008246: 489c ldr r0, [pc, #624] ; (80084b8 ) 8008248: f7fe f844 bl 80062d4 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET); 800824c: 4622 mov r2, r4 800824e: f44f 6100 mov.w r1, #2048 ; 0x800 8008252: 4899 ldr r0, [pc, #612] ; (80084b8 ) 8008254: f7fe f83e bl 80062d4 HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET); 8008258: 4622 mov r2, r4 800825a: f44f 7100 mov.w r1, #512 ; 0x200 800825e: 4896 ldr r0, [pc, #600] ; (80084b8 ) 8008260: f7fe f838 bl 80062d4 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET); 8008264: 4622 mov r2, r4 8008266: 2180 movs r1, #128 ; 0x80 8008268: 4894 ldr r0, [pc, #592] ; (80084bc ) 800826a: f7fe f833 bl 80062d4 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET); 800826e: 4632 mov r2, r6 8008270: f44f 5180 mov.w r1, #4096 ; 0x1000 8008274: 488e ldr r0, [pc, #568] ; (80084b0 ) 8008276: f7fe f82d bl 80062d4 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET); 800827a: 4632 mov r2, r6 800827c: f44f 6180 mov.w r1, #1024 ; 0x400 8008280: 488b ldr r0, [pc, #556] ; (80084b0 ) 8008282: f7fe f827 bl 80062d4 HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET); 8008286: 4622 mov r2, r4 8008288: 2120 movs r1, #32 800828a: 488b ldr r0, [pc, #556] ; (80084b8 ) 800828c: f7fe f822 bl 80062d4 HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET); 8008290: 4622 mov r2, r4 8008292: 2140 movs r1, #64 ; 0x40 8008294: 4888 ldr r0, [pc, #544] ; (80084b8 ) 8008296: f7fe f81d bl 80062d4 HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET); 800829a: 4632 mov r2, r6 800829c: 2180 movs r1, #128 ; 0x80 800829e: 4886 ldr r0, [pc, #536] ; (80084b8 ) 80082a0: f7fe f818 bl 80062d4 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET); 80082a4: 4632 mov r2, r6 80082a6: f44f 7180 mov.w r1, #256 ; 0x100 80082aa: 4883 ldr r0, [pc, #524] ; (80084b8 ) 80082ac: f7fe f812 bl 80062d4 HAL_Delay(1); 80082b0: 4630 mov r0, r6 80082b2: f7fd f91b bl 80054ec Path_Init(); 80082b6: f7ff fc5d bl 8007b74 ADF4153_Init(); 80082ba: f7ff fb9d bl 80079f8 SubmitDAC(0x800C); 80082be: f248 000c movw r0, #32780 ; 0x800c 80082c2: f7ff f803 bl 80072cc SubmitDAC(0xA000); 80082c6: f44f 4020 mov.w r0, #40960 ; 0xa000 80082ca: f7fe ffff bl 80072cc SubmitDAC(0x0FFF); 80082ce: f640 70ff movw r0, #4095 ; 0xfff 80082d2: f7fe fffb bl 80072cc SubmitDAC(0x13FF); 80082d6: f241 30ff movw r0, #5119 ; 0x13ff 80082da: f7fe fff7 bl 80072cc SubmitDAC(0x24FF); 80082de: f242 40ff movw r0, #9471 ; 0x24ff 80082e2: f7fe fff3 bl 80072cc SubmitDAC(0x35FF); 80082e6: f243 50ff movw r0, #13823 ; 0x35ff 80082ea: f7fe ffef bl 80072cc SubmitDAC(0x46FF); 80082ee: f244 60ff movw r0, #18175 ; 0x46ff 80082f2: f7fe ffeb bl 80072cc SubmitDAC(0x57FF); 80082f6: f245 70ff movw r0, #22527 ; 0x57ff 80082fa: f7fe ffe7 bl 80072cc SubmitDAC(0x68FF); 80082fe: f646 00ff movw r0, #26879 ; 0x68ff 8008302: f7fe ffe3 bl 80072cc SubmitDAC(0x79FF); 8008306: f647 10ff movw r0, #31231 ; 0x79ff 800830a: f7fe ffdf bl 80072cc HAL_Delay(1); 800830e: 4630 mov r0, r6 8008310: f7fd f8ec bl 80054ec ADF4113_Initialize(); 8008314: f000 f9a8 bl 8008668 while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK)); 8008318: 4628 mov r0, r5 800831a: f7fd fb2b bl 8005974 800831e: 2800 cmp r0, #0 8008320: d1fa bne.n 8008318 Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]); 8008322: 4867 ldr r0, [pc, #412] ; (80084c0 ) 8008324: f7ff fc16 bl 8007b54 temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008328: a559 add r5, pc, #356 ; (adr r5, 8008490 ) 800832a: e9d5 4500 ldrd r4, r5, [r5] temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 800832e: a75a add r7, pc, #360 ; (adr r7, 8008498 ) 8008330: e9d7 6700 ldrd r6, r7, [r7] ATTEN_PLL_PATH_Initialize(); 8008334: f7ff fcf6 bl 8007d24 HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14); 8008338: 220e movs r2, #14 800833a: 4962 ldr r1, [pc, #392] ; (80084c4 ) 800833c: 4862 ldr r0, [pc, #392] ; (80084c8 ) 800833e: f7fd f9df bl 8005700 if(HAL_GPIO_ReadPin(PLL_LD_3_5G_H_GPIO_Port, PLL_LD_3_5G_H_Pin) == GPIO_PIN_RESET 8008342: f8df 816c ldr.w r8, [pc, #364] ; 80084b0 8008346: f44f 7100 mov.w r1, #512 ; 0x200 800834a: 4640 mov r0, r8 800834c: f7fd ffbc bl 80062c8 8008350: bb58 cbnz r0, 80083aa && HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port, PLL_ON_OFF_3_5G_H_Pin) == GPIO_PIN_SET){ 8008352: f44f 5180 mov.w r1, #4096 ; 0x1000 8008356: 4640 mov r0, r8 8008358: f7fd ffb6 bl 80062c8 800835c: 2801 cmp r0, #1 800835e: 4681 mov r9, r0 8008360: d123 bne.n 80083aa temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008362: f241 3388 movw r3, #5000 ; 0x1388 8008366: 9303 str r3, [sp, #12] 8008368: 2302 movs r3, #2 800836a: 9302 str r3, [sp, #8] 800836c: 2300 movs r3, #0 800836e: 4a57 ldr r2, [pc, #348] ; (80084cc ) 8008370: a810 add r0, sp, #64 ; 0x40 8008372: e9cd 2300 strd r2, r3, [sp] 8008376: 4622 mov r2, r4 8008378: 462b mov r3, r5 800837a: f7ff f9d9 bl 8007730 ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 800837e: 2203 movs r2, #3 8008380: 9205 str r2, [sp, #20] 8008382: f241 32c2 movw r2, #5058 ; 0x13c2 8008386: 9204 str r2, [sp, #16] 8008388: 9a10 ldr r2, [sp, #64] ; 0x40 800838a: 4b51 ldr r3, [pc, #324] ; (80084d0 ) 800838c: 9203 str r2, [sp, #12] 800838e: 9a11 ldr r2, [sp, #68] ; 0x44 8008390: 9202 str r2, [sp, #8] 8008392: f103 0210 add.w r2, r3, #16 8008396: e892 0003 ldmia.w r2, {r0, r1} 800839a: e88d 0003 stmia.w sp, {r0, r1} 800839e: cb0f ldmia r3, {r0, r1, r2, r3} 80083a0: f7ff fa34 bl 800780c HAL_Delay(1); 80083a4: 4648 mov r0, r9 80083a6: f7fd f8a1 bl 80054ec if(HAL_GPIO_ReadPin(PLL_LD_3_5G_L_GPIO_Port, PLL_LD_3_5G_L_Pin) == GPIO_PIN_RESET 80083aa: f44f 7180 mov.w r1, #256 ; 0x100 80083ae: 4640 mov r0, r8 80083b0: f7fd ff8a bl 80062c8 80083b4: 2800 cmp r0, #0 80083b6: d15c bne.n 8008472 temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80083b8: f241 3388 movw r3, #5000 ; 0x1388 80083bc: 9303 str r3, [sp, #12] 80083be: 2302 movs r3, #2 80083c0: 9302 str r3, [sp, #8] 80083c2: 2300 movs r3, #0 80083c4: 4a41 ldr r2, [pc, #260] ; (80084cc ) 80083c6: a810 add r0, sp, #64 ; 0x40 80083c8: e9cd 2300 strd r2, r3, [sp] 80083cc: 4632 mov r2, r6 80083ce: 463b mov r3, r7 80083d0: f7ff f9ae bl 8007730 ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80083d4: 2203 movs r2, #3 80083d6: 9205 str r2, [sp, #20] 80083d8: f241 32c2 movw r2, #5058 ; 0x13c2 80083dc: 9204 str r2, [sp, #16] 80083de: 9a10 ldr r2, [sp, #64] ; 0x40 80083e0: 4b3c ldr r3, [pc, #240] ; (80084d4 ) 80083e2: 9203 str r2, [sp, #12] 80083e4: 9a11 ldr r2, [sp, #68] ; 0x44 80083e6: 9202 str r2, [sp, #8] 80083e8: f103 0210 add.w r2, r3, #16 80083ec: e892 0003 ldmia.w r2, {r0, r1} 80083f0: e88d 0003 stmia.w sp, {r0, r1} 80083f4: cb0f ldmia r3, {r0, r1, r2, r3} 80083f6: f7ff fa09 bl 800780c HAL_Delay(1); 80083fa: 2001 movs r0, #1 80083fc: f7fd f876 bl 80054ec if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;} 8008400: f8df 90e0 ldr.w r9, [pc, #224] ; 80084e4 8008404: f8d9 3000 ldr.w r3, [r9] 8008408: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 800840c: d907 bls.n 800841e 800840e: f44f 4180 mov.w r1, #16384 ; 0x4000 8008412: 4829 ldr r0, [pc, #164] ; (80084b8 ) 8008414: f7fd ff63 bl 80062de 8008418: 2300 movs r3, #0 800841a: f8c9 3000 str.w r3, [r9] while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal); 800841e: f8df a0c8 ldr.w sl, [pc, #200] ; 80084e8 8008422: f8df 90c8 ldr.w r9, [pc, #200] ; 80084ec 8008426: f8df b0b4 ldr.w fp, [pc, #180] ; 80084dc 800842a: f8da 3008 ldr.w r3, [sl, #8] 800842e: 2b00 cmp r3, #0 8008430: dd03 ble.n 800843a 8008432: f8d9 3000 ldr.w r3, [r9] 8008436: 2b64 cmp r3, #100 ; 0x64 8008438: d823 bhi.n 8008482 if(AdcTimerCnt > 2500){ 800843a: f640 13c4 movw r3, #2500 ; 0x9c4 800843e: 4a26 ldr r2, [pc, #152] ; (80084d8 ) 8008440: 6811 ldr r1, [r2, #0] 8008442: 4299 cmp r1, r3 8008444: f67f af7f bls.w 8008346 8008448: 2300 movs r3, #0 Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2] = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8); 800844a: f8df 9078 ldr.w r9, [pc, #120] ; 80084c4 800844e: f8df c0a0 ldr.w ip, [pc, #160] ; 80084f0 8008452: f859 0013 ldr.w r0, [r9, r3, lsl #1] 8008456: eb03 010c add.w r1, r3, ip 800845a: 3302 adds r3, #2 800845c: ea4f 2e10 mov.w lr, r0, lsr #8 for(uint8_t i = 0; i< ADC_EA; i++ ){ 8008460: 2b1c cmp r3, #28 Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2] = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8); 8008462: f881 e022 strb.w lr, [r1, #34] ; 0x22 Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2] = (uint16_t)(ADCvalue[i] & 0x00FF); 8008466: f881 0023 strb.w r0, [r1, #35] ; 0x23 for(uint8_t i = 0; i< ADC_EA; i++ ){ 800846a: d1f2 bne.n 8008452 AdcTimerCnt = 0; 800846c: 2300 movs r3, #0 800846e: 6013 str r3, [r2, #0] 8008470: e769 b.n 8008346 || HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port, PLL_ON_OFF_3_5G_L_Pin) == GPIO_PIN_SET){ 8008472: f44f 6180 mov.w r1, #1024 ; 0x400 8008476: 4640 mov r0, r8 8008478: f7fd ff26 bl 80062c8 800847c: 2801 cmp r0, #1 800847e: d1bf bne.n 8008400 8008480: e79a b.n 80083b8 while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal); 8008482: 4658 mov r0, fp 8008484: f000 fade bl 8008a44 8008488: e7cf b.n 800842a 800848a: bf00 nop 800848c: f3af 8000 nop.w 8008490: ea83b4a0 .word 0xea83b4a0 8008494: 00000000 .word 0x00000000 8008498: ce8f5560 .word 0xce8f5560 800849c: 00000000 .word 0x00000000 80084a0: 40013800 .word 0x40013800 80084a4: 40001000 .word 0x40001000 80084a8: 20000234 .word 0x20000234 80084ac: 20000b8c .word 0x20000b8c 80084b0: 40011000 .word 0x40011000 80084b4: 40011800 .word 0x40011800 80084b8: 40012000 .word 0x40012000 80084bc: 40011400 .word 0x40011400 80084c0: 20000480 .word 0x20000480 80084c4: 200005cc .word 0x200005cc 80084c8: 20000648 .word 0x20000648 80084cc: 02625a00 .word 0x02625a00 80084d0: 20000204 .word 0x20000204 80084d4: 2000021c .word 0x2000021c 80084d8: 20000438 .word 0x20000438 80084dc: 200006bc .word 0x200006bc 80084e0: 20000740 .word 0x20000740 80084e4: 2000043c .word 0x2000043c 80084e8: 20000b80 .word 0x20000b80 80084ec: 20000440 .word 0x20000440 80084f0: 2000056c .word 0x2000056c 080084f4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80084f4: 4770 bx lr ... 080084f8 : { uint32_t R, B; uint32_t A, P, p_mode; uint32_t N_val = 0; N_val = (rf_Freq / ADF4113_CH_STEP); if( N_val < ADF4113_PRE8_MIN_N) { 80084f8: 4b02 ldr r3, [pc, #8] ; (8008504 ) 80084fa: 4298 cmp r0, r3 80084fc: d801 bhi.n 8008502 return HAL_SYN_INVALID_PRESCALE; 80084fe: 2004 movs r0, #4 8008500: 4770 bx lr A = N_val -(B * P); #ifdef DEBUG_PRINT printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); #endif /* DEBUG_PRINT */ } 8008502: 4770 bx lr 8008504: 002ab97f .word 0x002ab97f 08008508 : #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 8008508: b084 sub sp, #16 800850a: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800850e: ac0c add r4, sp, #48 ; 0x30 8008510: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 8008514: 9b13 ldr r3, [sp, #76] ; 0x4c 8008516: f8bd 7034 ldrh.w r7, [sp, #52] ; 0x34 800851a: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 800851e: 9301 str r3, [sp, #4] R0 = R0 & 0xFFFFFF; 8008520: 9b12 ldr r3, [sp, #72] ; 0x48 8008522: f8dd 8038 ldr.w r8, [sp, #56] ; 0x38 8008526: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 800852a: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 800852e: 9d10 ldr r5, [sp, #64] ; 0x40 8008530: f8bd 6044 ldrh.w r6, [sp, #68] ; 0x44 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008534: 2200 movs r2, #0 8008536: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 8008538: 9300 str r3, [sp, #0] 800853a: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 800853c: 9c14 ldr r4, [sp, #80] ; 0x50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800853e: f7fd fec9 bl 80062d4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008542: 2200 movs r2, #0 8008544: 4649 mov r1, r9 8008546: 4640 mov r0, r8 8008548: f7fd fec4 bl 80062d4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800854c: 2200 movs r2, #0 800854e: 4631 mov r1, r6 8008550: 4628 mov r0, r5 8008552: f7fd febf bl 80062d4 8008556: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 800855a: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 800855e: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008562: bf18 it ne 8008564: 2201 movne r2, #1 } else{ #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008566: 4649 mov r1, r9 8008568: 4640 mov r0, r8 800856a: f7fd feb3 bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800856e: 2201 movs r2, #1 8008570: 4639 mov r1, r7 8008572: 4650 mov r0, sl 8008574: f7fd feae bl 80062d4 Pol_Delay_us(10); 8008578: 200a movs r0, #10 800857a: f7ff fc09 bl 8007d90 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800857e: 2200 movs r2, #0 8008580: 4639 mov r1, r7 8008582: 4650 mov r0, sl 8008584: f7fd fea6 bl 80062d4 R2 = ((R2 << 1) & 0xFFFFFF); 8008588: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 800858a: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 800858e: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 8008592: d1e4 bne.n 800855e } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008594: 2201 movs r2, #1 8008596: 4631 mov r1, r6 8008598: 4628 mov r0, r5 800859a: f7fd fe9b bl 80062d4 Pol_Delay_us(10); 800859e: 200a movs r0, #10 80085a0: f7ff fbf6 bl 8007d90 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80085a4: 465a mov r2, fp 80085a6: 4631 mov r1, r6 80085a8: 4628 mov r0, r5 80085aa: f7fd fe93 bl 80062d4 80085ae: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 80085b0: 9b00 ldr r3, [sp, #0] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085b2: 4649 mov r1, r9 if(R0 & 0x800000){ 80085b4: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80085b8: bf18 it ne 80085ba: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085bc: 4640 mov r0, r8 80085be: f7fd fe89 bl 80062d4 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80085c2: 2201 movs r2, #1 80085c4: 4639 mov r1, r7 80085c6: 4650 mov r0, sl 80085c8: f7fd fe84 bl 80062d4 Pol_Delay_us(10); 80085cc: 200a movs r0, #10 80085ce: f7ff fbdf bl 8007d90 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085d2: 2200 movs r2, #0 80085d4: 4639 mov r1, r7 80085d6: 4650 mov r0, sl 80085d8: f7fd fe7c bl 80062d4 R0 = ((R0 << 1) & 0xFFFFFF); 80085dc: 9b00 ldr r3, [sp, #0] for(int i =0; i < 24; i++){ 80085de: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 80085e0: ea4f 0343 mov.w r3, r3, lsl #1 80085e4: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80085e8: 9300 str r3, [sp, #0] for(int i =0; i < 24; i++){ 80085ea: d1e1 bne.n 80085b0 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80085ec: 2201 movs r2, #1 80085ee: 4631 mov r1, r6 80085f0: 4628 mov r0, r5 80085f2: f7fd fe6f bl 80062d4 Pol_Delay_us(10); 80085f6: 200a movs r0, #10 80085f8: f7ff fbca bl 8007d90 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80085fc: 4622 mov r2, r4 80085fe: 4631 mov r1, r6 8008600: 4628 mov r0, r5 8008602: f7fd fe67 bl 80062d4 8008606: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 8008608: 9b01 ldr r3, [sp, #4] } else{ #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800860a: 4649 mov r1, r9 if(R1 & 0x800000){ 800860c: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008610: bf18 it ne 8008612: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008614: 4640 mov r0, r8 8008616: f7fd fe5d bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800861a: 2201 movs r2, #1 800861c: 4639 mov r1, r7 800861e: 4650 mov r0, sl 8008620: f7fd fe58 bl 80062d4 Pol_Delay_us(10); 8008624: 200a movs r0, #10 8008626: f7ff fbb3 bl 8007d90 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800862a: 2200 movs r2, #0 800862c: 4639 mov r1, r7 800862e: 4650 mov r0, sl 8008630: f7fd fe50 bl 80062d4 R1 = ((R1 << 1) & 0xFFFFFF); 8008634: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 8008636: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 8008638: ea4f 0343 mov.w r3, r3, lsl #1 800863c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008640: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 8008642: d1e1 bne.n 8008608 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008644: 4631 mov r1, r6 8008646: 2201 movs r2, #1 8008648: 4628 mov r0, r5 800864a: f7fd fe43 bl 80062d4 Pol_Delay_us(10); 800864e: 200a movs r0, #10 8008650: f7ff fb9e bl 8007d90 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008654: 4622 mov r2, r4 8008656: 4631 mov r1, r6 8008658: 4628 mov r0, r5 } 800865a: b003 add sp, #12 800865c: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008660: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008662: f7fd be37 b.w 80062d4 ... 08008668 : void ADF4113_Initialize(void){ 8008668: b530 push {r4, r5, lr} ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092); 800866a: f44f 6482 mov.w r4, #1040 ; 0x410 800866e: 4d22 ldr r5, [pc, #136] ; (80086f8 ) 8008670: 4b22 ldr r3, [pc, #136] ; (80086fc ) 8008672: 4a23 ldr r2, [pc, #140] ; (8008700 ) void ADF4113_Initialize(void){ 8008674: b087 sub sp, #28 ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092); 8008676: 9203 str r2, [sp, #12] 8008678: 9504 str r5, [sp, #16] 800867a: 9402 str r4, [sp, #8] 800867c: f103 0210 add.w r2, r3, #16 8008680: e892 0003 ldmia.w r2, {r0, r1} 8008684: e88d 0003 stmia.w sp, {r0, r1} 8008688: cb0f ldmia r3, {r0, r1, r2, r3} 800868a: f7ff ff3d bl 8008508 HAL_Delay(1); 800868e: 2001 movs r0, #1 8008690: f7fc ff2c bl 80054ec ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092); 8008694: 4b1b ldr r3, [pc, #108] ; (8008704 ) 8008696: 4a1c ldr r2, [pc, #112] ; (8008708 ) 8008698: 9504 str r5, [sp, #16] 800869a: 9203 str r2, [sp, #12] 800869c: 9402 str r4, [sp, #8] 800869e: f103 0210 add.w r2, r3, #16 80086a2: e892 0003 ldmia.w r2, {r0, r1} 80086a6: e88d 0003 stmia.w sp, {r0, r1} 80086aa: cb0f ldmia r3, {r0, r1, r2, r3} 80086ac: f7ff ff2c bl 8008508 HAL_Delay(1); 80086b0: 2001 movs r0, #1 80086b2: f7fc ff1b bl 80054ec ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092); 80086b6: 4b15 ldr r3, [pc, #84] ; (800870c ) 80086b8: 4a15 ldr r2, [pc, #84] ; (8008710 ) 80086ba: 9504 str r5, [sp, #16] 80086bc: 9203 str r2, [sp, #12] 80086be: 9402 str r4, [sp, #8] 80086c0: f103 0210 add.w r2, r3, #16 80086c4: e892 0003 ldmia.w r2, {r0, r1} 80086c8: e88d 0003 stmia.w sp, {r0, r1} 80086cc: cb0f ldmia r3, {r0, r1, r2, r3} 80086ce: f7ff ff1b bl 8008508 HAL_Delay(1); 80086d2: 2001 movs r0, #1 80086d4: f7fc ff0a bl 80054ec ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092); 80086d8: 4b0e ldr r3, [pc, #56] ; (8008714 ) 80086da: 4a0f ldr r2, [pc, #60] ; (8008718 ) 80086dc: 9504 str r5, [sp, #16] 80086de: 9203 str r2, [sp, #12] 80086e0: 9402 str r4, [sp, #8] 80086e2: f103 0210 add.w r2, r3, #16 80086e6: e892 0003 ldmia.w r2, {r0, r1} 80086ea: e88d 0003 stmia.w sp, {r0, r1} 80086ee: cb0f ldmia r3, {r0, r1, r2, r3} 80086f0: f7ff ff0a bl 8008508 } 80086f4: b007 add sp, #28 80086f6: bd30 pop {r4, r5, pc} 80086f8: 009f8092 .word 0x009f8092 80086fc: 200001a0 .word 0x200001a0 8008700: 0003e801 .word 0x0003e801 8008704: 200001b8 .word 0x200001b8 8008708: 00038d31 .word 0x00038d31 800870c: 200001d0 .word 0x200001d0 8008710: 0004de71 .word 0x0004de71 8008714: 200001e8 .word 0x200001e8 8008718: 00059a31 .word 0x00059a31 0800871c : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800871c: 4b0e ldr r3, [pc, #56] ; (8008758 ) { 800871e: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8008720: 699a ldr r2, [r3, #24] 8008722: f042 0201 orr.w r2, r2, #1 8008726: 619a str r2, [r3, #24] 8008728: 699a ldr r2, [r3, #24] 800872a: f002 0201 and.w r2, r2, #1 800872e: 9200 str r2, [sp, #0] 8008730: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8008732: 69da ldr r2, [r3, #28] 8008734: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8008738: 61da str r2, [r3, #28] 800873a: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800873c: 4a07 ldr r2, [pc, #28] ; (800875c ) __HAL_RCC_PWR_CLK_ENABLE(); 800873e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8008742: 9301 str r3, [sp, #4] 8008744: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8008746: 6853 ldr r3, [r2, #4] 8008748: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 800874c: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 8008750: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8008752: b002 add sp, #8 8008754: 4770 bx lr 8008756: bf00 nop 8008758: 40021000 .word 0x40021000 800875c: 40010000 .word 0x40010000 08008760 : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008760: 2210 movs r2, #16 { 8008762: b530 push {r4, r5, lr} 8008764: 4605 mov r5, r0 8008766: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008768: eb0d 0002 add.w r0, sp, r2 800876c: 2100 movs r1, #0 800876e: f000 fed0 bl 8009512 if(hadc->Instance==ADC1) 8008772: 682a ldr r2, [r5, #0] 8008774: 4b2c ldr r3, [pc, #176] ; (8008828 ) 8008776: 429a cmp r2, r3 8008778: d153 bne.n 8008822 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 800877a: f503 436c add.w r3, r3, #60416 ; 0xec00 800877e: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008780: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 8008782: f442 7200 orr.w r2, r2, #512 ; 0x200 8008786: 619a str r2, [r3, #24] 8008788: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800878a: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 800878c: f402 7200 and.w r2, r2, #512 ; 0x200 8008790: 9200 str r2, [sp, #0] 8008792: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 8008794: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008796: 4825 ldr r0, [pc, #148] ; (800882c ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8008798: f042 0210 orr.w r2, r2, #16 800879c: 619a str r2, [r3, #24] 800879e: 699a ldr r2, [r3, #24] 80087a0: f002 0210 and.w r2, r2, #16 80087a4: 9201 str r2, [sp, #4] 80087a6: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 80087a8: 699a ldr r2, [r3, #24] 80087aa: f042 0204 orr.w r2, r2, #4 80087ae: 619a str r2, [r3, #24] 80087b0: 699a ldr r2, [r3, #24] 80087b2: f002 0204 and.w r2, r2, #4 80087b6: 9202 str r2, [sp, #8] 80087b8: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 80087ba: 699a ldr r2, [r3, #24] 80087bc: f042 0208 orr.w r2, r2, #8 80087c0: 619a str r2, [r3, #24] 80087c2: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80087c4: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 80087c6: f003 0308 and.w r3, r3, #8 80087ca: 9303 str r3, [sp, #12] 80087cc: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 80087ce: 230f movs r3, #15 80087d0: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80087d2: f7fd fc8d bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80087d6: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80087d8: a904 add r1, sp, #16 80087da: 4815 ldr r0, [pc, #84] ; (8008830 ) GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80087dc: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80087de: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80087e0: f7fd fc86 bl 80060f0 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80087e4: 4813 ldr r0, [pc, #76] ; (8008834 ) 80087e6: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 80087e8: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80087ea: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80087ec: f7fd fc80 bl 80060f0 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80087f0: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 80087f2: 4c11 ldr r4, [pc, #68] ; (8008838 ) 80087f4: 4b11 ldr r3, [pc, #68] ; (800883c ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80087f6: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 80087f8: f44f 7200 mov.w r2, #512 ; 0x200 80087fc: 6122 str r2, [r4, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 80087fe: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Instance = DMA1_Channel1; 8008802: 6023 str r3, [r4, #0] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 8008804: 6162 str r2, [r4, #20] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008806: 2300 movs r3, #0 hdma_adc1.Init.Mode = DMA_CIRCULAR; 8008808: 2220 movs r2, #32 hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 800880a: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 800880c: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 800880e: 60a3 str r3, [r4, #8] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8008810: 61a2 str r2, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8008812: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8008814: f7fd f97e bl 8005b14 8008818: b108 cbz r0, 800881e { Error_Handler(); 800881a: f7ff fe6b bl 80084f4 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 800881e: 622c str r4, [r5, #32] 8008820: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 8008822: b009 add sp, #36 ; 0x24 8008824: bd30 pop {r4, r5, pc} 8008826: bf00 nop 8008828: 40012400 .word 0x40012400 800882c: 40011000 .word 0x40011000 8008830: 40010800 .word 0x40010800 8008834: 40010c00 .word 0x40010c00 8008838: 200006fc .word 0x200006fc 800883c: 40020008 .word 0x40020008 08008840 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8008840: 6802 ldr r2, [r0, #0] 8008842: 4b08 ldr r3, [pc, #32] ; (8008864 ) { 8008844: b082 sub sp, #8 if(htim_base->Instance==TIM6) 8008846: 429a cmp r2, r3 8008848: d10a bne.n 8008860 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 800884a: f503 3300 add.w r3, r3, #131072 ; 0x20000 800884e: 69da ldr r2, [r3, #28] 8008850: f042 0210 orr.w r2, r2, #16 8008854: 61da str r2, [r3, #28] 8008856: 69db ldr r3, [r3, #28] 8008858: f003 0310 and.w r3, r3, #16 800885c: 9301 str r3, [sp, #4] 800885e: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8008860: b002 add sp, #8 8008862: 4770 bx lr 8008864: 40001000 .word 0x40001000 08008868 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8008868: b570 push {r4, r5, r6, lr} 800886a: 4606 mov r6, r0 800886c: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800886e: 2210 movs r2, #16 8008870: 2100 movs r1, #0 8008872: a802 add r0, sp, #8 8008874: f000 fe4d bl 8009512 if(huart->Instance==USART1) 8008878: 6832 ldr r2, [r6, #0] 800887a: 4b2b ldr r3, [pc, #172] ; (8008928 ) 800887c: 429a cmp r2, r3 800887e: d151 bne.n 8008924 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8008880: f503 4358 add.w r3, r3, #55296 ; 0xd800 8008884: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008886: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8008888: f442 4280 orr.w r2, r2, #16384 ; 0x4000 800888c: 619a str r2, [r3, #24] 800888e: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008890: 4826 ldr r0, [pc, #152] ; (800892c ) __HAL_RCC_USART1_CLK_ENABLE(); 8008892: f402 4280 and.w r2, r2, #16384 ; 0x4000 8008896: 9200 str r2, [sp, #0] 8008898: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 800889a: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800889c: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 800889e: f042 0204 orr.w r2, r2, #4 80088a2: 619a str r2, [r3, #24] 80088a4: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 80088a6: 4c22 ldr r4, [pc, #136] ; (8008930 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 80088a8: f003 0304 and.w r3, r3, #4 80088ac: 9301 str r3, [sp, #4] 80088ae: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 80088b0: f44f 7300 mov.w r3, #512 ; 0x200 80088b4: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80088b6: 2302 movs r3, #2 80088b8: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80088ba: 2303 movs r3, #3 80088bc: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80088be: f7fd fc17 bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_10; 80088c2: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80088c6: 4819 ldr r0, [pc, #100] ; (800892c ) 80088c8: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 80088ca: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80088cc: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 80088ce: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80088d0: f7fd fc0e bl 80060f0 hdma_usart1_rx.Instance = DMA1_Channel5; 80088d4: 4b17 ldr r3, [pc, #92] ; (8008934 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80088d6: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 80088d8: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80088dc: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80088de: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80088e0: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80088e2: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80088e4: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 80088e6: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 80088e8: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80088ea: f7fd f913 bl 8005b14 80088ee: b108 cbz r0, 80088f4 { Error_Handler(); 80088f0: f7ff fe00 bl 80084f4 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80088f4: f04f 0c10 mov.w ip, #16 80088f8: 4b0f ldr r3, [pc, #60] ; (8008938 ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 80088fa: 6374 str r4, [r6, #52] ; 0x34 80088fc: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 80088fe: 4c0f ldr r4, [pc, #60] ; (800893c ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8008900: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8008902: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8008906: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8008908: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800890a: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 800890c: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800890e: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8008910: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 8008912: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8008914: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8008916: f7fd f8fd bl 8005b14 800891a: b108 cbz r0, 8008920 { Error_Handler(); 800891c: f7ff fdea bl 80084f4 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 8008920: 6334 str r4, [r6, #48] ; 0x30 8008922: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8008924: b006 add sp, #24 8008926: bd70 pop {r4, r5, r6, pc} 8008928: 40013800 .word 0x40013800 800892c: 40010800 .word 0x40010800 8008930: 20000678 .word 0x20000678 8008934: 40020058 .word 0x40020058 8008938: 40020044 .word 0x40020044 800893c: 20000604 .word 0x20000604 08008940 : 8008940: 4770 bx lr 08008942 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8008942: e7fe b.n 8008942 08008944 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8008944: e7fe b.n 8008944 08008946 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8008946: e7fe b.n 8008946 08008948 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8008948: e7fe b.n 8008948 0800894a : 800894a: 4770 bx lr 0800894c : 800894c: 4770 bx lr 0800894e : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 800894e: 4770 bx lr 08008950 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8008950: f7fc bdba b.w 80054c8 08008954 : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 8008954: 4801 ldr r0, [pc, #4] ; (800895c ) 8008956: f7fd b9c9 b.w 8005cec 800895a: bf00 nop 800895c: 200006fc .word 0x200006fc 08008960 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8008960: 4801 ldr r0, [pc, #4] ; (8008968 ) 8008962: f7fd b9c3 b.w 8005cec 8008966: bf00 nop 8008968: 20000604 .word 0x20000604 0800896c : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 800896c: 4801 ldr r0, [pc, #4] ; (8008974 ) 800896e: f7fd b9bd b.w 8005cec 8008972: bf00 nop 8008974: 20000678 .word 0x20000678 08008978 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8008978: 4801 ldr r0, [pc, #4] ; (8008980 ) 800897a: f7fe bbff b.w 800717c 800897e: bf00 nop 8008980: 200006bc .word 0x200006bc 08008984 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8008984: 4801 ldr r0, [pc, #4] ; (800898c ) 8008986: f7fe b847 b.w 8006a18 800898a: bf00 nop 800898c: 20000740 .word 0x20000740 08008990 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8008990: b570 push {r4, r5, r6, lr} 8008992: 460e mov r6, r1 8008994: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8008996: 460c mov r4, r1 8008998: 1ba3 subs r3, r4, r6 800899a: 429d cmp r5, r3 800899c: dc01 bgt.n 80089a2 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 800899e: 4628 mov r0, r5 80089a0: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 80089a2: f3af 8000 nop.w 80089a6: f804 0b01 strb.w r0, [r4], #1 80089aa: e7f5 b.n 8008998 <_read+0x8> 080089ac <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 80089ac: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 80089ae: 4b0a ldr r3, [pc, #40] ; (80089d8 <_sbrk+0x2c>) { 80089b0: 4602 mov r2, r0 if (heap_end == 0) 80089b2: 6819 ldr r1, [r3, #0] 80089b4: b909 cbnz r1, 80089ba <_sbrk+0xe> heap_end = &end; 80089b6: 4909 ldr r1, [pc, #36] ; (80089dc <_sbrk+0x30>) 80089b8: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 80089ba: 4669 mov r1, sp prev_heap_end = heap_end; 80089bc: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 80089be: 4402 add r2, r0 80089c0: 428a cmp r2, r1 80089c2: d906 bls.n 80089d2 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 80089c4: f000 fd70 bl 80094a8 <__errno> 80089c8: 230c movs r3, #12 80089ca: 6003 str r3, [r0, #0] return (caddr_t) -1; 80089cc: f04f 30ff mov.w r0, #4294967295 80089d0: bd08 pop {r3, pc} } heap_end += incr; 80089d2: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 80089d4: bd08 pop {r3, pc} 80089d6: bf00 nop 80089d8: 20000444 .word 0x20000444 80089dc: 200017a0 .word 0x200017a0 080089e0 <_close>: int _close(int file) { return -1; } 80089e0: f04f 30ff mov.w r0, #4294967295 80089e4: 4770 bx lr 080089e6 <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 80089e6: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 80089ea: 2000 movs r0, #0 st->st_mode = S_IFCHR; 80089ec: 604b str r3, [r1, #4] } 80089ee: 4770 bx lr 080089f0 <_isatty>: int _isatty(int file) { return 1; } 80089f0: 2001 movs r0, #1 80089f2: 4770 bx lr 080089f4 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 80089f4: 2000 movs r0, #0 80089f6: 4770 bx lr 080089f8 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 80089f8: 4b0e ldr r3, [pc, #56] ; (8008a34 ) 80089fa: 681a ldr r2, [r3, #0] 80089fc: f042 0201 orr.w r2, r2, #1 8008a00: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8008a02: 6859 ldr r1, [r3, #4] 8008a04: 4a0c ldr r2, [pc, #48] ; (8008a38 ) 8008a06: 400a ands r2, r1 8008a08: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8008a0a: 681a ldr r2, [r3, #0] 8008a0c: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8008a10: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8008a14: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8008a16: 681a ldr r2, [r3, #0] 8008a18: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8008a1c: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8008a1e: 685a ldr r2, [r3, #4] 8008a20: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8008a24: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8008a26: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8008a2a: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8008a2c: 4a03 ldr r2, [pc, #12] ; (8008a3c ) 8008a2e: 4b04 ldr r3, [pc, #16] ; (8008a40 ) 8008a30: 609a str r2, [r3, #8] 8008a32: 4770 bx lr 8008a34: 40021000 .word 0x40021000 8008a38: f8ff0000 .word 0xf8ff0000 8008a3c: 08004000 .word 0x08004000 8008a40: e000ed00 .word 0xe000ed00 08008a44 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a44: 4a14 ldr r2, [pc, #80] ; (8008a98 ) { 8008a46: b538 push {r3, r4, r5, lr} uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a48: 6810 ldr r0, [r2, #0] 8008a4a: 1c43 adds r3, r0, #1 8008a4c: 6013 str r3, [r2, #0] 8008a4e: 4b13 ldr r3, [pc, #76] ; (8008a9c ) 8008a50: 6859 ldr r1, [r3, #4] 8008a52: f103 040c add.w r4, r3, #12 8008a56: 5d0d ldrb r5, [r1, r4] 8008a58: 4c11 ldr r4, [pc, #68] ; (8008aa0 ) #ifdef DEBUG_PRINT printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; #endif /* DEBUG_PRINT */ pQueue->tail++; 8008a5a: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a5c: f5b1 6f80 cmp.w r1, #1024 ; 0x400 uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a60: 5425 strb r5, [r4, r0] 8008a62: 4614 mov r4, r2 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a64: bfa8 it ge 8008a66: 2200 movge r2, #0 pQueue->data--; 8008a68: 689d ldr r5, [r3, #8] pQueue->tail++; 8008a6a: bfb8 it lt 8008a6c: 6059 strlt r1, [r3, #4] pQueue->data--; 8008a6e: f105 35ff add.w r5, r5, #4294967295 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a72: bfa8 it ge 8008a74: 605a strge r2, [r3, #4] pQueue->data--; 8008a76: 609d str r5, [r3, #8] if(pQueue->data == 0){ 8008a78: b96d cbnz r5, 8008a96 // printf("data cnt zero !!! \r\n"); RF_Ctrl_Main(&uart_buf[Header]); 8008a7a: 4809 ldr r0, [pc, #36] ; (8008aa0 ) 8008a7c: f000 fca0 bl 80093c0 #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 8008a80: 6822 ldr r2, [r4, #0] 8008a82: 4629 mov r1, r5 8008a84: 4806 ldr r0, [pc, #24] ; (8008aa0 ) 8008a86: f000 fd44 bl 8009512 // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 8008a8a: 6025 str r5, [r4, #0] HAL_Delay(1); 8008a8c: 2001 movs r0, #1 } } 8008a8e: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_Delay(1); 8008a92: f7fc bd2b b.w 80054ec 8008a96: bd38 pop {r3, r4, r5, pc} 8008a98: 20000448 .word 0x20000448 8008a9c: 20000b80 .word 0x20000b80 8008aa0: 20000780 .word 0x20000780 08008aa4 : AdcTimerCnt = UartRxTimerCnt = 0; 8008aa4: 2300 movs r3, #0 8008aa6: 4a0f ldr r2, [pc, #60] ; (8008ae4 ) { 8008aa8: b510 push {r4, lr} AdcTimerCnt = UartRxTimerCnt = 0; 8008aaa: 6013 str r3, [r2, #0] pQueue->head++; 8008aac: 4c0e ldr r4, [pc, #56] ; (8008ae8 ) AdcTimerCnt = UartRxTimerCnt = 0; 8008aae: 4a0f ldr r2, [pc, #60] ; (8008aec ) 8008ab0: 6013 str r3, [r2, #0] pQueue->head++; 8008ab2: 6822 ldr r2, [r4, #0] 8008ab4: 3201 adds r2, #1 8008ab6: f5b2 6f80 cmp.w r2, #1024 ; 0x400 8008aba: bfb8 it lt 8008abc: 4613 movlt r3, r2 8008abe: 6023 str r3, [r4, #0] pQueue->data++; 8008ac0: 68a3 ldr r3, [r4, #8] 8008ac2: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008ac4: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 8008ac8: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008aca: db01 blt.n 8008ad0 GetDataFromUartQueue(huart); 8008acc: f7ff ffba bl 8008a44 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008ad0: 6823 ldr r3, [r4, #0] 8008ad2: 4907 ldr r1, [pc, #28] ; (8008af0 ) 8008ad4: 2201 movs r2, #1 } 8008ad6: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008ada: 4419 add r1, r3 8008adc: 4805 ldr r0, [pc, #20] ; (8008af4 ) 8008ade: f7fe ba5f b.w 8006fa0 8008ae2: bf00 nop 8008ae4: 20000440 .word 0x20000440 8008ae8: 20000b80 .word 0x20000b80 8008aec: 20000438 .word 0x20000438 8008af0: 20000b8c .word 0x20000b8c 8008af4: 200006bc .word 0x200006bc 08008af8 : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ 8008af8: b508 push {r3, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 8008afa: 78c3 ldrb r3, [r0, #3] 8008afc: 7881 ldrb r1, [r0, #2] 8008afe: 5cc2 ldrb r2, [r0, r3] 8008b00: 3001 adds r0, #1 8008b02: f7fe fca9 bl 8007458 // printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); } // printf("CRC Result : \"%d\" \r\n",ret); return ret; } 8008b06: 3000 adds r0, #0 8008b08: bf18 it ne 8008b0a: 2001 movne r0, #1 8008b0c: bd08 pop {r3, pc} ... 08008b10 : PLL_EN_3_5G_L_GPIO_Port, PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b10: 23be movs r3, #190 ; 0xbe void RF_Status_Get(void){ 8008b12: b510 push {r4, lr} Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b14: 4c0b ldr r4, [pc, #44] ; (8008b44 ) Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008b16: 215d movs r1, #93 ; 0x5d Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b18: 7023 strb r3, [r4, #0] Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; 8008b1a: 2302 movs r3, #2 8008b1c: 7063 strb r3, [r4, #1] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008b1e: 235e movs r3, #94 ; 0x5e Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b20: 1c60 adds r0, r4, #1 Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008b22: 70a1 strb r1, [r4, #2] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008b24: 70e3 strb r3, [r4, #3] Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b26: f7fe fc7c bl 8007422 Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008b2a: 23eb movs r3, #235 ; 0xeb Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b2c: f884 005e strb.w r0, [r4, #94] ; 0x5e Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008b30: f884 305f strb.w r3, [r4, #95] ; 0x5f HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008b34: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008b36: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008b3a: 2260 movs r2, #96 ; 0x60 8008b3c: 4802 ldr r0, [pc, #8] ; (8008b48 ) 8008b3e: f7fe b9f5 b.w 8006f2c 8008b42: bf00 nop 8008b44: 2000056c .word 0x2000056c 8008b48: 200006bc .word 0x200006bc 08008b4c : static uint8_t Ack_Buf[6]; void RF_Status_Ack(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b4c: 23be movs r3, #190 ; 0xbe void RF_Status_Ack(void){ 8008b4e: b510 push {r4, lr} Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b50: 4c0a ldr r4, [pc, #40] ; (8008b7c ) Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008b52: 2103 movs r1, #3 Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b54: 7023 strb r3, [r4, #0] Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008b56: 2304 movs r3, #4 Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b58: 1c60 adds r0, r4, #1 Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008b5a: 7063 strb r3, [r4, #1] Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008b5c: 70a1 strb r1, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; 8008b5e: 70e3 strb r3, [r4, #3] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b60: f7fe fc5f bl 8007422 Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b64: 23eb movs r3, #235 ; 0xeb HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b66: 78a2 ldrb r2, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b68: 7120 strb r0, [r4, #4] Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b6a: 7163 strb r3, [r4, #5] HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b6c: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008b6e: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b72: 3203 adds r2, #3 8008b74: 4802 ldr r0, [pc, #8] ; (8008b80 ) 8008b76: f7fe b9d9 b.w 8006f2c 8008b7a: bf00 nop 8008b7c: 2000044c .word 0x2000044c 8008b80: 200006bc .word 0x200006bc 8008b84: 00000000 .word 0x00000000 08008b88 : void RF_Operate(uint8_t* data_buf){ 8008b88: b570 push {r4, r5, r6, lr} uint16_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; // printf("Prev_data[INDEX_ATT_1_8G_DL1] : %x data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]); if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b8a: 4db1 ldr r5, [pc, #708] ; (8008e50 ) 8008b8c: 7902 ldrb r2, [r0, #4] 8008b8e: 792b ldrb r3, [r5, #4] void RF_Operate(uint8_t* data_buf){ 8008b90: b0a2 sub sp, #136 ; 0x88 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b92: 4293 cmp r3, r2 void RF_Operate(uint8_t* data_buf){ 8008b94: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b96: d00c beq.n 8008bb2 #if 0 // PYJ.2019.07.31_BEGIN -- printf("\r\nLINE : %d \r\n",__LINE__); #endif // PYJ.2019.07.31_END -- BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008b98: 4bae ldr r3, [pc, #696] ; (8008e54 ) 8008b9a: 9202 str r2, [sp, #8] 8008b9c: f103 0210 add.w r2, r3, #16 8008ba0: e892 0003 ldmia.w r2, {r0, r1} 8008ba4: e88d 0003 stmia.w sp, {r0, r1} 8008ba8: cb0f ldmia r3, {r0, r1, r2, r3} 8008baa: f7fe fbe1 bl 8007370 Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 8008bae: 7923 ldrb r3, [r4, #4] 8008bb0: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 8008bb2: 7962 ldrb r2, [r4, #5] 8008bb4: 796b ldrb r3, [r5, #5] 8008bb6: 4293 cmp r3, r2 8008bb8: d00c beq.n 8008bd4 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008bba: 4ba7 ldr r3, [pc, #668] ; (8008e58 ) 8008bbc: 9202 str r2, [sp, #8] 8008bbe: f103 0210 add.w r2, r3, #16 8008bc2: e892 0003 ldmia.w r2, {r0, r1} 8008bc6: e88d 0003 stmia.w sp, {r0, r1} 8008bca: cb0f ldmia r3, {r0, r1, r2, r3} 8008bcc: f7fe fbd0 bl 8007370 Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 8008bd0: 7963 ldrb r3, [r4, #5] 8008bd2: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 8008bd4: 79a2 ldrb r2, [r4, #6] 8008bd6: 79ab ldrb r3, [r5, #6] 8008bd8: 4293 cmp r3, r2 8008bda: d00c beq.n 8008bf6 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008bdc: 4b9f ldr r3, [pc, #636] ; (8008e5c ) 8008bde: 9202 str r2, [sp, #8] 8008be0: f103 0210 add.w r2, r3, #16 8008be4: e892 0003 ldmia.w r2, {r0, r1} 8008be8: e88d 0003 stmia.w sp, {r0, r1} 8008bec: cb0f ldmia r3, {r0, r1, r2, r3} 8008bee: f7fe fbbf bl 8007370 Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 8008bf2: 79a3 ldrb r3, [r4, #6] 8008bf4: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 8008bf6: 79e2 ldrb r2, [r4, #7] 8008bf8: 79eb ldrb r3, [r5, #7] 8008bfa: 4293 cmp r3, r2 8008bfc: d00c beq.n 8008c18 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008bfe: 4b98 ldr r3, [pc, #608] ; (8008e60 ) 8008c00: 9202 str r2, [sp, #8] 8008c02: f103 0210 add.w r2, r3, #16 8008c06: e892 0003 ldmia.w r2, {r0, r1} 8008c0a: e88d 0003 stmia.w sp, {r0, r1} 8008c0e: cb0f ldmia r3, {r0, r1, r2, r3} 8008c10: f7fe fbae bl 8007370 Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 8008c14: 79e3 ldrb r3, [r4, #7] 8008c16: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 8008c18: 7a22 ldrb r2, [r4, #8] 8008c1a: 7a2b ldrb r3, [r5, #8] 8008c1c: 4293 cmp r3, r2 8008c1e: d00c beq.n 8008c3a BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008c20: 4b90 ldr r3, [pc, #576] ; (8008e64 ) 8008c22: 9202 str r2, [sp, #8] 8008c24: f103 0210 add.w r2, r3, #16 8008c28: e892 0003 ldmia.w r2, {r0, r1} 8008c2c: e88d 0003 stmia.w sp, {r0, r1} 8008c30: cb0f ldmia r3, {r0, r1, r2, r3} 8008c32: f7fe fb9d bl 8007370 Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 8008c36: 7a23 ldrb r3, [r4, #8] 8008c38: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 8008c3a: 7a62 ldrb r2, [r4, #9] 8008c3c: 7a6b ldrb r3, [r5, #9] 8008c3e: 4293 cmp r3, r2 8008c40: d00c beq.n 8008c5c #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008c42: 4b89 ldr r3, [pc, #548] ; (8008e68 ) 8008c44: 9202 str r2, [sp, #8] 8008c46: f103 0210 add.w r2, r3, #16 8008c4a: e892 0003 ldmia.w r2, {r0, r1} 8008c4e: e88d 0003 stmia.w sp, {r0, r1} 8008c52: cb0f ldmia r3, {r0, r1, r2, r3} 8008c54: f7fe fb8c bl 8007370 Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 8008c58: 7a63 ldrb r3, [r4, #9] 8008c5a: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 8008c5c: 7aa2 ldrb r2, [r4, #10] 8008c5e: 7aab ldrb r3, [r5, #10] 8008c60: 4293 cmp r3, r2 8008c62: d00c beq.n 8008c7e #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008c64: 4b81 ldr r3, [pc, #516] ; (8008e6c ) 8008c66: 9202 str r2, [sp, #8] 8008c68: f103 0210 add.w r2, r3, #16 8008c6c: e892 0003 ldmia.w r2, {r0, r1} 8008c70: e88d 0003 stmia.w sp, {r0, r1} 8008c74: cb0f ldmia r3, {r0, r1, r2, r3} 8008c76: f7fe fb7b bl 8007370 Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 8008c7a: 7aa3 ldrb r3, [r4, #10] 8008c7c: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 8008c7e: 7ae2 ldrb r2, [r4, #11] 8008c80: 7aeb ldrb r3, [r5, #11] 8008c82: 4293 cmp r3, r2 8008c84: d00c beq.n 8008ca0 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008c86: 4b7a ldr r3, [pc, #488] ; (8008e70 ) 8008c88: 9202 str r2, [sp, #8] 8008c8a: f103 0210 add.w r2, r3, #16 8008c8e: e892 0003 ldmia.w r2, {r0, r1} 8008c92: e88d 0003 stmia.w sp, {r0, r1} 8008c96: cb0f ldmia r3, {r0, r1, r2, r3} 8008c98: f7fe fb6a bl 8007370 Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008c9c: 7ae3 ldrb r3, [r4, #11] 8008c9e: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008ca0: 7b22 ldrb r2, [r4, #12] 8008ca2: 7b2b ldrb r3, [r5, #12] 8008ca4: 4293 cmp r3, r2 8008ca6: d00c beq.n 8008cc2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008ca8: 4b72 ldr r3, [pc, #456] ; (8008e74 ) 8008caa: 9202 str r2, [sp, #8] 8008cac: f103 0210 add.w r2, r3, #16 8008cb0: e892 0003 ldmia.w r2, {r0, r1} 8008cb4: e88d 0003 stmia.w sp, {r0, r1} 8008cb8: cb0f ldmia r3, {r0, r1, r2, r3} 8008cba: f7fe fb59 bl 8007370 Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008cbe: 7b23 ldrb r3, [r4, #12] 8008cc0: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 8008cc2: 7b62 ldrb r2, [r4, #13] 8008cc4: 7b6b ldrb r3, [r5, #13] 8008cc6: 4293 cmp r3, r2 8008cc8: d00c beq.n 8008ce4 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008cca: 4b6b ldr r3, [pc, #428] ; (8008e78 ) 8008ccc: 9202 str r2, [sp, #8] 8008cce: f103 0210 add.w r2, r3, #16 8008cd2: e892 0003 ldmia.w r2, {r0, r1} 8008cd6: e88d 0003 stmia.w sp, {r0, r1} 8008cda: cb0f ldmia r3, {r0, r1, r2, r3} 8008cdc: f7fe fb48 bl 8007370 Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008ce0: 7b63 ldrb r3, [r4, #13] 8008ce2: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 8008ce4: 7ba2 ldrb r2, [r4, #14] 8008ce6: 7bab ldrb r3, [r5, #14] 8008ce8: 4293 cmp r3, r2 8008cea: d00c beq.n 8008d06 BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008cec: 4b63 ldr r3, [pc, #396] ; (8008e7c ) 8008cee: 9202 str r2, [sp, #8] 8008cf0: f103 0210 add.w r2, r3, #16 8008cf4: e892 0003 ldmia.w r2, {r0, r1} 8008cf8: e88d 0003 stmia.w sp, {r0, r1} 8008cfc: cb0f ldmia r3, {r0, r1, r2, r3} 8008cfe: f7fe fb37 bl 8007370 Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 8008d02: 7ba3 ldrb r3, [r4, #14] 8008d04: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 8008d06: 7be2 ldrb r2, [r4, #15] 8008d08: 7beb ldrb r3, [r5, #15] 8008d0a: 4293 cmp r3, r2 8008d0c: d00c beq.n 8008d28 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008d0e: 4b5c ldr r3, [pc, #368] ; (8008e80 ) 8008d10: 9202 str r2, [sp, #8] 8008d12: f103 0210 add.w r2, r3, #16 8008d16: e892 0003 ldmia.w r2, {r0, r1} 8008d1a: e88d 0003 stmia.w sp, {r0, r1} 8008d1e: cb0f ldmia r3, {r0, r1, r2, r3} 8008d20: f7fe fb26 bl 8007370 Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 8008d24: 7be3 ldrb r3, [r4, #15] 8008d26: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_DL] != data_buf[INDEX_ATT_3_5G_DL]) 8008d28: 7c23 ldrb r3, [r4, #16] 8008d2a: 7c2a ldrb r2, [r5, #16] 8008d2c: 429a cmp r2, r3 8008d2e: d10f bne.n 8008d50 ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL]) 8008d30: 7c69 ldrb r1, [r5, #17] 8008d32: 7c62 ldrb r2, [r4, #17] 8008d34: 4291 cmp r1, r2 8008d36: d10b bne.n 8008d50 ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 8008d38: 7ca9 ldrb r1, [r5, #18] 8008d3a: 7ca2 ldrb r2, [r4, #18] 8008d3c: 4291 cmp r1, r2 8008d3e: d107 bne.n 8008d50 ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 8008d40: 7ce9 ldrb r1, [r5, #19] 8008d42: 7ce2 ldrb r2, [r4, #19] 8008d44: 4291 cmp r1, r2 8008d46: d103 bne.n 8008d50 ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3]) 8008d48: 7d29 ldrb r1, [r5, #20] 8008d4a: 7d22 ldrb r2, [r4, #20] 8008d4c: 4291 cmp r1, r2 8008d4e: d01c beq.n 8008d8a ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_DL] = data_buf[INDEX_ATT_3_5G_DL]; 8008d50: 4e4c ldr r6, [pc, #304] ; (8008e84 ) 8008d52: 742b strb r3, [r5, #16] 8008d54: 7633 strb r3, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 8008d56: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d58: 227c movs r2, #124 ; 0x7c ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 8008d5a: 746b strb r3, [r5, #17] 8008d5c: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d60: 7ca3 ldrb r3, [r4, #18] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d62: f106 0110 add.w r1, r6, #16 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d66: 74ab strb r3, [r5, #18] 8008d68: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008d6c: 7ce3 ldrb r3, [r4, #19] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d6e: 4668 mov r0, sp ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008d70: 74eb strb r3, [r5, #19] 8008d72: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; 8008d76: 7d23 ldrb r3, [r4, #20] 8008d78: 752b strb r3, [r5, #20] 8008d7a: f886 3088 strb.w r3, [r6, #136] ; 0x88 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d7e: f000 fbbd bl 80094fc 8008d82: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008d86: f7fe fb97 bl 80074b8 } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 8008d8a: 7d62 ldrb r2, [r4, #21] 8008d8c: 7d6b ldrb r3, [r5, #21] 8008d8e: 4293 cmp r3, r2 8008d90: d01d beq.n 8008dce && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008d92: 7da3 ldrb r3, [r4, #22] 8008d94: 7da9 ldrb r1, [r5, #22] 8008d96: 4299 cmp r1, r3 8008d98: d019 beq.n 8008dce ){ Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H]; 8008d9a: 756a strb r2, [r5, #21] Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L]; 8008d9c: 75ab strb r3, [r5, #22] temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); 8008d9e: 7d60 ldrb r0, [r4, #21] 8008da0: 7da3 ldrb r3, [r4, #22] ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092); 8008da2: ea43 2300 orr.w r3, r3, r0, lsl #8 8008da6: 4838 ldr r0, [pc, #224] ; (8008e88 ) 8008da8: 4358 muls r0, r3 8008daa: f7ff fba5 bl 80084f8 8008dae: 4a37 ldr r2, [pc, #220] ; (8008e8c ) 8008db0: 4b37 ldr r3, [pc, #220] ; (8008e90 ) 8008db2: 9204 str r2, [sp, #16] 8008db4: f44f 6282 mov.w r2, #1040 ; 0x410 8008db8: 9003 str r0, [sp, #12] 8008dba: 9202 str r2, [sp, #8] 8008dbc: f103 0210 add.w r2, r3, #16 8008dc0: e892 0003 ldmia.w r2, {r0, r1} 8008dc4: e88d 0003 stmia.w sp, {r0, r1} 8008dc8: cb0f ldmia r3, {r0, r1, r2, r3} 8008dca: f7ff fb9d bl 8008508 } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 8008dce: 7de3 ldrb r3, [r4, #23] 8008dd0: 7dea ldrb r2, [r5, #23] 8008dd2: 429a cmp r2, r3 8008dd4: d01b beq.n 8008e0e && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 8008dd6: 7e20 ldrb r0, [r4, #24] 8008dd8: 7e2a ldrb r2, [r5, #24] 8008dda: 4282 cmp r2, r0 8008ddc: d017 beq.n 8008e0e temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H]; 8008dde: 75eb strb r3, [r5, #23] Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L]; 8008de0: 7628 strb r0, [r5, #24] ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008de2: ea40 2003 orr.w r0, r0, r3, lsl #8 8008de6: 4b28 ldr r3, [pc, #160] ; (8008e88 ) 8008de8: 4358 muls r0, r3 8008dea: f7ff fb85 bl 80084f8 8008dee: 4a27 ldr r2, [pc, #156] ; (8008e8c ) 8008df0: 4b28 ldr r3, [pc, #160] ; (8008e94 ) 8008df2: 9204 str r2, [sp, #16] 8008df4: f44f 6282 mov.w r2, #1040 ; 0x410 8008df8: 9003 str r0, [sp, #12] 8008dfa: 9202 str r2, [sp, #8] 8008dfc: f103 0210 add.w r2, r3, #16 8008e00: e892 0003 ldmia.w r2, {r0, r1} 8008e04: e88d 0003 stmia.w sp, {r0, r1} 8008e08: cb0f ldmia r3, {r0, r1, r2, r3} 8008e0a: f7ff fb7d bl 8008508 } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) 8008e0e: 7e63 ldrb r3, [r4, #25] 8008e10: 7e6a ldrb r2, [r5, #25] 8008e12: 429a cmp r2, r3 8008e14: d042 beq.n 8008e9c && (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ 8008e16: 7ea0 ldrb r0, [r4, #26] 8008e18: 7eaa ldrb r2, [r5, #26] 8008e1a: 4282 cmp r2, r0 8008e1c: d03e beq.n 8008e9c temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H]; 8008e1e: 766b strb r3, [r5, #25] Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L]; 8008e20: 76a8 strb r0, [r5, #26] ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008e22: ea40 2003 orr.w r0, r0, r3, lsl #8 8008e26: 4b18 ldr r3, [pc, #96] ; (8008e88 ) 8008e28: 4358 muls r0, r3 8008e2a: f7ff fb65 bl 80084f8 8008e2e: 4a17 ldr r2, [pc, #92] ; (8008e8c ) 8008e30: 4b19 ldr r3, [pc, #100] ; (8008e98 ) 8008e32: 9204 str r2, [sp, #16] 8008e34: f44f 6282 mov.w r2, #1040 ; 0x410 8008e38: 9003 str r0, [sp, #12] 8008e3a: 9202 str r2, [sp, #8] 8008e3c: f103 0210 add.w r2, r3, #16 8008e40: e892 0003 ldmia.w r2, {r0, r1} 8008e44: e88d 0003 stmia.w sp, {r0, r1} 8008e48: cb0f ldmia r3, {r0, r1, r2, r3} 8008e4a: f7ff fb5d bl 8008508 8008e4e: e025 b.n 8008e9c 8008e50: 2000056c .word 0x2000056c 8008e54: 20000008 .word 0x20000008 8008e58: 20000020 .word 0x20000020 8008e5c: 20000038 .word 0x20000038 8008e60: 20000050 .word 0x20000050 8008e64: 20000068 .word 0x20000068 8008e68: 20000080 .word 0x20000080 8008e6c: 20000098 .word 0x20000098 8008e70: 200000b0 .word 0x200000b0 8008e74: 200000c8 .word 0x200000c8 8008e78: 200000e0 .word 0x200000e0 8008e7c: 200000f8 .word 0x200000f8 8008e80: 20000110 .word 0x20000110 8008e84: 200004e0 .word 0x200004e0 8008e88: 000186a0 .word 0x000186a0 8008e8c: 009f8092 .word 0x009f8092 8008e90: 200001a0 .word 0x200001a0 8008e94: 200001b8 .word 0x200001b8 8008e98: 200001d0 .word 0x200001d0 } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) 8008e9c: 7ee2 ldrb r2, [r4, #27] 8008e9e: 7eeb ldrb r3, [r5, #27] 8008ea0: 4293 cmp r3, r2 8008ea2: d01d beq.n 8008ee0 && (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ 8008ea4: 7f23 ldrb r3, [r4, #28] 8008ea6: 7f29 ldrb r1, [r5, #28] 8008ea8: 4299 cmp r1, r3 8008eaa: d019 beq.n 8008ee0 Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H]; 8008eac: 76ea strb r2, [r5, #27] Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L]; 8008eae: 772b strb r3, [r5, #28] temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); 8008eb0: 7ee0 ldrb r0, [r4, #27] 8008eb2: 7f23 ldrb r3, [r4, #28] ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008eb4: ea43 2300 orr.w r3, r3, r0, lsl #8 8008eb8: 48c7 ldr r0, [pc, #796] ; (80091d8 ) 8008eba: 4358 muls r0, r3 8008ebc: f7ff fb1c bl 80084f8 8008ec0: 4ac6 ldr r2, [pc, #792] ; (80091dc ) 8008ec2: 4bc7 ldr r3, [pc, #796] ; (80091e0 ) 8008ec4: 9204 str r2, [sp, #16] 8008ec6: f44f 6282 mov.w r2, #1040 ; 0x410 8008eca: 9003 str r0, [sp, #12] 8008ecc: 9202 str r2, [sp, #8] 8008ece: f103 0210 add.w r2, r3, #16 8008ed2: e892 0003 ldmia.w r2, {r0, r1} 8008ed6: e88d 0003 stmia.w sp, {r0, r1} 8008eda: cb0f ldmia r3, {r0, r1, r2, r3} 8008edc: f7ff fb14 bl 8008508 } if((Prev_data[INDEX_PLL_3_5G_DL_H] != data_buf[INDEX_PLL_3_5G_DL_H]) 8008ee0: 7f62 ldrb r2, [r4, #29] 8008ee2: 7f6b ldrb r3, [r5, #29] 8008ee4: 4293 cmp r3, r2 8008ee6: d027 beq.n 8008f38 && (Prev_data[INDEX_PLL_3_5G_DL_L] != data_buf[INDEX_PLL_3_5G_DL_L])){ 8008ee8: 7fa3 ldrb r3, [r4, #30] 8008eea: 7fa9 ldrb r1, [r5, #30] 8008eec: 4299 cmp r1, r3 8008eee: d023 beq.n 8008f38 Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]; Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L]; 8008ef0: 77ab strb r3, [r5, #30] temp_val = (data_buf[INDEX_PLL_3_5G_DL_H] << 8) | (data_buf[INDEX_PLL_3_5G_DL_L]); temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008ef2: f241 3388 movw r3, #5000 ; 0x1388 8008ef6: 9303 str r3, [sp, #12] 8008ef8: 2302 movs r3, #2 8008efa: 9302 str r3, [sp, #8] 8008efc: 2300 movs r3, #0 Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]; 8008efe: 776a strb r2, [r5, #29] temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f00: 4ab8 ldr r2, [pc, #736] ; (80091e4