: { 80080c8: b580 push {r7, lr} static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 80080ca: 4db0 ldr r5, [pc, #704] ; (800838c ) { 80080cc: b08c sub sp, #48 ; 0x30 HAL_Init(); 80080ce: f7fd f9e9 bl 80054a4 SystemClock_Config(); 80080d2: f7ff ffc3 bl 800805c GPIO_InitTypeDef GPIO_InitStruct = {0}; 80080d6: 2210 movs r2, #16 80080d8: 2100 movs r1, #0 80080da: a808 add r0, sp, #32 80080dc: f001 fb19 bl 8009712 __HAL_RCC_GPIOE_CLK_ENABLE(); 80080e0: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80080e2: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 80080e4: f043 0340 orr.w r3, r3, #64 ; 0x40 80080e8: 61ab str r3, [r5, #24] 80080ea: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80080ec: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 80080ee: f003 0340 and.w r3, r3, #64 ; 0x40 80080f2: 9301 str r3, [sp, #4] 80080f4: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOC_CLK_ENABLE(); 80080f6: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80080f8: 48a5 ldr r0, [pc, #660] ; (8008390 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 80080fa: f043 0310 orr.w r3, r3, #16 80080fe: 61ab str r3, [r5, #24] 8008100: 69ab ldr r3, [r5, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8008102: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8008104: f003 0310 and.w r3, r3, #16 8008108: 9302 str r3, [sp, #8] 800810a: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOF_CLK_ENABLE(); 800810c: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800810e: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 8008110: f043 0380 orr.w r3, r3, #128 ; 0x80 8008114: 61ab str r3, [r5, #24] 8008116: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008118: 2702 movs r7, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 800811a: f003 0380 and.w r3, r3, #128 ; 0x80 800811e: 9303 str r3, [sp, #12] 8008120: 9b03 ldr r3, [sp, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008122: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8008124: f04f 090c mov.w r9, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 8008128: f043 0304 orr.w r3, r3, #4 800812c: 61ab str r3, [r5, #24] 800812e: 69ab ldr r3, [r5, #24] hadc1.Init.NbrOfConversion = 14; 8008130: f04f 080e mov.w r8, #14 __HAL_RCC_GPIOA_CLK_ENABLE(); 8008134: f003 0304 and.w r3, r3, #4 8008138: 9304 str r3, [sp, #16] 800813a: 9b04 ldr r3, [sp, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 800813c: 69ab ldr r3, [r5, #24] sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 800813e: f04f 0a07 mov.w sl, #7 __HAL_RCC_GPIOB_CLK_ENABLE(); 8008142: f043 0308 orr.w r3, r3, #8 8008146: 61ab str r3, [r5, #24] 8008148: 69ab ldr r3, [r5, #24] 800814a: f003 0308 and.w r3, r3, #8 800814e: 9305 str r3, [sp, #20] 8008150: 9b05 ldr r3, [sp, #20] __HAL_RCC_GPIOD_CLK_ENABLE(); 8008152: 69ab ldr r3, [r5, #24] 8008154: f043 0320 orr.w r3, r3, #32 8008158: 61ab str r3, [r5, #24] 800815a: 69ab ldr r3, [r5, #24] 800815c: f003 0320 and.w r3, r3, #32 8008160: 9306 str r3, [sp, #24] 8008162: 9b06 ldr r3, [sp, #24] __HAL_RCC_GPIOG_CLK_ENABLE(); 8008164: 69ab ldr r3, [r5, #24] 8008166: f443 7380 orr.w r3, r3, #256 ; 0x100 800816a: 61ab str r3, [r5, #24] 800816c: 69ab ldr r3, [r5, #24] 800816e: f403 7380 and.w r3, r3, #256 ; 0x100 8008172: 9307 str r3, [sp, #28] 8008174: 9b07 ldr r3, [sp, #28] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8008176: f7fe f8ad bl 80062d4 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 800817a: 2200 movs r2, #0 800817c: f64f 41c0 movw r1, #64704 ; 0xfcc0 8008180: 4884 ldr r0, [pc, #528] ; (8008394 ) 8008182: f7fe f8a7 bl 80062d4 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8008186: 2200 movs r2, #0 8008188: f240 31f3 movw r1, #1011 ; 0x3f3 800818c: 4882 ldr r0, [pc, #520] ; (8008398 ) 800818e: f7fe f8a1 bl 80062d4 HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8008192: 2200 movs r2, #0 8008194: f648 71ff movw r1, #36863 ; 0x8fff 8008198: 4880 ldr r0, [pc, #512] ; (800839c ) 800819a: f7fe f89b bl 80062d4 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 800819e: 2200 movs r2, #0 80081a0: f647 71fc movw r1, #32764 ; 0x7ffc 80081a4: 487e ldr r0, [pc, #504] ; (80083a0 ) 80081a6: f7fe f895 bl 80062d4 HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET); 80081aa: 2200 movs r2, #0 80081ac: f44f 4100 mov.w r1, #32768 ; 0x8000 80081b0: 487c ldr r0, [pc, #496] ; (80083a4 ) 80081b2: f7fe f88f bl 80062d4 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 80081b6: 2200 movs r2, #0 80081b8: 2118 movs r1, #24 80081ba: 487b ldr r0, [pc, #492] ; (80083a8 ) 80081bc: f7fe f88a bl 80062d4 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80081c0: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80081c2: a908 add r1, sp, #32 80081c4: 4872 ldr r0, [pc, #456] ; (8008390 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80081c6: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081c8: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081ca: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081cc: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80081ce: f7fd ff8f bl 80060f0 GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 80081d2: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80081d6: a908 add r1, sp, #32 80081d8: 486e ldr r0, [pc, #440] ; (8008394 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 80081da: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081dc: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081de: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081e0: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80081e2: f7fd ff85 bl 80060f0 GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 80081e6: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80081ea: a908 add r1, sp, #32 80081ec: 486a ldr r0, [pc, #424] ; (8008398 ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 80081ee: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80081f0: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80081f2: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 80081f4: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80081f6: f7fd ff7b bl 80060f0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80081fa: a908 add r1, sp, #32 80081fc: 4866 ldr r0, [pc, #408] ; (8008398 ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 80081fe: f8cd 9020 str.w r9, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008202: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008204: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8008206: f7fd ff73 bl 80060f0 /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin PATH_EN_3_5G_L_Pin */ GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 800820a: f648 73ff movw r3, #36863 ; 0x8fff |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin |PATH_EN_3_5G_L_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800820e: a908 add r1, sp, #32 8008210: 4862 ldr r0, [pc, #392] ; (800839c ) GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8008212: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008214: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008216: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008218: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800821a: f7fd ff69 bl 80060f0 /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */ GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 800821e: f44f 5340 mov.w r3, #12288 ; 0x3000 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8008222: a908 add r1, sp, #32 8008224: 485d ldr r0, [pc, #372] ; (800839c ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8008226: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008228: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 800822a: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800822c: f7fd ff60 bl 80060f0 /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin BOOT_LED_Pin */ GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8008230: f647 73fc movw r3, #32764 ; 0x7ffc |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin |BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8008234: a908 add r1, sp, #32 8008236: 485a ldr r0, [pc, #360] ; (80083a0 ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8008238: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800823a: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800823c: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 800823e: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8008240: f7fd ff56 bl 80060f0 /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */ GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8008244: f44f 7340 mov.w r3, #768 ; 0x300 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008248: a908 add r1, sp, #32 800824a: 4852 ldr r0, [pc, #328] ; (8008394 ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 800824c: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800824e: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008250: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008252: f7fd ff4d bl 80060f0 /*Configure GPIO pin : PLL_CLK_3_5G_Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8008256: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 800825a: a908 add r1, sp, #32 800825c: 4851 ldr r0, [pc, #324] ; (80083a4 ) GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 800825e: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008260: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008262: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008264: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8008266: f7fd ff43 bl 80060f0 /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 800826a: 2318 movs r3, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800826c: a908 add r1, sp, #32 800826e: 484e ldr r0, [pc, #312] ; (80083a8 ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8008270: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008272: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008274: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008276: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008278: f7fd ff3a bl 80060f0 /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 800827c: 2360 movs r3, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800827e: a908 add r1, sp, #32 8008280: 4849 ldr r0, [pc, #292] ; (80083a8 ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8008282: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008284: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008286: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008288: f7fd ff32 bl 80060f0 __HAL_RCC_DMA1_CLK_ENABLE(); 800828c: 696b ldr r3, [r5, #20] 800828e: 4333 orrs r3, r6 8008290: 616b str r3, [r5, #20] 8008292: 696b ldr r3, [r5, #20] hadc1.Instance = ADC1; 8008294: 4d45 ldr r5, [pc, #276] ; (80083ac ) __HAL_RCC_DMA1_CLK_ENABLE(); 8008296: 4033 ands r3, r6 8008298: 9300 str r3, [sp, #0] 800829a: 9b00 ldr r3, [sp, #0] hadc1.Instance = ADC1; 800829c: 4b44 ldr r3, [pc, #272] ; (80083b0 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 800829e: 4628 mov r0, r5 hadc1.Instance = ADC1; 80082a0: 602b str r3, [r5, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 80082a2: f44f 7380 mov.w r3, #256 ; 0x100 80082a6: 60ab str r3, [r5, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80082a8: f44f 2360 mov.w r3, #917504 ; 0xe0000 hadc1.Init.ContinuousConvMode = ENABLE; 80082ac: 60ee str r6, [r5, #12] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80082ae: 61eb str r3, [r5, #28] ADC_ChannelConfTypeDef sConfig = {0}; 80082b0: 9408 str r4, [sp, #32] 80082b2: 9409 str r4, [sp, #36] ; 0x24 80082b4: 940a str r4, [sp, #40] ; 0x28 hadc1.Init.DiscontinuousConvMode = DISABLE; 80082b6: 616c str r4, [r5, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80082b8: 606c str r4, [r5, #4] hadc1.Init.NbrOfConversion = 14; 80082ba: f8c5 8010 str.w r8, [r5, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 80082be: f7fd facf bl 8005860 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082c2: a908 add r1, sp, #32 80082c4: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_1; 80082c6: 9609 str r6, [sp, #36] ; 0x24 sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 80082c8: f8cd a028 str.w sl, [sp, #40] ; 0x28 sConfig.Channel = ADC_CHANNEL_0; 80082cc: 9408 str r4, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082ce: f7fd f95b bl 8005588 sConfig.Channel = ADC_CHANNEL_1; 80082d2: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 80082d4: 2603 movs r6, #3 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082d6: a908 add r1, sp, #32 80082d8: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_2; 80082da: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082dc: f7fd f954 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082e0: a908 add r1, sp, #32 80082e2: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_2; 80082e4: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 80082e6: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082e8: f7fd f94e bl 8005588 sConfig.Channel = ADC_CHANNEL_3; 80082ec: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_4; 80082ee: 2604 movs r6, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082f0: a908 add r1, sp, #32 80082f2: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_4; 80082f4: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082f6: f7fd f947 bl 8005588 sConfig.Channel = ADC_CHANNEL_4; 80082fa: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_5; 80082fc: 2605 movs r6, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80082fe: a908 add r1, sp, #32 8008300: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_5; 8008302: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008304: f7fd f940 bl 8005588 sConfig.Channel = ADC_CHANNEL_5; 8008308: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_6; 800830a: 2606 movs r6, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800830c: a908 add r1, sp, #32 800830e: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_6; 8008310: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008312: f7fd f939 bl 8005588 sConfig.Channel = ADC_CHANNEL_6; 8008316: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 8008318: 2608 movs r6, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800831a: a908 add r1, sp, #32 800831c: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_7; 800831e: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008322: f7fd f931 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008326: a908 add r1, sp, #32 8008328: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_7; 800832a: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 800832e: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008330: f7fd f92a bl 8005588 sConfig.Channel = ADC_CHANNEL_8; 8008334: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_9; 8008336: 2609 movs r6, #9 sConfig.Rank = ADC_REGULAR_RANK_10; 8008338: f04f 0a0a mov.w sl, #10 sConfig.Rank = ADC_REGULAR_RANK_11; 800833c: 270b movs r7, #11 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800833e: a908 add r1, sp, #32 8008340: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_9; 8008342: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008344: f7fd f920 bl 8005588 sConfig.Channel = ADC_CHANNEL_9; 8008348: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_13; 800834a: 260d movs r6, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800834c: a908 add r1, sp, #32 800834e: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_10; 8008350: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008354: f7fd f918 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008358: a908 add r1, sp, #32 800835a: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_10; 800835c: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_11; 8008360: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008362: f7fd f911 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008366: a908 add r1, sp, #32 8008368: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_11; 800836a: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_12; 800836c: f8cd 9024 str.w r9, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008370: f7fd f90a bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008374: a908 add r1, sp, #32 8008376: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_13; 8008378: 9609 str r6, [sp, #36] ; 0x24 sConfig.Channel = ADC_CHANNEL_12; 800837a: f8cd 9020 str.w r9, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800837e: f7fd f903 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008382: a908 add r1, sp, #32 8008384: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_13; 8008386: 9608 str r6, [sp, #32] 8008388: e014 b.n 80083b4 800838a: bf00 nop 800838c: 40021000 .word 0x40021000 8008390: 40011800 .word 0x40011800 8008394: 40011000 .word 0x40011000 8008398: 40011c00 .word 0x40011c00 800839c: 40011400 .word 0x40011400 80083a0: 40012000 .word 0x40012000 80083a4: 40010800 .word 0x40010800 80083a8: 40010c00 .word 0x40010c00 80083ac: 2000068c .word 0x2000068c 80083b0: 40012400 .word 0x40012400 sConfig.Rank = ADC_REGULAR_RANK_14; 80083b4: f8cd 8024 str.w r8, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80083b8: f7fd f8e6 bl 8005588 huart1.Init.BaudRate = 115200; 80083bc: f44f 33e1 mov.w r3, #115200 ; 0x1c200 huart1.Instance = USART1; 80083c0: 4838 ldr r0, [pc, #224] ; (80084a4 ) huart1.Init.BaudRate = 115200; 80083c2: 4a39 ldr r2, [pc, #228] ; (80084a8 ) huart1.Init.WordLength = UART_WORDLENGTH_8B; 80083c4: 6084 str r4, [r0, #8] huart1.Init.BaudRate = 115200; 80083c6: e880 000c stmia.w r0, {r2, r3} huart1.Init.StopBits = UART_STOPBITS_1; 80083ca: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 80083cc: 6104 str r4, [r0, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80083ce: f8c0 9014 str.w r9, [r0, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80083d2: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80083d4: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 80083d6: f7fe fd1f bl 8006e18 htim6.Init.Prescaler = 5600-1; 80083da: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 80083de: 4e33 ldr r6, [pc, #204] ; (80084ac ) htim6.Init.Prescaler = 5600-1; 80083e0: 4933 ldr r1, [pc, #204] ; (80084b0 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80083e2: 4630 mov r0, r6 htim6.Init.Prescaler = 5600-1; 80083e4: e886 000a stmia.w r6, {r1, r3} TIM_MasterConfigTypeDef sMasterConfig = {0}; 80083e8: 9408 str r4, [sp, #32] 80083ea: 9409 str r4, [sp, #36] ; 0x24 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 80083ec: 60b4 str r4, [r6, #8] htim6.Init.Period = 10; 80083ee: f8c6 a00c str.w sl, [r6, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80083f2: 61b4 str r4, [r6, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80083f4: f7fe fbfe bl 8006bf4 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80083f8: a908 add r1, sp, #32 80083fa: 4630 mov r0, r6 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80083fc: 9408 str r4, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80083fe: 9409 str r4, [sp, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8008400: f7fe fc12 bl 8006c28 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8008404: 4622 mov r2, r4 8008406: 4621 mov r1, r4 8008408: 2025 movs r0, #37 ; 0x25 800840a: f7fd fb2d bl 8005a68 HAL_NVIC_EnableIRQ(USART1_IRQn); 800840e: 2025 movs r0, #37 ; 0x25 8008410: f7fd fb5e bl 8005ad0 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8008414: 4622 mov r2, r4 8008416: 4621 mov r1, r4 8008418: 2036 movs r0, #54 ; 0x36 800841a: f7fd fb25 bl 8005a68 HAL_NVIC_EnableIRQ(TIM6_IRQn); 800841e: 2036 movs r0, #54 ; 0x36 8008420: f7fd fb56 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8008424: 4622 mov r2, r4 8008426: 4621 mov r1, r4 8008428: 4638 mov r0, r7 800842a: f7fd fb1d bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 800842e: 4638 mov r0, r7 8008430: f7fd fb4e bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 8008434: 4622 mov r2, r4 8008436: 4621 mov r1, r4 8008438: 4640 mov r0, r8 800843a: f7fd fb15 bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 800843e: 4640 mov r0, r8 8008440: f7fd fb46 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8008444: 4622 mov r2, r4 8008446: 4621 mov r1, r4 8008448: 200f movs r0, #15 800844a: f7fd fb0d bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 800844e: 200f movs r0, #15 8008450: f7fd fb3e bl 8005ad0 InitUartQueue(&TerminalQueue); 8008454: 4817 ldr r0, [pc, #92] ; (80084b4 ) 8008456: f000 fad7 bl 8008a08 Power_ON_OFF_Initialize(); 800845a: f7ff fd13 bl 8007e84 Path_Init(); 800845e: f7ff fc27 bl 8007cb0 while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK)); 8008462: 4628 mov r0, r5 8008464: f7fd fa86 bl 8005974 8008468: 2800 cmp r0, #0 800846a: d1fa bne.n 8008462 AD5318_Initialize(); 800846c: f7fe ff80 bl 8007370 Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]); 8008470: 4811 ldr r0, [pc, #68] ; (80084b8 ) 8008472: f7ff fc0d bl 8007c90 ADF4153_Initialize(); 8008476: f7ff fab1 bl 80079dc ADF4113_Initialize(); 800847a: f000 f825 bl 80084c8 PE43711_PinInit(); 800847e: f7ff f97f bl 8007780 BDA4601_Initialize(); 8008482: f7fe fffb bl 800747c ATTEN_PLL_PATH_Initialize(); 8008486: f7ff fceb bl 8007e60 HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14); 800848a: 220e movs r2, #14 800848c: 490b ldr r1, [pc, #44] ; (80084bc ) 800848e: 480c ldr r0, [pc, #48] ; (80084c0 ) 8008490: f7fd f936 bl 8005700 Boot_LED_Toggle(); 8008494: f7ff fd70 bl 8007f78 Uart_Check(); 8008498: f7ff fda0 bl 8007fdc ADC_Check(); 800849c: f7ff fd7e bl 8007f9c 80084a0: e7f8 b.n 8008494 80084a2: bf00 nop 80084a4: 20000700 .word 0x20000700 80084a8: 40013800 .word 0x40013800 80084ac: 20000784 .word 0x20000784 80084b0: 40001000 .word 0x40001000 80084b4: 20000bc4 .word 0x20000bc4 80084b8: 200004a0 .word 0x200004a0 80084bc: 20000610 .word 0x20000610 80084c0: 2000068c .word 0x2000068c 080084c4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80084c4: 4770 bx lr ... 080084c8 : uint16_t P; uint16_t A; uint16_t N; }Adf4113_st; void ADF4113_Initialize(void){ if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){ 80084c8: 4b10 ldr r3, [pc, #64] ; (800850c ) 80084ca: 7d9a ldrb r2, [r3, #22] 80084cc: b92a cbnz r2, 80084da 80084ce: 7dda ldrb r2, [r3, #23] 80084d0: b91a cbnz r2, 80084da Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47; 80084d2: 223e movs r2, #62 ; 0x3e 80084d4: 759a strb r2, [r3, #22] Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF); 80084d6: 2280 movs r2, #128 ; 0x80 80084d8: 75da strb r2, [r3, #23] } if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){ 80084da: 7e1a ldrb r2, [r3, #24] 80084dc: b92a cbnz r2, 80084ea 80084de: 7e5a ldrb r2, [r3, #25] 80084e0: b91a cbnz r2, 80084ea Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8); 80084e2: 2238 movs r2, #56 ; 0x38 80084e4: 761a strb r2, [r3, #24] Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF); 80084e6: 22d6 movs r2, #214 ; 0xd6 80084e8: 765a strb r2, [r3, #25] } if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){ 80084ea: 7e9a ldrb r2, [r3, #26] 80084ec: b92a cbnz r2, 80084fa 80084ee: 7eda ldrb r2, [r3, #27] 80084f0: b91a cbnz r2, 80084fa Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8); 80084f2: 224d movs r2, #77 ; 0x4d 80084f4: 769a strb r2, [r3, #26] Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF); 80084f6: 22ee movs r2, #238 ; 0xee 80084f8: 76da strb r2, [r3, #27] } if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){ 80084fa: 7f1a ldrb r2, [r3, #28] 80084fc: b92a cbnz r2, 800850a 80084fe: 7f5a ldrb r2, [r3, #29] 8008500: b91a cbnz r2, 800850a Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8); 8008502: 2259 movs r2, #89 ; 0x59 8008504: 771a strb r2, [r3, #28] Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF); 8008506: 22a6 movs r2, #166 ; 0xa6 8008508: 775a strb r2, [r3, #29] 800850a: 4770 bx lr 800850c: 200004a0 .word 0x200004a0 08008510 : A = N_val -(B * P); // printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); // printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); return N_Counter_Latch_Create(A,B,0); } uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){ 8008510: 2301 movs r3, #1 8008512: b570 push {r4, r5, r6, lr} 8008514: 2402 movs r4, #2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 8; i++){ if(_ACOUNTER & 0x01) ret += shift_bit << i; 8008516: 461d mov r5, r3 if(_ACOUNTER & 0x01) 8008518: 07c6 lsls r6, r0, #31 ret += shift_bit << i; 800851a: bf48 it mi 800851c: fa05 f604 lslmi.w r6, r5, r4 8008520: f104 0401 add.w r4, r4, #1 8008524: bf48 it mi 8008526: 199b addmi r3, r3, r6 for(i = 2; i < 8; i++){ 8008528: 2c08 cmp r4, #8 _ACOUNTER = _ACOUNTER >> 1; 800852a: ea4f 0050 mov.w r0, r0, lsr #1 for(i = 2; i < 8; i++){ 800852e: d1f3 bne.n 8008518 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 8; i < 21; i++){ if(_BCOUNTER & 0x01) ret += shift_bit << i; 8008530: 2001 movs r0, #1 if(_BCOUNTER & 0x01) 8008532: 07cd lsls r5, r1, #31 ret += shift_bit << i; 8008534: bf48 it mi 8008536: fa00 f504 lslmi.w r5, r0, r4 800853a: f104 0401 add.w r4, r4, #1 800853e: bf48 it mi 8008540: 195b addmi r3, r3, r5 for(i = 8; i < 21; i++){ 8008542: 2c15 cmp r4, #21 _BCOUNTER = _BCOUNTER >> 1; 8008544: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 8; i < 21; i++){ 8008548: d1f3 bne.n 8008532 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ if(_CPGAIN & 0x01) 800854a: 07d2 lsls r2, r2, #31 ret += shift_bit << i++; 800854c: bf48 it mi 800854e: f503 1300 addmi.w r3, r3, #2097152 ; 0x200000 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } 8008552: 4618 mov r0, r3 8008554: bd70 pop {r4, r5, r6, pc} ... 08008558 : N_val = (rf_Freq / ADF4113_CH_STEP); 8008558: f24c 3350 movw r3, #50000 ; 0xc350 800855c: fbb0 f3f3 udiv r3, r0, r3 if( N_val < ADF4113_PRE8_MIN_N) { 8008560: 2b37 cmp r3, #55 ; 0x37 8008562: d909 bls.n 8008578 B = N_val / P; 8008564: 4905 ldr r1, [pc, #20] ; (800857c ) return N_Counter_Latch_Create(A,B,0); 8008566: 2200 movs r2, #0 B = N_val / P; 8008568: fbb0 f1f1 udiv r1, r0, r1 A = N_val -(B * P); 800856c: eba3 1041 sub.w r0, r3, r1, lsl #5 return N_Counter_Latch_Create(A,B,0); 8008570: b280 uxth r0, r0 8008572: b289 uxth r1, r1 8008574: f7ff bfcc b.w 8008510 } 8008578: 2004 movs r0, #4 800857a: 4770 bx lr 800857c: 00186a00 .word 0x00186a00 08008580 : void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 8008580: b084 sub sp, #16 8008582: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008586: ac0c add r4, sp, #48 ; 0x30 8008588: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 800858c: 9b13 ldr r3, [sp, #76] ; 0x4c 800858e: f8bd 7034 ldrh.w r7, [sp, #52] ; 0x34 8008592: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008596: 9301 str r3, [sp, #4] R0 = R0 & 0xFFFFFF; 8008598: 9b12 ldr r3, [sp, #72] ; 0x48 800859a: f8dd 8038 ldr.w r8, [sp, #56] ; 0x38 800859e: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 80085a2: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80085a6: 9d10 ldr r5, [sp, #64] ; 0x40 80085a8: f8bd 6044 ldrh.w r6, [sp, #68] ; 0x44 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085ac: 2200 movs r2, #0 80085ae: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 80085b0: 9300 str r3, [sp, #0] 80085b2: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 80085b4: 9c14 ldr r4, [sp, #80] ; 0x50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085b6: f7fd fe8d bl 80062d4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085ba: 2200 movs r2, #0 80085bc: 4649 mov r1, r9 80085be: 4640 mov r0, r8 80085c0: f7fd fe88 bl 80062d4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80085c4: 2200 movs r2, #0 80085c6: 4631 mov r1, r6 80085c8: 4628 mov r0, r5 80085ca: f7fd fe83 bl 80062d4 80085ce: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 80085d2: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 80085d6: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80085da: bf18 it ne 80085dc: 2201 movne r2, #1 } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80085de: 4649 mov r1, r9 80085e0: 4640 mov r0, r8 80085e2: f7fd fe77 bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80085e6: 2201 movs r2, #1 80085e8: 4639 mov r1, r7 80085ea: 4650 mov r0, sl 80085ec: f7fd fe72 bl 80062d4 Pol_Delay_us(10); 80085f0: 200a movs r0, #10 80085f2: f7ff fcab bl 8007f4c HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80085f6: 2200 movs r2, #0 80085f8: 4639 mov r1, r7 80085fa: 4650 mov r0, sl 80085fc: f7fd fe6a bl 80062d4 R2 = ((R2 << 1) & 0xFFFFFF); 8008600: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 8008602: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 8008606: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 800860a: d1e4 bne.n 80085d6 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800860c: 2201 movs r2, #1 800860e: 4631 mov r1, r6 8008610: 4628 mov r0, r5 8008612: f7fd fe5f bl 80062d4 Pol_Delay_us(10); 8008616: 200a movs r0, #10 8008618: f7ff fc98 bl 8007f4c HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800861c: 465a mov r2, fp 800861e: 4631 mov r1, r6 8008620: 4628 mov r0, r5 8008622: f7fd fe57 bl 80062d4 8008626: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 8008628: 9b00 ldr r3, [sp, #0] #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800862a: 4649 mov r1, r9 if(R0 & 0x800000){ 800862c: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008630: bf18 it ne 8008632: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008634: 4640 mov r0, r8 8008636: f7fd fe4d bl 80062d4 #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800863a: 2201 movs r2, #1 800863c: 4639 mov r1, r7 800863e: 4650 mov r0, sl 8008640: f7fd fe48 bl 80062d4 Pol_Delay_us(10); 8008644: 200a movs r0, #10 8008646: f7ff fc81 bl 8007f4c HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800864a: 2200 movs r2, #0 800864c: 4639 mov r1, r7 800864e: 4650 mov r0, sl 8008650: f7fd fe40 bl 80062d4 R0 = ((R0 << 1) & 0xFFFFFF); 8008654: 9b00 ldr r3, [sp, #0] for(int i =0; i < 24; i++){ 8008656: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 8008658: ea4f 0343 mov.w r3, r3, lsl #1 800865c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008660: 9300 str r3, [sp, #0] for(int i =0; i < 24; i++){ 8008662: d1e1 bne.n 8008628 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008664: 2201 movs r2, #1 8008666: 4631 mov r1, r6 8008668: 4628 mov r0, r5 800866a: f7fd fe33 bl 80062d4 Pol_Delay_us(10); 800866e: 200a movs r0, #10 8008670: f7ff fc6c bl 8007f4c HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008674: 4622 mov r2, r4 8008676: 4631 mov r1, r6 8008678: 4628 mov r0, r5 800867a: f7fd fe2b bl 80062d4 800867e: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 8008680: 9b01 ldr r3, [sp, #4] } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008682: 4649 mov r1, r9 if(R1 & 0x800000){ 8008684: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008688: bf18 it ne 800868a: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800868c: 4640 mov r0, r8 800868e: f7fd fe21 bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8008692: 2201 movs r2, #1 8008694: 4639 mov r1, r7 8008696: 4650 mov r0, sl 8008698: f7fd fe1c bl 80062d4 Pol_Delay_us(10); 800869c: 200a movs r0, #10 800869e: f7ff fc55 bl 8007f4c HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80086a2: 2200 movs r2, #0 80086a4: 4639 mov r1, r7 80086a6: 4650 mov r0, sl 80086a8: f7fd fe14 bl 80062d4 R1 = ((R1 << 1) & 0xFFFFFF); 80086ac: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 80086ae: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 80086b0: ea4f 0343 mov.w r3, r3, lsl #1 80086b4: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80086b8: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 80086ba: d1e1 bne.n 8008680 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80086bc: 4631 mov r1, r6 80086be: 2201 movs r2, #1 80086c0: 4628 mov r0, r5 80086c2: f7fd fe07 bl 80062d4 Pol_Delay_us(10); 80086c6: 200a movs r0, #10 80086c8: f7ff fc40 bl 8007f4c HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80086cc: 4622 mov r2, r4 80086ce: 4631 mov r1, r6 80086d0: 4628 mov r0, r5 } 80086d2: b003 add sp, #12 80086d4: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80086d8: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80086da: f7fd bdfb b.w 80062d4 ... 080086e0 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80086e0: 4b0e ldr r3, [pc, #56] ; (800871c ) { 80086e2: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 80086e4: 699a ldr r2, [r3, #24] 80086e6: f042 0201 orr.w r2, r2, #1 80086ea: 619a str r2, [r3, #24] 80086ec: 699a ldr r2, [r3, #24] 80086ee: f002 0201 and.w r2, r2, #1 80086f2: 9200 str r2, [sp, #0] 80086f4: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 80086f6: 69da ldr r2, [r3, #28] 80086f8: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 80086fc: 61da str r2, [r3, #28] 80086fe: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8008700: 4a07 ldr r2, [pc, #28] ; (8008720 ) __HAL_RCC_PWR_CLK_ENABLE(); 8008702: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8008706: 9301 str r3, [sp, #4] 8008708: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800870a: 6853 ldr r3, [r2, #4] 800870c: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8008710: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 8008714: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8008716: b002 add sp, #8 8008718: 4770 bx lr 800871a: bf00 nop 800871c: 40021000 .word 0x40021000 8008720: 40010000 .word 0x40010000 08008724 : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008724: 2210 movs r2, #16 { 8008726: b530 push {r4, r5, lr} 8008728: 4605 mov r5, r0 800872a: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800872c: eb0d 0002 add.w r0, sp, r2 8008730: 2100 movs r1, #0 8008732: f000 ffee bl 8009712 if(hadc->Instance==ADC1) 8008736: 682a ldr r2, [r5, #0] 8008738: 4b2c ldr r3, [pc, #176] ; (80087ec ) 800873a: 429a cmp r2, r3 800873c: d153 bne.n 80087e6 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 800873e: f503 436c add.w r3, r3, #60416 ; 0xec00 8008742: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008744: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 8008746: f442 7200 orr.w r2, r2, #512 ; 0x200 800874a: 619a str r2, [r3, #24] 800874c: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800874e: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 8008750: f402 7200 and.w r2, r2, #512 ; 0x200 8008754: 9200 str r2, [sp, #0] 8008756: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 8008758: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800875a: 4825 ldr r0, [pc, #148] ; (80087f0 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 800875c: f042 0210 orr.w r2, r2, #16 8008760: 619a str r2, [r3, #24] 8008762: 699a ldr r2, [r3, #24] 8008764: f002 0210 and.w r2, r2, #16 8008768: 9201 str r2, [sp, #4] 800876a: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 800876c: 699a ldr r2, [r3, #24] 800876e: f042 0204 orr.w r2, r2, #4 8008772: 619a str r2, [r3, #24] 8008774: 699a ldr r2, [r3, #24] 8008776: f002 0204 and.w r2, r2, #4 800877a: 9202 str r2, [sp, #8] 800877c: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 800877e: 699a ldr r2, [r3, #24] 8008780: f042 0208 orr.w r2, r2, #8 8008784: 619a str r2, [r3, #24] 8008786: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008788: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 800878a: f003 0308 and.w r3, r3, #8 800878e: 9303 str r3, [sp, #12] 8008790: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 8008792: 230f movs r3, #15 8008794: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008796: f7fd fcab bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 800879a: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800879c: a904 add r1, sp, #16 800879e: 4815 ldr r0, [pc, #84] ; (80087f4 ) GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80087a0: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80087a2: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80087a4: f7fd fca4 bl 80060f0 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80087a8: 4813 ldr r0, [pc, #76] ; (80087f8 ) 80087aa: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 80087ac: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80087ae: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80087b0: f7fd fc9e bl 80060f0 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80087b4: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 80087b6: 4c11 ldr r4, [pc, #68] ; (80087fc ) 80087b8: 4b11 ldr r3, [pc, #68] ; (8008800 ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80087ba: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 80087bc: f44f 7200 mov.w r2, #512 ; 0x200 80087c0: 6122 str r2, [r4, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 80087c2: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Instance = DMA1_Channel1; 80087c6: 6023 str r3, [r4, #0] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 80087c8: 6162 str r2, [r4, #20] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 80087ca: 2300 movs r3, #0 hdma_adc1.Init.Mode = DMA_CIRCULAR; 80087cc: 2220 movs r2, #32 hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 80087ce: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 80087d0: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 80087d2: 60a3 str r3, [r4, #8] hdma_adc1.Init.Mode = DMA_CIRCULAR; 80087d4: 61a2 str r2, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 80087d6: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 80087d8: f7fd f99c bl 8005b14 80087dc: b108 cbz r0, 80087e2 { Error_Handler(); 80087de: f7ff fe71 bl 80084c4 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 80087e2: 622c str r4, [r5, #32] 80087e4: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 80087e6: b009 add sp, #36 ; 0x24 80087e8: bd30 pop {r4, r5, pc} 80087ea: bf00 nop 80087ec: 40012400 .word 0x40012400 80087f0: 40011000 .word 0x40011000 80087f4: 40010800 .word 0x40010800 80087f8: 40010c00 .word 0x40010c00 80087fc: 20000740 .word 0x20000740 8008800: 40020008 .word 0x40020008 08008804 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8008804: 6802 ldr r2, [r0, #0] 8008806: 4b08 ldr r3, [pc, #32] ; (8008828 ) { 8008808: b082 sub sp, #8 if(htim_base->Instance==TIM6) 800880a: 429a cmp r2, r3 800880c: d10a bne.n 8008824 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 800880e: f503 3300 add.w r3, r3, #131072 ; 0x20000 8008812: 69da ldr r2, [r3, #28] 8008814: f042 0210 orr.w r2, r2, #16 8008818: 61da str r2, [r3, #28] 800881a: 69db ldr r3, [r3, #28] 800881c: f003 0310 and.w r3, r3, #16 8008820: 9301 str r3, [sp, #4] 8008822: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8008824: b002 add sp, #8 8008826: 4770 bx lr 8008828: 40001000 .word 0x40001000 0800882c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 800882c: b570 push {r4, r5, r6, lr} 800882e: 4606 mov r6, r0 8008830: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008832: 2210 movs r2, #16 8008834: 2100 movs r1, #0 8008836: a802 add r0, sp, #8 8008838: f000 ff6b bl 8009712 if(huart->Instance==USART1) 800883c: 6832 ldr r2, [r6, #0] 800883e: 4b2b ldr r3, [pc, #172] ; (80088ec ) 8008840: 429a cmp r2, r3 8008842: d151 bne.n 80088e8 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8008844: f503 4358 add.w r3, r3, #55296 ; 0xd800 8008848: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800884a: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 800884c: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8008850: 619a str r2, [r3, #24] 8008852: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008854: 4826 ldr r0, [pc, #152] ; (80088f0 ) __HAL_RCC_USART1_CLK_ENABLE(); 8008856: f402 4280 and.w r2, r2, #16384 ; 0x4000 800885a: 9200 str r2, [sp, #0] 800885c: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 800885e: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008860: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8008862: f042 0204 orr.w r2, r2, #4 8008866: 619a str r2, [r3, #24] 8008868: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 800886a: 4c22 ldr r4, [pc, #136] ; (80088f4 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 800886c: f003 0304 and.w r3, r3, #4 8008870: 9301 str r3, [sp, #4] 8008872: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8008874: f44f 7300 mov.w r3, #512 ; 0x200 8008878: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800887a: 2302 movs r3, #2 800887c: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800887e: 2303 movs r3, #3 8008880: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008882: f7fd fc35 bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_10; 8008886: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800888a: 4819 ldr r0, [pc, #100] ; (80088f0 ) 800888c: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 800888e: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008890: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8008892: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008894: f7fd fc2c bl 80060f0 hdma_usart1_rx.Instance = DMA1_Channel5; 8008898: 4b17 ldr r3, [pc, #92] ; (80088f8 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 800889a: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 800889c: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80088a0: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80088a2: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80088a4: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80088a6: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80088a8: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 80088aa: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 80088ac: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80088ae: f7fd f931 bl 8005b14 80088b2: b108 cbz r0, 80088b8 { Error_Handler(); 80088b4: f7ff fe06 bl 80084c4 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80088b8: f04f 0c10 mov.w ip, #16 80088bc: 4b0f ldr r3, [pc, #60] ; (80088fc ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 80088be: 6374 str r4, [r6, #52] ; 0x34 80088c0: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 80088c2: 4c0f ldr r4, [pc, #60] ; (8008900 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80088c4: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80088c6: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 80088ca: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80088cc: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 80088ce: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80088d0: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80088d2: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80088d4: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 80088d6: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 80088d8: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80088da: f7fd f91b bl 8005b14 80088de: b108 cbz r0, 80088e4 { Error_Handler(); 80088e0: f7ff fdf0 bl 80084c4 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 80088e4: 6334 str r4, [r6, #48] ; 0x30 80088e6: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 80088e8: b006 add sp, #24 80088ea: bd70 pop {r4, r5, r6, pc} 80088ec: 40013800 .word 0x40013800 80088f0: 40010800 .word 0x40010800 80088f4: 200006bc .word 0x200006bc 80088f8: 40020058 .word 0x40020058 80088fc: 40020044 .word 0x40020044 8008900: 20000648 .word 0x20000648 08008904 : 8008904: 4770 bx lr 08008906 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8008906: e7fe b.n 8008906 08008908 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8008908: e7fe b.n 8008908 0800890a : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800890a: e7fe b.n 800890a 0800890c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 800890c: e7fe b.n 800890c 0800890e : 800890e: 4770 bx lr 08008910 : 8008910: 4770 bx lr 08008912 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8008912: 4770 bx lr 08008914 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8008914: f7fc bdd8 b.w 80054c8 08008918 : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 8008918: 4801 ldr r0, [pc, #4] ; (8008920 ) 800891a: f7fd b9e7 b.w 8005cec 800891e: bf00 nop 8008920: 20000740 .word 0x20000740 08008924 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8008924: 4801 ldr r0, [pc, #4] ; (800892c ) 8008926: f7fd b9e1 b.w 8005cec 800892a: bf00 nop 800892c: 20000648 .word 0x20000648 08008930 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8008930: 4801 ldr r0, [pc, #4] ; (8008938 ) 8008932: f7fd b9db b.w 8005cec 8008936: bf00 nop 8008938: 200006bc .word 0x200006bc 0800893c : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 800893c: 4801 ldr r0, [pc, #4] ; (8008944 ) 800893e: f7fe bc1d b.w 800717c 8008942: bf00 nop 8008944: 20000700 .word 0x20000700 08008948 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8008948: 4801 ldr r0, [pc, #4] ; (8008950 ) 800894a: f7fe b865 b.w 8006a18 800894e: bf00 nop 8008950: 20000784 .word 0x20000784 08008954 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8008954: b570 push {r4, r5, r6, lr} 8008956: 460e mov r6, r1 8008958: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800895a: 460c mov r4, r1 800895c: 1ba3 subs r3, r4, r6 800895e: 429d cmp r5, r3 8008960: dc01 bgt.n 8008966 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8008962: 4628 mov r0, r5 8008964: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 8008966: f3af 8000 nop.w 800896a: f804 0b01 strb.w r0, [r4], #1 800896e: e7f5 b.n 800895c <_read+0x8> 08008970 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8008970: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8008972: 4b0a ldr r3, [pc, #40] ; (800899c <_sbrk+0x2c>) { 8008974: 4602 mov r2, r0 if (heap_end == 0) 8008976: 6819 ldr r1, [r3, #0] 8008978: b909 cbnz r1, 800897e <_sbrk+0xe> heap_end = &end; 800897a: 4909 ldr r1, [pc, #36] ; (80089a0 <_sbrk+0x30>) 800897c: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 800897e: 4669 mov r1, sp prev_heap_end = heap_end; 8008980: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8008982: 4402 add r2, r0 8008984: 428a cmp r2, r1 8008986: d906 bls.n 8008996 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8008988: f000 fe8e bl 80096a8 <__errno> 800898c: 230c movs r3, #12 800898e: 6003 str r3, [r0, #0] return (caddr_t) -1; 8008990: f04f 30ff mov.w r0, #4294967295 8008994: bd08 pop {r3, pc} } heap_end += incr; 8008996: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8008998: bd08 pop {r3, pc} 800899a: bf00 nop 800899c: 20000460 .word 0x20000460 80089a0: 200017e4 .word 0x200017e4 080089a4 <_close>: int _close(int file) { return -1; } 80089a4: f04f 30ff mov.w r0, #4294967295 80089a8: 4770 bx lr 080089aa <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 80089aa: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 80089ae: 2000 movs r0, #0 st->st_mode = S_IFCHR; 80089b0: 604b str r3, [r1, #4] } 80089b2: 4770 bx lr 080089b4 <_isatty>: int _isatty(int file) { return 1; } 80089b4: 2001 movs r0, #1 80089b6: 4770 bx lr 080089b8 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 80089b8: 2000 movs r0, #0 80089ba: 4770 bx lr 080089bc : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 80089bc: 4b0e ldr r3, [pc, #56] ; (80089f8 ) 80089be: 681a ldr r2, [r3, #0] 80089c0: f042 0201 orr.w r2, r2, #1 80089c4: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 80089c6: 6859 ldr r1, [r3, #4] 80089c8: 4a0c ldr r2, [pc, #48] ; (80089fc ) 80089ca: 400a ands r2, r1 80089cc: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 80089ce: 681a ldr r2, [r3, #0] 80089d0: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 80089d4: f422 3280 bic.w r2, r2, #65536 ; 0x10000 80089d8: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 80089da: 681a ldr r2, [r3, #0] 80089dc: f422 2280 bic.w r2, r2, #262144 ; 0x40000 80089e0: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 80089e2: 685a ldr r2, [r3, #4] 80089e4: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80089e8: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80089ea: f44f 021f mov.w r2, #10420224 ; 0x9f0000 80089ee: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80089f0: 4a03 ldr r2, [pc, #12] ; (8008a00 ) 80089f2: 4b04 ldr r3, [pc, #16] ; (8008a04 ) 80089f4: 609a str r2, [r3, #8] 80089f6: 4770 bx lr 80089f8: 40021000 .word 0x40021000 80089fc: f8ff0000 .word 0xf8ff0000 8008a00: 08004000 .word 0x08004000 8008a04: e000ed00 .word 0xe000ed00 08008a08 : UARTQUEUE WifiQueue; uart_hal_tx_type uart_hal_tx; void InitUartQueue(pUARTQUEUE pQueue) { setbuf(stdout, NULL); 8008a08: 4b0b ldr r3, [pc, #44] ; (8008a38 ) { 8008a0a: b510 push {r4, lr} setbuf(stdout, NULL); 8008a0c: 681b ldr r3, [r3, #0] { 8008a0e: 4604 mov r4, r0 setbuf(stdout, NULL); 8008a10: 2100 movs r1, #0 8008a12: 6898 ldr r0, [r3, #8] 8008a14: f001 fb62 bl 800a0dc pQueue->data = pQueue->head = pQueue->tail = 0; 8008a18: 2300 movs r3, #0 uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 8008a1a: 4a08 ldr r2, [pc, #32] ; (8008a3c ) pQueue->data = pQueue->head = pQueue->tail = 0; 8008a1c: 6063 str r3, [r4, #4] 8008a1e: 6023 str r3, [r4, #0] 8008a20: 60a3 str r3, [r4, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008a22: 4907 ldr r1, [pc, #28] ; (8008a40 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 8008a24: f8a2 3400 strh.w r3, [r2, #1024] ; 0x400 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008a28: 4806 ldr r0, [pc, #24] ; (8008a44 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 8008a2a: f8a2 3402 strh.w r3, [r2, #1026] ; 0x402 { //_Error_Handler(__FILE__, __LINE__); } //HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1); //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1); } 8008a2e: e8bd 4010 ldmia.w sp!, {r4, lr} if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008a32: 2201 movs r2, #1 8008a34: f7fe bab4 b.w 8006fa0 8008a38: 2000024c .word 0x2000024c 8008a3c: 20000fd0 .word 0x20000fd0 8008a40: 20000bd0 .word 0x20000bd0 8008a44: 20000700 .word 0x20000700 08008a48 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a48: 4a14 ldr r2, [pc, #80] ; (8008a9c ) { 8008a4a: b538 push {r3, r4, r5, lr} uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a4c: 6810 ldr r0, [r2, #0] 8008a4e: 1c43 adds r3, r0, #1 8008a50: 6013 str r3, [r2, #0] 8008a52: 4b13 ldr r3, [pc, #76] ; (8008aa0 ) 8008a54: 6859 ldr r1, [r3, #4] 8008a56: f103 040c add.w r4, r3, #12 8008a5a: 5d0d ldrb r5, [r1, r4] 8008a5c: 4c11 ldr r4, [pc, #68] ; (8008aa4 ) #ifdef DEBUG_PRINT printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; #endif /* DEBUG_PRINT */ pQueue->tail++; 8008a5e: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a60: f5b1 6f80 cmp.w r1, #1024 ; 0x400 uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008a64: 5425 strb r5, [r4, r0] 8008a66: 4614 mov r4, r2 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a68: bfa8 it ge 8008a6a: 2200 movge r2, #0 pQueue->data--; 8008a6c: 689d ldr r5, [r3, #8] pQueue->tail++; 8008a6e: bfb8 it lt 8008a70: 6059 strlt r1, [r3, #4] pQueue->data--; 8008a72: f105 35ff add.w r5, r5, #4294967295 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008a76: bfa8 it ge 8008a78: 605a strge r2, [r3, #4] pQueue->data--; 8008a7a: 609d str r5, [r3, #8] if(pQueue->data == 0){ 8008a7c: b96d cbnz r5, 8008a9a // printf("data cnt zero !!! \r\n"); RF_Ctrl_Main(&uart_buf[Header]); 8008a7e: 4809 ldr r0, [pc, #36] ; (8008aa4 ) 8008a80: f000 fd9e bl 80095c0 #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 8008a84: 6822 ldr r2, [r4, #0] 8008a86: 4629 mov r1, r5 8008a88: 4806 ldr r0, [pc, #24] ; (8008aa4 ) 8008a8a: f000 fe42 bl 8009712 // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 8008a8e: 6025 str r5, [r4, #0] HAL_Delay(1); 8008a90: 2001 movs r0, #1 } } 8008a92: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_Delay(1); 8008a96: f7fc bd29 b.w 80054ec 8008a9a: bd38 pop {r3, r4, r5, pc} 8008a9c: 20000464 .word 0x20000464 8008aa0: 20000bc4 .word 0x20000bc4 8008aa4: 200007c4 .word 0x200007c4 08008aa8 : AdcTimerCnt = UartRxTimerCnt = 0; 8008aa8: 2300 movs r3, #0 8008aaa: 4a0f ldr r2, [pc, #60] ; (8008ae8 ) { 8008aac: b510 push {r4, lr} AdcTimerCnt = UartRxTimerCnt = 0; 8008aae: 6013 str r3, [r2, #0] pQueue->head++; 8008ab0: 4c0e ldr r4, [pc, #56] ; (8008aec ) AdcTimerCnt = UartRxTimerCnt = 0; 8008ab2: 4a0f ldr r2, [pc, #60] ; (8008af0 ) 8008ab4: 6013 str r3, [r2, #0] pQueue->head++; 8008ab6: 6822 ldr r2, [r4, #0] 8008ab8: 3201 adds r2, #1 8008aba: f5b2 6f80 cmp.w r2, #1024 ; 0x400 8008abe: bfb8 it lt 8008ac0: 4613 movlt r3, r2 8008ac2: 6023 str r3, [r4, #0] pQueue->data++; 8008ac4: 68a3 ldr r3, [r4, #8] 8008ac6: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008ac8: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 8008acc: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008ace: db01 blt.n 8008ad4 GetDataFromUartQueue(huart); 8008ad0: f7ff ffba bl 8008a48 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008ad4: 6823 ldr r3, [r4, #0] 8008ad6: 4907 ldr r1, [pc, #28] ; (8008af4 ) 8008ad8: 2201 movs r2, #1 } 8008ada: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008ade: 4419 add r1, r3 8008ae0: 4805 ldr r0, [pc, #20] ; (8008af8 ) 8008ae2: f7fe ba5d b.w 8006fa0 8008ae6: bf00 nop 8008ae8: 2000045c .word 0x2000045c 8008aec: 20000bc4 .word 0x20000bc4 8008af0: 20000450 .word 0x20000450 8008af4: 20000bd0 .word 0x20000bd0 8008af8: 20000700 .word 0x20000700 08008afc : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ 8008afc: b508 push {r3, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 8008afe: 78c3 ldrb r3, [r0, #3] 8008b00: 7881 ldrb r1, [r0, #2] 8008b02: 5cc2 ldrb r2, [r0, r3] 8008b04: 3001 adds r0, #1 8008b06: f7fe fd74 bl 80075f2 // printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); } // printf("CRC Result : \"%d\" \r\n",ret); return ret; } 8008b0a: 3000 adds r0, #0 8008b0c: bf18 it ne 8008b0e: 2001 movne r0, #1 8008b10: bd08 pop {r3, pc} ... 08008b14 : PLL_EN_3_5G_L_GPIO_Port, PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b14: 23be movs r3, #190 ; 0xbe void RF_Status_Get(void){ 8008b16: b510 push {r4, lr} Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b18: 4c0b ldr r4, [pc, #44] ; (8008b48 ) Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008b1a: 2160 movs r1, #96 ; 0x60 Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b1c: 7023 strb r3, [r4, #0] Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; 8008b1e: 2302 movs r3, #2 8008b20: 7063 strb r3, [r4, #1] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008b22: 2361 movs r3, #97 ; 0x61 Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b24: 1c60 adds r0, r4, #1 Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008b26: 70a1 strb r1, [r4, #2] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008b28: 70e3 strb r3, [r4, #3] Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b2a: f7fe fd47 bl 80075bc Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008b2e: 23eb movs r3, #235 ; 0xeb Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008b30: f884 0061 strb.w r0, [r4, #97] ; 0x61 Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008b34: f884 3062 strb.w r3, [r4, #98] ; 0x62 HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008b38: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008b3a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008b3e: 2263 movs r2, #99 ; 0x63 8008b40: 4802 ldr r0, [pc, #8] ; (8008b4c ) 8008b42: f7fe b9f3 b.w 8006f2c 8008b46: bf00 nop 8008b48: 200005ac .word 0x200005ac 8008b4c: 20000700 .word 0x20000700 08008b50 : static uint8_t Ack_Buf[6]; void RF_Status_Ack(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b50: 23be movs r3, #190 ; 0xbe void RF_Status_Ack(void){ 8008b52: b510 push {r4, lr} Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b54: 4c0a ldr r4, [pc, #40] ; (8008b80 ) Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008b56: 2103 movs r1, #3 Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008b58: 7023 strb r3, [r4, #0] Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008b5a: 2304 movs r3, #4 Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b5c: 1c60 adds r0, r4, #1 Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008b5e: 7063 strb r3, [r4, #1] Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008b60: 70a1 strb r1, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; 8008b62: 70e3 strb r3, [r4, #3] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b64: f7fe fd2a bl 80075bc Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b68: 23eb movs r3, #235 ; 0xeb HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b6a: 78a2 ldrb r2, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008b6c: 7120 strb r0, [r4, #4] Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008b6e: 7163 strb r3, [r4, #5] HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b70: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 8008b72: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008b76: 3203 adds r2, #3 8008b78: 4802 ldr r0, [pc, #8] ; (8008b84 ) 8008b7a: f7fe b9d7 b.w 8006f2c 8008b7e: bf00 nop 8008b80: 20000468 .word 0x20000468 8008b84: 20000700 .word 0x20000700 08008b88 : void RF_Operate(uint8_t* data_buf){ 8008b88: b570 push {r4, r5, r6, lr} uint32_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; // printf("Prev_data[INDEX_ATT_1_8G_DL1] : %x data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]); if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b8a: 4db5 ldr r5, [pc, #724] ; (8008e60 ) 8008b8c: 7902 ldrb r2, [r0, #4] 8008b8e: 792b ldrb r3, [r5, #4] void RF_Operate(uint8_t* data_buf){ 8008b90: b0a8 sub sp, #160 ; 0xa0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b92: 4293 cmp r3, r2 void RF_Operate(uint8_t* data_buf){ 8008b94: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008b96: d00c beq.n 8008bb2 BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008b98: 4bb2 ldr r3, [pc, #712] ; (8008e64 ) 8008b9a: 9202 str r2, [sp, #8] 8008b9c: f103 0210 add.w r2, r3, #16 8008ba0: e892 0003 ldmia.w r2, {r0, r1} 8008ba4: e88d 0003 stmia.w sp, {r0, r1} 8008ba8: cb0f ldmia r3, {r0, r1, r2, r3} 8008baa: f7fe fc0f bl 80073cc Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 8008bae: 7923 ldrb r3, [r4, #4] 8008bb0: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 8008bb2: 7962 ldrb r2, [r4, #5] 8008bb4: 796b ldrb r3, [r5, #5] 8008bb6: 4293 cmp r3, r2 8008bb8: d00c beq.n 8008bd4 BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008bba: 4bab ldr r3, [pc, #684] ; (8008e68 ) 8008bbc: 9202 str r2, [sp, #8] 8008bbe: f103 0210 add.w r2, r3, #16 8008bc2: e892 0003 ldmia.w r2, {r0, r1} 8008bc6: e88d 0003 stmia.w sp, {r0, r1} 8008bca: cb0f ldmia r3, {r0, r1, r2, r3} 8008bcc: f7fe fbfe bl 80073cc Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 8008bd0: 7963 ldrb r3, [r4, #5] 8008bd2: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 8008bd4: 79a2 ldrb r2, [r4, #6] 8008bd6: 79ab ldrb r3, [r5, #6] 8008bd8: 4293 cmp r3, r2 8008bda: d00c beq.n 8008bf6 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008bdc: 4ba3 ldr r3, [pc, #652] ; (8008e6c ) 8008bde: 9202 str r2, [sp, #8] 8008be0: f103 0210 add.w r2, r3, #16 8008be4: e892 0003 ldmia.w r2, {r0, r1} 8008be8: e88d 0003 stmia.w sp, {r0, r1} 8008bec: cb0f ldmia r3, {r0, r1, r2, r3} 8008bee: f7fe fbed bl 80073cc Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 8008bf2: 79a3 ldrb r3, [r4, #6] 8008bf4: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 8008bf6: 79e2 ldrb r2, [r4, #7] 8008bf8: 79eb ldrb r3, [r5, #7] 8008bfa: 4293 cmp r3, r2 8008bfc: d00c beq.n 8008c18 BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008bfe: 4b9c ldr r3, [pc, #624] ; (8008e70 ) 8008c00: 9202 str r2, [sp, #8] 8008c02: f103 0210 add.w r2, r3, #16 8008c06: e892 0003 ldmia.w r2, {r0, r1} 8008c0a: e88d 0003 stmia.w sp, {r0, r1} 8008c0e: cb0f ldmia r3, {r0, r1, r2, r3} 8008c10: f7fe fbdc bl 80073cc Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 8008c14: 79e3 ldrb r3, [r4, #7] 8008c16: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 8008c18: 7a22 ldrb r2, [r4, #8] 8008c1a: 7a2b ldrb r3, [r5, #8] 8008c1c: 4293 cmp r3, r2 8008c1e: d00c beq.n 8008c3a BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008c20: 4b94 ldr r3, [pc, #592] ; (8008e74 ) 8008c22: 9202 str r2, [sp, #8] 8008c24: f103 0210 add.w r2, r3, #16 8008c28: e892 0003 ldmia.w r2, {r0, r1} 8008c2c: e88d 0003 stmia.w sp, {r0, r1} 8008c30: cb0f ldmia r3, {r0, r1, r2, r3} 8008c32: f7fe fbcb bl 80073cc Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 8008c36: 7a23 ldrb r3, [r4, #8] 8008c38: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 8008c3a: 7a62 ldrb r2, [r4, #9] 8008c3c: 7a6b ldrb r3, [r5, #9] 8008c3e: 4293 cmp r3, r2 8008c40: d00c beq.n 8008c5c BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008c42: 4b8d ldr r3, [pc, #564] ; (8008e78 ) 8008c44: 9202 str r2, [sp, #8] 8008c46: f103 0210 add.w r2, r3, #16 8008c4a: e892 0003 ldmia.w r2, {r0, r1} 8008c4e: e88d 0003 stmia.w sp, {r0, r1} 8008c52: cb0f ldmia r3, {r0, r1, r2, r3} 8008c54: f7fe fbba bl 80073cc Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 8008c58: 7a63 ldrb r3, [r4, #9] 8008c5a: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 8008c5c: 7aa2 ldrb r2, [r4, #10] 8008c5e: 7aab ldrb r3, [r5, #10] 8008c60: 4293 cmp r3, r2 8008c62: d00c beq.n 8008c7e BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008c64: 4b85 ldr r3, [pc, #532] ; (8008e7c ) 8008c66: 9202 str r2, [sp, #8] 8008c68: f103 0210 add.w r2, r3, #16 8008c6c: e892 0003 ldmia.w r2, {r0, r1} 8008c70: e88d 0003 stmia.w sp, {r0, r1} 8008c74: cb0f ldmia r3, {r0, r1, r2, r3} 8008c76: f7fe fba9 bl 80073cc Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 8008c7a: 7aa3 ldrb r3, [r4, #10] 8008c7c: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 8008c7e: 7ae2 ldrb r2, [r4, #11] 8008c80: 7aeb ldrb r3, [r5, #11] 8008c82: 4293 cmp r3, r2 8008c84: d00c beq.n 8008ca0 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008c86: 4b7e ldr r3, [pc, #504] ; (8008e80 ) 8008c88: 9202 str r2, [sp, #8] 8008c8a: f103 0210 add.w r2, r3, #16 8008c8e: e892 0003 ldmia.w r2, {r0, r1} 8008c92: e88d 0003 stmia.w sp, {r0, r1} 8008c96: cb0f ldmia r3, {r0, r1, r2, r3} 8008c98: f7fe fb98 bl 80073cc Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008c9c: 7ae3 ldrb r3, [r4, #11] 8008c9e: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008ca0: 7b22 ldrb r2, [r4, #12] 8008ca2: 7b2b ldrb r3, [r5, #12] 8008ca4: 4293 cmp r3, r2 8008ca6: d00c beq.n 8008cc2 BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008ca8: 4b76 ldr r3, [pc, #472] ; (8008e84 ) 8008caa: 9202 str r2, [sp, #8] 8008cac: f103 0210 add.w r2, r3, #16 8008cb0: e892 0003 ldmia.w r2, {r0, r1} 8008cb4: e88d 0003 stmia.w sp, {r0, r1} 8008cb8: cb0f ldmia r3, {r0, r1, r2, r3} 8008cba: f7fe fb87 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008cbe: 7b23 ldrb r3, [r4, #12] 8008cc0: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 8008cc2: 7b62 ldrb r2, [r4, #13] 8008cc4: 7b6b ldrb r3, [r5, #13] 8008cc6: 4293 cmp r3, r2 8008cc8: d00c beq.n 8008ce4 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008cca: 4b6f ldr r3, [pc, #444] ; (8008e88 ) 8008ccc: 9202 str r2, [sp, #8] 8008cce: f103 0210 add.w r2, r3, #16 8008cd2: e892 0003 ldmia.w r2, {r0, r1} 8008cd6: e88d 0003 stmia.w sp, {r0, r1} 8008cda: cb0f ldmia r3, {r0, r1, r2, r3} 8008cdc: f7fe fb76 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008ce0: 7b63 ldrb r3, [r4, #13] 8008ce2: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 8008ce4: 7ba2 ldrb r2, [r4, #14] 8008ce6: 7bab ldrb r3, [r5, #14] 8008ce8: 4293 cmp r3, r2 8008cea: d00c beq.n 8008d06 BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008cec: 4b67 ldr r3, [pc, #412] ; (8008e8c ) 8008cee: 9202 str r2, [sp, #8] 8008cf0: f103 0210 add.w r2, r3, #16 8008cf4: e892 0003 ldmia.w r2, {r0, r1} 8008cf8: e88d 0003 stmia.w sp, {r0, r1} 8008cfc: cb0f ldmia r3, {r0, r1, r2, r3} 8008cfe: f7fe fb65 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 8008d02: 7ba3 ldrb r3, [r4, #14] 8008d04: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 8008d06: 7be2 ldrb r2, [r4, #15] 8008d08: 7beb ldrb r3, [r5, #15] 8008d0a: 4293 cmp r3, r2 8008d0c: d00c beq.n 8008d28 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008d0e: 4b60 ldr r3, [pc, #384] ; (8008e90 ) 8008d10: 9202 str r2, [sp, #8] 8008d12: f103 0210 add.w r2, r3, #16 8008d16: e892 0003 ldmia.w r2, {r0, r1} 8008d1a: e88d 0003 stmia.w sp, {r0, r1} 8008d1e: cb0f ldmia r3, {r0, r1, r2, r3} 8008d20: f7fe fb54 bl 80073cc Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 8008d24: 7be3 ldrb r3, [r4, #15] 8008d26: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1]) 8008d28: 7c23 ldrb r3, [r4, #16] 8008d2a: 7c2a ldrb r2, [r5, #16] 8008d2c: 429a cmp r2, r3 8008d2e: d113 bne.n 8008d58 ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1]) 8008d30: 7c69 ldrb r1, [r5, #17] 8008d32: 7c62 ldrb r2, [r4, #17] 8008d34: 4291 cmp r1, r2 8008d36: d10f bne.n 8008d58 ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 8008d38: 7ca9 ldrb r1, [r5, #18] 8008d3a: 7ca2 ldrb r2, [r4, #18] 8008d3c: 4291 cmp r1, r2 8008d3e: d10b bne.n 8008d58 ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2]) 8008d40: 7ce9 ldrb r1, [r5, #19] 8008d42: 7ce2 ldrb r2, [r4, #19] 8008d44: 4291 cmp r1, r2 8008d46: d107 bne.n 8008d58 ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2]) 8008d48: 7d29 ldrb r1, [r5, #20] 8008d4a: 7d22 ldrb r2, [r4, #20] 8008d4c: 4291 cmp r1, r2 8008d4e: d103 bne.n 8008d58 ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 8008d50: 7d69 ldrb r1, [r5, #21] 8008d52: 7d62 ldrb r2, [r4, #21] 8008d54: 4291 cmp r1, r2 8008d56: d020 beq.n 8008d9a ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1] = data_buf[INDEX_ATT_3_5G_LOW1]; 8008d58: 4e4e ldr r6, [pc, #312] ; (8008e94 ) 8008d5a: 742b strb r3, [r5, #16] 8008d5c: 7633 strb r3, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008d5e: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d60: 2298 movs r2, #152 ; 0x98 ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008d62: 746b strb r3, [r5, #17] 8008d64: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d68: 7ca3 ldrb r3, [r4, #18] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d6a: f106 0110 add.w r1, r6, #16 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008d6e: 74ab strb r3, [r5, #18] 8008d70: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008d74: 7ce3 ldrb r3, [r4, #19] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d76: 4668 mov r0, sp ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008d78: 74eb strb r3, [r5, #19] 8008d7a: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; 8008d7e: 7d23 ldrb r3, [r4, #20] 8008d80: 752b strb r3, [r5, #20] 8008d82: f886 3088 strb.w r3, [r6, #136] ; 0x88 ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008d86: 7d63 ldrb r3, [r4, #21] 8008d88: 756b strb r3, [r5, #21] 8008d8a: f886 30a4 strb.w r3, [r6, #164] ; 0xa4 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008d8e: f000 fcb5 bl 80096fc 8008d92: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008d96: f7fe fc5b bl 8007650 } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 8008d9a: 7da3 ldrb r3, [r4, #22] 8008d9c: 7daa ldrb r2, [r5, #22] 8008d9e: 429a cmp r2, r3 8008da0: d103 bne.n 8008daa || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008da2: 7de9 ldrb r1, [r5, #23] 8008da4: 7de2 ldrb r2, [r4, #23] 8008da6: 4291 cmp r1, r2 8008da8: d035 beq.n 8008e16 ){ Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H]; 8008daa: 75ab strb r3, [r5, #22] Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L]; 8008dac: 7de3 ldrb r3, [r4, #23] 8008dae: 75eb strb r3, [r5, #23] // printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]); // printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]); temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); 8008db0: 7da0 ldrb r0, [r4, #22] 8008db2: 7de3 ldrb r3, [r4, #23] 8008db4: ea43 2300 orr.w r3, r3, r0, lsl #8 ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008db8: 4837 ldr r0, [pc, #220] ; (8008e98 ) 8008dba: 4358 muls r0, r3 8008dbc: f7ff fbcc bl 8008558 8008dc0: 4a36 ldr r2, [pc, #216] ; (8008e9c ) 8008dc2: 4b37 ldr r3, [pc, #220] ; (8008ea0 ) 8008dc4: 9204 str r2, [sp, #16] 8008dc6: f44f 6282 mov.w r2, #1040 ; 0x410 8008dca: 9003 str r0, [sp, #12] 8008dcc: 9202 str r2, [sp, #8] 8008dce: f103 0210 add.w r2, r3, #16 8008dd2: e892 0003 ldmia.w r2, {r0, r1} 8008dd6: e88d 0003 stmia.w sp, {r0, r1} 8008dda: cb0f ldmia r3, {r0, r1, r2, r3} 8008ddc: f7ff fbd0 bl 8008580 HAL_Delay(1); 8008de0: 2001 movs r0, #1 8008de2: f7fc fb83 bl 80054ec BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008de6: 7922 ldrb r2, [r4, #4] 8008de8: 4b1e ldr r3, [pc, #120] ; (8008e64 ) 8008dea: 9202 str r2, [sp, #8] 8008dec: f103 0210 add.w r2, r3, #16 8008df0: e892 0003 ldmia.w r2, {r0, r1} 8008df4: e88d 0003 stmia.w sp, {r0, r1} 8008df8: cb0f ldmia r3, {r0, r1, r2, r3} 8008dfa: f7fe fae7 bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008dfe: 4b1a ldr r3, [pc, #104] ; (8008e68 ) 8008e00: 7962 ldrb r2, [r4, #5] 8008e02: 9202 str r2, [sp, #8] 8008e04: f103 0210 add.w r2, r3, #16 8008e08: e892 0003 ldmia.w r2, {r0, r1} 8008e0c: e88d 0003 stmia.w sp, {r0, r1} 8008e10: cb0f ldmia r3, {r0, r1, r2, r3} 8008e12: f7fe fadb bl 80073cc } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 8008e16: 7e23 ldrb r3, [r4, #24] 8008e18: 7e2a ldrb r2, [r5, #24] 8008e1a: 7e60 ldrb r0, [r4, #25] 8008e1c: 429a cmp r2, r3 8008e1e: d102 bne.n 8008e26 || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 8008e20: 7e6a ldrb r2, [r5, #25] 8008e22: 4282 cmp r2, r0 8008e24: d070 beq.n 8008f08 temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); // printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]); // printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]); Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H]; 8008e26: 762b strb r3, [r5, #24] Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L]; 8008e28: 7668 strb r0, [r5, #25] temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); 8008e2a: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008e2e: 4b1a ldr r3, [pc, #104] ; (8008e98 ) 8008e30: 4358 muls r0, r3 8008e32: f7ff fb91 bl 8008558 8008e36: 4a19 ldr r2, [pc, #100] ; (8008e9c ) 8008e38: 4b1a ldr r3, [pc, #104] ; (8008ea4 ) 8008e3a: 9204 str r2, [sp, #16] 8008e3c: f44f 6282 mov.w r2, #1040 ; 0x410 8008e40: 9003 str r0, [sp, #12] 8008e42: 9202 str r2, [sp, #8] 8008e44: f103 0210 add.w r2, r3, #16 8008e48: e892 0003 ldmia.w r2, {r0, r1} 8008e4c: e88d 0003 stmia.w sp, {r0, r1} 8008e50: cb0f ldmia r3, {r0, r1, r2, r3} 8008e52: f7ff fb95 bl 8008580 HAL_Delay(1); 8008e56: 2001 movs r0, #1 8008e58: f7fc fb48 bl 80054ec 8008e5c: e024 b.n 8008ea8 8008e5e: bf00 nop 8008e60: 200005ac .word 0x200005ac 8008e64: 20000008 .word 0x20000008 8008e68: 20000020 .word 0x20000020 8008e6c: 20000038 .word 0x20000038 8008e70: 20000050 .word 0x20000050 8008e74: 20000068 .word 0x20000068 8008e78: 20000080 .word 0x20000080 8008e7c: 20000098 .word 0x20000098 8008e80: 200000b0 .word 0x200000b0 8008e84: 200000c8 .word 0x200000c8 8008e88: 200000e0 .word 0x200000e0 8008e8c: 200000f8 .word 0x200000f8 8008e90: 20000110 .word 0x20000110 8008e94: 20000504 .word 0x20000504 8008e98: 000186a0 .word 0x000186a0 8008e9c: 009f8092 .word 0x009f8092 8008ea0: 200001b8 .word 0x200001b8 8008ea4: 200001d0 .word 0x200001d0 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008ea8: 79a2 ldrb r2, [r4, #6] 8008eaa: 4bc5 ldr r3, [pc, #788] ; (80091c0 ) 8008eac: 9202 str r2, [sp, #8] 8008eae: f103 0210 add.w r2, r3, #16 8008eb2: e892 0003 ldmia.w r2, {r0, r1} 8008eb6: e88d 0003 stmia.w sp, {r0, r1} 8008eba: cb0f ldmia r3, {r0, r1, r2, r3} 8008ebc: f7fe fa86 bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008ec0: 79e2 ldrb r2, [r4, #7] 8008ec2: 4bc0 ldr r3, [pc, #768] ; (80091c4 ) 8008ec4: 9202 str r2, [sp, #8] 8008ec6: f103 0210 add.w r2, r3, #16 8008eca: e892 0003 ldmia.w r2, {r0, r1} 8008ece: e88d 0003 stmia.w sp, {r0, r1} 8008ed2: cb0f ldmia r3, {r0, r1, r2, r3} 8008ed4: f7fe fa7a bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008ed8: 7a22 ldrb r2, [r4, #8] 8008eda: 4bbb ldr r3, [pc, #748] ; (80091c8 ) 8008edc: 9202 str r2, [sp, #8] 8008ede: f103 0210 add.w r2, r3, #16 8008ee2: e892 0003 ldmia.w r2, {r0, r1} 8008ee6: e88d 0003 stmia.w sp, {r0, r1} 8008eea: cb0f ldmia r3, {r0, r1, r2, r3} 8008eec: f7fe fa6e bl 80073cc BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008ef0: 4bb6 ldr r3, [pc, #728] ; (80091cc ) 8008ef2: 7a62 ldrb r2, [r4, #9] 8008ef4: 9202 str r2, [sp, #8] 8008ef6: f103 0210 add.w r2, r3, #16 8008efa: e892 0003 ldmia.w r2, {r0, r1} 8008efe: e88d 0003 stmia.w sp, {r0, r1} 8008f02: cb0f ldmia r3, {r0, r1, r2, r3} 8008f04: f7fe fa62 bl 80073cc } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) 8008f08: 7ea3 ldrb r3, [r4, #26] 8008f0a: 7eaa ldrb r2, [r5, #26] 8008f0c: 7ee0 ldrb r0, [r4, #27] 8008f0e: 429a cmp r2, r3 8008f10: d102 bne.n 8008f18 || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ 8008f12: 7eea ldrb r2, [r5, #27] 8008f14: 4282 cmp r2, r0 8008f16: d032 beq.n 8008f7e temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); // printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]); // printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]); Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H]; 8008f18: 76ab strb r3, [r5, #26] Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L]; 8008f1a: 76e8 strb r0, [r5, #27] temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); 8008f1c: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092); ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008f20: 4bab ldr r3, [pc, #684] ; (80091d0 ) 8008f22: 4358 muls r0, r3 8008f24: f7ff fb18 bl 8008558 8008f28: 4aaa ldr r2, [pc, #680] ; (80091d4 ) 8008f2a: 4bab ldr r3, [pc, #684] ; (80091d8 ) 8008f2c: 9204 str r2, [sp, #16] 8008f2e: f44f 6282 mov.w r2, #1040 ; 0x410 8008f32: 9003 str r0, [sp, #12] 8008f34: 9202 str r2, [sp, #8] 8008f36: f103 0210 add.w r2, r3, #16 8008f3a: e892 0003 ldmia.w r2, {r0, r1} 8008f3e: e88d 0003 stmia.w sp, {r0, r1} 8008f42: cb0f ldmia r3, {r0, r1, r2, r3} 8008f44: f7ff fb1c bl 8008580 HAL_Delay(1); 8008f48: 2001 movs r0, #1 8008f4a: f7fc facf bl 80054ec BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008f4e: 7aa2 ldrb r2, [r4, #10] 8008f50: 4ba2 ldr r3, [pc, #648] ; (80091dc ) 8008f52: 9202 str r2, [sp, #8] 8008f54: f103 0210 add.w r2, r3, #16 8008f58: e892 0003 ldmia.w r2, {r0, r1} 8008f5c: e88d 0003 stmia.w sp, {r0, r1} 8008f60: cb0f ldmia r3, {r0, r1, r2, r3} 8008f62: f7fe fa33 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008f66: 4b9e ldr r3, [pc, #632] ; (80091e0 ) 8008f68: 7ae2 ldrb r2, [r4, #11] 8008f6a: 9202 str r2, [sp, #8] 8008f6c: f103 0210 add.w r2, r3, #16 8008f70: e892 0003 ldmia.w r2, {r0, r1} 8008f74: e88d 0003 stmia.w sp, {r0, r1} 8008f78: cb0f ldmia r3, {r0, r1, r2, r3} 8008f7a: f7fe fa27 bl 80073cc } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) 8008f7e: 7f23 ldrb r3, [r4, #28] 8008f80: 7f2a ldrb r2, [r5, #28] 8008f82: 429a cmp r2, r3 8008f84: d103 bne.n 8008f8e || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ 8008f86: 7f69 ldrb r1, [r5, #29] 8008f88: 7f62 ldrb r2, [r4, #29] 8008f8a: 4291 cmp r1, r2 8008f8c: d04d beq.n 800902a Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H]; 8008f8e: 772b strb r3, [r5, #28] Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L]; 8008f90: 7f63 ldrb r3, [r4, #29] 8008f92: 776b strb r3, [r5, #29] // printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]); // printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]); temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); 8008f94: 7f20 ldrb r0, [r4, #28] 8008f96: 7f63 ldrb r3, [r4, #29] 8008f98: ea43 2300 orr.w r3, r3, r0, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008f9c: 488c ldr r0, [pc, #560] ; (80091d0 ) 8008f9e: 4358 muls r0, r3 8008fa0: f7ff fada bl 8008558 8008fa4: 4a8b ldr r2, [pc, #556] ; (80091d4 ) 8008fa6: 4b8f ldr r3, [pc, #572] ; (80091e4 ) 8008fa8: 9204 str r2, [sp, #16] 8008faa: f44f 6282 mov.w r2, #1040 ; 0x410 8008fae: 9003 str r0, [sp, #12] 8008fb0: 9202 str r2, [sp, #8] 8008fb2: f103 0210 add.w r2, r3, #16 8008fb6: e892 0003 ldmia.w r2, {r0, r1} 8008fba: e88d 0003 stmia.w sp, {r0, r1} 8008fbe: cb0f ldmia r3, {r0, r1, r2, r3} 8008fc0: f7ff fade bl 8008580 HAL_Delay(1); 8008fc4: 2001 movs r0, #1 8008fc6: f7fc fa91 bl 80054ec BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008fca: 7b22 ldrb r2, [r4, #12] 8008fcc: 4b86 ldr r3, [pc, #536] ; (80091e8 ) 8008fce: 9202 str r2, [sp, #8] 8008fd0: f103 0210 add.w r2, r3, #16 8008fd4: e892 0003 ldmia.w r2, {r0, r1} 8008fd8: e88d 0003 stmia.w sp, {r0, r1} 8008fdc: cb0f ldmia r3, {r0, r1, r2, r3} 8008fde: f7fe f9f5 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008fe2: 7b62 ldrb r2, [r4, #13] 8008fe4: 4b81 ldr r3, [pc, #516] ; (80091ec ) 8008fe6: 9202 str r2, [sp, #8] 8008fe8: f103 0210 add.w r2, r3, #16 8008fec: e892 0003 ldmia.w r2, {r0, r1} 8008ff0: e88d 0003 stmia.w sp, {r0, r1} 8008ff4: cb0f ldmia r3, {r0, r1, r2, r3} 8008ff6: f7fe f9e9 bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008ffa: 7ba2 ldrb r2, [r4, #14] 8008ffc: 4b7c ldr r3, [pc, #496] ; (80091f0 ) 8008ffe: 9202 str r2, [sp, #8] 8009000: f103 0210 add.w r2, r3, #16 8009004: e892 0003 ldmia.w r2, {r0, r1} 8009008: e88d 0003 stmia.w sp, {r0, r1} 800900c: cb0f ldmia r3, {r0, r1, r2, r3} 800900e: f7fe f9dd bl 80073cc BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8009012: 4b78 ldr r3, [pc, #480] ; (80091f4 ) 8009014: 7be2 ldrb r2, [r4, #15] 8009016: 9202 str r2, [sp, #8] 8009018: f103 0210 add.w r2, r3, #16 800901c: e892 0003 ldmia.w r2, {r0, r1} 8009020: e88d 0003 stmia.w sp, {r0, r1} 8009024: cb0f ldmia r3, {r0, r1, r2, r3} 8009026: f7fe f9d1 bl 80073cc } if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H]) 800902a: 7fa3 ldrb r3, [r4, #30] 800902c: 7faa ldrb r2, [r5, #30] 800902e: 429a cmp r2, r3 8009030: d109 bne.n 8009046 ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M]) 8009032: 7fe9 ldrb r1, [r5, #31] 8009034: 7fe2 ldrb r2, [r4, #31] 8009036: 4291 cmp r1, r2 8009038: d105 bne.n 8009046 || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){ 800903a: f895 1020 ldrb.w r1, [r5, #32] 800903e: f894 2020 ldrb.w r2, [r4, #32] 8009042: 4291 cmp r1, r2 8009044: d031 beq.n 80090aa Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H]; 8009046: 77ab strb r3, [r5, #30] Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 8009048: 7fe3 ldrb r3, [r4, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | (data_buf[INDEX_PLL_3_5G_LOW_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 800904a: 2100 movs r1, #0 Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 800904c: 77eb strb r3, [r5, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; 800904e: f894 3020 ldrb.w r3, [r4, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009052: 4869 ldr r0, [pc, #420] ; (80091f8 ) Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; 8009054: f885 3020 strb.w r3, [r5, #32] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 8009058: 7fe3 ldrb r3, [r4, #31] temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 800905a: 7fa2 ldrb r2, [r4, #30] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 800905c: 021b lsls r3, r3, #8 temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 800905e: ea43 4302 orr.w r3, r3, r2, lsl #16 (data_buf[INDEX_PLL_3_5G_LOW_L]); 8009062: f894 2020 ldrb.w r2, [r4, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009066: e9cd 0100 strd r0, r1, [sp] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 800906a: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 800906c: f241 3288 movw r2, #5000 ; 0x1388 8009070: 9203 str r2, [sp, #12] 8009072: 2202 movs r2, #2 8009074: 9202 str r2, [sp, #8] 8009076: f242 7210 movw r2, #10000 ; 0x2710 800907a: a826 add r0, sp, #152 ; 0x98 800907c: 435a muls r2, r3 800907e: 2300 movs r3, #0 8009080: f7fe fc3e bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8009084: 2203 movs r2, #3 8009086: 9205 str r2, [sp, #20] 8009088: f241 32c2 movw r2, #5058 ; 0x13c2 800908c: 9204 str r2, [sp, #16] 800908e: 9a26 ldr r2, [sp, #152] ; 0x98 8009090: 4b5a ldr r3, [pc, #360] ; (80091fc ) 8009092: 9203 str r2, [sp, #12] 8009094: 9a27 ldr r2, [sp, #156] ; 0x9c 8009096: 9202 str r2, [sp, #8] 8009098: f103 0210 add.w r2, r3, #16 800909c: e892 0003 ldmia.w r2, {r0, r1} 80090a0: e88d 0003 stmia.w sp, {r0, r1} 80090a4: cb0f ldmia r3, {r0, r1, r2, r3} 80090a6: f7fe fcb9 bl 8007a1c } if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H]) 80090aa: f894 3021 ldrb.w r3, [r4, #33] ; 0x21 80090ae: f895 2021 ldrb.w r2, [r5, #33] ; 0x21 80090b2: 429a cmp r2, r3 80090b4: d10b bne.n 80090ce || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M]) 80090b6: f895 1022 ldrb.w r1, [r5, #34] ; 0x22 80090ba: f894 2022 ldrb.w r2, [r4, #34] ; 0x22 80090be: 4291 cmp r1, r2 80090c0: d105 bne.n 80090ce || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){ 80090c2: f895 1023 ldrb.w r1, [r5, #35] ; 0x23 80090c6: f894 2023 ldrb.w r2, [r4, #35] ; 0x23 80090ca: 4291 cmp r1, r2 80090cc: d036 beq.n 800913c Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H]; 80090ce: f885 3021 strb.w r3, [r5, #33] ; 0x21 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 80090d2: f894 3022 ldrb.w r3, [r4, #34] ; 0x22 Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | (data_buf[INDEX_PLL_3_5G_HIGH_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80090d6: 2100 movs r1, #0 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 80090d8: f885 3022 strb.w r3, [r5, #34] ; 0x22 Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; 80090dc: f894 3023 ldrb.w r3, [r4, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80090e0: 4845 ldr r0, [pc, #276] ; (80091f8 ) Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; 80090e2: f885 3023 strb.w r3, [r5, #35] ; 0x23 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 80090e6: f894 3022 ldrb.w r3, [r4, #34] ; 0x22 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 80090ea: f894 2021 ldrb.w r2, [r4, #33] ; 0x21 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 80090ee: 021b lsls r3, r3, #8 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 80090f0: ea43 4302 orr.w r3, r3, r2, lsl #16 (data_buf[INDEX_PLL_3_5G_HIGH_L]); 80090f4: f894 2023 ldrb.w r2, [r4, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80090f8: e9cd 0100 strd r0, r1, [sp] (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 80090fc: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80090fe: f241 3288 movw r2, #5000 ; 0x1388 8009102: 9203 str r2, [sp, #12] 8009104: 2202 movs r2, #2 8009106: 9202 str r2, [sp, #8] 8009108: f242 7210 movw r2, #10000 ; 0x2710 800910c: a826 add r0, sp, #152 ; 0x98 800910e: 435a muls r2, r3 8009110: 2300 movs r3, #0 8009112: f7fe fbf5 bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8009116: 2203 movs r2, #3 8009118: 9205 str r2, [sp, #20] 800911a: f241 32c2 movw r2, #5058 ; 0x13c2 800911e: 9204 str r2, [sp, #16] 8009120: 9a26 ldr r2, [sp, #152] ; 0x98 8009122: 4b37 ldr r3, [pc, #220] ; (8009200 ) 8009124: 9203 str r2, [sp, #12] 8009126: 9a27 ldr r2, [sp, #156] ; 0x9c 8009128: 9202 str r2, [sp, #8] 800912a: f103 0210 add.w r2, r3, #16 800912e: e892 0003 ldmia.w r2, {r0, r1} 8009132: e88d 0003 stmia.w sp, {r0, r1} 8009136: cb0f ldmia r3, {r0, r1, r2, r3} 8009138: f7fe fc70 bl 8007a1c } if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){ } if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){ 800913c: f894 1043 ldrb.w r1, [r4, #67] ; 0x43 8009140: f895 3043 ldrb.w r3, [r5, #67] ; 0x43 8009144: 428b cmp r3, r1 8009146: d006 beq.n 8009156 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]); 8009148: 2043 movs r0, #67 ; 0x43 800914a: f7fe fe03 bl 8007d54 Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL]; 800914e: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8009152: f885 3043 strb.w r3, [r5, #67] ; 0x43 } if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){ 8009156: f894 1044 ldrb.w r1, [r4, #68] ; 0x44 800915a: f895 3044 ldrb.w r3, [r5, #68] ; 0x44 800915e: 428b cmp r3, r1 8009160: d006 beq.n 8009170 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]); 8009162: 2044 movs r0, #68 ; 0x44 8009164: f7fe fdf6 bl 8007d54 Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL]; 8009168: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 800916c: f885 3044 strb.w r3, [r5, #68] ; 0x44 } if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){ 8009170: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8009174: f895 3045 ldrb.w r3, [r5, #69] ; 0x45 8009178: 428b cmp r3, r1 800917a: d006 beq.n 800918a Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]); 800917c: 2045 movs r0, #69 ; 0x45 800917e: f7fe fde9 bl 8007d54 Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL]; 8009182: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 8009186: f885 3045 strb.w r3, [r5, #69] ; 0x45 } if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){ 800918a: f894 1046 ldrb.w r1, [r4, #70] ; 0x46 800918e: f895 3046 ldrb.w r3, [r5, #70] ; 0x46 8009192: 428b cmp r3, r1 8009194: d006 beq.n 80091a4 Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]); 8009196: 2046 movs r0, #70 ; 0x46 8009198: f7fe fddc bl 8007d54 Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL]; 800919c: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 80091a0: f885 3046 strb.w r3, [r5, #70] ; 0x46 } if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){ 80091a4: f894 104a ldrb.w r1, [r4, #74] ; 0x4a 80091a8: f895 304a ldrb.w r3, [r5, #74] ; 0x4a 80091ac: 428b cmp r3, r1 80091ae: d029 beq.n 8009204 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]); 80091b0: 204a movs r0, #74 ; 0x4a 80091b2: f7fe fdcf bl 8007d54 Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L]; 80091b6: f894 304a ldrb.w r3, [r4, #74] ; 0x4a 80091ba: f885 304a strb.w r3, [r5, #74] ; 0x4a 80091be: e021 b.n 8009204 80091c0: 20000038 .word 0x20000038 80091c4: 20000050 .word 0x20000050 80091c8: 20000068 .word 0x20000068 80091cc: 20000080 .word 0x20000080 80091d0: 000186a0 .word 0x000186a0 80091d4: 009f8092 .word 0x009f8092 80091d8: 200001e8 .word 0x200001e8 80091dc: 20000098 .word 0x20000098 80091e0: 200000b0 .word 0x200000b0 80091e4: 20000200 .word 0x20000200 80091e8: 200000c8 .word 0x200000c8 80091ec: 200000e0 .word 0x200000e0 80091f0: 200000f8 .word 0x200000f8 80091f4: 20000110 .word 0x20000110 80091f8: 02625a00 .word 0x02625a00 80091fc: 20000234 .word 0x20000234 8009200: 2000021c .word 0x2000021c } if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){ 8009204: f894 1049 ldrb.w r1, [r4, #73] ; 0x49 8009208: f895 3049 ldrb.w r3, [r5, #73] ; 0x49 800920c: 428b cmp r3, r1 800920e: d006 beq.n 800921e Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]); 8009210: 2049 movs r0, #73 ; 0x49 8009212: f7fe fd9f bl 8007d54 Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H]; 8009216: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 800921a: f885 3049 strb.w r3, [r5, #73] ; 0x49 } if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){ 800921e: f894 1047 ldrb.w r1, [r4, #71] ; 0x47 8009222: f895 3047 ldrb.w r3, [r5, #71] ; 0x47 8009226: 428b cmp r3, r1 8009228: d006 beq.n 8009238 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); 800922a: 2047 movs r0, #71 ; 0x47 800922c: f7fe fd92 bl 8007d54 Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; 8009230: f894 3047 ldrb.w r3, [r4, #71] ; 0x47 8009234: f885 3047 strb.w r3, [r5, #71] ; 0x47 } if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){ 8009238: f894 1048 ldrb.w r1, [r4, #72] ; 0x48 800923c: f895 3048 ldrb.w r3, [r5, #72] ; 0x48 8009240: 428b cmp r3, r1 8009242: d006 beq.n 8009252 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); 8009244: 2048 movs r0, #72 ; 0x48 8009246: f7fe fd85 bl 8007d54 Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; 800924a: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 800924e: f885 3048 strb.w r3, [r5, #72] ; 0x48 } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8009252: f894 104b ldrb.w r1, [r4, #75] ; 0x4b 8009256: f895 304b ldrb.w r3, [r5, #75] ; 0x4b 800925a: 428b cmp r3, r1 800925c: d043 beq.n 80092e6 Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]); 800925e: 204b movs r0, #75 ; 0x4b 8009260: f7fe fd78 bl 8007d54 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8009264: f894 304b ldrb.w r3, [r4, #75] ; 0x4b HAL_Delay(1); 8009268: 2001 movs r0, #1 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 800926a: f885 304b strb.w r3, [r5, #75] ; 0x4b HAL_Delay(1); 800926e: f7fc f93d bl 80054ec // printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]); if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8009272: f894 304b ldrb.w r3, [r4, #75] ; 0x4b 8009276: 2b00 cmp r3, #0 8009278: d035 beq.n 80092e6 // printf("PLL CTRL START !! \r\n"); #if 1 // PYJ.2019.08.12_BEGIN -- temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 800927a: 7feb ldrb r3, [r5, #31] temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | 800927c: 7faa ldrb r2, [r5, #30] (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 800927e: 021b lsls r3, r3, #8 temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | 8009280: ea43 4302 orr.w r3, r3, r2, lsl #16 (Prev_data[INDEX_PLL_3_5G_LOW_L]); 8009284: f895 2020 ldrb.w r2, [r5, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8009288: 2100 movs r1, #0 (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 800928a: 4313 orrs r3, r2 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 800928c: f241 3288 movw r2, #5000 ; 0x1388 8009290: 9203 str r2, [sp, #12] 8009292: 2202 movs r2, #2 8009294: 9202 str r2, [sp, #8] 8009296: f242 7210 movw r2, #10000 ; 0x2710 800929a: 48c4 ldr r0, [pc, #784] ; (80095ac ) 800929c: 435a muls r2, r3 800929e: e9cd 0100 strd r0, r1, [sp] 80092a2: 2300 movs r3, #0 80092a4: a826 add r0, sp, #152 ; 0x98 80092a6: f7fe fb2b bl 8007900 #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80092aa: 2203 movs r2, #3 80092ac: 9205 str r2, [sp, #20] 80092ae: f241 32c2 movw r2, #5058 ; 0x13c2 80092b2: 9204 str r2, [sp, #16] 80092b4: 9a26 ldr r2, [sp, #152] ; 0x98 80092b6: 4bbe ldr r3, [pc, #760] ; (80095b0 ) 80092b8: 9203 str r2, [sp, #12] 80092ba: 9a27 ldr r2, [sp, #156] ; 0x9c PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80092bc: 4ebd ldr r6, [pc, #756] ; (80095b4 ) ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80092be: 9202 str r2, [sp, #8] 80092c0: f103 0210 add.w r2, r3, #16 80092c4: e892 0003 ldmia.w r2, {r0, r1} 80092c8: e88d 0003 stmia.w sp, {r0, r1} 80092cc: cb0f ldmia r3, {r0, r1, r2, r3} 80092ce: f7fe fba5 bl 8007a1c PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80092d2: 2298 movs r2, #152 ; 0x98 80092d4: f106 0110 add.w r1, r6, #16 80092d8: 4668 mov r0, sp 80092da: f000 fa0f bl 80096fc 80092de: e896 000f ldmia.w r6, {r0, r1, r2, r3} 80092e2: f7fe f9b5 bl 8007650 } } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 80092e6: f894 104c ldrb.w r1, [r4, #76] ; 0x4c 80092ea: f895 304c ldrb.w r3, [r5, #76] ; 0x4c 80092ee: 428b cmp r3, r1 80092f0: d045 beq.n 800937e Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]); 80092f2: 204c movs r0, #76 ; 0x4c 80092f4: f7fe fd2e bl 8007d54