: { 8007ee4: b580 push {r7, lr} static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8007ee6: 4db0 ldr r5, [pc, #704] ; (80081a8 ) { 8007ee8: b08c sub sp, #48 ; 0x30 HAL_Init(); 8007eea: f7fd fadb bl 80054a4 SystemClock_Config(); 8007eee: f7ff ffc3 bl 8007e78 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007ef2: 2210 movs r2, #16 8007ef4: 2100 movs r1, #0 8007ef6: a808 add r0, sp, #32 8007ef8: f001 fa33 bl 8009362 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007efc: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007efe: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007f00: f043 0340 orr.w r3, r3, #64 ; 0x40 8007f04: 61ab str r3, [r5, #24] 8007f06: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007f08: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 8007f0a: f003 0340 and.w r3, r3, #64 ; 0x40 8007f0e: 9301 str r3, [sp, #4] 8007f10: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOC_CLK_ENABLE(); 8007f12: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007f14: 48a5 ldr r0, [pc, #660] ; (80081ac ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8007f16: f043 0310 orr.w r3, r3, #16 8007f1a: 61ab str r3, [r5, #24] 8007f1c: 69ab ldr r3, [r5, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8007f1e: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007f20: f003 0310 and.w r3, r3, #16 8007f24: 9302 str r3, [sp, #8] 8007f26: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOF_CLK_ENABLE(); 8007f28: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007f2a: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007f2c: f043 0380 orr.w r3, r3, #128 ; 0x80 8007f30: 61ab str r3, [r5, #24] 8007f32: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007f34: 2702 movs r7, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007f36: f003 0380 and.w r3, r3, #128 ; 0x80 8007f3a: 9303 str r3, [sp, #12] 8007f3c: 9b03 ldr r3, [sp, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8007f3e: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8007f40: f04f 090c mov.w r9, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007f44: f043 0304 orr.w r3, r3, #4 8007f48: 61ab str r3, [r5, #24] 8007f4a: 69ab ldr r3, [r5, #24] hadc1.Init.NbrOfConversion = 14; 8007f4c: f04f 080e mov.w r8, #14 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007f50: f003 0304 and.w r3, r3, #4 8007f54: 9304 str r3, [sp, #16] 8007f56: 9b04 ldr r3, [sp, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8007f58: 69ab ldr r3, [r5, #24] sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 8007f5a: f04f 0a07 mov.w sl, #7 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007f5e: f043 0308 orr.w r3, r3, #8 8007f62: 61ab str r3, [r5, #24] 8007f64: 69ab ldr r3, [r5, #24] 8007f66: f003 0308 and.w r3, r3, #8 8007f6a: 9305 str r3, [sp, #20] 8007f6c: 9b05 ldr r3, [sp, #20] __HAL_RCC_GPIOD_CLK_ENABLE(); 8007f6e: 69ab ldr r3, [r5, #24] 8007f70: f043 0320 orr.w r3, r3, #32 8007f74: 61ab str r3, [r5, #24] 8007f76: 69ab ldr r3, [r5, #24] 8007f78: f003 0320 and.w r3, r3, #32 8007f7c: 9306 str r3, [sp, #24] 8007f7e: 9b06 ldr r3, [sp, #24] __HAL_RCC_GPIOG_CLK_ENABLE(); 8007f80: 69ab ldr r3, [r5, #24] 8007f82: f443 7380 orr.w r3, r3, #256 ; 0x100 8007f86: 61ab str r3, [r5, #24] 8007f88: 69ab ldr r3, [r5, #24] 8007f8a: f403 7380 and.w r3, r3, #256 ; 0x100 8007f8e: 9307 str r3, [sp, #28] 8007f90: 9b07 ldr r3, [sp, #28] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007f92: f7fe f99f bl 80062d4 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007f96: 2200 movs r2, #0 8007f98: f64f 41c0 movw r1, #64704 ; 0xfcc0 8007f9c: 4884 ldr r0, [pc, #528] ; (80081b0 ) 8007f9e: f7fe f999 bl 80062d4 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007fa2: 2200 movs r2, #0 8007fa4: f240 31f3 movw r1, #1011 ; 0x3f3 8007fa8: 4882 ldr r0, [pc, #520] ; (80081b4 ) 8007faa: f7fe f993 bl 80062d4 HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007fae: 2200 movs r2, #0 8007fb0: f648 71ff movw r1, #36863 ; 0x8fff 8007fb4: 4880 ldr r0, [pc, #512] ; (80081b8 ) 8007fb6: f7fe f98d bl 80062d4 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007fba: 2200 movs r2, #0 8007fbc: f647 71fc movw r1, #32764 ; 0x7ffc 8007fc0: 487e ldr r0, [pc, #504] ; (80081bc ) 8007fc2: f7fe f987 bl 80062d4 HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET); 8007fc6: 2200 movs r2, #0 8007fc8: f44f 4100 mov.w r1, #32768 ; 0x8000 8007fcc: 487c ldr r0, [pc, #496] ; (80081c0 ) 8007fce: f7fe f981 bl 80062d4 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007fd2: 2200 movs r2, #0 8007fd4: 2118 movs r1, #24 8007fd6: 487b ldr r0, [pc, #492] ; (80081c4 ) 8007fd8: f7fe f97c bl 80062d4 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007fdc: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007fde: a908 add r1, sp, #32 8007fe0: 4872 ldr r0, [pc, #456] ; (80081ac ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007fe2: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007fe4: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007fe6: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007fe8: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007fea: f7fe f881 bl 80060f0 GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007fee: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007ff2: a908 add r1, sp, #32 8007ff4: 486e ldr r0, [pc, #440] ; (80081b0 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007ff6: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007ff8: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007ffa: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007ffc: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007ffe: f7fe f877 bl 80060f0 GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8008002: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8008006: a908 add r1, sp, #32 8008008: 486a ldr r0, [pc, #424] ; (80081b4 ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 800800a: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800800c: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800800e: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008010: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8008012: f7fe f86d bl 80060f0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8008016: a908 add r1, sp, #32 8008018: 4866 ldr r0, [pc, #408] ; (80081b4 ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 800801a: f8cd 9020 str.w r9, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800801e: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008020: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8008022: f7fe f865 bl 80060f0 /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin PATH_EN_3_5G_L_Pin */ GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8008026: f648 73ff movw r3, #36863 ; 0x8fff |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin |PATH_EN_3_5G_L_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800802a: a908 add r1, sp, #32 800802c: 4862 ldr r0, [pc, #392] ; (80081b8 ) GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 800802e: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008030: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008032: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008034: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8008036: f7fe f85b bl 80060f0 /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */ GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 800803a: f44f 5340 mov.w r3, #12288 ; 0x3000 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800803e: a908 add r1, sp, #32 8008040: 485d ldr r0, [pc, #372] ; (80081b8 ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8008042: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008044: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008046: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8008048: f7fe f852 bl 80060f0 /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin BOOT_LED_Pin */ GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 800804c: f647 73fc movw r3, #32764 ; 0x7ffc |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin |BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8008050: a908 add r1, sp, #32 8008052: 485a ldr r0, [pc, #360] ; (80081bc ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8008054: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8008056: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008058: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 800805a: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 800805c: f7fe f848 bl 80060f0 /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */ GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8008060: f44f 7340 mov.w r3, #768 ; 0x300 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008064: a908 add r1, sp, #32 8008066: 4852 ldr r0, [pc, #328] ; (80081b0 ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8008068: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800806a: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 800806c: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800806e: f7fe f83f bl 80060f0 /*Configure GPIO pin : PLL_CLK_3_5G_Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8008072: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8008076: a908 add r1, sp, #32 8008078: 4851 ldr r0, [pc, #324] ; (80081c0 ) GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 800807a: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800807c: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800807e: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008080: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8008082: f7fe f835 bl 80060f0 /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8008086: 2318 movs r3, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008088: a908 add r1, sp, #32 800808a: 484e ldr r0, [pc, #312] ; (80081c4 ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 800808c: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800808e: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8008090: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8008092: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008094: f7fe f82c bl 80060f0 /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8008098: 2360 movs r3, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800809a: a908 add r1, sp, #32 800809c: 4849 ldr r0, [pc, #292] ; (80081c4 ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 800809e: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80080a0: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 80080a2: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80080a4: f7fe f824 bl 80060f0 __HAL_RCC_DMA1_CLK_ENABLE(); 80080a8: 696b ldr r3, [r5, #20] 80080aa: 4333 orrs r3, r6 80080ac: 616b str r3, [r5, #20] 80080ae: 696b ldr r3, [r5, #20] hadc1.Instance = ADC1; 80080b0: 4d45 ldr r5, [pc, #276] ; (80081c8 ) __HAL_RCC_DMA1_CLK_ENABLE(); 80080b2: 4033 ands r3, r6 80080b4: 9300 str r3, [sp, #0] 80080b6: 9b00 ldr r3, [sp, #0] hadc1.Instance = ADC1; 80080b8: 4b44 ldr r3, [pc, #272] ; (80081cc ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 80080ba: 4628 mov r0, r5 hadc1.Instance = ADC1; 80080bc: 602b str r3, [r5, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 80080be: f44f 7380 mov.w r3, #256 ; 0x100 80080c2: 60ab str r3, [r5, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80080c4: f44f 2360 mov.w r3, #917504 ; 0xe0000 hadc1.Init.ContinuousConvMode = ENABLE; 80080c8: 60ee str r6, [r5, #12] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80080ca: 61eb str r3, [r5, #28] ADC_ChannelConfTypeDef sConfig = {0}; 80080cc: 9408 str r4, [sp, #32] 80080ce: 9409 str r4, [sp, #36] ; 0x24 80080d0: 940a str r4, [sp, #40] ; 0x28 hadc1.Init.DiscontinuousConvMode = DISABLE; 80080d2: 616c str r4, [r5, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80080d4: 606c str r4, [r5, #4] hadc1.Init.NbrOfConversion = 14; 80080d6: f8c5 8010 str.w r8, [r5, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 80080da: f7fd fbc1 bl 8005860 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080de: a908 add r1, sp, #32 80080e0: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_1; 80080e2: 9609 str r6, [sp, #36] ; 0x24 sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 80080e4: f8cd a028 str.w sl, [sp, #40] ; 0x28 sConfig.Channel = ADC_CHANNEL_0; 80080e8: 9408 str r4, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080ea: f7fd fa4d bl 8005588 sConfig.Channel = ADC_CHANNEL_1; 80080ee: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 80080f0: 2603 movs r6, #3 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080f2: a908 add r1, sp, #32 80080f4: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_2; 80080f6: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080f8: f7fd fa46 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80080fc: a908 add r1, sp, #32 80080fe: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_2; 8008100: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 8008102: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008104: f7fd fa40 bl 8005588 sConfig.Channel = ADC_CHANNEL_3; 8008108: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_4; 800810a: 2604 movs r6, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800810c: a908 add r1, sp, #32 800810e: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_4; 8008110: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008112: f7fd fa39 bl 8005588 sConfig.Channel = ADC_CHANNEL_4; 8008116: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_5; 8008118: 2605 movs r6, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800811a: a908 add r1, sp, #32 800811c: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_5; 800811e: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008120: f7fd fa32 bl 8005588 sConfig.Channel = ADC_CHANNEL_5; 8008124: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_6; 8008126: 2606 movs r6, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008128: a908 add r1, sp, #32 800812a: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_6; 800812c: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800812e: f7fd fa2b bl 8005588 sConfig.Channel = ADC_CHANNEL_6; 8008132: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 8008134: 2608 movs r6, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008136: a908 add r1, sp, #32 8008138: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_7; 800813a: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800813e: f7fd fa23 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008142: a908 add r1, sp, #32 8008144: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_7; 8008146: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 800814a: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800814c: f7fd fa1c bl 8005588 sConfig.Channel = ADC_CHANNEL_8; 8008150: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_9; 8008152: 2609 movs r6, #9 sConfig.Rank = ADC_REGULAR_RANK_10; 8008154: f04f 0a0a mov.w sl, #10 sConfig.Rank = ADC_REGULAR_RANK_11; 8008158: 270b movs r7, #11 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800815a: a908 add r1, sp, #32 800815c: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_9; 800815e: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008160: f7fd fa12 bl 8005588 sConfig.Channel = ADC_CHANNEL_9; 8008164: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_13; 8008166: 260d movs r6, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008168: a908 add r1, sp, #32 800816a: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_10; 800816c: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008170: f7fd fa0a bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008174: a908 add r1, sp, #32 8008176: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_10; 8008178: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_11; 800817c: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800817e: f7fd fa03 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008182: a908 add r1, sp, #32 8008184: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_11; 8008186: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_12; 8008188: f8cd 9024 str.w r9, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800818c: f7fd f9fc bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008190: a908 add r1, sp, #32 8008192: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_13; 8008194: 9609 str r6, [sp, #36] ; 0x24 sConfig.Channel = ADC_CHANNEL_12; 8008196: f8cd 9020 str.w r9, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800819a: f7fd f9f5 bl 8005588 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800819e: a908 add r1, sp, #32 80081a0: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_13; 80081a2: 9608 str r6, [sp, #32] 80081a4: e014 b.n 80081d0 80081a6: bf00 nop 80081a8: 40021000 .word 0x40021000 80081ac: 40011800 .word 0x40011800 80081b0: 40011000 .word 0x40011000 80081b4: 40011c00 .word 0x40011c00 80081b8: 40011400 .word 0x40011400 80081bc: 40012000 .word 0x40012000 80081c0: 40010800 .word 0x40010800 80081c4: 40010c00 .word 0x40010c00 80081c8: 20000650 .word 0x20000650 80081cc: 40012400 .word 0x40012400 sConfig.Rank = ADC_REGULAR_RANK_14; 80081d0: f8cd 8024 str.w r8, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80081d4: f7fd f9d8 bl 8005588 huart1.Init.BaudRate = 115200; 80081d8: f44f 33e1 mov.w r3, #115200 ; 0x1c200 huart1.Instance = USART1; 80081dc: 4836 ldr r0, [pc, #216] ; (80082b8 ) huart1.Init.BaudRate = 115200; 80081de: 4a37 ldr r2, [pc, #220] ; (80082bc ) huart1.Init.WordLength = UART_WORDLENGTH_8B; 80081e0: 6084 str r4, [r0, #8] huart1.Init.BaudRate = 115200; 80081e2: e880 000c stmia.w r0, {r2, r3} huart1.Init.StopBits = UART_STOPBITS_1; 80081e6: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 80081e8: 6104 str r4, [r0, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80081ea: f8c0 9014 str.w r9, [r0, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80081ee: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80081f0: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 80081f2: f7fe fe11 bl 8006e18 htim6.Init.Prescaler = 5600-1; 80081f6: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 80081fa: 4e31 ldr r6, [pc, #196] ; (80082c0 ) htim6.Init.Prescaler = 5600-1; 80081fc: 4931 ldr r1, [pc, #196] ; (80082c4 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80081fe: 4630 mov r0, r6 htim6.Init.Prescaler = 5600-1; 8008200: e886 000a stmia.w r6, {r1, r3} TIM_MasterConfigTypeDef sMasterConfig = {0}; 8008204: 9408 str r4, [sp, #32] 8008206: 9409 str r4, [sp, #36] ; 0x24 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8008208: 60b4 str r4, [r6, #8] htim6.Init.Period = 10; 800820a: f8c6 a00c str.w sl, [r6, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800820e: 61b4 str r4, [r6, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8008210: f7fe fcf0 bl 8006bf4 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8008214: a908 add r1, sp, #32 8008216: 4630 mov r0, r6 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8008218: 9408 str r4, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800821a: 9409 str r4, [sp, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800821c: f7fe fd04 bl 8006c28 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8008220: 4622 mov r2, r4 8008222: 4621 mov r1, r4 8008224: 2025 movs r0, #37 ; 0x25 8008226: f7fd fc1f bl 8005a68 HAL_NVIC_EnableIRQ(USART1_IRQn); 800822a: 2025 movs r0, #37 ; 0x25 800822c: f7fd fc50 bl 8005ad0 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8008230: 4622 mov r2, r4 8008232: 4621 mov r1, r4 8008234: 2036 movs r0, #54 ; 0x36 8008236: f7fd fc17 bl 8005a68 HAL_NVIC_EnableIRQ(TIM6_IRQn); 800823a: 2036 movs r0, #54 ; 0x36 800823c: f7fd fc48 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8008240: 4622 mov r2, r4 8008242: 4621 mov r1, r4 8008244: 4638 mov r0, r7 8008246: f7fd fc0f bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 800824a: 4638 mov r0, r7 800824c: f7fd fc40 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 8008250: 4622 mov r2, r4 8008252: 4621 mov r1, r4 8008254: 4640 mov r0, r8 8008256: f7fd fc07 bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 800825a: 4640 mov r0, r8 800825c: f7fd fc38 bl 8005ad0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8008260: 4622 mov r2, r4 8008262: 4621 mov r1, r4 8008264: 200f movs r0, #15 8008266: f7fd fbff bl 8005a68 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 800826a: 200f movs r0, #15 800826c: f7fd fc30 bl 8005ad0 InitUartQueue(&TerminalQueue); 8008270: 4815 ldr r0, [pc, #84] ; (80082c8 ) 8008272: f000 faf1 bl 8008858 PE43711_PinInit(); 8008276: f7ff f9a9 bl 80075cc Power_ON_OFF_Initialize(); 800827a: f7ff fd11 bl 8007ca0 Path_Init(); 800827e: f7ff fc25 bl 8007acc while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK)); 8008282: 4628 mov r0, r5 8008284: f7fd fb76 bl 8005974 8008288: 2800 cmp r0, #0 800828a: d1fa bne.n 8008282 Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]); 800828c: 480f ldr r0, [pc, #60] ; (80082cc ) 800828e: f7ff fc0d bl 8007aac ADF4153_Initialize(); 8008292: f7ff fabb bl 800780c ADF4113_Initialize(); 8008296: f000 f821 bl 80082dc ATTEN_PLL_PATH_Initialize(); 800829a: f7ff fcef bl 8007c7c HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14); 800829e: 220e movs r2, #14 80082a0: 490b ldr r1, [pc, #44] ; (80082d0 ) 80082a2: 480c ldr r0, [pc, #48] ; (80082d4 ) 80082a4: f7fd fa2c bl 8005700 Boot_LED_Toggle(); 80082a8: f7ff fd74 bl 8007d94 Uart_Check(); 80082ac: f7ff fda4 bl 8007df8 ADC_Check(); 80082b0: f7ff fd82 bl 8007db8 80082b4: e7f8 b.n 80082a8 80082b6: bf00 nop 80082b8: 200006c4 .word 0x200006c4 80082bc: 40013800 .word 0x40013800 80082c0: 20000748 .word 0x20000748 80082c4: 40001000 .word 0x40001000 80082c8: 20000b88 .word 0x20000b88 80082cc: 20000488 .word 0x20000488 80082d0: 200005d4 .word 0x200005d4 80082d4: 20000650 .word 0x20000650 080082d8 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80082d8: 4770 bx lr ... 080082dc : uint16_t P; uint16_t A; uint16_t N; }Adf4113_st; void ADF4113_Initialize(void){ if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){ 80082dc: 4b10 ldr r3, [pc, #64] ; (8008320 ) 80082de: 7d5a ldrb r2, [r3, #21] 80082e0: b92a cbnz r2, 80082ee 80082e2: 7d9a ldrb r2, [r3, #22] 80082e4: b91a cbnz r2, 80082ee Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((18425 & 0xFF00) >> 8);//0x47; 80082e6: 2247 movs r2, #71 ; 0x47 80082e8: 755a strb r2, [r3, #21] Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (18425 & 0x00FF); 80082ea: 22f9 movs r2, #249 ; 0xf9 80082ec: 759a strb r2, [r3, #22] } if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){ 80082ee: 7dda ldrb r2, [r3, #23] 80082f0: b92a cbnz r2, 80082fe 80082f2: 7e1a ldrb r2, [r3, #24] 80082f4: b91a cbnz r2, 80082fe Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((17475 & 0xFF00) >> 8); 80082f6: 2244 movs r2, #68 ; 0x44 80082f8: 75da strb r2, [r3, #23] Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (17475 & 0x00FF); 80082fa: 2243 movs r2, #67 ; 0x43 80082fc: 761a strb r2, [r3, #24] } if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){ 80082fe: 7e5a ldrb r2, [r3, #25] 8008300: b92a cbnz r2, 800830e 8008302: 7e9a ldrb r2, [r3, #26] 8008304: b91a cbnz r2, 800830e Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((21400 & 0xFF00) >> 8); 8008306: 2253 movs r2, #83 ; 0x53 8008308: 765a strb r2, [r3, #25] Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (21400 & 0x00FF); 800830a: 2298 movs r2, #152 ; 0x98 800830c: 769a strb r2, [r3, #26] } if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){ 800830e: 7eda ldrb r2, [r3, #27] 8008310: b92a cbnz r2, 800831e 8008312: 7f1a ldrb r2, [r3, #28] 8008314: b91a cbnz r2, 800831e Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((19500 & 0xFF00) >> 8); 8008316: 224c movs r2, #76 ; 0x4c 8008318: 76da strb r2, [r3, #27] Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (19500 & 0x00FF); 800831a: 222c movs r2, #44 ; 0x2c 800831c: 771a strb r2, [r3, #28] 800831e: 4770 bx lr 8008320: 20000488 .word 0x20000488 08008324 : printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); #endif // PYJ.2019.08.10_END -- return N_Counter_Latch_Create(A,B,0); } uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){ 8008324: 2301 movs r3, #1 8008326: b570 push {r4, r5, r6, lr} 8008328: 2402 movs r4, #2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 8; i++){ if(_ACOUNTER & 0x01) ret += shift_bit << i; 800832a: 461d mov r5, r3 if(_ACOUNTER & 0x01) 800832c: 07c6 lsls r6, r0, #31 ret += shift_bit << i; 800832e: bf48 it mi 8008330: fa05 f604 lslmi.w r6, r5, r4 8008334: f104 0401 add.w r4, r4, #1 8008338: bf48 it mi 800833a: 199b addmi r3, r3, r6 for(i = 2; i < 8; i++){ 800833c: 2c08 cmp r4, #8 _ACOUNTER = _ACOUNTER >> 1; 800833e: ea4f 0050 mov.w r0, r0, lsr #1 for(i = 2; i < 8; i++){ 8008342: d1f3 bne.n 800832c #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 8; i < 21; i++){ if(_BCOUNTER & 0x01) ret += shift_bit << i; 8008344: 2001 movs r0, #1 if(_BCOUNTER & 0x01) 8008346: 07cd lsls r5, r1, #31 ret += shift_bit << i; 8008348: bf48 it mi 800834a: fa00 f504 lslmi.w r5, r0, r4 800834e: f104 0401 add.w r4, r4, #1 8008352: bf48 it mi 8008354: 195b addmi r3, r3, r5 for(i = 8; i < 21; i++){ 8008356: 2c15 cmp r4, #21 _BCOUNTER = _BCOUNTER >> 1; 8008358: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 8; i < 21; i++){ 800835c: d1f3 bne.n 8008346 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ if(_CPGAIN & 0x01) 800835e: 07d2 lsls r2, r2, #31 ret += shift_bit << i++; 8008360: bf48 it mi 8008362: f503 1300 addmi.w r3, r3, #2097152 ; 0x200000 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } 8008366: 4618 mov r0, r3 8008368: bd70 pop {r4, r5, r6, pc} ... 0800836c : { 800836c: b57f push {r0, r1, r2, r3, r4, r5, r6, lr} N_val = (rf_Freq / ADF4113_CH_STEP); 800836e: f24c 3550 movw r5, #50000 ; 0xc350 8008372: fbb0 f5f5 udiv r5, r0, r5 if( N_val < ADF4113_PRE8_MIN_N) { 8008376: 2d37 cmp r5, #55 ; 0x37 8008378: d920 bls.n 80083bc printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); 800837a: 4b11 ldr r3, [pc, #68] ; (80083c0 ) B = N_val / P; 800837c: 4c11 ldr r4, [pc, #68] ; (80083c4 ) 800837e: fbb0 f4f4 udiv r4, r0, r4 printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); 8008382: fbb0 f0f3 udiv r0, r0, r3 8008386: f7fc fd19 bl 8004dbc <__aeabi_ui2f> 800838a: f7fc f8c5 bl 8004518 <__aeabi_f2d> A = N_val -(B * P); 800838e: eba5 1644 sub.w r6, r5, r4, lsl #5 printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); 8008392: 4602 mov r2, r0 8008394: 460b mov r3, r1 8008396: e88d 0050 stmia.w sp, {r4, r6} 800839a: 9502 str r5, [sp, #8] 800839c: 480a ldr r0, [pc, #40] ; (80083c8 ) 800839e: f001 fc49 bl 8009c34 printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); 80083a2: b2a1 uxth r1, r4 80083a4: 2200 movs r2, #0 80083a6: b2b0 uxth r0, r6 80083a8: f7ff ffbc bl 8008324 80083ac: 4604 mov r4, r0 80083ae: 4601 mov r1, r0 80083b0: 4806 ldr r0, [pc, #24] ; (80083cc ) 80083b2: f001 fc3f bl 8009c34 } 80083b6: 4620 mov r0, r4 80083b8: b004 add sp, #16 80083ba: bd70 pop {r4, r5, r6, pc} return HAL_SYN_INVALID_PRESCALE; 80083bc: 2404 movs r4, #4 80083be: e7fa b.n 80083b6 80083c0: 000f4240 .word 0x000f4240 80083c4: 00186a00 .word 0x00186a00 80083c8: 0800bc87 .word 0x0800bc87 80083cc: 0800bcb7 .word 0x0800bcb7 080083d0 : void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 80083d0: b084 sub sp, #16 80083d2: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80083d6: ac0c add r4, sp, #48 ; 0x30 80083d8: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 80083dc: 9b13 ldr r3, [sp, #76] ; 0x4c 80083de: f8bd 7034 ldrh.w r7, [sp, #52] ; 0x34 80083e2: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80083e6: 9301 str r3, [sp, #4] R0 = R0 & 0xFFFFFF; 80083e8: 9b12 ldr r3, [sp, #72] ; 0x48 80083ea: f8dd 8038 ldr.w r8, [sp, #56] ; 0x38 80083ee: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 80083f2: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80083f6: 9d10 ldr r5, [sp, #64] ; 0x40 80083f8: f8bd 6044 ldrh.w r6, [sp, #68] ; 0x44 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80083fc: 2200 movs r2, #0 80083fe: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 8008400: 9300 str r3, [sp, #0] 8008402: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 8008404: 9c14 ldr r4, [sp, #80] ; 0x50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008406: f7fd ff65 bl 80062d4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800840a: 2200 movs r2, #0 800840c: 4649 mov r1, r9 800840e: 4640 mov r0, r8 8008410: f7fd ff60 bl 80062d4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008414: 2200 movs r2, #0 8008416: 4631 mov r1, r6 8008418: 4628 mov r0, r5 800841a: f7fd ff5b bl 80062d4 800841e: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 8008422: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 8008426: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 800842a: bf18 it ne 800842c: 2201 movne r2, #1 } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800842e: 4649 mov r1, r9 8008430: 4640 mov r0, r8 8008432: f7fd ff4f bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8008436: 2201 movs r2, #1 8008438: 4639 mov r1, r7 800843a: 4650 mov r0, sl 800843c: f7fd ff4a bl 80062d4 Pol_Delay_us(10); 8008440: 200a movs r0, #10 8008442: f7ff fc91 bl 8007d68 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008446: 2200 movs r2, #0 8008448: 4639 mov r1, r7 800844a: 4650 mov r0, sl 800844c: f7fd ff42 bl 80062d4 R2 = ((R2 << 1) & 0xFFFFFF); 8008450: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 8008452: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 8008456: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 800845a: d1e4 bne.n 8008426 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800845c: 2201 movs r2, #1 800845e: 4631 mov r1, r6 8008460: 4628 mov r0, r5 8008462: f7fd ff37 bl 80062d4 Pol_Delay_us(10); 8008466: 200a movs r0, #10 8008468: f7ff fc7e bl 8007d68 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800846c: 465a mov r2, fp 800846e: 4631 mov r1, r6 8008470: 4628 mov r0, r5 8008472: f7fd ff2f bl 80062d4 8008476: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 8008478: 9b00 ldr r3, [sp, #0] #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800847a: 4649 mov r1, r9 if(R0 & 0x800000){ 800847c: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008480: bf18 it ne 8008482: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008484: 4640 mov r0, r8 8008486: f7fd ff25 bl 80062d4 #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800848a: 2201 movs r2, #1 800848c: 4639 mov r1, r7 800848e: 4650 mov r0, sl 8008490: f7fd ff20 bl 80062d4 Pol_Delay_us(10); 8008494: 200a movs r0, #10 8008496: f7ff fc67 bl 8007d68 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800849a: 2200 movs r2, #0 800849c: 4639 mov r1, r7 800849e: 4650 mov r0, sl 80084a0: f7fd ff18 bl 80062d4 R0 = ((R0 << 1) & 0xFFFFFF); 80084a4: 9b00 ldr r3, [sp, #0] for(int i =0; i < 24; i++){ 80084a6: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 80084a8: ea4f 0343 mov.w r3, r3, lsl #1 80084ac: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80084b0: 9300 str r3, [sp, #0] for(int i =0; i < 24; i++){ 80084b2: d1e1 bne.n 8008478 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80084b4: 2201 movs r2, #1 80084b6: 4631 mov r1, r6 80084b8: 4628 mov r0, r5 80084ba: f7fd ff0b bl 80062d4 Pol_Delay_us(10); 80084be: 200a movs r0, #10 80084c0: f7ff fc52 bl 8007d68 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80084c4: 4622 mov r2, r4 80084c6: 4631 mov r1, r6 80084c8: 4628 mov r0, r5 80084ca: f7fd ff03 bl 80062d4 80084ce: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 80084d0: 9b01 ldr r3, [sp, #4] } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80084d2: 4649 mov r1, r9 if(R1 & 0x800000){ 80084d4: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80084d8: bf18 it ne 80084da: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80084dc: 4640 mov r0, r8 80084de: f7fd fef9 bl 80062d4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80084e2: 2201 movs r2, #1 80084e4: 4639 mov r1, r7 80084e6: 4650 mov r0, sl 80084e8: f7fd fef4 bl 80062d4 Pol_Delay_us(10); 80084ec: 200a movs r0, #10 80084ee: f7ff fc3b bl 8007d68 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80084f2: 2200 movs r2, #0 80084f4: 4639 mov r1, r7 80084f6: 4650 mov r0, sl 80084f8: f7fd feec bl 80062d4 R1 = ((R1 << 1) & 0xFFFFFF); 80084fc: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 80084fe: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 8008500: ea4f 0343 mov.w r3, r3, lsl #1 8008504: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008508: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 800850a: d1e1 bne.n 80084d0 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800850c: 4631 mov r1, r6 800850e: 2201 movs r2, #1 8008510: 4628 mov r0, r5 8008512: f7fd fedf bl 80062d4 Pol_Delay_us(10); 8008516: 200a movs r0, #10 8008518: f7ff fc26 bl 8007d68 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800851c: 4622 mov r2, r4 800851e: 4631 mov r1, r6 8008520: 4628 mov r0, r5 } 8008522: b003 add sp, #12 8008524: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008528: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800852a: f7fd bed3 b.w 80062d4 ... 08008530 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8008530: 4b0e ldr r3, [pc, #56] ; (800856c ) { 8008532: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8008534: 699a ldr r2, [r3, #24] 8008536: f042 0201 orr.w r2, r2, #1 800853a: 619a str r2, [r3, #24] 800853c: 699a ldr r2, [r3, #24] 800853e: f002 0201 and.w r2, r2, #1 8008542: 9200 str r2, [sp, #0] 8008544: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8008546: 69da ldr r2, [r3, #28] 8008548: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 800854c: 61da str r2, [r3, #28] 800854e: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8008550: 4a07 ldr r2, [pc, #28] ; (8008570 ) __HAL_RCC_PWR_CLK_ENABLE(); 8008552: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8008556: 9301 str r3, [sp, #4] 8008558: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800855a: 6853 ldr r3, [r2, #4] 800855c: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8008560: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 8008564: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8008566: b002 add sp, #8 8008568: 4770 bx lr 800856a: bf00 nop 800856c: 40021000 .word 0x40021000 8008570: 40010000 .word 0x40010000 08008574 : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008574: 2210 movs r2, #16 { 8008576: b530 push {r4, r5, lr} 8008578: 4605 mov r5, r0 800857a: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800857c: eb0d 0002 add.w r0, sp, r2 8008580: 2100 movs r1, #0 8008582: f000 feee bl 8009362 if(hadc->Instance==ADC1) 8008586: 682a ldr r2, [r5, #0] 8008588: 4b2c ldr r3, [pc, #176] ; (800863c ) 800858a: 429a cmp r2, r3 800858c: d153 bne.n 8008636 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 800858e: f503 436c add.w r3, r3, #60416 ; 0xec00 8008592: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008594: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 8008596: f442 7200 orr.w r2, r2, #512 ; 0x200 800859a: 619a str r2, [r3, #24] 800859c: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800859e: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 80085a0: f402 7200 and.w r2, r2, #512 ; 0x200 80085a4: 9200 str r2, [sp, #0] 80085a6: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 80085a8: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80085aa: 4825 ldr r0, [pc, #148] ; (8008640 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 80085ac: f042 0210 orr.w r2, r2, #16 80085b0: 619a str r2, [r3, #24] 80085b2: 699a ldr r2, [r3, #24] 80085b4: f002 0210 and.w r2, r2, #16 80085b8: 9201 str r2, [sp, #4] 80085ba: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 80085bc: 699a ldr r2, [r3, #24] 80085be: f042 0204 orr.w r2, r2, #4 80085c2: 619a str r2, [r3, #24] 80085c4: 699a ldr r2, [r3, #24] 80085c6: f002 0204 and.w r2, r2, #4 80085ca: 9202 str r2, [sp, #8] 80085cc: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 80085ce: 699a ldr r2, [r3, #24] 80085d0: f042 0208 orr.w r2, r2, #8 80085d4: 619a str r2, [r3, #24] 80085d6: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80085d8: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 80085da: f003 0308 and.w r3, r3, #8 80085de: 9303 str r3, [sp, #12] 80085e0: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 80085e2: 230f movs r3, #15 80085e4: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80085e6: f7fd fd83 bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80085ea: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80085ec: a904 add r1, sp, #16 80085ee: 4815 ldr r0, [pc, #84] ; (8008644 ) GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80085f0: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80085f2: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80085f4: f7fd fd7c bl 80060f0 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80085f8: 4813 ldr r0, [pc, #76] ; (8008648 ) 80085fa: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 80085fc: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80085fe: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008600: f7fd fd76 bl 80060f0 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8008604: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 8008606: 4c11 ldr r4, [pc, #68] ; (800864c ) 8008608: 4b11 ldr r3, [pc, #68] ; (8008650 ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 800860a: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 800860c: f44f 7200 mov.w r2, #512 ; 0x200 8008610: 6122 str r2, [r4, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 8008612: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Instance = DMA1_Channel1; 8008616: 6023 str r3, [r4, #0] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 8008618: 6162 str r2, [r4, #20] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 800861a: 2300 movs r3, #0 hdma_adc1.Init.Mode = DMA_CIRCULAR; 800861c: 2220 movs r2, #32 hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 800861e: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008620: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 8008622: 60a3 str r3, [r4, #8] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8008624: 61a2 str r2, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8008626: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8008628: f7fd fa74 bl 8005b14 800862c: b108 cbz r0, 8008632 { Error_Handler(); 800862e: f7ff fe53 bl 80082d8 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 8008632: 622c str r4, [r5, #32] 8008634: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 8008636: b009 add sp, #36 ; 0x24 8008638: bd30 pop {r4, r5, pc} 800863a: bf00 nop 800863c: 40012400 .word 0x40012400 8008640: 40011000 .word 0x40011000 8008644: 40010800 .word 0x40010800 8008648: 40010c00 .word 0x40010c00 800864c: 20000704 .word 0x20000704 8008650: 40020008 .word 0x40020008 08008654 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8008654: 6802 ldr r2, [r0, #0] 8008656: 4b08 ldr r3, [pc, #32] ; (8008678 ) { 8008658: b082 sub sp, #8 if(htim_base->Instance==TIM6) 800865a: 429a cmp r2, r3 800865c: d10a bne.n 8008674 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 800865e: f503 3300 add.w r3, r3, #131072 ; 0x20000 8008662: 69da ldr r2, [r3, #28] 8008664: f042 0210 orr.w r2, r2, #16 8008668: 61da str r2, [r3, #28] 800866a: 69db ldr r3, [r3, #28] 800866c: f003 0310 and.w r3, r3, #16 8008670: 9301 str r3, [sp, #4] 8008672: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8008674: b002 add sp, #8 8008676: 4770 bx lr 8008678: 40001000 .word 0x40001000 0800867c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 800867c: b570 push {r4, r5, r6, lr} 800867e: 4606 mov r6, r0 8008680: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008682: 2210 movs r2, #16 8008684: 2100 movs r1, #0 8008686: a802 add r0, sp, #8 8008688: f000 fe6b bl 8009362 if(huart->Instance==USART1) 800868c: 6832 ldr r2, [r6, #0] 800868e: 4b2b ldr r3, [pc, #172] ; (800873c ) 8008690: 429a cmp r2, r3 8008692: d151 bne.n 8008738 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8008694: f503 4358 add.w r3, r3, #55296 ; 0xd800 8008698: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800869a: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 800869c: f442 4280 orr.w r2, r2, #16384 ; 0x4000 80086a0: 619a str r2, [r3, #24] 80086a2: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80086a4: 4826 ldr r0, [pc, #152] ; (8008740 ) __HAL_RCC_USART1_CLK_ENABLE(); 80086a6: f402 4280 and.w r2, r2, #16384 ; 0x4000 80086aa: 9200 str r2, [sp, #0] 80086ac: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 80086ae: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80086b0: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 80086b2: f042 0204 orr.w r2, r2, #4 80086b6: 619a str r2, [r3, #24] 80086b8: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 80086ba: 4c22 ldr r4, [pc, #136] ; (8008744 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 80086bc: f003 0304 and.w r3, r3, #4 80086c0: 9301 str r3, [sp, #4] 80086c2: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 80086c4: f44f 7300 mov.w r3, #512 ; 0x200 80086c8: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80086ca: 2302 movs r3, #2 80086cc: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80086ce: 2303 movs r3, #3 80086d0: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80086d2: f7fd fd0d bl 80060f0 GPIO_InitStruct.Pin = GPIO_PIN_10; 80086d6: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80086da: 4819 ldr r0, [pc, #100] ; (8008740 ) 80086dc: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 80086de: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80086e0: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 80086e2: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80086e4: f7fd fd04 bl 80060f0 hdma_usart1_rx.Instance = DMA1_Channel5; 80086e8: 4b17 ldr r3, [pc, #92] ; (8008748 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80086ea: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 80086ec: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80086f0: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80086f2: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80086f4: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80086f6: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80086f8: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 80086fa: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 80086fc: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80086fe: f7fd fa09 bl 8005b14 8008702: b108 cbz r0, 8008708 { Error_Handler(); 8008704: f7ff fde8 bl 80082d8 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8008708: f04f 0c10 mov.w ip, #16 800870c: 4b0f ldr r3, [pc, #60] ; (800874c ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 800870e: 6374 str r4, [r6, #52] ; 0x34 8008710: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 8008712: 4c0f ldr r4, [pc, #60] ; (8008750 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8008714: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8008716: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800871a: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 800871c: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800871e: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8008720: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8008722: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8008724: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 8008726: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8008728: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 800872a: f7fd f9f3 bl 8005b14 800872e: b108 cbz r0, 8008734 { Error_Handler(); 8008730: f7ff fdd2 bl 80082d8 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 8008734: 6334 str r4, [r6, #48] ; 0x30 8008736: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8008738: b006 add sp, #24 800873a: bd70 pop {r4, r5, r6, pc} 800873c: 40013800 .word 0x40013800 8008740: 40010800 .word 0x40010800 8008744: 20000680 .word 0x20000680 8008748: 40020058 .word 0x40020058 800874c: 40020044 .word 0x40020044 8008750: 2000060c .word 0x2000060c 08008754 : 8008754: 4770 bx lr 08008756 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8008756: e7fe b.n 8008756 08008758 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8008758: e7fe b.n 8008758 0800875a : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800875a: e7fe b.n 800875a 0800875c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 800875c: e7fe b.n 800875c 0800875e : 800875e: 4770 bx lr 08008760 : 8008760: 4770 bx lr 08008762 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8008762: 4770 bx lr 08008764 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8008764: f7fc beb0 b.w 80054c8 08008768 : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 8008768: 4801 ldr r0, [pc, #4] ; (8008770 ) 800876a: f7fd babf b.w 8005cec 800876e: bf00 nop 8008770: 20000704 .word 0x20000704 08008774 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8008774: 4801 ldr r0, [pc, #4] ; (800877c ) 8008776: f7fd bab9 b.w 8005cec 800877a: bf00 nop 800877c: 2000060c .word 0x2000060c 08008780 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8008780: 4801 ldr r0, [pc, #4] ; (8008788 ) 8008782: f7fd bab3 b.w 8005cec 8008786: bf00 nop 8008788: 20000680 .word 0x20000680 0800878c : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 800878c: 4801 ldr r0, [pc, #4] ; (8008794 ) 800878e: f7fe bcf5 b.w 800717c 8008792: bf00 nop 8008794: 200006c4 .word 0x200006c4 08008798 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8008798: 4801 ldr r0, [pc, #4] ; (80087a0 ) 800879a: f7fe b93d b.w 8006a18 800879e: bf00 nop 80087a0: 20000748 .word 0x20000748 080087a4 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 80087a4: b570 push {r4, r5, r6, lr} 80087a6: 460e mov r6, r1 80087a8: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 80087aa: 460c mov r4, r1 80087ac: 1ba3 subs r3, r4, r6 80087ae: 429d cmp r5, r3 80087b0: dc01 bgt.n 80087b6 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 80087b2: 4628 mov r0, r5 80087b4: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 80087b6: f3af 8000 nop.w 80087ba: f804 0b01 strb.w r0, [r4], #1 80087be: e7f5 b.n 80087ac <_read+0x8> 080087c0 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 80087c0: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 80087c2: 4b0a ldr r3, [pc, #40] ; (80087ec <_sbrk+0x2c>) { 80087c4: 4602 mov r2, r0 if (heap_end == 0) 80087c6: 6819 ldr r1, [r3, #0] 80087c8: b909 cbnz r1, 80087ce <_sbrk+0xe> heap_end = &end; 80087ca: 4909 ldr r1, [pc, #36] ; (80087f0 <_sbrk+0x30>) 80087cc: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 80087ce: 4669 mov r1, sp prev_heap_end = heap_end; 80087d0: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 80087d2: 4402 add r2, r0 80087d4: 428a cmp r2, r1 80087d6: d906 bls.n 80087e6 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 80087d8: f000 fd8e bl 80092f8 <__errno> 80087dc: 230c movs r3, #12 80087de: 6003 str r3, [r0, #0] return (caddr_t) -1; 80087e0: f04f 30ff mov.w r0, #4294967295 80087e4: bd08 pop {r3, pc} } heap_end += incr; 80087e6: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 80087e8: bd08 pop {r3, pc} 80087ea: bf00 nop 80087ec: 20000448 .word 0x20000448 80087f0: 200017a8 .word 0x200017a8 080087f4 <_close>: int _close(int file) { return -1; } 80087f4: f04f 30ff mov.w r0, #4294967295 80087f8: 4770 bx lr 080087fa <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 80087fa: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 80087fe: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8008800: 604b str r3, [r1, #4] } 8008802: 4770 bx lr 08008804 <_isatty>: int _isatty(int file) { return 1; } 8008804: 2001 movs r0, #1 8008806: 4770 bx lr 08008808 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 8008808: 2000 movs r0, #0 800880a: 4770 bx lr 0800880c : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 800880c: 4b0e ldr r3, [pc, #56] ; (8008848 ) 800880e: 681a ldr r2, [r3, #0] 8008810: f042 0201 orr.w r2, r2, #1 8008814: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8008816: 6859 ldr r1, [r3, #4] 8008818: 4a0c ldr r2, [pc, #48] ; (800884c ) 800881a: 400a ands r2, r1 800881c: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 800881e: 681a ldr r2, [r3, #0] 8008820: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8008824: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8008828: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 800882a: 681a ldr r2, [r3, #0] 800882c: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8008830: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8008832: 685a ldr r2, [r3, #4] 8008834: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8008838: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 800883a: f44f 021f mov.w r2, #10420224 ; 0x9f0000 800883e: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8008840: 4a03 ldr r2, [pc, #12] ; (8008850 ) 8008842: 4b04 ldr r3, [pc, #16] ; (8008854 ) 8008844: 609a str r2, [r3, #8] 8008846: 4770 bx lr 8008848: 40021000 .word 0x40021000 800884c: f8ff0000 .word 0xf8ff0000 8008850: 08004000 .word 0x08004000 8008854: e000ed00 .word 0xe000ed00 08008858 : UARTQUEUE WifiQueue; uart_hal_tx_type uart_hal_tx; void InitUartQueue(pUARTQUEUE pQueue) { setbuf(stdout, NULL); 8008858: 4b0b ldr r3, [pc, #44] ; (8008888 ) { 800885a: b510 push {r4, lr} setbuf(stdout, NULL); 800885c: 681b ldr r3, [r3, #0] { 800885e: 4604 mov r4, r0 setbuf(stdout, NULL); 8008860: 2100 movs r1, #0 8008862: 6898 ldr r0, [r3, #8] 8008864: f001 fa62 bl 8009d2c pQueue->data = pQueue->head = pQueue->tail = 0; 8008868: 2300 movs r3, #0 uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 800886a: 4a08 ldr r2, [pc, #32] ; (800888c ) pQueue->data = pQueue->head = pQueue->tail = 0; 800886c: 6063 str r3, [r4, #4] 800886e: 6023 str r3, [r4, #0] 8008870: 60a3 str r3, [r4, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008872: 4907 ldr r1, [pc, #28] ; (8008890 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 8008874: f8a2 3400 strh.w r3, [r2, #1024] ; 0x400 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008878: 4806 ldr r0, [pc, #24] ; (8008894 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 800887a: f8a2 3402 strh.w r3, [r2, #1026] ; 0x402 { //_Error_Handler(__FILE__, __LINE__); } //HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1); //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1); } 800887e: e8bd 4010 ldmia.w sp!, {r4, lr} if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8008882: 2201 movs r2, #1 8008884: f7fe bb8c b.w 8006fa0 8008888: 20000234 .word 0x20000234 800888c: 20000f94 .word 0x20000f94 8008890: 20000b94 .word 0x20000b94 8008894: 200006c4 .word 0x200006c4 08008898 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008898: 4a14 ldr r2, [pc, #80] ; (80088ec ) { 800889a: b538 push {r3, r4, r5, lr} uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 800889c: 6810 ldr r0, [r2, #0] 800889e: 1c43 adds r3, r0, #1 80088a0: 6013 str r3, [r2, #0] 80088a2: 4b13 ldr r3, [pc, #76] ; (80088f0 ) 80088a4: 6859 ldr r1, [r3, #4] 80088a6: f103 040c add.w r4, r3, #12 80088aa: 5d0d ldrb r5, [r1, r4] 80088ac: 4c11 ldr r4, [pc, #68] ; (80088f4 ) #ifdef DEBUG_PRINT printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; #endif /* DEBUG_PRINT */ pQueue->tail++; 80088ae: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80088b0: f5b1 6f80 cmp.w r1, #1024 ; 0x400 uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80088b4: 5425 strb r5, [r4, r0] 80088b6: 4614 mov r4, r2 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80088b8: bfa8 it ge 80088ba: 2200 movge r2, #0 pQueue->data--; 80088bc: 689d ldr r5, [r3, #8] pQueue->tail++; 80088be: bfb8 it lt 80088c0: 6059 strlt r1, [r3, #4] pQueue->data--; 80088c2: f105 35ff add.w r5, r5, #4294967295 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80088c6: bfa8 it ge 80088c8: 605a strge r2, [r3, #4] pQueue->data--; 80088ca: 609d str r5, [r3, #8] if(pQueue->data == 0){ 80088cc: b96d cbnz r5, 80088ea // printf("data cnt zero !!! \r\n"); RF_Ctrl_Main(&uart_buf[Header]); 80088ce: 4809 ldr r0, [pc, #36] ; (80088f4 ) 80088d0: f000 fc9e bl 8009210 #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 80088d4: 6822 ldr r2, [r4, #0] 80088d6: 4629 mov r1, r5 80088d8: 4806 ldr r0, [pc, #24] ; (80088f4 ) 80088da: f000 fd42 bl 8009362 // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 80088de: 6025 str r5, [r4, #0] HAL_Delay(1); 80088e0: 2001 movs r0, #1 } } 80088e2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_Delay(1); 80088e6: f7fc be01 b.w 80054ec 80088ea: bd38 pop {r3, r4, r5, pc} 80088ec: 2000044c .word 0x2000044c 80088f0: 20000b88 .word 0x20000b88 80088f4: 20000788 .word 0x20000788 080088f8 : AdcTimerCnt = UartRxTimerCnt = 0; 80088f8: 2300 movs r3, #0 80088fa: 4a0f ldr r2, [pc, #60] ; (8008938 ) { 80088fc: b510 push {r4, lr} AdcTimerCnt = UartRxTimerCnt = 0; 80088fe: 6013 str r3, [r2, #0] pQueue->head++; 8008900: 4c0e ldr r4, [pc, #56] ; (800893c ) AdcTimerCnt = UartRxTimerCnt = 0; 8008902: 4a0f ldr r2, [pc, #60] ; (8008940 ) 8008904: 6013 str r3, [r2, #0] pQueue->head++; 8008906: 6822 ldr r2, [r4, #0] 8008908: 3201 adds r2, #1 800890a: f5b2 6f80 cmp.w r2, #1024 ; 0x400 800890e: bfb8 it lt 8008910: 4613 movlt r3, r2 8008912: 6023 str r3, [r4, #0] pQueue->data++; 8008914: 68a3 ldr r3, [r4, #8] 8008916: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008918: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 800891c: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 800891e: db01 blt.n 8008924 GetDataFromUartQueue(huart); 8008920: f7ff ffba bl 8008898 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008924: 6823 ldr r3, [r4, #0] 8008926: 4907 ldr r1, [pc, #28] ; (8008944 ) 8008928: 2201 movs r2, #1 } 800892a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800892e: 4419 add r1, r3 8008930: 4805 ldr r0, [pc, #20] ; (8008948 ) 8008932: f7fe bb35 b.w 8006fa0 8008936: bf00 nop 8008938: 20000444 .word 0x20000444 800893c: 20000b88 .word 0x20000b88 8008940: 20000438 .word 0x20000438 8008944: 20000b94 .word 0x20000b94 8008948: 200006c4 .word 0x200006c4 0800894c : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ 800894c: b508 push {r3, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 800894e: 78c3 ldrb r3, [r0, #3] 8008950: 7881 ldrb r1, [r0, #2] 8008952: 5cc2 ldrb r2, [r0, r3] 8008954: 3001 adds r0, #1 8008956: f7fe fd7f bl 8007458 // printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); } // printf("CRC Result : \"%d\" \r\n",ret); return ret; } 800895a: 3000 adds r0, #0 800895c: bf18 it ne 800895e: 2001 movne r0, #1 8008960: bd08 pop {r3, pc} ... 08008964 : PLL_EN_3_5G_L_GPIO_Port, PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008964: 23be movs r3, #190 ; 0xbe void RF_Status_Get(void){ 8008966: b510 push {r4, lr} Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008968: 4c0b ldr r4, [pc, #44] ; (8008998 ) Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 800896a: 215d movs r1, #93 ; 0x5d Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 800896c: 7023 strb r3, [r4, #0] Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; 800896e: 2302 movs r3, #2 8008970: 7063 strb r3, [r4, #1] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008972: 235e movs r3, #94 ; 0x5e Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008974: 1c60 adds r0, r4, #1 Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 8008976: 70a1 strb r1, [r4, #2] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008978: 70e3 strb r3, [r4, #3] Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 800897a: f7fe fd52 bl 8007422 Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 800897e: 23eb movs r3, #235 ; 0xeb Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 8008980: f884 005e strb.w r0, [r4, #94] ; 0x5e Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008984: f884 305f strb.w r3, [r4, #95] ; 0x5f HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008988: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 800898a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 800898e: 2260 movs r2, #96 ; 0x60 8008990: 4802 ldr r0, [pc, #8] ; (800899c ) 8008992: f7fe bacb b.w 8006f2c 8008996: bf00 nop 8008998: 20000574 .word 0x20000574 800899c: 200006c4 .word 0x200006c4 080089a0 : static uint8_t Ack_Buf[6]; void RF_Status_Ack(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 80089a0: 23be movs r3, #190 ; 0xbe void RF_Status_Ack(void){ 80089a2: b510 push {r4, lr} Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 80089a4: 4c0a ldr r4, [pc, #40] ; (80089d0 ) Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; Ack_Buf[INDEX_BLUE_LENGTH] = 3; 80089a6: 2103 movs r1, #3 Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 80089a8: 7023 strb r3, [r4, #0] Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 80089aa: 2304 movs r3, #4 Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 80089ac: 1c60 adds r0, r4, #1 Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 80089ae: 7063 strb r3, [r4, #1] Ack_Buf[INDEX_BLUE_LENGTH] = 3; 80089b0: 70a1 strb r1, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; 80089b2: 70e3 strb r3, [r4, #3] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 80089b4: f7fe fd35 bl 8007422 Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 80089b8: 23eb movs r3, #235 ; 0xeb HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 80089ba: 78a2 ldrb r2, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 80089bc: 7120 strb r0, [r4, #4] Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 80089be: 7163 strb r3, [r4, #5] HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 80089c0: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 80089c2: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 80089c6: 3203 adds r2, #3 80089c8: 4802 ldr r0, [pc, #8] ; (80089d4 ) 80089ca: f7fe baaf b.w 8006f2c 80089ce: bf00 nop 80089d0: 20000450 .word 0x20000450 80089d4: 200006c4 .word 0x200006c4 080089d8 : void RF_Operate(uint8_t* data_buf){ 80089d8: b570 push {r4, r5, r6, lr} uint16_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; // printf("Prev_data[INDEX_ATT_1_8G_DL1] : %x data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]); if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80089da: 4db1 ldr r5, [pc, #708] ; (8008ca0 ) 80089dc: 7902 ldrb r2, [r0, #4] 80089de: 792b ldrb r3, [r5, #4] void RF_Operate(uint8_t* data_buf){ 80089e0: b0a2 sub sp, #136 ; 0x88 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80089e2: 4293 cmp r3, r2 void RF_Operate(uint8_t* data_buf){ 80089e4: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80089e6: d00c beq.n 8008a02 BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 80089e8: 4bae ldr r3, [pc, #696] ; (8008ca4 ) 80089ea: 9202 str r2, [sp, #8] 80089ec: f103 0210 add.w r2, r3, #16 80089f0: e892 0003 ldmia.w r2, {r0, r1} 80089f4: e88d 0003 stmia.w sp, {r0, r1} 80089f8: cb0f ldmia r3, {r0, r1, r2, r3} 80089fa: f7fe fcb9 bl 8007370 Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 80089fe: 7923 ldrb r3, [r4, #4] 8008a00: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 8008a02: 7962 ldrb r2, [r4, #5] 8008a04: 796b ldrb r3, [r5, #5] 8008a06: 4293 cmp r3, r2 8008a08: d00c beq.n 8008a24 BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008a0a: 4ba7 ldr r3, [pc, #668] ; (8008ca8 ) 8008a0c: 9202 str r2, [sp, #8] 8008a0e: f103 0210 add.w r2, r3, #16 8008a12: e892 0003 ldmia.w r2, {r0, r1} 8008a16: e88d 0003 stmia.w sp, {r0, r1} 8008a1a: cb0f ldmia r3, {r0, r1, r2, r3} 8008a1c: f7fe fca8 bl 8007370 Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 8008a20: 7963 ldrb r3, [r4, #5] 8008a22: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 8008a24: 79a2 ldrb r2, [r4, #6] 8008a26: 79ab ldrb r3, [r5, #6] 8008a28: 4293 cmp r3, r2 8008a2a: d00c beq.n 8008a46 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008a2c: 4b9f ldr r3, [pc, #636] ; (8008cac ) 8008a2e: 9202 str r2, [sp, #8] 8008a30: f103 0210 add.w r2, r3, #16 8008a34: e892 0003 ldmia.w r2, {r0, r1} 8008a38: e88d 0003 stmia.w sp, {r0, r1} 8008a3c: cb0f ldmia r3, {r0, r1, r2, r3} 8008a3e: f7fe fc97 bl 8007370 Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 8008a42: 79a3 ldrb r3, [r4, #6] 8008a44: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 8008a46: 79e2 ldrb r2, [r4, #7] 8008a48: 79eb ldrb r3, [r5, #7] 8008a4a: 4293 cmp r3, r2 8008a4c: d00c beq.n 8008a68 BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008a4e: 4b98 ldr r3, [pc, #608] ; (8008cb0 ) 8008a50: 9202 str r2, [sp, #8] 8008a52: f103 0210 add.w r2, r3, #16 8008a56: e892 0003 ldmia.w r2, {r0, r1} 8008a5a: e88d 0003 stmia.w sp, {r0, r1} 8008a5e: cb0f ldmia r3, {r0, r1, r2, r3} 8008a60: f7fe fc86 bl 8007370 Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 8008a64: 79e3 ldrb r3, [r4, #7] 8008a66: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 8008a68: 7a22 ldrb r2, [r4, #8] 8008a6a: 7a2b ldrb r3, [r5, #8] 8008a6c: 4293 cmp r3, r2 8008a6e: d00c beq.n 8008a8a BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008a70: 4b90 ldr r3, [pc, #576] ; (8008cb4 ) 8008a72: 9202 str r2, [sp, #8] 8008a74: f103 0210 add.w r2, r3, #16 8008a78: e892 0003 ldmia.w r2, {r0, r1} 8008a7c: e88d 0003 stmia.w sp, {r0, r1} 8008a80: cb0f ldmia r3, {r0, r1, r2, r3} 8008a82: f7fe fc75 bl 8007370 Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 8008a86: 7a23 ldrb r3, [r4, #8] 8008a88: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 8008a8a: 7a62 ldrb r2, [r4, #9] 8008a8c: 7a6b ldrb r3, [r5, #9] 8008a8e: 4293 cmp r3, r2 8008a90: d00c beq.n 8008aac BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008a92: 4b89 ldr r3, [pc, #548] ; (8008cb8 ) 8008a94: 9202 str r2, [sp, #8] 8008a96: f103 0210 add.w r2, r3, #16 8008a9a: e892 0003 ldmia.w r2, {r0, r1} 8008a9e: e88d 0003 stmia.w sp, {r0, r1} 8008aa2: cb0f ldmia r3, {r0, r1, r2, r3} 8008aa4: f7fe fc64 bl 8007370 Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 8008aa8: 7a63 ldrb r3, [r4, #9] 8008aaa: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 8008aac: 7aa2 ldrb r2, [r4, #10] 8008aae: 7aab ldrb r3, [r5, #10] 8008ab0: 4293 cmp r3, r2 8008ab2: d00c beq.n 8008ace BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008ab4: 4b81 ldr r3, [pc, #516] ; (8008cbc ) 8008ab6: 9202 str r2, [sp, #8] 8008ab8: f103 0210 add.w r2, r3, #16 8008abc: e892 0003 ldmia.w r2, {r0, r1} 8008ac0: e88d 0003 stmia.w sp, {r0, r1} 8008ac4: cb0f ldmia r3, {r0, r1, r2, r3} 8008ac6: f7fe fc53 bl 8007370 Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 8008aca: 7aa3 ldrb r3, [r4, #10] 8008acc: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 8008ace: 7ae2 ldrb r2, [r4, #11] 8008ad0: 7aeb ldrb r3, [r5, #11] 8008ad2: 4293 cmp r3, r2 8008ad4: d00c beq.n 8008af0 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008ad6: 4b7a ldr r3, [pc, #488] ; (8008cc0 ) 8008ad8: 9202 str r2, [sp, #8] 8008ada: f103 0210 add.w r2, r3, #16 8008ade: e892 0003 ldmia.w r2, {r0, r1} 8008ae2: e88d 0003 stmia.w sp, {r0, r1} 8008ae6: cb0f ldmia r3, {r0, r1, r2, r3} 8008ae8: f7fe fc42 bl 8007370 Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008aec: 7ae3 ldrb r3, [r4, #11] 8008aee: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008af0: 7b22 ldrb r2, [r4, #12] 8008af2: 7b2b ldrb r3, [r5, #12] 8008af4: 4293 cmp r3, r2 8008af6: d00c beq.n 8008b12 BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008af8: 4b72 ldr r3, [pc, #456] ; (8008cc4 ) 8008afa: 9202 str r2, [sp, #8] 8008afc: f103 0210 add.w r2, r3, #16 8008b00: e892 0003 ldmia.w r2, {r0, r1} 8008b04: e88d 0003 stmia.w sp, {r0, r1} 8008b08: cb0f ldmia r3, {r0, r1, r2, r3} 8008b0a: f7fe fc31 bl 8007370 Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008b0e: 7b23 ldrb r3, [r4, #12] 8008b10: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 8008b12: 7b62 ldrb r2, [r4, #13] 8008b14: 7b6b ldrb r3, [r5, #13] 8008b16: 4293 cmp r3, r2 8008b18: d00c beq.n 8008b34 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008b1a: 4b6b ldr r3, [pc, #428] ; (8008cc8 ) 8008b1c: 9202 str r2, [sp, #8] 8008b1e: f103 0210 add.w r2, r3, #16 8008b22: e892 0003 ldmia.w r2, {r0, r1} 8008b26: e88d 0003 stmia.w sp, {r0, r1} 8008b2a: cb0f ldmia r3, {r0, r1, r2, r3} 8008b2c: f7fe fc20 bl 8007370 Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008b30: 7b63 ldrb r3, [r4, #13] 8008b32: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 8008b34: 7ba2 ldrb r2, [r4, #14] 8008b36: 7bab ldrb r3, [r5, #14] 8008b38: 4293 cmp r3, r2 8008b3a: d00c beq.n 8008b56 BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008b3c: 4b63 ldr r3, [pc, #396] ; (8008ccc ) 8008b3e: 9202 str r2, [sp, #8] 8008b40: f103 0210 add.w r2, r3, #16 8008b44: e892 0003 ldmia.w r2, {r0, r1} 8008b48: e88d 0003 stmia.w sp, {r0, r1} 8008b4c: cb0f ldmia r3, {r0, r1, r2, r3} 8008b4e: f7fe fc0f bl 8007370 Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 8008b52: 7ba3 ldrb r3, [r4, #14] 8008b54: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 8008b56: 7be2 ldrb r2, [r4, #15] 8008b58: 7beb ldrb r3, [r5, #15] 8008b5a: 4293 cmp r3, r2 8008b5c: d00c beq.n 8008b78 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008b5e: 4b5c ldr r3, [pc, #368] ; (8008cd0 ) 8008b60: 9202 str r2, [sp, #8] 8008b62: f103 0210 add.w r2, r3, #16 8008b66: e892 0003 ldmia.w r2, {r0, r1} 8008b6a: e88d 0003 stmia.w sp, {r0, r1} 8008b6e: cb0f ldmia r3, {r0, r1, r2, r3} 8008b70: f7fe fbfe bl 8007370 Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 8008b74: 7be3 ldrb r3, [r4, #15] 8008b76: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1]) 8008b78: 7c23 ldrb r3, [r4, #16] 8008b7a: 7c2a ldrb r2, [r5, #16] 8008b7c: 429a cmp r2, r3 8008b7e: d10f bne.n 8008ba0 ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL]) 8008b80: 7c69 ldrb r1, [r5, #17] 8008b82: 7c62 ldrb r2, [r4, #17] 8008b84: 4291 cmp r1, r2 8008b86: d10b bne.n 8008ba0 ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 8008b88: 7ca9 ldrb r1, [r5, #18] 8008b8a: 7ca2 ldrb r2, [r4, #18] 8008b8c: 4291 cmp r1, r2 8008b8e: d107 bne.n 8008ba0 ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 8008b90: 7ce9 ldrb r1, [r5, #19] 8008b92: 7ce2 ldrb r2, [r4, #19] 8008b94: 4291 cmp r1, r2 8008b96: d103 bne.n 8008ba0 ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3]) 8008b98: 7d29 ldrb r1, [r5, #20] 8008b9a: 7d22 ldrb r2, [r4, #20] 8008b9c: 4291 cmp r1, r2 8008b9e: d01c beq.n 8008bda ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1] = data_buf[INDEX_ATT_3_5G_LOW1]; 8008ba0: 4e4c ldr r6, [pc, #304] ; (8008cd4 ) 8008ba2: 742b strb r3, [r5, #16] 8008ba4: 7633 strb r3, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 8008ba6: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008ba8: 227c movs r2, #124 ; 0x7c ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 8008baa: 746b strb r3, [r5, #17] 8008bac: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008bb0: 7ca3 ldrb r3, [r4, #18] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008bb2: f106 0110 add.w r1, r6, #16 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008bb6: 74ab strb r3, [r5, #18] 8008bb8: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008bbc: 7ce3 ldrb r3, [r4, #19] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008bbe: 4668 mov r0, sp ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008bc0: 74eb strb r3, [r5, #19] 8008bc2: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; 8008bc6: 7d23 ldrb r3, [r4, #20] 8008bc8: 752b strb r3, [r5, #20] 8008bca: f886 3088 strb.w r3, [r6, #136] ; 0x88 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008bce: f000 fbbd bl 800934c 8008bd2: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008bd6: f7fe fc6f bl 80074b8 } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 8008bda: 7d62 ldrb r2, [r4, #21] 8008bdc: 7d6b ldrb r3, [r5, #21] 8008bde: 4293 cmp r3, r2 8008be0: d01d beq.n 8008c1e && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008be2: 7da3 ldrb r3, [r4, #22] 8008be4: 7da9 ldrb r1, [r5, #22] 8008be6: 4299 cmp r1, r3 8008be8: d019 beq.n 8008c1e ){ Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H]; 8008bea: 756a strb r2, [r5, #21] Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L]; 8008bec: 75ab strb r3, [r5, #22] temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); 8008bee: 7d60 ldrb r0, [r4, #21] 8008bf0: 7da3 ldrb r3, [r4, #22] ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092); 8008bf2: ea43 2300 orr.w r3, r3, r0, lsl #8 8008bf6: 4838 ldr r0, [pc, #224] ; (8008cd8 ) 8008bf8: 4358 muls r0, r3 8008bfa: f7ff fbb7 bl 800836c 8008bfe: 4a37 ldr r2, [pc, #220] ; (8008cdc ) 8008c00: 4b37 ldr r3, [pc, #220] ; (8008ce0 ) 8008c02: 9204 str r2, [sp, #16] 8008c04: f44f 6282 mov.w r2, #1040 ; 0x410 8008c08: 9003 str r0, [sp, #12] 8008c0a: 9202 str r2, [sp, #8] 8008c0c: f103 0210 add.w r2, r3, #16 8008c10: e892 0003 ldmia.w r2, {r0, r1} 8008c14: e88d 0003 stmia.w sp, {r0, r1} 8008c18: cb0f ldmia r3, {r0, r1, r2, r3} 8008c1a: f7ff fbd9 bl 80083d0 } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 8008c1e: 7de3 ldrb r3, [r4, #23] 8008c20: 7dea ldrb r2, [r5, #23] 8008c22: 429a cmp r2, r3 8008c24: d01b beq.n 8008c5e && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 8008c26: 7e20 ldrb r0, [r4, #24] 8008c28: 7e2a ldrb r2, [r5, #24] 8008c2a: 4282 cmp r2, r0 8008c2c: d017 beq.n 8008c5e temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H]; 8008c2e: 75eb strb r3, [r5, #23] Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L]; 8008c30: 7628 strb r0, [r5, #24] // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008c32: ea40 2003 orr.w r0, r0, r3, lsl #8 8008c36: 4b28 ldr r3, [pc, #160] ; (8008cd8 ) 8008c38: 4358 muls r0, r3 8008c3a: f7ff fb97 bl 800836c 8008c3e: 4a27 ldr r2, [pc, #156] ; (8008cdc ) 8008c40: 4b28 ldr r3, [pc, #160] ; (8008ce4 ) 8008c42: 9204 str r2, [sp, #16] 8008c44: f44f 6282 mov.w r2, #1040 ; 0x410 8008c48: 9003 str r0, [sp, #12] 8008c4a: 9202 str r2, [sp, #8] 8008c4c: f103 0210 add.w r2, r3, #16 8008c50: e892 0003 ldmia.w r2, {r0, r1} 8008c54: e88d 0003 stmia.w sp, {r0, r1} 8008c58: cb0f ldmia r3, {r0, r1, r2, r3} 8008c5a: f7ff fbb9 bl 80083d0 } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) 8008c5e: 7e63 ldrb r3, [r4, #25] 8008c60: 7e6a ldrb r2, [r5, #25] 8008c62: 429a cmp r2, r3 8008c64: d042 beq.n 8008cec && (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ 8008c66: 7ea0 ldrb r0, [r4, #26] 8008c68: 7eaa ldrb r2, [r5, #26] 8008c6a: 4282 cmp r2, r0 8008c6c: d03e beq.n 8008cec temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H]; 8008c6e: 766b strb r3, [r5, #25] Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L]; 8008c70: 76a8 strb r0, [r5, #26] // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092); ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008c72: ea40 2003 orr.w r0, r0, r3, lsl #8 8008c76: 4b18 ldr r3, [pc, #96] ; (8008cd8 ) 8008c78: 4358 muls r0, r3 8008c7a: f7ff fb77 bl 800836c 8008c7e: 4a17 ldr r2, [pc, #92] ; (8008cdc ) 8008c80: 4b19 ldr r3, [pc, #100] ; (8008ce8 ) 8008c82: 9204 str r2, [sp, #16] 8008c84: f44f 6282 mov.w r2, #1040 ; 0x410 8008c88: 9003 str r0, [sp, #12] 8008c8a: 9202 str r2, [sp, #8] 8008c8c: f103 0210 add.w r2, r3, #16 8008c90: e892 0003 ldmia.w r2, {r0, r1} 8008c94: e88d 0003 stmia.w sp, {r0, r1} 8008c98: cb0f ldmia r3, {r0, r1, r2, r3} 8008c9a: f7ff fb99 bl 80083d0 8008c9e: e025 b.n 8008cec 8008ca0: 20000574 .word 0x20000574 8008ca4: 20000008 .word 0x20000008 8008ca8: 20000020 .word 0x20000020 8008cac: 20000038 .word 0x20000038 8008cb0: 20000050 .word 0x20000050 8008cb4: 20000068 .word 0x20000068 8008cb8: 20000080 .word 0x20000080 8008cbc: 20000098 .word 0x20000098 8008cc0: 200000b0 .word 0x200000b0 8008cc4: 200000c8 .word 0x200000c8 8008cc8: 200000e0 .word 0x200000e0 8008ccc: 200000f8 .word 0x200000f8 8008cd0: 20000110 .word 0x20000110 8008cd4: 200004e8 .word 0x200004e8 8008cd8: 000186a0 .word 0x000186a0 8008cdc: 009f8092 .word 0x009f8092 8008ce0: 200001a0 .word 0x200001a0 8008ce4: 200001b8 .word 0x200001b8 8008ce8: 200001d0 .word 0x200001d0 } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) 8008cec: 7ee2 ldrb r2, [r4, #27] 8008cee: 7eeb ldrb r3, [r5, #27] 8008cf0: 4293 cmp r3, r2 8008cf2: d01d beq.n 8008d30 && (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ 8008cf4: 7f23 ldrb r3, [r4, #28] 8008cf6: 7f29 ldrb r1, [r5, #28] 8008cf8: 4299 cmp r1, r3 8008cfa: d019 beq.n 8008d30 Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H]; 8008cfc: 76ea strb r2, [r5, #27] Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L]; 8008cfe: 772b strb r3, [r5, #28] temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); 8008d00: 7ee0 ldrb r0, [r4, #27] 8008d02: 7f23 ldrb r3, [r4, #28] // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008d04: ea43 2300 orr.w r3, r3, r0, lsl #8 8008d08: 48c7 ldr r0, [pc, #796] ; (8009028 ) 8008d0a: 4358 muls r0, r3 8008d0c: f7ff fb2e bl 800836c 8008d10: 4ac6 ldr r2, [pc, #792] ; (800902c ) 8008d12: 4bc7 ldr r3, [pc, #796] ; (8009030 ) 8008d14: 9204 str r2, [sp, #16] 8008d16: f44f 6282 mov.w r2, #1040 ; 0x410 8008d1a: 9003 str r0, [sp, #12] 8008d1c: 9202 str r2, [sp, #8] 8008d1e: f103 0210 add.w r2, r3, #16 8008d22: e892 0003 ldmia.w r2, {r0, r1} 8008d26: e88d 0003 stmia.w sp, {r0, r1} 8008d2a: cb0f ldmia r3, {r0, r1, r2, r3} 8008d2c: f7ff fb50 bl 80083d0 } if((Prev_data[INDEX_PLL_3_5G_DL_H] != data_buf[INDEX_PLL_3_5G_DL_H]) 8008d30: 7f62 ldrb r2, [r4, #29] 8008d32: 7f6b ldrb r3, [r5, #29] 8008d34: 4293 cmp r3, r2 8008d36: d027 beq.n 8008d88 && (Prev_data[INDEX_PLL_3_5G_DL_L] != data_buf[INDEX_PLL_3_5G_DL_L])){ 8008d38: 7fa3 ldrb r3, [r4, #30] 8008d3a: 7fa9 ldrb r1, [r5, #30] 8008d3c: 4299 cmp r1, r3 8008d3e: d023 beq.n 8008d88 Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]; Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L]; 8008d40: 77ab strb r3, [r5, #30] temp_val = (data_buf[INDEX_PLL_3_5G_DL_H] << 8) | (data_buf[INDEX_PLL_3_5G_DL_L]); temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d42: f241 3388 movw r3, #5000 ; 0x1388 8008d46: 9303 str r3, [sp, #12] 8008d48: 2302 movs r3, #2 8008d4a: 9302 str r3, [sp, #8] 8008d4c: 2300 movs r3, #0 Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]; 8008d4e: 776a strb r2, [r5, #29] temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d50: 4ab8 ldr r2, [pc, #736] ; (8009034 ) 8008d52: a820 add r0, sp, #128 ; 0x80 8008d54: e9cd 2300 strd r2, r3, [sp] 8008d58: a3af add r3, pc, #700 ; (adr r3, 8009018 ) 8008d5a: e9d3 2300 ldrd r2, r3, [r3] 8008d5e: f7fe fce7 bl 8007730 ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008d62: 2203 movs r2, #3 8008d64: 9205 str r2, [sp, #20] 8008d66: f241 32c2 movw r2, #5058 ; 0x13c2 8008d6a: 9204 str r2, [sp, #16] 8008d6c: 9a20 ldr r2, [sp, #128] ; 0x80 8008d6e: 4bb2 ldr r3, [pc, #712] ; (8009038 ) 8008d70: 9203 str r2, [sp, #12] 8008d72: 9a21 ldr r2, [sp, #132] ; 0x84 8008d74: 9202 str r2, [sp, #8] 8008d76: f103 0210 add.w r2, r3, #16 8008d7a: e892 0003 ldmia.w r2, {r0, r1} 8008d7e: e88d 0003 stmia.w sp, {r0, r1} 8008d82: cb0f ldmia r3, {r0, r1, r2, r3} 8008d84: f7fe fd58 bl 8007838 } if((Prev_data[INDEX_PLL_3_5G_UL_H] != data_buf[INDEX_PLL_3_5G_UL_H]) 8008d88: 7fe2 ldrb r2, [r4, #31] 8008d8a: 7feb ldrb r3, [r5, #31] 8008d8c: 4293 cmp r3, r2 8008d8e: d02a beq.n 8008de6 && (Prev_data[INDEX_PLL_3_5G_UL_L] != data_buf[INDEX_PLL_3_5G_UL_L])){ 8008d90: f894 3020 ldrb.w r3, [r4, #32] 8008d94: f895 1020 ldrb.w r1, [r5, #32] 8008d98: 4299 cmp r1, r3 8008d9a: d024 beq.n 8008de6 Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H]; Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L]; 8008d9c: f885 3020 strb.w r3, [r5, #32] temp_val = (data_buf[INDEX_PLL_3_5G_UL_H] << 8) | (data_buf[INDEX_PLL_3_5G_UL_L]); temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008da0: f241 3388 movw r3, #5000 ; 0x1388 8008da4: 9303 str r3, [sp, #12] 8008da6: 2302 movs r3, #2 8008da8: 9302 str r3, [sp, #8] 8008daa: 2300 movs r3, #0 Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H]; 8008dac: 77ea strb r2, [r5, #31] temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008dae: 4aa1 ldr r2, [pc, #644] ; (8009034 ) 8008db0: a820 add r0, sp, #128 ; 0x80 8008db2: e9cd 2300 strd r2, r3, [sp] 8008db6: a39a add r3, pc, #616 ; (adr r3, 8009020 ) 8008db8: e9d3 2300 ldrd r2, r3, [r3] 8008dbc: f7fe fcb8 bl 8007730 ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008dc0: 2203 movs r2, #3 8008dc2: 9205 str r2, [sp, #20] 8008dc4: f241 32c2 movw r2, #5058 ; 0x13c2 8008dc8: 9204 str r2, [sp, #16] 8008dca: 9a20 ldr r2, [sp, #128] ; 0x80 8008dcc: 4b9b ldr r3, [pc, #620] ; (800903c ) 8008dce: 9203 str r2, [sp, #12] 8008dd0: 9a21 ldr r2, [sp, #132] ; 0x84 8008dd2: 9202 str r2, [sp, #8] 8008dd4: f103 0210 add.w r2, r3, #16 8008dd8: e892 0003 ldmia.w r2, {r0, r1} 8008ddc: e88d 0003 stmia.w sp, {r0, r1} 8008de0: cb0f ldmia r3, {r0, r1, r2, r3} 8008de2: f7fe fd29 bl 8007838 } if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){ } if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){ 8008de6: f894 1040 ldrb.w r1, [r4, #64] ; 0x40 8008dea: f895 3040 ldrb.w r3, [r5, #64] ; 0x40 8008dee: 428b cmp r3, r1 8008df0: d006 beq.n 8008e00 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]); 8008df2: 2040 movs r0, #64 ; 0x40 8008df4: f7fe febc bl 8007b70 Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL]; 8008df8: f894 3040 ldrb.w r3, [r4, #64] ; 0x40 8008dfc: f885 3040 strb.w r3, [r5, #64] ; 0x40 } if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){ 8008e00: f894 1041 ldrb.w r1, [r4, #65] ; 0x41 8008e04: f895 3041 ldrb.w r3, [r5, #65] ; 0x41 8008e08: 428b cmp r3, r1 8008e0a: d006 beq.n 8008e1a Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]); 8008e0c: 2041 movs r0, #65 ; 0x41 8008e0e: f7fe feaf bl 8007b70 Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL]; 8008e12: f894 3041 ldrb.w r3, [r4, #65] ; 0x41 8008e16: f885 3041 strb.w r3, [r5, #65] ; 0x41 } if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){ 8008e1a: f894 1042 ldrb.w r1, [r4, #66] ; 0x42 8008e1e: f895 3042 ldrb.w r3, [r5, #66] ; 0x42 8008e22: 428b cmp r3, r1 8008e24: d006 beq.n 8008e34 Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]); 8008e26: 2042 movs r0, #66 ; 0x42 8008e28: f7fe fea2 bl 8007b70 Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL]; 8008e2c: f894 3042 ldrb.w r3, [r4, #66] ; 0x42 8008e30: f885 3042 strb.w r3, [r5, #66] ; 0x42 } if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){ 8008e34: f894 1043 ldrb.w r1, [r4, #67] ; 0x43 8008e38: f895 3043 ldrb.w r3, [r5, #67] ; 0x43 8008e3c: 428b cmp r3, r1 8008e3e: d006 beq.n 8008e4e Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]); 8008e40: 2043 movs r0, #67 ; 0x43 8008e42: f7fe fe95 bl 8007b70 Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL]; 8008e46: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8008e4a: f885 3043 strb.w r3, [r5, #67] ; 0x43 } if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){ 8008e4e: f894 1047 ldrb.w r1, [r4, #71] ; 0x47 8008e52: f895 3047 ldrb.w r3, [r5, #71] ; 0x47 8008e56: 428b cmp r3, r1 8008e58: d006 beq.n 8008e68 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]); 8008e5a: 2047 movs r0, #71 ; 0x47 8008e5c: f7fe fe88 bl 8007b70 Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L]; 8008e60: f894 3047 ldrb.w r3, [r4, #71] ; 0x47 8008e64: f885 3047 strb.w r3, [r5, #71] ; 0x47 } if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){ 8008e68: f894 1046 ldrb.w r1, [r4, #70] ; 0x46 8008e6c: f895 3046 ldrb.w r3, [r5, #70] ; 0x46 8008e70: 428b cmp r3, r1 8008e72: d006 beq.n 8008e82 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]); 8008e74: 2046 movs r0, #70 ; 0x46 8008e76: f7fe fe7b bl 8007b70 Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H]; 8008e7a: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 8008e7e: f885 3046 strb.w r3, [r5, #70] ; 0x46 } if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){ 8008e82: f894 1044 ldrb.w r1, [r4, #68] ; 0x44 8008e86: f895 3044 ldrb.w r3, [r5, #68] ; 0x44 8008e8a: 428b cmp r3, r1 8008e8c: d006 beq.n 8008e9c Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); 8008e8e: 2044 movs r0, #68 ; 0x44 8008e90: f7fe fe6e bl 8007b70 Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; 8008e94: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 8008e98: f885 3044 strb.w r3, [r5, #68] ; 0x44 } if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){ 8008e9c: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8008ea0: f895 3045 ldrb.w r3, [r5, #69] ; 0x45 8008ea4: 428b cmp r3, r1 8008ea6: d006 beq.n 8008eb6 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); 8008ea8: 2045 movs r0, #69 ; 0x45 8008eaa: f7fe fe61 bl 8007b70 Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; 8008eae: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 8008eb2: f885 3045 strb.w r3, [r5, #69] ; 0x45 } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8008eb6: f894 1048 ldrb.w r1, [r4, #72] ; 0x48 8008eba: f895 3048 ldrb.w r3, [r5, #72] ; 0x48 8008ebe: 428b cmp r3, r1 8008ec0: d036 beq.n 8008f30 Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]); 8008ec2: 2048 movs r0, #72 ; 0x48 8008ec4: f7fe fe54 bl 8007b70 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8008ec8: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 HAL_Delay(10); 8008ecc: 200a movs r0, #10 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8008ece: f885 3048 strb.w r3, [r5, #72] ; 0x48 HAL_Delay(10); 8008ed2: f7fc fb0b bl 80054ec printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]); 8008ed6: f895 1048 ldrb.w r1, [r5, #72] ; 0x48 8008eda: 4859 ldr r0, [pc, #356] ; (8009040 ) 8008edc: f000 feaa bl 8009c34 if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8008ee0: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 8008ee4: b323 cbz r3, 8008f30 printf("PLL CTRL START !! \r\n"); 8008ee6: 4857 ldr r0, [pc, #348] ; (8009044 ) 8008ee8: f000 ff18 bl 8009d1c temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008eec: f241 3388 movw r3, #5000 ; 0x1388 8008ef0: 9303 str r3, [sp, #12] 8008ef2: 2302 movs r3, #2 8008ef4: 9302 str r3, [sp, #8] 8008ef6: 2300 movs r3, #0 8008ef8: 4a4e ldr r2, [pc, #312] ; (8009034 ) 8008efa: a820 add r0, sp, #128 ; 0x80 8008efc: e9cd 2300 strd r2, r3, [sp] 8008f00: a345 add r3, pc, #276 ; (adr r3, 8009018 ) 8008f02: e9d3 2300 ldrd r2, r3, [r3] 8008f06: f7fe fc13 bl 8007730 ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008f0a: 2203 movs r2, #3 8008f0c: 9205 str r2, [sp, #20] 8008f0e: f241 32c2 movw r2, #5058 ; 0x13c2 8008f12: 9204 str r2, [sp, #16] 8008f14: 9a20 ldr r2, [sp, #128] ; 0x80 8008f16: 4b49 ldr r3, [pc, #292] ; (800903c ) 8008f18: 9203 str r2, [sp, #12] 8008f1a: 9a21 ldr r2, [sp, #132] ; 0x84 8008f1c: 9202 str r2, [sp, #8] 8008f1e: f103 0210 add.w r2, r3, #16 8008f22: e892 0003 ldmia.w r2, {r0, r1} 8008f26: e88d 0003 stmia.w sp, {r0, r1} 8008f2a: cb0f ldmia r3, {r0, r1, r2, r3} 8008f2c: f7fe fc84 bl 8007838 } } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 8008f30: f894 1049 ldrb.w r1, [r4, #73] ; 0x49 8008f34: f895 3049 ldrb.w r3, [r5, #73] ; 0x49 8008f38: 428b cmp r3, r1 8008f3a: d036 beq.n 8008faa Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]); 8008f3c: 2049 movs r0, #73 ; 0x49 8008f3e: f7fe fe17 bl 8007b70 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L]; 8008f42: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 HAL_Delay(10); 8008f46: 200a movs r0, #10 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L]; 8008f48: f885 3049 strb.w r3, [r5, #73] ; 0x49 HAL_Delay(10); 8008f4c: f7fc face bl 80054ec printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]); 8008f50: f895 1049 ldrb.w r1, [r5, #73] ; 0x49 8008f54: 483a ldr r0, [pc, #232] ; (8009040 ) 8008f56: f000 fe6d bl 8009c34 if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 8008f5a: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 8008f5e: b323 cbz r3, 8008faa printf("PLL CTRL START !! \r\n"); 8008f60: 4838 ldr r0, [pc, #224] ; (8009044 ) 8008f62: f000 fedb bl 8009d1c temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f66: f241 3388 movw r3, #5000 ; 0x1388 8008f6a: 9303 str r3, [sp, #12] 8008f6c: 2302 movs r3, #2 8008f6e: 9302 str r3, [sp, #8] 8008f70: 2300 movs r3, #0 8008f72: 4a30 ldr r2, [pc, #192] ; (8009034 ) 8008f74: a820 add r0, sp, #128 ; 0x80 8008f76: e9cd 2300 strd r2, r3, [sp] 8008f7a: a329 add r3, pc, #164 ; (adr r3, 8009020 ) 8008f7c: e9d3 2300 ldrd r2, r3, [r3] 8008f80: f7fe fbd6 bl 8007730 ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008f84: 2203 movs r2, #3 8008f86: 9205 str r2, [sp, #20] 8008f88: f241 32c2 movw r2, #5058 ; 0x13c2 8008f8c: 9204 str r2, [sp, #16] 8008f8e: 9a20 ldr r2, [sp, #128] ; 0x80 8008f90: 4b29 ldr r3, [pc, #164] ; (8009038 ) 8008f92: 9203 str r2, [sp, #12] 8008f94: 9a21 ldr r2, [sp, #132] ; 0x84 8008f96: 9202 str r2, [sp, #8] 8008f98: f103 0210 add.w r2, r3, #16 8008f9c: e892 0003 ldmia.w r2, {r0, r1} 8008fa0: e88d 0003 stmia.w sp, {r0, r1} 8008fa4: cb0f ldmia r3, {r0, r1, r2, r3} 8008fa6: f7fe fc47 bl 8007838 } } if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){ 8008faa: f894 304a ldrb.w r3, [r4, #74] ; 0x4a 8008fae: f895 204a ldrb.w r2, [r5, #74] ; 0x4a 8008fb2: 429a cmp r2, r3 8008fb4: d006 beq.n 8008fc4 Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL]; 8008fb6: f885 304a strb.w r3, [r5, #74] ; 0x4a Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]); 8008fba: f894 104a ldrb.w r1, [r4, #74] ; 0x4a 8008fbe: 204a movs r0, #74 ; 0x4a 8008fc0: f7fe fdd6 bl 8007b70 } if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){ 8008fc4: f894 304b ldrb.w r3, [r4, #75] ; 0x4b 8008fc8: f895 204b ldrb.w r2, [r5, #75] ; 0x4b 8008fcc: 429a cmp r2, r3 8008fce: d006 beq.n 8008fde Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL]; 8008fd0: f885 304b strb.w r3, [r5, #75] ; 0x4b Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]); 8008fd4: f894 104b ldrb.w r1, [r4, #75] ; 0x4b 8008fd8: 204b movs r0, #75 ; 0x4b 8008fda: f7fe fdc9 bl 8007b70 } if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){ 8008fde: 4d1a ldr r5, [pc, #104] ; (8009048 ) 8008fe0: f894 304c ldrb.w r3, [r4, #76] ; 0x4c 8008fe4: f895 204c ldrb.w r2, [r5, #76] ; 0x4c 8008fe8: 429a cmp r2, r3 8008fea: d006 beq.n 8008ffa Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL]; 8008fec: f885 304c strb.w r3, [r5, #76] ; 0x4c Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]); 8008ff0: f894 104c ldrb.w r1, [r4, #76] ; 0x4c 8008ff4: 204c movs r0, #76 ; 0x4c 8008ff6: f7fe fdbb bl 8007b70 } if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){ 8008ffa: f894 304d ldrb.w r3, [r4, #77] ; 0x4d 8008ffe: f895 204d ldrb.w r2, [r5, #77] ; 0x4d 8009002: 429a cmp r2, r3 8009004: d022 beq.n 800904c Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL]; 8009006: f885 304d strb.w r3, [r5, #77] ; 0x4d Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]); 800900a: f894 104d ldrb.w r1, [r4, #77] ; 0x4d 800900e: 204d movs r0, #77 ; 0x4d 8009010: f7fe fdae bl 8007b70 8009014: e01a b.n 800904c 8009016: bf00 nop 8009018: ea83b4a0 .word 0xea83b4a0 800901c: 00000000 .word 0x00000000 8009020: ce8f5560 .word 0xce8f5560 8009024: 00000000 .word 0x00000000 8009028: 000186a0 .word 0x000186a0 800902c: 009f8092 .word 0x009f8092 8009030: 200001e8 .word 0x200001e8 8009034: 02625a00 .word 0x02625a00 8009038: 2000021c .word 0x2000021c 800903c: 20000204 .word 0x20000204 8009040: 0800bcf3 .word 0x0800bcf3 8009044: 0800bd01 .word 0x0800bd01 8009048: 20000574 .word 0x20000574 } if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H]) 800904c: f894 304e ldrb.w r3, [r4, #78] ; 0x4e 8009050: f895 204e ldrb.w r2, [r5, #78] ; 0x4e 8009054: 429a cmp r2, r3 8009056: d106 bne.n 8009066 ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){ 8009058: f895 104f ldrb.w r1, [r5, #79] ; 0x4f 800905c: f894 204f ldrb.w r2, [r4, #79] ; 0x4f 8009060: 4291 cmp r1, r2 8009062: f000 80ce beq.w 8009202 ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H]; 8009066: f885 304e strb.w r3, [r5, #78] ; 0x4e Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L]; 800906a: f894 304f ldrb.w r3, [r4, #79] ; 0x4f 800906e: f885 304f strb.w r3, [r5, #79] ; 0x4f ADC_Modify = 1; 8009072: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H]) 8009074: f894 2050 ldrb.w r2, [r4, #80] ; 0x50 8009078: f895 1050 ldrb.w r1, [r5, #80] ; 0x50 800907c: 4291 cmp r1, r2 800907e: d105 bne.n 800908c