: { 80077a8: e92d 4880 stmdb sp!, {r7, fp, lr} 80077ac: b0b7 sub sp, #220 ; 0xdc * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80077ae: ad30 add r5, sp, #192 ; 0xc0 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 80077b0: 4fbe ldr r7, [pc, #760] ; (8007aac ) HAL_Init(); 80077b2: f7fd fe6b bl 800548c SystemClock_Config(); 80077b6: f7ff ffc1 bl 800773c GPIO_InitTypeDef GPIO_InitStruct = {0}; 80077ba: 2210 movs r2, #16 80077bc: 2100 movs r1, #0 80077be: 4628 mov r0, r5 80077c0: f001 fa3d bl 8008c3e __HAL_RCC_GPIOE_CLK_ENABLE(); 80077c4: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80077c6: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 80077c8: f043 0340 orr.w r3, r3, #64 ; 0x40 80077cc: 61bb str r3, [r7, #24] 80077ce: 69bb ldr r3, [r7, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80077d0: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 80077d2: f003 0340 and.w r3, r3, #64 ; 0x40 80077d6: 9309 str r3, [sp, #36] ; 0x24 80077d8: 9b09 ldr r3, [sp, #36] ; 0x24 __HAL_RCC_GPIOC_CLK_ENABLE(); 80077da: 69bb ldr r3, [r7, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80077dc: 48b4 ldr r0, [pc, #720] ; (8007ab0 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 80077de: f043 0310 orr.w r3, r3, #16 80077e2: 61bb str r3, [r7, #24] 80077e4: 69bb ldr r3, [r7, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 80077e6: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 80077e8: f003 0310 and.w r3, r3, #16 80077ec: 930a str r3, [sp, #40] ; 0x28 80077ee: 9b0a ldr r3, [sp, #40] ; 0x28 __HAL_RCC_GPIOF_CLK_ENABLE(); 80077f0: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80077f2: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 80077f4: f043 0380 orr.w r3, r3, #128 ; 0x80 80077f8: 61bb str r3, [r7, #24] 80077fa: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80077fc: f04f 0802 mov.w r8, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007800: f003 0380 and.w r3, r3, #128 ; 0x80 8007804: 930b str r3, [sp, #44] ; 0x2c 8007806: 9b0b ldr r3, [sp, #44] ; 0x2c __HAL_RCC_GPIOA_CLK_ENABLE(); 8007808: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 800780a: f04f 0a0c mov.w sl, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 800780e: f043 0304 orr.w r3, r3, #4 8007812: 61bb str r3, [r7, #24] 8007814: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); /*Configure GPIO pin : PLL_CLK_3_5G_Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8007816: f44f 4b00 mov.w fp, #32768 ; 0x8000 __HAL_RCC_GPIOA_CLK_ENABLE(); 800781a: f003 0304 and.w r3, r3, #4 800781e: 930c str r3, [sp, #48] ; 0x30 8007820: 9b0c ldr r3, [sp, #48] ; 0x30 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007822: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */ GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8007824: f04f 0903 mov.w r9, #3 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007828: f043 0308 orr.w r3, r3, #8 800782c: 61bb str r3, [r7, #24] 800782e: 69bb ldr r3, [r7, #24] 8007830: f003 0308 and.w r3, r3, #8 8007834: 930d str r3, [sp, #52] ; 0x34 8007836: 9b0d ldr r3, [sp, #52] ; 0x34 __HAL_RCC_GPIOD_CLK_ENABLE(); 8007838: 69bb ldr r3, [r7, #24] 800783a: f043 0320 orr.w r3, r3, #32 800783e: 61bb str r3, [r7, #24] 8007840: 69bb ldr r3, [r7, #24] 8007842: f003 0320 and.w r3, r3, #32 8007846: 930e str r3, [sp, #56] ; 0x38 8007848: 9b0e ldr r3, [sp, #56] ; 0x38 __HAL_RCC_GPIOG_CLK_ENABLE(); 800784a: 69bb ldr r3, [r7, #24] 800784c: f443 7380 orr.w r3, r3, #256 ; 0x100 8007850: 61bb str r3, [r7, #24] 8007852: 69bb ldr r3, [r7, #24] 8007854: f403 7380 and.w r3, r3, #256 ; 0x100 8007858: 930f str r3, [sp, #60] ; 0x3c 800785a: 9b0f ldr r3, [sp, #60] ; 0x3c HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 800785c: f7fe fa98 bl 8005d90 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007860: 2200 movs r2, #0 8007862: f64f 41c0 movw r1, #64704 ; 0xfcc0 8007866: 4893 ldr r0, [pc, #588] ; (8007ab4 ) 8007868: f7fe fa92 bl 8005d90 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 800786c: 2200 movs r2, #0 800786e: f240 31f3 movw r1, #1011 ; 0x3f3 8007872: 4891 ldr r0, [pc, #580] ; (8007ab8 ) 8007874: f7fe fa8c bl 8005d90 HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007878: 2200 movs r2, #0 800787a: f648 71ff movw r1, #36863 ; 0x8fff 800787e: 488f ldr r0, [pc, #572] ; (8007abc ) 8007880: f7fe fa86 bl 8005d90 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007884: 2200 movs r2, #0 8007886: f647 51fc movw r1, #32252 ; 0x7dfc 800788a: 488d ldr r0, [pc, #564] ; (8007ac0 ) 800788c: f7fe fa80 bl 8005d90 HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET); 8007890: 2200 movs r2, #0 8007892: f44f 4100 mov.w r1, #32768 ; 0x8000 8007896: 488b ldr r0, [pc, #556] ; (8007ac4 ) 8007898: f7fe fa7a bl 8005d90 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 800789c: 2200 movs r2, #0 800789e: 2118 movs r1, #24 80078a0: 4889 ldr r0, [pc, #548] ; (8007ac8 ) 80078a2: f7fe fa75 bl 8005d90 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80078a6: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80078a8: 4629 mov r1, r5 80078aa: 4881 ldr r0, [pc, #516] ; (8007ab0 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 80078ac: 9330 str r3, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80078ae: 9631 str r6, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 80078b0: 9432 str r4, [sp, #200] ; 0xc8 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80078b2: f8cd 80cc str.w r8, [sp, #204] ; 0xcc HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80078b6: f7fe f97f bl 8005bb8 GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 80078ba: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80078be: 4629 mov r1, r5 80078c0: 487c ldr r0, [pc, #496] ; (8007ab4 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 80078c2: 9330 str r3, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80078c4: 9631 str r6, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 80078c6: 9432 str r4, [sp, #200] ; 0xc8 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80078c8: f8cd 80cc str.w r8, [sp, #204] ; 0xcc HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80078cc: f7fe f974 bl 8005bb8 GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 80078d0: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80078d4: 4629 mov r1, r5 80078d6: 4878 ldr r0, [pc, #480] ; (8007ab8 ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 80078d8: 9330 str r3, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80078da: 9631 str r6, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 80078dc: 9432 str r4, [sp, #200] ; 0xc8 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80078de: f8cd 80cc str.w r8, [sp, #204] ; 0xcc HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80078e2: f7fe f969 bl 8005bb8 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80078e6: 4629 mov r1, r5 80078e8: 4873 ldr r0, [pc, #460] ; (8007ab8 ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 80078ea: f8cd a0c0 str.w sl, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80078ee: 9431 str r4, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 80078f0: 9432 str r4, [sp, #200] ; 0xc8 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80078f2: f7fe f961 bl 8005bb8 GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 80078f6: f648 73ff movw r3, #36863 ; 0x8fff HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80078fa: 4629 mov r1, r5 80078fc: 486f ldr r0, [pc, #444] ; (8007abc ) GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 80078fe: 9330 str r3, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007900: 9631 str r6, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007902: 9432 str r4, [sp, #200] ; 0xc8 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007904: f8cd 80cc str.w r8, [sp, #204] ; 0xcc HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007908: f7fe f956 bl 8005bb8 GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 800790c: f44f 5340 mov.w r3, #12288 ; 0x3000 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007910: 4629 mov r1, r5 8007912: 486a ldr r0, [pc, #424] ; (8007abc ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8007914: 9330 str r3, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007916: 9431 str r4, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007918: 9432 str r4, [sp, #200] ; 0xc8 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800791a: f7fe f94d bl 8005bb8 GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 800791e: f647 53fc movw r3, #32252 ; 0x7dfc HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007922: 4629 mov r1, r5 8007924: 4866 ldr r0, [pc, #408] ; (8007ac0 ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007926: 9330 str r3, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007928: 9631 str r6, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 800792a: 9432 str r4, [sp, #200] ; 0xc8 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800792c: f8cd 80cc str.w r8, [sp, #204] ; 0xcc HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007930: f7fe f942 bl 8005bb8 GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8007934: f44f 7340 mov.w r3, #768 ; 0x300 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007938: 4629 mov r1, r5 800793a: 485e ldr r0, [pc, #376] ; (8007ab4 ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 800793c: 9330 str r3, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800793e: 9431 str r4, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007940: 9432 str r4, [sp, #200] ; 0xc8 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007942: f7fe f939 bl 8005bb8 HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8007946: 4629 mov r1, r5 8007948: 485e ldr r0, [pc, #376] ; (8007ac4 ) GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 800794a: f8cd b0c0 str.w fp, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800794e: 9631 str r6, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007950: 9432 str r4, [sp, #200] ; 0xc8 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007952: f8cd 80cc str.w r8, [sp, #204] ; 0xcc HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8007956: f7fe f92f bl 8005bb8 GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin; 800795a: f44f 7300 mov.w r3, #512 ; 0x200 HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct); 800795e: 4629 mov r1, r5 8007960: 4857 ldr r0, [pc, #348] ; (8007ac0 ) GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin; 8007962: 9330 str r3, [sp, #192] ; 0xc0 8007964: 9307 str r3, [sp, #28] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8007966: f8cd 90c4 str.w r9, [sp, #196] ; 0xc4 HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct); 800796a: f7fe f925 bl 8005bb8 /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 800796e: 2218 movs r2, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007970: 4629 mov r1, r5 8007972: 4855 ldr r0, [pc, #340] ; (8007ac8 ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8007974: 9230 str r2, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007976: 9631 str r6, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007978: 9432 str r4, [sp, #200] ; 0xc8 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800797a: f8cd 80cc str.w r8, [sp, #204] ; 0xcc HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800797e: f7fe f91b bl 8005bb8 /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007982: 2260 movs r2, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007984: 4629 mov r1, r5 8007986: 4850 ldr r0, [pc, #320] ; (8007ac8 ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007988: 9230 str r2, [sp, #192] ; 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800798a: 9431 str r4, [sp, #196] ; 0xc4 GPIO_InitStruct.Pull = GPIO_NOPULL; 800798c: 9432 str r4, [sp, #200] ; 0xc8 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800798e: f7fe f913 bl 8005bb8 __HAL_RCC_DMA1_CLK_ENABLE(); 8007992: 697a ldr r2, [r7, #20] HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8007994: 4621 mov r1, r4 __HAL_RCC_DMA1_CLK_ENABLE(); 8007996: 4332 orrs r2, r6 8007998: 617a str r2, [r7, #20] 800799a: 697a ldr r2, [r7, #20] HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 800799c: 200b movs r0, #11 __HAL_RCC_DMA1_CLK_ENABLE(); 800799e: 4032 ands r2, r6 80079a0: 9208 str r2, [sp, #32] 80079a2: 9a08 ldr r2, [sp, #32] HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 80079a4: 4622 mov r2, r4 80079a6: f7fd fee9 bl 800577c HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 80079aa: 200b movs r0, #11 80079ac: f7fd ff1a bl 80057e4 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 80079b0: 4621 mov r1, r4 80079b2: 4622 mov r2, r4 80079b4: 200f movs r0, #15 80079b6: f7fd fee1 bl 800577c HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80079ba: 200f movs r0, #15 hadc1.Instance = ADC1; 80079bc: 4f43 ldr r7, [pc, #268] ; (8007acc ) HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80079be: f7fd ff11 bl 80057e4 hadc1.Instance = ADC1; 80079c2: 4a43 ldr r2, [pc, #268] ; (8007ad0 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 80079c4: 4638 mov r0, r7 hadc1.Instance = ADC1; 80079c6: 603a str r2, [r7, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 80079c8: f44f 7280 mov.w r2, #256 ; 0x100 80079cc: 60ba str r2, [r7, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80079ce: f44f 2260 mov.w r2, #917504 ; 0xe0000 80079d2: 61fa str r2, [r7, #28] hadc1.Init.NbrOfConversion = 14; 80079d4: 220e movs r2, #14 ADC_ChannelConfTypeDef sConfig = {0}; 80079d6: 606c str r4, [r5, #4] hadc1.Init.NbrOfConversion = 14; 80079d8: 613a str r2, [r7, #16] 80079da: 9206 str r2, [sp, #24] ADC_ChannelConfTypeDef sConfig = {0}; 80079dc: 60ac str r4, [r5, #8] hadc1.Init.ContinuousConvMode = ENABLE; 80079de: 60fe str r6, [r7, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 80079e0: 617c str r4, [r7, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80079e2: 607c str r4, [r7, #4] ADC_ChannelConfTypeDef sConfig = {0}; 80079e4: 9430 str r4, [sp, #192] ; 0xc0 if (HAL_ADC_Init(&hadc1) != HAL_OK) 80079e6: f7fd fe2d bl 8005644 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80079ea: 4629 mov r1, r5 80079ec: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_0; 80079ee: 9430 str r4, [sp, #192] ; 0xc0 sConfig.Rank = ADC_REGULAR_RANK_1; 80079f0: 9631 str r6, [sp, #196] ; 0xc4 sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 80079f2: 9432 str r4, [sp, #200] ; 0xc8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80079f4: f7fd fd80 bl 80054f8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80079f8: 4629 mov r1, r5 80079fa: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_2; 80079fc: f8cd 80c4 str.w r8, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a00: f7fd fd7a bl 80054f8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a04: 4629 mov r1, r5 8007a06: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_3; 8007a08: f8cd 90c4 str.w r9, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a0c: f7fd fd74 bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_4; 8007a10: 2104 movs r1, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a12: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_4; 8007a14: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a16: 4629 mov r1, r5 8007a18: f7fd fd6e bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_5; 8007a1c: 2105 movs r1, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a1e: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_5; 8007a20: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a22: 4629 mov r1, r5 8007a24: f7fd fd68 bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_6; 8007a28: 2106 movs r1, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a2a: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_6; 8007a2c: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a2e: 4629 mov r1, r5 8007a30: f7fd fd62 bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_7; 8007a34: 2107 movs r1, #7 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a36: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_7; 8007a38: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a3a: 4629 mov r1, r5 8007a3c: f7fd fd5c bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_8; 8007a40: 2108 movs r1, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a42: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_8; 8007a44: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a46: 4629 mov r1, r5 8007a48: f7fd fd56 bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_9; 8007a4c: 2109 movs r1, #9 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a4e: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_9; 8007a50: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a52: 4629 mov r1, r5 8007a54: f7fd fd50 bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_10; 8007a58: 230a movs r3, #10 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a5a: 4629 mov r1, r5 8007a5c: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_10; 8007a5e: 9331 str r3, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a60: f7fd fd4a bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_11; 8007a64: 210b movs r1, #11 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a66: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_11; 8007a68: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a6a: 4629 mov r1, r5 8007a6c: f7fd fd44 bl 80054f8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a70: 4629 mov r1, r5 8007a72: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_12; 8007a74: f8cd a0c4 str.w sl, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a78: f7fd fd3e bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_13; 8007a7c: 210d movs r1, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a7e: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_13; 8007a80: 9131 str r1, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a82: 4629 mov r1, r5 8007a84: f7fd fd38 bl 80054f8 sConfig.Rank = ADC_REGULAR_RANK_14; 8007a88: 9a06 ldr r2, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a8a: 4629 mov r1, r5 8007a8c: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_14; 8007a8e: 9231 str r2, [sp, #196] ; 0xc4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007a90: f7fd fd32 bl 80054f8 huart1.Init.BaudRate = 115200; 8007a94: f44f 33e1 mov.w r3, #115200 ; 0x1c200 huart1.Instance = USART1; 8007a98: 4f0e ldr r7, [pc, #56] ; (8007ad4 ) huart1.Init.BaudRate = 115200; 8007a9a: 4a0f ldr r2, [pc, #60] ; (8007ad8 ) if (HAL_UART_Init(&huart1) != HAL_OK) 8007a9c: 4638 mov r0, r7 huart1.Init.BaudRate = 115200; 8007a9e: e887 000c stmia.w r7, {r2, r3} huart1.Init.WordLength = UART_WORDLENGTH_8B; 8007aa2: 60bc str r4, [r7, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8007aa4: 60fc str r4, [r7, #12] huart1.Init.Parity = UART_PARITY_NONE; 8007aa6: 613c str r4, [r7, #16] 8007aa8: e018 b.n 8007adc 8007aaa: bf00 nop 8007aac: 40021000 .word 0x40021000 8007ab0: 40011800 .word 0x40011800 8007ab4: 40011000 .word 0x40011000 8007ab8: 40011c00 .word 0x40011c00 8007abc: 40011400 .word 0x40011400 8007ac0: 40012000 .word 0x40012000 8007ac4: 40010800 .word 0x40010800 8007ac8: 40010c00 .word 0x40010c00 8007acc: 200004c8 .word 0x200004c8 8007ad0: 40012400 .word 0x40012400 8007ad4: 2000053c .word 0x2000053c 8007ad8: 40013800 .word 0x40013800 huart1.Init.Mode = UART_MODE_TX_RX; 8007adc: f8c7 a014 str.w sl, [r7, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8007ae0: 61bc str r4, [r7, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8007ae2: 61fc str r4, [r7, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8007ae4: f7fe fe74 bl 80067d0 htim6.Init.Period = 10; 8007ae8: 230a movs r3, #10 htim6.Init.Prescaler = 6000-1; 8007aea: f241 726f movw r2, #5999 ; 0x176f htim6.Instance = TIM6; 8007aee: f8df a344 ldr.w sl, [pc, #836] ; 8007e34 htim6.Init.Prescaler = 6000-1; 8007af2: 49b9 ldr r1, [pc, #740] ; (8007dd8 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8007af4: 4650 mov r0, sl htim6.Init.Period = 10; 8007af6: f8ca 300c str.w r3, [sl, #12] htim6.Init.Prescaler = 6000-1; 8007afa: e88a 0006 stmia.w sl, {r1, r2} TIM_MasterConfigTypeDef sMasterConfig = {0}; 8007afe: 606c str r4, [r5, #4] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8007b00: f8ca 4008 str.w r4, [sl, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8007b04: f8ca 4018 str.w r4, [sl, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8007b08: 9430 str r4, [sp, #192] ; 0xc0 if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8007b0a: f7fe fd4f bl 80065ac if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8007b0e: 4629 mov r1, r5 8007b10: 4650 mov r0, sl sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8007b12: 9430 str r4, [sp, #192] ; 0xc0 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8007b14: 9431 str r4, [sp, #196] ; 0xc4 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8007b16: f7fe fd63 bl 80065e0 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8007b1a: 4622 mov r2, r4 8007b1c: 4621 mov r1, r4 8007b1e: 2025 movs r0, #37 ; 0x25 8007b20: f7fd fe2c bl 800577c HAL_NVIC_EnableIRQ(USART1_IRQn); 8007b24: 2025 movs r0, #37 ; 0x25 8007b26: f7fd fe5d bl 80057e4 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8007b2a: 4622 mov r2, r4 8007b2c: 4621 mov r1, r4 8007b2e: 2036 movs r0, #54 ; 0x36 8007b30: f7fd fe24 bl 800577c HAL_NVIC_EnableIRQ(TIM6_IRQn); 8007b34: 2036 movs r0, #54 ; 0x36 8007b36: f7fd fe55 bl 80057e4 setbuf(stdout, NULL); 8007b3a: 4aa8 ldr r2, [pc, #672] ; (8007ddc ) 8007b3c: 4621 mov r1, r4 8007b3e: 6812 ldr r2, [r2, #0] PLL_Setting_st Pll_test = { 8007b40: 4ca7 ldr r4, [pc, #668] ; (8007de0 ) setbuf(stdout, NULL); 8007b42: 6890 ldr r0, [r2, #8] 8007b44: f001 fd74 bl 8009630 printf("UART Start \r\n"); 8007b48: 48a6 ldr r0, [pc, #664] ; (8007de4 ) 8007b4a: f001 fd69 bl 8009620 HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1); 8007b4e: 4632 mov r2, r6 8007b50: 49a5 ldr r1, [pc, #660] ; (8007de8 ) 8007b52: 4638 mov r0, r7 8007b54: f7fe fec6 bl 80068e4 PE43711_PinInit(); 8007b58: f7ff fa12 bl 8006f80 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET); 8007b5c: 4632 mov r2, r6 8007b5e: 2180 movs r1, #128 ; 0x80 8007b60: 48a2 ldr r0, [pc, #648] ; (8007dec ) 8007b62: f7fe f915 bl 8005d90 HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET); 8007b66: 9b07 ldr r3, [sp, #28] 8007b68: 4632 mov r2, r6 8007b6a: 4619 mov r1, r3 8007b6c: 48a0 ldr r0, [pc, #640] ; (8007df0 ) 8007b6e: f7fe f90f bl 8005d90 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET); 8007b72: 4632 mov r2, r6 8007b74: f44f 6180 mov.w r1, #1024 ; 0x400 8007b78: 489d ldr r0, [pc, #628] ; (8007df0 ) 8007b7a: f7fe f909 bl 8005d90 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET); 8007b7e: 4632 mov r2, r6 8007b80: f44f 6100 mov.w r1, #2048 ; 0x800 8007b84: 489a ldr r0, [pc, #616] ; (8007df0 ) 8007b86: f7fe f903 bl 8005d90 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET); 8007b8a: 4632 mov r2, r6 8007b8c: 2180 movs r1, #128 ; 0x80 8007b8e: 4897 ldr r0, [pc, #604] ; (8007dec ) 8007b90: f7fe f8fe bl 8005d90 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET); 8007b94: 4632 mov r2, r6 8007b96: f44f 5180 mov.w r1, #4096 ; 0x1000 8007b9a: 4896 ldr r0, [pc, #600] ; (8007df4 ) 8007b9c: f7fe f8f8 bl 8005d90 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET); 8007ba0: 4632 mov r2, r6 8007ba2: f44f 6180 mov.w r1, #1024 ; 0x400 8007ba6: 4893 ldr r0, [pc, #588] ; (8007df4 ) 8007ba8: f7fe f8f2 bl 8005d90 HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET); 8007bac: 4632 mov r2, r6 8007bae: 4631 mov r1, r6 8007bb0: 4891 ldr r0, [pc, #580] ; (8007df8 ) 8007bb2: f7fe f8ed bl 8005d90 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET); 8007bb6: 4632 mov r2, r6 8007bb8: 4641 mov r1, r8 8007bba: 488f ldr r0, [pc, #572] ; (8007df8 ) 8007bbc: f7fe f8e8 bl 8005d90 HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET); 8007bc0: 4632 mov r2, r6 8007bc2: f44f 4180 mov.w r1, #16384 ; 0x4000 8007bc6: 488b ldr r0, [pc, #556] ; (8007df4 ) 8007bc8: f7fe f8e2 bl 8005d90 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET); 8007bcc: 4632 mov r2, r6 8007bce: 4659 mov r1, fp 8007bd0: 4888 ldr r0, [pc, #544] ; (8007df4 ) 8007bd2: f7fe f8dd bl 8005d90 HAL_Delay(1); 8007bd6: 4630 mov r0, r6 8007bd8: f7fd fc7c bl 80054d4 PLL_Setting_st Pll_test = { 8007bdc: af12 add r7, sp, #72 ; 0x48 printf("\r\nPLL_EN_3_5G_L_GPIO_Port\r\n"); 8007bde: 4887 ldr r0, [pc, #540] ; (8007dfc ) 8007be0: f001 fd1e bl 8009620 PLL_Setting_st Pll_test = { 8007be4: cc0f ldmia r4!, {r0, r1, r2, r3} temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8007be6: f04f 0b00 mov.w fp, #0 PLL_Setting_st Pll_test = { 8007bea: c70f stmia r7!, {r0, r1, r2, r3} 8007bec: e894 0003 ldmia.w r4, {r0, r1} temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8007bf0: f241 3388 movw r3, #5000 ; 0x1388 PLL_Setting_st Pll_test = { 8007bf4: e887 0003 stmia.w r7, {r0, r1} ADF4153_Module_Ctrl(Pll_test,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8007bf8: f241 37c2 movw r7, #5058 ; 0x13c2 temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8007bfc: f8df a238 ldr.w sl, [pc, #568] ; 8007e38 8007c00: 9303 str r3, [sp, #12] 8007c02: f8cd 8008 str.w r8, [sp, #8] 8007c06: a370 add r3, pc, #448 ; (adr r3, 8007dc8 ) 8007c08: e9d3 2300 ldrd r2, r3, [r3] 8007c0c: a810 add r0, sp, #64 ; 0x40 8007c0e: e9cd ab00 strd sl, fp, [sp] 8007c12: f7ff faa3 bl 800715c ADF4153_Module_Ctrl(Pll_test,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8007c16: 9b10 ldr r3, [sp, #64] ; 0x40 8007c18: f8cd 9014 str.w r9, [sp, #20] 8007c1c: 9303 str r3, [sp, #12] 8007c1e: 9b11 ldr r3, [sp, #68] ; 0x44 8007c20: 9704 str r7, [sp, #16] 8007c22: 9302 str r3, [sp, #8] 8007c24: ab16 add r3, sp, #88 ; 0x58 8007c26: e893 0003 ldmia.w r3, {r0, r1} 8007c2a: e88d 0003 stmia.w sp, {r0, r1} 8007c2e: ab12 add r3, sp, #72 ; 0x48 8007c30: cb0f ldmia r3, {r0, r1, r2, r3} 8007c32: f7ff fb95 bl 8007360 HAL_Delay(1); 8007c36: 4630 mov r0, r6 8007c38: f7fd fc4c bl 80054d4 printf("\r\nPLL_EN_3_5G_H_GPIO_Port\r\n"); 8007c3c: 4870 ldr r0, [pc, #448] ; (8007e00 ) 8007c3e: f001 fcef bl 8009620 PLL_Setting_st Pll_test2 = { 8007c42: f104 0c08 add.w ip, r4, #8 8007c46: f10d 0e60 add.w lr, sp, #96 ; 0x60 8007c4a: e8bc 000f ldmia.w ip!, {r0, r1, r2, r3} 8007c4e: e8ae 000f stmia.w lr!, {r0, r1, r2, r3} 8007c52: e89c 0003 ldmia.w ip, {r0, r1} temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8007c56: f241 3388 movw r3, #5000 ; 0x1388 PLL_Setting_st Pll_test2 = { 8007c5a: e88e 0003 stmia.w lr, {r0, r1} temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8007c5e: f8cd 8008 str.w r8, [sp, #8] ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092); 8007c62: f44f 6882 mov.w r8, #1040 ; 0x410 temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8007c66: 9303 str r3, [sp, #12] 8007c68: a810 add r0, sp, #64 ; 0x40 8007c6a: a359 add r3, pc, #356 ; (adr r3, 8007dd0 ) 8007c6c: e9d3 2300 ldrd r2, r3, [r3] 8007c70: e9cd ab00 strd sl, fp, [sp] 8007c74: f7ff fa72 bl 800715c ADF4153_Module_Ctrl(Pll_test2,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8007c78: 9b10 ldr r3, [sp, #64] ; 0x40 8007c7a: f8cd 9014 str.w r9, [sp, #20] 8007c7e: 9303 str r3, [sp, #12] 8007c80: 9b11 ldr r3, [sp, #68] ; 0x44 8007c82: 9704 str r7, [sp, #16] 8007c84: 9302 str r3, [sp, #8] 8007c86: ab1c add r3, sp, #112 ; 0x70 8007c88: e893 0003 ldmia.w r3, {r0, r1} 8007c8c: e88d 0003 stmia.w sp, {r0, r1} 8007c90: ab18 add r3, sp, #96 ; 0x60 8007c92: cb0f ldmia r3, {r0, r1, r2, r3} 8007c94: f7ff fb64 bl 8007360 HAL_Delay(1); 8007c98: 4630 mov r0, r6 8007c9a: f7fd fc1b bl 80054d4 printf("\r\nPLL_EN_2_1G_UL_GPIO_Port\r\n"); 8007c9e: 4859 ldr r0, [pc, #356] ; (8007e04 ) 8007ca0: f001 fcbe bl 8009620 PLL_Setting_st Pll_test3 = { 8007ca4: af1e add r7, sp, #120 ; 0x78 8007ca6: f104 0e20 add.w lr, r4, #32 8007caa: e8be 000f ldmia.w lr!, {r0, r1, r2, r3} 8007cae: c70f stmia r7!, {r0, r1, r2, r3} 8007cb0: e89e 0003 ldmia.w lr, {r0, r1} ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092); 8007cb4: f8df 9184 ldr.w r9, [pc, #388] ; 8007e3c PLL_Setting_st Pll_test3 = { 8007cb8: e887 0003 stmia.w r7, {r0, r1} ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092); 8007cbc: 4b52 ldr r3, [pc, #328] ; (8007e08 ) 8007cbe: f8cd 9010 str.w r9, [sp, #16] 8007cc2: 9303 str r3, [sp, #12] 8007cc4: f8cd 8008 str.w r8, [sp, #8] 8007cc8: ab22 add r3, sp, #136 ; 0x88 8007cca: e893 0003 ldmia.w r3, {r0, r1} 8007cce: e88d 0003 stmia.w sp, {r0, r1} 8007cd2: ab1e add r3, sp, #120 ; 0x78 8007cd4: cb0f ldmia r3, {r0, r1, r2, r3} 8007cd6: f000 f931 bl 8007f3c HAL_Delay(1); 8007cda: 4630 mov r0, r6 8007cdc: f7fd fbfa bl 80054d4 printf("\r\nPLL_EN_2_1G_DL_GPIO_Port\r\n"); 8007ce0: 484a ldr r0, [pc, #296] ; (8007e0c ) 8007ce2: f001 fc9d bl 8009620 PLL_Setting_st Pll_test4 = { 8007ce6: af24 add r7, sp, #144 ; 0x90 8007ce8: f104 0e38 add.w lr, r4, #56 ; 0x38 8007cec: e8be 000f ldmia.w lr!, {r0, r1, r2, r3} 8007cf0: c70f stmia r7!, {r0, r1, r2, r3} 8007cf2: e89e 0003 ldmia.w lr, {r0, r1} ADF4113_Module_Ctrl(Pll_test4,0x410,0x4DE71,0x9F8092); 8007cf6: 4b46 ldr r3, [pc, #280] ; (8007e10 ) PLL_Setting_st Pll_test4 = { 8007cf8: e887 0003 stmia.w r7, {r0, r1} ADF4113_Module_Ctrl(Pll_test4,0x410,0x4DE71,0x9F8092); 8007cfc: 9303 str r3, [sp, #12] 8007cfe: f8cd 9010 str.w r9, [sp, #16] 8007d02: f8cd 8008 str.w r8, [sp, #8] 8007d06: ab28 add r3, sp, #160 ; 0xa0 8007d08: e893 0003 ldmia.w r3, {r0, r1} 8007d0c: e88d 0003 stmia.w sp, {r0, r1} 8007d10: ab24 add r3, sp, #144 ; 0x90 8007d12: cb0f ldmia r3, {r0, r1, r2, r3} 8007d14: f000 f912 bl 8007f3c HAL_Delay(1); 8007d18: 4630 mov r0, r6 8007d1a: f7fd fbdb bl 80054d4 printf("\r\nPLL_EN_1_8G_UL_GPIO_Port\r\n"); 8007d1e: 483d ldr r0, [pc, #244] ; (8007e14 ) 8007d20: f001 fc7e bl 8009620 PLL_Setting_st Pll_test5 = { 8007d24: af2a add r7, sp, #168 ; 0xa8 8007d26: f104 0e50 add.w lr, r4, #80 ; 0x50 8007d2a: e8be 000f ldmia.w lr!, {r0, r1, r2, r3} 8007d2e: c70f stmia r7!, {r0, r1, r2, r3} 8007d30: e89e 0003 ldmia.w lr, {r0, r1} ADF4113_Module_Ctrl(Pll_test5,0x000410,0x038D31,0x9f8092); 8007d34: 4b38 ldr r3, [pc, #224] ; (8007e18 ) PLL_Setting_st Pll_test5 = { 8007d36: e887 0003 stmia.w r7, {r0, r1} ADF4113_Module_Ctrl(Pll_test5,0x000410,0x038D31,0x9f8092); 8007d3a: 9303 str r3, [sp, #12] 8007d3c: f8cd 9010 str.w r9, [sp, #16] 8007d40: f8cd 8008 str.w r8, [sp, #8] 8007d44: ab2e add r3, sp, #184 ; 0xb8 8007d46: e893 0003 ldmia.w r3, {r0, r1} 8007d4a: e88d 0003 stmia.w sp, {r0, r1} 8007d4e: ab2a add r3, sp, #168 ; 0xa8 8007d50: cb0f ldmia r3, {r0, r1, r2, r3} 8007d52: f000 f8f3 bl 8007f3c HAL_Delay(1); 8007d56: 4630 mov r0, r6 PLL_Setting_st Pll_test6 = { 8007d58: 462e mov r6, r5 HAL_Delay(1); 8007d5a: f7fd fbbb bl 80054d4 PLL_Setting_st Pll_test6 = { 8007d5e: 3468 adds r4, #104 ; 0x68 printf("\r\nPLL_EN_1_8G_DL_GPIO_Port\r\n"); 8007d60: 482e ldr r0, [pc, #184] ; (8007e1c ) 8007d62: f001 fc5d bl 8009620 PLL_Setting_st Pll_test6 = { 8007d66: cc0f ldmia r4!, {r0, r1, r2, r3} 8007d68: c60f stmia r6!, {r0, r1, r2, r3} 8007d6a: e894 0003 ldmia.w r4, {r0, r1} ADF4113_Module_Ctrl(Pll_test6,0x000410,0x03E801,0x9F8092); 8007d6e: 4b2c ldr r3, [pc, #176] ; (8007e20 ) PLL_Setting_st Pll_test6 = { 8007d70: e886 0003 stmia.w r6, {r0, r1} ADF4113_Module_Ctrl(Pll_test6,0x000410,0x03E801,0x9F8092); 8007d74: 9303 str r3, [sp, #12] 8007d76: f8cd 9010 str.w r9, [sp, #16] 8007d7a: f8cd 8008 str.w r8, [sp, #8] 8007d7e: ab36 add r3, sp, #216 ; 0xd8 8007d80: e913 0003 ldmdb r3, {r0, r1} 8007d84: e88d 0003 stmia.w sp, {r0, r1} 8007d88: e895 000f ldmia.w r5, {r0, r1, r2, r3} 8007d8c: f000 f8d6 bl 8007f3c BDA4601_Test(); 8007d90: f7fe ff82 bl 8006c98 if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;} 8007d94: 4e16 ldr r6, [pc, #88] ; (8007df0 ) while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal); 8007d96: 4d23 ldr r5, [pc, #140] ; (8007e24 ) if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;} 8007d98: 4c23 ldr r4, [pc, #140] ; (8007e28 ) 8007d9a: 6823 ldr r3, [r4, #0] 8007d9c: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 8007da0: d906 bls.n 8007db0 8007da2: f44f 4180 mov.w r1, #16384 ; 0x4000 8007da6: 4630 mov r0, r6 8007da8: f7fd fff7 bl 8005d9a 8007dac: 2300 movs r3, #0 8007dae: 6023 str r3, [r4, #0] while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal); 8007db0: 4c1e ldr r4, [pc, #120] ; (8007e2c ) 8007db2: 4f1f ldr r7, [pc, #124] ; (8007e30 ) 8007db4: 68a3 ldr r3, [r4, #8] 8007db6: 2b00 cmp r3, #0 8007db8: ddee ble.n 8007d98 8007dba: 682b ldr r3, [r5, #0] 8007dbc: 2b64 cmp r3, #100 ; 0x64 8007dbe: d9eb bls.n 8007d98 8007dc0: 4638 mov r0, r7 8007dc2: f000 fb03 bl 80083cc 8007dc6: e7f5 b.n 8007db4 8007dc8: ce8f5560 .word 0xce8f5560 8007dcc: 00000000 .word 0x00000000 8007dd0: ea83b4a0 .word 0xea83b4a0 8007dd4: 00000000 .word 0x00000000 8007dd8: 40001000 .word 0x40001000 8007ddc: 20000234 .word 0x20000234 8007de0: 0800b5c8 .word 0x0800b5c8 8007de4: 0800b899 .word 0x0800b899 8007de8: 20000a44 .word 0x20000a44 8007dec: 40011400 .word 0x40011400 8007df0: 40012000 .word 0x40012000 8007df4: 40011000 .word 0x40011000 8007df8: 40011800 .word 0x40011800 8007dfc: 0800b8a6 .word 0x0800b8a6 8007e00: 0800b8c1 .word 0x0800b8c1 8007e04: 0800b8dc .word 0x0800b8dc 8007e08: 00059a31 .word 0x00059a31 8007e0c: 0800b8f8 .word 0x0800b8f8 8007e10: 0004de71 .word 0x0004de71 8007e14: 0800b914 .word 0x0800b914 8007e18: 00038d31 .word 0x00038d31 8007e1c: 0800b930 .word 0x0800b930 8007e20: 0003e801 .word 0x0003e801 8007e24: 20000424 .word 0x20000424 8007e28: 20000420 .word 0x20000420 8007e2c: 20000a38 .word 0x20000a38 8007e30: 2000053c .word 0x2000053c 8007e34: 200005c0 .word 0x200005c0 8007e38: 02625a00 .word 0x02625a00 8007e3c: 009f8092 .word 0x009f8092 08007e40 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8007e40: 4770 bx lr ... 08007e44 : B = N_val / P; A = N_val -(B * P); printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); } uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){ 8007e44: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} for(i = 0; i < 2; i++){ if(control_bit & 0x01) ret += shift_bit << i; control_bit = control_bit >> 1; } printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); 8007e48: 2401 movs r4, #1 uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){ 8007e4a: 4607 mov r7, r0 8007e4c: 460e mov r6, r1 8007e4e: 4690 mov r8, r2 printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER); 8007e50: 460a mov r2, r1 8007e52: 4601 mov r1, r0 8007e54: 481f ldr r0, [pc, #124] ; (8007ed4 ) 8007e56: f001 fb5b bl 8009510 printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); 8007e5a: 2200 movs r2, #0 8007e5c: 216a movs r1, #106 ; 0x6a 8007e5e: 481e ldr r0, [pc, #120] ; (8007ed8 ) 8007e60: f001 fb56 bl 8009510 printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); 8007e64: 2201 movs r2, #1 8007e66: 2170 movs r1, #112 ; 0x70 8007e68: 481b ldr r0, [pc, #108] ; (8007ed8 ) 8007e6a: f001 fb51 bl 8009510 8007e6e: 2502 movs r5, #2 for(i = 2; i < 8; i++){ if(_ACOUNTER & 0x01) ret += shift_bit << i; 8007e70: 4623 mov r3, r4 if(_ACOUNTER & 0x01) 8007e72: 07f9 lsls r1, r7, #31 ret += shift_bit << i; 8007e74: bf48 it mi 8007e76: fa03 f205 lslmi.w r2, r3, r5 8007e7a: f105 0501 add.w r5, r5, #1 8007e7e: bf48 it mi 8007e80: 18a4 addmi r4, r4, r2 for(i = 2; i < 8; i++){ 8007e82: 2d08 cmp r5, #8 _ACOUNTER = _ACOUNTER >> 1; 8007e84: ea4f 0757 mov.w r7, r7, lsr #1 for(i = 2; i < 8; i++){ 8007e88: d1f3 bne.n 8007e72 } printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); 8007e8a: 4622 mov r2, r4 8007e8c: 2176 movs r1, #118 ; 0x76 8007e8e: 4812 ldr r0, [pc, #72] ; (8007ed8 ) 8007e90: f001 fb3e bl 8009510 for(i = 8; i < 21; i++){ if(_BCOUNTER & 0x01) ret += shift_bit << i; 8007e94: 2301 movs r3, #1 if(_BCOUNTER & 0x01) 8007e96: 07f2 lsls r2, r6, #31 ret += shift_bit << i; 8007e98: bf48 it mi 8007e9a: fa03 f205 lslmi.w r2, r3, r5 8007e9e: f105 0501 add.w r5, r5, #1 8007ea2: bf48 it mi 8007ea4: 18a4 addmi r4, r4, r2 for(i = 8; i < 21; i++){ 8007ea6: 2d15 cmp r5, #21 _BCOUNTER = _BCOUNTER >> 1; 8007ea8: ea4f 0656 mov.w r6, r6, lsr #1 for(i = 8; i < 21; i++){ 8007eac: d1f3 bne.n 8007e96 } printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); 8007eae: 4622 mov r2, r4 8007eb0: 217c movs r1, #124 ; 0x7c 8007eb2: 4809 ldr r0, [pc, #36] ; (8007ed8 ) 8007eb4: f001 fb2c bl 8009510 if(_CPGAIN & 0x01) 8007eb8: f018 0f01 tst.w r8, #1 ret += shift_bit << i++; 8007ebc: bf18 it ne 8007ebe: f504 1400 addne.w r4, r4, #2097152 ; 0x200000 for(i = 22; i < 24; i++){ if(reserve & 0x01) ret += shift_bit << i; reserve = reserve >> 1; } printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); 8007ec2: 4622 mov r2, r4 8007ec4: 2184 movs r1, #132 ; 0x84 8007ec6: 4804 ldr r0, [pc, #16] ; (8007ed8 ) 8007ec8: f001 fb22 bl 8009510 return ret; } 8007ecc: 4620 mov r0, r4 8007ece: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8007ed2: bf00 nop 8007ed4: 0800b94c .word 0x0800b94c 8007ed8: 0800b81e .word 0x0800b81e 08007edc : { 8007edc: b57f push {r0, r1, r2, r3, r4, r5, r6, lr} N_val = (rf_Freq / ADF4113_CH_STEP); 8007ede: f24c 3550 movw r5, #50000 ; 0xc350 8007ee2: fbb0 f5f5 udiv r5, r0, r5 if( N_val < ADF4113_PRE8_MIN_N) { 8007ee6: 2d37 cmp r5, #55 ; 0x37 8007ee8: d802 bhi.n 8007ef0 return HAL_SYN_INVALID_PRESCALE; 8007eea: 2004 movs r0, #4 } 8007eec: b004 add sp, #16 8007eee: bd70 pop {r4, r5, r6, pc} printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); 8007ef0: 4b0e ldr r3, [pc, #56] ; (8007f2c ) B = N_val / P; 8007ef2: 4c0f ldr r4, [pc, #60] ; (8007f30 ) 8007ef4: fbb0 f4f4 udiv r4, r0, r4 printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); 8007ef8: fbb0 f0f3 udiv r0, r0, r3 8007efc: f7fc ff52 bl 8004da4 <__aeabi_ui2f> 8007f00: f7fc fafe bl 8004500 <__aeabi_f2d> A = N_val -(B * P); 8007f04: eba5 1644 sub.w r6, r5, r4, lsl #5 printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); 8007f08: 460b mov r3, r1 8007f0a: 4602 mov r2, r0 8007f0c: 9502 str r5, [sp, #8] 8007f0e: e88d 0050 stmia.w sp, {r4, r6} 8007f12: 4808 ldr r0, [pc, #32] ; (8007f34 ) 8007f14: f001 fafc bl 8009510 printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); 8007f18: b2a1 uxth r1, r4 8007f1a: 2200 movs r2, #0 8007f1c: b2b0 uxth r0, r6 8007f1e: f7ff ff91 bl 8007e44 8007f22: 4601 mov r1, r0 8007f24: 4804 ldr r0, [pc, #16] ; (8007f38 ) 8007f26: f001 faf3 bl 8009510 } 8007f2a: e7df b.n 8007eec 8007f2c: 000f4240 .word 0x000f4240 8007f30: 00186a00 .word 0x00186a00 8007f34: 0800b96d .word 0x0800b96d 8007f38: 0800b99d .word 0x0800b99d 08007f3c : void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 8007f3c: b084 sub sp, #16 8007f3e: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007f42: b085 sub sp, #20 8007f44: ac0e add r4, sp, #56 ; 0x38 8007f46: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 8007f4a: 9b15 ldr r3, [sp, #84] ; 0x54 8007f4c: f8bd 703c ldrh.w r7, [sp, #60] ; 0x3c 8007f50: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8007f54: 9302 str r3, [sp, #8] R0 = R0 & 0xFFFFFF; 8007f56: 9b14 ldr r3, [sp, #80] ; 0x50 8007f58: f8dd 8040 ldr.w r8, [sp, #64] ; 0x40 8007f5c: f8bd 9044 ldrh.w r9, [sp, #68] ; 0x44 8007f60: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8007f64: 9d12 ldr r5, [sp, #72] ; 0x48 8007f66: f8bd 604c ldrh.w r6, [sp, #76] ; 0x4c HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007f6a: 2200 movs r2, #0 8007f6c: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 8007f6e: 9301 str r3, [sp, #4] 8007f70: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 8007f72: 9c16 ldr r4, [sp, #88] ; 0x58 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007f74: f7fd ff0c bl 8005d90 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007f78: 2200 movs r2, #0 8007f7a: 4649 mov r1, r9 8007f7c: 4640 mov r0, r8 8007f7e: f7fd ff07 bl 8005d90 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8007f82: 2200 movs r2, #0 8007f84: 4631 mov r1, r6 8007f86: 4628 mov r0, r5 8007f88: f7fd ff02 bl 8005d90 8007f8c: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 8007f90: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 8007f94: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 8007f98: f000 8093 beq.w 80080c2 printf("1"); 8007f9c: 2031 movs r0, #49 ; 0x31 8007f9e: f001 facf bl 8009540 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8007fa2: 2201 movs r2, #1 } else{ printf("0"); HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007fa4: 4649 mov r1, r9 8007fa6: 4640 mov r0, r8 8007fa8: f7fd fef2 bl 8005d90 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8007fac: 2201 movs r2, #1 8007fae: 4639 mov r1, r7 8007fb0: 4650 mov r0, sl 8007fb2: f7fd feed bl 8005d90 Pol_Delay_us(10); 8007fb6: 200a movs r0, #10 8007fb8: f7ff fbaa bl 8007710 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007fbc: 2200 movs r2, #0 8007fbe: 4639 mov r1, r7 8007fc0: 4650 mov r0, sl 8007fc2: f7fd fee5 bl 8005d90 R2 = ((R2 << 1) & 0xFFFFFF); 8007fc6: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 8007fc8: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 8007fcc: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 8007fd0: d1e0 bne.n 8007f94 } printf("\r\n"); 8007fd2: 4844 ldr r0, [pc, #272] ; (80080e4 ) 8007fd4: f001 fb24 bl 8009620 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8007fd8: 2201 movs r2, #1 8007fda: 4631 mov r1, r6 8007fdc: 4628 mov r0, r5 8007fde: f7fd fed7 bl 8005d90 Pol_Delay_us(10); 8007fe2: 200a movs r0, #10 8007fe4: f7ff fb94 bl 8007710 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8007fe8: 465a mov r2, fp 8007fea: 4631 mov r1, r6 8007fec: 4628 mov r0, r5 8007fee: f7fd fecf bl 8005d90 8007ff2: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 8007ff4: 9b01 ldr r3, [sp, #4] 8007ff6: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 8007ffa: d068 beq.n 80080ce HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8007ffc: 4640 mov r0, r8 8007ffe: 2201 movs r2, #1 8008000: 4649 mov r1, r9 8008002: f7fd fec5 bl 8005d90 printf("1"); 8008006: 2031 movs r0, #49 ; 0x31 } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); printf("0"); 8008008: f001 fa9a bl 8009540 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800800c: 2201 movs r2, #1 800800e: 4639 mov r1, r7 8008010: 4650 mov r0, sl 8008012: f7fd febd bl 8005d90 Pol_Delay_us(10); 8008016: 200a movs r0, #10 8008018: f7ff fb7a bl 8007710 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800801c: 2200 movs r2, #0 800801e: 4639 mov r1, r7 8008020: 4650 mov r0, sl 8008022: f7fd feb5 bl 8005d90 R0 = ((R0 << 1) & 0xFFFFFF); 8008026: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 8008028: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 800802a: ea4f 0343 mov.w r3, r3, lsl #1 800802e: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008032: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 8008034: d1de bne.n 8007ff4 } printf("\r\n"); 8008036: 482b ldr r0, [pc, #172] ; (80080e4 ) 8008038: f001 faf2 bl 8009620 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800803c: 2201 movs r2, #1 800803e: 4631 mov r1, r6 8008040: 4628 mov r0, r5 8008042: f7fd fea5 bl 8005d90 Pol_Delay_us(10); 8008046: 200a movs r0, #10 8008048: f7ff fb62 bl 8007710 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800804c: 4622 mov r2, r4 800804e: 4631 mov r1, r6 8008050: 4628 mov r0, r5 8008052: f7fd fe9d bl 8005d90 8008056: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 8008058: 9b02 ldr r3, [sp, #8] 800805a: f413 0b00 ands.w fp, r3, #8388608 ; 0x800000 800805e: d03c beq.n 80080da printf("1"); 8008060: 2031 movs r0, #49 ; 0x31 8008062: f001 fa6d bl 8009540 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008066: 2201 movs r2, #1 } else{ printf("0"); HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008068: 4649 mov r1, r9 800806a: 4640 mov r0, r8 800806c: f7fd fe90 bl 8005d90 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8008070: 2201 movs r2, #1 8008072: 4639 mov r1, r7 8008074: 4650 mov r0, sl 8008076: f7fd fe8b bl 8005d90 Pol_Delay_us(10); 800807a: 200a movs r0, #10 800807c: f7ff fb48 bl 8007710 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008080: 2200 movs r2, #0 8008082: 4639 mov r1, r7 8008084: 4650 mov r0, sl 8008086: f7fd fe83 bl 8005d90 R1 = ((R1 << 1) & 0xFFFFFF); 800808a: 9b02 ldr r3, [sp, #8] for(int i =0; i < 24; i++){ 800808c: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 800808e: ea4f 0343 mov.w r3, r3, lsl #1 8008092: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008096: 9302 str r3, [sp, #8] for(int i =0; i < 24; i++){ 8008098: d1de bne.n 8008058 } printf("\r\n"); 800809a: 4812 ldr r0, [pc, #72] ; (80080e4 ) 800809c: f001 fac0 bl 8009620 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80080a0: 4631 mov r1, r6 80080a2: 2201 movs r2, #1 80080a4: 4628 mov r0, r5 80080a6: f7fd fe73 bl 8005d90 Pol_Delay_us(10); 80080aa: 200a movs r0, #10 80080ac: f7ff fb30 bl 8007710 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80080b0: 4622 mov r2, r4 80080b2: 4631 mov r1, r6 80080b4: 4628 mov r0, r5 } 80080b6: b005 add sp, #20 80080b8: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80080bc: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80080be: f7fd be67 b.w 8005d90 printf("0"); 80080c2: 2030 movs r0, #48 ; 0x30 80080c4: 9203 str r2, [sp, #12] 80080c6: f001 fa3b bl 8009540 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80080ca: 9a03 ldr r2, [sp, #12] 80080cc: e76a b.n 8007fa4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80080ce: 4640 mov r0, r8 80080d0: 4649 mov r1, r9 80080d2: f7fd fe5d bl 8005d90 printf("0"); 80080d6: 2030 movs r0, #48 ; 0x30 80080d8: e796 b.n 8008008 printf("0"); 80080da: 2030 movs r0, #48 ; 0x30 80080dc: f001 fa30 bl 8009540 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80080e0: 465a mov r2, fp 80080e2: e7c1 b.n 8008068 80080e4: 0800b9de .word 0x0800b9de 080080e8 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80080e8: 4b0e ldr r3, [pc, #56] ; (8008124 ) { 80080ea: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 80080ec: 699a ldr r2, [r3, #24] 80080ee: f042 0201 orr.w r2, r2, #1 80080f2: 619a str r2, [r3, #24] 80080f4: 699a ldr r2, [r3, #24] 80080f6: f002 0201 and.w r2, r2, #1 80080fa: 9200 str r2, [sp, #0] 80080fc: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 80080fe: 69da ldr r2, [r3, #28] 8008100: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8008104: 61da str r2, [r3, #28] 8008106: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8008108: 4a07 ldr r2, [pc, #28] ; (8008128 ) __HAL_RCC_PWR_CLK_ENABLE(); 800810a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800810e: 9301 str r3, [sp, #4] 8008110: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8008112: 6853 ldr r3, [r2, #4] 8008114: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8008118: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 800811c: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800811e: b002 add sp, #8 8008120: 4770 bx lr 8008122: bf00 nop 8008124: 40021000 .word 0x40021000 8008128: 40010000 .word 0x40010000 0800812c : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 800812c: 2210 movs r2, #16 { 800812e: b530 push {r4, r5, lr} 8008130: 4605 mov r5, r0 8008132: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008134: eb0d 0002 add.w r0, sp, r2 8008138: 2100 movs r1, #0 800813a: f000 fd80 bl 8008c3e if(hadc->Instance==ADC1) 800813e: 682a ldr r2, [r5, #0] 8008140: 4b2b ldr r3, [pc, #172] ; (80081f0 ) 8008142: 429a cmp r2, r3 8008144: d152 bne.n 80081ec { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8008146: f503 436c add.w r3, r3, #60416 ; 0xec00 800814a: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800814c: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 800814e: f442 7200 orr.w r2, r2, #512 ; 0x200 8008152: 619a str r2, [r3, #24] 8008154: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008156: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 8008158: f402 7200 and.w r2, r2, #512 ; 0x200 800815c: 9200 str r2, [sp, #0] 800815e: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 8008160: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008162: 4824 ldr r0, [pc, #144] ; (80081f4 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8008164: f042 0210 orr.w r2, r2, #16 8008168: 619a str r2, [r3, #24] 800816a: 699a ldr r2, [r3, #24] 800816c: f002 0210 and.w r2, r2, #16 8008170: 9201 str r2, [sp, #4] 8008172: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008174: 699a ldr r2, [r3, #24] 8008176: f042 0204 orr.w r2, r2, #4 800817a: 619a str r2, [r3, #24] 800817c: 699a ldr r2, [r3, #24] 800817e: f002 0204 and.w r2, r2, #4 8008182: 9202 str r2, [sp, #8] 8008184: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8008186: 699a ldr r2, [r3, #24] 8008188: f042 0208 orr.w r2, r2, #8 800818c: 619a str r2, [r3, #24] 800818e: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008190: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 8008192: f003 0308 and.w r3, r3, #8 8008196: 9303 str r3, [sp, #12] 8008198: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 800819a: 230f movs r3, #15 800819c: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800819e: f7fd fd0b bl 8005bb8 GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80081a2: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80081a4: a904 add r1, sp, #16 80081a6: 4814 ldr r0, [pc, #80] ; (80081f8 ) GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 80081a8: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80081aa: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80081ac: f7fd fd04 bl 8005bb8 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80081b0: 4812 ldr r0, [pc, #72] ; (80081fc ) 80081b2: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 80081b4: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80081b6: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80081b8: f7fd fcfe bl 8005bb8 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80081bc: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 80081be: 4c10 ldr r4, [pc, #64] ; (8008200 ) 80081c0: 4b10 ldr r3, [pc, #64] ; (8008204 ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 80081c2: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 80081c4: f44f 7200 mov.w r2, #512 ; 0x200 hdma_adc1.Instance = DMA1_Channel1; 80081c8: 6023 str r3, [r4, #0] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 80081ca: 6122 str r2, [r4, #16] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 80081cc: 2300 movs r3, #0 hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 80081ce: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Init.Mode = DMA_NORMAL; hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 80081d2: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 80081d4: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 80081d6: 60a3 str r3, [r4, #8] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 80081d8: 6162 str r2, [r4, #20] hdma_adc1.Init.Mode = DMA_NORMAL; 80081da: 61a3 str r3, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 80081dc: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 80081de: f7fd fb23 bl 8005828 80081e2: b108 cbz r0, 80081e8 { Error_Handler(); 80081e4: f7ff fe2c bl 8007e40 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 80081e8: 622c str r4, [r5, #32] 80081ea: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 80081ec: b009 add sp, #36 ; 0x24 80081ee: bd30 pop {r4, r5, pc} 80081f0: 40012400 .word 0x40012400 80081f4: 40011000 .word 0x40011000 80081f8: 40010800 .word 0x40010800 80081fc: 40010c00 .word 0x40010c00 8008200: 2000057c .word 0x2000057c 8008204: 40020008 .word 0x40020008 08008208 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8008208: 6802 ldr r2, [r0, #0] 800820a: 4b08 ldr r3, [pc, #32] ; (800822c ) { 800820c: b082 sub sp, #8 if(htim_base->Instance==TIM6) 800820e: 429a cmp r2, r3 8008210: d10a bne.n 8008228 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8008212: f503 3300 add.w r3, r3, #131072 ; 0x20000 8008216: 69da ldr r2, [r3, #28] 8008218: f042 0210 orr.w r2, r2, #16 800821c: 61da str r2, [r3, #28] 800821e: 69db ldr r3, [r3, #28] 8008220: f003 0310 and.w r3, r3, #16 8008224: 9301 str r3, [sp, #4] 8008226: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8008228: b002 add sp, #8 800822a: 4770 bx lr 800822c: 40001000 .word 0x40001000 08008230 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8008230: b570 push {r4, r5, r6, lr} 8008232: 4606 mov r6, r0 8008234: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008236: 2210 movs r2, #16 8008238: 2100 movs r1, #0 800823a: a802 add r0, sp, #8 800823c: f000 fcff bl 8008c3e if(huart->Instance==USART1) 8008240: 6832 ldr r2, [r6, #0] 8008242: 4b20 ldr r3, [pc, #128] ; (80082c4 ) 8008244: 429a cmp r2, r3 8008246: d13b bne.n 80082c0 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8008248: f503 4358 add.w r3, r3, #55296 ; 0xd800 800824c: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800824e: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8008250: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8008254: 619a str r2, [r3, #24] 8008256: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008258: 481b ldr r0, [pc, #108] ; (80082c8 ) __HAL_RCC_USART1_CLK_ENABLE(); 800825a: f402 4280 and.w r2, r2, #16384 ; 0x4000 800825e: 9200 str r2, [sp, #0] 8008260: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008262: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008264: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8008266: f042 0204 orr.w r2, r2, #4 800826a: 619a str r2, [r3, #24] 800826c: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 800826e: 4c17 ldr r4, [pc, #92] ; (80082cc ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8008270: f003 0304 and.w r3, r3, #4 8008274: 9301 str r3, [sp, #4] 8008276: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8008278: f44f 7300 mov.w r3, #512 ; 0x200 800827c: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800827e: 2302 movs r3, #2 8008280: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8008282: 2303 movs r3, #3 8008284: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008286: f7fd fc97 bl 8005bb8 GPIO_InitStruct.Pin = GPIO_PIN_10; 800828a: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800828e: 480e ldr r0, [pc, #56] ; (80082c8 ) 8008290: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8008292: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008294: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8008296: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008298: f7fd fc8e bl 8005bb8 hdma_usart1_rx.Instance = DMA1_Channel5; 800829c: 4b0c ldr r3, [pc, #48] ; (80082d0 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 800829e: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 80082a0: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80082a4: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80082a6: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80082a8: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80082aa: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80082ac: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 80082ae: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 80082b0: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80082b2: f7fd fab9 bl 8005828 80082b6: b108 cbz r0, 80082bc { Error_Handler(); 80082b8: f7ff fdc2 bl 8007e40 } __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 80082bc: 6374 str r4, [r6, #52] ; 0x34 80082be: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 80082c0: b006 add sp, #24 80082c2: bd70 pop {r4, r5, r6, pc} 80082c4: 40013800 .word 0x40013800 80082c8: 40010800 .word 0x40010800 80082cc: 200004f8 .word 0x200004f8 80082d0: 40020058 .word 0x40020058 080082d4 : 80082d4: 4770 bx lr 080082d6 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80082d6: e7fe b.n 80082d6 080082d8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80082d8: e7fe b.n 80082d8 080082da : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80082da: e7fe b.n 80082da 080082dc : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80082dc: e7fe b.n 80082dc 080082de : 80082de: 4770 bx lr 080082e0 : 80082e0: 4770 bx lr 080082e2 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80082e2: 4770 bx lr 080082e4 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80082e4: f7fd b8e4 b.w 80054b0 080082e8 : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 80082e8: 4801 ldr r0, [pc, #4] ; (80082f0 ) 80082ea: f7fd bb89 b.w 8005a00 80082ee: bf00 nop 80082f0: 2000057c .word 0x2000057c 080082f4 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 80082f4: 4801 ldr r0, [pc, #4] ; (80082fc ) 80082f6: f7fd bb83 b.w 8005a00 80082fa: bf00 nop 80082fc: 200004f8 .word 0x200004f8 08008300 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8008300: 4801 ldr r0, [pc, #4] ; (8008308 ) 8008302: f7fe bbc1 b.w 8006a88 8008306: bf00 nop 8008308: 2000053c .word 0x2000053c 0800830c : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 800830c: 4801 ldr r0, [pc, #4] ; (8008314 ) 800830e: f7fe b85f b.w 80063d0 8008312: bf00 nop 8008314: 200005c0 .word 0x200005c0 08008318 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8008318: b570 push {r4, r5, r6, lr} 800831a: 460e mov r6, r1 800831c: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800831e: 460c mov r4, r1 8008320: 1ba3 subs r3, r4, r6 8008322: 429d cmp r5, r3 8008324: dc01 bgt.n 800832a <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8008326: 4628 mov r0, r5 8008328: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 800832a: f3af 8000 nop.w 800832e: f804 0b01 strb.w r0, [r4], #1 8008332: e7f5 b.n 8008320 <_read+0x8> 08008334 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8008334: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8008336: 4b0a ldr r3, [pc, #40] ; (8008360 <_sbrk+0x2c>) { 8008338: 4602 mov r2, r0 if (heap_end == 0) 800833a: 6819 ldr r1, [r3, #0] 800833c: b909 cbnz r1, 8008342 <_sbrk+0xe> heap_end = &end; 800833e: 4909 ldr r1, [pc, #36] ; (8008364 <_sbrk+0x30>) 8008340: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8008342: 4669 mov r1, sp prev_heap_end = heap_end; 8008344: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8008346: 4402 add r2, r0 8008348: 428a cmp r2, r1 800834a: d906 bls.n 800835a <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 800834c: f000 fc42 bl 8008bd4 <__errno> 8008350: 230c movs r3, #12 8008352: 6003 str r3, [r0, #0] return (caddr_t) -1; 8008354: f04f 30ff mov.w r0, #4294967295 8008358: bd08 pop {r3, pc} } heap_end += incr; 800835a: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 800835c: bd08 pop {r3, pc} 800835e: bf00 nop 8008360: 20000428 .word 0x20000428 8008364: 200016a8 .word 0x200016a8 08008368 <_close>: int _close(int file) { return -1; } 8008368: f04f 30ff mov.w r0, #4294967295 800836c: 4770 bx lr 0800836e <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 800836e: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 8008372: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8008374: 604b str r3, [r1, #4] } 8008376: 4770 bx lr 08008378 <_isatty>: int _isatty(int file) { return 1; } 8008378: 2001 movs r0, #1 800837a: 4770 bx lr 0800837c <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 800837c: 2000 movs r0, #0 800837e: 4770 bx lr 08008380 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8008380: 4b0e ldr r3, [pc, #56] ; (80083bc ) 8008382: 681a ldr r2, [r3, #0] 8008384: f042 0201 orr.w r2, r2, #1 8008388: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 800838a: 6859 ldr r1, [r3, #4] 800838c: 4a0c ldr r2, [pc, #48] ; (80083c0 ) 800838e: 400a ands r2, r1 8008390: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8008392: 681a ldr r2, [r3, #0] 8008394: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8008398: f422 3280 bic.w r2, r2, #65536 ; 0x10000 800839c: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 800839e: 681a ldr r2, [r3, #0] 80083a0: f422 2280 bic.w r2, r2, #262144 ; 0x40000 80083a4: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 80083a6: 685a ldr r2, [r3, #4] 80083a8: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80083ac: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80083ae: f44f 021f mov.w r2, #10420224 ; 0x9f0000 80083b2: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80083b4: 4a03 ldr r2, [pc, #12] ; (80083c4 ) 80083b6: 4b04 ldr r3, [pc, #16] ; (80083c8 ) 80083b8: 609a str r2, [r3, #8] 80083ba: 4770 bx lr 80083bc: 40021000 .word 0x40021000 80083c0: f8ff0000 .word 0xf8ff0000 80083c4: 08004000 .word 0x08004000 80083c8: e000ed00 .word 0xe000ed00 080083cc : // HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 10); } uint8_t uart_buf[QUEUE_BUFFER_LENGTH]; void GetDataFromUartQueue(UART_HandleTypeDef *huart) { 80083cc: b570 push {r4, r5, r6, lr} pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80083ce: 4d15 ldr r5, [pc, #84] ; (8008424 ) 80083d0: 4c15 ldr r4, [pc, #84] ; (8008428 ) 80083d2: 682b ldr r3, [r5, #0] 80083d4: 6861 ldr r1, [r4, #4] 80083d6: 1c5a adds r2, r3, #1 80083d8: 602a str r2, [r5, #0] 80083da: f104 020c add.w r2, r4, #12 80083de: 5c89 ldrb r1, [r1, r2] 80083e0: 4a12 ldr r2, [pc, #72] ; (800842c ) printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; 80083e2: 4813 ldr r0, [pc, #76] ; (8008430 ) uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80083e4: 54d1 strb r1, [r2, r3] printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; 80083e6: f001 f893 bl 8009510 pQueue->tail++; 80083ea: 6863 ldr r3, [r4, #4] if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; pQueue->data--; 80083ec: 68a6 ldr r6, [r4, #8] pQueue->tail++; 80083ee: 3301 adds r3, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80083f0: f5b3 6f80 cmp.w r3, #1024 ; 0x400 80083f4: bfa8 it ge 80083f6: 2300 movge r3, #0 pQueue->data--; 80083f8: 3e01 subs r6, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80083fa: 6063 str r3, [r4, #4] pQueue->data--; 80083fc: 60a6 str r6, [r4, #8] if(pQueue->data == 0){ 80083fe: b986 cbnz r6, 8008422 printf("data cnt zero !!! \r\n"); 8008400: 480c ldr r0, [pc, #48] ; (8008434 ) 8008402: f001 f90d bl 8009620 RF_Ctrl_Main(&uart_buf[Header]); 8008406: 4809 ldr r0, [pc, #36] ; (800842c ) 8008408: f000 fb66 bl 8008ad8 #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 800840c: 682a ldr r2, [r5, #0] 800840e: 4631 mov r1, r6 8008410: 4806 ldr r0, [pc, #24] ; (800842c ) 8008412: f000 fc14 bl 8008c3e // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 8008416: 602e str r6, [r5, #0] HAL_Delay(1); 8008418: 2001 movs r0, #1 } } 800841a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} HAL_Delay(1); 800841e: f7fd b859 b.w 80054d4 8008422: bd70 pop {r4, r5, r6, pc} 8008424: 2000042c .word 0x2000042c 8008428: 20000a38 .word 0x20000a38 800842c: 20000638 .word 0x20000638 8008430: 0800b9c5 .word 0x0800b9c5 8008434: 0800b9cb .word 0x0800b9cb 08008438 : UartTimerCnt = 0; 8008438: 2300 movs r3, #0 { 800843a: b510 push {r4, lr} UartTimerCnt = 0; 800843c: 4a0d ldr r2, [pc, #52] ; (8008474 ) pQueue->head++; 800843e: 4c0e ldr r4, [pc, #56] ; (8008478 ) UartTimerCnt = 0; 8008440: 6013 str r3, [r2, #0] pQueue->head++; 8008442: 6822 ldr r2, [r4, #0] 8008444: 3201 adds r2, #1 8008446: f5b2 6f80 cmp.w r2, #1024 ; 0x400 800844a: bfb8 it lt 800844c: 4613 movlt r3, r2 800844e: 6023 str r3, [r4, #0] pQueue->data++; 8008450: 68a3 ldr r3, [r4, #8] 8008452: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008454: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 8008458: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 800845a: db01 blt.n 8008460 GetDataFromUartQueue(huart); 800845c: f7ff ffb6 bl 80083cc HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008460: 6823 ldr r3, [r4, #0] 8008462: 4906 ldr r1, [pc, #24] ; (800847c ) 8008464: 2201 movs r2, #1 } 8008466: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800846a: 4419 add r1, r3 800846c: 4804 ldr r0, [pc, #16] ; (8008480 ) 800846e: f7fe ba39 b.w 80068e4 8008472: bf00 nop 8008474: 20000424 .word 0x20000424 8008478: 20000a38 .word 0x20000a38 800847c: 20000a44 .word 0x20000a44 8008480: 2000053c .word 0x2000053c 08008484 : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; uint8_t Prev_data[INDEX__T_SYNC_UL + 1]; bool RF_Data_Check(uint8_t* data_buf){ 8008484: b5f8 push {r3, r4, r5, r6, r7, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 8008486: 78c3 ldrb r3, [r0, #3] 8008488: 1c46 adds r6, r0, #1 800848a: 5cc2 ldrb r2, [r0, r3] 800848c: 7881 ldrb r1, [r0, #2] bool RF_Data_Check(uint8_t* data_buf){ 800848e: 4604 mov r4, r0 bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 8008490: 4630 mov r0, r6 8008492: f7fe fcbc bl 8006e0e if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/ ret= true; } if(crcret == true){/*CRC CHECK*/ 8008496: 4605 mov r5, r0 8008498: b980 cbnz r0, 80084bc ret = true; }else{ ret = false; printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); 800849a: 78e3 ldrb r3, [r4, #3] 800849c: 78a1 ldrb r1, [r4, #2] 800849e: 4630 mov r0, r6 80084a0: 5ce7 ldrb r7, [r4, r3] 80084a2: f7fe fc99 bl 8006dd8 80084a6: 4639 mov r1, r7 80084a8: 4602 mov r2, r0 80084aa: 4805 ldr r0, [pc, #20] ; (80084c0 ) 80084ac: f001 f830 bl 8009510 } printf("CRC Result : \"%d\" \r\n",ret); 80084b0: 4629 mov r1, r5 80084b2: 4804 ldr r0, [pc, #16] ; (80084c4 ) 80084b4: f001 f82c bl 8009510 return ret; } 80084b8: 4628 mov r0, r5 80084ba: bdf8 pop {r3, r4, r5, r6, r7, pc} ret = true; 80084bc: 2501 movs r5, #1 80084be: e7f7 b.n 80084b0 80084c0: 0800ba2d .word 0x0800ba2d 80084c4: 0800ba62 .word 0x0800ba62 080084c8 : PLL_DATA_3_5G_Pin, PLL_EN_3_5G_H_GPIO_Port, PLL_EN_3_5G_H_Pin, }; void RF_Operate(uint8_t* data_buf){ 80084c8: b570 push {r4, r5, r6, lr} uint16_t temp_val = 0; if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80084ca: 4db0 ldr r5, [pc, #704] ; (800878c ) 80084cc: 7903 ldrb r3, [r0, #4] 80084ce: 792a ldrb r2, [r5, #4] void RF_Operate(uint8_t* data_buf){ 80084d0: b0a4 sub sp, #144 ; 0x90 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80084d2: 429a cmp r2, r3 void RF_Operate(uint8_t* data_buf){ 80084d4: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80084d6: d011 beq.n 80084fc printf("\r\nLINE : %d \r\n",__LINE__); 80084d8: 21df movs r1, #223 ; 0xdf 80084da: 48ad ldr r0, [pc, #692] ; (8008790 ) 80084dc: f001 f818 bl 8009510 BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 80084e0: 7922 ldrb r2, [r4, #4] 80084e2: 4bac ldr r3, [pc, #688] ; (8008794 ) 80084e4: 9202 str r2, [sp, #8] 80084e6: f103 0210 add.w r2, r3, #16 80084ea: e892 0003 ldmia.w r2, {r0, r1} 80084ee: e88d 0003 stmia.w sp, {r0, r1} 80084f2: cb0f ldmia r3, {r0, r1, r2, r3} 80084f4: f7fe fb70 bl 8006bd8 Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 80084f8: 7923 ldrb r3, [r4, #4] 80084fa: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 80084fc: 796a ldrb r2, [r5, #5] 80084fe: 7963 ldrb r3, [r4, #5] 8008500: 429a cmp r2, r3 8008502: d011 beq.n 8008528 printf("\r\nLINE : %d \r\n",__LINE__); 8008504: 21e4 movs r1, #228 ; 0xe4 8008506: 48a2 ldr r0, [pc, #648] ; (8008790 ) 8008508: f001 f802 bl 8009510 BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 800850c: 7962 ldrb r2, [r4, #5] 800850e: 4ba2 ldr r3, [pc, #648] ; (8008798 ) 8008510: 9202 str r2, [sp, #8] 8008512: f103 0210 add.w r2, r3, #16 8008516: e892 0003 ldmia.w r2, {r0, r1} 800851a: e88d 0003 stmia.w sp, {r0, r1} 800851e: cb0f ldmia r3, {r0, r1, r2, r3} 8008520: f7fe fb5a bl 8006bd8 Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 8008524: 7963 ldrb r3, [r4, #5] 8008526: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 8008528: 79aa ldrb r2, [r5, #6] 800852a: 79a3 ldrb r3, [r4, #6] 800852c: 429a cmp r2, r3 800852e: d011 beq.n 8008554 printf("\r\nLINE : %d \r\n",__LINE__); 8008530: 21e9 movs r1, #233 ; 0xe9 8008532: 4897 ldr r0, [pc, #604] ; (8008790 ) 8008534: f000 ffec bl 8009510 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008538: 79a2 ldrb r2, [r4, #6] 800853a: 4b98 ldr r3, [pc, #608] ; (800879c ) 800853c: 9202 str r2, [sp, #8] 800853e: f103 0210 add.w r2, r3, #16 8008542: e892 0003 ldmia.w r2, {r0, r1} 8008546: e88d 0003 stmia.w sp, {r0, r1} 800854a: cb0f ldmia r3, {r0, r1, r2, r3} 800854c: f7fe fb44 bl 8006bd8 Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 8008550: 79a3 ldrb r3, [r4, #6] 8008552: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 8008554: 79ea ldrb r2, [r5, #7] 8008556: 79e3 ldrb r3, [r4, #7] 8008558: 429a cmp r2, r3 800855a: d011 beq.n 8008580 printf("\r\nLINE : %d \r\n",__LINE__); 800855c: 21ee movs r1, #238 ; 0xee 800855e: 488c ldr r0, [pc, #560] ; (8008790 ) 8008560: f000 ffd6 bl 8009510 BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008564: 79e2 ldrb r2, [r4, #7] 8008566: 4b8e ldr r3, [pc, #568] ; (80087a0 ) 8008568: 9202 str r2, [sp, #8] 800856a: f103 0210 add.w r2, r3, #16 800856e: e892 0003 ldmia.w r2, {r0, r1} 8008572: e88d 0003 stmia.w sp, {r0, r1} 8008576: cb0f ldmia r3, {r0, r1, r2, r3} 8008578: f7fe fb2e bl 8006bd8 Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 800857c: 79e3 ldrb r3, [r4, #7] 800857e: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 8008580: 7a22 ldrb r2, [r4, #8] 8008582: 7a2b ldrb r3, [r5, #8] 8008584: 4293 cmp r3, r2 8008586: d00c beq.n 80085a2 BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008588: 4b86 ldr r3, [pc, #536] ; (80087a4 ) 800858a: 9202 str r2, [sp, #8] 800858c: f103 0210 add.w r2, r3, #16 8008590: e892 0003 ldmia.w r2, {r0, r1} 8008594: e88d 0003 stmia.w sp, {r0, r1} 8008598: cb0f ldmia r3, {r0, r1, r2, r3} 800859a: f7fe fb1d bl 8006bd8 Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 800859e: 7a23 ldrb r3, [r4, #8] 80085a0: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 80085a2: 7a6a ldrb r2, [r5, #9] 80085a4: 7a63 ldrb r3, [r4, #9] 80085a6: 429a cmp r2, r3 80085a8: d011 beq.n 80085ce printf("\r\nLINE : %d \r\n",__LINE__); 80085aa: 21f9 movs r1, #249 ; 0xf9 80085ac: 4878 ldr r0, [pc, #480] ; (8008790 ) 80085ae: f000 ffaf bl 8009510 BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 80085b2: 7a62 ldrb r2, [r4, #9] 80085b4: 4b7c ldr r3, [pc, #496] ; (80087a8 ) 80085b6: 9202 str r2, [sp, #8] 80085b8: f103 0210 add.w r2, r3, #16 80085bc: e892 0003 ldmia.w r2, {r0, r1} 80085c0: e88d 0003 stmia.w sp, {r0, r1} 80085c4: cb0f ldmia r3, {r0, r1, r2, r3} 80085c6: f7fe fb07 bl 8006bd8 Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 80085ca: 7a63 ldrb r3, [r4, #9] 80085cc: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 80085ce: 7aaa ldrb r2, [r5, #10] 80085d0: 7aa3 ldrb r3, [r4, #10] 80085d2: 429a cmp r2, r3 80085d4: d011 beq.n 80085fa printf("\r\nLINE : %d \r\n",__LINE__); 80085d6: 21ff movs r1, #255 ; 0xff 80085d8: 486d ldr r0, [pc, #436] ; (8008790 ) 80085da: f000 ff99 bl 8009510 BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 80085de: 7aa2 ldrb r2, [r4, #10] 80085e0: 4b72 ldr r3, [pc, #456] ; (80087ac ) 80085e2: 9202 str r2, [sp, #8] 80085e4: f103 0210 add.w r2, r3, #16 80085e8: e892 0003 ldmia.w r2, {r0, r1} 80085ec: e88d 0003 stmia.w sp, {r0, r1} 80085f0: cb0f ldmia r3, {r0, r1, r2, r3} 80085f2: f7fe faf1 bl 8006bd8 Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 80085f6: 7aa3 ldrb r3, [r4, #10] 80085f8: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 80085fa: 7aea ldrb r2, [r5, #11] 80085fc: 7ae3 ldrb r3, [r4, #11] 80085fe: 429a cmp r2, r3 8008600: d012 beq.n 8008628 printf("\r\nLINE : %d \r\n",__LINE__); 8008602: f240 1105 movw r1, #261 ; 0x105 8008606: 4862 ldr r0, [pc, #392] ; (8008790 ) 8008608: f000 ff82 bl 8009510 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 800860c: 7ae2 ldrb r2, [r4, #11] 800860e: 4b68 ldr r3, [pc, #416] ; (80087b0 ) 8008610: 9202 str r2, [sp, #8] 8008612: f103 0210 add.w r2, r3, #16 8008616: e892 0003 ldmia.w r2, {r0, r1} 800861a: e88d 0003 stmia.w sp, {r0, r1} 800861e: cb0f ldmia r3, {r0, r1, r2, r3} 8008620: f7fe fada bl 8006bd8 Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008624: 7ae3 ldrb r3, [r4, #11] 8008626: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008628: 7b2a ldrb r2, [r5, #12] 800862a: 7b23 ldrb r3, [r4, #12] 800862c: 429a cmp r2, r3 800862e: d012 beq.n 8008656 printf("\r\nLINE : %d \r\n",__LINE__); 8008630: f240 110b movw r1, #267 ; 0x10b 8008634: 4856 ldr r0, [pc, #344] ; (8008790 ) 8008636: f000 ff6b bl 8009510 BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 800863a: 7b22 ldrb r2, [r4, #12] 800863c: 4b5d ldr r3, [pc, #372] ; (80087b4 ) 800863e: 9202 str r2, [sp, #8] 8008640: f103 0210 add.w r2, r3, #16 8008644: e892 0003 ldmia.w r2, {r0, r1} 8008648: e88d 0003 stmia.w sp, {r0, r1} 800864c: cb0f ldmia r3, {r0, r1, r2, r3} 800864e: f7fe fac3 bl 8006bd8 Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008652: 7b23 ldrb r3, [r4, #12] 8008654: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 8008656: 7b62 ldrb r2, [r4, #13] 8008658: 7b6b ldrb r3, [r5, #13] 800865a: 4293 cmp r3, r2 800865c: d00c beq.n 8008678 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 800865e: 4b56 ldr r3, [pc, #344] ; (80087b8 ) 8008660: 9202 str r2, [sp, #8] 8008662: f103 0210 add.w r2, r3, #16 8008666: e892 0003 ldmia.w r2, {r0, r1} 800866a: e88d 0003 stmia.w sp, {r0, r1} 800866e: cb0f ldmia r3, {r0, r1, r2, r3} 8008670: f7fe fab2 bl 8006bd8 Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008674: 7b63 ldrb r3, [r4, #13] 8008676: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 8008678: 7ba2 ldrb r2, [r4, #14] 800867a: 7bab ldrb r3, [r5, #14] 800867c: 4293 cmp r3, r2 800867e: d00c beq.n 800869a BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008680: 4b4e ldr r3, [pc, #312] ; (80087bc ) 8008682: 9202 str r2, [sp, #8] 8008684: f103 0210 add.w r2, r3, #16 8008688: e892 0003 ldmia.w r2, {r0, r1} 800868c: e88d 0003 stmia.w sp, {r0, r1} 8008690: cb0f ldmia r3, {r0, r1, r2, r3} 8008692: f7fe faa1 bl 8006bd8 Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 8008696: 7ba3 ldrb r3, [r4, #14] 8008698: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 800869a: 7be2 ldrb r2, [r4, #15] 800869c: 7beb ldrb r3, [r5, #15] 800869e: 4293 cmp r3, r2 80086a0: d00c beq.n 80086bc BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 80086a2: 4b47 ldr r3, [pc, #284] ; (80087c0 ) 80086a4: 9202 str r2, [sp, #8] 80086a6: f103 0210 add.w r2, r3, #16 80086aa: e892 0003 ldmia.w r2, {r0, r1} 80086ae: e88d 0003 stmia.w sp, {r0, r1} 80086b2: cb0f ldmia r3, {r0, r1, r2, r3} 80086b4: f7fe fa90 bl 8006bd8 Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 80086b8: 7be3 ldrb r3, [r4, #15] 80086ba: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_DL] != data_buf[INDEX_ATT_3_5G_DL]) 80086bc: 7c21 ldrb r1, [r4, #16] 80086be: 7c2b ldrb r3, [r5, #16] 80086c0: 428b cmp r3, r1 80086c2: d10f bne.n 80086e4 ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL]) 80086c4: 7c6a ldrb r2, [r5, #17] 80086c6: 7c63 ldrb r3, [r4, #17] 80086c8: 429a cmp r2, r3 80086ca: d10b bne.n 80086e4 ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 80086cc: 7caa ldrb r2, [r5, #18] 80086ce: 7ca3 ldrb r3, [r4, #18] 80086d0: 429a cmp r2, r3 80086d2: d107 bne.n 80086e4 ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 80086d4: 7cea ldrb r2, [r5, #19] 80086d6: 7ce3 ldrb r3, [r4, #19] 80086d8: 429a cmp r2, r3 80086da: d103 bne.n 80086e4 ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3]) 80086dc: 7d2a ldrb r2, [r5, #20] 80086de: 7d23 ldrb r3, [r4, #20] 80086e0: 429a cmp r2, r3 80086e2: d033 beq.n 800874c ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_DL] = data_buf[INDEX_ATT_3_5G_DL]; 80086e4: 4e37 ldr r6, [pc, #220] ; (80087c4 ) 80086e6: 7429 strb r1, [r5, #16] 80086e8: 7631 strb r1, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 80086ea: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; printf("YJ : data0 : %x \r\n",ALL_ATT_3_5G.data0); 80086ec: 4836 ldr r0, [pc, #216] ; (80087c8 ) ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 80086ee: 746b strb r3, [r5, #17] 80086f0: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 80086f4: 7ca3 ldrb r3, [r4, #18] 80086f6: 74ab strb r3, [r5, #18] 80086f8: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 80086fc: 7ce3 ldrb r3, [r4, #19] 80086fe: 74eb strb r3, [r5, #19] 8008700: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; 8008704: 7d23 ldrb r3, [r4, #20] 8008706: 752b strb r3, [r5, #20] 8008708: f886 3088 strb.w r3, [r6, #136] ; 0x88 printf("YJ : data0 : %x \r\n",ALL_ATT_3_5G.data0); 800870c: f000 ff00 bl 8009510 printf("YJ : data1 : %x \r\n",ALL_ATT_3_5G.data1); 8008710: f896 1034 ldrb.w r1, [r6, #52] ; 0x34 8008714: 482d ldr r0, [pc, #180] ; (80087cc ) 8008716: f000 fefb bl 8009510 printf("YJ : data2 : %x \r\n",ALL_ATT_3_5G.data2); 800871a: f896 1050 ldrb.w r1, [r6, #80] ; 0x50 800871e: 482c ldr r0, [pc, #176] ; (80087d0 ) 8008720: f000 fef6 bl 8009510 printf("YJ : data3 : %x \r\n",ALL_ATT_3_5G.data3); 8008724: f896 106c ldrb.w r1, [r6, #108] ; 0x6c 8008728: 482a ldr r0, [pc, #168] ; (80087d4 ) 800872a: f000 fef1 bl 8009510 printf("YJ : data4 : %x \r\n",ALL_ATT_3_5G.data4); 800872e: f896 1088 ldrb.w r1, [r6, #136] ; 0x88 8008732: 4829 ldr r0, [pc, #164] ; (80087d8 ) 8008734: f000 feec bl 8009510 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008738: 227c movs r2, #124 ; 0x7c 800873a: f106 0110 add.w r1, r6, #16 800873e: 4668 mov r0, sp 8008740: f000 fa72 bl 8008c28 8008744: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008748: f7fe fb90 bl 8006e6c } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 800874c: 7d63 ldrb r3, [r4, #21] 800874e: 7d6a ldrb r2, [r5, #21] 8008750: 429a cmp r2, r3 8008752: d049 beq.n 80087e8 && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008754: 7da0 ldrb r0, [r4, #22] 8008756: 7daa ldrb r2, [r5, #22] 8008758: 4282 cmp r2, r0 800875a: d045 beq.n 80087e8 ){ temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); // printf("INDEX_PLL_1_8G_DL_H : %x \r\n",temp_val); ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092); 800875c: ea40 2003 orr.w r0, r0, r3, lsl #8 8008760: 4b1e ldr r3, [pc, #120] ; (80087dc ) 8008762: 4358 muls r0, r3 8008764: f7ff fbba bl 8007edc 8008768: 4a1d ldr r2, [pc, #116] ; (80087e0 ) 800876a: 4b1e ldr r3, [pc, #120] ; (80087e4 ) 800876c: 9204 str r2, [sp, #16] 800876e: f44f 6282 mov.w r2, #1040 ; 0x410 8008772: 9003 str r0, [sp, #12] 8008774: 9202 str r2, [sp, #8] 8008776: f103 0210 add.w r2, r3, #16 800877a: e892 0003 ldmia.w r2, {r0, r1} 800877e: e88d 0003 stmia.w sp, {r0, r1} 8008782: cb0f ldmia r3, {r0, r1, r2, r3} 8008784: f7ff fbda bl 8007f3c 8008788: e02e b.n 80087e8 800878a: bf00 nop 800878c: 20001654 .word 0x20001654 8008790: 0800ba79 .word 0x0800ba79 8008794: 20000008 .word 0x20000008 8008798: 20000020 .word 0x20000020 800879c: 20000038 .word 0x20000038 80087a0: 20000050 .word 0x20000050 80087a4: 20000068 .word 0x20000068 80087a8: 20000080 .word 0x20000080 80087ac: 20000098 .word 0x20000098 80087b0: 200000b0 .word 0x200000b0 80087b4: 200000c8 .word 0x200000c8 80087b8: 200000e0 .word 0x200000e0 80087bc: 200000f8 .word 0x200000f8 80087c0: 20000110 .word 0x20000110 80087c4: 2000043c .word 0x2000043c 80087c8: 0800ba89 .word 0x0800ba89 80087cc: 0800ba9d .word 0x0800ba9d 80087d0: 0800bab1 .word 0x0800bab1 80087d4: 0800bac5 .word 0x0800bac5 80087d8: 0800bad9 .word 0x0800bad9 80087dc: 000186a0 .word 0x000186a0 80087e0: 009f8092 .word 0x009f8092 80087e4: 200001a0 .word 0x200001a0 } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 80087e8: 7de3 ldrb r3, [r4, #23] 80087ea: 7dea ldrb r2, [r5, #23] 80087ec: 429a cmp r2, r3 80087ee: d019 beq.n 8008824 && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 80087f0: 7e20 ldrb r0, [r4, #24] 80087f2: 7e2a ldrb r2, [r5, #24] 80087f4: 4282 cmp r2, r0 80087f6: d015 beq.n 8008824