STM32F103_ATTEN_PLL_Zig.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00007a4c 080041e8 080041e8 000041e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000003a8 0800bc38 0800bc38 0000bc38 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 0800bfe0 0800bfe0 0000bfe0 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 0800bfe4 0800bfe4 0000bfe4 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 0000041c 20000000 0800bfe8 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 000013c4 20000420 0800c404 00010420 2**3 ALLOC 7 ._user_heap_stack 00000600 200017e4 0800c404 000117e4 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 0001041c 2**0 CONTENTS, READONLY 9 .debug_info 00025584 00000000 00000000 00010445 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00005048 00000000 00000000 000359c9 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 00009e39 00000000 00000000 0003aa11 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000e38 00000000 00000000 00044850 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00001218 00000000 00000000 00045688 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 0000997b 00000000 00000000 000468a0 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 000058a5 00000000 00000000 0005021b 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 00055ac0 2**0 CONTENTS, READONLY 17 .debug_frame 000037dc 00000000 00000000 00055b3c 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080041e8 <__do_global_dtors_aux>: 80041e8: b510 push {r4, lr} 80041ea: 4c05 ldr r4, [pc, #20] ; (8004200 <__do_global_dtors_aux+0x18>) 80041ec: 7823 ldrb r3, [r4, #0] 80041ee: b933 cbnz r3, 80041fe <__do_global_dtors_aux+0x16> 80041f0: 4b04 ldr r3, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x1c>) 80041f2: b113 cbz r3, 80041fa <__do_global_dtors_aux+0x12> 80041f4: 4804 ldr r0, [pc, #16] ; (8004208 <__do_global_dtors_aux+0x20>) 80041f6: f3af 8000 nop.w 80041fa: 2301 movs r3, #1 80041fc: 7023 strb r3, [r4, #0] 80041fe: bd10 pop {r4, pc} 8004200: 20000420 .word 0x20000420 8004204: 00000000 .word 0x00000000 8004208: 0800bc1c .word 0x0800bc1c 0800420c : 800420c: b508 push {r3, lr} 800420e: 4b03 ldr r3, [pc, #12] ; (800421c ) 8004210: b11b cbz r3, 800421a 8004212: 4903 ldr r1, [pc, #12] ; (8004220 ) 8004214: 4803 ldr r0, [pc, #12] ; (8004224 ) 8004216: f3af 8000 nop.w 800421a: bd08 pop {r3, pc} 800421c: 00000000 .word 0x00000000 8004220: 20000424 .word 0x20000424 8004224: 0800bc1c .word 0x0800bc1c 08004228 : 8004228: 4603 mov r3, r0 800422a: f813 2b01 ldrb.w r2, [r3], #1 800422e: 2a00 cmp r2, #0 8004230: d1fb bne.n 800422a 8004232: 1a18 subs r0, r3, r0 8004234: 3801 subs r0, #1 8004236: 4770 bx lr 08004238 <__aeabi_llsr>: 8004238: 40d0 lsrs r0, r2 800423a: 1c0b adds r3, r1, #0 800423c: 40d1 lsrs r1, r2 800423e: 469c mov ip, r3 8004240: 3a20 subs r2, #32 8004242: 40d3 lsrs r3, r2 8004244: 4318 orrs r0, r3 8004246: 4252 negs r2, r2 8004248: 4663 mov r3, ip 800424a: 4093 lsls r3, r2 800424c: 4318 orrs r0, r3 800424e: 4770 bx lr 08004250 <__aeabi_drsub>: 8004250: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 8004254: e002 b.n 800425c <__adddf3> 8004256: bf00 nop 08004258 <__aeabi_dsub>: 8004258: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 0800425c <__adddf3>: 800425c: b530 push {r4, r5, lr} 800425e: ea4f 0441 mov.w r4, r1, lsl #1 8004262: ea4f 0543 mov.w r5, r3, lsl #1 8004266: ea94 0f05 teq r4, r5 800426a: bf08 it eq 800426c: ea90 0f02 teqeq r0, r2 8004270: bf1f itttt ne 8004272: ea54 0c00 orrsne.w ip, r4, r0 8004276: ea55 0c02 orrsne.w ip, r5, r2 800427a: ea7f 5c64 mvnsne.w ip, r4, asr #21 800427e: ea7f 5c65 mvnsne.w ip, r5, asr #21 8004282: f000 80e2 beq.w 800444a <__adddf3+0x1ee> 8004286: ea4f 5454 mov.w r4, r4, lsr #21 800428a: ebd4 5555 rsbs r5, r4, r5, lsr #21 800428e: bfb8 it lt 8004290: 426d neglt r5, r5 8004292: dd0c ble.n 80042ae <__adddf3+0x52> 8004294: 442c add r4, r5 8004296: ea80 0202 eor.w r2, r0, r2 800429a: ea81 0303 eor.w r3, r1, r3 800429e: ea82 0000 eor.w r0, r2, r0 80042a2: ea83 0101 eor.w r1, r3, r1 80042a6: ea80 0202 eor.w r2, r0, r2 80042aa: ea81 0303 eor.w r3, r1, r3 80042ae: 2d36 cmp r5, #54 ; 0x36 80042b0: bf88 it hi 80042b2: bd30 pophi {r4, r5, pc} 80042b4: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 80042b8: ea4f 3101 mov.w r1, r1, lsl #12 80042bc: f44f 1c80 mov.w ip, #1048576 ; 0x100000 80042c0: ea4c 3111 orr.w r1, ip, r1, lsr #12 80042c4: d002 beq.n 80042cc <__adddf3+0x70> 80042c6: 4240 negs r0, r0 80042c8: eb61 0141 sbc.w r1, r1, r1, lsl #1 80042cc: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 80042d0: ea4f 3303 mov.w r3, r3, lsl #12 80042d4: ea4c 3313 orr.w r3, ip, r3, lsr #12 80042d8: d002 beq.n 80042e0 <__adddf3+0x84> 80042da: 4252 negs r2, r2 80042dc: eb63 0343 sbc.w r3, r3, r3, lsl #1 80042e0: ea94 0f05 teq r4, r5 80042e4: f000 80a7 beq.w 8004436 <__adddf3+0x1da> 80042e8: f1a4 0401 sub.w r4, r4, #1 80042ec: f1d5 0e20 rsbs lr, r5, #32 80042f0: db0d blt.n 800430e <__adddf3+0xb2> 80042f2: fa02 fc0e lsl.w ip, r2, lr 80042f6: fa22 f205 lsr.w r2, r2, r5 80042fa: 1880 adds r0, r0, r2 80042fc: f141 0100 adc.w r1, r1, #0 8004300: fa03 f20e lsl.w r2, r3, lr 8004304: 1880 adds r0, r0, r2 8004306: fa43 f305 asr.w r3, r3, r5 800430a: 4159 adcs r1, r3 800430c: e00e b.n 800432c <__adddf3+0xd0> 800430e: f1a5 0520 sub.w r5, r5, #32 8004312: f10e 0e20 add.w lr, lr, #32 8004316: 2a01 cmp r2, #1 8004318: fa03 fc0e lsl.w ip, r3, lr 800431c: bf28 it cs 800431e: f04c 0c02 orrcs.w ip, ip, #2 8004322: fa43 f305 asr.w r3, r3, r5 8004326: 18c0 adds r0, r0, r3 8004328: eb51 71e3 adcs.w r1, r1, r3, asr #31 800432c: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8004330: d507 bpl.n 8004342 <__adddf3+0xe6> 8004332: f04f 0e00 mov.w lr, #0 8004336: f1dc 0c00 rsbs ip, ip, #0 800433a: eb7e 0000 sbcs.w r0, lr, r0 800433e: eb6e 0101 sbc.w r1, lr, r1 8004342: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 8004346: d31b bcc.n 8004380 <__adddf3+0x124> 8004348: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 800434c: d30c bcc.n 8004368 <__adddf3+0x10c> 800434e: 0849 lsrs r1, r1, #1 8004350: ea5f 0030 movs.w r0, r0, rrx 8004354: ea4f 0c3c mov.w ip, ip, rrx 8004358: f104 0401 add.w r4, r4, #1 800435c: ea4f 5244 mov.w r2, r4, lsl #21 8004360: f512 0f80 cmn.w r2, #4194304 ; 0x400000 8004364: f080 809a bcs.w 800449c <__adddf3+0x240> 8004368: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 800436c: bf08 it eq 800436e: ea5f 0c50 movseq.w ip, r0, lsr #1 8004372: f150 0000 adcs.w r0, r0, #0 8004376: eb41 5104 adc.w r1, r1, r4, lsl #20 800437a: ea41 0105 orr.w r1, r1, r5 800437e: bd30 pop {r4, r5, pc} 8004380: ea5f 0c4c movs.w ip, ip, lsl #1 8004384: 4140 adcs r0, r0 8004386: eb41 0101 adc.w r1, r1, r1 800438a: f411 1f80 tst.w r1, #1048576 ; 0x100000 800438e: f1a4 0401 sub.w r4, r4, #1 8004392: d1e9 bne.n 8004368 <__adddf3+0x10c> 8004394: f091 0f00 teq r1, #0 8004398: bf04 itt eq 800439a: 4601 moveq r1, r0 800439c: 2000 moveq r0, #0 800439e: fab1 f381 clz r3, r1 80043a2: bf08 it eq 80043a4: 3320 addeq r3, #32 80043a6: f1a3 030b sub.w r3, r3, #11 80043aa: f1b3 0220 subs.w r2, r3, #32 80043ae: da0c bge.n 80043ca <__adddf3+0x16e> 80043b0: 320c adds r2, #12 80043b2: dd08 ble.n 80043c6 <__adddf3+0x16a> 80043b4: f102 0c14 add.w ip, r2, #20 80043b8: f1c2 020c rsb r2, r2, #12 80043bc: fa01 f00c lsl.w r0, r1, ip 80043c0: fa21 f102 lsr.w r1, r1, r2 80043c4: e00c b.n 80043e0 <__adddf3+0x184> 80043c6: f102 0214 add.w r2, r2, #20 80043ca: bfd8 it le 80043cc: f1c2 0c20 rsble ip, r2, #32 80043d0: fa01 f102 lsl.w r1, r1, r2 80043d4: fa20 fc0c lsr.w ip, r0, ip 80043d8: bfdc itt le 80043da: ea41 010c orrle.w r1, r1, ip 80043de: 4090 lslle r0, r2 80043e0: 1ae4 subs r4, r4, r3 80043e2: bfa2 ittt ge 80043e4: eb01 5104 addge.w r1, r1, r4, lsl #20 80043e8: 4329 orrge r1, r5 80043ea: bd30 popge {r4, r5, pc} 80043ec: ea6f 0404 mvn.w r4, r4 80043f0: 3c1f subs r4, #31 80043f2: da1c bge.n 800442e <__adddf3+0x1d2> 80043f4: 340c adds r4, #12 80043f6: dc0e bgt.n 8004416 <__adddf3+0x1ba> 80043f8: f104 0414 add.w r4, r4, #20 80043fc: f1c4 0220 rsb r2, r4, #32 8004400: fa20 f004 lsr.w r0, r0, r4 8004404: fa01 f302 lsl.w r3, r1, r2 8004408: ea40 0003 orr.w r0, r0, r3 800440c: fa21 f304 lsr.w r3, r1, r4 8004410: ea45 0103 orr.w r1, r5, r3 8004414: bd30 pop {r4, r5, pc} 8004416: f1c4 040c rsb r4, r4, #12 800441a: f1c4 0220 rsb r2, r4, #32 800441e: fa20 f002 lsr.w r0, r0, r2 8004422: fa01 f304 lsl.w r3, r1, r4 8004426: ea40 0003 orr.w r0, r0, r3 800442a: 4629 mov r1, r5 800442c: bd30 pop {r4, r5, pc} 800442e: fa21 f004 lsr.w r0, r1, r4 8004432: 4629 mov r1, r5 8004434: bd30 pop {r4, r5, pc} 8004436: f094 0f00 teq r4, #0 800443a: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 800443e: bf06 itte eq 8004440: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 8004444: 3401 addeq r4, #1 8004446: 3d01 subne r5, #1 8004448: e74e b.n 80042e8 <__adddf3+0x8c> 800444a: ea7f 5c64 mvns.w ip, r4, asr #21 800444e: bf18 it ne 8004450: ea7f 5c65 mvnsne.w ip, r5, asr #21 8004454: d029 beq.n 80044aa <__adddf3+0x24e> 8004456: ea94 0f05 teq r4, r5 800445a: bf08 it eq 800445c: ea90 0f02 teqeq r0, r2 8004460: d005 beq.n 800446e <__adddf3+0x212> 8004462: ea54 0c00 orrs.w ip, r4, r0 8004466: bf04 itt eq 8004468: 4619 moveq r1, r3 800446a: 4610 moveq r0, r2 800446c: bd30 pop {r4, r5, pc} 800446e: ea91 0f03 teq r1, r3 8004472: bf1e ittt ne 8004474: 2100 movne r1, #0 8004476: 2000 movne r0, #0 8004478: bd30 popne {r4, r5, pc} 800447a: ea5f 5c54 movs.w ip, r4, lsr #21 800447e: d105 bne.n 800448c <__adddf3+0x230> 8004480: 0040 lsls r0, r0, #1 8004482: 4149 adcs r1, r1 8004484: bf28 it cs 8004486: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 800448a: bd30 pop {r4, r5, pc} 800448c: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 8004490: bf3c itt cc 8004492: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 8004496: bd30 popcc {r4, r5, pc} 8004498: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 800449c: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 80044a0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 80044a4: f04f 0000 mov.w r0, #0 80044a8: bd30 pop {r4, r5, pc} 80044aa: ea7f 5c64 mvns.w ip, r4, asr #21 80044ae: bf1a itte ne 80044b0: 4619 movne r1, r3 80044b2: 4610 movne r0, r2 80044b4: ea7f 5c65 mvnseq.w ip, r5, asr #21 80044b8: bf1c itt ne 80044ba: 460b movne r3, r1 80044bc: 4602 movne r2, r0 80044be: ea50 3401 orrs.w r4, r0, r1, lsl #12 80044c2: bf06 itte eq 80044c4: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80044c8: ea91 0f03 teqeq r1, r3 80044cc: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 80044d0: bd30 pop {r4, r5, pc} 80044d2: bf00 nop 080044d4 <__aeabi_ui2d>: 80044d4: f090 0f00 teq r0, #0 80044d8: bf04 itt eq 80044da: 2100 moveq r1, #0 80044dc: 4770 bxeq lr 80044de: b530 push {r4, r5, lr} 80044e0: f44f 6480 mov.w r4, #1024 ; 0x400 80044e4: f104 0432 add.w r4, r4, #50 ; 0x32 80044e8: f04f 0500 mov.w r5, #0 80044ec: f04f 0100 mov.w r1, #0 80044f0: e750 b.n 8004394 <__adddf3+0x138> 80044f2: bf00 nop 080044f4 <__aeabi_i2d>: 80044f4: f090 0f00 teq r0, #0 80044f8: bf04 itt eq 80044fa: 2100 moveq r1, #0 80044fc: 4770 bxeq lr 80044fe: b530 push {r4, r5, lr} 8004500: f44f 6480 mov.w r4, #1024 ; 0x400 8004504: f104 0432 add.w r4, r4, #50 ; 0x32 8004508: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 800450c: bf48 it mi 800450e: 4240 negmi r0, r0 8004510: f04f 0100 mov.w r1, #0 8004514: e73e b.n 8004394 <__adddf3+0x138> 8004516: bf00 nop 08004518 <__aeabi_f2d>: 8004518: 0042 lsls r2, r0, #1 800451a: ea4f 01e2 mov.w r1, r2, asr #3 800451e: ea4f 0131 mov.w r1, r1, rrx 8004522: ea4f 7002 mov.w r0, r2, lsl #28 8004526: bf1f itttt ne 8004528: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 800452c: f093 4f7f teqne r3, #4278190080 ; 0xff000000 8004530: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 8004534: 4770 bxne lr 8004536: f092 0f00 teq r2, #0 800453a: bf14 ite ne 800453c: f093 4f7f teqne r3, #4278190080 ; 0xff000000 8004540: 4770 bxeq lr 8004542: b530 push {r4, r5, lr} 8004544: f44f 7460 mov.w r4, #896 ; 0x380 8004548: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 800454c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 8004550: e720 b.n 8004394 <__adddf3+0x138> 8004552: bf00 nop 08004554 <__aeabi_ul2d>: 8004554: ea50 0201 orrs.w r2, r0, r1 8004558: bf08 it eq 800455a: 4770 bxeq lr 800455c: b530 push {r4, r5, lr} 800455e: f04f 0500 mov.w r5, #0 8004562: e00a b.n 800457a <__aeabi_l2d+0x16> 08004564 <__aeabi_l2d>: 8004564: ea50 0201 orrs.w r2, r0, r1 8004568: bf08 it eq 800456a: 4770 bxeq lr 800456c: b530 push {r4, r5, lr} 800456e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 8004572: d502 bpl.n 800457a <__aeabi_l2d+0x16> 8004574: 4240 negs r0, r0 8004576: eb61 0141 sbc.w r1, r1, r1, lsl #1 800457a: f44f 6480 mov.w r4, #1024 ; 0x400 800457e: f104 0432 add.w r4, r4, #50 ; 0x32 8004582: ea5f 5c91 movs.w ip, r1, lsr #22 8004586: f43f aedc beq.w 8004342 <__adddf3+0xe6> 800458a: f04f 0203 mov.w r2, #3 800458e: ea5f 0cdc movs.w ip, ip, lsr #3 8004592: bf18 it ne 8004594: 3203 addne r2, #3 8004596: ea5f 0cdc movs.w ip, ip, lsr #3 800459a: bf18 it ne 800459c: 3203 addne r2, #3 800459e: eb02 02dc add.w r2, r2, ip, lsr #3 80045a2: f1c2 0320 rsb r3, r2, #32 80045a6: fa00 fc03 lsl.w ip, r0, r3 80045aa: fa20 f002 lsr.w r0, r0, r2 80045ae: fa01 fe03 lsl.w lr, r1, r3 80045b2: ea40 000e orr.w r0, r0, lr 80045b6: fa21 f102 lsr.w r1, r1, r2 80045ba: 4414 add r4, r2 80045bc: e6c1 b.n 8004342 <__adddf3+0xe6> 80045be: bf00 nop 080045c0 <__aeabi_dmul>: 80045c0: b570 push {r4, r5, r6, lr} 80045c2: f04f 0cff mov.w ip, #255 ; 0xff 80045c6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 80045ca: ea1c 5411 ands.w r4, ip, r1, lsr #20 80045ce: bf1d ittte ne 80045d0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80045d4: ea94 0f0c teqne r4, ip 80045d8: ea95 0f0c teqne r5, ip 80045dc: f000 f8de bleq 800479c <__aeabi_dmul+0x1dc> 80045e0: 442c add r4, r5 80045e2: ea81 0603 eor.w r6, r1, r3 80045e6: ea21 514c bic.w r1, r1, ip, lsl #21 80045ea: ea23 534c bic.w r3, r3, ip, lsl #21 80045ee: ea50 3501 orrs.w r5, r0, r1, lsl #12 80045f2: bf18 it ne 80045f4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80045f8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 80045fc: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 8004600: d038 beq.n 8004674 <__aeabi_dmul+0xb4> 8004602: fba0 ce02 umull ip, lr, r0, r2 8004606: f04f 0500 mov.w r5, #0 800460a: fbe1 e502 umlal lr, r5, r1, r2 800460e: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 8004612: fbe0 e503 umlal lr, r5, r0, r3 8004616: f04f 0600 mov.w r6, #0 800461a: fbe1 5603 umlal r5, r6, r1, r3 800461e: f09c 0f00 teq ip, #0 8004622: bf18 it ne 8004624: f04e 0e01 orrne.w lr, lr, #1 8004628: f1a4 04ff sub.w r4, r4, #255 ; 0xff 800462c: f5b6 7f00 cmp.w r6, #512 ; 0x200 8004630: f564 7440 sbc.w r4, r4, #768 ; 0x300 8004634: d204 bcs.n 8004640 <__aeabi_dmul+0x80> 8004636: ea5f 0e4e movs.w lr, lr, lsl #1 800463a: 416d adcs r5, r5 800463c: eb46 0606 adc.w r6, r6, r6 8004640: ea42 21c6 orr.w r1, r2, r6, lsl #11 8004644: ea41 5155 orr.w r1, r1, r5, lsr #21 8004648: ea4f 20c5 mov.w r0, r5, lsl #11 800464c: ea40 505e orr.w r0, r0, lr, lsr #21 8004650: ea4f 2ece mov.w lr, lr, lsl #11 8004654: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8004658: bf88 it hi 800465a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800465e: d81e bhi.n 800469e <__aeabi_dmul+0xde> 8004660: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 8004664: bf08 it eq 8004666: ea5f 0e50 movseq.w lr, r0, lsr #1 800466a: f150 0000 adcs.w r0, r0, #0 800466e: eb41 5104 adc.w r1, r1, r4, lsl #20 8004672: bd70 pop {r4, r5, r6, pc} 8004674: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 8004678: ea46 0101 orr.w r1, r6, r1 800467c: ea40 0002 orr.w r0, r0, r2 8004680: ea81 0103 eor.w r1, r1, r3 8004684: ebb4 045c subs.w r4, r4, ip, lsr #1 8004688: bfc2 ittt gt 800468a: ebd4 050c rsbsgt r5, r4, ip 800468e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8004692: bd70 popgt {r4, r5, r6, pc} 8004694: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8004698: f04f 0e00 mov.w lr, #0 800469c: 3c01 subs r4, #1 800469e: f300 80ab bgt.w 80047f8 <__aeabi_dmul+0x238> 80046a2: f114 0f36 cmn.w r4, #54 ; 0x36 80046a6: bfde ittt le 80046a8: 2000 movle r0, #0 80046aa: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 80046ae: bd70 pople {r4, r5, r6, pc} 80046b0: f1c4 0400 rsb r4, r4, #0 80046b4: 3c20 subs r4, #32 80046b6: da35 bge.n 8004724 <__aeabi_dmul+0x164> 80046b8: 340c adds r4, #12 80046ba: dc1b bgt.n 80046f4 <__aeabi_dmul+0x134> 80046bc: f104 0414 add.w r4, r4, #20 80046c0: f1c4 0520 rsb r5, r4, #32 80046c4: fa00 f305 lsl.w r3, r0, r5 80046c8: fa20 f004 lsr.w r0, r0, r4 80046cc: fa01 f205 lsl.w r2, r1, r5 80046d0: ea40 0002 orr.w r0, r0, r2 80046d4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 80046d8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 80046dc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80046e0: fa21 f604 lsr.w r6, r1, r4 80046e4: eb42 0106 adc.w r1, r2, r6 80046e8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80046ec: bf08 it eq 80046ee: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80046f2: bd70 pop {r4, r5, r6, pc} 80046f4: f1c4 040c rsb r4, r4, #12 80046f8: f1c4 0520 rsb r5, r4, #32 80046fc: fa00 f304 lsl.w r3, r0, r4 8004700: fa20 f005 lsr.w r0, r0, r5 8004704: fa01 f204 lsl.w r2, r1, r4 8004708: ea40 0002 orr.w r0, r0, r2 800470c: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8004710: eb10 70d3 adds.w r0, r0, r3, lsr #31 8004714: f141 0100 adc.w r1, r1, #0 8004718: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800471c: bf08 it eq 800471e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8004722: bd70 pop {r4, r5, r6, pc} 8004724: f1c4 0520 rsb r5, r4, #32 8004728: fa00 f205 lsl.w r2, r0, r5 800472c: ea4e 0e02 orr.w lr, lr, r2 8004730: fa20 f304 lsr.w r3, r0, r4 8004734: fa01 f205 lsl.w r2, r1, r5 8004738: ea43 0302 orr.w r3, r3, r2 800473c: fa21 f004 lsr.w r0, r1, r4 8004740: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8004744: fa21 f204 lsr.w r2, r1, r4 8004748: ea20 0002 bic.w r0, r0, r2 800474c: eb00 70d3 add.w r0, r0, r3, lsr #31 8004750: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8004754: bf08 it eq 8004756: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800475a: bd70 pop {r4, r5, r6, pc} 800475c: f094 0f00 teq r4, #0 8004760: d10f bne.n 8004782 <__aeabi_dmul+0x1c2> 8004762: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 8004766: 0040 lsls r0, r0, #1 8004768: eb41 0101 adc.w r1, r1, r1 800476c: f411 1f80 tst.w r1, #1048576 ; 0x100000 8004770: bf08 it eq 8004772: 3c01 subeq r4, #1 8004774: d0f7 beq.n 8004766 <__aeabi_dmul+0x1a6> 8004776: ea41 0106 orr.w r1, r1, r6 800477a: f095 0f00 teq r5, #0 800477e: bf18 it ne 8004780: 4770 bxne lr 8004782: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 8004786: 0052 lsls r2, r2, #1 8004788: eb43 0303 adc.w r3, r3, r3 800478c: f413 1f80 tst.w r3, #1048576 ; 0x100000 8004790: bf08 it eq 8004792: 3d01 subeq r5, #1 8004794: d0f7 beq.n 8004786 <__aeabi_dmul+0x1c6> 8004796: ea43 0306 orr.w r3, r3, r6 800479a: 4770 bx lr 800479c: ea94 0f0c teq r4, ip 80047a0: ea0c 5513 and.w r5, ip, r3, lsr #20 80047a4: bf18 it ne 80047a6: ea95 0f0c teqne r5, ip 80047aa: d00c beq.n 80047c6 <__aeabi_dmul+0x206> 80047ac: ea50 0641 orrs.w r6, r0, r1, lsl #1 80047b0: bf18 it ne 80047b2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80047b6: d1d1 bne.n 800475c <__aeabi_dmul+0x19c> 80047b8: ea81 0103 eor.w r1, r1, r3 80047bc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80047c0: f04f 0000 mov.w r0, #0 80047c4: bd70 pop {r4, r5, r6, pc} 80047c6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80047ca: bf06 itte eq 80047cc: 4610 moveq r0, r2 80047ce: 4619 moveq r1, r3 80047d0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80047d4: d019 beq.n 800480a <__aeabi_dmul+0x24a> 80047d6: ea94 0f0c teq r4, ip 80047da: d102 bne.n 80047e2 <__aeabi_dmul+0x222> 80047dc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80047e0: d113 bne.n 800480a <__aeabi_dmul+0x24a> 80047e2: ea95 0f0c teq r5, ip 80047e6: d105 bne.n 80047f4 <__aeabi_dmul+0x234> 80047e8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80047ec: bf1c itt ne 80047ee: 4610 movne r0, r2 80047f0: 4619 movne r1, r3 80047f2: d10a bne.n 800480a <__aeabi_dmul+0x24a> 80047f4: ea81 0103 eor.w r1, r1, r3 80047f8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80047fc: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 8004800: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 8004804: f04f 0000 mov.w r0, #0 8004808: bd70 pop {r4, r5, r6, pc} 800480a: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 800480e: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 8004812: bd70 pop {r4, r5, r6, pc} 08004814 <__aeabi_ddiv>: 8004814: b570 push {r4, r5, r6, lr} 8004816: f04f 0cff mov.w ip, #255 ; 0xff 800481a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 800481e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8004822: bf1d ittte ne 8004824: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8004828: ea94 0f0c teqne r4, ip 800482c: ea95 0f0c teqne r5, ip 8004830: f000 f8a7 bleq 8004982 <__aeabi_ddiv+0x16e> 8004834: eba4 0405 sub.w r4, r4, r5 8004838: ea81 0e03 eor.w lr, r1, r3 800483c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8004840: ea4f 3101 mov.w r1, r1, lsl #12 8004844: f000 8088 beq.w 8004958 <__aeabi_ddiv+0x144> 8004848: ea4f 3303 mov.w r3, r3, lsl #12 800484c: f04f 5580 mov.w r5, #268435456 ; 0x10000000 8004850: ea45 1313 orr.w r3, r5, r3, lsr #4 8004854: ea43 6312 orr.w r3, r3, r2, lsr #24 8004858: ea4f 2202 mov.w r2, r2, lsl #8 800485c: ea45 1511 orr.w r5, r5, r1, lsr #4 8004860: ea45 6510 orr.w r5, r5, r0, lsr #24 8004864: ea4f 2600 mov.w r6, r0, lsl #8 8004868: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 800486c: 429d cmp r5, r3 800486e: bf08 it eq 8004870: 4296 cmpeq r6, r2 8004872: f144 04fd adc.w r4, r4, #253 ; 0xfd 8004876: f504 7440 add.w r4, r4, #768 ; 0x300 800487a: d202 bcs.n 8004882 <__aeabi_ddiv+0x6e> 800487c: 085b lsrs r3, r3, #1 800487e: ea4f 0232 mov.w r2, r2, rrx 8004882: 1ab6 subs r6, r6, r2 8004884: eb65 0503 sbc.w r5, r5, r3 8004888: 085b lsrs r3, r3, #1 800488a: ea4f 0232 mov.w r2, r2, rrx 800488e: f44f 1080 mov.w r0, #1048576 ; 0x100000 8004892: f44f 2c00 mov.w ip, #524288 ; 0x80000 8004896: ebb6 0e02 subs.w lr, r6, r2 800489a: eb75 0e03 sbcs.w lr, r5, r3 800489e: bf22 ittt cs 80048a0: 1ab6 subcs r6, r6, r2 80048a2: 4675 movcs r5, lr 80048a4: ea40 000c orrcs.w r0, r0, ip 80048a8: 085b lsrs r3, r3, #1 80048aa: ea4f 0232 mov.w r2, r2, rrx 80048ae: ebb6 0e02 subs.w lr, r6, r2 80048b2: eb75 0e03 sbcs.w lr, r5, r3 80048b6: bf22 ittt cs 80048b8: 1ab6 subcs r6, r6, r2 80048ba: 4675 movcs r5, lr 80048bc: ea40 005c orrcs.w r0, r0, ip, lsr #1 80048c0: 085b lsrs r3, r3, #1 80048c2: ea4f 0232 mov.w r2, r2, rrx 80048c6: ebb6 0e02 subs.w lr, r6, r2 80048ca: eb75 0e03 sbcs.w lr, r5, r3 80048ce: bf22 ittt cs 80048d0: 1ab6 subcs r6, r6, r2 80048d2: 4675 movcs r5, lr 80048d4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80048d8: 085b lsrs r3, r3, #1 80048da: ea4f 0232 mov.w r2, r2, rrx 80048de: ebb6 0e02 subs.w lr, r6, r2 80048e2: eb75 0e03 sbcs.w lr, r5, r3 80048e6: bf22 ittt cs 80048e8: 1ab6 subcs r6, r6, r2 80048ea: 4675 movcs r5, lr 80048ec: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80048f0: ea55 0e06 orrs.w lr, r5, r6 80048f4: d018 beq.n 8004928 <__aeabi_ddiv+0x114> 80048f6: ea4f 1505 mov.w r5, r5, lsl #4 80048fa: ea45 7516 orr.w r5, r5, r6, lsr #28 80048fe: ea4f 1606 mov.w r6, r6, lsl #4 8004902: ea4f 03c3 mov.w r3, r3, lsl #3 8004906: ea43 7352 orr.w r3, r3, r2, lsr #29 800490a: ea4f 02c2 mov.w r2, r2, lsl #3 800490e: ea5f 1c1c movs.w ip, ip, lsr #4 8004912: d1c0 bne.n 8004896 <__aeabi_ddiv+0x82> 8004914: f411 1f80 tst.w r1, #1048576 ; 0x100000 8004918: d10b bne.n 8004932 <__aeabi_ddiv+0x11e> 800491a: ea41 0100 orr.w r1, r1, r0 800491e: f04f 0000 mov.w r0, #0 8004922: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 8004926: e7b6 b.n 8004896 <__aeabi_ddiv+0x82> 8004928: f411 1f80 tst.w r1, #1048576 ; 0x100000 800492c: bf04 itt eq 800492e: 4301 orreq r1, r0 8004930: 2000 moveq r0, #0 8004932: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8004936: bf88 it hi 8004938: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800493c: f63f aeaf bhi.w 800469e <__aeabi_dmul+0xde> 8004940: ebb5 0c03 subs.w ip, r5, r3 8004944: bf04 itt eq 8004946: ebb6 0c02 subseq.w ip, r6, r2 800494a: ea5f 0c50 movseq.w ip, r0, lsr #1 800494e: f150 0000 adcs.w r0, r0, #0 8004952: eb41 5104 adc.w r1, r1, r4, lsl #20 8004956: bd70 pop {r4, r5, r6, pc} 8004958: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 800495c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8004960: eb14 045c adds.w r4, r4, ip, lsr #1 8004964: bfc2 ittt gt 8004966: ebd4 050c rsbsgt r5, r4, ip 800496a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800496e: bd70 popgt {r4, r5, r6, pc} 8004970: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8004974: f04f 0e00 mov.w lr, #0 8004978: 3c01 subs r4, #1 800497a: e690 b.n 800469e <__aeabi_dmul+0xde> 800497c: ea45 0e06 orr.w lr, r5, r6 8004980: e68d b.n 800469e <__aeabi_dmul+0xde> 8004982: ea0c 5513 and.w r5, ip, r3, lsr #20 8004986: ea94 0f0c teq r4, ip 800498a: bf08 it eq 800498c: ea95 0f0c teqeq r5, ip 8004990: f43f af3b beq.w 800480a <__aeabi_dmul+0x24a> 8004994: ea94 0f0c teq r4, ip 8004998: d10a bne.n 80049b0 <__aeabi_ddiv+0x19c> 800499a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800499e: f47f af34 bne.w 800480a <__aeabi_dmul+0x24a> 80049a2: ea95 0f0c teq r5, ip 80049a6: f47f af25 bne.w 80047f4 <__aeabi_dmul+0x234> 80049aa: 4610 mov r0, r2 80049ac: 4619 mov r1, r3 80049ae: e72c b.n 800480a <__aeabi_dmul+0x24a> 80049b0: ea95 0f0c teq r5, ip 80049b4: d106 bne.n 80049c4 <__aeabi_ddiv+0x1b0> 80049b6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80049ba: f43f aefd beq.w 80047b8 <__aeabi_dmul+0x1f8> 80049be: 4610 mov r0, r2 80049c0: 4619 mov r1, r3 80049c2: e722 b.n 800480a <__aeabi_dmul+0x24a> 80049c4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80049c8: bf18 it ne 80049ca: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80049ce: f47f aec5 bne.w 800475c <__aeabi_dmul+0x19c> 80049d2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80049d6: f47f af0d bne.w 80047f4 <__aeabi_dmul+0x234> 80049da: ea52 0543 orrs.w r5, r2, r3, lsl #1 80049de: f47f aeeb bne.w 80047b8 <__aeabi_dmul+0x1f8> 80049e2: e712 b.n 800480a <__aeabi_dmul+0x24a> 080049e4 <__gedf2>: 80049e4: f04f 3cff mov.w ip, #4294967295 80049e8: e006 b.n 80049f8 <__cmpdf2+0x4> 80049ea: bf00 nop 080049ec <__ledf2>: 80049ec: f04f 0c01 mov.w ip, #1 80049f0: e002 b.n 80049f8 <__cmpdf2+0x4> 80049f2: bf00 nop 080049f4 <__cmpdf2>: 80049f4: f04f 0c01 mov.w ip, #1 80049f8: f84d cd04 str.w ip, [sp, #-4]! 80049fc: ea4f 0c41 mov.w ip, r1, lsl #1 8004a00: ea7f 5c6c mvns.w ip, ip, asr #21 8004a04: ea4f 0c43 mov.w ip, r3, lsl #1 8004a08: bf18 it ne 8004a0a: ea7f 5c6c mvnsne.w ip, ip, asr #21 8004a0e: d01b beq.n 8004a48 <__cmpdf2+0x54> 8004a10: b001 add sp, #4 8004a12: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8004a16: bf0c ite eq 8004a18: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8004a1c: ea91 0f03 teqne r1, r3 8004a20: bf02 ittt eq 8004a22: ea90 0f02 teqeq r0, r2 8004a26: 2000 moveq r0, #0 8004a28: 4770 bxeq lr 8004a2a: f110 0f00 cmn.w r0, #0 8004a2e: ea91 0f03 teq r1, r3 8004a32: bf58 it pl 8004a34: 4299 cmppl r1, r3 8004a36: bf08 it eq 8004a38: 4290 cmpeq r0, r2 8004a3a: bf2c ite cs 8004a3c: 17d8 asrcs r0, r3, #31 8004a3e: ea6f 70e3 mvncc.w r0, r3, asr #31 8004a42: f040 0001 orr.w r0, r0, #1 8004a46: 4770 bx lr 8004a48: ea4f 0c41 mov.w ip, r1, lsl #1 8004a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8004a50: d102 bne.n 8004a58 <__cmpdf2+0x64> 8004a52: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8004a56: d107 bne.n 8004a68 <__cmpdf2+0x74> 8004a58: ea4f 0c43 mov.w ip, r3, lsl #1 8004a5c: ea7f 5c6c mvns.w ip, ip, asr #21 8004a60: d1d6 bne.n 8004a10 <__cmpdf2+0x1c> 8004a62: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8004a66: d0d3 beq.n 8004a10 <__cmpdf2+0x1c> 8004a68: f85d 0b04 ldr.w r0, [sp], #4 8004a6c: 4770 bx lr 8004a6e: bf00 nop 08004a70 <__aeabi_cdrcmple>: 8004a70: 4684 mov ip, r0 8004a72: 4610 mov r0, r2 8004a74: 4662 mov r2, ip 8004a76: 468c mov ip, r1 8004a78: 4619 mov r1, r3 8004a7a: 4663 mov r3, ip 8004a7c: e000 b.n 8004a80 <__aeabi_cdcmpeq> 8004a7e: bf00 nop 08004a80 <__aeabi_cdcmpeq>: 8004a80: b501 push {r0, lr} 8004a82: f7ff ffb7 bl 80049f4 <__cmpdf2> 8004a86: 2800 cmp r0, #0 8004a88: bf48 it mi 8004a8a: f110 0f00 cmnmi.w r0, #0 8004a8e: bd01 pop {r0, pc} 08004a90 <__aeabi_dcmpeq>: 8004a90: f84d ed08 str.w lr, [sp, #-8]! 8004a94: f7ff fff4 bl 8004a80 <__aeabi_cdcmpeq> 8004a98: bf0c ite eq 8004a9a: 2001 moveq r0, #1 8004a9c: 2000 movne r0, #0 8004a9e: f85d fb08 ldr.w pc, [sp], #8 8004aa2: bf00 nop 08004aa4 <__aeabi_dcmplt>: 8004aa4: f84d ed08 str.w lr, [sp, #-8]! 8004aa8: f7ff ffea bl 8004a80 <__aeabi_cdcmpeq> 8004aac: bf34 ite cc 8004aae: 2001 movcc r0, #1 8004ab0: 2000 movcs r0, #0 8004ab2: f85d fb08 ldr.w pc, [sp], #8 8004ab6: bf00 nop 08004ab8 <__aeabi_dcmple>: 8004ab8: f84d ed08 str.w lr, [sp, #-8]! 8004abc: f7ff ffe0 bl 8004a80 <__aeabi_cdcmpeq> 8004ac0: bf94 ite ls 8004ac2: 2001 movls r0, #1 8004ac4: 2000 movhi r0, #0 8004ac6: f85d fb08 ldr.w pc, [sp], #8 8004aca: bf00 nop 08004acc <__aeabi_dcmpge>: 8004acc: f84d ed08 str.w lr, [sp, #-8]! 8004ad0: f7ff ffce bl 8004a70 <__aeabi_cdrcmple> 8004ad4: bf94 ite ls 8004ad6: 2001 movls r0, #1 8004ad8: 2000 movhi r0, #0 8004ada: f85d fb08 ldr.w pc, [sp], #8 8004ade: bf00 nop 08004ae0 <__aeabi_dcmpgt>: 8004ae0: f84d ed08 str.w lr, [sp, #-8]! 8004ae4: f7ff ffc4 bl 8004a70 <__aeabi_cdrcmple> 8004ae8: bf34 ite cc 8004aea: 2001 movcc r0, #1 8004aec: 2000 movcs r0, #0 8004aee: f85d fb08 ldr.w pc, [sp], #8 8004af2: bf00 nop 08004af4 <__aeabi_dcmpun>: 8004af4: ea4f 0c41 mov.w ip, r1, lsl #1 8004af8: ea7f 5c6c mvns.w ip, ip, asr #21 8004afc: d102 bne.n 8004b04 <__aeabi_dcmpun+0x10> 8004afe: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8004b02: d10a bne.n 8004b1a <__aeabi_dcmpun+0x26> 8004b04: ea4f 0c43 mov.w ip, r3, lsl #1 8004b08: ea7f 5c6c mvns.w ip, ip, asr #21 8004b0c: d102 bne.n 8004b14 <__aeabi_dcmpun+0x20> 8004b0e: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8004b12: d102 bne.n 8004b1a <__aeabi_dcmpun+0x26> 8004b14: f04f 0000 mov.w r0, #0 8004b18: 4770 bx lr 8004b1a: f04f 0001 mov.w r0, #1 8004b1e: 4770 bx lr 08004b20 <__aeabi_d2iz>: 8004b20: ea4f 0241 mov.w r2, r1, lsl #1 8004b24: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 8004b28: d215 bcs.n 8004b56 <__aeabi_d2iz+0x36> 8004b2a: d511 bpl.n 8004b50 <__aeabi_d2iz+0x30> 8004b2c: f46f 7378 mvn.w r3, #992 ; 0x3e0 8004b30: ebb3 5262 subs.w r2, r3, r2, asr #21 8004b34: d912 bls.n 8004b5c <__aeabi_d2iz+0x3c> 8004b36: ea4f 23c1 mov.w r3, r1, lsl #11 8004b3a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8004b3e: ea43 5350 orr.w r3, r3, r0, lsr #21 8004b42: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8004b46: fa23 f002 lsr.w r0, r3, r2 8004b4a: bf18 it ne 8004b4c: 4240 negne r0, r0 8004b4e: 4770 bx lr 8004b50: f04f 0000 mov.w r0, #0 8004b54: 4770 bx lr 8004b56: ea50 3001 orrs.w r0, r0, r1, lsl #12 8004b5a: d105 bne.n 8004b68 <__aeabi_d2iz+0x48> 8004b5c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000 8004b60: bf08 it eq 8004b62: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8004b66: 4770 bx lr 8004b68: f04f 0000 mov.w r0, #0 8004b6c: 4770 bx lr 8004b6e: bf00 nop 08004b70 <__aeabi_d2uiz>: 8004b70: 004a lsls r2, r1, #1 8004b72: d211 bcs.n 8004b98 <__aeabi_d2uiz+0x28> 8004b74: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 8004b78: d211 bcs.n 8004b9e <__aeabi_d2uiz+0x2e> 8004b7a: d50d bpl.n 8004b98 <__aeabi_d2uiz+0x28> 8004b7c: f46f 7378 mvn.w r3, #992 ; 0x3e0 8004b80: ebb3 5262 subs.w r2, r3, r2, asr #21 8004b84: d40e bmi.n 8004ba4 <__aeabi_d2uiz+0x34> 8004b86: ea4f 23c1 mov.w r3, r1, lsl #11 8004b8a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8004b8e: ea43 5350 orr.w r3, r3, r0, lsr #21 8004b92: fa23 f002 lsr.w r0, r3, r2 8004b96: 4770 bx lr 8004b98: f04f 0000 mov.w r0, #0 8004b9c: 4770 bx lr 8004b9e: ea50 3001 orrs.w r0, r0, r1, lsl #12 8004ba2: d102 bne.n 8004baa <__aeabi_d2uiz+0x3a> 8004ba4: f04f 30ff mov.w r0, #4294967295 8004ba8: 4770 bx lr 8004baa: f04f 0000 mov.w r0, #0 8004bae: 4770 bx lr 08004bb0 <__aeabi_d2f>: 8004bb0: ea4f 0241 mov.w r2, r1, lsl #1 8004bb4: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000 8004bb8: bf24 itt cs 8004bba: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000 8004bbe: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000 8004bc2: d90d bls.n 8004be0 <__aeabi_d2f+0x30> 8004bc4: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8004bc8: ea4f 02c0 mov.w r2, r0, lsl #3 8004bcc: ea4c 7050 orr.w r0, ip, r0, lsr #29 8004bd0: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000 8004bd4: eb40 0083 adc.w r0, r0, r3, lsl #2 8004bd8: bf08 it eq 8004bda: f020 0001 biceq.w r0, r0, #1 8004bde: 4770 bx lr 8004be0: f011 4f80 tst.w r1, #1073741824 ; 0x40000000 8004be4: d121 bne.n 8004c2a <__aeabi_d2f+0x7a> 8004be6: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000 8004bea: bfbc itt lt 8004bec: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000 8004bf0: 4770 bxlt lr 8004bf2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8004bf6: ea4f 5252 mov.w r2, r2, lsr #21 8004bfa: f1c2 0218 rsb r2, r2, #24 8004bfe: f1c2 0c20 rsb ip, r2, #32 8004c02: fa10 f30c lsls.w r3, r0, ip 8004c06: fa20 f002 lsr.w r0, r0, r2 8004c0a: bf18 it ne 8004c0c: f040 0001 orrne.w r0, r0, #1 8004c10: ea4f 23c1 mov.w r3, r1, lsl #11 8004c14: ea4f 23d3 mov.w r3, r3, lsr #11 8004c18: fa03 fc0c lsl.w ip, r3, ip 8004c1c: ea40 000c orr.w r0, r0, ip 8004c20: fa23 f302 lsr.w r3, r3, r2 8004c24: ea4f 0343 mov.w r3, r3, lsl #1 8004c28: e7cc b.n 8004bc4 <__aeabi_d2f+0x14> 8004c2a: ea7f 5362 mvns.w r3, r2, asr #21 8004c2e: d107 bne.n 8004c40 <__aeabi_d2f+0x90> 8004c30: ea50 3301 orrs.w r3, r0, r1, lsl #12 8004c34: bf1e ittt ne 8004c36: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000 8004c3a: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000 8004c3e: 4770 bxne lr 8004c40: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000 8004c44: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8004c48: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004c4c: 4770 bx lr 8004c4e: bf00 nop 08004c50 <__aeabi_frsub>: 8004c50: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000 8004c54: e002 b.n 8004c5c <__addsf3> 8004c56: bf00 nop 08004c58 <__aeabi_fsub>: 8004c58: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 08004c5c <__addsf3>: 8004c5c: 0042 lsls r2, r0, #1 8004c5e: bf1f itttt ne 8004c60: ea5f 0341 movsne.w r3, r1, lsl #1 8004c64: ea92 0f03 teqne r2, r3 8004c68: ea7f 6c22 mvnsne.w ip, r2, asr #24 8004c6c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8004c70: d06a beq.n 8004d48 <__addsf3+0xec> 8004c72: ea4f 6212 mov.w r2, r2, lsr #24 8004c76: ebd2 6313 rsbs r3, r2, r3, lsr #24 8004c7a: bfc1 itttt gt 8004c7c: 18d2 addgt r2, r2, r3 8004c7e: 4041 eorgt r1, r0 8004c80: 4048 eorgt r0, r1 8004c82: 4041 eorgt r1, r0 8004c84: bfb8 it lt 8004c86: 425b neglt r3, r3 8004c88: 2b19 cmp r3, #25 8004c8a: bf88 it hi 8004c8c: 4770 bxhi lr 8004c8e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 8004c92: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004c96: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000 8004c9a: bf18 it ne 8004c9c: 4240 negne r0, r0 8004c9e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8004ca2: f441 0100 orr.w r1, r1, #8388608 ; 0x800000 8004ca6: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000 8004caa: bf18 it ne 8004cac: 4249 negne r1, r1 8004cae: ea92 0f03 teq r2, r3 8004cb2: d03f beq.n 8004d34 <__addsf3+0xd8> 8004cb4: f1a2 0201 sub.w r2, r2, #1 8004cb8: fa41 fc03 asr.w ip, r1, r3 8004cbc: eb10 000c adds.w r0, r0, ip 8004cc0: f1c3 0320 rsb r3, r3, #32 8004cc4: fa01 f103 lsl.w r1, r1, r3 8004cc8: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8004ccc: d502 bpl.n 8004cd4 <__addsf3+0x78> 8004cce: 4249 negs r1, r1 8004cd0: eb60 0040 sbc.w r0, r0, r0, lsl #1 8004cd4: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000 8004cd8: d313 bcc.n 8004d02 <__addsf3+0xa6> 8004cda: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8004cde: d306 bcc.n 8004cee <__addsf3+0x92> 8004ce0: 0840 lsrs r0, r0, #1 8004ce2: ea4f 0131 mov.w r1, r1, rrx 8004ce6: f102 0201 add.w r2, r2, #1 8004cea: 2afe cmp r2, #254 ; 0xfe 8004cec: d251 bcs.n 8004d92 <__addsf3+0x136> 8004cee: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000 8004cf2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8004cf6: bf08 it eq 8004cf8: f020 0001 biceq.w r0, r0, #1 8004cfc: ea40 0003 orr.w r0, r0, r3 8004d00: 4770 bx lr 8004d02: 0049 lsls r1, r1, #1 8004d04: eb40 0000 adc.w r0, r0, r0 8004d08: f410 0f00 tst.w r0, #8388608 ; 0x800000 8004d0c: f1a2 0201 sub.w r2, r2, #1 8004d10: d1ed bne.n 8004cee <__addsf3+0x92> 8004d12: fab0 fc80 clz ip, r0 8004d16: f1ac 0c08 sub.w ip, ip, #8 8004d1a: ebb2 020c subs.w r2, r2, ip 8004d1e: fa00 f00c lsl.w r0, r0, ip 8004d22: bfaa itet ge 8004d24: eb00 50c2 addge.w r0, r0, r2, lsl #23 8004d28: 4252 neglt r2, r2 8004d2a: 4318 orrge r0, r3 8004d2c: bfbc itt lt 8004d2e: 40d0 lsrlt r0, r2 8004d30: 4318 orrlt r0, r3 8004d32: 4770 bx lr 8004d34: f092 0f00 teq r2, #0 8004d38: f481 0100 eor.w r1, r1, #8388608 ; 0x800000 8004d3c: bf06 itte eq 8004d3e: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000 8004d42: 3201 addeq r2, #1 8004d44: 3b01 subne r3, #1 8004d46: e7b5 b.n 8004cb4 <__addsf3+0x58> 8004d48: ea4f 0341 mov.w r3, r1, lsl #1 8004d4c: ea7f 6c22 mvns.w ip, r2, asr #24 8004d50: bf18 it ne 8004d52: ea7f 6c23 mvnsne.w ip, r3, asr #24 8004d56: d021 beq.n 8004d9c <__addsf3+0x140> 8004d58: ea92 0f03 teq r2, r3 8004d5c: d004 beq.n 8004d68 <__addsf3+0x10c> 8004d5e: f092 0f00 teq r2, #0 8004d62: bf08 it eq 8004d64: 4608 moveq r0, r1 8004d66: 4770 bx lr 8004d68: ea90 0f01 teq r0, r1 8004d6c: bf1c itt ne 8004d6e: 2000 movne r0, #0 8004d70: 4770 bxne lr 8004d72: f012 4f7f tst.w r2, #4278190080 ; 0xff000000 8004d76: d104 bne.n 8004d82 <__addsf3+0x126> 8004d78: 0040 lsls r0, r0, #1 8004d7a: bf28 it cs 8004d7c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000 8004d80: 4770 bx lr 8004d82: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000 8004d86: bf3c itt cc 8004d88: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000 8004d8c: 4770 bxcc lr 8004d8e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8004d92: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000 8004d96: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004d9a: 4770 bx lr 8004d9c: ea7f 6222 mvns.w r2, r2, asr #24 8004da0: bf16 itet ne 8004da2: 4608 movne r0, r1 8004da4: ea7f 6323 mvnseq.w r3, r3, asr #24 8004da8: 4601 movne r1, r0 8004daa: 0242 lsls r2, r0, #9 8004dac: bf06 itte eq 8004dae: ea5f 2341 movseq.w r3, r1, lsl #9 8004db2: ea90 0f01 teqeq r0, r1 8004db6: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000 8004dba: 4770 bx lr 08004dbc <__aeabi_ui2f>: 8004dbc: f04f 0300 mov.w r3, #0 8004dc0: e004 b.n 8004dcc <__aeabi_i2f+0x8> 8004dc2: bf00 nop 08004dc4 <__aeabi_i2f>: 8004dc4: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000 8004dc8: bf48 it mi 8004dca: 4240 negmi r0, r0 8004dcc: ea5f 0c00 movs.w ip, r0 8004dd0: bf08 it eq 8004dd2: 4770 bxeq lr 8004dd4: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000 8004dd8: 4601 mov r1, r0 8004dda: f04f 0000 mov.w r0, #0 8004dde: e01c b.n 8004e1a <__aeabi_l2f+0x2a> 08004de0 <__aeabi_ul2f>: 8004de0: ea50 0201 orrs.w r2, r0, r1 8004de4: bf08 it eq 8004de6: 4770 bxeq lr 8004de8: f04f 0300 mov.w r3, #0 8004dec: e00a b.n 8004e04 <__aeabi_l2f+0x14> 8004dee: bf00 nop 08004df0 <__aeabi_l2f>: 8004df0: ea50 0201 orrs.w r2, r0, r1 8004df4: bf08 it eq 8004df6: 4770 bxeq lr 8004df8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000 8004dfc: d502 bpl.n 8004e04 <__aeabi_l2f+0x14> 8004dfe: 4240 negs r0, r0 8004e00: eb61 0141 sbc.w r1, r1, r1, lsl #1 8004e04: ea5f 0c01 movs.w ip, r1 8004e08: bf02 ittt eq 8004e0a: 4684 moveq ip, r0 8004e0c: 4601 moveq r1, r0 8004e0e: 2000 moveq r0, #0 8004e10: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000 8004e14: bf08 it eq 8004e16: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000 8004e1a: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000 8004e1e: fabc f28c clz r2, ip 8004e22: 3a08 subs r2, #8 8004e24: eba3 53c2 sub.w r3, r3, r2, lsl #23 8004e28: db10 blt.n 8004e4c <__aeabi_l2f+0x5c> 8004e2a: fa01 fc02 lsl.w ip, r1, r2 8004e2e: 4463 add r3, ip 8004e30: fa00 fc02 lsl.w ip, r0, r2 8004e34: f1c2 0220 rsb r2, r2, #32 8004e38: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8004e3c: fa20 f202 lsr.w r2, r0, r2 8004e40: eb43 0002 adc.w r0, r3, r2 8004e44: bf08 it eq 8004e46: f020 0001 biceq.w r0, r0, #1 8004e4a: 4770 bx lr 8004e4c: f102 0220 add.w r2, r2, #32 8004e50: fa01 fc02 lsl.w ip, r1, r2 8004e54: f1c2 0220 rsb r2, r2, #32 8004e58: ea50 004c orrs.w r0, r0, ip, lsl #1 8004e5c: fa21 f202 lsr.w r2, r1, r2 8004e60: eb43 0002 adc.w r0, r3, r2 8004e64: bf08 it eq 8004e66: ea20 70dc biceq.w r0, r0, ip, lsr #31 8004e6a: 4770 bx lr 08004e6c <__aeabi_fmul>: 8004e6c: f04f 0cff mov.w ip, #255 ; 0xff 8004e70: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8004e74: bf1e ittt ne 8004e76: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8004e7a: ea92 0f0c teqne r2, ip 8004e7e: ea93 0f0c teqne r3, ip 8004e82: d06f beq.n 8004f64 <__aeabi_fmul+0xf8> 8004e84: 441a add r2, r3 8004e86: ea80 0c01 eor.w ip, r0, r1 8004e8a: 0240 lsls r0, r0, #9 8004e8c: bf18 it ne 8004e8e: ea5f 2141 movsne.w r1, r1, lsl #9 8004e92: d01e beq.n 8004ed2 <__aeabi_fmul+0x66> 8004e94: f04f 6300 mov.w r3, #134217728 ; 0x8000000 8004e98: ea43 1050 orr.w r0, r3, r0, lsr #5 8004e9c: ea43 1151 orr.w r1, r3, r1, lsr #5 8004ea0: fba0 3101 umull r3, r1, r0, r1 8004ea4: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8004ea8: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000 8004eac: bf3e ittt cc 8004eae: 0049 lslcc r1, r1, #1 8004eb0: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8004eb4: 005b lslcc r3, r3, #1 8004eb6: ea40 0001 orr.w r0, r0, r1 8004eba: f162 027f sbc.w r2, r2, #127 ; 0x7f 8004ebe: 2afd cmp r2, #253 ; 0xfd 8004ec0: d81d bhi.n 8004efe <__aeabi_fmul+0x92> 8004ec2: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 8004ec6: eb40 50c2 adc.w r0, r0, r2, lsl #23 8004eca: bf08 it eq 8004ecc: f020 0001 biceq.w r0, r0, #1 8004ed0: 4770 bx lr 8004ed2: f090 0f00 teq r0, #0 8004ed6: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8004eda: bf08 it eq 8004edc: 0249 lsleq r1, r1, #9 8004ede: ea4c 2050 orr.w r0, ip, r0, lsr #9 8004ee2: ea40 2051 orr.w r0, r0, r1, lsr #9 8004ee6: 3a7f subs r2, #127 ; 0x7f 8004ee8: bfc2 ittt gt 8004eea: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 8004eee: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8004ef2: 4770 bxgt lr 8004ef4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004ef8: f04f 0300 mov.w r3, #0 8004efc: 3a01 subs r2, #1 8004efe: dc5d bgt.n 8004fbc <__aeabi_fmul+0x150> 8004f00: f112 0f19 cmn.w r2, #25 8004f04: bfdc itt le 8004f06: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000 8004f0a: 4770 bxle lr 8004f0c: f1c2 0200 rsb r2, r2, #0 8004f10: 0041 lsls r1, r0, #1 8004f12: fa21 f102 lsr.w r1, r1, r2 8004f16: f1c2 0220 rsb r2, r2, #32 8004f1a: fa00 fc02 lsl.w ip, r0, r2 8004f1e: ea5f 0031 movs.w r0, r1, rrx 8004f22: f140 0000 adc.w r0, r0, #0 8004f26: ea53 034c orrs.w r3, r3, ip, lsl #1 8004f2a: bf08 it eq 8004f2c: ea20 70dc biceq.w r0, r0, ip, lsr #31 8004f30: 4770 bx lr 8004f32: f092 0f00 teq r2, #0 8004f36: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8004f3a: bf02 ittt eq 8004f3c: 0040 lsleq r0, r0, #1 8004f3e: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 8004f42: 3a01 subeq r2, #1 8004f44: d0f9 beq.n 8004f3a <__aeabi_fmul+0xce> 8004f46: ea40 000c orr.w r0, r0, ip 8004f4a: f093 0f00 teq r3, #0 8004f4e: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8004f52: bf02 ittt eq 8004f54: 0049 lsleq r1, r1, #1 8004f56: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8004f5a: 3b01 subeq r3, #1 8004f5c: d0f9 beq.n 8004f52 <__aeabi_fmul+0xe6> 8004f5e: ea41 010c orr.w r1, r1, ip 8004f62: e78f b.n 8004e84 <__aeabi_fmul+0x18> 8004f64: ea0c 53d1 and.w r3, ip, r1, lsr #23 8004f68: ea92 0f0c teq r2, ip 8004f6c: bf18 it ne 8004f6e: ea93 0f0c teqne r3, ip 8004f72: d00a beq.n 8004f8a <__aeabi_fmul+0x11e> 8004f74: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 8004f78: bf18 it ne 8004f7a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 8004f7e: d1d8 bne.n 8004f32 <__aeabi_fmul+0xc6> 8004f80: ea80 0001 eor.w r0, r0, r1 8004f84: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8004f88: 4770 bx lr 8004f8a: f090 0f00 teq r0, #0 8004f8e: bf17 itett ne 8004f90: f090 4f00 teqne r0, #2147483648 ; 0x80000000 8004f94: 4608 moveq r0, r1 8004f96: f091 0f00 teqne r1, #0 8004f9a: f091 4f00 teqne r1, #2147483648 ; 0x80000000 8004f9e: d014 beq.n 8004fca <__aeabi_fmul+0x15e> 8004fa0: ea92 0f0c teq r2, ip 8004fa4: d101 bne.n 8004faa <__aeabi_fmul+0x13e> 8004fa6: 0242 lsls r2, r0, #9 8004fa8: d10f bne.n 8004fca <__aeabi_fmul+0x15e> 8004faa: ea93 0f0c teq r3, ip 8004fae: d103 bne.n 8004fb8 <__aeabi_fmul+0x14c> 8004fb0: 024b lsls r3, r1, #9 8004fb2: bf18 it ne 8004fb4: 4608 movne r0, r1 8004fb6: d108 bne.n 8004fca <__aeabi_fmul+0x15e> 8004fb8: ea80 0001 eor.w r0, r0, r1 8004fbc: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8004fc0: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8004fc4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004fc8: 4770 bx lr 8004fca: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8004fce: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000 8004fd2: 4770 bx lr 08004fd4 <__aeabi_fdiv>: 8004fd4: f04f 0cff mov.w ip, #255 ; 0xff 8004fd8: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8004fdc: bf1e ittt ne 8004fde: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8004fe2: ea92 0f0c teqne r2, ip 8004fe6: ea93 0f0c teqne r3, ip 8004fea: d069 beq.n 80050c0 <__aeabi_fdiv+0xec> 8004fec: eba2 0203 sub.w r2, r2, r3 8004ff0: ea80 0c01 eor.w ip, r0, r1 8004ff4: 0249 lsls r1, r1, #9 8004ff6: ea4f 2040 mov.w r0, r0, lsl #9 8004ffa: d037 beq.n 800506c <__aeabi_fdiv+0x98> 8004ffc: f04f 5380 mov.w r3, #268435456 ; 0x10000000 8005000: ea43 1111 orr.w r1, r3, r1, lsr #4 8005004: ea43 1310 orr.w r3, r3, r0, lsr #4 8005008: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 800500c: 428b cmp r3, r1 800500e: bf38 it cc 8005010: 005b lslcc r3, r3, #1 8005012: f142 027d adc.w r2, r2, #125 ; 0x7d 8005016: f44f 0c00 mov.w ip, #8388608 ; 0x800000 800501a: 428b cmp r3, r1 800501c: bf24 itt cs 800501e: 1a5b subcs r3, r3, r1 8005020: ea40 000c orrcs.w r0, r0, ip 8005024: ebb3 0f51 cmp.w r3, r1, lsr #1 8005028: bf24 itt cs 800502a: eba3 0351 subcs.w r3, r3, r1, lsr #1 800502e: ea40 005c orrcs.w r0, r0, ip, lsr #1 8005032: ebb3 0f91 cmp.w r3, r1, lsr #2 8005036: bf24 itt cs 8005038: eba3 0391 subcs.w r3, r3, r1, lsr #2 800503c: ea40 009c orrcs.w r0, r0, ip, lsr #2 8005040: ebb3 0fd1 cmp.w r3, r1, lsr #3 8005044: bf24 itt cs 8005046: eba3 03d1 subcs.w r3, r3, r1, lsr #3 800504a: ea40 00dc orrcs.w r0, r0, ip, lsr #3 800504e: 011b lsls r3, r3, #4 8005050: bf18 it ne 8005052: ea5f 1c1c movsne.w ip, ip, lsr #4 8005056: d1e0 bne.n 800501a <__aeabi_fdiv+0x46> 8005058: 2afd cmp r2, #253 ; 0xfd 800505a: f63f af50 bhi.w 8004efe <__aeabi_fmul+0x92> 800505e: 428b cmp r3, r1 8005060: eb40 50c2 adc.w r0, r0, r2, lsl #23 8005064: bf08 it eq 8005066: f020 0001 biceq.w r0, r0, #1 800506a: 4770 bx lr 800506c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8005070: ea4c 2050 orr.w r0, ip, r0, lsr #9 8005074: 327f adds r2, #127 ; 0x7f 8005076: bfc2 ittt gt 8005078: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 800507c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8005080: 4770 bxgt lr 8005082: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8005086: f04f 0300 mov.w r3, #0 800508a: 3a01 subs r2, #1 800508c: e737 b.n 8004efe <__aeabi_fmul+0x92> 800508e: f092 0f00 teq r2, #0 8005092: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8005096: bf02 ittt eq 8005098: 0040 lsleq r0, r0, #1 800509a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 800509e: 3a01 subeq r2, #1 80050a0: d0f9 beq.n 8005096 <__aeabi_fdiv+0xc2> 80050a2: ea40 000c orr.w r0, r0, ip 80050a6: f093 0f00 teq r3, #0 80050aa: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 80050ae: bf02 ittt eq 80050b0: 0049 lsleq r1, r1, #1 80050b2: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 80050b6: 3b01 subeq r3, #1 80050b8: d0f9 beq.n 80050ae <__aeabi_fdiv+0xda> 80050ba: ea41 010c orr.w r1, r1, ip 80050be: e795 b.n 8004fec <__aeabi_fdiv+0x18> 80050c0: ea0c 53d1 and.w r3, ip, r1, lsr #23 80050c4: ea92 0f0c teq r2, ip 80050c8: d108 bne.n 80050dc <__aeabi_fdiv+0x108> 80050ca: 0242 lsls r2, r0, #9 80050cc: f47f af7d bne.w 8004fca <__aeabi_fmul+0x15e> 80050d0: ea93 0f0c teq r3, ip 80050d4: f47f af70 bne.w 8004fb8 <__aeabi_fmul+0x14c> 80050d8: 4608 mov r0, r1 80050da: e776 b.n 8004fca <__aeabi_fmul+0x15e> 80050dc: ea93 0f0c teq r3, ip 80050e0: d104 bne.n 80050ec <__aeabi_fdiv+0x118> 80050e2: 024b lsls r3, r1, #9 80050e4: f43f af4c beq.w 8004f80 <__aeabi_fmul+0x114> 80050e8: 4608 mov r0, r1 80050ea: e76e b.n 8004fca <__aeabi_fmul+0x15e> 80050ec: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 80050f0: bf18 it ne 80050f2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 80050f6: d1ca bne.n 800508e <__aeabi_fdiv+0xba> 80050f8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000 80050fc: f47f af5c bne.w 8004fb8 <__aeabi_fmul+0x14c> 8005100: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000 8005104: f47f af3c bne.w 8004f80 <__aeabi_fmul+0x114> 8005108: e75f b.n 8004fca <__aeabi_fmul+0x15e> 800510a: bf00 nop 0800510c <__aeabi_f2uiz>: 800510c: 0042 lsls r2, r0, #1 800510e: d20e bcs.n 800512e <__aeabi_f2uiz+0x22> 8005110: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000 8005114: d30b bcc.n 800512e <__aeabi_f2uiz+0x22> 8005116: f04f 039e mov.w r3, #158 ; 0x9e 800511a: ebb3 6212 subs.w r2, r3, r2, lsr #24 800511e: d409 bmi.n 8005134 <__aeabi_f2uiz+0x28> 8005120: ea4f 2300 mov.w r3, r0, lsl #8 8005124: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8005128: fa23 f002 lsr.w r0, r3, r2 800512c: 4770 bx lr 800512e: f04f 0000 mov.w r0, #0 8005132: 4770 bx lr 8005134: f112 0f61 cmn.w r2, #97 ; 0x61 8005138: d101 bne.n 800513e <__aeabi_f2uiz+0x32> 800513a: 0242 lsls r2, r0, #9 800513c: d102 bne.n 8005144 <__aeabi_f2uiz+0x38> 800513e: f04f 30ff mov.w r0, #4294967295 8005142: 4770 bx lr 8005144: f04f 0000 mov.w r0, #0 8005148: 4770 bx lr 800514a: bf00 nop 0800514c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800514c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800514e: 4b0e ldr r3, [pc, #56] ; (8005188 ) { 8005150: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8005152: 7818 ldrb r0, [r3, #0] 8005154: f44f 737a mov.w r3, #1000 ; 0x3e8 8005158: fbb3 f3f0 udiv r3, r3, r0 800515c: 4a0b ldr r2, [pc, #44] ; (800518c ) 800515e: 6810 ldr r0, [r2, #0] 8005160: fbb0 f0f3 udiv r0, r0, r3 8005164: f000 fb38 bl 80057d8 8005168: 4604 mov r4, r0 800516a: b958 cbnz r0, 8005184 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800516c: 2d0f cmp r5, #15 800516e: d809 bhi.n 8005184 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8005170: 4602 mov r2, r0 8005172: 4629 mov r1, r5 8005174: f04f 30ff mov.w r0, #4294967295 8005178: f000 faee bl 8005758 uwTickPrio = TickPriority; 800517c: 4b04 ldr r3, [pc, #16] ; (8005190 ) 800517e: 4620 mov r0, r4 8005180: 601d str r5, [r3, #0] 8005182: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8005184: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8005186: bd38 pop {r3, r4, r5, pc} 8005188: 20000000 .word 0x20000000 800518c: 20000218 .word 0x20000218 8005190: 20000004 .word 0x20000004 08005194 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8005194: 4a07 ldr r2, [pc, #28] ; (80051b4 ) { 8005196: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8005198: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800519a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800519c: f043 0310 orr.w r3, r3, #16 80051a0: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80051a2: f000 fac7 bl 8005734 HAL_InitTick(TICK_INT_PRIORITY); 80051a6: 2000 movs r0, #0 80051a8: f7ff ffd0 bl 800514c HAL_MspInit(); 80051ac: f003 f8f4 bl 8008398 } 80051b0: 2000 movs r0, #0 80051b2: bd08 pop {r3, pc} 80051b4: 40022000 .word 0x40022000 080051b8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80051b8: 4a03 ldr r2, [pc, #12] ; (80051c8 ) 80051ba: 4b04 ldr r3, [pc, #16] ; (80051cc ) 80051bc: 6811 ldr r1, [r2, #0] 80051be: 781b ldrb r3, [r3, #0] 80051c0: 440b add r3, r1 80051c2: 6013 str r3, [r2, #0] 80051c4: 4770 bx lr 80051c6: bf00 nop 80051c8: 20000478 .word 0x20000478 80051cc: 20000000 .word 0x20000000 080051d0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80051d0: 4b01 ldr r3, [pc, #4] ; (80051d8 ) 80051d2: 6818 ldr r0, [r3, #0] } 80051d4: 4770 bx lr 80051d6: bf00 nop 80051d8: 20000478 .word 0x20000478 080051dc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80051dc: b538 push {r3, r4, r5, lr} 80051de: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80051e0: f7ff fff6 bl 80051d0 80051e4: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80051e6: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80051e8: bf1e ittt ne 80051ea: 4b04 ldrne r3, [pc, #16] ; (80051fc ) 80051ec: 781b ldrbne r3, [r3, #0] 80051ee: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80051f0: f7ff ffee bl 80051d0 80051f4: 1b40 subs r0, r0, r5 80051f6: 4284 cmp r4, r0 80051f8: d8fa bhi.n 80051f0 { } } 80051fa: bd38 pop {r3, r4, r5, pc} 80051fc: 20000000 .word 0x20000000 08005200 : 8005200: 4770 bx lr 08005202 : * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005202: 6a43 ldr r3, [r0, #36] ; 0x24 { 8005204: b510 push {r4, lr} /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 8005206: 6a9a ldr r2, [r3, #40] ; 0x28 8005208: f012 0f50 tst.w r2, #80 ; 0x50 800520c: d11b bne.n 8005246 { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 800520e: 6a9a ldr r2, [r3, #40] ; 0x28 8005210: f442 7200 orr.w r2, r2, #512 ; 0x200 8005214: 629a str r2, [r3, #40] ; 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005216: 681a ldr r2, [r3, #0] 8005218: 6892 ldr r2, [r2, #8] 800521a: f402 2260 and.w r2, r2, #917504 ; 0xe0000 800521e: f5b2 2f60 cmp.w r2, #917504 ; 0xe0000 8005222: d10c bne.n 800523e 8005224: 68da ldr r2, [r3, #12] 8005226: b952 cbnz r2, 800523e (hadc->Init.ContinuousConvMode == DISABLE) ) { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 8005228: 6a9a ldr r2, [r3, #40] ; 0x28 800522a: f422 7280 bic.w r2, r2, #256 ; 0x100 800522e: 629a str r2, [r3, #40] ; 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005230: 6a9a ldr r2, [r3, #40] ; 0x28 8005232: 04d2 lsls r2, r2, #19 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8005234: bf5e ittt pl 8005236: 6a9a ldrpl r2, [r3, #40] ; 0x28 8005238: f042 0201 orrpl.w r2, r2, #1 800523c: 629a strpl r2, [r3, #40] ; 0x28 } } /* Conversion complete callback */ HAL_ADC_ConvCpltCallback(hadc); 800523e: 4618 mov r0, r3 8005240: f7ff ffde bl 8005200 8005244: bd10 pop {r4, pc} } else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); 8005246: 6a1b ldr r3, [r3, #32] } } 8005248: e8bd 4010 ldmia.w sp!, {r4, lr} hadc->DMA_Handle->XferErrorCallback(hdma); 800524c: 6b1b ldr r3, [r3, #48] ; 0x30 800524e: 4718 bx r3 08005250 : 8005250: 4770 bx lr 08005252 : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 8005252: b508 push {r3, lr} /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; /* Half conversion callback */ HAL_ADC_ConvHalfCpltCallback(hadc); 8005254: 6a40 ldr r0, [r0, #36] ; 0x24 8005256: f7ff fffb bl 8005250 800525a: bd08 pop {r3, pc} 0800525c : { 800525c: 4770 bx lr 0800525e : * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800525e: 6a40 ldr r0, [r0, #36] ; 0x24 { 8005260: b508 push {r3, lr} /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 8005262: 6a83 ldr r3, [r0, #40] ; 0x28 8005264: f043 0340 orr.w r3, r3, #64 ; 0x40 8005268: 6283 str r3, [r0, #40] ; 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 800526a: 6ac3 ldr r3, [r0, #44] ; 0x2c 800526c: f043 0304 orr.w r3, r3, #4 8005270: 62c3 str r3, [r0, #44] ; 0x2c /* Error callback */ HAL_ADC_ErrorCallback(hadc); 8005272: f7ff fff3 bl 800525c 8005276: bd08 pop {r3, pc} 08005278 : __IO uint32_t wait_loop_index = 0U; 8005278: 2300 movs r3, #0 { 800527a: b573 push {r0, r1, r4, r5, r6, lr} __IO uint32_t wait_loop_index = 0U; 800527c: 9301 str r3, [sp, #4] __HAL_LOCK(hadc); 800527e: f890 3024 ldrb.w r3, [r0, #36] ; 0x24 8005282: 2b01 cmp r3, #1 8005284: d074 beq.n 8005370 8005286: 2301 movs r3, #1 if (sConfig->Rank < 7U) 8005288: 684d ldr r5, [r1, #4] __HAL_LOCK(hadc); 800528a: f880 3024 strb.w r3, [r0, #36] ; 0x24 if (sConfig->Rank < 7U) 800528e: 2d06 cmp r5, #6 8005290: 6802 ldr r2, [r0, #0] 8005292: ea4f 0385 mov.w r3, r5, lsl #2 8005296: 680c ldr r4, [r1, #0] 8005298: d825 bhi.n 80052e6 MODIFY_REG(hadc->Instance->SQR3 , 800529a: 442b add r3, r5 800529c: 251f movs r5, #31 800529e: 6b56 ldr r6, [r2, #52] ; 0x34 80052a0: 3b05 subs r3, #5 80052a2: 409d lsls r5, r3 80052a4: ea26 0505 bic.w r5, r6, r5 80052a8: fa04 f303 lsl.w r3, r4, r3 80052ac: 432b orrs r3, r5 80052ae: 6353 str r3, [r2, #52] ; 0x34 if (sConfig->Channel >= ADC_CHANNEL_10) 80052b0: 2c09 cmp r4, #9 80052b2: ea4f 0344 mov.w r3, r4, lsl #1 80052b6: 688d ldr r5, [r1, #8] 80052b8: d92f bls.n 800531a MODIFY_REG(hadc->Instance->SMPR1 , 80052ba: 2607 movs r6, #7 80052bc: 4423 add r3, r4 80052be: 68d1 ldr r1, [r2, #12] 80052c0: 3b1e subs r3, #30 80052c2: 409e lsls r6, r3 80052c4: ea21 0106 bic.w r1, r1, r6 80052c8: fa05 f303 lsl.w r3, r5, r3 80052cc: 430b orrs r3, r1 80052ce: 60d3 str r3, [r2, #12] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 80052d0: f1a4 0310 sub.w r3, r4, #16 80052d4: 2b01 cmp r3, #1 80052d6: d92b bls.n 8005330 HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80052d8: 2300 movs r3, #0 __HAL_UNLOCK(hadc); 80052da: 2200 movs r2, #0 80052dc: f880 2024 strb.w r2, [r0, #36] ; 0x24 } 80052e0: 4618 mov r0, r3 80052e2: b002 add sp, #8 80052e4: bd70 pop {r4, r5, r6, pc} else if (sConfig->Rank < 13U) 80052e6: 2d0c cmp r5, #12 80052e8: d80b bhi.n 8005302 MODIFY_REG(hadc->Instance->SQR2 , 80052ea: 442b add r3, r5 80052ec: 251f movs r5, #31 80052ee: 6b16 ldr r6, [r2, #48] ; 0x30 80052f0: 3b23 subs r3, #35 ; 0x23 80052f2: 409d lsls r5, r3 80052f4: ea26 0505 bic.w r5, r6, r5 80052f8: fa04 f303 lsl.w r3, r4, r3 80052fc: 432b orrs r3, r5 80052fe: 6313 str r3, [r2, #48] ; 0x30 8005300: e7d6 b.n 80052b0 MODIFY_REG(hadc->Instance->SQR1 , 8005302: 442b add r3, r5 8005304: 251f movs r5, #31 8005306: 6ad6 ldr r6, [r2, #44] ; 0x2c 8005308: 3b41 subs r3, #65 ; 0x41 800530a: 409d lsls r5, r3 800530c: ea26 0505 bic.w r5, r6, r5 8005310: fa04 f303 lsl.w r3, r4, r3 8005314: 432b orrs r3, r5 8005316: 62d3 str r3, [r2, #44] ; 0x2c 8005318: e7ca b.n 80052b0 MODIFY_REG(hadc->Instance->SMPR2 , 800531a: 2607 movs r6, #7 800531c: 6911 ldr r1, [r2, #16] 800531e: 4423 add r3, r4 8005320: 409e lsls r6, r3 8005322: ea21 0106 bic.w r1, r1, r6 8005326: fa05 f303 lsl.w r3, r5, r3 800532a: 430b orrs r3, r1 800532c: 6113 str r3, [r2, #16] 800532e: e7cf b.n 80052d0 if (hadc->Instance == ADC1) 8005330: 4b10 ldr r3, [pc, #64] ; (8005374 ) 8005332: 429a cmp r2, r3 8005334: d116 bne.n 8005364 if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 8005336: 6893 ldr r3, [r2, #8] 8005338: 021b lsls r3, r3, #8 800533a: d4cd bmi.n 80052d8 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800533c: 6893 ldr r3, [r2, #8] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) 800533e: 2c10 cmp r4, #16 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8005340: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 8005344: 6093 str r3, [r2, #8] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) 8005346: d1c7 bne.n 80052d8 wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8005348: 4b0b ldr r3, [pc, #44] ; (8005378 ) 800534a: 4a0c ldr r2, [pc, #48] ; (800537c ) 800534c: 681b ldr r3, [r3, #0] 800534e: fbb3 f2f2 udiv r2, r3, r2 8005352: 230a movs r3, #10 8005354: 4353 muls r3, r2 wait_loop_index--; 8005356: 9301 str r3, [sp, #4] while(wait_loop_index != 0U) 8005358: 9b01 ldr r3, [sp, #4] 800535a: 2b00 cmp r3, #0 800535c: d0bc beq.n 80052d8 wait_loop_index--; 800535e: 9b01 ldr r3, [sp, #4] 8005360: 3b01 subs r3, #1 8005362: e7f8 b.n 8005356 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8005364: 6a83 ldr r3, [r0, #40] ; 0x28 8005366: f043 0320 orr.w r3, r3, #32 800536a: 6283 str r3, [r0, #40] ; 0x28 tmp_hal_status = HAL_ERROR; 800536c: 2301 movs r3, #1 800536e: e7b4 b.n 80052da __HAL_LOCK(hadc); 8005370: 2302 movs r3, #2 8005372: e7b5 b.n 80052e0 8005374: 40012400 .word 0x40012400 8005378: 20000218 .word 0x20000218 800537c: 000f4240 .word 0x000f4240 08005380 : __IO uint32_t wait_loop_index = 0U; 8005380: 2300 movs r3, #0 { 8005382: b573 push {r0, r1, r4, r5, r6, lr} __IO uint32_t wait_loop_index = 0U; 8005384: 9301 str r3, [sp, #4] if (ADC_IS_ENABLE(hadc) == RESET) 8005386: 6803 ldr r3, [r0, #0] { 8005388: 4604 mov r4, r0 if (ADC_IS_ENABLE(hadc) == RESET) 800538a: 689a ldr r2, [r3, #8] 800538c: 07d2 lsls r2, r2, #31 800538e: d502 bpl.n 8005396 return HAL_OK; 8005390: 2000 movs r0, #0 } 8005392: b002 add sp, #8 8005394: bd70 pop {r4, r5, r6, pc} __HAL_ADC_ENABLE(hadc); 8005396: 689a ldr r2, [r3, #8] 8005398: f042 0201 orr.w r2, r2, #1 800539c: 609a str r2, [r3, #8] wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 800539e: 4b12 ldr r3, [pc, #72] ; (80053e8 ) 80053a0: 4a12 ldr r2, [pc, #72] ; (80053ec ) 80053a2: 681b ldr r3, [r3, #0] 80053a4: fbb3 f3f2 udiv r3, r3, r2 wait_loop_index--; 80053a8: 9301 str r3, [sp, #4] while(wait_loop_index != 0U) 80053aa: 9b01 ldr r3, [sp, #4] 80053ac: b9c3 cbnz r3, 80053e0 tickstart = HAL_GetTick(); 80053ae: f7ff ff0f bl 80051d0 80053b2: 4606 mov r6, r0 while(ADC_IS_ENABLE(hadc) == RESET) 80053b4: 6823 ldr r3, [r4, #0] 80053b6: 689d ldr r5, [r3, #8] 80053b8: f015 0501 ands.w r5, r5, #1 80053bc: d1e8 bne.n 8005390 if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 80053be: f7ff ff07 bl 80051d0 80053c2: 1b80 subs r0, r0, r6 80053c4: 2802 cmp r0, #2 80053c6: d9f5 bls.n 80053b4 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80053c8: 6aa3 ldr r3, [r4, #40] ; 0x28 __HAL_UNLOCK(hadc); 80053ca: f884 5024 strb.w r5, [r4, #36] ; 0x24 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80053ce: f043 0310 orr.w r3, r3, #16 80053d2: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80053d4: 6ae3 ldr r3, [r4, #44] ; 0x2c __HAL_UNLOCK(hadc); 80053d6: 2001 movs r0, #1 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80053d8: f043 0301 orr.w r3, r3, #1 80053dc: 62e3 str r3, [r4, #44] ; 0x2c 80053de: e7d8 b.n 8005392 wait_loop_index--; 80053e0: 9b01 ldr r3, [sp, #4] 80053e2: 3b01 subs r3, #1 80053e4: e7e0 b.n 80053a8 80053e6: bf00 nop 80053e8: 20000218 .word 0x20000218 80053ec: 000f4240 .word 0x000f4240 080053f0 : { 80053f0: e92d 41d8 stmdb sp!, {r3, r4, r6, r7, r8, lr} 80053f4: 4690 mov r8, r2 if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80053f6: 4b40 ldr r3, [pc, #256] ; (80054f8 ) 80053f8: 6802 ldr r2, [r0, #0] { 80053fa: 4604 mov r4, r0 if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80053fc: 429a cmp r2, r3 { 80053fe: 460f mov r7, r1 if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 8005400: d002 beq.n 8005408 8005402: 493e ldr r1, [pc, #248] ; (80054fc ) 8005404: 428a cmp r2, r1 8005406: d103 bne.n 8005410 8005408: 685b ldr r3, [r3, #4] 800540a: f413 2f70 tst.w r3, #983040 ; 0xf0000 800540e: d16e bne.n 80054ee __HAL_LOCK(hadc); 8005410: f894 3024 ldrb.w r3, [r4, #36] ; 0x24 8005414: 2b01 cmp r3, #1 8005416: d06c beq.n 80054f2 8005418: 2301 movs r3, #1 tmp_hal_status = ADC_Enable(hadc); 800541a: 4620 mov r0, r4 __HAL_LOCK(hadc); 800541c: f884 3024 strb.w r3, [r4, #36] ; 0x24 tmp_hal_status = ADC_Enable(hadc); 8005420: f7ff ffae bl 8005380 if (tmp_hal_status == HAL_OK) 8005424: 4606 mov r6, r0 8005426: 2800 cmp r0, #0 8005428: d15d bne.n 80054e6 ADC_STATE_CLR_SET(hadc->State, 800542a: 6aa0 ldr r0, [r4, #40] ; 0x28 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800542c: 6821 ldr r1, [r4, #0] ADC_STATE_CLR_SET(hadc->State, 800542e: f420 6070 bic.w r0, r0, #3840 ; 0xf00 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8005432: 4b32 ldr r3, [pc, #200] ; (80054fc ) ADC_STATE_CLR_SET(hadc->State, 8005434: f020 0001 bic.w r0, r0, #1 8005438: f440 7080 orr.w r0, r0, #256 ; 0x100 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800543c: 4299 cmp r1, r3 ADC_STATE_CLR_SET(hadc->State, 800543e: 62a0 str r0, [r4, #40] ; 0x28 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8005440: d104 bne.n 800544c 8005442: 4a2d ldr r2, [pc, #180] ; (80054f8 ) 8005444: 6853 ldr r3, [r2, #4] 8005446: f413 2f70 tst.w r3, #983040 ; 0xf0000 800544a: d13e bne.n 80054ca CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800544c: 6aa3 ldr r3, [r4, #40] ; 0x28 800544e: f423 1380 bic.w r3, r3, #1048576 ; 0x100000 8005452: 62a3 str r3, [r4, #40] ; 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8005454: 684b ldr r3, [r1, #4] 8005456: 055a lsls r2, r3, #21 8005458: d505 bpl.n 8005466 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800545a: 6aa3 ldr r3, [r4, #40] ; 0x28 800545c: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8005460: f443 5380 orr.w r3, r3, #4096 ; 0x1000 8005464: 62a3 str r3, [r4, #40] ; 0x28 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005466: 6aa3 ldr r3, [r4, #40] ; 0x28 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 8005468: 6a20 ldr r0, [r4, #32] if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800546a: f413 5380 ands.w r3, r3, #4096 ; 0x1000 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800546e: bf18 it ne 8005470: 6ae3 ldrne r3, [r4, #44] ; 0x2c HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 8005472: 463a mov r2, r7 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 8005474: bf18 it ne 8005476: f023 0306 bicne.w r3, r3, #6 ADC_CLEAR_ERRORCODE(hadc); 800547a: 62e3 str r3, [r4, #44] ; 0x2c __HAL_UNLOCK(hadc); 800547c: 2300 movs r3, #0 800547e: f884 3024 strb.w r3, [r4, #36] ; 0x24 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 8005482: 4b1f ldr r3, [pc, #124] ; (8005500 ) HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 8005484: 314c adds r1, #76 ; 0x4c hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 8005486: 6283 str r3, [r0, #40] ; 0x28 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 8005488: 4b1e ldr r3, [pc, #120] ; (8005504 ) 800548a: 62c3 str r3, [r0, #44] ; 0x2c hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 800548c: 4b1e ldr r3, [pc, #120] ; (8005508 ) 800548e: 6303 str r3, [r0, #48] ; 0x30 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 8005490: f06f 0302 mvn.w r3, #2 8005494: f841 3c4c str.w r3, [r1, #-76] SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 8005498: f851 3c44 ldr.w r3, [r1, #-68] 800549c: f443 7380 orr.w r3, r3, #256 ; 0x100 80054a0: f841 3c44 str.w r3, [r1, #-68] HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 80054a4: 4643 mov r3, r8 80054a6: f000 f9ed bl 8005884 if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 80054aa: 6823 ldr r3, [r4, #0] 80054ac: 689a ldr r2, [r3, #8] 80054ae: f402 2260 and.w r2, r2, #917504 ; 0xe0000 80054b2: f5b2 2f60 cmp.w r2, #917504 ; 0xe0000 SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 80054b6: 689a ldr r2, [r3, #8] 80054b8: bf0c ite eq 80054ba: f442 02a0 orreq.w r2, r2, #5242880 ; 0x500000 SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 80054be: f442 1280 orrne.w r2, r2, #1048576 ; 0x100000 80054c2: 609a str r2, [r3, #8] } 80054c4: 4630 mov r0, r6 80054c6: e8bd 81d8 ldmia.w sp!, {r3, r4, r6, r7, r8, pc} SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 80054ca: 6aa3 ldr r3, [r4, #40] ; 0x28 80054cc: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 80054d0: 62a3 str r3, [r4, #40] ; 0x28 if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 80054d2: 6853 ldr r3, [r2, #4] 80054d4: 055b lsls r3, r3, #21 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 80054d6: bf41 itttt mi 80054d8: 6aa0 ldrmi r0, [r4, #40] ; 0x28 80054da: f420 5040 bicmi.w r0, r0, #12288 ; 0x3000 80054de: f440 5080 orrmi.w r0, r0, #4096 ; 0x1000 80054e2: 62a0 strmi r0, [r4, #40] ; 0x28 80054e4: e7bf b.n 8005466 __HAL_UNLOCK(hadc); 80054e6: 2300 movs r3, #0 80054e8: f884 3024 strb.w r3, [r4, #36] ; 0x24 80054ec: e7ea b.n 80054c4 tmp_hal_status = HAL_ERROR; 80054ee: 2601 movs r6, #1 80054f0: e7e8 b.n 80054c4 __HAL_LOCK(hadc); 80054f2: 2602 movs r6, #2 80054f4: e7e6 b.n 80054c4 80054f6: bf00 nop 80054f8: 40012400 .word 0x40012400 80054fc: 40012800 .word 0x40012800 8005500: 08005203 .word 0x08005203 8005504: 08005253 .word 0x08005253 8005508: 0800525f .word 0x0800525f 0800550c : { 800550c: b538 push {r3, r4, r5, lr} if (ADC_IS_ENABLE(hadc) != RESET) 800550e: 6803 ldr r3, [r0, #0] { 8005510: 4604 mov r4, r0 if (ADC_IS_ENABLE(hadc) != RESET) 8005512: 689a ldr r2, [r3, #8] 8005514: 07d2 lsls r2, r2, #31 8005516: d401 bmi.n 800551c return HAL_OK; 8005518: 2000 movs r0, #0 800551a: bd38 pop {r3, r4, r5, pc} __HAL_ADC_DISABLE(hadc); 800551c: 689a ldr r2, [r3, #8] 800551e: f022 0201 bic.w r2, r2, #1 8005522: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 8005524: f7ff fe54 bl 80051d0 8005528: 4605 mov r5, r0 while(ADC_IS_ENABLE(hadc) != RESET) 800552a: 6823 ldr r3, [r4, #0] 800552c: 689b ldr r3, [r3, #8] 800552e: 07db lsls r3, r3, #31 8005530: d5f2 bpl.n 8005518 if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 8005532: f7ff fe4d bl 80051d0 8005536: 1b40 subs r0, r0, r5 8005538: 2802 cmp r0, #2 800553a: d9f6 bls.n 800552a SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800553c: 6aa3 ldr r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800553e: 2001 movs r0, #1 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8005540: f043 0310 orr.w r3, r3, #16 8005544: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005546: 6ae3 ldr r3, [r4, #44] ; 0x2c 8005548: f043 0301 orr.w r3, r3, #1 800554c: 62e3 str r3, [r4, #44] ; 0x2c 800554e: bd38 pop {r3, r4, r5, pc} 08005550 : { 8005550: b5f8 push {r3, r4, r5, r6, r7, lr} if(hadc == NULL) 8005552: 4604 mov r4, r0 8005554: 2800 cmp r0, #0 8005556: d077 beq.n 8005648 if (hadc->State == HAL_ADC_STATE_RESET) 8005558: 6a83 ldr r3, [r0, #40] ; 0x28 800555a: b923 cbnz r3, 8005566 ADC_CLEAR_ERRORCODE(hadc); 800555c: 62c3 str r3, [r0, #44] ; 0x2c hadc->Lock = HAL_UNLOCKED; 800555e: f880 3024 strb.w r3, [r0, #36] ; 0x24 HAL_ADC_MspInit(hadc); 8005562: f002 ff3b bl 80083dc tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8005566: 4620 mov r0, r4 8005568: f7ff ffd0 bl 800550c if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 800556c: 6aa3 ldr r3, [r4, #40] ; 0x28 800556e: f013 0310 ands.w r3, r3, #16 8005572: d16b bne.n 800564c 8005574: 2800 cmp r0, #0 8005576: d169 bne.n 800564c ADC_STATE_CLR_SET(hadc->State, 8005578: 6aa2 ldr r2, [r4, #40] ; 0x28 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800557a: 4937 ldr r1, [pc, #220] ; (8005658 ) ADC_STATE_CLR_SET(hadc->State, 800557c: f422 5288 bic.w r2, r2, #4352 ; 0x1100 8005580: f022 0202 bic.w r2, r2, #2 8005584: f042 0202 orr.w r2, r2, #2 8005588: 62a2 str r2, [r4, #40] ; 0x28 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800558a: e894 0024 ldmia.w r4, {r2, r5} 800558e: 428a cmp r2, r1 8005590: 69e1 ldr r1, [r4, #28] 8005592: d104 bne.n 800559e 8005594: f5b1 2f40 cmp.w r1, #786432 ; 0xc0000 8005598: bf08 it eq 800559a: f44f 2100 moveq.w r1, #524288 ; 0x80000 ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) ); 800559e: 68e6 ldr r6, [r4, #12] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 80055a0: ea45 0546 orr.w r5, r5, r6, lsl #1 80055a4: 4329 orrs r1, r5 tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 80055a6: 68a5 ldr r5, [r4, #8] 80055a8: f5b5 7f80 cmp.w r5, #256 ; 0x100 80055ac: d035 beq.n 800561a 80055ae: 2d01 cmp r5, #1 80055b0: bf08 it eq 80055b2: f44f 7380 moveq.w r3, #256 ; 0x100 if (hadc->Init.DiscontinuousConvMode == ENABLE) 80055b6: 6967 ldr r7, [r4, #20] 80055b8: 2f01 cmp r7, #1 80055ba: d106 bne.n 80055ca if (hadc->Init.ContinuousConvMode == DISABLE) 80055bc: bb7e cbnz r6, 800561e SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 80055be: 69a6 ldr r6, [r4, #24] 80055c0: 3e01 subs r6, #1 80055c2: ea43 3346 orr.w r3, r3, r6, lsl #13 80055c6: f443 6300 orr.w r3, r3, #2048 ; 0x800 MODIFY_REG(hadc->Instance->CR1, 80055ca: 6856 ldr r6, [r2, #4] if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 80055cc: f5b5 7f80 cmp.w r5, #256 ; 0x100 MODIFY_REG(hadc->Instance->CR1, 80055d0: f426 4669 bic.w r6, r6, #59648 ; 0xe900 80055d4: ea43 0306 orr.w r3, r3, r6 80055d8: 6053 str r3, [r2, #4] MODIFY_REG(hadc->Instance->CR2, 80055da: 6896 ldr r6, [r2, #8] 80055dc: 4b1f ldr r3, [pc, #124] ; (800565c ) 80055de: ea03 0306 and.w r3, r3, r6 80055e2: ea43 0301 orr.w r3, r3, r1 80055e6: 6093 str r3, [r2, #8] if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 80055e8: d001 beq.n 80055ee 80055ea: 2d01 cmp r5, #1 80055ec: d120 bne.n 8005630 tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 80055ee: 6923 ldr r3, [r4, #16] 80055f0: 3b01 subs r3, #1 80055f2: 051b lsls r3, r3, #20 MODIFY_REG(hadc->Instance->SQR1, 80055f4: 6ad5 ldr r5, [r2, #44] ; 0x2c 80055f6: f425 0570 bic.w r5, r5, #15728640 ; 0xf00000 80055fa: 432b orrs r3, r5 80055fc: 62d3 str r3, [r2, #44] ; 0x2c if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80055fe: 6892 ldr r2, [r2, #8] 8005600: 4b17 ldr r3, [pc, #92] ; (8005660 ) 8005602: 4013 ands r3, r2 8005604: 4299 cmp r1, r3 8005606: d115 bne.n 8005634 ADC_CLEAR_ERRORCODE(hadc); 8005608: 2300 movs r3, #0 800560a: 62e3 str r3, [r4, #44] ; 0x2c ADC_STATE_CLR_SET(hadc->State, 800560c: 6aa3 ldr r3, [r4, #40] ; 0x28 800560e: f023 0303 bic.w r3, r3, #3 8005612: f043 0301 orr.w r3, r3, #1 8005616: 62a3 str r3, [r4, #40] ; 0x28 8005618: bdf8 pop {r3, r4, r5, r6, r7, pc} tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 800561a: 462b mov r3, r5 800561c: e7cb b.n 80055b6 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800561e: 6aa6 ldr r6, [r4, #40] ; 0x28 8005620: f046 0620 orr.w r6, r6, #32 8005624: 62a6 str r6, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005626: 6ae6 ldr r6, [r4, #44] ; 0x2c 8005628: f046 0601 orr.w r6, r6, #1 800562c: 62e6 str r6, [r4, #44] ; 0x2c 800562e: e7cc b.n 80055ca uint32_t tmp_sqr1 = 0U; 8005630: 2300 movs r3, #0 8005632: e7df b.n 80055f4 ADC_STATE_CLR_SET(hadc->State, 8005634: 6aa3 ldr r3, [r4, #40] ; 0x28 8005636: f023 0312 bic.w r3, r3, #18 800563a: f043 0310 orr.w r3, r3, #16 800563e: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005640: 6ae3 ldr r3, [r4, #44] ; 0x2c 8005642: f043 0301 orr.w r3, r3, #1 8005646: 62e3 str r3, [r4, #44] ; 0x2c return HAL_ERROR; 8005648: 2001 movs r0, #1 } 800564a: bdf8 pop {r3, r4, r5, r6, r7, pc} SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800564c: 6aa3 ldr r3, [r4, #40] ; 0x28 800564e: f043 0310 orr.w r3, r3, #16 8005652: 62a3 str r3, [r4, #40] ; 0x28 8005654: e7f8 b.n 8005648 8005656: bf00 nop 8005658: 40013c00 .word 0x40013c00 800565c: ffe1f7fd .word 0xffe1f7fd 8005660: ff1f0efe .word 0xff1f0efe 08005664 : */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) { HAL_StatusTypeDef tmp_hal_status = HAL_OK; uint32_t tickstart; __IO uint32_t wait_loop_index = 0U; 8005664: 2300 movs r3, #0 { 8005666: b573 push {r0, r1, r4, r5, r6, lr} __IO uint32_t wait_loop_index = 0U; 8005668: 9301 str r3, [sp, #4] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 800566a: f890 3024 ldrb.w r3, [r0, #36] ; 0x24 { 800566e: 4604 mov r4, r0 __HAL_LOCK(hadc); 8005670: 2b01 cmp r3, #1 8005672: d05a beq.n 800572a 8005674: 2301 movs r3, #1 8005676: f880 3024 strb.w r3, [r0, #36] ; 0x24 /* 1. Calibration prerequisite: */ /* - ADC must be disabled for at least two ADC clock cycles in disable */ /* mode before ADC enable */ /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800567a: f7ff ff47 bl 800550c /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) 800567e: 4605 mov r5, r0 8005680: 2800 cmp r0, #0 8005682: d132 bne.n 80056ea { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8005684: 6aa3 ldr r3, [r4, #40] ; 0x28 /* Hardware prerequisite: delay before starting the calibration. */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ /* - Wait for the expected ADC clock cycles delay */ wait_loop_index = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 8005686: 2002 movs r0, #2 ADC_STATE_CLR_SET(hadc->State, 8005688: f423 5388 bic.w r3, r3, #4352 ; 0x1100 800568c: f023 0302 bic.w r3, r3, #2 8005690: f043 0302 orr.w r3, r3, #2 8005694: 62a3 str r3, [r4, #40] ; 0x28 / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 8005696: 4b26 ldr r3, [pc, #152] ; (8005730 ) 8005698: 681e ldr r6, [r3, #0] 800569a: f000 ffaf bl 80065fc 800569e: fbb6 f0f0 udiv r0, r6, r0 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); 80056a2: 0040 lsls r0, r0, #1 wait_loop_index = ((SystemCoreClock 80056a4: 9001 str r0, [sp, #4] while(wait_loop_index != 0U) 80056a6: 9b01 ldr r3, [sp, #4] 80056a8: bb1b cbnz r3, 80056f2 { wait_loop_index--; } /* 2. Enable the ADC peripheral */ ADC_Enable(hadc); 80056aa: 4620 mov r0, r4 80056ac: f7ff fe68 bl 8005380 /* 3. Resets ADC calibration registers */ SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); 80056b0: 6822 ldr r2, [r4, #0] 80056b2: 6893 ldr r3, [r2, #8] 80056b4: f043 0308 orr.w r3, r3, #8 80056b8: 6093 str r3, [r2, #8] tickstart = HAL_GetTick(); 80056ba: f7ff fd89 bl 80051d0 80056be: 4606 mov r6, r0 /* Wait for calibration reset completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 80056c0: 6823 ldr r3, [r4, #0] 80056c2: 689a ldr r2, [r3, #8] 80056c4: 0712 lsls r2, r2, #28 80056c6: d418 bmi.n 80056fa } } /* 4. Start ADC calibration */ SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); 80056c8: 689a ldr r2, [r3, #8] 80056ca: f042 0204 orr.w r2, r2, #4 80056ce: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 80056d0: f7ff fd7e bl 80051d0 80056d4: 4606 mov r6, r0 /* Wait for calibration completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 80056d6: 6823 ldr r3, [r4, #0] 80056d8: 689b ldr r3, [r3, #8] 80056da: 075b lsls r3, r3, #29 80056dc: d41f bmi.n 800571e return HAL_ERROR; } } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 80056de: 6aa3 ldr r3, [r4, #40] ; 0x28 80056e0: f023 0303 bic.w r3, r3, #3 80056e4: f043 0301 orr.w r3, r3, #1 80056e8: 62a3 str r3, [r4, #40] ; 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 80056ea: 2300 movs r3, #0 80056ec: f884 3024 strb.w r3, [r4, #36] ; 0x24 /* Return function status */ return tmp_hal_status; 80056f0: e012 b.n 8005718 wait_loop_index--; 80056f2: 9b01 ldr r3, [sp, #4] 80056f4: 3b01 subs r3, #1 80056f6: 9301 str r3, [sp, #4] 80056f8: e7d5 b.n 80056a6 if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 80056fa: f7ff fd69 bl 80051d0 80056fe: 1b80 subs r0, r0, r6 8005700: 280a cmp r0, #10 8005702: d9dd bls.n 80056c0 ADC_STATE_CLR_SET(hadc->State, 8005704: 6aa3 ldr r3, [r4, #40] ; 0x28 return HAL_ERROR; 8005706: 2501 movs r5, #1 ADC_STATE_CLR_SET(hadc->State, 8005708: f023 0312 bic.w r3, r3, #18 800570c: f043 0310 orr.w r3, r3, #16 8005710: 62a3 str r3, [r4, #40] ; 0x28 __HAL_UNLOCK(hadc); 8005712: 2300 movs r3, #0 8005714: f884 3024 strb.w r3, [r4, #36] ; 0x24 } 8005718: 4628 mov r0, r5 800571a: b002 add sp, #8 800571c: bd70 pop {r4, r5, r6, pc} if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 800571e: f7ff fd57 bl 80051d0 8005722: 1b80 subs r0, r0, r6 8005724: 280a cmp r0, #10 8005726: d9d6 bls.n 80056d6 8005728: e7ec b.n 8005704 __HAL_LOCK(hadc); 800572a: 2502 movs r5, #2 800572c: e7f4 b.n 8005718 800572e: bf00 nop 8005730: 20000218 .word 0x20000218 08005734 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 8005734: 4a07 ldr r2, [pc, #28] ; (8005754 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 8005736: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 8005738: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 800573a: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 800573e: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8005742: 041b lsls r3, r3, #16 8005744: 0c1b lsrs r3, r3, #16 8005746: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 800574a: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800574e: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 8005750: 60d3 str r3, [r2, #12] 8005752: 4770 bx lr 8005754: e000ed00 .word 0xe000ed00 08005758 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8005758: 4b17 ldr r3, [pc, #92] ; (80057b8 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800575a: b530 push {r4, r5, lr} 800575c: 68dc ldr r4, [r3, #12] 800575e: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8005762: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005766: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8005768: 2b04 cmp r3, #4 800576a: bf28 it cs 800576c: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800576e: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005770: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005774: bf98 it ls 8005776: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005778: fa05 f303 lsl.w r3, r5, r3 800577c: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005780: bf88 it hi 8005782: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005784: 4019 ands r1, r3 8005786: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8005788: fa05 f404 lsl.w r4, r5, r4 800578c: 3c01 subs r4, #1 800578e: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8005790: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005792: ea42 0201 orr.w r2, r2, r1 8005796: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800579a: bfaf iteee ge 800579c: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80057a0: 4b06 ldrlt r3, [pc, #24] ; (80057bc ) 80057a2: f000 000f andlt.w r0, r0, #15 80057a6: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80057a8: bfa5 ittet ge 80057aa: b2d2 uxtbge r2, r2 80057ac: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80057b0: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80057b2: f880 2300 strbge.w r2, [r0, #768] ; 0x300 80057b6: bd30 pop {r4, r5, pc} 80057b8: e000ed00 .word 0xe000ed00 80057bc: e000ed14 .word 0xe000ed14 080057c0 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 80057c0: 2301 movs r3, #1 80057c2: 0942 lsrs r2, r0, #5 80057c4: f000 001f and.w r0, r0, #31 80057c8: fa03 f000 lsl.w r0, r3, r0 80057cc: 4b01 ldr r3, [pc, #4] ; (80057d4 ) 80057ce: f843 0022 str.w r0, [r3, r2, lsl #2] 80057d2: 4770 bx lr 80057d4: e000e100 .word 0xe000e100 080057d8 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 80057d8: 3801 subs r0, #1 80057da: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 80057de: d20a bcs.n 80057f6 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80057e0: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80057e2: 4b06 ldr r3, [pc, #24] ; (80057fc ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80057e4: 4a06 ldr r2, [pc, #24] ; (8005800 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80057e6: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80057e8: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80057ec: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80057ee: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80057f0: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80057f2: 601a str r2, [r3, #0] 80057f4: 4770 bx lr return (1UL); /* Reload value impossible */ 80057f6: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80057f8: 4770 bx lr 80057fa: bf00 nop 80057fc: e000e010 .word 0xe000e010 8005800: e000ed00 .word 0xe000ed00 08005804 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8005804: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 8005806: 2800 cmp r0, #0 8005808: d032 beq.n 8005870 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 800580a: 6801 ldr r1, [r0, #0] 800580c: 4b19 ldr r3, [pc, #100] ; (8005874 ) 800580e: 2414 movs r4, #20 8005810: 4299 cmp r1, r3 8005812: d825 bhi.n 8005860 { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8005814: 4a18 ldr r2, [pc, #96] ; (8005878 ) hdma->DmaBaseAddress = DMA1; 8005816: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 800581a: 440a add r2, r1 800581c: fbb2 f2f4 udiv r2, r2, r4 8005820: 0092 lsls r2, r2, #2 8005822: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8005824: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 8005826: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 8005828: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 800582a: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 800582c: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 800582e: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8005830: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 8005834: 4323 orrs r3, r4 8005836: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8005838: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 800583c: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 800583e: 6944 ldr r4, [r0, #20] 8005840: 4323 orrs r3, r4 8005842: 6984 ldr r4, [r0, #24] 8005844: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 8005846: 69c4 ldr r4, [r0, #28] 8005848: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 800584a: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 800584c: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 800584e: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8005850: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 8005852: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8005856: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8005858: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 800585c: 4618 mov r0, r3 800585e: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 8005860: 4b06 ldr r3, [pc, #24] ; (800587c ) 8005862: 440b add r3, r1 8005864: fbb3 f3f4 udiv r3, r3, r4 8005868: 009b lsls r3, r3, #2 800586a: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 800586c: 4b04 ldr r3, [pc, #16] ; (8005880 ) 800586e: e7d9 b.n 8005824 return HAL_ERROR; 8005870: 2001 movs r0, #1 } 8005872: bd10 pop {r4, pc} 8005874: 40020407 .word 0x40020407 8005878: bffdfff8 .word 0xbffdfff8 800587c: bffdfbf8 .word 0xbffdfbf8 8005880: 40020400 .word 0x40020400 08005884 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8005884: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8005886: f890 4020 ldrb.w r4, [r0, #32] 800588a: 2c01 cmp r4, #1 800588c: d035 beq.n 80058fa 800588e: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 8005890: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 8005894: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8005898: 42a5 cmp r5, r4 800589a: f04f 0600 mov.w r6, #0 800589e: f04f 0402 mov.w r4, #2 80058a2: d128 bne.n 80058f6 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 80058a4: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 80058a8: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80058aa: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 80058ac: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 80058ae: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 80058b0: f026 0601 bic.w r6, r6, #1 80058b4: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 80058b6: 6bc6 ldr r6, [r0, #60] ; 0x3c 80058b8: 40bd lsls r5, r7 80058ba: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 80058bc: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 80058be: 6843 ldr r3, [r0, #4] 80058c0: 6805 ldr r5, [r0, #0] 80058c2: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 80058c4: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 80058c6: bf0b itete eq 80058c8: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 80058ca: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 80058cc: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 80058ce: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 80058d0: b14b cbz r3, 80058e6 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80058d2: 6823 ldr r3, [r4, #0] 80058d4: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 80058d8: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 80058da: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 80058dc: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 80058de: f043 0301 orr.w r3, r3, #1 80058e2: 602b str r3, [r5, #0] 80058e4: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 80058e6: 6823 ldr r3, [r4, #0] 80058e8: f023 0304 bic.w r3, r3, #4 80058ec: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 80058ee: 6823 ldr r3, [r4, #0] 80058f0: f043 030a orr.w r3, r3, #10 80058f4: e7f0 b.n 80058d8 __HAL_UNLOCK(hdma); 80058f6: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 80058fa: 2002 movs r0, #2 } 80058fc: bdf0 pop {r4, r5, r6, r7, pc} ... 08005900 : if(HAL_DMA_STATE_BUSY != hdma->State) 8005900: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 8005904: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 8005906: 2b02 cmp r3, #2 8005908: d003 beq.n 8005912 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 800590a: 2304 movs r3, #4 800590c: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 800590e: 2001 movs r0, #1 8005910: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8005912: 6803 ldr r3, [r0, #0] 8005914: 681a ldr r2, [r3, #0] 8005916: f022 020e bic.w r2, r2, #14 800591a: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 800591c: 681a ldr r2, [r3, #0] 800591e: f022 0201 bic.w r2, r2, #1 8005922: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8005924: 4a29 ldr r2, [pc, #164] ; (80059cc ) 8005926: 4293 cmp r3, r2 8005928: d924 bls.n 8005974 800592a: f502 7262 add.w r2, r2, #904 ; 0x388 800592e: 4293 cmp r3, r2 8005930: d019 beq.n 8005966 8005932: 3214 adds r2, #20 8005934: 4293 cmp r3, r2 8005936: d018 beq.n 800596a 8005938: 3214 adds r2, #20 800593a: 4293 cmp r3, r2 800593c: d017 beq.n 800596e 800593e: 3214 adds r2, #20 8005940: 4293 cmp r3, r2 8005942: bf0c ite eq 8005944: f44f 5380 moveq.w r3, #4096 ; 0x1000 8005948: f44f 3380 movne.w r3, #65536 ; 0x10000 800594c: 4a20 ldr r2, [pc, #128] ; (80059d0 ) 800594e: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 8005950: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 8005952: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8005954: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 8005958: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 800595a: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 800595e: b39b cbz r3, 80059c8 hdma->XferAbortCallback(hdma); 8005960: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8005962: 4620 mov r0, r4 8005964: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8005966: 2301 movs r3, #1 8005968: e7f0 b.n 800594c 800596a: 2310 movs r3, #16 800596c: e7ee b.n 800594c 800596e: f44f 7380 mov.w r3, #256 ; 0x100 8005972: e7eb b.n 800594c 8005974: 4917 ldr r1, [pc, #92] ; (80059d4 ) 8005976: 428b cmp r3, r1 8005978: d016 beq.n 80059a8 800597a: 3114 adds r1, #20 800597c: 428b cmp r3, r1 800597e: d015 beq.n 80059ac 8005980: 3114 adds r1, #20 8005982: 428b cmp r3, r1 8005984: d014 beq.n 80059b0 8005986: 3114 adds r1, #20 8005988: 428b cmp r3, r1 800598a: d014 beq.n 80059b6 800598c: 3114 adds r1, #20 800598e: 428b cmp r3, r1 8005990: d014 beq.n 80059bc 8005992: 3114 adds r1, #20 8005994: 428b cmp r3, r1 8005996: d014 beq.n 80059c2 8005998: 4293 cmp r3, r2 800599a: bf14 ite ne 800599c: f44f 3380 movne.w r3, #65536 ; 0x10000 80059a0: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 80059a4: 4a0c ldr r2, [pc, #48] ; (80059d8 ) 80059a6: e7d2 b.n 800594e 80059a8: 2301 movs r3, #1 80059aa: e7fb b.n 80059a4 80059ac: 2310 movs r3, #16 80059ae: e7f9 b.n 80059a4 80059b0: f44f 7380 mov.w r3, #256 ; 0x100 80059b4: e7f6 b.n 80059a4 80059b6: f44f 5380 mov.w r3, #4096 ; 0x1000 80059ba: e7f3 b.n 80059a4 80059bc: f44f 3380 mov.w r3, #65536 ; 0x10000 80059c0: e7f0 b.n 80059a4 80059c2: f44f 1380 mov.w r3, #1048576 ; 0x100000 80059c6: e7ed b.n 80059a4 HAL_StatusTypeDef status = HAL_OK; 80059c8: 4618 mov r0, r3 } 80059ca: bd10 pop {r4, pc} 80059cc: 40020080 .word 0x40020080 80059d0: 40020400 .word 0x40020400 80059d4: 40020008 .word 0x40020008 80059d8: 40020000 .word 0x40020000 080059dc : { 80059dc: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80059de: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 80059e0: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80059e2: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 80059e4: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 80059e6: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80059e8: 4095 lsls r5, r2 80059ea: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 80059ec: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80059ee: d055 beq.n 8005a9c 80059f0: 074d lsls r5, r1, #29 80059f2: d553 bpl.n 8005a9c if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 80059f4: 681a ldr r2, [r3, #0] 80059f6: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 80059f8: bf5e ittt pl 80059fa: 681a ldrpl r2, [r3, #0] 80059fc: f022 0204 bicpl.w r2, r2, #4 8005a00: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8005a02: 4a60 ldr r2, [pc, #384] ; (8005b84 ) 8005a04: 4293 cmp r3, r2 8005a06: d91f bls.n 8005a48 8005a08: f502 7262 add.w r2, r2, #904 ; 0x388 8005a0c: 4293 cmp r3, r2 8005a0e: d014 beq.n 8005a3a 8005a10: 3214 adds r2, #20 8005a12: 4293 cmp r3, r2 8005a14: d013 beq.n 8005a3e 8005a16: 3214 adds r2, #20 8005a18: 4293 cmp r3, r2 8005a1a: d012 beq.n 8005a42 8005a1c: 3214 adds r2, #20 8005a1e: 4293 cmp r3, r2 8005a20: bf0c ite eq 8005a22: f44f 4380 moveq.w r3, #16384 ; 0x4000 8005a26: f44f 2380 movne.w r3, #262144 ; 0x40000 8005a2a: 4a57 ldr r2, [pc, #348] ; (8005b88 ) 8005a2c: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 8005a2e: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 8005a30: 2b00 cmp r3, #0 8005a32: f000 80a5 beq.w 8005b80 } 8005a36: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 8005a38: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8005a3a: 2304 movs r3, #4 8005a3c: e7f5 b.n 8005a2a 8005a3e: 2340 movs r3, #64 ; 0x40 8005a40: e7f3 b.n 8005a2a 8005a42: f44f 6380 mov.w r3, #1024 ; 0x400 8005a46: e7f0 b.n 8005a2a 8005a48: 4950 ldr r1, [pc, #320] ; (8005b8c ) 8005a4a: 428b cmp r3, r1 8005a4c: d016 beq.n 8005a7c 8005a4e: 3114 adds r1, #20 8005a50: 428b cmp r3, r1 8005a52: d015 beq.n 8005a80 8005a54: 3114 adds r1, #20 8005a56: 428b cmp r3, r1 8005a58: d014 beq.n 8005a84 8005a5a: 3114 adds r1, #20 8005a5c: 428b cmp r3, r1 8005a5e: d014 beq.n 8005a8a 8005a60: 3114 adds r1, #20 8005a62: 428b cmp r3, r1 8005a64: d014 beq.n 8005a90 8005a66: 3114 adds r1, #20 8005a68: 428b cmp r3, r1 8005a6a: d014 beq.n 8005a96 8005a6c: 4293 cmp r3, r2 8005a6e: bf14 ite ne 8005a70: f44f 2380 movne.w r3, #262144 ; 0x40000 8005a74: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8005a78: 4a45 ldr r2, [pc, #276] ; (8005b90 ) 8005a7a: e7d7 b.n 8005a2c 8005a7c: 2304 movs r3, #4 8005a7e: e7fb b.n 8005a78 8005a80: 2340 movs r3, #64 ; 0x40 8005a82: e7f9 b.n 8005a78 8005a84: f44f 6380 mov.w r3, #1024 ; 0x400 8005a88: e7f6 b.n 8005a78 8005a8a: f44f 4380 mov.w r3, #16384 ; 0x4000 8005a8e: e7f3 b.n 8005a78 8005a90: f44f 2380 mov.w r3, #262144 ; 0x40000 8005a94: e7f0 b.n 8005a78 8005a96: f44f 0380 mov.w r3, #4194304 ; 0x400000 8005a9a: e7ed b.n 8005a78 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8005a9c: 2502 movs r5, #2 8005a9e: 4095 lsls r5, r2 8005aa0: 4225 tst r5, r4 8005aa2: d057 beq.n 8005b54 8005aa4: 078d lsls r5, r1, #30 8005aa6: d555 bpl.n 8005b54 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005aa8: 681a ldr r2, [r3, #0] 8005aaa: 0694 lsls r4, r2, #26 8005aac: d406 bmi.n 8005abc __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8005aae: 681a ldr r2, [r3, #0] 8005ab0: f022 020a bic.w r2, r2, #10 8005ab4: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 8005ab6: 2201 movs r2, #1 8005ab8: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8005abc: 4a31 ldr r2, [pc, #196] ; (8005b84 ) 8005abe: 4293 cmp r3, r2 8005ac0: d91e bls.n 8005b00 8005ac2: f502 7262 add.w r2, r2, #904 ; 0x388 8005ac6: 4293 cmp r3, r2 8005ac8: d013 beq.n 8005af2 8005aca: 3214 adds r2, #20 8005acc: 4293 cmp r3, r2 8005ace: d012 beq.n 8005af6 8005ad0: 3214 adds r2, #20 8005ad2: 4293 cmp r3, r2 8005ad4: d011 beq.n 8005afa 8005ad6: 3214 adds r2, #20 8005ad8: 4293 cmp r3, r2 8005ada: bf0c ite eq 8005adc: f44f 5300 moveq.w r3, #8192 ; 0x2000 8005ae0: f44f 3300 movne.w r3, #131072 ; 0x20000 8005ae4: 4a28 ldr r2, [pc, #160] ; (8005b88 ) 8005ae6: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 8005ae8: 2300 movs r3, #0 8005aea: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 8005aee: 6a83 ldr r3, [r0, #40] ; 0x28 8005af0: e79e b.n 8005a30 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8005af2: 2302 movs r3, #2 8005af4: e7f6 b.n 8005ae4 8005af6: 2320 movs r3, #32 8005af8: e7f4 b.n 8005ae4 8005afa: f44f 7300 mov.w r3, #512 ; 0x200 8005afe: e7f1 b.n 8005ae4 8005b00: 4922 ldr r1, [pc, #136] ; (8005b8c ) 8005b02: 428b cmp r3, r1 8005b04: d016 beq.n 8005b34 8005b06: 3114 adds r1, #20 8005b08: 428b cmp r3, r1 8005b0a: d015 beq.n 8005b38 8005b0c: 3114 adds r1, #20 8005b0e: 428b cmp r3, r1 8005b10: d014 beq.n 8005b3c 8005b12: 3114 adds r1, #20 8005b14: 428b cmp r3, r1 8005b16: d014 beq.n 8005b42 8005b18: 3114 adds r1, #20 8005b1a: 428b cmp r3, r1 8005b1c: d014 beq.n 8005b48 8005b1e: 3114 adds r1, #20 8005b20: 428b cmp r3, r1 8005b22: d014 beq.n 8005b4e 8005b24: 4293 cmp r3, r2 8005b26: bf14 ite ne 8005b28: f44f 3300 movne.w r3, #131072 ; 0x20000 8005b2c: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 8005b30: 4a17 ldr r2, [pc, #92] ; (8005b90 ) 8005b32: e7d8 b.n 8005ae6 8005b34: 2302 movs r3, #2 8005b36: e7fb b.n 8005b30 8005b38: 2320 movs r3, #32 8005b3a: e7f9 b.n 8005b30 8005b3c: f44f 7300 mov.w r3, #512 ; 0x200 8005b40: e7f6 b.n 8005b30 8005b42: f44f 5300 mov.w r3, #8192 ; 0x2000 8005b46: e7f3 b.n 8005b30 8005b48: f44f 3300 mov.w r3, #131072 ; 0x20000 8005b4c: e7f0 b.n 8005b30 8005b4e: f44f 1300 mov.w r3, #2097152 ; 0x200000 8005b52: e7ed b.n 8005b30 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8005b54: 2508 movs r5, #8 8005b56: 4095 lsls r5, r2 8005b58: 4225 tst r5, r4 8005b5a: d011 beq.n 8005b80 8005b5c: 0709 lsls r1, r1, #28 8005b5e: d50f bpl.n 8005b80 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8005b60: 6819 ldr r1, [r3, #0] 8005b62: f021 010e bic.w r1, r1, #14 8005b66: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8005b68: 2301 movs r3, #1 8005b6a: fa03 f202 lsl.w r2, r3, r2 8005b6e: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 8005b70: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 8005b72: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 8005b76: 2300 movs r3, #0 8005b78: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8005b7c: 6b03 ldr r3, [r0, #48] ; 0x30 8005b7e: e757 b.n 8005a30 } 8005b80: bc70 pop {r4, r5, r6} 8005b82: 4770 bx lr 8005b84: 40020080 .word 0x40020080 8005b88: 40020400 .word 0x40020400 8005b8c: 40020008 .word 0x40020008 8005b90: 40020000 .word 0x40020000 08005b94 : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 8005b94: 4a11 ldr r2, [pc, #68] ; (8005bdc ) 8005b96: 68d3 ldr r3, [r2, #12] 8005b98: f013 0310 ands.w r3, r3, #16 8005b9c: d005 beq.n 8005baa #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 8005b9e: 4910 ldr r1, [pc, #64] ; (8005be0 ) 8005ba0: 69cb ldr r3, [r1, #28] 8005ba2: f043 0302 orr.w r3, r3, #2 8005ba6: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8005ba8: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8005baa: 68d2 ldr r2, [r2, #12] 8005bac: 0750 lsls r0, r2, #29 8005bae: d506 bpl.n 8005bbe #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8005bb0: 490b ldr r1, [pc, #44] ; (8005be0 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 8005bb2: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8005bb6: 69ca ldr r2, [r1, #28] 8005bb8: f042 0201 orr.w r2, r2, #1 8005bbc: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 8005bbe: 4a07 ldr r2, [pc, #28] ; (8005bdc ) 8005bc0: 69d1 ldr r1, [r2, #28] 8005bc2: 07c9 lsls r1, r1, #31 8005bc4: d508 bpl.n 8005bd8 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 8005bc6: 4806 ldr r0, [pc, #24] ; (8005be0 ) 8005bc8: 69c1 ldr r1, [r0, #28] 8005bca: f041 0104 orr.w r1, r1, #4 8005bce: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 8005bd0: 69d1 ldr r1, [r2, #28] 8005bd2: f021 0101 bic.w r1, r1, #1 8005bd6: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8005bd8: 60d3 str r3, [r2, #12] 8005bda: 4770 bx lr 8005bdc: 40022000 .word 0x40022000 8005be0: 20000480 .word 0x20000480 08005be4 : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8005be4: 4b06 ldr r3, [pc, #24] ; (8005c00 ) 8005be6: 6918 ldr r0, [r3, #16] 8005be8: f010 0080 ands.w r0, r0, #128 ; 0x80 8005bec: d007 beq.n 8005bfe WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8005bee: 4a05 ldr r2, [pc, #20] ; (8005c04 ) 8005bf0: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 8005bf2: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 8005bf6: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8005bf8: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8005bfa: f3c0 10c0 ubfx r0, r0, #7, #1 } 8005bfe: 4770 bx lr 8005c00: 40022000 .word 0x40022000 8005c04: 45670123 .word 0x45670123 08005c08 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8005c08: 4a03 ldr r2, [pc, #12] ; (8005c18 ) } 8005c0a: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8005c0c: 6913 ldr r3, [r2, #16] 8005c0e: f043 0380 orr.w r3, r3, #128 ; 0x80 8005c12: 6113 str r3, [r2, #16] } 8005c14: 4770 bx lr 8005c16: bf00 nop 8005c18: 40022000 .word 0x40022000 08005c1c : { 8005c1c: b5f8 push {r3, r4, r5, r6, r7, lr} 8005c1e: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 8005c20: f7ff fad6 bl 80051d0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8005c24: 4c11 ldr r4, [pc, #68] ; (8005c6c ) uint32_t tickstart = HAL_GetTick(); 8005c26: 4607 mov r7, r0 8005c28: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8005c2a: 68e3 ldr r3, [r4, #12] 8005c2c: 07d8 lsls r0, r3, #31 8005c2e: d412 bmi.n 8005c56 if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8005c30: 68e3 ldr r3, [r4, #12] 8005c32: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 8005c34: bf44 itt mi 8005c36: 2320 movmi r3, #32 8005c38: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8005c3a: 68eb ldr r3, [r5, #12] 8005c3c: 06da lsls r2, r3, #27 8005c3e: d406 bmi.n 8005c4e __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8005c40: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8005c42: 07db lsls r3, r3, #31 8005c44: d403 bmi.n 8005c4e __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8005c46: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8005c48: f010 0004 ands.w r0, r0, #4 8005c4c: d002 beq.n 8005c54 FLASH_SetErrorCode(); 8005c4e: f7ff ffa1 bl 8005b94 return HAL_ERROR; 8005c52: 2001 movs r0, #1 } 8005c54: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 8005c56: 1c73 adds r3, r6, #1 8005c58: d0e7 beq.n 8005c2a if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8005c5a: b90e cbnz r6, 8005c60 return HAL_TIMEOUT; 8005c5c: 2003 movs r0, #3 8005c5e: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8005c60: f7ff fab6 bl 80051d0 8005c64: 1bc0 subs r0, r0, r7 8005c66: 4286 cmp r6, r0 8005c68: d2df bcs.n 8005c2a 8005c6a: e7f7 b.n 8005c5c 8005c6c: 40022000 .word 0x40022000 08005c70 : { 8005c70: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 8005c74: 4c1f ldr r4, [pc, #124] ; (8005cf4 ) { 8005c76: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8005c78: 7e23 ldrb r3, [r4, #24] { 8005c7a: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8005c7c: 2b01 cmp r3, #1 { 8005c7e: 460f mov r7, r1 8005c80: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 8005c82: d033 beq.n 8005cec 8005c84: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8005c86: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8005c8a: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8005c8c: f7ff ffc6 bl 8005c1c if(status == HAL_OK) 8005c90: bb40 cbnz r0, 8005ce4 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8005c92: 2d01 cmp r5, #1 8005c94: d003 beq.n 8005c9e nbiterations = 4U; 8005c96: 2d02 cmp r5, #2 8005c98: bf0c ite eq 8005c9a: 2502 moveq r5, #2 8005c9c: 2504 movne r5, #4 8005c9e: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8005ca0: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 8005ca2: f8df b054 ldr.w fp, [pc, #84] ; 8005cf8 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8005ca6: 0132 lsls r2, r6, #4 8005ca8: 4640 mov r0, r8 8005caa: 4649 mov r1, r9 8005cac: f7fe fac4 bl 8004238 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8005cb0: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 8005cb4: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8005cb8: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 8005cba: f043 0301 orr.w r3, r3, #1 8005cbe: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 8005cc2: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8005cc6: f24c 3050 movw r0, #50000 ; 0xc350 8005cca: f7ff ffa7 bl 8005c1c CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8005cce: f8db 3010 ldr.w r3, [fp, #16] 8005cd2: f023 0301 bic.w r3, r3, #1 8005cd6: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 8005cda: b918 cbnz r0, 8005ce4 8005cdc: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 8005cde: b2f3 uxtb r3, r6 8005ce0: 429d cmp r5, r3 8005ce2: d8e0 bhi.n 8005ca6 __HAL_UNLOCK(&pFlash); 8005ce4: 2300 movs r3, #0 8005ce6: 7623 strb r3, [r4, #24] return status; 8005ce8: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 8005cec: 2002 movs r0, #2 } 8005cee: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 8005cf2: bf00 nop 8005cf4: 20000480 .word 0x20000480 8005cf8: 40022000 .word 0x40022000 08005cfc : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8005cfc: 2200 movs r2, #0 8005cfe: 4b06 ldr r3, [pc, #24] ; (8005d18 ) 8005d00: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 8005d02: 4b06 ldr r3, [pc, #24] ; (8005d1c ) 8005d04: 691a ldr r2, [r3, #16] 8005d06: f042 0204 orr.w r2, r2, #4 8005d0a: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8005d0c: 691a ldr r2, [r3, #16] 8005d0e: f042 0240 orr.w r2, r2, #64 ; 0x40 8005d12: 611a str r2, [r3, #16] 8005d14: 4770 bx lr 8005d16: bf00 nop 8005d18: 20000480 .word 0x20000480 8005d1c: 40022000 .word 0x40022000 08005d20 : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8005d20: 2200 movs r2, #0 8005d22: 4b06 ldr r3, [pc, #24] ; (8005d3c ) 8005d24: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 8005d26: 4b06 ldr r3, [pc, #24] ; (8005d40 ) 8005d28: 691a ldr r2, [r3, #16] 8005d2a: f042 0202 orr.w r2, r2, #2 8005d2e: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 8005d30: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8005d32: 691a ldr r2, [r3, #16] 8005d34: f042 0240 orr.w r2, r2, #64 ; 0x40 8005d38: 611a str r2, [r3, #16] 8005d3a: 4770 bx lr 8005d3c: 20000480 .word 0x20000480 8005d40: 40022000 .word 0x40022000 08005d44 : { 8005d44: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 8005d48: 4d23 ldr r5, [pc, #140] ; (8005dd8 ) { 8005d4a: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 8005d4c: 7e2b ldrb r3, [r5, #24] { 8005d4e: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 8005d50: 2b01 cmp r3, #1 8005d52: d03d beq.n 8005dd0 8005d54: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8005d56: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 8005d58: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8005d5a: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8005d5c: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8005d60: d113 bne.n 8005d8a if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8005d62: f7ff ff5b bl 8005c1c 8005d66: b120 cbz r0, 8005d72 HAL_StatusTypeDef status = HAL_ERROR; 8005d68: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8005d6a: 2300 movs r3, #0 8005d6c: 762b strb r3, [r5, #24] return status; 8005d6e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 8005d72: f7ff ffc3 bl 8005cfc status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8005d76: f24c 3050 movw r0, #50000 ; 0xc350 8005d7a: f7ff ff4f bl 8005c1c CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 8005d7e: 4a17 ldr r2, [pc, #92] ; (8005ddc ) 8005d80: 6913 ldr r3, [r2, #16] 8005d82: f023 0304 bic.w r3, r3, #4 8005d86: 6113 str r3, [r2, #16] 8005d88: e7ef b.n 8005d6a if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8005d8a: f7ff ff47 bl 8005c1c 8005d8e: 2800 cmp r0, #0 8005d90: d1ea bne.n 8005d68 *PageError = 0xFFFFFFFFU; 8005d92: f04f 33ff mov.w r3, #4294967295 8005d96: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 8005d9a: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 8005d9c: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8005d9e: 4c0f ldr r4, [pc, #60] ; (8005ddc ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 8005da0: 68fa ldr r2, [r7, #12] 8005da2: 68bb ldr r3, [r7, #8] 8005da4: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 8005da8: 429e cmp r6, r3 8005daa: d2de bcs.n 8005d6a FLASH_PageErase(address); 8005dac: 4630 mov r0, r6 8005dae: f7ff ffb7 bl 8005d20 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8005db2: f24c 3050 movw r0, #50000 ; 0xc350 8005db6: f7ff ff31 bl 8005c1c CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8005dba: 6923 ldr r3, [r4, #16] 8005dbc: f023 0302 bic.w r3, r3, #2 8005dc0: 6123 str r3, [r4, #16] if (status != HAL_OK) 8005dc2: b110 cbz r0, 8005dca *PageError = address; 8005dc4: f8c8 6000 str.w r6, [r8] break; 8005dc8: e7cf b.n 8005d6a address += FLASH_PAGE_SIZE) 8005dca: f506 6600 add.w r6, r6, #2048 ; 0x800 8005dce: e7e7 b.n 8005da0 __HAL_LOCK(&pFlash); 8005dd0: 2002 movs r0, #2 } 8005dd2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8005dd6: bf00 nop 8005dd8: 20000480 .word 0x20000480 8005ddc: 40022000 .word 0x40022000 08005de0 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8005de0: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 8005de4: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 8005de6: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8005de8: 4f6c ldr r7, [pc, #432] ; (8005f9c ) 8005dea: 4b6d ldr r3, [pc, #436] ; (8005fa0 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8005dec: f8df e1b8 ldr.w lr, [pc, #440] ; 8005fa8 switch (GPIO_Init->Mode) 8005df0: f8df c1b8 ldr.w ip, [pc, #440] ; 8005fac ioposition = (0x01U << position); 8005df4: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8005df8: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 8005dfa: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8005dfe: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 8005e02: 45a0 cmp r8, r4 8005e04: f040 8085 bne.w 8005f12 switch (GPIO_Init->Mode) 8005e08: 684d ldr r5, [r1, #4] 8005e0a: 2d12 cmp r5, #18 8005e0c: f000 80b7 beq.w 8005f7e 8005e10: f200 808d bhi.w 8005f2e 8005e14: 2d02 cmp r5, #2 8005e16: f000 80af beq.w 8005f78 8005e1a: f200 8081 bhi.w 8005f20 8005e1e: 2d00 cmp r5, #0 8005e20: f000 8091 beq.w 8005f46 8005e24: 2d01 cmp r5, #1 8005e26: f000 80a5 beq.w 8005f74 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8005e2a: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8005e2e: 2cff cmp r4, #255 ; 0xff 8005e30: bf93 iteet ls 8005e32: 4682 movls sl, r0 8005e34: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 8005e38: 3d08 subhi r5, #8 8005e3a: f8d0 b000 ldrls.w fp, [r0] 8005e3e: bf92 itee ls 8005e40: 00b5 lslls r5, r6, #2 8005e42: f8d0 b004 ldrhi.w fp, [r0, #4] 8005e46: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8005e48: fa09 f805 lsl.w r8, r9, r5 8005e4c: ea2b 0808 bic.w r8, fp, r8 8005e50: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8005e54: bf88 it hi 8005e56: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8005e5a: ea48 0505 orr.w r5, r8, r5 8005e5e: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8005e62: f8d1 a004 ldr.w sl, [r1, #4] 8005e66: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8005e6a: d052 beq.n 8005f12 __HAL_RCC_AFIO_CLK_ENABLE(); 8005e6c: 69bd ldr r5, [r7, #24] 8005e6e: f026 0803 bic.w r8, r6, #3 8005e72: f045 0501 orr.w r5, r5, #1 8005e76: 61bd str r5, [r7, #24] 8005e78: 69bd ldr r5, [r7, #24] 8005e7a: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8005e7e: f005 0501 and.w r5, r5, #1 8005e82: 9501 str r5, [sp, #4] 8005e84: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8005e88: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8005e8c: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8005e8e: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8005e92: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8005e96: fa09 f90b lsl.w r9, r9, fp 8005e9a: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8005e9e: 4d41 ldr r5, [pc, #260] ; (8005fa4 ) 8005ea0: 42a8 cmp r0, r5 8005ea2: d071 beq.n 8005f88 8005ea4: f505 6580 add.w r5, r5, #1024 ; 0x400 8005ea8: 42a8 cmp r0, r5 8005eaa: d06f beq.n 8005f8c 8005eac: f505 6580 add.w r5, r5, #1024 ; 0x400 8005eb0: 42a8 cmp r0, r5 8005eb2: d06d beq.n 8005f90 8005eb4: f505 6580 add.w r5, r5, #1024 ; 0x400 8005eb8: 42a8 cmp r0, r5 8005eba: d06b beq.n 8005f94 8005ebc: f505 6580 add.w r5, r5, #1024 ; 0x400 8005ec0: 42a8 cmp r0, r5 8005ec2: d069 beq.n 8005f98 8005ec4: 4570 cmp r0, lr 8005ec6: bf0c ite eq 8005ec8: 2505 moveq r5, #5 8005eca: 2506 movne r5, #6 8005ecc: fa05 f50b lsl.w r5, r5, fp 8005ed0: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 8005ed4: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8005ed8: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8005eda: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8005ede: bf14 ite ne 8005ee0: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8005ee2: 43a5 biceq r5, r4 8005ee4: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 8005ee6: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8005ee8: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8005eec: bf14 ite ne 8005eee: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8005ef0: 43a5 biceq r5, r4 8005ef2: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8005ef4: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8005ef6: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8005efa: bf14 ite ne 8005efc: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8005efe: 43a5 biceq r5, r4 8005f00: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8005f02: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8005f04: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8005f08: bf14 ite ne 8005f0a: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8005f0c: ea25 0404 biceq.w r4, r5, r4 8005f10: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8005f12: 3601 adds r6, #1 8005f14: 2e10 cmp r6, #16 8005f16: f47f af6d bne.w 8005df4 } } } } } 8005f1a: b003 add sp, #12 8005f1c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8005f20: 2d03 cmp r5, #3 8005f22: d025 beq.n 8005f70 8005f24: 2d11 cmp r5, #17 8005f26: d180 bne.n 8005e2a config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8005f28: 68ca ldr r2, [r1, #12] 8005f2a: 3204 adds r2, #4 break; 8005f2c: e77d b.n 8005e2a switch (GPIO_Init->Mode) 8005f2e: 4565 cmp r5, ip 8005f30: d009 beq.n 8005f46 8005f32: d812 bhi.n 8005f5a 8005f34: f8df 9078 ldr.w r9, [pc, #120] ; 8005fb0 8005f38: 454d cmp r5, r9 8005f3a: d004 beq.n 8005f46 8005f3c: f509 3980 add.w r9, r9, #65536 ; 0x10000 8005f40: 454d cmp r5, r9 8005f42: f47f af72 bne.w 8005e2a if (GPIO_Init->Pull == GPIO_NOPULL) 8005f46: 688a ldr r2, [r1, #8] 8005f48: b1e2 cbz r2, 8005f84 else if (GPIO_Init->Pull == GPIO_PULLUP) 8005f4a: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8005f4c: bf0c ite eq 8005f4e: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8005f52: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8005f56: 2208 movs r2, #8 8005f58: e767 b.n 8005e2a switch (GPIO_Init->Mode) 8005f5a: f8df 9058 ldr.w r9, [pc, #88] ; 8005fb4 8005f5e: 454d cmp r5, r9 8005f60: d0f1 beq.n 8005f46 8005f62: f509 3980 add.w r9, r9, #65536 ; 0x10000 8005f66: 454d cmp r5, r9 8005f68: d0ed beq.n 8005f46 8005f6a: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8005f6e: e7e7 b.n 8005f40 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8005f70: 2200 movs r2, #0 8005f72: e75a b.n 8005e2a config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8005f74: 68ca ldr r2, [r1, #12] break; 8005f76: e758 b.n 8005e2a config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8005f78: 68ca ldr r2, [r1, #12] 8005f7a: 3208 adds r2, #8 break; 8005f7c: e755 b.n 8005e2a config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8005f7e: 68ca ldr r2, [r1, #12] 8005f80: 320c adds r2, #12 break; 8005f82: e752 b.n 8005e2a config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8005f84: 2204 movs r2, #4 8005f86: e750 b.n 8005e2a SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8005f88: 2500 movs r5, #0 8005f8a: e79f b.n 8005ecc 8005f8c: 2501 movs r5, #1 8005f8e: e79d b.n 8005ecc 8005f90: 2502 movs r5, #2 8005f92: e79b b.n 8005ecc 8005f94: 2503 movs r5, #3 8005f96: e799 b.n 8005ecc 8005f98: 2504 movs r5, #4 8005f9a: e797 b.n 8005ecc 8005f9c: 40021000 .word 0x40021000 8005fa0: 40010400 .word 0x40010400 8005fa4: 40010800 .word 0x40010800 8005fa8: 40011c00 .word 0x40011c00 8005fac: 10210000 .word 0x10210000 8005fb0: 10110000 .word 0x10110000 8005fb4: 10310000 .word 0x10310000 08005fb8 : GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8005fb8: 6883 ldr r3, [r0, #8] 8005fba: 4219 tst r1, r3 else { bitstatus = GPIO_PIN_RESET; } return bitstatus; } 8005fbc: bf14 ite ne 8005fbe: 2001 movne r0, #1 8005fc0: 2000 moveq r0, #0 8005fc2: 4770 bx lr 08005fc4 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8005fc4: b10a cbz r2, 8005fca { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8005fc6: 6101 str r1, [r0, #16] 8005fc8: 4770 bx lr 8005fca: 0409 lsls r1, r1, #16 8005fcc: e7fb b.n 8005fc6 08005fce : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 8005fce: 68c3 ldr r3, [r0, #12] 8005fd0: 4059 eors r1, r3 8005fd2: 60c1 str r1, [r0, #12] 8005fd4: 4770 bx lr ... 08005fd8 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005fd8: 6803 ldr r3, [r0, #0] { 8005fda: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005fde: 07db lsls r3, r3, #31 { 8005fe0: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005fe2: d410 bmi.n 8006006 } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8005fe4: 682b ldr r3, [r5, #0] 8005fe6: 079f lsls r7, r3, #30 8005fe8: d45e bmi.n 80060a8 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8005fea: 682b ldr r3, [r5, #0] 8005fec: 0719 lsls r1, r3, #28 8005fee: f100 8095 bmi.w 800611c } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8005ff2: 682b ldr r3, [r5, #0] 8005ff4: 075a lsls r2, r3, #29 8005ff6: f100 80bf bmi.w 8006178 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8005ffa: 69ea ldr r2, [r5, #28] 8005ffc: 2a00 cmp r2, #0 8005ffe: f040 812d bne.w 800625c { return HAL_ERROR; } } return HAL_OK; 8006002: 2000 movs r0, #0 8006004: e014 b.n 8006030 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8006006: 4c90 ldr r4, [pc, #576] ; (8006248 ) 8006008: 6863 ldr r3, [r4, #4] 800600a: f003 030c and.w r3, r3, #12 800600e: 2b04 cmp r3, #4 8006010: d007 beq.n 8006022 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8006012: 6863 ldr r3, [r4, #4] 8006014: f003 030c and.w r3, r3, #12 8006018: 2b08 cmp r3, #8 800601a: d10c bne.n 8006036 800601c: 6863 ldr r3, [r4, #4] 800601e: 03de lsls r6, r3, #15 8006020: d509 bpl.n 8006036 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8006022: 6823 ldr r3, [r4, #0] 8006024: 039c lsls r4, r3, #14 8006026: d5dd bpl.n 8005fe4 8006028: 686b ldr r3, [r5, #4] 800602a: 2b00 cmp r3, #0 800602c: d1da bne.n 8005fe4 return HAL_ERROR; 800602e: 2001 movs r0, #1 } 8006030: b002 add sp, #8 8006032: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8006036: 686b ldr r3, [r5, #4] 8006038: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 800603c: d110 bne.n 8006060 800603e: 6823 ldr r3, [r4, #0] 8006040: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8006044: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8006046: f7ff f8c3 bl 80051d0 800604a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800604c: 6823 ldr r3, [r4, #0] 800604e: 0398 lsls r0, r3, #14 8006050: d4c8 bmi.n 8005fe4 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8006052: f7ff f8bd bl 80051d0 8006056: 1b80 subs r0, r0, r6 8006058: 2864 cmp r0, #100 ; 0x64 800605a: d9f7 bls.n 800604c return HAL_TIMEOUT; 800605c: 2003 movs r0, #3 800605e: e7e7 b.n 8006030 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8006060: b99b cbnz r3, 800608a 8006062: 6823 ldr r3, [r4, #0] 8006064: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8006068: 6023 str r3, [r4, #0] 800606a: 6823 ldr r3, [r4, #0] 800606c: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8006070: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8006072: f7ff f8ad bl 80051d0 8006076: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8006078: 6823 ldr r3, [r4, #0] 800607a: 0399 lsls r1, r3, #14 800607c: d5b2 bpl.n 8005fe4 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800607e: f7ff f8a7 bl 80051d0 8006082: 1b80 subs r0, r0, r6 8006084: 2864 cmp r0, #100 ; 0x64 8006086: d9f7 bls.n 8006078 8006088: e7e8 b.n 800605c __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800608a: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 800608e: 6823 ldr r3, [r4, #0] 8006090: d103 bne.n 800609a 8006092: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8006096: 6023 str r3, [r4, #0] 8006098: e7d1 b.n 800603e 800609a: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800609e: 6023 str r3, [r4, #0] 80060a0: 6823 ldr r3, [r4, #0] 80060a2: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80060a6: e7cd b.n 8006044 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80060a8: 4c67 ldr r4, [pc, #412] ; (8006248 ) 80060aa: 6863 ldr r3, [r4, #4] 80060ac: f013 0f0c tst.w r3, #12 80060b0: d007 beq.n 80060c2 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80060b2: 6863 ldr r3, [r4, #4] 80060b4: f003 030c and.w r3, r3, #12 80060b8: 2b08 cmp r3, #8 80060ba: d110 bne.n 80060de 80060bc: 6863 ldr r3, [r4, #4] 80060be: 03da lsls r2, r3, #15 80060c0: d40d bmi.n 80060de if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80060c2: 6823 ldr r3, [r4, #0] 80060c4: 079b lsls r3, r3, #30 80060c6: d502 bpl.n 80060ce 80060c8: 692b ldr r3, [r5, #16] 80060ca: 2b01 cmp r3, #1 80060cc: d1af bne.n 800602e __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80060ce: 6823 ldr r3, [r4, #0] 80060d0: 696a ldr r2, [r5, #20] 80060d2: f023 03f8 bic.w r3, r3, #248 ; 0xf8 80060d6: ea43 03c2 orr.w r3, r3, r2, lsl #3 80060da: 6023 str r3, [r4, #0] 80060dc: e785 b.n 8005fea if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80060de: 692a ldr r2, [r5, #16] 80060e0: 4b5a ldr r3, [pc, #360] ; (800624c ) 80060e2: b16a cbz r2, 8006100 __HAL_RCC_HSI_ENABLE(); 80060e4: 2201 movs r2, #1 80060e6: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80060e8: f7ff f872 bl 80051d0 80060ec: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80060ee: 6823 ldr r3, [r4, #0] 80060f0: 079f lsls r7, r3, #30 80060f2: d4ec bmi.n 80060ce if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80060f4: f7ff f86c bl 80051d0 80060f8: 1b80 subs r0, r0, r6 80060fa: 2802 cmp r0, #2 80060fc: d9f7 bls.n 80060ee 80060fe: e7ad b.n 800605c __HAL_RCC_HSI_DISABLE(); 8006100: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8006102: f7ff f865 bl 80051d0 8006106: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8006108: 6823 ldr r3, [r4, #0] 800610a: 0798 lsls r0, r3, #30 800610c: f57f af6d bpl.w 8005fea if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8006110: f7ff f85e bl 80051d0 8006114: 1b80 subs r0, r0, r6 8006116: 2802 cmp r0, #2 8006118: d9f6 bls.n 8006108 800611a: e79f b.n 800605c if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 800611c: 69aa ldr r2, [r5, #24] 800611e: 4c4a ldr r4, [pc, #296] ; (8006248 ) 8006120: 4b4b ldr r3, [pc, #300] ; (8006250 ) 8006122: b1da cbz r2, 800615c __HAL_RCC_LSI_ENABLE(); 8006124: 2201 movs r2, #1 8006126: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8006128: f7ff f852 bl 80051d0 800612c: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800612e: 6a63 ldr r3, [r4, #36] ; 0x24 8006130: 079b lsls r3, r3, #30 8006132: d50d bpl.n 8006150 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8006134: f44f 52fa mov.w r2, #8000 ; 0x1f40 8006138: 4b46 ldr r3, [pc, #280] ; (8006254 ) 800613a: 681b ldr r3, [r3, #0] 800613c: fbb3 f3f2 udiv r3, r3, r2 8006140: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8006142: bf00 nop do { __NOP(); } while (Delay --); 8006144: 9b01 ldr r3, [sp, #4] 8006146: 1e5a subs r2, r3, #1 8006148: 9201 str r2, [sp, #4] 800614a: 2b00 cmp r3, #0 800614c: d1f9 bne.n 8006142 800614e: e750 b.n 8005ff2 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8006150: f7ff f83e bl 80051d0 8006154: 1b80 subs r0, r0, r6 8006156: 2802 cmp r0, #2 8006158: d9e9 bls.n 800612e 800615a: e77f b.n 800605c __HAL_RCC_LSI_DISABLE(); 800615c: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 800615e: f7ff f837 bl 80051d0 8006162: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8006164: 6a63 ldr r3, [r4, #36] ; 0x24 8006166: 079f lsls r7, r3, #30 8006168: f57f af43 bpl.w 8005ff2 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 800616c: f7ff f830 bl 80051d0 8006170: 1b80 subs r0, r0, r6 8006172: 2802 cmp r0, #2 8006174: d9f6 bls.n 8006164 8006176: e771 b.n 800605c if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8006178: 4c33 ldr r4, [pc, #204] ; (8006248 ) 800617a: 69e3 ldr r3, [r4, #28] 800617c: 00d8 lsls r0, r3, #3 800617e: d424 bmi.n 80061ca pwrclkchanged = SET; 8006180: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8006182: 69e3 ldr r3, [r4, #28] 8006184: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8006188: 61e3 str r3, [r4, #28] 800618a: 69e3 ldr r3, [r4, #28] 800618c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8006190: 9300 str r3, [sp, #0] 8006192: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8006194: 4e30 ldr r6, [pc, #192] ; (8006258 ) 8006196: 6833 ldr r3, [r6, #0] 8006198: 05d9 lsls r1, r3, #23 800619a: d518 bpl.n 80061ce __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 800619c: 68eb ldr r3, [r5, #12] 800619e: 2b01 cmp r3, #1 80061a0: d126 bne.n 80061f0 80061a2: 6a23 ldr r3, [r4, #32] 80061a4: f043 0301 orr.w r3, r3, #1 80061a8: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 80061aa: f7ff f811 bl 80051d0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80061ae: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 80061b2: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80061b4: 6a23 ldr r3, [r4, #32] 80061b6: 079b lsls r3, r3, #30 80061b8: d53f bpl.n 800623a if(pwrclkchanged == SET) 80061ba: 2f00 cmp r7, #0 80061bc: f43f af1d beq.w 8005ffa __HAL_RCC_PWR_CLK_DISABLE(); 80061c0: 69e3 ldr r3, [r4, #28] 80061c2: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 80061c6: 61e3 str r3, [r4, #28] 80061c8: e717 b.n 8005ffa FlagStatus pwrclkchanged = RESET; 80061ca: 2700 movs r7, #0 80061cc: e7e2 b.n 8006194 SET_BIT(PWR->CR, PWR_CR_DBP); 80061ce: 6833 ldr r3, [r6, #0] 80061d0: f443 7380 orr.w r3, r3, #256 ; 0x100 80061d4: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 80061d6: f7fe fffb bl 80051d0 80061da: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80061dc: 6833 ldr r3, [r6, #0] 80061de: 05da lsls r2, r3, #23 80061e0: d4dc bmi.n 800619c if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80061e2: f7fe fff5 bl 80051d0 80061e6: eba0 0008 sub.w r0, r0, r8 80061ea: 2864 cmp r0, #100 ; 0x64 80061ec: d9f6 bls.n 80061dc 80061ee: e735 b.n 800605c __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80061f0: b9ab cbnz r3, 800621e 80061f2: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80061f4: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80061f8: f023 0301 bic.w r3, r3, #1 80061fc: 6223 str r3, [r4, #32] 80061fe: 6a23 ldr r3, [r4, #32] 8006200: f023 0304 bic.w r3, r3, #4 8006204: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8006206: f7fe ffe3 bl 80051d0 800620a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 800620c: 6a23 ldr r3, [r4, #32] 800620e: 0798 lsls r0, r3, #30 8006210: d5d3 bpl.n 80061ba if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8006212: f7fe ffdd bl 80051d0 8006216: 1b80 subs r0, r0, r6 8006218: 4540 cmp r0, r8 800621a: d9f7 bls.n 800620c 800621c: e71e b.n 800605c __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 800621e: 2b05 cmp r3, #5 8006220: 6a23 ldr r3, [r4, #32] 8006222: d103 bne.n 800622c 8006224: f043 0304 orr.w r3, r3, #4 8006228: 6223 str r3, [r4, #32] 800622a: e7ba b.n 80061a2 800622c: f023 0301 bic.w r3, r3, #1 8006230: 6223 str r3, [r4, #32] 8006232: 6a23 ldr r3, [r4, #32] 8006234: f023 0304 bic.w r3, r3, #4 8006238: e7b6 b.n 80061a8 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 800623a: f7fe ffc9 bl 80051d0 800623e: eba0 0008 sub.w r0, r0, r8 8006242: 42b0 cmp r0, r6 8006244: d9b6 bls.n 80061b4 8006246: e709 b.n 800605c 8006248: 40021000 .word 0x40021000 800624c: 42420000 .word 0x42420000 8006250: 42420480 .word 0x42420480 8006254: 20000218 .word 0x20000218 8006258: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 800625c: 4c22 ldr r4, [pc, #136] ; (80062e8 ) 800625e: 6863 ldr r3, [r4, #4] 8006260: f003 030c and.w r3, r3, #12 8006264: 2b08 cmp r3, #8 8006266: f43f aee2 beq.w 800602e 800626a: 2300 movs r3, #0 800626c: 4e1f ldr r6, [pc, #124] ; (80062ec ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 800626e: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8006270: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8006272: d12b bne.n 80062cc tickstart = HAL_GetTick(); 8006274: f7fe ffac bl 80051d0 8006278: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800627a: 6823 ldr r3, [r4, #0] 800627c: 0199 lsls r1, r3, #6 800627e: d41f bmi.n 80062c0 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8006280: 6a2b ldr r3, [r5, #32] 8006282: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8006286: d105 bne.n 8006294 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8006288: 6862 ldr r2, [r4, #4] 800628a: 68a9 ldr r1, [r5, #8] 800628c: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8006290: 430a orrs r2, r1 8006292: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8006294: 6a69 ldr r1, [r5, #36] ; 0x24 8006296: 6862 ldr r2, [r4, #4] 8006298: 430b orrs r3, r1 800629a: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 800629e: 4313 orrs r3, r2 80062a0: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 80062a2: 2301 movs r3, #1 80062a4: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 80062a6: f7fe ff93 bl 80051d0 80062aa: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80062ac: 6823 ldr r3, [r4, #0] 80062ae: 019a lsls r2, r3, #6 80062b0: f53f aea7 bmi.w 8006002 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 80062b4: f7fe ff8c bl 80051d0 80062b8: 1b40 subs r0, r0, r5 80062ba: 2802 cmp r0, #2 80062bc: d9f6 bls.n 80062ac 80062be: e6cd b.n 800605c if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 80062c0: f7fe ff86 bl 80051d0 80062c4: 1bc0 subs r0, r0, r7 80062c6: 2802 cmp r0, #2 80062c8: d9d7 bls.n 800627a 80062ca: e6c7 b.n 800605c tickstart = HAL_GetTick(); 80062cc: f7fe ff80 bl 80051d0 80062d0: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80062d2: 6823 ldr r3, [r4, #0] 80062d4: 019b lsls r3, r3, #6 80062d6: f57f ae94 bpl.w 8006002 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 80062da: f7fe ff79 bl 80051d0 80062de: 1b40 subs r0, r0, r5 80062e0: 2802 cmp r0, #2 80062e2: d9f6 bls.n 80062d2 80062e4: e6ba b.n 800605c 80062e6: bf00 nop 80062e8: 40021000 .word 0x40021000 80062ec: 42420060 .word 0x42420060 080062f0 : { 80062f0: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 80062f2: 4b19 ldr r3, [pc, #100] ; (8006358 ) { 80062f4: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 80062f6: ac02 add r4, sp, #8 80062f8: f103 0510 add.w r5, r3, #16 80062fc: 4622 mov r2, r4 80062fe: 6818 ldr r0, [r3, #0] 8006300: 6859 ldr r1, [r3, #4] 8006302: 3308 adds r3, #8 8006304: c203 stmia r2!, {r0, r1} 8006306: 42ab cmp r3, r5 8006308: 4614 mov r4, r2 800630a: d1f7 bne.n 80062fc const uint8_t aPredivFactorTable[2] = {1, 2}; 800630c: 2301 movs r3, #1 800630e: f88d 3004 strb.w r3, [sp, #4] 8006312: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8006314: 4911 ldr r1, [pc, #68] ; (800635c ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8006316: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 800631a: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 800631c: f003 020c and.w r2, r3, #12 8006320: 2a08 cmp r2, #8 8006322: d117 bne.n 8006354 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8006324: f3c3 4283 ubfx r2, r3, #18, #4 8006328: a806 add r0, sp, #24 800632a: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 800632c: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 800632e: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8006332: d50c bpl.n 800634e prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8006334: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8006336: 480a ldr r0, [pc, #40] ; (8006360 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8006338: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 800633c: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 800633e: aa06 add r2, sp, #24 8006340: 4413 add r3, r2 8006342: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8006346: fbb0 f0f3 udiv r0, r0, r3 } 800634a: b007 add sp, #28 800634c: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 800634e: 4805 ldr r0, [pc, #20] ; (8006364 ) 8006350: 4350 muls r0, r2 8006352: e7fa b.n 800634a sysclockfreq = HSE_VALUE; 8006354: 4802 ldr r0, [pc, #8] ; (8006360 ) return sysclockfreq; 8006356: e7f8 b.n 800634a 8006358: 0800bc38 .word 0x0800bc38 800635c: 40021000 .word 0x40021000 8006360: 007a1200 .word 0x007a1200 8006364: 003d0900 .word 0x003d0900 08006368 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8006368: 4a54 ldr r2, [pc, #336] ; (80064bc ) { 800636a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800636e: 6813 ldr r3, [r2, #0] { 8006370: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8006372: f003 0307 and.w r3, r3, #7 8006376: 428b cmp r3, r1 { 8006378: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800637a: d32a bcc.n 80063d2 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 800637c: 6829 ldr r1, [r5, #0] 800637e: 078c lsls r4, r1, #30 8006380: d434 bmi.n 80063ec if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8006382: 07ca lsls r2, r1, #31 8006384: d447 bmi.n 8006416 if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8006386: 4a4d ldr r2, [pc, #308] ; (80064bc ) 8006388: 6813 ldr r3, [r2, #0] 800638a: f003 0307 and.w r3, r3, #7 800638e: 429e cmp r6, r3 8006390: f0c0 8082 bcc.w 8006498 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8006394: 682a ldr r2, [r5, #0] 8006396: 4c4a ldr r4, [pc, #296] ; (80064c0 ) 8006398: f012 0f04 tst.w r2, #4 800639c: f040 8087 bne.w 80064ae if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80063a0: 0713 lsls r3, r2, #28 80063a2: d506 bpl.n 80063b2 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 80063a4: 6863 ldr r3, [r4, #4] 80063a6: 692a ldr r2, [r5, #16] 80063a8: f423 5360 bic.w r3, r3, #14336 ; 0x3800 80063ac: ea43 03c2 orr.w r3, r3, r2, lsl #3 80063b0: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 80063b2: f7ff ff9d bl 80062f0 80063b6: 6863 ldr r3, [r4, #4] 80063b8: 4a42 ldr r2, [pc, #264] ; (80064c4 ) 80063ba: f3c3 1303 ubfx r3, r3, #4, #4 80063be: 5cd3 ldrb r3, [r2, r3] 80063c0: 40d8 lsrs r0, r3 80063c2: 4b41 ldr r3, [pc, #260] ; (80064c8 ) 80063c4: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 80063c6: 2000 movs r0, #0 80063c8: f7fe fec0 bl 800514c return HAL_OK; 80063cc: 2000 movs r0, #0 } 80063ce: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 80063d2: 6813 ldr r3, [r2, #0] 80063d4: f023 0307 bic.w r3, r3, #7 80063d8: 430b orrs r3, r1 80063da: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 80063dc: 6813 ldr r3, [r2, #0] 80063de: f003 0307 and.w r3, r3, #7 80063e2: 4299 cmp r1, r3 80063e4: d0ca beq.n 800637c return HAL_ERROR; 80063e6: 2001 movs r0, #1 80063e8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80063ec: 4b34 ldr r3, [pc, #208] ; (80064c0 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80063ee: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 80063f2: bf1e ittt ne 80063f4: 685a ldrne r2, [r3, #4] 80063f6: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 80063fa: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80063fc: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80063fe: bf42 ittt mi 8006400: 685a ldrmi r2, [r3, #4] 8006402: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8006406: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8006408: 685a ldr r2, [r3, #4] 800640a: 68a8 ldr r0, [r5, #8] 800640c: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8006410: 4302 orrs r2, r0 8006412: 605a str r2, [r3, #4] 8006414: e7b5 b.n 8006382 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8006416: 686a ldr r2, [r5, #4] 8006418: 4c29 ldr r4, [pc, #164] ; (80064c0 ) 800641a: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800641c: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800641e: d11c bne.n 800645a if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8006420: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8006424: d0df beq.n 80063e6 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8006426: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8006428: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 800642c: f023 0303 bic.w r3, r3, #3 8006430: 4313 orrs r3, r2 8006432: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8006434: f7fe fecc bl 80051d0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8006438: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 800643a: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800643c: 2b01 cmp r3, #1 800643e: d114 bne.n 800646a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8006440: 6863 ldr r3, [r4, #4] 8006442: f003 030c and.w r3, r3, #12 8006446: 2b04 cmp r3, #4 8006448: d09d beq.n 8006386 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 800644a: f7fe fec1 bl 80051d0 800644e: 1bc0 subs r0, r0, r7 8006450: 4540 cmp r0, r8 8006452: d9f5 bls.n 8006440 return HAL_TIMEOUT; 8006454: 2003 movs r0, #3 8006456: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 800645a: 2a02 cmp r2, #2 800645c: d102 bne.n 8006464 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 800645e: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8006462: e7df b.n 8006424 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8006464: f013 0f02 tst.w r3, #2 8006468: e7dc b.n 8006424 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 800646a: 2b02 cmp r3, #2 800646c: d10f bne.n 800648e while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 800646e: 6863 ldr r3, [r4, #4] 8006470: f003 030c and.w r3, r3, #12 8006474: 2b08 cmp r3, #8 8006476: d086 beq.n 8006386 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8006478: f7fe feaa bl 80051d0 800647c: 1bc0 subs r0, r0, r7 800647e: 4540 cmp r0, r8 8006480: d9f5 bls.n 800646e 8006482: e7e7 b.n 8006454 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8006484: f7fe fea4 bl 80051d0 8006488: 1bc0 subs r0, r0, r7 800648a: 4540 cmp r0, r8 800648c: d8e2 bhi.n 8006454 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 800648e: 6863 ldr r3, [r4, #4] 8006490: f013 0f0c tst.w r3, #12 8006494: d1f6 bne.n 8006484 8006496: e776 b.n 8006386 __HAL_FLASH_SET_LATENCY(FLatency); 8006498: 6813 ldr r3, [r2, #0] 800649a: f023 0307 bic.w r3, r3, #7 800649e: 4333 orrs r3, r6 80064a0: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 80064a2: 6813 ldr r3, [r2, #0] 80064a4: f003 0307 and.w r3, r3, #7 80064a8: 429e cmp r6, r3 80064aa: d19c bne.n 80063e6 80064ac: e772 b.n 8006394 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 80064ae: 6863 ldr r3, [r4, #4] 80064b0: 68e9 ldr r1, [r5, #12] 80064b2: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80064b6: 430b orrs r3, r1 80064b8: 6063 str r3, [r4, #4] 80064ba: e771 b.n 80063a0 80064bc: 40022000 .word 0x40022000 80064c0: 40021000 .word 0x40021000 80064c4: 0800bcf2 .word 0x0800bcf2 80064c8: 20000218 .word 0x20000218 080064cc : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 80064cc: 4b04 ldr r3, [pc, #16] ; (80064e0 ) 80064ce: 4a05 ldr r2, [pc, #20] ; (80064e4 ) 80064d0: 685b ldr r3, [r3, #4] 80064d2: f3c3 2302 ubfx r3, r3, #8, #3 80064d6: 5cd3 ldrb r3, [r2, r3] 80064d8: 4a03 ldr r2, [pc, #12] ; (80064e8 ) 80064da: 6810 ldr r0, [r2, #0] } 80064dc: 40d8 lsrs r0, r3 80064de: 4770 bx lr 80064e0: 40021000 .word 0x40021000 80064e4: 0800bd02 .word 0x0800bd02 80064e8: 20000218 .word 0x20000218 080064ec : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 80064ec: 4b04 ldr r3, [pc, #16] ; (8006500 ) 80064ee: 4a05 ldr r2, [pc, #20] ; (8006504 ) 80064f0: 685b ldr r3, [r3, #4] 80064f2: f3c3 23c2 ubfx r3, r3, #11, #3 80064f6: 5cd3 ldrb r3, [r2, r3] 80064f8: 4a03 ldr r2, [pc, #12] ; (8006508 ) 80064fa: 6810 ldr r0, [r2, #0] } 80064fc: 40d8 lsrs r0, r3 80064fe: 4770 bx lr 8006500: 40021000 .word 0x40021000 8006504: 0800bd02 .word 0x0800bd02 8006508: 20000218 .word 0x20000218 0800650c : /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 800650c: 6803 ldr r3, [r0, #0] { 800650e: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8006512: 07d9 lsls r1, r3, #31 { 8006514: 4605 mov r5, r0 if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8006516: d520 bpl.n 800655a FlagStatus pwrclkchanged = RESET; /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8006518: 4c35 ldr r4, [pc, #212] ; (80065f0 ) 800651a: 69e3 ldr r3, [r4, #28] 800651c: 00da lsls r2, r3, #3 800651e: d432 bmi.n 8006586 { __HAL_RCC_PWR_CLK_ENABLE(); pwrclkchanged = SET; 8006520: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8006522: 69e3 ldr r3, [r4, #28] 8006524: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8006528: 61e3 str r3, [r4, #28] 800652a: 69e3 ldr r3, [r4, #28] 800652c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8006530: 9301 str r3, [sp, #4] 8006532: 9b01 ldr r3, [sp, #4] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8006534: 4e2f ldr r6, [pc, #188] ; (80065f4 ) 8006536: 6833 ldr r3, [r6, #0] 8006538: 05db lsls r3, r3, #23 800653a: d526 bpl.n 800658a } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 800653c: 6a23 ldr r3, [r4, #32] if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 800653e: f413 7340 ands.w r3, r3, #768 ; 0x300 8006542: d136 bne.n 80065b2 return HAL_TIMEOUT; } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8006544: 6a23 ldr r3, [r4, #32] 8006546: 686a ldr r2, [r5, #4] 8006548: f423 7340 bic.w r3, r3, #768 ; 0x300 800654c: 4313 orrs r3, r2 800654e: 6223 str r3, [r4, #32] /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) 8006550: b11f cbz r7, 800655a { __HAL_RCC_PWR_CLK_DISABLE(); 8006552: 69e3 ldr r3, [r4, #28] 8006554: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8006558: 61e3 str r3, [r4, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 800655a: 6828 ldr r0, [r5, #0] 800655c: 0783 lsls r3, r0, #30 800655e: d506 bpl.n 800656e { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8006560: 4a23 ldr r2, [pc, #140] ; (80065f0 ) 8006562: 68a9 ldr r1, [r5, #8] 8006564: 6853 ldr r3, [r2, #4] 8006566: f423 4340 bic.w r3, r3, #49152 ; 0xc000 800656a: 430b orrs r3, r1 800656c: 6053 str r3, [r2, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 800656e: f010 0010 ands.w r0, r0, #16 8006572: d01b beq.n 80065ac { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8006574: 4a1e ldr r2, [pc, #120] ; (80065f0 ) 8006576: 6969 ldr r1, [r5, #20] 8006578: 6853 ldr r3, [r2, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 800657a: 2000 movs r0, #0 __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 800657c: f423 0380 bic.w r3, r3, #4194304 ; 0x400000 8006580: 430b orrs r3, r1 8006582: 6053 str r3, [r2, #4] 8006584: e012 b.n 80065ac FlagStatus pwrclkchanged = RESET; 8006586: 2700 movs r7, #0 8006588: e7d4 b.n 8006534 SET_BIT(PWR->CR, PWR_CR_DBP); 800658a: 6833 ldr r3, [r6, #0] 800658c: f443 7380 orr.w r3, r3, #256 ; 0x100 8006590: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8006592: f7fe fe1d bl 80051d0 8006596: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8006598: 6833 ldr r3, [r6, #0] 800659a: 05d8 lsls r0, r3, #23 800659c: d4ce bmi.n 800653c if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800659e: f7fe fe17 bl 80051d0 80065a2: eba0 0008 sub.w r0, r0, r8 80065a6: 2864 cmp r0, #100 ; 0x64 80065a8: d9f6 bls.n 8006598 return HAL_TIMEOUT; 80065aa: 2003 movs r0, #3 } 80065ac: b002 add sp, #8 80065ae: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 80065b2: 686a ldr r2, [r5, #4] 80065b4: f402 7240 and.w r2, r2, #768 ; 0x300 80065b8: 4293 cmp r3, r2 80065ba: d0c3 beq.n 8006544 __HAL_RCC_BACKUPRESET_FORCE(); 80065bc: 2001 movs r0, #1 80065be: 4a0e ldr r2, [pc, #56] ; (80065f8 ) temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 80065c0: 6a23 ldr r3, [r4, #32] __HAL_RCC_BACKUPRESET_FORCE(); 80065c2: 6010 str r0, [r2, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 80065c4: 2000 movs r0, #0 temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 80065c6: f423 7140 bic.w r1, r3, #768 ; 0x300 __HAL_RCC_BACKUPRESET_RELEASE(); 80065ca: 6010 str r0, [r2, #0] RCC->BDCR = temp_reg; 80065cc: 6221 str r1, [r4, #32] if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 80065ce: 07d9 lsls r1, r3, #31 80065d0: d5b8 bpl.n 8006544 tickstart = HAL_GetTick(); 80065d2: f7fe fdfd bl 80051d0 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80065d6: f241 3888 movw r8, #5000 ; 0x1388 tickstart = HAL_GetTick(); 80065da: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80065dc: 6a23 ldr r3, [r4, #32] 80065de: 079a lsls r2, r3, #30 80065e0: d4b0 bmi.n 8006544 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80065e2: f7fe fdf5 bl 80051d0 80065e6: 1b80 subs r0, r0, r6 80065e8: 4540 cmp r0, r8 80065ea: d9f7 bls.n 80065dc 80065ec: e7dd b.n 80065aa 80065ee: bf00 nop 80065f0: 40021000 .word 0x40021000 80065f4: 40007000 .word 0x40007000 80065f8: 42420440 .word 0x42420440 080065fc : * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock @endif * @retval Frequency in Hz (0: means that no available frequency for the peripheral) */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { 80065fc: 4602 mov r2, r0 80065fe: b570 push {r4, r5, r6, lr} uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; #endif /* STM32F105xC || STM32F107xC */ #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || \ defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8006600: 4b3b ldr r3, [pc, #236] ; (80066f0 ) { 8006602: b086 sub sp, #24 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8006604: ad02 add r5, sp, #8 8006606: f103 0610 add.w r6, r3, #16 800660a: 462c mov r4, r5 800660c: 6818 ldr r0, [r3, #0] 800660e: 6859 ldr r1, [r3, #4] 8006610: 3308 adds r3, #8 8006612: c403 stmia r4!, {r0, r1} 8006614: 42b3 cmp r3, r6 8006616: 4625 mov r5, r4 8006618: d1f7 bne.n 800660a const uint8_t aPredivFactorTable[2] = {1, 2}; 800661a: 2301 movs r3, #1 800661c: f88d 3004 strb.w r3, [sp, #4] 8006620: 2302 movs r3, #2 uint32_t temp_reg = 0U, frequency = 0U; /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); switch (PeriphClk) 8006622: 1e50 subs r0, r2, #1 const uint8_t aPredivFactorTable[2] = {1, 2}; 8006624: f88d 3005 strb.w r3, [sp, #5] switch (PeriphClk) 8006628: 280f cmp r0, #15 800662a: d85e bhi.n 80066ea 800662c: e8df f000 tbb [pc, r0] 8006630: 2d5d5132 .word 0x2d5d5132 8006634: 2d5d5d5d .word 0x2d5d5d5d 8006638: 5d5d5d5d .word 0x5d5d5d5d 800663c: 085d5d5d .word 0x085d5d5d || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) case RCC_PERIPHCLK_USB: { /* Get RCC configuration ------------------------------------------------------*/ temp_reg = RCC->CFGR; 8006640: 4b2c ldr r3, [pc, #176] ; (80066f4 ) 8006642: 6859 ldr r1, [r3, #4] /* Check if PLL is enabled */ if (HAL_IS_BIT_SET(RCC->CR,RCC_CR_PLLON)) 8006644: 6818 ldr r0, [r3, #0] 8006646: f010 7080 ands.w r0, r0, #16777216 ; 0x1000000 800664a: d037 beq.n 80066bc { pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 800664c: f3c1 4283 ubfx r2, r1, #18, #4 8006650: a806 add r0, sp, #24 8006652: 4402 add r2, r0 8006654: f812 0c10 ldrb.w r0, [r2, #-16] if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8006658: 03ca lsls r2, r1, #15 { #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ || defined(STM32F100xE) prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 800665a: bf41 itttt mi 800665c: 685a ldrmi r2, [r3, #4] 800665e: a906 addmi r1, sp, #24 8006660: f3c2 4240 ubfxmi r2, r2, #17, #1 8006664: 1852 addmi r2, r2, r1 8006666: bf44 itt mi 8006668: f812 1c14 ldrbmi.w r1, [r2, #-20] } #else if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 800666c: 4a22 ldrmi r2, [pc, #136] ; (80066f8 ) /* Prescaler of 3 selected for USB */ frequency = (2 * pllclk) / 3; } #else /* USBCLK = PLLCLK / USB prescaler */ if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) 800666e: 685b ldr r3, [r3, #4] pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 8006670: bf4c ite mi 8006672: fbb2 f2f1 udivmi r2, r2, r1 pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8006676: 4a21 ldrpl r2, [pc, #132] ; (80066fc ) if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) 8006678: 025b lsls r3, r3, #9 pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 800667a: fb02 f000 mul.w r0, r2, r0 if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) 800667e: d41d bmi.n 80066bc frequency = pllclk; } else { /* Prescaler of 1.5 selected for USB */ frequency = (pllclk * 2) / 3; 8006680: 2303 movs r3, #3 8006682: 0040 lsls r0, r0, #1 } break; } case RCC_PERIPHCLK_ADC: { frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 8006684: fbb0 f0f3 udiv r0, r0, r3 break; 8006688: e018 b.n 80066bc { break; } } return(frequency); } 800668a: b006 add sp, #24 800668c: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} frequency = HAL_RCC_GetSysClockFreq(); 8006690: f7ff be2e b.w 80062f0 if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 8006694: f240 3102 movw r1, #770 ; 0x302 temp_reg = RCC->BDCR; 8006698: 4a16 ldr r2, [pc, #88] ; (80066f4 ) 800669a: 6a13 ldr r3, [r2, #32] if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 800669c: 4019 ands r1, r3 800669e: f5b1 7f81 cmp.w r1, #258 ; 0x102 80066a2: d01f beq.n 80066e4 else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 80066a4: f403 7340 and.w r3, r3, #768 ; 0x300 80066a8: f5b3 7f00 cmp.w r3, #512 ; 0x200 80066ac: d108 bne.n 80066c0 frequency = LSI_VALUE; 80066ae: f649 4040 movw r0, #40000 ; 0x9c40 else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 80066b2: 6a53 ldr r3, [r2, #36] ; 0x24 frequency = LSI_VALUE; 80066b4: f013 0f02 tst.w r3, #2 frequency = HSE_VALUE / 128U; 80066b8: bf08 it eq 80066ba: 2000 moveq r0, #0 } 80066bc: b006 add sp, #24 80066be: bd70 pop {r4, r5, r6, pc} else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) 80066c0: f5b3 7f40 cmp.w r3, #768 ; 0x300 80066c4: d111 bne.n 80066ea 80066c6: 6813 ldr r3, [r2, #0] frequency = HSE_VALUE / 128U; 80066c8: f24f 4024 movw r0, #62500 ; 0xf424 80066cc: f413 3f00 tst.w r3, #131072 ; 0x20000 80066d0: e7f2 b.n 80066b8 frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 80066d2: f7ff ff0b bl 80064ec 80066d6: 4b07 ldr r3, [pc, #28] ; (80066f4 ) 80066d8: 685b ldr r3, [r3, #4] 80066da: f3c3 3381 ubfx r3, r3, #14, #2 80066de: 3301 adds r3, #1 80066e0: 005b lsls r3, r3, #1 80066e2: e7cf b.n 8006684 frequency = LSE_VALUE; 80066e4: f44f 4000 mov.w r0, #32768 ; 0x8000 80066e8: e7e8 b.n 80066bc frequency = 0U; 80066ea: 2000 movs r0, #0 80066ec: e7e6 b.n 80066bc 80066ee: bf00 nop 80066f0: 0800bc48 .word 0x0800bc48 80066f4: 40021000 .word 0x40021000 80066f8: 007a1200 .word 0x007a1200 80066fc: 003d0900 .word 0x003d0900 08006700 : 8006700: 4770 bx lr 08006702 : 8006702: 4770 bx lr 08006704 : 8006704: 4770 bx lr 08006706 : 8006706: 4770 bx lr 08006708 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8006708: 6803 ldr r3, [r0, #0] { 800670a: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 800670c: 691a ldr r2, [r3, #16] { 800670e: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8006710: 0791 lsls r1, r2, #30 8006712: d50e bpl.n 8006732 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 8006714: 68da ldr r2, [r3, #12] 8006716: 0792 lsls r2, r2, #30 8006718: d50b bpl.n 8006732 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 800671a: f06f 0202 mvn.w r2, #2 800671e: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8006720: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8006722: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8006724: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8006726: 079b lsls r3, r3, #30 8006728: d077 beq.n 800681a { HAL_TIM_IC_CaptureCallback(htim); 800672a: f7ff ffea bl 8006702 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800672e: 2300 movs r3, #0 8006730: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8006732: 6823 ldr r3, [r4, #0] 8006734: 691a ldr r2, [r3, #16] 8006736: 0750 lsls r0, r2, #29 8006738: d510 bpl.n 800675c { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 800673a: 68da ldr r2, [r3, #12] 800673c: 0751 lsls r1, r2, #29 800673e: d50d bpl.n 800675c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8006740: f06f 0204 mvn.w r2, #4 8006744: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8006746: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8006748: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 800674a: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 800674c: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8006750: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8006752: d068 beq.n 8006826 HAL_TIM_IC_CaptureCallback(htim); 8006754: f7ff ffd5 bl 8006702 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8006758: 2300 movs r3, #0 800675a: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 800675c: 6823 ldr r3, [r4, #0] 800675e: 691a ldr r2, [r3, #16] 8006760: 0712 lsls r2, r2, #28 8006762: d50f bpl.n 8006784 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8006764: 68da ldr r2, [r3, #12] 8006766: 0710 lsls r0, r2, #28 8006768: d50c bpl.n 8006784 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 800676a: f06f 0208 mvn.w r2, #8 800676e: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8006770: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8006772: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8006774: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8006776: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8006778: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800677a: d05a beq.n 8006832 HAL_TIM_IC_CaptureCallback(htim); 800677c: f7ff ffc1 bl 8006702 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8006780: 2300 movs r3, #0 8006782: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8006784: 6823 ldr r3, [r4, #0] 8006786: 691a ldr r2, [r3, #16] 8006788: 06d2 lsls r2, r2, #27 800678a: d510 bpl.n 80067ae { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 800678c: 68da ldr r2, [r3, #12] 800678e: 06d0 lsls r0, r2, #27 8006790: d50d bpl.n 80067ae { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8006792: f06f 0210 mvn.w r2, #16 8006796: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8006798: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800679a: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 800679c: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800679e: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 80067a2: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 80067a4: d04b beq.n 800683e HAL_TIM_IC_CaptureCallback(htim); 80067a6: f7ff ffac bl 8006702 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80067aa: 2300 movs r3, #0 80067ac: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 80067ae: 6823 ldr r3, [r4, #0] 80067b0: 691a ldr r2, [r3, #16] 80067b2: 07d1 lsls r1, r2, #31 80067b4: d508 bpl.n 80067c8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 80067b6: 68da ldr r2, [r3, #12] 80067b8: 07d2 lsls r2, r2, #31 80067ba: d505 bpl.n 80067c8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 80067bc: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 80067c0: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 80067c2: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 80067c4: f001 fa58 bl 8007c78 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 80067c8: 6823 ldr r3, [r4, #0] 80067ca: 691a ldr r2, [r3, #16] 80067cc: 0610 lsls r0, r2, #24 80067ce: d508 bpl.n 80067e2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 80067d0: 68da ldr r2, [r3, #12] 80067d2: 0611 lsls r1, r2, #24 80067d4: d505 bpl.n 80067e2 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80067d6: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 80067da: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80067dc: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 80067de: f000 f8be bl 800695e } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 80067e2: 6823 ldr r3, [r4, #0] 80067e4: 691a ldr r2, [r3, #16] 80067e6: 0652 lsls r2, r2, #25 80067e8: d508 bpl.n 80067fc { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 80067ea: 68da ldr r2, [r3, #12] 80067ec: 0650 lsls r0, r2, #25 80067ee: d505 bpl.n 80067fc { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80067f0: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80067f4: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80067f6: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80067f8: f7ff ff85 bl 8006706 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80067fc: 6823 ldr r3, [r4, #0] 80067fe: 691a ldr r2, [r3, #16] 8006800: 0691 lsls r1, r2, #26 8006802: d522 bpl.n 800684a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 8006804: 68da ldr r2, [r3, #12] 8006806: 0692 lsls r2, r2, #26 8006808: d51f bpl.n 800684a { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 800680a: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 800680e: 4620 mov r0, r4 } } } 8006810: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8006814: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 8006816: f000 b8a1 b.w 800695c HAL_TIM_OC_DelayElapsedCallback(htim); 800681a: f7ff ff71 bl 8006700 HAL_TIM_PWM_PulseFinishedCallback(htim); 800681e: 4620 mov r0, r4 8006820: f7ff ff70 bl 8006704 8006824: e783 b.n 800672e HAL_TIM_OC_DelayElapsedCallback(htim); 8006826: f7ff ff6b bl 8006700 HAL_TIM_PWM_PulseFinishedCallback(htim); 800682a: 4620 mov r0, r4 800682c: f7ff ff6a bl 8006704 8006830: e792 b.n 8006758 HAL_TIM_OC_DelayElapsedCallback(htim); 8006832: f7ff ff65 bl 8006700 HAL_TIM_PWM_PulseFinishedCallback(htim); 8006836: 4620 mov r0, r4 8006838: f7ff ff64 bl 8006704 800683c: e7a0 b.n 8006780 HAL_TIM_OC_DelayElapsedCallback(htim); 800683e: f7ff ff5f bl 8006700 HAL_TIM_PWM_PulseFinishedCallback(htim); 8006842: 4620 mov r0, r4 8006844: f7ff ff5e bl 8006704 8006848: e7af b.n 80067aa 800684a: bd10 pop {r4, pc} 0800684c : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 800684c: 4a24 ldr r2, [pc, #144] ; (80068e0 ) tmpcr1 = TIMx->CR1; 800684e: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8006850: 4290 cmp r0, r2 8006852: d012 beq.n 800687a 8006854: f502 6200 add.w r2, r2, #2048 ; 0x800 8006858: 4290 cmp r0, r2 800685a: d00e beq.n 800687a 800685c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8006860: d00b beq.n 800687a 8006862: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8006866: 4290 cmp r0, r2 8006868: d007 beq.n 800687a 800686a: f502 6280 add.w r2, r2, #1024 ; 0x400 800686e: 4290 cmp r0, r2 8006870: d003 beq.n 800687a 8006872: f502 6280 add.w r2, r2, #1024 ; 0x400 8006876: 4290 cmp r0, r2 8006878: d11d bne.n 80068b6 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 800687a: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 800687c: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8006880: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8006882: 4a17 ldr r2, [pc, #92] ; (80068e0 ) 8006884: 4290 cmp r0, r2 8006886: d012 beq.n 80068ae 8006888: f502 6200 add.w r2, r2, #2048 ; 0x800 800688c: 4290 cmp r0, r2 800688e: d00e beq.n 80068ae 8006890: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8006894: d00b beq.n 80068ae 8006896: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 800689a: 4290 cmp r0, r2 800689c: d007 beq.n 80068ae 800689e: f502 6280 add.w r2, r2, #1024 ; 0x400 80068a2: 4290 cmp r0, r2 80068a4: d003 beq.n 80068ae 80068a6: f502 6280 add.w r2, r2, #1024 ; 0x400 80068aa: 4290 cmp r0, r2 80068ac: d103 bne.n 80068b6 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 80068ae: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 80068b0: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 80068b4: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 80068b6: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 80068b8: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 80068bc: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 80068be: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80068c0: 688b ldr r3, [r1, #8] 80068c2: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 80068c4: 680b ldr r3, [r1, #0] 80068c6: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 80068c8: 4b05 ldr r3, [pc, #20] ; (80068e0 ) 80068ca: 4298 cmp r0, r3 80068cc: d003 beq.n 80068d6 80068ce: f503 6300 add.w r3, r3, #2048 ; 0x800 80068d2: 4298 cmp r0, r3 80068d4: d101 bne.n 80068da { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 80068d6: 690b ldr r3, [r1, #16] 80068d8: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 80068da: 2301 movs r3, #1 80068dc: 6143 str r3, [r0, #20] 80068de: 4770 bx lr 80068e0: 40012c00 .word 0x40012c00 080068e4 : { 80068e4: b510 push {r4, lr} if(htim == NULL) 80068e6: 4604 mov r4, r0 80068e8: b1a0 cbz r0, 8006914 if(htim->State == HAL_TIM_STATE_RESET) 80068ea: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 80068ee: f003 02ff and.w r2, r3, #255 ; 0xff 80068f2: b91b cbnz r3, 80068fc htim->Lock = HAL_UNLOCKED; 80068f4: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80068f8: f001 fde0 bl 80084bc htim->State= HAL_TIM_STATE_BUSY; 80068fc: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80068fe: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 8006900: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 8006904: 1d21 adds r1, r4, #4 8006906: f7ff ffa1 bl 800684c htim->State= HAL_TIM_STATE_READY; 800690a: 2301 movs r3, #1 return HAL_OK; 800690c: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 800690e: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 8006912: bd10 pop {r4, pc} return HAL_ERROR; 8006914: 2001 movs r0, #1 } 8006916: bd10 pop {r4, pc} 08006918 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 8006918: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 800691c: b510 push {r4, lr} __HAL_LOCK(htim); 800691e: 2b01 cmp r3, #1 8006920: f04f 0302 mov.w r3, #2 8006924: d018 beq.n 8006958 htim->State = HAL_TIM_STATE_BUSY; 8006926: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 800692a: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 800692c: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 800692e: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8006930: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 8006932: f022 0270 bic.w r2, r2, #112 ; 0x70 8006936: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8006938: 685a ldr r2, [r3, #4] 800693a: 4322 orrs r2, r4 800693c: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 800693e: 689a ldr r2, [r3, #8] 8006940: f022 0280 bic.w r2, r2, #128 ; 0x80 8006944: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8006946: 689a ldr r2, [r3, #8] 8006948: 430a orrs r2, r1 800694a: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 800694c: 2301 movs r3, #1 800694e: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 8006952: 2300 movs r3, #0 8006954: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8006958: 4618 mov r0, r3 return HAL_OK; } 800695a: bd10 pop {r4, pc} 0800695c : 800695c: 4770 bx lr 0800695e : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 800695e: 4770 bx lr 08006960 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8006960: 6803 ldr r3, [r0, #0] 8006962: 68da ldr r2, [r3, #12] 8006964: f422 7290 bic.w r2, r2, #288 ; 0x120 8006968: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800696a: 695a ldr r2, [r3, #20] 800696c: f022 0201 bic.w r2, r2, #1 8006970: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8006972: 2320 movs r3, #32 8006974: f880 303a strb.w r3, [r0, #58] ; 0x3a 8006978: 4770 bx lr ... 0800697c : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 800697c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8006980: 6805 ldr r5, [r0, #0] 8006982: 68c2 ldr r2, [r0, #12] 8006984: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006986: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8006988: f423 5340 bic.w r3, r3, #12288 ; 0x3000 800698c: 4313 orrs r3, r2 800698e: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006990: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 8006992: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006994: 430b orrs r3, r1 8006996: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8006998: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 800699c: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 80069a0: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 80069a2: 4313 orrs r3, r2 80069a4: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 80069a6: 696b ldr r3, [r5, #20] 80069a8: 6982 ldr r2, [r0, #24] 80069aa: f423 7340 bic.w r3, r3, #768 ; 0x300 80069ae: 4313 orrs r3, r2 80069b0: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 80069b2: 4b40 ldr r3, [pc, #256] ; (8006ab4 ) { 80069b4: 4681 mov r9, r0 if(huart->Instance == USART1) 80069b6: 429d cmp r5, r3 80069b8: f04f 0419 mov.w r4, #25 80069bc: d146 bne.n 8006a4c { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 80069be: f7ff fd95 bl 80064ec 80069c2: fb04 f300 mul.w r3, r4, r0 80069c6: f8d9 6004 ldr.w r6, [r9, #4] 80069ca: f04f 0864 mov.w r8, #100 ; 0x64 80069ce: 00b6 lsls r6, r6, #2 80069d0: fbb3 f3f6 udiv r3, r3, r6 80069d4: fbb3 f3f8 udiv r3, r3, r8 80069d8: 011e lsls r6, r3, #4 80069da: f7ff fd87 bl 80064ec 80069de: 4360 muls r0, r4 80069e0: f8d9 3004 ldr.w r3, [r9, #4] 80069e4: 009b lsls r3, r3, #2 80069e6: fbb0 f7f3 udiv r7, r0, r3 80069ea: f7ff fd7f bl 80064ec 80069ee: 4360 muls r0, r4 80069f0: f8d9 3004 ldr.w r3, [r9, #4] 80069f4: 009b lsls r3, r3, #2 80069f6: fbb0 f3f3 udiv r3, r0, r3 80069fa: fbb3 f3f8 udiv r3, r3, r8 80069fe: fb08 7313 mls r3, r8, r3, r7 8006a02: 011b lsls r3, r3, #4 8006a04: 3332 adds r3, #50 ; 0x32 8006a06: fbb3 f3f8 udiv r3, r3, r8 8006a0a: f003 07f0 and.w r7, r3, #240 ; 0xf0 8006a0e: f7ff fd6d bl 80064ec 8006a12: 4360 muls r0, r4 8006a14: f8d9 2004 ldr.w r2, [r9, #4] 8006a18: 0092 lsls r2, r2, #2 8006a1a: fbb0 faf2 udiv sl, r0, r2 8006a1e: f7ff fd65 bl 80064ec } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 8006a22: 4360 muls r0, r4 8006a24: f8d9 3004 ldr.w r3, [r9, #4] 8006a28: 009b lsls r3, r3, #2 8006a2a: fbb0 f3f3 udiv r3, r0, r3 8006a2e: fbb3 f3f8 udiv r3, r3, r8 8006a32: fb08 a313 mls r3, r8, r3, sl 8006a36: 011b lsls r3, r3, #4 8006a38: 3332 adds r3, #50 ; 0x32 8006a3a: fbb3 f3f8 udiv r3, r3, r8 8006a3e: f003 030f and.w r3, r3, #15 8006a42: 433b orrs r3, r7 8006a44: 4433 add r3, r6 8006a46: 60ab str r3, [r5, #8] 8006a48: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8006a4c: f7ff fd3e bl 80064cc 8006a50: fb04 f300 mul.w r3, r4, r0 8006a54: f8d9 6004 ldr.w r6, [r9, #4] 8006a58: f04f 0864 mov.w r8, #100 ; 0x64 8006a5c: 00b6 lsls r6, r6, #2 8006a5e: fbb3 f3f6 udiv r3, r3, r6 8006a62: fbb3 f3f8 udiv r3, r3, r8 8006a66: 011e lsls r6, r3, #4 8006a68: f7ff fd30 bl 80064cc 8006a6c: 4360 muls r0, r4 8006a6e: f8d9 3004 ldr.w r3, [r9, #4] 8006a72: 009b lsls r3, r3, #2 8006a74: fbb0 f7f3 udiv r7, r0, r3 8006a78: f7ff fd28 bl 80064cc 8006a7c: 4360 muls r0, r4 8006a7e: f8d9 3004 ldr.w r3, [r9, #4] 8006a82: 009b lsls r3, r3, #2 8006a84: fbb0 f3f3 udiv r3, r0, r3 8006a88: fbb3 f3f8 udiv r3, r3, r8 8006a8c: fb08 7313 mls r3, r8, r3, r7 8006a90: 011b lsls r3, r3, #4 8006a92: 3332 adds r3, #50 ; 0x32 8006a94: fbb3 f3f8 udiv r3, r3, r8 8006a98: f003 07f0 and.w r7, r3, #240 ; 0xf0 8006a9c: f7ff fd16 bl 80064cc 8006aa0: 4360 muls r0, r4 8006aa2: f8d9 2004 ldr.w r2, [r9, #4] 8006aa6: 0092 lsls r2, r2, #2 8006aa8: fbb0 faf2 udiv sl, r0, r2 8006aac: f7ff fd0e bl 80064cc 8006ab0: e7b7 b.n 8006a22 8006ab2: bf00 nop 8006ab4: 40013800 .word 0x40013800 08006ab8 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8006ab8: b5f8 push {r3, r4, r5, r6, r7, lr} 8006aba: 4604 mov r4, r0 8006abc: 460e mov r6, r1 8006abe: 4617 mov r7, r2 8006ac0: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8006ac2: 6821 ldr r1, [r4, #0] 8006ac4: 680b ldr r3, [r1, #0] 8006ac6: ea36 0303 bics.w r3, r6, r3 8006aca: d101 bne.n 8006ad0 return HAL_OK; 8006acc: 2000 movs r0, #0 } 8006ace: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8006ad0: 1c6b adds r3, r5, #1 8006ad2: d0f7 beq.n 8006ac4 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8006ad4: b995 cbnz r5, 8006afc CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8006ad6: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8006ad8: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8006ada: 68da ldr r2, [r3, #12] 8006adc: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8006ae0: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8006ae2: 695a ldr r2, [r3, #20] 8006ae4: f022 0201 bic.w r2, r2, #1 8006ae8: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8006aea: 2320 movs r3, #32 8006aec: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8006af0: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 8006af4: 2300 movs r3, #0 8006af6: f884 3038 strb.w r3, [r4, #56] ; 0x38 8006afa: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8006afc: f7fe fb68 bl 80051d0 8006b00: 1bc0 subs r0, r0, r7 8006b02: 4285 cmp r5, r0 8006b04: d2dd bcs.n 8006ac2 8006b06: e7e6 b.n 8006ad6 08006b08 : { 8006b08: b510 push {r4, lr} if(huart == NULL) 8006b0a: 4604 mov r4, r0 8006b0c: b340 cbz r0, 8006b60 if(huart->gState == HAL_UART_STATE_RESET) 8006b0e: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 8006b12: f003 02ff and.w r2, r3, #255 ; 0xff 8006b16: b91b cbnz r3, 8006b20 huart->Lock = HAL_UNLOCKED; 8006b18: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8006b1c: f001 fce2 bl 80084e4 huart->gState = HAL_UART_STATE_BUSY; 8006b20: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 8006b22: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8006b24: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8006b28: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8006b2a: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8006b2c: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8006b30: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 8006b32: f7ff ff23 bl 800697c CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8006b36: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8006b38: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8006b3a: 691a ldr r2, [r3, #16] 8006b3c: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8006b40: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8006b42: 695a ldr r2, [r3, #20] 8006b44: f022 022a bic.w r2, r2, #42 ; 0x2a 8006b48: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8006b4a: 68da ldr r2, [r3, #12] 8006b4c: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8006b50: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8006b52: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006b54: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8006b56: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 8006b5a: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 8006b5e: bd10 pop {r4, pc} return HAL_ERROR; 8006b60: 2001 movs r0, #1 } 8006b62: bd10 pop {r4, pc} 08006b64 : { 8006b64: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8006b68: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 8006b6a: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 8006b6e: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8006b70: 2b20 cmp r3, #32 { 8006b72: 460d mov r5, r1 8006b74: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8006b76: d14e bne.n 8006c16 if((pData == NULL) || (Size == 0U)) 8006b78: 2900 cmp r1, #0 8006b7a: d049 beq.n 8006c10 8006b7c: 2a00 cmp r2, #0 8006b7e: d047 beq.n 8006c10 __HAL_LOCK(huart); 8006b80: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8006b84: 2b01 cmp r3, #1 8006b86: d046 beq.n 8006c16 8006b88: 2301 movs r3, #1 8006b8a: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006b8e: 2300 movs r3, #0 8006b90: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8006b92: 2321 movs r3, #33 ; 0x21 8006b94: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8006b98: f7fe fb1a bl 80051d0 8006b9c: 4606 mov r6, r0 huart->TxXferSize = Size; 8006b9e: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8006ba2: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8006ba6: 8ce3 ldrh r3, [r4, #38] ; 0x26 8006ba8: b29b uxth r3, r3 8006baa: b96b cbnz r3, 8006bc8 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8006bac: 463b mov r3, r7 8006bae: 4632 mov r2, r6 8006bb0: 2140 movs r1, #64 ; 0x40 8006bb2: 4620 mov r0, r4 8006bb4: f7ff ff80 bl 8006ab8 8006bb8: b9a8 cbnz r0, 8006be6 huart->gState = HAL_UART_STATE_READY; 8006bba: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8006bbc: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8006bc0: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8006bc4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8006bc8: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006bca: 4632 mov r2, r6 huart->TxXferCount--; 8006bcc: 3b01 subs r3, #1 8006bce: b29b uxth r3, r3 8006bd0: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006bd2: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006bd4: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006bd6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006bda: 4620 mov r0, r4 8006bdc: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006bde: d10e bne.n 8006bfe if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006be0: f7ff ff6a bl 8006ab8 8006be4: b110 cbz r0, 8006bec return HAL_TIMEOUT; 8006be6: 2003 movs r0, #3 8006be8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 8006bec: 882b ldrh r3, [r5, #0] 8006bee: 6822 ldr r2, [r4, #0] 8006bf0: f3c3 0308 ubfx r3, r3, #0, #9 8006bf4: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8006bf6: 6923 ldr r3, [r4, #16] 8006bf8: b943 cbnz r3, 8006c0c pData +=2U; 8006bfa: 3502 adds r5, #2 8006bfc: e7d3 b.n 8006ba6 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006bfe: f7ff ff5b bl 8006ab8 8006c02: 2800 cmp r0, #0 8006c04: d1ef bne.n 8006be6 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 8006c06: 6823 ldr r3, [r4, #0] 8006c08: 782a ldrb r2, [r5, #0] 8006c0a: 605a str r2, [r3, #4] 8006c0c: 3501 adds r5, #1 8006c0e: e7ca b.n 8006ba6 return HAL_ERROR; 8006c10: 2001 movs r0, #1 8006c12: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8006c16: 2002 movs r0, #2 } 8006c18: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08006c1c : { 8006c1c: b538 push {r3, r4, r5, lr} 8006c1e: 4604 mov r4, r0 8006c20: 4613 mov r3, r2 if(huart->gState == HAL_UART_STATE_READY) 8006c22: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8006c26: 2a20 cmp r2, #32 8006c28: d12a bne.n 8006c80 if((pData == NULL) || (Size == 0U)) 8006c2a: b339 cbz r1, 8006c7c 8006c2c: b333 cbz r3, 8006c7c __HAL_LOCK(huart); 8006c2e: f894 2038 ldrb.w r2, [r4, #56] ; 0x38 8006c32: 2a01 cmp r2, #1 8006c34: d024 beq.n 8006c80 8006c36: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006c38: 2500 movs r5, #0 __HAL_LOCK(huart); 8006c3a: f884 2038 strb.w r2, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_BUSY_TX; 8006c3e: 2221 movs r2, #33 ; 0x21 huart->TxXferCount = Size; 8006c40: 84e3 strh r3, [r4, #38] ; 0x26 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8006c42: 6b20 ldr r0, [r4, #48] ; 0x30 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006c44: 63e5 str r5, [r4, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8006c46: f884 2039 strb.w r2, [r4, #57] ; 0x39 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8006c4a: 4a0e ldr r2, [pc, #56] ; (8006c84 ) huart->TxXferSize = Size; 8006c4c: 84a3 strh r3, [r4, #36] ; 0x24 huart->pTxBuffPtr = pData; 8006c4e: 6221 str r1, [r4, #32] huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8006c50: 6282 str r2, [r0, #40] ; 0x28 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8006c52: 4a0d ldr r2, [pc, #52] ; (8006c88 ) huart->hdmatx->XferAbortCallback = NULL; 8006c54: 6345 str r5, [r0, #52] ; 0x34 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8006c56: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmatx->XferErrorCallback = UART_DMAError; 8006c58: 4a0c ldr r2, [pc, #48] ; (8006c8c ) 8006c5a: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size); 8006c5c: 6822 ldr r2, [r4, #0] 8006c5e: 3204 adds r2, #4 8006c60: f7fe fe10 bl 8005884 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8006c64: f06f 0240 mvn.w r2, #64 ; 0x40 8006c68: 6823 ldr r3, [r4, #0] return HAL_OK; 8006c6a: 4628 mov r0, r5 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8006c6c: 601a str r2, [r3, #0] SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8006c6e: 695a ldr r2, [r3, #20] __HAL_UNLOCK(huart); 8006c70: f884 5038 strb.w r5, [r4, #56] ; 0x38 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8006c74: f042 0280 orr.w r2, r2, #128 ; 0x80 8006c78: 615a str r2, [r3, #20] return HAL_OK; 8006c7a: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8006c7c: 2001 movs r0, #1 8006c7e: bd38 pop {r3, r4, r5, pc} return HAL_BUSY; 8006c80: 2002 movs r0, #2 } 8006c82: bd38 pop {r3, r4, r5, pc} 8006c84: 08006d23 .word 0x08006d23 8006c88: 08006d51 .word 0x08006d51 8006c8c: 08006e1d .word 0x08006e1d 08006c90 : { 8006c90: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 8006c92: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 8006c96: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 8006c98: 2a20 cmp r2, #32 { 8006c9a: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 8006c9c: d138 bne.n 8006d10 if((pData == NULL) || (Size == 0U)) 8006c9e: 2900 cmp r1, #0 8006ca0: d034 beq.n 8006d0c 8006ca2: 2b00 cmp r3, #0 8006ca4: d032 beq.n 8006d0c __HAL_LOCK(huart); 8006ca6: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 8006caa: 2a01 cmp r2, #1 8006cac: d030 beq.n 8006d10 8006cae: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006cb0: 2400 movs r4, #0 __HAL_LOCK(huart); 8006cb2: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 8006cb6: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8006cb8: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 8006cba: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8006cbc: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8006cbe: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8006cc2: 6b40 ldr r0, [r0, #52] ; 0x34 8006cc4: 4a13 ldr r2, [pc, #76] ; (8006d14 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8006cc6: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8006cc8: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8006cca: 4a13 ldr r2, [pc, #76] ; (8006d18 ) huart->hdmarx->XferAbortCallback = NULL; 8006ccc: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8006cce: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8006cd0: 4a12 ldr r2, [pc, #72] ; (8006d1c ) 8006cd2: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8006cd4: 460a mov r2, r1 8006cd6: 1d31 adds r1, r6, #4 8006cd8: f7fe fdd4 bl 8005884 return HAL_OK; 8006cdc: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 8006cde: 682b ldr r3, [r5, #0] 8006ce0: 9401 str r4, [sp, #4] 8006ce2: 681a ldr r2, [r3, #0] 8006ce4: 9201 str r2, [sp, #4] 8006ce6: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8006ce8: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8006cec: 9201 str r2, [sp, #4] 8006cee: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8006cf0: 68da ldr r2, [r3, #12] 8006cf2: f442 7280 orr.w r2, r2, #256 ; 0x100 8006cf6: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8006cf8: 695a ldr r2, [r3, #20] 8006cfa: f042 0201 orr.w r2, r2, #1 8006cfe: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006d00: 695a ldr r2, [r3, #20] 8006d02: f042 0240 orr.w r2, r2, #64 ; 0x40 8006d06: 615a str r2, [r3, #20] } 8006d08: b002 add sp, #8 8006d0a: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8006d0c: 2001 movs r0, #1 8006d0e: e7fb b.n 8006d08 return HAL_BUSY; 8006d10: 2002 movs r0, #2 8006d12: e7f9 b.n 8006d08 8006d14: 08006d5b .word 0x08006d5b 8006d18: 08006e11 .word 0x08006e11 8006d1c: 08006e1d .word 0x08006e1d 08006d20 : 8006d20: 4770 bx lr 08006d22 : { 8006d22: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006d24: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8006d26: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006d28: 681b ldr r3, [r3, #0] 8006d2a: f013 0320 ands.w r3, r3, #32 8006d2e: d10a bne.n 8006d46 huart->TxXferCount = 0U; 8006d30: 84d3 strh r3, [r2, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8006d32: 6813 ldr r3, [r2, #0] 8006d34: 695a ldr r2, [r3, #20] 8006d36: f022 0280 bic.w r2, r2, #128 ; 0x80 8006d3a: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8006d3c: 68da ldr r2, [r3, #12] 8006d3e: f042 0240 orr.w r2, r2, #64 ; 0x40 8006d42: 60da str r2, [r3, #12] 8006d44: bd08 pop {r3, pc} HAL_UART_TxCpltCallback(huart); 8006d46: 4610 mov r0, r2 8006d48: f7ff ffea bl 8006d20 8006d4c: bd08 pop {r3, pc} 08006d4e : 8006d4e: 4770 bx lr 08006d50 : { 8006d50: b508 push {r3, lr} HAL_UART_TxHalfCpltCallback(huart); 8006d52: 6a40 ldr r0, [r0, #36] ; 0x24 8006d54: f7ff fffb bl 8006d4e 8006d58: bd08 pop {r3, pc} 08006d5a : { 8006d5a: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006d5c: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8006d5e: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006d60: 681b ldr r3, [r3, #0] 8006d62: f013 0320 ands.w r3, r3, #32 8006d66: d110 bne.n 8006d8a huart->RxXferCount = 0U; 8006d68: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8006d6a: 6813 ldr r3, [r2, #0] 8006d6c: 68d9 ldr r1, [r3, #12] 8006d6e: f421 7180 bic.w r1, r1, #256 ; 0x100 8006d72: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8006d74: 6959 ldr r1, [r3, #20] 8006d76: f021 0101 bic.w r1, r1, #1 8006d7a: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006d7c: 6959 ldr r1, [r3, #20] 8006d7e: f021 0140 bic.w r1, r1, #64 ; 0x40 8006d82: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8006d84: 2320 movs r3, #32 8006d86: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8006d8a: 4610 mov r0, r2 8006d8c: f001 fce8 bl 8008760 8006d90: bd08 pop {r3, pc} 08006d92 : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8006d92: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8006d96: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8006d98: 2b22 cmp r3, #34 ; 0x22 8006d9a: d136 bne.n 8006e0a if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006d9c: 6883 ldr r3, [r0, #8] 8006d9e: 6901 ldr r1, [r0, #16] 8006da0: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8006da4: 6802 ldr r2, [r0, #0] 8006da6: 6a83 ldr r3, [r0, #40] ; 0x28 8006da8: d123 bne.n 8006df2 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8006daa: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8006dac: b9e9 cbnz r1, 8006dea *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8006dae: f3c2 0208 ubfx r2, r2, #0, #9 8006db2: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8006db6: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8006db8: 8dc4 ldrh r4, [r0, #46] ; 0x2e 8006dba: 3c01 subs r4, #1 8006dbc: b2a4 uxth r4, r4 8006dbe: 85c4 strh r4, [r0, #46] ; 0x2e 8006dc0: b98c cbnz r4, 8006de6 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 8006dc2: 6803 ldr r3, [r0, #0] 8006dc4: 68da ldr r2, [r3, #12] 8006dc6: f022 0220 bic.w r2, r2, #32 8006dca: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8006dcc: 68da ldr r2, [r3, #12] 8006dce: f422 7280 bic.w r2, r2, #256 ; 0x100 8006dd2: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 8006dd4: 695a ldr r2, [r3, #20] 8006dd6: f022 0201 bic.w r2, r2, #1 8006dda: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8006ddc: 2320 movs r3, #32 8006dde: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8006de2: f001 fcbd bl 8008760 if(--huart->RxXferCount == 0U) 8006de6: 2000 movs r0, #0 } 8006de8: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 8006dea: b2d2 uxtb r2, r2 8006dec: f823 2b01 strh.w r2, [r3], #1 8006df0: e7e1 b.n 8006db6 if(huart->Init.Parity == UART_PARITY_NONE) 8006df2: b921 cbnz r1, 8006dfe *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8006df4: 1c59 adds r1, r3, #1 8006df6: 6852 ldr r2, [r2, #4] 8006df8: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8006dfa: 701a strb r2, [r3, #0] 8006dfc: e7dc b.n 8006db8 8006dfe: 6852 ldr r2, [r2, #4] 8006e00: 1c59 adds r1, r3, #1 8006e02: 6281 str r1, [r0, #40] ; 0x28 8006e04: f002 027f and.w r2, r2, #127 ; 0x7f 8006e08: e7f7 b.n 8006dfa return HAL_BUSY; 8006e0a: 2002 movs r0, #2 8006e0c: bd10 pop {r4, pc} 08006e0e : 8006e0e: 4770 bx lr 08006e10 : { 8006e10: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8006e12: 6a40 ldr r0, [r0, #36] ; 0x24 8006e14: f7ff fffb bl 8006e0e 8006e18: bd08 pop {r3, pc} 08006e1a : 8006e1a: 4770 bx lr 08006e1c : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8006e1c: 6a41 ldr r1, [r0, #36] ; 0x24 { 8006e1e: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8006e20: 680b ldr r3, [r1, #0] 8006e22: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8006e24: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8006e28: 2821 cmp r0, #33 ; 0x21 8006e2a: d10a bne.n 8006e42 8006e2c: 0612 lsls r2, r2, #24 8006e2e: d508 bpl.n 8006e42 huart->TxXferCount = 0U; 8006e30: 2200 movs r2, #0 8006e32: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8006e34: 68da ldr r2, [r3, #12] 8006e36: f022 02c0 bic.w r2, r2, #192 ; 0xc0 8006e3a: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8006e3c: 2220 movs r2, #32 8006e3e: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8006e42: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8006e44: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8006e48: 2a22 cmp r2, #34 ; 0x22 8006e4a: d106 bne.n 8006e5a 8006e4c: 065b lsls r3, r3, #25 8006e4e: d504 bpl.n 8006e5a huart->RxXferCount = 0U; 8006e50: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8006e52: 4608 mov r0, r1 huart->RxXferCount = 0U; 8006e54: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8006e56: f7ff fd83 bl 8006960 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8006e5a: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8006e5c: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8006e5e: f043 0310 orr.w r3, r3, #16 8006e62: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8006e64: f7ff ffd9 bl 8006e1a 8006e68: bd08 pop {r3, pc} ... 08006e6c : uint32_t isrflags = READ_REG(huart->Instance->SR); 8006e6c: 6803 ldr r3, [r0, #0] { 8006e6e: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8006e70: 681a ldr r2, [r3, #0] { 8006e72: 4604 mov r4, r0 if(errorflags == RESET) 8006e74: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8006e76: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8006e78: 695d ldr r5, [r3, #20] if(errorflags == RESET) 8006e7a: d107 bne.n 8006e8c if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8006e7c: 0696 lsls r6, r2, #26 8006e7e: d55a bpl.n 8006f36 8006e80: 068d lsls r5, r1, #26 8006e82: d558 bpl.n 8006f36 } 8006e84: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8006e88: f7ff bf83 b.w 8006d92 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8006e8c: f015 0501 ands.w r5, r5, #1 8006e90: d102 bne.n 8006e98 8006e92: f411 7f90 tst.w r1, #288 ; 0x120 8006e96: d04e beq.n 8006f36 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8006e98: 07d3 lsls r3, r2, #31 8006e9a: d505 bpl.n 8006ea8 8006e9c: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 8006e9e: bf42 ittt mi 8006ea0: 6be3 ldrmi r3, [r4, #60] ; 0x3c 8006ea2: f043 0301 orrmi.w r3, r3, #1 8006ea6: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8006ea8: 0750 lsls r0, r2, #29 8006eaa: d504 bpl.n 8006eb6 8006eac: b11d cbz r5, 8006eb6 huart->ErrorCode |= HAL_UART_ERROR_NE; 8006eae: 6be3 ldr r3, [r4, #60] ; 0x3c 8006eb0: f043 0302 orr.w r3, r3, #2 8006eb4: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8006eb6: 0793 lsls r3, r2, #30 8006eb8: d504 bpl.n 8006ec4 8006eba: b11d cbz r5, 8006ec4 huart->ErrorCode |= HAL_UART_ERROR_FE; 8006ebc: 6be3 ldr r3, [r4, #60] ; 0x3c 8006ebe: f043 0304 orr.w r3, r3, #4 8006ec2: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8006ec4: 0716 lsls r6, r2, #28 8006ec6: d504 bpl.n 8006ed2 8006ec8: b11d cbz r5, 8006ed2 huart->ErrorCode |= HAL_UART_ERROR_ORE; 8006eca: 6be3 ldr r3, [r4, #60] ; 0x3c 8006ecc: f043 0308 orr.w r3, r3, #8 8006ed0: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8006ed2: 6be3 ldr r3, [r4, #60] ; 0x3c 8006ed4: 2b00 cmp r3, #0 8006ed6: d066 beq.n 8006fa6 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8006ed8: 0695 lsls r5, r2, #26 8006eda: d504 bpl.n 8006ee6 8006edc: 0688 lsls r0, r1, #26 8006ede: d502 bpl.n 8006ee6 UART_Receive_IT(huart); 8006ee0: 4620 mov r0, r4 8006ee2: f7ff ff56 bl 8006d92 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8006ee6: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8006ee8: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8006eea: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8006eec: 6be2 ldr r2, [r4, #60] ; 0x3c 8006eee: 0711 lsls r1, r2, #28 8006ef0: d402 bmi.n 8006ef8 8006ef2: f015 0540 ands.w r5, r5, #64 ; 0x40 8006ef6: d01a beq.n 8006f2e UART_EndRxTransfer(huart); 8006ef8: f7ff fd32 bl 8006960 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8006efc: 6823 ldr r3, [r4, #0] 8006efe: 695a ldr r2, [r3, #20] 8006f00: 0652 lsls r2, r2, #25 8006f02: d510 bpl.n 8006f26 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006f04: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8006f06: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006f08: f022 0240 bic.w r2, r2, #64 ; 0x40 8006f0c: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 8006f0e: b150 cbz r0, 8006f26 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8006f10: 4b25 ldr r3, [pc, #148] ; (8006fa8 ) 8006f12: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8006f14: f7fe fcf4 bl 8005900 8006f18: 2800 cmp r0, #0 8006f1a: d044 beq.n 8006fa6 huart->hdmarx->XferAbortCallback(huart->hdmarx); 8006f1c: 6b60 ldr r0, [r4, #52] ; 0x34 } 8006f1e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8006f22: 6b43 ldr r3, [r0, #52] ; 0x34 8006f24: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8006f26: 4620 mov r0, r4 8006f28: f7ff ff77 bl 8006e1a 8006f2c: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 8006f2e: f7ff ff74 bl 8006e1a huart->ErrorCode = HAL_UART_ERROR_NONE; 8006f32: 63e5 str r5, [r4, #60] ; 0x3c 8006f34: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8006f36: 0616 lsls r6, r2, #24 8006f38: d527 bpl.n 8006f8a 8006f3a: 060d lsls r5, r1, #24 8006f3c: d525 bpl.n 8006f8a if(huart->gState == HAL_UART_STATE_BUSY_TX) 8006f3e: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8006f42: 2a21 cmp r2, #33 ; 0x21 8006f44: d12f bne.n 8006fa6 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006f46: 68a2 ldr r2, [r4, #8] 8006f48: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8006f4c: 6a22 ldr r2, [r4, #32] 8006f4e: d117 bne.n 8006f80 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8006f50: 8811 ldrh r1, [r2, #0] 8006f52: f3c1 0108 ubfx r1, r1, #0, #9 8006f56: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8006f58: 6921 ldr r1, [r4, #16] 8006f5a: b979 cbnz r1, 8006f7c huart->pTxBuffPtr += 2U; 8006f5c: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 8006f5e: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8006f60: 8ce2 ldrh r2, [r4, #38] ; 0x26 8006f62: 3a01 subs r2, #1 8006f64: b292 uxth r2, r2 8006f66: 84e2 strh r2, [r4, #38] ; 0x26 8006f68: b9ea cbnz r2, 8006fa6 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8006f6a: 68da ldr r2, [r3, #12] 8006f6c: f022 0280 bic.w r2, r2, #128 ; 0x80 8006f70: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8006f72: 68da ldr r2, [r3, #12] 8006f74: f042 0240 orr.w r2, r2, #64 ; 0x40 8006f78: 60da str r2, [r3, #12] 8006f7a: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8006f7c: 3201 adds r2, #1 8006f7e: e7ee b.n 8006f5e huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8006f80: 1c51 adds r1, r2, #1 8006f82: 6221 str r1, [r4, #32] 8006f84: 7812 ldrb r2, [r2, #0] 8006f86: 605a str r2, [r3, #4] 8006f88: e7ea b.n 8006f60 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8006f8a: 0650 lsls r0, r2, #25 8006f8c: d50b bpl.n 8006fa6 8006f8e: 064a lsls r2, r1, #25 8006f90: d509 bpl.n 8006fa6 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8006f92: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8006f94: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8006f96: f022 0240 bic.w r2, r2, #64 ; 0x40 8006f9a: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8006f9c: 2320 movs r3, #32 8006f9e: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 8006fa2: f7ff febd bl 8006d20 8006fa6: bd70 pop {r4, r5, r6, pc} 8006fa8: 08006fad .word 0x08006fad 08006fac : { 8006fac: b508 push {r3, lr} huart->RxXferCount = 0x00U; 8006fae: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8006fb0: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 8006fb2: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 8006fb4: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 8006fb6: f7ff ff30 bl 8006e1a 8006fba: bd08 pop {r3, pc} 08006fbc : } } #else void AD5318_Ctrl(uint16_t ShiftTarget) { 8006fbc: b570 push {r4, r5, r6, lr} char i; /* serial counter */ // printf("ShiftTarget : %x \r\n",ShiftTarget); HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET); 8006fbe: 2200 movs r2, #0 void AD5318_Ctrl(uint16_t ShiftTarget) { 8006fc0: 4605 mov r5, r0 HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET); 8006fc2: 2104 movs r1, #4 8006fc4: 4824 ldr r0, [pc, #144] ; (8007058 ) 8006fc6: f7fe fffd bl 8005fc4 8006fca: 2410 movs r4, #16 for (i=0;i < 16;i++) { /* loop through all 16 data bits */ HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_SET); /* rise clk line again */ 8006fcc: 4e22 ldr r6, [pc, #136] ; (8007058 ) 8006fce: 2201 movs r2, #1 8006fd0: 2108 movs r1, #8 8006fd2: 4630 mov r0, r6 8006fd4: f7fe fff6 bl 8005fc4 if (ShiftTarget & 0x8000) HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_SET); 8006fd8: 042b lsls r3, r5, #16 8006fda: bf4c ite mi 8006fdc: 2201 movmi r2, #1 else HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET); /* set data bit */ 8006fde: 2200 movpl r2, #0 8006fe0: 2110 movs r1, #16 8006fe2: 4630 mov r0, r6 8006fe4: f7fe ffee bl 8005fc4 8006fe8: 3c01 subs r4, #1 HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_RESET); /* lower clock line */ 8006fea: 2200 movs r2, #0 8006fec: 2108 movs r1, #8 8006fee: 4630 mov r0, r6 8006ff0: f7fe ffe8 bl 8005fc4 ShiftTarget <<= 1; 8006ff4: 006d lsls r5, r5, #1 for (i=0;i < 16;i++) { /* loop through all 16 data bits */ 8006ff6: f014 04ff ands.w r4, r4, #255 ; 0xff ShiftTarget <<= 1; 8006ffa: b2ad uxth r5, r5 for (i=0;i < 16;i++) { /* loop through all 16 data bits */ 8006ffc: d1e7 bne.n 8006fce } HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET); 8006ffe: 2201 movs r2, #1 8007000: f44f 4100 mov.w r1, #32768 ; 0x8000 8007004: 4815 ldr r0, [pc, #84] ; (800705c ) 8007006: f7fe ffdd bl 8005fc4 Pol_Delay_us(10); 800700a: 200a movs r0, #10 800700c: f000 fdd6 bl 8007bbc HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET); 8007010: 4622 mov r2, r4 8007012: f44f 4100 mov.w r1, #32768 ; 0x8000 8007016: 4811 ldr r0, [pc, #68] ; (800705c ) 8007018: f7fe ffd4 bl 8005fc4 HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_SET); 800701c: 2201 movs r2, #1 800701e: 2104 movs r1, #4 8007020: 480d ldr r0, [pc, #52] ; (8007058 ) 8007022: f7fe ffcf bl 8005fc4 HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET); 8007026: 4622 mov r2, r4 8007028: 2110 movs r1, #16 800702a: 480b ldr r0, [pc, #44] ; (8007058 ) 800702c: f7fe ffca bl 8005fc4 HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET); 8007030: 2201 movs r2, #1 8007032: f44f 4100 mov.w r1, #32768 ; 0x8000 8007036: 4809 ldr r0, [pc, #36] ; (800705c ) 8007038: f7fe ffc4 bl 8005fc4 /* rise DAC SYNC line again */ HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET); 800703c: 4622 mov r2, r4 800703e: 2104 movs r1, #4 8007040: 4805 ldr r0, [pc, #20] ; (8007058 ) 8007042: f7fe ffbf bl 8005fc4 HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET); 8007046: 4622 mov r2, r4 } 8007048: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET); 800704c: f44f 4100 mov.w r1, #32768 ; 0x8000 8007050: 4802 ldr r0, [pc, #8] ; (800705c ) 8007052: f7fe bfb7 b.w 8005fc4 8007056: bf00 nop 8007058: 40012000 .word 0x40012000 800705c: 40011400 .word 0x40011400 08007060 : void AD5318_Initialize(void){ 8007060: b508 push {r3, lr} HAL_Delay(1); 8007062: 2001 movs r0, #1 8007064: f7fe f8ba bl 80051dc AD5318_Ctrl(0x800C); 8007068: f248 000c movw r0, #32780 ; 0x800c 800706c: f7ff ffa6 bl 8006fbc HAL_Delay(1); 8007070: 2001 movs r0, #1 8007072: f7fe f8b3 bl 80051dc AD5318_Ctrl(0xA000); 8007076: f44f 4020 mov.w r0, #40960 ; 0xa000 800707a: f7ff ff9f bl 8006fbc } 800707e: e8bd 4008 ldmia.w sp!, {r3, lr} HAL_Delay(1); 8007082: 2001 movs r0, #1 8007084: f7fe b8aa b.w 80051dc 08007088 : BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0); BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0); } void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){ 8007088: b084 sub sp, #16 800708a: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800708e: ac0a add r4, sp, #40 ; 0x28 8007090: e884 000f stmia.w r4, {r0, r1, r2, r3} 8007094: 9e0e ldr r6, [sp, #56] ; 0x38 8007096: f8bd 703c ldrh.w r7, [sp, #60] ; 0x3c uint8_t i = 0; // uint8_t temp = 0; // printf("BDA4601_atten_ctrl : %x \r\n",data); // temp = 4|data; HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 800709a: 2200 movs r2, #0 800709c: 4639 mov r1, r7 800709e: 4681 mov r9, r0 80070a0: 4630 mov r0, r6 void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){ 80070a2: f89d 5040 ldrb.w r5, [sp, #64] ; 0x40 80070a6: f8bd a02c ldrh.w sl, [sp, #44] ; 0x2c 80070aa: f8dd 8030 ldr.w r8, [sp, #48] ; 0x30 80070ae: f8bd b034 ldrh.w fp, [sp, #52] ; 0x34 HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 80070b2: f7fe ff87 bl 8005fc4 HAL_Delay(1); 80070b6: 2001 movs r0, #1 80070b8: f7fe f890 bl 80051dc 80070bc: 2406 movs r4, #6 for(i = 0; i < 6; i++){ if(data & 0x01){ 80070be: f015 0201 ands.w r2, r5, #1 HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_SET);//DATA 80070c2: bf18 it ne 80070c4: 2201 movne r2, #1 // HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_SET);//DATA // printf("1"); } else{ HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_RESET);//DATA 80070c6: 4659 mov r1, fp 80070c8: 4640 mov r0, r8 80070ca: f7fe ff7b bl 8005fc4 // HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA // printf("0"); } HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_SET);//CLOCK 80070ce: 2201 movs r2, #1 80070d0: 4651 mov r1, sl 80070d2: 4648 mov r0, r9 80070d4: f7fe ff76 bl 8005fc4 HAL_Delay(1); 80070d8: 2001 movs r0, #1 80070da: f7fe f87f bl 80051dc HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK 80070de: 2200 movs r2, #0 80070e0: 4651 mov r1, sl 80070e2: 4648 mov r0, r9 80070e4: f7fe ff6e bl 8005fc4 80070e8: 3c01 subs r4, #1 HAL_Delay(1); 80070ea: 2001 movs r0, #1 80070ec: f7fe f876 bl 80051dc for(i = 0; i < 6; i++){ 80070f0: f014 04ff ands.w r4, r4, #255 ; 0xff data >>= 1; 80070f4: ea4f 0555 mov.w r5, r5, lsr #1 for(i = 0; i < 6; i++){ 80070f8: d1e1 bne.n 80070be } HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK 80070fa: 4622 mov r2, r4 80070fc: 4651 mov r1, sl 80070fe: 4648 mov r0, r9 8007100: f7fe ff60 bl 8005fc4 HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA 8007104: 4622 mov r2, r4 8007106: f44f 6180 mov.w r1, #1024 ; 0x400 800710a: 4640 mov r0, r8 800710c: f7fe ff5a bl 8005fc4 HAL_Delay(1); 8007110: 2001 movs r0, #1 8007112: f7fe f863 bl 80051dc HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_SET);//LE 8007116: 4639 mov r1, r7 8007118: 2201 movs r2, #1 800711a: 4630 mov r0, r6 800711c: f7fe ff52 bl 8005fc4 HAL_Delay(1); 8007120: 2001 movs r0, #1 8007122: f7fe f85b bl 80051dc HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 8007126: 4622 mov r2, r4 8007128: 4639 mov r1, r7 800712a: 4630 mov r0, r6 } 800712c: e8bd 4ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007130: b004 add sp, #16 HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 8007132: f7fe bf47 b.w 8005fc4 ... 08007138 : void BDA4601_Initialize(void){ 8007138: b51f push {r0, r1, r2, r3, r4, lr} BDA4601_atten_ctrl(BDA4601_1_8G_DL1,0); 800713a: 2400 movs r4, #0 800713c: 4b42 ldr r3, [pc, #264] ; (8007248 ) 800713e: 9402 str r4, [sp, #8] 8007140: f103 0210 add.w r2, r3, #16 8007144: e892 0003 ldmia.w r2, {r0, r1} 8007148: e88d 0003 stmia.w sp, {r0, r1} 800714c: cb0f ldmia r3, {r0, r1, r2, r3} 800714e: f7ff ff9b bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_DL2,0); 8007152: 4b3e ldr r3, [pc, #248] ; (800724c ) 8007154: 9402 str r4, [sp, #8] 8007156: f103 0210 add.w r2, r3, #16 800715a: e892 0003 ldmia.w r2, {r0, r1} 800715e: e88d 0003 stmia.w sp, {r0, r1} 8007162: cb0f ldmia r3, {r0, r1, r2, r3} 8007164: f7ff ff90 bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,0); 8007168: 4b39 ldr r3, [pc, #228] ; (8007250 ) 800716a: 9402 str r4, [sp, #8] 800716c: f103 0210 add.w r2, r3, #16 8007170: e892 0003 ldmia.w r2, {r0, r1} 8007174: e88d 0003 stmia.w sp, {r0, r1} 8007178: cb0f ldmia r3, {r0, r1, r2, r3} 800717a: f7ff ff85 bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_UL2,0); 800717e: 4b35 ldr r3, [pc, #212] ; (8007254 ) 8007180: 9402 str r4, [sp, #8] 8007182: f103 0210 add.w r2, r3, #16 8007186: e892 0003 ldmia.w r2, {r0, r1} 800718a: e88d 0003 stmia.w sp, {r0, r1} 800718e: cb0f ldmia r3, {r0, r1, r2, r3} 8007190: f7ff ff7a bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_UL3,0); 8007194: 4b30 ldr r3, [pc, #192] ; (8007258 ) 8007196: 9402 str r4, [sp, #8] 8007198: f103 0210 add.w r2, r3, #16 800719c: e892 0003 ldmia.w r2, {r0, r1} 80071a0: e88d 0003 stmia.w sp, {r0, r1} 80071a4: cb0f ldmia r3, {r0, r1, r2, r3} 80071a6: f7ff ff6f bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_UL4,0); 80071aa: 4b2c ldr r3, [pc, #176] ; (800725c ) 80071ac: 9402 str r4, [sp, #8] 80071ae: f103 0210 add.w r2, r3, #16 80071b2: e892 0003 ldmia.w r2, {r0, r1} 80071b6: e88d 0003 stmia.w sp, {r0, r1} 80071ba: cb0f ldmia r3, {r0, r1, r2, r3} 80071bc: f7ff ff64 bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_DL1,0); 80071c0: 4b27 ldr r3, [pc, #156] ; (8007260 ) 80071c2: 9402 str r4, [sp, #8] 80071c4: f103 0210 add.w r2, r3, #16 80071c8: e892 0003 ldmia.w r2, {r0, r1} 80071cc: e88d 0003 stmia.w sp, {r0, r1} 80071d0: cb0f ldmia r3, {r0, r1, r2, r3} 80071d2: f7ff ff59 bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,0); 80071d6: 4b23 ldr r3, [pc, #140] ; (8007264 ) 80071d8: 9402 str r4, [sp, #8] 80071da: f103 0210 add.w r2, r3, #16 80071de: e892 0003 ldmia.w r2, {r0, r1} 80071e2: e88d 0003 stmia.w sp, {r0, r1} 80071e6: cb0f ldmia r3, {r0, r1, r2, r3} 80071e8: f7ff ff4e bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_UL1,0); 80071ec: 4b1e ldr r3, [pc, #120] ; (8007268 ) 80071ee: 9402 str r4, [sp, #8] 80071f0: f103 0210 add.w r2, r3, #16 80071f4: e892 0003 ldmia.w r2, {r0, r1} 80071f8: e88d 0003 stmia.w sp, {r0, r1} 80071fc: cb0f ldmia r3, {r0, r1, r2, r3} 80071fe: f7ff ff43 bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,0); 8007202: 4b1a ldr r3, [pc, #104] ; (800726c ) 8007204: 9402 str r4, [sp, #8] 8007206: f103 0210 add.w r2, r3, #16 800720a: e892 0003 ldmia.w r2, {r0, r1} 800720e: e88d 0003 stmia.w sp, {r0, r1} 8007212: cb0f ldmia r3, {r0, r1, r2, r3} 8007214: f7ff ff38 bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0); 8007218: 4b15 ldr r3, [pc, #84] ; (8007270 ) 800721a: 9402 str r4, [sp, #8] 800721c: f103 0210 add.w r2, r3, #16 8007220: e892 0003 ldmia.w r2, {r0, r1} 8007224: e88d 0003 stmia.w sp, {r0, r1} 8007228: cb0f ldmia r3, {r0, r1, r2, r3} 800722a: f7ff ff2d bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0); 800722e: 4b11 ldr r3, [pc, #68] ; (8007274 ) 8007230: 9402 str r4, [sp, #8] 8007232: f103 0210 add.w r2, r3, #16 8007236: e892 0003 ldmia.w r2, {r0, r1} 800723a: e88d 0003 stmia.w sp, {r0, r1} 800723e: cb0f ldmia r3, {r0, r1, r2, r3} 8007240: f7ff ff22 bl 8007088 } 8007244: b004 add sp, #16 8007246: bd10 pop {r4, pc} 8007248: 20000008 .word 0x20000008 800724c: 20000020 .word 0x20000020 8007250: 20000038 .word 0x20000038 8007254: 20000050 .word 0x20000050 8007258: 20000068 .word 0x20000068 800725c: 20000080 .word 0x20000080 8007260: 20000098 .word 0x20000098 8007264: 200000b0 .word 0x200000b0 8007268: 200000c8 .word 0x200000c8 800726c: 200000e0 .word 0x200000e0 8007270: 200000f8 .word 0x200000f8 8007274: 20000110 .word 0x20000110 08007278 : } return(crc16); } uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 8007278: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 800727a: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 800727c: 4604 mov r4, r0 800727e: 1a22 subs r2, r4, r0 8007280: b2d2 uxtb r2, r2 8007282: 4291 cmp r1, r2 8007284: d801 bhi.n 800728a if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 8007286: 4618 mov r0, r3 8007288: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 800728a: f814 2b01 ldrb.w r2, [r4], #1 800728e: 4053 eors r3, r2 8007290: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8007292: f013 0f80 tst.w r3, #128 ; 0x80 8007296: f102 32ff add.w r2, r2, #4294967295 800729a: ea4f 0343 mov.w r3, r3, lsl #1 800729e: bf18 it ne 80072a0: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 80072a4: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 80072a8: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 80072aa: d1f2 bne.n 8007292 80072ac: e7e7 b.n 800727e 080072ae : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 80072ae: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80072b0: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80072b2: 4605 mov r5, r0 80072b4: 1a2c subs r4, r5, r0 80072b6: b2e4 uxtb r4, r4 80072b8: 42a1 cmp r1, r4 80072ba: d803 bhi.n 80072c4 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 80072bc: 1a9b subs r3, r3, r2 80072be: 4258 negs r0, r3 80072c0: 4158 adcs r0, r3 80072c2: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 80072c4: f815 4b01 ldrb.w r4, [r5], #1 80072c8: 4063 eors r3, r4 80072ca: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 80072cc: f013 0f80 tst.w r3, #128 ; 0x80 80072d0: f104 34ff add.w r4, r4, #4294967295 80072d4: ea4f 0343 mov.w r3, r3, lsl #1 80072d8: bf18 it ne 80072da: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 80072de: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 80072e2: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 80072e4: d1f2 bne.n 80072cc 80072e6: e7e5 b.n 80072b4 080072e8 : ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val; ALL_ATT_3_5G.data5 = ATTEN_3_5G_Initial_Val; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); } #endif // PYJ.2019.07.26_END -- void Bit_Compare(PE43711_st ATT,uint8_t data,uint8_t Shift_Index){ 80072e8: b084 sub sp, #16 80072ea: e88d 000f stmia.w sp, {r0, r1, r2, r3} 80072ee: f89d 2018 ldrb.w r2, [sp, #24] 80072f2: f89d 301c ldrb.w r3, [sp, #28] 80072f6: 9802 ldr r0, [sp, #8] if(data & (0x01 << Shift_Index)){ 80072f8: 411a asrs r2, r3 80072fa: f012 0201 ands.w r2, r2, #1 80072fe: f8bd 100c ldrh.w r1, [sp, #12] HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_SET);//DATA 8007302: bf18 it ne 8007304: 2201 movne r2, #1 } else{ HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA // printf("0"); } } 8007306: b004 add sp, #16 HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA 8007308: f7fe be5c b.w 8005fc4 0800730c : void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){ 800730c: b084 sub sp, #16 800730e: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007312: b085 sub sp, #20 8007314: ac0e add r4, sp, #56 ; 0x38 8007316: e884 000f stmia.w r4, {r0, r1, r2, r3} 800731a: 9d12 ldr r5, [sp, #72] ; 0x48 800731c: f8bd 604c ldrh.w r6, [sp, #76] ; 0x4c HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET); 8007320: 2200 movs r2, #0 8007322: 4631 mov r1, r6 8007324: 4680 mov r8, r0 8007326: 4628 mov r0, r5 8007328: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 800732c: f7fe fe4a bl 8005fc4 Pol_Delay_us(10); 8007330: 200a movs r0, #10 8007332: f000 fc43 bl 8007bbc 8007336: 2700 movs r7, #0 // printf("why not? \r\n"); for(uint8_t i = 0; i < 8; i++){ Bit_Compare(ATT.ATT0,ATT.data0,i); 8007338: f10d 0b48 add.w fp, sp, #72 ; 0x48 Bit_Compare(ATT.ATT1,ATT.data1,i); 800733c: f10d 0a64 add.w sl, sp, #100 ; 0x64 Bit_Compare(ATT.ATT0,ATT.data0,i); 8007340: f89d 3050 ldrb.w r3, [sp, #80] ; 0x50 8007344: b2fc uxtb r4, r7 8007346: 9302 str r3, [sp, #8] 8007348: 9512 str r5, [sp, #72] ; 0x48 800734a: f8ad 604c strh.w r6, [sp, #76] ; 0x4c 800734e: 9403 str r4, [sp, #12] 8007350: e89b 0003 ldmia.w fp, {r0, r1} 8007354: e88d 0003 stmia.w sp, {r0, r1} 8007358: f8cd 8038 str.w r8, [sp, #56] ; 0x38 800735c: f8ad 903c strh.w r9, [sp, #60] ; 0x3c 8007360: ab0e add r3, sp, #56 ; 0x38 8007362: cb0f ldmia r3, {r0, r1, r2, r3} 8007364: f7ff ffc0 bl 80072e8 Bit_Compare(ATT.ATT1,ATT.data1,i); 8007368: f89d 306c ldrb.w r3, [sp, #108] ; 0x6c 800736c: 9403 str r4, [sp, #12] 800736e: 9302 str r3, [sp, #8] 8007370: e89a 0003 ldmia.w sl, {r0, r1} 8007374: e88d 0003 stmia.w sp, {r0, r1} 8007378: ab15 add r3, sp, #84 ; 0x54 800737a: cb0f ldmia r3, {r0, r1, r2, r3} 800737c: f7ff ffb4 bl 80072e8 Bit_Compare(ATT.ATT2,ATT.data2,i); 8007380: f89d 3088 ldrb.w r3, [sp, #136] ; 0x88 8007384: 9403 str r4, [sp, #12] 8007386: 9302 str r3, [sp, #8] 8007388: ab20 add r3, sp, #128 ; 0x80 800738a: e893 0003 ldmia.w r3, {r0, r1} 800738e: e88d 0003 stmia.w sp, {r0, r1} 8007392: ab1c add r3, sp, #112 ; 0x70 8007394: cb0f ldmia r3, {r0, r1, r2, r3} 8007396: f7ff ffa7 bl 80072e8 Bit_Compare(ATT.ATT3,ATT.data3,i); 800739a: f89d 30a4 ldrb.w r3, [sp, #164] ; 0xa4 800739e: 9403 str r4, [sp, #12] 80073a0: 9302 str r3, [sp, #8] 80073a2: ab27 add r3, sp, #156 ; 0x9c 80073a4: e893 0003 ldmia.w r3, {r0, r1} 80073a8: e88d 0003 stmia.w sp, {r0, r1} 80073ac: ab23 add r3, sp, #140 ; 0x8c 80073ae: cb0f ldmia r3, {r0, r1, r2, r3} 80073b0: f7ff ff9a bl 80072e8 Bit_Compare(ATT.ATT4,ATT.data4,i); 80073b4: f89d 30c0 ldrb.w r3, [sp, #192] ; 0xc0 80073b8: 9403 str r4, [sp, #12] 80073ba: 9302 str r3, [sp, #8] 80073bc: ab2e add r3, sp, #184 ; 0xb8 80073be: e893 0003 ldmia.w r3, {r0, r1} 80073c2: e88d 0003 stmia.w sp, {r0, r1} 80073c6: ab2a add r3, sp, #168 ; 0xa8 80073c8: cb0f ldmia r3, {r0, r1, r2, r3} 80073ca: f7ff ff8d bl 80072e8 Bit_Compare(ATT.ATT5,ATT.data5,i); 80073ce: f89d 30dc ldrb.w r3, [sp, #220] ; 0xdc 80073d2: 9403 str r4, [sp, #12] 80073d4: 9302 str r3, [sp, #8] 80073d6: ab35 add r3, sp, #212 ; 0xd4 80073d8: e893 0003 ldmia.w r3, {r0, r1} 80073dc: e88d 0003 stmia.w sp, {r0, r1} 80073e0: ab31 add r3, sp, #196 ; 0xc4 80073e2: cb0f ldmia r3, {r0, r1, r2, r3} 80073e4: f7ff ff80 bl 80072e8 HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK 80073e8: 2201 movs r2, #1 80073ea: 4649 mov r1, r9 80073ec: 4640 mov r0, r8 80073ee: f7fe fde9 bl 8005fc4 Pol_Delay_us(10); 80073f2: 200a movs r0, #10 80073f4: f000 fbe2 bl 8007bbc 80073f8: 3701 adds r7, #1 HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK 80073fa: 2200 movs r2, #0 80073fc: 4649 mov r1, r9 80073fe: 4640 mov r0, r8 8007400: f7fe fde0 bl 8005fc4 for(uint8_t i = 0; i < 8; i++){ 8007404: 2f08 cmp r7, #8 8007406: d19b bne.n 8007340 } HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA 8007408: 2200 movs r2, #0 800740a: f44f 4100 mov.w r1, #32768 ; 0x8000 800740e: 480a ldr r0, [pc, #40] ; (8007438 ) 8007410: f7fe fdd8 bl 8005fc4 HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_SET);//LE 8007414: 4631 mov r1, r6 8007416: 2201 movs r2, #1 8007418: 4628 mov r0, r5 800741a: f7fe fdd3 bl 8005fc4 Pol_Delay_us(10); 800741e: 200a movs r0, #10 8007420: f000 fbcc bl 8007bbc HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET); 8007424: 2200 movs r2, #0 8007426: 4631 mov r1, r6 8007428: 4628 mov r0, r5 } 800742a: b005 add sp, #20 800742c: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007430: b004 add sp, #16 HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET); 8007432: f7fe bdc7 b.w 8005fc4 8007436: bf00 nop 8007438: 40010c00 .word 0x40010c00 0800743c : void PE43711_PinInit(void){ 800743c: b5f0 push {r4, r5, r6, r7, lr} ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1; 800743e: 4c27 ldr r4, [pc, #156] ; (80074dc ) 8007440: 4e27 ldr r6, [pc, #156] ; (80074e0 ) 8007442: 4625 mov r5, r4 8007444: ce0f ldmia r6!, {r0, r1, r2, r3} 8007446: c50f stmia r5!, {r0, r1, r2, r3} 8007448: e896 0003 ldmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1; 800744c: 4f25 ldr r7, [pc, #148] ; (80074e4 ) 800744e: f104 061c add.w r6, r4, #28 ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1; 8007452: e885 0003 stmia.w r5, {r0, r1} ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1; 8007456: cf0f ldmia r7!, {r0, r1, r2, r3} 8007458: c60f stmia r6!, {r0, r1, r2, r3} 800745a: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1; 800745e: 4f22 ldr r7, [pc, #136] ; (80074e8 ) ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1; 8007460: e886 0003 stmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1; 8007464: cf0f ldmia r7!, {r0, r1, r2, r3} 8007466: f104 0638 add.w r6, r4, #56 ; 0x38 800746a: c60f stmia r6!, {r0, r1, r2, r3} 800746c: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2; 8007470: 4f1e ldr r7, [pc, #120] ; (80074ec ) ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1; 8007472: e886 0003 stmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2; 8007476: cf0f ldmia r7!, {r0, r1, r2, r3} 8007478: f104 0654 add.w r6, r4, #84 ; 0x54 800747c: c60f stmia r6!, {r0, r1, r2, r3} 800747e: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2; 8007482: 4f1b ldr r7, [pc, #108] ; (80074f0 ) ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2; 8007484: e886 0003 stmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2; 8007488: cf0f ldmia r7!, {r0, r1, r2, r3} 800748a: f104 0670 add.w r6, r4, #112 ; 0x70 800748e: c60f stmia r6!, {r0, r1, r2, r3} 8007490: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2; 8007494: 4f17 ldr r7, [pc, #92] ; (80074f4 ) ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2; 8007496: e886 0003 stmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2; 800749a: cf0f ldmia r7!, {r0, r1, r2, r3} 800749c: f104 068c add.w r6, r4, #140 ; 0x8c 80074a0: c60f stmia r6!, {r0, r1, r2, r3} 80074a2: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val; 80074a6: 2300 movs r3, #0 void PE43711_PinInit(void){ 80074a8: b0a7 sub sp, #156 ; 0x9c ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2; 80074aa: e886 0003 stmia.w r6, {r0, r1} PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80074ae: 2298 movs r2, #152 ; 0x98 80074b0: 4629 mov r1, r5 80074b2: 4668 mov r0, sp ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val; 80074b4: 7623 strb r3, [r4, #24] ALL_ATT_3_5G.data1 = ATTEN_3_5G_Initial_Val; 80074b6: f884 3034 strb.w r3, [r4, #52] ; 0x34 ALL_ATT_3_5G.data2 = ATTEN_3_5G_Initial_Val; 80074ba: f884 3050 strb.w r3, [r4, #80] ; 0x50 ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val; 80074be: f884 306c strb.w r3, [r4, #108] ; 0x6c ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val; 80074c2: f884 3088 strb.w r3, [r4, #136] ; 0x88 ALL_ATT_3_5G.data5 = ATTEN_3_5G_Initial_Val; 80074c6: f884 30a4 strb.w r3, [r4, #164] ; 0xa4 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80074ca: f001 ff37 bl 800933c 80074ce: e894 000f ldmia.w r4, {r0, r1, r2, r3} 80074d2: f7ff ff1b bl 800730c } 80074d6: b027 add sp, #156 ; 0x9c 80074d8: bdf0 pop {r4, r5, r6, r7, pc} 80074da: bf00 nop 80074dc: 200004d8 .word 0x200004d8 80074e0: 20000188 .word 0x20000188 80074e4: 20000158 .word 0x20000158 80074e8: 20000128 .word 0x20000128 80074ec: 200001a0 .word 0x200001a0 80074f0: 20000170 .word 0x20000170 80074f4: 20000140 .word 0x20000140 080074f8 : double N_Reg_Value_Calc(double val){ return val / 1000; } uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){ 80074f8: b570 push {r4, r5, r6, lr} 80074fa: 2302 movs r3, #2 80074fc: 4604 mov r4, r0 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 14; i++){ if(_FRAC & 0x01) ret += shift_bit << i; 80074fe: 2501 movs r5, #1 uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){ 8007500: 2000 movs r0, #0 if(_FRAC & 0x01) 8007502: 07e6 lsls r6, r4, #31 ret += shift_bit << i; 8007504: bf48 it mi 8007506: fa05 f603 lslmi.w r6, r5, r3 800750a: f103 0301 add.w r3, r3, #1 800750e: bf48 it mi 8007510: 1980 addmi r0, r0, r6 for(i = 2; i < 14; i++){ 8007512: 2b0e cmp r3, #14 _FRAC = _FRAC >> 1; 8007514: ea4f 0454 mov.w r4, r4, lsr #1 for(i = 2; i < 14; i++){ 8007518: d1f3 bne.n 8007502 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 14; i < 24; i++){ if(_INT & 0x01) ret += shift_bit << i; 800751a: 2401 movs r4, #1 if(_INT & 0x01) 800751c: 07cd lsls r5, r1, #31 ret += shift_bit << i; 800751e: bf48 it mi 8007520: fa04 f503 lslmi.w r5, r4, r3 8007524: f103 0301 add.w r3, r3, #1 8007528: bf48 it mi 800752a: 1940 addmi r0, r0, r5 for(i = 14; i < 24; i++){ 800752c: 2b18 cmp r3, #24 _INT = _INT >> 1; 800752e: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 14; i < 24; i++){ 8007532: d1f3 bne.n 800751c } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ if(_FASTLOCK & 0x01) 8007534: 07d3 lsls r3, r2, #31 ret += shift_bit << i; 8007536: bf48 it mi 8007538: f100 7080 addmi.w r0, r0, #16777216 ; 0x1000000 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } 800753c: bd70 pop {r4, r5, r6, pc} 0800753e : uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){ 800753e: b5f0 push {r4, r5, r6, r7, lr} 8007540: 4606 mov r6, r0 8007542: 2001 movs r0, #1 8007544: 2402 movs r4, #2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 14; i++){ if(_MOD & 0x01) ret += shift_bit << i; 8007546: 4607 mov r7, r0 uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){ 8007548: f89d 5014 ldrb.w r5, [sp, #20] if(_MOD & 0x01) 800754c: f016 0f01 tst.w r6, #1 ret += shift_bit << i; 8007550: bf18 it ne 8007552: fa07 fe04 lslne.w lr, r7, r4 8007556: f104 0401 add.w r4, r4, #1 800755a: bf18 it ne 800755c: 4470 addne r0, lr for(i = 2; i < 14; i++){ 800755e: 2c0e cmp r4, #14 _MOD = _MOD >> 1; 8007560: ea4f 0656 mov.w r6, r6, lsr #1 for(i = 2; i < 14; i++){ 8007564: d1f2 bne.n 800754c } for(i = 14; i < 18; i++){ if(_RCOUNTER & 0x01) ret += shift_bit << i; 8007566: 2601 movs r6, #1 if(_RCOUNTER & 0x01) 8007568: 07cf lsls r7, r1, #31 ret += shift_bit << i; 800756a: bf48 it mi 800756c: fa06 f704 lslmi.w r7, r6, r4 8007570: f104 0401 add.w r4, r4, #1 8007574: bf48 it mi 8007576: 19c0 addmi r0, r0, r7 for(i = 14; i < 18; i++){ 8007578: 2c12 cmp r4, #18 _RCOUNTER = _RCOUNTER >> 1; 800757a: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 14; i < 18; i++){ 800757e: d1f3 bne.n 8007568 } if(_PRESCALER & 0x01) 8007580: 07d7 lsls r7, r2, #31 ret += shift_bit << i++; 8007582: bf44 itt mi 8007584: f500 2080 addmi.w r0, r0, #262144 ; 0x40000 8007588: 2413 movmi r4, #19 if(_RESERVED & 0x01) 800758a: 07de lsls r6, r3, #31 ret += shift_bit << i++; 800758c: bf42 ittt mi 800758e: 2301 movmi r3, #1 8007590: fa03 f404 lslmi.w r4, r3, r4 8007594: 1900 addmi r0, r0, r4 for(i = 19; i < 22; i++){ if(_MUXOUT & 0x01) 8007596: 07ec lsls r4, r5, #31 ret += shift_bit << i; 8007598: bf48 it mi 800759a: f500 2000 addmi.w r0, r0, #524288 ; 0x80000 _MUXOUT = _MUXOUT >> 1; } if(LOAD_CONTROL & 0x01) 800759e: f89d 3018 ldrb.w r3, [sp, #24] if(_MUXOUT & 0x01) 80075a2: 07a9 lsls r1, r5, #30 ret += shift_bit << i; 80075a4: bf48 it mi 80075a6: f500 1080 addmi.w r0, r0, #1048576 ; 0x100000 if(_MUXOUT & 0x01) 80075aa: 076a lsls r2, r5, #29 ret += shift_bit << i; 80075ac: bf48 it mi 80075ae: f500 1000 addmi.w r0, r0, #2097152 ; 0x200000 if(LOAD_CONTROL & 0x01) 80075b2: 07db lsls r3, r3, #31 ret += shift_bit << i++; 80075b4: bf48 it mi 80075b6: f500 0080 addmi.w r0, r0, #4194304 ; 0x400000 return ret; } 80075ba: bdf0 pop {r4, r5, r6, r7, pc} 80075bc: 0000 movs r0, r0 ... 080075c0 : ADF4153_R_N_Reg_st ADF4153_Freq_Calc(uint32_t Freq,uint32_t REFin,uint8_t R_Counter,uint32_t chspacing){ 80075c0: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr} 80075c4: 4604 mov r4, r0 adf4153_st temp_adf4153; double temp = 0; ADF4153_R_N_Reg_st temp_reg; temp_adf4153.PFD_Value = (REFin / R_Counter)* 0.01 ; 80075c6: fbb2 f0f3 udiv r0, r2, r3 ADF4153_R_N_Reg_st ADF4153_Freq_Calc(uint32_t Freq,uint32_t REFin,uint8_t R_Counter,uint32_t chspacing){ 80075ca: 469a mov sl, r3 80075cc: 4688 mov r8, r1 temp_adf4153.PFD_Value = (REFin / R_Counter)* 0.01 ; 80075ce: f7fc ff81 bl 80044d4 <__aeabi_ui2d> 80075d2: a331 add r3, pc, #196 ; (adr r3, 8007698 ) 80075d4: e9d3 2300 ldrd r2, r3, [r3] 80075d8: f7fc fff2 bl 80045c0 <__aeabi_dmul> 80075dc: 4606 mov r6, r0 // printf("chspacing : %d",chspacing); // printf("(temp_adf4153.PFD_Value / chspacing) : %f",((double)(temp_adf4153.PFD_Value / chspacing))); temp = ((double)(temp_adf4153.PFD_Value / chspacing)); 80075de: 980a ldr r0, [sp, #40] ; 0x28 temp_adf4153.PFD_Value = (REFin / R_Counter)* 0.01 ; 80075e0: 460f mov r7, r1 temp = ((double)(temp_adf4153.PFD_Value / chspacing)); 80075e2: f7fc ff77 bl 80044d4 <__aeabi_ui2d> 80075e6: 4602 mov r2, r0 80075e8: 460b mov r3, r1 80075ea: 4630 mov r0, r6 80075ec: 4639 mov r1, r7 80075ee: f7fd f911 bl 8004814 <__aeabi_ddiv> // printf("temp : %f \r\n",temp); temp_adf4153.MOD_Value = temp * 1000000; 80075f2: a32b add r3, pc, #172 ; (adr r3, 80076a0 ) 80075f4: e9d3 2300 ldrd r2, r3, [r3] 80075f8: f7fc ffe2 bl 80045c0 <__aeabi_dmul> 80075fc: f7fd fab8 bl 8004b70 <__aeabi_d2uiz> 8007600: 4605 mov r5, r0 // printf("temp_adf4153.MOD_Value : %d \r\n",temp_adf4153.MOD_Value); // printf("Freq : %d \r\n",Freq); temp_adf4153.N_Value = N_Reg_Value_Calc(((Freq * 10) / (temp_adf4153.PFD_Value / 1000))); 8007602: 200a movs r0, #10 8007604: fb00 f008 mul.w r0, r0, r8 8007608: f7fc ff64 bl 80044d4 <__aeabi_ui2d> 800760c: 2200 movs r2, #0 800760e: 4680 mov r8, r0 8007610: 4689 mov r9, r1 8007612: 4b25 ldr r3, [pc, #148] ; (80076a8 ) 8007614: 4630 mov r0, r6 8007616: 4639 mov r1, r7 8007618: f7fd f8fc bl 8004814 <__aeabi_ddiv> 800761c: 4602 mov r2, r0 800761e: 460b mov r3, r1 8007620: 4640 mov r0, r8 8007622: 4649 mov r1, r9 8007624: f7fd f8f6 bl 8004814 <__aeabi_ddiv> return val / 1000; 8007628: 2200 movs r2, #0 800762a: 4b1f ldr r3, [pc, #124] ; (80076a8 ) 800762c: f7fd f8f2 bl 8004814 <__aeabi_ddiv> temp_adf4153.N_Value /= 1000; 8007630: 2200 movs r2, #0 8007632: 4b1d ldr r3, [pc, #116] ; (80076a8 ) 8007634: f7fd f8ee bl 8004814 <__aeabi_ddiv> 8007638: 460f mov r7, r1 800763a: 4606 mov r6, r0 // printf("temp_adf4153.N_Value : %f \r\n",temp_adf4153.N_Value); temp_adf4153.INT_Value = temp_adf4153.N_Value ; 800763c: f7fd fa98 bl 8004b70 <__aeabi_d2uiz> 8007640: fa1f f880 uxth.w r8, r0 printf("temp_adf4153.PFD_Value : %f \r\ntemp_adf4153.MOD_Value : %f \r\n temp_adf4153.N_Value : %f \r\n temp_adf4153.INT_Value : %f \r\n",temp_adf4153.PFD_Value,temp_adf4153.MOD_Value,temp_adf4153.N_Value,temp_adf4153.INT_Value); } */ #ifdef DEBUG_PRINT printf("\r\ntemp_adf4153.N_Value : %f temp_adf4153.INT_Value : %f temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value); #endif /* DEBUG_PRINT */ temp = temp_adf4153.N_Value - (double)temp_adf4153.INT_Value; 8007644: 4640 mov r0, r8 8007646: f7fc ff45 bl 80044d4 <__aeabi_ui2d> 800764a: 460b mov r3, r1 800764c: 4602 mov r2, r0 800764e: 4639 mov r1, r7 8007650: 4630 mov r0, r6 8007652: f7fc fe01 bl 8004258 <__aeabi_dsub> #ifdef DEBUG_PRINT printf("\r\n temp_adf4153.N_Value - (double)temp_adf4153.INT_Value) : %f temp * (double)temp_adf4153.MOD_Value : %f \r\n",temp,temp * (double)temp_adf4153.MOD_Value); #endif /* DEBUG_PRINT */ temp_adf4153.FRAC_Value = (float)temp * temp_adf4153.MOD_Value; 8007656: f7fd faab bl 8004bb0 <__aeabi_d2f> 800765a: 4606 mov r6, r0 800765c: 4628 mov r0, r5 800765e: f7fd fbad bl 8004dbc <__aeabi_ui2f> 8007662: 4601 mov r1, r0 8007664: 4630 mov r0, r6 8007666: f7fd fc01 bl 8004e6c <__aeabi_fmul> 800766a: f7fd fd4f bl 800510c <__aeabi_f2uiz> printf("R0: %x R1: %x \r\n",N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0),R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0)); #endif /* DEBUG_PRINT */ // printf("N_reg : %08x R_reg :%x\r\n",temp_reg.N_reg,temp_reg.R_reg); temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0); 800766e: 4641 mov r1, r8 8007670: 2200 movs r2, #0 8007672: b280 uxth r0, r0 8007674: f7ff ff40 bl 80074f8 temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0); 8007678: 2300 movs r3, #0 800767a: 2202 movs r2, #2 temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0); 800767c: 4606 mov r6, r0 temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0); 800767e: e88d 000c stmia.w sp, {r2, r3} 8007682: 4651 mov r1, sl 8007684: 2201 movs r2, #1 8007686: b2a8 uxth r0, r5 8007688: f7ff ff59 bl 800753e return temp_reg; 800768c: e884 0041 stmia.w r4, {r0, r6} // R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,1,0); //prescaler 1 : 8/9 0: 4/5 } 8007690: 4620 mov r0, r4 8007692: b002 add sp, #8 8007694: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007698: 47ae147b .word 0x47ae147b 800769c: 3f847ae1 .word 0x3f847ae1 80076a0: 00000000 .word 0x00000000 80076a4: 412e8480 .word 0x412e8480 80076a8: 408f4000 .word 0x408f4000 080076ac : temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); ADF4153_Module_Ctrl(Pll_test2,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); // ADF4153_Module_Ctrl(Pll_test2,0x313840,0x14BE81,0x13C2,0x3); HAL_Delay(1); #endif // PYJ.2019.08.09_END -- if( Flash_Save_data[INDEX_PLL_3_5G_LOW_H] == 0 80076ac: 4b0e ldr r3, [pc, #56] ; (80076e8 ) 80076ae: 7f9a ldrb r2, [r3, #30] 80076b0: b94a cbnz r2, 80076c6 && Flash_Save_data[INDEX_PLL_3_5G_LOW_M] == 0 80076b2: 7fda ldrb r2, [r3, #31] 80076b4: b93a cbnz r2, 80076c6 &&Flash_Save_data[INDEX_PLL_3_5G_LOW_L] == 0) 80076b6: f893 2020 ldrb.w r2, [r3, #32] 80076ba: b922 cbnz r2, 80076c6 { Flash_Save_data[INDEX_PLL_3_5G_LOW_H] = ((34655 & 0xFF0000) >> 16); Flash_Save_data[INDEX_PLL_3_5G_LOW_M] = ((34655 & 0x00FF00) >> 8); 80076bc: 2287 movs r2, #135 ; 0x87 80076be: 77da strb r2, [r3, #31] Flash_Save_data[INDEX_PLL_3_5G_LOW_L] = (34655 & 0x0000FF); 80076c0: 225f movs r2, #95 ; 0x5f 80076c2: f883 2020 strb.w r2, [r3, #32] } if(Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] == 0 80076c6: f893 2021 ldrb.w r2, [r3, #33] ; 0x21 80076ca: b95a cbnz r2, 80076e4 && Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] == 0 80076cc: f893 2022 ldrb.w r2, [r3, #34] ; 0x22 80076d0: b942 cbnz r2, 80076e4 && Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] == 0) 80076d2: f893 2023 ldrb.w r2, [r3, #35] ; 0x23 80076d6: b92a cbnz r2, 80076e4 { Flash_Save_data[INDEX_PLL_3_5G_HIGH_H] = ((39345 & 0xFF0000) >> 16); Flash_Save_data[INDEX_PLL_3_5G_HIGH_M] = ((39345 & 0x00FF00) >> 8); 80076d8: 2299 movs r2, #153 ; 0x99 80076da: f883 2022 strb.w r2, [r3, #34] ; 0x22 Flash_Save_data[INDEX_PLL_3_5G_HIGH_L] = (39345 & 0x0000FF); 80076de: 22b1 movs r2, #177 ; 0xb1 80076e0: f883 2023 strb.w r2, [r3, #35] ; 0x23 80076e4: 4770 bx lr 80076e6: bf00 nop 80076e8: 20000580 .word 0x20000580 080076ec : } } void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){ 80076ec: b084 sub sp, #16 80076ee: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80076f2: b085 sub sp, #20 80076f4: ac0e add r4, sp, #56 ; 0x38 80076f6: e884 000f stmia.w r4, {r0, r1, r2, r3} R3 = R3 & 0x0007FF; 80076fa: 9b17 ldr r3, [sp, #92] ; 0x5c 80076fc: f8bd 803c ldrh.w r8, [sp, #60] ; 0x3c 8007700: f3c3 0a0a ubfx sl, r3, #0, #11 R2 = R2 & 0x00FFFF; 8007704: f8bd 3058 ldrh.w r3, [sp, #88] ; 0x58 8007708: 9c10 ldr r4, [sp, #64] ; 0x40 800770a: 9301 str r3, [sp, #4] R1 = R1 & 0xFFFFFF; 800770c: 9b15 ldr r3, [sp, #84] ; 0x54 800770e: f8bd 5044 ldrh.w r5, [sp, #68] ; 0x44 8007712: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8007716: 9302 str r3, [sp, #8] R0 = R0 & 0xFFFFFF; 8007718: 9b14 ldr r3, [sp, #80] ; 0x50 800771a: 9e12 ldr r6, [sp, #72] ; 0x48 800771c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8007720: f8bd 704c ldrh.w r7, [sp, #76] ; 0x4c // ADF4153_Freq_Calc(3461500000,40000000,2,5000); HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007724: 2200 movs r2, #0 8007726: 4641 mov r1, r8 R0 = R0 & 0xFFFFFF; 8007728: 9303 str r3, [sp, #12] 800772a: 4681 mov r9, r0 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800772c: f7fe fc4a bl 8005fc4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007730: 2200 movs r2, #0 8007732: 4629 mov r1, r5 8007734: 4620 mov r0, r4 8007736: f7fe fc45 bl 8005fc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800773a: 2200 movs r2, #0 800773c: 4639 mov r1, r7 800773e: 4630 mov r0, r6 8007740: f7fe fc40 bl 8005fc4 8007744: f04f 0b0b mov.w fp, #11 printf("YJ :R0: %x R1: %x R2 : %x R3 : %x ",R0,R1,R2,R3); printf("\r\n"); #endif /* DEBUG_PRINT */ /* R3 Ctrl */ for(int i =0; i < 11; i++){ if(R3 & 0x000400){ 8007748: f41a 6280 ands.w r2, sl, #1024 ; 0x400 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 800774c: bf18 it ne 800774e: 2201 movne r2, #1 #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007750: 4629 mov r1, r5 8007752: 4620 mov r0, r4 8007754: f7fe fc36 bl 8005fc4 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(10); 8007758: 200a movs r0, #10 800775a: f000 fa2f bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800775e: 2201 movs r2, #1 8007760: 4641 mov r1, r8 8007762: 4648 mov r0, r9 8007764: f7fe fc2e bl 8005fc4 Pol_Delay_us(10); 8007768: 200a movs r0, #10 800776a: f000 fa27 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800776e: 2200 movs r2, #0 8007770: 4641 mov r1, r8 8007772: 4648 mov r0, r9 8007774: f7fe fc26 bl 8005fc4 for(int i =0; i < 11; i++){ 8007778: f1bb 0b01 subs.w fp, fp, #1 R3 = (R3 << 1); 800777c: ea4f 0a4a mov.w sl, sl, lsl #1 for(int i =0; i < 11; i++){ 8007780: d1e2 bne.n 8007748 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8007782: 2201 movs r2, #1 8007784: 4639 mov r1, r7 8007786: 4630 mov r0, r6 8007788: f7fe fc1c bl 8005fc4 Pol_Delay_us(10); 800778c: 200a movs r0, #10 800778e: f000 fa15 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8007792: 465a mov r2, fp 8007794: 4639 mov r1, r7 8007796: 4630 mov r0, r6 8007798: f7fe fc14 bl 8005fc4 800779c: f04f 0a10 mov.w sl, #16 /* R2 Ctrl */ for(int i =0; i < 16; i++){ if(R2 & 0x008000){ 80077a0: 9b01 ldr r3, [sp, #4] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80077a2: 4629 mov r1, r5 if(R2 & 0x008000){ 80077a4: f413 4200 ands.w r2, r3, #32768 ; 0x8000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80077a8: bf18 it ne 80077aa: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80077ac: 4620 mov r0, r4 80077ae: f7fe fc09 bl 8005fc4 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(10); 80077b2: 200a movs r0, #10 80077b4: f000 fa02 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80077b8: 2201 movs r2, #1 80077ba: 4641 mov r1, r8 80077bc: 4648 mov r0, r9 80077be: f7fe fc01 bl 8005fc4 Pol_Delay_us(10); 80077c2: 200a movs r0, #10 80077c4: f000 f9fa bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80077c8: 2200 movs r2, #0 80077ca: 4641 mov r1, r8 80077cc: 4648 mov r0, r9 80077ce: f7fe fbf9 bl 8005fc4 R2 = ((R2 << 1) & 0x00FFFF); 80077d2: 9b01 ldr r3, [sp, #4] for(int i =0; i < 16; i++){ 80077d4: f1ba 0a01 subs.w sl, sl, #1 R2 = ((R2 << 1) & 0x00FFFF); 80077d8: ea4f 0343 mov.w r3, r3, lsl #1 80077dc: b29b uxth r3, r3 80077de: 9301 str r3, [sp, #4] for(int i =0; i < 16; i++){ 80077e0: d1de bne.n 80077a0 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80077e2: 2201 movs r2, #1 80077e4: 4639 mov r1, r7 80077e6: 4630 mov r0, r6 80077e8: f7fe fbec bl 8005fc4 Pol_Delay_us(10); 80077ec: 200a movs r0, #10 80077ee: f000 f9e5 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80077f2: 4652 mov r2, sl 80077f4: 4639 mov r1, r7 80077f6: 4630 mov r0, r6 80077f8: f7fe fbe4 bl 8005fc4 80077fc: f04f 0a18 mov.w sl, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 8007800: 9b02 ldr r3, [sp, #8] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007802: 4629 mov r1, r5 if(R1 & 0x800000){ 8007804: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8007808: bf18 it ne 800780a: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800780c: 4620 mov r0, r4 800780e: f7fe fbd9 bl 8005fc4 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(10); 8007812: 200a movs r0, #10 8007814: f000 f9d2 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8007818: 2201 movs r2, #1 800781a: 4641 mov r1, r8 800781c: 4648 mov r0, r9 800781e: f7fe fbd1 bl 8005fc4 Pol_Delay_us(10); 8007822: 200a movs r0, #10 8007824: f000 f9ca bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007828: 2200 movs r2, #0 800782a: 4641 mov r1, r8 800782c: 4648 mov r0, r9 800782e: f7fe fbc9 bl 8005fc4 R1 = ((R1 << 1) & 0xFFFFFF); 8007832: 9b02 ldr r3, [sp, #8] for(int i =0; i < 24; i++){ 8007834: f1ba 0a01 subs.w sl, sl, #1 R1 = ((R1 << 1) & 0xFFFFFF); 8007838: ea4f 0343 mov.w r3, r3, lsl #1 800783c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8007840: 9302 str r3, [sp, #8] for(int i =0; i < 24; i++){ 8007842: d1dd bne.n 8007800 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8007844: 2201 movs r2, #1 8007846: 4639 mov r1, r7 8007848: 4630 mov r0, r6 800784a: f7fe fbbb bl 8005fc4 Pol_Delay_us(10); 800784e: 200a movs r0, #10 8007850: f000 f9b4 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8007854: 4652 mov r2, sl 8007856: 4639 mov r1, r7 8007858: 4630 mov r0, r6 800785a: f7fe fbb3 bl 8005fc4 800785e: f04f 0a18 mov.w sl, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 8007862: 9b03 ldr r3, [sp, #12] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007864: 4629 mov r1, r5 if(R0 & 0x800000){ 8007866: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 800786a: bf18 it ne 800786c: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800786e: 4620 mov r0, r4 8007870: f7fe fba8 bl 8005fc4 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(10); 8007874: 200a movs r0, #10 8007876: f000 f9a1 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800787a: 2201 movs r2, #1 800787c: 4641 mov r1, r8 800787e: 4648 mov r0, r9 8007880: f7fe fba0 bl 8005fc4 Pol_Delay_us(10); 8007884: 200a movs r0, #10 8007886: f000 f999 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800788a: 2200 movs r2, #0 800788c: 4641 mov r1, r8 800788e: 4648 mov r0, r9 8007890: f7fe fb98 bl 8005fc4 R0 = ((R0 << 1) & 0xFFFFFF); 8007894: 9b03 ldr r3, [sp, #12] for(int i =0; i < 24; i++){ 8007896: f1ba 0a01 subs.w sl, sl, #1 R0 = ((R0 << 1) & 0xFFFFFF); 800789a: ea4f 0343 mov.w r3, r3, lsl #1 800789e: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80078a2: 9303 str r3, [sp, #12] for(int i =0; i < 24; i++){ 80078a4: d1dd bne.n 8007862 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80078a6: 4652 mov r2, sl 80078a8: 4629 mov r1, r5 80078aa: 4620 mov r0, r4 80078ac: f7fe fb8a bl 8005fc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80078b0: 4639 mov r1, r7 80078b2: 2201 movs r2, #1 80078b4: 4630 mov r0, r6 80078b6: f7fe fb85 bl 8005fc4 Pol_Delay_us(10); 80078ba: 200a movs r0, #10 80078bc: f000 f97e bl 8007bbc HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80078c0: 4652 mov r2, sl 80078c2: 4639 mov r1, r7 80078c4: 4630 mov r0, r6 } 80078c6: b005 add sp, #20 80078c8: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80078cc: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80078ce: f7fe bb79 b.w 8005fc4 ... 080078d4 : #define USER_DATA2 (FLASH_USER_START_ADDR + 4) #define USER_DATA3 (FLASH_USER_START_ADDR + 8) #define USER_DATA4 (FLASH_USER_START_ADDR + 12) void FLASH_Byte_Write(uint8_t* data){ 80078d4: b538 push {r3, r4, r5, lr} /* 페이지 단위로 지울수 있도록 구조체변수를 선언해 주고 멤버변수값들을 정해줍니다. 데이터를 새로 쓰기위해서는 먼저 페이지 단위로 메모리를 지워 줘야 합니다. */ static FLASH_EraseInitTypeDef EraseInitStruct; EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; //0x00 80078d6: 2300 movs r3, #0 80078d8: 4c1a ldr r4, [pc, #104] ; (8007944 ) EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; // 지우기 페이지의 시작 어드레스 EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; //지울 페이지 수 static uint32_t PAGEError = 0; // printf("Flash Write Start \r\n"); data[INDEX_BLUE_HEADER] = 0xbe; 80078da: 22be movs r2, #190 ; 0xbe EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; //0x00 80078dc: 6023 str r3, [r4, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; // 지우기 페이지의 시작 어드레스 80078de: 4b1a ldr r3, [pc, #104] ; (8007948 ) void FLASH_Byte_Write(uint8_t* data){ 80078e0: 4605 mov r5, r0 EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; // 지우기 페이지의 시작 어드레스 80078e2: 60a3 str r3, [r4, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; //지울 페이지 수 80078e4: 2301 movs r3, #1 80078e6: 60e3 str r3, [r4, #12] data[INDEX_BLUE_TYPE] = 1; 80078e8: 7043 strb r3, [r0, #1] data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 80078ea: 2360 movs r3, #96 ; 0x60 80078ec: 7083 strb r3, [r0, #2] data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_EOF - 1; 80078ee: 2361 movs r3, #97 ; 0x61 data[INDEX_BLUE_HEADER] = 0xbe; 80078f0: 7002 strb r2, [r0, #0] data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_EOF - 1; 80078f2: 70c3 strb r3, [r0, #3] /* Flash메모리를 조작 할 수 있도록 락을 풀어 줍니다. */ HAL_FLASH_Unlock(); 80078f4: f7fe f976 bl 8005be4 /* 앞에서 설정한 페이지를 지워 줍니다. 페이지 지우기에 실패하면 무한루프에 빠지게 하여 기기의 오작동을 예방합니다. */ if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK) { 80078f8: 4914 ldr r1, [pc, #80] ; (800794c ) 80078fa: 4620 mov r0, r4 80078fc: f7fe fa22 bl 8005d44 8007900: b118 cbz r0, 800790a printf("Eraser Error\r\n"); 8007902: 4813 ldr r0, [pc, #76] ; (8007950 ) 8007904: f002 fa02 bl 8009d0c 8007908: e7fe b.n 8007908 800790a: 4604 mov r4, r0 */ /////////유저가 설정한 페이지에 데이터 쓰기 //////////////////////////////////////////////////// //HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){ WriteData = ((data[i]) & 0x00FF); WriteData += ((data[i + 1] << 8) & 0xFF00); 800790c: 192b adds r3, r5, r4 800790e: 785b ldrb r3, [r3, #1] WriteData = ((data[i]) & 0x00FF); 8007910: 5d2a ldrb r2, [r5, r4] if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, FLASH_USER_START_ADDR + i, ((uint16_t)WriteData)) != HAL_OK){ 8007912: f104 6100 add.w r1, r4, #134217728 ; 0x8000000 WriteData += ((data[i + 1] << 8) & 0xFF00); 8007916: eb02 2203 add.w r2, r2, r3, lsl #8 if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, FLASH_USER_START_ADDR + i, ((uint16_t)WriteData)) != HAL_OK){ 800791a: b292 uxth r2, r2 800791c: 2300 movs r3, #0 800791e: f501 21ff add.w r1, r1, #522240 ; 0x7f800 8007922: 2001 movs r0, #1 8007924: f7fe f9a4 bl 8005c70 8007928: b120 cbz r0, 8007934 printf("Write Error %d\r\n",__LINE__); 800792a: 21a5 movs r1, #165 ; 0xa5 800792c: 4809 ldr r0, [pc, #36] ; (8007954 ) 800792e: f002 f979 bl 8009c24 8007932: e7fe b.n 8007932 for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){ 8007934: 3402 adds r4, #2 8007936: 2c64 cmp r4, #100 ; 0x64 8007938: d1e8 bne.n 800790c printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i)); } #endif // PYJ.2019.07.31_END -- /////////////////////////////////////////////////////////////////////////////////////////////////// } 800793a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_FLASH_Lock(); 800793e: f7fe b963 b.w 8005c08 8007942: bf00 nop 8007944: 2000043c .word 0x2000043c 8007948: 0807f800 .word 0x0807f800 800794c: 2000044c .word 0x2000044c 8007950: 0800bc58 .word 0x0800bc58 8007954: 0800bc66 .word 0x0800bc66 08007958 : uint8_t Bluecell_Flash_Write(uint8_t* data){ 8007958: b508 push {r3, lr} /*Variable used for Erase procedure*/ // flashtest(); FLASH_Byte_Write(&data[INDEX_BLUE_HEADER]); 800795a: f7ff ffbb bl 80078d4 return true; } 800795e: 2001 movs r0, #1 8007960: bd08 pop {r3, pc} 08007962 : bool Bluecell_Flash_Read(uint8_t* data){ for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){ 8007962: 2300 movs r3, #0 8007964: f103 6200 add.w r2, r3, #134217728 ; 0x8000000 8007968: f502 22ff add.w r2, r2, #522240 ; 0x7f800 // printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i)); data[INDEX_BLUE_HEADER + i] = *(__IO uint16_t *)(FLASH_USER_START_ADDR + i) &0x00FF; 800796c: 8811 ldrh r1, [r2, #0] 800796e: 54c1 strb r1, [r0, r3] data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8; 8007970: 8812 ldrh r2, [r2, #0] 8007972: 18c1 adds r1, r0, r3 for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){ 8007974: 3302 adds r3, #2 data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8; 8007976: f3c2 2207 ubfx r2, r2, #8, #8 for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){ 800797a: 2b64 cmp r3, #100 ; 0x64 data[INDEX_BLUE_HEADER + i + 1] = (*(__IO uint16_t *)(FLASH_USER_START_ADDR + i) & 0xFF00) >> 8; 800797c: 704a strb r2, [r1, #1] for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){ 800797e: d1f1 bne.n 8007964 for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){ printf("Data = %x\r\n", data[i]); } #endif // PYJ.2019.07.31_END -- return true; } 8007980: 2001 movs r0, #1 8007982: 4770 bx lr 08007984 : static void kConstPrinter(Bluecell_Prot_Index k) { printf("%s", Bluecell_Prot_IndexStr[k]); } #endif /* DEBUG_PRINT */ void Path_Init(void){ 8007984: b570 push {r4, r5, r6, lr} Prev_data[INDEX_PATH_EN_1_8G_DL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin); 8007986: 4d24 ldr r5, [pc, #144] ; (8007a18 ) 8007988: f44f 4180 mov.w r1, #16384 ; 0x4000 800798c: 4628 mov r0, r5 800798e: f7fe fb13 bl 8005fb8 8007992: 4c22 ldr r4, [pc, #136] ; (8007a1c ) Prev_data[INDEX_PATH_EN_1_8G_UL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin); 8007994: f44f 4100 mov.w r1, #32768 ; 0x8000 Prev_data[INDEX_PATH_EN_1_8G_DL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin); 8007998: f884 0043 strb.w r0, [r4, #67] ; 0x43 Prev_data[INDEX_PATH_EN_1_8G_UL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin); 800799c: 4628 mov r0, r5 800799e: f7fe fb0b bl 8005fb8 Prev_data[INDEX_PATH_EN_2_1G_DL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin); 80079a2: 4e1f ldr r6, [pc, #124] ; (8007a20 ) Prev_data[INDEX_PATH_EN_1_8G_UL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin); 80079a4: f884 0044 strb.w r0, [r4, #68] ; 0x44 Prev_data[INDEX_PATH_EN_2_1G_DL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin); 80079a8: 2101 movs r1, #1 80079aa: 4630 mov r0, r6 80079ac: f7fe fb04 bl 8005fb8 Prev_data[INDEX_PATH_EN_2_1G_UL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin); 80079b0: 2102 movs r1, #2 Prev_data[INDEX_PATH_EN_2_1G_DL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin); 80079b2: f884 0045 strb.w r0, [r4, #69] ; 0x45 Prev_data[INDEX_PATH_EN_2_1G_UL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin); 80079b6: 4630 mov r0, r6 80079b8: f7fe fafe bl 8005fb8 Prev_data[INDEX_PATH_EN_3_5G_L] = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin); 80079bc: 2180 movs r1, #128 ; 0x80 Prev_data[INDEX_PATH_EN_2_1G_UL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin); 80079be: f884 0046 strb.w r0, [r4, #70] ; 0x46 Prev_data[INDEX_PATH_EN_3_5G_L] = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin); 80079c2: 4818 ldr r0, [pc, #96] ; (8007a24 ) 80079c4: f7fe faf8 bl 8005fb8 Prev_data[INDEX_PATH_EN_3_5G_H] = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin); 80079c8: f506 6600 add.w r6, r6, #2048 ; 0x800 Prev_data[INDEX_PATH_EN_3_5G_L] = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin); 80079cc: f884 004a strb.w r0, [r4, #74] ; 0x4a Prev_data[INDEX_PATH_EN_3_5G_H] = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin); 80079d0: f44f 7100 mov.w r1, #512 ; 0x200 80079d4: 4630 mov r0, r6 80079d6: f7fe faef bl 8005fb8 Prev_data[INDEX_PATH_EN_3_5G_DL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin); 80079da: f44f 6180 mov.w r1, #1024 ; 0x400 Prev_data[INDEX_PATH_EN_3_5G_H] = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin); 80079de: f884 0049 strb.w r0, [r4, #73] ; 0x49 Prev_data[INDEX_PATH_EN_3_5G_DL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin); 80079e2: 4630 mov r0, r6 80079e4: f7fe fae8 bl 8005fb8 Prev_data[INDEX_PATH_EN_3_5G_UL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin); 80079e8: f44f 6100 mov.w r1, #2048 ; 0x800 Prev_data[INDEX_PATH_EN_3_5G_DL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin); 80079ec: f884 0047 strb.w r0, [r4, #71] ; 0x47 Prev_data[INDEX_PATH_EN_3_5G_UL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin); 80079f0: 4630 mov r0, r6 80079f2: f7fe fae1 bl 8005fb8 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin); 80079f6: f44f 5180 mov.w r1, #4096 ; 0x1000 Prev_data[INDEX_PATH_EN_3_5G_UL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin); 80079fa: f884 0048 strb.w r0, [r4, #72] ; 0x48 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin); 80079fe: 4628 mov r0, r5 8007a00: f7fe fada bl 8005fb8 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin); 8007a04: f44f 6180 mov.w r1, #1024 ; 0x400 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin); 8007a08: f884 004b strb.w r0, [r4, #75] ; 0x4b Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin); 8007a0c: 4628 mov r0, r5 8007a0e: f7fe fad3 bl 8005fb8 8007a12: f884 004c strb.w r0, [r4, #76] ; 0x4c 8007a16: bd70 pop {r4, r5, r6, pc} 8007a18: 40011000 .word 0x40011000 8007a1c: 200005e3 .word 0x200005e3 8007a20: 40011800 .word 0x40011800 8007a24: 40011400 .word 0x40011400 08007a28 : } void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){ static uint32_t pinctrl = 0; static uint32_t pintemp = 0; // printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd); switch(type){ 8007a28: 3843 subs r0, #67 ; 0x43 void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){ 8007a2a: 460a mov r2, r1 switch(type){ 8007a2c: 280d cmp r0, #13 8007a2e: d840 bhi.n 8007ab2 8007a30: e8df f000 tbb [pc, r0] 8007a34: 18120d07 .word 0x18120d07 8007a38: 1c212c27 .word 0x1c212c27 8007a3c: 3b3b3631 .word 0x3b3b3631 8007a40: 3b3b .short 0x3b3b case INDEX_PATH_EN_1_8G_DL : #if 0 // PYJ.2019.07.29_BEGIN -- printf("\r\n LINE %d\r\n",__LINE__); #endif // PYJ.2019.07.29_END -- if(cmd) 8007a42: b101 cbz r1, 8007a46 HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET); 8007a44: 2201 movs r2, #1 else HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET); 8007a46: f44f 4180 mov.w r1, #16384 ; 0x4000 case INDEX_PLL_ON_OFF_3_5G_L: // printf("\r\n LINE %d\r\n",__LINE__); if(cmd) HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET); else HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET); 8007a4a: 481b ldr r0, [pc, #108] ; (8007ab8 ) 8007a4c: e008 b.n 8007a60 if(cmd) 8007a4e: b101 cbz r1, 8007a52 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET); 8007a50: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET); 8007a52: f44f 4100 mov.w r1, #32768 ; 0x8000 8007a56: e7f8 b.n 8007a4a if(cmd) 8007a58: b101 cbz r1, 8007a5c HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET); 8007a5a: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET); 8007a5c: 2101 movs r1, #1 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007a5e: 4817 ldr r0, [pc, #92] ; (8007abc ) HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET); 8007a60: f7fe bab0 b.w 8005fc4 if(cmd) 8007a64: b101 cbz r1, 8007a68 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET); 8007a66: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007a68: 2102 movs r1, #2 8007a6a: e7f8 b.n 8007a5e if(cmd){ 8007a6c: b101 cbz r1, 8007a70 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET); 8007a6e: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET); 8007a70: 2180 movs r1, #128 ; 0x80 8007a72: 4813 ldr r0, [pc, #76] ; (8007ac0 ) 8007a74: e7f4 b.n 8007a60 if(cmd){ 8007a76: b101 cbz r1, 8007a7a HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET); 8007a78: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET); 8007a7a: f44f 7100 mov.w r1, #512 ; 0x200 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET); 8007a7e: 4811 ldr r0, [pc, #68] ; (8007ac4 ) 8007a80: e7ee b.n 8007a60 if(cmd) 8007a82: b101 cbz r1, 8007a86 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET); 8007a84: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET); 8007a86: f44f 6180 mov.w r1, #1024 ; 0x400 8007a8a: e7f8 b.n 8007a7e if(cmd) 8007a8c: b101 cbz r1, 8007a90 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET); 8007a8e: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET); 8007a90: f44f 6100 mov.w r1, #2048 ; 0x800 8007a94: e7f3 b.n 8007a7e if(cmd) 8007a96: b101 cbz r1, 8007a9a HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET); 8007a98: 2201 movs r2, #1 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET); 8007a9a: f44f 5180 mov.w r1, #4096 ; 0x1000 8007a9e: e7d4 b.n 8007a4a if(cmd) 8007aa0: b101 cbz r1, 8007aa4 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET); 8007aa2: 2201 movs r2, #1 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET); 8007aa4: f44f 6180 mov.w r1, #1024 ; 0x400 8007aa8: e7cf b.n 8007a4a 8007aaa: 4b06 ldr r3, [pc, #24] ; (8007ac4 ) break; case INDEX_T_SYNC_DL: case INDEX__T_SYNC_UL: case INDEX_T_SYNC_UL: case INDEX__T_SYNC_DL: if(cmd) 8007aac: b111 cbz r1, 8007ab4 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET); } #else { pintemp = (uint32_t)((_T_SYNC_DL_Pin | T_SYNC_DL_Pin) | ((uint32_t)_T_SYNC_UL_Pin << 16U) | ((uint32_t)T_SYNC_UL_Pin << 16U)); _T_SYNC_UL_GPIO_Port->BSRR = pintemp; 8007aae: 4a06 ldr r2, [pc, #24] ; (8007ac8 ) // HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin|T_SYNC_DL_Pin, GPIO_PIN_SET); } else { pintemp = (uint32_t)((_T_SYNC_UL_Pin | T_SYNC_UL_Pin) | ((uint32_t)_T_SYNC_DL_Pin << 16U) | ((uint32_t)T_SYNC_DL_Pin << 16U)); _T_SYNC_UL_GPIO_Port->BSRR = pintemp; 8007ab0: 611a str r2, [r3, #16] 8007ab2: 4770 bx lr 8007ab4: 4a05 ldr r2, [pc, #20] ; (8007acc ) 8007ab6: e7fb b.n 8007ab0 8007ab8: 40011000 .word 0x40011000 8007abc: 40011800 .word 0x40011800 8007ac0: 40011400 .word 0x40011400 8007ac4: 40012000 .word 0x40012000 8007ac8: 00600180 .word 0x00600180 8007acc: 01800060 .word 0x01800060 08007ad0 : #endif /* DEBUG_PRINT */ break; } } void ATTEN_PLL_PATH_Initialize(void){ 8007ad0: b510 push {r4, lr} #if 0 // PYJ.2019.07.31_BEGIN -- for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){ printf("Data = %x\r\n", Flash_Save_data[i]); } #endif // PYJ.2019.07.31_END -- Flash_Save_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Flash_Save_data[Type], Flash_Save_data[Length]); 8007ad2: 4c07 ldr r4, [pc, #28] ; (8007af0 ) 8007ad4: 78a1 ldrb r1, [r4, #2] 8007ad6: 1c60 adds r0, r4, #1 8007ad8: f7ff fbce bl 8007278 8007adc: f884 0061 strb.w r0, [r4, #97] ; 0x61 RF_Ctrl_Main(&Flash_Save_data[INDEX_BLUE_HEADER]); 8007ae0: 4620 mov r0, r4 8007ae2: f001 fb8d bl 8009200 RF_Status_Get(); } 8007ae6: e8bd 4010 ldmia.w sp!, {r4, lr} RF_Status_Get(); 8007aea: f000 be6f b.w 80087cc 8007aee: bf00 nop 8007af0: 20000580 .word 0x20000580 08007af4 : void Power_ON_OFF_Initialize(void){ 8007af4: b570 push {r4, r5, r6, lr} /* * * PATH PLL ON OFF SECTION* * */ HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port ,PATH_EN_3_5G_L_Pin , GPIO_PIN_RESET); 8007af6: 4d2e ldr r5, [pc, #184] ; (8007bb0 ) HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port ,PATH_EN_3_5G_H_Pin , GPIO_PIN_RESET); 8007af8: 4c2e ldr r4, [pc, #184] ; (8007bb4 ) HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port ,PATH_EN_3_5G_L_Pin , GPIO_PIN_RESET); 8007afa: 4628 mov r0, r5 8007afc: 2200 movs r2, #0 8007afe: 2180 movs r1, #128 ; 0x80 8007b00: f7fe fa60 bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port ,PATH_EN_3_5G_H_Pin , GPIO_PIN_RESET); 8007b04: 4620 mov r0, r4 8007b06: 2200 movs r2, #0 8007b08: f44f 7100 mov.w r1, #512 ; 0x200 8007b0c: f7fe fa5a bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port ,PATH_EN_3_5G_DL_Pin , GPIO_PIN_RESET); 8007b10: 4620 mov r0, r4 8007b12: 2200 movs r2, #0 8007b14: f44f 6180 mov.w r1, #1024 ; 0x400 8007b18: f7fe fa54 bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port ,PATH_EN_3_5G_UL_Pin , GPIO_PIN_RESET); 8007b1c: 4620 mov r0, r4 8007b1e: 2200 movs r2, #0 8007b20: f44f 6100 mov.w r1, #2048 ; 0x800 8007b24: f7fe fa4e bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port ,PATH_EN_3_5G_L_Pin , GPIO_PIN_RESET); 8007b28: 4628 mov r0, r5 8007b2a: 2200 movs r2, #0 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET); 8007b2c: f5a5 6580 sub.w r5, r5, #1024 ; 0x400 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port ,PATH_EN_3_5G_L_Pin , GPIO_PIN_RESET); 8007b30: 2180 movs r1, #128 ; 0x80 8007b32: f7fe fa47 bl 8005fc4 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port ,PATH_EN_2_1G_DL_Pin , GPIO_PIN_RESET); 8007b36: 4e20 ldr r6, [pc, #128] ; (8007bb8 ) HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET); 8007b38: 4628 mov r0, r5 8007b3a: 2200 movs r2, #0 8007b3c: f44f 5180 mov.w r1, #4096 ; 0x1000 8007b40: f7fe fa40 bl 8005fc4 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET); 8007b44: 4628 mov r0, r5 8007b46: 2200 movs r2, #0 8007b48: f44f 6180 mov.w r1, #1024 ; 0x400 8007b4c: f7fe fa3a bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port ,PATH_EN_2_1G_DL_Pin , GPIO_PIN_RESET); 8007b50: 4630 mov r0, r6 8007b52: 2200 movs r2, #0 8007b54: 2101 movs r1, #1 8007b56: f7fe fa35 bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port ,PATH_EN_2_1G_UL_Pin , GPIO_PIN_RESET); 8007b5a: 4630 mov r0, r6 8007b5c: 2200 movs r2, #0 8007b5e: 2102 movs r1, #2 8007b60: f7fe fa30 bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port ,PATH_EN_1_8G_DL_Pin , GPIO_PIN_RESET); 8007b64: 4628 mov r0, r5 8007b66: 2200 movs r2, #0 8007b68: f44f 4180 mov.w r1, #16384 ; 0x4000 8007b6c: f7fe fa2a bl 8005fc4 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port ,PATH_EN_1_8G_UL_Pin , GPIO_PIN_RESET); 8007b70: 4628 mov r0, r5 8007b72: 2200 movs r2, #0 8007b74: f44f 4100 mov.w r1, #32768 ; 0x8000 8007b78: f7fe fa24 bl 8005fc4 /* * * TDD SECTION* * */ HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET); 8007b7c: 4620 mov r0, r4 8007b7e: 2200 movs r2, #0 8007b80: 2120 movs r1, #32 8007b82: f7fe fa1f bl 8005fc4 HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET); 8007b86: 4620 mov r0, r4 8007b88: 2200 movs r2, #0 8007b8a: 2140 movs r1, #64 ; 0x40 8007b8c: f7fe fa1a bl 8005fc4 HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET); 8007b90: 4620 mov r0, r4 8007b92: 2201 movs r2, #1 8007b94: 2180 movs r1, #128 ; 0x80 8007b96: f7fe fa15 bl 8005fc4 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET); 8007b9a: 4620 mov r0, r4 8007b9c: 2201 movs r2, #1 8007b9e: f44f 7180 mov.w r1, #256 ; 0x100 8007ba2: f7fe fa0f bl 8005fc4 HAL_Delay(1); } 8007ba6: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} HAL_Delay(1); 8007baa: 2001 movs r0, #1 8007bac: f7fd bb16 b.w 80051dc 8007bb0: 40011400 .word 0x40011400 8007bb4: 40012000 .word 0x40012000 8007bb8: 40011800 .word 0x40011800 08007bbc : HAL_UART_Transmit_DMA(&huart1,&temp_data[INDEX_BLUE_HEADER],temp_data[INDEX_BLUE_LENGTH] + 3); } void Pol_Delay_us(volatile uint32_t microseconds) { /* Go to number of cycles for system */ microseconds *= (SystemCoreClock / 1000000); 8007bbc: 4a08 ldr r2, [pc, #32] ; (8007be0 ) 8007bbe: 4909 ldr r1, [pc, #36] ; (8007be4 ) 8007bc0: 6812 ldr r2, [r2, #0] { 8007bc2: b082 sub sp, #8 microseconds *= (SystemCoreClock / 1000000); 8007bc4: fbb2 f2f1 udiv r2, r2, r1 { 8007bc8: 9001 str r0, [sp, #4] microseconds *= (SystemCoreClock / 1000000); 8007bca: 9b01 ldr r3, [sp, #4] 8007bcc: 4353 muls r3, r2 8007bce: 9301 str r3, [sp, #4] /* Delay till end */ while (microseconds--); 8007bd0: 9b01 ldr r3, [sp, #4] 8007bd2: 1e5a subs r2, r3, #1 8007bd4: 9201 str r2, [sp, #4] 8007bd6: 2b00 cmp r3, #0 8007bd8: d1fa bne.n 8007bd0 } 8007bda: b002 add sp, #8 8007bdc: 4770 bx lr 8007bde: bf00 nop 8007be0: 20000218 .word 0x20000218 8007be4: 000f4240 .word 0x000f4240 08007be8 : void Boot_LED_Toggle(void){ 8007be8: b510 push {r4, lr} if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;} 8007bea: 4c06 ldr r4, [pc, #24] ; (8007c04 ) 8007bec: 6823 ldr r3, [r4, #0] 8007bee: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 8007bf2: d906 bls.n 8007c02 8007bf4: f44f 4180 mov.w r1, #16384 ; 0x4000 8007bf8: 4803 ldr r0, [pc, #12] ; (8007c08 ) 8007bfa: f7fe f9e8 bl 8005fce 8007bfe: 2300 movs r3, #0 8007c00: 6023 str r3, [r4, #0] 8007c02: bd10 pop {r4, pc} 8007c04: 20000458 .word 0x20000458 8007c08: 40012000 .word 0x40012000 08007c0c : } void ADC_Check(void){ if(AdcTimerCnt > 2500){ 8007c0c: f640 12c4 movw r2, #2500 ; 0x9c4 8007c10: 4b0b ldr r3, [pc, #44] ; (8007c40 ) void ADC_Check(void){ 8007c12: b5f0 push {r4, r5, r6, r7, lr} if(AdcTimerCnt > 2500){ 8007c14: 6819 ldr r1, [r3, #0] 8007c16: 4291 cmp r1, r2 8007c18: 461a mov r2, r3 8007c1a: d90f bls.n 8007c3c 8007c1c: 2300 movs r3, #0 for(uint8_t i = 0; i< ADC_EA; i++ ){ Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2] = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8); Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2] = (uint16_t)(ADCvalue[i] & 0x00FF); AdcTimerCnt = 0; 8007c1e: 461c mov r4, r3 Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2] = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8); 8007c20: 4f08 ldr r7, [pc, #32] ; (8007c44 ) 8007c22: 4e09 ldr r6, [pc, #36] ; (8007c48 ) 8007c24: f857 0013 ldr.w r0, [r7, r3, lsl #1] 8007c28: 1999 adds r1, r3, r6 8007c2a: 3302 adds r3, #2 8007c2c: 0a05 lsrs r5, r0, #8 for(uint8_t i = 0; i< ADC_EA; i++ ){ 8007c2e: 2b1c cmp r3, #28 Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2] = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8); 8007c30: f881 5025 strb.w r5, [r1, #37] ; 0x25 Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2] = (uint16_t)(ADCvalue[i] & 0x00FF); 8007c34: f881 0026 strb.w r0, [r1, #38] ; 0x26 AdcTimerCnt = 0; 8007c38: 6014 str r4, [r2, #0] for(uint8_t i = 0; i< ADC_EA; i++ ){ 8007c3a: d1f3 bne.n 8007c24 8007c3c: bdf0 pop {r4, r5, r6, r7, pc} 8007c3e: bf00 nop 8007c40: 20000450 .word 0x20000450 8007c44: 200004a0 .word 0x200004a0 8007c48: 200005e3 .word 0x200005e3 08007c4c : printf("%x\r\n",i,Prev_data[INDEX_DET_1_8G_DL_IN_L + i]); #endif // PYJ.2019.08.09_END -- } } } void Uart_Check(void){ 8007c4c: b570 push {r4, r5, r6, lr} while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal); 8007c4e: 4d07 ldr r5, [pc, #28] ; (8007c6c ) 8007c50: 4c07 ldr r4, [pc, #28] ; (8007c70 ) 8007c52: 4e08 ldr r6, [pc, #32] ; (8007c74 ) 8007c54: 68ab ldr r3, [r5, #8] 8007c56: 2b00 cmp r3, #0 8007c58: dd02 ble.n 8007c60 8007c5a: 6823 ldr r3, [r4, #0] 8007c5c: 2b64 cmp r3, #100 ; 0x64 8007c5e: d800 bhi.n 8007c62 8007c60: bd70 pop {r4, r5, r6, pc} 8007c62: 4630 mov r0, r6 8007c64: f000 fd4c bl 8008700 8007c68: e7f4 b.n 8007c54 8007c6a: bf00 nop 8007c6c: 20000bc4 .word 0x20000bc4 8007c70: 2000045c .word 0x2000045c 8007c74: 20000700 .word 0x20000700 08007c78 : /* USER CODE BEGIN 0 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8007c78: 6802 ldr r2, [r0, #0] 8007c7a: 4b0a ldr r3, [pc, #40] ; (8007ca4 ) 8007c7c: 429a cmp r2, r3 8007c7e: d10f bne.n 8007ca0 UartRxTimerCnt++; 8007c80: 4a09 ldr r2, [pc, #36] ; (8007ca8 ) 8007c82: 6813 ldr r3, [r2, #0] 8007c84: 3301 adds r3, #1 8007c86: 6013 str r3, [r2, #0] LedTimerCnt++; 8007c88: 4a08 ldr r2, [pc, #32] ; (8007cac ) 8007c8a: 6813 ldr r3, [r2, #0] 8007c8c: 3301 adds r3, #1 8007c8e: 6013 str r3, [r2, #0] AdcTimerCnt++; 8007c90: 4a07 ldr r2, [pc, #28] ; (8007cb0 ) 8007c92: 6813 ldr r3, [r2, #0] 8007c94: 3301 adds r3, #1 8007c96: 6013 str r3, [r2, #0] LDTimerCnt++; 8007c98: 4a06 ldr r2, [pc, #24] ; (8007cb4 ) 8007c9a: 6813 ldr r3, [r2, #0] 8007c9c: 3301 adds r3, #1 8007c9e: 6013 str r3, [r2, #0] 8007ca0: 4770 bx lr 8007ca2: bf00 nop 8007ca4: 40001000 .word 0x40001000 8007ca8: 2000045c .word 0x2000045c 8007cac: 20000458 .word 0x20000458 8007cb0: 20000450 .word 0x20000450 8007cb4: 20000454 .word 0x20000454 08007cb8 <_write>: } } int _write (int file, uint8_t *ptr, uint16_t len) { 8007cb8: b510 push {r4, lr} 8007cba: 4614 mov r4, r2 HAL_UART_Transmit(&huart1, ptr, len,10); 8007cbc: 230a movs r3, #10 8007cbe: 4802 ldr r0, [pc, #8] ; (8007cc8 <_write+0x10>) 8007cc0: f7fe ff50 bl 8006b64 return len; } 8007cc4: 4620 mov r0, r4 8007cc6: bd10 pop {r4, pc} 8007cc8: 20000700 .word 0x20000700 08007ccc : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8007ccc: b510 push {r4, lr} 8007cce: b096 sub sp, #88 ; 0x58 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8007cd0: 2228 movs r2, #40 ; 0x28 8007cd2: 2100 movs r1, #0 8007cd4: a80c add r0, sp, #48 ; 0x30 8007cd6: f001 fb3c bl 8009352 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8007cda: 2214 movs r2, #20 8007cdc: 2100 movs r1, #0 8007cde: a801 add r0, sp, #4 8007ce0: f001 fb37 bl 8009352 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8007ce4: 2218 movs r2, #24 8007ce6: 2100 movs r1, #0 8007ce8: eb0d 0002 add.w r0, sp, r2 8007cec: f001 fb31 bl 8009352 /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8007cf0: 2301 movs r3, #1 8007cf2: 9310 str r3, [sp, #64] ; 0x40 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8007cf4: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8007cf6: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8007cf8: 9311 str r3, [sp, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 8007cfa: f44f 1340 mov.w r3, #3145728 ; 0x300000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8007cfe: a80c add r0, sp, #48 ; 0x30 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 8007d00: 9315 str r3, [sp, #84] ; 0x54 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8007d02: 940c str r4, [sp, #48] ; 0x30 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8007d04: 9413 str r4, [sp, #76] ; 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8007d06: f7fe f967 bl 8005fd8 { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8007d0a: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8007d0c: f44f 6280 mov.w r2, #1024 ; 0x400 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8007d10: 9301 str r3, [sp, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8007d12: 2300 movs r3, #0 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8007d14: 4621 mov r1, r4 8007d16: a801 add r0, sp, #4 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8007d18: 9303 str r3, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8007d1a: 9204 str r2, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8007d1c: 9305 str r3, [sp, #20] RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8007d1e: 9402 str r4, [sp, #8] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8007d20: f7fe fb22 bl 8006368 { Error_Handler(); } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4; 8007d24: f44f 4380 mov.w r3, #16384 ; 0x4000 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8007d28: a806 add r0, sp, #24 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; 8007d2a: 9406 str r4, [sp, #24] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4; 8007d2c: 9308 str r3, [sp, #32] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8007d2e: f7fe fbed bl 800650c { Error_Handler(); } } 8007d32: b016 add sp, #88 ; 0x58 8007d34: bd10 pop {r4, pc} ... 08007d38
: { 8007d38: b580 push {r7, lr} static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8007d3a: 4db0 ldr r5, [pc, #704] ; (8007ffc ) { 8007d3c: b08c sub sp, #48 ; 0x30 HAL_Init(); 8007d3e: f7fd fa29 bl 8005194 SystemClock_Config(); 8007d42: f7ff ffc3 bl 8007ccc GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007d46: 2210 movs r2, #16 8007d48: 2100 movs r1, #0 8007d4a: a808 add r0, sp, #32 8007d4c: f001 fb01 bl 8009352 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007d50: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007d52: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007d54: f043 0340 orr.w r3, r3, #64 ; 0x40 8007d58: 61ab str r3, [r5, #24] 8007d5a: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007d5c: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 8007d5e: f003 0340 and.w r3, r3, #64 ; 0x40 8007d62: 9301 str r3, [sp, #4] 8007d64: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOC_CLK_ENABLE(); 8007d66: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007d68: 48a5 ldr r0, [pc, #660] ; (8008000 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8007d6a: f043 0310 orr.w r3, r3, #16 8007d6e: 61ab str r3, [r5, #24] 8007d70: 69ab ldr r3, [r5, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8007d72: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007d74: f003 0310 and.w r3, r3, #16 8007d78: 9302 str r3, [sp, #8] 8007d7a: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOF_CLK_ENABLE(); 8007d7c: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007d7e: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007d80: f043 0380 orr.w r3, r3, #128 ; 0x80 8007d84: 61ab str r3, [r5, #24] 8007d86: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007d88: 2702 movs r7, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007d8a: f003 0380 and.w r3, r3, #128 ; 0x80 8007d8e: 9303 str r3, [sp, #12] 8007d90: 9b03 ldr r3, [sp, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8007d92: 69ab ldr r3, [r5, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8007d94: f04f 090c mov.w r9, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007d98: f043 0304 orr.w r3, r3, #4 8007d9c: 61ab str r3, [r5, #24] 8007d9e: 69ab ldr r3, [r5, #24] hadc1.Init.NbrOfConversion = 14; 8007da0: f04f 080e mov.w r8, #14 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007da4: f003 0304 and.w r3, r3, #4 8007da8: 9304 str r3, [sp, #16] 8007daa: 9b04 ldr r3, [sp, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8007dac: 69ab ldr r3, [r5, #24] sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 8007dae: f04f 0a07 mov.w sl, #7 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007db2: f043 0308 orr.w r3, r3, #8 8007db6: 61ab str r3, [r5, #24] 8007db8: 69ab ldr r3, [r5, #24] 8007dba: f003 0308 and.w r3, r3, #8 8007dbe: 9305 str r3, [sp, #20] 8007dc0: 9b05 ldr r3, [sp, #20] __HAL_RCC_GPIOD_CLK_ENABLE(); 8007dc2: 69ab ldr r3, [r5, #24] 8007dc4: f043 0320 orr.w r3, r3, #32 8007dc8: 61ab str r3, [r5, #24] 8007dca: 69ab ldr r3, [r5, #24] 8007dcc: f003 0320 and.w r3, r3, #32 8007dd0: 9306 str r3, [sp, #24] 8007dd2: 9b06 ldr r3, [sp, #24] __HAL_RCC_GPIOG_CLK_ENABLE(); 8007dd4: 69ab ldr r3, [r5, #24] 8007dd6: f443 7380 orr.w r3, r3, #256 ; 0x100 8007dda: 61ab str r3, [r5, #24] 8007ddc: 69ab ldr r3, [r5, #24] 8007dde: f403 7380 and.w r3, r3, #256 ; 0x100 8007de2: 9307 str r3, [sp, #28] 8007de4: 9b07 ldr r3, [sp, #28] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007de6: f7fe f8ed bl 8005fc4 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007dea: 2200 movs r2, #0 8007dec: f64f 41c0 movw r1, #64704 ; 0xfcc0 8007df0: 4884 ldr r0, [pc, #528] ; (8008004 ) 8007df2: f7fe f8e7 bl 8005fc4 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007df6: 2200 movs r2, #0 8007df8: f240 31f3 movw r1, #1011 ; 0x3f3 8007dfc: 4882 ldr r0, [pc, #520] ; (8008008 ) 8007dfe: f7fe f8e1 bl 8005fc4 HAL_GPIO_WritePin(GPIOD, PLL_DATA_3_5G_Pin|PLL_CLK_3_5G_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007e02: 2200 movs r2, #0 8007e04: f648 71ff movw r1, #36863 ; 0x8fff 8007e08: 4880 ldr r0, [pc, #512] ; (800800c ) 8007e0a: f7fe f8db bl 8005fc4 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007e0e: 2200 movs r2, #0 8007e10: f647 71fc movw r1, #32764 ; 0x7ffc 8007e14: 487e ldr r0, [pc, #504] ; (8008010 ) 8007e16: f7fe f8d5 bl 8005fc4 HAL_GPIO_WritePin(PLL_CLK_3_5G__GPIO_Port, PLL_CLK_3_5G__Pin, GPIO_PIN_RESET); 8007e1a: 2200 movs r2, #0 8007e1c: f44f 4100 mov.w r1, #32768 ; 0x8000 8007e20: 487c ldr r0, [pc, #496] ; (8008014 ) 8007e22: f7fe f8cf bl 8005fc4 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007e26: 2200 movs r2, #0 8007e28: 2118 movs r1, #24 8007e2a: 487b ldr r0, [pc, #492] ; (8008018 ) 8007e2c: f7fe f8ca bl 8005fc4 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007e30: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007e32: a908 add r1, sp, #32 8007e34: 4872 ldr r0, [pc, #456] ; (8008000 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007e36: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007e38: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007e3a: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e3c: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007e3e: f7fd ffcf bl 8005de0 GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007e42: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007e46: a908 add r1, sp, #32 8007e48: 486e ldr r0, [pc, #440] ; (8008004 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007e4a: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007e4c: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007e4e: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e50: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007e52: f7fd ffc5 bl 8005de0 GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007e56: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007e5a: a908 add r1, sp, #32 8007e5c: 486a ldr r0, [pc, #424] ; (8008008 ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007e5e: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007e60: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007e62: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e64: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007e66: f7fd ffbb bl 8005de0 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007e6a: a908 add r1, sp, #32 8007e6c: 4866 ldr r0, [pc, #408] ; (8008008 ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8007e6e: f8cd 9020 str.w r9, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007e72: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e74: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007e76: f7fd ffb3 bl 8005de0 /*Configure GPIO pins : PLL_DATA_3_5G_Pin PLL_CLK_3_5G_Pin ATT_DATA_Pin ATT_CLK_Pin DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin PATH_EN_3_5G_L_Pin */ GPIO_InitStruct.Pin = PLL_DATA_3_5G_Pin|PLL_CLK_3_5G_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007e7a: f648 73ff movw r3, #36863 ; 0x8fff |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin |PATH_EN_3_5G_L_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007e7e: a908 add r1, sp, #32 8007e80: 4862 ldr r0, [pc, #392] ; (800800c ) GPIO_InitStruct.Pin = PLL_DATA_3_5G_Pin|PLL_CLK_3_5G_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007e82: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007e84: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007e86: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e88: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007e8a: f7fd ffa9 bl 8005de0 /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */ GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8007e8e: f44f 5340 mov.w r3, #12288 ; 0x3000 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007e92: a908 add r1, sp, #32 8007e94: 485d ldr r0, [pc, #372] ; (800800c ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8007e96: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007e98: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e9a: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007e9c: f7fd ffa0 bl 8005de0 /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin BOOT_LED_Pin */ GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007ea0: f647 73fc movw r3, #32764 ; 0x7ffc |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin |BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007ea4: a908 add r1, sp, #32 8007ea6: 485a ldr r0, [pc, #360] ; (8008010 ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007ea8: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007eaa: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007eac: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007eae: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007eb0: f7fd ff96 bl 8005de0 /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */ GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8007eb4: f44f 7340 mov.w r3, #768 ; 0x300 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007eb8: a908 add r1, sp, #32 8007eba: 4852 ldr r0, [pc, #328] ; (8008004 ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8007ebc: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007ebe: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007ec0: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007ec2: f7fd ff8d bl 8005de0 /*Configure GPIO pin : PLL_CLK_3_5G__Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G__Pin; 8007ec6: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G__GPIO_Port, &GPIO_InitStruct); 8007eca: a908 add r1, sp, #32 8007ecc: 4851 ldr r0, [pc, #324] ; (8008014 ) GPIO_InitStruct.Pin = PLL_CLK_3_5G__Pin; 8007ece: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007ed0: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007ed2: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007ed4: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(PLL_CLK_3_5G__GPIO_Port, &GPIO_InitStruct); 8007ed6: f7fd ff83 bl 8005de0 /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8007eda: 2318 movs r3, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007edc: a908 add r1, sp, #32 8007ede: 484e ldr r0, [pc, #312] ; (8008018 ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8007ee0: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007ee2: 9609 str r6, [sp, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007ee4: 970b str r7, [sp, #44] ; 0x2c GPIO_InitStruct.Pull = GPIO_NOPULL; 8007ee6: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007ee8: f7fd ff7a bl 8005de0 /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007eec: 2360 movs r3, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007eee: a908 add r1, sp, #32 8007ef0: 4849 ldr r0, [pc, #292] ; (8008018 ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007ef2: 9308 str r3, [sp, #32] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007ef4: 9409 str r4, [sp, #36] ; 0x24 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007ef6: 940a str r4, [sp, #40] ; 0x28 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007ef8: f7fd ff72 bl 8005de0 __HAL_RCC_DMA1_CLK_ENABLE(); 8007efc: 696b ldr r3, [r5, #20] 8007efe: 4333 orrs r3, r6 8007f00: 616b str r3, [r5, #20] 8007f02: 696b ldr r3, [r5, #20] hadc1.Instance = ADC1; 8007f04: 4d45 ldr r5, [pc, #276] ; (800801c ) __HAL_RCC_DMA1_CLK_ENABLE(); 8007f06: 4033 ands r3, r6 8007f08: 9300 str r3, [sp, #0] 8007f0a: 9b00 ldr r3, [sp, #0] hadc1.Instance = ADC1; 8007f0c: 4b44 ldr r3, [pc, #272] ; (8008020 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 8007f0e: 4628 mov r0, r5 hadc1.Instance = ADC1; 8007f10: 602b str r3, [r5, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8007f12: f44f 7380 mov.w r3, #256 ; 0x100 8007f16: 60ab str r3, [r5, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8007f18: f44f 2360 mov.w r3, #917504 ; 0xe0000 hadc1.Init.ContinuousConvMode = ENABLE; 8007f1c: 60ee str r6, [r5, #12] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8007f1e: 61eb str r3, [r5, #28] ADC_ChannelConfTypeDef sConfig = {0}; 8007f20: 9408 str r4, [sp, #32] 8007f22: 9409 str r4, [sp, #36] ; 0x24 8007f24: 940a str r4, [sp, #40] ; 0x28 hadc1.Init.DiscontinuousConvMode = DISABLE; 8007f26: 616c str r4, [r5, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8007f28: 606c str r4, [r5, #4] hadc1.Init.NbrOfConversion = 14; 8007f2a: f8c5 8010 str.w r8, [r5, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8007f2e: f7fd fb0f bl 8005550 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f32: a908 add r1, sp, #32 8007f34: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_1; 8007f36: 9609 str r6, [sp, #36] ; 0x24 sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; 8007f38: f8cd a028 str.w sl, [sp, #40] ; 0x28 sConfig.Channel = ADC_CHANNEL_0; 8007f3c: 9408 str r4, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f3e: f7fd f99b bl 8005278 sConfig.Channel = ADC_CHANNEL_1; 8007f42: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 8007f44: 2603 movs r6, #3 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f46: a908 add r1, sp, #32 8007f48: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_2; 8007f4a: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f4c: f7fd f994 bl 8005278 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f50: a908 add r1, sp, #32 8007f52: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_2; 8007f54: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_3; 8007f56: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f58: f7fd f98e bl 8005278 sConfig.Channel = ADC_CHANNEL_3; 8007f5c: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_4; 8007f5e: 2604 movs r6, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f60: a908 add r1, sp, #32 8007f62: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_4; 8007f64: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f66: f7fd f987 bl 8005278 sConfig.Channel = ADC_CHANNEL_4; 8007f6a: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_5; 8007f6c: 2605 movs r6, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f6e: a908 add r1, sp, #32 8007f70: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_5; 8007f72: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f74: f7fd f980 bl 8005278 sConfig.Channel = ADC_CHANNEL_5; 8007f78: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_6; 8007f7a: 2606 movs r6, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f7c: a908 add r1, sp, #32 8007f7e: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_6; 8007f80: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f82: f7fd f979 bl 8005278 sConfig.Channel = ADC_CHANNEL_6; 8007f86: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 8007f88: 2608 movs r6, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f8a: a908 add r1, sp, #32 8007f8c: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_7; 8007f8e: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f92: f7fd f971 bl 8005278 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f96: a908 add r1, sp, #32 8007f98: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_7; 8007f9a: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_8; 8007f9e: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fa0: f7fd f96a bl 8005278 sConfig.Channel = ADC_CHANNEL_8; 8007fa4: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_9; 8007fa6: 2609 movs r6, #9 sConfig.Rank = ADC_REGULAR_RANK_10; 8007fa8: f04f 0a0a mov.w sl, #10 sConfig.Rank = ADC_REGULAR_RANK_11; 8007fac: 270b movs r7, #11 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fae: a908 add r1, sp, #32 8007fb0: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_9; 8007fb2: 9609 str r6, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fb4: f7fd f960 bl 8005278 sConfig.Channel = ADC_CHANNEL_9; 8007fb8: 9608 str r6, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_13; 8007fba: 260d movs r6, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fbc: a908 add r1, sp, #32 8007fbe: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_10; 8007fc0: f8cd a024 str.w sl, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fc4: f7fd f958 bl 8005278 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fc8: a908 add r1, sp, #32 8007fca: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_10; 8007fcc: f8cd a020 str.w sl, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_11; 8007fd0: 9709 str r7, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fd2: f7fd f951 bl 8005278 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fd6: a908 add r1, sp, #32 8007fd8: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_11; 8007fda: 9708 str r7, [sp, #32] sConfig.Rank = ADC_REGULAR_RANK_12; 8007fdc: f8cd 9024 str.w r9, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fe0: f7fd f94a bl 8005278 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fe4: a908 add r1, sp, #32 8007fe6: 4628 mov r0, r5 sConfig.Rank = ADC_REGULAR_RANK_13; 8007fe8: 9609 str r6, [sp, #36] ; 0x24 sConfig.Channel = ADC_CHANNEL_12; 8007fea: f8cd 9020 str.w r9, [sp, #32] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007fee: f7fd f943 bl 8005278 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007ff2: a908 add r1, sp, #32 8007ff4: 4628 mov r0, r5 sConfig.Channel = ADC_CHANNEL_13; 8007ff6: 9608 str r6, [sp, #32] 8007ff8: e014 b.n 8008024 8007ffa: bf00 nop 8007ffc: 40021000 .word 0x40021000 8008000: 40011800 .word 0x40011800 8008004: 40011000 .word 0x40011000 8008008: 40011c00 .word 0x40011c00 800800c: 40011400 .word 0x40011400 8008010: 40012000 .word 0x40012000 8008014: 40010800 .word 0x40010800 8008018: 40010c00 .word 0x40010c00 800801c: 2000068c .word 0x2000068c 8008020: 40012400 .word 0x40012400 sConfig.Rank = ADC_REGULAR_RANK_14; 8008024: f8cd 8024 str.w r8, [sp, #36] ; 0x24 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8008028: f7fd f926 bl 8005278 huart1.Init.BaudRate = 115200; 800802c: f44f 33e1 mov.w r3, #115200 ; 0x1c200 huart1.Instance = USART1; 8008030: 4843 ldr r0, [pc, #268] ; (8008140 ) huart1.Init.BaudRate = 115200; 8008032: 4a44 ldr r2, [pc, #272] ; (8008144 ) huart1.Init.WordLength = UART_WORDLENGTH_8B; 8008034: 6084 str r4, [r0, #8] huart1.Init.BaudRate = 115200; 8008036: e880 000c stmia.w r0, {r2, r3} huart1.Init.StopBits = UART_STOPBITS_1; 800803a: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 800803c: 6104 str r4, [r0, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800803e: f8c0 9014 str.w r9, [r0, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8008042: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8008044: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8008046: f7fe fd5f bl 8006b08 htim6.Init.Prescaler = 5600-1; 800804a: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 800804e: 4e3e ldr r6, [pc, #248] ; (8008148 ) htim6.Init.Prescaler = 5600-1; 8008050: 493e ldr r1, [pc, #248] ; (800814c ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8008052: 4630 mov r0, r6 htim6.Init.Prescaler = 5600-1; 8008054: e886 000a stmia.w r6, {r1, r3} TIM_MasterConfigTypeDef sMasterConfig = {0}; 8008058: 9408 str r4, [sp, #32] 800805a: 9409 str r4, [sp, #36] ; 0x24 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 800805c: 60b4 str r4, [r6, #8] htim6.Init.Period = 10; 800805e: f8c6 a00c str.w sl, [r6, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8008062: 61b4 str r4, [r6, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8008064: f7fe fc3e bl 80068e4 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8008068: a908 add r1, sp, #32 800806a: 4630 mov r0, r6 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800806c: 9408 str r4, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800806e: 9409 str r4, [sp, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8008070: f7fe fc52 bl 8006918 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8008074: 4622 mov r2, r4 8008076: 4621 mov r1, r4 8008078: 2025 movs r0, #37 ; 0x25 800807a: f7fd fb6d bl 8005758 HAL_NVIC_EnableIRQ(USART1_IRQn); 800807e: 2025 movs r0, #37 ; 0x25 8008080: f7fd fb9e bl 80057c0 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8008084: 4622 mov r2, r4 8008086: 4621 mov r1, r4 8008088: 2036 movs r0, #54 ; 0x36 800808a: f7fd fb65 bl 8005758 HAL_NVIC_EnableIRQ(TIM6_IRQn); 800808e: 2036 movs r0, #54 ; 0x36 8008090: f7fd fb96 bl 80057c0 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8008094: 4622 mov r2, r4 8008096: 4621 mov r1, r4 8008098: 4638 mov r0, r7 800809a: f7fd fb5d bl 8005758 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 800809e: 4638 mov r0, r7 80080a0: f7fd fb8e bl 80057c0 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 80080a4: 4622 mov r2, r4 80080a6: 4621 mov r1, r4 80080a8: 4640 mov r0, r8 80080aa: f7fd fb55 bl 8005758 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 80080ae: 4640 mov r0, r8 80080b0: f7fd fb86 bl 80057c0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 80080b4: 4622 mov r2, r4 80080b6: 4621 mov r1, r4 80080b8: 200f movs r0, #15 80080ba: f7fd fb4d bl 8005758 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80080be: 200f movs r0, #15 80080c0: f7fd fb7e bl 80057c0 InitUartQueue(&TerminalQueue); 80080c4: 4822 ldr r0, [pc, #136] ; (8008150 ) 80080c6: f000 fafb bl 80086c0 setbuf(stdout, NULL); 80080ca: 4b22 ldr r3, [pc, #136] ; (8008154 ) 80080cc: 4621 mov r1, r4 80080ce: 681b ldr r3, [r3, #0] 80080d0: 6898 ldr r0, [r3, #8] 80080d2: f001 fe23 bl 8009d1c Power_ON_OFF_Initialize(); 80080d6: f7ff fd0d bl 8007af4 Path_Init(); 80080da: f7ff fc53 bl 8007984 while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK)); 80080de: 4628 mov r0, r5 80080e0: f7fd fac0 bl 8005664 80080e4: 2800 cmp r0, #0 80080e6: d1fa bne.n 80080de AD5318_Initialize(); 80080e8: f7fe ffba bl 8007060 Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]); 80080ec: 481a ldr r0, [pc, #104] ; (8008158 ) 80080ee: f7ff fc38 bl 8007962 ADF4153_Initialize(); 80080f2: f7ff fadb bl 80076ac ADF4113_Initialize(); 80080f6: f000 f843 bl 8008180 PE43711_PinInit(); 80080fa: f7ff f99f bl 800743c BDA4601_Initialize(); 80080fe: f7ff f81b bl 8007138 ATTEN_PLL_PATH_Initialize(); 8008102: f7ff fce5 bl 8007ad0 HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14); 8008106: 220e movs r2, #14 8008108: 4914 ldr r1, [pc, #80] ; (800815c ) 800810a: 4815 ldr r0, [pc, #84] ; (8008160 ) 800810c: f7fd f970 bl 80053f0 printf("****************************************\r\n"); 8008110: 4814 ldr r0, [pc, #80] ; (8008164 ) 8008112: f001 fdfb bl 8009d0c printf("MAO Project\r\n"); 8008116: 4814 ldr r0, [pc, #80] ; (8008168 ) 8008118: f001 fdf8 bl 8009d0c printf("Build at %s %s\r\n", __DATE__, __TIME__); 800811c: 4a13 ldr r2, [pc, #76] ; (800816c ) 800811e: 4914 ldr r1, [pc, #80] ; (8008170 ) 8008120: 4814 ldr r0, [pc, #80] ; (8008174 ) 8008122: f001 fd7f bl 8009c24 printf("Copyright (c) 2020. BLUECELL\r\n"); 8008126: 4814 ldr r0, [pc, #80] ; (8008178 ) 8008128: f001 fdf0 bl 8009d0c printf("****************************************\r\n"); 800812c: 480d ldr r0, [pc, #52] ; (8008164 ) 800812e: f001 fded bl 8009d0c Boot_LED_Toggle(); 8008132: f7ff fd59 bl 8007be8 Uart_Check(); 8008136: f7ff fd89 bl 8007c4c ADC_Check(); 800813a: f7ff fd67 bl 8007c0c 800813e: e7f8 b.n 8008132 8008140: 20000700 .word 0x20000700 8008144: 40013800 .word 0x40013800 8008148: 20000784 .word 0x20000784 800814c: 40001000 .word 0x40001000 8008150: 20000bc4 .word 0x20000bc4 8008154: 2000024c .word 0x2000024c 8008158: 20000580 .word 0x20000580 800815c: 200004a0 .word 0x200004a0 8008160: 2000068c .word 0x2000068c 8008164: 0800bc77 .word 0x0800bc77 8008168: 0800bca1 .word 0x0800bca1 800816c: 0800bcae .word 0x0800bcae 8008170: 0800bcb7 .word 0x0800bcb7 8008174: 0800bcc3 .word 0x0800bcc3 8008178: 0800bcd4 .word 0x0800bcd4 0800817c : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 800817c: 4770 bx lr ... 08008180 : uint16_t P; uint16_t A; uint16_t N; }Adf4113_st; void ADF4113_Initialize(void){ if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){ 8008180: 4b10 ldr r3, [pc, #64] ; (80081c4 ) 8008182: 7d9a ldrb r2, [r3, #22] 8008184: b92a cbnz r2, 8008192 8008186: 7dda ldrb r2, [r3, #23] 8008188: b91a cbnz r2, 8008192 Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47; 800818a: 223e movs r2, #62 ; 0x3e 800818c: 759a strb r2, [r3, #22] Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF); 800818e: 2280 movs r2, #128 ; 0x80 8008190: 75da strb r2, [r3, #23] } if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){ 8008192: 7e1a ldrb r2, [r3, #24] 8008194: b92a cbnz r2, 80081a2 8008196: 7e5a ldrb r2, [r3, #25] 8008198: b91a cbnz r2, 80081a2 Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8); 800819a: 2238 movs r2, #56 ; 0x38 800819c: 761a strb r2, [r3, #24] Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF); 800819e: 22d6 movs r2, #214 ; 0xd6 80081a0: 765a strb r2, [r3, #25] } if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){ 80081a2: 7e9a ldrb r2, [r3, #26] 80081a4: b92a cbnz r2, 80081b2 80081a6: 7eda ldrb r2, [r3, #27] 80081a8: b91a cbnz r2, 80081b2 Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8); 80081aa: 224d movs r2, #77 ; 0x4d 80081ac: 769a strb r2, [r3, #26] Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF); 80081ae: 22ee movs r2, #238 ; 0xee 80081b0: 76da strb r2, [r3, #27] } if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){ 80081b2: 7f1a ldrb r2, [r3, #28] 80081b4: b92a cbnz r2, 80081c2 80081b6: 7f5a ldrb r2, [r3, #29] 80081b8: b91a cbnz r2, 80081c2 Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8); 80081ba: 2259 movs r2, #89 ; 0x59 80081bc: 771a strb r2, [r3, #28] Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF); 80081be: 22a6 movs r2, #166 ; 0xa6 80081c0: 775a strb r2, [r3, #29] 80081c2: 4770 bx lr 80081c4: 20000580 .word 0x20000580 080081c8 : A = N_val -(B * P); // printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); // printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); return N_Counter_Latch_Create(A,B,0); } uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){ 80081c8: 2301 movs r3, #1 80081ca: b570 push {r4, r5, r6, lr} 80081cc: 2402 movs r4, #2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 8; i++){ if(_ACOUNTER & 0x01) ret += shift_bit << i; 80081ce: 461d mov r5, r3 if(_ACOUNTER & 0x01) 80081d0: 07c6 lsls r6, r0, #31 ret += shift_bit << i; 80081d2: bf48 it mi 80081d4: fa05 f604 lslmi.w r6, r5, r4 80081d8: f104 0401 add.w r4, r4, #1 80081dc: bf48 it mi 80081de: 199b addmi r3, r3, r6 for(i = 2; i < 8; i++){ 80081e0: 2c08 cmp r4, #8 _ACOUNTER = _ACOUNTER >> 1; 80081e2: ea4f 0050 mov.w r0, r0, lsr #1 for(i = 2; i < 8; i++){ 80081e6: d1f3 bne.n 80081d0 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 8; i < 21; i++){ if(_BCOUNTER & 0x01) ret += shift_bit << i; 80081e8: 2001 movs r0, #1 if(_BCOUNTER & 0x01) 80081ea: 07cd lsls r5, r1, #31 ret += shift_bit << i; 80081ec: bf48 it mi 80081ee: fa00 f504 lslmi.w r5, r0, r4 80081f2: f104 0401 add.w r4, r4, #1 80081f6: bf48 it mi 80081f8: 195b addmi r3, r3, r5 for(i = 8; i < 21; i++){ 80081fa: 2c15 cmp r4, #21 _BCOUNTER = _BCOUNTER >> 1; 80081fc: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 8; i < 21; i++){ 8008200: d1f3 bne.n 80081ea } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ if(_CPGAIN & 0x01) 8008202: 07d2 lsls r2, r2, #31 ret += shift_bit << i++; 8008204: bf48 it mi 8008206: f503 1300 addmi.w r3, r3, #2097152 ; 0x200000 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } 800820a: 4618 mov r0, r3 800820c: bd70 pop {r4, r5, r6, pc} ... 08008210 : N_val = (rf_Freq / ADF4113_CH_STEP); 8008210: f24c 3350 movw r3, #50000 ; 0xc350 8008214: fbb0 f3f3 udiv r3, r0, r3 if( N_val < ADF4113_PRE8_MIN_N) { 8008218: 2b37 cmp r3, #55 ; 0x37 800821a: d909 bls.n 8008230 B = N_val / P; 800821c: 4905 ldr r1, [pc, #20] ; (8008234 ) return N_Counter_Latch_Create(A,B,0); 800821e: 2200 movs r2, #0 B = N_val / P; 8008220: fbb0 f1f1 udiv r1, r0, r1 A = N_val -(B * P); 8008224: eba3 1041 sub.w r0, r3, r1, lsl #5 return N_Counter_Latch_Create(A,B,0); 8008228: b280 uxth r0, r0 800822a: b289 uxth r1, r1 800822c: f7ff bfcc b.w 80081c8 } 8008230: 2004 movs r0, #4 8008232: 4770 bx lr 8008234: 00186a00 .word 0x00186a00 08008238 : void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 8008238: b084 sub sp, #16 800823a: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800823e: ac0c add r4, sp, #48 ; 0x30 8008240: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 8008244: 9b13 ldr r3, [sp, #76] ; 0x4c 8008246: f8bd 7034 ldrh.w r7, [sp, #52] ; 0x34 800824a: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 800824e: 9301 str r3, [sp, #4] R0 = R0 & 0xFFFFFF; 8008250: 9b12 ldr r3, [sp, #72] ; 0x48 8008252: f8dd 8038 ldr.w r8, [sp, #56] ; 0x38 8008256: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 800825a: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 800825e: 9d10 ldr r5, [sp, #64] ; 0x40 8008260: f8bd 6044 ldrh.w r6, [sp, #68] ; 0x44 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008264: 2200 movs r2, #0 8008266: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 8008268: 9300 str r3, [sp, #0] 800826a: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 800826c: 9c14 ldr r4, [sp, #80] ; 0x50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800826e: f7fd fea9 bl 8005fc4 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008272: 2200 movs r2, #0 8008274: 4649 mov r1, r9 8008276: 4640 mov r0, r8 8008278: f7fd fea4 bl 8005fc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800827c: 2200 movs r2, #0 800827e: 4631 mov r1, r6 8008280: 4628 mov r0, r5 8008282: f7fd fe9f bl 8005fc4 8008286: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 800828a: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 800828e: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008292: bf18 it ne 8008294: 2201 movne r2, #1 } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008296: 4649 mov r1, r9 8008298: 4640 mov r0, r8 800829a: f7fd fe93 bl 8005fc4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800829e: 2201 movs r2, #1 80082a0: 4639 mov r1, r7 80082a2: 4650 mov r0, sl 80082a4: f7fd fe8e bl 8005fc4 Pol_Delay_us(10); 80082a8: 200a movs r0, #10 80082aa: f7ff fc87 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80082ae: 2200 movs r2, #0 80082b0: 4639 mov r1, r7 80082b2: 4650 mov r0, sl 80082b4: f7fd fe86 bl 8005fc4 R2 = ((R2 << 1) & 0xFFFFFF); 80082b8: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 80082ba: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 80082be: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 80082c2: d1e4 bne.n 800828e } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80082c4: 2201 movs r2, #1 80082c6: 4631 mov r1, r6 80082c8: 4628 mov r0, r5 80082ca: f7fd fe7b bl 8005fc4 Pol_Delay_us(10); 80082ce: 200a movs r0, #10 80082d0: f7ff fc74 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80082d4: 465a mov r2, fp 80082d6: 4631 mov r1, r6 80082d8: 4628 mov r0, r5 80082da: f7fd fe73 bl 8005fc4 80082de: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 80082e0: 9b00 ldr r3, [sp, #0] #if 0 // PYJ.2019.08.11_BEGIN -- printf("1"); #endif // PYJ.2019.08.11_END -- } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80082e2: 4649 mov r1, r9 if(R0 & 0x800000){ 80082e4: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80082e8: bf18 it ne 80082ea: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80082ec: 4640 mov r0, r8 80082ee: f7fd fe69 bl 8005fc4 #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80082f2: 2201 movs r2, #1 80082f4: 4639 mov r1, r7 80082f6: 4650 mov r0, sl 80082f8: f7fd fe64 bl 8005fc4 Pol_Delay_us(10); 80082fc: 200a movs r0, #10 80082fe: f7ff fc5d bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008302: 2200 movs r2, #0 8008304: 4639 mov r1, r7 8008306: 4650 mov r0, sl 8008308: f7fd fe5c bl 8005fc4 R0 = ((R0 << 1) & 0xFFFFFF); 800830c: 9b00 ldr r3, [sp, #0] for(int i =0; i < 24; i++){ 800830e: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 8008310: ea4f 0343 mov.w r3, r3, lsl #1 8008314: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008318: 9300 str r3, [sp, #0] for(int i =0; i < 24; i++){ 800831a: d1e1 bne.n 80082e0 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800831c: 2201 movs r2, #1 800831e: 4631 mov r1, r6 8008320: 4628 mov r0, r5 8008322: f7fd fe4f bl 8005fc4 Pol_Delay_us(10); 8008326: 200a movs r0, #10 8008328: f7ff fc48 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800832c: 4622 mov r2, r4 800832e: 4631 mov r1, r6 8008330: 4628 mov r0, r5 8008332: f7fd fe47 bl 8005fc4 8008336: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 8008338: 9b01 ldr r3, [sp, #4] } else{ #if 0 // PYJ.2019.08.11_BEGIN -- printf("0"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800833a: 4649 mov r1, r9 if(R1 & 0x800000){ 800833c: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008340: bf18 it ne 8008342: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008344: 4640 mov r0, r8 8008346: f7fd fe3d bl 8005fc4 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800834a: 2201 movs r2, #1 800834c: 4639 mov r1, r7 800834e: 4650 mov r0, sl 8008350: f7fd fe38 bl 8005fc4 Pol_Delay_us(10); 8008354: 200a movs r0, #10 8008356: f7ff fc31 bl 8007bbc HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800835a: 2200 movs r2, #0 800835c: 4639 mov r1, r7 800835e: 4650 mov r0, sl 8008360: f7fd fe30 bl 8005fc4 R1 = ((R1 << 1) & 0xFFFFFF); 8008364: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 8008366: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 8008368: ea4f 0343 mov.w r3, r3, lsl #1 800836c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008370: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 8008372: d1e1 bne.n 8008338 } #if 0 // PYJ.2019.08.11_BEGIN -- printf("\r\n"); #endif // PYJ.2019.08.11_END -- HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008374: 4631 mov r1, r6 8008376: 2201 movs r2, #1 8008378: 4628 mov r0, r5 800837a: f7fd fe23 bl 8005fc4 Pol_Delay_us(10); 800837e: 200a movs r0, #10 8008380: f7ff fc1c bl 8007bbc HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008384: 4622 mov r2, r4 8008386: 4631 mov r1, r6 8008388: 4628 mov r0, r5 } 800838a: b003 add sp, #12 800838c: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008390: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008392: f7fd be17 b.w 8005fc4 ... 08008398 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8008398: 4b0e ldr r3, [pc, #56] ; (80083d4 ) { 800839a: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 800839c: 699a ldr r2, [r3, #24] 800839e: f042 0201 orr.w r2, r2, #1 80083a2: 619a str r2, [r3, #24] 80083a4: 699a ldr r2, [r3, #24] 80083a6: f002 0201 and.w r2, r2, #1 80083aa: 9200 str r2, [sp, #0] 80083ac: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 80083ae: 69da ldr r2, [r3, #28] 80083b0: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 80083b4: 61da str r2, [r3, #28] 80083b6: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80083b8: 4a07 ldr r2, [pc, #28] ; (80083d8 ) __HAL_RCC_PWR_CLK_ENABLE(); 80083ba: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80083be: 9301 str r3, [sp, #4] 80083c0: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80083c2: 6853 ldr r3, [r2, #4] 80083c4: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80083c8: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 80083cc: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80083ce: b002 add sp, #8 80083d0: 4770 bx lr 80083d2: bf00 nop 80083d4: 40021000 .word 0x40021000 80083d8: 40010000 .word 0x40010000 080083dc : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80083dc: 2210 movs r2, #16 { 80083de: b530 push {r4, r5, lr} 80083e0: 4605 mov r5, r0 80083e2: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80083e4: eb0d 0002 add.w r0, sp, r2 80083e8: 2100 movs r1, #0 80083ea: f000 ffb2 bl 8009352 if(hadc->Instance==ADC1) 80083ee: 682a ldr r2, [r5, #0] 80083f0: 4b2c ldr r3, [pc, #176] ; (80084a4 ) 80083f2: 429a cmp r2, r3 80083f4: d153 bne.n 800849e { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 80083f6: f503 436c add.w r3, r3, #60416 ; 0xec00 80083fa: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80083fc: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 80083fe: f442 7200 orr.w r2, r2, #512 ; 0x200 8008402: 619a str r2, [r3, #24] 8008404: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008406: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 8008408: f402 7200 and.w r2, r2, #512 ; 0x200 800840c: 9200 str r2, [sp, #0] 800840e: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 8008410: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008412: 4825 ldr r0, [pc, #148] ; (80084a8 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8008414: f042 0210 orr.w r2, r2, #16 8008418: 619a str r2, [r3, #24] 800841a: 699a ldr r2, [r3, #24] 800841c: f002 0210 and.w r2, r2, #16 8008420: 9201 str r2, [sp, #4] 8008422: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008424: 699a ldr r2, [r3, #24] 8008426: f042 0204 orr.w r2, r2, #4 800842a: 619a str r2, [r3, #24] 800842c: 699a ldr r2, [r3, #24] 800842e: f002 0204 and.w r2, r2, #4 8008432: 9202 str r2, [sp, #8] 8008434: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8008436: 699a ldr r2, [r3, #24] 8008438: f042 0208 orr.w r2, r2, #8 800843c: 619a str r2, [r3, #24] 800843e: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008440: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 8008442: f003 0308 and.w r3, r3, #8 8008446: 9303 str r3, [sp, #12] 8008448: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 800844a: 230f movs r3, #15 800844c: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 800844e: f7fd fcc7 bl 8005de0 GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 8008452: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008454: a904 add r1, sp, #16 8008456: 4815 ldr r0, [pc, #84] ; (80084ac ) GPIO_InitStruct.Pin = GPIO_PIN_0|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 8008458: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800845a: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800845c: f7fd fcc0 bl 8005de0 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008460: 4813 ldr r0, [pc, #76] ; (80084b0 ) 8008462: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 8008464: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008466: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008468: f7fd fcba bl 8005de0 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 800846c: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 800846e: 4c11 ldr r4, [pc, #68] ; (80084b4 ) 8008470: 4b11 ldr r3, [pc, #68] ; (80084b8 ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8008472: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 8008474: f44f 7200 mov.w r2, #512 ; 0x200 8008478: 6122 str r2, [r4, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 800847a: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Instance = DMA1_Channel1; 800847e: 6023 str r3, [r4, #0] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 8008480: 6162 str r2, [r4, #20] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008482: 2300 movs r3, #0 hdma_adc1.Init.Mode = DMA_CIRCULAR; 8008484: 2220 movs r2, #32 hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8008486: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008488: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 800848a: 60a3 str r3, [r4, #8] hdma_adc1.Init.Mode = DMA_CIRCULAR; 800848c: 61a2 str r2, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 800848e: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8008490: f7fd f9b8 bl 8005804 8008494: b108 cbz r0, 800849a { Error_Handler(); 8008496: f7ff fe71 bl 800817c } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 800849a: 622c str r4, [r5, #32] 800849c: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 800849e: b009 add sp, #36 ; 0x24 80084a0: bd30 pop {r4, r5, pc} 80084a2: bf00 nop 80084a4: 40012400 .word 0x40012400 80084a8: 40011000 .word 0x40011000 80084ac: 40010800 .word 0x40010800 80084b0: 40010c00 .word 0x40010c00 80084b4: 20000740 .word 0x20000740 80084b8: 40020008 .word 0x40020008 080084bc : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 80084bc: 6802 ldr r2, [r0, #0] 80084be: 4b08 ldr r3, [pc, #32] ; (80084e0 ) { 80084c0: b082 sub sp, #8 if(htim_base->Instance==TIM6) 80084c2: 429a cmp r2, r3 80084c4: d10a bne.n 80084dc { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80084c6: f503 3300 add.w r3, r3, #131072 ; 0x20000 80084ca: 69da ldr r2, [r3, #28] 80084cc: f042 0210 orr.w r2, r2, #16 80084d0: 61da str r2, [r3, #28] 80084d2: 69db ldr r3, [r3, #28] 80084d4: f003 0310 and.w r3, r3, #16 80084d8: 9301 str r3, [sp, #4] 80084da: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 80084dc: b002 add sp, #8 80084de: 4770 bx lr 80084e0: 40001000 .word 0x40001000 080084e4 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 80084e4: b570 push {r4, r5, r6, lr} 80084e6: 4606 mov r6, r0 80084e8: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80084ea: 2210 movs r2, #16 80084ec: 2100 movs r1, #0 80084ee: a802 add r0, sp, #8 80084f0: f000 ff2f bl 8009352 if(huart->Instance==USART1) 80084f4: 6832 ldr r2, [r6, #0] 80084f6: 4b2b ldr r3, [pc, #172] ; (80085a4 ) 80084f8: 429a cmp r2, r3 80084fa: d151 bne.n 80085a0 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 80084fc: f503 4358 add.w r3, r3, #55296 ; 0xd800 8008500: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008502: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8008504: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8008508: 619a str r2, [r3, #24] 800850a: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800850c: 4826 ldr r0, [pc, #152] ; (80085a8 ) __HAL_RCC_USART1_CLK_ENABLE(); 800850e: f402 4280 and.w r2, r2, #16384 ; 0x4000 8008512: 9200 str r2, [sp, #0] 8008514: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008516: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008518: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 800851a: f042 0204 orr.w r2, r2, #4 800851e: 619a str r2, [r3, #24] 8008520: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 8008522: 4c22 ldr r4, [pc, #136] ; (80085ac ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8008524: f003 0304 and.w r3, r3, #4 8008528: 9301 str r3, [sp, #4] 800852a: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 800852c: f44f 7300 mov.w r3, #512 ; 0x200 8008530: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8008532: 2302 movs r3, #2 8008534: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8008536: 2303 movs r3, #3 8008538: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800853a: f7fd fc51 bl 8005de0 GPIO_InitStruct.Pin = GPIO_PIN_10; 800853e: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008542: 4819 ldr r0, [pc, #100] ; (80085a8 ) 8008544: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8008546: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008548: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 800854a: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800854c: f7fd fc48 bl 8005de0 hdma_usart1_rx.Instance = DMA1_Channel5; 8008550: 4b17 ldr r3, [pc, #92] ; (80085b0 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8008552: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008554: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8008558: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 800855a: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 800855c: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800855e: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8008560: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 8008562: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 8008564: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8008566: f7fd f94d bl 8005804 800856a: b108 cbz r0, 8008570 { Error_Handler(); 800856c: f7ff fe06 bl 800817c __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8008570: f04f 0c10 mov.w ip, #16 8008574: 4b0f ldr r3, [pc, #60] ; (80085b4 ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 8008576: 6374 str r4, [r6, #52] ; 0x34 8008578: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 800857a: 4c0f ldr r4, [pc, #60] ; (80085b8 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 800857c: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 800857e: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8008582: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8008584: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8008586: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8008588: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800858a: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 800858c: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 800858e: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8008590: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8008592: f7fd f937 bl 8005804 8008596: b108 cbz r0, 800859c { Error_Handler(); 8008598: f7ff fdf0 bl 800817c } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 800859c: 6334 str r4, [r6, #48] ; 0x30 800859e: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 80085a0: b006 add sp, #24 80085a2: bd70 pop {r4, r5, r6, pc} 80085a4: 40013800 .word 0x40013800 80085a8: 40010800 .word 0x40010800 80085ac: 200006bc .word 0x200006bc 80085b0: 40020058 .word 0x40020058 80085b4: 40020044 .word 0x40020044 80085b8: 20000648 .word 0x20000648 080085bc : 80085bc: 4770 bx lr 080085be : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80085be: e7fe b.n 80085be 080085c0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80085c0: e7fe b.n 80085c0 080085c2 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80085c2: e7fe b.n 80085c2 080085c4 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80085c4: e7fe b.n 80085c4 080085c6 : 80085c6: 4770 bx lr 080085c8 : 80085c8: 4770 bx lr 080085ca : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80085ca: 4770 bx lr 080085cc : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80085cc: f7fc bdf4 b.w 80051b8 080085d0 : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 80085d0: 4801 ldr r0, [pc, #4] ; (80085d8 ) 80085d2: f7fd ba03 b.w 80059dc 80085d6: bf00 nop 80085d8: 20000740 .word 0x20000740 080085dc : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 80085dc: 4801 ldr r0, [pc, #4] ; (80085e4 ) 80085de: f7fd b9fd b.w 80059dc 80085e2: bf00 nop 80085e4: 20000648 .word 0x20000648 080085e8 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 80085e8: 4801 ldr r0, [pc, #4] ; (80085f0 ) 80085ea: f7fd b9f7 b.w 80059dc 80085ee: bf00 nop 80085f0: 200006bc .word 0x200006bc 080085f4 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 80085f4: 4801 ldr r0, [pc, #4] ; (80085fc ) 80085f6: f7fe bc39 b.w 8006e6c 80085fa: bf00 nop 80085fc: 20000700 .word 0x20000700 08008600 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8008600: 4801 ldr r0, [pc, #4] ; (8008608 ) 8008602: f7fe b881 b.w 8006708 8008606: bf00 nop 8008608: 20000784 .word 0x20000784 0800860c <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800860c: b570 push {r4, r5, r6, lr} 800860e: 460e mov r6, r1 8008610: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8008612: 460c mov r4, r1 8008614: 1ba3 subs r3, r4, r6 8008616: 429d cmp r5, r3 8008618: dc01 bgt.n 800861e <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 800861a: 4628 mov r0, r5 800861c: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 800861e: f3af 8000 nop.w 8008622: f804 0b01 strb.w r0, [r4], #1 8008626: e7f5 b.n 8008614 <_read+0x8> 08008628 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8008628: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 800862a: 4b0a ldr r3, [pc, #40] ; (8008654 <_sbrk+0x2c>) { 800862c: 4602 mov r2, r0 if (heap_end == 0) 800862e: 6819 ldr r1, [r3, #0] 8008630: b909 cbnz r1, 8008636 <_sbrk+0xe> heap_end = &end; 8008632: 4909 ldr r1, [pc, #36] ; (8008658 <_sbrk+0x30>) 8008634: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8008636: 4669 mov r1, sp prev_heap_end = heap_end; 8008638: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 800863a: 4402 add r2, r0 800863c: 428a cmp r2, r1 800863e: d906 bls.n 800864e <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8008640: f000 fe52 bl 80092e8 <__errno> 8008644: 230c movs r3, #12 8008646: 6003 str r3, [r0, #0] return (caddr_t) -1; 8008648: f04f 30ff mov.w r0, #4294967295 800864c: bd08 pop {r3, pc} } heap_end += incr; 800864e: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8008650: bd08 pop {r3, pc} 8008652: bf00 nop 8008654: 20000460 .word 0x20000460 8008658: 200017e4 .word 0x200017e4 0800865c <_close>: int _close(int file) { return -1; } 800865c: f04f 30ff mov.w r0, #4294967295 8008660: 4770 bx lr 08008662 <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 8008662: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 8008666: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8008668: 604b str r3, [r1, #4] } 800866a: 4770 bx lr 0800866c <_isatty>: int _isatty(int file) { return 1; } 800866c: 2001 movs r0, #1 800866e: 4770 bx lr 08008670 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 8008670: 2000 movs r0, #0 8008672: 4770 bx lr 08008674 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8008674: 4b0e ldr r3, [pc, #56] ; (80086b0 ) 8008676: 681a ldr r2, [r3, #0] 8008678: f042 0201 orr.w r2, r2, #1 800867c: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 800867e: 6859 ldr r1, [r3, #4] 8008680: 4a0c ldr r2, [pc, #48] ; (80086b4 ) 8008682: 400a ands r2, r1 8008684: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8008686: 681a ldr r2, [r3, #0] 8008688: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 800868c: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8008690: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8008692: 681a ldr r2, [r3, #0] 8008694: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8008698: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 800869a: 685a ldr r2, [r3, #4] 800869c: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80086a0: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80086a2: f44f 021f mov.w r2, #10420224 ; 0x9f0000 80086a6: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80086a8: 4a03 ldr r2, [pc, #12] ; (80086b8 ) 80086aa: 4b04 ldr r3, [pc, #16] ; (80086bc ) 80086ac: 609a str r2, [r3, #8] 80086ae: 4770 bx lr 80086b0: 40021000 .word 0x40021000 80086b4: f8ff0000 .word 0xf8ff0000 80086b8: 08004000 .word 0x08004000 80086bc: e000ed00 .word 0xe000ed00 080086c0 : UARTQUEUE WifiQueue; uart_hal_tx_type uart_hal_tx; void InitUartQueue(pUARTQUEUE pQueue) { setbuf(stdout, NULL); 80086c0: 4b0b ldr r3, [pc, #44] ; (80086f0 ) { 80086c2: b510 push {r4, lr} setbuf(stdout, NULL); 80086c4: 681b ldr r3, [r3, #0] { 80086c6: 4604 mov r4, r0 setbuf(stdout, NULL); 80086c8: 2100 movs r1, #0 80086ca: 6898 ldr r0, [r3, #8] 80086cc: f001 fb26 bl 8009d1c pQueue->data = pQueue->head = pQueue->tail = 0; 80086d0: 2300 movs r3, #0 uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 80086d2: 4a08 ldr r2, [pc, #32] ; (80086f4 ) pQueue->data = pQueue->head = pQueue->tail = 0; 80086d4: 6063 str r3, [r4, #4] 80086d6: 6023 str r3, [r4, #0] 80086d8: 60a3 str r3, [r4, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80086da: 4907 ldr r1, [pc, #28] ; (80086f8 ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 80086dc: f8a2 3400 strh.w r3, [r2, #1024] ; 0x400 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80086e0: 4806 ldr r0, [pc, #24] ; (80086fc ) uart_hal_tx.output_p = uart_hal_tx.input_p = 0; 80086e2: f8a2 3402 strh.w r3, [r2, #1026] ; 0x402 { //_Error_Handler(__FILE__, __LINE__); } //HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1); //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1); } 80086e6: e8bd 4010 ldmia.w sp!, {r4, lr} if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80086ea: 2201 movs r2, #1 80086ec: f7fe bad0 b.w 8006c90 80086f0: 2000024c .word 0x2000024c 80086f4: 20000fd0 .word 0x20000fd0 80086f8: 20000bd0 .word 0x20000bd0 80086fc: 20000700 .word 0x20000700 08008700 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008700: 4a14 ldr r2, [pc, #80] ; (8008754 ) { 8008702: b538 push {r3, r4, r5, lr} uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8008704: 6810 ldr r0, [r2, #0] 8008706: 1c43 adds r3, r0, #1 8008708: 6013 str r3, [r2, #0] 800870a: 4b13 ldr r3, [pc, #76] ; (8008758 ) 800870c: 6859 ldr r1, [r3, #4] 800870e: f103 040c add.w r4, r3, #12 8008712: 5d0d ldrb r5, [r1, r4] 8008714: 4c11 ldr r4, [pc, #68] ; (800875c ) #if false printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; #endif /* DEBUG_PRINT */ pQueue->tail++; 8008716: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008718: f5b1 6f80 cmp.w r1, #1024 ; 0x400 uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 800871c: 5425 strb r5, [r4, r0] 800871e: 4614 mov r4, r2 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8008720: bfa8 it ge 8008722: 2200 movge r2, #0 pQueue->data--; 8008724: 689d ldr r5, [r3, #8] pQueue->tail++; 8008726: bfb8 it lt 8008728: 6059 strlt r1, [r3, #4] pQueue->data--; 800872a: f105 35ff add.w r5, r5, #4294967295 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 800872e: bfa8 it ge 8008730: 605a strge r2, [r3, #4] pQueue->data--; 8008732: 609d str r5, [r3, #8] if(pQueue->data == 0){ 8008734: b96d cbnz r5, 8008752 // printf("data cnt zero !!! \r\n"); RF_Ctrl_Main(&uart_buf[Header]); 8008736: 4809 ldr r0, [pc, #36] ; (800875c ) 8008738: f000 fd62 bl 8009200 #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 800873c: 6822 ldr r2, [r4, #0] 800873e: 4629 mov r1, r5 8008740: 4806 ldr r0, [pc, #24] ; (800875c ) 8008742: f000 fe06 bl 8009352 // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 8008746: 6025 str r5, [r4, #0] HAL_Delay(1); 8008748: 2001 movs r0, #1 } } 800874a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_Delay(1); 800874e: f7fc bd45 b.w 80051dc 8008752: bd38 pop {r3, r4, r5, pc} 8008754: 20000464 .word 0x20000464 8008758: 20000bc4 .word 0x20000bc4 800875c: 200007c4 .word 0x200007c4 08008760 : AdcTimerCnt = UartRxTimerCnt = 0; 8008760: 2300 movs r3, #0 8008762: 4a0f ldr r2, [pc, #60] ; (80087a0 ) { 8008764: b510 push {r4, lr} AdcTimerCnt = UartRxTimerCnt = 0; 8008766: 6013 str r3, [r2, #0] pQueue->head++; 8008768: 4c0e ldr r4, [pc, #56] ; (80087a4 ) AdcTimerCnt = UartRxTimerCnt = 0; 800876a: 4a0f ldr r2, [pc, #60] ; (80087a8 ) 800876c: 6013 str r3, [r2, #0] pQueue->head++; 800876e: 6822 ldr r2, [r4, #0] 8008770: 3201 adds r2, #1 8008772: f5b2 6f80 cmp.w r2, #1024 ; 0x400 8008776: bfb8 it lt 8008778: 4613 movlt r3, r2 800877a: 6023 str r3, [r4, #0] pQueue->data++; 800877c: 68a3 ldr r3, [r4, #8] 800877e: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008780: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 8008784: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008786: db01 blt.n 800878c GetDataFromUartQueue(huart); 8008788: f7ff ffba bl 8008700 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800878c: 6823 ldr r3, [r4, #0] 800878e: 4907 ldr r1, [pc, #28] ; (80087ac ) 8008790: 2201 movs r2, #1 } 8008792: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008796: 4419 add r1, r3 8008798: 4805 ldr r0, [pc, #20] ; (80087b0 ) 800879a: f7fe ba79 b.w 8006c90 800879e: bf00 nop 80087a0: 2000045c .word 0x2000045c 80087a4: 20000bc4 .word 0x20000bc4 80087a8: 20000450 .word 0x20000450 80087ac: 20000bd0 .word 0x20000bd0 80087b0: 20000700 .word 0x20000700 080087b4 : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ 80087b4: b508 push {r3, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 80087b6: 78c3 ldrb r3, [r0, #3] 80087b8: 7881 ldrb r1, [r0, #2] 80087ba: 5cc2 ldrb r2, [r0, r3] 80087bc: 3001 adds r0, #1 80087be: f7fe fd76 bl 80072ae // printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\" \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length])); } // printf("CRC Result : \"%d\" \r\n",ret); return ret; } 80087c2: 3000 adds r0, #0 80087c4: bf18 it ne 80087c6: 2001 movne r0, #1 80087c8: bd08 pop {r3, pc} ... 080087cc : PLL_EN_3_5G_L_GPIO_Port, PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 80087cc: 23be movs r3, #190 ; 0xbe void RF_Status_Get(void){ 80087ce: b510 push {r4, lr} Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 80087d0: 4c0b ldr r4, [pc, #44] ; (8008800 ) Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 80087d2: 2160 movs r1, #96 ; 0x60 Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 80087d4: 7023 strb r3, [r4, #0] Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; 80087d6: 2302 movs r3, #2 80087d8: 7063 strb r3, [r4, #1] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 80087da: 2361 movs r3, #97 ; 0x61 Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 80087dc: 1c60 adds r0, r4, #1 Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 2; 80087de: 70a1 strb r1, [r4, #2] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 80087e0: 70e3 strb r3, [r4, #3] Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 80087e2: f7fe fd49 bl 8007278 Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 80087e6: 23eb movs r3, #235 ; 0xeb Prev_data[INDEX_BLUE_CRC] = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]); 80087e8: f884 0061 strb.w r0, [r4, #97] ; 0x61 Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 80087ec: f884 3062 strb.w r3, [r4, #98] ; 0x62 HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 80087f0: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 80087f2: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 80087f6: 2263 movs r2, #99 ; 0x63 80087f8: 4802 ldr r0, [pc, #8] ; (8008804 ) 80087fa: f7fe ba0f b.w 8006c1c 80087fe: bf00 nop 8008800: 200005e3 .word 0x200005e3 8008804: 20000700 .word 0x20000700 08008808 : static uint8_t Ack_Buf[6]; void RF_Status_Ack(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008808: 23be movs r3, #190 ; 0xbe void RF_Status_Ack(void){ 800880a: b510 push {r4, lr} Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 800880c: 4c0a ldr r4, [pc, #40] ; (8008838 ) Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; Ack_Buf[INDEX_BLUE_LENGTH] = 3; 800880e: 2103 movs r1, #3 Ack_Buf[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008810: 7023 strb r3, [r4, #0] Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008812: 2304 movs r3, #4 Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008814: 1c60 adds r0, r4, #1 Ack_Buf[INDEX_BLUE_TYPE] = TYPE_BLUECELL_ACK; 8008816: 7063 strb r3, [r4, #1] Ack_Buf[INDEX_BLUE_LENGTH] = 3; 8008818: 70a1 strb r1, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1; 800881a: 70e3 strb r3, [r4, #3] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 800881c: f7fe fd2c bl 8007278 Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008820: 23eb movs r3, #235 ; 0xeb HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008822: 78a2 ldrb r2, [r4, #2] Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]); 8008824: 7120 strb r0, [r4, #4] Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER; 8008826: 7163 strb r3, [r4, #5] HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 8008828: 4621 mov r1, r4 // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } 800882a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH] + 3); 800882e: 3203 adds r2, #3 8008830: 4802 ldr r0, [pc, #8] ; (800883c ) 8008832: f7fe b9f3 b.w 8006c1c 8008836: bf00 nop 8008838: 20000468 .word 0x20000468 800883c: 20000700 .word 0x20000700 08008840 : void RF_Operate(uint8_t* data_buf){ 8008840: b5f0 push {r4, r5, r6, r7, lr} uint32_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; // printf("Prev_data[INDEX_ATT_1_8G_DL1] : %x data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]); if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 8008842: 4db5 ldr r5, [pc, #724] ; (8008b18 ) 8008844: 7902 ldrb r2, [r0, #4] 8008846: 792b ldrb r3, [r5, #4] void RF_Operate(uint8_t* data_buf){ 8008848: b0a9 sub sp, #164 ; 0xa4 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 800884a: 4293 cmp r3, r2 void RF_Operate(uint8_t* data_buf){ 800884c: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 800884e: d00c beq.n 800886a BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008850: 4bb2 ldr r3, [pc, #712] ; (8008b1c ) 8008852: 9202 str r2, [sp, #8] 8008854: f103 0210 add.w r2, r3, #16 8008858: e892 0003 ldmia.w r2, {r0, r1} 800885c: e88d 0003 stmia.w sp, {r0, r1} 8008860: cb0f ldmia r3, {r0, r1, r2, r3} 8008862: f7fe fc11 bl 8007088 Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 8008866: 7923 ldrb r3, [r4, #4] 8008868: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 800886a: 7962 ldrb r2, [r4, #5] 800886c: 796b ldrb r3, [r5, #5] 800886e: 4293 cmp r3, r2 8008870: d00c beq.n 800888c BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008872: 4bab ldr r3, [pc, #684] ; (8008b20 ) 8008874: 9202 str r2, [sp, #8] 8008876: f103 0210 add.w r2, r3, #16 800887a: e892 0003 ldmia.w r2, {r0, r1} 800887e: e88d 0003 stmia.w sp, {r0, r1} 8008882: cb0f ldmia r3, {r0, r1, r2, r3} 8008884: f7fe fc00 bl 8007088 Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 8008888: 7963 ldrb r3, [r4, #5] 800888a: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 800888c: 79a2 ldrb r2, [r4, #6] 800888e: 79ab ldrb r3, [r5, #6] 8008890: 4293 cmp r3, r2 8008892: d00c beq.n 80088ae BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008894: 4ba3 ldr r3, [pc, #652] ; (8008b24 ) 8008896: 9202 str r2, [sp, #8] 8008898: f103 0210 add.w r2, r3, #16 800889c: e892 0003 ldmia.w r2, {r0, r1} 80088a0: e88d 0003 stmia.w sp, {r0, r1} 80088a4: cb0f ldmia r3, {r0, r1, r2, r3} 80088a6: f7fe fbef bl 8007088 Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 80088aa: 79a3 ldrb r3, [r4, #6] 80088ac: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 80088ae: 79e2 ldrb r2, [r4, #7] 80088b0: 79eb ldrb r3, [r5, #7] 80088b2: 4293 cmp r3, r2 80088b4: d00c beq.n 80088d0 BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 80088b6: 4b9c ldr r3, [pc, #624] ; (8008b28 ) 80088b8: 9202 str r2, [sp, #8] 80088ba: f103 0210 add.w r2, r3, #16 80088be: e892 0003 ldmia.w r2, {r0, r1} 80088c2: e88d 0003 stmia.w sp, {r0, r1} 80088c6: cb0f ldmia r3, {r0, r1, r2, r3} 80088c8: f7fe fbde bl 8007088 Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 80088cc: 79e3 ldrb r3, [r4, #7] 80088ce: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 80088d0: 7a22 ldrb r2, [r4, #8] 80088d2: 7a2b ldrb r3, [r5, #8] 80088d4: 4293 cmp r3, r2 80088d6: d00c beq.n 80088f2 BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 80088d8: 4b94 ldr r3, [pc, #592] ; (8008b2c ) 80088da: 9202 str r2, [sp, #8] 80088dc: f103 0210 add.w r2, r3, #16 80088e0: e892 0003 ldmia.w r2, {r0, r1} 80088e4: e88d 0003 stmia.w sp, {r0, r1} 80088e8: cb0f ldmia r3, {r0, r1, r2, r3} 80088ea: f7fe fbcd bl 8007088 Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 80088ee: 7a23 ldrb r3, [r4, #8] 80088f0: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 80088f2: 7a62 ldrb r2, [r4, #9] 80088f4: 7a6b ldrb r3, [r5, #9] 80088f6: 4293 cmp r3, r2 80088f8: d00c beq.n 8008914 BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 80088fa: 4b8d ldr r3, [pc, #564] ; (8008b30 ) 80088fc: 9202 str r2, [sp, #8] 80088fe: f103 0210 add.w r2, r3, #16 8008902: e892 0003 ldmia.w r2, {r0, r1} 8008906: e88d 0003 stmia.w sp, {r0, r1} 800890a: cb0f ldmia r3, {r0, r1, r2, r3} 800890c: f7fe fbbc bl 8007088 Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 8008910: 7a63 ldrb r3, [r4, #9] 8008912: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 8008914: 7aa2 ldrb r2, [r4, #10] 8008916: 7aab ldrb r3, [r5, #10] 8008918: 4293 cmp r3, r2 800891a: d00c beq.n 8008936 BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 800891c: 4b85 ldr r3, [pc, #532] ; (8008b34 ) 800891e: 9202 str r2, [sp, #8] 8008920: f103 0210 add.w r2, r3, #16 8008924: e892 0003 ldmia.w r2, {r0, r1} 8008928: e88d 0003 stmia.w sp, {r0, r1} 800892c: cb0f ldmia r3, {r0, r1, r2, r3} 800892e: f7fe fbab bl 8007088 Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 8008932: 7aa3 ldrb r3, [r4, #10] 8008934: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 8008936: 7ae2 ldrb r2, [r4, #11] 8008938: 7aeb ldrb r3, [r5, #11] 800893a: 4293 cmp r3, r2 800893c: d00c beq.n 8008958 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 800893e: 4b7e ldr r3, [pc, #504] ; (8008b38 ) 8008940: 9202 str r2, [sp, #8] 8008942: f103 0210 add.w r2, r3, #16 8008946: e892 0003 ldmia.w r2, {r0, r1} 800894a: e88d 0003 stmia.w sp, {r0, r1} 800894e: cb0f ldmia r3, {r0, r1, r2, r3} 8008950: f7fe fb9a bl 8007088 Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008954: 7ae3 ldrb r3, [r4, #11] 8008956: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008958: 7b22 ldrb r2, [r4, #12] 800895a: 7b2b ldrb r3, [r5, #12] 800895c: 4293 cmp r3, r2 800895e: d00c beq.n 800897a BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008960: 4b76 ldr r3, [pc, #472] ; (8008b3c ) 8008962: 9202 str r2, [sp, #8] 8008964: f103 0210 add.w r2, r3, #16 8008968: e892 0003 ldmia.w r2, {r0, r1} 800896c: e88d 0003 stmia.w sp, {r0, r1} 8008970: cb0f ldmia r3, {r0, r1, r2, r3} 8008972: f7fe fb89 bl 8007088 Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008976: 7b23 ldrb r3, [r4, #12] 8008978: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 800897a: 7b62 ldrb r2, [r4, #13] 800897c: 7b6b ldrb r3, [r5, #13] 800897e: 4293 cmp r3, r2 8008980: d00c beq.n 800899c BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008982: 4b6f ldr r3, [pc, #444] ; (8008b40 ) 8008984: 9202 str r2, [sp, #8] 8008986: f103 0210 add.w r2, r3, #16 800898a: e892 0003 ldmia.w r2, {r0, r1} 800898e: e88d 0003 stmia.w sp, {r0, r1} 8008992: cb0f ldmia r3, {r0, r1, r2, r3} 8008994: f7fe fb78 bl 8007088 Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008998: 7b63 ldrb r3, [r4, #13] 800899a: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 800899c: 7ba2 ldrb r2, [r4, #14] 800899e: 7bab ldrb r3, [r5, #14] 80089a0: 4293 cmp r3, r2 80089a2: d00c beq.n 80089be BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 80089a4: 4b67 ldr r3, [pc, #412] ; (8008b44 ) 80089a6: 9202 str r2, [sp, #8] 80089a8: f103 0210 add.w r2, r3, #16 80089ac: e892 0003 ldmia.w r2, {r0, r1} 80089b0: e88d 0003 stmia.w sp, {r0, r1} 80089b4: cb0f ldmia r3, {r0, r1, r2, r3} 80089b6: f7fe fb67 bl 8007088 Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 80089ba: 7ba3 ldrb r3, [r4, #14] 80089bc: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 80089be: 7be2 ldrb r2, [r4, #15] 80089c0: 7beb ldrb r3, [r5, #15] 80089c2: 4293 cmp r3, r2 80089c4: d00c beq.n 80089e0 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 80089c6: 4b60 ldr r3, [pc, #384] ; (8008b48 ) 80089c8: 9202 str r2, [sp, #8] 80089ca: f103 0210 add.w r2, r3, #16 80089ce: e892 0003 ldmia.w r2, {r0, r1} 80089d2: e88d 0003 stmia.w sp, {r0, r1} 80089d6: cb0f ldmia r3, {r0, r1, r2, r3} 80089d8: f7fe fb56 bl 8007088 Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 80089dc: 7be3 ldrb r3, [r4, #15] 80089de: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1]) 80089e0: 7c23 ldrb r3, [r4, #16] 80089e2: 7c2a ldrb r2, [r5, #16] 80089e4: 429a cmp r2, r3 80089e6: d113 bne.n 8008a10 ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1]) 80089e8: 7c69 ldrb r1, [r5, #17] 80089ea: 7c62 ldrb r2, [r4, #17] 80089ec: 4291 cmp r1, r2 80089ee: d10f bne.n 8008a10 ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 80089f0: 7ca9 ldrb r1, [r5, #18] 80089f2: 7ca2 ldrb r2, [r4, #18] 80089f4: 4291 cmp r1, r2 80089f6: d10b bne.n 8008a10 ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2]) 80089f8: 7ce9 ldrb r1, [r5, #19] 80089fa: 7ce2 ldrb r2, [r4, #19] 80089fc: 4291 cmp r1, r2 80089fe: d107 bne.n 8008a10 ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2]) 8008a00: 7d29 ldrb r1, [r5, #20] 8008a02: 7d22 ldrb r2, [r4, #20] 8008a04: 4291 cmp r1, r2 8008a06: d103 bne.n 8008a10 ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 8008a08: 7d69 ldrb r1, [r5, #21] 8008a0a: 7d62 ldrb r2, [r4, #21] 8008a0c: 4291 cmp r1, r2 8008a0e: d020 beq.n 8008a52 ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1] = data_buf[INDEX_ATT_3_5G_LOW1]; 8008a10: 4e4e ldr r6, [pc, #312] ; (8008b4c ) 8008a12: 742b strb r3, [r5, #16] 8008a14: 7633 strb r3, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008a16: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; // printf("data LOW2 %x\r\n",ALL_ATT_3_5G.data3); ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008a18: 2298 movs r2, #152 ; 0x98 ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1]; 8008a1a: 746b strb r3, [r5, #17] 8008a1c: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008a20: 7ca3 ldrb r3, [r4, #18] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008a22: f106 0110 add.w r1, r6, #16 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008a26: 74ab strb r3, [r5, #18] 8008a28: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008a2c: 7ce3 ldrb r3, [r4, #19] PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008a2e: 4668 mov r0, sp ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2] = data_buf[INDEX_ATT_3_5G_LOW2]; 8008a30: 74eb strb r3, [r5, #19] 8008a32: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2]; 8008a36: 7d23 ldrb r3, [r4, #20] 8008a38: 752b strb r3, [r5, #20] 8008a3a: f886 3088 strb.w r3, [r6, #136] ; 0x88 ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008a3e: 7d63 ldrb r3, [r4, #21] 8008a40: 756b strb r3, [r5, #21] 8008a42: f886 30a4 strb.w r3, [r6, #164] ; 0xa4 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008a46: f000 fc79 bl 800933c 8008a4a: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008a4e: f7fe fc5d bl 800730c } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 8008a52: 7da3 ldrb r3, [r4, #22] 8008a54: 7daa ldrb r2, [r5, #22] 8008a56: 429a cmp r2, r3 8008a58: d103 bne.n 8008a62 || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008a5a: 7de9 ldrb r1, [r5, #23] 8008a5c: 7de2 ldrb r2, [r4, #23] 8008a5e: 4291 cmp r1, r2 8008a60: d035 beq.n 8008ace ){ Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H]; 8008a62: 75ab strb r3, [r5, #22] Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L]; 8008a64: 7de3 ldrb r3, [r4, #23] 8008a66: 75eb strb r3, [r5, #23] // printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]); // printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]); temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); 8008a68: 7da0 ldrb r0, [r4, #22] 8008a6a: 7de3 ldrb r3, [r4, #23] 8008a6c: ea43 2300 orr.w r3, r3, r0, lsl #8 ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008a70: 4837 ldr r0, [pc, #220] ; (8008b50 ) 8008a72: 4358 muls r0, r3 8008a74: f7ff fbcc bl 8008210 8008a78: 4a36 ldr r2, [pc, #216] ; (8008b54 ) 8008a7a: 4b37 ldr r3, [pc, #220] ; (8008b58 ) 8008a7c: 9204 str r2, [sp, #16] 8008a7e: f44f 6282 mov.w r2, #1040 ; 0x410 8008a82: 9003 str r0, [sp, #12] 8008a84: 9202 str r2, [sp, #8] 8008a86: f103 0210 add.w r2, r3, #16 8008a8a: e892 0003 ldmia.w r2, {r0, r1} 8008a8e: e88d 0003 stmia.w sp, {r0, r1} 8008a92: cb0f ldmia r3, {r0, r1, r2, r3} 8008a94: f7ff fbd0 bl 8008238 // ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092); HAL_Delay(1); 8008a98: 2001 movs r0, #1 8008a9a: f7fc fb9f bl 80051dc BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 8008a9e: 7922 ldrb r2, [r4, #4] 8008aa0: 4b1e ldr r3, [pc, #120] ; (8008b1c ) 8008aa2: 9202 str r2, [sp, #8] 8008aa4: f103 0210 add.w r2, r3, #16 8008aa8: e892 0003 ldmia.w r2, {r0, r1} 8008aac: e88d 0003 stmia.w sp, {r0, r1} 8008ab0: cb0f ldmia r3, {r0, r1, r2, r3} 8008ab2: f7fe fae9 bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 8008ab6: 4b1a ldr r3, [pc, #104] ; (8008b20 ) 8008ab8: 7962 ldrb r2, [r4, #5] 8008aba: 9202 str r2, [sp, #8] 8008abc: f103 0210 add.w r2, r3, #16 8008ac0: e892 0003 ldmia.w r2, {r0, r1} 8008ac4: e88d 0003 stmia.w sp, {r0, r1} 8008ac8: cb0f ldmia r3, {r0, r1, r2, r3} 8008aca: f7fe fadd bl 8007088 } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 8008ace: 7e23 ldrb r3, [r4, #24] 8008ad0: 7e2a ldrb r2, [r5, #24] 8008ad2: 7e60 ldrb r0, [r4, #25] 8008ad4: 429a cmp r2, r3 8008ad6: d102 bne.n 8008ade || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 8008ad8: 7e6a ldrb r2, [r5, #25] 8008ada: 4282 cmp r2, r0 8008adc: d070 beq.n 8008bc0 temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); // printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]); // printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]); Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H]; 8008ade: 762b strb r3, [r5, #24] Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L]; 8008ae0: 7668 strb r0, [r5, #25] temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); 8008ae2: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008ae6: 4b1a ldr r3, [pc, #104] ; (8008b50 ) 8008ae8: 4358 muls r0, r3 8008aea: f7ff fb91 bl 8008210 8008aee: 4a19 ldr r2, [pc, #100] ; (8008b54 ) 8008af0: 4b1a ldr r3, [pc, #104] ; (8008b5c ) 8008af2: 9204 str r2, [sp, #16] 8008af4: f44f 6282 mov.w r2, #1040 ; 0x410 8008af8: 9003 str r0, [sp, #12] 8008afa: 9202 str r2, [sp, #8] 8008afc: f103 0210 add.w r2, r3, #16 8008b00: e892 0003 ldmia.w r2, {r0, r1} 8008b04: e88d 0003 stmia.w sp, {r0, r1} 8008b08: cb0f ldmia r3, {r0, r1, r2, r3} 8008b0a: f7ff fb95 bl 8008238 // ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092); HAL_Delay(1); 8008b0e: 2001 movs r0, #1 8008b10: f7fc fb64 bl 80051dc 8008b14: e024 b.n 8008b60 8008b16: bf00 nop 8008b18: 200005e3 .word 0x200005e3 8008b1c: 20000008 .word 0x20000008 8008b20: 20000020 .word 0x20000020 8008b24: 20000038 .word 0x20000038 8008b28: 20000050 .word 0x20000050 8008b2c: 20000068 .word 0x20000068 8008b30: 20000080 .word 0x20000080 8008b34: 20000098 .word 0x20000098 8008b38: 200000b0 .word 0x200000b0 8008b3c: 200000c8 .word 0x200000c8 8008b40: 200000e0 .word 0x200000e0 8008b44: 200000f8 .word 0x200000f8 8008b48: 20000110 .word 0x20000110 8008b4c: 200004d8 .word 0x200004d8 8008b50: 000186a0 .word 0x000186a0 8008b54: 009f8092 .word 0x009f8092 8008b58: 200001b8 .word 0x200001b8 8008b5c: 200001d0 .word 0x200001d0 BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 8008b60: 79a2 ldrb r2, [r4, #6] 8008b62: 4bc5 ldr r3, [pc, #788] ; (8008e78 ) 8008b64: 9202 str r2, [sp, #8] 8008b66: f103 0210 add.w r2, r3, #16 8008b6a: e892 0003 ldmia.w r2, {r0, r1} 8008b6e: e88d 0003 stmia.w sp, {r0, r1} 8008b72: cb0f ldmia r3, {r0, r1, r2, r3} 8008b74: f7fe fa88 bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008b78: 79e2 ldrb r2, [r4, #7] 8008b7a: 4bc0 ldr r3, [pc, #768] ; (8008e7c ) 8008b7c: 9202 str r2, [sp, #8] 8008b7e: f103 0210 add.w r2, r3, #16 8008b82: e892 0003 ldmia.w r2, {r0, r1} 8008b86: e88d 0003 stmia.w sp, {r0, r1} 8008b8a: cb0f ldmia r3, {r0, r1, r2, r3} 8008b8c: f7fe fa7c bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008b90: 7a22 ldrb r2, [r4, #8] 8008b92: 4bbb ldr r3, [pc, #748] ; (8008e80 ) 8008b94: 9202 str r2, [sp, #8] 8008b96: f103 0210 add.w r2, r3, #16 8008b9a: e892 0003 ldmia.w r2, {r0, r1} 8008b9e: e88d 0003 stmia.w sp, {r0, r1} 8008ba2: cb0f ldmia r3, {r0, r1, r2, r3} 8008ba4: f7fe fa70 bl 8007088 BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008ba8: 4bb6 ldr r3, [pc, #728] ; (8008e84 ) 8008baa: 7a62 ldrb r2, [r4, #9] 8008bac: 9202 str r2, [sp, #8] 8008bae: f103 0210 add.w r2, r3, #16 8008bb2: e892 0003 ldmia.w r2, {r0, r1} 8008bb6: e88d 0003 stmia.w sp, {r0, r1} 8008bba: cb0f ldmia r3, {r0, r1, r2, r3} 8008bbc: f7fe fa64 bl 8007088 } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) 8008bc0: 7ea3 ldrb r3, [r4, #26] 8008bc2: 7eaa ldrb r2, [r5, #26] 8008bc4: 7ee0 ldrb r0, [r4, #27] 8008bc6: 429a cmp r2, r3 8008bc8: d102 bne.n 8008bd0 || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ 8008bca: 7eea ldrb r2, [r5, #27] 8008bcc: 4282 cmp r2, r0 8008bce: d032 beq.n 8008c36 temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); // printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]); // printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]); Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H]; 8008bd0: 76ab strb r3, [r5, #26] Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L]; 8008bd2: 76e8 strb r0, [r5, #27] temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); 8008bd4: ea40 2003 orr.w r0, r0, r3, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092); ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008bd8: 4bab ldr r3, [pc, #684] ; (8008e88 ) 8008bda: 4358 muls r0, r3 8008bdc: f7ff fb18 bl 8008210 8008be0: 4aaa ldr r2, [pc, #680] ; (8008e8c ) 8008be2: 4bab ldr r3, [pc, #684] ; (8008e90 ) 8008be4: 9204 str r2, [sp, #16] 8008be6: f44f 6282 mov.w r2, #1040 ; 0x410 8008bea: 9003 str r0, [sp, #12] 8008bec: 9202 str r2, [sp, #8] 8008bee: f103 0210 add.w r2, r3, #16 8008bf2: e892 0003 ldmia.w r2, {r0, r1} 8008bf6: e88d 0003 stmia.w sp, {r0, r1} 8008bfa: cb0f ldmia r3, {r0, r1, r2, r3} 8008bfc: f7ff fb1c bl 8008238 // ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092); HAL_Delay(1); 8008c00: 2001 movs r0, #1 8008c02: f7fc faeb bl 80051dc BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008c06: 7aa2 ldrb r2, [r4, #10] 8008c08: 4ba2 ldr r3, [pc, #648] ; (8008e94 ) 8008c0a: 9202 str r2, [sp, #8] 8008c0c: f103 0210 add.w r2, r3, #16 8008c10: e892 0003 ldmia.w r2, {r0, r1} 8008c14: e88d 0003 stmia.w sp, {r0, r1} 8008c18: cb0f ldmia r3, {r0, r1, r2, r3} 8008c1a: f7fe fa35 bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008c1e: 4b9e ldr r3, [pc, #632] ; (8008e98 ) 8008c20: 7ae2 ldrb r2, [r4, #11] 8008c22: 9202 str r2, [sp, #8] 8008c24: f103 0210 add.w r2, r3, #16 8008c28: e892 0003 ldmia.w r2, {r0, r1} 8008c2c: e88d 0003 stmia.w sp, {r0, r1} 8008c30: cb0f ldmia r3, {r0, r1, r2, r3} 8008c32: f7fe fa29 bl 8007088 } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) 8008c36: 7f23 ldrb r3, [r4, #28] 8008c38: 7f2a ldrb r2, [r5, #28] 8008c3a: 429a cmp r2, r3 8008c3c: d103 bne.n 8008c46 || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ 8008c3e: 7f69 ldrb r1, [r5, #29] 8008c40: 7f62 ldrb r2, [r4, #29] 8008c42: 4291 cmp r1, r2 8008c44: d04d beq.n 8008ce2 Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H]; 8008c46: 772b strb r3, [r5, #28] Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L]; 8008c48: 7f63 ldrb r3, [r4, #29] 8008c4a: 776b strb r3, [r5, #29] // printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]); // printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]); temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); 8008c4c: 7f20 ldrb r0, [r4, #28] 8008c4e: 7f63 ldrb r3, [r4, #29] 8008c50: ea43 2300 orr.w r3, r3, r0, lsl #8 // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092); ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092); 8008c54: 488c ldr r0, [pc, #560] ; (8008e88 ) 8008c56: 4358 muls r0, r3 8008c58: f7ff fada bl 8008210 8008c5c: 4a8b ldr r2, [pc, #556] ; (8008e8c ) 8008c5e: 4b8f ldr r3, [pc, #572] ; (8008e9c ) 8008c60: 9204 str r2, [sp, #16] 8008c62: f44f 6282 mov.w r2, #1040 ; 0x410 8008c66: 9003 str r0, [sp, #12] 8008c68: 9202 str r2, [sp, #8] 8008c6a: f103 0210 add.w r2, r3, #16 8008c6e: e892 0003 ldmia.w r2, {r0, r1} 8008c72: e88d 0003 stmia.w sp, {r0, r1} 8008c76: cb0f ldmia r3, {r0, r1, r2, r3} 8008c78: f7ff fade bl 8008238 // ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092); HAL_Delay(1); 8008c7c: 2001 movs r0, #1 8008c7e: f7fc faad bl 80051dc BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008c82: 7b22 ldrb r2, [r4, #12] 8008c84: 4b86 ldr r3, [pc, #536] ; (8008ea0 ) 8008c86: 9202 str r2, [sp, #8] 8008c88: f103 0210 add.w r2, r3, #16 8008c8c: e892 0003 ldmia.w r2, {r0, r1} 8008c90: e88d 0003 stmia.w sp, {r0, r1} 8008c94: cb0f ldmia r3, {r0, r1, r2, r3} 8008c96: f7fe f9f7 bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008c9a: 7b62 ldrb r2, [r4, #13] 8008c9c: 4b81 ldr r3, [pc, #516] ; (8008ea4 ) 8008c9e: 9202 str r2, [sp, #8] 8008ca0: f103 0210 add.w r2, r3, #16 8008ca4: e892 0003 ldmia.w r2, {r0, r1} 8008ca8: e88d 0003 stmia.w sp, {r0, r1} 8008cac: cb0f ldmia r3, {r0, r1, r2, r3} 8008cae: f7fe f9eb bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008cb2: 7ba2 ldrb r2, [r4, #14] 8008cb4: 4b7c ldr r3, [pc, #496] ; (8008ea8 ) 8008cb6: 9202 str r2, [sp, #8] 8008cb8: f103 0210 add.w r2, r3, #16 8008cbc: e892 0003 ldmia.w r2, {r0, r1} 8008cc0: e88d 0003 stmia.w sp, {r0, r1} 8008cc4: cb0f ldmia r3, {r0, r1, r2, r3} 8008cc6: f7fe f9df bl 8007088 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008cca: 4b78 ldr r3, [pc, #480] ; (8008eac ) 8008ccc: 7be2 ldrb r2, [r4, #15] 8008cce: 9202 str r2, [sp, #8] 8008cd0: f103 0210 add.w r2, r3, #16 8008cd4: e892 0003 ldmia.w r2, {r0, r1} 8008cd8: e88d 0003 stmia.w sp, {r0, r1} 8008cdc: cb0f ldmia r3, {r0, r1, r2, r3} 8008cde: f7fe f9d3 bl 8007088 } if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H]) 8008ce2: 7fa3 ldrb r3, [r4, #30] 8008ce4: 7faa ldrb r2, [r5, #30] 8008ce6: 429a cmp r2, r3 8008ce8: d109 bne.n 8008cfe ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M]) 8008cea: 7fe9 ldrb r1, [r5, #31] 8008cec: 7fe2 ldrb r2, [r4, #31] 8008cee: 4291 cmp r1, r2 8008cf0: d105 bne.n 8008cfe || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){ 8008cf2: f895 1020 ldrb.w r1, [r5, #32] 8008cf6: f894 2020 ldrb.w r2, [r4, #32] 8008cfa: 4291 cmp r1, r2 8008cfc: d02a beq.n 8008d54 Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H]; 8008cfe: 77ab strb r3, [r5, #30] Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 8008d00: 7fe3 ldrb r3, [r4, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | (data_buf[INDEX_PLL_3_5G_LOW_L]); #if 1 // PYJ.2019.08.12_BEGIN -- temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d02: f44f 5240 mov.w r2, #12288 ; 0x3000 Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M]; 8008d06: 77eb strb r3, [r5, #31] Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L]; 8008d08: f894 3020 ldrb.w r3, [r4, #32] 8008d0c: f885 3020 strb.w r3, [r5, #32] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 8008d10: 7fe1 ldrb r1, [r4, #31] temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 8008d12: 7fa3 ldrb r3, [r4, #30] (data_buf[INDEX_PLL_3_5G_LOW_M] << 8) | 8008d14: 0209 lsls r1, r1, #8 temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 8008d16: ea41 4103 orr.w r1, r1, r3, lsl #16 temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d1a: f241 3388 movw r3, #5000 ; 0x1388 (data_buf[INDEX_PLL_3_5G_LOW_L]); 8008d1e: f894 0020 ldrb.w r0, [r4, #32] temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d22: 9300 str r3, [sp, #0] 8008d24: 4301 orrs r1, r0 8008d26: 2308 movs r3, #8 8008d28: a826 add r0, sp, #152 ; 0x98 8008d2a: f7fe fc49 bl 80075c0 #else temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x14C2,0x3); 8008d2e: 2203 movs r2, #3 8008d30: 9205 str r2, [sp, #20] 8008d32: f241 42c2 movw r2, #5314 ; 0x14c2 8008d36: 9204 str r2, [sp, #16] 8008d38: 9a26 ldr r2, [sp, #152] ; 0x98 8008d3a: 4b5d ldr r3, [pc, #372] ; (8008eb0 ) 8008d3c: 9203 str r2, [sp, #12] 8008d3e: 9a27 ldr r2, [sp, #156] ; 0x9c 8008d40: 9202 str r2, [sp, #8] 8008d42: f103 0210 add.w r2, r3, #16 8008d46: e892 0003 ldmia.w r2, {r0, r1} 8008d4a: e88d 0003 stmia.w sp, {r0, r1} 8008d4e: cb0f ldmia r3, {r0, r1, r2, r3} 8008d50: f7fe fccc bl 80076ec // ADF4153_Module_Ctrl(Pll_3_5_L,0x385E48,0x163001,0x1442,3); } if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H]) 8008d54: f894 3021 ldrb.w r3, [r4, #33] ; 0x21 8008d58: f895 2021 ldrb.w r2, [r5, #33] ; 0x21 8008d5c: 429a cmp r2, r3 8008d5e: d10b bne.n 8008d78 || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M]) 8008d60: f895 1022 ldrb.w r1, [r5, #34] ; 0x22 8008d64: f894 2022 ldrb.w r2, [r4, #34] ; 0x22 8008d68: 4291 cmp r1, r2 8008d6a: d105 bne.n 8008d78 || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){ 8008d6c: f895 1023 ldrb.w r1, [r5, #35] ; 0x23 8008d70: f894 2023 ldrb.w r2, [r4, #35] ; 0x23 8008d74: 4291 cmp r1, r2 8008d76: d02f beq.n 8008dd8 Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H]; 8008d78: f885 3021 strb.w r3, [r5, #33] ; 0x21 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 8008d7c: f894 3022 ldrb.w r3, [r4, #34] ; 0x22 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | (data_buf[INDEX_PLL_3_5G_HIGH_L]); #if 1 // PYJ.2019.08.12_BEGIN -- // temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d80: f44f 5240 mov.w r2, #12288 ; 0x3000 Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M]; 8008d84: f885 3022 strb.w r3, [r5, #34] ; 0x22 Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L]; 8008d88: f894 3023 ldrb.w r3, [r4, #35] ; 0x23 8008d8c: f885 3023 strb.w r3, [r5, #35] ; 0x23 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 8008d90: f894 1022 ldrb.w r1, [r4, #34] ; 0x22 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 8008d94: f894 3021 ldrb.w r3, [r4, #33] ; 0x21 (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8) | 8008d98: 0209 lsls r1, r1, #8 temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) | 8008d9a: ea41 4103 orr.w r1, r1, r3, lsl #16 temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d9e: f241 3388 movw r3, #5000 ; 0x1388 (data_buf[INDEX_PLL_3_5G_HIGH_L]); 8008da2: f894 0023 ldrb.w r0, [r4, #35] ; 0x23 temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008da6: 9300 str r3, [sp, #0] 8008da8: 4301 orrs r1, r0 8008daa: 2308 movs r3, #8 8008dac: a826 add r0, sp, #152 ; 0x98 8008dae: f7fe fc07 bl 80075c0 // printf("N_reg : %08x R_reg :%x\r\n",temp_reg.N_reg,temp_reg.R_reg); #else temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x14C2,0x3); 8008db2: 2203 movs r2, #3 8008db4: 9205 str r2, [sp, #20] 8008db6: f241 42c2 movw r2, #5314 ; 0x14c2 8008dba: 9204 str r2, [sp, #16] 8008dbc: 9a26 ldr r2, [sp, #152] ; 0x98 8008dbe: 4b3d ldr r3, [pc, #244] ; (8008eb4 ) 8008dc0: 9203 str r2, [sp, #12] 8008dc2: 9a27 ldr r2, [sp, #156] ; 0x9c 8008dc4: 9202 str r2, [sp, #8] 8008dc6: f103 0210 add.w r2, r3, #16 8008dca: e892 0003 ldmia.w r2, {r0, r1} 8008dce: e88d 0003 stmia.w sp, {r0, r1} 8008dd2: cb0f ldmia r3, {r0, r1, r2, r3} 8008dd4: f7fe fc8a bl 80076ec } if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){ } if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){ 8008dd8: f894 1043 ldrb.w r1, [r4, #67] ; 0x43 8008ddc: f895 3043 ldrb.w r3, [r5, #67] ; 0x43 8008de0: 428b cmp r3, r1 8008de2: d006 beq.n 8008df2 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]); 8008de4: 2043 movs r0, #67 ; 0x43 8008de6: f7fe fe1f bl 8007a28 Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL]; 8008dea: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8008dee: f885 3043 strb.w r3, [r5, #67] ; 0x43 } if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){ 8008df2: f894 1044 ldrb.w r1, [r4, #68] ; 0x44 8008df6: f895 3044 ldrb.w r3, [r5, #68] ; 0x44 8008dfa: 428b cmp r3, r1 8008dfc: d006 beq.n 8008e0c Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]); 8008dfe: 2044 movs r0, #68 ; 0x44 8008e00: f7fe fe12 bl 8007a28 Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL]; 8008e04: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 8008e08: f885 3044 strb.w r3, [r5, #68] ; 0x44 } if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){ 8008e0c: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8008e10: f895 3045 ldrb.w r3, [r5, #69] ; 0x45 8008e14: 428b cmp r3, r1 8008e16: d006 beq.n 8008e26 Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]); 8008e18: 2045 movs r0, #69 ; 0x45 8008e1a: f7fe fe05 bl 8007a28 Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL]; 8008e1e: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 8008e22: f885 3045 strb.w r3, [r5, #69] ; 0x45 } if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){ 8008e26: f894 1046 ldrb.w r1, [r4, #70] ; 0x46 8008e2a: f895 3046 ldrb.w r3, [r5, #70] ; 0x46 8008e2e: 428b cmp r3, r1 8008e30: d006 beq.n 8008e40 Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]); 8008e32: 2046 movs r0, #70 ; 0x46 8008e34: f7fe fdf8 bl 8007a28 Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL]; 8008e38: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 8008e3c: f885 3046 strb.w r3, [r5, #70] ; 0x46 } if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){ 8008e40: f894 104a ldrb.w r1, [r4, #74] ; 0x4a 8008e44: f895 304a ldrb.w r3, [r5, #74] ; 0x4a 8008e48: 428b cmp r3, r1 8008e4a: d006 beq.n 8008e5a Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]); 8008e4c: 204a movs r0, #74 ; 0x4a 8008e4e: f7fe fdeb bl 8007a28 Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L]; 8008e52: f894 304a ldrb.w r3, [r4, #74] ; 0x4a 8008e56: f885 304a strb.w r3, [r5, #74] ; 0x4a } if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){ 8008e5a: f894 1049 ldrb.w r1, [r4, #73] ; 0x49 8008e5e: f895 3049 ldrb.w r3, [r5, #73] ; 0x49 8008e62: 428b cmp r3, r1 8008e64: d028 beq.n 8008eb8 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]); 8008e66: 2049 movs r0, #73 ; 0x49 8008e68: f7fe fdde bl 8007a28 Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H]; 8008e6c: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 8008e70: f885 3049 strb.w r3, [r5, #73] ; 0x49 8008e74: e020 b.n 8008eb8 8008e76: bf00 nop 8008e78: 20000038 .word 0x20000038 8008e7c: 20000050 .word 0x20000050 8008e80: 20000068 .word 0x20000068 8008e84: 20000080 .word 0x20000080 8008e88: 000186a0 .word 0x000186a0 8008e8c: 009f8092 .word 0x009f8092 8008e90: 200001e8 .word 0x200001e8 8008e94: 20000098 .word 0x20000098 8008e98: 200000b0 .word 0x200000b0 8008e9c: 20000200 .word 0x20000200 8008ea0: 200000c8 .word 0x200000c8 8008ea4: 200000e0 .word 0x200000e0 8008ea8: 200000f8 .word 0x200000f8 8008eac: 20000110 .word 0x20000110 8008eb0: 20000234 .word 0x20000234 8008eb4: 2000021c .word 0x2000021c } if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){ 8008eb8: f894 1047 ldrb.w r1, [r4, #71] ; 0x47 8008ebc: f895 3047 ldrb.w r3, [r5, #71] ; 0x47 8008ec0: 428b cmp r3, r1 8008ec2: f000 8190 beq.w 80091e6 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; ADC_Modify = 1; 8008ec6: 2601 movs r6, #1 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); 8008ec8: 2047 movs r0, #71 ; 0x47 8008eca: f7fe fdad bl 8007a28 Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; 8008ece: f894 3047 ldrb.w r3, [r4, #71] ; 0x47 8008ed2: f885 3047 strb.w r3, [r5, #71] ; 0x47 } if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){ 8008ed6: f894 1048 ldrb.w r1, [r4, #72] ; 0x48 8008eda: f895 3048 ldrb.w r3, [r5, #72] ; 0x48 8008ede: 428b cmp r3, r1 8008ee0: d007 beq.n 8008ef2 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; ADC_Modify = 1; 8008ee2: 2601 movs r6, #1 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); 8008ee4: 2048 movs r0, #72 ; 0x48 8008ee6: f7fe fd9f bl 8007a28 Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; 8008eea: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 8008eee: f885 3048 strb.w r3, [r5, #72] ; 0x48 } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8008ef2: f894 104b ldrb.w r1, [r4, #75] ; 0x4b 8008ef6: f895 304b ldrb.w r3, [r5, #75] ; 0x4b 8008efa: 428b cmp r3, r1 8008efc: d02d beq.n 8008f5a Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]); 8008efe: 204b movs r0, #75 ; 0x4b 8008f00: f7fe fd92 bl 8007a28 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8008f04: f894 304b ldrb.w r3, [r4, #75] ; 0x4b HAL_Delay(1); 8008f08: 2001 movs r0, #1 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8008f0a: f885 304b strb.w r3, [r5, #75] ; 0x4b HAL_Delay(1); 8008f0e: f7fc f965 bl 80051dc // printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]); if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8008f12: f894 304b ldrb.w r3, [r4, #75] ; 0x4b 8008f16: b303 cbz r3, 8008f5a #if 1 // PYJ.2019.08.12_BEGIN -- // temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | // (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | // (Prev_data[INDEX_PLL_3_5G_LOW_L]); temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8008f18: f895 1022 ldrb.w r1, [r5, #34] ; 0x22 temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 8008f1c: f895 3021 ldrb.w r3, [r5, #33] ; 0x21 (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8008f20: 0209 lsls r1, r1, #8 temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 8008f22: ea41 4103 orr.w r1, r1, r3, lsl #16 (Prev_data[INDEX_PLL_3_5G_HIGH_L]); 8008f26: f895 3023 ldrb.w r3, [r5, #35] ; 0x23 // temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f2a: f242 7010 movw r0, #10000 ; 0x2710 (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | 8008f2e: 4319 orrs r1, r3 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f30: f241 3388 movw r3, #5000 ; 0x1388 temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- // ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); // ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3); PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008f34: 4faf ldr r7, [pc, #700] ; (80091f4 ) temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f36: 4341 muls r1, r0 8008f38: 9300 str r3, [sp, #0] 8008f3a: f44f 5240 mov.w r2, #12288 ; 0x3000 8008f3e: 2308 movs r3, #8 8008f40: a826 add r0, sp, #152 ; 0x98 8008f42: f7fe fb3d bl 80075c0 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008f46: 2298 movs r2, #152 ; 0x98 8008f48: f107 0110 add.w r1, r7, #16 8008f4c: 4668 mov r0, sp 8008f4e: f000 f9f5 bl 800933c 8008f52: e897 000f ldmia.w r7, {r0, r1, r2, r3} 8008f56: f7fe f9d9 bl 800730c } } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 8008f5a: f894 104c ldrb.w r1, [r4, #76] ; 0x4c 8008f5e: f895 304c ldrb.w r3, [r5, #76] ; 0x4c 8008f62: 428b cmp r3, r1 8008f64: d02a beq.n 8008fbc Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]); 8008f66: 204c movs r0, #76 ; 0x4c 8008f68: f7fe fd5e bl 8007a28 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L]; 8008f6c: f894 304c ldrb.w r3, [r4, #76] ; 0x4c HAL_Delay(1); 8008f70: 2001 movs r0, #1 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L]; 8008f72: f885 304c strb.w r3, [r5, #76] ; 0x4c HAL_Delay(1); 8008f76: f7fc f931 bl 80051dc // printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]); if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 8008f7a: f894 304c ldrb.w r3, [r4, #76] ; 0x4c 8008f7e: b1eb cbz r3, 8008fbc #if 1 // PYJ.2019.08.12_BEGIN -- // temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | // (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8) | // (Prev_data[INDEX_PLL_3_5G_HIGH_L]); temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 8008f80: 7fe9 ldrb r1, [r5, #31] temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | 8008f82: 7fab ldrb r3, [r5, #30] (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 8008f84: 0209 lsls r1, r1, #8 temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) | 8008f86: ea41 4103 orr.w r1, r1, r3, lsl #16 (Prev_data[INDEX_PLL_3_5G_LOW_L]); 8008f8a: f895 3020 ldrb.w r3, [r5, #32] temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f8e: f242 7010 movw r0, #10000 ; 0x2710 (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 8008f92: 4319 orrs r1, r3 temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f94: f241 3388 movw r3, #5000 ; 0x1388 // temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING); #else temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); #endif // PYJ.2019.08.12_END -- // ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008f98: 4f96 ldr r7, [pc, #600] ; (80091f4 ) temp_reg = ADF4153_Freq_Calc(temp_val * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f9a: 4341 muls r1, r0 8008f9c: 9300 str r3, [sp, #0] 8008f9e: 4a96 ldr r2, [pc, #600] ; (80091f8 ) 8008fa0: 2302 movs r3, #2 8008fa2: a826 add r0, sp, #152 ; 0x98 8008fa4: f7fe fb0c bl 80075c0 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008fa8: 2298 movs r2, #152 ; 0x98 8008faa: f107 0110 add.w r1, r7, #16 8008fae: 4668 mov r0, sp 8008fb0: f000 f9c4 bl 800933c 8008fb4: e897 000f ldmia.w r7, {r0, r1, r2, r3} 8008fb8: f7fe f9a8 bl 800730c } } if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){ 8008fbc: f894 304d ldrb.w r3, [r4, #77] ; 0x4d 8008fc0: f895 204d ldrb.w r2, [r5, #77] ; 0x4d 8008fc4: 429a cmp r2, r3 8008fc6: d006 beq.n 8008fd6 Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL]; 8008fc8: f885 304d strb.w r3, [r5, #77] ; 0x4d Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]); 8008fcc: f894 104d ldrb.w r1, [r4, #77] ; 0x4d 8008fd0: 204d movs r0, #77 ; 0x4d 8008fd2: f7fe fd29 bl 8007a28 } if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){ 8008fd6: f894 304e ldrb.w r3, [r4, #78] ; 0x4e 8008fda: f895 204e ldrb.w r2, [r5, #78] ; 0x4e 8008fde: 429a cmp r2, r3 8008fe0: d006 beq.n 8008ff0 Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL]; 8008fe2: f885 304e strb.w r3, [r5, #78] ; 0x4e Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]); 8008fe6: f894 104e ldrb.w r1, [r4, #78] ; 0x4e 8008fea: 204e movs r0, #78 ; 0x4e 8008fec: f7fe fd1c bl 8007a28 } if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){ 8008ff0: 4d82 ldr r5, [pc, #520] ; (80091fc ) 8008ff2: f894 304f ldrb.w r3, [r4, #79] ; 0x4f 8008ff6: f895 204f ldrb.w r2, [r5, #79] ; 0x4f 8008ffa: 429a cmp r2, r3 8008ffc: d006 beq.n 800900c Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL]; 8008ffe: f885 304f strb.w r3, [r5, #79] ; 0x4f Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]); 8009002: f894 104f ldrb.w r1, [r4, #79] ; 0x4f 8009006: 204f movs r0, #79 ; 0x4f 8009008: f7fe fd0e bl 8007a28 } if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){ 800900c: f894 3050 ldrb.w r3, [r4, #80] ; 0x50 8009010: f895 2050 ldrb.w r2, [r5, #80] ; 0x50 8009014: 429a cmp r2, r3 8009016: d006 beq.n 8009026 Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL]; 8009018: f885 3050 strb.w r3, [r5, #80] ; 0x50 Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]); 800901c: f894 1050 ldrb.w r1, [r4, #80] ; 0x50 8009020: 2050 movs r0, #80 ; 0x50 8009022: f7fe fd01 bl 8007a28 } if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H]) 8009026: f894 3051 ldrb.w r3, [r4, #81] ; 0x51 800902a: f895 2051 ldrb.w r2, [r5, #81] ; 0x51 800902e: 429a cmp r2, r3 8009030: d105 bne.n 800903e ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){ 8009032: f895 1052 ldrb.w r1, [r5, #82] ; 0x52 8009036: f894 2052 ldrb.w r2, [r4, #82] ; 0x52 800903a: 4291 cmp r1, r2 800903c: d006 beq.n 800904c ADC_Modify |= 0x01; 800903e: 2601 movs r6, #1 Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H]; 8009040: f885 3051 strb.w r3, [r5, #81] ; 0x51 Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L]; 8009044: f894 3052 ldrb.w r3, [r4, #82] ; 0x52 8009048: f885 3052 strb.w r3, [r5, #82] ; 0x52 } if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H]) 800904c: f894 3053 ldrb.w r3, [r4, #83] ; 0x53 8009050: f895 2053 ldrb.w r2, [r5, #83] ; 0x53 8009054: 429a cmp r2, r3 8009056: d105 bne.n 8009064 ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){ 8009058: f895 1054 ldrb.w r1, [r5, #84] ; 0x54 800905c: f894 2054 ldrb.w r2, [r4, #84] ; 0x54 8009060: 4291 cmp r1, r2 8009062: d007 beq.n 8009074 ADC_Modify |= 0x02; Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H]; 8009064: f885 3053 strb.w r3, [r5, #83] ; 0x53 Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L]; 8009068: f894 3054 ldrb.w r3, [r4, #84] ; 0x54 ADC_Modify |= 0x02; 800906c: f046 0602 orr.w r6, r6, #2 Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L]; 8009070: f885 3054 strb.w r3, [r5, #84] ; 0x54 } if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H]) 8009074: f894 3055 ldrb.w r3, [r4, #85] ; 0x55 8009078: f895 2055 ldrb.w r2, [r5, #85] ; 0x55 800907c: 429a cmp r2, r3 800907e: d105 bne.n 800908c ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){ 8009080: f895 1056 ldrb.w r1, [r5, #86] ; 0x56 8009084: f894 2056 ldrb.w r2, [r4, #86] ; 0x56 8009088: 4291 cmp r1, r2 800908a: d007 beq.n 800909c ADC_Modify |= 0x04; // printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]); // printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]); Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H]; 800908c: f885 3055 strb.w r3, [r5, #85] ; 0x55 Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L]; 8009090: f894 3056 ldrb.w r3, [r4, #86] ; 0x56 ADC_Modify |= 0x04; 8009094: f046 0604 orr.w r6, r6, #4 Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L]; 8009098: f885 3056 strb.w r3, [r5, #86] ; 0x56 } if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H]) 800909c: f894 3057 ldrb.w r3, [r4, #87] ; 0x57 80090a0: f895 2057 ldrb.w r2, [r5, #87] ; 0x57 80090a4: 429a cmp r2, r3 80090a6: d105 bne.n 80090b4 ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){ 80090a8: f895 1058 ldrb.w r1, [r5, #88] ; 0x58 80090ac: f894 2058 ldrb.w r2, [r4, #88] ; 0x58 80090b0: 4291 cmp r1, r2 80090b2: d007 beq.n 80090c4 ADC_Modify |= 0x08; Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H]; 80090b4: f885 3057 strb.w r3, [r5, #87] ; 0x57 Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L]; 80090b8: f894 3058 ldrb.w r3, [r4, #88] ; 0x58 ADC_Modify |= 0x08; 80090bc: f046 0608 orr.w r6, r6, #8 Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L]; 80090c0: f885 3058 strb.w r3, [r5, #88] ; 0x58 } if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H]) 80090c4: f894 3059 ldrb.w r3, [r4, #89] ; 0x59 80090c8: f895 2059 ldrb.w r2, [r5, #89] ; 0x59 80090cc: 429a cmp r2, r3 80090ce: d105 bne.n 80090dc ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){ 80090d0: f895 105a ldrb.w r1, [r5, #90] ; 0x5a 80090d4: f894 205a ldrb.w r2, [r4, #90] ; 0x5a 80090d8: 4291 cmp r1, r2 80090da: d007 beq.n 80090ec ADC_Modify |= 0x10; Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H]; 80090dc: f885 3059 strb.w r3, [r5, #89] ; 0x59 Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L]; 80090e0: f894 305a ldrb.w r3, [r4, #90] ; 0x5a ADC_Modify |= 0x10; 80090e4: f046 0610 orr.w r6, r6, #16 Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L]; 80090e8: f885 305a strb.w r3, [r5, #90] ; 0x5a } if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H]) 80090ec: f894 305b ldrb.w r3, [r4, #91] ; 0x5b 80090f0: f895 205b ldrb.w r2, [r5, #91] ; 0x5b 80090f4: 429a cmp r2, r3 80090f6: d105 bne.n 8009104 ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){ 80090f8: f895 105c ldrb.w r1, [r5, #92] ; 0x5c 80090fc: f894 205c ldrb.w r2, [r4, #92] ; 0x5c 8009100: 4291 cmp r1, r2 8009102: d007 beq.n 8009114 ADC_Modify |= 0x20; Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H]; 8009104: f885 305b strb.w r3, [r5, #91] ; 0x5b Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L]; 8009108: f894 305c ldrb.w r3, [r4, #92] ; 0x5c ADC_Modify |= 0x20; 800910c: f046 0620 orr.w r6, r6, #32 Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L]; 8009110: f885 305c strb.w r3, [r5, #92] ; 0x5c } if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H]) 8009114: f894 305d ldrb.w r3, [r4, #93] ; 0x5d 8009118: f895 205d ldrb.w r2, [r5, #93] ; 0x5d 800911c: 429a cmp r2, r3 800911e: d105 bne.n 800912c ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){ 8009120: f895 105e ldrb.w r1, [r5, #94] ; 0x5e 8009124: f894 205e ldrb.w r2, [r4, #94] ; 0x5e 8009128: 4291 cmp r1, r2 800912a: d007 beq.n 800913c ADC_Modify |= 0x40; Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H]; 800912c: f885 305d strb.w r3, [r5, #93] ; 0x5d Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L]; 8009130: f894 305e ldrb.w r3, [r4, #94] ; 0x5e ADC_Modify |= 0x40; 8009134: f046 0640 orr.w r6, r6, #64 ; 0x40 Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L]; 8009138: f885 305e strb.w r3, [r5, #94] ; 0x5e } if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H]) 800913c: f894 305f ldrb.w r3, [r4, #95] ; 0x5f 8009140: f895 205f ldrb.w r2, [r5, #95] ; 0x5f 8009144: 429a cmp r2, r3 8009146: d105 bne.n 8009154 ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){ 8009148: f895 1060 ldrb.w r1, [r5, #96] ; 0x60 800914c: f894 2060 ldrb.w r2, [r4, #96] ; 0x60 8009150: 4291 cmp r1, r2 8009152: d04a beq.n 80091ea ADC_Modify |= 0x80; Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H]; 8009154: f885 305f strb.w r3, [r5, #95] ; 0x5f Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L]; 8009158: f894 3060 ldrb.w r3, [r4, #96] ; 0x60 800915c: f885 3060 strb.w r3, [r5, #96] ; 0x60 } if(ADC_Modify & 0x80){ AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L])); } #else AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L])); 8009160: f895 3052 ldrb.w r3, [r5, #82] ; 0x52 8009164: f895 0051 ldrb.w r0, [r5, #81] ; 0x51 8009168: ea43 2000 orr.w r0, r3, r0, lsl #8 800916c: f7fd ff26 bl 8006fbc AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L])); 8009170: f895 3054 ldrb.w r3, [r5, #84] ; 0x54 8009174: f895 0053 ldrb.w r0, [r5, #83] ; 0x53 8009178: ea43 2000 orr.w r0, r3, r0, lsl #8 800917c: f7fd ff1e bl 8006fbc AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L])); 8009180: f895 3056 ldrb.w r3, [r5, #86] ; 0x56 8009184: f895 0055 ldrb.w r0, [r5, #85] ; 0x55 8009188: ea43 2000 orr.w r0, r3, r0, lsl #8 800918c: f7fd ff16 bl 8006fbc AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L])); 8009190: f895 3058 ldrb.w r3, [r5, #88] ; 0x58 8009194: f895 0057 ldrb.w r0, [r5, #87] ; 0x57 8009198: ea43 2000 orr.w r0, r3, r0, lsl #8 800919c: f7fd ff0e bl 8006fbc AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L])); 80091a0: f895 305a ldrb.w r3, [r5, #90] ; 0x5a 80091a4: f895 0059 ldrb.w r0, [r5, #89] ; 0x59 80091a8: ea43 2000 orr.w r0, r3, r0, lsl #8 80091ac: f7fd ff06 bl 8006fbc AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L])); 80091b0: f895 305c ldrb.w r3, [r5, #92] ; 0x5c 80091b4: f895 005b ldrb.w r0, [r5, #91] ; 0x5b 80091b8: ea43 2000 orr.w r0, r3, r0, lsl #8 80091bc: f7fd fefe bl 8006fbc AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L])); 80091c0: f895 305e ldrb.w r3, [r5, #94] ; 0x5e 80091c4: f895 005d ldrb.w r0, [r5, #93] ; 0x5d 80091c8: ea43 2000 orr.w r0, r3, r0, lsl #8 80091cc: f7fd fef6 bl 8006fbc AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L])); 80091d0: f895 005f ldrb.w r0, [r5, #95] ; 0x5f 80091d4: f895 3060 ldrb.w r3, [r5, #96] ; 0x60 80091d8: ea43 2000 orr.w r0, r3, r0, lsl #8 #endif // PYJ.2019.10.21_END -- } } 80091dc: b029 add sp, #164 ; 0xa4 80091de: e8bd 40f0 ldmia.w sp!, {r4, r5, r6, r7, lr} AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L])); 80091e2: f7fd beeb b.w 8006fbc uint8_t ADC_Modify = 0; 80091e6: 2600 movs r6, #0 80091e8: e675 b.n 8008ed6 if(ADC_Modify){ 80091ea: 2e00 cmp r6, #0 80091ec: d1b8 bne.n 8009160 } 80091ee: b029 add sp, #164 ; 0xa4 80091f0: bdf0 pop {r4, r5, r6, r7, pc} 80091f2: bf00 nop 80091f4: 200004d8 .word 0x200004d8 80091f8: 02625a00 .word 0x02625a00 80091fc: 200005e3 .word 0x200005e3 08009200 : uint8_t temp_crc = 0; bool RF_Ctrl_Main(uint8_t* data_buf){ 8009200: b570 push {r4, r5, r6, lr} 8009202: 4604 mov r4, r0 bool ret = false; Bluecell_Prot_t type = data_buf[Type]; 8009204: 7846 ldrb r6, [r0, #1] ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */ 8009206: f7ff fad5 bl 80087b4 if(ret == false){ 800920a: 4605 mov r5, r0 800920c: b948 cbnz r0, 8009222 HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); 800920e: 78a2 ldrb r2, [r4, #2] 8009210: f640 33b8 movw r3, #3000 ; 0xbb8 8009214: 3203 adds r2, #3 8009216: 4621 mov r1, r4 8009218: 481a ldr r0, [pc, #104] ; (8009284 ) 800921a: f7fd fca3 bl 8006b64 printf("Function : %s LINE : %d type : %d \r\n",__func__,__LINE__,type); #endif break; } return ret; } 800921e: 4628 mov r0, r5 8009220: bd70 pop {r4, r5, r6, pc} switch(type){ 8009222: 2e03 cmp r6, #3 8009224: d8fb bhi.n 800921e 8009226: e8df f006 tbb [pc, r6] 800922a: 2002 .short 0x2002 800922c: 2926 .short 0x2926 800922e: 2300 movs r3, #0 printf("%02x ",data_buf[i]); 8009230: 4e15 ldr r6, [pc, #84] ; (8009288 ) for(uint8_t i =0 ; i < data_buf[Length] + 6; i++) 8009232: 78a2 ldrb r2, [r4, #2] 8009234: 1c5d adds r5, r3, #1 8009236: 3205 adds r2, #5 8009238: b2db uxtb r3, r3 800923a: 429a cmp r2, r3 800923c: da0f bge.n 800925e printf("Reset Start \r\n"); 800923e: 4813 ldr r0, [pc, #76] ; (800928c ) 8009240: f000 fd64 bl 8009d0c \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 8009244: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8009248: 4911 ldr r1, [pc, #68] ; (8009290 ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800924a: 4b12 ldr r3, [pc, #72] ; (8009294 ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800924c: 68ca ldr r2, [r1, #12] 800924e: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8009252: 4313 orrs r3, r2 8009254: 60cb str r3, [r1, #12] 8009256: f3bf 8f4f dsb sy __ASM volatile ("nop"); 800925a: bf00 nop 800925c: e7fd b.n 800925a printf("%02x ",data_buf[i]); 800925e: 5ce1 ldrb r1, [r4, r3] 8009260: 4630 mov r0, r6 8009262: f000 fcdf bl 8009c24 8009266: 462b mov r3, r5 8009268: e7e3 b.n 8009232 RF_Operate(&data_buf[Header]); 800926a: 4620 mov r0, r4 800926c: f7ff fae8 bl 8008840 RF_Status_Ack(); 8009270: f7ff faca bl 8008808 break; 8009274: e7d3 b.n 800921e RF_Status_Get(); 8009276: f7ff faa9 bl 80087cc break; 800927a: e7d0 b.n 800921e Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]); 800927c: 4806 ldr r0, [pc, #24] ; (8009298 ) 800927e: f7fe fb6b bl 8007958 8009282: e7f5 b.n 8009270 8009284: 20000700 .word 0x20000700 8009288: 0800bd0a .word 0x0800bd0a 800928c: 0800bd10 .word 0x0800bd10 8009290: e000ed00 .word 0xe000ed00 8009294: 05fa0004 .word 0x05fa0004 8009298: 200005e3 .word 0x200005e3 0800929c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 800929c: 2100 movs r1, #0 b LoopCopyDataInit 800929e: e003 b.n 80092a8 080092a0 : CopyDataInit: ldr r3, =_sidata 80092a0: 4b0b ldr r3, [pc, #44] ; (80092d0 ) ldr r3, [r3, r1] 80092a2: 585b ldr r3, [r3, r1] str r3, [r0, r1] 80092a4: 5043 str r3, [r0, r1] adds r1, r1, #4 80092a6: 3104 adds r1, #4 080092a8 : LoopCopyDataInit: ldr r0, =_sdata 80092a8: 480a ldr r0, [pc, #40] ; (80092d4 ) ldr r3, =_edata 80092aa: 4b0b ldr r3, [pc, #44] ; (80092d8 ) adds r2, r0, r1 80092ac: 1842 adds r2, r0, r1 cmp r2, r3 80092ae: 429a cmp r2, r3 bcc CopyDataInit 80092b0: d3f6 bcc.n 80092a0 ldr r2, =_sbss 80092b2: 4a0a ldr r2, [pc, #40] ; (80092dc ) b LoopFillZerobss 80092b4: e002 b.n 80092bc 080092b6 : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 80092b6: 2300 movs r3, #0 str r3, [r2], #4 80092b8: f842 3b04 str.w r3, [r2], #4 080092bc : LoopFillZerobss: ldr r3, = _ebss 80092bc: 4b08 ldr r3, [pc, #32] ; (80092e0 ) cmp r2, r3 80092be: 429a cmp r2, r3 bcc FillZerobss 80092c0: d3f9 bcc.n 80092b6 /* Call the clock system intitialization function.*/ bl SystemInit 80092c2: f7ff f9d7 bl 8008674 /* Call static constructors */ bl __libc_init_array 80092c6: f000 f815 bl 80092f4 <__libc_init_array> /* Call the application's entry point.*/ bl main 80092ca: f7fe fd35 bl 8007d38
bx lr 80092ce: 4770 bx lr ldr r3, =_sidata 80092d0: 0800bfe8 .word 0x0800bfe8 ldr r0, =_sdata 80092d4: 20000000 .word 0x20000000 ldr r3, =_edata 80092d8: 2000041c .word 0x2000041c ldr r2, =_sbss 80092dc: 20000420 .word 0x20000420 ldr r3, = _ebss 80092e0: 200017e4 .word 0x200017e4 080092e4 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80092e4: e7fe b.n 80092e4 ... 080092e8 <__errno>: 80092e8: 4b01 ldr r3, [pc, #4] ; (80092f0 <__errno+0x8>) 80092ea: 6818 ldr r0, [r3, #0] 80092ec: 4770 bx lr 80092ee: bf00 nop 80092f0: 2000024c .word 0x2000024c 080092f4 <__libc_init_array>: 80092f4: b570 push {r4, r5, r6, lr} 80092f6: 2500 movs r5, #0 80092f8: 4e0c ldr r6, [pc, #48] ; (800932c <__libc_init_array+0x38>) 80092fa: 4c0d ldr r4, [pc, #52] ; (8009330 <__libc_init_array+0x3c>) 80092fc: 1ba4 subs r4, r4, r6 80092fe: 10a4 asrs r4, r4, #2 8009300: 42a5 cmp r5, r4 8009302: d109 bne.n 8009318 <__libc_init_array+0x24> 8009304: f002 fc8a bl 800bc1c <_init> 8009308: 2500 movs r5, #0 800930a: 4e0a ldr r6, [pc, #40] ; (8009334 <__libc_init_array+0x40>) 800930c: 4c0a ldr r4, [pc, #40] ; (8009338 <__libc_init_array+0x44>) 800930e: 1ba4 subs r4, r4, r6 8009310: 10a4 asrs r4, r4, #2 8009312: 42a5 cmp r5, r4 8009314: d105 bne.n 8009322 <__libc_init_array+0x2e> 8009316: bd70 pop {r4, r5, r6, pc} 8009318: f856 3025 ldr.w r3, [r6, r5, lsl #2] 800931c: 4798 blx r3 800931e: 3501 adds r5, #1 8009320: e7ee b.n 8009300 <__libc_init_array+0xc> 8009322: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8009326: 4798 blx r3 8009328: 3501 adds r5, #1 800932a: e7f2 b.n 8009312 <__libc_init_array+0x1e> 800932c: 0800bfe0 .word 0x0800bfe0 8009330: 0800bfe0 .word 0x0800bfe0 8009334: 0800bfe0 .word 0x0800bfe0 8009338: 0800bfe4 .word 0x0800bfe4 0800933c : 800933c: b510 push {r4, lr} 800933e: 1e43 subs r3, r0, #1 8009340: 440a add r2, r1 8009342: 4291 cmp r1, r2 8009344: d100 bne.n 8009348 8009346: bd10 pop {r4, pc} 8009348: f811 4b01 ldrb.w r4, [r1], #1 800934c: f803 4f01 strb.w r4, [r3, #1]! 8009350: e7f7 b.n 8009342 08009352 : 8009352: 4603 mov r3, r0 8009354: 4402 add r2, r0 8009356: 4293 cmp r3, r2 8009358: d100 bne.n 800935c 800935a: 4770 bx lr 800935c: f803 1b01 strb.w r1, [r3], #1 8009360: e7f9 b.n 8009356 08009362 <__cvt>: 8009362: 2b00 cmp r3, #0 8009364: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8009368: 461e mov r6, r3 800936a: bfbb ittet lt 800936c: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000 8009370: 461e movlt r6, r3 8009372: 2300 movge r3, #0 8009374: 232d movlt r3, #45 ; 0x2d 8009376: b088 sub sp, #32 8009378: 9f14 ldr r7, [sp, #80] ; 0x50 800937a: 9912 ldr r1, [sp, #72] ; 0x48 800937c: f027 0720 bic.w r7, r7, #32 8009380: 2f46 cmp r7, #70 ; 0x46 8009382: 4614 mov r4, r2 8009384: 9d10 ldr r5, [sp, #64] ; 0x40 8009386: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c 800938a: 700b strb r3, [r1, #0] 800938c: d004 beq.n 8009398 <__cvt+0x36> 800938e: 2f45 cmp r7, #69 ; 0x45 8009390: d100 bne.n 8009394 <__cvt+0x32> 8009392: 3501 adds r5, #1 8009394: 2302 movs r3, #2 8009396: e000 b.n 800939a <__cvt+0x38> 8009398: 2303 movs r3, #3 800939a: aa07 add r2, sp, #28 800939c: 9204 str r2, [sp, #16] 800939e: aa06 add r2, sp, #24 80093a0: 9203 str r2, [sp, #12] 80093a2: e88d 0428 stmia.w sp, {r3, r5, sl} 80093a6: 4622 mov r2, r4 80093a8: 4633 mov r3, r6 80093aa: f000 feb9 bl 800a120 <_dtoa_r> 80093ae: 2f47 cmp r7, #71 ; 0x47 80093b0: 4680 mov r8, r0 80093b2: d102 bne.n 80093ba <__cvt+0x58> 80093b4: 9b11 ldr r3, [sp, #68] ; 0x44 80093b6: 07db lsls r3, r3, #31 80093b8: d526 bpl.n 8009408 <__cvt+0xa6> 80093ba: 2f46 cmp r7, #70 ; 0x46 80093bc: eb08 0905 add.w r9, r8, r5 80093c0: d111 bne.n 80093e6 <__cvt+0x84> 80093c2: f898 3000 ldrb.w r3, [r8] 80093c6: 2b30 cmp r3, #48 ; 0x30 80093c8: d10a bne.n 80093e0 <__cvt+0x7e> 80093ca: 2200 movs r2, #0 80093cc: 2300 movs r3, #0 80093ce: 4620 mov r0, r4 80093d0: 4631 mov r1, r6 80093d2: f7fb fb5d bl 8004a90 <__aeabi_dcmpeq> 80093d6: b918 cbnz r0, 80093e0 <__cvt+0x7e> 80093d8: f1c5 0501 rsb r5, r5, #1 80093dc: f8ca 5000 str.w r5, [sl] 80093e0: f8da 3000 ldr.w r3, [sl] 80093e4: 4499 add r9, r3 80093e6: 2200 movs r2, #0 80093e8: 2300 movs r3, #0 80093ea: 4620 mov r0, r4 80093ec: 4631 mov r1, r6 80093ee: f7fb fb4f bl 8004a90 <__aeabi_dcmpeq> 80093f2: b938 cbnz r0, 8009404 <__cvt+0xa2> 80093f4: 2230 movs r2, #48 ; 0x30 80093f6: 9b07 ldr r3, [sp, #28] 80093f8: 4599 cmp r9, r3 80093fa: d905 bls.n 8009408 <__cvt+0xa6> 80093fc: 1c59 adds r1, r3, #1 80093fe: 9107 str r1, [sp, #28] 8009400: 701a strb r2, [r3, #0] 8009402: e7f8 b.n 80093f6 <__cvt+0x94> 8009404: f8cd 901c str.w r9, [sp, #28] 8009408: 4640 mov r0, r8 800940a: 9b07 ldr r3, [sp, #28] 800940c: 9a15 ldr r2, [sp, #84] ; 0x54 800940e: eba3 0308 sub.w r3, r3, r8 8009412: 6013 str r3, [r2, #0] 8009414: b008 add sp, #32 8009416: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 0800941a <__exponent>: 800941a: 4603 mov r3, r0 800941c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 800941e: 2900 cmp r1, #0 8009420: f803 2b02 strb.w r2, [r3], #2 8009424: bfb6 itet lt 8009426: 222d movlt r2, #45 ; 0x2d 8009428: 222b movge r2, #43 ; 0x2b 800942a: 4249 neglt r1, r1 800942c: 2909 cmp r1, #9 800942e: 7042 strb r2, [r0, #1] 8009430: dd21 ble.n 8009476 <__exponent+0x5c> 8009432: f10d 0207 add.w r2, sp, #7 8009436: 4617 mov r7, r2 8009438: 260a movs r6, #10 800943a: fb91 f5f6 sdiv r5, r1, r6 800943e: fb06 1115 mls r1, r6, r5, r1 8009442: 2d09 cmp r5, #9 8009444: f101 0130 add.w r1, r1, #48 ; 0x30 8009448: f802 1c01 strb.w r1, [r2, #-1] 800944c: f102 34ff add.w r4, r2, #4294967295 8009450: 4629 mov r1, r5 8009452: dc09 bgt.n 8009468 <__exponent+0x4e> 8009454: 3130 adds r1, #48 ; 0x30 8009456: 3a02 subs r2, #2 8009458: f804 1c01 strb.w r1, [r4, #-1] 800945c: 42ba cmp r2, r7 800945e: 461c mov r4, r3 8009460: d304 bcc.n 800946c <__exponent+0x52> 8009462: 1a20 subs r0, r4, r0 8009464: b003 add sp, #12 8009466: bdf0 pop {r4, r5, r6, r7, pc} 8009468: 4622 mov r2, r4 800946a: e7e6 b.n 800943a <__exponent+0x20> 800946c: f812 1b01 ldrb.w r1, [r2], #1 8009470: f803 1b01 strb.w r1, [r3], #1 8009474: e7f2 b.n 800945c <__exponent+0x42> 8009476: 2230 movs r2, #48 ; 0x30 8009478: 461c mov r4, r3 800947a: 4411 add r1, r2 800947c: f804 2b02 strb.w r2, [r4], #2 8009480: 7059 strb r1, [r3, #1] 8009482: e7ee b.n 8009462 <__exponent+0x48> 08009484 <_printf_float>: 8009484: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009488: b091 sub sp, #68 ; 0x44 800948a: 460c mov r4, r1 800948c: 9f1a ldr r7, [sp, #104] ; 0x68 800948e: 4693 mov fp, r2 8009490: 461e mov r6, r3 8009492: 4605 mov r5, r0 8009494: f001 fd94 bl 800afc0 <_localeconv_r> 8009498: 6803 ldr r3, [r0, #0] 800949a: 4618 mov r0, r3 800949c: 9309 str r3, [sp, #36] ; 0x24 800949e: f7fa fec3 bl 8004228 80094a2: 2300 movs r3, #0 80094a4: 930e str r3, [sp, #56] ; 0x38 80094a6: 683b ldr r3, [r7, #0] 80094a8: 900a str r0, [sp, #40] ; 0x28 80094aa: 3307 adds r3, #7 80094ac: f023 0307 bic.w r3, r3, #7 80094b0: f103 0208 add.w r2, r3, #8 80094b4: f894 8018 ldrb.w r8, [r4, #24] 80094b8: f8d4 a000 ldr.w sl, [r4] 80094bc: 603a str r2, [r7, #0] 80094be: e9d3 2300 ldrd r2, r3, [r3] 80094c2: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48 80094c6: f8d4 904c ldr.w r9, [r4, #76] ; 0x4c 80094ca: 6ca7 ldr r7, [r4, #72] ; 0x48 80094cc: f029 4300 bic.w r3, r9, #2147483648 ; 0x80000000 80094d0: 930b str r3, [sp, #44] ; 0x2c 80094d2: f04f 32ff mov.w r2, #4294967295 80094d6: 4ba6 ldr r3, [pc, #664] ; (8009770 <_printf_float+0x2ec>) 80094d8: 4638 mov r0, r7 80094da: 990b ldr r1, [sp, #44] ; 0x2c 80094dc: f7fb fb0a bl 8004af4 <__aeabi_dcmpun> 80094e0: 2800 cmp r0, #0 80094e2: f040 81f7 bne.w 80098d4 <_printf_float+0x450> 80094e6: f04f 32ff mov.w r2, #4294967295 80094ea: 4ba1 ldr r3, [pc, #644] ; (8009770 <_printf_float+0x2ec>) 80094ec: 4638 mov r0, r7 80094ee: 990b ldr r1, [sp, #44] ; 0x2c 80094f0: f7fb fae2 bl 8004ab8 <__aeabi_dcmple> 80094f4: 2800 cmp r0, #0 80094f6: f040 81ed bne.w 80098d4 <_printf_float+0x450> 80094fa: 2200 movs r2, #0 80094fc: 2300 movs r3, #0 80094fe: 4638 mov r0, r7 8009500: 4649 mov r1, r9 8009502: f7fb facf bl 8004aa4 <__aeabi_dcmplt> 8009506: b110 cbz r0, 800950e <_printf_float+0x8a> 8009508: 232d movs r3, #45 ; 0x2d 800950a: f884 3043 strb.w r3, [r4, #67] ; 0x43 800950e: 4b99 ldr r3, [pc, #612] ; (8009774 <_printf_float+0x2f0>) 8009510: 4f99 ldr r7, [pc, #612] ; (8009778 <_printf_float+0x2f4>) 8009512: f1b8 0f47 cmp.w r8, #71 ; 0x47 8009516: bf98 it ls 8009518: 461f movls r7, r3 800951a: 2303 movs r3, #3 800951c: f04f 0900 mov.w r9, #0 8009520: 6123 str r3, [r4, #16] 8009522: f02a 0304 bic.w r3, sl, #4 8009526: 6023 str r3, [r4, #0] 8009528: 9600 str r6, [sp, #0] 800952a: 465b mov r3, fp 800952c: aa0f add r2, sp, #60 ; 0x3c 800952e: 4621 mov r1, r4 8009530: 4628 mov r0, r5 8009532: f000 f9df bl 80098f4 <_printf_common> 8009536: 3001 adds r0, #1 8009538: f040 809a bne.w 8009670 <_printf_float+0x1ec> 800953c: f04f 30ff mov.w r0, #4294967295 8009540: b011 add sp, #68 ; 0x44 8009542: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8009546: 6862 ldr r2, [r4, #4] 8009548: a80e add r0, sp, #56 ; 0x38 800954a: 1c53 adds r3, r2, #1 800954c: f10d 0e34 add.w lr, sp, #52 ; 0x34 8009550: f44a 6380 orr.w r3, sl, #1024 ; 0x400 8009554: d141 bne.n 80095da <_printf_float+0x156> 8009556: 2206 movs r2, #6 8009558: 6062 str r2, [r4, #4] 800955a: 2100 movs r1, #0 800955c: 6023 str r3, [r4, #0] 800955e: 9301 str r3, [sp, #4] 8009560: 6863 ldr r3, [r4, #4] 8009562: f10d 0233 add.w r2, sp, #51 ; 0x33 8009566: 9005 str r0, [sp, #20] 8009568: 9202 str r2, [sp, #8] 800956a: 9300 str r3, [sp, #0] 800956c: 463a mov r2, r7 800956e: 464b mov r3, r9 8009570: 9106 str r1, [sp, #24] 8009572: f8cd 8010 str.w r8, [sp, #16] 8009576: f8cd e00c str.w lr, [sp, #12] 800957a: 4628 mov r0, r5 800957c: f7ff fef1 bl 8009362 <__cvt> 8009580: f008 03df and.w r3, r8, #223 ; 0xdf 8009584: 2b47 cmp r3, #71 ; 0x47 8009586: 4607 mov r7, r0 8009588: d109 bne.n 800959e <_printf_float+0x11a> 800958a: 9b0d ldr r3, [sp, #52] ; 0x34 800958c: 1cd8 adds r0, r3, #3 800958e: db02 blt.n 8009596 <_printf_float+0x112> 8009590: 6862 ldr r2, [r4, #4] 8009592: 4293 cmp r3, r2 8009594: dd59 ble.n 800964a <_printf_float+0x1c6> 8009596: f1a8 0802 sub.w r8, r8, #2 800959a: fa5f f888 uxtb.w r8, r8 800959e: f1b8 0f65 cmp.w r8, #101 ; 0x65 80095a2: 990d ldr r1, [sp, #52] ; 0x34 80095a4: d836 bhi.n 8009614 <_printf_float+0x190> 80095a6: 3901 subs r1, #1 80095a8: 4642 mov r2, r8 80095aa: f104 0050 add.w r0, r4, #80 ; 0x50 80095ae: 910d str r1, [sp, #52] ; 0x34 80095b0: f7ff ff33 bl 800941a <__exponent> 80095b4: 9a0e ldr r2, [sp, #56] ; 0x38 80095b6: 4681 mov r9, r0 80095b8: 1883 adds r3, r0, r2 80095ba: 2a01 cmp r2, #1 80095bc: 6123 str r3, [r4, #16] 80095be: dc02 bgt.n 80095c6 <_printf_float+0x142> 80095c0: 6822 ldr r2, [r4, #0] 80095c2: 07d1 lsls r1, r2, #31 80095c4: d501 bpl.n 80095ca <_printf_float+0x146> 80095c6: 3301 adds r3, #1 80095c8: 6123 str r3, [r4, #16] 80095ca: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 80095ce: 2b00 cmp r3, #0 80095d0: d0aa beq.n 8009528 <_printf_float+0xa4> 80095d2: 232d movs r3, #45 ; 0x2d 80095d4: f884 3043 strb.w r3, [r4, #67] ; 0x43 80095d8: e7a6 b.n 8009528 <_printf_float+0xa4> 80095da: f1b8 0f67 cmp.w r8, #103 ; 0x67 80095de: d002 beq.n 80095e6 <_printf_float+0x162> 80095e0: f1b8 0f47 cmp.w r8, #71 ; 0x47 80095e4: d1b9 bne.n 800955a <_printf_float+0xd6> 80095e6: b19a cbz r2, 8009610 <_printf_float+0x18c> 80095e8: 2100 movs r1, #0 80095ea: 9106 str r1, [sp, #24] 80095ec: f10d 0133 add.w r1, sp, #51 ; 0x33 80095f0: e88d 000c stmia.w sp, {r2, r3} 80095f4: 6023 str r3, [r4, #0] 80095f6: 9005 str r0, [sp, #20] 80095f8: 463a mov r2, r7 80095fa: f8cd 8010 str.w r8, [sp, #16] 80095fe: f8cd e00c str.w lr, [sp, #12] 8009602: 9102 str r1, [sp, #8] 8009604: 464b mov r3, r9 8009606: 4628 mov r0, r5 8009608: f7ff feab bl 8009362 <__cvt> 800960c: 4607 mov r7, r0 800960e: e7bc b.n 800958a <_printf_float+0x106> 8009610: 2201 movs r2, #1 8009612: e7a1 b.n 8009558 <_printf_float+0xd4> 8009614: f1b8 0f66 cmp.w r8, #102 ; 0x66 8009618: d119 bne.n 800964e <_printf_float+0x1ca> 800961a: 2900 cmp r1, #0 800961c: 6863 ldr r3, [r4, #4] 800961e: dd0c ble.n 800963a <_printf_float+0x1b6> 8009620: 6121 str r1, [r4, #16] 8009622: b913 cbnz r3, 800962a <_printf_float+0x1a6> 8009624: 6822 ldr r2, [r4, #0] 8009626: 07d2 lsls r2, r2, #31 8009628: d502 bpl.n 8009630 <_printf_float+0x1ac> 800962a: 3301 adds r3, #1 800962c: 440b add r3, r1 800962e: 6123 str r3, [r4, #16] 8009630: 9b0d ldr r3, [sp, #52] ; 0x34 8009632: f04f 0900 mov.w r9, #0 8009636: 65a3 str r3, [r4, #88] ; 0x58 8009638: e7c7 b.n 80095ca <_printf_float+0x146> 800963a: b913 cbnz r3, 8009642 <_printf_float+0x1be> 800963c: 6822 ldr r2, [r4, #0] 800963e: 07d0 lsls r0, r2, #31 8009640: d501 bpl.n 8009646 <_printf_float+0x1c2> 8009642: 3302 adds r3, #2 8009644: e7f3 b.n 800962e <_printf_float+0x1aa> 8009646: 2301 movs r3, #1 8009648: e7f1 b.n 800962e <_printf_float+0x1aa> 800964a: f04f 0867 mov.w r8, #103 ; 0x67 800964e: 9b0d ldr r3, [sp, #52] ; 0x34 8009650: 9a0e ldr r2, [sp, #56] ; 0x38 8009652: 4293 cmp r3, r2 8009654: db05 blt.n 8009662 <_printf_float+0x1de> 8009656: 6822 ldr r2, [r4, #0] 8009658: 6123 str r3, [r4, #16] 800965a: 07d1 lsls r1, r2, #31 800965c: d5e8 bpl.n 8009630 <_printf_float+0x1ac> 800965e: 3301 adds r3, #1 8009660: e7e5 b.n 800962e <_printf_float+0x1aa> 8009662: 2b00 cmp r3, #0 8009664: bfcc ite gt 8009666: 2301 movgt r3, #1 8009668: f1c3 0302 rsble r3, r3, #2 800966c: 4413 add r3, r2 800966e: e7de b.n 800962e <_printf_float+0x1aa> 8009670: 6823 ldr r3, [r4, #0] 8009672: 055a lsls r2, r3, #21 8009674: d407 bmi.n 8009686 <_printf_float+0x202> 8009676: 6923 ldr r3, [r4, #16] 8009678: 463a mov r2, r7 800967a: 4659 mov r1, fp 800967c: 4628 mov r0, r5 800967e: 47b0 blx r6 8009680: 3001 adds r0, #1 8009682: d12a bne.n 80096da <_printf_float+0x256> 8009684: e75a b.n 800953c <_printf_float+0xb8> 8009686: f1b8 0f65 cmp.w r8, #101 ; 0x65 800968a: f240 80dc bls.w 8009846 <_printf_float+0x3c2> 800968e: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8009692: 2200 movs r2, #0 8009694: 2300 movs r3, #0 8009696: f7fb f9fb bl 8004a90 <__aeabi_dcmpeq> 800969a: 2800 cmp r0, #0 800969c: d039 beq.n 8009712 <_printf_float+0x28e> 800969e: 2301 movs r3, #1 80096a0: 4a36 ldr r2, [pc, #216] ; (800977c <_printf_float+0x2f8>) 80096a2: 4659 mov r1, fp 80096a4: 4628 mov r0, r5 80096a6: 47b0 blx r6 80096a8: 3001 adds r0, #1 80096aa: f43f af47 beq.w 800953c <_printf_float+0xb8> 80096ae: 9b0e ldr r3, [sp, #56] ; 0x38 80096b0: 9a0d ldr r2, [sp, #52] ; 0x34 80096b2: 429a cmp r2, r3 80096b4: db02 blt.n 80096bc <_printf_float+0x238> 80096b6: 6823 ldr r3, [r4, #0] 80096b8: 07d8 lsls r0, r3, #31 80096ba: d50e bpl.n 80096da <_printf_float+0x256> 80096bc: 9b0a ldr r3, [sp, #40] ; 0x28 80096be: 9a09 ldr r2, [sp, #36] ; 0x24 80096c0: 4659 mov r1, fp 80096c2: 4628 mov r0, r5 80096c4: 47b0 blx r6 80096c6: 3001 adds r0, #1 80096c8: f43f af38 beq.w 800953c <_printf_float+0xb8> 80096cc: 2700 movs r7, #0 80096ce: f104 081a add.w r8, r4, #26 80096d2: 9b0e ldr r3, [sp, #56] ; 0x38 80096d4: 3b01 subs r3, #1 80096d6: 429f cmp r7, r3 80096d8: db11 blt.n 80096fe <_printf_float+0x27a> 80096da: 6823 ldr r3, [r4, #0] 80096dc: 079f lsls r7, r3, #30 80096de: d508 bpl.n 80096f2 <_printf_float+0x26e> 80096e0: 2700 movs r7, #0 80096e2: f104 0819 add.w r8, r4, #25 80096e6: 68e3 ldr r3, [r4, #12] 80096e8: 9a0f ldr r2, [sp, #60] ; 0x3c 80096ea: 1a9b subs r3, r3, r2 80096ec: 429f cmp r7, r3 80096ee: f2c0 80e7 blt.w 80098c0 <_printf_float+0x43c> 80096f2: 68e0 ldr r0, [r4, #12] 80096f4: 9b0f ldr r3, [sp, #60] ; 0x3c 80096f6: 4298 cmp r0, r3 80096f8: bfb8 it lt 80096fa: 4618 movlt r0, r3 80096fc: e720 b.n 8009540 <_printf_float+0xbc> 80096fe: 2301 movs r3, #1 8009700: 4642 mov r2, r8 8009702: 4659 mov r1, fp 8009704: 4628 mov r0, r5 8009706: 47b0 blx r6 8009708: 3001 adds r0, #1 800970a: f43f af17 beq.w 800953c <_printf_float+0xb8> 800970e: 3701 adds r7, #1 8009710: e7df b.n 80096d2 <_printf_float+0x24e> 8009712: 9b0d ldr r3, [sp, #52] ; 0x34 8009714: 2b00 cmp r3, #0 8009716: dc33 bgt.n 8009780 <_printf_float+0x2fc> 8009718: 2301 movs r3, #1 800971a: 4a18 ldr r2, [pc, #96] ; (800977c <_printf_float+0x2f8>) 800971c: 4659 mov r1, fp 800971e: 4628 mov r0, r5 8009720: 47b0 blx r6 8009722: 3001 adds r0, #1 8009724: f43f af0a beq.w 800953c <_printf_float+0xb8> 8009728: 9b0d ldr r3, [sp, #52] ; 0x34 800972a: b923 cbnz r3, 8009736 <_printf_float+0x2b2> 800972c: 9b0e ldr r3, [sp, #56] ; 0x38 800972e: b913 cbnz r3, 8009736 <_printf_float+0x2b2> 8009730: 6823 ldr r3, [r4, #0] 8009732: 07d9 lsls r1, r3, #31 8009734: d5d1 bpl.n 80096da <_printf_float+0x256> 8009736: 9b0a ldr r3, [sp, #40] ; 0x28 8009738: 9a09 ldr r2, [sp, #36] ; 0x24 800973a: 4659 mov r1, fp 800973c: 4628 mov r0, r5 800973e: 47b0 blx r6 8009740: 3001 adds r0, #1 8009742: f43f aefb beq.w 800953c <_printf_float+0xb8> 8009746: f04f 0800 mov.w r8, #0 800974a: f104 091a add.w r9, r4, #26 800974e: 9b0d ldr r3, [sp, #52] ; 0x34 8009750: 425b negs r3, r3 8009752: 4598 cmp r8, r3 8009754: db01 blt.n 800975a <_printf_float+0x2d6> 8009756: 9b0e ldr r3, [sp, #56] ; 0x38 8009758: e78e b.n 8009678 <_printf_float+0x1f4> 800975a: 2301 movs r3, #1 800975c: 464a mov r2, r9 800975e: 4659 mov r1, fp 8009760: 4628 mov r0, r5 8009762: 47b0 blx r6 8009764: 3001 adds r0, #1 8009766: f43f aee9 beq.w 800953c <_printf_float+0xb8> 800976a: f108 0801 add.w r8, r8, #1 800976e: e7ee b.n 800974e <_printf_float+0x2ca> 8009770: 7fefffff .word 0x7fefffff 8009774: 0800bd24 .word 0x0800bd24 8009778: 0800bd28 .word 0x0800bd28 800977c: 0800bcc1 .word 0x0800bcc1 8009780: 9a0e ldr r2, [sp, #56] ; 0x38 8009782: 6da3 ldr r3, [r4, #88] ; 0x58 8009784: 429a cmp r2, r3 8009786: bfa8 it ge 8009788: 461a movge r2, r3 800978a: 2a00 cmp r2, #0 800978c: 4690 mov r8, r2 800978e: dc36 bgt.n 80097fe <_printf_float+0x37a> 8009790: f04f 0a00 mov.w sl, #0 8009794: f104 031a add.w r3, r4, #26 8009798: ea28 78e8 bic.w r8, r8, r8, asr #31 800979c: 930b str r3, [sp, #44] ; 0x2c 800979e: f8d4 9058 ldr.w r9, [r4, #88] ; 0x58 80097a2: eba9 0308 sub.w r3, r9, r8 80097a6: 459a cmp sl, r3 80097a8: db31 blt.n 800980e <_printf_float+0x38a> 80097aa: 9b0e ldr r3, [sp, #56] ; 0x38 80097ac: 9a0d ldr r2, [sp, #52] ; 0x34 80097ae: 429a cmp r2, r3 80097b0: db38 blt.n 8009824 <_printf_float+0x3a0> 80097b2: 6823 ldr r3, [r4, #0] 80097b4: 07da lsls r2, r3, #31 80097b6: d435 bmi.n 8009824 <_printf_float+0x3a0> 80097b8: 9b0e ldr r3, [sp, #56] ; 0x38 80097ba: 990d ldr r1, [sp, #52] ; 0x34 80097bc: eba3 0209 sub.w r2, r3, r9 80097c0: eba3 0801 sub.w r8, r3, r1 80097c4: 4590 cmp r8, r2 80097c6: bfa8 it ge 80097c8: 4690 movge r8, r2 80097ca: f1b8 0f00 cmp.w r8, #0 80097ce: dc31 bgt.n 8009834 <_printf_float+0x3b0> 80097d0: 2700 movs r7, #0 80097d2: ea28 78e8 bic.w r8, r8, r8, asr #31 80097d6: f104 091a add.w r9, r4, #26 80097da: 9a0d ldr r2, [sp, #52] ; 0x34 80097dc: 9b0e ldr r3, [sp, #56] ; 0x38 80097de: 1a9b subs r3, r3, r2 80097e0: eba3 0308 sub.w r3, r3, r8 80097e4: 429f cmp r7, r3 80097e6: f6bf af78 bge.w 80096da <_printf_float+0x256> 80097ea: 2301 movs r3, #1 80097ec: 464a mov r2, r9 80097ee: 4659 mov r1, fp 80097f0: 4628 mov r0, r5 80097f2: 47b0 blx r6 80097f4: 3001 adds r0, #1 80097f6: f43f aea1 beq.w 800953c <_printf_float+0xb8> 80097fa: 3701 adds r7, #1 80097fc: e7ed b.n 80097da <_printf_float+0x356> 80097fe: 4613 mov r3, r2 8009800: 4659 mov r1, fp 8009802: 463a mov r2, r7 8009804: 4628 mov r0, r5 8009806: 47b0 blx r6 8009808: 3001 adds r0, #1 800980a: d1c1 bne.n 8009790 <_printf_float+0x30c> 800980c: e696 b.n 800953c <_printf_float+0xb8> 800980e: 2301 movs r3, #1 8009810: 9a0b ldr r2, [sp, #44] ; 0x2c 8009812: 4659 mov r1, fp 8009814: 4628 mov r0, r5 8009816: 47b0 blx r6 8009818: 3001 adds r0, #1 800981a: f43f ae8f beq.w 800953c <_printf_float+0xb8> 800981e: f10a 0a01 add.w sl, sl, #1 8009822: e7bc b.n 800979e <_printf_float+0x31a> 8009824: 9b0a ldr r3, [sp, #40] ; 0x28 8009826: 9a09 ldr r2, [sp, #36] ; 0x24 8009828: 4659 mov r1, fp 800982a: 4628 mov r0, r5 800982c: 47b0 blx r6 800982e: 3001 adds r0, #1 8009830: d1c2 bne.n 80097b8 <_printf_float+0x334> 8009832: e683 b.n 800953c <_printf_float+0xb8> 8009834: 4643 mov r3, r8 8009836: eb07 0209 add.w r2, r7, r9 800983a: 4659 mov r1, fp 800983c: 4628 mov r0, r5 800983e: 47b0 blx r6 8009840: 3001 adds r0, #1 8009842: d1c5 bne.n 80097d0 <_printf_float+0x34c> 8009844: e67a b.n 800953c <_printf_float+0xb8> 8009846: 9a0e ldr r2, [sp, #56] ; 0x38 8009848: 2a01 cmp r2, #1 800984a: dc01 bgt.n 8009850 <_printf_float+0x3cc> 800984c: 07db lsls r3, r3, #31 800984e: d534 bpl.n 80098ba <_printf_float+0x436> 8009850: 2301 movs r3, #1 8009852: 463a mov r2, r7 8009854: 4659 mov r1, fp 8009856: 4628 mov r0, r5 8009858: 47b0 blx r6 800985a: 3001 adds r0, #1 800985c: f43f ae6e beq.w 800953c <_printf_float+0xb8> 8009860: 9b0a ldr r3, [sp, #40] ; 0x28 8009862: 9a09 ldr r2, [sp, #36] ; 0x24 8009864: 4659 mov r1, fp 8009866: 4628 mov r0, r5 8009868: 47b0 blx r6 800986a: 3001 adds r0, #1 800986c: f43f ae66 beq.w 800953c <_printf_float+0xb8> 8009870: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8009874: 2200 movs r2, #0 8009876: 2300 movs r3, #0 8009878: f7fb f90a bl 8004a90 <__aeabi_dcmpeq> 800987c: b150 cbz r0, 8009894 <_printf_float+0x410> 800987e: 2700 movs r7, #0 8009880: f104 081a add.w r8, r4, #26 8009884: 9b0e ldr r3, [sp, #56] ; 0x38 8009886: 3b01 subs r3, #1 8009888: 429f cmp r7, r3 800988a: db0c blt.n 80098a6 <_printf_float+0x422> 800988c: 464b mov r3, r9 800988e: f104 0250 add.w r2, r4, #80 ; 0x50 8009892: e6f2 b.n 800967a <_printf_float+0x1f6> 8009894: 9b0e ldr r3, [sp, #56] ; 0x38 8009896: 1c7a adds r2, r7, #1 8009898: 3b01 subs r3, #1 800989a: 4659 mov r1, fp 800989c: 4628 mov r0, r5 800989e: 47b0 blx r6 80098a0: 3001 adds r0, #1 80098a2: d1f3 bne.n 800988c <_printf_float+0x408> 80098a4: e64a b.n 800953c <_printf_float+0xb8> 80098a6: 2301 movs r3, #1 80098a8: 4642 mov r2, r8 80098aa: 4659 mov r1, fp 80098ac: 4628 mov r0, r5 80098ae: 47b0 blx r6 80098b0: 3001 adds r0, #1 80098b2: f43f ae43 beq.w 800953c <_printf_float+0xb8> 80098b6: 3701 adds r7, #1 80098b8: e7e4 b.n 8009884 <_printf_float+0x400> 80098ba: 2301 movs r3, #1 80098bc: 463a mov r2, r7 80098be: e7ec b.n 800989a <_printf_float+0x416> 80098c0: 2301 movs r3, #1 80098c2: 4642 mov r2, r8 80098c4: 4659 mov r1, fp 80098c6: 4628 mov r0, r5 80098c8: 47b0 blx r6 80098ca: 3001 adds r0, #1 80098cc: f43f ae36 beq.w 800953c <_printf_float+0xb8> 80098d0: 3701 adds r7, #1 80098d2: e708 b.n 80096e6 <_printf_float+0x262> 80098d4: 463a mov r2, r7 80098d6: 464b mov r3, r9 80098d8: 4638 mov r0, r7 80098da: 4649 mov r1, r9 80098dc: f7fb f90a bl 8004af4 <__aeabi_dcmpun> 80098e0: 2800 cmp r0, #0 80098e2: f43f ae30 beq.w 8009546 <_printf_float+0xc2> 80098e6: 4b01 ldr r3, [pc, #4] ; (80098ec <_printf_float+0x468>) 80098e8: 4f01 ldr r7, [pc, #4] ; (80098f0 <_printf_float+0x46c>) 80098ea: e612 b.n 8009512 <_printf_float+0x8e> 80098ec: 0800bd2c .word 0x0800bd2c 80098f0: 0800bd30 .word 0x0800bd30 080098f4 <_printf_common>: 80098f4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80098f8: 4691 mov r9, r2 80098fa: 461f mov r7, r3 80098fc: 688a ldr r2, [r1, #8] 80098fe: 690b ldr r3, [r1, #16] 8009900: 4606 mov r6, r0 8009902: 4293 cmp r3, r2 8009904: bfb8 it lt 8009906: 4613 movlt r3, r2 8009908: f8c9 3000 str.w r3, [r9] 800990c: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8009910: 460c mov r4, r1 8009912: f8dd 8020 ldr.w r8, [sp, #32] 8009916: b112 cbz r2, 800991e <_printf_common+0x2a> 8009918: 3301 adds r3, #1 800991a: f8c9 3000 str.w r3, [r9] 800991e: 6823 ldr r3, [r4, #0] 8009920: 0699 lsls r1, r3, #26 8009922: bf42 ittt mi 8009924: f8d9 3000 ldrmi.w r3, [r9] 8009928: 3302 addmi r3, #2 800992a: f8c9 3000 strmi.w r3, [r9] 800992e: 6825 ldr r5, [r4, #0] 8009930: f015 0506 ands.w r5, r5, #6 8009934: d107 bne.n 8009946 <_printf_common+0x52> 8009936: f104 0a19 add.w sl, r4, #25 800993a: 68e3 ldr r3, [r4, #12] 800993c: f8d9 2000 ldr.w r2, [r9] 8009940: 1a9b subs r3, r3, r2 8009942: 429d cmp r5, r3 8009944: db2a blt.n 800999c <_printf_common+0xa8> 8009946: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 800994a: 6822 ldr r2, [r4, #0] 800994c: 3300 adds r3, #0 800994e: bf18 it ne 8009950: 2301 movne r3, #1 8009952: 0692 lsls r2, r2, #26 8009954: d42f bmi.n 80099b6 <_printf_common+0xc2> 8009956: f104 0243 add.w r2, r4, #67 ; 0x43 800995a: 4639 mov r1, r7 800995c: 4630 mov r0, r6 800995e: 47c0 blx r8 8009960: 3001 adds r0, #1 8009962: d022 beq.n 80099aa <_printf_common+0xb6> 8009964: 6823 ldr r3, [r4, #0] 8009966: 68e5 ldr r5, [r4, #12] 8009968: f003 0306 and.w r3, r3, #6 800996c: 2b04 cmp r3, #4 800996e: bf18 it ne 8009970: 2500 movne r5, #0 8009972: f8d9 2000 ldr.w r2, [r9] 8009976: f04f 0900 mov.w r9, #0 800997a: bf08 it eq 800997c: 1aad subeq r5, r5, r2 800997e: 68a3 ldr r3, [r4, #8] 8009980: 6922 ldr r2, [r4, #16] 8009982: bf08 it eq 8009984: ea25 75e5 biceq.w r5, r5, r5, asr #31 8009988: 4293 cmp r3, r2 800998a: bfc4 itt gt 800998c: 1a9b subgt r3, r3, r2 800998e: 18ed addgt r5, r5, r3 8009990: 341a adds r4, #26 8009992: 454d cmp r5, r9 8009994: d11b bne.n 80099ce <_printf_common+0xda> 8009996: 2000 movs r0, #0 8009998: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800999c: 2301 movs r3, #1 800999e: 4652 mov r2, sl 80099a0: 4639 mov r1, r7 80099a2: 4630 mov r0, r6 80099a4: 47c0 blx r8 80099a6: 3001 adds r0, #1 80099a8: d103 bne.n 80099b2 <_printf_common+0xbe> 80099aa: f04f 30ff mov.w r0, #4294967295 80099ae: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80099b2: 3501 adds r5, #1 80099b4: e7c1 b.n 800993a <_printf_common+0x46> 80099b6: 2030 movs r0, #48 ; 0x30 80099b8: 18e1 adds r1, r4, r3 80099ba: f881 0043 strb.w r0, [r1, #67] ; 0x43 80099be: 1c5a adds r2, r3, #1 80099c0: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 80099c4: 4422 add r2, r4 80099c6: 3302 adds r3, #2 80099c8: f882 1043 strb.w r1, [r2, #67] ; 0x43 80099cc: e7c3 b.n 8009956 <_printf_common+0x62> 80099ce: 2301 movs r3, #1 80099d0: 4622 mov r2, r4 80099d2: 4639 mov r1, r7 80099d4: 4630 mov r0, r6 80099d6: 47c0 blx r8 80099d8: 3001 adds r0, #1 80099da: d0e6 beq.n 80099aa <_printf_common+0xb6> 80099dc: f109 0901 add.w r9, r9, #1 80099e0: e7d7 b.n 8009992 <_printf_common+0x9e> ... 080099e4 <_printf_i>: 80099e4: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 80099e8: 4617 mov r7, r2 80099ea: 7e0a ldrb r2, [r1, #24] 80099ec: b085 sub sp, #20 80099ee: 2a6e cmp r2, #110 ; 0x6e 80099f0: 4698 mov r8, r3 80099f2: 4606 mov r6, r0 80099f4: 460c mov r4, r1 80099f6: 9b0c ldr r3, [sp, #48] ; 0x30 80099f8: f101 0e43 add.w lr, r1, #67 ; 0x43 80099fc: f000 80bc beq.w 8009b78 <_printf_i+0x194> 8009a00: d81a bhi.n 8009a38 <_printf_i+0x54> 8009a02: 2a63 cmp r2, #99 ; 0x63 8009a04: d02e beq.n 8009a64 <_printf_i+0x80> 8009a06: d80a bhi.n 8009a1e <_printf_i+0x3a> 8009a08: 2a00 cmp r2, #0 8009a0a: f000 80c8 beq.w 8009b9e <_printf_i+0x1ba> 8009a0e: 2a58 cmp r2, #88 ; 0x58 8009a10: f000 808a beq.w 8009b28 <_printf_i+0x144> 8009a14: f104 0542 add.w r5, r4, #66 ; 0x42 8009a18: f884 2042 strb.w r2, [r4, #66] ; 0x42 8009a1c: e02a b.n 8009a74 <_printf_i+0x90> 8009a1e: 2a64 cmp r2, #100 ; 0x64 8009a20: d001 beq.n 8009a26 <_printf_i+0x42> 8009a22: 2a69 cmp r2, #105 ; 0x69 8009a24: d1f6 bne.n 8009a14 <_printf_i+0x30> 8009a26: 6821 ldr r1, [r4, #0] 8009a28: 681a ldr r2, [r3, #0] 8009a2a: f011 0f80 tst.w r1, #128 ; 0x80 8009a2e: d023 beq.n 8009a78 <_printf_i+0x94> 8009a30: 1d11 adds r1, r2, #4 8009a32: 6019 str r1, [r3, #0] 8009a34: 6813 ldr r3, [r2, #0] 8009a36: e027 b.n 8009a88 <_printf_i+0xa4> 8009a38: 2a73 cmp r2, #115 ; 0x73 8009a3a: f000 80b4 beq.w 8009ba6 <_printf_i+0x1c2> 8009a3e: d808 bhi.n 8009a52 <_printf_i+0x6e> 8009a40: 2a6f cmp r2, #111 ; 0x6f 8009a42: d02a beq.n 8009a9a <_printf_i+0xb6> 8009a44: 2a70 cmp r2, #112 ; 0x70 8009a46: d1e5 bne.n 8009a14 <_printf_i+0x30> 8009a48: 680a ldr r2, [r1, #0] 8009a4a: f042 0220 orr.w r2, r2, #32 8009a4e: 600a str r2, [r1, #0] 8009a50: e003 b.n 8009a5a <_printf_i+0x76> 8009a52: 2a75 cmp r2, #117 ; 0x75 8009a54: d021 beq.n 8009a9a <_printf_i+0xb6> 8009a56: 2a78 cmp r2, #120 ; 0x78 8009a58: d1dc bne.n 8009a14 <_printf_i+0x30> 8009a5a: 2278 movs r2, #120 ; 0x78 8009a5c: 496f ldr r1, [pc, #444] ; (8009c1c <_printf_i+0x238>) 8009a5e: f884 2045 strb.w r2, [r4, #69] ; 0x45 8009a62: e064 b.n 8009b2e <_printf_i+0x14a> 8009a64: 681a ldr r2, [r3, #0] 8009a66: f101 0542 add.w r5, r1, #66 ; 0x42 8009a6a: 1d11 adds r1, r2, #4 8009a6c: 6019 str r1, [r3, #0] 8009a6e: 6813 ldr r3, [r2, #0] 8009a70: f884 3042 strb.w r3, [r4, #66] ; 0x42 8009a74: 2301 movs r3, #1 8009a76: e0a3 b.n 8009bc0 <_printf_i+0x1dc> 8009a78: f011 0f40 tst.w r1, #64 ; 0x40 8009a7c: f102 0104 add.w r1, r2, #4 8009a80: 6019 str r1, [r3, #0] 8009a82: d0d7 beq.n 8009a34 <_printf_i+0x50> 8009a84: f9b2 3000 ldrsh.w r3, [r2] 8009a88: 2b00 cmp r3, #0 8009a8a: da03 bge.n 8009a94 <_printf_i+0xb0> 8009a8c: 222d movs r2, #45 ; 0x2d 8009a8e: 425b negs r3, r3 8009a90: f884 2043 strb.w r2, [r4, #67] ; 0x43 8009a94: 4962 ldr r1, [pc, #392] ; (8009c20 <_printf_i+0x23c>) 8009a96: 220a movs r2, #10 8009a98: e017 b.n 8009aca <_printf_i+0xe6> 8009a9a: 6820 ldr r0, [r4, #0] 8009a9c: 6819 ldr r1, [r3, #0] 8009a9e: f010 0f80 tst.w r0, #128 ; 0x80 8009aa2: d003 beq.n 8009aac <_printf_i+0xc8> 8009aa4: 1d08 adds r0, r1, #4 8009aa6: 6018 str r0, [r3, #0] 8009aa8: 680b ldr r3, [r1, #0] 8009aaa: e006 b.n 8009aba <_printf_i+0xd6> 8009aac: f010 0f40 tst.w r0, #64 ; 0x40 8009ab0: f101 0004 add.w r0, r1, #4 8009ab4: 6018 str r0, [r3, #0] 8009ab6: d0f7 beq.n 8009aa8 <_printf_i+0xc4> 8009ab8: 880b ldrh r3, [r1, #0] 8009aba: 2a6f cmp r2, #111 ; 0x6f 8009abc: bf14 ite ne 8009abe: 220a movne r2, #10 8009ac0: 2208 moveq r2, #8 8009ac2: 4957 ldr r1, [pc, #348] ; (8009c20 <_printf_i+0x23c>) 8009ac4: 2000 movs r0, #0 8009ac6: f884 0043 strb.w r0, [r4, #67] ; 0x43 8009aca: 6865 ldr r5, [r4, #4] 8009acc: 2d00 cmp r5, #0 8009ace: 60a5 str r5, [r4, #8] 8009ad0: f2c0 809c blt.w 8009c0c <_printf_i+0x228> 8009ad4: 6820 ldr r0, [r4, #0] 8009ad6: f020 0004 bic.w r0, r0, #4 8009ada: 6020 str r0, [r4, #0] 8009adc: 2b00 cmp r3, #0 8009ade: d13f bne.n 8009b60 <_printf_i+0x17c> 8009ae0: 2d00 cmp r5, #0 8009ae2: f040 8095 bne.w 8009c10 <_printf_i+0x22c> 8009ae6: 4675 mov r5, lr 8009ae8: 2a08 cmp r2, #8 8009aea: d10b bne.n 8009b04 <_printf_i+0x120> 8009aec: 6823 ldr r3, [r4, #0] 8009aee: 07da lsls r2, r3, #31 8009af0: d508 bpl.n 8009b04 <_printf_i+0x120> 8009af2: 6923 ldr r3, [r4, #16] 8009af4: 6862 ldr r2, [r4, #4] 8009af6: 429a cmp r2, r3 8009af8: bfde ittt le 8009afa: 2330 movle r3, #48 ; 0x30 8009afc: f805 3c01 strble.w r3, [r5, #-1] 8009b00: f105 35ff addle.w r5, r5, #4294967295 8009b04: ebae 0305 sub.w r3, lr, r5 8009b08: 6123 str r3, [r4, #16] 8009b0a: f8cd 8000 str.w r8, [sp] 8009b0e: 463b mov r3, r7 8009b10: aa03 add r2, sp, #12 8009b12: 4621 mov r1, r4 8009b14: 4630 mov r0, r6 8009b16: f7ff feed bl 80098f4 <_printf_common> 8009b1a: 3001 adds r0, #1 8009b1c: d155 bne.n 8009bca <_printf_i+0x1e6> 8009b1e: f04f 30ff mov.w r0, #4294967295 8009b22: b005 add sp, #20 8009b24: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8009b28: f881 2045 strb.w r2, [r1, #69] ; 0x45 8009b2c: 493c ldr r1, [pc, #240] ; (8009c20 <_printf_i+0x23c>) 8009b2e: 6822 ldr r2, [r4, #0] 8009b30: 6818 ldr r0, [r3, #0] 8009b32: f012 0f80 tst.w r2, #128 ; 0x80 8009b36: f100 0504 add.w r5, r0, #4 8009b3a: 601d str r5, [r3, #0] 8009b3c: d001 beq.n 8009b42 <_printf_i+0x15e> 8009b3e: 6803 ldr r3, [r0, #0] 8009b40: e002 b.n 8009b48 <_printf_i+0x164> 8009b42: 0655 lsls r5, r2, #25 8009b44: d5fb bpl.n 8009b3e <_printf_i+0x15a> 8009b46: 8803 ldrh r3, [r0, #0] 8009b48: 07d0 lsls r0, r2, #31 8009b4a: bf44 itt mi 8009b4c: f042 0220 orrmi.w r2, r2, #32 8009b50: 6022 strmi r2, [r4, #0] 8009b52: b91b cbnz r3, 8009b5c <_printf_i+0x178> 8009b54: 6822 ldr r2, [r4, #0] 8009b56: f022 0220 bic.w r2, r2, #32 8009b5a: 6022 str r2, [r4, #0] 8009b5c: 2210 movs r2, #16 8009b5e: e7b1 b.n 8009ac4 <_printf_i+0xe0> 8009b60: 4675 mov r5, lr 8009b62: fbb3 f0f2 udiv r0, r3, r2 8009b66: fb02 3310 mls r3, r2, r0, r3 8009b6a: 5ccb ldrb r3, [r1, r3] 8009b6c: f805 3d01 strb.w r3, [r5, #-1]! 8009b70: 4603 mov r3, r0 8009b72: 2800 cmp r0, #0 8009b74: d1f5 bne.n 8009b62 <_printf_i+0x17e> 8009b76: e7b7 b.n 8009ae8 <_printf_i+0x104> 8009b78: 6808 ldr r0, [r1, #0] 8009b7a: 681a ldr r2, [r3, #0] 8009b7c: f010 0f80 tst.w r0, #128 ; 0x80 8009b80: 6949 ldr r1, [r1, #20] 8009b82: d004 beq.n 8009b8e <_printf_i+0x1aa> 8009b84: 1d10 adds r0, r2, #4 8009b86: 6018 str r0, [r3, #0] 8009b88: 6813 ldr r3, [r2, #0] 8009b8a: 6019 str r1, [r3, #0] 8009b8c: e007 b.n 8009b9e <_printf_i+0x1ba> 8009b8e: f010 0f40 tst.w r0, #64 ; 0x40 8009b92: f102 0004 add.w r0, r2, #4 8009b96: 6018 str r0, [r3, #0] 8009b98: 6813 ldr r3, [r2, #0] 8009b9a: d0f6 beq.n 8009b8a <_printf_i+0x1a6> 8009b9c: 8019 strh r1, [r3, #0] 8009b9e: 2300 movs r3, #0 8009ba0: 4675 mov r5, lr 8009ba2: 6123 str r3, [r4, #16] 8009ba4: e7b1 b.n 8009b0a <_printf_i+0x126> 8009ba6: 681a ldr r2, [r3, #0] 8009ba8: 1d11 adds r1, r2, #4 8009baa: 6019 str r1, [r3, #0] 8009bac: 6815 ldr r5, [r2, #0] 8009bae: 2100 movs r1, #0 8009bb0: 6862 ldr r2, [r4, #4] 8009bb2: 4628 mov r0, r5 8009bb4: f001 fa7e bl 800b0b4 8009bb8: b108 cbz r0, 8009bbe <_printf_i+0x1da> 8009bba: 1b40 subs r0, r0, r5 8009bbc: 6060 str r0, [r4, #4] 8009bbe: 6863 ldr r3, [r4, #4] 8009bc0: 6123 str r3, [r4, #16] 8009bc2: 2300 movs r3, #0 8009bc4: f884 3043 strb.w r3, [r4, #67] ; 0x43 8009bc8: e79f b.n 8009b0a <_printf_i+0x126> 8009bca: 6923 ldr r3, [r4, #16] 8009bcc: 462a mov r2, r5 8009bce: 4639 mov r1, r7 8009bd0: 4630 mov r0, r6 8009bd2: 47c0 blx r8 8009bd4: 3001 adds r0, #1 8009bd6: d0a2 beq.n 8009b1e <_printf_i+0x13a> 8009bd8: 6823 ldr r3, [r4, #0] 8009bda: 079b lsls r3, r3, #30 8009bdc: d507 bpl.n 8009bee <_printf_i+0x20a> 8009bde: 2500 movs r5, #0 8009be0: f104 0919 add.w r9, r4, #25 8009be4: 68e3 ldr r3, [r4, #12] 8009be6: 9a03 ldr r2, [sp, #12] 8009be8: 1a9b subs r3, r3, r2 8009bea: 429d cmp r5, r3 8009bec: db05 blt.n 8009bfa <_printf_i+0x216> 8009bee: 68e0 ldr r0, [r4, #12] 8009bf0: 9b03 ldr r3, [sp, #12] 8009bf2: 4298 cmp r0, r3 8009bf4: bfb8 it lt 8009bf6: 4618 movlt r0, r3 8009bf8: e793 b.n 8009b22 <_printf_i+0x13e> 8009bfa: 2301 movs r3, #1 8009bfc: 464a mov r2, r9 8009bfe: 4639 mov r1, r7 8009c00: 4630 mov r0, r6 8009c02: 47c0 blx r8 8009c04: 3001 adds r0, #1 8009c06: d08a beq.n 8009b1e <_printf_i+0x13a> 8009c08: 3501 adds r5, #1 8009c0a: e7eb b.n 8009be4 <_printf_i+0x200> 8009c0c: 2b00 cmp r3, #0 8009c0e: d1a7 bne.n 8009b60 <_printf_i+0x17c> 8009c10: 780b ldrb r3, [r1, #0] 8009c12: f104 0542 add.w r5, r4, #66 ; 0x42 8009c16: f884 3042 strb.w r3, [r4, #66] ; 0x42 8009c1a: e765 b.n 8009ae8 <_printf_i+0x104> 8009c1c: 0800bd45 .word 0x0800bd45 8009c20: 0800bd34 .word 0x0800bd34 08009c24 : 8009c24: b40f push {r0, r1, r2, r3} 8009c26: 4b0a ldr r3, [pc, #40] ; (8009c50 ) 8009c28: b513 push {r0, r1, r4, lr} 8009c2a: 681c ldr r4, [r3, #0] 8009c2c: b124 cbz r4, 8009c38 8009c2e: 69a3 ldr r3, [r4, #24] 8009c30: b913 cbnz r3, 8009c38 8009c32: 4620 mov r0, r4 8009c34: f001 f93a bl 800aeac <__sinit> 8009c38: ab05 add r3, sp, #20 8009c3a: 9a04 ldr r2, [sp, #16] 8009c3c: 68a1 ldr r1, [r4, #8] 8009c3e: 4620 mov r0, r4 8009c40: 9301 str r3, [sp, #4] 8009c42: f001 fdf7 bl 800b834 <_vfiprintf_r> 8009c46: b002 add sp, #8 8009c48: e8bd 4010 ldmia.w sp!, {r4, lr} 8009c4c: b004 add sp, #16 8009c4e: 4770 bx lr 8009c50: 2000024c .word 0x2000024c 08009c54 <_puts_r>: 8009c54: b570 push {r4, r5, r6, lr} 8009c56: 460e mov r6, r1 8009c58: 4605 mov r5, r0 8009c5a: b118 cbz r0, 8009c64 <_puts_r+0x10> 8009c5c: 6983 ldr r3, [r0, #24] 8009c5e: b90b cbnz r3, 8009c64 <_puts_r+0x10> 8009c60: f001 f924 bl 800aeac <__sinit> 8009c64: 69ab ldr r3, [r5, #24] 8009c66: 68ac ldr r4, [r5, #8] 8009c68: b913 cbnz r3, 8009c70 <_puts_r+0x1c> 8009c6a: 4628 mov r0, r5 8009c6c: f001 f91e bl 800aeac <__sinit> 8009c70: 4b23 ldr r3, [pc, #140] ; (8009d00 <_puts_r+0xac>) 8009c72: 429c cmp r4, r3 8009c74: d117 bne.n 8009ca6 <_puts_r+0x52> 8009c76: 686c ldr r4, [r5, #4] 8009c78: 89a3 ldrh r3, [r4, #12] 8009c7a: 071b lsls r3, r3, #28 8009c7c: d51d bpl.n 8009cba <_puts_r+0x66> 8009c7e: 6923 ldr r3, [r4, #16] 8009c80: b1db cbz r3, 8009cba <_puts_r+0x66> 8009c82: 3e01 subs r6, #1 8009c84: 68a3 ldr r3, [r4, #8] 8009c86: f816 1f01 ldrb.w r1, [r6, #1]! 8009c8a: 3b01 subs r3, #1 8009c8c: 60a3 str r3, [r4, #8] 8009c8e: b9e9 cbnz r1, 8009ccc <_puts_r+0x78> 8009c90: 2b00 cmp r3, #0 8009c92: da2e bge.n 8009cf2 <_puts_r+0x9e> 8009c94: 4622 mov r2, r4 8009c96: 210a movs r1, #10 8009c98: 4628 mov r0, r5 8009c9a: f000 f8f5 bl 8009e88 <__swbuf_r> 8009c9e: 3001 adds r0, #1 8009ca0: d011 beq.n 8009cc6 <_puts_r+0x72> 8009ca2: 200a movs r0, #10 8009ca4: bd70 pop {r4, r5, r6, pc} 8009ca6: 4b17 ldr r3, [pc, #92] ; (8009d04 <_puts_r+0xb0>) 8009ca8: 429c cmp r4, r3 8009caa: d101 bne.n 8009cb0 <_puts_r+0x5c> 8009cac: 68ac ldr r4, [r5, #8] 8009cae: e7e3 b.n 8009c78 <_puts_r+0x24> 8009cb0: 4b15 ldr r3, [pc, #84] ; (8009d08 <_puts_r+0xb4>) 8009cb2: 429c cmp r4, r3 8009cb4: bf08 it eq 8009cb6: 68ec ldreq r4, [r5, #12] 8009cb8: e7de b.n 8009c78 <_puts_r+0x24> 8009cba: 4621 mov r1, r4 8009cbc: 4628 mov r0, r5 8009cbe: f000 f935 bl 8009f2c <__swsetup_r> 8009cc2: 2800 cmp r0, #0 8009cc4: d0dd beq.n 8009c82 <_puts_r+0x2e> 8009cc6: f04f 30ff mov.w r0, #4294967295 8009cca: bd70 pop {r4, r5, r6, pc} 8009ccc: 2b00 cmp r3, #0 8009cce: da04 bge.n 8009cda <_puts_r+0x86> 8009cd0: 69a2 ldr r2, [r4, #24] 8009cd2: 4293 cmp r3, r2 8009cd4: db06 blt.n 8009ce4 <_puts_r+0x90> 8009cd6: 290a cmp r1, #10 8009cd8: d004 beq.n 8009ce4 <_puts_r+0x90> 8009cda: 6823 ldr r3, [r4, #0] 8009cdc: 1c5a adds r2, r3, #1 8009cde: 6022 str r2, [r4, #0] 8009ce0: 7019 strb r1, [r3, #0] 8009ce2: e7cf b.n 8009c84 <_puts_r+0x30> 8009ce4: 4622 mov r2, r4 8009ce6: 4628 mov r0, r5 8009ce8: f000 f8ce bl 8009e88 <__swbuf_r> 8009cec: 3001 adds r0, #1 8009cee: d1c9 bne.n 8009c84 <_puts_r+0x30> 8009cf0: e7e9 b.n 8009cc6 <_puts_r+0x72> 8009cf2: 200a movs r0, #10 8009cf4: 6823 ldr r3, [r4, #0] 8009cf6: 1c5a adds r2, r3, #1 8009cf8: 6022 str r2, [r4, #0] 8009cfa: 7018 strb r0, [r3, #0] 8009cfc: bd70 pop {r4, r5, r6, pc} 8009cfe: bf00 nop 8009d00: 0800bd84 .word 0x0800bd84 8009d04: 0800bda4 .word 0x0800bda4 8009d08: 0800bd64 .word 0x0800bd64 08009d0c : 8009d0c: 4b02 ldr r3, [pc, #8] ; (8009d18 ) 8009d0e: 4601 mov r1, r0 8009d10: 6818 ldr r0, [r3, #0] 8009d12: f7ff bf9f b.w 8009c54 <_puts_r> 8009d16: bf00 nop 8009d18: 2000024c .word 0x2000024c 08009d1c : 8009d1c: 2900 cmp r1, #0 8009d1e: f44f 6380 mov.w r3, #1024 ; 0x400 8009d22: bf0c ite eq 8009d24: 2202 moveq r2, #2 8009d26: 2200 movne r2, #0 8009d28: f000 b800 b.w 8009d2c 08009d2c : 8009d2c: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8009d30: 461d mov r5, r3 8009d32: 4b51 ldr r3, [pc, #324] ; (8009e78 ) 8009d34: 4604 mov r4, r0 8009d36: 681e ldr r6, [r3, #0] 8009d38: 460f mov r7, r1 8009d3a: 4690 mov r8, r2 8009d3c: b126 cbz r6, 8009d48 8009d3e: 69b3 ldr r3, [r6, #24] 8009d40: b913 cbnz r3, 8009d48 8009d42: 4630 mov r0, r6 8009d44: f001 f8b2 bl 800aeac <__sinit> 8009d48: 4b4c ldr r3, [pc, #304] ; (8009e7c ) 8009d4a: 429c cmp r4, r3 8009d4c: d152 bne.n 8009df4 8009d4e: 6874 ldr r4, [r6, #4] 8009d50: f1b8 0f02 cmp.w r8, #2 8009d54: d006 beq.n 8009d64 8009d56: f1b8 0f01 cmp.w r8, #1 8009d5a: f200 8089 bhi.w 8009e70 8009d5e: 2d00 cmp r5, #0 8009d60: f2c0 8086 blt.w 8009e70 8009d64: 4621 mov r1, r4 8009d66: 4630 mov r0, r6 8009d68: f001 f836 bl 800add8 <_fflush_r> 8009d6c: 6b61 ldr r1, [r4, #52] ; 0x34 8009d6e: b141 cbz r1, 8009d82 8009d70: f104 0344 add.w r3, r4, #68 ; 0x44 8009d74: 4299 cmp r1, r3 8009d76: d002 beq.n 8009d7e 8009d78: 4630 mov r0, r6 8009d7a: f001 fc89 bl 800b690 <_free_r> 8009d7e: 2300 movs r3, #0 8009d80: 6363 str r3, [r4, #52] ; 0x34 8009d82: 2300 movs r3, #0 8009d84: 61a3 str r3, [r4, #24] 8009d86: 6063 str r3, [r4, #4] 8009d88: 89a3 ldrh r3, [r4, #12] 8009d8a: 061b lsls r3, r3, #24 8009d8c: d503 bpl.n 8009d96 8009d8e: 6921 ldr r1, [r4, #16] 8009d90: 4630 mov r0, r6 8009d92: f001 fc7d bl 800b690 <_free_r> 8009d96: 89a3 ldrh r3, [r4, #12] 8009d98: f1b8 0f02 cmp.w r8, #2 8009d9c: f423 634a bic.w r3, r3, #3232 ; 0xca0 8009da0: f023 0303 bic.w r3, r3, #3 8009da4: 81a3 strh r3, [r4, #12] 8009da6: d05d beq.n 8009e64 8009da8: ab01 add r3, sp, #4 8009daa: 466a mov r2, sp 8009dac: 4621 mov r1, r4 8009dae: 4630 mov r0, r6 8009db0: f001 f914 bl 800afdc <__swhatbuf_r> 8009db4: 89a3 ldrh r3, [r4, #12] 8009db6: 4318 orrs r0, r3 8009db8: 81a0 strh r0, [r4, #12] 8009dba: bb2d cbnz r5, 8009e08 8009dbc: 9d00 ldr r5, [sp, #0] 8009dbe: 4628 mov r0, r5 8009dc0: f001 f970 bl 800b0a4 8009dc4: 4607 mov r7, r0 8009dc6: 2800 cmp r0, #0 8009dc8: d14e bne.n 8009e68 8009dca: f8dd 9000 ldr.w r9, [sp] 8009dce: 45a9 cmp r9, r5 8009dd0: d13c bne.n 8009e4c 8009dd2: f04f 30ff mov.w r0, #4294967295 8009dd6: 89a3 ldrh r3, [r4, #12] 8009dd8: f043 0302 orr.w r3, r3, #2 8009ddc: 81a3 strh r3, [r4, #12] 8009dde: 2300 movs r3, #0 8009de0: 60a3 str r3, [r4, #8] 8009de2: f104 0347 add.w r3, r4, #71 ; 0x47 8009de6: 6023 str r3, [r4, #0] 8009de8: 6123 str r3, [r4, #16] 8009dea: 2301 movs r3, #1 8009dec: 6163 str r3, [r4, #20] 8009dee: b003 add sp, #12 8009df0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8009df4: 4b22 ldr r3, [pc, #136] ; (8009e80 ) 8009df6: 429c cmp r4, r3 8009df8: d101 bne.n 8009dfe 8009dfa: 68b4 ldr r4, [r6, #8] 8009dfc: e7a8 b.n 8009d50 8009dfe: 4b21 ldr r3, [pc, #132] ; (8009e84 ) 8009e00: 429c cmp r4, r3 8009e02: bf08 it eq 8009e04: 68f4 ldreq r4, [r6, #12] 8009e06: e7a3 b.n 8009d50 8009e08: 2f00 cmp r7, #0 8009e0a: d0d8 beq.n 8009dbe 8009e0c: 69b3 ldr r3, [r6, #24] 8009e0e: b913 cbnz r3, 8009e16 8009e10: 4630 mov r0, r6 8009e12: f001 f84b bl 800aeac <__sinit> 8009e16: f1b8 0f01 cmp.w r8, #1 8009e1a: bf08 it eq 8009e1c: 89a3 ldrheq r3, [r4, #12] 8009e1e: 6027 str r7, [r4, #0] 8009e20: bf04 itt eq 8009e22: f043 0301 orreq.w r3, r3, #1 8009e26: 81a3 strheq r3, [r4, #12] 8009e28: 89a3 ldrh r3, [r4, #12] 8009e2a: 6127 str r7, [r4, #16] 8009e2c: f013 0008 ands.w r0, r3, #8 8009e30: 6165 str r5, [r4, #20] 8009e32: d01b beq.n 8009e6c 8009e34: f013 0001 ands.w r0, r3, #1 8009e38: f04f 0300 mov.w r3, #0 8009e3c: bf1f itttt ne 8009e3e: 426d negne r5, r5 8009e40: 60a3 strne r3, [r4, #8] 8009e42: 61a5 strne r5, [r4, #24] 8009e44: 4618 movne r0, r3 8009e46: bf08 it eq 8009e48: 60a5 streq r5, [r4, #8] 8009e4a: e7d0 b.n 8009dee 8009e4c: 4648 mov r0, r9 8009e4e: f001 f929 bl 800b0a4 8009e52: 4607 mov r7, r0 8009e54: 2800 cmp r0, #0 8009e56: d0bc beq.n 8009dd2 8009e58: 89a3 ldrh r3, [r4, #12] 8009e5a: 464d mov r5, r9 8009e5c: f043 0380 orr.w r3, r3, #128 ; 0x80 8009e60: 81a3 strh r3, [r4, #12] 8009e62: e7d3 b.n 8009e0c 8009e64: 2000 movs r0, #0 8009e66: e7b6 b.n 8009dd6 8009e68: 46a9 mov r9, r5 8009e6a: e7f5 b.n 8009e58 8009e6c: 60a0 str r0, [r4, #8] 8009e6e: e7be b.n 8009dee 8009e70: f04f 30ff mov.w r0, #4294967295 8009e74: e7bb b.n 8009dee 8009e76: bf00 nop 8009e78: 2000024c .word 0x2000024c 8009e7c: 0800bd84 .word 0x0800bd84 8009e80: 0800bda4 .word 0x0800bda4 8009e84: 0800bd64 .word 0x0800bd64 08009e88 <__swbuf_r>: 8009e88: b5f8 push {r3, r4, r5, r6, r7, lr} 8009e8a: 460e mov r6, r1 8009e8c: 4614 mov r4, r2 8009e8e: 4605 mov r5, r0 8009e90: b118 cbz r0, 8009e9a <__swbuf_r+0x12> 8009e92: 6983 ldr r3, [r0, #24] 8009e94: b90b cbnz r3, 8009e9a <__swbuf_r+0x12> 8009e96: f001 f809 bl 800aeac <__sinit> 8009e9a: 4b21 ldr r3, [pc, #132] ; (8009f20 <__swbuf_r+0x98>) 8009e9c: 429c cmp r4, r3 8009e9e: d12a bne.n 8009ef6 <__swbuf_r+0x6e> 8009ea0: 686c ldr r4, [r5, #4] 8009ea2: 69a3 ldr r3, [r4, #24] 8009ea4: 60a3 str r3, [r4, #8] 8009ea6: 89a3 ldrh r3, [r4, #12] 8009ea8: 071a lsls r2, r3, #28 8009eaa: d52e bpl.n 8009f0a <__swbuf_r+0x82> 8009eac: 6923 ldr r3, [r4, #16] 8009eae: b363 cbz r3, 8009f0a <__swbuf_r+0x82> 8009eb0: 6923 ldr r3, [r4, #16] 8009eb2: 6820 ldr r0, [r4, #0] 8009eb4: b2f6 uxtb r6, r6 8009eb6: 1ac0 subs r0, r0, r3 8009eb8: 6963 ldr r3, [r4, #20] 8009eba: 4637 mov r7, r6 8009ebc: 4298 cmp r0, r3 8009ebe: db04 blt.n 8009eca <__swbuf_r+0x42> 8009ec0: 4621 mov r1, r4 8009ec2: 4628 mov r0, r5 8009ec4: f000 ff88 bl 800add8 <_fflush_r> 8009ec8: bb28 cbnz r0, 8009f16 <__swbuf_r+0x8e> 8009eca: 68a3 ldr r3, [r4, #8] 8009ecc: 3001 adds r0, #1 8009ece: 3b01 subs r3, #1 8009ed0: 60a3 str r3, [r4, #8] 8009ed2: 6823 ldr r3, [r4, #0] 8009ed4: 1c5a adds r2, r3, #1 8009ed6: 6022 str r2, [r4, #0] 8009ed8: 701e strb r6, [r3, #0] 8009eda: 6963 ldr r3, [r4, #20] 8009edc: 4298 cmp r0, r3 8009ede: d004 beq.n 8009eea <__swbuf_r+0x62> 8009ee0: 89a3 ldrh r3, [r4, #12] 8009ee2: 07db lsls r3, r3, #31 8009ee4: d519 bpl.n 8009f1a <__swbuf_r+0x92> 8009ee6: 2e0a cmp r6, #10 8009ee8: d117 bne.n 8009f1a <__swbuf_r+0x92> 8009eea: 4621 mov r1, r4 8009eec: 4628 mov r0, r5 8009eee: f000 ff73 bl 800add8 <_fflush_r> 8009ef2: b190 cbz r0, 8009f1a <__swbuf_r+0x92> 8009ef4: e00f b.n 8009f16 <__swbuf_r+0x8e> 8009ef6: 4b0b ldr r3, [pc, #44] ; (8009f24 <__swbuf_r+0x9c>) 8009ef8: 429c cmp r4, r3 8009efa: d101 bne.n 8009f00 <__swbuf_r+0x78> 8009efc: 68ac ldr r4, [r5, #8] 8009efe: e7d0 b.n 8009ea2 <__swbuf_r+0x1a> 8009f00: 4b09 ldr r3, [pc, #36] ; (8009f28 <__swbuf_r+0xa0>) 8009f02: 429c cmp r4, r3 8009f04: bf08 it eq 8009f06: 68ec ldreq r4, [r5, #12] 8009f08: e7cb b.n 8009ea2 <__swbuf_r+0x1a> 8009f0a: 4621 mov r1, r4 8009f0c: 4628 mov r0, r5 8009f0e: f000 f80d bl 8009f2c <__swsetup_r> 8009f12: 2800 cmp r0, #0 8009f14: d0cc beq.n 8009eb0 <__swbuf_r+0x28> 8009f16: f04f 37ff mov.w r7, #4294967295 8009f1a: 4638 mov r0, r7 8009f1c: bdf8 pop {r3, r4, r5, r6, r7, pc} 8009f1e: bf00 nop 8009f20: 0800bd84 .word 0x0800bd84 8009f24: 0800bda4 .word 0x0800bda4 8009f28: 0800bd64 .word 0x0800bd64 08009f2c <__swsetup_r>: 8009f2c: 4b32 ldr r3, [pc, #200] ; (8009ff8 <__swsetup_r+0xcc>) 8009f2e: b570 push {r4, r5, r6, lr} 8009f30: 681d ldr r5, [r3, #0] 8009f32: 4606 mov r6, r0 8009f34: 460c mov r4, r1 8009f36: b125 cbz r5, 8009f42 <__swsetup_r+0x16> 8009f38: 69ab ldr r3, [r5, #24] 8009f3a: b913 cbnz r3, 8009f42 <__swsetup_r+0x16> 8009f3c: 4628 mov r0, r5 8009f3e: f000 ffb5 bl 800aeac <__sinit> 8009f42: 4b2e ldr r3, [pc, #184] ; (8009ffc <__swsetup_r+0xd0>) 8009f44: 429c cmp r4, r3 8009f46: d10f bne.n 8009f68 <__swsetup_r+0x3c> 8009f48: 686c ldr r4, [r5, #4] 8009f4a: f9b4 300c ldrsh.w r3, [r4, #12] 8009f4e: b29a uxth r2, r3 8009f50: 0715 lsls r5, r2, #28 8009f52: d42c bmi.n 8009fae <__swsetup_r+0x82> 8009f54: 06d0 lsls r0, r2, #27 8009f56: d411 bmi.n 8009f7c <__swsetup_r+0x50> 8009f58: 2209 movs r2, #9 8009f5a: 6032 str r2, [r6, #0] 8009f5c: f043 0340 orr.w r3, r3, #64 ; 0x40 8009f60: 81a3 strh r3, [r4, #12] 8009f62: f04f 30ff mov.w r0, #4294967295 8009f66: bd70 pop {r4, r5, r6, pc} 8009f68: 4b25 ldr r3, [pc, #148] ; (800a000 <__swsetup_r+0xd4>) 8009f6a: 429c cmp r4, r3 8009f6c: d101 bne.n 8009f72 <__swsetup_r+0x46> 8009f6e: 68ac ldr r4, [r5, #8] 8009f70: e7eb b.n 8009f4a <__swsetup_r+0x1e> 8009f72: 4b24 ldr r3, [pc, #144] ; (800a004 <__swsetup_r+0xd8>) 8009f74: 429c cmp r4, r3 8009f76: bf08 it eq 8009f78: 68ec ldreq r4, [r5, #12] 8009f7a: e7e6 b.n 8009f4a <__swsetup_r+0x1e> 8009f7c: 0751 lsls r1, r2, #29 8009f7e: d512 bpl.n 8009fa6 <__swsetup_r+0x7a> 8009f80: 6b61 ldr r1, [r4, #52] ; 0x34 8009f82: b141 cbz r1, 8009f96 <__swsetup_r+0x6a> 8009f84: f104 0344 add.w r3, r4, #68 ; 0x44 8009f88: 4299 cmp r1, r3 8009f8a: d002 beq.n 8009f92 <__swsetup_r+0x66> 8009f8c: 4630 mov r0, r6 8009f8e: f001 fb7f bl 800b690 <_free_r> 8009f92: 2300 movs r3, #0 8009f94: 6363 str r3, [r4, #52] ; 0x34 8009f96: 89a3 ldrh r3, [r4, #12] 8009f98: f023 0324 bic.w r3, r3, #36 ; 0x24 8009f9c: 81a3 strh r3, [r4, #12] 8009f9e: 2300 movs r3, #0 8009fa0: 6063 str r3, [r4, #4] 8009fa2: 6923 ldr r3, [r4, #16] 8009fa4: 6023 str r3, [r4, #0] 8009fa6: 89a3 ldrh r3, [r4, #12] 8009fa8: f043 0308 orr.w r3, r3, #8 8009fac: 81a3 strh r3, [r4, #12] 8009fae: 6923 ldr r3, [r4, #16] 8009fb0: b94b cbnz r3, 8009fc6 <__swsetup_r+0x9a> 8009fb2: 89a3 ldrh r3, [r4, #12] 8009fb4: f403 7320 and.w r3, r3, #640 ; 0x280 8009fb8: f5b3 7f00 cmp.w r3, #512 ; 0x200 8009fbc: d003 beq.n 8009fc6 <__swsetup_r+0x9a> 8009fbe: 4621 mov r1, r4 8009fc0: 4630 mov r0, r6 8009fc2: f001 f82f bl 800b024 <__smakebuf_r> 8009fc6: 89a2 ldrh r2, [r4, #12] 8009fc8: f012 0301 ands.w r3, r2, #1 8009fcc: d00c beq.n 8009fe8 <__swsetup_r+0xbc> 8009fce: 2300 movs r3, #0 8009fd0: 60a3 str r3, [r4, #8] 8009fd2: 6963 ldr r3, [r4, #20] 8009fd4: 425b negs r3, r3 8009fd6: 61a3 str r3, [r4, #24] 8009fd8: 6923 ldr r3, [r4, #16] 8009fda: b953 cbnz r3, 8009ff2 <__swsetup_r+0xc6> 8009fdc: f9b4 300c ldrsh.w r3, [r4, #12] 8009fe0: f013 0080 ands.w r0, r3, #128 ; 0x80 8009fe4: d1ba bne.n 8009f5c <__swsetup_r+0x30> 8009fe6: bd70 pop {r4, r5, r6, pc} 8009fe8: 0792 lsls r2, r2, #30 8009fea: bf58 it pl 8009fec: 6963 ldrpl r3, [r4, #20] 8009fee: 60a3 str r3, [r4, #8] 8009ff0: e7f2 b.n 8009fd8 <__swsetup_r+0xac> 8009ff2: 2000 movs r0, #0 8009ff4: e7f7 b.n 8009fe6 <__swsetup_r+0xba> 8009ff6: bf00 nop 8009ff8: 2000024c .word 0x2000024c 8009ffc: 0800bd84 .word 0x0800bd84 800a000: 0800bda4 .word 0x0800bda4 800a004: 0800bd64 .word 0x0800bd64 0800a008 : 800a008: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800a00c: 6903 ldr r3, [r0, #16] 800a00e: 690c ldr r4, [r1, #16] 800a010: 4680 mov r8, r0 800a012: 429c cmp r4, r3 800a014: f300 8082 bgt.w 800a11c 800a018: 3c01 subs r4, #1 800a01a: f101 0714 add.w r7, r1, #20 800a01e: f100 0614 add.w r6, r0, #20 800a022: f857 5024 ldr.w r5, [r7, r4, lsl #2] 800a026: f856 0024 ldr.w r0, [r6, r4, lsl #2] 800a02a: 3501 adds r5, #1 800a02c: fbb0 f5f5 udiv r5, r0, r5 800a030: ea4f 0e84 mov.w lr, r4, lsl #2 800a034: eb06 030e add.w r3, r6, lr 800a038: eb07 090e add.w r9, r7, lr 800a03c: 9301 str r3, [sp, #4] 800a03e: b38d cbz r5, 800a0a4 800a040: f04f 0a00 mov.w sl, #0 800a044: 4638 mov r0, r7 800a046: 46b4 mov ip, r6 800a048: 46d3 mov fp, sl 800a04a: f850 2b04 ldr.w r2, [r0], #4 800a04e: b293 uxth r3, r2 800a050: fb05 a303 mla r3, r5, r3, sl 800a054: 0c12 lsrs r2, r2, #16 800a056: ea4f 4a13 mov.w sl, r3, lsr #16 800a05a: fb05 a202 mla r2, r5, r2, sl 800a05e: b29b uxth r3, r3 800a060: ebab 0303 sub.w r3, fp, r3 800a064: f8bc b000 ldrh.w fp, [ip] 800a068: ea4f 4a12 mov.w sl, r2, lsr #16 800a06c: 445b add r3, fp 800a06e: fa1f fb82 uxth.w fp, r2 800a072: f8dc 2000 ldr.w r2, [ip] 800a076: 4581 cmp r9, r0 800a078: ebcb 4212 rsb r2, fp, r2, lsr #16 800a07c: eb02 4223 add.w r2, r2, r3, asr #16 800a080: b29b uxth r3, r3 800a082: ea43 4302 orr.w r3, r3, r2, lsl #16 800a086: ea4f 4b22 mov.w fp, r2, asr #16 800a08a: f84c 3b04 str.w r3, [ip], #4 800a08e: d2dc bcs.n 800a04a 800a090: f856 300e ldr.w r3, [r6, lr] 800a094: b933 cbnz r3, 800a0a4 800a096: 9b01 ldr r3, [sp, #4] 800a098: 3b04 subs r3, #4 800a09a: 429e cmp r6, r3 800a09c: 461a mov r2, r3 800a09e: d331 bcc.n 800a104 800a0a0: f8c8 4010 str.w r4, [r8, #16] 800a0a4: 4640 mov r0, r8 800a0a6: f001 fa1c bl 800b4e2 <__mcmp> 800a0aa: 2800 cmp r0, #0 800a0ac: db26 blt.n 800a0fc 800a0ae: 4630 mov r0, r6 800a0b0: f04f 0e00 mov.w lr, #0 800a0b4: 3501 adds r5, #1 800a0b6: f857 1b04 ldr.w r1, [r7], #4 800a0ba: f8d0 c000 ldr.w ip, [r0] 800a0be: b28b uxth r3, r1 800a0c0: ebae 0303 sub.w r3, lr, r3 800a0c4: fa1f f28c uxth.w r2, ip 800a0c8: 4413 add r3, r2 800a0ca: 0c0a lsrs r2, r1, #16 800a0cc: ebc2 421c rsb r2, r2, ip, lsr #16 800a0d0: eb02 4223 add.w r2, r2, r3, asr #16 800a0d4: b29b uxth r3, r3 800a0d6: ea43 4302 orr.w r3, r3, r2, lsl #16 800a0da: 45b9 cmp r9, r7 800a0dc: ea4f 4e22 mov.w lr, r2, asr #16 800a0e0: f840 3b04 str.w r3, [r0], #4 800a0e4: d2e7 bcs.n 800a0b6 800a0e6: f856 2024 ldr.w r2, [r6, r4, lsl #2] 800a0ea: eb06 0384 add.w r3, r6, r4, lsl #2 800a0ee: b92a cbnz r2, 800a0fc 800a0f0: 3b04 subs r3, #4 800a0f2: 429e cmp r6, r3 800a0f4: 461a mov r2, r3 800a0f6: d30b bcc.n 800a110 800a0f8: f8c8 4010 str.w r4, [r8, #16] 800a0fc: 4628 mov r0, r5 800a0fe: b003 add sp, #12 800a100: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800a104: 6812 ldr r2, [r2, #0] 800a106: 3b04 subs r3, #4 800a108: 2a00 cmp r2, #0 800a10a: d1c9 bne.n 800a0a0 800a10c: 3c01 subs r4, #1 800a10e: e7c4 b.n 800a09a 800a110: 6812 ldr r2, [r2, #0] 800a112: 3b04 subs r3, #4 800a114: 2a00 cmp r2, #0 800a116: d1ef bne.n 800a0f8 800a118: 3c01 subs r4, #1 800a11a: e7ea b.n 800a0f2 800a11c: 2000 movs r0, #0 800a11e: e7ee b.n 800a0fe 0800a120 <_dtoa_r>: 800a120: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800a124: 6a46 ldr r6, [r0, #36] ; 0x24 800a126: b095 sub sp, #84 ; 0x54 800a128: 4604 mov r4, r0 800a12a: 9d21 ldr r5, [sp, #132] ; 0x84 800a12c: e9cd 2302 strd r2, r3, [sp, #8] 800a130: b93e cbnz r6, 800a142 <_dtoa_r+0x22> 800a132: 2010 movs r0, #16 800a134: f000 ffb6 bl 800b0a4 800a138: 6260 str r0, [r4, #36] ; 0x24 800a13a: 6046 str r6, [r0, #4] 800a13c: 6086 str r6, [r0, #8] 800a13e: 6006 str r6, [r0, #0] 800a140: 60c6 str r6, [r0, #12] 800a142: 6a63 ldr r3, [r4, #36] ; 0x24 800a144: 6819 ldr r1, [r3, #0] 800a146: b151 cbz r1, 800a15e <_dtoa_r+0x3e> 800a148: 685a ldr r2, [r3, #4] 800a14a: 2301 movs r3, #1 800a14c: 4093 lsls r3, r2 800a14e: 604a str r2, [r1, #4] 800a150: 608b str r3, [r1, #8] 800a152: 4620 mov r0, r4 800a154: f000 fff0 bl 800b138 <_Bfree> 800a158: 2200 movs r2, #0 800a15a: 6a63 ldr r3, [r4, #36] ; 0x24 800a15c: 601a str r2, [r3, #0] 800a15e: 9b03 ldr r3, [sp, #12] 800a160: 2b00 cmp r3, #0 800a162: bfb7 itett lt 800a164: 2301 movlt r3, #1 800a166: 2300 movge r3, #0 800a168: 602b strlt r3, [r5, #0] 800a16a: 9b03 ldrlt r3, [sp, #12] 800a16c: bfae itee ge 800a16e: 602b strge r3, [r5, #0] 800a170: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000 800a174: 9303 strlt r3, [sp, #12] 800a176: f8dd 900c ldr.w r9, [sp, #12] 800a17a: 4bab ldr r3, [pc, #684] ; (800a428 <_dtoa_r+0x308>) 800a17c: ea33 0309 bics.w r3, r3, r9 800a180: d11b bne.n 800a1ba <_dtoa_r+0x9a> 800a182: f242 730f movw r3, #9999 ; 0x270f 800a186: 9a20 ldr r2, [sp, #128] ; 0x80 800a188: 6013 str r3, [r2, #0] 800a18a: 9b02 ldr r3, [sp, #8] 800a18c: b923 cbnz r3, 800a198 <_dtoa_r+0x78> 800a18e: f3c9 0013 ubfx r0, r9, #0, #20 800a192: 2800 cmp r0, #0 800a194: f000 8583 beq.w 800ac9e <_dtoa_r+0xb7e> 800a198: 9b22 ldr r3, [sp, #136] ; 0x88 800a19a: b953 cbnz r3, 800a1b2 <_dtoa_r+0x92> 800a19c: 4ba3 ldr r3, [pc, #652] ; (800a42c <_dtoa_r+0x30c>) 800a19e: e021 b.n 800a1e4 <_dtoa_r+0xc4> 800a1a0: 4ba3 ldr r3, [pc, #652] ; (800a430 <_dtoa_r+0x310>) 800a1a2: 9306 str r3, [sp, #24] 800a1a4: 3308 adds r3, #8 800a1a6: 9a22 ldr r2, [sp, #136] ; 0x88 800a1a8: 6013 str r3, [r2, #0] 800a1aa: 9806 ldr r0, [sp, #24] 800a1ac: b015 add sp, #84 ; 0x54 800a1ae: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800a1b2: 4b9e ldr r3, [pc, #632] ; (800a42c <_dtoa_r+0x30c>) 800a1b4: 9306 str r3, [sp, #24] 800a1b6: 3303 adds r3, #3 800a1b8: e7f5 b.n 800a1a6 <_dtoa_r+0x86> 800a1ba: e9dd 6702 ldrd r6, r7, [sp, #8] 800a1be: 2200 movs r2, #0 800a1c0: 2300 movs r3, #0 800a1c2: 4630 mov r0, r6 800a1c4: 4639 mov r1, r7 800a1c6: f7fa fc63 bl 8004a90 <__aeabi_dcmpeq> 800a1ca: 4680 mov r8, r0 800a1cc: b160 cbz r0, 800a1e8 <_dtoa_r+0xc8> 800a1ce: 2301 movs r3, #1 800a1d0: 9a20 ldr r2, [sp, #128] ; 0x80 800a1d2: 6013 str r3, [r2, #0] 800a1d4: 9b22 ldr r3, [sp, #136] ; 0x88 800a1d6: 2b00 cmp r3, #0 800a1d8: f000 855e beq.w 800ac98 <_dtoa_r+0xb78> 800a1dc: 4b95 ldr r3, [pc, #596] ; (800a434 <_dtoa_r+0x314>) 800a1de: 9a22 ldr r2, [sp, #136] ; 0x88 800a1e0: 6013 str r3, [r2, #0] 800a1e2: 3b01 subs r3, #1 800a1e4: 9306 str r3, [sp, #24] 800a1e6: e7e0 b.n 800a1aa <_dtoa_r+0x8a> 800a1e8: ab12 add r3, sp, #72 ; 0x48 800a1ea: 9301 str r3, [sp, #4] 800a1ec: ab13 add r3, sp, #76 ; 0x4c 800a1ee: 9300 str r3, [sp, #0] 800a1f0: 4632 mov r2, r6 800a1f2: 463b mov r3, r7 800a1f4: 4620 mov r0, r4 800a1f6: f001 f9ed bl 800b5d4 <__d2b> 800a1fa: f3c9 550a ubfx r5, r9, #20, #11 800a1fe: 4682 mov sl, r0 800a200: 2d00 cmp r5, #0 800a202: d07d beq.n 800a300 <_dtoa_r+0x1e0> 800a204: 4630 mov r0, r6 800a206: f3c7 0313 ubfx r3, r7, #0, #20 800a20a: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000 800a20e: f441 1140 orr.w r1, r1, #3145728 ; 0x300000 800a212: f2a5 35ff subw r5, r5, #1023 ; 0x3ff 800a216: f8cd 8040 str.w r8, [sp, #64] ; 0x40 800a21a: 2200 movs r2, #0 800a21c: 4b86 ldr r3, [pc, #536] ; (800a438 <_dtoa_r+0x318>) 800a21e: f7fa f81b bl 8004258 <__aeabi_dsub> 800a222: a37b add r3, pc, #492 ; (adr r3, 800a410 <_dtoa_r+0x2f0>) 800a224: e9d3 2300 ldrd r2, r3, [r3] 800a228: f7fa f9ca bl 80045c0 <__aeabi_dmul> 800a22c: a37a add r3, pc, #488 ; (adr r3, 800a418 <_dtoa_r+0x2f8>) 800a22e: e9d3 2300 ldrd r2, r3, [r3] 800a232: f7fa f813 bl 800425c <__adddf3> 800a236: 4606 mov r6, r0 800a238: 4628 mov r0, r5 800a23a: 460f mov r7, r1 800a23c: f7fa f95a bl 80044f4 <__aeabi_i2d> 800a240: a377 add r3, pc, #476 ; (adr r3, 800a420 <_dtoa_r+0x300>) 800a242: e9d3 2300 ldrd r2, r3, [r3] 800a246: f7fa f9bb bl 80045c0 <__aeabi_dmul> 800a24a: 4602 mov r2, r0 800a24c: 460b mov r3, r1 800a24e: 4630 mov r0, r6 800a250: 4639 mov r1, r7 800a252: f7fa f803 bl 800425c <__adddf3> 800a256: 4606 mov r6, r0 800a258: 460f mov r7, r1 800a25a: f7fa fc61 bl 8004b20 <__aeabi_d2iz> 800a25e: 2200 movs r2, #0 800a260: 4683 mov fp, r0 800a262: 2300 movs r3, #0 800a264: 4630 mov r0, r6 800a266: 4639 mov r1, r7 800a268: f7fa fc1c bl 8004aa4 <__aeabi_dcmplt> 800a26c: b158 cbz r0, 800a286 <_dtoa_r+0x166> 800a26e: 4658 mov r0, fp 800a270: f7fa f940 bl 80044f4 <__aeabi_i2d> 800a274: 4602 mov r2, r0 800a276: 460b mov r3, r1 800a278: 4630 mov r0, r6 800a27a: 4639 mov r1, r7 800a27c: f7fa fc08 bl 8004a90 <__aeabi_dcmpeq> 800a280: b908 cbnz r0, 800a286 <_dtoa_r+0x166> 800a282: f10b 3bff add.w fp, fp, #4294967295 800a286: f1bb 0f16 cmp.w fp, #22 800a28a: d858 bhi.n 800a33e <_dtoa_r+0x21e> 800a28c: e9dd 2302 ldrd r2, r3, [sp, #8] 800a290: 496a ldr r1, [pc, #424] ; (800a43c <_dtoa_r+0x31c>) 800a292: eb01 01cb add.w r1, r1, fp, lsl #3 800a296: e9d1 0100 ldrd r0, r1, [r1] 800a29a: f7fa fc21 bl 8004ae0 <__aeabi_dcmpgt> 800a29e: 2800 cmp r0, #0 800a2a0: d04f beq.n 800a342 <_dtoa_r+0x222> 800a2a2: 2300 movs r3, #0 800a2a4: f10b 3bff add.w fp, fp, #4294967295 800a2a8: 930d str r3, [sp, #52] ; 0x34 800a2aa: 9b12 ldr r3, [sp, #72] ; 0x48 800a2ac: 1b5d subs r5, r3, r5 800a2ae: 1e6b subs r3, r5, #1 800a2b0: 9307 str r3, [sp, #28] 800a2b2: bf43 ittte mi 800a2b4: 2300 movmi r3, #0 800a2b6: f1c5 0801 rsbmi r8, r5, #1 800a2ba: 9307 strmi r3, [sp, #28] 800a2bc: f04f 0800 movpl.w r8, #0 800a2c0: f1bb 0f00 cmp.w fp, #0 800a2c4: db3f blt.n 800a346 <_dtoa_r+0x226> 800a2c6: 9b07 ldr r3, [sp, #28] 800a2c8: f8cd b030 str.w fp, [sp, #48] ; 0x30 800a2cc: 445b add r3, fp 800a2ce: 9307 str r3, [sp, #28] 800a2d0: 2300 movs r3, #0 800a2d2: 9308 str r3, [sp, #32] 800a2d4: 9b1e ldr r3, [sp, #120] ; 0x78 800a2d6: 2b09 cmp r3, #9 800a2d8: f200 80b4 bhi.w 800a444 <_dtoa_r+0x324> 800a2dc: 2b05 cmp r3, #5 800a2de: bfc4 itt gt 800a2e0: 3b04 subgt r3, #4 800a2e2: 931e strgt r3, [sp, #120] ; 0x78 800a2e4: 9b1e ldr r3, [sp, #120] ; 0x78 800a2e6: bfc8 it gt 800a2e8: 2600 movgt r6, #0 800a2ea: f1a3 0302 sub.w r3, r3, #2 800a2ee: bfd8 it le 800a2f0: 2601 movle r6, #1 800a2f2: 2b03 cmp r3, #3 800a2f4: f200 80b2 bhi.w 800a45c <_dtoa_r+0x33c> 800a2f8: e8df f003 tbb [pc, r3] 800a2fc: 782d8684 .word 0x782d8684 800a300: 9b13 ldr r3, [sp, #76] ; 0x4c 800a302: 9d12 ldr r5, [sp, #72] ; 0x48 800a304: 441d add r5, r3 800a306: f205 4332 addw r3, r5, #1074 ; 0x432 800a30a: 2b20 cmp r3, #32 800a30c: dd11 ble.n 800a332 <_dtoa_r+0x212> 800a30e: 9a02 ldr r2, [sp, #8] 800a310: f205 4012 addw r0, r5, #1042 ; 0x412 800a314: f1c3 0340 rsb r3, r3, #64 ; 0x40 800a318: fa22 f000 lsr.w r0, r2, r0 800a31c: fa09 f303 lsl.w r3, r9, r3 800a320: 4318 orrs r0, r3 800a322: f7fa f8d7 bl 80044d4 <__aeabi_ui2d> 800a326: 2301 movs r3, #1 800a328: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000 800a32c: 3d01 subs r5, #1 800a32e: 9310 str r3, [sp, #64] ; 0x40 800a330: e773 b.n 800a21a <_dtoa_r+0xfa> 800a332: f1c3 0020 rsb r0, r3, #32 800a336: 9b02 ldr r3, [sp, #8] 800a338: fa03 f000 lsl.w r0, r3, r0 800a33c: e7f1 b.n 800a322 <_dtoa_r+0x202> 800a33e: 2301 movs r3, #1 800a340: e7b2 b.n 800a2a8 <_dtoa_r+0x188> 800a342: 900d str r0, [sp, #52] ; 0x34 800a344: e7b1 b.n 800a2aa <_dtoa_r+0x18a> 800a346: f1cb 0300 rsb r3, fp, #0 800a34a: 9308 str r3, [sp, #32] 800a34c: 2300 movs r3, #0 800a34e: eba8 080b sub.w r8, r8, fp 800a352: 930c str r3, [sp, #48] ; 0x30 800a354: e7be b.n 800a2d4 <_dtoa_r+0x1b4> 800a356: 2301 movs r3, #1 800a358: 9309 str r3, [sp, #36] ; 0x24 800a35a: 9b1f ldr r3, [sp, #124] ; 0x7c 800a35c: 2b00 cmp r3, #0 800a35e: f340 8080 ble.w 800a462 <_dtoa_r+0x342> 800a362: 4699 mov r9, r3 800a364: 9304 str r3, [sp, #16] 800a366: 2200 movs r2, #0 800a368: 2104 movs r1, #4 800a36a: 6a65 ldr r5, [r4, #36] ; 0x24 800a36c: 606a str r2, [r5, #4] 800a36e: f101 0214 add.w r2, r1, #20 800a372: 429a cmp r2, r3 800a374: d97a bls.n 800a46c <_dtoa_r+0x34c> 800a376: 6869 ldr r1, [r5, #4] 800a378: 4620 mov r0, r4 800a37a: f000 fea9 bl 800b0d0 <_Balloc> 800a37e: 6a63 ldr r3, [r4, #36] ; 0x24 800a380: 6028 str r0, [r5, #0] 800a382: 681b ldr r3, [r3, #0] 800a384: f1b9 0f0e cmp.w r9, #14 800a388: 9306 str r3, [sp, #24] 800a38a: f200 80f0 bhi.w 800a56e <_dtoa_r+0x44e> 800a38e: 2e00 cmp r6, #0 800a390: f000 80ed beq.w 800a56e <_dtoa_r+0x44e> 800a394: e9dd 2302 ldrd r2, r3, [sp, #8] 800a398: f1bb 0f00 cmp.w fp, #0 800a39c: e9cd 230e strd r2, r3, [sp, #56] ; 0x38 800a3a0: dd79 ble.n 800a496 <_dtoa_r+0x376> 800a3a2: 4a26 ldr r2, [pc, #152] ; (800a43c <_dtoa_r+0x31c>) 800a3a4: f00b 030f and.w r3, fp, #15 800a3a8: ea4f 162b mov.w r6, fp, asr #4 800a3ac: eb02 03c3 add.w r3, r2, r3, lsl #3 800a3b0: 06f0 lsls r0, r6, #27 800a3b2: e9d3 2300 ldrd r2, r3, [r3] 800a3b6: e9cd 230a strd r2, r3, [sp, #40] ; 0x28 800a3ba: d55c bpl.n 800a476 <_dtoa_r+0x356> 800a3bc: e9dd 010e ldrd r0, r1, [sp, #56] ; 0x38 800a3c0: 4b1f ldr r3, [pc, #124] ; (800a440 <_dtoa_r+0x320>) 800a3c2: 2503 movs r5, #3 800a3c4: e9d3 2308 ldrd r2, r3, [r3, #32] 800a3c8: f7fa fa24 bl 8004814 <__aeabi_ddiv> 800a3cc: e9cd 0102 strd r0, r1, [sp, #8] 800a3d0: f006 060f and.w r6, r6, #15 800a3d4: 4f1a ldr r7, [pc, #104] ; (800a440 <_dtoa_r+0x320>) 800a3d6: 2e00 cmp r6, #0 800a3d8: d14f bne.n 800a47a <_dtoa_r+0x35a> 800a3da: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a3de: e9dd 0102 ldrd r0, r1, [sp, #8] 800a3e2: f7fa fa17 bl 8004814 <__aeabi_ddiv> 800a3e6: e9cd 0102 strd r0, r1, [sp, #8] 800a3ea: e06e b.n 800a4ca <_dtoa_r+0x3aa> 800a3ec: 2301 movs r3, #1 800a3ee: 9309 str r3, [sp, #36] ; 0x24 800a3f0: 9b1f ldr r3, [sp, #124] ; 0x7c 800a3f2: 445b add r3, fp 800a3f4: f103 0901 add.w r9, r3, #1 800a3f8: 9304 str r3, [sp, #16] 800a3fa: 464b mov r3, r9 800a3fc: 2b01 cmp r3, #1 800a3fe: bfb8 it lt 800a400: 2301 movlt r3, #1 800a402: e7b0 b.n 800a366 <_dtoa_r+0x246> 800a404: 2300 movs r3, #0 800a406: e7a7 b.n 800a358 <_dtoa_r+0x238> 800a408: 2300 movs r3, #0 800a40a: e7f0 b.n 800a3ee <_dtoa_r+0x2ce> 800a40c: f3af 8000 nop.w 800a410: 636f4361 .word 0x636f4361 800a414: 3fd287a7 .word 0x3fd287a7 800a418: 8b60c8b3 .word 0x8b60c8b3 800a41c: 3fc68a28 .word 0x3fc68a28 800a420: 509f79fb .word 0x509f79fb 800a424: 3fd34413 .word 0x3fd34413 800a428: 7ff00000 .word 0x7ff00000 800a42c: 0800bd5f .word 0x0800bd5f 800a430: 0800bd56 .word 0x0800bd56 800a434: 0800bcc2 .word 0x0800bcc2 800a438: 3ff80000 .word 0x3ff80000 800a43c: 0800bdf0 .word 0x0800bdf0 800a440: 0800bdc8 .word 0x0800bdc8 800a444: 2601 movs r6, #1 800a446: 2300 movs r3, #0 800a448: 9609 str r6, [sp, #36] ; 0x24 800a44a: 931e str r3, [sp, #120] ; 0x78 800a44c: f04f 33ff mov.w r3, #4294967295 800a450: 2200 movs r2, #0 800a452: 9304 str r3, [sp, #16] 800a454: 4699 mov r9, r3 800a456: 2312 movs r3, #18 800a458: 921f str r2, [sp, #124] ; 0x7c 800a45a: e784 b.n 800a366 <_dtoa_r+0x246> 800a45c: 2301 movs r3, #1 800a45e: 9309 str r3, [sp, #36] ; 0x24 800a460: e7f4 b.n 800a44c <_dtoa_r+0x32c> 800a462: 2301 movs r3, #1 800a464: 9304 str r3, [sp, #16] 800a466: 4699 mov r9, r3 800a468: 461a mov r2, r3 800a46a: e7f5 b.n 800a458 <_dtoa_r+0x338> 800a46c: 686a ldr r2, [r5, #4] 800a46e: 0049 lsls r1, r1, #1 800a470: 3201 adds r2, #1 800a472: 606a str r2, [r5, #4] 800a474: e77b b.n 800a36e <_dtoa_r+0x24e> 800a476: 2502 movs r5, #2 800a478: e7ac b.n 800a3d4 <_dtoa_r+0x2b4> 800a47a: 07f1 lsls r1, r6, #31 800a47c: d508 bpl.n 800a490 <_dtoa_r+0x370> 800a47e: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a482: e9d7 2300 ldrd r2, r3, [r7] 800a486: f7fa f89b bl 80045c0 <__aeabi_dmul> 800a48a: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a48e: 3501 adds r5, #1 800a490: 1076 asrs r6, r6, #1 800a492: 3708 adds r7, #8 800a494: e79f b.n 800a3d6 <_dtoa_r+0x2b6> 800a496: f000 80a5 beq.w 800a5e4 <_dtoa_r+0x4c4> 800a49a: e9dd 010e ldrd r0, r1, [sp, #56] ; 0x38 800a49e: f1cb 0600 rsb r6, fp, #0 800a4a2: 4ba2 ldr r3, [pc, #648] ; (800a72c <_dtoa_r+0x60c>) 800a4a4: f006 020f and.w r2, r6, #15 800a4a8: eb03 03c2 add.w r3, r3, r2, lsl #3 800a4ac: e9d3 2300 ldrd r2, r3, [r3] 800a4b0: f7fa f886 bl 80045c0 <__aeabi_dmul> 800a4b4: 2502 movs r5, #2 800a4b6: 2300 movs r3, #0 800a4b8: e9cd 0102 strd r0, r1, [sp, #8] 800a4bc: 4f9c ldr r7, [pc, #624] ; (800a730 <_dtoa_r+0x610>) 800a4be: 1136 asrs r6, r6, #4 800a4c0: 2e00 cmp r6, #0 800a4c2: f040 8084 bne.w 800a5ce <_dtoa_r+0x4ae> 800a4c6: 2b00 cmp r3, #0 800a4c8: d18d bne.n 800a3e6 <_dtoa_r+0x2c6> 800a4ca: 9b0d ldr r3, [sp, #52] ; 0x34 800a4cc: 2b00 cmp r3, #0 800a4ce: f000 808b beq.w 800a5e8 <_dtoa_r+0x4c8> 800a4d2: e9dd 2302 ldrd r2, r3, [sp, #8] 800a4d6: e9cd 230a strd r2, r3, [sp, #40] ; 0x28 800a4da: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a4de: 2200 movs r2, #0 800a4e0: 4b94 ldr r3, [pc, #592] ; (800a734 <_dtoa_r+0x614>) 800a4e2: f7fa fadf bl 8004aa4 <__aeabi_dcmplt> 800a4e6: 2800 cmp r0, #0 800a4e8: d07e beq.n 800a5e8 <_dtoa_r+0x4c8> 800a4ea: f1b9 0f00 cmp.w r9, #0 800a4ee: d07b beq.n 800a5e8 <_dtoa_r+0x4c8> 800a4f0: 9b04 ldr r3, [sp, #16] 800a4f2: 2b00 cmp r3, #0 800a4f4: dd37 ble.n 800a566 <_dtoa_r+0x446> 800a4f6: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a4fa: 2200 movs r2, #0 800a4fc: 4b8e ldr r3, [pc, #568] ; (800a738 <_dtoa_r+0x618>) 800a4fe: f7fa f85f bl 80045c0 <__aeabi_dmul> 800a502: e9cd 0102 strd r0, r1, [sp, #8] 800a506: 9e04 ldr r6, [sp, #16] 800a508: f10b 37ff add.w r7, fp, #4294967295 800a50c: 3501 adds r5, #1 800a50e: 4628 mov r0, r5 800a510: f7f9 fff0 bl 80044f4 <__aeabi_i2d> 800a514: e9dd 2302 ldrd r2, r3, [sp, #8] 800a518: f7fa f852 bl 80045c0 <__aeabi_dmul> 800a51c: 4b87 ldr r3, [pc, #540] ; (800a73c <_dtoa_r+0x61c>) 800a51e: 2200 movs r2, #0 800a520: f7f9 fe9c bl 800425c <__adddf3> 800a524: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a528: 9b0b ldr r3, [sp, #44] ; 0x2c 800a52a: f1a3 7550 sub.w r5, r3, #54525952 ; 0x3400000 800a52e: 950b str r5, [sp, #44] ; 0x2c 800a530: 2e00 cmp r6, #0 800a532: d15c bne.n 800a5ee <_dtoa_r+0x4ce> 800a534: e9dd 0102 ldrd r0, r1, [sp, #8] 800a538: 2200 movs r2, #0 800a53a: 4b81 ldr r3, [pc, #516] ; (800a740 <_dtoa_r+0x620>) 800a53c: f7f9 fe8c bl 8004258 <__aeabi_dsub> 800a540: 9a0a ldr r2, [sp, #40] ; 0x28 800a542: 462b mov r3, r5 800a544: e9cd 0102 strd r0, r1, [sp, #8] 800a548: f7fa faca bl 8004ae0 <__aeabi_dcmpgt> 800a54c: 2800 cmp r0, #0 800a54e: f040 82f7 bne.w 800ab40 <_dtoa_r+0xa20> 800a552: e9dd 0102 ldrd r0, r1, [sp, #8] 800a556: 9a0a ldr r2, [sp, #40] ; 0x28 800a558: f105 4300 add.w r3, r5, #2147483648 ; 0x80000000 800a55c: f7fa faa2 bl 8004aa4 <__aeabi_dcmplt> 800a560: 2800 cmp r0, #0 800a562: f040 82eb bne.w 800ab3c <_dtoa_r+0xa1c> 800a566: e9dd 230e ldrd r2, r3, [sp, #56] ; 0x38 800a56a: e9cd 2302 strd r2, r3, [sp, #8] 800a56e: 9b13 ldr r3, [sp, #76] ; 0x4c 800a570: 2b00 cmp r3, #0 800a572: f2c0 8150 blt.w 800a816 <_dtoa_r+0x6f6> 800a576: f1bb 0f0e cmp.w fp, #14 800a57a: f300 814c bgt.w 800a816 <_dtoa_r+0x6f6> 800a57e: 4b6b ldr r3, [pc, #428] ; (800a72c <_dtoa_r+0x60c>) 800a580: eb03 03cb add.w r3, r3, fp, lsl #3 800a584: e9d3 2300 ldrd r2, r3, [r3] 800a588: e9cd 2304 strd r2, r3, [sp, #16] 800a58c: 9b1f ldr r3, [sp, #124] ; 0x7c 800a58e: 2b00 cmp r3, #0 800a590: f280 80da bge.w 800a748 <_dtoa_r+0x628> 800a594: f1b9 0f00 cmp.w r9, #0 800a598: f300 80d6 bgt.w 800a748 <_dtoa_r+0x628> 800a59c: f040 82cd bne.w 800ab3a <_dtoa_r+0xa1a> 800a5a0: e9dd 0104 ldrd r0, r1, [sp, #16] 800a5a4: 2200 movs r2, #0 800a5a6: 4b66 ldr r3, [pc, #408] ; (800a740 <_dtoa_r+0x620>) 800a5a8: f7fa f80a bl 80045c0 <__aeabi_dmul> 800a5ac: e9dd 2302 ldrd r2, r3, [sp, #8] 800a5b0: f7fa fa8c bl 8004acc <__aeabi_dcmpge> 800a5b4: 464e mov r6, r9 800a5b6: 464f mov r7, r9 800a5b8: 2800 cmp r0, #0 800a5ba: f040 82a4 bne.w 800ab06 <_dtoa_r+0x9e6> 800a5be: 9b06 ldr r3, [sp, #24] 800a5c0: 9a06 ldr r2, [sp, #24] 800a5c2: 1c5d adds r5, r3, #1 800a5c4: 2331 movs r3, #49 ; 0x31 800a5c6: f10b 0b01 add.w fp, fp, #1 800a5ca: 7013 strb r3, [r2, #0] 800a5cc: e29f b.n 800ab0e <_dtoa_r+0x9ee> 800a5ce: 07f2 lsls r2, r6, #31 800a5d0: d505 bpl.n 800a5de <_dtoa_r+0x4be> 800a5d2: e9d7 2300 ldrd r2, r3, [r7] 800a5d6: f7f9 fff3 bl 80045c0 <__aeabi_dmul> 800a5da: 2301 movs r3, #1 800a5dc: 3501 adds r5, #1 800a5de: 1076 asrs r6, r6, #1 800a5e0: 3708 adds r7, #8 800a5e2: e76d b.n 800a4c0 <_dtoa_r+0x3a0> 800a5e4: 2502 movs r5, #2 800a5e6: e770 b.n 800a4ca <_dtoa_r+0x3aa> 800a5e8: 465f mov r7, fp 800a5ea: 464e mov r6, r9 800a5ec: e78f b.n 800a50e <_dtoa_r+0x3ee> 800a5ee: 9a06 ldr r2, [sp, #24] 800a5f0: 4b4e ldr r3, [pc, #312] ; (800a72c <_dtoa_r+0x60c>) 800a5f2: 4432 add r2, r6 800a5f4: 9211 str r2, [sp, #68] ; 0x44 800a5f6: 9a09 ldr r2, [sp, #36] ; 0x24 800a5f8: 1e71 subs r1, r6, #1 800a5fa: 2a00 cmp r2, #0 800a5fc: d048 beq.n 800a690 <_dtoa_r+0x570> 800a5fe: eb03 03c1 add.w r3, r3, r1, lsl #3 800a602: e9d3 2300 ldrd r2, r3, [r3] 800a606: 2000 movs r0, #0 800a608: 494e ldr r1, [pc, #312] ; (800a744 <_dtoa_r+0x624>) 800a60a: f7fa f903 bl 8004814 <__aeabi_ddiv> 800a60e: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a612: f7f9 fe21 bl 8004258 <__aeabi_dsub> 800a616: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a61a: 9d06 ldr r5, [sp, #24] 800a61c: e9dd 0102 ldrd r0, r1, [sp, #8] 800a620: f7fa fa7e bl 8004b20 <__aeabi_d2iz> 800a624: 4606 mov r6, r0 800a626: f7f9 ff65 bl 80044f4 <__aeabi_i2d> 800a62a: 4602 mov r2, r0 800a62c: 460b mov r3, r1 800a62e: e9dd 0102 ldrd r0, r1, [sp, #8] 800a632: f7f9 fe11 bl 8004258 <__aeabi_dsub> 800a636: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a63a: 3630 adds r6, #48 ; 0x30 800a63c: f805 6b01 strb.w r6, [r5], #1 800a640: e9cd 0102 strd r0, r1, [sp, #8] 800a644: f7fa fa2e bl 8004aa4 <__aeabi_dcmplt> 800a648: 2800 cmp r0, #0 800a64a: d164 bne.n 800a716 <_dtoa_r+0x5f6> 800a64c: e9dd 2302 ldrd r2, r3, [sp, #8] 800a650: 2000 movs r0, #0 800a652: 4938 ldr r1, [pc, #224] ; (800a734 <_dtoa_r+0x614>) 800a654: f7f9 fe00 bl 8004258 <__aeabi_dsub> 800a658: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a65c: f7fa fa22 bl 8004aa4 <__aeabi_dcmplt> 800a660: 2800 cmp r0, #0 800a662: f040 80b9 bne.w 800a7d8 <_dtoa_r+0x6b8> 800a666: 9b11 ldr r3, [sp, #68] ; 0x44 800a668: 429d cmp r5, r3 800a66a: f43f af7c beq.w 800a566 <_dtoa_r+0x446> 800a66e: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a672: 2200 movs r2, #0 800a674: 4b30 ldr r3, [pc, #192] ; (800a738 <_dtoa_r+0x618>) 800a676: f7f9 ffa3 bl 80045c0 <__aeabi_dmul> 800a67a: 2200 movs r2, #0 800a67c: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a680: e9dd 0102 ldrd r0, r1, [sp, #8] 800a684: 4b2c ldr r3, [pc, #176] ; (800a738 <_dtoa_r+0x618>) 800a686: f7f9 ff9b bl 80045c0 <__aeabi_dmul> 800a68a: e9cd 0102 strd r0, r1, [sp, #8] 800a68e: e7c5 b.n 800a61c <_dtoa_r+0x4fc> 800a690: eb03 01c1 add.w r1, r3, r1, lsl #3 800a694: e9d1 0100 ldrd r0, r1, [r1] 800a698: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a69c: f7f9 ff90 bl 80045c0 <__aeabi_dmul> 800a6a0: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a6a4: 9d06 ldr r5, [sp, #24] 800a6a6: e9dd 0102 ldrd r0, r1, [sp, #8] 800a6aa: f7fa fa39 bl 8004b20 <__aeabi_d2iz> 800a6ae: 4606 mov r6, r0 800a6b0: f7f9 ff20 bl 80044f4 <__aeabi_i2d> 800a6b4: 4602 mov r2, r0 800a6b6: 460b mov r3, r1 800a6b8: e9dd 0102 ldrd r0, r1, [sp, #8] 800a6bc: f7f9 fdcc bl 8004258 <__aeabi_dsub> 800a6c0: 3630 adds r6, #48 ; 0x30 800a6c2: 9b11 ldr r3, [sp, #68] ; 0x44 800a6c4: f805 6b01 strb.w r6, [r5], #1 800a6c8: 42ab cmp r3, r5 800a6ca: e9cd 0102 strd r0, r1, [sp, #8] 800a6ce: f04f 0200 mov.w r2, #0 800a6d2: d124 bne.n 800a71e <_dtoa_r+0x5fe> 800a6d4: 4b1b ldr r3, [pc, #108] ; (800a744 <_dtoa_r+0x624>) 800a6d6: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a6da: f7f9 fdbf bl 800425c <__adddf3> 800a6de: 4602 mov r2, r0 800a6e0: 460b mov r3, r1 800a6e2: e9dd 0102 ldrd r0, r1, [sp, #8] 800a6e6: f7fa f9fb bl 8004ae0 <__aeabi_dcmpgt> 800a6ea: 2800 cmp r0, #0 800a6ec: d174 bne.n 800a7d8 <_dtoa_r+0x6b8> 800a6ee: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a6f2: 2000 movs r0, #0 800a6f4: 4913 ldr r1, [pc, #76] ; (800a744 <_dtoa_r+0x624>) 800a6f6: f7f9 fdaf bl 8004258 <__aeabi_dsub> 800a6fa: 4602 mov r2, r0 800a6fc: 460b mov r3, r1 800a6fe: e9dd 0102 ldrd r0, r1, [sp, #8] 800a702: f7fa f9cf bl 8004aa4 <__aeabi_dcmplt> 800a706: 2800 cmp r0, #0 800a708: f43f af2d beq.w 800a566 <_dtoa_r+0x446> 800a70c: f815 3c01 ldrb.w r3, [r5, #-1] 800a710: 1e6a subs r2, r5, #1 800a712: 2b30 cmp r3, #48 ; 0x30 800a714: d001 beq.n 800a71a <_dtoa_r+0x5fa> 800a716: 46bb mov fp, r7 800a718: e04d b.n 800a7b6 <_dtoa_r+0x696> 800a71a: 4615 mov r5, r2 800a71c: e7f6 b.n 800a70c <_dtoa_r+0x5ec> 800a71e: 4b06 ldr r3, [pc, #24] ; (800a738 <_dtoa_r+0x618>) 800a720: f7f9 ff4e bl 80045c0 <__aeabi_dmul> 800a724: e9cd 0102 strd r0, r1, [sp, #8] 800a728: e7bd b.n 800a6a6 <_dtoa_r+0x586> 800a72a: bf00 nop 800a72c: 0800bdf0 .word 0x0800bdf0 800a730: 0800bdc8 .word 0x0800bdc8 800a734: 3ff00000 .word 0x3ff00000 800a738: 40240000 .word 0x40240000 800a73c: 401c0000 .word 0x401c0000 800a740: 40140000 .word 0x40140000 800a744: 3fe00000 .word 0x3fe00000 800a748: 9d06 ldr r5, [sp, #24] 800a74a: e9dd 6702 ldrd r6, r7, [sp, #8] 800a74e: e9dd 2304 ldrd r2, r3, [sp, #16] 800a752: 4630 mov r0, r6 800a754: 4639 mov r1, r7 800a756: f7fa f85d bl 8004814 <__aeabi_ddiv> 800a75a: f7fa f9e1 bl 8004b20 <__aeabi_d2iz> 800a75e: 4680 mov r8, r0 800a760: f7f9 fec8 bl 80044f4 <__aeabi_i2d> 800a764: e9dd 2304 ldrd r2, r3, [sp, #16] 800a768: f7f9 ff2a bl 80045c0 <__aeabi_dmul> 800a76c: 4602 mov r2, r0 800a76e: 460b mov r3, r1 800a770: 4630 mov r0, r6 800a772: 4639 mov r1, r7 800a774: f7f9 fd70 bl 8004258 <__aeabi_dsub> 800a778: f108 0630 add.w r6, r8, #48 ; 0x30 800a77c: f805 6b01 strb.w r6, [r5], #1 800a780: 9e06 ldr r6, [sp, #24] 800a782: 4602 mov r2, r0 800a784: 1bae subs r6, r5, r6 800a786: 45b1 cmp r9, r6 800a788: 460b mov r3, r1 800a78a: d137 bne.n 800a7fc <_dtoa_r+0x6dc> 800a78c: f7f9 fd66 bl 800425c <__adddf3> 800a790: 4606 mov r6, r0 800a792: 460f mov r7, r1 800a794: 4602 mov r2, r0 800a796: 460b mov r3, r1 800a798: e9dd 0104 ldrd r0, r1, [sp, #16] 800a79c: f7fa f982 bl 8004aa4 <__aeabi_dcmplt> 800a7a0: b9c8 cbnz r0, 800a7d6 <_dtoa_r+0x6b6> 800a7a2: e9dd 0104 ldrd r0, r1, [sp, #16] 800a7a6: 4632 mov r2, r6 800a7a8: 463b mov r3, r7 800a7aa: f7fa f971 bl 8004a90 <__aeabi_dcmpeq> 800a7ae: b110 cbz r0, 800a7b6 <_dtoa_r+0x696> 800a7b0: f018 0f01 tst.w r8, #1 800a7b4: d10f bne.n 800a7d6 <_dtoa_r+0x6b6> 800a7b6: 4651 mov r1, sl 800a7b8: 4620 mov r0, r4 800a7ba: f000 fcbd bl 800b138 <_Bfree> 800a7be: 2300 movs r3, #0 800a7c0: 9a20 ldr r2, [sp, #128] ; 0x80 800a7c2: 702b strb r3, [r5, #0] 800a7c4: f10b 0301 add.w r3, fp, #1 800a7c8: 6013 str r3, [r2, #0] 800a7ca: 9b22 ldr r3, [sp, #136] ; 0x88 800a7cc: 2b00 cmp r3, #0 800a7ce: f43f acec beq.w 800a1aa <_dtoa_r+0x8a> 800a7d2: 601d str r5, [r3, #0] 800a7d4: e4e9 b.n 800a1aa <_dtoa_r+0x8a> 800a7d6: 465f mov r7, fp 800a7d8: f815 2c01 ldrb.w r2, [r5, #-1] 800a7dc: 1e6b subs r3, r5, #1 800a7de: 2a39 cmp r2, #57 ; 0x39 800a7e0: d106 bne.n 800a7f0 <_dtoa_r+0x6d0> 800a7e2: 9a06 ldr r2, [sp, #24] 800a7e4: 429a cmp r2, r3 800a7e6: d107 bne.n 800a7f8 <_dtoa_r+0x6d8> 800a7e8: 2330 movs r3, #48 ; 0x30 800a7ea: 7013 strb r3, [r2, #0] 800a7ec: 4613 mov r3, r2 800a7ee: 3701 adds r7, #1 800a7f0: 781a ldrb r2, [r3, #0] 800a7f2: 3201 adds r2, #1 800a7f4: 701a strb r2, [r3, #0] 800a7f6: e78e b.n 800a716 <_dtoa_r+0x5f6> 800a7f8: 461d mov r5, r3 800a7fa: e7ed b.n 800a7d8 <_dtoa_r+0x6b8> 800a7fc: 2200 movs r2, #0 800a7fe: 4bb5 ldr r3, [pc, #724] ; (800aad4 <_dtoa_r+0x9b4>) 800a800: f7f9 fede bl 80045c0 <__aeabi_dmul> 800a804: 2200 movs r2, #0 800a806: 2300 movs r3, #0 800a808: 4606 mov r6, r0 800a80a: 460f mov r7, r1 800a80c: f7fa f940 bl 8004a90 <__aeabi_dcmpeq> 800a810: 2800 cmp r0, #0 800a812: d09c beq.n 800a74e <_dtoa_r+0x62e> 800a814: e7cf b.n 800a7b6 <_dtoa_r+0x696> 800a816: 9a09 ldr r2, [sp, #36] ; 0x24 800a818: 2a00 cmp r2, #0 800a81a: f000 8129 beq.w 800aa70 <_dtoa_r+0x950> 800a81e: 9a1e ldr r2, [sp, #120] ; 0x78 800a820: 2a01 cmp r2, #1 800a822: f300 810e bgt.w 800aa42 <_dtoa_r+0x922> 800a826: 9a10 ldr r2, [sp, #64] ; 0x40 800a828: 2a00 cmp r2, #0 800a82a: f000 8106 beq.w 800aa3a <_dtoa_r+0x91a> 800a82e: f203 4333 addw r3, r3, #1075 ; 0x433 800a832: 4645 mov r5, r8 800a834: 9e08 ldr r6, [sp, #32] 800a836: 9a07 ldr r2, [sp, #28] 800a838: 2101 movs r1, #1 800a83a: 441a add r2, r3 800a83c: 4620 mov r0, r4 800a83e: 4498 add r8, r3 800a840: 9207 str r2, [sp, #28] 800a842: f000 fd19 bl 800b278 <__i2b> 800a846: 4607 mov r7, r0 800a848: 2d00 cmp r5, #0 800a84a: dd0b ble.n 800a864 <_dtoa_r+0x744> 800a84c: 9b07 ldr r3, [sp, #28] 800a84e: 2b00 cmp r3, #0 800a850: dd08 ble.n 800a864 <_dtoa_r+0x744> 800a852: 42ab cmp r3, r5 800a854: bfa8 it ge 800a856: 462b movge r3, r5 800a858: 9a07 ldr r2, [sp, #28] 800a85a: eba8 0803 sub.w r8, r8, r3 800a85e: 1aed subs r5, r5, r3 800a860: 1ad3 subs r3, r2, r3 800a862: 9307 str r3, [sp, #28] 800a864: 9b08 ldr r3, [sp, #32] 800a866: b1fb cbz r3, 800a8a8 <_dtoa_r+0x788> 800a868: 9b09 ldr r3, [sp, #36] ; 0x24 800a86a: 2b00 cmp r3, #0 800a86c: f000 8104 beq.w 800aa78 <_dtoa_r+0x958> 800a870: 2e00 cmp r6, #0 800a872: dd11 ble.n 800a898 <_dtoa_r+0x778> 800a874: 4639 mov r1, r7 800a876: 4632 mov r2, r6 800a878: 4620 mov r0, r4 800a87a: f000 fd93 bl 800b3a4 <__pow5mult> 800a87e: 4652 mov r2, sl 800a880: 4601 mov r1, r0 800a882: 4607 mov r7, r0 800a884: 4620 mov r0, r4 800a886: f000 fd00 bl 800b28a <__multiply> 800a88a: 4651 mov r1, sl 800a88c: 900a str r0, [sp, #40] ; 0x28 800a88e: 4620 mov r0, r4 800a890: f000 fc52 bl 800b138 <_Bfree> 800a894: 9b0a ldr r3, [sp, #40] ; 0x28 800a896: 469a mov sl, r3 800a898: 9b08 ldr r3, [sp, #32] 800a89a: 1b9a subs r2, r3, r6 800a89c: d004 beq.n 800a8a8 <_dtoa_r+0x788> 800a89e: 4651 mov r1, sl 800a8a0: 4620 mov r0, r4 800a8a2: f000 fd7f bl 800b3a4 <__pow5mult> 800a8a6: 4682 mov sl, r0 800a8a8: 2101 movs r1, #1 800a8aa: 4620 mov r0, r4 800a8ac: f000 fce4 bl 800b278 <__i2b> 800a8b0: 9b0c ldr r3, [sp, #48] ; 0x30 800a8b2: 4606 mov r6, r0 800a8b4: 2b00 cmp r3, #0 800a8b6: f340 80e1 ble.w 800aa7c <_dtoa_r+0x95c> 800a8ba: 461a mov r2, r3 800a8bc: 4601 mov r1, r0 800a8be: 4620 mov r0, r4 800a8c0: f000 fd70 bl 800b3a4 <__pow5mult> 800a8c4: 9b1e ldr r3, [sp, #120] ; 0x78 800a8c6: 4606 mov r6, r0 800a8c8: 2b01 cmp r3, #1 800a8ca: f340 80da ble.w 800aa82 <_dtoa_r+0x962> 800a8ce: 2300 movs r3, #0 800a8d0: 9308 str r3, [sp, #32] 800a8d2: 6933 ldr r3, [r6, #16] 800a8d4: eb06 0383 add.w r3, r6, r3, lsl #2 800a8d8: 6918 ldr r0, [r3, #16] 800a8da: f000 fc7f bl 800b1dc <__hi0bits> 800a8de: f1c0 0020 rsb r0, r0, #32 800a8e2: 9b07 ldr r3, [sp, #28] 800a8e4: 4418 add r0, r3 800a8e6: f010 001f ands.w r0, r0, #31 800a8ea: f000 80f0 beq.w 800aace <_dtoa_r+0x9ae> 800a8ee: f1c0 0320 rsb r3, r0, #32 800a8f2: 2b04 cmp r3, #4 800a8f4: f340 80e2 ble.w 800aabc <_dtoa_r+0x99c> 800a8f8: 9b07 ldr r3, [sp, #28] 800a8fa: f1c0 001c rsb r0, r0, #28 800a8fe: 4480 add r8, r0 800a900: 4405 add r5, r0 800a902: 4403 add r3, r0 800a904: 9307 str r3, [sp, #28] 800a906: f1b8 0f00 cmp.w r8, #0 800a90a: dd05 ble.n 800a918 <_dtoa_r+0x7f8> 800a90c: 4651 mov r1, sl 800a90e: 4642 mov r2, r8 800a910: 4620 mov r0, r4 800a912: f000 fd95 bl 800b440 <__lshift> 800a916: 4682 mov sl, r0 800a918: 9b07 ldr r3, [sp, #28] 800a91a: 2b00 cmp r3, #0 800a91c: dd05 ble.n 800a92a <_dtoa_r+0x80a> 800a91e: 4631 mov r1, r6 800a920: 461a mov r2, r3 800a922: 4620 mov r0, r4 800a924: f000 fd8c bl 800b440 <__lshift> 800a928: 4606 mov r6, r0 800a92a: 9b0d ldr r3, [sp, #52] ; 0x34 800a92c: 2b00 cmp r3, #0 800a92e: f000 80d3 beq.w 800aad8 <_dtoa_r+0x9b8> 800a932: 4631 mov r1, r6 800a934: 4650 mov r0, sl 800a936: f000 fdd4 bl 800b4e2 <__mcmp> 800a93a: 2800 cmp r0, #0 800a93c: f280 80cc bge.w 800aad8 <_dtoa_r+0x9b8> 800a940: 2300 movs r3, #0 800a942: 4651 mov r1, sl 800a944: 220a movs r2, #10 800a946: 4620 mov r0, r4 800a948: f000 fc0d bl 800b166 <__multadd> 800a94c: 9b09 ldr r3, [sp, #36] ; 0x24 800a94e: f10b 3bff add.w fp, fp, #4294967295 800a952: 4682 mov sl, r0 800a954: 2b00 cmp r3, #0 800a956: f000 81a9 beq.w 800acac <_dtoa_r+0xb8c> 800a95a: 2300 movs r3, #0 800a95c: 4639 mov r1, r7 800a95e: 220a movs r2, #10 800a960: 4620 mov r0, r4 800a962: f000 fc00 bl 800b166 <__multadd> 800a966: 9b04 ldr r3, [sp, #16] 800a968: 4607 mov r7, r0 800a96a: 2b00 cmp r3, #0 800a96c: dc03 bgt.n 800a976 <_dtoa_r+0x856> 800a96e: 9b1e ldr r3, [sp, #120] ; 0x78 800a970: 2b02 cmp r3, #2 800a972: f300 80b9 bgt.w 800aae8 <_dtoa_r+0x9c8> 800a976: 2d00 cmp r5, #0 800a978: dd05 ble.n 800a986 <_dtoa_r+0x866> 800a97a: 4639 mov r1, r7 800a97c: 462a mov r2, r5 800a97e: 4620 mov r0, r4 800a980: f000 fd5e bl 800b440 <__lshift> 800a984: 4607 mov r7, r0 800a986: 9b08 ldr r3, [sp, #32] 800a988: 2b00 cmp r3, #0 800a98a: f000 8110 beq.w 800abae <_dtoa_r+0xa8e> 800a98e: 6879 ldr r1, [r7, #4] 800a990: 4620 mov r0, r4 800a992: f000 fb9d bl 800b0d0 <_Balloc> 800a996: 4605 mov r5, r0 800a998: 693a ldr r2, [r7, #16] 800a99a: f107 010c add.w r1, r7, #12 800a99e: 3202 adds r2, #2 800a9a0: 0092 lsls r2, r2, #2 800a9a2: 300c adds r0, #12 800a9a4: f7fe fcca bl 800933c 800a9a8: 2201 movs r2, #1 800a9aa: 4629 mov r1, r5 800a9ac: 4620 mov r0, r4 800a9ae: f000 fd47 bl 800b440 <__lshift> 800a9b2: 9707 str r7, [sp, #28] 800a9b4: 4607 mov r7, r0 800a9b6: 9b02 ldr r3, [sp, #8] 800a9b8: f8dd 8018 ldr.w r8, [sp, #24] 800a9bc: f003 0301 and.w r3, r3, #1 800a9c0: 9308 str r3, [sp, #32] 800a9c2: 4631 mov r1, r6 800a9c4: 4650 mov r0, sl 800a9c6: f7ff fb1f bl 800a008 800a9ca: 9907 ldr r1, [sp, #28] 800a9cc: 4605 mov r5, r0 800a9ce: f100 0930 add.w r9, r0, #48 ; 0x30 800a9d2: 4650 mov r0, sl 800a9d4: f000 fd85 bl 800b4e2 <__mcmp> 800a9d8: 463a mov r2, r7 800a9da: 9002 str r0, [sp, #8] 800a9dc: 4631 mov r1, r6 800a9de: 4620 mov r0, r4 800a9e0: f000 fd99 bl 800b516 <__mdiff> 800a9e4: 68c3 ldr r3, [r0, #12] 800a9e6: 4602 mov r2, r0 800a9e8: 2b00 cmp r3, #0 800a9ea: f040 80e2 bne.w 800abb2 <_dtoa_r+0xa92> 800a9ee: 4601 mov r1, r0 800a9f0: 9009 str r0, [sp, #36] ; 0x24 800a9f2: 4650 mov r0, sl 800a9f4: f000 fd75 bl 800b4e2 <__mcmp> 800a9f8: 4603 mov r3, r0 800a9fa: 9a09 ldr r2, [sp, #36] ; 0x24 800a9fc: 4611 mov r1, r2 800a9fe: 4620 mov r0, r4 800aa00: 9309 str r3, [sp, #36] ; 0x24 800aa02: f000 fb99 bl 800b138 <_Bfree> 800aa06: 9b09 ldr r3, [sp, #36] ; 0x24 800aa08: 2b00 cmp r3, #0 800aa0a: f040 80d4 bne.w 800abb6 <_dtoa_r+0xa96> 800aa0e: 9a1e ldr r2, [sp, #120] ; 0x78 800aa10: 2a00 cmp r2, #0 800aa12: f040 80d0 bne.w 800abb6 <_dtoa_r+0xa96> 800aa16: 9a08 ldr r2, [sp, #32] 800aa18: 2a00 cmp r2, #0 800aa1a: f040 80cc bne.w 800abb6 <_dtoa_r+0xa96> 800aa1e: f1b9 0f39 cmp.w r9, #57 ; 0x39 800aa22: f000 80e8 beq.w 800abf6 <_dtoa_r+0xad6> 800aa26: 9b02 ldr r3, [sp, #8] 800aa28: 2b00 cmp r3, #0 800aa2a: dd01 ble.n 800aa30 <_dtoa_r+0x910> 800aa2c: f105 0931 add.w r9, r5, #49 ; 0x31 800aa30: f108 0501 add.w r5, r8, #1 800aa34: f888 9000 strb.w r9, [r8] 800aa38: e06b b.n 800ab12 <_dtoa_r+0x9f2> 800aa3a: 9b12 ldr r3, [sp, #72] ; 0x48 800aa3c: f1c3 0336 rsb r3, r3, #54 ; 0x36 800aa40: e6f7 b.n 800a832 <_dtoa_r+0x712> 800aa42: 9b08 ldr r3, [sp, #32] 800aa44: f109 36ff add.w r6, r9, #4294967295 800aa48: 42b3 cmp r3, r6 800aa4a: bfb7 itett lt 800aa4c: 9b08 ldrlt r3, [sp, #32] 800aa4e: 1b9e subge r6, r3, r6 800aa50: 1af2 sublt r2, r6, r3 800aa52: 9b0c ldrlt r3, [sp, #48] ; 0x30 800aa54: bfbf itttt lt 800aa56: 9608 strlt r6, [sp, #32] 800aa58: 189b addlt r3, r3, r2 800aa5a: 930c strlt r3, [sp, #48] ; 0x30 800aa5c: 2600 movlt r6, #0 800aa5e: f1b9 0f00 cmp.w r9, #0 800aa62: bfb9 ittee lt 800aa64: eba8 0509 sublt.w r5, r8, r9 800aa68: 2300 movlt r3, #0 800aa6a: 4645 movge r5, r8 800aa6c: 464b movge r3, r9 800aa6e: e6e2 b.n 800a836 <_dtoa_r+0x716> 800aa70: 9e08 ldr r6, [sp, #32] 800aa72: 4645 mov r5, r8 800aa74: 9f09 ldr r7, [sp, #36] ; 0x24 800aa76: e6e7 b.n 800a848 <_dtoa_r+0x728> 800aa78: 9a08 ldr r2, [sp, #32] 800aa7a: e710 b.n 800a89e <_dtoa_r+0x77e> 800aa7c: 9b1e ldr r3, [sp, #120] ; 0x78 800aa7e: 2b01 cmp r3, #1 800aa80: dc18 bgt.n 800aab4 <_dtoa_r+0x994> 800aa82: 9b02 ldr r3, [sp, #8] 800aa84: b9b3 cbnz r3, 800aab4 <_dtoa_r+0x994> 800aa86: 9b03 ldr r3, [sp, #12] 800aa88: f3c3 0313 ubfx r3, r3, #0, #20 800aa8c: b9a3 cbnz r3, 800aab8 <_dtoa_r+0x998> 800aa8e: 9b03 ldr r3, [sp, #12] 800aa90: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 800aa94: 0d1b lsrs r3, r3, #20 800aa96: 051b lsls r3, r3, #20 800aa98: b12b cbz r3, 800aaa6 <_dtoa_r+0x986> 800aa9a: 9b07 ldr r3, [sp, #28] 800aa9c: f108 0801 add.w r8, r8, #1 800aaa0: 3301 adds r3, #1 800aaa2: 9307 str r3, [sp, #28] 800aaa4: 2301 movs r3, #1 800aaa6: 9308 str r3, [sp, #32] 800aaa8: 9b0c ldr r3, [sp, #48] ; 0x30 800aaaa: 2b00 cmp r3, #0 800aaac: f47f af11 bne.w 800a8d2 <_dtoa_r+0x7b2> 800aab0: 2001 movs r0, #1 800aab2: e716 b.n 800a8e2 <_dtoa_r+0x7c2> 800aab4: 2300 movs r3, #0 800aab6: e7f6 b.n 800aaa6 <_dtoa_r+0x986> 800aab8: 9b02 ldr r3, [sp, #8] 800aaba: e7f4 b.n 800aaa6 <_dtoa_r+0x986> 800aabc: f43f af23 beq.w 800a906 <_dtoa_r+0x7e6> 800aac0: 9a07 ldr r2, [sp, #28] 800aac2: 331c adds r3, #28 800aac4: 441a add r2, r3 800aac6: 4498 add r8, r3 800aac8: 441d add r5, r3 800aaca: 4613 mov r3, r2 800aacc: e71a b.n 800a904 <_dtoa_r+0x7e4> 800aace: 4603 mov r3, r0 800aad0: e7f6 b.n 800aac0 <_dtoa_r+0x9a0> 800aad2: bf00 nop 800aad4: 40240000 .word 0x40240000 800aad8: f1b9 0f00 cmp.w r9, #0 800aadc: dc33 bgt.n 800ab46 <_dtoa_r+0xa26> 800aade: 9b1e ldr r3, [sp, #120] ; 0x78 800aae0: 2b02 cmp r3, #2 800aae2: dd30 ble.n 800ab46 <_dtoa_r+0xa26> 800aae4: f8cd 9010 str.w r9, [sp, #16] 800aae8: 9b04 ldr r3, [sp, #16] 800aaea: b963 cbnz r3, 800ab06 <_dtoa_r+0x9e6> 800aaec: 4631 mov r1, r6 800aaee: 2205 movs r2, #5 800aaf0: 4620 mov r0, r4 800aaf2: f000 fb38 bl 800b166 <__multadd> 800aaf6: 4601 mov r1, r0 800aaf8: 4606 mov r6, r0 800aafa: 4650 mov r0, sl 800aafc: f000 fcf1 bl 800b4e2 <__mcmp> 800ab00: 2800 cmp r0, #0 800ab02: f73f ad5c bgt.w 800a5be <_dtoa_r+0x49e> 800ab06: 9b1f ldr r3, [sp, #124] ; 0x7c 800ab08: 9d06 ldr r5, [sp, #24] 800ab0a: ea6f 0b03 mvn.w fp, r3 800ab0e: 2300 movs r3, #0 800ab10: 9307 str r3, [sp, #28] 800ab12: 4631 mov r1, r6 800ab14: 4620 mov r0, r4 800ab16: f000 fb0f bl 800b138 <_Bfree> 800ab1a: 2f00 cmp r7, #0 800ab1c: f43f ae4b beq.w 800a7b6 <_dtoa_r+0x696> 800ab20: 9b07 ldr r3, [sp, #28] 800ab22: b12b cbz r3, 800ab30 <_dtoa_r+0xa10> 800ab24: 42bb cmp r3, r7 800ab26: d003 beq.n 800ab30 <_dtoa_r+0xa10> 800ab28: 4619 mov r1, r3 800ab2a: 4620 mov r0, r4 800ab2c: f000 fb04 bl 800b138 <_Bfree> 800ab30: 4639 mov r1, r7 800ab32: 4620 mov r0, r4 800ab34: f000 fb00 bl 800b138 <_Bfree> 800ab38: e63d b.n 800a7b6 <_dtoa_r+0x696> 800ab3a: 2600 movs r6, #0 800ab3c: 4637 mov r7, r6 800ab3e: e7e2 b.n 800ab06 <_dtoa_r+0x9e6> 800ab40: 46bb mov fp, r7 800ab42: 4637 mov r7, r6 800ab44: e53b b.n 800a5be <_dtoa_r+0x49e> 800ab46: 9b09 ldr r3, [sp, #36] ; 0x24 800ab48: f8cd 9010 str.w r9, [sp, #16] 800ab4c: 2b00 cmp r3, #0 800ab4e: f47f af12 bne.w 800a976 <_dtoa_r+0x856> 800ab52: 9d06 ldr r5, [sp, #24] 800ab54: 4631 mov r1, r6 800ab56: 4650 mov r0, sl 800ab58: f7ff fa56 bl 800a008 800ab5c: 9b06 ldr r3, [sp, #24] 800ab5e: f100 0930 add.w r9, r0, #48 ; 0x30 800ab62: f805 9b01 strb.w r9, [r5], #1 800ab66: 9a04 ldr r2, [sp, #16] 800ab68: 1aeb subs r3, r5, r3 800ab6a: 429a cmp r2, r3 800ab6c: f300 8081 bgt.w 800ac72 <_dtoa_r+0xb52> 800ab70: 9b06 ldr r3, [sp, #24] 800ab72: 2a01 cmp r2, #1 800ab74: bfac ite ge 800ab76: 189b addge r3, r3, r2 800ab78: 3301 addlt r3, #1 800ab7a: 4698 mov r8, r3 800ab7c: 2300 movs r3, #0 800ab7e: 9307 str r3, [sp, #28] 800ab80: 4651 mov r1, sl 800ab82: 2201 movs r2, #1 800ab84: 4620 mov r0, r4 800ab86: f000 fc5b bl 800b440 <__lshift> 800ab8a: 4631 mov r1, r6 800ab8c: 4682 mov sl, r0 800ab8e: f000 fca8 bl 800b4e2 <__mcmp> 800ab92: 2800 cmp r0, #0 800ab94: dc34 bgt.n 800ac00 <_dtoa_r+0xae0> 800ab96: d102 bne.n 800ab9e <_dtoa_r+0xa7e> 800ab98: f019 0f01 tst.w r9, #1 800ab9c: d130 bne.n 800ac00 <_dtoa_r+0xae0> 800ab9e: 4645 mov r5, r8 800aba0: f815 3c01 ldrb.w r3, [r5, #-1] 800aba4: 1e6a subs r2, r5, #1 800aba6: 2b30 cmp r3, #48 ; 0x30 800aba8: d1b3 bne.n 800ab12 <_dtoa_r+0x9f2> 800abaa: 4615 mov r5, r2 800abac: e7f8 b.n 800aba0 <_dtoa_r+0xa80> 800abae: 4638 mov r0, r7 800abb0: e6ff b.n 800a9b2 <_dtoa_r+0x892> 800abb2: 2301 movs r3, #1 800abb4: e722 b.n 800a9fc <_dtoa_r+0x8dc> 800abb6: 9a02 ldr r2, [sp, #8] 800abb8: 2a00 cmp r2, #0 800abba: db04 blt.n 800abc6 <_dtoa_r+0xaa6> 800abbc: d128 bne.n 800ac10 <_dtoa_r+0xaf0> 800abbe: 9a1e ldr r2, [sp, #120] ; 0x78 800abc0: bb32 cbnz r2, 800ac10 <_dtoa_r+0xaf0> 800abc2: 9a08 ldr r2, [sp, #32] 800abc4: bb22 cbnz r2, 800ac10 <_dtoa_r+0xaf0> 800abc6: 2b00 cmp r3, #0 800abc8: f77f af32 ble.w 800aa30 <_dtoa_r+0x910> 800abcc: 4651 mov r1, sl 800abce: 2201 movs r2, #1 800abd0: 4620 mov r0, r4 800abd2: f000 fc35 bl 800b440 <__lshift> 800abd6: 4631 mov r1, r6 800abd8: 4682 mov sl, r0 800abda: f000 fc82 bl 800b4e2 <__mcmp> 800abde: 2800 cmp r0, #0 800abe0: dc05 bgt.n 800abee <_dtoa_r+0xace> 800abe2: f47f af25 bne.w 800aa30 <_dtoa_r+0x910> 800abe6: f019 0f01 tst.w r9, #1 800abea: f43f af21 beq.w 800aa30 <_dtoa_r+0x910> 800abee: f1b9 0f39 cmp.w r9, #57 ; 0x39 800abf2: f47f af1b bne.w 800aa2c <_dtoa_r+0x90c> 800abf6: 2339 movs r3, #57 ; 0x39 800abf8: f108 0801 add.w r8, r8, #1 800abfc: f808 3c01 strb.w r3, [r8, #-1] 800ac00: 4645 mov r5, r8 800ac02: f815 3c01 ldrb.w r3, [r5, #-1] 800ac06: 1e6a subs r2, r5, #1 800ac08: 2b39 cmp r3, #57 ; 0x39 800ac0a: d03a beq.n 800ac82 <_dtoa_r+0xb62> 800ac0c: 3301 adds r3, #1 800ac0e: e03f b.n 800ac90 <_dtoa_r+0xb70> 800ac10: 2b00 cmp r3, #0 800ac12: f108 0501 add.w r5, r8, #1 800ac16: dd05 ble.n 800ac24 <_dtoa_r+0xb04> 800ac18: f1b9 0f39 cmp.w r9, #57 ; 0x39 800ac1c: d0eb beq.n 800abf6 <_dtoa_r+0xad6> 800ac1e: f109 0901 add.w r9, r9, #1 800ac22: e707 b.n 800aa34 <_dtoa_r+0x914> 800ac24: 9b06 ldr r3, [sp, #24] 800ac26: 9a04 ldr r2, [sp, #16] 800ac28: 1aeb subs r3, r5, r3 800ac2a: 4293 cmp r3, r2 800ac2c: 46a8 mov r8, r5 800ac2e: f805 9c01 strb.w r9, [r5, #-1] 800ac32: d0a5 beq.n 800ab80 <_dtoa_r+0xa60> 800ac34: 4651 mov r1, sl 800ac36: 2300 movs r3, #0 800ac38: 220a movs r2, #10 800ac3a: 4620 mov r0, r4 800ac3c: f000 fa93 bl 800b166 <__multadd> 800ac40: 9b07 ldr r3, [sp, #28] 800ac42: 4682 mov sl, r0 800ac44: 42bb cmp r3, r7 800ac46: f04f 020a mov.w r2, #10 800ac4a: f04f 0300 mov.w r3, #0 800ac4e: 9907 ldr r1, [sp, #28] 800ac50: 4620 mov r0, r4 800ac52: d104 bne.n 800ac5e <_dtoa_r+0xb3e> 800ac54: f000 fa87 bl 800b166 <__multadd> 800ac58: 9007 str r0, [sp, #28] 800ac5a: 4607 mov r7, r0 800ac5c: e6b1 b.n 800a9c2 <_dtoa_r+0x8a2> 800ac5e: f000 fa82 bl 800b166 <__multadd> 800ac62: 2300 movs r3, #0 800ac64: 9007 str r0, [sp, #28] 800ac66: 220a movs r2, #10 800ac68: 4639 mov r1, r7 800ac6a: 4620 mov r0, r4 800ac6c: f000 fa7b bl 800b166 <__multadd> 800ac70: e7f3 b.n 800ac5a <_dtoa_r+0xb3a> 800ac72: 4651 mov r1, sl 800ac74: 2300 movs r3, #0 800ac76: 220a movs r2, #10 800ac78: 4620 mov r0, r4 800ac7a: f000 fa74 bl 800b166 <__multadd> 800ac7e: 4682 mov sl, r0 800ac80: e768 b.n 800ab54 <_dtoa_r+0xa34> 800ac82: 9b06 ldr r3, [sp, #24] 800ac84: 4293 cmp r3, r2 800ac86: d105 bne.n 800ac94 <_dtoa_r+0xb74> 800ac88: 2331 movs r3, #49 ; 0x31 800ac8a: 9a06 ldr r2, [sp, #24] 800ac8c: f10b 0b01 add.w fp, fp, #1 800ac90: 7013 strb r3, [r2, #0] 800ac92: e73e b.n 800ab12 <_dtoa_r+0x9f2> 800ac94: 4615 mov r5, r2 800ac96: e7b4 b.n 800ac02 <_dtoa_r+0xae2> 800ac98: 4b09 ldr r3, [pc, #36] ; (800acc0 <_dtoa_r+0xba0>) 800ac9a: f7ff baa3 b.w 800a1e4 <_dtoa_r+0xc4> 800ac9e: 9b22 ldr r3, [sp, #136] ; 0x88 800aca0: 2b00 cmp r3, #0 800aca2: f47f aa7d bne.w 800a1a0 <_dtoa_r+0x80> 800aca6: 4b07 ldr r3, [pc, #28] ; (800acc4 <_dtoa_r+0xba4>) 800aca8: f7ff ba9c b.w 800a1e4 <_dtoa_r+0xc4> 800acac: 9b04 ldr r3, [sp, #16] 800acae: 2b00 cmp r3, #0 800acb0: f73f af4f bgt.w 800ab52 <_dtoa_r+0xa32> 800acb4: 9b1e ldr r3, [sp, #120] ; 0x78 800acb6: 2b02 cmp r3, #2 800acb8: f77f af4b ble.w 800ab52 <_dtoa_r+0xa32> 800acbc: e714 b.n 800aae8 <_dtoa_r+0x9c8> 800acbe: bf00 nop 800acc0: 0800bcc1 .word 0x0800bcc1 800acc4: 0800bd56 .word 0x0800bd56 0800acc8 <__sflush_r>: 800acc8: 898a ldrh r2, [r1, #12] 800acca: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800acce: 4605 mov r5, r0 800acd0: 0710 lsls r0, r2, #28 800acd2: 460c mov r4, r1 800acd4: d45a bmi.n 800ad8c <__sflush_r+0xc4> 800acd6: 684b ldr r3, [r1, #4] 800acd8: 2b00 cmp r3, #0 800acda: dc05 bgt.n 800ace8 <__sflush_r+0x20> 800acdc: 6c0b ldr r3, [r1, #64] ; 0x40 800acde: 2b00 cmp r3, #0 800ace0: dc02 bgt.n 800ace8 <__sflush_r+0x20> 800ace2: 2000 movs r0, #0 800ace4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800ace8: 6ae6 ldr r6, [r4, #44] ; 0x2c 800acea: 2e00 cmp r6, #0 800acec: d0f9 beq.n 800ace2 <__sflush_r+0x1a> 800acee: 2300 movs r3, #0 800acf0: f412 5280 ands.w r2, r2, #4096 ; 0x1000 800acf4: 682f ldr r7, [r5, #0] 800acf6: 602b str r3, [r5, #0] 800acf8: d033 beq.n 800ad62 <__sflush_r+0x9a> 800acfa: 6d60 ldr r0, [r4, #84] ; 0x54 800acfc: 89a3 ldrh r3, [r4, #12] 800acfe: 075a lsls r2, r3, #29 800ad00: d505 bpl.n 800ad0e <__sflush_r+0x46> 800ad02: 6863 ldr r3, [r4, #4] 800ad04: 1ac0 subs r0, r0, r3 800ad06: 6b63 ldr r3, [r4, #52] ; 0x34 800ad08: b10b cbz r3, 800ad0e <__sflush_r+0x46> 800ad0a: 6c23 ldr r3, [r4, #64] ; 0x40 800ad0c: 1ac0 subs r0, r0, r3 800ad0e: 2300 movs r3, #0 800ad10: 4602 mov r2, r0 800ad12: 6ae6 ldr r6, [r4, #44] ; 0x2c 800ad14: 6a21 ldr r1, [r4, #32] 800ad16: 4628 mov r0, r5 800ad18: 47b0 blx r6 800ad1a: 1c43 adds r3, r0, #1 800ad1c: 89a3 ldrh r3, [r4, #12] 800ad1e: d106 bne.n 800ad2e <__sflush_r+0x66> 800ad20: 6829 ldr r1, [r5, #0] 800ad22: 291d cmp r1, #29 800ad24: d84b bhi.n 800adbe <__sflush_r+0xf6> 800ad26: 4a2b ldr r2, [pc, #172] ; (800add4 <__sflush_r+0x10c>) 800ad28: 40ca lsrs r2, r1 800ad2a: 07d6 lsls r6, r2, #31 800ad2c: d547 bpl.n 800adbe <__sflush_r+0xf6> 800ad2e: 2200 movs r2, #0 800ad30: 6062 str r2, [r4, #4] 800ad32: 6922 ldr r2, [r4, #16] 800ad34: 04d9 lsls r1, r3, #19 800ad36: 6022 str r2, [r4, #0] 800ad38: d504 bpl.n 800ad44 <__sflush_r+0x7c> 800ad3a: 1c42 adds r2, r0, #1 800ad3c: d101 bne.n 800ad42 <__sflush_r+0x7a> 800ad3e: 682b ldr r3, [r5, #0] 800ad40: b903 cbnz r3, 800ad44 <__sflush_r+0x7c> 800ad42: 6560 str r0, [r4, #84] ; 0x54 800ad44: 6b61 ldr r1, [r4, #52] ; 0x34 800ad46: 602f str r7, [r5, #0] 800ad48: 2900 cmp r1, #0 800ad4a: d0ca beq.n 800ace2 <__sflush_r+0x1a> 800ad4c: f104 0344 add.w r3, r4, #68 ; 0x44 800ad50: 4299 cmp r1, r3 800ad52: d002 beq.n 800ad5a <__sflush_r+0x92> 800ad54: 4628 mov r0, r5 800ad56: f000 fc9b bl 800b690 <_free_r> 800ad5a: 2000 movs r0, #0 800ad5c: 6360 str r0, [r4, #52] ; 0x34 800ad5e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800ad62: 6a21 ldr r1, [r4, #32] 800ad64: 2301 movs r3, #1 800ad66: 4628 mov r0, r5 800ad68: 47b0 blx r6 800ad6a: 1c41 adds r1, r0, #1 800ad6c: d1c6 bne.n 800acfc <__sflush_r+0x34> 800ad6e: 682b ldr r3, [r5, #0] 800ad70: 2b00 cmp r3, #0 800ad72: d0c3 beq.n 800acfc <__sflush_r+0x34> 800ad74: 2b1d cmp r3, #29 800ad76: d001 beq.n 800ad7c <__sflush_r+0xb4> 800ad78: 2b16 cmp r3, #22 800ad7a: d101 bne.n 800ad80 <__sflush_r+0xb8> 800ad7c: 602f str r7, [r5, #0] 800ad7e: e7b0 b.n 800ace2 <__sflush_r+0x1a> 800ad80: 89a3 ldrh r3, [r4, #12] 800ad82: f043 0340 orr.w r3, r3, #64 ; 0x40 800ad86: 81a3 strh r3, [r4, #12] 800ad88: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800ad8c: 690f ldr r7, [r1, #16] 800ad8e: 2f00 cmp r7, #0 800ad90: d0a7 beq.n 800ace2 <__sflush_r+0x1a> 800ad92: 0793 lsls r3, r2, #30 800ad94: bf18 it ne 800ad96: 2300 movne r3, #0 800ad98: 680e ldr r6, [r1, #0] 800ad9a: bf08 it eq 800ad9c: 694b ldreq r3, [r1, #20] 800ad9e: eba6 0807 sub.w r8, r6, r7 800ada2: 600f str r7, [r1, #0] 800ada4: 608b str r3, [r1, #8] 800ada6: f1b8 0f00 cmp.w r8, #0 800adaa: dd9a ble.n 800ace2 <__sflush_r+0x1a> 800adac: 4643 mov r3, r8 800adae: 463a mov r2, r7 800adb0: 6a21 ldr r1, [r4, #32] 800adb2: 4628 mov r0, r5 800adb4: 6aa6 ldr r6, [r4, #40] ; 0x28 800adb6: 47b0 blx r6 800adb8: 2800 cmp r0, #0 800adba: dc07 bgt.n 800adcc <__sflush_r+0x104> 800adbc: 89a3 ldrh r3, [r4, #12] 800adbe: f043 0340 orr.w r3, r3, #64 ; 0x40 800adc2: 81a3 strh r3, [r4, #12] 800adc4: f04f 30ff mov.w r0, #4294967295 800adc8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800adcc: 4407 add r7, r0 800adce: eba8 0800 sub.w r8, r8, r0 800add2: e7e8 b.n 800ada6 <__sflush_r+0xde> 800add4: 20400001 .word 0x20400001 0800add8 <_fflush_r>: 800add8: b538 push {r3, r4, r5, lr} 800adda: 690b ldr r3, [r1, #16] 800addc: 4605 mov r5, r0 800adde: 460c mov r4, r1 800ade0: b1db cbz r3, 800ae1a <_fflush_r+0x42> 800ade2: b118 cbz r0, 800adec <_fflush_r+0x14> 800ade4: 6983 ldr r3, [r0, #24] 800ade6: b90b cbnz r3, 800adec <_fflush_r+0x14> 800ade8: f000 f860 bl 800aeac <__sinit> 800adec: 4b0c ldr r3, [pc, #48] ; (800ae20 <_fflush_r+0x48>) 800adee: 429c cmp r4, r3 800adf0: d109 bne.n 800ae06 <_fflush_r+0x2e> 800adf2: 686c ldr r4, [r5, #4] 800adf4: f9b4 300c ldrsh.w r3, [r4, #12] 800adf8: b17b cbz r3, 800ae1a <_fflush_r+0x42> 800adfa: 4621 mov r1, r4 800adfc: 4628 mov r0, r5 800adfe: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800ae02: f7ff bf61 b.w 800acc8 <__sflush_r> 800ae06: 4b07 ldr r3, [pc, #28] ; (800ae24 <_fflush_r+0x4c>) 800ae08: 429c cmp r4, r3 800ae0a: d101 bne.n 800ae10 <_fflush_r+0x38> 800ae0c: 68ac ldr r4, [r5, #8] 800ae0e: e7f1 b.n 800adf4 <_fflush_r+0x1c> 800ae10: 4b05 ldr r3, [pc, #20] ; (800ae28 <_fflush_r+0x50>) 800ae12: 429c cmp r4, r3 800ae14: bf08 it eq 800ae16: 68ec ldreq r4, [r5, #12] 800ae18: e7ec b.n 800adf4 <_fflush_r+0x1c> 800ae1a: 2000 movs r0, #0 800ae1c: bd38 pop {r3, r4, r5, pc} 800ae1e: bf00 nop 800ae20: 0800bd84 .word 0x0800bd84 800ae24: 0800bda4 .word 0x0800bda4 800ae28: 0800bd64 .word 0x0800bd64 0800ae2c <_cleanup_r>: 800ae2c: 4901 ldr r1, [pc, #4] ; (800ae34 <_cleanup_r+0x8>) 800ae2e: f000 b8a9 b.w 800af84 <_fwalk_reent> 800ae32: bf00 nop 800ae34: 0800add9 .word 0x0800add9 0800ae38 : 800ae38: 2300 movs r3, #0 800ae3a: b510 push {r4, lr} 800ae3c: 4604 mov r4, r0 800ae3e: 6003 str r3, [r0, #0] 800ae40: 6043 str r3, [r0, #4] 800ae42: 6083 str r3, [r0, #8] 800ae44: 8181 strh r1, [r0, #12] 800ae46: 6643 str r3, [r0, #100] ; 0x64 800ae48: 81c2 strh r2, [r0, #14] 800ae4a: 6103 str r3, [r0, #16] 800ae4c: 6143 str r3, [r0, #20] 800ae4e: 6183 str r3, [r0, #24] 800ae50: 4619 mov r1, r3 800ae52: 2208 movs r2, #8 800ae54: 305c adds r0, #92 ; 0x5c 800ae56: f7fe fa7c bl 8009352 800ae5a: 4b05 ldr r3, [pc, #20] ; (800ae70 ) 800ae5c: 6224 str r4, [r4, #32] 800ae5e: 6263 str r3, [r4, #36] ; 0x24 800ae60: 4b04 ldr r3, [pc, #16] ; (800ae74 ) 800ae62: 62a3 str r3, [r4, #40] ; 0x28 800ae64: 4b04 ldr r3, [pc, #16] ; (800ae78 ) 800ae66: 62e3 str r3, [r4, #44] ; 0x2c 800ae68: 4b04 ldr r3, [pc, #16] ; (800ae7c ) 800ae6a: 6323 str r3, [r4, #48] ; 0x30 800ae6c: bd10 pop {r4, pc} 800ae6e: bf00 nop 800ae70: 0800ba81 .word 0x0800ba81 800ae74: 0800baa3 .word 0x0800baa3 800ae78: 0800badb .word 0x0800badb 800ae7c: 0800baff .word 0x0800baff 0800ae80 <__sfmoreglue>: 800ae80: b570 push {r4, r5, r6, lr} 800ae82: 2568 movs r5, #104 ; 0x68 800ae84: 1e4a subs r2, r1, #1 800ae86: 4355 muls r5, r2 800ae88: 460e mov r6, r1 800ae8a: f105 0174 add.w r1, r5, #116 ; 0x74 800ae8e: f000 fc4b bl 800b728 <_malloc_r> 800ae92: 4604 mov r4, r0 800ae94: b140 cbz r0, 800aea8 <__sfmoreglue+0x28> 800ae96: 2100 movs r1, #0 800ae98: e880 0042 stmia.w r0, {r1, r6} 800ae9c: 300c adds r0, #12 800ae9e: 60a0 str r0, [r4, #8] 800aea0: f105 0268 add.w r2, r5, #104 ; 0x68 800aea4: f7fe fa55 bl 8009352 800aea8: 4620 mov r0, r4 800aeaa: bd70 pop {r4, r5, r6, pc} 0800aeac <__sinit>: 800aeac: 6983 ldr r3, [r0, #24] 800aeae: b510 push {r4, lr} 800aeb0: 4604 mov r4, r0 800aeb2: bb33 cbnz r3, 800af02 <__sinit+0x56> 800aeb4: 6483 str r3, [r0, #72] ; 0x48 800aeb6: 64c3 str r3, [r0, #76] ; 0x4c 800aeb8: 6503 str r3, [r0, #80] ; 0x50 800aeba: 4b12 ldr r3, [pc, #72] ; (800af04 <__sinit+0x58>) 800aebc: 4a12 ldr r2, [pc, #72] ; (800af08 <__sinit+0x5c>) 800aebe: 681b ldr r3, [r3, #0] 800aec0: 6282 str r2, [r0, #40] ; 0x28 800aec2: 4298 cmp r0, r3 800aec4: bf04 itt eq 800aec6: 2301 moveq r3, #1 800aec8: 6183 streq r3, [r0, #24] 800aeca: f000 f81f bl 800af0c <__sfp> 800aece: 6060 str r0, [r4, #4] 800aed0: 4620 mov r0, r4 800aed2: f000 f81b bl 800af0c <__sfp> 800aed6: 60a0 str r0, [r4, #8] 800aed8: 4620 mov r0, r4 800aeda: f000 f817 bl 800af0c <__sfp> 800aede: 2200 movs r2, #0 800aee0: 60e0 str r0, [r4, #12] 800aee2: 2104 movs r1, #4 800aee4: 6860 ldr r0, [r4, #4] 800aee6: f7ff ffa7 bl 800ae38 800aeea: 2201 movs r2, #1 800aeec: 2109 movs r1, #9 800aeee: 68a0 ldr r0, [r4, #8] 800aef0: f7ff ffa2 bl 800ae38 800aef4: 2202 movs r2, #2 800aef6: 2112 movs r1, #18 800aef8: 68e0 ldr r0, [r4, #12] 800aefa: f7ff ff9d bl 800ae38 800aefe: 2301 movs r3, #1 800af00: 61a3 str r3, [r4, #24] 800af02: bd10 pop {r4, pc} 800af04: 0800bd20 .word 0x0800bd20 800af08: 0800ae2d .word 0x0800ae2d 0800af0c <__sfp>: 800af0c: b5f8 push {r3, r4, r5, r6, r7, lr} 800af0e: 4b1c ldr r3, [pc, #112] ; (800af80 <__sfp+0x74>) 800af10: 4607 mov r7, r0 800af12: 681e ldr r6, [r3, #0] 800af14: 69b3 ldr r3, [r6, #24] 800af16: b913 cbnz r3, 800af1e <__sfp+0x12> 800af18: 4630 mov r0, r6 800af1a: f7ff ffc7 bl 800aeac <__sinit> 800af1e: 3648 adds r6, #72 ; 0x48 800af20: 68b4 ldr r4, [r6, #8] 800af22: 6873 ldr r3, [r6, #4] 800af24: 3b01 subs r3, #1 800af26: d503 bpl.n 800af30 <__sfp+0x24> 800af28: 6833 ldr r3, [r6, #0] 800af2a: b133 cbz r3, 800af3a <__sfp+0x2e> 800af2c: 6836 ldr r6, [r6, #0] 800af2e: e7f7 b.n 800af20 <__sfp+0x14> 800af30: f9b4 500c ldrsh.w r5, [r4, #12] 800af34: b16d cbz r5, 800af52 <__sfp+0x46> 800af36: 3468 adds r4, #104 ; 0x68 800af38: e7f4 b.n 800af24 <__sfp+0x18> 800af3a: 2104 movs r1, #4 800af3c: 4638 mov r0, r7 800af3e: f7ff ff9f bl 800ae80 <__sfmoreglue> 800af42: 6030 str r0, [r6, #0] 800af44: 2800 cmp r0, #0 800af46: d1f1 bne.n 800af2c <__sfp+0x20> 800af48: 230c movs r3, #12 800af4a: 4604 mov r4, r0 800af4c: 603b str r3, [r7, #0] 800af4e: 4620 mov r0, r4 800af50: bdf8 pop {r3, r4, r5, r6, r7, pc} 800af52: f64f 73ff movw r3, #65535 ; 0xffff 800af56: 81e3 strh r3, [r4, #14] 800af58: 2301 movs r3, #1 800af5a: 6665 str r5, [r4, #100] ; 0x64 800af5c: 81a3 strh r3, [r4, #12] 800af5e: 6025 str r5, [r4, #0] 800af60: 60a5 str r5, [r4, #8] 800af62: 6065 str r5, [r4, #4] 800af64: 6125 str r5, [r4, #16] 800af66: 6165 str r5, [r4, #20] 800af68: 61a5 str r5, [r4, #24] 800af6a: 2208 movs r2, #8 800af6c: 4629 mov r1, r5 800af6e: f104 005c add.w r0, r4, #92 ; 0x5c 800af72: f7fe f9ee bl 8009352 800af76: 6365 str r5, [r4, #52] ; 0x34 800af78: 63a5 str r5, [r4, #56] ; 0x38 800af7a: 64a5 str r5, [r4, #72] ; 0x48 800af7c: 64e5 str r5, [r4, #76] ; 0x4c 800af7e: e7e6 b.n 800af4e <__sfp+0x42> 800af80: 0800bd20 .word 0x0800bd20 0800af84 <_fwalk_reent>: 800af84: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800af88: 4680 mov r8, r0 800af8a: 4689 mov r9, r1 800af8c: 2600 movs r6, #0 800af8e: f100 0448 add.w r4, r0, #72 ; 0x48 800af92: b914 cbnz r4, 800af9a <_fwalk_reent+0x16> 800af94: 4630 mov r0, r6 800af96: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800af9a: 68a5 ldr r5, [r4, #8] 800af9c: 6867 ldr r7, [r4, #4] 800af9e: 3f01 subs r7, #1 800afa0: d501 bpl.n 800afa6 <_fwalk_reent+0x22> 800afa2: 6824 ldr r4, [r4, #0] 800afa4: e7f5 b.n 800af92 <_fwalk_reent+0xe> 800afa6: 89ab ldrh r3, [r5, #12] 800afa8: 2b01 cmp r3, #1 800afaa: d907 bls.n 800afbc <_fwalk_reent+0x38> 800afac: f9b5 300e ldrsh.w r3, [r5, #14] 800afb0: 3301 adds r3, #1 800afb2: d003 beq.n 800afbc <_fwalk_reent+0x38> 800afb4: 4629 mov r1, r5 800afb6: 4640 mov r0, r8 800afb8: 47c8 blx r9 800afba: 4306 orrs r6, r0 800afbc: 3568 adds r5, #104 ; 0x68 800afbe: e7ee b.n 800af9e <_fwalk_reent+0x1a> 0800afc0 <_localeconv_r>: 800afc0: 4b04 ldr r3, [pc, #16] ; (800afd4 <_localeconv_r+0x14>) 800afc2: 681b ldr r3, [r3, #0] 800afc4: 6a18 ldr r0, [r3, #32] 800afc6: 4b04 ldr r3, [pc, #16] ; (800afd8 <_localeconv_r+0x18>) 800afc8: 2800 cmp r0, #0 800afca: bf08 it eq 800afcc: 4618 moveq r0, r3 800afce: 30f0 adds r0, #240 ; 0xf0 800afd0: 4770 bx lr 800afd2: bf00 nop 800afd4: 2000024c .word 0x2000024c 800afd8: 200002b0 .word 0x200002b0 0800afdc <__swhatbuf_r>: 800afdc: b570 push {r4, r5, r6, lr} 800afde: 460e mov r6, r1 800afe0: f9b1 100e ldrsh.w r1, [r1, #14] 800afe4: b090 sub sp, #64 ; 0x40 800afe6: 2900 cmp r1, #0 800afe8: 4614 mov r4, r2 800afea: 461d mov r5, r3 800afec: da07 bge.n 800affe <__swhatbuf_r+0x22> 800afee: 2300 movs r3, #0 800aff0: 602b str r3, [r5, #0] 800aff2: 89b3 ldrh r3, [r6, #12] 800aff4: 061a lsls r2, r3, #24 800aff6: d410 bmi.n 800b01a <__swhatbuf_r+0x3e> 800aff8: f44f 6380 mov.w r3, #1024 ; 0x400 800affc: e00e b.n 800b01c <__swhatbuf_r+0x40> 800affe: aa01 add r2, sp, #4 800b000: f000 fda4 bl 800bb4c <_fstat_r> 800b004: 2800 cmp r0, #0 800b006: dbf2 blt.n 800afee <__swhatbuf_r+0x12> 800b008: 9a02 ldr r2, [sp, #8] 800b00a: f402 4270 and.w r2, r2, #61440 ; 0xf000 800b00e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 800b012: 425a negs r2, r3 800b014: 415a adcs r2, r3 800b016: 602a str r2, [r5, #0] 800b018: e7ee b.n 800aff8 <__swhatbuf_r+0x1c> 800b01a: 2340 movs r3, #64 ; 0x40 800b01c: 2000 movs r0, #0 800b01e: 6023 str r3, [r4, #0] 800b020: b010 add sp, #64 ; 0x40 800b022: bd70 pop {r4, r5, r6, pc} 0800b024 <__smakebuf_r>: 800b024: 898b ldrh r3, [r1, #12] 800b026: b573 push {r0, r1, r4, r5, r6, lr} 800b028: 079d lsls r5, r3, #30 800b02a: 4606 mov r6, r0 800b02c: 460c mov r4, r1 800b02e: d507 bpl.n 800b040 <__smakebuf_r+0x1c> 800b030: f104 0347 add.w r3, r4, #71 ; 0x47 800b034: 6023 str r3, [r4, #0] 800b036: 6123 str r3, [r4, #16] 800b038: 2301 movs r3, #1 800b03a: 6163 str r3, [r4, #20] 800b03c: b002 add sp, #8 800b03e: bd70 pop {r4, r5, r6, pc} 800b040: ab01 add r3, sp, #4 800b042: 466a mov r2, sp 800b044: f7ff ffca bl 800afdc <__swhatbuf_r> 800b048: 9900 ldr r1, [sp, #0] 800b04a: 4605 mov r5, r0 800b04c: 4630 mov r0, r6 800b04e: f000 fb6b bl 800b728 <_malloc_r> 800b052: b948 cbnz r0, 800b068 <__smakebuf_r+0x44> 800b054: f9b4 300c ldrsh.w r3, [r4, #12] 800b058: 059a lsls r2, r3, #22 800b05a: d4ef bmi.n 800b03c <__smakebuf_r+0x18> 800b05c: f023 0303 bic.w r3, r3, #3 800b060: f043 0302 orr.w r3, r3, #2 800b064: 81a3 strh r3, [r4, #12] 800b066: e7e3 b.n 800b030 <__smakebuf_r+0xc> 800b068: 4b0d ldr r3, [pc, #52] ; (800b0a0 <__smakebuf_r+0x7c>) 800b06a: 62b3 str r3, [r6, #40] ; 0x28 800b06c: 89a3 ldrh r3, [r4, #12] 800b06e: 6020 str r0, [r4, #0] 800b070: f043 0380 orr.w r3, r3, #128 ; 0x80 800b074: 81a3 strh r3, [r4, #12] 800b076: 9b00 ldr r3, [sp, #0] 800b078: 6120 str r0, [r4, #16] 800b07a: 6163 str r3, [r4, #20] 800b07c: 9b01 ldr r3, [sp, #4] 800b07e: b15b cbz r3, 800b098 <__smakebuf_r+0x74> 800b080: f9b4 100e ldrsh.w r1, [r4, #14] 800b084: 4630 mov r0, r6 800b086: f000 fd73 bl 800bb70 <_isatty_r> 800b08a: b128 cbz r0, 800b098 <__smakebuf_r+0x74> 800b08c: 89a3 ldrh r3, [r4, #12] 800b08e: f023 0303 bic.w r3, r3, #3 800b092: f043 0301 orr.w r3, r3, #1 800b096: 81a3 strh r3, [r4, #12] 800b098: 89a3 ldrh r3, [r4, #12] 800b09a: 431d orrs r5, r3 800b09c: 81a5 strh r5, [r4, #12] 800b09e: e7cd b.n 800b03c <__smakebuf_r+0x18> 800b0a0: 0800ae2d .word 0x0800ae2d 0800b0a4 : 800b0a4: 4b02 ldr r3, [pc, #8] ; (800b0b0 ) 800b0a6: 4601 mov r1, r0 800b0a8: 6818 ldr r0, [r3, #0] 800b0aa: f000 bb3d b.w 800b728 <_malloc_r> 800b0ae: bf00 nop 800b0b0: 2000024c .word 0x2000024c 0800b0b4 : 800b0b4: b510 push {r4, lr} 800b0b6: b2c9 uxtb r1, r1 800b0b8: 4402 add r2, r0 800b0ba: 4290 cmp r0, r2 800b0bc: 4603 mov r3, r0 800b0be: d101 bne.n 800b0c4 800b0c0: 2000 movs r0, #0 800b0c2: bd10 pop {r4, pc} 800b0c4: 781c ldrb r4, [r3, #0] 800b0c6: 3001 adds r0, #1 800b0c8: 428c cmp r4, r1 800b0ca: d1f6 bne.n 800b0ba 800b0cc: 4618 mov r0, r3 800b0ce: bd10 pop {r4, pc} 0800b0d0 <_Balloc>: 800b0d0: b570 push {r4, r5, r6, lr} 800b0d2: 6a45 ldr r5, [r0, #36] ; 0x24 800b0d4: 4604 mov r4, r0 800b0d6: 460e mov r6, r1 800b0d8: b93d cbnz r5, 800b0ea <_Balloc+0x1a> 800b0da: 2010 movs r0, #16 800b0dc: f7ff ffe2 bl 800b0a4 800b0e0: 6260 str r0, [r4, #36] ; 0x24 800b0e2: 6045 str r5, [r0, #4] 800b0e4: 6085 str r5, [r0, #8] 800b0e6: 6005 str r5, [r0, #0] 800b0e8: 60c5 str r5, [r0, #12] 800b0ea: 6a65 ldr r5, [r4, #36] ; 0x24 800b0ec: 68eb ldr r3, [r5, #12] 800b0ee: b183 cbz r3, 800b112 <_Balloc+0x42> 800b0f0: 6a63 ldr r3, [r4, #36] ; 0x24 800b0f2: 68db ldr r3, [r3, #12] 800b0f4: f853 0026 ldr.w r0, [r3, r6, lsl #2] 800b0f8: b9b8 cbnz r0, 800b12a <_Balloc+0x5a> 800b0fa: 2101 movs r1, #1 800b0fc: fa01 f506 lsl.w r5, r1, r6 800b100: 1d6a adds r2, r5, #5 800b102: 0092 lsls r2, r2, #2 800b104: 4620 mov r0, r4 800b106: f000 fab4 bl 800b672 <_calloc_r> 800b10a: b160 cbz r0, 800b126 <_Balloc+0x56> 800b10c: 6046 str r6, [r0, #4] 800b10e: 6085 str r5, [r0, #8] 800b110: e00e b.n 800b130 <_Balloc+0x60> 800b112: 2221 movs r2, #33 ; 0x21 800b114: 2104 movs r1, #4 800b116: 4620 mov r0, r4 800b118: f000 faab bl 800b672 <_calloc_r> 800b11c: 6a63 ldr r3, [r4, #36] ; 0x24 800b11e: 60e8 str r0, [r5, #12] 800b120: 68db ldr r3, [r3, #12] 800b122: 2b00 cmp r3, #0 800b124: d1e4 bne.n 800b0f0 <_Balloc+0x20> 800b126: 2000 movs r0, #0 800b128: bd70 pop {r4, r5, r6, pc} 800b12a: 6802 ldr r2, [r0, #0] 800b12c: f843 2026 str.w r2, [r3, r6, lsl #2] 800b130: 2300 movs r3, #0 800b132: 6103 str r3, [r0, #16] 800b134: 60c3 str r3, [r0, #12] 800b136: bd70 pop {r4, r5, r6, pc} 0800b138 <_Bfree>: 800b138: b570 push {r4, r5, r6, lr} 800b13a: 6a44 ldr r4, [r0, #36] ; 0x24 800b13c: 4606 mov r6, r0 800b13e: 460d mov r5, r1 800b140: b93c cbnz r4, 800b152 <_Bfree+0x1a> 800b142: 2010 movs r0, #16 800b144: f7ff ffae bl 800b0a4 800b148: 6270 str r0, [r6, #36] ; 0x24 800b14a: 6044 str r4, [r0, #4] 800b14c: 6084 str r4, [r0, #8] 800b14e: 6004 str r4, [r0, #0] 800b150: 60c4 str r4, [r0, #12] 800b152: b13d cbz r5, 800b164 <_Bfree+0x2c> 800b154: 6a73 ldr r3, [r6, #36] ; 0x24 800b156: 686a ldr r2, [r5, #4] 800b158: 68db ldr r3, [r3, #12] 800b15a: f853 1022 ldr.w r1, [r3, r2, lsl #2] 800b15e: 6029 str r1, [r5, #0] 800b160: f843 5022 str.w r5, [r3, r2, lsl #2] 800b164: bd70 pop {r4, r5, r6, pc} 0800b166 <__multadd>: 800b166: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800b16a: 461f mov r7, r3 800b16c: 4606 mov r6, r0 800b16e: 460c mov r4, r1 800b170: 2300 movs r3, #0 800b172: 690d ldr r5, [r1, #16] 800b174: f101 0e14 add.w lr, r1, #20 800b178: f8de 0000 ldr.w r0, [lr] 800b17c: 3301 adds r3, #1 800b17e: b281 uxth r1, r0 800b180: fb02 7101 mla r1, r2, r1, r7 800b184: 0c00 lsrs r0, r0, #16 800b186: 0c0f lsrs r7, r1, #16 800b188: fb02 7000 mla r0, r2, r0, r7 800b18c: b289 uxth r1, r1 800b18e: eb01 4100 add.w r1, r1, r0, lsl #16 800b192: 429d cmp r5, r3 800b194: ea4f 4710 mov.w r7, r0, lsr #16 800b198: f84e 1b04 str.w r1, [lr], #4 800b19c: dcec bgt.n 800b178 <__multadd+0x12> 800b19e: b1d7 cbz r7, 800b1d6 <__multadd+0x70> 800b1a0: 68a3 ldr r3, [r4, #8] 800b1a2: 429d cmp r5, r3 800b1a4: db12 blt.n 800b1cc <__multadd+0x66> 800b1a6: 6861 ldr r1, [r4, #4] 800b1a8: 4630 mov r0, r6 800b1aa: 3101 adds r1, #1 800b1ac: f7ff ff90 bl 800b0d0 <_Balloc> 800b1b0: 4680 mov r8, r0 800b1b2: 6922 ldr r2, [r4, #16] 800b1b4: f104 010c add.w r1, r4, #12 800b1b8: 3202 adds r2, #2 800b1ba: 0092 lsls r2, r2, #2 800b1bc: 300c adds r0, #12 800b1be: f7fe f8bd bl 800933c 800b1c2: 4621 mov r1, r4 800b1c4: 4630 mov r0, r6 800b1c6: f7ff ffb7 bl 800b138 <_Bfree> 800b1ca: 4644 mov r4, r8 800b1cc: eb04 0385 add.w r3, r4, r5, lsl #2 800b1d0: 3501 adds r5, #1 800b1d2: 615f str r7, [r3, #20] 800b1d4: 6125 str r5, [r4, #16] 800b1d6: 4620 mov r0, r4 800b1d8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 0800b1dc <__hi0bits>: 800b1dc: 0c02 lsrs r2, r0, #16 800b1de: 0412 lsls r2, r2, #16 800b1e0: 4603 mov r3, r0 800b1e2: b9b2 cbnz r2, 800b212 <__hi0bits+0x36> 800b1e4: 0403 lsls r3, r0, #16 800b1e6: 2010 movs r0, #16 800b1e8: f013 4f7f tst.w r3, #4278190080 ; 0xff000000 800b1ec: bf04 itt eq 800b1ee: 021b lsleq r3, r3, #8 800b1f0: 3008 addeq r0, #8 800b1f2: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000 800b1f6: bf04 itt eq 800b1f8: 011b lsleq r3, r3, #4 800b1fa: 3004 addeq r0, #4 800b1fc: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000 800b200: bf04 itt eq 800b202: 009b lsleq r3, r3, #2 800b204: 3002 addeq r0, #2 800b206: 2b00 cmp r3, #0 800b208: db06 blt.n 800b218 <__hi0bits+0x3c> 800b20a: 005b lsls r3, r3, #1 800b20c: d503 bpl.n 800b216 <__hi0bits+0x3a> 800b20e: 3001 adds r0, #1 800b210: 4770 bx lr 800b212: 2000 movs r0, #0 800b214: e7e8 b.n 800b1e8 <__hi0bits+0xc> 800b216: 2020 movs r0, #32 800b218: 4770 bx lr 0800b21a <__lo0bits>: 800b21a: 6803 ldr r3, [r0, #0] 800b21c: 4601 mov r1, r0 800b21e: f013 0207 ands.w r2, r3, #7 800b222: d00b beq.n 800b23c <__lo0bits+0x22> 800b224: 07da lsls r2, r3, #31 800b226: d423 bmi.n 800b270 <__lo0bits+0x56> 800b228: 0798 lsls r0, r3, #30 800b22a: bf49 itett mi 800b22c: 085b lsrmi r3, r3, #1 800b22e: 089b lsrpl r3, r3, #2 800b230: 2001 movmi r0, #1 800b232: 600b strmi r3, [r1, #0] 800b234: bf5c itt pl 800b236: 600b strpl r3, [r1, #0] 800b238: 2002 movpl r0, #2 800b23a: 4770 bx lr 800b23c: b298 uxth r0, r3 800b23e: b9a8 cbnz r0, 800b26c <__lo0bits+0x52> 800b240: 2010 movs r0, #16 800b242: 0c1b lsrs r3, r3, #16 800b244: f013 0fff tst.w r3, #255 ; 0xff 800b248: bf04 itt eq 800b24a: 0a1b lsreq r3, r3, #8 800b24c: 3008 addeq r0, #8 800b24e: 071a lsls r2, r3, #28 800b250: bf04 itt eq 800b252: 091b lsreq r3, r3, #4 800b254: 3004 addeq r0, #4 800b256: 079a lsls r2, r3, #30 800b258: bf04 itt eq 800b25a: 089b lsreq r3, r3, #2 800b25c: 3002 addeq r0, #2 800b25e: 07da lsls r2, r3, #31 800b260: d402 bmi.n 800b268 <__lo0bits+0x4e> 800b262: 085b lsrs r3, r3, #1 800b264: d006 beq.n 800b274 <__lo0bits+0x5a> 800b266: 3001 adds r0, #1 800b268: 600b str r3, [r1, #0] 800b26a: 4770 bx lr 800b26c: 4610 mov r0, r2 800b26e: e7e9 b.n 800b244 <__lo0bits+0x2a> 800b270: 2000 movs r0, #0 800b272: 4770 bx lr 800b274: 2020 movs r0, #32 800b276: 4770 bx lr 0800b278 <__i2b>: 800b278: b510 push {r4, lr} 800b27a: 460c mov r4, r1 800b27c: 2101 movs r1, #1 800b27e: f7ff ff27 bl 800b0d0 <_Balloc> 800b282: 2201 movs r2, #1 800b284: 6144 str r4, [r0, #20] 800b286: 6102 str r2, [r0, #16] 800b288: bd10 pop {r4, pc} 0800b28a <__multiply>: 800b28a: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b28e: 4614 mov r4, r2 800b290: 690a ldr r2, [r1, #16] 800b292: 6923 ldr r3, [r4, #16] 800b294: 4689 mov r9, r1 800b296: 429a cmp r2, r3 800b298: bfbe ittt lt 800b29a: 460b movlt r3, r1 800b29c: 46a1 movlt r9, r4 800b29e: 461c movlt r4, r3 800b2a0: f8d9 7010 ldr.w r7, [r9, #16] 800b2a4: f8d4 a010 ldr.w sl, [r4, #16] 800b2a8: f8d9 3008 ldr.w r3, [r9, #8] 800b2ac: f8d9 1004 ldr.w r1, [r9, #4] 800b2b0: eb07 060a add.w r6, r7, sl 800b2b4: 429e cmp r6, r3 800b2b6: bfc8 it gt 800b2b8: 3101 addgt r1, #1 800b2ba: f7ff ff09 bl 800b0d0 <_Balloc> 800b2be: f100 0514 add.w r5, r0, #20 800b2c2: 462b mov r3, r5 800b2c4: 2200 movs r2, #0 800b2c6: eb05 0886 add.w r8, r5, r6, lsl #2 800b2ca: 4543 cmp r3, r8 800b2cc: d316 bcc.n 800b2fc <__multiply+0x72> 800b2ce: f104 0214 add.w r2, r4, #20 800b2d2: f109 0114 add.w r1, r9, #20 800b2d6: eb02 038a add.w r3, r2, sl, lsl #2 800b2da: eb01 0787 add.w r7, r1, r7, lsl #2 800b2de: 9301 str r3, [sp, #4] 800b2e0: 9c01 ldr r4, [sp, #4] 800b2e2: 4613 mov r3, r2 800b2e4: 4294 cmp r4, r2 800b2e6: d80c bhi.n 800b302 <__multiply+0x78> 800b2e8: 2e00 cmp r6, #0 800b2ea: dd03 ble.n 800b2f4 <__multiply+0x6a> 800b2ec: f858 3d04 ldr.w r3, [r8, #-4]! 800b2f0: 2b00 cmp r3, #0 800b2f2: d054 beq.n 800b39e <__multiply+0x114> 800b2f4: 6106 str r6, [r0, #16] 800b2f6: b003 add sp, #12 800b2f8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b2fc: f843 2b04 str.w r2, [r3], #4 800b300: e7e3 b.n 800b2ca <__multiply+0x40> 800b302: f8b3 a000 ldrh.w sl, [r3] 800b306: 3204 adds r2, #4 800b308: f1ba 0f00 cmp.w sl, #0 800b30c: d020 beq.n 800b350 <__multiply+0xc6> 800b30e: 46ae mov lr, r5 800b310: 4689 mov r9, r1 800b312: f04f 0c00 mov.w ip, #0 800b316: f859 4b04 ldr.w r4, [r9], #4 800b31a: f8be b000 ldrh.w fp, [lr] 800b31e: b2a3 uxth r3, r4 800b320: fb0a b303 mla r3, sl, r3, fp 800b324: ea4f 4b14 mov.w fp, r4, lsr #16 800b328: f8de 4000 ldr.w r4, [lr] 800b32c: 4463 add r3, ip 800b32e: ea4f 4c14 mov.w ip, r4, lsr #16 800b332: fb0a c40b mla r4, sl, fp, ip 800b336: eb04 4413 add.w r4, r4, r3, lsr #16 800b33a: b29b uxth r3, r3 800b33c: ea43 4304 orr.w r3, r3, r4, lsl #16 800b340: 454f cmp r7, r9 800b342: ea4f 4c14 mov.w ip, r4, lsr #16 800b346: f84e 3b04 str.w r3, [lr], #4 800b34a: d8e4 bhi.n 800b316 <__multiply+0x8c> 800b34c: f8ce c000 str.w ip, [lr] 800b350: f832 9c02 ldrh.w r9, [r2, #-2] 800b354: f1b9 0f00 cmp.w r9, #0 800b358: d01f beq.n 800b39a <__multiply+0x110> 800b35a: 46ae mov lr, r5 800b35c: 468c mov ip, r1 800b35e: f04f 0a00 mov.w sl, #0 800b362: 682b ldr r3, [r5, #0] 800b364: f8bc 4000 ldrh.w r4, [ip] 800b368: f8be b002 ldrh.w fp, [lr, #2] 800b36c: b29b uxth r3, r3 800b36e: fb09 b404 mla r4, r9, r4, fp 800b372: 44a2 add sl, r4 800b374: ea43 430a orr.w r3, r3, sl, lsl #16 800b378: f84e 3b04 str.w r3, [lr], #4 800b37c: f85c 3b04 ldr.w r3, [ip], #4 800b380: f8be 4000 ldrh.w r4, [lr] 800b384: 0c1b lsrs r3, r3, #16 800b386: fb09 4303 mla r3, r9, r3, r4 800b38a: 4567 cmp r7, ip 800b38c: eb03 431a add.w r3, r3, sl, lsr #16 800b390: ea4f 4a13 mov.w sl, r3, lsr #16 800b394: d8e6 bhi.n 800b364 <__multiply+0xda> 800b396: f8ce 3000 str.w r3, [lr] 800b39a: 3504 adds r5, #4 800b39c: e7a0 b.n 800b2e0 <__multiply+0x56> 800b39e: 3e01 subs r6, #1 800b3a0: e7a2 b.n 800b2e8 <__multiply+0x5e> ... 0800b3a4 <__pow5mult>: 800b3a4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800b3a8: 4615 mov r5, r2 800b3aa: f012 0203 ands.w r2, r2, #3 800b3ae: 4606 mov r6, r0 800b3b0: 460f mov r7, r1 800b3b2: d007 beq.n 800b3c4 <__pow5mult+0x20> 800b3b4: 4c21 ldr r4, [pc, #132] ; (800b43c <__pow5mult+0x98>) 800b3b6: 3a01 subs r2, #1 800b3b8: 2300 movs r3, #0 800b3ba: f854 2022 ldr.w r2, [r4, r2, lsl #2] 800b3be: f7ff fed2 bl 800b166 <__multadd> 800b3c2: 4607 mov r7, r0 800b3c4: 10ad asrs r5, r5, #2 800b3c6: d035 beq.n 800b434 <__pow5mult+0x90> 800b3c8: 6a74 ldr r4, [r6, #36] ; 0x24 800b3ca: b93c cbnz r4, 800b3dc <__pow5mult+0x38> 800b3cc: 2010 movs r0, #16 800b3ce: f7ff fe69 bl 800b0a4 800b3d2: 6270 str r0, [r6, #36] ; 0x24 800b3d4: 6044 str r4, [r0, #4] 800b3d6: 6084 str r4, [r0, #8] 800b3d8: 6004 str r4, [r0, #0] 800b3da: 60c4 str r4, [r0, #12] 800b3dc: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24 800b3e0: f8d8 4008 ldr.w r4, [r8, #8] 800b3e4: b94c cbnz r4, 800b3fa <__pow5mult+0x56> 800b3e6: f240 2171 movw r1, #625 ; 0x271 800b3ea: 4630 mov r0, r6 800b3ec: f7ff ff44 bl 800b278 <__i2b> 800b3f0: 2300 movs r3, #0 800b3f2: 4604 mov r4, r0 800b3f4: f8c8 0008 str.w r0, [r8, #8] 800b3f8: 6003 str r3, [r0, #0] 800b3fa: f04f 0800 mov.w r8, #0 800b3fe: 07eb lsls r3, r5, #31 800b400: d50a bpl.n 800b418 <__pow5mult+0x74> 800b402: 4639 mov r1, r7 800b404: 4622 mov r2, r4 800b406: 4630 mov r0, r6 800b408: f7ff ff3f bl 800b28a <__multiply> 800b40c: 4681 mov r9, r0 800b40e: 4639 mov r1, r7 800b410: 4630 mov r0, r6 800b412: f7ff fe91 bl 800b138 <_Bfree> 800b416: 464f mov r7, r9 800b418: 106d asrs r5, r5, #1 800b41a: d00b beq.n 800b434 <__pow5mult+0x90> 800b41c: 6820 ldr r0, [r4, #0] 800b41e: b938 cbnz r0, 800b430 <__pow5mult+0x8c> 800b420: 4622 mov r2, r4 800b422: 4621 mov r1, r4 800b424: 4630 mov r0, r6 800b426: f7ff ff30 bl 800b28a <__multiply> 800b42a: 6020 str r0, [r4, #0] 800b42c: f8c0 8000 str.w r8, [r0] 800b430: 4604 mov r4, r0 800b432: e7e4 b.n 800b3fe <__pow5mult+0x5a> 800b434: 4638 mov r0, r7 800b436: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800b43a: bf00 nop 800b43c: 0800beb8 .word 0x0800beb8 0800b440 <__lshift>: 800b440: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b444: 460c mov r4, r1 800b446: 4607 mov r7, r0 800b448: 4616 mov r6, r2 800b44a: 6923 ldr r3, [r4, #16] 800b44c: ea4f 1a62 mov.w sl, r2, asr #5 800b450: eb0a 0903 add.w r9, sl, r3 800b454: 6849 ldr r1, [r1, #4] 800b456: 68a3 ldr r3, [r4, #8] 800b458: f109 0501 add.w r5, r9, #1 800b45c: 42ab cmp r3, r5 800b45e: db31 blt.n 800b4c4 <__lshift+0x84> 800b460: 4638 mov r0, r7 800b462: f7ff fe35 bl 800b0d0 <_Balloc> 800b466: 2200 movs r2, #0 800b468: 4680 mov r8, r0 800b46a: 4611 mov r1, r2 800b46c: f100 0314 add.w r3, r0, #20 800b470: 4552 cmp r2, sl 800b472: db2a blt.n 800b4ca <__lshift+0x8a> 800b474: 6920 ldr r0, [r4, #16] 800b476: ea2a 7aea bic.w sl, sl, sl, asr #31 800b47a: f104 0114 add.w r1, r4, #20 800b47e: f016 021f ands.w r2, r6, #31 800b482: eb03 038a add.w r3, r3, sl, lsl #2 800b486: eb01 0e80 add.w lr, r1, r0, lsl #2 800b48a: d022 beq.n 800b4d2 <__lshift+0x92> 800b48c: 2000 movs r0, #0 800b48e: f1c2 0c20 rsb ip, r2, #32 800b492: 680e ldr r6, [r1, #0] 800b494: 4096 lsls r6, r2 800b496: 4330 orrs r0, r6 800b498: f843 0b04 str.w r0, [r3], #4 800b49c: f851 0b04 ldr.w r0, [r1], #4 800b4a0: 458e cmp lr, r1 800b4a2: fa20 f00c lsr.w r0, r0, ip 800b4a6: d8f4 bhi.n 800b492 <__lshift+0x52> 800b4a8: 6018 str r0, [r3, #0] 800b4aa: b108 cbz r0, 800b4b0 <__lshift+0x70> 800b4ac: f109 0502 add.w r5, r9, #2 800b4b0: 3d01 subs r5, #1 800b4b2: 4638 mov r0, r7 800b4b4: f8c8 5010 str.w r5, [r8, #16] 800b4b8: 4621 mov r1, r4 800b4ba: f7ff fe3d bl 800b138 <_Bfree> 800b4be: 4640 mov r0, r8 800b4c0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b4c4: 3101 adds r1, #1 800b4c6: 005b lsls r3, r3, #1 800b4c8: e7c8 b.n 800b45c <__lshift+0x1c> 800b4ca: f843 1022 str.w r1, [r3, r2, lsl #2] 800b4ce: 3201 adds r2, #1 800b4d0: e7ce b.n 800b470 <__lshift+0x30> 800b4d2: 3b04 subs r3, #4 800b4d4: f851 2b04 ldr.w r2, [r1], #4 800b4d8: 458e cmp lr, r1 800b4da: f843 2f04 str.w r2, [r3, #4]! 800b4de: d8f9 bhi.n 800b4d4 <__lshift+0x94> 800b4e0: e7e6 b.n 800b4b0 <__lshift+0x70> 0800b4e2 <__mcmp>: 800b4e2: 6903 ldr r3, [r0, #16] 800b4e4: 690a ldr r2, [r1, #16] 800b4e6: b530 push {r4, r5, lr} 800b4e8: 1a9b subs r3, r3, r2 800b4ea: d10c bne.n 800b506 <__mcmp+0x24> 800b4ec: 0092 lsls r2, r2, #2 800b4ee: 3014 adds r0, #20 800b4f0: 3114 adds r1, #20 800b4f2: 1884 adds r4, r0, r2 800b4f4: 4411 add r1, r2 800b4f6: f854 5d04 ldr.w r5, [r4, #-4]! 800b4fa: f851 2d04 ldr.w r2, [r1, #-4]! 800b4fe: 4295 cmp r5, r2 800b500: d003 beq.n 800b50a <__mcmp+0x28> 800b502: d305 bcc.n 800b510 <__mcmp+0x2e> 800b504: 2301 movs r3, #1 800b506: 4618 mov r0, r3 800b508: bd30 pop {r4, r5, pc} 800b50a: 42a0 cmp r0, r4 800b50c: d3f3 bcc.n 800b4f6 <__mcmp+0x14> 800b50e: e7fa b.n 800b506 <__mcmp+0x24> 800b510: f04f 33ff mov.w r3, #4294967295 800b514: e7f7 b.n 800b506 <__mcmp+0x24> 0800b516 <__mdiff>: 800b516: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b51a: 460d mov r5, r1 800b51c: 4607 mov r7, r0 800b51e: 4611 mov r1, r2 800b520: 4628 mov r0, r5 800b522: 4614 mov r4, r2 800b524: f7ff ffdd bl 800b4e2 <__mcmp> 800b528: 1e06 subs r6, r0, #0 800b52a: d108 bne.n 800b53e <__mdiff+0x28> 800b52c: 4631 mov r1, r6 800b52e: 4638 mov r0, r7 800b530: f7ff fdce bl 800b0d0 <_Balloc> 800b534: 2301 movs r3, #1 800b536: 6146 str r6, [r0, #20] 800b538: 6103 str r3, [r0, #16] 800b53a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b53e: bfa4 itt ge 800b540: 4623 movge r3, r4 800b542: 462c movge r4, r5 800b544: 4638 mov r0, r7 800b546: 6861 ldr r1, [r4, #4] 800b548: bfa6 itte ge 800b54a: 461d movge r5, r3 800b54c: 2600 movge r6, #0 800b54e: 2601 movlt r6, #1 800b550: f7ff fdbe bl 800b0d0 <_Balloc> 800b554: f04f 0c00 mov.w ip, #0 800b558: 60c6 str r6, [r0, #12] 800b55a: 692b ldr r3, [r5, #16] 800b55c: 6926 ldr r6, [r4, #16] 800b55e: f104 0214 add.w r2, r4, #20 800b562: f105 0914 add.w r9, r5, #20 800b566: eb02 0786 add.w r7, r2, r6, lsl #2 800b56a: eb09 0883 add.w r8, r9, r3, lsl #2 800b56e: f100 0114 add.w r1, r0, #20 800b572: f852 ab04 ldr.w sl, [r2], #4 800b576: f859 5b04 ldr.w r5, [r9], #4 800b57a: fa1f f38a uxth.w r3, sl 800b57e: 4463 add r3, ip 800b580: b2ac uxth r4, r5 800b582: 1b1b subs r3, r3, r4 800b584: 0c2c lsrs r4, r5, #16 800b586: ebc4 441a rsb r4, r4, sl, lsr #16 800b58a: eb04 4423 add.w r4, r4, r3, asr #16 800b58e: b29b uxth r3, r3 800b590: ea4f 4c24 mov.w ip, r4, asr #16 800b594: 45c8 cmp r8, r9 800b596: ea43 4404 orr.w r4, r3, r4, lsl #16 800b59a: 4696 mov lr, r2 800b59c: f841 4b04 str.w r4, [r1], #4 800b5a0: d8e7 bhi.n 800b572 <__mdiff+0x5c> 800b5a2: 45be cmp lr, r7 800b5a4: d305 bcc.n 800b5b2 <__mdiff+0x9c> 800b5a6: f851 3d04 ldr.w r3, [r1, #-4]! 800b5aa: b18b cbz r3, 800b5d0 <__mdiff+0xba> 800b5ac: 6106 str r6, [r0, #16] 800b5ae: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b5b2: f85e 4b04 ldr.w r4, [lr], #4 800b5b6: b2a2 uxth r2, r4 800b5b8: 4462 add r2, ip 800b5ba: 1413 asrs r3, r2, #16 800b5bc: eb03 4314 add.w r3, r3, r4, lsr #16 800b5c0: b292 uxth r2, r2 800b5c2: ea42 4203 orr.w r2, r2, r3, lsl #16 800b5c6: ea4f 4c23 mov.w ip, r3, asr #16 800b5ca: f841 2b04 str.w r2, [r1], #4 800b5ce: e7e8 b.n 800b5a2 <__mdiff+0x8c> 800b5d0: 3e01 subs r6, #1 800b5d2: e7e8 b.n 800b5a6 <__mdiff+0x90> 0800b5d4 <__d2b>: 800b5d4: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} 800b5d8: 461c mov r4, r3 800b5da: 2101 movs r1, #1 800b5dc: 4690 mov r8, r2 800b5de: 9e08 ldr r6, [sp, #32] 800b5e0: 9d09 ldr r5, [sp, #36] ; 0x24 800b5e2: f7ff fd75 bl 800b0d0 <_Balloc> 800b5e6: f3c4 0213 ubfx r2, r4, #0, #20 800b5ea: f3c4 540a ubfx r4, r4, #20, #11 800b5ee: 4607 mov r7, r0 800b5f0: bb34 cbnz r4, 800b640 <__d2b+0x6c> 800b5f2: 9201 str r2, [sp, #4] 800b5f4: f1b8 0f00 cmp.w r8, #0 800b5f8: d027 beq.n 800b64a <__d2b+0x76> 800b5fa: a802 add r0, sp, #8 800b5fc: f840 8d08 str.w r8, [r0, #-8]! 800b600: f7ff fe0b bl 800b21a <__lo0bits> 800b604: 9900 ldr r1, [sp, #0] 800b606: b1f0 cbz r0, 800b646 <__d2b+0x72> 800b608: 9a01 ldr r2, [sp, #4] 800b60a: f1c0 0320 rsb r3, r0, #32 800b60e: fa02 f303 lsl.w r3, r2, r3 800b612: 430b orrs r3, r1 800b614: 40c2 lsrs r2, r0 800b616: 617b str r3, [r7, #20] 800b618: 9201 str r2, [sp, #4] 800b61a: 9b01 ldr r3, [sp, #4] 800b61c: 2b00 cmp r3, #0 800b61e: bf14 ite ne 800b620: 2102 movne r1, #2 800b622: 2101 moveq r1, #1 800b624: 61bb str r3, [r7, #24] 800b626: 6139 str r1, [r7, #16] 800b628: b1c4 cbz r4, 800b65c <__d2b+0x88> 800b62a: f2a4 4433 subw r4, r4, #1075 ; 0x433 800b62e: 4404 add r4, r0 800b630: 6034 str r4, [r6, #0] 800b632: f1c0 0035 rsb r0, r0, #53 ; 0x35 800b636: 6028 str r0, [r5, #0] 800b638: 4638 mov r0, r7 800b63a: b002 add sp, #8 800b63c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800b640: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 800b644: e7d5 b.n 800b5f2 <__d2b+0x1e> 800b646: 6179 str r1, [r7, #20] 800b648: e7e7 b.n 800b61a <__d2b+0x46> 800b64a: a801 add r0, sp, #4 800b64c: f7ff fde5 bl 800b21a <__lo0bits> 800b650: 2101 movs r1, #1 800b652: 9b01 ldr r3, [sp, #4] 800b654: 6139 str r1, [r7, #16] 800b656: 617b str r3, [r7, #20] 800b658: 3020 adds r0, #32 800b65a: e7e5 b.n 800b628 <__d2b+0x54> 800b65c: f2a0 4032 subw r0, r0, #1074 ; 0x432 800b660: eb07 0381 add.w r3, r7, r1, lsl #2 800b664: 6030 str r0, [r6, #0] 800b666: 6918 ldr r0, [r3, #16] 800b668: f7ff fdb8 bl 800b1dc <__hi0bits> 800b66c: ebc0 1041 rsb r0, r0, r1, lsl #5 800b670: e7e1 b.n 800b636 <__d2b+0x62> 0800b672 <_calloc_r>: 800b672: b538 push {r3, r4, r5, lr} 800b674: fb02 f401 mul.w r4, r2, r1 800b678: 4621 mov r1, r4 800b67a: f000 f855 bl 800b728 <_malloc_r> 800b67e: 4605 mov r5, r0 800b680: b118 cbz r0, 800b68a <_calloc_r+0x18> 800b682: 4622 mov r2, r4 800b684: 2100 movs r1, #0 800b686: f7fd fe64 bl 8009352 800b68a: 4628 mov r0, r5 800b68c: bd38 pop {r3, r4, r5, pc} ... 0800b690 <_free_r>: 800b690: b538 push {r3, r4, r5, lr} 800b692: 4605 mov r5, r0 800b694: 2900 cmp r1, #0 800b696: d043 beq.n 800b720 <_free_r+0x90> 800b698: f851 3c04 ldr.w r3, [r1, #-4] 800b69c: 1f0c subs r4, r1, #4 800b69e: 2b00 cmp r3, #0 800b6a0: bfb8 it lt 800b6a2: 18e4 addlt r4, r4, r3 800b6a4: f000 fa98 bl 800bbd8 <__malloc_lock> 800b6a8: 4a1e ldr r2, [pc, #120] ; (800b724 <_free_r+0x94>) 800b6aa: 6813 ldr r3, [r2, #0] 800b6ac: 4610 mov r0, r2 800b6ae: b933 cbnz r3, 800b6be <_free_r+0x2e> 800b6b0: 6063 str r3, [r4, #4] 800b6b2: 6014 str r4, [r2, #0] 800b6b4: 4628 mov r0, r5 800b6b6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800b6ba: f000 ba8e b.w 800bbda <__malloc_unlock> 800b6be: 42a3 cmp r3, r4 800b6c0: d90b bls.n 800b6da <_free_r+0x4a> 800b6c2: 6821 ldr r1, [r4, #0] 800b6c4: 1862 adds r2, r4, r1 800b6c6: 4293 cmp r3, r2 800b6c8: bf01 itttt eq 800b6ca: 681a ldreq r2, [r3, #0] 800b6cc: 685b ldreq r3, [r3, #4] 800b6ce: 1852 addeq r2, r2, r1 800b6d0: 6022 streq r2, [r4, #0] 800b6d2: 6063 str r3, [r4, #4] 800b6d4: 6004 str r4, [r0, #0] 800b6d6: e7ed b.n 800b6b4 <_free_r+0x24> 800b6d8: 4613 mov r3, r2 800b6da: 685a ldr r2, [r3, #4] 800b6dc: b10a cbz r2, 800b6e2 <_free_r+0x52> 800b6de: 42a2 cmp r2, r4 800b6e0: d9fa bls.n 800b6d8 <_free_r+0x48> 800b6e2: 6819 ldr r1, [r3, #0] 800b6e4: 1858 adds r0, r3, r1 800b6e6: 42a0 cmp r0, r4 800b6e8: d10b bne.n 800b702 <_free_r+0x72> 800b6ea: 6820 ldr r0, [r4, #0] 800b6ec: 4401 add r1, r0 800b6ee: 1858 adds r0, r3, r1 800b6f0: 4282 cmp r2, r0 800b6f2: 6019 str r1, [r3, #0] 800b6f4: d1de bne.n 800b6b4 <_free_r+0x24> 800b6f6: 6810 ldr r0, [r2, #0] 800b6f8: 6852 ldr r2, [r2, #4] 800b6fa: 4401 add r1, r0 800b6fc: 6019 str r1, [r3, #0] 800b6fe: 605a str r2, [r3, #4] 800b700: e7d8 b.n 800b6b4 <_free_r+0x24> 800b702: d902 bls.n 800b70a <_free_r+0x7a> 800b704: 230c movs r3, #12 800b706: 602b str r3, [r5, #0] 800b708: e7d4 b.n 800b6b4 <_free_r+0x24> 800b70a: 6820 ldr r0, [r4, #0] 800b70c: 1821 adds r1, r4, r0 800b70e: 428a cmp r2, r1 800b710: bf01 itttt eq 800b712: 6811 ldreq r1, [r2, #0] 800b714: 6852 ldreq r2, [r2, #4] 800b716: 1809 addeq r1, r1, r0 800b718: 6021 streq r1, [r4, #0] 800b71a: 6062 str r2, [r4, #4] 800b71c: 605c str r4, [r3, #4] 800b71e: e7c9 b.n 800b6b4 <_free_r+0x24> 800b720: bd38 pop {r3, r4, r5, pc} 800b722: bf00 nop 800b724: 20000470 .word 0x20000470 0800b728 <_malloc_r>: 800b728: b570 push {r4, r5, r6, lr} 800b72a: 1ccd adds r5, r1, #3 800b72c: f025 0503 bic.w r5, r5, #3 800b730: 3508 adds r5, #8 800b732: 2d0c cmp r5, #12 800b734: bf38 it cc 800b736: 250c movcc r5, #12 800b738: 2d00 cmp r5, #0 800b73a: 4606 mov r6, r0 800b73c: db01 blt.n 800b742 <_malloc_r+0x1a> 800b73e: 42a9 cmp r1, r5 800b740: d903 bls.n 800b74a <_malloc_r+0x22> 800b742: 230c movs r3, #12 800b744: 6033 str r3, [r6, #0] 800b746: 2000 movs r0, #0 800b748: bd70 pop {r4, r5, r6, pc} 800b74a: f000 fa45 bl 800bbd8 <__malloc_lock> 800b74e: 4a23 ldr r2, [pc, #140] ; (800b7dc <_malloc_r+0xb4>) 800b750: 6814 ldr r4, [r2, #0] 800b752: 4621 mov r1, r4 800b754: b991 cbnz r1, 800b77c <_malloc_r+0x54> 800b756: 4c22 ldr r4, [pc, #136] ; (800b7e0 <_malloc_r+0xb8>) 800b758: 6823 ldr r3, [r4, #0] 800b75a: b91b cbnz r3, 800b764 <_malloc_r+0x3c> 800b75c: 4630 mov r0, r6 800b75e: f000 f97f bl 800ba60 <_sbrk_r> 800b762: 6020 str r0, [r4, #0] 800b764: 4629 mov r1, r5 800b766: 4630 mov r0, r6 800b768: f000 f97a bl 800ba60 <_sbrk_r> 800b76c: 1c43 adds r3, r0, #1 800b76e: d126 bne.n 800b7be <_malloc_r+0x96> 800b770: 230c movs r3, #12 800b772: 4630 mov r0, r6 800b774: 6033 str r3, [r6, #0] 800b776: f000 fa30 bl 800bbda <__malloc_unlock> 800b77a: e7e4 b.n 800b746 <_malloc_r+0x1e> 800b77c: 680b ldr r3, [r1, #0] 800b77e: 1b5b subs r3, r3, r5 800b780: d41a bmi.n 800b7b8 <_malloc_r+0x90> 800b782: 2b0b cmp r3, #11 800b784: d90f bls.n 800b7a6 <_malloc_r+0x7e> 800b786: 600b str r3, [r1, #0] 800b788: 18cc adds r4, r1, r3 800b78a: 50cd str r5, [r1, r3] 800b78c: 4630 mov r0, r6 800b78e: f000 fa24 bl 800bbda <__malloc_unlock> 800b792: f104 000b add.w r0, r4, #11 800b796: 1d23 adds r3, r4, #4 800b798: f020 0007 bic.w r0, r0, #7 800b79c: 1ac3 subs r3, r0, r3 800b79e: d01b beq.n 800b7d8 <_malloc_r+0xb0> 800b7a0: 425a negs r2, r3 800b7a2: 50e2 str r2, [r4, r3] 800b7a4: bd70 pop {r4, r5, r6, pc} 800b7a6: 428c cmp r4, r1 800b7a8: bf0b itete eq 800b7aa: 6863 ldreq r3, [r4, #4] 800b7ac: 684b ldrne r3, [r1, #4] 800b7ae: 6013 streq r3, [r2, #0] 800b7b0: 6063 strne r3, [r4, #4] 800b7b2: bf18 it ne 800b7b4: 460c movne r4, r1 800b7b6: e7e9 b.n 800b78c <_malloc_r+0x64> 800b7b8: 460c mov r4, r1 800b7ba: 6849 ldr r1, [r1, #4] 800b7bc: e7ca b.n 800b754 <_malloc_r+0x2c> 800b7be: 1cc4 adds r4, r0, #3 800b7c0: f024 0403 bic.w r4, r4, #3 800b7c4: 42a0 cmp r0, r4 800b7c6: d005 beq.n 800b7d4 <_malloc_r+0xac> 800b7c8: 1a21 subs r1, r4, r0 800b7ca: 4630 mov r0, r6 800b7cc: f000 f948 bl 800ba60 <_sbrk_r> 800b7d0: 3001 adds r0, #1 800b7d2: d0cd beq.n 800b770 <_malloc_r+0x48> 800b7d4: 6025 str r5, [r4, #0] 800b7d6: e7d9 b.n 800b78c <_malloc_r+0x64> 800b7d8: bd70 pop {r4, r5, r6, pc} 800b7da: bf00 nop 800b7dc: 20000470 .word 0x20000470 800b7e0: 20000474 .word 0x20000474 0800b7e4 <__sfputc_r>: 800b7e4: 6893 ldr r3, [r2, #8] 800b7e6: b410 push {r4} 800b7e8: 3b01 subs r3, #1 800b7ea: 2b00 cmp r3, #0 800b7ec: 6093 str r3, [r2, #8] 800b7ee: da08 bge.n 800b802 <__sfputc_r+0x1e> 800b7f0: 6994 ldr r4, [r2, #24] 800b7f2: 42a3 cmp r3, r4 800b7f4: db02 blt.n 800b7fc <__sfputc_r+0x18> 800b7f6: b2cb uxtb r3, r1 800b7f8: 2b0a cmp r3, #10 800b7fa: d102 bne.n 800b802 <__sfputc_r+0x1e> 800b7fc: bc10 pop {r4} 800b7fe: f7fe bb43 b.w 8009e88 <__swbuf_r> 800b802: 6813 ldr r3, [r2, #0] 800b804: 1c58 adds r0, r3, #1 800b806: 6010 str r0, [r2, #0] 800b808: 7019 strb r1, [r3, #0] 800b80a: b2c8 uxtb r0, r1 800b80c: bc10 pop {r4} 800b80e: 4770 bx lr 0800b810 <__sfputs_r>: 800b810: b5f8 push {r3, r4, r5, r6, r7, lr} 800b812: 4606 mov r6, r0 800b814: 460f mov r7, r1 800b816: 4614 mov r4, r2 800b818: 18d5 adds r5, r2, r3 800b81a: 42ac cmp r4, r5 800b81c: d101 bne.n 800b822 <__sfputs_r+0x12> 800b81e: 2000 movs r0, #0 800b820: e007 b.n 800b832 <__sfputs_r+0x22> 800b822: 463a mov r2, r7 800b824: f814 1b01 ldrb.w r1, [r4], #1 800b828: 4630 mov r0, r6 800b82a: f7ff ffdb bl 800b7e4 <__sfputc_r> 800b82e: 1c43 adds r3, r0, #1 800b830: d1f3 bne.n 800b81a <__sfputs_r+0xa> 800b832: bdf8 pop {r3, r4, r5, r6, r7, pc} 0800b834 <_vfiprintf_r>: 800b834: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b838: b09d sub sp, #116 ; 0x74 800b83a: 460c mov r4, r1 800b83c: 4617 mov r7, r2 800b83e: 9303 str r3, [sp, #12] 800b840: 4606 mov r6, r0 800b842: b118 cbz r0, 800b84c <_vfiprintf_r+0x18> 800b844: 6983 ldr r3, [r0, #24] 800b846: b90b cbnz r3, 800b84c <_vfiprintf_r+0x18> 800b848: f7ff fb30 bl 800aeac <__sinit> 800b84c: 4b7c ldr r3, [pc, #496] ; (800ba40 <_vfiprintf_r+0x20c>) 800b84e: 429c cmp r4, r3 800b850: d157 bne.n 800b902 <_vfiprintf_r+0xce> 800b852: 6874 ldr r4, [r6, #4] 800b854: 89a3 ldrh r3, [r4, #12] 800b856: 0718 lsls r0, r3, #28 800b858: d55d bpl.n 800b916 <_vfiprintf_r+0xe2> 800b85a: 6923 ldr r3, [r4, #16] 800b85c: 2b00 cmp r3, #0 800b85e: d05a beq.n 800b916 <_vfiprintf_r+0xe2> 800b860: 2300 movs r3, #0 800b862: 9309 str r3, [sp, #36] ; 0x24 800b864: 2320 movs r3, #32 800b866: f88d 3029 strb.w r3, [sp, #41] ; 0x29 800b86a: 2330 movs r3, #48 ; 0x30 800b86c: f04f 0b01 mov.w fp, #1 800b870: f88d 302a strb.w r3, [sp, #42] ; 0x2a 800b874: 46b8 mov r8, r7 800b876: 4645 mov r5, r8 800b878: f815 3b01 ldrb.w r3, [r5], #1 800b87c: 2b00 cmp r3, #0 800b87e: d155 bne.n 800b92c <_vfiprintf_r+0xf8> 800b880: ebb8 0a07 subs.w sl, r8, r7 800b884: d00b beq.n 800b89e <_vfiprintf_r+0x6a> 800b886: 4653 mov r3, sl 800b888: 463a mov r2, r7 800b88a: 4621 mov r1, r4 800b88c: 4630 mov r0, r6 800b88e: f7ff ffbf bl 800b810 <__sfputs_r> 800b892: 3001 adds r0, #1 800b894: f000 80c4 beq.w 800ba20 <_vfiprintf_r+0x1ec> 800b898: 9b09 ldr r3, [sp, #36] ; 0x24 800b89a: 4453 add r3, sl 800b89c: 9309 str r3, [sp, #36] ; 0x24 800b89e: f898 3000 ldrb.w r3, [r8] 800b8a2: 2b00 cmp r3, #0 800b8a4: f000 80bc beq.w 800ba20 <_vfiprintf_r+0x1ec> 800b8a8: 2300 movs r3, #0 800b8aa: f04f 32ff mov.w r2, #4294967295 800b8ae: 9304 str r3, [sp, #16] 800b8b0: 9307 str r3, [sp, #28] 800b8b2: 9205 str r2, [sp, #20] 800b8b4: 9306 str r3, [sp, #24] 800b8b6: f88d 3053 strb.w r3, [sp, #83] ; 0x53 800b8ba: 931a str r3, [sp, #104] ; 0x68 800b8bc: 2205 movs r2, #5 800b8be: 7829 ldrb r1, [r5, #0] 800b8c0: 4860 ldr r0, [pc, #384] ; (800ba44 <_vfiprintf_r+0x210>) 800b8c2: f7ff fbf7 bl 800b0b4 800b8c6: f105 0801 add.w r8, r5, #1 800b8ca: 9b04 ldr r3, [sp, #16] 800b8cc: 2800 cmp r0, #0 800b8ce: d131 bne.n 800b934 <_vfiprintf_r+0x100> 800b8d0: 06d9 lsls r1, r3, #27 800b8d2: bf44 itt mi 800b8d4: 2220 movmi r2, #32 800b8d6: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800b8da: 071a lsls r2, r3, #28 800b8dc: bf44 itt mi 800b8de: 222b movmi r2, #43 ; 0x2b 800b8e0: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800b8e4: 782a ldrb r2, [r5, #0] 800b8e6: 2a2a cmp r2, #42 ; 0x2a 800b8e8: d02c beq.n 800b944 <_vfiprintf_r+0x110> 800b8ea: 2100 movs r1, #0 800b8ec: 200a movs r0, #10 800b8ee: 9a07 ldr r2, [sp, #28] 800b8f0: 46a8 mov r8, r5 800b8f2: f898 3000 ldrb.w r3, [r8] 800b8f6: 3501 adds r5, #1 800b8f8: 3b30 subs r3, #48 ; 0x30 800b8fa: 2b09 cmp r3, #9 800b8fc: d96d bls.n 800b9da <_vfiprintf_r+0x1a6> 800b8fe: b371 cbz r1, 800b95e <_vfiprintf_r+0x12a> 800b900: e026 b.n 800b950 <_vfiprintf_r+0x11c> 800b902: 4b51 ldr r3, [pc, #324] ; (800ba48 <_vfiprintf_r+0x214>) 800b904: 429c cmp r4, r3 800b906: d101 bne.n 800b90c <_vfiprintf_r+0xd8> 800b908: 68b4 ldr r4, [r6, #8] 800b90a: e7a3 b.n 800b854 <_vfiprintf_r+0x20> 800b90c: 4b4f ldr r3, [pc, #316] ; (800ba4c <_vfiprintf_r+0x218>) 800b90e: 429c cmp r4, r3 800b910: bf08 it eq 800b912: 68f4 ldreq r4, [r6, #12] 800b914: e79e b.n 800b854 <_vfiprintf_r+0x20> 800b916: 4621 mov r1, r4 800b918: 4630 mov r0, r6 800b91a: f7fe fb07 bl 8009f2c <__swsetup_r> 800b91e: 2800 cmp r0, #0 800b920: d09e beq.n 800b860 <_vfiprintf_r+0x2c> 800b922: f04f 30ff mov.w r0, #4294967295 800b926: b01d add sp, #116 ; 0x74 800b928: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b92c: 2b25 cmp r3, #37 ; 0x25 800b92e: d0a7 beq.n 800b880 <_vfiprintf_r+0x4c> 800b930: 46a8 mov r8, r5 800b932: e7a0 b.n 800b876 <_vfiprintf_r+0x42> 800b934: 4a43 ldr r2, [pc, #268] ; (800ba44 <_vfiprintf_r+0x210>) 800b936: 4645 mov r5, r8 800b938: 1a80 subs r0, r0, r2 800b93a: fa0b f000 lsl.w r0, fp, r0 800b93e: 4318 orrs r0, r3 800b940: 9004 str r0, [sp, #16] 800b942: e7bb b.n 800b8bc <_vfiprintf_r+0x88> 800b944: 9a03 ldr r2, [sp, #12] 800b946: 1d11 adds r1, r2, #4 800b948: 6812 ldr r2, [r2, #0] 800b94a: 9103 str r1, [sp, #12] 800b94c: 2a00 cmp r2, #0 800b94e: db01 blt.n 800b954 <_vfiprintf_r+0x120> 800b950: 9207 str r2, [sp, #28] 800b952: e004 b.n 800b95e <_vfiprintf_r+0x12a> 800b954: 4252 negs r2, r2 800b956: f043 0302 orr.w r3, r3, #2 800b95a: 9207 str r2, [sp, #28] 800b95c: 9304 str r3, [sp, #16] 800b95e: f898 3000 ldrb.w r3, [r8] 800b962: 2b2e cmp r3, #46 ; 0x2e 800b964: d110 bne.n 800b988 <_vfiprintf_r+0x154> 800b966: f898 3001 ldrb.w r3, [r8, #1] 800b96a: f108 0101 add.w r1, r8, #1 800b96e: 2b2a cmp r3, #42 ; 0x2a 800b970: d137 bne.n 800b9e2 <_vfiprintf_r+0x1ae> 800b972: 9b03 ldr r3, [sp, #12] 800b974: f108 0802 add.w r8, r8, #2 800b978: 1d1a adds r2, r3, #4 800b97a: 681b ldr r3, [r3, #0] 800b97c: 9203 str r2, [sp, #12] 800b97e: 2b00 cmp r3, #0 800b980: bfb8 it lt 800b982: f04f 33ff movlt.w r3, #4294967295 800b986: 9305 str r3, [sp, #20] 800b988: 4d31 ldr r5, [pc, #196] ; (800ba50 <_vfiprintf_r+0x21c>) 800b98a: 2203 movs r2, #3 800b98c: f898 1000 ldrb.w r1, [r8] 800b990: 4628 mov r0, r5 800b992: f7ff fb8f bl 800b0b4 800b996: b140 cbz r0, 800b9aa <_vfiprintf_r+0x176> 800b998: 2340 movs r3, #64 ; 0x40 800b99a: 1b40 subs r0, r0, r5 800b99c: fa03 f000 lsl.w r0, r3, r0 800b9a0: 9b04 ldr r3, [sp, #16] 800b9a2: f108 0801 add.w r8, r8, #1 800b9a6: 4303 orrs r3, r0 800b9a8: 9304 str r3, [sp, #16] 800b9aa: f898 1000 ldrb.w r1, [r8] 800b9ae: 2206 movs r2, #6 800b9b0: 4828 ldr r0, [pc, #160] ; (800ba54 <_vfiprintf_r+0x220>) 800b9b2: f108 0701 add.w r7, r8, #1 800b9b6: f88d 1028 strb.w r1, [sp, #40] ; 0x28 800b9ba: f7ff fb7b bl 800b0b4 800b9be: 2800 cmp r0, #0 800b9c0: d034 beq.n 800ba2c <_vfiprintf_r+0x1f8> 800b9c2: 4b25 ldr r3, [pc, #148] ; (800ba58 <_vfiprintf_r+0x224>) 800b9c4: bb03 cbnz r3, 800ba08 <_vfiprintf_r+0x1d4> 800b9c6: 9b03 ldr r3, [sp, #12] 800b9c8: 3307 adds r3, #7 800b9ca: f023 0307 bic.w r3, r3, #7 800b9ce: 3308 adds r3, #8 800b9d0: 9303 str r3, [sp, #12] 800b9d2: 9b09 ldr r3, [sp, #36] ; 0x24 800b9d4: 444b add r3, r9 800b9d6: 9309 str r3, [sp, #36] ; 0x24 800b9d8: e74c b.n 800b874 <_vfiprintf_r+0x40> 800b9da: fb00 3202 mla r2, r0, r2, r3 800b9de: 2101 movs r1, #1 800b9e0: e786 b.n 800b8f0 <_vfiprintf_r+0xbc> 800b9e2: 2300 movs r3, #0 800b9e4: 250a movs r5, #10 800b9e6: 4618 mov r0, r3 800b9e8: 9305 str r3, [sp, #20] 800b9ea: 4688 mov r8, r1 800b9ec: f898 2000 ldrb.w r2, [r8] 800b9f0: 3101 adds r1, #1 800b9f2: 3a30 subs r2, #48 ; 0x30 800b9f4: 2a09 cmp r2, #9 800b9f6: d903 bls.n 800ba00 <_vfiprintf_r+0x1cc> 800b9f8: 2b00 cmp r3, #0 800b9fa: d0c5 beq.n 800b988 <_vfiprintf_r+0x154> 800b9fc: 9005 str r0, [sp, #20] 800b9fe: e7c3 b.n 800b988 <_vfiprintf_r+0x154> 800ba00: fb05 2000 mla r0, r5, r0, r2 800ba04: 2301 movs r3, #1 800ba06: e7f0 b.n 800b9ea <_vfiprintf_r+0x1b6> 800ba08: ab03 add r3, sp, #12 800ba0a: 9300 str r3, [sp, #0] 800ba0c: 4622 mov r2, r4 800ba0e: 4b13 ldr r3, [pc, #76] ; (800ba5c <_vfiprintf_r+0x228>) 800ba10: a904 add r1, sp, #16 800ba12: 4630 mov r0, r6 800ba14: f7fd fd36 bl 8009484 <_printf_float> 800ba18: f1b0 3fff cmp.w r0, #4294967295 800ba1c: 4681 mov r9, r0 800ba1e: d1d8 bne.n 800b9d2 <_vfiprintf_r+0x19e> 800ba20: 89a3 ldrh r3, [r4, #12] 800ba22: 065b lsls r3, r3, #25 800ba24: f53f af7d bmi.w 800b922 <_vfiprintf_r+0xee> 800ba28: 9809 ldr r0, [sp, #36] ; 0x24 800ba2a: e77c b.n 800b926 <_vfiprintf_r+0xf2> 800ba2c: ab03 add r3, sp, #12 800ba2e: 9300 str r3, [sp, #0] 800ba30: 4622 mov r2, r4 800ba32: 4b0a ldr r3, [pc, #40] ; (800ba5c <_vfiprintf_r+0x228>) 800ba34: a904 add r1, sp, #16 800ba36: 4630 mov r0, r6 800ba38: f7fd ffd4 bl 80099e4 <_printf_i> 800ba3c: e7ec b.n 800ba18 <_vfiprintf_r+0x1e4> 800ba3e: bf00 nop 800ba40: 0800bd84 .word 0x0800bd84 800ba44: 0800bec4 .word 0x0800bec4 800ba48: 0800bda4 .word 0x0800bda4 800ba4c: 0800bd64 .word 0x0800bd64 800ba50: 0800beca .word 0x0800beca 800ba54: 0800bece .word 0x0800bece 800ba58: 08009485 .word 0x08009485 800ba5c: 0800b811 .word 0x0800b811 0800ba60 <_sbrk_r>: 800ba60: b538 push {r3, r4, r5, lr} 800ba62: 2300 movs r3, #0 800ba64: 4c05 ldr r4, [pc, #20] ; (800ba7c <_sbrk_r+0x1c>) 800ba66: 4605 mov r5, r0 800ba68: 4608 mov r0, r1 800ba6a: 6023 str r3, [r4, #0] 800ba6c: f7fc fddc bl 8008628 <_sbrk> 800ba70: 1c43 adds r3, r0, #1 800ba72: d102 bne.n 800ba7a <_sbrk_r+0x1a> 800ba74: 6823 ldr r3, [r4, #0] 800ba76: b103 cbz r3, 800ba7a <_sbrk_r+0x1a> 800ba78: 602b str r3, [r5, #0] 800ba7a: bd38 pop {r3, r4, r5, pc} 800ba7c: 200017e0 .word 0x200017e0 0800ba80 <__sread>: 800ba80: b510 push {r4, lr} 800ba82: 460c mov r4, r1 800ba84: f9b1 100e ldrsh.w r1, [r1, #14] 800ba88: f000 f8a8 bl 800bbdc <_read_r> 800ba8c: 2800 cmp r0, #0 800ba8e: bfab itete ge 800ba90: 6d63 ldrge r3, [r4, #84] ; 0x54 800ba92: 89a3 ldrhlt r3, [r4, #12] 800ba94: 181b addge r3, r3, r0 800ba96: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 800ba9a: bfac ite ge 800ba9c: 6563 strge r3, [r4, #84] ; 0x54 800ba9e: 81a3 strhlt r3, [r4, #12] 800baa0: bd10 pop {r4, pc} 0800baa2 <__swrite>: 800baa2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800baa6: 461f mov r7, r3 800baa8: 898b ldrh r3, [r1, #12] 800baaa: 4605 mov r5, r0 800baac: 05db lsls r3, r3, #23 800baae: 460c mov r4, r1 800bab0: 4616 mov r6, r2 800bab2: d505 bpl.n 800bac0 <__swrite+0x1e> 800bab4: 2302 movs r3, #2 800bab6: 2200 movs r2, #0 800bab8: f9b1 100e ldrsh.w r1, [r1, #14] 800babc: f000 f868 bl 800bb90 <_lseek_r> 800bac0: 89a3 ldrh r3, [r4, #12] 800bac2: 4632 mov r2, r6 800bac4: f423 5380 bic.w r3, r3, #4096 ; 0x1000 800bac8: 81a3 strh r3, [r4, #12] 800baca: f9b4 100e ldrsh.w r1, [r4, #14] 800bace: 463b mov r3, r7 800bad0: 4628 mov r0, r5 800bad2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800bad6: f000 b817 b.w 800bb08 <_write_r> 0800bada <__sseek>: 800bada: b510 push {r4, lr} 800badc: 460c mov r4, r1 800bade: f9b1 100e ldrsh.w r1, [r1, #14] 800bae2: f000 f855 bl 800bb90 <_lseek_r> 800bae6: 1c43 adds r3, r0, #1 800bae8: 89a3 ldrh r3, [r4, #12] 800baea: bf15 itete ne 800baec: 6560 strne r0, [r4, #84] ; 0x54 800baee: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800baf2: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800baf6: 81a3 strheq r3, [r4, #12] 800baf8: bf18 it ne 800bafa: 81a3 strhne r3, [r4, #12] 800bafc: bd10 pop {r4, pc} 0800bafe <__sclose>: 800bafe: f9b1 100e ldrsh.w r1, [r1, #14] 800bb02: f000 b813 b.w 800bb2c <_close_r> ... 0800bb08 <_write_r>: 800bb08: b538 push {r3, r4, r5, lr} 800bb0a: 4605 mov r5, r0 800bb0c: 4608 mov r0, r1 800bb0e: 4611 mov r1, r2 800bb10: 2200 movs r2, #0 800bb12: 4c05 ldr r4, [pc, #20] ; (800bb28 <_write_r+0x20>) 800bb14: 6022 str r2, [r4, #0] 800bb16: 461a mov r2, r3 800bb18: f7fc f8ce bl 8007cb8 <_write> 800bb1c: 1c43 adds r3, r0, #1 800bb1e: d102 bne.n 800bb26 <_write_r+0x1e> 800bb20: 6823 ldr r3, [r4, #0] 800bb22: b103 cbz r3, 800bb26 <_write_r+0x1e> 800bb24: 602b str r3, [r5, #0] 800bb26: bd38 pop {r3, r4, r5, pc} 800bb28: 200017e0 .word 0x200017e0 0800bb2c <_close_r>: 800bb2c: b538 push {r3, r4, r5, lr} 800bb2e: 2300 movs r3, #0 800bb30: 4c05 ldr r4, [pc, #20] ; (800bb48 <_close_r+0x1c>) 800bb32: 4605 mov r5, r0 800bb34: 4608 mov r0, r1 800bb36: 6023 str r3, [r4, #0] 800bb38: f7fc fd90 bl 800865c <_close> 800bb3c: 1c43 adds r3, r0, #1 800bb3e: d102 bne.n 800bb46 <_close_r+0x1a> 800bb40: 6823 ldr r3, [r4, #0] 800bb42: b103 cbz r3, 800bb46 <_close_r+0x1a> 800bb44: 602b str r3, [r5, #0] 800bb46: bd38 pop {r3, r4, r5, pc} 800bb48: 200017e0 .word 0x200017e0 0800bb4c <_fstat_r>: 800bb4c: b538 push {r3, r4, r5, lr} 800bb4e: 2300 movs r3, #0 800bb50: 4c06 ldr r4, [pc, #24] ; (800bb6c <_fstat_r+0x20>) 800bb52: 4605 mov r5, r0 800bb54: 4608 mov r0, r1 800bb56: 4611 mov r1, r2 800bb58: 6023 str r3, [r4, #0] 800bb5a: f7fc fd82 bl 8008662 <_fstat> 800bb5e: 1c43 adds r3, r0, #1 800bb60: d102 bne.n 800bb68 <_fstat_r+0x1c> 800bb62: 6823 ldr r3, [r4, #0] 800bb64: b103 cbz r3, 800bb68 <_fstat_r+0x1c> 800bb66: 602b str r3, [r5, #0] 800bb68: bd38 pop {r3, r4, r5, pc} 800bb6a: bf00 nop 800bb6c: 200017e0 .word 0x200017e0 0800bb70 <_isatty_r>: 800bb70: b538 push {r3, r4, r5, lr} 800bb72: 2300 movs r3, #0 800bb74: 4c05 ldr r4, [pc, #20] ; (800bb8c <_isatty_r+0x1c>) 800bb76: 4605 mov r5, r0 800bb78: 4608 mov r0, r1 800bb7a: 6023 str r3, [r4, #0] 800bb7c: f7fc fd76 bl 800866c <_isatty> 800bb80: 1c43 adds r3, r0, #1 800bb82: d102 bne.n 800bb8a <_isatty_r+0x1a> 800bb84: 6823 ldr r3, [r4, #0] 800bb86: b103 cbz r3, 800bb8a <_isatty_r+0x1a> 800bb88: 602b str r3, [r5, #0] 800bb8a: bd38 pop {r3, r4, r5, pc} 800bb8c: 200017e0 .word 0x200017e0 0800bb90 <_lseek_r>: 800bb90: b538 push {r3, r4, r5, lr} 800bb92: 4605 mov r5, r0 800bb94: 4608 mov r0, r1 800bb96: 4611 mov r1, r2 800bb98: 2200 movs r2, #0 800bb9a: 4c05 ldr r4, [pc, #20] ; (800bbb0 <_lseek_r+0x20>) 800bb9c: 6022 str r2, [r4, #0] 800bb9e: 461a mov r2, r3 800bba0: f7fc fd66 bl 8008670 <_lseek> 800bba4: 1c43 adds r3, r0, #1 800bba6: d102 bne.n 800bbae <_lseek_r+0x1e> 800bba8: 6823 ldr r3, [r4, #0] 800bbaa: b103 cbz r3, 800bbae <_lseek_r+0x1e> 800bbac: 602b str r3, [r5, #0] 800bbae: bd38 pop {r3, r4, r5, pc} 800bbb0: 200017e0 .word 0x200017e0 0800bbb4 <__ascii_mbtowc>: 800bbb4: b082 sub sp, #8 800bbb6: b901 cbnz r1, 800bbba <__ascii_mbtowc+0x6> 800bbb8: a901 add r1, sp, #4 800bbba: b142 cbz r2, 800bbce <__ascii_mbtowc+0x1a> 800bbbc: b14b cbz r3, 800bbd2 <__ascii_mbtowc+0x1e> 800bbbe: 7813 ldrb r3, [r2, #0] 800bbc0: 600b str r3, [r1, #0] 800bbc2: 7812 ldrb r2, [r2, #0] 800bbc4: 1c10 adds r0, r2, #0 800bbc6: bf18 it ne 800bbc8: 2001 movne r0, #1 800bbca: b002 add sp, #8 800bbcc: 4770 bx lr 800bbce: 4610 mov r0, r2 800bbd0: e7fb b.n 800bbca <__ascii_mbtowc+0x16> 800bbd2: f06f 0001 mvn.w r0, #1 800bbd6: e7f8 b.n 800bbca <__ascii_mbtowc+0x16> 0800bbd8 <__malloc_lock>: 800bbd8: 4770 bx lr 0800bbda <__malloc_unlock>: 800bbda: 4770 bx lr 0800bbdc <_read_r>: 800bbdc: b538 push {r3, r4, r5, lr} 800bbde: 4605 mov r5, r0 800bbe0: 4608 mov r0, r1 800bbe2: 4611 mov r1, r2 800bbe4: 2200 movs r2, #0 800bbe6: 4c05 ldr r4, [pc, #20] ; (800bbfc <_read_r+0x20>) 800bbe8: 6022 str r2, [r4, #0] 800bbea: 461a mov r2, r3 800bbec: f7fc fd0e bl 800860c <_read> 800bbf0: 1c43 adds r3, r0, #1 800bbf2: d102 bne.n 800bbfa <_read_r+0x1e> 800bbf4: 6823 ldr r3, [r4, #0] 800bbf6: b103 cbz r3, 800bbfa <_read_r+0x1e> 800bbf8: 602b str r3, [r5, #0] 800bbfa: bd38 pop {r3, r4, r5, pc} 800bbfc: 200017e0 .word 0x200017e0 0800bc00 <__ascii_wctomb>: 800bc00: b149 cbz r1, 800bc16 <__ascii_wctomb+0x16> 800bc02: 2aff cmp r2, #255 ; 0xff 800bc04: bf8b itete hi 800bc06: 238a movhi r3, #138 ; 0x8a 800bc08: 700a strbls r2, [r1, #0] 800bc0a: 6003 strhi r3, [r0, #0] 800bc0c: 2001 movls r0, #1 800bc0e: bf88 it hi 800bc10: f04f 30ff movhi.w r0, #4294967295 800bc14: 4770 bx lr 800bc16: 4608 mov r0, r1 800bc18: 4770 bx lr ... 0800bc1c <_init>: 800bc1c: b5f8 push {r3, r4, r5, r6, r7, lr} 800bc1e: bf00 nop 800bc20: bcf8 pop {r3, r4, r5, r6, r7} 800bc22: bc08 pop {r3} 800bc24: 469e mov lr, r3 800bc26: 4770 bx lr 0800bc28 <_fini>: 800bc28: b5f8 push {r3, r4, r5, r6, r7, lr} 800bc2a: bf00 nop 800bc2c: bcf8 pop {r3, r4, r5, r6, r7} 800bc2e: bc08 pop {r3} 800bc30: 469e mov lr, r3 800bc32: 4770 bx lr