STM32F103_ATTEN_PLL_Zig.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000304c 080001e4 080001e4 000101e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 0000011c 08003230 08003230 00013230 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 0800334c 0800334c 0001334c 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08003350 08003350 00013350 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000080 20000000 08003354 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 000015a4 20000080 080033d4 00020080 2**3 ALLOC 7 ._user_heap_stack 00000600 20001624 080033d4 00021624 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00020080 2**0 CONTENTS, READONLY 9 .debug_info 00019145 00000000 00000000 000200a9 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 000037b0 00000000 00000000 000391ee 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 000075c5 00000000 00000000 0003c99e 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000af8 00000000 00000000 00043f68 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00000e48 00000000 00000000 00044a60 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00006d11 00000000 00000000 000458a8 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004001 00000000 00000000 0004c5b9 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 000505ba 2**0 CONTENTS, READONLY 17 .debug_frame 0000264c 00000000 00000000 00050638 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001e4 <__do_global_dtors_aux>: 80001e4: b510 push {r4, lr} 80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>) 80001e8: 7823 ldrb r3, [r4, #0] 80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16> 80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>) 80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12> 80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>) 80001f2: f3af 8000 nop.w 80001f6: 2301 movs r3, #1 80001f8: 7023 strb r3, [r4, #0] 80001fa: bd10 pop {r4, pc} 80001fc: 20000080 .word 0x20000080 8000200: 00000000 .word 0x00000000 8000204: 08003218 .word 0x08003218 08000208 : 8000208: b508 push {r3, lr} 800020a: 4b03 ldr r3, [pc, #12] ; (8000218 ) 800020c: b11b cbz r3, 8000216 800020e: 4903 ldr r1, [pc, #12] ; (800021c ) 8000210: 4803 ldr r0, [pc, #12] ; (8000220 ) 8000212: f3af 8000 nop.w 8000216: bd08 pop {r3, pc} 8000218: 00000000 .word 0x00000000 800021c: 20000084 .word 0x20000084 8000220: 08003218 .word 0x08003218 08000224 <__aeabi_llsr>: 8000224: 40d0 lsrs r0, r2 8000226: 1c0b adds r3, r1, #0 8000228: 40d1 lsrs r1, r2 800022a: 469c mov ip, r3 800022c: 3a20 subs r2, #32 800022e: 40d3 lsrs r3, r2 8000230: 4318 orrs r0, r3 8000232: 4252 negs r2, r2 8000234: 4663 mov r3, ip 8000236: 4093 lsls r3, r2 8000238: 4318 orrs r0, r3 800023a: 4770 bx lr 0800023c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800023c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800023e: 4b0e ldr r3, [pc, #56] ; (8000278 ) { 8000240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000242: 7818 ldrb r0, [r3, #0] 8000244: f44f 737a mov.w r3, #1000 ; 0x3e8 8000248: fbb3 f3f0 udiv r3, r3, r0 800024c: 4a0b ldr r2, [pc, #44] ; (800027c ) 800024e: 6810 ldr r0, [r2, #0] 8000250: fbb0 f0f3 udiv r0, r0, r3 8000254: f000 f88c bl 8000370 8000258: 4604 mov r4, r0 800025a: b958 cbnz r0, 8000274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800025c: 2d0f cmp r5, #15 800025e: d809 bhi.n 8000274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000260: 4602 mov r2, r0 8000262: 4629 mov r1, r5 8000264: f04f 30ff mov.w r0, #4294967295 8000268: f000 f842 bl 80002f0 uwTickPrio = TickPriority; 800026c: 4b04 ldr r3, [pc, #16] ; (8000280 ) 800026e: 4620 mov r0, r4 8000270: 601d str r5, [r3, #0] 8000272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000276: bd38 pop {r3, r4, r5, pc} 8000278: 20000000 .word 0x20000000 800027c: 20000018 .word 0x20000018 8000280: 20000004 .word 0x20000004 08000284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000284: 4a07 ldr r2, [pc, #28] ; (80002a4 ) { 8000286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800028a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800028c: f043 0310 orr.w r3, r3, #16 8000290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8000292: f000 f81b bl 80002cc HAL_InitTick(TICK_INT_PRIORITY); 8000296: 2000 movs r0, #0 8000298: f7ff ffd0 bl 800023c HAL_MspInit(); 800029c: f001 fdb8 bl 8001e10 } 80002a0: 2000 movs r0, #0 80002a2: bd08 pop {r3, pc} 80002a4: 40022000 .word 0x40022000 080002a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80002a8: 4a03 ldr r2, [pc, #12] ; (80002b8 ) 80002aa: 4b04 ldr r3, [pc, #16] ; (80002bc ) 80002ac: 6811 ldr r1, [r2, #0] 80002ae: 781b ldrb r3, [r3, #0] 80002b0: 440b add r3, r1 80002b2: 6013 str r3, [r2, #0] 80002b4: 4770 bx lr 80002b6: bf00 nop 80002b8: 200004d0 .word 0x200004d0 80002bc: 20000000 .word 0x20000000 080002c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80002c0: 4b01 ldr r3, [pc, #4] ; (80002c8 ) 80002c2: 6818 ldr r0, [r3, #0] } 80002c4: 4770 bx lr 80002c6: bf00 nop 80002c8: 200004d0 .word 0x200004d0 080002cc : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80002cc: 4a07 ldr r2, [pc, #28] ; (80002ec ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002ce: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80002d0: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002d2: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80002d6: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80002da: 041b lsls r3, r3, #16 80002dc: 0c1b lsrs r3, r3, #16 80002de: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80002e2: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 80002e6: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 80002e8: 60d3 str r3, [r2, #12] 80002ea: 4770 bx lr 80002ec: e000ed00 .word 0xe000ed00 080002f0 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80002f0: 4b17 ldr r3, [pc, #92] ; (8000350 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 80002f2: b530 push {r4, r5, lr} 80002f4: 68dc ldr r4, [r3, #12] 80002f6: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80002fa: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80002fe: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000300: 2b04 cmp r3, #4 8000302: bf28 it cs 8000304: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000306: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000308: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800030c: bf98 it ls 800030e: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000310: fa05 f303 lsl.w r3, r5, r3 8000314: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000318: bf88 it hi 800031a: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800031c: 4019 ands r1, r3 800031e: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000320: fa05 f404 lsl.w r4, r5, r4 8000324: 3c01 subs r4, #1 8000326: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8000328: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800032a: ea42 0201 orr.w r2, r2, r1 800032e: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000332: bfaf iteee ge 8000334: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000338: 4b06 ldrlt r3, [pc, #24] ; (8000354 ) 800033a: f000 000f andlt.w r0, r0, #15 800033e: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000340: bfa5 ittet ge 8000342: b2d2 uxtbge r2, r2 8000344: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000348: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800034a: f880 2300 strbge.w r2, [r0, #768] ; 0x300 800034e: bd30 pop {r4, r5, pc} 8000350: e000ed00 .word 0xe000ed00 8000354: e000ed14 .word 0xe000ed14 08000358 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 8000358: 2301 movs r3, #1 800035a: 0942 lsrs r2, r0, #5 800035c: f000 001f and.w r0, r0, #31 8000360: fa03 f000 lsl.w r0, r3, r0 8000364: 4b01 ldr r3, [pc, #4] ; (800036c ) 8000366: f843 0022 str.w r0, [r3, r2, lsl #2] 800036a: 4770 bx lr 800036c: e000e100 .word 0xe000e100 08000370 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000370: 3801 subs r0, #1 8000372: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8000376: d20a bcs.n 800038e SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000378: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800037a: 4b06 ldr r3, [pc, #24] ; (8000394 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800037c: 4a06 ldr r2, [pc, #24] ; (8000398 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800037e: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000380: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000384: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8000386: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000388: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 800038a: 601a str r2, [r3, #0] 800038c: 4770 bx lr return (1UL); /* Reload value impossible */ 800038e: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 8000390: 4770 bx lr 8000392: bf00 nop 8000394: e000e010 .word 0xe000e010 8000398: e000ed00 .word 0xe000ed00 0800039c : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 800039c: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 800039e: 2800 cmp r0, #0 80003a0: d032 beq.n 8000408 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80003a2: 6801 ldr r1, [r0, #0] 80003a4: 4b19 ldr r3, [pc, #100] ; (800040c ) 80003a6: 2414 movs r4, #20 80003a8: 4299 cmp r1, r3 80003aa: d825 bhi.n 80003f8 { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003ac: 4a18 ldr r2, [pc, #96] ; (8000410 ) hdma->DmaBaseAddress = DMA1; 80003ae: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003b2: 440a add r2, r1 80003b4: fbb2 f2f4 udiv r2, r2, r4 80003b8: 0092 lsls r2, r2, #2 80003ba: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80003bc: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80003be: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80003c0: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80003c2: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80003c4: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003c6: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003c8: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003cc: 4323 orrs r3, r4 80003ce: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003d0: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003d4: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80003d6: 6944 ldr r4, [r0, #20] 80003d8: 4323 orrs r3, r4 80003da: 6984 ldr r4, [r0, #24] 80003dc: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 80003de: 69c4 ldr r4, [r0, #28] 80003e0: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 80003e2: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 80003e4: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 80003e6: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003e8: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 80003ea: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003ee: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 80003f0: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 80003f4: 4618 mov r0, r3 80003f6: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 80003f8: 4b06 ldr r3, [pc, #24] ; (8000414 ) 80003fa: 440b add r3, r1 80003fc: fbb3 f3f4 udiv r3, r3, r4 8000400: 009b lsls r3, r3, #2 8000402: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8000404: 4b04 ldr r3, [pc, #16] ; (8000418 ) 8000406: e7d9 b.n 80003bc return HAL_ERROR; 8000408: 2001 movs r0, #1 } 800040a: bd10 pop {r4, pc} 800040c: 40020407 .word 0x40020407 8000410: bffdfff8 .word 0xbffdfff8 8000414: bffdfbf8 .word 0xbffdfbf8 8000418: 40020400 .word 0x40020400 0800041c : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 800041c: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 800041e: f890 4020 ldrb.w r4, [r0, #32] 8000422: 2c01 cmp r4, #1 8000424: d035 beq.n 8000492 8000426: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 8000428: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 800042c: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8000430: 42a5 cmp r5, r4 8000432: f04f 0600 mov.w r6, #0 8000436: f04f 0402 mov.w r4, #2 800043a: d128 bne.n 800048e { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 800043c: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8000440: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000442: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8000444: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000446: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 8000448: f026 0601 bic.w r6, r6, #1 800044c: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800044e: 6bc6 ldr r6, [r0, #60] ; 0x3c 8000450: 40bd lsls r5, r7 8000452: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8000454: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8000456: 6843 ldr r3, [r0, #4] 8000458: 6805 ldr r5, [r0, #0] 800045a: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 800045c: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 800045e: bf0b itete eq 8000460: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 8000462: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8000464: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 8000466: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 8000468: b14b cbz r3, 800047e __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800046a: 6823 ldr r3, [r4, #0] 800046c: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000470: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 8000472: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8000474: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 8000476: f043 0301 orr.w r3, r3, #1 800047a: 602b str r3, [r5, #0] 800047c: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 800047e: 6823 ldr r3, [r4, #0] 8000480: f023 0304 bic.w r3, r3, #4 8000484: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000486: 6823 ldr r3, [r4, #0] 8000488: f043 030a orr.w r3, r3, #10 800048c: e7f0 b.n 8000470 __HAL_UNLOCK(hdma); 800048e: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 8000492: 2002 movs r0, #2 } 8000494: bdf0 pop {r4, r5, r6, r7, pc} ... 08000498 : if(HAL_DMA_STATE_BUSY != hdma->State) 8000498: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 800049c: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 800049e: 2b02 cmp r3, #2 80004a0: d003 beq.n 80004aa hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80004a2: 2304 movs r3, #4 80004a4: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80004a6: 2001 movs r0, #1 80004a8: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80004aa: 6803 ldr r3, [r0, #0] 80004ac: 681a ldr r2, [r3, #0] 80004ae: f022 020e bic.w r2, r2, #14 80004b2: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80004b4: 681a ldr r2, [r3, #0] 80004b6: f022 0201 bic.w r2, r2, #1 80004ba: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004bc: 4a29 ldr r2, [pc, #164] ; (8000564 ) 80004be: 4293 cmp r3, r2 80004c0: d924 bls.n 800050c 80004c2: f502 7262 add.w r2, r2, #904 ; 0x388 80004c6: 4293 cmp r3, r2 80004c8: d019 beq.n 80004fe 80004ca: 3214 adds r2, #20 80004cc: 4293 cmp r3, r2 80004ce: d018 beq.n 8000502 80004d0: 3214 adds r2, #20 80004d2: 4293 cmp r3, r2 80004d4: d017 beq.n 8000506 80004d6: 3214 adds r2, #20 80004d8: 4293 cmp r3, r2 80004da: bf0c ite eq 80004dc: f44f 5380 moveq.w r3, #4096 ; 0x1000 80004e0: f44f 3380 movne.w r3, #65536 ; 0x10000 80004e4: 4a20 ldr r2, [pc, #128] ; (8000568 ) 80004e6: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 80004e8: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 80004ea: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 80004ec: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 80004f0: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 80004f2: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 80004f6: b39b cbz r3, 8000560 hdma->XferAbortCallback(hdma); 80004f8: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 80004fa: 4620 mov r0, r4 80004fc: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004fe: 2301 movs r3, #1 8000500: e7f0 b.n 80004e4 8000502: 2310 movs r3, #16 8000504: e7ee b.n 80004e4 8000506: f44f 7380 mov.w r3, #256 ; 0x100 800050a: e7eb b.n 80004e4 800050c: 4917 ldr r1, [pc, #92] ; (800056c ) 800050e: 428b cmp r3, r1 8000510: d016 beq.n 8000540 8000512: 3114 adds r1, #20 8000514: 428b cmp r3, r1 8000516: d015 beq.n 8000544 8000518: 3114 adds r1, #20 800051a: 428b cmp r3, r1 800051c: d014 beq.n 8000548 800051e: 3114 adds r1, #20 8000520: 428b cmp r3, r1 8000522: d014 beq.n 800054e 8000524: 3114 adds r1, #20 8000526: 428b cmp r3, r1 8000528: d014 beq.n 8000554 800052a: 3114 adds r1, #20 800052c: 428b cmp r3, r1 800052e: d014 beq.n 800055a 8000530: 4293 cmp r3, r2 8000532: bf14 ite ne 8000534: f44f 3380 movne.w r3, #65536 ; 0x10000 8000538: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 800053c: 4a0c ldr r2, [pc, #48] ; (8000570 ) 800053e: e7d2 b.n 80004e6 8000540: 2301 movs r3, #1 8000542: e7fb b.n 800053c 8000544: 2310 movs r3, #16 8000546: e7f9 b.n 800053c 8000548: f44f 7380 mov.w r3, #256 ; 0x100 800054c: e7f6 b.n 800053c 800054e: f44f 5380 mov.w r3, #4096 ; 0x1000 8000552: e7f3 b.n 800053c 8000554: f44f 3380 mov.w r3, #65536 ; 0x10000 8000558: e7f0 b.n 800053c 800055a: f44f 1380 mov.w r3, #1048576 ; 0x100000 800055e: e7ed b.n 800053c HAL_StatusTypeDef status = HAL_OK; 8000560: 4618 mov r0, r3 } 8000562: bd10 pop {r4, pc} 8000564: 40020080 .word 0x40020080 8000568: 40020400 .word 0x40020400 800056c: 40020008 .word 0x40020008 8000570: 40020000 .word 0x40020000 08000574 : { 8000574: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000576: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8000578: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800057a: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 800057c: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 800057e: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000580: 4095 lsls r5, r2 8000582: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 8000584: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000586: d055 beq.n 8000634 8000588: 074d lsls r5, r1, #29 800058a: d553 bpl.n 8000634 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800058c: 681a ldr r2, [r3, #0] 800058e: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8000590: bf5e ittt pl 8000592: 681a ldrpl r2, [r3, #0] 8000594: f022 0204 bicpl.w r2, r2, #4 8000598: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 800059a: 4a60 ldr r2, [pc, #384] ; (800071c ) 800059c: 4293 cmp r3, r2 800059e: d91f bls.n 80005e0 80005a0: f502 7262 add.w r2, r2, #904 ; 0x388 80005a4: 4293 cmp r3, r2 80005a6: d014 beq.n 80005d2 80005a8: 3214 adds r2, #20 80005aa: 4293 cmp r3, r2 80005ac: d013 beq.n 80005d6 80005ae: 3214 adds r2, #20 80005b0: 4293 cmp r3, r2 80005b2: d012 beq.n 80005da 80005b4: 3214 adds r2, #20 80005b6: 4293 cmp r3, r2 80005b8: bf0c ite eq 80005ba: f44f 4380 moveq.w r3, #16384 ; 0x4000 80005be: f44f 2380 movne.w r3, #262144 ; 0x40000 80005c2: 4a57 ldr r2, [pc, #348] ; (8000720 ) 80005c4: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80005c6: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80005c8: 2b00 cmp r3, #0 80005ca: f000 80a5 beq.w 8000718 } 80005ce: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80005d0: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005d2: 2304 movs r3, #4 80005d4: e7f5 b.n 80005c2 80005d6: 2340 movs r3, #64 ; 0x40 80005d8: e7f3 b.n 80005c2 80005da: f44f 6380 mov.w r3, #1024 ; 0x400 80005de: e7f0 b.n 80005c2 80005e0: 4950 ldr r1, [pc, #320] ; (8000724 ) 80005e2: 428b cmp r3, r1 80005e4: d016 beq.n 8000614 80005e6: 3114 adds r1, #20 80005e8: 428b cmp r3, r1 80005ea: d015 beq.n 8000618 80005ec: 3114 adds r1, #20 80005ee: 428b cmp r3, r1 80005f0: d014 beq.n 800061c 80005f2: 3114 adds r1, #20 80005f4: 428b cmp r3, r1 80005f6: d014 beq.n 8000622 80005f8: 3114 adds r1, #20 80005fa: 428b cmp r3, r1 80005fc: d014 beq.n 8000628 80005fe: 3114 adds r1, #20 8000600: 428b cmp r3, r1 8000602: d014 beq.n 800062e 8000604: 4293 cmp r3, r2 8000606: bf14 ite ne 8000608: f44f 2380 movne.w r3, #262144 ; 0x40000 800060c: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8000610: 4a45 ldr r2, [pc, #276] ; (8000728 ) 8000612: e7d7 b.n 80005c4 8000614: 2304 movs r3, #4 8000616: e7fb b.n 8000610 8000618: 2340 movs r3, #64 ; 0x40 800061a: e7f9 b.n 8000610 800061c: f44f 6380 mov.w r3, #1024 ; 0x400 8000620: e7f6 b.n 8000610 8000622: f44f 4380 mov.w r3, #16384 ; 0x4000 8000626: e7f3 b.n 8000610 8000628: f44f 2380 mov.w r3, #262144 ; 0x40000 800062c: e7f0 b.n 8000610 800062e: f44f 0380 mov.w r3, #4194304 ; 0x400000 8000632: e7ed b.n 8000610 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8000634: 2502 movs r5, #2 8000636: 4095 lsls r5, r2 8000638: 4225 tst r5, r4 800063a: d057 beq.n 80006ec 800063c: 078d lsls r5, r1, #30 800063e: d555 bpl.n 80006ec if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000640: 681a ldr r2, [r3, #0] 8000642: 0694 lsls r4, r2, #26 8000644: d406 bmi.n 8000654 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8000646: 681a ldr r2, [r3, #0] 8000648: f022 020a bic.w r2, r2, #10 800064c: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 800064e: 2201 movs r2, #1 8000650: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8000654: 4a31 ldr r2, [pc, #196] ; (800071c ) 8000656: 4293 cmp r3, r2 8000658: d91e bls.n 8000698 800065a: f502 7262 add.w r2, r2, #904 ; 0x388 800065e: 4293 cmp r3, r2 8000660: d013 beq.n 800068a 8000662: 3214 adds r2, #20 8000664: 4293 cmp r3, r2 8000666: d012 beq.n 800068e 8000668: 3214 adds r2, #20 800066a: 4293 cmp r3, r2 800066c: d011 beq.n 8000692 800066e: 3214 adds r2, #20 8000670: 4293 cmp r3, r2 8000672: bf0c ite eq 8000674: f44f 5300 moveq.w r3, #8192 ; 0x2000 8000678: f44f 3300 movne.w r3, #131072 ; 0x20000 800067c: 4a28 ldr r2, [pc, #160] ; (8000720 ) 800067e: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 8000680: 2300 movs r3, #0 8000682: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 8000686: 6a83 ldr r3, [r0, #40] ; 0x28 8000688: e79e b.n 80005c8 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 800068a: 2302 movs r3, #2 800068c: e7f6 b.n 800067c 800068e: 2320 movs r3, #32 8000690: e7f4 b.n 800067c 8000692: f44f 7300 mov.w r3, #512 ; 0x200 8000696: e7f1 b.n 800067c 8000698: 4922 ldr r1, [pc, #136] ; (8000724 ) 800069a: 428b cmp r3, r1 800069c: d016 beq.n 80006cc 800069e: 3114 adds r1, #20 80006a0: 428b cmp r3, r1 80006a2: d015 beq.n 80006d0 80006a4: 3114 adds r1, #20 80006a6: 428b cmp r3, r1 80006a8: d014 beq.n 80006d4 80006aa: 3114 adds r1, #20 80006ac: 428b cmp r3, r1 80006ae: d014 beq.n 80006da 80006b0: 3114 adds r1, #20 80006b2: 428b cmp r3, r1 80006b4: d014 beq.n 80006e0 80006b6: 3114 adds r1, #20 80006b8: 428b cmp r3, r1 80006ba: d014 beq.n 80006e6 80006bc: 4293 cmp r3, r2 80006be: bf14 ite ne 80006c0: f44f 3300 movne.w r3, #131072 ; 0x20000 80006c4: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80006c8: 4a17 ldr r2, [pc, #92] ; (8000728 ) 80006ca: e7d8 b.n 800067e 80006cc: 2302 movs r3, #2 80006ce: e7fb b.n 80006c8 80006d0: 2320 movs r3, #32 80006d2: e7f9 b.n 80006c8 80006d4: f44f 7300 mov.w r3, #512 ; 0x200 80006d8: e7f6 b.n 80006c8 80006da: f44f 5300 mov.w r3, #8192 ; 0x2000 80006de: e7f3 b.n 80006c8 80006e0: f44f 3300 mov.w r3, #131072 ; 0x20000 80006e4: e7f0 b.n 80006c8 80006e6: f44f 1300 mov.w r3, #2097152 ; 0x200000 80006ea: e7ed b.n 80006c8 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 80006ec: 2508 movs r5, #8 80006ee: 4095 lsls r5, r2 80006f0: 4225 tst r5, r4 80006f2: d011 beq.n 8000718 80006f4: 0709 lsls r1, r1, #28 80006f6: d50f bpl.n 8000718 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80006f8: 6819 ldr r1, [r3, #0] 80006fa: f021 010e bic.w r1, r1, #14 80006fe: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000700: 2301 movs r3, #1 8000702: fa03 f202 lsl.w r2, r3, r2 8000706: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 8000708: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 800070a: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 800070e: 2300 movs r3, #0 8000710: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8000714: 6b03 ldr r3, [r0, #48] ; 0x30 8000716: e757 b.n 80005c8 } 8000718: bc70 pop {r4, r5, r6} 800071a: 4770 bx lr 800071c: 40020080 .word 0x40020080 8000720: 40020400 .word 0x40020400 8000724: 40020008 .word 0x40020008 8000728: 40020000 .word 0x40020000 0800072c : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800072c: 4a11 ldr r2, [pc, #68] ; (8000774 ) 800072e: 68d3 ldr r3, [r2, #12] 8000730: f013 0310 ands.w r3, r3, #16 8000734: d005 beq.n 8000742 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 8000736: 4910 ldr r1, [pc, #64] ; (8000778 ) 8000738: 69cb ldr r3, [r1, #28] 800073a: f043 0302 orr.w r3, r3, #2 800073e: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8000740: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000742: 68d2 ldr r2, [r2, #12] 8000744: 0750 lsls r0, r2, #29 8000746: d506 bpl.n 8000756 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000748: 490b ldr r1, [pc, #44] ; (8000778 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 800074a: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800074e: 69ca ldr r2, [r1, #28] 8000750: f042 0201 orr.w r2, r2, #1 8000754: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 8000756: 4a07 ldr r2, [pc, #28] ; (8000774 ) 8000758: 69d1 ldr r1, [r2, #28] 800075a: 07c9 lsls r1, r1, #31 800075c: d508 bpl.n 8000770 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 800075e: 4806 ldr r0, [pc, #24] ; (8000778 ) 8000760: 69c1 ldr r1, [r0, #28] 8000762: f041 0104 orr.w r1, r1, #4 8000766: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 8000768: 69d1 ldr r1, [r2, #28] 800076a: f021 0101 bic.w r1, r1, #1 800076e: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8000770: 60d3 str r3, [r2, #12] 8000772: 4770 bx lr 8000774: 40022000 .word 0x40022000 8000778: 200004d8 .word 0x200004d8 0800077c : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 800077c: 4b06 ldr r3, [pc, #24] ; (8000798 ) 800077e: 6918 ldr r0, [r3, #16] 8000780: f010 0080 ands.w r0, r0, #128 ; 0x80 8000784: d007 beq.n 8000796 WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8000786: 4a05 ldr r2, [pc, #20] ; (800079c ) 8000788: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 800078a: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 800078e: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000790: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8000792: f3c0 10c0 ubfx r0, r0, #7, #1 } 8000796: 4770 bx lr 8000798: 40022000 .word 0x40022000 800079c: 45670123 .word 0x45670123 080007a0 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a0: 4a03 ldr r2, [pc, #12] ; (80007b0 ) } 80007a2: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a4: 6913 ldr r3, [r2, #16] 80007a6: f043 0380 orr.w r3, r3, #128 ; 0x80 80007aa: 6113 str r3, [r2, #16] } 80007ac: 4770 bx lr 80007ae: bf00 nop 80007b0: 40022000 .word 0x40022000 080007b4 : { 80007b4: b5f8 push {r3, r4, r5, r6, r7, lr} 80007b6: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 80007b8: f7ff fd82 bl 80002c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007bc: 4c11 ldr r4, [pc, #68] ; (8000804 ) uint32_t tickstart = HAL_GetTick(); 80007be: 4607 mov r7, r0 80007c0: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007c2: 68e3 ldr r3, [r4, #12] 80007c4: 07d8 lsls r0, r3, #31 80007c6: d412 bmi.n 80007ee if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 80007c8: 68e3 ldr r3, [r4, #12] 80007ca: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 80007cc: bf44 itt mi 80007ce: 2320 movmi r3, #32 80007d0: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007d2: 68eb ldr r3, [r5, #12] 80007d4: 06da lsls r2, r3, #27 80007d6: d406 bmi.n 80007e6 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007d8: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007da: 07db lsls r3, r3, #31 80007dc: d403 bmi.n 80007e6 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80007de: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007e0: f010 0004 ands.w r0, r0, #4 80007e4: d002 beq.n 80007ec FLASH_SetErrorCode(); 80007e6: f7ff ffa1 bl 800072c return HAL_ERROR; 80007ea: 2001 movs r0, #1 } 80007ec: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 80007ee: 1c73 adds r3, r6, #1 80007f0: d0e7 beq.n 80007c2 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80007f2: b90e cbnz r6, 80007f8 return HAL_TIMEOUT; 80007f4: 2003 movs r0, #3 80007f6: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80007f8: f7ff fd62 bl 80002c0 80007fc: 1bc0 subs r0, r0, r7 80007fe: 4286 cmp r6, r0 8000800: d2df bcs.n 80007c2 8000802: e7f7 b.n 80007f4 8000804: 40022000 .word 0x40022000 08000808 : { 8000808: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 800080c: 4c1f ldr r4, [pc, #124] ; (800088c ) { 800080e: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8000810: 7e23 ldrb r3, [r4, #24] { 8000812: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8000814: 2b01 cmp r3, #1 { 8000816: 460f mov r7, r1 8000818: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800081a: d033 beq.n 8000884 800081c: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800081e: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8000822: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000824: f7ff ffc6 bl 80007b4 if(status == HAL_OK) 8000828: bb40 cbnz r0, 800087c if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800082a: 2d01 cmp r5, #1 800082c: d003 beq.n 8000836 nbiterations = 4U; 800082e: 2d02 cmp r5, #2 8000830: bf0c ite eq 8000832: 2502 moveq r5, #2 8000834: 2504 movne r5, #4 8000836: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000838: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 800083a: f8df b054 ldr.w fp, [pc, #84] ; 8000890 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 800083e: 0132 lsls r2, r6, #4 8000840: 4640 mov r0, r8 8000842: 4649 mov r1, r9 8000844: f7ff fcee bl 8000224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000848: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 800084c: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000850: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 8000852: f043 0301 orr.w r3, r3, #1 8000856: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 800085a: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800085e: f24c 3050 movw r0, #50000 ; 0xc350 8000862: f7ff ffa7 bl 80007b4 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8000866: f8db 3010 ldr.w r3, [fp, #16] 800086a: f023 0301 bic.w r3, r3, #1 800086e: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 8000872: b918 cbnz r0, 800087c 8000874: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 8000876: b2f3 uxtb r3, r6 8000878: 429d cmp r5, r3 800087a: d8e0 bhi.n 800083e __HAL_UNLOCK(&pFlash); 800087c: 2300 movs r3, #0 800087e: 7623 strb r3, [r4, #24] return status; 8000880: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 8000884: 2002 movs r0, #2 } 8000886: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 800088a: bf00 nop 800088c: 200004d8 .word 0x200004d8 8000890: 40022000 .word 0x40022000 08000894 : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000894: 2200 movs r2, #0 8000896: 4b06 ldr r3, [pc, #24] ; (80008b0 ) 8000898: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 800089a: 4b06 ldr r3, [pc, #24] ; (80008b4 ) 800089c: 691a ldr r2, [r3, #16] 800089e: f042 0204 orr.w r2, r2, #4 80008a2: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008a4: 691a ldr r2, [r3, #16] 80008a6: f042 0240 orr.w r2, r2, #64 ; 0x40 80008aa: 611a str r2, [r3, #16] 80008ac: 4770 bx lr 80008ae: bf00 nop 80008b0: 200004d8 .word 0x200004d8 80008b4: 40022000 .word 0x40022000 080008b8 : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008b8: 2200 movs r2, #0 80008ba: 4b06 ldr r3, [pc, #24] ; (80008d4 ) 80008bc: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 80008be: 4b06 ldr r3, [pc, #24] ; (80008d8 ) 80008c0: 691a ldr r2, [r3, #16] 80008c2: f042 0202 orr.w r2, r2, #2 80008c6: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 80008c8: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008ca: 691a ldr r2, [r3, #16] 80008cc: f042 0240 orr.w r2, r2, #64 ; 0x40 80008d0: 611a str r2, [r3, #16] 80008d2: 4770 bx lr 80008d4: 200004d8 .word 0x200004d8 80008d8: 40022000 .word 0x40022000 080008dc : { 80008dc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 80008e0: 4d23 ldr r5, [pc, #140] ; (8000970 ) { 80008e2: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 80008e4: 7e2b ldrb r3, [r5, #24] { 80008e6: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 80008e8: 2b01 cmp r3, #1 80008ea: d03d beq.n 8000968 80008ec: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008ee: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 80008f0: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008f2: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80008f4: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008f8: d113 bne.n 8000922 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80008fa: f7ff ff5b bl 80007b4 80008fe: b120 cbz r0, 800090a HAL_StatusTypeDef status = HAL_ERROR; 8000900: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8000902: 2300 movs r3, #0 8000904: 762b strb r3, [r5, #24] return status; 8000906: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 800090a: f7ff ffc3 bl 8000894 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800090e: f24c 3050 movw r0, #50000 ; 0xc350 8000912: f7ff ff4f bl 80007b4 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 8000916: 4a17 ldr r2, [pc, #92] ; (8000974 ) 8000918: 6913 ldr r3, [r2, #16] 800091a: f023 0304 bic.w r3, r3, #4 800091e: 6113 str r3, [r2, #16] 8000920: e7ef b.n 8000902 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000922: f7ff ff47 bl 80007b4 8000926: 2800 cmp r0, #0 8000928: d1ea bne.n 8000900 *PageError = 0xFFFFFFFFU; 800092a: f04f 33ff mov.w r3, #4294967295 800092e: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 8000932: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 8000934: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000936: 4c0f ldr r4, [pc, #60] ; (8000974 ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 8000938: 68fa ldr r2, [r7, #12] 800093a: 68bb ldr r3, [r7, #8] 800093c: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 8000940: 429e cmp r6, r3 8000942: d2de bcs.n 8000902 FLASH_PageErase(address); 8000944: 4630 mov r0, r6 8000946: f7ff ffb7 bl 80008b8 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800094a: f24c 3050 movw r0, #50000 ; 0xc350 800094e: f7ff ff31 bl 80007b4 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000952: 6923 ldr r3, [r4, #16] 8000954: f023 0302 bic.w r3, r3, #2 8000958: 6123 str r3, [r4, #16] if (status != HAL_OK) 800095a: b110 cbz r0, 8000962 *PageError = address; 800095c: f8c8 6000 str.w r6, [r8] break; 8000960: e7cf b.n 8000902 address += FLASH_PAGE_SIZE) 8000962: f506 6600 add.w r6, r6, #2048 ; 0x800 8000966: e7e7 b.n 8000938 __HAL_LOCK(&pFlash); 8000968: 2002 movs r0, #2 } 800096a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800096e: bf00 nop 8000970: 200004d8 .word 0x200004d8 8000974: 40022000 .word 0x40022000 08000978 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8000978: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 800097c: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800097e: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8000980: 4f6c ldr r7, [pc, #432] ; (8000b34 ) 8000982: 4b6d ldr r3, [pc, #436] ; (8000b38 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000984: f8df e1b8 ldr.w lr, [pc, #440] ; 8000b40 switch (GPIO_Init->Mode) 8000988: f8df c1b8 ldr.w ip, [pc, #440] ; 8000b44 ioposition = (0x01U << position); 800098c: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8000990: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 8000992: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8000996: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 800099a: 45a0 cmp r8, r4 800099c: f040 8085 bne.w 8000aaa switch (GPIO_Init->Mode) 80009a0: 684d ldr r5, [r1, #4] 80009a2: 2d12 cmp r5, #18 80009a4: f000 80b7 beq.w 8000b16 80009a8: f200 808d bhi.w 8000ac6 80009ac: 2d02 cmp r5, #2 80009ae: f000 80af beq.w 8000b10 80009b2: f200 8081 bhi.w 8000ab8 80009b6: 2d00 cmp r5, #0 80009b8: f000 8091 beq.w 8000ade 80009bc: 2d01 cmp r5, #1 80009be: f000 80a5 beq.w 8000b0c MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009c2: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009c6: 2cff cmp r4, #255 ; 0xff 80009c8: bf93 iteet ls 80009ca: 4682 movls sl, r0 80009cc: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 80009d0: 3d08 subhi r5, #8 80009d2: f8d0 b000 ldrls.w fp, [r0] 80009d6: bf92 itee ls 80009d8: 00b5 lslls r5, r6, #2 80009da: f8d0 b004 ldrhi.w fp, [r0, #4] 80009de: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009e0: fa09 f805 lsl.w r8, r9, r5 80009e4: ea2b 0808 bic.w r8, fp, r8 80009e8: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009ec: bf88 it hi 80009ee: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009f2: ea48 0505 orr.w r5, r8, r5 80009f6: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 80009fa: f8d1 a004 ldr.w sl, [r1, #4] 80009fe: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8000a02: d052 beq.n 8000aaa __HAL_RCC_AFIO_CLK_ENABLE(); 8000a04: 69bd ldr r5, [r7, #24] 8000a06: f026 0803 bic.w r8, r6, #3 8000a0a: f045 0501 orr.w r5, r5, #1 8000a0e: 61bd str r5, [r7, #24] 8000a10: 69bd ldr r5, [r7, #24] 8000a12: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000a16: f005 0501 and.w r5, r5, #1 8000a1a: 9501 str r5, [sp, #4] 8000a1c: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a20: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a24: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a26: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8000a2a: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a2e: fa09 f90b lsl.w r9, r9, fp 8000a32: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000a36: 4d41 ldr r5, [pc, #260] ; (8000b3c ) 8000a38: 42a8 cmp r0, r5 8000a3a: d071 beq.n 8000b20 8000a3c: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a40: 42a8 cmp r0, r5 8000a42: d06f beq.n 8000b24 8000a44: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a48: 42a8 cmp r0, r5 8000a4a: d06d beq.n 8000b28 8000a4c: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a50: 42a8 cmp r0, r5 8000a52: d06b beq.n 8000b2c 8000a54: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a58: 42a8 cmp r0, r5 8000a5a: d069 beq.n 8000b30 8000a5c: 4570 cmp r0, lr 8000a5e: bf0c ite eq 8000a60: 2505 moveq r5, #5 8000a62: 2506 movne r5, #6 8000a64: fa05 f50b lsl.w r5, r5, fp 8000a68: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 8000a6c: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8000a70: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8000a72: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8000a76: bf14 ite ne 8000a78: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8000a7a: 43a5 biceq r5, r4 8000a7c: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 8000a7e: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8000a80: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8000a84: bf14 ite ne 8000a86: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8000a88: 43a5 biceq r5, r4 8000a8a: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8000a8c: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8000a8e: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000a92: bf14 ite ne 8000a94: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8000a96: 43a5 biceq r5, r4 8000a98: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8000a9a: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8000a9c: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8000aa0: bf14 ite ne 8000aa2: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8000aa4: ea25 0404 biceq.w r4, r5, r4 8000aa8: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8000aaa: 3601 adds r6, #1 8000aac: 2e10 cmp r6, #16 8000aae: f47f af6d bne.w 800098c } } } } } 8000ab2: b003 add sp, #12 8000ab4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8000ab8: 2d03 cmp r5, #3 8000aba: d025 beq.n 8000b08 8000abc: 2d11 cmp r5, #17 8000abe: d180 bne.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8000ac0: 68ca ldr r2, [r1, #12] 8000ac2: 3204 adds r2, #4 break; 8000ac4: e77d b.n 80009c2 switch (GPIO_Init->Mode) 8000ac6: 4565 cmp r5, ip 8000ac8: d009 beq.n 8000ade 8000aca: d812 bhi.n 8000af2 8000acc: f8df 9078 ldr.w r9, [pc, #120] ; 8000b48 8000ad0: 454d cmp r5, r9 8000ad2: d004 beq.n 8000ade 8000ad4: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000ad8: 454d cmp r5, r9 8000ada: f47f af72 bne.w 80009c2 if (GPIO_Init->Pull == GPIO_NOPULL) 8000ade: 688a ldr r2, [r1, #8] 8000ae0: b1e2 cbz r2, 8000b1c else if (GPIO_Init->Pull == GPIO_PULLUP) 8000ae2: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8000ae4: bf0c ite eq 8000ae6: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8000aea: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8000aee: 2208 movs r2, #8 8000af0: e767 b.n 80009c2 switch (GPIO_Init->Mode) 8000af2: f8df 9058 ldr.w r9, [pc, #88] ; 8000b4c 8000af6: 454d cmp r5, r9 8000af8: d0f1 beq.n 8000ade 8000afa: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000afe: 454d cmp r5, r9 8000b00: d0ed beq.n 8000ade 8000b02: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8000b06: e7e7 b.n 8000ad8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8000b08: 2200 movs r2, #0 8000b0a: e75a b.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8000b0c: 68ca ldr r2, [r1, #12] break; 8000b0e: e758 b.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8000b10: 68ca ldr r2, [r1, #12] 8000b12: 3208 adds r2, #8 break; 8000b14: e755 b.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8000b16: 68ca ldr r2, [r1, #12] 8000b18: 320c adds r2, #12 break; 8000b1a: e752 b.n 80009c2 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8000b1c: 2204 movs r2, #4 8000b1e: e750 b.n 80009c2 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000b20: 2500 movs r5, #0 8000b22: e79f b.n 8000a64 8000b24: 2501 movs r5, #1 8000b26: e79d b.n 8000a64 8000b28: 2502 movs r5, #2 8000b2a: e79b b.n 8000a64 8000b2c: 2503 movs r5, #3 8000b2e: e799 b.n 8000a64 8000b30: 2504 movs r5, #4 8000b32: e797 b.n 8000a64 8000b34: 40021000 .word 0x40021000 8000b38: 40010400 .word 0x40010400 8000b3c: 40010800 .word 0x40010800 8000b40: 40011c00 .word 0x40011c00 8000b44: 10210000 .word 0x10210000 8000b48: 10110000 .word 0x10110000 8000b4c: 10310000 .word 0x10310000 08000b50 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8000b50: b10a cbz r2, 8000b56 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8000b52: 6101 str r1, [r0, #16] 8000b54: 4770 bx lr 8000b56: 0409 lsls r1, r1, #16 8000b58: e7fb b.n 8000b52 08000b5a : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 8000b5a: 68c3 ldr r3, [r0, #12] 8000b5c: 4059 eors r1, r3 8000b5e: 60c1 str r1, [r0, #12] 8000b60: 4770 bx lr ... 08000b64 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000b64: 6803 ldr r3, [r0, #0] { 8000b66: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000b6a: 07db lsls r3, r3, #31 { 8000b6c: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000b6e: d410 bmi.n 8000b92 } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8000b70: 682b ldr r3, [r5, #0] 8000b72: 079f lsls r7, r3, #30 8000b74: d45e bmi.n 8000c34 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8000b76: 682b ldr r3, [r5, #0] 8000b78: 0719 lsls r1, r3, #28 8000b7a: f100 8095 bmi.w 8000ca8 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8000b7e: 682b ldr r3, [r5, #0] 8000b80: 075a lsls r2, r3, #29 8000b82: f100 80bf bmi.w 8000d04 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8000b86: 69ea ldr r2, [r5, #28] 8000b88: 2a00 cmp r2, #0 8000b8a: f040 812d bne.w 8000de8 { return HAL_ERROR; } } return HAL_OK; 8000b8e: 2000 movs r0, #0 8000b90: e014 b.n 8000bbc if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8000b92: 4c90 ldr r4, [pc, #576] ; (8000dd4 ) 8000b94: 6863 ldr r3, [r4, #4] 8000b96: f003 030c and.w r3, r3, #12 8000b9a: 2b04 cmp r3, #4 8000b9c: d007 beq.n 8000bae || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8000b9e: 6863 ldr r3, [r4, #4] 8000ba0: f003 030c and.w r3, r3, #12 8000ba4: 2b08 cmp r3, #8 8000ba6: d10c bne.n 8000bc2 8000ba8: 6863 ldr r3, [r4, #4] 8000baa: 03de lsls r6, r3, #15 8000bac: d509 bpl.n 8000bc2 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8000bae: 6823 ldr r3, [r4, #0] 8000bb0: 039c lsls r4, r3, #14 8000bb2: d5dd bpl.n 8000b70 8000bb4: 686b ldr r3, [r5, #4] 8000bb6: 2b00 cmp r3, #0 8000bb8: d1da bne.n 8000b70 return HAL_ERROR; 8000bba: 2001 movs r0, #1 } 8000bbc: b002 add sp, #8 8000bbe: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000bc2: 686b ldr r3, [r5, #4] 8000bc4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000bc8: d110 bne.n 8000bec 8000bca: 6823 ldr r3, [r4, #0] 8000bcc: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8000bd0: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000bd2: f7ff fb75 bl 80002c0 8000bd6: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000bd8: 6823 ldr r3, [r4, #0] 8000bda: 0398 lsls r0, r3, #14 8000bdc: d4c8 bmi.n 8000b70 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000bde: f7ff fb6f bl 80002c0 8000be2: 1b80 subs r0, r0, r6 8000be4: 2864 cmp r0, #100 ; 0x64 8000be6: d9f7 bls.n 8000bd8 return HAL_TIMEOUT; 8000be8: 2003 movs r0, #3 8000bea: e7e7 b.n 8000bbc __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000bec: b99b cbnz r3, 8000c16 8000bee: 6823 ldr r3, [r4, #0] 8000bf0: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000bf4: 6023 str r3, [r4, #0] 8000bf6: 6823 ldr r3, [r4, #0] 8000bf8: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000bfc: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000bfe: f7ff fb5f bl 80002c0 8000c02: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8000c04: 6823 ldr r3, [r4, #0] 8000c06: 0399 lsls r1, r3, #14 8000c08: d5b2 bpl.n 8000b70 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000c0a: f7ff fb59 bl 80002c0 8000c0e: 1b80 subs r0, r0, r6 8000c10: 2864 cmp r0, #100 ; 0x64 8000c12: d9f7 bls.n 8000c04 8000c14: e7e8 b.n 8000be8 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000c16: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8000c1a: 6823 ldr r3, [r4, #0] 8000c1c: d103 bne.n 8000c26 8000c1e: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8000c22: 6023 str r3, [r4, #0] 8000c24: e7d1 b.n 8000bca 8000c26: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000c2a: 6023 str r3, [r4, #0] 8000c2c: 6823 ldr r3, [r4, #0] 8000c2e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000c32: e7cd b.n 8000bd0 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8000c34: 4c67 ldr r4, [pc, #412] ; (8000dd4 ) 8000c36: 6863 ldr r3, [r4, #4] 8000c38: f013 0f0c tst.w r3, #12 8000c3c: d007 beq.n 8000c4e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8000c3e: 6863 ldr r3, [r4, #4] 8000c40: f003 030c and.w r3, r3, #12 8000c44: 2b08 cmp r3, #8 8000c46: d110 bne.n 8000c6a 8000c48: 6863 ldr r3, [r4, #4] 8000c4a: 03da lsls r2, r3, #15 8000c4c: d40d bmi.n 8000c6a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8000c4e: 6823 ldr r3, [r4, #0] 8000c50: 079b lsls r3, r3, #30 8000c52: d502 bpl.n 8000c5a 8000c54: 692b ldr r3, [r5, #16] 8000c56: 2b01 cmp r3, #1 8000c58: d1af bne.n 8000bba __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8000c5a: 6823 ldr r3, [r4, #0] 8000c5c: 696a ldr r2, [r5, #20] 8000c5e: f023 03f8 bic.w r3, r3, #248 ; 0xf8 8000c62: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000c66: 6023 str r3, [r4, #0] 8000c68: e785 b.n 8000b76 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8000c6a: 692a ldr r2, [r5, #16] 8000c6c: 4b5a ldr r3, [pc, #360] ; (8000dd8 ) 8000c6e: b16a cbz r2, 8000c8c __HAL_RCC_HSI_ENABLE(); 8000c70: 2201 movs r2, #1 8000c72: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000c74: f7ff fb24 bl 80002c0 8000c78: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000c7a: 6823 ldr r3, [r4, #0] 8000c7c: 079f lsls r7, r3, #30 8000c7e: d4ec bmi.n 8000c5a if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000c80: f7ff fb1e bl 80002c0 8000c84: 1b80 subs r0, r0, r6 8000c86: 2802 cmp r0, #2 8000c88: d9f7 bls.n 8000c7a 8000c8a: e7ad b.n 8000be8 __HAL_RCC_HSI_DISABLE(); 8000c8c: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000c8e: f7ff fb17 bl 80002c0 8000c92: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8000c94: 6823 ldr r3, [r4, #0] 8000c96: 0798 lsls r0, r3, #30 8000c98: f57f af6d bpl.w 8000b76 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000c9c: f7ff fb10 bl 80002c0 8000ca0: 1b80 subs r0, r0, r6 8000ca2: 2802 cmp r0, #2 8000ca4: d9f6 bls.n 8000c94 8000ca6: e79f b.n 8000be8 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8000ca8: 69aa ldr r2, [r5, #24] 8000caa: 4c4a ldr r4, [pc, #296] ; (8000dd4 ) 8000cac: 4b4b ldr r3, [pc, #300] ; (8000ddc ) 8000cae: b1da cbz r2, 8000ce8 __HAL_RCC_LSI_ENABLE(); 8000cb0: 2201 movs r2, #1 8000cb2: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000cb4: f7ff fb04 bl 80002c0 8000cb8: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8000cba: 6a63 ldr r3, [r4, #36] ; 0x24 8000cbc: 079b lsls r3, r3, #30 8000cbe: d50d bpl.n 8000cdc * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8000cc0: f44f 52fa mov.w r2, #8000 ; 0x1f40 8000cc4: 4b46 ldr r3, [pc, #280] ; (8000de0 ) 8000cc6: 681b ldr r3, [r3, #0] 8000cc8: fbb3 f3f2 udiv r3, r3, r2 8000ccc: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8000cce: bf00 nop do { __NOP(); } while (Delay --); 8000cd0: 9b01 ldr r3, [sp, #4] 8000cd2: 1e5a subs r2, r3, #1 8000cd4: 9201 str r2, [sp, #4] 8000cd6: 2b00 cmp r3, #0 8000cd8: d1f9 bne.n 8000cce 8000cda: e750 b.n 8000b7e if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000cdc: f7ff faf0 bl 80002c0 8000ce0: 1b80 subs r0, r0, r6 8000ce2: 2802 cmp r0, #2 8000ce4: d9e9 bls.n 8000cba 8000ce6: e77f b.n 8000be8 __HAL_RCC_LSI_DISABLE(); 8000ce8: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000cea: f7ff fae9 bl 80002c0 8000cee: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8000cf0: 6a63 ldr r3, [r4, #36] ; 0x24 8000cf2: 079f lsls r7, r3, #30 8000cf4: f57f af43 bpl.w 8000b7e if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000cf8: f7ff fae2 bl 80002c0 8000cfc: 1b80 subs r0, r0, r6 8000cfe: 2802 cmp r0, #2 8000d00: d9f6 bls.n 8000cf0 8000d02: e771 b.n 8000be8 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8000d04: 4c33 ldr r4, [pc, #204] ; (8000dd4 ) 8000d06: 69e3 ldr r3, [r4, #28] 8000d08: 00d8 lsls r0, r3, #3 8000d0a: d424 bmi.n 8000d56 pwrclkchanged = SET; 8000d0c: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8000d0e: 69e3 ldr r3, [r4, #28] 8000d10: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8000d14: 61e3 str r3, [r4, #28] 8000d16: 69e3 ldr r3, [r4, #28] 8000d18: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8000d1c: 9300 str r3, [sp, #0] 8000d1e: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000d20: 4e30 ldr r6, [pc, #192] ; (8000de4 ) 8000d22: 6833 ldr r3, [r6, #0] 8000d24: 05d9 lsls r1, r3, #23 8000d26: d518 bpl.n 8000d5a __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d28: 68eb ldr r3, [r5, #12] 8000d2a: 2b01 cmp r3, #1 8000d2c: d126 bne.n 8000d7c 8000d2e: 6a23 ldr r3, [r4, #32] 8000d30: f043 0301 orr.w r3, r3, #1 8000d34: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000d36: f7ff fac3 bl 80002c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000d3a: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8000d3e: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8000d40: 6a23 ldr r3, [r4, #32] 8000d42: 079b lsls r3, r3, #30 8000d44: d53f bpl.n 8000dc6 if(pwrclkchanged == SET) 8000d46: 2f00 cmp r7, #0 8000d48: f43f af1d beq.w 8000b86 __HAL_RCC_PWR_CLK_DISABLE(); 8000d4c: 69e3 ldr r3, [r4, #28] 8000d4e: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8000d52: 61e3 str r3, [r4, #28] 8000d54: e717 b.n 8000b86 FlagStatus pwrclkchanged = RESET; 8000d56: 2700 movs r7, #0 8000d58: e7e2 b.n 8000d20 SET_BIT(PWR->CR, PWR_CR_DBP); 8000d5a: 6833 ldr r3, [r6, #0] 8000d5c: f443 7380 orr.w r3, r3, #256 ; 0x100 8000d60: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000d62: f7ff faad bl 80002c0 8000d66: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000d68: 6833 ldr r3, [r6, #0] 8000d6a: 05da lsls r2, r3, #23 8000d6c: d4dc bmi.n 8000d28 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8000d6e: f7ff faa7 bl 80002c0 8000d72: eba0 0008 sub.w r0, r0, r8 8000d76: 2864 cmp r0, #100 ; 0x64 8000d78: d9f6 bls.n 8000d68 8000d7a: e735 b.n 8000be8 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d7c: b9ab cbnz r3, 8000daa 8000d7e: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000d80: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d84: f023 0301 bic.w r3, r3, #1 8000d88: 6223 str r3, [r4, #32] 8000d8a: 6a23 ldr r3, [r4, #32] 8000d8c: f023 0304 bic.w r3, r3, #4 8000d90: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000d92: f7ff fa95 bl 80002c0 8000d96: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8000d98: 6a23 ldr r3, [r4, #32] 8000d9a: 0798 lsls r0, r3, #30 8000d9c: d5d3 bpl.n 8000d46 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000d9e: f7ff fa8f bl 80002c0 8000da2: 1b80 subs r0, r0, r6 8000da4: 4540 cmp r0, r8 8000da6: d9f7 bls.n 8000d98 8000da8: e71e b.n 8000be8 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000daa: 2b05 cmp r3, #5 8000dac: 6a23 ldr r3, [r4, #32] 8000dae: d103 bne.n 8000db8 8000db0: f043 0304 orr.w r3, r3, #4 8000db4: 6223 str r3, [r4, #32] 8000db6: e7ba b.n 8000d2e 8000db8: f023 0301 bic.w r3, r3, #1 8000dbc: 6223 str r3, [r4, #32] 8000dbe: 6a23 ldr r3, [r4, #32] 8000dc0: f023 0304 bic.w r3, r3, #4 8000dc4: e7b6 b.n 8000d34 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000dc6: f7ff fa7b bl 80002c0 8000dca: eba0 0008 sub.w r0, r0, r8 8000dce: 42b0 cmp r0, r6 8000dd0: d9b6 bls.n 8000d40 8000dd2: e709 b.n 8000be8 8000dd4: 40021000 .word 0x40021000 8000dd8: 42420000 .word 0x42420000 8000ddc: 42420480 .word 0x42420480 8000de0: 20000018 .word 0x20000018 8000de4: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000de8: 4c22 ldr r4, [pc, #136] ; (8000e74 ) 8000dea: 6863 ldr r3, [r4, #4] 8000dec: f003 030c and.w r3, r3, #12 8000df0: 2b08 cmp r3, #8 8000df2: f43f aee2 beq.w 8000bba 8000df6: 2300 movs r3, #0 8000df8: 4e1f ldr r6, [pc, #124] ; (8000e78 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000dfa: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8000dfc: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000dfe: d12b bne.n 8000e58 tickstart = HAL_GetTick(); 8000e00: f7ff fa5e bl 80002c0 8000e04: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000e06: 6823 ldr r3, [r4, #0] 8000e08: 0199 lsls r1, r3, #6 8000e0a: d41f bmi.n 8000e4c if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8000e0c: 6a2b ldr r3, [r5, #32] 8000e0e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000e12: d105 bne.n 8000e20 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8000e14: 6862 ldr r2, [r4, #4] 8000e16: 68a9 ldr r1, [r5, #8] 8000e18: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8000e1c: 430a orrs r2, r1 8000e1e: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8000e20: 6a69 ldr r1, [r5, #36] ; 0x24 8000e22: 6862 ldr r2, [r4, #4] 8000e24: 430b orrs r3, r1 8000e26: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8000e2a: 4313 orrs r3, r2 8000e2c: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8000e2e: 2301 movs r3, #1 8000e30: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000e32: f7ff fa45 bl 80002c0 8000e36: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000e38: 6823 ldr r3, [r4, #0] 8000e3a: 019a lsls r2, r3, #6 8000e3c: f53f aea7 bmi.w 8000b8e if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000e40: f7ff fa3e bl 80002c0 8000e44: 1b40 subs r0, r0, r5 8000e46: 2802 cmp r0, #2 8000e48: d9f6 bls.n 8000e38 8000e4a: e6cd b.n 8000be8 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000e4c: f7ff fa38 bl 80002c0 8000e50: 1bc0 subs r0, r0, r7 8000e52: 2802 cmp r0, #2 8000e54: d9d7 bls.n 8000e06 8000e56: e6c7 b.n 8000be8 tickstart = HAL_GetTick(); 8000e58: f7ff fa32 bl 80002c0 8000e5c: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000e5e: 6823 ldr r3, [r4, #0] 8000e60: 019b lsls r3, r3, #6 8000e62: f57f ae94 bpl.w 8000b8e if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000e66: f7ff fa2b bl 80002c0 8000e6a: 1b40 subs r0, r0, r5 8000e6c: 2802 cmp r0, #2 8000e6e: d9f6 bls.n 8000e5e 8000e70: e6ba b.n 8000be8 8000e72: bf00 nop 8000e74: 40021000 .word 0x40021000 8000e78: 42420060 .word 0x42420060 08000e7c : { 8000e7c: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000e7e: 4b19 ldr r3, [pc, #100] ; (8000ee4 ) { 8000e80: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000e82: ac02 add r4, sp, #8 8000e84: f103 0510 add.w r5, r3, #16 8000e88: 4622 mov r2, r4 8000e8a: 6818 ldr r0, [r3, #0] 8000e8c: 6859 ldr r1, [r3, #4] 8000e8e: 3308 adds r3, #8 8000e90: c203 stmia r2!, {r0, r1} 8000e92: 42ab cmp r3, r5 8000e94: 4614 mov r4, r2 8000e96: d1f7 bne.n 8000e88 const uint8_t aPredivFactorTable[2] = {1, 2}; 8000e98: 2301 movs r3, #1 8000e9a: f88d 3004 strb.w r3, [sp, #4] 8000e9e: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8000ea0: 4911 ldr r1, [pc, #68] ; (8000ee8 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8000ea2: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8000ea6: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8000ea8: f003 020c and.w r2, r3, #12 8000eac: 2a08 cmp r2, #8 8000eae: d117 bne.n 8000ee0 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000eb0: f3c3 4283 ubfx r2, r3, #18, #4 8000eb4: a806 add r0, sp, #24 8000eb6: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000eb8: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000eba: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000ebe: d50c bpl.n 8000eda prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000ec0: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000ec2: 480a ldr r0, [pc, #40] ; (8000eec ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000ec4: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000ec8: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000eca: aa06 add r2, sp, #24 8000ecc: 4413 add r3, r2 8000ece: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000ed2: fbb0 f0f3 udiv r0, r0, r3 } 8000ed6: b007 add sp, #28 8000ed8: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8000eda: 4805 ldr r0, [pc, #20] ; (8000ef0 ) 8000edc: 4350 muls r0, r2 8000ede: e7fa b.n 8000ed6 sysclockfreq = HSE_VALUE; 8000ee0: 4802 ldr r0, [pc, #8] ; (8000eec ) return sysclockfreq; 8000ee2: e7f8 b.n 8000ed6 8000ee4: 08003230 .word 0x08003230 8000ee8: 40021000 .word 0x40021000 8000eec: 007a1200 .word 0x007a1200 8000ef0: 003d0900 .word 0x003d0900 08000ef4 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000ef4: 4a54 ldr r2, [pc, #336] ; (8001048 ) { 8000ef6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000efa: 6813 ldr r3, [r2, #0] { 8000efc: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000efe: f003 0307 and.w r3, r3, #7 8000f02: 428b cmp r3, r1 { 8000f04: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000f06: d32a bcc.n 8000f5e if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8000f08: 6829 ldr r1, [r5, #0] 8000f0a: 078c lsls r4, r1, #30 8000f0c: d434 bmi.n 8000f78 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8000f0e: 07ca lsls r2, r1, #31 8000f10: d447 bmi.n 8000fa2 if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8000f12: 4a4d ldr r2, [pc, #308] ; (8001048 ) 8000f14: 6813 ldr r3, [r2, #0] 8000f16: f003 0307 and.w r3, r3, #7 8000f1a: 429e cmp r6, r3 8000f1c: f0c0 8082 bcc.w 8001024 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000f20: 682a ldr r2, [r5, #0] 8000f22: 4c4a ldr r4, [pc, #296] ; (800104c ) 8000f24: f012 0f04 tst.w r2, #4 8000f28: f040 8087 bne.w 800103a if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000f2c: 0713 lsls r3, r2, #28 8000f2e: d506 bpl.n 8000f3e MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8000f30: 6863 ldr r3, [r4, #4] 8000f32: 692a ldr r2, [r5, #16] 8000f34: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8000f38: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000f3c: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8000f3e: f7ff ff9d bl 8000e7c 8000f42: 6863 ldr r3, [r4, #4] 8000f44: 4a42 ldr r2, [pc, #264] ; (8001050 ) 8000f46: f3c3 1303 ubfx r3, r3, #4, #4 8000f4a: 5cd3 ldrb r3, [r2, r3] 8000f4c: 40d8 lsrs r0, r3 8000f4e: 4b41 ldr r3, [pc, #260] ; (8001054 ) 8000f50: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8000f52: 2000 movs r0, #0 8000f54: f7ff f972 bl 800023c return HAL_OK; 8000f58: 2000 movs r0, #0 } 8000f5a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8000f5e: 6813 ldr r3, [r2, #0] 8000f60: f023 0307 bic.w r3, r3, #7 8000f64: 430b orrs r3, r1 8000f66: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8000f68: 6813 ldr r3, [r2, #0] 8000f6a: f003 0307 and.w r3, r3, #7 8000f6e: 4299 cmp r1, r3 8000f70: d0ca beq.n 8000f08 return HAL_ERROR; 8000f72: 2001 movs r0, #1 8000f74: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8000f78: 4b34 ldr r3, [pc, #208] ; (800104c ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000f7a: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8000f7e: bf1e ittt ne 8000f80: 685a ldrne r2, [r3, #4] 8000f82: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8000f86: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000f88: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8000f8a: bf42 ittt mi 8000f8c: 685a ldrmi r2, [r3, #4] 8000f8e: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8000f92: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8000f94: 685a ldr r2, [r3, #4] 8000f96: 68a8 ldr r0, [r5, #8] 8000f98: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8000f9c: 4302 orrs r2, r0 8000f9e: 605a str r2, [r3, #4] 8000fa0: e7b5 b.n 8000f0e if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fa2: 686a ldr r2, [r5, #4] 8000fa4: 4c29 ldr r4, [pc, #164] ; (800104c ) 8000fa6: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000fa8: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000faa: d11c bne.n 8000fe6 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000fac: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000fb0: d0df beq.n 8000f72 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000fb2: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000fb4: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000fb8: f023 0303 bic.w r3, r3, #3 8000fbc: 4313 orrs r3, r2 8000fbe: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8000fc0: f7ff f97e bl 80002c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fc4: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 8000fc6: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fc8: 2b01 cmp r3, #1 8000fca: d114 bne.n 8000ff6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8000fcc: 6863 ldr r3, [r4, #4] 8000fce: f003 030c and.w r3, r3, #12 8000fd2: 2b04 cmp r3, #4 8000fd4: d09d beq.n 8000f12 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000fd6: f7ff f973 bl 80002c0 8000fda: 1bc0 subs r0, r0, r7 8000fdc: 4540 cmp r0, r8 8000fde: d9f5 bls.n 8000fcc return HAL_TIMEOUT; 8000fe0: 2003 movs r0, #3 8000fe2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8000fe6: 2a02 cmp r2, #2 8000fe8: d102 bne.n 8000ff0 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000fea: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8000fee: e7df b.n 8000fb0 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000ff0: f013 0f02 tst.w r3, #2 8000ff4: e7dc b.n 8000fb0 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8000ff6: 2b02 cmp r3, #2 8000ff8: d10f bne.n 800101a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000ffa: 6863 ldr r3, [r4, #4] 8000ffc: f003 030c and.w r3, r3, #12 8001000: 2b08 cmp r3, #8 8001002: d086 beq.n 8000f12 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001004: f7ff f95c bl 80002c0 8001008: 1bc0 subs r0, r0, r7 800100a: 4540 cmp r0, r8 800100c: d9f5 bls.n 8000ffa 800100e: e7e7 b.n 8000fe0 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001010: f7ff f956 bl 80002c0 8001014: 1bc0 subs r0, r0, r7 8001016: 4540 cmp r0, r8 8001018: d8e2 bhi.n 8000fe0 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 800101a: 6863 ldr r3, [r4, #4] 800101c: f013 0f0c tst.w r3, #12 8001020: d1f6 bne.n 8001010 8001022: e776 b.n 8000f12 __HAL_FLASH_SET_LATENCY(FLatency); 8001024: 6813 ldr r3, [r2, #0] 8001026: f023 0307 bic.w r3, r3, #7 800102a: 4333 orrs r3, r6 800102c: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 800102e: 6813 ldr r3, [r2, #0] 8001030: f003 0307 and.w r3, r3, #7 8001034: 429e cmp r6, r3 8001036: d19c bne.n 8000f72 8001038: e772 b.n 8000f20 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800103a: 6863 ldr r3, [r4, #4] 800103c: 68e9 ldr r1, [r5, #12] 800103e: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8001042: 430b orrs r3, r1 8001044: 6063 str r3, [r4, #4] 8001046: e771 b.n 8000f2c 8001048: 40022000 .word 0x40022000 800104c: 40021000 .word 0x40021000 8001050: 0800329b .word 0x0800329b 8001054: 20000018 .word 0x20000018 08001058 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8001058: 4b04 ldr r3, [pc, #16] ; (800106c ) 800105a: 4a05 ldr r2, [pc, #20] ; (8001070 ) 800105c: 685b ldr r3, [r3, #4] 800105e: f3c3 2302 ubfx r3, r3, #8, #3 8001062: 5cd3 ldrb r3, [r2, r3] 8001064: 4a03 ldr r2, [pc, #12] ; (8001074 ) 8001066: 6810 ldr r0, [r2, #0] } 8001068: 40d8 lsrs r0, r3 800106a: 4770 bx lr 800106c: 40021000 .word 0x40021000 8001070: 080032ab .word 0x080032ab 8001074: 20000018 .word 0x20000018 08001078 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8001078: 4b04 ldr r3, [pc, #16] ; (800108c ) 800107a: 4a05 ldr r2, [pc, #20] ; (8001090 ) 800107c: 685b ldr r3, [r3, #4] 800107e: f3c3 23c2 ubfx r3, r3, #11, #3 8001082: 5cd3 ldrb r3, [r2, r3] 8001084: 4a03 ldr r2, [pc, #12] ; (8001094 ) 8001086: 6810 ldr r0, [r2, #0] } 8001088: 40d8 lsrs r0, r3 800108a: 4770 bx lr 800108c: 40021000 .word 0x40021000 8001090: 080032ab .word 0x080032ab 8001094: 20000018 .word 0x20000018 08001098 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8001098: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 800109a: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 800109c: 68da ldr r2, [r3, #12] 800109e: f042 0201 orr.w r2, r2, #1 80010a2: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 80010a4: 681a ldr r2, [r3, #0] 80010a6: f042 0201 orr.w r2, r2, #1 80010aa: 601a str r2, [r3, #0] } 80010ac: 4770 bx lr 080010ae : 80010ae: 4770 bx lr 080010b0 : 80010b0: 4770 bx lr 080010b2 : 80010b2: 4770 bx lr 080010b4 : 80010b4: 4770 bx lr 080010b6 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010b6: 6803 ldr r3, [r0, #0] { 80010b8: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010ba: 691a ldr r2, [r3, #16] { 80010bc: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010be: 0791 lsls r1, r2, #30 80010c0: d50e bpl.n 80010e0 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 80010c2: 68da ldr r2, [r3, #12] 80010c4: 0792 lsls r2, r2, #30 80010c6: d50b bpl.n 80010e0 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80010c8: f06f 0202 mvn.w r2, #2 80010cc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80010ce: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80010d0: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80010d2: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80010d4: 079b lsls r3, r3, #30 80010d6: d077 beq.n 80011c8 { HAL_TIM_IC_CaptureCallback(htim); 80010d8: f7ff ffea bl 80010b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80010dc: 2300 movs r3, #0 80010de: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80010e0: 6823 ldr r3, [r4, #0] 80010e2: 691a ldr r2, [r3, #16] 80010e4: 0750 lsls r0, r2, #29 80010e6: d510 bpl.n 800110a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 80010e8: 68da ldr r2, [r3, #12] 80010ea: 0751 lsls r1, r2, #29 80010ec: d50d bpl.n 800110a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 80010ee: f06f 0204 mvn.w r2, #4 80010f2: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80010f4: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80010f6: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80010f8: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80010fa: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 80010fe: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001100: d068 beq.n 80011d4 HAL_TIM_IC_CaptureCallback(htim); 8001102: f7ff ffd5 bl 80010b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001106: 2300 movs r3, #0 8001108: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 800110a: 6823 ldr r3, [r4, #0] 800110c: 691a ldr r2, [r3, #16] 800110e: 0712 lsls r2, r2, #28 8001110: d50f bpl.n 8001132 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8001112: 68da ldr r2, [r3, #12] 8001114: 0710 lsls r0, r2, #28 8001116: d50c bpl.n 8001132 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8001118: f06f 0208 mvn.w r2, #8 800111c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800111e: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001120: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8001122: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001124: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8001126: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001128: d05a beq.n 80011e0 HAL_TIM_IC_CaptureCallback(htim); 800112a: f7ff ffc1 bl 80010b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800112e: 2300 movs r3, #0 8001130: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8001132: 6823 ldr r3, [r4, #0] 8001134: 691a ldr r2, [r3, #16] 8001136: 06d2 lsls r2, r2, #27 8001138: d510 bpl.n 800115c { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 800113a: 68da ldr r2, [r3, #12] 800113c: 06d0 lsls r0, r2, #27 800113e: d50d bpl.n 800115c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8001140: f06f 0210 mvn.w r2, #16 8001144: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001146: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001148: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 800114a: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800114c: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8001150: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001152: d04b beq.n 80011ec HAL_TIM_IC_CaptureCallback(htim); 8001154: f7ff ffac bl 80010b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001158: 2300 movs r3, #0 800115a: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 800115c: 6823 ldr r3, [r4, #0] 800115e: 691a ldr r2, [r3, #16] 8001160: 07d1 lsls r1, r2, #31 8001162: d508 bpl.n 8001176 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8001164: 68da ldr r2, [r3, #12] 8001166: 07d2 lsls r2, r2, #31 8001168: d505 bpl.n 8001176 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 800116a: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 800116e: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001170: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8001172: f000 fd27 bl 8001bc4 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8001176: 6823 ldr r3, [r4, #0] 8001178: 691a ldr r2, [r3, #16] 800117a: 0610 lsls r0, r2, #24 800117c: d508 bpl.n 8001190 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 800117e: 68da ldr r2, [r3, #12] 8001180: 0611 lsls r1, r2, #24 8001182: d505 bpl.n 8001190 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001184: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8001188: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 800118a: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 800118c: f000 f8bf bl 800130e } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8001190: 6823 ldr r3, [r4, #0] 8001192: 691a ldr r2, [r3, #16] 8001194: 0652 lsls r2, r2, #25 8001196: d508 bpl.n 80011aa { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8001198: 68da ldr r2, [r3, #12] 800119a: 0650 lsls r0, r2, #25 800119c: d505 bpl.n 80011aa { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 800119e: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80011a2: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80011a4: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80011a6: f7ff ff85 bl 80010b4 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80011aa: 6823 ldr r3, [r4, #0] 80011ac: 691a ldr r2, [r3, #16] 80011ae: 0691 lsls r1, r2, #26 80011b0: d522 bpl.n 80011f8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 80011b2: 68da ldr r2, [r3, #12] 80011b4: 0692 lsls r2, r2, #26 80011b6: d51f bpl.n 80011f8 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80011b8: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 80011bc: 4620 mov r0, r4 } } } 80011be: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80011c2: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 80011c4: f000 b8a2 b.w 800130c HAL_TIM_OC_DelayElapsedCallback(htim); 80011c8: f7ff ff71 bl 80010ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80011cc: 4620 mov r0, r4 80011ce: f7ff ff70 bl 80010b2 80011d2: e783 b.n 80010dc HAL_TIM_OC_DelayElapsedCallback(htim); 80011d4: f7ff ff6b bl 80010ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80011d8: 4620 mov r0, r4 80011da: f7ff ff6a bl 80010b2 80011de: e792 b.n 8001106 HAL_TIM_OC_DelayElapsedCallback(htim); 80011e0: f7ff ff65 bl 80010ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80011e4: 4620 mov r0, r4 80011e6: f7ff ff64 bl 80010b2 80011ea: e7a0 b.n 800112e HAL_TIM_OC_DelayElapsedCallback(htim); 80011ec: f7ff ff5f bl 80010ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80011f0: 4620 mov r0, r4 80011f2: f7ff ff5e bl 80010b2 80011f6: e7af b.n 8001158 80011f8: bd10 pop {r4, pc} ... 080011fc : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80011fc: 4a24 ldr r2, [pc, #144] ; (8001290 ) tmpcr1 = TIMx->CR1; 80011fe: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001200: 4290 cmp r0, r2 8001202: d012 beq.n 800122a 8001204: f502 6200 add.w r2, r2, #2048 ; 0x800 8001208: 4290 cmp r0, r2 800120a: d00e beq.n 800122a 800120c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001210: d00b beq.n 800122a 8001212: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001216: 4290 cmp r0, r2 8001218: d007 beq.n 800122a 800121a: f502 6280 add.w r2, r2, #1024 ; 0x400 800121e: 4290 cmp r0, r2 8001220: d003 beq.n 800122a 8001222: f502 6280 add.w r2, r2, #1024 ; 0x400 8001226: 4290 cmp r0, r2 8001228: d11d bne.n 8001266 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 800122a: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 800122c: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8001230: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8001232: 4a17 ldr r2, [pc, #92] ; (8001290 ) 8001234: 4290 cmp r0, r2 8001236: d012 beq.n 800125e 8001238: f502 6200 add.w r2, r2, #2048 ; 0x800 800123c: 4290 cmp r0, r2 800123e: d00e beq.n 800125e 8001240: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001244: d00b beq.n 800125e 8001246: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 800124a: 4290 cmp r0, r2 800124c: d007 beq.n 800125e 800124e: f502 6280 add.w r2, r2, #1024 ; 0x400 8001252: 4290 cmp r0, r2 8001254: d003 beq.n 800125e 8001256: f502 6280 add.w r2, r2, #1024 ; 0x400 800125a: 4290 cmp r0, r2 800125c: d103 bne.n 8001266 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 800125e: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8001260: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8001264: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001266: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8001268: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 800126c: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 800126e: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8001270: 688b ldr r3, [r1, #8] 8001272: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8001274: 680b ldr r3, [r1, #0] 8001276: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8001278: 4b05 ldr r3, [pc, #20] ; (8001290 ) 800127a: 4298 cmp r0, r3 800127c: d003 beq.n 8001286 800127e: f503 6300 add.w r3, r3, #2048 ; 0x800 8001282: 4298 cmp r0, r3 8001284: d101 bne.n 800128a { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8001286: 690b ldr r3, [r1, #16] 8001288: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 800128a: 2301 movs r3, #1 800128c: 6143 str r3, [r0, #20] 800128e: 4770 bx lr 8001290: 40012c00 .word 0x40012c00 08001294 : { 8001294: b510 push {r4, lr} if(htim == NULL) 8001296: 4604 mov r4, r0 8001298: b1a0 cbz r0, 80012c4 if(htim->State == HAL_TIM_STATE_RESET) 800129a: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 800129e: f003 02ff and.w r2, r3, #255 ; 0xff 80012a2: b91b cbnz r3, 80012ac htim->Lock = HAL_UNLOCKED; 80012a4: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80012a8: f000 fdd4 bl 8001e54 htim->State= HAL_TIM_STATE_BUSY; 80012ac: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80012ae: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 80012b0: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80012b4: 1d21 adds r1, r4, #4 80012b6: f7ff ffa1 bl 80011fc htim->State= HAL_TIM_STATE_READY; 80012ba: 2301 movs r3, #1 return HAL_OK; 80012bc: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 80012be: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80012c2: bd10 pop {r4, pc} return HAL_ERROR; 80012c4: 2001 movs r0, #1 } 80012c6: bd10 pop {r4, pc} 080012c8 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 80012c8: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80012cc: b510 push {r4, lr} __HAL_LOCK(htim); 80012ce: 2b01 cmp r3, #1 80012d0: f04f 0302 mov.w r3, #2 80012d4: d018 beq.n 8001308 htim->State = HAL_TIM_STATE_BUSY; 80012d6: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80012da: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80012dc: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80012de: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80012e0: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80012e2: f022 0270 bic.w r2, r2, #112 ; 0x70 80012e6: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80012e8: 685a ldr r2, [r3, #4] 80012ea: 4322 orrs r2, r4 80012ec: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 80012ee: 689a ldr r2, [r3, #8] 80012f0: f022 0280 bic.w r2, r2, #128 ; 0x80 80012f4: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80012f6: 689a ldr r2, [r3, #8] 80012f8: 430a orrs r2, r1 80012fa: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 80012fc: 2301 movs r3, #1 80012fe: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 8001302: 2300 movs r3, #0 8001304: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8001308: 4618 mov r0, r3 return HAL_OK; } 800130a: bd10 pop {r4, pc} 0800130c : 800130c: 4770 bx lr 0800130e : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 800130e: 4770 bx lr 08001310 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8001310: 6803 ldr r3, [r0, #0] 8001312: 68da ldr r2, [r3, #12] 8001314: f422 7290 bic.w r2, r2, #288 ; 0x120 8001318: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800131a: 695a ldr r2, [r3, #20] 800131c: f022 0201 bic.w r2, r2, #1 8001320: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8001322: 2320 movs r3, #32 8001324: f880 303a strb.w r3, [r0, #58] ; 0x3a 8001328: 4770 bx lr ... 0800132c : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 800132c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001330: 6805 ldr r5, [r0, #0] 8001332: 68c2 ldr r2, [r0, #12] 8001334: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001336: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001338: f423 5340 bic.w r3, r3, #12288 ; 0x3000 800133c: 4313 orrs r3, r2 800133e: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001340: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 8001342: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001344: 430b orrs r3, r1 8001346: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8001348: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 800134c: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001350: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 8001352: 4313 orrs r3, r2 8001354: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8001356: 696b ldr r3, [r5, #20] 8001358: 6982 ldr r2, [r0, #24] 800135a: f423 7340 bic.w r3, r3, #768 ; 0x300 800135e: 4313 orrs r3, r2 8001360: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 8001362: 4b40 ldr r3, [pc, #256] ; (8001464 ) { 8001364: 4681 mov r9, r0 if(huart->Instance == USART1) 8001366: 429d cmp r5, r3 8001368: f04f 0419 mov.w r4, #25 800136c: d146 bne.n 80013fc { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 800136e: f7ff fe83 bl 8001078 8001372: fb04 f300 mul.w r3, r4, r0 8001376: f8d9 6004 ldr.w r6, [r9, #4] 800137a: f04f 0864 mov.w r8, #100 ; 0x64 800137e: 00b6 lsls r6, r6, #2 8001380: fbb3 f3f6 udiv r3, r3, r6 8001384: fbb3 f3f8 udiv r3, r3, r8 8001388: 011e lsls r6, r3, #4 800138a: f7ff fe75 bl 8001078 800138e: 4360 muls r0, r4 8001390: f8d9 3004 ldr.w r3, [r9, #4] 8001394: 009b lsls r3, r3, #2 8001396: fbb0 f7f3 udiv r7, r0, r3 800139a: f7ff fe6d bl 8001078 800139e: 4360 muls r0, r4 80013a0: f8d9 3004 ldr.w r3, [r9, #4] 80013a4: 009b lsls r3, r3, #2 80013a6: fbb0 f3f3 udiv r3, r0, r3 80013aa: fbb3 f3f8 udiv r3, r3, r8 80013ae: fb08 7313 mls r3, r8, r3, r7 80013b2: 011b lsls r3, r3, #4 80013b4: 3332 adds r3, #50 ; 0x32 80013b6: fbb3 f3f8 udiv r3, r3, r8 80013ba: f003 07f0 and.w r7, r3, #240 ; 0xf0 80013be: f7ff fe5b bl 8001078 80013c2: 4360 muls r0, r4 80013c4: f8d9 2004 ldr.w r2, [r9, #4] 80013c8: 0092 lsls r2, r2, #2 80013ca: fbb0 faf2 udiv sl, r0, r2 80013ce: f7ff fe53 bl 8001078 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80013d2: 4360 muls r0, r4 80013d4: f8d9 3004 ldr.w r3, [r9, #4] 80013d8: 009b lsls r3, r3, #2 80013da: fbb0 f3f3 udiv r3, r0, r3 80013de: fbb3 f3f8 udiv r3, r3, r8 80013e2: fb08 a313 mls r3, r8, r3, sl 80013e6: 011b lsls r3, r3, #4 80013e8: 3332 adds r3, #50 ; 0x32 80013ea: fbb3 f3f8 udiv r3, r3, r8 80013ee: f003 030f and.w r3, r3, #15 80013f2: 433b orrs r3, r7 80013f4: 4433 add r3, r6 80013f6: 60ab str r3, [r5, #8] 80013f8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80013fc: f7ff fe2c bl 8001058 8001400: fb04 f300 mul.w r3, r4, r0 8001404: f8d9 6004 ldr.w r6, [r9, #4] 8001408: f04f 0864 mov.w r8, #100 ; 0x64 800140c: 00b6 lsls r6, r6, #2 800140e: fbb3 f3f6 udiv r3, r3, r6 8001412: fbb3 f3f8 udiv r3, r3, r8 8001416: 011e lsls r6, r3, #4 8001418: f7ff fe1e bl 8001058 800141c: 4360 muls r0, r4 800141e: f8d9 3004 ldr.w r3, [r9, #4] 8001422: 009b lsls r3, r3, #2 8001424: fbb0 f7f3 udiv r7, r0, r3 8001428: f7ff fe16 bl 8001058 800142c: 4360 muls r0, r4 800142e: f8d9 3004 ldr.w r3, [r9, #4] 8001432: 009b lsls r3, r3, #2 8001434: fbb0 f3f3 udiv r3, r0, r3 8001438: fbb3 f3f8 udiv r3, r3, r8 800143c: fb08 7313 mls r3, r8, r3, r7 8001440: 011b lsls r3, r3, #4 8001442: 3332 adds r3, #50 ; 0x32 8001444: fbb3 f3f8 udiv r3, r3, r8 8001448: f003 07f0 and.w r7, r3, #240 ; 0xf0 800144c: f7ff fe04 bl 8001058 8001450: 4360 muls r0, r4 8001452: f8d9 2004 ldr.w r2, [r9, #4] 8001456: 0092 lsls r2, r2, #2 8001458: fbb0 faf2 udiv sl, r0, r2 800145c: f7ff fdfc bl 8001058 8001460: e7b7 b.n 80013d2 8001462: bf00 nop 8001464: 40013800 .word 0x40013800 08001468 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8001468: b5f8 push {r3, r4, r5, r6, r7, lr} 800146a: 4604 mov r4, r0 800146c: 460e mov r6, r1 800146e: 4617 mov r7, r2 8001470: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8001472: 6821 ldr r1, [r4, #0] 8001474: 680b ldr r3, [r1, #0] 8001476: ea36 0303 bics.w r3, r6, r3 800147a: d101 bne.n 8001480 return HAL_OK; 800147c: 2000 movs r0, #0 } 800147e: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8001480: 1c6b adds r3, r5, #1 8001482: d0f7 beq.n 8001474 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8001484: b995 cbnz r5, 80014ac CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8001486: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8001488: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 800148a: 68da ldr r2, [r3, #12] 800148c: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8001490: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001492: 695a ldr r2, [r3, #20] 8001494: f022 0201 bic.w r2, r2, #1 8001498: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 800149a: 2320 movs r3, #32 800149c: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 80014a0: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 80014a4: 2300 movs r3, #0 80014a6: f884 3038 strb.w r3, [r4, #56] ; 0x38 80014aa: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80014ac: f7fe ff08 bl 80002c0 80014b0: 1bc0 subs r0, r0, r7 80014b2: 4285 cmp r5, r0 80014b4: d2dd bcs.n 8001472 80014b6: e7e6 b.n 8001486 080014b8 : { 80014b8: b510 push {r4, lr} if(huart == NULL) 80014ba: 4604 mov r4, r0 80014bc: b340 cbz r0, 8001510 if(huart->gState == HAL_UART_STATE_RESET) 80014be: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 80014c2: f003 02ff and.w r2, r3, #255 ; 0xff 80014c6: b91b cbnz r3, 80014d0 huart->Lock = HAL_UNLOCKED; 80014c8: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 80014cc: f000 fcd6 bl 8001e7c huart->gState = HAL_UART_STATE_BUSY; 80014d0: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 80014d2: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 80014d4: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 80014d8: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 80014da: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 80014dc: f423 5300 bic.w r3, r3, #8192 ; 0x2000 80014e0: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 80014e2: f7ff ff23 bl 800132c CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80014e6: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 80014e8: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80014ea: 691a ldr r2, [r3, #16] 80014ec: f422 4290 bic.w r2, r2, #18432 ; 0x4800 80014f0: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80014f2: 695a ldr r2, [r3, #20] 80014f4: f022 022a bic.w r2, r2, #42 ; 0x2a 80014f8: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 80014fa: 68da ldr r2, [r3, #12] 80014fc: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8001500: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8001502: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001504: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8001506: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 800150a: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 800150e: bd10 pop {r4, pc} return HAL_ERROR; 8001510: 2001 movs r0, #1 } 8001512: bd10 pop {r4, pc} 08001514 : { 8001514: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001518: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 800151a: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 800151e: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8001520: 2b20 cmp r3, #32 { 8001522: 460d mov r5, r1 8001524: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8001526: d14e bne.n 80015c6 if((pData == NULL) || (Size == 0U)) 8001528: 2900 cmp r1, #0 800152a: d049 beq.n 80015c0 800152c: 2a00 cmp r2, #0 800152e: d047 beq.n 80015c0 __HAL_LOCK(huart); 8001530: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8001534: 2b01 cmp r3, #1 8001536: d046 beq.n 80015c6 8001538: 2301 movs r3, #1 800153a: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 800153e: 2300 movs r3, #0 8001540: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8001542: 2321 movs r3, #33 ; 0x21 8001544: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8001548: f7fe feba bl 80002c0 800154c: 4606 mov r6, r0 huart->TxXferSize = Size; 800154e: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8001552: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8001556: 8ce3 ldrh r3, [r4, #38] ; 0x26 8001558: b29b uxth r3, r3 800155a: b96b cbnz r3, 8001578 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 800155c: 463b mov r3, r7 800155e: 4632 mov r2, r6 8001560: 2140 movs r1, #64 ; 0x40 8001562: 4620 mov r0, r4 8001564: f7ff ff80 bl 8001468 8001568: b9a8 cbnz r0, 8001596 huart->gState = HAL_UART_STATE_READY; 800156a: 2320 movs r3, #32 __HAL_UNLOCK(huart); 800156c: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8001570: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8001574: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8001578: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800157a: 4632 mov r2, r6 huart->TxXferCount--; 800157c: 3b01 subs r3, #1 800157e: b29b uxth r3, r3 8001580: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001582: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001584: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001586: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800158a: 4620 mov r0, r4 800158c: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800158e: d10e bne.n 80015ae if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001590: f7ff ff6a bl 8001468 8001594: b110 cbz r0, 800159c return HAL_TIMEOUT; 8001596: 2003 movs r0, #3 8001598: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 800159c: 882b ldrh r3, [r5, #0] 800159e: 6822 ldr r2, [r4, #0] 80015a0: f3c3 0308 ubfx r3, r3, #0, #9 80015a4: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80015a6: 6923 ldr r3, [r4, #16] 80015a8: b943 cbnz r3, 80015bc pData +=2U; 80015aa: 3502 adds r5, #2 80015ac: e7d3 b.n 8001556 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80015ae: f7ff ff5b bl 8001468 80015b2: 2800 cmp r0, #0 80015b4: d1ef bne.n 8001596 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 80015b6: 6823 ldr r3, [r4, #0] 80015b8: 782a ldrb r2, [r5, #0] 80015ba: 605a str r2, [r3, #4] 80015bc: 3501 adds r5, #1 80015be: e7ca b.n 8001556 return HAL_ERROR; 80015c0: 2001 movs r0, #1 80015c2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 80015c6: 2002 movs r0, #2 } 80015c8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 080015cc : { 80015cc: b538 push {r3, r4, r5, lr} 80015ce: 4604 mov r4, r0 80015d0: 4613 mov r3, r2 if(huart->gState == HAL_UART_STATE_READY) 80015d2: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 80015d6: 2a20 cmp r2, #32 80015d8: d12a bne.n 8001630 if((pData == NULL) || (Size == 0U)) 80015da: b339 cbz r1, 800162c 80015dc: b333 cbz r3, 800162c __HAL_LOCK(huart); 80015de: f894 2038 ldrb.w r2, [r4, #56] ; 0x38 80015e2: 2a01 cmp r2, #1 80015e4: d024 beq.n 8001630 80015e6: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 80015e8: 2500 movs r5, #0 __HAL_LOCK(huart); 80015ea: f884 2038 strb.w r2, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_BUSY_TX; 80015ee: 2221 movs r2, #33 ; 0x21 huart->TxXferCount = Size; 80015f0: 84e3 strh r3, [r4, #38] ; 0x26 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 80015f2: 6b20 ldr r0, [r4, #48] ; 0x30 huart->ErrorCode = HAL_UART_ERROR_NONE; 80015f4: 63e5 str r5, [r4, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 80015f6: f884 2039 strb.w r2, [r4, #57] ; 0x39 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 80015fa: 4a0e ldr r2, [pc, #56] ; (8001634 ) huart->TxXferSize = Size; 80015fc: 84a3 strh r3, [r4, #36] ; 0x24 huart->pTxBuffPtr = pData; 80015fe: 6221 str r1, [r4, #32] huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8001600: 6282 str r2, [r0, #40] ; 0x28 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8001602: 4a0d ldr r2, [pc, #52] ; (8001638 ) huart->hdmatx->XferAbortCallback = NULL; 8001604: 6345 str r5, [r0, #52] ; 0x34 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8001606: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmatx->XferErrorCallback = UART_DMAError; 8001608: 4a0c ldr r2, [pc, #48] ; (800163c ) 800160a: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size); 800160c: 6822 ldr r2, [r4, #0] 800160e: 3204 adds r2, #4 8001610: f7fe ff04 bl 800041c __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8001614: f06f 0240 mvn.w r2, #64 ; 0x40 8001618: 6823 ldr r3, [r4, #0] return HAL_OK; 800161a: 4628 mov r0, r5 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 800161c: 601a str r2, [r3, #0] SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 800161e: 695a ldr r2, [r3, #20] __HAL_UNLOCK(huart); 8001620: f884 5038 strb.w r5, [r4, #56] ; 0x38 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8001624: f042 0280 orr.w r2, r2, #128 ; 0x80 8001628: 615a str r2, [r3, #20] return HAL_OK; 800162a: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 800162c: 2001 movs r0, #1 800162e: bd38 pop {r3, r4, r5, pc} return HAL_BUSY; 8001630: 2002 movs r0, #2 } 8001632: bd38 pop {r3, r4, r5, pc} 8001634: 080016d3 .word 0x080016d3 8001638: 08001701 .word 0x08001701 800163c: 080017cd .word 0x080017cd 08001640 : { 8001640: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 8001642: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 8001646: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 8001648: 2a20 cmp r2, #32 { 800164a: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 800164c: d138 bne.n 80016c0 if((pData == NULL) || (Size == 0U)) 800164e: 2900 cmp r1, #0 8001650: d034 beq.n 80016bc 8001652: 2b00 cmp r3, #0 8001654: d032 beq.n 80016bc __HAL_LOCK(huart); 8001656: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 800165a: 2a01 cmp r2, #1 800165c: d030 beq.n 80016c0 800165e: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001660: 2400 movs r4, #0 __HAL_LOCK(huart); 8001662: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 8001666: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8001668: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 800166a: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 800166c: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 800166e: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8001672: 6b40 ldr r0, [r0, #52] ; 0x34 8001674: 4a13 ldr r2, [pc, #76] ; (80016c4 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8001676: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8001678: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 800167a: 4a13 ldr r2, [pc, #76] ; (80016c8 ) huart->hdmarx->XferAbortCallback = NULL; 800167c: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 800167e: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8001680: 4a12 ldr r2, [pc, #72] ; (80016cc ) 8001682: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8001684: 460a mov r2, r1 8001686: 1d31 adds r1, r6, #4 8001688: f7fe fec8 bl 800041c return HAL_OK; 800168c: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 800168e: 682b ldr r3, [r5, #0] 8001690: 9401 str r4, [sp, #4] 8001692: 681a ldr r2, [r3, #0] 8001694: 9201 str r2, [sp, #4] 8001696: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8001698: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 800169c: 9201 str r2, [sp, #4] 800169e: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 80016a0: 68da ldr r2, [r3, #12] 80016a2: f442 7280 orr.w r2, r2, #256 ; 0x100 80016a6: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 80016a8: 695a ldr r2, [r3, #20] 80016aa: f042 0201 orr.w r2, r2, #1 80016ae: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80016b0: 695a ldr r2, [r3, #20] 80016b2: f042 0240 orr.w r2, r2, #64 ; 0x40 80016b6: 615a str r2, [r3, #20] } 80016b8: b002 add sp, #8 80016ba: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 80016bc: 2001 movs r0, #1 80016be: e7fb b.n 80016b8 return HAL_BUSY; 80016c0: 2002 movs r0, #2 80016c2: e7f9 b.n 80016b8 80016c4: 0800170b .word 0x0800170b 80016c8: 080017c1 .word 0x080017c1 80016cc: 080017cd .word 0x080017cd 080016d0 : 80016d0: 4770 bx lr 080016d2 : { 80016d2: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 80016d4: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80016d6: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 80016d8: 681b ldr r3, [r3, #0] 80016da: f013 0320 ands.w r3, r3, #32 80016de: d10a bne.n 80016f6 huart->TxXferCount = 0U; 80016e0: 84d3 strh r3, [r2, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 80016e2: 6813 ldr r3, [r2, #0] 80016e4: 695a ldr r2, [r3, #20] 80016e6: f022 0280 bic.w r2, r2, #128 ; 0x80 80016ea: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 80016ec: 68da ldr r2, [r3, #12] 80016ee: f042 0240 orr.w r2, r2, #64 ; 0x40 80016f2: 60da str r2, [r3, #12] 80016f4: bd08 pop {r3, pc} HAL_UART_TxCpltCallback(huart); 80016f6: 4610 mov r0, r2 80016f8: f7ff ffea bl 80016d0 80016fc: bd08 pop {r3, pc} 080016fe : 80016fe: 4770 bx lr 08001700 : { 8001700: b508 push {r3, lr} HAL_UART_TxHalfCpltCallback(huart); 8001702: 6a40 ldr r0, [r0, #36] ; 0x24 8001704: f7ff fffb bl 80016fe 8001708: bd08 pop {r3, pc} 0800170a : { 800170a: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800170c: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800170e: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001710: 681b ldr r3, [r3, #0] 8001712: f013 0320 ands.w r3, r3, #32 8001716: d110 bne.n 800173a huart->RxXferCount = 0U; 8001718: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 800171a: 6813 ldr r3, [r2, #0] 800171c: 68d9 ldr r1, [r3, #12] 800171e: f421 7180 bic.w r1, r1, #256 ; 0x100 8001722: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001724: 6959 ldr r1, [r3, #20] 8001726: f021 0101 bic.w r1, r1, #1 800172a: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 800172c: 6959 ldr r1, [r3, #20] 800172e: f021 0140 bic.w r1, r1, #64 ; 0x40 8001732: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8001734: 2320 movs r3, #32 8001736: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 800173a: 4610 mov r0, r2 800173c: f000 fcc0 bl 80020c0 8001740: bd08 pop {r3, pc} 08001742 : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8001742: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8001746: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8001748: 2b22 cmp r3, #34 ; 0x22 800174a: d136 bne.n 80017ba if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800174c: 6883 ldr r3, [r0, #8] 800174e: 6901 ldr r1, [r0, #16] 8001750: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8001754: 6802 ldr r2, [r0, #0] 8001756: 6a83 ldr r3, [r0, #40] ; 0x28 8001758: d123 bne.n 80017a2 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 800175a: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 800175c: b9e9 cbnz r1, 800179a *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 800175e: f3c2 0208 ubfx r2, r2, #0, #9 8001762: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8001766: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8001768: 8dc4 ldrh r4, [r0, #46] ; 0x2e 800176a: 3c01 subs r4, #1 800176c: b2a4 uxth r4, r4 800176e: 85c4 strh r4, [r0, #46] ; 0x2e 8001770: b98c cbnz r4, 8001796 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 8001772: 6803 ldr r3, [r0, #0] 8001774: 68da ldr r2, [r3, #12] 8001776: f022 0220 bic.w r2, r2, #32 800177a: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 800177c: 68da ldr r2, [r3, #12] 800177e: f422 7280 bic.w r2, r2, #256 ; 0x100 8001782: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 8001784: 695a ldr r2, [r3, #20] 8001786: f022 0201 bic.w r2, r2, #1 800178a: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 800178c: 2320 movs r3, #32 800178e: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8001792: f000 fc95 bl 80020c0 if(--huart->RxXferCount == 0U) 8001796: 2000 movs r0, #0 } 8001798: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 800179a: b2d2 uxtb r2, r2 800179c: f823 2b01 strh.w r2, [r3], #1 80017a0: e7e1 b.n 8001766 if(huart->Init.Parity == UART_PARITY_NONE) 80017a2: b921 cbnz r1, 80017ae *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 80017a4: 1c59 adds r1, r3, #1 80017a6: 6852 ldr r2, [r2, #4] 80017a8: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 80017aa: 701a strb r2, [r3, #0] 80017ac: e7dc b.n 8001768 80017ae: 6852 ldr r2, [r2, #4] 80017b0: 1c59 adds r1, r3, #1 80017b2: 6281 str r1, [r0, #40] ; 0x28 80017b4: f002 027f and.w r2, r2, #127 ; 0x7f 80017b8: e7f7 b.n 80017aa return HAL_BUSY; 80017ba: 2002 movs r0, #2 80017bc: bd10 pop {r4, pc} 080017be : 80017be: 4770 bx lr 080017c0 : { 80017c0: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 80017c2: 6a40 ldr r0, [r0, #36] ; 0x24 80017c4: f7ff fffb bl 80017be 80017c8: bd08 pop {r3, pc} 080017ca : 80017ca: 4770 bx lr 080017cc : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80017cc: 6a41 ldr r1, [r0, #36] ; 0x24 { 80017ce: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 80017d0: 680b ldr r3, [r1, #0] 80017d2: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 80017d4: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 80017d8: 2821 cmp r0, #33 ; 0x21 80017da: d10a bne.n 80017f2 80017dc: 0612 lsls r2, r2, #24 80017de: d508 bpl.n 80017f2 huart->TxXferCount = 0U; 80017e0: 2200 movs r2, #0 80017e2: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 80017e4: 68da ldr r2, [r3, #12] 80017e6: f022 02c0 bic.w r2, r2, #192 ; 0xc0 80017ea: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 80017ec: 2220 movs r2, #32 80017ee: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80017f2: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 80017f4: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 80017f8: 2a22 cmp r2, #34 ; 0x22 80017fa: d106 bne.n 800180a 80017fc: 065b lsls r3, r3, #25 80017fe: d504 bpl.n 800180a huart->RxXferCount = 0U; 8001800: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8001802: 4608 mov r0, r1 huart->RxXferCount = 0U; 8001804: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8001806: f7ff fd83 bl 8001310 huart->ErrorCode |= HAL_UART_ERROR_DMA; 800180a: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 800180c: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 800180e: f043 0310 orr.w r3, r3, #16 8001812: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001814: f7ff ffd9 bl 80017ca 8001818: bd08 pop {r3, pc} ... 0800181c : uint32_t isrflags = READ_REG(huart->Instance->SR); 800181c: 6803 ldr r3, [r0, #0] { 800181e: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8001820: 681a ldr r2, [r3, #0] { 8001822: 4604 mov r4, r0 if(errorflags == RESET) 8001824: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8001826: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8001828: 695d ldr r5, [r3, #20] if(errorflags == RESET) 800182a: d107 bne.n 800183c if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 800182c: 0696 lsls r6, r2, #26 800182e: d55a bpl.n 80018e6 8001830: 068d lsls r5, r1, #26 8001832: d558 bpl.n 80018e6 } 8001834: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8001838: f7ff bf83 b.w 8001742 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 800183c: f015 0501 ands.w r5, r5, #1 8001840: d102 bne.n 8001848 8001842: f411 7f90 tst.w r1, #288 ; 0x120 8001846: d04e beq.n 80018e6 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8001848: 07d3 lsls r3, r2, #31 800184a: d505 bpl.n 8001858 800184c: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 800184e: bf42 ittt mi 8001850: 6be3 ldrmi r3, [r4, #60] ; 0x3c 8001852: f043 0301 orrmi.w r3, r3, #1 8001856: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001858: 0750 lsls r0, r2, #29 800185a: d504 bpl.n 8001866 800185c: b11d cbz r5, 8001866 huart->ErrorCode |= HAL_UART_ERROR_NE; 800185e: 6be3 ldr r3, [r4, #60] ; 0x3c 8001860: f043 0302 orr.w r3, r3, #2 8001864: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001866: 0793 lsls r3, r2, #30 8001868: d504 bpl.n 8001874 800186a: b11d cbz r5, 8001874 huart->ErrorCode |= HAL_UART_ERROR_FE; 800186c: 6be3 ldr r3, [r4, #60] ; 0x3c 800186e: f043 0304 orr.w r3, r3, #4 8001872: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001874: 0716 lsls r6, r2, #28 8001876: d504 bpl.n 8001882 8001878: b11d cbz r5, 8001882 huart->ErrorCode |= HAL_UART_ERROR_ORE; 800187a: 6be3 ldr r3, [r4, #60] ; 0x3c 800187c: f043 0308 orr.w r3, r3, #8 8001880: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8001882: 6be3 ldr r3, [r4, #60] ; 0x3c 8001884: 2b00 cmp r3, #0 8001886: d066 beq.n 8001956 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8001888: 0695 lsls r5, r2, #26 800188a: d504 bpl.n 8001896 800188c: 0688 lsls r0, r1, #26 800188e: d502 bpl.n 8001896 UART_Receive_IT(huart); 8001890: 4620 mov r0, r4 8001892: f7ff ff56 bl 8001742 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8001896: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8001898: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 800189a: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 800189c: 6be2 ldr r2, [r4, #60] ; 0x3c 800189e: 0711 lsls r1, r2, #28 80018a0: d402 bmi.n 80018a8 80018a2: f015 0540 ands.w r5, r5, #64 ; 0x40 80018a6: d01a beq.n 80018de UART_EndRxTransfer(huart); 80018a8: f7ff fd32 bl 8001310 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80018ac: 6823 ldr r3, [r4, #0] 80018ae: 695a ldr r2, [r3, #20] 80018b0: 0652 lsls r2, r2, #25 80018b2: d510 bpl.n 80018d6 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80018b4: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 80018b6: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80018b8: f022 0240 bic.w r2, r2, #64 ; 0x40 80018bc: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 80018be: b150 cbz r0, 80018d6 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 80018c0: 4b25 ldr r3, [pc, #148] ; (8001958 ) 80018c2: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 80018c4: f7fe fde8 bl 8000498 80018c8: 2800 cmp r0, #0 80018ca: d044 beq.n 8001956 huart->hdmarx->XferAbortCallback(huart->hdmarx); 80018cc: 6b60 ldr r0, [r4, #52] ; 0x34 } 80018ce: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 80018d2: 6b43 ldr r3, [r0, #52] ; 0x34 80018d4: 4718 bx r3 HAL_UART_ErrorCallback(huart); 80018d6: 4620 mov r0, r4 80018d8: f7ff ff77 bl 80017ca 80018dc: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 80018de: f7ff ff74 bl 80017ca huart->ErrorCode = HAL_UART_ERROR_NONE; 80018e2: 63e5 str r5, [r4, #60] ; 0x3c 80018e4: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 80018e6: 0616 lsls r6, r2, #24 80018e8: d527 bpl.n 800193a 80018ea: 060d lsls r5, r1, #24 80018ec: d525 bpl.n 800193a if(huart->gState == HAL_UART_STATE_BUSY_TX) 80018ee: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 80018f2: 2a21 cmp r2, #33 ; 0x21 80018f4: d12f bne.n 8001956 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80018f6: 68a2 ldr r2, [r4, #8] 80018f8: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 80018fc: 6a22 ldr r2, [r4, #32] 80018fe: d117 bne.n 8001930 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8001900: 8811 ldrh r1, [r2, #0] 8001902: f3c1 0108 ubfx r1, r1, #0, #9 8001906: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8001908: 6921 ldr r1, [r4, #16] 800190a: b979 cbnz r1, 800192c huart->pTxBuffPtr += 2U; 800190c: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800190e: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8001910: 8ce2 ldrh r2, [r4, #38] ; 0x26 8001912: 3a01 subs r2, #1 8001914: b292 uxth r2, r2 8001916: 84e2 strh r2, [r4, #38] ; 0x26 8001918: b9ea cbnz r2, 8001956 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 800191a: 68da ldr r2, [r3, #12] 800191c: f022 0280 bic.w r2, r2, #128 ; 0x80 8001920: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8001922: 68da ldr r2, [r3, #12] 8001924: f042 0240 orr.w r2, r2, #64 ; 0x40 8001928: 60da str r2, [r3, #12] 800192a: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 800192c: 3201 adds r2, #1 800192e: e7ee b.n 800190e huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8001930: 1c51 adds r1, r2, #1 8001932: 6221 str r1, [r4, #32] 8001934: 7812 ldrb r2, [r2, #0] 8001936: 605a str r2, [r3, #4] 8001938: e7ea b.n 8001910 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 800193a: 0650 lsls r0, r2, #25 800193c: d50b bpl.n 8001956 800193e: 064a lsls r2, r1, #25 8001940: d509 bpl.n 8001956 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8001942: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8001944: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8001946: f022 0240 bic.w r2, r2, #64 ; 0x40 800194a: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 800194c: 2320 movs r3, #32 800194e: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 8001952: f7ff febd bl 80016d0 8001956: bd70 pop {r4, r5, r6, pc} 8001958: 0800195d .word 0x0800195d 0800195c : { 800195c: b508 push {r3, lr} huart->RxXferCount = 0x00U; 800195e: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8001960: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 8001962: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 8001964: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 8001966: f7ff ff30 bl 80017ca 800196a: bd08 pop {r3, pc} 0800196c : * ***/ #define Bluecell_BootStart 0x0b uint8_t BootStartdata[6] = {0xbe,Bluecell_BootStart,0x03,4,0,0xeb}; void Firmware_BootStart_Signal(){ 800196c: b510 push {r4, lr} BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 800196e: 4c07 ldr r4, [pc, #28] ; (800198c ) 8001970: 78a1 ldrb r1, [r4, #2] 8001972: 1c60 adds r0, r4, #1 8001974: f000 f85e bl 8001a34 Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 8001978: 78a1 ldrb r1, [r4, #2] BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 800197a: 7120 strb r0, [r4, #4] Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 800197c: 3103 adds r1, #3 800197e: 4620 mov r0, r4 } 8001980: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 8001984: b2c9 uxtb r1, r1 8001986: f000 bbc1 b.w 800210c 800198a: bf00 nop 800198c: 2000000e .word 0x2000000e 08001990 : uint8_t AckData_Buf[6] = {0xbe,FirmwareUpdataAck,0x03,5,0,0xbe}; void FirmwareUpdateStart(uint8_t* data){ 8001990: b570 push {r4, r5, r6, lr} uint8_t ret = 0,crccheck = 0; crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 8001992: 7881 ldrb r1, [r0, #2] void FirmwareUpdateStart(uint8_t* data){ 8001994: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 8001996: 1843 adds r3, r0, r1 8001998: 785a ldrb r2, [r3, #1] 800199a: 3001 adds r0, #1 800199c: f000 f865 bl 8001a6a if(crccheck == NO_ERROR){ 80019a0: b2c0 uxtb r0, r0 80019a2: 2801 cmp r0, #1 80019a4: d00e beq.n 80019c4 80019a6: 2300 movs r3, #0 ret = Flash_write(&data[0]); if(ret == 1) AckData_Buf[bluecell_type] = FirmwareUpdataNak; }else{ for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) printf("%02x ",data[i]); 80019a8: 4e1e ldr r6, [pc, #120] ; (8001a24 ) for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) 80019aa: 78a2 ldrb r2, [r4, #2] 80019ac: 1c5d adds r5, r3, #1 80019ae: 3202 adds r2, #2 80019b0: b2db uxtb r3, r3 80019b2: 429a cmp r2, r3 80019b4: da2f bge.n 8001a16 printf("Check Sum error \n"); 80019b6: 481c ldr r0, [pc, #112] ; (8001a28 ) 80019b8: f000 fc7c bl 80022b4 AckData_Buf[bluecell_type] = FirmwareUpdataNak; 80019bc: 2222 movs r2, #34 ; 0x22 80019be: 4b1b ldr r3, [pc, #108] ; (8001a2c ) 80019c0: 705a strb r2, [r3, #1] 80019c2: e00f b.n 80019e4 AckData_Buf[bluecell_type] = FirmwareUpdataAck; 80019c4: 2211 movs r2, #17 80019c6: 4d19 ldr r5, [pc, #100] ; (8001a2c ) 80019c8: 706a strb r2, [r5, #1] if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte 80019ca: 7862 ldrb r2, [r4, #1] 80019cc: 2add cmp r2, #221 ; 0xdd 80019ce: d001 beq.n 80019d4 80019d0: 2aee cmp r2, #238 ; 0xee 80019d2: d107 bne.n 80019e4 ret = Flash_write(&data[0]); 80019d4: 4620 mov r0, r4 80019d6: f000 f8b9 bl 8001b4c if(ret == 1) 80019da: b2c0 uxtb r0, r0 80019dc: 2801 cmp r0, #1 80019de: d101 bne.n 80019e4 AckData_Buf[bluecell_type] = FirmwareUpdataNak; 80019e0: 2322 movs r3, #34 ; 0x22 80019e2: 706b strb r3, [r5, #1] } AckData_Buf[bluecell_crc] = STH30_CreateCrc(&AckData_Buf[bluecell_type],AckData_Buf[bluecell_length]); 80019e4: 4d11 ldr r5, [pc, #68] ; (8001a2c ) 80019e6: 78a9 ldrb r1, [r5, #2] 80019e8: 1c68 adds r0, r5, #1 80019ea: f000 f823 bl 8001a34 80019ee: 7128 strb r0, [r5, #4] if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){ 80019f0: 7863 ldrb r3, [r4, #1] 80019f2: 2bee cmp r3, #238 ; 0xee 80019f4: d007 beq.n 8001a06 80019f6: 2b0a cmp r3, #10 80019f8: d005 beq.n 8001a06 Uart1_Data_Send(&AckData_Buf[bluecell_stx],AckData_Buf[bluecell_length] + 3); 80019fa: 78a9 ldrb r1, [r5, #2] 80019fc: 4628 mov r0, r5 80019fe: 3103 adds r1, #3 8001a00: b2c9 uxtb r1, r1 8001a02: f000 fb83 bl 800210c } if(data[bluecell_type] == 0xEE) 8001a06: 7863 ldrb r3, [r4, #1] 8001a08: 2bee cmp r3, #238 ; 0xee 8001a0a: d10a bne.n 8001a22 printf("update Complete \n"); } 8001a0c: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} printf("update Complete \n"); 8001a10: 4807 ldr r0, [pc, #28] ; (8001a30 ) 8001a12: f000 bc4f b.w 80022b4 printf("%02x ",data[i]); 8001a16: 5ce1 ldrb r1, [r4, r3] 8001a18: 4630 mov r0, r6 8001a1a: f000 fbd7 bl 80021cc 8001a1e: 462b mov r3, r5 8001a20: e7c3 b.n 80019aa 8001a22: bd70 pop {r4, r5, r6, pc} 8001a24: 08003240 .word 0x08003240 8001a28: 08003246 .word 0x08003246 8001a2c: 20000008 .word 0x20000008 8001a30: 08003257 .word 0x08003257 08001a34 : } return(crc16 == checksum ? CHECKSUM_ERROR : NO_ERROR ); } uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 8001a34: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001a36: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001a38: 4604 mov r4, r0 8001a3a: 1a22 subs r2, r4, r0 8001a3c: b2d2 uxtb r2, r2 8001a3e: 4291 cmp r1, r2 8001a40: d801 bhi.n 8001a46 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 8001a42: 4618 mov r0, r3 8001a44: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 8001a46: f814 2b01 ldrb.w r2, [r4], #1 8001a4a: 4053 eors r3, r2 8001a4c: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001a4e: f013 0f80 tst.w r3, #128 ; 0x80 8001a52: f102 32ff add.w r2, r2, #4294967295 8001a56: ea4f 0343 mov.w r3, r3, lsl #1 8001a5a: bf18 it ne 8001a5c: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001a60: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8001a64: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001a66: d1f2 bne.n 8001a4e 8001a68: e7e7 b.n 8001a3a 08001a6a : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8001a6a: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001a6c: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001a6e: 4605 mov r5, r0 8001a70: 1a2c subs r4, r5, r0 8001a72: b2e4 uxtb r4, r4 8001a74: 42a1 cmp r1, r4 8001a76: d803 bhi.n 8001a80 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8001a78: 1a9b subs r3, r3, r2 8001a7a: 4258 negs r0, r3 8001a7c: 4158 adcs r0, r3 8001a7e: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8001a80: f815 4b01 ldrb.w r4, [r5], #1 8001a84: 4063 eors r3, r4 8001a86: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001a88: f013 0f80 tst.w r3, #128 ; 0x80 8001a8c: f104 34ff add.w r4, r4, #4294967295 8001a90: ea4f 0343 mov.w r3, r3, lsl #1 8001a94: bf18 it ne 8001a96: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001a9a: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8001a9e: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001aa0: d1f2 bne.n 8001a88 8001aa2: e7e5 b.n 8001a70 08001aa4 : uint32_t Address = FLASH_USER_START_ADDR; typedef void (*fptr)(void); fptr jump_to_app; uint32_t jump_addr; void Jump_App(void){ 8001aa4: b5b0 push {r4, r5, r7, lr} __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001aa6: 4a0d ldr r2, [pc, #52] ; (8001adc ) void Jump_App(void){ 8001aa8: af00 add r7, sp, #0 __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001aaa: 69d3 ldr r3, [r2, #28] printf("boot loader start\n"); //硫붿꽭占�? 異쒕젰 8001aac: 480c ldr r0, [pc, #48] ; (8001ae0 ) __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001aae: f023 0310 bic.w r3, r3, #16 8001ab2: 61d3 str r3, [r2, #28] printf("boot loader start\n"); //硫붿꽭占�? 異쒕젰 8001ab4: f000 fbfe bl 80022b4 jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8001ab8: 4b0a ldr r3, [pc, #40] ; (8001ae4 ) 8001aba: 4a0b ldr r2, [pc, #44] ; (8001ae8 ) 8001abc: 681b ldr r3, [r3, #0] jump_to_app = (fptr) jump_addr; 8001abe: 4c0b ldr r4, [pc, #44] ; (8001aec ) /* init user app's sp */ printf("jump!\n"); 8001ac0: 480b ldr r0, [pc, #44] ; (8001af0 ) jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8001ac2: 6013 str r3, [r2, #0] jump_to_app = (fptr) jump_addr; 8001ac4: 6023 str r3, [r4, #0] printf("jump!\n"); 8001ac6: f000 fbf5 bl 80022b4 __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); 8001aca: 4b0a ldr r3, [pc, #40] ; (8001af4 ) 8001acc: 681b ldr r3, [r3, #0] __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); 8001ace: f383 8808 msr MSP, r3 jump_to_app(); 8001ad2: 6823 ldr r3, [r4, #0] } 8001ad4: 46bd mov sp, r7 8001ad6: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr} jump_to_app(); 8001ada: 4718 bx r3 8001adc: 40021000 .word 0x40021000 8001ae0: 08003283 .word 0x08003283 8001ae4: 08004004 .word 0x08004004 8001ae8: 200004f8 .word 0x200004f8 8001aec: 200004fc .word 0x200004fc 8001af0: 08003295 .word 0x08003295 8001af4: 08004000 .word 0x08004000 08001af8 : } #endif // PYJ.2019.03.27_END -- } uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001af8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint16_t Firmdata = 0; uint8_t ret = 0; for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001afc: 2400 movs r4, #0 uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001afe: 4607 mov r7, r0 uint8_t ret = 0; 8001b00: 4626 mov r6, r4 Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001b02: 4d10 ldr r5, [pc, #64] ; (8001b44 ) printf("HAL NOT OK \n"); 8001b04: f8df 8040 ldr.w r8, [pc, #64] ; 8001b48 for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001b08: 78bb ldrb r3, [r7, #2] 8001b0a: 3b02 subs r3, #2 8001b0c: 429c cmp r4, r3 8001b0e: db02 blt.n 8001b16 Address += 2; //if(!(i%FirmwareUpdateDelay)) // HAL_Delay(1); } return ret; } 8001b10: 4630 mov r0, r6 8001b12: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); 8001b16: 193b adds r3, r7, r4 8001b18: 78da ldrb r2, [r3, #3] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001b1a: 791b ldrb r3, [r3, #4] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001b1c: 6829 ldr r1, [r5, #0] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001b1e: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001b22: b292 uxth r2, r2 8001b24: 2300 movs r3, #0 8001b26: 2001 movs r0, #1 8001b28: f7fe fe6e bl 8000808 8001b2c: b118 cbz r0, 8001b36 printf("HAL NOT OK \n"); 8001b2e: 4640 mov r0, r8 8001b30: f000 fbc0 bl 80022b4 ret = 1; 8001b34: 2601 movs r6, #1 Address += 2; 8001b36: 682b ldr r3, [r5, #0] for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001b38: 3402 adds r4, #2 Address += 2; 8001b3a: 3302 adds r3, #2 8001b3c: 602b str r3, [r5, #0] for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001b3e: b2e4 uxtb r4, r4 8001b40: e7e2 b.n 8001b08 8001b42: bf00 nop 8001b44: 20000014 .word 0x20000014 8001b48: 08003268 .word 0x08003268 08001b4c : /*Variable used for Erase procedure*/ static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; /* Fill EraseInit structure*/ EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001b4c: 2300 movs r3, #0 { 8001b4e: b573 push {r0, r1, r4, r5, r6, lr} EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001b50: 4d16 ldr r5, [pc, #88] ; (8001bac ) EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001b52: 4c17 ldr r4, [pc, #92] ; (8001bb0 ) EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001b54: 602b str r3, [r5, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001b56: 4b17 ldr r3, [pc, #92] ; (8001bb4 ) { 8001b58: 4606 mov r6, r0 EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001b5a: 60ab str r3, [r5, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8001b5c: 231f movs r3, #31 8001b5e: 60eb str r3, [r5, #12] __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001b60: 69e3 ldr r3, [r4, #28] 8001b62: f023 0310 bic.w r3, r3, #16 8001b66: 61e3 str r3, [r4, #28] HAL_FLASH_Unlock(); // lock ??占�? 8001b68: f7fe fe08 bl 800077c if(flashinit == 0){ 8001b6c: 4b12 ldr r3, [pc, #72] ; (8001bb8 ) 8001b6e: 781a ldrb r2, [r3, #0] 8001b70: b94a cbnz r2, 8001b86 flashinit= 1; 8001b72: 2201 movs r2, #1 //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001b74: 4911 ldr r1, [pc, #68] ; (8001bbc ) 8001b76: 4628 mov r0, r5 flashinit= 1; 8001b78: 701a strb r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001b7a: f7fe feaf bl 80008dc 8001b7e: b110 cbz r0, 8001b86 printf("Erase Failed \r\n"); 8001b80: 480f ldr r0, [pc, #60] ; (8001bc0 ) 8001b82: f000 fb97 bl 80022b4 } } // FLASH_If_Erase(); ret = Flash_RGB_Data_Write(&data[bluecell_stx]); 8001b86: 4630 mov r0, r6 8001b88: f7ff ffb6 bl 8001af8 8001b8c: 4605 mov r5, r0 HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린 8001b8e: f7fe fe07 bl 80007a0 __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙 return ret; } 8001b92: 4628 mov r0, r5 __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙 8001b94: 69e3 ldr r3, [r4, #28] 8001b96: f043 0310 orr.w r3, r3, #16 8001b9a: 61e3 str r3, [r4, #28] 8001b9c: 69e3 ldr r3, [r4, #28] 8001b9e: f003 0310 and.w r3, r3, #16 8001ba2: 9301 str r3, [sp, #4] 8001ba4: 9b01 ldr r3, [sp, #4] } 8001ba6: b002 add sp, #8 8001ba8: bd70 pop {r4, r5, r6, pc} 8001baa: bf00 nop 8001bac: 2000009c .word 0x2000009c 8001bb0: 40021000 .word 0x40021000 8001bb4: 08004000 .word 0x08004000 8001bb8: 200000b0 .word 0x200000b0 8001bbc: 200000ac .word 0x200000ac 8001bc0: 08003274 .word 0x08003274 08001bc4 : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8001bc4: 6802 ldr r2, [r0, #0] 8001bc6: 4b08 ldr r3, [pc, #32] ; (8001be8 ) 8001bc8: 429a cmp r2, r3 8001bca: d10b bne.n 8001be4 UartTimerCnt++; 8001bcc: 4a07 ldr r2, [pc, #28] ; (8001bec ) 8001bce: 6813 ldr r3, [r2, #0] 8001bd0: 3301 adds r3, #1 8001bd2: 6013 str r3, [r2, #0] LedTimerCnt++; 8001bd4: 4a06 ldr r2, [pc, #24] ; (8001bf0 ) 8001bd6: 6813 ldr r3, [r2, #0] 8001bd8: 3301 adds r3, #1 8001bda: 6013 str r3, [r2, #0] FirmwareTimerCnt++; 8001bdc: 4a05 ldr r2, [pc, #20] ; (8001bf4 ) 8001bde: 6813 ldr r3, [r2, #0] 8001be0: 3301 adds r3, #1 8001be2: 6013 str r3, [r2, #0] 8001be4: 4770 bx lr 8001be6: bf00 nop 8001be8: 40001000 .word 0x40001000 8001bec: 200000bc .word 0x200000bc 8001bf0: 200000b8 .word 0x200000b8 8001bf4: 200000b4 .word 0x200000b4 08001bf8 <_write>: } } int _write (int file, uint8_t *ptr, uint16_t len) { 8001bf8: b510 push {r4, lr} 8001bfa: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8001bfc: 230a movs r3, #10 8001bfe: 4802 ldr r0, [pc, #8] ; (8001c08 <_write+0x10>) 8001c00: f7ff fc88 bl 8001514 return len; } 8001c04: 4620 mov r0, r4 8001c06: bd10 pop {r4, pc} 8001c08: 20000588 .word 0x20000588 08001c0c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001c0c: b510 push {r4, lr} 8001c0e: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001c10: 2228 movs r2, #40 ; 0x28 8001c12: 2100 movs r1, #0 8001c14: a806 add r0, sp, #24 8001c16: f000 fad1 bl 80021bc RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001c1a: 2214 movs r2, #20 8001c1c: 2100 movs r1, #0 8001c1e: a801 add r0, sp, #4 8001c20: f000 facc bl 80021bc /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001c24: 2301 movs r3, #1 8001c26: 930a str r3, [sp, #40] ; 0x28 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001c28: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001c2a: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001c2c: 930b str r3, [sp, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15; 8001c2e: f44f 1350 mov.w r3, #3407872 ; 0x340000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001c32: a806 add r0, sp, #24 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15; 8001c34: 930f str r3, [sp, #60] ; 0x3c RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001c36: 9406 str r4, [sp, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001c38: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001c3a: f7fe ff93 bl 8000b64 { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001c3e: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001c40: f44f 6280 mov.w r2, #1024 ; 0x400 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001c44: 9301 str r3, [sp, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001c46: 2300 movs r3, #0 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001c48: 4621 mov r1, r4 8001c4a: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001c4c: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001c4e: 9303 str r3, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001c50: 9204 str r2, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001c52: 9305 str r3, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001c54: f7ff f94e bl 8000ef4 { Error_Handler(); } } 8001c58: b010 add sp, #64 ; 0x40 8001c5a: bd10 pop {r4, pc} 08001c5c
: { 8001c5c: b580 push {r7, lr} 8001c5e: b088 sub sp, #32 HAL_Init(); 8001c60: f7fe fb10 bl 8000284 SystemClock_Config(); 8001c64: f7ff ffd2 bl 8001c0c * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001c68: 2210 movs r2, #16 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c6a: 4d5c ldr r5, [pc, #368] ; (8001ddc ) GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001c6c: 2100 movs r1, #0 8001c6e: eb0d 0002 add.w r0, sp, r2 8001c72: f000 faa3 bl 80021bc __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c76: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001c78: 2200 movs r2, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c7a: f043 0304 orr.w r3, r3, #4 8001c7e: 61ab str r3, [r5, #24] 8001c80: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001c82: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c86: f003 0304 and.w r3, r3, #4 8001c8a: 9302 str r3, [sp, #8] 8001c8c: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOG_CLK_ENABLE(); 8001c8e: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001c90: 4853 ldr r0, [pc, #332] ; (8001de0 ) __HAL_RCC_GPIOG_CLK_ENABLE(); 8001c92: f443 7380 orr.w r3, r3, #256 ; 0x100 8001c96: 61ab str r3, [r5, #24] 8001c98: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); /*Configure GPIO pin : PA15 */ GPIO_InitStruct.Pin = GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8001c9a: 2400 movs r4, #0 __HAL_RCC_GPIOG_CLK_ENABLE(); 8001c9c: f403 7380 and.w r3, r3, #256 ; 0x100 8001ca0: 9303 str r3, [sp, #12] 8001ca2: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001ca4: f7fe ff54 bl 8000b50 HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001ca8: 2200 movs r2, #0 8001caa: f44f 4180 mov.w r1, #16384 ; 0x4000 8001cae: 484d ldr r0, [pc, #308] ; (8001de4 ) 8001cb0: f7fe ff4e bl 8000b50 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001cb4: 2701 movs r7, #1 GPIO_InitStruct.Pin = GPIO_PIN_15; 8001cb6: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001cba: 2602 movs r6, #2 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001cbc: a904 add r1, sp, #16 8001cbe: 4848 ldr r0, [pc, #288] ; (8001de0 ) GPIO_InitStruct.Pin = GPIO_PIN_15; 8001cc0: 9304 str r3, [sp, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001cc2: 9607 str r6, [sp, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001cc4: 9705 str r7, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001cc6: 9406 str r4, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001cc8: f7fe fe56 bl 8000978 /*Configure GPIO pin : BOOT_LED_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin; 8001ccc: f44f 4380 mov.w r3, #16384 ; 0x4000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8001cd0: a904 add r1, sp, #16 8001cd2: 4844 ldr r0, [pc, #272] ; (8001de4 ) GPIO_InitStruct.Pin = BOOT_LED_Pin; 8001cd4: 9304 str r3, [sp, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001cd6: 9607 str r6, [sp, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001cd8: 9705 str r7, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001cda: 9406 str r4, [sp, #24] HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8001cdc: f7fe fe4c bl 8000978 __HAL_RCC_DMA1_CLK_ENABLE(); 8001ce0: 696b ldr r3, [r5, #20] huart1.Instance = USART1; 8001ce2: 4841 ldr r0, [pc, #260] ; (8001de8 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001ce4: 433b orrs r3, r7 8001ce6: 616b str r3, [r5, #20] 8001ce8: 696b ldr r3, [r5, #20] huart1.Init.BaudRate = 115200; 8001cea: 4a40 ldr r2, [pc, #256] ; (8001dec ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001cec: 403b ands r3, r7 8001cee: 9301 str r3, [sp, #4] 8001cf0: 9b01 ldr r3, [sp, #4] huart1.Init.BaudRate = 115200; 8001cf2: f44f 33e1 mov.w r3, #115200 ; 0x1c200 8001cf6: e880 000c stmia.w r0, {r2, r3} huart1.Init.Mode = UART_MODE_TX_RX; 8001cfa: 230c movs r3, #12 huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001cfc: 6084 str r4, [r0, #8] huart1.Init.Mode = UART_MODE_TX_RX; 8001cfe: 6143 str r3, [r0, #20] huart1.Init.StopBits = UART_STOPBITS_1; 8001d00: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 8001d02: 6104 str r4, [r0, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001d04: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001d06: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8001d08: f7ff fbd6 bl 80014b8 htim6.Init.Prescaler = 6000 - 1; 8001d0c: f241 736f movw r3, #5999 ; 0x176f htim6.Instance = TIM6; 8001d10: 4d37 ldr r5, [pc, #220] ; (8001df0 ) htim6.Init.Prescaler = 6000 - 1; 8001d12: 4938 ldr r1, [pc, #224] ; (8001df4 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001d14: 4628 mov r0, r5 htim6.Init.Prescaler = 6000 - 1; 8001d16: e885 000a stmia.w r5, {r1, r3} htim6.Init.Period = 10 - 1; 8001d1a: 2309 movs r3, #9 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8001d1c: 60ac str r4, [r5, #8] htim6.Init.Period = 10 - 1; 8001d1e: 60eb str r3, [r5, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001d20: 61ac str r4, [r5, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8001d22: 9404 str r4, [sp, #16] 8001d24: 9405 str r4, [sp, #20] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001d26: f7ff fab5 bl 8001294 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001d2a: a904 add r1, sp, #16 8001d2c: 4628 mov r0, r5 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001d2e: 9404 str r4, [sp, #16] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001d30: 9405 str r4, [sp, #20] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001d32: f7ff fac9 bl 80012c8 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8001d36: 4622 mov r2, r4 8001d38: 4621 mov r1, r4 8001d3a: 200f movs r0, #15 8001d3c: f7fe fad8 bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 8001d40: 200f movs r0, #15 8001d42: f7fe fb09 bl 8000358 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8001d46: 4622 mov r2, r4 8001d48: 4621 mov r1, r4 8001d4a: 2025 movs r0, #37 ; 0x25 8001d4c: f7fe fad0 bl 80002f0 HAL_NVIC_EnableIRQ(USART1_IRQn); 8001d50: 2025 movs r0, #37 ; 0x25 8001d52: f7fe fb01 bl 8000358 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8001d56: 4622 mov r2, r4 8001d58: 4621 mov r1, r4 8001d5a: 2036 movs r0, #54 ; 0x36 8001d5c: f7fe fac8 bl 80002f0 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001d60: 2036 movs r0, #54 ; 0x36 8001d62: f7fe faf9 bl 8000358 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 8001d66: 4622 mov r2, r4 8001d68: 4621 mov r1, r4 8001d6a: 200e movs r0, #14 8001d6c: f7fe fac0 bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 8001d70: 200e movs r0, #14 8001d72: f7fe faf1 bl 8000358 HAL_TIM_Base_Start_IT(&htim6); 8001d76: 4628 mov r0, r5 8001d78: f7ff f98e bl 8001098 setbuf(stdout, NULL); 8001d7c: 4b1e ldr r3, [pc, #120] ; (8001df8 ) 8001d7e: 4621 mov r1, r4 8001d80: 681b ldr r3, [r3, #0] if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;} 8001d82: 4e18 ldr r6, [pc, #96] ; (8001de4 ) setbuf(stdout, NULL); 8001d84: 6898 ldr r0, [r3, #8] 8001d86: f000 fa9d bl 80022c4 Firmware_BootStart_Signal(); 8001d8a: f7ff fdef bl 800196c InitUartQueue(&TerminalQueue); 8001d8e: 481b ldr r0, [pc, #108] ; (8001dfc ) 8001d90: f000 f95c bl 800204c while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8001d94: 4d1a ldr r5, [pc, #104] ; (8001e00 ) if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;} 8001d96: 4c1b ldr r4, [pc, #108] ; (8001e04 ) 8001d98: 6823 ldr r3, [r4, #0] 8001d9a: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 8001d9e: d906 bls.n 8001dae 8001da0: f44f 4180 mov.w r1, #16384 ; 0x4000 8001da4: 4630 mov r0, r6 8001da6: f7fe fed8 bl 8000b5a 8001daa: 2300 movs r3, #0 8001dac: 6023 str r3, [r4, #0] while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8001dae: 4c13 ldr r4, [pc, #76] ; (8001dfc ) 8001db0: 4f0d ldr r7, [pc, #52] ; (8001de8 ) 8001db2: 68a3 ldr r3, [r4, #8] 8001db4: 2b00 cmp r3, #0 8001db6: dd02 ble.n 8001dbe 8001db8: 682b ldr r3, [r5, #0] 8001dba: 2b1e cmp r3, #30 8001dbc: d803 bhi.n 8001dc6 while(FirmwareTimerCnt > 3000) Jump_App(); 8001dbe: 4f12 ldr r7, [pc, #72] ; (8001e08 ) 8001dc0: f640 34b8 movw r4, #3000 ; 0xbb8 8001dc4: e005 b.n 8001dd2 while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8001dc6: 4638 mov r0, r7 8001dc8: f000 f94e bl 8002068 8001dcc: e7f1 b.n 8001db2 while(FirmwareTimerCnt > 3000) Jump_App(); 8001dce: f7ff fe69 bl 8001aa4 8001dd2: 683b ldr r3, [r7, #0] 8001dd4: 42a3 cmp r3, r4 8001dd6: d8fa bhi.n 8001dce 8001dd8: e7dd b.n 8001d96 8001dda: bf00 nop 8001ddc: 40021000 .word 0x40021000 8001de0: 40010800 .word 0x40010800 8001de4: 40012000 .word 0x40012000 8001de8: 20000588 .word 0x20000588 8001dec: 40013800 .word 0x40013800 8001df0: 200005c8 .word 0x200005c8 8001df4: 40001000 .word 0x40001000 8001df8: 2000001c .word 0x2000001c 8001dfc: 20000608 .word 0x20000608 8001e00: 200000bc .word 0x200000bc 8001e04: 200000b8 .word 0x200000b8 8001e08: 200000b4 .word 0x200000b4 08001e0c : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001e0c: 4770 bx lr ... 08001e10 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001e10: 4b0e ldr r3, [pc, #56] ; (8001e4c ) { 8001e12: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8001e14: 699a ldr r2, [r3, #24] 8001e16: f042 0201 orr.w r2, r2, #1 8001e1a: 619a str r2, [r3, #24] 8001e1c: 699a ldr r2, [r3, #24] 8001e1e: f002 0201 and.w r2, r2, #1 8001e22: 9200 str r2, [sp, #0] 8001e24: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8001e26: 69da ldr r2, [r3, #28] 8001e28: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8001e2c: 61da str r2, [r3, #28] 8001e2e: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001e30: 4a07 ldr r2, [pc, #28] ; (8001e50 ) __HAL_RCC_PWR_CLK_ENABLE(); 8001e32: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001e36: 9301 str r3, [sp, #4] 8001e38: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001e3a: 6853 ldr r3, [r2, #4] 8001e3c: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8001e40: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8001e44: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001e46: b002 add sp, #8 8001e48: 4770 bx lr 8001e4a: bf00 nop 8001e4c: 40021000 .word 0x40021000 8001e50: 40010000 .word 0x40010000 08001e54 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8001e54: 6802 ldr r2, [r0, #0] 8001e56: 4b08 ldr r3, [pc, #32] ; (8001e78 ) { 8001e58: b082 sub sp, #8 if(htim_base->Instance==TIM6) 8001e5a: 429a cmp r2, r3 8001e5c: d10a bne.n 8001e74 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8001e5e: f503 3300 add.w r3, r3, #131072 ; 0x20000 8001e62: 69da ldr r2, [r3, #28] 8001e64: f042 0210 orr.w r2, r2, #16 8001e68: 61da str r2, [r3, #28] 8001e6a: 69db ldr r3, [r3, #28] 8001e6c: f003 0310 and.w r3, r3, #16 8001e70: 9301 str r3, [sp, #4] 8001e72: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8001e74: b002 add sp, #8 8001e76: 4770 bx lr 8001e78: 40001000 .word 0x40001000 08001e7c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001e7c: b570 push {r4, r5, r6, lr} 8001e7e: 4606 mov r6, r0 8001e80: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001e82: 2210 movs r2, #16 8001e84: 2100 movs r1, #0 8001e86: a802 add r0, sp, #8 8001e88: f000 f998 bl 80021bc if(huart->Instance==USART1) 8001e8c: 6832 ldr r2, [r6, #0] 8001e8e: 4b2b ldr r3, [pc, #172] ; (8001f3c ) 8001e90: 429a cmp r2, r3 8001e92: d151 bne.n 8001f38 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8001e94: f503 4358 add.w r3, r3, #55296 ; 0xd800 8001e98: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001e9a: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8001e9c: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8001ea0: 619a str r2, [r3, #24] 8001ea2: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001ea4: 4826 ldr r0, [pc, #152] ; (8001f40 ) __HAL_RCC_USART1_CLK_ENABLE(); 8001ea6: f402 4280 and.w r2, r2, #16384 ; 0x4000 8001eaa: 9200 str r2, [sp, #0] 8001eac: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001eae: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001eb0: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001eb2: f042 0204 orr.w r2, r2, #4 8001eb6: 619a str r2, [r3, #24] 8001eb8: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 8001eba: 4c22 ldr r4, [pc, #136] ; (8001f44 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8001ebc: f003 0304 and.w r3, r3, #4 8001ec0: 9301 str r3, [sp, #4] 8001ec2: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8001ec4: f44f 7300 mov.w r3, #512 ; 0x200 8001ec8: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001eca: 2302 movs r3, #2 8001ecc: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001ece: 2303 movs r3, #3 8001ed0: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001ed2: f7fe fd51 bl 8000978 GPIO_InitStruct.Pin = GPIO_PIN_10; 8001ed6: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001eda: 4819 ldr r0, [pc, #100] ; (8001f40 ) 8001edc: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8001ede: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001ee0: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001ee2: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001ee4: f7fe fd48 bl 8000978 hdma_usart1_rx.Instance = DMA1_Channel5; 8001ee8: 4b17 ldr r3, [pc, #92] ; (8001f48 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8001eea: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8001eec: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8001ef0: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 8001ef2: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8001ef4: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8001ef6: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8001ef8: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 8001efa: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 8001efc: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8001efe: f7fe fa4d bl 800039c 8001f02: b108 cbz r0, 8001f08 { Error_Handler(); 8001f04: f7ff ff82 bl 8001e0c __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8001f08: f04f 0c10 mov.w ip, #16 8001f0c: 4b0f ldr r3, [pc, #60] ; (8001f4c ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 8001f0e: 6374 str r4, [r6, #52] ; 0x34 8001f10: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 8001f12: 4c0f ldr r4, [pc, #60] ; (8001f50 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8001f14: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8001f16: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8001f1a: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8001f1c: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8001f1e: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8001f20: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8001f22: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8001f24: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 8001f26: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8001f28: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8001f2a: f7fe fa37 bl 800039c 8001f2e: b108 cbz r0, 8001f34 { Error_Handler(); 8001f30: f7ff ff6c bl 8001e0c } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 8001f34: 6334 str r4, [r6, #48] ; 0x30 8001f36: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8001f38: b006 add sp, #24 8001f3a: bd70 pop {r4, r5, r6, pc} 8001f3c: 40013800 .word 0x40013800 8001f40: 40010800 .word 0x40010800 8001f44: 20000544 .word 0x20000544 8001f48: 40020058 .word 0x40020058 8001f4c: 40020044 .word 0x40020044 8001f50: 20000500 .word 0x20000500 08001f54 : 8001f54: 4770 bx lr 08001f56 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001f56: e7fe b.n 8001f56 08001f58 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001f58: e7fe b.n 8001f58 08001f5a : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8001f5a: e7fe b.n 8001f5a 08001f5c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001f5c: e7fe b.n 8001f5c 08001f5e : 8001f5e: 4770 bx lr 08001f60 : 8001f60: 4770 bx lr 08001f62 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8001f62: 4770 bx lr 08001f64 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001f64: f7fe b9a0 b.w 80002a8 08001f68 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8001f68: 4801 ldr r0, [pc, #4] ; (8001f70 ) 8001f6a: f7fe bb03 b.w 8000574 8001f6e: bf00 nop 8001f70: 20000500 .word 0x20000500 08001f74 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8001f74: 4801 ldr r0, [pc, #4] ; (8001f7c ) 8001f76: f7fe bafd b.w 8000574 8001f7a: bf00 nop 8001f7c: 20000544 .word 0x20000544 08001f80 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8001f80: 4801 ldr r0, [pc, #4] ; (8001f88 ) 8001f82: f7ff bc4b b.w 800181c 8001f86: bf00 nop 8001f88: 20000588 .word 0x20000588 08001f8c : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8001f8c: 4801 ldr r0, [pc, #4] ; (8001f94 ) 8001f8e: f7ff b892 b.w 80010b6 8001f92: bf00 nop 8001f94: 200005c8 .word 0x200005c8 08001f98 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8001f98: b570 push {r4, r5, r6, lr} 8001f9a: 460e mov r6, r1 8001f9c: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8001f9e: 460c mov r4, r1 8001fa0: 1ba3 subs r3, r4, r6 8001fa2: 429d cmp r5, r3 8001fa4: dc01 bgt.n 8001faa <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8001fa6: 4628 mov r0, r5 8001fa8: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 8001faa: f3af 8000 nop.w 8001fae: f804 0b01 strb.w r0, [r4], #1 8001fb2: e7f5 b.n 8001fa0 <_read+0x8> 08001fb4 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8001fb4: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8001fb6: 4b0a ldr r3, [pc, #40] ; (8001fe0 <_sbrk+0x2c>) { 8001fb8: 4602 mov r2, r0 if (heap_end == 0) 8001fba: 6819 ldr r1, [r3, #0] 8001fbc: b909 cbnz r1, 8001fc2 <_sbrk+0xe> heap_end = &end; 8001fbe: 4909 ldr r1, [pc, #36] ; (8001fe4 <_sbrk+0x30>) 8001fc0: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8001fc2: 4669 mov r1, sp prev_heap_end = heap_end; 8001fc4: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8001fc6: 4402 add r2, r0 8001fc8: 428a cmp r2, r1 8001fca: d906 bls.n 8001fda <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8001fcc: f000 f8cc bl 8002168 <__errno> 8001fd0: 230c movs r3, #12 8001fd2: 6003 str r3, [r0, #0] return (caddr_t) -1; 8001fd4: f04f 30ff mov.w r0, #4294967295 8001fd8: bd08 pop {r3, pc} } heap_end += incr; 8001fda: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8001fdc: bd08 pop {r3, pc} 8001fde: bf00 nop 8001fe0: 200000c0 .word 0x200000c0 8001fe4: 20001624 .word 0x20001624 08001fe8 <_close>: int _close(int file) { return -1; } 8001fe8: f04f 30ff mov.w r0, #4294967295 8001fec: 4770 bx lr 08001fee <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 8001fee: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 8001ff2: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8001ff4: 604b str r3, [r1, #4] } 8001ff6: 4770 bx lr 08001ff8 <_isatty>: int _isatty(int file) { return 1; } 8001ff8: 2001 movs r0, #1 8001ffa: 4770 bx lr 08001ffc <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 8001ffc: 2000 movs r0, #0 8001ffe: 4770 bx lr 08002000 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8002000: 4b0f ldr r3, [pc, #60] ; (8002040 ) 8002002: 681a ldr r2, [r3, #0] 8002004: f042 0201 orr.w r2, r2, #1 8002008: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 800200a: 6859 ldr r1, [r3, #4] 800200c: 4a0d ldr r2, [pc, #52] ; (8002044 ) 800200e: 400a ands r2, r1 8002010: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8002012: 681a ldr r2, [r3, #0] 8002014: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8002018: f422 3280 bic.w r2, r2, #65536 ; 0x10000 800201c: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 800201e: 681a ldr r2, [r3, #0] 8002020: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8002024: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8002026: 685a ldr r2, [r3, #4] 8002028: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 800202c: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 800202e: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8002032: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8002034: f04f 6200 mov.w r2, #134217728 ; 0x8000000 8002038: 4b03 ldr r3, [pc, #12] ; (8002048 ) 800203a: 609a str r2, [r3, #8] 800203c: 4770 bx lr 800203e: bf00 nop 8002040: 40021000 .word 0x40021000 8002044: f8ff0000 .word 0xf8ff0000 8002048: e000ed00 .word 0xe000ed00 0800204c : UARTQUEUE TerminalQueue; UARTQUEUE WifiQueue; void InitUartQueue(pUARTQUEUE pQueue) { pQueue->data = pQueue->head = pQueue->tail = 0; 800204c: 2300 movs r3, #0 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 800204e: 2201 movs r2, #1 pQueue->data = pQueue->head = pQueue->tail = 0; 8002050: 6043 str r3, [r0, #4] 8002052: 6003 str r3, [r0, #0] 8002054: 6083 str r3, [r0, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8002056: 4902 ldr r1, [pc, #8] ; (8002060 ) 8002058: 4802 ldr r0, [pc, #8] ; (8002064 ) 800205a: f7ff baf1 b.w 8001640 800205e: bf00 nop 8002060: 20000614 .word 0x20000614 8002064: 20000588 .word 0x20000588 08002068 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8002068: 4a11 ldr r2, [pc, #68] ; (80020b0 ) { 800206a: b538 push {r3, r4, r5, lr} update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 800206c: 6814 ldr r4, [r2, #0] 800206e: 1c63 adds r3, r4, #1 8002070: 6013 str r3, [r2, #0] 8002072: 4b10 ldr r3, [pc, #64] ; (80020b4 ) 8002074: 6859 ldr r1, [r3, #4] 8002076: f103 000c add.w r0, r3, #12 800207a: 5c0d ldrb r5, [r1, r0] pQueue->tail++; 800207c: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 800207e: f5b1 6f00 cmp.w r1, #2048 ; 0x800 8002082: bfa8 it ge 8002084: 2100 movge r1, #0 update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8002086: 480c ldr r0, [pc, #48] ; (80020b8 ) if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8002088: 6059 str r1, [r3, #4] update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 800208a: 5505 strb r5, [r0, r4] pQueue->data--; 800208c: 689c ldr r4, [r3, #8] 800208e: 4605 mov r5, r0 8002090: 3c01 subs r4, #1 8002092: 609c str r4, [r3, #8] if(pQueue->data == 0){ 8002094: b95c cbnz r4, 80020ae // for(int i = 0; i < cnt; i++){ // printf("%02x",update_data_buf[i]); // } #endif // PYJ.2019.07.15_END -- cnt = 0; FirmwareUpdateStart(&update_data_buf[0]); 8002096: 4808 ldr r0, [pc, #32] ; (80020b8 ) cnt = 0; 8002098: 6014 str r4, [r2, #0] FirmwareUpdateStart(&update_data_buf[0]); 800209a: f7ff fc79 bl 8001990 for(int i = 0; i < 1024; i++) update_data_buf[i] = 0; 800209e: 4623 mov r3, r4 80020a0: 552b strb r3, [r5, r4] for(int i = 0; i < 1024; i++) 80020a2: 3401 adds r4, #1 80020a4: f5b4 6f80 cmp.w r4, #1024 ; 0x400 80020a8: d1fa bne.n 80020a0 FirmwareTimerCnt = 0; 80020aa: 4a04 ldr r2, [pc, #16] ; (80020bc ) 80020ac: 6013 str r3, [r2, #0] 80020ae: bd38 pop {r3, r4, r5, pc} 80020b0: 200000c4 .word 0x200000c4 80020b4: 20000608 .word 0x20000608 80020b8: 200000c8 .word 0x200000c8 80020bc: 200000b4 .word 0x200000b4 080020c0 : UartTimerCnt = 0; 80020c0: 2300 movs r3, #0 { 80020c2: b510 push {r4, lr} UartTimerCnt = 0; 80020c4: 4a0d ldr r2, [pc, #52] ; (80020fc ) pQueue->head++; 80020c6: 4c0e ldr r4, [pc, #56] ; (8002100 ) UartTimerCnt = 0; 80020c8: 6013 str r3, [r2, #0] pQueue->head++; 80020ca: 6822 ldr r2, [r4, #0] 80020cc: 3201 adds r2, #1 80020ce: f5b2 6f00 cmp.w r2, #2048 ; 0x800 80020d2: bfb8 it lt 80020d4: 4613 movlt r3, r2 80020d6: 6023 str r3, [r4, #0] pQueue->data++; 80020d8: 68a3 ldr r3, [r4, #8] 80020da: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 80020dc: f5b3 6f00 cmp.w r3, #2048 ; 0x800 pQueue->data++; 80020e0: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 80020e2: db01 blt.n 80020e8 GetDataFromUartQueue(huart); 80020e4: f7ff ffc0 bl 8002068 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 80020e8: 6823 ldr r3, [r4, #0] 80020ea: 4906 ldr r1, [pc, #24] ; (8002104 ) 80020ec: 2201 movs r2, #1 } 80020ee: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 80020f2: 4419 add r1, r3 80020f4: 4804 ldr r0, [pc, #16] ; (8002108 ) 80020f6: f7ff baa3 b.w 8001640 80020fa: bf00 nop 80020fc: 200000bc .word 0x200000bc 8002100: 20000608 .word 0x20000608 8002104: 20000614 .word 0x20000614 8002108: 20000588 .word 0x20000588 0800210c : } } void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit_DMA(&huart1, data,size); 800210c: 460a mov r2, r1 800210e: 4601 mov r1, r0 8002110: 4801 ldr r0, [pc, #4] ; (8002118 ) 8002112: f7ff ba5b b.w 80015cc 8002116: bf00 nop 8002118: 20000588 .word 0x20000588 0800211c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 800211c: 2100 movs r1, #0 b LoopCopyDataInit 800211e: e003 b.n 8002128 08002120 : CopyDataInit: ldr r3, =_sidata 8002120: 4b0b ldr r3, [pc, #44] ; (8002150 ) ldr r3, [r3, r1] 8002122: 585b ldr r3, [r3, r1] str r3, [r0, r1] 8002124: 5043 str r3, [r0, r1] adds r1, r1, #4 8002126: 3104 adds r1, #4 08002128 : LoopCopyDataInit: ldr r0, =_sdata 8002128: 480a ldr r0, [pc, #40] ; (8002154 ) ldr r3, =_edata 800212a: 4b0b ldr r3, [pc, #44] ; (8002158 ) adds r2, r0, r1 800212c: 1842 adds r2, r0, r1 cmp r2, r3 800212e: 429a cmp r2, r3 bcc CopyDataInit 8002130: d3f6 bcc.n 8002120 ldr r2, =_sbss 8002132: 4a0a ldr r2, [pc, #40] ; (800215c ) b LoopFillZerobss 8002134: e002 b.n 800213c 08002136 : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 8002136: 2300 movs r3, #0 str r3, [r2], #4 8002138: f842 3b04 str.w r3, [r2], #4 0800213c : LoopFillZerobss: ldr r3, = _ebss 800213c: 4b08 ldr r3, [pc, #32] ; (8002160 ) cmp r2, r3 800213e: 429a cmp r2, r3 bcc FillZerobss 8002140: d3f9 bcc.n 8002136 /* Call the clock system intitialization function.*/ bl SystemInit 8002142: f7ff ff5d bl 8002000 /* Call static constructors */ bl __libc_init_array 8002146: f000 f815 bl 8002174 <__libc_init_array> /* Call the application's entry point.*/ bl main 800214a: f7ff fd87 bl 8001c5c
bx lr 800214e: 4770 bx lr ldr r3, =_sidata 8002150: 08003354 .word 0x08003354 ldr r0, =_sdata 8002154: 20000000 .word 0x20000000 ldr r3, =_edata 8002158: 20000080 .word 0x20000080 ldr r2, =_sbss 800215c: 20000080 .word 0x20000080 ldr r3, = _ebss 8002160: 20001624 .word 0x20001624 08002164 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8002164: e7fe b.n 8002164 ... 08002168 <__errno>: 8002168: 4b01 ldr r3, [pc, #4] ; (8002170 <__errno+0x8>) 800216a: 6818 ldr r0, [r3, #0] 800216c: 4770 bx lr 800216e: bf00 nop 8002170: 2000001c .word 0x2000001c 08002174 <__libc_init_array>: 8002174: b570 push {r4, r5, r6, lr} 8002176: 2500 movs r5, #0 8002178: 4e0c ldr r6, [pc, #48] ; (80021ac <__libc_init_array+0x38>) 800217a: 4c0d ldr r4, [pc, #52] ; (80021b0 <__libc_init_array+0x3c>) 800217c: 1ba4 subs r4, r4, r6 800217e: 10a4 asrs r4, r4, #2 8002180: 42a5 cmp r5, r4 8002182: d109 bne.n 8002198 <__libc_init_array+0x24> 8002184: f001 f848 bl 8003218 <_init> 8002188: 2500 movs r5, #0 800218a: 4e0a ldr r6, [pc, #40] ; (80021b4 <__libc_init_array+0x40>) 800218c: 4c0a ldr r4, [pc, #40] ; (80021b8 <__libc_init_array+0x44>) 800218e: 1ba4 subs r4, r4, r6 8002190: 10a4 asrs r4, r4, #2 8002192: 42a5 cmp r5, r4 8002194: d105 bne.n 80021a2 <__libc_init_array+0x2e> 8002196: bd70 pop {r4, r5, r6, pc} 8002198: f856 3025 ldr.w r3, [r6, r5, lsl #2] 800219c: 4798 blx r3 800219e: 3501 adds r5, #1 80021a0: e7ee b.n 8002180 <__libc_init_array+0xc> 80021a2: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80021a6: 4798 blx r3 80021a8: 3501 adds r5, #1 80021aa: e7f2 b.n 8002192 <__libc_init_array+0x1e> 80021ac: 0800334c .word 0x0800334c 80021b0: 0800334c .word 0x0800334c 80021b4: 0800334c .word 0x0800334c 80021b8: 08003350 .word 0x08003350 080021bc : 80021bc: 4603 mov r3, r0 80021be: 4402 add r2, r0 80021c0: 4293 cmp r3, r2 80021c2: d100 bne.n 80021c6 80021c4: 4770 bx lr 80021c6: f803 1b01 strb.w r1, [r3], #1 80021ca: e7f9 b.n 80021c0 080021cc : 80021cc: b40f push {r0, r1, r2, r3} 80021ce: 4b0a ldr r3, [pc, #40] ; (80021f8 ) 80021d0: b513 push {r0, r1, r4, lr} 80021d2: 681c ldr r4, [r3, #0] 80021d4: b124 cbz r4, 80021e0 80021d6: 69a3 ldr r3, [r4, #24] 80021d8: b913 cbnz r3, 80021e0 80021da: 4620 mov r0, r4 80021dc: f000 fada bl 8002794 <__sinit> 80021e0: ab05 add r3, sp, #20 80021e2: 9a04 ldr r2, [sp, #16] 80021e4: 68a1 ldr r1, [r4, #8] 80021e6: 4620 mov r0, r4 80021e8: 9301 str r3, [sp, #4] 80021ea: f000 fc9b bl 8002b24 <_vfiprintf_r> 80021ee: b002 add sp, #8 80021f0: e8bd 4010 ldmia.w sp!, {r4, lr} 80021f4: b004 add sp, #16 80021f6: 4770 bx lr 80021f8: 2000001c .word 0x2000001c 080021fc <_puts_r>: 80021fc: b570 push {r4, r5, r6, lr} 80021fe: 460e mov r6, r1 8002200: 4605 mov r5, r0 8002202: b118 cbz r0, 800220c <_puts_r+0x10> 8002204: 6983 ldr r3, [r0, #24] 8002206: b90b cbnz r3, 800220c <_puts_r+0x10> 8002208: f000 fac4 bl 8002794 <__sinit> 800220c: 69ab ldr r3, [r5, #24] 800220e: 68ac ldr r4, [r5, #8] 8002210: b913 cbnz r3, 8002218 <_puts_r+0x1c> 8002212: 4628 mov r0, r5 8002214: f000 fabe bl 8002794 <__sinit> 8002218: 4b23 ldr r3, [pc, #140] ; (80022a8 <_puts_r+0xac>) 800221a: 429c cmp r4, r3 800221c: d117 bne.n 800224e <_puts_r+0x52> 800221e: 686c ldr r4, [r5, #4] 8002220: 89a3 ldrh r3, [r4, #12] 8002222: 071b lsls r3, r3, #28 8002224: d51d bpl.n 8002262 <_puts_r+0x66> 8002226: 6923 ldr r3, [r4, #16] 8002228: b1db cbz r3, 8002262 <_puts_r+0x66> 800222a: 3e01 subs r6, #1 800222c: 68a3 ldr r3, [r4, #8] 800222e: f816 1f01 ldrb.w r1, [r6, #1]! 8002232: 3b01 subs r3, #1 8002234: 60a3 str r3, [r4, #8] 8002236: b9e9 cbnz r1, 8002274 <_puts_r+0x78> 8002238: 2b00 cmp r3, #0 800223a: da2e bge.n 800229a <_puts_r+0x9e> 800223c: 4622 mov r2, r4 800223e: 210a movs r1, #10 8002240: 4628 mov r0, r5 8002242: f000 f8f5 bl 8002430 <__swbuf_r> 8002246: 3001 adds r0, #1 8002248: d011 beq.n 800226e <_puts_r+0x72> 800224a: 200a movs r0, #10 800224c: bd70 pop {r4, r5, r6, pc} 800224e: 4b17 ldr r3, [pc, #92] ; (80022ac <_puts_r+0xb0>) 8002250: 429c cmp r4, r3 8002252: d101 bne.n 8002258 <_puts_r+0x5c> 8002254: 68ac ldr r4, [r5, #8] 8002256: e7e3 b.n 8002220 <_puts_r+0x24> 8002258: 4b15 ldr r3, [pc, #84] ; (80022b0 <_puts_r+0xb4>) 800225a: 429c cmp r4, r3 800225c: bf08 it eq 800225e: 68ec ldreq r4, [r5, #12] 8002260: e7de b.n 8002220 <_puts_r+0x24> 8002262: 4621 mov r1, r4 8002264: 4628 mov r0, r5 8002266: f000 f935 bl 80024d4 <__swsetup_r> 800226a: 2800 cmp r0, #0 800226c: d0dd beq.n 800222a <_puts_r+0x2e> 800226e: f04f 30ff mov.w r0, #4294967295 8002272: bd70 pop {r4, r5, r6, pc} 8002274: 2b00 cmp r3, #0 8002276: da04 bge.n 8002282 <_puts_r+0x86> 8002278: 69a2 ldr r2, [r4, #24] 800227a: 4293 cmp r3, r2 800227c: db06 blt.n 800228c <_puts_r+0x90> 800227e: 290a cmp r1, #10 8002280: d004 beq.n 800228c <_puts_r+0x90> 8002282: 6823 ldr r3, [r4, #0] 8002284: 1c5a adds r2, r3, #1 8002286: 6022 str r2, [r4, #0] 8002288: 7019 strb r1, [r3, #0] 800228a: e7cf b.n 800222c <_puts_r+0x30> 800228c: 4622 mov r2, r4 800228e: 4628 mov r0, r5 8002290: f000 f8ce bl 8002430 <__swbuf_r> 8002294: 3001 adds r0, #1 8002296: d1c9 bne.n 800222c <_puts_r+0x30> 8002298: e7e9 b.n 800226e <_puts_r+0x72> 800229a: 200a movs r0, #10 800229c: 6823 ldr r3, [r4, #0] 800229e: 1c5a adds r2, r3, #1 80022a0: 6022 str r2, [r4, #0] 80022a2: 7018 strb r0, [r3, #0] 80022a4: bd70 pop {r4, r5, r6, pc} 80022a6: bf00 nop 80022a8: 080032d8 .word 0x080032d8 80022ac: 080032f8 .word 0x080032f8 80022b0: 080032b8 .word 0x080032b8 080022b4 : 80022b4: 4b02 ldr r3, [pc, #8] ; (80022c0 ) 80022b6: 4601 mov r1, r0 80022b8: 6818 ldr r0, [r3, #0] 80022ba: f7ff bf9f b.w 80021fc <_puts_r> 80022be: bf00 nop 80022c0: 2000001c .word 0x2000001c 080022c4 : 80022c4: 2900 cmp r1, #0 80022c6: f44f 6380 mov.w r3, #1024 ; 0x400 80022ca: bf0c ite eq 80022cc: 2202 moveq r2, #2 80022ce: 2200 movne r2, #0 80022d0: f000 b800 b.w 80022d4 080022d4 : 80022d4: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 80022d8: 461d mov r5, r3 80022da: 4b51 ldr r3, [pc, #324] ; (8002420 ) 80022dc: 4604 mov r4, r0 80022de: 681e ldr r6, [r3, #0] 80022e0: 460f mov r7, r1 80022e2: 4690 mov r8, r2 80022e4: b126 cbz r6, 80022f0 80022e6: 69b3 ldr r3, [r6, #24] 80022e8: b913 cbnz r3, 80022f0 80022ea: 4630 mov r0, r6 80022ec: f000 fa52 bl 8002794 <__sinit> 80022f0: 4b4c ldr r3, [pc, #304] ; (8002424 ) 80022f2: 429c cmp r4, r3 80022f4: d152 bne.n 800239c 80022f6: 6874 ldr r4, [r6, #4] 80022f8: f1b8 0f02 cmp.w r8, #2 80022fc: d006 beq.n 800230c 80022fe: f1b8 0f01 cmp.w r8, #1 8002302: f200 8089 bhi.w 8002418 8002306: 2d00 cmp r5, #0 8002308: f2c0 8086 blt.w 8002418 800230c: 4621 mov r1, r4 800230e: 4630 mov r0, r6 8002310: f000 f9d6 bl 80026c0 <_fflush_r> 8002314: 6b61 ldr r1, [r4, #52] ; 0x34 8002316: b141 cbz r1, 800232a 8002318: f104 0344 add.w r3, r4, #68 ; 0x44 800231c: 4299 cmp r1, r3 800231e: d002 beq.n 8002326 8002320: 4630 mov r0, r6 8002322: f000 fb2d bl 8002980 <_free_r> 8002326: 2300 movs r3, #0 8002328: 6363 str r3, [r4, #52] ; 0x34 800232a: 2300 movs r3, #0 800232c: 61a3 str r3, [r4, #24] 800232e: 6063 str r3, [r4, #4] 8002330: 89a3 ldrh r3, [r4, #12] 8002332: 061b lsls r3, r3, #24 8002334: d503 bpl.n 800233e 8002336: 6921 ldr r1, [r4, #16] 8002338: 4630 mov r0, r6 800233a: f000 fb21 bl 8002980 <_free_r> 800233e: 89a3 ldrh r3, [r4, #12] 8002340: f1b8 0f02 cmp.w r8, #2 8002344: f423 634a bic.w r3, r3, #3232 ; 0xca0 8002348: f023 0303 bic.w r3, r3, #3 800234c: 81a3 strh r3, [r4, #12] 800234e: d05d beq.n 800240c 8002350: ab01 add r3, sp, #4 8002352: 466a mov r2, sp 8002354: 4621 mov r1, r4 8002356: 4630 mov r0, r6 8002358: f000 faa6 bl 80028a8 <__swhatbuf_r> 800235c: 89a3 ldrh r3, [r4, #12] 800235e: 4318 orrs r0, r3 8002360: 81a0 strh r0, [r4, #12] 8002362: bb2d cbnz r5, 80023b0 8002364: 9d00 ldr r5, [sp, #0] 8002366: 4628 mov r0, r5 8002368: f000 fb02 bl 8002970 800236c: 4607 mov r7, r0 800236e: 2800 cmp r0, #0 8002370: d14e bne.n 8002410 8002372: f8dd 9000 ldr.w r9, [sp] 8002376: 45a9 cmp r9, r5 8002378: d13c bne.n 80023f4 800237a: f04f 30ff mov.w r0, #4294967295 800237e: 89a3 ldrh r3, [r4, #12] 8002380: f043 0302 orr.w r3, r3, #2 8002384: 81a3 strh r3, [r4, #12] 8002386: 2300 movs r3, #0 8002388: 60a3 str r3, [r4, #8] 800238a: f104 0347 add.w r3, r4, #71 ; 0x47 800238e: 6023 str r3, [r4, #0] 8002390: 6123 str r3, [r4, #16] 8002392: 2301 movs r3, #1 8002394: 6163 str r3, [r4, #20] 8002396: b003 add sp, #12 8002398: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 800239c: 4b22 ldr r3, [pc, #136] ; (8002428 ) 800239e: 429c cmp r4, r3 80023a0: d101 bne.n 80023a6 80023a2: 68b4 ldr r4, [r6, #8] 80023a4: e7a8 b.n 80022f8 80023a6: 4b21 ldr r3, [pc, #132] ; (800242c ) 80023a8: 429c cmp r4, r3 80023aa: bf08 it eq 80023ac: 68f4 ldreq r4, [r6, #12] 80023ae: e7a3 b.n 80022f8 80023b0: 2f00 cmp r7, #0 80023b2: d0d8 beq.n 8002366 80023b4: 69b3 ldr r3, [r6, #24] 80023b6: b913 cbnz r3, 80023be 80023b8: 4630 mov r0, r6 80023ba: f000 f9eb bl 8002794 <__sinit> 80023be: f1b8 0f01 cmp.w r8, #1 80023c2: bf08 it eq 80023c4: 89a3 ldrheq r3, [r4, #12] 80023c6: 6027 str r7, [r4, #0] 80023c8: bf04 itt eq 80023ca: f043 0301 orreq.w r3, r3, #1 80023ce: 81a3 strheq r3, [r4, #12] 80023d0: 89a3 ldrh r3, [r4, #12] 80023d2: 6127 str r7, [r4, #16] 80023d4: f013 0008 ands.w r0, r3, #8 80023d8: 6165 str r5, [r4, #20] 80023da: d01b beq.n 8002414 80023dc: f013 0001 ands.w r0, r3, #1 80023e0: f04f 0300 mov.w r3, #0 80023e4: bf1f itttt ne 80023e6: 426d negne r5, r5 80023e8: 60a3 strne r3, [r4, #8] 80023ea: 61a5 strne r5, [r4, #24] 80023ec: 4618 movne r0, r3 80023ee: bf08 it eq 80023f0: 60a5 streq r5, [r4, #8] 80023f2: e7d0 b.n 8002396 80023f4: 4648 mov r0, r9 80023f6: f000 fabb bl 8002970 80023fa: 4607 mov r7, r0 80023fc: 2800 cmp r0, #0 80023fe: d0bc beq.n 800237a 8002400: 89a3 ldrh r3, [r4, #12] 8002402: 464d mov r5, r9 8002404: f043 0380 orr.w r3, r3, #128 ; 0x80 8002408: 81a3 strh r3, [r4, #12] 800240a: e7d3 b.n 80023b4 800240c: 2000 movs r0, #0 800240e: e7b6 b.n 800237e 8002410: 46a9 mov r9, r5 8002412: e7f5 b.n 8002400 8002414: 60a0 str r0, [r4, #8] 8002416: e7be b.n 8002396 8002418: f04f 30ff mov.w r0, #4294967295 800241c: e7bb b.n 8002396 800241e: bf00 nop 8002420: 2000001c .word 0x2000001c 8002424: 080032d8 .word 0x080032d8 8002428: 080032f8 .word 0x080032f8 800242c: 080032b8 .word 0x080032b8 08002430 <__swbuf_r>: 8002430: b5f8 push {r3, r4, r5, r6, r7, lr} 8002432: 460e mov r6, r1 8002434: 4614 mov r4, r2 8002436: 4605 mov r5, r0 8002438: b118 cbz r0, 8002442 <__swbuf_r+0x12> 800243a: 6983 ldr r3, [r0, #24] 800243c: b90b cbnz r3, 8002442 <__swbuf_r+0x12> 800243e: f000 f9a9 bl 8002794 <__sinit> 8002442: 4b21 ldr r3, [pc, #132] ; (80024c8 <__swbuf_r+0x98>) 8002444: 429c cmp r4, r3 8002446: d12a bne.n 800249e <__swbuf_r+0x6e> 8002448: 686c ldr r4, [r5, #4] 800244a: 69a3 ldr r3, [r4, #24] 800244c: 60a3 str r3, [r4, #8] 800244e: 89a3 ldrh r3, [r4, #12] 8002450: 071a lsls r2, r3, #28 8002452: d52e bpl.n 80024b2 <__swbuf_r+0x82> 8002454: 6923 ldr r3, [r4, #16] 8002456: b363 cbz r3, 80024b2 <__swbuf_r+0x82> 8002458: 6923 ldr r3, [r4, #16] 800245a: 6820 ldr r0, [r4, #0] 800245c: b2f6 uxtb r6, r6 800245e: 1ac0 subs r0, r0, r3 8002460: 6963 ldr r3, [r4, #20] 8002462: 4637 mov r7, r6 8002464: 4298 cmp r0, r3 8002466: db04 blt.n 8002472 <__swbuf_r+0x42> 8002468: 4621 mov r1, r4 800246a: 4628 mov r0, r5 800246c: f000 f928 bl 80026c0 <_fflush_r> 8002470: bb28 cbnz r0, 80024be <__swbuf_r+0x8e> 8002472: 68a3 ldr r3, [r4, #8] 8002474: 3001 adds r0, #1 8002476: 3b01 subs r3, #1 8002478: 60a3 str r3, [r4, #8] 800247a: 6823 ldr r3, [r4, #0] 800247c: 1c5a adds r2, r3, #1 800247e: 6022 str r2, [r4, #0] 8002480: 701e strb r6, [r3, #0] 8002482: 6963 ldr r3, [r4, #20] 8002484: 4298 cmp r0, r3 8002486: d004 beq.n 8002492 <__swbuf_r+0x62> 8002488: 89a3 ldrh r3, [r4, #12] 800248a: 07db lsls r3, r3, #31 800248c: d519 bpl.n 80024c2 <__swbuf_r+0x92> 800248e: 2e0a cmp r6, #10 8002490: d117 bne.n 80024c2 <__swbuf_r+0x92> 8002492: 4621 mov r1, r4 8002494: 4628 mov r0, r5 8002496: f000 f913 bl 80026c0 <_fflush_r> 800249a: b190 cbz r0, 80024c2 <__swbuf_r+0x92> 800249c: e00f b.n 80024be <__swbuf_r+0x8e> 800249e: 4b0b ldr r3, [pc, #44] ; (80024cc <__swbuf_r+0x9c>) 80024a0: 429c cmp r4, r3 80024a2: d101 bne.n 80024a8 <__swbuf_r+0x78> 80024a4: 68ac ldr r4, [r5, #8] 80024a6: e7d0 b.n 800244a <__swbuf_r+0x1a> 80024a8: 4b09 ldr r3, [pc, #36] ; (80024d0 <__swbuf_r+0xa0>) 80024aa: 429c cmp r4, r3 80024ac: bf08 it eq 80024ae: 68ec ldreq r4, [r5, #12] 80024b0: e7cb b.n 800244a <__swbuf_r+0x1a> 80024b2: 4621 mov r1, r4 80024b4: 4628 mov r0, r5 80024b6: f000 f80d bl 80024d4 <__swsetup_r> 80024ba: 2800 cmp r0, #0 80024bc: d0cc beq.n 8002458 <__swbuf_r+0x28> 80024be: f04f 37ff mov.w r7, #4294967295 80024c2: 4638 mov r0, r7 80024c4: bdf8 pop {r3, r4, r5, r6, r7, pc} 80024c6: bf00 nop 80024c8: 080032d8 .word 0x080032d8 80024cc: 080032f8 .word 0x080032f8 80024d0: 080032b8 .word 0x080032b8 080024d4 <__swsetup_r>: 80024d4: 4b32 ldr r3, [pc, #200] ; (80025a0 <__swsetup_r+0xcc>) 80024d6: b570 push {r4, r5, r6, lr} 80024d8: 681d ldr r5, [r3, #0] 80024da: 4606 mov r6, r0 80024dc: 460c mov r4, r1 80024de: b125 cbz r5, 80024ea <__swsetup_r+0x16> 80024e0: 69ab ldr r3, [r5, #24] 80024e2: b913 cbnz r3, 80024ea <__swsetup_r+0x16> 80024e4: 4628 mov r0, r5 80024e6: f000 f955 bl 8002794 <__sinit> 80024ea: 4b2e ldr r3, [pc, #184] ; (80025a4 <__swsetup_r+0xd0>) 80024ec: 429c cmp r4, r3 80024ee: d10f bne.n 8002510 <__swsetup_r+0x3c> 80024f0: 686c ldr r4, [r5, #4] 80024f2: f9b4 300c ldrsh.w r3, [r4, #12] 80024f6: b29a uxth r2, r3 80024f8: 0715 lsls r5, r2, #28 80024fa: d42c bmi.n 8002556 <__swsetup_r+0x82> 80024fc: 06d0 lsls r0, r2, #27 80024fe: d411 bmi.n 8002524 <__swsetup_r+0x50> 8002500: 2209 movs r2, #9 8002502: 6032 str r2, [r6, #0] 8002504: f043 0340 orr.w r3, r3, #64 ; 0x40 8002508: 81a3 strh r3, [r4, #12] 800250a: f04f 30ff mov.w r0, #4294967295 800250e: bd70 pop {r4, r5, r6, pc} 8002510: 4b25 ldr r3, [pc, #148] ; (80025a8 <__swsetup_r+0xd4>) 8002512: 429c cmp r4, r3 8002514: d101 bne.n 800251a <__swsetup_r+0x46> 8002516: 68ac ldr r4, [r5, #8] 8002518: e7eb b.n 80024f2 <__swsetup_r+0x1e> 800251a: 4b24 ldr r3, [pc, #144] ; (80025ac <__swsetup_r+0xd8>) 800251c: 429c cmp r4, r3 800251e: bf08 it eq 8002520: 68ec ldreq r4, [r5, #12] 8002522: e7e6 b.n 80024f2 <__swsetup_r+0x1e> 8002524: 0751 lsls r1, r2, #29 8002526: d512 bpl.n 800254e <__swsetup_r+0x7a> 8002528: 6b61 ldr r1, [r4, #52] ; 0x34 800252a: b141 cbz r1, 800253e <__swsetup_r+0x6a> 800252c: f104 0344 add.w r3, r4, #68 ; 0x44 8002530: 4299 cmp r1, r3 8002532: d002 beq.n 800253a <__swsetup_r+0x66> 8002534: 4630 mov r0, r6 8002536: f000 fa23 bl 8002980 <_free_r> 800253a: 2300 movs r3, #0 800253c: 6363 str r3, [r4, #52] ; 0x34 800253e: 89a3 ldrh r3, [r4, #12] 8002540: f023 0324 bic.w r3, r3, #36 ; 0x24 8002544: 81a3 strh r3, [r4, #12] 8002546: 2300 movs r3, #0 8002548: 6063 str r3, [r4, #4] 800254a: 6923 ldr r3, [r4, #16] 800254c: 6023 str r3, [r4, #0] 800254e: 89a3 ldrh r3, [r4, #12] 8002550: f043 0308 orr.w r3, r3, #8 8002554: 81a3 strh r3, [r4, #12] 8002556: 6923 ldr r3, [r4, #16] 8002558: b94b cbnz r3, 800256e <__swsetup_r+0x9a> 800255a: 89a3 ldrh r3, [r4, #12] 800255c: f403 7320 and.w r3, r3, #640 ; 0x280 8002560: f5b3 7f00 cmp.w r3, #512 ; 0x200 8002564: d003 beq.n 800256e <__swsetup_r+0x9a> 8002566: 4621 mov r1, r4 8002568: 4630 mov r0, r6 800256a: f000 f9c1 bl 80028f0 <__smakebuf_r> 800256e: 89a2 ldrh r2, [r4, #12] 8002570: f012 0301 ands.w r3, r2, #1 8002574: d00c beq.n 8002590 <__swsetup_r+0xbc> 8002576: 2300 movs r3, #0 8002578: 60a3 str r3, [r4, #8] 800257a: 6963 ldr r3, [r4, #20] 800257c: 425b negs r3, r3 800257e: 61a3 str r3, [r4, #24] 8002580: 6923 ldr r3, [r4, #16] 8002582: b953 cbnz r3, 800259a <__swsetup_r+0xc6> 8002584: f9b4 300c ldrsh.w r3, [r4, #12] 8002588: f013 0080 ands.w r0, r3, #128 ; 0x80 800258c: d1ba bne.n 8002504 <__swsetup_r+0x30> 800258e: bd70 pop {r4, r5, r6, pc} 8002590: 0792 lsls r2, r2, #30 8002592: bf58 it pl 8002594: 6963 ldrpl r3, [r4, #20] 8002596: 60a3 str r3, [r4, #8] 8002598: e7f2 b.n 8002580 <__swsetup_r+0xac> 800259a: 2000 movs r0, #0 800259c: e7f7 b.n 800258e <__swsetup_r+0xba> 800259e: bf00 nop 80025a0: 2000001c .word 0x2000001c 80025a4: 080032d8 .word 0x080032d8 80025a8: 080032f8 .word 0x080032f8 80025ac: 080032b8 .word 0x080032b8 080025b0 <__sflush_r>: 80025b0: 898a ldrh r2, [r1, #12] 80025b2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80025b6: 4605 mov r5, r0 80025b8: 0710 lsls r0, r2, #28 80025ba: 460c mov r4, r1 80025bc: d45a bmi.n 8002674 <__sflush_r+0xc4> 80025be: 684b ldr r3, [r1, #4] 80025c0: 2b00 cmp r3, #0 80025c2: dc05 bgt.n 80025d0 <__sflush_r+0x20> 80025c4: 6c0b ldr r3, [r1, #64] ; 0x40 80025c6: 2b00 cmp r3, #0 80025c8: dc02 bgt.n 80025d0 <__sflush_r+0x20> 80025ca: 2000 movs r0, #0 80025cc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80025d0: 6ae6 ldr r6, [r4, #44] ; 0x2c 80025d2: 2e00 cmp r6, #0 80025d4: d0f9 beq.n 80025ca <__sflush_r+0x1a> 80025d6: 2300 movs r3, #0 80025d8: f412 5280 ands.w r2, r2, #4096 ; 0x1000 80025dc: 682f ldr r7, [r5, #0] 80025de: 602b str r3, [r5, #0] 80025e0: d033 beq.n 800264a <__sflush_r+0x9a> 80025e2: 6d60 ldr r0, [r4, #84] ; 0x54 80025e4: 89a3 ldrh r3, [r4, #12] 80025e6: 075a lsls r2, r3, #29 80025e8: d505 bpl.n 80025f6 <__sflush_r+0x46> 80025ea: 6863 ldr r3, [r4, #4] 80025ec: 1ac0 subs r0, r0, r3 80025ee: 6b63 ldr r3, [r4, #52] ; 0x34 80025f0: b10b cbz r3, 80025f6 <__sflush_r+0x46> 80025f2: 6c23 ldr r3, [r4, #64] ; 0x40 80025f4: 1ac0 subs r0, r0, r3 80025f6: 2300 movs r3, #0 80025f8: 4602 mov r2, r0 80025fa: 6ae6 ldr r6, [r4, #44] ; 0x2c 80025fc: 6a21 ldr r1, [r4, #32] 80025fe: 4628 mov r0, r5 8002600: 47b0 blx r6 8002602: 1c43 adds r3, r0, #1 8002604: 89a3 ldrh r3, [r4, #12] 8002606: d106 bne.n 8002616 <__sflush_r+0x66> 8002608: 6829 ldr r1, [r5, #0] 800260a: 291d cmp r1, #29 800260c: d84b bhi.n 80026a6 <__sflush_r+0xf6> 800260e: 4a2b ldr r2, [pc, #172] ; (80026bc <__sflush_r+0x10c>) 8002610: 40ca lsrs r2, r1 8002612: 07d6 lsls r6, r2, #31 8002614: d547 bpl.n 80026a6 <__sflush_r+0xf6> 8002616: 2200 movs r2, #0 8002618: 6062 str r2, [r4, #4] 800261a: 6922 ldr r2, [r4, #16] 800261c: 04d9 lsls r1, r3, #19 800261e: 6022 str r2, [r4, #0] 8002620: d504 bpl.n 800262c <__sflush_r+0x7c> 8002622: 1c42 adds r2, r0, #1 8002624: d101 bne.n 800262a <__sflush_r+0x7a> 8002626: 682b ldr r3, [r5, #0] 8002628: b903 cbnz r3, 800262c <__sflush_r+0x7c> 800262a: 6560 str r0, [r4, #84] ; 0x54 800262c: 6b61 ldr r1, [r4, #52] ; 0x34 800262e: 602f str r7, [r5, #0] 8002630: 2900 cmp r1, #0 8002632: d0ca beq.n 80025ca <__sflush_r+0x1a> 8002634: f104 0344 add.w r3, r4, #68 ; 0x44 8002638: 4299 cmp r1, r3 800263a: d002 beq.n 8002642 <__sflush_r+0x92> 800263c: 4628 mov r0, r5 800263e: f000 f99f bl 8002980 <_free_r> 8002642: 2000 movs r0, #0 8002644: 6360 str r0, [r4, #52] ; 0x34 8002646: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800264a: 6a21 ldr r1, [r4, #32] 800264c: 2301 movs r3, #1 800264e: 4628 mov r0, r5 8002650: 47b0 blx r6 8002652: 1c41 adds r1, r0, #1 8002654: d1c6 bne.n 80025e4 <__sflush_r+0x34> 8002656: 682b ldr r3, [r5, #0] 8002658: 2b00 cmp r3, #0 800265a: d0c3 beq.n 80025e4 <__sflush_r+0x34> 800265c: 2b1d cmp r3, #29 800265e: d001 beq.n 8002664 <__sflush_r+0xb4> 8002660: 2b16 cmp r3, #22 8002662: d101 bne.n 8002668 <__sflush_r+0xb8> 8002664: 602f str r7, [r5, #0] 8002666: e7b0 b.n 80025ca <__sflush_r+0x1a> 8002668: 89a3 ldrh r3, [r4, #12] 800266a: f043 0340 orr.w r3, r3, #64 ; 0x40 800266e: 81a3 strh r3, [r4, #12] 8002670: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002674: 690f ldr r7, [r1, #16] 8002676: 2f00 cmp r7, #0 8002678: d0a7 beq.n 80025ca <__sflush_r+0x1a> 800267a: 0793 lsls r3, r2, #30 800267c: bf18 it ne 800267e: 2300 movne r3, #0 8002680: 680e ldr r6, [r1, #0] 8002682: bf08 it eq 8002684: 694b ldreq r3, [r1, #20] 8002686: eba6 0807 sub.w r8, r6, r7 800268a: 600f str r7, [r1, #0] 800268c: 608b str r3, [r1, #8] 800268e: f1b8 0f00 cmp.w r8, #0 8002692: dd9a ble.n 80025ca <__sflush_r+0x1a> 8002694: 4643 mov r3, r8 8002696: 463a mov r2, r7 8002698: 6a21 ldr r1, [r4, #32] 800269a: 4628 mov r0, r5 800269c: 6aa6 ldr r6, [r4, #40] ; 0x28 800269e: 47b0 blx r6 80026a0: 2800 cmp r0, #0 80026a2: dc07 bgt.n 80026b4 <__sflush_r+0x104> 80026a4: 89a3 ldrh r3, [r4, #12] 80026a6: f043 0340 orr.w r3, r3, #64 ; 0x40 80026aa: 81a3 strh r3, [r4, #12] 80026ac: f04f 30ff mov.w r0, #4294967295 80026b0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80026b4: 4407 add r7, r0 80026b6: eba8 0800 sub.w r8, r8, r0 80026ba: e7e8 b.n 800268e <__sflush_r+0xde> 80026bc: 20400001 .word 0x20400001 080026c0 <_fflush_r>: 80026c0: b538 push {r3, r4, r5, lr} 80026c2: 690b ldr r3, [r1, #16] 80026c4: 4605 mov r5, r0 80026c6: 460c mov r4, r1 80026c8: b1db cbz r3, 8002702 <_fflush_r+0x42> 80026ca: b118 cbz r0, 80026d4 <_fflush_r+0x14> 80026cc: 6983 ldr r3, [r0, #24] 80026ce: b90b cbnz r3, 80026d4 <_fflush_r+0x14> 80026d0: f000 f860 bl 8002794 <__sinit> 80026d4: 4b0c ldr r3, [pc, #48] ; (8002708 <_fflush_r+0x48>) 80026d6: 429c cmp r4, r3 80026d8: d109 bne.n 80026ee <_fflush_r+0x2e> 80026da: 686c ldr r4, [r5, #4] 80026dc: f9b4 300c ldrsh.w r3, [r4, #12] 80026e0: b17b cbz r3, 8002702 <_fflush_r+0x42> 80026e2: 4621 mov r1, r4 80026e4: 4628 mov r0, r5 80026e6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80026ea: f7ff bf61 b.w 80025b0 <__sflush_r> 80026ee: 4b07 ldr r3, [pc, #28] ; (800270c <_fflush_r+0x4c>) 80026f0: 429c cmp r4, r3 80026f2: d101 bne.n 80026f8 <_fflush_r+0x38> 80026f4: 68ac ldr r4, [r5, #8] 80026f6: e7f1 b.n 80026dc <_fflush_r+0x1c> 80026f8: 4b05 ldr r3, [pc, #20] ; (8002710 <_fflush_r+0x50>) 80026fa: 429c cmp r4, r3 80026fc: bf08 it eq 80026fe: 68ec ldreq r4, [r5, #12] 8002700: e7ec b.n 80026dc <_fflush_r+0x1c> 8002702: 2000 movs r0, #0 8002704: bd38 pop {r3, r4, r5, pc} 8002706: bf00 nop 8002708: 080032d8 .word 0x080032d8 800270c: 080032f8 .word 0x080032f8 8002710: 080032b8 .word 0x080032b8 08002714 <_cleanup_r>: 8002714: 4901 ldr r1, [pc, #4] ; (800271c <_cleanup_r+0x8>) 8002716: f000 b8a9 b.w 800286c <_fwalk_reent> 800271a: bf00 nop 800271c: 080026c1 .word 0x080026c1 08002720 : 8002720: 2300 movs r3, #0 8002722: b510 push {r4, lr} 8002724: 4604 mov r4, r0 8002726: 6003 str r3, [r0, #0] 8002728: 6043 str r3, [r0, #4] 800272a: 6083 str r3, [r0, #8] 800272c: 8181 strh r1, [r0, #12] 800272e: 6643 str r3, [r0, #100] ; 0x64 8002730: 81c2 strh r2, [r0, #14] 8002732: 6103 str r3, [r0, #16] 8002734: 6143 str r3, [r0, #20] 8002736: 6183 str r3, [r0, #24] 8002738: 4619 mov r1, r3 800273a: 2208 movs r2, #8 800273c: 305c adds r0, #92 ; 0x5c 800273e: f7ff fd3d bl 80021bc 8002742: 4b05 ldr r3, [pc, #20] ; (8002758 ) 8002744: 6224 str r4, [r4, #32] 8002746: 6263 str r3, [r4, #36] ; 0x24 8002748: 4b04 ldr r3, [pc, #16] ; (800275c ) 800274a: 62a3 str r3, [r4, #40] ; 0x28 800274c: 4b04 ldr r3, [pc, #16] ; (8002760 ) 800274e: 62e3 str r3, [r4, #44] ; 0x2c 8002750: 4b04 ldr r3, [pc, #16] ; (8002764 ) 8002752: 6323 str r3, [r4, #48] ; 0x30 8002754: bd10 pop {r4, pc} 8002756: bf00 nop 8002758: 080030a1 .word 0x080030a1 800275c: 080030c3 .word 0x080030c3 8002760: 080030fb .word 0x080030fb 8002764: 0800311f .word 0x0800311f 08002768 <__sfmoreglue>: 8002768: b570 push {r4, r5, r6, lr} 800276a: 2568 movs r5, #104 ; 0x68 800276c: 1e4a subs r2, r1, #1 800276e: 4355 muls r5, r2 8002770: 460e mov r6, r1 8002772: f105 0174 add.w r1, r5, #116 ; 0x74 8002776: f000 f94f bl 8002a18 <_malloc_r> 800277a: 4604 mov r4, r0 800277c: b140 cbz r0, 8002790 <__sfmoreglue+0x28> 800277e: 2100 movs r1, #0 8002780: e880 0042 stmia.w r0, {r1, r6} 8002784: 300c adds r0, #12 8002786: 60a0 str r0, [r4, #8] 8002788: f105 0268 add.w r2, r5, #104 ; 0x68 800278c: f7ff fd16 bl 80021bc 8002790: 4620 mov r0, r4 8002792: bd70 pop {r4, r5, r6, pc} 08002794 <__sinit>: 8002794: 6983 ldr r3, [r0, #24] 8002796: b510 push {r4, lr} 8002798: 4604 mov r4, r0 800279a: bb33 cbnz r3, 80027ea <__sinit+0x56> 800279c: 6483 str r3, [r0, #72] ; 0x48 800279e: 64c3 str r3, [r0, #76] ; 0x4c 80027a0: 6503 str r3, [r0, #80] ; 0x50 80027a2: 4b12 ldr r3, [pc, #72] ; (80027ec <__sinit+0x58>) 80027a4: 4a12 ldr r2, [pc, #72] ; (80027f0 <__sinit+0x5c>) 80027a6: 681b ldr r3, [r3, #0] 80027a8: 6282 str r2, [r0, #40] ; 0x28 80027aa: 4298 cmp r0, r3 80027ac: bf04 itt eq 80027ae: 2301 moveq r3, #1 80027b0: 6183 streq r3, [r0, #24] 80027b2: f000 f81f bl 80027f4 <__sfp> 80027b6: 6060 str r0, [r4, #4] 80027b8: 4620 mov r0, r4 80027ba: f000 f81b bl 80027f4 <__sfp> 80027be: 60a0 str r0, [r4, #8] 80027c0: 4620 mov r0, r4 80027c2: f000 f817 bl 80027f4 <__sfp> 80027c6: 2200 movs r2, #0 80027c8: 60e0 str r0, [r4, #12] 80027ca: 2104 movs r1, #4 80027cc: 6860 ldr r0, [r4, #4] 80027ce: f7ff ffa7 bl 8002720 80027d2: 2201 movs r2, #1 80027d4: 2109 movs r1, #9 80027d6: 68a0 ldr r0, [r4, #8] 80027d8: f7ff ffa2 bl 8002720 80027dc: 2202 movs r2, #2 80027de: 2112 movs r1, #18 80027e0: 68e0 ldr r0, [r4, #12] 80027e2: f7ff ff9d bl 8002720 80027e6: 2301 movs r3, #1 80027e8: 61a3 str r3, [r4, #24] 80027ea: bd10 pop {r4, pc} 80027ec: 080032b4 .word 0x080032b4 80027f0: 08002715 .word 0x08002715 080027f4 <__sfp>: 80027f4: b5f8 push {r3, r4, r5, r6, r7, lr} 80027f6: 4b1c ldr r3, [pc, #112] ; (8002868 <__sfp+0x74>) 80027f8: 4607 mov r7, r0 80027fa: 681e ldr r6, [r3, #0] 80027fc: 69b3 ldr r3, [r6, #24] 80027fe: b913 cbnz r3, 8002806 <__sfp+0x12> 8002800: 4630 mov r0, r6 8002802: f7ff ffc7 bl 8002794 <__sinit> 8002806: 3648 adds r6, #72 ; 0x48 8002808: 68b4 ldr r4, [r6, #8] 800280a: 6873 ldr r3, [r6, #4] 800280c: 3b01 subs r3, #1 800280e: d503 bpl.n 8002818 <__sfp+0x24> 8002810: 6833 ldr r3, [r6, #0] 8002812: b133 cbz r3, 8002822 <__sfp+0x2e> 8002814: 6836 ldr r6, [r6, #0] 8002816: e7f7 b.n 8002808 <__sfp+0x14> 8002818: f9b4 500c ldrsh.w r5, [r4, #12] 800281c: b16d cbz r5, 800283a <__sfp+0x46> 800281e: 3468 adds r4, #104 ; 0x68 8002820: e7f4 b.n 800280c <__sfp+0x18> 8002822: 2104 movs r1, #4 8002824: 4638 mov r0, r7 8002826: f7ff ff9f bl 8002768 <__sfmoreglue> 800282a: 6030 str r0, [r6, #0] 800282c: 2800 cmp r0, #0 800282e: d1f1 bne.n 8002814 <__sfp+0x20> 8002830: 230c movs r3, #12 8002832: 4604 mov r4, r0 8002834: 603b str r3, [r7, #0] 8002836: 4620 mov r0, r4 8002838: bdf8 pop {r3, r4, r5, r6, r7, pc} 800283a: f64f 73ff movw r3, #65535 ; 0xffff 800283e: 81e3 strh r3, [r4, #14] 8002840: 2301 movs r3, #1 8002842: 6665 str r5, [r4, #100] ; 0x64 8002844: 81a3 strh r3, [r4, #12] 8002846: 6025 str r5, [r4, #0] 8002848: 60a5 str r5, [r4, #8] 800284a: 6065 str r5, [r4, #4] 800284c: 6125 str r5, [r4, #16] 800284e: 6165 str r5, [r4, #20] 8002850: 61a5 str r5, [r4, #24] 8002852: 2208 movs r2, #8 8002854: 4629 mov r1, r5 8002856: f104 005c add.w r0, r4, #92 ; 0x5c 800285a: f7ff fcaf bl 80021bc 800285e: 6365 str r5, [r4, #52] ; 0x34 8002860: 63a5 str r5, [r4, #56] ; 0x38 8002862: 64a5 str r5, [r4, #72] ; 0x48 8002864: 64e5 str r5, [r4, #76] ; 0x4c 8002866: e7e6 b.n 8002836 <__sfp+0x42> 8002868: 080032b4 .word 0x080032b4 0800286c <_fwalk_reent>: 800286c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8002870: 4680 mov r8, r0 8002872: 4689 mov r9, r1 8002874: 2600 movs r6, #0 8002876: f100 0448 add.w r4, r0, #72 ; 0x48 800287a: b914 cbnz r4, 8002882 <_fwalk_reent+0x16> 800287c: 4630 mov r0, r6 800287e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8002882: 68a5 ldr r5, [r4, #8] 8002884: 6867 ldr r7, [r4, #4] 8002886: 3f01 subs r7, #1 8002888: d501 bpl.n 800288e <_fwalk_reent+0x22> 800288a: 6824 ldr r4, [r4, #0] 800288c: e7f5 b.n 800287a <_fwalk_reent+0xe> 800288e: 89ab ldrh r3, [r5, #12] 8002890: 2b01 cmp r3, #1 8002892: d907 bls.n 80028a4 <_fwalk_reent+0x38> 8002894: f9b5 300e ldrsh.w r3, [r5, #14] 8002898: 3301 adds r3, #1 800289a: d003 beq.n 80028a4 <_fwalk_reent+0x38> 800289c: 4629 mov r1, r5 800289e: 4640 mov r0, r8 80028a0: 47c8 blx r9 80028a2: 4306 orrs r6, r0 80028a4: 3568 adds r5, #104 ; 0x68 80028a6: e7ee b.n 8002886 <_fwalk_reent+0x1a> 080028a8 <__swhatbuf_r>: 80028a8: b570 push {r4, r5, r6, lr} 80028aa: 460e mov r6, r1 80028ac: f9b1 100e ldrsh.w r1, [r1, #14] 80028b0: b090 sub sp, #64 ; 0x40 80028b2: 2900 cmp r1, #0 80028b4: 4614 mov r4, r2 80028b6: 461d mov r5, r3 80028b8: da07 bge.n 80028ca <__swhatbuf_r+0x22> 80028ba: 2300 movs r3, #0 80028bc: 602b str r3, [r5, #0] 80028be: 89b3 ldrh r3, [r6, #12] 80028c0: 061a lsls r2, r3, #24 80028c2: d410 bmi.n 80028e6 <__swhatbuf_r+0x3e> 80028c4: f44f 6380 mov.w r3, #1024 ; 0x400 80028c8: e00e b.n 80028e8 <__swhatbuf_r+0x40> 80028ca: aa01 add r2, sp, #4 80028cc: f000 fc4e bl 800316c <_fstat_r> 80028d0: 2800 cmp r0, #0 80028d2: dbf2 blt.n 80028ba <__swhatbuf_r+0x12> 80028d4: 9a02 ldr r2, [sp, #8] 80028d6: f402 4270 and.w r2, r2, #61440 ; 0xf000 80028da: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 80028de: 425a negs r2, r3 80028e0: 415a adcs r2, r3 80028e2: 602a str r2, [r5, #0] 80028e4: e7ee b.n 80028c4 <__swhatbuf_r+0x1c> 80028e6: 2340 movs r3, #64 ; 0x40 80028e8: 2000 movs r0, #0 80028ea: 6023 str r3, [r4, #0] 80028ec: b010 add sp, #64 ; 0x40 80028ee: bd70 pop {r4, r5, r6, pc} 080028f0 <__smakebuf_r>: 80028f0: 898b ldrh r3, [r1, #12] 80028f2: b573 push {r0, r1, r4, r5, r6, lr} 80028f4: 079d lsls r5, r3, #30 80028f6: 4606 mov r6, r0 80028f8: 460c mov r4, r1 80028fa: d507 bpl.n 800290c <__smakebuf_r+0x1c> 80028fc: f104 0347 add.w r3, r4, #71 ; 0x47 8002900: 6023 str r3, [r4, #0] 8002902: 6123 str r3, [r4, #16] 8002904: 2301 movs r3, #1 8002906: 6163 str r3, [r4, #20] 8002908: b002 add sp, #8 800290a: bd70 pop {r4, r5, r6, pc} 800290c: ab01 add r3, sp, #4 800290e: 466a mov r2, sp 8002910: f7ff ffca bl 80028a8 <__swhatbuf_r> 8002914: 9900 ldr r1, [sp, #0] 8002916: 4605 mov r5, r0 8002918: 4630 mov r0, r6 800291a: f000 f87d bl 8002a18 <_malloc_r> 800291e: b948 cbnz r0, 8002934 <__smakebuf_r+0x44> 8002920: f9b4 300c ldrsh.w r3, [r4, #12] 8002924: 059a lsls r2, r3, #22 8002926: d4ef bmi.n 8002908 <__smakebuf_r+0x18> 8002928: f023 0303 bic.w r3, r3, #3 800292c: f043 0302 orr.w r3, r3, #2 8002930: 81a3 strh r3, [r4, #12] 8002932: e7e3 b.n 80028fc <__smakebuf_r+0xc> 8002934: 4b0d ldr r3, [pc, #52] ; (800296c <__smakebuf_r+0x7c>) 8002936: 62b3 str r3, [r6, #40] ; 0x28 8002938: 89a3 ldrh r3, [r4, #12] 800293a: 6020 str r0, [r4, #0] 800293c: f043 0380 orr.w r3, r3, #128 ; 0x80 8002940: 81a3 strh r3, [r4, #12] 8002942: 9b00 ldr r3, [sp, #0] 8002944: 6120 str r0, [r4, #16] 8002946: 6163 str r3, [r4, #20] 8002948: 9b01 ldr r3, [sp, #4] 800294a: b15b cbz r3, 8002964 <__smakebuf_r+0x74> 800294c: f9b4 100e ldrsh.w r1, [r4, #14] 8002950: 4630 mov r0, r6 8002952: f000 fc1d bl 8003190 <_isatty_r> 8002956: b128 cbz r0, 8002964 <__smakebuf_r+0x74> 8002958: 89a3 ldrh r3, [r4, #12] 800295a: f023 0303 bic.w r3, r3, #3 800295e: f043 0301 orr.w r3, r3, #1 8002962: 81a3 strh r3, [r4, #12] 8002964: 89a3 ldrh r3, [r4, #12] 8002966: 431d orrs r5, r3 8002968: 81a5 strh r5, [r4, #12] 800296a: e7cd b.n 8002908 <__smakebuf_r+0x18> 800296c: 08002715 .word 0x08002715 08002970 : 8002970: 4b02 ldr r3, [pc, #8] ; (800297c ) 8002972: 4601 mov r1, r0 8002974: 6818 ldr r0, [r3, #0] 8002976: f000 b84f b.w 8002a18 <_malloc_r> 800297a: bf00 nop 800297c: 2000001c .word 0x2000001c 08002980 <_free_r>: 8002980: b538 push {r3, r4, r5, lr} 8002982: 4605 mov r5, r0 8002984: 2900 cmp r1, #0 8002986: d043 beq.n 8002a10 <_free_r+0x90> 8002988: f851 3c04 ldr.w r3, [r1, #-4] 800298c: 1f0c subs r4, r1, #4 800298e: 2b00 cmp r3, #0 8002990: bfb8 it lt 8002992: 18e4 addlt r4, r4, r3 8002994: f000 fc2c bl 80031f0 <__malloc_lock> 8002998: 4a1e ldr r2, [pc, #120] ; (8002a14 <_free_r+0x94>) 800299a: 6813 ldr r3, [r2, #0] 800299c: 4610 mov r0, r2 800299e: b933 cbnz r3, 80029ae <_free_r+0x2e> 80029a0: 6063 str r3, [r4, #4] 80029a2: 6014 str r4, [r2, #0] 80029a4: 4628 mov r0, r5 80029a6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80029aa: f000 bc22 b.w 80031f2 <__malloc_unlock> 80029ae: 42a3 cmp r3, r4 80029b0: d90b bls.n 80029ca <_free_r+0x4a> 80029b2: 6821 ldr r1, [r4, #0] 80029b4: 1862 adds r2, r4, r1 80029b6: 4293 cmp r3, r2 80029b8: bf01 itttt eq 80029ba: 681a ldreq r2, [r3, #0] 80029bc: 685b ldreq r3, [r3, #4] 80029be: 1852 addeq r2, r2, r1 80029c0: 6022 streq r2, [r4, #0] 80029c2: 6063 str r3, [r4, #4] 80029c4: 6004 str r4, [r0, #0] 80029c6: e7ed b.n 80029a4 <_free_r+0x24> 80029c8: 4613 mov r3, r2 80029ca: 685a ldr r2, [r3, #4] 80029cc: b10a cbz r2, 80029d2 <_free_r+0x52> 80029ce: 42a2 cmp r2, r4 80029d0: d9fa bls.n 80029c8 <_free_r+0x48> 80029d2: 6819 ldr r1, [r3, #0] 80029d4: 1858 adds r0, r3, r1 80029d6: 42a0 cmp r0, r4 80029d8: d10b bne.n 80029f2 <_free_r+0x72> 80029da: 6820 ldr r0, [r4, #0] 80029dc: 4401 add r1, r0 80029de: 1858 adds r0, r3, r1 80029e0: 4282 cmp r2, r0 80029e2: 6019 str r1, [r3, #0] 80029e4: d1de bne.n 80029a4 <_free_r+0x24> 80029e6: 6810 ldr r0, [r2, #0] 80029e8: 6852 ldr r2, [r2, #4] 80029ea: 4401 add r1, r0 80029ec: 6019 str r1, [r3, #0] 80029ee: 605a str r2, [r3, #4] 80029f0: e7d8 b.n 80029a4 <_free_r+0x24> 80029f2: d902 bls.n 80029fa <_free_r+0x7a> 80029f4: 230c movs r3, #12 80029f6: 602b str r3, [r5, #0] 80029f8: e7d4 b.n 80029a4 <_free_r+0x24> 80029fa: 6820 ldr r0, [r4, #0] 80029fc: 1821 adds r1, r4, r0 80029fe: 428a cmp r2, r1 8002a00: bf01 itttt eq 8002a02: 6811 ldreq r1, [r2, #0] 8002a04: 6852 ldreq r2, [r2, #4] 8002a06: 1809 addeq r1, r1, r0 8002a08: 6021 streq r1, [r4, #0] 8002a0a: 6062 str r2, [r4, #4] 8002a0c: 605c str r4, [r3, #4] 8002a0e: e7c9 b.n 80029a4 <_free_r+0x24> 8002a10: bd38 pop {r3, r4, r5, pc} 8002a12: bf00 nop 8002a14: 200004c8 .word 0x200004c8 08002a18 <_malloc_r>: 8002a18: b570 push {r4, r5, r6, lr} 8002a1a: 1ccd adds r5, r1, #3 8002a1c: f025 0503 bic.w r5, r5, #3 8002a20: 3508 adds r5, #8 8002a22: 2d0c cmp r5, #12 8002a24: bf38 it cc 8002a26: 250c movcc r5, #12 8002a28: 2d00 cmp r5, #0 8002a2a: 4606 mov r6, r0 8002a2c: db01 blt.n 8002a32 <_malloc_r+0x1a> 8002a2e: 42a9 cmp r1, r5 8002a30: d903 bls.n 8002a3a <_malloc_r+0x22> 8002a32: 230c movs r3, #12 8002a34: 6033 str r3, [r6, #0] 8002a36: 2000 movs r0, #0 8002a38: bd70 pop {r4, r5, r6, pc} 8002a3a: f000 fbd9 bl 80031f0 <__malloc_lock> 8002a3e: 4a23 ldr r2, [pc, #140] ; (8002acc <_malloc_r+0xb4>) 8002a40: 6814 ldr r4, [r2, #0] 8002a42: 4621 mov r1, r4 8002a44: b991 cbnz r1, 8002a6c <_malloc_r+0x54> 8002a46: 4c22 ldr r4, [pc, #136] ; (8002ad0 <_malloc_r+0xb8>) 8002a48: 6823 ldr r3, [r4, #0] 8002a4a: b91b cbnz r3, 8002a54 <_malloc_r+0x3c> 8002a4c: 4630 mov r0, r6 8002a4e: f000 fb17 bl 8003080 <_sbrk_r> 8002a52: 6020 str r0, [r4, #0] 8002a54: 4629 mov r1, r5 8002a56: 4630 mov r0, r6 8002a58: f000 fb12 bl 8003080 <_sbrk_r> 8002a5c: 1c43 adds r3, r0, #1 8002a5e: d126 bne.n 8002aae <_malloc_r+0x96> 8002a60: 230c movs r3, #12 8002a62: 4630 mov r0, r6 8002a64: 6033 str r3, [r6, #0] 8002a66: f000 fbc4 bl 80031f2 <__malloc_unlock> 8002a6a: e7e4 b.n 8002a36 <_malloc_r+0x1e> 8002a6c: 680b ldr r3, [r1, #0] 8002a6e: 1b5b subs r3, r3, r5 8002a70: d41a bmi.n 8002aa8 <_malloc_r+0x90> 8002a72: 2b0b cmp r3, #11 8002a74: d90f bls.n 8002a96 <_malloc_r+0x7e> 8002a76: 600b str r3, [r1, #0] 8002a78: 18cc adds r4, r1, r3 8002a7a: 50cd str r5, [r1, r3] 8002a7c: 4630 mov r0, r6 8002a7e: f000 fbb8 bl 80031f2 <__malloc_unlock> 8002a82: f104 000b add.w r0, r4, #11 8002a86: 1d23 adds r3, r4, #4 8002a88: f020 0007 bic.w r0, r0, #7 8002a8c: 1ac3 subs r3, r0, r3 8002a8e: d01b beq.n 8002ac8 <_malloc_r+0xb0> 8002a90: 425a negs r2, r3 8002a92: 50e2 str r2, [r4, r3] 8002a94: bd70 pop {r4, r5, r6, pc} 8002a96: 428c cmp r4, r1 8002a98: bf0b itete eq 8002a9a: 6863 ldreq r3, [r4, #4] 8002a9c: 684b ldrne r3, [r1, #4] 8002a9e: 6013 streq r3, [r2, #0] 8002aa0: 6063 strne r3, [r4, #4] 8002aa2: bf18 it ne 8002aa4: 460c movne r4, r1 8002aa6: e7e9 b.n 8002a7c <_malloc_r+0x64> 8002aa8: 460c mov r4, r1 8002aaa: 6849 ldr r1, [r1, #4] 8002aac: e7ca b.n 8002a44 <_malloc_r+0x2c> 8002aae: 1cc4 adds r4, r0, #3 8002ab0: f024 0403 bic.w r4, r4, #3 8002ab4: 42a0 cmp r0, r4 8002ab6: d005 beq.n 8002ac4 <_malloc_r+0xac> 8002ab8: 1a21 subs r1, r4, r0 8002aba: 4630 mov r0, r6 8002abc: f000 fae0 bl 8003080 <_sbrk_r> 8002ac0: 3001 adds r0, #1 8002ac2: d0cd beq.n 8002a60 <_malloc_r+0x48> 8002ac4: 6025 str r5, [r4, #0] 8002ac6: e7d9 b.n 8002a7c <_malloc_r+0x64> 8002ac8: bd70 pop {r4, r5, r6, pc} 8002aca: bf00 nop 8002acc: 200004c8 .word 0x200004c8 8002ad0: 200004cc .word 0x200004cc 08002ad4 <__sfputc_r>: 8002ad4: 6893 ldr r3, [r2, #8] 8002ad6: b410 push {r4} 8002ad8: 3b01 subs r3, #1 8002ada: 2b00 cmp r3, #0 8002adc: 6093 str r3, [r2, #8] 8002ade: da08 bge.n 8002af2 <__sfputc_r+0x1e> 8002ae0: 6994 ldr r4, [r2, #24] 8002ae2: 42a3 cmp r3, r4 8002ae4: db02 blt.n 8002aec <__sfputc_r+0x18> 8002ae6: b2cb uxtb r3, r1 8002ae8: 2b0a cmp r3, #10 8002aea: d102 bne.n 8002af2 <__sfputc_r+0x1e> 8002aec: bc10 pop {r4} 8002aee: f7ff bc9f b.w 8002430 <__swbuf_r> 8002af2: 6813 ldr r3, [r2, #0] 8002af4: 1c58 adds r0, r3, #1 8002af6: 6010 str r0, [r2, #0] 8002af8: 7019 strb r1, [r3, #0] 8002afa: b2c8 uxtb r0, r1 8002afc: bc10 pop {r4} 8002afe: 4770 bx lr 08002b00 <__sfputs_r>: 8002b00: b5f8 push {r3, r4, r5, r6, r7, lr} 8002b02: 4606 mov r6, r0 8002b04: 460f mov r7, r1 8002b06: 4614 mov r4, r2 8002b08: 18d5 adds r5, r2, r3 8002b0a: 42ac cmp r4, r5 8002b0c: d101 bne.n 8002b12 <__sfputs_r+0x12> 8002b0e: 2000 movs r0, #0 8002b10: e007 b.n 8002b22 <__sfputs_r+0x22> 8002b12: 463a mov r2, r7 8002b14: f814 1b01 ldrb.w r1, [r4], #1 8002b18: 4630 mov r0, r6 8002b1a: f7ff ffdb bl 8002ad4 <__sfputc_r> 8002b1e: 1c43 adds r3, r0, #1 8002b20: d1f3 bne.n 8002b0a <__sfputs_r+0xa> 8002b22: bdf8 pop {r3, r4, r5, r6, r7, pc} 08002b24 <_vfiprintf_r>: 8002b24: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8002b28: b09d sub sp, #116 ; 0x74 8002b2a: 460c mov r4, r1 8002b2c: 4617 mov r7, r2 8002b2e: 9303 str r3, [sp, #12] 8002b30: 4606 mov r6, r0 8002b32: b118 cbz r0, 8002b3c <_vfiprintf_r+0x18> 8002b34: 6983 ldr r3, [r0, #24] 8002b36: b90b cbnz r3, 8002b3c <_vfiprintf_r+0x18> 8002b38: f7ff fe2c bl 8002794 <__sinit> 8002b3c: 4b7c ldr r3, [pc, #496] ; (8002d30 <_vfiprintf_r+0x20c>) 8002b3e: 429c cmp r4, r3 8002b40: d157 bne.n 8002bf2 <_vfiprintf_r+0xce> 8002b42: 6874 ldr r4, [r6, #4] 8002b44: 89a3 ldrh r3, [r4, #12] 8002b46: 0718 lsls r0, r3, #28 8002b48: d55d bpl.n 8002c06 <_vfiprintf_r+0xe2> 8002b4a: 6923 ldr r3, [r4, #16] 8002b4c: 2b00 cmp r3, #0 8002b4e: d05a beq.n 8002c06 <_vfiprintf_r+0xe2> 8002b50: 2300 movs r3, #0 8002b52: 9309 str r3, [sp, #36] ; 0x24 8002b54: 2320 movs r3, #32 8002b56: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8002b5a: 2330 movs r3, #48 ; 0x30 8002b5c: f04f 0b01 mov.w fp, #1 8002b60: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8002b64: 46b8 mov r8, r7 8002b66: 4645 mov r5, r8 8002b68: f815 3b01 ldrb.w r3, [r5], #1 8002b6c: 2b00 cmp r3, #0 8002b6e: d155 bne.n 8002c1c <_vfiprintf_r+0xf8> 8002b70: ebb8 0a07 subs.w sl, r8, r7 8002b74: d00b beq.n 8002b8e <_vfiprintf_r+0x6a> 8002b76: 4653 mov r3, sl 8002b78: 463a mov r2, r7 8002b7a: 4621 mov r1, r4 8002b7c: 4630 mov r0, r6 8002b7e: f7ff ffbf bl 8002b00 <__sfputs_r> 8002b82: 3001 adds r0, #1 8002b84: f000 80c4 beq.w 8002d10 <_vfiprintf_r+0x1ec> 8002b88: 9b09 ldr r3, [sp, #36] ; 0x24 8002b8a: 4453 add r3, sl 8002b8c: 9309 str r3, [sp, #36] ; 0x24 8002b8e: f898 3000 ldrb.w r3, [r8] 8002b92: 2b00 cmp r3, #0 8002b94: f000 80bc beq.w 8002d10 <_vfiprintf_r+0x1ec> 8002b98: 2300 movs r3, #0 8002b9a: f04f 32ff mov.w r2, #4294967295 8002b9e: 9304 str r3, [sp, #16] 8002ba0: 9307 str r3, [sp, #28] 8002ba2: 9205 str r2, [sp, #20] 8002ba4: 9306 str r3, [sp, #24] 8002ba6: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8002baa: 931a str r3, [sp, #104] ; 0x68 8002bac: 2205 movs r2, #5 8002bae: 7829 ldrb r1, [r5, #0] 8002bb0: 4860 ldr r0, [pc, #384] ; (8002d34 <_vfiprintf_r+0x210>) 8002bb2: f000 fb0f bl 80031d4 8002bb6: f105 0801 add.w r8, r5, #1 8002bba: 9b04 ldr r3, [sp, #16] 8002bbc: 2800 cmp r0, #0 8002bbe: d131 bne.n 8002c24 <_vfiprintf_r+0x100> 8002bc0: 06d9 lsls r1, r3, #27 8002bc2: bf44 itt mi 8002bc4: 2220 movmi r2, #32 8002bc6: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002bca: 071a lsls r2, r3, #28 8002bcc: bf44 itt mi 8002bce: 222b movmi r2, #43 ; 0x2b 8002bd0: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002bd4: 782a ldrb r2, [r5, #0] 8002bd6: 2a2a cmp r2, #42 ; 0x2a 8002bd8: d02c beq.n 8002c34 <_vfiprintf_r+0x110> 8002bda: 2100 movs r1, #0 8002bdc: 200a movs r0, #10 8002bde: 9a07 ldr r2, [sp, #28] 8002be0: 46a8 mov r8, r5 8002be2: f898 3000 ldrb.w r3, [r8] 8002be6: 3501 adds r5, #1 8002be8: 3b30 subs r3, #48 ; 0x30 8002bea: 2b09 cmp r3, #9 8002bec: d96d bls.n 8002cca <_vfiprintf_r+0x1a6> 8002bee: b371 cbz r1, 8002c4e <_vfiprintf_r+0x12a> 8002bf0: e026 b.n 8002c40 <_vfiprintf_r+0x11c> 8002bf2: 4b51 ldr r3, [pc, #324] ; (8002d38 <_vfiprintf_r+0x214>) 8002bf4: 429c cmp r4, r3 8002bf6: d101 bne.n 8002bfc <_vfiprintf_r+0xd8> 8002bf8: 68b4 ldr r4, [r6, #8] 8002bfa: e7a3 b.n 8002b44 <_vfiprintf_r+0x20> 8002bfc: 4b4f ldr r3, [pc, #316] ; (8002d3c <_vfiprintf_r+0x218>) 8002bfe: 429c cmp r4, r3 8002c00: bf08 it eq 8002c02: 68f4 ldreq r4, [r6, #12] 8002c04: e79e b.n 8002b44 <_vfiprintf_r+0x20> 8002c06: 4621 mov r1, r4 8002c08: 4630 mov r0, r6 8002c0a: f7ff fc63 bl 80024d4 <__swsetup_r> 8002c0e: 2800 cmp r0, #0 8002c10: d09e beq.n 8002b50 <_vfiprintf_r+0x2c> 8002c12: f04f 30ff mov.w r0, #4294967295 8002c16: b01d add sp, #116 ; 0x74 8002c18: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002c1c: 2b25 cmp r3, #37 ; 0x25 8002c1e: d0a7 beq.n 8002b70 <_vfiprintf_r+0x4c> 8002c20: 46a8 mov r8, r5 8002c22: e7a0 b.n 8002b66 <_vfiprintf_r+0x42> 8002c24: 4a43 ldr r2, [pc, #268] ; (8002d34 <_vfiprintf_r+0x210>) 8002c26: 4645 mov r5, r8 8002c28: 1a80 subs r0, r0, r2 8002c2a: fa0b f000 lsl.w r0, fp, r0 8002c2e: 4318 orrs r0, r3 8002c30: 9004 str r0, [sp, #16] 8002c32: e7bb b.n 8002bac <_vfiprintf_r+0x88> 8002c34: 9a03 ldr r2, [sp, #12] 8002c36: 1d11 adds r1, r2, #4 8002c38: 6812 ldr r2, [r2, #0] 8002c3a: 9103 str r1, [sp, #12] 8002c3c: 2a00 cmp r2, #0 8002c3e: db01 blt.n 8002c44 <_vfiprintf_r+0x120> 8002c40: 9207 str r2, [sp, #28] 8002c42: e004 b.n 8002c4e <_vfiprintf_r+0x12a> 8002c44: 4252 negs r2, r2 8002c46: f043 0302 orr.w r3, r3, #2 8002c4a: 9207 str r2, [sp, #28] 8002c4c: 9304 str r3, [sp, #16] 8002c4e: f898 3000 ldrb.w r3, [r8] 8002c52: 2b2e cmp r3, #46 ; 0x2e 8002c54: d110 bne.n 8002c78 <_vfiprintf_r+0x154> 8002c56: f898 3001 ldrb.w r3, [r8, #1] 8002c5a: f108 0101 add.w r1, r8, #1 8002c5e: 2b2a cmp r3, #42 ; 0x2a 8002c60: d137 bne.n 8002cd2 <_vfiprintf_r+0x1ae> 8002c62: 9b03 ldr r3, [sp, #12] 8002c64: f108 0802 add.w r8, r8, #2 8002c68: 1d1a adds r2, r3, #4 8002c6a: 681b ldr r3, [r3, #0] 8002c6c: 9203 str r2, [sp, #12] 8002c6e: 2b00 cmp r3, #0 8002c70: bfb8 it lt 8002c72: f04f 33ff movlt.w r3, #4294967295 8002c76: 9305 str r3, [sp, #20] 8002c78: 4d31 ldr r5, [pc, #196] ; (8002d40 <_vfiprintf_r+0x21c>) 8002c7a: 2203 movs r2, #3 8002c7c: f898 1000 ldrb.w r1, [r8] 8002c80: 4628 mov r0, r5 8002c82: f000 faa7 bl 80031d4 8002c86: b140 cbz r0, 8002c9a <_vfiprintf_r+0x176> 8002c88: 2340 movs r3, #64 ; 0x40 8002c8a: 1b40 subs r0, r0, r5 8002c8c: fa03 f000 lsl.w r0, r3, r0 8002c90: 9b04 ldr r3, [sp, #16] 8002c92: f108 0801 add.w r8, r8, #1 8002c96: 4303 orrs r3, r0 8002c98: 9304 str r3, [sp, #16] 8002c9a: f898 1000 ldrb.w r1, [r8] 8002c9e: 2206 movs r2, #6 8002ca0: 4828 ldr r0, [pc, #160] ; (8002d44 <_vfiprintf_r+0x220>) 8002ca2: f108 0701 add.w r7, r8, #1 8002ca6: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8002caa: f000 fa93 bl 80031d4 8002cae: 2800 cmp r0, #0 8002cb0: d034 beq.n 8002d1c <_vfiprintf_r+0x1f8> 8002cb2: 4b25 ldr r3, [pc, #148] ; (8002d48 <_vfiprintf_r+0x224>) 8002cb4: bb03 cbnz r3, 8002cf8 <_vfiprintf_r+0x1d4> 8002cb6: 9b03 ldr r3, [sp, #12] 8002cb8: 3307 adds r3, #7 8002cba: f023 0307 bic.w r3, r3, #7 8002cbe: 3308 adds r3, #8 8002cc0: 9303 str r3, [sp, #12] 8002cc2: 9b09 ldr r3, [sp, #36] ; 0x24 8002cc4: 444b add r3, r9 8002cc6: 9309 str r3, [sp, #36] ; 0x24 8002cc8: e74c b.n 8002b64 <_vfiprintf_r+0x40> 8002cca: fb00 3202 mla r2, r0, r2, r3 8002cce: 2101 movs r1, #1 8002cd0: e786 b.n 8002be0 <_vfiprintf_r+0xbc> 8002cd2: 2300 movs r3, #0 8002cd4: 250a movs r5, #10 8002cd6: 4618 mov r0, r3 8002cd8: 9305 str r3, [sp, #20] 8002cda: 4688 mov r8, r1 8002cdc: f898 2000 ldrb.w r2, [r8] 8002ce0: 3101 adds r1, #1 8002ce2: 3a30 subs r2, #48 ; 0x30 8002ce4: 2a09 cmp r2, #9 8002ce6: d903 bls.n 8002cf0 <_vfiprintf_r+0x1cc> 8002ce8: 2b00 cmp r3, #0 8002cea: d0c5 beq.n 8002c78 <_vfiprintf_r+0x154> 8002cec: 9005 str r0, [sp, #20] 8002cee: e7c3 b.n 8002c78 <_vfiprintf_r+0x154> 8002cf0: fb05 2000 mla r0, r5, r0, r2 8002cf4: 2301 movs r3, #1 8002cf6: e7f0 b.n 8002cda <_vfiprintf_r+0x1b6> 8002cf8: ab03 add r3, sp, #12 8002cfa: 9300 str r3, [sp, #0] 8002cfc: 4622 mov r2, r4 8002cfe: 4b13 ldr r3, [pc, #76] ; (8002d4c <_vfiprintf_r+0x228>) 8002d00: a904 add r1, sp, #16 8002d02: 4630 mov r0, r6 8002d04: f3af 8000 nop.w 8002d08: f1b0 3fff cmp.w r0, #4294967295 8002d0c: 4681 mov r9, r0 8002d0e: d1d8 bne.n 8002cc2 <_vfiprintf_r+0x19e> 8002d10: 89a3 ldrh r3, [r4, #12] 8002d12: 065b lsls r3, r3, #25 8002d14: f53f af7d bmi.w 8002c12 <_vfiprintf_r+0xee> 8002d18: 9809 ldr r0, [sp, #36] ; 0x24 8002d1a: e77c b.n 8002c16 <_vfiprintf_r+0xf2> 8002d1c: ab03 add r3, sp, #12 8002d1e: 9300 str r3, [sp, #0] 8002d20: 4622 mov r2, r4 8002d22: 4b0a ldr r3, [pc, #40] ; (8002d4c <_vfiprintf_r+0x228>) 8002d24: a904 add r1, sp, #16 8002d26: 4630 mov r0, r6 8002d28: f000 f88a bl 8002e40 <_printf_i> 8002d2c: e7ec b.n 8002d08 <_vfiprintf_r+0x1e4> 8002d2e: bf00 nop 8002d30: 080032d8 .word 0x080032d8 8002d34: 08003318 .word 0x08003318 8002d38: 080032f8 .word 0x080032f8 8002d3c: 080032b8 .word 0x080032b8 8002d40: 0800331e .word 0x0800331e 8002d44: 08003322 .word 0x08003322 8002d48: 00000000 .word 0x00000000 8002d4c: 08002b01 .word 0x08002b01 08002d50 <_printf_common>: 8002d50: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8002d54: 4691 mov r9, r2 8002d56: 461f mov r7, r3 8002d58: 688a ldr r2, [r1, #8] 8002d5a: 690b ldr r3, [r1, #16] 8002d5c: 4606 mov r6, r0 8002d5e: 4293 cmp r3, r2 8002d60: bfb8 it lt 8002d62: 4613 movlt r3, r2 8002d64: f8c9 3000 str.w r3, [r9] 8002d68: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8002d6c: 460c mov r4, r1 8002d6e: f8dd 8020 ldr.w r8, [sp, #32] 8002d72: b112 cbz r2, 8002d7a <_printf_common+0x2a> 8002d74: 3301 adds r3, #1 8002d76: f8c9 3000 str.w r3, [r9] 8002d7a: 6823 ldr r3, [r4, #0] 8002d7c: 0699 lsls r1, r3, #26 8002d7e: bf42 ittt mi 8002d80: f8d9 3000 ldrmi.w r3, [r9] 8002d84: 3302 addmi r3, #2 8002d86: f8c9 3000 strmi.w r3, [r9] 8002d8a: 6825 ldr r5, [r4, #0] 8002d8c: f015 0506 ands.w r5, r5, #6 8002d90: d107 bne.n 8002da2 <_printf_common+0x52> 8002d92: f104 0a19 add.w sl, r4, #25 8002d96: 68e3 ldr r3, [r4, #12] 8002d98: f8d9 2000 ldr.w r2, [r9] 8002d9c: 1a9b subs r3, r3, r2 8002d9e: 429d cmp r5, r3 8002da0: db2a blt.n 8002df8 <_printf_common+0xa8> 8002da2: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8002da6: 6822 ldr r2, [r4, #0] 8002da8: 3300 adds r3, #0 8002daa: bf18 it ne 8002dac: 2301 movne r3, #1 8002dae: 0692 lsls r2, r2, #26 8002db0: d42f bmi.n 8002e12 <_printf_common+0xc2> 8002db2: f104 0243 add.w r2, r4, #67 ; 0x43 8002db6: 4639 mov r1, r7 8002db8: 4630 mov r0, r6 8002dba: 47c0 blx r8 8002dbc: 3001 adds r0, #1 8002dbe: d022 beq.n 8002e06 <_printf_common+0xb6> 8002dc0: 6823 ldr r3, [r4, #0] 8002dc2: 68e5 ldr r5, [r4, #12] 8002dc4: f003 0306 and.w r3, r3, #6 8002dc8: 2b04 cmp r3, #4 8002dca: bf18 it ne 8002dcc: 2500 movne r5, #0 8002dce: f8d9 2000 ldr.w r2, [r9] 8002dd2: f04f 0900 mov.w r9, #0 8002dd6: bf08 it eq 8002dd8: 1aad subeq r5, r5, r2 8002dda: 68a3 ldr r3, [r4, #8] 8002ddc: 6922 ldr r2, [r4, #16] 8002dde: bf08 it eq 8002de0: ea25 75e5 biceq.w r5, r5, r5, asr #31 8002de4: 4293 cmp r3, r2 8002de6: bfc4 itt gt 8002de8: 1a9b subgt r3, r3, r2 8002dea: 18ed addgt r5, r5, r3 8002dec: 341a adds r4, #26 8002dee: 454d cmp r5, r9 8002df0: d11b bne.n 8002e2a <_printf_common+0xda> 8002df2: 2000 movs r0, #0 8002df4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002df8: 2301 movs r3, #1 8002dfa: 4652 mov r2, sl 8002dfc: 4639 mov r1, r7 8002dfe: 4630 mov r0, r6 8002e00: 47c0 blx r8 8002e02: 3001 adds r0, #1 8002e04: d103 bne.n 8002e0e <_printf_common+0xbe> 8002e06: f04f 30ff mov.w r0, #4294967295 8002e0a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002e0e: 3501 adds r5, #1 8002e10: e7c1 b.n 8002d96 <_printf_common+0x46> 8002e12: 2030 movs r0, #48 ; 0x30 8002e14: 18e1 adds r1, r4, r3 8002e16: f881 0043 strb.w r0, [r1, #67] ; 0x43 8002e1a: 1c5a adds r2, r3, #1 8002e1c: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8002e20: 4422 add r2, r4 8002e22: 3302 adds r3, #2 8002e24: f882 1043 strb.w r1, [r2, #67] ; 0x43 8002e28: e7c3 b.n 8002db2 <_printf_common+0x62> 8002e2a: 2301 movs r3, #1 8002e2c: 4622 mov r2, r4 8002e2e: 4639 mov r1, r7 8002e30: 4630 mov r0, r6 8002e32: 47c0 blx r8 8002e34: 3001 adds r0, #1 8002e36: d0e6 beq.n 8002e06 <_printf_common+0xb6> 8002e38: f109 0901 add.w r9, r9, #1 8002e3c: e7d7 b.n 8002dee <_printf_common+0x9e> ... 08002e40 <_printf_i>: 8002e40: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8002e44: 4617 mov r7, r2 8002e46: 7e0a ldrb r2, [r1, #24] 8002e48: b085 sub sp, #20 8002e4a: 2a6e cmp r2, #110 ; 0x6e 8002e4c: 4698 mov r8, r3 8002e4e: 4606 mov r6, r0 8002e50: 460c mov r4, r1 8002e52: 9b0c ldr r3, [sp, #48] ; 0x30 8002e54: f101 0e43 add.w lr, r1, #67 ; 0x43 8002e58: f000 80bc beq.w 8002fd4 <_printf_i+0x194> 8002e5c: d81a bhi.n 8002e94 <_printf_i+0x54> 8002e5e: 2a63 cmp r2, #99 ; 0x63 8002e60: d02e beq.n 8002ec0 <_printf_i+0x80> 8002e62: d80a bhi.n 8002e7a <_printf_i+0x3a> 8002e64: 2a00 cmp r2, #0 8002e66: f000 80c8 beq.w 8002ffa <_printf_i+0x1ba> 8002e6a: 2a58 cmp r2, #88 ; 0x58 8002e6c: f000 808a beq.w 8002f84 <_printf_i+0x144> 8002e70: f104 0542 add.w r5, r4, #66 ; 0x42 8002e74: f884 2042 strb.w r2, [r4, #66] ; 0x42 8002e78: e02a b.n 8002ed0 <_printf_i+0x90> 8002e7a: 2a64 cmp r2, #100 ; 0x64 8002e7c: d001 beq.n 8002e82 <_printf_i+0x42> 8002e7e: 2a69 cmp r2, #105 ; 0x69 8002e80: d1f6 bne.n 8002e70 <_printf_i+0x30> 8002e82: 6821 ldr r1, [r4, #0] 8002e84: 681a ldr r2, [r3, #0] 8002e86: f011 0f80 tst.w r1, #128 ; 0x80 8002e8a: d023 beq.n 8002ed4 <_printf_i+0x94> 8002e8c: 1d11 adds r1, r2, #4 8002e8e: 6019 str r1, [r3, #0] 8002e90: 6813 ldr r3, [r2, #0] 8002e92: e027 b.n 8002ee4 <_printf_i+0xa4> 8002e94: 2a73 cmp r2, #115 ; 0x73 8002e96: f000 80b4 beq.w 8003002 <_printf_i+0x1c2> 8002e9a: d808 bhi.n 8002eae <_printf_i+0x6e> 8002e9c: 2a6f cmp r2, #111 ; 0x6f 8002e9e: d02a beq.n 8002ef6 <_printf_i+0xb6> 8002ea0: 2a70 cmp r2, #112 ; 0x70 8002ea2: d1e5 bne.n 8002e70 <_printf_i+0x30> 8002ea4: 680a ldr r2, [r1, #0] 8002ea6: f042 0220 orr.w r2, r2, #32 8002eaa: 600a str r2, [r1, #0] 8002eac: e003 b.n 8002eb6 <_printf_i+0x76> 8002eae: 2a75 cmp r2, #117 ; 0x75 8002eb0: d021 beq.n 8002ef6 <_printf_i+0xb6> 8002eb2: 2a78 cmp r2, #120 ; 0x78 8002eb4: d1dc bne.n 8002e70 <_printf_i+0x30> 8002eb6: 2278 movs r2, #120 ; 0x78 8002eb8: 496f ldr r1, [pc, #444] ; (8003078 <_printf_i+0x238>) 8002eba: f884 2045 strb.w r2, [r4, #69] ; 0x45 8002ebe: e064 b.n 8002f8a <_printf_i+0x14a> 8002ec0: 681a ldr r2, [r3, #0] 8002ec2: f101 0542 add.w r5, r1, #66 ; 0x42 8002ec6: 1d11 adds r1, r2, #4 8002ec8: 6019 str r1, [r3, #0] 8002eca: 6813 ldr r3, [r2, #0] 8002ecc: f884 3042 strb.w r3, [r4, #66] ; 0x42 8002ed0: 2301 movs r3, #1 8002ed2: e0a3 b.n 800301c <_printf_i+0x1dc> 8002ed4: f011 0f40 tst.w r1, #64 ; 0x40 8002ed8: f102 0104 add.w r1, r2, #4 8002edc: 6019 str r1, [r3, #0] 8002ede: d0d7 beq.n 8002e90 <_printf_i+0x50> 8002ee0: f9b2 3000 ldrsh.w r3, [r2] 8002ee4: 2b00 cmp r3, #0 8002ee6: da03 bge.n 8002ef0 <_printf_i+0xb0> 8002ee8: 222d movs r2, #45 ; 0x2d 8002eea: 425b negs r3, r3 8002eec: f884 2043 strb.w r2, [r4, #67] ; 0x43 8002ef0: 4962 ldr r1, [pc, #392] ; (800307c <_printf_i+0x23c>) 8002ef2: 220a movs r2, #10 8002ef4: e017 b.n 8002f26 <_printf_i+0xe6> 8002ef6: 6820 ldr r0, [r4, #0] 8002ef8: 6819 ldr r1, [r3, #0] 8002efa: f010 0f80 tst.w r0, #128 ; 0x80 8002efe: d003 beq.n 8002f08 <_printf_i+0xc8> 8002f00: 1d08 adds r0, r1, #4 8002f02: 6018 str r0, [r3, #0] 8002f04: 680b ldr r3, [r1, #0] 8002f06: e006 b.n 8002f16 <_printf_i+0xd6> 8002f08: f010 0f40 tst.w r0, #64 ; 0x40 8002f0c: f101 0004 add.w r0, r1, #4 8002f10: 6018 str r0, [r3, #0] 8002f12: d0f7 beq.n 8002f04 <_printf_i+0xc4> 8002f14: 880b ldrh r3, [r1, #0] 8002f16: 2a6f cmp r2, #111 ; 0x6f 8002f18: bf14 ite ne 8002f1a: 220a movne r2, #10 8002f1c: 2208 moveq r2, #8 8002f1e: 4957 ldr r1, [pc, #348] ; (800307c <_printf_i+0x23c>) 8002f20: 2000 movs r0, #0 8002f22: f884 0043 strb.w r0, [r4, #67] ; 0x43 8002f26: 6865 ldr r5, [r4, #4] 8002f28: 2d00 cmp r5, #0 8002f2a: 60a5 str r5, [r4, #8] 8002f2c: f2c0 809c blt.w 8003068 <_printf_i+0x228> 8002f30: 6820 ldr r0, [r4, #0] 8002f32: f020 0004 bic.w r0, r0, #4 8002f36: 6020 str r0, [r4, #0] 8002f38: 2b00 cmp r3, #0 8002f3a: d13f bne.n 8002fbc <_printf_i+0x17c> 8002f3c: 2d00 cmp r5, #0 8002f3e: f040 8095 bne.w 800306c <_printf_i+0x22c> 8002f42: 4675 mov r5, lr 8002f44: 2a08 cmp r2, #8 8002f46: d10b bne.n 8002f60 <_printf_i+0x120> 8002f48: 6823 ldr r3, [r4, #0] 8002f4a: 07da lsls r2, r3, #31 8002f4c: d508 bpl.n 8002f60 <_printf_i+0x120> 8002f4e: 6923 ldr r3, [r4, #16] 8002f50: 6862 ldr r2, [r4, #4] 8002f52: 429a cmp r2, r3 8002f54: bfde ittt le 8002f56: 2330 movle r3, #48 ; 0x30 8002f58: f805 3c01 strble.w r3, [r5, #-1] 8002f5c: f105 35ff addle.w r5, r5, #4294967295 8002f60: ebae 0305 sub.w r3, lr, r5 8002f64: 6123 str r3, [r4, #16] 8002f66: f8cd 8000 str.w r8, [sp] 8002f6a: 463b mov r3, r7 8002f6c: aa03 add r2, sp, #12 8002f6e: 4621 mov r1, r4 8002f70: 4630 mov r0, r6 8002f72: f7ff feed bl 8002d50 <_printf_common> 8002f76: 3001 adds r0, #1 8002f78: d155 bne.n 8003026 <_printf_i+0x1e6> 8002f7a: f04f 30ff mov.w r0, #4294967295 8002f7e: b005 add sp, #20 8002f80: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8002f84: f881 2045 strb.w r2, [r1, #69] ; 0x45 8002f88: 493c ldr r1, [pc, #240] ; (800307c <_printf_i+0x23c>) 8002f8a: 6822 ldr r2, [r4, #0] 8002f8c: 6818 ldr r0, [r3, #0] 8002f8e: f012 0f80 tst.w r2, #128 ; 0x80 8002f92: f100 0504 add.w r5, r0, #4 8002f96: 601d str r5, [r3, #0] 8002f98: d001 beq.n 8002f9e <_printf_i+0x15e> 8002f9a: 6803 ldr r3, [r0, #0] 8002f9c: e002 b.n 8002fa4 <_printf_i+0x164> 8002f9e: 0655 lsls r5, r2, #25 8002fa0: d5fb bpl.n 8002f9a <_printf_i+0x15a> 8002fa2: 8803 ldrh r3, [r0, #0] 8002fa4: 07d0 lsls r0, r2, #31 8002fa6: bf44 itt mi 8002fa8: f042 0220 orrmi.w r2, r2, #32 8002fac: 6022 strmi r2, [r4, #0] 8002fae: b91b cbnz r3, 8002fb8 <_printf_i+0x178> 8002fb0: 6822 ldr r2, [r4, #0] 8002fb2: f022 0220 bic.w r2, r2, #32 8002fb6: 6022 str r2, [r4, #0] 8002fb8: 2210 movs r2, #16 8002fba: e7b1 b.n 8002f20 <_printf_i+0xe0> 8002fbc: 4675 mov r5, lr 8002fbe: fbb3 f0f2 udiv r0, r3, r2 8002fc2: fb02 3310 mls r3, r2, r0, r3 8002fc6: 5ccb ldrb r3, [r1, r3] 8002fc8: f805 3d01 strb.w r3, [r5, #-1]! 8002fcc: 4603 mov r3, r0 8002fce: 2800 cmp r0, #0 8002fd0: d1f5 bne.n 8002fbe <_printf_i+0x17e> 8002fd2: e7b7 b.n 8002f44 <_printf_i+0x104> 8002fd4: 6808 ldr r0, [r1, #0] 8002fd6: 681a ldr r2, [r3, #0] 8002fd8: f010 0f80 tst.w r0, #128 ; 0x80 8002fdc: 6949 ldr r1, [r1, #20] 8002fde: d004 beq.n 8002fea <_printf_i+0x1aa> 8002fe0: 1d10 adds r0, r2, #4 8002fe2: 6018 str r0, [r3, #0] 8002fe4: 6813 ldr r3, [r2, #0] 8002fe6: 6019 str r1, [r3, #0] 8002fe8: e007 b.n 8002ffa <_printf_i+0x1ba> 8002fea: f010 0f40 tst.w r0, #64 ; 0x40 8002fee: f102 0004 add.w r0, r2, #4 8002ff2: 6018 str r0, [r3, #0] 8002ff4: 6813 ldr r3, [r2, #0] 8002ff6: d0f6 beq.n 8002fe6 <_printf_i+0x1a6> 8002ff8: 8019 strh r1, [r3, #0] 8002ffa: 2300 movs r3, #0 8002ffc: 4675 mov r5, lr 8002ffe: 6123 str r3, [r4, #16] 8003000: e7b1 b.n 8002f66 <_printf_i+0x126> 8003002: 681a ldr r2, [r3, #0] 8003004: 1d11 adds r1, r2, #4 8003006: 6019 str r1, [r3, #0] 8003008: 6815 ldr r5, [r2, #0] 800300a: 2100 movs r1, #0 800300c: 6862 ldr r2, [r4, #4] 800300e: 4628 mov r0, r5 8003010: f000 f8e0 bl 80031d4 8003014: b108 cbz r0, 800301a <_printf_i+0x1da> 8003016: 1b40 subs r0, r0, r5 8003018: 6060 str r0, [r4, #4] 800301a: 6863 ldr r3, [r4, #4] 800301c: 6123 str r3, [r4, #16] 800301e: 2300 movs r3, #0 8003020: f884 3043 strb.w r3, [r4, #67] ; 0x43 8003024: e79f b.n 8002f66 <_printf_i+0x126> 8003026: 6923 ldr r3, [r4, #16] 8003028: 462a mov r2, r5 800302a: 4639 mov r1, r7 800302c: 4630 mov r0, r6 800302e: 47c0 blx r8 8003030: 3001 adds r0, #1 8003032: d0a2 beq.n 8002f7a <_printf_i+0x13a> 8003034: 6823 ldr r3, [r4, #0] 8003036: 079b lsls r3, r3, #30 8003038: d507 bpl.n 800304a <_printf_i+0x20a> 800303a: 2500 movs r5, #0 800303c: f104 0919 add.w r9, r4, #25 8003040: 68e3 ldr r3, [r4, #12] 8003042: 9a03 ldr r2, [sp, #12] 8003044: 1a9b subs r3, r3, r2 8003046: 429d cmp r5, r3 8003048: db05 blt.n 8003056 <_printf_i+0x216> 800304a: 68e0 ldr r0, [r4, #12] 800304c: 9b03 ldr r3, [sp, #12] 800304e: 4298 cmp r0, r3 8003050: bfb8 it lt 8003052: 4618 movlt r0, r3 8003054: e793 b.n 8002f7e <_printf_i+0x13e> 8003056: 2301 movs r3, #1 8003058: 464a mov r2, r9 800305a: 4639 mov r1, r7 800305c: 4630 mov r0, r6 800305e: 47c0 blx r8 8003060: 3001 adds r0, #1 8003062: d08a beq.n 8002f7a <_printf_i+0x13a> 8003064: 3501 adds r5, #1 8003066: e7eb b.n 8003040 <_printf_i+0x200> 8003068: 2b00 cmp r3, #0 800306a: d1a7 bne.n 8002fbc <_printf_i+0x17c> 800306c: 780b ldrb r3, [r1, #0] 800306e: f104 0542 add.w r5, r4, #66 ; 0x42 8003072: f884 3042 strb.w r3, [r4, #66] ; 0x42 8003076: e765 b.n 8002f44 <_printf_i+0x104> 8003078: 0800333a .word 0x0800333a 800307c: 08003329 .word 0x08003329 08003080 <_sbrk_r>: 8003080: b538 push {r3, r4, r5, lr} 8003082: 2300 movs r3, #0 8003084: 4c05 ldr r4, [pc, #20] ; (800309c <_sbrk_r+0x1c>) 8003086: 4605 mov r5, r0 8003088: 4608 mov r0, r1 800308a: 6023 str r3, [r4, #0] 800308c: f7fe ff92 bl 8001fb4 <_sbrk> 8003090: 1c43 adds r3, r0, #1 8003092: d102 bne.n 800309a <_sbrk_r+0x1a> 8003094: 6823 ldr r3, [r4, #0] 8003096: b103 cbz r3, 800309a <_sbrk_r+0x1a> 8003098: 602b str r3, [r5, #0] 800309a: bd38 pop {r3, r4, r5, pc} 800309c: 20001620 .word 0x20001620 080030a0 <__sread>: 80030a0: b510 push {r4, lr} 80030a2: 460c mov r4, r1 80030a4: f9b1 100e ldrsh.w r1, [r1, #14] 80030a8: f000 f8a4 bl 80031f4 <_read_r> 80030ac: 2800 cmp r0, #0 80030ae: bfab itete ge 80030b0: 6d63 ldrge r3, [r4, #84] ; 0x54 80030b2: 89a3 ldrhlt r3, [r4, #12] 80030b4: 181b addge r3, r3, r0 80030b6: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 80030ba: bfac ite ge 80030bc: 6563 strge r3, [r4, #84] ; 0x54 80030be: 81a3 strhlt r3, [r4, #12] 80030c0: bd10 pop {r4, pc} 080030c2 <__swrite>: 80030c2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80030c6: 461f mov r7, r3 80030c8: 898b ldrh r3, [r1, #12] 80030ca: 4605 mov r5, r0 80030cc: 05db lsls r3, r3, #23 80030ce: 460c mov r4, r1 80030d0: 4616 mov r6, r2 80030d2: d505 bpl.n 80030e0 <__swrite+0x1e> 80030d4: 2302 movs r3, #2 80030d6: 2200 movs r2, #0 80030d8: f9b1 100e ldrsh.w r1, [r1, #14] 80030dc: f000 f868 bl 80031b0 <_lseek_r> 80030e0: 89a3 ldrh r3, [r4, #12] 80030e2: 4632 mov r2, r6 80030e4: f423 5380 bic.w r3, r3, #4096 ; 0x1000 80030e8: 81a3 strh r3, [r4, #12] 80030ea: f9b4 100e ldrsh.w r1, [r4, #14] 80030ee: 463b mov r3, r7 80030f0: 4628 mov r0, r5 80030f2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 80030f6: f000 b817 b.w 8003128 <_write_r> 080030fa <__sseek>: 80030fa: b510 push {r4, lr} 80030fc: 460c mov r4, r1 80030fe: f9b1 100e ldrsh.w r1, [r1, #14] 8003102: f000 f855 bl 80031b0 <_lseek_r> 8003106: 1c43 adds r3, r0, #1 8003108: 89a3 ldrh r3, [r4, #12] 800310a: bf15 itete ne 800310c: 6560 strne r0, [r4, #84] ; 0x54 800310e: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8003112: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8003116: 81a3 strheq r3, [r4, #12] 8003118: bf18 it ne 800311a: 81a3 strhne r3, [r4, #12] 800311c: bd10 pop {r4, pc} 0800311e <__sclose>: 800311e: f9b1 100e ldrsh.w r1, [r1, #14] 8003122: f000 b813 b.w 800314c <_close_r> ... 08003128 <_write_r>: 8003128: b538 push {r3, r4, r5, lr} 800312a: 4605 mov r5, r0 800312c: 4608 mov r0, r1 800312e: 4611 mov r1, r2 8003130: 2200 movs r2, #0 8003132: 4c05 ldr r4, [pc, #20] ; (8003148 <_write_r+0x20>) 8003134: 6022 str r2, [r4, #0] 8003136: 461a mov r2, r3 8003138: f7fe fd5e bl 8001bf8 <_write> 800313c: 1c43 adds r3, r0, #1 800313e: d102 bne.n 8003146 <_write_r+0x1e> 8003140: 6823 ldr r3, [r4, #0] 8003142: b103 cbz r3, 8003146 <_write_r+0x1e> 8003144: 602b str r3, [r5, #0] 8003146: bd38 pop {r3, r4, r5, pc} 8003148: 20001620 .word 0x20001620 0800314c <_close_r>: 800314c: b538 push {r3, r4, r5, lr} 800314e: 2300 movs r3, #0 8003150: 4c05 ldr r4, [pc, #20] ; (8003168 <_close_r+0x1c>) 8003152: 4605 mov r5, r0 8003154: 4608 mov r0, r1 8003156: 6023 str r3, [r4, #0] 8003158: f7fe ff46 bl 8001fe8 <_close> 800315c: 1c43 adds r3, r0, #1 800315e: d102 bne.n 8003166 <_close_r+0x1a> 8003160: 6823 ldr r3, [r4, #0] 8003162: b103 cbz r3, 8003166 <_close_r+0x1a> 8003164: 602b str r3, [r5, #0] 8003166: bd38 pop {r3, r4, r5, pc} 8003168: 20001620 .word 0x20001620 0800316c <_fstat_r>: 800316c: b538 push {r3, r4, r5, lr} 800316e: 2300 movs r3, #0 8003170: 4c06 ldr r4, [pc, #24] ; (800318c <_fstat_r+0x20>) 8003172: 4605 mov r5, r0 8003174: 4608 mov r0, r1 8003176: 4611 mov r1, r2 8003178: 6023 str r3, [r4, #0] 800317a: f7fe ff38 bl 8001fee <_fstat> 800317e: 1c43 adds r3, r0, #1 8003180: d102 bne.n 8003188 <_fstat_r+0x1c> 8003182: 6823 ldr r3, [r4, #0] 8003184: b103 cbz r3, 8003188 <_fstat_r+0x1c> 8003186: 602b str r3, [r5, #0] 8003188: bd38 pop {r3, r4, r5, pc} 800318a: bf00 nop 800318c: 20001620 .word 0x20001620 08003190 <_isatty_r>: 8003190: b538 push {r3, r4, r5, lr} 8003192: 2300 movs r3, #0 8003194: 4c05 ldr r4, [pc, #20] ; (80031ac <_isatty_r+0x1c>) 8003196: 4605 mov r5, r0 8003198: 4608 mov r0, r1 800319a: 6023 str r3, [r4, #0] 800319c: f7fe ff2c bl 8001ff8 <_isatty> 80031a0: 1c43 adds r3, r0, #1 80031a2: d102 bne.n 80031aa <_isatty_r+0x1a> 80031a4: 6823 ldr r3, [r4, #0] 80031a6: b103 cbz r3, 80031aa <_isatty_r+0x1a> 80031a8: 602b str r3, [r5, #0] 80031aa: bd38 pop {r3, r4, r5, pc} 80031ac: 20001620 .word 0x20001620 080031b0 <_lseek_r>: 80031b0: b538 push {r3, r4, r5, lr} 80031b2: 4605 mov r5, r0 80031b4: 4608 mov r0, r1 80031b6: 4611 mov r1, r2 80031b8: 2200 movs r2, #0 80031ba: 4c05 ldr r4, [pc, #20] ; (80031d0 <_lseek_r+0x20>) 80031bc: 6022 str r2, [r4, #0] 80031be: 461a mov r2, r3 80031c0: f7fe ff1c bl 8001ffc <_lseek> 80031c4: 1c43 adds r3, r0, #1 80031c6: d102 bne.n 80031ce <_lseek_r+0x1e> 80031c8: 6823 ldr r3, [r4, #0] 80031ca: b103 cbz r3, 80031ce <_lseek_r+0x1e> 80031cc: 602b str r3, [r5, #0] 80031ce: bd38 pop {r3, r4, r5, pc} 80031d0: 20001620 .word 0x20001620 080031d4 : 80031d4: b510 push {r4, lr} 80031d6: b2c9 uxtb r1, r1 80031d8: 4402 add r2, r0 80031da: 4290 cmp r0, r2 80031dc: 4603 mov r3, r0 80031de: d101 bne.n 80031e4 80031e0: 2000 movs r0, #0 80031e2: bd10 pop {r4, pc} 80031e4: 781c ldrb r4, [r3, #0] 80031e6: 3001 adds r0, #1 80031e8: 428c cmp r4, r1 80031ea: d1f6 bne.n 80031da 80031ec: 4618 mov r0, r3 80031ee: bd10 pop {r4, pc} 080031f0 <__malloc_lock>: 80031f0: 4770 bx lr 080031f2 <__malloc_unlock>: 80031f2: 4770 bx lr 080031f4 <_read_r>: 80031f4: b538 push {r3, r4, r5, lr} 80031f6: 4605 mov r5, r0 80031f8: 4608 mov r0, r1 80031fa: 4611 mov r1, r2 80031fc: 2200 movs r2, #0 80031fe: 4c05 ldr r4, [pc, #20] ; (8003214 <_read_r+0x20>) 8003200: 6022 str r2, [r4, #0] 8003202: 461a mov r2, r3 8003204: f7fe fec8 bl 8001f98 <_read> 8003208: 1c43 adds r3, r0, #1 800320a: d102 bne.n 8003212 <_read_r+0x1e> 800320c: 6823 ldr r3, [r4, #0] 800320e: b103 cbz r3, 8003212 <_read_r+0x1e> 8003210: 602b str r3, [r5, #0] 8003212: bd38 pop {r3, r4, r5, pc} 8003214: 20001620 .word 0x20001620 08003218 <_init>: 8003218: b5f8 push {r3, r4, r5, r6, r7, lr} 800321a: bf00 nop 800321c: bcf8 pop {r3, r4, r5, r6, r7} 800321e: bc08 pop {r3} 8003220: 469e mov lr, r3 8003222: 4770 bx lr 08003224 <_fini>: 8003224: b5f8 push {r3, r4, r5, r6, r7, lr} 8003226: bf00 nop 8003228: bcf8 pop {r3, r4, r5, r6, r7} 800322a: bc08 pop {r3} 800322c: 469e mov lr, r3 800322e: 4770 bx lr