STM32F103_ATTEN_PLL_Zig.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00003664 080001e4 080001e4 000101e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000001e4 08003848 08003848 00013848 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08003a2c 08003a2c 00013a2c 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08003a30 08003a30 00013a30 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000280 20000000 08003a34 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00000f88 20000280 08003cb4 00020280 2**3 ALLOC 7 ._user_heap_stack 00000600 20001208 08003cb4 00021208 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00020280 2**0 CONTENTS, READONLY 9 .debug_info 0001ec05 00000000 00000000 000202a9 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00003eed 00000000 00000000 0003eeae 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000acb9 00000000 00000000 00042d9b 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000d08 00000000 00000000 0004da58 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00001440 00000000 00000000 0004e760 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00008f67 00000000 00000000 0004fba0 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004ea7 00000000 00000000 00058b07 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0005d9ae 2**0 CONTENTS, READONLY 17 .debug_frame 00002e60 00000000 00000000 0005da2c 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001e4 <__do_global_dtors_aux>: 80001e4: b510 push {r4, lr} 80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>) 80001e8: 7823 ldrb r3, [r4, #0] 80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16> 80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>) 80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12> 80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>) 80001f2: f3af 8000 nop.w 80001f6: 2301 movs r3, #1 80001f8: 7023 strb r3, [r4, #0] 80001fa: bd10 pop {r4, pc} 80001fc: 20000280 .word 0x20000280 8000200: 00000000 .word 0x00000000 8000204: 08003830 .word 0x08003830 08000208 : 8000208: b508 push {r3, lr} 800020a: 4b03 ldr r3, [pc, #12] ; (8000218 ) 800020c: b11b cbz r3, 8000216 800020e: 4903 ldr r1, [pc, #12] ; (800021c ) 8000210: 4803 ldr r0, [pc, #12] ; (8000220 ) 8000212: f3af 8000 nop.w 8000216: bd08 pop {r3, pc} 8000218: 00000000 .word 0x00000000 800021c: 20000284 .word 0x20000284 8000220: 08003830 .word 0x08003830 08000224 <__aeabi_llsr>: 8000224: 40d0 lsrs r0, r2 8000226: 1c0b adds r3, r1, #0 8000228: 40d1 lsrs r1, r2 800022a: 469c mov ip, r3 800022c: 3a20 subs r2, #32 800022e: 40d3 lsrs r3, r2 8000230: 4318 orrs r0, r3 8000232: 4252 negs r2, r2 8000234: 4663 mov r3, ip 8000236: 4093 lsls r3, r2 8000238: 4318 orrs r0, r3 800023a: 4770 bx lr 0800023c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800023c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800023e: 4b0e ldr r3, [pc, #56] ; (8000278 ) { 8000240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000242: 7818 ldrb r0, [r3, #0] 8000244: f44f 737a mov.w r3, #1000 ; 0x3e8 8000248: fbb3 f3f0 udiv r3, r3, r0 800024c: 4a0b ldr r2, [pc, #44] ; (800027c ) 800024e: 6810 ldr r0, [r2, #0] 8000250: fbb0 f0f3 udiv r0, r0, r3 8000254: f000 f88c bl 8000370 8000258: 4604 mov r4, r0 800025a: b958 cbnz r0, 8000274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800025c: 2d0f cmp r5, #15 800025e: d809 bhi.n 8000274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000260: 4602 mov r2, r0 8000262: 4629 mov r1, r5 8000264: f04f 30ff mov.w r0, #4294967295 8000268: f000 f842 bl 80002f0 uwTickPrio = TickPriority; 800026c: 4b04 ldr r3, [pc, #16] ; (8000280 ) 800026e: 4620 mov r0, r4 8000270: 601d str r5, [r3, #0] 8000272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000276: bd38 pop {r3, r4, r5, pc} 8000278: 20000000 .word 0x20000000 800027c: 20000218 .word 0x20000218 8000280: 20000004 .word 0x20000004 08000284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000284: 4a07 ldr r2, [pc, #28] ; (80002a4 ) { 8000286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800028a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800028c: f043 0310 orr.w r3, r3, #16 8000290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8000292: f000 f81b bl 80002cc HAL_InitTick(TICK_INT_PRIORITY); 8000296: 2000 movs r0, #0 8000298: f7ff ffd0 bl 800023c HAL_MspInit(); 800029c: f002 f80a bl 80022b4 } 80002a0: 2000 movs r0, #0 80002a2: bd08 pop {r3, pc} 80002a4: 40022000 .word 0x40022000 080002a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80002a8: 4a03 ldr r2, [pc, #12] ; (80002b8 ) 80002aa: 4b04 ldr r3, [pc, #16] ; (80002bc ) 80002ac: 6811 ldr r1, [r2, #0] 80002ae: 781b ldrb r3, [r3, #0] 80002b0: 440b add r3, r1 80002b2: 6013 str r3, [r2, #0] 80002b4: 4770 bx lr 80002b6: bf00 nop 80002b8: 200002f8 .word 0x200002f8 80002bc: 20000000 .word 0x20000000 080002c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80002c0: 4b01 ldr r3, [pc, #4] ; (80002c8 ) 80002c2: 6818 ldr r0, [r3, #0] } 80002c4: 4770 bx lr 80002c6: bf00 nop 80002c8: 200002f8 .word 0x200002f8 080002cc : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80002cc: 4a07 ldr r2, [pc, #28] ; (80002ec ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002ce: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80002d0: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002d2: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80002d6: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80002da: 041b lsls r3, r3, #16 80002dc: 0c1b lsrs r3, r3, #16 80002de: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80002e2: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 80002e6: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 80002e8: 60d3 str r3, [r2, #12] 80002ea: 4770 bx lr 80002ec: e000ed00 .word 0xe000ed00 080002f0 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80002f0: 4b17 ldr r3, [pc, #92] ; (8000350 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 80002f2: b530 push {r4, r5, lr} 80002f4: 68dc ldr r4, [r3, #12] 80002f6: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80002fa: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80002fe: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000300: 2b04 cmp r3, #4 8000302: bf28 it cs 8000304: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000306: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000308: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800030c: bf98 it ls 800030e: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000310: fa05 f303 lsl.w r3, r5, r3 8000314: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000318: bf88 it hi 800031a: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800031c: 4019 ands r1, r3 800031e: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000320: fa05 f404 lsl.w r4, r5, r4 8000324: 3c01 subs r4, #1 8000326: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8000328: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800032a: ea42 0201 orr.w r2, r2, r1 800032e: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000332: bfaf iteee ge 8000334: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000338: 4b06 ldrlt r3, [pc, #24] ; (8000354 ) 800033a: f000 000f andlt.w r0, r0, #15 800033e: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000340: bfa5 ittet ge 8000342: b2d2 uxtbge r2, r2 8000344: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000348: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800034a: f880 2300 strbge.w r2, [r0, #768] ; 0x300 800034e: bd30 pop {r4, r5, pc} 8000350: e000ed00 .word 0xe000ed00 8000354: e000ed14 .word 0xe000ed14 08000358 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 8000358: 2301 movs r3, #1 800035a: 0942 lsrs r2, r0, #5 800035c: f000 001f and.w r0, r0, #31 8000360: fa03 f000 lsl.w r0, r3, r0 8000364: 4b01 ldr r3, [pc, #4] ; (800036c ) 8000366: f843 0022 str.w r0, [r3, r2, lsl #2] 800036a: 4770 bx lr 800036c: e000e100 .word 0xe000e100 08000370 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000370: 3801 subs r0, #1 8000372: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8000376: d20a bcs.n 800038e SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000378: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800037a: 4b06 ldr r3, [pc, #24] ; (8000394 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800037c: 4a06 ldr r2, [pc, #24] ; (8000398 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800037e: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000380: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000384: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8000386: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000388: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 800038a: 601a str r2, [r3, #0] 800038c: 4770 bx lr return (1UL); /* Reload value impossible */ 800038e: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 8000390: 4770 bx lr 8000392: bf00 nop 8000394: e000e010 .word 0xe000e010 8000398: e000ed00 .word 0xe000ed00 0800039c : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 800039c: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 800039e: 2800 cmp r0, #0 80003a0: d032 beq.n 8000408 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80003a2: 6801 ldr r1, [r0, #0] 80003a4: 4b19 ldr r3, [pc, #100] ; (800040c ) 80003a6: 2414 movs r4, #20 80003a8: 4299 cmp r1, r3 80003aa: d825 bhi.n 80003f8 { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003ac: 4a18 ldr r2, [pc, #96] ; (8000410 ) hdma->DmaBaseAddress = DMA1; 80003ae: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003b2: 440a add r2, r1 80003b4: fbb2 f2f4 udiv r2, r2, r4 80003b8: 0092 lsls r2, r2, #2 80003ba: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80003bc: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80003be: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80003c0: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80003c2: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80003c4: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003c6: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003c8: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003cc: 4323 orrs r3, r4 80003ce: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003d0: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003d4: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80003d6: 6944 ldr r4, [r0, #20] 80003d8: 4323 orrs r3, r4 80003da: 6984 ldr r4, [r0, #24] 80003dc: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 80003de: 69c4 ldr r4, [r0, #28] 80003e0: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 80003e2: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 80003e4: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 80003e6: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003e8: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 80003ea: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003ee: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 80003f0: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 80003f4: 4618 mov r0, r3 80003f6: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 80003f8: 4b06 ldr r3, [pc, #24] ; (8000414 ) 80003fa: 440b add r3, r1 80003fc: fbb3 f3f4 udiv r3, r3, r4 8000400: 009b lsls r3, r3, #2 8000402: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8000404: 4b04 ldr r3, [pc, #16] ; (8000418 ) 8000406: e7d9 b.n 80003bc return HAL_ERROR; 8000408: 2001 movs r0, #1 } 800040a: bd10 pop {r4, pc} 800040c: 40020407 .word 0x40020407 8000410: bffdfff8 .word 0xbffdfff8 8000414: bffdfbf8 .word 0xbffdfbf8 8000418: 40020400 .word 0x40020400 0800041c : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 800041c: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 800041e: f890 4020 ldrb.w r4, [r0, #32] 8000422: 2c01 cmp r4, #1 8000424: d035 beq.n 8000492 8000426: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 8000428: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 800042c: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8000430: 42a5 cmp r5, r4 8000432: f04f 0600 mov.w r6, #0 8000436: f04f 0402 mov.w r4, #2 800043a: d128 bne.n 800048e { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 800043c: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8000440: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000442: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8000444: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000446: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 8000448: f026 0601 bic.w r6, r6, #1 800044c: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800044e: 6bc6 ldr r6, [r0, #60] ; 0x3c 8000450: 40bd lsls r5, r7 8000452: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8000454: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8000456: 6843 ldr r3, [r0, #4] 8000458: 6805 ldr r5, [r0, #0] 800045a: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 800045c: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 800045e: bf0b itete eq 8000460: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 8000462: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8000464: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 8000466: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 8000468: b14b cbz r3, 800047e __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800046a: 6823 ldr r3, [r4, #0] 800046c: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000470: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 8000472: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8000474: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 8000476: f043 0301 orr.w r3, r3, #1 800047a: 602b str r3, [r5, #0] 800047c: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 800047e: 6823 ldr r3, [r4, #0] 8000480: f023 0304 bic.w r3, r3, #4 8000484: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000486: 6823 ldr r3, [r4, #0] 8000488: f043 030a orr.w r3, r3, #10 800048c: e7f0 b.n 8000470 __HAL_UNLOCK(hdma); 800048e: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 8000492: 2002 movs r0, #2 } 8000494: bdf0 pop {r4, r5, r6, r7, pc} ... 08000498 : if(HAL_DMA_STATE_BUSY != hdma->State) 8000498: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 800049c: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 800049e: 2b02 cmp r3, #2 80004a0: d003 beq.n 80004aa hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80004a2: 2304 movs r3, #4 80004a4: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80004a6: 2001 movs r0, #1 80004a8: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80004aa: 6803 ldr r3, [r0, #0] 80004ac: 681a ldr r2, [r3, #0] 80004ae: f022 020e bic.w r2, r2, #14 80004b2: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80004b4: 681a ldr r2, [r3, #0] 80004b6: f022 0201 bic.w r2, r2, #1 80004ba: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004bc: 4a29 ldr r2, [pc, #164] ; (8000564 ) 80004be: 4293 cmp r3, r2 80004c0: d924 bls.n 800050c 80004c2: f502 7262 add.w r2, r2, #904 ; 0x388 80004c6: 4293 cmp r3, r2 80004c8: d019 beq.n 80004fe 80004ca: 3214 adds r2, #20 80004cc: 4293 cmp r3, r2 80004ce: d018 beq.n 8000502 80004d0: 3214 adds r2, #20 80004d2: 4293 cmp r3, r2 80004d4: d017 beq.n 8000506 80004d6: 3214 adds r2, #20 80004d8: 4293 cmp r3, r2 80004da: bf0c ite eq 80004dc: f44f 5380 moveq.w r3, #4096 ; 0x1000 80004e0: f44f 3380 movne.w r3, #65536 ; 0x10000 80004e4: 4a20 ldr r2, [pc, #128] ; (8000568 ) 80004e6: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 80004e8: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 80004ea: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 80004ec: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 80004f0: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 80004f2: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 80004f6: b39b cbz r3, 8000560 hdma->XferAbortCallback(hdma); 80004f8: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 80004fa: 4620 mov r0, r4 80004fc: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004fe: 2301 movs r3, #1 8000500: e7f0 b.n 80004e4 8000502: 2310 movs r3, #16 8000504: e7ee b.n 80004e4 8000506: f44f 7380 mov.w r3, #256 ; 0x100 800050a: e7eb b.n 80004e4 800050c: 4917 ldr r1, [pc, #92] ; (800056c ) 800050e: 428b cmp r3, r1 8000510: d016 beq.n 8000540 8000512: 3114 adds r1, #20 8000514: 428b cmp r3, r1 8000516: d015 beq.n 8000544 8000518: 3114 adds r1, #20 800051a: 428b cmp r3, r1 800051c: d014 beq.n 8000548 800051e: 3114 adds r1, #20 8000520: 428b cmp r3, r1 8000522: d014 beq.n 800054e 8000524: 3114 adds r1, #20 8000526: 428b cmp r3, r1 8000528: d014 beq.n 8000554 800052a: 3114 adds r1, #20 800052c: 428b cmp r3, r1 800052e: d014 beq.n 800055a 8000530: 4293 cmp r3, r2 8000532: bf14 ite ne 8000534: f44f 3380 movne.w r3, #65536 ; 0x10000 8000538: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 800053c: 4a0c ldr r2, [pc, #48] ; (8000570 ) 800053e: e7d2 b.n 80004e6 8000540: 2301 movs r3, #1 8000542: e7fb b.n 800053c 8000544: 2310 movs r3, #16 8000546: e7f9 b.n 800053c 8000548: f44f 7380 mov.w r3, #256 ; 0x100 800054c: e7f6 b.n 800053c 800054e: f44f 5380 mov.w r3, #4096 ; 0x1000 8000552: e7f3 b.n 800053c 8000554: f44f 3380 mov.w r3, #65536 ; 0x10000 8000558: e7f0 b.n 800053c 800055a: f44f 1380 mov.w r3, #1048576 ; 0x100000 800055e: e7ed b.n 800053c HAL_StatusTypeDef status = HAL_OK; 8000560: 4618 mov r0, r3 } 8000562: bd10 pop {r4, pc} 8000564: 40020080 .word 0x40020080 8000568: 40020400 .word 0x40020400 800056c: 40020008 .word 0x40020008 8000570: 40020000 .word 0x40020000 08000574 : { 8000574: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000576: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8000578: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800057a: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 800057c: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 800057e: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000580: 4095 lsls r5, r2 8000582: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 8000584: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000586: d055 beq.n 8000634 8000588: 074d lsls r5, r1, #29 800058a: d553 bpl.n 8000634 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800058c: 681a ldr r2, [r3, #0] 800058e: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8000590: bf5e ittt pl 8000592: 681a ldrpl r2, [r3, #0] 8000594: f022 0204 bicpl.w r2, r2, #4 8000598: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 800059a: 4a60 ldr r2, [pc, #384] ; (800071c ) 800059c: 4293 cmp r3, r2 800059e: d91f bls.n 80005e0 80005a0: f502 7262 add.w r2, r2, #904 ; 0x388 80005a4: 4293 cmp r3, r2 80005a6: d014 beq.n 80005d2 80005a8: 3214 adds r2, #20 80005aa: 4293 cmp r3, r2 80005ac: d013 beq.n 80005d6 80005ae: 3214 adds r2, #20 80005b0: 4293 cmp r3, r2 80005b2: d012 beq.n 80005da 80005b4: 3214 adds r2, #20 80005b6: 4293 cmp r3, r2 80005b8: bf0c ite eq 80005ba: f44f 4380 moveq.w r3, #16384 ; 0x4000 80005be: f44f 2380 movne.w r3, #262144 ; 0x40000 80005c2: 4a57 ldr r2, [pc, #348] ; (8000720 ) 80005c4: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80005c6: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80005c8: 2b00 cmp r3, #0 80005ca: f000 80a5 beq.w 8000718 } 80005ce: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80005d0: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005d2: 2304 movs r3, #4 80005d4: e7f5 b.n 80005c2 80005d6: 2340 movs r3, #64 ; 0x40 80005d8: e7f3 b.n 80005c2 80005da: f44f 6380 mov.w r3, #1024 ; 0x400 80005de: e7f0 b.n 80005c2 80005e0: 4950 ldr r1, [pc, #320] ; (8000724 ) 80005e2: 428b cmp r3, r1 80005e4: d016 beq.n 8000614 80005e6: 3114 adds r1, #20 80005e8: 428b cmp r3, r1 80005ea: d015 beq.n 8000618 80005ec: 3114 adds r1, #20 80005ee: 428b cmp r3, r1 80005f0: d014 beq.n 800061c 80005f2: 3114 adds r1, #20 80005f4: 428b cmp r3, r1 80005f6: d014 beq.n 8000622 80005f8: 3114 adds r1, #20 80005fa: 428b cmp r3, r1 80005fc: d014 beq.n 8000628 80005fe: 3114 adds r1, #20 8000600: 428b cmp r3, r1 8000602: d014 beq.n 800062e 8000604: 4293 cmp r3, r2 8000606: bf14 ite ne 8000608: f44f 2380 movne.w r3, #262144 ; 0x40000 800060c: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8000610: 4a45 ldr r2, [pc, #276] ; (8000728 ) 8000612: e7d7 b.n 80005c4 8000614: 2304 movs r3, #4 8000616: e7fb b.n 8000610 8000618: 2340 movs r3, #64 ; 0x40 800061a: e7f9 b.n 8000610 800061c: f44f 6380 mov.w r3, #1024 ; 0x400 8000620: e7f6 b.n 8000610 8000622: f44f 4380 mov.w r3, #16384 ; 0x4000 8000626: e7f3 b.n 8000610 8000628: f44f 2380 mov.w r3, #262144 ; 0x40000 800062c: e7f0 b.n 8000610 800062e: f44f 0380 mov.w r3, #4194304 ; 0x400000 8000632: e7ed b.n 8000610 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8000634: 2502 movs r5, #2 8000636: 4095 lsls r5, r2 8000638: 4225 tst r5, r4 800063a: d057 beq.n 80006ec 800063c: 078d lsls r5, r1, #30 800063e: d555 bpl.n 80006ec if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000640: 681a ldr r2, [r3, #0] 8000642: 0694 lsls r4, r2, #26 8000644: d406 bmi.n 8000654 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8000646: 681a ldr r2, [r3, #0] 8000648: f022 020a bic.w r2, r2, #10 800064c: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 800064e: 2201 movs r2, #1 8000650: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8000654: 4a31 ldr r2, [pc, #196] ; (800071c ) 8000656: 4293 cmp r3, r2 8000658: d91e bls.n 8000698 800065a: f502 7262 add.w r2, r2, #904 ; 0x388 800065e: 4293 cmp r3, r2 8000660: d013 beq.n 800068a 8000662: 3214 adds r2, #20 8000664: 4293 cmp r3, r2 8000666: d012 beq.n 800068e 8000668: 3214 adds r2, #20 800066a: 4293 cmp r3, r2 800066c: d011 beq.n 8000692 800066e: 3214 adds r2, #20 8000670: 4293 cmp r3, r2 8000672: bf0c ite eq 8000674: f44f 5300 moveq.w r3, #8192 ; 0x2000 8000678: f44f 3300 movne.w r3, #131072 ; 0x20000 800067c: 4a28 ldr r2, [pc, #160] ; (8000720 ) 800067e: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 8000680: 2300 movs r3, #0 8000682: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 8000686: 6a83 ldr r3, [r0, #40] ; 0x28 8000688: e79e b.n 80005c8 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 800068a: 2302 movs r3, #2 800068c: e7f6 b.n 800067c 800068e: 2320 movs r3, #32 8000690: e7f4 b.n 800067c 8000692: f44f 7300 mov.w r3, #512 ; 0x200 8000696: e7f1 b.n 800067c 8000698: 4922 ldr r1, [pc, #136] ; (8000724 ) 800069a: 428b cmp r3, r1 800069c: d016 beq.n 80006cc 800069e: 3114 adds r1, #20 80006a0: 428b cmp r3, r1 80006a2: d015 beq.n 80006d0 80006a4: 3114 adds r1, #20 80006a6: 428b cmp r3, r1 80006a8: d014 beq.n 80006d4 80006aa: 3114 adds r1, #20 80006ac: 428b cmp r3, r1 80006ae: d014 beq.n 80006da 80006b0: 3114 adds r1, #20 80006b2: 428b cmp r3, r1 80006b4: d014 beq.n 80006e0 80006b6: 3114 adds r1, #20 80006b8: 428b cmp r3, r1 80006ba: d014 beq.n 80006e6 80006bc: 4293 cmp r3, r2 80006be: bf14 ite ne 80006c0: f44f 3300 movne.w r3, #131072 ; 0x20000 80006c4: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80006c8: 4a17 ldr r2, [pc, #92] ; (8000728 ) 80006ca: e7d8 b.n 800067e 80006cc: 2302 movs r3, #2 80006ce: e7fb b.n 80006c8 80006d0: 2320 movs r3, #32 80006d2: e7f9 b.n 80006c8 80006d4: f44f 7300 mov.w r3, #512 ; 0x200 80006d8: e7f6 b.n 80006c8 80006da: f44f 5300 mov.w r3, #8192 ; 0x2000 80006de: e7f3 b.n 80006c8 80006e0: f44f 3300 mov.w r3, #131072 ; 0x20000 80006e4: e7f0 b.n 80006c8 80006e6: f44f 1300 mov.w r3, #2097152 ; 0x200000 80006ea: e7ed b.n 80006c8 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 80006ec: 2508 movs r5, #8 80006ee: 4095 lsls r5, r2 80006f0: 4225 tst r5, r4 80006f2: d011 beq.n 8000718 80006f4: 0709 lsls r1, r1, #28 80006f6: d50f bpl.n 8000718 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80006f8: 6819 ldr r1, [r3, #0] 80006fa: f021 010e bic.w r1, r1, #14 80006fe: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000700: 2301 movs r3, #1 8000702: fa03 f202 lsl.w r2, r3, r2 8000706: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 8000708: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 800070a: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 800070e: 2300 movs r3, #0 8000710: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8000714: 6b03 ldr r3, [r0, #48] ; 0x30 8000716: e757 b.n 80005c8 } 8000718: bc70 pop {r4, r5, r6} 800071a: 4770 bx lr 800071c: 40020080 .word 0x40020080 8000720: 40020400 .word 0x40020400 8000724: 40020008 .word 0x40020008 8000728: 40020000 .word 0x40020000 0800072c : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800072c: 4a11 ldr r2, [pc, #68] ; (8000774 ) 800072e: 68d3 ldr r3, [r2, #12] 8000730: f013 0310 ands.w r3, r3, #16 8000734: d005 beq.n 8000742 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 8000736: 4910 ldr r1, [pc, #64] ; (8000778 ) 8000738: 69cb ldr r3, [r1, #28] 800073a: f043 0302 orr.w r3, r3, #2 800073e: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8000740: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000742: 68d2 ldr r2, [r2, #12] 8000744: 0750 lsls r0, r2, #29 8000746: d506 bpl.n 8000756 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000748: 490b ldr r1, [pc, #44] ; (8000778 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 800074a: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800074e: 69ca ldr r2, [r1, #28] 8000750: f042 0201 orr.w r2, r2, #1 8000754: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 8000756: 4a07 ldr r2, [pc, #28] ; (8000774 ) 8000758: 69d1 ldr r1, [r2, #28] 800075a: 07c9 lsls r1, r1, #31 800075c: d508 bpl.n 8000770 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 800075e: 4806 ldr r0, [pc, #24] ; (8000778 ) 8000760: 69c1 ldr r1, [r0, #28] 8000762: f041 0104 orr.w r1, r1, #4 8000766: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 8000768: 69d1 ldr r1, [r2, #28] 800076a: f021 0101 bic.w r1, r1, #1 800076e: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8000770: 60d3 str r3, [r2, #12] 8000772: 4770 bx lr 8000774: 40022000 .word 0x40022000 8000778: 20000300 .word 0x20000300 0800077c : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 800077c: 4b06 ldr r3, [pc, #24] ; (8000798 ) 800077e: 6918 ldr r0, [r3, #16] 8000780: f010 0080 ands.w r0, r0, #128 ; 0x80 8000784: d007 beq.n 8000796 WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8000786: 4a05 ldr r2, [pc, #20] ; (800079c ) 8000788: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 800078a: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 800078e: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000790: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8000792: f3c0 10c0 ubfx r0, r0, #7, #1 } 8000796: 4770 bx lr 8000798: 40022000 .word 0x40022000 800079c: 45670123 .word 0x45670123 080007a0 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a0: 4a03 ldr r2, [pc, #12] ; (80007b0 ) } 80007a2: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a4: 6913 ldr r3, [r2, #16] 80007a6: f043 0380 orr.w r3, r3, #128 ; 0x80 80007aa: 6113 str r3, [r2, #16] } 80007ac: 4770 bx lr 80007ae: bf00 nop 80007b0: 40022000 .word 0x40022000 080007b4 : return pFlash.ErrorCode; 80007b4: 4b01 ldr r3, [pc, #4] ; (80007bc ) 80007b6: 69d8 ldr r0, [r3, #28] } 80007b8: 4770 bx lr 80007ba: bf00 nop 80007bc: 20000300 .word 0x20000300 080007c0 : { 80007c0: b5f8 push {r3, r4, r5, r6, r7, lr} 80007c2: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 80007c4: f7ff fd7c bl 80002c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007c8: 4c11 ldr r4, [pc, #68] ; (8000810 ) uint32_t tickstart = HAL_GetTick(); 80007ca: 4607 mov r7, r0 80007cc: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007ce: 68e3 ldr r3, [r4, #12] 80007d0: 07d8 lsls r0, r3, #31 80007d2: d412 bmi.n 80007fa if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 80007d4: 68e3 ldr r3, [r4, #12] 80007d6: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 80007d8: bf44 itt mi 80007da: 2320 movmi r3, #32 80007dc: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007de: 68eb ldr r3, [r5, #12] 80007e0: 06da lsls r2, r3, #27 80007e2: d406 bmi.n 80007f2 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007e4: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007e6: 07db lsls r3, r3, #31 80007e8: d403 bmi.n 80007f2 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80007ea: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007ec: f010 0004 ands.w r0, r0, #4 80007f0: d002 beq.n 80007f8 FLASH_SetErrorCode(); 80007f2: f7ff ff9b bl 800072c return HAL_ERROR; 80007f6: 2001 movs r0, #1 } 80007f8: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 80007fa: 1c73 adds r3, r6, #1 80007fc: d0e7 beq.n 80007ce if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80007fe: b90e cbnz r6, 8000804 return HAL_TIMEOUT; 8000800: 2003 movs r0, #3 8000802: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8000804: f7ff fd5c bl 80002c0 8000808: 1bc0 subs r0, r0, r7 800080a: 4286 cmp r6, r0 800080c: d2df bcs.n 80007ce 800080e: e7f7 b.n 8000800 8000810: 40022000 .word 0x40022000 08000814 : { 8000814: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 8000818: 4c1f ldr r4, [pc, #124] ; (8000898 ) { 800081a: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 800081c: 7e23 ldrb r3, [r4, #24] { 800081e: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8000820: 2b01 cmp r3, #1 { 8000822: 460f mov r7, r1 8000824: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 8000826: d033 beq.n 8000890 8000828: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800082a: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 800082e: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000830: f7ff ffc6 bl 80007c0 if(status == HAL_OK) 8000834: bb40 cbnz r0, 8000888 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8000836: 2d01 cmp r5, #1 8000838: d003 beq.n 8000842 nbiterations = 4U; 800083a: 2d02 cmp r5, #2 800083c: bf0c ite eq 800083e: 2502 moveq r5, #2 8000840: 2504 movne r5, #4 8000842: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000844: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 8000846: f8df b054 ldr.w fp, [pc, #84] ; 800089c FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 800084a: 0132 lsls r2, r6, #4 800084c: 4640 mov r0, r8 800084e: 4649 mov r1, r9 8000850: f7ff fce8 bl 8000224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000854: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 8000858: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 800085c: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 800085e: f043 0301 orr.w r3, r3, #1 8000862: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 8000866: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800086a: f24c 3050 movw r0, #50000 ; 0xc350 800086e: f7ff ffa7 bl 80007c0 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8000872: f8db 3010 ldr.w r3, [fp, #16] 8000876: f023 0301 bic.w r3, r3, #1 800087a: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 800087e: b918 cbnz r0, 8000888 8000880: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 8000882: b2f3 uxtb r3, r6 8000884: 429d cmp r5, r3 8000886: d8e0 bhi.n 800084a __HAL_UNLOCK(&pFlash); 8000888: 2300 movs r3, #0 800088a: 7623 strb r3, [r4, #24] return status; 800088c: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 8000890: 2002 movs r0, #2 } 8000892: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 8000896: bf00 nop 8000898: 20000300 .word 0x20000300 800089c: 40022000 .word 0x40022000 080008a0 : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008a0: 2200 movs r2, #0 80008a2: 4b06 ldr r3, [pc, #24] ; (80008bc ) 80008a4: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 80008a6: 4b06 ldr r3, [pc, #24] ; (80008c0 ) 80008a8: 691a ldr r2, [r3, #16] 80008aa: f042 0204 orr.w r2, r2, #4 80008ae: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008b0: 691a ldr r2, [r3, #16] 80008b2: f042 0240 orr.w r2, r2, #64 ; 0x40 80008b6: 611a str r2, [r3, #16] 80008b8: 4770 bx lr 80008ba: bf00 nop 80008bc: 20000300 .word 0x20000300 80008c0: 40022000 .word 0x40022000 080008c4 : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008c4: 2200 movs r2, #0 80008c6: 4b06 ldr r3, [pc, #24] ; (80008e0 ) 80008c8: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 80008ca: 4b06 ldr r3, [pc, #24] ; (80008e4 ) 80008cc: 691a ldr r2, [r3, #16] 80008ce: f042 0202 orr.w r2, r2, #2 80008d2: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 80008d4: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008d6: 691a ldr r2, [r3, #16] 80008d8: f042 0240 orr.w r2, r2, #64 ; 0x40 80008dc: 611a str r2, [r3, #16] 80008de: 4770 bx lr 80008e0: 20000300 .word 0x20000300 80008e4: 40022000 .word 0x40022000 080008e8 : { 80008e8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 80008ec: 4d23 ldr r5, [pc, #140] ; (800097c ) { 80008ee: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 80008f0: 7e2b ldrb r3, [r5, #24] { 80008f2: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 80008f4: 2b01 cmp r3, #1 80008f6: d03d beq.n 8000974 80008f8: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008fa: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 80008fc: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008fe: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000900: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000904: d113 bne.n 800092e if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000906: f7ff ff5b bl 80007c0 800090a: b120 cbz r0, 8000916 HAL_StatusTypeDef status = HAL_ERROR; 800090c: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 800090e: 2300 movs r3, #0 8000910: 762b strb r3, [r5, #24] return status; 8000912: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 8000916: f7ff ffc3 bl 80008a0 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800091a: f24c 3050 movw r0, #50000 ; 0xc350 800091e: f7ff ff4f bl 80007c0 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 8000922: 4a17 ldr r2, [pc, #92] ; (8000980 ) 8000924: 6913 ldr r3, [r2, #16] 8000926: f023 0304 bic.w r3, r3, #4 800092a: 6113 str r3, [r2, #16] 800092c: e7ef b.n 800090e if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800092e: f7ff ff47 bl 80007c0 8000932: 2800 cmp r0, #0 8000934: d1ea bne.n 800090c *PageError = 0xFFFFFFFFU; 8000936: f04f 33ff mov.w r3, #4294967295 800093a: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 800093e: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 8000940: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000942: 4c0f ldr r4, [pc, #60] ; (8000980 ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 8000944: 68fa ldr r2, [r7, #12] 8000946: 68bb ldr r3, [r7, #8] 8000948: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 800094c: 429e cmp r6, r3 800094e: d2de bcs.n 800090e FLASH_PageErase(address); 8000950: 4630 mov r0, r6 8000952: f7ff ffb7 bl 80008c4 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8000956: f24c 3050 movw r0, #50000 ; 0xc350 800095a: f7ff ff31 bl 80007c0 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 800095e: 6923 ldr r3, [r4, #16] 8000960: f023 0302 bic.w r3, r3, #2 8000964: 6123 str r3, [r4, #16] if (status != HAL_OK) 8000966: b110 cbz r0, 800096e *PageError = address; 8000968: f8c8 6000 str.w r6, [r8] break; 800096c: e7cf b.n 800090e address += FLASH_PAGE_SIZE) 800096e: f506 6600 add.w r6, r6, #2048 ; 0x800 8000972: e7e7 b.n 8000944 __HAL_LOCK(&pFlash); 8000974: 2002 movs r0, #2 } 8000976: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800097a: bf00 nop 800097c: 20000300 .word 0x20000300 8000980: 40022000 .word 0x40022000 08000984 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8000984: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 8000988: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800098a: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 800098c: 4f6c ldr r7, [pc, #432] ; (8000b40 ) 800098e: 4b6d ldr r3, [pc, #436] ; (8000b44 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000990: f8df e1b8 ldr.w lr, [pc, #440] ; 8000b4c switch (GPIO_Init->Mode) 8000994: f8df c1b8 ldr.w ip, [pc, #440] ; 8000b50 ioposition = (0x01U << position); 8000998: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 800099c: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 800099e: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80009a2: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 80009a6: 45a0 cmp r8, r4 80009a8: f040 8085 bne.w 8000ab6 switch (GPIO_Init->Mode) 80009ac: 684d ldr r5, [r1, #4] 80009ae: 2d12 cmp r5, #18 80009b0: f000 80b7 beq.w 8000b22 80009b4: f200 808d bhi.w 8000ad2 80009b8: 2d02 cmp r5, #2 80009ba: f000 80af beq.w 8000b1c 80009be: f200 8081 bhi.w 8000ac4 80009c2: 2d00 cmp r5, #0 80009c4: f000 8091 beq.w 8000aea 80009c8: 2d01 cmp r5, #1 80009ca: f000 80a5 beq.w 8000b18 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009ce: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009d2: 2cff cmp r4, #255 ; 0xff 80009d4: bf93 iteet ls 80009d6: 4682 movls sl, r0 80009d8: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 80009dc: 3d08 subhi r5, #8 80009de: f8d0 b000 ldrls.w fp, [r0] 80009e2: bf92 itee ls 80009e4: 00b5 lslls r5, r6, #2 80009e6: f8d0 b004 ldrhi.w fp, [r0, #4] 80009ea: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009ec: fa09 f805 lsl.w r8, r9, r5 80009f0: ea2b 0808 bic.w r8, fp, r8 80009f4: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009f8: bf88 it hi 80009fa: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009fe: ea48 0505 orr.w r5, r8, r5 8000a02: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8000a06: f8d1 a004 ldr.w sl, [r1, #4] 8000a0a: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8000a0e: d052 beq.n 8000ab6 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a10: 69bd ldr r5, [r7, #24] 8000a12: f026 0803 bic.w r8, r6, #3 8000a16: f045 0501 orr.w r5, r5, #1 8000a1a: 61bd str r5, [r7, #24] 8000a1c: 69bd ldr r5, [r7, #24] 8000a1e: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000a22: f005 0501 and.w r5, r5, #1 8000a26: 9501 str r5, [sp, #4] 8000a28: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a2c: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a30: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a32: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8000a36: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a3a: fa09 f90b lsl.w r9, r9, fp 8000a3e: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000a42: 4d41 ldr r5, [pc, #260] ; (8000b48 ) 8000a44: 42a8 cmp r0, r5 8000a46: d071 beq.n 8000b2c 8000a48: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a4c: 42a8 cmp r0, r5 8000a4e: d06f beq.n 8000b30 8000a50: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a54: 42a8 cmp r0, r5 8000a56: d06d beq.n 8000b34 8000a58: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a5c: 42a8 cmp r0, r5 8000a5e: d06b beq.n 8000b38 8000a60: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a64: 42a8 cmp r0, r5 8000a66: d069 beq.n 8000b3c 8000a68: 4570 cmp r0, lr 8000a6a: bf0c ite eq 8000a6c: 2505 moveq r5, #5 8000a6e: 2506 movne r5, #6 8000a70: fa05 f50b lsl.w r5, r5, fp 8000a74: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 8000a78: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8000a7c: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8000a7e: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8000a82: bf14 ite ne 8000a84: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8000a86: 43a5 biceq r5, r4 8000a88: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 8000a8a: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8000a8c: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8000a90: bf14 ite ne 8000a92: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8000a94: 43a5 biceq r5, r4 8000a96: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8000a98: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8000a9a: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000a9e: bf14 ite ne 8000aa0: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8000aa2: 43a5 biceq r5, r4 8000aa4: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8000aa6: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8000aa8: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8000aac: bf14 ite ne 8000aae: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8000ab0: ea25 0404 biceq.w r4, r5, r4 8000ab4: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8000ab6: 3601 adds r6, #1 8000ab8: 2e10 cmp r6, #16 8000aba: f47f af6d bne.w 8000998 } } } } } 8000abe: b003 add sp, #12 8000ac0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8000ac4: 2d03 cmp r5, #3 8000ac6: d025 beq.n 8000b14 8000ac8: 2d11 cmp r5, #17 8000aca: d180 bne.n 80009ce config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8000acc: 68ca ldr r2, [r1, #12] 8000ace: 3204 adds r2, #4 break; 8000ad0: e77d b.n 80009ce switch (GPIO_Init->Mode) 8000ad2: 4565 cmp r5, ip 8000ad4: d009 beq.n 8000aea 8000ad6: d812 bhi.n 8000afe 8000ad8: f8df 9078 ldr.w r9, [pc, #120] ; 8000b54 8000adc: 454d cmp r5, r9 8000ade: d004 beq.n 8000aea 8000ae0: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000ae4: 454d cmp r5, r9 8000ae6: f47f af72 bne.w 80009ce if (GPIO_Init->Pull == GPIO_NOPULL) 8000aea: 688a ldr r2, [r1, #8] 8000aec: b1e2 cbz r2, 8000b28 else if (GPIO_Init->Pull == GPIO_PULLUP) 8000aee: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8000af0: bf0c ite eq 8000af2: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8000af6: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8000afa: 2208 movs r2, #8 8000afc: e767 b.n 80009ce switch (GPIO_Init->Mode) 8000afe: f8df 9058 ldr.w r9, [pc, #88] ; 8000b58 8000b02: 454d cmp r5, r9 8000b04: d0f1 beq.n 8000aea 8000b06: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000b0a: 454d cmp r5, r9 8000b0c: d0ed beq.n 8000aea 8000b0e: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8000b12: e7e7 b.n 8000ae4 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8000b14: 2200 movs r2, #0 8000b16: e75a b.n 80009ce config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8000b18: 68ca ldr r2, [r1, #12] break; 8000b1a: e758 b.n 80009ce config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8000b1c: 68ca ldr r2, [r1, #12] 8000b1e: 3208 adds r2, #8 break; 8000b20: e755 b.n 80009ce config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8000b22: 68ca ldr r2, [r1, #12] 8000b24: 320c adds r2, #12 break; 8000b26: e752 b.n 80009ce config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8000b28: 2204 movs r2, #4 8000b2a: e750 b.n 80009ce SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000b2c: 2500 movs r5, #0 8000b2e: e79f b.n 8000a70 8000b30: 2501 movs r5, #1 8000b32: e79d b.n 8000a70 8000b34: 2502 movs r5, #2 8000b36: e79b b.n 8000a70 8000b38: 2503 movs r5, #3 8000b3a: e799 b.n 8000a70 8000b3c: 2504 movs r5, #4 8000b3e: e797 b.n 8000a70 8000b40: 40021000 .word 0x40021000 8000b44: 40010400 .word 0x40010400 8000b48: 40010800 .word 0x40010800 8000b4c: 40011c00 .word 0x40011c00 8000b50: 10210000 .word 0x10210000 8000b54: 10110000 .word 0x10110000 8000b58: 10310000 .word 0x10310000 08000b5c : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8000b5c: b10a cbz r2, 8000b62 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8000b5e: 6101 str r1, [r0, #16] 8000b60: 4770 bx lr 8000b62: 0409 lsls r1, r1, #16 8000b64: e7fb b.n 8000b5e 08000b66 : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 8000b66: 68c3 ldr r3, [r0, #12] 8000b68: 4059 eors r1, r3 8000b6a: 60c1 str r1, [r0, #12] 8000b6c: 4770 bx lr ... 08000b70 : * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8000b70: b538 push {r3, r4, r5, lr} uint32_t freqrange = 0U; uint32_t pclk1 = 0U; /* Check the I2C handle allocation */ if(hi2c == NULL) 8000b72: 4604 mov r4, r0 8000b74: b908 cbnz r0, 8000b7a { return HAL_ERROR; 8000b76: 2001 movs r0, #1 8000b78: bd38 pop {r3, r4, r5, pc} assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if(hi2c->State == HAL_I2C_STATE_RESET) 8000b7a: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8000b7e: f003 02ff and.w r2, r3, #255 ; 0xff 8000b82: b91b cbnz r3, 8000b8c { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8000b84: f880 203c strb.w r2, [r0, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8000b88: f001 fbb6 bl 80022f8 } hi2c->State = HAL_I2C_STATE_BUSY; 8000b8c: 2324 movs r3, #36 ; 0x24 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8000b8e: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 8000b90: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8000b94: 6813 ldr r3, [r2, #0] 8000b96: f023 0301 bic.w r3, r3, #1 8000b9a: 6013 str r3, [r2, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8000b9c: f000 fae2 bl 8001164 /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000ba0: 6863 ldr r3, [r4, #4] 8000ba2: 4a2f ldr r2, [pc, #188] ; (8000c60 ) 8000ba4: 4293 cmp r3, r2 8000ba6: d830 bhi.n 8000c0a 8000ba8: 4a2e ldr r2, [pc, #184] ; (8000c64 ) 8000baa: 4290 cmp r0, r2 8000bac: d9e3 bls.n 8000b76 { return HAL_ERROR; } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 8000bae: 4a2e ldr r2, [pc, #184] ; (8000c68 ) /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->CR2 = freqrange; 8000bb0: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 8000bb2: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8000bb6: 604a str r2, [r1, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000bb8: 3201 adds r2, #1 8000bba: 620a str r2, [r1, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000bbc: 4a28 ldr r2, [pc, #160] ; (8000c60 ) 8000bbe: 3801 subs r0, #1 8000bc0: 4293 cmp r3, r2 8000bc2: d832 bhi.n 8000c2a 8000bc4: 005b lsls r3, r3, #1 8000bc6: fbb0 f0f3 udiv r0, r0, r3 8000bca: 1c43 adds r3, r0, #1 8000bcc: f3c3 030b ubfx r3, r3, #0, #12 8000bd0: 2b04 cmp r3, #4 8000bd2: bf38 it cc 8000bd4: 2304 movcc r3, #4 8000bd6: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000bd8: 6a22 ldr r2, [r4, #32] 8000bda: 69e3 ldr r3, [r4, #28] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000bdc: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000bde: 4313 orrs r3, r2 8000be0: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 8000be2: 68e2 ldr r2, [r4, #12] 8000be4: 6923 ldr r3, [r4, #16] 8000be6: 4313 orrs r3, r2 8000be8: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8000bea: 69a2 ldr r2, [r4, #24] 8000bec: 6963 ldr r3, [r4, #20] 8000bee: 4313 orrs r3, r2 8000bf0: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 8000bf2: 680b ldr r3, [r1, #0] 8000bf4: f043 0301 orr.w r3, r3, #1 8000bf8: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8000bfa: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000bfc: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 8000bfe: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8000c02: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8000c04: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8000c08: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000c0a: 4a18 ldr r2, [pc, #96] ; (8000c6c ) 8000c0c: 4290 cmp r0, r2 8000c0e: d9b2 bls.n 8000b76 freqrange = I2C_FREQRANGE(pclk1); 8000c10: 4d15 ldr r5, [pc, #84] ; (8000c68 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c12: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 8000c16: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 8000c1a: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c1c: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 8000c1e: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c20: f44f 757a mov.w r5, #1000 ; 0x3e8 8000c24: fbb2 f2f5 udiv r2, r2, r5 8000c28: e7c6 b.n 8000bb8 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000c2a: 68a2 ldr r2, [r4, #8] 8000c2c: b952 cbnz r2, 8000c44 8000c2e: eb03 0343 add.w r3, r3, r3, lsl #1 8000c32: fbb0 f0f3 udiv r0, r0, r3 8000c36: 1c43 adds r3, r0, #1 8000c38: f3c3 030b ubfx r3, r3, #0, #12 8000c3c: b16b cbz r3, 8000c5a 8000c3e: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8000c42: e7c8 b.n 8000bd6 8000c44: 2219 movs r2, #25 8000c46: 4353 muls r3, r2 8000c48: fbb0 f0f3 udiv r0, r0, r3 8000c4c: 1c43 adds r3, r0, #1 8000c4e: f3c3 030b ubfx r3, r3, #0, #12 8000c52: b113 cbz r3, 8000c5a 8000c54: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8000c58: e7bd b.n 8000bd6 8000c5a: 2301 movs r3, #1 8000c5c: e7bb b.n 8000bd6 8000c5e: bf00 nop 8000c60: 000186a0 .word 0x000186a0 8000c64: 001e847f .word 0x001e847f 8000c68: 000f4240 .word 0x000f4240 8000c6c: 003d08ff .word 0x003d08ff 08000c70 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000c70: 6803 ldr r3, [r0, #0] { 8000c72: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000c76: 07db lsls r3, r3, #31 { 8000c78: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000c7a: d410 bmi.n 8000c9e } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8000c7c: 682b ldr r3, [r5, #0] 8000c7e: 079f lsls r7, r3, #30 8000c80: d45e bmi.n 8000d40 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8000c82: 682b ldr r3, [r5, #0] 8000c84: 0719 lsls r1, r3, #28 8000c86: f100 8095 bmi.w 8000db4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8000c8a: 682b ldr r3, [r5, #0] 8000c8c: 075a lsls r2, r3, #29 8000c8e: f100 80bf bmi.w 8000e10 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8000c92: 69ea ldr r2, [r5, #28] 8000c94: 2a00 cmp r2, #0 8000c96: f040 812d bne.w 8000ef4 { return HAL_ERROR; } } return HAL_OK; 8000c9a: 2000 movs r0, #0 8000c9c: e014 b.n 8000cc8 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8000c9e: 4c90 ldr r4, [pc, #576] ; (8000ee0 ) 8000ca0: 6863 ldr r3, [r4, #4] 8000ca2: f003 030c and.w r3, r3, #12 8000ca6: 2b04 cmp r3, #4 8000ca8: d007 beq.n 8000cba || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8000caa: 6863 ldr r3, [r4, #4] 8000cac: f003 030c and.w r3, r3, #12 8000cb0: 2b08 cmp r3, #8 8000cb2: d10c bne.n 8000cce 8000cb4: 6863 ldr r3, [r4, #4] 8000cb6: 03de lsls r6, r3, #15 8000cb8: d509 bpl.n 8000cce if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8000cba: 6823 ldr r3, [r4, #0] 8000cbc: 039c lsls r4, r3, #14 8000cbe: d5dd bpl.n 8000c7c 8000cc0: 686b ldr r3, [r5, #4] 8000cc2: 2b00 cmp r3, #0 8000cc4: d1da bne.n 8000c7c return HAL_ERROR; 8000cc6: 2001 movs r0, #1 } 8000cc8: b002 add sp, #8 8000cca: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000cce: 686b ldr r3, [r5, #4] 8000cd0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000cd4: d110 bne.n 8000cf8 8000cd6: 6823 ldr r3, [r4, #0] 8000cd8: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8000cdc: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000cde: f7ff faef bl 80002c0 8000ce2: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000ce4: 6823 ldr r3, [r4, #0] 8000ce6: 0398 lsls r0, r3, #14 8000ce8: d4c8 bmi.n 8000c7c if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000cea: f7ff fae9 bl 80002c0 8000cee: 1b80 subs r0, r0, r6 8000cf0: 2864 cmp r0, #100 ; 0x64 8000cf2: d9f7 bls.n 8000ce4 return HAL_TIMEOUT; 8000cf4: 2003 movs r0, #3 8000cf6: e7e7 b.n 8000cc8 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000cf8: b99b cbnz r3, 8000d22 8000cfa: 6823 ldr r3, [r4, #0] 8000cfc: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000d00: 6023 str r3, [r4, #0] 8000d02: 6823 ldr r3, [r4, #0] 8000d04: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000d08: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000d0a: f7ff fad9 bl 80002c0 8000d0e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8000d10: 6823 ldr r3, [r4, #0] 8000d12: 0399 lsls r1, r3, #14 8000d14: d5b2 bpl.n 8000c7c if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000d16: f7ff fad3 bl 80002c0 8000d1a: 1b80 subs r0, r0, r6 8000d1c: 2864 cmp r0, #100 ; 0x64 8000d1e: d9f7 bls.n 8000d10 8000d20: e7e8 b.n 8000cf4 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000d22: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8000d26: 6823 ldr r3, [r4, #0] 8000d28: d103 bne.n 8000d32 8000d2a: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8000d2e: 6023 str r3, [r4, #0] 8000d30: e7d1 b.n 8000cd6 8000d32: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000d36: 6023 str r3, [r4, #0] 8000d38: 6823 ldr r3, [r4, #0] 8000d3a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000d3e: e7cd b.n 8000cdc if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8000d40: 4c67 ldr r4, [pc, #412] ; (8000ee0 ) 8000d42: 6863 ldr r3, [r4, #4] 8000d44: f013 0f0c tst.w r3, #12 8000d48: d007 beq.n 8000d5a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8000d4a: 6863 ldr r3, [r4, #4] 8000d4c: f003 030c and.w r3, r3, #12 8000d50: 2b08 cmp r3, #8 8000d52: d110 bne.n 8000d76 8000d54: 6863 ldr r3, [r4, #4] 8000d56: 03da lsls r2, r3, #15 8000d58: d40d bmi.n 8000d76 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8000d5a: 6823 ldr r3, [r4, #0] 8000d5c: 079b lsls r3, r3, #30 8000d5e: d502 bpl.n 8000d66 8000d60: 692b ldr r3, [r5, #16] 8000d62: 2b01 cmp r3, #1 8000d64: d1af bne.n 8000cc6 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8000d66: 6823 ldr r3, [r4, #0] 8000d68: 696a ldr r2, [r5, #20] 8000d6a: f023 03f8 bic.w r3, r3, #248 ; 0xf8 8000d6e: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000d72: 6023 str r3, [r4, #0] 8000d74: e785 b.n 8000c82 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8000d76: 692a ldr r2, [r5, #16] 8000d78: 4b5a ldr r3, [pc, #360] ; (8000ee4 ) 8000d7a: b16a cbz r2, 8000d98 __HAL_RCC_HSI_ENABLE(); 8000d7c: 2201 movs r2, #1 8000d7e: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000d80: f7ff fa9e bl 80002c0 8000d84: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000d86: 6823 ldr r3, [r4, #0] 8000d88: 079f lsls r7, r3, #30 8000d8a: d4ec bmi.n 8000d66 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000d8c: f7ff fa98 bl 80002c0 8000d90: 1b80 subs r0, r0, r6 8000d92: 2802 cmp r0, #2 8000d94: d9f7 bls.n 8000d86 8000d96: e7ad b.n 8000cf4 __HAL_RCC_HSI_DISABLE(); 8000d98: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000d9a: f7ff fa91 bl 80002c0 8000d9e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8000da0: 6823 ldr r3, [r4, #0] 8000da2: 0798 lsls r0, r3, #30 8000da4: f57f af6d bpl.w 8000c82 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000da8: f7ff fa8a bl 80002c0 8000dac: 1b80 subs r0, r0, r6 8000dae: 2802 cmp r0, #2 8000db0: d9f6 bls.n 8000da0 8000db2: e79f b.n 8000cf4 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8000db4: 69aa ldr r2, [r5, #24] 8000db6: 4c4a ldr r4, [pc, #296] ; (8000ee0 ) 8000db8: 4b4b ldr r3, [pc, #300] ; (8000ee8 ) 8000dba: b1da cbz r2, 8000df4 __HAL_RCC_LSI_ENABLE(); 8000dbc: 2201 movs r2, #1 8000dbe: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000dc0: f7ff fa7e bl 80002c0 8000dc4: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8000dc6: 6a63 ldr r3, [r4, #36] ; 0x24 8000dc8: 079b lsls r3, r3, #30 8000dca: d50d bpl.n 8000de8 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8000dcc: f44f 52fa mov.w r2, #8000 ; 0x1f40 8000dd0: 4b46 ldr r3, [pc, #280] ; (8000eec ) 8000dd2: 681b ldr r3, [r3, #0] 8000dd4: fbb3 f3f2 udiv r3, r3, r2 8000dd8: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8000dda: bf00 nop do { __NOP(); } while (Delay --); 8000ddc: 9b01 ldr r3, [sp, #4] 8000dde: 1e5a subs r2, r3, #1 8000de0: 9201 str r2, [sp, #4] 8000de2: 2b00 cmp r3, #0 8000de4: d1f9 bne.n 8000dda 8000de6: e750 b.n 8000c8a if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000de8: f7ff fa6a bl 80002c0 8000dec: 1b80 subs r0, r0, r6 8000dee: 2802 cmp r0, #2 8000df0: d9e9 bls.n 8000dc6 8000df2: e77f b.n 8000cf4 __HAL_RCC_LSI_DISABLE(); 8000df4: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000df6: f7ff fa63 bl 80002c0 8000dfa: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8000dfc: 6a63 ldr r3, [r4, #36] ; 0x24 8000dfe: 079f lsls r7, r3, #30 8000e00: f57f af43 bpl.w 8000c8a if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000e04: f7ff fa5c bl 80002c0 8000e08: 1b80 subs r0, r0, r6 8000e0a: 2802 cmp r0, #2 8000e0c: d9f6 bls.n 8000dfc 8000e0e: e771 b.n 8000cf4 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8000e10: 4c33 ldr r4, [pc, #204] ; (8000ee0 ) 8000e12: 69e3 ldr r3, [r4, #28] 8000e14: 00d8 lsls r0, r3, #3 8000e16: d424 bmi.n 8000e62 pwrclkchanged = SET; 8000e18: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8000e1a: 69e3 ldr r3, [r4, #28] 8000e1c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8000e20: 61e3 str r3, [r4, #28] 8000e22: 69e3 ldr r3, [r4, #28] 8000e24: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8000e28: 9300 str r3, [sp, #0] 8000e2a: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000e2c: 4e30 ldr r6, [pc, #192] ; (8000ef0 ) 8000e2e: 6833 ldr r3, [r6, #0] 8000e30: 05d9 lsls r1, r3, #23 8000e32: d518 bpl.n 8000e66 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000e34: 68eb ldr r3, [r5, #12] 8000e36: 2b01 cmp r3, #1 8000e38: d126 bne.n 8000e88 8000e3a: 6a23 ldr r3, [r4, #32] 8000e3c: f043 0301 orr.w r3, r3, #1 8000e40: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000e42: f7ff fa3d bl 80002c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000e46: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8000e4a: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8000e4c: 6a23 ldr r3, [r4, #32] 8000e4e: 079b lsls r3, r3, #30 8000e50: d53f bpl.n 8000ed2 if(pwrclkchanged == SET) 8000e52: 2f00 cmp r7, #0 8000e54: f43f af1d beq.w 8000c92 __HAL_RCC_PWR_CLK_DISABLE(); 8000e58: 69e3 ldr r3, [r4, #28] 8000e5a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8000e5e: 61e3 str r3, [r4, #28] 8000e60: e717 b.n 8000c92 FlagStatus pwrclkchanged = RESET; 8000e62: 2700 movs r7, #0 8000e64: e7e2 b.n 8000e2c SET_BIT(PWR->CR, PWR_CR_DBP); 8000e66: 6833 ldr r3, [r6, #0] 8000e68: f443 7380 orr.w r3, r3, #256 ; 0x100 8000e6c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000e6e: f7ff fa27 bl 80002c0 8000e72: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000e74: 6833 ldr r3, [r6, #0] 8000e76: 05da lsls r2, r3, #23 8000e78: d4dc bmi.n 8000e34 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8000e7a: f7ff fa21 bl 80002c0 8000e7e: eba0 0008 sub.w r0, r0, r8 8000e82: 2864 cmp r0, #100 ; 0x64 8000e84: d9f6 bls.n 8000e74 8000e86: e735 b.n 8000cf4 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000e88: b9ab cbnz r3, 8000eb6 8000e8a: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000e8c: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000e90: f023 0301 bic.w r3, r3, #1 8000e94: 6223 str r3, [r4, #32] 8000e96: 6a23 ldr r3, [r4, #32] 8000e98: f023 0304 bic.w r3, r3, #4 8000e9c: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000e9e: f7ff fa0f bl 80002c0 8000ea2: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8000ea4: 6a23 ldr r3, [r4, #32] 8000ea6: 0798 lsls r0, r3, #30 8000ea8: d5d3 bpl.n 8000e52 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000eaa: f7ff fa09 bl 80002c0 8000eae: 1b80 subs r0, r0, r6 8000eb0: 4540 cmp r0, r8 8000eb2: d9f7 bls.n 8000ea4 8000eb4: e71e b.n 8000cf4 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000eb6: 2b05 cmp r3, #5 8000eb8: 6a23 ldr r3, [r4, #32] 8000eba: d103 bne.n 8000ec4 8000ebc: f043 0304 orr.w r3, r3, #4 8000ec0: 6223 str r3, [r4, #32] 8000ec2: e7ba b.n 8000e3a 8000ec4: f023 0301 bic.w r3, r3, #1 8000ec8: 6223 str r3, [r4, #32] 8000eca: 6a23 ldr r3, [r4, #32] 8000ecc: f023 0304 bic.w r3, r3, #4 8000ed0: e7b6 b.n 8000e40 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000ed2: f7ff f9f5 bl 80002c0 8000ed6: eba0 0008 sub.w r0, r0, r8 8000eda: 42b0 cmp r0, r6 8000edc: d9b6 bls.n 8000e4c 8000ede: e709 b.n 8000cf4 8000ee0: 40021000 .word 0x40021000 8000ee4: 42420000 .word 0x42420000 8000ee8: 42420480 .word 0x42420480 8000eec: 20000218 .word 0x20000218 8000ef0: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000ef4: 4c22 ldr r4, [pc, #136] ; (8000f80 ) 8000ef6: 6863 ldr r3, [r4, #4] 8000ef8: f003 030c and.w r3, r3, #12 8000efc: 2b08 cmp r3, #8 8000efe: f43f aee2 beq.w 8000cc6 8000f02: 2300 movs r3, #0 8000f04: 4e1f ldr r6, [pc, #124] ; (8000f84 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000f06: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8000f08: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000f0a: d12b bne.n 8000f64 tickstart = HAL_GetTick(); 8000f0c: f7ff f9d8 bl 80002c0 8000f10: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000f12: 6823 ldr r3, [r4, #0] 8000f14: 0199 lsls r1, r3, #6 8000f16: d41f bmi.n 8000f58 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8000f18: 6a2b ldr r3, [r5, #32] 8000f1a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000f1e: d105 bne.n 8000f2c __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8000f20: 6862 ldr r2, [r4, #4] 8000f22: 68a9 ldr r1, [r5, #8] 8000f24: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8000f28: 430a orrs r2, r1 8000f2a: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8000f2c: 6a69 ldr r1, [r5, #36] ; 0x24 8000f2e: 6862 ldr r2, [r4, #4] 8000f30: 430b orrs r3, r1 8000f32: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8000f36: 4313 orrs r3, r2 8000f38: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8000f3a: 2301 movs r3, #1 8000f3c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000f3e: f7ff f9bf bl 80002c0 8000f42: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000f44: 6823 ldr r3, [r4, #0] 8000f46: 019a lsls r2, r3, #6 8000f48: f53f aea7 bmi.w 8000c9a if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000f4c: f7ff f9b8 bl 80002c0 8000f50: 1b40 subs r0, r0, r5 8000f52: 2802 cmp r0, #2 8000f54: d9f6 bls.n 8000f44 8000f56: e6cd b.n 8000cf4 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000f58: f7ff f9b2 bl 80002c0 8000f5c: 1bc0 subs r0, r0, r7 8000f5e: 2802 cmp r0, #2 8000f60: d9d7 bls.n 8000f12 8000f62: e6c7 b.n 8000cf4 tickstart = HAL_GetTick(); 8000f64: f7ff f9ac bl 80002c0 8000f68: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000f6a: 6823 ldr r3, [r4, #0] 8000f6c: 019b lsls r3, r3, #6 8000f6e: f57f ae94 bpl.w 8000c9a if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000f72: f7ff f9a5 bl 80002c0 8000f76: 1b40 subs r0, r0, r5 8000f78: 2802 cmp r0, #2 8000f7a: d9f6 bls.n 8000f6a 8000f7c: e6ba b.n 8000cf4 8000f7e: bf00 nop 8000f80: 40021000 .word 0x40021000 8000f84: 42420060 .word 0x42420060 08000f88 : { 8000f88: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000f8a: 4b19 ldr r3, [pc, #100] ; (8000ff0 ) { 8000f8c: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000f8e: ac02 add r4, sp, #8 8000f90: f103 0510 add.w r5, r3, #16 8000f94: 4622 mov r2, r4 8000f96: 6818 ldr r0, [r3, #0] 8000f98: 6859 ldr r1, [r3, #4] 8000f9a: 3308 adds r3, #8 8000f9c: c203 stmia r2!, {r0, r1} 8000f9e: 42ab cmp r3, r5 8000fa0: 4614 mov r4, r2 8000fa2: d1f7 bne.n 8000f94 const uint8_t aPredivFactorTable[2] = {1, 2}; 8000fa4: 2301 movs r3, #1 8000fa6: f88d 3004 strb.w r3, [sp, #4] 8000faa: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8000fac: 4911 ldr r1, [pc, #68] ; (8000ff4 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8000fae: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8000fb2: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8000fb4: f003 020c and.w r2, r3, #12 8000fb8: 2a08 cmp r2, #8 8000fba: d117 bne.n 8000fec pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000fbc: f3c3 4283 ubfx r2, r3, #18, #4 8000fc0: a806 add r0, sp, #24 8000fc2: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000fc4: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000fc6: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000fca: d50c bpl.n 8000fe6 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000fcc: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000fce: 480a ldr r0, [pc, #40] ; (8000ff8 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000fd0: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000fd4: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000fd6: aa06 add r2, sp, #24 8000fd8: 4413 add r3, r2 8000fda: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000fde: fbb0 f0f3 udiv r0, r0, r3 } 8000fe2: b007 add sp, #28 8000fe4: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8000fe6: 4805 ldr r0, [pc, #20] ; (8000ffc ) 8000fe8: 4350 muls r0, r2 8000fea: e7fa b.n 8000fe2 sysclockfreq = HSE_VALUE; 8000fec: 4802 ldr r0, [pc, #8] ; (8000ff8 ) return sysclockfreq; 8000fee: e7f8 b.n 8000fe2 8000ff0: 08003848 .word 0x08003848 8000ff4: 40021000 .word 0x40021000 8000ff8: 007a1200 .word 0x007a1200 8000ffc: 003d0900 .word 0x003d0900 08001000 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8001000: 4a54 ldr r2, [pc, #336] ; (8001154 ) { 8001002: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8001006: 6813 ldr r3, [r2, #0] { 8001008: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800100a: f003 0307 and.w r3, r3, #7 800100e: 428b cmp r3, r1 { 8001010: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8001012: d32a bcc.n 800106a if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8001014: 6829 ldr r1, [r5, #0] 8001016: 078c lsls r4, r1, #30 8001018: d434 bmi.n 8001084 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 800101a: 07ca lsls r2, r1, #31 800101c: d447 bmi.n 80010ae if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 800101e: 4a4d ldr r2, [pc, #308] ; (8001154 ) 8001020: 6813 ldr r3, [r2, #0] 8001022: f003 0307 and.w r3, r3, #7 8001026: 429e cmp r6, r3 8001028: f0c0 8082 bcc.w 8001130 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800102c: 682a ldr r2, [r5, #0] 800102e: 4c4a ldr r4, [pc, #296] ; (8001158 ) 8001030: f012 0f04 tst.w r2, #4 8001034: f040 8087 bne.w 8001146 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8001038: 0713 lsls r3, r2, #28 800103a: d506 bpl.n 800104a MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 800103c: 6863 ldr r3, [r4, #4] 800103e: 692a ldr r2, [r5, #16] 8001040: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8001044: ea43 03c2 orr.w r3, r3, r2, lsl #3 8001048: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 800104a: f7ff ff9d bl 8000f88 800104e: 6863 ldr r3, [r4, #4] 8001050: 4a42 ldr r2, [pc, #264] ; (800115c ) 8001052: f3c3 1303 ubfx r3, r3, #4, #4 8001056: 5cd3 ldrb r3, [r2, r3] 8001058: 40d8 lsrs r0, r3 800105a: 4b41 ldr r3, [pc, #260] ; (8001160 ) 800105c: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 800105e: 2000 movs r0, #0 8001060: f7ff f8ec bl 800023c return HAL_OK; 8001064: 2000 movs r0, #0 } 8001066: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 800106a: 6813 ldr r3, [r2, #0] 800106c: f023 0307 bic.w r3, r3, #7 8001070: 430b orrs r3, r1 8001072: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8001074: 6813 ldr r3, [r2, #0] 8001076: f003 0307 and.w r3, r3, #7 800107a: 4299 cmp r1, r3 800107c: d0ca beq.n 8001014 return HAL_ERROR; 800107e: 2001 movs r0, #1 8001080: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8001084: 4b34 ldr r3, [pc, #208] ; (8001158 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8001086: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 800108a: bf1e ittt ne 800108c: 685a ldrne r2, [r3, #4] 800108e: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8001092: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8001094: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8001096: bf42 ittt mi 8001098: 685a ldrmi r2, [r3, #4] 800109a: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 800109e: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80010a0: 685a ldr r2, [r3, #4] 80010a2: 68a8 ldr r0, [r5, #8] 80010a4: f022 02f0 bic.w r2, r2, #240 ; 0xf0 80010a8: 4302 orrs r2, r0 80010aa: 605a str r2, [r3, #4] 80010ac: e7b5 b.n 800101a if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010ae: 686a ldr r2, [r5, #4] 80010b0: 4c29 ldr r4, [pc, #164] ; (8001158 ) 80010b2: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80010b4: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010b6: d11c bne.n 80010f2 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80010b8: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80010bc: d0df beq.n 800107e __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80010be: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80010c0: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80010c4: f023 0303 bic.w r3, r3, #3 80010c8: 4313 orrs r3, r2 80010ca: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 80010cc: f7ff f8f8 bl 80002c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010d0: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 80010d2: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010d4: 2b01 cmp r3, #1 80010d6: d114 bne.n 8001102 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 80010d8: 6863 ldr r3, [r4, #4] 80010da: f003 030c and.w r3, r3, #12 80010de: 2b04 cmp r3, #4 80010e0: d09d beq.n 800101e if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80010e2: f7ff f8ed bl 80002c0 80010e6: 1bc0 subs r0, r0, r7 80010e8: 4540 cmp r0, r8 80010ea: d9f5 bls.n 80010d8 return HAL_TIMEOUT; 80010ec: 2003 movs r0, #3 80010ee: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80010f2: 2a02 cmp r2, #2 80010f4: d102 bne.n 80010fc if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80010f6: f013 7f00 tst.w r3, #33554432 ; 0x2000000 80010fa: e7df b.n 80010bc if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80010fc: f013 0f02 tst.w r3, #2 8001100: e7dc b.n 80010bc else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8001102: 2b02 cmp r3, #2 8001104: d10f bne.n 8001126 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8001106: 6863 ldr r3, [r4, #4] 8001108: f003 030c and.w r3, r3, #12 800110c: 2b08 cmp r3, #8 800110e: d086 beq.n 800101e if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001110: f7ff f8d6 bl 80002c0 8001114: 1bc0 subs r0, r0, r7 8001116: 4540 cmp r0, r8 8001118: d9f5 bls.n 8001106 800111a: e7e7 b.n 80010ec if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 800111c: f7ff f8d0 bl 80002c0 8001120: 1bc0 subs r0, r0, r7 8001122: 4540 cmp r0, r8 8001124: d8e2 bhi.n 80010ec while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8001126: 6863 ldr r3, [r4, #4] 8001128: f013 0f0c tst.w r3, #12 800112c: d1f6 bne.n 800111c 800112e: e776 b.n 800101e __HAL_FLASH_SET_LATENCY(FLatency); 8001130: 6813 ldr r3, [r2, #0] 8001132: f023 0307 bic.w r3, r3, #7 8001136: 4333 orrs r3, r6 8001138: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 800113a: 6813 ldr r3, [r2, #0] 800113c: f003 0307 and.w r3, r3, #7 8001140: 429e cmp r6, r3 8001142: d19c bne.n 800107e 8001144: e772 b.n 800102c MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8001146: 6863 ldr r3, [r4, #4] 8001148: 68e9 ldr r1, [r5, #12] 800114a: f423 63e0 bic.w r3, r3, #1792 ; 0x700 800114e: 430b orrs r3, r1 8001150: 6063 str r3, [r4, #4] 8001152: e771 b.n 8001038 8001154: 40022000 .word 0x40022000 8001158: 40021000 .word 0x40021000 800115c: 0800395a .word 0x0800395a 8001160: 20000218 .word 0x20000218 08001164 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8001164: 4b04 ldr r3, [pc, #16] ; (8001178 ) 8001166: 4a05 ldr r2, [pc, #20] ; (800117c ) 8001168: 685b ldr r3, [r3, #4] 800116a: f3c3 2302 ubfx r3, r3, #8, #3 800116e: 5cd3 ldrb r3, [r2, r3] 8001170: 4a03 ldr r2, [pc, #12] ; (8001180 ) 8001172: 6810 ldr r0, [r2, #0] } 8001174: 40d8 lsrs r0, r3 8001176: 4770 bx lr 8001178: 40021000 .word 0x40021000 800117c: 0800396a .word 0x0800396a 8001180: 20000218 .word 0x20000218 08001184 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8001184: 4b04 ldr r3, [pc, #16] ; (8001198 ) 8001186: 4a05 ldr r2, [pc, #20] ; (800119c ) 8001188: 685b ldr r3, [r3, #4] 800118a: f3c3 23c2 ubfx r3, r3, #11, #3 800118e: 5cd3 ldrb r3, [r2, r3] 8001190: 4a03 ldr r2, [pc, #12] ; (80011a0 ) 8001192: 6810 ldr r0, [r2, #0] } 8001194: 40d8 lsrs r0, r3 8001196: 4770 bx lr 8001198: 40021000 .word 0x40021000 800119c: 0800396a .word 0x0800396a 80011a0: 20000218 .word 0x20000218 080011a4 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80011a4: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 80011a6: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80011a8: 68da ldr r2, [r3, #12] 80011aa: f042 0201 orr.w r2, r2, #1 80011ae: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 80011b0: 681a ldr r2, [r3, #0] 80011b2: f042 0201 orr.w r2, r2, #1 80011b6: 601a str r2, [r3, #0] } 80011b8: 4770 bx lr 080011ba : 80011ba: 4770 bx lr 080011bc : 80011bc: 4770 bx lr 080011be : 80011be: 4770 bx lr 080011c0 : 80011c0: 4770 bx lr 080011c2 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80011c2: 6803 ldr r3, [r0, #0] { 80011c4: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80011c6: 691a ldr r2, [r3, #16] { 80011c8: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80011ca: 0791 lsls r1, r2, #30 80011cc: d50e bpl.n 80011ec { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 80011ce: 68da ldr r2, [r3, #12] 80011d0: 0792 lsls r2, r2, #30 80011d2: d50b bpl.n 80011ec { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80011d4: f06f 0202 mvn.w r2, #2 80011d8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80011da: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80011dc: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80011de: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80011e0: 079b lsls r3, r3, #30 80011e2: d077 beq.n 80012d4 { HAL_TIM_IC_CaptureCallback(htim); 80011e4: f7ff ffea bl 80011bc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80011e8: 2300 movs r3, #0 80011ea: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80011ec: 6823 ldr r3, [r4, #0] 80011ee: 691a ldr r2, [r3, #16] 80011f0: 0750 lsls r0, r2, #29 80011f2: d510 bpl.n 8001216 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 80011f4: 68da ldr r2, [r3, #12] 80011f6: 0751 lsls r1, r2, #29 80011f8: d50d bpl.n 8001216 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 80011fa: f06f 0204 mvn.w r2, #4 80011fe: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001200: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001202: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001204: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001206: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 800120a: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 800120c: d068 beq.n 80012e0 HAL_TIM_IC_CaptureCallback(htim); 800120e: f7ff ffd5 bl 80011bc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001212: 2300 movs r3, #0 8001214: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8001216: 6823 ldr r3, [r4, #0] 8001218: 691a ldr r2, [r3, #16] 800121a: 0712 lsls r2, r2, #28 800121c: d50f bpl.n 800123e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 800121e: 68da ldr r2, [r3, #12] 8001220: 0710 lsls r0, r2, #28 8001222: d50c bpl.n 800123e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8001224: f06f 0208 mvn.w r2, #8 8001228: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800122a: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800122c: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800122e: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001230: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8001232: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001234: d05a beq.n 80012ec HAL_TIM_IC_CaptureCallback(htim); 8001236: f7ff ffc1 bl 80011bc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800123a: 2300 movs r3, #0 800123c: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 800123e: 6823 ldr r3, [r4, #0] 8001240: 691a ldr r2, [r3, #16] 8001242: 06d2 lsls r2, r2, #27 8001244: d510 bpl.n 8001268 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8001246: 68da ldr r2, [r3, #12] 8001248: 06d0 lsls r0, r2, #27 800124a: d50d bpl.n 8001268 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 800124c: f06f 0210 mvn.w r2, #16 8001250: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001252: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001254: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001256: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001258: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 800125c: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800125e: d04b beq.n 80012f8 HAL_TIM_IC_CaptureCallback(htim); 8001260: f7ff ffac bl 80011bc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001264: 2300 movs r3, #0 8001266: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8001268: 6823 ldr r3, [r4, #0] 800126a: 691a ldr r2, [r3, #16] 800126c: 07d1 lsls r1, r2, #31 800126e: d508 bpl.n 8001282 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8001270: 68da ldr r2, [r3, #12] 8001272: 07d2 lsls r2, r2, #31 8001274: d505 bpl.n 8001282 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001276: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 800127a: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 800127c: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 800127e: f000 fec5 bl 800200c } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8001282: 6823 ldr r3, [r4, #0] 8001284: 691a ldr r2, [r3, #16] 8001286: 0610 lsls r0, r2, #24 8001288: d508 bpl.n 800129c { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 800128a: 68da ldr r2, [r3, #12] 800128c: 0611 lsls r1, r2, #24 800128e: d505 bpl.n 800129c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001290: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8001294: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001296: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 8001298: f000 f8bf bl 800141a } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 800129c: 6823 ldr r3, [r4, #0] 800129e: 691a ldr r2, [r3, #16] 80012a0: 0652 lsls r2, r2, #25 80012a2: d508 bpl.n 80012b6 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 80012a4: 68da ldr r2, [r3, #12] 80012a6: 0650 lsls r0, r2, #25 80012a8: d505 bpl.n 80012b6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80012aa: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80012ae: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80012b0: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80012b2: f7ff ff85 bl 80011c0 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80012b6: 6823 ldr r3, [r4, #0] 80012b8: 691a ldr r2, [r3, #16] 80012ba: 0691 lsls r1, r2, #26 80012bc: d522 bpl.n 8001304 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 80012be: 68da ldr r2, [r3, #12] 80012c0: 0692 lsls r2, r2, #26 80012c2: d51f bpl.n 8001304 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80012c4: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 80012c8: 4620 mov r0, r4 } } } 80012ca: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80012ce: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 80012d0: f000 b8a2 b.w 8001418 HAL_TIM_OC_DelayElapsedCallback(htim); 80012d4: f7ff ff71 bl 80011ba HAL_TIM_PWM_PulseFinishedCallback(htim); 80012d8: 4620 mov r0, r4 80012da: f7ff ff70 bl 80011be 80012de: e783 b.n 80011e8 HAL_TIM_OC_DelayElapsedCallback(htim); 80012e0: f7ff ff6b bl 80011ba HAL_TIM_PWM_PulseFinishedCallback(htim); 80012e4: 4620 mov r0, r4 80012e6: f7ff ff6a bl 80011be 80012ea: e792 b.n 8001212 HAL_TIM_OC_DelayElapsedCallback(htim); 80012ec: f7ff ff65 bl 80011ba HAL_TIM_PWM_PulseFinishedCallback(htim); 80012f0: 4620 mov r0, r4 80012f2: f7ff ff64 bl 80011be 80012f6: e7a0 b.n 800123a HAL_TIM_OC_DelayElapsedCallback(htim); 80012f8: f7ff ff5f bl 80011ba HAL_TIM_PWM_PulseFinishedCallback(htim); 80012fc: 4620 mov r0, r4 80012fe: f7ff ff5e bl 80011be 8001302: e7af b.n 8001264 8001304: bd10 pop {r4, pc} ... 08001308 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001308: 4a24 ldr r2, [pc, #144] ; (800139c ) tmpcr1 = TIMx->CR1; 800130a: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 800130c: 4290 cmp r0, r2 800130e: d012 beq.n 8001336 8001310: f502 6200 add.w r2, r2, #2048 ; 0x800 8001314: 4290 cmp r0, r2 8001316: d00e beq.n 8001336 8001318: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 800131c: d00b beq.n 8001336 800131e: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001322: 4290 cmp r0, r2 8001324: d007 beq.n 8001336 8001326: f502 6280 add.w r2, r2, #1024 ; 0x400 800132a: 4290 cmp r0, r2 800132c: d003 beq.n 8001336 800132e: f502 6280 add.w r2, r2, #1024 ; 0x400 8001332: 4290 cmp r0, r2 8001334: d11d bne.n 8001372 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8001336: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8001338: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 800133c: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800133e: 4a17 ldr r2, [pc, #92] ; (800139c ) 8001340: 4290 cmp r0, r2 8001342: d012 beq.n 800136a 8001344: f502 6200 add.w r2, r2, #2048 ; 0x800 8001348: 4290 cmp r0, r2 800134a: d00e beq.n 800136a 800134c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001350: d00b beq.n 800136a 8001352: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001356: 4290 cmp r0, r2 8001358: d007 beq.n 800136a 800135a: f502 6280 add.w r2, r2, #1024 ; 0x400 800135e: 4290 cmp r0, r2 8001360: d003 beq.n 800136a 8001362: f502 6280 add.w r2, r2, #1024 ; 0x400 8001366: 4290 cmp r0, r2 8001368: d103 bne.n 8001372 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 800136a: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 800136c: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8001370: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001372: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8001374: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001378: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 800137a: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 800137c: 688b ldr r3, [r1, #8] 800137e: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8001380: 680b ldr r3, [r1, #0] 8001382: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8001384: 4b05 ldr r3, [pc, #20] ; (800139c ) 8001386: 4298 cmp r0, r3 8001388: d003 beq.n 8001392 800138a: f503 6300 add.w r3, r3, #2048 ; 0x800 800138e: 4298 cmp r0, r3 8001390: d101 bne.n 8001396 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8001392: 690b ldr r3, [r1, #16] 8001394: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 8001396: 2301 movs r3, #1 8001398: 6143 str r3, [r0, #20] 800139a: 4770 bx lr 800139c: 40012c00 .word 0x40012c00 080013a0 : { 80013a0: b510 push {r4, lr} if(htim == NULL) 80013a2: 4604 mov r4, r0 80013a4: b1a0 cbz r0, 80013d0 if(htim->State == HAL_TIM_STATE_RESET) 80013a6: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 80013aa: f003 02ff and.w r2, r3, #255 ; 0xff 80013ae: b91b cbnz r3, 80013b8 htim->Lock = HAL_UNLOCKED; 80013b0: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80013b4: f000 ffd2 bl 800235c htim->State= HAL_TIM_STATE_BUSY; 80013b8: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80013ba: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 80013bc: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80013c0: 1d21 adds r1, r4, #4 80013c2: f7ff ffa1 bl 8001308 htim->State= HAL_TIM_STATE_READY; 80013c6: 2301 movs r3, #1 return HAL_OK; 80013c8: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 80013ca: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80013ce: bd10 pop {r4, pc} return HAL_ERROR; 80013d0: 2001 movs r0, #1 } 80013d2: bd10 pop {r4, pc} 080013d4 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 80013d4: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80013d8: b510 push {r4, lr} __HAL_LOCK(htim); 80013da: 2b01 cmp r3, #1 80013dc: f04f 0302 mov.w r3, #2 80013e0: d018 beq.n 8001414 htim->State = HAL_TIM_STATE_BUSY; 80013e2: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80013e6: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80013e8: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80013ea: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80013ec: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80013ee: f022 0270 bic.w r2, r2, #112 ; 0x70 80013f2: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80013f4: 685a ldr r2, [r3, #4] 80013f6: 4322 orrs r2, r4 80013f8: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 80013fa: 689a ldr r2, [r3, #8] 80013fc: f022 0280 bic.w r2, r2, #128 ; 0x80 8001400: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8001402: 689a ldr r2, [r3, #8] 8001404: 430a orrs r2, r1 8001406: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 8001408: 2301 movs r3, #1 800140a: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 800140e: 2300 movs r3, #0 8001410: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8001414: 4618 mov r0, r3 return HAL_OK; } 8001416: bd10 pop {r4, pc} 08001418 : 8001418: 4770 bx lr 0800141a : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 800141a: 4770 bx lr 0800141c : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 800141c: 6803 ldr r3, [r0, #0] 800141e: 68da ldr r2, [r3, #12] 8001420: f422 7290 bic.w r2, r2, #288 ; 0x120 8001424: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001426: 695a ldr r2, [r3, #20] 8001428: f022 0201 bic.w r2, r2, #1 800142c: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 800142e: 2320 movs r3, #32 8001430: f880 303a strb.w r3, [r0, #58] ; 0x3a 8001434: 4770 bx lr ... 08001438 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8001438: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 800143c: 6805 ldr r5, [r0, #0] 800143e: 68c2 ldr r2, [r0, #12] 8001440: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001442: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001444: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8001448: 4313 orrs r3, r2 800144a: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800144c: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 800144e: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001450: 430b orrs r3, r1 8001452: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8001454: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 8001458: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800145c: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 800145e: 4313 orrs r3, r2 8001460: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8001462: 696b ldr r3, [r5, #20] 8001464: 6982 ldr r2, [r0, #24] 8001466: f423 7340 bic.w r3, r3, #768 ; 0x300 800146a: 4313 orrs r3, r2 800146c: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 800146e: 4b40 ldr r3, [pc, #256] ; (8001570 ) { 8001470: 4681 mov r9, r0 if(huart->Instance == USART1) 8001472: 429d cmp r5, r3 8001474: f04f 0419 mov.w r4, #25 8001478: d146 bne.n 8001508 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 800147a: f7ff fe83 bl 8001184 800147e: fb04 f300 mul.w r3, r4, r0 8001482: f8d9 6004 ldr.w r6, [r9, #4] 8001486: f04f 0864 mov.w r8, #100 ; 0x64 800148a: 00b6 lsls r6, r6, #2 800148c: fbb3 f3f6 udiv r3, r3, r6 8001490: fbb3 f3f8 udiv r3, r3, r8 8001494: 011e lsls r6, r3, #4 8001496: f7ff fe75 bl 8001184 800149a: 4360 muls r0, r4 800149c: f8d9 3004 ldr.w r3, [r9, #4] 80014a0: 009b lsls r3, r3, #2 80014a2: fbb0 f7f3 udiv r7, r0, r3 80014a6: f7ff fe6d bl 8001184 80014aa: 4360 muls r0, r4 80014ac: f8d9 3004 ldr.w r3, [r9, #4] 80014b0: 009b lsls r3, r3, #2 80014b2: fbb0 f3f3 udiv r3, r0, r3 80014b6: fbb3 f3f8 udiv r3, r3, r8 80014ba: fb08 7313 mls r3, r8, r3, r7 80014be: 011b lsls r3, r3, #4 80014c0: 3332 adds r3, #50 ; 0x32 80014c2: fbb3 f3f8 udiv r3, r3, r8 80014c6: f003 07f0 and.w r7, r3, #240 ; 0xf0 80014ca: f7ff fe5b bl 8001184 80014ce: 4360 muls r0, r4 80014d0: f8d9 2004 ldr.w r2, [r9, #4] 80014d4: 0092 lsls r2, r2, #2 80014d6: fbb0 faf2 udiv sl, r0, r2 80014da: f7ff fe53 bl 8001184 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80014de: 4360 muls r0, r4 80014e0: f8d9 3004 ldr.w r3, [r9, #4] 80014e4: 009b lsls r3, r3, #2 80014e6: fbb0 f3f3 udiv r3, r0, r3 80014ea: fbb3 f3f8 udiv r3, r3, r8 80014ee: fb08 a313 mls r3, r8, r3, sl 80014f2: 011b lsls r3, r3, #4 80014f4: 3332 adds r3, #50 ; 0x32 80014f6: fbb3 f3f8 udiv r3, r3, r8 80014fa: f003 030f and.w r3, r3, #15 80014fe: 433b orrs r3, r7 8001500: 4433 add r3, r6 8001502: 60ab str r3, [r5, #8] 8001504: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8001508: f7ff fe2c bl 8001164 800150c: fb04 f300 mul.w r3, r4, r0 8001510: f8d9 6004 ldr.w r6, [r9, #4] 8001514: f04f 0864 mov.w r8, #100 ; 0x64 8001518: 00b6 lsls r6, r6, #2 800151a: fbb3 f3f6 udiv r3, r3, r6 800151e: fbb3 f3f8 udiv r3, r3, r8 8001522: 011e lsls r6, r3, #4 8001524: f7ff fe1e bl 8001164 8001528: 4360 muls r0, r4 800152a: f8d9 3004 ldr.w r3, [r9, #4] 800152e: 009b lsls r3, r3, #2 8001530: fbb0 f7f3 udiv r7, r0, r3 8001534: f7ff fe16 bl 8001164 8001538: 4360 muls r0, r4 800153a: f8d9 3004 ldr.w r3, [r9, #4] 800153e: 009b lsls r3, r3, #2 8001540: fbb0 f3f3 udiv r3, r0, r3 8001544: fbb3 f3f8 udiv r3, r3, r8 8001548: fb08 7313 mls r3, r8, r3, r7 800154c: 011b lsls r3, r3, #4 800154e: 3332 adds r3, #50 ; 0x32 8001550: fbb3 f3f8 udiv r3, r3, r8 8001554: f003 07f0 and.w r7, r3, #240 ; 0xf0 8001558: f7ff fe04 bl 8001164 800155c: 4360 muls r0, r4 800155e: f8d9 2004 ldr.w r2, [r9, #4] 8001562: 0092 lsls r2, r2, #2 8001564: fbb0 faf2 udiv sl, r0, r2 8001568: f7ff fdfc bl 8001164 800156c: e7b7 b.n 80014de 800156e: bf00 nop 8001570: 40013800 .word 0x40013800 08001574 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8001574: b5f8 push {r3, r4, r5, r6, r7, lr} 8001576: 4604 mov r4, r0 8001578: 460e mov r6, r1 800157a: 4617 mov r7, r2 800157c: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800157e: 6821 ldr r1, [r4, #0] 8001580: 680b ldr r3, [r1, #0] 8001582: ea36 0303 bics.w r3, r6, r3 8001586: d101 bne.n 800158c return HAL_OK; 8001588: 2000 movs r0, #0 } 800158a: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 800158c: 1c6b adds r3, r5, #1 800158e: d0f7 beq.n 8001580 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8001590: b995 cbnz r5, 80015b8 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8001592: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8001594: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8001596: 68da ldr r2, [r3, #12] 8001598: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 800159c: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800159e: 695a ldr r2, [r3, #20] 80015a0: f022 0201 bic.w r2, r2, #1 80015a4: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 80015a6: 2320 movs r3, #32 80015a8: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 80015ac: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 80015b0: 2300 movs r3, #0 80015b2: f884 3038 strb.w r3, [r4, #56] ; 0x38 80015b6: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80015b8: f7fe fe82 bl 80002c0 80015bc: 1bc0 subs r0, r0, r7 80015be: 4285 cmp r5, r0 80015c0: d2dd bcs.n 800157e 80015c2: e7e6 b.n 8001592 080015c4 : { 80015c4: b510 push {r4, lr} if(huart == NULL) 80015c6: 4604 mov r4, r0 80015c8: b340 cbz r0, 800161c if(huart->gState == HAL_UART_STATE_RESET) 80015ca: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 80015ce: f003 02ff and.w r2, r3, #255 ; 0xff 80015d2: b91b cbnz r3, 80015dc huart->Lock = HAL_UNLOCKED; 80015d4: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 80015d8: f000 fed4 bl 8002384 huart->gState = HAL_UART_STATE_BUSY; 80015dc: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 80015de: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 80015e0: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 80015e4: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 80015e6: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 80015e8: f423 5300 bic.w r3, r3, #8192 ; 0x2000 80015ec: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 80015ee: f7ff ff23 bl 8001438 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80015f2: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 80015f4: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80015f6: 691a ldr r2, [r3, #16] 80015f8: f422 4290 bic.w r2, r2, #18432 ; 0x4800 80015fc: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80015fe: 695a ldr r2, [r3, #20] 8001600: f022 022a bic.w r2, r2, #42 ; 0x2a 8001604: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8001606: 68da ldr r2, [r3, #12] 8001608: f442 5200 orr.w r2, r2, #8192 ; 0x2000 800160c: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 800160e: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001610: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8001612: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 8001616: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 800161a: bd10 pop {r4, pc} return HAL_ERROR; 800161c: 2001 movs r0, #1 } 800161e: bd10 pop {r4, pc} 08001620 : { 8001620: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001624: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 8001626: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 800162a: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 800162c: 2b20 cmp r3, #32 { 800162e: 460d mov r5, r1 8001630: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8001632: d14e bne.n 80016d2 if((pData == NULL) || (Size == 0U)) 8001634: 2900 cmp r1, #0 8001636: d049 beq.n 80016cc 8001638: 2a00 cmp r2, #0 800163a: d047 beq.n 80016cc __HAL_LOCK(huart); 800163c: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8001640: 2b01 cmp r3, #1 8001642: d046 beq.n 80016d2 8001644: 2301 movs r3, #1 8001646: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 800164a: 2300 movs r3, #0 800164c: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 800164e: 2321 movs r3, #33 ; 0x21 8001650: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8001654: f7fe fe34 bl 80002c0 8001658: 4606 mov r6, r0 huart->TxXferSize = Size; 800165a: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 800165e: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8001662: 8ce3 ldrh r3, [r4, #38] ; 0x26 8001664: b29b uxth r3, r3 8001666: b96b cbnz r3, 8001684 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8001668: 463b mov r3, r7 800166a: 4632 mov r2, r6 800166c: 2140 movs r1, #64 ; 0x40 800166e: 4620 mov r0, r4 8001670: f7ff ff80 bl 8001574 8001674: b9a8 cbnz r0, 80016a2 huart->gState = HAL_UART_STATE_READY; 8001676: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8001678: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 800167c: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8001680: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8001684: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001686: 4632 mov r2, r6 huart->TxXferCount--; 8001688: 3b01 subs r3, #1 800168a: b29b uxth r3, r3 800168c: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800168e: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001690: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001692: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001696: 4620 mov r0, r4 8001698: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800169a: d10e bne.n 80016ba if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800169c: f7ff ff6a bl 8001574 80016a0: b110 cbz r0, 80016a8 return HAL_TIMEOUT; 80016a2: 2003 movs r0, #3 80016a4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 80016a8: 882b ldrh r3, [r5, #0] 80016aa: 6822 ldr r2, [r4, #0] 80016ac: f3c3 0308 ubfx r3, r3, #0, #9 80016b0: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80016b2: 6923 ldr r3, [r4, #16] 80016b4: b943 cbnz r3, 80016c8 pData +=2U; 80016b6: 3502 adds r5, #2 80016b8: e7d3 b.n 8001662 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80016ba: f7ff ff5b bl 8001574 80016be: 2800 cmp r0, #0 80016c0: d1ef bne.n 80016a2 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 80016c2: 6823 ldr r3, [r4, #0] 80016c4: 782a ldrb r2, [r5, #0] 80016c6: 605a str r2, [r3, #4] 80016c8: 3501 adds r5, #1 80016ca: e7ca b.n 8001662 return HAL_ERROR; 80016cc: 2001 movs r0, #1 80016ce: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 80016d2: 2002 movs r0, #2 } 80016d4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 080016d8 : { 80016d8: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 80016da: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 80016de: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 80016e0: 2a20 cmp r2, #32 { 80016e2: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 80016e4: d138 bne.n 8001758 if((pData == NULL) || (Size == 0U)) 80016e6: 2900 cmp r1, #0 80016e8: d034 beq.n 8001754 80016ea: 2b00 cmp r3, #0 80016ec: d032 beq.n 8001754 __HAL_LOCK(huart); 80016ee: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 80016f2: 2a01 cmp r2, #1 80016f4: d030 beq.n 8001758 80016f6: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 80016f8: 2400 movs r4, #0 __HAL_LOCK(huart); 80016fa: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 80016fe: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8001700: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 8001702: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8001704: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8001706: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 800170a: 6b40 ldr r0, [r0, #52] ; 0x34 800170c: 4a13 ldr r2, [pc, #76] ; (800175c ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 800170e: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8001710: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8001712: 4a13 ldr r2, [pc, #76] ; (8001760 ) huart->hdmarx->XferAbortCallback = NULL; 8001714: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8001716: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8001718: 4a12 ldr r2, [pc, #72] ; (8001764 ) 800171a: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 800171c: 460a mov r2, r1 800171e: 1d31 adds r1, r6, #4 8001720: f7fe fe7c bl 800041c return HAL_OK; 8001724: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 8001726: 682b ldr r3, [r5, #0] 8001728: 9401 str r4, [sp, #4] 800172a: 681a ldr r2, [r3, #0] 800172c: 9201 str r2, [sp, #4] 800172e: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8001730: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8001734: 9201 str r2, [sp, #4] 8001736: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8001738: 68da ldr r2, [r3, #12] 800173a: f442 7280 orr.w r2, r2, #256 ; 0x100 800173e: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001740: 695a ldr r2, [r3, #20] 8001742: f042 0201 orr.w r2, r2, #1 8001746: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001748: 695a ldr r2, [r3, #20] 800174a: f042 0240 orr.w r2, r2, #64 ; 0x40 800174e: 615a str r2, [r3, #20] } 8001750: b002 add sp, #8 8001752: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8001754: 2001 movs r0, #1 8001756: e7fb b.n 8001750 return HAL_BUSY; 8001758: 2002 movs r0, #2 800175a: e7f9 b.n 8001750 800175c: 0800176b .word 0x0800176b 8001760: 08001821 .word 0x08001821 8001764: 0800182d .word 0x0800182d 08001768 : 8001768: 4770 bx lr 0800176a : { 800176a: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800176c: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800176e: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001770: 681b ldr r3, [r3, #0] 8001772: f013 0320 ands.w r3, r3, #32 8001776: d110 bne.n 800179a huart->RxXferCount = 0U; 8001778: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 800177a: 6813 ldr r3, [r2, #0] 800177c: 68d9 ldr r1, [r3, #12] 800177e: f421 7180 bic.w r1, r1, #256 ; 0x100 8001782: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001784: 6959 ldr r1, [r3, #20] 8001786: f021 0101 bic.w r1, r1, #1 800178a: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 800178c: 6959 ldr r1, [r3, #20] 800178e: f021 0140 bic.w r1, r1, #64 ; 0x40 8001792: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8001794: 2320 movs r3, #32 8001796: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 800179a: 4610 mov r0, r2 800179c: f000 ff9a bl 80026d4 80017a0: bd08 pop {r3, pc} 080017a2 : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80017a2: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 80017a6: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80017a8: 2b22 cmp r3, #34 ; 0x22 80017aa: d136 bne.n 800181a if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80017ac: 6883 ldr r3, [r0, #8] 80017ae: 6901 ldr r1, [r0, #16] 80017b0: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 80017b4: 6802 ldr r2, [r0, #0] 80017b6: 6a83 ldr r3, [r0, #40] ; 0x28 80017b8: d123 bne.n 8001802 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80017ba: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80017bc: b9e9 cbnz r1, 80017fa *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80017be: f3c2 0208 ubfx r2, r2, #0, #9 80017c2: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 80017c6: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 80017c8: 8dc4 ldrh r4, [r0, #46] ; 0x2e 80017ca: 3c01 subs r4, #1 80017cc: b2a4 uxth r4, r4 80017ce: 85c4 strh r4, [r0, #46] ; 0x2e 80017d0: b98c cbnz r4, 80017f6 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80017d2: 6803 ldr r3, [r0, #0] 80017d4: 68da ldr r2, [r3, #12] 80017d6: f022 0220 bic.w r2, r2, #32 80017da: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80017dc: 68da ldr r2, [r3, #12] 80017de: f422 7280 bic.w r2, r2, #256 ; 0x100 80017e2: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80017e4: 695a ldr r2, [r3, #20] 80017e6: f022 0201 bic.w r2, r2, #1 80017ea: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80017ec: 2320 movs r3, #32 80017ee: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 80017f2: f000 ff6f bl 80026d4 if(--huart->RxXferCount == 0U) 80017f6: 2000 movs r0, #0 } 80017f8: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 80017fa: b2d2 uxtb r2, r2 80017fc: f823 2b01 strh.w r2, [r3], #1 8001800: e7e1 b.n 80017c6 if(huart->Init.Parity == UART_PARITY_NONE) 8001802: b921 cbnz r1, 800180e *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8001804: 1c59 adds r1, r3, #1 8001806: 6852 ldr r2, [r2, #4] 8001808: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 800180a: 701a strb r2, [r3, #0] 800180c: e7dc b.n 80017c8 800180e: 6852 ldr r2, [r2, #4] 8001810: 1c59 adds r1, r3, #1 8001812: 6281 str r1, [r0, #40] ; 0x28 8001814: f002 027f and.w r2, r2, #127 ; 0x7f 8001818: e7f7 b.n 800180a return HAL_BUSY; 800181a: 2002 movs r0, #2 800181c: bd10 pop {r4, pc} 0800181e : 800181e: 4770 bx lr 08001820 : { 8001820: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8001822: 6a40 ldr r0, [r0, #36] ; 0x24 8001824: f7ff fffb bl 800181e 8001828: bd08 pop {r3, pc} 0800182a : 800182a: 4770 bx lr 0800182c : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800182c: 6a41 ldr r1, [r0, #36] ; 0x24 { 800182e: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8001830: 680b ldr r3, [r1, #0] 8001832: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8001834: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8001838: 2821 cmp r0, #33 ; 0x21 800183a: d10a bne.n 8001852 800183c: 0612 lsls r2, r2, #24 800183e: d508 bpl.n 8001852 huart->TxXferCount = 0U; 8001840: 2200 movs r2, #0 8001842: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8001844: 68da ldr r2, [r3, #12] 8001846: f022 02c0 bic.w r2, r2, #192 ; 0xc0 800184a: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 800184c: 2220 movs r2, #32 800184e: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8001852: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8001854: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8001858: 2a22 cmp r2, #34 ; 0x22 800185a: d106 bne.n 800186a 800185c: 065b lsls r3, r3, #25 800185e: d504 bpl.n 800186a huart->RxXferCount = 0U; 8001860: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8001862: 4608 mov r0, r1 huart->RxXferCount = 0U; 8001864: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8001866: f7ff fdd9 bl 800141c huart->ErrorCode |= HAL_UART_ERROR_DMA; 800186a: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 800186c: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 800186e: f043 0310 orr.w r3, r3, #16 8001872: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001874: f7ff ffd9 bl 800182a 8001878: bd08 pop {r3, pc} ... 0800187c : uint32_t isrflags = READ_REG(huart->Instance->SR); 800187c: 6803 ldr r3, [r0, #0] { 800187e: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8001880: 681a ldr r2, [r3, #0] { 8001882: 4604 mov r4, r0 if(errorflags == RESET) 8001884: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8001886: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8001888: 695d ldr r5, [r3, #20] if(errorflags == RESET) 800188a: d107 bne.n 800189c if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 800188c: 0696 lsls r6, r2, #26 800188e: d55a bpl.n 8001946 8001890: 068d lsls r5, r1, #26 8001892: d558 bpl.n 8001946 } 8001894: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8001898: f7ff bf83 b.w 80017a2 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 800189c: f015 0501 ands.w r5, r5, #1 80018a0: d102 bne.n 80018a8 80018a2: f411 7f90 tst.w r1, #288 ; 0x120 80018a6: d04e beq.n 8001946 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 80018a8: 07d3 lsls r3, r2, #31 80018aa: d505 bpl.n 80018b8 80018ac: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 80018ae: bf42 ittt mi 80018b0: 6be3 ldrmi r3, [r4, #60] ; 0x3c 80018b2: f043 0301 orrmi.w r3, r3, #1 80018b6: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80018b8: 0750 lsls r0, r2, #29 80018ba: d504 bpl.n 80018c6 80018bc: b11d cbz r5, 80018c6 huart->ErrorCode |= HAL_UART_ERROR_NE; 80018be: 6be3 ldr r3, [r4, #60] ; 0x3c 80018c0: f043 0302 orr.w r3, r3, #2 80018c4: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80018c6: 0793 lsls r3, r2, #30 80018c8: d504 bpl.n 80018d4 80018ca: b11d cbz r5, 80018d4 huart->ErrorCode |= HAL_UART_ERROR_FE; 80018cc: 6be3 ldr r3, [r4, #60] ; 0x3c 80018ce: f043 0304 orr.w r3, r3, #4 80018d2: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80018d4: 0716 lsls r6, r2, #28 80018d6: d504 bpl.n 80018e2 80018d8: b11d cbz r5, 80018e2 huart->ErrorCode |= HAL_UART_ERROR_ORE; 80018da: 6be3 ldr r3, [r4, #60] ; 0x3c 80018dc: f043 0308 orr.w r3, r3, #8 80018e0: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 80018e2: 6be3 ldr r3, [r4, #60] ; 0x3c 80018e4: 2b00 cmp r3, #0 80018e6: d066 beq.n 80019b6 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80018e8: 0695 lsls r5, r2, #26 80018ea: d504 bpl.n 80018f6 80018ec: 0688 lsls r0, r1, #26 80018ee: d502 bpl.n 80018f6 UART_Receive_IT(huart); 80018f0: 4620 mov r0, r4 80018f2: f7ff ff56 bl 80017a2 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80018f6: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 80018f8: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80018fa: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 80018fc: 6be2 ldr r2, [r4, #60] ; 0x3c 80018fe: 0711 lsls r1, r2, #28 8001900: d402 bmi.n 8001908 8001902: f015 0540 ands.w r5, r5, #64 ; 0x40 8001906: d01a beq.n 800193e UART_EndRxTransfer(huart); 8001908: f7ff fd88 bl 800141c if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 800190c: 6823 ldr r3, [r4, #0] 800190e: 695a ldr r2, [r3, #20] 8001910: 0652 lsls r2, r2, #25 8001912: d510 bpl.n 8001936 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001914: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8001916: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001918: f022 0240 bic.w r2, r2, #64 ; 0x40 800191c: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 800191e: b150 cbz r0, 8001936 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8001920: 4b25 ldr r3, [pc, #148] ; (80019b8 ) 8001922: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8001924: f7fe fdb8 bl 8000498 8001928: 2800 cmp r0, #0 800192a: d044 beq.n 80019b6 huart->hdmarx->XferAbortCallback(huart->hdmarx); 800192c: 6b60 ldr r0, [r4, #52] ; 0x34 } 800192e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8001932: 6b43 ldr r3, [r0, #52] ; 0x34 8001934: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8001936: 4620 mov r0, r4 8001938: f7ff ff77 bl 800182a 800193c: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 800193e: f7ff ff74 bl 800182a huart->ErrorCode = HAL_UART_ERROR_NONE; 8001942: 63e5 str r5, [r4, #60] ; 0x3c 8001944: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8001946: 0616 lsls r6, r2, #24 8001948: d527 bpl.n 800199a 800194a: 060d lsls r5, r1, #24 800194c: d525 bpl.n 800199a if(huart->gState == HAL_UART_STATE_BUSY_TX) 800194e: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8001952: 2a21 cmp r2, #33 ; 0x21 8001954: d12f bne.n 80019b6 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001956: 68a2 ldr r2, [r4, #8] 8001958: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 800195c: 6a22 ldr r2, [r4, #32] 800195e: d117 bne.n 8001990 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8001960: 8811 ldrh r1, [r2, #0] 8001962: f3c1 0108 ubfx r1, r1, #0, #9 8001966: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8001968: 6921 ldr r1, [r4, #16] 800196a: b979 cbnz r1, 800198c huart->pTxBuffPtr += 2U; 800196c: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800196e: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8001970: 8ce2 ldrh r2, [r4, #38] ; 0x26 8001972: 3a01 subs r2, #1 8001974: b292 uxth r2, r2 8001976: 84e2 strh r2, [r4, #38] ; 0x26 8001978: b9ea cbnz r2, 80019b6 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 800197a: 68da ldr r2, [r3, #12] 800197c: f022 0280 bic.w r2, r2, #128 ; 0x80 8001980: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8001982: 68da ldr r2, [r3, #12] 8001984: f042 0240 orr.w r2, r2, #64 ; 0x40 8001988: 60da str r2, [r3, #12] 800198a: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 800198c: 3201 adds r2, #1 800198e: e7ee b.n 800196e huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8001990: 1c51 adds r1, r2, #1 8001992: 6221 str r1, [r4, #32] 8001994: 7812 ldrb r2, [r2, #0] 8001996: 605a str r2, [r3, #4] 8001998: e7ea b.n 8001970 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 800199a: 0650 lsls r0, r2, #25 800199c: d50b bpl.n 80019b6 800199e: 064a lsls r2, r1, #25 80019a0: d509 bpl.n 80019b6 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80019a2: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 80019a4: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80019a6: f022 0240 bic.w r2, r2, #64 ; 0x40 80019aa: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 80019ac: 2320 movs r3, #32 80019ae: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 80019b2: f7ff fed9 bl 8001768 80019b6: bd70 pop {r4, r5, r6, pc} 80019b8: 080019bd .word 0x080019bd 080019bc : { 80019bc: b508 push {r3, lr} huart->RxXferCount = 0x00U; 80019be: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80019c0: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 80019c2: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 80019c4: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 80019c6: f7ff ff30 bl 800182a 80019ca: bd08 pop {r3, pc} 080019cc : * ***/ #define Bluecell_BootStart 0x0b uint8_t BootStartdata[6] = {0xbe,Bluecell_BootStart,0x03,4,0,0xeb}; void Firmware_BootStart_Signal(){ 80019cc: b510 push {r4, lr} BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 80019ce: 4c06 ldr r4, [pc, #24] ; (80019e8 ) 80019d0: 78a1 ldrb r1, [r4, #2] 80019d2: 1c60 adds r0, r4, #1 80019d4: f000 f8be bl 8001b54 Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80019d8: 78a1 ldrb r1, [r4, #2] BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 80019da: 7120 strb r0, [r4, #4] Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80019dc: 3103 adds r1, #3 80019de: 4620 mov r0, r4 } 80019e0: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80019e4: f000 be9c b.w 8002720 80019e8: 2000000e .word 0x2000000e 080019ec : uint8_t AckData_Buf[6] = {0xbe,FirmwareUpdataAck,0x03,5,0,0xbe}; void FirmwareUpdateStart(uint8_t* data){ 80019ec: b570 push {r4, r5, r6, lr} uint8_t ret = 0,crccheck = 0; crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80019ee: 7881 ldrb r1, [r0, #2] void FirmwareUpdateStart(uint8_t* data){ 80019f0: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80019f2: 1843 adds r3, r0, r1 80019f4: 785a ldrb r2, [r3, #1] 80019f6: 3001 adds r0, #1 80019f8: f000 f8c7 bl 8001b8a if(crccheck == NO_ERROR){ 80019fc: 2801 cmp r0, #1 80019fe: d00e beq.n 8001a1e 8001a00: 2300 movs r3, #0 ret = Flash_write(&data[0]); if(ret == 1) AckData_Buf[bluecell_type] = FirmwareUpdataNak; }else{ for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) printf("%02x ",data[i]); 8001a02: 4e1e ldr r6, [pc, #120] ; (8001a7c ) for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) 8001a04: 78a2 ldrb r2, [r4, #2] 8001a06: 1c5d adds r5, r3, #1 8001a08: 3202 adds r2, #2 8001a0a: b2db uxtb r3, r3 8001a0c: 429a cmp r2, r3 8001a0e: da2d bge.n 8001a6c printf("Check Sum error \n"); 8001a10: 481b ldr r0, [pc, #108] ; (8001a80 ) 8001a12: f000 ff5b bl 80028cc AckData_Buf[bluecell_type] = FirmwareUpdataNak; 8001a16: 2222 movs r2, #34 ; 0x22 8001a18: 4b1a ldr r3, [pc, #104] ; (8001a84 ) 8001a1a: 705a strb r2, [r3, #1] 8001a1c: e00e b.n 8001a3c AckData_Buf[bluecell_type] = FirmwareUpdataAck; 8001a1e: 2211 movs r2, #17 8001a20: 4d18 ldr r5, [pc, #96] ; (8001a84 ) 8001a22: 706a strb r2, [r5, #1] if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte 8001a24: 7862 ldrb r2, [r4, #1] 8001a26: 2add cmp r2, #221 ; 0xdd 8001a28: d001 beq.n 8001a2e 8001a2a: 2aee cmp r2, #238 ; 0xee 8001a2c: d106 bne.n 8001a3c ret = Flash_write(&data[0]); 8001a2e: 4620 mov r0, r4 8001a30: f000 fa6e bl 8001f10 if(ret == 1) 8001a34: 2801 cmp r0, #1 8001a36: d101 bne.n 8001a3c AckData_Buf[bluecell_type] = FirmwareUpdataNak; 8001a38: 2322 movs r3, #34 ; 0x22 8001a3a: 706b strb r3, [r5, #1] } AckData_Buf[bluecell_crc] = STH30_CreateCrc(&AckData_Buf[bluecell_type],AckData_Buf[bluecell_length]); 8001a3c: 4d11 ldr r5, [pc, #68] ; (8001a84 ) 8001a3e: 78a9 ldrb r1, [r5, #2] 8001a40: 1c68 adds r0, r5, #1 8001a42: f000 f887 bl 8001b54 8001a46: 7128 strb r0, [r5, #4] if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){ 8001a48: 7863 ldrb r3, [r4, #1] 8001a4a: 2bee cmp r3, #238 ; 0xee 8001a4c: d006 beq.n 8001a5c 8001a4e: 2b0a cmp r3, #10 8001a50: d004 beq.n 8001a5c Uart1_Data_Send(&AckData_Buf[bluecell_stx],AckData_Buf[bluecell_length] + 3); 8001a52: 78a9 ldrb r1, [r5, #2] 8001a54: 4628 mov r0, r5 8001a56: 3103 adds r1, #3 8001a58: f000 fe62 bl 8002720 } if(data[bluecell_type] == 0xEE) 8001a5c: 7863 ldrb r3, [r4, #1] 8001a5e: 2bee cmp r3, #238 ; 0xee 8001a60: d10a bne.n 8001a78 printf("update Complete \n"); } 8001a62: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} printf("update Complete \n"); 8001a66: 4808 ldr r0, [pc, #32] ; (8001a88 ) 8001a68: f000 bf30 b.w 80028cc printf("%02x ",data[i]); 8001a6c: 5ce1 ldrb r1, [r4, r3] 8001a6e: 4630 mov r0, r6 8001a70: f000 feb8 bl 80027e4 8001a74: 462b mov r3, r5 8001a76: e7c5 b.n 8001a04 8001a78: bd70 pop {r4, r5, r6, pc} 8001a7a: bf00 nop 8001a7c: 08003858 .word 0x08003858 8001a80: 0800385e .word 0x0800385e 8001a84: 20000008 .word 0x20000008 8001a88: 0800386f .word 0x0800386f 08001a8c : //----------------------------------------------- //UART CRC üũ �Լ� //----------------------------------------------- bool Chksum_Check(uint8_t *data, uint32_t leng,uint8_t chkdata) { uint8_t dataret = 0; 8001a8c: 2300 movs r3, #0 { 8001a8e: b510 push {r4, lr} 8001a90: 1cc1 adds r1, r0, #3 8001a92: 3014 adds r0, #20 bool ret = false; for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ dataret += data[i]; 8001a94: f811 4f01 ldrb.w r4, [r1, #1]! 8001a98: 4423 add r3, r4 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001a9a: 4281 cmp r1, r0 dataret += data[i]; 8001a9c: b2db uxtb r3, r3 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001a9e: d1f9 bne.n 8001a94 if(dataret == chkdata){ ret = true; } // printf("dataret : %x chkdata : %x \r\n",dataret,chkdata); return ret; } 8001aa0: 1a9b subs r3, r3, r2 8001aa2: 4258 negs r0, r3 8001aa4: 4158 adcs r0, r3 8001aa6: bd10 pop {r4, pc} 08001aa8 : uint8_t Chksum_Create(uint8_t *data) { 8001aa8: 1cc2 adds r2, r0, #3 8001aaa: f100 0314 add.w r3, r0, #20 uint8_t dataret = 0; 8001aae: 2000 movs r0, #0 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ dataret += data[i]; 8001ab0: f812 1f01 ldrb.w r1, [r2, #1]! 8001ab4: 4408 add r0, r1 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001ab6: 429a cmp r2, r3 dataret += data[i]; 8001ab8: b2c0 uxtb r0, r0 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001aba: d1f9 bne.n 8001ab0 // printf("dataret : %x data[%d] : %x \r\n",dataret,i,data[i]); } // printf("dataret : %x \r\n",dataret); return dataret; } 8001abc: 4770 bx lr ... 08001ac0 : { uint8_t dt = 0U; uint16_t crc16 = 0U; len *= 8; for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001ac0: 2300 movs r3, #0 { 8001ac2: b510 push {r4, lr} { crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001ac4: 4c0f ldr r4, [pc, #60] ; (8001b04 ) len *= 8; 8001ac6: 00c9 lsls r1, r1, #3 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001ac8: 2907 cmp r1, #7 8001aca: dc0f bgt.n 8001aec } if(len != 0) 8001acc: b161 cbz r1, 8001ae8 len--; if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) { crc16 = (uint16_t)(crc16 << 1); crc16 = (uint16_t)(crc16 ^ 0x1021); 8001ace: f241 0221 movw r2, #4129 ; 0x1021 if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) 8001ad2: f413 4f00 tst.w r3, #32768 ; 0x8000 8001ad6: ea4f 0343 mov.w r3, r3, lsl #1 crc16 = (uint16_t)(crc16 << 1); 8001ada: b29b uxth r3, r3 len--; 8001adc: f101 31ff add.w r1, r1, #4294967295 crc16 = (uint16_t)(crc16 ^ 0x1021); 8001ae0: bf18 it ne 8001ae2: 4053 eorne r3, r2 while(len != 0) 8001ae4: 2900 cmp r1, #0 8001ae6: d1f4 bne.n 8001ad2 } dt = (uint8_t)(dt << 1); } } return(crc16); } 8001ae8: 4618 mov r0, r3 8001aea: bd10 pop {r4, pc} crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001aec: f810 2b01 ldrb.w r2, [r0], #1 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001af0: 3908 subs r1, #8 crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001af2: ea82 2213 eor.w r2, r2, r3, lsr #8 8001af6: f834 2012 ldrh.w r2, [r4, r2, lsl #1] 8001afa: ea82 2303 eor.w r3, r2, r3, lsl #8 8001afe: b29b uxth r3, r3 8001b00: e7e2 b.n 8001ac8 8001b02: bf00 nop 8001b04: 20000014 .word 0x20000014 08001b08 : { uint8_t dt = 0U; uint16_t crc16 = 0U; len *= 8; for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001b08: 2300 movs r3, #0 { 8001b0a: b530 push {r4, r5, lr} { crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001b0c: 4d10 ldr r5, [pc, #64] ; (8001b50 ) len *= 8; 8001b0e: 00c9 lsls r1, r1, #3 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001b10: 2907 cmp r1, #7 8001b12: dc11 bgt.n 8001b38 } if(len != 0) 8001b14: b161 cbz r1, 8001b30 len--; if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) { crc16 = (uint16_t)(crc16 << 1); crc16 = (uint16_t)(crc16 ^ 0x1021); 8001b16: f241 0021 movw r0, #4129 ; 0x1021 if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) 8001b1a: f413 4f00 tst.w r3, #32768 ; 0x8000 8001b1e: ea4f 0343 mov.w r3, r3, lsl #1 crc16 = (uint16_t)(crc16 << 1); 8001b22: b29b uxth r3, r3 len--; 8001b24: f101 31ff add.w r1, r1, #4294967295 crc16 = (uint16_t)(crc16 ^ 0x1021); 8001b28: bf18 it ne 8001b2a: 4043 eorne r3, r0 while(len != 0) 8001b2c: 2900 cmp r1, #0 8001b2e: d1f4 bne.n 8001b1a } dt = (uint8_t)(dt << 1); } } return(crc16 == checksum ? CHECKSUM_ERROR : NO_ERROR ); } 8001b30: 1a98 subs r0, r3, r2 8001b32: bf18 it ne 8001b34: 2001 movne r0, #1 8001b36: bd30 pop {r4, r5, pc} crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001b38: f810 4b01 ldrb.w r4, [r0], #1 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001b3c: 3908 subs r1, #8 crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001b3e: ea84 2413 eor.w r4, r4, r3, lsr #8 8001b42: f835 4014 ldrh.w r4, [r5, r4, lsl #1] 8001b46: ea84 2303 eor.w r3, r4, r3, lsl #8 8001b4a: b29b uxth r3, r3 8001b4c: e7e0 b.n 8001b10 8001b4e: bf00 nop 8001b50: 20000014 .word 0x20000014 08001b54 : uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 8001b54: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001b56: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001b58: 4604 mov r4, r0 8001b5a: 1a22 subs r2, r4, r0 8001b5c: b2d2 uxtb r2, r2 8001b5e: 4291 cmp r1, r2 8001b60: d801 bhi.n 8001b66 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 8001b62: 4618 mov r0, r3 8001b64: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 8001b66: f814 2b01 ldrb.w r2, [r4], #1 8001b6a: 4053 eors r3, r2 8001b6c: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001b6e: f013 0f80 tst.w r3, #128 ; 0x80 8001b72: f102 32ff add.w r2, r2, #4294967295 8001b76: ea4f 0343 mov.w r3, r3, lsl #1 8001b7a: bf18 it ne 8001b7c: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001b80: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8001b84: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001b86: d1f2 bne.n 8001b6e 8001b88: e7e7 b.n 8001b5a 08001b8a : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8001b8a: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001b8c: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001b8e: 4605 mov r5, r0 8001b90: 1a2c subs r4, r5, r0 8001b92: b2e4 uxtb r4, r4 8001b94: 42a1 cmp r1, r4 8001b96: d803 bhi.n 8001ba0 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8001b98: 1a9b subs r3, r3, r2 8001b9a: 4258 negs r0, r3 8001b9c: 4158 adcs r0, r3 8001b9e: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8001ba0: f815 4b01 ldrb.w r4, [r5], #1 8001ba4: 4063 eors r3, r4 8001ba6: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001ba8: f013 0f80 tst.w r3, #128 ; 0x80 8001bac: f104 34ff add.w r4, r4, #4294967295 8001bb0: ea4f 0343 mov.w r3, r3, lsl #1 8001bb4: bf18 it ne 8001bb6: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001bba: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8001bbe: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001bc0: d1f2 bne.n 8001ba8 8001bc2: e7e5 b.n 8001b90 08001bc4 : Length : Response Data Length CRCINDEX : CRC INDEX Number */ uint8_t* MBIC_HeaderMergeFunction(uint8_t* data,uint16_t Length ) { 8001bc4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 8001bc8: f101 0320 add.w r3, r1, #32 8001bcc: f023 0307 bic.w r3, r3, #7 { 8001bd0: af00 add r7, sp, #0 uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 8001bd2: ebad 0d03 sub.w sp, sp, r3 { 8001bd6: 4604 mov r4, r0 8001bd8: 460e mov r6, r1 uint16_t CRCData = CRC16_Generate(data,Length); 8001bda: f7ff ff71 bl 8001ac0 /*CRC Create*/ ret[MBIC_PAYLOADSTART + Length + 0] = ((CRCData & 0xFF00) >> 8); 8001bde: eb0d 0306 add.w r3, sp, r6 8001be2: 0a02 lsrs r2, r0, #8 8001be4: 759a strb r2, [r3, #22] ret[MBIC_PAYLOADSTART + Length + 1] = ((CRCData & 0x00FF)); ret[MBIC_PAYLOADSTART + Length + 2] = 0x03; 8001be6: 2203 movs r2, #3 ret[MBIC_PAYLOADSTART + Length + 1] = ((CRCData & 0x00FF)); 8001be8: 75d8 strb r0, [r3, #23] ret[MBIC_PAYLOADSTART + Length + 2] = 0x03; 8001bea: 761a strb r2, [r3, #24] /*Data Mark Create*/ ret[MBIC_PREAMBLE_0] = MBIC_PREAMBLE0; 8001bec: 2316 movs r3, #22 8001bee: f88d 3000 strb.w r3, [sp] ret[MBIC_PREAMBLE_1] = MBIC_PREAMBLE1; 8001bf2: f88d 3001 strb.w r3, [sp, #1] ret[MBIC_PREAMBLE_2] = MBIC_PREAMBLE2; 8001bf6: f88d 3002 strb.w r3, [sp, #2] ret[MBIC_PREAMBLE_3] = MBIC_PREAMBLE3; 8001bfa: f88d 3003 strb.w r3, [sp, #3] /*Data Subid Create*/ ret[MBIC_SUBUID_0] = MBIC_SUBUID0; ret[MBIC_SUBUID_1] = MBIC_SUBUID1; 8001bfe: 23f1 movs r3, #241 ; 0xf1 ret[MBIC_SUBUID_0] = MBIC_SUBUID0; 8001c00: 2500 movs r5, #0 ret[MBIC_SUBUID_1] = MBIC_SUBUID1; 8001c02: f88d 3005 strb.w r3, [sp, #5] ret[MBIC_RCODE_0] = data[MBIC_RCODE_0]; 8001c06: 79a3 ldrb r3, [r4, #6] ret[MBIC_LENGTH_0] = (Length & 0xFF00) >>8; ret[MBIC_LENGTH_1] = Length & 0x00FF; ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8001c08: 4668 mov r0, sp ret[MBIC_RCODE_0] = data[MBIC_RCODE_0]; 8001c0a: f88d 3006 strb.w r3, [sp, #6] ret[MBIC_TRID_0] = data[MBIC_TRID_0]; 8001c0e: 79e3 ldrb r3, [r4, #7] ret[MBIC_SUBUID_0] = MBIC_SUBUID0; 8001c10: f88d 5004 strb.w r5, [sp, #4] ret[MBIC_TRID_0] = data[MBIC_TRID_0]; 8001c14: f88d 3007 strb.w r3, [sp, #7] ret[MBIC_TRID_1] = data[MBIC_TRID_1]; 8001c18: 7a23 ldrb r3, [r4, #8] ret[MBIC_ERRRESPONSE_0] = MBIC_ERRRESPONSE; 8001c1a: f88d 5011 strb.w r5, [sp, #17] ret[MBIC_TRID_1] = data[MBIC_TRID_1]; 8001c1e: f88d 3008 strb.w r3, [sp, #8] ret[MBIC_SEQSUM_0] = data[MBIC_SEQSUM_0]; 8001c22: 7a63 ldrb r3, [r4, #9] uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 8001c24: 46e8 mov r8, sp ret[MBIC_SEQSUM_0] = data[MBIC_SEQSUM_0]; 8001c26: f88d 3009 strb.w r3, [sp, #9] ret[MBIC_TTL_0] = data[MBIC_TTL_0]; 8001c2a: 7aa3 ldrb r3, [r4, #10] 8001c2c: f88d 300a strb.w r3, [sp, #10] ret[MBIC_TIME_0] = data[MBIC_TIME_0]; 8001c30: 7ae3 ldrb r3, [r4, #11] 8001c32: f88d 300b strb.w r3, [sp, #11] ret[MBIC_TIME_1] = data[MBIC_TIME_1]; 8001c36: 7b23 ldrb r3, [r4, #12] 8001c38: f88d 300c strb.w r3, [sp, #12] ret[MBIC_TIME_2] = data[MBIC_TIME_2]; 8001c3c: 7b63 ldrb r3, [r4, #13] 8001c3e: f88d 300d strb.w r3, [sp, #13] ret[MBIC_TIME_3] = data[MBIC_TIME_3]; 8001c42: 7ba3 ldrb r3, [r4, #14] 8001c44: f88d 300e strb.w r3, [sp, #14] ret[MBIC_TIME_4] = data[MBIC_TIME_4]; 8001c48: 7be3 ldrb r3, [r4, #15] 8001c4a: f88d 300f strb.w r3, [sp, #15] ret[MBIC_TIME_5] = data[MBIC_TIME_5]; 8001c4e: 7c23 ldrb r3, [r4, #16] 8001c50: f88d 3010 strb.w r3, [sp, #16] ret[MBIC_LENGTH_0] = (Length & 0xFF00) >>8; 8001c54: 0a33 lsrs r3, r6, #8 8001c56: f88d 3013 strb.w r3, [sp, #19] ret[MBIC_LENGTH_1] = Length & 0x00FF; 8001c5a: f88d 6014 strb.w r6, [sp, #20] ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8001c5e: f7ff ff23 bl 8001aa8 // data[MBIC_PAYLOADSTART + i] = data[i]; // } /* MBIC Header Data input */ for(int i = 0; i < MBIC_HEADER_SIZE; i++){ 8001c62: 462b mov r3, r5 ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8001c64: f88d 0015 strb.w r0, [sp, #21] if(i == MBIC_CMD_0) /*cmd exception*/ 8001c68: 2b12 cmp r3, #18 continue; data[i] = ret[i]; 8001c6a: bf1c itt ne 8001c6c: f818 2003 ldrbne.w r2, [r8, r3] 8001c70: 54e2 strbne r2, [r4, r3] for(int i = 0; i < MBIC_HEADER_SIZE; i++){ 8001c72: 3301 adds r3, #1 8001c74: 2b16 cmp r3, #22 8001c76: d1f7 bne.n 8001c68 8001c78: 2300 movs r3, #0 8001c7a: 3301 adds r3, #1 } /* MBIC Tail Data input */ for(int i = MBIC_HEADER_SIZE + Length; i < MBIC_HEADER_SIZE + MBIC_TAIL_SIZE + Length; i++){ 8001c7c: 2b04 cmp r3, #4 8001c7e: d103 bne.n 8001c88 // ret[MBIC_PAYLOADSTART + i] = data[i]; // for(int i = 0; i < Length; i++) // printf("MBIC : %x \r\n",data[i]); return data; } 8001c80: 4620 mov r0, r4 8001c82: 46bd mov sp, r7 8001c84: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} data[i] = ret[i]; 8001c88: 199a adds r2, r3, r6 8001c8a: 18a1 adds r1, r4, r2 8001c8c: 4442 add r2, r8 8001c8e: 7d52 ldrb r2, [r2, #21] 8001c90: 754a strb r2, [r1, #21] 8001c92: e7f2 b.n 8001c7a 08001c94 : void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){ 8001c94: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} // printf("RX"); // for(int i = 0; i < 128; i++) // printf("%c",*data++); switch(cmd){ 8001c98: 7c83 ldrb r3, [r0, #18] void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){ 8001c9a: 4604 mov r4, r0 switch(cmd){ 8001c9c: 3b10 subs r3, #16 8001c9e: 2b04 cmp r3, #4 8001ca0: f200 808d bhi.w 8001dbe 8001ca4: e8df f003 tbb [pc, r3] 8001ca8: 71491903 .word 0x71491903 8001cac: 7e .byte 0x7e 8001cad: 00 .byte 0x00 data[MBIC_PAYLOADSTART + index++] = data[MBIC_PAYLOADSTART + 3]; /*DOWNLOAD OPTION*/ data[MBIC_PAYLOADSTART + index++] = data[MBIC_PAYLOADSTART + 4]; Download_Option = data[MBIC_PAYLOADSTART + 4]; /*DOWNLOAD DELAY REQUEST*/ data[MBIC_PAYLOADSTART + index++] = 3; 8001cae: 2303 movs r3, #3 8001cb0: 76c3 strb r3, [r0, #27] /*DOWNLOAD Reserve*/ data[MBIC_PAYLOADSTART + index++] = 0; 8001cb2: 2300 movs r3, #0 8001cb4: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001cb6: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001cb8: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001cba: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001cbc: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001cc0: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Notice_RSP; 8001cc4: 2390 movs r3, #144 ; 0x90 data[MBIC_PAYLOADSTART + index++] = 0; break; default: return; } data[MBIC_CMD_0] = cmd; 8001cc6: 74a3 strb r3, [r4, #18] data = MBIC_HeaderMergeFunction(data,index); // reponse 8001cc8: 210c movs r1, #12 8001cca: 4620 mov r0, r4 8001ccc: f7ff ff7a bl 8001bc4 // HAL_UART_Transmit_DMA(&huart1, data,22 + 3 + index); Uart1_Data_Send(data ,22 + 3 + index); } 8001cd0: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} Uart1_Data_Send(data ,22 + 3 + index); 8001cd4: 2125 movs r1, #37 ; 0x25 8001cd6: f000 bd23 b.w 8002720 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8001cda: 7ec3 ldrb r3, [r0, #27] Curr_Download_DataIndex = data[MBIC_PAYLOADSTART + 4] << 24; 8001cdc: 7e82 ldrb r2, [r0, #26] Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8001cde: 041b lsls r3, r3, #16 8001ce0: eb03 6302 add.w r3, r3, r2, lsl #24 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8001ce4: 7f42 ldrb r2, [r0, #29] 8001ce6: 4e37 ldr r6, [pc, #220] ; (8001dc4 ) 8001ce8: 4413 add r3, r2 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 6] << 8; 8001cea: 7f02 ldrb r2, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001cec: 4607 mov r7, r0 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8001cee: eb03 2302 add.w r3, r3, r2, lsl #8 8001cf2: 6033 str r3, [r6, #0] data[MBIC_PAYLOADSTART + index++] = 0; 8001cf4: 2300 movs r3, #0 for(i = 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i++){ 8001cf6: 461d mov r5, r3 8001cf8: f8df 80d8 ldr.w r8, [pc, #216] ; 8001dd4 printf("%02x ",MBIC_DownLoadData[i]); 8001cfc: f8df 90d8 ldr.w r9, [pc, #216] ; 8001dd8 data[MBIC_PAYLOADSTART + index++] = 0; 8001d00: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001d02: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001d04: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001d08: f807 3f21 strb.w r3, [r7, #33]! for(i = 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i++){ 8001d0c: 6833 ldr r3, [r6, #0] 8001d0e: f8d8 2000 ldr.w r2, [r8] 8001d12: 1a9b subs r3, r3, r2 8001d14: 429d cmp r5, r3 8001d16: d909 bls.n 8001d2c Bank_Flash_write(data,FLASH_USER_START_ADDR); 8001d18: 492b ldr r1, [pc, #172] ; (8001dc8 ) 8001d1a: 4620 mov r0, r4 8001d1c: f000 f922 bl 8001f64 Prev_Download_DataIndex = Curr_Download_DataIndex + 1; 8001d20: 6833 ldr r3, [r6, #0] 8001d22: 3301 adds r3, #1 8001d24: f8c8 3000 str.w r3, [r8] cmd = MBIC_Download_DATA_RSP; 8001d28: 2391 movs r3, #145 ; 0x91 break; 8001d2a: e7cc b.n 8001cc6 printf("%02x ",MBIC_DownLoadData[i]); 8001d2c: f817 1f01 ldrb.w r1, [r7, #1]! 8001d30: 4648 mov r0, r9 8001d32: f000 fd57 bl 80027e4 for(i = 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i++){ 8001d36: 3501 adds r5, #1 8001d38: e7e8 b.n 8001d0c |data[MBIC_PAYLOADSTART + 1] << 16 8001d3a: 7dc5 ldrb r5, [r0, #23] TotalFrame = data[MBIC_PAYLOADSTART + 0] << 24 8001d3c: 7d83 ldrb r3, [r0, #22] |data[MBIC_PAYLOADSTART + 1] << 16 8001d3e: 042d lsls r5, r5, #16 8001d40: ea45 6503 orr.w r5, r5, r3, lsl #24 |data[MBIC_PAYLOADSTART + 3] << 0; 8001d44: 7e43 ldrb r3, [r0, #25] if(Curr_Download_DataIndex != TotalFrame){ 8001d46: 4e1f ldr r6, [pc, #124] ; (8001dc4 ) |data[MBIC_PAYLOADSTART + 3] << 0; 8001d48: 431d orrs r5, r3 |data[MBIC_PAYLOADSTART + 2] << 8 8001d4a: 7e03 ldrb r3, [r0, #24] if(Curr_Download_DataIndex != TotalFrame){ 8001d4c: 6831 ldr r1, [r6, #0] |data[MBIC_PAYLOADSTART + 3] << 0; 8001d4e: ea45 2503 orr.w r5, r5, r3, lsl #8 if(Curr_Download_DataIndex != TotalFrame){ 8001d52: 428d cmp r5, r1 8001d54: d003 beq.n 8001d5e printf("Device Total : %d\r\n File Total : %d\r\n ",Curr_Download_DataIndex,TotalFrame); 8001d56: 462a mov r2, r5 8001d58: 481c ldr r0, [pc, #112] ; (8001dcc ) 8001d5a: f000 fd43 bl 80027e4 FileCrc16 = data[MBIC_PAYLOADSTART + 4] << 8; 8001d5e: 7ea2 ldrb r2, [r4, #26] FileCrc16 += data[MBIC_PAYLOADSTART + 5]; 8001d60: 7ee3 ldrb r3, [r4, #27] 8001d62: eb03 2302 add.w r3, r3, r2, lsl #8 if(FileCrc16 != DeviceCrc16){ 8001d66: b29b uxth r3, r3 8001d68: b123 cbz r3, 8001d74 printf("Device Total : %d\r\n File Total : %d\r\n ",Curr_Download_DataIndex,TotalFrame); 8001d6a: 462a mov r2, r5 8001d6c: 6831 ldr r1, [r6, #0] 8001d6e: 4818 ldr r0, [pc, #96] ; (8001dd0 ) 8001d70: f000 fd38 bl 80027e4 data[MBIC_PAYLOADSTART + index++] = 0; 8001d74: 2300 movs r3, #0 8001d76: 7723 strb r3, [r4, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001d78: 7763 strb r3, [r4, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001d7a: 77a3 strb r3, [r4, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001d7c: 77e3 strb r3, [r4, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001d7e: f884 3020 strb.w r3, [r4, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001d82: f884 3021 strb.w r3, [r4, #33] ; 0x21 cmd = MBIC_Download_Confirm_RSP; 8001d86: 2392 movs r3, #146 ; 0x92 break; 8001d88: e79d b.n 8001cc6 data[MBIC_PAYLOADSTART + index++] = 3; 8001d8a: 2303 movs r3, #3 8001d8c: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 8001d8e: 2300 movs r3, #0 8001d90: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001d92: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001d94: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001d96: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001d98: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001d9c: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Complete_Notice_RSP; 8001da0: 2393 movs r3, #147 ; 0x93 break; 8001da2: e790 b.n 8001cc6 data[MBIC_PAYLOADSTART + index++] = 3; 8001da4: 2303 movs r3, #3 8001da6: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 8001da8: 2300 movs r3, #0 8001daa: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001dac: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001dae: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001db0: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001db2: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001db6: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Reboot_Notice_RSP; 8001dba: 2394 movs r3, #148 ; 0x94 break; 8001dbc: e783 b.n 8001cc6 8001dbe: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8001dc2: bf00 nop 8001dc4: 2000029c .word 0x2000029c 8001dc8: 08005000 .word 0x08005000 8001dcc: 08003880 .word 0x08003880 8001dd0: 080038b0 .word 0x080038b0 8001dd4: 200002a0 .word 0x200002a0 8001dd8: 08003858 .word 0x08003858 08001ddc : volatile static uint32_t UserAddress; typedef void (*fptr)(void); fptr jump_to_app; uint32_t jump_addr; void Jump_App(void){ 8001ddc: b5b0 push {r4, r5, r7, lr} __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001dde: 4a0d ldr r2, [pc, #52] ; (8001e14 ) void Jump_App(void){ 8001de0: af00 add r7, sp, #0 __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001de2: 69d3 ldr r3, [r2, #28] printf("boot loader start\n"); //硫붿꽭占�? 異쒕젰 8001de4: 480c ldr r0, [pc, #48] ; (8001e18 ) __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8001de6: f023 0310 bic.w r3, r3, #16 8001dea: 61d3 str r3, [r2, #28] printf("boot loader start\n"); //硫붿꽭占�? 異쒕젰 8001dec: f000 fd6e bl 80028cc jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8001df0: 4b0a ldr r3, [pc, #40] ; (8001e1c ) 8001df2: 4a0b ldr r2, [pc, #44] ; (8001e20 ) 8001df4: 681b ldr r3, [r3, #0] jump_to_app = (fptr) jump_addr; 8001df6: 4c0b ldr r4, [pc, #44] ; (8001e24 ) /* init user app's sp */ printf("jump!\n"); 8001df8: 480b ldr r0, [pc, #44] ; (8001e28 ) jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8001dfa: 6013 str r3, [r2, #0] jump_to_app = (fptr) jump_addr; 8001dfc: 6023 str r3, [r4, #0] printf("jump!\n"); 8001dfe: f000 fd65 bl 80028cc __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); 8001e02: 4b0a ldr r3, [pc, #40] ; (8001e2c ) 8001e04: 681b ldr r3, [r3, #0] __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); 8001e06: f383 8808 msr MSP, r3 jump_to_app(); 8001e0a: 6823 ldr r3, [r4, #0] } 8001e0c: 46bd mov sp, r7 8001e0e: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr} jump_to_app(); 8001e12: 4718 bx r3 8001e14: 40021000 .word 0x40021000 8001e18: 08003942 .word 0x08003942 8001e1c: 08005004 .word 0x08005004 8001e20: 20000320 .word 0x20000320 8001e24: 20000324 .word 0x20000324 8001e28: 08003954 .word 0x08003954 8001e2c: 08005000 .word 0x08005000 08001e30 : #endif // PYJ.2019.03.27_END -- } #if 1 // PYJ.2020.05.20_BEGIN -- uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001e30: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001e34: 4605 mov r5, r0 uint16_t Firmdata = 0; uint8_t ret = 0; for(int i = 0; i < data[bluecell_length] - 2; i+=2){ 8001e36: 4604 mov r4, r0 uint8_t ret = 0; 8001e38: 2700 movs r7, #0 Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001e3a: 4e0f ldr r6, [pc, #60] ; (8001e78 ) printf("HAL NOT OK \n"); 8001e3c: f8df 803c ldr.w r8, [pc, #60] ; 8001e7c for(int i = 0; i < data[bluecell_length] - 2; i+=2){ 8001e40: 78ab ldrb r3, [r5, #2] 8001e42: 1b62 subs r2, r4, r5 8001e44: 3b02 subs r3, #2 8001e46: 4293 cmp r3, r2 8001e48: dc02 bgt.n 8001e50 Address += 2; //if(!(i%FirmwareUpdateDelay)) // HAL_Delay(1); } return ret; } 8001e4a: 4638 mov r0, r7 8001e4c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001e50: 7923 ldrb r3, [r4, #4] Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); 8001e52: 78e2 ldrb r2, [r4, #3] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001e54: 6831 ldr r1, [r6, #0] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001e56: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001e5a: b292 uxth r2, r2 8001e5c: 2300 movs r3, #0 8001e5e: 2001 movs r0, #1 8001e60: f7fe fcd8 bl 8000814 8001e64: b118 cbz r0, 8001e6e printf("HAL NOT OK \n"); 8001e66: 4640 mov r0, r8 8001e68: f000 fd30 bl 80028cc ret = 1; 8001e6c: 2701 movs r7, #1 Address += 2; 8001e6e: 6833 ldr r3, [r6, #0] 8001e70: 3402 adds r4, #2 8001e72: 3302 adds r3, #2 8001e74: 6033 str r3, [r6, #0] 8001e76: e7e3 b.n 8001e40 8001e78: 20000214 .word 0x20000214 8001e7c: 08003927 .word 0x08003927 08001e80 : /* */ uint8_t Flash_Data_Write(uint8_t* data){ 8001e80: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8001e84: 4604 mov r4, r0 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 6] << 8; Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; #if 1 // PYJ.2020.06.16_BEGIN -- for(int i = 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i += 2){ 8001e86: 4605 mov r5, r0 uint8_t ret = 0; 8001e88: 2700 movs r7, #0 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8001e8a: 7ec3 ldrb r3, [r0, #27] Curr_Download_DataIndex = data[MBIC_PAYLOADSTART + 4] << 24; 8001e8c: 7e82 ldrb r2, [r0, #26] Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8001e8e: 041b lsls r3, r3, #16 8001e90: eb03 6302 add.w r3, r3, r2, lsl #24 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8001e94: 7f42 ldrb r2, [r0, #29] 8001e96: 4e1a ldr r6, [pc, #104] ; (8001f00 ) 8001e98: 4413 add r3, r2 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 6] << 8; 8001e9a: 7f02 ldrb r2, [r0, #28] for(int i = 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i += 2){ 8001e9c: f8df 8068 ldr.w r8, [pc, #104] ; 8001f08 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8001ea0: eb03 2302 add.w r3, r3, r2, lsl #8 Firmdata = ((data[MBIC_PAYLOADSTART + 12 +i]) & 0x00FF); Firmdata += ((data[MBIC_PAYLOADSTART + 12 +i + 1] << 8) & 0xFF00); HAL_Ret = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress , (uint16_t)Firmdata); 8001ea4: f8df 9064 ldr.w r9, [pc, #100] ; 8001f0c Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8001ea8: 6033 str r3, [r6, #0] for(int i = 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i += 2){ 8001eaa: 6833 ldr r3, [r6, #0] 8001eac: f8d8 2000 ldr.w r2, [r8] 8001eb0: 1b29 subs r1, r5, r4 8001eb2: 1a9a subs r2, r3, r2 8001eb4: 4291 cmp r1, r2 8001eb6: d905 bls.n 8001ec4 UserAddress += 2; } } #endif // PYJ.2020.06.16_END -- // HAL_Delay(1); Prev_Download_DataIndex = Curr_Download_DataIndex + 1; 8001eb8: 3301 adds r3, #1 8001eba: f8c8 3000 str.w r3, [r8] return ret; } 8001ebe: 4638 mov r0, r7 8001ec0: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} Firmdata += ((data[MBIC_PAYLOADSTART + 12 +i + 1] << 8) & 0xFF00); 8001ec4: f895 3023 ldrb.w r3, [r5, #35] ; 0x23 Firmdata = ((data[MBIC_PAYLOADSTART + 12 +i]) & 0x00FF); 8001ec8: f895 2022 ldrb.w r2, [r5, #34] ; 0x22 HAL_Ret = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress , (uint16_t)Firmdata); 8001ecc: f8d9 1000 ldr.w r1, [r9] Firmdata += ((data[MBIC_PAYLOADSTART + 12 +i + 1] << 8) & 0xFF00); 8001ed0: eb02 2203 add.w r2, r2, r3, lsl #8 HAL_Ret = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress , (uint16_t)Firmdata); 8001ed4: b292 uxth r2, r2 8001ed6: 2300 movs r3, #0 8001ed8: 2001 movs r0, #1 8001eda: f7fe fc9b bl 8000814 if(HAL_Ret != HAL_OK){ 8001ede: b130 cbz r0, 8001eee switch(ret) { 8001ee0: b167 cbz r7, 8001efc printf("HAL_FLASH_Program() error 0x%08x, see *hal_flash.h for bit definitions\n", HAL_FLASH_GetError()); 8001ee2: f7fe fc67 bl 80007b4 8001ee6: 4601 mov r1, r0 8001ee8: 4806 ldr r0, [pc, #24] ; (8001f04 ) 8001eea: f000 fc7b bl 80027e4 UserAddress += 2; 8001eee: f8d9 3000 ldr.w r3, [r9] 8001ef2: 3502 adds r5, #2 8001ef4: 3302 adds r3, #2 8001ef6: f8c9 3000 str.w r3, [r9] 8001efa: e7d6 b.n 8001eaa ret = 1; 8001efc: 2701 movs r7, #1 8001efe: e7f6 b.n 8001eee 8001f00: 200002a4 .word 0x200002a4 8001f04: 080038df .word 0x080038df 8001f08: 200002d0 .word 0x200002d0 8001f0c: 200002d4 .word 0x200002d4 08001f10 : return ret; } #endif // PYJ.2020.05.20_END -- uint8_t Flash_write(uint8_t* data) // ?占쏙옙湲고븿?占쏙옙 { 8001f10: b538 push {r3, r4, r5, lr} /*Variable used for Erase procedure*/ static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; /* Fill EraseInit structure*/ EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001f12: 2300 movs r3, #0 8001f14: 4c0e ldr r4, [pc, #56] ; (8001f50 ) { 8001f16: 4605 mov r5, r0 EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001f18: 6023 str r3, [r4, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001f1a: 4b0e ldr r3, [pc, #56] ; (8001f54 ) 8001f1c: 60a3 str r3, [r4, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8001f1e: 231f movs r3, #31 8001f20: 60e3 str r3, [r4, #12] // __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 HAL_FLASH_Unlock(); // lock ??占�? 8001f22: f7fe fc2b bl 800077c if(flashinit == 0){ 8001f26: 4b0c ldr r3, [pc, #48] ; (8001f58 ) 8001f28: 781a ldrb r2, [r3, #0] 8001f2a: b94a cbnz r2, 8001f40 flashinit= 1; 8001f2c: 2201 movs r2, #1 //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001f2e: 490b ldr r1, [pc, #44] ; (8001f5c ) 8001f30: 4620 mov r0, r4 flashinit= 1; 8001f32: 701a strb r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001f34: f7fe fcd8 bl 80008e8 8001f38: b110 cbz r0, 8001f40 printf("Erase Failed \r\n"); 8001f3a: 4809 ldr r0, [pc, #36] ; (8001f60 ) 8001f3c: f000 fcc6 bl 80028cc } } // FLASH_If_Erase(); ret = Flash_RGB_Data_Write(&data[bluecell_stx]); 8001f40: 4628 mov r0, r5 8001f42: f7ff ff75 bl 8001e30 8001f46: 4604 mov r4, r0 // ret = Flash_DataTest_Write(&data[bluecell_stx]); HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린 8001f48: f7fe fc2a bl 80007a0 // __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙 return ret; } 8001f4c: 4620 mov r0, r4 8001f4e: bd38 pop {r3, r4, r5, pc} 8001f50: 200002a8 .word 0x200002a8 8001f54: 08005000 .word 0x08005000 8001f58: 200002d8 .word 0x200002d8 8001f5c: 200002c8 .word 0x200002c8 8001f60: 08003933 .word 0x08003933 08001f64 : uint8_t Bank_Flash_write(uint8_t* data,uint32_t StartBankAddress) // ?占쏙옙湲고븿?占쏙옙 { 8001f64: b538 push {r3, r4, r5, lr} 8001f66: 460c mov r4, r1 8001f68: 4605 mov r5, r0 static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; HAL_FLASH_Unlock(); // lock ??占�? 8001f6a: f7fe fc07 bl 800077c if(flashinit == 0){ 8001f6e: 491c ldr r1, [pc, #112] ; (8001fe0 ) 8001f70: 780a ldrb r2, [r1, #0] 8001f72: b9a2 cbnz r2, 8001f9e /* Fill EraseInit structure*/ switch(StartBankAddress){ 8001f74: 4b1b ldr r3, [pc, #108] ; (8001fe4 ) 8001f76: 429c cmp r4, r3 8001f78: 4b1b ldr r3, [pc, #108] ; (8001fe8 ) 8001f7a: d028 beq.n 8001fce 8001f7c: d817 bhi.n 8001fae 8001f7e: 481b ldr r0, [pc, #108] ; (8001fec ) 8001f80: 4284 cmp r4, r0 8001f82: d01f beq.n 8001fc4 EraseInitStruct.PageAddress = FLASH_USER_TEMPBANK_START_ADDR; EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_TEMPBANK_START_ADDR) / FLASH_PAGE_SIZE; break; } flashinit= 1; 8001f84: 2201 movs r2, #1 8001f86: 700a strb r2, [r1, #0] UserAddress = EraseInitStruct.PageAddress; 8001f88: 689a ldr r2, [r3, #8] 8001f8a: 4b19 ldr r3, [pc, #100] ; (8001ff0 ) //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001f8c: 4919 ldr r1, [pc, #100] ; (8001ff4 ) 8001f8e: 4816 ldr r0, [pc, #88] ; (8001fe8 ) UserAddress = EraseInitStruct.PageAddress; 8001f90: 601a str r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001f92: f7fe fca9 bl 80008e8 8001f96: b110 cbz r0, 8001f9e printf("Erase Failed \r\n"); 8001f98: 4817 ldr r0, [pc, #92] ; (8001ff8 ) 8001f9a: f000 fc97 bl 80028cc } } ret = Flash_Data_Write(&data[MBIC_PREAMBLE_0]); 8001f9e: 4628 mov r0, r5 8001fa0: f7ff ff6e bl 8001e80 8001fa4: 4604 mov r4, r0 HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린 8001fa6: f7fe fbfb bl 80007a0 return ret; } 8001faa: 4620 mov r0, r4 8001fac: bd38 pop {r3, r4, r5, pc} switch(StartBankAddress){ 8001fae: 4813 ldr r0, [pc, #76] ; (8001ffc ) 8001fb0: 4284 cmp r4, r0 8001fb2: d010 beq.n 8001fd6 8001fb4: f500 3080 add.w r0, r0, #65536 ; 0x10000 8001fb8: 4284 cmp r4, r0 8001fba: d1e3 bne.n 8001f84 EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001fbc: 601a str r2, [r3, #0] EraseInitStruct.PageAddress = FLASH_USER_TEMPBANK_START_ADDR; 8001fbe: 609c str r4, [r3, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_TEMPBANK_START_ADDR) / FLASH_PAGE_SIZE; 8001fc0: 4a0f ldr r2, [pc, #60] ; (8002000 ) 8001fc2: e002 b.n 8001fca EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001fc4: 601a str r2, [r3, #0] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8001fc6: 221f movs r2, #31 EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001fc8: 609c str r4, [r3, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_TEMPBANK_START_ADDR) / FLASH_PAGE_SIZE; 8001fca: 60da str r2, [r3, #12] break; 8001fcc: e7da b.n 8001f84 EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001fce: 601a str r2, [r3, #0] EraseInitStruct.PageAddress = FLASH_USER_BANK1_START_ADDR; 8001fd0: 609c str r4, [r3, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_BANK1_START_ADDR) / FLASH_PAGE_SIZE; 8001fd2: 4a0c ldr r2, [pc, #48] ; (8002004 ) 8001fd4: e7f9 b.n 8001fca EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001fd6: 601a str r2, [r3, #0] EraseInitStruct.PageAddress = FLASH_USER_BANK2_START_ADDR; 8001fd8: 609c str r4, [r3, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_BANK2_START_ADDR) / FLASH_PAGE_SIZE; 8001fda: 4a0b ldr r2, [pc, #44] ; (8002008 ) 8001fdc: e7f5 b.n 8001fca 8001fde: bf00 nop 8001fe0: 200002d8 .word 0x200002d8 8001fe4: 08015000 .word 0x08015000 8001fe8: 200002b8 .word 0x200002b8 8001fec: 08005000 .word 0x08005000 8001ff0: 200002d4 .word 0x200002d4 8001ff4: 200002cc .word 0x200002cc 8001ff8: 08003933 .word 0x08003933 8001ffc: 08025000 .word 0x08025000 8002000: 001fffbf .word 0x001fffbf 8002004: 001fffff .word 0x001fffff 8002008: 001fffdf .word 0x001fffdf 0800200c : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 800200c: 6802 ldr r2, [r0, #0] 800200e: 4b08 ldr r3, [pc, #32] ; (8002030 ) 8002010: 429a cmp r2, r3 8002012: d10b bne.n 800202c UartTimerCnt++; 8002014: 4a07 ldr r2, [pc, #28] ; (8002034 ) 8002016: 6813 ldr r3, [r2, #0] 8002018: 3301 adds r3, #1 800201a: 6013 str r3, [r2, #0] LedTimerCnt++; 800201c: 4a06 ldr r2, [pc, #24] ; (8002038 ) 800201e: 6813 ldr r3, [r2, #0] 8002020: 3301 adds r3, #1 8002022: 6013 str r3, [r2, #0] FirmwareTimerCnt++; 8002024: 4a05 ldr r2, [pc, #20] ; (800203c ) 8002026: 6813 ldr r3, [r2, #0] 8002028: 3301 adds r3, #1 800202a: 6013 str r3, [r2, #0] 800202c: 4770 bx lr 800202e: bf00 nop 8002030: 40001000 .word 0x40001000 8002034: 200002e4 .word 0x200002e4 8002038: 200002e0 .word 0x200002e0 800203c: 200002dc .word 0x200002dc 08002040 <_write>: } } int _write (int file, uint8_t *ptr, uint16_t len) { 8002040: b510 push {r4, lr} 8002042: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8002044: 230a movs r3, #10 8002046: 4802 ldr r0, [pc, #8] ; (8002050 <_write+0x10>) 8002048: f7ff faea bl 8001620 return len; } 800204c: 4620 mov r0, r4 800204e: bd10 pop {r4, pc} 8002050: 20000448 .word 0x20000448 08002054 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8002054: b510 push {r4, lr} 8002056: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8002058: 2228 movs r2, #40 ; 0x28 800205a: 2100 movs r1, #0 800205c: a806 add r0, sp, #24 800205e: f000 fbb9 bl 80027d4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002062: 2214 movs r2, #20 8002064: 2100 movs r1, #0 8002066: a801 add r0, sp, #4 8002068: f000 fbb4 bl 80027d4 /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800206c: 2301 movs r3, #1 800206e: 930a str r3, [sp, #40] ; 0x28 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8002070: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8002072: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8002074: 930b str r3, [sp, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 8002076: f44f 1340 mov.w r3, #3145728 ; 0x300000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800207a: a806 add r0, sp, #24 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 800207c: 930f str r3, [sp, #60] ; 0x3c RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 800207e: 9406 str r4, [sp, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8002080: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002082: f7fe fdf5 bl 8000c70 { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002086: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8002088: f44f 6280 mov.w r2, #1024 ; 0x400 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800208c: 9301 str r3, [sp, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800208e: 2300 movs r3, #0 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8002090: 4621 mov r1, r4 8002092: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8002094: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002096: 9303 str r3, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8002098: 9204 str r2, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800209a: 9305 str r3, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 800209c: f7fe ffb0 bl 8001000 { Error_Handler(); } } 80020a0: b010 add sp, #64 ; 0x40 80020a2: bd10 pop {r4, pc} 080020a4
: { 80020a4: b580 push {r7, lr} 80020a6: b088 sub sp, #32 HAL_Init(); 80020a8: f7fe f8ec bl 8000284 SystemClock_Config(); 80020ac: f7ff ffd2 bl 8002054 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80020b0: 2210 movs r2, #16 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 80020b2: 4d6f ldr r5, [pc, #444] ; (8002270 ) GPIO_InitTypeDef GPIO_InitStruct = {0}; 80020b4: 2100 movs r1, #0 80020b6: eb0d 0002 add.w r0, sp, r2 80020ba: f000 fb8b bl 80027d4 __HAL_RCC_GPIOC_CLK_ENABLE(); 80020be: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 80020c0: 2200 movs r2, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 80020c2: f043 0310 orr.w r3, r3, #16 80020c6: 61ab str r3, [r5, #24] 80020c8: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 80020ca: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOC_CLK_ENABLE(); 80020ce: f003 0310 and.w r3, r3, #16 80020d2: 9301 str r3, [sp, #4] 80020d4: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 80020d6: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 80020d8: 4866 ldr r0, [pc, #408] ; (8002274 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 80020da: f043 0304 orr.w r3, r3, #4 80020de: 61ab str r3, [r5, #24] 80020e0: 69ab ldr r3, [r5, #24] /*Configure GPIO pin : BOOT_LED_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 80020e2: 2400 movs r4, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 80020e4: f003 0304 and.w r3, r3, #4 80020e8: 9302 str r3, [sp, #8] 80020ea: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 80020ec: 69ab ldr r3, [r5, #24] huart1.Init.Mode = UART_MODE_TX_RX; 80020ee: 260c movs r6, #12 __HAL_RCC_GPIOB_CLK_ENABLE(); 80020f0: f043 0308 orr.w r3, r3, #8 80020f4: 61ab str r3, [r5, #24] 80020f6: 69ab ldr r3, [r5, #24] huart1.Init.BaudRate = 115200; 80020f8: f44f 37e1 mov.w r7, #115200 ; 0x1c200 __HAL_RCC_GPIOB_CLK_ENABLE(); 80020fc: f003 0308 and.w r3, r3, #8 8002100: 9303 str r3, [sp, #12] 8002102: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8002104: f7fe fd2a bl 8000b5c GPIO_InitStruct.Pin = BOOT_LED_Pin; 8002108: f44f 4300 mov.w r3, #32768 ; 0x8000 800210c: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800210e: 2301 movs r3, #1 8002110: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002112: 2302 movs r3, #2 HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8002114: a904 add r1, sp, #16 8002116: 4857 ldr r0, [pc, #348] ; (8002274 ) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002118: 9307 str r3, [sp, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 800211a: 9406 str r4, [sp, #24] HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 800211c: f7fe fc32 bl 8000984 __HAL_RCC_DMA1_CLK_ENABLE(); 8002120: 696b ldr r3, [r5, #20] huart1.Instance = USART1; 8002122: 4855 ldr r0, [pc, #340] ; (8002278 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8002124: f043 0301 orr.w r3, r3, #1 8002128: 616b str r3, [r5, #20] 800212a: 696b ldr r3, [r5, #20] huart1.Init.Mode = UART_MODE_TX_RX; 800212c: 6146 str r6, [r0, #20] __HAL_RCC_DMA1_CLK_ENABLE(); 800212e: f003 0301 and.w r3, r3, #1 8002132: 9300 str r3, [sp, #0] 8002134: 9b00 ldr r3, [sp, #0] huart1.Init.BaudRate = 115200; 8002136: 4b51 ldr r3, [pc, #324] ; (800227c ) huart1.Init.WordLength = UART_WORDLENGTH_8B; 8002138: 6084 str r4, [r0, #8] huart1.Init.BaudRate = 115200; 800213a: e880 0088 stmia.w r0, {r3, r7} huart1.Init.StopBits = UART_STOPBITS_1; 800213e: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 8002140: 6104 str r4, [r0, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002142: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8002144: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8002146: f7ff fa3d bl 80015c4 hi2c2.Instance = I2C2; 800214a: 484d ldr r0, [pc, #308] ; (8002280 ) hi2c2.Init.ClockSpeed = 400000; 800214c: 4a4d ldr r2, [pc, #308] ; (8002284 ) 800214e: 4b4e ldr r3, [pc, #312] ; (8002288 ) hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 8002150: 6084 str r4, [r0, #8] hi2c2.Init.ClockSpeed = 400000; 8002152: e880 000c stmia.w r0, {r2, r3} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8002156: f44f 4380 mov.w r3, #16384 ; 0x4000 hi2c2.Init.OwnAddress1 = 0; 800215a: 60c4 str r4, [r0, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 800215c: 6103 str r3, [r0, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 800215e: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 8002160: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8002162: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8002164: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8002166: f7fe fd03 bl 8000b70 htim6.Init.Prescaler = 5600 - 1; 800216a: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 800216e: 4d47 ldr r5, [pc, #284] ; (800228c ) htim6.Init.Prescaler = 5600 - 1; 8002170: 4947 ldr r1, [pc, #284] ; (8002290 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8002172: 4628 mov r0, r5 htim6.Init.Prescaler = 5600 - 1; 8002174: e885 000a stmia.w r5, {r1, r3} htim6.Init.Period = 10 - 1; 8002178: 2309 movs r3, #9 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 800217a: 60ac str r4, [r5, #8] htim6.Init.Period = 10 - 1; 800217c: 60eb str r3, [r5, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800217e: 61ac str r4, [r5, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8002180: 9404 str r4, [sp, #16] 8002182: 9405 str r4, [sp, #20] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8002184: f7ff f90c bl 80013a0 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8002188: a904 add r1, sp, #16 800218a: 4628 mov r0, r5 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800218c: 9404 str r4, [sp, #16] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800218e: 9405 str r4, [sp, #20] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8002190: f7ff f920 bl 80013d4 huart2.Instance = USART2; 8002194: 4b3f ldr r3, [pc, #252] ; (8002294 ) 8002196: 4840 ldr r0, [pc, #256] ; (8002298 ) huart2.Init.BaudRate = 115200; 8002198: e880 0088 stmia.w r0, {r3, r7} huart2.Init.Mode = UART_MODE_TX_RX; 800219c: 6146 str r6, [r0, #20] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800219e: 6084 str r4, [r0, #8] huart2.Init.StopBits = UART_STOPBITS_1; 80021a0: 60c4 str r4, [r0, #12] huart2.Init.Parity = UART_PARITY_NONE; 80021a2: 6104 str r4, [r0, #16] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80021a4: 6184 str r4, [r0, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 80021a6: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 80021a8: f7ff fa0c bl 80015c4 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 80021ac: 4622 mov r2, r4 80021ae: 4621 mov r1, r4 80021b0: 200f movs r0, #15 80021b2: f7fe f89d bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 80021b6: 200f movs r0, #15 80021b8: f7fe f8ce bl 8000358 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80021bc: 4622 mov r2, r4 80021be: 4621 mov r1, r4 80021c0: 2025 movs r0, #37 ; 0x25 80021c2: f7fe f895 bl 80002f0 HAL_NVIC_EnableIRQ(USART1_IRQn); 80021c6: 2025 movs r0, #37 ; 0x25 80021c8: f7fe f8c6 bl 8000358 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 80021cc: 4622 mov r2, r4 80021ce: 4621 mov r1, r4 80021d0: 2036 movs r0, #54 ; 0x36 80021d2: f7fe f88d bl 80002f0 HAL_NVIC_EnableIRQ(TIM6_IRQn); 80021d6: 2036 movs r0, #54 ; 0x36 80021d8: f7fe f8be bl 8000358 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 80021dc: 4622 mov r2, r4 80021de: 4621 mov r1, r4 80021e0: 200e movs r0, #14 80021e2: f7fe f885 bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 80021e6: 200e movs r0, #14 80021e8: f7fe f8b6 bl 8000358 HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); 80021ec: 4622 mov r2, r4 80021ee: 4621 mov r1, r4 80021f0: 2010 movs r0, #16 80021f2: f7fe f87d bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); 80021f6: 2010 movs r0, #16 80021f8: f7fe f8ae bl 8000358 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 80021fc: 4622 mov r2, r4 80021fe: 4621 mov r1, r4 8002200: 2026 movs r0, #38 ; 0x26 8002202: f7fe f875 bl 80002f0 HAL_NVIC_EnableIRQ(USART2_IRQn); 8002206: 2026 movs r0, #38 ; 0x26 8002208: f7fe f8a6 bl 8000358 HAL_TIM_Base_Start_IT(&htim6); 800220c: 4628 mov r0, r5 800220e: f7fe ffc9 bl 80011a4 setbuf(stdout, NULL); 8002212: 4b22 ldr r3, [pc, #136] ; (800229c ) 8002214: 4621 mov r1, r4 8002216: 681b ldr r3, [r3, #0] if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin);LedTimerCnt = 0;} 8002218: 4e16 ldr r6, [pc, #88] ; (8002274 ) setbuf(stdout, NULL); 800221a: 6898 ldr r0, [r3, #8] 800221c: f000 fb5e bl 80028dc Firmware_BootStart_Signal(); 8002220: f7ff fbd4 bl 80019cc InitUartQueue(&TerminalQueue); 8002224: 481e ldr r0, [pc, #120] ; (80022a0 ) 8002226: f000 f9e5 bl 80025f4 while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 800222a: 4d1e ldr r5, [pc, #120] ; (80022a4 ) if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin);LedTimerCnt = 0;} 800222c: 4c1e ldr r4, [pc, #120] ; (80022a8 ) 800222e: 6823 ldr r3, [r4, #0] 8002230: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 8002234: d906 bls.n 8002244 8002236: f44f 4100 mov.w r1, #32768 ; 0x8000 800223a: 4630 mov r0, r6 800223c: f7fe fc93 bl 8000b66 8002240: 2300 movs r3, #0 8002242: 6023 str r3, [r4, #0] while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8002244: 4c16 ldr r4, [pc, #88] ; (80022a0 ) 8002246: 4f0c ldr r7, [pc, #48] ; (8002278 ) 8002248: 68a3 ldr r3, [r4, #8] 800224a: 2b00 cmp r3, #0 800224c: dd02 ble.n 8002254 800224e: 682b ldr r3, [r5, #0] 8002250: 2b1e cmp r3, #30 8002252: d803 bhi.n 800225c while(FirmwareTimerCnt > 3000) Jump_App(); 8002254: 4f15 ldr r7, [pc, #84] ; (80022ac ) 8002256: f640 34b8 movw r4, #3000 ; 0xbb8 800225a: e005 b.n 8002268 while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 800225c: 4638 mov r0, r7 800225e: f000 f9d7 bl 8002610 8002262: e7f1 b.n 8002248 while(FirmwareTimerCnt > 3000) Jump_App(); 8002264: f7ff fdba bl 8001ddc 8002268: 683b ldr r3, [r7, #0] 800226a: 42a3 cmp r3, r4 800226c: d8fa bhi.n 8002264 800226e: e7dd b.n 800222c 8002270: 40021000 .word 0x40021000 8002274: 40011000 .word 0x40011000 8002278: 20000448 .word 0x20000448 800227c: 40013800 .word 0x40013800 8002280: 2000036c .word 0x2000036c 8002284: 40005800 .word 0x40005800 8002288: 00061a80 .word 0x00061a80 800228c: 20000488 .word 0x20000488 8002290: 40001000 .word 0x40001000 8002294: 40004400 .word 0x40004400 8002298: 200004c8 .word 0x200004c8 800229c: 2000021c .word 0x2000021c 80022a0: 20000508 .word 0x20000508 80022a4: 200002e4 .word 0x200002e4 80022a8: 200002e0 .word 0x200002e0 80022ac: 200002dc .word 0x200002dc 080022b0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80022b0: 4770 bx lr ... 080022b4 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80022b4: 4b0e ldr r3, [pc, #56] ; (80022f0 ) { 80022b6: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 80022b8: 699a ldr r2, [r3, #24] 80022ba: f042 0201 orr.w r2, r2, #1 80022be: 619a str r2, [r3, #24] 80022c0: 699a ldr r2, [r3, #24] 80022c2: f002 0201 and.w r2, r2, #1 80022c6: 9200 str r2, [sp, #0] 80022c8: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 80022ca: 69da ldr r2, [r3, #28] 80022cc: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 80022d0: 61da str r2, [r3, #28] 80022d2: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80022d4: 4a07 ldr r2, [pc, #28] ; (80022f4 ) __HAL_RCC_PWR_CLK_ENABLE(); 80022d6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80022da: 9301 str r3, [sp, #4] 80022dc: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80022de: 6853 ldr r3, [r2, #4] 80022e0: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80022e4: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 80022e8: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80022ea: b002 add sp, #8 80022ec: 4770 bx lr 80022ee: bf00 nop 80022f0: 40021000 .word 0x40021000 80022f4: 40010000 .word 0x40010000 080022f8 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 80022f8: b510 push {r4, lr} 80022fa: 4604 mov r4, r0 80022fc: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80022fe: 2210 movs r2, #16 8002300: 2100 movs r1, #0 8002302: a802 add r0, sp, #8 8002304: f000 fa66 bl 80027d4 if(hi2c->Instance==I2C2) 8002308: 6822 ldr r2, [r4, #0] 800230a: 4b11 ldr r3, [pc, #68] ; (8002350 ) 800230c: 429a cmp r2, r3 800230e: d11d bne.n 800234c { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8002310: 4c10 ldr r4, [pc, #64] ; (8002354 ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = EEPROM_SCL_Pin|EEPROM_SDA_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002312: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 8002314: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002316: 4810 ldr r0, [pc, #64] ; (8002358 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 8002318: f043 0308 orr.w r3, r3, #8 800231c: 61a3 str r3, [r4, #24] 800231e: 69a3 ldr r3, [r4, #24] 8002320: f003 0308 and.w r3, r3, #8 8002324: 9300 str r3, [sp, #0] 8002326: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = EEPROM_SCL_Pin|EEPROM_SDA_Pin; 8002328: f44f 6340 mov.w r3, #3072 ; 0xc00 800232c: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800232e: 2312 movs r3, #18 8002330: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8002332: 2303 movs r3, #3 8002334: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002336: f7fe fb25 bl 8000984 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 800233a: 69e3 ldr r3, [r4, #28] 800233c: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 8002340: 61e3 str r3, [r4, #28] 8002342: 69e3 ldr r3, [r4, #28] 8002344: f403 0380 and.w r3, r3, #4194304 ; 0x400000 8002348: 9301 str r3, [sp, #4] 800234a: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 800234c: b006 add sp, #24 800234e: bd10 pop {r4, pc} 8002350: 40005800 .word 0x40005800 8002354: 40021000 .word 0x40021000 8002358: 40010c00 .word 0x40010c00 0800235c : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 800235c: 6802 ldr r2, [r0, #0] 800235e: 4b08 ldr r3, [pc, #32] ; (8002380 ) { 8002360: b082 sub sp, #8 if(htim_base->Instance==TIM6) 8002362: 429a cmp r2, r3 8002364: d10a bne.n 800237c { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8002366: f503 3300 add.w r3, r3, #131072 ; 0x20000 800236a: 69da ldr r2, [r3, #28] 800236c: f042 0210 orr.w r2, r2, #16 8002370: 61da str r2, [r3, #28] 8002372: 69db ldr r3, [r3, #28] 8002374: f003 0310 and.w r3, r3, #16 8002378: 9301 str r3, [sp, #4] 800237a: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 800237c: b002 add sp, #8 800237e: 4770 bx lr 8002380: 40001000 .word 0x40001000 08002384 : * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002384: 2210 movs r2, #16 { 8002386: b570 push {r4, r5, r6, lr} 8002388: 4606 mov r6, r0 800238a: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800238c: eb0d 0002 add.w r0, sp, r2 8002390: 2100 movs r1, #0 8002392: f000 fa1f bl 80027d4 if(huart->Instance==USART1) 8002396: 6833 ldr r3, [r6, #0] 8002398: 4a48 ldr r2, [pc, #288] ; (80024bc ) 800239a: 4293 cmp r3, r2 800239c: d152 bne.n 8002444 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 800239e: 4b48 ldr r3, [pc, #288] ; (80024c0 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80023a0: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 80023a2: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80023a4: 4847 ldr r0, [pc, #284] ; (80024c4 ) __HAL_RCC_USART1_CLK_ENABLE(); 80023a6: f442 4280 orr.w r2, r2, #16384 ; 0x4000 80023aa: 619a str r2, [r3, #24] 80023ac: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80023ae: 2500 movs r5, #0 __HAL_RCC_USART1_CLK_ENABLE(); 80023b0: f402 4280 and.w r2, r2, #16384 ; 0x4000 80023b4: 9200 str r2, [sp, #0] 80023b6: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 80023b8: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 80023ba: 4c43 ldr r4, [pc, #268] ; (80024c8 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 80023bc: f042 0204 orr.w r2, r2, #4 80023c0: 619a str r2, [r3, #24] 80023c2: 699b ldr r3, [r3, #24] 80023c4: f003 0304 and.w r3, r3, #4 80023c8: 9301 str r3, [sp, #4] 80023ca: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 80023cc: f44f 7300 mov.w r3, #512 ; 0x200 80023d0: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80023d2: 2302 movs r3, #2 80023d4: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80023d6: 2303 movs r3, #3 80023d8: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80023da: f7fe fad3 bl 8000984 GPIO_InitStruct.Pin = GPIO_PIN_10; 80023de: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80023e2: 4838 ldr r0, [pc, #224] ; (80024c4 ) 80023e4: a904 add r1, sp, #16 GPIO_InitStruct.Pin = GPIO_PIN_10; 80023e6: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80023e8: 9505 str r5, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80023ea: 9506 str r5, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80023ec: f7fe faca bl 8000984 hdma_usart1_rx.Instance = DMA1_Channel5; 80023f0: 4b36 ldr r3, [pc, #216] ; (80024cc ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80023f2: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 80023f4: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80023f8: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80023fa: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80023fc: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80023fe: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8002400: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 8002402: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 8002404: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8002406: f7fd ffc9 bl 800039c 800240a: b108 cbz r0, 8002410 { Error_Handler(); 800240c: f7ff ff50 bl 80022b0 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8002410: f04f 0c10 mov.w ip, #16 8002414: 4b2e ldr r3, [pc, #184] ; (80024d0 ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 8002416: 6374 str r4, [r6, #52] ; 0x34 8002418: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 800241a: 4c2e ldr r4, [pc, #184] ; (80024d4 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 800241c: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 800241e: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8002422: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8002424: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8002426: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8002428: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800242a: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 800242c: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 800242e: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8002430: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8002432: f7fd ffb3 bl 800039c 8002436: b108 cbz r0, 800243c { Error_Handler(); 8002438: f7ff ff3a bl 80022b0 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 800243c: 6334 str r4, [r6, #48] ; 0x30 if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) { Error_Handler(); } __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx); 800243e: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8002440: b008 add sp, #32 8002442: bd70 pop {r4, r5, r6, pc} else if(huart->Instance==USART2) 8002444: 4a24 ldr r2, [pc, #144] ; (80024d8 ) 8002446: 4293 cmp r3, r2 8002448: d1fa bne.n 8002440 __HAL_RCC_USART2_CLK_ENABLE(); 800244a: 4b1d ldr r3, [pc, #116] ; (80024c0 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800244c: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 800244e: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002450: 481c ldr r0, [pc, #112] ; (80024c4 ) __HAL_RCC_USART2_CLK_ENABLE(); 8002452: f442 3200 orr.w r2, r2, #131072 ; 0x20000 8002456: 61da str r2, [r3, #28] 8002458: 69da ldr r2, [r3, #28] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800245a: 2500 movs r5, #0 __HAL_RCC_USART2_CLK_ENABLE(); 800245c: f402 3200 and.w r2, r2, #131072 ; 0x20000 8002460: 9202 str r2, [sp, #8] 8002462: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8002464: 699a ldr r2, [r3, #24] hdma_usart2_rx.Instance = DMA1_Channel6; 8002466: 4c1d ldr r4, [pc, #116] ; (80024dc ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8002468: f042 0204 orr.w r2, r2, #4 800246c: 619a str r2, [r3, #24] 800246e: 699b ldr r3, [r3, #24] 8002470: f003 0304 and.w r3, r3, #4 8002474: 9303 str r3, [sp, #12] 8002476: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 8002478: 2304 movs r3, #4 800247a: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800247c: 2302 movs r3, #2 800247e: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8002480: 2303 movs r3, #3 8002482: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002484: f7fe fa7e bl 8000984 GPIO_InitStruct.Pin = GPIO_PIN_3; 8002488: 2308 movs r3, #8 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800248a: 480e ldr r0, [pc, #56] ; (80024c4 ) 800248c: a904 add r1, sp, #16 GPIO_InitStruct.Pin = GPIO_PIN_3; 800248e: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8002490: 9505 str r5, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002492: 9506 str r5, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002494: f7fe fa76 bl 8000984 hdma_usart2_rx.Instance = DMA1_Channel6; 8002498: 4b11 ldr r3, [pc, #68] ; (80024e0 ) if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) 800249a: 4620 mov r0, r4 hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 800249c: e884 0028 stmia.w r4, {r3, r5} hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; 80024a0: 2380 movs r3, #128 ; 0x80 hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80024a2: 60a5 str r5, [r4, #8] hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; 80024a4: 60e3 str r3, [r4, #12] hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80024a6: 6125 str r5, [r4, #16] hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80024a8: 6165 str r5, [r4, #20] hdma_usart2_rx.Init.Mode = DMA_NORMAL; 80024aa: 61a5 str r5, [r4, #24] hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW; 80024ac: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) 80024ae: f7fd ff75 bl 800039c 80024b2: b108 cbz r0, 80024b8 Error_Handler(); 80024b4: f7ff fefc bl 80022b0 __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx); 80024b8: 6374 str r4, [r6, #52] ; 0x34 80024ba: e7c0 b.n 800243e 80024bc: 40013800 .word 0x40013800 80024c0: 40021000 .word 0x40021000 80024c4: 40010800 .word 0x40010800 80024c8: 20000404 .word 0x20000404 80024cc: 40020058 .word 0x40020058 80024d0: 40020044 .word 0x40020044 80024d4: 200003c0 .word 0x200003c0 80024d8: 40004400 .word 0x40004400 80024dc: 20000328 .word 0x20000328 80024e0: 4002006c .word 0x4002006c 080024e4 : 80024e4: 4770 bx lr 080024e6 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80024e6: e7fe b.n 80024e6 080024e8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80024e8: e7fe b.n 80024e8 080024ea : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80024ea: e7fe b.n 80024ea 080024ec : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80024ec: e7fe b.n 80024ec 080024ee : 80024ee: 4770 bx lr 080024f0 : 80024f0: 4770 bx lr 080024f2 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80024f2: 4770 bx lr 080024f4 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80024f4: f7fd bed8 b.w 80002a8 080024f8 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 80024f8: 4801 ldr r0, [pc, #4] ; (8002500 ) 80024fa: f7fe b83b b.w 8000574 80024fe: bf00 nop 8002500: 200003c0 .word 0x200003c0 08002504 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8002504: 4801 ldr r0, [pc, #4] ; (800250c ) 8002506: f7fe b835 b.w 8000574 800250a: bf00 nop 800250c: 20000404 .word 0x20000404 08002510 : void DMA1_Channel6_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */ /* USER CODE END DMA1_Channel6_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_rx); 8002510: 4801 ldr r0, [pc, #4] ; (8002518 ) 8002512: f7fe b82f b.w 8000574 8002516: bf00 nop 8002518: 20000328 .word 0x20000328 0800251c : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 800251c: 4801 ldr r0, [pc, #4] ; (8002524 ) 800251e: f7ff b9ad b.w 800187c 8002522: bf00 nop 8002524: 20000448 .word 0x20000448 08002528 : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 8002528: 4801 ldr r0, [pc, #4] ; (8002530 ) 800252a: f7ff b9a7 b.w 800187c 800252e: bf00 nop 8002530: 200004c8 .word 0x200004c8 08002534 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8002534: 4801 ldr r0, [pc, #4] ; (800253c ) 8002536: f7fe be44 b.w 80011c2 800253a: bf00 nop 800253c: 20000488 .word 0x20000488 08002540 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8002540: b570 push {r4, r5, r6, lr} 8002542: 460e mov r6, r1 8002544: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8002546: 460c mov r4, r1 8002548: 1ba3 subs r3, r4, r6 800254a: 429d cmp r5, r3 800254c: dc01 bgt.n 8002552 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 800254e: 4628 mov r0, r5 8002550: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 8002552: f3af 8000 nop.w 8002556: f804 0b01 strb.w r0, [r4], #1 800255a: e7f5 b.n 8002548 <_read+0x8> 0800255c <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 800255c: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 800255e: 4b0a ldr r3, [pc, #40] ; (8002588 <_sbrk+0x2c>) { 8002560: 4602 mov r2, r0 if (heap_end == 0) 8002562: 6819 ldr r1, [r3, #0] 8002564: b909 cbnz r1, 800256a <_sbrk+0xe> heap_end = &end; 8002566: 4909 ldr r1, [pc, #36] ; (800258c <_sbrk+0x30>) 8002568: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 800256a: 4669 mov r1, sp prev_heap_end = heap_end; 800256c: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 800256e: 4402 add r2, r0 8002570: 428a cmp r2, r1 8002572: d906 bls.n 8002582 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8002574: f000 f904 bl 8002780 <__errno> 8002578: 230c movs r3, #12 800257a: 6003 str r3, [r0, #0] return (caddr_t) -1; 800257c: f04f 30ff mov.w r0, #4294967295 8002580: bd08 pop {r3, pc} } heap_end += incr; 8002582: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8002584: bd08 pop {r3, pc} 8002586: bf00 nop 8002588: 200002e8 .word 0x200002e8 800258c: 20001208 .word 0x20001208 08002590 <_close>: int _close(int file) { return -1; } 8002590: f04f 30ff mov.w r0, #4294967295 8002594: 4770 bx lr 08002596 <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 8002596: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 800259a: 2000 movs r0, #0 st->st_mode = S_IFCHR; 800259c: 604b str r3, [r1, #4] } 800259e: 4770 bx lr 080025a0 <_isatty>: int _isatty(int file) { return 1; } 80025a0: 2001 movs r0, #1 80025a2: 4770 bx lr 080025a4 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 80025a4: 2000 movs r0, #0 80025a6: 4770 bx lr 080025a8 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 80025a8: 4b0f ldr r3, [pc, #60] ; (80025e8 ) 80025aa: 681a ldr r2, [r3, #0] 80025ac: f042 0201 orr.w r2, r2, #1 80025b0: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 80025b2: 6859 ldr r1, [r3, #4] 80025b4: 4a0d ldr r2, [pc, #52] ; (80025ec ) 80025b6: 400a ands r2, r1 80025b8: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 80025ba: 681a ldr r2, [r3, #0] 80025bc: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 80025c0: f422 3280 bic.w r2, r2, #65536 ; 0x10000 80025c4: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 80025c6: 681a ldr r2, [r3, #0] 80025c8: f422 2280 bic.w r2, r2, #262144 ; 0x40000 80025cc: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 80025ce: 685a ldr r2, [r3, #4] 80025d0: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80025d4: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80025d6: f44f 021f mov.w r2, #10420224 ; 0x9f0000 80025da: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80025dc: f04f 6200 mov.w r2, #134217728 ; 0x8000000 80025e0: 4b03 ldr r3, [pc, #12] ; (80025f0 ) 80025e2: 609a str r2, [r3, #8] 80025e4: 4770 bx lr 80025e6: bf00 nop 80025e8: 40021000 .word 0x40021000 80025ec: f8ff0000 .word 0xf8ff0000 80025f0: e000ed00 .word 0xe000ed00 080025f4 : extern void FirmwareUpdateStart(uint8_t* data); extern void MBIC_Bootloader_FirmwareUpdate(uint8_t* data); void InitUartQueue(pUARTQUEUE pQueue) { pQueue->data = pQueue->head = pQueue->tail = 0; 80025f4: 2300 movs r3, #0 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80025f6: 2201 movs r2, #1 pQueue->data = pQueue->head = pQueue->tail = 0; 80025f8: 6043 str r3, [r0, #4] 80025fa: 6003 str r3, [r0, #0] 80025fc: 6083 str r3, [r0, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80025fe: 4902 ldr r1, [pc, #8] ; (8002608 ) 8002600: 4802 ldr r0, [pc, #8] ; (800260c ) 8002602: f7ff b869 b.w 80016d8 8002606: bf00 nop 8002608: 20000514 .word 0x20000514 800260c: 20000448 .word 0x20000448 08002610 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8002610: 4a29 ldr r2, [pc, #164] ; (80026b8 ) { 8002612: b570 push {r4, r5, r6, lr} update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8002614: 6810 ldr r0, [r2, #0] 8002616: 4c29 ldr r4, [pc, #164] ; (80026bc ) 8002618: 1c43 adds r3, r0, #1 800261a: 6013 str r3, [r2, #0] 800261c: 4b28 ldr r3, [pc, #160] ; (80026c0 ) 800261e: 6859 ldr r1, [r3, #4] 8002620: f103 050c add.w r5, r3, #12 8002624: 5d4d ldrb r5, [r1, r5] pQueue->tail++; 8002626: 3101 adds r1, #1 update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8002628: 5425 strb r5, [r4, r0] if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 800262a: f240 404b movw r0, #1099 ; 0x44b 800262e: 4281 cmp r1, r0 8002630: bfc8 it gt 8002632: 2100 movgt r1, #0 pQueue->data--; 8002634: 689d ldr r5, [r3, #8] if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8002636: 6059 str r1, [r3, #4] pQueue->data--; 8002638: 3d01 subs r5, #1 800263a: 609d str r5, [r3, #8] if(pQueue->data == 0){ 800263c: b97d cbnz r5, 800265e for(int i = 0; i < pQueue->tail; i++){ printf("%02x ",update_data_buf[i]); } #endif // PYJ.2019.07.15_END -- cnt = 0; if(update_data_buf[0] == 0xbe){ 800263e: 7823 ldrb r3, [r4, #0] cnt = 0; 8002640: 6015 str r5, [r2, #0] if(update_data_buf[0] == 0xbe){ 8002642: 2bbe cmp r3, #190 ; 0xbe 8002644: d10c bne.n 8002660 FirmwareUpdateStart(&update_data_buf[0]); 8002646: 481d ldr r0, [pc, #116] ; (80026bc ) 8002648: f7ff f9d0 bl 80019ec else{ printf("CHECK SUM ERR %x \r\n",update_data_buf[MBIC_CHECKSHUM_INDEX]); } } for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) update_data_buf[i] = 0; 800264c: 2300 movs r3, #0 for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) 800264e: f240 424c movw r2, #1100 ; 0x44c update_data_buf[i] = 0; 8002652: 5563 strb r3, [r4, r5] for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) 8002654: 3501 adds r5, #1 8002656: 4295 cmp r5, r2 8002658: d1fb bne.n 8002652 FirmwareTimerCnt = 0; 800265a: 4a1a ldr r2, [pc, #104] ; (80026c4 ) 800265c: 6013 str r3, [r2, #0] 800265e: bd70 pop {r4, r5, r6, pc} else if(update_data_buf[0] == MBIC_PREAMBLE0 8002660: 2b16 cmp r3, #22 8002662: d1f3 bne.n 800264c &&update_data_buf[1] == MBIC_PREAMBLE1 8002664: 7863 ldrb r3, [r4, #1] 8002666: 2b16 cmp r3, #22 8002668: d1f0 bne.n 800264c &&update_data_buf[2] == MBIC_PREAMBLE2 800266a: 78a3 ldrb r3, [r4, #2] 800266c: 2b16 cmp r3, #22 800266e: d1ed bne.n 800264c &&update_data_buf[3] == MBIC_PREAMBLE3){ 8002670: 78e3 ldrb r3, [r4, #3] 8002672: 2b16 cmp r3, #22 8002674: d1ea bne.n 800264c if(Chksum_Check(update_data_buf,MBIC_HEADER_SIZE - 4,update_data_buf[MBIC_CHECKSHUM_INDEX])){ 8002676: 7d62 ldrb r2, [r4, #21] 8002678: 2112 movs r1, #18 800267a: 4810 ldr r0, [pc, #64] ; (80026bc ) 800267c: f7ff fa06 bl 8001a8c 8002680: b1b0 cbz r0, 80026b0 Length = ((update_data_buf[MBIC_LENGTH_0] << 8) | update_data_buf[MBIC_LENGTH_1]); 8002682: 7ce3 ldrb r3, [r4, #19] 8002684: 7d21 ldrb r1, [r4, #20] if(CRC16_Check(&update_data_buf[MBIC_PAYLOADSTART], Length,CrcChk)){ 8002686: 4810 ldr r0, [pc, #64] ; (80026c8 ) CrcChk = ((update_data_buf[MBIC_PAYLOADSTART + Length + 1] << 8) | (update_data_buf[MBIC_PAYLOADSTART + Length + 2])); 8002688: ea41 2103 orr.w r1, r1, r3, lsl #8 800268c: 1863 adds r3, r4, r1 800268e: 7dda ldrb r2, [r3, #23] 8002690: 7e1e ldrb r6, [r3, #24] 8002692: ea46 2602 orr.w r6, r6, r2, lsl #8 if(CRC16_Check(&update_data_buf[MBIC_PAYLOADSTART], Length,CrcChk)){ 8002696: 4632 mov r2, r6 8002698: f7ff fa36 bl 8001b08 800269c: b118 cbz r0, 80026a6 MBIC_Bootloader_FirmwareUpdate(&update_data_buf[0]); 800269e: 4807 ldr r0, [pc, #28] ; (80026bc ) 80026a0: f7ff faf8 bl 8001c94 80026a4: e7d2 b.n 800264c printf("CRC ERR %x \r\n",CrcChk); 80026a6: 4631 mov r1, r6 80026a8: 4808 ldr r0, [pc, #32] ; (80026cc ) printf("CHECK SUM ERR %x \r\n",update_data_buf[MBIC_CHECKSHUM_INDEX]); 80026aa: f000 f89b bl 80027e4 80026ae: e7cd b.n 800264c 80026b0: 7d61 ldrb r1, [r4, #21] 80026b2: 4807 ldr r0, [pc, #28] ; (80026d0 ) 80026b4: e7f9 b.n 80026aa 80026b6: bf00 nop 80026b8: 200002ec .word 0x200002ec 80026bc: 20000960 .word 0x20000960 80026c0: 20000508 .word 0x20000508 80026c4: 200002dc .word 0x200002dc 80026c8: 20000976 .word 0x20000976 80026cc: 08003972 .word 0x08003972 80026d0: 08003980 .word 0x08003980 080026d4 : UartTimerCnt = 0; 80026d4: 2200 movs r2, #0 80026d6: 4b0e ldr r3, [pc, #56] ; (8002710 ) { 80026d8: b510 push {r4, lr} UartTimerCnt = 0; 80026da: 601a str r2, [r3, #0] if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0; 80026dc: f240 424b movw r2, #1099 ; 0x44b pQueue->head++; 80026e0: 4c0c ldr r4, [pc, #48] ; (8002714 ) 80026e2: 6823 ldr r3, [r4, #0] 80026e4: 3301 adds r3, #1 80026e6: 4293 cmp r3, r2 80026e8: bfc8 it gt 80026ea: 2300 movgt r3, #0 80026ec: 6023 str r3, [r4, #0] pQueue->data++; 80026ee: 68a3 ldr r3, [r4, #8] 80026f0: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 80026f2: 4293 cmp r3, r2 pQueue->data++; 80026f4: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 80026f6: dd01 ble.n 80026fc GetDataFromUartQueue(huart); 80026f8: f7ff ff8a bl 8002610 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 80026fc: 6823 ldr r3, [r4, #0] 80026fe: 4906 ldr r1, [pc, #24] ; (8002718 ) 8002700: 2201 movs r2, #1 } 8002702: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8002706: 4419 add r1, r3 8002708: 4804 ldr r0, [pc, #16] ; (800271c ) 800270a: f7fe bfe5 b.w 80016d8 800270e: bf00 nop 8002710: 200002e4 .word 0x200002e4 8002714: 20000508 .word 0x20000508 8002718: 20000514 .word 0x20000514 800271c: 20000448 .word 0x20000448 08002720 : } void Uart1_Data_Send(uint8_t* data,uint16_t size){ // printf("size : %d \r\n",size); HAL_UART_Transmit (&huart1, data, size, 0xFFFF); 8002720: 460a mov r2, r1 8002722: f64f 73ff movw r3, #65535 ; 0xffff 8002726: 4601 mov r1, r0 8002728: 4801 ldr r0, [pc, #4] ; (8002730 ) 800272a: f7fe bf79 b.w 8001620 800272e: bf00 nop 8002730: 20000448 .word 0x20000448 08002734 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8002734: 2100 movs r1, #0 b LoopCopyDataInit 8002736: e003 b.n 8002740 08002738 : CopyDataInit: ldr r3, =_sidata 8002738: 4b0b ldr r3, [pc, #44] ; (8002768 ) ldr r3, [r3, r1] 800273a: 585b ldr r3, [r3, r1] str r3, [r0, r1] 800273c: 5043 str r3, [r0, r1] adds r1, r1, #4 800273e: 3104 adds r1, #4 08002740 : LoopCopyDataInit: ldr r0, =_sdata 8002740: 480a ldr r0, [pc, #40] ; (800276c ) ldr r3, =_edata 8002742: 4b0b ldr r3, [pc, #44] ; (8002770 ) adds r2, r0, r1 8002744: 1842 adds r2, r0, r1 cmp r2, r3 8002746: 429a cmp r2, r3 bcc CopyDataInit 8002748: d3f6 bcc.n 8002738 ldr r2, =_sbss 800274a: 4a0a ldr r2, [pc, #40] ; (8002774 ) b LoopFillZerobss 800274c: e002 b.n 8002754 0800274e : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 800274e: 2300 movs r3, #0 str r3, [r2], #4 8002750: f842 3b04 str.w r3, [r2], #4 08002754 : LoopFillZerobss: ldr r3, = _ebss 8002754: 4b08 ldr r3, [pc, #32] ; (8002778 ) cmp r2, r3 8002756: 429a cmp r2, r3 bcc FillZerobss 8002758: d3f9 bcc.n 800274e /* Call the clock system intitialization function.*/ bl SystemInit 800275a: f7ff ff25 bl 80025a8 /* Call static constructors */ bl __libc_init_array 800275e: f000 f815 bl 800278c <__libc_init_array> /* Call the application's entry point.*/ bl main 8002762: f7ff fc9f bl 80020a4
bx lr 8002766: 4770 bx lr ldr r3, =_sidata 8002768: 08003a34 .word 0x08003a34 ldr r0, =_sdata 800276c: 20000000 .word 0x20000000 ldr r3, =_edata 8002770: 20000280 .word 0x20000280 ldr r2, =_sbss 8002774: 20000280 .word 0x20000280 ldr r3, = _ebss 8002778: 20001208 .word 0x20001208 0800277c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800277c: e7fe b.n 800277c ... 08002780 <__errno>: 8002780: 4b01 ldr r3, [pc, #4] ; (8002788 <__errno+0x8>) 8002782: 6818 ldr r0, [r3, #0] 8002784: 4770 bx lr 8002786: bf00 nop 8002788: 2000021c .word 0x2000021c 0800278c <__libc_init_array>: 800278c: b570 push {r4, r5, r6, lr} 800278e: 2500 movs r5, #0 8002790: 4e0c ldr r6, [pc, #48] ; (80027c4 <__libc_init_array+0x38>) 8002792: 4c0d ldr r4, [pc, #52] ; (80027c8 <__libc_init_array+0x3c>) 8002794: 1ba4 subs r4, r4, r6 8002796: 10a4 asrs r4, r4, #2 8002798: 42a5 cmp r5, r4 800279a: d109 bne.n 80027b0 <__libc_init_array+0x24> 800279c: f001 f848 bl 8003830 <_init> 80027a0: 2500 movs r5, #0 80027a2: 4e0a ldr r6, [pc, #40] ; (80027cc <__libc_init_array+0x40>) 80027a4: 4c0a ldr r4, [pc, #40] ; (80027d0 <__libc_init_array+0x44>) 80027a6: 1ba4 subs r4, r4, r6 80027a8: 10a4 asrs r4, r4, #2 80027aa: 42a5 cmp r5, r4 80027ac: d105 bne.n 80027ba <__libc_init_array+0x2e> 80027ae: bd70 pop {r4, r5, r6, pc} 80027b0: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80027b4: 4798 blx r3 80027b6: 3501 adds r5, #1 80027b8: e7ee b.n 8002798 <__libc_init_array+0xc> 80027ba: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80027be: 4798 blx r3 80027c0: 3501 adds r5, #1 80027c2: e7f2 b.n 80027aa <__libc_init_array+0x1e> 80027c4: 08003a2c .word 0x08003a2c 80027c8: 08003a2c .word 0x08003a2c 80027cc: 08003a2c .word 0x08003a2c 80027d0: 08003a30 .word 0x08003a30 080027d4 : 80027d4: 4603 mov r3, r0 80027d6: 4402 add r2, r0 80027d8: 4293 cmp r3, r2 80027da: d100 bne.n 80027de 80027dc: 4770 bx lr 80027de: f803 1b01 strb.w r1, [r3], #1 80027e2: e7f9 b.n 80027d8 080027e4 : 80027e4: b40f push {r0, r1, r2, r3} 80027e6: 4b0a ldr r3, [pc, #40] ; (8002810 ) 80027e8: b513 push {r0, r1, r4, lr} 80027ea: 681c ldr r4, [r3, #0] 80027ec: b124 cbz r4, 80027f8 80027ee: 69a3 ldr r3, [r4, #24] 80027f0: b913 cbnz r3, 80027f8 80027f2: 4620 mov r0, r4 80027f4: f000 fada bl 8002dac <__sinit> 80027f8: ab05 add r3, sp, #20 80027fa: 9a04 ldr r2, [sp, #16] 80027fc: 68a1 ldr r1, [r4, #8] 80027fe: 4620 mov r0, r4 8002800: 9301 str r3, [sp, #4] 8002802: f000 fc9b bl 800313c <_vfiprintf_r> 8002806: b002 add sp, #8 8002808: e8bd 4010 ldmia.w sp!, {r4, lr} 800280c: b004 add sp, #16 800280e: 4770 bx lr 8002810: 2000021c .word 0x2000021c 08002814 <_puts_r>: 8002814: b570 push {r4, r5, r6, lr} 8002816: 460e mov r6, r1 8002818: 4605 mov r5, r0 800281a: b118 cbz r0, 8002824 <_puts_r+0x10> 800281c: 6983 ldr r3, [r0, #24] 800281e: b90b cbnz r3, 8002824 <_puts_r+0x10> 8002820: f000 fac4 bl 8002dac <__sinit> 8002824: 69ab ldr r3, [r5, #24] 8002826: 68ac ldr r4, [r5, #8] 8002828: b913 cbnz r3, 8002830 <_puts_r+0x1c> 800282a: 4628 mov r0, r5 800282c: f000 fabe bl 8002dac <__sinit> 8002830: 4b23 ldr r3, [pc, #140] ; (80028c0 <_puts_r+0xac>) 8002832: 429c cmp r4, r3 8002834: d117 bne.n 8002866 <_puts_r+0x52> 8002836: 686c ldr r4, [r5, #4] 8002838: 89a3 ldrh r3, [r4, #12] 800283a: 071b lsls r3, r3, #28 800283c: d51d bpl.n 800287a <_puts_r+0x66> 800283e: 6923 ldr r3, [r4, #16] 8002840: b1db cbz r3, 800287a <_puts_r+0x66> 8002842: 3e01 subs r6, #1 8002844: 68a3 ldr r3, [r4, #8] 8002846: f816 1f01 ldrb.w r1, [r6, #1]! 800284a: 3b01 subs r3, #1 800284c: 60a3 str r3, [r4, #8] 800284e: b9e9 cbnz r1, 800288c <_puts_r+0x78> 8002850: 2b00 cmp r3, #0 8002852: da2e bge.n 80028b2 <_puts_r+0x9e> 8002854: 4622 mov r2, r4 8002856: 210a movs r1, #10 8002858: 4628 mov r0, r5 800285a: f000 f8f5 bl 8002a48 <__swbuf_r> 800285e: 3001 adds r0, #1 8002860: d011 beq.n 8002886 <_puts_r+0x72> 8002862: 200a movs r0, #10 8002864: bd70 pop {r4, r5, r6, pc} 8002866: 4b17 ldr r3, [pc, #92] ; (80028c4 <_puts_r+0xb0>) 8002868: 429c cmp r4, r3 800286a: d101 bne.n 8002870 <_puts_r+0x5c> 800286c: 68ac ldr r4, [r5, #8] 800286e: e7e3 b.n 8002838 <_puts_r+0x24> 8002870: 4b15 ldr r3, [pc, #84] ; (80028c8 <_puts_r+0xb4>) 8002872: 429c cmp r4, r3 8002874: bf08 it eq 8002876: 68ec ldreq r4, [r5, #12] 8002878: e7de b.n 8002838 <_puts_r+0x24> 800287a: 4621 mov r1, r4 800287c: 4628 mov r0, r5 800287e: f000 f935 bl 8002aec <__swsetup_r> 8002882: 2800 cmp r0, #0 8002884: d0dd beq.n 8002842 <_puts_r+0x2e> 8002886: f04f 30ff mov.w r0, #4294967295 800288a: bd70 pop {r4, r5, r6, pc} 800288c: 2b00 cmp r3, #0 800288e: da04 bge.n 800289a <_puts_r+0x86> 8002890: 69a2 ldr r2, [r4, #24] 8002892: 4293 cmp r3, r2 8002894: db06 blt.n 80028a4 <_puts_r+0x90> 8002896: 290a cmp r1, #10 8002898: d004 beq.n 80028a4 <_puts_r+0x90> 800289a: 6823 ldr r3, [r4, #0] 800289c: 1c5a adds r2, r3, #1 800289e: 6022 str r2, [r4, #0] 80028a0: 7019 strb r1, [r3, #0] 80028a2: e7cf b.n 8002844 <_puts_r+0x30> 80028a4: 4622 mov r2, r4 80028a6: 4628 mov r0, r5 80028a8: f000 f8ce bl 8002a48 <__swbuf_r> 80028ac: 3001 adds r0, #1 80028ae: d1c9 bne.n 8002844 <_puts_r+0x30> 80028b0: e7e9 b.n 8002886 <_puts_r+0x72> 80028b2: 200a movs r0, #10 80028b4: 6823 ldr r3, [r4, #0] 80028b6: 1c5a adds r2, r3, #1 80028b8: 6022 str r2, [r4, #0] 80028ba: 7018 strb r0, [r3, #0] 80028bc: bd70 pop {r4, r5, r6, pc} 80028be: bf00 nop 80028c0: 080039b8 .word 0x080039b8 80028c4: 080039d8 .word 0x080039d8 80028c8: 08003998 .word 0x08003998 080028cc : 80028cc: 4b02 ldr r3, [pc, #8] ; (80028d8 ) 80028ce: 4601 mov r1, r0 80028d0: 6818 ldr r0, [r3, #0] 80028d2: f7ff bf9f b.w 8002814 <_puts_r> 80028d6: bf00 nop 80028d8: 2000021c .word 0x2000021c 080028dc : 80028dc: 2900 cmp r1, #0 80028de: f44f 6380 mov.w r3, #1024 ; 0x400 80028e2: bf0c ite eq 80028e4: 2202 moveq r2, #2 80028e6: 2200 movne r2, #0 80028e8: f000 b800 b.w 80028ec 080028ec : 80028ec: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 80028f0: 461d mov r5, r3 80028f2: 4b51 ldr r3, [pc, #324] ; (8002a38 ) 80028f4: 4604 mov r4, r0 80028f6: 681e ldr r6, [r3, #0] 80028f8: 460f mov r7, r1 80028fa: 4690 mov r8, r2 80028fc: b126 cbz r6, 8002908 80028fe: 69b3 ldr r3, [r6, #24] 8002900: b913 cbnz r3, 8002908 8002902: 4630 mov r0, r6 8002904: f000 fa52 bl 8002dac <__sinit> 8002908: 4b4c ldr r3, [pc, #304] ; (8002a3c ) 800290a: 429c cmp r4, r3 800290c: d152 bne.n 80029b4 800290e: 6874 ldr r4, [r6, #4] 8002910: f1b8 0f02 cmp.w r8, #2 8002914: d006 beq.n 8002924 8002916: f1b8 0f01 cmp.w r8, #1 800291a: f200 8089 bhi.w 8002a30 800291e: 2d00 cmp r5, #0 8002920: f2c0 8086 blt.w 8002a30 8002924: 4621 mov r1, r4 8002926: 4630 mov r0, r6 8002928: f000 f9d6 bl 8002cd8 <_fflush_r> 800292c: 6b61 ldr r1, [r4, #52] ; 0x34 800292e: b141 cbz r1, 8002942 8002930: f104 0344 add.w r3, r4, #68 ; 0x44 8002934: 4299 cmp r1, r3 8002936: d002 beq.n 800293e 8002938: 4630 mov r0, r6 800293a: f000 fb2d bl 8002f98 <_free_r> 800293e: 2300 movs r3, #0 8002940: 6363 str r3, [r4, #52] ; 0x34 8002942: 2300 movs r3, #0 8002944: 61a3 str r3, [r4, #24] 8002946: 6063 str r3, [r4, #4] 8002948: 89a3 ldrh r3, [r4, #12] 800294a: 061b lsls r3, r3, #24 800294c: d503 bpl.n 8002956 800294e: 6921 ldr r1, [r4, #16] 8002950: 4630 mov r0, r6 8002952: f000 fb21 bl 8002f98 <_free_r> 8002956: 89a3 ldrh r3, [r4, #12] 8002958: f1b8 0f02 cmp.w r8, #2 800295c: f423 634a bic.w r3, r3, #3232 ; 0xca0 8002960: f023 0303 bic.w r3, r3, #3 8002964: 81a3 strh r3, [r4, #12] 8002966: d05d beq.n 8002a24 8002968: ab01 add r3, sp, #4 800296a: 466a mov r2, sp 800296c: 4621 mov r1, r4 800296e: 4630 mov r0, r6 8002970: f000 faa6 bl 8002ec0 <__swhatbuf_r> 8002974: 89a3 ldrh r3, [r4, #12] 8002976: 4318 orrs r0, r3 8002978: 81a0 strh r0, [r4, #12] 800297a: bb2d cbnz r5, 80029c8 800297c: 9d00 ldr r5, [sp, #0] 800297e: 4628 mov r0, r5 8002980: f000 fb02 bl 8002f88 8002984: 4607 mov r7, r0 8002986: 2800 cmp r0, #0 8002988: d14e bne.n 8002a28 800298a: f8dd 9000 ldr.w r9, [sp] 800298e: 45a9 cmp r9, r5 8002990: d13c bne.n 8002a0c 8002992: f04f 30ff mov.w r0, #4294967295 8002996: 89a3 ldrh r3, [r4, #12] 8002998: f043 0302 orr.w r3, r3, #2 800299c: 81a3 strh r3, [r4, #12] 800299e: 2300 movs r3, #0 80029a0: 60a3 str r3, [r4, #8] 80029a2: f104 0347 add.w r3, r4, #71 ; 0x47 80029a6: 6023 str r3, [r4, #0] 80029a8: 6123 str r3, [r4, #16] 80029aa: 2301 movs r3, #1 80029ac: 6163 str r3, [r4, #20] 80029ae: b003 add sp, #12 80029b0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80029b4: 4b22 ldr r3, [pc, #136] ; (8002a40 ) 80029b6: 429c cmp r4, r3 80029b8: d101 bne.n 80029be 80029ba: 68b4 ldr r4, [r6, #8] 80029bc: e7a8 b.n 8002910 80029be: 4b21 ldr r3, [pc, #132] ; (8002a44 ) 80029c0: 429c cmp r4, r3 80029c2: bf08 it eq 80029c4: 68f4 ldreq r4, [r6, #12] 80029c6: e7a3 b.n 8002910 80029c8: 2f00 cmp r7, #0 80029ca: d0d8 beq.n 800297e 80029cc: 69b3 ldr r3, [r6, #24] 80029ce: b913 cbnz r3, 80029d6 80029d0: 4630 mov r0, r6 80029d2: f000 f9eb bl 8002dac <__sinit> 80029d6: f1b8 0f01 cmp.w r8, #1 80029da: bf08 it eq 80029dc: 89a3 ldrheq r3, [r4, #12] 80029de: 6027 str r7, [r4, #0] 80029e0: bf04 itt eq 80029e2: f043 0301 orreq.w r3, r3, #1 80029e6: 81a3 strheq r3, [r4, #12] 80029e8: 89a3 ldrh r3, [r4, #12] 80029ea: 6127 str r7, [r4, #16] 80029ec: f013 0008 ands.w r0, r3, #8 80029f0: 6165 str r5, [r4, #20] 80029f2: d01b beq.n 8002a2c 80029f4: f013 0001 ands.w r0, r3, #1 80029f8: f04f 0300 mov.w r3, #0 80029fc: bf1f itttt ne 80029fe: 426d negne r5, r5 8002a00: 60a3 strne r3, [r4, #8] 8002a02: 61a5 strne r5, [r4, #24] 8002a04: 4618 movne r0, r3 8002a06: bf08 it eq 8002a08: 60a5 streq r5, [r4, #8] 8002a0a: e7d0 b.n 80029ae 8002a0c: 4648 mov r0, r9 8002a0e: f000 fabb bl 8002f88 8002a12: 4607 mov r7, r0 8002a14: 2800 cmp r0, #0 8002a16: d0bc beq.n 8002992 8002a18: 89a3 ldrh r3, [r4, #12] 8002a1a: 464d mov r5, r9 8002a1c: f043 0380 orr.w r3, r3, #128 ; 0x80 8002a20: 81a3 strh r3, [r4, #12] 8002a22: e7d3 b.n 80029cc 8002a24: 2000 movs r0, #0 8002a26: e7b6 b.n 8002996 8002a28: 46a9 mov r9, r5 8002a2a: e7f5 b.n 8002a18 8002a2c: 60a0 str r0, [r4, #8] 8002a2e: e7be b.n 80029ae 8002a30: f04f 30ff mov.w r0, #4294967295 8002a34: e7bb b.n 80029ae 8002a36: bf00 nop 8002a38: 2000021c .word 0x2000021c 8002a3c: 080039b8 .word 0x080039b8 8002a40: 080039d8 .word 0x080039d8 8002a44: 08003998 .word 0x08003998 08002a48 <__swbuf_r>: 8002a48: b5f8 push {r3, r4, r5, r6, r7, lr} 8002a4a: 460e mov r6, r1 8002a4c: 4614 mov r4, r2 8002a4e: 4605 mov r5, r0 8002a50: b118 cbz r0, 8002a5a <__swbuf_r+0x12> 8002a52: 6983 ldr r3, [r0, #24] 8002a54: b90b cbnz r3, 8002a5a <__swbuf_r+0x12> 8002a56: f000 f9a9 bl 8002dac <__sinit> 8002a5a: 4b21 ldr r3, [pc, #132] ; (8002ae0 <__swbuf_r+0x98>) 8002a5c: 429c cmp r4, r3 8002a5e: d12a bne.n 8002ab6 <__swbuf_r+0x6e> 8002a60: 686c ldr r4, [r5, #4] 8002a62: 69a3 ldr r3, [r4, #24] 8002a64: 60a3 str r3, [r4, #8] 8002a66: 89a3 ldrh r3, [r4, #12] 8002a68: 071a lsls r2, r3, #28 8002a6a: d52e bpl.n 8002aca <__swbuf_r+0x82> 8002a6c: 6923 ldr r3, [r4, #16] 8002a6e: b363 cbz r3, 8002aca <__swbuf_r+0x82> 8002a70: 6923 ldr r3, [r4, #16] 8002a72: 6820 ldr r0, [r4, #0] 8002a74: b2f6 uxtb r6, r6 8002a76: 1ac0 subs r0, r0, r3 8002a78: 6963 ldr r3, [r4, #20] 8002a7a: 4637 mov r7, r6 8002a7c: 4298 cmp r0, r3 8002a7e: db04 blt.n 8002a8a <__swbuf_r+0x42> 8002a80: 4621 mov r1, r4 8002a82: 4628 mov r0, r5 8002a84: f000 f928 bl 8002cd8 <_fflush_r> 8002a88: bb28 cbnz r0, 8002ad6 <__swbuf_r+0x8e> 8002a8a: 68a3 ldr r3, [r4, #8] 8002a8c: 3001 adds r0, #1 8002a8e: 3b01 subs r3, #1 8002a90: 60a3 str r3, [r4, #8] 8002a92: 6823 ldr r3, [r4, #0] 8002a94: 1c5a adds r2, r3, #1 8002a96: 6022 str r2, [r4, #0] 8002a98: 701e strb r6, [r3, #0] 8002a9a: 6963 ldr r3, [r4, #20] 8002a9c: 4298 cmp r0, r3 8002a9e: d004 beq.n 8002aaa <__swbuf_r+0x62> 8002aa0: 89a3 ldrh r3, [r4, #12] 8002aa2: 07db lsls r3, r3, #31 8002aa4: d519 bpl.n 8002ada <__swbuf_r+0x92> 8002aa6: 2e0a cmp r6, #10 8002aa8: d117 bne.n 8002ada <__swbuf_r+0x92> 8002aaa: 4621 mov r1, r4 8002aac: 4628 mov r0, r5 8002aae: f000 f913 bl 8002cd8 <_fflush_r> 8002ab2: b190 cbz r0, 8002ada <__swbuf_r+0x92> 8002ab4: e00f b.n 8002ad6 <__swbuf_r+0x8e> 8002ab6: 4b0b ldr r3, [pc, #44] ; (8002ae4 <__swbuf_r+0x9c>) 8002ab8: 429c cmp r4, r3 8002aba: d101 bne.n 8002ac0 <__swbuf_r+0x78> 8002abc: 68ac ldr r4, [r5, #8] 8002abe: e7d0 b.n 8002a62 <__swbuf_r+0x1a> 8002ac0: 4b09 ldr r3, [pc, #36] ; (8002ae8 <__swbuf_r+0xa0>) 8002ac2: 429c cmp r4, r3 8002ac4: bf08 it eq 8002ac6: 68ec ldreq r4, [r5, #12] 8002ac8: e7cb b.n 8002a62 <__swbuf_r+0x1a> 8002aca: 4621 mov r1, r4 8002acc: 4628 mov r0, r5 8002ace: f000 f80d bl 8002aec <__swsetup_r> 8002ad2: 2800 cmp r0, #0 8002ad4: d0cc beq.n 8002a70 <__swbuf_r+0x28> 8002ad6: f04f 37ff mov.w r7, #4294967295 8002ada: 4638 mov r0, r7 8002adc: bdf8 pop {r3, r4, r5, r6, r7, pc} 8002ade: bf00 nop 8002ae0: 080039b8 .word 0x080039b8 8002ae4: 080039d8 .word 0x080039d8 8002ae8: 08003998 .word 0x08003998 08002aec <__swsetup_r>: 8002aec: 4b32 ldr r3, [pc, #200] ; (8002bb8 <__swsetup_r+0xcc>) 8002aee: b570 push {r4, r5, r6, lr} 8002af0: 681d ldr r5, [r3, #0] 8002af2: 4606 mov r6, r0 8002af4: 460c mov r4, r1 8002af6: b125 cbz r5, 8002b02 <__swsetup_r+0x16> 8002af8: 69ab ldr r3, [r5, #24] 8002afa: b913 cbnz r3, 8002b02 <__swsetup_r+0x16> 8002afc: 4628 mov r0, r5 8002afe: f000 f955 bl 8002dac <__sinit> 8002b02: 4b2e ldr r3, [pc, #184] ; (8002bbc <__swsetup_r+0xd0>) 8002b04: 429c cmp r4, r3 8002b06: d10f bne.n 8002b28 <__swsetup_r+0x3c> 8002b08: 686c ldr r4, [r5, #4] 8002b0a: f9b4 300c ldrsh.w r3, [r4, #12] 8002b0e: b29a uxth r2, r3 8002b10: 0715 lsls r5, r2, #28 8002b12: d42c bmi.n 8002b6e <__swsetup_r+0x82> 8002b14: 06d0 lsls r0, r2, #27 8002b16: d411 bmi.n 8002b3c <__swsetup_r+0x50> 8002b18: 2209 movs r2, #9 8002b1a: 6032 str r2, [r6, #0] 8002b1c: f043 0340 orr.w r3, r3, #64 ; 0x40 8002b20: 81a3 strh r3, [r4, #12] 8002b22: f04f 30ff mov.w r0, #4294967295 8002b26: bd70 pop {r4, r5, r6, pc} 8002b28: 4b25 ldr r3, [pc, #148] ; (8002bc0 <__swsetup_r+0xd4>) 8002b2a: 429c cmp r4, r3 8002b2c: d101 bne.n 8002b32 <__swsetup_r+0x46> 8002b2e: 68ac ldr r4, [r5, #8] 8002b30: e7eb b.n 8002b0a <__swsetup_r+0x1e> 8002b32: 4b24 ldr r3, [pc, #144] ; (8002bc4 <__swsetup_r+0xd8>) 8002b34: 429c cmp r4, r3 8002b36: bf08 it eq 8002b38: 68ec ldreq r4, [r5, #12] 8002b3a: e7e6 b.n 8002b0a <__swsetup_r+0x1e> 8002b3c: 0751 lsls r1, r2, #29 8002b3e: d512 bpl.n 8002b66 <__swsetup_r+0x7a> 8002b40: 6b61 ldr r1, [r4, #52] ; 0x34 8002b42: b141 cbz r1, 8002b56 <__swsetup_r+0x6a> 8002b44: f104 0344 add.w r3, r4, #68 ; 0x44 8002b48: 4299 cmp r1, r3 8002b4a: d002 beq.n 8002b52 <__swsetup_r+0x66> 8002b4c: 4630 mov r0, r6 8002b4e: f000 fa23 bl 8002f98 <_free_r> 8002b52: 2300 movs r3, #0 8002b54: 6363 str r3, [r4, #52] ; 0x34 8002b56: 89a3 ldrh r3, [r4, #12] 8002b58: f023 0324 bic.w r3, r3, #36 ; 0x24 8002b5c: 81a3 strh r3, [r4, #12] 8002b5e: 2300 movs r3, #0 8002b60: 6063 str r3, [r4, #4] 8002b62: 6923 ldr r3, [r4, #16] 8002b64: 6023 str r3, [r4, #0] 8002b66: 89a3 ldrh r3, [r4, #12] 8002b68: f043 0308 orr.w r3, r3, #8 8002b6c: 81a3 strh r3, [r4, #12] 8002b6e: 6923 ldr r3, [r4, #16] 8002b70: b94b cbnz r3, 8002b86 <__swsetup_r+0x9a> 8002b72: 89a3 ldrh r3, [r4, #12] 8002b74: f403 7320 and.w r3, r3, #640 ; 0x280 8002b78: f5b3 7f00 cmp.w r3, #512 ; 0x200 8002b7c: d003 beq.n 8002b86 <__swsetup_r+0x9a> 8002b7e: 4621 mov r1, r4 8002b80: 4630 mov r0, r6 8002b82: f000 f9c1 bl 8002f08 <__smakebuf_r> 8002b86: 89a2 ldrh r2, [r4, #12] 8002b88: f012 0301 ands.w r3, r2, #1 8002b8c: d00c beq.n 8002ba8 <__swsetup_r+0xbc> 8002b8e: 2300 movs r3, #0 8002b90: 60a3 str r3, [r4, #8] 8002b92: 6963 ldr r3, [r4, #20] 8002b94: 425b negs r3, r3 8002b96: 61a3 str r3, [r4, #24] 8002b98: 6923 ldr r3, [r4, #16] 8002b9a: b953 cbnz r3, 8002bb2 <__swsetup_r+0xc6> 8002b9c: f9b4 300c ldrsh.w r3, [r4, #12] 8002ba0: f013 0080 ands.w r0, r3, #128 ; 0x80 8002ba4: d1ba bne.n 8002b1c <__swsetup_r+0x30> 8002ba6: bd70 pop {r4, r5, r6, pc} 8002ba8: 0792 lsls r2, r2, #30 8002baa: bf58 it pl 8002bac: 6963 ldrpl r3, [r4, #20] 8002bae: 60a3 str r3, [r4, #8] 8002bb0: e7f2 b.n 8002b98 <__swsetup_r+0xac> 8002bb2: 2000 movs r0, #0 8002bb4: e7f7 b.n 8002ba6 <__swsetup_r+0xba> 8002bb6: bf00 nop 8002bb8: 2000021c .word 0x2000021c 8002bbc: 080039b8 .word 0x080039b8 8002bc0: 080039d8 .word 0x080039d8 8002bc4: 08003998 .word 0x08003998 08002bc8 <__sflush_r>: 8002bc8: 898a ldrh r2, [r1, #12] 8002bca: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8002bce: 4605 mov r5, r0 8002bd0: 0710 lsls r0, r2, #28 8002bd2: 460c mov r4, r1 8002bd4: d45a bmi.n 8002c8c <__sflush_r+0xc4> 8002bd6: 684b ldr r3, [r1, #4] 8002bd8: 2b00 cmp r3, #0 8002bda: dc05 bgt.n 8002be8 <__sflush_r+0x20> 8002bdc: 6c0b ldr r3, [r1, #64] ; 0x40 8002bde: 2b00 cmp r3, #0 8002be0: dc02 bgt.n 8002be8 <__sflush_r+0x20> 8002be2: 2000 movs r0, #0 8002be4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002be8: 6ae6 ldr r6, [r4, #44] ; 0x2c 8002bea: 2e00 cmp r6, #0 8002bec: d0f9 beq.n 8002be2 <__sflush_r+0x1a> 8002bee: 2300 movs r3, #0 8002bf0: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8002bf4: 682f ldr r7, [r5, #0] 8002bf6: 602b str r3, [r5, #0] 8002bf8: d033 beq.n 8002c62 <__sflush_r+0x9a> 8002bfa: 6d60 ldr r0, [r4, #84] ; 0x54 8002bfc: 89a3 ldrh r3, [r4, #12] 8002bfe: 075a lsls r2, r3, #29 8002c00: d505 bpl.n 8002c0e <__sflush_r+0x46> 8002c02: 6863 ldr r3, [r4, #4] 8002c04: 1ac0 subs r0, r0, r3 8002c06: 6b63 ldr r3, [r4, #52] ; 0x34 8002c08: b10b cbz r3, 8002c0e <__sflush_r+0x46> 8002c0a: 6c23 ldr r3, [r4, #64] ; 0x40 8002c0c: 1ac0 subs r0, r0, r3 8002c0e: 2300 movs r3, #0 8002c10: 4602 mov r2, r0 8002c12: 6ae6 ldr r6, [r4, #44] ; 0x2c 8002c14: 6a21 ldr r1, [r4, #32] 8002c16: 4628 mov r0, r5 8002c18: 47b0 blx r6 8002c1a: 1c43 adds r3, r0, #1 8002c1c: 89a3 ldrh r3, [r4, #12] 8002c1e: d106 bne.n 8002c2e <__sflush_r+0x66> 8002c20: 6829 ldr r1, [r5, #0] 8002c22: 291d cmp r1, #29 8002c24: d84b bhi.n 8002cbe <__sflush_r+0xf6> 8002c26: 4a2b ldr r2, [pc, #172] ; (8002cd4 <__sflush_r+0x10c>) 8002c28: 40ca lsrs r2, r1 8002c2a: 07d6 lsls r6, r2, #31 8002c2c: d547 bpl.n 8002cbe <__sflush_r+0xf6> 8002c2e: 2200 movs r2, #0 8002c30: 6062 str r2, [r4, #4] 8002c32: 6922 ldr r2, [r4, #16] 8002c34: 04d9 lsls r1, r3, #19 8002c36: 6022 str r2, [r4, #0] 8002c38: d504 bpl.n 8002c44 <__sflush_r+0x7c> 8002c3a: 1c42 adds r2, r0, #1 8002c3c: d101 bne.n 8002c42 <__sflush_r+0x7a> 8002c3e: 682b ldr r3, [r5, #0] 8002c40: b903 cbnz r3, 8002c44 <__sflush_r+0x7c> 8002c42: 6560 str r0, [r4, #84] ; 0x54 8002c44: 6b61 ldr r1, [r4, #52] ; 0x34 8002c46: 602f str r7, [r5, #0] 8002c48: 2900 cmp r1, #0 8002c4a: d0ca beq.n 8002be2 <__sflush_r+0x1a> 8002c4c: f104 0344 add.w r3, r4, #68 ; 0x44 8002c50: 4299 cmp r1, r3 8002c52: d002 beq.n 8002c5a <__sflush_r+0x92> 8002c54: 4628 mov r0, r5 8002c56: f000 f99f bl 8002f98 <_free_r> 8002c5a: 2000 movs r0, #0 8002c5c: 6360 str r0, [r4, #52] ; 0x34 8002c5e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002c62: 6a21 ldr r1, [r4, #32] 8002c64: 2301 movs r3, #1 8002c66: 4628 mov r0, r5 8002c68: 47b0 blx r6 8002c6a: 1c41 adds r1, r0, #1 8002c6c: d1c6 bne.n 8002bfc <__sflush_r+0x34> 8002c6e: 682b ldr r3, [r5, #0] 8002c70: 2b00 cmp r3, #0 8002c72: d0c3 beq.n 8002bfc <__sflush_r+0x34> 8002c74: 2b1d cmp r3, #29 8002c76: d001 beq.n 8002c7c <__sflush_r+0xb4> 8002c78: 2b16 cmp r3, #22 8002c7a: d101 bne.n 8002c80 <__sflush_r+0xb8> 8002c7c: 602f str r7, [r5, #0] 8002c7e: e7b0 b.n 8002be2 <__sflush_r+0x1a> 8002c80: 89a3 ldrh r3, [r4, #12] 8002c82: f043 0340 orr.w r3, r3, #64 ; 0x40 8002c86: 81a3 strh r3, [r4, #12] 8002c88: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002c8c: 690f ldr r7, [r1, #16] 8002c8e: 2f00 cmp r7, #0 8002c90: d0a7 beq.n 8002be2 <__sflush_r+0x1a> 8002c92: 0793 lsls r3, r2, #30 8002c94: bf18 it ne 8002c96: 2300 movne r3, #0 8002c98: 680e ldr r6, [r1, #0] 8002c9a: bf08 it eq 8002c9c: 694b ldreq r3, [r1, #20] 8002c9e: eba6 0807 sub.w r8, r6, r7 8002ca2: 600f str r7, [r1, #0] 8002ca4: 608b str r3, [r1, #8] 8002ca6: f1b8 0f00 cmp.w r8, #0 8002caa: dd9a ble.n 8002be2 <__sflush_r+0x1a> 8002cac: 4643 mov r3, r8 8002cae: 463a mov r2, r7 8002cb0: 6a21 ldr r1, [r4, #32] 8002cb2: 4628 mov r0, r5 8002cb4: 6aa6 ldr r6, [r4, #40] ; 0x28 8002cb6: 47b0 blx r6 8002cb8: 2800 cmp r0, #0 8002cba: dc07 bgt.n 8002ccc <__sflush_r+0x104> 8002cbc: 89a3 ldrh r3, [r4, #12] 8002cbe: f043 0340 orr.w r3, r3, #64 ; 0x40 8002cc2: 81a3 strh r3, [r4, #12] 8002cc4: f04f 30ff mov.w r0, #4294967295 8002cc8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002ccc: 4407 add r7, r0 8002cce: eba8 0800 sub.w r8, r8, r0 8002cd2: e7e8 b.n 8002ca6 <__sflush_r+0xde> 8002cd4: 20400001 .word 0x20400001 08002cd8 <_fflush_r>: 8002cd8: b538 push {r3, r4, r5, lr} 8002cda: 690b ldr r3, [r1, #16] 8002cdc: 4605 mov r5, r0 8002cde: 460c mov r4, r1 8002ce0: b1db cbz r3, 8002d1a <_fflush_r+0x42> 8002ce2: b118 cbz r0, 8002cec <_fflush_r+0x14> 8002ce4: 6983 ldr r3, [r0, #24] 8002ce6: b90b cbnz r3, 8002cec <_fflush_r+0x14> 8002ce8: f000 f860 bl 8002dac <__sinit> 8002cec: 4b0c ldr r3, [pc, #48] ; (8002d20 <_fflush_r+0x48>) 8002cee: 429c cmp r4, r3 8002cf0: d109 bne.n 8002d06 <_fflush_r+0x2e> 8002cf2: 686c ldr r4, [r5, #4] 8002cf4: f9b4 300c ldrsh.w r3, [r4, #12] 8002cf8: b17b cbz r3, 8002d1a <_fflush_r+0x42> 8002cfa: 4621 mov r1, r4 8002cfc: 4628 mov r0, r5 8002cfe: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8002d02: f7ff bf61 b.w 8002bc8 <__sflush_r> 8002d06: 4b07 ldr r3, [pc, #28] ; (8002d24 <_fflush_r+0x4c>) 8002d08: 429c cmp r4, r3 8002d0a: d101 bne.n 8002d10 <_fflush_r+0x38> 8002d0c: 68ac ldr r4, [r5, #8] 8002d0e: e7f1 b.n 8002cf4 <_fflush_r+0x1c> 8002d10: 4b05 ldr r3, [pc, #20] ; (8002d28 <_fflush_r+0x50>) 8002d12: 429c cmp r4, r3 8002d14: bf08 it eq 8002d16: 68ec ldreq r4, [r5, #12] 8002d18: e7ec b.n 8002cf4 <_fflush_r+0x1c> 8002d1a: 2000 movs r0, #0 8002d1c: bd38 pop {r3, r4, r5, pc} 8002d1e: bf00 nop 8002d20: 080039b8 .word 0x080039b8 8002d24: 080039d8 .word 0x080039d8 8002d28: 08003998 .word 0x08003998 08002d2c <_cleanup_r>: 8002d2c: 4901 ldr r1, [pc, #4] ; (8002d34 <_cleanup_r+0x8>) 8002d2e: f000 b8a9 b.w 8002e84 <_fwalk_reent> 8002d32: bf00 nop 8002d34: 08002cd9 .word 0x08002cd9 08002d38 : 8002d38: 2300 movs r3, #0 8002d3a: b510 push {r4, lr} 8002d3c: 4604 mov r4, r0 8002d3e: 6003 str r3, [r0, #0] 8002d40: 6043 str r3, [r0, #4] 8002d42: 6083 str r3, [r0, #8] 8002d44: 8181 strh r1, [r0, #12] 8002d46: 6643 str r3, [r0, #100] ; 0x64 8002d48: 81c2 strh r2, [r0, #14] 8002d4a: 6103 str r3, [r0, #16] 8002d4c: 6143 str r3, [r0, #20] 8002d4e: 6183 str r3, [r0, #24] 8002d50: 4619 mov r1, r3 8002d52: 2208 movs r2, #8 8002d54: 305c adds r0, #92 ; 0x5c 8002d56: f7ff fd3d bl 80027d4 8002d5a: 4b05 ldr r3, [pc, #20] ; (8002d70 ) 8002d5c: 6224 str r4, [r4, #32] 8002d5e: 6263 str r3, [r4, #36] ; 0x24 8002d60: 4b04 ldr r3, [pc, #16] ; (8002d74 ) 8002d62: 62a3 str r3, [r4, #40] ; 0x28 8002d64: 4b04 ldr r3, [pc, #16] ; (8002d78 ) 8002d66: 62e3 str r3, [r4, #44] ; 0x2c 8002d68: 4b04 ldr r3, [pc, #16] ; (8002d7c ) 8002d6a: 6323 str r3, [r4, #48] ; 0x30 8002d6c: bd10 pop {r4, pc} 8002d6e: bf00 nop 8002d70: 080036b9 .word 0x080036b9 8002d74: 080036db .word 0x080036db 8002d78: 08003713 .word 0x08003713 8002d7c: 08003737 .word 0x08003737 08002d80 <__sfmoreglue>: 8002d80: b570 push {r4, r5, r6, lr} 8002d82: 2568 movs r5, #104 ; 0x68 8002d84: 1e4a subs r2, r1, #1 8002d86: 4355 muls r5, r2 8002d88: 460e mov r6, r1 8002d8a: f105 0174 add.w r1, r5, #116 ; 0x74 8002d8e: f000 f94f bl 8003030 <_malloc_r> 8002d92: 4604 mov r4, r0 8002d94: b140 cbz r0, 8002da8 <__sfmoreglue+0x28> 8002d96: 2100 movs r1, #0 8002d98: e880 0042 stmia.w r0, {r1, r6} 8002d9c: 300c adds r0, #12 8002d9e: 60a0 str r0, [r4, #8] 8002da0: f105 0268 add.w r2, r5, #104 ; 0x68 8002da4: f7ff fd16 bl 80027d4 8002da8: 4620 mov r0, r4 8002daa: bd70 pop {r4, r5, r6, pc} 08002dac <__sinit>: 8002dac: 6983 ldr r3, [r0, #24] 8002dae: b510 push {r4, lr} 8002db0: 4604 mov r4, r0 8002db2: bb33 cbnz r3, 8002e02 <__sinit+0x56> 8002db4: 6483 str r3, [r0, #72] ; 0x48 8002db6: 64c3 str r3, [r0, #76] ; 0x4c 8002db8: 6503 str r3, [r0, #80] ; 0x50 8002dba: 4b12 ldr r3, [pc, #72] ; (8002e04 <__sinit+0x58>) 8002dbc: 4a12 ldr r2, [pc, #72] ; (8002e08 <__sinit+0x5c>) 8002dbe: 681b ldr r3, [r3, #0] 8002dc0: 6282 str r2, [r0, #40] ; 0x28 8002dc2: 4298 cmp r0, r3 8002dc4: bf04 itt eq 8002dc6: 2301 moveq r3, #1 8002dc8: 6183 streq r3, [r0, #24] 8002dca: f000 f81f bl 8002e0c <__sfp> 8002dce: 6060 str r0, [r4, #4] 8002dd0: 4620 mov r0, r4 8002dd2: f000 f81b bl 8002e0c <__sfp> 8002dd6: 60a0 str r0, [r4, #8] 8002dd8: 4620 mov r0, r4 8002dda: f000 f817 bl 8002e0c <__sfp> 8002dde: 2200 movs r2, #0 8002de0: 60e0 str r0, [r4, #12] 8002de2: 2104 movs r1, #4 8002de4: 6860 ldr r0, [r4, #4] 8002de6: f7ff ffa7 bl 8002d38 8002dea: 2201 movs r2, #1 8002dec: 2109 movs r1, #9 8002dee: 68a0 ldr r0, [r4, #8] 8002df0: f7ff ffa2 bl 8002d38 8002df4: 2202 movs r2, #2 8002df6: 2112 movs r1, #18 8002df8: 68e0 ldr r0, [r4, #12] 8002dfa: f7ff ff9d bl 8002d38 8002dfe: 2301 movs r3, #1 8002e00: 61a3 str r3, [r4, #24] 8002e02: bd10 pop {r4, pc} 8002e04: 08003994 .word 0x08003994 8002e08: 08002d2d .word 0x08002d2d 08002e0c <__sfp>: 8002e0c: b5f8 push {r3, r4, r5, r6, r7, lr} 8002e0e: 4b1c ldr r3, [pc, #112] ; (8002e80 <__sfp+0x74>) 8002e10: 4607 mov r7, r0 8002e12: 681e ldr r6, [r3, #0] 8002e14: 69b3 ldr r3, [r6, #24] 8002e16: b913 cbnz r3, 8002e1e <__sfp+0x12> 8002e18: 4630 mov r0, r6 8002e1a: f7ff ffc7 bl 8002dac <__sinit> 8002e1e: 3648 adds r6, #72 ; 0x48 8002e20: 68b4 ldr r4, [r6, #8] 8002e22: 6873 ldr r3, [r6, #4] 8002e24: 3b01 subs r3, #1 8002e26: d503 bpl.n 8002e30 <__sfp+0x24> 8002e28: 6833 ldr r3, [r6, #0] 8002e2a: b133 cbz r3, 8002e3a <__sfp+0x2e> 8002e2c: 6836 ldr r6, [r6, #0] 8002e2e: e7f7 b.n 8002e20 <__sfp+0x14> 8002e30: f9b4 500c ldrsh.w r5, [r4, #12] 8002e34: b16d cbz r5, 8002e52 <__sfp+0x46> 8002e36: 3468 adds r4, #104 ; 0x68 8002e38: e7f4 b.n 8002e24 <__sfp+0x18> 8002e3a: 2104 movs r1, #4 8002e3c: 4638 mov r0, r7 8002e3e: f7ff ff9f bl 8002d80 <__sfmoreglue> 8002e42: 6030 str r0, [r6, #0] 8002e44: 2800 cmp r0, #0 8002e46: d1f1 bne.n 8002e2c <__sfp+0x20> 8002e48: 230c movs r3, #12 8002e4a: 4604 mov r4, r0 8002e4c: 603b str r3, [r7, #0] 8002e4e: 4620 mov r0, r4 8002e50: bdf8 pop {r3, r4, r5, r6, r7, pc} 8002e52: f64f 73ff movw r3, #65535 ; 0xffff 8002e56: 81e3 strh r3, [r4, #14] 8002e58: 2301 movs r3, #1 8002e5a: 6665 str r5, [r4, #100] ; 0x64 8002e5c: 81a3 strh r3, [r4, #12] 8002e5e: 6025 str r5, [r4, #0] 8002e60: 60a5 str r5, [r4, #8] 8002e62: 6065 str r5, [r4, #4] 8002e64: 6125 str r5, [r4, #16] 8002e66: 6165 str r5, [r4, #20] 8002e68: 61a5 str r5, [r4, #24] 8002e6a: 2208 movs r2, #8 8002e6c: 4629 mov r1, r5 8002e6e: f104 005c add.w r0, r4, #92 ; 0x5c 8002e72: f7ff fcaf bl 80027d4 8002e76: 6365 str r5, [r4, #52] ; 0x34 8002e78: 63a5 str r5, [r4, #56] ; 0x38 8002e7a: 64a5 str r5, [r4, #72] ; 0x48 8002e7c: 64e5 str r5, [r4, #76] ; 0x4c 8002e7e: e7e6 b.n 8002e4e <__sfp+0x42> 8002e80: 08003994 .word 0x08003994 08002e84 <_fwalk_reent>: 8002e84: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8002e88: 4680 mov r8, r0 8002e8a: 4689 mov r9, r1 8002e8c: 2600 movs r6, #0 8002e8e: f100 0448 add.w r4, r0, #72 ; 0x48 8002e92: b914 cbnz r4, 8002e9a <_fwalk_reent+0x16> 8002e94: 4630 mov r0, r6 8002e96: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8002e9a: 68a5 ldr r5, [r4, #8] 8002e9c: 6867 ldr r7, [r4, #4] 8002e9e: 3f01 subs r7, #1 8002ea0: d501 bpl.n 8002ea6 <_fwalk_reent+0x22> 8002ea2: 6824 ldr r4, [r4, #0] 8002ea4: e7f5 b.n 8002e92 <_fwalk_reent+0xe> 8002ea6: 89ab ldrh r3, [r5, #12] 8002ea8: 2b01 cmp r3, #1 8002eaa: d907 bls.n 8002ebc <_fwalk_reent+0x38> 8002eac: f9b5 300e ldrsh.w r3, [r5, #14] 8002eb0: 3301 adds r3, #1 8002eb2: d003 beq.n 8002ebc <_fwalk_reent+0x38> 8002eb4: 4629 mov r1, r5 8002eb6: 4640 mov r0, r8 8002eb8: 47c8 blx r9 8002eba: 4306 orrs r6, r0 8002ebc: 3568 adds r5, #104 ; 0x68 8002ebe: e7ee b.n 8002e9e <_fwalk_reent+0x1a> 08002ec0 <__swhatbuf_r>: 8002ec0: b570 push {r4, r5, r6, lr} 8002ec2: 460e mov r6, r1 8002ec4: f9b1 100e ldrsh.w r1, [r1, #14] 8002ec8: b090 sub sp, #64 ; 0x40 8002eca: 2900 cmp r1, #0 8002ecc: 4614 mov r4, r2 8002ece: 461d mov r5, r3 8002ed0: da07 bge.n 8002ee2 <__swhatbuf_r+0x22> 8002ed2: 2300 movs r3, #0 8002ed4: 602b str r3, [r5, #0] 8002ed6: 89b3 ldrh r3, [r6, #12] 8002ed8: 061a lsls r2, r3, #24 8002eda: d410 bmi.n 8002efe <__swhatbuf_r+0x3e> 8002edc: f44f 6380 mov.w r3, #1024 ; 0x400 8002ee0: e00e b.n 8002f00 <__swhatbuf_r+0x40> 8002ee2: aa01 add r2, sp, #4 8002ee4: f000 fc4e bl 8003784 <_fstat_r> 8002ee8: 2800 cmp r0, #0 8002eea: dbf2 blt.n 8002ed2 <__swhatbuf_r+0x12> 8002eec: 9a02 ldr r2, [sp, #8] 8002eee: f402 4270 and.w r2, r2, #61440 ; 0xf000 8002ef2: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8002ef6: 425a negs r2, r3 8002ef8: 415a adcs r2, r3 8002efa: 602a str r2, [r5, #0] 8002efc: e7ee b.n 8002edc <__swhatbuf_r+0x1c> 8002efe: 2340 movs r3, #64 ; 0x40 8002f00: 2000 movs r0, #0 8002f02: 6023 str r3, [r4, #0] 8002f04: b010 add sp, #64 ; 0x40 8002f06: bd70 pop {r4, r5, r6, pc} 08002f08 <__smakebuf_r>: 8002f08: 898b ldrh r3, [r1, #12] 8002f0a: b573 push {r0, r1, r4, r5, r6, lr} 8002f0c: 079d lsls r5, r3, #30 8002f0e: 4606 mov r6, r0 8002f10: 460c mov r4, r1 8002f12: d507 bpl.n 8002f24 <__smakebuf_r+0x1c> 8002f14: f104 0347 add.w r3, r4, #71 ; 0x47 8002f18: 6023 str r3, [r4, #0] 8002f1a: 6123 str r3, [r4, #16] 8002f1c: 2301 movs r3, #1 8002f1e: 6163 str r3, [r4, #20] 8002f20: b002 add sp, #8 8002f22: bd70 pop {r4, r5, r6, pc} 8002f24: ab01 add r3, sp, #4 8002f26: 466a mov r2, sp 8002f28: f7ff ffca bl 8002ec0 <__swhatbuf_r> 8002f2c: 9900 ldr r1, [sp, #0] 8002f2e: 4605 mov r5, r0 8002f30: 4630 mov r0, r6 8002f32: f000 f87d bl 8003030 <_malloc_r> 8002f36: b948 cbnz r0, 8002f4c <__smakebuf_r+0x44> 8002f38: f9b4 300c ldrsh.w r3, [r4, #12] 8002f3c: 059a lsls r2, r3, #22 8002f3e: d4ef bmi.n 8002f20 <__smakebuf_r+0x18> 8002f40: f023 0303 bic.w r3, r3, #3 8002f44: f043 0302 orr.w r3, r3, #2 8002f48: 81a3 strh r3, [r4, #12] 8002f4a: e7e3 b.n 8002f14 <__smakebuf_r+0xc> 8002f4c: 4b0d ldr r3, [pc, #52] ; (8002f84 <__smakebuf_r+0x7c>) 8002f4e: 62b3 str r3, [r6, #40] ; 0x28 8002f50: 89a3 ldrh r3, [r4, #12] 8002f52: 6020 str r0, [r4, #0] 8002f54: f043 0380 orr.w r3, r3, #128 ; 0x80 8002f58: 81a3 strh r3, [r4, #12] 8002f5a: 9b00 ldr r3, [sp, #0] 8002f5c: 6120 str r0, [r4, #16] 8002f5e: 6163 str r3, [r4, #20] 8002f60: 9b01 ldr r3, [sp, #4] 8002f62: b15b cbz r3, 8002f7c <__smakebuf_r+0x74> 8002f64: f9b4 100e ldrsh.w r1, [r4, #14] 8002f68: 4630 mov r0, r6 8002f6a: f000 fc1d bl 80037a8 <_isatty_r> 8002f6e: b128 cbz r0, 8002f7c <__smakebuf_r+0x74> 8002f70: 89a3 ldrh r3, [r4, #12] 8002f72: f023 0303 bic.w r3, r3, #3 8002f76: f043 0301 orr.w r3, r3, #1 8002f7a: 81a3 strh r3, [r4, #12] 8002f7c: 89a3 ldrh r3, [r4, #12] 8002f7e: 431d orrs r5, r3 8002f80: 81a5 strh r5, [r4, #12] 8002f82: e7cd b.n 8002f20 <__smakebuf_r+0x18> 8002f84: 08002d2d .word 0x08002d2d 08002f88 : 8002f88: 4b02 ldr r3, [pc, #8] ; (8002f94 ) 8002f8a: 4601 mov r1, r0 8002f8c: 6818 ldr r0, [r3, #0] 8002f8e: f000 b84f b.w 8003030 <_malloc_r> 8002f92: bf00 nop 8002f94: 2000021c .word 0x2000021c 08002f98 <_free_r>: 8002f98: b538 push {r3, r4, r5, lr} 8002f9a: 4605 mov r5, r0 8002f9c: 2900 cmp r1, #0 8002f9e: d043 beq.n 8003028 <_free_r+0x90> 8002fa0: f851 3c04 ldr.w r3, [r1, #-4] 8002fa4: 1f0c subs r4, r1, #4 8002fa6: 2b00 cmp r3, #0 8002fa8: bfb8 it lt 8002faa: 18e4 addlt r4, r4, r3 8002fac: f000 fc2c bl 8003808 <__malloc_lock> 8002fb0: 4a1e ldr r2, [pc, #120] ; (800302c <_free_r+0x94>) 8002fb2: 6813 ldr r3, [r2, #0] 8002fb4: 4610 mov r0, r2 8002fb6: b933 cbnz r3, 8002fc6 <_free_r+0x2e> 8002fb8: 6063 str r3, [r4, #4] 8002fba: 6014 str r4, [r2, #0] 8002fbc: 4628 mov r0, r5 8002fbe: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8002fc2: f000 bc22 b.w 800380a <__malloc_unlock> 8002fc6: 42a3 cmp r3, r4 8002fc8: d90b bls.n 8002fe2 <_free_r+0x4a> 8002fca: 6821 ldr r1, [r4, #0] 8002fcc: 1862 adds r2, r4, r1 8002fce: 4293 cmp r3, r2 8002fd0: bf01 itttt eq 8002fd2: 681a ldreq r2, [r3, #0] 8002fd4: 685b ldreq r3, [r3, #4] 8002fd6: 1852 addeq r2, r2, r1 8002fd8: 6022 streq r2, [r4, #0] 8002fda: 6063 str r3, [r4, #4] 8002fdc: 6004 str r4, [r0, #0] 8002fde: e7ed b.n 8002fbc <_free_r+0x24> 8002fe0: 4613 mov r3, r2 8002fe2: 685a ldr r2, [r3, #4] 8002fe4: b10a cbz r2, 8002fea <_free_r+0x52> 8002fe6: 42a2 cmp r2, r4 8002fe8: d9fa bls.n 8002fe0 <_free_r+0x48> 8002fea: 6819 ldr r1, [r3, #0] 8002fec: 1858 adds r0, r3, r1 8002fee: 42a0 cmp r0, r4 8002ff0: d10b bne.n 800300a <_free_r+0x72> 8002ff2: 6820 ldr r0, [r4, #0] 8002ff4: 4401 add r1, r0 8002ff6: 1858 adds r0, r3, r1 8002ff8: 4282 cmp r2, r0 8002ffa: 6019 str r1, [r3, #0] 8002ffc: d1de bne.n 8002fbc <_free_r+0x24> 8002ffe: 6810 ldr r0, [r2, #0] 8003000: 6852 ldr r2, [r2, #4] 8003002: 4401 add r1, r0 8003004: 6019 str r1, [r3, #0] 8003006: 605a str r2, [r3, #4] 8003008: e7d8 b.n 8002fbc <_free_r+0x24> 800300a: d902 bls.n 8003012 <_free_r+0x7a> 800300c: 230c movs r3, #12 800300e: 602b str r3, [r5, #0] 8003010: e7d4 b.n 8002fbc <_free_r+0x24> 8003012: 6820 ldr r0, [r4, #0] 8003014: 1821 adds r1, r4, r0 8003016: 428a cmp r2, r1 8003018: bf01 itttt eq 800301a: 6811 ldreq r1, [r2, #0] 800301c: 6852 ldreq r2, [r2, #4] 800301e: 1809 addeq r1, r1, r0 8003020: 6021 streq r1, [r4, #0] 8003022: 6062 str r2, [r4, #4] 8003024: 605c str r4, [r3, #4] 8003026: e7c9 b.n 8002fbc <_free_r+0x24> 8003028: bd38 pop {r3, r4, r5, pc} 800302a: bf00 nop 800302c: 200002f0 .word 0x200002f0 08003030 <_malloc_r>: 8003030: b570 push {r4, r5, r6, lr} 8003032: 1ccd adds r5, r1, #3 8003034: f025 0503 bic.w r5, r5, #3 8003038: 3508 adds r5, #8 800303a: 2d0c cmp r5, #12 800303c: bf38 it cc 800303e: 250c movcc r5, #12 8003040: 2d00 cmp r5, #0 8003042: 4606 mov r6, r0 8003044: db01 blt.n 800304a <_malloc_r+0x1a> 8003046: 42a9 cmp r1, r5 8003048: d903 bls.n 8003052 <_malloc_r+0x22> 800304a: 230c movs r3, #12 800304c: 6033 str r3, [r6, #0] 800304e: 2000 movs r0, #0 8003050: bd70 pop {r4, r5, r6, pc} 8003052: f000 fbd9 bl 8003808 <__malloc_lock> 8003056: 4a23 ldr r2, [pc, #140] ; (80030e4 <_malloc_r+0xb4>) 8003058: 6814 ldr r4, [r2, #0] 800305a: 4621 mov r1, r4 800305c: b991 cbnz r1, 8003084 <_malloc_r+0x54> 800305e: 4c22 ldr r4, [pc, #136] ; (80030e8 <_malloc_r+0xb8>) 8003060: 6823 ldr r3, [r4, #0] 8003062: b91b cbnz r3, 800306c <_malloc_r+0x3c> 8003064: 4630 mov r0, r6 8003066: f000 fb17 bl 8003698 <_sbrk_r> 800306a: 6020 str r0, [r4, #0] 800306c: 4629 mov r1, r5 800306e: 4630 mov r0, r6 8003070: f000 fb12 bl 8003698 <_sbrk_r> 8003074: 1c43 adds r3, r0, #1 8003076: d126 bne.n 80030c6 <_malloc_r+0x96> 8003078: 230c movs r3, #12 800307a: 4630 mov r0, r6 800307c: 6033 str r3, [r6, #0] 800307e: f000 fbc4 bl 800380a <__malloc_unlock> 8003082: e7e4 b.n 800304e <_malloc_r+0x1e> 8003084: 680b ldr r3, [r1, #0] 8003086: 1b5b subs r3, r3, r5 8003088: d41a bmi.n 80030c0 <_malloc_r+0x90> 800308a: 2b0b cmp r3, #11 800308c: d90f bls.n 80030ae <_malloc_r+0x7e> 800308e: 600b str r3, [r1, #0] 8003090: 18cc adds r4, r1, r3 8003092: 50cd str r5, [r1, r3] 8003094: 4630 mov r0, r6 8003096: f000 fbb8 bl 800380a <__malloc_unlock> 800309a: f104 000b add.w r0, r4, #11 800309e: 1d23 adds r3, r4, #4 80030a0: f020 0007 bic.w r0, r0, #7 80030a4: 1ac3 subs r3, r0, r3 80030a6: d01b beq.n 80030e0 <_malloc_r+0xb0> 80030a8: 425a negs r2, r3 80030aa: 50e2 str r2, [r4, r3] 80030ac: bd70 pop {r4, r5, r6, pc} 80030ae: 428c cmp r4, r1 80030b0: bf0b itete eq 80030b2: 6863 ldreq r3, [r4, #4] 80030b4: 684b ldrne r3, [r1, #4] 80030b6: 6013 streq r3, [r2, #0] 80030b8: 6063 strne r3, [r4, #4] 80030ba: bf18 it ne 80030bc: 460c movne r4, r1 80030be: e7e9 b.n 8003094 <_malloc_r+0x64> 80030c0: 460c mov r4, r1 80030c2: 6849 ldr r1, [r1, #4] 80030c4: e7ca b.n 800305c <_malloc_r+0x2c> 80030c6: 1cc4 adds r4, r0, #3 80030c8: f024 0403 bic.w r4, r4, #3 80030cc: 42a0 cmp r0, r4 80030ce: d005 beq.n 80030dc <_malloc_r+0xac> 80030d0: 1a21 subs r1, r4, r0 80030d2: 4630 mov r0, r6 80030d4: f000 fae0 bl 8003698 <_sbrk_r> 80030d8: 3001 adds r0, #1 80030da: d0cd beq.n 8003078 <_malloc_r+0x48> 80030dc: 6025 str r5, [r4, #0] 80030de: e7d9 b.n 8003094 <_malloc_r+0x64> 80030e0: bd70 pop {r4, r5, r6, pc} 80030e2: bf00 nop 80030e4: 200002f0 .word 0x200002f0 80030e8: 200002f4 .word 0x200002f4 080030ec <__sfputc_r>: 80030ec: 6893 ldr r3, [r2, #8] 80030ee: b410 push {r4} 80030f0: 3b01 subs r3, #1 80030f2: 2b00 cmp r3, #0 80030f4: 6093 str r3, [r2, #8] 80030f6: da08 bge.n 800310a <__sfputc_r+0x1e> 80030f8: 6994 ldr r4, [r2, #24] 80030fa: 42a3 cmp r3, r4 80030fc: db02 blt.n 8003104 <__sfputc_r+0x18> 80030fe: b2cb uxtb r3, r1 8003100: 2b0a cmp r3, #10 8003102: d102 bne.n 800310a <__sfputc_r+0x1e> 8003104: bc10 pop {r4} 8003106: f7ff bc9f b.w 8002a48 <__swbuf_r> 800310a: 6813 ldr r3, [r2, #0] 800310c: 1c58 adds r0, r3, #1 800310e: 6010 str r0, [r2, #0] 8003110: 7019 strb r1, [r3, #0] 8003112: b2c8 uxtb r0, r1 8003114: bc10 pop {r4} 8003116: 4770 bx lr 08003118 <__sfputs_r>: 8003118: b5f8 push {r3, r4, r5, r6, r7, lr} 800311a: 4606 mov r6, r0 800311c: 460f mov r7, r1 800311e: 4614 mov r4, r2 8003120: 18d5 adds r5, r2, r3 8003122: 42ac cmp r4, r5 8003124: d101 bne.n 800312a <__sfputs_r+0x12> 8003126: 2000 movs r0, #0 8003128: e007 b.n 800313a <__sfputs_r+0x22> 800312a: 463a mov r2, r7 800312c: f814 1b01 ldrb.w r1, [r4], #1 8003130: 4630 mov r0, r6 8003132: f7ff ffdb bl 80030ec <__sfputc_r> 8003136: 1c43 adds r3, r0, #1 8003138: d1f3 bne.n 8003122 <__sfputs_r+0xa> 800313a: bdf8 pop {r3, r4, r5, r6, r7, pc} 0800313c <_vfiprintf_r>: 800313c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8003140: b09d sub sp, #116 ; 0x74 8003142: 460c mov r4, r1 8003144: 4617 mov r7, r2 8003146: 9303 str r3, [sp, #12] 8003148: 4606 mov r6, r0 800314a: b118 cbz r0, 8003154 <_vfiprintf_r+0x18> 800314c: 6983 ldr r3, [r0, #24] 800314e: b90b cbnz r3, 8003154 <_vfiprintf_r+0x18> 8003150: f7ff fe2c bl 8002dac <__sinit> 8003154: 4b7c ldr r3, [pc, #496] ; (8003348 <_vfiprintf_r+0x20c>) 8003156: 429c cmp r4, r3 8003158: d157 bne.n 800320a <_vfiprintf_r+0xce> 800315a: 6874 ldr r4, [r6, #4] 800315c: 89a3 ldrh r3, [r4, #12] 800315e: 0718 lsls r0, r3, #28 8003160: d55d bpl.n 800321e <_vfiprintf_r+0xe2> 8003162: 6923 ldr r3, [r4, #16] 8003164: 2b00 cmp r3, #0 8003166: d05a beq.n 800321e <_vfiprintf_r+0xe2> 8003168: 2300 movs r3, #0 800316a: 9309 str r3, [sp, #36] ; 0x24 800316c: 2320 movs r3, #32 800316e: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8003172: 2330 movs r3, #48 ; 0x30 8003174: f04f 0b01 mov.w fp, #1 8003178: f88d 302a strb.w r3, [sp, #42] ; 0x2a 800317c: 46b8 mov r8, r7 800317e: 4645 mov r5, r8 8003180: f815 3b01 ldrb.w r3, [r5], #1 8003184: 2b00 cmp r3, #0 8003186: d155 bne.n 8003234 <_vfiprintf_r+0xf8> 8003188: ebb8 0a07 subs.w sl, r8, r7 800318c: d00b beq.n 80031a6 <_vfiprintf_r+0x6a> 800318e: 4653 mov r3, sl 8003190: 463a mov r2, r7 8003192: 4621 mov r1, r4 8003194: 4630 mov r0, r6 8003196: f7ff ffbf bl 8003118 <__sfputs_r> 800319a: 3001 adds r0, #1 800319c: f000 80c4 beq.w 8003328 <_vfiprintf_r+0x1ec> 80031a0: 9b09 ldr r3, [sp, #36] ; 0x24 80031a2: 4453 add r3, sl 80031a4: 9309 str r3, [sp, #36] ; 0x24 80031a6: f898 3000 ldrb.w r3, [r8] 80031aa: 2b00 cmp r3, #0 80031ac: f000 80bc beq.w 8003328 <_vfiprintf_r+0x1ec> 80031b0: 2300 movs r3, #0 80031b2: f04f 32ff mov.w r2, #4294967295 80031b6: 9304 str r3, [sp, #16] 80031b8: 9307 str r3, [sp, #28] 80031ba: 9205 str r2, [sp, #20] 80031bc: 9306 str r3, [sp, #24] 80031be: f88d 3053 strb.w r3, [sp, #83] ; 0x53 80031c2: 931a str r3, [sp, #104] ; 0x68 80031c4: 2205 movs r2, #5 80031c6: 7829 ldrb r1, [r5, #0] 80031c8: 4860 ldr r0, [pc, #384] ; (800334c <_vfiprintf_r+0x210>) 80031ca: f000 fb0f bl 80037ec 80031ce: f105 0801 add.w r8, r5, #1 80031d2: 9b04 ldr r3, [sp, #16] 80031d4: 2800 cmp r0, #0 80031d6: d131 bne.n 800323c <_vfiprintf_r+0x100> 80031d8: 06d9 lsls r1, r3, #27 80031da: bf44 itt mi 80031dc: 2220 movmi r2, #32 80031de: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 80031e2: 071a lsls r2, r3, #28 80031e4: bf44 itt mi 80031e6: 222b movmi r2, #43 ; 0x2b 80031e8: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 80031ec: 782a ldrb r2, [r5, #0] 80031ee: 2a2a cmp r2, #42 ; 0x2a 80031f0: d02c beq.n 800324c <_vfiprintf_r+0x110> 80031f2: 2100 movs r1, #0 80031f4: 200a movs r0, #10 80031f6: 9a07 ldr r2, [sp, #28] 80031f8: 46a8 mov r8, r5 80031fa: f898 3000 ldrb.w r3, [r8] 80031fe: 3501 adds r5, #1 8003200: 3b30 subs r3, #48 ; 0x30 8003202: 2b09 cmp r3, #9 8003204: d96d bls.n 80032e2 <_vfiprintf_r+0x1a6> 8003206: b371 cbz r1, 8003266 <_vfiprintf_r+0x12a> 8003208: e026 b.n 8003258 <_vfiprintf_r+0x11c> 800320a: 4b51 ldr r3, [pc, #324] ; (8003350 <_vfiprintf_r+0x214>) 800320c: 429c cmp r4, r3 800320e: d101 bne.n 8003214 <_vfiprintf_r+0xd8> 8003210: 68b4 ldr r4, [r6, #8] 8003212: e7a3 b.n 800315c <_vfiprintf_r+0x20> 8003214: 4b4f ldr r3, [pc, #316] ; (8003354 <_vfiprintf_r+0x218>) 8003216: 429c cmp r4, r3 8003218: bf08 it eq 800321a: 68f4 ldreq r4, [r6, #12] 800321c: e79e b.n 800315c <_vfiprintf_r+0x20> 800321e: 4621 mov r1, r4 8003220: 4630 mov r0, r6 8003222: f7ff fc63 bl 8002aec <__swsetup_r> 8003226: 2800 cmp r0, #0 8003228: d09e beq.n 8003168 <_vfiprintf_r+0x2c> 800322a: f04f 30ff mov.w r0, #4294967295 800322e: b01d add sp, #116 ; 0x74 8003230: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8003234: 2b25 cmp r3, #37 ; 0x25 8003236: d0a7 beq.n 8003188 <_vfiprintf_r+0x4c> 8003238: 46a8 mov r8, r5 800323a: e7a0 b.n 800317e <_vfiprintf_r+0x42> 800323c: 4a43 ldr r2, [pc, #268] ; (800334c <_vfiprintf_r+0x210>) 800323e: 4645 mov r5, r8 8003240: 1a80 subs r0, r0, r2 8003242: fa0b f000 lsl.w r0, fp, r0 8003246: 4318 orrs r0, r3 8003248: 9004 str r0, [sp, #16] 800324a: e7bb b.n 80031c4 <_vfiprintf_r+0x88> 800324c: 9a03 ldr r2, [sp, #12] 800324e: 1d11 adds r1, r2, #4 8003250: 6812 ldr r2, [r2, #0] 8003252: 9103 str r1, [sp, #12] 8003254: 2a00 cmp r2, #0 8003256: db01 blt.n 800325c <_vfiprintf_r+0x120> 8003258: 9207 str r2, [sp, #28] 800325a: e004 b.n 8003266 <_vfiprintf_r+0x12a> 800325c: 4252 negs r2, r2 800325e: f043 0302 orr.w r3, r3, #2 8003262: 9207 str r2, [sp, #28] 8003264: 9304 str r3, [sp, #16] 8003266: f898 3000 ldrb.w r3, [r8] 800326a: 2b2e cmp r3, #46 ; 0x2e 800326c: d110 bne.n 8003290 <_vfiprintf_r+0x154> 800326e: f898 3001 ldrb.w r3, [r8, #1] 8003272: f108 0101 add.w r1, r8, #1 8003276: 2b2a cmp r3, #42 ; 0x2a 8003278: d137 bne.n 80032ea <_vfiprintf_r+0x1ae> 800327a: 9b03 ldr r3, [sp, #12] 800327c: f108 0802 add.w r8, r8, #2 8003280: 1d1a adds r2, r3, #4 8003282: 681b ldr r3, [r3, #0] 8003284: 9203 str r2, [sp, #12] 8003286: 2b00 cmp r3, #0 8003288: bfb8 it lt 800328a: f04f 33ff movlt.w r3, #4294967295 800328e: 9305 str r3, [sp, #20] 8003290: 4d31 ldr r5, [pc, #196] ; (8003358 <_vfiprintf_r+0x21c>) 8003292: 2203 movs r2, #3 8003294: f898 1000 ldrb.w r1, [r8] 8003298: 4628 mov r0, r5 800329a: f000 faa7 bl 80037ec 800329e: b140 cbz r0, 80032b2 <_vfiprintf_r+0x176> 80032a0: 2340 movs r3, #64 ; 0x40 80032a2: 1b40 subs r0, r0, r5 80032a4: fa03 f000 lsl.w r0, r3, r0 80032a8: 9b04 ldr r3, [sp, #16] 80032aa: f108 0801 add.w r8, r8, #1 80032ae: 4303 orrs r3, r0 80032b0: 9304 str r3, [sp, #16] 80032b2: f898 1000 ldrb.w r1, [r8] 80032b6: 2206 movs r2, #6 80032b8: 4828 ldr r0, [pc, #160] ; (800335c <_vfiprintf_r+0x220>) 80032ba: f108 0701 add.w r7, r8, #1 80032be: f88d 1028 strb.w r1, [sp, #40] ; 0x28 80032c2: f000 fa93 bl 80037ec 80032c6: 2800 cmp r0, #0 80032c8: d034 beq.n 8003334 <_vfiprintf_r+0x1f8> 80032ca: 4b25 ldr r3, [pc, #148] ; (8003360 <_vfiprintf_r+0x224>) 80032cc: bb03 cbnz r3, 8003310 <_vfiprintf_r+0x1d4> 80032ce: 9b03 ldr r3, [sp, #12] 80032d0: 3307 adds r3, #7 80032d2: f023 0307 bic.w r3, r3, #7 80032d6: 3308 adds r3, #8 80032d8: 9303 str r3, [sp, #12] 80032da: 9b09 ldr r3, [sp, #36] ; 0x24 80032dc: 444b add r3, r9 80032de: 9309 str r3, [sp, #36] ; 0x24 80032e0: e74c b.n 800317c <_vfiprintf_r+0x40> 80032e2: fb00 3202 mla r2, r0, r2, r3 80032e6: 2101 movs r1, #1 80032e8: e786 b.n 80031f8 <_vfiprintf_r+0xbc> 80032ea: 2300 movs r3, #0 80032ec: 250a movs r5, #10 80032ee: 4618 mov r0, r3 80032f0: 9305 str r3, [sp, #20] 80032f2: 4688 mov r8, r1 80032f4: f898 2000 ldrb.w r2, [r8] 80032f8: 3101 adds r1, #1 80032fa: 3a30 subs r2, #48 ; 0x30 80032fc: 2a09 cmp r2, #9 80032fe: d903 bls.n 8003308 <_vfiprintf_r+0x1cc> 8003300: 2b00 cmp r3, #0 8003302: d0c5 beq.n 8003290 <_vfiprintf_r+0x154> 8003304: 9005 str r0, [sp, #20] 8003306: e7c3 b.n 8003290 <_vfiprintf_r+0x154> 8003308: fb05 2000 mla r0, r5, r0, r2 800330c: 2301 movs r3, #1 800330e: e7f0 b.n 80032f2 <_vfiprintf_r+0x1b6> 8003310: ab03 add r3, sp, #12 8003312: 9300 str r3, [sp, #0] 8003314: 4622 mov r2, r4 8003316: 4b13 ldr r3, [pc, #76] ; (8003364 <_vfiprintf_r+0x228>) 8003318: a904 add r1, sp, #16 800331a: 4630 mov r0, r6 800331c: f3af 8000 nop.w 8003320: f1b0 3fff cmp.w r0, #4294967295 8003324: 4681 mov r9, r0 8003326: d1d8 bne.n 80032da <_vfiprintf_r+0x19e> 8003328: 89a3 ldrh r3, [r4, #12] 800332a: 065b lsls r3, r3, #25 800332c: f53f af7d bmi.w 800322a <_vfiprintf_r+0xee> 8003330: 9809 ldr r0, [sp, #36] ; 0x24 8003332: e77c b.n 800322e <_vfiprintf_r+0xf2> 8003334: ab03 add r3, sp, #12 8003336: 9300 str r3, [sp, #0] 8003338: 4622 mov r2, r4 800333a: 4b0a ldr r3, [pc, #40] ; (8003364 <_vfiprintf_r+0x228>) 800333c: a904 add r1, sp, #16 800333e: 4630 mov r0, r6 8003340: f000 f88a bl 8003458 <_printf_i> 8003344: e7ec b.n 8003320 <_vfiprintf_r+0x1e4> 8003346: bf00 nop 8003348: 080039b8 .word 0x080039b8 800334c: 080039f8 .word 0x080039f8 8003350: 080039d8 .word 0x080039d8 8003354: 08003998 .word 0x08003998 8003358: 080039fe .word 0x080039fe 800335c: 08003a02 .word 0x08003a02 8003360: 00000000 .word 0x00000000 8003364: 08003119 .word 0x08003119 08003368 <_printf_common>: 8003368: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800336c: 4691 mov r9, r2 800336e: 461f mov r7, r3 8003370: 688a ldr r2, [r1, #8] 8003372: 690b ldr r3, [r1, #16] 8003374: 4606 mov r6, r0 8003376: 4293 cmp r3, r2 8003378: bfb8 it lt 800337a: 4613 movlt r3, r2 800337c: f8c9 3000 str.w r3, [r9] 8003380: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8003384: 460c mov r4, r1 8003386: f8dd 8020 ldr.w r8, [sp, #32] 800338a: b112 cbz r2, 8003392 <_printf_common+0x2a> 800338c: 3301 adds r3, #1 800338e: f8c9 3000 str.w r3, [r9] 8003392: 6823 ldr r3, [r4, #0] 8003394: 0699 lsls r1, r3, #26 8003396: bf42 ittt mi 8003398: f8d9 3000 ldrmi.w r3, [r9] 800339c: 3302 addmi r3, #2 800339e: f8c9 3000 strmi.w r3, [r9] 80033a2: 6825 ldr r5, [r4, #0] 80033a4: f015 0506 ands.w r5, r5, #6 80033a8: d107 bne.n 80033ba <_printf_common+0x52> 80033aa: f104 0a19 add.w sl, r4, #25 80033ae: 68e3 ldr r3, [r4, #12] 80033b0: f8d9 2000 ldr.w r2, [r9] 80033b4: 1a9b subs r3, r3, r2 80033b6: 429d cmp r5, r3 80033b8: db2a blt.n 8003410 <_printf_common+0xa8> 80033ba: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 80033be: 6822 ldr r2, [r4, #0] 80033c0: 3300 adds r3, #0 80033c2: bf18 it ne 80033c4: 2301 movne r3, #1 80033c6: 0692 lsls r2, r2, #26 80033c8: d42f bmi.n 800342a <_printf_common+0xc2> 80033ca: f104 0243 add.w r2, r4, #67 ; 0x43 80033ce: 4639 mov r1, r7 80033d0: 4630 mov r0, r6 80033d2: 47c0 blx r8 80033d4: 3001 adds r0, #1 80033d6: d022 beq.n 800341e <_printf_common+0xb6> 80033d8: 6823 ldr r3, [r4, #0] 80033da: 68e5 ldr r5, [r4, #12] 80033dc: f003 0306 and.w r3, r3, #6 80033e0: 2b04 cmp r3, #4 80033e2: bf18 it ne 80033e4: 2500 movne r5, #0 80033e6: f8d9 2000 ldr.w r2, [r9] 80033ea: f04f 0900 mov.w r9, #0 80033ee: bf08 it eq 80033f0: 1aad subeq r5, r5, r2 80033f2: 68a3 ldr r3, [r4, #8] 80033f4: 6922 ldr r2, [r4, #16] 80033f6: bf08 it eq 80033f8: ea25 75e5 biceq.w r5, r5, r5, asr #31 80033fc: 4293 cmp r3, r2 80033fe: bfc4 itt gt 8003400: 1a9b subgt r3, r3, r2 8003402: 18ed addgt r5, r5, r3 8003404: 341a adds r4, #26 8003406: 454d cmp r5, r9 8003408: d11b bne.n 8003442 <_printf_common+0xda> 800340a: 2000 movs r0, #0 800340c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8003410: 2301 movs r3, #1 8003412: 4652 mov r2, sl 8003414: 4639 mov r1, r7 8003416: 4630 mov r0, r6 8003418: 47c0 blx r8 800341a: 3001 adds r0, #1 800341c: d103 bne.n 8003426 <_printf_common+0xbe> 800341e: f04f 30ff mov.w r0, #4294967295 8003422: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8003426: 3501 adds r5, #1 8003428: e7c1 b.n 80033ae <_printf_common+0x46> 800342a: 2030 movs r0, #48 ; 0x30 800342c: 18e1 adds r1, r4, r3 800342e: f881 0043 strb.w r0, [r1, #67] ; 0x43 8003432: 1c5a adds r2, r3, #1 8003434: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8003438: 4422 add r2, r4 800343a: 3302 adds r3, #2 800343c: f882 1043 strb.w r1, [r2, #67] ; 0x43 8003440: e7c3 b.n 80033ca <_printf_common+0x62> 8003442: 2301 movs r3, #1 8003444: 4622 mov r2, r4 8003446: 4639 mov r1, r7 8003448: 4630 mov r0, r6 800344a: 47c0 blx r8 800344c: 3001 adds r0, #1 800344e: d0e6 beq.n 800341e <_printf_common+0xb6> 8003450: f109 0901 add.w r9, r9, #1 8003454: e7d7 b.n 8003406 <_printf_common+0x9e> ... 08003458 <_printf_i>: 8003458: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 800345c: 4617 mov r7, r2 800345e: 7e0a ldrb r2, [r1, #24] 8003460: b085 sub sp, #20 8003462: 2a6e cmp r2, #110 ; 0x6e 8003464: 4698 mov r8, r3 8003466: 4606 mov r6, r0 8003468: 460c mov r4, r1 800346a: 9b0c ldr r3, [sp, #48] ; 0x30 800346c: f101 0e43 add.w lr, r1, #67 ; 0x43 8003470: f000 80bc beq.w 80035ec <_printf_i+0x194> 8003474: d81a bhi.n 80034ac <_printf_i+0x54> 8003476: 2a63 cmp r2, #99 ; 0x63 8003478: d02e beq.n 80034d8 <_printf_i+0x80> 800347a: d80a bhi.n 8003492 <_printf_i+0x3a> 800347c: 2a00 cmp r2, #0 800347e: f000 80c8 beq.w 8003612 <_printf_i+0x1ba> 8003482: 2a58 cmp r2, #88 ; 0x58 8003484: f000 808a beq.w 800359c <_printf_i+0x144> 8003488: f104 0542 add.w r5, r4, #66 ; 0x42 800348c: f884 2042 strb.w r2, [r4, #66] ; 0x42 8003490: e02a b.n 80034e8 <_printf_i+0x90> 8003492: 2a64 cmp r2, #100 ; 0x64 8003494: d001 beq.n 800349a <_printf_i+0x42> 8003496: 2a69 cmp r2, #105 ; 0x69 8003498: d1f6 bne.n 8003488 <_printf_i+0x30> 800349a: 6821 ldr r1, [r4, #0] 800349c: 681a ldr r2, [r3, #0] 800349e: f011 0f80 tst.w r1, #128 ; 0x80 80034a2: d023 beq.n 80034ec <_printf_i+0x94> 80034a4: 1d11 adds r1, r2, #4 80034a6: 6019 str r1, [r3, #0] 80034a8: 6813 ldr r3, [r2, #0] 80034aa: e027 b.n 80034fc <_printf_i+0xa4> 80034ac: 2a73 cmp r2, #115 ; 0x73 80034ae: f000 80b4 beq.w 800361a <_printf_i+0x1c2> 80034b2: d808 bhi.n 80034c6 <_printf_i+0x6e> 80034b4: 2a6f cmp r2, #111 ; 0x6f 80034b6: d02a beq.n 800350e <_printf_i+0xb6> 80034b8: 2a70 cmp r2, #112 ; 0x70 80034ba: d1e5 bne.n 8003488 <_printf_i+0x30> 80034bc: 680a ldr r2, [r1, #0] 80034be: f042 0220 orr.w r2, r2, #32 80034c2: 600a str r2, [r1, #0] 80034c4: e003 b.n 80034ce <_printf_i+0x76> 80034c6: 2a75 cmp r2, #117 ; 0x75 80034c8: d021 beq.n 800350e <_printf_i+0xb6> 80034ca: 2a78 cmp r2, #120 ; 0x78 80034cc: d1dc bne.n 8003488 <_printf_i+0x30> 80034ce: 2278 movs r2, #120 ; 0x78 80034d0: 496f ldr r1, [pc, #444] ; (8003690 <_printf_i+0x238>) 80034d2: f884 2045 strb.w r2, [r4, #69] ; 0x45 80034d6: e064 b.n 80035a2 <_printf_i+0x14a> 80034d8: 681a ldr r2, [r3, #0] 80034da: f101 0542 add.w r5, r1, #66 ; 0x42 80034de: 1d11 adds r1, r2, #4 80034e0: 6019 str r1, [r3, #0] 80034e2: 6813 ldr r3, [r2, #0] 80034e4: f884 3042 strb.w r3, [r4, #66] ; 0x42 80034e8: 2301 movs r3, #1 80034ea: e0a3 b.n 8003634 <_printf_i+0x1dc> 80034ec: f011 0f40 tst.w r1, #64 ; 0x40 80034f0: f102 0104 add.w r1, r2, #4 80034f4: 6019 str r1, [r3, #0] 80034f6: d0d7 beq.n 80034a8 <_printf_i+0x50> 80034f8: f9b2 3000 ldrsh.w r3, [r2] 80034fc: 2b00 cmp r3, #0 80034fe: da03 bge.n 8003508 <_printf_i+0xb0> 8003500: 222d movs r2, #45 ; 0x2d 8003502: 425b negs r3, r3 8003504: f884 2043 strb.w r2, [r4, #67] ; 0x43 8003508: 4962 ldr r1, [pc, #392] ; (8003694 <_printf_i+0x23c>) 800350a: 220a movs r2, #10 800350c: e017 b.n 800353e <_printf_i+0xe6> 800350e: 6820 ldr r0, [r4, #0] 8003510: 6819 ldr r1, [r3, #0] 8003512: f010 0f80 tst.w r0, #128 ; 0x80 8003516: d003 beq.n 8003520 <_printf_i+0xc8> 8003518: 1d08 adds r0, r1, #4 800351a: 6018 str r0, [r3, #0] 800351c: 680b ldr r3, [r1, #0] 800351e: e006 b.n 800352e <_printf_i+0xd6> 8003520: f010 0f40 tst.w r0, #64 ; 0x40 8003524: f101 0004 add.w r0, r1, #4 8003528: 6018 str r0, [r3, #0] 800352a: d0f7 beq.n 800351c <_printf_i+0xc4> 800352c: 880b ldrh r3, [r1, #0] 800352e: 2a6f cmp r2, #111 ; 0x6f 8003530: bf14 ite ne 8003532: 220a movne r2, #10 8003534: 2208 moveq r2, #8 8003536: 4957 ldr r1, [pc, #348] ; (8003694 <_printf_i+0x23c>) 8003538: 2000 movs r0, #0 800353a: f884 0043 strb.w r0, [r4, #67] ; 0x43 800353e: 6865 ldr r5, [r4, #4] 8003540: 2d00 cmp r5, #0 8003542: 60a5 str r5, [r4, #8] 8003544: f2c0 809c blt.w 8003680 <_printf_i+0x228> 8003548: 6820 ldr r0, [r4, #0] 800354a: f020 0004 bic.w r0, r0, #4 800354e: 6020 str r0, [r4, #0] 8003550: 2b00 cmp r3, #0 8003552: d13f bne.n 80035d4 <_printf_i+0x17c> 8003554: 2d00 cmp r5, #0 8003556: f040 8095 bne.w 8003684 <_printf_i+0x22c> 800355a: 4675 mov r5, lr 800355c: 2a08 cmp r2, #8 800355e: d10b bne.n 8003578 <_printf_i+0x120> 8003560: 6823 ldr r3, [r4, #0] 8003562: 07da lsls r2, r3, #31 8003564: d508 bpl.n 8003578 <_printf_i+0x120> 8003566: 6923 ldr r3, [r4, #16] 8003568: 6862 ldr r2, [r4, #4] 800356a: 429a cmp r2, r3 800356c: bfde ittt le 800356e: 2330 movle r3, #48 ; 0x30 8003570: f805 3c01 strble.w r3, [r5, #-1] 8003574: f105 35ff addle.w r5, r5, #4294967295 8003578: ebae 0305 sub.w r3, lr, r5 800357c: 6123 str r3, [r4, #16] 800357e: f8cd 8000 str.w r8, [sp] 8003582: 463b mov r3, r7 8003584: aa03 add r2, sp, #12 8003586: 4621 mov r1, r4 8003588: 4630 mov r0, r6 800358a: f7ff feed bl 8003368 <_printf_common> 800358e: 3001 adds r0, #1 8003590: d155 bne.n 800363e <_printf_i+0x1e6> 8003592: f04f 30ff mov.w r0, #4294967295 8003596: b005 add sp, #20 8003598: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 800359c: f881 2045 strb.w r2, [r1, #69] ; 0x45 80035a0: 493c ldr r1, [pc, #240] ; (8003694 <_printf_i+0x23c>) 80035a2: 6822 ldr r2, [r4, #0] 80035a4: 6818 ldr r0, [r3, #0] 80035a6: f012 0f80 tst.w r2, #128 ; 0x80 80035aa: f100 0504 add.w r5, r0, #4 80035ae: 601d str r5, [r3, #0] 80035b0: d001 beq.n 80035b6 <_printf_i+0x15e> 80035b2: 6803 ldr r3, [r0, #0] 80035b4: e002 b.n 80035bc <_printf_i+0x164> 80035b6: 0655 lsls r5, r2, #25 80035b8: d5fb bpl.n 80035b2 <_printf_i+0x15a> 80035ba: 8803 ldrh r3, [r0, #0] 80035bc: 07d0 lsls r0, r2, #31 80035be: bf44 itt mi 80035c0: f042 0220 orrmi.w r2, r2, #32 80035c4: 6022 strmi r2, [r4, #0] 80035c6: b91b cbnz r3, 80035d0 <_printf_i+0x178> 80035c8: 6822 ldr r2, [r4, #0] 80035ca: f022 0220 bic.w r2, r2, #32 80035ce: 6022 str r2, [r4, #0] 80035d0: 2210 movs r2, #16 80035d2: e7b1 b.n 8003538 <_printf_i+0xe0> 80035d4: 4675 mov r5, lr 80035d6: fbb3 f0f2 udiv r0, r3, r2 80035da: fb02 3310 mls r3, r2, r0, r3 80035de: 5ccb ldrb r3, [r1, r3] 80035e0: f805 3d01 strb.w r3, [r5, #-1]! 80035e4: 4603 mov r3, r0 80035e6: 2800 cmp r0, #0 80035e8: d1f5 bne.n 80035d6 <_printf_i+0x17e> 80035ea: e7b7 b.n 800355c <_printf_i+0x104> 80035ec: 6808 ldr r0, [r1, #0] 80035ee: 681a ldr r2, [r3, #0] 80035f0: f010 0f80 tst.w r0, #128 ; 0x80 80035f4: 6949 ldr r1, [r1, #20] 80035f6: d004 beq.n 8003602 <_printf_i+0x1aa> 80035f8: 1d10 adds r0, r2, #4 80035fa: 6018 str r0, [r3, #0] 80035fc: 6813 ldr r3, [r2, #0] 80035fe: 6019 str r1, [r3, #0] 8003600: e007 b.n 8003612 <_printf_i+0x1ba> 8003602: f010 0f40 tst.w r0, #64 ; 0x40 8003606: f102 0004 add.w r0, r2, #4 800360a: 6018 str r0, [r3, #0] 800360c: 6813 ldr r3, [r2, #0] 800360e: d0f6 beq.n 80035fe <_printf_i+0x1a6> 8003610: 8019 strh r1, [r3, #0] 8003612: 2300 movs r3, #0 8003614: 4675 mov r5, lr 8003616: 6123 str r3, [r4, #16] 8003618: e7b1 b.n 800357e <_printf_i+0x126> 800361a: 681a ldr r2, [r3, #0] 800361c: 1d11 adds r1, r2, #4 800361e: 6019 str r1, [r3, #0] 8003620: 6815 ldr r5, [r2, #0] 8003622: 2100 movs r1, #0 8003624: 6862 ldr r2, [r4, #4] 8003626: 4628 mov r0, r5 8003628: f000 f8e0 bl 80037ec 800362c: b108 cbz r0, 8003632 <_printf_i+0x1da> 800362e: 1b40 subs r0, r0, r5 8003630: 6060 str r0, [r4, #4] 8003632: 6863 ldr r3, [r4, #4] 8003634: 6123 str r3, [r4, #16] 8003636: 2300 movs r3, #0 8003638: f884 3043 strb.w r3, [r4, #67] ; 0x43 800363c: e79f b.n 800357e <_printf_i+0x126> 800363e: 6923 ldr r3, [r4, #16] 8003640: 462a mov r2, r5 8003642: 4639 mov r1, r7 8003644: 4630 mov r0, r6 8003646: 47c0 blx r8 8003648: 3001 adds r0, #1 800364a: d0a2 beq.n 8003592 <_printf_i+0x13a> 800364c: 6823 ldr r3, [r4, #0] 800364e: 079b lsls r3, r3, #30 8003650: d507 bpl.n 8003662 <_printf_i+0x20a> 8003652: 2500 movs r5, #0 8003654: f104 0919 add.w r9, r4, #25 8003658: 68e3 ldr r3, [r4, #12] 800365a: 9a03 ldr r2, [sp, #12] 800365c: 1a9b subs r3, r3, r2 800365e: 429d cmp r5, r3 8003660: db05 blt.n 800366e <_printf_i+0x216> 8003662: 68e0 ldr r0, [r4, #12] 8003664: 9b03 ldr r3, [sp, #12] 8003666: 4298 cmp r0, r3 8003668: bfb8 it lt 800366a: 4618 movlt r0, r3 800366c: e793 b.n 8003596 <_printf_i+0x13e> 800366e: 2301 movs r3, #1 8003670: 464a mov r2, r9 8003672: 4639 mov r1, r7 8003674: 4630 mov r0, r6 8003676: 47c0 blx r8 8003678: 3001 adds r0, #1 800367a: d08a beq.n 8003592 <_printf_i+0x13a> 800367c: 3501 adds r5, #1 800367e: e7eb b.n 8003658 <_printf_i+0x200> 8003680: 2b00 cmp r3, #0 8003682: d1a7 bne.n 80035d4 <_printf_i+0x17c> 8003684: 780b ldrb r3, [r1, #0] 8003686: f104 0542 add.w r5, r4, #66 ; 0x42 800368a: f884 3042 strb.w r3, [r4, #66] ; 0x42 800368e: e765 b.n 800355c <_printf_i+0x104> 8003690: 08003a1a .word 0x08003a1a 8003694: 08003a09 .word 0x08003a09 08003698 <_sbrk_r>: 8003698: b538 push {r3, r4, r5, lr} 800369a: 2300 movs r3, #0 800369c: 4c05 ldr r4, [pc, #20] ; (80036b4 <_sbrk_r+0x1c>) 800369e: 4605 mov r5, r0 80036a0: 4608 mov r0, r1 80036a2: 6023 str r3, [r4, #0] 80036a4: f7fe ff5a bl 800255c <_sbrk> 80036a8: 1c43 adds r3, r0, #1 80036aa: d102 bne.n 80036b2 <_sbrk_r+0x1a> 80036ac: 6823 ldr r3, [r4, #0] 80036ae: b103 cbz r3, 80036b2 <_sbrk_r+0x1a> 80036b0: 602b str r3, [r5, #0] 80036b2: bd38 pop {r3, r4, r5, pc} 80036b4: 20001204 .word 0x20001204 080036b8 <__sread>: 80036b8: b510 push {r4, lr} 80036ba: 460c mov r4, r1 80036bc: f9b1 100e ldrsh.w r1, [r1, #14] 80036c0: f000 f8a4 bl 800380c <_read_r> 80036c4: 2800 cmp r0, #0 80036c6: bfab itete ge 80036c8: 6d63 ldrge r3, [r4, #84] ; 0x54 80036ca: 89a3 ldrhlt r3, [r4, #12] 80036cc: 181b addge r3, r3, r0 80036ce: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 80036d2: bfac ite ge 80036d4: 6563 strge r3, [r4, #84] ; 0x54 80036d6: 81a3 strhlt r3, [r4, #12] 80036d8: bd10 pop {r4, pc} 080036da <__swrite>: 80036da: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80036de: 461f mov r7, r3 80036e0: 898b ldrh r3, [r1, #12] 80036e2: 4605 mov r5, r0 80036e4: 05db lsls r3, r3, #23 80036e6: 460c mov r4, r1 80036e8: 4616 mov r6, r2 80036ea: d505 bpl.n 80036f8 <__swrite+0x1e> 80036ec: 2302 movs r3, #2 80036ee: 2200 movs r2, #0 80036f0: f9b1 100e ldrsh.w r1, [r1, #14] 80036f4: f000 f868 bl 80037c8 <_lseek_r> 80036f8: 89a3 ldrh r3, [r4, #12] 80036fa: 4632 mov r2, r6 80036fc: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8003700: 81a3 strh r3, [r4, #12] 8003702: f9b4 100e ldrsh.w r1, [r4, #14] 8003706: 463b mov r3, r7 8003708: 4628 mov r0, r5 800370a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800370e: f000 b817 b.w 8003740 <_write_r> 08003712 <__sseek>: 8003712: b510 push {r4, lr} 8003714: 460c mov r4, r1 8003716: f9b1 100e ldrsh.w r1, [r1, #14] 800371a: f000 f855 bl 80037c8 <_lseek_r> 800371e: 1c43 adds r3, r0, #1 8003720: 89a3 ldrh r3, [r4, #12] 8003722: bf15 itete ne 8003724: 6560 strne r0, [r4, #84] ; 0x54 8003726: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800372a: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800372e: 81a3 strheq r3, [r4, #12] 8003730: bf18 it ne 8003732: 81a3 strhne r3, [r4, #12] 8003734: bd10 pop {r4, pc} 08003736 <__sclose>: 8003736: f9b1 100e ldrsh.w r1, [r1, #14] 800373a: f000 b813 b.w 8003764 <_close_r> ... 08003740 <_write_r>: 8003740: b538 push {r3, r4, r5, lr} 8003742: 4605 mov r5, r0 8003744: 4608 mov r0, r1 8003746: 4611 mov r1, r2 8003748: 2200 movs r2, #0 800374a: 4c05 ldr r4, [pc, #20] ; (8003760 <_write_r+0x20>) 800374c: 6022 str r2, [r4, #0] 800374e: 461a mov r2, r3 8003750: f7fe fc76 bl 8002040 <_write> 8003754: 1c43 adds r3, r0, #1 8003756: d102 bne.n 800375e <_write_r+0x1e> 8003758: 6823 ldr r3, [r4, #0] 800375a: b103 cbz r3, 800375e <_write_r+0x1e> 800375c: 602b str r3, [r5, #0] 800375e: bd38 pop {r3, r4, r5, pc} 8003760: 20001204 .word 0x20001204 08003764 <_close_r>: 8003764: b538 push {r3, r4, r5, lr} 8003766: 2300 movs r3, #0 8003768: 4c05 ldr r4, [pc, #20] ; (8003780 <_close_r+0x1c>) 800376a: 4605 mov r5, r0 800376c: 4608 mov r0, r1 800376e: 6023 str r3, [r4, #0] 8003770: f7fe ff0e bl 8002590 <_close> 8003774: 1c43 adds r3, r0, #1 8003776: d102 bne.n 800377e <_close_r+0x1a> 8003778: 6823 ldr r3, [r4, #0] 800377a: b103 cbz r3, 800377e <_close_r+0x1a> 800377c: 602b str r3, [r5, #0] 800377e: bd38 pop {r3, r4, r5, pc} 8003780: 20001204 .word 0x20001204 08003784 <_fstat_r>: 8003784: b538 push {r3, r4, r5, lr} 8003786: 2300 movs r3, #0 8003788: 4c06 ldr r4, [pc, #24] ; (80037a4 <_fstat_r+0x20>) 800378a: 4605 mov r5, r0 800378c: 4608 mov r0, r1 800378e: 4611 mov r1, r2 8003790: 6023 str r3, [r4, #0] 8003792: f7fe ff00 bl 8002596 <_fstat> 8003796: 1c43 adds r3, r0, #1 8003798: d102 bne.n 80037a0 <_fstat_r+0x1c> 800379a: 6823 ldr r3, [r4, #0] 800379c: b103 cbz r3, 80037a0 <_fstat_r+0x1c> 800379e: 602b str r3, [r5, #0] 80037a0: bd38 pop {r3, r4, r5, pc} 80037a2: bf00 nop 80037a4: 20001204 .word 0x20001204 080037a8 <_isatty_r>: 80037a8: b538 push {r3, r4, r5, lr} 80037aa: 2300 movs r3, #0 80037ac: 4c05 ldr r4, [pc, #20] ; (80037c4 <_isatty_r+0x1c>) 80037ae: 4605 mov r5, r0 80037b0: 4608 mov r0, r1 80037b2: 6023 str r3, [r4, #0] 80037b4: f7fe fef4 bl 80025a0 <_isatty> 80037b8: 1c43 adds r3, r0, #1 80037ba: d102 bne.n 80037c2 <_isatty_r+0x1a> 80037bc: 6823 ldr r3, [r4, #0] 80037be: b103 cbz r3, 80037c2 <_isatty_r+0x1a> 80037c0: 602b str r3, [r5, #0] 80037c2: bd38 pop {r3, r4, r5, pc} 80037c4: 20001204 .word 0x20001204 080037c8 <_lseek_r>: 80037c8: b538 push {r3, r4, r5, lr} 80037ca: 4605 mov r5, r0 80037cc: 4608 mov r0, r1 80037ce: 4611 mov r1, r2 80037d0: 2200 movs r2, #0 80037d2: 4c05 ldr r4, [pc, #20] ; (80037e8 <_lseek_r+0x20>) 80037d4: 6022 str r2, [r4, #0] 80037d6: 461a mov r2, r3 80037d8: f7fe fee4 bl 80025a4 <_lseek> 80037dc: 1c43 adds r3, r0, #1 80037de: d102 bne.n 80037e6 <_lseek_r+0x1e> 80037e0: 6823 ldr r3, [r4, #0] 80037e2: b103 cbz r3, 80037e6 <_lseek_r+0x1e> 80037e4: 602b str r3, [r5, #0] 80037e6: bd38 pop {r3, r4, r5, pc} 80037e8: 20001204 .word 0x20001204 080037ec : 80037ec: b510 push {r4, lr} 80037ee: b2c9 uxtb r1, r1 80037f0: 4402 add r2, r0 80037f2: 4290 cmp r0, r2 80037f4: 4603 mov r3, r0 80037f6: d101 bne.n 80037fc 80037f8: 2000 movs r0, #0 80037fa: bd10 pop {r4, pc} 80037fc: 781c ldrb r4, [r3, #0] 80037fe: 3001 adds r0, #1 8003800: 428c cmp r4, r1 8003802: d1f6 bne.n 80037f2 8003804: 4618 mov r0, r3 8003806: bd10 pop {r4, pc} 08003808 <__malloc_lock>: 8003808: 4770 bx lr 0800380a <__malloc_unlock>: 800380a: 4770 bx lr 0800380c <_read_r>: 800380c: b538 push {r3, r4, r5, lr} 800380e: 4605 mov r5, r0 8003810: 4608 mov r0, r1 8003812: 4611 mov r1, r2 8003814: 2200 movs r2, #0 8003816: 4c05 ldr r4, [pc, #20] ; (800382c <_read_r+0x20>) 8003818: 6022 str r2, [r4, #0] 800381a: 461a mov r2, r3 800381c: f7fe fe90 bl 8002540 <_read> 8003820: 1c43 adds r3, r0, #1 8003822: d102 bne.n 800382a <_read_r+0x1e> 8003824: 6823 ldr r3, [r4, #0] 8003826: b103 cbz r3, 800382a <_read_r+0x1e> 8003828: 602b str r3, [r5, #0] 800382a: bd38 pop {r3, r4, r5, pc} 800382c: 20001204 .word 0x20001204 08003830 <_init>: 8003830: b5f8 push {r3, r4, r5, r6, r7, lr} 8003832: bf00 nop 8003834: bcf8 pop {r3, r4, r5, r6, r7} 8003836: bc08 pop {r3} 8003838: 469e mov lr, r3 800383a: 4770 bx lr 0800383c <_fini>: 800383c: b5f8 push {r3, r4, r5, r6, r7, lr} 800383e: bf00 nop 8003840: bcf8 pop {r3, r4, r5, r6, r7} 8003842: bc08 pop {r3} 8003844: 469e mov lr, r3 8003846: 4770 bx lr