STM32F103_ATTEN_PLL_Zig.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08004000 08004000 00004000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00007a54 080041e8 080041e8 000041e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000bb0 0800bc40 0800bc40 0000bc40 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM 00000008 0800c7f0 0800c7f0 0000c7f0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 4 .init_array 00000004 0800c7f8 0800c7f8 0000c7f8 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .fini_array 00000004 0800c7fc 0800c7fc 0000c7fc 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .data 00000404 20000000 0800c800 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .bss 000012fc 20000404 0800cc04 00010404 2**2 ALLOC 8 ._user_heap_stack 00000600 20001700 0800cc04 00011700 2**0 ALLOC 9 .ARM.attributes 00000029 00000000 00000000 00010404 2**0 CONTENTS, READONLY 10 .debug_info 000262f1 00000000 00000000 0001042d 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_abbrev 00004704 00000000 00000000 0003671e 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_loc 00008fdb 00000000 00000000 0003ae22 2**0 CONTENTS, READONLY, DEBUGGING 13 .debug_aranges 00000cb0 00000000 00000000 00043e00 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_ranges 00000ff0 00000000 00000000 00044ab0 2**3 CONTENTS, READONLY, DEBUGGING 15 .debug_line 00008d0f 00000000 00000000 00045aa0 2**0 CONTENTS, READONLY, DEBUGGING 16 .debug_str 0000509d 00000000 00000000 0004e7af 2**0 CONTENTS, READONLY, DEBUGGING 17 .comment 0000007c 00000000 00000000 0005384c 2**0 CONTENTS, READONLY 18 .debug_frame 00003430 00000000 00000000 000538c8 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080041e8 <__do_global_dtors_aux>: 80041e8: b510 push {r4, lr} 80041ea: 4c05 ldr r4, [pc, #20] ; (8004200 <__do_global_dtors_aux+0x18>) 80041ec: 7823 ldrb r3, [r4, #0] 80041ee: b933 cbnz r3, 80041fe <__do_global_dtors_aux+0x16> 80041f0: 4b04 ldr r3, [pc, #16] ; (8004204 <__do_global_dtors_aux+0x1c>) 80041f2: b113 cbz r3, 80041fa <__do_global_dtors_aux+0x12> 80041f4: 4804 ldr r0, [pc, #16] ; (8004208 <__do_global_dtors_aux+0x20>) 80041f6: f3af 8000 nop.w 80041fa: 2301 movs r3, #1 80041fc: 7023 strb r3, [r4, #0] 80041fe: bd10 pop {r4, pc} 8004200: 20000404 .word 0x20000404 8004204: 00000000 .word 0x00000000 8004208: 0800bc24 .word 0x0800bc24 0800420c : 800420c: b508 push {r3, lr} 800420e: 4b03 ldr r3, [pc, #12] ; (800421c ) 8004210: b11b cbz r3, 800421a 8004212: 4903 ldr r1, [pc, #12] ; (8004220 ) 8004214: 4803 ldr r0, [pc, #12] ; (8004224 ) 8004216: f3af 8000 nop.w 800421a: bd08 pop {r3, pc} 800421c: 00000000 .word 0x00000000 8004220: 20000408 .word 0x20000408 8004224: 0800bc24 .word 0x0800bc24 08004228 : 8004228: 4603 mov r3, r0 800422a: f813 2b01 ldrb.w r2, [r3], #1 800422e: 2a00 cmp r2, #0 8004230: d1fb bne.n 800422a 8004232: 1a18 subs r0, r3, r0 8004234: 3801 subs r0, #1 8004236: 4770 bx lr 08004238 <__aeabi_drsub>: 8004238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 800423c: e002 b.n 8004244 <__adddf3> 800423e: bf00 nop 08004240 <__aeabi_dsub>: 8004240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 08004244 <__adddf3>: 8004244: b530 push {r4, r5, lr} 8004246: ea4f 0441 mov.w r4, r1, lsl #1 800424a: ea4f 0543 mov.w r5, r3, lsl #1 800424e: ea94 0f05 teq r4, r5 8004252: bf08 it eq 8004254: ea90 0f02 teqeq r0, r2 8004258: bf1f itttt ne 800425a: ea54 0c00 orrsne.w ip, r4, r0 800425e: ea55 0c02 orrsne.w ip, r5, r2 8004262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8004266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800426a: f000 80e2 beq.w 8004432 <__adddf3+0x1ee> 800426e: ea4f 5454 mov.w r4, r4, lsr #21 8004272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8004276: bfb8 it lt 8004278: 426d neglt r5, r5 800427a: dd0c ble.n 8004296 <__adddf3+0x52> 800427c: 442c add r4, r5 800427e: ea80 0202 eor.w r2, r0, r2 8004282: ea81 0303 eor.w r3, r1, r3 8004286: ea82 0000 eor.w r0, r2, r0 800428a: ea83 0101 eor.w r1, r3, r1 800428e: ea80 0202 eor.w r2, r0, r2 8004292: ea81 0303 eor.w r3, r1, r3 8004296: 2d36 cmp r5, #54 ; 0x36 8004298: bf88 it hi 800429a: bd30 pophi {r4, r5, pc} 800429c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 80042a0: ea4f 3101 mov.w r1, r1, lsl #12 80042a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000 80042a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80042ac: d002 beq.n 80042b4 <__adddf3+0x70> 80042ae: 4240 negs r0, r0 80042b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80042b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 80042b8: ea4f 3303 mov.w r3, r3, lsl #12 80042bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80042c0: d002 beq.n 80042c8 <__adddf3+0x84> 80042c2: 4252 negs r2, r2 80042c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80042c8: ea94 0f05 teq r4, r5 80042cc: f000 80a7 beq.w 800441e <__adddf3+0x1da> 80042d0: f1a4 0401 sub.w r4, r4, #1 80042d4: f1d5 0e20 rsbs lr, r5, #32 80042d8: db0d blt.n 80042f6 <__adddf3+0xb2> 80042da: fa02 fc0e lsl.w ip, r2, lr 80042de: fa22 f205 lsr.w r2, r2, r5 80042e2: 1880 adds r0, r0, r2 80042e4: f141 0100 adc.w r1, r1, #0 80042e8: fa03 f20e lsl.w r2, r3, lr 80042ec: 1880 adds r0, r0, r2 80042ee: fa43 f305 asr.w r3, r3, r5 80042f2: 4159 adcs r1, r3 80042f4: e00e b.n 8004314 <__adddf3+0xd0> 80042f6: f1a5 0520 sub.w r5, r5, #32 80042fa: f10e 0e20 add.w lr, lr, #32 80042fe: 2a01 cmp r2, #1 8004300: fa03 fc0e lsl.w ip, r3, lr 8004304: bf28 it cs 8004306: f04c 0c02 orrcs.w ip, ip, #2 800430a: fa43 f305 asr.w r3, r3, r5 800430e: 18c0 adds r0, r0, r3 8004310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8004314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8004318: d507 bpl.n 800432a <__adddf3+0xe6> 800431a: f04f 0e00 mov.w lr, #0 800431e: f1dc 0c00 rsbs ip, ip, #0 8004322: eb7e 0000 sbcs.w r0, lr, r0 8004326: eb6e 0101 sbc.w r1, lr, r1 800432a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 800432e: d31b bcc.n 8004368 <__adddf3+0x124> 8004330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 8004334: d30c bcc.n 8004350 <__adddf3+0x10c> 8004336: 0849 lsrs r1, r1, #1 8004338: ea5f 0030 movs.w r0, r0, rrx 800433c: ea4f 0c3c mov.w ip, ip, rrx 8004340: f104 0401 add.w r4, r4, #1 8004344: ea4f 5244 mov.w r2, r4, lsl #21 8004348: f512 0f80 cmn.w r2, #4194304 ; 0x400000 800434c: f080 809a bcs.w 8004484 <__adddf3+0x240> 8004350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8004354: bf08 it eq 8004356: ea5f 0c50 movseq.w ip, r0, lsr #1 800435a: f150 0000 adcs.w r0, r0, #0 800435e: eb41 5104 adc.w r1, r1, r4, lsl #20 8004362: ea41 0105 orr.w r1, r1, r5 8004366: bd30 pop {r4, r5, pc} 8004368: ea5f 0c4c movs.w ip, ip, lsl #1 800436c: 4140 adcs r0, r0 800436e: eb41 0101 adc.w r1, r1, r1 8004372: f411 1f80 tst.w r1, #1048576 ; 0x100000 8004376: f1a4 0401 sub.w r4, r4, #1 800437a: d1e9 bne.n 8004350 <__adddf3+0x10c> 800437c: f091 0f00 teq r1, #0 8004380: bf04 itt eq 8004382: 4601 moveq r1, r0 8004384: 2000 moveq r0, #0 8004386: fab1 f381 clz r3, r1 800438a: bf08 it eq 800438c: 3320 addeq r3, #32 800438e: f1a3 030b sub.w r3, r3, #11 8004392: f1b3 0220 subs.w r2, r3, #32 8004396: da0c bge.n 80043b2 <__adddf3+0x16e> 8004398: 320c adds r2, #12 800439a: dd08 ble.n 80043ae <__adddf3+0x16a> 800439c: f102 0c14 add.w ip, r2, #20 80043a0: f1c2 020c rsb r2, r2, #12 80043a4: fa01 f00c lsl.w r0, r1, ip 80043a8: fa21 f102 lsr.w r1, r1, r2 80043ac: e00c b.n 80043c8 <__adddf3+0x184> 80043ae: f102 0214 add.w r2, r2, #20 80043b2: bfd8 it le 80043b4: f1c2 0c20 rsble ip, r2, #32 80043b8: fa01 f102 lsl.w r1, r1, r2 80043bc: fa20 fc0c lsr.w ip, r0, ip 80043c0: bfdc itt le 80043c2: ea41 010c orrle.w r1, r1, ip 80043c6: 4090 lslle r0, r2 80043c8: 1ae4 subs r4, r4, r3 80043ca: bfa2 ittt ge 80043cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80043d0: 4329 orrge r1, r5 80043d2: bd30 popge {r4, r5, pc} 80043d4: ea6f 0404 mvn.w r4, r4 80043d8: 3c1f subs r4, #31 80043da: da1c bge.n 8004416 <__adddf3+0x1d2> 80043dc: 340c adds r4, #12 80043de: dc0e bgt.n 80043fe <__adddf3+0x1ba> 80043e0: f104 0414 add.w r4, r4, #20 80043e4: f1c4 0220 rsb r2, r4, #32 80043e8: fa20 f004 lsr.w r0, r0, r4 80043ec: fa01 f302 lsl.w r3, r1, r2 80043f0: ea40 0003 orr.w r0, r0, r3 80043f4: fa21 f304 lsr.w r3, r1, r4 80043f8: ea45 0103 orr.w r1, r5, r3 80043fc: bd30 pop {r4, r5, pc} 80043fe: f1c4 040c rsb r4, r4, #12 8004402: f1c4 0220 rsb r2, r4, #32 8004406: fa20 f002 lsr.w r0, r0, r2 800440a: fa01 f304 lsl.w r3, r1, r4 800440e: ea40 0003 orr.w r0, r0, r3 8004412: 4629 mov r1, r5 8004414: bd30 pop {r4, r5, pc} 8004416: fa21 f004 lsr.w r0, r1, r4 800441a: 4629 mov r1, r5 800441c: bd30 pop {r4, r5, pc} 800441e: f094 0f00 teq r4, #0 8004422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 8004426: bf06 itte eq 8004428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 800442c: 3401 addeq r4, #1 800442e: 3d01 subne r5, #1 8004430: e74e b.n 80042d0 <__adddf3+0x8c> 8004432: ea7f 5c64 mvns.w ip, r4, asr #21 8004436: bf18 it ne 8004438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800443c: d029 beq.n 8004492 <__adddf3+0x24e> 800443e: ea94 0f05 teq r4, r5 8004442: bf08 it eq 8004444: ea90 0f02 teqeq r0, r2 8004448: d005 beq.n 8004456 <__adddf3+0x212> 800444a: ea54 0c00 orrs.w ip, r4, r0 800444e: bf04 itt eq 8004450: 4619 moveq r1, r3 8004452: 4610 moveq r0, r2 8004454: bd30 pop {r4, r5, pc} 8004456: ea91 0f03 teq r1, r3 800445a: bf1e ittt ne 800445c: 2100 movne r1, #0 800445e: 2000 movne r0, #0 8004460: bd30 popne {r4, r5, pc} 8004462: ea5f 5c54 movs.w ip, r4, lsr #21 8004466: d105 bne.n 8004474 <__adddf3+0x230> 8004468: 0040 lsls r0, r0, #1 800446a: 4149 adcs r1, r1 800446c: bf28 it cs 800446e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 8004472: bd30 pop {r4, r5, pc} 8004474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 8004478: bf3c itt cc 800447a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 800447e: bd30 popcc {r4, r5, pc} 8004480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8004484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 8004488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 800448c: f04f 0000 mov.w r0, #0 8004490: bd30 pop {r4, r5, pc} 8004492: ea7f 5c64 mvns.w ip, r4, asr #21 8004496: bf1a itte ne 8004498: 4619 movne r1, r3 800449a: 4610 movne r0, r2 800449c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80044a0: bf1c itt ne 80044a2: 460b movne r3, r1 80044a4: 4602 movne r2, r0 80044a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80044aa: bf06 itte eq 80044ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80044b0: ea91 0f03 teqeq r1, r3 80044b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 80044b8: bd30 pop {r4, r5, pc} 80044ba: bf00 nop 080044bc <__aeabi_ui2d>: 80044bc: f090 0f00 teq r0, #0 80044c0: bf04 itt eq 80044c2: 2100 moveq r1, #0 80044c4: 4770 bxeq lr 80044c6: b530 push {r4, r5, lr} 80044c8: f44f 6480 mov.w r4, #1024 ; 0x400 80044cc: f104 0432 add.w r4, r4, #50 ; 0x32 80044d0: f04f 0500 mov.w r5, #0 80044d4: f04f 0100 mov.w r1, #0 80044d8: e750 b.n 800437c <__adddf3+0x138> 80044da: bf00 nop 080044dc <__aeabi_i2d>: 80044dc: f090 0f00 teq r0, #0 80044e0: bf04 itt eq 80044e2: 2100 moveq r1, #0 80044e4: 4770 bxeq lr 80044e6: b530 push {r4, r5, lr} 80044e8: f44f 6480 mov.w r4, #1024 ; 0x400 80044ec: f104 0432 add.w r4, r4, #50 ; 0x32 80044f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 80044f4: bf48 it mi 80044f6: 4240 negmi r0, r0 80044f8: f04f 0100 mov.w r1, #0 80044fc: e73e b.n 800437c <__adddf3+0x138> 80044fe: bf00 nop 08004500 <__aeabi_f2d>: 8004500: 0042 lsls r2, r0, #1 8004502: ea4f 01e2 mov.w r1, r2, asr #3 8004506: ea4f 0131 mov.w r1, r1, rrx 800450a: ea4f 7002 mov.w r0, r2, lsl #28 800450e: bf1f itttt ne 8004510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 8004514: f093 4f7f teqne r3, #4278190080 ; 0xff000000 8004518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 800451c: 4770 bxne lr 800451e: f092 0f00 teq r2, #0 8004522: bf14 ite ne 8004524: f093 4f7f teqne r3, #4278190080 ; 0xff000000 8004528: 4770 bxeq lr 800452a: b530 push {r4, r5, lr} 800452c: f44f 7460 mov.w r4, #896 ; 0x380 8004530: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8004534: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 8004538: e720 b.n 800437c <__adddf3+0x138> 800453a: bf00 nop 0800453c <__aeabi_ul2d>: 800453c: ea50 0201 orrs.w r2, r0, r1 8004540: bf08 it eq 8004542: 4770 bxeq lr 8004544: b530 push {r4, r5, lr} 8004546: f04f 0500 mov.w r5, #0 800454a: e00a b.n 8004562 <__aeabi_l2d+0x16> 0800454c <__aeabi_l2d>: 800454c: ea50 0201 orrs.w r2, r0, r1 8004550: bf08 it eq 8004552: 4770 bxeq lr 8004554: b530 push {r4, r5, lr} 8004556: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 800455a: d502 bpl.n 8004562 <__aeabi_l2d+0x16> 800455c: 4240 negs r0, r0 800455e: eb61 0141 sbc.w r1, r1, r1, lsl #1 8004562: f44f 6480 mov.w r4, #1024 ; 0x400 8004566: f104 0432 add.w r4, r4, #50 ; 0x32 800456a: ea5f 5c91 movs.w ip, r1, lsr #22 800456e: f43f aedc beq.w 800432a <__adddf3+0xe6> 8004572: f04f 0203 mov.w r2, #3 8004576: ea5f 0cdc movs.w ip, ip, lsr #3 800457a: bf18 it ne 800457c: 3203 addne r2, #3 800457e: ea5f 0cdc movs.w ip, ip, lsr #3 8004582: bf18 it ne 8004584: 3203 addne r2, #3 8004586: eb02 02dc add.w r2, r2, ip, lsr #3 800458a: f1c2 0320 rsb r3, r2, #32 800458e: fa00 fc03 lsl.w ip, r0, r3 8004592: fa20 f002 lsr.w r0, r0, r2 8004596: fa01 fe03 lsl.w lr, r1, r3 800459a: ea40 000e orr.w r0, r0, lr 800459e: fa21 f102 lsr.w r1, r1, r2 80045a2: 4414 add r4, r2 80045a4: e6c1 b.n 800432a <__adddf3+0xe6> 80045a6: bf00 nop 080045a8 <__aeabi_dmul>: 80045a8: b570 push {r4, r5, r6, lr} 80045aa: f04f 0cff mov.w ip, #255 ; 0xff 80045ae: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 80045b2: ea1c 5411 ands.w r4, ip, r1, lsr #20 80045b6: bf1d ittte ne 80045b8: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80045bc: ea94 0f0c teqne r4, ip 80045c0: ea95 0f0c teqne r5, ip 80045c4: f000 f8de bleq 8004784 <__aeabi_dmul+0x1dc> 80045c8: 442c add r4, r5 80045ca: ea81 0603 eor.w r6, r1, r3 80045ce: ea21 514c bic.w r1, r1, ip, lsl #21 80045d2: ea23 534c bic.w r3, r3, ip, lsl #21 80045d6: ea50 3501 orrs.w r5, r0, r1, lsl #12 80045da: bf18 it ne 80045dc: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80045e0: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 80045e4: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 80045e8: d038 beq.n 800465c <__aeabi_dmul+0xb4> 80045ea: fba0 ce02 umull ip, lr, r0, r2 80045ee: f04f 0500 mov.w r5, #0 80045f2: fbe1 e502 umlal lr, r5, r1, r2 80045f6: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 80045fa: fbe0 e503 umlal lr, r5, r0, r3 80045fe: f04f 0600 mov.w r6, #0 8004602: fbe1 5603 umlal r5, r6, r1, r3 8004606: f09c 0f00 teq ip, #0 800460a: bf18 it ne 800460c: f04e 0e01 orrne.w lr, lr, #1 8004610: f1a4 04ff sub.w r4, r4, #255 ; 0xff 8004614: f5b6 7f00 cmp.w r6, #512 ; 0x200 8004618: f564 7440 sbc.w r4, r4, #768 ; 0x300 800461c: d204 bcs.n 8004628 <__aeabi_dmul+0x80> 800461e: ea5f 0e4e movs.w lr, lr, lsl #1 8004622: 416d adcs r5, r5 8004624: eb46 0606 adc.w r6, r6, r6 8004628: ea42 21c6 orr.w r1, r2, r6, lsl #11 800462c: ea41 5155 orr.w r1, r1, r5, lsr #21 8004630: ea4f 20c5 mov.w r0, r5, lsl #11 8004634: ea40 505e orr.w r0, r0, lr, lsr #21 8004638: ea4f 2ece mov.w lr, lr, lsl #11 800463c: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8004640: bf88 it hi 8004642: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 8004646: d81e bhi.n 8004686 <__aeabi_dmul+0xde> 8004648: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 800464c: bf08 it eq 800464e: ea5f 0e50 movseq.w lr, r0, lsr #1 8004652: f150 0000 adcs.w r0, r0, #0 8004656: eb41 5104 adc.w r1, r1, r4, lsl #20 800465a: bd70 pop {r4, r5, r6, pc} 800465c: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 8004660: ea46 0101 orr.w r1, r6, r1 8004664: ea40 0002 orr.w r0, r0, r2 8004668: ea81 0103 eor.w r1, r1, r3 800466c: ebb4 045c subs.w r4, r4, ip, lsr #1 8004670: bfc2 ittt gt 8004672: ebd4 050c rsbsgt r5, r4, ip 8004676: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800467a: bd70 popgt {r4, r5, r6, pc} 800467c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8004680: f04f 0e00 mov.w lr, #0 8004684: 3c01 subs r4, #1 8004686: f300 80ab bgt.w 80047e0 <__aeabi_dmul+0x238> 800468a: f114 0f36 cmn.w r4, #54 ; 0x36 800468e: bfde ittt le 8004690: 2000 movle r0, #0 8004692: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 8004696: bd70 pople {r4, r5, r6, pc} 8004698: f1c4 0400 rsb r4, r4, #0 800469c: 3c20 subs r4, #32 800469e: da35 bge.n 800470c <__aeabi_dmul+0x164> 80046a0: 340c adds r4, #12 80046a2: dc1b bgt.n 80046dc <__aeabi_dmul+0x134> 80046a4: f104 0414 add.w r4, r4, #20 80046a8: f1c4 0520 rsb r5, r4, #32 80046ac: fa00 f305 lsl.w r3, r0, r5 80046b0: fa20 f004 lsr.w r0, r0, r4 80046b4: fa01 f205 lsl.w r2, r1, r5 80046b8: ea40 0002 orr.w r0, r0, r2 80046bc: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 80046c0: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 80046c4: eb10 70d3 adds.w r0, r0, r3, lsr #31 80046c8: fa21 f604 lsr.w r6, r1, r4 80046cc: eb42 0106 adc.w r1, r2, r6 80046d0: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80046d4: bf08 it eq 80046d6: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80046da: bd70 pop {r4, r5, r6, pc} 80046dc: f1c4 040c rsb r4, r4, #12 80046e0: f1c4 0520 rsb r5, r4, #32 80046e4: fa00 f304 lsl.w r3, r0, r4 80046e8: fa20 f005 lsr.w r0, r0, r5 80046ec: fa01 f204 lsl.w r2, r1, r4 80046f0: ea40 0002 orr.w r0, r0, r2 80046f4: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80046f8: eb10 70d3 adds.w r0, r0, r3, lsr #31 80046fc: f141 0100 adc.w r1, r1, #0 8004700: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8004704: bf08 it eq 8004706: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800470a: bd70 pop {r4, r5, r6, pc} 800470c: f1c4 0520 rsb r5, r4, #32 8004710: fa00 f205 lsl.w r2, r0, r5 8004714: ea4e 0e02 orr.w lr, lr, r2 8004718: fa20 f304 lsr.w r3, r0, r4 800471c: fa01 f205 lsl.w r2, r1, r5 8004720: ea43 0302 orr.w r3, r3, r2 8004724: fa21 f004 lsr.w r0, r1, r4 8004728: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 800472c: fa21 f204 lsr.w r2, r1, r4 8004730: ea20 0002 bic.w r0, r0, r2 8004734: eb00 70d3 add.w r0, r0, r3, lsr #31 8004738: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800473c: bf08 it eq 800473e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8004742: bd70 pop {r4, r5, r6, pc} 8004744: f094 0f00 teq r4, #0 8004748: d10f bne.n 800476a <__aeabi_dmul+0x1c2> 800474a: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 800474e: 0040 lsls r0, r0, #1 8004750: eb41 0101 adc.w r1, r1, r1 8004754: f411 1f80 tst.w r1, #1048576 ; 0x100000 8004758: bf08 it eq 800475a: 3c01 subeq r4, #1 800475c: d0f7 beq.n 800474e <__aeabi_dmul+0x1a6> 800475e: ea41 0106 orr.w r1, r1, r6 8004762: f095 0f00 teq r5, #0 8004766: bf18 it ne 8004768: 4770 bxne lr 800476a: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 800476e: 0052 lsls r2, r2, #1 8004770: eb43 0303 adc.w r3, r3, r3 8004774: f413 1f80 tst.w r3, #1048576 ; 0x100000 8004778: bf08 it eq 800477a: 3d01 subeq r5, #1 800477c: d0f7 beq.n 800476e <__aeabi_dmul+0x1c6> 800477e: ea43 0306 orr.w r3, r3, r6 8004782: 4770 bx lr 8004784: ea94 0f0c teq r4, ip 8004788: ea0c 5513 and.w r5, ip, r3, lsr #20 800478c: bf18 it ne 800478e: ea95 0f0c teqne r5, ip 8004792: d00c beq.n 80047ae <__aeabi_dmul+0x206> 8004794: ea50 0641 orrs.w r6, r0, r1, lsl #1 8004798: bf18 it ne 800479a: ea52 0643 orrsne.w r6, r2, r3, lsl #1 800479e: d1d1 bne.n 8004744 <__aeabi_dmul+0x19c> 80047a0: ea81 0103 eor.w r1, r1, r3 80047a4: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80047a8: f04f 0000 mov.w r0, #0 80047ac: bd70 pop {r4, r5, r6, pc} 80047ae: ea50 0641 orrs.w r6, r0, r1, lsl #1 80047b2: bf06 itte eq 80047b4: 4610 moveq r0, r2 80047b6: 4619 moveq r1, r3 80047b8: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80047bc: d019 beq.n 80047f2 <__aeabi_dmul+0x24a> 80047be: ea94 0f0c teq r4, ip 80047c2: d102 bne.n 80047ca <__aeabi_dmul+0x222> 80047c4: ea50 3601 orrs.w r6, r0, r1, lsl #12 80047c8: d113 bne.n 80047f2 <__aeabi_dmul+0x24a> 80047ca: ea95 0f0c teq r5, ip 80047ce: d105 bne.n 80047dc <__aeabi_dmul+0x234> 80047d0: ea52 3603 orrs.w r6, r2, r3, lsl #12 80047d4: bf1c itt ne 80047d6: 4610 movne r0, r2 80047d8: 4619 movne r1, r3 80047da: d10a bne.n 80047f2 <__aeabi_dmul+0x24a> 80047dc: ea81 0103 eor.w r1, r1, r3 80047e0: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80047e4: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80047e8: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 80047ec: f04f 0000 mov.w r0, #0 80047f0: bd70 pop {r4, r5, r6, pc} 80047f2: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80047f6: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 80047fa: bd70 pop {r4, r5, r6, pc} 080047fc <__aeabi_ddiv>: 80047fc: b570 push {r4, r5, r6, lr} 80047fe: f04f 0cff mov.w ip, #255 ; 0xff 8004802: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 8004806: ea1c 5411 ands.w r4, ip, r1, lsr #20 800480a: bf1d ittte ne 800480c: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8004810: ea94 0f0c teqne r4, ip 8004814: ea95 0f0c teqne r5, ip 8004818: f000 f8a7 bleq 800496a <__aeabi_ddiv+0x16e> 800481c: eba4 0405 sub.w r4, r4, r5 8004820: ea81 0e03 eor.w lr, r1, r3 8004824: ea52 3503 orrs.w r5, r2, r3, lsl #12 8004828: ea4f 3101 mov.w r1, r1, lsl #12 800482c: f000 8088 beq.w 8004940 <__aeabi_ddiv+0x144> 8004830: ea4f 3303 mov.w r3, r3, lsl #12 8004834: f04f 5580 mov.w r5, #268435456 ; 0x10000000 8004838: ea45 1313 orr.w r3, r5, r3, lsr #4 800483c: ea43 6312 orr.w r3, r3, r2, lsr #24 8004840: ea4f 2202 mov.w r2, r2, lsl #8 8004844: ea45 1511 orr.w r5, r5, r1, lsr #4 8004848: ea45 6510 orr.w r5, r5, r0, lsr #24 800484c: ea4f 2600 mov.w r6, r0, lsl #8 8004850: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 8004854: 429d cmp r5, r3 8004856: bf08 it eq 8004858: 4296 cmpeq r6, r2 800485a: f144 04fd adc.w r4, r4, #253 ; 0xfd 800485e: f504 7440 add.w r4, r4, #768 ; 0x300 8004862: d202 bcs.n 800486a <__aeabi_ddiv+0x6e> 8004864: 085b lsrs r3, r3, #1 8004866: ea4f 0232 mov.w r2, r2, rrx 800486a: 1ab6 subs r6, r6, r2 800486c: eb65 0503 sbc.w r5, r5, r3 8004870: 085b lsrs r3, r3, #1 8004872: ea4f 0232 mov.w r2, r2, rrx 8004876: f44f 1080 mov.w r0, #1048576 ; 0x100000 800487a: f44f 2c00 mov.w ip, #524288 ; 0x80000 800487e: ebb6 0e02 subs.w lr, r6, r2 8004882: eb75 0e03 sbcs.w lr, r5, r3 8004886: bf22 ittt cs 8004888: 1ab6 subcs r6, r6, r2 800488a: 4675 movcs r5, lr 800488c: ea40 000c orrcs.w r0, r0, ip 8004890: 085b lsrs r3, r3, #1 8004892: ea4f 0232 mov.w r2, r2, rrx 8004896: ebb6 0e02 subs.w lr, r6, r2 800489a: eb75 0e03 sbcs.w lr, r5, r3 800489e: bf22 ittt cs 80048a0: 1ab6 subcs r6, r6, r2 80048a2: 4675 movcs r5, lr 80048a4: ea40 005c orrcs.w r0, r0, ip, lsr #1 80048a8: 085b lsrs r3, r3, #1 80048aa: ea4f 0232 mov.w r2, r2, rrx 80048ae: ebb6 0e02 subs.w lr, r6, r2 80048b2: eb75 0e03 sbcs.w lr, r5, r3 80048b6: bf22 ittt cs 80048b8: 1ab6 subcs r6, r6, r2 80048ba: 4675 movcs r5, lr 80048bc: ea40 009c orrcs.w r0, r0, ip, lsr #2 80048c0: 085b lsrs r3, r3, #1 80048c2: ea4f 0232 mov.w r2, r2, rrx 80048c6: ebb6 0e02 subs.w lr, r6, r2 80048ca: eb75 0e03 sbcs.w lr, r5, r3 80048ce: bf22 ittt cs 80048d0: 1ab6 subcs r6, r6, r2 80048d2: 4675 movcs r5, lr 80048d4: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80048d8: ea55 0e06 orrs.w lr, r5, r6 80048dc: d018 beq.n 8004910 <__aeabi_ddiv+0x114> 80048de: ea4f 1505 mov.w r5, r5, lsl #4 80048e2: ea45 7516 orr.w r5, r5, r6, lsr #28 80048e6: ea4f 1606 mov.w r6, r6, lsl #4 80048ea: ea4f 03c3 mov.w r3, r3, lsl #3 80048ee: ea43 7352 orr.w r3, r3, r2, lsr #29 80048f2: ea4f 02c2 mov.w r2, r2, lsl #3 80048f6: ea5f 1c1c movs.w ip, ip, lsr #4 80048fa: d1c0 bne.n 800487e <__aeabi_ddiv+0x82> 80048fc: f411 1f80 tst.w r1, #1048576 ; 0x100000 8004900: d10b bne.n 800491a <__aeabi_ddiv+0x11e> 8004902: ea41 0100 orr.w r1, r1, r0 8004906: f04f 0000 mov.w r0, #0 800490a: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 800490e: e7b6 b.n 800487e <__aeabi_ddiv+0x82> 8004910: f411 1f80 tst.w r1, #1048576 ; 0x100000 8004914: bf04 itt eq 8004916: 4301 orreq r1, r0 8004918: 2000 moveq r0, #0 800491a: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 800491e: bf88 it hi 8004920: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 8004924: f63f aeaf bhi.w 8004686 <__aeabi_dmul+0xde> 8004928: ebb5 0c03 subs.w ip, r5, r3 800492c: bf04 itt eq 800492e: ebb6 0c02 subseq.w ip, r6, r2 8004932: ea5f 0c50 movseq.w ip, r0, lsr #1 8004936: f150 0000 adcs.w r0, r0, #0 800493a: eb41 5104 adc.w r1, r1, r4, lsl #20 800493e: bd70 pop {r4, r5, r6, pc} 8004940: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 8004944: ea4e 3111 orr.w r1, lr, r1, lsr #12 8004948: eb14 045c adds.w r4, r4, ip, lsr #1 800494c: bfc2 ittt gt 800494e: ebd4 050c rsbsgt r5, r4, ip 8004952: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8004956: bd70 popgt {r4, r5, r6, pc} 8004958: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 800495c: f04f 0e00 mov.w lr, #0 8004960: 3c01 subs r4, #1 8004962: e690 b.n 8004686 <__aeabi_dmul+0xde> 8004964: ea45 0e06 orr.w lr, r5, r6 8004968: e68d b.n 8004686 <__aeabi_dmul+0xde> 800496a: ea0c 5513 and.w r5, ip, r3, lsr #20 800496e: ea94 0f0c teq r4, ip 8004972: bf08 it eq 8004974: ea95 0f0c teqeq r5, ip 8004978: f43f af3b beq.w 80047f2 <__aeabi_dmul+0x24a> 800497c: ea94 0f0c teq r4, ip 8004980: d10a bne.n 8004998 <__aeabi_ddiv+0x19c> 8004982: ea50 3401 orrs.w r4, r0, r1, lsl #12 8004986: f47f af34 bne.w 80047f2 <__aeabi_dmul+0x24a> 800498a: ea95 0f0c teq r5, ip 800498e: f47f af25 bne.w 80047dc <__aeabi_dmul+0x234> 8004992: 4610 mov r0, r2 8004994: 4619 mov r1, r3 8004996: e72c b.n 80047f2 <__aeabi_dmul+0x24a> 8004998: ea95 0f0c teq r5, ip 800499c: d106 bne.n 80049ac <__aeabi_ddiv+0x1b0> 800499e: ea52 3503 orrs.w r5, r2, r3, lsl #12 80049a2: f43f aefd beq.w 80047a0 <__aeabi_dmul+0x1f8> 80049a6: 4610 mov r0, r2 80049a8: 4619 mov r1, r3 80049aa: e722 b.n 80047f2 <__aeabi_dmul+0x24a> 80049ac: ea50 0641 orrs.w r6, r0, r1, lsl #1 80049b0: bf18 it ne 80049b2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80049b6: f47f aec5 bne.w 8004744 <__aeabi_dmul+0x19c> 80049ba: ea50 0441 orrs.w r4, r0, r1, lsl #1 80049be: f47f af0d bne.w 80047dc <__aeabi_dmul+0x234> 80049c2: ea52 0543 orrs.w r5, r2, r3, lsl #1 80049c6: f47f aeeb bne.w 80047a0 <__aeabi_dmul+0x1f8> 80049ca: e712 b.n 80047f2 <__aeabi_dmul+0x24a> 080049cc <__gedf2>: 80049cc: f04f 3cff mov.w ip, #4294967295 80049d0: e006 b.n 80049e0 <__cmpdf2+0x4> 80049d2: bf00 nop 080049d4 <__ledf2>: 80049d4: f04f 0c01 mov.w ip, #1 80049d8: e002 b.n 80049e0 <__cmpdf2+0x4> 80049da: bf00 nop 080049dc <__cmpdf2>: 80049dc: f04f 0c01 mov.w ip, #1 80049e0: f84d cd04 str.w ip, [sp, #-4]! 80049e4: ea4f 0c41 mov.w ip, r1, lsl #1 80049e8: ea7f 5c6c mvns.w ip, ip, asr #21 80049ec: ea4f 0c43 mov.w ip, r3, lsl #1 80049f0: bf18 it ne 80049f2: ea7f 5c6c mvnsne.w ip, ip, asr #21 80049f6: d01b beq.n 8004a30 <__cmpdf2+0x54> 80049f8: b001 add sp, #4 80049fa: ea50 0c41 orrs.w ip, r0, r1, lsl #1 80049fe: bf0c ite eq 8004a00: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8004a04: ea91 0f03 teqne r1, r3 8004a08: bf02 ittt eq 8004a0a: ea90 0f02 teqeq r0, r2 8004a0e: 2000 moveq r0, #0 8004a10: 4770 bxeq lr 8004a12: f110 0f00 cmn.w r0, #0 8004a16: ea91 0f03 teq r1, r3 8004a1a: bf58 it pl 8004a1c: 4299 cmppl r1, r3 8004a1e: bf08 it eq 8004a20: 4290 cmpeq r0, r2 8004a22: bf2c ite cs 8004a24: 17d8 asrcs r0, r3, #31 8004a26: ea6f 70e3 mvncc.w r0, r3, asr #31 8004a2a: f040 0001 orr.w r0, r0, #1 8004a2e: 4770 bx lr 8004a30: ea4f 0c41 mov.w ip, r1, lsl #1 8004a34: ea7f 5c6c mvns.w ip, ip, asr #21 8004a38: d102 bne.n 8004a40 <__cmpdf2+0x64> 8004a3a: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8004a3e: d107 bne.n 8004a50 <__cmpdf2+0x74> 8004a40: ea4f 0c43 mov.w ip, r3, lsl #1 8004a44: ea7f 5c6c mvns.w ip, ip, asr #21 8004a48: d1d6 bne.n 80049f8 <__cmpdf2+0x1c> 8004a4a: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8004a4e: d0d3 beq.n 80049f8 <__cmpdf2+0x1c> 8004a50: f85d 0b04 ldr.w r0, [sp], #4 8004a54: 4770 bx lr 8004a56: bf00 nop 08004a58 <__aeabi_cdrcmple>: 8004a58: 4684 mov ip, r0 8004a5a: 4610 mov r0, r2 8004a5c: 4662 mov r2, ip 8004a5e: 468c mov ip, r1 8004a60: 4619 mov r1, r3 8004a62: 4663 mov r3, ip 8004a64: e000 b.n 8004a68 <__aeabi_cdcmpeq> 8004a66: bf00 nop 08004a68 <__aeabi_cdcmpeq>: 8004a68: b501 push {r0, lr} 8004a6a: f7ff ffb7 bl 80049dc <__cmpdf2> 8004a6e: 2800 cmp r0, #0 8004a70: bf48 it mi 8004a72: f110 0f00 cmnmi.w r0, #0 8004a76: bd01 pop {r0, pc} 08004a78 <__aeabi_dcmpeq>: 8004a78: f84d ed08 str.w lr, [sp, #-8]! 8004a7c: f7ff fff4 bl 8004a68 <__aeabi_cdcmpeq> 8004a80: bf0c ite eq 8004a82: 2001 moveq r0, #1 8004a84: 2000 movne r0, #0 8004a86: f85d fb08 ldr.w pc, [sp], #8 8004a8a: bf00 nop 08004a8c <__aeabi_dcmplt>: 8004a8c: f84d ed08 str.w lr, [sp, #-8]! 8004a90: f7ff ffea bl 8004a68 <__aeabi_cdcmpeq> 8004a94: bf34 ite cc 8004a96: 2001 movcc r0, #1 8004a98: 2000 movcs r0, #0 8004a9a: f85d fb08 ldr.w pc, [sp], #8 8004a9e: bf00 nop 08004aa0 <__aeabi_dcmple>: 8004aa0: f84d ed08 str.w lr, [sp, #-8]! 8004aa4: f7ff ffe0 bl 8004a68 <__aeabi_cdcmpeq> 8004aa8: bf94 ite ls 8004aaa: 2001 movls r0, #1 8004aac: 2000 movhi r0, #0 8004aae: f85d fb08 ldr.w pc, [sp], #8 8004ab2: bf00 nop 08004ab4 <__aeabi_dcmpge>: 8004ab4: f84d ed08 str.w lr, [sp, #-8]! 8004ab8: f7ff ffce bl 8004a58 <__aeabi_cdrcmple> 8004abc: bf94 ite ls 8004abe: 2001 movls r0, #1 8004ac0: 2000 movhi r0, #0 8004ac2: f85d fb08 ldr.w pc, [sp], #8 8004ac6: bf00 nop 08004ac8 <__aeabi_dcmpgt>: 8004ac8: f84d ed08 str.w lr, [sp, #-8]! 8004acc: f7ff ffc4 bl 8004a58 <__aeabi_cdrcmple> 8004ad0: bf34 ite cc 8004ad2: 2001 movcc r0, #1 8004ad4: 2000 movcs r0, #0 8004ad6: f85d fb08 ldr.w pc, [sp], #8 8004ada: bf00 nop 08004adc <__aeabi_dcmpun>: 8004adc: ea4f 0c41 mov.w ip, r1, lsl #1 8004ae0: ea7f 5c6c mvns.w ip, ip, asr #21 8004ae4: d102 bne.n 8004aec <__aeabi_dcmpun+0x10> 8004ae6: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8004aea: d10a bne.n 8004b02 <__aeabi_dcmpun+0x26> 8004aec: ea4f 0c43 mov.w ip, r3, lsl #1 8004af0: ea7f 5c6c mvns.w ip, ip, asr #21 8004af4: d102 bne.n 8004afc <__aeabi_dcmpun+0x20> 8004af6: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8004afa: d102 bne.n 8004b02 <__aeabi_dcmpun+0x26> 8004afc: f04f 0000 mov.w r0, #0 8004b00: 4770 bx lr 8004b02: f04f 0001 mov.w r0, #1 8004b06: 4770 bx lr 08004b08 <__aeabi_d2iz>: 8004b08: ea4f 0241 mov.w r2, r1, lsl #1 8004b0c: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 8004b10: d215 bcs.n 8004b3e <__aeabi_d2iz+0x36> 8004b12: d511 bpl.n 8004b38 <__aeabi_d2iz+0x30> 8004b14: f46f 7378 mvn.w r3, #992 ; 0x3e0 8004b18: ebb3 5262 subs.w r2, r3, r2, asr #21 8004b1c: d912 bls.n 8004b44 <__aeabi_d2iz+0x3c> 8004b1e: ea4f 23c1 mov.w r3, r1, lsl #11 8004b22: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8004b26: ea43 5350 orr.w r3, r3, r0, lsr #21 8004b2a: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8004b2e: fa23 f002 lsr.w r0, r3, r2 8004b32: bf18 it ne 8004b34: 4240 negne r0, r0 8004b36: 4770 bx lr 8004b38: f04f 0000 mov.w r0, #0 8004b3c: 4770 bx lr 8004b3e: ea50 3001 orrs.w r0, r0, r1, lsl #12 8004b42: d105 bne.n 8004b50 <__aeabi_d2iz+0x48> 8004b44: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000 8004b48: bf08 it eq 8004b4a: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8004b4e: 4770 bx lr 8004b50: f04f 0000 mov.w r0, #0 8004b54: 4770 bx lr 8004b56: bf00 nop 08004b58 <__aeabi_d2uiz>: 8004b58: 004a lsls r2, r1, #1 8004b5a: d211 bcs.n 8004b80 <__aeabi_d2uiz+0x28> 8004b5c: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 8004b60: d211 bcs.n 8004b86 <__aeabi_d2uiz+0x2e> 8004b62: d50d bpl.n 8004b80 <__aeabi_d2uiz+0x28> 8004b64: f46f 7378 mvn.w r3, #992 ; 0x3e0 8004b68: ebb3 5262 subs.w r2, r3, r2, asr #21 8004b6c: d40e bmi.n 8004b8c <__aeabi_d2uiz+0x34> 8004b6e: ea4f 23c1 mov.w r3, r1, lsl #11 8004b72: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8004b76: ea43 5350 orr.w r3, r3, r0, lsr #21 8004b7a: fa23 f002 lsr.w r0, r3, r2 8004b7e: 4770 bx lr 8004b80: f04f 0000 mov.w r0, #0 8004b84: 4770 bx lr 8004b86: ea50 3001 orrs.w r0, r0, r1, lsl #12 8004b8a: d102 bne.n 8004b92 <__aeabi_d2uiz+0x3a> 8004b8c: f04f 30ff mov.w r0, #4294967295 8004b90: 4770 bx lr 8004b92: f04f 0000 mov.w r0, #0 8004b96: 4770 bx lr 08004b98 <__aeabi_d2f>: 8004b98: ea4f 0241 mov.w r2, r1, lsl #1 8004b9c: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000 8004ba0: bf24 itt cs 8004ba2: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000 8004ba6: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000 8004baa: d90d bls.n 8004bc8 <__aeabi_d2f+0x30> 8004bac: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8004bb0: ea4f 02c0 mov.w r2, r0, lsl #3 8004bb4: ea4c 7050 orr.w r0, ip, r0, lsr #29 8004bb8: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000 8004bbc: eb40 0083 adc.w r0, r0, r3, lsl #2 8004bc0: bf08 it eq 8004bc2: f020 0001 biceq.w r0, r0, #1 8004bc6: 4770 bx lr 8004bc8: f011 4f80 tst.w r1, #1073741824 ; 0x40000000 8004bcc: d121 bne.n 8004c12 <__aeabi_d2f+0x7a> 8004bce: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000 8004bd2: bfbc itt lt 8004bd4: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000 8004bd8: 4770 bxlt lr 8004bda: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8004bde: ea4f 5252 mov.w r2, r2, lsr #21 8004be2: f1c2 0218 rsb r2, r2, #24 8004be6: f1c2 0c20 rsb ip, r2, #32 8004bea: fa10 f30c lsls.w r3, r0, ip 8004bee: fa20 f002 lsr.w r0, r0, r2 8004bf2: bf18 it ne 8004bf4: f040 0001 orrne.w r0, r0, #1 8004bf8: ea4f 23c1 mov.w r3, r1, lsl #11 8004bfc: ea4f 23d3 mov.w r3, r3, lsr #11 8004c00: fa03 fc0c lsl.w ip, r3, ip 8004c04: ea40 000c orr.w r0, r0, ip 8004c08: fa23 f302 lsr.w r3, r3, r2 8004c0c: ea4f 0343 mov.w r3, r3, lsl #1 8004c10: e7cc b.n 8004bac <__aeabi_d2f+0x14> 8004c12: ea7f 5362 mvns.w r3, r2, asr #21 8004c16: d107 bne.n 8004c28 <__aeabi_d2f+0x90> 8004c18: ea50 3301 orrs.w r3, r0, r1, lsl #12 8004c1c: bf1e ittt ne 8004c1e: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000 8004c22: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000 8004c26: 4770 bxne lr 8004c28: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000 8004c2c: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8004c30: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004c34: 4770 bx lr 8004c36: bf00 nop 08004c38 <__aeabi_frsub>: 8004c38: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000 8004c3c: e002 b.n 8004c44 <__addsf3> 8004c3e: bf00 nop 08004c40 <__aeabi_fsub>: 8004c40: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 08004c44 <__addsf3>: 8004c44: 0042 lsls r2, r0, #1 8004c46: bf1f itttt ne 8004c48: ea5f 0341 movsne.w r3, r1, lsl #1 8004c4c: ea92 0f03 teqne r2, r3 8004c50: ea7f 6c22 mvnsne.w ip, r2, asr #24 8004c54: ea7f 6c23 mvnsne.w ip, r3, asr #24 8004c58: d06a beq.n 8004d30 <__addsf3+0xec> 8004c5a: ea4f 6212 mov.w r2, r2, lsr #24 8004c5e: ebd2 6313 rsbs r3, r2, r3, lsr #24 8004c62: bfc1 itttt gt 8004c64: 18d2 addgt r2, r2, r3 8004c66: 4041 eorgt r1, r0 8004c68: 4048 eorgt r0, r1 8004c6a: 4041 eorgt r1, r0 8004c6c: bfb8 it lt 8004c6e: 425b neglt r3, r3 8004c70: 2b19 cmp r3, #25 8004c72: bf88 it hi 8004c74: 4770 bxhi lr 8004c76: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 8004c7a: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004c7e: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000 8004c82: bf18 it ne 8004c84: 4240 negne r0, r0 8004c86: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8004c8a: f441 0100 orr.w r1, r1, #8388608 ; 0x800000 8004c8e: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000 8004c92: bf18 it ne 8004c94: 4249 negne r1, r1 8004c96: ea92 0f03 teq r2, r3 8004c9a: d03f beq.n 8004d1c <__addsf3+0xd8> 8004c9c: f1a2 0201 sub.w r2, r2, #1 8004ca0: fa41 fc03 asr.w ip, r1, r3 8004ca4: eb10 000c adds.w r0, r0, ip 8004ca8: f1c3 0320 rsb r3, r3, #32 8004cac: fa01 f103 lsl.w r1, r1, r3 8004cb0: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8004cb4: d502 bpl.n 8004cbc <__addsf3+0x78> 8004cb6: 4249 negs r1, r1 8004cb8: eb60 0040 sbc.w r0, r0, r0, lsl #1 8004cbc: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000 8004cc0: d313 bcc.n 8004cea <__addsf3+0xa6> 8004cc2: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8004cc6: d306 bcc.n 8004cd6 <__addsf3+0x92> 8004cc8: 0840 lsrs r0, r0, #1 8004cca: ea4f 0131 mov.w r1, r1, rrx 8004cce: f102 0201 add.w r2, r2, #1 8004cd2: 2afe cmp r2, #254 ; 0xfe 8004cd4: d251 bcs.n 8004d7a <__addsf3+0x136> 8004cd6: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000 8004cda: eb40 50c2 adc.w r0, r0, r2, lsl #23 8004cde: bf08 it eq 8004ce0: f020 0001 biceq.w r0, r0, #1 8004ce4: ea40 0003 orr.w r0, r0, r3 8004ce8: 4770 bx lr 8004cea: 0049 lsls r1, r1, #1 8004cec: eb40 0000 adc.w r0, r0, r0 8004cf0: f410 0f00 tst.w r0, #8388608 ; 0x800000 8004cf4: f1a2 0201 sub.w r2, r2, #1 8004cf8: d1ed bne.n 8004cd6 <__addsf3+0x92> 8004cfa: fab0 fc80 clz ip, r0 8004cfe: f1ac 0c08 sub.w ip, ip, #8 8004d02: ebb2 020c subs.w r2, r2, ip 8004d06: fa00 f00c lsl.w r0, r0, ip 8004d0a: bfaa itet ge 8004d0c: eb00 50c2 addge.w r0, r0, r2, lsl #23 8004d10: 4252 neglt r2, r2 8004d12: 4318 orrge r0, r3 8004d14: bfbc itt lt 8004d16: 40d0 lsrlt r0, r2 8004d18: 4318 orrlt r0, r3 8004d1a: 4770 bx lr 8004d1c: f092 0f00 teq r2, #0 8004d20: f481 0100 eor.w r1, r1, #8388608 ; 0x800000 8004d24: bf06 itte eq 8004d26: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000 8004d2a: 3201 addeq r2, #1 8004d2c: 3b01 subne r3, #1 8004d2e: e7b5 b.n 8004c9c <__addsf3+0x58> 8004d30: ea4f 0341 mov.w r3, r1, lsl #1 8004d34: ea7f 6c22 mvns.w ip, r2, asr #24 8004d38: bf18 it ne 8004d3a: ea7f 6c23 mvnsne.w ip, r3, asr #24 8004d3e: d021 beq.n 8004d84 <__addsf3+0x140> 8004d40: ea92 0f03 teq r2, r3 8004d44: d004 beq.n 8004d50 <__addsf3+0x10c> 8004d46: f092 0f00 teq r2, #0 8004d4a: bf08 it eq 8004d4c: 4608 moveq r0, r1 8004d4e: 4770 bx lr 8004d50: ea90 0f01 teq r0, r1 8004d54: bf1c itt ne 8004d56: 2000 movne r0, #0 8004d58: 4770 bxne lr 8004d5a: f012 4f7f tst.w r2, #4278190080 ; 0xff000000 8004d5e: d104 bne.n 8004d6a <__addsf3+0x126> 8004d60: 0040 lsls r0, r0, #1 8004d62: bf28 it cs 8004d64: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000 8004d68: 4770 bx lr 8004d6a: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000 8004d6e: bf3c itt cc 8004d70: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000 8004d74: 4770 bxcc lr 8004d76: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8004d7a: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000 8004d7e: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004d82: 4770 bx lr 8004d84: ea7f 6222 mvns.w r2, r2, asr #24 8004d88: bf16 itet ne 8004d8a: 4608 movne r0, r1 8004d8c: ea7f 6323 mvnseq.w r3, r3, asr #24 8004d90: 4601 movne r1, r0 8004d92: 0242 lsls r2, r0, #9 8004d94: bf06 itte eq 8004d96: ea5f 2341 movseq.w r3, r1, lsl #9 8004d9a: ea90 0f01 teqeq r0, r1 8004d9e: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000 8004da2: 4770 bx lr 08004da4 <__aeabi_ui2f>: 8004da4: f04f 0300 mov.w r3, #0 8004da8: e004 b.n 8004db4 <__aeabi_i2f+0x8> 8004daa: bf00 nop 08004dac <__aeabi_i2f>: 8004dac: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000 8004db0: bf48 it mi 8004db2: 4240 negmi r0, r0 8004db4: ea5f 0c00 movs.w ip, r0 8004db8: bf08 it eq 8004dba: 4770 bxeq lr 8004dbc: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000 8004dc0: 4601 mov r1, r0 8004dc2: f04f 0000 mov.w r0, #0 8004dc6: e01c b.n 8004e02 <__aeabi_l2f+0x2a> 08004dc8 <__aeabi_ul2f>: 8004dc8: ea50 0201 orrs.w r2, r0, r1 8004dcc: bf08 it eq 8004dce: 4770 bxeq lr 8004dd0: f04f 0300 mov.w r3, #0 8004dd4: e00a b.n 8004dec <__aeabi_l2f+0x14> 8004dd6: bf00 nop 08004dd8 <__aeabi_l2f>: 8004dd8: ea50 0201 orrs.w r2, r0, r1 8004ddc: bf08 it eq 8004dde: 4770 bxeq lr 8004de0: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000 8004de4: d502 bpl.n 8004dec <__aeabi_l2f+0x14> 8004de6: 4240 negs r0, r0 8004de8: eb61 0141 sbc.w r1, r1, r1, lsl #1 8004dec: ea5f 0c01 movs.w ip, r1 8004df0: bf02 ittt eq 8004df2: 4684 moveq ip, r0 8004df4: 4601 moveq r1, r0 8004df6: 2000 moveq r0, #0 8004df8: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000 8004dfc: bf08 it eq 8004dfe: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000 8004e02: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000 8004e06: fabc f28c clz r2, ip 8004e0a: 3a08 subs r2, #8 8004e0c: eba3 53c2 sub.w r3, r3, r2, lsl #23 8004e10: db10 blt.n 8004e34 <__aeabi_l2f+0x5c> 8004e12: fa01 fc02 lsl.w ip, r1, r2 8004e16: 4463 add r3, ip 8004e18: fa00 fc02 lsl.w ip, r0, r2 8004e1c: f1c2 0220 rsb r2, r2, #32 8004e20: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8004e24: fa20 f202 lsr.w r2, r0, r2 8004e28: eb43 0002 adc.w r0, r3, r2 8004e2c: bf08 it eq 8004e2e: f020 0001 biceq.w r0, r0, #1 8004e32: 4770 bx lr 8004e34: f102 0220 add.w r2, r2, #32 8004e38: fa01 fc02 lsl.w ip, r1, r2 8004e3c: f1c2 0220 rsb r2, r2, #32 8004e40: ea50 004c orrs.w r0, r0, ip, lsl #1 8004e44: fa21 f202 lsr.w r2, r1, r2 8004e48: eb43 0002 adc.w r0, r3, r2 8004e4c: bf08 it eq 8004e4e: ea20 70dc biceq.w r0, r0, ip, lsr #31 8004e52: 4770 bx lr 08004e54 <__aeabi_fmul>: 8004e54: f04f 0cff mov.w ip, #255 ; 0xff 8004e58: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8004e5c: bf1e ittt ne 8004e5e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8004e62: ea92 0f0c teqne r2, ip 8004e66: ea93 0f0c teqne r3, ip 8004e6a: d06f beq.n 8004f4c <__aeabi_fmul+0xf8> 8004e6c: 441a add r2, r3 8004e6e: ea80 0c01 eor.w ip, r0, r1 8004e72: 0240 lsls r0, r0, #9 8004e74: bf18 it ne 8004e76: ea5f 2141 movsne.w r1, r1, lsl #9 8004e7a: d01e beq.n 8004eba <__aeabi_fmul+0x66> 8004e7c: f04f 6300 mov.w r3, #134217728 ; 0x8000000 8004e80: ea43 1050 orr.w r0, r3, r0, lsr #5 8004e84: ea43 1151 orr.w r1, r3, r1, lsr #5 8004e88: fba0 3101 umull r3, r1, r0, r1 8004e8c: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8004e90: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000 8004e94: bf3e ittt cc 8004e96: 0049 lslcc r1, r1, #1 8004e98: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8004e9c: 005b lslcc r3, r3, #1 8004e9e: ea40 0001 orr.w r0, r0, r1 8004ea2: f162 027f sbc.w r2, r2, #127 ; 0x7f 8004ea6: 2afd cmp r2, #253 ; 0xfd 8004ea8: d81d bhi.n 8004ee6 <__aeabi_fmul+0x92> 8004eaa: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 8004eae: eb40 50c2 adc.w r0, r0, r2, lsl #23 8004eb2: bf08 it eq 8004eb4: f020 0001 biceq.w r0, r0, #1 8004eb8: 4770 bx lr 8004eba: f090 0f00 teq r0, #0 8004ebe: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8004ec2: bf08 it eq 8004ec4: 0249 lsleq r1, r1, #9 8004ec6: ea4c 2050 orr.w r0, ip, r0, lsr #9 8004eca: ea40 2051 orr.w r0, r0, r1, lsr #9 8004ece: 3a7f subs r2, #127 ; 0x7f 8004ed0: bfc2 ittt gt 8004ed2: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 8004ed6: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8004eda: 4770 bxgt lr 8004edc: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004ee0: f04f 0300 mov.w r3, #0 8004ee4: 3a01 subs r2, #1 8004ee6: dc5d bgt.n 8004fa4 <__aeabi_fmul+0x150> 8004ee8: f112 0f19 cmn.w r2, #25 8004eec: bfdc itt le 8004eee: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000 8004ef2: 4770 bxle lr 8004ef4: f1c2 0200 rsb r2, r2, #0 8004ef8: 0041 lsls r1, r0, #1 8004efa: fa21 f102 lsr.w r1, r1, r2 8004efe: f1c2 0220 rsb r2, r2, #32 8004f02: fa00 fc02 lsl.w ip, r0, r2 8004f06: ea5f 0031 movs.w r0, r1, rrx 8004f0a: f140 0000 adc.w r0, r0, #0 8004f0e: ea53 034c orrs.w r3, r3, ip, lsl #1 8004f12: bf08 it eq 8004f14: ea20 70dc biceq.w r0, r0, ip, lsr #31 8004f18: 4770 bx lr 8004f1a: f092 0f00 teq r2, #0 8004f1e: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8004f22: bf02 ittt eq 8004f24: 0040 lsleq r0, r0, #1 8004f26: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 8004f2a: 3a01 subeq r2, #1 8004f2c: d0f9 beq.n 8004f22 <__aeabi_fmul+0xce> 8004f2e: ea40 000c orr.w r0, r0, ip 8004f32: f093 0f00 teq r3, #0 8004f36: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8004f3a: bf02 ittt eq 8004f3c: 0049 lsleq r1, r1, #1 8004f3e: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8004f42: 3b01 subeq r3, #1 8004f44: d0f9 beq.n 8004f3a <__aeabi_fmul+0xe6> 8004f46: ea41 010c orr.w r1, r1, ip 8004f4a: e78f b.n 8004e6c <__aeabi_fmul+0x18> 8004f4c: ea0c 53d1 and.w r3, ip, r1, lsr #23 8004f50: ea92 0f0c teq r2, ip 8004f54: bf18 it ne 8004f56: ea93 0f0c teqne r3, ip 8004f5a: d00a beq.n 8004f72 <__aeabi_fmul+0x11e> 8004f5c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 8004f60: bf18 it ne 8004f62: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 8004f66: d1d8 bne.n 8004f1a <__aeabi_fmul+0xc6> 8004f68: ea80 0001 eor.w r0, r0, r1 8004f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8004f70: 4770 bx lr 8004f72: f090 0f00 teq r0, #0 8004f76: bf17 itett ne 8004f78: f090 4f00 teqne r0, #2147483648 ; 0x80000000 8004f7c: 4608 moveq r0, r1 8004f7e: f091 0f00 teqne r1, #0 8004f82: f091 4f00 teqne r1, #2147483648 ; 0x80000000 8004f86: d014 beq.n 8004fb2 <__aeabi_fmul+0x15e> 8004f88: ea92 0f0c teq r2, ip 8004f8c: d101 bne.n 8004f92 <__aeabi_fmul+0x13e> 8004f8e: 0242 lsls r2, r0, #9 8004f90: d10f bne.n 8004fb2 <__aeabi_fmul+0x15e> 8004f92: ea93 0f0c teq r3, ip 8004f96: d103 bne.n 8004fa0 <__aeabi_fmul+0x14c> 8004f98: 024b lsls r3, r1, #9 8004f9a: bf18 it ne 8004f9c: 4608 movne r0, r1 8004f9e: d108 bne.n 8004fb2 <__aeabi_fmul+0x15e> 8004fa0: ea80 0001 eor.w r0, r0, r1 8004fa4: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8004fa8: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8004fac: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8004fb0: 4770 bx lr 8004fb2: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8004fb6: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000 8004fba: 4770 bx lr 08004fbc <__aeabi_fdiv>: 8004fbc: f04f 0cff mov.w ip, #255 ; 0xff 8004fc0: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8004fc4: bf1e ittt ne 8004fc6: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8004fca: ea92 0f0c teqne r2, ip 8004fce: ea93 0f0c teqne r3, ip 8004fd2: d069 beq.n 80050a8 <__aeabi_fdiv+0xec> 8004fd4: eba2 0203 sub.w r2, r2, r3 8004fd8: ea80 0c01 eor.w ip, r0, r1 8004fdc: 0249 lsls r1, r1, #9 8004fde: ea4f 2040 mov.w r0, r0, lsl #9 8004fe2: d037 beq.n 8005054 <__aeabi_fdiv+0x98> 8004fe4: f04f 5380 mov.w r3, #268435456 ; 0x10000000 8004fe8: ea43 1111 orr.w r1, r3, r1, lsr #4 8004fec: ea43 1310 orr.w r3, r3, r0, lsr #4 8004ff0: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8004ff4: 428b cmp r3, r1 8004ff6: bf38 it cc 8004ff8: 005b lslcc r3, r3, #1 8004ffa: f142 027d adc.w r2, r2, #125 ; 0x7d 8004ffe: f44f 0c00 mov.w ip, #8388608 ; 0x800000 8005002: 428b cmp r3, r1 8005004: bf24 itt cs 8005006: 1a5b subcs r3, r3, r1 8005008: ea40 000c orrcs.w r0, r0, ip 800500c: ebb3 0f51 cmp.w r3, r1, lsr #1 8005010: bf24 itt cs 8005012: eba3 0351 subcs.w r3, r3, r1, lsr #1 8005016: ea40 005c orrcs.w r0, r0, ip, lsr #1 800501a: ebb3 0f91 cmp.w r3, r1, lsr #2 800501e: bf24 itt cs 8005020: eba3 0391 subcs.w r3, r3, r1, lsr #2 8005024: ea40 009c orrcs.w r0, r0, ip, lsr #2 8005028: ebb3 0fd1 cmp.w r3, r1, lsr #3 800502c: bf24 itt cs 800502e: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8005032: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8005036: 011b lsls r3, r3, #4 8005038: bf18 it ne 800503a: ea5f 1c1c movsne.w ip, ip, lsr #4 800503e: d1e0 bne.n 8005002 <__aeabi_fdiv+0x46> 8005040: 2afd cmp r2, #253 ; 0xfd 8005042: f63f af50 bhi.w 8004ee6 <__aeabi_fmul+0x92> 8005046: 428b cmp r3, r1 8005048: eb40 50c2 adc.w r0, r0, r2, lsl #23 800504c: bf08 it eq 800504e: f020 0001 biceq.w r0, r0, #1 8005052: 4770 bx lr 8005054: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8005058: ea4c 2050 orr.w r0, ip, r0, lsr #9 800505c: 327f adds r2, #127 ; 0x7f 800505e: bfc2 ittt gt 8005060: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 8005064: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8005068: 4770 bxgt lr 800506a: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 800506e: f04f 0300 mov.w r3, #0 8005072: 3a01 subs r2, #1 8005074: e737 b.n 8004ee6 <__aeabi_fmul+0x92> 8005076: f092 0f00 teq r2, #0 800507a: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 800507e: bf02 ittt eq 8005080: 0040 lsleq r0, r0, #1 8005082: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 8005086: 3a01 subeq r2, #1 8005088: d0f9 beq.n 800507e <__aeabi_fdiv+0xc2> 800508a: ea40 000c orr.w r0, r0, ip 800508e: f093 0f00 teq r3, #0 8005092: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8005096: bf02 ittt eq 8005098: 0049 lsleq r1, r1, #1 800509a: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 800509e: 3b01 subeq r3, #1 80050a0: d0f9 beq.n 8005096 <__aeabi_fdiv+0xda> 80050a2: ea41 010c orr.w r1, r1, ip 80050a6: e795 b.n 8004fd4 <__aeabi_fdiv+0x18> 80050a8: ea0c 53d1 and.w r3, ip, r1, lsr #23 80050ac: ea92 0f0c teq r2, ip 80050b0: d108 bne.n 80050c4 <__aeabi_fdiv+0x108> 80050b2: 0242 lsls r2, r0, #9 80050b4: f47f af7d bne.w 8004fb2 <__aeabi_fmul+0x15e> 80050b8: ea93 0f0c teq r3, ip 80050bc: f47f af70 bne.w 8004fa0 <__aeabi_fmul+0x14c> 80050c0: 4608 mov r0, r1 80050c2: e776 b.n 8004fb2 <__aeabi_fmul+0x15e> 80050c4: ea93 0f0c teq r3, ip 80050c8: d104 bne.n 80050d4 <__aeabi_fdiv+0x118> 80050ca: 024b lsls r3, r1, #9 80050cc: f43f af4c beq.w 8004f68 <__aeabi_fmul+0x114> 80050d0: 4608 mov r0, r1 80050d2: e76e b.n 8004fb2 <__aeabi_fmul+0x15e> 80050d4: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 80050d8: bf18 it ne 80050da: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 80050de: d1ca bne.n 8005076 <__aeabi_fdiv+0xba> 80050e0: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000 80050e4: f47f af5c bne.w 8004fa0 <__aeabi_fmul+0x14c> 80050e8: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000 80050ec: f47f af3c bne.w 8004f68 <__aeabi_fmul+0x114> 80050f0: e75f b.n 8004fb2 <__aeabi_fmul+0x15e> 80050f2: bf00 nop 080050f4 <__aeabi_f2uiz>: 80050f4: 0042 lsls r2, r0, #1 80050f6: d20e bcs.n 8005116 <__aeabi_f2uiz+0x22> 80050f8: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000 80050fc: d30b bcc.n 8005116 <__aeabi_f2uiz+0x22> 80050fe: f04f 039e mov.w r3, #158 ; 0x9e 8005102: ebb3 6212 subs.w r2, r3, r2, lsr #24 8005106: d409 bmi.n 800511c <__aeabi_f2uiz+0x28> 8005108: ea4f 2300 mov.w r3, r0, lsl #8 800510c: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8005110: fa23 f002 lsr.w r0, r3, r2 8005114: 4770 bx lr 8005116: f04f 0000 mov.w r0, #0 800511a: 4770 bx lr 800511c: f112 0f61 cmn.w r2, #97 ; 0x61 8005120: d101 bne.n 8005126 <__aeabi_f2uiz+0x32> 8005122: 0242 lsls r2, r0, #9 8005124: d102 bne.n 800512c <__aeabi_f2uiz+0x38> 8005126: f04f 30ff mov.w r0, #4294967295 800512a: 4770 bx lr 800512c: f04f 0000 mov.w r0, #0 8005130: 4770 bx lr 8005132: bf00 nop 08005134 <__aeabi_uldivmod>: 8005134: b953 cbnz r3, 800514c <__aeabi_uldivmod+0x18> 8005136: b94a cbnz r2, 800514c <__aeabi_uldivmod+0x18> 8005138: 2900 cmp r1, #0 800513a: bf08 it eq 800513c: 2800 cmpeq r0, #0 800513e: bf1c itt ne 8005140: f04f 31ff movne.w r1, #4294967295 8005144: f04f 30ff movne.w r0, #4294967295 8005148: f000 b97a b.w 8005440 <__aeabi_idiv0> 800514c: f1ad 0c08 sub.w ip, sp, #8 8005150: e96d ce04 strd ip, lr, [sp, #-16]! 8005154: f000 f806 bl 8005164 <__udivmoddi4> 8005158: f8dd e004 ldr.w lr, [sp, #4] 800515c: e9dd 2302 ldrd r2, r3, [sp, #8] 8005160: b004 add sp, #16 8005162: 4770 bx lr 08005164 <__udivmoddi4>: 8005164: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8005168: 468c mov ip, r1 800516a: 460e mov r6, r1 800516c: 4604 mov r4, r0 800516e: 9d08 ldr r5, [sp, #32] 8005170: 2b00 cmp r3, #0 8005172: d150 bne.n 8005216 <__udivmoddi4+0xb2> 8005174: 428a cmp r2, r1 8005176: 4617 mov r7, r2 8005178: d96c bls.n 8005254 <__udivmoddi4+0xf0> 800517a: fab2 fe82 clz lr, r2 800517e: f1be 0f00 cmp.w lr, #0 8005182: d00b beq.n 800519c <__udivmoddi4+0x38> 8005184: f1ce 0c20 rsb ip, lr, #32 8005188: fa01 f60e lsl.w r6, r1, lr 800518c: fa20 fc0c lsr.w ip, r0, ip 8005190: fa02 f70e lsl.w r7, r2, lr 8005194: ea4c 0c06 orr.w ip, ip, r6 8005198: fa00 f40e lsl.w r4, r0, lr 800519c: 0c3a lsrs r2, r7, #16 800519e: fbbc f9f2 udiv r9, ip, r2 80051a2: b2bb uxth r3, r7 80051a4: fb02 cc19 mls ip, r2, r9, ip 80051a8: fb09 fa03 mul.w sl, r9, r3 80051ac: ea4f 4814 mov.w r8, r4, lsr #16 80051b0: ea48 460c orr.w r6, r8, ip, lsl #16 80051b4: 45b2 cmp sl, r6 80051b6: d90a bls.n 80051ce <__udivmoddi4+0x6a> 80051b8: 19f6 adds r6, r6, r7 80051ba: f109 31ff add.w r1, r9, #4294967295 80051be: f080 8125 bcs.w 800540c <__udivmoddi4+0x2a8> 80051c2: 45b2 cmp sl, r6 80051c4: f240 8122 bls.w 800540c <__udivmoddi4+0x2a8> 80051c8: f1a9 0902 sub.w r9, r9, #2 80051cc: 443e add r6, r7 80051ce: eba6 060a sub.w r6, r6, sl 80051d2: fbb6 f0f2 udiv r0, r6, r2 80051d6: fb02 6610 mls r6, r2, r0, r6 80051da: fb00 f303 mul.w r3, r0, r3 80051de: b2a4 uxth r4, r4 80051e0: ea44 4406 orr.w r4, r4, r6, lsl #16 80051e4: 42a3 cmp r3, r4 80051e6: d909 bls.n 80051fc <__udivmoddi4+0x98> 80051e8: 19e4 adds r4, r4, r7 80051ea: f100 32ff add.w r2, r0, #4294967295 80051ee: f080 810b bcs.w 8005408 <__udivmoddi4+0x2a4> 80051f2: 42a3 cmp r3, r4 80051f4: f240 8108 bls.w 8005408 <__udivmoddi4+0x2a4> 80051f8: 3802 subs r0, #2 80051fa: 443c add r4, r7 80051fc: 2100 movs r1, #0 80051fe: 1ae4 subs r4, r4, r3 8005200: ea40 4009 orr.w r0, r0, r9, lsl #16 8005204: 2d00 cmp r5, #0 8005206: d062 beq.n 80052ce <__udivmoddi4+0x16a> 8005208: 2300 movs r3, #0 800520a: fa24 f40e lsr.w r4, r4, lr 800520e: 602c str r4, [r5, #0] 8005210: 606b str r3, [r5, #4] 8005212: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8005216: 428b cmp r3, r1 8005218: d907 bls.n 800522a <__udivmoddi4+0xc6> 800521a: 2d00 cmp r5, #0 800521c: d055 beq.n 80052ca <__udivmoddi4+0x166> 800521e: 2100 movs r1, #0 8005220: e885 0041 stmia.w r5, {r0, r6} 8005224: 4608 mov r0, r1 8005226: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800522a: fab3 f183 clz r1, r3 800522e: 2900 cmp r1, #0 8005230: f040 808f bne.w 8005352 <__udivmoddi4+0x1ee> 8005234: 42b3 cmp r3, r6 8005236: d302 bcc.n 800523e <__udivmoddi4+0xda> 8005238: 4282 cmp r2, r0 800523a: f200 80fc bhi.w 8005436 <__udivmoddi4+0x2d2> 800523e: 1a84 subs r4, r0, r2 8005240: eb66 0603 sbc.w r6, r6, r3 8005244: 2001 movs r0, #1 8005246: 46b4 mov ip, r6 8005248: 2d00 cmp r5, #0 800524a: d040 beq.n 80052ce <__udivmoddi4+0x16a> 800524c: e885 1010 stmia.w r5, {r4, ip} 8005250: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8005254: b912 cbnz r2, 800525c <__udivmoddi4+0xf8> 8005256: 2701 movs r7, #1 8005258: fbb7 f7f2 udiv r7, r7, r2 800525c: fab7 fe87 clz lr, r7 8005260: f1be 0f00 cmp.w lr, #0 8005264: d135 bne.n 80052d2 <__udivmoddi4+0x16e> 8005266: 2101 movs r1, #1 8005268: 1bf6 subs r6, r6, r7 800526a: ea4f 4c17 mov.w ip, r7, lsr #16 800526e: fa1f f887 uxth.w r8, r7 8005272: fbb6 f2fc udiv r2, r6, ip 8005276: fb0c 6612 mls r6, ip, r2, r6 800527a: fb08 f002 mul.w r0, r8, r2 800527e: 0c23 lsrs r3, r4, #16 8005280: ea43 4606 orr.w r6, r3, r6, lsl #16 8005284: 42b0 cmp r0, r6 8005286: d907 bls.n 8005298 <__udivmoddi4+0x134> 8005288: 19f6 adds r6, r6, r7 800528a: f102 33ff add.w r3, r2, #4294967295 800528e: d202 bcs.n 8005296 <__udivmoddi4+0x132> 8005290: 42b0 cmp r0, r6 8005292: f200 80d2 bhi.w 800543a <__udivmoddi4+0x2d6> 8005296: 461a mov r2, r3 8005298: 1a36 subs r6, r6, r0 800529a: fbb6 f0fc udiv r0, r6, ip 800529e: fb0c 6610 mls r6, ip, r0, r6 80052a2: fb08 f800 mul.w r8, r8, r0 80052a6: b2a3 uxth r3, r4 80052a8: ea43 4406 orr.w r4, r3, r6, lsl #16 80052ac: 45a0 cmp r8, r4 80052ae: d907 bls.n 80052c0 <__udivmoddi4+0x15c> 80052b0: 19e4 adds r4, r4, r7 80052b2: f100 33ff add.w r3, r0, #4294967295 80052b6: d202 bcs.n 80052be <__udivmoddi4+0x15a> 80052b8: 45a0 cmp r8, r4 80052ba: f200 80b9 bhi.w 8005430 <__udivmoddi4+0x2cc> 80052be: 4618 mov r0, r3 80052c0: eba4 0408 sub.w r4, r4, r8 80052c4: ea40 4002 orr.w r0, r0, r2, lsl #16 80052c8: e79c b.n 8005204 <__udivmoddi4+0xa0> 80052ca: 4629 mov r1, r5 80052cc: 4628 mov r0, r5 80052ce: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80052d2: fa07 f70e lsl.w r7, r7, lr 80052d6: f1ce 0320 rsb r3, lr, #32 80052da: fa26 f203 lsr.w r2, r6, r3 80052de: ea4f 4c17 mov.w ip, r7, lsr #16 80052e2: fbb2 f1fc udiv r1, r2, ip 80052e6: fa1f f887 uxth.w r8, r7 80052ea: fb0c 2211 mls r2, ip, r1, r2 80052ee: fa06 f60e lsl.w r6, r6, lr 80052f2: fa20 f303 lsr.w r3, r0, r3 80052f6: fb01 f908 mul.w r9, r1, r8 80052fa: 4333 orrs r3, r6 80052fc: 0c1e lsrs r6, r3, #16 80052fe: ea46 4602 orr.w r6, r6, r2, lsl #16 8005302: 45b1 cmp r9, r6 8005304: fa00 f40e lsl.w r4, r0, lr 8005308: d909 bls.n 800531e <__udivmoddi4+0x1ba> 800530a: 19f6 adds r6, r6, r7 800530c: f101 32ff add.w r2, r1, #4294967295 8005310: f080 808c bcs.w 800542c <__udivmoddi4+0x2c8> 8005314: 45b1 cmp r9, r6 8005316: f240 8089 bls.w 800542c <__udivmoddi4+0x2c8> 800531a: 3902 subs r1, #2 800531c: 443e add r6, r7 800531e: eba6 0609 sub.w r6, r6, r9 8005322: fbb6 f0fc udiv r0, r6, ip 8005326: fb0c 6210 mls r2, ip, r0, r6 800532a: fb00 f908 mul.w r9, r0, r8 800532e: b29e uxth r6, r3 8005330: ea46 4602 orr.w r6, r6, r2, lsl #16 8005334: 45b1 cmp r9, r6 8005336: d907 bls.n 8005348 <__udivmoddi4+0x1e4> 8005338: 19f6 adds r6, r6, r7 800533a: f100 33ff add.w r3, r0, #4294967295 800533e: d271 bcs.n 8005424 <__udivmoddi4+0x2c0> 8005340: 45b1 cmp r9, r6 8005342: d96f bls.n 8005424 <__udivmoddi4+0x2c0> 8005344: 3802 subs r0, #2 8005346: 443e add r6, r7 8005348: eba6 0609 sub.w r6, r6, r9 800534c: ea40 4101 orr.w r1, r0, r1, lsl #16 8005350: e78f b.n 8005272 <__udivmoddi4+0x10e> 8005352: f1c1 0720 rsb r7, r1, #32 8005356: fa22 f807 lsr.w r8, r2, r7 800535a: 408b lsls r3, r1 800535c: ea48 0303 orr.w r3, r8, r3 8005360: fa26 f407 lsr.w r4, r6, r7 8005364: ea4f 4e13 mov.w lr, r3, lsr #16 8005368: fbb4 f9fe udiv r9, r4, lr 800536c: fa1f fc83 uxth.w ip, r3 8005370: fb0e 4419 mls r4, lr, r9, r4 8005374: 408e lsls r6, r1 8005376: fa20 f807 lsr.w r8, r0, r7 800537a: fb09 fa0c mul.w sl, r9, ip 800537e: ea48 0806 orr.w r8, r8, r6 8005382: ea4f 4618 mov.w r6, r8, lsr #16 8005386: ea46 4404 orr.w r4, r6, r4, lsl #16 800538a: 45a2 cmp sl, r4 800538c: fa02 f201 lsl.w r2, r2, r1 8005390: fa00 f601 lsl.w r6, r0, r1 8005394: d908 bls.n 80053a8 <__udivmoddi4+0x244> 8005396: 18e4 adds r4, r4, r3 8005398: f109 30ff add.w r0, r9, #4294967295 800539c: d244 bcs.n 8005428 <__udivmoddi4+0x2c4> 800539e: 45a2 cmp sl, r4 80053a0: d942 bls.n 8005428 <__udivmoddi4+0x2c4> 80053a2: f1a9 0902 sub.w r9, r9, #2 80053a6: 441c add r4, r3 80053a8: eba4 040a sub.w r4, r4, sl 80053ac: fbb4 f0fe udiv r0, r4, lr 80053b0: fb0e 4410 mls r4, lr, r0, r4 80053b4: fb00 fc0c mul.w ip, r0, ip 80053b8: fa1f f888 uxth.w r8, r8 80053bc: ea48 4404 orr.w r4, r8, r4, lsl #16 80053c0: 45a4 cmp ip, r4 80053c2: d907 bls.n 80053d4 <__udivmoddi4+0x270> 80053c4: 18e4 adds r4, r4, r3 80053c6: f100 3eff add.w lr, r0, #4294967295 80053ca: d229 bcs.n 8005420 <__udivmoddi4+0x2bc> 80053cc: 45a4 cmp ip, r4 80053ce: d927 bls.n 8005420 <__udivmoddi4+0x2bc> 80053d0: 3802 subs r0, #2 80053d2: 441c add r4, r3 80053d4: ea40 4009 orr.w r0, r0, r9, lsl #16 80053d8: fba0 8902 umull r8, r9, r0, r2 80053dc: eba4 0c0c sub.w ip, r4, ip 80053e0: 45cc cmp ip, r9 80053e2: 46c2 mov sl, r8 80053e4: 46ce mov lr, r9 80053e6: d315 bcc.n 8005414 <__udivmoddi4+0x2b0> 80053e8: d012 beq.n 8005410 <__udivmoddi4+0x2ac> 80053ea: b155 cbz r5, 8005402 <__udivmoddi4+0x29e> 80053ec: ebb6 030a subs.w r3, r6, sl 80053f0: eb6c 060e sbc.w r6, ip, lr 80053f4: fa06 f707 lsl.w r7, r6, r7 80053f8: 40cb lsrs r3, r1 80053fa: 431f orrs r7, r3 80053fc: 40ce lsrs r6, r1 80053fe: 602f str r7, [r5, #0] 8005400: 606e str r6, [r5, #4] 8005402: 2100 movs r1, #0 8005404: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8005408: 4610 mov r0, r2 800540a: e6f7 b.n 80051fc <__udivmoddi4+0x98> 800540c: 4689 mov r9, r1 800540e: e6de b.n 80051ce <__udivmoddi4+0x6a> 8005410: 4546 cmp r6, r8 8005412: d2ea bcs.n 80053ea <__udivmoddi4+0x286> 8005414: ebb8 0a02 subs.w sl, r8, r2 8005418: eb69 0e03 sbc.w lr, r9, r3 800541c: 3801 subs r0, #1 800541e: e7e4 b.n 80053ea <__udivmoddi4+0x286> 8005420: 4670 mov r0, lr 8005422: e7d7 b.n 80053d4 <__udivmoddi4+0x270> 8005424: 4618 mov r0, r3 8005426: e78f b.n 8005348 <__udivmoddi4+0x1e4> 8005428: 4681 mov r9, r0 800542a: e7bd b.n 80053a8 <__udivmoddi4+0x244> 800542c: 4611 mov r1, r2 800542e: e776 b.n 800531e <__udivmoddi4+0x1ba> 8005430: 3802 subs r0, #2 8005432: 443c add r4, r7 8005434: e744 b.n 80052c0 <__udivmoddi4+0x15c> 8005436: 4608 mov r0, r1 8005438: e706 b.n 8005248 <__udivmoddi4+0xe4> 800543a: 3a02 subs r2, #2 800543c: 443e add r6, r7 800543e: e72b b.n 8005298 <__udivmoddi4+0x134> 08005440 <__aeabi_idiv0>: 8005440: 4770 bx lr 8005442: bf00 nop 08005444 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8005444: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8005446: 4b0e ldr r3, [pc, #56] ; (8005480 ) { 8005448: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800544a: 7818 ldrb r0, [r3, #0] 800544c: f44f 737a mov.w r3, #1000 ; 0x3e8 8005450: fbb3 f3f0 udiv r3, r3, r0 8005454: 4a0b ldr r2, [pc, #44] ; (8005484 ) 8005456: 6810 ldr r0, [r2, #0] 8005458: fbb0 f0f3 udiv r0, r0, r3 800545c: f000 fb38 bl 8005ad0 8005460: 4604 mov r4, r0 8005462: b958 cbnz r0, 800547c { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8005464: 2d0f cmp r5, #15 8005466: d809 bhi.n 800547c { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8005468: 4602 mov r2, r0 800546a: 4629 mov r1, r5 800546c: f04f 30ff mov.w r0, #4294967295 8005470: f000 faee bl 8005a50 uwTickPrio = TickPriority; 8005474: 4b04 ldr r3, [pc, #16] ; (8005488 ) 8005476: 4620 mov r0, r4 8005478: 601d str r5, [r3, #0] 800547a: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 800547c: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 800547e: bd38 pop {r3, r4, r5, pc} 8005480: 20000000 .word 0x20000000 8005484: 20000200 .word 0x20000200 8005488: 20000004 .word 0x20000004 0800548c : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800548c: 4a07 ldr r2, [pc, #28] ; (80054ac ) { 800548e: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8005490: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8005492: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8005494: f043 0310 orr.w r3, r3, #16 8005498: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800549a: f000 fac7 bl 8005a2c HAL_InitTick(TICK_INT_PRIORITY); 800549e: 2000 movs r0, #0 80054a0: f7ff ffd0 bl 8005444 HAL_MspInit(); 80054a4: f003 f872 bl 800858c } 80054a8: 2000 movs r0, #0 80054aa: bd08 pop {r3, pc} 80054ac: 40022000 .word 0x40022000 080054b0 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80054b0: 4a03 ldr r2, [pc, #12] ; (80054c0 ) 80054b2: 4b04 ldr r3, [pc, #16] ; (80054c4 ) 80054b4: 6811 ldr r1, [r2, #0] 80054b6: 781b ldrb r3, [r3, #0] 80054b8: 440b add r3, r1 80054ba: 6013 str r3, [r2, #0] 80054bc: 4770 bx lr 80054be: bf00 nop 80054c0: 2000043c .word 0x2000043c 80054c4: 20000000 .word 0x20000000 080054c8 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80054c8: 4b01 ldr r3, [pc, #4] ; (80054d0 ) 80054ca: 6818 ldr r0, [r3, #0] } 80054cc: 4770 bx lr 80054ce: bf00 nop 80054d0: 2000043c .word 0x2000043c 080054d4 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80054d4: b538 push {r3, r4, r5, lr} 80054d6: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80054d8: f7ff fff6 bl 80054c8 80054dc: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80054de: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80054e0: bf1e ittt ne 80054e2: 4b04 ldrne r3, [pc, #16] ; (80054f4 ) 80054e4: 781b ldrbne r3, [r3, #0] 80054e6: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80054e8: f7ff ffee bl 80054c8 80054ec: 1b40 subs r0, r0, r5 80054ee: 4284 cmp r4, r0 80054f0: d8fa bhi.n 80054e8 { } } 80054f2: bd38 pop {r3, r4, r5, pc} 80054f4: 20000000 .word 0x20000000 080054f8 : 80054f8: 4770 bx lr 080054fa : * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80054fa: 6a43 ldr r3, [r0, #36] ; 0x24 { 80054fc: b510 push {r4, lr} /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 80054fe: 6a9a ldr r2, [r3, #40] ; 0x28 8005500: f012 0f50 tst.w r2, #80 ; 0x50 8005504: d11b bne.n 800553e { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 8005506: 6a9a ldr r2, [r3, #40] ; 0x28 8005508: f442 7200 orr.w r2, r2, #512 ; 0x200 800550c: 629a str r2, [r3, #40] ; 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 800550e: 681a ldr r2, [r3, #0] 8005510: 6892 ldr r2, [r2, #8] 8005512: f402 2260 and.w r2, r2, #917504 ; 0xe0000 8005516: f5b2 2f60 cmp.w r2, #917504 ; 0xe0000 800551a: d10c bne.n 8005536 800551c: 68da ldr r2, [r3, #12] 800551e: b952 cbnz r2, 8005536 (hadc->Init.ContinuousConvMode == DISABLE) ) { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 8005520: 6a9a ldr r2, [r3, #40] ; 0x28 8005522: f422 7280 bic.w r2, r2, #256 ; 0x100 8005526: 629a str r2, [r3, #40] ; 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005528: 6a9a ldr r2, [r3, #40] ; 0x28 800552a: 04d2 lsls r2, r2, #19 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 800552c: bf5e ittt pl 800552e: 6a9a ldrpl r2, [r3, #40] ; 0x28 8005530: f042 0201 orrpl.w r2, r2, #1 8005534: 629a strpl r2, [r3, #40] ; 0x28 } } /* Conversion complete callback */ HAL_ADC_ConvCpltCallback(hadc); 8005536: 4618 mov r0, r3 8005538: f7ff ffde bl 80054f8 800553c: bd10 pop {r4, pc} } else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); 800553e: 6a1b ldr r3, [r3, #32] } } 8005540: e8bd 4010 ldmia.w sp!, {r4, lr} hadc->DMA_Handle->XferErrorCallback(hdma); 8005544: 6b1b ldr r3, [r3, #48] ; 0x30 8005546: 4718 bx r3 08005548 : 8005548: 4770 bx lr 0800554a : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 800554a: b508 push {r3, lr} /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; /* Half conversion callback */ HAL_ADC_ConvHalfCpltCallback(hadc); 800554c: 6a40 ldr r0, [r0, #36] ; 0x24 800554e: f7ff fffb bl 8005548 8005552: bd08 pop {r3, pc} 08005554 : { 8005554: 4770 bx lr 08005556 : * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005556: 6a40 ldr r0, [r0, #36] ; 0x24 { 8005558: b508 push {r3, lr} /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 800555a: 6a83 ldr r3, [r0, #40] ; 0x28 800555c: f043 0340 orr.w r3, r3, #64 ; 0x40 8005560: 6283 str r3, [r0, #40] ; 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 8005562: 6ac3 ldr r3, [r0, #44] ; 0x2c 8005564: f043 0304 orr.w r3, r3, #4 8005568: 62c3 str r3, [r0, #44] ; 0x2c /* Error callback */ HAL_ADC_ErrorCallback(hadc); 800556a: f7ff fff3 bl 8005554 800556e: bd08 pop {r3, pc} 08005570 : __IO uint32_t wait_loop_index = 0U; 8005570: 2300 movs r3, #0 { 8005572: b573 push {r0, r1, r4, r5, r6, lr} __IO uint32_t wait_loop_index = 0U; 8005574: 9301 str r3, [sp, #4] __HAL_LOCK(hadc); 8005576: f890 3024 ldrb.w r3, [r0, #36] ; 0x24 800557a: 2b01 cmp r3, #1 800557c: d074 beq.n 8005668 800557e: 2301 movs r3, #1 if (sConfig->Rank < 7U) 8005580: 684d ldr r5, [r1, #4] __HAL_LOCK(hadc); 8005582: f880 3024 strb.w r3, [r0, #36] ; 0x24 if (sConfig->Rank < 7U) 8005586: 2d06 cmp r5, #6 8005588: 6802 ldr r2, [r0, #0] 800558a: ea4f 0385 mov.w r3, r5, lsl #2 800558e: 680c ldr r4, [r1, #0] 8005590: d825 bhi.n 80055de MODIFY_REG(hadc->Instance->SQR3 , 8005592: 442b add r3, r5 8005594: 251f movs r5, #31 8005596: 6b56 ldr r6, [r2, #52] ; 0x34 8005598: 3b05 subs r3, #5 800559a: 409d lsls r5, r3 800559c: ea26 0505 bic.w r5, r6, r5 80055a0: fa04 f303 lsl.w r3, r4, r3 80055a4: 432b orrs r3, r5 80055a6: 6353 str r3, [r2, #52] ; 0x34 if (sConfig->Channel >= ADC_CHANNEL_10) 80055a8: 2c09 cmp r4, #9 80055aa: ea4f 0344 mov.w r3, r4, lsl #1 80055ae: 688d ldr r5, [r1, #8] 80055b0: d92f bls.n 8005612 MODIFY_REG(hadc->Instance->SMPR1 , 80055b2: 2607 movs r6, #7 80055b4: 4423 add r3, r4 80055b6: 68d1 ldr r1, [r2, #12] 80055b8: 3b1e subs r3, #30 80055ba: 409e lsls r6, r3 80055bc: ea21 0106 bic.w r1, r1, r6 80055c0: fa05 f303 lsl.w r3, r5, r3 80055c4: 430b orrs r3, r1 80055c6: 60d3 str r3, [r2, #12] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 80055c8: f1a4 0310 sub.w r3, r4, #16 80055cc: 2b01 cmp r3, #1 80055ce: d92b bls.n 8005628 HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80055d0: 2300 movs r3, #0 __HAL_UNLOCK(hadc); 80055d2: 2200 movs r2, #0 80055d4: f880 2024 strb.w r2, [r0, #36] ; 0x24 } 80055d8: 4618 mov r0, r3 80055da: b002 add sp, #8 80055dc: bd70 pop {r4, r5, r6, pc} else if (sConfig->Rank < 13U) 80055de: 2d0c cmp r5, #12 80055e0: d80b bhi.n 80055fa MODIFY_REG(hadc->Instance->SQR2 , 80055e2: 442b add r3, r5 80055e4: 251f movs r5, #31 80055e6: 6b16 ldr r6, [r2, #48] ; 0x30 80055e8: 3b23 subs r3, #35 ; 0x23 80055ea: 409d lsls r5, r3 80055ec: ea26 0505 bic.w r5, r6, r5 80055f0: fa04 f303 lsl.w r3, r4, r3 80055f4: 432b orrs r3, r5 80055f6: 6313 str r3, [r2, #48] ; 0x30 80055f8: e7d6 b.n 80055a8 MODIFY_REG(hadc->Instance->SQR1 , 80055fa: 442b add r3, r5 80055fc: 251f movs r5, #31 80055fe: 6ad6 ldr r6, [r2, #44] ; 0x2c 8005600: 3b41 subs r3, #65 ; 0x41 8005602: 409d lsls r5, r3 8005604: ea26 0505 bic.w r5, r6, r5 8005608: fa04 f303 lsl.w r3, r4, r3 800560c: 432b orrs r3, r5 800560e: 62d3 str r3, [r2, #44] ; 0x2c 8005610: e7ca b.n 80055a8 MODIFY_REG(hadc->Instance->SMPR2 , 8005612: 2607 movs r6, #7 8005614: 6911 ldr r1, [r2, #16] 8005616: 4423 add r3, r4 8005618: 409e lsls r6, r3 800561a: ea21 0106 bic.w r1, r1, r6 800561e: fa05 f303 lsl.w r3, r5, r3 8005622: 430b orrs r3, r1 8005624: 6113 str r3, [r2, #16] 8005626: e7cf b.n 80055c8 if (hadc->Instance == ADC1) 8005628: 4b10 ldr r3, [pc, #64] ; (800566c ) 800562a: 429a cmp r2, r3 800562c: d116 bne.n 800565c if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800562e: 6893 ldr r3, [r2, #8] 8005630: 021b lsls r3, r3, #8 8005632: d4cd bmi.n 80055d0 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8005634: 6893 ldr r3, [r2, #8] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) 8005636: 2c10 cmp r4, #16 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8005638: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 800563c: 6093 str r3, [r2, #8] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) 800563e: d1c7 bne.n 80055d0 wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8005640: 4b0b ldr r3, [pc, #44] ; (8005670 ) 8005642: 4a0c ldr r2, [pc, #48] ; (8005674 ) 8005644: 681b ldr r3, [r3, #0] 8005646: fbb3 f2f2 udiv r2, r3, r2 800564a: 230a movs r3, #10 800564c: 4353 muls r3, r2 wait_loop_index--; 800564e: 9301 str r3, [sp, #4] while(wait_loop_index != 0U) 8005650: 9b01 ldr r3, [sp, #4] 8005652: 2b00 cmp r3, #0 8005654: d0bc beq.n 80055d0 wait_loop_index--; 8005656: 9b01 ldr r3, [sp, #4] 8005658: 3b01 subs r3, #1 800565a: e7f8 b.n 800564e SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800565c: 6a83 ldr r3, [r0, #40] ; 0x28 800565e: f043 0320 orr.w r3, r3, #32 8005662: 6283 str r3, [r0, #40] ; 0x28 tmp_hal_status = HAL_ERROR; 8005664: 2301 movs r3, #1 8005666: e7b4 b.n 80055d2 __HAL_LOCK(hadc); 8005668: 2302 movs r3, #2 800566a: e7b5 b.n 80055d8 800566c: 40012400 .word 0x40012400 8005670: 20000200 .word 0x20000200 8005674: 000f4240 .word 0x000f4240 08005678 : __IO uint32_t wait_loop_index = 0U; 8005678: 2300 movs r3, #0 { 800567a: b573 push {r0, r1, r4, r5, r6, lr} __IO uint32_t wait_loop_index = 0U; 800567c: 9301 str r3, [sp, #4] if (ADC_IS_ENABLE(hadc) == RESET) 800567e: 6803 ldr r3, [r0, #0] { 8005680: 4604 mov r4, r0 if (ADC_IS_ENABLE(hadc) == RESET) 8005682: 689a ldr r2, [r3, #8] 8005684: 07d2 lsls r2, r2, #31 8005686: d502 bpl.n 800568e return HAL_OK; 8005688: 2000 movs r0, #0 } 800568a: b002 add sp, #8 800568c: bd70 pop {r4, r5, r6, pc} __HAL_ADC_ENABLE(hadc); 800568e: 689a ldr r2, [r3, #8] 8005690: f042 0201 orr.w r2, r2, #1 8005694: 609a str r2, [r3, #8] wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 8005696: 4b12 ldr r3, [pc, #72] ; (80056e0 ) 8005698: 4a12 ldr r2, [pc, #72] ; (80056e4 ) 800569a: 681b ldr r3, [r3, #0] 800569c: fbb3 f3f2 udiv r3, r3, r2 wait_loop_index--; 80056a0: 9301 str r3, [sp, #4] while(wait_loop_index != 0U) 80056a2: 9b01 ldr r3, [sp, #4] 80056a4: b9c3 cbnz r3, 80056d8 tickstart = HAL_GetTick(); 80056a6: f7ff ff0f bl 80054c8 80056aa: 4606 mov r6, r0 while(ADC_IS_ENABLE(hadc) == RESET) 80056ac: 6823 ldr r3, [r4, #0] 80056ae: 689d ldr r5, [r3, #8] 80056b0: f015 0501 ands.w r5, r5, #1 80056b4: d1e8 bne.n 8005688 if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 80056b6: f7ff ff07 bl 80054c8 80056ba: 1b80 subs r0, r0, r6 80056bc: 2802 cmp r0, #2 80056be: d9f5 bls.n 80056ac SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80056c0: 6aa3 ldr r3, [r4, #40] ; 0x28 __HAL_UNLOCK(hadc); 80056c2: f884 5024 strb.w r5, [r4, #36] ; 0x24 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80056c6: f043 0310 orr.w r3, r3, #16 80056ca: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80056cc: 6ae3 ldr r3, [r4, #44] ; 0x2c __HAL_UNLOCK(hadc); 80056ce: 2001 movs r0, #1 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80056d0: f043 0301 orr.w r3, r3, #1 80056d4: 62e3 str r3, [r4, #44] ; 0x2c 80056d6: e7d8 b.n 800568a wait_loop_index--; 80056d8: 9b01 ldr r3, [sp, #4] 80056da: 3b01 subs r3, #1 80056dc: e7e0 b.n 80056a0 80056de: bf00 nop 80056e0: 20000200 .word 0x20000200 80056e4: 000f4240 .word 0x000f4240 080056e8 : { 80056e8: e92d 41d8 stmdb sp!, {r3, r4, r6, r7, r8, lr} 80056ec: 4690 mov r8, r2 if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80056ee: 4b40 ldr r3, [pc, #256] ; (80057f0 ) 80056f0: 6802 ldr r2, [r0, #0] { 80056f2: 4604 mov r4, r0 if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80056f4: 429a cmp r2, r3 { 80056f6: 460f mov r7, r1 if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80056f8: d002 beq.n 8005700 80056fa: 493e ldr r1, [pc, #248] ; (80057f4 ) 80056fc: 428a cmp r2, r1 80056fe: d103 bne.n 8005708 8005700: 685b ldr r3, [r3, #4] 8005702: f413 2f70 tst.w r3, #983040 ; 0xf0000 8005706: d16e bne.n 80057e6 __HAL_LOCK(hadc); 8005708: f894 3024 ldrb.w r3, [r4, #36] ; 0x24 800570c: 2b01 cmp r3, #1 800570e: d06c beq.n 80057ea 8005710: 2301 movs r3, #1 tmp_hal_status = ADC_Enable(hadc); 8005712: 4620 mov r0, r4 __HAL_LOCK(hadc); 8005714: f884 3024 strb.w r3, [r4, #36] ; 0x24 tmp_hal_status = ADC_Enable(hadc); 8005718: f7ff ffae bl 8005678 if (tmp_hal_status == HAL_OK) 800571c: 4606 mov r6, r0 800571e: 2800 cmp r0, #0 8005720: d15d bne.n 80057de ADC_STATE_CLR_SET(hadc->State, 8005722: 6aa0 ldr r0, [r4, #40] ; 0x28 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8005724: 6821 ldr r1, [r4, #0] ADC_STATE_CLR_SET(hadc->State, 8005726: f420 6070 bic.w r0, r0, #3840 ; 0xf00 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800572a: 4b32 ldr r3, [pc, #200] ; (80057f4 ) ADC_STATE_CLR_SET(hadc->State, 800572c: f020 0001 bic.w r0, r0, #1 8005730: f440 7080 orr.w r0, r0, #256 ; 0x100 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8005734: 4299 cmp r1, r3 ADC_STATE_CLR_SET(hadc->State, 8005736: 62a0 str r0, [r4, #40] ; 0x28 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8005738: d104 bne.n 8005744 800573a: 4a2d ldr r2, [pc, #180] ; (80057f0 ) 800573c: 6853 ldr r3, [r2, #4] 800573e: f413 2f70 tst.w r3, #983040 ; 0xf0000 8005742: d13e bne.n 80057c2 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8005744: 6aa3 ldr r3, [r4, #40] ; 0x28 8005746: f423 1380 bic.w r3, r3, #1048576 ; 0x100000 800574a: 62a3 str r3, [r4, #40] ; 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800574c: 684b ldr r3, [r1, #4] 800574e: 055a lsls r2, r3, #21 8005750: d505 bpl.n 800575e ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8005752: 6aa3 ldr r3, [r4, #40] ; 0x28 8005754: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8005758: f443 5380 orr.w r3, r3, #4096 ; 0x1000 800575c: 62a3 str r3, [r4, #40] ; 0x28 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 800575e: 6aa3 ldr r3, [r4, #40] ; 0x28 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 8005760: 6a20 ldr r0, [r4, #32] if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005762: f413 5380 ands.w r3, r3, #4096 ; 0x1000 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 8005766: bf18 it ne 8005768: 6ae3 ldrne r3, [r4, #44] ; 0x2c HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 800576a: 463a mov r2, r7 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800576c: bf18 it ne 800576e: f023 0306 bicne.w r3, r3, #6 ADC_CLEAR_ERRORCODE(hadc); 8005772: 62e3 str r3, [r4, #44] ; 0x2c __HAL_UNLOCK(hadc); 8005774: 2300 movs r3, #0 8005776: f884 3024 strb.w r3, [r4, #36] ; 0x24 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 800577a: 4b1f ldr r3, [pc, #124] ; (80057f8 ) HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 800577c: 314c adds r1, #76 ; 0x4c hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 800577e: 6283 str r3, [r0, #40] ; 0x28 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 8005780: 4b1e ldr r3, [pc, #120] ; (80057fc ) 8005782: 62c3 str r3, [r0, #44] ; 0x2c hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 8005784: 4b1e ldr r3, [pc, #120] ; (8005800 ) 8005786: 6303 str r3, [r0, #48] ; 0x30 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 8005788: f06f 0302 mvn.w r3, #2 800578c: f841 3c4c str.w r3, [r1, #-76] SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 8005790: f851 3c44 ldr.w r3, [r1, #-68] 8005794: f443 7380 orr.w r3, r3, #256 ; 0x100 8005798: f841 3c44 str.w r3, [r1, #-68] HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 800579c: 4643 mov r3, r8 800579e: f000 f9ed bl 8005b7c if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 80057a2: 6823 ldr r3, [r4, #0] 80057a4: 689a ldr r2, [r3, #8] 80057a6: f402 2260 and.w r2, r2, #917504 ; 0xe0000 80057aa: f5b2 2f60 cmp.w r2, #917504 ; 0xe0000 SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 80057ae: 689a ldr r2, [r3, #8] 80057b0: bf0c ite eq 80057b2: f442 02a0 orreq.w r2, r2, #5242880 ; 0x500000 SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 80057b6: f442 1280 orrne.w r2, r2, #1048576 ; 0x100000 80057ba: 609a str r2, [r3, #8] } 80057bc: 4630 mov r0, r6 80057be: e8bd 81d8 ldmia.w sp!, {r3, r4, r6, r7, r8, pc} SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 80057c2: 6aa3 ldr r3, [r4, #40] ; 0x28 80057c4: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 80057c8: 62a3 str r3, [r4, #40] ; 0x28 if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 80057ca: 6853 ldr r3, [r2, #4] 80057cc: 055b lsls r3, r3, #21 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 80057ce: bf41 itttt mi 80057d0: 6aa0 ldrmi r0, [r4, #40] ; 0x28 80057d2: f420 5040 bicmi.w r0, r0, #12288 ; 0x3000 80057d6: f440 5080 orrmi.w r0, r0, #4096 ; 0x1000 80057da: 62a0 strmi r0, [r4, #40] ; 0x28 80057dc: e7bf b.n 800575e __HAL_UNLOCK(hadc); 80057de: 2300 movs r3, #0 80057e0: f884 3024 strb.w r3, [r4, #36] ; 0x24 80057e4: e7ea b.n 80057bc tmp_hal_status = HAL_ERROR; 80057e6: 2601 movs r6, #1 80057e8: e7e8 b.n 80057bc __HAL_LOCK(hadc); 80057ea: 2602 movs r6, #2 80057ec: e7e6 b.n 80057bc 80057ee: bf00 nop 80057f0: 40012400 .word 0x40012400 80057f4: 40012800 .word 0x40012800 80057f8: 080054fb .word 0x080054fb 80057fc: 0800554b .word 0x0800554b 8005800: 08005557 .word 0x08005557 08005804 : { 8005804: b538 push {r3, r4, r5, lr} if (ADC_IS_ENABLE(hadc) != RESET) 8005806: 6803 ldr r3, [r0, #0] { 8005808: 4604 mov r4, r0 if (ADC_IS_ENABLE(hadc) != RESET) 800580a: 689a ldr r2, [r3, #8] 800580c: 07d2 lsls r2, r2, #31 800580e: d401 bmi.n 8005814 return HAL_OK; 8005810: 2000 movs r0, #0 8005812: bd38 pop {r3, r4, r5, pc} __HAL_ADC_DISABLE(hadc); 8005814: 689a ldr r2, [r3, #8] 8005816: f022 0201 bic.w r2, r2, #1 800581a: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800581c: f7ff fe54 bl 80054c8 8005820: 4605 mov r5, r0 while(ADC_IS_ENABLE(hadc) != RESET) 8005822: 6823 ldr r3, [r4, #0] 8005824: 689b ldr r3, [r3, #8] 8005826: 07db lsls r3, r3, #31 8005828: d5f2 bpl.n 8005810 if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800582a: f7ff fe4d bl 80054c8 800582e: 1b40 subs r0, r0, r5 8005830: 2802 cmp r0, #2 8005832: d9f6 bls.n 8005822 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8005834: 6aa3 ldr r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005836: 2001 movs r0, #1 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8005838: f043 0310 orr.w r3, r3, #16 800583c: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800583e: 6ae3 ldr r3, [r4, #44] ; 0x2c 8005840: f043 0301 orr.w r3, r3, #1 8005844: 62e3 str r3, [r4, #44] ; 0x2c 8005846: bd38 pop {r3, r4, r5, pc} 08005848 : { 8005848: b5f8 push {r3, r4, r5, r6, r7, lr} if(hadc == NULL) 800584a: 4604 mov r4, r0 800584c: 2800 cmp r0, #0 800584e: d077 beq.n 8005940 if (hadc->State == HAL_ADC_STATE_RESET) 8005850: 6a83 ldr r3, [r0, #40] ; 0x28 8005852: b923 cbnz r3, 800585e ADC_CLEAR_ERRORCODE(hadc); 8005854: 62c3 str r3, [r0, #44] ; 0x2c hadc->Lock = HAL_UNLOCKED; 8005856: f880 3024 strb.w r3, [r0, #36] ; 0x24 HAL_ADC_MspInit(hadc); 800585a: f002 feb9 bl 80085d0 tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800585e: 4620 mov r0, r4 8005860: f7ff ffd0 bl 8005804 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8005864: 6aa3 ldr r3, [r4, #40] ; 0x28 8005866: f013 0310 ands.w r3, r3, #16 800586a: d16b bne.n 8005944 800586c: 2800 cmp r0, #0 800586e: d169 bne.n 8005944 ADC_STATE_CLR_SET(hadc->State, 8005870: 6aa2 ldr r2, [r4, #40] ; 0x28 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8005872: 4937 ldr r1, [pc, #220] ; (8005950 ) ADC_STATE_CLR_SET(hadc->State, 8005874: f422 5288 bic.w r2, r2, #4352 ; 0x1100 8005878: f022 0202 bic.w r2, r2, #2 800587c: f042 0202 orr.w r2, r2, #2 8005880: 62a2 str r2, [r4, #40] ; 0x28 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8005882: e894 0024 ldmia.w r4, {r2, r5} 8005886: 428a cmp r2, r1 8005888: 69e1 ldr r1, [r4, #28] 800588a: d104 bne.n 8005896 800588c: f5b1 2f40 cmp.w r1, #786432 ; 0xc0000 8005890: bf08 it eq 8005892: f44f 2100 moveq.w r1, #524288 ; 0x80000 ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) ); 8005896: 68e6 ldr r6, [r4, #12] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8005898: ea45 0546 orr.w r5, r5, r6, lsl #1 800589c: 4329 orrs r1, r5 tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 800589e: 68a5 ldr r5, [r4, #8] 80058a0: f5b5 7f80 cmp.w r5, #256 ; 0x100 80058a4: d035 beq.n 8005912 80058a6: 2d01 cmp r5, #1 80058a8: bf08 it eq 80058aa: f44f 7380 moveq.w r3, #256 ; 0x100 if (hadc->Init.DiscontinuousConvMode == ENABLE) 80058ae: 6967 ldr r7, [r4, #20] 80058b0: 2f01 cmp r7, #1 80058b2: d106 bne.n 80058c2 if (hadc->Init.ContinuousConvMode == DISABLE) 80058b4: bb7e cbnz r6, 8005916 SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 80058b6: 69a6 ldr r6, [r4, #24] 80058b8: 3e01 subs r6, #1 80058ba: ea43 3346 orr.w r3, r3, r6, lsl #13 80058be: f443 6300 orr.w r3, r3, #2048 ; 0x800 MODIFY_REG(hadc->Instance->CR1, 80058c2: 6856 ldr r6, [r2, #4] if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 80058c4: f5b5 7f80 cmp.w r5, #256 ; 0x100 MODIFY_REG(hadc->Instance->CR1, 80058c8: f426 4669 bic.w r6, r6, #59648 ; 0xe900 80058cc: ea43 0306 orr.w r3, r3, r6 80058d0: 6053 str r3, [r2, #4] MODIFY_REG(hadc->Instance->CR2, 80058d2: 6896 ldr r6, [r2, #8] 80058d4: 4b1f ldr r3, [pc, #124] ; (8005954 ) 80058d6: ea03 0306 and.w r3, r3, r6 80058da: ea43 0301 orr.w r3, r3, r1 80058de: 6093 str r3, [r2, #8] if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 80058e0: d001 beq.n 80058e6 80058e2: 2d01 cmp r5, #1 80058e4: d120 bne.n 8005928 tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 80058e6: 6923 ldr r3, [r4, #16] 80058e8: 3b01 subs r3, #1 80058ea: 051b lsls r3, r3, #20 MODIFY_REG(hadc->Instance->SQR1, 80058ec: 6ad5 ldr r5, [r2, #44] ; 0x2c 80058ee: f425 0570 bic.w r5, r5, #15728640 ; 0xf00000 80058f2: 432b orrs r3, r5 80058f4: 62d3 str r3, [r2, #44] ; 0x2c if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80058f6: 6892 ldr r2, [r2, #8] 80058f8: 4b17 ldr r3, [pc, #92] ; (8005958 ) 80058fa: 4013 ands r3, r2 80058fc: 4299 cmp r1, r3 80058fe: d115 bne.n 800592c ADC_CLEAR_ERRORCODE(hadc); 8005900: 2300 movs r3, #0 8005902: 62e3 str r3, [r4, #44] ; 0x2c ADC_STATE_CLR_SET(hadc->State, 8005904: 6aa3 ldr r3, [r4, #40] ; 0x28 8005906: f023 0303 bic.w r3, r3, #3 800590a: f043 0301 orr.w r3, r3, #1 800590e: 62a3 str r3, [r4, #40] ; 0x28 8005910: bdf8 pop {r3, r4, r5, r6, r7, pc} tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8005912: 462b mov r3, r5 8005914: e7cb b.n 80058ae SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8005916: 6aa6 ldr r6, [r4, #40] ; 0x28 8005918: f046 0620 orr.w r6, r6, #32 800591c: 62a6 str r6, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800591e: 6ae6 ldr r6, [r4, #44] ; 0x2c 8005920: f046 0601 orr.w r6, r6, #1 8005924: 62e6 str r6, [r4, #44] ; 0x2c 8005926: e7cc b.n 80058c2 uint32_t tmp_sqr1 = 0U; 8005928: 2300 movs r3, #0 800592a: e7df b.n 80058ec ADC_STATE_CLR_SET(hadc->State, 800592c: 6aa3 ldr r3, [r4, #40] ; 0x28 800592e: f023 0312 bic.w r3, r3, #18 8005932: f043 0310 orr.w r3, r3, #16 8005936: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005938: 6ae3 ldr r3, [r4, #44] ; 0x2c 800593a: f043 0301 orr.w r3, r3, #1 800593e: 62e3 str r3, [r4, #44] ; 0x2c return HAL_ERROR; 8005940: 2001 movs r0, #1 } 8005942: bdf8 pop {r3, r4, r5, r6, r7, pc} SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8005944: 6aa3 ldr r3, [r4, #40] ; 0x28 8005946: f043 0310 orr.w r3, r3, #16 800594a: 62a3 str r3, [r4, #40] ; 0x28 800594c: e7f8 b.n 8005940 800594e: bf00 nop 8005950: 40013c00 .word 0x40013c00 8005954: ffe1f7fd .word 0xffe1f7fd 8005958: ff1f0efe .word 0xff1f0efe 0800595c : */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) { HAL_StatusTypeDef tmp_hal_status = HAL_OK; uint32_t tickstart; __IO uint32_t wait_loop_index = 0U; 800595c: 2300 movs r3, #0 { 800595e: b573 push {r0, r1, r4, r5, r6, lr} __IO uint32_t wait_loop_index = 0U; 8005960: 9301 str r3, [sp, #4] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); 8005962: f890 3024 ldrb.w r3, [r0, #36] ; 0x24 { 8005966: 4604 mov r4, r0 __HAL_LOCK(hadc); 8005968: 2b01 cmp r3, #1 800596a: d05a beq.n 8005a22 800596c: 2301 movs r3, #1 800596e: f880 3024 strb.w r3, [r0, #36] ; 0x24 /* 1. Calibration prerequisite: */ /* - ADC must be disabled for at least two ADC clock cycles in disable */ /* mode before ADC enable */ /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8005972: f7ff ff47 bl 8005804 /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) 8005976: 4605 mov r5, r0 8005978: 2800 cmp r0, #0 800597a: d132 bne.n 80059e2 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800597c: 6aa3 ldr r3, [r4, #40] ; 0x28 /* Hardware prerequisite: delay before starting the calibration. */ /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ /* - Wait for the expected ADC clock cycles delay */ wait_loop_index = ((SystemCoreClock / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800597e: 2002 movs r0, #2 ADC_STATE_CLR_SET(hadc->State, 8005980: f423 5388 bic.w r3, r3, #4352 ; 0x1100 8005984: f023 0302 bic.w r3, r3, #2 8005988: f043 0302 orr.w r3, r3, #2 800598c: 62a3 str r3, [r4, #40] ; 0x28 / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) 800598e: 4b26 ldr r3, [pc, #152] ; (8005a28 ) 8005990: 681e ldr r6, [r3, #0] 8005992: f000 fe89 bl 80066a8 8005996: fbb6 f0f0 udiv r0, r6, r0 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); 800599a: 0040 lsls r0, r0, #1 wait_loop_index = ((SystemCoreClock 800599c: 9001 str r0, [sp, #4] while(wait_loop_index != 0U) 800599e: 9b01 ldr r3, [sp, #4] 80059a0: bb1b cbnz r3, 80059ea { wait_loop_index--; } /* 2. Enable the ADC peripheral */ ADC_Enable(hadc); 80059a2: 4620 mov r0, r4 80059a4: f7ff fe68 bl 8005678 /* 3. Resets ADC calibration registers */ SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); 80059a8: 6822 ldr r2, [r4, #0] 80059aa: 6893 ldr r3, [r2, #8] 80059ac: f043 0308 orr.w r3, r3, #8 80059b0: 6093 str r3, [r2, #8] tickstart = HAL_GetTick(); 80059b2: f7ff fd89 bl 80054c8 80059b6: 4606 mov r6, r0 /* Wait for calibration reset completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) 80059b8: 6823 ldr r3, [r4, #0] 80059ba: 689a ldr r2, [r3, #8] 80059bc: 0712 lsls r2, r2, #28 80059be: d418 bmi.n 80059f2 } } /* 4. Start ADC calibration */ SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); 80059c0: 689a ldr r2, [r3, #8] 80059c2: f042 0204 orr.w r2, r2, #4 80059c6: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 80059c8: f7ff fd7e bl 80054c8 80059cc: 4606 mov r6, r0 /* Wait for calibration completion */ while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) 80059ce: 6823 ldr r3, [r4, #0] 80059d0: 689b ldr r3, [r3, #8] 80059d2: 075b lsls r3, r3, #29 80059d4: d41f bmi.n 8005a16 return HAL_ERROR; } } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 80059d6: 6aa3 ldr r3, [r4, #40] ; 0x28 80059d8: f023 0303 bic.w r3, r3, #3 80059dc: f043 0301 orr.w r3, r3, #1 80059e0: 62a3 str r3, [r4, #40] ; 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); 80059e2: 2300 movs r3, #0 80059e4: f884 3024 strb.w r3, [r4, #36] ; 0x24 /* Return function status */ return tmp_hal_status; 80059e8: e012 b.n 8005a10 wait_loop_index--; 80059ea: 9b01 ldr r3, [sp, #4] 80059ec: 3b01 subs r3, #1 80059ee: 9301 str r3, [sp, #4] 80059f0: e7d5 b.n 800599e if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 80059f2: f7ff fd69 bl 80054c8 80059f6: 1b80 subs r0, r0, r6 80059f8: 280a cmp r0, #10 80059fa: d9dd bls.n 80059b8 ADC_STATE_CLR_SET(hadc->State, 80059fc: 6aa3 ldr r3, [r4, #40] ; 0x28 return HAL_ERROR; 80059fe: 2501 movs r5, #1 ADC_STATE_CLR_SET(hadc->State, 8005a00: f023 0312 bic.w r3, r3, #18 8005a04: f043 0310 orr.w r3, r3, #16 8005a08: 62a3 str r3, [r4, #40] ; 0x28 __HAL_UNLOCK(hadc); 8005a0a: 2300 movs r3, #0 8005a0c: f884 3024 strb.w r3, [r4, #36] ; 0x24 } 8005a10: 4628 mov r0, r5 8005a12: b002 add sp, #8 8005a14: bd70 pop {r4, r5, r6, pc} if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 8005a16: f7ff fd57 bl 80054c8 8005a1a: 1b80 subs r0, r0, r6 8005a1c: 280a cmp r0, #10 8005a1e: d9d6 bls.n 80059ce 8005a20: e7ec b.n 80059fc __HAL_LOCK(hadc); 8005a22: 2502 movs r5, #2 8005a24: e7f4 b.n 8005a10 8005a26: bf00 nop 8005a28: 20000200 .word 0x20000200 08005a2c : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 8005a2c: 4a07 ldr r2, [pc, #28] ; (8005a4c ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 8005a2e: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 8005a30: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 8005a32: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8005a36: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8005a3a: 041b lsls r3, r3, #16 8005a3c: 0c1b lsrs r3, r3, #16 8005a3e: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8005a42: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 8005a46: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 8005a48: 60d3 str r3, [r2, #12] 8005a4a: 4770 bx lr 8005a4c: e000ed00 .word 0xe000ed00 08005a50 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8005a50: 4b17 ldr r3, [pc, #92] ; (8005ab0 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8005a52: b530 push {r4, r5, lr} 8005a54: 68dc ldr r4, [r3, #12] 8005a56: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8005a5a: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005a5e: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8005a60: 2b04 cmp r3, #4 8005a62: bf28 it cs 8005a64: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005a66: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005a68: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005a6c: bf98 it ls 8005a6e: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005a70: fa05 f303 lsl.w r3, r5, r3 8005a74: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005a78: bf88 it hi 8005a7a: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005a7c: 4019 ands r1, r3 8005a7e: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8005a80: fa05 f404 lsl.w r4, r5, r4 8005a84: 3c01 subs r4, #1 8005a86: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8005a88: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005a8a: ea42 0201 orr.w r2, r2, r1 8005a8e: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005a92: bfaf iteee ge 8005a94: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005a98: 4b06 ldrlt r3, [pc, #24] ; (8005ab4 ) 8005a9a: f000 000f andlt.w r0, r0, #15 8005a9e: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005aa0: bfa5 ittet ge 8005aa2: b2d2 uxtbge r2, r2 8005aa4: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005aa8: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005aaa: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8005aae: bd30 pop {r4, r5, pc} 8005ab0: e000ed00 .word 0xe000ed00 8005ab4: e000ed14 .word 0xe000ed14 08005ab8 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 8005ab8: 2301 movs r3, #1 8005aba: 0942 lsrs r2, r0, #5 8005abc: f000 001f and.w r0, r0, #31 8005ac0: fa03 f000 lsl.w r0, r3, r0 8005ac4: 4b01 ldr r3, [pc, #4] ; (8005acc ) 8005ac6: f843 0022 str.w r0, [r3, r2, lsl #2] 8005aca: 4770 bx lr 8005acc: e000e100 .word 0xe000e100 08005ad0 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8005ad0: 3801 subs r0, #1 8005ad2: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8005ad6: d20a bcs.n 8005aee SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005ad8: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8005ada: 4b06 ldr r3, [pc, #24] ; (8005af4 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005adc: 4a06 ldr r2, [pc, #24] ; (8005af8 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8005ade: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8005ae0: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8005ae4: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8005ae6: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8005ae8: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8005aea: 601a str r2, [r3, #0] 8005aec: 4770 bx lr return (1UL); /* Reload value impossible */ 8005aee: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 8005af0: 4770 bx lr 8005af2: bf00 nop 8005af4: e000e010 .word 0xe000e010 8005af8: e000ed00 .word 0xe000ed00 08005afc : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8005afc: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 8005afe: 2800 cmp r0, #0 8005b00: d032 beq.n 8005b68 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 8005b02: 6801 ldr r1, [r0, #0] 8005b04: 4b19 ldr r3, [pc, #100] ; (8005b6c ) 8005b06: 2414 movs r4, #20 8005b08: 4299 cmp r1, r3 8005b0a: d825 bhi.n 8005b58 { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8005b0c: 4a18 ldr r2, [pc, #96] ; (8005b70 ) hdma->DmaBaseAddress = DMA1; 8005b0e: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8005b12: 440a add r2, r1 8005b14: fbb2 f2f4 udiv r2, r2, r4 8005b18: 0092 lsls r2, r2, #2 8005b1a: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8005b1c: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 8005b1e: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 8005b20: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 8005b22: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 8005b24: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 8005b26: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8005b28: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 8005b2c: 4323 orrs r3, r4 8005b2e: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8005b30: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 8005b34: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8005b36: 6944 ldr r4, [r0, #20] 8005b38: 4323 orrs r3, r4 8005b3a: 6984 ldr r4, [r0, #24] 8005b3c: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 8005b3e: 69c4 ldr r4, [r0, #28] 8005b40: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 8005b42: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8005b44: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 8005b46: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8005b48: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 8005b4a: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8005b4e: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8005b50: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 8005b54: 4618 mov r0, r3 8005b56: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 8005b58: 4b06 ldr r3, [pc, #24] ; (8005b74 ) 8005b5a: 440b add r3, r1 8005b5c: fbb3 f3f4 udiv r3, r3, r4 8005b60: 009b lsls r3, r3, #2 8005b62: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8005b64: 4b04 ldr r3, [pc, #16] ; (8005b78 ) 8005b66: e7d9 b.n 8005b1c return HAL_ERROR; 8005b68: 2001 movs r0, #1 } 8005b6a: bd10 pop {r4, pc} 8005b6c: 40020407 .word 0x40020407 8005b70: bffdfff8 .word 0xbffdfff8 8005b74: bffdfbf8 .word 0xbffdfbf8 8005b78: 40020400 .word 0x40020400 08005b7c : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8005b7c: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8005b7e: f890 4020 ldrb.w r4, [r0, #32] 8005b82: 2c01 cmp r4, #1 8005b84: d035 beq.n 8005bf2 8005b86: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 8005b88: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 8005b8c: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8005b90: 42a5 cmp r5, r4 8005b92: f04f 0600 mov.w r6, #0 8005b96: f04f 0402 mov.w r4, #2 8005b9a: d128 bne.n 8005bee { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8005b9c: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8005ba0: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8005ba2: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8005ba4: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8005ba6: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 8005ba8: f026 0601 bic.w r6, r6, #1 8005bac: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8005bae: 6bc6 ldr r6, [r0, #60] ; 0x3c 8005bb0: 40bd lsls r5, r7 8005bb2: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8005bb4: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8005bb6: 6843 ldr r3, [r0, #4] 8005bb8: 6805 ldr r5, [r0, #0] 8005bba: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 8005bbc: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8005bbe: bf0b itete eq 8005bc0: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 8005bc2: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8005bc4: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 8005bc6: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 8005bc8: b14b cbz r3, 8005bde __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8005bca: 6823 ldr r3, [r4, #0] 8005bcc: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8005bd0: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 8005bd2: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8005bd4: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 8005bd6: f043 0301 orr.w r3, r3, #1 8005bda: 602b str r3, [r5, #0] 8005bdc: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8005bde: 6823 ldr r3, [r4, #0] 8005be0: f023 0304 bic.w r3, r3, #4 8005be4: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8005be6: 6823 ldr r3, [r4, #0] 8005be8: f043 030a orr.w r3, r3, #10 8005bec: e7f0 b.n 8005bd0 __HAL_UNLOCK(hdma); 8005bee: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 8005bf2: 2002 movs r0, #2 } 8005bf4: bdf0 pop {r4, r5, r6, r7, pc} ... 08005bf8 : if(HAL_DMA_STATE_BUSY != hdma->State) 8005bf8: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 8005bfc: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 8005bfe: 2b02 cmp r3, #2 8005c00: d003 beq.n 8005c0a hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8005c02: 2304 movs r3, #4 8005c04: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 8005c06: 2001 movs r0, #1 8005c08: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8005c0a: 6803 ldr r3, [r0, #0] 8005c0c: 681a ldr r2, [r3, #0] 8005c0e: f022 020e bic.w r2, r2, #14 8005c12: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 8005c14: 681a ldr r2, [r3, #0] 8005c16: f022 0201 bic.w r2, r2, #1 8005c1a: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8005c1c: 4a29 ldr r2, [pc, #164] ; (8005cc4 ) 8005c1e: 4293 cmp r3, r2 8005c20: d924 bls.n 8005c6c 8005c22: f502 7262 add.w r2, r2, #904 ; 0x388 8005c26: 4293 cmp r3, r2 8005c28: d019 beq.n 8005c5e 8005c2a: 3214 adds r2, #20 8005c2c: 4293 cmp r3, r2 8005c2e: d018 beq.n 8005c62 8005c30: 3214 adds r2, #20 8005c32: 4293 cmp r3, r2 8005c34: d017 beq.n 8005c66 8005c36: 3214 adds r2, #20 8005c38: 4293 cmp r3, r2 8005c3a: bf0c ite eq 8005c3c: f44f 5380 moveq.w r3, #4096 ; 0x1000 8005c40: f44f 3380 movne.w r3, #65536 ; 0x10000 8005c44: 4a20 ldr r2, [pc, #128] ; (8005cc8 ) 8005c46: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 8005c48: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 8005c4a: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8005c4c: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 8005c50: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 8005c52: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 8005c56: b39b cbz r3, 8005cc0 hdma->XferAbortCallback(hdma); 8005c58: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 8005c5a: 4620 mov r0, r4 8005c5c: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8005c5e: 2301 movs r3, #1 8005c60: e7f0 b.n 8005c44 8005c62: 2310 movs r3, #16 8005c64: e7ee b.n 8005c44 8005c66: f44f 7380 mov.w r3, #256 ; 0x100 8005c6a: e7eb b.n 8005c44 8005c6c: 4917 ldr r1, [pc, #92] ; (8005ccc ) 8005c6e: 428b cmp r3, r1 8005c70: d016 beq.n 8005ca0 8005c72: 3114 adds r1, #20 8005c74: 428b cmp r3, r1 8005c76: d015 beq.n 8005ca4 8005c78: 3114 adds r1, #20 8005c7a: 428b cmp r3, r1 8005c7c: d014 beq.n 8005ca8 8005c7e: 3114 adds r1, #20 8005c80: 428b cmp r3, r1 8005c82: d014 beq.n 8005cae 8005c84: 3114 adds r1, #20 8005c86: 428b cmp r3, r1 8005c88: d014 beq.n 8005cb4 8005c8a: 3114 adds r1, #20 8005c8c: 428b cmp r3, r1 8005c8e: d014 beq.n 8005cba 8005c90: 4293 cmp r3, r2 8005c92: bf14 ite ne 8005c94: f44f 3380 movne.w r3, #65536 ; 0x10000 8005c98: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8005c9c: 4a0c ldr r2, [pc, #48] ; (8005cd0 ) 8005c9e: e7d2 b.n 8005c46 8005ca0: 2301 movs r3, #1 8005ca2: e7fb b.n 8005c9c 8005ca4: 2310 movs r3, #16 8005ca6: e7f9 b.n 8005c9c 8005ca8: f44f 7380 mov.w r3, #256 ; 0x100 8005cac: e7f6 b.n 8005c9c 8005cae: f44f 5380 mov.w r3, #4096 ; 0x1000 8005cb2: e7f3 b.n 8005c9c 8005cb4: f44f 3380 mov.w r3, #65536 ; 0x10000 8005cb8: e7f0 b.n 8005c9c 8005cba: f44f 1380 mov.w r3, #1048576 ; 0x100000 8005cbe: e7ed b.n 8005c9c HAL_StatusTypeDef status = HAL_OK; 8005cc0: 4618 mov r0, r3 } 8005cc2: bd10 pop {r4, pc} 8005cc4: 40020080 .word 0x40020080 8005cc8: 40020400 .word 0x40020400 8005ccc: 40020008 .word 0x40020008 8005cd0: 40020000 .word 0x40020000 08005cd4 : { 8005cd4: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8005cd6: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8005cd8: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8005cda: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8005cdc: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 8005cde: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8005ce0: 4095 lsls r5, r2 8005ce2: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 8005ce4: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8005ce6: d055 beq.n 8005d94 8005ce8: 074d lsls r5, r1, #29 8005cea: d553 bpl.n 8005d94 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005cec: 681a ldr r2, [r3, #0] 8005cee: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8005cf0: bf5e ittt pl 8005cf2: 681a ldrpl r2, [r3, #0] 8005cf4: f022 0204 bicpl.w r2, r2, #4 8005cf8: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8005cfa: 4a60 ldr r2, [pc, #384] ; (8005e7c ) 8005cfc: 4293 cmp r3, r2 8005cfe: d91f bls.n 8005d40 8005d00: f502 7262 add.w r2, r2, #904 ; 0x388 8005d04: 4293 cmp r3, r2 8005d06: d014 beq.n 8005d32 8005d08: 3214 adds r2, #20 8005d0a: 4293 cmp r3, r2 8005d0c: d013 beq.n 8005d36 8005d0e: 3214 adds r2, #20 8005d10: 4293 cmp r3, r2 8005d12: d012 beq.n 8005d3a 8005d14: 3214 adds r2, #20 8005d16: 4293 cmp r3, r2 8005d18: bf0c ite eq 8005d1a: f44f 4380 moveq.w r3, #16384 ; 0x4000 8005d1e: f44f 2380 movne.w r3, #262144 ; 0x40000 8005d22: 4a57 ldr r2, [pc, #348] ; (8005e80 ) 8005d24: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 8005d26: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 8005d28: 2b00 cmp r3, #0 8005d2a: f000 80a5 beq.w 8005e78 } 8005d2e: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 8005d30: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8005d32: 2304 movs r3, #4 8005d34: e7f5 b.n 8005d22 8005d36: 2340 movs r3, #64 ; 0x40 8005d38: e7f3 b.n 8005d22 8005d3a: f44f 6380 mov.w r3, #1024 ; 0x400 8005d3e: e7f0 b.n 8005d22 8005d40: 4950 ldr r1, [pc, #320] ; (8005e84 ) 8005d42: 428b cmp r3, r1 8005d44: d016 beq.n 8005d74 8005d46: 3114 adds r1, #20 8005d48: 428b cmp r3, r1 8005d4a: d015 beq.n 8005d78 8005d4c: 3114 adds r1, #20 8005d4e: 428b cmp r3, r1 8005d50: d014 beq.n 8005d7c 8005d52: 3114 adds r1, #20 8005d54: 428b cmp r3, r1 8005d56: d014 beq.n 8005d82 8005d58: 3114 adds r1, #20 8005d5a: 428b cmp r3, r1 8005d5c: d014 beq.n 8005d88 8005d5e: 3114 adds r1, #20 8005d60: 428b cmp r3, r1 8005d62: d014 beq.n 8005d8e 8005d64: 4293 cmp r3, r2 8005d66: bf14 ite ne 8005d68: f44f 2380 movne.w r3, #262144 ; 0x40000 8005d6c: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8005d70: 4a45 ldr r2, [pc, #276] ; (8005e88 ) 8005d72: e7d7 b.n 8005d24 8005d74: 2304 movs r3, #4 8005d76: e7fb b.n 8005d70 8005d78: 2340 movs r3, #64 ; 0x40 8005d7a: e7f9 b.n 8005d70 8005d7c: f44f 6380 mov.w r3, #1024 ; 0x400 8005d80: e7f6 b.n 8005d70 8005d82: f44f 4380 mov.w r3, #16384 ; 0x4000 8005d86: e7f3 b.n 8005d70 8005d88: f44f 2380 mov.w r3, #262144 ; 0x40000 8005d8c: e7f0 b.n 8005d70 8005d8e: f44f 0380 mov.w r3, #4194304 ; 0x400000 8005d92: e7ed b.n 8005d70 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8005d94: 2502 movs r5, #2 8005d96: 4095 lsls r5, r2 8005d98: 4225 tst r5, r4 8005d9a: d057 beq.n 8005e4c 8005d9c: 078d lsls r5, r1, #30 8005d9e: d555 bpl.n 8005e4c if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005da0: 681a ldr r2, [r3, #0] 8005da2: 0694 lsls r4, r2, #26 8005da4: d406 bmi.n 8005db4 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8005da6: 681a ldr r2, [r3, #0] 8005da8: f022 020a bic.w r2, r2, #10 8005dac: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 8005dae: 2201 movs r2, #1 8005db0: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8005db4: 4a31 ldr r2, [pc, #196] ; (8005e7c ) 8005db6: 4293 cmp r3, r2 8005db8: d91e bls.n 8005df8 8005dba: f502 7262 add.w r2, r2, #904 ; 0x388 8005dbe: 4293 cmp r3, r2 8005dc0: d013 beq.n 8005dea 8005dc2: 3214 adds r2, #20 8005dc4: 4293 cmp r3, r2 8005dc6: d012 beq.n 8005dee 8005dc8: 3214 adds r2, #20 8005dca: 4293 cmp r3, r2 8005dcc: d011 beq.n 8005df2 8005dce: 3214 adds r2, #20 8005dd0: 4293 cmp r3, r2 8005dd2: bf0c ite eq 8005dd4: f44f 5300 moveq.w r3, #8192 ; 0x2000 8005dd8: f44f 3300 movne.w r3, #131072 ; 0x20000 8005ddc: 4a28 ldr r2, [pc, #160] ; (8005e80 ) 8005dde: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 8005de0: 2300 movs r3, #0 8005de2: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 8005de6: 6a83 ldr r3, [r0, #40] ; 0x28 8005de8: e79e b.n 8005d28 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8005dea: 2302 movs r3, #2 8005dec: e7f6 b.n 8005ddc 8005dee: 2320 movs r3, #32 8005df0: e7f4 b.n 8005ddc 8005df2: f44f 7300 mov.w r3, #512 ; 0x200 8005df6: e7f1 b.n 8005ddc 8005df8: 4922 ldr r1, [pc, #136] ; (8005e84 ) 8005dfa: 428b cmp r3, r1 8005dfc: d016 beq.n 8005e2c 8005dfe: 3114 adds r1, #20 8005e00: 428b cmp r3, r1 8005e02: d015 beq.n 8005e30 8005e04: 3114 adds r1, #20 8005e06: 428b cmp r3, r1 8005e08: d014 beq.n 8005e34 8005e0a: 3114 adds r1, #20 8005e0c: 428b cmp r3, r1 8005e0e: d014 beq.n 8005e3a 8005e10: 3114 adds r1, #20 8005e12: 428b cmp r3, r1 8005e14: d014 beq.n 8005e40 8005e16: 3114 adds r1, #20 8005e18: 428b cmp r3, r1 8005e1a: d014 beq.n 8005e46 8005e1c: 4293 cmp r3, r2 8005e1e: bf14 ite ne 8005e20: f44f 3300 movne.w r3, #131072 ; 0x20000 8005e24: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 8005e28: 4a17 ldr r2, [pc, #92] ; (8005e88 ) 8005e2a: e7d8 b.n 8005dde 8005e2c: 2302 movs r3, #2 8005e2e: e7fb b.n 8005e28 8005e30: 2320 movs r3, #32 8005e32: e7f9 b.n 8005e28 8005e34: f44f 7300 mov.w r3, #512 ; 0x200 8005e38: e7f6 b.n 8005e28 8005e3a: f44f 5300 mov.w r3, #8192 ; 0x2000 8005e3e: e7f3 b.n 8005e28 8005e40: f44f 3300 mov.w r3, #131072 ; 0x20000 8005e44: e7f0 b.n 8005e28 8005e46: f44f 1300 mov.w r3, #2097152 ; 0x200000 8005e4a: e7ed b.n 8005e28 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8005e4c: 2508 movs r5, #8 8005e4e: 4095 lsls r5, r2 8005e50: 4225 tst r5, r4 8005e52: d011 beq.n 8005e78 8005e54: 0709 lsls r1, r1, #28 8005e56: d50f bpl.n 8005e78 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8005e58: 6819 ldr r1, [r3, #0] 8005e5a: f021 010e bic.w r1, r1, #14 8005e5e: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8005e60: 2301 movs r3, #1 8005e62: fa03 f202 lsl.w r2, r3, r2 8005e66: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 8005e68: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 8005e6a: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 8005e6e: 2300 movs r3, #0 8005e70: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8005e74: 6b03 ldr r3, [r0, #48] ; 0x30 8005e76: e757 b.n 8005d28 } 8005e78: bc70 pop {r4, r5, r6} 8005e7a: 4770 bx lr 8005e7c: 40020080 .word 0x40020080 8005e80: 40020400 .word 0x40020400 8005e84: 40020008 .word 0x40020008 8005e88: 40020000 .word 0x40020000 08005e8c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8005e8c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 8005e90: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 8005e92: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8005e94: 4f6c ldr r7, [pc, #432] ; (8006048 ) 8005e96: 4b6d ldr r3, [pc, #436] ; (800604c ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8005e98: f8df e1b8 ldr.w lr, [pc, #440] ; 8006054 switch (GPIO_Init->Mode) 8005e9c: f8df c1b8 ldr.w ip, [pc, #440] ; 8006058 ioposition = (0x01U << position); 8005ea0: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8005ea4: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 8005ea6: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8005eaa: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 8005eae: 45a0 cmp r8, r4 8005eb0: f040 8085 bne.w 8005fbe switch (GPIO_Init->Mode) 8005eb4: 684d ldr r5, [r1, #4] 8005eb6: 2d12 cmp r5, #18 8005eb8: f000 80b7 beq.w 800602a 8005ebc: f200 808d bhi.w 8005fda 8005ec0: 2d02 cmp r5, #2 8005ec2: f000 80af beq.w 8006024 8005ec6: f200 8081 bhi.w 8005fcc 8005eca: 2d00 cmp r5, #0 8005ecc: f000 8091 beq.w 8005ff2 8005ed0: 2d01 cmp r5, #1 8005ed2: f000 80a5 beq.w 8006020 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8005ed6: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8005eda: 2cff cmp r4, #255 ; 0xff 8005edc: bf93 iteet ls 8005ede: 4682 movls sl, r0 8005ee0: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 8005ee4: 3d08 subhi r5, #8 8005ee6: f8d0 b000 ldrls.w fp, [r0] 8005eea: bf92 itee ls 8005eec: 00b5 lslls r5, r6, #2 8005eee: f8d0 b004 ldrhi.w fp, [r0, #4] 8005ef2: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8005ef4: fa09 f805 lsl.w r8, r9, r5 8005ef8: ea2b 0808 bic.w r8, fp, r8 8005efc: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8005f00: bf88 it hi 8005f02: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8005f06: ea48 0505 orr.w r5, r8, r5 8005f0a: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8005f0e: f8d1 a004 ldr.w sl, [r1, #4] 8005f12: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8005f16: d052 beq.n 8005fbe __HAL_RCC_AFIO_CLK_ENABLE(); 8005f18: 69bd ldr r5, [r7, #24] 8005f1a: f026 0803 bic.w r8, r6, #3 8005f1e: f045 0501 orr.w r5, r5, #1 8005f22: 61bd str r5, [r7, #24] 8005f24: 69bd ldr r5, [r7, #24] 8005f26: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8005f2a: f005 0501 and.w r5, r5, #1 8005f2e: 9501 str r5, [sp, #4] 8005f30: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8005f34: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8005f38: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8005f3a: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8005f3e: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8005f42: fa09 f90b lsl.w r9, r9, fp 8005f46: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8005f4a: 4d41 ldr r5, [pc, #260] ; (8006050 ) 8005f4c: 42a8 cmp r0, r5 8005f4e: d071 beq.n 8006034 8005f50: f505 6580 add.w r5, r5, #1024 ; 0x400 8005f54: 42a8 cmp r0, r5 8005f56: d06f beq.n 8006038 8005f58: f505 6580 add.w r5, r5, #1024 ; 0x400 8005f5c: 42a8 cmp r0, r5 8005f5e: d06d beq.n 800603c 8005f60: f505 6580 add.w r5, r5, #1024 ; 0x400 8005f64: 42a8 cmp r0, r5 8005f66: d06b beq.n 8006040 8005f68: f505 6580 add.w r5, r5, #1024 ; 0x400 8005f6c: 42a8 cmp r0, r5 8005f6e: d069 beq.n 8006044 8005f70: 4570 cmp r0, lr 8005f72: bf0c ite eq 8005f74: 2505 moveq r5, #5 8005f76: 2506 movne r5, #6 8005f78: fa05 f50b lsl.w r5, r5, fp 8005f7c: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 8005f80: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8005f84: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8005f86: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8005f8a: bf14 ite ne 8005f8c: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8005f8e: 43a5 biceq r5, r4 8005f90: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 8005f92: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8005f94: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8005f98: bf14 ite ne 8005f9a: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8005f9c: 43a5 biceq r5, r4 8005f9e: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8005fa0: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8005fa2: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8005fa6: bf14 ite ne 8005fa8: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8005faa: 43a5 biceq r5, r4 8005fac: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8005fae: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8005fb0: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8005fb4: bf14 ite ne 8005fb6: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8005fb8: ea25 0404 biceq.w r4, r5, r4 8005fbc: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8005fbe: 3601 adds r6, #1 8005fc0: 2e10 cmp r6, #16 8005fc2: f47f af6d bne.w 8005ea0 } } } } } 8005fc6: b003 add sp, #12 8005fc8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8005fcc: 2d03 cmp r5, #3 8005fce: d025 beq.n 800601c 8005fd0: 2d11 cmp r5, #17 8005fd2: d180 bne.n 8005ed6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8005fd4: 68ca ldr r2, [r1, #12] 8005fd6: 3204 adds r2, #4 break; 8005fd8: e77d b.n 8005ed6 switch (GPIO_Init->Mode) 8005fda: 4565 cmp r5, ip 8005fdc: d009 beq.n 8005ff2 8005fde: d812 bhi.n 8006006 8005fe0: f8df 9078 ldr.w r9, [pc, #120] ; 800605c 8005fe4: 454d cmp r5, r9 8005fe6: d004 beq.n 8005ff2 8005fe8: f509 3980 add.w r9, r9, #65536 ; 0x10000 8005fec: 454d cmp r5, r9 8005fee: f47f af72 bne.w 8005ed6 if (GPIO_Init->Pull == GPIO_NOPULL) 8005ff2: 688a ldr r2, [r1, #8] 8005ff4: b1e2 cbz r2, 8006030 else if (GPIO_Init->Pull == GPIO_PULLUP) 8005ff6: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8005ff8: bf0c ite eq 8005ffa: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8005ffe: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8006002: 2208 movs r2, #8 8006004: e767 b.n 8005ed6 switch (GPIO_Init->Mode) 8006006: f8df 9058 ldr.w r9, [pc, #88] ; 8006060 800600a: 454d cmp r5, r9 800600c: d0f1 beq.n 8005ff2 800600e: f509 3980 add.w r9, r9, #65536 ; 0x10000 8006012: 454d cmp r5, r9 8006014: d0ed beq.n 8005ff2 8006016: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 800601a: e7e7 b.n 8005fec config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 800601c: 2200 movs r2, #0 800601e: e75a b.n 8005ed6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8006020: 68ca ldr r2, [r1, #12] break; 8006022: e758 b.n 8005ed6 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8006024: 68ca ldr r2, [r1, #12] 8006026: 3208 adds r2, #8 break; 8006028: e755 b.n 8005ed6 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 800602a: 68ca ldr r2, [r1, #12] 800602c: 320c adds r2, #12 break; 800602e: e752 b.n 8005ed6 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8006030: 2204 movs r2, #4 8006032: e750 b.n 8005ed6 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8006034: 2500 movs r5, #0 8006036: e79f b.n 8005f78 8006038: 2501 movs r5, #1 800603a: e79d b.n 8005f78 800603c: 2502 movs r5, #2 800603e: e79b b.n 8005f78 8006040: 2503 movs r5, #3 8006042: e799 b.n 8005f78 8006044: 2504 movs r5, #4 8006046: e797 b.n 8005f78 8006048: 40021000 .word 0x40021000 800604c: 40010400 .word 0x40010400 8006050: 40010800 .word 0x40010800 8006054: 40011c00 .word 0x40011c00 8006058: 10210000 .word 0x10210000 800605c: 10110000 .word 0x10110000 8006060: 10310000 .word 0x10310000 08006064 : GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8006064: 6883 ldr r3, [r0, #8] 8006066: 4219 tst r1, r3 else { bitstatus = GPIO_PIN_RESET; } return bitstatus; } 8006068: bf14 ite ne 800606a: 2001 movne r0, #1 800606c: 2000 moveq r0, #0 800606e: 4770 bx lr 08006070 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8006070: b10a cbz r2, 8006076 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8006072: 6101 str r1, [r0, #16] 8006074: 4770 bx lr 8006076: 0409 lsls r1, r1, #16 8006078: e7fb b.n 8006072 0800607a : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 800607a: 68c3 ldr r3, [r0, #12] 800607c: 4059 eors r1, r3 800607e: 60c1 str r1, [r0, #12] 8006080: 4770 bx lr ... 08006084 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8006084: 6803 ldr r3, [r0, #0] { 8006086: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800608a: 07db lsls r3, r3, #31 { 800608c: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800608e: d410 bmi.n 80060b2 } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8006090: 682b ldr r3, [r5, #0] 8006092: 079f lsls r7, r3, #30 8006094: d45e bmi.n 8006154 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8006096: 682b ldr r3, [r5, #0] 8006098: 0719 lsls r1, r3, #28 800609a: f100 8095 bmi.w 80061c8 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 800609e: 682b ldr r3, [r5, #0] 80060a0: 075a lsls r2, r3, #29 80060a2: f100 80bf bmi.w 8006224 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80060a6: 69ea ldr r2, [r5, #28] 80060a8: 2a00 cmp r2, #0 80060aa: f040 812d bne.w 8006308 { return HAL_ERROR; } } return HAL_OK; 80060ae: 2000 movs r0, #0 80060b0: e014 b.n 80060dc if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 80060b2: 4c90 ldr r4, [pc, #576] ; (80062f4 ) 80060b4: 6863 ldr r3, [r4, #4] 80060b6: f003 030c and.w r3, r3, #12 80060ba: 2b04 cmp r3, #4 80060bc: d007 beq.n 80060ce || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 80060be: 6863 ldr r3, [r4, #4] 80060c0: f003 030c and.w r3, r3, #12 80060c4: 2b08 cmp r3, #8 80060c6: d10c bne.n 80060e2 80060c8: 6863 ldr r3, [r4, #4] 80060ca: 03de lsls r6, r3, #15 80060cc: d509 bpl.n 80060e2 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80060ce: 6823 ldr r3, [r4, #0] 80060d0: 039c lsls r4, r3, #14 80060d2: d5dd bpl.n 8006090 80060d4: 686b ldr r3, [r5, #4] 80060d6: 2b00 cmp r3, #0 80060d8: d1da bne.n 8006090 return HAL_ERROR; 80060da: 2001 movs r0, #1 } 80060dc: b002 add sp, #8 80060de: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80060e2: 686b ldr r3, [r5, #4] 80060e4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80060e8: d110 bne.n 800610c 80060ea: 6823 ldr r3, [r4, #0] 80060ec: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80060f0: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 80060f2: f7ff f9e9 bl 80054c8 80060f6: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80060f8: 6823 ldr r3, [r4, #0] 80060fa: 0398 lsls r0, r3, #14 80060fc: d4c8 bmi.n 8006090 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80060fe: f7ff f9e3 bl 80054c8 8006102: 1b80 subs r0, r0, r6 8006104: 2864 cmp r0, #100 ; 0x64 8006106: d9f7 bls.n 80060f8 return HAL_TIMEOUT; 8006108: 2003 movs r0, #3 800610a: e7e7 b.n 80060dc __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800610c: b99b cbnz r3, 8006136 800610e: 6823 ldr r3, [r4, #0] 8006110: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8006114: 6023 str r3, [r4, #0] 8006116: 6823 ldr r3, [r4, #0] 8006118: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800611c: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800611e: f7ff f9d3 bl 80054c8 8006122: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8006124: 6823 ldr r3, [r4, #0] 8006126: 0399 lsls r1, r3, #14 8006128: d5b2 bpl.n 8006090 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800612a: f7ff f9cd bl 80054c8 800612e: 1b80 subs r0, r0, r6 8006130: 2864 cmp r0, #100 ; 0x64 8006132: d9f7 bls.n 8006124 8006134: e7e8 b.n 8006108 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8006136: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 800613a: 6823 ldr r3, [r4, #0] 800613c: d103 bne.n 8006146 800613e: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8006142: 6023 str r3, [r4, #0] 8006144: e7d1 b.n 80060ea 8006146: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800614a: 6023 str r3, [r4, #0] 800614c: 6823 ldr r3, [r4, #0] 800614e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8006152: e7cd b.n 80060f0 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8006154: 4c67 ldr r4, [pc, #412] ; (80062f4 ) 8006156: 6863 ldr r3, [r4, #4] 8006158: f013 0f0c tst.w r3, #12 800615c: d007 beq.n 800616e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 800615e: 6863 ldr r3, [r4, #4] 8006160: f003 030c and.w r3, r3, #12 8006164: 2b08 cmp r3, #8 8006166: d110 bne.n 800618a 8006168: 6863 ldr r3, [r4, #4] 800616a: 03da lsls r2, r3, #15 800616c: d40d bmi.n 800618a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800616e: 6823 ldr r3, [r4, #0] 8006170: 079b lsls r3, r3, #30 8006172: d502 bpl.n 800617a 8006174: 692b ldr r3, [r5, #16] 8006176: 2b01 cmp r3, #1 8006178: d1af bne.n 80060da __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800617a: 6823 ldr r3, [r4, #0] 800617c: 696a ldr r2, [r5, #20] 800617e: f023 03f8 bic.w r3, r3, #248 ; 0xf8 8006182: ea43 03c2 orr.w r3, r3, r2, lsl #3 8006186: 6023 str r3, [r4, #0] 8006188: e785 b.n 8006096 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 800618a: 692a ldr r2, [r5, #16] 800618c: 4b5a ldr r3, [pc, #360] ; (80062f8 ) 800618e: b16a cbz r2, 80061ac __HAL_RCC_HSI_ENABLE(); 8006190: 2201 movs r2, #1 8006192: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8006194: f7ff f998 bl 80054c8 8006198: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800619a: 6823 ldr r3, [r4, #0] 800619c: 079f lsls r7, r3, #30 800619e: d4ec bmi.n 800617a if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80061a0: f7ff f992 bl 80054c8 80061a4: 1b80 subs r0, r0, r6 80061a6: 2802 cmp r0, #2 80061a8: d9f7 bls.n 800619a 80061aa: e7ad b.n 8006108 __HAL_RCC_HSI_DISABLE(); 80061ac: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80061ae: f7ff f98b bl 80054c8 80061b2: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80061b4: 6823 ldr r3, [r4, #0] 80061b6: 0798 lsls r0, r3, #30 80061b8: f57f af6d bpl.w 8006096 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80061bc: f7ff f984 bl 80054c8 80061c0: 1b80 subs r0, r0, r6 80061c2: 2802 cmp r0, #2 80061c4: d9f6 bls.n 80061b4 80061c6: e79f b.n 8006108 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 80061c8: 69aa ldr r2, [r5, #24] 80061ca: 4c4a ldr r4, [pc, #296] ; (80062f4 ) 80061cc: 4b4b ldr r3, [pc, #300] ; (80062fc ) 80061ce: b1da cbz r2, 8006208 __HAL_RCC_LSI_ENABLE(); 80061d0: 2201 movs r2, #1 80061d2: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80061d4: f7ff f978 bl 80054c8 80061d8: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80061da: 6a63 ldr r3, [r4, #36] ; 0x24 80061dc: 079b lsls r3, r3, #30 80061de: d50d bpl.n 80061fc * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80061e0: f44f 52fa mov.w r2, #8000 ; 0x1f40 80061e4: 4b46 ldr r3, [pc, #280] ; (8006300 ) 80061e6: 681b ldr r3, [r3, #0] 80061e8: fbb3 f3f2 udiv r3, r3, r2 80061ec: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 80061ee: bf00 nop do { __NOP(); } while (Delay --); 80061f0: 9b01 ldr r3, [sp, #4] 80061f2: 1e5a subs r2, r3, #1 80061f4: 9201 str r2, [sp, #4] 80061f6: 2b00 cmp r3, #0 80061f8: d1f9 bne.n 80061ee 80061fa: e750 b.n 800609e if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 80061fc: f7ff f964 bl 80054c8 8006200: 1b80 subs r0, r0, r6 8006202: 2802 cmp r0, #2 8006204: d9e9 bls.n 80061da 8006206: e77f b.n 8006108 __HAL_RCC_LSI_DISABLE(); 8006208: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 800620a: f7ff f95d bl 80054c8 800620e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8006210: 6a63 ldr r3, [r4, #36] ; 0x24 8006212: 079f lsls r7, r3, #30 8006214: f57f af43 bpl.w 800609e if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8006218: f7ff f956 bl 80054c8 800621c: 1b80 subs r0, r0, r6 800621e: 2802 cmp r0, #2 8006220: d9f6 bls.n 8006210 8006222: e771 b.n 8006108 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8006224: 4c33 ldr r4, [pc, #204] ; (80062f4 ) 8006226: 69e3 ldr r3, [r4, #28] 8006228: 00d8 lsls r0, r3, #3 800622a: d424 bmi.n 8006276 pwrclkchanged = SET; 800622c: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 800622e: 69e3 ldr r3, [r4, #28] 8006230: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8006234: 61e3 str r3, [r4, #28] 8006236: 69e3 ldr r3, [r4, #28] 8006238: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800623c: 9300 str r3, [sp, #0] 800623e: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8006240: 4e30 ldr r6, [pc, #192] ; (8006304 ) 8006242: 6833 ldr r3, [r6, #0] 8006244: 05d9 lsls r1, r3, #23 8006246: d518 bpl.n 800627a __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8006248: 68eb ldr r3, [r5, #12] 800624a: 2b01 cmp r3, #1 800624c: d126 bne.n 800629c 800624e: 6a23 ldr r3, [r4, #32] 8006250: f043 0301 orr.w r3, r3, #1 8006254: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8006256: f7ff f937 bl 80054c8 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 800625a: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 800625e: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8006260: 6a23 ldr r3, [r4, #32] 8006262: 079b lsls r3, r3, #30 8006264: d53f bpl.n 80062e6 if(pwrclkchanged == SET) 8006266: 2f00 cmp r7, #0 8006268: f43f af1d beq.w 80060a6 __HAL_RCC_PWR_CLK_DISABLE(); 800626c: 69e3 ldr r3, [r4, #28] 800626e: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8006272: 61e3 str r3, [r4, #28] 8006274: e717 b.n 80060a6 FlagStatus pwrclkchanged = RESET; 8006276: 2700 movs r7, #0 8006278: e7e2 b.n 8006240 SET_BIT(PWR->CR, PWR_CR_DBP); 800627a: 6833 ldr r3, [r6, #0] 800627c: f443 7380 orr.w r3, r3, #256 ; 0x100 8006280: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8006282: f7ff f921 bl 80054c8 8006286: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8006288: 6833 ldr r3, [r6, #0] 800628a: 05da lsls r2, r3, #23 800628c: d4dc bmi.n 8006248 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800628e: f7ff f91b bl 80054c8 8006292: eba0 0008 sub.w r0, r0, r8 8006296: 2864 cmp r0, #100 ; 0x64 8006298: d9f6 bls.n 8006288 800629a: e735 b.n 8006108 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 800629c: b9ab cbnz r3, 80062ca 800629e: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80062a0: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80062a4: f023 0301 bic.w r3, r3, #1 80062a8: 6223 str r3, [r4, #32] 80062aa: 6a23 ldr r3, [r4, #32] 80062ac: f023 0304 bic.w r3, r3, #4 80062b0: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 80062b2: f7ff f909 bl 80054c8 80062b6: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80062b8: 6a23 ldr r3, [r4, #32] 80062ba: 0798 lsls r0, r3, #30 80062bc: d5d3 bpl.n 8006266 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80062be: f7ff f903 bl 80054c8 80062c2: 1b80 subs r0, r0, r6 80062c4: 4540 cmp r0, r8 80062c6: d9f7 bls.n 80062b8 80062c8: e71e b.n 8006108 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80062ca: 2b05 cmp r3, #5 80062cc: 6a23 ldr r3, [r4, #32] 80062ce: d103 bne.n 80062d8 80062d0: f043 0304 orr.w r3, r3, #4 80062d4: 6223 str r3, [r4, #32] 80062d6: e7ba b.n 800624e 80062d8: f023 0301 bic.w r3, r3, #1 80062dc: 6223 str r3, [r4, #32] 80062de: 6a23 ldr r3, [r4, #32] 80062e0: f023 0304 bic.w r3, r3, #4 80062e4: e7b6 b.n 8006254 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80062e6: f7ff f8ef bl 80054c8 80062ea: eba0 0008 sub.w r0, r0, r8 80062ee: 42b0 cmp r0, r6 80062f0: d9b6 bls.n 8006260 80062f2: e709 b.n 8006108 80062f4: 40021000 .word 0x40021000 80062f8: 42420000 .word 0x42420000 80062fc: 42420480 .word 0x42420480 8006300: 20000200 .word 0x20000200 8006304: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8006308: 4c22 ldr r4, [pc, #136] ; (8006394 ) 800630a: 6863 ldr r3, [r4, #4] 800630c: f003 030c and.w r3, r3, #12 8006310: 2b08 cmp r3, #8 8006312: f43f aee2 beq.w 80060da 8006316: 2300 movs r3, #0 8006318: 4e1f ldr r6, [pc, #124] ; (8006398 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 800631a: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 800631c: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 800631e: d12b bne.n 8006378 tickstart = HAL_GetTick(); 8006320: f7ff f8d2 bl 80054c8 8006324: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8006326: 6823 ldr r3, [r4, #0] 8006328: 0199 lsls r1, r3, #6 800632a: d41f bmi.n 800636c if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 800632c: 6a2b ldr r3, [r5, #32] 800632e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8006332: d105 bne.n 8006340 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8006334: 6862 ldr r2, [r4, #4] 8006336: 68a9 ldr r1, [r5, #8] 8006338: f422 3200 bic.w r2, r2, #131072 ; 0x20000 800633c: 430a orrs r2, r1 800633e: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8006340: 6a69 ldr r1, [r5, #36] ; 0x24 8006342: 6862 ldr r2, [r4, #4] 8006344: 430b orrs r3, r1 8006346: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 800634a: 4313 orrs r3, r2 800634c: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 800634e: 2301 movs r3, #1 8006350: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8006352: f7ff f8b9 bl 80054c8 8006356: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8006358: 6823 ldr r3, [r4, #0] 800635a: 019a lsls r2, r3, #6 800635c: f53f aea7 bmi.w 80060ae if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8006360: f7ff f8b2 bl 80054c8 8006364: 1b40 subs r0, r0, r5 8006366: 2802 cmp r0, #2 8006368: d9f6 bls.n 8006358 800636a: e6cd b.n 8006108 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 800636c: f7ff f8ac bl 80054c8 8006370: 1bc0 subs r0, r0, r7 8006372: 2802 cmp r0, #2 8006374: d9d7 bls.n 8006326 8006376: e6c7 b.n 8006108 tickstart = HAL_GetTick(); 8006378: f7ff f8a6 bl 80054c8 800637c: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800637e: 6823 ldr r3, [r4, #0] 8006380: 019b lsls r3, r3, #6 8006382: f57f ae94 bpl.w 80060ae if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8006386: f7ff f89f bl 80054c8 800638a: 1b40 subs r0, r0, r5 800638c: 2802 cmp r0, #2 800638e: d9f6 bls.n 800637e 8006390: e6ba b.n 8006108 8006392: bf00 nop 8006394: 40021000 .word 0x40021000 8006398: 42420060 .word 0x42420060 0800639c : { 800639c: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 800639e: 4b19 ldr r3, [pc, #100] ; (8006404 ) { 80063a0: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 80063a2: ac02 add r4, sp, #8 80063a4: f103 0510 add.w r5, r3, #16 80063a8: 4622 mov r2, r4 80063aa: 6818 ldr r0, [r3, #0] 80063ac: 6859 ldr r1, [r3, #4] 80063ae: 3308 adds r3, #8 80063b0: c203 stmia r2!, {r0, r1} 80063b2: 42ab cmp r3, r5 80063b4: 4614 mov r4, r2 80063b6: d1f7 bne.n 80063a8 const uint8_t aPredivFactorTable[2] = {1, 2}; 80063b8: 2301 movs r3, #1 80063ba: f88d 3004 strb.w r3, [sp, #4] 80063be: 2302 movs r3, #2 tmpreg = RCC->CFGR; 80063c0: 4911 ldr r1, [pc, #68] ; (8006408 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 80063c2: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 80063c6: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 80063c8: f003 020c and.w r2, r3, #12 80063cc: 2a08 cmp r2, #8 80063ce: d117 bne.n 8006400 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80063d0: f3c3 4283 ubfx r2, r3, #18, #4 80063d4: a806 add r0, sp, #24 80063d6: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80063d8: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80063da: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80063de: d50c bpl.n 80063fa prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80063e0: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80063e2: 480a ldr r0, [pc, #40] ; (800640c ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80063e4: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80063e8: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80063ea: aa06 add r2, sp, #24 80063ec: 4413 add r3, r2 80063ee: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80063f2: fbb0 f0f3 udiv r0, r0, r3 } 80063f6: b007 add sp, #28 80063f8: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 80063fa: 4805 ldr r0, [pc, #20] ; (8006410 ) 80063fc: 4350 muls r0, r2 80063fe: e7fa b.n 80063f6 sysclockfreq = HSE_VALUE; 8006400: 4802 ldr r0, [pc, #8] ; (800640c ) return sysclockfreq; 8006402: e7f8 b.n 80063f6 8006404: 0800bc40 .word 0x0800bc40 8006408: 40021000 .word 0x40021000 800640c: 007a1200 .word 0x007a1200 8006410: 003d0900 .word 0x003d0900 08006414 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8006414: 4a54 ldr r2, [pc, #336] ; (8006568 ) { 8006416: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800641a: 6813 ldr r3, [r2, #0] { 800641c: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800641e: f003 0307 and.w r3, r3, #7 8006422: 428b cmp r3, r1 { 8006424: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8006426: d32a bcc.n 800647e if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8006428: 6829 ldr r1, [r5, #0] 800642a: 078c lsls r4, r1, #30 800642c: d434 bmi.n 8006498 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 800642e: 07ca lsls r2, r1, #31 8006430: d447 bmi.n 80064c2 if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8006432: 4a4d ldr r2, [pc, #308] ; (8006568 ) 8006434: 6813 ldr r3, [r2, #0] 8006436: f003 0307 and.w r3, r3, #7 800643a: 429e cmp r6, r3 800643c: f0c0 8082 bcc.w 8006544 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8006440: 682a ldr r2, [r5, #0] 8006442: 4c4a ldr r4, [pc, #296] ; (800656c ) 8006444: f012 0f04 tst.w r2, #4 8006448: f040 8087 bne.w 800655a if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800644c: 0713 lsls r3, r2, #28 800644e: d506 bpl.n 800645e MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8006450: 6863 ldr r3, [r4, #4] 8006452: 692a ldr r2, [r5, #16] 8006454: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8006458: ea43 03c2 orr.w r3, r3, r2, lsl #3 800645c: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 800645e: f7ff ff9d bl 800639c 8006462: 6863 ldr r3, [r4, #4] 8006464: 4a42 ldr r2, [pc, #264] ; (8006570 ) 8006466: f3c3 1303 ubfx r3, r3, #4, #4 800646a: 5cd3 ldrb r3, [r2, r3] 800646c: 40d8 lsrs r0, r3 800646e: 4b41 ldr r3, [pc, #260] ; (8006574 ) 8006470: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8006472: 2000 movs r0, #0 8006474: f7fe ffe6 bl 8005444 return HAL_OK; 8006478: 2000 movs r0, #0 } 800647a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 800647e: 6813 ldr r3, [r2, #0] 8006480: f023 0307 bic.w r3, r3, #7 8006484: 430b orrs r3, r1 8006486: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8006488: 6813 ldr r3, [r2, #0] 800648a: f003 0307 and.w r3, r3, #7 800648e: 4299 cmp r1, r3 8006490: d0ca beq.n 8006428 return HAL_ERROR; 8006492: 2001 movs r0, #1 8006494: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8006498: 4b34 ldr r3, [pc, #208] ; (800656c ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800649a: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 800649e: bf1e ittt ne 80064a0: 685a ldrne r2, [r3, #4] 80064a2: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 80064a6: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80064a8: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80064aa: bf42 ittt mi 80064ac: 685a ldrmi r2, [r3, #4] 80064ae: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 80064b2: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80064b4: 685a ldr r2, [r3, #4] 80064b6: 68a8 ldr r0, [r5, #8] 80064b8: f022 02f0 bic.w r2, r2, #240 ; 0xf0 80064bc: 4302 orrs r2, r0 80064be: 605a str r2, [r3, #4] 80064c0: e7b5 b.n 800642e if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80064c2: 686a ldr r2, [r5, #4] 80064c4: 4c29 ldr r4, [pc, #164] ; (800656c ) 80064c6: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80064c8: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80064ca: d11c bne.n 8006506 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80064cc: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80064d0: d0df beq.n 8006492 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80064d2: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80064d4: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80064d8: f023 0303 bic.w r3, r3, #3 80064dc: 4313 orrs r3, r2 80064de: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 80064e0: f7fe fff2 bl 80054c8 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80064e4: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 80064e6: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80064e8: 2b01 cmp r3, #1 80064ea: d114 bne.n 8006516 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 80064ec: 6863 ldr r3, [r4, #4] 80064ee: f003 030c and.w r3, r3, #12 80064f2: 2b04 cmp r3, #4 80064f4: d09d beq.n 8006432 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80064f6: f7fe ffe7 bl 80054c8 80064fa: 1bc0 subs r0, r0, r7 80064fc: 4540 cmp r0, r8 80064fe: d9f5 bls.n 80064ec return HAL_TIMEOUT; 8006500: 2003 movs r0, #3 8006502: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8006506: 2a02 cmp r2, #2 8006508: d102 bne.n 8006510 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 800650a: f013 7f00 tst.w r3, #33554432 ; 0x2000000 800650e: e7df b.n 80064d0 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8006510: f013 0f02 tst.w r3, #2 8006514: e7dc b.n 80064d0 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8006516: 2b02 cmp r3, #2 8006518: d10f bne.n 800653a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 800651a: 6863 ldr r3, [r4, #4] 800651c: f003 030c and.w r3, r3, #12 8006520: 2b08 cmp r3, #8 8006522: d086 beq.n 8006432 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8006524: f7fe ffd0 bl 80054c8 8006528: 1bc0 subs r0, r0, r7 800652a: 4540 cmp r0, r8 800652c: d9f5 bls.n 800651a 800652e: e7e7 b.n 8006500 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8006530: f7fe ffca bl 80054c8 8006534: 1bc0 subs r0, r0, r7 8006536: 4540 cmp r0, r8 8006538: d8e2 bhi.n 8006500 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 800653a: 6863 ldr r3, [r4, #4] 800653c: f013 0f0c tst.w r3, #12 8006540: d1f6 bne.n 8006530 8006542: e776 b.n 8006432 __HAL_FLASH_SET_LATENCY(FLatency); 8006544: 6813 ldr r3, [r2, #0] 8006546: f023 0307 bic.w r3, r3, #7 800654a: 4333 orrs r3, r6 800654c: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 800654e: 6813 ldr r3, [r2, #0] 8006550: f003 0307 and.w r3, r3, #7 8006554: 429e cmp r6, r3 8006556: d19c bne.n 8006492 8006558: e772 b.n 8006440 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800655a: 6863 ldr r3, [r4, #4] 800655c: 68e9 ldr r1, [r5, #12] 800655e: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8006562: 430b orrs r3, r1 8006564: 6063 str r3, [r4, #4] 8006566: e771 b.n 800644c 8006568: 40022000 .word 0x40022000 800656c: 40021000 .word 0x40021000 8006570: 0800c439 .word 0x0800c439 8006574: 20000200 .word 0x20000200 08006578 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8006578: 4b04 ldr r3, [pc, #16] ; (800658c ) 800657a: 4a05 ldr r2, [pc, #20] ; (8006590 ) 800657c: 685b ldr r3, [r3, #4] 800657e: f3c3 2302 ubfx r3, r3, #8, #3 8006582: 5cd3 ldrb r3, [r2, r3] 8006584: 4a03 ldr r2, [pc, #12] ; (8006594 ) 8006586: 6810 ldr r0, [r2, #0] } 8006588: 40d8 lsrs r0, r3 800658a: 4770 bx lr 800658c: 40021000 .word 0x40021000 8006590: 0800c449 .word 0x0800c449 8006594: 20000200 .word 0x20000200 08006598 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8006598: 4b04 ldr r3, [pc, #16] ; (80065ac ) 800659a: 4a05 ldr r2, [pc, #20] ; (80065b0 ) 800659c: 685b ldr r3, [r3, #4] 800659e: f3c3 23c2 ubfx r3, r3, #11, #3 80065a2: 5cd3 ldrb r3, [r2, r3] 80065a4: 4a03 ldr r2, [pc, #12] ; (80065b4 ) 80065a6: 6810 ldr r0, [r2, #0] } 80065a8: 40d8 lsrs r0, r3 80065aa: 4770 bx lr 80065ac: 40021000 .word 0x40021000 80065b0: 0800c449 .word 0x0800c449 80065b4: 20000200 .word 0x20000200 080065b8 : /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 80065b8: 6803 ldr r3, [r0, #0] { 80065ba: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 80065be: 07d9 lsls r1, r3, #31 { 80065c0: 4605 mov r5, r0 if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 80065c2: d520 bpl.n 8006606 FlagStatus pwrclkchanged = RESET; /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 80065c4: 4c35 ldr r4, [pc, #212] ; (800669c ) 80065c6: 69e3 ldr r3, [r4, #28] 80065c8: 00da lsls r2, r3, #3 80065ca: d432 bmi.n 8006632 { __HAL_RCC_PWR_CLK_ENABLE(); pwrclkchanged = SET; 80065cc: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 80065ce: 69e3 ldr r3, [r4, #28] 80065d0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 80065d4: 61e3 str r3, [r4, #28] 80065d6: 69e3 ldr r3, [r4, #28] 80065d8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80065dc: 9301 str r3, [sp, #4] 80065de: 9b01 ldr r3, [sp, #4] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80065e0: 4e2f ldr r6, [pc, #188] ; (80066a0 ) 80065e2: 6833 ldr r3, [r6, #0] 80065e4: 05db lsls r3, r3, #23 80065e6: d526 bpl.n 8006636 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 80065e8: 6a23 ldr r3, [r4, #32] if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 80065ea: f413 7340 ands.w r3, r3, #768 ; 0x300 80065ee: d136 bne.n 800665e return HAL_TIMEOUT; } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 80065f0: 6a23 ldr r3, [r4, #32] 80065f2: 686a ldr r2, [r5, #4] 80065f4: f423 7340 bic.w r3, r3, #768 ; 0x300 80065f8: 4313 orrs r3, r2 80065fa: 6223 str r3, [r4, #32] /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) 80065fc: b11f cbz r7, 8006606 { __HAL_RCC_PWR_CLK_DISABLE(); 80065fe: 69e3 ldr r3, [r4, #28] 8006600: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8006604: 61e3 str r3, [r4, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8006606: 6828 ldr r0, [r5, #0] 8006608: 0783 lsls r3, r0, #30 800660a: d506 bpl.n 800661a { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 800660c: 4a23 ldr r2, [pc, #140] ; (800669c ) 800660e: 68a9 ldr r1, [r5, #8] 8006610: 6853 ldr r3, [r2, #4] 8006612: f423 4340 bic.w r3, r3, #49152 ; 0xc000 8006616: 430b orrs r3, r1 8006618: 6053 str r3, [r2, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 800661a: f010 0010 ands.w r0, r0, #16 800661e: d01b beq.n 8006658 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8006620: 4a1e ldr r2, [pc, #120] ; (800669c ) 8006622: 6969 ldr r1, [r5, #20] 8006624: 6853 ldr r3, [r2, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8006626: 2000 movs r0, #0 __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8006628: f423 0380 bic.w r3, r3, #4194304 ; 0x400000 800662c: 430b orrs r3, r1 800662e: 6053 str r3, [r2, #4] 8006630: e012 b.n 8006658 FlagStatus pwrclkchanged = RESET; 8006632: 2700 movs r7, #0 8006634: e7d4 b.n 80065e0 SET_BIT(PWR->CR, PWR_CR_DBP); 8006636: 6833 ldr r3, [r6, #0] 8006638: f443 7380 orr.w r3, r3, #256 ; 0x100 800663c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 800663e: f7fe ff43 bl 80054c8 8006642: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8006644: 6833 ldr r3, [r6, #0] 8006646: 05d8 lsls r0, r3, #23 8006648: d4ce bmi.n 80065e8 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800664a: f7fe ff3d bl 80054c8 800664e: eba0 0008 sub.w r0, r0, r8 8006652: 2864 cmp r0, #100 ; 0x64 8006654: d9f6 bls.n 8006644 return HAL_TIMEOUT; 8006656: 2003 movs r0, #3 } 8006658: b002 add sp, #8 800665a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 800665e: 686a ldr r2, [r5, #4] 8006660: f402 7240 and.w r2, r2, #768 ; 0x300 8006664: 4293 cmp r3, r2 8006666: d0c3 beq.n 80065f0 __HAL_RCC_BACKUPRESET_FORCE(); 8006668: 2001 movs r0, #1 800666a: 4a0e ldr r2, [pc, #56] ; (80066a4 ) temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 800666c: 6a23 ldr r3, [r4, #32] __HAL_RCC_BACKUPRESET_FORCE(); 800666e: 6010 str r0, [r2, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8006670: 2000 movs r0, #0 temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8006672: f423 7140 bic.w r1, r3, #768 ; 0x300 __HAL_RCC_BACKUPRESET_RELEASE(); 8006676: 6010 str r0, [r2, #0] RCC->BDCR = temp_reg; 8006678: 6221 str r1, [r4, #32] if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 800667a: 07d9 lsls r1, r3, #31 800667c: d5b8 bpl.n 80065f0 tickstart = HAL_GetTick(); 800667e: f7fe ff23 bl 80054c8 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8006682: f241 3888 movw r8, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8006686: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8006688: 6a23 ldr r3, [r4, #32] 800668a: 079a lsls r2, r3, #30 800668c: d4b0 bmi.n 80065f0 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 800668e: f7fe ff1b bl 80054c8 8006692: 1b80 subs r0, r0, r6 8006694: 4540 cmp r0, r8 8006696: d9f7 bls.n 8006688 8006698: e7dd b.n 8006656 800669a: bf00 nop 800669c: 40021000 .word 0x40021000 80066a0: 40007000 .word 0x40007000 80066a4: 42420440 .word 0x42420440 080066a8 : * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock @endif * @retval Frequency in Hz (0: means that no available frequency for the peripheral) */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { 80066a8: 4602 mov r2, r0 80066aa: b570 push {r4, r5, r6, lr} uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; #endif /* STM32F105xC || STM32F107xC */ #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || \ defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 80066ac: 4b3b ldr r3, [pc, #236] ; (800679c ) { 80066ae: b086 sub sp, #24 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 80066b0: ad02 add r5, sp, #8 80066b2: f103 0610 add.w r6, r3, #16 80066b6: 462c mov r4, r5 80066b8: 6818 ldr r0, [r3, #0] 80066ba: 6859 ldr r1, [r3, #4] 80066bc: 3308 adds r3, #8 80066be: c403 stmia r4!, {r0, r1} 80066c0: 42b3 cmp r3, r6 80066c2: 4625 mov r5, r4 80066c4: d1f7 bne.n 80066b6 const uint8_t aPredivFactorTable[2] = {1, 2}; 80066c6: 2301 movs r3, #1 80066c8: f88d 3004 strb.w r3, [sp, #4] 80066cc: 2302 movs r3, #2 uint32_t temp_reg = 0U, frequency = 0U; /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); switch (PeriphClk) 80066ce: 1e50 subs r0, r2, #1 const uint8_t aPredivFactorTable[2] = {1, 2}; 80066d0: f88d 3005 strb.w r3, [sp, #5] switch (PeriphClk) 80066d4: 280f cmp r0, #15 80066d6: d85e bhi.n 8006796 80066d8: e8df f000 tbb [pc, r0] 80066dc: 2d5d5132 .word 0x2d5d5132 80066e0: 2d5d5d5d .word 0x2d5d5d5d 80066e4: 5d5d5d5d .word 0x5d5d5d5d 80066e8: 085d5d5d .word 0x085d5d5d || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) case RCC_PERIPHCLK_USB: { /* Get RCC configuration ------------------------------------------------------*/ temp_reg = RCC->CFGR; 80066ec: 4b2c ldr r3, [pc, #176] ; (80067a0 ) 80066ee: 6859 ldr r1, [r3, #4] /* Check if PLL is enabled */ if (HAL_IS_BIT_SET(RCC->CR,RCC_CR_PLLON)) 80066f0: 6818 ldr r0, [r3, #0] 80066f2: f010 7080 ands.w r0, r0, #16777216 ; 0x1000000 80066f6: d037 beq.n 8006768 { pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80066f8: f3c1 4283 ubfx r2, r1, #18, #4 80066fc: a806 add r0, sp, #24 80066fe: 4402 add r2, r0 8006700: f812 0c10 ldrb.w r0, [r2, #-16] if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8006704: 03ca lsls r2, r1, #15 { #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ || defined(STM32F100xE) prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8006706: bf41 itttt mi 8006708: 685a ldrmi r2, [r3, #4] 800670a: a906 addmi r1, sp, #24 800670c: f3c2 4240 ubfxmi r2, r2, #17, #1 8006710: 1852 addmi r2, r2, r1 8006712: bf44 itt mi 8006714: f812 1c14 ldrbmi.w r1, [r2, #-20] } #else if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 8006718: 4a22 ldrmi r2, [pc, #136] ; (80067a4 ) /* Prescaler of 3 selected for USB */ frequency = (2 * pllclk) / 3; } #else /* USBCLK = PLLCLK / USB prescaler */ if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) 800671a: 685b ldr r3, [r3, #4] pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 800671c: bf4c ite mi 800671e: fbb2 f2f1 udivmi r2, r2, r1 pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8006722: 4a21 ldrpl r2, [pc, #132] ; (80067a8 ) if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) 8006724: 025b lsls r3, r3, #9 pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8006726: fb02 f000 mul.w r0, r2, r0 if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) 800672a: d41d bmi.n 8006768 frequency = pllclk; } else { /* Prescaler of 1.5 selected for USB */ frequency = (pllclk * 2) / 3; 800672c: 2303 movs r3, #3 800672e: 0040 lsls r0, r0, #1 } break; } case RCC_PERIPHCLK_ADC: { frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 8006730: fbb0 f0f3 udiv r0, r0, r3 break; 8006734: e018 b.n 8006768 { break; } } return(frequency); } 8006736: b006 add sp, #24 8006738: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} frequency = HAL_RCC_GetSysClockFreq(); 800673c: f7ff be2e b.w 800639c if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 8006740: f240 3102 movw r1, #770 ; 0x302 temp_reg = RCC->BDCR; 8006744: 4a16 ldr r2, [pc, #88] ; (80067a0 ) 8006746: 6a13 ldr r3, [r2, #32] if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) 8006748: 4019 ands r1, r3 800674a: f5b1 7f81 cmp.w r1, #258 ; 0x102 800674e: d01f beq.n 8006790 else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 8006750: f403 7340 and.w r3, r3, #768 ; 0x300 8006754: f5b3 7f00 cmp.w r3, #512 ; 0x200 8006758: d108 bne.n 800676c frequency = LSI_VALUE; 800675a: f649 4040 movw r0, #40000 ; 0x9c40 else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) 800675e: 6a53 ldr r3, [r2, #36] ; 0x24 frequency = LSI_VALUE; 8006760: f013 0f02 tst.w r3, #2 frequency = HSE_VALUE / 128U; 8006764: bf08 it eq 8006766: 2000 moveq r0, #0 } 8006768: b006 add sp, #24 800676a: bd70 pop {r4, r5, r6, pc} else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) 800676c: f5b3 7f40 cmp.w r3, #768 ; 0x300 8006770: d111 bne.n 8006796 8006772: 6813 ldr r3, [r2, #0] frequency = HSE_VALUE / 128U; 8006774: f24f 4024 movw r0, #62500 ; 0xf424 8006778: f413 3f00 tst.w r3, #131072 ; 0x20000 800677c: e7f2 b.n 8006764 frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); 800677e: f7ff ff0b bl 8006598 8006782: 4b07 ldr r3, [pc, #28] ; (80067a0 ) 8006784: 685b ldr r3, [r3, #4] 8006786: f3c3 3381 ubfx r3, r3, #14, #2 800678a: 3301 adds r3, #1 800678c: 005b lsls r3, r3, #1 800678e: e7cf b.n 8006730 frequency = LSE_VALUE; 8006790: f44f 4000 mov.w r0, #32768 ; 0x8000 8006794: e7e8 b.n 8006768 frequency = 0U; 8006796: 2000 movs r0, #0 8006798: e7e6 b.n 8006768 800679a: bf00 nop 800679c: 0800bc50 .word 0x0800bc50 80067a0: 40021000 .word 0x40021000 80067a4: 007a1200 .word 0x007a1200 80067a8: 003d0900 .word 0x003d0900 080067ac : 80067ac: 4770 bx lr 080067ae : 80067ae: 4770 bx lr 080067b0 : 80067b0: 4770 bx lr 080067b2 : 80067b2: 4770 bx lr 080067b4 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80067b4: 6803 ldr r3, [r0, #0] { 80067b6: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80067b8: 691a ldr r2, [r3, #16] { 80067ba: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80067bc: 0791 lsls r1, r2, #30 80067be: d50e bpl.n 80067de { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 80067c0: 68da ldr r2, [r3, #12] 80067c2: 0792 lsls r2, r2, #30 80067c4: d50b bpl.n 80067de { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80067c6: f06f 0202 mvn.w r2, #2 80067ca: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80067cc: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80067ce: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80067d0: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80067d2: 079b lsls r3, r3, #30 80067d4: d077 beq.n 80068c6 { HAL_TIM_IC_CaptureCallback(htim); 80067d6: f7ff ffea bl 80067ae else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80067da: 2300 movs r3, #0 80067dc: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80067de: 6823 ldr r3, [r4, #0] 80067e0: 691a ldr r2, [r3, #16] 80067e2: 0750 lsls r0, r2, #29 80067e4: d510 bpl.n 8006808 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 80067e6: 68da ldr r2, [r3, #12] 80067e8: 0751 lsls r1, r2, #29 80067ea: d50d bpl.n 8006808 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 80067ec: f06f 0204 mvn.w r2, #4 80067f0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80067f2: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80067f4: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80067f6: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80067f8: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 80067fc: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80067fe: d068 beq.n 80068d2 HAL_TIM_IC_CaptureCallback(htim); 8006800: f7ff ffd5 bl 80067ae else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8006804: 2300 movs r3, #0 8006806: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8006808: 6823 ldr r3, [r4, #0] 800680a: 691a ldr r2, [r3, #16] 800680c: 0712 lsls r2, r2, #28 800680e: d50f bpl.n 8006830 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8006810: 68da ldr r2, [r3, #12] 8006812: 0710 lsls r0, r2, #28 8006814: d50c bpl.n 8006830 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8006816: f06f 0208 mvn.w r2, #8 800681a: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800681c: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800681e: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8006820: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8006822: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8006824: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8006826: d05a beq.n 80068de HAL_TIM_IC_CaptureCallback(htim); 8006828: f7ff ffc1 bl 80067ae else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800682c: 2300 movs r3, #0 800682e: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8006830: 6823 ldr r3, [r4, #0] 8006832: 691a ldr r2, [r3, #16] 8006834: 06d2 lsls r2, r2, #27 8006836: d510 bpl.n 800685a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8006838: 68da ldr r2, [r3, #12] 800683a: 06d0 lsls r0, r2, #27 800683c: d50d bpl.n 800685a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 800683e: f06f 0210 mvn.w r2, #16 8006842: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8006844: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8006846: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8006848: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800684a: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 800684e: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8006850: d04b beq.n 80068ea HAL_TIM_IC_CaptureCallback(htim); 8006852: f7ff ffac bl 80067ae else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8006856: 2300 movs r3, #0 8006858: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 800685a: 6823 ldr r3, [r4, #0] 800685c: 691a ldr r2, [r3, #16] 800685e: 07d1 lsls r1, r2, #31 8006860: d508 bpl.n 8006874 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8006862: 68da ldr r2, [r3, #12] 8006864: 07d2 lsls r2, r2, #31 8006866: d505 bpl.n 8006874 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8006868: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 800686c: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 800686e: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8006870: f001 f984 bl 8007b7c } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8006874: 6823 ldr r3, [r4, #0] 8006876: 691a ldr r2, [r3, #16] 8006878: 0610 lsls r0, r2, #24 800687a: d508 bpl.n 800688e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 800687c: 68da ldr r2, [r3, #12] 800687e: 0611 lsls r1, r2, #24 8006880: d505 bpl.n 800688e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8006882: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8006886: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8006888: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 800688a: f000 f8be bl 8006a0a } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 800688e: 6823 ldr r3, [r4, #0] 8006890: 691a ldr r2, [r3, #16] 8006892: 0652 lsls r2, r2, #25 8006894: d508 bpl.n 80068a8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8006896: 68da ldr r2, [r3, #12] 8006898: 0650 lsls r0, r2, #25 800689a: d505 bpl.n 80068a8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 800689c: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80068a0: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80068a2: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80068a4: f7ff ff85 bl 80067b2 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80068a8: 6823 ldr r3, [r4, #0] 80068aa: 691a ldr r2, [r3, #16] 80068ac: 0691 lsls r1, r2, #26 80068ae: d522 bpl.n 80068f6 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 80068b0: 68da ldr r2, [r3, #12] 80068b2: 0692 lsls r2, r2, #26 80068b4: d51f bpl.n 80068f6 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80068b6: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 80068ba: 4620 mov r0, r4 } } } 80068bc: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80068c0: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 80068c2: f000 b8a1 b.w 8006a08 HAL_TIM_OC_DelayElapsedCallback(htim); 80068c6: f7ff ff71 bl 80067ac HAL_TIM_PWM_PulseFinishedCallback(htim); 80068ca: 4620 mov r0, r4 80068cc: f7ff ff70 bl 80067b0 80068d0: e783 b.n 80067da HAL_TIM_OC_DelayElapsedCallback(htim); 80068d2: f7ff ff6b bl 80067ac HAL_TIM_PWM_PulseFinishedCallback(htim); 80068d6: 4620 mov r0, r4 80068d8: f7ff ff6a bl 80067b0 80068dc: e792 b.n 8006804 HAL_TIM_OC_DelayElapsedCallback(htim); 80068de: f7ff ff65 bl 80067ac HAL_TIM_PWM_PulseFinishedCallback(htim); 80068e2: 4620 mov r0, r4 80068e4: f7ff ff64 bl 80067b0 80068e8: e7a0 b.n 800682c HAL_TIM_OC_DelayElapsedCallback(htim); 80068ea: f7ff ff5f bl 80067ac HAL_TIM_PWM_PulseFinishedCallback(htim); 80068ee: 4620 mov r0, r4 80068f0: f7ff ff5e bl 80067b0 80068f4: e7af b.n 8006856 80068f6: bd10 pop {r4, pc} 080068f8 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80068f8: 4a24 ldr r2, [pc, #144] ; (800698c ) tmpcr1 = TIMx->CR1; 80068fa: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80068fc: 4290 cmp r0, r2 80068fe: d012 beq.n 8006926 8006900: f502 6200 add.w r2, r2, #2048 ; 0x800 8006904: 4290 cmp r0, r2 8006906: d00e beq.n 8006926 8006908: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 800690c: d00b beq.n 8006926 800690e: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8006912: 4290 cmp r0, r2 8006914: d007 beq.n 8006926 8006916: f502 6280 add.w r2, r2, #1024 ; 0x400 800691a: 4290 cmp r0, r2 800691c: d003 beq.n 8006926 800691e: f502 6280 add.w r2, r2, #1024 ; 0x400 8006922: 4290 cmp r0, r2 8006924: d11d bne.n 8006962 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8006926: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8006928: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 800692c: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800692e: 4a17 ldr r2, [pc, #92] ; (800698c ) 8006930: 4290 cmp r0, r2 8006932: d012 beq.n 800695a 8006934: f502 6200 add.w r2, r2, #2048 ; 0x800 8006938: 4290 cmp r0, r2 800693a: d00e beq.n 800695a 800693c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8006940: d00b beq.n 800695a 8006942: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8006946: 4290 cmp r0, r2 8006948: d007 beq.n 800695a 800694a: f502 6280 add.w r2, r2, #1024 ; 0x400 800694e: 4290 cmp r0, r2 8006950: d003 beq.n 800695a 8006952: f502 6280 add.w r2, r2, #1024 ; 0x400 8006956: 4290 cmp r0, r2 8006958: d103 bne.n 8006962 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 800695a: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 800695c: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8006960: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8006962: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8006964: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8006968: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 800696a: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 800696c: 688b ldr r3, [r1, #8] 800696e: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8006970: 680b ldr r3, [r1, #0] 8006972: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8006974: 4b05 ldr r3, [pc, #20] ; (800698c ) 8006976: 4298 cmp r0, r3 8006978: d003 beq.n 8006982 800697a: f503 6300 add.w r3, r3, #2048 ; 0x800 800697e: 4298 cmp r0, r3 8006980: d101 bne.n 8006986 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8006982: 690b ldr r3, [r1, #16] 8006984: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 8006986: 2301 movs r3, #1 8006988: 6143 str r3, [r0, #20] 800698a: 4770 bx lr 800698c: 40012c00 .word 0x40012c00 08006990 : { 8006990: b510 push {r4, lr} if(htim == NULL) 8006992: 4604 mov r4, r0 8006994: b1a0 cbz r0, 80069c0 if(htim->State == HAL_TIM_STATE_RESET) 8006996: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 800699a: f003 02ff and.w r2, r3, #255 ; 0xff 800699e: b91b cbnz r3, 80069a8 htim->Lock = HAL_UNLOCKED; 80069a0: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80069a4: f001 fe82 bl 80086ac htim->State= HAL_TIM_STATE_BUSY; 80069a8: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80069aa: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 80069ac: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80069b0: 1d21 adds r1, r4, #4 80069b2: f7ff ffa1 bl 80068f8 htim->State= HAL_TIM_STATE_READY; 80069b6: 2301 movs r3, #1 return HAL_OK; 80069b8: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 80069ba: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80069be: bd10 pop {r4, pc} return HAL_ERROR; 80069c0: 2001 movs r0, #1 } 80069c2: bd10 pop {r4, pc} 080069c4 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 80069c4: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80069c8: b510 push {r4, lr} __HAL_LOCK(htim); 80069ca: 2b01 cmp r3, #1 80069cc: f04f 0302 mov.w r3, #2 80069d0: d018 beq.n 8006a04 htim->State = HAL_TIM_STATE_BUSY; 80069d2: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80069d6: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80069d8: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80069da: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80069dc: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80069de: f022 0270 bic.w r2, r2, #112 ; 0x70 80069e2: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80069e4: 685a ldr r2, [r3, #4] 80069e6: 4322 orrs r2, r4 80069e8: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 80069ea: 689a ldr r2, [r3, #8] 80069ec: f022 0280 bic.w r2, r2, #128 ; 0x80 80069f0: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80069f2: 689a ldr r2, [r3, #8] 80069f4: 430a orrs r2, r1 80069f6: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 80069f8: 2301 movs r3, #1 80069fa: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 80069fe: 2300 movs r3, #0 8006a00: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8006a04: 4618 mov r0, r3 return HAL_OK; } 8006a06: bd10 pop {r4, pc} 08006a08 : 8006a08: 4770 bx lr 08006a0a : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8006a0a: 4770 bx lr 08006a0c : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8006a0c: 6803 ldr r3, [r0, #0] 8006a0e: 68da ldr r2, [r3, #12] 8006a10: f422 7290 bic.w r2, r2, #288 ; 0x120 8006a14: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8006a16: 695a ldr r2, [r3, #20] 8006a18: f022 0201 bic.w r2, r2, #1 8006a1c: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8006a1e: 2320 movs r3, #32 8006a20: f880 303a strb.w r3, [r0, #58] ; 0x3a 8006a24: 4770 bx lr ... 08006a28 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8006a28: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8006a2c: 6805 ldr r5, [r0, #0] 8006a2e: 68c2 ldr r2, [r0, #12] 8006a30: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006a32: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8006a34: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8006a38: 4313 orrs r3, r2 8006a3a: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006a3c: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 8006a3e: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006a40: 430b orrs r3, r1 8006a42: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8006a44: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 8006a48: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006a4c: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 8006a4e: 4313 orrs r3, r2 8006a50: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8006a52: 696b ldr r3, [r5, #20] 8006a54: 6982 ldr r2, [r0, #24] 8006a56: f423 7340 bic.w r3, r3, #768 ; 0x300 8006a5a: 4313 orrs r3, r2 8006a5c: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 8006a5e: 4b40 ldr r3, [pc, #256] ; (8006b60 ) { 8006a60: 4681 mov r9, r0 if(huart->Instance == USART1) 8006a62: 429d cmp r5, r3 8006a64: f04f 0419 mov.w r4, #25 8006a68: d146 bne.n 8006af8 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8006a6a: f7ff fd95 bl 8006598 8006a6e: fb04 f300 mul.w r3, r4, r0 8006a72: f8d9 6004 ldr.w r6, [r9, #4] 8006a76: f04f 0864 mov.w r8, #100 ; 0x64 8006a7a: 00b6 lsls r6, r6, #2 8006a7c: fbb3 f3f6 udiv r3, r3, r6 8006a80: fbb3 f3f8 udiv r3, r3, r8 8006a84: 011e lsls r6, r3, #4 8006a86: f7ff fd87 bl 8006598 8006a8a: 4360 muls r0, r4 8006a8c: f8d9 3004 ldr.w r3, [r9, #4] 8006a90: 009b lsls r3, r3, #2 8006a92: fbb0 f7f3 udiv r7, r0, r3 8006a96: f7ff fd7f bl 8006598 8006a9a: 4360 muls r0, r4 8006a9c: f8d9 3004 ldr.w r3, [r9, #4] 8006aa0: 009b lsls r3, r3, #2 8006aa2: fbb0 f3f3 udiv r3, r0, r3 8006aa6: fbb3 f3f8 udiv r3, r3, r8 8006aaa: fb08 7313 mls r3, r8, r3, r7 8006aae: 011b lsls r3, r3, #4 8006ab0: 3332 adds r3, #50 ; 0x32 8006ab2: fbb3 f3f8 udiv r3, r3, r8 8006ab6: f003 07f0 and.w r7, r3, #240 ; 0xf0 8006aba: f7ff fd6d bl 8006598 8006abe: 4360 muls r0, r4 8006ac0: f8d9 2004 ldr.w r2, [r9, #4] 8006ac4: 0092 lsls r2, r2, #2 8006ac6: fbb0 faf2 udiv sl, r0, r2 8006aca: f7ff fd65 bl 8006598 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 8006ace: 4360 muls r0, r4 8006ad0: f8d9 3004 ldr.w r3, [r9, #4] 8006ad4: 009b lsls r3, r3, #2 8006ad6: fbb0 f3f3 udiv r3, r0, r3 8006ada: fbb3 f3f8 udiv r3, r3, r8 8006ade: fb08 a313 mls r3, r8, r3, sl 8006ae2: 011b lsls r3, r3, #4 8006ae4: 3332 adds r3, #50 ; 0x32 8006ae6: fbb3 f3f8 udiv r3, r3, r8 8006aea: f003 030f and.w r3, r3, #15 8006aee: 433b orrs r3, r7 8006af0: 4433 add r3, r6 8006af2: 60ab str r3, [r5, #8] 8006af4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8006af8: f7ff fd3e bl 8006578 8006afc: fb04 f300 mul.w r3, r4, r0 8006b00: f8d9 6004 ldr.w r6, [r9, #4] 8006b04: f04f 0864 mov.w r8, #100 ; 0x64 8006b08: 00b6 lsls r6, r6, #2 8006b0a: fbb3 f3f6 udiv r3, r3, r6 8006b0e: fbb3 f3f8 udiv r3, r3, r8 8006b12: 011e lsls r6, r3, #4 8006b14: f7ff fd30 bl 8006578 8006b18: 4360 muls r0, r4 8006b1a: f8d9 3004 ldr.w r3, [r9, #4] 8006b1e: 009b lsls r3, r3, #2 8006b20: fbb0 f7f3 udiv r7, r0, r3 8006b24: f7ff fd28 bl 8006578 8006b28: 4360 muls r0, r4 8006b2a: f8d9 3004 ldr.w r3, [r9, #4] 8006b2e: 009b lsls r3, r3, #2 8006b30: fbb0 f3f3 udiv r3, r0, r3 8006b34: fbb3 f3f8 udiv r3, r3, r8 8006b38: fb08 7313 mls r3, r8, r3, r7 8006b3c: 011b lsls r3, r3, #4 8006b3e: 3332 adds r3, #50 ; 0x32 8006b40: fbb3 f3f8 udiv r3, r3, r8 8006b44: f003 07f0 and.w r7, r3, #240 ; 0xf0 8006b48: f7ff fd16 bl 8006578 8006b4c: 4360 muls r0, r4 8006b4e: f8d9 2004 ldr.w r2, [r9, #4] 8006b52: 0092 lsls r2, r2, #2 8006b54: fbb0 faf2 udiv sl, r0, r2 8006b58: f7ff fd0e bl 8006578 8006b5c: e7b7 b.n 8006ace 8006b5e: bf00 nop 8006b60: 40013800 .word 0x40013800 08006b64 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8006b64: b5f8 push {r3, r4, r5, r6, r7, lr} 8006b66: 4604 mov r4, r0 8006b68: 460e mov r6, r1 8006b6a: 4617 mov r7, r2 8006b6c: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8006b6e: 6821 ldr r1, [r4, #0] 8006b70: 680b ldr r3, [r1, #0] 8006b72: ea36 0303 bics.w r3, r6, r3 8006b76: d101 bne.n 8006b7c return HAL_OK; 8006b78: 2000 movs r0, #0 } 8006b7a: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8006b7c: 1c6b adds r3, r5, #1 8006b7e: d0f7 beq.n 8006b70 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8006b80: b995 cbnz r5, 8006ba8 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8006b82: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8006b84: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8006b86: 68da ldr r2, [r3, #12] 8006b88: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8006b8c: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8006b8e: 695a ldr r2, [r3, #20] 8006b90: f022 0201 bic.w r2, r2, #1 8006b94: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8006b96: 2320 movs r3, #32 8006b98: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8006b9c: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 8006ba0: 2300 movs r3, #0 8006ba2: f884 3038 strb.w r3, [r4, #56] ; 0x38 8006ba6: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8006ba8: f7fe fc8e bl 80054c8 8006bac: 1bc0 subs r0, r0, r7 8006bae: 4285 cmp r5, r0 8006bb0: d2dd bcs.n 8006b6e 8006bb2: e7e6 b.n 8006b82 08006bb4 : { 8006bb4: b510 push {r4, lr} if(huart == NULL) 8006bb6: 4604 mov r4, r0 8006bb8: b340 cbz r0, 8006c0c if(huart->gState == HAL_UART_STATE_RESET) 8006bba: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 8006bbe: f003 02ff and.w r2, r3, #255 ; 0xff 8006bc2: b91b cbnz r3, 8006bcc huart->Lock = HAL_UNLOCKED; 8006bc4: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8006bc8: f001 fd84 bl 80086d4 huart->gState = HAL_UART_STATE_BUSY; 8006bcc: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 8006bce: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8006bd0: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8006bd4: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8006bd6: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8006bd8: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8006bdc: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 8006bde: f7ff ff23 bl 8006a28 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8006be2: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8006be4: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8006be6: 691a ldr r2, [r3, #16] 8006be8: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8006bec: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8006bee: 695a ldr r2, [r3, #20] 8006bf0: f022 022a bic.w r2, r2, #42 ; 0x2a 8006bf4: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8006bf6: 68da ldr r2, [r3, #12] 8006bf8: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8006bfc: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8006bfe: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006c00: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8006c02: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 8006c06: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 8006c0a: bd10 pop {r4, pc} return HAL_ERROR; 8006c0c: 2001 movs r0, #1 } 8006c0e: bd10 pop {r4, pc} 08006c10 : { 8006c10: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8006c14: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 8006c16: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 8006c1a: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8006c1c: 2b20 cmp r3, #32 { 8006c1e: 460d mov r5, r1 8006c20: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8006c22: d14e bne.n 8006cc2 if((pData == NULL) || (Size == 0U)) 8006c24: 2900 cmp r1, #0 8006c26: d049 beq.n 8006cbc 8006c28: 2a00 cmp r2, #0 8006c2a: d047 beq.n 8006cbc __HAL_LOCK(huart); 8006c2c: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8006c30: 2b01 cmp r3, #1 8006c32: d046 beq.n 8006cc2 8006c34: 2301 movs r3, #1 8006c36: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006c3a: 2300 movs r3, #0 8006c3c: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8006c3e: 2321 movs r3, #33 ; 0x21 8006c40: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8006c44: f7fe fc40 bl 80054c8 8006c48: 4606 mov r6, r0 huart->TxXferSize = Size; 8006c4a: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8006c4e: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8006c52: 8ce3 ldrh r3, [r4, #38] ; 0x26 8006c54: b29b uxth r3, r3 8006c56: b96b cbnz r3, 8006c74 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8006c58: 463b mov r3, r7 8006c5a: 4632 mov r2, r6 8006c5c: 2140 movs r1, #64 ; 0x40 8006c5e: 4620 mov r0, r4 8006c60: f7ff ff80 bl 8006b64 8006c64: b9a8 cbnz r0, 8006c92 huart->gState = HAL_UART_STATE_READY; 8006c66: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8006c68: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8006c6c: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8006c70: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8006c74: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006c76: 4632 mov r2, r6 huart->TxXferCount--; 8006c78: 3b01 subs r3, #1 8006c7a: b29b uxth r3, r3 8006c7c: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006c7e: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006c80: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006c82: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006c86: 4620 mov r0, r4 8006c88: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006c8a: d10e bne.n 8006caa if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006c8c: f7ff ff6a bl 8006b64 8006c90: b110 cbz r0, 8006c98 return HAL_TIMEOUT; 8006c92: 2003 movs r0, #3 8006c94: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 8006c98: 882b ldrh r3, [r5, #0] 8006c9a: 6822 ldr r2, [r4, #0] 8006c9c: f3c3 0308 ubfx r3, r3, #0, #9 8006ca0: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8006ca2: 6923 ldr r3, [r4, #16] 8006ca4: b943 cbnz r3, 8006cb8 pData +=2U; 8006ca6: 3502 adds r5, #2 8006ca8: e7d3 b.n 8006c52 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8006caa: f7ff ff5b bl 8006b64 8006cae: 2800 cmp r0, #0 8006cb0: d1ef bne.n 8006c92 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 8006cb2: 6823 ldr r3, [r4, #0] 8006cb4: 782a ldrb r2, [r5, #0] 8006cb6: 605a str r2, [r3, #4] 8006cb8: 3501 adds r5, #1 8006cba: e7ca b.n 8006c52 return HAL_ERROR; 8006cbc: 2001 movs r0, #1 8006cbe: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8006cc2: 2002 movs r0, #2 } 8006cc4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08006cc8 : { 8006cc8: b538 push {r3, r4, r5, lr} 8006cca: 4604 mov r4, r0 8006ccc: 4613 mov r3, r2 if(huart->gState == HAL_UART_STATE_READY) 8006cce: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8006cd2: 2a20 cmp r2, #32 8006cd4: d12a bne.n 8006d2c if((pData == NULL) || (Size == 0U)) 8006cd6: b339 cbz r1, 8006d28 8006cd8: b333 cbz r3, 8006d28 __HAL_LOCK(huart); 8006cda: f894 2038 ldrb.w r2, [r4, #56] ; 0x38 8006cde: 2a01 cmp r2, #1 8006ce0: d024 beq.n 8006d2c 8006ce2: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006ce4: 2500 movs r5, #0 __HAL_LOCK(huart); 8006ce6: f884 2038 strb.w r2, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_BUSY_TX; 8006cea: 2221 movs r2, #33 ; 0x21 huart->TxXferCount = Size; 8006cec: 84e3 strh r3, [r4, #38] ; 0x26 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8006cee: 6b20 ldr r0, [r4, #48] ; 0x30 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006cf0: 63e5 str r5, [r4, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8006cf2: f884 2039 strb.w r2, [r4, #57] ; 0x39 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8006cf6: 4a0e ldr r2, [pc, #56] ; (8006d30 ) huart->TxXferSize = Size; 8006cf8: 84a3 strh r3, [r4, #36] ; 0x24 huart->pTxBuffPtr = pData; 8006cfa: 6221 str r1, [r4, #32] huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8006cfc: 6282 str r2, [r0, #40] ; 0x28 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8006cfe: 4a0d ldr r2, [pc, #52] ; (8006d34 ) huart->hdmatx->XferAbortCallback = NULL; 8006d00: 6345 str r5, [r0, #52] ; 0x34 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8006d02: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmatx->XferErrorCallback = UART_DMAError; 8006d04: 4a0c ldr r2, [pc, #48] ; (8006d38 ) 8006d06: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size); 8006d08: 6822 ldr r2, [r4, #0] 8006d0a: 3204 adds r2, #4 8006d0c: f7fe ff36 bl 8005b7c __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8006d10: f06f 0240 mvn.w r2, #64 ; 0x40 8006d14: 6823 ldr r3, [r4, #0] return HAL_OK; 8006d16: 4628 mov r0, r5 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8006d18: 601a str r2, [r3, #0] SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8006d1a: 695a ldr r2, [r3, #20] __HAL_UNLOCK(huart); 8006d1c: f884 5038 strb.w r5, [r4, #56] ; 0x38 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8006d20: f042 0280 orr.w r2, r2, #128 ; 0x80 8006d24: 615a str r2, [r3, #20] return HAL_OK; 8006d26: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8006d28: 2001 movs r0, #1 8006d2a: bd38 pop {r3, r4, r5, pc} return HAL_BUSY; 8006d2c: 2002 movs r0, #2 } 8006d2e: bd38 pop {r3, r4, r5, pc} 8006d30: 08006dcf .word 0x08006dcf 8006d34: 08006dfd .word 0x08006dfd 8006d38: 08006ec9 .word 0x08006ec9 08006d3c : { 8006d3c: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 8006d3e: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 8006d42: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 8006d44: 2a20 cmp r2, #32 { 8006d46: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 8006d48: d138 bne.n 8006dbc if((pData == NULL) || (Size == 0U)) 8006d4a: 2900 cmp r1, #0 8006d4c: d034 beq.n 8006db8 8006d4e: 2b00 cmp r3, #0 8006d50: d032 beq.n 8006db8 __HAL_LOCK(huart); 8006d52: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 8006d56: 2a01 cmp r2, #1 8006d58: d030 beq.n 8006dbc 8006d5a: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006d5c: 2400 movs r4, #0 __HAL_LOCK(huart); 8006d5e: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 8006d62: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8006d64: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 8006d66: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8006d68: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8006d6a: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8006d6e: 6b40 ldr r0, [r0, #52] ; 0x34 8006d70: 4a13 ldr r2, [pc, #76] ; (8006dc0 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8006d72: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8006d74: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8006d76: 4a13 ldr r2, [pc, #76] ; (8006dc4 ) huart->hdmarx->XferAbortCallback = NULL; 8006d78: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8006d7a: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8006d7c: 4a12 ldr r2, [pc, #72] ; (8006dc8 ) 8006d7e: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8006d80: 460a mov r2, r1 8006d82: 1d31 adds r1, r6, #4 8006d84: f7fe fefa bl 8005b7c return HAL_OK; 8006d88: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 8006d8a: 682b ldr r3, [r5, #0] 8006d8c: 9401 str r4, [sp, #4] 8006d8e: 681a ldr r2, [r3, #0] 8006d90: 9201 str r2, [sp, #4] 8006d92: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8006d94: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8006d98: 9201 str r2, [sp, #4] 8006d9a: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8006d9c: 68da ldr r2, [r3, #12] 8006d9e: f442 7280 orr.w r2, r2, #256 ; 0x100 8006da2: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8006da4: 695a ldr r2, [r3, #20] 8006da6: f042 0201 orr.w r2, r2, #1 8006daa: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006dac: 695a ldr r2, [r3, #20] 8006dae: f042 0240 orr.w r2, r2, #64 ; 0x40 8006db2: 615a str r2, [r3, #20] } 8006db4: b002 add sp, #8 8006db6: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8006db8: 2001 movs r0, #1 8006dba: e7fb b.n 8006db4 return HAL_BUSY; 8006dbc: 2002 movs r0, #2 8006dbe: e7f9 b.n 8006db4 8006dc0: 08006e07 .word 0x08006e07 8006dc4: 08006ebd .word 0x08006ebd 8006dc8: 08006ec9 .word 0x08006ec9 08006dcc : 8006dcc: 4770 bx lr 08006dce : { 8006dce: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006dd0: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8006dd2: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006dd4: 681b ldr r3, [r3, #0] 8006dd6: f013 0320 ands.w r3, r3, #32 8006dda: d10a bne.n 8006df2 huart->TxXferCount = 0U; 8006ddc: 84d3 strh r3, [r2, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8006dde: 6813 ldr r3, [r2, #0] 8006de0: 695a ldr r2, [r3, #20] 8006de2: f022 0280 bic.w r2, r2, #128 ; 0x80 8006de6: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8006de8: 68da ldr r2, [r3, #12] 8006dea: f042 0240 orr.w r2, r2, #64 ; 0x40 8006dee: 60da str r2, [r3, #12] 8006df0: bd08 pop {r3, pc} HAL_UART_TxCpltCallback(huart); 8006df2: 4610 mov r0, r2 8006df4: f7ff ffea bl 8006dcc 8006df8: bd08 pop {r3, pc} 08006dfa : 8006dfa: 4770 bx lr 08006dfc : { 8006dfc: b508 push {r3, lr} HAL_UART_TxHalfCpltCallback(huart); 8006dfe: 6a40 ldr r0, [r0, #36] ; 0x24 8006e00: f7ff fffb bl 8006dfa 8006e04: bd08 pop {r3, pc} 08006e06 : { 8006e06: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006e08: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8006e0a: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8006e0c: 681b ldr r3, [r3, #0] 8006e0e: f013 0320 ands.w r3, r3, #32 8006e12: d110 bne.n 8006e36 huart->RxXferCount = 0U; 8006e14: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8006e16: 6813 ldr r3, [r2, #0] 8006e18: 68d9 ldr r1, [r3, #12] 8006e1a: f421 7180 bic.w r1, r1, #256 ; 0x100 8006e1e: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8006e20: 6959 ldr r1, [r3, #20] 8006e22: f021 0101 bic.w r1, r1, #1 8006e26: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006e28: 6959 ldr r1, [r3, #20] 8006e2a: f021 0140 bic.w r1, r1, #64 ; 0x40 8006e2e: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8006e30: 2320 movs r3, #32 8006e32: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8006e36: 4610 mov r0, r2 8006e38: f001 fd70 bl 800891c 8006e3c: bd08 pop {r3, pc} 08006e3e : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8006e3e: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8006e42: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8006e44: 2b22 cmp r3, #34 ; 0x22 8006e46: d136 bne.n 8006eb6 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006e48: 6883 ldr r3, [r0, #8] 8006e4a: 6901 ldr r1, [r0, #16] 8006e4c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8006e50: 6802 ldr r2, [r0, #0] 8006e52: 6a83 ldr r3, [r0, #40] ; 0x28 8006e54: d123 bne.n 8006e9e *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8006e56: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8006e58: b9e9 cbnz r1, 8006e96 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8006e5a: f3c2 0208 ubfx r2, r2, #0, #9 8006e5e: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8006e62: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8006e64: 8dc4 ldrh r4, [r0, #46] ; 0x2e 8006e66: 3c01 subs r4, #1 8006e68: b2a4 uxth r4, r4 8006e6a: 85c4 strh r4, [r0, #46] ; 0x2e 8006e6c: b98c cbnz r4, 8006e92 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 8006e6e: 6803 ldr r3, [r0, #0] 8006e70: 68da ldr r2, [r3, #12] 8006e72: f022 0220 bic.w r2, r2, #32 8006e76: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8006e78: 68da ldr r2, [r3, #12] 8006e7a: f422 7280 bic.w r2, r2, #256 ; 0x100 8006e7e: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 8006e80: 695a ldr r2, [r3, #20] 8006e82: f022 0201 bic.w r2, r2, #1 8006e86: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8006e88: 2320 movs r3, #32 8006e8a: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8006e8e: f001 fd45 bl 800891c if(--huart->RxXferCount == 0U) 8006e92: 2000 movs r0, #0 } 8006e94: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 8006e96: b2d2 uxtb r2, r2 8006e98: f823 2b01 strh.w r2, [r3], #1 8006e9c: e7e1 b.n 8006e62 if(huart->Init.Parity == UART_PARITY_NONE) 8006e9e: b921 cbnz r1, 8006eaa *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8006ea0: 1c59 adds r1, r3, #1 8006ea2: 6852 ldr r2, [r2, #4] 8006ea4: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8006ea6: 701a strb r2, [r3, #0] 8006ea8: e7dc b.n 8006e64 8006eaa: 6852 ldr r2, [r2, #4] 8006eac: 1c59 adds r1, r3, #1 8006eae: 6281 str r1, [r0, #40] ; 0x28 8006eb0: f002 027f and.w r2, r2, #127 ; 0x7f 8006eb4: e7f7 b.n 8006ea6 return HAL_BUSY; 8006eb6: 2002 movs r0, #2 8006eb8: bd10 pop {r4, pc} 08006eba : 8006eba: 4770 bx lr 08006ebc : { 8006ebc: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8006ebe: 6a40 ldr r0, [r0, #36] ; 0x24 8006ec0: f7ff fffb bl 8006eba 8006ec4: bd08 pop {r3, pc} 08006ec6 : 8006ec6: 4770 bx lr 08006ec8 : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8006ec8: 6a41 ldr r1, [r0, #36] ; 0x24 { 8006eca: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8006ecc: 680b ldr r3, [r1, #0] 8006ece: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8006ed0: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8006ed4: 2821 cmp r0, #33 ; 0x21 8006ed6: d10a bne.n 8006eee 8006ed8: 0612 lsls r2, r2, #24 8006eda: d508 bpl.n 8006eee huart->TxXferCount = 0U; 8006edc: 2200 movs r2, #0 8006ede: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8006ee0: 68da ldr r2, [r3, #12] 8006ee2: f022 02c0 bic.w r2, r2, #192 ; 0xc0 8006ee6: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8006ee8: 2220 movs r2, #32 8006eea: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8006eee: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8006ef0: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8006ef4: 2a22 cmp r2, #34 ; 0x22 8006ef6: d106 bne.n 8006f06 8006ef8: 065b lsls r3, r3, #25 8006efa: d504 bpl.n 8006f06 huart->RxXferCount = 0U; 8006efc: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8006efe: 4608 mov r0, r1 huart->RxXferCount = 0U; 8006f00: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8006f02: f7ff fd83 bl 8006a0c huart->ErrorCode |= HAL_UART_ERROR_DMA; 8006f06: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8006f08: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8006f0a: f043 0310 orr.w r3, r3, #16 8006f0e: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8006f10: f7ff ffd9 bl 8006ec6 8006f14: bd08 pop {r3, pc} ... 08006f18 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8006f18: 6803 ldr r3, [r0, #0] { 8006f1a: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8006f1c: 681a ldr r2, [r3, #0] { 8006f1e: 4604 mov r4, r0 if(errorflags == RESET) 8006f20: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8006f22: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8006f24: 695d ldr r5, [r3, #20] if(errorflags == RESET) 8006f26: d107 bne.n 8006f38 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8006f28: 0696 lsls r6, r2, #26 8006f2a: d55a bpl.n 8006fe2 8006f2c: 068d lsls r5, r1, #26 8006f2e: d558 bpl.n 8006fe2 } 8006f30: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8006f34: f7ff bf83 b.w 8006e3e if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8006f38: f015 0501 ands.w r5, r5, #1 8006f3c: d102 bne.n 8006f44 8006f3e: f411 7f90 tst.w r1, #288 ; 0x120 8006f42: d04e beq.n 8006fe2 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8006f44: 07d3 lsls r3, r2, #31 8006f46: d505 bpl.n 8006f54 8006f48: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 8006f4a: bf42 ittt mi 8006f4c: 6be3 ldrmi r3, [r4, #60] ; 0x3c 8006f4e: f043 0301 orrmi.w r3, r3, #1 8006f52: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8006f54: 0750 lsls r0, r2, #29 8006f56: d504 bpl.n 8006f62 8006f58: b11d cbz r5, 8006f62 huart->ErrorCode |= HAL_UART_ERROR_NE; 8006f5a: 6be3 ldr r3, [r4, #60] ; 0x3c 8006f5c: f043 0302 orr.w r3, r3, #2 8006f60: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8006f62: 0793 lsls r3, r2, #30 8006f64: d504 bpl.n 8006f70 8006f66: b11d cbz r5, 8006f70 huart->ErrorCode |= HAL_UART_ERROR_FE; 8006f68: 6be3 ldr r3, [r4, #60] ; 0x3c 8006f6a: f043 0304 orr.w r3, r3, #4 8006f6e: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8006f70: 0716 lsls r6, r2, #28 8006f72: d504 bpl.n 8006f7e 8006f74: b11d cbz r5, 8006f7e huart->ErrorCode |= HAL_UART_ERROR_ORE; 8006f76: 6be3 ldr r3, [r4, #60] ; 0x3c 8006f78: f043 0308 orr.w r3, r3, #8 8006f7c: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8006f7e: 6be3 ldr r3, [r4, #60] ; 0x3c 8006f80: 2b00 cmp r3, #0 8006f82: d066 beq.n 8007052 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8006f84: 0695 lsls r5, r2, #26 8006f86: d504 bpl.n 8006f92 8006f88: 0688 lsls r0, r1, #26 8006f8a: d502 bpl.n 8006f92 UART_Receive_IT(huart); 8006f8c: 4620 mov r0, r4 8006f8e: f7ff ff56 bl 8006e3e dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8006f92: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8006f94: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8006f96: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8006f98: 6be2 ldr r2, [r4, #60] ; 0x3c 8006f9a: 0711 lsls r1, r2, #28 8006f9c: d402 bmi.n 8006fa4 8006f9e: f015 0540 ands.w r5, r5, #64 ; 0x40 8006fa2: d01a beq.n 8006fda UART_EndRxTransfer(huart); 8006fa4: f7ff fd32 bl 8006a0c if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8006fa8: 6823 ldr r3, [r4, #0] 8006faa: 695a ldr r2, [r3, #20] 8006fac: 0652 lsls r2, r2, #25 8006fae: d510 bpl.n 8006fd2 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006fb0: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8006fb2: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8006fb4: f022 0240 bic.w r2, r2, #64 ; 0x40 8006fb8: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 8006fba: b150 cbz r0, 8006fd2 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8006fbc: 4b25 ldr r3, [pc, #148] ; (8007054 ) 8006fbe: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8006fc0: f7fe fe1a bl 8005bf8 8006fc4: 2800 cmp r0, #0 8006fc6: d044 beq.n 8007052 huart->hdmarx->XferAbortCallback(huart->hdmarx); 8006fc8: 6b60 ldr r0, [r4, #52] ; 0x34 } 8006fca: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8006fce: 6b43 ldr r3, [r0, #52] ; 0x34 8006fd0: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8006fd2: 4620 mov r0, r4 8006fd4: f7ff ff77 bl 8006ec6 8006fd8: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 8006fda: f7ff ff74 bl 8006ec6 huart->ErrorCode = HAL_UART_ERROR_NONE; 8006fde: 63e5 str r5, [r4, #60] ; 0x3c 8006fe0: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8006fe2: 0616 lsls r6, r2, #24 8006fe4: d527 bpl.n 8007036 8006fe6: 060d lsls r5, r1, #24 8006fe8: d525 bpl.n 8007036 if(huart->gState == HAL_UART_STATE_BUSY_TX) 8006fea: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8006fee: 2a21 cmp r2, #33 ; 0x21 8006ff0: d12f bne.n 8007052 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8006ff2: 68a2 ldr r2, [r4, #8] 8006ff4: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8006ff8: 6a22 ldr r2, [r4, #32] 8006ffa: d117 bne.n 800702c huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8006ffc: 8811 ldrh r1, [r2, #0] 8006ffe: f3c1 0108 ubfx r1, r1, #0, #9 8007002: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8007004: 6921 ldr r1, [r4, #16] 8007006: b979 cbnz r1, 8007028 huart->pTxBuffPtr += 2U; 8007008: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800700a: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 800700c: 8ce2 ldrh r2, [r4, #38] ; 0x26 800700e: 3a01 subs r2, #1 8007010: b292 uxth r2, r2 8007012: 84e2 strh r2, [r4, #38] ; 0x26 8007014: b9ea cbnz r2, 8007052 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8007016: 68da ldr r2, [r3, #12] 8007018: f022 0280 bic.w r2, r2, #128 ; 0x80 800701c: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 800701e: 68da ldr r2, [r3, #12] 8007020: f042 0240 orr.w r2, r2, #64 ; 0x40 8007024: 60da str r2, [r3, #12] 8007026: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8007028: 3201 adds r2, #1 800702a: e7ee b.n 800700a huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 800702c: 1c51 adds r1, r2, #1 800702e: 6221 str r1, [r4, #32] 8007030: 7812 ldrb r2, [r2, #0] 8007032: 605a str r2, [r3, #4] 8007034: e7ea b.n 800700c if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8007036: 0650 lsls r0, r2, #25 8007038: d50b bpl.n 8007052 800703a: 064a lsls r2, r1, #25 800703c: d509 bpl.n 8007052 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 800703e: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8007040: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8007042: f022 0240 bic.w r2, r2, #64 ; 0x40 8007046: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8007048: 2320 movs r3, #32 800704a: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 800704e: f7ff febd bl 8006dcc 8007052: bd70 pop {r4, r5, r6, pc} 8007054: 08007059 .word 0x08007059 08007058 : { 8007058: b508 push {r3, lr} huart->RxXferCount = 0x00U; 800705a: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800705c: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 800705e: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 8007060: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 8007062: f7ff ff30 bl 8006ec6 8007066: bd08 pop {r3, pc} 08007068 : * * Created on: 2019. 7. 30. * Author: parkyj */ #include "ad5318.h" void SubmitDAC(uint16_t ShiftTarget) { 8007068: b570 push {r4, r5, r6, lr} char i; /* serial counter */ // printf("ShiftTarget : %x \r\n",ShiftTarget); HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET); 800706a: 2200 movs r2, #0 void SubmitDAC(uint16_t ShiftTarget) { 800706c: 4605 mov r5, r0 HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET); 800706e: 2104 movs r1, #4 8007070: 4824 ldr r0, [pc, #144] ; (8007104 ) 8007072: f7fe fffd bl 8006070 8007076: 2410 movs r4, #16 for (i=0;i < 16;i++) { /* loop through all 16 data bits */ HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_SET); /* rise clk line again */ 8007078: 4e22 ldr r6, [pc, #136] ; (8007104 ) 800707a: 2201 movs r2, #1 800707c: 2108 movs r1, #8 800707e: 4630 mov r0, r6 8007080: f7fe fff6 bl 8006070 if (ShiftTarget & 0x8000) HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_SET); 8007084: 042b lsls r3, r5, #16 8007086: bf4c ite mi 8007088: 2201 movmi r2, #1 else HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET); /* set data bit */ 800708a: 2200 movpl r2, #0 800708c: 2110 movs r1, #16 800708e: 4630 mov r0, r6 8007090: f7fe ffee bl 8006070 8007094: 3c01 subs r4, #1 HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_RESET); /* lower clock line */ 8007096: 2200 movs r2, #0 8007098: 2108 movs r1, #8 800709a: 4630 mov r0, r6 800709c: f7fe ffe8 bl 8006070 ShiftTarget <<= 1; 80070a0: 006d lsls r5, r5, #1 for (i=0;i < 16;i++) { /* loop through all 16 data bits */ 80070a2: f014 04ff ands.w r4, r4, #255 ; 0xff ShiftTarget <<= 1; 80070a6: b2ad uxth r5, r5 for (i=0;i < 16;i++) { /* loop through all 16 data bits */ 80070a8: d1e7 bne.n 800707a } HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET); 80070aa: 2201 movs r2, #1 80070ac: f44f 4100 mov.w r1, #32768 ; 0x8000 80070b0: 4815 ldr r0, [pc, #84] ; (8007108 ) 80070b2: f7fe ffdd bl 8006070 Pol_Delay_us(10); 80070b6: 200a movs r0, #10 80070b8: f000 fd84 bl 8007bc4 HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET); 80070bc: 4622 mov r2, r4 80070be: f44f 4100 mov.w r1, #32768 ; 0x8000 80070c2: 4811 ldr r0, [pc, #68] ; (8007108 ) 80070c4: f7fe ffd4 bl 8006070 HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_SET); 80070c8: 2201 movs r2, #1 80070ca: 2104 movs r1, #4 80070cc: 480d ldr r0, [pc, #52] ; (8007104 ) 80070ce: f7fe ffcf bl 8006070 HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET); 80070d2: 4622 mov r2, r4 80070d4: 2110 movs r1, #16 80070d6: 480b ldr r0, [pc, #44] ; (8007104 ) 80070d8: f7fe ffca bl 8006070 HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET); 80070dc: 2201 movs r2, #1 80070de: f44f 4100 mov.w r1, #32768 ; 0x8000 80070e2: 4809 ldr r0, [pc, #36] ; (8007108 ) 80070e4: f7fe ffc4 bl 8006070 /* rise DAC SYNC line again */ HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET); 80070e8: 4622 mov r2, r4 80070ea: 2104 movs r1, #4 80070ec: 4805 ldr r0, [pc, #20] ; (8007104 ) 80070ee: f7fe ffbf bl 8006070 HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET); 80070f2: 4622 mov r2, r4 } 80070f4: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET); 80070f8: f44f 4100 mov.w r1, #32768 ; 0x8000 80070fc: 4802 ldr r0, [pc, #8] ; (8007108 ) 80070fe: f7fe bfb7 b.w 8006070 8007102: bf00 nop 8007104: 40012000 .word 0x40012000 8007108: 40011400 .word 0x40011400 0800710c : BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0); BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0); } void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){ 800710c: b084 sub sp, #16 800710e: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007112: ac0a add r4, sp, #40 ; 0x28 8007114: e884 000f stmia.w r4, {r0, r1, r2, r3} 8007118: 9e0e ldr r6, [sp, #56] ; 0x38 800711a: f8bd 703c ldrh.w r7, [sp, #60] ; 0x3c printf("BDA4601_atten_ctrl : %x \r\n",data); #endif /* DEBUG_PRINT */ #endif /* DEBUG_PRINT */ data = 4 * data; temp = (uint8_t)data; HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 800711e: 2200 movs r2, #0 8007120: 4639 mov r1, r7 8007122: 4681 mov r9, r0 8007124: 4630 mov r0, r6 void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){ 8007126: f89d 5040 ldrb.w r5, [sp, #64] ; 0x40 800712a: f8bd a02c ldrh.w sl, [sp, #44] ; 0x2c 800712e: f8dd 8030 ldr.w r8, [sp, #48] ; 0x30 8007132: f8bd b034 ldrh.w fp, [sp, #52] ; 0x34 HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 8007136: f7fe ff9b bl 8006070 HAL_Delay(1); 800713a: 2001 movs r0, #1 800713c: f7fe f9ca bl 80054d4 8007140: 2408 movs r4, #8 data = 4 * data; 8007142: 00ad lsls r5, r5, #2 8007144: b2ed uxtb r5, r5 for(i = 0; i < 8; i++){ if((uint8_t)temp & 0x01){ 8007146: f015 0201 ands.w r2, r5, #1 HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_SET);//DATA 800714a: bf18 it ne 800714c: 2201 movne r2, #1 } else{ HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_RESET);//DATA 800714e: 4659 mov r1, fp 8007150: 4640 mov r0, r8 8007152: f7fe ff8d bl 8006070 } HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_SET);//CLOCK 8007156: 2201 movs r2, #1 8007158: 4651 mov r1, sl 800715a: 4648 mov r0, r9 800715c: f7fe ff88 bl 8006070 HAL_Delay(1); 8007160: 2001 movs r0, #1 8007162: f7fe f9b7 bl 80054d4 HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK 8007166: 2200 movs r2, #0 8007168: 4651 mov r1, sl 800716a: 4648 mov r0, r9 800716c: f7fe ff80 bl 8006070 8007170: 3c01 subs r4, #1 HAL_Delay(1); 8007172: 2001 movs r0, #1 8007174: f7fe f9ae bl 80054d4 for(i = 0; i < 8; i++){ 8007178: f014 04ff ands.w r4, r4, #255 ; 0xff temp >>= 1; 800717c: ea4f 0555 mov.w r5, r5, lsr #1 for(i = 0; i < 8; i++){ 8007180: d1e1 bne.n 8007146 } HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK 8007182: 4622 mov r2, r4 8007184: 4651 mov r1, sl 8007186: 4648 mov r0, r9 8007188: f7fe ff72 bl 8006070 HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,GPIO_PIN_15,GPIO_PIN_RESET);//DATA 800718c: 4622 mov r2, r4 800718e: f44f 4100 mov.w r1, #32768 ; 0x8000 8007192: 4640 mov r0, r8 8007194: f7fe ff6c bl 8006070 HAL_Delay(5); 8007198: 2005 movs r0, #5 800719a: f7fe f99b bl 80054d4 HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_SET);//LE 800719e: 4639 mov r1, r7 80071a0: 2201 movs r2, #1 80071a2: 4630 mov r0, r6 80071a4: f7fe ff64 bl 8006070 HAL_Delay(1); 80071a8: 2001 movs r0, #1 80071aa: f7fe f993 bl 80054d4 HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 80071ae: 4622 mov r2, r4 80071b0: 4639 mov r1, r7 80071b2: 4630 mov r0, r6 } 80071b4: e8bd 4ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80071b8: b004 add sp, #16 HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET); 80071ba: f7fe bf59 b.w 8006070 ... 080071c0 : void BDA4601_Test(void){ 80071c0: b51f push {r0, r1, r2, r3, r4, lr} BDA4601_atten_ctrl(BDA4601_1_8G_DL1,0); 80071c2: 2400 movs r4, #0 80071c4: 4b42 ldr r3, [pc, #264] ; (80072d0 ) 80071c6: 9402 str r4, [sp, #8] 80071c8: f103 0210 add.w r2, r3, #16 80071cc: e892 0003 ldmia.w r2, {r0, r1} 80071d0: e88d 0003 stmia.w sp, {r0, r1} 80071d4: cb0f ldmia r3, {r0, r1, r2, r3} 80071d6: f7ff ff99 bl 800710c BDA4601_atten_ctrl(BDA4601_1_8G_DL2,0); 80071da: 4b3e ldr r3, [pc, #248] ; (80072d4 ) 80071dc: 9402 str r4, [sp, #8] 80071de: f103 0210 add.w r2, r3, #16 80071e2: e892 0003 ldmia.w r2, {r0, r1} 80071e6: e88d 0003 stmia.w sp, {r0, r1} 80071ea: cb0f ldmia r3, {r0, r1, r2, r3} 80071ec: f7ff ff8e bl 800710c BDA4601_atten_ctrl(BDA4601_1_8G_UL1,0); 80071f0: 4b39 ldr r3, [pc, #228] ; (80072d8 ) 80071f2: 9402 str r4, [sp, #8] 80071f4: f103 0210 add.w r2, r3, #16 80071f8: e892 0003 ldmia.w r2, {r0, r1} 80071fc: e88d 0003 stmia.w sp, {r0, r1} 8007200: cb0f ldmia r3, {r0, r1, r2, r3} 8007202: f7ff ff83 bl 800710c BDA4601_atten_ctrl(BDA4601_1_8G_UL2,0); 8007206: 4b35 ldr r3, [pc, #212] ; (80072dc ) 8007208: 9402 str r4, [sp, #8] 800720a: f103 0210 add.w r2, r3, #16 800720e: e892 0003 ldmia.w r2, {r0, r1} 8007212: e88d 0003 stmia.w sp, {r0, r1} 8007216: cb0f ldmia r3, {r0, r1, r2, r3} 8007218: f7ff ff78 bl 800710c BDA4601_atten_ctrl(BDA4601_1_8G_UL3,0); 800721c: 4b30 ldr r3, [pc, #192] ; (80072e0 ) 800721e: 9402 str r4, [sp, #8] 8007220: f103 0210 add.w r2, r3, #16 8007224: e892 0003 ldmia.w r2, {r0, r1} 8007228: e88d 0003 stmia.w sp, {r0, r1} 800722c: cb0f ldmia r3, {r0, r1, r2, r3} 800722e: f7ff ff6d bl 800710c BDA4601_atten_ctrl(BDA4601_1_8G_UL4,0); 8007232: 4b2c ldr r3, [pc, #176] ; (80072e4 ) 8007234: 9402 str r4, [sp, #8] 8007236: f103 0210 add.w r2, r3, #16 800723a: e892 0003 ldmia.w r2, {r0, r1} 800723e: e88d 0003 stmia.w sp, {r0, r1} 8007242: cb0f ldmia r3, {r0, r1, r2, r3} 8007244: f7ff ff62 bl 800710c BDA4601_atten_ctrl(BDA4601_2_1G_DL1,0); 8007248: 4b27 ldr r3, [pc, #156] ; (80072e8 ) 800724a: 9402 str r4, [sp, #8] 800724c: f103 0210 add.w r2, r3, #16 8007250: e892 0003 ldmia.w r2, {r0, r1} 8007254: e88d 0003 stmia.w sp, {r0, r1} 8007258: cb0f ldmia r3, {r0, r1, r2, r3} 800725a: f7ff ff57 bl 800710c BDA4601_atten_ctrl(BDA4601_2_1G_DL2,0); 800725e: 4b23 ldr r3, [pc, #140] ; (80072ec ) 8007260: 9402 str r4, [sp, #8] 8007262: f103 0210 add.w r2, r3, #16 8007266: e892 0003 ldmia.w r2, {r0, r1} 800726a: e88d 0003 stmia.w sp, {r0, r1} 800726e: cb0f ldmia r3, {r0, r1, r2, r3} 8007270: f7ff ff4c bl 800710c BDA4601_atten_ctrl(BDA4601_2_1G_UL1,0); 8007274: 4b1e ldr r3, [pc, #120] ; (80072f0 ) 8007276: 9402 str r4, [sp, #8] 8007278: f103 0210 add.w r2, r3, #16 800727c: e892 0003 ldmia.w r2, {r0, r1} 8007280: e88d 0003 stmia.w sp, {r0, r1} 8007284: cb0f ldmia r3, {r0, r1, r2, r3} 8007286: f7ff ff41 bl 800710c BDA4601_atten_ctrl(BDA4601_2_1G_UL2,0); 800728a: 4b1a ldr r3, [pc, #104] ; (80072f4 ) 800728c: 9402 str r4, [sp, #8] 800728e: f103 0210 add.w r2, r3, #16 8007292: e892 0003 ldmia.w r2, {r0, r1} 8007296: e88d 0003 stmia.w sp, {r0, r1} 800729a: cb0f ldmia r3, {r0, r1, r2, r3} 800729c: f7ff ff36 bl 800710c BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0); 80072a0: 4b15 ldr r3, [pc, #84] ; (80072f8 ) 80072a2: 9402 str r4, [sp, #8] 80072a4: f103 0210 add.w r2, r3, #16 80072a8: e892 0003 ldmia.w r2, {r0, r1} 80072ac: e88d 0003 stmia.w sp, {r0, r1} 80072b0: cb0f ldmia r3, {r0, r1, r2, r3} 80072b2: f7ff ff2b bl 800710c BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0); 80072b6: 4b11 ldr r3, [pc, #68] ; (80072fc ) 80072b8: 9402 str r4, [sp, #8] 80072ba: f103 0210 add.w r2, r3, #16 80072be: e892 0003 ldmia.w r2, {r0, r1} 80072c2: e88d 0003 stmia.w sp, {r0, r1} 80072c6: cb0f ldmia r3, {r0, r1, r2, r3} 80072c8: f7ff ff20 bl 800710c } 80072cc: b004 add sp, #16 80072ce: bd10 pop {r4, pc} 80072d0: 20000008 .word 0x20000008 80072d4: 20000020 .word 0x20000020 80072d8: 20000038 .word 0x20000038 80072dc: 20000050 .word 0x20000050 80072e0: 20000068 .word 0x20000068 80072e4: 20000080 .word 0x20000080 80072e8: 20000098 .word 0x20000098 80072ec: 200000b0 .word 0x200000b0 80072f0: 200000c8 .word 0x200000c8 80072f4: 200000e0 .word 0x200000e0 80072f8: 200000f8 .word 0x200000f8 80072fc: 20000110 .word 0x20000110 08007300 : } } return crc; } etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8007300: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8007302: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8007304: 4605 mov r5, r0 8007306: 1a2c subs r4, r5, r0 8007308: b2e4 uxtb r4, r4 800730a: 42a1 cmp r1, r4 800730c: d803 bhi.n 8007316 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 800730e: 1a9b subs r3, r3, r2 8007310: 4258 negs r0, r3 8007312: 4158 adcs r0, r3 8007314: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8007316: f815 4b01 ldrb.w r4, [r5], #1 800731a: 4063 eors r3, r4 800731c: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 800731e: f013 0f80 tst.w r3, #128 ; 0x80 8007322: f104 34ff add.w r4, r4, #4294967295 8007326: ea4f 0343 mov.w r3, r3, lsl #1 800732a: bf18 it ne 800732c: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8007330: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8007334: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8007336: d1f2 bne.n 800731e 8007338: e7e5 b.n 8007306 0800733a : ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val; ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val; PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); } #endif // PYJ.2019.07.26_END -- void Bit_Compare(PE43711_st ATT,uint8_t data,uint8_t Shift_Index){ 800733a: b084 sub sp, #16 800733c: e88d 000f stmia.w sp, {r0, r1, r2, r3} 8007340: f89d 2018 ldrb.w r2, [sp, #24] 8007344: f89d 301c ldrb.w r3, [sp, #28] 8007348: 9802 ldr r0, [sp, #8] if(data & (0x01 << Shift_Index)){ 800734a: 411a asrs r2, r3 800734c: f012 0201 ands.w r2, r2, #1 8007350: f8bd 100c ldrh.w r1, [sp, #12] HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_SET);//DATA 8007354: bf18 it ne 8007356: 2201 movne r2, #1 } else{ HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA } } 8007358: b004 add sp, #16 HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA 800735a: f7fe be89 b.w 8006070 ... 08007360 : void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){ 8007360: b084 sub sp, #16 8007362: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007366: b085 sub sp, #20 8007368: ac0e add r4, sp, #56 ; 0x38 800736a: e884 000f stmia.w r4, {r0, r1, r2, r3} 800736e: 9d12 ldr r5, [sp, #72] ; 0x48 8007370: f8bd 604c ldrh.w r6, [sp, #76] ; 0x4c HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET); 8007374: 2200 movs r2, #0 8007376: 4631 mov r1, r6 8007378: 4680 mov r8, r0 800737a: 4628 mov r0, r5 800737c: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 8007380: f7fe fe76 bl 8006070 Pol_Delay_us(10); 8007384: 200a movs r0, #10 8007386: f000 fc1d bl 8007bc4 800738a: 2700 movs r7, #0 // printf("why not? \r\n"); for(uint8_t i = 0; i < 8; i++){ Bit_Compare(ATT.ATT0,ATT.data0,i); 800738c: f10d 0b48 add.w fp, sp, #72 ; 0x48 Bit_Compare(ATT.ATT1,ATT.data1,i); 8007390: f10d 0a64 add.w sl, sp, #100 ; 0x64 Bit_Compare(ATT.ATT0,ATT.data0,i); 8007394: f89d 3050 ldrb.w r3, [sp, #80] ; 0x50 8007398: b2fc uxtb r4, r7 800739a: 9302 str r3, [sp, #8] 800739c: 9512 str r5, [sp, #72] ; 0x48 800739e: f8ad 604c strh.w r6, [sp, #76] ; 0x4c 80073a2: 9403 str r4, [sp, #12] 80073a4: e89b 0003 ldmia.w fp, {r0, r1} 80073a8: e88d 0003 stmia.w sp, {r0, r1} 80073ac: f8cd 8038 str.w r8, [sp, #56] ; 0x38 80073b0: f8ad 903c strh.w r9, [sp, #60] ; 0x3c 80073b4: ab0e add r3, sp, #56 ; 0x38 80073b6: cb0f ldmia r3, {r0, r1, r2, r3} 80073b8: f7ff ffbf bl 800733a Bit_Compare(ATT.ATT1,ATT.data1,i); 80073bc: f89d 306c ldrb.w r3, [sp, #108] ; 0x6c 80073c0: 9403 str r4, [sp, #12] 80073c2: 9302 str r3, [sp, #8] 80073c4: e89a 0003 ldmia.w sl, {r0, r1} 80073c8: e88d 0003 stmia.w sp, {r0, r1} 80073cc: ab15 add r3, sp, #84 ; 0x54 80073ce: cb0f ldmia r3, {r0, r1, r2, r3} 80073d0: f7ff ffb3 bl 800733a Bit_Compare(ATT.ATT2,ATT.data2,i); 80073d4: f89d 3088 ldrb.w r3, [sp, #136] ; 0x88 80073d8: 9403 str r4, [sp, #12] 80073da: 9302 str r3, [sp, #8] 80073dc: ab20 add r3, sp, #128 ; 0x80 80073de: e893 0003 ldmia.w r3, {r0, r1} 80073e2: e88d 0003 stmia.w sp, {r0, r1} 80073e6: ab1c add r3, sp, #112 ; 0x70 80073e8: cb0f ldmia r3, {r0, r1, r2, r3} 80073ea: f7ff ffa6 bl 800733a Bit_Compare(ATT.ATT3,ATT.data3,i); 80073ee: f89d 30a4 ldrb.w r3, [sp, #164] ; 0xa4 80073f2: 9403 str r4, [sp, #12] 80073f4: 9302 str r3, [sp, #8] 80073f6: ab27 add r3, sp, #156 ; 0x9c 80073f8: e893 0003 ldmia.w r3, {r0, r1} 80073fc: e88d 0003 stmia.w sp, {r0, r1} 8007400: ab23 add r3, sp, #140 ; 0x8c 8007402: cb0f ldmia r3, {r0, r1, r2, r3} 8007404: f7ff ff99 bl 800733a Bit_Compare(ATT.ATT4,ATT.data4,i); 8007408: f89d 30c0 ldrb.w r3, [sp, #192] ; 0xc0 800740c: 9403 str r4, [sp, #12] 800740e: 9302 str r3, [sp, #8] 8007410: ab2e add r3, sp, #184 ; 0xb8 8007412: e893 0003 ldmia.w r3, {r0, r1} 8007416: e88d 0003 stmia.w sp, {r0, r1} 800741a: ab2a add r3, sp, #168 ; 0xa8 800741c: cb0f ldmia r3, {r0, r1, r2, r3} 800741e: f7ff ff8c bl 800733a HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK 8007422: 2201 movs r2, #1 8007424: 4649 mov r1, r9 8007426: 4640 mov r0, r8 8007428: f7fe fe22 bl 8006070 Pol_Delay_us(10); 800742c: 200a movs r0, #10 800742e: f000 fbc9 bl 8007bc4 8007432: 3701 adds r7, #1 HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK 8007434: 2200 movs r2, #0 8007436: 4649 mov r1, r9 8007438: 4640 mov r0, r8 800743a: f7fe fe19 bl 8006070 for(uint8_t i = 0; i < 8; i++){ 800743e: 2f08 cmp r7, #8 8007440: d1a8 bne.n 8007394 } HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA 8007442: 2200 movs r2, #0 8007444: f44f 4100 mov.w r1, #32768 ; 0x8000 8007448: 4809 ldr r0, [pc, #36] ; (8007470 ) 800744a: f7fe fe11 bl 8006070 HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_SET);//LE 800744e: 4631 mov r1, r6 8007450: 2201 movs r2, #1 8007452: 4628 mov r0, r5 8007454: f7fe fe0c bl 8006070 Pol_Delay_us(10); 8007458: 200a movs r0, #10 800745a: f000 fbb3 bl 8007bc4 HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET); 800745e: 2200 movs r2, #0 8007460: 4631 mov r1, r6 8007462: 4628 mov r0, r5 } 8007464: b005 add sp, #20 8007466: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800746a: b004 add sp, #16 HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET); 800746c: f7fe be00 b.w 8006070 8007470: 40010c00 .word 0x40010c00 08007474 : void PE43711_PinInit(void){ 8007474: b5f0 push {r4, r5, r6, r7, lr} ALL_ATT_3_5G.ATT0 = ATT_3_5G_DL; 8007476: 4c21 ldr r4, [pc, #132] ; (80074fc ) 8007478: 4e21 ldr r6, [pc, #132] ; (8007500 ) 800747a: 4625 mov r5, r4 800747c: ce0f ldmia r6!, {r0, r1, r2, r3} 800747e: c50f stmia r5!, {r0, r1, r2, r3} 8007480: e896 0003 ldmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT1 = ATT_3_5G_UL; 8007484: 4f1f ldr r7, [pc, #124] ; (8007504 ) 8007486: f104 061c add.w r6, r4, #28 ALL_ATT_3_5G.ATT0 = ATT_3_5G_DL; 800748a: e885 0003 stmia.w r5, {r0, r1} ALL_ATT_3_5G.ATT1 = ATT_3_5G_UL; 800748e: cf0f ldmia r7!, {r0, r1, r2, r3} 8007490: c60f stmia r6!, {r0, r1, r2, r3} 8007492: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1; 8007496: 4f1c ldr r7, [pc, #112] ; (8007508 ) ALL_ATT_3_5G.ATT1 = ATT_3_5G_UL; 8007498: e886 0003 stmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1; 800749c: cf0f ldmia r7!, {r0, r1, r2, r3} 800749e: f104 0638 add.w r6, r4, #56 ; 0x38 80074a2: c60f stmia r6!, {r0, r1, r2, r3} 80074a4: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.ATT3 = ATT_3_5G_COM2; 80074a8: 4f18 ldr r7, [pc, #96] ; (800750c ) ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1; 80074aa: e886 0003 stmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT3 = ATT_3_5G_COM2; 80074ae: cf0f ldmia r7!, {r0, r1, r2, r3} 80074b0: f104 0654 add.w r6, r4, #84 ; 0x54 80074b4: c60f stmia r6!, {r0, r1, r2, r3} 80074b6: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.ATT4 = ATT_3_5G_COM3; 80074ba: 4f15 ldr r7, [pc, #84] ; (8007510 ) ALL_ATT_3_5G.ATT3 = ATT_3_5G_COM2; 80074bc: e886 0003 stmia.w r6, {r0, r1} ALL_ATT_3_5G.ATT4 = ATT_3_5G_COM3; 80074c0: cf0f ldmia r7!, {r0, r1, r2, r3} 80074c2: f104 0670 add.w r6, r4, #112 ; 0x70 80074c6: c60f stmia r6!, {r0, r1, r2, r3} 80074c8: e897 0003 ldmia.w r7, {r0, r1} ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val; 80074cc: 2300 movs r3, #0 void PE43711_PinInit(void){ 80074ce: b0a1 sub sp, #132 ; 0x84 ALL_ATT_3_5G.ATT4 = ATT_3_5G_COM3; 80074d0: e886 0003 stmia.w r6, {r0, r1} PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80074d4: 227c movs r2, #124 ; 0x7c 80074d6: 4629 mov r1, r5 80074d8: 4668 mov r0, sp ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val; 80074da: 7623 strb r3, [r4, #24] ALL_ATT_3_5G.data1 = ATTEN_3_5G_Initial_Val; 80074dc: f884 3034 strb.w r3, [r4, #52] ; 0x34 ALL_ATT_3_5G.data2 = ATTEN_3_5G_Initial_Val; 80074e0: f884 3050 strb.w r3, [r4, #80] ; 0x50 ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val; 80074e4: f884 306c strb.w r3, [r4, #108] ; 0x6c ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val; 80074e8: f884 3088 strb.w r3, [r4, #136] ; 0x88 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 80074ec: f001 ff28 bl 8009340 80074f0: e894 000f ldmia.w r4, {r0, r1, r2, r3} 80074f4: f7ff ff34 bl 8007360 } 80074f8: b021 add sp, #132 ; 0x84 80074fa: bdf0 pop {r4, r5, r6, r7, pc} 80074fc: 20000440 .word 0x20000440 8007500: 20000170 .word 0x20000170 8007504: 20000188 .word 0x20000188 8007508: 20000128 .word 0x20000128 800750c: 20000140 .word 0x20000140 8007510: 20000158 .word 0x20000158 08007514 : double N_Reg_Value_Calc(double val){ return val / 1000; } uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){ 8007514: b570 push {r4, r5, r6, lr} 8007516: 2302 movs r3, #2 8007518: 4604 mov r4, r0 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 14; i++){ if(_FRAC & 0x01) ret += shift_bit << i; 800751a: 2501 movs r5, #1 uint32_t N_Divider_Reg_Create(uint16_t _FRAC,uint16_t _INT,uint8_t _FASTLOCK){ 800751c: 2000 movs r0, #0 if(_FRAC & 0x01) 800751e: 07e6 lsls r6, r4, #31 ret += shift_bit << i; 8007520: bf48 it mi 8007522: fa05 f603 lslmi.w r6, r5, r3 8007526: f103 0301 add.w r3, r3, #1 800752a: bf48 it mi 800752c: 1980 addmi r0, r0, r6 for(i = 2; i < 14; i++){ 800752e: 2b0e cmp r3, #14 _FRAC = _FRAC >> 1; 8007530: ea4f 0454 mov.w r4, r4, lsr #1 for(i = 2; i < 14; i++){ 8007534: d1f3 bne.n 800751e #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 14; i < 22; i++){ if(_INT & 0x01) ret += shift_bit << i; 8007536: 2401 movs r4, #1 if(_INT & 0x01) 8007538: 07cd lsls r5, r1, #31 ret += shift_bit << i; 800753a: bf48 it mi 800753c: fa04 f503 lslmi.w r5, r4, r3 8007540: f103 0301 add.w r3, r3, #1 8007544: bf48 it mi 8007546: 1940 addmi r0, r0, r5 for(i = 14; i < 22; i++){ 8007548: 2b16 cmp r3, #22 _INT = _INT >> 1; 800754a: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 14; i < 22; i++){ 800754e: d1f3 bne.n 8007538 } #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ if(_FASTLOCK & 0x01) 8007550: 07d3 lsls r3, r2, #31 ret += shift_bit << i; 8007552: bf48 it mi 8007554: f500 0080 addmi.w r0, r0, #4194304 ; 0x400000 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } 8007558: bd70 pop {r4, r5, r6, pc} 0800755a : uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){ 800755a: b5f0 push {r4, r5, r6, r7, lr} 800755c: 4606 mov r6, r0 800755e: 2001 movs r0, #1 8007560: 2402 movs r4, #2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ for(i = 2; i < 14; i++){ if(_MOD & 0x01) ret += shift_bit << i; 8007562: 4607 mov r7, r0 uint32_t R_Divider_Reg_Create(uint16_t _MOD,uint8_t _RCOUNTER,uint8_t _PRESCALER,uint8_t _RESERVED,uint8_t _MUXOUT,uint8_t LOAD_CONTROL){ 8007564: f89d 5014 ldrb.w r5, [sp, #20] if(_MOD & 0x01) 8007568: f016 0f01 tst.w r6, #1 ret += shift_bit << i; 800756c: bf18 it ne 800756e: fa07 fe04 lslne.w lr, r7, r4 8007572: f104 0401 add.w r4, r4, #1 8007576: bf18 it ne 8007578: 4470 addne r0, lr for(i = 2; i < 14; i++){ 800757a: 2c0e cmp r4, #14 _MOD = _MOD >> 1; 800757c: ea4f 0656 mov.w r6, r6, lsr #1 for(i = 2; i < 14; i++){ 8007580: d1f2 bne.n 8007568 } for(i = 14; i < 18; i++){ if(_RCOUNTER & 0x01) ret += shift_bit << i; 8007582: 2601 movs r6, #1 if(_RCOUNTER & 0x01) 8007584: 07cf lsls r7, r1, #31 ret += shift_bit << i; 8007586: bf48 it mi 8007588: fa06 f704 lslmi.w r7, r6, r4 800758c: f104 0401 add.w r4, r4, #1 8007590: bf48 it mi 8007592: 19c0 addmi r0, r0, r7 for(i = 14; i < 18; i++){ 8007594: 2c12 cmp r4, #18 _RCOUNTER = _RCOUNTER >> 1; 8007596: ea4f 0151 mov.w r1, r1, lsr #1 for(i = 14; i < 18; i++){ 800759a: d1f3 bne.n 8007584 } if(_PRESCALER & 0x01) 800759c: 07d7 lsls r7, r2, #31 ret += shift_bit << i++; 800759e: bf44 itt mi 80075a0: f500 2080 addmi.w r0, r0, #262144 ; 0x40000 80075a4: 2413 movmi r4, #19 if(_RESERVED & 0x01) 80075a6: 07de lsls r6, r3, #31 ret += shift_bit << i++; 80075a8: bf42 ittt mi 80075aa: 2301 movmi r3, #1 80075ac: fa03 f404 lslmi.w r4, r3, r4 80075b0: 1900 addmi r0, r0, r4 for(i = 19; i < 22; i++){ if(_MUXOUT & 0x01) 80075b2: 07ec lsls r4, r5, #31 ret += shift_bit << i; 80075b4: bf48 it mi 80075b6: f500 2000 addmi.w r0, r0, #524288 ; 0x80000 _MUXOUT = _MUXOUT >> 1; } if(LOAD_CONTROL & 0x01) 80075ba: f89d 3018 ldrb.w r3, [sp, #24] if(_MUXOUT & 0x01) 80075be: 07a9 lsls r1, r5, #30 ret += shift_bit << i; 80075c0: bf48 it mi 80075c2: f500 1080 addmi.w r0, r0, #1048576 ; 0x100000 if(_MUXOUT & 0x01) 80075c6: 076a lsls r2, r5, #29 ret += shift_bit << i; 80075c8: bf48 it mi 80075ca: f500 1000 addmi.w r0, r0, #2097152 ; 0x200000 if(LOAD_CONTROL & 0x01) 80075ce: 07db lsls r3, r3, #31 ret += shift_bit << i++; 80075d0: bf48 it mi 80075d2: f500 0080 addmi.w r0, r0, #4194304 ; 0x400000 return ret; } 80075d6: bdf0 pop {r4, r5, r6, r7, pc} 080075d8 : ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){ 80075d8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80075dc: 4616 mov r6, r2 adf4153_st temp_adf4153; double temp = 0; ADF4153_R_N_Reg_st temp_reg; temp_adf4153.PFD_Value = REFin / (R_Counter * 1000); 80075de: f44f 727a mov.w r2, #1000 ; 0x3e8 ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){ 80075e2: f89d b038 ldrb.w fp, [sp, #56] ; 0x38 temp_adf4153.MOD_Value = (temp_adf4153.PFD_Value / chspacing) * 1000; 80075e6: 2500 movs r5, #0 temp_adf4153.PFD_Value = REFin / (R_Counter * 1000); 80075e8: fb02 f20b mul.w r2, r2, fp ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){ 80075ec: 4682 mov sl, r0 temp_adf4153.PFD_Value = REFin / (R_Counter * 1000); 80075ee: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing){ 80075f2: 461f mov r7, r3 temp_adf4153.PFD_Value = REFin / (R_Counter * 1000); 80075f4: 17d3 asrs r3, r2, #31 80075f6: f7fd fd9d bl 8005134 <__aeabi_uldivmod> temp_adf4153.MOD_Value = (temp_adf4153.PFD_Value / chspacing) * 1000; 80075fa: 9a0f ldr r2, [sp, #60] ; 0x3c 80075fc: 462b mov r3, r5 temp_adf4153.PFD_Value = REFin / (R_Counter * 1000); 80075fe: 4680 mov r8, r0 8007600: 4689 mov r9, r1 temp_adf4153.MOD_Value = (temp_adf4153.PFD_Value / chspacing) * 1000; 8007602: f7fd fd97 bl 8005134 <__aeabi_uldivmod> 8007606: ebc0 1440 rsb r4, r0, r0, lsl #5 temp_adf4153.N_Value = N_Reg_Value_Calc(((double)(Freq / 1000) / (double)(temp_adf4153.PFD_Value / 1000))); 800760a: f44f 727a mov.w r2, #1000 ; 0x3e8 800760e: 2300 movs r3, #0 temp_adf4153.MOD_Value = (temp_adf4153.PFD_Value / chspacing) * 1000; 8007610: eb00 0484 add.w r4, r0, r4, lsl #2 temp_adf4153.N_Value = N_Reg_Value_Calc(((double)(Freq / 1000) / (double)(temp_adf4153.PFD_Value / 1000))); 8007614: 4639 mov r1, r7 8007616: 4630 mov r0, r6 8007618: f7fd fd8c bl 8005134 <__aeabi_uldivmod> 800761c: f7fc ff8e bl 800453c <__aeabi_ul2d> 8007620: f44f 727a mov.w r2, #1000 ; 0x3e8 8007624: 4606 mov r6, r0 8007626: 460f mov r7, r1 8007628: 2300 movs r3, #0 800762a: 4640 mov r0, r8 800762c: 4649 mov r1, r9 800762e: f7fd fd81 bl 8005134 <__aeabi_uldivmod> 8007632: f7fc ff83 bl 800453c <__aeabi_ul2d> 8007636: 4602 mov r2, r0 8007638: 460b mov r3, r1 800763a: 4630 mov r0, r6 800763c: 4639 mov r1, r7 800763e: f7fd f8dd bl 80047fc <__aeabi_ddiv> return val / 1000; 8007642: 2200 movs r2, #0 8007644: 4b1a ldr r3, [pc, #104] ; (80076b0 ) 8007646: f7fd f8d9 bl 80047fc <__aeabi_ddiv> 800764a: 460f mov r7, r1 800764c: 4606 mov r6, r0 temp_adf4153.INT_Value = temp_adf4153.N_Value ; 800764e: f7fd fa83 bl 8004b58 <__aeabi_d2uiz> 8007652: fa1f f880 uxth.w r8, r0 #ifdef DEBUG_PRINT printf("\r\ntemp_adf4153.N_Value : %f temp_adf4153.INT_Value : %f temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value); #endif /* DEBUG_PRINT */ temp = temp_adf4153.N_Value - (double)temp_adf4153.INT_Value; 8007656: 4640 mov r0, r8 8007658: f7fc ff30 bl 80044bc <__aeabi_ui2d> 800765c: 460b mov r3, r1 800765e: 4602 mov r2, r0 8007660: 4639 mov r1, r7 8007662: 4630 mov r0, r6 8007664: f7fc fdec bl 8004240 <__aeabi_dsub> #ifdef DEBUG_PRINT printf("\r\n temp_adf4153.N_Value - (double)temp_adf4153.INT_Value) : %f temp * (double)temp_adf4153.MOD_Value : %f \r\n",temp,temp * (double)temp_adf4153.MOD_Value); #endif /* DEBUG_PRINT */ temp_adf4153.FRAC_Value = (float)temp * temp_adf4153.MOD_Value; 8007668: f7fd fa96 bl 8004b98 <__aeabi_d2f> temp_adf4153.MOD_Value = (temp_adf4153.PFD_Value / chspacing) * 1000; 800766c: 00e4 lsls r4, r4, #3 800766e: b2a4 uxth r4, r4 temp_adf4153.FRAC_Value = (float)temp * temp_adf4153.MOD_Value; 8007670: 4606 mov r6, r0 8007672: 4620 mov r0, r4 8007674: f7fd fb9a bl 8004dac <__aeabi_i2f> 8007678: 4601 mov r1, r0 800767a: 4630 mov r0, r6 800767c: f7fd fbea bl 8004e54 <__aeabi_fmul> 8007680: f7fd fd38 bl 80050f4 <__aeabi_f2uiz> #ifdef DEBUG_PRINT printf("\r\n"); printf("R0: %x R1: %x \r\n",N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0),R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0)); #endif /* DEBUG_PRINT */ temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0); 8007684: 462a mov r2, r5 8007686: 4641 mov r1, r8 8007688: b280 uxth r0, r0 800768a: f7ff ff43 bl 8007514 temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0); 800768e: 2302 movs r3, #2 temp_reg.N_reg = N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0); 8007690: 4606 mov r6, r0 temp_reg.R_reg = R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0); 8007692: 9300 str r3, [sp, #0] 8007694: 9501 str r5, [sp, #4] 8007696: 462b mov r3, r5 8007698: 2201 movs r2, #1 800769a: 4659 mov r1, fp 800769c: 4620 mov r0, r4 800769e: f7ff ff5c bl 800755a return temp_reg; 80076a2: e88a 0041 stmia.w sl, {r0, r6} // R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,1,0); //prescaler 1 : 8/9 0: 4/5 } 80076a6: 4650 mov r0, sl 80076a8: b003 add sp, #12 80076aa: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80076ae: bf00 nop 80076b0: 408f4000 .word 0x408f4000 080076b4 : HAL_Delay(1); } void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3){ 80076b4: b084 sub sp, #16 80076b6: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80076ba: b085 sub sp, #20 80076bc: ac0e add r4, sp, #56 ; 0x38 80076be: e884 000f stmia.w r4, {r0, r1, r2, r3} R3 = R3 & 0x0007FF; 80076c2: 9b17 ldr r3, [sp, #92] ; 0x5c 80076c4: f8bd 803c ldrh.w r8, [sp, #60] ; 0x3c 80076c8: f3c3 0a0a ubfx sl, r3, #0, #11 R2 = R2 & 0x00FFFF; 80076cc: f8bd 3058 ldrh.w r3, [sp, #88] ; 0x58 80076d0: 9c10 ldr r4, [sp, #64] ; 0x40 80076d2: 9301 str r3, [sp, #4] R1 = R1 & 0xFFFFFF; 80076d4: 9b15 ldr r3, [sp, #84] ; 0x54 80076d6: f8bd 5044 ldrh.w r5, [sp, #68] ; 0x44 80076da: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80076de: 9302 str r3, [sp, #8] R0 = R0 & 0xFFFFFF; 80076e0: 9b14 ldr r3, [sp, #80] ; 0x50 80076e2: 9e12 ldr r6, [sp, #72] ; 0x48 80076e4: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 80076e8: f8bd 704c ldrh.w r7, [sp, #76] ; 0x4c // ADF4153_Freq_Calc(3461500000,40000000,2,5000); HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80076ec: 2200 movs r2, #0 80076ee: 4641 mov r1, r8 R0 = R0 & 0xFFFFFF; 80076f0: 9303 str r3, [sp, #12] 80076f2: 4681 mov r9, r0 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80076f4: f7fe fcbc bl 8006070 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80076f8: 2200 movs r2, #0 80076fa: 4629 mov r1, r5 80076fc: 4620 mov r0, r4 80076fe: f7fe fcb7 bl 8006070 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8007702: 2200 movs r2, #0 8007704: 4639 mov r1, r7 8007706: 4630 mov r0, r6 8007708: f7fe fcb2 bl 8006070 800770c: f04f 0b0b mov.w fp, #11 printf("YJ :R0: %x R1: %x R2 : %x R3 : %x ",R0,R1,R2,R3); printf("\r\n"); #endif /* DEBUG_PRINT */ /* R3 Ctrl */ for(int i =0; i < 11; i++){ if(R3 & 0x000400){ 8007710: f41a 6280 ands.w r2, sl, #1024 ; 0x400 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8007714: bf18 it ne 8007716: 2201 movne r2, #1 #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007718: 4629 mov r1, r5 800771a: 4620 mov r0, r4 800771c: f7fe fca8 bl 8006070 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(50); 8007720: 2032 movs r0, #50 ; 0x32 8007722: f000 fa4f bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8007726: 2201 movs r2, #1 8007728: 4641 mov r1, r8 800772a: 4648 mov r0, r9 800772c: f7fe fca0 bl 8006070 Pol_Delay_us(50); 8007730: 2032 movs r0, #50 ; 0x32 8007732: f000 fa47 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007736: 2200 movs r2, #0 8007738: 4641 mov r1, r8 800773a: 4648 mov r0, r9 800773c: f7fe fc98 bl 8006070 for(int i =0; i < 11; i++){ 8007740: f1bb 0b01 subs.w fp, fp, #1 R3 = (R3 << 1); 8007744: ea4f 0a4a mov.w sl, sl, lsl #1 for(int i =0; i < 11; i++){ 8007748: d1e2 bne.n 8007710 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800774a: 2201 movs r2, #1 800774c: 4639 mov r1, r7 800774e: 4630 mov r0, r6 8007750: f7fe fc8e bl 8006070 Pol_Delay_us(50); 8007754: 2032 movs r0, #50 ; 0x32 8007756: f000 fa35 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800775a: 465a mov r2, fp 800775c: 4639 mov r1, r7 800775e: 4630 mov r0, r6 8007760: f7fe fc86 bl 8006070 8007764: f04f 0a10 mov.w sl, #16 /* R2 Ctrl */ for(int i =0; i < 16; i++){ if(R2 & 0x008000){ 8007768: 9b01 ldr r3, [sp, #4] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800776a: 4629 mov r1, r5 if(R2 & 0x008000){ 800776c: f413 4200 ands.w r2, r3, #32768 ; 0x8000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8007770: bf18 it ne 8007772: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007774: 4620 mov r0, r4 8007776: f7fe fc7b bl 8006070 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(50); 800777a: 2032 movs r0, #50 ; 0x32 800777c: f000 fa22 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8007780: 2201 movs r2, #1 8007782: 4641 mov r1, r8 8007784: 4648 mov r0, r9 8007786: f7fe fc73 bl 8006070 Pol_Delay_us(50); 800778a: 2032 movs r0, #50 ; 0x32 800778c: f000 fa1a bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007790: 2200 movs r2, #0 8007792: 4641 mov r1, r8 8007794: 4648 mov r0, r9 8007796: f7fe fc6b bl 8006070 R2 = ((R2 << 1) & 0x00FFFF); 800779a: 9b01 ldr r3, [sp, #4] for(int i =0; i < 16; i++){ 800779c: f1ba 0a01 subs.w sl, sl, #1 R2 = ((R2 << 1) & 0x00FFFF); 80077a0: ea4f 0343 mov.w r3, r3, lsl #1 80077a4: b29b uxth r3, r3 80077a6: 9301 str r3, [sp, #4] for(int i =0; i < 16; i++){ 80077a8: d1de bne.n 8007768 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80077aa: 2201 movs r2, #1 80077ac: 4639 mov r1, r7 80077ae: 4630 mov r0, r6 80077b0: f7fe fc5e bl 8006070 Pol_Delay_us(50); 80077b4: 2032 movs r0, #50 ; 0x32 80077b6: f000 fa05 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80077ba: 4652 mov r2, sl 80077bc: 4639 mov r1, r7 80077be: 4630 mov r0, r6 80077c0: f7fe fc56 bl 8006070 80077c4: f04f 0a18 mov.w sl, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 80077c8: 9b02 ldr r3, [sp, #8] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80077ca: 4629 mov r1, r5 if(R1 & 0x800000){ 80077cc: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80077d0: bf18 it ne 80077d2: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80077d4: 4620 mov r0, r4 80077d6: f7fe fc4b bl 8006070 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(50); 80077da: 2032 movs r0, #50 ; 0x32 80077dc: f000 f9f2 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80077e0: 2201 movs r2, #1 80077e2: 4641 mov r1, r8 80077e4: 4648 mov r0, r9 80077e6: f7fe fc43 bl 8006070 Pol_Delay_us(50); 80077ea: 2032 movs r0, #50 ; 0x32 80077ec: f000 f9ea bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80077f0: 2200 movs r2, #0 80077f2: 4641 mov r1, r8 80077f4: 4648 mov r0, r9 80077f6: f7fe fc3b bl 8006070 R1 = ((R1 << 1) & 0xFFFFFF); 80077fa: 9b02 ldr r3, [sp, #8] for(int i =0; i < 24; i++){ 80077fc: f1ba 0a01 subs.w sl, sl, #1 R1 = ((R1 << 1) & 0xFFFFFF); 8007800: ea4f 0343 mov.w r3, r3, lsl #1 8007804: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8007808: 9302 str r3, [sp, #8] for(int i =0; i < 24; i++){ 800780a: d1dd bne.n 80077c8 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 800780c: 2201 movs r2, #1 800780e: 4639 mov r1, r7 8007810: 4630 mov r0, r6 8007812: f7fe fc2d bl 8006070 Pol_Delay_us(50); 8007816: 2032 movs r0, #50 ; 0x32 8007818: f000 f9d4 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 800781c: 4652 mov r2, sl 800781e: 4639 mov r1, r7 8007820: 4630 mov r0, r6 8007822: f7fe fc25 bl 8006070 8007826: f04f 0a18 mov.w sl, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 800782a: 9b03 ldr r3, [sp, #12] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800782c: 4629 mov r1, r5 if(R0 & 0x800000){ 800782e: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8007832: bf18 it ne 8007834: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8007836: 4620 mov r0, r4 8007838: f7fe fc1a bl 8006070 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } Pol_Delay_us(50); 800783c: 2032 movs r0, #50 ; 0x32 800783e: f000 f9c1 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8007842: 2201 movs r2, #1 8007844: 4641 mov r1, r8 8007846: 4648 mov r0, r9 8007848: f7fe fc12 bl 8006070 Pol_Delay_us(50); 800784c: 2032 movs r0, #50 ; 0x32 800784e: f000 f9b9 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8007852: 2200 movs r2, #0 8007854: 4641 mov r1, r8 8007856: 4648 mov r0, r9 8007858: f7fe fc0a bl 8006070 R0 = ((R0 << 1) & 0xFFFFFF); 800785c: 9b03 ldr r3, [sp, #12] for(int i =0; i < 24; i++){ 800785e: f1ba 0a01 subs.w sl, sl, #1 R0 = ((R0 << 1) & 0xFFFFFF); 8007862: ea4f 0343 mov.w r3, r3, lsl #1 8007866: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 800786a: 9303 str r3, [sp, #12] for(int i =0; i < 24; i++){ 800786c: d1dd bne.n 800782a } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800786e: 4652 mov r2, sl 8007870: 4629 mov r1, r5 8007872: 4620 mov r0, r4 8007874: f7fe fbfc bl 8006070 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8007878: 4639 mov r1, r7 800787a: 2201 movs r2, #1 800787c: 4630 mov r0, r6 800787e: f7fe fbf7 bl 8006070 Pol_Delay_us(50); 8007882: 2032 movs r0, #50 ; 0x32 8007884: f000 f99e bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8007888: 4652 mov r2, sl 800788a: 4639 mov r1, r7 800788c: 4630 mov r0, r6 } 800788e: b005 add sp, #20 8007890: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007894: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8007896: f7fe bbeb b.w 8006070 800789a: 0000 movs r0, r0 800789c: 0000 movs r0, r0 ... 080078a0 : void ADF4153_Init(void){ 80078a0: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} PLL_Setting_st Pll_test = { 80078a4: 4c30 ldr r4, [pc, #192] ; (8007968 ) void ADF4153_Init(void){ 80078a6: b095 sub sp, #84 ; 0x54 PLL_Setting_st Pll_test = { 80078a8: 4626 mov r6, r4 80078aa: ad08 add r5, sp, #32 80078ac: ce0f ldmia r6!, {r0, r1, r2, r3} 80078ae: c50f stmia r5!, {r0, r1, r2, r3} 80078b0: e896 0003 ldmia.w r6, {r0, r1} PLL_Setting_st Pll_test2 = { 80078b4: 3418 adds r4, #24 PLL_Setting_st Pll_test = { 80078b6: e885 0003 stmia.w r5, {r0, r1} PLL_Setting_st Pll_test2 = { 80078ba: cc0f ldmia r4!, {r0, r1, r2, r3} 80078bc: ad0e add r5, sp, #56 ; 0x38 80078be: c50f stmia r5!, {r0, r1, r2, r3} 80078c0: e894 0003 ldmia.w r4, {r0, r1} temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80078c4: a324 add r3, pc, #144 ; (adr r3, 8007958 ) 80078c6: e9d3 2300 ldrd r2, r3, [r3] 80078ca: f241 3988 movw r9, #5000 ; 0x1388 80078ce: f04f 0802 mov.w r8, #2 80078d2: 2700 movs r7, #0 PLL_Setting_st Pll_test2 = { 80078d4: e885 0003 stmia.w r5, {r0, r1} ADF4153_Module_Ctrl(Pll_test,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80078d8: f241 34c2 movw r4, #5058 ; 0x13c2 80078dc: 2503 movs r5, #3 temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80078de: 4e23 ldr r6, [pc, #140] ; (800796c ) 80078e0: a806 add r0, sp, #24 80078e2: f8cd 900c str.w r9, [sp, #12] 80078e6: f8cd 8008 str.w r8, [sp, #8] 80078ea: e9cd 6700 strd r6, r7, [sp] 80078ee: f7ff fe73 bl 80075d8 ADF4153_Module_Ctrl(Pll_test,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 80078f2: 9b06 ldr r3, [sp, #24] 80078f4: 9505 str r5, [sp, #20] 80078f6: 9303 str r3, [sp, #12] 80078f8: 9b07 ldr r3, [sp, #28] 80078fa: 9404 str r4, [sp, #16] 80078fc: 9302 str r3, [sp, #8] 80078fe: ab0c add r3, sp, #48 ; 0x30 8007900: e893 0003 ldmia.w r3, {r0, r1} 8007904: e88d 0003 stmia.w sp, {r0, r1} 8007908: ab08 add r3, sp, #32 800790a: cb0f ldmia r3, {r0, r1, r2, r3} 800790c: f7ff fed2 bl 80076b4 HAL_Delay(1); 8007910: 2001 movs r0, #1 8007912: f7fd fddf bl 80054d4 temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8007916: a312 add r3, pc, #72 ; (adr r3, 8007960 ) 8007918: e9d3 2300 ldrd r2, r3, [r3] 800791c: a806 add r0, sp, #24 800791e: f8cd 900c str.w r9, [sp, #12] 8007922: f8cd 8008 str.w r8, [sp, #8] 8007926: e9cd 6700 strd r6, r7, [sp] 800792a: f7ff fe55 bl 80075d8 ADF4153_Module_Ctrl(Pll_test2,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 800792e: 9b06 ldr r3, [sp, #24] 8007930: 9505 str r5, [sp, #20] 8007932: 9303 str r3, [sp, #12] 8007934: 9b07 ldr r3, [sp, #28] 8007936: 9404 str r4, [sp, #16] 8007938: 9302 str r3, [sp, #8] 800793a: ab14 add r3, sp, #80 ; 0x50 800793c: e913 0003 ldmdb r3, {r0, r1} 8007940: e88d 0003 stmia.w sp, {r0, r1} 8007944: ab0e add r3, sp, #56 ; 0x38 8007946: cb0f ldmia r3, {r0, r1, r2, r3} 8007948: f7ff feb4 bl 80076b4 HAL_Delay(1); 800794c: 2001 movs r0, #1 } 800794e: b015 add sp, #84 ; 0x54 8007950: e8bd 43f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} HAL_Delay(1); 8007954: f7fd bdbe b.w 80054d4 8007958: ce8f5560 .word 0xce8f5560 800795c: 00000000 .word 0x00000000 8007960: ea83b4a0 .word 0xea83b4a0 8007964: 00000000 .word 0x00000000 8007968: 0800bc60 .word 0x0800bc60 800796c: 02625a00 .word 0x02625a00 08007970 : { #ifdef DEBUG_PRINT printf("%s", Bluecell_Prot_IndexStr[k]); #endif /* DEBUG_PRINT */ } void Path_Init(void){ 8007970: b570 push {r4, r5, r6, lr} Prev_data[INDEX_PATH_EN_1_8G_DL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin); 8007972: 4d24 ldr r5, [pc, #144] ; (8007a04 ) 8007974: f44f 4180 mov.w r1, #16384 ; 0x4000 8007978: 4628 mov r0, r5 800797a: f7fe fb73 bl 8006064 800797e: 4c22 ldr r4, [pc, #136] ; (8007a08 ) Prev_data[INDEX_PATH_EN_1_8G_UL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin); 8007980: f44f 4100 mov.w r1, #32768 ; 0x8000 Prev_data[INDEX_PATH_EN_1_8G_DL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin); 8007984: f884 0040 strb.w r0, [r4, #64] ; 0x40 Prev_data[INDEX_PATH_EN_1_8G_UL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin); 8007988: 4628 mov r0, r5 800798a: f7fe fb6b bl 8006064 Prev_data[INDEX_PATH_EN_2_1G_DL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin); 800798e: 4e1f ldr r6, [pc, #124] ; (8007a0c ) Prev_data[INDEX_PATH_EN_1_8G_UL] = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin); 8007990: f884 0041 strb.w r0, [r4, #65] ; 0x41 Prev_data[INDEX_PATH_EN_2_1G_DL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin); 8007994: 2101 movs r1, #1 8007996: 4630 mov r0, r6 8007998: f7fe fb64 bl 8006064 Prev_data[INDEX_PATH_EN_2_1G_UL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin); 800799c: 2102 movs r1, #2 Prev_data[INDEX_PATH_EN_2_1G_DL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin); 800799e: f884 0042 strb.w r0, [r4, #66] ; 0x42 Prev_data[INDEX_PATH_EN_2_1G_UL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin); 80079a2: 4630 mov r0, r6 80079a4: f7fe fb5e bl 8006064 Prev_data[INDEX_PATH_EN_3_5G_L] = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin); 80079a8: 2180 movs r1, #128 ; 0x80 Prev_data[INDEX_PATH_EN_2_1G_UL] = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin); 80079aa: f884 0043 strb.w r0, [r4, #67] ; 0x43 Prev_data[INDEX_PATH_EN_3_5G_L] = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin); 80079ae: 4818 ldr r0, [pc, #96] ; (8007a10 ) 80079b0: f7fe fb58 bl 8006064 Prev_data[INDEX_PATH_EN_3_5G_H] = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin); 80079b4: f506 6600 add.w r6, r6, #2048 ; 0x800 Prev_data[INDEX_PATH_EN_3_5G_L] = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin); 80079b8: f884 0044 strb.w r0, [r4, #68] ; 0x44 Prev_data[INDEX_PATH_EN_3_5G_H] = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin); 80079bc: f44f 7100 mov.w r1, #512 ; 0x200 80079c0: 4630 mov r0, r6 80079c2: f7fe fb4f bl 8006064 Prev_data[INDEX_PATH_EN_3_5G_DL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin); 80079c6: f44f 6180 mov.w r1, #1024 ; 0x400 Prev_data[INDEX_PATH_EN_3_5G_H] = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin); 80079ca: f884 0045 strb.w r0, [r4, #69] ; 0x45 Prev_data[INDEX_PATH_EN_3_5G_DL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin); 80079ce: 4630 mov r0, r6 80079d0: f7fe fb48 bl 8006064 Prev_data[INDEX_PATH_EN_3_5G_UL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin); 80079d4: f44f 6100 mov.w r1, #2048 ; 0x800 Prev_data[INDEX_PATH_EN_3_5G_DL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin); 80079d8: f884 0046 strb.w r0, [r4, #70] ; 0x46 Prev_data[INDEX_PATH_EN_3_5G_UL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin); 80079dc: 4630 mov r0, r6 80079de: f7fe fb41 bl 8006064 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin); 80079e2: f44f 5180 mov.w r1, #4096 ; 0x1000 Prev_data[INDEX_PATH_EN_3_5G_UL] = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin); 80079e6: f884 0047 strb.w r0, [r4, #71] ; 0x47 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin); 80079ea: 4628 mov r0, r5 80079ec: f7fe fb3a bl 8006064 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin); 80079f0: f44f 6180 mov.w r1, #1024 ; 0x400 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin); 80079f4: f884 0048 strb.w r0, [r4, #72] ; 0x48 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin); 80079f8: 4628 mov r0, r5 80079fa: f7fe fb33 bl 8006064 80079fe: f884 0049 strb.w r0, [r4, #73] ; 0x49 8007a02: bd70 pop {r4, r5, r6, pc} 8007a04: 40011000 .word 0x40011000 8007a08: 200004cc .word 0x200004cc 8007a0c: 40011800 .word 0x40011800 8007a10: 40011400 .word 0x40011400 08007a14 : } void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){ 8007a14: b538 push {r3, r4, r5, lr} 8007a16: 4605 mov r5, r0 8007a18: 460c mov r4, r1 printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd); 8007a1a: 4b51 ldr r3, [pc, #324] ; (8007b60 ) 8007a1c: 1f01 subs r1, r0, #4 8007a1e: 4622 mov r2, r4 8007a20: f853 1021 ldr.w r1, [r3, r1, lsl #2] 8007a24: 484f ldr r0, [pc, #316] ; (8007b64 ) switch(type){ 8007a26: 3d40 subs r5, #64 ; 0x40 printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd); 8007a28: f002 f8fe bl 8009c28 switch(type){ 8007a2c: 2d0d cmp r5, #13 8007a2e: f200 8096 bhi.w 8007b5e 8007a32: e8df f005 tbb [pc, r5] 8007a36: 1207 .short 0x1207 8007a38: 39262019 .word 0x39262019 8007a3c: 6459524a .word 0x6459524a 8007a40: 6f6f6f6f .word 0x6f6f6f6f case INDEX_PATH_EN_1_8G_DL : #if 0 // PYJ.2019.07.29_BEGIN -- printf("\r\n LINE %d\r\n",__LINE__); #endif // PYJ.2019.07.29_END -- if(cmd) 8007a44: b13c cbz r4, 8007a56 HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET); 8007a46: 2201 movs r2, #1 else HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET); 8007a48: f44f 4180 mov.w r1, #16384 ; 0x4000 8007a4c: 4846 ldr r0, [pc, #280] ; (8007b68 ) #endif /* DEBUG_PRINT */ break; } } 8007a4e: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET); 8007a52: f7fe bb0d b.w 8006070 HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET); 8007a56: 4622 mov r2, r4 8007a58: e7f6 b.n 8007a48 if(cmd) 8007a5a: b11c cbz r4, 8007a64 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET); 8007a5c: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET); 8007a5e: f44f 4100 mov.w r1, #32768 ; 0x8000 8007a62: e7f3 b.n 8007a4c 8007a64: 4622 mov r2, r4 8007a66: e7fa b.n 8007a5e if(cmd) 8007a68: b11c cbz r4, 8007a72 HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET); 8007a6a: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET); 8007a6c: 2101 movs r1, #1 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007a6e: 483f ldr r0, [pc, #252] ; (8007b6c ) 8007a70: e7ed b.n 8007a4e HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET); 8007a72: 4622 mov r2, r4 8007a74: e7fa b.n 8007a6c if(cmd) 8007a76: b114 cbz r4, 8007a7e HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET); 8007a78: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007a7a: 2102 movs r1, #2 8007a7c: e7f7 b.n 8007a6e 8007a7e: 4622 mov r2, r4 8007a80: e7fb b.n 8007a7a if(cmd){ 8007a82: b154 cbz r4, 8007a9a HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET); 8007a84: 2180 movs r1, #128 ; 0x80 8007a86: 2201 movs r2, #1 8007a88: 4839 ldr r0, [pc, #228] ; (8007b70 ) 8007a8a: f7fe faf1 bl 8006070 printf("\r\n LINE %d\r\n",__LINE__); 8007a8e: 2196 movs r1, #150 ; 0x96 } 8007a90: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} printf("\r\n LINE %d\r\n",__LINE__); 8007a94: 4837 ldr r0, [pc, #220] ; (8007b74 ) 8007a96: f002 b8c7 b.w 8009c28 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET); 8007a9a: 2180 movs r1, #128 ; 0x80 8007a9c: 4622 mov r2, r4 8007a9e: 4834 ldr r0, [pc, #208] ; (8007b70 ) 8007aa0: f7fe fae6 bl 8006070 printf("\r\n LINE %d\r\n",__LINE__); 8007aa4: 219a movs r1, #154 ; 0x9a 8007aa6: e7f3 b.n 8007a90 if(cmd){ 8007aa8: b13c cbz r4, 8007aba HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET); 8007aaa: f44f 7100 mov.w r1, #512 ; 0x200 8007aae: 2201 movs r2, #1 8007ab0: 4831 ldr r0, [pc, #196] ; (8007b78 ) 8007ab2: f7fe fadd bl 8006070 printf("\r\n LINE %d\r\n",__LINE__); 8007ab6: 21a0 movs r1, #160 ; 0xa0 8007ab8: e7ea b.n 8007a90 HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET); 8007aba: f44f 7100 mov.w r1, #512 ; 0x200 8007abe: 4622 mov r2, r4 8007ac0: 482d ldr r0, [pc, #180] ; (8007b78 ) 8007ac2: f7fe fad5 bl 8006070 printf("\r\n LINE %d\r\n",__LINE__); 8007ac6: 21a4 movs r1, #164 ; 0xa4 8007ac8: e7e2 b.n 8007a90 if(cmd) 8007aca: b124 cbz r4, 8007ad6 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET); 8007acc: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET); 8007ace: f44f 6180 mov.w r1, #1024 ; 0x400 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET); 8007ad2: 4829 ldr r0, [pc, #164] ; (8007b78 ) 8007ad4: e7bb b.n 8007a4e HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET); 8007ad6: 4622 mov r2, r4 8007ad8: e7f9 b.n 8007ace if(cmd) 8007ada: b11c cbz r4, 8007ae4 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET); 8007adc: 2201 movs r2, #1 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET); 8007ade: f44f 6100 mov.w r1, #2048 ; 0x800 8007ae2: e7f6 b.n 8007ad2 8007ae4: 4622 mov r2, r4 8007ae6: e7fa b.n 8007ade printf("\r\n LINE %d\r\n",__LINE__); 8007ae8: 21ba movs r1, #186 ; 0xba 8007aea: 4822 ldr r0, [pc, #136] ; (8007b74 ) 8007aec: f002 f89c bl 8009c28 if(cmd) 8007af0: b11c cbz r4, 8007afa HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET); 8007af2: 2201 movs r2, #1 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET); 8007af4: f44f 5180 mov.w r1, #4096 ; 0x1000 8007af8: e7a8 b.n 8007a4c 8007afa: 4622 mov r2, r4 8007afc: e7fa b.n 8007af4 printf("\r\n LINE %d\r\n",__LINE__); 8007afe: 21c1 movs r1, #193 ; 0xc1 8007b00: 481c ldr r0, [pc, #112] ; (8007b74 ) 8007b02: f002 f891 bl 8009c28 if(cmd) 8007b06: b11c cbz r4, 8007b10 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET); 8007b08: 2201 movs r2, #1 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET); 8007b0a: f44f 6180 mov.w r1, #1024 ; 0x400 8007b0e: e79d b.n 8007a4c 8007b10: 4622 mov r2, r4 8007b12: e7fa b.n 8007b0a if(cmd){ 8007b14: b194 cbz r4, 8007b3c HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET); 8007b16: 2200 movs r2, #0 8007b18: 2120 movs r1, #32 8007b1a: 4817 ldr r0, [pc, #92] ; (8007b78 ) 8007b1c: f7fe faa8 bl 8006070 HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET); 8007b20: 2200 movs r2, #0 8007b22: 2140 movs r1, #64 ; 0x40 8007b24: 4814 ldr r0, [pc, #80] ; (8007b78 ) 8007b26: f7fe faa3 bl 8006070 HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET); 8007b2a: 2201 movs r2, #1 8007b2c: 2180 movs r1, #128 ; 0x80 8007b2e: 4812 ldr r0, [pc, #72] ; (8007b78 ) 8007b30: f7fe fa9e bl 8006070 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET); 8007b34: 2201 movs r2, #1 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET); 8007b36: f44f 7180 mov.w r1, #256 ; 0x100 8007b3a: e7ca b.n 8007ad2 HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_SET); 8007b3c: 2201 movs r2, #1 8007b3e: 2120 movs r1, #32 8007b40: 480d ldr r0, [pc, #52] ; (8007b78 ) 8007b42: f7fe fa95 bl 8006070 HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_SET); 8007b46: 2201 movs r2, #1 8007b48: 2140 movs r1, #64 ; 0x40 8007b4a: 480b ldr r0, [pc, #44] ; (8007b78 ) 8007b4c: f7fe fa90 bl 8006070 HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_RESET); 8007b50: 4622 mov r2, r4 8007b52: 2180 movs r1, #128 ; 0x80 8007b54: 4808 ldr r0, [pc, #32] ; (8007b78 ) 8007b56: f7fe fa8b bl 8006070 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET); 8007b5a: 4622 mov r2, r4 8007b5c: e7eb b.n 8007b36 8007b5e: bd38 pop {r3, r4, r5, pc} 8007b60: 0800bcf0 .word 0x0800bcf0 8007b64: 0800be18 .word 0x0800be18 8007b68: 40011000 .word 0x40011000 8007b6c: 40011800 .word 0x40011800 8007b70: 40011400 .word 0x40011400 8007b74: 0800be2f .word 0x0800be2f 8007b78: 40012000 .word 0x40012000 08007b7c : #if 1 // PYJ.2019.07.26_BEGIN -- void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8007b7c: 6802 ldr r2, [r0, #0] 8007b7e: 4b08 ldr r3, [pc, #32] ; (8007ba0 ) 8007b80: 429a cmp r2, r3 8007b82: d10b bne.n 8007b9c UartRxTimerCnt++; 8007b84: 4a07 ldr r2, [pc, #28] ; (8007ba4 ) 8007b86: 6813 ldr r3, [r2, #0] 8007b88: 3301 adds r3, #1 8007b8a: 6013 str r3, [r2, #0] LedTimerCnt++; 8007b8c: 4a06 ldr r2, [pc, #24] ; (8007ba8 ) 8007b8e: 6813 ldr r3, [r2, #0] 8007b90: 3301 adds r3, #1 8007b92: 6013 str r3, [r2, #0] AdcTimerCnt++; 8007b94: 4a05 ldr r2, [pc, #20] ; (8007bac ) 8007b96: 6813 ldr r3, [r2, #0] 8007b98: 3301 adds r3, #1 8007b9a: 6013 str r3, [r2, #0] 8007b9c: 4770 bx lr 8007b9e: bf00 nop 8007ba0: 40001000 .word 0x40001000 8007ba4: 20000428 .word 0x20000428 8007ba8: 20000424 .word 0x20000424 8007bac: 20000420 .word 0x20000420 08007bb0 <_write>: } } #endif // PYJ.2019.07.26_END -- int _write (int file, uint8_t *ptr, uint16_t len) { 8007bb0: b510 push {r4, lr} 8007bb2: 4614 mov r4, r2 HAL_UART_Transmit(&huart1, ptr, len,10); 8007bb4: 230a movs r3, #10 8007bb6: 4802 ldr r0, [pc, #8] ; (8007bc0 <_write+0x10>) 8007bb8: f7ff f82a bl 8006c10 // HAL_UART_Transmit_IT(&huart1, ptr, len); return len; } 8007bbc: 4620 mov r0, r4 8007bbe: bd10 pop {r4, pc} 8007bc0: 2000061c .word 0x2000061c 08007bc4 : void Pol_Delay_us(volatile uint32_t microseconds) { /* Go to number of cycles for system */ microseconds *= (SystemCoreClock / 1000000); 8007bc4: 4a08 ldr r2, [pc, #32] ; (8007be8 ) 8007bc6: 4909 ldr r1, [pc, #36] ; (8007bec ) 8007bc8: 6812 ldr r2, [r2, #0] { 8007bca: b082 sub sp, #8 microseconds *= (SystemCoreClock / 1000000); 8007bcc: fbb2 f2f1 udiv r2, r2, r1 { 8007bd0: 9001 str r0, [sp, #4] microseconds *= (SystemCoreClock / 1000000); 8007bd2: 9b01 ldr r3, [sp, #4] 8007bd4: 4353 muls r3, r2 8007bd6: 9301 str r3, [sp, #4] /* Delay till end */ while (microseconds--); 8007bd8: 9b01 ldr r3, [sp, #4] 8007bda: 1e5a subs r2, r3, #1 8007bdc: 9201 str r2, [sp, #4] 8007bde: 2b00 cmp r3, #0 8007be0: d1fa bne.n 8007bd8 } 8007be2: b002 add sp, #8 8007be4: 4770 bx lr 8007be6: bf00 nop 8007be8: 20000200 .word 0x20000200 8007bec: 000f4240 .word 0x000f4240 08007bf0 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8007bf0: b510 push {r4, lr} 8007bf2: b096 sub sp, #88 ; 0x58 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8007bf4: 2228 movs r2, #40 ; 0x28 8007bf6: 2100 movs r1, #0 8007bf8: a80c add r0, sp, #48 ; 0x30 8007bfa: f001 fbac bl 8009356 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8007bfe: 2214 movs r2, #20 8007c00: 2100 movs r1, #0 8007c02: a801 add r0, sp, #4 8007c04: f001 fba7 bl 8009356 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8007c08: 2218 movs r2, #24 8007c0a: 2100 movs r1, #0 8007c0c: eb0d 0002 add.w r0, sp, r2 8007c10: f001 fba1 bl 8009356 /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8007c14: 2301 movs r3, #1 8007c16: 9310 str r3, [sp, #64] ; 0x40 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8007c18: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8007c1a: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8007c1c: 9311 str r3, [sp, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15; 8007c1e: f44f 1350 mov.w r3, #3407872 ; 0x340000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8007c22: a80c add r0, sp, #48 ; 0x30 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15; 8007c24: 9315 str r3, [sp, #84] ; 0x54 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8007c26: 940c str r4, [sp, #48] ; 0x30 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8007c28: 9413 str r4, [sp, #76] ; 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8007c2a: f7fe fa2b bl 8006084 { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8007c2e: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8007c30: f44f 6280 mov.w r2, #1024 ; 0x400 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8007c34: 9301 str r3, [sp, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8007c36: 2300 movs r3, #0 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8007c38: 4621 mov r1, r4 8007c3a: a801 add r0, sp, #4 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8007c3c: 9303 str r3, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8007c3e: 9204 str r2, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8007c40: 9305 str r3, [sp, #20] RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8007c42: 9402 str r4, [sp, #8] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8007c44: f7fe fbe6 bl 8006414 { Error_Handler(); } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 8007c48: f44f 4300 mov.w r3, #32768 ; 0x8000 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8007c4c: a806 add r0, sp, #24 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; 8007c4e: 9406 str r4, [sp, #24] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 8007c50: 9308 str r3, [sp, #32] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8007c52: f7fe fcb1 bl 80065b8 { Error_Handler(); } } 8007c56: b016 add sp, #88 ; 0x58 8007c58: bd10 pop {r4, pc} 8007c5a: 0000 movs r0, r0 8007c5c: 0000 movs r0, r0 ... 08007c60
: { 8007c60: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007c64: b0ab sub sp, #172 ; 0xac * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007c66: ad24 add r5, sp, #144 ; 0x90 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8007c68: 4fc2 ldr r7, [pc, #776] ; (8007f74 ) HAL_Init(); 8007c6a: f7fd fc0f bl 800548c SystemClock_Config(); 8007c6e: f7ff ffbf bl 8007bf0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8007c72: 2210 movs r2, #16 8007c74: 2100 movs r1, #0 8007c76: 4628 mov r0, r5 8007c78: f001 fb6d bl 8009356 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007c7c: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007c7e: 2200 movs r2, #0 __HAL_RCC_GPIOE_CLK_ENABLE(); 8007c80: f043 0340 orr.w r3, r3, #64 ; 0x40 8007c84: 61bb str r3, [r7, #24] 8007c86: 69bb ldr r3, [r7, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007c88: 217f movs r1, #127 ; 0x7f __HAL_RCC_GPIOE_CLK_ENABLE(); 8007c8a: f003 0340 and.w r3, r3, #64 ; 0x40 8007c8e: 9309 str r3, [sp, #36] ; 0x24 8007c90: 9b09 ldr r3, [sp, #36] ; 0x24 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007c92: 69bb ldr r3, [r7, #24] HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007c94: 48b8 ldr r0, [pc, #736] ; (8007f78 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8007c96: f043 0310 orr.w r3, r3, #16 8007c9a: 61bb str r3, [r7, #24] 8007c9c: 69bb ldr r3, [r7, #24] /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8007c9e: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8007ca0: f003 0310 and.w r3, r3, #16 8007ca4: 930a str r3, [sp, #40] ; 0x28 8007ca6: 9b0a ldr r3, [sp, #40] ; 0x28 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007ca8: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007caa: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007cac: f043 0380 orr.w r3, r3, #128 ; 0x80 8007cb0: 61bb str r3, [r7, #24] 8007cb2: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007cb4: f04f 0802 mov.w r8, #2 __HAL_RCC_GPIOF_CLK_ENABLE(); 8007cb8: f003 0380 and.w r3, r3, #128 ; 0x80 8007cbc: 930b str r3, [sp, #44] ; 0x2c 8007cbe: 9b0b ldr r3, [sp, #44] ; 0x2c __HAL_RCC_GPIOA_CLK_ENABLE(); 8007cc0: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8007cc2: f04f 0b0c mov.w fp, #12 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007cc6: f043 0304 orr.w r3, r3, #4 8007cca: 61bb str r3, [r7, #24] 8007ccc: 69bb ldr r3, [r7, #24] hadc1.Init.NbrOfConversion = 14; 8007cce: f04f 090e mov.w r9, #14 __HAL_RCC_GPIOA_CLK_ENABLE(); 8007cd2: f003 0304 and.w r3, r3, #4 8007cd6: 930c str r3, [sp, #48] ; 0x30 8007cd8: 9b0c ldr r3, [sp, #48] ; 0x30 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007cda: 69bb ldr r3, [r7, #24] sConfig.Rank = ADC_REGULAR_RANK_3; 8007cdc: f04f 0a03 mov.w sl, #3 __HAL_RCC_GPIOB_CLK_ENABLE(); 8007ce0: f043 0308 orr.w r3, r3, #8 8007ce4: 61bb str r3, [r7, #24] 8007ce6: 69bb ldr r3, [r7, #24] 8007ce8: f003 0308 and.w r3, r3, #8 8007cec: 930d str r3, [sp, #52] ; 0x34 8007cee: 9b0d ldr r3, [sp, #52] ; 0x34 __HAL_RCC_GPIOD_CLK_ENABLE(); 8007cf0: 69bb ldr r3, [r7, #24] 8007cf2: f043 0320 orr.w r3, r3, #32 8007cf6: 61bb str r3, [r7, #24] 8007cf8: 69bb ldr r3, [r7, #24] 8007cfa: f003 0320 and.w r3, r3, #32 8007cfe: 930e str r3, [sp, #56] ; 0x38 8007d00: 9b0e ldr r3, [sp, #56] ; 0x38 __HAL_RCC_GPIOG_CLK_ENABLE(); 8007d02: 69bb ldr r3, [r7, #24] 8007d04: f443 7380 orr.w r3, r3, #256 ; 0x100 8007d08: 61bb str r3, [r7, #24] 8007d0a: 69bb ldr r3, [r7, #24] 8007d0c: f403 7380 and.w r3, r3, #256 ; 0x100 8007d10: 930f str r3, [sp, #60] ; 0x3c 8007d12: 9b0f ldr r3, [sp, #60] ; 0x3c HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007d14: f7fe f9ac bl 8006070 HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007d18: 2200 movs r2, #0 8007d1a: f64f 41c0 movw r1, #64704 ; 0xfcc0 8007d1e: 4897 ldr r0, [pc, #604] ; (8007f7c ) 8007d20: f7fe f9a6 bl 8006070 HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007d24: 2200 movs r2, #0 8007d26: f240 31f3 movw r1, #1011 ; 0x3f3 8007d2a: 4895 ldr r0, [pc, #596] ; (8007f80 ) 8007d2c: f7fe f9a0 bl 8006070 HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007d30: 2200 movs r2, #0 8007d32: f648 71ff movw r1, #36863 ; 0x8fff 8007d36: 4893 ldr r0, [pc, #588] ; (8007f84 ) 8007d38: f7fe f99a bl 8006070 HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007d3c: 2200 movs r2, #0 8007d3e: f647 71fc movw r1, #32764 ; 0x7ffc 8007d42: 4891 ldr r0, [pc, #580] ; (8007f88 ) 8007d44: f7fe f994 bl 8006070 HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET); 8007d48: 2200 movs r2, #0 8007d4a: f44f 4100 mov.w r1, #32768 ; 0x8000 8007d4e: 488f ldr r0, [pc, #572] ; (8007f8c ) 8007d50: f7fe f98e bl 8006070 HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET); 8007d54: 2200 movs r2, #0 8007d56: 2118 movs r1, #24 8007d58: 488d ldr r0, [pc, #564] ; (8007f90 ) 8007d5a: f7fe f989 bl 8006070 GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007d5e: 237f movs r3, #127 ; 0x7f HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007d60: 4629 mov r1, r5 8007d62: 4885 ldr r0, [pc, #532] ; (8007f78 ) GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 8007d64: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007d66: 9625 str r6, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007d68: 9426 str r4, [sp, #152] ; 0x98 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007d6a: f8cd 809c str.w r8, [sp, #156] ; 0x9c HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8007d6e: f7fe f88d bl 8005e8c GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007d72: f64f 43c0 movw r3, #64704 ; 0xfcc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007d76: 4629 mov r1, r5 8007d78: 4880 ldr r0, [pc, #512] ; (8007f7c ) GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 8007d7a: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007d7c: 9625 str r6, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007d7e: 9426 str r4, [sp, #152] ; 0x98 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007d80: f8cd 809c str.w r8, [sp, #156] ; 0x9c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007d84: f7fe f882 bl 8005e8c GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007d88: f240 33f3 movw r3, #1011 ; 0x3f3 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007d8c: 4629 mov r1, r5 8007d8e: 487c ldr r0, [pc, #496] ; (8007f80 ) GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 8007d90: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007d92: 9625 str r6, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007d94: 9426 str r4, [sp, #152] ; 0x98 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007d96: f8cd 809c str.w r8, [sp, #156] ; 0x9c HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007d9a: f7fe f877 bl 8005e8c GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007d9e: 4629 mov r1, r5 8007da0: 4877 ldr r0, [pc, #476] ; (8007f80 ) GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin; 8007da2: f8cd b090 str.w fp, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007da6: 9425 str r4, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007da8: 9426 str r4, [sp, #152] ; 0x98 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8007daa: f7fe f86f bl 8005e8c /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin PATH_EN_3_5G_L_Pin */ GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007dae: f648 73ff movw r3, #36863 ; 0x8fff |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin |PATH_EN_3_5G_L_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007db2: 4629 mov r1, r5 8007db4: 4873 ldr r0, [pc, #460] ; (8007f84 ) GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 8007db6: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007db8: 9625 str r6, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007dba: 9426 str r4, [sp, #152] ; 0x98 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007dbc: f8cd 809c str.w r8, [sp, #156] ; 0x9c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007dc0: f7fe f864 bl 8005e8c /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */ GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8007dc4: f44f 5340 mov.w r3, #12288 ; 0x3000 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007dc8: 4629 mov r1, r5 8007dca: 486e ldr r0, [pc, #440] ; (8007f84 ) GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin; 8007dcc: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007dce: 9425 str r4, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007dd0: 9426 str r4, [sp, #152] ; 0x98 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8007dd2: f7fe f85b bl 8005e8c /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin BOOT_LED_Pin */ GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007dd6: f647 73fc movw r3, #32764 ; 0x7ffc |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin |BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007dda: 4629 mov r1, r5 8007ddc: 486a ldr r0, [pc, #424] ; (8007f88 ) GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 8007dde: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007de0: 9625 str r6, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007de2: 9426 str r4, [sp, #152] ; 0x98 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007de4: f8cd 809c str.w r8, [sp, #156] ; 0x9c HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8007de8: f7fe f850 bl 8005e8c /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */ GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8007dec: f44f 7340 mov.w r3, #768 ; 0x300 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007df0: 4629 mov r1, r5 8007df2: 4862 ldr r0, [pc, #392] ; (8007f7c ) GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin; 8007df4: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007df6: 9425 str r4, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007df8: 9426 str r4, [sp, #152] ; 0x98 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8007dfa: f7fe f847 bl 8005e8c /*Configure GPIO pin : PLL_CLK_3_5G_Pin */ GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8007dfe: f44f 4300 mov.w r3, #32768 ; 0x8000 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8007e02: 4629 mov r1, r5 8007e04: 4861 ldr r0, [pc, #388] ; (8007f8c ) GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin; 8007e06: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007e08: 9625 str r6, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e0a: 9426 str r4, [sp, #152] ; 0x98 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007e0c: f8cd 809c str.w r8, [sp, #156] ; 0x9c HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct); 8007e10: f7fe f83c bl 8005e8c /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8007e14: 2318 movs r3, #24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007e16: 4629 mov r1, r5 8007e18: 485d ldr r0, [pc, #372] ; (8007f90 ) GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin; 8007e1a: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8007e1c: 9625 str r6, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e1e: 9426 str r4, [sp, #152] ; 0x98 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8007e20: f8cd 809c str.w r8, [sp, #156] ; 0x9c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007e24: f7fe f832 bl 8005e8c /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */ GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007e28: 2360 movs r3, #96 ; 0x60 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007e2a: 4629 mov r1, r5 8007e2c: 4858 ldr r0, [pc, #352] ; (8007f90 ) GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin; 8007e2e: 9324 str r3, [sp, #144] ; 0x90 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8007e30: 9425 str r4, [sp, #148] ; 0x94 GPIO_InitStruct.Pull = GPIO_NOPULL; 8007e32: 9426 str r4, [sp, #152] ; 0x98 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8007e34: f7fe f82a bl 8005e8c __HAL_RCC_DMA1_CLK_ENABLE(); 8007e38: 697b ldr r3, [r7, #20] 8007e3a: 4333 orrs r3, r6 8007e3c: 617b str r3, [r7, #20] 8007e3e: 697b ldr r3, [r7, #20] hadc1.Instance = ADC1; 8007e40: 4f54 ldr r7, [pc, #336] ; (8007f94 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8007e42: 4033 ands r3, r6 8007e44: 9308 str r3, [sp, #32] 8007e46: 9b08 ldr r3, [sp, #32] hadc1.Instance = ADC1; 8007e48: 4b53 ldr r3, [pc, #332] ; (8007f98 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 8007e4a: 4638 mov r0, r7 hadc1.Instance = ADC1; 8007e4c: 603b str r3, [r7, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8007e4e: f44f 7380 mov.w r3, #256 ; 0x100 8007e52: 60bb str r3, [r7, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8007e54: f44f 2360 mov.w r3, #917504 ; 0xe0000 ADC_ChannelConfTypeDef sConfig = {0}; 8007e58: 606c str r4, [r5, #4] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8007e5a: 61fb str r3, [r7, #28] ADC_ChannelConfTypeDef sConfig = {0}; 8007e5c: 60ac str r4, [r5, #8] hadc1.Init.ContinuousConvMode = ENABLE; 8007e5e: 60fe str r6, [r7, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 8007e60: 617c str r4, [r7, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8007e62: 607c str r4, [r7, #4] hadc1.Init.NbrOfConversion = 14; 8007e64: f8c7 9010 str.w r9, [r7, #16] ADC_ChannelConfTypeDef sConfig = {0}; 8007e68: 9424 str r4, [sp, #144] ; 0x90 if (HAL_ADC_Init(&hadc1) != HAL_OK) 8007e6a: f7fd fced bl 8005848 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007e6e: 4629 mov r1, r5 8007e70: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_0; 8007e72: 9424 str r4, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_1; 8007e74: 9625 str r6, [sp, #148] ; 0x94 sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 8007e76: 9426 str r4, [sp, #152] ; 0x98 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007e78: f7fd fb7a bl 8005570 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007e7c: 4629 mov r1, r5 8007e7e: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_1; 8007e80: 9624 str r6, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_2; 8007e82: f8cd 8094 str.w r8, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007e86: f7fd fb73 bl 8005570 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007e8a: 4629 mov r1, r5 8007e8c: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_2; 8007e8e: f8cd 8090 str.w r8, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_3; 8007e92: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007e96: f7fd fb6b bl 8005570 sConfig.Channel = ADC_CHANNEL_3; 8007e9a: f8cd a090 str.w sl, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_4; 8007e9e: f04f 0a04 mov.w sl, #4 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007ea2: 4629 mov r1, r5 8007ea4: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_4; 8007ea6: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007eaa: f7fd fb61 bl 8005570 sConfig.Channel = ADC_CHANNEL_4; 8007eae: f8cd a090 str.w sl, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_5; 8007eb2: f04f 0a05 mov.w sl, #5 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007eb6: 4629 mov r1, r5 8007eb8: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_5; 8007eba: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007ebe: f7fd fb57 bl 8005570 sConfig.Channel = ADC_CHANNEL_5; 8007ec2: f8cd a090 str.w sl, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_6; 8007ec6: f04f 0a06 mov.w sl, #6 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007eca: 4629 mov r1, r5 8007ecc: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_6; 8007ece: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007ed2: f7fd fb4d bl 8005570 sConfig.Channel = ADC_CHANNEL_6; 8007ed6: f8cd a090 str.w sl, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_7; 8007eda: f04f 0a07 mov.w sl, #7 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007ede: 4629 mov r1, r5 8007ee0: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_7; 8007ee2: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007ee6: f7fd fb43 bl 8005570 sConfig.Channel = ADC_CHANNEL_7; 8007eea: f8cd a090 str.w sl, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_8; 8007eee: f04f 0a08 mov.w sl, #8 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007ef2: 4629 mov r1, r5 8007ef4: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_8; 8007ef6: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007efa: f7fd fb39 bl 8005570 sConfig.Channel = ADC_CHANNEL_8; 8007efe: f8cd a090 str.w sl, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_9; 8007f02: f04f 0a09 mov.w sl, #9 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f06: 4629 mov r1, r5 8007f08: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_9; 8007f0a: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f0e: f7fd fb2f bl 8005570 sConfig.Rank = ADC_REGULAR_RANK_10; 8007f12: 220a movs r2, #10 sConfig.Channel = ADC_CHANNEL_9; 8007f14: f8cd a090 str.w sl, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_11; 8007f18: f04f 0a0b mov.w sl, #11 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f1c: 4629 mov r1, r5 8007f1e: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_10; 8007f20: 9225 str r2, [sp, #148] ; 0x94 8007f22: 9206 str r2, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f24: f7fd fb24 bl 8005570 sConfig.Channel = ADC_CHANNEL_10; 8007f28: 9a06 ldr r2, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f2a: 4629 mov r1, r5 8007f2c: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_10; 8007f2e: 9224 str r2, [sp, #144] ; 0x90 8007f30: 9207 str r2, [sp, #28] sConfig.Rank = ADC_REGULAR_RANK_11; 8007f32: f8cd a094 str.w sl, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f36: f7fd fb1b bl 8005570 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f3a: 4629 mov r1, r5 8007f3c: 4638 mov r0, r7 sConfig.Rank = ADC_REGULAR_RANK_12; 8007f3e: f8cd b094 str.w fp, [sp, #148] ; 0x94 sConfig.Channel = ADC_CHANNEL_11; 8007f42: f8cd a090 str.w sl, [sp, #144] ; 0x90 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f46: f7fd fb13 bl 8005570 sConfig.Rank = ADC_REGULAR_RANK_13; 8007f4a: 230d movs r3, #13 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f4c: 4629 mov r1, r5 8007f4e: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_12; 8007f50: f8cd b090 str.w fp, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_13; 8007f54: 9325 str r3, [sp, #148] ; 0x94 8007f56: 9306 str r3, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f58: f7fd fb0a bl 8005570 sConfig.Channel = ADC_CHANNEL_13; 8007f5c: 9b06 ldr r3, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f5e: 4629 mov r1, r5 8007f60: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_13; 8007f62: 9324 str r3, [sp, #144] ; 0x90 sConfig.Rank = ADC_REGULAR_RANK_14; 8007f64: f8cd 9094 str.w r9, [sp, #148] ; 0x94 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8007f68: f7fd fb02 bl 8005570 huart1.Init.BaudRate = 115200; 8007f6c: f44f 32e1 mov.w r2, #115200 ; 0x1c200 8007f70: e014 b.n 8007f9c 8007f72: bf00 nop 8007f74: 40021000 .word 0x40021000 8007f78: 40011800 .word 0x40011800 8007f7c: 40011000 .word 0x40011000 8007f80: 40011c00 .word 0x40011c00 8007f84: 40011400 .word 0x40011400 8007f88: 40012000 .word 0x40012000 8007f8c: 40010800 .word 0x40010800 8007f90: 40010c00 .word 0x40010c00 8007f94: 200005a8 .word 0x200005a8 8007f98: 40012400 .word 0x40012400 huart1.Instance = USART1; 8007f9c: 4bd4 ldr r3, [pc, #848] ; (80082f0 ) huart1.Init.BaudRate = 115200; 8007f9e: 49d5 ldr r1, [pc, #852] ; (80082f4 ) if (HAL_UART_Init(&huart1) != HAL_OK) 8007fa0: 4618 mov r0, r3 huart1.Init.BaudRate = 115200; 8007fa2: e883 0006 stmia.w r3, {r1, r2} huart1.Init.WordLength = UART_WORDLENGTH_8B; 8007fa6: 609c str r4, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8007fa8: 60dc str r4, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8007faa: 611c str r4, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8007fac: f8c3 b014 str.w fp, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8007fb0: 619c str r4, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8007fb2: 61dc str r4, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8007fb4: 9306 str r3, [sp, #24] 8007fb6: f7fe fdfd bl 8006bb4 htim6.Init.Prescaler = 6000-1; 8007fba: f241 716f movw r1, #5999 ; 0x176f htim6.Instance = TIM6; 8007fbe: f8df b370 ldr.w fp, [pc, #880] ; 8008330 htim6.Init.Prescaler = 6000-1; 8007fc2: 48cd ldr r0, [pc, #820] ; (80082f8 ) htim6.Init.Period = 10; 8007fc4: 9a07 ldr r2, [sp, #28] htim6.Init.Prescaler = 6000-1; 8007fc6: e88b 0003 stmia.w fp, {r0, r1} if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8007fca: 4658 mov r0, fp TIM_MasterConfigTypeDef sMasterConfig = {0}; 8007fcc: 606c str r4, [r5, #4] htim6.Init.Period = 10; 8007fce: f8cb 200c str.w r2, [fp, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8007fd2: 9424 str r4, [sp, #144] ; 0x90 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8007fd4: f8cb 4008 str.w r4, [fp, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8007fd8: f8cb 4018 str.w r4, [fp, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8007fdc: f7fe fcd8 bl 8006990 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8007fe0: 4629 mov r1, r5 8007fe2: 4658 mov r0, fp sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8007fe4: 9424 str r4, [sp, #144] ; 0x90 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8007fe6: 9425 str r4, [sp, #148] ; 0x94 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8007fe8: f7fe fcec bl 80069c4 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8007fec: 4622 mov r2, r4 8007fee: 4621 mov r1, r4 8007ff0: 2025 movs r0, #37 ; 0x25 8007ff2: f7fd fd2d bl 8005a50 HAL_NVIC_EnableIRQ(USART1_IRQn); 8007ff6: 2025 movs r0, #37 ; 0x25 8007ff8: f7fd fd5e bl 8005ab8 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8007ffc: 4622 mov r2, r4 8007ffe: 4621 mov r1, r4 8008000: 2036 movs r0, #54 ; 0x36 8008002: f7fd fd25 bl 8005a50 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8008006: 2036 movs r0, #54 ; 0x36 8008008: f7fd fd56 bl 8005ab8 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 800800c: 4622 mov r2, r4 800800e: 4621 mov r1, r4 8008010: 4650 mov r0, sl 8008012: f7fd fd1d bl 8005a50 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 8008016: 4650 mov r0, sl 8008018: f7fd fd4e bl 8005ab8 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 800801c: 4622 mov r2, r4 800801e: 4621 mov r1, r4 8008020: 4648 mov r0, r9 8008022: f7fd fd15 bl 8005a50 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 8008026: 4648 mov r0, r9 8008028: f7fd fd46 bl 8005ab8 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 800802c: 4622 mov r2, r4 800802e: 4621 mov r1, r4 8008030: 200f movs r0, #15 8008032: f7fd fd0d bl 8005a50 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 8008036: 200f movs r0, #15 8008038: f7fd fd3e bl 8005ab8 setbuf(stdout, NULL); 800803c: 4aaf ldr r2, [pc, #700] ; (80082fc ) 800803e: 4621 mov r1, r4 8008040: 6812 ldr r2, [r2, #0] ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092); 8008042: f8df 92f0 ldr.w r9, [pc, #752] ; 8008334 setbuf(stdout, NULL); 8008046: 6890 ldr r0, [r2, #8] 8008048: f001 fe6a bl 8009d20 HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1); 800804c: 9b06 ldr r3, [sp, #24] 800804e: 4632 mov r2, r6 8008050: 4618 mov r0, r3 8008052: 49ab ldr r1, [pc, #684] ; (8008300 ) 8008054: f7fe fe72 bl 8006d3c PE43711_PinInit(); 8008058: f7ff fa0c bl 8007474 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET); 800805c: 4632 mov r2, r6 800805e: 2180 movs r1, #128 ; 0x80 8008060: 48a8 ldr r0, [pc, #672] ; (8008304 ) 8008062: f7fe f805 bl 8006070 HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET); 8008066: 4632 mov r2, r6 8008068: f44f 7100 mov.w r1, #512 ; 0x200 800806c: 48a6 ldr r0, [pc, #664] ; (8008308 ) 800806e: f7fd ffff bl 8006070 HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET); 8008072: 4632 mov r2, r6 8008074: f44f 6180 mov.w r1, #1024 ; 0x400 8008078: 48a3 ldr r0, [pc, #652] ; (8008308 ) 800807a: f7fd fff9 bl 8006070 HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET); 800807e: 4632 mov r2, r6 8008080: f44f 6100 mov.w r1, #2048 ; 0x800 8008084: 48a0 ldr r0, [pc, #640] ; (8008308 ) 8008086: f7fd fff3 bl 8006070 HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET); 800808a: 4632 mov r2, r6 800808c: 2180 movs r1, #128 ; 0x80 800808e: 489d ldr r0, [pc, #628] ; (8008304 ) 8008090: f7fd ffee bl 8006070 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET); 8008094: 4632 mov r2, r6 8008096: f44f 5180 mov.w r1, #4096 ; 0x1000 800809a: 489c ldr r0, [pc, #624] ; (800830c ) 800809c: f7fd ffe8 bl 8006070 HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET); 80080a0: 4632 mov r2, r6 80080a2: f44f 6180 mov.w r1, #1024 ; 0x400 80080a6: 4899 ldr r0, [pc, #612] ; (800830c ) 80080a8: f7fd ffe2 bl 8006070 HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET); 80080ac: 4632 mov r2, r6 80080ae: 4631 mov r1, r6 80080b0: 4897 ldr r0, [pc, #604] ; (8008310 ) 80080b2: f7fd ffdd bl 8006070 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET); 80080b6: 4641 mov r1, r8 ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092); 80080b8: f44f 6882 mov.w r8, #1040 ; 0x410 HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET); 80080bc: 4632 mov r2, r6 80080be: 4894 ldr r0, [pc, #592] ; (8008310 ) 80080c0: f7fd ffd6 bl 8006070 HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET); 80080c4: 4632 mov r2, r6 80080c6: f44f 4180 mov.w r1, #16384 ; 0x4000 80080ca: 4890 ldr r0, [pc, #576] ; (800830c ) 80080cc: f7fd ffd0 bl 8006070 HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET); 80080d0: 4632 mov r2, r6 80080d2: f44f 4100 mov.w r1, #32768 ; 0x8000 80080d6: 488d ldr r0, [pc, #564] ; (800830c ) 80080d8: f7fd ffca bl 8006070 HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET); 80080dc: 4622 mov r2, r4 80080de: 2120 movs r1, #32 80080e0: 4889 ldr r0, [pc, #548] ; (8008308 ) 80080e2: f7fd ffc5 bl 8006070 HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET); 80080e6: 4622 mov r2, r4 80080e8: 2140 movs r1, #64 ; 0x40 80080ea: 4887 ldr r0, [pc, #540] ; (8008308 ) 80080ec: f7fd ffc0 bl 8006070 HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET); 80080f0: 4632 mov r2, r6 80080f2: 2180 movs r1, #128 ; 0x80 80080f4: 4884 ldr r0, [pc, #528] ; (8008308 ) 80080f6: f7fd ffbb bl 8006070 HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET); 80080fa: 4632 mov r2, r6 80080fc: f44f 7180 mov.w r1, #256 ; 0x100 8008100: 4881 ldr r0, [pc, #516] ; (8008308 ) 8008102: f7fd ffb5 bl 8006070 HAL_Delay(1); 8008106: 4630 mov r0, r6 8008108: f7fd f9e4 bl 80054d4 Path_Init(); 800810c: f7ff fc30 bl 8007970 ADF4153_Init(); 8008110: f7ff fbc6 bl 80078a0 SubmitDAC(0x800C); 8008114: f248 000c movw r0, #32780 ; 0x800c 8008118: f7fe ffa6 bl 8007068 SubmitDAC(0xA000); 800811c: f44f 4020 mov.w r0, #40960 ; 0xa000 8008120: f7fe ffa2 bl 8007068 SubmitDAC(0x0FFF); 8008124: f640 70ff movw r0, #4095 ; 0xfff 8008128: f7fe ff9e bl 8007068 SubmitDAC(0x13FF); 800812c: f241 30ff movw r0, #5119 ; 0x13ff 8008130: f7fe ff9a bl 8007068 SubmitDAC(0x23FF); 8008134: f242 30ff movw r0, #9215 ; 0x23ff 8008138: f7fe ff96 bl 8007068 SubmitDAC(0x35FF); 800813c: f243 50ff movw r0, #13823 ; 0x35ff 8008140: f7fe ff92 bl 8007068 SubmitDAC(0x46FF); 8008144: f244 60ff movw r0, #18175 ; 0x46ff 8008148: f7fe ff8e bl 8007068 SubmitDAC(0x57FF); 800814c: f245 70ff movw r0, #22527 ; 0x57ff 8008150: f7fe ff8a bl 8007068 SubmitDAC(0x68FF); 8008154: f646 00ff movw r0, #26879 ; 0x68ff 8008158: f7fe ff86 bl 8007068 PLL_Setting_st Pll_test3 = { 800815c: 4c6d ldr r4, [pc, #436] ; (8008314 ) SubmitDAC(0x79FF); 800815e: f647 10ff movw r0, #31231 ; 0x79ff 8008162: f7fe ff81 bl 8007068 PLL_Setting_st Pll_test3 = { 8008166: cc0f ldmia r4!, {r0, r1, r2, r3} 8008168: f10d 0e48 add.w lr, sp, #72 ; 0x48 800816c: e8ae 000f stmia.w lr!, {r0, r1, r2, r3} 8008170: e894 0003 ldmia.w r4, {r0, r1} ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092); 8008174: 4b68 ldr r3, [pc, #416] ; (8008318 ) PLL_Setting_st Pll_test3 = { 8008176: e88e 0003 stmia.w lr, {r0, r1} ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092); 800817a: 9303 str r3, [sp, #12] 800817c: f8cd 8008 str.w r8, [sp, #8] 8008180: f8cd 9010 str.w r9, [sp, #16] 8008184: ab16 add r3, sp, #88 ; 0x58 8008186: e893 0003 ldmia.w r3, {r0, r1} 800818a: e88d 0003 stmia.w sp, {r0, r1} 800818e: ab12 add r3, sp, #72 ; 0x48 8008190: cb0f ldmia r3, {r0, r1, r2, r3} 8008192: f000 f94b bl 800842c HAL_Delay(1); 8008196: 4630 mov r0, r6 8008198: f7fd f99c bl 80054d4 PLL_Setting_st Pll_test4 = { 800819c: f104 0c08 add.w ip, r4, #8 80081a0: f10d 0e60 add.w lr, sp, #96 ; 0x60 80081a4: e8bc 000f ldmia.w ip!, {r0, r1, r2, r3} 80081a8: e8ae 000f stmia.w lr!, {r0, r1, r2, r3} 80081ac: e89c 0003 ldmia.w ip, {r0, r1} ADF4113_Module_Ctrl(Pll_test4,0x410,0x4DE71,0x9F8092); 80081b0: 4b5a ldr r3, [pc, #360] ; (800831c ) PLL_Setting_st Pll_test4 = { 80081b2: e88e 0003 stmia.w lr, {r0, r1} ADF4113_Module_Ctrl(Pll_test4,0x410,0x4DE71,0x9F8092); 80081b6: 9303 str r3, [sp, #12] 80081b8: f8cd 8008 str.w r8, [sp, #8] 80081bc: f8cd 9010 str.w r9, [sp, #16] 80081c0: ab1c add r3, sp, #112 ; 0x70 80081c2: e893 0003 ldmia.w r3, {r0, r1} 80081c6: e88d 0003 stmia.w sp, {r0, r1} 80081ca: ab18 add r3, sp, #96 ; 0x60 80081cc: cb0f ldmia r3, {r0, r1, r2, r3} 80081ce: f000 f92d bl 800842c HAL_Delay(1); 80081d2: 4630 mov r0, r6 80081d4: f7fd f97e bl 80054d4 PLL_Setting_st Pll_test5 = { 80081d8: f104 0c20 add.w ip, r4, #32 80081dc: f10d 0e78 add.w lr, sp, #120 ; 0x78 80081e0: e8bc 000f ldmia.w ip!, {r0, r1, r2, r3} 80081e4: e8ae 000f stmia.w lr!, {r0, r1, r2, r3} 80081e8: e89c 0003 ldmia.w ip, {r0, r1} ADF4113_Module_Ctrl(Pll_test5,0x000410,0x038D31,0x9f8092); 80081ec: 4b4c ldr r3, [pc, #304] ; (8008320 ) PLL_Setting_st Pll_test5 = { 80081ee: e88e 0003 stmia.w lr, {r0, r1} ADF4113_Module_Ctrl(Pll_test5,0x000410,0x038D31,0x9f8092); 80081f2: 9303 str r3, [sp, #12] 80081f4: f8cd 8008 str.w r8, [sp, #8] 80081f8: f8cd 9010 str.w r9, [sp, #16] 80081fc: ab22 add r3, sp, #136 ; 0x88 80081fe: e893 0003 ldmia.w r3, {r0, r1} 8008202: e88d 0003 stmia.w sp, {r0, r1} 8008206: ab1e add r3, sp, #120 ; 0x78 8008208: cb0f ldmia r3, {r0, r1, r2, r3} 800820a: f000 f90f bl 800842c HAL_Delay(1); 800820e: 4630 mov r0, r6 PLL_Setting_st Pll_test6 = { 8008210: 462e mov r6, r5 8008212: 3438 adds r4, #56 ; 0x38 HAL_Delay(1); 8008214: f7fd f95e bl 80054d4 PLL_Setting_st Pll_test6 = { 8008218: cc0f ldmia r4!, {r0, r1, r2, r3} 800821a: c60f stmia r6!, {r0, r1, r2, r3} 800821c: e894 0003 ldmia.w r4, {r0, r1} ADF4113_Module_Ctrl(Pll_test6,0x000410,0x03E801,0x9F8092); 8008220: 4b40 ldr r3, [pc, #256] ; (8008324 ) PLL_Setting_st Pll_test6 = { 8008222: e886 0003 stmia.w r6, {r0, r1} ADF4113_Module_Ctrl(Pll_test6,0x000410,0x03E801,0x9F8092); 8008226: 9303 str r3, [sp, #12] 8008228: f8cd 8008 str.w r8, [sp, #8] 800822c: f8cd 9010 str.w r9, [sp, #16] 8008230: ab2a add r3, sp, #168 ; 0xa8 8008232: e913 0003 ldmdb r3, {r0, r1} 8008236: e88d 0003 stmia.w sp, {r0, r1} 800823a: e895 000f ldmia.w r5, {r0, r1, r2, r3} 800823e: f000 f8f5 bl 800842c temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008242: a527 add r5, pc, #156 ; (adr r5, 80082e0 ) 8008244: e9d5 4500 ldrd r4, r5, [r5] BDA4601_Test(); 8008248: f7fe ffba bl 80071c0 HAL_ADCEx_Calibration_Start(&hadc1); 800824c: 4638 mov r0, r7 temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 800824e: a726 add r7, pc, #152 ; (adr r7, 80082e8 ) 8008250: e9d7 6700 ldrd r6, r7, [r7] HAL_ADCEx_Calibration_Start(&hadc1); 8008254: f7fd fb82 bl 800595c if(HAL_GPIO_ReadPin(PLL_LD_3_5G_H_GPIO_Port, PLL_LD_3_5G_H_Pin) == GPIO_PIN_RESET){ 8008258: f8df 80b0 ldr.w r8, [pc, #176] ; 800830c 800825c: f44f 7100 mov.w r1, #512 ; 0x200 8008260: 4640 mov r0, r8 8008262: f7fd feff bl 8006064 8008266: bb18 cbnz r0, 80082b0 temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008268: f241 3388 movw r3, #5000 ; 0x1388 800826c: 9303 str r3, [sp, #12] 800826e: 2302 movs r3, #2 8008270: 9302 str r3, [sp, #8] 8008272: 2300 movs r3, #0 8008274: 4a2c ldr r2, [pc, #176] ; (8008328 ) 8008276: a810 add r0, sp, #64 ; 0x40 8008278: e9cd 2300 strd r2, r3, [sp] 800827c: 4622 mov r2, r4 800827e: 462b mov r3, r5 8008280: f7ff f9aa bl 80075d8 ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008284: 2203 movs r2, #3 8008286: 9205 str r2, [sp, #20] 8008288: f241 32c2 movw r2, #5058 ; 0x13c2 800828c: 9204 str r2, [sp, #16] 800828e: 9a10 ldr r2, [sp, #64] ; 0x40 8008290: 4b26 ldr r3, [pc, #152] ; (800832c ) 8008292: 9203 str r2, [sp, #12] 8008294: 9a11 ldr r2, [sp, #68] ; 0x44 8008296: 9202 str r2, [sp, #8] 8008298: f103 0210 add.w r2, r3, #16 800829c: e892 0003 ldmia.w r2, {r0, r1} 80082a0: e88d 0003 stmia.w sp, {r0, r1} 80082a4: cb0f ldmia r3, {r0, r1, r2, r3} 80082a6: f7ff fa05 bl 80076b4 HAL_Delay(1); 80082aa: 2001 movs r0, #1 80082ac: f7fd f912 bl 80054d4 if(HAL_GPIO_ReadPin(PLL_LD_3_5G_L_GPIO_Port, PLL_LD_3_5G_L_Pin) == GPIO_PIN_RESET){ 80082b0: f44f 7180 mov.w r1, #256 ; 0x100 80082b4: 4640 mov r0, r8 80082b6: f7fd fed5 bl 8006064 80082ba: 2800 cmp r0, #0 80082bc: d152 bne.n 8008364 temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 80082be: f241 3388 movw r3, #5000 ; 0x1388 80082c2: 9303 str r3, [sp, #12] 80082c4: 2302 movs r3, #2 80082c6: 9302 str r3, [sp, #8] 80082c8: 2300 movs r3, #0 80082ca: 4a17 ldr r2, [pc, #92] ; (8008328 ) 80082cc: a810 add r0, sp, #64 ; 0x40 80082ce: e9cd 2300 strd r2, r3, [sp] 80082d2: 4632 mov r2, r6 80082d4: 463b mov r3, r7 80082d6: f7ff f97f bl 80075d8 80082da: e02d b.n 8008338 80082dc: f3af 8000 nop.w 80082e0: ea83b4a0 .word 0xea83b4a0 80082e4: 00000000 .word 0x00000000 80082e8: ce8f5560 .word 0xce8f5560 80082ec: 00000000 .word 0x00000000 80082f0: 2000061c .word 0x2000061c 80082f4: 40013800 .word 0x40013800 80082f8: 40001000 .word 0x40001000 80082fc: 20000234 .word 0x20000234 8008300: 20000aec .word 0x20000aec 8008304: 40011400 .word 0x40011400 8008308: 40012000 .word 0x40012000 800830c: 40011000 .word 0x40011000 8008310: 40011800 .word 0x40011800 8008314: 0800bc90 .word 0x0800bc90 8008318: 00059a31 .word 0x00059a31 800831c: 0004de71 .word 0x0004de71 8008320: 00038d31 .word 0x00038d31 8008324: 0003e801 .word 0x0003e801 8008328: 02625a00 .word 0x02625a00 800832c: 20000204 .word 0x20000204 8008330: 200006a0 .word 0x200006a0 8008334: 009f8092 .word 0x009f8092 ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008338: 2203 movs r2, #3 800833a: 9205 str r2, [sp, #20] 800833c: f241 32c2 movw r2, #5058 ; 0x13c2 8008340: 9204 str r2, [sp, #16] 8008342: 9a10 ldr r2, [sp, #64] ; 0x40 8008344: 4b2a ldr r3, [pc, #168] ; (80083f0 ) 8008346: 9203 str r2, [sp, #12] 8008348: 9a11 ldr r2, [sp, #68] ; 0x44 800834a: 9202 str r2, [sp, #8] 800834c: f103 0210 add.w r2, r3, #16 8008350: e892 0003 ldmia.w r2, {r0, r1} 8008354: e88d 0003 stmia.w sp, {r0, r1} 8008358: cb0f ldmia r3, {r0, r1, r2, r3} 800835a: f7ff f9ab bl 80076b4 HAL_Delay(1); 800835e: 2001 movs r0, #1 8008360: f7fd f8b8 bl 80054d4 if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;} 8008364: f8df 9098 ldr.w r9, [pc, #152] ; 8008400 8008368: f8d9 3000 ldr.w r3, [r9] 800836c: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 8008370: d907 bls.n 8008382 8008372: f44f 4180 mov.w r1, #16384 ; 0x4000 8008376: 481f ldr r0, [pc, #124] ; (80083f4 ) 8008378: f7fd fe7f bl 800607a 800837c: 2300 movs r3, #0 800837e: f8c9 3000 str.w r3, [r9] while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal); 8008382: f8df a080 ldr.w sl, [pc, #128] ; 8008404 8008386: f8df 9080 ldr.w r9, [pc, #128] ; 8008408 800838a: f8df b080 ldr.w fp, [pc, #128] ; 800840c 800838e: f8da 3008 ldr.w r3, [sl, #8] 8008392: 2b00 cmp r3, #0 8008394: dd03 ble.n 800839e 8008396: f8d9 3000 ldr.w r3, [r9] 800839a: 2b64 cmp r3, #100 ; 0x64 800839c: d824 bhi.n 80083e8 if(AdcTimerCnt > 5000){ 800839e: f241 3388 movw r3, #5000 ; 0x1388 80083a2: f8df 906c ldr.w r9, [pc, #108] ; 8008410 80083a6: f8d9 2000 ldr.w r2, [r9] 80083aa: 429a cmp r2, r3 80083ac: f67f af56 bls.w 800825c HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14); 80083b0: 220e movs r2, #14 80083b2: 4911 ldr r1, [pc, #68] ; (80083f8 ) 80083b4: 4811 ldr r0, [pc, #68] ; (80083fc ) 80083b6: f7fd f997 bl 80056e8 80083ba: 2300 movs r3, #0 Prev_data[INDEX_DET_1_8G_DL_IN_H + i] = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8); 80083bc: f8df c038 ldr.w ip, [pc, #56] ; 80083f8 80083c0: f8df e050 ldr.w lr, [pc, #80] ; 8008414 80083c4: f85c 1023 ldr.w r1, [ip, r3, lsl #2] 80083c8: eb03 020e add.w r2, r3, lr 80083cc: 3302 adds r3, #2 80083ce: 0a08 lsrs r0, r1, #8 for(uint8_t i = 0; i< ADC_EA; i += 2 ){ 80083d0: 2b0e cmp r3, #14 Prev_data[INDEX_DET_1_8G_DL_IN_H + i] = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8); 80083d2: f882 0022 strb.w r0, [r2, #34] ; 0x22 Prev_data[INDEX_DET_1_8G_DL_IN_L + i] = (uint16_t)(ADCvalue[i] & 0x00FF); 80083d6: f882 1023 strb.w r1, [r2, #35] ; 0x23 for(uint8_t i = 0; i< ADC_EA; i += 2 ){ 80083da: d1f3 bne.n 80083c4 RF_Status_Get(); 80083dc: f000 fad0 bl 8008980 AdcTimerCnt = 0; 80083e0: 2300 movs r3, #0 80083e2: f8c9 3000 str.w r3, [r9] 80083e6: e739 b.n 800825c while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal); 80083e8: 4658 mov r0, fp 80083ea: f000 fa61 bl 80088b0 80083ee: e7ce b.n 800838e 80083f0: 2000021c .word 0x2000021c 80083f4: 40012000 .word 0x40012000 80083f8: 2000052c .word 0x2000052c 80083fc: 200005a8 .word 0x200005a8 8008400: 20000424 .word 0x20000424 8008404: 20000ae0 .word 0x20000ae0 8008408: 20000428 .word 0x20000428 800840c: 2000061c .word 0x2000061c 8008410: 20000420 .word 0x20000420 8008414: 200004cc .word 0x200004cc 08008418 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8008418: 4770 bx lr ... 0800841c : { uint32_t R, B; uint32_t A, P, p_mode; uint32_t N_val = 0; N_val = (rf_Freq / ADF4113_CH_STEP); if( N_val < ADF4113_PRE8_MIN_N) { 800841c: 4b02 ldr r3, [pc, #8] ; (8008428 ) 800841e: 4298 cmp r0, r3 8008420: d801 bhi.n 8008426 return HAL_SYN_INVALID_PRESCALE; 8008422: 2004 movs r0, #4 8008424: 4770 bx lr A = N_val -(B * P); #ifdef DEBUG_PRINT printf("FREQ:%f Mhz B : %d , A : %d N_VAL : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val); printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0)); #endif /* DEBUG_PRINT */ } 8008426: 4770 bx lr 8008428: 002ab97f .word 0x002ab97f 0800842c : #ifdef DEBUG_PRINT printf("\r\nLINE : %d ret : %x\r\n",__LINE__,ret); #endif /* DEBUG_PRINT */ return ret; } void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){ 800842c: b084 sub sp, #16 800842e: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008432: ac0c add r4, sp, #48 ; 0x30 8008434: e884 000f stmia.w r4, {r0, r1, r2, r3} R2 = R2 & 0xFFFFFF; R1 = R1 & 0xFFFFFF; 8008438: 9b13 ldr r3, [sp, #76] ; 0x4c 800843a: f8bd 7034 ldrh.w r7, [sp, #52] ; 0x34 800843e: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008442: 9301 str r3, [sp, #4] R0 = R0 & 0xFFFFFF; 8008444: 9b12 ldr r3, [sp, #72] ; 0x48 8008446: f8dd 8038 ldr.w r8, [sp, #56] ; 0x38 800844a: f8bd 903c ldrh.w r9, [sp, #60] ; 0x3c 800844e: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008452: 9d10 ldr r5, [sp, #64] ; 0x40 8008454: f8bd 6044 ldrh.w r6, [sp, #68] ; 0x44 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008458: 2200 movs r2, #0 800845a: 4639 mov r1, r7 R0 = R0 & 0xFFFFFF; 800845c: 9300 str r3, [sp, #0] 800845e: 4682 mov sl, r0 R2 = R2 & 0xFFFFFF; 8008460: 9c14 ldr r4, [sp, #80] ; 0x50 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 8008462: f7fd fe05 bl 8006070 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008466: 2200 movs r2, #0 8008468: 4649 mov r1, r9 800846a: 4640 mov r0, r8 800846c: f7fd fe00 bl 8006070 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008470: 2200 movs r2, #0 8008472: 4631 mov r1, r6 8008474: 4628 mov r0, r5 8008476: f7fd fdfb bl 8006070 800847a: f04f 0b18 mov.w fp, #24 R2 = R2 & 0xFFFFFF; 800847e: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 /* R2 Ctrl */ for(int i =0; i < 24; i++){ if(R2 & 0x800000){ 8008482: f414 0200 ands.w r2, r4, #8388608 ; 0x800000 #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008486: bf18 it ne 8008488: 2201 movne r2, #1 } else{ #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800848a: 4649 mov r1, r9 800848c: 4640 mov r0, r8 800848e: f7fd fdef bl 8006070 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 8008492: 2201 movs r2, #1 8008494: 4639 mov r1, r7 8008496: 4650 mov r0, sl 8008498: f7fd fdea bl 8006070 Pol_Delay_us(10); 800849c: 200a movs r0, #10 800849e: f7ff fb91 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80084a2: 2200 movs r2, #0 80084a4: 4639 mov r1, r7 80084a6: 4650 mov r0, sl 80084a8: f7fd fde2 bl 8006070 R2 = ((R2 << 1) & 0xFFFFFF); 80084ac: 0064 lsls r4, r4, #1 for(int i =0; i < 24; i++){ 80084ae: f1bb 0b01 subs.w fp, fp, #1 R2 = ((R2 << 1) & 0xFFFFFF); 80084b2: f024 447f bic.w r4, r4, #4278190080 ; 0xff000000 for(int i =0; i < 24; i++){ 80084b6: d1e4 bne.n 8008482 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 80084b8: 2201 movs r2, #1 80084ba: 4631 mov r1, r6 80084bc: 4628 mov r0, r5 80084be: f7fd fdd7 bl 8006070 Pol_Delay_us(10); 80084c2: 200a movs r0, #10 80084c4: f7ff fb7e bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 80084c8: 465a mov r2, fp 80084ca: 4631 mov r1, r6 80084cc: 4628 mov r0, r5 80084ce: f7fd fdcf bl 8006070 80084d2: 2418 movs r4, #24 /* R0 Ctrl */ for(int i =0; i < 24; i++){ if(R0 & 0x800000){ 80084d4: 9b00 ldr r3, [sp, #0] #ifdef DEBUG_PRINT printf("1"); #endif /* DEBUG_PRINT */ } else{ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80084d6: 4649 mov r1, r9 if(R0 & 0x800000){ 80084d8: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 80084dc: bf18 it ne 80084de: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 80084e0: 4640 mov r0, r8 80084e2: f7fd fdc5 bl 8006070 #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 80084e6: 2201 movs r2, #1 80084e8: 4639 mov r1, r7 80084ea: 4650 mov r0, sl 80084ec: f7fd fdc0 bl 8006070 Pol_Delay_us(10); 80084f0: 200a movs r0, #10 80084f2: f7ff fb67 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 80084f6: 2200 movs r2, #0 80084f8: 4639 mov r1, r7 80084fa: 4650 mov r0, sl 80084fc: f7fd fdb8 bl 8006070 R0 = ((R0 << 1) & 0xFFFFFF); 8008500: 9b00 ldr r3, [sp, #0] for(int i =0; i < 24; i++){ 8008502: 3c01 subs r4, #1 R0 = ((R0 << 1) & 0xFFFFFF); 8008504: ea4f 0343 mov.w r3, r3, lsl #1 8008508: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 800850c: 9300 str r3, [sp, #0] for(int i =0; i < 24; i++){ 800850e: d1e1 bne.n 80084d4 } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008510: 2201 movs r2, #1 8008512: 4631 mov r1, r6 8008514: 4628 mov r0, r5 8008516: f7fd fdab bl 8006070 Pol_Delay_us(10); 800851a: 200a movs r0, #10 800851c: f7ff fb52 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008520: 4622 mov r2, r4 8008522: 4631 mov r1, r6 8008524: 4628 mov r0, r5 8008526: f7fd fda3 bl 8006070 800852a: 2418 movs r4, #24 /* R1 Ctrl */ for(int i =0; i < 24; i++){ if(R1 & 0x800000){ 800852c: 9b01 ldr r3, [sp, #4] } else{ #ifdef DEBUG_PRINT printf("0"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 800852e: 4649 mov r1, r9 if(R1 & 0x800000){ 8008530: f413 0200 ands.w r2, r3, #8388608 ; 0x800000 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET); 8008534: bf18 it ne 8008536: 2201 movne r2, #1 HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET); 8008538: 4640 mov r0, r8 800853a: f7fd fd99 bl 8006070 } HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET); 800853e: 2201 movs r2, #1 8008540: 4639 mov r1, r7 8008542: 4650 mov r0, sl 8008544: f7fd fd94 bl 8006070 Pol_Delay_us(10); 8008548: 200a movs r0, #10 800854a: f7ff fb3b bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET); 800854e: 2200 movs r2, #0 8008550: 4639 mov r1, r7 8008552: 4650 mov r0, sl 8008554: f7fd fd8c bl 8006070 R1 = ((R1 << 1) & 0xFFFFFF); 8008558: 9b01 ldr r3, [sp, #4] for(int i =0; i < 24; i++){ 800855a: 3c01 subs r4, #1 R1 = ((R1 << 1) & 0xFFFFFF); 800855c: ea4f 0343 mov.w r3, r3, lsl #1 8008560: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000 8008564: 9301 str r3, [sp, #4] for(int i =0; i < 24; i++){ 8008566: d1e1 bne.n 800852c } #ifdef DEBUG_PRINT printf("\r\n"); #endif /* DEBUG_PRINT */ HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET); 8008568: 4631 mov r1, r6 800856a: 2201 movs r2, #1 800856c: 4628 mov r0, r5 800856e: f7fd fd7f bl 8006070 Pol_Delay_us(10); 8008572: 200a movs r0, #10 8008574: f7ff fb26 bl 8007bc4 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008578: 4622 mov r2, r4 800857a: 4631 mov r1, r6 800857c: 4628 mov r0, r5 } 800857e: b003 add sp, #12 8008580: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008584: b004 add sp, #16 HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET); 8008586: f7fd bd73 b.w 8006070 ... 0800858c : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800858c: 4b0e ldr r3, [pc, #56] ; (80085c8 ) { 800858e: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8008590: 699a ldr r2, [r3, #24] 8008592: f042 0201 orr.w r2, r2, #1 8008596: 619a str r2, [r3, #24] 8008598: 699a ldr r2, [r3, #24] 800859a: f002 0201 and.w r2, r2, #1 800859e: 9200 str r2, [sp, #0] 80085a0: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 80085a2: 69da ldr r2, [r3, #28] 80085a4: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 80085a8: 61da str r2, [r3, #28] 80085aa: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80085ac: 4a07 ldr r2, [pc, #28] ; (80085cc ) __HAL_RCC_PWR_CLK_ENABLE(); 80085ae: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80085b2: 9301 str r3, [sp, #4] 80085b4: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80085b6: 6853 ldr r3, [r2, #4] 80085b8: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80085bc: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 80085c0: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80085c2: b002 add sp, #8 80085c4: 4770 bx lr 80085c6: bf00 nop 80085c8: 40021000 .word 0x40021000 80085cc: 40010000 .word 0x40010000 080085d0 : * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80085d0: 2210 movs r2, #16 { 80085d2: b530 push {r4, r5, lr} 80085d4: 4605 mov r5, r0 80085d6: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80085d8: eb0d 0002 add.w r0, sp, r2 80085dc: 2100 movs r1, #0 80085de: f000 feba bl 8009356 if(hadc->Instance==ADC1) 80085e2: 682a ldr r2, [r5, #0] 80085e4: 4b2b ldr r3, [pc, #172] ; (8008694 ) 80085e6: 429a cmp r2, r3 80085e8: d152 bne.n 8008690 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 80085ea: f503 436c add.w r3, r3, #60416 ; 0xec00 80085ee: 699a ldr r2, [r3, #24] PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 PB1 ------> ADC1_IN9 */ GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80085f0: 2403 movs r4, #3 __HAL_RCC_ADC1_CLK_ENABLE(); 80085f2: f442 7200 orr.w r2, r2, #512 ; 0x200 80085f6: 619a str r2, [r3, #24] 80085f8: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80085fa: a904 add r1, sp, #16 __HAL_RCC_ADC1_CLK_ENABLE(); 80085fc: f402 7200 and.w r2, r2, #512 ; 0x200 8008600: 9200 str r2, [sp, #0] 8008602: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); 8008604: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008606: 4824 ldr r0, [pc, #144] ; (8008698 ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8008608: f042 0210 orr.w r2, r2, #16 800860c: 619a str r2, [r3, #24] 800860e: 699a ldr r2, [r3, #24] 8008610: f002 0210 and.w r2, r2, #16 8008614: 9201 str r2, [sp, #4] 8008616: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008618: 699a ldr r2, [r3, #24] 800861a: f042 0204 orr.w r2, r2, #4 800861e: 619a str r2, [r3, #24] 8008620: 699a ldr r2, [r3, #24] 8008622: f002 0204 and.w r2, r2, #4 8008626: 9202 str r2, [sp, #8] 8008628: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 800862a: 699a ldr r2, [r3, #24] 800862c: f042 0208 orr.w r2, r2, #8 8008630: 619a str r2, [r3, #24] 8008632: 699b ldr r3, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8008634: 9405 str r4, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 8008636: f003 0308 and.w r3, r3, #8 800863a: 9303 str r3, [sp, #12] 800863c: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin; 800863e: 230f movs r3, #15 8008640: 9304 str r3, [sp, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8008642: f7fd fc23 bl 8005e8c GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 8008646: 23ff movs r3, #255 ; 0xff |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008648: a904 add r1, sp, #16 800864a: 4814 ldr r0, [pc, #80] ; (800869c ) GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 800864c: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800864e: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008650: f7fd fc1c bl 8005e8c GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8008654: 4812 ldr r0, [pc, #72] ; (80086a0 ) 8008656: a904 add r1, sp, #16 GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin; 8008658: 9404 str r4, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800865a: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800865c: f7fd fc16 bl 8005e8c /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8008660: 2280 movs r2, #128 ; 0x80 hdma_adc1.Instance = DMA1_Channel1; 8008662: 4c10 ldr r4, [pc, #64] ; (80086a4 ) 8008664: 4b10 ldr r3, [pc, #64] ; (80086a8 ) hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8008666: 60e2 str r2, [r4, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 8008668: f44f 7200 mov.w r2, #512 ; 0x200 hdma_adc1.Instance = DMA1_Channel1; 800866c: 6023 str r3, [r4, #0] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 800866e: 6122 str r2, [r4, #16] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008670: 2300 movs r3, #0 hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 8008672: f44f 6200 mov.w r2, #2048 ; 0x800 hdma_adc1.Init.Mode = DMA_NORMAL; hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8008676: 4620 mov r0, r4 hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008678: 6063 str r3, [r4, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 800867a: 60a3 str r3, [r4, #8] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 800867c: 6162 str r2, [r4, #20] hdma_adc1.Init.Mode = DMA_NORMAL; 800867e: 61a3 str r3, [r4, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8008680: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8008682: f7fd fa3b bl 8005afc 8008686: b108 cbz r0, 800868c { Error_Handler(); 8008688: f7ff fec6 bl 8008418 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 800868c: 622c str r4, [r5, #32] 800868e: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 8008690: b009 add sp, #36 ; 0x24 8008692: bd30 pop {r4, r5, pc} 8008694: 40012400 .word 0x40012400 8008698: 40011000 .word 0x40011000 800869c: 40010800 .word 0x40010800 80086a0: 40010c00 .word 0x40010c00 80086a4: 2000065c .word 0x2000065c 80086a8: 40020008 .word 0x40020008 080086ac : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 80086ac: 6802 ldr r2, [r0, #0] 80086ae: 4b08 ldr r3, [pc, #32] ; (80086d0 ) { 80086b0: b082 sub sp, #8 if(htim_base->Instance==TIM6) 80086b2: 429a cmp r2, r3 80086b4: d10a bne.n 80086cc { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80086b6: f503 3300 add.w r3, r3, #131072 ; 0x20000 80086ba: 69da ldr r2, [r3, #28] 80086bc: f042 0210 orr.w r2, r2, #16 80086c0: 61da str r2, [r3, #28] 80086c2: 69db ldr r3, [r3, #28] 80086c4: f003 0310 and.w r3, r3, #16 80086c8: 9301 str r3, [sp, #4] 80086ca: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 80086cc: b002 add sp, #8 80086ce: 4770 bx lr 80086d0: 40001000 .word 0x40001000 080086d4 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 80086d4: b570 push {r4, r5, r6, lr} 80086d6: 4606 mov r6, r0 80086d8: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80086da: 2210 movs r2, #16 80086dc: 2100 movs r1, #0 80086de: a802 add r0, sp, #8 80086e0: f000 fe39 bl 8009356 if(huart->Instance==USART1) 80086e4: 6832 ldr r2, [r6, #0] 80086e6: 4b2b ldr r3, [pc, #172] ; (8008794 ) 80086e8: 429a cmp r2, r3 80086ea: d151 bne.n 8008790 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 80086ec: f503 4358 add.w r3, r3, #55296 ; 0xd800 80086f0: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80086f2: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 80086f4: f442 4280 orr.w r2, r2, #16384 ; 0x4000 80086f8: 619a str r2, [r3, #24] 80086fa: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80086fc: 4826 ldr r0, [pc, #152] ; (8008798 ) __HAL_RCC_USART1_CLK_ENABLE(); 80086fe: f402 4280 and.w r2, r2, #16384 ; 0x4000 8008702: 9200 str r2, [sp, #0] 8008704: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8008706: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008708: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 800870a: f042 0204 orr.w r2, r2, #4 800870e: 619a str r2, [r3, #24] 8008710: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 8008712: 4c22 ldr r4, [pc, #136] ; (800879c ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8008714: f003 0304 and.w r3, r3, #4 8008718: 9301 str r3, [sp, #4] 800871a: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 800871c: f44f 7300 mov.w r3, #512 ; 0x200 8008720: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8008722: 2302 movs r3, #2 8008724: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8008726: 2303 movs r3, #3 8008728: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800872a: f7fd fbaf bl 8005e8c GPIO_InitStruct.Pin = GPIO_PIN_10; 800872e: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008732: 4819 ldr r0, [pc, #100] ; (8008798 ) 8008734: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8008736: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8008738: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 800873a: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800873c: f7fd fba6 bl 8005e8c hdma_usart1_rx.Instance = DMA1_Channel5; 8008740: 4b17 ldr r3, [pc, #92] ; (80087a0 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8008742: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8008744: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8008748: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 800874a: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 800874c: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800874e: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8008750: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 8008752: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 8008754: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8008756: f7fd f9d1 bl 8005afc 800875a: b108 cbz r0, 8008760 { Error_Handler(); 800875c: f7ff fe5c bl 8008418 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8008760: f04f 0c10 mov.w ip, #16 8008764: 4b0f ldr r3, [pc, #60] ; (80087a4 ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 8008766: 6374 str r4, [r6, #52] ; 0x34 8008768: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 800876a: 4c0f ldr r4, [pc, #60] ; (80087a8 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 800876c: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 800876e: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8008772: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8008774: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8008776: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 8008778: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 800877a: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 800877c: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 800877e: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 8008780: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 8008782: f7fd f9bb bl 8005afc 8008786: b108 cbz r0, 800878c { Error_Handler(); 8008788: f7ff fe46 bl 8008418 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 800878c: 6334 str r4, [r6, #48] ; 0x30 800878e: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8008790: b006 add sp, #24 8008792: bd70 pop {r4, r5, r6, pc} 8008794: 40013800 .word 0x40013800 8008798: 40010800 .word 0x40010800 800879c: 200005d8 .word 0x200005d8 80087a0: 40020058 .word 0x40020058 80087a4: 40020044 .word 0x40020044 80087a8: 20000564 .word 0x20000564 080087ac : 80087ac: 4770 bx lr 080087ae : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80087ae: e7fe b.n 80087ae 080087b0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80087b0: e7fe b.n 80087b0 080087b2 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80087b2: e7fe b.n 80087b2 080087b4 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80087b4: e7fe b.n 80087b4 080087b6 : 80087b6: 4770 bx lr 080087b8 : 80087b8: 4770 bx lr 080087ba : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80087ba: 4770 bx lr 080087bc : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80087bc: f7fc be78 b.w 80054b0 080087c0 : void DMA1_Channel1_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 80087c0: 4801 ldr r0, [pc, #4] ; (80087c8 ) 80087c2: f7fd ba87 b.w 8005cd4 80087c6: bf00 nop 80087c8: 2000065c .word 0x2000065c 080087cc : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 80087cc: 4801 ldr r0, [pc, #4] ; (80087d4 ) 80087ce: f7fd ba81 b.w 8005cd4 80087d2: bf00 nop 80087d4: 20000564 .word 0x20000564 080087d8 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 80087d8: 4801 ldr r0, [pc, #4] ; (80087e0 ) 80087da: f7fd ba7b b.w 8005cd4 80087de: bf00 nop 80087e0: 200005d8 .word 0x200005d8 080087e4 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 80087e4: 4801 ldr r0, [pc, #4] ; (80087ec ) 80087e6: f7fe bb97 b.w 8006f18 80087ea: bf00 nop 80087ec: 2000061c .word 0x2000061c 080087f0 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 80087f0: 4801 ldr r0, [pc, #4] ; (80087f8 ) 80087f2: f7fd bfdf b.w 80067b4 80087f6: bf00 nop 80087f8: 200006a0 .word 0x200006a0 080087fc <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 80087fc: b570 push {r4, r5, r6, lr} 80087fe: 460e mov r6, r1 8008800: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8008802: 460c mov r4, r1 8008804: 1ba3 subs r3, r4, r6 8008806: 429d cmp r5, r3 8008808: dc01 bgt.n 800880e <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 800880a: 4628 mov r0, r5 800880c: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 800880e: f3af 8000 nop.w 8008812: f804 0b01 strb.w r0, [r4], #1 8008816: e7f5 b.n 8008804 <_read+0x8> 08008818 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8008818: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 800881a: 4b0a ldr r3, [pc, #40] ; (8008844 <_sbrk+0x2c>) { 800881c: 4602 mov r2, r0 if (heap_end == 0) 800881e: 6819 ldr r1, [r3, #0] 8008820: b909 cbnz r1, 8008826 <_sbrk+0xe> heap_end = &end; 8008822: 4909 ldr r1, [pc, #36] ; (8008848 <_sbrk+0x30>) 8008824: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8008826: 4669 mov r1, sp prev_heap_end = heap_end; 8008828: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 800882a: 4402 add r2, r0 800882c: 428a cmp r2, r1 800882e: d906 bls.n 800883e <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8008830: f000 fd5c bl 80092ec <__errno> 8008834: 230c movs r3, #12 8008836: 6003 str r3, [r0, #0] return (caddr_t) -1; 8008838: f04f 30ff mov.w r0, #4294967295 800883c: bd08 pop {r3, pc} } heap_end += incr; 800883e: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8008840: bd08 pop {r3, pc} 8008842: bf00 nop 8008844: 2000042c .word 0x2000042c 8008848: 20001700 .word 0x20001700 0800884c <_close>: int _close(int file) { return -1; } 800884c: f04f 30ff mov.w r0, #4294967295 8008850: 4770 bx lr 08008852 <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 8008852: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 8008856: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8008858: 604b str r3, [r1, #4] } 800885a: 4770 bx lr 0800885c <_isatty>: int _isatty(int file) { return 1; } 800885c: 2001 movs r0, #1 800885e: 4770 bx lr 08008860 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 8008860: 2000 movs r0, #0 8008862: 4770 bx lr 08008864 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8008864: 4b0e ldr r3, [pc, #56] ; (80088a0 ) 8008866: 681a ldr r2, [r3, #0] 8008868: f042 0201 orr.w r2, r2, #1 800886c: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 800886e: 6859 ldr r1, [r3, #4] 8008870: 4a0c ldr r2, [pc, #48] ; (80088a4 ) 8008872: 400a ands r2, r1 8008874: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8008876: 681a ldr r2, [r3, #0] 8008878: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 800887c: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8008880: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8008882: 681a ldr r2, [r3, #0] 8008884: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8008888: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 800888a: 685a ldr r2, [r3, #4] 800888c: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8008890: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8008892: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8008896: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8008898: 4a03 ldr r2, [pc, #12] ; (80088a8 ) 800889a: 4b04 ldr r3, [pc, #16] ; (80088ac ) 800889c: 609a str r2, [r3, #8] 800889e: 4770 bx lr 80088a0: 40021000 .word 0x40021000 80088a4: f8ff0000 .word 0xf8ff0000 80088a8: 08004000 .word 0x08004000 80088ac: e000ed00 .word 0xe000ed00 080088b0 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80088b0: 4a16 ldr r2, [pc, #88] ; (800890c ) { 80088b2: b538 push {r3, r4, r5, lr} uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80088b4: 6810 ldr r0, [r2, #0] 80088b6: 1c43 adds r3, r0, #1 80088b8: 6013 str r3, [r2, #0] 80088ba: 4b15 ldr r3, [pc, #84] ; (8008910 ) 80088bc: 6859 ldr r1, [r3, #4] 80088be: f103 040c add.w r4, r3, #12 80088c2: 5d0d ldrb r5, [r1, r4] 80088c4: 4c13 ldr r4, [pc, #76] ; (8008914 ) #ifdef DEBUG_PRINT printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ; #endif /* DEBUG_PRINT */ pQueue->tail++; 80088c6: 3101 adds r1, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80088c8: f5b1 6f80 cmp.w r1, #1024 ; 0x400 uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 80088cc: 5425 strb r5, [r4, r0] 80088ce: 4614 mov r4, r2 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80088d0: bfa8 it ge 80088d2: 2200 movge r2, #0 pQueue->data--; 80088d4: 689d ldr r5, [r3, #8] pQueue->tail++; 80088d6: bfb8 it lt 80088d8: 6059 strlt r1, [r3, #4] pQueue->data--; 80088da: f105 35ff add.w r5, r5, #4294967295 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 80088de: bfa8 it ge 80088e0: 605a strge r2, [r3, #4] pQueue->data--; 80088e2: 609d str r5, [r3, #8] if(pQueue->data == 0){ 80088e4: b985 cbnz r5, 8008908 printf("data cnt zero !!! \r\n"); 80088e6: 480c ldr r0, [pc, #48] ; (8008918 ) 80088e8: f001 fa12 bl 8009d10 RF_Ctrl_Main(&uart_buf[Header]); 80088ec: 4809 ldr r0, [pc, #36] ; (8008914 ) 80088ee: f000 fc95 bl 800921c #if 0 // PYJ.2019.07.15_BEGIN -- for(int i = 0; i < cnt; i++){ printf("%02x ",uart_buf[i]); } #endif // PYJ.2019.07.15_END -- memset(uart_buf,0x00,cnt); 80088f2: 6822 ldr r2, [r4, #0] 80088f4: 4629 mov r1, r5 80088f6: 4807 ldr r0, [pc, #28] ; (8008914 ) 80088f8: f000 fd2d bl 8009356 // for(int i = 0; i < cnt; i++) // uart_buf[i] = 0; cnt = 0; 80088fc: 6025 str r5, [r4, #0] HAL_Delay(1); 80088fe: 2001 movs r0, #1 } } 8008900: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} HAL_Delay(1); 8008904: f7fc bde6 b.w 80054d4 8008908: bd38 pop {r3, r4, r5, pc} 800890a: bf00 nop 800890c: 20000430 .word 0x20000430 8008910: 20000ae0 .word 0x20000ae0 8008914: 200006e0 .word 0x200006e0 8008918: 0800c451 .word 0x0800c451 0800891c : UartRxTimerCnt = 0; 800891c: 2300 movs r3, #0 { 800891e: b510 push {r4, lr} UartRxTimerCnt = 0; 8008920: 4a0d ldr r2, [pc, #52] ; (8008958 ) pQueue->head++; 8008922: 4c0e ldr r4, [pc, #56] ; (800895c ) UartRxTimerCnt = 0; 8008924: 6013 str r3, [r2, #0] pQueue->head++; 8008926: 6822 ldr r2, [r4, #0] 8008928: 3201 adds r2, #1 800892a: f5b2 6f80 cmp.w r2, #1024 ; 0x400 800892e: bfb8 it lt 8008930: 4613 movlt r3, r2 8008932: 6023 str r3, [r4, #0] pQueue->data++; 8008934: 68a3 ldr r3, [r4, #8] 8008936: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8008938: f5b3 6f80 cmp.w r3, #1024 ; 0x400 pQueue->data++; 800893c: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 800893e: db01 blt.n 8008944 GetDataFromUartQueue(huart); 8008940: f7ff ffb6 bl 80088b0 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8008944: 6823 ldr r3, [r4, #0] 8008946: 4906 ldr r1, [pc, #24] ; (8008960 ) 8008948: 2201 movs r2, #1 } 800894a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800894e: 4419 add r1, r3 8008950: 4804 ldr r0, [pc, #16] ; (8008964 ) 8008952: f7fe b9f3 b.w 8006d3c 8008956: bf00 nop 8008958: 20000428 .word 0x20000428 800895c: 20000ae0 .word 0x20000ae0 8008960: 20000aec .word 0x20000aec 8008964: 2000061c .word 0x2000061c 08008968 : PATH_EN_2_1G_UL_GPIO_Port, PATH_EN_2_1G_UL_Pin, }; bool RF_Data_Check(uint8_t* data_buf){ 8008968: b508 push {r3, lr} bool ret = false; bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]); 800896a: 78c3 ldrb r3, [r0, #3] 800896c: 7881 ldrb r1, [r0, #2] 800896e: 5cc2 ldrb r2, [r0, r3] 8008970: 3001 adds r0, #1 8008972: f7fe fcc5 bl 8007300 printf("CRC Result : \"%d\" \r\n",ret); #endif /* DEBUG_PRINT */ return ret; } 8008976: 3000 adds r0, #0 8008978: bf18 it ne 800897a: 2001 movne r0, #1 800897c: bd08 pop {r3, pc} ... 08008980 : PLL_EN_3_5G_L_Pin, }; void RF_Status_Get(void){ // printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]); uint8_t data[10]; Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008980: 23be movs r3, #190 ; 0xbe 8008982: 4907 ldr r1, [pc, #28] ; (80089a0 ) Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 3; Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008984: 2260 movs r2, #96 ; 0x60 Prev_data[INDEX_BLUE_HEADER] = BLUECELL_HEADER; 8008986: 700b strb r3, [r1, #0] Prev_data[INDEX_BLUE_TYPE] = TYPE_BLUECELL_GET; 8008988: 2302 movs r3, #2 800898a: 704b strb r3, [r1, #1] Prev_data[INDEX_BLUE_LENGTH] = INDEX_BLUE_EOF - 3; 800898c: 235c movs r3, #92 ; 0x5c 800898e: 708b strb r3, [r1, #2] Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC; 8008990: 235e movs r3, #94 ; 0x5e 8008992: 70cb strb r3, [r1, #3] Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008994: 23eb movs r3, #235 ; 0xeb HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 8008996: 4803 ldr r0, [pc, #12] ; (80089a4 ) Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER; 8008998: f881 305f strb.w r3, [r1, #95] ; 0x5f HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 800899c: f7fe b994 b.w 8006cc8 80089a0: 200004cc .word 0x200004cc 80089a4: 2000061c .word 0x2000061c 080089a8 : // printf("\r\nYJ : %x",ADCvalue[0]); // printf("\r\n"); } void RF_Operate(uint8_t* data_buf){ 80089a8: b570 push {r4, r5, r6, lr} uint16_t temp_val = 0; uint8_t ADC_Modify = 0; ADF4153_R_N_Reg_st temp_reg; if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80089aa: 4db3 ldr r5, [pc, #716] ; (8008c78 ) 80089ac: 7902 ldrb r2, [r0, #4] 80089ae: 792b ldrb r3, [r5, #4] void RF_Operate(uint8_t* data_buf){ 80089b0: b0a2 sub sp, #136 ; 0x88 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80089b2: 4293 cmp r3, r2 void RF_Operate(uint8_t* data_buf){ 80089b4: 4604 mov r4, r0 if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){ 80089b6: d00c beq.n 80089d2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1])); 80089b8: 4bb0 ldr r3, [pc, #704] ; (8008c7c ) 80089ba: 9202 str r2, [sp, #8] 80089bc: f103 0210 add.w r2, r3, #16 80089c0: e892 0003 ldmia.w r2, {r0, r1} 80089c4: e88d 0003 stmia.w sp, {r0, r1} 80089c8: cb0f ldmia r3, {r0, r1, r2, r3} 80089ca: f7fe fb9f bl 800710c Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1]; 80089ce: 7923 ldrb r3, [r4, #4] 80089d0: 712b strb r3, [r5, #4] } if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){ 80089d2: 7962 ldrb r2, [r4, #5] 80089d4: 796b ldrb r3, [r5, #5] 80089d6: 4293 cmp r3, r2 80089d8: d00c beq.n 80089f4 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2])); 80089da: 4ba9 ldr r3, [pc, #676] ; (8008c80 ) 80089dc: 9202 str r2, [sp, #8] 80089de: f103 0210 add.w r2, r3, #16 80089e2: e892 0003 ldmia.w r2, {r0, r1} 80089e6: e88d 0003 stmia.w sp, {r0, r1} 80089ea: cb0f ldmia r3, {r0, r1, r2, r3} 80089ec: f7fe fb8e bl 800710c Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2]; 80089f0: 7963 ldrb r3, [r4, #5] 80089f2: 716b strb r3, [r5, #5] } if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){ 80089f4: 79a2 ldrb r2, [r4, #6] 80089f6: 79ab ldrb r3, [r5, #6] 80089f8: 4293 cmp r3, r2 80089fa: d00c beq.n 8008a16 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1])); 80089fc: 4ba1 ldr r3, [pc, #644] ; (8008c84 ) 80089fe: 9202 str r2, [sp, #8] 8008a00: f103 0210 add.w r2, r3, #16 8008a04: e892 0003 ldmia.w r2, {r0, r1} 8008a08: e88d 0003 stmia.w sp, {r0, r1} 8008a0c: cb0f ldmia r3, {r0, r1, r2, r3} 8008a0e: f7fe fb7d bl 800710c Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1]; 8008a12: 79a3 ldrb r3, [r4, #6] 8008a14: 71ab strb r3, [r5, #6] } if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){ 8008a16: 79e2 ldrb r2, [r4, #7] 8008a18: 79eb ldrb r3, [r5, #7] 8008a1a: 4293 cmp r3, r2 8008a1c: d00c beq.n 8008a38 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2])); 8008a1e: 4b9a ldr r3, [pc, #616] ; (8008c88 ) 8008a20: 9202 str r2, [sp, #8] 8008a22: f103 0210 add.w r2, r3, #16 8008a26: e892 0003 ldmia.w r2, {r0, r1} 8008a2a: e88d 0003 stmia.w sp, {r0, r1} 8008a2e: cb0f ldmia r3, {r0, r1, r2, r3} 8008a30: f7fe fb6c bl 800710c Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2]; 8008a34: 79e3 ldrb r3, [r4, #7] 8008a36: 71eb strb r3, [r5, #7] } if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){ 8008a38: 7a22 ldrb r2, [r4, #8] 8008a3a: 7a2b ldrb r3, [r5, #8] 8008a3c: 4293 cmp r3, r2 8008a3e: d00c beq.n 8008a5a BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3])); 8008a40: 4b92 ldr r3, [pc, #584] ; (8008c8c ) 8008a42: 9202 str r2, [sp, #8] 8008a44: f103 0210 add.w r2, r3, #16 8008a48: e892 0003 ldmia.w r2, {r0, r1} 8008a4c: e88d 0003 stmia.w sp, {r0, r1} 8008a50: cb0f ldmia r3, {r0, r1, r2, r3} 8008a52: f7fe fb5b bl 800710c Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3]; 8008a56: 7a23 ldrb r3, [r4, #8] 8008a58: 722b strb r3, [r5, #8] } if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){ 8008a5a: 7a62 ldrb r2, [r4, #9] 8008a5c: 7a6b ldrb r3, [r5, #9] 8008a5e: 4293 cmp r3, r2 8008a60: d00c beq.n 8008a7c #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4])); 8008a62: 4b8b ldr r3, [pc, #556] ; (8008c90 ) 8008a64: 9202 str r2, [sp, #8] 8008a66: f103 0210 add.w r2, r3, #16 8008a6a: e892 0003 ldmia.w r2, {r0, r1} 8008a6e: e88d 0003 stmia.w sp, {r0, r1} 8008a72: cb0f ldmia r3, {r0, r1, r2, r3} 8008a74: f7fe fb4a bl 800710c Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4]; 8008a78: 7a63 ldrb r3, [r4, #9] 8008a7a: 726b strb r3, [r5, #9] } if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){ 8008a7c: 7aa2 ldrb r2, [r4, #10] 8008a7e: 7aab ldrb r3, [r5, #10] 8008a80: 4293 cmp r3, r2 8008a82: d00c beq.n 8008a9e #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1])); 8008a84: 4b83 ldr r3, [pc, #524] ; (8008c94 ) 8008a86: 9202 str r2, [sp, #8] 8008a88: f103 0210 add.w r2, r3, #16 8008a8c: e892 0003 ldmia.w r2, {r0, r1} 8008a90: e88d 0003 stmia.w sp, {r0, r1} 8008a94: cb0f ldmia r3, {r0, r1, r2, r3} 8008a96: f7fe fb39 bl 800710c Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1]; 8008a9a: 7aa3 ldrb r3, [r4, #10] 8008a9c: 72ab strb r3, [r5, #10] } if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){ 8008a9e: 7ae2 ldrb r2, [r4, #11] 8008aa0: 7aeb ldrb r3, [r5, #11] 8008aa2: 4293 cmp r3, r2 8008aa4: d00c beq.n 8008ac0 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2])); 8008aa6: 4b7c ldr r3, [pc, #496] ; (8008c98 ) 8008aa8: 9202 str r2, [sp, #8] 8008aaa: f103 0210 add.w r2, r3, #16 8008aae: e892 0003 ldmia.w r2, {r0, r1} 8008ab2: e88d 0003 stmia.w sp, {r0, r1} 8008ab6: cb0f ldmia r3, {r0, r1, r2, r3} 8008ab8: f7fe fb28 bl 800710c Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2]; 8008abc: 7ae3 ldrb r3, [r4, #11] 8008abe: 72eb strb r3, [r5, #11] } if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){ 8008ac0: 7b22 ldrb r2, [r4, #12] 8008ac2: 7b2b ldrb r3, [r5, #12] 8008ac4: 4293 cmp r3, r2 8008ac6: d00c beq.n 8008ae2 #ifdef DEBUG_PRINT printf("\r\nLINE : %d \r\n",__LINE__); #endif /* DEBUG_PRINT */ BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1])); 8008ac8: 4b74 ldr r3, [pc, #464] ; (8008c9c ) 8008aca: 9202 str r2, [sp, #8] 8008acc: f103 0210 add.w r2, r3, #16 8008ad0: e892 0003 ldmia.w r2, {r0, r1} 8008ad4: e88d 0003 stmia.w sp, {r0, r1} 8008ad8: cb0f ldmia r3, {r0, r1, r2, r3} 8008ada: f7fe fb17 bl 800710c Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1]; 8008ade: 7b23 ldrb r3, [r4, #12] 8008ae0: 732b strb r3, [r5, #12] } if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){ 8008ae2: 7b62 ldrb r2, [r4, #13] 8008ae4: 7b6b ldrb r3, [r5, #13] 8008ae6: 4293 cmp r3, r2 8008ae8: d00c beq.n 8008b04 BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2])); 8008aea: 4b6d ldr r3, [pc, #436] ; (8008ca0 ) 8008aec: 9202 str r2, [sp, #8] 8008aee: f103 0210 add.w r2, r3, #16 8008af2: e892 0003 ldmia.w r2, {r0, r1} 8008af6: e88d 0003 stmia.w sp, {r0, r1} 8008afa: cb0f ldmia r3, {r0, r1, r2, r3} 8008afc: f7fe fb06 bl 800710c Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2]; 8008b00: 7b63 ldrb r3, [r4, #13] 8008b02: 736b strb r3, [r5, #13] } if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){ 8008b04: 7ba2 ldrb r2, [r4, #14] 8008b06: 7bab ldrb r3, [r5, #14] 8008b08: 4293 cmp r3, r2 8008b0a: d00c beq.n 8008b26 BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3])); 8008b0c: 4b65 ldr r3, [pc, #404] ; (8008ca4 ) 8008b0e: 9202 str r2, [sp, #8] 8008b10: f103 0210 add.w r2, r3, #16 8008b14: e892 0003 ldmia.w r2, {r0, r1} 8008b18: e88d 0003 stmia.w sp, {r0, r1} 8008b1c: cb0f ldmia r3, {r0, r1, r2, r3} 8008b1e: f7fe faf5 bl 800710c Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3]; 8008b22: 7ba3 ldrb r3, [r4, #14] 8008b24: 73ab strb r3, [r5, #14] } if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){ 8008b26: 7be2 ldrb r2, [r4, #15] 8008b28: 7beb ldrb r3, [r5, #15] 8008b2a: 4293 cmp r3, r2 8008b2c: d00c beq.n 8008b48 BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4])); 8008b2e: 4b5e ldr r3, [pc, #376] ; (8008ca8 ) 8008b30: 9202 str r2, [sp, #8] 8008b32: f103 0210 add.w r2, r3, #16 8008b36: e892 0003 ldmia.w r2, {r0, r1} 8008b3a: e88d 0003 stmia.w sp, {r0, r1} 8008b3e: cb0f ldmia r3, {r0, r1, r2, r3} 8008b40: f7fe fae4 bl 800710c Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4]; 8008b44: 7be3 ldrb r3, [r4, #15] 8008b46: 73eb strb r3, [r5, #15] } if( (Prev_data[INDEX_ATT_3_5G_DL] != data_buf[INDEX_ATT_3_5G_DL]) 8008b48: 7c21 ldrb r1, [r4, #16] 8008b4a: 7c2b ldrb r3, [r5, #16] 8008b4c: 428b cmp r3, r1 8008b4e: d10f bne.n 8008b70 ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL]) 8008b50: 7c6a ldrb r2, [r5, #17] 8008b52: 7c63 ldrb r3, [r4, #17] 8008b54: 429a cmp r2, r3 8008b56: d10b bne.n 8008b70 ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1]) 8008b58: 7caa ldrb r2, [r5, #18] 8008b5a: 7ca3 ldrb r3, [r4, #18] 8008b5c: 429a cmp r2, r3 8008b5e: d107 bne.n 8008b70 ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2]) 8008b60: 7cea ldrb r2, [r5, #19] 8008b62: 7ce3 ldrb r3, [r4, #19] 8008b64: 429a cmp r2, r3 8008b66: d103 bne.n 8008b70 ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3]) 8008b68: 7d2a ldrb r2, [r5, #20] 8008b6a: 7d23 ldrb r3, [r4, #20] 8008b6c: 429a cmp r2, r3 8008b6e: d033 beq.n 8008bd8 ){ ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_DL] = data_buf[INDEX_ATT_3_5G_DL]; 8008b70: 4e4e ldr r6, [pc, #312] ; (8008cac ) 8008b72: 7429 strb r1, [r5, #16] 8008b74: 7631 strb r1, [r6, #24] ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 8008b76: 7c63 ldrb r3, [r4, #17] ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; printf("YJ : data0 : %x \r\n",ALL_ATT_3_5G.data0); 8008b78: 484d ldr r0, [pc, #308] ; (8008cb0 ) ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL] = data_buf[INDEX_ATT_3_5G_UL]; 8008b7a: 746b strb r3, [r5, #17] 8008b7c: f886 3034 strb.w r3, [r6, #52] ; 0x34 ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1]; 8008b80: 7ca3 ldrb r3, [r4, #18] 8008b82: 74ab strb r3, [r5, #18] 8008b84: f886 3050 strb.w r3, [r6, #80] ; 0x50 ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2]; 8008b88: 7ce3 ldrb r3, [r4, #19] 8008b8a: 74eb strb r3, [r5, #19] 8008b8c: f886 306c strb.w r3, [r6, #108] ; 0x6c ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3]; 8008b90: 7d23 ldrb r3, [r4, #20] 8008b92: 752b strb r3, [r5, #20] 8008b94: f886 3088 strb.w r3, [r6, #136] ; 0x88 printf("YJ : data0 : %x \r\n",ALL_ATT_3_5G.data0); 8008b98: f001 f846 bl 8009c28 printf("YJ : data1 : %x \r\n",ALL_ATT_3_5G.data1); 8008b9c: f896 1034 ldrb.w r1, [r6, #52] ; 0x34 8008ba0: 4844 ldr r0, [pc, #272] ; (8008cb4 ) 8008ba2: f001 f841 bl 8009c28 printf("YJ : data2 : %x \r\n",ALL_ATT_3_5G.data2); 8008ba6: f896 1050 ldrb.w r1, [r6, #80] ; 0x50 8008baa: 4843 ldr r0, [pc, #268] ; (8008cb8 ) 8008bac: f001 f83c bl 8009c28 printf("YJ : data3 : %x \r\n",ALL_ATT_3_5G.data3); 8008bb0: f896 106c ldrb.w r1, [r6, #108] ; 0x6c 8008bb4: 4841 ldr r0, [pc, #260] ; (8008cbc ) 8008bb6: f001 f837 bl 8009c28 printf("YJ : data4 : %x \r\n",ALL_ATT_3_5G.data4); 8008bba: f896 1088 ldrb.w r1, [r6, #136] ; 0x88 8008bbe: 4840 ldr r0, [pc, #256] ; (8008cc0 ) 8008bc0: f001 f832 bl 8009c28 PE43711_ALL_atten_ctrl(ALL_ATT_3_5G); 8008bc4: 227c movs r2, #124 ; 0x7c 8008bc6: f106 0110 add.w r1, r6, #16 8008bca: 4668 mov r0, sp 8008bcc: f000 fbb8 bl 8009340 8008bd0: e896 000f ldmia.w r6, {r0, r1, r2, r3} 8008bd4: f7fe fbc4 bl 8007360 } if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H]) 8008bd8: 7d63 ldrb r3, [r4, #21] 8008bda: 7d6a ldrb r2, [r5, #21] 8008bdc: 429a cmp r2, r3 8008bde: d019 beq.n 8008c14 && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L]) 8008be0: 7da0 ldrb r0, [r4, #22] 8008be2: 7daa ldrb r2, [r5, #22] 8008be4: 4282 cmp r2, r0 8008be6: d015 beq.n 8008c14 ){ temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]); // printf("INDEX_PLL_1_8G_DL_H : %x \r\n",temp_val); ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092); 8008be8: ea40 2003 orr.w r0, r0, r3, lsl #8 8008bec: 4b35 ldr r3, [pc, #212] ; (8008cc4 ) 8008bee: 4358 muls r0, r3 8008bf0: f7ff fc14 bl 800841c 8008bf4: 4a34 ldr r2, [pc, #208] ; (8008cc8 ) 8008bf6: 4b35 ldr r3, [pc, #212] ; (8008ccc ) 8008bf8: 9204 str r2, [sp, #16] 8008bfa: f44f 6282 mov.w r2, #1040 ; 0x410 8008bfe: 9003 str r0, [sp, #12] 8008c00: 9202 str r2, [sp, #8] 8008c02: f103 0210 add.w r2, r3, #16 8008c06: e892 0003 ldmia.w r2, {r0, r1} 8008c0a: e88d 0003 stmia.w sp, {r0, r1} 8008c0e: cb0f ldmia r3, {r0, r1, r2, r3} 8008c10: f7ff fc0c bl 800842c } if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H]) 8008c14: 7de3 ldrb r3, [r4, #23] 8008c16: 7dea ldrb r2, [r5, #23] 8008c18: 429a cmp r2, r3 8008c1a: d019 beq.n 8008c50 && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){ 8008c1c: 7e20 ldrb r0, [r4, #24] 8008c1e: 7e2a ldrb r2, [r5, #24] 8008c20: 4282 cmp r2, r0 8008c22: d015 beq.n 8008c50 temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]); ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008c24: ea40 2003 orr.w r0, r0, r3, lsl #8 8008c28: 4b26 ldr r3, [pc, #152] ; (8008cc4 ) 8008c2a: 4358 muls r0, r3 8008c2c: f7ff fbf6 bl 800841c 8008c30: 4a25 ldr r2, [pc, #148] ; (8008cc8 ) 8008c32: 4b27 ldr r3, [pc, #156] ; (8008cd0 ) 8008c34: 9204 str r2, [sp, #16] 8008c36: f44f 6282 mov.w r2, #1040 ; 0x410 8008c3a: 9003 str r0, [sp, #12] 8008c3c: 9202 str r2, [sp, #8] 8008c3e: f103 0210 add.w r2, r3, #16 8008c42: e892 0003 ldmia.w r2, {r0, r1} 8008c46: e88d 0003 stmia.w sp, {r0, r1} 8008c4a: cb0f ldmia r3, {r0, r1, r2, r3} 8008c4c: f7ff fbee bl 800842c } if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H]) 8008c50: 7e63 ldrb r3, [r4, #25] 8008c52: 7e6a ldrb r2, [r5, #25] 8008c54: 429a cmp r2, r3 8008c56: d04a beq.n 8008cee && (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){ 8008c58: 7ea0 ldrb r0, [r4, #26] 8008c5a: 7eaa ldrb r2, [r5, #26] 8008c5c: 4282 cmp r2, r0 8008c5e: d046 beq.n 8008cee temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L])); #ifdef DEBUG_PRINT printf("data_buf[INDEX_PLL_2_1G_DL_H] %x \r\ndata_buf[INDEX_PLL_2_1G_DL_L] temp_val : %x\r\n ",data_buf[INDEX_PLL_2_1G_DL_H],data_buf[INDEX_PLL_2_1G_DL_L],temp_val); #endif /* DEBUG_PRINT */ ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008c60: ea40 2003 orr.w r0, r0, r3, lsl #8 8008c64: 4b17 ldr r3, [pc, #92] ; (8008cc4 ) 8008c66: 4358 muls r0, r3 8008c68: f7ff fbd8 bl 800841c 8008c6c: 4a16 ldr r2, [pc, #88] ; (8008cc8 ) 8008c6e: 4b19 ldr r3, [pc, #100] ; (8008cd4 ) 8008c70: 9204 str r2, [sp, #16] 8008c72: f44f 6282 mov.w r2, #1040 ; 0x410 8008c76: e02f b.n 8008cd8 8008c78: 200004cc .word 0x200004cc 8008c7c: 20000008 .word 0x20000008 8008c80: 20000020 .word 0x20000020 8008c84: 20000038 .word 0x20000038 8008c88: 20000050 .word 0x20000050 8008c8c: 20000068 .word 0x20000068 8008c90: 20000080 .word 0x20000080 8008c94: 20000098 .word 0x20000098 8008c98: 200000b0 .word 0x200000b0 8008c9c: 200000c8 .word 0x200000c8 8008ca0: 200000e0 .word 0x200000e0 8008ca4: 200000f8 .word 0x200000f8 8008ca8: 20000110 .word 0x20000110 8008cac: 20000440 .word 0x20000440 8008cb0: 0800c499 .word 0x0800c499 8008cb4: 0800c4ad .word 0x0800c4ad 8008cb8: 0800c4c1 .word 0x0800c4c1 8008cbc: 0800c4d5 .word 0x0800c4d5 8008cc0: 0800c4e9 .word 0x0800c4e9 8008cc4: 000186a0 .word 0x000186a0 8008cc8: 009f8092 .word 0x009f8092 8008ccc: 200001a0 .word 0x200001a0 8008cd0: 200001b8 .word 0x200001b8 8008cd4: 200001d0 .word 0x200001d0 8008cd8: 9003 str r0, [sp, #12] 8008cda: 9202 str r2, [sp, #8] 8008cdc: f103 0210 add.w r2, r3, #16 8008ce0: e892 0003 ldmia.w r2, {r0, r1} 8008ce4: e88d 0003 stmia.w sp, {r0, r1} 8008ce8: cb0f ldmia r3, {r0, r1, r2, r3} 8008cea: f7ff fb9f bl 800842c } if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H]) 8008cee: 7ee3 ldrb r3, [r4, #27] 8008cf0: 7eea ldrb r2, [r5, #27] 8008cf2: 429a cmp r2, r3 8008cf4: d019 beq.n 8008d2a && (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){ 8008cf6: 7f20 ldrb r0, [r4, #28] 8008cf8: 7f2a ldrb r2, [r5, #28] 8008cfa: 4282 cmp r2, r0 8008cfc: d015 beq.n 8008d2a temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]); ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092); 8008cfe: ea40 2003 orr.w r0, r0, r3, lsl #8 8008d02: 4bc5 ldr r3, [pc, #788] ; (8009018 ) 8008d04: 4358 muls r0, r3 8008d06: f7ff fb89 bl 800841c 8008d0a: 4ac4 ldr r2, [pc, #784] ; (800901c ) 8008d0c: 4bc4 ldr r3, [pc, #784] ; (8009020 ) 8008d0e: 9204 str r2, [sp, #16] 8008d10: f44f 6282 mov.w r2, #1040 ; 0x410 8008d14: 9003 str r0, [sp, #12] 8008d16: 9202 str r2, [sp, #8] 8008d18: f103 0210 add.w r2, r3, #16 8008d1c: e892 0003 ldmia.w r2, {r0, r1} 8008d20: e88d 0003 stmia.w sp, {r0, r1} 8008d24: cb0f ldmia r3, {r0, r1, r2, r3} 8008d26: f7ff fb81 bl 800842c } if((Prev_data[INDEX_PLL_3_5G_DL_H] != data_buf[INDEX_PLL_3_5G_DL_H]) 8008d2a: 7f62 ldrb r2, [r4, #29] 8008d2c: 7f6b ldrb r3, [r5, #29] 8008d2e: 4293 cmp r3, r2 8008d30: d02a beq.n 8008d88 && (Prev_data[INDEX_PLL_3_5G_DL_L] != data_buf[INDEX_PLL_3_5G_DL_L])){ 8008d32: 7fa3 ldrb r3, [r4, #30] 8008d34: 7fa9 ldrb r1, [r5, #30] 8008d36: 4299 cmp r1, r3 8008d38: d026 beq.n 8008d88 (Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]); (Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L]); temp_val = (data_buf[INDEX_PLL_3_5G_DL_H] << 8) | (data_buf[INDEX_PLL_3_5G_DL_L]); printf("PLL CTRL \r\n"); 8008d3a: 48ba ldr r0, [pc, #744] ; (8009024 ) (Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]); 8008d3c: 776a strb r2, [r5, #29] (Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L]); 8008d3e: 77ab strb r3, [r5, #30] printf("PLL CTRL \r\n"); 8008d40: f000 ffe6 bl 8009d10 temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008d44: f241 3388 movw r3, #5000 ; 0x1388 8008d48: 9303 str r3, [sp, #12] 8008d4a: 2302 movs r3, #2 8008d4c: 9302 str r3, [sp, #8] 8008d4e: 2300 movs r3, #0 8008d50: 4ab5 ldr r2, [pc, #724] ; (8009028 ) 8008d52: a820 add r0, sp, #128 ; 0x80 8008d54: e9cd 2300 strd r2, r3, [sp] 8008d58: a3ab add r3, pc, #684 ; (adr r3, 8009008 ) 8008d5a: e9d3 2300 ldrd r2, r3, [r3] 8008d5e: f7fe fc3b bl 80075d8 ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008d62: 2203 movs r2, #3 8008d64: 9205 str r2, [sp, #20] 8008d66: f241 32c2 movw r2, #5058 ; 0x13c2 8008d6a: 9204 str r2, [sp, #16] 8008d6c: 9a20 ldr r2, [sp, #128] ; 0x80 8008d6e: 4baf ldr r3, [pc, #700] ; (800902c ) 8008d70: 9203 str r2, [sp, #12] 8008d72: 9a21 ldr r2, [sp, #132] ; 0x84 8008d74: 9202 str r2, [sp, #8] 8008d76: f103 0210 add.w r2, r3, #16 8008d7a: e892 0003 ldmia.w r2, {r0, r1} 8008d7e: e88d 0003 stmia.w sp, {r0, r1} 8008d82: cb0f ldmia r3, {r0, r1, r2, r3} 8008d84: f7fe fc96 bl 80076b4 } if((Prev_data[INDEX_PLL_3_5G_UL_H] != data_buf[INDEX_PLL_3_5G_UL_H]) 8008d88: 7fea ldrb r2, [r5, #31] 8008d8a: 7fe3 ldrb r3, [r4, #31] 8008d8c: 429a cmp r2, r3 8008d8e: d030 beq.n 8008df2 && (Prev_data[INDEX_PLL_3_5G_UL_L] != data_buf[INDEX_PLL_3_5G_UL_L])){ 8008d90: f895 2020 ldrb.w r2, [r5, #32] 8008d94: f894 3020 ldrb.w r3, [r4, #32] 8008d98: 429a cmp r2, r3 8008d9a: d02a beq.n 8008df2 printf("PLL CTRL \r\n"); 8008d9c: 48a1 ldr r0, [pc, #644] ; (8009024 ) 8008d9e: f000 ffb7 bl 8009d10 (Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H]); 8008da2: 7fe3 ldrb r3, [r4, #31] (Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L]); temp_val = (data_buf[INDEX_PLL_3_5G_UL_H] << 8) | (data_buf[INDEX_PLL_3_5G_UL_L]); temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008da4: 4aa0 ldr r2, [pc, #640] ; (8009028 ) (Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H]); 8008da6: 77eb strb r3, [r5, #31] (Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L]); 8008da8: f894 3020 ldrb.w r3, [r4, #32] temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008dac: a820 add r0, sp, #128 ; 0x80 (Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L]); 8008dae: f885 3020 strb.w r3, [r5, #32] temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008db2: f241 3388 movw r3, #5000 ; 0x1388 8008db6: 9303 str r3, [sp, #12] 8008db8: 2302 movs r3, #2 8008dba: 9302 str r3, [sp, #8] 8008dbc: 2300 movs r3, #0 8008dbe: e9cd 2300 strd r2, r3, [sp] 8008dc2: a393 add r3, pc, #588 ; (adr r3, 8009010 ) 8008dc4: e9d3 2300 ldrd r2, r3, [r3] 8008dc8: f7fe fc06 bl 80075d8 ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008dcc: 2203 movs r2, #3 8008dce: 9205 str r2, [sp, #20] 8008dd0: f241 32c2 movw r2, #5058 ; 0x13c2 8008dd4: 9204 str r2, [sp, #16] 8008dd6: 9a20 ldr r2, [sp, #128] ; 0x80 8008dd8: 4b95 ldr r3, [pc, #596] ; (8009030 ) 8008dda: 9203 str r2, [sp, #12] 8008ddc: 9a21 ldr r2, [sp, #132] ; 0x84 8008dde: 9202 str r2, [sp, #8] 8008de0: f103 0210 add.w r2, r3, #16 8008de4: e892 0003 ldmia.w r2, {r0, r1} 8008de8: e88d 0003 stmia.w sp, {r0, r1} 8008dec: cb0f ldmia r3, {r0, r1, r2, r3} 8008dee: f7fe fc61 bl 80076b4 } if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){ } if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){ 8008df2: f894 1040 ldrb.w r1, [r4, #64] ; 0x40 8008df6: f895 3040 ldrb.w r3, [r5, #64] ; 0x40 8008dfa: 428b cmp r3, r1 8008dfc: d006 beq.n 8008e0c Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]); 8008dfe: 2040 movs r0, #64 ; 0x40 8008e00: f7fe fe08 bl 8007a14 Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL]; 8008e04: f894 3040 ldrb.w r3, [r4, #64] ; 0x40 8008e08: f885 3040 strb.w r3, [r5, #64] ; 0x40 } if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){ 8008e0c: f894 1041 ldrb.w r1, [r4, #65] ; 0x41 8008e10: f895 3041 ldrb.w r3, [r5, #65] ; 0x41 8008e14: 428b cmp r3, r1 8008e16: d006 beq.n 8008e26 Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]); 8008e18: 2041 movs r0, #65 ; 0x41 8008e1a: f7fe fdfb bl 8007a14 Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL]; 8008e1e: f894 3041 ldrb.w r3, [r4, #65] ; 0x41 8008e22: f885 3041 strb.w r3, [r5, #65] ; 0x41 } if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){ 8008e26: f894 1042 ldrb.w r1, [r4, #66] ; 0x42 8008e2a: f895 3042 ldrb.w r3, [r5, #66] ; 0x42 8008e2e: 428b cmp r3, r1 8008e30: d006 beq.n 8008e40 Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]); 8008e32: 2042 movs r0, #66 ; 0x42 8008e34: f7fe fdee bl 8007a14 Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL]; 8008e38: f894 3042 ldrb.w r3, [r4, #66] ; 0x42 8008e3c: f885 3042 strb.w r3, [r5, #66] ; 0x42 } if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){ 8008e40: f894 1043 ldrb.w r1, [r4, #67] ; 0x43 8008e44: f895 3043 ldrb.w r3, [r5, #67] ; 0x43 8008e48: 428b cmp r3, r1 8008e4a: d006 beq.n 8008e5a Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]); 8008e4c: 2043 movs r0, #67 ; 0x43 8008e4e: f7fe fde1 bl 8007a14 Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL]; 8008e52: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8008e56: f885 3043 strb.w r3, [r5, #67] ; 0x43 } if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){ 8008e5a: f894 1044 ldrb.w r1, [r4, #68] ; 0x44 8008e5e: f895 3044 ldrb.w r3, [r5, #68] ; 0x44 8008e62: 428b cmp r3, r1 8008e64: d006 beq.n 8008e74 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]); 8008e66: 2044 movs r0, #68 ; 0x44 8008e68: f7fe fdd4 bl 8007a14 Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L]; 8008e6c: f894 3044 ldrb.w r3, [r4, #68] ; 0x44 8008e70: f885 3044 strb.w r3, [r5, #68] ; 0x44 } if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){ 8008e74: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8008e78: f895 3045 ldrb.w r3, [r5, #69] ; 0x45 8008e7c: 428b cmp r3, r1 8008e7e: d006 beq.n 8008e8e Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]); 8008e80: 2045 movs r0, #69 ; 0x45 8008e82: f7fe fdc7 bl 8007a14 Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H]; 8008e86: f894 3045 ldrb.w r3, [r4, #69] ; 0x45 8008e8a: f885 3045 strb.w r3, [r5, #69] ; 0x45 } if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){ 8008e8e: f894 1046 ldrb.w r1, [r4, #70] ; 0x46 8008e92: f895 3046 ldrb.w r3, [r5, #70] ; 0x46 8008e96: 428b cmp r3, r1 8008e98: d006 beq.n 8008ea8 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]); 8008e9a: 2046 movs r0, #70 ; 0x46 8008e9c: f7fe fdba bl 8007a14 Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL]; 8008ea0: f894 3046 ldrb.w r3, [r4, #70] ; 0x46 8008ea4: f885 3046 strb.w r3, [r5, #70] ; 0x46 } if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){ 8008ea8: f894 1047 ldrb.w r1, [r4, #71] ; 0x47 8008eac: f895 3047 ldrb.w r3, [r5, #71] ; 0x47 8008eb0: 428b cmp r3, r1 8008eb2: d006 beq.n 8008ec2 Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]); 8008eb4: 2047 movs r0, #71 ; 0x47 8008eb6: f7fe fdad bl 8007a14 Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL]; 8008eba: f894 3047 ldrb.w r3, [r4, #71] ; 0x47 8008ebe: f885 3047 strb.w r3, [r5, #71] ; 0x47 } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8008ec2: f894 1048 ldrb.w r1, [r4, #72] ; 0x48 8008ec6: f895 3048 ldrb.w r3, [r5, #72] ; 0x48 8008eca: 428b cmp r3, r1 8008ecc: d036 beq.n 8008f3c Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]); 8008ece: 2048 movs r0, #72 ; 0x48 8008ed0: f7fe fda0 bl 8007a14 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8008ed4: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 HAL_Delay(10); 8008ed8: 200a movs r0, #10 Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H]; 8008eda: f885 3048 strb.w r3, [r5, #72] ; 0x48 HAL_Delay(10); 8008ede: f7fc faf9 bl 80054d4 printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]); 8008ee2: f895 1048 ldrb.w r1, [r5, #72] ; 0x48 8008ee6: 4853 ldr r0, [pc, #332] ; (8009034 ) 8008ee8: f000 fe9e bl 8009c28 if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){ 8008eec: f894 3048 ldrb.w r3, [r4, #72] ; 0x48 8008ef0: b323 cbz r3, 8008f3c printf("PLL CTRL START !! \r\n"); 8008ef2: 4851 ldr r0, [pc, #324] ; (8009038 ) 8008ef4: f000 ff0c bl 8009d10 // ADF4153_Init(); temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008ef8: f241 3388 movw r3, #5000 ; 0x1388 8008efc: 9303 str r3, [sp, #12] 8008efe: 2302 movs r3, #2 8008f00: 9302 str r3, [sp, #8] 8008f02: 2300 movs r3, #0 8008f04: 4a48 ldr r2, [pc, #288] ; (8009028 ) 8008f06: a820 add r0, sp, #128 ; 0x80 8008f08: e9cd 2300 strd r2, r3, [sp] 8008f0c: a33e add r3, pc, #248 ; (adr r3, 8009008 ) 8008f0e: e9d3 2300 ldrd r2, r3, [r3] 8008f12: f7fe fb61 bl 80075d8 ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008f16: 2203 movs r2, #3 8008f18: 9205 str r2, [sp, #20] 8008f1a: f241 32c2 movw r2, #5058 ; 0x13c2 8008f1e: 9204 str r2, [sp, #16] 8008f20: 9a20 ldr r2, [sp, #128] ; 0x80 8008f22: 4b43 ldr r3, [pc, #268] ; (8009030 ) 8008f24: 9203 str r2, [sp, #12] 8008f26: 9a21 ldr r2, [sp, #132] ; 0x84 8008f28: 9202 str r2, [sp, #8] 8008f2a: f103 0210 add.w r2, r3, #16 8008f2e: e892 0003 ldmia.w r2, {r0, r1} 8008f32: e88d 0003 stmia.w sp, {r0, r1} 8008f36: cb0f ldmia r3, {r0, r1, r2, r3} 8008f38: f7fe fbbc bl 80076b4 } } if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 8008f3c: f894 1049 ldrb.w r1, [r4, #73] ; 0x49 8008f40: f895 3049 ldrb.w r3, [r5, #73] ; 0x49 8008f44: 428b cmp r3, r1 8008f46: d036 beq.n 8008fb6 Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]); 8008f48: 2049 movs r0, #73 ; 0x49 8008f4a: f7fe fd63 bl 8007a14 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L]; 8008f4e: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 HAL_Delay(10); 8008f52: 200a movs r0, #10 Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L]; 8008f54: f885 3049 strb.w r3, [r5, #73] ; 0x49 HAL_Delay(10); 8008f58: f7fc fabc bl 80054d4 printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]); 8008f5c: f895 1049 ldrb.w r1, [r5, #73] ; 0x49 8008f60: 4834 ldr r0, [pc, #208] ; (8009034 ) 8008f62: f000 fe61 bl 8009c28 if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){ 8008f66: f894 3049 ldrb.w r3, [r4, #73] ; 0x49 8008f6a: b323 cbz r3, 8008fb6 printf("PLL CTRL START !! \r\n"); 8008f6c: 4832 ldr r0, [pc, #200] ; (8009038 ) 8008f6e: f000 fecf bl 8009d10 temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING); 8008f72: f241 3388 movw r3, #5000 ; 0x1388 8008f76: 9303 str r3, [sp, #12] 8008f78: 2302 movs r3, #2 8008f7a: 9302 str r3, [sp, #8] 8008f7c: 2300 movs r3, #0 8008f7e: 4a2a ldr r2, [pc, #168] ; (8009028 ) 8008f80: a820 add r0, sp, #128 ; 0x80 8008f82: e9cd 2300 strd r2, r3, [sp] 8008f86: a322 add r3, pc, #136 ; (adr r3, 8009010 ) 8008f88: e9d3 2300 ldrd r2, r3, [r3] 8008f8c: f7fe fb24 bl 80075d8 ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3); 8008f90: 2203 movs r2, #3 8008f92: 9205 str r2, [sp, #20] 8008f94: f241 32c2 movw r2, #5058 ; 0x13c2 8008f98: 9204 str r2, [sp, #16] 8008f9a: 9a20 ldr r2, [sp, #128] ; 0x80 8008f9c: 4b23 ldr r3, [pc, #140] ; (800902c ) 8008f9e: 9203 str r2, [sp, #12] 8008fa0: 9a21 ldr r2, [sp, #132] ; 0x84 8008fa2: 9202 str r2, [sp, #8] 8008fa4: f103 0210 add.w r2, r3, #16 8008fa8: e892 0003 ldmia.w r2, {r0, r1} 8008fac: e88d 0003 stmia.w sp, {r0, r1} 8008fb0: cb0f ldmia r3, {r0, r1, r2, r3} 8008fb2: f7fe fb7f bl 80076b4 } } if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){ 8008fb6: f894 304a ldrb.w r3, [r4, #74] ; 0x4a 8008fba: f895 204a ldrb.w r2, [r5, #74] ; 0x4a 8008fbe: 429a cmp r2, r3 8008fc0: d006 beq.n 8008fd0 Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL]; 8008fc2: f885 304a strb.w r3, [r5, #74] ; 0x4a Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]); 8008fc6: f894 104a ldrb.w r1, [r4, #74] ; 0x4a 8008fca: 204a movs r0, #74 ; 0x4a 8008fcc: f7fe fd22 bl 8007a14 } if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){ 8008fd0: f894 304b ldrb.w r3, [r4, #75] ; 0x4b 8008fd4: f895 204b ldrb.w r2, [r5, #75] ; 0x4b 8008fd8: 429a cmp r2, r3 8008fda: d006 beq.n 8008fea Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL]; 8008fdc: f885 304b strb.w r3, [r5, #75] ; 0x4b Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]); 8008fe0: f894 104b ldrb.w r1, [r4, #75] ; 0x4b 8008fe4: 204b movs r0, #75 ; 0x4b 8008fe6: f7fe fd15 bl 8007a14 } if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){ 8008fea: 4d14 ldr r5, [pc, #80] ; (800903c ) 8008fec: f894 304c ldrb.w r3, [r4, #76] ; 0x4c 8008ff0: f895 204c ldrb.w r2, [r5, #76] ; 0x4c 8008ff4: 429a cmp r2, r3 8008ff6: d023 beq.n 8009040 Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL]; 8008ff8: f885 304c strb.w r3, [r5, #76] ; 0x4c Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]); 8008ffc: f894 104c ldrb.w r1, [r4, #76] ; 0x4c 8009000: 204c movs r0, #76 ; 0x4c 8009002: f7fe fd07 bl 8007a14 8009006: e01b b.n 8009040 8009008: ea83b4a0 .word 0xea83b4a0 800900c: 00000000 .word 0x00000000 8009010: ce8f5560 .word 0xce8f5560 8009014: 00000000 .word 0x00000000 8009018: 000186a0 .word 0x000186a0 800901c: 009f8092 .word 0x009f8092 8009020: 200001e8 .word 0x200001e8 8009024: 0800c4fd .word 0x0800c4fd 8009028: 02625a00 .word 0x02625a00 800902c: 2000021c .word 0x2000021c 8009030: 20000204 .word 0x20000204 8009034: 0800c508 .word 0x0800c508 8009038: 0800c516 .word 0x0800c516 800903c: 200004cc .word 0x200004cc } if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){ 8009040: f894 304d ldrb.w r3, [r4, #77] ; 0x4d 8009044: f895 204d ldrb.w r2, [r5, #77] ; 0x4d 8009048: 429a cmp r2, r3 800904a: d006 beq.n 800905a Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL]; 800904c: f885 304d strb.w r3, [r5, #77] ; 0x4d Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]); 8009050: f894 104d ldrb.w r1, [r4, #77] ; 0x4d 8009054: 204d movs r0, #77 ; 0x4d 8009056: f7fe fcdd bl 8007a14 } if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H]) 800905a: f894 304e ldrb.w r3, [r4, #78] ; 0x4e 800905e: f895 204e ldrb.w r2, [r5, #78] ; 0x4e 8009062: 429a cmp r2, r3 8009064: d106 bne.n 8009074 ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){ 8009066: f895 104f ldrb.w r1, [r5, #79] ; 0x4f 800906a: f894 204f ldrb.w r2, [r4, #79] ; 0x4f 800906e: 4291 cmp r1, r2 8009070: f000 80ce beq.w 8009210 ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H]; 8009074: f885 304e strb.w r3, [r5, #78] ; 0x4e Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L]; 8009078: f894 304f ldrb.w r3, [r4, #79] ; 0x4f 800907c: f885 304f strb.w r3, [r5, #79] ; 0x4f ADC_Modify = 1; 8009080: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H]) 8009082: f894 2050 ldrb.w r2, [r4, #80] ; 0x50 8009086: f895 1050 ldrb.w r1, [r5, #80] ; 0x50 800908a: 4291 cmp r1, r2 800908c: d105 bne.n 800909a ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){ 800908e: f895 0051 ldrb.w r0, [r5, #81] ; 0x51 8009092: f894 1051 ldrb.w r1, [r4, #81] ; 0x51 8009096: 4288 cmp r0, r1 8009098: d006 beq.n 80090a8 ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H]; 800909a: f885 2050 strb.w r2, [r5, #80] ; 0x50 Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L]; 800909e: f894 3051 ldrb.w r3, [r4, #81] ; 0x51 80090a2: f885 3051 strb.w r3, [r5, #81] ; 0x51 ADC_Modify = 1; 80090a6: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H]) 80090a8: f894 2052 ldrb.w r2, [r4, #82] ; 0x52 80090ac: f895 1052 ldrb.w r1, [r5, #82] ; 0x52 80090b0: 4291 cmp r1, r2 80090b2: d105 bne.n 80090c0 ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){ 80090b4: f895 0053 ldrb.w r0, [r5, #83] ; 0x53 80090b8: f894 1053 ldrb.w r1, [r4, #83] ; 0x53 80090bc: 4288 cmp r0, r1 80090be: d006 beq.n 80090ce ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H]; 80090c0: f885 2052 strb.w r2, [r5, #82] ; 0x52 Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L]; 80090c4: f894 3053 ldrb.w r3, [r4, #83] ; 0x53 80090c8: f885 3053 strb.w r3, [r5, #83] ; 0x53 ADC_Modify = 1; 80090cc: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H]) 80090ce: f894 2054 ldrb.w r2, [r4, #84] ; 0x54 80090d2: f895 1054 ldrb.w r1, [r5, #84] ; 0x54 80090d6: 4291 cmp r1, r2 80090d8: d105 bne.n 80090e6 ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){ 80090da: f895 0055 ldrb.w r0, [r5, #85] ; 0x55 80090de: f894 1055 ldrb.w r1, [r4, #85] ; 0x55 80090e2: 4288 cmp r0, r1 80090e4: d006 beq.n 80090f4 ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H]; 80090e6: f885 2054 strb.w r2, [r5, #84] ; 0x54 Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L]; 80090ea: f894 3055 ldrb.w r3, [r4, #85] ; 0x55 80090ee: f885 3055 strb.w r3, [r5, #85] ; 0x55 ADC_Modify = 1; 80090f2: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H]) 80090f4: f894 2056 ldrb.w r2, [r4, #86] ; 0x56 80090f8: f895 1056 ldrb.w r1, [r5, #86] ; 0x56 80090fc: 4291 cmp r1, r2 80090fe: d105 bne.n 800910c ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){ 8009100: f895 0057 ldrb.w r0, [r5, #87] ; 0x57 8009104: f894 1057 ldrb.w r1, [r4, #87] ; 0x57 8009108: 4288 cmp r0, r1 800910a: d006 beq.n 800911a ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H]; 800910c: f885 2056 strb.w r2, [r5, #86] ; 0x56 Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L]; 8009110: f894 3057 ldrb.w r3, [r4, #87] ; 0x57 8009114: f885 3057 strb.w r3, [r5, #87] ; 0x57 ADC_Modify = 1; 8009118: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H]) 800911a: f894 2058 ldrb.w r2, [r4, #88] ; 0x58 800911e: f895 1058 ldrb.w r1, [r5, #88] ; 0x58 8009122: 4291 cmp r1, r2 8009124: d105 bne.n 8009132 ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){ 8009126: f895 0059 ldrb.w r0, [r5, #89] ; 0x59 800912a: f894 1059 ldrb.w r1, [r4, #89] ; 0x59 800912e: 4288 cmp r0, r1 8009130: d006 beq.n 8009140 ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H]; 8009132: f885 2058 strb.w r2, [r5, #88] ; 0x58 Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L]; 8009136: f894 3059 ldrb.w r3, [r4, #89] ; 0x59 800913a: f885 3059 strb.w r3, [r5, #89] ; 0x59 ADC_Modify = 1; 800913e: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H]) 8009140: f894 205a ldrb.w r2, [r4, #90] ; 0x5a 8009144: f895 105a ldrb.w r1, [r5, #90] ; 0x5a 8009148: 4291 cmp r1, r2 800914a: d105 bne.n 8009158 ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){ 800914c: f895 005b ldrb.w r0, [r5, #91] ; 0x5b 8009150: f894 105b ldrb.w r1, [r4, #91] ; 0x5b 8009154: 4288 cmp r0, r1 8009156: d006 beq.n 8009166 ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H]; 8009158: f885 205a strb.w r2, [r5, #90] ; 0x5a Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L]; 800915c: f894 305b ldrb.w r3, [r4, #91] ; 0x5b 8009160: f885 305b strb.w r3, [r5, #91] ; 0x5b ADC_Modify = 1; 8009164: 2301 movs r3, #1 } if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H]) 8009166: f894 205c ldrb.w r2, [r4, #92] ; 0x5c 800916a: f895 105c ldrb.w r1, [r5, #92] ; 0x5c 800916e: 4291 cmp r1, r2 8009170: d105 bne.n 800917e ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){ 8009172: f895 005d ldrb.w r0, [r5, #93] ; 0x5d 8009176: f894 105d ldrb.w r1, [r4, #93] ; 0x5d 800917a: 4288 cmp r0, r1 800917c: d04a beq.n 8009214 ADC_Modify = 1; Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H]; 800917e: f885 205c strb.w r2, [r5, #92] ; 0x5c Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L]; 8009182: f894 305d ldrb.w r3, [r4, #93] ; 0x5d 8009186: f885 305d strb.w r3, [r5, #93] ; 0x5d if(ADC_Modify){ // SubmitDAC(0xF000); // HAL_Delay(1); // SubmitDAC(0x800C); // SubmitDAC(0xA000); SubmitDAC((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]) ); 800918a: f895 304f ldrb.w r3, [r5, #79] ; 0x4f 800918e: f895 004e ldrb.w r0, [r5, #78] ; 0x4e 8009192: ea43 2000 orr.w r0, r3, r0, lsl #8 8009196: f7fd ff67 bl 8007068 SubmitDAC((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L])); 800919a: f895 3051 ldrb.w r3, [r5, #81] ; 0x51 800919e: f895 0050 ldrb.w r0, [r5, #80] ; 0x50 80091a2: ea43 2000 orr.w r0, r3, r0, lsl #8 80091a6: f7fd ff5f bl 8007068 // SubmitDAC(0x2FFF ); SubmitDAC((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L])); 80091aa: f895 3053 ldrb.w r3, [r5, #83] ; 0x53 80091ae: f895 0052 ldrb.w r0, [r5, #82] ; 0x52 80091b2: ea43 2000 orr.w r0, r3, r0, lsl #8 80091b6: f7fd ff57 bl 8007068 SubmitDAC((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L])); 80091ba: f895 3055 ldrb.w r3, [r5, #85] ; 0x55 80091be: f895 0054 ldrb.w r0, [r5, #84] ; 0x54 80091c2: ea43 2000 orr.w r0, r3, r0, lsl #8 80091c6: f7fd ff4f bl 8007068 SubmitDAC((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L])); 80091ca: f895 3057 ldrb.w r3, [r5, #87] ; 0x57 80091ce: f895 0056 ldrb.w r0, [r5, #86] ; 0x56 80091d2: ea43 2000 orr.w r0, r3, r0, lsl #8 80091d6: f7fd ff47 bl 8007068 SubmitDAC((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L])); 80091da: f895 3059 ldrb.w r3, [r5, #89] ; 0x59 80091de: f895 0058 ldrb.w r0, [r5, #88] ; 0x58 80091e2: ea43 2000 orr.w r0, r3, r0, lsl #8 80091e6: f7fd ff3f bl 8007068 SubmitDAC((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L])); 80091ea: f895 305b ldrb.w r3, [r5, #91] ; 0x5b 80091ee: f895 005a ldrb.w r0, [r5, #90] ; 0x5a 80091f2: ea43 2000 orr.w r0, r3, r0, lsl #8 80091f6: f7fd ff37 bl 8007068 SubmitDAC((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L])); 80091fa: f895 005c ldrb.w r0, [r5, #92] ; 0x5c 80091fe: f895 305d ldrb.w r3, [r5, #93] ; 0x5d 8009202: ea43 2000 orr.w r0, r3, r0, lsl #8 } } 8009206: b022 add sp, #136 ; 0x88 8009208: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} SubmitDAC((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L])); 800920c: f7fd bf2c b.w 8007068 uint8_t ADC_Modify = 0; 8009210: 2300 movs r3, #0 8009212: e736 b.n 8009082 if(ADC_Modify){ 8009214: 2b00 cmp r3, #0 8009216: d1b8 bne.n 800918a } 8009218: b022 add sp, #136 ; 0x88 800921a: bd70 pop {r4, r5, r6, pc} 0800921c : bool RF_Ctrl_Main(uint8_t* data_buf){ 800921c: b5f8 push {r3, r4, r5, r6, r7, lr} 800921e: 4604 mov r4, r0 bool ret = false; Bluecell_Prot_t type = data_buf[Type]; 8009220: 7845 ldrb r5, [r0, #1] ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */ 8009222: f7ff fba1 bl 8008968 if(ret == false) 8009226: 4606 mov r6, r0 8009228: b120 cbz r0, 8009234 return ret; switch(type){ 800922a: 2d01 cmp r5, #1 800922c: d011 beq.n 8009252 800922e: d303 bcc.n 8009238 8009230: 2d02 cmp r5, #2 8009232: d024 beq.n 800927e printf("Function : %s LINE : %d type : %d \r\n",__func__,__LINE__,type); #endif break; } return ret; } 8009234: 4630 mov r0, r6 8009236: bdf8 pop {r3, r4, r5, r6, r7, pc} \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 8009238: f3bf 8f4f dsb sy (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 800923c: 4913 ldr r1, [pc, #76] ; (800928c ) SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 800923e: 4b14 ldr r3, [pc, #80] ; (8009290 ) (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8009240: 68ca ldr r2, [r1, #12] 8009242: f402 62e0 and.w r2, r2, #1792 ; 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8009246: 4313 orrs r3, r2 8009248: 60cb str r3, [r1, #12] 800924a: f3bf 8f4f dsb sy __ASM volatile ("nop"); 800924e: bf00 nop 8009250: e7fd b.n 800924e printf("TYPE_BLUECELL_SET : "); 8009252: 4810 ldr r0, [pc, #64] ; (8009294 ) 8009254: f000 fce8 bl 8009c28 for(uint8_t i =0 ; i < data_buf[Length] - 1; i++) 8009258: 2500 movs r5, #0 printf("%02x ",data_buf[4 + i]); 800925a: 4f0f ldr r7, [pc, #60] ; (8009298 ) for(uint8_t i =0 ; i < data_buf[Length] - 1; i++) 800925c: 78a2 ldrb r2, [r4, #2] 800925e: b2eb uxtb r3, r5 8009260: 3a01 subs r2, #1 8009262: 4293 cmp r3, r2 8009264: f105 0501 add.w r5, r5, #1 8009268: db03 blt.n 8009272 RF_Operate(&data_buf[Header]); 800926a: 4620 mov r0, r4 800926c: f7ff fb9c bl 80089a8 break; 8009270: e7e0 b.n 8009234 printf("%02x ",data_buf[4 + i]); 8009272: 4423 add r3, r4 8009274: 7919 ldrb r1, [r3, #4] 8009276: 4638 mov r0, r7 8009278: f000 fcd6 bl 8009c28 800927c: e7ee b.n 800925c printf("\r\nTYPE_BLUECELL_GET : \r\n"); 800927e: 4807 ldr r0, [pc, #28] ; (800929c ) 8009280: f000 fd46 bl 8009d10 RF_Status_Get(); 8009284: f7ff fb7c bl 8008980 break; 8009288: e7d4 b.n 8009234 800928a: bf00 nop 800928c: e000ed00 .word 0xe000ed00 8009290: 05fa0004 .word 0x05fa0004 8009294: 0800c466 .word 0x0800c466 8009298: 0800c47b .word 0x0800c47b 800929c: 0800c481 .word 0x0800c481 080092a0 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 80092a0: 2100 movs r1, #0 b LoopCopyDataInit 80092a2: e003 b.n 80092ac 080092a4 : CopyDataInit: ldr r3, =_sidata 80092a4: 4b0b ldr r3, [pc, #44] ; (80092d4 ) ldr r3, [r3, r1] 80092a6: 585b ldr r3, [r3, r1] str r3, [r0, r1] 80092a8: 5043 str r3, [r0, r1] adds r1, r1, #4 80092aa: 3104 adds r1, #4 080092ac : LoopCopyDataInit: ldr r0, =_sdata 80092ac: 480a ldr r0, [pc, #40] ; (80092d8 ) ldr r3, =_edata 80092ae: 4b0b ldr r3, [pc, #44] ; (80092dc ) adds r2, r0, r1 80092b0: 1842 adds r2, r0, r1 cmp r2, r3 80092b2: 429a cmp r2, r3 bcc CopyDataInit 80092b4: d3f6 bcc.n 80092a4 ldr r2, =_sbss 80092b6: 4a0a ldr r2, [pc, #40] ; (80092e0 ) b LoopFillZerobss 80092b8: e002 b.n 80092c0 080092ba : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 80092ba: 2300 movs r3, #0 str r3, [r2], #4 80092bc: f842 3b04 str.w r3, [r2], #4 080092c0 : LoopFillZerobss: ldr r3, = _ebss 80092c0: 4b08 ldr r3, [pc, #32] ; (80092e4 ) cmp r2, r3 80092c2: 429a cmp r2, r3 bcc FillZerobss 80092c4: d3f9 bcc.n 80092ba /* Call the clock system intitialization function.*/ bl SystemInit 80092c6: f7ff facd bl 8008864 /* Call static constructors */ bl __libc_init_array 80092ca: f000 f815 bl 80092f8 <__libc_init_array> /* Call the application's entry point.*/ bl main 80092ce: f7fe fcc7 bl 8007c60
bx lr 80092d2: 4770 bx lr ldr r3, =_sidata 80092d4: 0800c800 .word 0x0800c800 ldr r0, =_sdata 80092d8: 20000000 .word 0x20000000 ldr r3, =_edata 80092dc: 20000404 .word 0x20000404 ldr r2, =_sbss 80092e0: 20000404 .word 0x20000404 ldr r3, = _ebss 80092e4: 20001700 .word 0x20001700 080092e8 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80092e8: e7fe b.n 80092e8 ... 080092ec <__errno>: 80092ec: 4b01 ldr r3, [pc, #4] ; (80092f4 <__errno+0x8>) 80092ee: 6818 ldr r0, [r3, #0] 80092f0: 4770 bx lr 80092f2: bf00 nop 80092f4: 20000234 .word 0x20000234 080092f8 <__libc_init_array>: 80092f8: b570 push {r4, r5, r6, lr} 80092fa: 2500 movs r5, #0 80092fc: 4e0c ldr r6, [pc, #48] ; (8009330 <__libc_init_array+0x38>) 80092fe: 4c0d ldr r4, [pc, #52] ; (8009334 <__libc_init_array+0x3c>) 8009300: 1ba4 subs r4, r4, r6 8009302: 10a4 asrs r4, r4, #2 8009304: 42a5 cmp r5, r4 8009306: d109 bne.n 800931c <__libc_init_array+0x24> 8009308: f002 fc8c bl 800bc24 <_init> 800930c: 2500 movs r5, #0 800930e: 4e0a ldr r6, [pc, #40] ; (8009338 <__libc_init_array+0x40>) 8009310: 4c0a ldr r4, [pc, #40] ; (800933c <__libc_init_array+0x44>) 8009312: 1ba4 subs r4, r4, r6 8009314: 10a4 asrs r4, r4, #2 8009316: 42a5 cmp r5, r4 8009318: d105 bne.n 8009326 <__libc_init_array+0x2e> 800931a: bd70 pop {r4, r5, r6, pc} 800931c: f856 3025 ldr.w r3, [r6, r5, lsl #2] 8009320: 4798 blx r3 8009322: 3501 adds r5, #1 8009324: e7ee b.n 8009304 <__libc_init_array+0xc> 8009326: f856 3025 ldr.w r3, [r6, r5, lsl #2] 800932a: 4798 blx r3 800932c: 3501 adds r5, #1 800932e: e7f2 b.n 8009316 <__libc_init_array+0x1e> 8009330: 0800c7f8 .word 0x0800c7f8 8009334: 0800c7f8 .word 0x0800c7f8 8009338: 0800c7f8 .word 0x0800c7f8 800933c: 0800c7fc .word 0x0800c7fc 08009340 : 8009340: b510 push {r4, lr} 8009342: 1e43 subs r3, r0, #1 8009344: 440a add r2, r1 8009346: 4291 cmp r1, r2 8009348: d100 bne.n 800934c 800934a: bd10 pop {r4, pc} 800934c: f811 4b01 ldrb.w r4, [r1], #1 8009350: f803 4f01 strb.w r4, [r3, #1]! 8009354: e7f7 b.n 8009346 08009356 : 8009356: 4603 mov r3, r0 8009358: 4402 add r2, r0 800935a: 4293 cmp r3, r2 800935c: d100 bne.n 8009360 800935e: 4770 bx lr 8009360: f803 1b01 strb.w r1, [r3], #1 8009364: e7f9 b.n 800935a 08009366 <__cvt>: 8009366: 2b00 cmp r3, #0 8009368: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800936c: 461e mov r6, r3 800936e: bfbb ittet lt 8009370: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000 8009374: 461e movlt r6, r3 8009376: 2300 movge r3, #0 8009378: 232d movlt r3, #45 ; 0x2d 800937a: b088 sub sp, #32 800937c: 9f14 ldr r7, [sp, #80] ; 0x50 800937e: 9912 ldr r1, [sp, #72] ; 0x48 8009380: f027 0720 bic.w r7, r7, #32 8009384: 2f46 cmp r7, #70 ; 0x46 8009386: 4614 mov r4, r2 8009388: 9d10 ldr r5, [sp, #64] ; 0x40 800938a: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c 800938e: 700b strb r3, [r1, #0] 8009390: d004 beq.n 800939c <__cvt+0x36> 8009392: 2f45 cmp r7, #69 ; 0x45 8009394: d100 bne.n 8009398 <__cvt+0x32> 8009396: 3501 adds r5, #1 8009398: 2302 movs r3, #2 800939a: e000 b.n 800939e <__cvt+0x38> 800939c: 2303 movs r3, #3 800939e: aa07 add r2, sp, #28 80093a0: 9204 str r2, [sp, #16] 80093a2: aa06 add r2, sp, #24 80093a4: 9203 str r2, [sp, #12] 80093a6: e88d 0428 stmia.w sp, {r3, r5, sl} 80093aa: 4622 mov r2, r4 80093ac: 4633 mov r3, r6 80093ae: f000 febb bl 800a128 <_dtoa_r> 80093b2: 2f47 cmp r7, #71 ; 0x47 80093b4: 4680 mov r8, r0 80093b6: d102 bne.n 80093be <__cvt+0x58> 80093b8: 9b11 ldr r3, [sp, #68] ; 0x44 80093ba: 07db lsls r3, r3, #31 80093bc: d526 bpl.n 800940c <__cvt+0xa6> 80093be: 2f46 cmp r7, #70 ; 0x46 80093c0: eb08 0905 add.w r9, r8, r5 80093c4: d111 bne.n 80093ea <__cvt+0x84> 80093c6: f898 3000 ldrb.w r3, [r8] 80093ca: 2b30 cmp r3, #48 ; 0x30 80093cc: d10a bne.n 80093e4 <__cvt+0x7e> 80093ce: 2200 movs r2, #0 80093d0: 2300 movs r3, #0 80093d2: 4620 mov r0, r4 80093d4: 4631 mov r1, r6 80093d6: f7fb fb4f bl 8004a78 <__aeabi_dcmpeq> 80093da: b918 cbnz r0, 80093e4 <__cvt+0x7e> 80093dc: f1c5 0501 rsb r5, r5, #1 80093e0: f8ca 5000 str.w r5, [sl] 80093e4: f8da 3000 ldr.w r3, [sl] 80093e8: 4499 add r9, r3 80093ea: 2200 movs r2, #0 80093ec: 2300 movs r3, #0 80093ee: 4620 mov r0, r4 80093f0: 4631 mov r1, r6 80093f2: f7fb fb41 bl 8004a78 <__aeabi_dcmpeq> 80093f6: b938 cbnz r0, 8009408 <__cvt+0xa2> 80093f8: 2230 movs r2, #48 ; 0x30 80093fa: 9b07 ldr r3, [sp, #28] 80093fc: 4599 cmp r9, r3 80093fe: d905 bls.n 800940c <__cvt+0xa6> 8009400: 1c59 adds r1, r3, #1 8009402: 9107 str r1, [sp, #28] 8009404: 701a strb r2, [r3, #0] 8009406: e7f8 b.n 80093fa <__cvt+0x94> 8009408: f8cd 901c str.w r9, [sp, #28] 800940c: 4640 mov r0, r8 800940e: 9b07 ldr r3, [sp, #28] 8009410: 9a15 ldr r2, [sp, #84] ; 0x54 8009412: eba3 0308 sub.w r3, r3, r8 8009416: 6013 str r3, [r2, #0] 8009418: b008 add sp, #32 800941a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 0800941e <__exponent>: 800941e: 4603 mov r3, r0 8009420: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 8009422: 2900 cmp r1, #0 8009424: f803 2b02 strb.w r2, [r3], #2 8009428: bfb6 itet lt 800942a: 222d movlt r2, #45 ; 0x2d 800942c: 222b movge r2, #43 ; 0x2b 800942e: 4249 neglt r1, r1 8009430: 2909 cmp r1, #9 8009432: 7042 strb r2, [r0, #1] 8009434: dd21 ble.n 800947a <__exponent+0x5c> 8009436: f10d 0207 add.w r2, sp, #7 800943a: 4617 mov r7, r2 800943c: 260a movs r6, #10 800943e: fb91 f5f6 sdiv r5, r1, r6 8009442: fb06 1115 mls r1, r6, r5, r1 8009446: 2d09 cmp r5, #9 8009448: f101 0130 add.w r1, r1, #48 ; 0x30 800944c: f802 1c01 strb.w r1, [r2, #-1] 8009450: f102 34ff add.w r4, r2, #4294967295 8009454: 4629 mov r1, r5 8009456: dc09 bgt.n 800946c <__exponent+0x4e> 8009458: 3130 adds r1, #48 ; 0x30 800945a: 3a02 subs r2, #2 800945c: f804 1c01 strb.w r1, [r4, #-1] 8009460: 42ba cmp r2, r7 8009462: 461c mov r4, r3 8009464: d304 bcc.n 8009470 <__exponent+0x52> 8009466: 1a20 subs r0, r4, r0 8009468: b003 add sp, #12 800946a: bdf0 pop {r4, r5, r6, r7, pc} 800946c: 4622 mov r2, r4 800946e: e7e6 b.n 800943e <__exponent+0x20> 8009470: f812 1b01 ldrb.w r1, [r2], #1 8009474: f803 1b01 strb.w r1, [r3], #1 8009478: e7f2 b.n 8009460 <__exponent+0x42> 800947a: 2230 movs r2, #48 ; 0x30 800947c: 461c mov r4, r3 800947e: 4411 add r1, r2 8009480: f804 2b02 strb.w r2, [r4], #2 8009484: 7059 strb r1, [r3, #1] 8009486: e7ee b.n 8009466 <__exponent+0x48> 08009488 <_printf_float>: 8009488: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800948c: b091 sub sp, #68 ; 0x44 800948e: 460c mov r4, r1 8009490: 9f1a ldr r7, [sp, #104] ; 0x68 8009492: 4693 mov fp, r2 8009494: 461e mov r6, r3 8009496: 4605 mov r5, r0 8009498: f001 fd96 bl 800afc8 <_localeconv_r> 800949c: 6803 ldr r3, [r0, #0] 800949e: 4618 mov r0, r3 80094a0: 9309 str r3, [sp, #36] ; 0x24 80094a2: f7fa fec1 bl 8004228 80094a6: 2300 movs r3, #0 80094a8: 930e str r3, [sp, #56] ; 0x38 80094aa: 683b ldr r3, [r7, #0] 80094ac: 900a str r0, [sp, #40] ; 0x28 80094ae: 3307 adds r3, #7 80094b0: f023 0307 bic.w r3, r3, #7 80094b4: f103 0208 add.w r2, r3, #8 80094b8: f894 8018 ldrb.w r8, [r4, #24] 80094bc: f8d4 a000 ldr.w sl, [r4] 80094c0: 603a str r2, [r7, #0] 80094c2: e9d3 2300 ldrd r2, r3, [r3] 80094c6: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48 80094ca: f8d4 904c ldr.w r9, [r4, #76] ; 0x4c 80094ce: 6ca7 ldr r7, [r4, #72] ; 0x48 80094d0: f029 4300 bic.w r3, r9, #2147483648 ; 0x80000000 80094d4: 930b str r3, [sp, #44] ; 0x2c 80094d6: f04f 32ff mov.w r2, #4294967295 80094da: 4ba6 ldr r3, [pc, #664] ; (8009774 <_printf_float+0x2ec>) 80094dc: 4638 mov r0, r7 80094de: 990b ldr r1, [sp, #44] ; 0x2c 80094e0: f7fb fafc bl 8004adc <__aeabi_dcmpun> 80094e4: 2800 cmp r0, #0 80094e6: f040 81f7 bne.w 80098d8 <_printf_float+0x450> 80094ea: f04f 32ff mov.w r2, #4294967295 80094ee: 4ba1 ldr r3, [pc, #644] ; (8009774 <_printf_float+0x2ec>) 80094f0: 4638 mov r0, r7 80094f2: 990b ldr r1, [sp, #44] ; 0x2c 80094f4: f7fb fad4 bl 8004aa0 <__aeabi_dcmple> 80094f8: 2800 cmp r0, #0 80094fa: f040 81ed bne.w 80098d8 <_printf_float+0x450> 80094fe: 2200 movs r2, #0 8009500: 2300 movs r3, #0 8009502: 4638 mov r0, r7 8009504: 4649 mov r1, r9 8009506: f7fb fac1 bl 8004a8c <__aeabi_dcmplt> 800950a: b110 cbz r0, 8009512 <_printf_float+0x8a> 800950c: 232d movs r3, #45 ; 0x2d 800950e: f884 3043 strb.w r3, [r4, #67] ; 0x43 8009512: 4b99 ldr r3, [pc, #612] ; (8009778 <_printf_float+0x2f0>) 8009514: 4f99 ldr r7, [pc, #612] ; (800977c <_printf_float+0x2f4>) 8009516: f1b8 0f47 cmp.w r8, #71 ; 0x47 800951a: bf98 it ls 800951c: 461f movls r7, r3 800951e: 2303 movs r3, #3 8009520: f04f 0900 mov.w r9, #0 8009524: 6123 str r3, [r4, #16] 8009526: f02a 0304 bic.w r3, sl, #4 800952a: 6023 str r3, [r4, #0] 800952c: 9600 str r6, [sp, #0] 800952e: 465b mov r3, fp 8009530: aa0f add r2, sp, #60 ; 0x3c 8009532: 4621 mov r1, r4 8009534: 4628 mov r0, r5 8009536: f000 f9df bl 80098f8 <_printf_common> 800953a: 3001 adds r0, #1 800953c: f040 809a bne.w 8009674 <_printf_float+0x1ec> 8009540: f04f 30ff mov.w r0, #4294967295 8009544: b011 add sp, #68 ; 0x44 8009546: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800954a: 6862 ldr r2, [r4, #4] 800954c: a80e add r0, sp, #56 ; 0x38 800954e: 1c53 adds r3, r2, #1 8009550: f10d 0e34 add.w lr, sp, #52 ; 0x34 8009554: f44a 6380 orr.w r3, sl, #1024 ; 0x400 8009558: d141 bne.n 80095de <_printf_float+0x156> 800955a: 2206 movs r2, #6 800955c: 6062 str r2, [r4, #4] 800955e: 2100 movs r1, #0 8009560: 6023 str r3, [r4, #0] 8009562: 9301 str r3, [sp, #4] 8009564: 6863 ldr r3, [r4, #4] 8009566: f10d 0233 add.w r2, sp, #51 ; 0x33 800956a: 9005 str r0, [sp, #20] 800956c: 9202 str r2, [sp, #8] 800956e: 9300 str r3, [sp, #0] 8009570: 463a mov r2, r7 8009572: 464b mov r3, r9 8009574: 9106 str r1, [sp, #24] 8009576: f8cd 8010 str.w r8, [sp, #16] 800957a: f8cd e00c str.w lr, [sp, #12] 800957e: 4628 mov r0, r5 8009580: f7ff fef1 bl 8009366 <__cvt> 8009584: f008 03df and.w r3, r8, #223 ; 0xdf 8009588: 2b47 cmp r3, #71 ; 0x47 800958a: 4607 mov r7, r0 800958c: d109 bne.n 80095a2 <_printf_float+0x11a> 800958e: 9b0d ldr r3, [sp, #52] ; 0x34 8009590: 1cd8 adds r0, r3, #3 8009592: db02 blt.n 800959a <_printf_float+0x112> 8009594: 6862 ldr r2, [r4, #4] 8009596: 4293 cmp r3, r2 8009598: dd59 ble.n 800964e <_printf_float+0x1c6> 800959a: f1a8 0802 sub.w r8, r8, #2 800959e: fa5f f888 uxtb.w r8, r8 80095a2: f1b8 0f65 cmp.w r8, #101 ; 0x65 80095a6: 990d ldr r1, [sp, #52] ; 0x34 80095a8: d836 bhi.n 8009618 <_printf_float+0x190> 80095aa: 3901 subs r1, #1 80095ac: 4642 mov r2, r8 80095ae: f104 0050 add.w r0, r4, #80 ; 0x50 80095b2: 910d str r1, [sp, #52] ; 0x34 80095b4: f7ff ff33 bl 800941e <__exponent> 80095b8: 9a0e ldr r2, [sp, #56] ; 0x38 80095ba: 4681 mov r9, r0 80095bc: 1883 adds r3, r0, r2 80095be: 2a01 cmp r2, #1 80095c0: 6123 str r3, [r4, #16] 80095c2: dc02 bgt.n 80095ca <_printf_float+0x142> 80095c4: 6822 ldr r2, [r4, #0] 80095c6: 07d1 lsls r1, r2, #31 80095c8: d501 bpl.n 80095ce <_printf_float+0x146> 80095ca: 3301 adds r3, #1 80095cc: 6123 str r3, [r4, #16] 80095ce: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 80095d2: 2b00 cmp r3, #0 80095d4: d0aa beq.n 800952c <_printf_float+0xa4> 80095d6: 232d movs r3, #45 ; 0x2d 80095d8: f884 3043 strb.w r3, [r4, #67] ; 0x43 80095dc: e7a6 b.n 800952c <_printf_float+0xa4> 80095de: f1b8 0f67 cmp.w r8, #103 ; 0x67 80095e2: d002 beq.n 80095ea <_printf_float+0x162> 80095e4: f1b8 0f47 cmp.w r8, #71 ; 0x47 80095e8: d1b9 bne.n 800955e <_printf_float+0xd6> 80095ea: b19a cbz r2, 8009614 <_printf_float+0x18c> 80095ec: 2100 movs r1, #0 80095ee: 9106 str r1, [sp, #24] 80095f0: f10d 0133 add.w r1, sp, #51 ; 0x33 80095f4: e88d 000c stmia.w sp, {r2, r3} 80095f8: 6023 str r3, [r4, #0] 80095fa: 9005 str r0, [sp, #20] 80095fc: 463a mov r2, r7 80095fe: f8cd 8010 str.w r8, [sp, #16] 8009602: f8cd e00c str.w lr, [sp, #12] 8009606: 9102 str r1, [sp, #8] 8009608: 464b mov r3, r9 800960a: 4628 mov r0, r5 800960c: f7ff feab bl 8009366 <__cvt> 8009610: 4607 mov r7, r0 8009612: e7bc b.n 800958e <_printf_float+0x106> 8009614: 2201 movs r2, #1 8009616: e7a1 b.n 800955c <_printf_float+0xd4> 8009618: f1b8 0f66 cmp.w r8, #102 ; 0x66 800961c: d119 bne.n 8009652 <_printf_float+0x1ca> 800961e: 2900 cmp r1, #0 8009620: 6863 ldr r3, [r4, #4] 8009622: dd0c ble.n 800963e <_printf_float+0x1b6> 8009624: 6121 str r1, [r4, #16] 8009626: b913 cbnz r3, 800962e <_printf_float+0x1a6> 8009628: 6822 ldr r2, [r4, #0] 800962a: 07d2 lsls r2, r2, #31 800962c: d502 bpl.n 8009634 <_printf_float+0x1ac> 800962e: 3301 adds r3, #1 8009630: 440b add r3, r1 8009632: 6123 str r3, [r4, #16] 8009634: 9b0d ldr r3, [sp, #52] ; 0x34 8009636: f04f 0900 mov.w r9, #0 800963a: 65a3 str r3, [r4, #88] ; 0x58 800963c: e7c7 b.n 80095ce <_printf_float+0x146> 800963e: b913 cbnz r3, 8009646 <_printf_float+0x1be> 8009640: 6822 ldr r2, [r4, #0] 8009642: 07d0 lsls r0, r2, #31 8009644: d501 bpl.n 800964a <_printf_float+0x1c2> 8009646: 3302 adds r3, #2 8009648: e7f3 b.n 8009632 <_printf_float+0x1aa> 800964a: 2301 movs r3, #1 800964c: e7f1 b.n 8009632 <_printf_float+0x1aa> 800964e: f04f 0867 mov.w r8, #103 ; 0x67 8009652: 9b0d ldr r3, [sp, #52] ; 0x34 8009654: 9a0e ldr r2, [sp, #56] ; 0x38 8009656: 4293 cmp r3, r2 8009658: db05 blt.n 8009666 <_printf_float+0x1de> 800965a: 6822 ldr r2, [r4, #0] 800965c: 6123 str r3, [r4, #16] 800965e: 07d1 lsls r1, r2, #31 8009660: d5e8 bpl.n 8009634 <_printf_float+0x1ac> 8009662: 3301 adds r3, #1 8009664: e7e5 b.n 8009632 <_printf_float+0x1aa> 8009666: 2b00 cmp r3, #0 8009668: bfcc ite gt 800966a: 2301 movgt r3, #1 800966c: f1c3 0302 rsble r3, r3, #2 8009670: 4413 add r3, r2 8009672: e7de b.n 8009632 <_printf_float+0x1aa> 8009674: 6823 ldr r3, [r4, #0] 8009676: 055a lsls r2, r3, #21 8009678: d407 bmi.n 800968a <_printf_float+0x202> 800967a: 6923 ldr r3, [r4, #16] 800967c: 463a mov r2, r7 800967e: 4659 mov r1, fp 8009680: 4628 mov r0, r5 8009682: 47b0 blx r6 8009684: 3001 adds r0, #1 8009686: d12a bne.n 80096de <_printf_float+0x256> 8009688: e75a b.n 8009540 <_printf_float+0xb8> 800968a: f1b8 0f65 cmp.w r8, #101 ; 0x65 800968e: f240 80dc bls.w 800984a <_printf_float+0x3c2> 8009692: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8009696: 2200 movs r2, #0 8009698: 2300 movs r3, #0 800969a: f7fb f9ed bl 8004a78 <__aeabi_dcmpeq> 800969e: 2800 cmp r0, #0 80096a0: d039 beq.n 8009716 <_printf_float+0x28e> 80096a2: 2301 movs r3, #1 80096a4: 4a36 ldr r2, [pc, #216] ; (8009780 <_printf_float+0x2f8>) 80096a6: 4659 mov r1, fp 80096a8: 4628 mov r0, r5 80096aa: 47b0 blx r6 80096ac: 3001 adds r0, #1 80096ae: f43f af47 beq.w 8009540 <_printf_float+0xb8> 80096b2: 9b0e ldr r3, [sp, #56] ; 0x38 80096b4: 9a0d ldr r2, [sp, #52] ; 0x34 80096b6: 429a cmp r2, r3 80096b8: db02 blt.n 80096c0 <_printf_float+0x238> 80096ba: 6823 ldr r3, [r4, #0] 80096bc: 07d8 lsls r0, r3, #31 80096be: d50e bpl.n 80096de <_printf_float+0x256> 80096c0: 9b0a ldr r3, [sp, #40] ; 0x28 80096c2: 9a09 ldr r2, [sp, #36] ; 0x24 80096c4: 4659 mov r1, fp 80096c6: 4628 mov r0, r5 80096c8: 47b0 blx r6 80096ca: 3001 adds r0, #1 80096cc: f43f af38 beq.w 8009540 <_printf_float+0xb8> 80096d0: 2700 movs r7, #0 80096d2: f104 081a add.w r8, r4, #26 80096d6: 9b0e ldr r3, [sp, #56] ; 0x38 80096d8: 3b01 subs r3, #1 80096da: 429f cmp r7, r3 80096dc: db11 blt.n 8009702 <_printf_float+0x27a> 80096de: 6823 ldr r3, [r4, #0] 80096e0: 079f lsls r7, r3, #30 80096e2: d508 bpl.n 80096f6 <_printf_float+0x26e> 80096e4: 2700 movs r7, #0 80096e6: f104 0819 add.w r8, r4, #25 80096ea: 68e3 ldr r3, [r4, #12] 80096ec: 9a0f ldr r2, [sp, #60] ; 0x3c 80096ee: 1a9b subs r3, r3, r2 80096f0: 429f cmp r7, r3 80096f2: f2c0 80e7 blt.w 80098c4 <_printf_float+0x43c> 80096f6: 68e0 ldr r0, [r4, #12] 80096f8: 9b0f ldr r3, [sp, #60] ; 0x3c 80096fa: 4298 cmp r0, r3 80096fc: bfb8 it lt 80096fe: 4618 movlt r0, r3 8009700: e720 b.n 8009544 <_printf_float+0xbc> 8009702: 2301 movs r3, #1 8009704: 4642 mov r2, r8 8009706: 4659 mov r1, fp 8009708: 4628 mov r0, r5 800970a: 47b0 blx r6 800970c: 3001 adds r0, #1 800970e: f43f af17 beq.w 8009540 <_printf_float+0xb8> 8009712: 3701 adds r7, #1 8009714: e7df b.n 80096d6 <_printf_float+0x24e> 8009716: 9b0d ldr r3, [sp, #52] ; 0x34 8009718: 2b00 cmp r3, #0 800971a: dc33 bgt.n 8009784 <_printf_float+0x2fc> 800971c: 2301 movs r3, #1 800971e: 4a18 ldr r2, [pc, #96] ; (8009780 <_printf_float+0x2f8>) 8009720: 4659 mov r1, fp 8009722: 4628 mov r0, r5 8009724: 47b0 blx r6 8009726: 3001 adds r0, #1 8009728: f43f af0a beq.w 8009540 <_printf_float+0xb8> 800972c: 9b0d ldr r3, [sp, #52] ; 0x34 800972e: b923 cbnz r3, 800973a <_printf_float+0x2b2> 8009730: 9b0e ldr r3, [sp, #56] ; 0x38 8009732: b913 cbnz r3, 800973a <_printf_float+0x2b2> 8009734: 6823 ldr r3, [r4, #0] 8009736: 07d9 lsls r1, r3, #31 8009738: d5d1 bpl.n 80096de <_printf_float+0x256> 800973a: 9b0a ldr r3, [sp, #40] ; 0x28 800973c: 9a09 ldr r2, [sp, #36] ; 0x24 800973e: 4659 mov r1, fp 8009740: 4628 mov r0, r5 8009742: 47b0 blx r6 8009744: 3001 adds r0, #1 8009746: f43f aefb beq.w 8009540 <_printf_float+0xb8> 800974a: f04f 0800 mov.w r8, #0 800974e: f104 091a add.w r9, r4, #26 8009752: 9b0d ldr r3, [sp, #52] ; 0x34 8009754: 425b negs r3, r3 8009756: 4598 cmp r8, r3 8009758: db01 blt.n 800975e <_printf_float+0x2d6> 800975a: 9b0e ldr r3, [sp, #56] ; 0x38 800975c: e78e b.n 800967c <_printf_float+0x1f4> 800975e: 2301 movs r3, #1 8009760: 464a mov r2, r9 8009762: 4659 mov r1, fp 8009764: 4628 mov r0, r5 8009766: 47b0 blx r6 8009768: 3001 adds r0, #1 800976a: f43f aee9 beq.w 8009540 <_printf_float+0xb8> 800976e: f108 0801 add.w r8, r8, #1 8009772: e7ee b.n 8009752 <_printf_float+0x2ca> 8009774: 7fefffff .word 0x7fefffff 8009778: 0800c530 .word 0x0800c530 800977c: 0800c534 .word 0x0800c534 8009780: 0800c540 .word 0x0800c540 8009784: 9a0e ldr r2, [sp, #56] ; 0x38 8009786: 6da3 ldr r3, [r4, #88] ; 0x58 8009788: 429a cmp r2, r3 800978a: bfa8 it ge 800978c: 461a movge r2, r3 800978e: 2a00 cmp r2, #0 8009790: 4690 mov r8, r2 8009792: dc36 bgt.n 8009802 <_printf_float+0x37a> 8009794: f04f 0a00 mov.w sl, #0 8009798: f104 031a add.w r3, r4, #26 800979c: ea28 78e8 bic.w r8, r8, r8, asr #31 80097a0: 930b str r3, [sp, #44] ; 0x2c 80097a2: f8d4 9058 ldr.w r9, [r4, #88] ; 0x58 80097a6: eba9 0308 sub.w r3, r9, r8 80097aa: 459a cmp sl, r3 80097ac: db31 blt.n 8009812 <_printf_float+0x38a> 80097ae: 9b0e ldr r3, [sp, #56] ; 0x38 80097b0: 9a0d ldr r2, [sp, #52] ; 0x34 80097b2: 429a cmp r2, r3 80097b4: db38 blt.n 8009828 <_printf_float+0x3a0> 80097b6: 6823 ldr r3, [r4, #0] 80097b8: 07da lsls r2, r3, #31 80097ba: d435 bmi.n 8009828 <_printf_float+0x3a0> 80097bc: 9b0e ldr r3, [sp, #56] ; 0x38 80097be: 990d ldr r1, [sp, #52] ; 0x34 80097c0: eba3 0209 sub.w r2, r3, r9 80097c4: eba3 0801 sub.w r8, r3, r1 80097c8: 4590 cmp r8, r2 80097ca: bfa8 it ge 80097cc: 4690 movge r8, r2 80097ce: f1b8 0f00 cmp.w r8, #0 80097d2: dc31 bgt.n 8009838 <_printf_float+0x3b0> 80097d4: 2700 movs r7, #0 80097d6: ea28 78e8 bic.w r8, r8, r8, asr #31 80097da: f104 091a add.w r9, r4, #26 80097de: 9a0d ldr r2, [sp, #52] ; 0x34 80097e0: 9b0e ldr r3, [sp, #56] ; 0x38 80097e2: 1a9b subs r3, r3, r2 80097e4: eba3 0308 sub.w r3, r3, r8 80097e8: 429f cmp r7, r3 80097ea: f6bf af78 bge.w 80096de <_printf_float+0x256> 80097ee: 2301 movs r3, #1 80097f0: 464a mov r2, r9 80097f2: 4659 mov r1, fp 80097f4: 4628 mov r0, r5 80097f6: 47b0 blx r6 80097f8: 3001 adds r0, #1 80097fa: f43f aea1 beq.w 8009540 <_printf_float+0xb8> 80097fe: 3701 adds r7, #1 8009800: e7ed b.n 80097de <_printf_float+0x356> 8009802: 4613 mov r3, r2 8009804: 4659 mov r1, fp 8009806: 463a mov r2, r7 8009808: 4628 mov r0, r5 800980a: 47b0 blx r6 800980c: 3001 adds r0, #1 800980e: d1c1 bne.n 8009794 <_printf_float+0x30c> 8009810: e696 b.n 8009540 <_printf_float+0xb8> 8009812: 2301 movs r3, #1 8009814: 9a0b ldr r2, [sp, #44] ; 0x2c 8009816: 4659 mov r1, fp 8009818: 4628 mov r0, r5 800981a: 47b0 blx r6 800981c: 3001 adds r0, #1 800981e: f43f ae8f beq.w 8009540 <_printf_float+0xb8> 8009822: f10a 0a01 add.w sl, sl, #1 8009826: e7bc b.n 80097a2 <_printf_float+0x31a> 8009828: 9b0a ldr r3, [sp, #40] ; 0x28 800982a: 9a09 ldr r2, [sp, #36] ; 0x24 800982c: 4659 mov r1, fp 800982e: 4628 mov r0, r5 8009830: 47b0 blx r6 8009832: 3001 adds r0, #1 8009834: d1c2 bne.n 80097bc <_printf_float+0x334> 8009836: e683 b.n 8009540 <_printf_float+0xb8> 8009838: 4643 mov r3, r8 800983a: eb07 0209 add.w r2, r7, r9 800983e: 4659 mov r1, fp 8009840: 4628 mov r0, r5 8009842: 47b0 blx r6 8009844: 3001 adds r0, #1 8009846: d1c5 bne.n 80097d4 <_printf_float+0x34c> 8009848: e67a b.n 8009540 <_printf_float+0xb8> 800984a: 9a0e ldr r2, [sp, #56] ; 0x38 800984c: 2a01 cmp r2, #1 800984e: dc01 bgt.n 8009854 <_printf_float+0x3cc> 8009850: 07db lsls r3, r3, #31 8009852: d534 bpl.n 80098be <_printf_float+0x436> 8009854: 2301 movs r3, #1 8009856: 463a mov r2, r7 8009858: 4659 mov r1, fp 800985a: 4628 mov r0, r5 800985c: 47b0 blx r6 800985e: 3001 adds r0, #1 8009860: f43f ae6e beq.w 8009540 <_printf_float+0xb8> 8009864: 9b0a ldr r3, [sp, #40] ; 0x28 8009866: 9a09 ldr r2, [sp, #36] ; 0x24 8009868: 4659 mov r1, fp 800986a: 4628 mov r0, r5 800986c: 47b0 blx r6 800986e: 3001 adds r0, #1 8009870: f43f ae66 beq.w 8009540 <_printf_float+0xb8> 8009874: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8009878: 2200 movs r2, #0 800987a: 2300 movs r3, #0 800987c: f7fb f8fc bl 8004a78 <__aeabi_dcmpeq> 8009880: b150 cbz r0, 8009898 <_printf_float+0x410> 8009882: 2700 movs r7, #0 8009884: f104 081a add.w r8, r4, #26 8009888: 9b0e ldr r3, [sp, #56] ; 0x38 800988a: 3b01 subs r3, #1 800988c: 429f cmp r7, r3 800988e: db0c blt.n 80098aa <_printf_float+0x422> 8009890: 464b mov r3, r9 8009892: f104 0250 add.w r2, r4, #80 ; 0x50 8009896: e6f2 b.n 800967e <_printf_float+0x1f6> 8009898: 9b0e ldr r3, [sp, #56] ; 0x38 800989a: 1c7a adds r2, r7, #1 800989c: 3b01 subs r3, #1 800989e: 4659 mov r1, fp 80098a0: 4628 mov r0, r5 80098a2: 47b0 blx r6 80098a4: 3001 adds r0, #1 80098a6: d1f3 bne.n 8009890 <_printf_float+0x408> 80098a8: e64a b.n 8009540 <_printf_float+0xb8> 80098aa: 2301 movs r3, #1 80098ac: 4642 mov r2, r8 80098ae: 4659 mov r1, fp 80098b0: 4628 mov r0, r5 80098b2: 47b0 blx r6 80098b4: 3001 adds r0, #1 80098b6: f43f ae43 beq.w 8009540 <_printf_float+0xb8> 80098ba: 3701 adds r7, #1 80098bc: e7e4 b.n 8009888 <_printf_float+0x400> 80098be: 2301 movs r3, #1 80098c0: 463a mov r2, r7 80098c2: e7ec b.n 800989e <_printf_float+0x416> 80098c4: 2301 movs r3, #1 80098c6: 4642 mov r2, r8 80098c8: 4659 mov r1, fp 80098ca: 4628 mov r0, r5 80098cc: 47b0 blx r6 80098ce: 3001 adds r0, #1 80098d0: f43f ae36 beq.w 8009540 <_printf_float+0xb8> 80098d4: 3701 adds r7, #1 80098d6: e708 b.n 80096ea <_printf_float+0x262> 80098d8: 463a mov r2, r7 80098da: 464b mov r3, r9 80098dc: 4638 mov r0, r7 80098de: 4649 mov r1, r9 80098e0: f7fb f8fc bl 8004adc <__aeabi_dcmpun> 80098e4: 2800 cmp r0, #0 80098e6: f43f ae30 beq.w 800954a <_printf_float+0xc2> 80098ea: 4b01 ldr r3, [pc, #4] ; (80098f0 <_printf_float+0x468>) 80098ec: 4f01 ldr r7, [pc, #4] ; (80098f4 <_printf_float+0x46c>) 80098ee: e612 b.n 8009516 <_printf_float+0x8e> 80098f0: 0800c538 .word 0x0800c538 80098f4: 0800c53c .word 0x0800c53c 080098f8 <_printf_common>: 80098f8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80098fc: 4691 mov r9, r2 80098fe: 461f mov r7, r3 8009900: 688a ldr r2, [r1, #8] 8009902: 690b ldr r3, [r1, #16] 8009904: 4606 mov r6, r0 8009906: 4293 cmp r3, r2 8009908: bfb8 it lt 800990a: 4613 movlt r3, r2 800990c: f8c9 3000 str.w r3, [r9] 8009910: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8009914: 460c mov r4, r1 8009916: f8dd 8020 ldr.w r8, [sp, #32] 800991a: b112 cbz r2, 8009922 <_printf_common+0x2a> 800991c: 3301 adds r3, #1 800991e: f8c9 3000 str.w r3, [r9] 8009922: 6823 ldr r3, [r4, #0] 8009924: 0699 lsls r1, r3, #26 8009926: bf42 ittt mi 8009928: f8d9 3000 ldrmi.w r3, [r9] 800992c: 3302 addmi r3, #2 800992e: f8c9 3000 strmi.w r3, [r9] 8009932: 6825 ldr r5, [r4, #0] 8009934: f015 0506 ands.w r5, r5, #6 8009938: d107 bne.n 800994a <_printf_common+0x52> 800993a: f104 0a19 add.w sl, r4, #25 800993e: 68e3 ldr r3, [r4, #12] 8009940: f8d9 2000 ldr.w r2, [r9] 8009944: 1a9b subs r3, r3, r2 8009946: 429d cmp r5, r3 8009948: db2a blt.n 80099a0 <_printf_common+0xa8> 800994a: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 800994e: 6822 ldr r2, [r4, #0] 8009950: 3300 adds r3, #0 8009952: bf18 it ne 8009954: 2301 movne r3, #1 8009956: 0692 lsls r2, r2, #26 8009958: d42f bmi.n 80099ba <_printf_common+0xc2> 800995a: f104 0243 add.w r2, r4, #67 ; 0x43 800995e: 4639 mov r1, r7 8009960: 4630 mov r0, r6 8009962: 47c0 blx r8 8009964: 3001 adds r0, #1 8009966: d022 beq.n 80099ae <_printf_common+0xb6> 8009968: 6823 ldr r3, [r4, #0] 800996a: 68e5 ldr r5, [r4, #12] 800996c: f003 0306 and.w r3, r3, #6 8009970: 2b04 cmp r3, #4 8009972: bf18 it ne 8009974: 2500 movne r5, #0 8009976: f8d9 2000 ldr.w r2, [r9] 800997a: f04f 0900 mov.w r9, #0 800997e: bf08 it eq 8009980: 1aad subeq r5, r5, r2 8009982: 68a3 ldr r3, [r4, #8] 8009984: 6922 ldr r2, [r4, #16] 8009986: bf08 it eq 8009988: ea25 75e5 biceq.w r5, r5, r5, asr #31 800998c: 4293 cmp r3, r2 800998e: bfc4 itt gt 8009990: 1a9b subgt r3, r3, r2 8009992: 18ed addgt r5, r5, r3 8009994: 341a adds r4, #26 8009996: 454d cmp r5, r9 8009998: d11b bne.n 80099d2 <_printf_common+0xda> 800999a: 2000 movs r0, #0 800999c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80099a0: 2301 movs r3, #1 80099a2: 4652 mov r2, sl 80099a4: 4639 mov r1, r7 80099a6: 4630 mov r0, r6 80099a8: 47c0 blx r8 80099aa: 3001 adds r0, #1 80099ac: d103 bne.n 80099b6 <_printf_common+0xbe> 80099ae: f04f 30ff mov.w r0, #4294967295 80099b2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80099b6: 3501 adds r5, #1 80099b8: e7c1 b.n 800993e <_printf_common+0x46> 80099ba: 2030 movs r0, #48 ; 0x30 80099bc: 18e1 adds r1, r4, r3 80099be: f881 0043 strb.w r0, [r1, #67] ; 0x43 80099c2: 1c5a adds r2, r3, #1 80099c4: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 80099c8: 4422 add r2, r4 80099ca: 3302 adds r3, #2 80099cc: f882 1043 strb.w r1, [r2, #67] ; 0x43 80099d0: e7c3 b.n 800995a <_printf_common+0x62> 80099d2: 2301 movs r3, #1 80099d4: 4622 mov r2, r4 80099d6: 4639 mov r1, r7 80099d8: 4630 mov r0, r6 80099da: 47c0 blx r8 80099dc: 3001 adds r0, #1 80099de: d0e6 beq.n 80099ae <_printf_common+0xb6> 80099e0: f109 0901 add.w r9, r9, #1 80099e4: e7d7 b.n 8009996 <_printf_common+0x9e> ... 080099e8 <_printf_i>: 80099e8: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 80099ec: 4617 mov r7, r2 80099ee: 7e0a ldrb r2, [r1, #24] 80099f0: b085 sub sp, #20 80099f2: 2a6e cmp r2, #110 ; 0x6e 80099f4: 4698 mov r8, r3 80099f6: 4606 mov r6, r0 80099f8: 460c mov r4, r1 80099fa: 9b0c ldr r3, [sp, #48] ; 0x30 80099fc: f101 0e43 add.w lr, r1, #67 ; 0x43 8009a00: f000 80bc beq.w 8009b7c <_printf_i+0x194> 8009a04: d81a bhi.n 8009a3c <_printf_i+0x54> 8009a06: 2a63 cmp r2, #99 ; 0x63 8009a08: d02e beq.n 8009a68 <_printf_i+0x80> 8009a0a: d80a bhi.n 8009a22 <_printf_i+0x3a> 8009a0c: 2a00 cmp r2, #0 8009a0e: f000 80c8 beq.w 8009ba2 <_printf_i+0x1ba> 8009a12: 2a58 cmp r2, #88 ; 0x58 8009a14: f000 808a beq.w 8009b2c <_printf_i+0x144> 8009a18: f104 0542 add.w r5, r4, #66 ; 0x42 8009a1c: f884 2042 strb.w r2, [r4, #66] ; 0x42 8009a20: e02a b.n 8009a78 <_printf_i+0x90> 8009a22: 2a64 cmp r2, #100 ; 0x64 8009a24: d001 beq.n 8009a2a <_printf_i+0x42> 8009a26: 2a69 cmp r2, #105 ; 0x69 8009a28: d1f6 bne.n 8009a18 <_printf_i+0x30> 8009a2a: 6821 ldr r1, [r4, #0] 8009a2c: 681a ldr r2, [r3, #0] 8009a2e: f011 0f80 tst.w r1, #128 ; 0x80 8009a32: d023 beq.n 8009a7c <_printf_i+0x94> 8009a34: 1d11 adds r1, r2, #4 8009a36: 6019 str r1, [r3, #0] 8009a38: 6813 ldr r3, [r2, #0] 8009a3a: e027 b.n 8009a8c <_printf_i+0xa4> 8009a3c: 2a73 cmp r2, #115 ; 0x73 8009a3e: f000 80b4 beq.w 8009baa <_printf_i+0x1c2> 8009a42: d808 bhi.n 8009a56 <_printf_i+0x6e> 8009a44: 2a6f cmp r2, #111 ; 0x6f 8009a46: d02a beq.n 8009a9e <_printf_i+0xb6> 8009a48: 2a70 cmp r2, #112 ; 0x70 8009a4a: d1e5 bne.n 8009a18 <_printf_i+0x30> 8009a4c: 680a ldr r2, [r1, #0] 8009a4e: f042 0220 orr.w r2, r2, #32 8009a52: 600a str r2, [r1, #0] 8009a54: e003 b.n 8009a5e <_printf_i+0x76> 8009a56: 2a75 cmp r2, #117 ; 0x75 8009a58: d021 beq.n 8009a9e <_printf_i+0xb6> 8009a5a: 2a78 cmp r2, #120 ; 0x78 8009a5c: d1dc bne.n 8009a18 <_printf_i+0x30> 8009a5e: 2278 movs r2, #120 ; 0x78 8009a60: 496f ldr r1, [pc, #444] ; (8009c20 <_printf_i+0x238>) 8009a62: f884 2045 strb.w r2, [r4, #69] ; 0x45 8009a66: e064 b.n 8009b32 <_printf_i+0x14a> 8009a68: 681a ldr r2, [r3, #0] 8009a6a: f101 0542 add.w r5, r1, #66 ; 0x42 8009a6e: 1d11 adds r1, r2, #4 8009a70: 6019 str r1, [r3, #0] 8009a72: 6813 ldr r3, [r2, #0] 8009a74: f884 3042 strb.w r3, [r4, #66] ; 0x42 8009a78: 2301 movs r3, #1 8009a7a: e0a3 b.n 8009bc4 <_printf_i+0x1dc> 8009a7c: f011 0f40 tst.w r1, #64 ; 0x40 8009a80: f102 0104 add.w r1, r2, #4 8009a84: 6019 str r1, [r3, #0] 8009a86: d0d7 beq.n 8009a38 <_printf_i+0x50> 8009a88: f9b2 3000 ldrsh.w r3, [r2] 8009a8c: 2b00 cmp r3, #0 8009a8e: da03 bge.n 8009a98 <_printf_i+0xb0> 8009a90: 222d movs r2, #45 ; 0x2d 8009a92: 425b negs r3, r3 8009a94: f884 2043 strb.w r2, [r4, #67] ; 0x43 8009a98: 4962 ldr r1, [pc, #392] ; (8009c24 <_printf_i+0x23c>) 8009a9a: 220a movs r2, #10 8009a9c: e017 b.n 8009ace <_printf_i+0xe6> 8009a9e: 6820 ldr r0, [r4, #0] 8009aa0: 6819 ldr r1, [r3, #0] 8009aa2: f010 0f80 tst.w r0, #128 ; 0x80 8009aa6: d003 beq.n 8009ab0 <_printf_i+0xc8> 8009aa8: 1d08 adds r0, r1, #4 8009aaa: 6018 str r0, [r3, #0] 8009aac: 680b ldr r3, [r1, #0] 8009aae: e006 b.n 8009abe <_printf_i+0xd6> 8009ab0: f010 0f40 tst.w r0, #64 ; 0x40 8009ab4: f101 0004 add.w r0, r1, #4 8009ab8: 6018 str r0, [r3, #0] 8009aba: d0f7 beq.n 8009aac <_printf_i+0xc4> 8009abc: 880b ldrh r3, [r1, #0] 8009abe: 2a6f cmp r2, #111 ; 0x6f 8009ac0: bf14 ite ne 8009ac2: 220a movne r2, #10 8009ac4: 2208 moveq r2, #8 8009ac6: 4957 ldr r1, [pc, #348] ; (8009c24 <_printf_i+0x23c>) 8009ac8: 2000 movs r0, #0 8009aca: f884 0043 strb.w r0, [r4, #67] ; 0x43 8009ace: 6865 ldr r5, [r4, #4] 8009ad0: 2d00 cmp r5, #0 8009ad2: 60a5 str r5, [r4, #8] 8009ad4: f2c0 809c blt.w 8009c10 <_printf_i+0x228> 8009ad8: 6820 ldr r0, [r4, #0] 8009ada: f020 0004 bic.w r0, r0, #4 8009ade: 6020 str r0, [r4, #0] 8009ae0: 2b00 cmp r3, #0 8009ae2: d13f bne.n 8009b64 <_printf_i+0x17c> 8009ae4: 2d00 cmp r5, #0 8009ae6: f040 8095 bne.w 8009c14 <_printf_i+0x22c> 8009aea: 4675 mov r5, lr 8009aec: 2a08 cmp r2, #8 8009aee: d10b bne.n 8009b08 <_printf_i+0x120> 8009af0: 6823 ldr r3, [r4, #0] 8009af2: 07da lsls r2, r3, #31 8009af4: d508 bpl.n 8009b08 <_printf_i+0x120> 8009af6: 6923 ldr r3, [r4, #16] 8009af8: 6862 ldr r2, [r4, #4] 8009afa: 429a cmp r2, r3 8009afc: bfde ittt le 8009afe: 2330 movle r3, #48 ; 0x30 8009b00: f805 3c01 strble.w r3, [r5, #-1] 8009b04: f105 35ff addle.w r5, r5, #4294967295 8009b08: ebae 0305 sub.w r3, lr, r5 8009b0c: 6123 str r3, [r4, #16] 8009b0e: f8cd 8000 str.w r8, [sp] 8009b12: 463b mov r3, r7 8009b14: aa03 add r2, sp, #12 8009b16: 4621 mov r1, r4 8009b18: 4630 mov r0, r6 8009b1a: f7ff feed bl 80098f8 <_printf_common> 8009b1e: 3001 adds r0, #1 8009b20: d155 bne.n 8009bce <_printf_i+0x1e6> 8009b22: f04f 30ff mov.w r0, #4294967295 8009b26: b005 add sp, #20 8009b28: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8009b2c: f881 2045 strb.w r2, [r1, #69] ; 0x45 8009b30: 493c ldr r1, [pc, #240] ; (8009c24 <_printf_i+0x23c>) 8009b32: 6822 ldr r2, [r4, #0] 8009b34: 6818 ldr r0, [r3, #0] 8009b36: f012 0f80 tst.w r2, #128 ; 0x80 8009b3a: f100 0504 add.w r5, r0, #4 8009b3e: 601d str r5, [r3, #0] 8009b40: d001 beq.n 8009b46 <_printf_i+0x15e> 8009b42: 6803 ldr r3, [r0, #0] 8009b44: e002 b.n 8009b4c <_printf_i+0x164> 8009b46: 0655 lsls r5, r2, #25 8009b48: d5fb bpl.n 8009b42 <_printf_i+0x15a> 8009b4a: 8803 ldrh r3, [r0, #0] 8009b4c: 07d0 lsls r0, r2, #31 8009b4e: bf44 itt mi 8009b50: f042 0220 orrmi.w r2, r2, #32 8009b54: 6022 strmi r2, [r4, #0] 8009b56: b91b cbnz r3, 8009b60 <_printf_i+0x178> 8009b58: 6822 ldr r2, [r4, #0] 8009b5a: f022 0220 bic.w r2, r2, #32 8009b5e: 6022 str r2, [r4, #0] 8009b60: 2210 movs r2, #16 8009b62: e7b1 b.n 8009ac8 <_printf_i+0xe0> 8009b64: 4675 mov r5, lr 8009b66: fbb3 f0f2 udiv r0, r3, r2 8009b6a: fb02 3310 mls r3, r2, r0, r3 8009b6e: 5ccb ldrb r3, [r1, r3] 8009b70: f805 3d01 strb.w r3, [r5, #-1]! 8009b74: 4603 mov r3, r0 8009b76: 2800 cmp r0, #0 8009b78: d1f5 bne.n 8009b66 <_printf_i+0x17e> 8009b7a: e7b7 b.n 8009aec <_printf_i+0x104> 8009b7c: 6808 ldr r0, [r1, #0] 8009b7e: 681a ldr r2, [r3, #0] 8009b80: f010 0f80 tst.w r0, #128 ; 0x80 8009b84: 6949 ldr r1, [r1, #20] 8009b86: d004 beq.n 8009b92 <_printf_i+0x1aa> 8009b88: 1d10 adds r0, r2, #4 8009b8a: 6018 str r0, [r3, #0] 8009b8c: 6813 ldr r3, [r2, #0] 8009b8e: 6019 str r1, [r3, #0] 8009b90: e007 b.n 8009ba2 <_printf_i+0x1ba> 8009b92: f010 0f40 tst.w r0, #64 ; 0x40 8009b96: f102 0004 add.w r0, r2, #4 8009b9a: 6018 str r0, [r3, #0] 8009b9c: 6813 ldr r3, [r2, #0] 8009b9e: d0f6 beq.n 8009b8e <_printf_i+0x1a6> 8009ba0: 8019 strh r1, [r3, #0] 8009ba2: 2300 movs r3, #0 8009ba4: 4675 mov r5, lr 8009ba6: 6123 str r3, [r4, #16] 8009ba8: e7b1 b.n 8009b0e <_printf_i+0x126> 8009baa: 681a ldr r2, [r3, #0] 8009bac: 1d11 adds r1, r2, #4 8009bae: 6019 str r1, [r3, #0] 8009bb0: 6815 ldr r5, [r2, #0] 8009bb2: 2100 movs r1, #0 8009bb4: 6862 ldr r2, [r4, #4] 8009bb6: 4628 mov r0, r5 8009bb8: f001 fa80 bl 800b0bc 8009bbc: b108 cbz r0, 8009bc2 <_printf_i+0x1da> 8009bbe: 1b40 subs r0, r0, r5 8009bc0: 6060 str r0, [r4, #4] 8009bc2: 6863 ldr r3, [r4, #4] 8009bc4: 6123 str r3, [r4, #16] 8009bc6: 2300 movs r3, #0 8009bc8: f884 3043 strb.w r3, [r4, #67] ; 0x43 8009bcc: e79f b.n 8009b0e <_printf_i+0x126> 8009bce: 6923 ldr r3, [r4, #16] 8009bd0: 462a mov r2, r5 8009bd2: 4639 mov r1, r7 8009bd4: 4630 mov r0, r6 8009bd6: 47c0 blx r8 8009bd8: 3001 adds r0, #1 8009bda: d0a2 beq.n 8009b22 <_printf_i+0x13a> 8009bdc: 6823 ldr r3, [r4, #0] 8009bde: 079b lsls r3, r3, #30 8009be0: d507 bpl.n 8009bf2 <_printf_i+0x20a> 8009be2: 2500 movs r5, #0 8009be4: f104 0919 add.w r9, r4, #25 8009be8: 68e3 ldr r3, [r4, #12] 8009bea: 9a03 ldr r2, [sp, #12] 8009bec: 1a9b subs r3, r3, r2 8009bee: 429d cmp r5, r3 8009bf0: db05 blt.n 8009bfe <_printf_i+0x216> 8009bf2: 68e0 ldr r0, [r4, #12] 8009bf4: 9b03 ldr r3, [sp, #12] 8009bf6: 4298 cmp r0, r3 8009bf8: bfb8 it lt 8009bfa: 4618 movlt r0, r3 8009bfc: e793 b.n 8009b26 <_printf_i+0x13e> 8009bfe: 2301 movs r3, #1 8009c00: 464a mov r2, r9 8009c02: 4639 mov r1, r7 8009c04: 4630 mov r0, r6 8009c06: 47c0 blx r8 8009c08: 3001 adds r0, #1 8009c0a: d08a beq.n 8009b22 <_printf_i+0x13a> 8009c0c: 3501 adds r5, #1 8009c0e: e7eb b.n 8009be8 <_printf_i+0x200> 8009c10: 2b00 cmp r3, #0 8009c12: d1a7 bne.n 8009b64 <_printf_i+0x17c> 8009c14: 780b ldrb r3, [r1, #0] 8009c16: f104 0542 add.w r5, r4, #66 ; 0x42 8009c1a: f884 3042 strb.w r3, [r4, #66] ; 0x42 8009c1e: e765 b.n 8009aec <_printf_i+0x104> 8009c20: 0800c553 .word 0x0800c553 8009c24: 0800c542 .word 0x0800c542 08009c28 : 8009c28: b40f push {r0, r1, r2, r3} 8009c2a: 4b0a ldr r3, [pc, #40] ; (8009c54 ) 8009c2c: b513 push {r0, r1, r4, lr} 8009c2e: 681c ldr r4, [r3, #0] 8009c30: b124 cbz r4, 8009c3c 8009c32: 69a3 ldr r3, [r4, #24] 8009c34: b913 cbnz r3, 8009c3c 8009c36: 4620 mov r0, r4 8009c38: f001 f93c bl 800aeb4 <__sinit> 8009c3c: ab05 add r3, sp, #20 8009c3e: 9a04 ldr r2, [sp, #16] 8009c40: 68a1 ldr r1, [r4, #8] 8009c42: 4620 mov r0, r4 8009c44: 9301 str r3, [sp, #4] 8009c46: f001 fdf9 bl 800b83c <_vfiprintf_r> 8009c4a: b002 add sp, #8 8009c4c: e8bd 4010 ldmia.w sp!, {r4, lr} 8009c50: b004 add sp, #16 8009c52: 4770 bx lr 8009c54: 20000234 .word 0x20000234 08009c58 <_puts_r>: 8009c58: b570 push {r4, r5, r6, lr} 8009c5a: 460e mov r6, r1 8009c5c: 4605 mov r5, r0 8009c5e: b118 cbz r0, 8009c68 <_puts_r+0x10> 8009c60: 6983 ldr r3, [r0, #24] 8009c62: b90b cbnz r3, 8009c68 <_puts_r+0x10> 8009c64: f001 f926 bl 800aeb4 <__sinit> 8009c68: 69ab ldr r3, [r5, #24] 8009c6a: 68ac ldr r4, [r5, #8] 8009c6c: b913 cbnz r3, 8009c74 <_puts_r+0x1c> 8009c6e: 4628 mov r0, r5 8009c70: f001 f920 bl 800aeb4 <__sinit> 8009c74: 4b23 ldr r3, [pc, #140] ; (8009d04 <_puts_r+0xac>) 8009c76: 429c cmp r4, r3 8009c78: d117 bne.n 8009caa <_puts_r+0x52> 8009c7a: 686c ldr r4, [r5, #4] 8009c7c: 89a3 ldrh r3, [r4, #12] 8009c7e: 071b lsls r3, r3, #28 8009c80: d51d bpl.n 8009cbe <_puts_r+0x66> 8009c82: 6923 ldr r3, [r4, #16] 8009c84: b1db cbz r3, 8009cbe <_puts_r+0x66> 8009c86: 3e01 subs r6, #1 8009c88: 68a3 ldr r3, [r4, #8] 8009c8a: f816 1f01 ldrb.w r1, [r6, #1]! 8009c8e: 3b01 subs r3, #1 8009c90: 60a3 str r3, [r4, #8] 8009c92: b9e9 cbnz r1, 8009cd0 <_puts_r+0x78> 8009c94: 2b00 cmp r3, #0 8009c96: da2e bge.n 8009cf6 <_puts_r+0x9e> 8009c98: 4622 mov r2, r4 8009c9a: 210a movs r1, #10 8009c9c: 4628 mov r0, r5 8009c9e: f000 f8f5 bl 8009e8c <__swbuf_r> 8009ca2: 3001 adds r0, #1 8009ca4: d011 beq.n 8009cca <_puts_r+0x72> 8009ca6: 200a movs r0, #10 8009ca8: bd70 pop {r4, r5, r6, pc} 8009caa: 4b17 ldr r3, [pc, #92] ; (8009d08 <_puts_r+0xb0>) 8009cac: 429c cmp r4, r3 8009cae: d101 bne.n 8009cb4 <_puts_r+0x5c> 8009cb0: 68ac ldr r4, [r5, #8] 8009cb2: e7e3 b.n 8009c7c <_puts_r+0x24> 8009cb4: 4b15 ldr r3, [pc, #84] ; (8009d0c <_puts_r+0xb4>) 8009cb6: 429c cmp r4, r3 8009cb8: bf08 it eq 8009cba: 68ec ldreq r4, [r5, #12] 8009cbc: e7de b.n 8009c7c <_puts_r+0x24> 8009cbe: 4621 mov r1, r4 8009cc0: 4628 mov r0, r5 8009cc2: f000 f935 bl 8009f30 <__swsetup_r> 8009cc6: 2800 cmp r0, #0 8009cc8: d0dd beq.n 8009c86 <_puts_r+0x2e> 8009cca: f04f 30ff mov.w r0, #4294967295 8009cce: bd70 pop {r4, r5, r6, pc} 8009cd0: 2b00 cmp r3, #0 8009cd2: da04 bge.n 8009cde <_puts_r+0x86> 8009cd4: 69a2 ldr r2, [r4, #24] 8009cd6: 4293 cmp r3, r2 8009cd8: db06 blt.n 8009ce8 <_puts_r+0x90> 8009cda: 290a cmp r1, #10 8009cdc: d004 beq.n 8009ce8 <_puts_r+0x90> 8009cde: 6823 ldr r3, [r4, #0] 8009ce0: 1c5a adds r2, r3, #1 8009ce2: 6022 str r2, [r4, #0] 8009ce4: 7019 strb r1, [r3, #0] 8009ce6: e7cf b.n 8009c88 <_puts_r+0x30> 8009ce8: 4622 mov r2, r4 8009cea: 4628 mov r0, r5 8009cec: f000 f8ce bl 8009e8c <__swbuf_r> 8009cf0: 3001 adds r0, #1 8009cf2: d1c9 bne.n 8009c88 <_puts_r+0x30> 8009cf4: e7e9 b.n 8009cca <_puts_r+0x72> 8009cf6: 200a movs r0, #10 8009cf8: 6823 ldr r3, [r4, #0] 8009cfa: 1c5a adds r2, r3, #1 8009cfc: 6022 str r2, [r4, #0] 8009cfe: 7018 strb r0, [r3, #0] 8009d00: bd70 pop {r4, r5, r6, pc} 8009d02: bf00 nop 8009d04: 0800c594 .word 0x0800c594 8009d08: 0800c5b4 .word 0x0800c5b4 8009d0c: 0800c574 .word 0x0800c574 08009d10 : 8009d10: 4b02 ldr r3, [pc, #8] ; (8009d1c ) 8009d12: 4601 mov r1, r0 8009d14: 6818 ldr r0, [r3, #0] 8009d16: f7ff bf9f b.w 8009c58 <_puts_r> 8009d1a: bf00 nop 8009d1c: 20000234 .word 0x20000234 08009d20 : 8009d20: 2900 cmp r1, #0 8009d22: f44f 6380 mov.w r3, #1024 ; 0x400 8009d26: bf0c ite eq 8009d28: 2202 moveq r2, #2 8009d2a: 2200 movne r2, #0 8009d2c: f000 b800 b.w 8009d30 08009d30 : 8009d30: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8009d34: 461d mov r5, r3 8009d36: 4b51 ldr r3, [pc, #324] ; (8009e7c ) 8009d38: 4604 mov r4, r0 8009d3a: 681e ldr r6, [r3, #0] 8009d3c: 460f mov r7, r1 8009d3e: 4690 mov r8, r2 8009d40: b126 cbz r6, 8009d4c 8009d42: 69b3 ldr r3, [r6, #24] 8009d44: b913 cbnz r3, 8009d4c 8009d46: 4630 mov r0, r6 8009d48: f001 f8b4 bl 800aeb4 <__sinit> 8009d4c: 4b4c ldr r3, [pc, #304] ; (8009e80 ) 8009d4e: 429c cmp r4, r3 8009d50: d152 bne.n 8009df8 8009d52: 6874 ldr r4, [r6, #4] 8009d54: f1b8 0f02 cmp.w r8, #2 8009d58: d006 beq.n 8009d68 8009d5a: f1b8 0f01 cmp.w r8, #1 8009d5e: f200 8089 bhi.w 8009e74 8009d62: 2d00 cmp r5, #0 8009d64: f2c0 8086 blt.w 8009e74 8009d68: 4621 mov r1, r4 8009d6a: 4630 mov r0, r6 8009d6c: f001 f838 bl 800ade0 <_fflush_r> 8009d70: 6b61 ldr r1, [r4, #52] ; 0x34 8009d72: b141 cbz r1, 8009d86 8009d74: f104 0344 add.w r3, r4, #68 ; 0x44 8009d78: 4299 cmp r1, r3 8009d7a: d002 beq.n 8009d82 8009d7c: 4630 mov r0, r6 8009d7e: f001 fc8b bl 800b698 <_free_r> 8009d82: 2300 movs r3, #0 8009d84: 6363 str r3, [r4, #52] ; 0x34 8009d86: 2300 movs r3, #0 8009d88: 61a3 str r3, [r4, #24] 8009d8a: 6063 str r3, [r4, #4] 8009d8c: 89a3 ldrh r3, [r4, #12] 8009d8e: 061b lsls r3, r3, #24 8009d90: d503 bpl.n 8009d9a 8009d92: 6921 ldr r1, [r4, #16] 8009d94: 4630 mov r0, r6 8009d96: f001 fc7f bl 800b698 <_free_r> 8009d9a: 89a3 ldrh r3, [r4, #12] 8009d9c: f1b8 0f02 cmp.w r8, #2 8009da0: f423 634a bic.w r3, r3, #3232 ; 0xca0 8009da4: f023 0303 bic.w r3, r3, #3 8009da8: 81a3 strh r3, [r4, #12] 8009daa: d05d beq.n 8009e68 8009dac: ab01 add r3, sp, #4 8009dae: 466a mov r2, sp 8009db0: 4621 mov r1, r4 8009db2: 4630 mov r0, r6 8009db4: f001 f916 bl 800afe4 <__swhatbuf_r> 8009db8: 89a3 ldrh r3, [r4, #12] 8009dba: 4318 orrs r0, r3 8009dbc: 81a0 strh r0, [r4, #12] 8009dbe: bb2d cbnz r5, 8009e0c 8009dc0: 9d00 ldr r5, [sp, #0] 8009dc2: 4628 mov r0, r5 8009dc4: f001 f972 bl 800b0ac 8009dc8: 4607 mov r7, r0 8009dca: 2800 cmp r0, #0 8009dcc: d14e bne.n 8009e6c 8009dce: f8dd 9000 ldr.w r9, [sp] 8009dd2: 45a9 cmp r9, r5 8009dd4: d13c bne.n 8009e50 8009dd6: f04f 30ff mov.w r0, #4294967295 8009dda: 89a3 ldrh r3, [r4, #12] 8009ddc: f043 0302 orr.w r3, r3, #2 8009de0: 81a3 strh r3, [r4, #12] 8009de2: 2300 movs r3, #0 8009de4: 60a3 str r3, [r4, #8] 8009de6: f104 0347 add.w r3, r4, #71 ; 0x47 8009dea: 6023 str r3, [r4, #0] 8009dec: 6123 str r3, [r4, #16] 8009dee: 2301 movs r3, #1 8009df0: 6163 str r3, [r4, #20] 8009df2: b003 add sp, #12 8009df4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8009df8: 4b22 ldr r3, [pc, #136] ; (8009e84 ) 8009dfa: 429c cmp r4, r3 8009dfc: d101 bne.n 8009e02 8009dfe: 68b4 ldr r4, [r6, #8] 8009e00: e7a8 b.n 8009d54 8009e02: 4b21 ldr r3, [pc, #132] ; (8009e88 ) 8009e04: 429c cmp r4, r3 8009e06: bf08 it eq 8009e08: 68f4 ldreq r4, [r6, #12] 8009e0a: e7a3 b.n 8009d54 8009e0c: 2f00 cmp r7, #0 8009e0e: d0d8 beq.n 8009dc2 8009e10: 69b3 ldr r3, [r6, #24] 8009e12: b913 cbnz r3, 8009e1a 8009e14: 4630 mov r0, r6 8009e16: f001 f84d bl 800aeb4 <__sinit> 8009e1a: f1b8 0f01 cmp.w r8, #1 8009e1e: bf08 it eq 8009e20: 89a3 ldrheq r3, [r4, #12] 8009e22: 6027 str r7, [r4, #0] 8009e24: bf04 itt eq 8009e26: f043 0301 orreq.w r3, r3, #1 8009e2a: 81a3 strheq r3, [r4, #12] 8009e2c: 89a3 ldrh r3, [r4, #12] 8009e2e: 6127 str r7, [r4, #16] 8009e30: f013 0008 ands.w r0, r3, #8 8009e34: 6165 str r5, [r4, #20] 8009e36: d01b beq.n 8009e70 8009e38: f013 0001 ands.w r0, r3, #1 8009e3c: f04f 0300 mov.w r3, #0 8009e40: bf1f itttt ne 8009e42: 426d negne r5, r5 8009e44: 60a3 strne r3, [r4, #8] 8009e46: 61a5 strne r5, [r4, #24] 8009e48: 4618 movne r0, r3 8009e4a: bf08 it eq 8009e4c: 60a5 streq r5, [r4, #8] 8009e4e: e7d0 b.n 8009df2 8009e50: 4648 mov r0, r9 8009e52: f001 f92b bl 800b0ac 8009e56: 4607 mov r7, r0 8009e58: 2800 cmp r0, #0 8009e5a: d0bc beq.n 8009dd6 8009e5c: 89a3 ldrh r3, [r4, #12] 8009e5e: 464d mov r5, r9 8009e60: f043 0380 orr.w r3, r3, #128 ; 0x80 8009e64: 81a3 strh r3, [r4, #12] 8009e66: e7d3 b.n 8009e10 8009e68: 2000 movs r0, #0 8009e6a: e7b6 b.n 8009dda 8009e6c: 46a9 mov r9, r5 8009e6e: e7f5 b.n 8009e5c 8009e70: 60a0 str r0, [r4, #8] 8009e72: e7be b.n 8009df2 8009e74: f04f 30ff mov.w r0, #4294967295 8009e78: e7bb b.n 8009df2 8009e7a: bf00 nop 8009e7c: 20000234 .word 0x20000234 8009e80: 0800c594 .word 0x0800c594 8009e84: 0800c5b4 .word 0x0800c5b4 8009e88: 0800c574 .word 0x0800c574 08009e8c <__swbuf_r>: 8009e8c: b5f8 push {r3, r4, r5, r6, r7, lr} 8009e8e: 460e mov r6, r1 8009e90: 4614 mov r4, r2 8009e92: 4605 mov r5, r0 8009e94: b118 cbz r0, 8009e9e <__swbuf_r+0x12> 8009e96: 6983 ldr r3, [r0, #24] 8009e98: b90b cbnz r3, 8009e9e <__swbuf_r+0x12> 8009e9a: f001 f80b bl 800aeb4 <__sinit> 8009e9e: 4b21 ldr r3, [pc, #132] ; (8009f24 <__swbuf_r+0x98>) 8009ea0: 429c cmp r4, r3 8009ea2: d12a bne.n 8009efa <__swbuf_r+0x6e> 8009ea4: 686c ldr r4, [r5, #4] 8009ea6: 69a3 ldr r3, [r4, #24] 8009ea8: 60a3 str r3, [r4, #8] 8009eaa: 89a3 ldrh r3, [r4, #12] 8009eac: 071a lsls r2, r3, #28 8009eae: d52e bpl.n 8009f0e <__swbuf_r+0x82> 8009eb0: 6923 ldr r3, [r4, #16] 8009eb2: b363 cbz r3, 8009f0e <__swbuf_r+0x82> 8009eb4: 6923 ldr r3, [r4, #16] 8009eb6: 6820 ldr r0, [r4, #0] 8009eb8: b2f6 uxtb r6, r6 8009eba: 1ac0 subs r0, r0, r3 8009ebc: 6963 ldr r3, [r4, #20] 8009ebe: 4637 mov r7, r6 8009ec0: 4298 cmp r0, r3 8009ec2: db04 blt.n 8009ece <__swbuf_r+0x42> 8009ec4: 4621 mov r1, r4 8009ec6: 4628 mov r0, r5 8009ec8: f000 ff8a bl 800ade0 <_fflush_r> 8009ecc: bb28 cbnz r0, 8009f1a <__swbuf_r+0x8e> 8009ece: 68a3 ldr r3, [r4, #8] 8009ed0: 3001 adds r0, #1 8009ed2: 3b01 subs r3, #1 8009ed4: 60a3 str r3, [r4, #8] 8009ed6: 6823 ldr r3, [r4, #0] 8009ed8: 1c5a adds r2, r3, #1 8009eda: 6022 str r2, [r4, #0] 8009edc: 701e strb r6, [r3, #0] 8009ede: 6963 ldr r3, [r4, #20] 8009ee0: 4298 cmp r0, r3 8009ee2: d004 beq.n 8009eee <__swbuf_r+0x62> 8009ee4: 89a3 ldrh r3, [r4, #12] 8009ee6: 07db lsls r3, r3, #31 8009ee8: d519 bpl.n 8009f1e <__swbuf_r+0x92> 8009eea: 2e0a cmp r6, #10 8009eec: d117 bne.n 8009f1e <__swbuf_r+0x92> 8009eee: 4621 mov r1, r4 8009ef0: 4628 mov r0, r5 8009ef2: f000 ff75 bl 800ade0 <_fflush_r> 8009ef6: b190 cbz r0, 8009f1e <__swbuf_r+0x92> 8009ef8: e00f b.n 8009f1a <__swbuf_r+0x8e> 8009efa: 4b0b ldr r3, [pc, #44] ; (8009f28 <__swbuf_r+0x9c>) 8009efc: 429c cmp r4, r3 8009efe: d101 bne.n 8009f04 <__swbuf_r+0x78> 8009f00: 68ac ldr r4, [r5, #8] 8009f02: e7d0 b.n 8009ea6 <__swbuf_r+0x1a> 8009f04: 4b09 ldr r3, [pc, #36] ; (8009f2c <__swbuf_r+0xa0>) 8009f06: 429c cmp r4, r3 8009f08: bf08 it eq 8009f0a: 68ec ldreq r4, [r5, #12] 8009f0c: e7cb b.n 8009ea6 <__swbuf_r+0x1a> 8009f0e: 4621 mov r1, r4 8009f10: 4628 mov r0, r5 8009f12: f000 f80d bl 8009f30 <__swsetup_r> 8009f16: 2800 cmp r0, #0 8009f18: d0cc beq.n 8009eb4 <__swbuf_r+0x28> 8009f1a: f04f 37ff mov.w r7, #4294967295 8009f1e: 4638 mov r0, r7 8009f20: bdf8 pop {r3, r4, r5, r6, r7, pc} 8009f22: bf00 nop 8009f24: 0800c594 .word 0x0800c594 8009f28: 0800c5b4 .word 0x0800c5b4 8009f2c: 0800c574 .word 0x0800c574 08009f30 <__swsetup_r>: 8009f30: 4b32 ldr r3, [pc, #200] ; (8009ffc <__swsetup_r+0xcc>) 8009f32: b570 push {r4, r5, r6, lr} 8009f34: 681d ldr r5, [r3, #0] 8009f36: 4606 mov r6, r0 8009f38: 460c mov r4, r1 8009f3a: b125 cbz r5, 8009f46 <__swsetup_r+0x16> 8009f3c: 69ab ldr r3, [r5, #24] 8009f3e: b913 cbnz r3, 8009f46 <__swsetup_r+0x16> 8009f40: 4628 mov r0, r5 8009f42: f000 ffb7 bl 800aeb4 <__sinit> 8009f46: 4b2e ldr r3, [pc, #184] ; (800a000 <__swsetup_r+0xd0>) 8009f48: 429c cmp r4, r3 8009f4a: d10f bne.n 8009f6c <__swsetup_r+0x3c> 8009f4c: 686c ldr r4, [r5, #4] 8009f4e: f9b4 300c ldrsh.w r3, [r4, #12] 8009f52: b29a uxth r2, r3 8009f54: 0715 lsls r5, r2, #28 8009f56: d42c bmi.n 8009fb2 <__swsetup_r+0x82> 8009f58: 06d0 lsls r0, r2, #27 8009f5a: d411 bmi.n 8009f80 <__swsetup_r+0x50> 8009f5c: 2209 movs r2, #9 8009f5e: 6032 str r2, [r6, #0] 8009f60: f043 0340 orr.w r3, r3, #64 ; 0x40 8009f64: 81a3 strh r3, [r4, #12] 8009f66: f04f 30ff mov.w r0, #4294967295 8009f6a: bd70 pop {r4, r5, r6, pc} 8009f6c: 4b25 ldr r3, [pc, #148] ; (800a004 <__swsetup_r+0xd4>) 8009f6e: 429c cmp r4, r3 8009f70: d101 bne.n 8009f76 <__swsetup_r+0x46> 8009f72: 68ac ldr r4, [r5, #8] 8009f74: e7eb b.n 8009f4e <__swsetup_r+0x1e> 8009f76: 4b24 ldr r3, [pc, #144] ; (800a008 <__swsetup_r+0xd8>) 8009f78: 429c cmp r4, r3 8009f7a: bf08 it eq 8009f7c: 68ec ldreq r4, [r5, #12] 8009f7e: e7e6 b.n 8009f4e <__swsetup_r+0x1e> 8009f80: 0751 lsls r1, r2, #29 8009f82: d512 bpl.n 8009faa <__swsetup_r+0x7a> 8009f84: 6b61 ldr r1, [r4, #52] ; 0x34 8009f86: b141 cbz r1, 8009f9a <__swsetup_r+0x6a> 8009f88: f104 0344 add.w r3, r4, #68 ; 0x44 8009f8c: 4299 cmp r1, r3 8009f8e: d002 beq.n 8009f96 <__swsetup_r+0x66> 8009f90: 4630 mov r0, r6 8009f92: f001 fb81 bl 800b698 <_free_r> 8009f96: 2300 movs r3, #0 8009f98: 6363 str r3, [r4, #52] ; 0x34 8009f9a: 89a3 ldrh r3, [r4, #12] 8009f9c: f023 0324 bic.w r3, r3, #36 ; 0x24 8009fa0: 81a3 strh r3, [r4, #12] 8009fa2: 2300 movs r3, #0 8009fa4: 6063 str r3, [r4, #4] 8009fa6: 6923 ldr r3, [r4, #16] 8009fa8: 6023 str r3, [r4, #0] 8009faa: 89a3 ldrh r3, [r4, #12] 8009fac: f043 0308 orr.w r3, r3, #8 8009fb0: 81a3 strh r3, [r4, #12] 8009fb2: 6923 ldr r3, [r4, #16] 8009fb4: b94b cbnz r3, 8009fca <__swsetup_r+0x9a> 8009fb6: 89a3 ldrh r3, [r4, #12] 8009fb8: f403 7320 and.w r3, r3, #640 ; 0x280 8009fbc: f5b3 7f00 cmp.w r3, #512 ; 0x200 8009fc0: d003 beq.n 8009fca <__swsetup_r+0x9a> 8009fc2: 4621 mov r1, r4 8009fc4: 4630 mov r0, r6 8009fc6: f001 f831 bl 800b02c <__smakebuf_r> 8009fca: 89a2 ldrh r2, [r4, #12] 8009fcc: f012 0301 ands.w r3, r2, #1 8009fd0: d00c beq.n 8009fec <__swsetup_r+0xbc> 8009fd2: 2300 movs r3, #0 8009fd4: 60a3 str r3, [r4, #8] 8009fd6: 6963 ldr r3, [r4, #20] 8009fd8: 425b negs r3, r3 8009fda: 61a3 str r3, [r4, #24] 8009fdc: 6923 ldr r3, [r4, #16] 8009fde: b953 cbnz r3, 8009ff6 <__swsetup_r+0xc6> 8009fe0: f9b4 300c ldrsh.w r3, [r4, #12] 8009fe4: f013 0080 ands.w r0, r3, #128 ; 0x80 8009fe8: d1ba bne.n 8009f60 <__swsetup_r+0x30> 8009fea: bd70 pop {r4, r5, r6, pc} 8009fec: 0792 lsls r2, r2, #30 8009fee: bf58 it pl 8009ff0: 6963 ldrpl r3, [r4, #20] 8009ff2: 60a3 str r3, [r4, #8] 8009ff4: e7f2 b.n 8009fdc <__swsetup_r+0xac> 8009ff6: 2000 movs r0, #0 8009ff8: e7f7 b.n 8009fea <__swsetup_r+0xba> 8009ffa: bf00 nop 8009ffc: 20000234 .word 0x20000234 800a000: 0800c594 .word 0x0800c594 800a004: 0800c5b4 .word 0x0800c5b4 800a008: 0800c574 .word 0x0800c574 0800a00c : 800a00c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800a010: 6903 ldr r3, [r0, #16] 800a012: 690c ldr r4, [r1, #16] 800a014: 4680 mov r8, r0 800a016: 429c cmp r4, r3 800a018: f300 8082 bgt.w 800a120 800a01c: 3c01 subs r4, #1 800a01e: f101 0714 add.w r7, r1, #20 800a022: f100 0614 add.w r6, r0, #20 800a026: f857 5024 ldr.w r5, [r7, r4, lsl #2] 800a02a: f856 0024 ldr.w r0, [r6, r4, lsl #2] 800a02e: 3501 adds r5, #1 800a030: fbb0 f5f5 udiv r5, r0, r5 800a034: ea4f 0e84 mov.w lr, r4, lsl #2 800a038: eb06 030e add.w r3, r6, lr 800a03c: eb07 090e add.w r9, r7, lr 800a040: 9301 str r3, [sp, #4] 800a042: b38d cbz r5, 800a0a8 800a044: f04f 0a00 mov.w sl, #0 800a048: 4638 mov r0, r7 800a04a: 46b4 mov ip, r6 800a04c: 46d3 mov fp, sl 800a04e: f850 2b04 ldr.w r2, [r0], #4 800a052: b293 uxth r3, r2 800a054: fb05 a303 mla r3, r5, r3, sl 800a058: 0c12 lsrs r2, r2, #16 800a05a: ea4f 4a13 mov.w sl, r3, lsr #16 800a05e: fb05 a202 mla r2, r5, r2, sl 800a062: b29b uxth r3, r3 800a064: ebab 0303 sub.w r3, fp, r3 800a068: f8bc b000 ldrh.w fp, [ip] 800a06c: ea4f 4a12 mov.w sl, r2, lsr #16 800a070: 445b add r3, fp 800a072: fa1f fb82 uxth.w fp, r2 800a076: f8dc 2000 ldr.w r2, [ip] 800a07a: 4581 cmp r9, r0 800a07c: ebcb 4212 rsb r2, fp, r2, lsr #16 800a080: eb02 4223 add.w r2, r2, r3, asr #16 800a084: b29b uxth r3, r3 800a086: ea43 4302 orr.w r3, r3, r2, lsl #16 800a08a: ea4f 4b22 mov.w fp, r2, asr #16 800a08e: f84c 3b04 str.w r3, [ip], #4 800a092: d2dc bcs.n 800a04e 800a094: f856 300e ldr.w r3, [r6, lr] 800a098: b933 cbnz r3, 800a0a8 800a09a: 9b01 ldr r3, [sp, #4] 800a09c: 3b04 subs r3, #4 800a09e: 429e cmp r6, r3 800a0a0: 461a mov r2, r3 800a0a2: d331 bcc.n 800a108 800a0a4: f8c8 4010 str.w r4, [r8, #16] 800a0a8: 4640 mov r0, r8 800a0aa: f001 fa1e bl 800b4ea <__mcmp> 800a0ae: 2800 cmp r0, #0 800a0b0: db26 blt.n 800a100 800a0b2: 4630 mov r0, r6 800a0b4: f04f 0e00 mov.w lr, #0 800a0b8: 3501 adds r5, #1 800a0ba: f857 1b04 ldr.w r1, [r7], #4 800a0be: f8d0 c000 ldr.w ip, [r0] 800a0c2: b28b uxth r3, r1 800a0c4: ebae 0303 sub.w r3, lr, r3 800a0c8: fa1f f28c uxth.w r2, ip 800a0cc: 4413 add r3, r2 800a0ce: 0c0a lsrs r2, r1, #16 800a0d0: ebc2 421c rsb r2, r2, ip, lsr #16 800a0d4: eb02 4223 add.w r2, r2, r3, asr #16 800a0d8: b29b uxth r3, r3 800a0da: ea43 4302 orr.w r3, r3, r2, lsl #16 800a0de: 45b9 cmp r9, r7 800a0e0: ea4f 4e22 mov.w lr, r2, asr #16 800a0e4: f840 3b04 str.w r3, [r0], #4 800a0e8: d2e7 bcs.n 800a0ba 800a0ea: f856 2024 ldr.w r2, [r6, r4, lsl #2] 800a0ee: eb06 0384 add.w r3, r6, r4, lsl #2 800a0f2: b92a cbnz r2, 800a100 800a0f4: 3b04 subs r3, #4 800a0f6: 429e cmp r6, r3 800a0f8: 461a mov r2, r3 800a0fa: d30b bcc.n 800a114 800a0fc: f8c8 4010 str.w r4, [r8, #16] 800a100: 4628 mov r0, r5 800a102: b003 add sp, #12 800a104: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800a108: 6812 ldr r2, [r2, #0] 800a10a: 3b04 subs r3, #4 800a10c: 2a00 cmp r2, #0 800a10e: d1c9 bne.n 800a0a4 800a110: 3c01 subs r4, #1 800a112: e7c4 b.n 800a09e 800a114: 6812 ldr r2, [r2, #0] 800a116: 3b04 subs r3, #4 800a118: 2a00 cmp r2, #0 800a11a: d1ef bne.n 800a0fc 800a11c: 3c01 subs r4, #1 800a11e: e7ea b.n 800a0f6 800a120: 2000 movs r0, #0 800a122: e7ee b.n 800a102 800a124: 0000 movs r0, r0 ... 0800a128 <_dtoa_r>: 800a128: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800a12c: 6a46 ldr r6, [r0, #36] ; 0x24 800a12e: b095 sub sp, #84 ; 0x54 800a130: 4604 mov r4, r0 800a132: 9d21 ldr r5, [sp, #132] ; 0x84 800a134: e9cd 2302 strd r2, r3, [sp, #8] 800a138: b93e cbnz r6, 800a14a <_dtoa_r+0x22> 800a13a: 2010 movs r0, #16 800a13c: f000 ffb6 bl 800b0ac 800a140: 6260 str r0, [r4, #36] ; 0x24 800a142: 6046 str r6, [r0, #4] 800a144: 6086 str r6, [r0, #8] 800a146: 6006 str r6, [r0, #0] 800a148: 60c6 str r6, [r0, #12] 800a14a: 6a63 ldr r3, [r4, #36] ; 0x24 800a14c: 6819 ldr r1, [r3, #0] 800a14e: b151 cbz r1, 800a166 <_dtoa_r+0x3e> 800a150: 685a ldr r2, [r3, #4] 800a152: 2301 movs r3, #1 800a154: 4093 lsls r3, r2 800a156: 604a str r2, [r1, #4] 800a158: 608b str r3, [r1, #8] 800a15a: 4620 mov r0, r4 800a15c: f000 fff0 bl 800b140 <_Bfree> 800a160: 2200 movs r2, #0 800a162: 6a63 ldr r3, [r4, #36] ; 0x24 800a164: 601a str r2, [r3, #0] 800a166: 9b03 ldr r3, [sp, #12] 800a168: 2b00 cmp r3, #0 800a16a: bfb7 itett lt 800a16c: 2301 movlt r3, #1 800a16e: 2300 movge r3, #0 800a170: 602b strlt r3, [r5, #0] 800a172: 9b03 ldrlt r3, [sp, #12] 800a174: bfae itee ge 800a176: 602b strge r3, [r5, #0] 800a178: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000 800a17c: 9303 strlt r3, [sp, #12] 800a17e: f8dd 900c ldr.w r9, [sp, #12] 800a182: 4bab ldr r3, [pc, #684] ; (800a430 <_dtoa_r+0x308>) 800a184: ea33 0309 bics.w r3, r3, r9 800a188: d11b bne.n 800a1c2 <_dtoa_r+0x9a> 800a18a: f242 730f movw r3, #9999 ; 0x270f 800a18e: 9a20 ldr r2, [sp, #128] ; 0x80 800a190: 6013 str r3, [r2, #0] 800a192: 9b02 ldr r3, [sp, #8] 800a194: b923 cbnz r3, 800a1a0 <_dtoa_r+0x78> 800a196: f3c9 0013 ubfx r0, r9, #0, #20 800a19a: 2800 cmp r0, #0 800a19c: f000 8583 beq.w 800aca6 <_dtoa_r+0xb7e> 800a1a0: 9b22 ldr r3, [sp, #136] ; 0x88 800a1a2: b953 cbnz r3, 800a1ba <_dtoa_r+0x92> 800a1a4: 4ba3 ldr r3, [pc, #652] ; (800a434 <_dtoa_r+0x30c>) 800a1a6: e021 b.n 800a1ec <_dtoa_r+0xc4> 800a1a8: 4ba3 ldr r3, [pc, #652] ; (800a438 <_dtoa_r+0x310>) 800a1aa: 9306 str r3, [sp, #24] 800a1ac: 3308 adds r3, #8 800a1ae: 9a22 ldr r2, [sp, #136] ; 0x88 800a1b0: 6013 str r3, [r2, #0] 800a1b2: 9806 ldr r0, [sp, #24] 800a1b4: b015 add sp, #84 ; 0x54 800a1b6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800a1ba: 4b9e ldr r3, [pc, #632] ; (800a434 <_dtoa_r+0x30c>) 800a1bc: 9306 str r3, [sp, #24] 800a1be: 3303 adds r3, #3 800a1c0: e7f5 b.n 800a1ae <_dtoa_r+0x86> 800a1c2: e9dd 6702 ldrd r6, r7, [sp, #8] 800a1c6: 2200 movs r2, #0 800a1c8: 2300 movs r3, #0 800a1ca: 4630 mov r0, r6 800a1cc: 4639 mov r1, r7 800a1ce: f7fa fc53 bl 8004a78 <__aeabi_dcmpeq> 800a1d2: 4680 mov r8, r0 800a1d4: b160 cbz r0, 800a1f0 <_dtoa_r+0xc8> 800a1d6: 2301 movs r3, #1 800a1d8: 9a20 ldr r2, [sp, #128] ; 0x80 800a1da: 6013 str r3, [r2, #0] 800a1dc: 9b22 ldr r3, [sp, #136] ; 0x88 800a1de: 2b00 cmp r3, #0 800a1e0: f000 855e beq.w 800aca0 <_dtoa_r+0xb78> 800a1e4: 4b95 ldr r3, [pc, #596] ; (800a43c <_dtoa_r+0x314>) 800a1e6: 9a22 ldr r2, [sp, #136] ; 0x88 800a1e8: 6013 str r3, [r2, #0] 800a1ea: 3b01 subs r3, #1 800a1ec: 9306 str r3, [sp, #24] 800a1ee: e7e0 b.n 800a1b2 <_dtoa_r+0x8a> 800a1f0: ab12 add r3, sp, #72 ; 0x48 800a1f2: 9301 str r3, [sp, #4] 800a1f4: ab13 add r3, sp, #76 ; 0x4c 800a1f6: 9300 str r3, [sp, #0] 800a1f8: 4632 mov r2, r6 800a1fa: 463b mov r3, r7 800a1fc: 4620 mov r0, r4 800a1fe: f001 f9ed bl 800b5dc <__d2b> 800a202: f3c9 550a ubfx r5, r9, #20, #11 800a206: 4682 mov sl, r0 800a208: 2d00 cmp r5, #0 800a20a: d07d beq.n 800a308 <_dtoa_r+0x1e0> 800a20c: 4630 mov r0, r6 800a20e: f3c7 0313 ubfx r3, r7, #0, #20 800a212: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000 800a216: f441 1140 orr.w r1, r1, #3145728 ; 0x300000 800a21a: f2a5 35ff subw r5, r5, #1023 ; 0x3ff 800a21e: f8cd 8040 str.w r8, [sp, #64] ; 0x40 800a222: 2200 movs r2, #0 800a224: 4b86 ldr r3, [pc, #536] ; (800a440 <_dtoa_r+0x318>) 800a226: f7fa f80b bl 8004240 <__aeabi_dsub> 800a22a: a37b add r3, pc, #492 ; (adr r3, 800a418 <_dtoa_r+0x2f0>) 800a22c: e9d3 2300 ldrd r2, r3, [r3] 800a230: f7fa f9ba bl 80045a8 <__aeabi_dmul> 800a234: a37a add r3, pc, #488 ; (adr r3, 800a420 <_dtoa_r+0x2f8>) 800a236: e9d3 2300 ldrd r2, r3, [r3] 800a23a: f7fa f803 bl 8004244 <__adddf3> 800a23e: 4606 mov r6, r0 800a240: 4628 mov r0, r5 800a242: 460f mov r7, r1 800a244: f7fa f94a bl 80044dc <__aeabi_i2d> 800a248: a377 add r3, pc, #476 ; (adr r3, 800a428 <_dtoa_r+0x300>) 800a24a: e9d3 2300 ldrd r2, r3, [r3] 800a24e: f7fa f9ab bl 80045a8 <__aeabi_dmul> 800a252: 4602 mov r2, r0 800a254: 460b mov r3, r1 800a256: 4630 mov r0, r6 800a258: 4639 mov r1, r7 800a25a: f7f9 fff3 bl 8004244 <__adddf3> 800a25e: 4606 mov r6, r0 800a260: 460f mov r7, r1 800a262: f7fa fc51 bl 8004b08 <__aeabi_d2iz> 800a266: 2200 movs r2, #0 800a268: 4683 mov fp, r0 800a26a: 2300 movs r3, #0 800a26c: 4630 mov r0, r6 800a26e: 4639 mov r1, r7 800a270: f7fa fc0c bl 8004a8c <__aeabi_dcmplt> 800a274: b158 cbz r0, 800a28e <_dtoa_r+0x166> 800a276: 4658 mov r0, fp 800a278: f7fa f930 bl 80044dc <__aeabi_i2d> 800a27c: 4602 mov r2, r0 800a27e: 460b mov r3, r1 800a280: 4630 mov r0, r6 800a282: 4639 mov r1, r7 800a284: f7fa fbf8 bl 8004a78 <__aeabi_dcmpeq> 800a288: b908 cbnz r0, 800a28e <_dtoa_r+0x166> 800a28a: f10b 3bff add.w fp, fp, #4294967295 800a28e: f1bb 0f16 cmp.w fp, #22 800a292: d858 bhi.n 800a346 <_dtoa_r+0x21e> 800a294: e9dd 2302 ldrd r2, r3, [sp, #8] 800a298: 496a ldr r1, [pc, #424] ; (800a444 <_dtoa_r+0x31c>) 800a29a: eb01 01cb add.w r1, r1, fp, lsl #3 800a29e: e9d1 0100 ldrd r0, r1, [r1] 800a2a2: f7fa fc11 bl 8004ac8 <__aeabi_dcmpgt> 800a2a6: 2800 cmp r0, #0 800a2a8: d04f beq.n 800a34a <_dtoa_r+0x222> 800a2aa: 2300 movs r3, #0 800a2ac: f10b 3bff add.w fp, fp, #4294967295 800a2b0: 930d str r3, [sp, #52] ; 0x34 800a2b2: 9b12 ldr r3, [sp, #72] ; 0x48 800a2b4: 1b5d subs r5, r3, r5 800a2b6: 1e6b subs r3, r5, #1 800a2b8: 9307 str r3, [sp, #28] 800a2ba: bf43 ittte mi 800a2bc: 2300 movmi r3, #0 800a2be: f1c5 0801 rsbmi r8, r5, #1 800a2c2: 9307 strmi r3, [sp, #28] 800a2c4: f04f 0800 movpl.w r8, #0 800a2c8: f1bb 0f00 cmp.w fp, #0 800a2cc: db3f blt.n 800a34e <_dtoa_r+0x226> 800a2ce: 9b07 ldr r3, [sp, #28] 800a2d0: f8cd b030 str.w fp, [sp, #48] ; 0x30 800a2d4: 445b add r3, fp 800a2d6: 9307 str r3, [sp, #28] 800a2d8: 2300 movs r3, #0 800a2da: 9308 str r3, [sp, #32] 800a2dc: 9b1e ldr r3, [sp, #120] ; 0x78 800a2de: 2b09 cmp r3, #9 800a2e0: f200 80b4 bhi.w 800a44c <_dtoa_r+0x324> 800a2e4: 2b05 cmp r3, #5 800a2e6: bfc4 itt gt 800a2e8: 3b04 subgt r3, #4 800a2ea: 931e strgt r3, [sp, #120] ; 0x78 800a2ec: 9b1e ldr r3, [sp, #120] ; 0x78 800a2ee: bfc8 it gt 800a2f0: 2600 movgt r6, #0 800a2f2: f1a3 0302 sub.w r3, r3, #2 800a2f6: bfd8 it le 800a2f8: 2601 movle r6, #1 800a2fa: 2b03 cmp r3, #3 800a2fc: f200 80b2 bhi.w 800a464 <_dtoa_r+0x33c> 800a300: e8df f003 tbb [pc, r3] 800a304: 782d8684 .word 0x782d8684 800a308: 9b13 ldr r3, [sp, #76] ; 0x4c 800a30a: 9d12 ldr r5, [sp, #72] ; 0x48 800a30c: 441d add r5, r3 800a30e: f205 4332 addw r3, r5, #1074 ; 0x432 800a312: 2b20 cmp r3, #32 800a314: dd11 ble.n 800a33a <_dtoa_r+0x212> 800a316: 9a02 ldr r2, [sp, #8] 800a318: f205 4012 addw r0, r5, #1042 ; 0x412 800a31c: f1c3 0340 rsb r3, r3, #64 ; 0x40 800a320: fa22 f000 lsr.w r0, r2, r0 800a324: fa09 f303 lsl.w r3, r9, r3 800a328: 4318 orrs r0, r3 800a32a: f7fa f8c7 bl 80044bc <__aeabi_ui2d> 800a32e: 2301 movs r3, #1 800a330: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000 800a334: 3d01 subs r5, #1 800a336: 9310 str r3, [sp, #64] ; 0x40 800a338: e773 b.n 800a222 <_dtoa_r+0xfa> 800a33a: f1c3 0020 rsb r0, r3, #32 800a33e: 9b02 ldr r3, [sp, #8] 800a340: fa03 f000 lsl.w r0, r3, r0 800a344: e7f1 b.n 800a32a <_dtoa_r+0x202> 800a346: 2301 movs r3, #1 800a348: e7b2 b.n 800a2b0 <_dtoa_r+0x188> 800a34a: 900d str r0, [sp, #52] ; 0x34 800a34c: e7b1 b.n 800a2b2 <_dtoa_r+0x18a> 800a34e: f1cb 0300 rsb r3, fp, #0 800a352: 9308 str r3, [sp, #32] 800a354: 2300 movs r3, #0 800a356: eba8 080b sub.w r8, r8, fp 800a35a: 930c str r3, [sp, #48] ; 0x30 800a35c: e7be b.n 800a2dc <_dtoa_r+0x1b4> 800a35e: 2301 movs r3, #1 800a360: 9309 str r3, [sp, #36] ; 0x24 800a362: 9b1f ldr r3, [sp, #124] ; 0x7c 800a364: 2b00 cmp r3, #0 800a366: f340 8080 ble.w 800a46a <_dtoa_r+0x342> 800a36a: 4699 mov r9, r3 800a36c: 9304 str r3, [sp, #16] 800a36e: 2200 movs r2, #0 800a370: 2104 movs r1, #4 800a372: 6a65 ldr r5, [r4, #36] ; 0x24 800a374: 606a str r2, [r5, #4] 800a376: f101 0214 add.w r2, r1, #20 800a37a: 429a cmp r2, r3 800a37c: d97a bls.n 800a474 <_dtoa_r+0x34c> 800a37e: 6869 ldr r1, [r5, #4] 800a380: 4620 mov r0, r4 800a382: f000 fea9 bl 800b0d8 <_Balloc> 800a386: 6a63 ldr r3, [r4, #36] ; 0x24 800a388: 6028 str r0, [r5, #0] 800a38a: 681b ldr r3, [r3, #0] 800a38c: f1b9 0f0e cmp.w r9, #14 800a390: 9306 str r3, [sp, #24] 800a392: f200 80f0 bhi.w 800a576 <_dtoa_r+0x44e> 800a396: 2e00 cmp r6, #0 800a398: f000 80ed beq.w 800a576 <_dtoa_r+0x44e> 800a39c: e9dd 2302 ldrd r2, r3, [sp, #8] 800a3a0: f1bb 0f00 cmp.w fp, #0 800a3a4: e9cd 230e strd r2, r3, [sp, #56] ; 0x38 800a3a8: dd79 ble.n 800a49e <_dtoa_r+0x376> 800a3aa: 4a26 ldr r2, [pc, #152] ; (800a444 <_dtoa_r+0x31c>) 800a3ac: f00b 030f and.w r3, fp, #15 800a3b0: ea4f 162b mov.w r6, fp, asr #4 800a3b4: eb02 03c3 add.w r3, r2, r3, lsl #3 800a3b8: 06f0 lsls r0, r6, #27 800a3ba: e9d3 2300 ldrd r2, r3, [r3] 800a3be: e9cd 230a strd r2, r3, [sp, #40] ; 0x28 800a3c2: d55c bpl.n 800a47e <_dtoa_r+0x356> 800a3c4: e9dd 010e ldrd r0, r1, [sp, #56] ; 0x38 800a3c8: 4b1f ldr r3, [pc, #124] ; (800a448 <_dtoa_r+0x320>) 800a3ca: 2503 movs r5, #3 800a3cc: e9d3 2308 ldrd r2, r3, [r3, #32] 800a3d0: f7fa fa14 bl 80047fc <__aeabi_ddiv> 800a3d4: e9cd 0102 strd r0, r1, [sp, #8] 800a3d8: f006 060f and.w r6, r6, #15 800a3dc: 4f1a ldr r7, [pc, #104] ; (800a448 <_dtoa_r+0x320>) 800a3de: 2e00 cmp r6, #0 800a3e0: d14f bne.n 800a482 <_dtoa_r+0x35a> 800a3e2: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a3e6: e9dd 0102 ldrd r0, r1, [sp, #8] 800a3ea: f7fa fa07 bl 80047fc <__aeabi_ddiv> 800a3ee: e9cd 0102 strd r0, r1, [sp, #8] 800a3f2: e06e b.n 800a4d2 <_dtoa_r+0x3aa> 800a3f4: 2301 movs r3, #1 800a3f6: 9309 str r3, [sp, #36] ; 0x24 800a3f8: 9b1f ldr r3, [sp, #124] ; 0x7c 800a3fa: 445b add r3, fp 800a3fc: f103 0901 add.w r9, r3, #1 800a400: 9304 str r3, [sp, #16] 800a402: 464b mov r3, r9 800a404: 2b01 cmp r3, #1 800a406: bfb8 it lt 800a408: 2301 movlt r3, #1 800a40a: e7b0 b.n 800a36e <_dtoa_r+0x246> 800a40c: 2300 movs r3, #0 800a40e: e7a7 b.n 800a360 <_dtoa_r+0x238> 800a410: 2300 movs r3, #0 800a412: e7f0 b.n 800a3f6 <_dtoa_r+0x2ce> 800a414: f3af 8000 nop.w 800a418: 636f4361 .word 0x636f4361 800a41c: 3fd287a7 .word 0x3fd287a7 800a420: 8b60c8b3 .word 0x8b60c8b3 800a424: 3fc68a28 .word 0x3fc68a28 800a428: 509f79fb .word 0x509f79fb 800a42c: 3fd34413 .word 0x3fd34413 800a430: 7ff00000 .word 0x7ff00000 800a434: 0800c56d .word 0x0800c56d 800a438: 0800c564 .word 0x0800c564 800a43c: 0800c541 .word 0x0800c541 800a440: 3ff80000 .word 0x3ff80000 800a444: 0800c600 .word 0x0800c600 800a448: 0800c5d8 .word 0x0800c5d8 800a44c: 2601 movs r6, #1 800a44e: 2300 movs r3, #0 800a450: 9609 str r6, [sp, #36] ; 0x24 800a452: 931e str r3, [sp, #120] ; 0x78 800a454: f04f 33ff mov.w r3, #4294967295 800a458: 2200 movs r2, #0 800a45a: 9304 str r3, [sp, #16] 800a45c: 4699 mov r9, r3 800a45e: 2312 movs r3, #18 800a460: 921f str r2, [sp, #124] ; 0x7c 800a462: e784 b.n 800a36e <_dtoa_r+0x246> 800a464: 2301 movs r3, #1 800a466: 9309 str r3, [sp, #36] ; 0x24 800a468: e7f4 b.n 800a454 <_dtoa_r+0x32c> 800a46a: 2301 movs r3, #1 800a46c: 9304 str r3, [sp, #16] 800a46e: 4699 mov r9, r3 800a470: 461a mov r2, r3 800a472: e7f5 b.n 800a460 <_dtoa_r+0x338> 800a474: 686a ldr r2, [r5, #4] 800a476: 0049 lsls r1, r1, #1 800a478: 3201 adds r2, #1 800a47a: 606a str r2, [r5, #4] 800a47c: e77b b.n 800a376 <_dtoa_r+0x24e> 800a47e: 2502 movs r5, #2 800a480: e7ac b.n 800a3dc <_dtoa_r+0x2b4> 800a482: 07f1 lsls r1, r6, #31 800a484: d508 bpl.n 800a498 <_dtoa_r+0x370> 800a486: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a48a: e9d7 2300 ldrd r2, r3, [r7] 800a48e: f7fa f88b bl 80045a8 <__aeabi_dmul> 800a492: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a496: 3501 adds r5, #1 800a498: 1076 asrs r6, r6, #1 800a49a: 3708 adds r7, #8 800a49c: e79f b.n 800a3de <_dtoa_r+0x2b6> 800a49e: f000 80a5 beq.w 800a5ec <_dtoa_r+0x4c4> 800a4a2: e9dd 010e ldrd r0, r1, [sp, #56] ; 0x38 800a4a6: f1cb 0600 rsb r6, fp, #0 800a4aa: 4ba2 ldr r3, [pc, #648] ; (800a734 <_dtoa_r+0x60c>) 800a4ac: f006 020f and.w r2, r6, #15 800a4b0: eb03 03c2 add.w r3, r3, r2, lsl #3 800a4b4: e9d3 2300 ldrd r2, r3, [r3] 800a4b8: f7fa f876 bl 80045a8 <__aeabi_dmul> 800a4bc: 2502 movs r5, #2 800a4be: 2300 movs r3, #0 800a4c0: e9cd 0102 strd r0, r1, [sp, #8] 800a4c4: 4f9c ldr r7, [pc, #624] ; (800a738 <_dtoa_r+0x610>) 800a4c6: 1136 asrs r6, r6, #4 800a4c8: 2e00 cmp r6, #0 800a4ca: f040 8084 bne.w 800a5d6 <_dtoa_r+0x4ae> 800a4ce: 2b00 cmp r3, #0 800a4d0: d18d bne.n 800a3ee <_dtoa_r+0x2c6> 800a4d2: 9b0d ldr r3, [sp, #52] ; 0x34 800a4d4: 2b00 cmp r3, #0 800a4d6: f000 808b beq.w 800a5f0 <_dtoa_r+0x4c8> 800a4da: e9dd 2302 ldrd r2, r3, [sp, #8] 800a4de: e9cd 230a strd r2, r3, [sp, #40] ; 0x28 800a4e2: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a4e6: 2200 movs r2, #0 800a4e8: 4b94 ldr r3, [pc, #592] ; (800a73c <_dtoa_r+0x614>) 800a4ea: f7fa facf bl 8004a8c <__aeabi_dcmplt> 800a4ee: 2800 cmp r0, #0 800a4f0: d07e beq.n 800a5f0 <_dtoa_r+0x4c8> 800a4f2: f1b9 0f00 cmp.w r9, #0 800a4f6: d07b beq.n 800a5f0 <_dtoa_r+0x4c8> 800a4f8: 9b04 ldr r3, [sp, #16] 800a4fa: 2b00 cmp r3, #0 800a4fc: dd37 ble.n 800a56e <_dtoa_r+0x446> 800a4fe: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a502: 2200 movs r2, #0 800a504: 4b8e ldr r3, [pc, #568] ; (800a740 <_dtoa_r+0x618>) 800a506: f7fa f84f bl 80045a8 <__aeabi_dmul> 800a50a: e9cd 0102 strd r0, r1, [sp, #8] 800a50e: 9e04 ldr r6, [sp, #16] 800a510: f10b 37ff add.w r7, fp, #4294967295 800a514: 3501 adds r5, #1 800a516: 4628 mov r0, r5 800a518: f7f9 ffe0 bl 80044dc <__aeabi_i2d> 800a51c: e9dd 2302 ldrd r2, r3, [sp, #8] 800a520: f7fa f842 bl 80045a8 <__aeabi_dmul> 800a524: 4b87 ldr r3, [pc, #540] ; (800a744 <_dtoa_r+0x61c>) 800a526: 2200 movs r2, #0 800a528: f7f9 fe8c bl 8004244 <__adddf3> 800a52c: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a530: 9b0b ldr r3, [sp, #44] ; 0x2c 800a532: f1a3 7550 sub.w r5, r3, #54525952 ; 0x3400000 800a536: 950b str r5, [sp, #44] ; 0x2c 800a538: 2e00 cmp r6, #0 800a53a: d15c bne.n 800a5f6 <_dtoa_r+0x4ce> 800a53c: e9dd 0102 ldrd r0, r1, [sp, #8] 800a540: 2200 movs r2, #0 800a542: 4b81 ldr r3, [pc, #516] ; (800a748 <_dtoa_r+0x620>) 800a544: f7f9 fe7c bl 8004240 <__aeabi_dsub> 800a548: 9a0a ldr r2, [sp, #40] ; 0x28 800a54a: 462b mov r3, r5 800a54c: e9cd 0102 strd r0, r1, [sp, #8] 800a550: f7fa faba bl 8004ac8 <__aeabi_dcmpgt> 800a554: 2800 cmp r0, #0 800a556: f040 82f7 bne.w 800ab48 <_dtoa_r+0xa20> 800a55a: e9dd 0102 ldrd r0, r1, [sp, #8] 800a55e: 9a0a ldr r2, [sp, #40] ; 0x28 800a560: f105 4300 add.w r3, r5, #2147483648 ; 0x80000000 800a564: f7fa fa92 bl 8004a8c <__aeabi_dcmplt> 800a568: 2800 cmp r0, #0 800a56a: f040 82eb bne.w 800ab44 <_dtoa_r+0xa1c> 800a56e: e9dd 230e ldrd r2, r3, [sp, #56] ; 0x38 800a572: e9cd 2302 strd r2, r3, [sp, #8] 800a576: 9b13 ldr r3, [sp, #76] ; 0x4c 800a578: 2b00 cmp r3, #0 800a57a: f2c0 8150 blt.w 800a81e <_dtoa_r+0x6f6> 800a57e: f1bb 0f0e cmp.w fp, #14 800a582: f300 814c bgt.w 800a81e <_dtoa_r+0x6f6> 800a586: 4b6b ldr r3, [pc, #428] ; (800a734 <_dtoa_r+0x60c>) 800a588: eb03 03cb add.w r3, r3, fp, lsl #3 800a58c: e9d3 2300 ldrd r2, r3, [r3] 800a590: e9cd 2304 strd r2, r3, [sp, #16] 800a594: 9b1f ldr r3, [sp, #124] ; 0x7c 800a596: 2b00 cmp r3, #0 800a598: f280 80da bge.w 800a750 <_dtoa_r+0x628> 800a59c: f1b9 0f00 cmp.w r9, #0 800a5a0: f300 80d6 bgt.w 800a750 <_dtoa_r+0x628> 800a5a4: f040 82cd bne.w 800ab42 <_dtoa_r+0xa1a> 800a5a8: e9dd 0104 ldrd r0, r1, [sp, #16] 800a5ac: 2200 movs r2, #0 800a5ae: 4b66 ldr r3, [pc, #408] ; (800a748 <_dtoa_r+0x620>) 800a5b0: f7f9 fffa bl 80045a8 <__aeabi_dmul> 800a5b4: e9dd 2302 ldrd r2, r3, [sp, #8] 800a5b8: f7fa fa7c bl 8004ab4 <__aeabi_dcmpge> 800a5bc: 464e mov r6, r9 800a5be: 464f mov r7, r9 800a5c0: 2800 cmp r0, #0 800a5c2: f040 82a4 bne.w 800ab0e <_dtoa_r+0x9e6> 800a5c6: 9b06 ldr r3, [sp, #24] 800a5c8: 9a06 ldr r2, [sp, #24] 800a5ca: 1c5d adds r5, r3, #1 800a5cc: 2331 movs r3, #49 ; 0x31 800a5ce: f10b 0b01 add.w fp, fp, #1 800a5d2: 7013 strb r3, [r2, #0] 800a5d4: e29f b.n 800ab16 <_dtoa_r+0x9ee> 800a5d6: 07f2 lsls r2, r6, #31 800a5d8: d505 bpl.n 800a5e6 <_dtoa_r+0x4be> 800a5da: e9d7 2300 ldrd r2, r3, [r7] 800a5de: f7f9 ffe3 bl 80045a8 <__aeabi_dmul> 800a5e2: 2301 movs r3, #1 800a5e4: 3501 adds r5, #1 800a5e6: 1076 asrs r6, r6, #1 800a5e8: 3708 adds r7, #8 800a5ea: e76d b.n 800a4c8 <_dtoa_r+0x3a0> 800a5ec: 2502 movs r5, #2 800a5ee: e770 b.n 800a4d2 <_dtoa_r+0x3aa> 800a5f0: 465f mov r7, fp 800a5f2: 464e mov r6, r9 800a5f4: e78f b.n 800a516 <_dtoa_r+0x3ee> 800a5f6: 9a06 ldr r2, [sp, #24] 800a5f8: 4b4e ldr r3, [pc, #312] ; (800a734 <_dtoa_r+0x60c>) 800a5fa: 4432 add r2, r6 800a5fc: 9211 str r2, [sp, #68] ; 0x44 800a5fe: 9a09 ldr r2, [sp, #36] ; 0x24 800a600: 1e71 subs r1, r6, #1 800a602: 2a00 cmp r2, #0 800a604: d048 beq.n 800a698 <_dtoa_r+0x570> 800a606: eb03 03c1 add.w r3, r3, r1, lsl #3 800a60a: e9d3 2300 ldrd r2, r3, [r3] 800a60e: 2000 movs r0, #0 800a610: 494e ldr r1, [pc, #312] ; (800a74c <_dtoa_r+0x624>) 800a612: f7fa f8f3 bl 80047fc <__aeabi_ddiv> 800a616: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a61a: f7f9 fe11 bl 8004240 <__aeabi_dsub> 800a61e: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a622: 9d06 ldr r5, [sp, #24] 800a624: e9dd 0102 ldrd r0, r1, [sp, #8] 800a628: f7fa fa6e bl 8004b08 <__aeabi_d2iz> 800a62c: 4606 mov r6, r0 800a62e: f7f9 ff55 bl 80044dc <__aeabi_i2d> 800a632: 4602 mov r2, r0 800a634: 460b mov r3, r1 800a636: e9dd 0102 ldrd r0, r1, [sp, #8] 800a63a: f7f9 fe01 bl 8004240 <__aeabi_dsub> 800a63e: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a642: 3630 adds r6, #48 ; 0x30 800a644: f805 6b01 strb.w r6, [r5], #1 800a648: e9cd 0102 strd r0, r1, [sp, #8] 800a64c: f7fa fa1e bl 8004a8c <__aeabi_dcmplt> 800a650: 2800 cmp r0, #0 800a652: d164 bne.n 800a71e <_dtoa_r+0x5f6> 800a654: e9dd 2302 ldrd r2, r3, [sp, #8] 800a658: 2000 movs r0, #0 800a65a: 4938 ldr r1, [pc, #224] ; (800a73c <_dtoa_r+0x614>) 800a65c: f7f9 fdf0 bl 8004240 <__aeabi_dsub> 800a660: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a664: f7fa fa12 bl 8004a8c <__aeabi_dcmplt> 800a668: 2800 cmp r0, #0 800a66a: f040 80b9 bne.w 800a7e0 <_dtoa_r+0x6b8> 800a66e: 9b11 ldr r3, [sp, #68] ; 0x44 800a670: 429d cmp r5, r3 800a672: f43f af7c beq.w 800a56e <_dtoa_r+0x446> 800a676: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a67a: 2200 movs r2, #0 800a67c: 4b30 ldr r3, [pc, #192] ; (800a740 <_dtoa_r+0x618>) 800a67e: f7f9 ff93 bl 80045a8 <__aeabi_dmul> 800a682: 2200 movs r2, #0 800a684: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a688: e9dd 0102 ldrd r0, r1, [sp, #8] 800a68c: 4b2c ldr r3, [pc, #176] ; (800a740 <_dtoa_r+0x618>) 800a68e: f7f9 ff8b bl 80045a8 <__aeabi_dmul> 800a692: e9cd 0102 strd r0, r1, [sp, #8] 800a696: e7c5 b.n 800a624 <_dtoa_r+0x4fc> 800a698: eb03 01c1 add.w r1, r3, r1, lsl #3 800a69c: e9d1 0100 ldrd r0, r1, [r1] 800a6a0: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a6a4: f7f9 ff80 bl 80045a8 <__aeabi_dmul> 800a6a8: e9cd 010a strd r0, r1, [sp, #40] ; 0x28 800a6ac: 9d06 ldr r5, [sp, #24] 800a6ae: e9dd 0102 ldrd r0, r1, [sp, #8] 800a6b2: f7fa fa29 bl 8004b08 <__aeabi_d2iz> 800a6b6: 4606 mov r6, r0 800a6b8: f7f9 ff10 bl 80044dc <__aeabi_i2d> 800a6bc: 4602 mov r2, r0 800a6be: 460b mov r3, r1 800a6c0: e9dd 0102 ldrd r0, r1, [sp, #8] 800a6c4: f7f9 fdbc bl 8004240 <__aeabi_dsub> 800a6c8: 3630 adds r6, #48 ; 0x30 800a6ca: 9b11 ldr r3, [sp, #68] ; 0x44 800a6cc: f805 6b01 strb.w r6, [r5], #1 800a6d0: 42ab cmp r3, r5 800a6d2: e9cd 0102 strd r0, r1, [sp, #8] 800a6d6: f04f 0200 mov.w r2, #0 800a6da: d124 bne.n 800a726 <_dtoa_r+0x5fe> 800a6dc: 4b1b ldr r3, [pc, #108] ; (800a74c <_dtoa_r+0x624>) 800a6de: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28 800a6e2: f7f9 fdaf bl 8004244 <__adddf3> 800a6e6: 4602 mov r2, r0 800a6e8: 460b mov r3, r1 800a6ea: e9dd 0102 ldrd r0, r1, [sp, #8] 800a6ee: f7fa f9eb bl 8004ac8 <__aeabi_dcmpgt> 800a6f2: 2800 cmp r0, #0 800a6f4: d174 bne.n 800a7e0 <_dtoa_r+0x6b8> 800a6f6: e9dd 230a ldrd r2, r3, [sp, #40] ; 0x28 800a6fa: 2000 movs r0, #0 800a6fc: 4913 ldr r1, [pc, #76] ; (800a74c <_dtoa_r+0x624>) 800a6fe: f7f9 fd9f bl 8004240 <__aeabi_dsub> 800a702: 4602 mov r2, r0 800a704: 460b mov r3, r1 800a706: e9dd 0102 ldrd r0, r1, [sp, #8] 800a70a: f7fa f9bf bl 8004a8c <__aeabi_dcmplt> 800a70e: 2800 cmp r0, #0 800a710: f43f af2d beq.w 800a56e <_dtoa_r+0x446> 800a714: f815 3c01 ldrb.w r3, [r5, #-1] 800a718: 1e6a subs r2, r5, #1 800a71a: 2b30 cmp r3, #48 ; 0x30 800a71c: d001 beq.n 800a722 <_dtoa_r+0x5fa> 800a71e: 46bb mov fp, r7 800a720: e04d b.n 800a7be <_dtoa_r+0x696> 800a722: 4615 mov r5, r2 800a724: e7f6 b.n 800a714 <_dtoa_r+0x5ec> 800a726: 4b06 ldr r3, [pc, #24] ; (800a740 <_dtoa_r+0x618>) 800a728: f7f9 ff3e bl 80045a8 <__aeabi_dmul> 800a72c: e9cd 0102 strd r0, r1, [sp, #8] 800a730: e7bd b.n 800a6ae <_dtoa_r+0x586> 800a732: bf00 nop 800a734: 0800c600 .word 0x0800c600 800a738: 0800c5d8 .word 0x0800c5d8 800a73c: 3ff00000 .word 0x3ff00000 800a740: 40240000 .word 0x40240000 800a744: 401c0000 .word 0x401c0000 800a748: 40140000 .word 0x40140000 800a74c: 3fe00000 .word 0x3fe00000 800a750: 9d06 ldr r5, [sp, #24] 800a752: e9dd 6702 ldrd r6, r7, [sp, #8] 800a756: e9dd 2304 ldrd r2, r3, [sp, #16] 800a75a: 4630 mov r0, r6 800a75c: 4639 mov r1, r7 800a75e: f7fa f84d bl 80047fc <__aeabi_ddiv> 800a762: f7fa f9d1 bl 8004b08 <__aeabi_d2iz> 800a766: 4680 mov r8, r0 800a768: f7f9 feb8 bl 80044dc <__aeabi_i2d> 800a76c: e9dd 2304 ldrd r2, r3, [sp, #16] 800a770: f7f9 ff1a bl 80045a8 <__aeabi_dmul> 800a774: 4602 mov r2, r0 800a776: 460b mov r3, r1 800a778: 4630 mov r0, r6 800a77a: 4639 mov r1, r7 800a77c: f7f9 fd60 bl 8004240 <__aeabi_dsub> 800a780: f108 0630 add.w r6, r8, #48 ; 0x30 800a784: f805 6b01 strb.w r6, [r5], #1 800a788: 9e06 ldr r6, [sp, #24] 800a78a: 4602 mov r2, r0 800a78c: 1bae subs r6, r5, r6 800a78e: 45b1 cmp r9, r6 800a790: 460b mov r3, r1 800a792: d137 bne.n 800a804 <_dtoa_r+0x6dc> 800a794: f7f9 fd56 bl 8004244 <__adddf3> 800a798: 4606 mov r6, r0 800a79a: 460f mov r7, r1 800a79c: 4602 mov r2, r0 800a79e: 460b mov r3, r1 800a7a0: e9dd 0104 ldrd r0, r1, [sp, #16] 800a7a4: f7fa f972 bl 8004a8c <__aeabi_dcmplt> 800a7a8: b9c8 cbnz r0, 800a7de <_dtoa_r+0x6b6> 800a7aa: e9dd 0104 ldrd r0, r1, [sp, #16] 800a7ae: 4632 mov r2, r6 800a7b0: 463b mov r3, r7 800a7b2: f7fa f961 bl 8004a78 <__aeabi_dcmpeq> 800a7b6: b110 cbz r0, 800a7be <_dtoa_r+0x696> 800a7b8: f018 0f01 tst.w r8, #1 800a7bc: d10f bne.n 800a7de <_dtoa_r+0x6b6> 800a7be: 4651 mov r1, sl 800a7c0: 4620 mov r0, r4 800a7c2: f000 fcbd bl 800b140 <_Bfree> 800a7c6: 2300 movs r3, #0 800a7c8: 9a20 ldr r2, [sp, #128] ; 0x80 800a7ca: 702b strb r3, [r5, #0] 800a7cc: f10b 0301 add.w r3, fp, #1 800a7d0: 6013 str r3, [r2, #0] 800a7d2: 9b22 ldr r3, [sp, #136] ; 0x88 800a7d4: 2b00 cmp r3, #0 800a7d6: f43f acec beq.w 800a1b2 <_dtoa_r+0x8a> 800a7da: 601d str r5, [r3, #0] 800a7dc: e4e9 b.n 800a1b2 <_dtoa_r+0x8a> 800a7de: 465f mov r7, fp 800a7e0: f815 2c01 ldrb.w r2, [r5, #-1] 800a7e4: 1e6b subs r3, r5, #1 800a7e6: 2a39 cmp r2, #57 ; 0x39 800a7e8: d106 bne.n 800a7f8 <_dtoa_r+0x6d0> 800a7ea: 9a06 ldr r2, [sp, #24] 800a7ec: 429a cmp r2, r3 800a7ee: d107 bne.n 800a800 <_dtoa_r+0x6d8> 800a7f0: 2330 movs r3, #48 ; 0x30 800a7f2: 7013 strb r3, [r2, #0] 800a7f4: 4613 mov r3, r2 800a7f6: 3701 adds r7, #1 800a7f8: 781a ldrb r2, [r3, #0] 800a7fa: 3201 adds r2, #1 800a7fc: 701a strb r2, [r3, #0] 800a7fe: e78e b.n 800a71e <_dtoa_r+0x5f6> 800a800: 461d mov r5, r3 800a802: e7ed b.n 800a7e0 <_dtoa_r+0x6b8> 800a804: 2200 movs r2, #0 800a806: 4bb5 ldr r3, [pc, #724] ; (800aadc <_dtoa_r+0x9b4>) 800a808: f7f9 fece bl 80045a8 <__aeabi_dmul> 800a80c: 2200 movs r2, #0 800a80e: 2300 movs r3, #0 800a810: 4606 mov r6, r0 800a812: 460f mov r7, r1 800a814: f7fa f930 bl 8004a78 <__aeabi_dcmpeq> 800a818: 2800 cmp r0, #0 800a81a: d09c beq.n 800a756 <_dtoa_r+0x62e> 800a81c: e7cf b.n 800a7be <_dtoa_r+0x696> 800a81e: 9a09 ldr r2, [sp, #36] ; 0x24 800a820: 2a00 cmp r2, #0 800a822: f000 8129 beq.w 800aa78 <_dtoa_r+0x950> 800a826: 9a1e ldr r2, [sp, #120] ; 0x78 800a828: 2a01 cmp r2, #1 800a82a: f300 810e bgt.w 800aa4a <_dtoa_r+0x922> 800a82e: 9a10 ldr r2, [sp, #64] ; 0x40 800a830: 2a00 cmp r2, #0 800a832: f000 8106 beq.w 800aa42 <_dtoa_r+0x91a> 800a836: f203 4333 addw r3, r3, #1075 ; 0x433 800a83a: 4645 mov r5, r8 800a83c: 9e08 ldr r6, [sp, #32] 800a83e: 9a07 ldr r2, [sp, #28] 800a840: 2101 movs r1, #1 800a842: 441a add r2, r3 800a844: 4620 mov r0, r4 800a846: 4498 add r8, r3 800a848: 9207 str r2, [sp, #28] 800a84a: f000 fd19 bl 800b280 <__i2b> 800a84e: 4607 mov r7, r0 800a850: 2d00 cmp r5, #0 800a852: dd0b ble.n 800a86c <_dtoa_r+0x744> 800a854: 9b07 ldr r3, [sp, #28] 800a856: 2b00 cmp r3, #0 800a858: dd08 ble.n 800a86c <_dtoa_r+0x744> 800a85a: 42ab cmp r3, r5 800a85c: bfa8 it ge 800a85e: 462b movge r3, r5 800a860: 9a07 ldr r2, [sp, #28] 800a862: eba8 0803 sub.w r8, r8, r3 800a866: 1aed subs r5, r5, r3 800a868: 1ad3 subs r3, r2, r3 800a86a: 9307 str r3, [sp, #28] 800a86c: 9b08 ldr r3, [sp, #32] 800a86e: b1fb cbz r3, 800a8b0 <_dtoa_r+0x788> 800a870: 9b09 ldr r3, [sp, #36] ; 0x24 800a872: 2b00 cmp r3, #0 800a874: f000 8104 beq.w 800aa80 <_dtoa_r+0x958> 800a878: 2e00 cmp r6, #0 800a87a: dd11 ble.n 800a8a0 <_dtoa_r+0x778> 800a87c: 4639 mov r1, r7 800a87e: 4632 mov r2, r6 800a880: 4620 mov r0, r4 800a882: f000 fd93 bl 800b3ac <__pow5mult> 800a886: 4652 mov r2, sl 800a888: 4601 mov r1, r0 800a88a: 4607 mov r7, r0 800a88c: 4620 mov r0, r4 800a88e: f000 fd00 bl 800b292 <__multiply> 800a892: 4651 mov r1, sl 800a894: 900a str r0, [sp, #40] ; 0x28 800a896: 4620 mov r0, r4 800a898: f000 fc52 bl 800b140 <_Bfree> 800a89c: 9b0a ldr r3, [sp, #40] ; 0x28 800a89e: 469a mov sl, r3 800a8a0: 9b08 ldr r3, [sp, #32] 800a8a2: 1b9a subs r2, r3, r6 800a8a4: d004 beq.n 800a8b0 <_dtoa_r+0x788> 800a8a6: 4651 mov r1, sl 800a8a8: 4620 mov r0, r4 800a8aa: f000 fd7f bl 800b3ac <__pow5mult> 800a8ae: 4682 mov sl, r0 800a8b0: 2101 movs r1, #1 800a8b2: 4620 mov r0, r4 800a8b4: f000 fce4 bl 800b280 <__i2b> 800a8b8: 9b0c ldr r3, [sp, #48] ; 0x30 800a8ba: 4606 mov r6, r0 800a8bc: 2b00 cmp r3, #0 800a8be: f340 80e1 ble.w 800aa84 <_dtoa_r+0x95c> 800a8c2: 461a mov r2, r3 800a8c4: 4601 mov r1, r0 800a8c6: 4620 mov r0, r4 800a8c8: f000 fd70 bl 800b3ac <__pow5mult> 800a8cc: 9b1e ldr r3, [sp, #120] ; 0x78 800a8ce: 4606 mov r6, r0 800a8d0: 2b01 cmp r3, #1 800a8d2: f340 80da ble.w 800aa8a <_dtoa_r+0x962> 800a8d6: 2300 movs r3, #0 800a8d8: 9308 str r3, [sp, #32] 800a8da: 6933 ldr r3, [r6, #16] 800a8dc: eb06 0383 add.w r3, r6, r3, lsl #2 800a8e0: 6918 ldr r0, [r3, #16] 800a8e2: f000 fc7f bl 800b1e4 <__hi0bits> 800a8e6: f1c0 0020 rsb r0, r0, #32 800a8ea: 9b07 ldr r3, [sp, #28] 800a8ec: 4418 add r0, r3 800a8ee: f010 001f ands.w r0, r0, #31 800a8f2: f000 80f0 beq.w 800aad6 <_dtoa_r+0x9ae> 800a8f6: f1c0 0320 rsb r3, r0, #32 800a8fa: 2b04 cmp r3, #4 800a8fc: f340 80e2 ble.w 800aac4 <_dtoa_r+0x99c> 800a900: 9b07 ldr r3, [sp, #28] 800a902: f1c0 001c rsb r0, r0, #28 800a906: 4480 add r8, r0 800a908: 4405 add r5, r0 800a90a: 4403 add r3, r0 800a90c: 9307 str r3, [sp, #28] 800a90e: f1b8 0f00 cmp.w r8, #0 800a912: dd05 ble.n 800a920 <_dtoa_r+0x7f8> 800a914: 4651 mov r1, sl 800a916: 4642 mov r2, r8 800a918: 4620 mov r0, r4 800a91a: f000 fd95 bl 800b448 <__lshift> 800a91e: 4682 mov sl, r0 800a920: 9b07 ldr r3, [sp, #28] 800a922: 2b00 cmp r3, #0 800a924: dd05 ble.n 800a932 <_dtoa_r+0x80a> 800a926: 4631 mov r1, r6 800a928: 461a mov r2, r3 800a92a: 4620 mov r0, r4 800a92c: f000 fd8c bl 800b448 <__lshift> 800a930: 4606 mov r6, r0 800a932: 9b0d ldr r3, [sp, #52] ; 0x34 800a934: 2b00 cmp r3, #0 800a936: f000 80d3 beq.w 800aae0 <_dtoa_r+0x9b8> 800a93a: 4631 mov r1, r6 800a93c: 4650 mov r0, sl 800a93e: f000 fdd4 bl 800b4ea <__mcmp> 800a942: 2800 cmp r0, #0 800a944: f280 80cc bge.w 800aae0 <_dtoa_r+0x9b8> 800a948: 2300 movs r3, #0 800a94a: 4651 mov r1, sl 800a94c: 220a movs r2, #10 800a94e: 4620 mov r0, r4 800a950: f000 fc0d bl 800b16e <__multadd> 800a954: 9b09 ldr r3, [sp, #36] ; 0x24 800a956: f10b 3bff add.w fp, fp, #4294967295 800a95a: 4682 mov sl, r0 800a95c: 2b00 cmp r3, #0 800a95e: f000 81a9 beq.w 800acb4 <_dtoa_r+0xb8c> 800a962: 2300 movs r3, #0 800a964: 4639 mov r1, r7 800a966: 220a movs r2, #10 800a968: 4620 mov r0, r4 800a96a: f000 fc00 bl 800b16e <__multadd> 800a96e: 9b04 ldr r3, [sp, #16] 800a970: 4607 mov r7, r0 800a972: 2b00 cmp r3, #0 800a974: dc03 bgt.n 800a97e <_dtoa_r+0x856> 800a976: 9b1e ldr r3, [sp, #120] ; 0x78 800a978: 2b02 cmp r3, #2 800a97a: f300 80b9 bgt.w 800aaf0 <_dtoa_r+0x9c8> 800a97e: 2d00 cmp r5, #0 800a980: dd05 ble.n 800a98e <_dtoa_r+0x866> 800a982: 4639 mov r1, r7 800a984: 462a mov r2, r5 800a986: 4620 mov r0, r4 800a988: f000 fd5e bl 800b448 <__lshift> 800a98c: 4607 mov r7, r0 800a98e: 9b08 ldr r3, [sp, #32] 800a990: 2b00 cmp r3, #0 800a992: f000 8110 beq.w 800abb6 <_dtoa_r+0xa8e> 800a996: 6879 ldr r1, [r7, #4] 800a998: 4620 mov r0, r4 800a99a: f000 fb9d bl 800b0d8 <_Balloc> 800a99e: 4605 mov r5, r0 800a9a0: 693a ldr r2, [r7, #16] 800a9a2: f107 010c add.w r1, r7, #12 800a9a6: 3202 adds r2, #2 800a9a8: 0092 lsls r2, r2, #2 800a9aa: 300c adds r0, #12 800a9ac: f7fe fcc8 bl 8009340 800a9b0: 2201 movs r2, #1 800a9b2: 4629 mov r1, r5 800a9b4: 4620 mov r0, r4 800a9b6: f000 fd47 bl 800b448 <__lshift> 800a9ba: 9707 str r7, [sp, #28] 800a9bc: 4607 mov r7, r0 800a9be: 9b02 ldr r3, [sp, #8] 800a9c0: f8dd 8018 ldr.w r8, [sp, #24] 800a9c4: f003 0301 and.w r3, r3, #1 800a9c8: 9308 str r3, [sp, #32] 800a9ca: 4631 mov r1, r6 800a9cc: 4650 mov r0, sl 800a9ce: f7ff fb1d bl 800a00c 800a9d2: 9907 ldr r1, [sp, #28] 800a9d4: 4605 mov r5, r0 800a9d6: f100 0930 add.w r9, r0, #48 ; 0x30 800a9da: 4650 mov r0, sl 800a9dc: f000 fd85 bl 800b4ea <__mcmp> 800a9e0: 463a mov r2, r7 800a9e2: 9002 str r0, [sp, #8] 800a9e4: 4631 mov r1, r6 800a9e6: 4620 mov r0, r4 800a9e8: f000 fd99 bl 800b51e <__mdiff> 800a9ec: 68c3 ldr r3, [r0, #12] 800a9ee: 4602 mov r2, r0 800a9f0: 2b00 cmp r3, #0 800a9f2: f040 80e2 bne.w 800abba <_dtoa_r+0xa92> 800a9f6: 4601 mov r1, r0 800a9f8: 9009 str r0, [sp, #36] ; 0x24 800a9fa: 4650 mov r0, sl 800a9fc: f000 fd75 bl 800b4ea <__mcmp> 800aa00: 4603 mov r3, r0 800aa02: 9a09 ldr r2, [sp, #36] ; 0x24 800aa04: 4611 mov r1, r2 800aa06: 4620 mov r0, r4 800aa08: 9309 str r3, [sp, #36] ; 0x24 800aa0a: f000 fb99 bl 800b140 <_Bfree> 800aa0e: 9b09 ldr r3, [sp, #36] ; 0x24 800aa10: 2b00 cmp r3, #0 800aa12: f040 80d4 bne.w 800abbe <_dtoa_r+0xa96> 800aa16: 9a1e ldr r2, [sp, #120] ; 0x78 800aa18: 2a00 cmp r2, #0 800aa1a: f040 80d0 bne.w 800abbe <_dtoa_r+0xa96> 800aa1e: 9a08 ldr r2, [sp, #32] 800aa20: 2a00 cmp r2, #0 800aa22: f040 80cc bne.w 800abbe <_dtoa_r+0xa96> 800aa26: f1b9 0f39 cmp.w r9, #57 ; 0x39 800aa2a: f000 80e8 beq.w 800abfe <_dtoa_r+0xad6> 800aa2e: 9b02 ldr r3, [sp, #8] 800aa30: 2b00 cmp r3, #0 800aa32: dd01 ble.n 800aa38 <_dtoa_r+0x910> 800aa34: f105 0931 add.w r9, r5, #49 ; 0x31 800aa38: f108 0501 add.w r5, r8, #1 800aa3c: f888 9000 strb.w r9, [r8] 800aa40: e06b b.n 800ab1a <_dtoa_r+0x9f2> 800aa42: 9b12 ldr r3, [sp, #72] ; 0x48 800aa44: f1c3 0336 rsb r3, r3, #54 ; 0x36 800aa48: e6f7 b.n 800a83a <_dtoa_r+0x712> 800aa4a: 9b08 ldr r3, [sp, #32] 800aa4c: f109 36ff add.w r6, r9, #4294967295 800aa50: 42b3 cmp r3, r6 800aa52: bfb7 itett lt 800aa54: 9b08 ldrlt r3, [sp, #32] 800aa56: 1b9e subge r6, r3, r6 800aa58: 1af2 sublt r2, r6, r3 800aa5a: 9b0c ldrlt r3, [sp, #48] ; 0x30 800aa5c: bfbf itttt lt 800aa5e: 9608 strlt r6, [sp, #32] 800aa60: 189b addlt r3, r3, r2 800aa62: 930c strlt r3, [sp, #48] ; 0x30 800aa64: 2600 movlt r6, #0 800aa66: f1b9 0f00 cmp.w r9, #0 800aa6a: bfb9 ittee lt 800aa6c: eba8 0509 sublt.w r5, r8, r9 800aa70: 2300 movlt r3, #0 800aa72: 4645 movge r5, r8 800aa74: 464b movge r3, r9 800aa76: e6e2 b.n 800a83e <_dtoa_r+0x716> 800aa78: 9e08 ldr r6, [sp, #32] 800aa7a: 4645 mov r5, r8 800aa7c: 9f09 ldr r7, [sp, #36] ; 0x24 800aa7e: e6e7 b.n 800a850 <_dtoa_r+0x728> 800aa80: 9a08 ldr r2, [sp, #32] 800aa82: e710 b.n 800a8a6 <_dtoa_r+0x77e> 800aa84: 9b1e ldr r3, [sp, #120] ; 0x78 800aa86: 2b01 cmp r3, #1 800aa88: dc18 bgt.n 800aabc <_dtoa_r+0x994> 800aa8a: 9b02 ldr r3, [sp, #8] 800aa8c: b9b3 cbnz r3, 800aabc <_dtoa_r+0x994> 800aa8e: 9b03 ldr r3, [sp, #12] 800aa90: f3c3 0313 ubfx r3, r3, #0, #20 800aa94: b9a3 cbnz r3, 800aac0 <_dtoa_r+0x998> 800aa96: 9b03 ldr r3, [sp, #12] 800aa98: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 800aa9c: 0d1b lsrs r3, r3, #20 800aa9e: 051b lsls r3, r3, #20 800aaa0: b12b cbz r3, 800aaae <_dtoa_r+0x986> 800aaa2: 9b07 ldr r3, [sp, #28] 800aaa4: f108 0801 add.w r8, r8, #1 800aaa8: 3301 adds r3, #1 800aaaa: 9307 str r3, [sp, #28] 800aaac: 2301 movs r3, #1 800aaae: 9308 str r3, [sp, #32] 800aab0: 9b0c ldr r3, [sp, #48] ; 0x30 800aab2: 2b00 cmp r3, #0 800aab4: f47f af11 bne.w 800a8da <_dtoa_r+0x7b2> 800aab8: 2001 movs r0, #1 800aaba: e716 b.n 800a8ea <_dtoa_r+0x7c2> 800aabc: 2300 movs r3, #0 800aabe: e7f6 b.n 800aaae <_dtoa_r+0x986> 800aac0: 9b02 ldr r3, [sp, #8] 800aac2: e7f4 b.n 800aaae <_dtoa_r+0x986> 800aac4: f43f af23 beq.w 800a90e <_dtoa_r+0x7e6> 800aac8: 9a07 ldr r2, [sp, #28] 800aaca: 331c adds r3, #28 800aacc: 441a add r2, r3 800aace: 4498 add r8, r3 800aad0: 441d add r5, r3 800aad2: 4613 mov r3, r2 800aad4: e71a b.n 800a90c <_dtoa_r+0x7e4> 800aad6: 4603 mov r3, r0 800aad8: e7f6 b.n 800aac8 <_dtoa_r+0x9a0> 800aada: bf00 nop 800aadc: 40240000 .word 0x40240000 800aae0: f1b9 0f00 cmp.w r9, #0 800aae4: dc33 bgt.n 800ab4e <_dtoa_r+0xa26> 800aae6: 9b1e ldr r3, [sp, #120] ; 0x78 800aae8: 2b02 cmp r3, #2 800aaea: dd30 ble.n 800ab4e <_dtoa_r+0xa26> 800aaec: f8cd 9010 str.w r9, [sp, #16] 800aaf0: 9b04 ldr r3, [sp, #16] 800aaf2: b963 cbnz r3, 800ab0e <_dtoa_r+0x9e6> 800aaf4: 4631 mov r1, r6 800aaf6: 2205 movs r2, #5 800aaf8: 4620 mov r0, r4 800aafa: f000 fb38 bl 800b16e <__multadd> 800aafe: 4601 mov r1, r0 800ab00: 4606 mov r6, r0 800ab02: 4650 mov r0, sl 800ab04: f000 fcf1 bl 800b4ea <__mcmp> 800ab08: 2800 cmp r0, #0 800ab0a: f73f ad5c bgt.w 800a5c6 <_dtoa_r+0x49e> 800ab0e: 9b1f ldr r3, [sp, #124] ; 0x7c 800ab10: 9d06 ldr r5, [sp, #24] 800ab12: ea6f 0b03 mvn.w fp, r3 800ab16: 2300 movs r3, #0 800ab18: 9307 str r3, [sp, #28] 800ab1a: 4631 mov r1, r6 800ab1c: 4620 mov r0, r4 800ab1e: f000 fb0f bl 800b140 <_Bfree> 800ab22: 2f00 cmp r7, #0 800ab24: f43f ae4b beq.w 800a7be <_dtoa_r+0x696> 800ab28: 9b07 ldr r3, [sp, #28] 800ab2a: b12b cbz r3, 800ab38 <_dtoa_r+0xa10> 800ab2c: 42bb cmp r3, r7 800ab2e: d003 beq.n 800ab38 <_dtoa_r+0xa10> 800ab30: 4619 mov r1, r3 800ab32: 4620 mov r0, r4 800ab34: f000 fb04 bl 800b140 <_Bfree> 800ab38: 4639 mov r1, r7 800ab3a: 4620 mov r0, r4 800ab3c: f000 fb00 bl 800b140 <_Bfree> 800ab40: e63d b.n 800a7be <_dtoa_r+0x696> 800ab42: 2600 movs r6, #0 800ab44: 4637 mov r7, r6 800ab46: e7e2 b.n 800ab0e <_dtoa_r+0x9e6> 800ab48: 46bb mov fp, r7 800ab4a: 4637 mov r7, r6 800ab4c: e53b b.n 800a5c6 <_dtoa_r+0x49e> 800ab4e: 9b09 ldr r3, [sp, #36] ; 0x24 800ab50: f8cd 9010 str.w r9, [sp, #16] 800ab54: 2b00 cmp r3, #0 800ab56: f47f af12 bne.w 800a97e <_dtoa_r+0x856> 800ab5a: 9d06 ldr r5, [sp, #24] 800ab5c: 4631 mov r1, r6 800ab5e: 4650 mov r0, sl 800ab60: f7ff fa54 bl 800a00c 800ab64: 9b06 ldr r3, [sp, #24] 800ab66: f100 0930 add.w r9, r0, #48 ; 0x30 800ab6a: f805 9b01 strb.w r9, [r5], #1 800ab6e: 9a04 ldr r2, [sp, #16] 800ab70: 1aeb subs r3, r5, r3 800ab72: 429a cmp r2, r3 800ab74: f300 8081 bgt.w 800ac7a <_dtoa_r+0xb52> 800ab78: 9b06 ldr r3, [sp, #24] 800ab7a: 2a01 cmp r2, #1 800ab7c: bfac ite ge 800ab7e: 189b addge r3, r3, r2 800ab80: 3301 addlt r3, #1 800ab82: 4698 mov r8, r3 800ab84: 2300 movs r3, #0 800ab86: 9307 str r3, [sp, #28] 800ab88: 4651 mov r1, sl 800ab8a: 2201 movs r2, #1 800ab8c: 4620 mov r0, r4 800ab8e: f000 fc5b bl 800b448 <__lshift> 800ab92: 4631 mov r1, r6 800ab94: 4682 mov sl, r0 800ab96: f000 fca8 bl 800b4ea <__mcmp> 800ab9a: 2800 cmp r0, #0 800ab9c: dc34 bgt.n 800ac08 <_dtoa_r+0xae0> 800ab9e: d102 bne.n 800aba6 <_dtoa_r+0xa7e> 800aba0: f019 0f01 tst.w r9, #1 800aba4: d130 bne.n 800ac08 <_dtoa_r+0xae0> 800aba6: 4645 mov r5, r8 800aba8: f815 3c01 ldrb.w r3, [r5, #-1] 800abac: 1e6a subs r2, r5, #1 800abae: 2b30 cmp r3, #48 ; 0x30 800abb0: d1b3 bne.n 800ab1a <_dtoa_r+0x9f2> 800abb2: 4615 mov r5, r2 800abb4: e7f8 b.n 800aba8 <_dtoa_r+0xa80> 800abb6: 4638 mov r0, r7 800abb8: e6ff b.n 800a9ba <_dtoa_r+0x892> 800abba: 2301 movs r3, #1 800abbc: e722 b.n 800aa04 <_dtoa_r+0x8dc> 800abbe: 9a02 ldr r2, [sp, #8] 800abc0: 2a00 cmp r2, #0 800abc2: db04 blt.n 800abce <_dtoa_r+0xaa6> 800abc4: d128 bne.n 800ac18 <_dtoa_r+0xaf0> 800abc6: 9a1e ldr r2, [sp, #120] ; 0x78 800abc8: bb32 cbnz r2, 800ac18 <_dtoa_r+0xaf0> 800abca: 9a08 ldr r2, [sp, #32] 800abcc: bb22 cbnz r2, 800ac18 <_dtoa_r+0xaf0> 800abce: 2b00 cmp r3, #0 800abd0: f77f af32 ble.w 800aa38 <_dtoa_r+0x910> 800abd4: 4651 mov r1, sl 800abd6: 2201 movs r2, #1 800abd8: 4620 mov r0, r4 800abda: f000 fc35 bl 800b448 <__lshift> 800abde: 4631 mov r1, r6 800abe0: 4682 mov sl, r0 800abe2: f000 fc82 bl 800b4ea <__mcmp> 800abe6: 2800 cmp r0, #0 800abe8: dc05 bgt.n 800abf6 <_dtoa_r+0xace> 800abea: f47f af25 bne.w 800aa38 <_dtoa_r+0x910> 800abee: f019 0f01 tst.w r9, #1 800abf2: f43f af21 beq.w 800aa38 <_dtoa_r+0x910> 800abf6: f1b9 0f39 cmp.w r9, #57 ; 0x39 800abfa: f47f af1b bne.w 800aa34 <_dtoa_r+0x90c> 800abfe: 2339 movs r3, #57 ; 0x39 800ac00: f108 0801 add.w r8, r8, #1 800ac04: f808 3c01 strb.w r3, [r8, #-1] 800ac08: 4645 mov r5, r8 800ac0a: f815 3c01 ldrb.w r3, [r5, #-1] 800ac0e: 1e6a subs r2, r5, #1 800ac10: 2b39 cmp r3, #57 ; 0x39 800ac12: d03a beq.n 800ac8a <_dtoa_r+0xb62> 800ac14: 3301 adds r3, #1 800ac16: e03f b.n 800ac98 <_dtoa_r+0xb70> 800ac18: 2b00 cmp r3, #0 800ac1a: f108 0501 add.w r5, r8, #1 800ac1e: dd05 ble.n 800ac2c <_dtoa_r+0xb04> 800ac20: f1b9 0f39 cmp.w r9, #57 ; 0x39 800ac24: d0eb beq.n 800abfe <_dtoa_r+0xad6> 800ac26: f109 0901 add.w r9, r9, #1 800ac2a: e707 b.n 800aa3c <_dtoa_r+0x914> 800ac2c: 9b06 ldr r3, [sp, #24] 800ac2e: 9a04 ldr r2, [sp, #16] 800ac30: 1aeb subs r3, r5, r3 800ac32: 4293 cmp r3, r2 800ac34: 46a8 mov r8, r5 800ac36: f805 9c01 strb.w r9, [r5, #-1] 800ac3a: d0a5 beq.n 800ab88 <_dtoa_r+0xa60> 800ac3c: 4651 mov r1, sl 800ac3e: 2300 movs r3, #0 800ac40: 220a movs r2, #10 800ac42: 4620 mov r0, r4 800ac44: f000 fa93 bl 800b16e <__multadd> 800ac48: 9b07 ldr r3, [sp, #28] 800ac4a: 4682 mov sl, r0 800ac4c: 42bb cmp r3, r7 800ac4e: f04f 020a mov.w r2, #10 800ac52: f04f 0300 mov.w r3, #0 800ac56: 9907 ldr r1, [sp, #28] 800ac58: 4620 mov r0, r4 800ac5a: d104 bne.n 800ac66 <_dtoa_r+0xb3e> 800ac5c: f000 fa87 bl 800b16e <__multadd> 800ac60: 9007 str r0, [sp, #28] 800ac62: 4607 mov r7, r0 800ac64: e6b1 b.n 800a9ca <_dtoa_r+0x8a2> 800ac66: f000 fa82 bl 800b16e <__multadd> 800ac6a: 2300 movs r3, #0 800ac6c: 9007 str r0, [sp, #28] 800ac6e: 220a movs r2, #10 800ac70: 4639 mov r1, r7 800ac72: 4620 mov r0, r4 800ac74: f000 fa7b bl 800b16e <__multadd> 800ac78: e7f3 b.n 800ac62 <_dtoa_r+0xb3a> 800ac7a: 4651 mov r1, sl 800ac7c: 2300 movs r3, #0 800ac7e: 220a movs r2, #10 800ac80: 4620 mov r0, r4 800ac82: f000 fa74 bl 800b16e <__multadd> 800ac86: 4682 mov sl, r0 800ac88: e768 b.n 800ab5c <_dtoa_r+0xa34> 800ac8a: 9b06 ldr r3, [sp, #24] 800ac8c: 4293 cmp r3, r2 800ac8e: d105 bne.n 800ac9c <_dtoa_r+0xb74> 800ac90: 2331 movs r3, #49 ; 0x31 800ac92: 9a06 ldr r2, [sp, #24] 800ac94: f10b 0b01 add.w fp, fp, #1 800ac98: 7013 strb r3, [r2, #0] 800ac9a: e73e b.n 800ab1a <_dtoa_r+0x9f2> 800ac9c: 4615 mov r5, r2 800ac9e: e7b4 b.n 800ac0a <_dtoa_r+0xae2> 800aca0: 4b09 ldr r3, [pc, #36] ; (800acc8 <_dtoa_r+0xba0>) 800aca2: f7ff baa3 b.w 800a1ec <_dtoa_r+0xc4> 800aca6: 9b22 ldr r3, [sp, #136] ; 0x88 800aca8: 2b00 cmp r3, #0 800acaa: f47f aa7d bne.w 800a1a8 <_dtoa_r+0x80> 800acae: 4b07 ldr r3, [pc, #28] ; (800accc <_dtoa_r+0xba4>) 800acb0: f7ff ba9c b.w 800a1ec <_dtoa_r+0xc4> 800acb4: 9b04 ldr r3, [sp, #16] 800acb6: 2b00 cmp r3, #0 800acb8: f73f af4f bgt.w 800ab5a <_dtoa_r+0xa32> 800acbc: 9b1e ldr r3, [sp, #120] ; 0x78 800acbe: 2b02 cmp r3, #2 800acc0: f77f af4b ble.w 800ab5a <_dtoa_r+0xa32> 800acc4: e714 b.n 800aaf0 <_dtoa_r+0x9c8> 800acc6: bf00 nop 800acc8: 0800c540 .word 0x0800c540 800accc: 0800c564 .word 0x0800c564 0800acd0 <__sflush_r>: 800acd0: 898a ldrh r2, [r1, #12] 800acd2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800acd6: 4605 mov r5, r0 800acd8: 0710 lsls r0, r2, #28 800acda: 460c mov r4, r1 800acdc: d45a bmi.n 800ad94 <__sflush_r+0xc4> 800acde: 684b ldr r3, [r1, #4] 800ace0: 2b00 cmp r3, #0 800ace2: dc05 bgt.n 800acf0 <__sflush_r+0x20> 800ace4: 6c0b ldr r3, [r1, #64] ; 0x40 800ace6: 2b00 cmp r3, #0 800ace8: dc02 bgt.n 800acf0 <__sflush_r+0x20> 800acea: 2000 movs r0, #0 800acec: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800acf0: 6ae6 ldr r6, [r4, #44] ; 0x2c 800acf2: 2e00 cmp r6, #0 800acf4: d0f9 beq.n 800acea <__sflush_r+0x1a> 800acf6: 2300 movs r3, #0 800acf8: f412 5280 ands.w r2, r2, #4096 ; 0x1000 800acfc: 682f ldr r7, [r5, #0] 800acfe: 602b str r3, [r5, #0] 800ad00: d033 beq.n 800ad6a <__sflush_r+0x9a> 800ad02: 6d60 ldr r0, [r4, #84] ; 0x54 800ad04: 89a3 ldrh r3, [r4, #12] 800ad06: 075a lsls r2, r3, #29 800ad08: d505 bpl.n 800ad16 <__sflush_r+0x46> 800ad0a: 6863 ldr r3, [r4, #4] 800ad0c: 1ac0 subs r0, r0, r3 800ad0e: 6b63 ldr r3, [r4, #52] ; 0x34 800ad10: b10b cbz r3, 800ad16 <__sflush_r+0x46> 800ad12: 6c23 ldr r3, [r4, #64] ; 0x40 800ad14: 1ac0 subs r0, r0, r3 800ad16: 2300 movs r3, #0 800ad18: 4602 mov r2, r0 800ad1a: 6ae6 ldr r6, [r4, #44] ; 0x2c 800ad1c: 6a21 ldr r1, [r4, #32] 800ad1e: 4628 mov r0, r5 800ad20: 47b0 blx r6 800ad22: 1c43 adds r3, r0, #1 800ad24: 89a3 ldrh r3, [r4, #12] 800ad26: d106 bne.n 800ad36 <__sflush_r+0x66> 800ad28: 6829 ldr r1, [r5, #0] 800ad2a: 291d cmp r1, #29 800ad2c: d84b bhi.n 800adc6 <__sflush_r+0xf6> 800ad2e: 4a2b ldr r2, [pc, #172] ; (800addc <__sflush_r+0x10c>) 800ad30: 40ca lsrs r2, r1 800ad32: 07d6 lsls r6, r2, #31 800ad34: d547 bpl.n 800adc6 <__sflush_r+0xf6> 800ad36: 2200 movs r2, #0 800ad38: 6062 str r2, [r4, #4] 800ad3a: 6922 ldr r2, [r4, #16] 800ad3c: 04d9 lsls r1, r3, #19 800ad3e: 6022 str r2, [r4, #0] 800ad40: d504 bpl.n 800ad4c <__sflush_r+0x7c> 800ad42: 1c42 adds r2, r0, #1 800ad44: d101 bne.n 800ad4a <__sflush_r+0x7a> 800ad46: 682b ldr r3, [r5, #0] 800ad48: b903 cbnz r3, 800ad4c <__sflush_r+0x7c> 800ad4a: 6560 str r0, [r4, #84] ; 0x54 800ad4c: 6b61 ldr r1, [r4, #52] ; 0x34 800ad4e: 602f str r7, [r5, #0] 800ad50: 2900 cmp r1, #0 800ad52: d0ca beq.n 800acea <__sflush_r+0x1a> 800ad54: f104 0344 add.w r3, r4, #68 ; 0x44 800ad58: 4299 cmp r1, r3 800ad5a: d002 beq.n 800ad62 <__sflush_r+0x92> 800ad5c: 4628 mov r0, r5 800ad5e: f000 fc9b bl 800b698 <_free_r> 800ad62: 2000 movs r0, #0 800ad64: 6360 str r0, [r4, #52] ; 0x34 800ad66: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800ad6a: 6a21 ldr r1, [r4, #32] 800ad6c: 2301 movs r3, #1 800ad6e: 4628 mov r0, r5 800ad70: 47b0 blx r6 800ad72: 1c41 adds r1, r0, #1 800ad74: d1c6 bne.n 800ad04 <__sflush_r+0x34> 800ad76: 682b ldr r3, [r5, #0] 800ad78: 2b00 cmp r3, #0 800ad7a: d0c3 beq.n 800ad04 <__sflush_r+0x34> 800ad7c: 2b1d cmp r3, #29 800ad7e: d001 beq.n 800ad84 <__sflush_r+0xb4> 800ad80: 2b16 cmp r3, #22 800ad82: d101 bne.n 800ad88 <__sflush_r+0xb8> 800ad84: 602f str r7, [r5, #0] 800ad86: e7b0 b.n 800acea <__sflush_r+0x1a> 800ad88: 89a3 ldrh r3, [r4, #12] 800ad8a: f043 0340 orr.w r3, r3, #64 ; 0x40 800ad8e: 81a3 strh r3, [r4, #12] 800ad90: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800ad94: 690f ldr r7, [r1, #16] 800ad96: 2f00 cmp r7, #0 800ad98: d0a7 beq.n 800acea <__sflush_r+0x1a> 800ad9a: 0793 lsls r3, r2, #30 800ad9c: bf18 it ne 800ad9e: 2300 movne r3, #0 800ada0: 680e ldr r6, [r1, #0] 800ada2: bf08 it eq 800ada4: 694b ldreq r3, [r1, #20] 800ada6: eba6 0807 sub.w r8, r6, r7 800adaa: 600f str r7, [r1, #0] 800adac: 608b str r3, [r1, #8] 800adae: f1b8 0f00 cmp.w r8, #0 800adb2: dd9a ble.n 800acea <__sflush_r+0x1a> 800adb4: 4643 mov r3, r8 800adb6: 463a mov r2, r7 800adb8: 6a21 ldr r1, [r4, #32] 800adba: 4628 mov r0, r5 800adbc: 6aa6 ldr r6, [r4, #40] ; 0x28 800adbe: 47b0 blx r6 800adc0: 2800 cmp r0, #0 800adc2: dc07 bgt.n 800add4 <__sflush_r+0x104> 800adc4: 89a3 ldrh r3, [r4, #12] 800adc6: f043 0340 orr.w r3, r3, #64 ; 0x40 800adca: 81a3 strh r3, [r4, #12] 800adcc: f04f 30ff mov.w r0, #4294967295 800add0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800add4: 4407 add r7, r0 800add6: eba8 0800 sub.w r8, r8, r0 800adda: e7e8 b.n 800adae <__sflush_r+0xde> 800addc: 20400001 .word 0x20400001 0800ade0 <_fflush_r>: 800ade0: b538 push {r3, r4, r5, lr} 800ade2: 690b ldr r3, [r1, #16] 800ade4: 4605 mov r5, r0 800ade6: 460c mov r4, r1 800ade8: b1db cbz r3, 800ae22 <_fflush_r+0x42> 800adea: b118 cbz r0, 800adf4 <_fflush_r+0x14> 800adec: 6983 ldr r3, [r0, #24] 800adee: b90b cbnz r3, 800adf4 <_fflush_r+0x14> 800adf0: f000 f860 bl 800aeb4 <__sinit> 800adf4: 4b0c ldr r3, [pc, #48] ; (800ae28 <_fflush_r+0x48>) 800adf6: 429c cmp r4, r3 800adf8: d109 bne.n 800ae0e <_fflush_r+0x2e> 800adfa: 686c ldr r4, [r5, #4] 800adfc: f9b4 300c ldrsh.w r3, [r4, #12] 800ae00: b17b cbz r3, 800ae22 <_fflush_r+0x42> 800ae02: 4621 mov r1, r4 800ae04: 4628 mov r0, r5 800ae06: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800ae0a: f7ff bf61 b.w 800acd0 <__sflush_r> 800ae0e: 4b07 ldr r3, [pc, #28] ; (800ae2c <_fflush_r+0x4c>) 800ae10: 429c cmp r4, r3 800ae12: d101 bne.n 800ae18 <_fflush_r+0x38> 800ae14: 68ac ldr r4, [r5, #8] 800ae16: e7f1 b.n 800adfc <_fflush_r+0x1c> 800ae18: 4b05 ldr r3, [pc, #20] ; (800ae30 <_fflush_r+0x50>) 800ae1a: 429c cmp r4, r3 800ae1c: bf08 it eq 800ae1e: 68ec ldreq r4, [r5, #12] 800ae20: e7ec b.n 800adfc <_fflush_r+0x1c> 800ae22: 2000 movs r0, #0 800ae24: bd38 pop {r3, r4, r5, pc} 800ae26: bf00 nop 800ae28: 0800c594 .word 0x0800c594 800ae2c: 0800c5b4 .word 0x0800c5b4 800ae30: 0800c574 .word 0x0800c574 0800ae34 <_cleanup_r>: 800ae34: 4901 ldr r1, [pc, #4] ; (800ae3c <_cleanup_r+0x8>) 800ae36: f000 b8a9 b.w 800af8c <_fwalk_reent> 800ae3a: bf00 nop 800ae3c: 0800ade1 .word 0x0800ade1 0800ae40 : 800ae40: 2300 movs r3, #0 800ae42: b510 push {r4, lr} 800ae44: 4604 mov r4, r0 800ae46: 6003 str r3, [r0, #0] 800ae48: 6043 str r3, [r0, #4] 800ae4a: 6083 str r3, [r0, #8] 800ae4c: 8181 strh r1, [r0, #12] 800ae4e: 6643 str r3, [r0, #100] ; 0x64 800ae50: 81c2 strh r2, [r0, #14] 800ae52: 6103 str r3, [r0, #16] 800ae54: 6143 str r3, [r0, #20] 800ae56: 6183 str r3, [r0, #24] 800ae58: 4619 mov r1, r3 800ae5a: 2208 movs r2, #8 800ae5c: 305c adds r0, #92 ; 0x5c 800ae5e: f7fe fa7a bl 8009356 800ae62: 4b05 ldr r3, [pc, #20] ; (800ae78 ) 800ae64: 6224 str r4, [r4, #32] 800ae66: 6263 str r3, [r4, #36] ; 0x24 800ae68: 4b04 ldr r3, [pc, #16] ; (800ae7c ) 800ae6a: 62a3 str r3, [r4, #40] ; 0x28 800ae6c: 4b04 ldr r3, [pc, #16] ; (800ae80 ) 800ae6e: 62e3 str r3, [r4, #44] ; 0x2c 800ae70: 4b04 ldr r3, [pc, #16] ; (800ae84 ) 800ae72: 6323 str r3, [r4, #48] ; 0x30 800ae74: bd10 pop {r4, pc} 800ae76: bf00 nop 800ae78: 0800ba89 .word 0x0800ba89 800ae7c: 0800baab .word 0x0800baab 800ae80: 0800bae3 .word 0x0800bae3 800ae84: 0800bb07 .word 0x0800bb07 0800ae88 <__sfmoreglue>: 800ae88: b570 push {r4, r5, r6, lr} 800ae8a: 2568 movs r5, #104 ; 0x68 800ae8c: 1e4a subs r2, r1, #1 800ae8e: 4355 muls r5, r2 800ae90: 460e mov r6, r1 800ae92: f105 0174 add.w r1, r5, #116 ; 0x74 800ae96: f000 fc4b bl 800b730 <_malloc_r> 800ae9a: 4604 mov r4, r0 800ae9c: b140 cbz r0, 800aeb0 <__sfmoreglue+0x28> 800ae9e: 2100 movs r1, #0 800aea0: e880 0042 stmia.w r0, {r1, r6} 800aea4: 300c adds r0, #12 800aea6: 60a0 str r0, [r4, #8] 800aea8: f105 0268 add.w r2, r5, #104 ; 0x68 800aeac: f7fe fa53 bl 8009356 800aeb0: 4620 mov r0, r4 800aeb2: bd70 pop {r4, r5, r6, pc} 0800aeb4 <__sinit>: 800aeb4: 6983 ldr r3, [r0, #24] 800aeb6: b510 push {r4, lr} 800aeb8: 4604 mov r4, r0 800aeba: bb33 cbnz r3, 800af0a <__sinit+0x56> 800aebc: 6483 str r3, [r0, #72] ; 0x48 800aebe: 64c3 str r3, [r0, #76] ; 0x4c 800aec0: 6503 str r3, [r0, #80] ; 0x50 800aec2: 4b12 ldr r3, [pc, #72] ; (800af0c <__sinit+0x58>) 800aec4: 4a12 ldr r2, [pc, #72] ; (800af10 <__sinit+0x5c>) 800aec6: 681b ldr r3, [r3, #0] 800aec8: 6282 str r2, [r0, #40] ; 0x28 800aeca: 4298 cmp r0, r3 800aecc: bf04 itt eq 800aece: 2301 moveq r3, #1 800aed0: 6183 streq r3, [r0, #24] 800aed2: f000 f81f bl 800af14 <__sfp> 800aed6: 6060 str r0, [r4, #4] 800aed8: 4620 mov r0, r4 800aeda: f000 f81b bl 800af14 <__sfp> 800aede: 60a0 str r0, [r4, #8] 800aee0: 4620 mov r0, r4 800aee2: f000 f817 bl 800af14 <__sfp> 800aee6: 2200 movs r2, #0 800aee8: 60e0 str r0, [r4, #12] 800aeea: 2104 movs r1, #4 800aeec: 6860 ldr r0, [r4, #4] 800aeee: f7ff ffa7 bl 800ae40 800aef2: 2201 movs r2, #1 800aef4: 2109 movs r1, #9 800aef6: 68a0 ldr r0, [r4, #8] 800aef8: f7ff ffa2 bl 800ae40 800aefc: 2202 movs r2, #2 800aefe: 2112 movs r1, #18 800af00: 68e0 ldr r0, [r4, #12] 800af02: f7ff ff9d bl 800ae40 800af06: 2301 movs r3, #1 800af08: 61a3 str r3, [r4, #24] 800af0a: bd10 pop {r4, pc} 800af0c: 0800c52c .word 0x0800c52c 800af10: 0800ae35 .word 0x0800ae35 0800af14 <__sfp>: 800af14: b5f8 push {r3, r4, r5, r6, r7, lr} 800af16: 4b1c ldr r3, [pc, #112] ; (800af88 <__sfp+0x74>) 800af18: 4607 mov r7, r0 800af1a: 681e ldr r6, [r3, #0] 800af1c: 69b3 ldr r3, [r6, #24] 800af1e: b913 cbnz r3, 800af26 <__sfp+0x12> 800af20: 4630 mov r0, r6 800af22: f7ff ffc7 bl 800aeb4 <__sinit> 800af26: 3648 adds r6, #72 ; 0x48 800af28: 68b4 ldr r4, [r6, #8] 800af2a: 6873 ldr r3, [r6, #4] 800af2c: 3b01 subs r3, #1 800af2e: d503 bpl.n 800af38 <__sfp+0x24> 800af30: 6833 ldr r3, [r6, #0] 800af32: b133 cbz r3, 800af42 <__sfp+0x2e> 800af34: 6836 ldr r6, [r6, #0] 800af36: e7f7 b.n 800af28 <__sfp+0x14> 800af38: f9b4 500c ldrsh.w r5, [r4, #12] 800af3c: b16d cbz r5, 800af5a <__sfp+0x46> 800af3e: 3468 adds r4, #104 ; 0x68 800af40: e7f4 b.n 800af2c <__sfp+0x18> 800af42: 2104 movs r1, #4 800af44: 4638 mov r0, r7 800af46: f7ff ff9f bl 800ae88 <__sfmoreglue> 800af4a: 6030 str r0, [r6, #0] 800af4c: 2800 cmp r0, #0 800af4e: d1f1 bne.n 800af34 <__sfp+0x20> 800af50: 230c movs r3, #12 800af52: 4604 mov r4, r0 800af54: 603b str r3, [r7, #0] 800af56: 4620 mov r0, r4 800af58: bdf8 pop {r3, r4, r5, r6, r7, pc} 800af5a: f64f 73ff movw r3, #65535 ; 0xffff 800af5e: 81e3 strh r3, [r4, #14] 800af60: 2301 movs r3, #1 800af62: 6665 str r5, [r4, #100] ; 0x64 800af64: 81a3 strh r3, [r4, #12] 800af66: 6025 str r5, [r4, #0] 800af68: 60a5 str r5, [r4, #8] 800af6a: 6065 str r5, [r4, #4] 800af6c: 6125 str r5, [r4, #16] 800af6e: 6165 str r5, [r4, #20] 800af70: 61a5 str r5, [r4, #24] 800af72: 2208 movs r2, #8 800af74: 4629 mov r1, r5 800af76: f104 005c add.w r0, r4, #92 ; 0x5c 800af7a: f7fe f9ec bl 8009356 800af7e: 6365 str r5, [r4, #52] ; 0x34 800af80: 63a5 str r5, [r4, #56] ; 0x38 800af82: 64a5 str r5, [r4, #72] ; 0x48 800af84: 64e5 str r5, [r4, #76] ; 0x4c 800af86: e7e6 b.n 800af56 <__sfp+0x42> 800af88: 0800c52c .word 0x0800c52c 0800af8c <_fwalk_reent>: 800af8c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800af90: 4680 mov r8, r0 800af92: 4689 mov r9, r1 800af94: 2600 movs r6, #0 800af96: f100 0448 add.w r4, r0, #72 ; 0x48 800af9a: b914 cbnz r4, 800afa2 <_fwalk_reent+0x16> 800af9c: 4630 mov r0, r6 800af9e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800afa2: 68a5 ldr r5, [r4, #8] 800afa4: 6867 ldr r7, [r4, #4] 800afa6: 3f01 subs r7, #1 800afa8: d501 bpl.n 800afae <_fwalk_reent+0x22> 800afaa: 6824 ldr r4, [r4, #0] 800afac: e7f5 b.n 800af9a <_fwalk_reent+0xe> 800afae: 89ab ldrh r3, [r5, #12] 800afb0: 2b01 cmp r3, #1 800afb2: d907 bls.n 800afc4 <_fwalk_reent+0x38> 800afb4: f9b5 300e ldrsh.w r3, [r5, #14] 800afb8: 3301 adds r3, #1 800afba: d003 beq.n 800afc4 <_fwalk_reent+0x38> 800afbc: 4629 mov r1, r5 800afbe: 4640 mov r0, r8 800afc0: 47c8 blx r9 800afc2: 4306 orrs r6, r0 800afc4: 3568 adds r5, #104 ; 0x68 800afc6: e7ee b.n 800afa6 <_fwalk_reent+0x1a> 0800afc8 <_localeconv_r>: 800afc8: 4b04 ldr r3, [pc, #16] ; (800afdc <_localeconv_r+0x14>) 800afca: 681b ldr r3, [r3, #0] 800afcc: 6a18 ldr r0, [r3, #32] 800afce: 4b04 ldr r3, [pc, #16] ; (800afe0 <_localeconv_r+0x18>) 800afd0: 2800 cmp r0, #0 800afd2: bf08 it eq 800afd4: 4618 moveq r0, r3 800afd6: 30f0 adds r0, #240 ; 0xf0 800afd8: 4770 bx lr 800afda: bf00 nop 800afdc: 20000234 .word 0x20000234 800afe0: 20000298 .word 0x20000298 0800afe4 <__swhatbuf_r>: 800afe4: b570 push {r4, r5, r6, lr} 800afe6: 460e mov r6, r1 800afe8: f9b1 100e ldrsh.w r1, [r1, #14] 800afec: b090 sub sp, #64 ; 0x40 800afee: 2900 cmp r1, #0 800aff0: 4614 mov r4, r2 800aff2: 461d mov r5, r3 800aff4: da07 bge.n 800b006 <__swhatbuf_r+0x22> 800aff6: 2300 movs r3, #0 800aff8: 602b str r3, [r5, #0] 800affa: 89b3 ldrh r3, [r6, #12] 800affc: 061a lsls r2, r3, #24 800affe: d410 bmi.n 800b022 <__swhatbuf_r+0x3e> 800b000: f44f 6380 mov.w r3, #1024 ; 0x400 800b004: e00e b.n 800b024 <__swhatbuf_r+0x40> 800b006: aa01 add r2, sp, #4 800b008: f000 fda4 bl 800bb54 <_fstat_r> 800b00c: 2800 cmp r0, #0 800b00e: dbf2 blt.n 800aff6 <__swhatbuf_r+0x12> 800b010: 9a02 ldr r2, [sp, #8] 800b012: f402 4270 and.w r2, r2, #61440 ; 0xf000 800b016: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 800b01a: 425a negs r2, r3 800b01c: 415a adcs r2, r3 800b01e: 602a str r2, [r5, #0] 800b020: e7ee b.n 800b000 <__swhatbuf_r+0x1c> 800b022: 2340 movs r3, #64 ; 0x40 800b024: 2000 movs r0, #0 800b026: 6023 str r3, [r4, #0] 800b028: b010 add sp, #64 ; 0x40 800b02a: bd70 pop {r4, r5, r6, pc} 0800b02c <__smakebuf_r>: 800b02c: 898b ldrh r3, [r1, #12] 800b02e: b573 push {r0, r1, r4, r5, r6, lr} 800b030: 079d lsls r5, r3, #30 800b032: 4606 mov r6, r0 800b034: 460c mov r4, r1 800b036: d507 bpl.n 800b048 <__smakebuf_r+0x1c> 800b038: f104 0347 add.w r3, r4, #71 ; 0x47 800b03c: 6023 str r3, [r4, #0] 800b03e: 6123 str r3, [r4, #16] 800b040: 2301 movs r3, #1 800b042: 6163 str r3, [r4, #20] 800b044: b002 add sp, #8 800b046: bd70 pop {r4, r5, r6, pc} 800b048: ab01 add r3, sp, #4 800b04a: 466a mov r2, sp 800b04c: f7ff ffca bl 800afe4 <__swhatbuf_r> 800b050: 9900 ldr r1, [sp, #0] 800b052: 4605 mov r5, r0 800b054: 4630 mov r0, r6 800b056: f000 fb6b bl 800b730 <_malloc_r> 800b05a: b948 cbnz r0, 800b070 <__smakebuf_r+0x44> 800b05c: f9b4 300c ldrsh.w r3, [r4, #12] 800b060: 059a lsls r2, r3, #22 800b062: d4ef bmi.n 800b044 <__smakebuf_r+0x18> 800b064: f023 0303 bic.w r3, r3, #3 800b068: f043 0302 orr.w r3, r3, #2 800b06c: 81a3 strh r3, [r4, #12] 800b06e: e7e3 b.n 800b038 <__smakebuf_r+0xc> 800b070: 4b0d ldr r3, [pc, #52] ; (800b0a8 <__smakebuf_r+0x7c>) 800b072: 62b3 str r3, [r6, #40] ; 0x28 800b074: 89a3 ldrh r3, [r4, #12] 800b076: 6020 str r0, [r4, #0] 800b078: f043 0380 orr.w r3, r3, #128 ; 0x80 800b07c: 81a3 strh r3, [r4, #12] 800b07e: 9b00 ldr r3, [sp, #0] 800b080: 6120 str r0, [r4, #16] 800b082: 6163 str r3, [r4, #20] 800b084: 9b01 ldr r3, [sp, #4] 800b086: b15b cbz r3, 800b0a0 <__smakebuf_r+0x74> 800b088: f9b4 100e ldrsh.w r1, [r4, #14] 800b08c: 4630 mov r0, r6 800b08e: f000 fd73 bl 800bb78 <_isatty_r> 800b092: b128 cbz r0, 800b0a0 <__smakebuf_r+0x74> 800b094: 89a3 ldrh r3, [r4, #12] 800b096: f023 0303 bic.w r3, r3, #3 800b09a: f043 0301 orr.w r3, r3, #1 800b09e: 81a3 strh r3, [r4, #12] 800b0a0: 89a3 ldrh r3, [r4, #12] 800b0a2: 431d orrs r5, r3 800b0a4: 81a5 strh r5, [r4, #12] 800b0a6: e7cd b.n 800b044 <__smakebuf_r+0x18> 800b0a8: 0800ae35 .word 0x0800ae35 0800b0ac : 800b0ac: 4b02 ldr r3, [pc, #8] ; (800b0b8 ) 800b0ae: 4601 mov r1, r0 800b0b0: 6818 ldr r0, [r3, #0] 800b0b2: f000 bb3d b.w 800b730 <_malloc_r> 800b0b6: bf00 nop 800b0b8: 20000234 .word 0x20000234 0800b0bc : 800b0bc: b510 push {r4, lr} 800b0be: b2c9 uxtb r1, r1 800b0c0: 4402 add r2, r0 800b0c2: 4290 cmp r0, r2 800b0c4: 4603 mov r3, r0 800b0c6: d101 bne.n 800b0cc 800b0c8: 2000 movs r0, #0 800b0ca: bd10 pop {r4, pc} 800b0cc: 781c ldrb r4, [r3, #0] 800b0ce: 3001 adds r0, #1 800b0d0: 428c cmp r4, r1 800b0d2: d1f6 bne.n 800b0c2 800b0d4: 4618 mov r0, r3 800b0d6: bd10 pop {r4, pc} 0800b0d8 <_Balloc>: 800b0d8: b570 push {r4, r5, r6, lr} 800b0da: 6a45 ldr r5, [r0, #36] ; 0x24 800b0dc: 4604 mov r4, r0 800b0de: 460e mov r6, r1 800b0e0: b93d cbnz r5, 800b0f2 <_Balloc+0x1a> 800b0e2: 2010 movs r0, #16 800b0e4: f7ff ffe2 bl 800b0ac 800b0e8: 6260 str r0, [r4, #36] ; 0x24 800b0ea: 6045 str r5, [r0, #4] 800b0ec: 6085 str r5, [r0, #8] 800b0ee: 6005 str r5, [r0, #0] 800b0f0: 60c5 str r5, [r0, #12] 800b0f2: 6a65 ldr r5, [r4, #36] ; 0x24 800b0f4: 68eb ldr r3, [r5, #12] 800b0f6: b183 cbz r3, 800b11a <_Balloc+0x42> 800b0f8: 6a63 ldr r3, [r4, #36] ; 0x24 800b0fa: 68db ldr r3, [r3, #12] 800b0fc: f853 0026 ldr.w r0, [r3, r6, lsl #2] 800b100: b9b8 cbnz r0, 800b132 <_Balloc+0x5a> 800b102: 2101 movs r1, #1 800b104: fa01 f506 lsl.w r5, r1, r6 800b108: 1d6a adds r2, r5, #5 800b10a: 0092 lsls r2, r2, #2 800b10c: 4620 mov r0, r4 800b10e: f000 fab4 bl 800b67a <_calloc_r> 800b112: b160 cbz r0, 800b12e <_Balloc+0x56> 800b114: 6046 str r6, [r0, #4] 800b116: 6085 str r5, [r0, #8] 800b118: e00e b.n 800b138 <_Balloc+0x60> 800b11a: 2221 movs r2, #33 ; 0x21 800b11c: 2104 movs r1, #4 800b11e: 4620 mov r0, r4 800b120: f000 faab bl 800b67a <_calloc_r> 800b124: 6a63 ldr r3, [r4, #36] ; 0x24 800b126: 60e8 str r0, [r5, #12] 800b128: 68db ldr r3, [r3, #12] 800b12a: 2b00 cmp r3, #0 800b12c: d1e4 bne.n 800b0f8 <_Balloc+0x20> 800b12e: 2000 movs r0, #0 800b130: bd70 pop {r4, r5, r6, pc} 800b132: 6802 ldr r2, [r0, #0] 800b134: f843 2026 str.w r2, [r3, r6, lsl #2] 800b138: 2300 movs r3, #0 800b13a: 6103 str r3, [r0, #16] 800b13c: 60c3 str r3, [r0, #12] 800b13e: bd70 pop {r4, r5, r6, pc} 0800b140 <_Bfree>: 800b140: b570 push {r4, r5, r6, lr} 800b142: 6a44 ldr r4, [r0, #36] ; 0x24 800b144: 4606 mov r6, r0 800b146: 460d mov r5, r1 800b148: b93c cbnz r4, 800b15a <_Bfree+0x1a> 800b14a: 2010 movs r0, #16 800b14c: f7ff ffae bl 800b0ac 800b150: 6270 str r0, [r6, #36] ; 0x24 800b152: 6044 str r4, [r0, #4] 800b154: 6084 str r4, [r0, #8] 800b156: 6004 str r4, [r0, #0] 800b158: 60c4 str r4, [r0, #12] 800b15a: b13d cbz r5, 800b16c <_Bfree+0x2c> 800b15c: 6a73 ldr r3, [r6, #36] ; 0x24 800b15e: 686a ldr r2, [r5, #4] 800b160: 68db ldr r3, [r3, #12] 800b162: f853 1022 ldr.w r1, [r3, r2, lsl #2] 800b166: 6029 str r1, [r5, #0] 800b168: f843 5022 str.w r5, [r3, r2, lsl #2] 800b16c: bd70 pop {r4, r5, r6, pc} 0800b16e <__multadd>: 800b16e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800b172: 461f mov r7, r3 800b174: 4606 mov r6, r0 800b176: 460c mov r4, r1 800b178: 2300 movs r3, #0 800b17a: 690d ldr r5, [r1, #16] 800b17c: f101 0e14 add.w lr, r1, #20 800b180: f8de 0000 ldr.w r0, [lr] 800b184: 3301 adds r3, #1 800b186: b281 uxth r1, r0 800b188: fb02 7101 mla r1, r2, r1, r7 800b18c: 0c00 lsrs r0, r0, #16 800b18e: 0c0f lsrs r7, r1, #16 800b190: fb02 7000 mla r0, r2, r0, r7 800b194: b289 uxth r1, r1 800b196: eb01 4100 add.w r1, r1, r0, lsl #16 800b19a: 429d cmp r5, r3 800b19c: ea4f 4710 mov.w r7, r0, lsr #16 800b1a0: f84e 1b04 str.w r1, [lr], #4 800b1a4: dcec bgt.n 800b180 <__multadd+0x12> 800b1a6: b1d7 cbz r7, 800b1de <__multadd+0x70> 800b1a8: 68a3 ldr r3, [r4, #8] 800b1aa: 429d cmp r5, r3 800b1ac: db12 blt.n 800b1d4 <__multadd+0x66> 800b1ae: 6861 ldr r1, [r4, #4] 800b1b0: 4630 mov r0, r6 800b1b2: 3101 adds r1, #1 800b1b4: f7ff ff90 bl 800b0d8 <_Balloc> 800b1b8: 4680 mov r8, r0 800b1ba: 6922 ldr r2, [r4, #16] 800b1bc: f104 010c add.w r1, r4, #12 800b1c0: 3202 adds r2, #2 800b1c2: 0092 lsls r2, r2, #2 800b1c4: 300c adds r0, #12 800b1c6: f7fe f8bb bl 8009340 800b1ca: 4621 mov r1, r4 800b1cc: 4630 mov r0, r6 800b1ce: f7ff ffb7 bl 800b140 <_Bfree> 800b1d2: 4644 mov r4, r8 800b1d4: eb04 0385 add.w r3, r4, r5, lsl #2 800b1d8: 3501 adds r5, #1 800b1da: 615f str r7, [r3, #20] 800b1dc: 6125 str r5, [r4, #16] 800b1de: 4620 mov r0, r4 800b1e0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 0800b1e4 <__hi0bits>: 800b1e4: 0c02 lsrs r2, r0, #16 800b1e6: 0412 lsls r2, r2, #16 800b1e8: 4603 mov r3, r0 800b1ea: b9b2 cbnz r2, 800b21a <__hi0bits+0x36> 800b1ec: 0403 lsls r3, r0, #16 800b1ee: 2010 movs r0, #16 800b1f0: f013 4f7f tst.w r3, #4278190080 ; 0xff000000 800b1f4: bf04 itt eq 800b1f6: 021b lsleq r3, r3, #8 800b1f8: 3008 addeq r0, #8 800b1fa: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000 800b1fe: bf04 itt eq 800b200: 011b lsleq r3, r3, #4 800b202: 3004 addeq r0, #4 800b204: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000 800b208: bf04 itt eq 800b20a: 009b lsleq r3, r3, #2 800b20c: 3002 addeq r0, #2 800b20e: 2b00 cmp r3, #0 800b210: db06 blt.n 800b220 <__hi0bits+0x3c> 800b212: 005b lsls r3, r3, #1 800b214: d503 bpl.n 800b21e <__hi0bits+0x3a> 800b216: 3001 adds r0, #1 800b218: 4770 bx lr 800b21a: 2000 movs r0, #0 800b21c: e7e8 b.n 800b1f0 <__hi0bits+0xc> 800b21e: 2020 movs r0, #32 800b220: 4770 bx lr 0800b222 <__lo0bits>: 800b222: 6803 ldr r3, [r0, #0] 800b224: 4601 mov r1, r0 800b226: f013 0207 ands.w r2, r3, #7 800b22a: d00b beq.n 800b244 <__lo0bits+0x22> 800b22c: 07da lsls r2, r3, #31 800b22e: d423 bmi.n 800b278 <__lo0bits+0x56> 800b230: 0798 lsls r0, r3, #30 800b232: bf49 itett mi 800b234: 085b lsrmi r3, r3, #1 800b236: 089b lsrpl r3, r3, #2 800b238: 2001 movmi r0, #1 800b23a: 600b strmi r3, [r1, #0] 800b23c: bf5c itt pl 800b23e: 600b strpl r3, [r1, #0] 800b240: 2002 movpl r0, #2 800b242: 4770 bx lr 800b244: b298 uxth r0, r3 800b246: b9a8 cbnz r0, 800b274 <__lo0bits+0x52> 800b248: 2010 movs r0, #16 800b24a: 0c1b lsrs r3, r3, #16 800b24c: f013 0fff tst.w r3, #255 ; 0xff 800b250: bf04 itt eq 800b252: 0a1b lsreq r3, r3, #8 800b254: 3008 addeq r0, #8 800b256: 071a lsls r2, r3, #28 800b258: bf04 itt eq 800b25a: 091b lsreq r3, r3, #4 800b25c: 3004 addeq r0, #4 800b25e: 079a lsls r2, r3, #30 800b260: bf04 itt eq 800b262: 089b lsreq r3, r3, #2 800b264: 3002 addeq r0, #2 800b266: 07da lsls r2, r3, #31 800b268: d402 bmi.n 800b270 <__lo0bits+0x4e> 800b26a: 085b lsrs r3, r3, #1 800b26c: d006 beq.n 800b27c <__lo0bits+0x5a> 800b26e: 3001 adds r0, #1 800b270: 600b str r3, [r1, #0] 800b272: 4770 bx lr 800b274: 4610 mov r0, r2 800b276: e7e9 b.n 800b24c <__lo0bits+0x2a> 800b278: 2000 movs r0, #0 800b27a: 4770 bx lr 800b27c: 2020 movs r0, #32 800b27e: 4770 bx lr 0800b280 <__i2b>: 800b280: b510 push {r4, lr} 800b282: 460c mov r4, r1 800b284: 2101 movs r1, #1 800b286: f7ff ff27 bl 800b0d8 <_Balloc> 800b28a: 2201 movs r2, #1 800b28c: 6144 str r4, [r0, #20] 800b28e: 6102 str r2, [r0, #16] 800b290: bd10 pop {r4, pc} 0800b292 <__multiply>: 800b292: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b296: 4614 mov r4, r2 800b298: 690a ldr r2, [r1, #16] 800b29a: 6923 ldr r3, [r4, #16] 800b29c: 4689 mov r9, r1 800b29e: 429a cmp r2, r3 800b2a0: bfbe ittt lt 800b2a2: 460b movlt r3, r1 800b2a4: 46a1 movlt r9, r4 800b2a6: 461c movlt r4, r3 800b2a8: f8d9 7010 ldr.w r7, [r9, #16] 800b2ac: f8d4 a010 ldr.w sl, [r4, #16] 800b2b0: f8d9 3008 ldr.w r3, [r9, #8] 800b2b4: f8d9 1004 ldr.w r1, [r9, #4] 800b2b8: eb07 060a add.w r6, r7, sl 800b2bc: 429e cmp r6, r3 800b2be: bfc8 it gt 800b2c0: 3101 addgt r1, #1 800b2c2: f7ff ff09 bl 800b0d8 <_Balloc> 800b2c6: f100 0514 add.w r5, r0, #20 800b2ca: 462b mov r3, r5 800b2cc: 2200 movs r2, #0 800b2ce: eb05 0886 add.w r8, r5, r6, lsl #2 800b2d2: 4543 cmp r3, r8 800b2d4: d316 bcc.n 800b304 <__multiply+0x72> 800b2d6: f104 0214 add.w r2, r4, #20 800b2da: f109 0114 add.w r1, r9, #20 800b2de: eb02 038a add.w r3, r2, sl, lsl #2 800b2e2: eb01 0787 add.w r7, r1, r7, lsl #2 800b2e6: 9301 str r3, [sp, #4] 800b2e8: 9c01 ldr r4, [sp, #4] 800b2ea: 4613 mov r3, r2 800b2ec: 4294 cmp r4, r2 800b2ee: d80c bhi.n 800b30a <__multiply+0x78> 800b2f0: 2e00 cmp r6, #0 800b2f2: dd03 ble.n 800b2fc <__multiply+0x6a> 800b2f4: f858 3d04 ldr.w r3, [r8, #-4]! 800b2f8: 2b00 cmp r3, #0 800b2fa: d054 beq.n 800b3a6 <__multiply+0x114> 800b2fc: 6106 str r6, [r0, #16] 800b2fe: b003 add sp, #12 800b300: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b304: f843 2b04 str.w r2, [r3], #4 800b308: e7e3 b.n 800b2d2 <__multiply+0x40> 800b30a: f8b3 a000 ldrh.w sl, [r3] 800b30e: 3204 adds r2, #4 800b310: f1ba 0f00 cmp.w sl, #0 800b314: d020 beq.n 800b358 <__multiply+0xc6> 800b316: 46ae mov lr, r5 800b318: 4689 mov r9, r1 800b31a: f04f 0c00 mov.w ip, #0 800b31e: f859 4b04 ldr.w r4, [r9], #4 800b322: f8be b000 ldrh.w fp, [lr] 800b326: b2a3 uxth r3, r4 800b328: fb0a b303 mla r3, sl, r3, fp 800b32c: ea4f 4b14 mov.w fp, r4, lsr #16 800b330: f8de 4000 ldr.w r4, [lr] 800b334: 4463 add r3, ip 800b336: ea4f 4c14 mov.w ip, r4, lsr #16 800b33a: fb0a c40b mla r4, sl, fp, ip 800b33e: eb04 4413 add.w r4, r4, r3, lsr #16 800b342: b29b uxth r3, r3 800b344: ea43 4304 orr.w r3, r3, r4, lsl #16 800b348: 454f cmp r7, r9 800b34a: ea4f 4c14 mov.w ip, r4, lsr #16 800b34e: f84e 3b04 str.w r3, [lr], #4 800b352: d8e4 bhi.n 800b31e <__multiply+0x8c> 800b354: f8ce c000 str.w ip, [lr] 800b358: f832 9c02 ldrh.w r9, [r2, #-2] 800b35c: f1b9 0f00 cmp.w r9, #0 800b360: d01f beq.n 800b3a2 <__multiply+0x110> 800b362: 46ae mov lr, r5 800b364: 468c mov ip, r1 800b366: f04f 0a00 mov.w sl, #0 800b36a: 682b ldr r3, [r5, #0] 800b36c: f8bc 4000 ldrh.w r4, [ip] 800b370: f8be b002 ldrh.w fp, [lr, #2] 800b374: b29b uxth r3, r3 800b376: fb09 b404 mla r4, r9, r4, fp 800b37a: 44a2 add sl, r4 800b37c: ea43 430a orr.w r3, r3, sl, lsl #16 800b380: f84e 3b04 str.w r3, [lr], #4 800b384: f85c 3b04 ldr.w r3, [ip], #4 800b388: f8be 4000 ldrh.w r4, [lr] 800b38c: 0c1b lsrs r3, r3, #16 800b38e: fb09 4303 mla r3, r9, r3, r4 800b392: 4567 cmp r7, ip 800b394: eb03 431a add.w r3, r3, sl, lsr #16 800b398: ea4f 4a13 mov.w sl, r3, lsr #16 800b39c: d8e6 bhi.n 800b36c <__multiply+0xda> 800b39e: f8ce 3000 str.w r3, [lr] 800b3a2: 3504 adds r5, #4 800b3a4: e7a0 b.n 800b2e8 <__multiply+0x56> 800b3a6: 3e01 subs r6, #1 800b3a8: e7a2 b.n 800b2f0 <__multiply+0x5e> ... 0800b3ac <__pow5mult>: 800b3ac: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800b3b0: 4615 mov r5, r2 800b3b2: f012 0203 ands.w r2, r2, #3 800b3b6: 4606 mov r6, r0 800b3b8: 460f mov r7, r1 800b3ba: d007 beq.n 800b3cc <__pow5mult+0x20> 800b3bc: 4c21 ldr r4, [pc, #132] ; (800b444 <__pow5mult+0x98>) 800b3be: 3a01 subs r2, #1 800b3c0: 2300 movs r3, #0 800b3c2: f854 2022 ldr.w r2, [r4, r2, lsl #2] 800b3c6: f7ff fed2 bl 800b16e <__multadd> 800b3ca: 4607 mov r7, r0 800b3cc: 10ad asrs r5, r5, #2 800b3ce: d035 beq.n 800b43c <__pow5mult+0x90> 800b3d0: 6a74 ldr r4, [r6, #36] ; 0x24 800b3d2: b93c cbnz r4, 800b3e4 <__pow5mult+0x38> 800b3d4: 2010 movs r0, #16 800b3d6: f7ff fe69 bl 800b0ac 800b3da: 6270 str r0, [r6, #36] ; 0x24 800b3dc: 6044 str r4, [r0, #4] 800b3de: 6084 str r4, [r0, #8] 800b3e0: 6004 str r4, [r0, #0] 800b3e2: 60c4 str r4, [r0, #12] 800b3e4: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24 800b3e8: f8d8 4008 ldr.w r4, [r8, #8] 800b3ec: b94c cbnz r4, 800b402 <__pow5mult+0x56> 800b3ee: f240 2171 movw r1, #625 ; 0x271 800b3f2: 4630 mov r0, r6 800b3f4: f7ff ff44 bl 800b280 <__i2b> 800b3f8: 2300 movs r3, #0 800b3fa: 4604 mov r4, r0 800b3fc: f8c8 0008 str.w r0, [r8, #8] 800b400: 6003 str r3, [r0, #0] 800b402: f04f 0800 mov.w r8, #0 800b406: 07eb lsls r3, r5, #31 800b408: d50a bpl.n 800b420 <__pow5mult+0x74> 800b40a: 4639 mov r1, r7 800b40c: 4622 mov r2, r4 800b40e: 4630 mov r0, r6 800b410: f7ff ff3f bl 800b292 <__multiply> 800b414: 4681 mov r9, r0 800b416: 4639 mov r1, r7 800b418: 4630 mov r0, r6 800b41a: f7ff fe91 bl 800b140 <_Bfree> 800b41e: 464f mov r7, r9 800b420: 106d asrs r5, r5, #1 800b422: d00b beq.n 800b43c <__pow5mult+0x90> 800b424: 6820 ldr r0, [r4, #0] 800b426: b938 cbnz r0, 800b438 <__pow5mult+0x8c> 800b428: 4622 mov r2, r4 800b42a: 4621 mov r1, r4 800b42c: 4630 mov r0, r6 800b42e: f7ff ff30 bl 800b292 <__multiply> 800b432: 6020 str r0, [r4, #0] 800b434: f8c0 8000 str.w r8, [r0] 800b438: 4604 mov r4, r0 800b43a: e7e4 b.n 800b406 <__pow5mult+0x5a> 800b43c: 4638 mov r0, r7 800b43e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800b442: bf00 nop 800b444: 0800c6c8 .word 0x0800c6c8 0800b448 <__lshift>: 800b448: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b44c: 460c mov r4, r1 800b44e: 4607 mov r7, r0 800b450: 4616 mov r6, r2 800b452: 6923 ldr r3, [r4, #16] 800b454: ea4f 1a62 mov.w sl, r2, asr #5 800b458: eb0a 0903 add.w r9, sl, r3 800b45c: 6849 ldr r1, [r1, #4] 800b45e: 68a3 ldr r3, [r4, #8] 800b460: f109 0501 add.w r5, r9, #1 800b464: 42ab cmp r3, r5 800b466: db31 blt.n 800b4cc <__lshift+0x84> 800b468: 4638 mov r0, r7 800b46a: f7ff fe35 bl 800b0d8 <_Balloc> 800b46e: 2200 movs r2, #0 800b470: 4680 mov r8, r0 800b472: 4611 mov r1, r2 800b474: f100 0314 add.w r3, r0, #20 800b478: 4552 cmp r2, sl 800b47a: db2a blt.n 800b4d2 <__lshift+0x8a> 800b47c: 6920 ldr r0, [r4, #16] 800b47e: ea2a 7aea bic.w sl, sl, sl, asr #31 800b482: f104 0114 add.w r1, r4, #20 800b486: f016 021f ands.w r2, r6, #31 800b48a: eb03 038a add.w r3, r3, sl, lsl #2 800b48e: eb01 0e80 add.w lr, r1, r0, lsl #2 800b492: d022 beq.n 800b4da <__lshift+0x92> 800b494: 2000 movs r0, #0 800b496: f1c2 0c20 rsb ip, r2, #32 800b49a: 680e ldr r6, [r1, #0] 800b49c: 4096 lsls r6, r2 800b49e: 4330 orrs r0, r6 800b4a0: f843 0b04 str.w r0, [r3], #4 800b4a4: f851 0b04 ldr.w r0, [r1], #4 800b4a8: 458e cmp lr, r1 800b4aa: fa20 f00c lsr.w r0, r0, ip 800b4ae: d8f4 bhi.n 800b49a <__lshift+0x52> 800b4b0: 6018 str r0, [r3, #0] 800b4b2: b108 cbz r0, 800b4b8 <__lshift+0x70> 800b4b4: f109 0502 add.w r5, r9, #2 800b4b8: 3d01 subs r5, #1 800b4ba: 4638 mov r0, r7 800b4bc: f8c8 5010 str.w r5, [r8, #16] 800b4c0: 4621 mov r1, r4 800b4c2: f7ff fe3d bl 800b140 <_Bfree> 800b4c6: 4640 mov r0, r8 800b4c8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b4cc: 3101 adds r1, #1 800b4ce: 005b lsls r3, r3, #1 800b4d0: e7c8 b.n 800b464 <__lshift+0x1c> 800b4d2: f843 1022 str.w r1, [r3, r2, lsl #2] 800b4d6: 3201 adds r2, #1 800b4d8: e7ce b.n 800b478 <__lshift+0x30> 800b4da: 3b04 subs r3, #4 800b4dc: f851 2b04 ldr.w r2, [r1], #4 800b4e0: 458e cmp lr, r1 800b4e2: f843 2f04 str.w r2, [r3, #4]! 800b4e6: d8f9 bhi.n 800b4dc <__lshift+0x94> 800b4e8: e7e6 b.n 800b4b8 <__lshift+0x70> 0800b4ea <__mcmp>: 800b4ea: 6903 ldr r3, [r0, #16] 800b4ec: 690a ldr r2, [r1, #16] 800b4ee: b530 push {r4, r5, lr} 800b4f0: 1a9b subs r3, r3, r2 800b4f2: d10c bne.n 800b50e <__mcmp+0x24> 800b4f4: 0092 lsls r2, r2, #2 800b4f6: 3014 adds r0, #20 800b4f8: 3114 adds r1, #20 800b4fa: 1884 adds r4, r0, r2 800b4fc: 4411 add r1, r2 800b4fe: f854 5d04 ldr.w r5, [r4, #-4]! 800b502: f851 2d04 ldr.w r2, [r1, #-4]! 800b506: 4295 cmp r5, r2 800b508: d003 beq.n 800b512 <__mcmp+0x28> 800b50a: d305 bcc.n 800b518 <__mcmp+0x2e> 800b50c: 2301 movs r3, #1 800b50e: 4618 mov r0, r3 800b510: bd30 pop {r4, r5, pc} 800b512: 42a0 cmp r0, r4 800b514: d3f3 bcc.n 800b4fe <__mcmp+0x14> 800b516: e7fa b.n 800b50e <__mcmp+0x24> 800b518: f04f 33ff mov.w r3, #4294967295 800b51c: e7f7 b.n 800b50e <__mcmp+0x24> 0800b51e <__mdiff>: 800b51e: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b522: 460d mov r5, r1 800b524: 4607 mov r7, r0 800b526: 4611 mov r1, r2 800b528: 4628 mov r0, r5 800b52a: 4614 mov r4, r2 800b52c: f7ff ffdd bl 800b4ea <__mcmp> 800b530: 1e06 subs r6, r0, #0 800b532: d108 bne.n 800b546 <__mdiff+0x28> 800b534: 4631 mov r1, r6 800b536: 4638 mov r0, r7 800b538: f7ff fdce bl 800b0d8 <_Balloc> 800b53c: 2301 movs r3, #1 800b53e: 6146 str r6, [r0, #20] 800b540: 6103 str r3, [r0, #16] 800b542: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b546: bfa4 itt ge 800b548: 4623 movge r3, r4 800b54a: 462c movge r4, r5 800b54c: 4638 mov r0, r7 800b54e: 6861 ldr r1, [r4, #4] 800b550: bfa6 itte ge 800b552: 461d movge r5, r3 800b554: 2600 movge r6, #0 800b556: 2601 movlt r6, #1 800b558: f7ff fdbe bl 800b0d8 <_Balloc> 800b55c: f04f 0c00 mov.w ip, #0 800b560: 60c6 str r6, [r0, #12] 800b562: 692b ldr r3, [r5, #16] 800b564: 6926 ldr r6, [r4, #16] 800b566: f104 0214 add.w r2, r4, #20 800b56a: f105 0914 add.w r9, r5, #20 800b56e: eb02 0786 add.w r7, r2, r6, lsl #2 800b572: eb09 0883 add.w r8, r9, r3, lsl #2 800b576: f100 0114 add.w r1, r0, #20 800b57a: f852 ab04 ldr.w sl, [r2], #4 800b57e: f859 5b04 ldr.w r5, [r9], #4 800b582: fa1f f38a uxth.w r3, sl 800b586: 4463 add r3, ip 800b588: b2ac uxth r4, r5 800b58a: 1b1b subs r3, r3, r4 800b58c: 0c2c lsrs r4, r5, #16 800b58e: ebc4 441a rsb r4, r4, sl, lsr #16 800b592: eb04 4423 add.w r4, r4, r3, asr #16 800b596: b29b uxth r3, r3 800b598: ea4f 4c24 mov.w ip, r4, asr #16 800b59c: 45c8 cmp r8, r9 800b59e: ea43 4404 orr.w r4, r3, r4, lsl #16 800b5a2: 4696 mov lr, r2 800b5a4: f841 4b04 str.w r4, [r1], #4 800b5a8: d8e7 bhi.n 800b57a <__mdiff+0x5c> 800b5aa: 45be cmp lr, r7 800b5ac: d305 bcc.n 800b5ba <__mdiff+0x9c> 800b5ae: f851 3d04 ldr.w r3, [r1, #-4]! 800b5b2: b18b cbz r3, 800b5d8 <__mdiff+0xba> 800b5b4: 6106 str r6, [r0, #16] 800b5b6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b5ba: f85e 4b04 ldr.w r4, [lr], #4 800b5be: b2a2 uxth r2, r4 800b5c0: 4462 add r2, ip 800b5c2: 1413 asrs r3, r2, #16 800b5c4: eb03 4314 add.w r3, r3, r4, lsr #16 800b5c8: b292 uxth r2, r2 800b5ca: ea42 4203 orr.w r2, r2, r3, lsl #16 800b5ce: ea4f 4c23 mov.w ip, r3, asr #16 800b5d2: f841 2b04 str.w r2, [r1], #4 800b5d6: e7e8 b.n 800b5aa <__mdiff+0x8c> 800b5d8: 3e01 subs r6, #1 800b5da: e7e8 b.n 800b5ae <__mdiff+0x90> 0800b5dc <__d2b>: 800b5dc: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} 800b5e0: 461c mov r4, r3 800b5e2: 2101 movs r1, #1 800b5e4: 4690 mov r8, r2 800b5e6: 9e08 ldr r6, [sp, #32] 800b5e8: 9d09 ldr r5, [sp, #36] ; 0x24 800b5ea: f7ff fd75 bl 800b0d8 <_Balloc> 800b5ee: f3c4 0213 ubfx r2, r4, #0, #20 800b5f2: f3c4 540a ubfx r4, r4, #20, #11 800b5f6: 4607 mov r7, r0 800b5f8: bb34 cbnz r4, 800b648 <__d2b+0x6c> 800b5fa: 9201 str r2, [sp, #4] 800b5fc: f1b8 0f00 cmp.w r8, #0 800b600: d027 beq.n 800b652 <__d2b+0x76> 800b602: a802 add r0, sp, #8 800b604: f840 8d08 str.w r8, [r0, #-8]! 800b608: f7ff fe0b bl 800b222 <__lo0bits> 800b60c: 9900 ldr r1, [sp, #0] 800b60e: b1f0 cbz r0, 800b64e <__d2b+0x72> 800b610: 9a01 ldr r2, [sp, #4] 800b612: f1c0 0320 rsb r3, r0, #32 800b616: fa02 f303 lsl.w r3, r2, r3 800b61a: 430b orrs r3, r1 800b61c: 40c2 lsrs r2, r0 800b61e: 617b str r3, [r7, #20] 800b620: 9201 str r2, [sp, #4] 800b622: 9b01 ldr r3, [sp, #4] 800b624: 2b00 cmp r3, #0 800b626: bf14 ite ne 800b628: 2102 movne r1, #2 800b62a: 2101 moveq r1, #1 800b62c: 61bb str r3, [r7, #24] 800b62e: 6139 str r1, [r7, #16] 800b630: b1c4 cbz r4, 800b664 <__d2b+0x88> 800b632: f2a4 4433 subw r4, r4, #1075 ; 0x433 800b636: 4404 add r4, r0 800b638: 6034 str r4, [r6, #0] 800b63a: f1c0 0035 rsb r0, r0, #53 ; 0x35 800b63e: 6028 str r0, [r5, #0] 800b640: 4638 mov r0, r7 800b642: b002 add sp, #8 800b644: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800b648: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 800b64c: e7d5 b.n 800b5fa <__d2b+0x1e> 800b64e: 6179 str r1, [r7, #20] 800b650: e7e7 b.n 800b622 <__d2b+0x46> 800b652: a801 add r0, sp, #4 800b654: f7ff fde5 bl 800b222 <__lo0bits> 800b658: 2101 movs r1, #1 800b65a: 9b01 ldr r3, [sp, #4] 800b65c: 6139 str r1, [r7, #16] 800b65e: 617b str r3, [r7, #20] 800b660: 3020 adds r0, #32 800b662: e7e5 b.n 800b630 <__d2b+0x54> 800b664: f2a0 4032 subw r0, r0, #1074 ; 0x432 800b668: eb07 0381 add.w r3, r7, r1, lsl #2 800b66c: 6030 str r0, [r6, #0] 800b66e: 6918 ldr r0, [r3, #16] 800b670: f7ff fdb8 bl 800b1e4 <__hi0bits> 800b674: ebc0 1041 rsb r0, r0, r1, lsl #5 800b678: e7e1 b.n 800b63e <__d2b+0x62> 0800b67a <_calloc_r>: 800b67a: b538 push {r3, r4, r5, lr} 800b67c: fb02 f401 mul.w r4, r2, r1 800b680: 4621 mov r1, r4 800b682: f000 f855 bl 800b730 <_malloc_r> 800b686: 4605 mov r5, r0 800b688: b118 cbz r0, 800b692 <_calloc_r+0x18> 800b68a: 4622 mov r2, r4 800b68c: 2100 movs r1, #0 800b68e: f7fd fe62 bl 8009356 800b692: 4628 mov r0, r5 800b694: bd38 pop {r3, r4, r5, pc} ... 0800b698 <_free_r>: 800b698: b538 push {r3, r4, r5, lr} 800b69a: 4605 mov r5, r0 800b69c: 2900 cmp r1, #0 800b69e: d043 beq.n 800b728 <_free_r+0x90> 800b6a0: f851 3c04 ldr.w r3, [r1, #-4] 800b6a4: 1f0c subs r4, r1, #4 800b6a6: 2b00 cmp r3, #0 800b6a8: bfb8 it lt 800b6aa: 18e4 addlt r4, r4, r3 800b6ac: f000 fa98 bl 800bbe0 <__malloc_lock> 800b6b0: 4a1e ldr r2, [pc, #120] ; (800b72c <_free_r+0x94>) 800b6b2: 6813 ldr r3, [r2, #0] 800b6b4: 4610 mov r0, r2 800b6b6: b933 cbnz r3, 800b6c6 <_free_r+0x2e> 800b6b8: 6063 str r3, [r4, #4] 800b6ba: 6014 str r4, [r2, #0] 800b6bc: 4628 mov r0, r5 800b6be: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800b6c2: f000 ba8e b.w 800bbe2 <__malloc_unlock> 800b6c6: 42a3 cmp r3, r4 800b6c8: d90b bls.n 800b6e2 <_free_r+0x4a> 800b6ca: 6821 ldr r1, [r4, #0] 800b6cc: 1862 adds r2, r4, r1 800b6ce: 4293 cmp r3, r2 800b6d0: bf01 itttt eq 800b6d2: 681a ldreq r2, [r3, #0] 800b6d4: 685b ldreq r3, [r3, #4] 800b6d6: 1852 addeq r2, r2, r1 800b6d8: 6022 streq r2, [r4, #0] 800b6da: 6063 str r3, [r4, #4] 800b6dc: 6004 str r4, [r0, #0] 800b6de: e7ed b.n 800b6bc <_free_r+0x24> 800b6e0: 4613 mov r3, r2 800b6e2: 685a ldr r2, [r3, #4] 800b6e4: b10a cbz r2, 800b6ea <_free_r+0x52> 800b6e6: 42a2 cmp r2, r4 800b6e8: d9fa bls.n 800b6e0 <_free_r+0x48> 800b6ea: 6819 ldr r1, [r3, #0] 800b6ec: 1858 adds r0, r3, r1 800b6ee: 42a0 cmp r0, r4 800b6f0: d10b bne.n 800b70a <_free_r+0x72> 800b6f2: 6820 ldr r0, [r4, #0] 800b6f4: 4401 add r1, r0 800b6f6: 1858 adds r0, r3, r1 800b6f8: 4282 cmp r2, r0 800b6fa: 6019 str r1, [r3, #0] 800b6fc: d1de bne.n 800b6bc <_free_r+0x24> 800b6fe: 6810 ldr r0, [r2, #0] 800b700: 6852 ldr r2, [r2, #4] 800b702: 4401 add r1, r0 800b704: 6019 str r1, [r3, #0] 800b706: 605a str r2, [r3, #4] 800b708: e7d8 b.n 800b6bc <_free_r+0x24> 800b70a: d902 bls.n 800b712 <_free_r+0x7a> 800b70c: 230c movs r3, #12 800b70e: 602b str r3, [r5, #0] 800b710: e7d4 b.n 800b6bc <_free_r+0x24> 800b712: 6820 ldr r0, [r4, #0] 800b714: 1821 adds r1, r4, r0 800b716: 428a cmp r2, r1 800b718: bf01 itttt eq 800b71a: 6811 ldreq r1, [r2, #0] 800b71c: 6852 ldreq r2, [r2, #4] 800b71e: 1809 addeq r1, r1, r0 800b720: 6021 streq r1, [r4, #0] 800b722: 6062 str r2, [r4, #4] 800b724: 605c str r4, [r3, #4] 800b726: e7c9 b.n 800b6bc <_free_r+0x24> 800b728: bd38 pop {r3, r4, r5, pc} 800b72a: bf00 nop 800b72c: 20000434 .word 0x20000434 0800b730 <_malloc_r>: 800b730: b570 push {r4, r5, r6, lr} 800b732: 1ccd adds r5, r1, #3 800b734: f025 0503 bic.w r5, r5, #3 800b738: 3508 adds r5, #8 800b73a: 2d0c cmp r5, #12 800b73c: bf38 it cc 800b73e: 250c movcc r5, #12 800b740: 2d00 cmp r5, #0 800b742: 4606 mov r6, r0 800b744: db01 blt.n 800b74a <_malloc_r+0x1a> 800b746: 42a9 cmp r1, r5 800b748: d903 bls.n 800b752 <_malloc_r+0x22> 800b74a: 230c movs r3, #12 800b74c: 6033 str r3, [r6, #0] 800b74e: 2000 movs r0, #0 800b750: bd70 pop {r4, r5, r6, pc} 800b752: f000 fa45 bl 800bbe0 <__malloc_lock> 800b756: 4a23 ldr r2, [pc, #140] ; (800b7e4 <_malloc_r+0xb4>) 800b758: 6814 ldr r4, [r2, #0] 800b75a: 4621 mov r1, r4 800b75c: b991 cbnz r1, 800b784 <_malloc_r+0x54> 800b75e: 4c22 ldr r4, [pc, #136] ; (800b7e8 <_malloc_r+0xb8>) 800b760: 6823 ldr r3, [r4, #0] 800b762: b91b cbnz r3, 800b76c <_malloc_r+0x3c> 800b764: 4630 mov r0, r6 800b766: f000 f97f bl 800ba68 <_sbrk_r> 800b76a: 6020 str r0, [r4, #0] 800b76c: 4629 mov r1, r5 800b76e: 4630 mov r0, r6 800b770: f000 f97a bl 800ba68 <_sbrk_r> 800b774: 1c43 adds r3, r0, #1 800b776: d126 bne.n 800b7c6 <_malloc_r+0x96> 800b778: 230c movs r3, #12 800b77a: 4630 mov r0, r6 800b77c: 6033 str r3, [r6, #0] 800b77e: f000 fa30 bl 800bbe2 <__malloc_unlock> 800b782: e7e4 b.n 800b74e <_malloc_r+0x1e> 800b784: 680b ldr r3, [r1, #0] 800b786: 1b5b subs r3, r3, r5 800b788: d41a bmi.n 800b7c0 <_malloc_r+0x90> 800b78a: 2b0b cmp r3, #11 800b78c: d90f bls.n 800b7ae <_malloc_r+0x7e> 800b78e: 600b str r3, [r1, #0] 800b790: 18cc adds r4, r1, r3 800b792: 50cd str r5, [r1, r3] 800b794: 4630 mov r0, r6 800b796: f000 fa24 bl 800bbe2 <__malloc_unlock> 800b79a: f104 000b add.w r0, r4, #11 800b79e: 1d23 adds r3, r4, #4 800b7a0: f020 0007 bic.w r0, r0, #7 800b7a4: 1ac3 subs r3, r0, r3 800b7a6: d01b beq.n 800b7e0 <_malloc_r+0xb0> 800b7a8: 425a negs r2, r3 800b7aa: 50e2 str r2, [r4, r3] 800b7ac: bd70 pop {r4, r5, r6, pc} 800b7ae: 428c cmp r4, r1 800b7b0: bf0b itete eq 800b7b2: 6863 ldreq r3, [r4, #4] 800b7b4: 684b ldrne r3, [r1, #4] 800b7b6: 6013 streq r3, [r2, #0] 800b7b8: 6063 strne r3, [r4, #4] 800b7ba: bf18 it ne 800b7bc: 460c movne r4, r1 800b7be: e7e9 b.n 800b794 <_malloc_r+0x64> 800b7c0: 460c mov r4, r1 800b7c2: 6849 ldr r1, [r1, #4] 800b7c4: e7ca b.n 800b75c <_malloc_r+0x2c> 800b7c6: 1cc4 adds r4, r0, #3 800b7c8: f024 0403 bic.w r4, r4, #3 800b7cc: 42a0 cmp r0, r4 800b7ce: d005 beq.n 800b7dc <_malloc_r+0xac> 800b7d0: 1a21 subs r1, r4, r0 800b7d2: 4630 mov r0, r6 800b7d4: f000 f948 bl 800ba68 <_sbrk_r> 800b7d8: 3001 adds r0, #1 800b7da: d0cd beq.n 800b778 <_malloc_r+0x48> 800b7dc: 6025 str r5, [r4, #0] 800b7de: e7d9 b.n 800b794 <_malloc_r+0x64> 800b7e0: bd70 pop {r4, r5, r6, pc} 800b7e2: bf00 nop 800b7e4: 20000434 .word 0x20000434 800b7e8: 20000438 .word 0x20000438 0800b7ec <__sfputc_r>: 800b7ec: 6893 ldr r3, [r2, #8] 800b7ee: b410 push {r4} 800b7f0: 3b01 subs r3, #1 800b7f2: 2b00 cmp r3, #0 800b7f4: 6093 str r3, [r2, #8] 800b7f6: da08 bge.n 800b80a <__sfputc_r+0x1e> 800b7f8: 6994 ldr r4, [r2, #24] 800b7fa: 42a3 cmp r3, r4 800b7fc: db02 blt.n 800b804 <__sfputc_r+0x18> 800b7fe: b2cb uxtb r3, r1 800b800: 2b0a cmp r3, #10 800b802: d102 bne.n 800b80a <__sfputc_r+0x1e> 800b804: bc10 pop {r4} 800b806: f7fe bb41 b.w 8009e8c <__swbuf_r> 800b80a: 6813 ldr r3, [r2, #0] 800b80c: 1c58 adds r0, r3, #1 800b80e: 6010 str r0, [r2, #0] 800b810: 7019 strb r1, [r3, #0] 800b812: b2c8 uxtb r0, r1 800b814: bc10 pop {r4} 800b816: 4770 bx lr 0800b818 <__sfputs_r>: 800b818: b5f8 push {r3, r4, r5, r6, r7, lr} 800b81a: 4606 mov r6, r0 800b81c: 460f mov r7, r1 800b81e: 4614 mov r4, r2 800b820: 18d5 adds r5, r2, r3 800b822: 42ac cmp r4, r5 800b824: d101 bne.n 800b82a <__sfputs_r+0x12> 800b826: 2000 movs r0, #0 800b828: e007 b.n 800b83a <__sfputs_r+0x22> 800b82a: 463a mov r2, r7 800b82c: f814 1b01 ldrb.w r1, [r4], #1 800b830: 4630 mov r0, r6 800b832: f7ff ffdb bl 800b7ec <__sfputc_r> 800b836: 1c43 adds r3, r0, #1 800b838: d1f3 bne.n 800b822 <__sfputs_r+0xa> 800b83a: bdf8 pop {r3, r4, r5, r6, r7, pc} 0800b83c <_vfiprintf_r>: 800b83c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b840: b09d sub sp, #116 ; 0x74 800b842: 460c mov r4, r1 800b844: 4617 mov r7, r2 800b846: 9303 str r3, [sp, #12] 800b848: 4606 mov r6, r0 800b84a: b118 cbz r0, 800b854 <_vfiprintf_r+0x18> 800b84c: 6983 ldr r3, [r0, #24] 800b84e: b90b cbnz r3, 800b854 <_vfiprintf_r+0x18> 800b850: f7ff fb30 bl 800aeb4 <__sinit> 800b854: 4b7c ldr r3, [pc, #496] ; (800ba48 <_vfiprintf_r+0x20c>) 800b856: 429c cmp r4, r3 800b858: d157 bne.n 800b90a <_vfiprintf_r+0xce> 800b85a: 6874 ldr r4, [r6, #4] 800b85c: 89a3 ldrh r3, [r4, #12] 800b85e: 0718 lsls r0, r3, #28 800b860: d55d bpl.n 800b91e <_vfiprintf_r+0xe2> 800b862: 6923 ldr r3, [r4, #16] 800b864: 2b00 cmp r3, #0 800b866: d05a beq.n 800b91e <_vfiprintf_r+0xe2> 800b868: 2300 movs r3, #0 800b86a: 9309 str r3, [sp, #36] ; 0x24 800b86c: 2320 movs r3, #32 800b86e: f88d 3029 strb.w r3, [sp, #41] ; 0x29 800b872: 2330 movs r3, #48 ; 0x30 800b874: f04f 0b01 mov.w fp, #1 800b878: f88d 302a strb.w r3, [sp, #42] ; 0x2a 800b87c: 46b8 mov r8, r7 800b87e: 4645 mov r5, r8 800b880: f815 3b01 ldrb.w r3, [r5], #1 800b884: 2b00 cmp r3, #0 800b886: d155 bne.n 800b934 <_vfiprintf_r+0xf8> 800b888: ebb8 0a07 subs.w sl, r8, r7 800b88c: d00b beq.n 800b8a6 <_vfiprintf_r+0x6a> 800b88e: 4653 mov r3, sl 800b890: 463a mov r2, r7 800b892: 4621 mov r1, r4 800b894: 4630 mov r0, r6 800b896: f7ff ffbf bl 800b818 <__sfputs_r> 800b89a: 3001 adds r0, #1 800b89c: f000 80c4 beq.w 800ba28 <_vfiprintf_r+0x1ec> 800b8a0: 9b09 ldr r3, [sp, #36] ; 0x24 800b8a2: 4453 add r3, sl 800b8a4: 9309 str r3, [sp, #36] ; 0x24 800b8a6: f898 3000 ldrb.w r3, [r8] 800b8aa: 2b00 cmp r3, #0 800b8ac: f000 80bc beq.w 800ba28 <_vfiprintf_r+0x1ec> 800b8b0: 2300 movs r3, #0 800b8b2: f04f 32ff mov.w r2, #4294967295 800b8b6: 9304 str r3, [sp, #16] 800b8b8: 9307 str r3, [sp, #28] 800b8ba: 9205 str r2, [sp, #20] 800b8bc: 9306 str r3, [sp, #24] 800b8be: f88d 3053 strb.w r3, [sp, #83] ; 0x53 800b8c2: 931a str r3, [sp, #104] ; 0x68 800b8c4: 2205 movs r2, #5 800b8c6: 7829 ldrb r1, [r5, #0] 800b8c8: 4860 ldr r0, [pc, #384] ; (800ba4c <_vfiprintf_r+0x210>) 800b8ca: f7ff fbf7 bl 800b0bc 800b8ce: f105 0801 add.w r8, r5, #1 800b8d2: 9b04 ldr r3, [sp, #16] 800b8d4: 2800 cmp r0, #0 800b8d6: d131 bne.n 800b93c <_vfiprintf_r+0x100> 800b8d8: 06d9 lsls r1, r3, #27 800b8da: bf44 itt mi 800b8dc: 2220 movmi r2, #32 800b8de: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800b8e2: 071a lsls r2, r3, #28 800b8e4: bf44 itt mi 800b8e6: 222b movmi r2, #43 ; 0x2b 800b8e8: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 800b8ec: 782a ldrb r2, [r5, #0] 800b8ee: 2a2a cmp r2, #42 ; 0x2a 800b8f0: d02c beq.n 800b94c <_vfiprintf_r+0x110> 800b8f2: 2100 movs r1, #0 800b8f4: 200a movs r0, #10 800b8f6: 9a07 ldr r2, [sp, #28] 800b8f8: 46a8 mov r8, r5 800b8fa: f898 3000 ldrb.w r3, [r8] 800b8fe: 3501 adds r5, #1 800b900: 3b30 subs r3, #48 ; 0x30 800b902: 2b09 cmp r3, #9 800b904: d96d bls.n 800b9e2 <_vfiprintf_r+0x1a6> 800b906: b371 cbz r1, 800b966 <_vfiprintf_r+0x12a> 800b908: e026 b.n 800b958 <_vfiprintf_r+0x11c> 800b90a: 4b51 ldr r3, [pc, #324] ; (800ba50 <_vfiprintf_r+0x214>) 800b90c: 429c cmp r4, r3 800b90e: d101 bne.n 800b914 <_vfiprintf_r+0xd8> 800b910: 68b4 ldr r4, [r6, #8] 800b912: e7a3 b.n 800b85c <_vfiprintf_r+0x20> 800b914: 4b4f ldr r3, [pc, #316] ; (800ba54 <_vfiprintf_r+0x218>) 800b916: 429c cmp r4, r3 800b918: bf08 it eq 800b91a: 68f4 ldreq r4, [r6, #12] 800b91c: e79e b.n 800b85c <_vfiprintf_r+0x20> 800b91e: 4621 mov r1, r4 800b920: 4630 mov r0, r6 800b922: f7fe fb05 bl 8009f30 <__swsetup_r> 800b926: 2800 cmp r0, #0 800b928: d09e beq.n 800b868 <_vfiprintf_r+0x2c> 800b92a: f04f 30ff mov.w r0, #4294967295 800b92e: b01d add sp, #116 ; 0x74 800b930: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b934: 2b25 cmp r3, #37 ; 0x25 800b936: d0a7 beq.n 800b888 <_vfiprintf_r+0x4c> 800b938: 46a8 mov r8, r5 800b93a: e7a0 b.n 800b87e <_vfiprintf_r+0x42> 800b93c: 4a43 ldr r2, [pc, #268] ; (800ba4c <_vfiprintf_r+0x210>) 800b93e: 4645 mov r5, r8 800b940: 1a80 subs r0, r0, r2 800b942: fa0b f000 lsl.w r0, fp, r0 800b946: 4318 orrs r0, r3 800b948: 9004 str r0, [sp, #16] 800b94a: e7bb b.n 800b8c4 <_vfiprintf_r+0x88> 800b94c: 9a03 ldr r2, [sp, #12] 800b94e: 1d11 adds r1, r2, #4 800b950: 6812 ldr r2, [r2, #0] 800b952: 9103 str r1, [sp, #12] 800b954: 2a00 cmp r2, #0 800b956: db01 blt.n 800b95c <_vfiprintf_r+0x120> 800b958: 9207 str r2, [sp, #28] 800b95a: e004 b.n 800b966 <_vfiprintf_r+0x12a> 800b95c: 4252 negs r2, r2 800b95e: f043 0302 orr.w r3, r3, #2 800b962: 9207 str r2, [sp, #28] 800b964: 9304 str r3, [sp, #16] 800b966: f898 3000 ldrb.w r3, [r8] 800b96a: 2b2e cmp r3, #46 ; 0x2e 800b96c: d110 bne.n 800b990 <_vfiprintf_r+0x154> 800b96e: f898 3001 ldrb.w r3, [r8, #1] 800b972: f108 0101 add.w r1, r8, #1 800b976: 2b2a cmp r3, #42 ; 0x2a 800b978: d137 bne.n 800b9ea <_vfiprintf_r+0x1ae> 800b97a: 9b03 ldr r3, [sp, #12] 800b97c: f108 0802 add.w r8, r8, #2 800b980: 1d1a adds r2, r3, #4 800b982: 681b ldr r3, [r3, #0] 800b984: 9203 str r2, [sp, #12] 800b986: 2b00 cmp r3, #0 800b988: bfb8 it lt 800b98a: f04f 33ff movlt.w r3, #4294967295 800b98e: 9305 str r3, [sp, #20] 800b990: 4d31 ldr r5, [pc, #196] ; (800ba58 <_vfiprintf_r+0x21c>) 800b992: 2203 movs r2, #3 800b994: f898 1000 ldrb.w r1, [r8] 800b998: 4628 mov r0, r5 800b99a: f7ff fb8f bl 800b0bc 800b99e: b140 cbz r0, 800b9b2 <_vfiprintf_r+0x176> 800b9a0: 2340 movs r3, #64 ; 0x40 800b9a2: 1b40 subs r0, r0, r5 800b9a4: fa03 f000 lsl.w r0, r3, r0 800b9a8: 9b04 ldr r3, [sp, #16] 800b9aa: f108 0801 add.w r8, r8, #1 800b9ae: 4303 orrs r3, r0 800b9b0: 9304 str r3, [sp, #16] 800b9b2: f898 1000 ldrb.w r1, [r8] 800b9b6: 2206 movs r2, #6 800b9b8: 4828 ldr r0, [pc, #160] ; (800ba5c <_vfiprintf_r+0x220>) 800b9ba: f108 0701 add.w r7, r8, #1 800b9be: f88d 1028 strb.w r1, [sp, #40] ; 0x28 800b9c2: f7ff fb7b bl 800b0bc 800b9c6: 2800 cmp r0, #0 800b9c8: d034 beq.n 800ba34 <_vfiprintf_r+0x1f8> 800b9ca: 4b25 ldr r3, [pc, #148] ; (800ba60 <_vfiprintf_r+0x224>) 800b9cc: bb03 cbnz r3, 800ba10 <_vfiprintf_r+0x1d4> 800b9ce: 9b03 ldr r3, [sp, #12] 800b9d0: 3307 adds r3, #7 800b9d2: f023 0307 bic.w r3, r3, #7 800b9d6: 3308 adds r3, #8 800b9d8: 9303 str r3, [sp, #12] 800b9da: 9b09 ldr r3, [sp, #36] ; 0x24 800b9dc: 444b add r3, r9 800b9de: 9309 str r3, [sp, #36] ; 0x24 800b9e0: e74c b.n 800b87c <_vfiprintf_r+0x40> 800b9e2: fb00 3202 mla r2, r0, r2, r3 800b9e6: 2101 movs r1, #1 800b9e8: e786 b.n 800b8f8 <_vfiprintf_r+0xbc> 800b9ea: 2300 movs r3, #0 800b9ec: 250a movs r5, #10 800b9ee: 4618 mov r0, r3 800b9f0: 9305 str r3, [sp, #20] 800b9f2: 4688 mov r8, r1 800b9f4: f898 2000 ldrb.w r2, [r8] 800b9f8: 3101 adds r1, #1 800b9fa: 3a30 subs r2, #48 ; 0x30 800b9fc: 2a09 cmp r2, #9 800b9fe: d903 bls.n 800ba08 <_vfiprintf_r+0x1cc> 800ba00: 2b00 cmp r3, #0 800ba02: d0c5 beq.n 800b990 <_vfiprintf_r+0x154> 800ba04: 9005 str r0, [sp, #20] 800ba06: e7c3 b.n 800b990 <_vfiprintf_r+0x154> 800ba08: fb05 2000 mla r0, r5, r0, r2 800ba0c: 2301 movs r3, #1 800ba0e: e7f0 b.n 800b9f2 <_vfiprintf_r+0x1b6> 800ba10: ab03 add r3, sp, #12 800ba12: 9300 str r3, [sp, #0] 800ba14: 4622 mov r2, r4 800ba16: 4b13 ldr r3, [pc, #76] ; (800ba64 <_vfiprintf_r+0x228>) 800ba18: a904 add r1, sp, #16 800ba1a: 4630 mov r0, r6 800ba1c: f7fd fd34 bl 8009488 <_printf_float> 800ba20: f1b0 3fff cmp.w r0, #4294967295 800ba24: 4681 mov r9, r0 800ba26: d1d8 bne.n 800b9da <_vfiprintf_r+0x19e> 800ba28: 89a3 ldrh r3, [r4, #12] 800ba2a: 065b lsls r3, r3, #25 800ba2c: f53f af7d bmi.w 800b92a <_vfiprintf_r+0xee> 800ba30: 9809 ldr r0, [sp, #36] ; 0x24 800ba32: e77c b.n 800b92e <_vfiprintf_r+0xf2> 800ba34: ab03 add r3, sp, #12 800ba36: 9300 str r3, [sp, #0] 800ba38: 4622 mov r2, r4 800ba3a: 4b0a ldr r3, [pc, #40] ; (800ba64 <_vfiprintf_r+0x228>) 800ba3c: a904 add r1, sp, #16 800ba3e: 4630 mov r0, r6 800ba40: f7fd ffd2 bl 80099e8 <_printf_i> 800ba44: e7ec b.n 800ba20 <_vfiprintf_r+0x1e4> 800ba46: bf00 nop 800ba48: 0800c594 .word 0x0800c594 800ba4c: 0800c6d4 .word 0x0800c6d4 800ba50: 0800c5b4 .word 0x0800c5b4 800ba54: 0800c574 .word 0x0800c574 800ba58: 0800c6da .word 0x0800c6da 800ba5c: 0800c6de .word 0x0800c6de 800ba60: 08009489 .word 0x08009489 800ba64: 0800b819 .word 0x0800b819 0800ba68 <_sbrk_r>: 800ba68: b538 push {r3, r4, r5, lr} 800ba6a: 2300 movs r3, #0 800ba6c: 4c05 ldr r4, [pc, #20] ; (800ba84 <_sbrk_r+0x1c>) 800ba6e: 4605 mov r5, r0 800ba70: 4608 mov r0, r1 800ba72: 6023 str r3, [r4, #0] 800ba74: f7fc fed0 bl 8008818 <_sbrk> 800ba78: 1c43 adds r3, r0, #1 800ba7a: d102 bne.n 800ba82 <_sbrk_r+0x1a> 800ba7c: 6823 ldr r3, [r4, #0] 800ba7e: b103 cbz r3, 800ba82 <_sbrk_r+0x1a> 800ba80: 602b str r3, [r5, #0] 800ba82: bd38 pop {r3, r4, r5, pc} 800ba84: 200016fc .word 0x200016fc 0800ba88 <__sread>: 800ba88: b510 push {r4, lr} 800ba8a: 460c mov r4, r1 800ba8c: f9b1 100e ldrsh.w r1, [r1, #14] 800ba90: f000 f8a8 bl 800bbe4 <_read_r> 800ba94: 2800 cmp r0, #0 800ba96: bfab itete ge 800ba98: 6d63 ldrge r3, [r4, #84] ; 0x54 800ba9a: 89a3 ldrhlt r3, [r4, #12] 800ba9c: 181b addge r3, r3, r0 800ba9e: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 800baa2: bfac ite ge 800baa4: 6563 strge r3, [r4, #84] ; 0x54 800baa6: 81a3 strhlt r3, [r4, #12] 800baa8: bd10 pop {r4, pc} 0800baaa <__swrite>: 800baaa: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800baae: 461f mov r7, r3 800bab0: 898b ldrh r3, [r1, #12] 800bab2: 4605 mov r5, r0 800bab4: 05db lsls r3, r3, #23 800bab6: 460c mov r4, r1 800bab8: 4616 mov r6, r2 800baba: d505 bpl.n 800bac8 <__swrite+0x1e> 800babc: 2302 movs r3, #2 800babe: 2200 movs r2, #0 800bac0: f9b1 100e ldrsh.w r1, [r1, #14] 800bac4: f000 f868 bl 800bb98 <_lseek_r> 800bac8: 89a3 ldrh r3, [r4, #12] 800baca: 4632 mov r2, r6 800bacc: f423 5380 bic.w r3, r3, #4096 ; 0x1000 800bad0: 81a3 strh r3, [r4, #12] 800bad2: f9b4 100e ldrsh.w r1, [r4, #14] 800bad6: 463b mov r3, r7 800bad8: 4628 mov r0, r5 800bada: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800bade: f000 b817 b.w 800bb10 <_write_r> 0800bae2 <__sseek>: 800bae2: b510 push {r4, lr} 800bae4: 460c mov r4, r1 800bae6: f9b1 100e ldrsh.w r1, [r1, #14] 800baea: f000 f855 bl 800bb98 <_lseek_r> 800baee: 1c43 adds r3, r0, #1 800baf0: 89a3 ldrh r3, [r4, #12] 800baf2: bf15 itete ne 800baf4: 6560 strne r0, [r4, #84] ; 0x54 800baf6: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800bafa: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800bafe: 81a3 strheq r3, [r4, #12] 800bb00: bf18 it ne 800bb02: 81a3 strhne r3, [r4, #12] 800bb04: bd10 pop {r4, pc} 0800bb06 <__sclose>: 800bb06: f9b1 100e ldrsh.w r1, [r1, #14] 800bb0a: f000 b813 b.w 800bb34 <_close_r> ... 0800bb10 <_write_r>: 800bb10: b538 push {r3, r4, r5, lr} 800bb12: 4605 mov r5, r0 800bb14: 4608 mov r0, r1 800bb16: 4611 mov r1, r2 800bb18: 2200 movs r2, #0 800bb1a: 4c05 ldr r4, [pc, #20] ; (800bb30 <_write_r+0x20>) 800bb1c: 6022 str r2, [r4, #0] 800bb1e: 461a mov r2, r3 800bb20: f7fc f846 bl 8007bb0 <_write> 800bb24: 1c43 adds r3, r0, #1 800bb26: d102 bne.n 800bb2e <_write_r+0x1e> 800bb28: 6823 ldr r3, [r4, #0] 800bb2a: b103 cbz r3, 800bb2e <_write_r+0x1e> 800bb2c: 602b str r3, [r5, #0] 800bb2e: bd38 pop {r3, r4, r5, pc} 800bb30: 200016fc .word 0x200016fc 0800bb34 <_close_r>: 800bb34: b538 push {r3, r4, r5, lr} 800bb36: 2300 movs r3, #0 800bb38: 4c05 ldr r4, [pc, #20] ; (800bb50 <_close_r+0x1c>) 800bb3a: 4605 mov r5, r0 800bb3c: 4608 mov r0, r1 800bb3e: 6023 str r3, [r4, #0] 800bb40: f7fc fe84 bl 800884c <_close> 800bb44: 1c43 adds r3, r0, #1 800bb46: d102 bne.n 800bb4e <_close_r+0x1a> 800bb48: 6823 ldr r3, [r4, #0] 800bb4a: b103 cbz r3, 800bb4e <_close_r+0x1a> 800bb4c: 602b str r3, [r5, #0] 800bb4e: bd38 pop {r3, r4, r5, pc} 800bb50: 200016fc .word 0x200016fc 0800bb54 <_fstat_r>: 800bb54: b538 push {r3, r4, r5, lr} 800bb56: 2300 movs r3, #0 800bb58: 4c06 ldr r4, [pc, #24] ; (800bb74 <_fstat_r+0x20>) 800bb5a: 4605 mov r5, r0 800bb5c: 4608 mov r0, r1 800bb5e: 4611 mov r1, r2 800bb60: 6023 str r3, [r4, #0] 800bb62: f7fc fe76 bl 8008852 <_fstat> 800bb66: 1c43 adds r3, r0, #1 800bb68: d102 bne.n 800bb70 <_fstat_r+0x1c> 800bb6a: 6823 ldr r3, [r4, #0] 800bb6c: b103 cbz r3, 800bb70 <_fstat_r+0x1c> 800bb6e: 602b str r3, [r5, #0] 800bb70: bd38 pop {r3, r4, r5, pc} 800bb72: bf00 nop 800bb74: 200016fc .word 0x200016fc 0800bb78 <_isatty_r>: 800bb78: b538 push {r3, r4, r5, lr} 800bb7a: 2300 movs r3, #0 800bb7c: 4c05 ldr r4, [pc, #20] ; (800bb94 <_isatty_r+0x1c>) 800bb7e: 4605 mov r5, r0 800bb80: 4608 mov r0, r1 800bb82: 6023 str r3, [r4, #0] 800bb84: f7fc fe6a bl 800885c <_isatty> 800bb88: 1c43 adds r3, r0, #1 800bb8a: d102 bne.n 800bb92 <_isatty_r+0x1a> 800bb8c: 6823 ldr r3, [r4, #0] 800bb8e: b103 cbz r3, 800bb92 <_isatty_r+0x1a> 800bb90: 602b str r3, [r5, #0] 800bb92: bd38 pop {r3, r4, r5, pc} 800bb94: 200016fc .word 0x200016fc 0800bb98 <_lseek_r>: 800bb98: b538 push {r3, r4, r5, lr} 800bb9a: 4605 mov r5, r0 800bb9c: 4608 mov r0, r1 800bb9e: 4611 mov r1, r2 800bba0: 2200 movs r2, #0 800bba2: 4c05 ldr r4, [pc, #20] ; (800bbb8 <_lseek_r+0x20>) 800bba4: 6022 str r2, [r4, #0] 800bba6: 461a mov r2, r3 800bba8: f7fc fe5a bl 8008860 <_lseek> 800bbac: 1c43 adds r3, r0, #1 800bbae: d102 bne.n 800bbb6 <_lseek_r+0x1e> 800bbb0: 6823 ldr r3, [r4, #0] 800bbb2: b103 cbz r3, 800bbb6 <_lseek_r+0x1e> 800bbb4: 602b str r3, [r5, #0] 800bbb6: bd38 pop {r3, r4, r5, pc} 800bbb8: 200016fc .word 0x200016fc 0800bbbc <__ascii_mbtowc>: 800bbbc: b082 sub sp, #8 800bbbe: b901 cbnz r1, 800bbc2 <__ascii_mbtowc+0x6> 800bbc0: a901 add r1, sp, #4 800bbc2: b142 cbz r2, 800bbd6 <__ascii_mbtowc+0x1a> 800bbc4: b14b cbz r3, 800bbda <__ascii_mbtowc+0x1e> 800bbc6: 7813 ldrb r3, [r2, #0] 800bbc8: 600b str r3, [r1, #0] 800bbca: 7812 ldrb r2, [r2, #0] 800bbcc: 1c10 adds r0, r2, #0 800bbce: bf18 it ne 800bbd0: 2001 movne r0, #1 800bbd2: b002 add sp, #8 800bbd4: 4770 bx lr 800bbd6: 4610 mov r0, r2 800bbd8: e7fb b.n 800bbd2 <__ascii_mbtowc+0x16> 800bbda: f06f 0001 mvn.w r0, #1 800bbde: e7f8 b.n 800bbd2 <__ascii_mbtowc+0x16> 0800bbe0 <__malloc_lock>: 800bbe0: 4770 bx lr 0800bbe2 <__malloc_unlock>: 800bbe2: 4770 bx lr 0800bbe4 <_read_r>: 800bbe4: b538 push {r3, r4, r5, lr} 800bbe6: 4605 mov r5, r0 800bbe8: 4608 mov r0, r1 800bbea: 4611 mov r1, r2 800bbec: 2200 movs r2, #0 800bbee: 4c05 ldr r4, [pc, #20] ; (800bc04 <_read_r+0x20>) 800bbf0: 6022 str r2, [r4, #0] 800bbf2: 461a mov r2, r3 800bbf4: f7fc fe02 bl 80087fc <_read> 800bbf8: 1c43 adds r3, r0, #1 800bbfa: d102 bne.n 800bc02 <_read_r+0x1e> 800bbfc: 6823 ldr r3, [r4, #0] 800bbfe: b103 cbz r3, 800bc02 <_read_r+0x1e> 800bc00: 602b str r3, [r5, #0] 800bc02: bd38 pop {r3, r4, r5, pc} 800bc04: 200016fc .word 0x200016fc 0800bc08 <__ascii_wctomb>: 800bc08: b149 cbz r1, 800bc1e <__ascii_wctomb+0x16> 800bc0a: 2aff cmp r2, #255 ; 0xff 800bc0c: bf8b itete hi 800bc0e: 238a movhi r3, #138 ; 0x8a 800bc10: 700a strbls r2, [r1, #0] 800bc12: 6003 strhi r3, [r0, #0] 800bc14: 2001 movls r0, #1 800bc16: bf88 it hi 800bc18: f04f 30ff movhi.w r0, #4294967295 800bc1c: 4770 bx lr 800bc1e: 4608 mov r0, r1 800bc20: 4770 bx lr ... 0800bc24 <_init>: 800bc24: b5f8 push {r3, r4, r5, r6, r7, lr} 800bc26: bf00 nop 800bc28: bcf8 pop {r3, r4, r5, r6, r7} 800bc2a: bc08 pop {r3} 800bc2c: 469e mov lr, r3 800bc2e: 4770 bx lr 0800bc30 <_fini>: 800bc30: b5f8 push {r3, r4, r5, r6, r7, lr} 800bc32: bf00 nop 800bc34: bcf8 pop {r3, r4, r5, r6, r7} 800bc36: bc08 pop {r3} 800bc38: 469e mov lr, r3 800bc3a: 4770 bx lr