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BDA printf 제거 / AD5318 Initialize 추가

YJ hace 5 años
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commit
fdb89405d6
Se han modificado 67 ficheros con 10612 adiciones y 9803 borrados
  1. BIN
      Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
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      Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su
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      Debug/STM32F103_ATTEN_PLL_Zig.binary
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      Debug/STM32F103_ATTEN_PLL_Zig.elf
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      Debug/STM32F103_ATTEN_PLL_Zig.hex
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      Debug/STM32F103_ATTEN_PLL_Zig_DAC.binary
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      Debug/Src/AD5318.o
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      Debug/Src/BDA4601.o
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      Debug/Src/Bootloader.su
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      Debug/Src/includes.o
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      Debug/Src/main.o
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      Debug/Src/main.su
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      Debug/Src/pll_4113.o
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      Debug/Src/pll_4113.su
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      Debug/Src/system_stm32f1xx.o
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      Debug/Src/uart.o
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  30. BIN
      Debug/Src/zig_operate.o
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      Debug/Src/zig_operate.su
  32. 3 3
      Src/BDA4601.c
  33. 3 2
      Src/main.c
  34. 162 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/BDA4601(4548).c
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(7728).c
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_sym
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xab
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xad
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xc
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xf
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xm
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xr
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xsb
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xsd
  45. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.siproj
  46. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_AD5318.h.sisc
  47. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_BDA4601.h.sisc
  48. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_PE43711.h.sisc
  49. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_adf4153.h.sisc
  50. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_flash.h.sisc
  51. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_includes.h.sisc
  52. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_main.h.sisc
  53. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_pll_4113.h.sisc
  54. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_hal_conf.h.sisc
  55. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_zig_operate.h.sisc
  56. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_AD5318.c.sisc
  57. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_BDA4601.c.sisc
  58. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_CRC16.c.sisc
  59. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_PE43711.c.sisc
  60. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_adf4153.c.sisc
  61. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_flash.c.sisc
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_includes.c.sisc
  63. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_main.c.sisc
  64. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_pll_4113.c.sisc
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_hal_msp.c.sisc
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      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_uart.c.sisc
  67. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_zig_operate.c.sisc

BIN
Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o


+ 9 - 0
Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su

@@ -0,0 +1,9 @@
1
+stm32f1xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine	16	static
2
+stm32f1xx_hal_exti.c:238:19:HAL_EXTI_GetConfigLine	16	static
3
+stm32f1xx_hal_exti.c:327:19:HAL_EXTI_ClearConfigLine	8	static
4
+stm32f1xx_hal_exti.c:380:19:HAL_EXTI_RegisterCallback	0	static
5
+stm32f1xx_hal_exti.c:405:19:HAL_EXTI_GetHandle	0	static
6
+stm32f1xx_hal_exti.c:445:6:HAL_EXTI_IRQHandler	0	static
7
+stm32f1xx_hal_exti.c:477:10:HAL_EXTI_GetPending	0	static
8
+stm32f1xx_hal_exti.c:506:6:HAL_EXTI_ClearPending	0	static
9
+stm32f1xx_hal_exti.c:527:6:HAL_EXTI_GenerateSWI	0	static

BIN
Debug/STM32F103_ATTEN_PLL_Zig.binary


BIN
Debug/STM32F103_ATTEN_PLL_Zig.elf


La diferencia del archivo ha sido suprimido porque es demasiado grande
+ 1368 - 1375
Debug/STM32F103_ATTEN_PLL_Zig.hex


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+ 7765 - 7800
Debug/STM32F103_ATTEN_PLL_Zig.list


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+ 600 - 621
Debug/STM32F103_ATTEN_PLL_Zig.map


BIN
Debug/STM32F103_ATTEN_PLL_Zig_DAC.binary


BIN
Debug/Src/AD5318.o


+ 2 - 0
Debug/Src/AD5318.su

@@ -0,0 +1,2 @@
1
+AD5318.c:23:6:AD5318_Ctrl	16	static
2
+AD5318.c:8:7:AD5318_Initialize	8	static

BIN
Debug/Src/BDA4601.o


+ 2 - 0
Debug/Src/Bootloader.su

@@ -0,0 +1,2 @@
1
+Bootloader.c:17:6:Firmware_BootStart_Signal	8	static
2
+Bootloader.c:23:6:FirmwareUpdateStart	16	static

BIN
Debug/Src/CRC16.o


+ 3 - 0
Debug/Src/CRC16.su

@@ -0,0 +1,3 @@
1
+CRC16.c:50:16:genCRC16	8	static
2
+CRC16.c:84:9:STH30_CreateCrc	8	static
3
+CRC16.c:102:9:STH30_CheckCrc	12	static

BIN
Debug/Src/PE43711.o


BIN
Debug/Src/adf4153.o


+ 9 - 0
Debug/Src/adf4153.su

@@ -0,0 +1,9 @@
1
+adf4153.c:56:10:pow2	0	static
2
+adf4153.c:64:8:round_up	16	static
3
+adf4153.c:75:8:N_Reg_Value_Calc	8	static
4
+adf4153.c:78:10:N_Divider_Reg_Create	16	static
5
+adf4153.c:118:10:R_Divider_Reg_Create	20	static
6
+adf4153.c:163:20:ADF4153_Freq_Calc	48	static
7
+adf4153.c:238:6:ADF4153_Initialize	0	static
8
+adf4153.c:308:6:ADF4153_Module_Ctrl	56	static
9
+adf4153.c:290:6:ADF4153_Check	40	static

BIN
Debug/Src/flash.o


+ 8 - 0
Debug/Src/flash.su

@@ -0,0 +1,8 @@
1
+flash.c:14:6:Jump_App	16	static
2
+flash.c:27:6:FLASH_If_Init	8	static
3
+flash.c:38:6:Flash_InitRead	16	static
4
+flash.c:60:9:Flash_RGB_Data_Write	24	static
5
+flash.c:75:9:Flash_write	16	static
6
+flash.c:124:6:FLASH_Byte_Write	16	static
7
+flash.c:184:9:Bluecell_Flash_Write	8	static
8
+flash.c:191:6:Bluecell_Flash_Read	0	static

+ 11 - 0
Debug/Src/hal_adf4113.su

@@ -0,0 +1,11 @@
1
+hal_adf4113.c:148:7:halSynSetFunc	0	static
2
+hal_adf4113.c:234:7:halSynSetFreq	12	static
3
+hal_adf4113.c:275:7:halSynSetRLatch	0	static
4
+hal_adf4113.c:299:7:halSynSetNLatch	0	static
5
+hal_adf4113.c:321:7:halSynSetFuncLatch	8	static
6
+hal_adf4113.c:107:7:HalSynConfig	8	static
7
+hal_adf4113.c:76:7:HalSynInit	8	static
8
+hal_adf4113.c:128:7:HalSynStart	8	static
9
+hal_adf4113.c:350:7:halSynSetCounter	12	static
10
+hal_adf4113.c:381:6:delay_time	0	static
11
+hal_adf4113.c:393:6:delayms	0	static

BIN
Debug/Src/includes.o


+ 9 - 0
Debug/Src/includes.su

@@ -0,0 +1,9 @@
1
+includes.c:99:6:Path_Init	16	static
2
+includes.c:111:6:Power_ON_OFF_Ctrl	8	static
3
+includes.c:231:6:ATTEN_PLL_PATH_Initialize	8	static
4
+includes.c:241:6:Power_ON_OFF_Initialize	16	static
5
+includes.c:262:6:Error_Message_Occur	8	static
6
+includes.c:288:6:Pol_Delay_us	8	static
7
+includes.c:296:6:Boot_LED_Toggle	8	static
8
+includes.c:299:6:ADC_Check	20	static
9
+includes.c:312:6:Uart_Check	16	static

BIN
Debug/Src/main.o


+ 2 - 2
Debug/Src/main.su

@@ -1,5 +1,5 @@
1 1
 main.c:83:6:HAL_TIM_PeriodElapsedCallback	0	static
2 2
 main.c:92:5:_write	8	static
3
-main.c:174:6:SystemClock_Config	96	static
3
+main.c:175:6:SystemClock_Config	96	static
4 4
 main.c:104:5:main	56	static
5
-main.c:616:6:Error_Handler	0	static
5
+main.c:617:6:Error_Handler	0	static

BIN
Debug/Src/pll_4113.o


+ 5 - 0
Debug/Src/pll_4113.su

@@ -0,0 +1,5 @@
1
+pll_4113.c:75:6:ADF4113_Initialize	0	static
2
+pll_4113.c:196:10:N_Counter_Latch_Create	16	static
3
+pll_4113.c:164:10:halSynSetFreq	32	static
4
+pll_4113.c:243:6:ADF4113_Module_Ctrl	48	static
5
+pll_4113.c:102:6:ADF4113_Check	40	static

BIN
Debug/Src/system_stm32f1xx.o


BIN
Debug/Src/uart.o


+ 5 - 0
Debug/Src/uart.su

@@ -0,0 +1,5 @@
1
+uart.c:14:6:InitUartQueue	8	static
2
+uart.c:56:6:GetDataFromUartQueue	16	static
3
+uart.c:27:6:HAL_UART_RxCpltCallback	8	static
4
+uart.c:44:6:PutDataToUartQueue	16	static
5
+uart.c:97:6:Uart1_Data_Send	0	static

BIN
Debug/Src/zig_operate.o


+ 5 - 0
Debug/Src/zig_operate.su

@@ -0,0 +1,5 @@
1
+zig_operate.c:187:6:RF_Data_Check	8	static
2
+zig_operate.c:220:6:RF_Status_Get	8	static
3
+zig_operate.c:234:6:RF_Status_Ack	8	static
4
+zig_operate.c:248:6:RF_Operate	176	static
5
+zig_operate.c:680:6:RF_Ctrl_Main	16	static

+ 3 - 3
Src/BDA4601.c

@@ -127,7 +127,7 @@ void BDA4601_Initialize(void){
127 127
 void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
128 128
     uint8_t i = 0;
129 129
     uint8_t temp = 0;
130
-    printf("BDA4601_atten_ctrl : %x \r\n",data);
130
+//    printf("BDA4601_atten_ctrl : %x \r\n",data);
131 131
 //    temp = 4|data;
132 132
     HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
133 133
     HAL_Delay(1);
@@ -135,13 +135,13 @@ void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
135 135
         if(data & 0x01){
136 136
            HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_SET);//DATA
137 137
 //                     HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_SET);//DATA
138
-                     printf("1");
138
+//                     printf("1");
139 139
 
140 140
         }
141 141
        else{
142 142
        HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_RESET);//DATA
143 143
 //                HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA
144
-                printf("0");
144
+//                printf("0");
145 145
 
146 146
        }
147 147
 

+ 3 - 2
Src/main.c

@@ -140,6 +140,7 @@ int main(void)
140 140
   Power_ON_OFF_Initialize();  
141 141
   Path_Init();
142 142
   while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
143
+  AD5318_Initialize();
143 144
   Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
144 145
   ADF4153_Initialize();
145 146
   ADF4113_Initialize();
@@ -155,8 +156,8 @@ int main(void)
155 156
   {
156 157
 //    ADF4113_Check();
157 158
 //    ADF4153_Check();
158
-//    HAL_GPIO_TogglePin(GPIOD,GPIO_PIN_10);//DATA
159
-
159
+//    HAL_GPIO_TogglePin(ATT_EN_1_8G_UL4_GPIO_Port,ATT_EN_1_8G_UL4_Pin);//DATA
160
+  
160 161
     Boot_LED_Toggle();
161 162
     Uart_Check();
162 163
     ADC_Check();

+ 162 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/BDA4601(4548).c

@@ -0,0 +1,162 @@
1
+/*
2
+ * BDA4601.c
3
+ *
4
+ *  Created on: 2019. 6. 28.
5
+ *      Author: parkyj
6
+ */
7
+#include "BDA4601.h"
8
+BDA4601_st BDA4601_1_8G_DL1 = {
9
+    ATT_CLK_GPIO_Port,
10
+    ATT_CLK_Pin,
11
+    ATT_DATA_GPIO_Port,
12
+    ATT_DATA_Pin,
13
+    ATT_EN_1_8G_DL1_GPIO_Port,
14
+    ATT_EN_1_8G_DL1_Pin,
15
+};
16
+BDA4601_st BDA4601_1_8G_DL2 = {
17
+   ATT_CLK_GPIO_Port,
18
+   ATT_CLK_Pin,
19
+   ATT_DATA_GPIO_Port,
20
+   ATT_DATA_Pin,
21
+   ATT_EN_1_8G_DL2_GPIO_Port,
22
+   ATT_EN_1_8G_DL2_Pin,
23
+};
24
+BDA4601_st BDA4601_1_8G_UL1 = {
25
+    ATT_CLK_GPIO_Port,
26
+    ATT_CLK_Pin,
27
+    ATT_DATA_GPIO_Port,
28
+    ATT_DATA_Pin,
29
+    ATT_EN_1_8G_UL1_GPIO_Port,
30
+    ATT_EN_1_8G_UL1_Pin,
31
+};
32
+BDA4601_st BDA4601_1_8G_UL2 = {
33
+   ATT_CLK_GPIO_Port,
34
+   ATT_CLK_Pin,
35
+   ATT_DATA_GPIO_Port,
36
+   ATT_DATA_Pin,
37
+   ATT_EN_1_8G_UL2_GPIO_Port,
38
+   ATT_EN_1_8G_UL2_Pin,
39
+};
40
+BDA4601_st BDA4601_1_8G_UL3 = {
41
+   ATT_CLK_GPIO_Port,
42
+   ATT_CLK_Pin,
43
+   ATT_DATA_GPIO_Port,
44
+   ATT_DATA_Pin,
45
+   ATT_EN_1_8G_UL3_GPIO_Port,
46
+   ATT_EN_1_8G_UL3_Pin,
47
+};    
48
+BDA4601_st BDA4601_1_8G_UL4 = {
49
+   ATT_CLK_GPIO_Port,
50
+   ATT_CLK_Pin,
51
+   ATT_DATA_GPIO_Port,
52
+   ATT_DATA_Pin,
53
+   ATT_EN_1_8G_UL4_GPIO_Port,
54
+   ATT_EN_1_8G_UL4_Pin,
55
+};          
56
+
57
+BDA4601_st BDA4601_2_1G_DL1= {
58
+    ATT_CLK_GPIO_Port,
59
+    ATT_CLK_Pin,
60
+    ATT_DATA_GPIO_Port,
61
+    ATT_DATA_Pin,
62
+    ATT_EN_2_1G_DL1_GPIO_Port,
63
+    ATT_EN_2_1G_DL1_Pin,
64
+};           ;
65
+BDA4601_st BDA4601_2_1G_DL2= {
66
+    ATT_CLK_GPIO_Port,
67
+    ATT_CLK_Pin,
68
+    ATT_DATA_GPIO_Port,
69
+    ATT_DATA_Pin,
70
+    ATT_EN_2_1G_DL2_GPIO_Port,
71
+    ATT_EN_2_1G_DL2_Pin,
72
+};           
73
+BDA4601_st BDA4601_2_1G_UL1= {
74
+    ATT_CLK_GPIO_Port,
75
+    ATT_CLK_Pin,
76
+    ATT_DATA_GPIO_Port,
77
+    ATT_DATA_Pin,
78
+    ATT_EN_2_1G_UL1_GPIO_Port,
79
+    ATT_EN_2_1G_UL1_Pin,
80
+};           
81
+BDA4601_st BDA4601_2_1G_UL2= {
82
+    ATT_CLK_GPIO_Port,
83
+    ATT_CLK_Pin,
84
+    ATT_DATA_GPIO_Port,
85
+    ATT_DATA_Pin,
86
+    ATT_EN_2_1G_UL2_GPIO_Port,
87
+    ATT_EN_2_1G_UL2_Pin,
88
+};           
89
+BDA4601_st BDA4601_2_1G_UL3= {
90
+    ATT_CLK_GPIO_Port,
91
+    ATT_CLK_Pin,
92
+    ATT_DATA_GPIO_Port,
93
+    ATT_DATA_Pin,
94
+    ATT_EN_2_1G_UL3_GPIO_Port,
95
+    ATT_EN_2_1G_UL3_Pin,
96
+};           
97
+BDA4601_st BDA4601_2_1G_UL4= {
98
+    ATT_CLK_GPIO_Port,
99
+    ATT_CLK_Pin,
100
+    ATT_DATA_GPIO_Port,
101
+    ATT_DATA_Pin,
102
+    ATT_EN_2_1G_UL4_GPIO_Port,
103
+    ATT_EN_2_1G_UL4_Pin,
104
+};    
105
+
106
+
107
+
108
+void BDA4601_Initialize(void){
109
+    BDA4601_atten_ctrl(BDA4601_1_8G_DL1,0);           
110
+    BDA4601_atten_ctrl(BDA4601_1_8G_DL2,0);           
111
+
112
+    BDA4601_atten_ctrl(BDA4601_1_8G_UL1,0);           
113
+    BDA4601_atten_ctrl(BDA4601_1_8G_UL2,0);           
114
+    BDA4601_atten_ctrl(BDA4601_1_8G_UL3,0);           
115
+    BDA4601_atten_ctrl(BDA4601_1_8G_UL4,0);           
116
+
117
+    BDA4601_atten_ctrl(BDA4601_2_1G_DL1,0);           
118
+    BDA4601_atten_ctrl(BDA4601_2_1G_DL2,0);           
119
+
120
+    BDA4601_atten_ctrl(BDA4601_2_1G_UL1,0);           
121
+    BDA4601_atten_ctrl(BDA4601_2_1G_UL2,0);
122
+    BDA4601_atten_ctrl(BDA4601_2_1G_UL3,0);           
123
+    BDA4601_atten_ctrl(BDA4601_2_1G_UL4,0);               
124
+}
125
+
126
+
127
+void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
128
+    uint8_t i = 0;
129
+    uint8_t temp = 0;
130
+    printf("BDA4601_atten_ctrl : %x \r\n",data);
131
+//    temp = 4|data;
132
+    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
133
+    HAL_Delay(1);
134
+    for(i = 0; i < 6; i++){
135
+        if(data & 0x01){
136
+           HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_SET);//DATA
137
+//                     HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_SET);//DATA
138
+                     printf("1");
139
+
140
+        }
141
+       else{
142
+       HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,BDA.SERIAL_IN_PIN,GPIO_PIN_RESET);//DATA
143
+//                HAL_GPIO_WritePin(ATT_DATA_GPIO_Port,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA
144
+                printf("0");
145
+
146
+       }
147
+
148
+        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_SET);//CLOCK
149
+        HAL_Delay(1);
150
+        HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
151
+        HAL_Delay(1);
152
+        data >>= 1;
153
+    }
154
+    HAL_GPIO_WritePin(BDA.CLK_PORT,BDA.CLK_PIN,GPIO_PIN_RESET);//CLOCK
155
+    HAL_GPIO_WritePin(BDA.SERIAL_IN_PORT,ATT_DATA_Pin,GPIO_PIN_RESET);//DATA
156
+    HAL_Delay(1);
157
+    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_SET);//LE
158
+    HAL_Delay(1);
159
+    HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);
160
+}
161
+
162
+

+ 641 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(7728).c

@@ -0,0 +1,641 @@
1
+/* USER CODE BEGIN Header */
2
+/**
3
+  ******************************************************************************
4
+  * @file           : main.c
5
+  * @brief          : Main program body
6
+  ******************************************************************************
7
+  * @attention
8
+  *
9
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10
+  * All rights reserved.</center></h2>
11
+  *
12
+  * This software component is licensed by ST under BSD 3-Clause license,
13
+  * the "License"; You may not use this file except in compliance with the
14
+  * License. You may obtain a copy of the License at:
15
+  *                        opensource.org/licenses/BSD-3-Clause
16
+  *
17
+  ******************************************************************************
18
+  */
19
+/* USER CODE END Header */
20
+
21
+/* Includes ------------------------------------------------------------------*/
22
+#include "main.h"
23
+
24
+/* Private includes ----------------------------------------------------------*/
25
+/* USER CODE BEGIN Includes */
26
+
27
+/* USER CODE END Includes */
28
+
29
+/* Private typedef -----------------------------------------------------------*/
30
+/* USER CODE BEGIN PTD */
31
+
32
+/* USER CODE END PTD */
33
+
34
+/* Private define ------------------------------------------------------------*/
35
+/* USER CODE BEGIN PD */
36
+
37
+/* USER CODE END PD */
38
+
39
+/* Private macro -------------------------------------------------------------*/
40
+/* USER CODE BEGIN PM */
41
+
42
+/* USER CODE END PM */
43
+
44
+/* Private variables ---------------------------------------------------------*/
45
+ADC_HandleTypeDef hadc1;
46
+DMA_HandleTypeDef hdma_adc1;
47
+
48
+TIM_HandleTypeDef htim6;
49
+
50
+UART_HandleTypeDef huart1;
51
+DMA_HandleTypeDef hdma_usart1_rx;
52
+DMA_HandleTypeDef hdma_usart1_tx;
53
+
54
+/* USER CODE BEGIN PV */
55
+volatile uint32_t AdcTimerCnt = 0;
56
+volatile uint32_t LedTimerCnt = 0;
57
+volatile uint32_t UartRxTimerCnt = 0;
58
+volatile uint32_t LDTimerCnt = 0;
59
+
60
+extern PLL_Setting_st Pll_3_5_H;
61
+extern PLL_Setting_st Pll_3_5_L;
62
+
63
+//volatile uint32_t UartTxTimerCnt = 0;
64
+
65
+/* USER CODE END PV */
66
+
67
+/* Private function prototypes -----------------------------------------------*/
68
+void SystemClock_Config(void);
69
+static void MX_GPIO_Init(void);
70
+static void MX_DMA_Init(void);
71
+static void MX_ADC1_Init(void);
72
+static void MX_USART1_UART_Init(void);
73
+static void MX_TIM6_Init(void);
74
+static void MX_NVIC_Init(void);
75
+/* USER CODE BEGIN PFP */
76
+void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
77
+/* USER CODE END PFP */
78
+
79
+/* Private user code ---------------------------------------------------------*/
80
+/* USER CODE BEGIN 0 */
81
+
82
+
83
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
84
+{
85
+    if(htim->Instance == TIM6){
86
+        UartRxTimerCnt++;
87
+        LedTimerCnt++;
88
+        AdcTimerCnt++;
89
+        LDTimerCnt++;
90
+    }
91
+} 
92
+int _write (int file, uint8_t *ptr, uint16_t len)
93
+{
94
+    HAL_UART_Transmit(&huart1, ptr, len,10);
95
+    return len;
96
+}
97
+
98
+/* USER CODE END 0 */
99
+
100
+/**
101
+  * @brief  The application entry point.
102
+  * @retval int
103
+  */
104
+int main(void)
105
+{
106
+  /* USER CODE BEGIN 1 */
107
+ 
108
+
109
+  /* USER CODE END 1 */
110
+  
111
+
112
+  /* MCU Configuration--------------------------------------------------------*/
113
+
114
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
115
+  HAL_Init();
116
+
117
+  /* USER CODE BEGIN Init */
118
+
119
+  /* USER CODE END Init */
120
+
121
+  /* Configure the system clock */
122
+  SystemClock_Config();
123
+
124
+  /* USER CODE BEGIN SysInit */
125
+
126
+  /* USER CODE END SysInit */
127
+
128
+  /* Initialize all configured peripherals */
129
+  MX_GPIO_Init();
130
+  MX_DMA_Init();
131
+  MX_ADC1_Init();
132
+  MX_USART1_UART_Init();
133
+  MX_TIM6_Init();
134
+
135
+  /* Initialize interrupts */
136
+  MX_NVIC_Init();
137
+  /* USER CODE BEGIN 2 */
138
+  InitUartQueue(&TerminalQueue);
139
+//  PE43711_PinInit();
140
+  Power_ON_OFF_Initialize();  
141
+  Path_Init();
142
+  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
143
+  Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
144
+  ADF4153_Initialize();
145
+  ADF4113_Initialize();
146
+  PE43711_PinInit();
147
+  BDA4601_Initialize();
148
+  ATTEN_PLL_PATH_Initialize();
149
+  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
150
+  /* USER CODE END 2 */
151
+
152
+  /* Infinite loop */
153
+  /* USER CODE BEGIN WHILE */
154
+  while (1)
155
+  {
156
+//    ADF4113_Check();
157
+//    ADF4153_Check();
158
+//    HAL_GPIO_TogglePin(GPIOD,GPIO_PIN_10);//DATA
159
+
160
+    Boot_LED_Toggle();
161
+    Uart_Check();
162
+    ADC_Check();
163
+    /* USER CODE END WHILE */
164
+
165
+    /* USER CODE BEGIN 3 */
166
+  }
167
+  /* USER CODE END 3 */
168
+}
169
+
170
+/**
171
+  * @brief System Clock Configuration
172
+  * @retval None
173
+  */
174
+void SystemClock_Config(void)
175
+{
176
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
177
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
178
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
179
+
180
+  /** Initializes the CPU, AHB and APB busses clocks 
181
+  */
182
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
183
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
184
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
185
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
186
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
187
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
188
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
189
+  {
190
+    Error_Handler();
191
+  }
192
+  /** Initializes the CPU, AHB and APB busses clocks 
193
+  */
194
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
195
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
196
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
197
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
198
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
199
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
200
+
201
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
202
+  {
203
+    Error_Handler();
204
+  }
205
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
206
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
207
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
208
+  {
209
+    Error_Handler();
210
+  }
211
+}
212
+
213
+/**
214
+  * @brief NVIC Configuration.
215
+  * @retval None
216
+  */
217
+static void MX_NVIC_Init(void)
218
+{
219
+  /* USART1_IRQn interrupt configuration */
220
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
221
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
222
+  /* TIM6_IRQn interrupt configuration */
223
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
224
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
225
+  /* DMA1_Channel1_IRQn interrupt configuration */
226
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
227
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
228
+  /* DMA1_Channel4_IRQn interrupt configuration */
229
+  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
230
+  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
231
+  /* DMA1_Channel5_IRQn interrupt configuration */
232
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
233
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
234
+}
235
+
236
+/**
237
+  * @brief ADC1 Initialization Function
238
+  * @param None
239
+  * @retval None
240
+  */
241
+static void MX_ADC1_Init(void)
242
+{
243
+
244
+  /* USER CODE BEGIN ADC1_Init 0 */
245
+
246
+  /* USER CODE END ADC1_Init 0 */
247
+
248
+  ADC_ChannelConfTypeDef sConfig = {0};
249
+
250
+  /* USER CODE BEGIN ADC1_Init 1 */
251
+
252
+  /* USER CODE END ADC1_Init 1 */
253
+  /** Common config 
254
+  */
255
+  hadc1.Instance = ADC1;
256
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
257
+  hadc1.Init.ContinuousConvMode = ENABLE;
258
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
259
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
260
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
261
+  hadc1.Init.NbrOfConversion = 14;
262
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
263
+  {
264
+    Error_Handler();
265
+  }
266
+  /** Configure Regular Channel 
267
+  */
268
+  sConfig.Channel = ADC_CHANNEL_0;
269
+  sConfig.Rank = ADC_REGULAR_RANK_1;
270
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
271
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
272
+  {
273
+    Error_Handler();
274
+  }
275
+  /** Configure Regular Channel 
276
+  */
277
+  sConfig.Channel = ADC_CHANNEL_1;
278
+  sConfig.Rank = ADC_REGULAR_RANK_2;
279
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
280
+  {
281
+    Error_Handler();
282
+  }
283
+  /** Configure Regular Channel 
284
+  */
285
+  sConfig.Channel = ADC_CHANNEL_2;
286
+  sConfig.Rank = ADC_REGULAR_RANK_3;
287
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
288
+  {
289
+    Error_Handler();
290
+  }
291
+  /** Configure Regular Channel 
292
+  */
293
+  sConfig.Channel = ADC_CHANNEL_3;
294
+  sConfig.Rank = ADC_REGULAR_RANK_4;
295
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
296
+  {
297
+    Error_Handler();
298
+  }
299
+  /** Configure Regular Channel 
300
+  */
301
+  sConfig.Channel = ADC_CHANNEL_4;
302
+  sConfig.Rank = ADC_REGULAR_RANK_5;
303
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
304
+  {
305
+    Error_Handler();
306
+  }
307
+  /** Configure Regular Channel 
308
+  */
309
+  sConfig.Channel = ADC_CHANNEL_5;
310
+  sConfig.Rank = ADC_REGULAR_RANK_6;
311
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
312
+  {
313
+    Error_Handler();
314
+  }
315
+  /** Configure Regular Channel 
316
+  */
317
+  sConfig.Channel = ADC_CHANNEL_6;
318
+  sConfig.Rank = ADC_REGULAR_RANK_7;
319
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
320
+  {
321
+    Error_Handler();
322
+  }
323
+  /** Configure Regular Channel 
324
+  */
325
+  sConfig.Channel = ADC_CHANNEL_7;
326
+  sConfig.Rank = ADC_REGULAR_RANK_8;
327
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
328
+  {
329
+    Error_Handler();
330
+  }
331
+  /** Configure Regular Channel 
332
+  */
333
+  sConfig.Channel = ADC_CHANNEL_8;
334
+  sConfig.Rank = ADC_REGULAR_RANK_9;
335
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
336
+  {
337
+    Error_Handler();
338
+  }
339
+  /** Configure Regular Channel 
340
+  */
341
+  sConfig.Channel = ADC_CHANNEL_9;
342
+  sConfig.Rank = ADC_REGULAR_RANK_10;
343
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
344
+  {
345
+    Error_Handler();
346
+  }
347
+  /** Configure Regular Channel 
348
+  */
349
+  sConfig.Channel = ADC_CHANNEL_10;
350
+  sConfig.Rank = ADC_REGULAR_RANK_11;
351
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
352
+  {
353
+    Error_Handler();
354
+  }
355
+  /** Configure Regular Channel 
356
+  */
357
+  sConfig.Channel = ADC_CHANNEL_11;
358
+  sConfig.Rank = ADC_REGULAR_RANK_12;
359
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
360
+  {
361
+    Error_Handler();
362
+  }
363
+  /** Configure Regular Channel 
364
+  */
365
+  sConfig.Channel = ADC_CHANNEL_12;
366
+  sConfig.Rank = ADC_REGULAR_RANK_13;
367
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
368
+  {
369
+    Error_Handler();
370
+  }
371
+  /** Configure Regular Channel 
372
+  */
373
+  sConfig.Channel = ADC_CHANNEL_13;
374
+  sConfig.Rank = ADC_REGULAR_RANK_14;
375
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
376
+  {
377
+    Error_Handler();
378
+  }
379
+  /* USER CODE BEGIN ADC1_Init 2 */
380
+
381
+  /* USER CODE END ADC1_Init 2 */
382
+
383
+}
384
+
385
+/**
386
+  * @brief TIM6 Initialization Function
387
+  * @param None
388
+  * @retval None
389
+  */
390
+static void MX_TIM6_Init(void)
391
+{
392
+
393
+  /* USER CODE BEGIN TIM6_Init 0 */
394
+
395
+  /* USER CODE END TIM6_Init 0 */
396
+
397
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
398
+
399
+  /* USER CODE BEGIN TIM6_Init 1 */
400
+
401
+  /* USER CODE END TIM6_Init 1 */
402
+  htim6.Instance = TIM6;
403
+  htim6.Init.Prescaler = 5600-1;
404
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
405
+  htim6.Init.Period = 10;
406
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
407
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
408
+  {
409
+    Error_Handler();
410
+  }
411
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
412
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
413
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
414
+  {
415
+    Error_Handler();
416
+  }
417
+  /* USER CODE BEGIN TIM6_Init 2 */
418
+
419
+  /* USER CODE END TIM6_Init 2 */
420
+
421
+}
422
+
423
+/**
424
+  * @brief USART1 Initialization Function
425
+  * @param None
426
+  * @retval None
427
+  */
428
+static void MX_USART1_UART_Init(void)
429
+{
430
+
431
+  /* USER CODE BEGIN USART1_Init 0 */
432
+
433
+  /* USER CODE END USART1_Init 0 */
434
+
435
+  /* USER CODE BEGIN USART1_Init 1 */
436
+
437
+  /* USER CODE END USART1_Init 1 */
438
+  huart1.Instance = USART1;
439
+  huart1.Init.BaudRate = 115200;
440
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
441
+  huart1.Init.StopBits = UART_STOPBITS_1;
442
+  huart1.Init.Parity = UART_PARITY_NONE;
443
+  huart1.Init.Mode = UART_MODE_TX_RX;
444
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
445
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
446
+  if (HAL_UART_Init(&huart1) != HAL_OK)
447
+  {
448
+    Error_Handler();
449
+  }
450
+  /* USER CODE BEGIN USART1_Init 2 */
451
+
452
+  /* USER CODE END USART1_Init 2 */
453
+
454
+}
455
+
456
+/** 
457
+  * Enable DMA controller clock
458
+  */
459
+static void MX_DMA_Init(void) 
460
+{
461
+
462
+  /* DMA controller clock enable */
463
+  __HAL_RCC_DMA1_CLK_ENABLE();
464
+
465
+}
466
+
467
+/**
468
+  * @brief GPIO Initialization Function
469
+  * @param None
470
+  * @retval None
471
+  */
472
+static void MX_GPIO_Init(void)
473
+{
474
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
475
+
476
+  /* GPIO Ports Clock Enable */
477
+  __HAL_RCC_GPIOE_CLK_ENABLE();
478
+  __HAL_RCC_GPIOC_CLK_ENABLE();
479
+  __HAL_RCC_GPIOF_CLK_ENABLE();
480
+  __HAL_RCC_GPIOA_CLK_ENABLE();
481
+  __HAL_RCC_GPIOB_CLK_ENABLE();
482
+  __HAL_RCC_GPIOD_CLK_ENABLE();
483
+  __HAL_RCC_GPIOG_CLK_ENABLE();
484
+
485
+  /*Configure GPIO pin Output Level */
486
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
487
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
488
+
489
+  /*Configure GPIO pin Output Level */
490
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
491
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
492
+
493
+  /*Configure GPIO pin Output Level */
494
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
495
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
496
+
497
+  /*Configure GPIO pin Output Level */
498
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
499
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_LOW1_Pin 
500
+                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
501
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
502
+
503
+  /*Configure GPIO pin Output Level */
504
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
505
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
506
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
507
+                          |BOOT_LED_Pin, GPIO_PIN_RESET);
508
+
509
+  /*Configure GPIO pin Output Level */
510
+  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
511
+
512
+  /*Configure GPIO pin Output Level */
513
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
514
+
515
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
516
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
517
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
518
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
519
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
520
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
521
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
522
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
523
+
524
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
525
+                           PLL_EN_3_5G_H_Pin PLL_ON_OFF_3_5G_L_Pin PLL_DATA_3_5G_Pin PLL_ON_OFF_3_5G_H_Pin */
526
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
527
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin;
528
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
529
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
530
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
531
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
532
+
533
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
534
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
535
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
536
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
537
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
538
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
539
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
540
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
541
+
542
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
543
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
544
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
545
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
546
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
547
+
548
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
549
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin 
550
+                           ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin 
551
+                           PATH_EN_3_5G_L_Pin */
552
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
553
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_LOW1_Pin 
554
+                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
555
+                          |PATH_EN_3_5G_L_Pin;
556
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
557
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
558
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
559
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
560
+
561
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
562
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
563
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
564
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
565
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
566
+
567
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
568
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
569
+                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin 
570
+                           BOOT_LED_Pin */
571
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
572
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
573
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
574
+                          |BOOT_LED_Pin;
575
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
576
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
577
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
578
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
579
+
580
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
581
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
582
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
583
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
584
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
585
+
586
+  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
587
+  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
588
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
589
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
590
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
591
+  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
592
+
593
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
594
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
595
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
596
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
597
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
598
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
599
+
600
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
601
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
602
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
603
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
604
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
605
+
606
+}
607
+
608
+/* USER CODE BEGIN 4 */
609
+
610
+/* USER CODE END 4 */
611
+
612
+/**
613
+  * @brief  This function is executed in case of error occurrence.
614
+  * @retval None
615
+  */
616
+void Error_Handler(void)
617
+{
618
+  /* USER CODE BEGIN Error_Handler_Debug */
619
+  /* User can add his own implementation to report the HAL error return state */
620
+
621
+  /* USER CODE END Error_Handler_Debug */
622
+}
623
+
624
+#ifdef  USE_FULL_ASSERT
625
+/**
626
+  * @brief  Reports the name of the source file and the source line number
627
+  *         where the assert_param error has occurred.
628
+  * @param  file: pointer to the source file name
629
+  * @param  line: assert_param error line source number
630
+  * @retval None
631
+  */
632
+void assert_failed(uint8_t *file, uint32_t line)
633
+{ 
634
+  /* USER CODE BEGIN 6 */
635
+  /* User can add his own implementation to report the file name and line number,
636
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
637
+  /* USER CODE END 6 */
638
+}
639
+#endif /* USE_FULL_ASSERT */
640
+
641
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_sym


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insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xab


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_AD5318.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_BDA4601.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_PE43711.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_adf4153.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_flash.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_includes.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_main.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_pll_4113.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_hal_conf.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_zig_operate.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_AD5318.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_BDA4601.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_CRC16.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_PE43711.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_adf4153.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_flash.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_includes.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_main.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_pll_4113.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_hal_msp.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_uart.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_zig_operate.c.sisc