CRC 8 추가 / HEADER 추가 / UART.h 추가 /API 동작 Operate 추가

Debug/Src/main.su

@@ -1,5 +1,5 @@
-main.c:77:6:HAL_TIM_PeriodElapsedCallback	0	static
-main.c:86:5:_write	8	static
-main.c:155:6:SystemClock_Config	96	static
-main.c:98:5:main	56	static
-main.c:571:6:Error_Handler	0	static
+main.c:76:6:HAL_TIM_PeriodElapsedCallback	0	static
+main.c:84:5:_write	8	static
+main.c:154:6:SystemClock_Config	96	static
+main.c:96:5:main	56	static
+main.c:570:6:Error_Handler	0	static

Inc/CRC16.h

@@ -0,0 +1,25 @@
+/*
+ * CRC16.h
+ *
+ *  Created on: 2019. 7. 3.
+ *      Author: parkyj
+ */
+
+#ifndef CRC16_H_
+#define CRC16_H_
+
+#include "main.h"
+
+typedef enum{
+    CHECKSUM_ERROR = 0,
+    NO_ERROR
+}etError;
+
+
+uint16_t CRC16_Generate(uint8_t *buf_ptr, int32_t len);
+etError CRC16_Check(uint8_t *buf_ptr, int32_t len,uint16_t checksum);
+
+
+#define POLYNOMIAL 0x131 // P(x) = x^8 + x^5 + x^4 + 1 = 100110001
+
+#endif /* CRC16_H_ */

Inc/main.h

@@ -33,10 +33,12 @@ extern "C" {
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 #include <stdio.h>
+#include <stdbool.h>
 #include "PE43711.h"
 #include "BDA4601.h"
 #include "zig_operate.h"
 #include "adf4153.h"
+#include "uart.h"
 /* USER CODE END Includes */
 
 /* Exported types ------------------------------------------------------------*/
@@ -62,6 +64,7 @@ typedef struct _ATTEN_Setting_st{
 
 /* Exported macro ------------------------------------------------------------*/
 /* USER CODE BEGIN EM */
+volatile uint32_t UartTimerCnt;
 
 /* USER CODE END EM */
 
@@ -214,7 +217,7 @@ void Error_Handler(void);
 #define PATH_EN_2_1G_UL_Pin GPIO_PIN_1
 #define PATH_EN_2_1G_UL_GPIO_Port GPIOE
 /* USER CODE BEGIN Private defines */
-
+#define BLUECELL_HEADER 0xBE
 /* USER CODE END Private defines */
 
 #ifdef __cplusplus

Inc/uart.h

@@ -0,0 +1,32 @@
+/*
+ * uart.h
+ *
+ *  Created on: 2019. 5. 27.
+ *      Author: parkyj
+ */
+
+#ifndef UART_H_
+#define UART_H_
+
+#include "main.h"
+
+#define hTerminal    huart1
+
+#define QUEUE_BUFFER_LENGTH 255
+
+typedef struct
+{
+    int head, tail, data;
+    uint8_t Buffer[QUEUE_BUFFER_LENGTH];
+}UARTQUEUE, *pUARTQUEUE;
+
+extern UART_HandleTypeDef huart1;
+
+extern UARTQUEUE TerminalQueue;
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data);
+void InitUartQueue(pUARTQUEUE pQueue);
+void GetDataFromUartQueue(UART_HandleTypeDef *huart);
+bool Get_UartRcv(void);
+void Set_UartRcv(bool);
+
+#endif /* UART_H_ */

Inc/zig_operate.h

@@ -8,6 +8,7 @@
 #ifndef ZIG_OPERATE_H_
 #define ZIG_OPERATE_H_
 #include "main.h"
+bool RF_Ctrl_Main(uint8_t* data_buf);
 
 
 #endif /* ZIG_OPERATE_H_ */

Src/CRC16.c

@@ -8,6 +8,7 @@
 /*---------------------------------------------------------------------------------------*/
 /*									CRC16	TABLE						    			 */
 /*---------------------------------------------------------------------------------------*/
+#include "CRC16.h"
 unsigned short Table_CRC16[]  = {
 	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
 	0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
@@ -80,3 +81,41 @@ unsigned short genCRC16(char *buf_ptr, int len)
 	return(crc16);
 }
 
+uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
+{
+  uint8_t bit;        // bit mask
+  uint8_t crc = 0xFF; // calculated checksum
+  uint8_t byteCtr;    // byte counter
+
+  // calculates 8-Bit checksum with given polynomial
+  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
+  {
+    crc ^= (data[byteCtr]);
+    for(bit = 8; bit > 0; --bit)
+    {
+      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
+      else           crc = (crc << 1);
+    }
+  }
+  return crc;
+}
+etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
+{
+  uint8_t bit;        // bit mask
+  uint8_t crc = 0xFF; // calculated checksum
+  uint8_t byteCtr;    // byte counter
+
+  // calculates 8-Bit checksum with given polynomial
+  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
+  {
+    crc ^= (data[byteCtr]);
+    for(bit = 8; bit > 0; --bit)
+    {
+      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
+      else           crc = (crc << 1);
+    }
+  }
+  if(crc != checksum) return CHECKSUM_ERROR;
+  else                return NO_ERROR;
+}
+

Src/main.c

@@ -51,7 +51,6 @@ UART_HandleTypeDef huart1;
 
 /* USER CODE BEGIN PV */
 volatile uint32_t LedTimerCnt = 0;
-volatile uint32_t FirmwareTimerCnt = 0;
 volatile uint32_t UartTimerCnt = 0;
 
 /* USER CODE END PV */
@@ -79,7 +78,6 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
     if(htim->Instance == TIM6){
         UartTimerCnt++;
         LedTimerCnt++;
-        FirmwareTimerCnt++;
     }
 } 
 #endif // PYJ.2019.07.26_END -- 
@@ -141,6 +139,7 @@ int main(void)
   while (1)
   {
     if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
+    while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
     /* USER CODE END WHILE */
 
     /* USER CODE BEGIN 3 */

Src/uart.c

@@ -0,0 +1,88 @@
+/*
+ * uart.c
+ *
+ *  Created on: 2019. 5. 27.
+ *      Author: parkyj
+ */
+
+#include "uart.h"
+
+UARTQUEUE TerminalQueue;
+UARTQUEUE WifiQueue;
+
+void InitUartQueue(pUARTQUEUE pQueue)
+{
+    pQueue->data = pQueue->head = pQueue->tail = 0;
+
+    if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
+    {
+      //_Error_Handler(__FILE__, __LINE__);
+    }
+    //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
+    //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
+}
+
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+    pUARTQUEUE pQueue;
+//    printf("Function : %s : \r\n",__func__);
+    UartTimerCnt = 0;
+    pQueue = &TerminalQueue;
+    pQueue->head++;
+    if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0;
+    pQueue->data++;
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
+        GetDataFromUartQueue(huart);
+    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
+   // Set_UartRcv(true);
+}
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data)
+{
+    pUARTQUEUE pQueue = &TerminalQueue;
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
+        GetDataFromUartQueue(huart);
+    pQueue->Buffer[pQueue->head++] = data;
+    if (pQueue->head == QUEUE_BUFFER_LENGTH) pQueue->head = 0;
+    pQueue->data++;
+   // HAL_UART_Receive_DMA(&hTerminal,  pQueue->Buffer + pQueue->head, 10);
+}
+
+void GetDataFromUartQueue(UART_HandleTypeDef *huart)
+{
+    volatile static int cnt;
+    volatile static int uart_buf[QUEUE_BUFFER_LENGTH];
+    
+//    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
+    UART_HandleTypeDef *dst = &hTerminal;
+    pUARTQUEUE pQueue = &TerminalQueue;
+//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
+//    {
+//       _Error_Handler(__FILE__, __LINE__);
+//    }
+    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail);        
+    pQueue->tail++;
+    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
+    pQueue->data--;
+    
+    if(pQueue->data == 0){
+        RF_Ctrl_Main(&uart_buf[0]);
+//        HAL_UART_Transmit(dst, &temp_buf[BLUECELL_HEADER00], 11, 3000);
+#if 0 // PYJ.2019.07.15_BEGIN -- 
+//            for(int i = 0; i < cnt; i++){
+//                printf("%02x",update_data_buf[i]);
+//            }
+#endif // PYJ.2019.07.15_END -- 
+        cnt = 0;
+        
+        for(int i  = 0; i < QUEUE_BUFFER_LENGTH; i++)
+            uart_buf[i] = 0;
+        
+        HAL_Delay(1);
+    }
+
+}
+
+void Uart1_Data_Send(uint8_t* data,uint8_t size){
+    HAL_UART_Transmit(&huart1, data,size, 10); 
+}
+

Src/zig_operate.c

@@ -181,7 +181,81 @@ ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
 };
 
 typedef enum{
-    TYPE_1_8GHz_DL1,
+    TYPE_ATT_1_8GHz_DL1 = 1,
+    TYPE_ATT_1_8GHz_DL2,
 
+    TYPE_ATT_1_8GHz_UL1,
+    TYPE_ATT_1_8GHz_UL2,
+    TYPE_ATT_1_8GHz_UL3, //5
+    TYPE_ATT_1_8GHz_UL4,
+    
+    TYPE_ATT_2_1GHz_DL1,
+    TYPE_ATT_2_1GHz_DL2,
+
+    TYPE_ATT_2_1GHz_UL1,
+    TYPE_ATT_2_1GHz_UL2, // 10
+    TYPE_ATT_2_1GHz_UL3,
+    TYPE_ATT_2_1GHz_UL4,    
+
+
+    TYPE_ATT_3_5GHz_DL,
+    TYPE_ATT_3_5GHz_UL,
+    TYPE_ATT_3_5GHz_COM1, // 15
+    TYPE_ATT_3_5GHz_COM2,
+    TYPE_ATT_3_5GHz_COM3,      
 }Bluecell_Prot_t;
+   typedef enum{
+    Header = 0,
+    Length,
+    Type,
+    Crcindex,
+}Bluecell_Prot_p;
+
+bool RF_Data_Check(uint8_t* data_buf){
+    bool ret = false;
+    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[Crcindex]);
+    
+    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
+        ret= true;
+    }
+    if(crcret == true){/*CRC CHECK*/
+        ret = true;
+    }
+
+    return ret;
+
+}
+bool RF_Ctrl_Main(uint8_t* data_buf){
+    bool ret = false;
+    Bluecell_Prot_t type = data_buf[Type];
+    RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
+
+
+    
+    switch(type){
+    case TYPE_ATT_1_8GHz_DL1:   break;
+    case TYPE_ATT_1_8GHz_DL2:   break;
+
+    case TYPE_ATT_1_8GHz_UL1:   break;
+    case TYPE_ATT_1_8GHz_UL2:   break;
+    case TYPE_ATT_1_8GHz_UL3: break;//5
+    case TYPE_ATT_1_8GHz_UL4:break;
+
+    case TYPE_ATT_2_1GHz_DL1:break;
+    case TYPE_ATT_2_1GHz_DL2:break;
 
+    case TYPE_ATT_2_1GHz_UL1:break;
+    case TYPE_ATT_2_1GHz_UL2: break;// 10
+    case TYPE_ATT_2_1GHz_UL3:break;
+    case TYPE_ATT_2_1GHz_UL4:    break;
+    case TYPE_ATT_3_5GHz_DL:break;
+    case TYPE_ATT_3_5GHz_UL:break;
+    case TYPE_ATT_3_5GHz_COM1: break;// 15
+    case TYPE_ATT_3_5GHz_COM2:break;
+    case TYPE_ATT_3_5GHz_COM3:   break;
+        default:
+            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
+            break;
+    }
+    return ret;
+}

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/CRC16(1475).h

@@ -0,0 +1,21 @@
+/*
+ * CRC16.h
+ *
+ *  Created on: 2019. 7. 3.
+ *      Author: parkyj
+ */
+
+#ifndef CRC16_H_
+#define CRC16_H_
+
+#include "main.h"
+
+typedef enum{
+    CHECKSUM_ERROR = 0,
+    NO_ERROR
+}etError;
+
+
+uint16_t CRC16_Generate(uint8_t *buf_ptr, int32_t len);
+etError CRC16_Check(uint8_t *buf_ptr, int32_t len,uint16_t checksum);
+#endif /* CRC16_H_ */

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/CRC16(8054).c

@@ -0,0 +1,82 @@
+/*
+ * CRC16.c
+ *
+ *  Created on: 2019. 7. 3.
+ *      Author: parkyj
+ */
+
+/*---------------------------------------------------------------------------------------*/
+/*									CRC16	TABLE						    			 */
+/*---------------------------------------------------------------------------------------*/
+unsigned short Table_CRC16[]  = {
+	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+	0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+	0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+	0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+	0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+	0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+	0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+	0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+	0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+	0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+	0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+	0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+	0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+	0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+	0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+	0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+	0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+	0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+	0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+	0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+	0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+	0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+	0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+	0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+	0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+	0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+	0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+	0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+	0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+	0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+//-----------------------------------------------
+//UART CRC üũ ÇÔ¼ö
+//-----------------------------------------------
+unsigned short genCRC16(char *buf_ptr, int len)
+{
+	unsigned char dt = 0U;
+	unsigned short crc16 = 0U;
+
+	len *= 8;
+	for(crc16 = (unsigned short)0x0000; len >= 8; len -= 8, buf_ptr++)
+	{
+		crc16 = (unsigned short)(Table_CRC16[(crc16>>8) ^ (unsigned short)(*buf_ptr)] ^ (crc16<<8));
+	}
+
+	if(len != 0)
+	{
+		dt = (unsigned char)(*buf_ptr << 8);
+
+		while(len != 0)
+		{
+			len--;
+
+			if(((crc16^dt) & ((unsigned short)1 << 15)) != 0)
+			{
+				crc16 =  (unsigned short)(crc16 << 1);
+				crc16 = (unsigned short)(crc16 ^ 0x1021);
+			}
+			else
+			{
+				crc16 =  (unsigned short)(crc16 << 1);
+			}
+			dt = (unsigned char)(dt << 1);
+		}
+	}
+	return(crc16);
+}
+

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(2317).c

@@ -0,0 +1,596 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim6;
+
+UART_HandleTypeDef huart1;
+
+/* USER CODE BEGIN PV */
+volatile uint32_t LedTimerCnt = 0;
+volatile uint32_t FirmwareTimerCnt = 0;
+volatile uint32_t UartTimerCnt = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_TIM6_Init(void);
+static void MX_NVIC_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#define ADC_EA     14
+__IO uint32_t ADCvalue[ADC_EA];
+#if 1 // PYJ.2019.07.26_BEGIN --
+
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+    if(htim->Instance == TIM6){
+        UartTimerCnt++;
+        LedTimerCnt++;
+        FirmwareTimerCnt++;
+    }
+} 
+#endif // PYJ.2019.07.26_END -- 
+int _write (int file, uint8_t *ptr, uint16_t len)
+{
+    HAL_UART_Transmit (&huart1, ptr, len, 10);
+    return len;
+}
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+  
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_ADC1_Init();
+  MX_USART1_UART_Init();
+  MX_TIM6_Init();
+
+  /* Initialize interrupts */
+  MX_NVIC_Init();
+  /* USER CODE BEGIN 2 */
+  setbuf(stdout, NULL);
+  printf("UART Start \r\n");
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
+  while (1)
+  {
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief NVIC Configuration.
+  * @retval None
+  */
+static void MX_NVIC_Init(void)
+{
+  /* USART1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* TIM6_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+  /** Common config 
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+  hadc1.Init.ContinuousConvMode = ENABLE;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.NbrOfConversion = 14;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_0;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_2;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_3;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_4;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_6;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_7;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_8;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_9;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_10;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_11;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_12;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_13;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Rank = ADC_REGULAR_RANK_14;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM6 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM6_Init(void)
+{
+
+  /* USER CODE BEGIN TIM6_Init 0 */
+
+  /* USER CODE END TIM6_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM6_Init 1 */
+
+  /* USER CODE END TIM6_Init 1 */
+  htim6.Instance = TIM6;
+  htim6.Init.Prescaler = 6000-1;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim6.Init.Period = 10;
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM6_Init 2 */
+
+  /* USER CODE END TIM6_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/** 
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void) 
+{
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
+                           PLL_EN_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
+                           PATH_EN_3_5G_L_Pin */
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |PATH_EN_3_5G_L_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_DL_Pin 
+                           PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_L_Pin PLL_ON_OFF_3_5G_H_Pin BOOT_LED_Pin */
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{ 
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(3251).h

@@ -0,0 +1,226 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include <stdio.h>
+#include "PE43711.h"
+#include "BDA4601.h"
+#include "zig_operate.h"
+#include "adf4153.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+typedef struct _ATTEN_Setting_st{
+
+    GPIO_TypeDef * CLK_PORT;
+    uint16_t       CLK_PIN;
+    GPIO_TypeDef * DATA_PORT;
+    uint16_t       DATA_PIN;    
+    GPIO_TypeDef * ENABLE_PORT;    
+    uint16_t       ENABLE_PIN;    
+    GPIO_TypeDef * PATH_EN_PORT;    
+    uint16_t       PATH_EN_PIN;    
+} ATTEN_Setting_st;
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define ATT_EN_1_8G_DL1_Pin GPIO_PIN_2
+#define ATT_EN_1_8G_DL1_GPIO_Port GPIOE
+#define ATT_EN_1_8G_DL2_Pin GPIO_PIN_3
+#define ATT_EN_1_8G_DL2_GPIO_Port GPIOE
+#define ATT_EN_1_8G_UL1_Pin GPIO_PIN_4
+#define ATT_EN_1_8G_UL1_GPIO_Port GPIOE
+#define ATT_EN_1_8G_UL2_Pin GPIO_PIN_5
+#define ATT_EN_1_8G_UL2_GPIO_Port GPIOE
+#define ATT_EN_1_8G_UL3_Pin GPIO_PIN_6
+#define ATT_EN_1_8G_UL3_GPIO_Port GPIOE
+#define ATT_EN_1_8G_UL4_Pin GPIO_PIN_13
+#define ATT_EN_1_8G_UL4_GPIO_Port GPIOC
+#define PATH_EN_1_8G_DL_Pin GPIO_PIN_14
+#define PATH_EN_1_8G_DL_GPIO_Port GPIOC
+#define PATH_EN_1_8G_UL_Pin GPIO_PIN_15
+#define PATH_EN_1_8G_UL_GPIO_Port GPIOC
+#define PLL_EN_1_8G_DL_Pin GPIO_PIN_0
+#define PLL_EN_1_8G_DL_GPIO_Port GPIOF
+#define PLL_EN_1_8G_UL_Pin GPIO_PIN_1
+#define PLL_EN_1_8G_UL_GPIO_Port GPIOF
+#define PLL_LD_1_8G_DL_Pin GPIO_PIN_2
+#define PLL_LD_1_8G_DL_GPIO_Port GPIOF
+#define PLL_LD_1_8G_UL_Pin GPIO_PIN_3
+#define PLL_LD_1_8G_UL_GPIO_Port GPIOF
+#define ATT_EN_2_1G_DL1_Pin GPIO_PIN_4
+#define ATT_EN_2_1G_DL1_GPIO_Port GPIOF
+#define ATT_EN_2_1G_DL2_Pin GPIO_PIN_5
+#define ATT_EN_2_1G_DL2_GPIO_Port GPIOF
+#define ATT_EN_2_1G_UL1_Pin GPIO_PIN_6
+#define ATT_EN_2_1G_UL1_GPIO_Port GPIOF
+#define ATT_EN_2_1G_UL2_Pin GPIO_PIN_7
+#define ATT_EN_2_1G_UL2_GPIO_Port GPIOF
+#define ATT_EN_2_1G_UL3_Pin GPIO_PIN_8
+#define ATT_EN_2_1G_UL3_GPIO_Port GPIOF
+#define ATT_EN_2_1G_UL4_Pin GPIO_PIN_9
+#define ATT_EN_2_1G_UL4_GPIO_Port GPIOF
+#define DET_3_5G_UL_IN_Pin GPIO_PIN_0
+#define DET_3_5G_UL_IN_GPIO_Port GPIOC
+#define DET_3_5G_UL_OUT_Pin GPIO_PIN_1
+#define DET_3_5G_UL_OUT_GPIO_Port GPIOC
+#define RFU_TEMP_Pin GPIO_PIN_2
+#define RFU_TEMP_GPIO_Port GPIOC
+#define _28V_DET_Pin GPIO_PIN_3
+#define _28V_DET_GPIO_Port GPIOC
+#define DET_1_8G_DL_IN_Pin GPIO_PIN_0
+#define DET_1_8G_DL_IN_GPIO_Port GPIOA
+#define DET_1_8G_DL_OUT_Pin GPIO_PIN_1
+#define DET_1_8G_DL_OUT_GPIO_Port GPIOA
+#define DET_1_8G_UL_IN_Pin GPIO_PIN_2
+#define DET_1_8G_UL_IN_GPIO_Port GPIOA
+#define DET_1_8G_UL_OUT_Pin GPIO_PIN_3
+#define DET_1_8G_UL_OUT_GPIO_Port GPIOA
+#define DET_2_1G_DL_IN_Pin GPIO_PIN_4
+#define DET_2_1G_DL_IN_GPIO_Port GPIOA
+#define DET_2_1G_DL_OUT_Pin GPIO_PIN_5
+#define DET_2_1G_DL_OUT_GPIO_Port GPIOA
+#define DET_2_1G_UL_IN_Pin GPIO_PIN_6
+#define DET_2_1G_UL_IN_GPIO_Port GPIOA
+#define DET_2_1G_UL_OUT_Pin GPIO_PIN_7
+#define DET_2_1G_UL_OUT_GPIO_Port GPIOA
+#define DET_3_5G_DL_IN_Pin GPIO_PIN_0
+#define DET_3_5G_DL_IN_GPIO_Port GPIOB
+#define DET_3_5G_DL_OUT_Pin GPIO_PIN_1
+#define DET_3_5G_DL_OUT_GPIO_Port GPIOB
+#define PLL_DATA_Pin GPIO_PIN_8
+#define PLL_DATA_GPIO_Port GPIOD
+#define PLL_CLK_Pin GPIO_PIN_9
+#define PLL_CLK_GPIO_Port GPIOD
+#define ATT_DATA_Pin GPIO_PIN_10
+#define ATT_DATA_GPIO_Port GPIOD
+#define ATT_CLK_Pin GPIO_PIN_11
+#define ATT_CLK_GPIO_Port GPIOD
+#define ALARM_DC_Pin GPIO_PIN_12
+#define ALARM_DC_GPIO_Port GPIOD
+#define ALARM_AC_Pin GPIO_PIN_13
+#define ALARM_AC_GPIO_Port GPIOD
+#define DA_LDAC_Pin GPIO_PIN_15
+#define DA_LDAC_GPIO_Port GPIOD
+#define DA_SYNC_Pin GPIO_PIN_2
+#define DA_SYNC_GPIO_Port GPIOG
+#define DA_SCLK_Pin GPIO_PIN_3
+#define DA_SCLK_GPIO_Port GPIOG
+#define DA_DIN_Pin GPIO_PIN_4
+#define DA_DIN_GPIO_Port GPIOG
+#define _T_SYNC_UL_Pin GPIO_PIN_5
+#define _T_SYNC_UL_GPIO_Port GPIOG
+#define T_SYNC_UL_Pin GPIO_PIN_6
+#define T_SYNC_UL_GPIO_Port GPIOG
+#define _T_SYNC_DL_Pin GPIO_PIN_7
+#define _T_SYNC_DL_GPIO_Port GPIOG
+#define T_SYNC_DL_Pin GPIO_PIN_8
+#define T_SYNC_DL_GPIO_Port GPIOG
+#define PLL_EN_3_5G_L_Pin GPIO_PIN_6
+#define PLL_EN_3_5G_L_GPIO_Port GPIOC
+#define PLL_EN_3_5G_H_Pin GPIO_PIN_7
+#define PLL_EN_3_5G_H_GPIO_Port GPIOC
+#define PLL_LD_3_5G_L_Pin GPIO_PIN_8
+#define PLL_LD_3_5G_L_GPIO_Port GPIOC
+#define PLL_LD_3_5G_H_Pin GPIO_PIN_9
+#define PLL_LD_3_5G_H_GPIO_Port GPIOC
+#define ATT_CLK_3_5G_Pin GPIO_PIN_0
+#define ATT_CLK_3_5G_GPIO_Port GPIOD
+#define ATT_EN_3_5G_Pin GPIO_PIN_1
+#define ATT_EN_3_5G_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_DL_Pin GPIO_PIN_2
+#define ATT_DATA_3_5G_DL_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_UL_Pin GPIO_PIN_3
+#define ATT_DATA_3_5G_UL_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_COM1_Pin GPIO_PIN_4
+#define ATT_DATA_3_5G_COM1_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_COM2_Pin GPIO_PIN_5
+#define ATT_DATA_3_5G_COM2_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_COM3_Pin GPIO_PIN_6
+#define ATT_DATA_3_5G_COM3_GPIO_Port GPIOD
+#define PATH_EN_3_5G_L_Pin GPIO_PIN_7
+#define PATH_EN_3_5G_L_GPIO_Port GPIOD
+#define PATH_EN_3_5G_H_Pin GPIO_PIN_9
+#define PATH_EN_3_5G_H_GPIO_Port GPIOG
+#define PATH_EN_3_5G_DL_Pin GPIO_PIN_10
+#define PATH_EN_3_5G_DL_GPIO_Port GPIOG
+#define PATH_EN_3_5G_UL_Pin GPIO_PIN_11
+#define PATH_EN_3_5G_UL_GPIO_Port GPIOG
+#define PLL_ON_OFF_3_5G_L_Pin GPIO_PIN_12
+#define PLL_ON_OFF_3_5G_L_GPIO_Port GPIOG
+#define PLL_ON_OFF_3_5G_H_Pin GPIO_PIN_13
+#define PLL_ON_OFF_3_5G_H_GPIO_Port GPIOG
+#define BOOT_LED_Pin GPIO_PIN_14
+#define BOOT_LED_GPIO_Port GPIOG
+#define PLL_EN_2_1G_DL_Pin GPIO_PIN_3
+#define PLL_EN_2_1G_DL_GPIO_Port GPIOB
+#define PLL_EN_2_1G_UL_Pin GPIO_PIN_4
+#define PLL_EN_2_1G_UL_GPIO_Port GPIOB
+#define PLL_LD_2_1G_DL_Pin GPIO_PIN_5
+#define PLL_LD_2_1G_DL_GPIO_Port GPIOB
+#define PLL_LD_2_1G_UL_Pin GPIO_PIN_6
+#define PLL_LD_2_1G_UL_GPIO_Port GPIOB
+#define PATH_EN_2_1G_DL_Pin GPIO_PIN_0
+#define PATH_EN_2_1G_DL_GPIO_Port GPIOE
+#define PATH_EN_2_1G_UL_Pin GPIO_PIN_1
+#define PATH_EN_2_1G_UL_GPIO_Port GPIOE
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/uart(4962).h

@@ -0,0 +1,32 @@
+/*
+ * uart.h
+ *
+ *  Created on: 2019. 5. 27.
+ *      Author: parkyj
+ */
+
+#ifndef UART_H_
+#define UART_H_
+
+#include "main.h"
+
+#define hTerminal    huart1
+
+#define QUEUE_BUFFER_LENGTH 2048
+
+typedef struct
+{
+    int head, tail, data;
+    uint8_t Buffer[QUEUE_BUFFER_LENGTH];
+}UARTQUEUE, *pUARTQUEUE;
+
+extern UART_HandleTypeDef huart1;
+
+extern UARTQUEUE TerminalQueue;
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data);
+void InitUartQueue(pUARTQUEUE pQueue);
+void GetDataFromUartQueue(UART_HandleTypeDef *huart);
+bool Get_UartRcv(void);
+void Set_UartRcv(bool);
+
+#endif /* UART_H_ */

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/uart(7188).c

@@ -0,0 +1,91 @@
+/*
+ * uart.c
+ *
+ *  Created on: 2019. 5. 27.
+ *      Author: parkyj
+ */
+
+#include "uart.h"
+
+UARTQUEUE TerminalQueue;
+UARTQUEUE WifiQueue;
+
+void InitUartQueue(pUARTQUEUE pQueue)
+{
+    pQueue->data = pQueue->head = pQueue->tail = 0;
+
+    if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
+    {
+      //_Error_Handler(__FILE__, __LINE__);
+    }
+    //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
+    //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
+}
+
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+    pUARTQUEUE pQueue;
+//    printf("Function : %s : \r\n",__func__);
+    UartTimerCnt = 0;
+    pQueue = &TerminalQueue;
+    pQueue->head++;
+    if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0;
+    pQueue->data++;
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
+        GetDataFromUartQueue(huart);
+    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
+   // Set_UartRcv(true);
+}
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data)
+{
+    pUARTQUEUE pQueue = &TerminalQueue;
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
+        GetDataFromUartQueue(huart);
+    pQueue->Buffer[pQueue->head++] = data;
+    if (pQueue->head == QUEUE_BUFFER_LENGTH) pQueue->head = 0;
+    pQueue->data++;
+   // HAL_UART_Receive_DMA(&hTerminal,  pQueue->Buffer + pQueue->head, 10);
+}
+
+void GetDataFromUartQueue(UART_HandleTypeDef *huart)
+{
+    volatile static uint8_t update_data_buf[1024];
+    volatile static int cnt;
+    uint8_t temp_buf[11];
+    
+//    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
+    UART_HandleTypeDef *dst = &hTerminal;
+    pUARTQUEUE pQueue = &TerminalQueue;
+//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
+//    {
+//       _Error_Handler(__FILE__, __LINE__);
+//    }
+    update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail);        
+
+    pQueue->tail++;
+    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
+    pQueue->data--;
+    
+    if(pQueue->data == 0){
+        HAL_UART_Transmit(dst, &temp_buf[BLUECELL_HEADER00], 11, 3000);
+#if 0 // PYJ.2019.07.15_BEGIN -- 
+//            for(int i = 0; i < cnt; i++){
+//                printf("%02x",update_data_buf[i]);
+//            }
+#endif // PYJ.2019.07.15_END -- 
+        cnt = 0;
+        FirmwareUpdateStart(&update_data_buf[0]);
+        
+        for(int i  = 0; i < 1024; i++)
+            update_data_buf[i] = 0;
+        
+        FirmwareTimerCnt = 0;
+        HAL_Delay(1);
+    }
+
+}
+
+void Uart1_Data_Send(uint8_t* data,uint8_t size){
+    HAL_UART_Transmit(&huart1, data,size, 10); 
+}
+

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/uart~a9d14a5(6382).h

@@ -0,0 +1,35 @@
+/*
+ * uart.h
+ *
+ *  Created on: 2019. 5. 27.
+ *      Author: parkyj
+ */
+
+#ifndef UART_H_
+#define UART_H_
+
+#include "main.h"
+
+#define hTerminal    huart1
+#define hWifi        huart2
+
+#define QUEUE_BUFFER_LENGTH 2048
+
+typedef struct
+{
+    int head, tail, data;
+    uint8_t Buffer[QUEUE_BUFFER_LENGTH];
+}UARTQUEUE, *pUARTQUEUE;
+
+extern UART_HandleTypeDef huart1;
+extern UART_HandleTypeDef huart2;
+extern UART_HandleTypeDef huart3;
+
+extern UARTQUEUE TerminalQueue;
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data);
+void InitUartQueue(pUARTQUEUE pQueue);
+void GetDataFromUartQueue(UART_HandleTypeDef *huart);
+bool Get_UartRcv(void);
+void Set_UartRcv(bool);
+
+#endif /* UART_H_ */

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(1352).h

@@ -0,0 +1,13 @@
+/*
+ * zig_operate.h
+ *
+ *  Created on: 2019. 7. 26.
+ *      Author: parkyj
+ */
+
+#ifndef ZIG_OPERATE_H_
+#define ZIG_OPERATE_H_
+#include "main.h"
+
+
+#endif /* ZIG_OPERATE_H_ */