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ADC 배열 순서 수정

YJ il y a 6 ans
Parent
commit
ef439b8eb9
24 fichiers modifiés avec 1957 ajouts et 169 suppressions
  1. BIN
      Debug/STM32F103_ATTEN_PLL_Zig.elf
  2. 7 7
      Debug/STM32F103_ATTEN_PLL_Zig.hex
  3. 43 43
      Debug/STM32F103_ATTEN_PLL_Zig.list
  4. 87 83
      Debug/STM32F103_ATTEN_PLL_Zig.map
  5. BIN
      Debug/Src/BDA4601.o
  6. BIN
      Debug/Src/stm32f1xx_hal_msp.o
  7. BIN
      Debug/Src/stm32f1xx_it.o
  8. 1 1
      Inc/includes.h
  9. 16 16
      STM32F103_ATTEN_PLL_Zig.ioc
  10. 1 1
      Src/includes.c
  11. 16 16
      Src/main.c
  12. 2 2
      Src/stm32f1xx_hal_msp.c
  13. 249 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/includes(3427).c
  14. 31 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/includes(6579).h
  15. 751 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(6049).c
  16. 753 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(7098).c
  17. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_includes.h.sisc
  18. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_main.h.sisc
  19. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_hal_conf.h.sisc
  20. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_it.h.sisc
  21. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_includes.c.sisc
  22. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_main.c.sisc
  23. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_hal_msp.c.sisc
  24. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_it.c.sisc

BIN
Debug/STM32F103_ATTEN_PLL_Zig.elf


+ 7 - 7
Debug/STM32F103_ATTEN_PLL_Zig.hex

@@ -1001,7 +1001,7 @@
1001 1001
 :107E680010030A930A9BAB69012643F08003AB61B8
1002 1002
 :107E7800AB69022703F080030B930B9BAB694FF0B0
1003 1003
 :107E88000C0B43F00403AB61AB694FF00E0903F030
1004
-:107E980004030C930C9BAB694FF0050843F00803EF
1004
+:107E980004030C930C9BAB694FF0070843F00803ED
1005 1005
 :107EA800AB61AB694FF0030A03F008030D930D9B18
1006 1006
 :107EB800AB6943F02003AB61AB6903F020030E9379
1007 1007
 :107EC8000E9BAB6943F48073AB61AB6903F48073B9
@@ -1030,9 +1030,9 @@
1030 1030
 :10803800A7FA10A9284610961197FDF7A1FA10A9DA
1031 1031
 :108048002846CDF844A01097FDF79AFACDF840A03D
1032 1032
 :108058004FF0040A10A92846CDF844A0FDF790FA7D
1033
-:1080680010A92846CDF840A0CDF84480FDF788FA3D
1034
-:10807800CDF840804FF0060810A92846CDF8448076
1035
-:10808800FDF77EFACDF840804FF0070810A9284682
1033
+:10806800CDF840A04FF0050A10A92846CDF844A045
1034
+:10807800FDF786FACDF840A04FF0060A10A9284669
1035
+:10808800CDF844A0FDF77CFA10A92846CDF840A009
1036 1036
 :10809800CDF84480FDF774FACDF840804FF0080819
1037 1037
 :1080A80010A92846CDF84480FDF76AFACDF840803B
1038 1038
 :1080B8004FF0090810A92846CDF84480FDF760FA6A
@@ -1092,8 +1092,8 @@
1092 1092
 :108418000023C9F80030DFF8C8A0DFF8C890DFF8FB
1093 1093
 :10842800B4B0DAF80830002B03DDD9F80030642B3B
1094 1094
 :1084380023D840F6C413264A116899427FF67FAFC5
1095
-:108448000023DFF87890DFF8A0C059F8230003EB89
1096
-:108458000C0102334FEA102E0E2B81F822E081F82E
1095
+:108448000023DFF87890DFF8A0C059F8130003EB99
1096
+:108458000C0102334FEA102E1C2B81F822E081F820
1097 1097
 :108468002300F2D10023136069E74FF4806140468E
1098 1098
 :10847800FDF726FF0128BFD19AE7584600F0DEFA3B
1099 1099
 :10848800CFE700BFAFF30080A0B483EA000000008C
@@ -1151,7 +1151,7 @@
1151 1151
 :1087C80008030393039B0F230493FDF78DFCFF23FA
1152 1152
 :1087D80004A9154804930594FDF786FC134804A9D9
1153 1153
 :1087E80004940594FDF780FC8022114C114BE26043
1154
-:1087F8004FF4807222614FF480622360626100232B
1154
+:1087F8004FF4007222614FF400622360626100232B
1155 1155
 :10880800202220466360A360A261E361FDF77EF940
1156 1156
 :1088180008B1FFF76BFE2C62656209B030BD00BF7E
1157 1157
 :10882800002401400010014000080140000C0140F4

+ 43 - 43
Debug/STM32F103_ATTEN_PLL_Zig.list

@@ -23,23 +23,23 @@ Idx Name          Size      VMA       LMA       File off  Algn
23 23
                   ALLOC
24 24
   9 .ARM.attributes 00000029  00000000  00000000  00010404  2**0
25 25
                   CONTENTS, READONLY
26
- 10 .debug_info   0002a177  00000000  00000000  0001042d  2**0
26
+ 10 .debug_info   0002a2c4  00000000  00000000  0001042d  2**0
27 27
                   CONTENTS, READONLY, DEBUGGING
28
- 11 .debug_abbrev 000050b6  00000000  00000000  0003a5a4  2**0
28
+ 11 .debug_abbrev 000050e8  00000000  00000000  0003a6f1  2**0
29 29
                   CONTENTS, READONLY, DEBUGGING
30
- 12 .debug_loc    00009d35  00000000  00000000  0003f65a  2**0
30
+ 12 .debug_loc    00009d22  00000000  00000000  0003f7d9  2**0
31 31
                   CONTENTS, READONLY, DEBUGGING
32
- 13 .debug_aranges 00000e00  00000000  00000000  00049390  2**3
32
+ 13 .debug_aranges 00000e00  00000000  00000000  00049500  2**3
33 33
                   CONTENTS, READONLY, DEBUGGING
34
- 14 .debug_ranges 00001238  00000000  00000000  0004a190  2**3
34
+ 14 .debug_ranges 00001238  00000000  00000000  0004a300  2**3
35 35
                   CONTENTS, READONLY, DEBUGGING
36
- 15 .debug_line   00009c8a  00000000  00000000  0004b3c8  2**0
36
+ 15 .debug_line   00009d24  00000000  00000000  0004b538  2**0
37 37
                   CONTENTS, READONLY, DEBUGGING
38
- 16 .debug_str    00005746  00000000  00000000  00055052  2**0
38
+ 16 .debug_str    00005746  00000000  00000000  0005525c  2**0
39 39
                   CONTENTS, READONLY, DEBUGGING
40
- 17 .comment      0000007c  00000000  00000000  0005a798  2**0
40
+ 17 .comment      0000007c  00000000  00000000  0005a9a2  2**0
41 41
                   CONTENTS, READONLY
42
- 18 .debug_frame  000037a8  00000000  00000000  0005a814  2**2
42
+ 18 .debug_frame  000037a8  00000000  00000000  0005aa20  2**2
43 43
                   CONTENTS, READONLY, DEBUGGING
44 44
 
45 45
 Disassembly of section .text:
@@ -8760,8 +8760,8 @@ static void MX_GPIO_Init(void)
8760 8760
  8007e9c:	9b0c      	ldr	r3, [sp, #48]	; 0x30
8761 8761
   __HAL_RCC_GPIOB_CLK_ENABLE();
8762 8762
  8007e9e:	69ab      	ldr	r3, [r5, #24]
8763
-  sConfig.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
8764
- 8007ea0:	f04f 0805 	mov.w	r8, #5
8763
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
8764
+ 8007ea0:	f04f 0807 	mov.w	r8, #7
8765 8765
   __HAL_RCC_GPIOB_CLK_ENABLE();
8766 8766
  8007ea4:	f043 0308 	orr.w	r3, r3, #8
8767 8767
  8007ea8:	61ab      	str	r3, [r5, #24]
@@ -9063,7 +9063,7 @@ static void MX_GPIO_Init(void)
9063 9063
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9064 9064
  800802a:	a910      	add	r1, sp, #64	; 0x40
9065 9065
  800802c:	4628      	mov	r0, r5
9066
-  sConfig.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
9066
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
9067 9067
  800802e:	f8cd 8048 	str.w	r8, [sp, #72]	; 0x48
9068 9068
   sConfig.Channel = ADC_CHANNEL_0;
9069 9069
  8008032:	9410      	str	r4, [sp, #64]	; 0x40
@@ -9100,33 +9100,33 @@ static void MX_GPIO_Init(void)
9100 9100
  8008060:	f8cd a044 	str.w	sl, [sp, #68]	; 0x44
9101 9101
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9102 9102
  8008064:	f7fd fa90 	bl	8005588 <HAL_ADC_ConfigChannel>
9103
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9104
- 8008068:	a910      	add	r1, sp, #64	; 0x40
9105
- 800806a:	4628      	mov	r0, r5
9106 9103
   sConfig.Channel = ADC_CHANNEL_4;
9107
- 800806c:	f8cd a040 	str.w	sl, [sp, #64]	; 0x40
9104
+ 8008068:	f8cd a040 	str.w	sl, [sp, #64]	; 0x40
9105
+  sConfig.Rank = ADC_REGULAR_RANK_5;
9106
+ 800806c:	f04f 0a05 	mov.w	sl, #5
9107
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9108
+ 8008070:	a910      	add	r1, sp, #64	; 0x40
9109
+ 8008072:	4628      	mov	r0, r5
9108 9110
   sConfig.Rank = ADC_REGULAR_RANK_5;
9109
- 8008070:	f8cd 8044 	str.w	r8, [sp, #68]	; 0x44
9111
+ 8008074:	f8cd a044 	str.w	sl, [sp, #68]	; 0x44
9110 9112
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9111
- 8008074:	f7fd fa88 	bl	8005588 <HAL_ADC_ConfigChannel>
9113
+ 8008078:	f7fd fa86 	bl	8005588 <HAL_ADC_ConfigChannel>
9112 9114
   sConfig.Channel = ADC_CHANNEL_5;
9113
- 8008078:	f8cd 8040 	str.w	r8, [sp, #64]	; 0x40
9115
+ 800807c:	f8cd a040 	str.w	sl, [sp, #64]	; 0x40
9114 9116
   sConfig.Rank = ADC_REGULAR_RANK_6;
9115
- 800807c:	f04f 0806 	mov.w	r8, #6
9117
+ 8008080:	f04f 0a06 	mov.w	sl, #6
9116 9118
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9117
- 8008080:	a910      	add	r1, sp, #64	; 0x40
9118
- 8008082:	4628      	mov	r0, r5
9119
+ 8008084:	a910      	add	r1, sp, #64	; 0x40
9120
+ 8008086:	4628      	mov	r0, r5
9119 9121
   sConfig.Rank = ADC_REGULAR_RANK_6;
9120
- 8008084:	f8cd 8044 	str.w	r8, [sp, #68]	; 0x44
9122
+ 8008088:	f8cd a044 	str.w	sl, [sp, #68]	; 0x44
9121 9123
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9122
- 8008088:	f7fd fa7e 	bl	8005588 <HAL_ADC_ConfigChannel>
9123
-  sConfig.Channel = ADC_CHANNEL_6;
9124
- 800808c:	f8cd 8040 	str.w	r8, [sp, #64]	; 0x40
9125
-  sConfig.Rank = ADC_REGULAR_RANK_7;
9126
- 8008090:	f04f 0807 	mov.w	r8, #7
9124
+ 800808c:	f7fd fa7c 	bl	8005588 <HAL_ADC_ConfigChannel>
9127 9125
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
9128
- 8008094:	a910      	add	r1, sp, #64	; 0x40
9129
- 8008096:	4628      	mov	r0, r5
9126
+ 8008090:	a910      	add	r1, sp, #64	; 0x40
9127
+ 8008092:	4628      	mov	r0, r5
9128
+  sConfig.Channel = ADC_CHANNEL_6;
9129
+ 8008094:	f8cd a040 	str.w	sl, [sp, #64]	; 0x40
9130 9130
   sConfig.Rank = ADC_REGULAR_RANK_7;
9131 9131
  8008098:	f8cd 8044 	str.w	r8, [sp, #68]	; 0x44
9132 9132
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
@@ -9457,7 +9457,7 @@ static void MX_GPIO_Init(void)
9457 9457
  8008330:	e9d7 6700 	ldrd	r6, r7, [r7]
9458 9458
     ATTEN_PLL_PATH_Initialize();
9459 9459
  8008334:	f7ff fcf6 	bl	8007d24 <ATTEN_PLL_PATH_Initialize>
9460
-  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);  
9460
+    HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
9461 9461
  8008338:	220e      	movs	r2, #14
9462 9462
  800833a:	4962      	ldr	r1, [pc, #392]	; (80084c4 <main+0x69c>)
9463 9463
  800833c:	4862      	ldr	r0, [pc, #392]	; (80084c8 <main+0x6a0>)
@@ -9568,20 +9568,20 @@ static void MX_GPIO_Init(void)
9568 9568
  8008442:	4299      	cmp	r1, r3
9569 9569
  8008444:	f67f af7f 	bls.w	8008346 <main+0x51e>
9570 9570
  8008448:	2300      	movs	r3, #0
9571
-            Prev_data[INDEX_DET_1_8G_DL_IN_H + i]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
9571
+            Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
9572 9572
  800844a:	f8df 9078 	ldr.w	r9, [pc, #120]	; 80084c4 <main+0x69c>
9573 9573
  800844e:	f8df c0a0 	ldr.w	ip, [pc, #160]	; 80084f0 <main+0x6c8>
9574
- 8008452:	f859 0023 	ldr.w	r0, [r9, r3, lsl #2]
9574
+ 8008452:	f859 0013 	ldr.w	r0, [r9, r3, lsl #1]
9575 9575
  8008456:	eb03 010c 	add.w	r1, r3, ip
9576 9576
  800845a:	3302      	adds	r3, #2
9577 9577
  800845c:	ea4f 2e10 	mov.w	lr, r0, lsr #8
9578
-        for(uint8_t i = 0; i< ADC_EA; i += 2 ){
9579
- 8008460:	2b0e      	cmp	r3, #14
9580
-            Prev_data[INDEX_DET_1_8G_DL_IN_H + i]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
9578
+        for(uint8_t i = 0; i< ADC_EA; i++ ){
9579
+ 8008460:	2b1c      	cmp	r3, #28
9580
+            Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
9581 9581
  8008462:	f881 e022 	strb.w	lr, [r1, #34]	; 0x22
9582
-            Prev_data[INDEX_DET_1_8G_DL_IN_L + i]     = (uint16_t)(ADCvalue[i] & 0x00FF);
9582
+            Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2]     = (uint16_t)(ADCvalue[i] & 0x00FF);
9583 9583
  8008466:	f881 0023 	strb.w	r0, [r1, #35]	; 0x23
9584
-        for(uint8_t i = 0; i< ADC_EA; i += 2 ){
9584
+        for(uint8_t i = 0; i< ADC_EA; i++ ){
9585 9585
  800846a:	d1f2      	bne.n	8008452 <main+0x62a>
9586 9586
         AdcTimerCnt = 0;
9587 9587
  800846c:	2300      	movs	r3, #0
@@ -10142,14 +10142,14 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
10142 10142
  80087f4:	4b11      	ldr	r3, [pc, #68]	; (800883c <HAL_ADC_MspInit+0xdc>)
10143 10143
     hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
10144 10144
  80087f6:	60e2      	str	r2, [r4, #12]
10145
-    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
10146
- 80087f8:	f44f 7280 	mov.w	r2, #256	; 0x100
10145
+    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
10146
+ 80087f8:	f44f 7200 	mov.w	r2, #512	; 0x200
10147 10147
  80087fc:	6122      	str	r2, [r4, #16]
10148
-    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
10149
- 80087fe:	f44f 6280 	mov.w	r2, #1024	; 0x400
10148
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
10149
+ 80087fe:	f44f 6200 	mov.w	r2, #2048	; 0x800
10150 10150
     hdma_adc1.Instance = DMA1_Channel1;
10151 10151
  8008802:	6023      	str	r3, [r4, #0]
10152
-    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
10152
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
10153 10153
  8008804:	6162      	str	r2, [r4, #20]
10154 10154
     hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
10155 10155
  8008806:	2300      	movs	r3, #0

+ 87 - 83
Debug/STM32F103_ATTEN_PLL_Zig.map

@@ -804,9 +804,9 @@ Discarded input sections
804 804
                 0x00000000       0x54 Src\flash.o
805 805
  .text.Flash_write
806 806
                 0x00000000       0x54 Src\flash.o
807
- .bss.EraseInitStruct.7452
807
+ .bss.EraseInitStruct.7453
808 808
                 0x00000000       0x10 Src\flash.o
809
- .bss.PAGEError.7453
809
+ .bss.PAGEError.7454
810 810
                 0x00000000        0x4 Src\flash.o
811 811
  .bss.flashinit
812 812
                 0x00000000        0x1 Src\flash.o
@@ -825,6 +825,10 @@ Discarded input sections
825 825
  .bss           0x00000000        0x0 Src\includes.o
826 826
  .text.Power_ON_OFF_Initialize
827 827
                 0x00000000       0x98 Src\includes.o
828
+ .data.Bluecell_Prot_IndexStr
829
+                0x00000000      0x128 Src\includes.o
830
+ .rodata.str1.1
831
+                0x00000000      0x5fd Src\includes.o
828 832
  .text          0x00000000        0x0 Src\main.o
829 833
  .data          0x00000000        0x0 Src\main.o
830 834
  .bss           0x00000000        0x0 Src\main.o
@@ -2190,9 +2194,9 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
2190 2194
  *(.bss)
2191 2195
  .bss           0x20000408       0x1c c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
2192 2196
  *(.bss*)
2193
- .bss.EraseInitStruct.7458
2197
+ .bss.EraseInitStruct.7459
2194 2198
                 0x20000424       0x10 Src\flash.o
2195
- .bss.PAGEError.7459
2199
+ .bss.PAGEError.7460
2196 2200
                 0x20000434        0x4 Src\flash.o
2197 2201
  .bss.AdcTimerCnt
2198 2202
                 0x20000438        0x4 Src\main.o
@@ -2205,7 +2209,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
2205 2209
                 0x20000440                UartRxTimerCnt
2206 2210
  .bss.heap_end.5887
2207 2211
                 0x20000444        0x4 Src\syscalls.o
2208
- .bss.cnt.7439  0x20000448        0x4 Src\uart.o
2212
+ .bss.cnt.7440  0x20000448        0x4 Src\uart.o
2209 2213
  .bss.Ack_Buf   0x2000044c        0x6 Src\zig_operate.o
2210 2214
  *fill*         0x20000452        0x2 
2211 2215
  .bss.__malloc_free_list
@@ -2437,7 +2441,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
2437 2441
                 0x00000ec4       0x1d c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtn.o
2438 2442
 OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
2439 2443
 
2440
-.debug_info     0x00000000    0x2a177
2444
+.debug_info     0x00000000    0x2a2c4
2441 2445
  .debug_info    0x00000000     0x102e Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
2442 2446
  .debug_info    0x0000102e     0x16a1 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
2443 2447
  .debug_info    0x000026cf     0x138b Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2451,24 +2455,24 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
2451 2455
  .debug_info    0x0000b012     0x3bb9 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.o
2452 2456
  .debug_info    0x0000ebcb     0x1989 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.o
2453 2457
  .debug_info    0x00010554     0x1e46 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.o
2454
- .debug_info    0x0001239a     0x15bc Src\AD5318.o
2455
- .debug_info    0x00013956     0x16e3 Src\BDA4601.o
2456
- .debug_info    0x00015039     0x1562 Src\CRC16.o
2457
- .debug_info    0x0001659b     0x18c5 Src\PE43711.o
2458
- .debug_info    0x00017e60     0x1e4c Src\adf4153.o
2459
- .debug_info    0x00019cac     0x19a1 Src\flash.o
2460
- .debug_info    0x0001b64d     0x185c Src\includes.o
2461
- .debug_info    0x0001cea9     0x2d62 Src\main.o
2462
- .debug_info    0x0001fc0b     0x1976 Src\pll_4113.o
2463
- .debug_info    0x00021581     0x1f9c Src\stm32f1xx_hal_msp.o
2464
- .debug_info    0x0002351d     0x17e9 Src\stm32f1xx_it.o
2465
- .debug_info    0x00024d06      0xfe1 Src\syscalls.o
2466
- .debug_info    0x00025ce7      0xc4d Src\system_stm32f1xx.o
2467
- .debug_info    0x00026934     0x1731 Src\uart.o
2468
- .debug_info    0x00028065     0x20a1 Src\zig_operate.o
2469
- .debug_info    0x0002a106       0x71 startup\startup_stm32f103xe.o
2458
+ .debug_info    0x0001239a     0x15d8 Src\AD5318.o
2459
+ .debug_info    0x00013972     0x16ff Src\BDA4601.o
2460
+ .debug_info    0x00015071     0x157e Src\CRC16.o
2461
+ .debug_info    0x000165ef     0x18e1 Src\PE43711.o
2462
+ .debug_info    0x00017ed0     0x1e68 Src\adf4153.o
2463
+ .debug_info    0x00019d38     0x19bd Src\flash.o
2464
+ .debug_info    0x0001b6f5     0x185d Src\includes.o
2465
+ .debug_info    0x0001cf52     0x2d7a Src\main.o
2466
+ .debug_info    0x0001fccc     0x1992 Src\pll_4113.o
2467
+ .debug_info    0x0002165e     0x1fb8 Src\stm32f1xx_hal_msp.o
2468
+ .debug_info    0x00023616     0x1805 Src\stm32f1xx_it.o
2469
+ .debug_info    0x00024e1b      0xfe1 Src\syscalls.o
2470
+ .debug_info    0x00025dfc      0xc4d Src\system_stm32f1xx.o
2471
+ .debug_info    0x00026a49     0x174d Src\uart.o
2472
+ .debug_info    0x00028196     0x20bd Src\zig_operate.o
2473
+ .debug_info    0x0002a253       0x71 startup\startup_stm32f103xe.o
2470 2474
 
2471
-.debug_abbrev   0x00000000     0x50b6
2475
+.debug_abbrev   0x00000000     0x50e8
2472 2476
  .debug_abbrev  0x00000000      0x315 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
2473 2477
  .debug_abbrev  0x00000315      0x2fb Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
2474 2478
  .debug_abbrev  0x00000610      0x296 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2482,24 +2486,24 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
2482 2486
  .debug_abbrev  0x00001dfe      0x3bb Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.o
2483 2487
  .debug_abbrev  0x000021b9      0x30d Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.o
2484 2488
  .debug_abbrev  0x000024c6      0x364 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.o
2485
- .debug_abbrev  0x0000282a      0x21c Src\AD5318.o
2486
- .debug_abbrev  0x00002a46      0x256 Src\BDA4601.o
2487
- .debug_abbrev  0x00002c9c      0x23c Src\CRC16.o
2488
- .debug_abbrev  0x00002ed8      0x288 Src\PE43711.o
2489
- .debug_abbrev  0x00003160      0x393 Src\adf4153.o
2490
- .debug_abbrev  0x000034f3      0x2fa Src\flash.o
2491
- .debug_abbrev  0x000037ed      0x242 Src\includes.o
2492
- .debug_abbrev  0x00003a2f      0x39a Src\main.o
2493
- .debug_abbrev  0x00003dc9      0x2b5 Src\pll_4113.o
2494
- .debug_abbrev  0x0000407e      0x2d6 Src\stm32f1xx_hal_msp.o
2495
- .debug_abbrev  0x00004354      0x256 Src\stm32f1xx_it.o
2496
- .debug_abbrev  0x000045aa      0x2d9 Src\syscalls.o
2497
- .debug_abbrev  0x00004883      0x1eb Src\system_stm32f1xx.o
2498
- .debug_abbrev  0x00004a6e      0x2d6 Src\uart.o
2499
- .debug_abbrev  0x00004d44      0x360 Src\zig_operate.o
2500
- .debug_abbrev  0x000050a4       0x12 startup\startup_stm32f103xe.o
2489
+ .debug_abbrev  0x0000282a      0x221 Src\AD5318.o
2490
+ .debug_abbrev  0x00002a4b      0x25b Src\BDA4601.o
2491
+ .debug_abbrev  0x00002ca6      0x241 Src\CRC16.o
2492
+ .debug_abbrev  0x00002ee7      0x28d Src\PE43711.o
2493
+ .debug_abbrev  0x00003174      0x398 Src\adf4153.o
2494
+ .debug_abbrev  0x0000350c      0x2ff Src\flash.o
2495
+ .debug_abbrev  0x0000380b      0x23a Src\includes.o
2496
+ .debug_abbrev  0x00003a45      0x39d Src\main.o
2497
+ .debug_abbrev  0x00003de2      0x2ba Src\pll_4113.o
2498
+ .debug_abbrev  0x0000409c      0x2db Src\stm32f1xx_hal_msp.o
2499
+ .debug_abbrev  0x00004377      0x25b Src\stm32f1xx_it.o
2500
+ .debug_abbrev  0x000045d2      0x2d9 Src\syscalls.o
2501
+ .debug_abbrev  0x000048ab      0x1eb Src\system_stm32f1xx.o
2502
+ .debug_abbrev  0x00004a96      0x2db Src\uart.o
2503
+ .debug_abbrev  0x00004d71      0x365 Src\zig_operate.o
2504
+ .debug_abbrev  0x000050d6       0x12 startup\startup_stm32f103xe.o
2501 2505
 
2502
-.debug_loc      0x00000000     0x9d35
2506
+.debug_loc      0x00000000     0x9d22
2503 2507
  .debug_loc     0x00000000      0x11b Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
2504 2508
  .debug_loc     0x0000011b      0x87e Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
2505 2509
  .debug_loc     0x00000999      0x769 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2520,13 +2524,13 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
2520 2524
  .debug_loc     0x000082f0      0x764 Src\adf4153.o
2521 2525
  .debug_loc     0x00008a54      0x2a2 Src\flash.o
2522 2526
  .debug_loc     0x00008cf6      0x160 Src\includes.o
2523
- .debug_loc     0x00008e56       0xa2 Src\main.o
2524
- .debug_loc     0x00008ef8      0x3da Src\pll_4113.o
2525
- .debug_loc     0x000092d2       0xf2 Src\stm32f1xx_hal_msp.o
2526
- .debug_loc     0x000093c4      0x3ef Src\syscalls.o
2527
- .debug_loc     0x000097b3       0xcd Src\system_stm32f1xx.o
2528
- .debug_loc     0x00009880      0x108 Src\uart.o
2529
- .debug_loc     0x00009988      0x3ad Src\zig_operate.o
2527
+ .debug_loc     0x00008e56       0x8f Src\main.o
2528
+ .debug_loc     0x00008ee5      0x3da Src\pll_4113.o
2529
+ .debug_loc     0x000092bf       0xf2 Src\stm32f1xx_hal_msp.o
2530
+ .debug_loc     0x000093b1      0x3ef Src\syscalls.o
2531
+ .debug_loc     0x000097a0       0xcd Src\system_stm32f1xx.o
2532
+ .debug_loc     0x0000986d      0x108 Src\uart.o
2533
+ .debug_loc     0x00009975      0x3ad Src\zig_operate.o
2530 2534
 
2531 2535
 .debug_aranges  0x00000000      0xe00
2532 2536
  .debug_aranges
@@ -2619,7 +2623,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
2619 2623
  .debug_ranges  0x000011d0       0x48 Src\zig_operate.o
2620 2624
  .debug_ranges  0x00001218       0x20 startup\startup_stm32f103xe.o
2621 2625
 
2622
-.debug_line     0x00000000     0x9c8a
2626
+.debug_line     0x00000000     0x9d24
2623 2627
  .debug_line    0x00000000      0x45f Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
2624 2628
  .debug_line    0x0000045f      0x863 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
2625 2629
  .debug_line    0x00000cc2      0x737 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2633,22 +2637,22 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
2633 2637
  .debug_line    0x00003911     0x1206 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.o
2634 2638
  .debug_line    0x00004b17      0x701 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.o
2635 2639
  .debug_line    0x00005218      0xc45 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.o
2636
- .debug_line    0x00005e5d      0x332 Src\AD5318.o
2637
- .debug_line    0x0000618f      0x364 Src\BDA4601.o
2638
- .debug_line    0x000064f3      0x37f Src\CRC16.o
2639
- .debug_line    0x00006872      0x3ce Src\PE43711.o
2640
- .debug_line    0x00006c40      0x49f Src\adf4153.o
2641
- .debug_line    0x000070df      0x4f8 Src\flash.o
2642
- .debug_line    0x000075d7      0x3d1 Src\includes.o
2643
- .debug_line    0x000079a8      0x6bd Src\main.o
2644
- .debug_line    0x00008065      0x3d0 Src\pll_4113.o
2645
- .debug_line    0x00008435      0x4a2 Src\stm32f1xx_hal_msp.o
2646
- .debug_line    0x000088d7      0x3cb Src\stm32f1xx_it.o
2647
- .debug_line    0x00008ca2      0x3c0 Src\syscalls.o
2648
- .debug_line    0x00009062      0x2bf Src\system_stm32f1xx.o
2649
- .debug_line    0x00009321      0x38d Src\uart.o
2650
- .debug_line    0x000096ae      0x55f Src\zig_operate.o
2651
- .debug_line    0x00009c0d       0x7d startup\startup_stm32f103xe.o
2640
+ .debug_line    0x00005e5d      0x340 Src\AD5318.o
2641
+ .debug_line    0x0000619d      0x372 Src\BDA4601.o
2642
+ .debug_line    0x0000650f      0x38d Src\CRC16.o
2643
+ .debug_line    0x0000689c      0x3dc Src\PE43711.o
2644
+ .debug_line    0x00006c78      0x4ad Src\adf4153.o
2645
+ .debug_line    0x00007125      0x506 Src\flash.o
2646
+ .debug_line    0x0000762b      0x3df Src\includes.o
2647
+ .debug_line    0x00007a0a      0x6bd Src\main.o
2648
+ .debug_line    0x000080c7      0x3de Src\pll_4113.o
2649
+ .debug_line    0x000084a5      0x4b0 Src\stm32f1xx_hal_msp.o
2650
+ .debug_line    0x00008955      0x3d9 Src\stm32f1xx_it.o
2651
+ .debug_line    0x00008d2e      0x3c0 Src\syscalls.o
2652
+ .debug_line    0x000090ee      0x2bf Src\system_stm32f1xx.o
2653
+ .debug_line    0x000093ad      0x39b Src\uart.o
2654
+ .debug_line    0x00009748      0x55f Src\zig_operate.o
2655
+ .debug_line    0x00009ca7       0x7d startup\startup_stm32f103xe.o
2652 2656
 
2653 2657
 .debug_str      0x00000000     0x5746
2654 2658
  .debug_str     0x00000000      0xc6c Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
@@ -2677,36 +2681,36 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
2677 2681
                                0x10cd (size before relaxing)
2678 2682
  .debug_str     0x00003986      0x6d6 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.o
2679 2683
                                0x1044 (size before relaxing)
2680
- .debug_str     0x0000405c      0xa1d Src\AD5318.o
2681
-                               0x14c0 (size before relaxing)
2682
- .debug_str     0x00004a79       0x31 Src\BDA4601.o
2683
-                               0x14cd (size before relaxing)
2684
- .debug_str     0x00004aaa       0x85 Src\CRC16.o
2685
-                               0x14ec (size before relaxing)
2686
- .debug_str     0x00004b2f       0x6a Src\PE43711.o
2687
-                               0x1555 (size before relaxing)
2688
- .debug_str     0x00004b99      0x1ab Src\adf4153.o
2689
-                               0x167a (size before relaxing)
2690
- .debug_str     0x00004d44      0x117 Src\flash.o
2691
-                               0x1690 (size before relaxing)
2692
- .debug_str     0x00004e5b       0xa2 Src\includes.o
2684
+ .debug_str     0x0000405c      0xa34 Src\AD5318.o
2685
+                               0x14d7 (size before relaxing)
2686
+ .debug_str     0x00004a90       0x31 Src\BDA4601.o
2687
+                               0x14e4 (size before relaxing)
2688
+ .debug_str     0x00004ac1       0x85 Src\CRC16.o
2689
+                               0x1503 (size before relaxing)
2690
+ .debug_str     0x00004b46       0x6a Src\PE43711.o
2691
+                               0x156c (size before relaxing)
2692
+ .debug_str     0x00004bb0      0x1ab Src\adf4153.o
2693
+                               0x1691 (size before relaxing)
2694
+ .debug_str     0x00004d5b      0x117 Src\flash.o
2695
+                               0x16a7 (size before relaxing)
2696
+ .debug_str     0x00004e72       0x8b Src\includes.o
2693 2697
                                0x1561 (size before relaxing)
2694 2698
  .debug_str     0x00004efd      0x128 Src\main.o
2695
-                               0x2151 (size before relaxing)
2699
+                               0x2168 (size before relaxing)
2696 2700
  .debug_str     0x00005025       0x84 Src\pll_4113.o
2697
-                               0x1551 (size before relaxing)
2701
+                               0x1568 (size before relaxing)
2698 2702
  .debug_str     0x000050a9       0x25 Src\stm32f1xx_hal_msp.o
2699
-                               0x1cec (size before relaxing)
2703
+                               0x1d03 (size before relaxing)
2700 2704
  .debug_str     0x000050ce      0x113 Src\stm32f1xx_it.o
2701
-                               0x17c1 (size before relaxing)
2705
+                               0x17d8 (size before relaxing)
2702 2706
  .debug_str     0x000051e1      0x256 Src\syscalls.o
2703 2707
                                 0x850 (size before relaxing)
2704 2708
  .debug_str     0x00005437       0x4d Src\system_stm32f1xx.o
2705 2709
                                 0x765 (size before relaxing)
2706 2710
  .debug_str     0x00005484       0x99 Src\uart.o
2707
-                               0x15b7 (size before relaxing)
2711
+                               0x15ce (size before relaxing)
2708 2712
  .debug_str     0x0000551d      0x229 Src\zig_operate.o
2709
-                               0x18bf (size before relaxing)
2713
+                               0x18d6 (size before relaxing)
2710 2714
 
2711 2715
 .comment        0x00000000       0x7c
2712 2716
  .comment       0x00000000       0x7c Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o

BIN
Debug/Src/BDA4601.o


BIN
Debug/Src/stm32f1xx_hal_msp.o


BIN
Debug/Src/stm32f1xx_it.o


+ 1 - 1
Inc/includes.h

@@ -25,7 +25,7 @@ typedef enum{
25 25
 void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
26 26
 void Path_Init(void);
27 27
 void ATTEN_PLL_PATH_Initialize(void);
28
-
28
+char *Bluecell_Prot_IndexStr[];
29 29
 
30 30
 
31 31
 #endif /* INCLUDES_H_ */

+ 16 - 16
STM32F103_ATTEN_PLL_Zig.ioc

@@ -32,27 +32,27 @@ ADC1.Rank-6\#ChannelRegularConversion=6
32 32
 ADC1.Rank-7\#ChannelRegularConversion=7
33 33
 ADC1.Rank-8\#ChannelRegularConversion=8
34 34
 ADC1.Rank-9\#ChannelRegularConversion=9
35
-ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
36
-ADC1.SamplingTime-10\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
37
-ADC1.SamplingTime-11\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
38
-ADC1.SamplingTime-12\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
39
-ADC1.SamplingTime-13\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
40
-ADC1.SamplingTime-14\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
41
-ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
42
-ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
43
-ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
44
-ADC1.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
45
-ADC1.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
46
-ADC1.SamplingTime-7\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
47
-ADC1.SamplingTime-8\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
48
-ADC1.SamplingTime-9\#ChannelRegularConversion=ADC_SAMPLETIME_55CYCLES_5
35
+ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
36
+ADC1.SamplingTime-10\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
37
+ADC1.SamplingTime-11\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
38
+ADC1.SamplingTime-12\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
39
+ADC1.SamplingTime-13\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
40
+ADC1.SamplingTime-14\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
41
+ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
42
+ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
43
+ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
44
+ADC1.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
45
+ADC1.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
46
+ADC1.SamplingTime-7\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
47
+ADC1.SamplingTime-8\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
48
+ADC1.SamplingTime-9\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5
49 49
 ADC1.master=1
50 50
 Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
51 51
 Dma.ADC1.0.Instance=DMA1_Channel1
52
-Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
52
+Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_WORD
53 53
 Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
54 54
 Dma.ADC1.0.Mode=DMA_CIRCULAR
55
-Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
55
+Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
56 56
 Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
57 57
 Dma.ADC1.0.Priority=DMA_PRIORITY_LOW
58 58
 Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority

+ 1 - 1
Src/includes.c

@@ -9,7 +9,7 @@
9 9
 #define MACROSTR(k) #k
10 10
 
11 11
 
12
-static char *Bluecell_Prot_IndexStr[] = {
12
+char *Bluecell_Prot_IndexStr[] = {
13 13
     MACROSTR(INDEX_ATT_1_8G_DL1     ),
14 14
     MACROSTR(INDEX_ATT_1_8G_DL2     ),
15 15
     MACROSTR(INDEX_ATT_1_8G_UL1     ),

+ 16 - 16
Src/main.c

@@ -222,6 +222,7 @@ int main(void)
222 222
     ATTEN_PLL_PATH_Initialize();
223 223
 
224 224
 //  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
225
+    HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
225 226
 
226 227
   /* USER CODE END 2 */
227 228
 
@@ -229,7 +230,7 @@ int main(void)
229 230
   /* USER CODE BEGIN WHILE */
230 231
 //  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
231 232
 //   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
232
-  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);  
233
+ 
233 234
   while (1)
234 235
   {
235 236
     if(HAL_GPIO_ReadPin(PLL_LD_3_5G_H_GPIO_Port, PLL_LD_3_5G_H_Pin) == GPIO_PIN_RESET 
@@ -247,25 +248,24 @@ int main(void)
247 248
     if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
248 249
     while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
249 250
     if(AdcTimerCnt > 2500){
250
-        for(uint8_t i = 0; i< ADC_EA; i += 2 ){
251
-            Prev_data[INDEX_DET_1_8G_DL_IN_H + i]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
252
-            Prev_data[INDEX_DET_1_8G_DL_IN_L + i]     = (uint16_t)(ADCvalue[i] & 0x00FF);
253
-//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_H + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
254
-//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_L + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
251
+        
252
+        for(uint8_t i = 0; i< ADC_EA; i++ ){
253
+            Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
254
+            Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2]     = (uint16_t)(ADCvalue[i] & 0x00FF);
255
+//            printf("Prev_data[%d] : %x",i,Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
256
+//            printf("%x\r\n",i,Prev_data[INDEX_DET_1_8G_DL_IN_L + i]);            
255 257
         }
256 258
 //        for(int i = 0; i < 14; i++)
257 259
 //            printf("\r\nYJ[%d] : %x \r\n",i,ADCvalue[i]);
258 260
 //        HAL_Delay(3000);
259
-#if 1 // PYJ.2019.07.29_BEGIN -- 
260
-//        printf("====================================\r\n");
261
-//            for(uint8_t i = 0; i< ADC_EA; i++){
262
-//                printf("%x",ADCvalue[0]);
263
-//                printf("\r\n");
264
-//                printf("%d",ADCvalue[i]);
265
-//                printf("\r\n");
266
-//            }
261
+#if 0 // PYJ.2019.07.29_BEGIN -- 
262
+        double tmp_volt = 3.3/4095;
263
+        printf("====================================\r\n");
264
+            for(uint8_t i = 0; i< ADC_EA; i++){
265
+                printf("%s :  %f V \r\n",  Bluecell_Prot_IndexStr[INDEX_DET_1_8G_DL_IN_H + i + 1],ADCvalue[i] * tmp_volt);
266
+            }
267 267
 //                printf("\r\nADC[%d] : %d\r\n ",i,ADCvalue[i]);
268
-//        printf("====================================\r\n");
268
+        printf("====================================\r\n");
269 269
 #endif // PYJ.2019.07.29_END -- 
270 270
         AdcTimerCnt = 0;
271 271
 
@@ -378,7 +378,7 @@ static void MX_ADC1_Init(void)
378 378
   */
379 379
   sConfig.Channel = ADC_CHANNEL_0;
380 380
   sConfig.Rank = ADC_REGULAR_RANK_1;
381
-  sConfig.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
381
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
382 382
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
383 383
   {
384 384
     Error_Handler();

+ 2 - 2
Src/stm32f1xx_hal_msp.c

@@ -141,8 +141,8 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
141 141
     hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
142 142
     hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
143 143
     hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
144
-    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
145
-    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
144
+    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
145
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
146 146
     hdma_adc1.Init.Mode = DMA_CIRCULAR;
147 147
     hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
148 148
     if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)

+ 249 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/includes(3427).c

@@ -0,0 +1,249 @@
1
+/*
2
+ * includes.c
3
+ *
4
+ *  Created on: 2019. 7. 28.
5
+ *      Author: parkyj
6
+ */
7
+#include "includes.h"
8
+
9
+#define MACROSTR(k) #k
10
+
11
+
12
+static char *Bluecell_Prot_IndexStr[] = {
13
+    MACROSTR(INDEX_ATT_1_8G_DL1     ),
14
+    MACROSTR(INDEX_ATT_1_8G_DL2     ),
15
+    MACROSTR(INDEX_ATT_1_8G_UL1     ),
16
+    MACROSTR(INDEX_ATT_1_8G_UL2     ),
17
+    MACROSTR(INDEX_ATT_1_8G_UL3     ),
18
+    MACROSTR(INDEX_ATT_1_8G_UL4     ),
19
+    MACROSTR(INDEX_ATT_2_1G_DL1     ),
20
+    MACROSTR(INDEX_ATT_2_1G_DL2     ),
21
+    MACROSTR(INDEX_ATT_2_1G_UL1     ),
22
+    MACROSTR(INDEX_ATT_2_1G_UL2     ),
23
+    MACROSTR(INDEX_ATT_2_1G_UL3     ),
24
+    MACROSTR(INDEX_ATT_2_1G_UL4     ),
25
+    MACROSTR(INDEX_ATT_3_5G_DL      ),
26
+    MACROSTR(INDEX_ATT_3_5G_UL      ),
27
+    MACROSTR(INDEX_ATT_3_5G_COM1    ),
28
+    MACROSTR(INDEX_ATT_3_5G_COM2    ),
29
+    MACROSTR(INDEX_ATT_3_5G_COM3    ),
30
+    MACROSTR(INDEX_PLL_1_8G_DL_H    ),
31
+    MACROSTR(INDEX_PLL_1_8G_DL_L    ),
32
+    MACROSTR(INDEX_PLL_1_8G_UL_H    ),
33
+    MACROSTR(INDEX_PLL_1_8G_UL_L    ),
34
+    MACROSTR(INDEX_PLL_2_1G_DL_H    ),
35
+    MACROSTR(INDEX_PLL_2_1G_DL_L    ),
36
+    MACROSTR(INDEX_PLL_2_1G_UL_H    ),
37
+    MACROSTR(INDEX_PLL_2_1G_UL_L    ),
38
+    MACROSTR(INDEX_PLL_3_5G_DL_H    ),
39
+    MACROSTR(INDEX_PLL_3_5G_DL_L    ),
40
+    MACROSTR(INDEX_PLL_3_5G_UL_H    ),
41
+    MACROSTR(INDEX_PLL_3_5G_UL_L    ),
42
+    MACROSTR(INDEX_PLL_LD_6_BIT     ),
43
+    MACROSTR(INDEX_DET_1_8G_DL_IN_H ),
44
+    MACROSTR(INDEX_DET_1_8G_DL_IN_L ),
45
+    MACROSTR(INDEX_DET_1_8G_DL_OUT_H),
46
+    MACROSTR(INDEX_DET_1_8G_DL_OUT_L),
47
+    MACROSTR(INDEX_DET_1_8G_UL_IN_H ),
48
+    MACROSTR(INDEX_DET_1_8G_UL_IN_L ),
49
+    MACROSTR(INDEX_DET_1_8G_UL_OUT_H),
50
+    MACROSTR(INDEX_DET_1_8G_UL_OUT_L),
51
+    MACROSTR(INDEX_DET_2_1G_DL_IN_H ),
52
+    MACROSTR(INDEX_DET_2_1G_DL_IN_L ),
53
+    MACROSTR(INDEX_DET_2_1G_DL_OUT_H),
54
+    MACROSTR(INDEX_DET_2_1G_DL_OUT_L),
55
+    MACROSTR(INDEX_DET_2_1G_UL_IN_H ),
56
+    MACROSTR(INDEX_DET_2_1G_UL_IN_L ),
57
+    MACROSTR(INDEX_DET_2_1G_UL_OUT_H),
58
+    MACROSTR(INDEX_DET_2_1G_UL_OUT_L),
59
+    MACROSTR(INDEX_DET_3_5G_DL_IN_H ),
60
+    MACROSTR(INDEX_DET_3_5G_DL_IN_L ),
61
+    MACROSTR(INDEX_DET_3_5G_DL_OUT_L),
62
+    MACROSTR(INDEX_DET_3_5G_DL_OUT_H),
63
+    MACROSTR(INDEX_DET_3_5G_UL_IN_H ),
64
+    MACROSTR(INDEX_DET_3_5G_UL_IN_L ),
65
+    MACROSTR(INDEX_DET_3_5G_UL_OUT_H),
66
+    MACROSTR(INDEX_DET_3_5G_UL_OUT_L),
67
+    MACROSTR(INDEX_RFU_TEMP_H       ),
68
+    MACROSTR(INDEX_RFU_TEMP_L       ),
69
+    MACROSTR(INDEX__28V_DET_H       ),
70
+    MACROSTR(INDEX__28V_DET_L       ),
71
+    MACROSTR(INDEX_ALARM_AC         ),
72
+    MACROSTR(INDEX_ALARM_DC         ),
73
+    MACROSTR(INDEX_PATH_EN_1_8G_DL  ),
74
+    MACROSTR(INDEX_PATH_EN_1_8G_UL  ),
75
+    MACROSTR(INDEX_PATH_EN_2_1G_DL  ),
76
+    MACROSTR(INDEX_PATH_EN_2_1G_UL  ),
77
+    MACROSTR(INDEX_PATH_EN_3_5G_L   ),
78
+    MACROSTR(INDEX_PATH_EN_3_5G_H   ),
79
+    MACROSTR(INDEX_PATH_EN_3_5G_DL  ),
80
+    MACROSTR(INDEX_PATH_EN_3_5G_UL  ),
81
+    MACROSTR(INDEX_PLL_ON_OFF_3_5G_H),
82
+    MACROSTR(INDEX_PLL_ON_OFF_3_5G_L),
83
+    MACROSTR(INDEX_T_SYNC_DL        ),
84
+    MACROSTR(INDEX__T_SYNC_DL       ),
85
+    MACROSTR(INDEX_T_SYNC_UL        ),
86
+    MACROSTR(INDEX__T_SYNC_UL       ),   
87
+};
88
+
89
+static void kConstPrinter(Bluecell_Prot_Index k)
90
+{
91
+#ifdef DEBUG_PRINT
92
+    printf("%s", Bluecell_Prot_IndexStr[k]);
93
+#endif /* DEBUG_PRINT */
94
+}
95
+void Path_Init(void){
96
+    Prev_data[INDEX_PATH_EN_1_8G_DL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin);
97
+    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
98
+    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
99
+    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
100
+    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
101
+    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
102
+    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
103
+    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
104
+    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
105
+    Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin);
106
+}
107
+void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
108
+//    printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd);
109
+    switch(type){
110
+        case INDEX_PATH_EN_1_8G_DL  : 
111
+#if 0 // PYJ.2019.07.29_BEGIN -- 
112
+            printf("\r\n LINE %d\r\n",__LINE__);
113
+#endif // PYJ.2019.07.29_END -- 
114
+            if(cmd)
115
+                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET);
116
+            else
117
+                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
118
+            break; 
119
+        case INDEX_PATH_EN_1_8G_UL  : 
120
+#if 0 // PYJ.2019.07.29_BEGIN -- 
121
+            printf("\r\n LINE %d\r\n",__LINE__);
122
+#endif // PYJ.2019.07.29_END -- 
123
+            if(cmd)
124
+                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET);
125
+            else
126
+                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
127
+                
128
+            break;
129
+        case INDEX_PATH_EN_2_1G_DL  : 
130
+#ifdef DEBUG_PRINT
131
+            printf("\r\n LINE %d\r\n",__LINE__);
132
+#endif /* DEBUG_PRINT */
133
+            if(cmd)
134
+                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET);
135
+            else
136
+                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);                
137
+            break;
138
+        case INDEX_PATH_EN_2_1G_UL  : 
139
+#ifdef DEBUG_PRINT
140
+            printf("\r\n LINE %d\r\n",__LINE__);
141
+#endif /* DEBUG_PRINT */
142
+            if(cmd)
143
+                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET);
144
+            else
145
+                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
146
+            break;
147
+        case INDEX_PATH_EN_3_5G_L   : 
148
+            if(cmd){
149
+                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);
150
+//                printf("\r\n LINE %d\r\n",__LINE__);
151
+            }
152
+            else{
153
+                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
154
+//                printf("\r\n LINE %d\r\n",__LINE__);
155
+            }
156
+            break;
157
+        case INDEX_PATH_EN_3_5G_H   : 
158
+            if(cmd){
159
+                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET);
160
+//                            printf("\r\n LINE %d\r\n",__LINE__);
161
+            }
162
+            else{
163
+                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
164
+//                            printf("\r\n LINE %d\r\n",__LINE__);
165
+            }
166
+            break;
167
+        case INDEX_PATH_EN_3_5G_DL  : 
168
+#ifdef DEBUG_PRINT
169
+            printf("\r\n LINE %d\r\n",__LINE__);
170
+#endif /* DEBUG_PRINT */
171
+            if(cmd)
172
+                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET);
173
+            else
174
+                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
175
+            break;
176
+        case INDEX_PATH_EN_3_5G_UL  : 
177
+#ifdef DEBUG_PRINT
178
+            printf("\r\n LINE %d\r\n",__LINE__);
179
+#endif /* DEBUG_PRINT */
180
+            if(cmd)
181
+                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
182
+            else
183
+                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
184
+            break;
185
+        case INDEX_PLL_ON_OFF_3_5G_H: 
186
+//            printf("\r\n LINE %d\r\n",__LINE__);
187
+            if(cmd)
188
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
189
+            else
190
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
191
+            break;
192
+        case INDEX_PLL_ON_OFF_3_5G_L: 
193
+//            printf("\r\n LINE %d\r\n",__LINE__);
194
+            if(cmd)
195
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
196
+            else
197
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
198
+            break;
199
+        case INDEX_T_SYNC_DL:
200
+        case INDEX__T_SYNC_UL:
201
+        case INDEX_T_SYNC_UL:
202
+        case INDEX__T_SYNC_DL:
203
+            if(cmd){
204
+                HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
205
+                HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
206
+                HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
207
+                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);                
208
+            }
209
+            else{
210
+                HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_SET);
211
+                HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_SET);
212
+                HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_RESET);
213
+                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET);                
214
+            }
215
+#ifdef DEBUG_PRINT
216
+            printf("TDD SYNC OPERATE ; %d\r\n",cmd);
217
+#endif /* DEBUG_PRINT */
218
+            break;
219
+        default :
220
+#ifdef DEBUG_PRINT
221
+        printf("Function : %s LINE : %d   ERROR \r\n",__func__,__LINE__);
222
+#endif /* DEBUG_PRINT */
223
+    break;
224
+
225
+    }
226
+}
227
+void ATTEN_PLL_PATH_Initialize(void){
228
+#if 0 // PYJ.2019.07.31_BEGIN -- 
229
+        for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){
230
+            printf("Data = %x\r\n",  Flash_Save_data[i]);
231
+        }
232
+#endif // PYJ.2019.07.31_END -- 
233
+    Flash_Save_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Flash_Save_data[Type], Flash_Save_data[Length]);
234
+    RF_Ctrl_Main(&Flash_Save_data[INDEX_BLUE_HEADER]);
235
+    RF_Status_Get();
236
+}
237
+void Power_ON_OFF_Initialize(void){
238
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
239
+    HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
240
+    HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
241
+    HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
242
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);  
243
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
244
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);  
245
+    HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);
246
+    HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
247
+    HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
248
+    HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
249
+}

+ 31 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/includes(6579).h

@@ -0,0 +1,31 @@
1
+/*
2
+ * includes.h
3
+ *
4
+ *  Created on: 2019. 7. 28.
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef INCLUDES_H_
9
+#define INCLUDES_H_
10
+#include "main.h"
11
+#if 0 // PYJ.2019.07.28_BEGIN -- 
12
+typedef enum{
13
+    TYPE_PATH_EN_1_8G_DL  = 0 , 
14
+    TYPE_PATH_EN_1_8G_UL  ,
15
+    TYPE_PATH_EN_2_1G_DL  ,
16
+    TYPE_PATH_EN_2_1G_UL  ,
17
+    TYPE_PATH_EN_3_5G_L   ,
18
+    TYPE_PATH_EN_3_5G_H   ,
19
+    TYPE_PATH_EN_3_5G_DL  ,
20
+    TYPE_PATH_EN_3_5G_UL  ,
21
+    TYPE_PLL_ON_OFF_3_5G_L,
22
+    TYPE_PLL_ON_OFF_3_5G_H,
23
+}Bluecell_Power_Index;
24
+#endif // PYJ.2019.07.28_END -- 
25
+void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
26
+void Path_Init(void);
27
+void ATTEN_PLL_PATH_Initialize(void);
28
+
29
+
30
+
31
+#endif /* INCLUDES_H_ */

+ 751 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(6049).c

@@ -0,0 +1,751 @@
1
+/* USER CODE BEGIN Header */
2
+/**
3
+  ******************************************************************************
4
+  * @file           : main.c
5
+  * @brief          : Main program body
6
+  ******************************************************************************
7
+  * @attention
8
+  *
9
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10
+  * All rights reserved.</center></h2>
11
+  *
12
+  * This software component is licensed by ST under BSD 3-Clause license,
13
+  * the "License"; You may not use this file except in compliance with the
14
+  * License. You may obtain a copy of the License at:
15
+  *                        opensource.org/licenses/BSD-3-Clause
16
+  *
17
+  ******************************************************************************
18
+  */
19
+/* USER CODE END Header */
20
+
21
+/* Includes ------------------------------------------------------------------*/
22
+#include "main.h"
23
+
24
+/* Private includes ----------------------------------------------------------*/
25
+/* USER CODE BEGIN Includes */
26
+
27
+/* USER CODE END Includes */
28
+
29
+/* Private typedef -----------------------------------------------------------*/
30
+/* USER CODE BEGIN PTD */
31
+
32
+/* USER CODE END PTD */
33
+
34
+/* Private define ------------------------------------------------------------*/
35
+/* USER CODE BEGIN PD */
36
+
37
+/* USER CODE END PD */
38
+
39
+/* Private macro -------------------------------------------------------------*/
40
+/* USER CODE BEGIN PM */
41
+
42
+/* USER CODE END PM */
43
+
44
+/* Private variables ---------------------------------------------------------*/
45
+ADC_HandleTypeDef hadc1;
46
+DMA_HandleTypeDef hdma_adc1;
47
+
48
+TIM_HandleTypeDef htim6;
49
+
50
+UART_HandleTypeDef huart1;
51
+DMA_HandleTypeDef hdma_usart1_rx;
52
+DMA_HandleTypeDef hdma_usart1_tx;
53
+
54
+/* USER CODE BEGIN PV */
55
+volatile uint32_t AdcTimerCnt = 0;
56
+volatile uint32_t LedTimerCnt = 0;
57
+volatile uint32_t UartRxTimerCnt = 0;
58
+extern PLL_Setting_st Pll_3_5_H;
59
+extern PLL_Setting_st Pll_3_5_L;
60
+
61
+//volatile uint32_t UartTxTimerCnt = 0;
62
+
63
+/* USER CODE END PV */
64
+
65
+/* Private function prototypes -----------------------------------------------*/
66
+void SystemClock_Config(void);
67
+static void MX_GPIO_Init(void);
68
+static void MX_DMA_Init(void);
69
+static void MX_ADC1_Init(void);
70
+static void MX_USART1_UART_Init(void);
71
+static void MX_TIM6_Init(void);
72
+static void MX_NVIC_Init(void);
73
+/* USER CODE BEGIN PFP */
74
+
75
+/* USER CODE END PFP */
76
+
77
+/* Private user code ---------------------------------------------------------*/
78
+/* USER CODE BEGIN 0 */
79
+
80
+uint32_t ADCvalue[ADC_EA];
81
+
82
+#if 1 // PYJ.2019.07.26_BEGIN --
83
+
84
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
85
+{
86
+    if(htim->Instance == TIM6){
87
+        UartRxTimerCnt++;
88
+        LedTimerCnt++;
89
+        AdcTimerCnt++;
90
+    }
91
+} 
92
+#endif // PYJ.2019.07.26_END -- 
93
+int _write (int file, uint8_t *ptr, uint16_t len)
94
+{
95
+    HAL_UART_Transmit(&huart1, ptr, len,10);
96
+//    HAL_UART_Transmit_IT(&huart1, ptr, len);
97
+    return len;
98
+}
99
+void Pol_Delay_us(volatile uint32_t microseconds)
100
+{
101
+  /* Go to number of cycles for system */
102
+  microseconds *= (SystemCoreClock / 1000000);
103
+ 
104
+  /* Delay till end */
105
+  while (microseconds--);
106
+}
107
+/* define address bits for addressing dac outputs. */
108
+#define SPI_DAC_ADDR0  (1 << 12)
109
+#define SPI_DAC_ADDR1  (1 << 13)
110
+#define SPI_DAC_ADDR2  (1 << 14)
111
+
112
+/* define addresses for each dac output. */
113
+#define SPI_DAC_OUTPUT_A   0x00
114
+#define SPI_DAC_OUTPUT_B   SPI_DAC_ADDR0
115
+#define SPI_DAC_OUTPUT_C   SPI_DAC_ADDR1
116
+#define SPI_DAC_OUTPUT_D  (SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
117
+#define SPI_DAC_OUTPUT_E   SPI_DAC_ADDR2
118
+#define SPI_DAC_OUTPUT_F  (SPI_DAC_ADDR2 | SPI_DAC_ADDR0)
119
+#define SPI_DAC_OUTPUT_G  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1)
120
+#define SPI_DAC_OUTPUT_H  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
121
+
122
+
123
+/* USER CODE END 0 */
124
+
125
+/**
126
+  * @brief  The application entry point.
127
+  * @retval int
128
+  */
129
+int main(void)
130
+{
131
+  /* USER CODE BEGIN 1 */
132
+
133
+  /* USER CODE END 1 */
134
+  
135
+
136
+  /* MCU Configuration--------------------------------------------------------*/
137
+
138
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
139
+  HAL_Init();
140
+
141
+  /* USER CODE BEGIN Init */
142
+
143
+  /* USER CODE END Init */
144
+
145
+  /* Configure the system clock */
146
+  SystemClock_Config();
147
+
148
+  /* USER CODE BEGIN SysInit */
149
+
150
+  /* USER CODE END SysInit */
151
+
152
+  /* Initialize all configured peripherals */
153
+  MX_GPIO_Init();
154
+  MX_DMA_Init();
155
+  MX_ADC1_Init();
156
+  MX_USART1_UART_Init();
157
+  MX_TIM6_Init();
158
+
159
+  /* Initialize interrupts */
160
+  MX_NVIC_Init();
161
+  /* USER CODE BEGIN 2 */
162
+  setbuf(stdout, NULL);
163
+#ifdef DEBUG_PRINT
164
+  printf("UART Start \r\n");
165
+#endif /* DEBUG_PRINT */
166
+    HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1);
167
+    PE43711_PinInit();
168
+    /* * * PATH PLL ON OFF SECTION* * */
169
+    HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
170
+    HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
171
+    HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);
172
+    HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
173
+    HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
174
+    HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
175
+    HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
176
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
177
+
178
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
179
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
180
+    
181
+    HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
182
+    HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
183
+    HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
184
+    HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);     
185
+    
186
+    HAL_Delay(1);
187
+    Path_Init();
188
+    
189
+    ADF4153_Init();
190
+    SubmitDAC(0x800C);
191
+    SubmitDAC(0xA000);
192
+//    HAL_Delay(1);
193
+#if 1
194
+// PYJ.2019.07.30_BEGIN -- 
195
+    SubmitDAC(0x0FFF);
196
+    SubmitDAC(0x13FF);
197
+    SubmitDAC(0x24FF);
198
+    SubmitDAC(0x35FF);
199
+    SubmitDAC(0x46FF);
200
+    SubmitDAC(0x57FF);
201
+    SubmitDAC(0x68FF);
202
+    SubmitDAC(0x79FF);
203
+#endif // PYJ.2019.07.30_END -- 
204
+        
205
+//    ad53_write(0x2BFF);
206
+
207
+#ifdef DEBUG_PRINT
208
+  printf("\r\nPLL_EN_3_5G_L_GPIO_Port\r\n");
209
+#endif /* DEBUG_PRINT */
210
+  
211
+#ifdef DEBUG_PRINT
212
+  printf("\r\nPLL_EN_2_1G_UL_GPIO_Port\r\n");
213
+#endif /* DEBUG_PRINT */
214
+  HAL_Delay(1);
215
+  ADF4113_Initialize();
216
+//  BDA4601_Test();
217
+
218
+  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
219
+//    HAL_ADCEx_Calibration_Start(&hadc1);
220
+    ADF4153_R_N_Reg_st temp_reg;
221
+    Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
222
+    ATTEN_PLL_PATH_Initialize();
223
+
224
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
225
+
226
+  /* USER CODE END 2 */
227
+
228
+  /* Infinite loop */
229
+  /* USER CODE BEGIN WHILE */
230
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
231
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
232
+  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);  
233
+  while (1)
234
+  {
235
+    if(HAL_GPIO_ReadPin(PLL_LD_3_5G_H_GPIO_Port, PLL_LD_3_5G_H_Pin) == GPIO_PIN_RESET 
236
+        && HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port, PLL_ON_OFF_3_5G_H_Pin) == GPIO_PIN_SET){
237
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
238
+        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
239
+        HAL_Delay(1);
240
+    }
241
+    if(HAL_GPIO_ReadPin(PLL_LD_3_5G_L_GPIO_Port, PLL_LD_3_5G_L_Pin) == GPIO_PIN_RESET
242
+        || HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port, PLL_ON_OFF_3_5G_L_Pin) == GPIO_PIN_SET){
243
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
244
+        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
245
+        HAL_Delay(1);
246
+    }
247
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
248
+    while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
249
+    if(AdcTimerCnt > 2500){
250
+        for(uint8_t i = 0; i< ADC_EA; i += 2 ){
251
+            Prev_data[INDEX_DET_1_8G_DL_IN_H + i]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
252
+            Prev_data[INDEX_DET_1_8G_DL_IN_L + i]     = (uint16_t)(ADCvalue[i] & 0x00FF);
253
+//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_H + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
254
+//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_L + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
255
+        }
256
+//        for(int i = 0; i < 14; i++)
257
+//            printf("\r\nYJ[%d] : %x \r\n",i,ADCvalue[i]);
258
+//        HAL_Delay(3000);
259
+#if 1 // PYJ.2019.07.29_BEGIN -- 
260
+//        printf("====================================\r\n");
261
+//            for(uint8_t i = 0; i< ADC_EA; i++){
262
+//                printf("%x",ADCvalue[0]);
263
+//                printf("\r\n");
264
+//                printf("%d",ADCvalue[i]);
265
+//                printf("\r\n");
266
+//            }
267
+//                printf("\r\nADC[%d] : %d\r\n ",i,ADCvalue[i]);
268
+//        printf("====================================\r\n");
269
+#endif // PYJ.2019.07.29_END -- 
270
+        AdcTimerCnt = 0;
271
+
272
+    }
273
+
274
+    /* USER CODE END WHILE */
275
+
276
+    /* USER CODE BEGIN 3 */
277
+  }
278
+  /* USER CODE END 3 */
279
+}
280
+
281
+/**
282
+  * @brief System Clock Configuration
283
+  * @retval None
284
+  */
285
+void SystemClock_Config(void)
286
+{
287
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
288
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
289
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
290
+
291
+  /** Initializes the CPU, AHB and APB busses clocks 
292
+  */
293
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
294
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
295
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
296
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
297
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
298
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
299
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
300
+  {
301
+    Error_Handler();
302
+  }
303
+  /** Initializes the CPU, AHB and APB busses clocks 
304
+  */
305
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
306
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
307
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
308
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
309
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
310
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
311
+
312
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
313
+  {
314
+    Error_Handler();
315
+  }
316
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
317
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
318
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
319
+  {
320
+    Error_Handler();
321
+  }
322
+}
323
+
324
+/**
325
+  * @brief NVIC Configuration.
326
+  * @retval None
327
+  */
328
+static void MX_NVIC_Init(void)
329
+{
330
+  /* USART1_IRQn interrupt configuration */
331
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
332
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
333
+  /* TIM6_IRQn interrupt configuration */
334
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
335
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
336
+  /* DMA1_Channel1_IRQn interrupt configuration */
337
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
338
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
339
+  /* DMA1_Channel4_IRQn interrupt configuration */
340
+  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
341
+  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
342
+  /* DMA1_Channel5_IRQn interrupt configuration */
343
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
344
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
345
+}
346
+
347
+/**
348
+  * @brief ADC1 Initialization Function
349
+  * @param None
350
+  * @retval None
351
+  */
352
+static void MX_ADC1_Init(void)
353
+{
354
+
355
+  /* USER CODE BEGIN ADC1_Init 0 */
356
+
357
+  /* USER CODE END ADC1_Init 0 */
358
+
359
+  ADC_ChannelConfTypeDef sConfig = {0};
360
+
361
+  /* USER CODE BEGIN ADC1_Init 1 */
362
+
363
+  /* USER CODE END ADC1_Init 1 */
364
+  /** Common config 
365
+  */
366
+  hadc1.Instance = ADC1;
367
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
368
+  hadc1.Init.ContinuousConvMode = ENABLE;
369
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
370
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
371
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
372
+  hadc1.Init.NbrOfConversion = 14;
373
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
374
+  {
375
+    Error_Handler();
376
+  }
377
+  /** Configure Regular Channel 
378
+  */
379
+  sConfig.Channel = ADC_CHANNEL_0;
380
+  sConfig.Rank = ADC_REGULAR_RANK_1;
381
+  sConfig.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
382
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
383
+  {
384
+    Error_Handler();
385
+  }
386
+  /** Configure Regular Channel 
387
+  */
388
+  sConfig.Channel = ADC_CHANNEL_1;
389
+  sConfig.Rank = ADC_REGULAR_RANK_2;
390
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
391
+  {
392
+    Error_Handler();
393
+  }
394
+  /** Configure Regular Channel 
395
+  */
396
+  sConfig.Channel = ADC_CHANNEL_2;
397
+  sConfig.Rank = ADC_REGULAR_RANK_3;
398
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
399
+  {
400
+    Error_Handler();
401
+  }
402
+  /** Configure Regular Channel 
403
+  */
404
+  sConfig.Channel = ADC_CHANNEL_3;
405
+  sConfig.Rank = ADC_REGULAR_RANK_4;
406
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
407
+  {
408
+    Error_Handler();
409
+  }
410
+  /** Configure Regular Channel 
411
+  */
412
+  sConfig.Channel = ADC_CHANNEL_4;
413
+  sConfig.Rank = ADC_REGULAR_RANK_5;
414
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
415
+  {
416
+    Error_Handler();
417
+  }
418
+  /** Configure Regular Channel 
419
+  */
420
+  sConfig.Channel = ADC_CHANNEL_5;
421
+  sConfig.Rank = ADC_REGULAR_RANK_6;
422
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
423
+  {
424
+    Error_Handler();
425
+  }
426
+  /** Configure Regular Channel 
427
+  */
428
+  sConfig.Channel = ADC_CHANNEL_6;
429
+  sConfig.Rank = ADC_REGULAR_RANK_7;
430
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
431
+  {
432
+    Error_Handler();
433
+  }
434
+  /** Configure Regular Channel 
435
+  */
436
+  sConfig.Channel = ADC_CHANNEL_7;
437
+  sConfig.Rank = ADC_REGULAR_RANK_8;
438
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
439
+  {
440
+    Error_Handler();
441
+  }
442
+  /** Configure Regular Channel 
443
+  */
444
+  sConfig.Channel = ADC_CHANNEL_8;
445
+  sConfig.Rank = ADC_REGULAR_RANK_9;
446
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
447
+  {
448
+    Error_Handler();
449
+  }
450
+  /** Configure Regular Channel 
451
+  */
452
+  sConfig.Channel = ADC_CHANNEL_9;
453
+  sConfig.Rank = ADC_REGULAR_RANK_10;
454
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
455
+  {
456
+    Error_Handler();
457
+  }
458
+  /** Configure Regular Channel 
459
+  */
460
+  sConfig.Channel = ADC_CHANNEL_10;
461
+  sConfig.Rank = ADC_REGULAR_RANK_11;
462
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
463
+  {
464
+    Error_Handler();
465
+  }
466
+  /** Configure Regular Channel 
467
+  */
468
+  sConfig.Channel = ADC_CHANNEL_11;
469
+  sConfig.Rank = ADC_REGULAR_RANK_12;
470
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
471
+  {
472
+    Error_Handler();
473
+  }
474
+  /** Configure Regular Channel 
475
+  */
476
+  sConfig.Channel = ADC_CHANNEL_12;
477
+  sConfig.Rank = ADC_REGULAR_RANK_13;
478
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
479
+  {
480
+    Error_Handler();
481
+  }
482
+  /** Configure Regular Channel 
483
+  */
484
+  sConfig.Channel = ADC_CHANNEL_13;
485
+  sConfig.Rank = ADC_REGULAR_RANK_14;
486
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
487
+  {
488
+    Error_Handler();
489
+  }
490
+  /* USER CODE BEGIN ADC1_Init 2 */
491
+
492
+  /* USER CODE END ADC1_Init 2 */
493
+
494
+}
495
+
496
+/**
497
+  * @brief TIM6 Initialization Function
498
+  * @param None
499
+  * @retval None
500
+  */
501
+static void MX_TIM6_Init(void)
502
+{
503
+
504
+  /* USER CODE BEGIN TIM6_Init 0 */
505
+
506
+  /* USER CODE END TIM6_Init 0 */
507
+
508
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
509
+
510
+  /* USER CODE BEGIN TIM6_Init 1 */
511
+
512
+  /* USER CODE END TIM6_Init 1 */
513
+  htim6.Instance = TIM6;
514
+  htim6.Init.Prescaler = 5600-1;
515
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
516
+  htim6.Init.Period = 10;
517
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
518
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
519
+  {
520
+    Error_Handler();
521
+  }
522
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
523
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
524
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
525
+  {
526
+    Error_Handler();
527
+  }
528
+  /* USER CODE BEGIN TIM6_Init 2 */
529
+
530
+  /* USER CODE END TIM6_Init 2 */
531
+
532
+}
533
+
534
+/**
535
+  * @brief USART1 Initialization Function
536
+  * @param None
537
+  * @retval None
538
+  */
539
+static void MX_USART1_UART_Init(void)
540
+{
541
+
542
+  /* USER CODE BEGIN USART1_Init 0 */
543
+
544
+  /* USER CODE END USART1_Init 0 */
545
+
546
+  /* USER CODE BEGIN USART1_Init 1 */
547
+
548
+  /* USER CODE END USART1_Init 1 */
549
+  huart1.Instance = USART1;
550
+  huart1.Init.BaudRate = 115200;
551
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
552
+  huart1.Init.StopBits = UART_STOPBITS_1;
553
+  huart1.Init.Parity = UART_PARITY_NONE;
554
+  huart1.Init.Mode = UART_MODE_TX_RX;
555
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
556
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
557
+  if (HAL_UART_Init(&huart1) != HAL_OK)
558
+  {
559
+    Error_Handler();
560
+  }
561
+  /* USER CODE BEGIN USART1_Init 2 */
562
+
563
+  /* USER CODE END USART1_Init 2 */
564
+
565
+}
566
+
567
+/** 
568
+  * Enable DMA controller clock
569
+  */
570
+static void MX_DMA_Init(void) 
571
+{
572
+  /* DMA controller clock enable */
573
+  __HAL_RCC_DMA1_CLK_ENABLE();
574
+
575
+}
576
+
577
+/**
578
+  * @brief GPIO Initialization Function
579
+  * @param None
580
+  * @retval None
581
+  */
582
+static void MX_GPIO_Init(void)
583
+{
584
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
585
+
586
+  /* GPIO Ports Clock Enable */
587
+  __HAL_RCC_GPIOE_CLK_ENABLE();
588
+  __HAL_RCC_GPIOC_CLK_ENABLE();
589
+  __HAL_RCC_GPIOF_CLK_ENABLE();
590
+  __HAL_RCC_GPIOA_CLK_ENABLE();
591
+  __HAL_RCC_GPIOB_CLK_ENABLE();
592
+  __HAL_RCC_GPIOD_CLK_ENABLE();
593
+  __HAL_RCC_GPIOG_CLK_ENABLE();
594
+
595
+  /*Configure GPIO pin Output Level */
596
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
597
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
598
+
599
+  /*Configure GPIO pin Output Level */
600
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
601
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
602
+
603
+  /*Configure GPIO pin Output Level */
604
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
605
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
606
+
607
+  /*Configure GPIO pin Output Level */
608
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
609
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
610
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
611
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
612
+
613
+  /*Configure GPIO pin Output Level */
614
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
615
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
616
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
617
+                          |BOOT_LED_Pin, GPIO_PIN_RESET);
618
+
619
+  /*Configure GPIO pin Output Level */
620
+  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
621
+
622
+  /*Configure GPIO pin Output Level */
623
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
624
+
625
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
626
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
627
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
628
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
629
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
630
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
631
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
632
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
633
+
634
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
635
+                           PLL_EN_3_5G_H_Pin PLL_ON_OFF_3_5G_L_Pin PLL_DATA_3_5G_Pin PLL_ON_OFF_3_5G_H_Pin */
636
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
637
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin;
638
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
639
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
640
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
641
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
642
+
643
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
644
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
645
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
646
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
647
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
648
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
649
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
650
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
651
+
652
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
653
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
654
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
655
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
656
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
657
+
658
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
659
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
660
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
661
+                           PATH_EN_3_5G_L_Pin */
662
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
663
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
664
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
665
+                          |PATH_EN_3_5G_L_Pin;
666
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
667
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
668
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
669
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
670
+
671
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
672
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
673
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
674
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
675
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
676
+
677
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
678
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
679
+                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin 
680
+                           BOOT_LED_Pin */
681
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
682
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
683
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
684
+                          |BOOT_LED_Pin;
685
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
686
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
687
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
688
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
689
+
690
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
691
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
692
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
693
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
694
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
695
+
696
+  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
697
+  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
698
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
699
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
700
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
701
+  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
702
+
703
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
704
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
705
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
706
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
707
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
708
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
709
+
710
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
711
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
712
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
713
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
714
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
715
+
716
+}
717
+
718
+/* USER CODE BEGIN 4 */
719
+
720
+/* USER CODE END 4 */
721
+
722
+/**
723
+  * @brief  This function is executed in case of error occurrence.
724
+  * @retval None
725
+  */
726
+void Error_Handler(void)
727
+{
728
+  /* USER CODE BEGIN Error_Handler_Debug */
729
+  /* User can add his own implementation to report the HAL error return state */
730
+
731
+  /* USER CODE END Error_Handler_Debug */
732
+}
733
+
734
+#ifdef  USE_FULL_ASSERT
735
+/**
736
+  * @brief  Reports the name of the source file and the source line number
737
+  *         where the assert_param error has occurred.
738
+  * @param  file: pointer to the source file name
739
+  * @param  line: assert_param error line source number
740
+  * @retval None
741
+  */
742
+void assert_failed(uint8_t *file, uint32_t line)
743
+{ 
744
+  /* USER CODE BEGIN 6 */
745
+  /* User can add his own implementation to report the file name and line number,
746
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
747
+  /* USER CODE END 6 */
748
+}
749
+#endif /* USE_FULL_ASSERT */
750
+
751
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 753 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(7098).c

@@ -0,0 +1,753 @@
1
+/* USER CODE BEGIN Header */
2
+/**
3
+  ******************************************************************************
4
+  * @file           : main.c
5
+  * @brief          : Main program body
6
+  ******************************************************************************
7
+  * @attention
8
+  *
9
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10
+  * All rights reserved.</center></h2>
11
+  *
12
+  * This software component is licensed by ST under BSD 3-Clause license,
13
+  * the "License"; You may not use this file except in compliance with the
14
+  * License. You may obtain a copy of the License at:
15
+  *                        opensource.org/licenses/BSD-3-Clause
16
+  *
17
+  ******************************************************************************
18
+  */
19
+/* USER CODE END Header */
20
+
21
+/* Includes ------------------------------------------------------------------*/
22
+#include "main.h"
23
+
24
+/* Private includes ----------------------------------------------------------*/
25
+/* USER CODE BEGIN Includes */
26
+
27
+/* USER CODE END Includes */
28
+
29
+/* Private typedef -----------------------------------------------------------*/
30
+/* USER CODE BEGIN PTD */
31
+
32
+/* USER CODE END PTD */
33
+
34
+/* Private define ------------------------------------------------------------*/
35
+/* USER CODE BEGIN PD */
36
+
37
+/* USER CODE END PD */
38
+
39
+/* Private macro -------------------------------------------------------------*/
40
+/* USER CODE BEGIN PM */
41
+
42
+/* USER CODE END PM */
43
+
44
+/* Private variables ---------------------------------------------------------*/
45
+ADC_HandleTypeDef hadc1;
46
+DMA_HandleTypeDef hdma_adc1;
47
+
48
+TIM_HandleTypeDef htim6;
49
+
50
+UART_HandleTypeDef huart1;
51
+DMA_HandleTypeDef hdma_usart1_rx;
52
+DMA_HandleTypeDef hdma_usart1_tx;
53
+
54
+/* USER CODE BEGIN PV */
55
+volatile uint32_t AdcTimerCnt = 0;
56
+volatile uint32_t LedTimerCnt = 0;
57
+volatile uint32_t UartRxTimerCnt = 0;
58
+extern PLL_Setting_st Pll_3_5_H;
59
+extern PLL_Setting_st Pll_3_5_L;
60
+
61
+//volatile uint32_t UartTxTimerCnt = 0;
62
+
63
+/* USER CODE END PV */
64
+
65
+/* Private function prototypes -----------------------------------------------*/
66
+void SystemClock_Config(void);
67
+static void MX_GPIO_Init(void);
68
+static void MX_DMA_Init(void);
69
+static void MX_ADC1_Init(void);
70
+static void MX_USART1_UART_Init(void);
71
+static void MX_TIM6_Init(void);
72
+static void MX_NVIC_Init(void);
73
+/* USER CODE BEGIN PFP */
74
+
75
+/* USER CODE END PFP */
76
+
77
+/* Private user code ---------------------------------------------------------*/
78
+/* USER CODE BEGIN 0 */
79
+
80
+uint32_t ADCvalue[ADC_EA];
81
+
82
+#if 1 // PYJ.2019.07.26_BEGIN --
83
+
84
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
85
+{
86
+    if(htim->Instance == TIM6){
87
+        UartRxTimerCnt++;
88
+        LedTimerCnt++;
89
+        AdcTimerCnt++;
90
+    }
91
+} 
92
+#endif // PYJ.2019.07.26_END -- 
93
+int _write (int file, uint8_t *ptr, uint16_t len)
94
+{
95
+    HAL_UART_Transmit(&huart1, ptr, len,10);
96
+//    HAL_UART_Transmit_IT(&huart1, ptr, len);
97
+    return len;
98
+}
99
+void Pol_Delay_us(volatile uint32_t microseconds)
100
+{
101
+  /* Go to number of cycles for system */
102
+  microseconds *= (SystemCoreClock / 1000000);
103
+ 
104
+  /* Delay till end */
105
+  while (microseconds--);
106
+}
107
+/* define address bits for addressing dac outputs. */
108
+#define SPI_DAC_ADDR0  (1 << 12)
109
+#define SPI_DAC_ADDR1  (1 << 13)
110
+#define SPI_DAC_ADDR2  (1 << 14)
111
+
112
+/* define addresses for each dac output. */
113
+#define SPI_DAC_OUTPUT_A   0x00
114
+#define SPI_DAC_OUTPUT_B   SPI_DAC_ADDR0
115
+#define SPI_DAC_OUTPUT_C   SPI_DAC_ADDR1
116
+#define SPI_DAC_OUTPUT_D  (SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
117
+#define SPI_DAC_OUTPUT_E   SPI_DAC_ADDR2
118
+#define SPI_DAC_OUTPUT_F  (SPI_DAC_ADDR2 | SPI_DAC_ADDR0)
119
+#define SPI_DAC_OUTPUT_G  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1)
120
+#define SPI_DAC_OUTPUT_H  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
121
+
122
+
123
+/* USER CODE END 0 */
124
+
125
+/**
126
+  * @brief  The application entry point.
127
+  * @retval int
128
+  */
129
+int main(void)
130
+{
131
+  /* USER CODE BEGIN 1 */
132
+
133
+  /* USER CODE END 1 */
134
+  
135
+
136
+  /* MCU Configuration--------------------------------------------------------*/
137
+
138
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
139
+  HAL_Init();
140
+
141
+  /* USER CODE BEGIN Init */
142
+
143
+  /* USER CODE END Init */
144
+
145
+  /* Configure the system clock */
146
+  SystemClock_Config();
147
+
148
+  /* USER CODE BEGIN SysInit */
149
+
150
+  /* USER CODE END SysInit */
151
+
152
+  /* Initialize all configured peripherals */
153
+  MX_GPIO_Init();
154
+  MX_DMA_Init();
155
+  MX_ADC1_Init();
156
+  MX_USART1_UART_Init();
157
+  MX_TIM6_Init();
158
+
159
+  /* Initialize interrupts */
160
+  MX_NVIC_Init();
161
+  /* USER CODE BEGIN 2 */
162
+  setbuf(stdout, NULL);
163
+#ifdef DEBUG_PRINT
164
+  printf("UART Start \r\n");
165
+#endif /* DEBUG_PRINT */
166
+    HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1);
167
+    PE43711_PinInit();
168
+    /* * * PATH PLL ON OFF SECTION* * */
169
+    HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
170
+    HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
171
+    HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);
172
+    HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
173
+    HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
174
+    HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
175
+    HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
176
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
177
+
178
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
179
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
180
+    
181
+    HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
182
+    HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
183
+    HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
184
+    HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);     
185
+    
186
+    HAL_Delay(1);
187
+    Path_Init();
188
+    
189
+    ADF4153_Init();
190
+    SubmitDAC(0x800C);
191
+    SubmitDAC(0xA000);
192
+//    HAL_Delay(1);
193
+#if 1
194
+// PYJ.2019.07.30_BEGIN -- 
195
+    SubmitDAC(0x0FFF);
196
+    SubmitDAC(0x13FF);
197
+    SubmitDAC(0x24FF);
198
+    SubmitDAC(0x35FF);
199
+    SubmitDAC(0x46FF);
200
+    SubmitDAC(0x57FF);
201
+    SubmitDAC(0x68FF);
202
+    SubmitDAC(0x79FF);
203
+#endif // PYJ.2019.07.30_END -- 
204
+        
205
+//    ad53_write(0x2BFF);
206
+
207
+#ifdef DEBUG_PRINT
208
+  printf("\r\nPLL_EN_3_5G_L_GPIO_Port\r\n");
209
+#endif /* DEBUG_PRINT */
210
+  
211
+#ifdef DEBUG_PRINT
212
+  printf("\r\nPLL_EN_2_1G_UL_GPIO_Port\r\n");
213
+#endif /* DEBUG_PRINT */
214
+  HAL_Delay(1);
215
+  ADF4113_Initialize();
216
+//  BDA4601_Test();
217
+
218
+  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
219
+//    HAL_ADCEx_Calibration_Start(&hadc1);
220
+    ADF4153_R_N_Reg_st temp_reg;
221
+    Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
222
+    ATTEN_PLL_PATH_Initialize();
223
+
224
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
225
+    HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
226
+
227
+  /* USER CODE END 2 */
228
+
229
+  /* Infinite loop */
230
+  /* USER CODE BEGIN WHILE */
231
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
232
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
233
+ 
234
+  while (1)
235
+  {
236
+    if(HAL_GPIO_ReadPin(PLL_LD_3_5G_H_GPIO_Port, PLL_LD_3_5G_H_Pin) == GPIO_PIN_RESET 
237
+        && HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port, PLL_ON_OFF_3_5G_H_Pin) == GPIO_PIN_SET){
238
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
239
+        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
240
+        HAL_Delay(1);
241
+    }
242
+    if(HAL_GPIO_ReadPin(PLL_LD_3_5G_L_GPIO_Port, PLL_LD_3_5G_L_Pin) == GPIO_PIN_RESET
243
+        || HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port, PLL_ON_OFF_3_5G_L_Pin) == GPIO_PIN_SET){
244
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
245
+        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
246
+        HAL_Delay(1);
247
+    }
248
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
249
+    while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
250
+    if(AdcTimerCnt > 2500){
251
+        
252
+        for(uint8_t i = 0; i< ADC_EA; i += 2 ){
253
+            Prev_data[INDEX_DET_1_8G_DL_IN_H + i]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
254
+            Prev_data[INDEX_DET_1_8G_DL_IN_L + i]     = (uint16_t)(ADCvalue[i] & 0x00FF);
255
+//            printf("Prev_data[%d] : %x",i,Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
256
+//            printf("%x\r\n",i,Prev_data[INDEX_DET_1_8G_DL_IN_L + i]);            
257
+        }
258
+//        for(int i = 0; i < 14; i++)
259
+//            printf("\r\nYJ[%d] : %x \r\n",i,ADCvalue[i]);
260
+//        HAL_Delay(3000);
261
+#if 1 // PYJ.2019.07.29_BEGIN -- 
262
+        printf("====================================\r\n");
263
+//            for(uint8_t i = 0; i< ADC_EA; i++){
264
+                printf("%x",ADCvalue[4]);
265
+                printf("\r\n");
266
+                printf("%d",ADCvalue[4]);
267
+                printf("\r\n");
268
+//            }
269
+//                printf("\r\nADC[%d] : %d\r\n ",i,ADCvalue[i]);
270
+        printf("====================================\r\n");
271
+#endif // PYJ.2019.07.29_END -- 
272
+        AdcTimerCnt = 0;
273
+
274
+    }
275
+
276
+    /* USER CODE END WHILE */
277
+
278
+    /* USER CODE BEGIN 3 */
279
+  }
280
+  /* USER CODE END 3 */
281
+}
282
+
283
+/**
284
+  * @brief System Clock Configuration
285
+  * @retval None
286
+  */
287
+void SystemClock_Config(void)
288
+{
289
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
290
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
291
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
292
+
293
+  /** Initializes the CPU, AHB and APB busses clocks 
294
+  */
295
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
296
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
297
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
298
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
299
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
300
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
301
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
302
+  {
303
+    Error_Handler();
304
+  }
305
+  /** Initializes the CPU, AHB and APB busses clocks 
306
+  */
307
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
308
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
309
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
310
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
311
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
312
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
313
+
314
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
315
+  {
316
+    Error_Handler();
317
+  }
318
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
319
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
320
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
321
+  {
322
+    Error_Handler();
323
+  }
324
+}
325
+
326
+/**
327
+  * @brief NVIC Configuration.
328
+  * @retval None
329
+  */
330
+static void MX_NVIC_Init(void)
331
+{
332
+  /* USART1_IRQn interrupt configuration */
333
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
334
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
335
+  /* TIM6_IRQn interrupt configuration */
336
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
337
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
338
+  /* DMA1_Channel1_IRQn interrupt configuration */
339
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
340
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
341
+  /* DMA1_Channel4_IRQn interrupt configuration */
342
+  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
343
+  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
344
+  /* DMA1_Channel5_IRQn interrupt configuration */
345
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
346
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
347
+}
348
+
349
+/**
350
+  * @brief ADC1 Initialization Function
351
+  * @param None
352
+  * @retval None
353
+  */
354
+static void MX_ADC1_Init(void)
355
+{
356
+
357
+  /* USER CODE BEGIN ADC1_Init 0 */
358
+
359
+  /* USER CODE END ADC1_Init 0 */
360
+
361
+  ADC_ChannelConfTypeDef sConfig = {0};
362
+
363
+  /* USER CODE BEGIN ADC1_Init 1 */
364
+
365
+  /* USER CODE END ADC1_Init 1 */
366
+  /** Common config 
367
+  */
368
+  hadc1.Instance = ADC1;
369
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
370
+  hadc1.Init.ContinuousConvMode = ENABLE;
371
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
372
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
373
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
374
+  hadc1.Init.NbrOfConversion = 14;
375
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
376
+  {
377
+    Error_Handler();
378
+  }
379
+  /** Configure Regular Channel 
380
+  */
381
+  sConfig.Channel = ADC_CHANNEL_0;
382
+  sConfig.Rank = ADC_REGULAR_RANK_1;
383
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
384
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
385
+  {
386
+    Error_Handler();
387
+  }
388
+  /** Configure Regular Channel 
389
+  */
390
+  sConfig.Channel = ADC_CHANNEL_1;
391
+  sConfig.Rank = ADC_REGULAR_RANK_2;
392
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
393
+  {
394
+    Error_Handler();
395
+  }
396
+  /** Configure Regular Channel 
397
+  */
398
+  sConfig.Channel = ADC_CHANNEL_2;
399
+  sConfig.Rank = ADC_REGULAR_RANK_3;
400
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
401
+  {
402
+    Error_Handler();
403
+  }
404
+  /** Configure Regular Channel 
405
+  */
406
+  sConfig.Channel = ADC_CHANNEL_3;
407
+  sConfig.Rank = ADC_REGULAR_RANK_4;
408
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
409
+  {
410
+    Error_Handler();
411
+  }
412
+  /** Configure Regular Channel 
413
+  */
414
+  sConfig.Channel = ADC_CHANNEL_4;
415
+  sConfig.Rank = ADC_REGULAR_RANK_5;
416
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
417
+  {
418
+    Error_Handler();
419
+  }
420
+  /** Configure Regular Channel 
421
+  */
422
+  sConfig.Channel = ADC_CHANNEL_5;
423
+  sConfig.Rank = ADC_REGULAR_RANK_6;
424
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
425
+  {
426
+    Error_Handler();
427
+  }
428
+  /** Configure Regular Channel 
429
+  */
430
+  sConfig.Channel = ADC_CHANNEL_6;
431
+  sConfig.Rank = ADC_REGULAR_RANK_7;
432
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
433
+  {
434
+    Error_Handler();
435
+  }
436
+  /** Configure Regular Channel 
437
+  */
438
+  sConfig.Channel = ADC_CHANNEL_7;
439
+  sConfig.Rank = ADC_REGULAR_RANK_8;
440
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
441
+  {
442
+    Error_Handler();
443
+  }
444
+  /** Configure Regular Channel 
445
+  */
446
+  sConfig.Channel = ADC_CHANNEL_8;
447
+  sConfig.Rank = ADC_REGULAR_RANK_9;
448
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
449
+  {
450
+    Error_Handler();
451
+  }
452
+  /** Configure Regular Channel 
453
+  */
454
+  sConfig.Channel = ADC_CHANNEL_9;
455
+  sConfig.Rank = ADC_REGULAR_RANK_10;
456
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
457
+  {
458
+    Error_Handler();
459
+  }
460
+  /** Configure Regular Channel 
461
+  */
462
+  sConfig.Channel = ADC_CHANNEL_10;
463
+  sConfig.Rank = ADC_REGULAR_RANK_11;
464
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
465
+  {
466
+    Error_Handler();
467
+  }
468
+  /** Configure Regular Channel 
469
+  */
470
+  sConfig.Channel = ADC_CHANNEL_11;
471
+  sConfig.Rank = ADC_REGULAR_RANK_12;
472
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
473
+  {
474
+    Error_Handler();
475
+  }
476
+  /** Configure Regular Channel 
477
+  */
478
+  sConfig.Channel = ADC_CHANNEL_12;
479
+  sConfig.Rank = ADC_REGULAR_RANK_13;
480
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
481
+  {
482
+    Error_Handler();
483
+  }
484
+  /** Configure Regular Channel 
485
+  */
486
+  sConfig.Channel = ADC_CHANNEL_13;
487
+  sConfig.Rank = ADC_REGULAR_RANK_14;
488
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
489
+  {
490
+    Error_Handler();
491
+  }
492
+  /* USER CODE BEGIN ADC1_Init 2 */
493
+
494
+  /* USER CODE END ADC1_Init 2 */
495
+
496
+}
497
+
498
+/**
499
+  * @brief TIM6 Initialization Function
500
+  * @param None
501
+  * @retval None
502
+  */
503
+static void MX_TIM6_Init(void)
504
+{
505
+
506
+  /* USER CODE BEGIN TIM6_Init 0 */
507
+
508
+  /* USER CODE END TIM6_Init 0 */
509
+
510
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
511
+
512
+  /* USER CODE BEGIN TIM6_Init 1 */
513
+
514
+  /* USER CODE END TIM6_Init 1 */
515
+  htim6.Instance = TIM6;
516
+  htim6.Init.Prescaler = 5600-1;
517
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
518
+  htim6.Init.Period = 10;
519
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
520
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
521
+  {
522
+    Error_Handler();
523
+  }
524
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
525
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
526
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
527
+  {
528
+    Error_Handler();
529
+  }
530
+  /* USER CODE BEGIN TIM6_Init 2 */
531
+
532
+  /* USER CODE END TIM6_Init 2 */
533
+
534
+}
535
+
536
+/**
537
+  * @brief USART1 Initialization Function
538
+  * @param None
539
+  * @retval None
540
+  */
541
+static void MX_USART1_UART_Init(void)
542
+{
543
+
544
+  /* USER CODE BEGIN USART1_Init 0 */
545
+
546
+  /* USER CODE END USART1_Init 0 */
547
+
548
+  /* USER CODE BEGIN USART1_Init 1 */
549
+
550
+  /* USER CODE END USART1_Init 1 */
551
+  huart1.Instance = USART1;
552
+  huart1.Init.BaudRate = 115200;
553
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
554
+  huart1.Init.StopBits = UART_STOPBITS_1;
555
+  huart1.Init.Parity = UART_PARITY_NONE;
556
+  huart1.Init.Mode = UART_MODE_TX_RX;
557
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
558
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
559
+  if (HAL_UART_Init(&huart1) != HAL_OK)
560
+  {
561
+    Error_Handler();
562
+  }
563
+  /* USER CODE BEGIN USART1_Init 2 */
564
+
565
+  /* USER CODE END USART1_Init 2 */
566
+
567
+}
568
+
569
+/** 
570
+  * Enable DMA controller clock
571
+  */
572
+static void MX_DMA_Init(void) 
573
+{
574
+  /* DMA controller clock enable */
575
+  __HAL_RCC_DMA1_CLK_ENABLE();
576
+
577
+}
578
+
579
+/**
580
+  * @brief GPIO Initialization Function
581
+  * @param None
582
+  * @retval None
583
+  */
584
+static void MX_GPIO_Init(void)
585
+{
586
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
587
+
588
+  /* GPIO Ports Clock Enable */
589
+  __HAL_RCC_GPIOE_CLK_ENABLE();
590
+  __HAL_RCC_GPIOC_CLK_ENABLE();
591
+  __HAL_RCC_GPIOF_CLK_ENABLE();
592
+  __HAL_RCC_GPIOA_CLK_ENABLE();
593
+  __HAL_RCC_GPIOB_CLK_ENABLE();
594
+  __HAL_RCC_GPIOD_CLK_ENABLE();
595
+  __HAL_RCC_GPIOG_CLK_ENABLE();
596
+
597
+  /*Configure GPIO pin Output Level */
598
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
599
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
600
+
601
+  /*Configure GPIO pin Output Level */
602
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
603
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
604
+
605
+  /*Configure GPIO pin Output Level */
606
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
607
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
608
+
609
+  /*Configure GPIO pin Output Level */
610
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
611
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
612
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
613
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
614
+
615
+  /*Configure GPIO pin Output Level */
616
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
617
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
618
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
619
+                          |BOOT_LED_Pin, GPIO_PIN_RESET);
620
+
621
+  /*Configure GPIO pin Output Level */
622
+  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
623
+
624
+  /*Configure GPIO pin Output Level */
625
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
626
+
627
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
628
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
629
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
630
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
631
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
632
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
633
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
634
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
635
+
636
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
637
+                           PLL_EN_3_5G_H_Pin PLL_ON_OFF_3_5G_L_Pin PLL_DATA_3_5G_Pin PLL_ON_OFF_3_5G_H_Pin */
638
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
639
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin;
640
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
641
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
642
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
643
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
644
+
645
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
646
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
647
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
648
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
649
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
650
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
651
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
652
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
653
+
654
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
655
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
656
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
657
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
658
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
659
+
660
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
661
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
662
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
663
+                           PATH_EN_3_5G_L_Pin */
664
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
665
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
666
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
667
+                          |PATH_EN_3_5G_L_Pin;
668
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
669
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
670
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
671
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
672
+
673
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
674
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
675
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
676
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
677
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
678
+
679
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
680
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
681
+                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin 
682
+                           BOOT_LED_Pin */
683
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
684
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
685
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
686
+                          |BOOT_LED_Pin;
687
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
688
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
689
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
690
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
691
+
692
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
693
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
694
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
695
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
696
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
697
+
698
+  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
699
+  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
700
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
701
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
702
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
703
+  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
704
+
705
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
706
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
707
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
708
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
709
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
710
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
711
+
712
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
713
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
714
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
715
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
716
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
717
+
718
+}
719
+
720
+/* USER CODE BEGIN 4 */
721
+
722
+/* USER CODE END 4 */
723
+
724
+/**
725
+  * @brief  This function is executed in case of error occurrence.
726
+  * @retval None
727
+  */
728
+void Error_Handler(void)
729
+{
730
+  /* USER CODE BEGIN Error_Handler_Debug */
731
+  /* User can add his own implementation to report the HAL error return state */
732
+
733
+  /* USER CODE END Error_Handler_Debug */
734
+}
735
+
736
+#ifdef  USE_FULL_ASSERT
737
+/**
738
+  * @brief  Reports the name of the source file and the source line number
739
+  *         where the assert_param error has occurred.
740
+  * @param  file: pointer to the source file name
741
+  * @param  line: assert_param error line source number
742
+  * @retval None
743
+  */
744
+void assert_failed(uint8_t *file, uint32_t line)
745
+{ 
746
+  /* USER CODE BEGIN 6 */
747
+  /* User can add his own implementation to report the file name and line number,
748
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
749
+  /* USER CODE END 6 */
750
+}
751
+#endif /* USE_FULL_ASSERT */
752
+
753
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_includes.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_main.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_hal_conf.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_it.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_includes.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_main.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_hal_msp.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_it.c.sisc