printf 제거

Debug/Src/pll_4113.su

@@ -1,5 +1,5 @@
 pll_4113.c:75:6:ADF4113_Initialize	0	static
-pll_4113.c:196:10:N_Counter_Latch_Create	16	static
-pll_4113.c:164:10:halSynSetFreq	32	static
-pll_4113.c:243:6:ADF4113_Module_Ctrl	48	static
+pll_4113.c:194:10:N_Counter_Latch_Create	16	static
+pll_4113.c:164:10:halSynSetFreq	0	static
+pll_4113.c:238:6:ADF4113_Module_Ctrl	48	static
 pll_4113.c:102:6:ADF4113_Check	40	static

Src/pll_4113.c

@@ -187,10 +187,8 @@ uint32_t halSynSetFreq(uint32_t rf_Freq)
     P = 32;
     B = N_val / P;
     A = N_val -(B * P);
-#if 1 // PYJ.2019.08.10_BEGIN -- 
-    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
-    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
-#endif // PYJ.2019.08.10_END -- 
+//    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
+//    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
   return N_Counter_Latch_Create(A,B,0);
 }
 uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
@@ -199,11 +197,8 @@ uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _C
     uint8_t control_bit = 1;
     uint8_t i = 0;
     uint8_t reserve = 0;
-#ifdef DEBUG_PRINT
-    printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
-
-    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
-#endif /* DEBUG_PRINT */
+//    printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
+//    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
     for(i = 0; i < 2; i++){
         if(control_bit & 0x01)
             ret += shift_bit << i;

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/pll_4113(1084).c

@@ -0,0 +1,329 @@
+/**************************************************************************************************
+  Filename:       hal_adf4113.c
+  Revised:        $Date: 2013-11-17 $
+  Revision:       $Revision:  $
+  Description:   This file contains the interface to the ADF4113 frequency synthesizer.
+**************************************************************************************************/
+#include "pll_4113.h"
+void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2);
+
+uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN);
+
+#define ADF4113_PRESCALE8         0
+#define ADF4113_PRESCALE16        1
+#define ADF4113_PRESCALE32        2
+#define ADF4113_PRESCALE64        3
+// ADF4113 Prescale value for minimum required division ratio
+#define ADF4113_PRE8_MIN_N        56
+#define ADF4113_PRE16_MIN_N       240
+#define ADF4113_PRE32_MIN_N       992
+#define ADF4113_PRE64_MIN_N       4032
+// Frequency Settings
+// Initally, the synthesizer will operate at 2450 MHz
+#define ADF4113_CH_STEP          50000
+#define HAL_SYN_INVALID_PRESCALE  0x04
+#define ADF4113_REF_FREQ_MHZ    13000000
+
+uint8_t PLL_1_8_DL_Error_Cnt = 0;
+uint8_t PLL_1_8_UL_Error_Cnt = 0;
+uint8_t PLL_2_1_DL_Error_Cnt = 0;
+uint8_t PLL_2_1_UL_Error_Cnt = 0;
+
+
+PLL_Setting_st ADF4113_1_8G_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_DL_GPIO_Port,    
+    PLL_EN_1_8G_DL_Pin,
+};
+PLL_Setting_st ADF4113_1_8G_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_UL_GPIO_Port,    
+    PLL_EN_1_8G_UL_Pin,
+};
+PLL_Setting_st ADF4113_2_1G_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st ADF4113_2_1G_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+
+
+
+// Error Code
+typedef struct{
+    uint16_t B;
+    uint16_t P;
+    uint16_t A;   
+    uint16_t N;       
+}Adf4113_st;
+void ADF4113_Initialize(void){
+  if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
+    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47;
+    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
+    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
+    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
+    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF);    
+  }
+//    ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+}
+
+
+void ADF4113_Check(void){
+  uint16_t temp_val = 0;
+    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_DL_GPIO_Port, PLL_LD_1_8G_DL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_1_8G_DL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_DL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+            ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
+      if(PLL_1_8_DL_Error_Cnt == 3){
+        Error_Message_Occur(DL_1_8);
+      }
+      if(PLL_1_8_DL_Error_Cnt < 4)
+        PLL_1_8_DL_Error_Cnt++;    
+      HAL_Delay(1);
+    }else{
+      PLL_1_8_DL_Error_Cnt = 0;
+    }
+
+    
+    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_UL_GPIO_Port, PLL_LD_1_8G_UL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_1_8G_UL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_UL_L]);
+      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+    //      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+      if(PLL_1_8_UL_Error_Cnt == 3){
+        Error_Message_Occur(UL_1_8);
+      }
+      if(PLL_1_8_UL_Error_Cnt < 4)
+        PLL_1_8_UL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_1_8_UL_Error_Cnt = 0;
+    }
+    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_DL_GPIO_Port, PLL_LD_2_1G_DL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_2_1G_DL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_DL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+          ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+      if(PLL_2_1_DL_Error_Cnt == 3){
+        Error_Message_Occur(DL_2_1);
+      }
+      
+      if(PLL_2_1_DL_Error_Cnt < 4)
+        PLL_2_1_DL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_2_1_DL_Error_Cnt = 0;
+    }
+
+    
+    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_UL_GPIO_Port, PLL_LD_2_1G_UL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_2_1G_UL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_UL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+          ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+      if(PLL_2_1_UL_Error_Cnt == 3){
+        Error_Message_Occur(UL_2_1);
+      }
+      if(PLL_2_1_UL_Error_Cnt < 4)
+        PLL_2_1_UL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_2_1_UL_Error_Cnt = 0;
+    }
+}
+
+
+uint32_t halSynSetFreq(uint32_t rf_Freq)
+{
+    uint32_t  R, B;
+    uint32_t  A, P, p_mode;
+    uint32_t  N_val = 0;
+    N_val = (rf_Freq / ADF4113_CH_STEP);
+    if( N_val < ADF4113_PRE8_MIN_N) { 
+        return HAL_SYN_INVALID_PRESCALE; 
+    } else if(( N_val> ADF4113_PRE8_MIN_N) && (N_val < ADF4113_PRE16_MIN_N)) { 
+        P = 8;  
+        p_mode = ADF4113_PRESCALE8;
+    } else if(( N_val > ADF4113_PRE16_MIN_N) && (N_val < ADF4113_PRE32_MIN_N)) { 
+        P = 16;
+        p_mode = ADF4113_PRESCALE16;
+        
+    } else if((N_val > ADF4113_PRE32_MIN_N) && ( N_val < ADF4113_PRE64_MIN_N)) { 
+        P = 32;
+        p_mode = ADF4113_PRESCALE32;
+        
+    } else if( N_val > ADF4113_PRE64_MIN_N) { 
+        P = 64; 
+        p_mode = ADF4113_PRESCALE64;
+    }
+    P = 32;
+    B = N_val / P;
+    A = N_val -(B * P);
+#if 1 // PYJ.2019.08.10_BEGIN -- 
+    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
+    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
+#endif // PYJ.2019.08.10_END -- 
+  return N_Counter_Latch_Create(A,B,0);
+}
+uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
+    uint32_t ret = 0;
+    uint32_t shift_bit = 0x01;
+    uint8_t control_bit = 1;
+    uint8_t i = 0;
+    uint8_t reserve = 0;
+#ifdef DEBUG_PRINT
+    printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
+
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 0; i < 2; i++){
+        if(control_bit & 0x01)
+            ret += shift_bit << i;
+        control_bit = control_bit >> 1;
+    }
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 2; i < 8; i++){
+        if(_ACOUNTER & 0x01)
+            ret += shift_bit << i;
+        _ACOUNTER = _ACOUNTER >> 1;
+    }  
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 8; i < 21; i++){
+        if(_BCOUNTER & 0x01)
+            ret += shift_bit << i;
+        _BCOUNTER = _BCOUNTER >> 1;
+    }      
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    if(_CPGAIN & 0x01)
+            ret += shift_bit << i++;
+    for(i = 22; i < 24; i++){
+        if(reserve & 0x01)
+            ret += shift_bit << i;
+        reserve = reserve >> 1;
+    }   
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    return ret;
+}
+void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
+    R2 = R2 & 0xFFFFFF;
+    R1 = R1 & 0xFFFFFF;
+    R0 = R0 & 0xFFFFFF;
+    
+    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+    /*   R2 Ctrl    */
+     for(int i =0; i < 24; i++){
+         if(R2 & 0x800000){
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+         }
+         else{
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");
+#endif // PYJ.2019.08.11_END -- 
+             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+         }
+          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+         Pol_Delay_us(10);
+          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+         R2 = ((R2 << 1) & 0xFFFFFF);
+     }
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+     printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+     Pol_Delay_us(10);
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+        /*   R0 Ctrl    */
+   
+    for(int i =0; i < 24; i++){
+        if(R0 & 0x800000){
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+        }
+        else{
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");
+#endif // PYJ.2019.08.11_END -- 
+        }
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+        Pol_Delay_us(10);
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+        R0 = ((R0 << 1) & 0xFFFFFF);
+    }  
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+        printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+     
+     Pol_Delay_us(10);
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);    
+     /*   R1 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R1 & 0x800000){
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+        }
+        else{
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");            
+#endif // PYJ.2019.08.11_END -- 
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+        }
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+        Pol_Delay_us(10);
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+        R1 = ((R1 << 1) & 0xFFFFFF);
+    }
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+        printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+    Pol_Delay_us(10);
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+
+}

insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.SearchResults

@@ -1,3 +1,131 @@
----- TYPE_BLUECELL_ACK Matches (2 in 2 files) ----
-RF_Status_Ack in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
-zig_operate.h (D:\workspace\STM32F103_ATTEN_PLL_Zig\Inc) line 25 :     TYPE_BLUECELL_ACK    = 4,
+---- printf Matches (130 in 10 files) ----
+AD5318_Ctrl in AD5318.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("ShiftTarget : %x \r\n",ShiftTarget);
+N_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("FRAC : %d INT : %d \r\n",(int)_FRAC,_INT);
+N_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+N_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
+N_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);    
+N_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+R_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("_MOD : %d INT : %d \r\n",_MOD,_RCOUNTER);
+R_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+R_Divider_Reg_Create in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\ntemp_adf4153.N_Value : %f  temp_adf4153.INT_Value : %f  temp_adf4153.MOD_Value : %f \r\n",temp_adf4153.N_Value,(double)temp_adf4153.INT_Value,(double)temp_adf4153.MOD_Value);
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n temp_adf4153.N_Value - (double)temp_adf4153.INT_Value) : %f  temp * (double)temp_adf4153.MOD_Value : %f \r\n",temp,temp * (double)temp_adf4153.MOD_Value);
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\ntemp_adf4153.N_Value : %x   : %f ",temp_adf4153.N_Value,((double)(Freq / 1000) /  (double)(temp_adf4153.PFD_Value / 1000)) / 1000);
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("temp_adf4153.MOD_Value : %x   : %d \r\n",temp_adf4153.MOD_Value,temp_adf4153.MOD_Value);
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n");
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("temp_adf4153.FRAC_Value : %x   : %d\r\n",temp_adf4153.FRAC_Value,temp_adf4153.FRAC_Value);
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n");    
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("temp_adf4153.INT_Value : %x   : %d\r\n",temp_adf4153.INT_Value,temp_adf4153.INT_Value); 
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n");    
+ADF4153_Freq_Calc in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("R0: %x  R1: %x \r\n",N_Divider_Reg_Create(temp_adf4153.FRAC_Value,temp_adf4153.INT_Value,0),R_Divider_Reg_Create(temp_adf4153.MOD_Value,R_Counter,1,0,2,0));   
+ADF4153_Initialize in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("\r\nPLL_EN_3_5G_H_GPIO_Port\r\n");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("YJ :R0: %x  R1:  %x   R2 : %x R3 : %x ",R0,R1,R2,R3);
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :              printf("1");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :              printf("0");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :      printf("\r\n");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4153_Module_Ctrl in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\n");
+BDA4601_atten_ctrl in BDA4601.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("BDA4601_atten_ctrl : %x \r\n",data);
+BDA4601_atten_ctrl in BDA4601.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //                     printf("1");
+BDA4601_atten_ctrl in BDA4601.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //                printf("0");
+Jump_App in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("boot loader start\n");               //硫붿꽭占�? 異쒕젰
+Jump_App in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("jump!\n");
+Flash_InitRead in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
+Flash_InitRead in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
+Flash_InitRead in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("%02X ",*(uint8_t*)Address);
+Flash_RGB_Data_Write in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("HAL NOT OK \n");
+Flash_write in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("Erase Failed \r\n");
+FLASH_Byte_Write in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //  printf("Flash Write Start \r\n");
+FLASH_Byte_Write in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("Eraser Error\r\n");
+FLASH_Byte_Write in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("Write Error %d\r\n",__LINE__);
+FLASH_Byte_Write in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i));
+Bluecell_Flash_Read in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("Addr = %x, Data = %x\r\n", FLASH_USER_START_ADDR + i, *(__IO uint16_t *)(FLASH_USER_START_ADDR + i));
+Bluecell_Flash_Read in flash.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("Data = %x\r\n",  data[i]);
+kConstPrinter in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("%s", Bluecell_Prot_IndexStr[k]);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //                printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //                printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //                            printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //                            printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //            printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //            printf("\r\n LINE %d\r\n",__LINE__);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("TDD SYNC OPERATE ; %d\r\n",cmd);
+Power_ON_OFF_Ctrl in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("Function : %s LINE : %d   ERROR \r\n",__func__,__LINE__);
+ATTEN_PLL_PATH_Initialize in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("Data = %x\r\n",  Flash_Save_data[i]);
+ADC_Check in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :           printf("Prev_data[%d] : %x",i,Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
+ADC_Check in includes.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :           printf("%x\r\n",i,Prev_data[INDEX_DET_1_8G_DL_IN_L + i]);            
+assert_failed in main.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :      tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+PE43711_ALL_atten_ctrl in PE43711.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("why not? \r\n");
+halSynSetFreq in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
+halSynSetFreq in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
+N_Counter_Latch_Create in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
+N_Counter_Latch_Create in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+N_Counter_Latch_Create in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+N_Counter_Latch_Create in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+N_Counter_Latch_Create in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+N_Counter_Latch_Create in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :      printf("\r\n");
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("\r\n");
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("1");
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("0");            
+ADF4113_Module_Ctrl in pll_4113.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("\r\n");
+HAL_UART_RxCpltCallback in uart.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("Function : %s : \r\n",__func__);
+GetDataFromUartQueue in uart.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ;
+GetDataFromUartQueue in uart.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data cnt zero !!!  \r\n");
+GetDataFromUartQueue in uart.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :                 printf("%02x ",uart_buf[i]);
+RF_Data_Check in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
+RF_Data_Check in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("CRC Result : \"%d\"   \r\n",ret);
+RF_Status_Get in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+RF_Status_Get in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("\r\nYJ : %x",ADCvalue[0]);
+RF_Status_Get in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("\r\n");
+RF_Status_Ack in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+RF_Status_Ack in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("\r\nYJ : %x",ADCvalue[0]);
+RF_Status_Ack in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("\r\n");
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //    printf("Prev_data[INDEX_ATT_1_8G_DL1]  : %x  data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //            printf("PLL CTRL START !! \r\n");
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //            printf("PLL CTRL START !! \r\n");
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("DAC CTRL START \r\n");
+RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("DAC Change\r\n");
+RF_Ctrl_Main in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("%02x ",data_buf[i]);
+RF_Ctrl_Main in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("Reset Start \r\n");
+RF_Ctrl_Main in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :     printf("TYPE_BLUECELL_SET : ");
+RF_Ctrl_Main in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("%02x ",data_buf[i]);
+RF_Ctrl_Main in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         printf("\r\nTYPE_BLUECELL_GET : \r\n");
+RF_Ctrl_Main in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) : //        printf("\r\nFLASH Write\r\n");
+RF_Ctrl_Main in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);