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UART RX DMA 추가

YJ 6 anni fa
parent
commit
d8c4bab846
100 ha cambiato i file con 9640 aggiunte e 4342 eliminazioni
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      .cproject
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      Debug/STM32F103_ATTEN_PLL_Zig.elf
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      Inc/uart.h
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+ 199 - 199
.cproject


BIN
Debug/STM32F103_ATTEN_PLL_Zig.elf


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+ 541 - 504
Debug/STM32F103_ATTEN_PLL_Zig.hex


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+ 3504 - 3121
Debug/STM32F103_ATTEN_PLL_Zig.list


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+ 528 - 485
Debug/STM32F103_ATTEN_PLL_Zig.map


BIN
Debug/Src/BDA4601.o


BIN
Debug/Src/PE43711.o


+ 5 - 5
Debug/Src/main.su

@@ -1,5 +1,5 @@
1
-main.c:76:6:HAL_TIM_PeriodElapsedCallback	0	static
2
-main.c:84:5:_write	8	static
3
-main.c:154:6:SystemClock_Config	96	static
4
-main.c:96:5:main	56	static
5
-main.c:570:6:Error_Handler	0	static
1
+main.c:77:6:HAL_TIM_PeriodElapsedCallback	0	static
2
+main.c:85:5:_write	8	static
3
+main.c:156:6:SystemClock_Config	96	static
4
+main.c:97:5:main	56	static
5
+main.c:575:6:Error_Handler	0	static

BIN
Debug/Src/stm32f1xx_hal_msp.o


+ 7 - 7
Debug/Src/stm32f1xx_hal_msp.su

@@ -1,7 +1,7 @@
1
-stm32f1xx_hal_msp.c:65:6:HAL_MspInit	8	static
2
-stm32f1xx_hal_msp.c:91:6:HAL_ADC_MspInit	48	static
3
-stm32f1xx_hal_msp.c:164:6:HAL_ADC_MspDeInit	8	static
4
-stm32f1xx_hal_msp.c:212:6:HAL_TIM_Base_MspInit	8	static
5
-stm32f1xx_hal_msp.c:234:6:HAL_TIM_Base_MspDeInit	0	static
6
-stm32f1xx_hal_msp.c:259:6:HAL_UART_MspInit	32	static
7
-stm32f1xx_hal_msp.c:298:6:HAL_UART_MspDeInit	8	static
1
+stm32f1xx_hal_msp.c:67:6:HAL_MspInit	8	static
2
+stm32f1xx_hal_msp.c:93:6:HAL_ADC_MspInit	48	static
3
+stm32f1xx_hal_msp.c:166:6:HAL_ADC_MspDeInit	8	static
4
+stm32f1xx_hal_msp.c:214:6:HAL_TIM_Base_MspInit	8	static
5
+stm32f1xx_hal_msp.c:236:6:HAL_TIM_Base_MspDeInit	0	static
6
+stm32f1xx_hal_msp.c:261:6:HAL_UART_MspInit	40	static
7
+stm32f1xx_hal_msp.c:317:6:HAL_UART_MspDeInit	8	static

BIN
Debug/Src/stm32f1xx_it.o


+ 13 - 12
Debug/Src/stm32f1xx_it.su

@@ -1,12 +1,13 @@
1
-stm32f1xx_it.c:72:6:NMI_Handler	0	static
2
-stm32f1xx_it.c:85:6:HardFault_Handler	0	static
3
-stm32f1xx_it.c:100:6:MemManage_Handler	0	static
4
-stm32f1xx_it.c:115:6:BusFault_Handler	0	static
5
-stm32f1xx_it.c:130:6:UsageFault_Handler	0	static
6
-stm32f1xx_it.c:145:6:SVC_Handler	0	static
7
-stm32f1xx_it.c:158:6:DebugMon_Handler	0	static
8
-stm32f1xx_it.c:171:6:PendSV_Handler	0	static
9
-stm32f1xx_it.c:184:6:SysTick_Handler	0	static
10
-stm32f1xx_it.c:205:6:DMA1_Channel1_IRQHandler	0	static
11
-stm32f1xx_it.c:219:6:USART1_IRQHandler	0	static
12
-stm32f1xx_it.c:233:6:TIM6_IRQHandler	0	static
1
+stm32f1xx_it.c:73:6:NMI_Handler	0	static
2
+stm32f1xx_it.c:86:6:HardFault_Handler	0	static
3
+stm32f1xx_it.c:101:6:MemManage_Handler	0	static
4
+stm32f1xx_it.c:116:6:BusFault_Handler	0	static
5
+stm32f1xx_it.c:131:6:UsageFault_Handler	0	static
6
+stm32f1xx_it.c:146:6:SVC_Handler	0	static
7
+stm32f1xx_it.c:159:6:DebugMon_Handler	0	static
8
+stm32f1xx_it.c:172:6:PendSV_Handler	0	static
9
+stm32f1xx_it.c:185:6:SysTick_Handler	0	static
10
+stm32f1xx_it.c:206:6:DMA1_Channel1_IRQHandler	0	static
11
+stm32f1xx_it.c:220:6:DMA1_Channel5_IRQHandler	0	static
12
+stm32f1xx_it.c:234:6:USART1_IRQHandler	0	static
13
+stm32f1xx_it.c:248:6:TIM6_IRQHandler	0	static

+ 1 - 0
Inc/stm32f1xx_it.h

@@ -57,6 +57,7 @@ void DebugMon_Handler(void);
57 57
 void PendSV_Handler(void);
58 58
 void SysTick_Handler(void);
59 59
 void DMA1_Channel1_IRQHandler(void);
60
+void DMA1_Channel5_IRQHandler(void);
60 61
 void USART1_IRQHandler(void);
61 62
 void TIM6_IRQHandler(void);
62 63
 /* USER CODE BEGIN EFP */

+ 6 - 1
Inc/uart.h

@@ -12,13 +12,18 @@
12 12
 
13 13
 #define hTerminal    huart1
14 14
 
15
-#define QUEUE_BUFFER_LENGTH 255
15
+#define QUEUE_BUFFER_LENGTH 1024
16 16
 
17 17
 typedef struct
18 18
 {
19 19
     int head, tail, data;
20 20
     uint8_t Buffer[QUEUE_BUFFER_LENGTH];
21 21
 }UARTQUEUE, *pUARTQUEUE;
22
+typedef struct  {
23
+   uint8_t buffer[QUEUE_BUFFER_LENGTH];
24
+   volatile uint16_t input_p;
25
+   volatile uint16_t output_p;
26
+} uart_hal_tx_type;
22 27
 
23 28
 extern UART_HandleTypeDef huart1;
24 29
 

+ 12 - 1
STM32F103_ATTEN_PLL_Zig.ioc

@@ -56,7 +56,17 @@ Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
56 56
 Dma.ADC1.0.Priority=DMA_PRIORITY_LOW
57 57
 Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
58 58
 Dma.Request0=ADC1
59
-Dma.RequestsNb=1
59
+Dma.Request1=USART1_RX
60
+Dma.RequestsNb=2
61
+Dma.USART1_RX.1.Direction=DMA_PERIPH_TO_MEMORY
62
+Dma.USART1_RX.1.Instance=DMA1_Channel5
63
+Dma.USART1_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
64
+Dma.USART1_RX.1.MemInc=DMA_MINC_ENABLE
65
+Dma.USART1_RX.1.Mode=DMA_NORMAL
66
+Dma.USART1_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
67
+Dma.USART1_RX.1.PeriphInc=DMA_PINC_DISABLE
68
+Dma.USART1_RX.1.Priority=DMA_PRIORITY_LOW
69
+Dma.USART1_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
60 70
 File.Version=6
61 71
 KeepUserPlacement=false
62 72
 Mcu.Family=STM32F1
@@ -154,6 +164,7 @@ MxCube.Version=5.2.1
154 164
 MxDb.Version=DB.5.0.21
155 165
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
156 166
 NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
167
+NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:false\:true\:false\:true
157 168
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
158 169
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
159 170
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false

+ 6 - 1
Src/main.c

@@ -48,6 +48,7 @@ DMA_HandleTypeDef hdma_adc1;
48 48
 TIM_HandleTypeDef htim6;
49 49
 
50 50
 UART_HandleTypeDef huart1;
51
+DMA_HandleTypeDef hdma_usart1_rx;
51 52
 
52 53
 /* USER CODE BEGIN PV */
53 54
 volatile uint32_t LedTimerCnt = 0;
@@ -83,7 +84,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
83 84
 #endif // PYJ.2019.07.26_END -- 
84 85
 int _write (int file, uint8_t *ptr, uint16_t len)
85 86
 {
86
-    HAL_UART_Transmit (&huart1, ptr, len, 10);
87
+    HAL_UART_Transmit(&huart1, ptr, len,10);
87 88
     return len;
88 89
 }
89 90
 
@@ -128,6 +129,7 @@ int main(void)
128 129
   /* USER CODE BEGIN 2 */
129 130
   setbuf(stdout, NULL);
130 131
   printf("UART Start \r\n");
132
+  HAL_UART_Receive_DMA(&huart1, &TerminalQueue.Buffer[0], 1);
131 133
 //  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
132 134
 
133 135
   /* USER CODE END 2 */
@@ -423,6 +425,9 @@ static void MX_DMA_Init(void)
423 425
   /* DMA1_Channel1_IRQn interrupt configuration */
424 426
   HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
425 427
   HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
428
+  /* DMA1_Channel5_IRQn interrupt configuration */
429
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
430
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
426 431
 
427 432
 }
428 433
 

+ 22 - 0
Src/stm32f1xx_hal_msp.c

@@ -26,6 +26,8 @@
26 26
 /* USER CODE END Includes */
27 27
 extern DMA_HandleTypeDef hdma_adc1;
28 28
 
29
+extern DMA_HandleTypeDef hdma_usart1_rx;
30
+
29 31
 /* Private typedef -----------------------------------------------------------*/
30 32
 /* USER CODE BEGIN TD */
31 33
 
@@ -282,6 +284,23 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
282 284
     GPIO_InitStruct.Pull = GPIO_NOPULL;
283 285
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
284 286
 
287
+    /* USART1 DMA Init */
288
+    /* USART1_RX Init */
289
+    hdma_usart1_rx.Instance = DMA1_Channel5;
290
+    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
291
+    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
292
+    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
293
+    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
294
+    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
295
+    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
296
+    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
297
+    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
298
+    {
299
+      Error_Handler();
300
+    }
301
+
302
+    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
303
+
285 304
   /* USER CODE BEGIN USART1_MspInit 1 */
286 305
 
287 306
   /* USER CODE END USART1_MspInit 1 */
@@ -311,6 +330,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
311 330
     */
312 331
     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
313 332
 
333
+    /* USART1 DMA DeInit */
334
+    HAL_DMA_DeInit(huart->hdmarx);
335
+
314 336
     /* USART1 interrupt DeInit */
315 337
     HAL_NVIC_DisableIRQ(USART1_IRQn);
316 338
   /* USER CODE BEGIN USART1_MspDeInit 1 */

+ 15 - 0
Src/stm32f1xx_it.c

@@ -58,6 +58,7 @@
58 58
 /* External variables --------------------------------------------------------*/
59 59
 extern DMA_HandleTypeDef hdma_adc1;
60 60
 extern TIM_HandleTypeDef htim6;
61
+extern DMA_HandleTypeDef hdma_usart1_rx;
61 62
 extern UART_HandleTypeDef huart1;
62 63
 /* USER CODE BEGIN EV */
63 64
 
@@ -213,6 +214,20 @@ void DMA1_Channel1_IRQHandler(void)
213 214
   /* USER CODE END DMA1_Channel1_IRQn 1 */
214 215
 }
215 216
 
217
+/**
218
+  * @brief This function handles DMA1 channel5 global interrupt.
219
+  */
220
+void DMA1_Channel5_IRQHandler(void)
221
+{
222
+  /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
223
+
224
+  /* USER CODE END DMA1_Channel5_IRQn 0 */
225
+  HAL_DMA_IRQHandler(&hdma_usart1_rx);
226
+  /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
227
+
228
+  /* USER CODE END DMA1_Channel5_IRQn 1 */
229
+}
230
+
216 231
 /**
217 232
   * @brief This function handles USART1 global interrupt.
218 233
   */

+ 34 - 5
Src/uart.c

@@ -9,11 +9,12 @@
9 9
 
10 10
 UARTQUEUE TerminalQueue;
11 11
 UARTQUEUE WifiQueue;
12
+uart_hal_tx_type uart_hal_tx;
12 13
 
13 14
 void InitUartQueue(pUARTQUEUE pQueue)
14 15
 {
15 16
     pQueue->data = pQueue->head = pQueue->tail = 0;
16
-
17
+    uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
17 18
     if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
18 19
     {
19 20
       //_Error_Handler(__FILE__, __LINE__);
@@ -36,6 +37,33 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
36 37
     HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
37 38
    // Set_UartRcv(true);
38 39
 }
40
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
41
+{
42
+   uint16_t size;
43
+
44
+   if(huart->Instance == USART1)
45
+   {
46
+      uart_hal_tx.output_p += huart->TxXferSize;
47
+      if(uart_hal_tx.output_p >= QUEUE_BUFFER_LENGTH)
48
+      {
49
+         uart_hal_tx.output_p -= QUEUE_BUFFER_LENGTH;
50
+      }
51
+      if(uart_hal_tx.input_p != uart_hal_tx.output_p)
52
+      {
53
+         if(uart_hal_tx.input_p > uart_hal_tx.output_p)
54
+         {
55
+            size = uart_hal_tx.input_p - uart_hal_tx.output_p;
56
+         }
57
+         else
58
+         {
59
+            size = QUEUE_BUFFER_LENGTH - uart_hal_tx.output_p;
60
+         }
61
+         HAL_UART_Transmit_IT(huart, &uart_hal_tx.buffer[uart_hal_tx.output_p], size);
62
+      }
63
+   }
64
+}
65
+
66
+
39 67
 void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data)
40 68
 {
41 69
     pUARTQUEUE pQueue = &TerminalQueue;
@@ -59,7 +87,8 @@ void GetDataFromUartQueue(UART_HandleTypeDef *huart)
59 87
 //    {
60 88
 //       _Error_Handler(__FILE__, __LINE__);
61 89
 //    }
62
-    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail);        
90
+    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
91
+
63 92
     pQueue->tail++;
64 93
     if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
65 94
     pQueue->data--;
@@ -68,9 +97,9 @@ void GetDataFromUartQueue(UART_HandleTypeDef *huart)
68 97
         RF_Ctrl_Main(&uart_buf[0]);
69 98
 //        HAL_UART_Transmit(dst, &temp_buf[BLUECELL_HEADER00], 11, 3000);
70 99
 #if 0 // PYJ.2019.07.15_BEGIN -- 
71
-//            for(int i = 0; i < cnt; i++){
72
-//                printf("%02x",update_data_buf[i]);
73
-//            }
100
+            for(int i = 0; i < cnt; i++){
101
+                printf("%02x ",uart_buf[i]);
102
+            }
74 103
 #endif // PYJ.2019.07.15_END -- 
75 104
         cnt = 0;
76 105
         

+ 8 - 1
Src/zig_operate.c

@@ -181,6 +181,7 @@ ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
181 181
 };
182 182
 
183 183
 typedef enum{
184
+    TYPE_BLUECELL_RESET = 0,
184 185
     TYPE_ATT_1_8GHz_DL1 = 1,
185 186
     TYPE_ATT_1_8GHz_DL2,
186 187
 
@@ -233,7 +234,13 @@ bool RF_Ctrl_Main(uint8_t* data_buf){
233 234
 
234 235
     
235 236
     switch(type){
236
-    case TYPE_ATT_1_8GHz_DL1:   break;
237
+    case TYPE_BLUECELL_RESET: 
238
+//        printf("Reset Start \r\n");
239
+        NVIC_SystemReset();
240
+        break;
241
+    case TYPE_ATT_1_8GHz_DL1:  
242
+        printf(" ");
243
+        break;
237 244
     case TYPE_ATT_1_8GHz_DL2:   break;
238 245
 
239 246
     case TYPE_ATT_1_8GHz_UL1:   break;

+ 600 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(3121).c

@@ -0,0 +1,600 @@
1
+/* USER CODE BEGIN Header */
2
+/**
3
+  ******************************************************************************
4
+  * @file           : main.c
5
+  * @brief          : Main program body
6
+  ******************************************************************************
7
+  * @attention
8
+  *
9
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10
+  * All rights reserved.</center></h2>
11
+  *
12
+  * This software component is licensed by ST under BSD 3-Clause license,
13
+  * the "License"; You may not use this file except in compliance with the
14
+  * License. You may obtain a copy of the License at:
15
+  *                        opensource.org/licenses/BSD-3-Clause
16
+  *
17
+  ******************************************************************************
18
+  */
19
+/* USER CODE END Header */
20
+
21
+/* Includes ------------------------------------------------------------------*/
22
+#include "main.h"
23
+
24
+/* Private includes ----------------------------------------------------------*/
25
+/* USER CODE BEGIN Includes */
26
+
27
+/* USER CODE END Includes */
28
+
29
+/* Private typedef -----------------------------------------------------------*/
30
+/* USER CODE BEGIN PTD */
31
+
32
+/* USER CODE END PTD */
33
+
34
+/* Private define ------------------------------------------------------------*/
35
+/* USER CODE BEGIN PD */
36
+
37
+/* USER CODE END PD */
38
+
39
+/* Private macro -------------------------------------------------------------*/
40
+/* USER CODE BEGIN PM */
41
+
42
+/* USER CODE END PM */
43
+
44
+/* Private variables ---------------------------------------------------------*/
45
+ADC_HandleTypeDef hadc1;
46
+DMA_HandleTypeDef hdma_adc1;
47
+
48
+TIM_HandleTypeDef htim6;
49
+
50
+UART_HandleTypeDef huart1;
51
+DMA_HandleTypeDef hdma_usart1_rx;
52
+
53
+/* USER CODE BEGIN PV */
54
+volatile uint32_t LedTimerCnt = 0;
55
+volatile uint32_t UartTimerCnt = 0;
56
+
57
+/* USER CODE END PV */
58
+
59
+/* Private function prototypes -----------------------------------------------*/
60
+void SystemClock_Config(void);
61
+static void MX_GPIO_Init(void);
62
+static void MX_DMA_Init(void);
63
+static void MX_ADC1_Init(void);
64
+static void MX_USART1_UART_Init(void);
65
+static void MX_TIM6_Init(void);
66
+static void MX_NVIC_Init(void);
67
+/* USER CODE BEGIN PFP */
68
+
69
+/* USER CODE END PFP */
70
+
71
+/* Private user code ---------------------------------------------------------*/
72
+/* USER CODE BEGIN 0 */
73
+#define ADC_EA     14
74
+__IO uint32_t ADCvalue[ADC_EA];
75
+#if 1 // PYJ.2019.07.26_BEGIN --
76
+
77
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
78
+{
79
+    if(htim->Instance == TIM6){
80
+        UartTimerCnt++;
81
+        LedTimerCnt++;
82
+    }
83
+} 
84
+#endif // PYJ.2019.07.26_END -- 
85
+int _write (int file, uint8_t *ptr, uint16_t len)
86
+{
87
+    HAL_UART_Transmit(&huart1, ptr, len,10);
88
+    return len;
89
+}
90
+
91
+/* USER CODE END 0 */
92
+
93
+/**
94
+  * @brief  The application entry point.
95
+  * @retval int
96
+  */
97
+int main(void)
98
+{
99
+  /* USER CODE BEGIN 1 */
100
+
101
+  /* USER CODE END 1 */
102
+  
103
+
104
+  /* MCU Configuration--------------------------------------------------------*/
105
+
106
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
107
+  HAL_Init();
108
+
109
+  /* USER CODE BEGIN Init */
110
+
111
+  /* USER CODE END Init */
112
+
113
+  /* Configure the system clock */
114
+  SystemClock_Config();
115
+
116
+  /* USER CODE BEGIN SysInit */
117
+
118
+  /* USER CODE END SysInit */
119
+
120
+  /* Initialize all configured peripherals */
121
+  MX_GPIO_Init();
122
+  MX_DMA_Init();
123
+  MX_ADC1_Init();
124
+  MX_USART1_UART_Init();
125
+  MX_TIM6_Init();
126
+
127
+  /* Initialize interrupts */
128
+  MX_NVIC_Init();
129
+  /* USER CODE BEGIN 2 */
130
+  setbuf(stdout, NULL);
131
+  printf("UART Start \r\n");
132
+  HAL_UART_Receive_DMA(&huart1, rx1_data, 1);
133
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
134
+
135
+  /* USER CODE END 2 */
136
+
137
+  /* Infinite loop */
138
+  /* USER CODE BEGIN WHILE */
139
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
140
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
141
+  while (1)
142
+  {
143
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
144
+    while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
145
+    /* USER CODE END WHILE */
146
+
147
+    /* USER CODE BEGIN 3 */
148
+  }
149
+  /* USER CODE END 3 */
150
+}
151
+
152
+/**
153
+  * @brief System Clock Configuration
154
+  * @retval None
155
+  */
156
+void SystemClock_Config(void)
157
+{
158
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
159
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
160
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
161
+
162
+  /** Initializes the CPU, AHB and APB busses clocks 
163
+  */
164
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
165
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
166
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
167
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
168
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
169
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
170
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
171
+  {
172
+    Error_Handler();
173
+  }
174
+  /** Initializes the CPU, AHB and APB busses clocks 
175
+  */
176
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
177
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
178
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
179
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
180
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
181
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
182
+
183
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
184
+  {
185
+    Error_Handler();
186
+  }
187
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
188
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
189
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
190
+  {
191
+    Error_Handler();
192
+  }
193
+}
194
+
195
+/**
196
+  * @brief NVIC Configuration.
197
+  * @retval None
198
+  */
199
+static void MX_NVIC_Init(void)
200
+{
201
+  /* USART1_IRQn interrupt configuration */
202
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
203
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
204
+  /* TIM6_IRQn interrupt configuration */
205
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
206
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
207
+}
208
+
209
+/**
210
+  * @brief ADC1 Initialization Function
211
+  * @param None
212
+  * @retval None
213
+  */
214
+static void MX_ADC1_Init(void)
215
+{
216
+
217
+  /* USER CODE BEGIN ADC1_Init 0 */
218
+
219
+  /* USER CODE END ADC1_Init 0 */
220
+
221
+  ADC_ChannelConfTypeDef sConfig = {0};
222
+
223
+  /* USER CODE BEGIN ADC1_Init 1 */
224
+
225
+  /* USER CODE END ADC1_Init 1 */
226
+  /** Common config 
227
+  */
228
+  hadc1.Instance = ADC1;
229
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
230
+  hadc1.Init.ContinuousConvMode = ENABLE;
231
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
232
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
233
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
234
+  hadc1.Init.NbrOfConversion = 14;
235
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
236
+  {
237
+    Error_Handler();
238
+  }
239
+  /** Configure Regular Channel 
240
+  */
241
+  sConfig.Channel = ADC_CHANNEL_0;
242
+  sConfig.Rank = ADC_REGULAR_RANK_1;
243
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
244
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
245
+  {
246
+    Error_Handler();
247
+  }
248
+  /** Configure Regular Channel 
249
+  */
250
+  sConfig.Rank = ADC_REGULAR_RANK_2;
251
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
252
+  {
253
+    Error_Handler();
254
+  }
255
+  /** Configure Regular Channel 
256
+  */
257
+  sConfig.Rank = ADC_REGULAR_RANK_3;
258
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
259
+  {
260
+    Error_Handler();
261
+  }
262
+  /** Configure Regular Channel 
263
+  */
264
+  sConfig.Rank = ADC_REGULAR_RANK_4;
265
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
266
+  {
267
+    Error_Handler();
268
+  }
269
+  /** Configure Regular Channel 
270
+  */
271
+  sConfig.Rank = ADC_REGULAR_RANK_5;
272
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
273
+  {
274
+    Error_Handler();
275
+  }
276
+  /** Configure Regular Channel 
277
+  */
278
+  sConfig.Rank = ADC_REGULAR_RANK_6;
279
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
280
+  {
281
+    Error_Handler();
282
+  }
283
+  /** Configure Regular Channel 
284
+  */
285
+  sConfig.Rank = ADC_REGULAR_RANK_7;
286
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
287
+  {
288
+    Error_Handler();
289
+  }
290
+  /** Configure Regular Channel 
291
+  */
292
+  sConfig.Rank = ADC_REGULAR_RANK_8;
293
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
294
+  {
295
+    Error_Handler();
296
+  }
297
+  /** Configure Regular Channel 
298
+  */
299
+  sConfig.Rank = ADC_REGULAR_RANK_9;
300
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
301
+  {
302
+    Error_Handler();
303
+  }
304
+  /** Configure Regular Channel 
305
+  */
306
+  sConfig.Rank = ADC_REGULAR_RANK_10;
307
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
308
+  {
309
+    Error_Handler();
310
+  }
311
+  /** Configure Regular Channel 
312
+  */
313
+  sConfig.Rank = ADC_REGULAR_RANK_11;
314
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
315
+  {
316
+    Error_Handler();
317
+  }
318
+  /** Configure Regular Channel 
319
+  */
320
+  sConfig.Rank = ADC_REGULAR_RANK_12;
321
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
322
+  {
323
+    Error_Handler();
324
+  }
325
+  /** Configure Regular Channel 
326
+  */
327
+  sConfig.Rank = ADC_REGULAR_RANK_13;
328
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
329
+  {
330
+    Error_Handler();
331
+  }
332
+  /** Configure Regular Channel 
333
+  */
334
+  sConfig.Rank = ADC_REGULAR_RANK_14;
335
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
336
+  {
337
+    Error_Handler();
338
+  }
339
+  /* USER CODE BEGIN ADC1_Init 2 */
340
+
341
+  /* USER CODE END ADC1_Init 2 */
342
+
343
+}
344
+
345
+/**
346
+  * @brief TIM6 Initialization Function
347
+  * @param None
348
+  * @retval None
349
+  */
350
+static void MX_TIM6_Init(void)
351
+{
352
+
353
+  /* USER CODE BEGIN TIM6_Init 0 */
354
+
355
+  /* USER CODE END TIM6_Init 0 */
356
+
357
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
358
+
359
+  /* USER CODE BEGIN TIM6_Init 1 */
360
+
361
+  /* USER CODE END TIM6_Init 1 */
362
+  htim6.Instance = TIM6;
363
+  htim6.Init.Prescaler = 6000-1;
364
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
365
+  htim6.Init.Period = 10;
366
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
367
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
368
+  {
369
+    Error_Handler();
370
+  }
371
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
372
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
373
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
374
+  {
375
+    Error_Handler();
376
+  }
377
+  /* USER CODE BEGIN TIM6_Init 2 */
378
+
379
+  /* USER CODE END TIM6_Init 2 */
380
+
381
+}
382
+
383
+/**
384
+  * @brief USART1 Initialization Function
385
+  * @param None
386
+  * @retval None
387
+  */
388
+static void MX_USART1_UART_Init(void)
389
+{
390
+
391
+  /* USER CODE BEGIN USART1_Init 0 */
392
+
393
+  /* USER CODE END USART1_Init 0 */
394
+
395
+  /* USER CODE BEGIN USART1_Init 1 */
396
+
397
+  /* USER CODE END USART1_Init 1 */
398
+  huart1.Instance = USART1;
399
+  huart1.Init.BaudRate = 115200;
400
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
401
+  huart1.Init.StopBits = UART_STOPBITS_1;
402
+  huart1.Init.Parity = UART_PARITY_NONE;
403
+  huart1.Init.Mode = UART_MODE_TX_RX;
404
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
405
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
406
+  if (HAL_UART_Init(&huart1) != HAL_OK)
407
+  {
408
+    Error_Handler();
409
+  }
410
+  /* USER CODE BEGIN USART1_Init 2 */
411
+
412
+  /* USER CODE END USART1_Init 2 */
413
+
414
+}
415
+
416
+/** 
417
+  * Enable DMA controller clock
418
+  */
419
+static void MX_DMA_Init(void) 
420
+{
421
+  /* DMA controller clock enable */
422
+  __HAL_RCC_DMA1_CLK_ENABLE();
423
+
424
+  /* DMA interrupt init */
425
+  /* DMA1_Channel1_IRQn interrupt configuration */
426
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
427
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
428
+  /* DMA1_Channel5_IRQn interrupt configuration */
429
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
430
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
431
+
432
+}
433
+
434
+/**
435
+  * @brief GPIO Initialization Function
436
+  * @param None
437
+  * @retval None
438
+  */
439
+static void MX_GPIO_Init(void)
440
+{
441
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
442
+
443
+  /* GPIO Ports Clock Enable */
444
+  __HAL_RCC_GPIOE_CLK_ENABLE();
445
+  __HAL_RCC_GPIOC_CLK_ENABLE();
446
+  __HAL_RCC_GPIOF_CLK_ENABLE();
447
+  __HAL_RCC_GPIOA_CLK_ENABLE();
448
+  __HAL_RCC_GPIOB_CLK_ENABLE();
449
+  __HAL_RCC_GPIOD_CLK_ENABLE();
450
+  __HAL_RCC_GPIOG_CLK_ENABLE();
451
+
452
+  /*Configure GPIO pin Output Level */
453
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
454
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
455
+
456
+  /*Configure GPIO pin Output Level */
457
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
458
+                          |PLL_EN_3_5G_H_Pin, GPIO_PIN_RESET);
459
+
460
+  /*Configure GPIO pin Output Level */
461
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
462
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
463
+
464
+  /*Configure GPIO pin Output Level */
465
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
466
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
467
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
468
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
469
+
470
+  /*Configure GPIO pin Output Level */
471
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
472
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
473
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin, GPIO_PIN_RESET);
474
+
475
+  /*Configure GPIO pin Output Level */
476
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
477
+
478
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
479
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
480
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
481
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
482
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
483
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
484
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
485
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
486
+
487
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
488
+                           PLL_EN_3_5G_H_Pin */
489
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
490
+                          |PLL_EN_3_5G_H_Pin;
491
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
492
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
493
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
494
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
495
+
496
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
497
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
498
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
499
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
500
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
501
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
502
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
503
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
504
+
505
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
506
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
507
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
508
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
509
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
510
+
511
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
512
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
513
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
514
+                           PATH_EN_3_5G_L_Pin */
515
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
516
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
517
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
518
+                          |PATH_EN_3_5G_L_Pin;
519
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
520
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
521
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
522
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
523
+
524
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
525
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
526
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
527
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
528
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
529
+
530
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
531
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_DL_Pin 
532
+                           PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_L_Pin PLL_ON_OFF_3_5G_H_Pin BOOT_LED_Pin */
533
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
534
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
535
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin;
536
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
537
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
538
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
539
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
540
+
541
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
542
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
543
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
544
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
545
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
546
+
547
+  /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */
548
+  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
549
+  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
550
+  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
551
+
552
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
553
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
554
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
555
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
556
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
557
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
558
+
559
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
560
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
561
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
562
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
563
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
564
+
565
+}
566
+
567
+/* USER CODE BEGIN 4 */
568
+
569
+/* USER CODE END 4 */
570
+
571
+/**
572
+  * @brief  This function is executed in case of error occurrence.
573
+  * @retval None
574
+  */
575
+void Error_Handler(void)
576
+{
577
+  /* USER CODE BEGIN Error_Handler_Debug */
578
+  /* User can add his own implementation to report the HAL error return state */
579
+
580
+  /* USER CODE END Error_Handler_Debug */
581
+}
582
+
583
+#ifdef  USE_FULL_ASSERT
584
+/**
585
+  * @brief  Reports the name of the source file and the source line number
586
+  *         where the assert_param error has occurred.
587
+  * @param  file: pointer to the source file name
588
+  * @param  line: assert_param error line source number
589
+  * @retval None
590
+  */
591
+void assert_failed(uint8_t *file, uint32_t line)
592
+{ 
593
+  /* USER CODE BEGIN 6 */
594
+  /* User can add his own implementation to report the file name and line number,
595
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
596
+  /* USER CODE END 6 */
597
+}
598
+#endif /* USE_FULL_ASSERT */
599
+
600
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 595 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(3821).c

@@ -0,0 +1,595 @@
1
+/* USER CODE BEGIN Header */
2
+/**
3
+  ******************************************************************************
4
+  * @file           : main.c
5
+  * @brief          : Main program body
6
+  ******************************************************************************
7
+  * @attention
8
+  *
9
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10
+  * All rights reserved.</center></h2>
11
+  *
12
+  * This software component is licensed by ST under BSD 3-Clause license,
13
+  * the "License"; You may not use this file except in compliance with the
14
+  * License. You may obtain a copy of the License at:
15
+  *                        opensource.org/licenses/BSD-3-Clause
16
+  *
17
+  ******************************************************************************
18
+  */
19
+/* USER CODE END Header */
20
+
21
+/* Includes ------------------------------------------------------------------*/
22
+#include "main.h"
23
+
24
+/* Private includes ----------------------------------------------------------*/
25
+/* USER CODE BEGIN Includes */
26
+
27
+/* USER CODE END Includes */
28
+
29
+/* Private typedef -----------------------------------------------------------*/
30
+/* USER CODE BEGIN PTD */
31
+
32
+/* USER CODE END PTD */
33
+
34
+/* Private define ------------------------------------------------------------*/
35
+/* USER CODE BEGIN PD */
36
+
37
+/* USER CODE END PD */
38
+
39
+/* Private macro -------------------------------------------------------------*/
40
+/* USER CODE BEGIN PM */
41
+
42
+/* USER CODE END PM */
43
+
44
+/* Private variables ---------------------------------------------------------*/
45
+ADC_HandleTypeDef hadc1;
46
+DMA_HandleTypeDef hdma_adc1;
47
+
48
+TIM_HandleTypeDef htim6;
49
+
50
+UART_HandleTypeDef huart1;
51
+
52
+/* USER CODE BEGIN PV */
53
+volatile uint32_t LedTimerCnt = 0;
54
+volatile uint32_t UartTimerCnt = 0;
55
+
56
+/* USER CODE END PV */
57
+
58
+/* Private function prototypes -----------------------------------------------*/
59
+void SystemClock_Config(void);
60
+static void MX_GPIO_Init(void);
61
+static void MX_DMA_Init(void);
62
+static void MX_ADC1_Init(void);
63
+static void MX_USART1_UART_Init(void);
64
+static void MX_TIM6_Init(void);
65
+static void MX_NVIC_Init(void);
66
+/* USER CODE BEGIN PFP */
67
+
68
+/* USER CODE END PFP */
69
+
70
+/* Private user code ---------------------------------------------------------*/
71
+/* USER CODE BEGIN 0 */
72
+#define ADC_EA     14
73
+__IO uint32_t ADCvalue[ADC_EA];
74
+#if 1 // PYJ.2019.07.26_BEGIN --
75
+
76
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
77
+{
78
+    if(htim->Instance == TIM6){
79
+        UartTimerCnt++;
80
+        LedTimerCnt++;
81
+    }
82
+} 
83
+#endif // PYJ.2019.07.26_END -- 
84
+int _write (int file, uint8_t *ptr, uint16_t len)
85
+{
86
+    HAL_UART_Transmit (&huart1, ptr, len, 10);
87
+    return len;
88
+}
89
+
90
+/* USER CODE END 0 */
91
+
92
+/**
93
+  * @brief  The application entry point.
94
+  * @retval int
95
+  */
96
+int main(void)
97
+{
98
+  /* USER CODE BEGIN 1 */
99
+
100
+  /* USER CODE END 1 */
101
+  
102
+
103
+  /* MCU Configuration--------------------------------------------------------*/
104
+
105
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
106
+  HAL_Init();
107
+
108
+  /* USER CODE BEGIN Init */
109
+
110
+  /* USER CODE END Init */
111
+
112
+  /* Configure the system clock */
113
+  SystemClock_Config();
114
+
115
+  /* USER CODE BEGIN SysInit */
116
+
117
+  /* USER CODE END SysInit */
118
+
119
+  /* Initialize all configured peripherals */
120
+  MX_GPIO_Init();
121
+  MX_DMA_Init();
122
+  MX_ADC1_Init();
123
+  MX_USART1_UART_Init();
124
+  MX_TIM6_Init();
125
+
126
+  /* Initialize interrupts */
127
+  MX_NVIC_Init();
128
+  /* USER CODE BEGIN 2 */
129
+  setbuf(stdout, NULL);
130
+  printf("UART Start \r\n");
131
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
132
+
133
+  /* USER CODE END 2 */
134
+
135
+  /* Infinite loop */
136
+  /* USER CODE BEGIN WHILE */
137
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
138
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
139
+  while (1)
140
+  {
141
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
142
+    while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
143
+    /* USER CODE END WHILE */
144
+
145
+    /* USER CODE BEGIN 3 */
146
+  }
147
+  /* USER CODE END 3 */
148
+}
149
+
150
+/**
151
+  * @brief System Clock Configuration
152
+  * @retval None
153
+  */
154
+void SystemClock_Config(void)
155
+{
156
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
157
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
158
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
159
+
160
+  /** Initializes the CPU, AHB and APB busses clocks 
161
+  */
162
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
163
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
164
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
165
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
166
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
167
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
168
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
169
+  {
170
+    Error_Handler();
171
+  }
172
+  /** Initializes the CPU, AHB and APB busses clocks 
173
+  */
174
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
175
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
176
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
177
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
178
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
179
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
180
+
181
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
182
+  {
183
+    Error_Handler();
184
+  }
185
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
186
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
187
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
188
+  {
189
+    Error_Handler();
190
+  }
191
+}
192
+
193
+/**
194
+  * @brief NVIC Configuration.
195
+  * @retval None
196
+  */
197
+static void MX_NVIC_Init(void)
198
+{
199
+  /* USART1_IRQn interrupt configuration */
200
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
201
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
202
+  /* TIM6_IRQn interrupt configuration */
203
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
204
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
205
+}
206
+
207
+/**
208
+  * @brief ADC1 Initialization Function
209
+  * @param None
210
+  * @retval None
211
+  */
212
+static void MX_ADC1_Init(void)
213
+{
214
+
215
+  /* USER CODE BEGIN ADC1_Init 0 */
216
+
217
+  /* USER CODE END ADC1_Init 0 */
218
+
219
+  ADC_ChannelConfTypeDef sConfig = {0};
220
+
221
+  /* USER CODE BEGIN ADC1_Init 1 */
222
+
223
+  /* USER CODE END ADC1_Init 1 */
224
+  /** Common config 
225
+  */
226
+  hadc1.Instance = ADC1;
227
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
228
+  hadc1.Init.ContinuousConvMode = ENABLE;
229
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
230
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
231
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
232
+  hadc1.Init.NbrOfConversion = 14;
233
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
234
+  {
235
+    Error_Handler();
236
+  }
237
+  /** Configure Regular Channel 
238
+  */
239
+  sConfig.Channel = ADC_CHANNEL_0;
240
+  sConfig.Rank = ADC_REGULAR_RANK_1;
241
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
242
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
243
+  {
244
+    Error_Handler();
245
+  }
246
+  /** Configure Regular Channel 
247
+  */
248
+  sConfig.Rank = ADC_REGULAR_RANK_2;
249
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
250
+  {
251
+    Error_Handler();
252
+  }
253
+  /** Configure Regular Channel 
254
+  */
255
+  sConfig.Rank = ADC_REGULAR_RANK_3;
256
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
257
+  {
258
+    Error_Handler();
259
+  }
260
+  /** Configure Regular Channel 
261
+  */
262
+  sConfig.Rank = ADC_REGULAR_RANK_4;
263
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
264
+  {
265
+    Error_Handler();
266
+  }
267
+  /** Configure Regular Channel 
268
+  */
269
+  sConfig.Rank = ADC_REGULAR_RANK_5;
270
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
271
+  {
272
+    Error_Handler();
273
+  }
274
+  /** Configure Regular Channel 
275
+  */
276
+  sConfig.Rank = ADC_REGULAR_RANK_6;
277
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
278
+  {
279
+    Error_Handler();
280
+  }
281
+  /** Configure Regular Channel 
282
+  */
283
+  sConfig.Rank = ADC_REGULAR_RANK_7;
284
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
285
+  {
286
+    Error_Handler();
287
+  }
288
+  /** Configure Regular Channel 
289
+  */
290
+  sConfig.Rank = ADC_REGULAR_RANK_8;
291
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
292
+  {
293
+    Error_Handler();
294
+  }
295
+  /** Configure Regular Channel 
296
+  */
297
+  sConfig.Rank = ADC_REGULAR_RANK_9;
298
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
299
+  {
300
+    Error_Handler();
301
+  }
302
+  /** Configure Regular Channel 
303
+  */
304
+  sConfig.Rank = ADC_REGULAR_RANK_10;
305
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
306
+  {
307
+    Error_Handler();
308
+  }
309
+  /** Configure Regular Channel 
310
+  */
311
+  sConfig.Rank = ADC_REGULAR_RANK_11;
312
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
313
+  {
314
+    Error_Handler();
315
+  }
316
+  /** Configure Regular Channel 
317
+  */
318
+  sConfig.Rank = ADC_REGULAR_RANK_12;
319
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
320
+  {
321
+    Error_Handler();
322
+  }
323
+  /** Configure Regular Channel 
324
+  */
325
+  sConfig.Rank = ADC_REGULAR_RANK_13;
326
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
327
+  {
328
+    Error_Handler();
329
+  }
330
+  /** Configure Regular Channel 
331
+  */
332
+  sConfig.Rank = ADC_REGULAR_RANK_14;
333
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
334
+  {
335
+    Error_Handler();
336
+  }
337
+  /* USER CODE BEGIN ADC1_Init 2 */
338
+
339
+  /* USER CODE END ADC1_Init 2 */
340
+
341
+}
342
+
343
+/**
344
+  * @brief TIM6 Initialization Function
345
+  * @param None
346
+  * @retval None
347
+  */
348
+static void MX_TIM6_Init(void)
349
+{
350
+
351
+  /* USER CODE BEGIN TIM6_Init 0 */
352
+
353
+  /* USER CODE END TIM6_Init 0 */
354
+
355
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
356
+
357
+  /* USER CODE BEGIN TIM6_Init 1 */
358
+
359
+  /* USER CODE END TIM6_Init 1 */
360
+  htim6.Instance = TIM6;
361
+  htim6.Init.Prescaler = 6000-1;
362
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
363
+  htim6.Init.Period = 10;
364
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
365
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
366
+  {
367
+    Error_Handler();
368
+  }
369
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
370
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
371
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
372
+  {
373
+    Error_Handler();
374
+  }
375
+  /* USER CODE BEGIN TIM6_Init 2 */
376
+
377
+  /* USER CODE END TIM6_Init 2 */
378
+
379
+}
380
+
381
+/**
382
+  * @brief USART1 Initialization Function
383
+  * @param None
384
+  * @retval None
385
+  */
386
+static void MX_USART1_UART_Init(void)
387
+{
388
+
389
+  /* USER CODE BEGIN USART1_Init 0 */
390
+
391
+  /* USER CODE END USART1_Init 0 */
392
+
393
+  /* USER CODE BEGIN USART1_Init 1 */
394
+
395
+  /* USER CODE END USART1_Init 1 */
396
+  huart1.Instance = USART1;
397
+  huart1.Init.BaudRate = 115200;
398
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
399
+  huart1.Init.StopBits = UART_STOPBITS_1;
400
+  huart1.Init.Parity = UART_PARITY_NONE;
401
+  huart1.Init.Mode = UART_MODE_TX_RX;
402
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
403
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
404
+  if (HAL_UART_Init(&huart1) != HAL_OK)
405
+  {
406
+    Error_Handler();
407
+  }
408
+  /* USER CODE BEGIN USART1_Init 2 */
409
+
410
+  /* USER CODE END USART1_Init 2 */
411
+
412
+}
413
+
414
+/** 
415
+  * Enable DMA controller clock
416
+  */
417
+static void MX_DMA_Init(void) 
418
+{
419
+  /* DMA controller clock enable */
420
+  __HAL_RCC_DMA1_CLK_ENABLE();
421
+
422
+  /* DMA interrupt init */
423
+  /* DMA1_Channel1_IRQn interrupt configuration */
424
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
425
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
426
+
427
+}
428
+
429
+/**
430
+  * @brief GPIO Initialization Function
431
+  * @param None
432
+  * @retval None
433
+  */
434
+static void MX_GPIO_Init(void)
435
+{
436
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
437
+
438
+  /* GPIO Ports Clock Enable */
439
+  __HAL_RCC_GPIOE_CLK_ENABLE();
440
+  __HAL_RCC_GPIOC_CLK_ENABLE();
441
+  __HAL_RCC_GPIOF_CLK_ENABLE();
442
+  __HAL_RCC_GPIOA_CLK_ENABLE();
443
+  __HAL_RCC_GPIOB_CLK_ENABLE();
444
+  __HAL_RCC_GPIOD_CLK_ENABLE();
445
+  __HAL_RCC_GPIOG_CLK_ENABLE();
446
+
447
+  /*Configure GPIO pin Output Level */
448
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
449
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
450
+
451
+  /*Configure GPIO pin Output Level */
452
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
453
+                          |PLL_EN_3_5G_H_Pin, GPIO_PIN_RESET);
454
+
455
+  /*Configure GPIO pin Output Level */
456
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
457
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
458
+
459
+  /*Configure GPIO pin Output Level */
460
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
461
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
462
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
463
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
464
+
465
+  /*Configure GPIO pin Output Level */
466
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
467
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
468
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin, GPIO_PIN_RESET);
469
+
470
+  /*Configure GPIO pin Output Level */
471
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
472
+
473
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
474
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
475
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
476
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
477
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
478
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
479
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
480
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
481
+
482
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
483
+                           PLL_EN_3_5G_H_Pin */
484
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
485
+                          |PLL_EN_3_5G_H_Pin;
486
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
487
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
488
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
489
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
490
+
491
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
492
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
493
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
494
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
495
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
496
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
497
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
498
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
499
+
500
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
501
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
502
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
503
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
504
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
505
+
506
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
507
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
508
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
509
+                           PATH_EN_3_5G_L_Pin */
510
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
511
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
512
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
513
+                          |PATH_EN_3_5G_L_Pin;
514
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
515
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
516
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
517
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
518
+
519
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
520
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
521
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
522
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
523
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
524
+
525
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
526
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_DL_Pin 
527
+                           PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_L_Pin PLL_ON_OFF_3_5G_H_Pin BOOT_LED_Pin */
528
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
529
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
530
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin;
531
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
532
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
533
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
534
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
535
+
536
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
537
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
538
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
539
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
540
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
541
+
542
+  /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */
543
+  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
544
+  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
545
+  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
546
+
547
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
548
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
549
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
550
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
551
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
552
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
553
+
554
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
555
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
556
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
557
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
558
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
559
+
560
+}
561
+
562
+/* USER CODE BEGIN 4 */
563
+
564
+/* USER CODE END 4 */
565
+
566
+/**
567
+  * @brief  This function is executed in case of error occurrence.
568
+  * @retval None
569
+  */
570
+void Error_Handler(void)
571
+{
572
+  /* USER CODE BEGIN Error_Handler_Debug */
573
+  /* User can add his own implementation to report the HAL error return state */
574
+
575
+  /* USER CODE END Error_Handler_Debug */
576
+}
577
+
578
+#ifdef  USE_FULL_ASSERT
579
+/**
580
+  * @brief  Reports the name of the source file and the source line number
581
+  *         where the assert_param error has occurred.
582
+  * @param  file: pointer to the source file name
583
+  * @param  line: assert_param error line source number
584
+  * @retval None
585
+  */
586
+void assert_failed(uint8_t *file, uint32_t line)
587
+{ 
588
+  /* USER CODE BEGIN 6 */
589
+  /* User can add his own implementation to report the file name and line number,
590
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
591
+  /* USER CODE END 6 */
592
+}
593
+#endif /* USE_FULL_ASSERT */
594
+
595
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 600 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(6348).c

@@ -0,0 +1,600 @@
1
+/* USER CODE BEGIN Header */
2
+/**
3
+  ******************************************************************************
4
+  * @file           : main.c
5
+  * @brief          : Main program body
6
+  ******************************************************************************
7
+  * @attention
8
+  *
9
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10
+  * All rights reserved.</center></h2>
11
+  *
12
+  * This software component is licensed by ST under BSD 3-Clause license,
13
+  * the "License"; You may not use this file except in compliance with the
14
+  * License. You may obtain a copy of the License at:
15
+  *                        opensource.org/licenses/BSD-3-Clause
16
+  *
17
+  ******************************************************************************
18
+  */
19
+/* USER CODE END Header */
20
+
21
+/* Includes ------------------------------------------------------------------*/
22
+#include "main.h"
23
+
24
+/* Private includes ----------------------------------------------------------*/
25
+/* USER CODE BEGIN Includes */
26
+
27
+/* USER CODE END Includes */
28
+
29
+/* Private typedef -----------------------------------------------------------*/
30
+/* USER CODE BEGIN PTD */
31
+
32
+/* USER CODE END PTD */
33
+
34
+/* Private define ------------------------------------------------------------*/
35
+/* USER CODE BEGIN PD */
36
+
37
+/* USER CODE END PD */
38
+
39
+/* Private macro -------------------------------------------------------------*/
40
+/* USER CODE BEGIN PM */
41
+
42
+/* USER CODE END PM */
43
+
44
+/* Private variables ---------------------------------------------------------*/
45
+ADC_HandleTypeDef hadc1;
46
+DMA_HandleTypeDef hdma_adc1;
47
+
48
+TIM_HandleTypeDef htim6;
49
+
50
+UART_HandleTypeDef huart1;
51
+DMA_HandleTypeDef hdma_usart1_rx;
52
+
53
+/* USER CODE BEGIN PV */
54
+volatile uint32_t LedTimerCnt = 0;
55
+volatile uint32_t UartTimerCnt = 0;
56
+
57
+/* USER CODE END PV */
58
+
59
+/* Private function prototypes -----------------------------------------------*/
60
+void SystemClock_Config(void);
61
+static void MX_GPIO_Init(void);
62
+static void MX_DMA_Init(void);
63
+static void MX_ADC1_Init(void);
64
+static void MX_USART1_UART_Init(void);
65
+static void MX_TIM6_Init(void);
66
+static void MX_NVIC_Init(void);
67
+/* USER CODE BEGIN PFP */
68
+
69
+/* USER CODE END PFP */
70
+
71
+/* Private user code ---------------------------------------------------------*/
72
+/* USER CODE BEGIN 0 */
73
+#define ADC_EA     14
74
+__IO uint32_t ADCvalue[ADC_EA];
75
+#if 1 // PYJ.2019.07.26_BEGIN --
76
+
77
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
78
+{
79
+    if(htim->Instance == TIM6){
80
+        UartTimerCnt++;
81
+        LedTimerCnt++;
82
+    }
83
+} 
84
+#endif // PYJ.2019.07.26_END -- 
85
+int _write (int file, uint8_t *ptr, uint16_t len)
86
+{
87
+    HAL_UART_Transmit(&huart1, ptr, len,10);
88
+    return len;
89
+}
90
+
91
+/* USER CODE END 0 */
92
+
93
+/**
94
+  * @brief  The application entry point.
95
+  * @retval int
96
+  */
97
+int main(void)
98
+{
99
+  /* USER CODE BEGIN 1 */
100
+
101
+  /* USER CODE END 1 */
102
+  
103
+
104
+  /* MCU Configuration--------------------------------------------------------*/
105
+
106
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
107
+  HAL_Init();
108
+
109
+  /* USER CODE BEGIN Init */
110
+
111
+  /* USER CODE END Init */
112
+
113
+  /* Configure the system clock */
114
+  SystemClock_Config();
115
+
116
+  /* USER CODE BEGIN SysInit */
117
+
118
+  /* USER CODE END SysInit */
119
+
120
+  /* Initialize all configured peripherals */
121
+  MX_GPIO_Init();
122
+  MX_DMA_Init();
123
+  MX_ADC1_Init();
124
+  MX_USART1_UART_Init();
125
+  MX_TIM6_Init();
126
+
127
+  /* Initialize interrupts */
128
+  MX_NVIC_Init();
129
+  /* USER CODE BEGIN 2 */
130
+  setbuf(stdout, NULL);
131
+  printf("UART Start \r\n");
132
+  HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1);
133
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
134
+
135
+  /* USER CODE END 2 */
136
+
137
+  /* Infinite loop */
138
+  /* USER CODE BEGIN WHILE */
139
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
140
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
141
+  while (1)
142
+  {
143
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
144
+    while (TerminalQueue.data > 0 && UartTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
145
+    /* USER CODE END WHILE */
146
+
147
+    /* USER CODE BEGIN 3 */
148
+  }
149
+  /* USER CODE END 3 */
150
+}
151
+
152
+/**
153
+  * @brief System Clock Configuration
154
+  * @retval None
155
+  */
156
+void SystemClock_Config(void)
157
+{
158
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
159
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
160
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
161
+
162
+  /** Initializes the CPU, AHB and APB busses clocks 
163
+  */
164
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
165
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
166
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
167
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
168
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
169
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
170
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
171
+  {
172
+    Error_Handler();
173
+  }
174
+  /** Initializes the CPU, AHB and APB busses clocks 
175
+  */
176
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
177
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
178
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
179
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
180
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
181
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
182
+
183
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
184
+  {
185
+    Error_Handler();
186
+  }
187
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
188
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
189
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
190
+  {
191
+    Error_Handler();
192
+  }
193
+}
194
+
195
+/**
196
+  * @brief NVIC Configuration.
197
+  * @retval None
198
+  */
199
+static void MX_NVIC_Init(void)
200
+{
201
+  /* USART1_IRQn interrupt configuration */
202
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
203
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
204
+  /* TIM6_IRQn interrupt configuration */
205
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
206
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
207
+}
208
+
209
+/**
210
+  * @brief ADC1 Initialization Function
211
+  * @param None
212
+  * @retval None
213
+  */
214
+static void MX_ADC1_Init(void)
215
+{
216
+
217
+  /* USER CODE BEGIN ADC1_Init 0 */
218
+
219
+  /* USER CODE END ADC1_Init 0 */
220
+
221
+  ADC_ChannelConfTypeDef sConfig = {0};
222
+
223
+  /* USER CODE BEGIN ADC1_Init 1 */
224
+
225
+  /* USER CODE END ADC1_Init 1 */
226
+  /** Common config 
227
+  */
228
+  hadc1.Instance = ADC1;
229
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
230
+  hadc1.Init.ContinuousConvMode = ENABLE;
231
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
232
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
233
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
234
+  hadc1.Init.NbrOfConversion = 14;
235
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
236
+  {
237
+    Error_Handler();
238
+  }
239
+  /** Configure Regular Channel 
240
+  */
241
+  sConfig.Channel = ADC_CHANNEL_0;
242
+  sConfig.Rank = ADC_REGULAR_RANK_1;
243
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
244
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
245
+  {
246
+    Error_Handler();
247
+  }
248
+  /** Configure Regular Channel 
249
+  */
250
+  sConfig.Rank = ADC_REGULAR_RANK_2;
251
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
252
+  {
253
+    Error_Handler();
254
+  }
255
+  /** Configure Regular Channel 
256
+  */
257
+  sConfig.Rank = ADC_REGULAR_RANK_3;
258
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
259
+  {
260
+    Error_Handler();
261
+  }
262
+  /** Configure Regular Channel 
263
+  */
264
+  sConfig.Rank = ADC_REGULAR_RANK_4;
265
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
266
+  {
267
+    Error_Handler();
268
+  }
269
+  /** Configure Regular Channel 
270
+  */
271
+  sConfig.Rank = ADC_REGULAR_RANK_5;
272
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
273
+  {
274
+    Error_Handler();
275
+  }
276
+  /** Configure Regular Channel 
277
+  */
278
+  sConfig.Rank = ADC_REGULAR_RANK_6;
279
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
280
+  {
281
+    Error_Handler();
282
+  }
283
+  /** Configure Regular Channel 
284
+  */
285
+  sConfig.Rank = ADC_REGULAR_RANK_7;
286
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
287
+  {
288
+    Error_Handler();
289
+  }
290
+  /** Configure Regular Channel 
291
+  */
292
+  sConfig.Rank = ADC_REGULAR_RANK_8;
293
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
294
+  {
295
+    Error_Handler();
296
+  }
297
+  /** Configure Regular Channel 
298
+  */
299
+  sConfig.Rank = ADC_REGULAR_RANK_9;
300
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
301
+  {
302
+    Error_Handler();
303
+  }
304
+  /** Configure Regular Channel 
305
+  */
306
+  sConfig.Rank = ADC_REGULAR_RANK_10;
307
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
308
+  {
309
+    Error_Handler();
310
+  }
311
+  /** Configure Regular Channel 
312
+  */
313
+  sConfig.Rank = ADC_REGULAR_RANK_11;
314
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
315
+  {
316
+    Error_Handler();
317
+  }
318
+  /** Configure Regular Channel 
319
+  */
320
+  sConfig.Rank = ADC_REGULAR_RANK_12;
321
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
322
+  {
323
+    Error_Handler();
324
+  }
325
+  /** Configure Regular Channel 
326
+  */
327
+  sConfig.Rank = ADC_REGULAR_RANK_13;
328
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
329
+  {
330
+    Error_Handler();
331
+  }
332
+  /** Configure Regular Channel 
333
+  */
334
+  sConfig.Rank = ADC_REGULAR_RANK_14;
335
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
336
+  {
337
+    Error_Handler();
338
+  }
339
+  /* USER CODE BEGIN ADC1_Init 2 */
340
+
341
+  /* USER CODE END ADC1_Init 2 */
342
+
343
+}
344
+
345
+/**
346
+  * @brief TIM6 Initialization Function
347
+  * @param None
348
+  * @retval None
349
+  */
350
+static void MX_TIM6_Init(void)
351
+{
352
+
353
+  /* USER CODE BEGIN TIM6_Init 0 */
354
+
355
+  /* USER CODE END TIM6_Init 0 */
356
+
357
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
358
+
359
+  /* USER CODE BEGIN TIM6_Init 1 */
360
+
361
+  /* USER CODE END TIM6_Init 1 */
362
+  htim6.Instance = TIM6;
363
+  htim6.Init.Prescaler = 6000-1;
364
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
365
+  htim6.Init.Period = 10;
366
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
367
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
368
+  {
369
+    Error_Handler();
370
+  }
371
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
372
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
373
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
374
+  {
375
+    Error_Handler();
376
+  }
377
+  /* USER CODE BEGIN TIM6_Init 2 */
378
+
379
+  /* USER CODE END TIM6_Init 2 */
380
+
381
+}
382
+
383
+/**
384
+  * @brief USART1 Initialization Function
385
+  * @param None
386
+  * @retval None
387
+  */
388
+static void MX_USART1_UART_Init(void)
389
+{
390
+
391
+  /* USER CODE BEGIN USART1_Init 0 */
392
+
393
+  /* USER CODE END USART1_Init 0 */
394
+
395
+  /* USER CODE BEGIN USART1_Init 1 */
396
+
397
+  /* USER CODE END USART1_Init 1 */
398
+  huart1.Instance = USART1;
399
+  huart1.Init.BaudRate = 115200;
400
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
401
+  huart1.Init.StopBits = UART_STOPBITS_1;
402
+  huart1.Init.Parity = UART_PARITY_NONE;
403
+  huart1.Init.Mode = UART_MODE_TX_RX;
404
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
405
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
406
+  if (HAL_UART_Init(&huart1) != HAL_OK)
407
+  {
408
+    Error_Handler();
409
+  }
410
+  /* USER CODE BEGIN USART1_Init 2 */
411
+
412
+  /* USER CODE END USART1_Init 2 */
413
+
414
+}
415
+
416
+/** 
417
+  * Enable DMA controller clock
418
+  */
419
+static void MX_DMA_Init(void) 
420
+{
421
+  /* DMA controller clock enable */
422
+  __HAL_RCC_DMA1_CLK_ENABLE();
423
+
424
+  /* DMA interrupt init */
425
+  /* DMA1_Channel1_IRQn interrupt configuration */
426
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
427
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
428
+  /* DMA1_Channel5_IRQn interrupt configuration */
429
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
430
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
431
+
432
+}
433
+
434
+/**
435
+  * @brief GPIO Initialization Function
436
+  * @param None
437
+  * @retval None
438
+  */
439
+static void MX_GPIO_Init(void)
440
+{
441
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
442
+
443
+  /* GPIO Ports Clock Enable */
444
+  __HAL_RCC_GPIOE_CLK_ENABLE();
445
+  __HAL_RCC_GPIOC_CLK_ENABLE();
446
+  __HAL_RCC_GPIOF_CLK_ENABLE();
447
+  __HAL_RCC_GPIOA_CLK_ENABLE();
448
+  __HAL_RCC_GPIOB_CLK_ENABLE();
449
+  __HAL_RCC_GPIOD_CLK_ENABLE();
450
+  __HAL_RCC_GPIOG_CLK_ENABLE();
451
+
452
+  /*Configure GPIO pin Output Level */
453
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
454
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
455
+
456
+  /*Configure GPIO pin Output Level */
457
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
458
+                          |PLL_EN_3_5G_H_Pin, GPIO_PIN_RESET);
459
+
460
+  /*Configure GPIO pin Output Level */
461
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
462
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
463
+
464
+  /*Configure GPIO pin Output Level */
465
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
466
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
467
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
468
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
469
+
470
+  /*Configure GPIO pin Output Level */
471
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
472
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
473
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin, GPIO_PIN_RESET);
474
+
475
+  /*Configure GPIO pin Output Level */
476
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
477
+
478
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
479
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
480
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
481
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
482
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
483
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
484
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
485
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
486
+
487
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
488
+                           PLL_EN_3_5G_H_Pin */
489
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
490
+                          |PLL_EN_3_5G_H_Pin;
491
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
492
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
493
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
494
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
495
+
496
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
497
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
498
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
499
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
500
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
501
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
502
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
503
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
504
+
505
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
506
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
507
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
508
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
509
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
510
+
511
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
512
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
513
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
514
+                           PATH_EN_3_5G_L_Pin */
515
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
516
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
517
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
518
+                          |PATH_EN_3_5G_L_Pin;
519
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
520
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
521
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
522
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
523
+
524
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
525
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
526
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
527
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
528
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
529
+
530
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
531
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_DL_Pin 
532
+                           PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_L_Pin PLL_ON_OFF_3_5G_H_Pin BOOT_LED_Pin */
533
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
534
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
535
+                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin|BOOT_LED_Pin;
536
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
537
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
538
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
539
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
540
+
541
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
542
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
543
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
544
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
545
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
546
+
547
+  /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */
548
+  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
549
+  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
550
+  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
551
+
552
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
553
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
554
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
555
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
556
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
557
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
558
+
559
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
560
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
561
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
562
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
563
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
564
+
565
+}
566
+
567
+/* USER CODE BEGIN 4 */
568
+
569
+/* USER CODE END 4 */
570
+
571
+/**
572
+  * @brief  This function is executed in case of error occurrence.
573
+  * @retval None
574
+  */
575
+void Error_Handler(void)
576
+{
577
+  /* USER CODE BEGIN Error_Handler_Debug */
578
+  /* User can add his own implementation to report the HAL error return state */
579
+
580
+  /* USER CODE END Error_Handler_Debug */
581
+}
582
+
583
+#ifdef  USE_FULL_ASSERT
584
+/**
585
+  * @brief  Reports the name of the source file and the source line number
586
+  *         where the assert_param error has occurred.
587
+  * @param  file: pointer to the source file name
588
+  * @param  line: assert_param error line source number
589
+  * @retval None
590
+  */
591
+void assert_failed(uint8_t *file, uint32_t line)
592
+{ 
593
+  /* USER CODE BEGIN 6 */
594
+  /* User can add his own implementation to report the file name and line number,
595
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
596
+  /* USER CODE END 6 */
597
+}
598
+#endif /* USE_FULL_ASSERT */
599
+
600
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

File diff suppressed because it is too large
+ 2556 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/stm32f1xx_hal_uart(7306).c


+ 88 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/uart(5982).c

@@ -0,0 +1,88 @@
1
+/*
2
+ * uart.c
3
+ *
4
+ *  Created on: 2019. 5. 27.
5
+ *      Author: parkyj
6
+ */
7
+
8
+#include "uart.h"
9
+
10
+UARTQUEUE TerminalQueue;
11
+UARTQUEUE WifiQueue;
12
+
13
+void InitUartQueue(pUARTQUEUE pQueue)
14
+{
15
+    pQueue->data = pQueue->head = pQueue->tail = 0;
16
+
17
+    if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
18
+    {
19
+      //_Error_Handler(__FILE__, __LINE__);
20
+    }
21
+    //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
22
+    //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
23
+}
24
+
25
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
26
+{
27
+    pUARTQUEUE pQueue;
28
+//    printf("Function : %s : \r\n",__func__);
29
+    UartTimerCnt = 0;
30
+    pQueue = &TerminalQueue;
31
+    pQueue->head++;
32
+    if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0;
33
+    pQueue->data++;
34
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
35
+        GetDataFromUartQueue(huart);
36
+    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
37
+   // Set_UartRcv(true);
38
+}
39
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data)
40
+{
41
+    pUARTQUEUE pQueue = &TerminalQueue;
42
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
43
+        GetDataFromUartQueue(huart);
44
+    pQueue->Buffer[pQueue->head++] = data;
45
+    if (pQueue->head == QUEUE_BUFFER_LENGTH) pQueue->head = 0;
46
+    pQueue->data++;
47
+   // HAL_UART_Receive_DMA(&hTerminal,  pQueue->Buffer + pQueue->head, 10);
48
+}
49
+
50
+void GetDataFromUartQueue(UART_HandleTypeDef *huart)
51
+{
52
+    volatile static int cnt;
53
+    volatile static int uart_buf[QUEUE_BUFFER_LENGTH];
54
+    
55
+//    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
56
+    UART_HandleTypeDef *dst = &hTerminal;
57
+    pUARTQUEUE pQueue = &TerminalQueue;
58
+//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
59
+//    {
60
+//       _Error_Handler(__FILE__, __LINE__);
61
+//    }
62
+    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail);        
63
+    pQueue->tail++;
64
+    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
65
+    pQueue->data--;
66
+    
67
+    if(pQueue->data == 0){
68
+        RF_Ctrl_Main(&uart_buf[0]);
69
+//        HAL_UART_Transmit(dst, &temp_buf[BLUECELL_HEADER00], 11, 3000);
70
+#if 1 // PYJ.2019.07.15_BEGIN -- 
71
+            for(int i = 0; i < cnt; i++){
72
+                printf("%02x ",uart_buf[i]);
73
+            }
74
+#endif // PYJ.2019.07.15_END -- 
75
+        cnt = 0;
76
+        
77
+        for(int i  = 0; i < QUEUE_BUFFER_LENGTH; i++)
78
+            uart_buf[i] = 0;
79
+        
80
+        HAL_Delay(1);
81
+    }
82
+
83
+}
84
+
85
+void Uart1_Data_Send(uint8_t* data,uint8_t size){
86
+    HAL_UART_Transmit(&huart1, data,size, 10); 
87
+}
88
+

+ 32 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/uart(7113).h

@@ -0,0 +1,32 @@
1
+/*
2
+ * uart.h
3
+ *
4
+ *  Created on: 2019. 5. 27.
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef UART_H_
9
+#define UART_H_
10
+
11
+#include "main.h"
12
+
13
+#define hTerminal    huart1
14
+
15
+#define QUEUE_BUFFER_LENGTH 1024
16
+
17
+typedef struct
18
+{
19
+    int head, tail, data;
20
+    uint8_t Buffer[QUEUE_BUFFER_LENGTH];
21
+}UARTQUEUE, *pUARTQUEUE;
22
+
23
+extern UART_HandleTypeDef huart1;
24
+
25
+extern UARTQUEUE TerminalQueue;
26
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data);
27
+void InitUartQueue(pUARTQUEUE pQueue);
28
+void GetDataFromUartQueue(UART_HandleTypeDef *huart);
29
+bool Get_UartRcv(void);
30
+void Set_UartRcv(bool);
31
+
32
+#endif /* UART_H_ */

+ 268 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(3081).c

@@ -0,0 +1,268 @@
1
+/*
2
+ * zig_operate.c
3
+ *
4
+ *  Created on: 2019. 7. 26.
5
+ *      Author: parkyj
6
+ */
7
+#include "zig_operate.h"
8
+
9
+/* * * * * * * #define Struct* * * * * * * */
10
+PLL_Setting_st Pll_1_8GHz_DL = {
11
+	PLL_CLK_GPIO_Port,
12
+	PLL_CLK_Pin,
13
+	PLL_DATA_GPIO_Port,
14
+	PLL_DATA_Pin,
15
+    PLL_EN_1_8G_DL_GPIO_Port,    
16
+    PLL_EN_1_8G_DL_Pin,
17
+};
18
+PLL_Setting_st Pll_1_8GHz_UL = {
19
+    PLL_CLK_GPIO_Port,
20
+    PLL_CLK_Pin,
21
+    PLL_DATA_GPIO_Port,
22
+    PLL_DATA_Pin,
23
+    PLL_EN_1_8G_UL_GPIO_Port,    
24
+    PLL_EN_1_8G_UL_Pin,
25
+};
26
+PLL_Setting_st Pll_2_1GHz_DL = {
27
+    PLL_CLK_GPIO_Port,
28
+    PLL_CLK_Pin,
29
+    PLL_DATA_GPIO_Port,
30
+    PLL_DATA_Pin,
31
+    PLL_EN_2_1G_DL_GPIO_Port,    
32
+    PLL_EN_2_1G_DL_Pin,
33
+};
34
+PLL_Setting_st Pll_2_1GHz_UL = {
35
+    PLL_CLK_GPIO_Port,
36
+    PLL_CLK_Pin,
37
+    PLL_DATA_GPIO_Port,
38
+    PLL_DATA_Pin,
39
+    PLL_EN_2_1G_UL_GPIO_Port,    
40
+    PLL_EN_2_1G_UL_Pin,
41
+};
42
+/* * * * * * * * NOT YET * * * * * * * */
43
+PLL_Setting_st Pll_3_5GHz_DL = {
44
+    ATT_CLK_3_5G_GPIO_Port,
45
+    ATT_EN_3_5G_Pin,
46
+    PLL_DATA_GPIO_Port,
47
+    PLL_DATA_Pin,
48
+    PLL_EN_2_1G_DL_GPIO_Port,    
49
+    PLL_EN_2_1G_DL_Pin,
50
+};
51
+PLL_Setting_st Pll_3_5GHz_UL = {
52
+    PLL_CLK_GPIO_Port,
53
+    PLL_CLK_Pin,
54
+    PLL_DATA_GPIO_Port,
55
+    PLL_DATA_Pin,
56
+    PLL_EN_2_1G_UL_GPIO_Port,    
57
+    PLL_EN_2_1G_UL_Pin,
58
+};
59
+/* * * * * * * * ATTEN * * * * * * * */    
60
+ATTEN_Setting_st Atten_1_8Ghz_DL1 ={
61
+    ATT_CLK_GPIO_Port,
62
+    ATT_CLK_Pin,
63
+    ATT_DATA_GPIO_Port,
64
+    ATT_DATA_Pin,
65
+    ATT_EN_1_8G_DL1_GPIO_Port,    
66
+    ATT_EN_1_8G_DL1_Pin,
67
+    PATH_EN_1_8G_DL_GPIO_Port,
68
+    PATH_EN_1_8G_DL_Pin,
69
+};
70
+
71
+ATTEN_Setting_st Atten_1_8Ghz_DL2 ={
72
+    ATT_CLK_GPIO_Port,
73
+    ATT_CLK_Pin,
74
+    ATT_DATA_GPIO_Port,
75
+    ATT_DATA_Pin,
76
+    ATT_EN_1_8G_DL2_GPIO_Port,    
77
+    ATT_EN_1_8G_DL2_Pin,
78
+    PATH_EN_1_8G_DL_GPIO_Port,
79
+    PATH_EN_1_8G_DL_Pin,    
80
+};
81
+ATTEN_Setting_st Atten_1_8Ghz_UL1 ={
82
+    ATT_CLK_GPIO_Port,
83
+    ATT_CLK_Pin,
84
+    ATT_DATA_GPIO_Port,
85
+    ATT_DATA_Pin,
86
+    ATT_EN_1_8G_UL1_GPIO_Port,    
87
+    ATT_EN_1_8G_UL1_Pin,
88
+    PATH_EN_1_8G_UL_GPIO_Port,
89
+    PATH_EN_1_8G_UL_Pin,      
90
+};
91
+ATTEN_Setting_st Atten_1_8Ghz_UL2 ={
92
+    ATT_CLK_GPIO_Port,
93
+    ATT_CLK_Pin,
94
+    ATT_DATA_GPIO_Port,
95
+    ATT_DATA_Pin,
96
+    ATT_EN_1_8G_UL2_GPIO_Port,    
97
+    ATT_EN_1_8G_UL2_Pin,
98
+    PATH_EN_1_8G_UL_GPIO_Port,
99
+    PATH_EN_1_8G_UL_Pin,    
100
+};
101
+ATTEN_Setting_st Atten_1_8Ghz_UL3 ={
102
+    ATT_CLK_GPIO_Port,
103
+    ATT_CLK_Pin,
104
+    ATT_DATA_GPIO_Port,
105
+    ATT_DATA_Pin,
106
+    ATT_EN_1_8G_UL3_GPIO_Port,    
107
+    ATT_EN_1_8G_UL3_Pin,
108
+    PATH_EN_1_8G_UL_GPIO_Port,
109
+    PATH_EN_1_8G_UL_Pin,    
110
+};
111
+ATTEN_Setting_st Atten_1_8Ghz_UL4 ={
112
+    ATT_CLK_GPIO_Port,
113
+    ATT_CLK_Pin,
114
+    ATT_DATA_GPIO_Port,
115
+    ATT_DATA_Pin,
116
+    ATT_EN_1_8G_UL4_GPIO_Port,    
117
+    ATT_EN_1_8G_UL4_Pin,
118
+    PATH_EN_1_8G_UL_GPIO_Port,
119
+    PATH_EN_1_8G_UL_Pin,    
120
+};
121
+ATTEN_Setting_st Atten_2_1Ghz_DL1 ={
122
+    ATT_CLK_GPIO_Port,
123
+    ATT_CLK_Pin,
124
+    ATT_DATA_GPIO_Port,
125
+    ATT_DATA_Pin,
126
+    ATT_EN_2_1G_DL1_GPIO_Port,    
127
+    ATT_EN_2_1G_DL1_Pin,
128
+    PATH_EN_2_1G_DL_GPIO_Port,
129
+    PATH_EN_2_1G_DL_Pin,    
130
+};
131
+ATTEN_Setting_st Atten_2_1Ghz_DL2 ={
132
+    ATT_CLK_GPIO_Port,
133
+    ATT_CLK_Pin,
134
+    ATT_DATA_GPIO_Port,
135
+    ATT_DATA_Pin,
136
+    ATT_EN_2_1G_DL2_GPIO_Port,    
137
+    ATT_EN_2_1G_DL2_Pin,
138
+    PATH_EN_2_1G_DL_GPIO_Port,
139
+    PATH_EN_2_1G_DL_Pin,    
140
+};
141
+
142
+ATTEN_Setting_st Atten_2_1Ghz_UL1 ={
143
+    ATT_CLK_GPIO_Port,
144
+    ATT_CLK_Pin,
145
+    ATT_DATA_GPIO_Port,
146
+    ATT_DATA_Pin,
147
+    ATT_EN_2_1G_UL1_GPIO_Port,    
148
+    ATT_EN_2_1G_UL1_Pin,
149
+    PATH_EN_2_1G_UL_GPIO_Port,
150
+    PATH_EN_2_1G_UL_Pin,    
151
+};
152
+ATTEN_Setting_st Atten_2_1Ghz_UL2 ={
153
+    ATT_CLK_GPIO_Port,
154
+    ATT_CLK_Pin,
155
+    ATT_DATA_GPIO_Port,
156
+    ATT_DATA_Pin,
157
+    ATT_EN_2_1G_UL2_GPIO_Port,    
158
+    ATT_EN_2_1G_UL2_Pin,
159
+    PATH_EN_2_1G_UL_GPIO_Port,
160
+    PATH_EN_2_1G_UL_Pin,    
161
+};
162
+ATTEN_Setting_st Atten_2_1Ghz_UL3 ={
163
+    ATT_CLK_GPIO_Port,
164
+    ATT_CLK_Pin,
165
+    ATT_DATA_GPIO_Port,
166
+    ATT_DATA_Pin,
167
+    ATT_EN_2_1G_UL3_GPIO_Port,    
168
+    ATT_EN_2_1G_UL3_Pin,
169
+    PATH_EN_2_1G_UL_GPIO_Port,
170
+    PATH_EN_2_1G_UL_Pin,    
171
+};
172
+ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
173
+    ATT_CLK_GPIO_Port,
174
+    ATT_CLK_Pin,
175
+    ATT_DATA_GPIO_Port,
176
+    ATT_DATA_Pin,
177
+    ATT_EN_2_1G_UL4_GPIO_Port,    
178
+    ATT_EN_2_1G_UL4_Pin,
179
+    PATH_EN_2_1G_UL_GPIO_Port,
180
+    PATH_EN_2_1G_UL_Pin,    
181
+};
182
+
183
+typedef enum{
184
+    TYPE_BLUECELL_RESET = 0,
185
+    TYPE_ATT_1_8GHz_DL1 = 1,
186
+    TYPE_ATT_1_8GHz_DL2,
187
+
188
+    TYPE_ATT_1_8GHz_UL1,
189
+    TYPE_ATT_1_8GHz_UL2,
190
+    TYPE_ATT_1_8GHz_UL3, //5
191
+    TYPE_ATT_1_8GHz_UL4,
192
+    
193
+    TYPE_ATT_2_1GHz_DL1,
194
+    TYPE_ATT_2_1GHz_DL2,
195
+
196
+    TYPE_ATT_2_1GHz_UL1,
197
+    TYPE_ATT_2_1GHz_UL2, // 10
198
+    TYPE_ATT_2_1GHz_UL3,
199
+    TYPE_ATT_2_1GHz_UL4,    
200
+
201
+
202
+    TYPE_ATT_3_5GHz_DL,
203
+    TYPE_ATT_3_5GHz_UL,
204
+    TYPE_ATT_3_5GHz_COM1, // 15
205
+    TYPE_ATT_3_5GHz_COM2,
206
+    TYPE_ATT_3_5GHz_COM3,      
207
+}Bluecell_Prot_t;
208
+   typedef enum{
209
+    Header = 0,
210
+    Length,
211
+    Type,
212
+    Crcindex,
213
+}Bluecell_Prot_p;
214
+
215
+bool RF_Data_Check(uint8_t* data_buf){
216
+    bool ret = false;
217
+    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[Crcindex]);
218
+    
219
+    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
220
+        ret= true;
221
+    }
222
+    if(crcret == true){/*CRC CHECK*/
223
+        ret = true;
224
+    }
225
+
226
+    return ret;
227
+
228
+}
229
+bool RF_Ctrl_Main(uint8_t* data_buf){
230
+    bool ret = false;
231
+    Bluecell_Prot_t type = data_buf[Type];
232
+    RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
233
+
234
+
235
+    
236
+    switch(type){
237
+    case TYPE_BLUECELL_RESET: 
238
+        printf("Reset Start \r\n");
239
+        NVIC_SystemReset();
240
+        break;
241
+    case TYPE_ATT_1_8GHz_DL1:  
242
+        printf("");
243
+        break;
244
+    case TYPE_ATT_1_8GHz_DL2:   break;
245
+
246
+    case TYPE_ATT_1_8GHz_UL1:   break;
247
+    case TYPE_ATT_1_8GHz_UL2:   break;
248
+    case TYPE_ATT_1_8GHz_UL3: break;//5
249
+    case TYPE_ATT_1_8GHz_UL4:break;
250
+
251
+    case TYPE_ATT_2_1GHz_DL1:break;
252
+    case TYPE_ATT_2_1GHz_DL2:break;
253
+
254
+    case TYPE_ATT_2_1GHz_UL1:break;
255
+    case TYPE_ATT_2_1GHz_UL2: break;// 10
256
+    case TYPE_ATT_2_1GHz_UL3:break;
257
+    case TYPE_ATT_2_1GHz_UL4:    break;
258
+    case TYPE_ATT_3_5GHz_DL:break;
259
+    case TYPE_ATT_3_5GHz_UL:break;
260
+    case TYPE_ATT_3_5GHz_COM1: break;// 15
261
+    case TYPE_ATT_3_5GHz_COM2:break;
262
+    case TYPE_ATT_3_5GHz_COM3:   break;
263
+        default:
264
+            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
265
+            break;
266
+    }
267
+    return ret;
268
+}

BIN
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BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xm


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.siwork


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Device_ST_STM32F1xx_Include_stm32f103xe.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Device_ST_STM32F1xx_Include_stm32f1xx.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Device_ST_STM32F1xx_Include_system_stm32f1xx.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_arm_common_tables.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_arm_const_structs.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_arm_math.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_cmsis_armcc.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_cmsis_armcc_V6.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_cmsis_gcc.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cm0.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cm0plus.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cm3.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cm4.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cm7.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cmFunc.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cmInstr.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cmSimd.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_sc000.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_sc300.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_Legacy_stm32_hal_legacy.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_adc.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_adc_ex.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_cortex.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_def.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_dma.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_dma_ex.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_flash.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_flash_ex.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_gpio.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_gpio_ex.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_pwr.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_rcc.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_rcc_ex.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_tim.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_tim_ex.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_uart.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_adc.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_adc_ex.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_cortex.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_dma.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_flash.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_flash_ex.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_gpio.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_gpio_ex.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_pwr.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_rcc.c.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_rcc_ex.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_tim.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_tim_ex.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Src_stm32f1xx_hal_uart.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_BDA4601.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_CRC16.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_PE43711.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_adf4153.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_main.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_hal_conf.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_stm32f1xx_it.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_uart.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_zig_operate.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_BDA4601.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_CRC16.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_PE43711.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_adf4153.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_main.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_hal_msp.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_stm32f1xx_it.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_syscalls.c.sisc


+ 0 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_system_stm32f1xx.c.sisc


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