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기존 변경 사항 3.5G Low에도 적용

YJ 5 anni fa
parent
commit
b9f5d6b338

+ 1 - 1
Src/zig_operate.c

@@ -405,7 +405,7 @@ void RF_Operate(uint8_t* data_buf){
405 405
                    (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
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                    (data_buf[INDEX_PLL_3_5G_LOW_L]);
407 407
 #if 1 // PYJ.2019.08.12_BEGIN -- 
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-        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
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+        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
409 409
 #else
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         temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
411 411
 #endif // PYJ.2019.08.12_END -- 

+ 769 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(4854).c

@@ -0,0 +1,769 @@
1
+/*
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+ * zig_operate.c
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+ *
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+ *  Created on: 2019. 7. 26.
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+ *      Author: parkyj
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+ */
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+#include "zig_operate.h"
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+#include "main.h"
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+#include "pll_4113.h"
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+#include "ADF4153.h"
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+#include "PE43711.h"
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+#include "BDA4601.h"
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+#include "uart.h"
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+#include "CRC16.h"
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+extern void AD5318_Ctrl(uint16_t ShiftTarget) ;
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+extern etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum);
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+extern void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
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+extern bool Bluecell_Flash_Read(uint8_t* data);
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+extern void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT);
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+extern void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
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+extern uint8_t Bluecell_Flash_Write(uint8_t* data);
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+uint8_t Prev_data[INDEX_BLUE_EOF + 1];
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+uint8_t Flash_Save_data[INDEX_BLUE_EOF + 1];
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+
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+
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+/* * * * * * * #define Struct* * * * * * * */
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+PLL_Setting_st Pll_1_8GHz_DL = {
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+  PLL_CLK_GPIO_Port,
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+  PLL_CLK_Pin,
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+  PLL_DATA_GPIO_Port,
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+  PLL_DATA_Pin,
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+  PLL_EN_1_8G_DL_GPIO_Port,    
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+  PLL_EN_1_8G_DL_Pin,
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+};
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+PLL_Setting_st Pll_1_8GHz_UL = {
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+    PLL_CLK_GPIO_Port,
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+    PLL_CLK_Pin,
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+    PLL_DATA_GPIO_Port,
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+    PLL_DATA_Pin,
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+    PLL_EN_1_8G_UL_GPIO_Port,    
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+    PLL_EN_1_8G_UL_Pin,
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+};
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+PLL_Setting_st Pll_2_1GHz_DL = {
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+    PLL_CLK_GPIO_Port,
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+    PLL_CLK_Pin,
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+    PLL_DATA_GPIO_Port,
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+    PLL_DATA_Pin,
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+    PLL_EN_2_1G_DL_GPIO_Port,    
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+    PLL_EN_2_1G_DL_Pin,
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+};
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+PLL_Setting_st Pll_2_1GHz_UL = {
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+    PLL_CLK_GPIO_Port,
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+    PLL_CLK_Pin,
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+    PLL_DATA_GPIO_Port,
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+    PLL_DATA_Pin,
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+    PLL_EN_2_1G_UL_GPIO_Port,    
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+    PLL_EN_2_1G_UL_Pin,
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+};
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+/* * * * * * * * NOT YET * * * * * * * */
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+PLL_Setting_st Pll_3_5GHz_DL = {
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+    ATT_CLK_3_5G_GPIO_Port,
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+    ATT_EN_3_5G_Pin,
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+    PLL_DATA_GPIO_Port,
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+    PLL_DATA_Pin,
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+    PLL_EN_2_1G_DL_GPIO_Port,    
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+    PLL_EN_2_1G_DL_Pin,
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+};
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+PLL_Setting_st Pll_3_5GHz_UL = {
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+    PLL_CLK_GPIO_Port,
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+    PLL_CLK_Pin,
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+    PLL_DATA_GPIO_Port,
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+    PLL_DATA_Pin,
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+    PLL_EN_2_1G_UL_GPIO_Port,    
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+    PLL_EN_2_1G_UL_Pin,
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+};
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+/* * * * * * * * ATTEN * * * * * * * */    
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+ATTEN_Setting_st Atten_1_8Ghz_DL1 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_1_8G_DL1_GPIO_Port,    
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+    ATT_EN_1_8G_DL1_Pin,
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+    PATH_EN_1_8G_DL_GPIO_Port,
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+    PATH_EN_1_8G_DL_Pin,
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+};
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+
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+ATTEN_Setting_st Atten_1_8Ghz_DL2 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_1_8G_DL2_GPIO_Port,    
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+    ATT_EN_1_8G_DL2_Pin,
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+    PATH_EN_1_8G_DL_GPIO_Port,
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+    PATH_EN_1_8G_DL_Pin,    
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+};
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+ATTEN_Setting_st Atten_1_8Ghz_UL1 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_1_8G_UL1_GPIO_Port,    
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+    ATT_EN_1_8G_UL1_Pin,
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+    PATH_EN_1_8G_UL_GPIO_Port,
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+    PATH_EN_1_8G_UL_Pin,      
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+};
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+ATTEN_Setting_st Atten_1_8Ghz_UL2 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_1_8G_UL2_GPIO_Port,    
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+    ATT_EN_1_8G_UL2_Pin,
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+    PATH_EN_1_8G_UL_GPIO_Port,
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+    PATH_EN_1_8G_UL_Pin,    
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+};
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+ATTEN_Setting_st Atten_1_8Ghz_UL3 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_1_8G_UL3_GPIO_Port,    
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+    ATT_EN_1_8G_UL3_Pin,
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+    PATH_EN_1_8G_UL_GPIO_Port,
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+    PATH_EN_1_8G_UL_Pin,    
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+};
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+ATTEN_Setting_st Atten_1_8Ghz_UL4 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_1_8G_UL4_GPIO_Port,    
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+    ATT_EN_1_8G_UL4_Pin,
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+    PATH_EN_1_8G_UL_GPIO_Port,
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+    PATH_EN_1_8G_UL_Pin,    
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+};
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+ATTEN_Setting_st Atten_2_1Ghz_DL1 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_2_1G_DL1_GPIO_Port,    
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+    ATT_EN_2_1G_DL1_Pin,
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+    PATH_EN_2_1G_DL_GPIO_Port,
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+    PATH_EN_2_1G_DL_Pin,    
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+};
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+ATTEN_Setting_st Atten_2_1Ghz_DL2 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_2_1G_DL2_GPIO_Port,    
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+    ATT_EN_2_1G_DL2_Pin,
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+    PATH_EN_2_1G_DL_GPIO_Port,
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+    PATH_EN_2_1G_DL_Pin,    
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+};
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+
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+ATTEN_Setting_st Atten_2_1Ghz_UL1 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_2_1G_UL1_GPIO_Port,    
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+    ATT_EN_2_1G_UL1_Pin,
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+    PATH_EN_2_1G_UL_GPIO_Port,
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+    PATH_EN_2_1G_UL_Pin,    
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+};
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+ATTEN_Setting_st Atten_2_1Ghz_UL2 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_2_1G_UL2_GPIO_Port,    
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+    ATT_EN_2_1G_UL2_Pin,
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+    PATH_EN_2_1G_UL_GPIO_Port,
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+    PATH_EN_2_1G_UL_Pin,    
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+};
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+ATTEN_Setting_st Atten_2_1Ghz_UL3 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_2_1G_UL3_GPIO_Port,    
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+    ATT_EN_2_1G_UL3_Pin,
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+    PATH_EN_2_1G_UL_GPIO_Port,
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+    PATH_EN_2_1G_UL_Pin,    
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+};
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+ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
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+    ATT_CLK_GPIO_Port,
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+    ATT_CLK_Pin,
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+    ATT_DATA_GPIO_Port,
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+    ATT_DATA_Pin,
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+    ATT_EN_2_1G_UL4_GPIO_Port,    
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+    ATT_EN_2_1G_UL4_Pin,
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+    PATH_EN_2_1G_UL_GPIO_Port,
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+    PATH_EN_2_1G_UL_Pin,    
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+};
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+
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+
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+bool RF_Data_Check(uint8_t* data_buf){
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+    bool ret = false;
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+    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
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+    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
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+        ret= true;
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+    }
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+    if(crcret == true){/*CRC CHECK*/
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+        ret = true;
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+    }else{
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+        ret = false;
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+//        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
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+    }
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+//    printf("CRC Result : \"%d\"   \r\n",ret);
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+    return ret;
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+
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+}
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+
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+PLL_Setting_st Pll_3_5_H = {
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+     PLL_CLK_3_5G_GPIO_Port,
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+     PLL_CLK_3_5G_Pin,
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+     PLL_DATA_3_5G_GPIO_Port,
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+     PLL_DATA_3_5G_Pin,
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+   PLL_EN_3_5G_H_GPIO_Port,    
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+   PLL_EN_3_5G_H_Pin,
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+ };
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+ PLL_Setting_st Pll_3_5_L = {
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+     PLL_CLK_3_5G_GPIO_Port,
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+     PLL_CLK_3_5G_Pin,
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+     PLL_DATA_3_5G_GPIO_Port,
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+     PLL_DATA_3_5G_Pin,
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+       PLL_EN_3_5G_L_GPIO_Port,    
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+       PLL_EN_3_5G_L_Pin,
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+ };
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+void RF_Status_Get(void){
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+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
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+    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
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+    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
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+    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
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+    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
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+    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
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+    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
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+    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
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+//    printf("\r\nYJ : %x",ADCvalue[0]);
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+//    printf("\r\n");
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+
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+}
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+static uint8_t Ack_Buf[6];
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+void RF_Status_Ack(void){
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+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
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+    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
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+    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
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+    Ack_Buf[INDEX_BLUE_LENGTH]       = 3;
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+    Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1;
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+    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
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+    Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER;
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+    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
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+//    printf("\r\nYJ : %x",ADCvalue[0]);
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+//    printf("\r\n");
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+
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+}
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+
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+void RF_Operate(uint8_t* data_buf){
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+    uint32_t temp_val = 0;
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+    uint8_t  ADC_Modify = 0;
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+    ADF4153_R_N_Reg_st temp_reg;
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+//    printf("Prev_data[INDEX_ATT_1_8G_DL1]  : %x  data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]);
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+    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
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+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
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+        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
270
+    }
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+    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
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+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
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+        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
274
+    }
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+    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
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+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
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+        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
278
+    }
279
+    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
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+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
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+        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
282
+    }
283
+    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
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+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
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+        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
286
+    }
287
+    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
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+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
289
+        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
290
+    }
291
+    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
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+        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
293
+        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
294
+
295
+    }
296
+    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
297
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
298
+        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
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+
300
+    }
301
+    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
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+        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
303
+        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
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+
305
+    }
306
+    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
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+        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
308
+        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
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+
310
+    }
311
+    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
312
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
313
+        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
314
+    }
315
+    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
316
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
317
+        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
318
+    }
319
+    if(   (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1])
320
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1])
321
+        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
322
+        ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2])
323
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2])
324
+        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
325
+    ){
326
+        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1]  = data_buf[INDEX_ATT_3_5G_LOW1];
327
+        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
328
+        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
329
+        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
330
+        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
331
+        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
332
+        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
333
+    }
334
+    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
335
+        || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
336
+    ){
337
+        Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H];
338
+        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
339
+//        printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]);
340
+//        printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]);
341
+        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
342
+        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
343
+//        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092);
344
+        HAL_Delay(1);
345
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
346
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
347
+    }
348
+    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
349
+        || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
350
+        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
351
+//        printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]);
352
+//        printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]);
353
+        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
354
+        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
355
+//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
356
+         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
357
+//        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092);
358
+
359
+        HAL_Delay(1);
360
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
361
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
362
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
363
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
364
+    }
365
+    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
366
+        || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
367
+        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
368
+//        printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]);
369
+//        printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]);
370
+        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
371
+        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
372
+//         ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
373
+      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
374
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092);
375
+
376
+      HAL_Delay(1);
377
+      BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
378
+      BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
379
+    }
380
+    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
381
+        || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
382
+        Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H];
383
+        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];    
384
+//        printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]);
385
+//        printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]);
386
+        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
387
+//        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
388
+      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
389
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092);
390
+      HAL_Delay(1);
391
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
392
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
393
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));      
394
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));      
395
+
396
+
397
+    }
398
+    if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H])
399
+        ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M])
400
+        || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){
401
+        Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H];
402
+        Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M];        
403
+        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
404
+        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
405
+                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
406
+                   (data_buf[INDEX_PLL_3_5G_LOW_L]);
407
+#if 1 // PYJ.2019.08.12_BEGIN -- 
408
+        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
409
+#else
410
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
411
+#endif // PYJ.2019.08.12_END -- 
412
+//        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
413
+      ADF4153_Module_Ctrl(Pll_3_5_L,0x385E48,0x163001,0x1442,3);
414
+
415
+    }
416
+    if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H])
417
+        || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M])
418
+        || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){
419
+        Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H];
420
+        Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M];
421
+        Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L];
422
+        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
423
+                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
424
+                   (data_buf[INDEX_PLL_3_5G_HIGH_L]);
425
+#if 1 // PYJ.2019.08.12_BEGIN -- 
426
+//        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
427
+        temp_reg = ADF4153_Freq_Calc(temp_val,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
428
+//        printf("N_reg : %08x R_reg :%x\r\n",temp_reg.N_reg,temp_reg.R_reg);
429
+
430
+#else
431
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
432
+#endif // PYJ.2019.08.12_END -- 
433
+        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x14C2,0x3);
434
+//        ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3);
435
+    }
436
+    if(Prev_data[INDEX_PLL_LD_6_BIT] != data_buf[INDEX_PLL_LD_6_BIT]){
437
+
438
+    }
439
+#if 0 // PYJ.2019.07.28_BEGIN -- 
440
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_H] != data_buf[INDEX_DET_1_8G_DL_IN_H]){
441
+
442
+    }
443
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_L] != data_buf[INDEX_DET_1_8G_DL_IN_L]){
444
+
445
+    }
446
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_H] != data_buf[INDEX_DET_1_8G_DL_OUT_H]){
447
+
448
+    }
449
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_L] != data_buf[INDEX_DET_1_8G_DL_OUT_L]){
450
+
451
+    }
452
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_H] != data_buf[INDEX_DET_1_8G_UL_IN_H]){
453
+
454
+    }
455
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_L] != data_buf[INDEX_DET_1_8G_UL_IN_L]){
456
+
457
+    }
458
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_H] != data_buf[INDEX_DET_1_8G_UL_OUT_H]){
459
+
460
+    }
461
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_L] != data_buf[INDEX_DET_1_8G_UL_OUT_L]){
462
+
463
+    }
464
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_H] != data_buf[INDEX_DET_2_1G_DL_IN_H]){
465
+
466
+    }
467
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_L] != data_buf[INDEX_DET_2_1G_DL_IN_L]){
468
+
469
+    }
470
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_H] != data_buf[INDEX_DET_2_1G_DL_OUT_H]){
471
+
472
+    }
473
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_L] != data_buf[INDEX_DET_2_1G_DL_OUT_L]){
474
+
475
+    }
476
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_H] != data_buf[INDEX_DET_2_1G_UL_IN_H]){
477
+
478
+    }
479
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_L] != data_buf[INDEX_DET_2_1G_UL_IN_L]){
480
+
481
+    }
482
+
483
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_H] != data_buf[INDEX_DET_2_1G_UL_OUT_H]){
484
+
485
+    }
486
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_L] != data_buf[INDEX_DET_2_1G_UL_OUT_L]){
487
+
488
+    }
489
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_H] != data_buf[INDEX_DET_3_5G_DL_IN_H]){
490
+
491
+    }
492
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_L] != data_buf[INDEX_DET_3_5G_DL_IN_L]){
493
+
494
+    }
495
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_L] != data_buf[INDEX_DET_3_5G_DL_OUT_L]){
496
+
497
+    }
498
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_H] != data_buf[INDEX_DET_3_5G_DL_OUT_H]){
499
+
500
+    }
501
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_H] != data_buf[INDEX_DET_3_5G_UL_IN_H]){
502
+
503
+    }
504
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_L] != data_buf[INDEX_DET_3_5G_UL_IN_L]){
505
+
506
+    }
507
+
508
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_H] != data_buf[INDEX_DET_3_5G_UL_OUT_H]){
509
+
510
+    }
511
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_L] != data_buf[INDEX_DET_3_5G_UL_OUT_L]){
512
+
513
+    }
514
+    if(Prev_data[INDEX_RFU_TEMP_H] != data_buf[INDEX_RFU_TEMP_H]){
515
+
516
+    }
517
+    if(Prev_data[INDEX_RFU_TEMP_L] != data_buf[INDEX_RFU_TEMP_L]){
518
+
519
+    }
520
+    if(Prev_data[INDEX__28V_DET_H] != data_buf[INDEX__28V_DET_H]){
521
+
522
+    }
523
+    if(Prev_data[INDEX__28V_DET_L] != data_buf[INDEX__28V_DET_L]){
524
+
525
+    }
526
+#endif // PYJ.2019.07.28_END -- 
527
+    if(Prev_data[INDEX_ALARM_AC] != data_buf[INDEX_ALARM_AC]){
528
+
529
+    }
530
+    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){
531
+
532
+    }
533
+    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
534
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
535
+        Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL];
536
+    }
537
+    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
538
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]);
539
+        Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL];
540
+
541
+    }
542
+
543
+    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
544
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
545
+        Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
546
+    }
547
+    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
548
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
549
+        Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL];
550
+
551
+    }
552
+    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
553
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]);
554
+        Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L];
555
+
556
+    }
557
+    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
558
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
559
+        Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
560
+    
561
+
562
+    }
563
+    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
564
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
565
+        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
566
+        ADC_Modify = 1;
567
+
568
+    }
569
+    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
570
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
571
+        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
572
+        ADC_Modify = 1;
573
+    }
574
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
575
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);
576
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
577
+        HAL_Delay(1);
578
+//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
579
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
580
+//            printf("PLL CTRL START !! \r\n");
581
+#if 1 // PYJ.2019.08.12_BEGIN -- 
582
+//            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
583
+//                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
584
+//                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
585
+            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
586
+                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
587
+                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
588
+
589
+
590
+//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
591
+            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
592
+#else
593
+            temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
594
+#endif // PYJ.2019.08.12_END -- 
595
+//            ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
596
+//            ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3);
597
+
598
+            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
599
+        }
600
+    }
601
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
602
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]);
603
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
604
+        HAL_Delay(1);
605
+//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
606
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
607
+//            printf("PLL CTRL START !! \r\n");
608
+#if 1 // PYJ.2019.08.12_BEGIN -- 
609
+//            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
610
+//                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
611
+//                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
612
+            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
613
+                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
614
+                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
615
+            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
616
+//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
617
+#else
618
+          temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);            
619
+#endif // PYJ.2019.08.12_END -- 
620
+//            ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
621
+            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
622
+        }
623
+    }
624
+
625
+    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
626
+        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
627
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]);
628
+    }
629
+    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
630
+        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
631
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]);
632
+    }
633
+    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
634
+        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
635
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]);
636
+    }
637
+    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
638
+        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
639
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
640
+    }
641
+
642
+
643
+    if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H])
644
+        ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){
645
+        ADC_Modify = 1;
646
+        Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H];
647
+        Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L];
648
+    }
649
+    if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H])
650
+        ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){
651
+        ADC_Modify = 1;
652
+        
653
+        Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H];
654
+        Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L];        
655
+    }    
656
+    if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
657
+        ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
658
+        ADC_Modify = 1;
659
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
660
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);
661
+
662
+        Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
663
+        Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
664
+    }
665
+    if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H])
666
+        ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){
667
+        ADC_Modify = 1;
668
+        Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H];
669
+        Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L];
670
+    }
671
+    if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H])
672
+        ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){
673
+        ADC_Modify = 1;
674
+
675
+        Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H];
676
+        Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L];        
677
+    }
678
+    if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H])
679
+        ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){
680
+        ADC_Modify = 1;
681
+        Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H];
682
+        Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L];        
683
+    }
684
+    if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H])
685
+        ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){
686
+        ADC_Modify = 1;
687
+        Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H];
688
+        Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L];        
689
+    }    
690
+    if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H])
691
+        ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){
692
+        ADC_Modify = 1;
693
+        Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H];
694
+        Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L];        
695
+    }
696
+    if(ADC_Modify){
697
+//        AD5318_Ctrl(0xF000);
698
+//        HAL_Delay(1);
699
+//        AD5318_Ctrl(0x800C);
700
+//        AD5318_Ctrl(0x2FFF );
701
+//        AD5318_Ctrl(0xA000);
702
+//        printf("DAC CTRL START \r\n");
703
+//        AD5318_Ctrl(0x800C);
704
+//        AD5318_Ctrl(0xA000);
705
+//        printf("DAC Change\r\n");
706
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]));    
707
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L]));    
708
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L]));
709
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L]));
710
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L]));    
711
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L]));
712
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
713
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
714
+    }
715
+    
716
+}
717
+
718
+uint8_t temp_crc = 0;
719
+bool RF_Ctrl_Main(uint8_t* data_buf){
720
+    bool ret = false;
721
+    Bluecell_Prot_t type = data_buf[Type];
722
+    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
723
+    if(ret == false){
724
+        HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); 
725
+        return ret;
726
+    }
727
+    
728
+    switch(type){
729
+    case TYPE_BLUECELL_RESET:
730
+        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
731
+            printf("%02x ",data_buf[i]);
732
+        printf("Reset Start \r\n");
733
+        NVIC_SystemReset();
734
+        break;
735
+    case TYPE_BLUECELL_SET:
736
+#if 0 // PYJ.2019.07.31_BEGIN -- 
737
+    printf("TYPE_BLUECELL_SET : ");
738
+    for(uint8_t i =0 ; i < INDEX_BLUE_EOF + 1; i++)
739
+        printf("%02x ",data_buf[i]);
740
+#endif // PYJ.2019.07.31_END -- 
741
+        RF_Operate(&data_buf[Header]);
742
+        RF_Status_Ack();
743
+
744
+//        ADF4153_Freq_Calc(3465500000,40000000,2,5000);
745
+//        ADF4153_Freq_Calc(3993450000,40000000,2,5000);
746
+//        halSynSetFreq(1995000000);
747
+//        halSynSetFreq(1600000000);
748
+//        halSynSetFreq(1455000000);        
749
+        break;
750
+    case TYPE_BLUECELL_GET:
751
+#if 0 // PYJ.2019.08.01_BEGIN -- 
752
+        printf("\r\nTYPE_BLUECELL_GET : \r\n");
753
+#endif // PYJ.2019.08.01_END -- 
754
+        RF_Status_Get();
755
+        break;
756
+    case TYPE_BLUECELL_SAVE:
757
+//        printf("\r\nFLASH Write\r\n");
758
+        Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]);
759
+        RF_Status_Ack();
760
+
761
+        break;
762
+        default:
763
+#ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN --         
764
+            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
765
+#endif
766
+            break;
767
+    }
768
+    return ret;
769
+}

BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xm


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.siwork


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Device_ST_STM32F1xx_Include_stm32f103xe.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_CMSIS_Include_core_cm7.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Drivers_STM32F1xx_HAL_Driver_Inc_stm32f1xx_hal_gpio.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_adf4153.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_pll_4113.h.sisc


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insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_zig_operate.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_adf4153.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_flash.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_main.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_pll_4113.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_zig_operate.c.sisc